Re: [U-Boot] [PATCH] MTD/SPI/FLASH: add support for Ramtron FRAMs using SPI
On Thursday, August 26, 2010 01:57:23 Reinhard Meyer wrote: Dear Mike Frysinger, #if defined(CONFIG_SPI_FRAM_RAMTRON) # define IDCODE_LEN 10 #else # define IDCODE_LEN 5 #endif OK, see below. Can't we have it 10 generally? The impact should be negligible? hrm, i guess ... but i didnt even really like raising it to the 5 for one specific family ... for the second, what do you get back when you issue the idcode ? 0xff ? we already have a fall back case for this with stmicro, so perhaps we should generalize this further too. after the vendor id switch statement, we do: If MISO has no pull-up the result is indeterminate, the chip simply lets MISO float when it does not honor the read-id command. I'll add a comment to that file that a pull-up is required for non-standard devices to be detected. Otherwise, depending on random noise, a false detection of a standard device is not entirely impossible. that sounds reasonable to me -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] NET: add ENC28J60 driver using SPI framework
Dear Mike Frysinger, From: Reinhard Meyeri...@emk-elektronik.de Give me a tip how I can change that info. The first patch to this was committed while I used info. Squashing other patches into it does not change that. rebase -i, edit, --amend does not present that line for edit. The only idea I have now is making an empty commit and squashing that before the original patch... also, this patch seems to depend on some other change not in mainline or Ben's net tree ... Should have mentioned that the move enc28j60 to sidetrack patch is to be applied first. +static u8 enc_r8 (u16 regNo); +static void enc_rbuf (u16 length, u8 *pBuff); this whole file needs to be checked for function style. no space after the function name. That's what happens if one reworks an existing driver. I'll recheck all this. why do you need to declare your own buffer ? the common code already sets up one for you and it uses the standard 1518 size (PKTSIZE). Ok, better. Just hint me on its name, browsing the common code none did catch my eye:) pass the bus/cs/speed/mode in to the initialize function and store it in the per-device state. then you can work fine with multiple enc28j60 devices in one board. joke Ok, I was already planning to build a 16 port hub using 16 such devices ;) /joke But generalization is good. I might end up using two, actually. also, nowhere in this init func can i see error checking that the enc28j60 device is actually out there. the enc_init() should return an error if the expected phy's/etc... dont match, and this init func should key off that. I'd like to even have the phy start auto-negotiation at that moment, I'm just not sure that's ok. I won't wait for it to complete, of course, just trigger it. once this func is fixed to take the spi bus/cs, the name can be based on that instead of an arbitrary integer. enc%i.%i, bus, cs setenv ethact enc1.13 - one can get used to that ;) Reinhard ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MTD/SPI/FLASH: add support for Ramtron FRAMs using SPI
Dear Mike Frysinger, #if defined(CONFIG_SPI_FRAM_RAMTRON) # define IDCODE_LEN 10 #else # define IDCODE_LEN 5 #endif OK, see below. Can't we have it 10 generally? The impact should be negligible? hrm, i guess ... but i didnt even really like raising it to the 5 for one specific family ... Once I am editing the file, I can make that a 3-way #if. Reinhard ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] I2C: add Marvell TWSI simple driver
Hello Albert,
Albert Aribaud wrote:
This driver is for the Marvell TWSI/I2C module found in
the orion and kirkwood families among others.
Signed-off-by: Albert Aribaud albert.arib...@free.fr
---
While the 'kirkwood_i2c' driver for the Marvell TWSI module
is already available in u-boot, this one is 25% smaller, less
complex (no state machine) and much faster (i2c probe on an
ED Mini V2 takes no noticeable time vs. half a second).
Great!
As the kirkwood_i2c driver is actually not used in any board,
we should remove it completely, can you add this for v2?
Beside of that, I have just some minor codstyling comments:
drivers/i2c/Makefile |1 +
drivers/i2c/mvtwsi.c | 419
++
2 files changed, 420 insertions(+), 0 deletions(-)
create mode 100644 drivers/i2c/mvtwsi.c
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index d2c2515..73c415d 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -30,6 +30,7 @@ COBJS-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o
COBJS-$(CONFIG_FSL_I2C) += fsl_i2c.o
COBJS-$(CONFIG_I2C_KIRKWOOD) += kirkwood_i2c.o
COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
+COBJS-$(CONFIG_I2C_DRIVER_MVTWSI) += mvtwsi.o
COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o
diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
new file mode 100644
index 000..b591328
--- /dev/null
+++ b/drivers/i2c/mvtwsi.c
@@ -0,0 +1,419 @@
+/*
+ * Driver for the TWSI (i2c) controller on the Marvell orion5x
+ *
+ * Author: Albert Aribaud albert.arib...@free.fr
+ * 2005 (c) MontaVista, Software, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include common.h
+#include i2c.h
+#include asm/errno.h
+#include asm/io.h
+
+/*
+ * include a file that will provide CONFIG_I2C_MVTWSI_BASE
+ * and possibly other settings
+ */
+
+#if defined(CONFIG_ORION5X)
+#include asm/arch/orion5x.h
+#else
+#error Driver mvtwsi not supported by SoC or board
+#endif
+
+/*
+ * TWSI register structure
+ */
+
+struct mvtwsi_registers {
+ u32 slave_address;
+ u32 data;
+ u32 control;
+ union {
+ u32 status; /* when reading */
+ u32 baudrate; /* when writing */
+ };
+ u32 extended_slave_address;
+ u32 reserved[2];
+ u32 soft_reset;
+};
+
+/*
+ * Control register fields
+ */
+
+#define MVTWSI_CONTROL_ACK 0x0004
+#define MVTWSI_CONTROL_IFLG 0x0008
+#define MVTWSI_CONTROL_STOP 0x0010
+#define MVTWSI_CONTROL_START0x0020
+#define MVTWSI_CONTROL_TWSIEN 0x0040
+#define MVTWSI_CONTROL_INTEN0x0080
+
+/*
+ * Status register values -- only those expected in normal master
+ * operation on non-10-bit-address devices; whatever status we don't
+ * expect in nominal conditions (bus errors, arbitration losses,
+ * missing ACKs...) we just pass back to the caller as an error
+ * code.
+ */
+
+#define MVTWSI_STATUS_START 0x08
+#define MVTWSI_STATUS_REPEATED_START0x10
+#define MVTWSI_STATUS_ADDR_W_ACK0x18
+#define MVTWSI_STATUS_DATA_W_ACK0x28
+#define MVTWSI_STATUS_ADDR_R_ACK0x40
+#define MVTWSI_STATUS_ADDR_R_NAK0x48
+#define MVTWSI_STATUS_DATA_R_ACK0x50
+#define MVTWSI_STATUS_DATA_R_NAK0x58 /* our NAK, not the
slave's */
line too long.
+#define MVTWSI_STATUS_IDLE 0xF8
+
+/*
+ * The single instance of the controller we'll be dealing with
+ */
+
+static struct mvtwsi_registers *twsi =
+ (struct mvtwsi_registers *) CONFIG_I2C_MVTWSI_BASE;
+
+/*
+ * Returned statuses are 0 for success and nonzero otherwise.
+ * Currently, cmd_i2c and cmd_eeprom do not interpret an error status.
+ * Thus to ease debugging, the return status contains some debug info:
+ * - bits 31..24 are an error class: 0x01 is timeout, 0x02 is 'status
mismatch'.
+ * - bits 23..16 are the last value of the control register.
+ * - bits 15..8 are the last
Re: [U-Boot] [PATCH] NET: add ENC28J60 driver using SPI framework
On Thursday, August 26, 2010 02:19:07 Reinhard Meyer wrote: From: Reinhard Meyeri...@emk-elektronik.de Give me a tip how I can change that info. The first patch to this was committed while I used info. Squashing other patches into it does not change that. rebase -i, edit, --amend does not present that line for edit. The only idea I have now is making an empty commit and squashing that before the original patch... use the --author option to the commit sub command why do you need to declare your own buffer ? the common code already sets up one for you and it uses the standard 1518 size (PKTSIZE). Ok, better. Just hint me on its name, browsing the common code none did catch my eye:) NetRxPackets and friends -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] I2C: add Marvell TWSI simple driver
(adding Heiko, custodian of I2C/EEPROM and committer of kirkwood_i2c) Le 26/08/2010 06:33, Prafulla Wadaskar a écrit : -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert Aribaud Sent: Wednesday, August 25, 2010 7:54 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 1/2] I2C: add Marvell TWSI simple driver This driver is for the Marvell TWSI/I2C module found in the orion and kirkwood families among others. Signed-off-by: Albert Aribaudalbert.arib...@free.fr --- While the 'kirkwood_i2c' driver for the Marvell TWSI module is already available in u-boot, this one is 25% smaller, less complex (no state machine) and much faster (i2c probe on an ED Mini V2 takes no noticeable time vs. half a second). Hi Albert This will be very good enhancement indeed. drivers/i2c/Makefile |1 + drivers/i2c/mvtwsi.c | 419 Can you pls follow the same strategy as we followed for mvgbe, mvsata? Please rename and enhance current kirkwood_i2c driver support, and then add support for Orion followed by board support for edminiv2 Regards.. Prafulla .. I can do this of course; however I felt that I was not fixing an existing driver (as I did with mvgbe) or adding support (as I did with mvsata where there was no existing driver) but introducing competition (as kirkwood_i2c exists and is functional) and I did not want to rudely stomp the existing driver. Besides, as mvtwsi is new code, and even though I tested it (probe, read, write) with the ED Mini V2 EEPROM and RTC, until we are sure that it works we might want to keep the older kirkwood_i2c code around and be able to switch from one to the other -- having two different drivers for the same HW IP and selecting at config time is done in include/configs/km_arm.h where an option can be set to use either the soft I2C driver or the kirkwood one. Finally, we can always remove the kirkwood_i2c driver later on if we want, in a separate patch (which will also switch km_arm to using mvtwsi). Anyway, this mvtwsi patch will require Heiko's ACK as well as yours; let's hear from him (when he is back) on whether I should add mvtwsi or replace kirkwood_i2c. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] CMD_I2C: make alen=0 work
Hello Reinhard, Reinhard Meyer wrote: Signed-off-by: Reinhard Meyer u-b...@emk-elektronik.de --- common/cmd_i2c.c | 17 +++-- 1 files changed, 7 insertions(+), 10 deletions(-) Thanks for detecting this. Applied to u-boot-i2c.git bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request v2: u-boot-i2c
Hello Wolfgang, The following changes since commit bd2313078114c4b44c4a5ce149af43bcb7fc8854: Wolfgang Denk (1): Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master are available in the git repository at: git://git.denx.de/u-boot-i2c.git master Nishanth Menon (3): i2c: omap2+: change header guard to be generic omap2: i2c: add syss offset omap2: i2c: remove redundant header definitions Reinhard Meyer (1): CMD_I2C: make alen=0 work arch/arm/include/asm/arch-omap24xx/i2c.h | 110 +- common/cmd_i2c.c | 17 ++--- drivers/i2c/omap24xx_i2c.h |4 +- 3 files changed, 12 insertions(+), 119 deletions(-) bye Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] I2C: add Marvell TWSI simple driver
Le 26/08/2010 08:30, Heiko Schocher a écrit : As the kirkwood_i2c driver is actually not used in any board, we should remove it completely, can you add this for v2? That answers the questions I *just* asked on the list :) -- Wilco. Beside of that, I have just some minor codstyling comments: [...] Will apply these. Thanks! Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] NET: add ENC28J60 driver using SPI framework
Dear Mike Frysinger, From: Reinhard Meyeri...@emk-elektronik.de Give me a tip how I can change that info. The first patch to this was committed while I usedinfo. Squashing other patches into it does not change that. rebase -i, edit, --amend does not present that line for edit. The only idea I have now is making an empty commit and squashing that before the original patch... use the --author option to the commit sub command Hmm, as I said above, the first commit was made while I had the info address in use. All new commits use the u-boot address anyway. But when I squash new commits onto the first one, the old address prevails... I'll try rebase -i, edit, reset HEAD^, and a new commit then. That might work. Reinhard ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] I2C: add Marvell TWSI simple driver
Hello Albert, Albert ARIBAUD wrote: (adding Heiko, custodian of I2C/EEPROM and committer of kirkwood_i2c) Le 26/08/2010 06:33, Prafulla Wadaskar a écrit : -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert Aribaud Sent: Wednesday, August 25, 2010 7:54 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 1/2] I2C: add Marvell TWSI simple driver This driver is for the Marvell TWSI/I2C module found in the orion and kirkwood families among others. Signed-off-by: Albert Aribaudalbert.arib...@free.fr --- While the 'kirkwood_i2c' driver for the Marvell TWSI module is already available in u-boot, this one is 25% smaller, less complex (no state machine) and much faster (i2c probe on an ED Mini V2 takes no noticeable time vs. half a second). Hi Albert This will be very good enhancement indeed. drivers/i2c/Makefile |1 + drivers/i2c/mvtwsi.c | 419 Can you pls follow the same strategy as we followed for mvgbe, mvsata? Please rename and enhance current kirkwood_i2c driver support, and then add support for Orion followed by board support for edminiv2 Regards.. Prafulla .. I can do this of course; however I felt that I was not fixing an existing driver (as I did with mvgbe) or adding support (as I did with mvsata where there was no existing driver) but introducing competition (as kirkwood_i2c exists and is functional) and I did not want to rudely stomp the existing driver. Besides, as mvtwsi is new code, and even though I tested it (probe, read, write) with the ED Mini V2 EEPROM and RTC, until we are sure that it works we might want to keep the older kirkwood_i2c code around and be able to switch from one to the other -- having two different drivers for the same HW IP and selecting at config time is done in include/configs/km_arm.h where an option can be set to use either the soft I2C driver or the kirkwood one. We use only soft i2c on this board, so please remove the kirkwood_i2c.c driver completely. So we have only your driver in tree, which is used and working. bye Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] NET: add ENC28J60 driver using SPI framework
On Thursday, August 26, 2010 02:41:56 Reinhard Meyer wrote: From: Reinhard Meyeri...@emk-elektronik.de Give me a tip how I can change that info. The first patch to this was committed while I usedinfo. Squashing other patches into it does not change that. rebase -i, edit, --amend does not present that line for edit. The only idea I have now is making an empty commit and squashing that before the original patch... use the --author option to the commit sub command Hmm, as I said above, the first commit was made while I had the info address in use. All new commits use the u-boot address anyway. But when I squash new commits onto the first one, the old address prevails... there is no field to edit in the commit message. the From: is generated by the author information in the commit. the only way to change it is to amend the commit in question with --author. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] SPI: cmd_spi.c: add options to specify bus and mode
and cleaned up error messages and help,
removed pointless debug() call.
Signed-off-by: Reinhard Meyer u-b...@emk-elektronik.de
---
common/cmd_spi.c | 40 +---
1 files changed, 25 insertions(+), 15 deletions(-)
diff --git a/common/cmd_spi.c b/common/cmd_spi.c
index bafa217..8c623c9 100644
--- a/common/cmd_spi.c
+++ b/common/cmd_spi.c
@@ -47,7 +47,9 @@
/*
* Values from last command.
*/
-static unsigned intdevice;
+static unsigned intbus;
+static unsigned intcs;
+static unsigned intmode;
static int bitlen;
static uchar dout[MAX_SPI_BYTES];
static uchar din[MAX_SPI_BYTES];
@@ -78,8 +80,18 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
if ((flag CMD_FLAG_REPEAT) == 0)
{
- if (argc = 2)
- device = simple_strtoul(argv[1], NULL, 10);
+ if (argc = 2) {
+ mode = CONFIG_DEFAULT_SPI_MODE;
+ bus = simple_strtoul(argv[1], cp, 10);
+ if (*cp == ':') {
+ cs = simple_strtoul(cp+1, cp, 10);
+ } else {
+ cs = bus;
+ bus = CONFIG_DEFAULT_SPI_BUS;
+ }
+ if (*cp == '.');
+ mode = simple_strtoul(cp+1, NULL, 10);
+ }
if (argc = 3)
bitlen = simple_strtoul(argv[2], NULL, 10);
if (argc = 4) {
@@ -91,7 +103,7 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
if(tmp 15)
tmp -= ('a' - 'A');
if(tmp 15) {
- printf(Hex conversion error on %c,
giving up.\n, *cp);
+ printf(Hex conversion error on %c\n,
*cp);
return 1;
}
if((j % 2) == 0)
@@ -103,24 +115,20 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
}
if ((bitlen 0) || (bitlen (MAX_SPI_BYTES * 8))) {
- printf(Invalid bitlen %d, giving up.\n, bitlen);
+ printf(Invalid bitlen %d\n, bitlen);
return 1;
}
- /* FIXME: Make these parameters run-time configurable */
- slave = spi_setup_slave(CONFIG_DEFAULT_SPI_BUS, device, 100,
- CONFIG_DEFAULT_SPI_MODE);
+ slave = spi_setup_slave(bus, cs, 100, mode);
if (!slave) {
- printf(Invalid device %d, giving up.\n, device);
+ printf(Invalid device %d:%d\n, bus, cs);
return 1;
}
- debug (spi chipsel = %08X\n, device);
-
spi_claim_bus(slave);
if(spi_xfer(slave, bitlen, dout, din,
SPI_XFER_BEGIN | SPI_XFER_END) != 0) {
- printf(Error with the SPI transaction.\n);
+ printf(Error during SPI transaction\n);
rcode = 1;
} else {
for(j = 0; j ((bitlen + 7) / 8); j++) {
@@ -138,9 +146,11 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
U_BOOT_CMD(
sspi, 5, 1, do_spi,
- SPI utility commands,
- device bit_len dout - Send bit_len bits from dout out the
SPI\n
- device - Identifies the chip select of the device\n
+ SPI utility command,
+ [bus:]cs[.mode] bit_len dout - Send and receive bits\n
+ bus - Identifies the SPI bus\n
+ cs - Identifies the chip select\n
+ mode- Identifies the SPI mode to use\n
bit_len - Number of bits to send (base 10)\n
dout- Hexadecimal string that gets sent
);
--
1.5.6.5
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Re: [U-Boot] [PATCH 1/2] I2C: add Marvell TWSI simple driver
-Original Message- From: Heiko Schocher [mailto:h...@denx.de] Sent: Thursday, August 26, 2010 12:17 PM To: Albert ARIBAUD Cc: Prafulla Wadaskar; u-boot@lists.denx.de; Heiko Schosher; Ashish Karkare; Prabhanjan Sarnaik Subject: Re: [U-Boot] [PATCH 1/2] I2C: add Marvell TWSI simple driver Hello Albert, Albert ARIBAUD wrote: (adding Heiko, custodian of I2C/EEPROM and committer of kirkwood_i2c) Le 26/08/2010 06:33, Prafulla Wadaskar a écrit : -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert Aribaud Sent: Wednesday, August 25, 2010 7:54 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 1/2] I2C: add Marvell TWSI simple driver This driver is for the Marvell TWSI/I2C module found in the orion and kirkwood families among others. Signed-off-by: Albert Aribaudalbert.arib...@free.fr --- While the 'kirkwood_i2c' driver for the Marvell TWSI module is already available in u-boot, this one is 25% smaller, less complex (no state machine) and much faster (i2c probe on an ED Mini V2 takes no noticeable time vs. half a second). Hi Albert This will be very good enhancement indeed. drivers/i2c/Makefile |1 + drivers/i2c/mvtwsi.c | 419 Can you pls follow the same strategy as we followed for mvgbe, mvsata? Please rename and enhance current kirkwood_i2c driver support, and then add support for Orion followed by board support for edminiv2 Regards.. Prafulla .. I can do this of course; however I felt that I was not fixing an existing driver (as I did with mvgbe) or adding support (as I did with mvsata where there was no existing driver) but introducing competition (as kirkwood_i2c exists and is functional) and I did not want to rudely stomp the existing driver. Besides, as mvtwsi is new code, and even though I tested it (probe, read, write) with the ED Mini V2 EEPROM and RTC, until we are sure that it works we might want to keep the older kirkwood_i2c code around and be able to switch from one to the other -- having two different drivers for the same HW IP and selecting at config time is done in include/configs/km_arm.h where an option can be set to use either the soft I2C driver or the kirkwood one. We use only soft i2c on this board, so please remove the kirkwood_i2c.c driver completely. So we have only your driver in tree, which is used and working. Ack. Regards.. Prafulla . . bye Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MTD/SPI/FLASH: add support for Ramtron FRAMs using SPI
Dear Mike, 1. looking at spi_flash.c, shall I add the standard copyright, keeping atmel as author? 2. I can find the following lengths of idcode used: atmel 2 macronix 3 ramtron 9 spansion 5 sst 3 stmicro 4 winbond 3 Do you really want to flexify this? Even before relocation 5 bytes more on stack would not be an issue... Of course, for me the 5/10 switch would work as well. It would involve the debug(SF: Got idcode %02x %02x %02x %02x %02x\n, idcode[0], idcode[1], idcode[2], idcode[3], idcode[4]); as well. I can make that into a for() loop #ifdef DEBUG printf(SF: Got idcode); for (i=0; iIDCODE_LEN; i++) printf( %02x, idcode[i]); printf(\n); #endif Reinhard attachment: reinhard_meyer.vcf___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] Add generic support for samsung s3c2440
Dear C Nauman,
On 25 August 2010 03:18, C Nauman cnau...@diagraph.com wrote:
Minkyu,
remove it.
please write the commit msg only.
- This patch adds generic support for the Samsung s3c2440 processor.
Started from patch posted by Kevin Morfitt.
- v2 Changed struct members to lower case
please move the change log under the --- line.
Signed-off-by: Craig Nauman cnau...@diagraph.com
please add Kevin to Cc
---
arch/arm/cpu/arm920t/s3c24x0/speed.c | 36 +-
arch/arm/cpu/arm920t/s3c24x0/timer.c | 23 +-
arch/arm/cpu/arm920t/s3c24x0/usb.c | 10 +-
arch/arm/cpu/arm920t/s3c24x0/usb_ohci.c | 12 +-
arch/arm/include/asm/arch-s3c24x0/s3c2440.h | 163 ++
arch/arm/include/asm/arch-s3c24x0/s3c24x0.h | 672
+--
arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h | 2 +
board/mpl/vcma9/vcma9.c | 40 +-
board/samsung/smdk2400/smdk2400.c | 28 +-
board/samsung/smdk2410/smdk2410.c | 36 +-
board/sbc2410x/sbc2410x.c | 44 +-
board/trab/cmd_trab.c | 28 +-
board/trab/rs485.c | 38 +-
board/trab/trab.c | 66 ++--
board/trab/trab_fkt.c | 142 +++---
board/trab/tsc2000.c | 38 +-
board/trab/tsc2000.h | 64 ++--
board/trab/vfd.c | 86 ++--
drivers/i2c/s3c24x0_i2c.c | 102 ++--
drivers/mtd/nand/s3c2410_nand.c | 8 +-
drivers/rtc/s3c24x0_rtc.c | 52 +-
drivers/serial/serial_s3c24x0.c | 26 +-
22 files changed, 993 insertions(+), 723 deletions(-)
create mode 100644 arch/arm/include/asm/arch-s3c24x0/s3c2440.h
Your patch have many style problems.
(total: 178 errors, 805 warnings, 2928 lines checked)
Please run checkpatch.pl.
I'll review your patch after you fix it.
Minkyu Kang wrote:
Dear C Nauman,
On 23 August 2010 22:40, C Nauman cnau...@diagraph.com wrote:
This patch adds generic support for the Samsung s3c2440 processor.
Started from patch posted 2009-06-19 by
Kevin Morfitt. Then modified for changes in the code that have occurred
since.
Signed-off-by: Craig Nauman cnauman at diagraph.com
Please fix the email address.
And could you please use the git format-patch?
so that we can see what are changed.
---
diff --git a/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
b/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
index 15f53dd..d4abd24 100644
--- a/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
+++ b/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
@@ -82,6 +82,10 @@ struct s3c24x0_interrupt {
u32 SUBSRCPND;
u32 INTSUBMSK;
#endif
+#ifdef CONFIG_S3C2440
+ u32 SUBSRCPND;
+ u32 INTSUBMSK;
+#endif
};
We don't allow upper case structure members.
That is reason for why kevin sent clean-up patches.
Please fix it globally.
Thanks.
Minkyu Kang.
--
Craig Nauman
Diagraph an ITW Company
cnauman at diagraph dot com
Please remove last mail thread.
Thanks.
Minkyu Kang
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Re: [U-Boot] [PATCH] ARMV7: S5P: rename from CONFIG_S5PC1XX to CONFIG_S5P
On 23 August 2010 20:01, Minkyu Kang mk7.k...@samsung.com wrote: Use the same configuration around S5P SoCs. (s5pc100, s5pc110, s5pc210 and so on) Signed-off-by: Minkyu Kang mk7.k...@samsung.com --- common/serial.c | 4 ++-- drivers/gpio/Makefile | 2 +- drivers/mtd/onenand/samsung.c | 6 +++--- drivers/serial/Makefile | 2 +- include/configs/s5p_goni.h | 2 +- include/configs/smdkc100.h | 2 +- include/serial.h | 2 +- 7 files changed, 10 insertions(+), 10 deletions(-) applied to u-boot-samsung Minkyu Kang -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARMV7: S5P: fix the macro at samsung_get_base function
On 24 August 2010 16:50, Minkyu Kang mk7.k...@samsung.com wrote: New line is unnecessary at last line of macro. Signed-off-by: Minkyu Kang mk7.k...@samsung.com --- arch/arm/include/asm/arch-s5pc1xx/cpu.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) applied to u-boot-samsung Minkyu Kang -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Use common function to set GPIOs for MX3 and MX5
Hi Mike, On Monday, August 23, 2010 17:03:24 Detlev Zundel wrote: Hi Stefan, On Monday 23 August 2010 17:55:44 Stefano Babic wrote: I am also adding support for S25FL032P chips to the spansion driver. Will post a patch later. I have seen. However, it should be better if you send the patch also to the maintainer for the MTD subsystem (Stefan Roese, I set his address in CC). Small correction: I'm not the custodian of the MTD subsystem, but of the CFI flash driver (amongst others). And I have never really taken care of the SPI flash patches before (and never used one of those drivers before). IIRC, then Mike (added to Cc) has the most insight here. In fact I cannot see that you extended the CC list. Wanna have another go? ;) i did since he added me to the cc ... Hm, hm, hm. That strange invisible CC phaenomenon again. I just checked again and on the mail that I received you are definitely not on the CC list Anyway, sorry for the noise Detlev -- To you I'm an atheist; to God, I'm the Loyal Opposition. -- Woody Allen -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MTD/SPI/FLASH: add support for Ramtron FRAMs using SPI
On Thursday, August 26, 2010 04:27:36 Reinhard Meyer wrote: 1. looking at spi_flash.c, shall I add the standard copyright, keeping atmel as author? doesnt matter to me 2. I can find the following lengths of idcode used: atmel 2 macronix 3 ramtron 9 spansion 5 sst 3 stmicro 4 winbond 3 Do you really want to flexify this? Even before relocation 5 bytes more on stack would not be an issue... Of course, for me the 5/10 switch would work as well. i would keep the 5/10 split It would involve the debug(SF: Got idcode %02x %02x %02x %02x %02x\n, idcode[0], idcode[1], idcode[2], idcode[3], idcode[4]); as well. I can make that into a for() loop #ifdef DEBUG printf(SF: Got idcode); for (i=0; iIDCODE_LEN; i++) printf( %02x, idcode[i]); printf(\n); #endif use print_buffer() -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] SPI: cmd_spi.c: add options to specify bus and mode
On Thursday, August 26, 2010 04:57:27 Reinhard Meyer wrote: and cleaned up error messages and help, removed pointless debug() call. this looks good to me. i'll give it a spin on my hardware when i get a chance, and pull into my sf tree so it doesnt get lost. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] I2C: add Marvell TWSI simple driver
Le 26/08/2010 10:23, Prafulla Wadaskar a écrit : We use only soft i2c on this board, so please remove the kirkwood_i2c.c driver completely. So we have only your driver in tree, which is used and working. Ack. Regards.. Prafulla . . Wilco. As a safety and cleanliness measure, I'll prepend a patch to the set, which will remove the 'hard i2c' related options from km_arm since they aren't used, and won't build any more once the switch is done. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 01/11] arm/pxa: remove unused u-boot.lds from board/vpac270
This file is not used, automatically generated u-boot.lds is used instead
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com
---
board/vpac270/u-boot.lds | 55 --
1 files changed, 0 insertions(+), 55 deletions(-)
delete mode 100644 board/vpac270/u-boot.lds
diff --git a/board/vpac270/u-boot.lds b/board/vpac270/u-boot.lds
deleted file mode 100644
index 58c371d..000
--- a/board/vpac270/u-boot.lds
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT(elf32-littlearm, elf32-littlearm, elf32-littlearm)
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
--
1.7.1
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[U-Boot] [PATCH 04/11] arm/pxa: cleanup vpac270 config and set CONFIG_SYS_HZ to 1000
* CONFIG_SYS_CLKS_IN_HZ is not used anywhere, so removing it * CONFIG_SYS_HZ is set to 1000 on most architectures, so it seems to be the safe default Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h |3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index e31b08a..4c162bd 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -151,8 +151,7 @@ /* * Clock Configuration */ -#undef CONFIG_SYS_CLKS_IN_HZ -#defineCONFIG_SYS_HZ 325 /* Timer @ 325 Hz */ +#defineCONFIG_SYS_HZ 1000/* Timer @ 325 Hz */ #define CONFIG_SYS_CPUSPEED0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */ /* -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 03/11] arm/pxa: enable stuart/btuart for vpac270
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com
---
include/configs/vpac270.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h
index d3e22d9..e31b08a 100644
--- a/include/configs/vpac270.h
+++ b/include/configs/vpac270.h
@@ -62,7 +62,10 @@
* Serial Console Configuration
*/
#defineCONFIG_PXA_SERIAL
+#defineCONFIG_SERIAL_MULTI
#defineCONFIG_FFUART 1
+#defineCONFIG_STUART 1
+#defineCONFIG_BTUART 1
#defineCONFIG_BAUDRATE 115200
#defineCONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600,
115200 }
--
1.7.1
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[U-Boot] [PATCH 02/11] arm/pxa: fix board/vpac270/vpac270.c compilation if usb support is disabled
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com
---
board/vpac270/vpac270.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/board/vpac270/vpac270.c b/board/vpac270/vpac270.c
index 18e47e2..2f29cf4 100644
--- a/board/vpac270/vpac270.c
+++ b/board/vpac270/vpac270.c
@@ -73,6 +73,7 @@ int dram_init (void)
return 0;
}
+#ifdef CONFIG_CMD_USB
int usb_board_init(void)
{
UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL)
@@ -119,6 +120,7 @@ void usb_board_stop(void)
return;
}
+#endif
#ifdef CONFIG_DRIVER_DM9000
int board_eth_init(bd_t *bis)
--
1.7.1
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[U-Boot] [PATCH 06/11] arm/pxa: remove CONFIG_ENV_OVERWRITE from vpac270 config
it is not required and not recommended. Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h |2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index d3e805a..c8663e8 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -40,8 +40,6 @@ #defineCONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) #defineCONFIG_SYS_GBL_DATA_SIZE128 -#defineCONFIG_ENV_OVERWRITE/* override default environment */ - #defineCONFIG_BOOTCOMMAND \ if mmc init fatload mmc 0 0xa400 uImage; then \ bootm 0xa400; \ -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 05/11] arm/pxa: fix environment location/length for vpac270 and related bugs.
Define MONITOR_BASE on the base of used flash type. Define ENV_ADDR as MONITOR_BASE + MONITOR_LEN. Fix environment sector size (NOR: 32Kb for first four sectors and 128Kb for other; OneNAND: 128Kb). Last but not least: we have MONITOR_LEN = 0x4, one sector for environment and one sector for its redundancy copy (2 * 0x2 = 256Kb). So the kernel may start from 0x0008 only. Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h | 10 ++ 1 files changed, 6 insertions(+), 4 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index 4c162bd..d3e805a 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -49,7 +49,7 @@ if usb reset fatload usb 0 0xa400 uImage; then \ bootm 0xa400; \ fi; \ - bootm 0x4; + bootm 0x0008; #defineCONFIG_BOOTARGS console=tty0 console=ttyS0,115200 #defineCONFIG_TIMESTAMP #defineCONFIG_BOOTDELAY2 /* Autoboot delay */ @@ -188,6 +188,7 @@ #ifdefined(CONFIG_CMD_FLASH) /* NOR */ #definePHYS_FLASH_10x /* Flash Bank #1 */ #definePHYS_FLASH_20x0200 /* Flash Bank #2 */ +#defineCONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 #defineCONFIG_SYS_FLASH_CFI #defineCONFIG_FLASH_CFI_DRIVER 1 @@ -207,18 +208,19 @@ #elif defined(CONFIG_CMD_ONENAND) /* OneNAND */ #defineCONFIG_SYS_NO_FLASH #defineCONFIG_SYS_ONENAND_BASE 0x +#defineCONFIG_SYS_MONITOR_BASE CONFIG_SYS_ONENAND_BASE #defineCONFIG_ENV_IS_IN_ONENAND1 #else /* No flash */ #defineCONFIG_SYS_NO_FLASH #defineCONFIG_SYS_ENV_IS_NOWHERE +#defineCONFIG_SYS_MONITOR_BASE 0x00 #endif -#defineCONFIG_SYS_MONITOR_BASE 0x00 #defineCONFIG_SYS_MONITOR_LEN 0x4 -#define CONFIG_ENV_ADDR(CONFIG_SYS_MONITOR_LEN) -#define CONFIG_ENV_SECT_SIZE 0x4 +#define CONFIG_ENV_ADDR(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_SECT_SIZE 0x2 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 08/11] arm/pxa: increase CONFIG_SYS_MALLOC_LEN to (196Kb + space for environment)
it looks like u-boot allocates a buffer of CONFIG_ENV_SECT_SIZE size when making saveenv command. In our case CONFIG_ENV_SECT_SIZE is 128Kb, so having CONFIG_SYS_MALLOC_LEN = (128Kb + space for environment) is not sufficient. Increase CONFIG_SYS_MALLOC_LEN to (196Kb + space for environment) to resolve a problem. Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index 98faf9a..ddb3e0e 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -37,7 +37,7 @@ * Environment settings */ #defineCONFIG_ENV_SIZE (4 * 1024) -#defineCONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) +#defineCONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 196*1024) #defineCONFIG_SYS_GBL_DATA_SIZE128 #defineCONFIG_BOOTCOMMAND \ -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 07/11] arm/pxa: decrease environment size and stack size for vpac270
it looks like 4Kb for environment and 64Kb for stack is sufficient Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index c8663e8..98faf9a 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -36,7 +36,7 @@ /* * Environment settings */ -#defineCONFIG_ENV_SIZE 0x4000 +#defineCONFIG_ENV_SIZE (4 * 1024) #defineCONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) #defineCONFIG_SYS_GBL_DATA_SIZE128 @@ -157,7 +157,7 @@ * * The stack sizes are set up in start.S using the settings below */ -#defineCONFIG_STACKSIZE(128*1024) /* regular stack */ +#defineCONFIG_STACKSIZE(64*1024) /* regular stack */ #ifdef CONFIG_USE_IRQ #defineCONFIG_STACKSIZE_IRQ(4*1024)/* IRQ stack */ #defineCONFIG_STACKSIZE_FIQ(4*1024)/* FIQ stack */ -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Non-experimental U-Boot compilation
Dear All, After erasing the data flash, NAnd flash and installing the Bootstrap loader and U-Boot, the problem is solved. I have a U-Boot prompt using which I should be able to proceed further. Before building the Linux kernel and file system, I want to experiment with prebuilt images of kernel FS. I have got a) Linux image -- Linux-2.6.27-at91-exp.3-at91sam9g20ek.bin b) File system image -- genericfs.arm.nofpu.jffs2. How do I install these image into the evaluation kit? The website www.linux4sam.org gives instructions to load the linux-2.6.27.img and samp-ramdisk.gz images. Is it necessary for any conversion? Thanks regards Sandeep Suresh From: Xu, Hong hong...@atmel.com To: sandeep.sur...@yahoo.co.in Cc: u-boot@lists.denx.de Sent: Tue, 24 August, 2010 6:23:46 PM Subject: Re: Non-experimental U-Boot compilation Hi, Dear all, I am using the AT91SAM9G20EK kit and want to port Linux on this. Actually Atmel has already done this, see http://www.linux4sam.org the AT91SAM9260ek configuration as it seems the closest. The problem is after building the U-boot with the sources for this board, generating the .bin, loading and a power on reset (POR), there isn't a command prompt exposed (u-boot). After POR, 1 1 2 1 1 2 continuosly prints on the hyperterminal. I read from AT91.com that this is the expected behavior for the demo version. Yes, this is the expected behaviour for the demo package. When you see this, it means you do not boot from the media where you burn your U-Boot into. What is rge procedure to get the prompt ? Are there any separate configuration settings? AT91SAM9G20EK are well supported by both mainline code and Atmel's current binary. ( u-boot 1.3.4, a little bit old) For detailed steps to run U-Boot/Linux on your board, still, goto http://www.linux4sam.org BR, Eric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 09/11] arm/pxa: fix number of cfi flashes in vpac270
This board have only one CFI flash actually, so fix it in config.
PS: This patch should not go upstream at this point as it specific
to my revision of voipac
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com
---
include/configs/vpac270.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h
index ddb3e0e..c92eb40 100644
--- a/include/configs/vpac270.h
+++ b/include/configs/vpac270.h
@@ -192,8 +192,8 @@
#defineCONFIG_FLASH_CFI_DRIVER 1
#defineCONFIG_SYS_MAX_FLASH_SECT (4 + 255)
-#defineCONFIG_SYS_MAX_FLASH_BANKS 2
-#defineCONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
+#defineCONFIG_SYS_MAX_FLASH_BANKS 1
+#defineCONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
#defineCONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ)
#defineCONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ)
--
1.7.1
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[U-Boot] [PATCH 10/11] arm/pxa: fix sdram memory layout for vpac270
The board have only 128 Mb of memory and only two first memory banks are used. Also remove unneeded CONFIG_SYS_DRAM_SIZE constant and set default load address to be in sdram. PS: This patch should not go upstream at this point as it specific to my revision of voipac Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h | 17 ++--- 1 files changed, 10 insertions(+), 7 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index c92eb40..b04d1e8 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -166,19 +166,22 @@ /* * DRAM Map */ -#defineCONFIG_NR_DRAM_BANKS2 /* We have 2 banks of DRAM */ -#definePHYS_SDRAM_10xa000 /* SDRAM Bank #1 */ -#definePHYS_SDRAM_1_SIZE 0x0800 /* 128 MB */ -#definePHYS_SDRAM_20x8000 /* SDRAM Bank #2 */ -#definePHYS_SDRAM_2_SIZE 0x0800 /* 128 MB */ +#defineCONFIG_NR_DRAM_BANKS4 /* We have 2 banks of DRAM */ +#define PHYS_SDRAM_1 0xa000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x0400 /* 64 MB */ +#define PHYS_SDRAM_2 0xa400 /* SDRAM Bank #2 */ +#define PHYS_SDRAM_2_SIZE 0x0400 /* 64 MB */ +#define PHYS_SDRAM_3 0xa800 /* SDRAM Bank #3 */ +#define PHYS_SDRAM_3_SIZE 0x /* 0 MB */ +#define PHYS_SDRAM_4 0xac00 /* SDRAM Bank #4 */ +#define PHYS_SDRAM_4_SIZE 0x /* 0 MB */ #defineCONFIG_SYS_DRAM_BASE0xa000 /* CS0 */ -#defineCONFIG_SYS_DRAM_SIZE0x1000 /* 256 MB DRAM */ #define CONFIG_SYS_MEMTEST_START 0xa040 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa080 /* 4 ... 8 MB in DRAM */ -#defineCONFIG_SYS_LOAD_ADDR(0x5c00) +#defineCONFIG_SYS_LOAD_ADDR0xa000 /* * NOR FLASH -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 11/11] arm/pxa: fix and cleanup of pxa_mem_setup macro v2
WARNING: This macro do not assume the values for K0DB4, KxDB2, KxFREE, K1RUN, K2RUN and APD bits of CONFIG_SYS_MDREFR_VAL as it was done early on many pxa platforms. All pxa developers that plan to use this macro should check the validity of their MDREFR values. v1: * strict following to section 6.4.10 of Intel PXA27xx Developer's Manual. * use r7 to store CONFIG_SYS_MDREFR_VAL as r6 is used in pxa_wait_ticks. v2: * rename pxa_mem_setup macro to pxa2xx_mem_setup * setting of MDREFR[K1RUN] and MDREFR[K2RUN] bits may be optional * skip certain configuration steps if SDRAM is not present/configured * improve/fix comments PS: This patch should not go upstream at this point as it require more work. Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- arch/arm/include/asm/arch-pxa/macro.h | 78 +--- board/vpac270/lowlevel_init.S |2 +- 2 files changed, 52 insertions(+), 28 deletions(-) diff --git a/arch/arm/include/asm/arch-pxa/macro.h b/arch/arm/include/asm/arch-pxa/macro.h index 035a57e..468482a 100644 --- a/arch/arm/include/asm/arch-pxa/macro.h +++ b/arch/arm/include/asm/arch-pxa/macro.h @@ -102,11 +102,15 @@ /* * This macro sets up the Memory controller of the PXA2xx CPU * - * Clobbered regs: r3, r4, r5 + * Clobbered regs: r3, r4, r5, r6, r7 + * + * See section 6.4.10 of Intel PXA2xx Processor Developer's Manual + * http://www.marvell.com/products/processors/applications/pxa_family/pxa_27x_dev_man.pdf */ -.macro pxa_mem_setup +.macro pxa2xx_mem_setup /* This comes handy when setting MDREFR */ ldr r3, =MEMC_BASE + ldr r7, =CONFIG_SYS_MDREFR_VAL /* * 1) Initialize Asynchronous static memory controller @@ -149,51 +153,66 @@ */ /* -* Before accessing MDREFR we need a valid DRI field, so we set -* this to power on defaults + DRI field. +* Before accessing MDREFR we need a valid DRI field. +* Also we must properly configure MDREFR[K0DB2] and MDREFR[K0DB4]. +* Optionaly we can set MDREFR[KxFREE] bits. +* So we set MDREFR to power on defaults + (DRI, K0DB2, K0DB4, KxFREE) +* fields from the config. +* +* WARNING: K0DB2 and K0DB4 bits are usually set, while KxFREE bits +* are usually unset. */ ldr r5, [r3, #MDREFR_OFFSET] - bic r5, r5, #0x0ff - bic r5, r5, #0xf00 /* MDREFR user config with zeroed DRI */ - - ldr r4, =CONFIG_SYS_MDREFR_VAL - mov r6, r4 - lsl r4, #20 - lsr r4, #20 /* Get a valid DRI field */ - - orr r5, r5, r4 /* MDREFR user config with correct DRI */ + ldr r4, =( 0xFFF | MDREFR_K0DB4 | MDREFR_K0DB2 | \ + MDREFR_K0FREE | MDREFR_K1FREE | MDREFR_K2FREE ) + bic r5, r5, r4 /* clear DRI, K0DB2, K0DB4, KxFREE fields */ + and r4, r7, r4 + orr r5, r5, r4 /* use custom DRI, K0DB2, K0DB4, KxFREE */ orr r5, #MDREFR_K0RUN orr r5, #MDREFR_SLFRSH bic r5, #MDREFR_APD - bic r5, #MDREFR_E1PIN + + /* enable them later, if SDRAM is present */ + bic r5, #( MDREFR_E1PIN | MDREFR_K1RUN | MDREFR_K2RUN | \ + MDREFR_K1DB2 | MDREFR_K2DB2 ) str r5, [r3, #MDREFR_OFFSET] - ldr r4, [r3, #MDREFR_OFFSET] + ldr r5, [r3, #MDREFR_OFFSET] /* * 5) Initialize Synchronous Static Memory (Flash/Peripherals) */ - /* Initialize SXCNFG register. Assert the enable bits. -* -* Write SXMRS to cause an MRS command to all enabled banks of -* synchronous static memory. Note that SXLCR need not be written -* at this time. + /* Initialize SXCNFG register to enable synchronous flash memory. +* While the synchronous flash banks are being configured, the SDRAM +* banks must be disabled and MDREFR[APD] must be de-asserted. */ write32rb (MEMC_BASE + SXCNFG_OFFSET), CONFIG_SYS_SXCNFG_VAL /* -* 6) Initialize SDRAM +* 6) Initialize SDRAM, +*If SDRAM present, then MDREFR[K1RUN] and/or MDREFR[K2RUN] bits +*must be set. Also we must properly configure MDREFR[K1DB2] and +*MDREFR[K2DB2] in this case. +* +*WARNING: K1DB2 and K2DB2 bits are usually set if SDRAM present */ + and r4, r7, #( MDREFR_K1RUN | MDREFR_K2RUN | \ + MDREFR_K1DB2 | MDREFR_K2DB2 ) + ldr r6, [r3, #MDREFR_OFFSET] + orr r6, r6, r4 + str r6, [r3, #MDREFR_OFFSET] + ldr r6, [r3, #MDREFR_OFFSET] + bic r6, #MDREFR_SLFRSH str r6, [r3, #MDREFR_OFFSET] - ldr r4, [r3, #MDREFR_OFFSET] + ldr r6, [r3, #MDREFR_OFFSET]
Re: [U-Boot] [PATCH 05/11] arm/pxa: fix environment location/length for vpac270 and related bugs.
Dne Čt 26. srpna 2010 12:48:00 Mikhail Kshevetskiy napsal(a): Define MONITOR_BASE on the base of used flash type. Define ENV_ADDR as MONITOR_BASE + MONITOR_LEN. Fix environment sector size (NOR: 32Kb for first four sectors and 128Kb for other; OneNAND: 128Kb). Last but not least: we have MONITOR_LEN = 0x4, one sector for environment and one sector for its redundancy copy (2 * 0x2 = 256Kb). So the kernel may start from 0x0008 only. Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h | 10 ++ 1 files changed, 6 insertions(+), 4 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index 4c162bd..d3e805a 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -49,7 +49,7 @@ if usb reset fatload usb 0 0xa400 uImage; then \ bootm 0xa400; \ fi; \ - bootm 0x4; + bootm 0x0008; Good catch, but let's make it 0x6 as spare env isn't used. #define CONFIG_BOOTARGS console=tty0 console=ttyS0,115200 #define CONFIG_TIMESTAMP #define CONFIG_BOOTDELAY2 /* Autoboot delay */ @@ -188,6 +188,7 @@ #if defined(CONFIG_CMD_FLASH) /* NOR */ #define PHYS_FLASH_10x /* Flash Bank #1 */ #define PHYS_FLASH_20x0200 /* Flash Bank #2 */ +#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 This is always 0 ... that's why it's defined in common place. #define CONFIG_SYS_FLASH_CFI #define CONFIG_FLASH_CFI_DRIVER 1 @@ -207,18 +208,19 @@ #elifdefined(CONFIG_CMD_ONENAND) /* OneNAND */ #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_ONENAND_BASE 0x +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_ONENAND_BASE #define CONFIG_ENV_IS_IN_ONENAND1 #else/* No flash */ #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_ENV_IS_NOWHERE +#define CONFIG_SYS_MONITOR_BASE 0x00 #endif -#define CONFIG_SYS_MONITOR_BASE 0x00 #define CONFIG_SYS_MONITOR_LEN 0x4 -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_LEN) -#define CONFIG_ENV_SECT_SIZE 0x4 +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_SECT_SIZE 0x2 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) Please rebase the patch on top of for-wd-master. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 06/11] arm/pxa: remove CONFIG_ENV_OVERWRITE from vpac270 config
Dne Čt 26. srpna 2010 12:48:01 Mikhail Kshevetskiy napsal(a): it is not required and not recommended. If CONFIG_ENV_OVERWRITE is #defined in your config file, the write protection for vendor parameters is completely disabled. Anybody can change or delete these parameters. I think that's ok. Anyone can remove it before deploying the real product. Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h |2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index d3e805a..c8663e8 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -40,8 +40,6 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) #define CONFIG_SYS_GBL_DATA_SIZE128 -#define CONFIG_ENV_OVERWRITE/* override default environment */ - #define CONFIG_BOOTCOMMAND \ if mmc init fatload mmc 0 0xa400 uImage; then \ bootm 0xa400; \ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 07/11] arm/pxa: decrease environment size and stack size for vpac270
Dne Čt 26. srpna 2010 12:48:02 Mikhail Kshevetskiy napsal(a): it looks like 4Kb for environment and 64Kb for stack is sufficient Wolfgang, what's your opinion? Thanks Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index c8663e8..98faf9a 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -36,7 +36,7 @@ /* * Environment settings */ -#define CONFIG_ENV_SIZE 0x4000 +#define CONFIG_ENV_SIZE (4 * 1024) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) #define CONFIG_SYS_GBL_DATA_SIZE128 @@ -157,7 +157,7 @@ * * The stack sizes are set up in start.S using the settings below */ -#define CONFIG_STACKSIZE(128*1024) /* regular stack */ +#define CONFIG_STACKSIZE(64*1024) /* regular stack */ #ifdef CONFIG_USE_IRQ #define CONFIG_STACKSIZE_IRQ(4*1024)/* IRQ stack */ #define CONFIG_STACKSIZE_FIQ(4*1024)/* FIQ stack */ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/11] arm/pxa: increase CONFIG_SYS_MALLOC_LEN to (196Kb + space for environment)
Dne Čt 26. srpna 2010 12:48:03 Mikhail Kshevetskiy napsal(a): it looks like u-boot allocates a buffer of CONFIG_ENV_SECT_SIZE size when making saveenv command. In our case CONFIG_ENV_SECT_SIZE is 128Kb, so having CONFIG_SYS_MALLOC_LEN = (128Kb + space for environment) is not sufficient. Increase CONFIG_SYS_MALLOC_LEN to (196Kb + space for environment) to resolve a problem. You probably hit this because you changed the ENV size. Wolfgang, can you please comment on this one too? Thanks Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index 98faf9a..ddb3e0e 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -37,7 +37,7 @@ * Environment settings */ #define CONFIG_ENV_SIZE (4 * 1024) -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 196*1024) #define CONFIG_SYS_GBL_DATA_SIZE128 #define CONFIG_BOOTCOMMAND \ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 09/11] arm/pxa: fix number of cfi flashes in vpac270
Dne Čt 26. srpna 2010 12:55:44 Mikhail Kshevetskiy napsal(a):
This board have only one CFI flash actually, so fix it in config.
PS: This patch should not go upstream at this point as it specific
to my revision of voipac
This is a PRO module, right? I got my hands on one and support for it is in for-
wd-master ... make vpac270_nor_128M_config .
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com
---
include/configs/vpac270.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h
index ddb3e0e..c92eb40 100644
--- a/include/configs/vpac270.h
+++ b/include/configs/vpac270.h
@@ -192,8 +192,8 @@
#define CONFIG_FLASH_CFI_DRIVER 1
#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255)
-#define CONFIG_SYS_MAX_FLASH_BANKS 2
-#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
#define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ)
#define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ)
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Re: [U-Boot] [PATCH 10/11] arm/pxa: fix sdram memory layout for vpac270
Dne Čt 26. srpna 2010 12:55:45 Mikhail Kshevetskiy napsal(a): The board have only 128 Mb of memory and only two first memory banks are used. Also remove unneeded CONFIG_SYS_DRAM_SIZE constant and set default load address to be in sdram. PS: This patch should not go upstream at this point as it specific to my revision of voipac See my comment on previous patch. Does it work for you? Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h | 17 ++--- 1 files changed, 10 insertions(+), 7 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index c92eb40..b04d1e8 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -166,19 +166,22 @@ /* * DRAM Map */ -#define CONFIG_NR_DRAM_BANKS2 /* We have 2 banks of DRAM */ -#define PHYS_SDRAM_10xa000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x0800 /* 128 MB */ -#define PHYS_SDRAM_20x8000 /* SDRAM Bank #2 */ -#define PHYS_SDRAM_2_SIZE 0x0800 /* 128 MB */ +#define CONFIG_NR_DRAM_BANKS4 /* We have 2 banks of DRAM */ +#define PHYS_SDRAM_1 0xa000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE0x0400 /* 64 MB */ +#define PHYS_SDRAM_2 0xa400 /* SDRAM Bank #2 */ +#define PHYS_SDRAM_2_SIZE0x0400 /* 64 MB */ +#define PHYS_SDRAM_3 0xa800 /* SDRAM Bank #3 */ +#define PHYS_SDRAM_3_SIZE0x /* 0 MB */ +#define PHYS_SDRAM_4 0xac00 /* SDRAM Bank #4 */ +#define PHYS_SDRAM_4_SIZE0x /* 0 MB */ #define CONFIG_SYS_DRAM_BASE0xa000 /* CS0 */ -#define CONFIG_SYS_DRAM_SIZE0x1000 /* 256 MB DRAM */ #define CONFIG_SYS_MEMTEST_START 0xa040 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa080 /* 4 ... 8 MB in DRAM */ -#define CONFIG_SYS_LOAD_ADDR(0x5c00) +#define CONFIG_SYS_LOAD_ADDR0xa000 /* * NOR FLASH ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Orion5x: Correct DRAM bank detection
This code was referencing the wrong register, and only
happened to work because the DRAM on both users of this
code happened to be a single bank located at address 0.
Signed-off-by: Rogan Dawes ro...@dawes.za.net
---
Prafulla, according to Albert, this code was copied from
the Kirkwood code, and may be incorrect there too.
Rogan
arch/arm/cpu/arm926ejs/orion5x/dram.c |2 +-
arch/arm/include/asm/arch-orion5x/orion5x.h |1 +
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c
b/arch/arm/cpu/arm926ejs/orion5x/dram.c
index c719798..90b0a9c 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/dram.c
+++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c
@@ -38,7 +38,7 @@ u32 orion5x_sdram_bar(enum memory_bank bank)
{
struct orion5x_ddr_addr_decode_registers *winregs =
(struct orion5x_ddr_addr_decode_registers *)
- ORION5X_CPU_WIN_BASE;
+ ORION5X_DRAM_BASE;
u32 result = 0;
u32 enable = 0x01 winregs[bank].size;
diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h
b/arch/arm/include/asm/arch-orion5x/orion5x.h
index e3d3f76..1dd9f65 100644
--- a/arch/arm/include/asm/arch-orion5x/orion5x.h
+++ b/arch/arm/include/asm/arch-orion5x/orion5x.h
@@ -42,6 +42,7 @@
#define ORION5X_REGISTER(x)(ORION5X_REGS_PHY_BASE + x)
/* Documented registers */
+#define ORION5X_DRAM_BASE (ORION5X_REGISTER(0x01500))
#define ORION5X_TWSI_BASE (ORION5X_REGISTER(0x11000))
#define ORION5X_UART0_BASE (ORION5X_REGISTER(0x12000))
#define ORION5X_UART1_BASE (ORION5X_REGISTER(0x12100))
--
1.7.1
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Re: [U-Boot] [PATCH 2/4] net: Move Emaclite to NET_MULTI
Michal Simek wrote: Emaclite was using old net api that's why this patch move emaclite to NET_MULTI api. Signed-off-by: Michal Simek mon...@monstr.eu Ben: any comment on this patch? Thanks, Michal -- Michal Simek, Ing. (M.Eng) w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/ Microblaze U-BOOT custodian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] net: Add LL TEMAC driver to u-boot
Michal Simek wrote: Add Xilinx LL Temac driver to u-boot. Signed-off-by: Michal Simek mon...@monstr.eu Ben: any comment on this patch? Thanks, Michal -- Michal Simek, Ing. (M.Eng) w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/ Microblaze U-BOOT custodian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 11/11] arm/pxa: fix and cleanup of pxa_mem_setup macro v2
Dne Čt 26. srpna 2010 12:55:46 Mikhail Kshevetskiy napsal(a): WARNING: This macro do not assume the values for K0DB4, KxDB2, KxFREE, K1RUN, K2RUN and APD bits of CONFIG_SYS_MDREFR_VAL as it was done early on many pxa platforms. All pxa developers that plan to use this macro should check the validity of their MDREFR values. That's a given they should supply correct value, really ... Eric, Haojian, can one of you please look into this? The original file's here: http://git.denx.de/?p=u-boot/u-boot-pxa.git;a=blob;f=arch/arm/include/asm/arch- pxa/macro.h;h=035a57e0af10696b202b6cfc75fd2c6e1e47c83e;hb=refs/heads/for-wd- master Thanks v1: * strict following to section 6.4.10 of Intel PXA27xx Developer's Manual. * use r7 to store CONFIG_SYS_MDREFR_VAL as r6 is used in pxa_wait_ticks. v2: * rename pxa_mem_setup macro to pxa2xx_mem_setup * setting of MDREFR[K1RUN] and MDREFR[K2RUN] bits may be optional * skip certain configuration steps if SDRAM is not present/configured * improve/fix comments PS: This patch should not go upstream at this point as it require more work. Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- arch/arm/include/asm/arch-pxa/macro.h | 78 +--- board/vpac270/lowlevel_init.S | 2 +- 2 files changed, 52 insertions(+), 28 deletions(-) diff --git a/arch/arm/include/asm/arch-pxa/macro.h b/arch/arm/include/asm/arch-pxa/macro.h index 035a57e..468482a 100644 --- a/arch/arm/include/asm/arch-pxa/macro.h +++ b/arch/arm/include/asm/arch-pxa/macro.h @@ -102,11 +102,15 @@ /* * This macro sets up the Memory controller of the PXA2xx CPU * - * Clobbered regs: r3, r4, r5 + * Clobbered regs: r3, r4, r5, r6, r7 + * + * See section 6.4.10 of Intel PXA2xx Processor Developer's Manual + * http://www.marvell.com/products/processors/applications/pxa_family/pxa_27x This might change as I know Marvell webdudes ... _dev_man.pdf */ -.macro pxa_mem_setup +.macro pxa2xx_mem_setup Please avoid renaming the macro, you're gonna break other platforms /* This comes handy when setting MDREFR */ ldr r3, =MEMC_BASE + ldr r7, =CONFIG_SYS_MDREFR_VAL Just push this below ... /* * 1) Initialize Asynchronous static memory controller @@ -149,51 +153,66 @@ */ /* - * Before accessing MDREFR we need a valid DRI field, so we set - * this to power on defaults + DRI field. + * Before accessing MDREFR we need a valid DRI field. + * Also we must properly configure MDREFR[K0DB2] and MDREFR[K0DB4]. + * Optionaly we can set MDREFR[KxFREE] bits. + * So we set MDREFR to power on defaults + (DRI, K0DB2, K0DB4, KxFREE) + * fields from the config. + * + * WARNING: K0DB2 and K0DB4 bits are usually set, while KxFREE bits + * are usually unset. */ ldr r5, [r3, #MDREFR_OFFSET] - bic r5, r5, #0x0ff - bic r5, r5, #0xf00 /* MDREFR user config with zeroed DRI */ - - ldr r4, =CONFIG_SYS_MDREFR_VAL - mov r6, r4 - lsl r4, #20 - lsr r4, #20 /* Get a valid DRI field */ - - orr r5, r5, r4 /* MDREFR user config with correct DRI */ + ldr r4, =( 0xFFF | MDREFR_K0DB4 | MDREFR_K0DB2 | \ +MDREFR_K0FREE | MDREFR_K1FREE | MDREFR_K2FREE ) + bic r5, r5, r4 /* clear DRI, K0DB2, K0DB4, KxFREE fields */ + and r4, r7, r4 + orr r5, r5, r4 /* use custom DRI, K0DB2, K0DB4, KxFREE */ Won't this cause trouble on pxa25x and 26x? Really, that's why I'd rather assume the user isn't moron and will supply the correct MDREFR value. orr r5, #MDREFR_K0RUN orr r5, #MDREFR_SLFRSH bic r5, #MDREFR_APD - bic r5, #MDREFR_E1PIN + + /* enable them later, if SDRAM is present */ + bic r5, #( MDREFR_E1PIN | MDREFR_K1RUN | MDREFR_K2RUN | \ + MDREFR_K1DB2 | MDREFR_K2DB2 ) str r5, [r3, #MDREFR_OFFSET] - ldr r4, [r3, #MDREFR_OFFSET] + ldr r5, [r3, #MDREFR_OFFSET] /* * 5) Initialize Synchronous Static Memory (Flash/Peripherals) */ - /* Initialize SXCNFG register. Assert the enable bits. - * - * Write SXMRS to cause an MRS command to all enabled banks of - * synchronous static memory. Note that SXLCR need not be written - * at this time. + /* Initialize SXCNFG register to enable synchronous flash memory. + * While the synchronous flash banks are being configured, the SDRAM + * banks must be disabled and MDREFR[APD] must be de-asserted. */ write32rb (MEMC_BASE + SXCNFG_OFFSET), CONFIG_SYS_SXCNFG_VAL /* - * 6) Initialize SDRAM + * 6) Initialize SDRAM, + *If SDRAM present, then MDREFR[K1RUN] and/or
Re: [U-Boot] TFTP timeout issue while downloading the linux kernel in openpxa vpac270 u-boot source code
Dne St 25. srpna 2010 11:03:30 StephenPaulraj Chinnadurai-ERS,HCLTech napsal(a): Hello Marek, I increased the memory clock speed from 104 MHz to 208 MHz in the PXA270 controller by including the following lines of in the .macro pxa_clock_setup (macro.h file) ldr r0, =0x8 mcr p14, 0, r0, c6, c0, 0 After increasing the memory clock speed, I can download the zImage (2.8MB) through tftp without any timeout. Your memory seems misconfigured. Can you run mtest on it ? But I can't download system.img (android system image file of 55MB) into the SDRAM. Our customize board has LAN91C111Ii-NU controller connected to the static memory 4 (nCS4) of PXA270, and uses 32 bit connection. Below are my observations while using tftpboot command: Observation 1: Exactly after downloading 3498200 bytes the first timeout is occurring, sometimes it is recovering and most of the times it is not recovering, and Retry count exceeded message is displayed. MDT-Boot tftp a130 SMC9: MAC 00:00:70:26:1e:01 TFTP blocksize = 1468, timeout = 5 s Using SMC9-0 device TFTP from server 10.100.144.245; our IP address is 10.100.144.90 Filename ''. Load address: 0xa130 Loading: * # # # ###T ## # done Bytes transferred = 400 (3d0900 hex) MDT-Boot SMC9: MAC 00:00:70:26:1e:01 TFTP blocksize = 1468, timeout = 5 s Using SMC9-0 device TFTP from server 10.100.144.245; our IP address is 10.100.144.90 Filename ''. Load address: 0xa130 Loading: * # # # ##T ## done Observation 2: I analyzed the reason for continues timeout and found that the LAN91c fifo is full, some 44 byte, 48 byte, 60 byte, 78 byte packet are filling the fifo. PXA270 customize board is connected to our company network. Got IP len=78, v=45 packet received packet received Receive from protocol 0x800 Got IP len=44, v=45 packet received packet received Receive from protocol 0x0 packet received packet received Receive from protocol 0x800 Got IP len=60, v=45 packet received packet received Receive from protocol 0x800 Got IP len=60, v=45 packet received packet received Receive from protocol 0x800 Got IP len=48, v=45 packet received packet received Receive from protocol 0x800 Got IP len=48, v=45 packet received packet received Receive from protocol 0x806 Observation 3: I splited the 55 MB system.img file to 9 MB each and then tried to download it through tftp. I found I can able to download 9 MB files with one or two timeouts. MDT-Boot tftp a130 SMC9: MAC 00:00:70:26:1e:01 TFTP blocksize = 1468, timeout = 5 s Using SMC9-0 device TFTP from server 10.100.144.245; our IP address is 10.100.144.90 Filename ''. Load address: 0xa130 Loading: * # # # ###T ## # # # # # # done Bytes transferred = 900 (895440 hex) Why I can't download the 50 MB files into the SDRAM through tftp? Is that I need to still look into the cpu register configuration? Whether I need to look and debug the net.c and tftp.c? But the same files net.c and tftp.c which is working fine in the Littleton board. How to stop the 44 byte, 48 byte, 60 byte and 78 byte packets entering into the LAN91C controller? Is there any way to filter those packets. What is the reason for the first timeout after downloading exactly 3498200 bytes through tftp? Kindly help to solve this problem. Kindly suggest some ways, so that I will debug the source code. Thanks and Regards Stephen Paulraj C -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Marek Vasut Sent:
Re: [U-Boot] [PATCH] IDE: Don't assume there are always two devices per bus
On 2010/08/16 7:47 AM, Rogan Dawes wrote: From: Rogan Dawes ro...@dawes.za.net Some SATA controllers can operate in an IDE compatible mode (e.g. mvsata) but will only ever have a single device per bus. This allows the upcoming DNS323 port to properly identify and use a drive on both SATA interfaces. --- include/ide.h |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/include/ide.h b/include/ide.h index 6a1b7ae..c812b28 100644 --- a/include/ide.h +++ b/include/ide.h @@ -24,7 +24,8 @@ #ifndef _IDE_H #define _IDE_H -#define IDE_BUS(dev)(dev 1) +#define IDE_BUS(dev)(dev ((CONFIG_SYS_IDE_MAXDEVICE / \ + CONFIG_SYS_IDE_MAXBUS) - 1)) #define ATA_CURR_BASE(dev) (CONFIG_SYS_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)]) Anything wrong with this patch? Regards, Rogan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] TFTP timeout issue while downloading the linux kernel in openpxa vpac270 u-boot source code
-Original Message- From: Marek Vasut [mailto:marek.va...@gmail.com] Sent: Thursday, August 26, 2010 5:56 PM To: StephenPaulraj Chinnadurai-ERS,HCLTech Cc: u-boot@lists.denx.de; Wolfgang Denk Subject: Re: [U-Boot] TFTP timeout issue while downloading the linux kernel in openpxa vpac270 u-boot source code Dne St 25. srpna 2010 11:03:30 StephenPaulraj Chinnadurai-ERS,HCLTech napsal(a): Hello Marek, I increased the memory clock speed from 104 MHz to 208 MHz in the PXA270 controller by including the following lines of in the .macro pxa_clock_setup (macro.h file) ldr r0, =0x8 mcr p14, 0, r0, c6, c0, 0 After increasing the memory clock speed, I can download the zImage (2.8MB) through tftp without any timeout. Your memory seems misconfigured. Can you run mtest on it ? I executed the mtest command and waited for an hour, u-boot doesn't displayed any error. The memory start and end address is defined as follow in the include/configs/myboard.h file. #define CONFIG_SYS_MEMTEST_START0xa040 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa080 /* 4 ... 8 MB in DRAM */ #define CONFIG_SYS_LOAD_ADDR(0xa100) Pattern 04BF Writing...Reading... Pattern FB40 Writing...Reading... Pattern 04C0 Writing...Reading... Pattern FB3F Writing...Reading... Pattern 04C1 Writing...Reading... But I can't download system.img (android system image file of 55MB) into the SDRAM. Our customize board has LAN91C111Ii-NU controller connected to the static memory 4 (nCS4) of PXA270, and uses 32 bit connection. Below are my observations while using tftpboot command: Observation 1: Exactly after downloading 3498200 bytes the first timeout is occurring, sometimes it is recovering and most of the times it is not recovering, and Retry count exceeded message is displayed. MDT-Boot tftp a130 SMC9: MAC 00:00:70:26:1e:01 TFTP blocksize = 1468, timeout = 5 s Using SMC9-0 device TFTP from server 10.100.144.245; our IP address is 10.100.144.90 Filename ''. Load address: 0xa130 Loading: * # # # ###T ## # done Bytes transferred = 400 (3d0900 hex) MDT-Boot SMC9: MAC 00:00:70:26:1e:01 TFTP blocksize = 1468, timeout = 5 s Using SMC9-0 device TFTP from server 10.100.144.245; our IP address is 10.100.144.90 Filename ''. Load address: 0xa130 Loading: * # # # ##T ## done Observation 2: I analyzed the reason for continues timeout and found that the LAN91c fifo is full, some 44 byte, 48 byte, 60 byte, 78 byte packet are filling the fifo. PXA270 customize board is connected to our company network. Got IP len=78, v=45 packet received packet received Receive from protocol 0x800 Got IP len=44, v=45 packet received packet received Receive from protocol 0x0 packet received packet received Receive from protocol 0x800 Got IP len=60, v=45 packet received packet received Receive from protocol 0x800 Got IP len=60, v=45 packet received packet received Receive from protocol 0x800 Got IP len=48, v=45 packet received packet received Receive from protocol 0x800 Got IP len=48, v=45 packet received packet received Receive from protocol 0x806 Observation 3: I splited the 55 MB system.img file to 9 MB each and then tried to download it through tftp. I found I can able to download 9 MB files with one or two timeouts. MDT-Boot tftp a130 SMC9: MAC 00:00:70:26:1e:01 TFTP blocksize = 1468, timeout = 5 s Using SMC9-0 device TFTP from server 10.100.144.245; our IP address is 10.100.144.90 Filename ''. Load address: 0xa130 Loading: * # # # ###T ## # # #
[U-Boot] [PATCH] ppc4xx: Fix 440EPx bug in reconfigure_pll()
This patch fixes a bug in reconfigure_pll(), where the detection of
the current bootstrap option is wrong. The ICS bits where incorrectly
shifted. This bug was found on the lwmon5 board, which uses bootstrap
option H (I2C bootstrap EEPROM).
Additionally a bit of code was moved into the if statement, since its
only used after later on. No need to run this code all the time.
Also, a few empty lines are added to make the code better readable.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Rupjyoti Sarmah rsar...@amcc.com
Cc: Victor Gallardo vgalla...@appliedmicro.com
---
arch/powerpc/cpu/ppc4xx/cpu_init.c | 27 ++-
include/ppc440.h |1 +
2 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index c04eede..b31bd0b 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -142,22 +142,28 @@ void reconfigure_pll(u32 new_cpu_freq)
* modify it.
*/
if (temp == 1) {
- mfcpr(CPR0_PLLD, reg);
- /* Get current value of fbdv. */
- temp = (reg PLLD_FBDV_MASK) 24;
- fbdv = temp ? temp : 32;
- /* Get current value of lfbdv. */
- temp = (reg PLLD_LFBDV_MASK);
- lfbdv = temp ? temp : 64;
/*
* Load register that contains current boot strapping option.
*/
mfcpr(CPR0_ICFG, reg);
- /* Shift strapping option into low 3 bits.*/
- reg = (reg 28);
+ /*
+* Strapping option bits (ICS) are already in correct position,
+* only masking needed.
+*/
+ reg = CPR0_ICFG_ICS_MASK;
if ((reg == BOOT_STRAP_OPTION_A) || (reg ==
BOOT_STRAP_OPTION_B) ||
(reg == BOOT_STRAP_OPTION_D) || (reg ==
BOOT_STRAP_OPTION_E)) {
+ mfcpr(CPR0_PLLD, reg);
+
+ /* Get current value of fbdv. */
+ temp = (reg PLLD_FBDV_MASK) 24;
+ fbdv = temp ? temp : 32;
+
+ /* Get current value of lfbdv. */
+ temp = (reg PLLD_LFBDV_MASK);
+ lfbdv = temp ? temp : 64;
+
/*
* Get current value of FWDVA. Assign current FWDVA to
* new FWDVB.
@@ -165,12 +171,14 @@ void reconfigure_pll(u32 new_cpu_freq)
mfcpr(CPR0_PLLD, reg);
target_fwdvb = (reg PLLD_FWDVA_MASK) 16;
fwdvb = target_fwdvb ? target_fwdvb : 8;
+
/*
* Get current value of FWDVB. Assign current FWDVB to
* new FWDVA.
*/
target_fwdva = (reg PLLD_FWDVB_MASK) 8;
fwdva = target_fwdva ? target_fwdva : 16;
+
/*
* Update CPR0_PLLD with switched FWDVA and FWDVB.
*/
@@ -181,6 +189,7 @@ void reconfigure_pll(u32 new_cpu_freq)
((fbdv == 32 ? 0 : fbdv) 24) |
(lfbdv == 64 ? 0 : lfbdv);
mtcpr(CPR0_PLLD, reg);
+
/* Acknowledge that a reset is required. */
reset_needed = 1;
}
diff --git a/include/ppc440.h b/include/ppc440.h
index c807dda..6727753 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -1711,6 +1711,7 @@
#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
#define CPR0_ICFG_RLI_MASK 0x8000
+#define CPR0_ICFG_ICS_MASK 0x0007
#define CPR0_SPCID_SPCIDV0_MASK0x0300
#define CPR0_SPCID_SPCIDV0_DIV10x0100
#define CPR0_SPCID_SPCIDV0_DIV20x0200
--
1.7.2.2
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Re: [U-Boot] TFTP timeout issue while downloading the linux kernel in openpxa vpac270 u-boot source code
Dne Čt 26. srpna 2010 17:06:08 StephenPaulraj Chinnadurai-ERS,HCLTech napsal(a): -Original Message- From: Marek Vasut [mailto:marek.va...@gmail.com] Sent: Thursday, August 26, 2010 5:56 PM To: StephenPaulraj Chinnadurai-ERS,HCLTech Cc: u-boot@lists.denx.de; Wolfgang Denk Subject: Re: [U-Boot] TFTP timeout issue while downloading the linux kernel in openpxa vpac270 u-boot source code Dne St 25. srpna 2010 11:03:30 StephenPaulraj Chinnadurai-ERS,HCLTech napsal(a): Hello Marek, I increased the memory clock speed from 104 MHz to 208 MHz in the PXA270 controller by including the following lines of in the .macro pxa_clock_setup (macro.h file) ldr r0, =0x8 mcr p14, 0, r0, c6, c0, 0 After increasing the memory clock speed, I can download the zImage (2.8MB) through tftp without any timeout. Your memory seems misconfigured. Can you run mtest on it ? I executed the mtest command and waited for an hour, u-boot doesn't displayed any error. The memory start and end address is defined as follow in the include/configs/myboard.h file. #define CONFIG_SYS_MEMTEST_START0xa040 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa080 /* 4 ... 8 MB in DRAM */ #define CONFIG_SYS_LOAD_ADDR(0xa100) Pattern 04BF Writing...Reading... Pattern FB40 Writing...Reading... Pattern 04C0 Writing...Reading... Pattern FB3F Writing...Reading... Pattern 04C1 Writing...Reading... Test some bigger area then ... at best the one where you're downloading the image. But I can't download system.img (android system image file of 55MB) into the SDRAM. Our customize board has LAN91C111Ii-NU controller connected to the static memory 4 (nCS4) of PXA270, and uses 32 bit connection. Below are my observations while using tftpboot command: Observation 1: Exactly after downloading 3498200 bytes the first timeout is occurring, sometimes it is recovering and most of the times it is not recovering, and Retry count exceeded message is displayed. MDT-Boot tftp a130 SMC9: MAC 00:00:70:26:1e:01 TFTP blocksize = 1468, timeout = 5 s Using SMC9-0 device TFTP from server 10.100.144.245; our IP address is 10.100.144.90 Filename ''. Load address: 0xa130 Loading: * # # # ###T ## # done Bytes transferred = 400 (3d0900 hex) MDT-Boot SMC9: MAC 00:00:70:26:1e:01 TFTP blocksize = 1468, timeout = 5 s Using SMC9-0 device TFTP from server 10.100.144.245; our IP address is 10.100.144.90 Filename ''. Load address: 0xa130 Loading: * # # # ##T ## done Observation 2: I analyzed the reason for continues timeout and found that the LAN91c fifo is full, some 44 byte, 48 byte, 60 byte, 78 byte packet are filling the fifo. PXA270 customize board is connected to our company network. Got IP len=78, v=45 packet received packet received Receive from protocol 0x800 Got IP len=44, v=45 packet received packet received Receive from protocol 0x0 packet received packet received Receive from protocol 0x800 Got IP len=60, v=45 packet received packet received Receive from protocol 0x800 Got IP len=60, v=45 packet received packet received Receive from protocol 0x800 Got IP len=48, v=45 packet received packet received Receive from protocol 0x800 Got IP len=48, v=45 packet received packet received Receive from protocol 0x806 Observation 3: I splited the 55 MB system.img file to 9 MB each and then tried to download it through tftp. I found I can able to download 9 MB files with one or two timeouts. MDT-Boot tftp a130 SMC9: MAC 00:00:70:26:1e:01 TFTP blocksize = 1468, timeout = 5 s Using SMC9-0 device TFTP from server 10.100.144.245; our IP address is 10.100.144.90 Filename ''. Load address: 0xa130 Loading: * # #
Re: [U-Boot] [PATCH] ppc4xx: Fix 440EPx bug in reconfigure_pll()
Hi Stefan, This patch fixes a bug in reconfigure_pll(), where the detection of the current bootstrap option is wrong. The ICS bits where incorrectly shifted. This bug was found on the lwmon5 board, which uses bootstrap option H (I2C bootstrap EEPROM). Additionally a bit of code was moved into the if statement, since its only used after later on. No need to run this code all the time. Also, a few empty lines are added to make the code better readable. Look good to me. -Victor Gallardo ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/4] mtdparts: show net size in mtdparts list
On Mon, Aug 09, 2010 at 04:43:58PM -0400, Ben Gardiner wrote:
diff --git a/common/cmd_mtdparts.c b/common/cmd_mtdparts.c
index 772ad54..500a38e 100644
--- a/common/cmd_mtdparts.c
+++ b/common/cmd_mtdparts.c
@@ -1215,18 +1215,65 @@ static int generate_mtdparts_save(char *buf, u32
buflen)
return ret;
}
+#if defined(CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES)
/**
- * Format and print out a partition list for each device from global device
- * list.
+ * Get the net size (w/o bad blocks) of the given partition.
+ *
+ * @param mtd the mtd info
+ * @param part the partition
+ * @return the calculated net size of this partition
*/
-static void list_partitions(void)
+static u32 net_part_size(struct mtd_info *mtd, struct part_info *part)
Don't assume partition size fits in 32 bits. part-size is uint64_t.
+{
+ if (mtd-block_isbad) {
+ u32 i, bb_delta = 0;
+
+ for (i = 0; i part-size; i += mtd-erasesize) {
+ if (mtd-block_isbad(mtd, part-offset + i))
+ bb_delta += mtd-erasesize;
+ }
+
+ return part-size - bb_delta;
Seems like it'd be slightly simpler to just count up the good blocks,
rather than count the bad blocks and subtract.
+ } else {
+ return part-size;
+ }
It's usually more readable to do this:
if (can't do this)
return;
do this;
than this
if (can do this)
do this;
else
don't;
When do this is more than a line or two, and there's nothing else to be
done in the function afterward.
+}
+#endif
+
+static void print_partition_table(void)
{
struct list_head *dentry, *pentry;
struct part_info *part;
struct mtd_device *dev;
int part_num;
- debug(\n---list_partitions---\n);
+#if defined(CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES)
+ list_for_each(dentry, devices) {
+ struct mtd_info *mtd;
+
+ dev = list_entry(dentry, struct mtd_device, link);
+ printf(\ndevice %s%d %s, # parts = %d\n,
+ MTD_DEV_TYPE(dev-id-type), dev-id-num,
+ dev-id-mtd_id, dev-num_parts);
+ printf( #: name\t\tsize\t\tnet size\toffset\t\tmask_flags\n);
+
+ if (get_mtd_info(dev-id-type, dev-id-num, mtd))
+ return;
+
+ /* list partitions for given device */
+ part_num = 0;
+ list_for_each(pentry, dev-parts) {
+ u32 net_size;
+ char *size_note;
+
+ part = list_entry(pentry, struct part_info, link);
+ net_size = net_part_size(mtd, part);
+ size_note = part-size == net_size ? : (!);
+ printf(%2d: %-20s0x%08x\t0x%08x%s\t0x%08x\t%d\n,
+ part_num, part-name, part-size,
+ net_size, size_note, part-offset,
+ part-mask_flags);
+#else /* !defined(CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES) */
list_for_each(dentry, devices) {
dev = list_entry(dentry, struct mtd_device, link);
printf(\ndevice %s%d %s, # parts = %d\n,
@@ -1241,12 +1288,25 @@ static void list_partitions(void)
printf(%2d: %-20s0x%08x\t0x%08x\t%d\n,
part_num, part-name, part-size,
part-offset, part-mask_flags);
-
+#endif /* defined(CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES) */
Is there any way you could share more of this between the two branches?
-Scott
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[U-Boot] [PATCH 6/8] arm/pxa: increase CONFIG_SYS_MALLOC_LEN to (196Kb + space for environment) (v.2)
it looks like u-boot allocates a buffer of CONFIG_ENV_SECT_SIZE size when making saveenv command. In our case CONFIG_ENV_SECT_SIZE is 128Kb, so having CONFIG_SYS_MALLOC_LEN = 128Kb is not sufficient. Increase CONFIG_SYS_MALLOC_LEN to (196Kb + space for environment) to resolve a problem. v2: rebased against for-wd-master branch Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index bd1b0f6..3ca25bf 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -32,7 +32,7 @@ * Environment settings */ #defineCONFIG_ENV_OVERWRITE -#defineCONFIG_SYS_MALLOC_LEN (128*1024) +#defineCONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 196*1024) #defineCONFIG_SYS_GBL_DATA_SIZE128 #defineCONFIG_BOOTCOMMAND \ -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/8] arm/pxa: fix environment sector size, kernel and environment location for vpac270 (v.2)
Define ENV_ADDR as MONITOR_BASE + MONITOR_LEN. Fix environment sector size (NOR: 32Kb for first four sectors and 128Kb for other; OneNAND: 128Kb). Last but not least: we have MONITOR_LEN = 0x4 and one sector for environment (size = 0x2), so the kernel may start from 0x0006 only. v2: rebased against for-wd-master branch Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h | 11 --- 1 files changed, 8 insertions(+), 3 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index eb2dc93..c81d567 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -45,7 +45,7 @@ if ide reset fatload ide 0 0xa400 uImage; then \ bootm 0xa400; \ fi; \ - bootm 0x4; + bootm 0x6; #defineCONFIG_BOOTARGS console=tty0 console=ttyS0,115200 #defineCONFIG_TIMESTAMP #defineCONFIG_BOOTDELAY2 /* Autoboot delay */ @@ -214,7 +214,12 @@ #defineCONFIG_SYS_FLASH_PROTECTION 1 #defineCONFIG_ENV_IS_IN_FLASH 1 -#defineCONFIG_ENV_SECT_SIZE0x4000 + +/* + * if (CONFIG_SYS_MONITOR_LEN = 0x18000) CONFIG_ENV_SECT_SIZE = 0x8000; + * else CONFIG_ENV_SECT_SIZE = 0x2 + */ +#defineCONFIG_ENV_SECT_SIZE0x2 #elif defined(CONFIG_CMD_ONENAND) /* OneNAND */ #defineCONFIG_SYS_NO_FLASH @@ -231,7 +236,7 @@ #defineCONFIG_SYS_MONITOR_BASE 0x0 #defineCONFIG_SYS_MONITOR_LEN 0x4 -#defineCONFIG_ENV_ADDR 0x4 +#defineCONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) #defineCONFIG_ENV_SIZE 0x4000 /* -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/8] (RESEND) arm/pxa: enable stuart/btuart for vpac270
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com
---
include/configs/vpac270.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h
index 694a8f9..1e4d4c5 100644
--- a/include/configs/vpac270.h
+++ b/include/configs/vpac270.h
@@ -58,7 +58,10 @@
* Serial Console Configuration
*/
#defineCONFIG_PXA_SERIAL
+#defineCONFIG_SERIAL_MULTI
#defineCONFIG_FFUART 1
+#defineCONFIG_STUART 1
+#defineCONFIG_BTUART 1
#defineCONFIG_BAUDRATE 115200
#defineCONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600,
115200 }
--
1.7.1
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[U-Boot] [PATCH 7/8] arm/pxa: fix MDREFR[APD] bit setting
pxa_mem_setup macro use r6 to store CONFIG_SYS_MDREFR_VAL during memory initialization. This reg is modified during execution of pxa_wait_ticks. Later we use r6 to setup MDREFR[APD] bit. As result MDREFR[APD] is always zero. Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- arch/arm/include/asm/arch-pxa/macro.h | 20 1 files changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/arm/include/asm/arch-pxa/macro.h b/arch/arm/include/asm/arch-pxa/macro.h index 035a57e..5a480fd 100644 --- a/arch/arm/include/asm/arch-pxa/macro.h +++ b/arch/arm/include/asm/arch-pxa/macro.h @@ -102,7 +102,11 @@ /* * This macro sets up the Memory controller of the PXA2xx CPU * - * Clobbered regs: r3, r4, r5 + * WARNING: This macro uses internally r3 and r7 regs for MEMC_BASE + * and CONFIG_SYS_MDREFR_VAL correspondingly. Please do not + * use this regs for other purpose inside this macro. + * + * Clobbered regs: r3, r4, r5, r6, r7 */ .macro pxa_mem_setup /* This comes handy when setting MDREFR */ @@ -157,7 +161,7 @@ bic r5, r5, #0xf00 /* MDREFR user config with zeroed DRI */ ldr r4, =CONFIG_SYS_MDREFR_VAL - mov r6, r4 + mov r7, r4 lsl r4, #20 lsr r4, #20 /* Get a valid DRI field */ @@ -187,12 +191,12 @@ * 6) Initialize SDRAM */ - bic r6, #MDREFR_SLFRSH - str r6, [r3, #MDREFR_OFFSET] + bic r7, #MDREFR_SLFRSH + str r7, [r3, #MDREFR_OFFSET] ldr r4, [r3, #MDREFR_OFFSET] - orr r6, #MDREFR_E1PIN - str r6, [r3, #MDREFR_OFFSET] + orr r7, #MDREFR_E1PIN + str r7, [r3, #MDREFR_OFFSET] ldr r4, [r3, #MDREFR_OFFSET] /* @@ -250,8 +254,8 @@ */ ldr r4, [r3, #MDREFR_OFFSET] - and r6, r6, #MDREFR_APD - orr r4, r4, r6 + and r7, r7, #MDREFR_APD + orr r4, r4, r7 str r4, [r3, #MDREFR_OFFSET] ldr r4, [r3, #MDREFR_OFFSET] .endm -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/8] arm/pxa: cleanup vpac270 config and set CONFIG_SYS_HZ to 1000 (v.2)
* CONFIG_SYS_CLKS_IN_HZ is not used anywhere, so removing it * CONFIG_SYS_HZ is set to 1000 on most architectures, so it seems to be the safe default v2: rebased against for-wd-master branch Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h |3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index 1e4d4c5..eb2dc93 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -149,8 +149,7 @@ /* * Clock Configuration */ -#undef CONFIG_SYS_CLKS_IN_HZ -#defineCONFIG_SYS_HZ 325 /* Timer @ 325 Hz */ +#defineCONFIG_SYS_HZ 1000/* Timer @ 325 Hz */ #defineCONFIG_SYS_CPUSPEED 0x190 /* 312MHz */ /* -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/8] (RESEND) arm/pxa: remove unused u-boot.lds from board/vpac270
This file is not used, automatically generated u-boot.lds is used instead
Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com
---
board/vpac270/u-boot.lds | 55 --
1 files changed, 0 insertions(+), 55 deletions(-)
delete mode 100644 board/vpac270/u-boot.lds
diff --git a/board/vpac270/u-boot.lds b/board/vpac270/u-boot.lds
deleted file mode 100644
index 58c371d..000
--- a/board/vpac270/u-boot.lds
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT(elf32-littlearm, elf32-littlearm, elf32-littlearm)
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x;
-
- . = ALIGN(4);
- .text :
- {
- cpu/pxa/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(.rodata) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) }
- _end = .;
-}
--
1.7.1
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[U-Boot] [PATCH 5/8] arm/pxa: decrease environment size and stack size for vpac270 (v.2)
it looks like 4Kb for environment and 64Kb for stack is sufficient v2: rebased against for-wd-master branch Signed-off-by: Mikhail Kshevetskiy mikhail.kshevets...@gmail.com --- include/configs/vpac270.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index c81d567..bd1b0f6 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -155,7 +155,7 @@ /* * Stack sizes */ -#defineCONFIG_STACKSIZE(128*1024) /* regular stack */ +#defineCONFIG_STACKSIZE(64*1024) /* regular stack */ #ifdef CONFIG_USE_IRQ #defineCONFIG_STACKSIZE_IRQ(4*1024)/* IRQ stack */ #defineCONFIG_STACKSIZE_FIQ(4*1024)/* FIQ stack */ @@ -237,7 +237,7 @@ #defineCONFIG_SYS_MONITOR_LEN 0x4 #defineCONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) -#defineCONFIG_ENV_SIZE 0x4000 +#defineCONFIG_ENV_SIZE (4 * 1024) /* * IDE -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 8/8] arm/pxa: fix and cleanup of pxa_mem_setup macro (v.3)
WARNING: This macro do not assume the values for K0DB4, KxDB2, KxFREE, K1RUN, K2RUN and APD bits of CONFIG_SYS_MDREFR_VAL as it was done early on many pxa platforms. All pxa developers that plan v1: * strict following to section 6.4.10 of Intel PXA27xx Developer's Manual. * use r7 to store CONFIG_SYS_MDREFR_VAL as r6 is used in pxa_wait_ticks. v2: * rename pxa_mem_setup macro to pxa2xx_mem_setup * setting of MDREFR[K1RUN] and MDREFR[K2RUN] bits may be optional * skip certain configuration steps if SDRAM is not present/configured * improve/fix comments v3: * move fixing of MDREFR[APD] bit setting to separate patch * revert skip certain configuration steps if SDRAM is not present/configured * improve/fix comments PS: This patch is for review only, it should not go upstream at this point. --- arch/arm/include/asm/arch-pxa/macro.h | 84 + 1 files changed, 54 insertions(+), 30 deletions(-) diff --git a/arch/arm/include/asm/arch-pxa/macro.h b/arch/arm/include/asm/arch-pxa/macro.h index 5a480fd..410e90b 100644 --- a/arch/arm/include/asm/arch-pxa/macro.h +++ b/arch/arm/include/asm/arch-pxa/macro.h @@ -107,10 +107,14 @@ * use this regs for other purpose inside this macro. * * Clobbered regs: r3, r4, r5, r6, r7 + * + * See section 6.4.10 of Intel PXA2xx Processor Developer's Manual + * http://www.marvell.com/products/processors/applications/pxa_family/pxa_27x_dev_man.pdf */ .macro pxa_mem_setup /* This comes handy when setting MDREFR */ ldr r3, =MEMC_BASE + ldr r7, =CONFIG_SYS_MDREFR_VAL /* * 1) Initialize Asynchronous static memory controller @@ -153,51 +157,66 @@ */ /* -* Before accessing MDREFR we need a valid DRI field, so we set -* this to power on defaults + DRI field. +* Before accessing MDREFR we need a valid DRI field. +* Also we must properly configure MDREFR[K0DB2] and MDREFR[K0DB4]. +* Optionaly we can set MDREFR[KxFREE] bits. +* So we set MDREFR to power on defaults + (DRI, K0DB2, K0DB4, KxFREE) +* fields from the config. +* +* WARNING: K0DB2 and K0DB4 bits are usually set, while KxFREE bits +* are usually unset. */ ldr r5, [r3, #MDREFR_OFFSET] - bic r5, r5, #0x0ff - bic r5, r5, #0xf00 /* MDREFR user config with zeroed DRI */ - - ldr r4, =CONFIG_SYS_MDREFR_VAL - mov r7, r4 - lsl r4, #20 - lsr r4, #20 /* Get a valid DRI field */ - - orr r5, r5, r4 /* MDREFR user config with correct DRI */ + ldr r4, =( 0xFFF | MDREFR_K0DB4 | MDREFR_K0DB2 | \ + MDREFR_K0FREE | MDREFR_K1FREE | MDREFR_K2FREE ) + bic r5, r5, r4 /* clear DRI, K0DB2, K0DB4, KxFREE fields */ + and r4, r7, r4 + orr r5, r5, r4 /* use custom DRI, K0DB2, K0DB4, KxFREE */ orr r5, #MDREFR_K0RUN orr r5, #MDREFR_SLFRSH bic r5, #MDREFR_APD - bic r5, #MDREFR_E1PIN + + /* enable them later, if SDRAM is present */ + bic r5, #( MDREFR_E1PIN | MDREFR_K1RUN | MDREFR_K2RUN | \ + MDREFR_K1DB2 | MDREFR_K2DB2 ) str r5, [r3, #MDREFR_OFFSET] - ldr r4, [r3, #MDREFR_OFFSET] + ldr r5, [r3, #MDREFR_OFFSET] /* * 5) Initialize Synchronous Static Memory (Flash/Peripherals) */ - /* Initialize SXCNFG register. Assert the enable bits. -* -* Write SXMRS to cause an MRS command to all enabled banks of -* synchronous static memory. Note that SXLCR need not be written -* at this time. + /* Initialize SXCNFG register to enable synchronous flash memory. +* While the synchronous flash banks are being configured, the SDRAM +* banks must be disabled and MDREFR[APD] must be de-asserted. */ write32rb (MEMC_BASE + SXCNFG_OFFSET), CONFIG_SYS_SXCNFG_VAL /* -* 6) Initialize SDRAM +* 6) Initialize SDRAM, +*If SDRAM present, then MDREFR[K1RUN] and/or MDREFR[K2RUN] bits +*must be set. Also we must properly configure MDREFR[K1DB2] and +*MDREFR[K2DB2] in this case. +* +*WARNING: K1DB2 and K2DB2 bits are usually set if SDRAM present */ - bic r7, #MDREFR_SLFRSH - str r7, [r3, #MDREFR_OFFSET] - ldr r4, [r3, #MDREFR_OFFSET] + and r4, r7, #( MDREFR_K1RUN | MDREFR_K2RUN | \ + MDREFR_K1DB2 | MDREFR_K2DB2 ) + ldr r6, [r3, #MDREFR_OFFSET] + orr r6, r6, r4 + str r6, [r3, #MDREFR_OFFSET] + ldr r6, [r3, #MDREFR_OFFSET] - orr r7, #MDREFR_E1PIN - str r7, [r3, #MDREFR_OFFSET] - ldr r4, [r3, #MDREFR_OFFSET] + bic
Re: [U-Boot] [PATCH] MTD/SPI/FLASH: add support for Ramtron FRAMs using SPI
Dear Mike,
I have been looking at the possible solutions quite some time now,
the issue is rather complex:
1. according to Ramtron, 0x7f is a continuation byte defined in a
JEDEC standard (I could not find a spec for that), and shall be
ignored until a non-0x7f shows. That shall be Manufacturer Id (0xc2
for Ramtron), followed by the 2 device id bytes. Following that
method, the spi_flash.c should do that and use the first non-0x7f
value for the switch statement. The switch would then have a
case 0xc2 to call the ramtron-specific code.
about like (rough sketch):
for (index=0; index IDLENGTH-3 idcode[index] == 0x7f; index++)
;
/*
* here we are on the first non-0x7f byte or still on one,
* the switch will sort that out...
*/
switch (idcode[index]) {
case 0xc2: flash = spi_fram_probe_ramtron(spi, idcode+index);
/* the function will only access its parameter idcode with index 1 and 2 */
etc...
default: /* covers the 0x7f case as well */
2. the switch case 0xff would occur twice, if someone had defined
STMICRO and RAMTRON. I would postulate here that it is not allowed
to define both and issue an #error.
3. If someone decided to put the env into FRAM, the env-var describing
the nonstandard type would not be there (yet). So this should have
another solution. Since because of 2. another non-standard SPI device
should not be expected - I would, after accessing the status register to
verify something FRAM-like is there, use a CONFIG_FRAM_DEVICE to
define the chip to be assumed. That would work for us, since there
is only one non-standard FRAM in the list anyway.
Your thoughts?
Best Regards
Reinhard
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[U-Boot] [PATCH 3/3] mpc8610: refactor DIU initialization code to use existing bitmap function
The Freescale MPC8610 DIU code has its own bitmap-drawing function,
fsl_diu_display_bmp(), which is redundant. Instead, use the existing function
video_display_bitmap(). Replacing fsl_diu_display_bmp() with
video_display_bitmap() also requires refactoring the DIU initialization code.
Signed-off-by: Timur Tabi ti...@freescale.com
---
This patch requires this other patch:
video: cfb_console: add support for 4bpp bitmaps with GDF_32BIT_X888RGB
board/freescale/common/fsl_diu_fb.c | 155 +++-
board/freescale/common/fsl_diu_fb.h |7 +-
board/freescale/mpc8610hpcd/mpc8610hpcd.c | 16 ++-
board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c | 100 ++--
include/configs/MPC8610HPCD.h |6 +-
5 files changed, 76 insertions(+), 208 deletions(-)
diff --git a/board/freescale/common/fsl_diu_fb.c
b/board/freescale/common/fsl_diu_fb.c
index e740ad8..e0ff466 100644
--- a/board/freescale/common/fsl_diu_fb.c
+++ b/board/freescale/common/fsl_diu_fb.c
@@ -27,6 +27,9 @@
#include i2c.h
#include malloc.h
#include asm/io.h
+#include bmp_layout.h
+#include stdio_dev.h
+#include video_fb.h
#include fsl_diu_fb.h
@@ -359,10 +362,15 @@ int fsl_diu_init(int xres,
fb_initialized = 1;
if (splash_bmp) {
- info-logo_height = fsl_diu_display_bmp(splash_bmp, 0, 0, 0);
+ /*
+* If we want a banner on top of the screen, we want to remember
+* its size here, so that video_hw_init() can set the right
+* display height.
+*/
+ bmp_header_t *bmp = (bmp_header_t *)splash_bmp;
+
+ info-logo_height = le32_to_cpu(bmp-height);
info-logo_size = info-logo_height * info-line_length;
- debug(logo height %d, logo_size 0x%x\n,
- info-logo_height,info-logo_size);
}
/* Enable the DIU */
@@ -486,117 +494,44 @@ static int allocate_buf(struct diu_addr *buf, u32 size,
u32 bytes_align)
return 0;
}
-int fsl_diu_display_bmp(unsigned char *bmp,
- int xoffset,
- int yoffset,
- int transpar)
+/*
+ * The Graphic Device
+ */
+static GraphicDevice ctfb;
+
+/* Board-specific video initialization */
+void __board_diu_init(void)
{
- struct fb_info *info = fsl_fb_info;
- unsigned char r, g, b;
- unsigned int *fb_t, val;
- unsigned char *bitmap;
- unsigned int palette[256];
- int width, height, bpp, ncolors, raster, offset, x, y, i, k, cpp;
-
- if (!bmp) {
- printf(Must supply a bitmap address\n);
- return 0;
- }
+}
+int board_diu_init(void) __attribute__((weak, alias(__board_diu_init)));
- raster = bmp[10] + (bmp[11] 8) + (bmp[12] 16) + (bmp[13] 24);
- width = (bmp[21] 24) | (bmp[20] 16) | (bmp[19] 8) | bmp[18];
- height = (bmp[25] 24) | (bmp[24] 16) | (bmp[23] 8) | bmp[22];
- bpp = (bmp[29] 8) | (bmp[28]);
- ncolors = bmp[46] + (bmp[47] 8) + (bmp[48] 16) + (bmp[49] 24);
- bitmap = bmp + raster;
- cpp = info-var.bits_per_pixel / 8;
-
- debug(bmp = 0x%08x\n, (unsigned int)bmp);
- debug(bitmap = 0x%08x\n, (unsigned int)bitmap);
- debug(width = %d\n, width);
- debug(height = %d\n, height);
- debug(bpp = %d\n, bpp);
- debug(ncolors = %d\n, ncolors);
-
- debug(xres = %d\n, info-var.xres);
- debug(yres = %d\n, info-var.yres);
- debug(Screen_base = 0x%x\n, (unsigned int)info-screen_base);
-
- if (((width+xoffset) info-var.xres) ||
- ((height+yoffset) info-var.yres)) {
- printf(bitmap is out of range, image too large or too much
offset\n);
- return 0;
- }
- if (bpp 24) {
- for (i = 0, offset = 54; i ncolors; i++, offset += 4)
- palette[i] = (bmp[offset+2] 16)
- + (bmp[offset+1] 8) + bmp[offset];
- }
+void *video_hw_init(void)
+{
+ struct fb_info *info;
- switch (bpp) {
- case 1:
- for (y = height - 1; y = 0; y--) {
- fb_t = (unsigned int *) ((unsigned
int)info-screen_base + (((y+yoffset) * info-var.xres) + xoffset)*cpp);
- for (x = 0; x width; x += 8) {
- b = *bitmap++;
- for (k = 0; k 8; k++) {
- if (b 0x80)
- *fb_t++ = palette[1];
- else
- *fb_t++ = palette[0];
- b = b 1;
- }
- }
- for (i = (width / 2) % 4; i 0; i--)
- bitmap++;
- }
Re: [U-Boot] [PATCH v4 3/4] mtdparts: add new sub-command spread
On Mon, Aug 09, 2010 at 04:43:59PM -0400, Ben Gardiner wrote:
+static void spread_partition(struct mtd_info *mtd, struct part_info *part,
+ u32 *next_offset)
As in patch 2, change u32 to uint64_t.
+{
+ if (!mtd-block_isbad)
+ goto out;
+
+ u32 i, bb_delta = 0;
+
+ for (i = part-offset; i - bb_delta part-offset + part-size;
+ i += mtd-erasesize) {
+ if (mtd-block_isbad(mtd, i))
+ bb_delta += mtd-erasesize;
+ }
+
+ /*
+ * Absorb bad blocks immeadiately following this
+ * partition also into the partition, such that
+ * the next partition starts with a good block.
+ */
+ while (i mtd-size mtd-block_isbad(mtd, i)) {
+ bb_delta += mtd-erasesize;
+ i += mtd-erasesize;
+ }
Could this be refactored with get_len_incl_bad()? It should return both the
updated length and a flag indicating whether it was truncated.
+ debug(spread_partitions: device = %s%d, partition %d =
+ (%s) 0x%...@0x%08x\n,
+ MTD_DEV_TYPE(dev-id-type), dev-id-num,
+ part_num, part-name, part-size,
+ part-offset);
Why the extra indent on that last line?
IMHO, it's also nicer to line up continuation lines like this:
debug(spread_partitions...
(%s) ...
MTD_DEV...
part_num...
part-offset);
-Scott
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[U-Boot] [PATCH 5/8] APM82xxx: Add UIC support
From: Tirumala Marri tma...@apm.com This patch adds Universal Interrupt Controller support for APM82XXX processor. Signed-off-by: Tirumala R Marri tma...@apm.com --- arch/powerpc/include/asm/ppc4xx-uic.h |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/ppc4xx-uic.h b/arch/powerpc/include/asm/ppc4xx-uic.h index 782d045..238b70b 100644 --- a/arch/powerpc/include/asm/ppc4xx-uic.h +++ b/arch/powerpc/include/asm/ppc4xx-uic.h @@ -31,7 +31,7 @@ */ #if defined(CONFIG_440GX) || defined(CONFIG_440SPE) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ -defined(CONFIG_460SX) +defined(CONFIG_460SX) || defined(CONFIG_APM82XXX) #define UIC_MAX4 #elif defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ defined(CONFIG_405EX) @@ -252,7 +252,8 @@ #define VECNUM_ETH0(32 + 28) #endif /* CONFIG_440SPE */ -#if defined(CONFIG_460EX) || defined(CONFIG_460GT) +#if defined(CONFIG_460EX) || defined(CONFIG_460GT) ||\ +defined(CONFIG_APM82XXX) /* UIC 0 */ #define VECNUM_UIC2NCI 10 #define VECNUM_UIC2CI 11 -- 1.6.1.rc3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 8/8] APM82xxx: Add top level common file changes
From: Tirumala Marri tma...@apm.com Add bluestone board name to the board.cfg. Change Makefile to include bluestone board support. Modified MAINTAINERS file to include board maintainers name. Modified to include blouestone entry in the MAKEALL file. Signed-off-by: Tirumala R Marri tma...@apm.com --- MAINTAINERS |3 +++ MAKEALL |1 + Makefile|7 +++ boards.cfg |1 + 4 files changed, 12 insertions(+), 0 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 4b91b0f..263c00b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -253,6 +253,9 @@ Feng Kan f...@amcc.com redwood PPC4xx +Tirumala Marritma...@apm.com + bluestone APM82XXX + Brad Kemp brad.k...@seranoa.com ppmc8260MPC8260 diff --git a/MAKEALL b/MAKEALL index b34ae33..02d5c17 100755 --- a/MAKEALL +++ b/MAKEALL @@ -191,6 +191,7 @@ LIST_4xx= \ ASH405 \ bamboo \ bamboo_nand \ + bluestone \ bubinga \ CANBT \ canyonlands \ diff --git a/Makefile b/Makefile index 4f1cb1b..8cd5bd3 100644 --- a/Makefile +++ b/Makefile @@ -926,6 +926,13 @@ bamboo_nand_config:unconfig @echo CONFIG_NAND_U_BOOT = y $(obj)include/config.mk @$(MKCONFIG) -n $@ -a bamboo powerpc ppc4xx bamboo amcc +# Maui Bluestone board images +bluestone_config: unconfig + @mkdir -p $(obj)include + @echo #define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \ + tr '[:lower:]' '[:upper:]') $(obj)include/config.h + @$(MKCONFIG) -n $@ -a bluestone powerpc ppc4xx bluestone amcc + # Arches, Canyonlands Glacier use different U-Boot images arches_config \ canyonlands_config \ diff --git a/boards.cfg b/boards.cfg index 69c6897..48001d3 100644 --- a/boards.cfg +++ b/boards.cfg @@ -196,6 +196,7 @@ redwood powerpc ppc4xx - amcc taihu powerpc ppc4xx - amcc taishanpowerpc ppc4xx - amcc yucca powerpc ppc4xx - amcc +bluestone powerpc ppc4xx - amcc AP1000 powerpc ppc4xx ap1000 amirix CRAYL1 powerpc ppc4xx L1 cray ADCIOP powerpc ppc4xx adciop esd -- 1.6.1.rc3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 6/8] APM82xxx: Add SRAM support
From: Tirumala Marri tma...@apm.com This patch adds L2Cache/SRAM and OCM register definitions. Signed-off-by: Tirumala R Marri tma...@apm.com --- arch/powerpc/include/asm/ppc4xx-isram.h |8 +--- 1 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/include/asm/ppc4xx-isram.h b/arch/powerpc/include/asm/ppc4xx-isram.h index d6d17ac..b723401 100644 --- a/arch/powerpc/include/asm/ppc4xx-isram.h +++ b/arch/powerpc/include/asm/ppc4xx-isram.h @@ -25,7 +25,8 @@ /* * Internal SRAM */ -#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) +#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) ||\ +defined(CONFIG_APM82XXX) #define ISRAM0_DCR_BASE 0x380 #else #define ISRAM0_DCR_BASE 0x020 @@ -42,7 +43,8 @@ #define ISRAM0_REVID (ISRAM0_DCR_BASE+0x09) /* SRAM bus revision id reg */ #define ISRAM0_DPC (ISRAM0_DCR_BASE+0x0a) /* SRAM data parity check reg */ -#if defined(CONFIG_460EX) || defined(CONFIG_460GT) +#if defined(CONFIG_460EX) || defined(CONFIG_460GT) ||\ +defined(CONFIG_APM82XXX) #define ISRAM1_DCR_BASE 0x0B0 #define ISRAM1_SB0CR (ISRAM1_DCR_BASE+0x00) /* SRAM1 bank config 0*/ #define ISRAM1_BEAR(ISRAM1_DCR_BASE+0x04) /* SRAM1 bus error addr reg */ @@ -60,7 +62,7 @@ #if defined (CONFIG_440GX) || \ defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ -defined(CONFIG_460SX) +defined(CONFIG_460SX) || defined(CONFIG_APM82XXX) #define L2_CACHE_BASE 0x030 #define L2_CACHE_CFG (L2_CACHE_BASE+0x00)/* L2 Cache Config */ #define L2_CACHE_CMD (L2_CACHE_BASE+0x01)/* L2 Cache Command */ -- 1.6.1.rc3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/8] APM82xxx: Add clock speed calculations
From: Tirumala Marri tma...@apm.com
This patch adds support for speed calculations for different
IP blocks, based on the bootstrap values programmed into EPROM device.
Signed-off-by: Tirumala R Marri tma...@apm.com
---
arch/powerpc/cpu/ppc4xx/speed.c | 85 ++-
1 files changed, 84 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index 906face..b613275 100644
--- a/arch/powerpc/cpu/ppc4xx/speed.c
+++ b/arch/powerpc/cpu/ppc4xx/speed.c
@@ -189,7 +189,7 @@ ulong get_PCI_freq (void)
#elif defined(CONFIG_440)
#if defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM82XXX)
static u8 pll_fwdv_multi_bits[] = {
/* values for: 1 - 16 */
0x00, 0x01, 0x0f, 0x04, 0x09, 0x0a, 0x0d, 0x0e, 0x03, 0x0c,
@@ -250,6 +250,88 @@ u32 get_cpr0_fbdv(unsigned long cpr_reg_fbdv)
return 0;
}
+#if defined(CONFIG_APM82XXX)
+
+/*
+ * Specific for APM82XXX
+ * Change:
+ * PLL registers reflect the current PLL setting of the chip.
+ * So unlike previous implementation that reads bootstrap
+ * registers to determine system clocking information, this
+ * implementation directly extracts the information from
+ * current PLL registers values.
+ */
+void get_sys_info(sys_info_t *sysInfo)
+{
+ unsigned long plld;
+ unsigned long temp;
+ unsigned long mul;
+ unsigned long cpudv;
+ unsigned long plb2dv;
+ unsigned long ddr2dv;
+
+ /* Calculate Forward divisor A and Feeback divisor */
+ mfcpr(CPR0_PLLD, plld);
+
+ temp = CPR0_PLLD_FWDVA(plld);
+ sysInfo-pllFwdDivA = get_cpr0_fwdv(temp);
+
+ temp = CPR0_PLLD_FDV(plld);
+ sysInfo-pllFbkDiv = get_cpr0_fbdv(temp);
+
+ /* Calculate OPB clock divisor */
+ mfcpr(CPR0_OPBD, temp);
+ temp = CPR0_OPBD_OPBDV(temp);
+ sysInfo-pllOpbDiv = temp ? temp : 4;
+
+ /* Calculate Peripheral clock divisor */
+ mfcpr(CPR0_PERD, temp);
+ temp = CPR0_PERD_PERDV(temp);
+ sysInfo-pllExtBusDiv = temp ? temp : 4;
+
+ /* Calculate CPU clock divisor */
+ mfcpr(CPR0_CPUD, temp);
+ temp = CPR0_CPUD_CPUDV(temp);
+ cpudv = temp ? temp : 8;
+
+ /* Calculate PLB2 clock divisor */
+ mfcpr(CPR0_PLB2D, temp);
+ temp = CPR0_PLB2D_PLB2DV(temp);
+ plb2dv = temp ? temp : 4;
+
+ /* Calculate DDR2 clock divisor */
+ mfcpr(CPR0_DDR2D, temp);
+ temp = CPR0_DDR2D_DDR2DV(temp);
+ ddr2dv = temp ? temp : 4;
+
+ /* Calculate 'M' based on feedback source */
+ mfcpr(CPR0_PLLC, temp);
+ temp = CPR0_PLLC_SEL(temp);
+ if (temp == 0) {
+ /* PLL internal feedback */
+ mul = sysInfo-pllFbkDiv;
+ } else {
+ /* PLL PerClk feedback */
+ mul = sysInfo-pllFwdDivA * sysInfo-pllFbkDiv * cpudv
+ * plb2dv * 2 * sysInfo-pllOpbDiv *
+ sysInfo-pllExtBusDiv;
+ }
+
+ /* Now calculate the individual clocks */
+ sysInfo-freqVCOMhz = (mul * CONFIG_SYS_CLK_FREQ) + (mul 1);
+ sysInfo-freqProcessor = sysInfo-freqVCOMhz /
+ sysInfo-pllFwdDivA / cpudv;
+ sysInfo-freqPLB = sysInfo-freqVCOMhz /
+ sysInfo-pllFwdDivA / cpudv / plb2dv / 2;
+ sysInfo-freqOPB = sysInfo-freqPLB / sysInfo-pllOpbDiv;
+ sysInfo-freqEBC = sysInfo-freqOPB / sysInfo-pllExtBusDiv;
+ sysInfo-freqDDR = sysInfo-freqVCOMhz /
+ sysInfo-pllFwdDivA / cpudv / ddr2dv / 2;
+ sysInfo-freqUART = sysInfo-freqPLB;
+}
+
+#else
+
/*
* AMCC_TODO: verify this routine against latest EAS, cause stuff changed
*with latest EAS
@@ -307,6 +389,7 @@ void get_sys_info (sys_info_t * sysInfo)
return;
}
+#endif
#elif defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
--
1.6.1.rc3
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[U-Boot] [PATCH 4/8] APM82xxx: Add DDR support
From: Tirumala Marri tma...@apm.com This patch adds 32bit DDR2 static as well as dynamic setting of different DRAM parameters like CAS and read/write delays. Signed-off-by: Tirumala R Marri tma...@apm.com --- arch/powerpc/include/asm/ppc4xx-sdram.h | 25 +++-- 1 files changed, 19 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/include/asm/ppc4xx-sdram.h b/arch/powerpc/include/asm/ppc4xx-sdram.h index 4ec1ef8..a6cdace 100644 --- a/arch/powerpc/include/asm/ppc4xx-sdram.h +++ b/arch/powerpc/include/asm/ppc4xx-sdram.h @@ -292,7 +292,7 @@ */ #if defined(CONFIG_440SPE) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ -defined(CONFIG_460SX) +defined(CONFIG_460SX) || defined(CONFIG_APM82XXX) #define SDRAM_RXBAS_SDBA_MASK 0xFFE0 /* Base address */ #define SDRAM_RXBAS_SDBA_ENCODE(n) ((u32)(((phys_size_t)(n) 2) 0xFFE0)) #define SDRAM_RXBAS_SDBA_DECODE(n) phys_size_t)(n)) 0xFFE0) 2) @@ -322,6 +322,7 @@ * Revisit this file to check if all these 405EX defines are correct and * can be used in the common 44x_spd_ddr2 code as well. sr, 2008-06-02 */ +#define SDRAM_MBXCF_BASE_ENCODE(n) (((n) 0xFFC0) 3) #define SDRAM_RXBAS_SDSZ_MASK PPC_REG_VAL(19, 0xF) #define SDRAM_RXBAS_SDSZ_4MB PPC_REG_VAL(19, 0x0) #define SDRAM_RXBAS_SDSZ_8MB PPC_REG_VAL(19, 0x1) @@ -346,6 +347,18 @@ #define SDRAM_RXBAS_SDSZ_2048 SDRAM_RXBAS_SDSZ_2048MB #define SDRAM_RXBAS_SDSZ_4096 SDRAM_RXBAS_SDSZ_4096MB #define SDRAM_RXBAS_SDSZ_8192 SDRAM_RXBAS_SDSZ_8192MB +#define SDRAM_RXBAS_SDAM_MODE0 PPC_REG_VAL(23, 0x0) +#define SDRAM_RXBAS_SDAM_MODE1 PPC_REG_VAL(23, 0x1) +#define SDRAM_RXBAS_SDAM_MODE2 PPC_REG_VAL(23, 0x2) +#define SDRAM_RXBAS_SDAM_MODE3 PPC_REG_VAL(23, 0x3) +#define SDRAM_RXBAS_SDAM_MODE4 PPC_REG_VAL(23, 0x4) +#define SDRAM_RXBAS_SDAM_MODE5 PPC_REG_VAL(23, 0x5) +#define SDRAM_RXBAS_SDAM_MODE6 PPC_REG_VAL(23, 0x6) +#define SDRAM_RXBAS_SDAM_MODE7 PPC_REG_VAL(23, 0x7) +#define SDRAM_RXBAS_SDAM_MODE8 PPC_REG_VAL(23, 0x8) +#define SDRAM_RXBAS_SDAM_MODE9 PPC_REG_VAL(23, 0x9) +#define SDRAM_RXBAS_SDBE_DISABLEPPC_REG_VAL(31, 0x0) +#define SDRAM_RXBAS_SDBE_ENABLE PPC_REG_VAL(31, 0x1) #endif /* CONFIG_405EX */ /* The mode definitions are the same for all PPC4xx variants */ @@ -365,7 +378,7 @@ /* * Memory controller registers */ -#ifdef CONFIG_405EX +#if defined(CONFIG_405EX) || defined(CONFIG_APM82XXX) #define SDRAM_BESR 0x00/* PLB bus error status (read/clear) */ #define SDRAM_BESRT0x01/* PLB bus error status (test/set) */ #define SDRAM_BEARL0x02/* PLB bus error address low */ @@ -375,9 +388,9 @@ #define SDRAM_PLBOPT 0x08/* PLB slave options */ #define SDRAM_PUABA0x09/* PLB upper address base*/ #define SDRAM_MCSTAT 0x1F/* memory controller status */ -#else /* CONFIG_405EX */ +#else /* CONFIG_405EX || CONFIG_APM82XXX*/ #define SDRAM_MCSTAT 0x14/* memory controller status */ -#endif /* CONFIG_405EX */ +#endif /* CONFIG_405EX || CONFIG_APM82XXX*/ #define SDRAM_MCOPT1 0x20/* memory controller options 1 */ #define SDRAM_MCOPT2 0x21/* memory controller options 2 */ #define SDRAM_MODT00x22/* on die termination for bank 0 */ @@ -423,12 +436,12 @@ #define SDRAM_MEMODE 0x89/* memory extended mode */ #define SDRAM_ECCES0x98/* ECC error status */ #define SDRAM_CID 0xA4/* core ID */ -#ifndef CONFIG_405EX +#if !defined(CONFIG_405EX) !defined(CONFIG_APM82XXX) #define SDRAM_RID 0xA8/* revision ID */ #endif #define SDRAM_FCSR 0xB0/* feedback calibration status */ #define SDRAM_RTSR 0xB1/* run time status tracking */ -#ifdef CONFIG_405EX +#if defined(CONFIG_405EX) || defined(CONFIG_APM82XXX) #define SDRAM_RID 0xF8/* revision ID */ #endif -- 1.6.1.rc3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 7/8] APM82xxx: Add bluestone board support
From: Tirumala Marri tma...@apm.com Add support code for bluestone board wth APM82XXX processor based. This patch includes early board init, misc init, configure EBC, and initializes UIC. Signed-off-by: Tirumala R Marri tma...@apm.com --- arch/powerpc/include/asm/ppc4xx-ebc.h |4 + board/amcc/bluestone/Makefile | 52 board/amcc/bluestone/bluestone.c | 213 board/amcc/bluestone/config.mk| 40 ++ board/amcc/bluestone/init.S | 55 include/configs/bluestone.h | 218 + 6 files changed, 582 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/include/asm/ppc4xx-ebc.h b/arch/powerpc/include/asm/ppc4xx-ebc.h index 9c17e46..245e487 100644 --- a/arch/powerpc/include/asm/ppc4xx-ebc.h +++ b/arch/powerpc/include/asm/ppc4xx-ebc.h @@ -73,6 +73,10 @@ #define EBC_NUM_BANKS 3 #endif +#if defined(CONFIG_APM82XXX) +#define EBC_NUM_BANKS 3 +#endif + /* Bank Configuration Register */ #define EBC_BXCR(n)(n) #define EBC_BXCR_BANK_SIZE(n) (0x10 (((n) EBC_BXCR_BS_MASK) 17)) diff --git a/board/amcc/bluestone/Makefile b/board/amcc/bluestone/Makefile new file mode 100644 index 000..637d20d --- /dev/null +++ b/board/amcc/bluestone/Makefile @@ -0,0 +1,52 @@ +# +# Copyright (c) 2010, Applied Micro Circuits Corporation +# All rights reserved. Tirumala R Marri tma...@apm.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).a + +COBJS-y:= $(BOARD).o +SOBJS := init.o + +COBJS := $(COBJS-y) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/amcc/bluestone/bluestone.c b/board/amcc/bluestone/bluestone.c new file mode 100644 index 000..b13e84a --- /dev/null +++ b/board/amcc/bluestone/bluestone.c @@ -0,0 +1,213 @@ +/* + * Bluestone board support + * + * Copyright (c) 2010, Applied Micro Circuits Corporation + * All rights reserved. Tirumala R Marri tma...@apm.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include common.h +#include ppc440.h +#include libfdt.h +#include fdt_support.h +#include i2c.h +#include asm/processor.h +#include asm/io.h +#include asm/mmu.h +#include asm/gpio.h + +DECLARE_GLOBAL_DATA_PTR; + +#define SDR_AHB_CFG0x370 + +/* Define Boot devices */ +#define BOOT_FROM_8BIT_SRAM 0x00 +#define BOOT_FROM_8BIT_SRAM_FULL_ADDR 0x01 +#define BOOT_FROM_8BIT_NAND0x02 +#define BOOT_FROM_8BIT_NOR 0x03 +#define BOOT_FROM_8BIT_NOR_FULL_ADDR 0x04 +#define BOOT_DEVICE_UNKNOWN0xff + +#define APM82161_MASK (u32)(0x1 21) + +/* NOR Flash */ +#define EBC_BXAP_NOR (EBC_BXAP_BME_DISABLED | \ + EBC_BXAP_TWT_ENCODE(64) | \ + EBC_BXAP_BCE_DISABLE| \ + EBC_BXAP_BCT_2TRANS | \ + EBC_BXAP_CSN_ENCODE(1) | \ + EBC_BXAP_OEN_ENCODE(2) | \ +
[U-Boot] [PATCH 2/8] APM82xxx: Add Common register definitions
From: Tirumala Marri tma...@apm.com This patch adds APM82XXX specific definitions, which include clock and boot strap. Signed-off-by: Tirumala R Marri tma...@apm.com --- include/ppc440.h | 57 - include/ppc4xx.h |7 +++-- 2 files changed, 59 insertions(+), 5 deletions(-) diff --git a/include/ppc440.h b/include/ppc440.h index c807dda..3bd8e98 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -58,6 +58,25 @@ | Clocking Controller +*/ /* values for clkcfga register - indirect addressing of these regs */ +#if defined(CONFIG_APM82XXX) +#define CPR0_CLKUPD 0x0020 +#define CPR0_PLLC0x0040 +#define CPR0_PLLC_SEL(pllc) (((pllc) 0x0100) 24) +#define CPR0_PLLD0x0060 +#define CPR0_PLLD_FDV(plld) (((plld) 0xff00) 24) +#define CPR0_PLLD_FWDVA(plld)(((plld) 0x000f) 16) +#define CPR0_CPUD0x0080 +#define CPR0_CPUD_CPUDV(cpud)(((cpud) 0x0700) 24) +#define CPR0_PLB2D 0x00a0 +#define CPR0_PLB2D_PLB2DV(plb2d) (((plb2d) 0x0600) 25) +#define CPR0_OPBD0x00c0 +#define CPR0_OPBD_OPBDV(opbd)(((opbd) 0x0300) 24) +#define CPR0_PERD 0x00e0 +#define CPR0_PERD_PERDV(perd)(((perd) 0x0300) 24) +#define CPR0_DDR2D 0x0100 +#define CPR0_DDR2D_DDR2DV(ddr2d) (((ddr2d) 0x0600) 25) +#define CLK_ICFG 0x0140 +#else #define CPR0_PLLC 0x0040 #define CPR0_PLLD 0x0060 #define CPR0_PRIMAD0 0x0080 @@ -67,6 +86,7 @@ #define CPR0_MALD 0x0100 #define CPR0_SPCID 0x0120 #define CPR0_ICFG 0x0140 +#endif /*if defined(CONFIG_APM82XXX) */ /* 440EPX boot strap options */ #define BOOT_STRAP_OPTION_A0x @@ -1275,7 +1295,36 @@ #define SDR0_AHB_CFG 0x370 #define SDR0_USB2HOST_CFG 0x371 #endif /* CONFIG_460EX || CONFIG_460GT */ +#if defined(CONFIG_APM82XXX) + +#define SDR0_DDR0 0x00E1 +#define SDR0_DDR0_DDRM_ENCODE(n) unsigned long)(n))0x03)29) +#define SDR0_DDR0_DDRM_DECODE(n) unsigned long)(n))29)0x03) +#define SDR0_DDR0_TUNE_ENCODE(n) unsigned long)(n))0x2FF)0) +#define SDR0_DDR0_TUNE_DECODE(n) unsigned long)(n))0)0x2FF) +#define SDR_SDSTP1_RL_DECODE(x) ((x 0x000C) 18) +#define SDR_SDSTP1_RL_EBC 0x0 +#define SDR_SDSTP1_RL_NDFC 0x2 + +/* ECID */ +#define SDR0_ECID0 0x0080 +#define SDR0_ECID1 0x0081 +#define SDR0_ECID2 0x0082 +#define SDR0_ECID3 0x0083 + +/* AHB config. */ +#define AHB_TOP 0xA4 +#define AHB_BOT 0xA5 +#define SDR0_AHB_CFG0x370 + +/* DDR SDRAM Controller clock (CPR register)*/ +#define SDR0_DDRCE 0x00E0 /* SDR register */ +#define CPR0_DDR2D 0x0100 /* CPR register */ +#define CPR0_DDR2D_DDR2DV_ENCODE(n)unsigned long)(n))0x03)25) +#define CPR0_DDR2D_DDR2DV_DECODE(n)unsigned long)(n))25)0x03) + +#endif #define SDR0_SDCS_SDD (0x8000 31) #if defined(CONFIG_440GP) @@ -1517,7 +1566,8 @@ #define SDR0_EBC0 0x0100 #define SDR0_SDSTP20x4001 #define SDR0_SDSTP30x4001 -#elif defined(CONFIG_460EX) || defined(CONFIG_460GT) +#elif defined(CONFIG_460EX) || defined(CONFIG_460GT) ||\ + defined(CONFIG_APM82XXX) #define SDR0_SRST0 SDR0_SRST /* for compatability reasons */ #define SDR0_SRST0_BGO 0x8000 /* PLB to OPB bridge */ @@ -1909,9 +1959,12 @@ #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ -defined(CONFIG_460EX) || defined(CONFIG_460GT) +defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ +defined(CONFIG_APM82XXX) #define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE+0x0B00) +#if !defined(CONFIG_APM82XXX) #define GPIO1_BASE (CONFIG_SYS_PERIPHERAL_BASE+0x0C00) +#endif #define GPIO0_OR (GPIO0_BASE+0x0) #define GPIO0_TCR (GPIO0_BASE+0x4) diff --git a/include/ppc4xx.h b/include/ppc4xx.h index ee30a4c..3224d5f 100644 --- a/include/ppc4xx.h +++ b/include/ppc4xx.h @@ -44,14 +44,15 @@ #if defined(CONFIG_405EX) || \ defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ -defined(CONFIG_460SX) +defined(CONFIG_460SX) || defined(CONFIG_APM82XXX) #define CONFIG_SDRAM_PPC4xx_IBM_DDR2 /* IBM DDR(2) controller */ #endif #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) ||\ defined(CONFIG_405EZ) || defined(CONFIG_405EX) || \ -defined(CONFIG_460EX) || defined(CONFIG_460GT) +defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ +defined(CONFIG_APM82XXX) #define CONFIG_NAND_NDFC #endif @@ -61,7 +62,7 @@
[U-Boot] [PATCH 0/8] Add support for new SoC APM82XXX
From: Tirumala Marri tma...@apm.com APM8 is Applied Micro Circuits Corporations naming convention for new line of SoCs. Tirumala Marri (8): APM82xxx: Add CPU support APM82xxx: Add Common register definitions APM82xxx: Add clock speed calculations APM82xxx: Add DDR support APM82xxx: Add UIC support APM82xxx: Add SRAM support APM82xxx: Add bluestone board support APM82xxx: Add top level common file changes MAINTAINERS |3 + MAKEALL |1 + Makefile|7 + arch/powerpc/cpu/ppc4xx/cpu.c | 35 +- arch/powerpc/cpu/ppc4xx/cpu_init.c |9 +- arch/powerpc/cpu/ppc4xx/speed.c | 85 - arch/powerpc/cpu/ppc4xx/start.S | 10 +- arch/powerpc/include/asm/ppc4xx-ebc.h |4 + arch/powerpc/include/asm/ppc4xx-isram.h |8 +- arch/powerpc/include/asm/ppc4xx-sdram.h | 25 +++- arch/powerpc/include/asm/ppc4xx-uic.h |5 +- arch/powerpc/include/asm/processor.h|1 + board/amcc/bluestone/Makefile | 52 board/amcc/bluestone/bluestone.c| 213 ++ board/amcc/bluestone/config.mk | 40 ++ board/amcc/bluestone/init.S | 55 boards.cfg |1 + include/configs/bluestone.h | 218 +++ include/ppc440.h| 57 - include/ppc4xx.h|7 +- 20 files changed, 810 insertions(+), 26 deletions(-) create mode 100644 board/amcc/bluestone/Makefile create mode 100644 board/amcc/bluestone/bluestone.c create mode 100644 board/amcc/bluestone/config.mk create mode 100644 board/amcc/bluestone/init.S create mode 100644 include/configs/bluestone.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/8] APM82xxx: Add CPU support
From: Tirumala Marri tma...@apm.com
APM82XXX is a new line of SoCs which are derivatives of
PPC44X family of processors. This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB and AHB bus.
Signed-off-by: Tirumala R Marri tma...@apm.com
---
arch/powerpc/cpu/ppc4xx/cpu.c| 35 +++--
arch/powerpc/cpu/ppc4xx/cpu_init.c |9 ---
arch/powerpc/cpu/ppc4xx/start.S | 10 +++-
arch/powerpc/include/asm/processor.h |1 +
4 files changed, 46 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index 851065c..5fe5d8c 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -80,7 +80,8 @@ static int pci_async_enabled(void)
#endif /* CONFIG_PCI */
#if defined(CONFIG_PCI) !defined(CONFIG_IOP480) \
-!defined(CONFIG_405) !defined(CONFIG_405EX)
+!defined(CONFIG_405) !defined(CONFIG_405EX) \
+!defined(CONFIG_APM82XXX)
int pci_arbiter_enabled(void)
{
#if defined(CONFIG_405GP)
@@ -250,6 +251,21 @@ static char *bootstrap_str[] = {
};
static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
#endif
+#if defined(CONFIG_APM82XXX)
+#define SDR0_PINSTP_SHIFT 29
+static char *bootstrap_str[] = {
+ RESERVED,
+ RESERVED,
+ RESERVED,
+ NAND (8 bits),
+ NOR (8 bits),
+ NOR (8 bits) w/PLL Bypassed,
+ I2C (Addr 0x54),
+ I2C (Addr 0x52),
+};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };
+#endif
+
#if defined(SDR0_PINSTP_SHIFT)
static int bootstrap_option(void)
@@ -285,7 +301,7 @@ int checkcpu (void)
uint pvr = get_pvr();
ulong clock = gd-cpu_clk;
char buf[32];
-#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT) || defined(CONFIG_APM82XXX)
u32 reg;
#endif
@@ -304,6 +320,8 @@ int checkcpu (void)
#if defined(CONFIG_XILINX_440)
puts(IBM PowerPC 4);
+#elif defined(CONFIG_APM82XXX)
+ puts(APM PowerPC APM82);
#else
puts(AMCC PowerPC 4);
#endif
@@ -316,7 +334,7 @@ int checkcpu (void)
#if defined(CONFIG_440)
#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
puts(60);
-#else
+#elif !defined(CONFIG_APM82XXX)
puts(40);
#endif
#endif
@@ -598,7 +616,18 @@ int checkcpu (void)
puts(GX Rev. A);
strcpy(addstr, No Security support);
break;
+#if defined(CONFIG_APM82XXX)
+ case PVR_APM82XXX_RA:
+ mfsdr(SDR0_ECID3, reg);
+ if (reg 0x0020)
+ puts(181 Rev. A);
+ if (reg 0x0010)
+ strcpy(addstr, No Security support);
+ else
+ strcpy(addstr, Security support);
+ break;
+#endif
case PVR_VIRTEX5:
puts(x5 VIRTEX5);
break;
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index c04eede..2308051 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -35,7 +35,6 @@ DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_SYS_PLL_RECONFIG
#define CONFIG_SYS_PLL_RECONFIG0
#endif
-
#if defined(CONFIG_440EPX) || \
defined(CONFIG_460EX) || defined(CONFIG_460GT)
static void reset_with_rli(void)
@@ -222,13 +221,15 @@ void reconfigure_pll(u32 new_cpu_freq)
void
cpu_init_f (void)
{
-#if defined(CONFIG_WATCHDOG) || defined(CONFIG_440GX) || defined(CONFIG_460EX)
+#if defined(CONFIG_WATCHDOG) || defined(CONFIG_440GX) ||\
+ defined(CONFIG_460EX) || defined(CONFIG_APM82XXX)
u32 val;
#endif
reconfigure_pll(CONFIG_SYS_PLL_RECONFIG);
-#if (defined(CONFIG_405EP) || defined (CONFIG_405EX))
!defined(CONFIG_SYS_4xx_GPIO_TABLE)
+#if (defined(CONFIG_405EP) || defined(CONFIG_405EX)) \
+ !defined(CONFIG_SYS_4xx_GPIO_TABLE) !defined(CONFIG_APM82XXX)
/*
* GPIO0 setup (select GPIO or alternate function)
*/
@@ -384,7 +385,7 @@ cpu_init_f (void)
#if defined(CONFIG_405EX) || \
defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM82XXX)
/*
* Set PLB4 arbiter (Segment 0 and 1) to 4 deep pipeline read
*/
diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S
index 5296dad..9cb818d 100644
--- a/arch/powerpc/cpu/ppc4xx/start.S
+++ b/arch/powerpc/cpu/ppc4xx/start.S
@@ -700,7 +700,8 @@ _start:
defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
defined(CONFIG_460SX)
mtdcr L2_CACHE_CFG,r0 /* Ensure L2 Cache is off */
-#elif defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#elif defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
+ defined(CONFIG_APM82XXX)
lis r1, 0x
ori
Re: [U-Boot] [PATCH 1/2] I2C: add Marvell TWSI simple driver
Le 26/08/2010 08:30, Heiko Schocher a écrit : Beside of that, I have just some minor codstyling comments: Meanwhile, I've run checkpatch on this file and fixed every warning and error, thus some of your comments were taken care of in the process. That left: +#define MVTWSI_STATUS_DATA_R_NAK0x58 /* our NAK, not the slave's */ line too long. Checkpatch did not complain on this one. Is there a specific line length contraint beside passing checkpatch? +/* + * Wait for IFLG to raise, or return 'timeout'; then if status is as expected, + * return 0 (ok) or return 'wrong status'. + */ + blank line not necessary. Which blank line exactly? Between the comment block and code? If so, does this apply everywhere, i.e. after the topmost license comment block, before blocks of #define, etc? As a side note, if V2 gets Acked by Prafulla and you, can you add the commit to your i2c tree and ask for a new pull? Anyway, Wolfgang said he won't resume activity on u-boot before sep 5th. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 4/4] mtdparts: new add.spread: add part skipping bad blocks
On Mon, Aug 09, 2010 at 04:44:00PM -0400, Ben Gardiner wrote:
+#if defined(CONFIG_CMD_MTDPARTS_SPREAD)
+ s = strchr(argv[1], '.');
+
+ if (get_mtd_info(dev-id-type, dev-id-num, mtd))
+ return 1;
+#endif
+
if ((dev_tmp = device_find(dev-id-type, dev-id-num)) ==
NULL) {
+#if defined(CONFIG_CMD_MTDPARTS_SPREAD)
+ if (s !strcmp(s, .spread)) {
No need for the strchr, just do if (!strcmp(argv[1][3], .spread)).
+ p = list_entry(dev-parts.next,
+struct part_info, link);
+ spread_partition(mtd, p, next_offset);
+
+ debug(increased %s to %d bytes\n, p-name,
+ p-size);
+ }
+#endif
device_add(dev);
} else {
/* merge new partition with existing ones*/
p = list_entry(dev-parts.next, struct part_info, link);
+#if defined(CONFIG_CMD_MTDPARTS_SPREAD)
+ if (s !strcmp(s, .spread)) {
+ spread_partition(mtd, p, next_offset);
+
+ debug(increased %s to %d bytes\n, p-name,
+ p-size);
+ }
+#endif
Don't duplicate this on both sides of the if; instead do something like:
p = list_entry(dev-parts.next...);
if (!strcmp(argv[1][3], .spread))
spread_partition(mtd, p, next_offset);
if ((dev_tmp = ...) {
device_add(dev);
} else if (part_add(dev_tmp, p)) {
device_del(dev);
return 1;
}
-Scott
___
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[U-Boot] [PATCH V2 0/4] Improve I2C for orion5x, kirkwood and ED Mini V2
SUMMARY: This patchset improves the driver for the Marvell TWSI interface found on orion5x and kirkwood SoCs and adds I2C support to the orion5x-based ED Mini V2 board. The mvtwsi driver is a complete rewrite, 50% shorter in source code lines, 25% smaller in object size, much simpler and way faster than the kirkwood_i2c driver it replaces. PATCH SET: Patch 1 removes dependencies on kirwkood_i2c from suen3, the only board that mentioned it. Patch 2 renames the driver from kirkwood_i2c to mvtwsi. Patch 3 replaces the old code with the new one. Patch 4 adds support for I2C in orion5x-based ED Mini V2. TESTS: This driver has been tested on an ED Mini V2 with basic u-boot i2c commands, on an 5C372a RTC and an HT24LC08 1 KB eeprom (read+write). HISTORY: V1: Initial submission as an addition rather than a replacement. V2: Fixed copyright line. Made mvtwsi a replacement for kirkwood_i2c. Made patches checkpatch-clean: 0 errors, 0 warnings. Various cosmetic changes. Removed useless i2c_end() function. Albert Aribaud (4): suen3: remove CONFIG_HARD_I2C and related defines i2c: rename kirkwood_i2c to mvtwsi i2c: rewrite mvtwsi, support orion5x and kirkwood edminiv2: add I2C support using mvtwsi driver drivers/i2c/Makefile |2 +- drivers/i2c/kirkwood_i2c.c | 496 drivers/i2c/mvtwsi.c | 430 ++ include/configs/edminiv2.h |9 + include/configs/km_arm.h |8 - 5 files changed, 440 insertions(+), 505 deletions(-) delete mode 100644 drivers/i2c/kirkwood_i2c.c create mode 100644 drivers/i2c/mvtwsi.c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2 1/4] suen3: remove CONFIG_HARD_I2C and related defines
These are not used on this board, which uses soft I2C instead. Signed-off-by: Albert Aribaud albert.arib...@free.fr --- include/configs/km_arm.h |8 1 files changed, 0 insertions(+), 8 deletions(-) diff --git a/include/configs/km_arm.h b/include/configs/km_arm.h index 6519c90..1617e69 100644 --- a/include/configs/km_arm.h +++ b/include/configs/km_arm.h @@ -142,16 +142,8 @@ /* * I2C related stuff */ -#undef CONFIG_HARD_I2C /* I2C with hardware support */ #defineCONFIG_SOFT_I2C /* I2C bit-banged */ -#if defined(CONFIG_HARD_I2C) -#defineCONFIG_I2C_KIRKWOOD -#defineCONFIG_I2C_KW_REG_BASE KW_TWSI_BASE -#defineCONFIG_SYS_I2C_SLAVE0x0 -#defineCONFIG_SYS_I2C_SPEED10 -#endif - #defineCONFIG_KIRKWOOD_GPIO/* Enable GPIO Support */ #if defined(CONFIG_SOFT_I2C) #ifndef __ASSEMBLY__ -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2 2/4] i2c: rename kirkwood_i2c to mvtwsi
This driver is not kirkwood-specific and can also be used
e.g. by orion5x. Rename to a SoC-neutral name.
Signed-off-by: Albert Aribaud albert.arib...@free.fr
---
drivers/i2c/Makefile |2 +-
drivers/i2c/{kirkwood_i2c.c = mvtwsi.c} |0
2 files changed, 1 insertions(+), 1 deletions(-)
rename drivers/i2c/{kirkwood_i2c.c = mvtwsi.c} (100%)
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index d2c2515..ae04d53 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -28,7 +28,7 @@ LIB := $(obj)libi2c.a
COBJS-$(CONFIG_BFIN_TWI_I2C) += bfin-twi_i2c.o
COBJS-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o
COBJS-$(CONFIG_FSL_I2C) += fsl_i2c.o
-COBJS-$(CONFIG_I2C_KIRKWOOD) += kirkwood_i2c.o
+COBJS-$(CONFIG_I2C_DRIVER_MVTWSI) += mvtwsi.o
COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
diff --git a/drivers/i2c/kirkwood_i2c.c b/drivers/i2c/mvtwsi.c
similarity index 100%
rename from drivers/i2c/kirkwood_i2c.c
rename to drivers/i2c/mvtwsi.c
--
1.7.1
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[U-Boot] [PATCH V2 3/4] i2c: rewrite mvtwsi, support orion5x and kirkwood
This rewrite of the mvtwsi driver is 25% smaller and much
faster and simpler than the previous code.
Signed-off-by: Albert Aribaud albert.arib...@free.fr
---
drivers/i2c/mvtwsi.c | 748 +++---
1 files changed, 341 insertions(+), 407 deletions(-)
diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
index a4409be..456b204 100644
--- a/drivers/i2c/mvtwsi.c
+++ b/drivers/i2c/mvtwsi.c
@@ -1,10 +1,7 @@
/*
- * Driver for the i2c controller on the Marvell line of host bridges
- * (e.g, gt642[46]0, mv643[46]0, mv644[46]0, Orion SoC family),
- * and Kirkwood family.
+ * Driver for the TWSI (i2c) controller on the Marvell orion5x
*
- * Based on:
- * Author: Mark A. Greer mgr...@mvista.com
+ * Author: Albert Aribaud albert.arib...@free.fr
* 2005 (c) MontaVista, Software, Inc.
*
* See file CREDITS for list of people who contributed to this
@@ -24,473 +21,410 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
- *
- * ported from Linux to u-boot
- * (C) Copyright 2009
- * Heiko Schocher, DENX Software Engineering, h...@denx.de.
*/
+
#include common.h
#include i2c.h
-#include asm/arch/kirkwood.h
#include asm/errno.h
#include asm/io.h
-DECLARE_GLOBAL_DATA_PTR;
+/*
+ * include a file that will provide CONFIG_I2C_MVTWSI_BASE
+ * and possibly other settings
+ */
-static unsigned int i2c_bus_num __attribute__ ((section (.data))) = 0;
-#if defined(CONFIG_I2C_MUX)
-static unsigned int i2c_bus_num_mux __attribute__ ((section (data))) = 0;
+#if defined(CONFIG_ORION5X)
+#include asm/arch/orion5x.h
+#else
+#error Driver mvtwsi not supported by SoC or board
#endif
-/* Register defines */
-#defineKW_I2C_REG_SLAVE_ADDR 0x00
-#defineKW_I2C_REG_DATA 0x04
-#defineKW_I2C_REG_CONTROL 0x08
-#defineKW_I2C_REG_STATUS 0x0c
-#defineKW_I2C_REG_BAUD 0x0c
-#defineKW_I2C_REG_EXT_SLAVE_ADDR 0x10
-#defineKW_I2C_REG_SOFT_RESET 0x1c
-
-#defineKW_I2C_REG_CONTROL_ACK 0x0004
-#defineKW_I2C_REG_CONTROL_IFLG 0x0008
-#defineKW_I2C_REG_CONTROL_STOP 0x0010
-#defineKW_I2C_REG_CONTROL_START0x0020
-#defineKW_I2C_REG_CONTROL_TWSIEN 0x0040
-#defineKW_I2C_REG_CONTROL_INTEN0x0080
-
-/* Ctlr status values */
-#defineKW_I2C_STATUS_BUS_ERR 0x00
-#defineKW_I2C_STATUS_MAST_START0x08
-#defineKW_I2C_STATUS_MAST_REPEAT_START 0x10
-#defineKW_I2C_STATUS_MAST_WR_ADDR_ACK 0x18
-#defineKW_I2C_STATUS_MAST_WR_ADDR_NO_ACK 0x20
-#defineKW_I2C_STATUS_MAST_WR_ACK 0x28
-#defineKW_I2C_STATUS_MAST_WR_NO_ACK0x30
-#defineKW_I2C_STATUS_MAST_LOST_ARB 0x38
-#defineKW_I2C_STATUS_MAST_RD_ADDR_ACK 0x40
-#defineKW_I2C_STATUS_MAST_RD_ADDR_NO_ACK 0x48
-#defineKW_I2C_STATUS_MAST_RD_DATA_ACK 0x50
-#defineKW_I2C_STATUS_MAST_RD_DATA_NO_ACK 0x58
-#defineKW_I2C_STATUS_MAST_WR_ADDR_2_ACK0xd0
-#defineKW_I2C_STATUS_MAST_WR_ADDR_2_NO_ACK 0xd8
-#defineKW_I2C_STATUS_MAST_RD_ADDR_2_ACK0xe0
-#defineKW_I2C_STATUS_MAST_RD_ADDR_2_NO_ACK 0xe8
-#defineKW_I2C_STATUS_NO_STATUS 0xf8
-
-/* Driver states */
-enum {
- KW_I2C_STATE_INVALID,
- KW_I2C_STATE_IDLE,
- KW_I2C_STATE_WAITING_FOR_START_COND,
- KW_I2C_STATE_WAITING_FOR_ADDR_1_ACK,
- KW_I2C_STATE_WAITING_FOR_ADDR_2_ACK,
- KW_I2C_STATE_WAITING_FOR_SLAVE_ACK,
- KW_I2C_STATE_WAITING_FOR_SLAVE_DATA,
-};
+/*
+ * TWSI register structure
+ */
-/* Driver actions */
-enum {
- KW_I2C_ACTION_INVALID,
- KW_I2C_ACTION_CONTINUE,
- KW_I2C_ACTION_SEND_START,
- KW_I2C_ACTION_SEND_ADDR_1,
- KW_I2C_ACTION_SEND_ADDR_2,
- KW_I2C_ACTION_SEND_DATA,
- KW_I2C_ACTION_RCV_DATA,
- KW_I2C_ACTION_RCV_DATA_STOP,
- KW_I2C_ACTION_SEND_STOP,
+struct mvtwsi_registers {
+ u32 slave_address;
+ u32 data;
+ u32 control;
+ union {
+ u32 status; /* when reading */
+ u32 baudrate; /* when writing */
+ };
+ u32 extended_slave_address;
+ u32 reserved[2];
+ u32 soft_reset;
};
-/* defines to get compatible with Linux driver */
-#define IRQ_NONE 0x0
-#define IRQ_HANDLED0x01
+/*
+ * Control register fields
+ */
-#define I2C_M_TEN 0x01
-#define I2C_M_RD 0x02
-#defineI2C_M_REV_DIR_ADDR 0x04;
+#defineMVTWSI_CONTROL_ACK 0x0004
+#defineMVTWSI_CONTROL_IFLG
[U-Boot] [PATCH V2 4/4] edminiv2: add I2C support using mvtwsi driver
Signed-off-by: Albert Aribaud albert.arib...@free.fr --- include/configs/edminiv2.h |9 + 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 57dd165..36ed392 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -182,6 +182,15 @@ #endif /* CMD_IDE */ /* + * I2C related stuff + */ +#define CONFIG_I2C_DRIVER_MVTWSI +#define CONFIG_I2C_MVTWSI_BASE ORION5X_TWSI_BASE +#define CONFIG_SYS_I2C_SLAVE 0x0 +#define CONFIG_SYS_I2C_SPEED 10 +#define CONFIG_CMD_I2C + +/* * Environment variables configurations */ #define CONFIG_ENV_IS_IN_FLASH 1 -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] orion5x: fix comment-in-comment typo in cpu.h
Signed-off-by: Albert Aribaud albert.arib...@free.fr
---
arch/arm/include/asm/arch-orion5x/cpu.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-orion5x/cpu.h
b/arch/arm/include/asm/arch-orion5x/cpu.h
index 80717f8..6ce02a9 100644
--- a/arch/arm/include/asm/arch-orion5x/cpu.h
+++ b/arch/arm/include/asm/arch-orion5x/cpu.h
@@ -76,7 +76,7 @@ enum orion5x_cpu_attrib {
/*
* Device Address MAP BAR values
-/*
+ *
* All addresses and sizes not defined by board code
* will be given default values here.
*/
--
1.7.1
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Re: [U-Boot] [PATCH] Orion5x: bugfix: window size (mis)calculation
Hi list,
Le 24/08/2010 15:27, Albert Aribaud a écrit :
Fix orion5x_winctrl_calcsize() off-by-1 bug which caused mapping
windows to be cut by half. This afected all windows including NOR
flash (causing half the flash to be unaccessible) but DRAM was and
still is fine as its size is determined otherwise.
Signed-off-by: Albert Aribaudalbert.arib...@free.fr
---
arch/arm/cpu/arm926ejs/orion5x/cpu.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/orion5x/cpu.c
b/arch/arm/cpu/arm926ejs/orion5x/cpu.c
index 3740e33..260f88b 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/cpu.c
+++ b/arch/arm/cpu/arm926ejs/orion5x/cpu.c
@@ -61,7 +61,7 @@ unsigned int orion5x_winctrl_calcsize(unsigned int sizeval)
unsigned int j = 0;
u32 val = sizeval 1;
- for (i = 0; val 0x1; i++) {
+ for (i = 0; val= 0x1; i++) {
j |= (1 i);
val = val 1;
}
Sorry for this late reply.
Both versions looked wrong to me but I couldn't test them at the time.
Albert's version gives the correct result for exact powers of 2.
This is admittedly the usual case.
However AFAICS it gives a wrong result for *all* other values above 64 KiB.
The following version gives the results I would expect:
unsigned int orion5x_winctrl_calcsize(unsigned int sizeval)
{
int i;
unsigned int j = 0;
u32 val = sizeval - 1;
for (i = 0; val = 0x1; i++) {
j |= (1 i);
val = val 1;
}
return 0x j;
}
Notes:
a) Masking with 0x is not necessary.
I kept it to keep the code as close as possible to the original.
b) A size of 0 on entry is stupid and must be considered as a special case.
The most useful is probably to treat 0 as 4 GiB.
This occurs naturally and needs no special handling.
Otherwise we could treat it as one 64 KiB page.
Otherwise we could BUG_ON.
However I have completely rewritten the function using a more efficient
algorithm.
It gives identical results to the previous one above.
For large window sizes this version is much faster.
It avoids the loop which repeatedly divides the size by 2.
u32 orion5x_winctrl_calcsize(u32 x)
{
/*
* Step 1: Get the most significant one in the right bit position.
*
* Calculate the number of 64 KiB blocks needed minus one (rounding up).
* It is equivalent to x = (u32) ceil((double) x / 65536.0) - 1
*/
x = (x - 1) 16;
/*
* Step 2: Copy the most significant one (MSO) into all bits to its
right.
*
* At this point the right shift above ensures that the 16 MSB of x
are zero.
* Propagate the MSO to all bits to its right (up to 15 bits).
*/
x |= x 1; /* Set the bit to the right of the MSO */
x |= x 2; /* Set the next 2 bits to the right of the MSO */
x |= x 4; /* Set the next 4 bits to the right of the MSO */
x |= x 8; /* Set the next 8 bits to the right of the MS0 */
return x;
}
Here are my test results for all four versions:
For range 0x to 0x00020001 the original orion5x_winctrl_calcsize
returns 0x0
For range 0x00020002 to 0x00040003 the original orion5x_winctrl_calcsize
returns 0x1
For range 0x00040004 to 0x00080007 the original orion5x_winctrl_calcsize
returns 0x3
For range 0x00080008 to 0x001f the original orion5x_winctrl_calcsize
returns 0x7
For range 0x00100010 to 0x0020001f the original orion5x_winctrl_calcsize
returns 0xf
For range 0x00200020 to 0x0040003f the original orion5x_winctrl_calcsize
returns 0x1f
For range 0x00400040 to 0x0080007f the original orion5x_winctrl_calcsize
returns 0x3f
For range 0x00800080 to 0x01ff the original orion5x_winctrl_calcsize
returns 0x7f
For range 0x01000100 to 0x020001ff the original orion5x_winctrl_calcsize
returns 0xff
For range 0x02000200 to 0x040003ff the original orion5x_winctrl_calcsize
returns 0x1ff
For range 0x04000400 to 0x080007ff the original orion5x_winctrl_calcsize
returns 0x3ff
For range 0x08000800 to 0x1fff the original orion5x_winctrl_calcsize
returns 0x7ff
For range 0x10001000 to 0x20001fff the original orion5x_winctrl_calcsize
returns 0xfff
For range 0x20002000 to 0x40003fff the original orion5x_winctrl_calcsize
returns 0x1fff
For range 0x40004000 to 0x80007fff the original orion5x_winctrl_calcsize
returns 0x3fff
For range 0x80008000 to 0x the original orion5x_winctrl_calcsize
returns 0x7fff
For range 0x to 0x0001 Albert Aribaud's
orion5x_winctrl_calcsize returns 0x0
For range 0x0002 to 0x0003 Albert Aribaud's
orion5x_winctrl_calcsize returns 0x1
For range 0x0004 to 0x0007 Albert Aribaud's
orion5x_winctrl_calcsize returns 0x3
For range 0x0008 to 0x000f Albert Aribaud's
orion5x_winctrl_calcsize returns 0x7
For range 0x0010 to 0x001f Albert Aribaud's
orion5x_winctrl_calcsize returns 0xf
For range 0x0020 to 0x003f Albert Aribaud's
orion5x_winctrl_calcsize returns 0x1f
[U-Boot] [PATCH 1/2] TI: DaVinci DA850 EVM: add information regarding DA850 in README.davinci
The README.davinci in documentation folder is missing information regarding DA850 which is a supported DaVinci device. Add this information. Signed-off-by: Sekhar Nori nsek...@ti.com --- applies to latest of U-Boot mainline. doc/README.davinci | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/doc/README.davinci b/doc/README.davinci index 506f0d4..a2e96a5 100644 --- a/doc/README.davinci +++ b/doc/README.davinci @@ -21,6 +21,8 @@ Currently the following boards are supported: * TI DA830 EVM +* TI DA850 EVM + * DM355 based Leopard board * DM644x based schmoogie board @@ -57,6 +59,11 @@ make make da830evm_config make +* TI DA850 EVM: + +make da850evm_config +make + * DM355 based Leopard board: make davinci_dm355leopard_config @@ -114,3 +121,7 @@ http://www.spectrumdigital.com/product_info.php?cPath=103products_id=222 6) TI DA830 EVM http://focus.ti.com/apps/docs/gencontent.tsp?appId=1contentId=52385 http://www.spectrumdigital.com/product_info.php?cPath=37products_id=214 + +7) TI DA850 EVM +http://focus.ti.com/docs/prod/folders/print/omap-l138.html +http://www.logicpd.com/products/development-kits/zoom-omap-l138-evm-development-kit -- 1.6.2.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 2/2] TI: DaVinci DA850 EVM: support passing maximum allowed cpu clock rate information to kernel
The TI DA850/OMAP-L138/AM18x EVM can be populated with devices
having different maximum allowed CPU clock rating.
The maximum clock the chip can support can only be determined from
the label on the package (not software readable).
Introduce a method to pass the maximum allowed clock rate information
to kernel using ATAG_REVISION. The kernel uses this information to
determine the maximum cpu clock rate reachable using cpufreq.
Note that U-Boot itself does not set the CPU clock rate. The CPU
clock is setup by a primary bootloader (UBL). The rate setup by
UBL could be different from the maximum clock rate supported by the
device.
Signed-off-by: Sekhar Nori nsek...@ti.com
---
v4: updated README.davinci to included information regarding ATAG_REVISION.
board/davinci/da8xxevm/da850evm.c | 33 +
doc/README.davinci| 14 ++
include/configs/da850evm.h|1 +
3 files changed, 48 insertions(+), 0 deletions(-)
diff --git a/board/davinci/da8xxevm/da850evm.c
b/board/davinci/da8xxevm/da850evm.c
index eeb456c..266c4d8 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -70,6 +70,39 @@ static const struct lpsc_resource lpsc[] = {
{ DAVINCI_LPSC_GPIO },
};
+#ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
+#define CONFIG_DA850_EVM_MAX_CPU_CLK 3
+#endif
+
+/*
+ * get_board_rev() - setup to pass kernel board revision information
+ * Returns:
+ * bit[0-3]Maximum cpu clock rate supported by onboard SoC
+ * b - 300 MHz
+ * 0001b - 372 MHz
+ * 0010b - 408 MHz
+ * 0011b - 456 MHz
+ */
+u32 get_board_rev(void)
+{
+ char *s;
+ u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
+ u32 rev = 0;
+
+ s = getenv(maxcpuclk);
+ if (s)
+ maxcpuclk = simple_strtoul(s, NULL, 10);
+
+ if (maxcpuclk = 45600)
+ rev = 3;
+ else if (maxcpuclk = 40800)
+ rev = 2;
+ else if (maxcpuclk = 37200)
+ rev = 1;
+
+ return rev;
+}
+
int board_init(void)
{
#ifndef CONFIG_USE_IRQ
diff --git a/doc/README.davinci b/doc/README.davinci
index a2e96a5..0204372 100644
--- a/doc/README.davinci
+++ b/doc/README.davinci
@@ -95,6 +95,20 @@ into the RAM.
The programmers and UBL are always released as part of any standard TI
software release associated with an SOC.
+Environment Variables
+=
+
+The DA850 EVM allows the user to specify the maximum cpu clock allowed by the
+silicon, in Hz, via an environment variable maxcpuclk.
+
+The maximum clock rate allowed depends on the silicon populated on the EVM.
+Please make sure you understand the restrictions placed on this clock in the
+device specific datasheet before setting up this variable. This information is
+passed to the Linux kernel using the ATAG_REVISION atag.
+
+If maxcpuclk is not defined, the configuration CONFIG_DA850_EVM_MAX_CPU_CLK
+is used to obtain this information.
+
Links
=
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 357715d..3ea9032 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -102,6 +102,7 @@
*/
#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100)
#define CONFIG_CMDLINE_TAG
+#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTARGS\
mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp
--
1.6.2.4
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Re: [U-Boot] [PATCH 1/2] I2C: add Marvell TWSI simple driver
Hello Albert, Albert ARIBAUD wrote: Le 26/08/2010 08:30, Heiko Schocher a écrit : Beside of that, I have just some minor codstyling comments: Meanwhile, I've run checkpatch on this file and fixed every warning and error, thus some of your comments were taken care of in the process. That left: +#defineMVTWSI_STATUS_DATA_R_NAK0x58 /* our NAK, not the slave's */ line too long. Checkpatch did not complain on this one. Is there a specific line length contraint beside passing checkpatch? Yep, 78 characters. +/* + * Wait for IFLG to raise, or return 'timeout'; then if status is as expected, + * return 0 (ok) or return 'wrong status'. + */ + blank line not necessary. Which blank line exactly? Between the comment block and code? If so, Yes. does this apply everywhere, i.e. after the topmost license comment block, before blocks of #define, etc? No, there, it is Ok. As a side note, if V2 gets Acked by Prafulla and you, can you add the commit to your i2c tree and ask for a new pull? Anyway, Wolfgang said he won't resume activity on u-boot before sep 5th. Yes, if I and Prafulla accept it, this is the usual way. bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 3/4] i2c: rewrite mvtwsi, support orion5x and kirkwood
Hello Albert, Albert Aribaud wrote: This rewrite of the mvtwsi driver is 25% smaller and much faster and simpler than the previous code. Signed-off-by: Albert Aribaud albert.arib...@free.fr --- drivers/i2c/mvtwsi.c | 748 +++--- 1 files changed, 341 insertions(+), 407 deletions(-) looks OK to me, but can you delete the blank line between a function comment and the code itself? Thanks! bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Orion5x: bugfix: window size (mis)calculation
Le 27/08/2010 07:00, Chris Moore a écrit : Hi list, Hi Chris! [...] For range 0x to 0x Chris Moore's fast orion5x_winctrl_calcsize returns 0x [...] For range 0x8001 to 0x Chris Moore's fast orion5x_winctrl_calcsize returns 0x AIUI (apart from the question of how best to handle a size of 0) this is the required result. I think your proposal to handle size 0 as meaning '4 MB' is fine, since there is no way to express 4MB and a zero size is meaningless as such. If I have misunderstood, please tell me and I'll rewrite. That's fine. Do you want me to resubmit a V2 patch with your change, or will you subit it yourself? HTH. It does, as does every fix that brings orion/kirkwood U-boot nearer to industry strength. :) Cheers, Chris Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Orion5x: bugfix: window size (mis)calculation
Le 27/08/2010 07:37, Albert ARIBAUD a écrit : I think your proposal to handle size 0 as meaning '4 MB' That's 4 *TB*, of course. :) Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
