Re: [U-Boot] [PATCH V2 1/2] Don't add symlink in srctree when using an objtree
Dear =?UTF-8?q?Lo=C3=AFc=20Minier?=, In message 1295439390-16238-1-git-send-email-loic.min...@linaro.org you wrote: When building with srctree != objtree, the build creates arch/soc/cpu specific symlinks in the source tree. This means that the same source tree can't be used for multiple builds at the same time. Also, these symlinks in the source tree are only cleaned up if one passes the same O= to distclean. When srctree != objtree, mkconfig creates an $objtree/include2 directory in the objtree to host the asm - arch/$arch/include/asm symlink so that #include asm can be used. But it also creates another identical symlink in $objtree/include. Then, mkconfig creates two symlinks: $objtree/include/asm/arch - arch/$arch/include/asm/arch-$cpu (or $soc) $objtree/include/asm/proc - arch/$arch/include/asm/proc-armv (on arm) but because $objtree/include/asm points at $srctree already, the two symlinks are created under $srctree. To fix this, create a real $objtree/include/asm directory, instead of a symlink. Update cleanup code accordingly. Signed-off-by: Loïc Minier loic.min...@linaro.org --- Makefile |2 +- mkconfig |3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de If a train station is a place where a train stops, then what's a workstation? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] include/linux/mii.h: update for supporting GE
On Jan 21, 2011, at 1:09 AM, Wolfgang Denk wrote: Dear Macpaul Lin, In message 129134-18586-1-git-send-email-macp...@andestech.com you wrote: This file has been synced (copy) from Linux source code. This commit was based on kernel 2.6.32. It updates gigabit related phy registers and basic definitions. Signed-off-by: Macpaul Lin macp...@andestech.com --- Change v1: pull header file from Linux. Change v2: clean up unused code for u-boot. include/linux/mii.h | 181 ++- 1 files changed, 107 insertions(+), 74 deletions(-) This patch causes build warnings for a number of boards, for example: Configuring for MPC8568MDS board... In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec.c:32: /home/wd/git/u-boot/work/include/linux/mii.h:133:1: warning: LPA_1000FULL redefined In file included from uec.c:31: uec_phy.h:34:1: warning: this is the location of the previous definition In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec.c:32: /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: LPA_1000HALF redefined In file included from uec.c:31: uec_phy.h:35:1: warning: this is the location of the previous definition In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec_phy.c:27: /home/wd/git/u-boot/work/include/linux/mii.h:133:1: warning: LPA_1000FULL redefined In file included from uec_phy.c:26: uec_phy.h:34:1: warning: this is the location of the previous definition In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec_phy.c:27: /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: LPA_1000HALF redefined In file included from uec_phy.c:26: uec_phy.h:35:1: warning: this is the location of the previous definition textdata bss dec hex filename 238866 22824 25252 286942 460de /work/wd/tmp-ppc/u-boot Configuring for MPC8569MDS board... In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec.c:32: /home/wd/git/u-boot/work/include/linux/mii.h:133:1: warning: LPA_1000FULL redefined In file included from uec.c:31: uec_phy.h:34:1: warning: this is the location of the previous definition In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec.c:32: /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: LPA_1000HALF redefined In file included from uec.c:31: uec_phy.h:35:1: warning: this is the location of the previous definition In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec_phy.c:27: /home/wd/git/u-boot/work/include/linux/mii.h:133:1: warning: LPA_1000FULL redefined In file included from uec_phy.c:26: uec_phy.h:34:1: warning: this is the location of the previous definition In file included from /home/wd/git/u-boot/work/include/miiphy.h:37, from uec_phy.c:27: /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: LPA_1000HALF redefined In file included from uec_phy.c:26: uec_phy.h:35:1: warning: this is the location of the previous definition textdata bss dec hex filename 327682 28828 230568 587078 8f546 /work/wd/tmp-ppc/u-boot ... etc. etc. Please fix. Best regards, Wolfgang Denk I posted a fix for this: http://patchwork.ozlabs.org/patch/79439/ - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] ??: [PATCH v2] include/linux/mii.h: update for supporting GE
On Jan 21, 2011, at 1:31 AM, macp...@andestech.com wrote: Dear Wolfgang, /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: LPA_1000HALF redefined In file included from uec_phy.c:26: uec_phy.h:35:1: warning: this is the location of the previous definition textdata bss dec hex filename 327682 28828 230568 587078 8f546 /work/wd/tmp-ppc/u-boot Moreover, after checking drivers/qe/uec_phy.h, I've found some definitions differs from standard linux code. In uec_phy: drivers/qe/uec_phy.h:34:#define LPA_1000FULL0x0400 drivers/qe/uec_phy.h:35:#define LPA_1000HALF0x0200 In Linux: include/linux/mii.h:133:#define LPA_1000FULL0x0800 /* Link partner 1000BASE-T full duplex */ include/linux/mii.h:134:#define LPA_1000HALF0x0400 /* Link partner 1000BASE-T half duplex */ Do you know if this is a wrong defintion on uec_phy ? I'm afraid the fix will lead some mis-behavior for boards has uec_phy. See: http://patchwork.ozlabs.org/patch/79439/ - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/8 v2] powerpc/85xx: add TPL_BOOT support
On Dec 1, 2010, at 9:47 AM, haiying.w...@freescale.com haiying.w...@freescale.com wrote: From: Haiying Wang haiying.w...@freescale.com Signed-off-by: Haiying Wang haiying.w...@freescale.com --- Splitted from TPL patch to only address 85xx changes arch/powerpc/cpu/mpc85xx/cpu_init_nand.c | 34 ++- arch/powerpc/cpu/mpc85xx/start.S | 12 ++-- arch/powerpc/cpu/mpc85xx/u-boot-tpl.lds | 99 ++ 3 files changed, 137 insertions(+), 8 deletions(-) create mode 100644 arch/powerpc/cpu/mpc85xx/u-boot-tpl.lds Did you plan on review this patch? - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/8 v2] Introduce the Tertiary Program loader
On Dec 1, 2010, at 9:35 AM, haiying.w...@freescale.com haiying.w...@freescale.com wrote: From: Haiying Wang haiying.w...@freescale.com TPL is introduced to enable a loader stub that boots out of some type of RAM, after being loaded by an SPL or similar platform-specific mechanism. One example of using this tpl loader is to initialize the ddr through spd code in case the L2 SRAM size is not big enough to hold the final uboot image and the nand spl code needs to be limitated to 4K byte, then tpl code will load the final uboot image after ddr is initialized. Signed-off-by: Haiying Wang haiying.w...@freescale.com --- Incorporate Mike's comment to use new variable NAND_SPL_OBJS-y Makefile | 17 +++-- README | 27 +++ 2 files changed, 42 insertions(+), 2 deletions(-) Wolfgang, Did you plan on review this patch? - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
Dear Tom Warren, On 21 January 2011 09:42, Tom Warren twarren.nvi...@gmail.com wrote: diff --git a/arch/arm/cpu/armv7/tegra2/uart.c b/arch/arm/cpu/armv7/tegra2/uart.c new file mode 100644 index 000..5e60bd8 --- /dev/null +++ b/arch/arm/cpu/armv7/tegra2/uart.c How about move it to drivers/serial/ ? And why don't you use serial multi interface? Thanks Minkyu Kang -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] ??: [PATCH v2] include/linux/mii.h: update for supporting GE
Dear Macpaul, In message 50fd90c65c53fb45badeebcd84ff07f202ceb...@atcpcs06.andestech.com you wrote: /home/wd/git/u-boot/work/include/linux/mii.h:134:1: warning: LPA_1000HALF redefined In file included from uec_phy.c:26: uec_phy.h:35:1: warning: this is the location of the previous definition textdata bss dec hex filename 327682 28828 230568 587078 8f546 /work/wd/tmp-ppc/u-boot Moreover, after checking drivers/qe/uec_phy.h, I've found some definitions differs from standard linux code. In uec_phy: drivers/qe/uec_phy.h:34:#define LPA_1000FULL0x0400 drivers/qe/uec_phy.h:35:#define LPA_1000HALF0x0200 In Linux: include/linux/mii.h:133:#define LPA_1000FULL0x0800 /* Link partner 1000BASE-T full duplex */ include/linux/mii.h:134:#define LPA_1000HALF0x0400 /* Link partner 1000BASE-T half duplex */ Do you know if this is a wrong defintion on uec_phy ? I'm afraid the fix will lead some mis-behavior for boards has uec_phy. These definitions were added by commit 91cdaa3a: commit 91cdaa3a9d7562b869d96774e9c9ddf142c0848d Author: Anton Vorontsov avoront...@ru.mvista.com Date: Mon Mar 24 20:46:24 2008 +0300 uec: add support for gbit mii status readings Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com Anton, can you please comment? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de There's no honorable way to kill, no gentle way to destroy. There is nothing good in war. Except its ending. -- Abraham Lincoln, The Savage Curtain, stardate 5906.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] include/linux/mii.h: update for supporting GE
Dear Kumar Gala, In message 222da5a3-7289-4f01-b0ce-8d02dddb2...@kernel.crashing.org you wrote: ... I posted a fix for this: http://patchwork.ozlabs.org/patch/79439/ I see. But I'm still scared about the changed values in the #defines Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de For every complex problem, there is a solution that is simple, neat, and wrong. - Mark Twain ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] ??: [PATCH v2] include/linux/mii.h: update for supporting GE
Dear Kumar Gala, In message 4e0178ed-1410-4ca6-b173-9df8bcbc4...@kernel.crashing.org you wrote: Do you know if this is a wrong defintion on uec_phy ? I'm afraid the fix will lead some mis-behavior for boards has uec_phy. See: http://patchwork.ozlabs.org/patch/79439/ Have you tested this patch on the affected boards? I'd be surprised if both the old and the new values would work? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I see that Microsoft's campaign to destroy all knowledge of any operating environment but its own environment-of-the-year has succeeded in creating a generation of users who don't understand the concept of a shell... -- L. Peter Deutsch in m0x5jnx-000r...@lamp.aladdin.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4] ppc4xx: Add DLVision-10G board support
Board support for the Guntermann Drunck DLVision-10G.
Adds support for multiple FPGAs per board for gdsys 405ep
architecture.
Adds support for dual link osd hardware for gdsys 405ep.
Signed-off-by: Dirk Eibach eib...@gdsys.de
---
---
Replaces
- 0001-ppc4xx-Add-DLVision-10G-board-support.patch
- 0002-ppc4xx-Support-multiple-FPGAs.patch
- 0003-ppc4xx-Support-dual-link-OSD.patch
Changes for v2:
- define EBC register values through appropriate macros
- fix condition for extension of struct global_data
Changes for v3:
- added missing commits from v2
Changes for v4:
- struct based register access
MAINTAINERS|1 +
arch/powerpc/include/asm/global_data.h |3 +
board/gdsys/405ep/405ep.c | 66 ++--
board/gdsys/405ep/Makefile |1 +
board/gdsys/405ep/dlvision-10g.c | 239
board/gdsys/405ep/io.c | 19 +--
board/gdsys/405ep/iocon.c | 24 +--
board/gdsys/common/Makefile|1 +
board/gdsys/common/fpga.h | 37
board/gdsys/common/osd.c | 309 +++
board/gdsys/common/osd.h |2 +-
boards.cfg |1 +
include/configs/dlvision-10g.h | 316
include/configs/io.h |8 +-
include/configs/iocon.h| 25 ++-
include/gdsys_fpga.h | 108 +++
16 files changed, 994 insertions(+), 166 deletions(-)
create mode 100644 board/gdsys/405ep/dlvision-10g.c
delete mode 100644 board/gdsys/common/fpga.h
create mode 100644 include/configs/dlvision-10g.h
create mode 100644 include/gdsys_fpga.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 0590ad9..ea882c8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -142,6 +142,7 @@ Dirk Eibach eib...@gdsys.de
devconcenterPPC460EX
dlvisionPPC405EP
+ dlvision-10gPPC405EP
gdppc440etx PPC440EP/GR
intip PPC460EX
io PPC405EP
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index 2e218de..a33ca2f 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -172,6 +172,9 @@ typedef struct global_data {
#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
unsigned long kbd_status;
#endif
+#ifdef CONFIG_SYS_FPGA_COUNT
+ unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
+#endif
#if defined(CONFIG_WD_MAX_RATE)
unsigned long long wdt_last;/* trace watch-dog triggering rate */
#endif
diff --git a/board/gdsys/405ep/405ep.c b/board/gdsys/405ep/405ep.c
index d3bd233..86a3ec8 100644
--- a/board/gdsys/405ep/405ep.c
+++ b/board/gdsys/405ep/405ep.c
@@ -26,8 +26,9 @@
#include asm/processor.h
#include asm/io.h
#include asm/ppc4xx-gpio.h
+#include asm/global_data.h
-#include ../common/fpga.h
+#include gdsys_fpga.h
#define LATCH0_BASE (CONFIG_SYS_LATCH_BASE)
#define LATCH1_BASE (CONFIG_SYS_LATCH_BASE + 0x100)
@@ -36,8 +37,29 @@
#define REFLECTION_TESTPATTERN 0xdede
#define REFLECTION_TESTPATTERN_INV (~REFLECTION_TESTPATTERN 0x)
+DECLARE_GLOBAL_DATA_PTR;
+
+int get_fpga_state(unsigned dev)
+{
+ return gd-fpga_state[dev];
+}
+
+void print_fpga_state(unsigned dev)
+{
+ if (gd-fpga_state[dev] FPGA_STATE_DONE_FAILED)
+ puts( Waiting for FPGA-DONE timed out.\n);
+ if (gd-fpga_state[dev] FPGA_STATE_REFLECTION_FAILED)
+ puts( FPGA reflection test failed.\n);
+}
+
int board_early_init_f(void)
{
+ unsigned k;
+ unsigned ctr;
+
+ for (k = 0; k CONFIG_SYS_FPGA_COUNT; ++k)
+ gd-fpga_state[k] = 0;
+
mtdcr(UIC0SR, 0x); /* clear all ints */
mtdcr(UIC0ER, 0x); /* disable all ints */
mtdcr(UIC0CR, 0x); /* set all to be non-critical */
@@ -66,10 +88,18 @@ int board_early_init_f(void)
/*
* wait for fpga-done
-* fail ungraceful if fpga is not configuring properly
*/
- while (!(in_le16((void *)LATCH2_BASE) 0x0010))
- ;
+ for (k = 0; k CONFIG_SYS_FPGA_COUNT; ++k) {
+ ctr = 0;
+ while (!(in_le16((void *)LATCH2_BASE)
+CONFIG_SYS_FPGA_DONE(k))) {
+ udelay(10);
+ if (ctr++ 5) {
+ gd-fpga_state[k] |= FPGA_STATE_DONE_FAILED;
+ break;
+ }
+ }
+ }
/*
* setup io-latches for boot (stop reset)
@@ -78,15 +108,25 @@ int board_early_init_f(void)
out_le16((void *)LATCH0_BASE, CONFIG_SYS_LATCH0_BOOT);
out_le16((void *)LATCH1_BASE, CONFIG_SYS_LATCH1_BOOT);
- /*
-* wait
Re: [U-Boot] [PATCH] arm926ejs: timer: Replace bss variable by gdr
Hello Albert, Albert ARIBAUD wrote: Le 20/01/2011 21:43, Albert ARIBAUD a écrit : Le 10/12/2010 10:33, Heiko Schocher a écrit : Reuse the gd-tbl value for timestamp and add gd-lastinc for lastinc bss values in the arm926ejs timers implementation. The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted. This patch is similiar to the patch Dirk Behme posted for the armv7/omap-common/timer.c and added suggestions from Reinhard Meyer. Tested on the arm926ejs mx27 based magnesium board Tested on the arm926ejs kirkwood based suen3 board Signed-off-by: Heiko Schocherh...@denx.de cc: Albert ARIBAUDalbert.arib...@free.fr cc: Prafulla Wadaskarprafu...@marvell.com cc: Stefano Babicsba...@denx.de cc: Reinhard Meyeru-b...@emk-elektronik.de Signed-off-by: Heiko Schocherh...@denx.de --- arch/arm/cpu/arm926ejs/davinci/timer.c |6 -- arch/arm/cpu/arm926ejs/kirkwood/timer.c |6 -- arch/arm/cpu/arm926ejs/mb86r0x/timer.c |6 -- arch/arm/cpu/arm926ejs/mx25/timer.c |6 -- arch/arm/cpu/arm926ejs/mx27/timer.c |6 -- arch/arm/cpu/arm926ejs/omap/timer.c |6 -- arch/arm/cpu/arm926ejs/orion5x/timer.c |6 -- arch/arm/cpu/arm926ejs/spear/timer.c |6 -- arch/arm/cpu/arm926ejs/versatile/timer.c |6 -- 9 files changed, 36 insertions(+), 18 deletions(-) [...] #define TIMER_ENABLE (1 7) #define TIMER_MODE_MSK (1 6) Applied to u-boot-arm, with a trivial merge for davinci. Correction -- can't apply it *and* retain correct authorship in commit. Heiko, can you post a rebased version? Ok, I rebase this patch against current mainline, and send a new version. bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] arm926ejs: timer: Replace bss variable by gdr
Reuse the gd-tbl value for timestamp and add gd-lastinc for lastinc bss
values in the arm926ejs timers implementation.
The usage of bss values in drivers before initialisation of bss is forbidden.
In that special case some data in .rel.dyn gets corrupted.
This patch is similiar to the patch Dirk Behme posted
for the armv7/omap-common/timer.c and added suggestions
from Reinhard Meyer.
Tested on the arm926ejs mx27 based magnesium board
Tested on the arm926ejs kirkwood based suen3 board
Signed-off-by: Heiko Schocher h...@denx.de
cc: Albert ARIBAUD albert.arib...@free.fr
cc: Prafulla Wadaskar prafu...@marvell.com
cc: Stefano Babic sba...@denx.de
cc: Reinhard Meyer u-b...@emk-elektronik.de
---
- changes since v1:
rebased and fixed an trivial merge issue in
arch/arm/cpu/arm926ejs/davinci/timer.c
arch/arm/cpu/arm926ejs/davinci/timer.c |4
arch/arm/cpu/arm926ejs/kirkwood/timer.c |6 --
arch/arm/cpu/arm926ejs/mb86r0x/timer.c |6 --
arch/arm/cpu/arm926ejs/mx25/timer.c |6 --
arch/arm/cpu/arm926ejs/mx27/timer.c |6 --
arch/arm/cpu/arm926ejs/omap/timer.c |6 --
arch/arm/cpu/arm926ejs/orion5x/timer.c |6 --
arch/arm/cpu/arm926ejs/spear/timer.c |6 --
arch/arm/cpu/arm926ejs/versatile/timer.c |6 --
9 files changed, 36 insertions(+), 16 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c
b/arch/arm/cpu/arm926ejs/davinci/timer.c
index 1c6fa4a..9fff95e 100644
--- a/arch/arm/cpu/arm926ejs/davinci/timer.c
+++ b/arch/arm/cpu/arm926ejs/davinci/timer.c
@@ -62,6 +62,10 @@ static struct davinci_timer * const timer =
#define TIMER_LOAD_VAL 0x
#define TIM_CLK_DIV16
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd-tbl
+#define lastinc gd-lastinc
int timer_init(void)
{
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/timer.c
b/arch/arm/cpu/arm926ejs/kirkwood/timer.c
index 2ec6a93..3e80329 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/timer.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/timer.c
@@ -83,8 +83,10 @@ struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers
*)KW_TIMER_BASE;
#define READ_TIMER (readl(CNTMR_VAL_REG(UBOOT_CNTR)) /
\
(CONFIG_SYS_TCLK / 1000))
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd-tbl
+#define lastdec gd-lastinc
void reset_timer_masked(void)
{
diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
index 9175b71..6966b0d 100644
--- a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
+++ b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
@@ -33,8 +33,10 @@
#define TIMER_LOAD_VAL 0x
#define TIMER_FREQ (CONFIG_MB86R0x_IOCLK / 256)
-static unsigned long long timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd-tbl
+#define lastdec gd-lastinc
static inline unsigned long long tick_to_time(unsigned long long tick)
{
diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c
b/arch/arm/cpu/arm926ejs/mx25/timer.c
index 11d41a8..14f0c2d 100644
--- a/arch/arm/cpu/arm926ejs/mx25/timer.c
+++ b/arch/arm/cpu/arm926ejs/mx25/timer.c
@@ -41,8 +41,10 @@
#include asm/io.h
#include asm/arch/imx-regs.h
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd-tbl
+#define lastinc gd-lastinc
/*
* time is measured in 1 / CONFIG_SYS_HZ seconds,
diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c
b/arch/arm/cpu/arm926ejs/mx27/timer.c
index 8f1d47b..5c1cf01 100644
--- a/arch/arm/cpu/arm926ejs/mx27/timer.c
+++ b/arch/arm/cpu/arm926ejs/mx27/timer.c
@@ -43,8 +43,10 @@
#define GPTCR_CLKSOURCE_32 (4 1)/* Clock source */
#define GPTCR_TEN 1 /* Timer enable */
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd-tbl
+#define lastinc gd-lastinc
/*
* time is measured in 1 / CONFIG_SYS_HZ seconds,
diff --git a/arch/arm/cpu/arm926ejs/omap/timer.c
b/arch/arm/cpu/arm926ejs/omap/timer.c
index 7d4b6e6..88a0ee6 100644
--- a/arch/arm/cpu/arm926ejs/omap/timer.c
+++ b/arch/arm/cpu/arm926ejs/omap/timer.c
@@ -42,8 +42,10 @@
/* macro to read the 32 bit timer */
#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8))
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd-tbl
+#define lastdec gd-lastinc
int timer_init (void)
{
diff --git a/arch/arm/cpu/arm926ejs/orion5x/timer.c
b/arch/arm/cpu/arm926ejs/orion5x/timer.c
index 089ef47..bbab226 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/timer.c
+++ b/arch/arm/cpu/arm926ejs/orion5x/timer.c
@@ -90,8 +90,10 @@ static inline ulong read_timer(void)
/ (CONFIG_SYS_TCLK / 1000);
}
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd-tbl
+#define lastdec gd-lastinc
void reset_timer_masked(void)
{
diff --git
[U-Boot] [PATCH v3] arm926ejs: timer: Replace bss variable by gdr
Reuse the gd-tbl value for timestamp and add gd-lastinc for lastinc bss
values in the arm926ejs timers implementation.
The usage of bss values in drivers before initialisation of bss is forbidden.
In that special case some data in .rel.dyn gets corrupted.
This patch is similiar to the patch Dirk Behme posted
for the armv7/omap-common/timer.c and added suggestions
from Reinhard Meyer.
Tested on the arm926ejs mx27 based magnesium board
Tested on the arm926ejs kirkwood based suen3 board
Signed-off-by: Heiko Schocher h...@denx.de
cc: Albert ARIBAUD albert.arib...@free.fr
cc: Prafulla Wadaskar prafu...@marvell.com
cc: Stefano Babic sba...@denx.de
cc: Reinhard Meyer u-b...@emk-elektronik.de
---
- changes since v1:
rebased and fixed an trivial merge issue in
arch/arm/cpu/arm926ejs/davinci/timer.c
- changes since v2:
removed changes in arch/arm/cpu/arm926ejs/davinci/timer.c
complete, as this is fixed in the meantime
arch/arm/cpu/arm926ejs/kirkwood/timer.c |6 --
arch/arm/cpu/arm926ejs/mb86r0x/timer.c |6 --
arch/arm/cpu/arm926ejs/mx25/timer.c |6 --
arch/arm/cpu/arm926ejs/mx27/timer.c |6 --
arch/arm/cpu/arm926ejs/omap/timer.c |6 --
arch/arm/cpu/arm926ejs/orion5x/timer.c |6 --
arch/arm/cpu/arm926ejs/spear/timer.c |6 --
arch/arm/cpu/arm926ejs/versatile/timer.c |6 --
8 files changed, 32 insertions(+), 16 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/timer.c
b/arch/arm/cpu/arm926ejs/kirkwood/timer.c
index 2ec6a93..3e80329 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/timer.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/timer.c
@@ -83,8 +83,10 @@ struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers
*)KW_TIMER_BASE;
#define READ_TIMER (readl(CNTMR_VAL_REG(UBOOT_CNTR)) /
\
(CONFIG_SYS_TCLK / 1000))
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd-tbl
+#define lastdec gd-lastinc
void reset_timer_masked(void)
{
diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
index 9175b71..6966b0d 100644
--- a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
+++ b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
@@ -33,8 +33,10 @@
#define TIMER_LOAD_VAL 0x
#define TIMER_FREQ (CONFIG_MB86R0x_IOCLK / 256)
-static unsigned long long timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd-tbl
+#define lastdec gd-lastinc
static inline unsigned long long tick_to_time(unsigned long long tick)
{
diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c
b/arch/arm/cpu/arm926ejs/mx25/timer.c
index 11d41a8..14f0c2d 100644
--- a/arch/arm/cpu/arm926ejs/mx25/timer.c
+++ b/arch/arm/cpu/arm926ejs/mx25/timer.c
@@ -41,8 +41,10 @@
#include asm/io.h
#include asm/arch/imx-regs.h
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd-tbl
+#define lastinc gd-lastinc
/*
* time is measured in 1 / CONFIG_SYS_HZ seconds,
diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c
b/arch/arm/cpu/arm926ejs/mx27/timer.c
index 8f1d47b..5c1cf01 100644
--- a/arch/arm/cpu/arm926ejs/mx27/timer.c
+++ b/arch/arm/cpu/arm926ejs/mx27/timer.c
@@ -43,8 +43,10 @@
#define GPTCR_CLKSOURCE_32 (4 1)/* Clock source */
#define GPTCR_TEN 1 /* Timer enable */
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd-tbl
+#define lastinc gd-lastinc
/*
* time is measured in 1 / CONFIG_SYS_HZ seconds,
diff --git a/arch/arm/cpu/arm926ejs/omap/timer.c
b/arch/arm/cpu/arm926ejs/omap/timer.c
index 7d4b6e6..88a0ee6 100644
--- a/arch/arm/cpu/arm926ejs/omap/timer.c
+++ b/arch/arm/cpu/arm926ejs/omap/timer.c
@@ -42,8 +42,10 @@
/* macro to read the 32 bit timer */
#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8))
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd-tbl
+#define lastdec gd-lastinc
int timer_init (void)
{
diff --git a/arch/arm/cpu/arm926ejs/orion5x/timer.c
b/arch/arm/cpu/arm926ejs/orion5x/timer.c
index 089ef47..bbab226 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/timer.c
+++ b/arch/arm/cpu/arm926ejs/orion5x/timer.c
@@ -90,8 +90,10 @@ static inline ulong read_timer(void)
/ (CONFIG_SYS_TCLK / 1000);
}
-static ulong timestamp;
-static ulong lastdec;
+DECLARE_GLOBAL_DATA_PTR;
+
+#define timestamp gd-tbl
+#define lastdec gd-lastinc
void reset_timer_masked(void)
{
diff --git a/arch/arm/cpu/arm926ejs/spear/timer.c
b/arch/arm/cpu/arm926ejs/spear/timer.c
index 06858b4..66cf4de 100644
--- a/arch/arm/cpu/arm926ejs/spear/timer.c
+++ b/arch/arm/cpu/arm926ejs/spear/timer.c
@@ -36,8 +36,10 @@ static struct gpt_regs *const gpt_regs_p =
static struct misc_regs *const misc_regs_p =
(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
-static ulong timestamp;
Re: [U-Boot] [PATCH V3 05/11] I2C: mxc_i2c: address failure with mx35 processor
On 01/21/2011 07:36 AM, Heiko Schocher wrote:
+static int wait_complete(void)
+{
+int timeout = I2C_MAX_TIMEOUT;
+
+while ((!(readw(I2C_BASE + I2SR) I2SR_ICF)) (--timeout)) {
+writew(0, I2C_BASE + I2SR);
+udelay(1);
+}
+udelay(200);
Why is this delay necessary? Why exactly 200? Is this documented
somewhere in the doc?
Rather I do not have a clear explanation. In the manual there is a hint
regarding a delay that SW must introduce after setting the RSTA bit and
before writing data into the I2DR register. Really this delay should be
very short, but I checked removing the udelay() or decreasing the value
to some uSec and it does not work.
This is the output with debugging after removing the udelay call:
i2c_read chip: 0x08 addr: 0x0007 alen: 1 len: 3
i2c_addr:chip address cycle fail(a1)
i2c_addr failed
i2c_read chip: 0x08 addr: 0x001e alen: 1 len: 3
i2c_addr:chip address cycle fail(a1)
i2c_addr failed
This happens in the i2_read() call, and it is the function where the
RSTA bit is set. I can only presume the two things are related.
I checked then with the driver provided by Freescale in the LTIB, and
also in this driver a delay is set after checking transfer is completed.
Stefano
--
=
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de
=
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] at91: fixed 'esd gmbh' meesc and otc570 boards
Signed-off-by: Daniel Gorsulowski daniel.gorsulow...@esd.eu
---
There is still a bug in USART config. This patch is for reviewing only!
board/esd/meesc/config.mk |1 -
board/esd/meesc/meesc.c| 39 +-
board/esd/otc570/config.mk |1 -
board/esd/otc570/otc570.c | 51 +++--
boards.cfg |6 +-
include/configs/meesc.h| 150 ++---
include/configs/otc570.h | 179 +---
7 files changed, 241 insertions(+), 186 deletions(-)
delete mode 100644 board/esd/meesc/config.mk
delete mode 100644 board/esd/otc570/config.mk
diff --git a/board/esd/meesc/config.mk b/board/esd/meesc/config.mk
deleted file mode 100644
index 2077692..000
--- a/board/esd/meesc/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x21f0
diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
index 41fa3e1..46cd33c 100644
--- a/board/esd/meesc/meesc.c
+++ b/board/esd/meesc/meesc.c
@@ -3,7 +3,7 @@
* Stelian Pop stelian@leadtechdesign.com
* Lead Tech Design www.leadtechdesign.com
*
- * (C) Copyright 2009-2010
+ * (C) Copyright 2009-2011
* Daniel Gorsulowski daniel.gorsulow...@esd.eu
* esd electronic system design gmbh www.esd.eu
*
@@ -27,6 +27,7 @@
*/
#include common.h
+#include asm/io.h
#include asm/arch/at91sam9263.h
#include asm/arch/at91sam9_smc.h
#include asm/arch/at91_common.h
@@ -36,7 +37,6 @@
#include asm/arch/at91_pio.h
#include asm/arch/clk.h
#include asm/arch/hardware.h
-#include asm/arch/io.h
#include netdev.h
DECLARE_GLOBAL_DATA_PTR;
@@ -67,8 +67,8 @@ int get_hw_rev(void)
static void meesc_nand_hw_init(void)
{
unsigned long csa;
- at91_smc_t *smc= (at91_smc_t *) AT91_SMC0_BASE;
- at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
+ at91_smc_t *smc= (at91_smc_t *) ATMEL_BASE_SMC0;
+ at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
/* Enable CS3 */
csa = readl(matrix-csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
@@ -88,7 +88,7 @@ static void meesc_nand_hw_init(void)
writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
AT91_SMC_MODE_EXNW_DISABLE |
AT91_SMC_MODE_DBW_8 |
- AT91_SMC_MODE_TDF_CYCLE(2),
+ AT91_SMC_MODE_TDF_CYCLE(3),
smc-cs[3].mode);
/* Configure RDY/BSY */
@@ -102,9 +102,9 @@ static void meesc_nand_hw_init(void)
#ifdef CONFIG_MACB
static void meesc_macb_hw_init(void)
{
- at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
/* Enable clock */
- writel(1 AT91SAM9263_ID_EMAC, pmc-pcer);
+ writel(1 ATMEL_ID_EMAC, pmc-pcer);
at91_macb_hw_init();
}
#endif
@@ -117,7 +117,7 @@ static void meesc_macb_hw_init(void)
*/
static void meesc_ethercat_hw_init(void)
{
- at91_smc_t *smc1 = (at91_smc_t *) AT91_SMC1_BASE;
+ at91_smc_t *smc1 = (at91_smc_t *) ATMEL_BASE_SMC1;
/* Configure SMC EBI1_CS0 for EtherCAT */
writel(AT91_SMC_SETUP_NWE(0) | AT91_SMC_SETUP_NCS_WR(0) |
@@ -142,8 +142,9 @@ static void meesc_ethercat_hw_init(void)
int dram_init(void)
{
- gd-bd-bi_dram[0].start = PHYS_SDRAM;
- gd-bd-bi_dram[0].size = get_ram_size((long *) PHYS_SDRAM, (1 27));
+ gd-bd-bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd-bd-bi_dram[0].size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE,
+ (1 27));
return 0;
}
@@ -151,7 +152,7 @@ int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
- rc = macb_eth_initialize(0, (void *)AT91_EMAC_BASE, 0x00);
+ rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
#endif
return rc;
}
@@ -225,7 +226,7 @@ int misc_init_r(void)
{
char*str;
charbuf[32];
- at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
/*
* Normally the processor clock has a divisor of 2.
@@ -248,22 +249,22 @@ int misc_init_r(void)
int board_init(void)
{
- at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
/* Peripheral Clock Enable Register */
- writel(1 AT91SAM9263_ID_PIOA |
- 1 AT91SAM9263_ID_PIOB |
- 1 AT91SAM9263_ID_PIOCDE |
- 1 AT91SAM9263_ID_UHP,
+ writel(1 ATMEL_ID_PIOA |
+ 1 ATMEL_ID_PIOB |
+ 1 ATMEL_ID_PIOCDE |
+ 1 ATMEL_ID_UHP,
pmc-pcer);
/* initialize ET1100 Controller */
meesc_ethercat_hw_init();
/* adress of boot parameters */
- gd-bd-bi_boot_params = PHYS_SDRAM + 0x100;
+ gd-bd-bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
Re: [U-Boot] [PATCH v4 7/8] imximage: Add MX53 boot image support
On 01/20/2011 10:28 PM, Albert ARIBAUD wrote: Of course I was late to the dance... Stefano, did you rebase your tree? I still see this patch in your current master. Hi Albert, I have rebased my tree but not pushed on git.denx because I would like to replace the patch with the new version sent by Jason. However, it requires probably some more time for the review. I have removed the patch from the tree, but a couple of other patches were added. I send you a pull request. Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] ??: [PATCH v2] include/linux/mii.h: update for supporting GE
On Jan 21, 2011, at 2:27 AM, Wolfgang Denk wrote: Dear Kumar Gala, In message 4e0178ed-1410-4ca6-b173-9df8bcbc4...@kernel.crashing.org you wrote: Do you know if this is a wrong defintion on uec_phy ? I'm afraid the fix will lead some mis-behavior for boards has uec_phy. See: http://patchwork.ozlabs.org/patch/79439/ Have you tested this patch on the affected boards? I'd be surprised if both the old and the new values would work? I haven't, but I'll see if we have a system working with uec 1G link. - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-Boot support for board(s) meesc, otc570
Dear Reinhard, Reinhard Meyer wrote: Dear Daniel Gorsulowski, Hello Reinhard, Reinhard Meyer wrote: Dear Daniel Gorsulowski, ... The at91sam9260(9xe)ek board builds fine and works. I can confirm that. Use that as a template or reference what to do. You should *only* need to adapt board/*/files and your configs/board.h files. And of course updated entries in boards.cfg. Not quiet. I had to fix arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c additionally. Yes, of course... I had only reworked the 9260 variant yet. You should need to change it similarly to at91sam9260_devices.c... With my adoptions, my boards builds fine. But they do not boot. Can you really confirm that the at91sam9260ek board boots? I have no chance to debug my problems, so I have no idea, why my boards does not boot. Yes it does. What exactly does does not boot mean? No message at all? Yes, sorry for indefinite description... There is no message at all, except for bootrom 'RomBOOT' promt. Check that your AT91Bootstrap loads u-boot to a sane address not at the very end of DRAM, and that CONFIG_SYS_TEXT_BASE is exactly the address where AT91Bootstrap loads u-boot. (I changed AT91Bootstrap to load u-boot to the very begin of DRAM for our boards.) I neither change the AT91Bootstrap nor the CONFIG_SYS_TEXT_BASE address, so the problem must be located elsewhere. Today I found out by GPIO debugging, that U-Boot seems to boot but prints its startup messages to wrong USART with proper baudrate. I'll try to find out, why there is no output on DBGU. Nevertheless, should I send my patches for reviewing? Of course. We might see something that helps you. Ok, I'll do so. Best Regards, Reinhard Best regards, Daniel Gorsulowski ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] at91: fixed at91sam9263 system file
Signed-off-by: Daniel Gorsulowski daniel.gorsulow...@esd.eu
---
arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c | 55 +++--
1 files changed, 18 insertions(+), 37 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c
b/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c
index deda3e5..15e880a 100644
--- a/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c
@@ -3,7 +3,7 @@
* Stelian Pop stelian@leadtechdesign.com
* Lead Tech Design www.leadtechdesign.com
*
- * (C) Copyright 2009
+ * (C) Copyright 2009-2011
* Daniel Gorsulowski daniel.gorsulow...@esd.eu
* esd electronic system design gmbh www.esd.eu
*
@@ -27,78 +27,59 @@
*/
#include common.h
+#include asm/io.h
#include asm/arch/hardware.h
-#include asm/arch/io.h
#include asm/arch/at91_common.h
#include asm/arch/at91_pmc.h
#include asm/arch/at91_pio.h
void at91_serial0_hw_init(void)
{
- at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 26, 1); /* TXD0 */
at91_set_a_periph(AT91_PIO_PORTA, 27, 0); /* RXD0 */
- writel(1 AT91SAM9263_ID_US0, pmc-pcer);
+ writel(1 ATMEL_ID_USART0, pmc-pcer);
}
void at91_serial1_hw_init(void)
{
- at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTD, 0, 1);/* TXD1 */
at91_set_a_periph(AT91_PIO_PORTD, 1, 0);/* RXD1 */
- writel(1 AT91SAM9263_ID_US1, pmc-pcer);
+ writel(1 ATMEL_ID_USART1, pmc-pcer);
}
void at91_serial2_hw_init(void)
{
- at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTD, 2, 1);/* TXD2 */
at91_set_a_periph(AT91_PIO_PORTD, 3, 0);/* RXD2 */
- writel(1 AT91SAM9263_ID_US2, pmc-pcer);
+ writel(1 ATMEL_ID_USART2, pmc-pcer);
}
-void at91_serial3_hw_init(void)
+void at91_seriald_hw_init(void)
{
- at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTC, 30, 0); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTC, 31, 1); /* DTXD */
- writel(1 AT91_ID_SYS, pmc-pcer);
+ writel(1 ATMEL_ID_SYS, pmc-pcer);
}
-void at91_serial_hw_init(void)
-{
-#ifdef CONFIG_USART0
- at91_serial0_hw_init();
-#endif
-
-#ifdef CONFIG_USART1
- at91_serial1_hw_init();
-#endif
-
-#ifdef CONFIG_USART2
- at91_serial2_hw_init();
-#endif
-
-#ifdef CONFIG_USART3 /* DBGU */
- at91_serial3_hw_init();
-#endif
-}
-
-#ifdef CONFIG_HAS_DATAFLASH
+#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
void at91_spi0_hw_init(unsigned long cs_mask)
{
- at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_b_periph(AT91_PIO_PORTA, 0, 0);/* SPI0_MISO */
at91_set_b_periph(AT91_PIO_PORTA, 1, 0);/* SPI0_MOSI */
at91_set_b_periph(AT91_PIO_PORTA, 2, 0);/* SPI0_SPCK */
/* Enable clock */
- writel(1 AT91SAM9263_ID_SPI0, pmc-pcer);
+ writel(1 ATMEL_ID_SPI0, pmc-pcer);
if (cs_mask (1 0)) {
at91_set_b_periph(AT91_PIO_PORTA, 5, 1);
@@ -128,14 +109,14 @@ void at91_spi0_hw_init(unsigned long cs_mask)
void at91_spi1_hw_init(unsigned long cs_mask)
{
- at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 13, 0); /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* SPI1_SPCK */
/* Enable clock */
- writel(1 AT91SAM9263_ID_SPI1, pmc-pcer);
+ writel(1 ATMEL_ID_SPI1, pmc-pcer);
if (cs_mask (1 0)) {
at91_set_a_periph(AT91_PIO_PORTB, 15, 1);
@@ -203,12 +184,12 @@ void at91_uhp_hw_init(void)
#ifdef CONFIG_AT91_CAN
void at91_can_hw_init(void)
{
- at91_pmc_t *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+ at91_pmc_t *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* CAN_TX */
at91_set_a_periph(AT91_PIO_PORTA, 14, 1); /* CAN_RX */
/* Enable clock */
- writel(1 AT91SAM9263_ID_CAN, pmc-pcer);
+ writel(1 ATMEL_ID_CAN, pmc-pcer);
}
#endif
--
1.5.3
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Re: [U-Boot] [PATCH V3 05/11] I2C: mxc_i2c: address failure with mx35 processor
Hello Stefano,
Stefano Babic wrote:
On 01/21/2011 07:36 AM, Heiko Schocher wrote:
+static int wait_complete(void)
+{
+ int timeout = I2C_MAX_TIMEOUT;
+
+ while ((!(readw(I2C_BASE + I2SR) I2SR_ICF)) (--timeout)) {
+ writew(0, I2C_BASE + I2SR);
+ udelay(1);
+ }
+ udelay(200);
Why is this delay necessary? Why exactly 200? Is this documented
somewhere in the doc?
Rather I do not have a clear explanation. In the manual there is a hint
regarding a delay that SW must introduce after setting the RSTA bit and
before writing data into the I2DR register. Really this delay should be
very short, but I checked removing the udelay() or decreasing the value
to some uSec and it does not work.
This is the output with debugging after removing the udelay call:
i2c_read chip: 0x08 addr: 0x0007 alen: 1 len: 3
i2c_addr:chip address cycle fail(a1)
i2c_addr failed
i2c_read chip: 0x08 addr: 0x001e alen: 1 len: 3
i2c_addr:chip address cycle fail(a1)
i2c_addr failed
This happens in the i2_read() call, and it is the function where the
RSTA bit is set. I can only presume the two things are related.
I checked then with the driver provided by Freescale in the LTIB, and
also in this driver a delay is set after checking transfer is completed.
Thanks for the explanation, so:
Acked-by: Heiko Schocher h...@denx.de
bye,
Heiko
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[U-Boot] [GIT PULL] Pull request: u-boot-imx
Hi Albert, The following changes since commit d6a5e6d531e357dd8016141f73d370d02886a7eb: Cleanup .boards.depend when using an objtree (2011-01-21 08:56:50 +0100) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master Liu Hui-R64343 (8): MX51EVK: UART does not print out the early information MX5: Add initial support for MX53 processor fec_mxc: add support for MX53 processor serial_mxc: add support for MX53 processor mxc_gpio: add support for MX53 processor mxc_i2c: add support for MX53 processor fsl_pmic: add I2C interface support MX5:MX53: add initial support for MX53EVK board Marek Vasut (1): BLOCK: Add freescale IMX51 PATA driver Stefano Babic (1): mxc_nand: add support for i.MX35 processor MAINTAINERS |4 + arch/arm/cpu/armv7/mx5/iomux.c | 30 ++- arch/arm/cpu/armv7/mx5/lowlevel_init.S | 91 +++--- arch/arm/cpu/armv7/mx5/soc.c| 22 +- arch/arm/include/asm/arch-mx5/asm-offsets.h |5 + arch/arm/include/asm/arch-mx5/imx-regs.h| 82 ++--- arch/arm/include/asm/arch-mx5/iomux.h | 102 -- arch/arm/include/asm/arch-mx5/mx5x_pins.h | 469 ++- board/freescale/mx51evk/mx51evk.c | 11 +- board/freescale/mx53evk/Makefile| 48 +++ board/freescale/mx53evk/config.mk | 24 ++ board/freescale/mx53evk/imximage.cfg| 112 +++ board/freescale/mx53evk/mx53evk.c | 397 +++ boards.cfg |1 + drivers/block/Makefile |1 + drivers/block/mxc_ata.c | 149 + drivers/gpio/mxc_gpio.c |9 +- drivers/i2c/mxc_i2c.c | 21 +- drivers/misc/fsl_pmic.c | 45 +++- drivers/mtd/nand/mxc_nand.c |6 +- drivers/net/fec_mxc.c |2 +- drivers/net/fec_mxc.h |4 +- drivers/serial/serial_mxc.c |6 + include/configs/mx51evk.h |5 +- include/configs/mx53evk.h | 193 +++ include/configs/vision2.h |3 +- include/mc13892.h |5 + 27 files changed, 1620 insertions(+), 227 deletions(-) mode change 100644 = 100755 arch/arm/cpu/armv7/mx5/iomux.c mode change 100644 = 100755 arch/arm/cpu/armv7/mx5/lowlevel_init.S mode change 100644 = 100755 arch/arm/include/asm/arch-mx5/imx-regs.h mode change 100644 = 100755 arch/arm/include/asm/arch-mx5/mx5x_pins.h create mode 100755 board/freescale/mx53evk/Makefile create mode 100755 board/freescale/mx53evk/config.mk create mode 100644 board/freescale/mx53evk/imximage.cfg create mode 100755 board/freescale/mx53evk/mx53evk.c create mode 100644 drivers/block/mxc_ata.c mode change 100644 = 100755 drivers/i2c/mxc_i2c.c mode change 100644 = 100755 include/configs/mx51evk.h create mode 100755 include/configs/mx53evk.h -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/7] Add support for MX35 processor
Hi Wolfgang, What do these ! markers mean? They have no useful meaning and I must drop them. There are other such cryptic markers - eventually from some doc generating tool. Correct - I'm pretty sure this was intended for doxygen. Cheers Detlev -- Some people seem to think that C is a real programming language, but they are sadly mistaken. It really is about writing almost-portable assembly language [...] -- Linus Torvalds 10404265599082718160nore...@blogger.com -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] ??: [PATCH v2] include/linux/mii.h: update for supporting GE
On Fri, Jan 21, 2011 at 09:23:12AM +0100, Wolfgang Denk wrote: [...] In uec_phy: drivers/qe/uec_phy.h:34:#define LPA_1000FULL0x0400 drivers/qe/uec_phy.h:35:#define LPA_1000HALF0x0200 In Linux: include/linux/mii.h:133:#define LPA_1000FULL0x0800 /* Link partner 1000BASE-T full duplex */ include/linux/mii.h:134:#define LPA_1000HALF0x0400 /* Link partner 1000BASE-T half duplex */ Do you know if this is a wrong defintion on uec_phy ? I'm afraid the fix will lead some mis-behavior for boards has uec_phy. These definitions were added by commit 91cdaa3a: commit 91cdaa3a9d7562b869d96774e9c9ddf142c0848d Author: Anton Vorontsov avoront...@ru.mvista.com Date: Mon Mar 24 20:46:24 2008 +0300 uec: add support for gbit mii status readings Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com Anton, can you please comment? I think that was just a shift-by-one mistake, Linux code is correct. It seems that the only way to trigger this is to force half-duplex on a gigabit link (and u-boot will think that it's a full duplex link). I believe it's safe to fix the wrong definition. Thanks, -- Anton Vorontsov Email: cbouatmai...@gmail.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-Boot support for board(s) meesc, otc570
Dear Daniel Gorsulowski,
Today I found out by GPIO debugging, that U-Boot seems to boot but prints
its startup messages to wrong USART with proper baudrate. I'll try to
find out, why there is no output on DBGU.
Note that the USART to use is defined differently than before:
/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE ATMEL_BASE_DBGU
#define CONFIG_USART_ID ATMEL_ID_SYS
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
Best Regards,
Reinhard
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Re: [U-Boot] U-Boot support for board(s) meesc, otc570
Hello Reinhard,
Reinhard Meyer wrote:
Dear Daniel Gorsulowski,
Today I found out by GPIO debugging, that U-Boot seems to boot but prints
its startup messages to wrong USART with proper baudrate. I'll try to
find out, why there is no output on DBGU.
Note that the USART to use is defined differently than before:
/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE ATMEL_BASE_DBGU
#define CONFIG_USART_ID ATMEL_ID_SYS
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
I did so, see http://lists.denx.de/pipermail/u-boot/2011-January/085863.html
But I'm a little bit confused. In the past, USART_ID was defined by '3',
if DBGU was used. Now, USART_ID is replaced by CONFIG_USART_ID, which is
defined by ATMEL_ID_SYS, which is defined by '1'.
However, this discrepancy does not matter, because CONFIG_USART_ID is
only used once in drivers/serial/atmel_usart.c, line 57:
usart_hz = get_usart_clk_rate(USART_ID);
And get_usart_clk_rate(); ignores its parameter. See
arch/arm/include/asm/arch-at91/clk.h
static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
{
return get_mck_clk_rate();
}
(all other functions in clk.h act similar. I think, a rework would be
advisable?)
Back to the problem...
In my opinion, my USART configuration is correct. I still have no idea,
why there is no output on DBGU.
Best Regards,
Reinhard
Regards,
Daniel
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Re: [U-Boot] [PATCH 2/2] at91: fixed 'esd gmbh' meesc and otc570 boards
Dear Daniel Gorsulowski, Signed-off-by: Daniel Gorsulowskidaniel.gorsulow...@esd.eu --- There is still a bug in USART config. This patch is for reviewing only! I am really at a loss how that can be, since you correctly pass the DBGU address to the driver. board/esd/meesc/config.mk |1 - board/esd/meesc/meesc.c| 39 +- board/esd/otc570/config.mk |1 - board/esd/otc570/otc570.c | 51 +++-- boards.cfg |6 +- include/configs/meesc.h| 150 ++--- include/configs/otc570.h | 179 +--- 7 files changed, 241 insertions(+), 186 deletions(-) delete mode 100644 board/esd/meesc/config.mk delete mode 100644 board/esd/otc570/config.mk diff --git a/board/esd/meesc/config.mk b/board/esd/meesc/config.mk deleted file mode 100644 OK diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c index 41fa3e1..46cd33c 100644 --- a/board/esd/meesc/meesc.c +++ b/board/esd/meesc/meesc.c ... - gd-bd-bi_dram[0].start = PHYS_SDRAM; - gd-bd-bi_dram[0].size = get_ram_size((long *) PHYS_SDRAM, (1 27)); + gd-bd-bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd-bd-bi_dram[0].size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE, + (1 27)); Maybe there is a suitable SIZE_128MIB (didn't check) - would look more readable ;) diff --git a/board/esd/otc570/config.mk b/board/esd/otc570/config.mk deleted file mode 100644 OK diff --git a/board/esd/otc570/otc570.c b/board/esd/otc570/otc570.c index 410d8b4..c66f99e 100644 --- a/board/esd/otc570/otc570.c +++ b/board/esd/otc570/otc570.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2010 + * (C) Copyright 2010-2011 * Daniel Gorsulowskidaniel.gorsulow...@esd.eu * esd electronic system design gmbhwww.esd.eu * @@ -27,6 +27,7 @@ */ #includecommon.h +#includeasm/io.h #includeasm/arch/at91sam9263.h including hardware.h does include above, don't include it directly. #includeasm/arch/at91sam9_smc.h #includeasm/arch/at91_common.h @@ -36,7 +37,6 @@ #includeasm/arch/at91_pio.h #includeasm/arch/clk.h #includeasm/arch/hardware.h -#includeasm/arch/io.h #includeatmel_lcdc.h #includelcd.h #includenetdev.h - gd-bd-bi_dram[0].start = PHYS_SDRAM; - gd-bd-bi_dram[0].size = get_ram_size((long *) PHYS_SDRAM, (1 27)); + gd-bd-bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd-bd-bi_dram[0].size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE, + (1 27)); Same as above (optional) diff --git a/boards.cfg b/boards.cfg index 9b15026..77f3fc4 100644 --- a/boards.cfg +++ b/boards.cfg @@ -83,8 +83,10 @@ at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1 top9000eval_xe arm arm926ejs top9000 emkat91top9000:EVAL9000 top9000su_xe arm arm926ejs top9000 emkat91top9000:SU9000 -meescarm arm926ejs - esd at91 -otc570 arm arm926ejs - esd at91 +meescarm arm926ejs meesc esd at91meesc:AT91SAM9263,SYS_USE_NANDFLASH +meesc_dataflash arm arm926ejs meesc esd at91meesc:AT91SAM9263,SYS_USE_DATAFLASH +otc570 arm arm926ejs otc570 esd at91otc570:AT91SAM9263,SYS_USE_NANDFLASH +otc570_dataflash arm arm926ejs otc570 esd at91otc570:AT91SAM9263,SYS_USE_DATAFLASH Apparently its always a sam9263, so please don't define it here. The defines in boards.cfg should only be used for differences between variants. diff --git a/include/configs/meesc.h b/include/configs/meesc.h index a27b36b..dbb97ed 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -3,7 +3,7 @@ * Stelian Popstelian@leadtechdesign.com * Lead Tech Designwww.leadtechdesign.com * - * (C) Copyright 2009-2010 + * (C) Copyright 2009-2011 * Daniel Gorsulowskidaniel.gorsulow...@esd.eu * esd electronic system design gmbhwww.esd.eu * @@ -31,49 +31,67 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* Common stuff */ -#define CONFIG_MEESC 1 /* Board is esd MEESC */ -#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ -#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 1600/* 16.0 MHz crystal */ +/* + * SoC must be defined first,
Re: [U-Boot] U-Boot support for board(s) meesc, otc570
Dear Daniel Gorsulowski,
Hello Reinhard,
Reinhard Meyer wrote:
Dear Daniel Gorsulowski,
Today I found out by GPIO debugging, that U-Boot seems to boot but prints
its startup messages to wrong USART with proper baudrate. I'll try to
find out, why there is no output on DBGU.
Note that the USART to use is defined differently than before:
/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASEATMEL_BASE_DBGU
#define CONFIG_USART_ID ATMEL_ID_SYS
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE{115200 , 19200, 38400, 57600, 9600 }
I did so, see http://lists.denx.de/pipermail/u-boot/2011-January/085863.html
But I'm a little bit confused. In the past, USART_ID was defined by '3',
if DBGU was used. Now, USART_ID is replaced by CONFIG_USART_ID, which is
defined by ATMEL_ID_SYS, which is defined by '1'.
However, this discrepancy does not matter, because CONFIG_USART_ID is
only used once in drivers/serial/atmel_usart.c, line 57:
usart_hz = get_usart_clk_rate(USART_ID);
And get_usart_clk_rate(); ignores its parameter. See
arch/arm/include/asm/arch-at91/clk.h
That is correct for AT91. However AVR32 has separate clock dividers for each
USART.
The atmel_usart driver is the same for both architectures. For that reason the
ID
is carried along but nowhere used in AT91 clock code. But who knows, maybe
there will be
an AT91 variant in the future with different clocks for each peripheral...
What matters is that the driver uses the value of CONFIG_USART_BASE to access
the
registers. This value you have set (correctly) to ATMEL_BASE_DBGU. So by all
reasoning output should not come out any other USART...
static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
{
return get_mck_clk_rate();
}
(all other functions in clk.h act similar. I think, a rework would be
advisable?)
No, in AVR32 those functions are different for each peripheral.
Back to the problem...
In my opinion, my USART configuration is correct. I still have no idea,
why there is no output on DBGU.
I am at a loss there, too.
Which USART is the output coming from instead? Is it really console output
or maybe some other, independent pulses?
Can you verify that the value for ATMEL_BASE_DBGU in at91sam9263.h is correct?
Are you using the actual driver source? It should have lines like
atmel_usart3_t *usart = (atmel_usart3_t*)CONFIG_USART_BASE;
at the begin of each function.
Best Regards,
Reinhard
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Re: [U-Boot] U-Boot support for board(s) meesc, otc570
Hello Reinhard, ... Back to the problem... In my opinion, my USART configuration is correct. I still have no idea, why there is no output on DBGU. I am at a loss there, too. Which USART is the output coming from instead? Is it really console output or maybe some other, independent pulses? I don't know, to which USART the output goes. I guess you assume, my GPIO debugging was to meassure the pulses on the USART pins. But no, my GPIO debugging was as follows: -set gpio pin with led attached -send characters by puts() (wherever it goes) ;-) -reset gpio pin -measure time between high- and low- rising edge on gpio pin -calculate baudrate (on DBGU pin, there is no pulse at all past starting U-Boot) Can you verify that the value for ATMEL_BASE_DBGU in at91sam9263.h is correct? Yes, according to datasheet, Debug Unit Control Register (DBGU_CR) is located at 0xEE00. And in at91sam9263.h is defined: #define ATMEL_BASE_DBGU 0xee00 Are you using the actual driver source? It should have lines like atmel_usart3_t *usart = (atmel_usart3_t*)CONFIG_USART_BASE; at the begin of each function. Yes, I'm using the driver with your changes from 2010-11-03 16:32:56 Best Regards, Reinhard Best Regards, Daniel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-boot Config Parameters on Compact Flash
Dear Dach Miroslaw, please always keep the mailing list on Cc: In message 1b4f8000449511488d1a640dd6deca350392a...@mailbox0a.psi.ch you wrote: I am sorry bothering so much but this Compact Flash issues is the showstopper for my project. If it's really urgent you should consider engaging commercial support. This would probably be the fastet nd most reliable way to solve your issue quickly. As far as free community support is concerned, this is all done on a voluntary base, and you might even run into the effects described here: http://catb.org/esr/faqs/smart-questions.html#urgent Please let me write what I understood from your idea. Please correct me if I am wrong. In the include config file I should say #define CONFIG_ENV_IS_NOWHERE meaning take the default environ configuration is built in the u-boot itself. You should try and read some documentation to get a better understanding of the terms. CONFIG_* variables are compile-time settings. They determine what get's built into the U-Boot image running on your target. This is different from envrionment variables, which can be loaded, changed, and stored in the running system. The only relation between the two is that you can use CONFIG_ settings to define thedefault environment which gets used when no valid environment can be found. Next, when the u-boot is booted the environment variables should be imported from Compact Flash. This is done in two steps: 1. ide read (read the u-boot config from Compact Flash to RAM ?) 2. env import (import u-boot config from RAM to u-boot?) Right. Could you please give me more hints which CONFIG macros should/could be used for the above mentioned steps. This has nothing to do with any CONFIG_ settings. Of Course I assume that the ide command is enabled in your configuration so you can access the CF card. Is there any command to import/export u-boot config. Yes, as noted: env import and env export. Try help env. So far I was using saveenv to export/save u-boot config into Flash? saveenv ist just an alias for env save, whichis a somewhat specialized version of env export (and which is not enabled in your system when you define CONFIG_ENV_IS_NOWHERE). Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de You see things; and you say ``Why?'' But I dream things that never were; and I say ``Why not?'' - George Bernard Shaw _Back to Methuselah_ (1921) pt. 1, act 1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-Boot support for board(s) meesc, otc570
Hello Daniel, Hello Reinhard, Which USART is the output coming from instead? Is it really console output or maybe some other, independent pulses? I don't know, to which USART the output goes. I guess you assume, my GPIO debugging was to meassure the pulses on the USART pins. But no, my GPIO debugging was as follows: -set gpio pin with led attached -send characters by puts() (wherever it goes) ;-) -reset gpio pin -measure time between high- and low- rising edge on gpio pin -calculate baudrate (on DBGU pin, there is no pulse at all past starting U-Boot) Can you verify that the value for ATMEL_BASE_DBGU in at91sam9263.h is correct? Yes, according to datasheet, Debug Unit Control Register (DBGU_CR) is located at 0xEE00. And in at91sam9263.h is defined: #define ATMEL_BASE_DBGU 0xee00 (I could have made an error there while reworking) I think its now safe to assume that the DBGU UART is really used, but maybe the GPIO pins are not correctly assigned to it. Try to look in the at91sam9263_devices.c area, seriald_init().. Is it called, and does it do the right thing? It must be something rather trivial... Best Regards, Reinhard ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] at91: fixed 'esd gmbh' meesc and otc570 boards
Reinhard Meyer wrote: Dear Daniel Gorsulowski, Signed-off-by: Daniel Gorsulowskidaniel.gorsulow...@esd.eu ... -gd-bd-bi_dram[0].start = PHYS_SDRAM; -gd-bd-bi_dram[0].size = get_ram_size((long *) PHYS_SDRAM, (1 27)); +gd-bd-bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; +gd-bd-bi_dram[0].size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE, +(1 27)); Maybe there is a suitable SIZE_128MIB (didn't check) - would look more readable ;) AFAIK, Wolfgang wants to get rid of the sizes.h file. So I'll replace that with something like (128*1024*1024) diff --git a/board/esd/otc570/otc570.c b/board/esd/otc570/otc570.c index 410d8b4..c66f99e 100644 --- a/board/esd/otc570/otc570.c +++ b/board/esd/otc570/otc570.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2010 + * (C) Copyright 2010-2011 * Daniel Gorsulowskidaniel.gorsulow...@esd.eu * esd electronic system design gmbhwww.esd.eu * @@ -27,6 +27,7 @@ */ #includecommon.h +#includeasm/io.h #includeasm/arch/at91sam9263.h including hardware.h does include above, don't include it directly. Ok, I'll remove this include ... diff --git a/boards.cfg b/boards.cfg index 9b15026..77f3fc4 100644 --- a/boards.cfg +++ b/boards.cfg @@ -83,8 +83,10 @@ at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1 top9000eval_xe arm arm926ejs top9000 emkat91top9000:EVAL9000 top9000su_xe arm arm926ejs top9000 emkat91top9000:SU9000 -meescarm arm926ejs - esdat91 -otc570 arm arm926ejs - esdat91 +meescarm arm926ejs meesc esdat91meesc:AT91SAM9263,SYS_USE_NANDFLASH +meesc_dataflash arm arm926ejs meesc esdat91meesc:AT91SAM9263,SYS_USE_DATAFLASH +otc570 arm arm926ejs otc570 esdat91otc570:AT91SAM9263,SYS_USE_NANDFLASH +otc570_dataflash arm arm926ejs otc570 esdat91otc570:AT91SAM9263,SYS_USE_DATAFLASH Apparently its always a sam9263, so please don't define it here. The defines in boards.cfg should only be used for differences between variants. I'll move that to board config files diff --git a/include/configs/meesc.h b/include/configs/meesc.h index a27b36b..dbb97ed 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -3,7 +3,7 @@ * Stelian Popstelian@leadtechdesign.com * Lead Tech Designwww.leadtechdesign.com * - * (C) Copyright 2009-2010 + * (C) Copyright 2009-2011 * Daniel Gorsulowskidaniel.gorsulow...@esd.eu * esd electronic system design gmbhwww.esd.eu * @@ -31,49 +31,67 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* Common stuff */ -#define CONFIG_MEESC1 /* Board is esd MEESC */ -#define CONFIG_ARM926EJS1 /* This is an ARM926EJS Core */ -#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 1600/* 16.0 MHz crystal */ +/* + * SoC must be defined first, before hardware.h is included. + * In this case SoC is defined in boards.cfg. Please define SoC here. See beyond... ... I'll run it through checkpatch.pl later. Best Regards, Reinhard Best regards, Daniel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] at91: fixed 'esd gmbh' meesc and otc570 boards
Dear Daniel Gorsulowski, In message 4d399177.4040...@esd.eu you wrote: Maybe there is a suitable SIZE_128MIB (didn't check) - would look more readable ;) AFAIK, Wolfgang wants to get rid of the sizes.h file. So I'll replace Correct. that with something like (128*1024*1024) Fine - or use (128 20) which is equally good readable. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de There is an order of things in this universe. -- Apollo, Who Mourns for Adonais? stardate 3468.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] v4 patch:SMDK6400: Fix some build bug
Change from V1: patch 1: patch 2: Delete some compile information from commit. patch 3: Add LED modify information and Delete some compile information from commit. patch 4: Add new patch for SDRAM init. Change from v2: patch2: Modify Makefile for arch/arm/cpu/arm1176/s3c64xx/cpu_init.s in build error. It will generat redefine information for mem_ctrl_asm_init before the Modify. patch4: Modify the Sergei Shtylyov comments and change the SDRAM size variable for PHYS_SDRAM_SIZE_1. Change from v3: Add new patch 3: I discuss with Amicalement, I find the mutiple-link issue: The first, the cpu_init.o have already been link for cmd_link_o_target atfer compile. But, The link script re-link the point file. So the link machine will generate multiple definition error information. The second, Since the first 4kB of nand boot featue code move to nand_spl, So It is not necessary to force the cpu_init.o in non-nand boot. Delete the cpu_init.o from u-boot-nand.lds is safe. patch 4: patch 4 and patch 5 is split from v2 patch4. patch 6: Modify according Minkyu Kang comment ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [v4 patch 2/6] SMDK6400: Fix some label undefined in build error
Modify Makefile for cpu_init.c and Start.s use some label,this defined
u-boot.lds of arch/arm/cpu/arm1176. But SMDK6400 use the link script
board/samsung/smdk6400/u-boot-nand.lds. So add some label form u-boot.lds
to u-boot-nand.lds
Signed-off-by: seedshope bocui...@gmail.com
---
board/samsung/smdk6400/u-boot-nand.lds | 27 ---
1 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/board/samsung/smdk6400/u-boot-nand.lds
b/board/samsung/smdk6400/u-boot-nand.lds
index 29a4f61..6771981 100644
--- a/board/samsung/smdk6400/u-boot-nand.lds
+++ b/board/samsung/smdk6400/u-boot-nand.lds
@@ -56,7 +56,28 @@ SECTIONS
.mmudata : { *(.mmudata) }
. = ALIGN(4);
- __bss_start = .;
- .bss : { *(.bss) . = ALIGN(4); }
- _end = .;
+
+ .rel.dyn : {
+ __rel_dyn_start = .;
+ *(.rel*)
+ __rel_dyn_end = .;
+ }
+
+ .dynsym : {
+ __dynsym_start = .;
+ *(.dynsym)
+ }
+
+ .bss __rel_dyn_start (OVERLAY) : {
+ __bss_start = .;
+ *(.bss)
+ . = ALIGN(4);
+ _end = .;
+ }
+
+ /DISCARD/ : { *(.dynstr*) }
+ /DISCARD/ : { *(.dynamic*) }
+ /DISCARD/ : { *(.plt*) }
+ /DISCARD/ : { *(.interp*) }
+ /DISCARD/ : { *(.gnu*) }
}
--
1.7.1
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[U-Boot] [v4 patch 1/6] SMDK6400: Fix CONFIG_SYS_INIT_SP_ADDR undefined
Fix CONFIG_SYS_INIT_SP_ADDR undefined issue. Signed-off-by: seedshope bocui...@gmail.com --- include/configs/smdk6400.h |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 671f2c7..c9acf58 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -44,6 +44,11 @@ #define CONFIG_PERIPORT_BASE 0x7000 #define CONFIG_PERIPORT_SIZE 0x13 +#define CONFIG_SYS_IRAM_BASE0x0c00 /* Internal SRAM base address */ +#define CONFIG_SYS_IRAM_SIZE0x2000 /* 8 KB of internal SRAM memory */ +#define CONFIG_SYS_IRAM_END (CONFIG_SYS_IRAM_BASE + CONFIG_SYS_IRAM_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_IRAM_END - GENERATED_GBL_DATA_SIZE) + #define CONFIG_SYS_SDRAM_BASE 0x5000 /* input clock of PLL: SMDK6400 has 12MHz input clock */ -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [v4 patch 6/6] SMDK6400: Fix SMDK6400 SDRAM init
Since SDRAM init function have already change, So the SDRAM
initial function must be change.
Signed-off-by: seedshope bocui...@gmail.com
---
board/samsung/smdk6400/smdk6400.c | 10 +-
1 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/board/samsung/smdk6400/smdk6400.c
b/board/samsung/smdk6400/smdk6400.c
index 35aa40b..1d03b7a 100644
--- a/board/samsung/smdk6400/smdk6400.c
+++ b/board/samsung/smdk6400/smdk6400.c
@@ -78,10 +78,18 @@ int board_init(void)
return 0;
}
-int dram_init(void)
+void dram_init_banksize(void)
{
+ DECLARE_GLOBAL_DATA_PTR;
+
gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
gd-bd-bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int dram_init(void)
+{
+ gd-ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+ PHYS_SDRAM_1_SIZE);
return 0;
}
--
1.7.1
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[U-Boot] [v4 patch 5/6] SMDK6400: Disable LED function in start.s on the nand booting
Since nand boot have some limit for the first 4KB, We only disable the LED function to reduce the code space. At the same time, Fix the compile error for LED function undefined in the compile time of nand_spl. Signed-off-by: seedshope bocui...@gmail.com --- arch/arm/cpu/arm1176/start.S |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 237dcfe..ae3706a 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -354,9 +354,11 @@ clbss_l:strr2, [r0]/* clear loop...*/ cmp r0, r1 bne clbss_l +#ifndef CONFIG_NAND_SPL bl coloured_LED_init bl red_LED_on #endif +#endif /* * We are done. Do not return, instead branch to second part of board -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH][v1] powerpc/85xx: Add SERDES support for P1010/P1014
On Jan 20, 2011, at 5:04 AM, Prabhakar Kushwaha wrote: Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are only ever connected on SERDES. Updated MPC85xx_PORDEVSR_IO_SEL MPC85xx_PORDEVSR_IO_SEL_SHIFT Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com --- Changes for v1: Incorporated Wolfgang Denk's comment -- removed volatile Based git://git.denx.de/u-boot-mpc85xx.git (branch master) arch/powerpc/cpu/mpc85xx/Makefile |2 + arch/powerpc/cpu/mpc85xx/p1010_serdes.c | 75 +++ arch/powerpc/include/asm/immap_85xx.h |5 ++ 3 files changed, 82 insertions(+), 0 deletions(-) create mode 100644 arch/powerpc/cpu/mpc85xx/p1010_serdes.c applied to 85xx next - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1] powerpc/85xx: Add support for Integrated Flash Controller (IFC)
On Jan 20, 2011, at 4:59 AM, Dipen Dudhat wrote: The Integrated Flash Controller (IFC) is used to access the external NAND Flash, NOR Flash, EPROM, SRAM and Generic ASIC memories.Four chip selects are provided in IFC so that maximum of four Flash devices can be hooked, but only one can be accessed at a given time. Features supported by IFC are, - Functional muxing of pins between NAND, NOR and GPCM - Support memory banks of size 64KByte to 4 GBytes - Write protection capability (only for NAND and NOR) - Provision of Software Reset - Flexible Timing programmability for every chip select - NAND Machine - x8/ x16 NAND Flash Interface - SLC and MLC NAND Flash devices support with configurable page sizes of upto 4KB - Internal SRAM of 9KB which is directly mapped and availble at boot time for NAND Boot - Configurable block size - Boot chip select (CS0) available at system reset - NOR Machine - Data bus width of 8/16/32 - Compatible with asynchronous NOR Flash - Directly memory mapped - Supports address data multiplexed (ADM) NOR device - Boot chip select (CS0) available at system reset - GPCM Machine (NORMAL GPCM Mode) - Support for x8/16/32 bit device - Compatible with general purpose addressable device e.g. SRAM, ROM - External clock is supported with programmable division ratio - GPCM Machine (Generic ASIC Mode) - Support for x8/16/32 bit device - Address and Data are shared on I/O bus - Following Address and Data sequences can be supported on I/O bus - 32 bit I/O: AD - 16 bit I/O: AADD - 8 bit I/O : - Configurable Even/Odd Parity on Address/Data bus supported Signed-off-by: Dipen Dudhat dipen.dud...@freescale.com Acked-by: Scott Wood scottw...@freescale.com --- Changes from v0: - Integrated Wolfgang's comments arch/powerpc/cpu/mpc85xx/cpu.c|7 +- arch/powerpc/cpu/mpc8xxx/Makefile |1 + arch/powerpc/cpu/mpc8xxx/fsl_ifc.c| 84 +++ arch/powerpc/include/asm/config.h |2 + arch/powerpc/include/asm/fsl_ifc.h| 947 + arch/powerpc/include/asm/fsl_law.h|1 + arch/powerpc/include/asm/immap_85xx.h |4 + 7 files changed, 1045 insertions(+), 1 deletions(-) create mode 100644 arch/powerpc/cpu/mpc8xxx/fsl_ifc.c create mode 100644 arch/powerpc/include/asm/fsl_ifc.h applied to 85xx next - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-boot Config Parameters on Compact Flash
Dear Wolfgang, Thank you very much for your hints. Now, I have got an idea how to continue. Could you please direct me to some manual/how to to find out how to configure IDE access by means of the CONFIG_IDE_* . I have examined several header files in u-boot/include/configs and it seems to be that CONFIG_ATA_* could be/should be used in conjunction with CONFIG_IDE_*? Best Regards Mirek -Original Message- From: Wolfgang Denk [mailto:w...@denx.de] Sent: Fri 1/21/2011 2:08 PM To: Dach Miroslaw Cc: u-boot@lists.denx.de Subject: Re: [U-Boot] U-boot Config Parameters on Compact Flash Dear Dach Miroslaw, please always keep the mailing list on Cc: In message 1b4f8000449511488d1a640dd6deca350392a...@mailbox0a.psi.ch you wrote: I am sorry bothering so much but this Compact Flash issues is the showstopper for my project. If it's really urgent you should consider engaging commercial support. This would probably be the fastet nd most reliable way to solve your issue quickly. As far as free community support is concerned, this is all done on a voluntary base, and you might even run into the effects described here: http://catb.org/esr/faqs/smart-questions.html#urgent Please let me write what I understood from your idea. Please correct me if I am wrong. In the include config file I should say #define CONFIG_ENV_IS_NOWHERE meaning take the default environ configuration is built in the u-boot itself. You should try and read some documentation to get a better understanding of the terms. CONFIG_* variables are compile-time settings. They determine what get's built into the U-Boot image running on your target. This is different from envrionment variables, which can be loaded, changed, and stored in the running system. The only relation between the two is that you can use CONFIG_ settings to define thedefault environment which gets used when no valid environment can be found. Next, when the u-boot is booted the environment variables should be imported from Compact Flash. This is done in two steps: 1. ide read (read the u-boot config from Compact Flash to RAM ?) 2. env import (import u-boot config from RAM to u-boot?) Right. Could you please give me more hints which CONFIG macros should/could be used for the above mentioned steps. This has nothing to do with any CONFIG_ settings. Of Course I assume that the ide command is enabled in your configuration so you can access the CF card. Is there any command to import/export u-boot config. Yes, as noted: env import and env export. Try help env. So far I was using saveenv to export/save u-boot config into Flash? saveenv ist just an alias for env save, whichis a somewhat specialized version of env export (and which is not enabled in your system when you define CONFIG_ENV_IS_NOWHERE). Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de You see things; and you say ``Why?'' But I dream things that never were; and I say ``Why not?'' - George Bernard Shaw _Back to Methuselah_ (1921) pt. 1, act 1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
Minkyu, On Fri, Jan 21, 2011 at 1:16 AM, Minkyu Kang proms...@gmail.com wrote: Dear Tom Warren, On 21 January 2011 09:42, Tom Warren twarren.nvi...@gmail.com wrote: diff --git a/arch/arm/cpu/armv7/tegra2/uart.c b/arch/arm/cpu/armv7/tegra2/uart.c new file mode 100644 index 000..5e60bd8 --- /dev/null +++ b/arch/arm/cpu/armv7/tegra2/uart.c How about move it to drivers/serial/ ? There's Tegra-specific code in there (clocks, PLLs and pinmuxes). And why don't you use serial multi interface? CONFIG_SERIAL_MULTI is enabled in the config files. Thanks Minkyu Kang Thank you, Tom -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
On 01/22/2011 12:08 AM, Tom Warren wrote: Minkyu, On Fri, Jan 21, 2011 at 1:16 AM, Minkyu Kangproms...@gmail.com wrote: Dear Tom Warren, On 21 January 2011 09:42, Tom Warrentwarren.nvi...@gmail.com wrote: diff --git a/arch/arm/cpu/armv7/tegra2/uart.c b/arch/arm/cpu/armv7/tegra2/uart.c new file mode 100644 index 000..5e60bd8 --- /dev/null +++ b/arch/arm/cpu/armv7/tegra2/uart.c How about move it to drivers/serial/ ? Approve， you can use name in the drivers/serial. such as： serial_tegra2.c Thanks seedshope There's Tegra-specific code in there (clocks, PLLs and pinmuxes). And why don't you use serial multi interface? CONFIG_SERIAL_MULTI is enabled in the config files. Thanks Minkyu Kang Thank you, Tom -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
On 01/21/2011 08:42 AM, Tom Warren wrote:
+
+enum {
+ UART_A = 1,
+ UART_B,
+ UART_C,
+ UART_D,
+ UART_E
+};
+
+#endif /* _BOARD_H_ */
diff --git a/arch/arm/cpu/armv7/tegra2/uart.c
b/arch/arm/cpu/armv7/tegra2/uart.c
new file mode 100644
index 000..5e60bd8
--- /dev/null
+++ b/arch/arm/cpu/armv7/tegra2/uart.c
@@ -0,0 +1,216 @@
+/*
+ * (C) Copyright 2010,2011
+ * NVIDIA Corporationwww.nvidia.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#includecommon.h
+#includens16550.h
+#includeasm/io.h
+#includeasm/arch/tegra2.h
+#include board.h
+
+/*
+ * Routine: uart_clock_init
+ * Description: init the PLL and clock for the UART in uart_num
+ */
+static void uart_clock_init(int uart_num)
+{
+ clk_rst_ctlr *const clkrst = (clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
+ static int pllp_init_done;
+ u32 reg;
+
+ if (!pllp_init_done) {
+ /* Override pllp setup for 216MHz operation. */
+ reg = (PLL_BYPASS | PLL_BASE_OVRRIDE | PLL_DIVP);
+ reg |= (((NVRM_PLLP_FIXED_FREQ_KHZ/500) 8) | PLL_DIVM);
+ writel(reg,clkrst-crc_pllp_base);
+
+ reg |= PLL_ENABLE;
+ writel(reg,clkrst-crc_pllp_base);
+
+ reg= ~PLL_BYPASS;
+ writel(reg,clkrst-crc_pllp_base);
+
+ pllp_init_done++;
+ }
+
+ /* Now do the UART reset/clock enable based on uart_num */
+#if CONFIG_TEGRA2_ENABLE_UARTA
+ if (uart_num == UART_A) {
+ /* Assert Reset to UART */
+ reg = readl(clkrst-crc_rst_dev_l);
+ reg |= SWR_UARTA_RST; /* SWR_UARTA_RST = 1 */
+ writel(reg,clkrst-crc_rst_dev_l);
+
+ /* Enable clk to UART */
+ reg = readl(clkrst-crc_clk_out_enb_l);
+ reg |= CLK_ENB_UARTA; /* CLK_ENB_UARTA = 1 */
+ writel(reg,clkrst-crc_clk_out_enb_l);
+
+ /* Enable pllp_out0 to UART */
+ reg = readl(clkrst-crc_clk_src_uarta);
+ reg= 0x3FFF; /* UARTA_CLK_SRC = 00, PLLP_OUT0 */
+ writel(reg,clkrst-crc_clk_src_uarta);
+
+ /* wait for 2us */
+ udelay(2);
+
+ /* De-assert reset to UART */
+ reg = readl(clkrst-crc_rst_dev_l);
+ reg= ~SWR_UARTA_RST; /* SWR_UARTA_RST = 0 */
+ writel(reg,clkrst-crc_rst_dev_l);
+ }
+#endif /* CONFIG_TEGRA2_ENABLE_UARTA */
+#if CONFIG_TEGRA2_ENABLE_UARTD
+ if (uart_num == UART_D) {
+ /* Assert Reset to UART */
+ reg = readl(clkrst-crc_rst_dev_u);
+ reg |= SWR_UARTD_RST; /* SWR_UARTD_RST = 1 */
+ writel(reg,clkrst-crc_rst_dev_u);
+
+ /* Enable clk to UART */
+ reg = readl(clkrst-crc_clk_out_enb_u);
+ reg |= CLK_ENB_UARTD; /* CLK_ENB_UARTD = 1 */
+ writel(reg,clkrst-crc_clk_out_enb_u);
+
+ /* Enable pllp_out0 to UART */
+ reg = readl(clkrst-crc_clk_src_uartd);
+ reg= 0x3FFF; /* UARTD_CLK_SRC = 00, PLLP_OUT0 */
+ writel(reg,clkrst-crc_clk_src_uartd);
+
+ /* wait for 2us */
+ udelay(2);
+
+ /* De-assert reset to UART */
+ reg = readl(clkrst-crc_rst_dev_u);
+ reg= ~SWR_UARTD_RST; /* SWR_UARTD_RST = 0 */
+ writel(reg,clkrst-crc_rst_dev_u);
+ }
+#endif /* CONFIG_TEGRA2_ENABLE_UARTD */
+}
+
+/*
+ * Routine: pin_mux_uart
+ * Description: setup the pin muxes/tristate values for UART based on
uart_num
+ */
+static void pin_mux_uart(int uart_num)
+{
+ pinmux_tri_ctlr *const pmt = (pinmux_tri_ctlr *)NV_PA_APB_MISC_BASE;
+ u32 reg;
+
+#if CONFIG_TEGRA2_ENABLE_UARTA
+ if (uart_num == UART_A) {
Why you need get the parameters uart_num, I think if you want to use
CONFIG_TEGRA2_ENABLE_UARTA,
You only defined CONFIG_TEGRA2_ENABLE_UARTA in
include/configs/seaboard.h or include/configs/tegra2-common.h.
Here, The code formats may be as following:
#ifdef CONFIG_SERIAL1
..
#elif
Re: [U-Boot] [PATCH V4 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
On 01/22/2011 12:35 AM, seedshope wrote:
On 01/21/2011 08:42 AM, Tom Warren wrote:
+
+enum {
+UART_A = 1,
+UART_B,
+UART_C,
+UART_D,
+UART_E
+};
+
+#endif /* _BOARD_H_ */
diff --git a/arch/arm/cpu/armv7/tegra2/uart.c
b/arch/arm/cpu/armv7/tegra2/uart.c
new file mode 100644
index 000..5e60bd8
--- /dev/null
+++ b/arch/arm/cpu/armv7/tegra2/uart.c
@@ -0,0 +1,216 @@
+/*
+ * (C) Copyright 2010,2011
+ * NVIDIA Corporationwww.nvidia.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#includecommon.h
+#includens16550.h
+#includeasm/io.h
+#includeasm/arch/tegra2.h
+#include board.h
+
+/*
+ * Routine: uart_clock_init
+ * Description: init the PLL and clock for the UART in uart_num
+ */
+static void uart_clock_init(int uart_num)
+{
+clk_rst_ctlr *const clkrst = (clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
+static int pllp_init_done;
+u32 reg;
+
+if (!pllp_init_done) {
+/* Override pllp setup for 216MHz operation. */
+reg = (PLL_BYPASS | PLL_BASE_OVRRIDE | PLL_DIVP);
+reg |= (((NVRM_PLLP_FIXED_FREQ_KHZ/500) 8) | PLL_DIVM);
+writel(reg,clkrst-crc_pllp_base);
+
+reg |= PLL_ENABLE;
+writel(reg,clkrst-crc_pllp_base);
+
+reg= ~PLL_BYPASS;
+writel(reg,clkrst-crc_pllp_base);
+
+pllp_init_done++;
+}
+
+/* Now do the UART reset/clock enable based on uart_num */
+#if CONFIG_TEGRA2_ENABLE_UARTA
+if (uart_num == UART_A) {
+/* Assert Reset to UART */
+reg = readl(clkrst-crc_rst_dev_l);
+reg |= SWR_UARTA_RST;/* SWR_UARTA_RST = 1 */
+writel(reg,clkrst-crc_rst_dev_l);
+
+/* Enable clk to UART */
+reg = readl(clkrst-crc_clk_out_enb_l);
+reg |= CLK_ENB_UARTA;/* CLK_ENB_UARTA = 1 */
+writel(reg,clkrst-crc_clk_out_enb_l);
+
+/* Enable pllp_out0 to UART */
+reg = readl(clkrst-crc_clk_src_uarta);
+reg= 0x3FFF;/* UARTA_CLK_SRC = 00, PLLP_OUT0 */
+writel(reg,clkrst-crc_clk_src_uarta);
+
+/* wait for 2us */
+udelay(2);
+
+/* De-assert reset to UART */
+reg = readl(clkrst-crc_rst_dev_l);
+reg= ~SWR_UARTA_RST;/* SWR_UARTA_RST = 0 */
+writel(reg,clkrst-crc_rst_dev_l);
+}
+#endif/* CONFIG_TEGRA2_ENABLE_UARTA */
+#if CONFIG_TEGRA2_ENABLE_UARTD
+if (uart_num == UART_D) {
+/* Assert Reset to UART */
+reg = readl(clkrst-crc_rst_dev_u);
+reg |= SWR_UARTD_RST;/* SWR_UARTD_RST = 1 */
+writel(reg,clkrst-crc_rst_dev_u);
+
+/* Enable clk to UART */
+reg = readl(clkrst-crc_clk_out_enb_u);
+reg |= CLK_ENB_UARTD;/* CLK_ENB_UARTD = 1 */
+writel(reg,clkrst-crc_clk_out_enb_u);
+
+/* Enable pllp_out0 to UART */
+reg = readl(clkrst-crc_clk_src_uartd);
+reg= 0x3FFF;/* UARTD_CLK_SRC = 00, PLLP_OUT0 */
+writel(reg,clkrst-crc_clk_src_uartd);
+
+/* wait for 2us */
+udelay(2);
+
+/* De-assert reset to UART */
+reg = readl(clkrst-crc_rst_dev_u);
+reg= ~SWR_UARTD_RST;/* SWR_UARTD_RST = 0 */
+writel(reg,clkrst-crc_rst_dev_u);
+}
+#endif/* CONFIG_TEGRA2_ENABLE_UARTD */
+}
+
+/*
+ * Routine: pin_mux_uart
+ * Description: setup the pin muxes/tristate values for UART based
on uart_num
+ */
+static void pin_mux_uart(int uart_num)
+{
+pinmux_tri_ctlr *const pmt = (pinmux_tri_ctlr
*)NV_PA_APB_MISC_BASE;
+u32 reg;
+
+#if CONFIG_TEGRA2_ENABLE_UARTA
+if (uart_num == UART_A) {
Why you need get the parameters uart_num, I think if you want to use
CONFIG_TEGRA2_ENABLE_UARTA,
You only defined CONFIG_TEGRA2_ENABLE_UARTA in
include/configs/seaboard.h or include/configs/tegra2-common.h.
Here, The code formats may be as following:
#ifdef CONFIG_SERIAL1
..
#elif defined(CONFIG_SERIAL2)
..
#else
..
#endif
I am sorry, just see the tegra2-common.h file, UARTA is for keypad,
UARTB for debug.
But I feel the line of if (uart_num == UART_A) is not necessary.
Because
Re: [U-Boot] [GIT PULL] Pull request: u-boot-imx
Le 21/01/2011 10:24, Stefano Babic a écrit : Hi Albert, The following changes since commit d6a5e6d531e357dd8016141f73d370d02886a7eb: Cleanup .boards.depend when using an objtree (2011-01-21 08:56:50 +0100) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master Pulled into u-boot-arm, thanks. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] arm926ejs: timer: Replace bss variable by gdr
Hi Heiko, Le 21/01/2011 09:56, Heiko Schocher a écrit : Reuse the gd-tbl value for timestamp and add gd-lastinc for lastinc bss values in the arm926ejs timers implementation. The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted. This patch is similiar to the patch Dirk Behme posted for the armv7/omap-common/timer.c and added suggestions from Reinhard Meyer. Tested on the arm926ejs mx27 based magnesium board Tested on the arm926ejs kirkwood based suen3 board Signed-off-by: Heiko Schocherh...@denx.de cc: Albert ARIBAUDalbert.arib...@free.fr cc: Prafulla Wadaskarprafu...@marvell.com cc: Stefano Babicsba...@denx.de cc: Reinhard Meyeru-b...@emk-elektronik.de Applied to u-boot-arm, thanks. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [v4 patch 6/6] SMDK6400: Fix SMDK6400 SDRAM init
Hello.
seedshope wrote:
Since SDRAM init function have already change, So the SDRAM
initial function must be change.
This description sounds somewhat tautological...
Signed-off-by: seedshope bocui...@gmail.com
Your real name is required in the signoff.
---
board/samsung/smdk6400/smdk6400.c | 10 +-
1 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/board/samsung/smdk6400/smdk6400.c
b/board/samsung/smdk6400/smdk6400.c
index 35aa40b..1d03b7a 100644
--- a/board/samsung/smdk6400/smdk6400.c
+++ b/board/samsung/smdk6400/smdk6400.c
@@ -78,10 +78,18 @@ int board_init(void)
return 0;
}
-int dram_init(void)
+void dram_init_banksize(void)
{
+ DECLARE_GLOBAL_DATA_PTR;
+
gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
gd-bd-bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int dram_init(void)
+{
+ gd-ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+ PHYS_SDRAM_1_SIZE);
Could you move this last line more to the right?
WBR, Sergei
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Re: [U-Boot] [v4 patch 6/6] SMDK6400: Fix SMDK6400 SDRAM init
On 01/22/2011 01:52 AM, Sergei Shtylyov wrote:
Hello.
seedshope wrote:
Since SDRAM init function have already change, So the SDRAM
initial function must be change.
This description sounds somewhat tautological...
If I describe as following:
Since SDRAM init function have already change, Modify SDRAM inital
function to adapt to it.
How about it?
Signed-off-by: seedshope bocui...@gmail.com
Your real name is required in the signoff.
I use the name for my pen name. It is not problem.
---
board/samsung/smdk6400/smdk6400.c | 10 +-
1 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/board/samsung/smdk6400/smdk6400.c
b/board/samsung/smdk6400/smdk6400.c
index 35aa40b..1d03b7a 100644
--- a/board/samsung/smdk6400/smdk6400.c
+++ b/board/samsung/smdk6400/smdk6400.c
@@ -78,10 +78,18 @@ int board_init(void)
return 0;
}
-int dram_init(void)
+void dram_init_banksize(void)
{
+DECLARE_GLOBAL_DATA_PTR;
+
gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
gd-bd-bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int dram_init(void)
+{
+gd-ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+PHYS_SDRAM_1_SIZE);
Could you move this last line more to the right?
Ya, the orig is ok, But I re-do the patch, It is miss. sorry.
Thanks
seedshope
WBR, Sergei
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Re: [U-Boot] [v4 patch 6/6] SMDK6400: Fix SMDK6400 SDRAM init
On 01/22/2011 02:05 AM, seedshope wrote:
On 01/22/2011 01:52 AM, Sergei Shtylyov wrote:
Hello.
seedshope wrote:
Since SDRAM init function have already change, So the SDRAM
initial function must be change.
This description sounds somewhat tautological...
If I describe as following:
Since SDRAM init function have already change, Modify SDRAM inital
function to adapt to it.
How about it?
Signed-off-by: seedshope bocui...@gmail.com
Your real name is required in the signoff.
I use the name for my pen name. It is not problem.
---
board/samsung/smdk6400/smdk6400.c | 10 +-
1 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/board/samsung/smdk6400/smdk6400.c
b/board/samsung/smdk6400/smdk6400.c
index 35aa40b..1d03b7a 100644
--- a/board/samsung/smdk6400/smdk6400.c
+++ b/board/samsung/smdk6400/smdk6400.c
@@ -78,10 +78,18 @@ int board_init(void)
return 0;
}
-int dram_init(void)
+void dram_init_banksize(void)
{
+DECLARE_GLOBAL_DATA_PTR;
+
gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
gd-bd-bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int dram_init(void)
+{
+gd-ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+PHYS_SDRAM_1_SIZE);
Could you move this last line more to the right?
Ya, the orig is ok, But I re-do the patch, It is miss. sorry.
Hi Sergei,
I feel this may be you e-mail issue. I open my patch, It is display as
following:
+ gd-ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+PHYS_SDRAM_1_SIZE);
Thanks,
seedshope
Thanks
seedshope
WBR, Sergei
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Re: [U-Boot] [v4 patch 6/6] SMDK6400: Fix SMDK6400 SDRAM init
Le 21/01/2011 19:15, seedshope a écrit : On 01/22/2011 02:05 AM, seedshope wrote: On 01/22/2011 01:52 AM, Sergei Shtylyov wrote: Hello. seedshope wrote: Since SDRAM init function have already change, So the SDRAM initial function must be change. This description sounds somewhat tautological... If I describe as following: Since SDRAM init function have already change, Modify SDRAM inital function to adapt to it. How about it? Still unclear, due to the fact you're using the same three terms (init/initial, RAM, function) for two apparently different things. Signed-off-by: seedshopebocui...@gmail.com Your real name is required in the signoff. I use the name for my pen name. It is not problem. I think Sergei means pen names should not be used. I won't personally pass judgment, but so far I've always seen contributors using their actual names. I feel this may be you e-mail issue. I open my patch, It is display as following: + gd-ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, +PHYS_SDRAM_1_SIZE); Your patch, pulled from patchwork and viewed in vi, has three tabs on that second line, which does not align properly. You should check your code editor settings re: tabs. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
seedshope, (?)
On Fri, Jan 21, 2011 at 9:35 AM, seedshope bocui...@gmail.com wrote:
On 01/21/2011 08:42 AM, Tom Warren wrote:
+
+enum {
+ UART_A = 1,
+ UART_B,
+ UART_C,
+ UART_D,
+ UART_E
+};
+
+#endif /* _BOARD_H_ */
snip
+
+#if CONFIG_TEGRA2_ENABLE_UARTA
+ if (uart_num == UART_A) {
Why you need get the parameters uart_num, I think if you want to use
CONFIG_TEGRA2_ENABLE_UARTA,
You only defined CONFIG_TEGRA2_ENABLE_UARTA in include/configs/seaboard.h
or include/configs/tegra2-common.h.
OK, makes sense. I'll move uart.c/board.h to drivers/serial as
serial_tegra2.[ch] and remove
all mention of UART_[A-E] and uart_num. Thanks.
Here, The code formats may be as following:
#ifdef CONFIG_SERIAL1
..
#elif defined(CONFIG_SERIAL2)
..
#else
..
#endif
Some configs / builds can have both UARTs active, so each
#ifdef/#endif pair is needed.
Thanks
seedshope
Thanks for the feedback
Tom
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Re: [U-Boot] [v4 patch 6/6] SMDK6400: Fix SMDK6400 SDRAM init
On 01/22/2011 02:29 AM, Albert ARIBAUD wrote: Le 21/01/2011 19:15, seedshope a écrit : On 01/22/2011 02:05 AM, seedshope wrote: On 01/22/2011 01:52 AM, Sergei Shtylyov wrote: Hello. seedshope wrote: Since SDRAM init function have already change, So the SDRAM initial function must be change. This description sounds somewhat tautological... If I describe as following: Since SDRAM init function have already change, Modify SDRAM inital function to adapt to it. How about it? Still unclear, due to the fact you're using the same three terms (init/initial, RAM, function) for two apparently different things. Ya, Maybe, But I don't know to describe it. The patch is only to modify the dram_init() and dram_init_banksize(), Could you help me to describe? Thank you very much！ seedshope Signed-off-by: seedshopebocui...@gmail.com Your real name is required in the signoff. I use the name for my pen name. It is not problem. I think Sergei means pen names should not be used. I won't personally pass judgment, but so far I've always seen contributors using their actual names. ok I feel this may be you e-mail issue. I open my patch, It is display as following: + gd-ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, +PHYS_SDRAM_1_SIZE); Your patch, pulled from patchwork and viewed in vi, has three tabs on that second line, which does not align properly. You should check your code editor settings re: tabs. My patch is ok, I just two tabs in my e-mail, But I sent the mail, It is change. Thanks hongbo Amicalement, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] environmental baudrate not used at boot up
On Thu, 20 Jan 2011 22:45:34 -0600 Aggrwal Poonam-B10812 b10...@freescale.com wrote: -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Wood Scott-B07421 Sent: Thursday, January 20, 2011 1:28 AM To: chr...@cyberswitching.com Cc: u-boot@lists.denx.de Subject: Re: [U-Boot] environmental baudrate not used at boot up The full NAND code only works after relocation. So you cannot read out the NAND environment, in the normal way, before serial init -- you get the default environment instead. If you are booting from NAND, I suggest using CONFIG_NAND_ENV_DST to have the NAND SPL load the environment at the same time as it loads U-Boot. If you're using some preloader other than U-Boot's NAND SPL, you'll need to see if it supports something similar. Hello Scott Is this feature available/tested on any FSL platform. The code you pointed to does not seem to be used by FSL platforms. It would be good idea to pull this in for P1/P2 RDB nand boot loader. It is currently only supported in nand_boot.c, but it should be trivial to add it to nand_boot_fsl_elbc.c. Just copy the extra nand_boot() invocations. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [v4 patch 6/6] SMDK6400: Fix SMDK6400 SDRAM init
Le 21/01/2011 19:43, seedshope a écrit : On 01/22/2011 02:29 AM, Albert ARIBAUD wrote: Le 21/01/2011 19:15, seedshope a écrit : On 01/22/2011 02:05 AM, seedshope wrote: On 01/22/2011 01:52 AM, Sergei Shtylyov wrote: Hello. seedshope wrote: Since SDRAM init function have already change, So the SDRAM initial function must be change. This description sounds somewhat tautological... If I describe as following: Since SDRAM init function have already change, Modify SDRAM inital function to adapt to it. How about it? Still unclear, due to the fact you're using the same three terms (init/initial, RAM, function) for two apparently different things. Ya, Maybe, But I don't know to describe it. The patch is only to modify the dram_init() and dram_init_banksize(), Could you help me to describe? Thank you very much！ seedshope The reason for the change to dram_init is not actually about DRAM. If you look up similar patches, you'll find out it is about not being able to access gd-bd because bd does not exist, and this is so since the ELF relocation was introduced. So some good descriptions could be do not use gd-bd any more or fix dram_init for relocation support, for instance. Signed-off-by: seedshopebocui...@gmail.com Your real name is required in the signoff. I use the name for my pen name. It is not problem. I think Sergei means pen names should not be used. I won't personally pass judgment, but so far I've always seen contributors using their actual names. ok I feel this may be you e-mail issue. I open my patch, It is display as following: + gd-ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, +PHYS_SDRAM_1_SIZE); Your patch, pulled from patchwork and viewed in vi, has three tabs on that second line, which does not align properly. You should check your code editor settings re: tabs. My patch is ok, I just two tabs in my e-mail, But I sent the mail, It is change. Do you send the patch through git format-patch and git send-email? Many e-mail softwares have weird issues when posting git patches, which is why git has its own tools for sending patches via e-mail. Thanks hongbo Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [v4 patch 1/6] SMDK6400: Fix CONFIG_SYS_INIT_SP_ADDR undefined
Dear seedshope, In message 1295624053-8060-2-git-send-email-bocui...@gmail.com you wrote: Fix CONFIG_SYS_INIT_SP_ADDR undefined issue. Signed-off-by: seedshope bocui...@gmail.com I'm sorry, but please consider all your patches rejected unless you provide a Signed-off-by: using your real name (sorry, no pseudonyms or anonymous contributions.) Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Pray to God, but keep rowing to shore. - Russian Proverb ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4 4/4] arm: Tegra2: Add support for NVIDIA Seaboard board
Le 21/01/2011 01:42, Tom Warren a écrit : Signed-off-by: Tom Warrentwar...@nvidia.com --- Changes for V2: - Remove mach-types.h change; wait for ARM kernel sync-up - Use board/nvidia instead of board/tegra Doesn't this mean that the patch cannot compile on current u-boot, and won't until mach-types.h is updated? Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] [v2] p1022ds: allow for board-specific ngPIXIS functions
The ngPIXIS is an FPGA used on the reference boards of most Freescale PowerPC
SOCs. Although programming the ngPIXIS is mostly standard on all boards that
have it, the P1022DS is unique in that the ngPIXIS needs to be programmed in
indirect mode whenever the video display (DIU) is active.
To support indirect mode, and to make it easier to support other quirks on
future reference boards, the low-level ngPIXIS functions are all marked as
weak, so that board-specific code can override any of them. We take advantage
of this feature on the P1022DS, so that we can properly reset the board when
the DIU is active.
Signed-off-by: Timur Tabi ti...@freescale.com
---
board/freescale/common/ngpixis.c | 56
board/freescale/common/ngpixis.h |8 -
board/freescale/p1022ds/diu.c| 66 --
3 files changed, 112 insertions(+), 18 deletions(-)
diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c
index a135fbe..4e01e5a 100644
--- a/board/freescale/common/ngpixis.c
+++ b/board/freescale/common/ngpixis.c
@@ -1,5 +1,5 @@
/**
- * Copyright 2010 Freescale Semiconductor
+ * Copyright 2010-2011 Freescale Semiconductor
* Author: Timur Tabi ti...@freescale.com
*
* This program is free software; you can redistribute it and/or modify it
@@ -35,61 +35,89 @@
#include common.h
#include command.h
-#include watchdog.h
-#include asm/cache.h
#include asm/io.h
#include ngpixis.h
+static u8 __pixis_read(unsigned int reg)
+{
+ void *p = (void *)PIXIS_BASE;
+
+ return in_8(p + reg);
+}
+u8 pixis_read(unsigned int reg) __attribute__((weak, alias(__pixis_read)));
+
+static void __pixis_write(unsigned int reg, u8 value)
+{
+ void *p = (void *)PIXIS_BASE;
+
+ out_8(p + reg, value);
+}
+void pixis_write(unsigned int reg, u8 value)
+ __attribute__((weak, alias(__pixis_write)));
+
/*
* Reset the board. This ignores the ENx registers.
*/
-void pixis_reset(void)
+void __pixis_reset(void)
{
- out_8(pixis-rst, 0);
+ PIXIS_WRITE(rst, 0);
while (1);
}
+void pixis_reset(void) __attribute__((weak, alias(__pixis_reset)));
/*
* Reset the board. Like pixis_reset(), but it honors the ENx registers.
*/
-void pixis_bank_reset(void)
+void __pixis_bank_reset(void)
{
- out_8(pixis-vctl, 0);
- out_8(pixis-vctl, 1);
+ PIXIS_WRITE(vctl, 0);
+ PIXIS_WRITE(vctl, 1);
while (1);
}
+void pixis_bank_reset(void) __attribute__((weak, alias(__pixis_bank_reset)));
/**
* Set the boot bank to the power-on default bank
*/
-void clear_altbank(void)
+void __clear_altbank(void)
{
+ u8 reg;
+
/* Tell the ngPIXIS to use this the bits in the physical switch for the
* boot bank value, instead of the SWx register. We need to be careful
* only to set the bits in SWx that correspond to the boot bank.
*/
- clrbits_8(PIXIS_EN(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK);
+ reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en);
+ reg = ~PIXIS_LBMAP_MASK;
+ PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg);
}
+void clear_altbank(void) __attribute__((weak, alias(__clear_altbank)));
/**
* Set the boot bank to the alternate bank
*/
-void set_altbank(void)
+void __set_altbank(void)
{
+ u8 reg;
+
/* Program the alternate bank number into the SWx register.
*/
- clrsetbits_8(PIXIS_SW(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK,
-PIXIS_LBMAP_ALTBANK);
+ reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].sw);
+ reg = (reg ~PIXIS_LBMAP_MASK) | PIXIS_LBMAP_ALTBANK;
+ PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].sw, reg);
/* Tell the ngPIXIS to use this the bits in the SWx register for the
* boot bank value, instead of the physical switch. We need to be
* careful only to set the bits in SWx that correspond to the boot bank.
*/
- setbits_8(PIXIS_EN(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK);
+ reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en);
+ reg |= PIXIS_LBMAP_MASK;
+ PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg);
}
+void set_altbank(void) __attribute__((weak, alias(__set_altbank)));
int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
diff --git a/board/freescale/common/ngpixis.h b/board/freescale/common/ngpixis.h
index 089408b..681b0d0 100644
--- a/board/freescale/common/ngpixis.h
+++ b/board/freescale/common/ngpixis.h
@@ -1,5 +1,5 @@
/**
- * Copyright 2010 Freescale Semiconductor
+ * Copyright 2010-2011 Freescale Semiconductor
* Author: Timur Tabi ti...@freescale.com
*
* This program is free software; you can redistribute it and/or modify it
@@ -55,3 +55,9 @@ typedef struct ngpixis {
/* The PIXIS EN register that corresponds to board switch X, where x = 1 */
#define PIXIS_EN(x)(pixis-s[(x) - 1].en)
+
+u8 pixis_read(unsigned int reg);
+void
[U-Boot] [PATCH V5 2/4] serial: Add Tegra2 serial port support
Signed-off-by: Tom Warren twar...@nvidia.com
---
Changes for V2:
- Move serial driver to separate patch
Changes for V5:
- Move arch/arm/cpu/armv7/uart.c board.h to drivers/serial and
rename to serial_tegra2.c
- Remove use of uart_num UART_A/D in serial_tegra2, simplify code
arch/arm/cpu/armv7/tegra2/Makefile |2 +-
arch/arm/cpu/armv7/tegra2/board.c |2 +-
arch/arm/cpu/armv7/tegra2/board.h | 58 --
arch/arm/cpu/armv7/tegra2/uart.c | 216
common/serial.c|3 +-
drivers/serial/Makefile|1 +
drivers/serial/serial_tegra2.c | 205 ++
drivers/serial/serial_tegra2.h | 49
include/serial.h |3 +-
9 files changed, 261 insertions(+), 278 deletions(-)
delete mode 100644 arch/arm/cpu/armv7/tegra2/board.h
delete mode 100644 arch/arm/cpu/armv7/tegra2/uart.c
create mode 100644 drivers/serial/serial_tegra2.c
create mode 100644 drivers/serial/serial_tegra2.h
diff --git a/arch/arm/cpu/armv7/tegra2/Makefile
b/arch/arm/cpu/armv7/tegra2/Makefile
index f5b657b..687c887 100644
--- a/arch/arm/cpu/armv7/tegra2/Makefile
+++ b/arch/arm/cpu/armv7/tegra2/Makefile
@@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
SOBJS := lowlevel_init.o
-COBJS := board.o sys_info.o timer.o uart.o
+COBJS := board.o sys_info.o timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/tegra2/board.c
b/arch/arm/cpu/armv7/tegra2/board.c
index 816a8cd..1e92d98 100644
--- a/arch/arm/cpu/armv7/tegra2/board.c
+++ b/arch/arm/cpu/armv7/tegra2/board.c
@@ -25,7 +25,7 @@
#include asm/io.h
#include asm/arch/sys_proto.h
#include asm/arch/tegra2.h
-#include board.h
+#include asm/arch/pmc.h
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/cpu/armv7/tegra2/board.h
b/arch/arm/cpu/armv7/tegra2/board.h
deleted file mode 100644
index f8f09c0..000
--- a/arch/arm/cpu/armv7/tegra2/board.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * (C) Copyright 2010,2011
- * NVIDIA Corporation www.nvidia.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-#include asm/arch/clk_rst.h
-#include asm/arch/pinmux.h
-#include asm/arch/pmc.h
-#include asm/arch/uart.h
-
-#define NVRM_PLLP_FIXED_FREQ_KHZ 216000
-#define NV_DEFAULT_DEBUG_BAUD 115200
-
-#define PLL_BYPASS (1 31)
-#define PLL_ENABLE (1 30)
-#define PLL_BASE_OVRRIDE (1 28)
-#define PLL_DIVP (1 20) /* post divider, b22:20 */
-#define PLL_DIVM 0x0C/* input divider, b4:0 */
-
-#define SWR_UARTD_RST (1 2)
-#define CLK_ENB_UARTD (1 2)
-#define SWR_UARTA_RST (1 6)
-#define CLK_ENB_UARTA (1 6)
-
-#define Z_GMC (1 29)
-#define Z_IRRX (1 20)
-#define Z_IRTX (1 19)
-
-enum {
- UART_A = 1,
- UART_B,
- UART_C,
- UART_D,
- UART_E
-};
-
-#endif /* _BOARD_H_ */
diff --git a/arch/arm/cpu/armv7/tegra2/uart.c b/arch/arm/cpu/armv7/tegra2/uart.c
deleted file mode 100644
index 5e60bd8..000
--- a/arch/arm/cpu/armv7/tegra2/uart.c
+++ /dev/null
@@ -1,216 +0,0 @@
-/*
- * (C) Copyright 2010,2011
- * NVIDIA Corporation www.nvidia.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA
[U-Boot] [PATCH V5 0/4] Add basic NVIDIA Tegra2 SoC support
This series of patches adds preliminary/baseline support for NVIDIA's Tegra2 SoC. Basic CPU (AVP), RAM and UART init are covered so that the system (Harmony or Seaboard) can boot to the U-Boot serial cmd prompt. Further support (for Cortex-A9 CPU(s), USB, SD/MMC, etc.) to follow. Changes for V2: - Coding style cleanup - Remove mach-types.h change; wait for ARM kernel sync-up - Move serial driver changes to separate patch - Use board/nvidia/ instead of /board/tegra - Remove TRUE/FALSE defines - Use standard NS16550 register/bit defines in UART init - Change nv-common.h config file to tegra2-common.h Changes for V3: - Use I/O accessors for Tegra2 HW MMIO register access - Allow conditional compile of UARTA/UARTD code to save space Changes for V4: - Use address of HW structs (pmc, etc.) in readl/writel - Remove empty lines, fix mixed case hex #s comments in header(s) - Move board/nvidia/common/board.c UART code header to arch/arm/cpu/armv7/tegra2/ - Declare internal functions as static in UART code Changes for V5: - Move arch/arm/cpu/armv7/uart.c board.h to drivers/serial and rename to serial_tegra2.c - Remove use of uart_num UART_A/D in serial_tegra2, simplify code Tom Warren (4): arm: Tegra2: Add basic NVIDIA Tegra2 SoC support serial: Add Tegra2 serial port support arm: Tegra2: Add support for NVIDIA Harmony board arm: Tegra2: Add support for NVIDIA Seaboard board MAINTAINERS |5 + arch/arm/cpu/armv7/tegra2/Makefile | 48 ++ arch/arm/cpu/armv7/tegra2/board.c| 91 arch/arm/cpu/armv7/tegra2/config.mk | 28 arch/arm/cpu/armv7/tegra2/lowlevel_init.S| 65 arch/arm/cpu/armv7/tegra2/sys_info.c | 35 + arch/arm/cpu/armv7/tegra2/timer.c| 122 +++ arch/arm/include/asm/arch-tegra2/clk_rst.h | 154 +++ arch/arm/include/asm/arch-tegra2/pinmux.h| 51 +++ arch/arm/include/asm/arch-tegra2/pmc.h | 124 arch/arm/include/asm/arch-tegra2/sys_proto.h | 33 arch/arm/include/asm/arch-tegra2/tegra2.h| 49 ++ arch/arm/include/asm/arch-tegra2/uart.h | 44 ++ board/nvidia/common/board.c | 57 +++ board/nvidia/harmony/Makefile| 50 +++ board/nvidia/seaboard/Makefile | 50 +++ boards.cfg |2 + common/serial.c |3 +- drivers/serial/Makefile |1 + drivers/serial/serial_tegra2.c | 205 ++ drivers/serial/serial_tegra2.h | 49 ++ include/configs/harmony.h| 48 ++ include/configs/seaboard.h | 44 ++ include/configs/tegra2-common.h | 160 include/serial.h |3 +- 25 files changed, 1519 insertions(+), 2 deletions(-) create mode 100644 arch/arm/cpu/armv7/tegra2/Makefile create mode 100644 arch/arm/cpu/armv7/tegra2/board.c create mode 100644 arch/arm/cpu/armv7/tegra2/config.mk create mode 100644 arch/arm/cpu/armv7/tegra2/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/tegra2/sys_info.c create mode 100644 arch/arm/cpu/armv7/tegra2/timer.c create mode 100644 arch/arm/include/asm/arch-tegra2/clk_rst.h create mode 100644 arch/arm/include/asm/arch-tegra2/pinmux.h create mode 100644 arch/arm/include/asm/arch-tegra2/pmc.h create mode 100644 arch/arm/include/asm/arch-tegra2/sys_proto.h create mode 100644 arch/arm/include/asm/arch-tegra2/tegra2.h create mode 100644 arch/arm/include/asm/arch-tegra2/uart.h create mode 100644 board/nvidia/common/board.c create mode 100644 board/nvidia/harmony/Makefile create mode 100644 board/nvidia/seaboard/Makefile create mode 100644 drivers/serial/serial_tegra2.c create mode 100644 drivers/serial/serial_tegra2.h create mode 100644 include/configs/harmony.h create mode 100644 include/configs/seaboard.h create mode 100644 include/configs/tegra2-common.h -- 1.7.3.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V5 4/4] arm: Tegra2: Add support for NVIDIA Seaboard board
Signed-off-by: Tom Warren twar...@nvidia.com --- Changes for V2: - Remove mach-types.h change; wait for ARM kernel sync-up - Use board/nvidia instead of board/tegra MAINTAINERS|1 + board/nvidia/seaboard/Makefile | 50 boards.cfg |1 + include/configs/seaboard.h | 44 +++ 4 files changed, 96 insertions(+), 0 deletions(-) create mode 100644 board/nvidia/seaboard/Makefile create mode 100644 include/configs/seaboard.h diff --git a/MAINTAINERS b/MAINTAINERS index b5cff19..f4795d3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -844,6 +844,7 @@ Prafulla Wadaskar prafu...@marvell.com Tom Warren twar...@nvidia.com harmony Tegra2 (ARM7 A9 Dual Core) + seaboardTegra2 (ARM7 A9 Dual Core) Matthias Weisser weiss...@arcor.de diff --git a/board/nvidia/seaboard/Makefile b/board/nvidia/seaboard/Makefile new file mode 100644 index 000..3a146cb --- /dev/null +++ b/board/nvidia/seaboard/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2010,2011 +# NVIDIA Corporation www.nvidia.com +# +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS += ../common/board.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB):$(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/boards.cfg b/boards.cfg index ee7c4b7..3c4c249 100644 --- a/boards.cfg +++ b/boards.cfg @@ -123,6 +123,7 @@ omap4_sdp4430arm armv7 sdp4430 ti s5p_goni arm armv7 goni samsungs5pc1xx smdkc100 arm armv7 smdkc100 samsungs5pc1xx harmony arm armv7 harmony nvidia tegra2 +seaboard arm armv7 seaboard nvidia tegra2 actux1 arm ixp actux2 arm ixp actux3 arm ixp diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h new file mode 100644 index 000..98d82d6 --- /dev/null +++ b/include/configs/seaboard.h @@ -0,0 +1,44 @@ +/* + * (C) Copyright 2010,2011 + * NVIDIA Corporation www.nvidia.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include asm/sizes.h +#include tegra2-common.h + +/* High-level configuration options */ +#define TEGRA2_SYSMEM mem=384M@0M nvmem=128M@384M mem=512M@512M +#define V_PROMPT Tegra2 (SeaBoard) # +#define CONFIG_TEGRA2_BOARD_STRING NVIDIA Seaboard + +/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA2_ENABLE_UARTA 0 +#define CONFIG_TEGRA2_ENABLE_UARTD 1 +#define CONFIG_SYS_NS16550_COM1NV_PA_APB_UARTD_BASE + +#define CONFIG_MACH_TYPE MACH_TYPE_TEGRA_SEABOARD +#define CONFIG_SYS_BOARD_ODMDATA
[U-Boot] [PATCH V5 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
Signed-off-by: Tom Warren twar...@nvidia.com --- Changes for V2: - Coding style cleanup - Move serial driver changes to separate patch - Use board/nvidia instead of board/tegra - Remove TRUE/FALSE defines - Use standard NS16550 registers/bit defines in UART init Changes for V3: - Use I/O accessors for Tegra2 HW MMIO register access - Allow conditional compile of UARTA/UARTD code to save space Changes for V4: - Use address of HW structs (pmc, etc.) in readl/writel - Remove empty lines, fix mixed case hex #s comments in header(s) - Move board/nvidia/common/board.c UART code header to arch/arm/cpu/armv7/tegra2/ - Declare internal functions as static in UART code arch/arm/cpu/armv7/tegra2/Makefile | 48 ++ arch/arm/cpu/armv7/tegra2/board.c| 91 +++ arch/arm/cpu/armv7/tegra2/board.h| 58 +++ arch/arm/cpu/armv7/tegra2/config.mk | 28 arch/arm/cpu/armv7/tegra2/lowlevel_init.S| 65 arch/arm/cpu/armv7/tegra2/sys_info.c | 35 arch/arm/cpu/armv7/tegra2/timer.c| 122 +++ arch/arm/cpu/armv7/tegra2/uart.c | 216 ++ arch/arm/include/asm/arch-tegra2/clk_rst.h | 154 ++ arch/arm/include/asm/arch-tegra2/pinmux.h| 51 ++ arch/arm/include/asm/arch-tegra2/pmc.h | 124 +++ arch/arm/include/asm/arch-tegra2/sys_proto.h | 33 arch/arm/include/asm/arch-tegra2/tegra2.h| 49 ++ arch/arm/include/asm/arch-tegra2/uart.h | 44 ++ board/nvidia/common/board.c | 57 +++ 15 files changed, 1175 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/armv7/tegra2/Makefile create mode 100644 arch/arm/cpu/armv7/tegra2/board.c create mode 100644 arch/arm/cpu/armv7/tegra2/board.h create mode 100644 arch/arm/cpu/armv7/tegra2/config.mk create mode 100644 arch/arm/cpu/armv7/tegra2/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/tegra2/sys_info.c create mode 100644 arch/arm/cpu/armv7/tegra2/timer.c create mode 100644 arch/arm/cpu/armv7/tegra2/uart.c create mode 100644 arch/arm/include/asm/arch-tegra2/clk_rst.h create mode 100644 arch/arm/include/asm/arch-tegra2/pinmux.h create mode 100644 arch/arm/include/asm/arch-tegra2/pmc.h create mode 100644 arch/arm/include/asm/arch-tegra2/sys_proto.h create mode 100644 arch/arm/include/asm/arch-tegra2/tegra2.h create mode 100644 arch/arm/include/asm/arch-tegra2/uart.h create mode 100644 board/nvidia/common/board.c diff --git a/arch/arm/cpu/armv7/tegra2/Makefile b/arch/arm/cpu/armv7/tegra2/Makefile new file mode 100644 index 000..f5b657b --- /dev/null +++ b/arch/arm/cpu/armv7/tegra2/Makefile @@ -0,0 +1,48 @@ +# +# (C) Copyright 2010,2011 Nvidia Corporation. +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(SOC).o + +SOBJS := lowlevel_init.o +COBJS := board.o sys_info.o timer.o uart.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) + +all:$(obj).depend $(LIB) + +$(LIB):$(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra2/board.c new file mode 100644 index 000..816a8cd --- /dev/null +++ b/arch/arm/cpu/armv7/tegra2/board.c @@ -0,0 +1,91 @@ +/* + * (C) Copyright 2010,2011 + * NVIDIA Corporation www.nvidia.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This
[U-Boot] [PATCH V5 3/4] arm: Tegra2: Add support for NVIDIA Harmony board
Signed-off-by: Tom Warren twar...@nvidia.com --- Changes for V2: - Use board/nvidia/ instead of /board/tegra - Change nv-common.h config file to tegra2-common.h MAINTAINERS |4 + board/nvidia/harmony/Makefile | 50 boards.cfg |1 + include/configs/harmony.h | 48 include/configs/tegra2-common.h | 160 +++ 5 files changed, 263 insertions(+), 0 deletions(-) create mode 100644 board/nvidia/harmony/Makefile create mode 100644 include/configs/harmony.h create mode 100644 include/configs/tegra2-common.h diff --git a/MAINTAINERS b/MAINTAINERS index ba83f71..b5cff19 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -841,6 +841,10 @@ Prafulla Wadaskar prafu...@marvell.com rd6281a ARM926EJS (Kirkwood SoC) sheevaplug ARM926EJS (Kirkwood SoC) +Tom Warren twar...@nvidia.com + + harmony Tegra2 (ARM7 A9 Dual Core) + Matthias Weisser weiss...@arcor.de jadecpu ARM926EJS (MB86R01 SoC) diff --git a/board/nvidia/harmony/Makefile b/board/nvidia/harmony/Makefile new file mode 100644 index 000..3a146cb --- /dev/null +++ b/board/nvidia/harmony/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2010,2011 +# NVIDIA Corporation www.nvidia.com +# +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS += ../common/board.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB):$(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/boards.cfg b/boards.cfg index 94b8745..ee7c4b7 100644 --- a/boards.cfg +++ b/boards.cfg @@ -122,6 +122,7 @@ omap4_panda arm armv7 panda ti omap4_sdp4430arm armv7 sdp4430 ti omap4 s5p_goni arm armv7 goni samsungs5pc1xx smdkc100 arm armv7 smdkc100 samsungs5pc1xx +harmony arm armv7 harmony nvidia tegra2 actux1 arm ixp actux2 arm ixp actux3 arm ixp diff --git a/include/configs/harmony.h b/include/configs/harmony.h new file mode 100644 index 000..7d8f27a --- /dev/null +++ b/include/configs/harmony.h @@ -0,0 +1,48 @@ +/* + * (C) Copyright 2010,2011 + * NVIDIA Corporation www.nvidia.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include asm/sizes.h +#include tegra2-common.h + +/* High-level configuration options */ +#define TEGRA2_SYSMEM mem=384M@0M nvmem=128M@384M mem=512M@512M +#define V_PROMPT Tegra2 (Harmony) # +#define CONFIG_TEGRA2_BOARD_STRING NVIDIA Harmony + +/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA2_ENABLE_UARTD 1 +#define CONFIG_TEGRA2_ENABLE_UARTA 0 +
Re: [U-Boot] [PATCH V5 2/4] serial: Add Tegra2 serial port support
Hi Tom,
On Fri, 2011-01-21 at 16:06 -0700, Tom Warren wrote:
Signed-off-by: Tom Warren twar...@nvidia.com
---
Changes for V2:
- Move serial driver to separate patch
Changes for V5:
- Move arch/arm/cpu/armv7/uart.c board.h to drivers/serial and
rename to serial_tegra2.c
- Remove use of uart_num UART_A/D in serial_tegra2, simplify code
arch/arm/cpu/armv7/tegra2/Makefile |2 +-
arch/arm/cpu/armv7/tegra2/board.c |2 +-
arch/arm/cpu/armv7/tegra2/board.h | 58 --
arch/arm/cpu/armv7/tegra2/uart.c | 216
common/serial.c|3 +-
drivers/serial/Makefile|1 +
drivers/serial/serial_tegra2.c | 205 ++
drivers/serial/serial_tegra2.h | 49
include/serial.h |3 +-
9 files changed, 261 insertions(+), 278 deletions(-)
delete mode 100644 arch/arm/cpu/armv7/tegra2/board.h
delete mode 100644 arch/arm/cpu/armv7/tegra2/uart.c
create mode 100644 drivers/serial/serial_tegra2.c
create mode 100644 drivers/serial/serial_tegra2.h
It looks like arch/arm/cpu/armv7/tegra2/board.h and
arch/arm/cpu/armv7/tegra2/uart.c are added in the first patch, then
moved in this patch. It'd be ideal to just add them once in the proper
location.
On a side note, if you pass git format-patch the -M and -C options it
will make pretty diffs that only show what lines changed during a move.
In the case that you do move files in the future its nice to use those
options to ease review.
snip
+void uart_init(void)
+{
+ /* Init each UART - there may be more than 1 on a board/build */
+#if (CONFIG_TEGRA2_ENABLE_UARTA)
+ init_uart();
+#endif
+#if (CONFIG_TEGRA2_ENABLE_UARTD)
+ init_uart();
+#endif
+}
How about:
#if defined(CONFIG_TEGRA2_ENABLE_UARTA) || defined(CONFIG_TEGRA2_ENABLE_UARTD)
init_uart();
#endif
Best,
Peter
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Re: [U-Boot] [v4 patch 1/6] SMDK6400: Fix CONFIG_SYS_INIT_SP_ADDR undefined
On 01/22/2011 04:42 AM, Wolfgang Denk wrote: Dear seedshope, In message1295624053-8060-2-git-send-email-bocui...@gmail.com you wrote: Fix CONFIG_SYS_INIT_SP_ADDR undefined issue. Signed-off-by: seedshopebocui...@gmail.com I'm sorry, but please consider all your patches rejected unless you provide a Signed-off-by: using your real name (sorry, no pseudonyms or anonymous contributions.) ok, This is the first to join the free software for me. So I use my pseudonyms(My English name), I will use the spelling of my name. Thanks, seedshope Best regards, Wolfgang Denk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [v4 patch 6/6] SMDK6400: Fix SMDK6400 SDRAM init
On 01/22/2011 03:11 AM, Albert ARIBAUD wrote: Le 21/01/2011 19:43, seedshope a écrit : On 01/22/2011 02:29 AM, Albert ARIBAUD wrote: Le 21/01/2011 19:15, seedshope a écrit : On 01/22/2011 02:05 AM, seedshope wrote: On 01/22/2011 01:52 AM, Sergei Shtylyov wrote: Hello. seedshope wrote: Since SDRAM init function have already change, So the SDRAM initial function must be change. This description sounds somewhat tautological... If I describe as following: Since SDRAM init function have already change, Modify SDRAM inital function to adapt to it. How about it? Still unclear, due to the fact you're using the same three terms (init/initial, RAM, function) for two apparently different things. Ya, Maybe, But I don't know to describe it. The patch is only to modify the dram_init() and dram_init_banksize(), Could you help me to describe? Thank you very much！ seedshope The reason for the change to dram_init is not actually about DRAM. If you look up similar patches, you'll find out it is about not being able to access gd-bd because bd does not exist, and this is so since the ELF relocation was introduced. So some good descriptions could be do not use gd-bd any more or fix dram_init for relocation support, for instance. ok, Signed-off-by: seedshopebocui...@gmail.com Your real name is required in the signoff. I use the name for my pen name. It is not problem. I think Sergei means pen names should not be used. I won't personally pass judgment, but so far I've always seen contributors using their actual names. ok I feel this may be you e-mail issue. I open my patch, It is display as following: + gd-ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, +PHYS_SDRAM_1_SIZE); Your patch, pulled from patchwork and viewed in vi, has three tabs on that second line, which does not align properly. You should check your code editor settings re: tabs. My patch is ok, I just two tabs in my e-mail, But I sent the mail, It is change. Do you send the patch through git format-patch and git send-email? Yes, I use the git format-patch and git send-email Many e-mail softwares have weird issues when posting git patches, which is why git has its own tools for sending patches via e-mail. ok Thanks seedshope Thanks hongbo Amicalement, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] A question in lowlevel_init.S
Hello everybody, I have a question pertaining to almost every lowlevel_init.S. The code goes like /*make r0 relative the current location so that it*/ /*reads SMRDATA out of flash rather than memory*/ ldr r0,=SMRDATA ldr r1,_TEXT_BASE sub r10,r0,r1 I couldn't relate the code to comments made ahead of that(how does TEXT_BASE - addrof(SMRDATA) yield the location of SMRDATA in flash. I totally dint get it. Please enlighten me. I greatly appreciate any response. Thanks, Vamsi -- View this message in context: http://old.nabble.com/A-question-in-lowlevel_init.S-tp30734554p30734554.html Sent from the Uboot - Users mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] arm926ejs: timer: Replace bss variable by gdr
Hello, Am 21.01.2011 09:56, schrieb Heiko Schocher: -static ulong timestamp; -static ulong lastdec; +DECLARE_GLOBAL_DATA_PTR; + +#define timestamp gd-tbl +#define lastdec gd-lastinc I'm the only one who doesn't like such defines? They might be handy for quick fixes, but in regard to style and readablity I don't like them. When looking at teh code where they will used, you won't see the actual place where they are stored. And in more complex expression they might become dangerous to use because they hide the operator -. Regards, Alexander ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] arm: timer_init() and bss (relocation)
Hello, because I still have problems where I think the problem is the relocation, I've had a look at some timer code. E.g. in arch/arm/cpu/arm926ejs/kirkwood/timer.c on top there is struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE; which is used in timer_init(). In arch/arm/cpu/armv7/omap-common/timer.c we have static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; which is used in timer_init() too. (I assume similiar code is used in more files, I've just had a look at those two.) timer_init() is called in board_init_f() through init_sequence, that means before relocation. Did I miss something, or I'm right that this is a problem because those two variables are stored in bss but are accessed before relocation? Regards, Alexander ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] arm: timer_init() and bss (relocation)
On Fri, Jan 21, 2011 at 11:07 PM, Alexander Holler hol...@ahsoftware.de wrote: Hello, because I still have problems where I think the problem is the relocation, I've had a look at some timer code. E.g. in arch/arm/cpu/arm926ejs/kirkwood/timer.c on top there is struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE; which is used in timer_init(). In arch/arm/cpu/armv7/omap-common/timer.c we have static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; which is used in timer_init() too. (I assume similiar code is used in more files, I've just had a look at those two.) timer_init() is called in board_init_f() through init_sequence, that means before relocation. Did I miss something, or I'm right that this is a problem because those two variables are stored in bss but are accessed before relocation? These are both initialized data so they do not go in bss. Regards, Alexander ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] arm: timer_init() and bss (relocation)
Am 22.01.2011 07:38, schrieb John Rigby: On Fri, Jan 21, 2011 at 11:07 PM, Alexander Hollerhol...@ahsoftware.de wrote: Hello, because I still have problems where I think the problem is the relocation, I've had a look at some timer code. E.g. in arch/arm/cpu/arm926ejs/kirkwood/timer.c on top there is struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE; which is used in timer_init(). In arch/arm/cpu/armv7/omap-common/timer.c we have static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; which is used in timer_init() too. (I assume similiar code is used in more files, I've just had a look at those two.) timer_init() is called in board_init_f() through init_sequence, that means before relocation. Did I miss something, or I'm right that this is a problem because those two variables are stored in bss but are accessed before relocation? These are both initialized data so they do not go in bss. Correct, I should have a look into u-boot.map before writing this mail. Thanks for the pointer. But this leads me to the question what happens with the stuff in the data section. Seems I should have again a look at the lowlevel stuff to understand that. Thanks, Alexander ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] arm: timer_init() and bss (relocation)
Dear Alexander Holler, Am 22.01.2011 07:38, schrieb John Rigby: On Fri, Jan 21, 2011 at 11:07 PM, Alexander Hollerhol...@ahsoftware.de wrote: Hello, because I still have problems where I think the problem is the relocation, I've had a look at some timer code. E.g. in arch/arm/cpu/arm926ejs/kirkwood/timer.c on top there is struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE; which is used in timer_init(). In arch/arm/cpu/armv7/omap-common/timer.c we have static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; which is used in timer_init() too. (I assume similiar code is used in more files, I've just had a look at those two.) timer_init() is called in board_init_f() through init_sequence, that means before relocation. Did I miss something, or I'm right that this is a problem because those two variables are stored in bss but are accessed before relocation? These are both initialized data so they do not go in bss. Correct, I should have a look into u-boot.map before writing this mail. Thanks for the pointer. But this leads me to the question what happens with the stuff in the data section. Seems I should have again a look at the lowlevel stuff to understand that. Intuitively (without looking at the code) I would think that CONST DATA is ok, but non const, initialized data cannot work because it is not initialized before relocation... Best Regards, Reinhard ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] A question in lowlevel_init.S
Hi Vamsi, Le 22/01/2011 05:18, krrish53 a écrit : Hello everybody, I have a question pertaining to almost every lowlevel_init.S. The code goes like /*make r0 relative the current location so that it*/ /*reads SMRDATA out of flash rather than memory*/ ldr r0,=SMRDATA ldr r1,_TEXT_BASE sub r10,r0,r1 I couldn't relate the code to comments made ahead of that(how does TEXT_BASE - addrof(SMRDATA) yield the location of SMRDATA in flash. I totally dint get it. Please enlighten me. I greatly appreciate any response. It would be easier if you gave the precise source code origin, filename and location of the code you're mentioning. I took the u-boot-arm current master branch, and could not exactly find any occurrence of sub r10, r0, r1 so I looked for an appraoching sequence, and found e.g. arch/arm/cpu/arm926ejs/at91/lowlevel_init.S, line 63. Is this what you meant? /* memory control configuration */ /* this isn't very elegant, but what the heck */ ldr r0, =SMRDATA ldr r1, _MTEXT_BASE sub r0, r0, r1 add r2, r0, #80 If so, the code does not compute TEXT_BASE - SMRDATA, rather the reverse : SMRDATA - TEXT_BASE, .i.e. the relative address of SMRDATA with respect to the image start (depending on START_FROM_MEM, in Flash or physical RAM). I assume #80 is an absolute base address of the actual SMRDATA, but I'm no at91 specialist. Thanks, Vamsi Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7] mpq101: initial support for Mercury Computer Systems MPQ101 board
Please keep the boards.cfg clean from configuration settings. Move the definition of CONFIG_SYS_LDSCRIPT into your board config header file. [Kumar also reported that this does not even build. I confirm this.] That's because of the relatively recent change to how the env_embedded.o is treated by the build system, so I need to refer to it explicitly, rather then by wildcard. Shall I send a whole patch again or incremental fix will do? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [v4 patch 6/6] SMDK6400: Fix SMDK6400 SDRAM init
Hi seedshope, Le 22/01/2011 02:56, seedshope a écrit : My patch is ok, I just two tabs in my e-mail, But I sent the mail, It is change. Do you send the patch through git format-patch and git send-email? Yes, I use the git format-patch and git send-email Many e-mail softwares have weird issues when posting git patches, which is why git has its own tools for sending patches via e-mail. ok Since you're using git format-patch and git send-email, then your original change is not correctly aligned. I suggest you check your code editor's settings on indentation and use of tabulations, notably the tab size: tabs should align on 8-space multiples; also check that your editor uses a fixed font -- you never know. Thanks hongbo Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] A question in lowlevel_init.S
Dear Albert ARIBAUD, Hi Vamsi, Le 22/01/2011 05:18, krrish53 a écrit : Hello everybody, I have a question pertaining to almost every lowlevel_init.S. The code goes like /*make r0 relative the current location so that it*/ /*reads SMRDATA out of flash rather than memory*/ ldr r0,=SMRDATA ldr r1,_TEXT_BASE sub r10,r0,r1 I couldn't relate the code to comments made ahead of that(how does TEXT_BASE - addrof(SMRDATA) yield the location of SMRDATA in flash. I totally dint get it. Please enlighten me. I greatly appreciate any response. It would be easier if you gave the precise source code origin, filename and location of the code you're mentioning. I took the u-boot-arm current master branch, and could not exactly find any occurrence of sub r10, r0, r1 so I looked for an appraoching sequence, and found e.g. arch/arm/cpu/arm926ejs/at91/lowlevel_init.S, line 63. Is this what you meant? /* memory control configuration */ /* this isn't very elegant, but what the heck */ ldr r0, =SMRDATA ldr r1, _MTEXT_BASE sub r0, r0, r1 add r2, r0, #80 If so, the code does not compute TEXT_BASE - SMRDATA, rather the reverse : SMRDATA - TEXT_BASE, .i.e. the relative address of SMRDATA with respect to the image start (depending on START_FROM_MEM, in Flash or physical RAM). I assume #80 is an absolute base address of the actual SMRDATA, but I'm no at91 specialist. I am not aware of any AT91SAM9xxx systems right now that uses low-level init, it would only make sense for those that boot directly from NOR, without AT91BOOTSTRAP involved. Since we also have no NAND_SPL for AT91, it might well be that only AT91RM9200 systems use low level init code... To clarify, AT91BOOTSTRAP is the first code loaded by the SoC ROM into internal SRAM and therefore restricted in size to only 4k for some AT91 SoCs. This code has to init the SDRAM and load u-boot into SDRAM (hence the relocation stuff was not really needed for AT91). Best Regards, Reinhard Best Regards, Reinhard ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] arm: timer_init() and bss (relocation)
Le 22/01/2011 08:21, Reinhard Meyer a écrit : But this leads me to the question what happens with the stuff in the data section. Seems I should have again a look at the lowlevel stuff to understand that. Intuitively (without looking at the code) I would think that CONST DATA is ok, but non const, initialized data cannot work because it is not initialized before relocation... To be precise: 1. const data are readable before and after relocation. 2. non-const initialized data are readable only until relocated, and then writable as well. 3. BSS data cannot and must not be used at all until relocated, and are then zeroed out before board_init_r() starts. Best Regards, Reinhard Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] arm926ejs: timer: Replace bss variable by gdr
Le 22/01/2011 06:39, Alexander Holler a écrit : Hello, Am 21.01.2011 09:56, schrieb Heiko Schocher: -static ulong timestamp; -static ulong lastdec; +DECLARE_GLOBAL_DATA_PTR; + +#define timestamp gd-tbl +#define lastdec gd-lastinc I'm the only one who doesn't like such defines? They might be handy for quick fixes, but in regard to style and readablity I don't like them. When looking at teh code where they will used, you won't see the actual place where they are stored. And in more complex expression they might become dangerous to use because they hide the operator -. I accept the patch because it un-breaks support for ARM cpus, and I prefer a working fix to a perfect fix in this specific, transitional, situation. However a general rework of ARM timer code is in order so that all SoCs and CPUs share the same set of gd variables with the same names and the same logic; and when we get that, this code shall move along. About this rework, as the saying goes... Patches Welcome ©. :) Regards, Alexander Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
