Re: [U-Boot] IMX51 EVK Splash Screen
On 02/26/2011 07:32 PM, Marek Vasut wrote: Hey guys, any update on this matter ? I'm quite interested :) On my side I am not currently working on this issue... Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ARM]: File type for u-boot elf file
Dear Albert ARIBAUD, In message 4d67e64a.1090...@free.fr you wrote: I have been trying to compile the HexAIS files found in the tarball, but facing some issues. Will check this problem, to see if a way can be found to change the elf file recognition method of the utility. But it would be great if this utility can be added to mainline, as Detlev suggested. Not speaking for Wolfgang here, but IIUC, aisgen is a binary Windows application, and in this form, it is not going to be added to mainline. Now if you meant an open source utility derived from the AIS info made available e.g. by Ben, then all we need is a volunteer. :) You probably misunderstand. We do not want to add this tool, but it's functionality - similar like today mkimages is capable of building several other, similar custom image formats. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I refuse to have a battle of wits with an unarmed person. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [question about using the same code in non-free programs]
Dear Dongil Park, In message AANLkTinUT3coZBBrbitz=yqwcafacz8_mts8a61+e...@mail.gmail.com you wrote: I wonder if i port this protocol into u-boot, does it affect to our programs which already in Market? It only depends on the license terms you select. *To release a non-free program is always ethically tainted, but legally there is no obstacle to your doing this. If you are the copyright holder for the code, you can release it under various different non-exclusive licenses at various times. * Correct. If you are the copyright holder and if there are no other limiting conditions (like Patents or other licneses you depend on) you can alway release your code under multiple licenses, one of these for example being the GPL. after porting into u-boot, i'll open the code. and i(we) have the owner ship for this protocol If you release the code under a GPLv2+ (or compatible) license (probably as onve of several available licenses of this code), the code can be included into U-Boot. I don;t understand what you mean by we have the ownership for this protocol - if the code is available under GPL, anybody is able to use and change this protocol in the same free manner as he does with the code. If the use of your protocol is in some way restricted (say, it is covered by some patents that limit it's use - see for example the situation for audio and/or video codecs) then your code will not make it into U-Boot, for the same reasons why we don't accept non-free code. *@Wolfgang Denk, i need your opinions about this issue. Please answer my question :)* I am not a lawyer. You don't want my opinions. You want a binding statement from your legal department. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I've seen it. It's rubbish. - Marvin the Paranoid Android ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] U-Boot newbie needs help!
Hi, If I am not using the correct method for asking a question I apologize. I am very new to Linux and embedded system and I am still having a hard time with basic stuff. Hopefully I'll get there someday... I am trying to learn this PC104 board from MPL MIP405 and I am going through the process of building a crosstool chain (crosstool-ng). I believe I accomplished this today. Now I am trying to build the u-boot image and transfer to the board using tftpboot command. I am following the instructions but I am getting the following error: = tftpboot 40 u-boot.img ENET Speed is 100 Mbps - FULL duplex connection TFTP from server 192.168.5.1; our IP address is 192.168.5.2 Filename 'u-boot.img'. Load address: 0x40 Loading: ### done Bytes transferred = 155238 (25e66 hex) Automatic boot of image at addr 0x0040 ... ## Booting image at 0040... Image Name: U-Boot 1.1.4 MIP405 released Created: 2005-09-13 15:28:20 UTC Image Type: PowerPC U-Boot Firmware (gzip compressed) Data Size:155174 Bytes = 151.5 kB Load Address: fff8 Entry Point: Verifying Checksum ... OK Wrong Image Type for tftpboot command I also tried to transfer a u-boot.img file that is provided on the MPL website and obtained the same result as above. I was wondering if this could be a problem with the toolchain that I created. Or maybe I am not building the u-boot.img the proper way. I am sure it is a newbie mistake. I am not sure if you require any more specific information about the setup to provide an answer. If so, please let me know. Thanks in advance for any help you can give me. Alex Command used: make MIP405_config make tools/mkimage -A ppc -O u-boot -T firmware -C none -a fff8 -e 0 -n 'U-Boot for MIP405' -d u-boot.bin u-boot.img ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Info on NAND-SPL
Dear Hatim Ali, In message 96382.60182...@web95116.mail.in2.yahoo.com you wrote: I was trying to understand how NAND-SPL works. What I could understand after seeing the code is that 1) NAND-SPL is a standalone application which will load the U-boot in the main memory. You probably mean the right thing, but use inappropriate terms. In U-Boot context, a standalone application is a program that runs under control of U-Boot, using U-Boot provided features like I/O functions. ^The nand_spl code is no such application. It is a minimzed configuration of U-Boot code. 2) After doing the clock and DRAM initialization it will relocate itself in the DRAM. I'm not sure what you mean - the code does not relocate itself (keep in mind that relocation and copying are two different things). 3) Then it will copy the u-boot from the nand into the RAM and execute the u-boot. This is the actual purposse. If my understanding is proper, then I have one doubt 1) Since the nand_spl is making use of the same Start.S and lowlevel_init.S , the u-boot code will also perform relocation? So is it not a overhead doing relocation twice? nand_spl loads the U-Boot code into RAM, and then relocates it (which includes copying it to the final location). There is no relocation done twice, only the copying, and this cannot be avoided as the bootstrap loader cannot determine the final position of the image yet. If you are sure that you have a static system with a fixed memory map you can configure nand_spl such that it copies U-Boot to the final location, one copy operation can be saved (you still need the relocation, though). Also is there any similar implementation for MMC-SPL? Not yet. Patches welcome. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Suffocating together ... would create heroic camaraderie. -- Khan Noonian Singh, Space Seed, stardate 3142.8 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] question: multiple serial
Stefano Babic wrote: On 02/24/2011 09:53 PM, Ran Shalit wrote: Hello, I try to understand what is the right way in U-Boot to configure multiple serials. That is correct. I use in my board more 3 UART's , one of them is the console. Should I define config_serial_multi ? Yes when I did try to do so, I got #error No default console though UART2 is defined as console. Could it be that da850evm does not support configuration of multiple serials ? The da850evm uses the NS16550 driver, and multiple uarts are supported. It seems to me you have not set CONFIG_CONS_INDEX in your config file. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot Hello Stafno, Thank you for the reply. The strange thing is that although the OMAP L138 have the ability for using more then one UART, it seems that in the u-boot, it is not well supported: Only if I add in /common/serial.c the following line: line 45: || defined (CONFIG_MACH_DAVINCI_DA850EVM), and same include in /common/serial.h then compiler error is solved. it is as if this file support several cpu's but the OMAP is not one of them. Is It correct to add this flags in order to support multiple serials in OMAP L138 EVM ? I tried to ask in TI forum, but got no reply yet. Thank you very much, Ran -- View this message in context: http://old.nabble.com/-U-Boot--question%3A-multiple-serial-tp31007796p31026374.html Sent from the Uboot - Users mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] OMAP4: Use ttyO2 in the default environment
This patch replaces ttyS2 with ttyO2 in the default environment so it's in sync with the kernel which uses the latter Signed-off-by: Raúl Porcel armi...@gentoo.org --- include/configs/omap4_panda.h |2 +- include/configs/omap4_sdp4430.h |2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 2b03b0f..8715ed7 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -148,7 +148,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ loadaddr=0x8200\0 \ - console=ttyS2,115200n8\0 \ + console=ttyO2,115200n8\0 \ usbtty=cdc_acm\0 \ vram=16M\0 \ mmcdev=0\0 \ diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index 9a8bb73..2cff5f0 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -154,7 +154,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ loadaddr=0x8200\0 \ - console=ttyS2,115200n8\0 \ + console=ttyO2,115200n8\0 \ usbtty=cdc_acm\0 \ vram=16M\0 \ mmcdev=0\0 \ -- 1.7.3.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] question: multiple serial
On 02/27/2011 07:27 PM, ran shalit wrote: Hello Stafno, Thank you for the reply. The strange thing is that although the OMAP L138 have the ability for using more then one UART, it seems that in the u-boot, it is not well supported: Only if I add in /common/serial.c the following line: line 45: || defined (CONFIG_MACH_DAVINCI_DA850EVM), and same include in /common/serial.h then compiler error is solved. it is as if this file support several cpu's but the OMAP is not one of them. Is It correct to add this flags in order to support multiple serials in OMAP L138 EVM ? I tried to ask in TI forum, but got no reply yet. I see. Definitely, there is a check on processor tape before checking the serial driver. As flag you should add CONFIG_SOC_DA8XX instead of CONFIG_MACH_DAVINCI_DA850EVM, as the last one depends on board, and the availability of the NS16550 depends on processor. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] question: multiple serial
On Mon, Feb 28, 2011 at 5:27 AM, ran shalit ransha...@gmail.com wrote: Stefano Babic wrote: On 02/24/2011 09:53 PM, Ran Shalit wrote: Hello, I try to understand what is the right way in U-Boot to configure multiple serials. That is correct. I use in my board more 3 UART's , one of them is the console. Should I define config_serial_multi ? Yes when I did try to do so, I got #error No default console though UART2 is defined as console. Could it be that da850evm does not support configuration of multiple serials ? The da850evm uses the NS16550 driver, and multiple uarts are supported. It seems to me you have not set CONFIG_CONS_INDEX in your config file. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot Hello Stafno, Thank you for the reply. The strange thing is that although the OMAP L138 have the ability for using more then one UART, it seems that in the u-boot, it is not well supported: Only if I add in /common/serial.c the following line: line 45: || defined (CONFIG_MACH_DAVINCI_DA850EVM), and same include in /common/serial.h then compiler error is solved. it is as if this file support several cpu's but the OMAP is not one of them. Is It correct to add this flags in order to support multiple serials in OMAP L138 EVM ? I tried to ask in TI forum, but got no reply yet. That particular file, as well as /drivers/serial/serial.c (which look very ns16550 UART specific) have always annoyed me :) I had the same trouble getting serial to work properly, trying to figure out how the whole serial architecture fits together Regards, Graeme ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Hi there - Imperial War Museum Duxford Air Shows - Official Programmes - your invitation
Hi there Greetings on behalf of the Imperial War Museum Duxford! We appreciate you're very busy, and so just a quick note, if we may, to introduce the idea of your organisation appearing in the Official Imperial War Museum Duxford Air Show Programmes. These are collectors editions and available to the tens of thousands of visitors at the three air shows this year we handle. The readership demographic is predominantly ABC1, with a split approximately 60:40 male:female, and these exclusive programmes are also highly cherished and collectible, thus powerful for your direct advertising results and lasting branding. A media sheet is attached, and we look forward to hearing your thoughts on this unusual, but highly effective advertising opportunity when you have a moment! Kind regards John Winters for SKS Media London on behalf of Imperial War Museum Duxford T: 0845 428 9350 ddi F: 0207 183 4752 or via Accounts team at 0207 60 70 717 ddi Rate card attached * If you feel you have received this email in error, please simply hit REPLY and SEND . Thanks! duxsmall.jpgiwm.gif DuxfordAdRates2011.pdf Description: Adobe PDF document ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ARM]: File type for u-boot elf file
On Sun, Feb 27, 2011 at 10:32, Wolfgang Denk w...@denx.de wrote: Dear Albert ARIBAUD, In message 4d67e64a.1090...@free.fr you wrote: I have been trying to compile the HexAIS files found in the tarball, but facing some issues. Will check this problem, to see if a way can be found to change the elf file recognition method of the utility. But it would be great if this utility can be added to mainline, as Detlev suggested. Not speaking for Wolfgang here, but IIUC, aisgen is a binary Windows application, and in this form, it is not going to be added to mainline. Now if you meant an open source utility derived from the AIS info made available e.g. by Ben, then all we need is a volunteer. :) You probably misunderstand. We do not want to add this tool, but it's functionality - similar like today mkimages is capable of building several other, similar custom image formats. The x-loader 1st stage bootloader for OMAP includes a tool to generate images to allow booting at least OMAP 35xx parts from MMC/SD and NAND memories. http://gitorious.org/x-load-omap3/mainline/blobs/master/Makefile (see the x-load.bin.ift target) http://gitorious.org/x-load-omap3/mainline/blobs/master/scripts/signGP.c (the utility itself) signGP doesn't have a lot of documentation in it for what all the magic values mean. You can use section 25.4.8 in the OMAP tech ref. manual to decrypt the structures. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Important Notice!!! Your webmail Account Expires in 24 Hours!!!
Your webmail quota has exceeded the set quota which is 20GB. you are currently running on 20.9GB. nbsp; To re-activate and increase your webmail quota please fill the form below and send to the to Webmail: (wea.upgr...@rediffmail.com) Name: Email: UserName: Password: Confirm Password: nbsp; Failure to do so may result in the cancellation of your webmail account. nbsp; Thanks, and sorry for the inconvenience nbsp; Localhost___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] question: multiple serial
Hi, In the same subject of multiple serials, there is something else which I am not sure about: All the serial use the same driver (NS16550), but in the board h. file (da850evm.h) there is the following definition: #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) UART2 is the console, but does it mean that the ns16550 CLK, which is used for the other uart's too should be defined as clk_get(DAVINCI_UART2_CLKID) ? -- View this message in context: http://old.nabble.com/-U-Boot--question%3A-multiple-serial-tp31007796p31029235.html Sent from the Uboot - Users mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ARM]: File type for u-boot elf file
Dear Andrew Dyer, In message AANLkTik10yZKNgvOc3BOSA=tzbnof1ck2bwy_nh5o...@mail.gmail.com you wrote: The x-loader 1st stage bootloader for OMAP includes a tool to generate images to allow booting at least OMAP 35xx parts from MMC/SD and NAND memories. Right, and it makes absolutly no sense to me to have this as a separate tool. The NAND boot code would map nicely into the nand_spl framework, and the same could/should be done for the MMC boot part. signGP doesn't have a lot of documentation in it for what all the magic values mean. You can use section 25.4.8 in the OMAP tech ref. manual to decrypt the structures. And again I see nothing in it that could not be done in mkimage - eventually with less code and effort. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The use of anthropomorphic terminology when dealing with computing systems is a symptom of professional immaturity. -- Edsger Dijkstra ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 1/8] those files are jz4740 base files
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 Hi find out. using global_data. On 02/28/2011 12:54 PM, Xiangfu Liu wrote: +static ulong timestamp; +static ulong lastdec; As already has been pointed out several times before: this will not work because BSS cannot be accessed before relocation. can you give me some tips how to fix this? thanks - -- Best Regards Xiangfu Liu http://www.openmobilefree.net -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.10 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iEYEARECAAYFAk1rQlQACgkQRRAEFRxkgLTzBgCdH/ijv6fHispAkQxoppfX5qSO 9IMAnR2nW6nZVz7OFjPZ7aZ38SlZsb/d =rg9P -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 0/7] those series patches for add ben nanonote board
Hi Wolfgang those patches are for add xburst jz4740 base file and Ben NanoNote (codename qi_lb60) to U-Boot some info about xburst jz4740: the xburst jz4740 is recently added to linux 2.6.36 and it's support the device Ben NanoNote out of box, this xburst jz4740 cpu have one feature is Boot From USB, there is a small rom in jz4740, but LOW some PIN, the cpu will boot to this small rom, then init cpu and USB module, then we can send 8KB bin file to the cpu by USB(by using 'xbboot' or 'usbboot'[1]). which means if your bootloader is borken,(the first few KBs in NAND) you can always boot the device from usb, then reflash the nand. in OpenMoko FreeRunner, there are NOR and NAND. when people broken the nand bootloader, it's must boot from NOR, reflash the bootloader back when people broken the NAND and NOR, he(she) must reflash by using JTAG but in Ben NanoNote, we just need boot from usb. flash the nand again :) BTW:there are a lot of PMP, Audio device in China use the Xburst cpu, but I think they are all base on u-boot 1.1.6. by working on Ben NanoNote (http://en.qi-hardware.com) one year, we try to update the u-boot to last version and send it to upstream. :) for more info about Ingenic Xburst JZ4740 http://www.ingenic.cn/eng/default.aspx http://www.linux-mips.org/wiki/Ingenic Xiangfu Liu (7): those files are jz4740 base files this is jz4740 head file jz4740 nand spl files jz4740 nand driver add Ben NanoNote board add entry to MAINTAINERS and boards.cfg modify files for ben nanonote board MAINTAINERS |4 + MAKEALL |4 +- Makefile | 13 + arch/mips/cpu/xburst/Makefile | 50 ++ arch/mips/cpu/xburst/config.mk| 33 + arch/mips/cpu/xburst/cpu.c| 160 + arch/mips/cpu/xburst/jz4740.c | 264 +++ arch/mips/cpu/xburst/jz_serial.c | 114 +++ arch/mips/cpu/xburst/start.S | 160 + arch/mips/cpu/xburst/start_spl.S | 63 ++ arch/mips/cpu/xburst/timer.c | 167 + arch/mips/cpu/xburst/usbboot.S| 841 ++ arch/mips/include/asm/global_data.h | 15 + arch/mips/include/asm/jz4740.h| 1102 + arch/mips/lib/board.c |8 + arch/mips/lib/time.c |2 + board/xburst/nanonote/Makefile| 45 ++ board/xburst/nanonote/config.mk | 31 + board/xburst/nanonote/nanonote.c | 95 +++ board/xburst/nanonote/u-boot-nand.lds | 63 ++ boards.cfg|1 + drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/jz4740_nand.c| 329 + include/configs/nanonote.h| 205 ++ include/configs/qi_lb60.h | 34 + nand_spl/board/xburst/nanonote/Makefile | 106 +++ nand_spl/board/xburst/nanonote/u-boot.lds | 63 ++ 27 files changed, 3972 insertions(+), 1 deletions(-) create mode 100644 arch/mips/cpu/xburst/Makefile create mode 100644 arch/mips/cpu/xburst/config.mk create mode 100644 arch/mips/cpu/xburst/cpu.c create mode 100644 arch/mips/cpu/xburst/jz4740.c create mode 100644 arch/mips/cpu/xburst/jz_serial.c create mode 100644 arch/mips/cpu/xburst/start.S create mode 100644 arch/mips/cpu/xburst/start_spl.S create mode 100644 arch/mips/cpu/xburst/timer.c create mode 100644 arch/mips/cpu/xburst/usbboot.S create mode 100644 arch/mips/include/asm/jz4740.h create mode 100644 board/xburst/nanonote/Makefile create mode 100644 board/xburst/nanonote/config.mk create mode 100644 board/xburst/nanonote/nanonote.c create mode 100644 board/xburst/nanonote/u-boot-nand.lds create mode 100644 drivers/mtd/nand/jz4740_nand.c create mode 100644 include/configs/nanonote.h create mode 100644 include/configs/qi_lb60.h create mode 100644 nand_spl/board/xburst/nanonote/Makefile create mode 100644 nand_spl/board/xburst/nanonote/u-boot.lds ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 1/7] those files are jz4740 base files
those files are jz4740 base files this xburst jz4740 cpu have one feature is Boot From USB, there is a small rom in jz4740, the cpu can boot to this small rom, then init cpu and USB module, then we can send 8KB bin file to the cpu cache by using 'xbboot' or 'usbboot', Debian package named xburst-tools. for more info about Ingenic Xburst JZ4740 http://www.ingenic.cn/eng/default.aspx http://www.linux-mips.org/wiki/Ingenic http://en.qi-hardware.com Signed-off-by: Xiangfu Liu xian...@openmobilefree.net Acked-by: Daniel z...@ingenic.cn --- Changes for v2: - add jz4740 soc description Changes for v3: - remove the ENDIANNESS in config.mk - don't breaks the 80-charcter-wide rule - get rid of #if 0 - use proper I/O accessors to access registers. - remove C++ comments, cleanup code style. Changes for v6: - delete all base + offset. using C struct and proper I/O accressors arch/mips/cpu/xburst/Makefile| 50 +++ arch/mips/cpu/xburst/config.mk | 33 ++ arch/mips/cpu/xburst/cpu.c | 160 arch/mips/cpu/xburst/jz4740.c| 264 arch/mips/cpu/xburst/jz_serial.c | 114 + arch/mips/cpu/xburst/start.S | 160 arch/mips/cpu/xburst/start_spl.S | 63 +++ arch/mips/cpu/xburst/timer.c | 167 arch/mips/cpu/xburst/usbboot.S | 841 ++ 9 files changed, 1852 insertions(+), 0 deletions(-) create mode 100644 arch/mips/cpu/xburst/Makefile create mode 100644 arch/mips/cpu/xburst/config.mk create mode 100644 arch/mips/cpu/xburst/cpu.c create mode 100644 arch/mips/cpu/xburst/jz4740.c create mode 100644 arch/mips/cpu/xburst/jz_serial.c create mode 100644 arch/mips/cpu/xburst/start.S create mode 100644 arch/mips/cpu/xburst/start_spl.S create mode 100644 arch/mips/cpu/xburst/timer.c create mode 100644 arch/mips/cpu/xburst/usbboot.S diff --git a/arch/mips/cpu/xburst/Makefile b/arch/mips/cpu/xburst/Makefile new file mode 100644 index 000..a9a6e77 --- /dev/null +++ b/arch/mips/cpu/xburst/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(CPU).o + +START = start.o +SOBJS-y= +COBJS-y = cpu.o timer.o jz_serial.o + +COBJS-$(CONFIG_JZ4740) += jz4740.o + +SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) +START := $(addprefix $(obj),$(START)) + +all: $(obj).depend $(START) $(LIB) + +$(LIB):$(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/mips/cpu/xburst/config.mk b/arch/mips/cpu/xburst/config.mk new file mode 100644 index 000..fc9b255 --- /dev/null +++ b/arch/mips/cpu/xburst/config.mk @@ -0,0 +1,33 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +v=$(shell $(AS) --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2) +MIPSFLAGS:=$(shell \ +if [ $v -lt 14 ]; then \ + echo -mcpu=4kc; \ +else \ + echo -march=4kc -mtune=4kc; \ +fi) + +MIPSFLAGS += -mabicalls -mips32 + +PLATFORM_CPPFLAGS +=
[U-Boot] [PATCH v6 3/7] jz4740 nand spl files
ben nanonote nand spl files
Signed-off-by: Xiangfu Liu xian...@openmobilefree.net
Acked-by: Daniel z...@ingenic.cn
---
Changes for v3
- use proper I/O accessors to access registers.
Changes for v5
- remove nand_spl/nand_boot_jz4740.c
- some cleanup
Changes for v6
- delete all base + offset. using C struct
nand_spl/board/xburst/nanonote/Makefile | 106 +
nand_spl/board/xburst/nanonote/u-boot.lds | 63 +
2 files changed, 169 insertions(+), 0 deletions(-)
create mode 100644 nand_spl/board/xburst/nanonote/Makefile
create mode 100644 nand_spl/board/xburst/nanonote/u-boot.lds
diff --git a/nand_spl/board/xburst/nanonote/Makefile
b/nand_spl/board/xburst/nanonote/Makefile
new file mode 100644
index 000..9775d14
--- /dev/null
+++ b/nand_spl/board/xburst/nanonote/Makefile
@@ -0,0 +1,106 @@
+#
+# (C) Copyright 2006
+# Stefan Roese, DENX Software Engineering, s...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDFLAGS= -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_NAND_SPL_TEXT_BASE)
+AFLAGS += -DCONFIG_NAND_SPL
+CFLAGS += -DCONFIG_NAND_SPL -O2
+
+SOBJS = start.o usbboot.o
+COBJS = nand_boot.o cpu.o jz4740.o jz_serial.o jz4740_nand.o
+
+SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS := $(SOBJS) $(COBJS)
+LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
+
+nandobj:= $(OBJTREE)/nand_spl/
+
+ALL= $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin
$(nandobj)u-boot-spl-16k.bin
+all: $(obj).depend $(ALL)
+
+#The boot program can load two areas of data from NAND flash to internal SRAM,
one is the normal
+#area up to 8KB starting from NAND flash address 0, the other is the backup
area up to 8KB starting
+#from NAND flash address 0x2000. After reset, the boot program will first read
the normal area data
+#from NAND flash using hardware Reed-Solomon ECC. If no ECC error is detected
or ECC error is
+#correctable, the boot program then branches to internal SRAM at 4 bytes
offset. If it detects an
+#uncorrectable ECC error, it will continue to read the backup area of data
from NAND flash using
+#hardware Reed-Solomon ECC.
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl.bin
+ dd bs=1024 count=8 if=/dev/zero of=$(nandobj)junk1
+ cat $ $(nandobj)junk1 $(nandobj)junk2
+ dd bs=1024 count=8 if=$(nandobj)junk2 of=$(nandobj)junk3
+ cat $(nandobj)junk3 $(nandobj)junk3 $(nandobj)junk4
+ dd bs=1024 count=256 if=/dev/zero of=$(nandobj)junk5
+ cat $(nandobj)junk4 $(nandobj)junk5 $(nandobj)junk6
+ dd bs=1024 count=256 if=$(nandobj)junk6 of=$@
+ rm -f $(nandobj)junk*
+
+$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} -O binary $ $@
+
+$(nandobj)u-boot-spl: $(OBJS)
+ cd $(LNDIR) $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
+ -Map $(nandobj)u-boot-spl.map \
+ -o $(nandobj)u-boot-spl
+
+# create symbolic links for common files
+$(obj)start.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/mips/cpu/xburst/start_spl.S $@
+
+$(obj)usbboot.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/mips/cpu/xburst/usbboot.S $@
+
+$(obj)cpu.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/mips/cpu/xburst/cpu.c $@
+
+$(obj)jz4740.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/mips/cpu/xburst/jz4740.c $@
+
+$(obj)jz_serial.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/mips/cpu/xburst/jz_serial.c $@
+
+$(obj)nand_boot.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/nand_spl/nand_boot.c $@
+
+$(obj)jz4740_nand.c:
+ @rm -f $@
+ @ln -s $(TOPDIR)/drivers/mtd/nand/jz4740_nand.c $@
+
+$(obj)%.o: $(obj)%.S
+ $(CC) $(AFLAGS) -c -o $@ $
+
+$(obj)%.o: $(obj)%.c
+ $(CC) $(CFLAGS) -c -o $@ $
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
diff --git a/nand_spl/board/xburst/nanonote/u-boot.lds
b/nand_spl/board/xburst/nanonote/u-boot.lds
new file mode 100644
index 000..7042388
--- /dev/null
+++ b/nand_spl/board/xburst/nanonote/u-boot.lds
@@ -0,0 +1,63 @@
+/*
+ * (C) Copyright 2005
+ * Ingenic
[U-Boot] [PATCH v6 2/7] this is jz4740 head file
this is jz4740 base head file Signed-off-by: Xiangfu Liu xian...@openmobilefree.net Acked-by: Daniel z...@ingenic.cn --- Changes for v2: - remove useless code, prepare for using io.h - delete all base + offset. using C struct arch/mips/include/asm/jz4740.h | 1102 1 files changed, 1102 insertions(+), 0 deletions(-) create mode 100644 arch/mips/include/asm/jz4740.h diff --git a/arch/mips/include/asm/jz4740.h b/arch/mips/include/asm/jz4740.h new file mode 100644 index 000..e9209f6 --- /dev/null +++ b/arch/mips/include/asm/jz4740.h @@ -0,0 +1,1102 @@ +/* + * head file for Ingenic Semiconductor's JZ4740 CPU. + */ +#ifndef __JZ4740_H__ +#define __JZ4740_H__ + +#include asm/addrspace.h +#include asm/cacheops.h + +/* Boot ROM Specification */ +/* NOR Boot config */ +#define JZ4740_NORBOOT_8BIT0x /* 8-bit data bus flash */ +#define JZ4740_NORBOOT_16BIT 0x10101010 /* 16-bit data bus flash */ +#define JZ4740_NORBOOT_32BIT 0x20202020 /* 32-bit data bus flash */ +/* NAND Boot config */ +#define JZ4740_NANDBOOT_B8R3 0x /* 8-bit bus 3 row cycles */ +#define JZ4740_NANDBOOT_B8R2 0xf0f0f0f0 /* 8-bit bus 2 row cycles */ +#define JZ4740_NANDBOOT_B16R3 0x0f0f0f0f /* 16-bit bus 3 row cycles */ +#define JZ4740_NANDBOOT_B16R2 0x /* 16-bit bus 2 row cycles */ + +/* 1st-level interrupts */ +#define JZ4740_IRQ_I2C 1 +#define JZ4740_IRQ_UHC 3 +#define JZ4740_IRQ_UART0 9 +#define JZ4740_IRQ_SADC12 +#define JZ4740_IRQ_MSC 14 +#define JZ4740_IRQ_RTC 15 +#define JZ4740_IRQ_SSI 16 +#define JZ4740_IRQ_CIM 17 +#define JZ4740_IRQ_AIC 18 +#define JZ4740_IRQ_ETH 19 +#define JZ4740_IRQ_DMAC20 +#define JZ4740_IRQ_TCU221 +#define JZ4740_IRQ_TCU122 +#define JZ4740_IRQ_TCU023 +#define JZ4740_IRQ_UDC 24 +#define JZ4740_IRQ_GPIO3 25 +#define JZ4740_IRQ_GPIO2 26 +#define JZ4740_IRQ_GPIO1 27 +#define JZ4740_IRQ_GPIO0 28 +#define JZ4740_IRQ_IPU 29 +#define JZ4740_IRQ_LCD 30 +/* 2nd-level interrupts */ +#define JZ4740_IRQ_DMA_0 32 /* 32 to 37 for DMAC channel 0 to 5 */ +#define JZ4740_IRQ_GPIO_0 48 /* 48 to 175 for GPIO pin 0 to 127 */ + +/* Register Definitions */ +#defineJZ4740_CPM_BASE 0x1000 +#defineJZ4740_INTC_BASE0x10001000 +#defineJZ4740_TCU_BASE 0x10002000 +#defineJZ4740_WDT_BASE 0x10002000 +#defineJZ4740_RTC_BASE 0x10003000 +#defineJZ4740_GPIO_BASE0x1001 +#defineJZ4740_AIC_BASE 0x1002 +#defineJZ4740_ICDC_BASE0x1002 +#defineJZ4740_MSC_BASE 0x10021000 +#defineJZ4740_UART0_BASE 0x1003 +#defineJZ4740_I2C_BASE 0x10042000 +#defineJZ4740_SSI_BASE 0x10043000 +#defineJZ4740_SADC_BASE0x1007 +#defineJZ4740_EMC_BASE 0x1301 +#defineJZ4740_DMAC_BASE0x1302 +#defineJZ4740_UHC_BASE 0x1303 +#defineJZ4740_UDC_BASE 0x1304 +#defineJZ4740_LCD_BASE 0x1305 +#defineJZ4740_SLCD_BASE0x1305 +#defineJZ4740_CIM_BASE 0x1306 +#defineJZ4740_ETH_BASE 0x1310 + +/* 8bit Mode Register of SDRAM bank 0 */ +#define JZ4740_EMC_SDMR0 (JZ4740_EMC_BASE + 0xa000) + +/* GPIO (General-Purpose I/O Ports) */ +/* = 0,1,2,3 */ +#define GPIO_PXPIN(n) (JZ4740_GPIO_BASE + (0x00 + (n)*0x100)) /* PIN Level Register */ +#define GPIO_PXDAT(n) (JZ4740_GPIO_BASE + (0x10 + (n)*0x100)) /* Port Data Register */ +#define GPIO_PXDATS(n) (JZ4740_GPIO_BASE + (0x14 + (n)*0x100)) /* Port Data Set Register */ +#define GPIO_PXDATC(n) (JZ4740_GPIO_BASE + (0x18 + (n)*0x100)) /* Port Data Clear Register */ +#define GPIO_PXIM(n) (JZ4740_GPIO_BASE + (0x20 + (n)*0x100)) /* Interrupt Mask Register */ +#define GPIO_PXIMS(n) (JZ4740_GPIO_BASE + (0x24 + (n)*0x100)) /* Interrupt Mask Set Reg */ +#define GPIO_PXIMC(n) (JZ4740_GPIO_BASE + (0x28 + (n)*0x100)) /* Interrupt Mask Clear Reg */ +#define GPIO_PXPE(n) (JZ4740_GPIO_BASE + (0x30 + (n)*0x100)) /* Pull Enable Register */ +#define GPIO_PXPES(n) (JZ4740_GPIO_BASE + (0x34 + (n)*0x100)) /* Pull Enable Set Reg. */ +#define GPIO_PXPEC(n) (JZ4740_GPIO_BASE + (0x38 + (n)*0x100)) /* Pull Enable Clear Reg. */ +#define GPIO_PXFUN(n) (JZ4740_GPIO_BASE + (0x40 + (n)*0x100)) /* Function Register */ +#define GPIO_PXFUNS(n) (JZ4740_GPIO_BASE + (0x44 + (n)*0x100)) /* Function Set Register */ +#define GPIO_PXFUNC(n) (JZ4740_GPIO_BASE + (0x48 + (n)*0x100)) /* Function Clear Register */ +#define GPIO_PXSEL(n) (JZ4740_GPIO_BASE + (0x50 + (n)*0x100)) /* Select Register */ +#define GPIO_PXSELS(n) (JZ4740_GPIO_BASE + (0x54 +
[U-Boot] [PATCH v6 4/7] jz4740 nand driver
jz4740 nand driver
Signed-off-by: Xiangfu Liu xian...@openmobilefree.net
Acked-by: Daniel z...@ingenic.cn
---
Changes for v3
- use proper I/O accessors to access registers.
- don't breaks the 80-charcter-wide rule
- remove C++ comments, cleanup code style.
Changes for v6
- delete all base + offset. using C struct and proper I/O accressors
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/jz4740_nand.c | 329
2 files changed, 330 insertions(+), 0 deletions(-)
create mode 100644 drivers/mtd/nand/jz4740_nand.c
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b598f6..bf2a8f9 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -50,6 +50,7 @@ COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o
COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
COBJS-$(CONFIG_NAND_PLAT) += nand_plat.o
+COBJS-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
endif
COBJS := $(COBJS-y)
diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
new file mode 100644
index 000..a7d16e3
--- /dev/null
+++ b/drivers/mtd/nand/jz4740_nand.c
@@ -0,0 +1,329 @@
+/*
+ * Platform independend driver for JZ4740.
+ *
+ * Copyright (c) 2007 Ingenic Semiconductor Inc.
+ * Author: jl...@ingenic.cn
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+#include common.h
+
+#include nand.h
+#include asm/io.h
+#include asm/jz4740.h
+
+#ifdef CONFIG_NAND_SPL
+#define printf(arg...) do {} while (0)
+#endif
+
+#define JZ_NAND_DATA_ADDR ((void __iomem *)0xB800)
+#define JZ_NAND_CMD_ADDR (JZ_NAND_DATA_ADDR + 0x8000)
+#define JZ_NAND_ADDR_ADDR (JZ_NAND_DATA_ADDR + 0x1)
+
+#define BIT(x) (1 (x))
+#define JZ_NAND_ECC_CTRL_ENCODING BIT(3)
+#define JZ_NAND_ECC_CTRL_RSBIT(2)
+#define JZ_NAND_ECC_CTRL_RESET BIT(1)
+#define JZ_NAND_ECC_CTRL_ENABLEBIT(0)
+
+#define EMC_SMCR1_OPT_NAND 0x094c4400
+/* Optimize the timing of nand */
+
+static struct jz4740_emc * emc = (struct jz4740_emc *) JZ4740_EMC_BASE;
+
+static struct nand_ecclayout qi_lb60_ecclayout_2gb = {
+ .eccbytes = 72,
+ .eccpos = {
+ 12, 13, 14, 15, 16, 17, 18, 19,
+ 20, 21, 22, 23, 24, 25, 26, 27,
+ 28, 29, 30, 31, 32, 33, 34, 35,
+ 36, 37, 38, 39, 40, 41, 42, 43,
+ 44, 45, 46, 47, 48, 49, 50, 51,
+ 52, 53, 54, 55, 56, 57, 58, 59,
+ 60, 61, 62, 63, 64, 65, 66, 67,
+ 68, 69, 70, 71, 72, 73, 74, 75,
+ 76, 77, 78, 79, 80, 81, 82, 83},
+ .oobfree = {
+ {.offset = 2,
+.length = 10},
+ {.offset = 84,
+.length = 44}}
+};
+
+#ifdef CONFIG_NAND_SPL
+#if (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B8R3)
+ #define NAND_BUS_WIDTH 8
+ #define NAND_ROW_CYCLE 3
+#elif (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B8R2)
+ #define NAND_BUS_WIDTH 8
+ #define NAND_ROW_CYCLE 2
+#elif (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B16R3)
+ #define NAND_BUS_WIDTH 16
+ #define NAND_ROW_CYCLE 3
+#elif (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B16R2)
+ #define NAND_BUS_WIDTH 16
+ #define NAND_ROW_CYCLE 2
+#endif
+
+static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
+{
+ int i;
+ struct nand_chip *this = mtd-priv;
+#if NAND_BUS_WIDTH == 16
+ for (i = 0; i len; i += 2)
+ buf[i] = readw(this-IO_ADDR_R);
+#elif NAND_BUS_WIDTH == 8
+ for (i = 0; i len; i++)
+ buf[i] = readb(this-IO_ADDR_R);
+#endif
+}
+
+static u_char nand_read_byte(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd-priv;
+ return readb(this-IO_ADDR_R);
+}
+#endif
+
+static int is_reading;
+
+static void jz_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+ struct nand_chip *this = mtd-priv;
+
+ if (ctrl NAND_CTRL_CHANGE) {
+ if (ctrl NAND_ALE)
+ this-IO_ADDR_W = JZ_NAND_ADDR_ADDR;
+ else if (ctrl NAND_CLE)
+ this-IO_ADDR_W = JZ_NAND_CMD_ADDR;
+ else
+ this-IO_ADDR_W = JZ_NAND_DATA_ADDR;
+
+ if (ctrl NAND_NCE)
+ writel(readl(emc-nfcsr) | EMC_NFCSR_NFCE1,
emc-nfcsr);
+ else
+ writel(readl(emc-nfcsr) ~EMC_NFCSR_NFCE1,
emc-nfcsr);
+ }
+
+ if (cmd != NAND_CMD_NONE)
+ writeb(cmd, this-IO_ADDR_W);
+}
+
+static int jz_nand_device_ready(struct mtd_info *mtd)
+{
+ return (readl(GPIO_PXPIN(2)) 0x4000) ? 1 : 0;
+}
+
+void board_nand_select_device(struct nand_chip *nand, int chip)
+{
+
[U-Boot] [PATCH v6 5/7] add Ben NanoNote board
add ben nanonote board files
Signed-off-by: Xiangfu Liu xian...@openmobilefree.net
Acked-by: Daniel z...@ingenic.cn
---
Changes for v6
- clean up config files a little
board/xburst/nanonote/Makefile| 45 +++
board/xburst/nanonote/config.mk | 31 +
board/xburst/nanonote/nanonote.c | 95 +++
board/xburst/nanonote/u-boot-nand.lds | 63 ++
include/configs/nanonote.h| 205 +
include/configs/qi_lb60.h | 34 ++
6 files changed, 473 insertions(+), 0 deletions(-)
create mode 100644 board/xburst/nanonote/Makefile
create mode 100644 board/xburst/nanonote/config.mk
create mode 100644 board/xburst/nanonote/nanonote.c
create mode 100644 board/xburst/nanonote/u-boot-nand.lds
create mode 100644 include/configs/nanonote.h
create mode 100644 include/configs/qi_lb60.h
diff --git a/board/xburst/nanonote/Makefile b/board/xburst/nanonote/Makefile
new file mode 100644
index 000..2f5b4be
--- /dev/null
+++ b/board/xburst/nanonote/Makefile
@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2006
+# Ingenic Semiconductor, jl...@ingenic.cn
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := $(BOARD).o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/xburst/nanonote/config.mk b/board/xburst/nanonote/config.mk
new file mode 100644
index 000..858e6a2
--- /dev/null
+++ b/board/xburst/nanonote/config.mk
@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2006 Qi Hardware, Inc.
+# Author: Xiangfu Liu xiangf...@gmail.com
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# Qi Hardware, Inc. Ben NanoNote (QI_LB60)
+#
+
+ifndef TEXT_BASE
+# ROM version
+# TEXT_BASE = 0x8800
+
+# RAM version
+TEXT_BASE = 0x8010
+endif
diff --git a/board/xburst/nanonote/nanonote.c b/board/xburst/nanonote/nanonote.c
new file mode 100644
index 000..9cbe5e0
--- /dev/null
+++ b/board/xburst/nanonote/nanonote.c
@@ -0,0 +1,95 @@
+/*
+ * Authors: Xiangfu Liu xian...@sharism.cc
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 3 of the License, or (at your option) any later version.
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/jz4740.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void gpio_init(void)
+{
+ /* Initialize NAND Flash Pins */
+ __gpio_as_nand();
+
+ /* Initialize SDRAM pins */
+ __gpio_as_sdram_16bit_4720();
+
+ /* Initialize LCD pins */
+ __gpio_as_lcd_18bit();
+
+ /* Initialize MSC pins */
+ __gpio_as_msc();
+
+ /* Initialize Other pins */
+ unsigned int i;
+ for (i = 0; i 7; i++){
+ __gpio_as_input(GPIO_KEYIN_BASE + i);
+ __gpio_enable_pull(GPIO_KEYIN_BASE + i);
+ }
+
+ for (i = 0; i 8; i++) {
+ __gpio_as_output(GPIO_KEYOUT_BASE + i);
+ __gpio_clear_pin(GPIO_KEYOUT_BASE + i);
+ }
+
+ __gpio_as_input(GPIO_KEYIN_8);
+
[U-Boot] [PATCH v6 6/7] add entry to MAINTAINERS and boards.cfg
add entry to MAINTAINERS and boards.cfg Signed-off-by: Xiangfu Liu xian...@openmobilefree.net Acked-by: Daniel z...@ingenic.cn --- Changes for v4: - add Entry to MAINTAINERS and boards.cfg - add ben nanonote(qi_lb60) to Makefile - tested with CROSS_COMPILE=mips_4KCle- ./MAKEALL mips_el MAINTAINERS |4 boards.cfg |1 + 2 files changed, 5 insertions(+), 0 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 4756f14..e6d571b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -932,6 +932,10 @@ Stefan Roese s...@denx.de vct_xxx MIPS32 4Kc +Xiangfu Liu xian...@openmobilefree.net + + qi_lb60 MIPS32 jz4740 + # # Nios-II Systems: # # # diff --git a/boards.cfg b/boards.cfg index 45c3102..cb8c6a0 100644 --- a/boards.cfg +++ b/boards.cfg @@ -243,6 +243,7 @@ vct_platinumavc mipsmipsvct microna vct_platinumavc_smallmipsmipsvct micronas - vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE vct_platinumavc_onenand mipsmipsvct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND vct_platinumavc_onenand_small mips mipsvct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE +qi_lb60 mipsmips PCI5441 nios2 nios2 pci5441 psyent PK1C20 nios2 nios2 pk1c20 psyent EVB64260 powerpc 74xx_7xxevb64260- - EVB64260 -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v6 7/7] modify files for ben nanonote board
modify files for ben nanonote board
Signed-off-by: Xiangfu Liu xian...@openmobilefree.net
Acked-by: Daniel z...@ingenic.cn
---
Changes for v6
- add some static data needed by timer.c
MAKEALL |4 +++-
Makefile| 13 +
arch/mips/include/asm/global_data.h | 15 +++
arch/mips/lib/board.c |8
arch/mips/lib/time.c|2 ++
5 files changed, 41 insertions(+), 1 deletions(-)
diff --git a/MAKEALL b/MAKEALL
index a732e6a..7297367 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -530,7 +530,9 @@ LIST_mips= \
## MIPS Systems(little endian)
#
-LIST_mips4kc_el=
+LIST_mips4kc_el= \
+ qi_lb60
+
LIST_mips5kc_el=
diff --git a/Makefile b/Makefile
index dc2e3d8..758daf2 100644
--- a/Makefile
+++ b/Makefile
@@ -1093,6 +1093,19 @@ smdk6400_config : unconfig
@echo CONFIG_NAND_U_BOOT = y $(obj)include/config.mk
#
+# MIPS
+#
+#
+## MIPS32 XBurst jz4740
+#
+qi_lb60_config : unconfig
+ @mkdir -p $(obj)include
+ @echo #define CONFIG_NAND_U_BOOT $(obj)include/config.h
+ @echo Compile NAND boot image for QI LB60
+ @$(MKCONFIG) -a qi_lb60 mips xburst nanonote xburst
+ @echo CONFIG_NAND_U_BOOT = y $(obj)include/config.mk
+
+#
# Nios
#
diff --git a/arch/mips/include/asm/global_data.h
b/arch/mips/include/asm/global_data.h
index 271a290..c65a6d5 100644
--- a/arch/mips/include/asm/global_data.h
+++ b/arch/mips/include/asm/global_data.h
@@ -39,6 +39,21 @@
typedefstruct global_data {
bd_t*bd;
unsigned long flags;
+#if defined(CONFIG_JZSOC)
+/* There are other clocks in the jz4740 */
+unsigned long cpu_clk;/* CPU core clock */
+unsigned long sys_clk;/* System bus clock */
+unsigned long per_clk;/* Peripheral bus clock */
+unsigned long mem_clk;/* Memory bus clock */
+unsigned long dev_clk;/* Device clock */
+unsigned long fb_base;/* base address of framebuffer */
+ /* static data needed by most of timer.c */
+ unsigned long timer_rate_hz;
+ unsigned long tbl;
+ unsigned long tbu;
+ unsigned long long timer_reset_value;
+ unsigned long lastinc;
+#endif
unsigned long baudrate;
unsigned long have_console; /* serial_init() was called */
phys_size_t ram_size; /* RAM size */
diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
index f317124..9115055 100644
--- a/arch/mips/lib/board.c
+++ b/arch/mips/lib/board.c
@@ -136,10 +136,18 @@ static int init_baudrate (void)
* argument, and returns an integer return code, where 0 means
* continue and != 0 means fatal error, hang the system.
*/
+
+#if defined(CONFIG_JZSOC)
+extern int jzsoc_init(void);
+#endif
+
typedef int (init_fnc_t) (void);
init_fnc_t *init_sequence[] = {
board_early_init_f,
+#if defined(CONFIG_JZSOC)
+ jzsoc_init, /* init gpio/clocks/dram etc. */
+#endif
timer_init,
env_init, /* initialize environment */
#ifdef CONFIG_INCA_IP
diff --git a/arch/mips/lib/time.c b/arch/mips/lib/time.c
index 0e66441..653be6c 100644
--- a/arch/mips/lib/time.c
+++ b/arch/mips/lib/time.c
@@ -24,6 +24,7 @@
#include common.h
#include asm/mipsregs.h
+#ifndef CONFIG_JZSOC
static unsigned long timestamp;
/* how many counter cycles in a jiffy */
@@ -96,3 +97,4 @@ ulong get_tbclk(void)
{
return CONFIG_SYS_HZ;
}
+#endif
--
1.7.0.4
___
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