Re: [U-Boot] [PATCH 4/8] orion5x: Allow SDRAM initialization to be omitted
On Sat, Jan 29, 2011 at 2:36 AM, Albert ARIBAUD albert.arib...@free.fr wrote: Le 29/01/2011 02:00, Michael Spang a écrit : For the TS-7800, the FPGA contains a bootloader which handles the SDRAM initialization and loads a bootloader from RAM. We should not try to initialize RAM again while running from it. Signed-off-by: Michael Spangmsp...@csclub.uwaterloo.ca --- arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S | 4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S index 0523bd4..37d7d14 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S +++ b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S @@ -86,6 +86,8 @@ lowlevel_init: +#ifndef CONFIG_SKIP_SDRAM_INIT + /* Use 'r4 as the base for internal register accesses */ ldr r4, =ORION5X_REGS_PHY_BASE @@ -289,5 +291,7 @@ lowlevel_init: orr r2, r2, r6 str r2, [r3, #0x484] +#endif + /* Return to U-boot via saved link register */ mov pc, lr That's basically making lowlevel_init empty, so I would prefer that you put #ifdef/#endif around the call to lowlevel_init in start.S and modify the orion5x Makefile to include lowlevel_init.S only if CONFIG_SKIP_DRAM_INIT is not defined. (come to think of it, CONFIG_SKIP_LOWLEVEL_INIT is a bit of a misnomer since it actually skips not only lowlevelinit but also cpu_init_crit. Possibly one could even go as far as renaming CONFIG_SKIP_LOWLEVEL_INIT to CONFIG_SKIP_CPU_INIT_CRIT, and then reuse CONFIG_SKIP_LOWLEVEL_INIT for lowlevel_init; but that can be a separate patch, with a nifty doc update.) I've done the latter change. I thought about moving the call to lowlevel_init outside of cpu_init_crit, but I doubt it is useful to do board-specific initialization without also initializing the CPU. I've also removed the annotation that CONFIG_SKIP_LOWLEVEL_INIT option is ARM-only, because there is one mips board (vct) that uses this option. Michael ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/9] TS-7800 port for U-Boot
Le 17/03/2011 20:46, Michael Spang a écrit : The TS-7800 is an Orion5x implementation by Technologic Systems. Albert, Wolfgang - Thanks for reviewing my patch series and sorry for the delay in updating it. Hi Michael, In return, sorry in advance for the delay in reviewing this new patch set -- I will do during the week-end, especially as I want to test on ED Mini V2 for regression. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 8/9] Add NAND support for TS-7800
On Thu, 17 Mar 2011 15:47:02 -0400 Michael Spang msp...@csclub.uwaterloo.ca wrote: The NAND control functions were written by Alexander Clouter and copied here from Linux. Signed-off-by: Michael Spang msp...@csclub.uwaterloo.ca --- drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/ts7800_nand.c | 68 include/configs/ts7800.h | 47 ++-- 3 files changed, 113 insertions(+), 3 deletions(-) create mode 100644 drivers/mtd/nand/ts7800_nand.c Acked-by: Scott Wood scottw...@freescale.com -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Working on u-boot on panda board.
Aneesh V wrote: Hi Gilles, On Thursday 17 March 2011 06:13 PM, Gilles Chanteperdrix wrote: Hi, I would like to make some changes to u-boot on pandaboard. Sometimes in the past, in u-boot, I could loadb a new u-boot binary, then go to it, and the new version of u-boot would start. This was far from perfect, but it made testing small changes possible. This also works with the version of u-boot provided on the pandaboard community site. The magic which made this possible was in the start.S file, I see that the code changed, but there still seems to be a relocation (somewhat more complicated, since it handles ELF relocations), so it seems it should work. So my question is: is this loadb+go method still supposed to be working, and only broken, somehow, on pandaboard? Or is it no longer supposed to be working? Couple of things you might want to consider. * According to the new relocation scheme u-boot should start running from the address that it is linked to. You must load it to CONFIG_SYS_TEXT_BASE * Data cache enabled in U-Boot could be a problem. You will end up having cache coherency issues unless you flush the caches after loadb. Better keep them disabled using CONFIG_SYS_NO_DCACHE It works like a charm. Thanks ! -- Gilles. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/4] powerpc/mpc8572ds: revise board specific timing for dual-rank DIMMs
From: York Sun york...@freescale.com
Tested all possible values for clk_adjust and write_data_delay for dual
rank UDIMM and RDIMM to revise the tables.
Signed-off-by: York Sun york...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
board/freescale/mpc8572ds/ddr.c | 110 +++---
1 files changed, 78 insertions(+), 32 deletions(-)
diff --git a/board/freescale/mpc8572ds/ddr.c b/board/freescale/mpc8572ds/ddr.c
index d66ede2..cdde6ec 100644
--- a/board/freescale/mpc8572ds/ddr.c
+++ b/board/freescale/mpc8572ds/ddr.c
@@ -49,28 +49,27 @@ typedef struct {
u32 force_2T;
} board_specific_parameters_t;
-/* ranges for parameters:
- * wr_data_delay = 0-6
- * clk adjust = 0-8
- * cpo 2-0x1E (30)
+/*
+ * CPO value doesn't matter if workaround for errata 111 and 134 enabled.
+ *
+ * For DDR2 DIMM, all combinations of clk_adjust and write_data_delay have been
+ * tested. For RDIMM, clk_adjust = 4 and write_data_delay = 3 is optimized for
+ * all clocks from 400MT/s to 800MT/s, verified with Kingston KVR800D2D8P6/2G.
+ * For UDIMM, clk_adjust = 8 and write_delay = 5 is optimized for all clocks
+ * from 400MT/s to 800MT/s, verified with Micron MT18HTF25672AY-800E1.
*/
-
-
-/* XXX: these values need to be checked for all interleaving modes. */
-/* XXX: No reliable dual-rank 800 MHz setting has been found. It may
- * seem reliable, but errors will appear when memory intensive
- * program is run. */
-/* XXX: Single rank at 800 MHz is OK. */
-const board_specific_parameters_t board_specific_parameters[][20] = {
+const board_specific_parameters_t board_specific_parameters_udimm[][20] = {
{
- /* memory controller 0 */
- /*lo| hi| num| clk| cpo|wrdata|2T*/
- /* mhz| mhz|ranks|adjst|| delay| */
- { 0, 333,2,6, 7,3, 0},
- {334, 400,2,6, 9,3, 0},
- {401, 549,2,6, 11,3, 0},
- {550, 680,2,1, 10,5, 0},
- {681, 850,2,1, 12,5, 1},
+ /*
+* memory controller 0
+*lo| hi| num| clk| cpo|wrdata|2T
+* mhz| mhz|ranks|adjst|| delay|
+*/
+ { 0, 333,2,8, 7,5, 0},
+ {334, 400,2,8, 9,5, 0},
+ {401, 549,2,8, 11,5, 0},
+ {550, 680,2,8, 10,5, 0},
+ {681, 850,2,8, 12,5, 1},
{ 0, 333,1,6, 7,3, 0},
{334, 400,1,6, 9,3, 0},
{401, 549,1,6, 11,3, 0},
@@ -79,14 +78,16 @@ const board_specific_parameters_t
board_specific_parameters[][20] = {
},
{
- /* memory controller 1 */
- /*lo| hi| num| clk| cpo|wrdata|2T*/
- /* mhz| mhz|ranks|adjst|| delay| */
- { 0, 333,2, 6, 7,3, 0},
- {334, 400,2, 6, 9,3, 0},
- {401, 549,2, 6, 11,3, 0},
- {550, 680,2, 1, 11,6, 0},
- {681, 850,2, 1, 13,6, 1},
+ /*
+* memory controller 1
+*lo| hi| num| clk| cpo|wrdata|2T
+* mhz| mhz|ranks|adjst|| delay|
+*/
+ { 0, 333,2, 8, 7,5, 0},
+ {334, 400,2, 8, 9,5, 0},
+ {401, 549,2, 8, 11,5, 0},
+ {550, 680,2, 8, 11,5, 0},
+ {681, 850,2, 8, 13,5, 1},
{ 0, 333,1, 6, 7,3, 0},
{334, 400,1, 6, 9,3, 0},
{401, 549,1, 6, 11,3, 0},
@@ -95,16 +96,56 @@ const board_specific_parameters_t
board_specific_parameters[][20] = {
}
};
+const board_specific_parameters_t board_specific_parameters_rdimm[][20] = {
+ {
+ /*
+* memory controller 0
+*lo| hi| num| clk| cpo|wrdata|2T
+* mhz| mhz|ranks|adjst|| delay|
+*/
+ { 0, 333,2,4, 7,3, 0},
+ {334, 400,2,4, 9,3, 0},
+ {401, 549,2,4, 11,3, 0},
+ {550, 680,2,4, 10,3, 0},
+ {681, 850,2,4, 12,3, 1},
+ },
+
+ {
+ /*
+* memory controller 1
+*lo| hi| num| clk| cpo|wrdata|2T
+* mhz| mhz|ranks|adjst|| delay|
+*/
+ { 0, 333,2, 4, 7,3, 0},
+ {334, 400,2, 4, 9,3, 0},
+ {401, 549,2, 4, 11,3, 0},
+ {550, 680,2, 4, 11,3, 0},
+ {681, 850,2, 4, 13,3,
[U-Boot] [PATCH 3/4] powerpc/mpc8xxx: disable rcw_en bit for non-DDR3
From: York Sun york...@freescale.com rcw_en bit is only available for DDR3 controllers. It is a reserved bit on DDR1 and DDR2 controllers. Signed-off-by: York Sun york...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c index 8ef6ca8..cefabe7 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c @@ -682,7 +682,9 @@ static void set_ddr_sdram_cfg_2(fsl_ddr_cfg_regs_t *ddr, | ((obc_cfg 0x1) 6) | ((ap_en 0x1) 5) | ((d_init 0x1) 4) +#ifdef CONFIG_FSL_DDR3 | ((rcw_en 0x1) 2) +#endif | ((md_en 0x1) 0) ); debug(FSLDDR: ddr_sdram_cfg_2 = 0x%08x\n, ddr-ddr_sdram_cfg_2); -- 1.7.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4] powerpc/mpc8xxx: fix recognition of DIMMs with ECC and Address Parity
From: York Sun york...@freescale.com
To recognize DIMMs with ECC capability by testing ECC bit only. Not to be
confused by Address Parity bit.
Signed-off-by: York Sun york...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
.../cpu/mpc8xxx/ddr/lc_common_dimm_params.c|3 ++-
arch/powerpc/include/asm/fsl_ddr_dimm_params.h |4
2 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
index a58e5a9..8b31ec0 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
@@ -367,7 +367,8 @@ compute_lowest_common_dimm_parameters(const dimm_params_t
*dimm_params,
/* Determine if all DIMMs ECC capable. */
temp1 = 1;
for (i = 0; i number_of_dimms; i++) {
- if (dimm_params[i].n_ranks dimm_params[i].edc_config != 2) {
+ if (dimm_params[i].n_ranks
+ !(dimm_params[i].edc_config EDC_ECC)) {
temp1 = 0;
break;
}
diff --git a/arch/powerpc/include/asm/fsl_ddr_dimm_params.h
b/arch/powerpc/include/asm/fsl_ddr_dimm_params.h
index be82602..982b809 100644
--- a/arch/powerpc/include/asm/fsl_ddr_dimm_params.h
+++ b/arch/powerpc/include/asm/fsl_ddr_dimm_params.h
@@ -9,6 +9,10 @@
#ifndef DDR2_DIMM_PARAMS_H
#define DDR2_DIMM_PARAMS_H
+#define EDC_DATA_PARITY1
+#define EDC_ECC2
+#define EDC_AC_PARITY 4
+
/* Parameters for a DDR2 dimm computed from the SPD */
typedef struct dimm_params_s {
--
1.7.2.3
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[U-Boot] [PATCH 4/4] powerpc/mpc8xxx: fix workaround for errata DDR111 and DDR134
From: York Sun york...@freescale.com
The fix for errata workaround is to avoid covering physical address
0xff00 to 0x during the implementation.
Signed-off-by: York Sun york...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc85xx/ddr-gen3.c | 41 +++
1 files changed, 41 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
index 73b320b..c8c84a1 100644
--- a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
+++ b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
@@ -24,6 +24,8 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
#ifdef CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134
volatile ccsr_local_ecm_t *ecm = (void *)CONFIG_SYS_MPC85xx_ECM_ADDR;
u32 total_gb_size_per_controller;
+ unsigned int csn_bnds_backup = 0, cs_sa, cs_ea, *csn_bnds_t;
+ int csn = -1;
#endif
switch (ctrl_num) {
@@ -40,6 +42,22 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
out_be32(ddr-eor, regs-ddr_eor);
+#ifdef CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134
+ for (i = 0; i CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
+ cs_sa = (regs-cs[i].bnds 16) 0xfff;
+ cs_ea = regs-cs[i].bnds 0xfff;
+ if ((cs_sa = 0xff) (cs_ea = 0xff)) {
+ csn = i;
+ csn_bnds_backup = regs-cs[i].bnds;
+ csn_bnds_t = (unsigned int *) regs-cs[i].bnds;
+ *csn_bnds_t = regs-cs[i].bnds ^ 0x0F000F00;
+ debug(Found cs%d_bns (0x%08x) covering 0xff00,
+ change it to 0x%x\n,
+ csn, csn_bnds_backup, regs-cs[i].bnds);
+ break;
+ }
+ }
+#endif
for (i = 0; i CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
if (i == 0) {
out_be32(ddr-cs0_bnds, regs-cs[i].bnds);
@@ -308,5 +326,28 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t
*regs,
/* 10. Clear EEBACR[3] */
clrbits_be32(ecm-eebacr, 1000);
debug(Clearing EEBACR[3] to 0x%08x\n, in_be32(ecm-eebacr));
+
+ if (csn != -1) {
+ csn_bnds_t = (unsigned int *) regs-cs[csn].bnds;
+ *csn_bnds_t = csn_bnds_backup;
+ debug(Change cs%d_bnds back to 0x%08x\n,
+ csn, regs-cs[csn].bnds);
+ setbits_be32(ddr-sdram_cfg, 0x2); /* MEM_HALT */
+ switch (csn) {
+ case 0:
+ out_be32(ddr-cs0_bnds, regs-cs[csn].bnds);
+ break;
+ case 1:
+ out_be32(ddr-cs1_bnds, regs-cs[csn].bnds);
+ break;
+ case 2:
+ out_be32(ddr-cs2_bnds, regs-cs[csn].bnds);
+ break;
+ case 3:
+ out_be32(ddr-cs3_bnds, regs-cs[csn].bnds);
+ break;
+ }
+ clrbits_be32(ddr-sdram_cfg, 0x2);
+ }
#endif /* CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134 */
}
--
1.7.2.3
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Re: [U-Boot] [PATCH] echi: add ULI1575 PCI ID
On Mar 13, 2011, at 10:07 AM, Kumar Gala wrote: From: Zhao Chenhui b35...@freescale.com Add ULI1575 EHCI controller to the list of the supported devices. Signed-off-by: Zhao Chenhui b35...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- * replaces previous patch for 8572ds * adds feedback from Remy drivers/usb/host/ehci-pci.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) applied to 85xx-next - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] usb: musb: blackfin: make clkin configurable
Not everyone has a 24MHz clkin to the USB, so let board porters override.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
drivers/usb/musb/blackfin_usb.c |7 ++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/drivers/usb/musb/blackfin_usb.c b/drivers/usb/musb/blackfin_usb.c
index 38aceb2..0eb19a0 100644
--- a/drivers/usb/musb/blackfin_usb.c
+++ b/drivers/usb/musb/blackfin_usb.c
@@ -15,6 +15,10 @@
#include musb_core.h
+#ifndef CONFIG_USB_BLACKFIN_CLKIN
+#define CONFIG_USB_BLACKFIN_CLKIN 24
+#endif
+
/* MUSB platform configuration */
struct musb_config musb_cfg = {
.regs = (struct musb_regs *)USB_FADDR,
@@ -109,7 +113,8 @@ int musb_platform_init(void)
}
/* Configure PLL oscillator register */
- bfin_write_USB_PLLOSC_CTRL(0x30a8);
+ bfin_write_USB_PLLOSC_CTRL(0x3080 |
+ ((480 / CONFIG_USB_BLACKFIN_CLKIN) 1));
SSYNC();
bfin_write_USB_SRP_CLKDIV((get_sclk()/1000) / 32 - 1);
--
1.7.4.1
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[U-Boot] [PATCH 2/2] usb: musb: blackfin: check anomaly workarounds at runtime too
The anomaly workarounds we need for older silicon might break things
if used on newer versions where the anomalies don't exist. So check
the silicon rev at runtime too.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
drivers/usb/musb/blackfin_usb.c | 29 ++---
1 files changed, 26 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/musb/blackfin_usb.c b/drivers/usb/musb/blackfin_usb.c
index 0eb19a0..35268ba 100644
--- a/drivers/usb/musb/blackfin_usb.c
+++ b/drivers/usb/musb/blackfin_usb.c
@@ -97,10 +97,25 @@ static void __def_musb_init(void)
}
void board_musb_init(void) __attribute__((weak, alias(__def_musb_init)));
-int musb_platform_init(void)
+static void bfin_anomaly_init(void)
{
- /* board specific initialization */
- board_musb_init();
+ u32 revid;
+
+ if (!ANOMALY_05000346 !ANOMALY_05000347)
+ return;
+
+ revid = bfin_revid();
+
+#ifdef __ADSPBF54x__
+ if (revid 0)
+ return;
+#endif
+#ifdef __ADSPBF52x__
+ if (ANOMALY_BF526 revid 0)
+ return;
+ if (ANOMALY_BF527 revid 1)
+ return;
+#endif
if (ANOMALY_05000346) {
bfin_write_USB_APHY_CALIB(ANOMALY_05000346_value);
@@ -111,6 +126,14 @@ int musb_platform_init(void)
bfin_write_USB_APHY_CNTRL(0x0);
SSYNC();
}
+}
+
+int musb_platform_init(void)
+{
+ /* board specific initialization */
+ board_musb_init();
+
+ bfin_anomaly_init();
/* Configure PLL oscillator register */
bfin_write_USB_PLLOSC_CTRL(0x3080 |
--
1.7.4.1
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[U-Boot] Back Buddy -the perfect back support
Have an orthopaedic specialist to back you up, while at work or while driving. Testimonials INDIAN AIR FORCE STUDY Low backache among Chetak helicopter Pilots, trial of lumbar cushions at a flying unit. Based on the feedback, a flight trial of two types of lumbar cushions one locally fabricated, another commercially available called ' back buddy' was carried out. 12 Pilots were involved in the flight trials; There was an overwhelming acceptance of ' back buddy ' during the trials. The probable cause of low backache and remedial measures suggested by the pilots, and the findings of trials of lumbar cushions are discussed in this report. medind.nic.in/imvw/imvw4901.html. DOCTORS This is to certify that I have been prescribing Transval Self-care products to my patients for the last two years. The feedback has been very positive, specially for Back Buddy, Versatile Seat and Lumbar roll. - Dr.Deepak Sharan Consultant in Orthopaedics and Rehabilitation Bangalore-26-08-05 I am Prescribing, Transval Cervical Contour Pillow, Versatile Seat and Back care support products for my patients for the past three years. All my patients are feeling comfortable and satisfied using these products. - Dr. T.V. Raja Consultant Orthopaedic Surgeon Chennai -November 14, 2003 This is to certify that I have been using Transval Back Buddy and Cervical pillow from last eight years with extremely good results for -POSRTURAL SPINAL PAINS. It is not possible to keep posture straight at all times by one self, which Back Buddy can do with ease. Dr. Vishwas Virmani, Consultant physiotherapist, Ortho Neuro physiotherapy clinic Noida This is to certify that I have been using back buddy for posture related back disorders and lumbar spine instability along with postural exercises and I have found it very useful. Dr.K.V. Menon Consultant Orthopaedic and Spine Surgeon Ernakulam Medical Centre Transval health support products A range of self-care orthopaedic appliances for aching back, neck, legs and knees. http://www.dataindiareal.com/ogss/massmail/bb.bmp Dear Sir, Transval Back Buddy - A perfect support product for lower (lumbar) upper back pain at home, at workstation or while driving. Back Buddy is an Orthopaedic support and is endorsed by a list of INDIAN ORTHOPAEDIC DOCTORS, PHYSICIANS CHIROPRACTORS, THERAPISTS across the country for preventing and treating back pains, which is caused by combination of poor posture, muscular fatigue, aging and lack of physical conditioning. http://www.orthopaedicindia.com http://www.orthopaedicindia.com/ Back Buddy has undergone an extensive trial with INDIAN AIR FORCE under a project Backache among Chetak Pilots and Trial of Lumbar Cushions at a Flying unit. It has been highly recommended to be used during flying by Pilots (medind.nic.in/imvw/imvw4901.html). Back Buddy is ergonomically designed backrest for patients with back pain, having problems arising in the inter-vertebral disc, soft shock absorber between the bones of the back, in the spinal facet joints, or in the knuckle sized joints that link the bones together. It has built-in spring steel wire frame with moulded foam construction to provide flexible orthopaedic support. Benefits of Back Buddy: It is a very useful appliance for all Offices, Homes, Hospitals and Cars. The various advantages Back Buddy offers by regular usage are as below: 1. Prevents/controls back pain. 3. Provides relief and comfort 2. Reduces fatigue. 4. Provides free arm movement. Back Buddy helps to achieve straight back while functioning and thus promotes good posture as well reduces fatigue and pain. We also provide one-year warranty. Back Buddy is adaptable to any seat. It is portable, lightweight, comes with a lumbar pillow, which is adjustable at any position. If you need any further clarifications/ literature, please do contact us. Thanking you, TRANSVAL MFG. MKTG PRIVATE LTD. CHENNAI-600016, INDIA. transval_or...@lycos.com;transvalor...@yahoo.co.in PH. 09381031484 In case you want to unsubscribe from our mailing list, Please click unsubscribe mailto:transvalor...@yahoo.co.in?subject=UNSUBSCRIBE-MAIL ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] CFI flash broken for 8-bit bus
Hi, I am running into issues in that the CFI code is broken for flash with an 8- bit bus. The problem is that the CFI code uses the wrong addresses for 8-bits vs 16-bits. The CFI function flash_map incorrectly calculates the byte offset with Spansion flash. In our case, we have an 8-bit Spansion S29GL-N MirrorBit flash chip on an 8- bit bus. According to the data sheet, in 8-bit mode the first unlock address is 0xAAA and the second is 0x555. Basically all of the addresses are approximately double what they are in 16-bit mode. Most of the addresses in the CFI code are wrong for 8-bit mode. They should be as follows: unlock1: 0xAAA unlock2: 0x555 CFI Query: 0xAA Offset Device ID: 0x02, 0x1c, 0x1e Offset Silicon Sector Factory Protect: 0x6 Sector protect verify (sector address) + 4 The problem is that the dectection code detects (incorrectly) that we're an 8- bit device on a 16-bit bus when in fact it's an 8-bit bus. For 16-bits, it's: unlock1: 0x555 unlock2: 0x2aa CFI Query: 0x55 Offset Device ID: 0x1, 0x0e, 0x0f Now, in 16-bit mode these addresses should be effectively doubled so they should look to be the same to software as I understand it. This is all taken from the datasheet. Note that the CFI code works fine with the flash hooked up as 16-bit on a 16- bit bus. If it's an 8-bit flash on a 16-bit bus then the addresses should be doubled. flash detect cfi fwc addr 1ec0 cmd f0 f0 8bit x 8 bit fwc addr 1ec0 cmd ff ff 8bit x 8 bit fwc addr 1ec00055 cmd 98 98 8bit x 8 bit == should be 0x1ec000AA is= cmd 51(Q) addr 1ec00010 is= 0 51 fwc addr 1ec0 cmd f0 f0 8bit x 8 bit fwc addr 1ec0 cmd ff ff 8bit x 8 bit fwc addr 1ec00555 cmd 98 98 8bit x 8 bit is= cmd 51(Q) addr 1ec00010 is= 0 51 fwc addr 1ec0 cmd f0 f0f0 16bit x 8 bit fwc addr 1ec0 cmd ff 16bit x 8 bit fwc addr 1ec000aa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr 1ec00020 is= 5151 5151 is= cmd 52(R) addr 1ec00022 is= 5252 5252 is= cmd 59(Y) addr 1ec00024 is= 5959 5959 device interface is 2 found port 2 chip 1 port 16 bits chip 8 bits 00 : 51 52 59 02 00 40 00 00 00 00 00 27 36 00 00 06 QRY..@.'6... 10 : 06 09 13 03 05 03 02 18 02 00 06 00 01 7f 00 00 20 : 02 00 00 00 00 00 00 00 00 00 00 00 00 08 13 e8 fwc addr 1ec0 cmd f0 f0f0 16bit x 8 bit fwc addr 1ec01554 cmd aa 16bit x 8 bit fwc addr 1ec00aaa cmd 55 16bit x 8 bit fwc addr 1ec01554 cmd 90 9090 16bit x 8 bit fwc addr 1ec0 cmd f0 f0f0 16bit x 8 bit fwc addr 1ec000aa cmd 98 9898 16bit x 8 bit manufacturer is 2 manufacturer id is 0x0 device id is 0x3f device id2 is 0x0 cfi version is 0x3133 size_ratio 1 port 16 bits chip 8 bits found 1 erase regions erase region 0: 0x027f erase_region_count = 128 erase_region_size = 131072
[U-Boot] Q: nand usage
Hello, When using the nand, with regards to its implementation in U-boot or linux, does a good strategy would be to map Nand to areas with *space* between the end of one area to the start on another ? It seems a good ideas becuase of the bad block issue and the skipping of bad blocks. I did not find information about the Nand usage. Best Regards, Ran ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/8] orion5x: Fix wrong address in orion5x_sdram_bar
On 2011/01/29 9:24 AM, Albert ARIBAUD wrote: Hi Michael, Le 29/01/2011 02:00, Michael Spang a écrit : This code intends to read the SDRAM controller base address registers but is instead reading the CPU window base address registers. Side note: IIUC this change is not required since the CPU Window registers match the SDRAM controller registers on orion5x in U-boot; but it is fine if only for the sake of correctness, and assuming it works for other orion5x boards (testing underway for edminiv2). I have this same change in my patch set for the DNS323, for what it is worth. I must have needed it, but I can't remember exactly what the behaviour was without it. :-) Rogan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] power: ftpmu010: move drivers/power/ftpmu010.h to include/faraday
Hi Po-Yu, 2011/2/18 Po-Yu Chuang ratbert.chu...@gmail.com move include/ftpmu010.h to include/faraday/ftpmu010.h drivers/power/ftpmu010.c | 2 +- drivers/power/ftpmu010.h | 146 -- include/faraday/ftpmu010.h | 150 3 files changed, 151 insertions(+), 147 deletions(-) delete mode 100644 drivers/power/ftpmu010.h create mode 100644 include/faraday/ftpmu010.h Sorry I didn't notice that there are API declaration before in ftpmu010.h. +void ftpmu010_32768osc_enable(void); +void ftpmu010_dlldis_disable(void); +void ftpmu010_sdram_clk_disable(unsigned int cr0); Po-Yu, does these three function declaration is a necessity in a320evb? I'm using gcc 4.4 without these 3 function declaration seems okay. Because I'm going to refine another enhancement patch for using ftpmu010 in lowlevel_init.S. Hence I need to use #ifndef __ASSEMBLY__ to protect these three APIs. However, to compile adp-ag101 board (NDS32) doesn't require these 3 functions to be declared here. I need your opinion to clarify this. Thanks a lot. -- Best regards, Macpaul Lin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 1/5] pxa: move i2c driver to the common place
Hi Heiko,
On Tue, Mar 15, 2011 at 2:48 PM, Heiko Schocher h...@denx.de wrote:
Hello Lei,
Lei Wen wrote:
For better sharing with other platform other than pxa's,
it is more convenient to put the driver to the common place.
Signed-off-by: Lei Wen lei...@marvell.com
---
Changelog:
v2: rename previous pxa_i2c to mvi2c.
Maybe a Coding Style cleanup would be good for this file ...
(I know, you don;t wrote this file...)
arch/arm/cpu/pxa/Makefile | 1 -
arch/arm/cpu/pxa/i2c.c | 469
-
drivers/i2c/Makefile | 1 +
drivers/i2c/mvi2c.c | 469
+
Why you don;t use git format-patch -M ?
If so, I wouldn;t stumbled over the Coding Style ;-)
include/configs/innokom.h | 1 +
include/configs/xm250.h | 1 +
6 files changed, 472 insertions(+), 470 deletions(-)
delete mode 100644 arch/arm/cpu/pxa/i2c.c
create mode 100644 drivers/i2c/mvi2c.c
[...]
diff --git a/drivers/i2c/mvi2c.c b/drivers/i2c/mvi2c.c
new file mode 100644
index 000..7aa49ae
--- /dev/null
+++ b/drivers/i2c/mvi2c.c
@@ -0,0 +1,469 @@
+/*
+ * (C) Copyright 2000
+ * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arse...@tin.it
+ *
+ * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH www.elinos.com
+ * Marius Groeger mgroe...@sysgo.de
+ *
+ * (C) Copyright 2003 Pengutronix e.K.
+ * Robert Schwebel r.schwe...@pengutronix.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Back ported to the 8xx platform (from the 8260 platform) by
+ * murray.jen...@cmst.csiro.au, 27-Jan-01.
+ */
+
+/* FIXME: this file is PXA255 specific! What about other XScales? */
As you rename this file to mv, please change this comment.
+
+#include common.h
+#include asm/io.h
+
+#ifdef CONFIG_HARD_I2C
+
+/*
+ * - CONFIG_SYS_I2C_SPEED
+ * - I2C_PXA_SLAVE_ADDR
+ */
+
+#include asm/arch/hardware.h
+#include asm/arch/pxa-regs.h
+#include i2c.h
+
+/*#define DEBUG_I2C 1 /###* activate local debugging output
*/
Please remove dead code.
+#define I2C_PXA_SLAVE_ADDR 0x1 /* slave pxa unit address */
+
+#if (CONFIG_SYS_I2C_SPEED == 40)
+#define I2C_ICR_INIT (ICR_FM | ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD |
ICR_SCLE)
Line too long.
+#else
+#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
+#endif
+
+#define I2C_ISR_INIT 0x7FF
+
+#ifdef DEBUG_I2C
+#define PRINTD(x) printf x
+#else
+#define PRINTD(x)
+#endif
+
+
+/* Shall the current transfer have a start/stop condition? */
+#define I2C_COND_NORMAL 0
+#define I2C_COND_START 1
+#define I2C_COND_STOP 2
+
+/* Shall the current transfer be ack/nacked or being waited for it? */
+#define I2C_ACKNAK_WAITACK 1
+#define I2C_ACKNAK_SENDACK 2
+#define I2C_ACKNAK_SENDNAK 4
+
+/* Specify who shall transfer the data (master or slave) */
+#define I2C_READ 0
+#define I2C_WRITE 1
+
+/* All transfers are described by this data structure */
+struct i2c_msg {
+ u8 condition;
+ u8 acknack;
+ u8 direction;
+ u8 data;
+};
+
+
Only one empty line.
+/**
+ * i2c_pxa_reset: - reset the host controller
+ *
+ */
Wrong comment style, no empty line after the comment necessary.
Fix globally please.
+
+static void i2c_reset( void )
No spaces after ( and before )
Fix globally please.
+{
+ writel(readl(ICR) ~ICR_IUE, ICR); /* disable unit */
+ writel(readl(ICR) | ICR_UR, ICR); /* reset the unit */
+ udelay(100);
+ writel(readl(ICR) ~ICR_IUE, ICR); /* disable unit */
+#ifdef CONFIG_CPU_MONAHANS
+ /* | CKENB_1_PWM1 | CKENB_0_PWM0); */
+ writel(readl(CKENB) | (CKENB_4_I2C), CKENB);
+#else /* CONFIG_CPU_MONAHANS */
+ /* set the global I2C clock on */
+ writel(readl(CKEN) | CKEN14_I2C, CKEN);
+#endif
+ writel(I2C_PXA_SLAVE_ADDR, ISAR); /* set our slave address */
+ writel(I2C_ICR_INIT, ICR); /* set control reg values */
+ writel(I2C_ISR_INIT, ISR); /* set clear interrupt bits */
+
Re: [U-Boot] [PATCH 0/5] add i2c support to pantheon and aramada100
Hi Wolfgang, On Tue, Mar 15, 2011 at 4:12 PM, Wolfgang Denk w...@denx.de wrote: Dear Lei Wen, In message 1300160443-12552-1-git-send-email-lei...@marvell.com you wrote: V2: rename the previous pxa_i2c to mvi2c, since this driver would be shared by many other Marvell platforms. Lei Wen (5): pxa: move i2c driver to the common place mvi2c: use structure to replace the direclty define I2C: add i2c support for Pantheon platform I2C: mvi2c: add multi bus support I2C: add i2c support for Armada100 platform Checkpatch says: [U-Boot] [PATCH V2 1/5] pxa: move i2c driver to the common place total: 57 errors, 7 warnings, 497 lines checked [U-Boot] [PATCH v2 2/5] mvi2c: use structure to replace the total: 2 errors, 1 warnings, 333 lines checked [U-Boot] [PATCH v2 3/5] I2C: add i2c support for Pantheon platform total: 2 errors, 1 warnings, 64 lines checked [U-Boot] [PATCH v2 4/5] I2C: mvi2c: add multi bus support total: 2 errors, 0 warnings, 51 lines checked [U-Boot] [PATCH v2 5/5] I2C: add i2c support for Armada100 platform total: 2 errors, 1 warnings, 65 lines checked Please cleanup! and next time please run checkpatch _before_ submitting! Thanks for reminding this. V3 patch to come. :) Best regards, Lei ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/5] mvi2c: use structure to replace the direclty define
Hi Heiko,
On Tue, Mar 15, 2011 at 2:54 PM, Heiko Schocher h...@denx.de wrote:
Hello Lei,
Lei Wen wrote:
Signed-off-by: Lei Wen lei...@marvell.com
---
arch/arm/cpu/pxa/cpu.c | 11 +++
arch/arm/include/asm/arch-pxa/pxa-regs.h | 56
board/innokom/innokom.c | 9 +--
drivers/i2c/mvi2c.c | 139
+-
include/configs/innokom.h | 1 +
include/configs/xm250.h | 1 +
6 files changed, 111 insertions(+), 106 deletions(-)
diff --git a/arch/arm/cpu/pxa/cpu.c b/arch/arm/cpu/pxa/cpu.c
index 7d49cbb..24b59e7 100644
--- a/arch/arm/cpu/pxa/cpu.c
+++ b/arch/arm/cpu/pxa/cpu.c
@@ -318,3 +318,14 @@ int arch_cpu_init(void)
pxa_clock_setup();
return 0;
}
+
+void i2c_clk_enable(void)
+{
+#ifdef CONFIG_CPU_MONAHANS
+ /* | CKENB_1_PWM1 | CKENB_0_PWM0); */
+ writel(readl(CKENB) | (CKENB_4_I2C), CKENB);
+#else /* CONFIG_CPU_MONAHANS */
+ /* set the global I2C clock on */
+ writel(readl(CKEN) | CKEN14_I2C, CKEN);
+#endif
+}
diff --git a/arch/arm/include/asm/arch-pxa/pxa-regs.h
b/arch/arm/include/asm/arch-pxa/pxa-regs.h
index 65a387f..109fdc0 100644
--- a/arch/arm/include/asm/arch-pxa/pxa-regs.h
+++ b/arch/arm/include/asm/arch-pxa/pxa-regs.h
@@ -456,62 +456,6 @@ typedef void (*ExcpHndlr) (void) ;
IrSR_XMITIR_IR_MODE)
/*
- * I2C registers
- */
-#define IBMR 0x40301680 /* I2C Bus Monitor Register - IBMR */
-#define IDBR 0x40301688 /* I2C Data Buffer Register - IDBR */
-#define ICR 0x40301690 /* I2C Control Register - ICR */
-#define ISR 0x40301698 /* I2C Status Register - ISR */
-#define ISAR 0x403016A0 /* I2C Slave Address Register - ISAR */
-
-#ifdef CONFIG_CPU_MONAHANS
-#define PWRIBMR 0x40f500C0 /* Power I2C Bus Monitor
Register-IBMR */
-#define PWRIDBR 0x40f500C4 /* Power I2C Data Buffer
Register-IDBR */
-#define PWRICR 0x40f500C8 /* Power I2C Control Register -
ICR */
-#define PWRISR 0x40f500CC /* Power I2C Status Register - ISR
*/
-#define PWRISAR 0x40f500D0 /* Power I2C Slave Address
Register-ISAR */
-#else
-#define PWRIBMR 0x40f00180 /* Power I2C Bus Monitor
Register-IBMR */
-#define PWRIDBR 0x40f00188 /* Power I2C Data Buffer
Register-IDBR */
-#define PWRICR 0x40f00190 /* Power I2C Control Register -
ICR */
-#define PWRISR 0x40f00198 /* Power I2C Status Register - ISR
*/
-#define PWRISAR 0x40f001A0 /* Power I2C Slave Address
Register-ISAR */
-#endif
-
-/* - Control register bits */
-
-#define ICR_START 0x1 /* start bit */
-#define ICR_STOP 0x2 /* stop bit */
-#define ICR_ACKNAK 0x4 /* send ACK(0) or NAK(1) */
-#define ICR_TB 0x8 /* transfer byte bit */
-#define ICR_MA 0x10 /* master abort */
-#define ICR_SCLE 0x20 /* master clock enable, mona SCLEA */
-#define ICR_IUE 0x40 /* unit enable */
-#define ICR_GCD 0x80 /* general call disable */
-#define ICR_ITEIE 0x100 /* enable tx interrupts */
-#define ICR_IRFIE 0x200 /* enable rx interrupts, mona: DRFIE */
-#define ICR_BEIE 0x400 /* enable bus error ints */
-#define ICR_SSDIE 0x800 /* slave STOP detected int enable */
-#define ICR_ALDIE 0x1000 /* enable arbitration interrupt */
-#define ICR_SADIE 0x2000 /* slave address detected int enable */
-#define ICR_UR 0x4000 /* unit reset */
-#define ICR_FM 0x8000 /* Fast Mode */
-
-/* - Status register bits - */
-
-#define ISR_RWM 0x1 /* read/write mode */
-#define ISR_ACKNAK 0x2 /* ack/nak status */
-#define ISR_UB 0x4 /* unit busy */
-#define ISR_IBB 0x8 /* bus busy */
-#define ISR_SSD 0x10 /* slave stop detected */
-#define ISR_ALD 0x20 /* arbitration loss detected */
-#define ISR_ITE 0x40 /* tx buffer empty */
-#define ISR_IRF 0x80 /* rx buffer full */
-#define ISR_GCAD 0x100 /* general call address detected */
-#define ISR_SAD 0x200 /* slave address detected */
-#define ISR_BED 0x400 /* bus error no ACK/NAK */
-
-/*
* Serial Audio Controller
*/
/* FIXME the audio defines collide w/ the SA defines. I don't like
these
diff --git a/board/innokom/innokom.c b/board/innokom/innokom.c
index e658c35..22de7e3 100644
---
Re: [U-Boot] [PATCH v2 5/5] I2C: add i2c support for Armada100 platform
Hi Heiko, On Tue, Mar 15, 2011 at 3:08 PM, Heiko Schocher heiko.schoc...@invitel.hu wrote: Hello Lei, Lei Wen wrote: Signed-off-by: Lei Wen lei...@marvell.com --- arch/arm/cpu/arm926ejs/armada100/cpu.c| 14 ++ arch/arm/include/asm/arch-armada100/mfp.h |4 board/Marvell/aspenite/aspenite.c |5 + include/configs/aspenite.h| 12 4 files changed, 35 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/armada100/cpu.c b/arch/arm/cpu/arm926ejs/armada100/cpu.c index 62aa175..8039ad2 100644 --- a/arch/arm/cpu/arm926ejs/armada100/cpu.c +++ b/arch/arm/cpu/arm926ejs/armada100/cpu.c @@ -62,6 +62,14 @@ int arch_cpu_init(void) /* Enable GPIO clock */ writel(APBC_APBCLK, apb1clkres-gpio); + /* Enable general I2C clock */ + writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, apb1clkres-twsi0); + writel(APBC_FNCLK | APBC_APBCLK, apb1clkres-twsi0); + + /* Enable power I2C clock */ + writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, apb1clkres-twsi1); + writel(APBC_FNCLK | APBC_APBCLK, apb1clkres-twsi1); + If boards based on this cpu type don;t use i2c, i2c clock and power would be enabled ... wouldn;t it be better, if we enable this only if CONFIG_I2C_MV is defined? Good point, I would modify to follow this. Hmm.. are the comments OK? In the first block you only use twsi0 register, in the second block only twsi1 ...? The comments is following what the spec says... In spec, the twsi0 named as general, and twsi1 named as power one. Thanks for reviewing! Best regards, Lei ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V3 0/5] add i2c support to pantheon and aramada100
V2: rename the previous pxa_i2c to mvi2c, since this driver would be shared by many other Marvell platforms. V3: Clean the code sytle issue Lei Wen (5): pxa: move i2c driver to the common place mv_i2c: use structure to replace the direclty define I2C: add i2c support for Pantheon platform I2C: mv_i2c: add multi bus support I2C: add i2c support for Armada100 platform arch/arm/cpu/arm926ejs/armada100/cpu.c| 16 + arch/arm/cpu/arm926ejs/pantheon/cpu.c | 12 + arch/arm/cpu/pxa/Makefile |1 - arch/arm/cpu/pxa/cpu.c| 11 + arch/arm/cpu/pxa/i2c.c| 469 arch/arm/include/asm/arch-armada100/mfp.h | 40 ++- arch/arm/include/asm/arch-pantheon/cpu.h |4 +- arch/arm/include/asm/arch-pantheon/mfp.h |6 +- arch/arm/include/asm/arch-pxa/pxa-regs.h | 56 board/Marvell/aspenite/aspenite.c |5 + board/Marvell/dkb/dkb.c |4 + board/innokom/innokom.c |9 +- drivers/i2c/Makefile |1 + drivers/i2c/mv_i2c.c | 481 + drivers/i2c/mv_i2c.h | 83 + include/configs/aspenite.h| 12 + include/configs/dkb.h | 11 + include/configs/innokom.h |2 + include/configs/xm250.h |2 + 19 files changed, 670 insertions(+), 555 deletions(-) delete mode 100644 arch/arm/cpu/pxa/i2c.c create mode 100644 drivers/i2c/mv_i2c.c create mode 100644 drivers/i2c/mv_i2c.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V3 2/5] mv_i2c: use structure to replace the direclty define
Signed-off-by: Lei Wen lei...@marvell.com
---
Changelog:
V3:
clean code sytle issue
arch/arm/cpu/pxa/cpu.c | 11 +++
arch/arm/include/asm/arch-pxa/pxa-regs.h | 56 -
board/innokom/innokom.c |9 +--
drivers/i2c/mv_i2c.c | 133 ++---
drivers/i2c/mv_i2c.h | 83 +++
include/configs/innokom.h|1 +
include/configs/xm250.h |1 +
7 files changed, 161 insertions(+), 133 deletions(-)
create mode 100644 drivers/i2c/mv_i2c.h
diff --git a/arch/arm/cpu/pxa/cpu.c b/arch/arm/cpu/pxa/cpu.c
index 7d49cbb..24b59e7 100644
--- a/arch/arm/cpu/pxa/cpu.c
+++ b/arch/arm/cpu/pxa/cpu.c
@@ -318,3 +318,14 @@ int arch_cpu_init(void)
pxa_clock_setup();
return 0;
}
+
+void i2c_clk_enable(void)
+{
+#ifdef CONFIG_CPU_MONAHANS
+ /* | CKENB_1_PWM1 | CKENB_0_PWM0); */
+ writel(readl(CKENB) | (CKENB_4_I2C), CKENB);
+#else /* CONFIG_CPU_MONAHANS */
+ /* set the global I2C clock on */
+ writel(readl(CKEN) | CKEN14_I2C, CKEN);
+#endif
+}
diff --git a/arch/arm/include/asm/arch-pxa/pxa-regs.h
b/arch/arm/include/asm/arch-pxa/pxa-regs.h
index 65a387f..109fdc0 100644
--- a/arch/arm/include/asm/arch-pxa/pxa-regs.h
+++ b/arch/arm/include/asm/arch-pxa/pxa-regs.h
@@ -456,62 +456,6 @@ typedef void (*ExcpHndlr) (void) ;
IrSR_XMITIR_IR_MODE)
/*
- * I2C registers
- */
-#define IBMR 0x40301680 /* I2C Bus Monitor Register - IBMR */
-#define IDBR 0x40301688 /* I2C Data Buffer Register - IDBR */
-#define ICR0x40301690 /* I2C Control Register - ICR */
-#define ISR0x40301698 /* I2C Status Register - ISR */
-#define ISAR 0x403016A0 /* I2C Slave Address Register - ISAR */
-
-#ifdef CONFIG_CPU_MONAHANS
-#define PWRIBMR0x40f500C0 /* Power I2C Bus Monitor
Register-IBMR */
-#define PWRIDBR0x40f500C4 /* Power I2C Data Buffer
Register-IDBR */
-#define PWRICR 0x40f500C8 /* Power I2C Control Register - ICR */
-#define PWRISR 0x40f500CC /* Power I2C Status Register - ISR */
-#define PWRISAR0x40f500D0 /* Power I2C Slave Address
Register-ISAR */
-#else
-#define PWRIBMR0x40f00180 /* Power I2C Bus Monitor
Register-IBMR */
-#define PWRIDBR0x40f00188 /* Power I2C Data Buffer
Register-IDBR */
-#define PWRICR 0x40f00190 /* Power I2C Control Register - ICR */
-#define PWRISR 0x40f00198 /* Power I2C Status Register - ISR */
-#define PWRISAR0x40f001A0 /* Power I2C Slave Address
Register-ISAR */
-#endif
-
-/* - Control register bits */
-
-#define ICR_START 0x1 /* start bit */
-#define ICR_STOP 0x2 /* stop bit */
-#define ICR_ACKNAK 0x4 /* send ACK(0) or NAK(1) */
-#define ICR_TB 0x8 /* transfer byte bit */
-#define ICR_MA 0x10/* master abort */
-#define ICR_SCLE 0x20/* master clock enable, mona SCLEA */
-#define ICR_IUE0x40/* unit enable */
-#define ICR_GCD0x80/* general call disable */
-#define ICR_ITEIE 0x100 /* enable tx interrupts */
-#define ICR_IRFIE 0x200 /* enable rx interrupts, mona: DRFIE */
-#define ICR_BEIE 0x400 /* enable bus error ints */
-#define ICR_SSDIE 0x800 /* slave STOP detected int enable */
-#define ICR_ALDIE 0x1000 /* enable arbitration interrupt */
-#define ICR_SADIE 0x2000 /* slave address detected int enable */
-#define ICR_UR 0x4000 /* unit reset */
-#define ICR_FM 0x8000 /* Fast Mode */
-
-/* - Status register bits - */
-
-#define ISR_RWM0x1 /* read/write mode */
-#define ISR_ACKNAK 0x2 /* ack/nak status */
-#define ISR_UB 0x4 /* unit busy */
-#define ISR_IBB0x8 /* bus busy */
-#define ISR_SSD0x10/* slave stop detected */
-#define ISR_ALD0x20/* arbitration loss detected */
-#define ISR_ITE0x40/* tx buffer empty */
-#define ISR_IRF0x80/* rx buffer full */
-#define ISR_GCAD 0x100 /* general call address detected */
-#define ISR_SAD0x200 /* slave address detected */
-#define ISR_BED0x400 /* bus error no ACK/NAK */
-
-/*
* Serial Audio Controller
*/
/* FIXME the audio defines collide w/ the SA defines. I don't like these
diff --git a/board/innokom/innokom.c b/board/innokom/innokom.c
index e658c35..22de7e3 100644
--- a/board/innokom/innokom.c
+++
[U-Boot] [PATCH V3 4/5] I2C: mv_i2c: add multi bus support
Signed-off-by: Lei Wen lei...@marvell.com
---
Changelog:
V3:
clean code style issue
drivers/i2c/mv_i2c.c | 36 +++-
1 files changed, 35 insertions(+), 1 deletions(-)
diff --git a/drivers/i2c/mv_i2c.c b/drivers/i2c/mv_i2c.c
index 152ea43..b849913 100644
--- a/drivers/i2c/mv_i2c.c
+++ b/drivers/i2c/mv_i2c.c
@@ -68,7 +68,35 @@ struct pxa_i2c {
u32 isar;
};
-static struct pxa_i2c *base = (struct pxa_i2c *)CONFIG_PXA_I2C_REG;
+static struct pxa_i2c *base;
+#ifdef CONFIG_I2C_MULTI_BUS
+static u32 i2c_regs[CONFIG_PXA_I2C_NUM] = CONFIG_PXA_I2C_REG;
+static unsigned int bus_initialized[CONFIG_PXA_I2C_NUM];
+static unsigned int current_bus;
+
+int i2c_set_bus_num(unsigned int bus)
+{
+ if ((bus 0) || (bus = CONFIG_PXA_I2C_NUM)) {
+ printf(Bad bus: %d\n, bus);
+ return -1;
+ }
+
+ base = (struct pxa_i2c *)i2c_regs[bus];
+ current_bus = bus;
+
+ if (!bus_initialized[current_bus]) {
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ bus_initialized[current_bus] = 1;
+ }
+
+ return 0;
+}
+
+unsigned int i2c_get_bus_num(void)
+{
+ return current_bus;
+}
+#endif
/*
* i2c_pxa_reset: - reset the host controller
@@ -237,6 +265,12 @@ i2c_transfer_finish:
/* */
void i2c_init(int speed, int slaveaddr)
{
+#ifdef CONFIG_I2C_MULTI_BUS
+ base = (struct pxa_i2c *)i2c_regs[current_bus];
+#else
+ base = (struct pxa_i2c *)CONFIG_PXA_I2C_REG;
+#endif
+
#ifdef CONFIG_SYS_I2C_INIT_BOARD
u32 icr;
/* call board specific i2c bus reset routine before accessing the */
--
1.7.0.4
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V3 1/5] pxa: move i2c driver to the common place
For better sharing with other platform other than pxa's,
it is more convenient to put the driver to the common place.
Signed-off-by: Lei Wen lei...@marvell.com
---
Changelog:
v2: rename previous pxa_i2c to mvi2c.
V3: change previous name from pxa_i2c to mv_i2c
clean code style issue exist in original code
arch/arm/cpu/pxa/Makefile |1 -
arch/arm/cpu/pxa/i2c.c| 469 -
drivers/i2c/Makefile |1 +
drivers/i2c/mv_i2c.c | 452 +++
include/configs/innokom.h |1 +
include/configs/xm250.h |1 +
6 files changed, 455 insertions(+), 470 deletions(-)
delete mode 100644 arch/arm/cpu/pxa/i2c.c
create mode 100644 drivers/i2c/mv_i2c.c
diff --git a/arch/arm/cpu/pxa/Makefile b/arch/arm/cpu/pxa/Makefile
index 49a6ed3..e8b59a3 100644
--- a/arch/arm/cpu/pxa/Makefile
+++ b/arch/arm/cpu/pxa/Makefile
@@ -28,7 +28,6 @@ LIB = $(obj)lib$(CPU).o
START = start.o
COBJS += cpu.o
-COBJS += i2c.o
COBJS += pxafb.o
COBJS += timer.o
COBJS += usb.o
diff --git a/arch/arm/cpu/pxa/i2c.c b/arch/arm/cpu/pxa/i2c.c
deleted file mode 100644
index 7aa49ae..000
--- a/arch/arm/cpu/pxa/i2c.c
+++ /dev/null
@@ -1,469 +0,0 @@
-/*
- * (C) Copyright 2000
- * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arse...@tin.it
- *
- * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH www.elinos.com
- * Marius Groeger mgroe...@sysgo.de
- *
- * (C) Copyright 2003 Pengutronix e.K.
- * Robert Schwebel r.schwe...@pengutronix.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Back ported to the 8xx platform (from the 8260 platform) by
- * murray.jen...@cmst.csiro.au, 27-Jan-01.
- */
-
-/* FIXME: this file is PXA255 specific! What about other XScales? */
-
-#include common.h
-#include asm/io.h
-
-#ifdef CONFIG_HARD_I2C
-
-/*
- * - CONFIG_SYS_I2C_SPEED
- * - I2C_PXA_SLAVE_ADDR
- */
-
-#include asm/arch/hardware.h
-#include asm/arch/pxa-regs.h
-#include i2c.h
-
-/*#define DEBUG_I2C 1 /###* activate local debugging output
*/
-#define I2C_PXA_SLAVE_ADDR 0x1 /* slave pxa unit address */
-
-#if (CONFIG_SYS_I2C_SPEED == 40)
-#define I2C_ICR_INIT (ICR_FM | ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD |
ICR_SCLE)
-#else
-#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
-#endif
-
-#define I2C_ISR_INIT 0x7FF
-
-#ifdef DEBUG_I2C
-#define PRINTD(x) printf x
-#else
-#define PRINTD(x)
-#endif
-
-
-/* Shall the current transfer have a start/stop condition? */
-#define I2C_COND_NORMAL0
-#define I2C_COND_START 1
-#define I2C_COND_STOP 2
-
-/* Shall the current transfer be ack/nacked or being waited for it? */
-#define I2C_ACKNAK_WAITACK 1
-#define I2C_ACKNAK_SENDACK 2
-#define I2C_ACKNAK_SENDNAK 4
-
-/* Specify who shall transfer the data (master or slave) */
-#define I2C_READ 0
-#define I2C_WRITE 1
-
-/* All transfers are described by this data structure */
-struct i2c_msg {
- u8 condition;
- u8 acknack;
- u8 direction;
- u8 data;
-};
-
-
-/**
- * i2c_pxa_reset: - reset the host controller
- *
- */
-
-static void i2c_reset( void )
-{
- writel(readl(ICR) ~ICR_IUE, ICR); /* disable unit */
- writel(readl(ICR) | ICR_UR, ICR); /* reset the unit */
- udelay(100);
- writel(readl(ICR) ~ICR_IUE, ICR); /* disable unit */
-#ifdef CONFIG_CPU_MONAHANS
- /* | CKENB_1_PWM1 | CKENB_0_PWM0); */
- writel(readl(CKENB) | (CKENB_4_I2C), CKENB);
-#else /* CONFIG_CPU_MONAHANS */
- /* set the global I2C clock on */
- writel(readl(CKEN) | CKEN14_I2C, CKEN);
-#endif
- writel(I2C_PXA_SLAVE_ADDR, ISAR); /* set our slave address */
- writel(I2C_ICR_INIT, ICR); /* set control reg values */
- writel(I2C_ISR_INIT, ISR); /* set clear interrupt bits */
- writel(readl(ICR) | ICR_IUE, ICR); /* enable unit */
- udelay(100);
-}
-
-
-/**
- * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
- * are set and cleared
- *
- * @return: 1 in case of success, 0 means
[U-Boot] [PATCH V3 5/5] I2C: add i2c support for Armada100 platform
Signed-off-by: Lei Wen lei...@marvell.com
---
Changelog:
V3:
clean code sytle issue
Add i2c clock enable code include in I2C configure define block
arch/arm/cpu/arm926ejs/armada100/cpu.c| 16 +++
arch/arm/include/asm/arch-armada100/mfp.h | 40 -
board/Marvell/aspenite/aspenite.c |5 +++
include/configs/aspenite.h| 12
4 files changed, 55 insertions(+), 18 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/armada100/cpu.c
b/arch/arm/cpu/arm926ejs/armada100/cpu.c
index 62aa175..c21938e 100644
--- a/arch/arm/cpu/arm926ejs/armada100/cpu.c
+++ b/arch/arm/cpu/arm926ejs/armada100/cpu.c
@@ -62,6 +62,16 @@ int arch_cpu_init(void)
/* Enable GPIO clock */
writel(APBC_APBCLK, apb1clkres-gpio);
+#ifdef CONFIG_I2C_MV
+ /* Enable general I2C clock */
+ writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, apb1clkres-twsi0);
+ writel(APBC_FNCLK | APBC_APBCLK, apb1clkres-twsi0);
+
+ /* Enable power I2C clock */
+ writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, apb1clkres-twsi1);
+ writel(APBC_FNCLK | APBC_APBCLK, apb1clkres-twsi1);
+#endif
+
/*
* Enable Functional and APB clock at 14.7456MHz
* for configured UART console
@@ -90,3 +100,9 @@ int print_cpuinfo(void)
return 0;
}
#endif
+
+#ifdef CONFIG_I2C_MV
+void i2c_clk_enable(void)
+{
+}
+#endif
diff --git a/arch/arm/include/asm/arch-armada100/mfp.h
b/arch/arm/include/asm/arch-armada100/mfp.h
index d21a79f..73783a7 100644
--- a/arch/arm/include/asm/arch-armada100/mfp.h
+++ b/arch/arm/include/asm/arch-armada100/mfp.h
@@ -37,28 +37,32 @@
* offset, pull,pF, drv,dF, edge,eF ,afn,aF
*/
/* UART1 */
-#define MFP107_UART1_TXD MFP_REG(0x01ac) | MFP_AF1 | MFP_DRIVE_FAST
-#define MFP107_UART1_RXD MFP_REG(0x01ac) | MFP_AF2 | MFP_DRIVE_FAST
-#define MFP108_UART1_RXD MFP_REG(0x01b0) | MFP_AF1 | MFP_DRIVE_FAST
-#define MFP108_UART1_TXD MFP_REG(0x01b0) | MFP_AF2 | MFP_DRIVE_FAST
-#define MFP109_UART1_CTS MFP_REG(0x01b4) | MFP_AF1 | MFP_DRIVE_MEDIUM
-#define MFP109_UART1_RTS MFP_REG(0x01b4) | MFP_AF2 | MFP_DRIVE_MEDIUM
-#define MFP110_UART1_RTS MFP_REG(0x01b8) | MFP_AF1 | MFP_DRIVE_MEDIUM
-#define MFP110_UART1_CTS MFP_REG(0x01b8) | MFP_AF2 | MFP_DRIVE_MEDIUM
-#define MFP111_UART1_RIMFP_REG(0x01bc) | MFP_AF1 |
MFP_DRIVE_MEDIUM
-#define MFP111_UART1_DSR MFP_REG(0x01bc) | MFP_AF2 | MFP_DRIVE_MEDIUM
-#define MFP112_UART1_DTR MFP_REG(0x01c0) | MFP_AF1 | MFP_DRIVE_MEDIUM
-#define MFP112_UART1_DCD MFP_REG(0x01c0) | MFP_AF2 | MFP_DRIVE_MEDIUM
+#define MFP107_UART1_TXD (MFP_REG(0x01ac) | MFP_AF1 | MFP_DRIVE_FAST)
+#define MFP107_UART1_RXD (MFP_REG(0x01ac) | MFP_AF2 | MFP_DRIVE_FAST)
+#define MFP108_UART1_RXD (MFP_REG(0x01b0) | MFP_AF1 | MFP_DRIVE_FAST)
+#define MFP108_UART1_TXD (MFP_REG(0x01b0) | MFP_AF2 | MFP_DRIVE_FAST)
+#define MFP109_UART1_CTS (MFP_REG(0x01b4) | MFP_AF1 | MFP_DRIVE_MEDIUM)
+#define MFP109_UART1_RTS (MFP_REG(0x01b4) | MFP_AF2 | MFP_DRIVE_MEDIUM)
+#define MFP110_UART1_RTS (MFP_REG(0x01b8) | MFP_AF1 | MFP_DRIVE_MEDIUM)
+#define MFP110_UART1_CTS (MFP_REG(0x01b8) | MFP_AF2 | MFP_DRIVE_MEDIUM)
+#define MFP111_UART1_RI(MFP_REG(0x01bc) | MFP_AF1 |
MFP_DRIVE_MEDIUM)
+#define MFP111_UART1_DSR (MFP_REG(0x01bc) | MFP_AF2 | MFP_DRIVE_MEDIUM)
+#define MFP112_UART1_DTR (MFP_REG(0x01c0) | MFP_AF1 | MFP_DRIVE_MEDIUM)
+#define MFP112_UART1_DCD (MFP_REG(0x01c0) | MFP_AF2 | MFP_DRIVE_MEDIUM)
/* UART2 */
-#define MFP47_UART2_RXDMFP_REG(0x0028) | MFP_AF6 |
MFP_DRIVE_MEDIUM
-#define MFP48_UART2_TXDMFP_REG(0x002c) | MFP_AF6 |
MFP_DRIVE_MEDIUM
-#define MFP88_UART2_RXDMFP_REG(0x0160) | MFP_AF2 |
MFP_DRIVE_MEDIUM
-#define MFP89_UART2_TXDMFP_REG(0x0164) | MFP_AF2 |
MFP_DRIVE_MEDIUM
+#define MFP47_UART2_RXD(MFP_REG(0x0028) | MFP_AF6 |
MFP_DRIVE_MEDIUM)
+#define MFP48_UART2_TXD(MFP_REG(0x002c) | MFP_AF6 |
MFP_DRIVE_MEDIUM)
+#define MFP88_UART2_RXD(MFP_REG(0x0160) | MFP_AF2 |
MFP_DRIVE_MEDIUM)
+#define MFP89_UART2_TXD(MFP_REG(0x0164) | MFP_AF2 |
MFP_DRIVE_MEDIUM)
/* UART3 */
-#define MFPO8_UART3_RXDMFP_REG(0x06c) | MFP_AF2 |
MFP_DRIVE_MEDIUM
-#define MFPO9_UART3_TXDMFP_REG(0x070) | MFP_AF2 |
MFP_DRIVE_MEDIUM
+#define MFPO8_UART3_RXD(MFP_REG(0x06c) | MFP_AF2 |
MFP_DRIVE_MEDIUM)
+#define MFPO9_UART3_TXD(MFP_REG(0x070) | MFP_AF2 |
MFP_DRIVE_MEDIUM)
+
+/* I2c */
+#define MFP105_CI2C_SDA(MFP_REG(0x1a4) | MFP_AF1 |
MFP_DRIVE_MEDIUM)
+#define MFP106_CI2C_SCL(MFP_REG(0x1a8) | MFP_AF1 |
MFP_DRIVE_MEDIUM)
/* More macros can be defined here... */
diff --git a/board/Marvell/aspenite/aspenite.c
[U-Boot] [PATCH V3 3/5] I2C: add i2c support for Pantheon platform
Add i2c support to dkb board with pantheon soc.
Signed-off-by: Lei Wen lei...@marvell.com
---
Changelog:
V3:
clean code sytle issue
Add i2c clock enable code include in I2C configure define block
arch/arm/cpu/arm926ejs/pantheon/cpu.c| 12
arch/arm/include/asm/arch-pantheon/cpu.h |4 +++-
arch/arm/include/asm/arch-pantheon/mfp.h |6 --
board/Marvell/dkb/dkb.c |4
include/configs/dkb.h| 11 +++
5 files changed, 34 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/pantheon/cpu.c
b/arch/arm/cpu/arm926ejs/pantheon/cpu.c
index 9ddc77c..8b2eafa 100644
--- a/arch/arm/cpu/arm926ejs/pantheon/cpu.c
+++ b/arch/arm/cpu/arm926ejs/pantheon/cpu.c
@@ -59,6 +59,12 @@ int arch_cpu_init(void)
/* Enable GPIO clock */
writel(APBC_APBCLK, apbclkres-gpio);
+#ifdef CONFIG_I2C_MV
+ /* Enable I2C clock */
+ writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, apbclkres-twsi);
+ writel(APBC_FNCLK | APBC_APBCLK, apbclkres-twsi);
+#endif
+
icache_enable();
return 0;
@@ -76,3 +82,9 @@ int print_cpuinfo(void)
return 0;
}
#endif
+
+#ifdef CONFIG_I2C_MV
+void i2c_clk_enable(void)
+{
+}
+#endif
diff --git a/arch/arm/include/asm/arch-pantheon/cpu.h
b/arch/arm/include/asm/arch-pantheon/cpu.h
index 30f4393..60955c5 100644
--- a/arch/arm/include/asm/arch-pantheon/cpu.h
+++ b/arch/arm/include/asm/arch-pantheon/cpu.h
@@ -50,7 +50,9 @@ struct panthapb_registers {
u32 uart0; /*0x000*/
u32 uart1; /*0x004*/
u32 gpio; /*0x008*/
- u8 pad0[0x034 - 0x08 - 4];
+ u8 pad0[0x02c - 0x08 - 4];
+ u32 twsi; /*0x02c*/
+ u8 pad1[0x034 - 0x2c - 4];
u32 timers; /*0x034*/
};
diff --git a/arch/arm/include/asm/arch-pantheon/mfp.h
b/arch/arm/include/asm/arch-pantheon/mfp.h
index fb291cf..e939196 100644
--- a/arch/arm/include/asm/arch-pantheon/mfp.h
+++ b/arch/arm/include/asm/arch-pantheon/mfp.h
@@ -32,8 +32,10 @@
* offset, pull,pF, drv,dF, edge,eF ,afn,aF
*/
/* UART2 */
-#define MFP47_UART2_RXDMFP_REG(0x198) | MFP_AF6 |
MFP_DRIVE_MEDIUM
-#define MFP48_UART2_TXDMFP_REG(0x19c) | MFP_AF6 |
MFP_DRIVE_MEDIUM
+#define MFP47_UART2_RXD(MFP_REG(0x198) | MFP_AF6 |
MFP_DRIVE_MEDIUM)
+#define MFP48_UART2_TXD(MFP_REG(0x19c) | MFP_AF6 |
MFP_DRIVE_MEDIUM)
+#define MFP53_CI2C_SCL (MFP_REG(0x1b0) | MFP_AF2 | MFP_DRIVE_MEDIUM)
+#define MFP54_CI2C_SDA (MFP_REG(0x1b4) | MFP_AF2 | MFP_DRIVE_MEDIUM)
/* More macros can be defined here... */
diff --git a/board/Marvell/dkb/dkb.c b/board/Marvell/dkb/dkb.c
index 72a2d2a..00f73e7 100644
--- a/board/Marvell/dkb/dkb.c
+++ b/board/Marvell/dkb/dkb.c
@@ -36,6 +36,10 @@ int board_early_init_f(void)
MFP47_UART2_RXD,
MFP48_UART2_TXD,
+ /* I2C */
+ MFP53_CI2C_SCL,
+ MFP54_CI2C_SDA,
+
MFP_EOC /*End of configureation*/
};
/* configure MFP's */
diff --git a/include/configs/dkb.h b/include/configs/dkb.h
index 638af5e..1b18c44 100644
--- a/include/configs/dkb.h
+++ b/include/configs/dkb.h
@@ -56,6 +56,17 @@
#include mv-common.h
#undef CONFIG_ARCH_MISC_INIT
+
+/*
+ * I2C definition
+ */
+#define CONFIG_CMD_I2C
+#define CONFIG_I2C_MV 1
+#define CONFIG_PXA_I2C_REG 0xd4011000
+#define CONFIG_HARD_I2C1
+#define CONFIG_SYS_I2C_SPEED 0
+#define CONFIG_SYS_I2C_SLAVE 0xfe
+
/*
* Environment variables configurations
*/
--
1.7.0.4
___
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Re: [U-Boot] [PATCH v2 2/5] mvi2c: use structure to replace the direclty define
Hello Lei, Lei Wen wrote: On Tue, Mar 15, 2011 at 2:54 PM, Heiko Schocher h...@denx.de wrote: Hello Lei, Lei Wen wrote: Signed-off-by: Lei Wen lei...@marvell.com --- arch/arm/cpu/pxa/cpu.c | 11 +++ arch/arm/include/asm/arch-pxa/pxa-regs.h | 56 board/innokom/innokom.c |9 +-- drivers/i2c/mvi2c.c | 139 +- include/configs/innokom.h|1 + include/configs/xm250.h |1 + 6 files changed, 111 insertions(+), 106 deletions(-) [...] diff --git a/include/configs/innokom.h b/include/configs/innokom.h index 0ea73c9..1ddee03 100644 --- a/include/configs/innokom.h +++ b/include/configs/innokom.h @@ -141,6 +141,7 @@ * I2C bus */ #define CONFIG_I2C_MV1 +#define CONFIG_PXA_I2C_REG 0x40301680 Hmm.. is there no define for this magic value? This value is for i2c base address. Do you mean it need a description? There should be in a cpu specific header a define for it, which you can use here. bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 5/5] I2C: add i2c support for Armada100 platform
Hello Lei, Lei Wen wrote: On Tue, Mar 15, 2011 at 3:08 PM, Heiko Schocher heiko.schoc...@invitel.hu wrote: Hello Lei, Lei Wen wrote: Signed-off-by: Lei Wen lei...@marvell.com --- arch/arm/cpu/arm926ejs/armada100/cpu.c| 14 ++ arch/arm/include/asm/arch-armada100/mfp.h |4 board/Marvell/aspenite/aspenite.c |5 + include/configs/aspenite.h| 12 4 files changed, 35 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/armada100/cpu.c b/arch/arm/cpu/arm926ejs/armada100/cpu.c index 62aa175..8039ad2 100644 --- a/arch/arm/cpu/arm926ejs/armada100/cpu.c +++ b/arch/arm/cpu/arm926ejs/armada100/cpu.c @@ -62,6 +62,14 @@ int arch_cpu_init(void) /* Enable GPIO clock */ writel(APBC_APBCLK, apb1clkres-gpio); + /* Enable general I2C clock */ + writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, apb1clkres-twsi0); + writel(APBC_FNCLK | APBC_APBCLK, apb1clkres-twsi0); + + /* Enable power I2C clock */ + writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, apb1clkres-twsi1); + writel(APBC_FNCLK | APBC_APBCLK, apb1clkres-twsi1); + If boards based on this cpu type don;t use i2c, i2c clock and power would be enabled ... wouldn;t it be better, if we enable this only if CONFIG_I2C_MV is defined? Good point, I would modify to follow this. Hmm.. are the comments OK? In the first block you only use twsi0 register, in the second block only twsi1 ...? The comments is following what the spec says... In spec, the twsi0 named as general, and twsi1 named as power one. Ah, ok. So the names in the struct are misleading. bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 1/2] armv7: enable Thumb build for armv7
Albert, On Wednesday 16 March 2011 10:55 PM, Albert ARIBAUD wrote: Le 16/03/2011 09:39, Aneesh V a écrit : [snip ..] Some toolchains in current use (notably the one provided with ELDK 4.2, and possibly others) do not support -march=armv7[-a]. Do we really need armv7 instructions? 'cc-option' will make sure that build won't break for old compilers. We can do something like this: PLATFORM_CPPFLAGS += $(call cc-option,-march=armv7-a, -march=armv5) We are not planning to use armv7-a instructions in the code. In fact, recently I removed even an armv5 instruction from armv7 generic code in the interest of not breaking Tegra2. However, keeping -march=armv7-a (armv6 and above) helps in having Thumb2, which I believe is a good compromise between code density and performance. So, OMAP4 U-Boot when built with ELDK will give you Thumb1 code where as when it is built with newer compilers it will give you Thumb2 code. As long we don't use non-compliant assembly instructions, both should build and work fine. br, Aneesh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] [NAND] Add support for 4GiB and larger NAND
On Wednesday, March 16, 2011 04:32:59 PM Scott Wood wrote: On Mon, Jan 31, 2011 at 07:44:13PM -0800, Aaron Williams wrote: I'm still fighting with my mail tool, hopefully this will work. Patch is line-wrapped and does not apply. -Scott I still need to get GIT working properly so I can properly send out my patch. I have a number of other fixes and patches as well I would like to start sending in. I still need to get around to fixing CFI with an 8-bit bus since that affects most of our boards (we have a quick hack but it's also broken). -Aaron ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V5 1/4] SMDK2410: activate ARM relocation feature
Signed-off-by: David Müller d.muel...@elsoft.ch --- include/configs/smdk2410.h |7 +++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h index 62fe97e..38b5684 100644 --- a/include/configs/smdk2410.h +++ b/include/configs/smdk2410.h @@ -179,4 +179,11 @@ #defineCONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_SIZE0x1 /* Total Size of Environment Sector */ +/* additions for new relocation code, must be added to all boards */ +#undef CONFIG_SYS_ARM_WITHOUT_RELOC +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_SDRAM_BASE + 0x1000 - \ + GENERATED_GBL_DATA_SIZE) + + #endif /* __CONFIG_H */ -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V5 0/4] update SMDK2410 port
This patch serie brings the SMDK2410 port in sync with the latest U-Boot version by doing the following: - do the necessary adjustments to support the ARM relocation feature - use the CFI flash driver (and removing the old one) - remove the unneeded config.mk file --- board/samsung/smdk2410/Makefile |2 +- board/samsung/smdk2410/config.mk | 25 --- board/samsung/smdk2410/flash.c| 433 - board/samsung/smdk2410/smdk2410.c | 73 --- include/configs/smdk2410.h| 182 ++-- 5 files changed, 167 insertions(+), 548 deletions(-) Changes for V2: - deleted config.mk Changes for V3: - adjusted patch meta info Changes for V4: - split patch into smaller pieces Changes for V5: - prefix patches with SMDK2410 - additional tabulator clenup in smdk2410.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V5 3/4] SMDK2410: use the CFI driver (and remove the old one)
Signed-off-by: David Müller d.muel...@elsoft.ch
---
board/samsung/smdk2410/Makefile |2 +-
board/samsung/smdk2410/flash.c| 433 -
board/samsung/smdk2410/smdk2410.c | 12 +
include/configs/smdk2410.h| 32 +--
4 files changed, 25 insertions(+), 454 deletions(-)
delete mode 100644 board/samsung/smdk2410/flash.c
diff --git a/board/samsung/smdk2410/Makefile b/board/samsung/smdk2410/Makefile
index bda8898..0afe1e2 100644
--- a/board/samsung/smdk2410/Makefile
+++ b/board/samsung/smdk2410/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
-COBJS := smdk2410.o flash.o
+COBJS := smdk2410.o
SOBJS := lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/samsung/smdk2410/flash.c b/board/samsung/smdk2410/flash.c
deleted file mode 100644
index 132d752..000
--- a/board/samsung/smdk2410/flash.c
+++ /dev/null
@@ -1,433 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH www.elinos.com
- * Alex Zuepke a...@sysgo.de
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include common.h
-
-ulong myflush (void);
-
-
-#define FLASH_BANK_SIZEPHYS_FLASH_SIZE
-#define MAIN_SECT_SIZE 0x1/* 64 KB */
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-
-#define CMD_READ_ARRAY 0x00F0
-#define CMD_UNLOCK10x00AA
-#define CMD_UNLOCK20x0055
-#define CMD_ERASE_SETUP0x0080
-#define CMD_ERASE_CONFIRM 0x0030
-#define CMD_PROGRAM0x00A0
-#define CMD_UNLOCK_BYPASS 0x0020
-
-#define MEM_FLASH_ADDR1(*(volatile u16
*)(CONFIG_SYS_FLASH_BASE + (0x0555 1)))
-#define MEM_FLASH_ADDR2(*(volatile u16
*)(CONFIG_SYS_FLASH_BASE + (0x02AA 1)))
-
-#define BIT_ERASE_DONE 0x0080
-#define BIT_RDY_MASK 0x0080
-#define BIT_PROGRAM_ERROR 0x0020
-#define BIT_TIMEOUT0x8000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*---
- */
-
-ulong flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
-#if defined(CONFIG_AMD_LV400)
- (AMD_MANUFACT FLASH_VENDMASK) |
- (AMD_ID_LV400B FLASH_TYPEMASK);
-#elif defined(CONFIG_AMD_LV800)
- (AMD_MANUFACT FLASH_VENDMASK) |
- (AMD_ID_LV800B FLASH_TYPEMASK);
-#else
-#error Unknown flash configured
-#endif
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic (configured too many flash banks!\n);
- for (j = 0; j flash_info[i].sector_count; j++) {
- if (j = 3) {
- /* 1st one is 16 KB */
- if (j == 0) {
- flash_info[i].start[j] =
- flashbase + 0;
- }
-
- /* 2nd and 3rd are both 8 KB */
- if ((j == 1) || (j == 2)) {
- flash_info[i].start[j] =
- flashbase + 0x4000 + (j -
- 1) *
- 0x2000;
- }
-
- /* 4th 32 KB */
- if (j == 3) {
- flash_info[i].start[j] =
- flashbase + 0x8000;
- }
- } else {
-
[U-Boot] [PATCH V5 4/4] SMDK2410: various cleanups/code style fixes
Signed-off-by: David Müller d.muel...@elsoft.ch
---
board/samsung/smdk2410/smdk2410.c | 61 +---
include/configs/smdk2410.h| 145 ++---
2 files changed, 135 insertions(+), 71 deletions(-)
diff --git a/board/samsung/smdk2410/smdk2410.c
b/board/samsung/smdk2410/smdk2410.c
index 1abc4ba..e9ba922 100644
--- a/board/samsung/smdk2410/smdk2410.c
+++ b/board/samsung/smdk2410/smdk2410.c
@@ -3,7 +3,7 @@
* Sysgo Real-Time Solutions, GmbH www.elinos.com
* Marius Groeger mgroe...@sysgo.de
*
- * (C) Copyright 2002
+ * (C) Copyright 2002, 2010
* David Mueller, ELSOFT AG, d.muel...@elsoft.ch
*
* See file CREDITS for list of people who contributed to this
@@ -27,6 +27,7 @@
#include common.h
#include netdev.h
+#include asm/io.h
#include asm/arch/s3c24x0_cpu.h
DECLARE_GLOBAL_DATA_PTR;
@@ -55,7 +56,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define U_M_SDIV 0x2
#endif
-static inline void delay (unsigned long loops)
+static inline void pll_delay(unsigned long loops)
{
__asm__ volatile (1:\n
subs %0, %1, #1\n
@@ -66,44 +67,51 @@ static inline void delay (unsigned long loops)
* Miscellaneous platform dependent initialisations
*/
-int board_init (void)
+int board_early_init_f(void)
{
struct s3c24x0_clock_power * const clk_power =
s3c24x0_get_base_clock_power();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* to reduce PLL lock time, adjust the LOCKTIME register */
- clk_power-locktime = 0xFF;
+ writel(0xFF, clk_power-locktime);
/* configure MPLL */
- clk_power-mpllcon = ((M_MDIV 12) + (M_PDIV 4) + M_SDIV);
+ writel((M_MDIV 12) + (M_PDIV 4) + M_SDIV,
+ clk_power-mpllcon);
/* some delay between MPLL and UPLL */
- delay (4000);
+ pll_delay(4000);
/* configure UPLL */
- clk_power-upllcon = ((U_M_MDIV 12) + (U_M_PDIV 4) + U_M_SDIV);
+ writel((U_M_MDIV 12) + (U_M_PDIV 4) + U_M_SDIV,
+ clk_power-upllcon);
/* some delay between MPLL and UPLL */
- delay (8000);
+ pll_delay(8000);
/* set up the I/O ports */
- gpio-gpacon = 0x007F;
- gpio-gpbcon = 0x00044555;
- gpio-gpbup = 0x07FF;
- gpio-gpccon = 0x;
- gpio-gpcup = 0x;
- gpio-gpdcon = 0x;
- gpio-gpdup = 0x;
- gpio-gpecon = 0x;
- gpio-gpeup = 0x;
- gpio-gpfcon = 0x55AA;
- gpio-gpfup = 0x00FF;
- gpio-gpgcon = 0xFF95FFBA;
- gpio-gpgup = 0x;
- gpio-gphcon = 0x002AFAAA;
- gpio-gphup = 0x07FF;
+ writel(0x007F, gpio-gpacon);
+ writel(0x00044555, gpio-gpbcon);
+ writel(0x07FF, gpio-gpbup);
+ writel(0x, gpio-gpccon);
+ writel(0x, gpio-gpcup);
+ writel(0x, gpio-gpdcon);
+ writel(0x, gpio-gpdup);
+ writel(0x, gpio-gpecon);
+ writel(0x, gpio-gpeup);
+ writel(0x55AA, gpio-gpfcon);
+ writel(0x00FF, gpio-gpfup);
+ writel(0xFF95FFBA, gpio-gpgcon);
+ writel(0x, gpio-gpgup);
+ writel(0x002AFAAA, gpio-gphcon);
+ writel(0x07FF, gpio-gphup);
+
+ return 0;
+}
+int board_init(void)
+{
/* arch number of SMDK2410-Board */
gd-bd-bi_arch_number = MACH_TYPE_SMDK2410;
@@ -116,11 +124,10 @@ int board_init (void)
return 0;
}
-int dram_init (void)
+int dram_init(void)
{
- gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
- gd-bd-bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
+ /* dram_init must store complete ramsize in gd-ram_size */
+ gd-ram_size = PHYS_SDRAM_1_SIZE;
return 0;
}
diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h
index 88e7171..d1d891b 100644
--- a/include/configs/smdk2410.h
+++ b/include/configs/smdk2410.h
@@ -33,24 +33,23 @@
* High Level Configuration Options
* (easy to change)
*/
-#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
-#define CONFIG_S3C24X0 1 /* in a SAMSUNG S3C24x0-type SoC*/
-#define CONFIG_S3C2410 1 /* specifically a SAMSUNG S3C2410 SoC */
-#define CONFIG_SMDK24101 /* on a SAMSUNG SMDK2410 Board */
+#define CONFIG_ARM920T /* This is an ARM920T Core */
+#define CONFIG_S3C24X0 /* in a SAMSUNG S3C24x0-type SoC */
+#define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
+#define CONFIG_SMDK2410/* on a SAMSUNG SMDK2410 Board */
#define CONFIG_SYS_TEXT_BASE 0x0
-/* input clock of PLL */
-#define CONFIG_SYS_CLK_FREQ1200/* the SMDK2410 has 12MHz input clock */
+#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
+/* input clock of PLL (the SMDK2410 has 12MHz input clock) */
+#define CONFIG_SYS_CLK_FREQ1200
-#define USE_920T_MMU 1
[U-Boot] [PATCH V5 2/4] SMDK2410: remove unneeded config.mk
Signed-off-by: David Müller d.muel...@elsoft.ch --- board/samsung/smdk2410/config.mk | 25 - include/configs/smdk2410.h |2 ++ 2 files changed, 2 insertions(+), 25 deletions(-) delete mode 100644 board/samsung/smdk2410/config.mk diff --git a/board/samsung/smdk2410/config.mk b/board/samsung/smdk2410/config.mk deleted file mode 100644 index c8d1b1f..000 --- a/board/samsung/smdk2410/config.mk +++ /dev/null @@ -1,25 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, ga...@denx.de -# David Mueller, ELSOFT AG, d.muel...@elsoft.ch -# -# SAMSUNG SMDK2410 board with S3C2410X (ARM920T) cpu -# -# see http://www.samsung.com/ for more information on SAMSUNG -# - -# -# SMDK2410 has 1 bank of 64 MB DRAM -# -# 3000' to 3400' -# -# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000 -# optionally with a ramdisk at 3080' -# -# we load ourself to 33F8' -# -# download area is 3300' -# - - -CONFIG_SYS_TEXT_BASE = 0x33F8 diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h index 38b5684..3b037c4 100644 --- a/include/configs/smdk2410.h +++ b/include/configs/smdk2410.h @@ -38,6 +38,8 @@ #define CONFIG_S3C2410 1 /* specifically a SAMSUNG S3C2410 SoC */ #define CONFIG_SMDK24101 /* on a SAMSUNG SMDK2410 Board */ +#define CONFIG_SYS_TEXT_BASE 0x0 + /* input clock of PLL */ #define CONFIG_SYS_CLK_FREQ1200/* the SMDK2410 has 12MHz input clock */ -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Trying again: DNS323
Hi folks, After a bit of a hiatus, I am trying again to get my DNS323 config working properly. This is a Marvell Orion5x based device, very similar to the EDMiniv2. Unfortunately, I am having some difficulty in forward porting it to the new relocation scheme. I have it working based on a point after 2010.06, prior to the introduction of all the relocation rework. My configuration was based on that of the edminiv2, and I basically reapplied my changes to current mainline, comparing them to the current edminiv2 configuration. Unfortunately, it simply doesn't boot. Note that I have not yet tried to flash the image to the device, it is configured for chain loading from the current vendor U-Boot, using the CONFIG_SKIP_LOWLEVEL_INIT option. I would have thought that this would have eliminated the relocation code completely, since relocation should only happen when booting directly from flash, I would think? Has anyone tested to verify whether CONFIG_SKIP_LOWLEVEL_INIT still works? As an aside, it seems that there are differences in gcc 4.3 and gcc 4.5 that prevent images compiled with 4.5 from working. Compiling my working config with 4.3 results in a working image, compiling with 4.5 results in a non-working image. If anyone wants to work out what the differences are, and how to get 4.5 to build successfully, please let me know. Regards, Rogan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Working on u-boot on panda board.
Hi, I would like to make some changes to u-boot on pandaboard. Sometimes in the past, in u-boot, I could loadb a new u-boot binary, then go to it, and the new version of u-boot would start. This was far from perfect, but it made testing small changes possible. This also works with the version of u-boot provided on the pandaboard community site. The magic which made this possible was in the start.S file, I see that the code changed, but there still seems to be a relocation (somewhat more complicated, since it handles ELF relocations), so it seems it should work. So my question is: is this loadb+go method still supposed to be working, and only broken, somehow, on pandaboard? Or is it no longer supposed to be working? Regards. -- Gilles. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Working on u-boot on panda board.
Hi Gilles, On Thursday 17 March 2011 06:13 PM, Gilles Chanteperdrix wrote: Hi, I would like to make some changes to u-boot on pandaboard. Sometimes in the past, in u-boot, I could loadb a new u-boot binary, then go to it, and the new version of u-boot would start. This was far from perfect, but it made testing small changes possible. This also works with the version of u-boot provided on the pandaboard community site. The magic which made this possible was in the start.S file, I see that the code changed, but there still seems to be a relocation (somewhat more complicated, since it handles ELF relocations), so it seems it should work. So my question is: is this loadb+go method still supposed to be working, and only broken, somehow, on pandaboard? Or is it no longer supposed to be working? Couple of things you might want to consider. * According to the new relocation scheme u-boot should start running from the address that it is linked to. You must load it to CONFIG_SYS_TEXT_BASE * Data cache enabled in U-Boot could be a problem. You will end up having cache coherency issues unless you flush the caches after loadb. Better keep them disabled using CONFIG_SYS_NO_DCACHE Regards. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Working on u-boot on panda board.
Aneesh V wrote: Hi Gilles, On Thursday 17 March 2011 06:13 PM, Gilles Chanteperdrix wrote: Hi, I would like to make some changes to u-boot on pandaboard. Sometimes in the past, in u-boot, I could loadb a new u-boot binary, then go to it, and the new version of u-boot would start. This was far from perfect, but it made testing small changes possible. This also works with the version of u-boot provided on the pandaboard community site. The magic which made this possible was in the start.S file, I see that the code changed, but there still seems to be a relocation (somewhat more complicated, since it handles ELF relocations), so it seems it should work. So my question is: is this loadb+go method still supposed to be working, and only broken, somehow, on pandaboard? Or is it no longer supposed to be working? Couple of things you might want to consider. * According to the new relocation scheme u-boot should start running from the address that it is linked to. You must load it to CONFIG_SYS_TEXT_BASE You mean the address where u-boot is currently loaded? But that will not work, right? I mean, it would override the current u-boot while it is currently running. I do not really understand this answer, what does it mean? The relocation code does not work if the address it is starting from is not CONFIG_SYS_TEXT_BASE? What if I reinsert the memcpy in start.S which copies to CONFIG_SYS_TEXT_BASE? * Data cache enabled in U-Boot could be a problem. You will end up having cache coherency issues unless you flush the caches after loadb. Better keep them disabled using CONFIG_SYS_NO_DCACHE Ok, that is not really an issue for development. -- Gilles. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Working on u-boot on panda board.
On Thursday 17 March 2011 07:14 PM, Gilles Chanteperdrix wrote: Aneesh V wrote: Hi Gilles, On Thursday 17 March 2011 06:13 PM, Gilles Chanteperdrix wrote: Hi, I would like to make some changes to u-boot on pandaboard. Sometimes in the past, in u-boot, I could loadb a new u-boot binary, then go to it, and the new version of u-boot would start. This was far from perfect, but it made testing small changes possible. This also works with the version of u-boot provided on the pandaboard community site. The magic which made this possible was in the start.S file, I see that the code changed, but there still seems to be a relocation (somewhat more complicated, since it handles ELF relocations), so it seems it should work. So my question is: is this loadb+go method still supposed to be working, and only broken, somehow, on pandaboard? Or is it no longer supposed to be working? Couple of things you might want to consider. * According to the new relocation scheme u-boot should start running from the address that it is linked to. You must load it to CONFIG_SYS_TEXT_BASE You mean the address where u-boot is currently loaded? But that will not work, right? I mean, it would override the current u-boot while it is currently running. I do not really understand this answer, what does it mean? The relocation code does not work if the address it is starting from is not CONFIG_SYS_TEXT_BASE? What if I reinsert the memcpy in start.S which copies to CONFIG_SYS_TEXT_BASE? Here is my understanding: Eearlier the memcpy was done very early in start.S(before board_init_f) and everything until that point was position independent. Copy was done *to* CONFIG_SYS_TEXT_BASE Now, this memcpy has been removed and we assume that we start from CONFIG_SYS_TEXT_BASE. After board_init_f we copy the image *from* CONFIG_SYS_TEXT_BASE to the end of available memory and do ELF relocation. board_init_f will crash unless you are running from CONFIG_SYS_TEXT_BASE Since U-Boot is relocated to the end of available memory you will not likely over-write existing U-Boot if you copy to CONFIG_SYS_TEXT_BASE, certainly not on Panda with 1GB memory. Re-inserting the memcpy may not be necessary I believe. * Data cache enabled in U-Boot could be a problem. You will end up having cache coherency issues unless you flush the caches after loadb. Better keep them disabled using CONFIG_SYS_NO_DCACHE Ok, that is not really an issue for development. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/5] MIPS: Optimize the setup of endianess and CPU optimization flags
On 03/16/2011 11:41 PM, Daniel Schwierzeck wrote: Is my approach with -march acceptable? This is more important to me for supporting new SoCs with 24k and 34k CPU cores. I think its a clean approach to use a default Mips32 architecture optimization plus a per CPU optimization configured in the SoC directories. IIUC this is a binutils related issue. @@ -20,20 +20,13 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # -v=$(shell $(AS) --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2) -MIPSFLAGS:=$(shell \ -if [ $v -lt 14 ]; then \ - echo -mcpu=4kc; \ -else \ - echo -march=4kc -mtune=4kc; \ -fi) [...] +# Optimization flags for all Mips32 CPUs +MIPSFLAGS = $(call cc-option,-march=mips32r2,-mips32r2 -Wa,-mips32r2) According to GNU gas NEWS, mips32r2 support was introduced in 2.14: http://sourceware.org/cgi-bin/cvsweb.cgi/~checkout~/src/gas/NEWS?rev=1.117content-type=text/plaincvsroot=srconly_with_tag=binutils-binutils-2_21 On the other hand, we have a number of the ELDK releases so far, and their binutils versions vary from 2.11 (ELDK2.1.0) to 2.16.1 (ELDK4.1). 2.1.0: http://mirror.switch.ch/ftp/mirror/eldk/2.1.0/eldk-mips-linux-x86/README.html 3.0: (N/A for MIPS?) 3.1: http://mirror.switch.ch/ftp/mirror/eldk/3.1/mips-linux-x86/distribution/README.html 3.1.1: http://mirror.switch.ch/ftp/mirror/eldk/3.1.1/mips-linux-x86/distribution/README.html 4.0: http://mirror.switch.ch/ftp/mirror/eldk/4.0/mips-linux-x86/distribution/README.html http://www.denx.de/en/News/PressReleaseELDK40 4.1: http://mirror.switch.ch/ftp/mirror/eldk/4.1/mips-linux-x86/distribution/README.html http://www.denx.de/en/News/PressReleaseELDK41 4.2: (N/A for MIPS?) Does above change break any builds with older binutils? Personally, I'm ok with dropping older toolchains to some extent. However, if it breaks builds with older toolchains, strictly speaking older versions of the ELDK releases, the decision is up to Wolfgang. Along with the code, it'd be nice to provide a note in the git commit log about which ELDK version(s) will be affected by this change. I'm not sure that anyone still uses the ELSK2.1.0 in the wild, nor current U-Boot/MIPS can be built with it, though. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: Tegra2: add support for A9 CPU init
Hi Tom, + /* Is PLL-X already running? */ + reg = readl(clkrst-crc_pllx_base); + if (reg PLL_ENABLE) + return; + + /* Do PLLX init if it isn't running, but BootROM sets it, so TBD */ +} The above function looks incorrect. What looks incorrect? It checks to see if the PLL is already running/enabled, and returns if it is. Tegra2 mask ROM (BootROM) currently always sets PLLX, so this will always return, but the comment is there for future chips that may not set up PLLX. It looks like a function that does a read of a value it doesn't care about, does an unnecessary comparison, and then returns either way, without doing anything:) If/when you want to do future stuff with the PLL-X, code should be added then - as is it doesn't do anything and is confusing. The general policy of U-Boot is not to add dead code. OK, so not really incorrect, just unnecessary. Agreed - again a vestigial leftover from our in-house code. I'll remove it. Unnecessary/misleading/dead code is inherently not correct:) snip +#include asm/types.h + +#ifndef FALSE +#define FALSE0 +#endif +#ifndef TRUE +#define TRUE 1 +#endif These shouldn't be added here. They should be somewhere common, or shouldn't be used (my preference). I would think they'd be in the ARM tree somewhere, but I couldn't find them so I added 'em here. My preference is to use TRUE/FALSE - it carries more context than 1/0 to me. If you prefer to use TRUE/FALSE, they should be moved into a common location so everywhere uses the same, once-defined definition. Their definitions are already littered over a few files, which would ideally be cleaned up. Perhaps moving all definitions into include/common.h, or somewhere similar would work. Others may have opinions about TRUE/FALSE vs 1/0 - it seems like TRUE/FALSE aren't generally used. I don't want to pollute all builds by adding to include/common.h. I'll try to find a more central header in my own tree. My point is that there are already 32 definitions of TRUE/FALSE - adding a 33rd doesn't seem like a good thing to do. I view a 33rd identical definition as polluting the code more than 1 common definition that most people won't generally use. Its not my decision, but I assume the powers that be would recommend one of: - Not using TRUE/FALSE since using non-zero values and 0 are widely accepted as TRUE/FALSE. I think using TRUE/FALSE makes the code harder to understand and more open to bugs. Eg for other code that interacts with your code, or someone reviewing your code, they either have to either assume you defined TRUE as 1, FALSE as 0, or import your definitions. Anyway, I view their use as another layer of unnecessary abstraction with very little benefit. - Consolidating the definition of TRUE/FALSE. Wolfgang, do you have a preference about how TRUE/FALSE are generally used/defined? Best, Peter ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/5] MIPS: Optimize the setup of endianess and CPU optimization flags
2011/3/17 Shinya Kuribayashi skuri...@pobox.com: On 03/16/2011 11:41 PM, Daniel Schwierzeck wrote: Is my approach with -march acceptable? This is more important to me for supporting new SoCs with 24k and 34k CPU cores. I think its a clean approach to use a default Mips32 architecture optimization plus a per CPU optimization configured in the SoC directories. IIUC this is a binutils related issue. @@ -20,20 +20,13 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # -v=$(shell $(AS) --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2) -MIPSFLAGS:=$(shell \ -if [ $v -lt 14 ]; then \ - echo -mcpu=4kc; \ -else \ - echo -march=4kc -mtune=4kc; \ -fi) [...] +# Optimization flags for all Mips32 CPUs +MIPSFLAGS = $(call cc-option,-march=mips32r2,-mips32r2 -Wa,-mips32r2) According to GNU gas NEWS, mips32r2 support was introduced in 2.14: http://sourceware.org/cgi-bin/cvsweb.cgi/~checkout~/src/gas/NEWS?rev=1.117content-type=text/plaincvsroot=srconly_with_tag=binutils-binutils-2_21 On the other hand, we have a number of the ELDK releases so far, and their binutils versions vary from 2.11 (ELDK2.1.0) to 2.16.1 (ELDK4.1). 2.1.0: http://mirror.switch.ch/ftp/mirror/eldk/2.1.0/eldk-mips-linux-x86/README.html 3.0: (N/A for MIPS?) 3.1: http://mirror.switch.ch/ftp/mirror/eldk/3.1/mips-linux-x86/distribution/README.html 3.1.1: http://mirror.switch.ch/ftp/mirror/eldk/3.1.1/mips-linux-x86/distribution/README.html 4.0: http://mirror.switch.ch/ftp/mirror/eldk/4.0/mips-linux-x86/distribution/README.html http://www.denx.de/en/News/PressReleaseELDK40 4.1: http://mirror.switch.ch/ftp/mirror/eldk/4.1/mips-linux-x86/distribution/README.html http://www.denx.de/en/News/PressReleaseELDK41 4.2: (N/A for MIPS?) Does above change break any builds with older binutils? Personally, I'm ok with dropping older toolchains to some extent. However, if it breaks builds with older toolchains, strictly speaking older versions of the ELDK releases, the decision is up to Wolfgang. Ok I'll test with pre-4.1 ELDK releases too and adapt the code if necessary. Along with the code, it'd be nice to provide a note in the git commit log about which ELDK version(s) will be affected by this change. I'm not sure that anyone still uses the ELSK2.1.0 in the wild, nor current U-Boot/MIPS can be built with it, though. Next time I'll provide a Tested-with ELDK x.y line in the patch for those changes. Thanks for the feedback. Daniel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: Tegra2: add support for A9 CPU init
It looks like most of your uses are standalone functions that would function just fine on their own. Is there a reason you prefer to have them in a C-file instead of in an assembly file? Just laziness ;) I'll move these to a new .S file in the next patchset. Actually, writing assembly-only C functions is difficul and error-pronet. I've seen you use r0 and other registers esplicitly, but this is not allowed in general. I once wasted some hours in tracking why a non-submitted port of u-boot was not working with a newer compiler. The problem was just that: the new compiler was inlining a void(void) function; the asm used r0 and r1 explicitly, which worked over a function call but was corrupting data when inlined by the newer and more optimizing compiler. While your functions are currently not inlined (or, like cold_boot, they may be inlined in a place where no register needs to be preserved), another user may move them to a context where the semantics are different, for another board or another boot loader. If they are in a .S files, they will only be called by bl and you know the rules for register allocation appy. Besides, a _real_ lazy programmer avoids the extra quotes and \n in the code :) /alessandro ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v4] NAND: add support for reading ONFI page table
Le jeudi 17 mars 2011 00:42:55, Scott Wood a écrit : On Fri, Feb 25, 2011 at 12:01:34AM -, Florian Fainelli wrote: From: Florian Fainelli flor...@openwrt.org This patch adds support for reading an ONFI page parameter from a NAND device supporting it. If this is the case, struct nand_chip onfi_version member contains the supported ONFI version, 0 otherwise. This allows NAND drivers past nand_scan_ident to set the best timings for the NAND chip. Signed-off-by: Florian Fainelli flor...@openwrt.org Applied to u-boot-nand-flash next with this change: diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 0d7c819..fa286a8 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -2585,7 +2585,7 @@ static const struct nand_flash_dev *nand_get_flash_type(st type = nand_flash_ids; for (; type-name != NULL; type++) - if (dev_id == type-id) + if (*dev_id == type-id) break; My bad, thanks for fixing this and committing the patch! -- Florian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/8] orion5x: Fix wrong address in orion5x_sdram_bar
On Sat, Jan 29, 2011 at 2:24 AM, Albert ARIBAUD albert.arib...@free.fr wrote:
diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c
b/arch/arm/cpu/arm926ejs/orion5x/dram.c
index b749282..7f3a318 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/dram.c
+++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c
@@ -38,7 +38,7 @@ u32 orion5x_sdram_bar(enum memory_bank bank)
{
struct orion5x_ddr_addr_decode_registers *winregs =
(struct orion5x_ddr_addr_decode_registers *)
Please remove the 'ddr_' part of the struct name while you're at it: this
struct is not DDR specific, it also covers CPU window register.
Done.
Michael
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Re: [U-Boot] [PATCH 6/8] Add board support for TS-7800
On Sat, Jan 29, 2011 at 2:39 AM, Albert ARIBAUD albert.arib...@free.fr wrote:
Le 29/01/2011 02:00, Michael Spang a écrit :
The TS-7800 is an Orion5x implementation by Technologic Systems.
Signed-off-by: Michael Spangmsp...@csclub.uwaterloo.ca
---
MAKEALL | 1 +
board/technologic/ts7800/Makefile | 46 +++
board/technologic/ts7800/ts7800.c | 36 +
boards.cfg | 1 +
include/configs/ts7800.h | 149
+
5 files changed, 233 insertions(+), 0 deletions(-)
create mode 100644 board/technologic/ts7800/Makefile
create mode 100644 board/technologic/ts7800/ts7800.c
create mode 100644 include/configs/ts7800.h
diff --git a/MAKEALL b/MAKEALL
index a732e6a..5cd4155 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -344,6 +344,7 @@ LIST_ARM9= \
edb9315 \
edb9315a \
edminiv2 \
+ ts7800 \
guruplug \
imx27lite \
jadecpu \
diff --git a/board/technologic/ts7800/Makefile
b/board/technologic/ts7800/Makefile
new file mode 100644
index 000..d62d0f2
--- /dev/null
+++ b/board/technologic/ts7800/Makefile
@@ -0,0 +1,46 @@
+#
+# Copyright (C) 2010 Michael Spangmsp...@csclub.uwaterloo.ca
Fix copyright year (holds for the whole patchset)
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS := ts7800.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/technologic/ts7800/ts7800.c
b/board/technologic/ts7800/ts7800.c
new file mode 100644
index 000..8d4ba73
--- /dev/null
+++ b/board/technologic/ts7800/ts7800.c
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2010 Michael Spangmsp...@csclub.uwaterloo.ca
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#includecommon.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ // Technologic's MBR uses machine type 526, however the mainline
+ // machine type is 1652. Technologic's kernel sources will need
+ // patching to boot from U-Boot.
... or the machine type can be changed to 526 in the U-boot boot script
before starting the Technologic modified Linux.
Good to know, I've documented this in the README.
Michael
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Re: [U-Boot] [PATCH 0/9] TS-7800 port for U-Boot
On Thu, Mar 17, 2011 at 3:46 PM, Michael Spang msp...@csclub.uwaterloo.ca wrote: The TS-7800 is an Orion5x implementation by Technologic Systems. Albert, Wolfgang - Thanks for reviewing my patch series and sorry for the delay in updating it. Changelog: - Fixed all checkpatch errors. - Updated copyright year. - Renamed CONFIG_SKIP_LOWLEVEL_INIT to CONFIG_SKIP_CPU_INIT_CRIT and introduced new CONFIG_SKIP_LOWLEVEL_INIT that skips only lowlevel_init. - Documented machine type ID workaround in the README. - Removed ddr from name of orion5x_ddr_addr_decode_registers. - Allow the environment to override the MAC even if CONFIG_PRESERVE_LOCAL_MAC is set. This is version 2 of this series. I forgot to update the subject line. Michael ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/9] mvgbe: Support preserving the existing MAC address
The MVGBE driver either gets the MAC from the environment, or invents
one. This allows the driver to leave the existing address alone in
case it is initialized before U-Boot starts.
Signed-off-by: Michael Spang msp...@csclub.uwaterloo.ca
---
drivers/net/mvgbe.c | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c
index c701f43..bab55b3 100644
--- a/drivers/net/mvgbe.c
+++ b/drivers/net/mvgbe.c
@@ -380,6 +380,22 @@ static void port_uc_addr_set(struct mvgbe_registers *regs,
u8 * p_addr)
}
/*
+ * port_uc_addr_get - This function gets the port unicast address.
+ */
+static void port_uc_addr_get(struct mvgbe_registers *regs, u8 * p_addr)
+{
+ u32 mac_l = MVGBE_REG_RD(regs-macal);
+ u32 mac_h = MVGBE_REG_RD(regs-macah);
+
+ p_addr[0] = (mac_h 24);
+ p_addr[1] = (mac_h 16);
+ p_addr[2] = (mac_h 8);
+ p_addr[3] = (mac_h 0);
+ p_addr[4] = (mac_l 8);
+ p_addr[5] = (mac_l 0);
+}
+
+/*
* mvgbe_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory.
*/
static void mvgbe_init_rx_desc_ring(struct mvgbe_device *dmvgbe)
@@ -719,6 +735,9 @@ error1:
}
while (!eth_getenv_enetaddr(s, dev-enetaddr)) {
+#if defined(CONFIG_PRESERVE_LOCAL_MAC)
+ port_uc_addr_get(dmvgbe-regs, dmvgbe-dev.enetaddr);
+#else
/* Generate Private MAC addr if not set */
dev-enetaddr[0] = 0x02;
dev-enetaddr[1] = 0x50;
@@ -734,6 +753,7 @@ error1:
dev-enetaddr[4] = get_random_hex();
dev-enetaddr[5] = get_random_hex();
#endif
+#endif
eth_setenv_enetaddr(s, dev-enetaddr);
}
--
1.7.2.3
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[U-Boot] [PATCH 4/9] orion5x: Fix wrong address in orion5x_sdram_bar
This code intends to read the SDRAM controller base address registers
but is instead reading the CPU window base address registers. Also,
remove ddr from the name of struct orion5x_addr_decode_registers,
since it also applies to other decode registers.
Signed-off-by: Michael Spang msp...@csclub.uwaterloo.ca
---
arch/arm/cpu/arm926ejs/orion5x/dram.c |6 +++---
arch/arm/include/asm/arch-orion5x/cpu.h |2 +-
arch/arm/include/asm/arch-orion5x/orion5x.h |1 +
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c
b/arch/arm/cpu/arm926ejs/orion5x/dram.c
index b749282..b95d537 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/dram.c
+++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c
@@ -36,9 +36,9 @@ DECLARE_GLOBAL_DATA_PTR;
*/
u32 orion5x_sdram_bar(enum memory_bank bank)
{
- struct orion5x_ddr_addr_decode_registers *winregs =
- (struct orion5x_ddr_addr_decode_registers *)
- ORION5X_CPU_WIN_BASE;
+ struct orion5x_addr_decode_registers *winregs =
+ (struct orion5x_addr_decode_registers *)
+ ORION5X_SDRAM_CTRL_BASE;
u32 result = 0;
u32 enable = 0x01 winregs[bank].size;
diff --git a/arch/arm/include/asm/arch-orion5x/cpu.h
b/arch/arm/include/asm/arch-orion5x/cpu.h
index c84efaf..d43abbf 100644
--- a/arch/arm/include/asm/arch-orion5x/cpu.h
+++ b/arch/arm/include/asm/arch-orion5x/cpu.h
@@ -243,7 +243,7 @@ struct orion5x_cpu_registers {
* DDR SDRAM Controller Address Decode Registers
* Source: 88F5182 User Manual, Appendix A, section A.5.1
*/
-struct orion5x_ddr_addr_decode_registers {
+struct orion5x_addr_decode_registers {
u32 base;
u32 size;
};
diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h
b/arch/arm/include/asm/arch-orion5x/orion5x.h
index 96c2c57..95bb952 100644
--- a/arch/arm/include/asm/arch-orion5x/orion5x.h
+++ b/arch/arm/include/asm/arch-orion5x/orion5x.h
@@ -42,6 +42,7 @@
#define ORION5X_REGISTER(x)(ORION5X_REGS_PHY_BASE + x)
/* Documented registers */
+#define ORION5X_SDRAM_CTRL_BASE
(ORION5X_REGISTER(0x01500))
#define ORION5X_TWSI_BASE (ORION5X_REGISTER(0x11000))
#define ORION5X_UART0_BASE (ORION5X_REGISTER(0x12000))
#define ORION5X_UART1_BASE (ORION5X_REGISTER(0x12100))
--
1.7.2.3
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[U-Boot] [PATCH 6/9] ARM: Implement CONFIG_SKIP_LOWLEVEL_INIT for arm926ej-s
The TS-7800 needs to skip SDRAM initialization since it loads from RAM, but the CPU should still be initialized to the correct state. Thus we add an #ifdef around the call to the lowlevel_init function. Signed-off-by: Michael Spang msp...@csclub.uwaterloo.ca --- arch/arm/cpu/arm926ejs/at91/Makefile|2 ++ arch/arm/cpu/arm926ejs/davinci/Makefile |2 ++ arch/arm/cpu/arm926ejs/orion5x/Makefile |2 ++ arch/arm/cpu/arm926ejs/start.S |3 +++ 4 files changed, 9 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/at91/Makefile b/arch/arm/cpu/arm926ejs/at91/Makefile index 7fb1a0a..efe9e9bd 100644 --- a/arch/arm/cpu/arm926ejs/at91/Makefile +++ b/arch/arm/cpu/arm926ejs/at91/Makefile @@ -42,8 +42,10 @@ COBJS-y += reset.o COBJS-y+= timer.o ifndef CONFIG_SKIP_CPU_INIT_CRIT +ifndef CONFIG_SKIP_LOWLEVEL_INIT SOBJS-y:= lowlevel_init.o endif +endif SRCS:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) diff --git a/arch/arm/cpu/arm926ejs/davinci/Makefile b/arch/arm/cpu/arm926ejs/davinci/Makefile index 3442f6e..d283d61 100644 --- a/arch/arm/cpu/arm926ejs/davinci/Makefile +++ b/arch/arm/cpu/arm926ejs/davinci/Makefile @@ -37,8 +37,10 @@ COBJS-$(CONFIG_DRIVER_TI_EMAC) += lxt972.o dp83848.o et1011c.o SOBJS = reset.o ifndef CONFIG_SKIP_CPU_INIT_CRIT +ifndef CONFIG_SKIP_LOWLEVEL_INIT SOBJS += lowlevel_init.o endif +endif SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS)) diff --git a/arch/arm/cpu/arm926ejs/orion5x/Makefile b/arch/arm/cpu/arm926ejs/orion5x/Makefile index 780fe18..8045e53 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/Makefile +++ b/arch/arm/cpu/arm926ejs/orion5x/Makefile @@ -34,8 +34,10 @@ COBJS-y += dram.o COBJS-y+= timer.o ifndef CONFIG_SKIP_CPU_INIT_CRIT +ifndef CONFIG_SKIP_LOWLEVEL_INIT SOBJS := lowlevel_init.o endif +endif SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y)) diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index c0a2532..2e1d5ec 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -334,12 +334,15 @@ cpu_init_crit: orr r0, r0, #0x1000 /* set bit 12 (I) I-Cache */ mcr p15, 0, r0, c1, c0, 0 +#ifndef CONFIG_SKIP_LOWLEVEL_INIT /* * Go setup Memory and board specific bits prior to relocation. */ mov ip, lr /* perserve link reg across call */ bl lowlevel_init /* go setup pll,mux,memory */ mov lr, ip /* restore link */ +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ + mov pc, lr /* back to my caller */ #endif /* CONFIG_SKIP_CPU_INIT_CRIT */ -- 1.7.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 9/9] Add README for TS-7800
Signed-off-by: Michael Spang msp...@csclub.uwaterloo.ca
---
doc/README.ts7800 | 84 +
1 files changed, 84 insertions(+), 0 deletions(-)
create mode 100644 doc/README.ts7800
diff --git a/doc/README.ts7800 b/doc/README.ts7800
new file mode 100644
index 000..6a6ab94
--- /dev/null
+++ b/doc/README.ts7800
@@ -0,0 +1,84 @@
+Booting
+---
+
+The TS-7800 boots initially from a proprietary bootloader on the FPGA
+called TS-BOOTROM. TS-BOOTROM loads a small image from the MBR of the
+onboard NAND or SD card into RAM, and executes it. The default MBR is
+intended to boot a Linux kernel.
+
+The TS-7800 port of U-Boot takes the place of the Linux kernel in this
+configuration, and is therefore loaded and executed by the MBR. The
+MBR also creates an ATAG structure intended for Linux, but U-Boot
+ignores it.
+
+NAND layout
+---
+
+NAND support is not enabled by default because U-Boot will overwrite
+part of it with its environment. To enable NAND support, enable
+CONFIG_USE_NAND in include/configs/ts7800.h.
+
+The default NAND partition layout used by Technologic and Linux is:
+
+128k(mbr),4m(linux),4m(initrd),-(rootfs)
+
+For U-Boot, we split the linux partition into a partition for the
+U-Boot code and a partition for the U-Boot environment. The initrd
+partition is not used, and is renamed to linux. The new layout is:
+
+128k(mbr),3m(uboot),1m(env),4m(linux),-(rootfs)
+
+When NAND support is enabled, this string is available in the U-Boot
+default environment as the mtdparts variable. You may wish to use
+this layout for Linux as well by adding it to the Linux command line.
+For example:
+
+setenv bootargs console=ttyS0,115200n8 ${mtdparts}
+
+Installing U-Boot
+-
+
+To install U-Boot to the onboard flash, write u-boot.bin to the kernel
+partition on the flash. From Linux this might be done as follows:
+
+ flash_eraseall /dev/mtd1
+ nandwrite --pad /dev/mtd1 u-boot.bin
+
+When running from onboard flash, you may wish to enable NAND support
+as described in the previous section. The environment is not preserved
+unless you enable NAND support.
+
+To install U-Boot to an SD card, write u-boot.bin to the kernel
+partition on the card.
+
+Booting Technologic Kernels
+---
+
+Technologic's kernels use a different machine type ID than upstream
+kernels. U-Boot uses the upstream ID, so Technologic kernels will
+not boot from U-Boot without the following workaround:
+
+ setenv machid 0x20e
+
+The following commands will convert a Technologic kernel image
+into U-Boot format:
+
+ mkimage -A arm -O linux -T kernel -C none -a 0x8000 \
+-d kernel-image-latest.dd uImage
+
+ mkimage -A arm -O linux -T ramdisk -C none -a 0x100 \
+-d initrd-busybox-rootfs-latest.dd initrd
+
+Then pass both images to the bootm command to boot. Note that with
+U-Boot installed there is only one partition available for the kernel
+and initrd. To use both changing the NAND partitioning may be
+required. To do so you can use the mtdparts command in U-Boot and pass
+${mtdparts} to linux.
+
+TS-7800 Wiki
+
+
+A useful resource about the TS-7800 is the TS-7800 wiki [1],
+maintained by Alexander Clouter.
+
+[1] http://www.digriz.org.uk/ts78xx
--
1.7.2.3
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[U-Boot] [PATCH 1/9] arm926ej-s: Invalidate instruction cache in flush_cache
If U-Boot is loaded from RAM and the OS is loaded into an overlapping region, the instruction cache is not coherent when that OS is started. We must therefore invalidate the instruction cache in addition to cleaning the data cache. Signed-off-by: Michael Spang msp...@csclub.uwaterloo.ca --- arch/arm/lib/cache.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index 30686fe..047786a 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -37,6 +37,8 @@ void flush_cache (unsigned long dummy1, unsigned long dummy2) asm(0: mrc p15, 0, r15, c7, c10, 3\n\t bne 0b\n : : : memory); /* disable write buffer as well (page 2-22) */ asm(mcr p15, 0, %0, c7, c10, 4 : : r (0)); + /* invalidate icache for coherence with cleaned dcache */ + asm(mcr p15, 0, %0, c7, c5, 0 : : r (0)); #endif #ifdef CONFIG_OMAP34XX void v7_flush_cache_all(void); -- 1.7.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 8/9] Add NAND support for TS-7800
The NAND control functions were written by Alexander Clouter and
copied here from Linux.
Signed-off-by: Michael Spang msp...@csclub.uwaterloo.ca
---
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/ts7800_nand.c | 68
include/configs/ts7800.h | 47 ++--
3 files changed, 113 insertions(+), 3 deletions(-)
create mode 100644 drivers/mtd/nand/ts7800_nand.c
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b598f6..897e6c2 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -49,6 +49,7 @@ COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o
COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
+COBJS-$(CONFIG_NAND_TS7800) += ts7800_nand.o
COBJS-$(CONFIG_NAND_PLAT) += nand_plat.o
endif
diff --git a/drivers/mtd/nand/ts7800_nand.c b/drivers/mtd/nand/ts7800_nand.c
new file mode 100644
index 000..8b9fe0c
--- /dev/null
+++ b/drivers/mtd/nand/ts7800_nand.c
@@ -0,0 +1,68 @@
+/*
+ * Based on arch/arm/mach-orion5x/ts78xx-setup.c from Linux
+ * by Alexander Clouter a...@digriz.org.uk.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include nand.h
+
+/*
+ * hardware specific access to control-lines
+ *
+ * ctrl:
+ * NAND_NCE: bit 0 - bit 2
+ * NAND_CLE: bit 1 - bit 1
+ * NAND_ALE: bit 2 - bit 0
+ */
+static void ts78xx_ts_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
+ unsigned int ctrl)
+{
+ struct nand_chip *this = mtd-priv;
+
+ if (ctrl NAND_CTRL_CHANGE) {
+ unsigned char bits;
+
+ bits = (ctrl NAND_NCE) 2;
+ bits |= ctrl NAND_CLE;
+ bits |= (ctrl NAND_ALE) 2;
+
+ writeb((readb(TS_NAND_CTRL) ~0x7) | bits, TS_NAND_CTRL);
+ }
+
+ if (cmd != NAND_CMD_NONE)
+ writeb(cmd, this-IO_ADDR_W);
+}
+
+static int ts78xx_ts_nand_dev_ready(struct mtd_info *mtd)
+{
+ return readb(TS_NAND_CTRL) 0x20;
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+ nand-options = NAND_USE_FLASH_BBT;
+ nand-ecc.mode = NAND_ECC_SOFT;
+ nand-cmd_ctrl = ts78xx_ts_nand_cmd_ctrl;
+ nand-dev_ready = ts78xx_ts_nand_dev_ready;
+ nand-chip_delay = 15;
+ return 0;
+}
diff --git a/include/configs/ts7800.h b/include/configs/ts7800.h
index c07d132..0d8cc10 100644
--- a/include/configs/ts7800.h
+++ b/include/configs/ts7800.h
@@ -33,10 +33,11 @@
#define CONFIG_BOOTDELAY 3
/*
- * Flash Driver
+ * Flash Configuration
*/
-#define CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_NO_FLASH/* TS-7800 has only NAND flash */
+#define CONFIG_USE_NAND0 /* Disable NAND by default */
/*
* Commands Configuration
@@ -46,6 +47,11 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_MII
+#if CONFIG_USE_NAND
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_MTDPARTS
+#endif
+
/*
* Serial Port Configuration
*/
@@ -57,9 +63,21 @@
* Environment Configuration
*/
-#define CONFIG_ENV_IS_NOWHERE 1
+#if CONFIG_USE_NAND
+
+#define CONFIG_ENV_IS_IN_NAND
+
+#define CONFIG_ENV_OFFSET 0x0032 /* 128k(mbr) + 3m(kernel) */
+#define CONFIG_ENV_SIZE0x0002 /* 128k */
+#define CONFIG_ENV_RANGE 0x0010 /* 1m(env) */
+
+#else
+
+#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_SIZE0x2000
+#endif
+
/*
* Limits
*/
@@ -112,6 +130,29 @@
#define CONFIG_SYS_MEMTEST_START 0x1000
#define CONFIG_SYS_MEMTEST_END 0x07e0
+#define ORION5X_ADR_PCI_MEM0xe800 /* Match Linux (FPGA) */
+#define ORION5X_SZ_PCI_MEM 0x0800
+
+/*
+ * Flash Driver
+ */
+
+#ifdef CONFIG_CMD_NAND
+
+#define TS_NAND_CTRL 0xe8000800
+#define TS_NAND_DATA 0xe8000804
+
+#define CONFIG_NAND_TS7800
+#define CONFIG_SYS_NAND_BASE TS_NAND_DATA
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+
+#define CONFIG_MTD_DEVICE
+#define MTDIDS_DEFAULT nand0=gen_nand
+#define MTDPARTS_DEFAULT \
+ mtdparts=gen_nand:128k(mbr),3m(uboot),1m(env),4m(linux),-(rootfs)
+
+#endif
+
/*
* UART Driver
*/
--
1.7.2.3
[U-Boot] [PATCH 3/9] orion5x: Increase maximum bank size to 128M
The TS-7800 has one 128M RAM bank, so the maximum must be increased. Signed-off-by: Michael Spang msp...@csclub.uwaterloo.ca --- arch/arm/include/asm/arch-orion5x/orion5x.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h b/arch/arm/include/asm/arch-orion5x/orion5x.h index e3d3f76..96c2c57 100644 --- a/arch/arm/include/asm/arch-orion5x/orion5x.h +++ b/arch/arm/include/asm/arch-orion5x/orion5x.h @@ -63,7 +63,7 @@ #define MAX_MVGBE_DEVS 1 #define MVGBE0_BASEORION5X_EGIGA_BASE -#define CONFIG_MAX_RAM_BANK_SIZE (64*1024*1024) +#define CONFIG_MAX_RAM_BANK_SIZE (128*1024*1024) /* include here SoC variants. 5181, 5281, 6183 should go here when adding support for them, and this comment should then be updated. */ -- 1.7.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/9] TS-7800 port for U-Boot
The TS-7800 is an Orion5x implementation by Technologic Systems. Albert, Wolfgang - Thanks for reviewing my patch series and sorry for the delay in updating it. Changelog: - Fixed all checkpatch errors. - Updated copyright year. - Renamed CONFIG_SKIP_LOWLEVEL_INIT to CONFIG_SKIP_CPU_INIT_CRIT and introduced new CONFIG_SKIP_LOWLEVEL_INIT that skips only lowlevel_init. - Documented machine type ID workaround in the README. - Removed ddr from name of orion5x_ddr_addr_decode_registers. - Allow the environment to override the MAC even if CONFIG_PRESERVE_LOCAL_MAC is set. Michael Spang (9): arm926ej-s: Invalidate instruction cache in flush_cache mvgbe: Support preserving the existing MAC address orion5x: Increase maximum bank size to 128M orion5x: Fix wrong address in orion5x_sdram_bar ARM: Rename CONFIG_SKIP_LOWLEVEL_INIT to CONFIG_SKIP_CPU_INIT_CRIT ARM: Implement CONFIG_SKIP_LOWLEVEL_INIT for arm926ej-s Add board support for TS-7800 Add NAND support for TS-7800 Add README for TS-7800 MAKEALL |1 + Makefile|2 +- README |8 +- arch/arm/cpu/arm1136/start.S|6 +- arch/arm/cpu/arm720t/start.S|2 +- arch/arm/cpu/arm920t/at91/lowlevel_init.S |4 +- arch/arm/cpu/arm920t/at91rm9200/lowlevel_init.S |4 +- arch/arm/cpu/arm920t/ks8695/lowlevel_init.S |4 +- arch/arm/cpu/arm920t/start.S|6 +- arch/arm/cpu/arm925t/start.S|2 +- arch/arm/cpu/arm926ejs/at91/Makefile|2 + arch/arm/cpu/arm926ejs/davinci/Makefile |2 + arch/arm/cpu/arm926ejs/orion5x/Makefile |2 + arch/arm/cpu/arm926ejs/orion5x/dram.c |6 +- arch/arm/cpu/arm926ejs/start.S |9 +- arch/arm/cpu/arm946es/start.S |4 +- arch/arm/cpu/arm_intcm/start.S |4 +- arch/arm/cpu/armv7/start.S |2 +- arch/arm/cpu/lh7a40x/start.S|2 +- arch/arm/cpu/s3c44b0/start.S|2 +- arch/arm/cpu/sa1100/start.S |2 +- arch/arm/include/asm/arch-orion5x/cpu.h |2 +- arch/arm/include/asm/arch-orion5x/orion5x.h |3 +- arch/arm/lib/cache.c|2 + board/ns9750dev/lowlevel_init.S |6 +- board/technologic/ts7800/Makefile | 46 ++ board/technologic/ts7800/ts7800.c | 36 + boards.cfg |1 + doc/README.ts7800 | 84 ++ drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/ts7800_nand.c | 68 drivers/net/mvgbe.c | 20 +++ include/common.h|2 +- include/configs/SMN42.h |2 +- include/configs/a320evb.h |2 +- include/configs/afeb9260.h |2 +- include/configs/armadillo.h |2 +- include/configs/aspenite.h |2 +- include/configs/at91cap9adk.h |2 +- include/configs/at91rm9200dk.h | 12 +- include/configs/at91rm9200ek.h |6 +- include/configs/at91sam9260ek.h |2 +- include/configs/at91sam9261ek.h |2 +- include/configs/at91sam9263ek.h |4 +- include/configs/at91sam9m10g45ek.h |2 +- include/configs/at91sam9rlek.h |2 +- include/configs/cmc_pu2.h |4 +- include/configs/colibri_pxa270.h|2 +- include/configs/cpuat91.h |6 +- include/configs/csb637.h|4 +- include/configs/da830evm.h |2 +- include/configs/da850evm.h |2 +- include/configs/davinci_dm355evm.h |2 +- include/configs/davinci_dm355leopard.h |2 +- include/configs/davinci_dm365evm.h |2 +- include/configs/davinci_dm6467evm.h |2 +- include/configs/davinci_dvevm.h |6 +- include/configs/davinci_schmoogie.h |2 +- include/configs/davinci_sffsdr.h|2 +- include/configs/davinci_sonata.h|6 +- include/configs/dkb.h |2 +- include/configs/dnp1110.h |2 +- include/configs/dockstar.h |2 +- include/configs/ea20.h |2 +- include/configs/evb4510.h |2 +- include/configs/gcplus.h|4 +- include/configs/guruplug.h |
[U-Boot] [PATCH 7/9] Add board support for TS-7800
The TS-7800 is an Orion5x implementation by Technologic Systems.
Signed-off-by: Michael Spang msp...@csclub.uwaterloo.ca
---
MAKEALL |1 +
board/technologic/ts7800/Makefile | 46 +++
board/technologic/ts7800/ts7800.c | 36 +
boards.cfg|1 +
include/configs/ts7800.h | 152 +
5 files changed, 236 insertions(+), 0 deletions(-)
create mode 100644 board/technologic/ts7800/Makefile
create mode 100644 board/technologic/ts7800/ts7800.c
create mode 100644 include/configs/ts7800.h
diff --git a/MAKEALL b/MAKEALL
index a732e6a..5cd4155 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -344,6 +344,7 @@ LIST_ARM9= \
edb9315 \
edb9315a\
edminiv2\
+ ts7800 \
guruplug\
imx27lite \
jadecpu \
diff --git a/board/technologic/ts7800/Makefile
b/board/technologic/ts7800/Makefile
new file mode 100644
index 000..3a02b04
--- /dev/null
+++ b/board/technologic/ts7800/Makefile
@@ -0,0 +1,46 @@
+#
+# Copyright (C) 2010-2011 Michael Spang msp...@csclub.uwaterloo.ca
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := ts7800.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/technologic/ts7800/ts7800.c
b/board/technologic/ts7800/ts7800.c
new file mode 100644
index 000..4937436
--- /dev/null
+++ b/board/technologic/ts7800/ts7800.c
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2010-2011 Michael Spang msp...@csclub.uwaterloo.ca
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include common.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ /* Technologic's MBR uses machine type 526, however the mainline
+ machine type is 1652. Set the machtype environment variable
+ to 526 to boot Technologic kernels. */
+ gd-bd-bi_arch_number = MACH_TYPE_TS78XX;
+ gd-bd-bi_boot_params = 0x100;
+
+ return 0;
+}
diff --git a/boards.cfg b/boards.cfg
index 45c3102..b9d7939 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -106,6 +106,7 @@ magnesiumarm arm926ejs
imx27lite logicpd
omap5912osk arm arm926ejs - ti
omap
edminiv2 arm arm926ejs - LaCie
orion5x
dkb arm arm926ejs -
Marvellpantheon
+ts7800 arm arm926ejs -
technologicorion5x
ca9x4_ct_vxp arm armv7 vexpressarmltd
efikamx arm armv7 efikamx -
mx5
mx51evk arm armv7 mx51evk
freescale mx5
diff --git a/include/configs/ts7800.h b/include/configs/ts7800.h
new
[U-Boot] [PATCH 5/9] ARM: Rename CONFIG_SKIP_LOWLEVEL_INIT to CONFIG_SKIP_CPU_INIT_CRIT
For ARM, the CONFIG_SKIP_LOWLEVEL_INIT option implies that the cpu_init_crit and lowlevel_init assembly functions are skipped. We may want to skip only lowlevel_init, so rename the option that skips both to CONFIG_SKIP_CPU_INIT_CRIT. The MIPS option of the same name is not renamed. Signed-off-by: Michael Spang msp...@csclub.uwaterloo.ca --- Makefile|2 +- README |8 +++- arch/arm/cpu/arm1136/start.S|6 +++--- arch/arm/cpu/arm720t/start.S|2 +- arch/arm/cpu/arm920t/at91/lowlevel_init.S |4 ++-- arch/arm/cpu/arm920t/at91rm9200/lowlevel_init.S |4 ++-- arch/arm/cpu/arm920t/ks8695/lowlevel_init.S |4 ++-- arch/arm/cpu/arm920t/start.S|6 +++--- arch/arm/cpu/arm925t/start.S|2 +- arch/arm/cpu/arm926ejs/at91/Makefile|2 +- arch/arm/cpu/arm926ejs/davinci/Makefile |2 +- arch/arm/cpu/arm926ejs/orion5x/Makefile |2 +- arch/arm/cpu/arm926ejs/start.S |6 +++--- arch/arm/cpu/arm946es/start.S |4 ++-- arch/arm/cpu/arm_intcm/start.S |4 ++-- arch/arm/cpu/armv7/start.S |2 +- arch/arm/cpu/lh7a40x/start.S|2 +- arch/arm/cpu/s3c44b0/start.S|2 +- arch/arm/cpu/sa1100/start.S |2 +- board/ns9750dev/lowlevel_init.S |6 +++--- include/common.h|2 +- include/configs/SMN42.h |2 +- include/configs/a320evb.h |2 +- include/configs/afeb9260.h |2 +- include/configs/armadillo.h |2 +- include/configs/aspenite.h |2 +- include/configs/at91cap9adk.h |2 +- include/configs/at91rm9200dk.h | 12 ++-- include/configs/at91rm9200ek.h |6 +++--- include/configs/at91sam9260ek.h |2 +- include/configs/at91sam9261ek.h |2 +- include/configs/at91sam9263ek.h |4 ++-- include/configs/at91sam9m10g45ek.h |2 +- include/configs/at91sam9rlek.h |2 +- include/configs/cmc_pu2.h |4 ++-- include/configs/colibri_pxa270.h|2 +- include/configs/cpuat91.h |6 +++--- include/configs/csb637.h|4 ++-- include/configs/da830evm.h |2 +- include/configs/da850evm.h |2 +- include/configs/davinci_dm355evm.h |2 +- include/configs/davinci_dm355leopard.h |2 +- include/configs/davinci_dm365evm.h |2 +- include/configs/davinci_dm6467evm.h |2 +- include/configs/davinci_dvevm.h |6 +++--- include/configs/davinci_schmoogie.h |2 +- include/configs/davinci_sffsdr.h|2 +- include/configs/davinci_sonata.h|6 +++--- include/configs/dkb.h |2 +- include/configs/dnp1110.h |2 +- include/configs/dockstar.h |2 +- include/configs/ea20.h |2 +- include/configs/evb4510.h |2 +- include/configs/gcplus.h|4 ++-- include/configs/guruplug.h |2 +- include/configs/hawkboard.h |2 +- include/configs/integratorap.h |2 +- include/configs/integratorcp.h |6 +++--- include/configs/kb9202.h|2 +- include/configs/km_arm.h|2 +- include/configs/lpc2292sodimm.h |2 +- include/configs/meesc.h |2 +- include/configs/mp2usb.h|4 ++-- include/configs/mv88f6281gtw_ge.h |2 +- include/configs/mx31pdk.h |2 +- include/configs/nhk8815.h |2 +- include/configs/openrd_base.h |2 +- include/configs/otc570.h|2 +- include/configs/pm9261.h|2 +- include/configs/pm9263.h|2 +- include/configs/pm9g45.h|2 +- include/configs/pxa255_idp.h|2 +- include/configs/rd6281a.h |2 +- include/configs/sbc2410x.h |2 +- include/configs/sbc35_a9g20.h |2 +- include/configs/shannon.h |2 +- include/configs/sheevaplug.h|2 +- include/configs/tegra2-common.h
