Re: [U-Boot] [PATCH v5 20/25] da850: Add README.da850
On Tuesday 28 August 2012 04:48 AM, Tom Rini wrote: This file documents when to build for da850evm and when to build for da850_am18xxevm. It also documents how to write the u-boot.ais file to persistent storage (such as SPI), in some cases as well as how to write a recovery image. Signed-off-by: Tom Rini tr...@ti.com Acked-by: Prabhakar Lad prabhakar@ti.com Regards, --Prabhakar --- Changes in v2: - Add README.da850_am18xxevm Changes in v3: - Fix thinko, Nand - SPI (spotted by Prabhakar Lad) - Rename to README.da850, add more direct recovery method (Christian Riesch) Changes in v4: - Further re-word README.da850 based on feedback from Christian Riesch board/davinci/da8xxevm/README.da850 | 68 +++ 1 file changed, 68 insertions(+) create mode 100644 board/davinci/da8xxevm/README.da850 diff --git a/board/davinci/da8xxevm/README.da850 b/board/davinci/da8xxevm/README.da850 new file mode 100644 index 000..621a95d --- /dev/null +++ b/board/davinci/da8xxevm/README.da850 @@ -0,0 +1,68 @@ +Summary +=== +The README is for the boot procedure used for various DA850 (or compatible +parts such as the AM1808) based boards. + +In the context of U-Boot, the board is booted in three stages. The initial +bootloader which executes upon reset is the ROM Boot Loader (RBL) and sits +in the internal ROM. The RBL initializes the internal memory and then +depending on the exact board and pin configurations will initialize another +controller (such as SPI or NAND) to continue the boot process by loading +the secondary program loader (SPL). The SPL will initialize the system +further (some clocks, SDRAM) and then load the full u-boot from a +predefined location in persistent storage to DDR and jumps to the u-boot +entry point. + +AIS is an image format defined by TI for the images that are to be loaded +to memory by the RBL. The image is divided into a series of sections and +the image's entry point is specified. Each section comes with meta data +like the target address the section is to be copied to and the size of the +section, which is used by the RBL to load the image. At the end of the +image the RBL jumps to the image entry point. The AIS format allows for +other things such as programming the clocks and SDRAM if the header is +programmed for it. We do not take advantage of this and instead use SPL as +it allows for additional flexibility (run-time detect of board revision, +loading the next image from a different media, etc). + + +Compilation +=== +The exact build target you need will depend on the board you have. For +Logic PD boards, or other boards which store the ethernet MAC address at +the end of SPI flash, run 'make da850evm'. For boards which store the +ethernet MAC address in the i2c EEPROM located at 0x50, run +'make da850_am18xxevm'. Once this build completes you will have a +u-boot.ais file that needs to be written to the correct persistent +storage. + + +Flashing the images to SPI +== +The AIS image can be written to SPI flash using the following commands. +Assuming that the network is configured and enabled and the u-boot.ais file +is tftp'able. + +U-Boot sf probe 0 +U-Boot sf erase 0 +32 +U-Boot tftp u-boot.ais +U-Boot sf write c070 0 $filesize + + +Recovery + + +In the case of a bricked board, you need to use the TI tools found +here[1] to write the u-boot.ais file. An example of recovering to the SPI +flash of an AM1808 would be: + +$ mono sfh_OMAP-L138.exe -targetType AM1808 -p /dev/ttyUSB0 \ + -flash_noubl /path/to/u-boot.ais + +For other target types and flash locations: + +$ mono sfh_OMAP-L138.exe -h + +Links += +[1] + http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L137 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 8/9] OMAP3: video: add macros to set display parameters
On 29/08/2012 00:29, Tom Rini wrote:
On 08/28/2012 03:22 PM, Jeroen Hofstee wrote:
On 08/28/2012 02:21 PM, Stefano Babic wrote:
Add a common macros to set the registers for horizontal
and vertical timing.
Signed-off-by: Stefano Babic sba...@denx.de
---
arch/arm/include/asm/arch-omap3/dss.h |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap3/dss.h
b/arch/arm/include/asm/arch-omap3/dss.h
index 8913a71..df5b978 100644
--- a/arch/arm/include/asm/arch-omap3/dss.h
+++ b/arch/arm/include/asm/arch-omap3/dss.h
@@ -181,6 +181,10 @@ struct panel_config {
void *frame_buffer;
};
+#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) 20) | \
+ ((fp - 1) 8) | (sw - 1))
+#define PANEL_TIMING_V(bp, fp, sw) ((bp 20) | (fp 8) | (sw - 1))
+
/* Generic DSS Functions */
void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
u32 height, u32 width);
To make it a bit more clear what is set, perhaps we can define
the fields themselves, this would save some /* hfp */ etc.
e.g.
diff --git a/arch/arm/include/asm/arch-omap3/dss.h
b/arch/arm/include/asm/arch-omap3/dss.h
index a830c43..b6ad72d 100644
--- a/arch/arm/include/asm/arch-omap3/dss.h
+++ b/arch/arm/include/asm/arch-omap3/dss.h
@@ -182,6 +182,13 @@ struct panel_config {
void *frame_buffer;
};
+#define DSS_HPB(bp)(((bp) - 1) 20)
+#define DSS_HFB(fp)(((fp) - 1) 8)
+#define DSS_HSW(sw)((sw) - 1)
+#define DSS_VPB(bp)((bp) 20)
+#define DSS_VFB(fp)((fp) 8)
+#define DSS_VSW(sw)((sw) - 1)
+
/* Generic DSS Functions */
void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
u32 height, u32 width);
Looks helpful to me, please make it so, thanks!
Done in V3 !
Stefano
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Re: [U-Boot] [PATCH] M28: Fix the use of gpmi-nand in mtdparts
On 29/08/2012 03:12, Marek Vasut wrote: The mtd name of the NAND in Linux is gpmi-nand, not gpmi-nand.0 as it would be expected, since the controller doesn't support multiple NANDs attached to it as of now. Rectify this flub by adjusting default mtdparts. Signed-off-by: Marek Vasut ma...@denx.de Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sba...@denx.de Cc: Otavio Salvador ota...@ossystems.com.br --- include/configs/m28evk.h |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index d5cd5a8..40df437 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -172,9 +172,9 @@ #define CONFIG_LZO #define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS -#define MTDIDS_DEFAULT nand0=gpmi-nand.0 +#define MTDIDS_DEFAULT nand0=gpmi-nand #define MTDPARTS_DEFAULT\ - mtdparts=gpmi-nand.0: \ + mtdparts=gpmi-nand: \ 3m(bootloader)ro, \ 512k(environment),\ 512k(redundant-environment), \ Acked-by: Stefano Babic sba...@denx.de Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] MX28: Cleanup mxsboot within make mrproper
On 29/08/2012 03:15, Marek Vasut wrote:
Delete the mxsboot binary if make mrproper is called.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Fabio Estevam feste...@gmail.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Makefile |1 +
1 file changed, 1 insertion(+)
diff --git a/Makefile b/Makefile
index ce40ab3..9e9d57c 100644
--- a/Makefile
+++ b/Makefile
@@ -755,6 +755,7 @@ clean:
$(obj)tools/gen_eth_addr$(obj)tools/img2srec \
$(obj)tools/mk{env,}image $(obj)tools/mpc86x_clk \
$(obj)tools/mk{smdk5250,}spl \
+$(obj)tools/mxsboot\
$(obj)tools/ncb $(obj)tools/ubsha1
@rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image}\
$(obj)board/matrix_vision/*/bootscript.img \
Acked-by: Stefano Babic sba...@denx.de
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH 2/2] MX28: Fixup the ad-hoc use of DIGCTL_MICROSECONDS
On 29/08/2012 03:15, Marek Vasut wrote:
Use proper struct-based access for this register in the SPL code.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Fabio Estevam feste...@freescale.com
---
arch/arm/cpu/arm926ejs/mxs/spl_boot.c |8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index ddafddb..ad66c57 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -38,12 +38,14 @@
* takes a few seconds to roll. The boot doesn't take that long, so to keep
the
* code simple, it doesn't take rolling into consideration.
*/
-#define HW_DIGCTRL_MICROSECONDS 0x8001c0c0
void early_delay(int delay)
{
- uint32_t st = readl(HW_DIGCTRL_MICROSECONDS);
+ struct mxs_digctl_regs *digctl_regs =
+ (struct mxs_digctl_regs *)MXS_DIGCTL_BASE;
+
+ uint32_t st = readl(digctl_regs-hw_digctl_microseconds);
st += delay;
- while (st readl(HW_DIGCTRL_MICROSECONDS))
+ while (st readl(digctl_regs-hw_digctl_microseconds))
;
}
Acked-by: Stefano Babic sba...@denx.de
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH 1/2] MX28: Add CONFIG_MX28_DEBUG
On 29/08/2012 03:14, Marek Vasut wrote:
This functionality allows configuring SCRATCH0 and SCRATCH1 registers
to special values, which make the SPL hang after the CPU was properly
initialized.
This is for bootstrap purposes only and MUST BE DISABLED for normal
operation.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
---
Hi Marek,
arch/arm/cpu/arm926ejs/mxs/Makefile|3 ++
arch/arm/cpu/arm926ejs/mxs/mxs_init.h |6 +++
arch/arm/cpu/arm926ejs/mxs/spl_boot.c |2 +
arch/arm/cpu/arm926ejs/mxs/spl_debug.c | 63
4 files changed, 74 insertions(+)
create mode 100644 arch/arm/cpu/arm926ejs/mxs/spl_debug.c
diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile
b/arch/arm/cpu/arm926ejs/mxs/Makefile
index eeecf89..e75eabd 100644
--- a/arch/arm/cpu/arm926ejs/mxs/Makefile
+++ b/arch/arm/cpu/arm926ejs/mxs/Makefile
@@ -29,6 +29,9 @@ COBJS = clock.o mxs.o iomux.o timer.o
ifdefCONFIG_SPL_BUILD
COBJS+= spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
+ifdefCONFIG_MX28_DEBUG
+COBJS+= spl_debug.o
+endif
endif
SRCS := $(START:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
index 2ddc5bc..e6f837c 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
@@ -42,4 +42,10 @@ uint32_t mxs_mem_get_size(void);
void mxs_lradc_init(void);
void mxs_lradc_enable_batt_measurement(void);
+#ifdef CONFIG_MX28_DEBUG
+void mx28_common_spl_debug_halt(void);
+#else
+static inline void mx28_common_spl_debug_halt(void) {}
+#endif
+
#endif /* __M28_INIT_H__ */
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index ad66c57..f4f0c09 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -108,6 +108,8 @@ void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
data-boot_mode_idx = bootmode;
+ mx28_common_spl_debug_halt();
+
mxs_power_wait_pswitch();
}
I admit I use the same trick when the first initialization fails and I
want to check what happens. Make the SOC hanging helps, sure.
However, this is part of the porting / development. Why should we
introduce this code into mainline ? In the official configuration file
CONFIG_MX28_DEBUG must be off, and then all this stuff is dead code.
Regards,
Stefano
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[U-Boot] [PATCH v3 0/6] Code cleaup for trats and universal
This patch fixes SDRAM configuration and size visibility fot Trats board. Code for MMC initialisation is moved from board file to pinmux. MMC0 and MMC2 are supported. Both tested on Trats and Universal C210 boards. MMC initialisation for boards Trats and Universal C210 is done using pinmux. Low level initialisation in u-boot is eliminated as it done by another bootloader. Piotr Wilczek (6): arm:exynos4:trats: Correct SDRAM configuration for trats arm:exynos4:trats: Fix SDRAM size arm:exynos4:pinmux: Modify the gpio function for mmc arm:exynos4:trats: Use pinmux for mmc configuration arm:exynos4:universal: Use pinmux for mmc configuration arm:exynos4:universal: Eliminated low level init arch/arm/cpu/armv7/exynos/pinmux.c | 56 arch/arm/include/asm/arch-exynos/periph.h|1 + board/samsung/trats/trats.c | 76 ++ board/samsung/universal_c210/Makefile|1 - board/samsung/universal_c210/lowlevel_init.S | 395 -- board/samsung/universal_c210/universal.c | 81 ++ include/configs/s5pc210_universal.h |2 + include/configs/trats.h | 17 +- 8 files changed, 112 insertions(+), 517 deletions(-) delete mode 100644 board/samsung/universal_c210/lowlevel_init.S -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/6] arm:exynos4:trats: Correct SDRAM configuration for trats
SDRAM setup alike to ORIGEN Dev board. Signed-off-by: Piotr Wilczek p.wilc...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com CC: Minkyu Kang mk7.k...@samsung.com --- Changes for v2: - no changes Changes for v3: - no changes include/configs/trats.h | 17 +++-- 1 files changed, 11 insertions(+), 6 deletions(-) diff --git a/include/configs/trats.h b/include/configs/trats.h index 185cb68..f391227 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -170,12 +170,17 @@ /* Stack sizes */ #define CONFIG_STACKSIZE (256 10) /* regular stack 256KB */ -/* TRATS has 2 banks of DRAM */ -#define CONFIG_NR_DRAM_BANKS 2 -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */ -#define PHYS_SDRAM_1_SIZE (512 20) /* 512 MB in CS 0 */ -#define PHYS_SDRAM_2 0x5000 /* LPDDR2 DMC 1 */ -#define PHYS_SDRAM_2_SIZE (512 20) /* 512 MB in CS 0 */ +/* TRATS has 4 banks of DRAM */ +#define CONFIG_NR_DRAM_BANKS 4 +#define SDRAM_BANK_SIZE(256UL 20UL) /* 256 MB */ +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) +#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE +#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE #define CONFIG_SYS_MEM_TOP_HIDE(1 20) /* ram console */ -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/6] arm:exynos4:trats: Fix SDRAM size
Full 1GiB is visible
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
Changes for v2:
- no chages
Changes for v3:
- no changes
board/samsung/trats/trats.c |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index a8b2b11..f5df56c 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -76,7 +76,9 @@ int board_init(void)
int dram_init(void)
{
gd-ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
+ get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
+ get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
return 0;
}
@@ -87,6 +89,10 @@ void dram_init_banksize(void)
gd-bd-bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd-bd-bi_dram[1].start = PHYS_SDRAM_2;
gd-bd-bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+ gd-bd-bi_dram[2].start = PHYS_SDRAM_3;
+ gd-bd-bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+ gd-bd-bi_dram[3].start = PHYS_SDRAM_4;
+ gd-bd-bi_dram[3].size = PHYS_SDRAM_4_SIZE;
}
static unsigned int get_hw_revision(void)
--
1.7.5.4
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[U-Boot] [PATCH v3 4/6] arm:exynos4:trats: Use pinmux for mmc configuration
This patch use the pinmux for mmc configuration for Trats
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
Changes for v2:
- mmc initialisation using pinmux
Changes for v3:
- init SD card also when eMMC init failed
board/samsung/trats/trats.c | 68 +++---
1 files changed, 12 insertions(+), 56 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index f5df56c..84b7430 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -29,6 +29,7 @@
#include asm/arch/cpu.h
#include asm/arch/gpio.h
#include asm/arch/mmc.h
+#include asm/arch/pinmux.h
#include asm/arch/clock.h
#include asm/arch/clk.h
#include asm/arch/mipi_dsim.h
@@ -140,54 +141,22 @@ int board_mmc_init(bd_t *bis)
{
struct exynos4_gpio_part2 *gpio =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
- int i, err;
+ int err;
/* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
s5p_gpio_direction_output(gpio-k0, 2, 1);
s5p_gpio_set_pull(gpio-k0, 2, GPIO_PULL_NONE);
/*
-* eMMC GPIO:
-* SDR 8-bit@48MHz at MMC0
-* GPK0[0] SD_0_CLK(2)
-* GPK0[1] SD_0_CMD(2)
-* GPK0[2] SD_0_CDn- Not used
-* GPK0[3:6]SD_0_DATA[0:3](2)
-* GPK1[3:6]SD_0_DATA[0:3](3)
-*
-* DDR 4-bit@26MHz at MMC4
-* GPK0[0] SD_4_CLK(3)
-* GPK0[1] SD_4_CMD(3)
-* GPK0[2] SD_4_CDn- Not used
-* GPK0[3:6]SD_4_DATA[0:3](3)
-* GPK1[3:6]SD_4_DATA[4:7](4)
-*/
- for (i = 0; i 7; i++) {
- if (i == 2)
- continue;
- /* GPK0[0:6] special function 2 */
- s5p_gpio_cfg_pin(gpio-k0, i, 0x2);
- /* GPK0[0:6] pull disable */
- s5p_gpio_set_pull(gpio-k0, i, GPIO_PULL_NONE);
- /* GPK0[0:6] drv 4x */
- s5p_gpio_set_drv(gpio-k0, i, GPIO_DRV_4X);
- }
-
- for (i = 3; i 7; i++) {
- /* GPK1[3:6] special function 3 */
- s5p_gpio_cfg_pin(gpio-k1, i, 0x3);
- /* GPK1[3:6] pull disable */
- s5p_gpio_set_pull(gpio-k1, i, GPIO_PULL_NONE);
- /* GPK1[3:6] drv 4x */
- s5p_gpio_set_drv(gpio-k1, i, GPIO_DRV_4X);
- }
-
- /*
* MMC device init
* mmc0 : eMMC (8-bit buswidth)
* mmc2 : SD card (4-bit buswidth)
*/
- err = s5p_mmc_init(0, 8);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+ if (err)
+ debug(SDMMC0 not configured\n);
+ else
+ err = s5p_mmc_init(0, 8);
/* T-flash detect */
s5p_gpio_cfg_pin(gpio-x3, 4, 0xf);
@@ -198,24 +167,11 @@ int board_mmc_init(bd_t *bis)
* GPX3[4] T-flash detect pin
*/
if (!s5p_gpio_get_value(gpio-x3, 4)) {
- /*
-* SD card GPIO:
-* GPK2[0] SD_2_CLK(2)
-* GPK2[1] SD_2_CMD(2)
-* GPK2[2] SD_2_CDn- Not used
-* GPK2[3:6]SD_2_DATA[0:3](2)
-*/
- for (i = 0; i 7; i++) {
- if (i == 2)
- continue;
- /* GPK2[0:6] special function 2 */
- s5p_gpio_cfg_pin(gpio-k2, i, 0x2);
- /* GPK2[0:6] pull disable */
- s5p_gpio_set_pull(gpio-k2, i, GPIO_PULL_NONE);
- /* GPK2[0:6] drv 4x */
- s5p_gpio_set_drv(gpio-k2, i, GPIO_DRV_4X);
- }
- err = s5p_mmc_init(2, 4);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err)
+ debug(SDMMC2 not configured\n);
+ else
+ err = s5p_mmc_init(2, 4);
}
return err;
--
1.7.5.4
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[U-Boot] [PATCH v3 3/6] arm:exynos4:pinmux: Modify the gpio function for mmc
This patch add pinmux settings for Exynos4 for mmc0 and mmc2
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
Changes for v2:
- mmc initialisation code moved to pinmux instead of creating a new common code
file
Changes for v3:
- no changes
arch/arm/cpu/armv7/exynos/pinmux.c| 56 +
arch/arm/include/asm/arch-exynos/periph.h |1 +
2 files changed, 57 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index d2b7d2c..84ee05c 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -209,10 +209,66 @@ static int exynos5_pinmux_config(int peripheral, int
flags)
return 0;
}
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+ struct exynos4_gpio_part2 *gpio2 =
+ (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+ struct s5p_gpio_bank *bank, *bank_ext;
+ int i;
+
+ switch (peripheral) {
+ case PERIPH_ID_SDMMC0:
+ bank = gpio2-k0;
+ bank_ext = gpio2-k1;
+ break;
+ case PERIPH_ID_SDMMC2:
+ bank = gpio2-k2;
+ bank_ext = gpio2-k3;
+ break;
+ }
+ for (i = 0; i 7; i++) {
+ if (i == 2)
+ continue;
+ s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+ s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+ }
+ if (flags PINMUX_FLAG_8BIT_MODE) {
+ for (i = 3; i 7; i++) {
+ s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
+ s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
+ s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+ }
+ }
+
+ return 0;
+}
+
+static int exynos4_pinmux_config(int peripheral, int flags)
+{
+ switch (peripheral) {
+ case PERIPH_ID_SDMMC0:
+ case PERIPH_ID_SDMMC2:
+ return exynos4_mmc_config(peripheral, flags);
+ case PERIPH_ID_SDMMC1:
+ case PERIPH_ID_SDMMC3:
+ case PERIPH_ID_SDMMC4:
+ printf(SDMMC device %d not implemented\n, peripheral);
+ return -1;
+ default:
+ debug(%s: invalid peripheral %d, __func__, peripheral);
+ return -1;
+ }
+
+ return 0;
+}
+
int exynos_pinmux_config(int peripheral, int flags)
{
if (cpu_is_exynos5())
return exynos5_pinmux_config(peripheral, flags);
+ else if (cpu_is_exynos4())
+ return exynos4_pinmux_config(peripheral, flags);
else {
debug(pinmux functionality not supported\n);
return -1;
diff --git a/arch/arm/include/asm/arch-exynos/periph.h
b/arch/arm/include/asm/arch-exynos/periph.h
index 5db25aa..4e1da82 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -34,6 +34,7 @@ enum periph_id {
PERIPH_ID_SDMMC1,
PERIPH_ID_SDMMC2,
PERIPH_ID_SDMMC3,
+ PERIPH_ID_SDMMC4,
PERIPH_ID_SROMC,
PERIPH_ID_UART0,
PERIPH_ID_UART1,
--
1.7.5.4
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[U-Boot] [PATCH v3 5/6] arm:exynos4:universal: Use pinmux for mmc configuration
This patch use the pinmux for mmc configuration for Universal C210
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
Changes for v2:
- mmc initialisation using pinmux
Changes for v3:
- init SD card also when eMMC init failed
board/samsung/universal_c210/universal.c | 73 ++---
1 files changed, 15 insertions(+), 58 deletions(-)
diff --git a/board/samsung/universal_c210/universal.c
b/board/samsung/universal_c210/universal.c
index 90fff5c..4ef8eae 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -27,6 +27,7 @@
#include asm/arch/adc.h
#include asm/arch/gpio.h
#include asm/arch/mmc.h
+#include asm/arch/pinmux.h
#include pmic.h
#include usb/s3c_udc.h
#include asm/arch/cpu.h
@@ -177,7 +178,7 @@ int checkboard(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
- int i, err;
+ int err;
switch (get_hwrev()) {
case 0:
@@ -200,75 +201,31 @@ int board_mmc_init(bd_t *bis)
}
/*
-* eMMC GPIO:
-* SDR 8-bit@48MHz at MMC0
-* GPK0[0] SD_0_CLK(2)
-* GPK0[1] SD_0_CMD(2)
-* GPK0[2] SD_0_CDn- Not used
-* GPK0[3:6]SD_0_DATA[0:3](2)
-* GPK1[3:6]SD_0_DATA[0:3](3)
-*
-* DDR 4-bit@26MHz at MMC4
-* GPK0[0] SD_4_CLK(3)
-* GPK0[1] SD_4_CMD(3)
-* GPK0[2] SD_4_CDn- Not used
-* GPK0[3:6]SD_4_DATA[0:3](3)
-* GPK1[3:6]SD_4_DATA[4:7](4)
+* MMC device init
+* mmc0 : eMMC (8-bit buswidth)
+* mmc2 : SD card (4-bit buswidth)
*/
- for (i = 0; i 7; i++) {
- if (i == 2)
- continue;
- /* GPK0[0:6] special function 2 */
- s5p_gpio_cfg_pin(gpio2-k0, i, 0x2);
- /* GPK0[0:6] pull disable */
- s5p_gpio_set_pull(gpio2-k0, i, GPIO_PULL_NONE);
- /* GPK0[0:6] drv 4x */
- s5p_gpio_set_drv(gpio2-k0, i, GPIO_DRV_4X);
- }
- for (i = 3; i 7; i++) {
- /* GPK1[3:6] special function 3 */
- s5p_gpio_cfg_pin(gpio2-k1, i, 0x3);
- /* GPK1[3:6] pull disable */
- s5p_gpio_set_pull(gpio2-k1, i, GPIO_PULL_NONE);
- /* GPK1[3:6] drv 4x */
- s5p_gpio_set_drv(gpio2-k1, i, GPIO_DRV_4X);
- }
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
+ if (err)
+ debug(SDMMC0 not configured\n);
+ else
+ err = s5p_mmc_init(0, 8);
/* T-flash detect */
s5p_gpio_cfg_pin(gpio2-x3, 4, 0xf);
s5p_gpio_set_pull(gpio2-x3, 4, GPIO_PULL_UP);
/*
-* MMC device init
-* mmc0 : eMMC (8-bit buswidth)
-* mmc2 : SD card (4-bit buswidth)
-*/
- err = s5p_mmc_init(0, 8);
-
- /*
* Check the T-flash detect pin
* GPX3[4] T-flash detect pin
*/
if (!s5p_gpio_get_value(gpio2-x3, 4)) {
- /*
-* SD card GPIO:
-* GPK2[0] SD_2_CLK(2)
-* GPK2[1] SD_2_CMD(2)
-* GPK2[2] SD_2_CDn- Not used
-* GPK2[3:6]SD_2_DATA[0:3](2)
-*/
- for (i = 0; i 7; i++) {
- if (i == 2)
- continue;
- /* GPK2[0:6] special function 2 */
- s5p_gpio_cfg_pin(gpio2-k2, i, 0x2);
- /* GPK2[0:6] pull disable */
- s5p_gpio_set_pull(gpio2-k2, i, GPIO_PULL_NONE);
- /* GPK2[0:6] drv 4x */
- s5p_gpio_set_drv(gpio2-k2, i, GPIO_DRV_4X);
- }
- err = s5p_mmc_init(2, 4);
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err)
+ debug(SDMMC2 not configured\n);
+ else
+ err = s5p_mmc_init(2, 4);
}
return err;
--
1.7.5.4
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[U-Boot] [PATCH v3 6/6] arm:exynos4:universal: Eliminated low level init
Low level initialisation is done by another bootloader Signed-off-by: Piotr Wilczek p.wilc...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com CC: Minkyu Kang mk7.k...@samsung.com --- Changes for v2: - no changes Changes for v3: - no changes board/samsung/universal_c210/Makefile|1 - board/samsung/universal_c210/lowlevel_init.S | 395 -- board/samsung/universal_c210/universal.c |8 + include/configs/s5pc210_universal.h |2 + 4 files changed, 10 insertions(+), 396 deletions(-) delete mode 100644 board/samsung/universal_c210/lowlevel_init.S diff --git a/board/samsung/universal_c210/Makefile b/board/samsung/universal_c210/Makefile index bfec08f..587cc1b 100644 --- a/board/samsung/universal_c210/Makefile +++ b/board/samsung/universal_c210/Makefile @@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk LIB= $(obj)lib$(BOARD).o COBJS-y:= universal.o onenand.o -SOBJS := lowlevel_init.o SRCS:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) diff --git a/board/samsung/universal_c210/lowlevel_init.S b/board/samsung/universal_c210/lowlevel_init.S deleted file mode 100644 index dc7f69e..000 --- a/board/samsung/universal_c210/lowlevel_init.S +++ /dev/null @@ -1,395 +0,0 @@ -/* - * Lowlevel setup for universal board based on EXYNOS4210 - * - * Copyright (C) 2010 Samsung Electronics - * Kyungmin Park kyungmin.p...@samsung.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include config.h -#include version.h -#include asm/arch/cpu.h -#include asm/arch/clock.h - -/* - * Register usages: - * - * r5 has zero always - * r7 has GPIO part1 base 0x1140 - * r6 has GPIO part2 base 0x1100 - */ - - .globl lowlevel_init -lowlevel_init: - mov r11, lr - - /* r5 has always zero */ - mov r5, #0 - - ldr r7, =EXYNOS4_GPIO_PART1_BASE - ldr r6, =EXYNOS4_GPIO_PART2_BASE - - /* System Timer */ - ldr r0, =EXYNOS4_SYSTIMER_BASE - ldr r1, =0x5000 - str r1, [r0, #0x0] - ldr r1, =0x - str r1, [r0, #0x8] - ldr r1, =0x49 - str r1, [r0, #0x4] - - /* PMIC manual reset */ - /* nPOWER: XEINT_23: GPX2[7] */ - add r0, r6, #0xC40 @ EXYNOS4_GPIO_X2_OFFSET - ldr r1, [r0, #0x0] - bic r1, r1, #(0xf 28)@ 28 = 7 * 4-bit - orr r1, r1, #(0x1 28)@ Output - str r1, [r0, #0x0] - - ldr r1, [r0, #0x4] - orr r1, r1, #(1 7) @ 7 = 7 * 1-bit - str r1, [r0, #0x4] - - /* init system clock */ - bl system_clock_init - - /* Disable Watchdog */ - ldr r0, =EXYNOS4_WATCHDOG_BASE @0x1006 - str r5, [r0] - - /* UART */ - bl uart_asm_init - - /* PMU init */ - bl system_power_init - - bl tzpc_init - - mov lr, r11 - mov pc, lr - nop - nop - nop - -/* - * uart_asm_init: Initialize UART's pins - */ -uart_asm_init: - /* -* setup UART0-UART4 GPIOs (part1) -* GPA1CON[3] = I2C_3_SCL (3) -* GPA1CON[2] = I2C_3_SDA (3) -*/ - mov r0, r7 - ldr r1, =0x - str r1, [r0, #0x00] @ EXYNOS4_GPIO_A0_OFFSET - ldr r1, =0x00223322 - str r1, [r0, #0x20] @ EXYNOS4_GPIO_A1_OFFSET - - /* UART_SEL GPY4[7] (part2) at EXYNOS4 */ - add r0, r6, #0x1A0 @ EXYNOS4_GPIO_Y4_OFFSET - ldr r1, [r0, #0x0] - bic r1, r1, #(0xf 28)@ 28 = 7 * 4-bit - orr r1, r1, #(0x1 28) - str r1, [r0, #0x0] - - ldr r1, [r0, #0x8] - bic r1, r1, #(0x3 14)@ 14 = 7 * 2-bit - orr r1, r1, #(0x3 14)@ Pull-up enabled - str r1, [r0, #0x8] - - ldr r1, [r0, #0x4] - orr r1, r1, #(1 7) @ 7 = 7 * 1-bit - str r1, [r0, #0x4] - - mov pc, lr - nop - nop - nop - -system_clock_init: - ldr r0,
[U-Boot] [PATCH] implement software SPI
This patch implements software SPI for the universal C210 board. SPI is used to configure video driver. Piotr Wilczek (1): arm:exynos4:universal_c210: implement software SPI board/samsung/universal_c210/universal.c | 36 ++ drivers/spi/soft_spi.c |7 +- include/configs/s5pc210_universal.h | 19 +++ 3 files changed, 61 insertions(+), 1 deletions(-) -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] arm:exynos4:universal_c210: implement software SPI
This patch implements software SPI for the universal C210 board.
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
CC: Wolfgang Denk w...@denx.de
CC: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
board/samsung/universal_c210/universal.c | 36 ++
drivers/spi/soft_spi.c |7 +-
include/configs/s5pc210_universal.h | 19 +++
3 files changed, 61 insertions(+), 1 deletions(-)
diff --git a/board/samsung/universal_c210/universal.c
b/board/samsung/universal_c210/universal.c
index 8a114e6..772ade5 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -24,6 +24,7 @@
#include common.h
#include asm/io.h
+#include spi.h
#include asm/arch/adc.h
#include asm/arch/gpio.h
#include asm/arch/mmc.h
@@ -34,6 +35,10 @@
#include max8998_pmic.h
#include asm/arch/watchdog.h
+#if defined(CONFIG_SOFT_SPI)
+# include asm/gpio.h
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
struct exynos4_gpio_part1 *gpio1;
@@ -288,3 +293,34 @@ int board_early_init_f(void)
return 0;
}
+
+void soft_spi_init()
+{
+ gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
+ CONFIG_SOFT_SPI_MODE SPI_CPOL);
+ gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
+ gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
+ gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
+ !(CONFIG_SOFT_SPI_MODE SPI_CS_HIGH));
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+ gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
+ !(CONFIG_SOFT_SPI_MODE SPI_CS_HIGH));
+ SPI_SCL(1);
+ gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
+ CONFIG_SOFT_SPI_MODE SPI_CS_HIGH);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+ gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
+ !(CONFIG_SOFT_SPI_MODE SPI_CS_HIGH));
+}
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return 1;
+}
+
diff --git a/drivers/spi/soft_spi.c b/drivers/spi/soft_spi.c
index 13df8cb..a0a3012 100644
--- a/drivers/spi/soft_spi.c
+++ b/drivers/spi/soft_spi.c
@@ -29,6 +29,10 @@
#include malloc.h
+#if defined(CONFIG_SOFT_SPI)
+# include asm/gpio.h
+#endif
+
/*---
* Definitions
*/
@@ -59,8 +63,9 @@ static inline struct soft_spi_slave *to_soft_spi(struct
spi_slave *slave)
void spi_init (void)
{
#ifdef SPI_INIT
+#ifdef CONFIG_SYS_IMMR
volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
-
+#endif
SPI_INIT;
#endif
}
diff --git a/include/configs/s5pc210_universal.h
b/include/configs/s5pc210_universal.h
index 7978317..a338840 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -266,4 +266,23 @@
#define CONFIG_USB_GADGET_S3C_UDC_OTG
#define CONFIG_USB_GADGET_DUALSPEED
+/*
+ * SPI Settings
+ */
+#define CONFIG_SOFT_SPI
+#define CONFIG_SOFT_SPI_MODE SPI_MODE_3
+#define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_part2_get_nr(y3, 1)
+#define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_part2_get_nr(y3, 3)
+#define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_part2_get_nr(y3, 0)
+#define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_part2_get_nr(y4, 3)
+
+#define SPI_DELAY udelay(1)
+#define SPI_INIT soft_spi_init()
+#define SPI_SCL(bit) gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit)
+#define SPI_SDA(bit) gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit)
+#define SPI_READ gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO)
+#ifndef__ASSEMBLY__
+void soft_spi_init(void);
+#endif
+
#endif /* __CONFIG_H */
--
1.7.5.4
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Re: [U-Boot] [PATCH] arm:at91-boards: remove console_init_f where unnecessary
A lot of at91 boards have the console_init_f in board_init. This is useless cause it was called before by generic code in lib/board.c. Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com I have successfully tested this patch for eb_cpux9k2 and vl_ma2sc, so: Acked-by: Jens Scharsig (BuS Elektronik) e...@bus-elektronik.de Tested-by: Jens Scharsig (BuS Elektronik) e...@bus-elektronik.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] dreamplug spi partitions
(lets add the u-boot list, like I should have done in the first place. For u-boot@ folks the thread starts at http://www.spinics.net/lists/arm-kernel/msg188462.html and concerns the discrepancy between the size of u-boot's environment defined by u-boot and the kernel) On Tue, 2012-08-28 at 11:30 -0400, Jason Cooper wrote: Before we go changing anything, what is the maximum size a uboot environment grepping for CONFIG_ENV_SIZE in the u-boot source shows examples of basically every conceivable size. The biggest I could see was 256K. That seems pretty huge compared to the sorts of things stored in here though (I expect it happens to be the underlying sector size) BTW, I see that in u-boot CONFIG_ENV_SECT_SIZE is 64K while CONFIG_ENV_SIZE is only 4K. Looking at README this would be discouraged (it's intended to be used to allow u-boot and the env to share a sector, which is dangerous) but the layout we use doesn't actually overlap anything. I've not had much luck googling for the spec of the actual SPI part in the dreamplug and my one is at home so I can't look for part numbers. or a dtb can be? Single digit numbers of K seems to be the norm (at least for vexpress platforms). Allowing for a pretty huge factor for expansion even just 4K would be enormous (although that strikes me as the sort of statement which comes back to haunt people ;-)). Until we can nail that down, I'm inclined to leave the partitions at their current locations and only adjust the size of the environment down to 4k in the kernel. That sounds sensible. This way, a user foolishly attempting to write more than 4k will get an error. If a user changes out their uboot to get a larger environment, they can adjust the dts as well. No kernel rebuilding necessary. I hadn't spotted that this was in DTS now (although I should have guessed). Either way this sounds reasonable to me. Ian. -- Ian Campbell How sharper than a hound's tooth it is to have a thankless serpent. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 0/2] i2c:soft:multi: Support for multiple soft I2C buses at TRATS
Support for multiple I2C buses handling on Samsung's TRATS development board. Those patches add multiple I2C support for Samsung boards and enables it at Trats. Lukasz Majewski (2): i2c:soft:multi: Support for multiple soft I2C buses at Samsung boards i2c:soft:multi: Enable soft I2C multibus at Trats development board board/samsung/common/Makefile| 43 + board/samsung/common/multi_i2c.c | 55 ++ include/configs/trats.h | 19 + include/i2c.h| 11 +++ 4 files changed, 122 insertions(+), 6 deletions(-) create mode 100644 board/samsung/common/Makefile create mode 100644 board/samsung/common/multi_i2c.c -- 1.7.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/2] i2c:soft:multi: Support for multiple soft I2C buses at Samsung boards
Support for multiple soft I2C buses.
The goal is achieved by defining get_multi_{sda|scl}_pin
functions to switch between multiple soft I2C buses.
Common definition of I2C_{0|1} I2C buses is provided at i2c.h.
TEST HW:
Samsung's Exynos4210 evt.0.1 - Trats development board
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Heiko Schocher h...@denx.de
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes for v2:
- Common Samsung code has been put to board/samsung/common/multi_i2c.c file
- I2C_{4|5} have been renamed to I2C_{0|1}
- *soft_i2c_name[] table has been removed
---
board/samsung/common/Makefile| 43 +
board/samsung/common/multi_i2c.c | 55 ++
include/i2c.h| 11 +++
3 files changed, 109 insertions(+), 0 deletions(-)
create mode 100644 board/samsung/common/Makefile
create mode 100644 board/samsung/common/multi_i2c.c
diff --git a/board/samsung/common/Makefile b/board/samsung/common/Makefile
new file mode 100644
index 000..0bcd594
--- /dev/null
+++ b/board/samsung/common/Makefile
@@ -0,0 +1,43 @@
+#
+# Copyright (C) 2012 Samsung Electronics
+# Lukasz Majewski l.majew...@samsung.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)libsamsung.o
+
+COBJS-$(CONFIG_SOFT_I2C_MULTI_BUS) += multi_i2c.o
+
+SRCS:= $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/samsung/common/multi_i2c.c b/board/samsung/common/multi_i2c.c
new file mode 100644
index 000..d8d59fb
--- /dev/null
+++ b/board/samsung/common/multi_i2c.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Lukasz Majewski l.majew...@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include i2c.h
+
+/* Handle multiple I2C buses instances */
+int get_multi_scl_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_0:
+ return CONFIG_SOFT_I2C_I2C0_SCL;
+ case I2C_1:
+ return CONFIG_SOFT_I2C_I2C1_SCL;
+ };
+
+ return 0;
+}
+
+int get_multi_sda_pin(void)
+{
+ switch (I2C_GET_BUS()) {
+ case I2C_0:
+ return CONFIG_SOFT_I2C_I2C0_SDA;
+ case I2C_1:
+ return CONFIG_SOFT_I2C_I2C1_SDA;
+ };
+
+ return 0;
+}
+
+int multi_i2c_init(void)
+{
+ return 0;
+}
diff --git a/include/i2c.h b/include/i2c.h
index 1f35acf..00a3933 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -250,4 +250,15 @@ static inline void I2C_SET_BUS(unsigned int bus)
i2c_set_bus_num(bus);
}
+/* Multi I2C busses handling */
+#ifdef CONFIG_SOFT_I2C_MULTI_BUS
+enum {
+ I2C_0,
+ I2C_1,
+};
+
+extern int get_multi_scl_pin(void);
+extern int get_multi_sda_pin(void);
+extern int multi_i2c_init(void);
+#endif
#endif /* _I2C_H_ */
--
1.7.2.3
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[U-Boot] [PATCH v2 2/2] i2c:soft:multi: Enable soft I2C multibus at Trats development board
This commit enables multibus handling at Samsung's Trats development board. Signed-off-by: Lukasz Majewski l.majew...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com Cc: Minkyu Kang mk7.k...@samsung.com --- Changes for v2: - CONFIG_SOFT_I2C_MULTI_BUS flag added to Trats configuration --- include/configs/trats.h | 19 +-- 1 files changed, 13 insertions(+), 6 deletions(-) diff --git a/include/configs/trats.h b/include/configs/trats.h index c6fb2e0..16df4cc 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -235,19 +235,26 @@ #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_CACHELINE_SIZE 32 -#include asm/arch/gpio.h -/* - * I2C Settings - */ -#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7) -#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6) #define CONFIG_SOFT_I2C #define CONFIG_SOFT_I2C_READ_REPEATED_START #define CONFIG_SYS_I2C_SPEED 5 #define CONFIG_I2C_MULTI_BUS +#define CONFIG_SOFT_I2C_MULTI_BUS #define CONFIG_SYS_MAX_I2C_BUS 7 +#include asm/arch/gpio.h + +#define CONFIG_SOFT_I2C_I2C0_SCL exynos4_gpio_part1_get_nr(b, 7) +#define CONFIG_SOFT_I2C_I2C0_SDA exynos4_gpio_part1_get_nr(b, 6) + +#define CONFIG_SOFT_I2C_I2C1_SCL exynos4_gpio_part1_get_nr(b, 3) +#define CONFIG_SOFT_I2C_I2C1_SDA exynos4_gpio_part1_get_nr(b, 2) + +#define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin() +#define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin() +#define I2C_INIT multi_i2c_init() + #define CONFIG_PMIC #define CONFIG_PMIC_I2C #define CONFIG_PMIC_MAX8997 -- 1.7.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] MUSB driver: Timeout is never detected as the while loop does not end
Timeout variable is decremented once more when while condition is not met. Following if does not detect correctly that timeout has occurred. Because of this bug the usb start command on AM335X-EVM board did not detect correctly that USB device was not attached. timeout = musb_cfg.timeout; while (timeout--) if (readb(musbr-devctl) MUSB_DEVCTL_HM) break; /* if musb core is not in host mode, then return */ if (!timeout) return -1; --- drivers/usb/musb/musb_hcd.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c index 2df52c1..8d44c46 100644 --- a/drivers/usb/musb/musb_hcd.c +++ b/drivers/usb/musb/musb_hcd.c @@ -1113,7 +1113,7 @@ int usb_lowlevel_init(void) * should be a usb device connected. */ timeout = musb_cfg.timeout; - while (timeout--) + while (--timeout) if (readb(musbr-devctl) MUSB_DEVCTL_HM) break; /* if musb core is not in host mode, then return */ if (!timeout) return -1; -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Specifying flash page sizes
Hi I have been using uboot to with a number of devices which have a 256 byte page. Currently I'm using a device with a 512 byte page. I have had problems getting Linux to run on my system, the initial problem was caused by the flash drivers in linux specifying a page of 256 bytes and not 512. I am still having numerous issues with Linux, and I'm wondering whether it is because the kernel flash images are not being programmed correctly? Ho do I specify the flash page size in uboot source code? I've not been able to find how to do that. Kind regards Andrew ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] MX28: Add CONFIG_MX28_DEBUG
Dear Stefano Babic,
On 29/08/2012 03:14, Marek Vasut wrote:
This functionality allows configuring SCRATCH0 and SCRATCH1 registers
to special values, which make the SPL hang after the CPU was properly
initialized.
This is for bootstrap purposes only and MUST BE DISABLED for normal
operation.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Wolfgang Denk w...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
---
Hi Marek,
arch/arm/cpu/arm926ejs/mxs/Makefile|3 ++
arch/arm/cpu/arm926ejs/mxs/mxs_init.h |6 +++
arch/arm/cpu/arm926ejs/mxs/spl_boot.c |2 +
arch/arm/cpu/arm926ejs/mxs/spl_debug.c | 63
4 files changed, 74 insertions(+)
create mode 100644 arch/arm/cpu/arm926ejs/mxs/spl_debug.c
diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile
b/arch/arm/cpu/arm926ejs/mxs/Makefile index eeecf89..e75eabd 100644
--- a/arch/arm/cpu/arm926ejs/mxs/Makefile
+++ b/arch/arm/cpu/arm926ejs/mxs/Makefile
@@ -29,6 +29,9 @@ COBJS = clock.o mxs.o iomux.o timer.o
ifdef CONFIG_SPL_BUILD
COBJS += spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
+ifdef CONFIG_MX28_DEBUG
+COBJS += spl_debug.o
+endif
endif
SRCS := $(START:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h index 2ddc5bc..e6f837c 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
@@ -42,4 +42,10 @@ uint32_t mxs_mem_get_size(void);
void mxs_lradc_init(void);
void mxs_lradc_enable_batt_measurement(void);
+#ifdef CONFIG_MX28_DEBUG
+void mx28_common_spl_debug_halt(void);
+#else
+static inline void mx28_common_spl_debug_halt(void) {}
+#endif
+
#endif /* __M28_INIT_H__ */
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index ad66c57..f4f0c09 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -108,6 +108,8 @@ void mxs_common_spl_init(const iomux_cfg_t
*iomux_setup,
data-boot_mode_idx = bootmode;
+ mx28_common_spl_debug_halt();
+
mxs_power_wait_pswitch();
}
I admit I use the same trick when the first initialization fails and I
want to check what happens. Make the SOC hanging helps, sure.
Yea ... so either way if it's merged or not, I hope it might help someone :)
However, this is part of the porting / development. Why should we
introduce this code into mainline ? In the official configuration file
CONFIG_MX28_DEBUG must be off, and then all this stuff is dead code.
Indeed, I'll shift this decision on you ;-)
Regards,
Stefano
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] MUSB driver: Timeout is never detected as the while loop does not end
Dear Matej Frančeškin, Timeout variable is decremented once more when while condition is not met. Following if does not detect correctly that timeout has occurred. Because of this bug the usb start command on AM335X-EVM board did not detect correctly that USB device was not attached. timeout = musb_cfg.timeout; while (timeout--) if (readb(musbr-devctl) MUSB_DEVCTL_HM) break; /* if musb core is not in host mode, then return */ if (!timeout) return -1; CCing Tom, SoB line missing, please read http://www.denx.de/wiki/U-Boot/Patches --- drivers/usb/musb/musb_hcd.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c index 2df52c1..8d44c46 100644 --- a/drivers/usb/musb/musb_hcd.c +++ b/drivers/usb/musb/musb_hcd.c @@ -1113,7 +1113,7 @@ int usb_lowlevel_init(void) * should be a usb device connected. */ timeout = musb_cfg.timeout; - while (timeout--) + while (--timeout) if (readb(musbr-devctl) MUSB_DEVCTL_HM) break; /* if musb core is not in host mode, then return */ if (!timeout) return -1; Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/9] This patchset updates boards based on the TAM3517 SOM.
The MAC address provided by the manufacturer can be read from the EEPROM. Add also Video support to the mt_ventoux (TAM3517) board. Changes in v2: - Set dispc_config before checking for framebuffer - Use a common macro to set up the horizontal and vertical timing (Heiko Schocker) to not break beagleboard (Jeroen Hofstee) Changes in v3: - Add further macros to define the single fields (Jeroen Hofstee) Stefano Babic (9): OMAP3: tam3517: add function to read MAC from EEPROM OMAP3: twister : get MAC address from EEPROM OMAP3: mt_ventoux: Correct board pinmux OMAP3: mt_ventoux: activate GPIO4 OMAP3: mt_ventoux: read MAC address from EEPROM OMAP3: mt_ventoux: disable the buzzer at start-up video: drop duplicate set of DISPC_CONFIG register OMAP3: video: add macros to set display parameters OMAP3: mt_ventoux: added video support arch/arm/include/asm/arch-omap3/dss.h | 11 +++- board/technexion/twister/twister.c| 10 +++ board/teejet/mt_ventoux/mt_ventoux.c | 113 + board/teejet/mt_ventoux/mt_ventoux.h | 80 ++- drivers/video/omap3_dss.c |3 +- include/configs/mt_ventoux.h | 17 + include/configs/tam3517-common.h | 66 +++ 7 files changed, 251 insertions(+), 49 deletions(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 3/9] OMAP3: mt_ventoux: Correct board pinmux
Fix some issues (some pins were not set as GPIOs)
Signed-off-by: Stefano Babic sba...@denx.de
---
board/teejet/mt_ventoux/mt_ventoux.h | 74 +++---
1 file changed, 33 insertions(+), 41 deletions(-)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.h
b/board/teejet/mt_ventoux/mt_ventoux.h
index 9b2e43e..d1fee25 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.h
+++ b/board/teejet/mt_ventoux/mt_ventoux.h
@@ -142,7 +142,8 @@ const omap3_sysinfo sysinfo = {
/*GPIO_62: FPGA_RESET */ \
MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M4)) \
MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M4)) \
- MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/ \
+ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) \
+ /* GPIO_64*/ \
MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4)) \
/* DSS */\
MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) \
@@ -174,26 +175,6 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) \
MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) \
/* CAMERA */\
- MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(CAM_FLD),(IDIS | PTD | DIS | M4)) /*GPIO_98*/\
- MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D10),(IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_D11),(IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(CAM_WEN),(IEN | PTD | DIS | M4)) /*GPIO_167*/\
- MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) \
MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) \
MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) \
MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) \
@@ -209,6 +190,7 @@ const omap3_sysinfo sysinfo = {
/* GPIO_126: CardDetect */\
MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M4)) \
MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M4)) \
+ /*GPIO_128 */ \
MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M4)) \
\
MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) /*MMC2_CLK*/\
@@ -250,7 +232,7 @@ const omap3_sysinfo sysinfo = {
\
MUX_VAL(CP(MCBSP4_CLKX),(IEN | PTD | DIS | M4)) \
/*GPIO_152: Ignition Sense */ \
- MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)) \
+ MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M4)) \
/*GPIO_153: Power Button Sense */ \
MUX_VAL(CP(MCBSP4_DX), (IEN | PTU | DIS | M4)) \
/* GPIO_154: FPGA_DONE */ \
@@ -264,10 +246,14 @@ const omap3_sysinfo sysinfo = {
/* GPIO_150: USB status 1 */\
\
MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) \
- MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) \
- MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) \
- MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) \
+ MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M2)) \
+ /* gpt9_pwm */\
+ MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M2)) \
+ /* gpt10_pwm */\
+ MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M2)) \
+ /* gpt8_pwm */\
+ MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M2)) \
+ /* gpt11_pwm */\
\
MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M4)) \
/*GPIO_163 : TS_PENIRQ*/ \
@@ -299,22 +285,24 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M4)) \
MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)) \
/* CCDC */\
- MUX_VAL(CP(CCDC_PCLK), (IEN | PTU | EN | M0)) \
[U-Boot] [PATCH v3 1/9] OMAP3: tam3517: add function to read MAC from EEPROM
The manufacturer delivers the TAM3517 SOM with 4 MAC address.
They are stored on the EEPROM of the SOM. The patch adds a
function to get their values and set the ethaddr variables.
Signed-off-by: Stefano Babic sba...@denx.de
---
Changes in v2:
- Set dispc_config before checking for framebuffer
- Use a common macro to set up the horizontal and vertical timing (Heiko
Schocker)
to not break beagleboard (Jeroen Hofstee)
Changes in v3:
- Add further macros to define the single fields (Jeroen Hofstee)
include/configs/tam3517-common.h | 66 ++
1 file changed, 66 insertions(+)
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index 24f6f7e..51503da 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -125,6 +125,7 @@
#define CONFIG_CMD_NAND/* NAND support */
#define CONFIG_CMD_PING
#define CONFIG_CMD_USB
+#define CONFIG_CMD_EEPROM
#undef CONFIG_CMD_FLASH/* only NAND on the SOM */
#undef CONFIG_CMD_IMLS
@@ -135,6 +136,9 @@
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_SYS_I2C_BUS 0
#define CONFIG_SYS_I2C_BUS_SELECT 1
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* base address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW0x07
#define CONFIG_DRIVER_OMAP34XX_I2C
@@ -354,4 +358,66 @@
fi; \
else echo U-Boot not downloaded..exiting;fi\0 \
+
+/*
+ * this is common code for all TAM3517 boards.
+ * MAC address is stored from manufacturer in
+ * I2C EEPROM
+ */
+#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+
+/*
+ * The I2C EEPROM on the TAM3517 contains
+ * mac address and production data
+ */
+struct tam3517_module_info {
+ char customer[48];
+ char product[48];
+
+ /*
+* bit 0~47 : sequence number
+* bit 48~55 : week of year, from 0.
+* bit 56~63 : year
+*/
+ unsigned long long sequence_number;
+
+ /*
+* bit 0~7 : revision fixed
+* bit 8~15 : revision major
+* bit 16~31 : TNxxx
+*/
+ unsigned int revision;
+ unsigned char eth_addr[4][8];
+ unsigned char _rev[100];
+};
+
+#define TAM3517_READ_MAC_FROM_EEPROM \
+do { \
+ struct tam3517_module_info info;\
+ char buf[80], ethname[20]; \
+ int i; \
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \
+ if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
+ (void *)info, sizeof(info))) \
+ break; \
+ memset(buf, 0, sizeof(buf));\
+ for (i = 0 ; i ARRAY_SIZE(info.eth_addr); i++) { \
+ sprintf(buf, %02X:%02X:%02X:%02X:%02X:%02X, \
+ info.eth_addr[i][5],\
+ info.eth_addr[i][4],\
+ info.eth_addr[i][3],\
+ info.eth_addr[i][2],\
+ info.eth_addr[i][1],\
+ info.eth_addr[i][0]); \
+ \
+ if (i) \
+ sprintf(ethname, eth%daddr, i); \
+ else\
+ sprintf(ethname, ethaddr);\
+ printf(Setting %s from EEPROM with %s\n, ethname, buf);\
+ setenv(ethname, buf); \
+ } \
+} while (0)
+#endif
+
#endif /* __TAM3517_H */
--
1.7.9.5
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[U-Boot] [PATCH v3 2/9] OMAP3: twister : get MAC address from EEPROM
Signed-off-by: Stefano Babic sba...@denx.de
---
board/technexion/twister/twister.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/board/technexion/twister/twister.c
b/board/technexion/twister/twister.c
index c2b10ac..7429e93 100644
--- a/board/technexion/twister/twister.c
+++ b/board/technexion/twister/twister.c
@@ -100,8 +100,18 @@ int board_init(void)
int misc_init_r(void)
{
+ char *eth_addr;
+
dieid_num_r();
+ eth_addr = getenv(ethaddr);
+ if (eth_addr)
+ return 0;
+
+#ifndef CONFIG_SPL_BUILD
+ TAM3517_READ_MAC_FROM_EEPROM;
+#endif
+
return 0;
}
--
1.7.9.5
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[U-Boot] [PATCH v3 4/9] OMAP3: mt_ventoux: activate GPIO4
Signed-off-by: Stefano Babic sba...@denx.de --- include/configs/mt_ventoux.h |1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h index 5db6d57..131670a 100644 --- a/include/configs/mt_ventoux.h +++ b/include/configs/mt_ventoux.h @@ -31,6 +31,7 @@ #define CONFIG_BOOTFILEuImage #define CONFIG_AUTO_COMPLETE +#define CONFIG_OMAP3_GPIO_4 #define CONFIG_HOSTNAME mt_ventoux /* -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 5/9] OMAP3: mt_ventoux: read MAC address from EEPROM
Signed-off-by: Stefano Babic sba...@denx.de
---
board/teejet/mt_ventoux/mt_ventoux.c | 16
1 file changed, 16 insertions(+)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index 9fbaedd..b7744a9 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -196,6 +196,22 @@ int board_init(void)
return 0;
}
+int misc_init_r(void)
+{
+ char *eth_addr;
+
+ dieid_num_r();
+
+ eth_addr = getenv(ethaddr);
+ if (eth_addr)
+ return 0;
+
+#ifndef CONFIG_SPL_BUILD
+ TAM3517_READ_MAC_FROM_EEPROM;
+#endif
+ return 0;
+}
+
/*
* Routine: set_muxconf_regs
* Description: Setting up the configuration Mux registers specific to the
--
1.7.9.5
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[U-Boot] [PATCH v3 7/9] video: drop duplicate set of DISPC_CONFIG register
Signed-off-by: Stefano Babic sba...@denx.de
---
arch/arm/include/asm/arch-omap3/dss.h |1 -
drivers/video/omap3_dss.c |3 +--
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/arch-omap3/dss.h
b/arch/arm/include/asm/arch-omap3/dss.h
index a830c43..8913a71 100644
--- a/arch/arm/include/asm/arch-omap3/dss.h
+++ b/arch/arm/include/asm/arch-omap3/dss.h
@@ -142,7 +142,6 @@ struct venc_regs {
};
/* Few Register Offsets */
-#define FRAME_MODE_SHIFT 1
#define TFTSTN_SHIFT 3
#define DATALINES_SHIFT8
diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c
index 6686718..b1424bf 100644
--- a/drivers/video/omap3_dss.c
+++ b/drivers/video/omap3_dss.c
@@ -112,7 +112,7 @@ void omap3_dss_panel_config(const struct panel_config
*panel_cfg)
writel(panel_cfg-pol_freq, dispc-pol_freq);
writel(panel_cfg-divisor, dispc-divisor);
writel(panel_cfg-lcd_size, dispc-size_lcd);
- writel(panel_cfg-load_mode FRAME_MODE_SHIFT, dispc-config);
+ writel(panel_cfg-load_mode LOADMODE_SHIFT, dispc-config);
writel(panel_cfg-panel_type TFTSTN_SHIFT |
panel_cfg-data_lines DATALINES_SHIFT, dispc-control);
writel(panel_cfg-panel_color, dispc-default_color0);
@@ -121,7 +121,6 @@ void omap3_dss_panel_config(const struct panel_config
*panel_cfg)
if (!panel_cfg-frame_buffer)
return;
- writel(panel_cfg-load_mode LOADMODE_SHIFT, dispc-config);
writel(8 GFX_FORMAT_SHIFT | GFX_ENABLE, dispc-gfx_attributes);
writel(1, dispc-gfx_row_inc);
writel(1, dispc-gfx_pixel_inc);
--
1.7.9.5
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[U-Boot] [PATCH v3 6/9] OMAP3: mt_ventoux: disable the buzzer at start-up
Signed-off-by: Stefano Babic sba...@denx.de
---
board/teejet/mt_ventoux/mt_ventoux.c | 14 ++
board/teejet/mt_ventoux/mt_ventoux.h |4
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index b7744a9..814e72f 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -39,6 +39,9 @@
DECLARE_GLOBAL_DATA_PTR;
+#define BUZZER 140
+#define SPEAKER141
+
#ifndef CONFIG_FPGA
#error The Teejet mt_ventoux must have CONFIG_FPGA enabled
#endif
@@ -193,6 +196,17 @@ int board_init(void)
mt_ventoux_init_fpga();
+ /* GPIO_140: speaker #mute */
+ MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4))
+ /* GPIO_141: Buzz Hi */
+ MUX_VAL(CP(MCBSP3_DR), (IEN | PTU | EN | M4))
+
+ /* Turning off the buzzer */
+ gpio_request(BUZZER, BUZZER_MUTE);
+ gpio_request(SPEAKER, SPEAKER);
+ gpio_direction_output(BUZZER, 0);
+ gpio_direction_output(SPEAKER, 0);
+
return 0;
}
diff --git a/board/teejet/mt_ventoux/mt_ventoux.h
b/board/teejet/mt_ventoux/mt_ventoux.h
index d1fee25..eadb8a5 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.h
+++ b/board/teejet/mt_ventoux/mt_ventoux.h
@@ -223,10 +223,6 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MCBSP2_DX), (IEN | PTD | EN | M4)) \
/* GPIO_119: FPGA_INIT */ \
\
- MUX_VAL(CP(MCBSP3_DX), (IEN | PTU | EN | M4)) \
- /* GPIO_140: speaker #mute */\
- MUX_VAL(CP(MCBSP3_DR), (IEN | PTU | EN | M4)) \
- /* GPIO_141: Buzz Hi */\
MUX_VAL(CP(MCBSP3_CLKX),(IEN | PTU | EN | M4)) \
MUX_VAL(CP(MCBSP3_FSX), (IEN | PTU | EN | M4)) \
\
--
1.7.9.5
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[U-Boot] [PATCH v3 9/9] OMAP3: mt_ventoux: added video support
Signed-off-by: Stefano Babic sba...@denx.de
---
board/teejet/mt_ventoux/mt_ventoux.c | 83 ++
board/teejet/mt_ventoux/mt_ventoux.h |2 +-
include/configs/mt_ventoux.h | 16 +++
3 files changed, 100 insertions(+), 1 deletion(-)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index 814e72f..b8ad447 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -21,13 +21,17 @@
#include common.h
#include netdev.h
+#include malloc.h
#include fpga.h
+#include video_fb.h
#include asm/io.h
#include asm/arch/mem.h
#include asm/arch/mux.h
#include asm/arch/sys_proto.h
#include asm/omap_gpio.h
#include asm/arch/mmc_host_def.h
+#include asm/arch/dss.h
+#include asm/arch/clocks.h
#include i2c.h
#include spartan3.h
#include asm/gpio.h
@@ -53,6 +57,42 @@ DECLARE_GLOBAL_DATA_PTR;
#define FPGA_INIT 119
#define FPGA_DONE 154
+#define LCD_PWR138
+#define LCD_PON_PIN139
+
+#if defined(CONFIG_VIDEO) !defined(CONFIG_SPL_BUILD)
+static struct {
+ u32 xres;
+ u32 yres;
+} panel_resolution[] = {
+ { 480, 272 },
+ { 800, 480 }
+};
+
+static struct panel_config lcd_cfg[] = {
+ {
+ .timing_h = PANEL_TIMING_H(4, 8, 41),
+ .timing_v = PANEL_TIMING_V(2, 4, 10),
+ .pol_freq = 0x, /* Pol Freq */
+ .divisor= 0x0001000d, /* 33Mhz Pixel Clock */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color= 0,
+ },
+ {
+ .timing_h = PANEL_TIMING_H(20, 192, 4),
+ .timing_v = PANEL_TIMING_V(2, 20, 10),
+ .pol_freq = 0x4000, /* Pol Freq */
+ .divisor= 0x0001000E, /* 36Mhz Pixel Clock */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color= 0,
+ }
+};
+#endif
+
/* Timing definitions for FPGA */
static const u32 gpmc_fpga[] = {
FPGA_GPMC_CONFIG1,
@@ -254,3 +294,46 @@ int board_mmc_init(bd_t *bis)
return omap_mmc_init(0, 0, 0);
}
#endif
+
+#if defined(CONFIG_VIDEO) !defined(CONFIG_SPL_BUILD)
+int board_video_init(void)
+{
+ struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+ struct panel_config *panel = lcd_cfg[0];
+ char *s;
+ u32 index = 0;
+
+ void *fb;
+
+ fb = (void *)0x8800;
+
+ s = getenv(panel);
+ if (s) {
+ index = simple_strtoul(s, NULL, 10);
+ if (index ARRAY_SIZE(lcd_cfg))
+ panel = lcd_cfg[index];
+ else
+ return 0;
+ }
+
+ panel-frame_buffer = fb;
+ printf(Panel: %dx%d\n, panel_resolution[index].xres,
+ panel_resolution[index].yres);
+ panel-lcd_size = (panel_resolution[index].yres - 1) 16 |
+ (panel_resolution[index].xres - 1);
+
+ gpio_request(LCD_PWR, LCD Power);
+ gpio_request(LCD_PON_PIN, LCD Pon);
+ gpio_direction_output(LCD_PWR, 0);
+ gpio_direction_output(LCD_PON_PIN, 1);
+
+
+ setbits_le32(prcm_base-fclken_dss, FCK_DSS_ON);
+ setbits_le32(prcm_base-iclken_dss, ICK_DSS_ON);
+
+ omap3_dss_panel_config(panel);
+ omap3_dss_enable();
+
+ return 0;
+}
+#endif
diff --git a/board/teejet/mt_ventoux/mt_ventoux.h
b/board/teejet/mt_ventoux/mt_ventoux.h
index eadb8a5..1cd7ec2 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.h
+++ b/board/teejet/mt_ventoux/mt_ventoux.h
@@ -203,7 +203,7 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MMC2_DAT5), (IDIS | PTU | EN | M4)) \
MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) \
/* GPIO_138: LCD_ENVD */\
- MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | EN | M4)) \
+ MUX_VAL(CP(MMC2_DAT7), (IDIS | PTD | EN | M4)) \
/* GPIO_139: LCD_PON */\
/* McBSP */\
MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) \
diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h
index 131670a..8d35943 100644
--- a/include/configs/mt_ventoux.h
+++ b/include/configs/mt_ventoux.h
@@ -2,6 +2,9 @@
* Copyright (C) 2011
* Stefano Babic, DENX Software Engineering, sba...@denx.de.
*
+ *
+ * Configuration settings for the Teejet mt_ventoux board.
+ *
* Copyright (C) 2009 TechNexion Ltd.
*
* This program is free software; you can redistribute it and/or modify
@@ -24,6 +27,10 @@
#include tam3517-common.h
+#undef CONFIG_SYS_MALLOC_LEN
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 10) + \
+ 6 * 1024 * 1024)
+
#define MACH_TYPE_AM3517_MT_VENTOUX3832
#define CONFIG_MACH_TYPE
[U-Boot] [PATCH v3 8/9] OMAP3: video: add macros to set display parameters
Add a common macros to set the registers for horizontal
and vertical timing.
Signed-off-by: Stefano Babic sba...@denx.de
---
Changes in v2:
- Use a common macro to set up the horizontal and vertical timing (Heiko
Schocker)
Changes in v3:
- Add further macros to define the single fields (Jeroen Hofstee)
arch/arm/include/asm/arch-omap3/dss.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap3/dss.h
b/arch/arm/include/asm/arch-omap3/dss.h
index 8913a71..54add4b 100644
--- a/arch/arm/include/asm/arch-omap3/dss.h
+++ b/arch/arm/include/asm/arch-omap3/dss.h
@@ -181,6 +181,16 @@ struct panel_config {
void *frame_buffer;
};
+#define DSS_HBP(bp)(((bp) - 1) 20)
+#define DSS_HFP(fp)(((fp) - 1) 8)
+#define DSS_HSW(sw)((sw) - 1)
+#define DSS_VBP(bp)((bp) 20)
+#define DSS_VFP(fp)((fp) 8)
+#define DSS_VSW(sw)((sw) - 1)
+
+#define PANEL_TIMING_H(bp, fp, sw) (DSS_HBP(bp) | DSS_HFP(fp) | DSS_HSW(sw))
+#define PANEL_TIMING_V(bp, fp, sw) (DSS_VBP(bp) | DSS_VFP(fp) | DSS_VSW(sw))
+
/* Generic DSS Functions */
void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
u32 height, u32 width);
--
1.7.9.5
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Re: [U-Boot] [PATCH 5/7] dm: gpio: Add draft GPIO core and convert sandbox to use it
Hi
On Tuesday 21 August 2012 18:00:51 Marek Vasut wrote:
...snip...
+/**
+ * gpio_request() - [COMPAT] Request GPIO
+ * gpio: GPIO number
+ * label:Name for the requested GPIO
+ *
+ * This function implements the API that's compatible with current
+ * GPIO API used in U-Boot. The request is forwarded to particular
+ * GPIO driver. Returns 0 on success, negative value on error.
+ */
+int gpio_request(unsigned gpio, const char *label)
+{
+ struct gpio_core_entry *e = gpio_to_entry(gpio);
+ if (!e)
+ return -EINVAL;
+
+ return e-ops-gpio_request(gpio, label);
+}
...snip...
Your core should have a driver API (as described in the core document), which
should be in form of gpio_$fname for each $fname in the gpio_ops. on top of
those you can have the command API, which accesses the gpio pins in a linear
fashion (like what you have now)
the reason for this is if you have a device on gpio (say some LEDs), which
knows (from platform data) that pins 3-6 of the parent device are connected to
this device. in your API, this has no way of working - even if you put global
pin numbering in the platform data, this would stop working if you had a PnP
GPIO controllers (say USB).
regards
Pavel Herrmann
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Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Hi!
Some observations:
Not sure what to do with CONFIG_SPL_STACK: altera was just using
symbol from linker script. Is there way to keep it like that? I'd hate
to invent magic constant.
Well, lets think about this. Previously, everyone has been saying use
this spot in SRAM or use this spot in DRAM (which has been setup
previously). But I think you should be able to do
#define CONFIG_SPL_STACK __linker_symbol and be done with it.
Yes, that seems to do the trick... if it is acceptable.
Pavel
commit 2cc99bcf39dc90ec4f43b949b8db75d5b019c92f
Author: Pavel pa...@ucw.cz
Date: Wed Aug 29 14:04:47 2012 +0200
Use CONFIG_SPL_START as suggested by Tom Rini.
Signed-off-by: Pavel Machek pa...@denx.de
diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c
index ca5f4cf..88f809d 100644
--- a/arch/arm/cpu/armv7/socfpga/spl.c
+++ b/arch/arm/cpu/armv7/socfpga/spl.c
@@ -27,8 +27,6 @@
DECLARE_GLOBAL_DATA_PTR;
-extern void __malloc_start, __malloc_end, __stack_start;
-
/*
* Console Initialization
*/
diff --git a/arch/arm/include/asm/arch-socfpga/spl.h
b/arch/arm/include/asm/arch-socfpga/spl.h
index 68ceec6..43efa67 100644
--- a/arch/arm/include/asm/arch-socfpga/spl.h
+++ b/arch/arm/include/asm/arch-socfpga/spl.h
@@ -1 +1,28 @@
+/*
+ * Copyright (C) 2012 Pavel Machek pa...@denx.de
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see http://www.gnu.org/licenses/.
+ */
+
+#ifndef _SOCFPGA_SPL_H_
+#define _SOCFPGA_SPL_H_
+
+/* Symbols from linker script */
+extern void __malloc_start, __malloc_end, __stack_start;
+
+#define CONFIG_SPL_STACK (__stack_start)
+
#define BOOT_DEVICE_RAM 1
+
+#endif
diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c
index 8c8806e..2d1f47a 100644
--- a/arch/arm/lib/spl.c
+++ b/arch/arm/lib/spl.c
@@ -41,9 +41,8 @@ extern char __bss_start[], __bss_end__[];
*/
void __weak board_init_f(ulong dummy)
{
- extern void __stack_start;
/* Set the stack pointer. */
- asm volatile(mov sp, %0\n : : r(__stack_start));
+ asm volatile(mov sp, %0\n : : r(CONFIG_SPL_STACK));
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end__ - __bss_start);
--
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(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Hi!
Ok, this is promissed patch for comments. socfpga spl.c now got
reasonably smaller. It is on top of
Looks good overall. I don't see asm/arch/spl.h but that's where you
could put the extern for __stack_start and then define CONFIG_SPL_STACK
to __stack_start.
Yep, that works, thanks!
http://github.com/trini/u-boot WIP/spl-improvements
Now... can I leave spl_ram_load_image() where it is? Probably add some
#ifdef?
Yeah, I think that's OK to start with, we can move things more later if
needed.
Cool.
+static void spl_console_init(void)
Looks like preloader_console_init :)
And works the same, too. Shared. Thanks!
+ /* setup MALLOC after clocks going faster */
+ mem_malloc_init((ulong) __malloc_start,
+ (__malloc_end - __malloc_start));
Shouldn't need this, should already be called before you get to
spl_board_init.
Yep, I set up CONFIG_SYS_... and it seems to work.
[snip]
diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
You should setup MEMORY declarations like the other u-boot-spl linker
scripts do so we get build-time confirmation that we haven't exceeded
our size limitations.
Ok, I'll do that as a next step.
+ . = . + 4;
+ . = ALIGN(8);
+ __malloc_start = .;
+ . = . + CONFIG_SPL_MALLOC_SIZE;
+ __malloc_end = .;
+
+ . = . + 4;
+ . = . + CONFIG_SPL_STACK_SIZE;
+ . = ALIGN(8);
+ __stack_start = .;
Do you really need to do . = . + 4 and then align statements?
Probably not. Removed.
+LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
q
Er? There's already a line for lib/libgeneric.o
Sorry. Deleted.
Thanks,
Pavel
diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c
index c12e339..bf0 100644
--- a/arch/arm/cpu/armv7/socfpga/spl.c
+++ b/arch/arm/cpu/armv7/socfpga/spl.c
@@ -46,9 +46,5 @@ void spl_board_init(void)
/* enable console uart printing */
preloader_console_init();
- /* setup MALLOC after clocks going faster */
- mem_malloc_init((ulong) __malloc_start,
- (__malloc_end - __malloc_start));
-
puts(SPL Boot\n);
}
diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
index de74341..2c90753 100644
--- a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
@@ -47,13 +47,11 @@ SECTIONS
__bss_end__ = .;
}
- . = . + 4;
. = ALIGN(8);
__malloc_start = .;
. = . + CONFIG_SPL_MALLOC_SIZE;
__malloc_end = .;
- . = . + 4;
. = . + CONFIG_SPL_STACK_SIZE;
. = ALIGN(8);
__stack_start = .;
diff --git a/arch/arm/include/asm/arch-socfpga/spl.h
b/arch/arm/include/asm/arch-socfpga/spl.h
index 43efa67..c9e5f50 100644
--- a/arch/arm/include/asm/arch-socfpga/spl.h
+++ b/arch/arm/include/asm/arch-socfpga/spl.h
@@ -22,6 +22,8 @@
extern void __malloc_start, __malloc_end, __stack_start;
#define CONFIG_SPL_STACK (__stack_start)
+#define CONFIG_SYS_SPL_MALLOC_START (__malloc_start)
+#define CONFIG_SYS_SPL_MALLOC_SIZE (__malloc_end - __malloc_start)
#define BOOT_DEVICE_RAM 1
diff --git a/common/spl/spl.c b/common/spl/spl.c
index b87df65..5adbf0e 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -118,7 +118,6 @@ static void __noreturn jump_to_image_no_args(void)
static void spl_ram_load_image(void)
{
- u32 err;
const struct image_header *header;
/* get the header */
diff --git a/spl/Makefile b/spl/Makefile
index d757448..f96c08e4 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -58,7 +58,6 @@ LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
LIBS-$(CONFIG_SPL_ONENAND_SUPPORT) += drivers/mtd/onenand/libonenand.o
LIBS-$(CONFIG_SPL_DMA_SUPPORT) += drivers/dma/libdma.o
LIBS-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/memory.o
-LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
--
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Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Hi! I'll take a look. OTOH, ammount of code duplication here is quite low, and redoing it on top of SPL series will mean delaying merge, right? Yes, that might happen. But we learned in the past that if we don't try to do such code consolidations right from the beginning, it won't happen at all (most of the time). So I'm also in favor of using the common SPL framework now. Please take a look at Tom Rini's v3 series: No problem, it really looks much better on top of Tom's patches. Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Hi Pavel, On 08/29/2012 02:30 PM, Pavel Machek wrote: Hi! I'll take a look. OTOH, ammount of code duplication here is quite low, and redoing it on top of SPL series will mean delaying merge, right? Yes, that might happen. But we learned in the past that if we don't try to do such code consolidations right from the beginning, it won't happen at all (most of the time). So I'm also in favor of using the common SPL framework now. Please take a look at Tom Rini's v3 series: No problem, it really looks much better on top of Tom's patches. Great. Thanks for the extra work. Cheers, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Hi!
diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
You should setup MEMORY declarations like the other u-boot-spl linker
scripts do so we get build-time confirmation that we haven't exceeded
our size limitations.
Hmm, I tried, but I don't know socfpga memory layout by heart.
Dinh, can you help here?
Thanks,
Pavel
diff --git a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
index 8867e06..1d8efb2 100644
--- a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
@@ -37,9 +37,9 @@ SECTIONS
{
.text :
{
- __start = .;
- arch/arm/cpu/armv7/start.o(.text)
- *(.text*)
+ __start = .;
+ arch/arm/cpu/armv7/start.o (.text)
+ *(.text*)
} .sram
. = ALIGN(4);
diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
index 2c90753..7cd409c 100644
--- a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
@@ -15,6 +15,8 @@
* along with this program. If not, see http://www.gnu.org/licenses/.
*/
+MEMORY { .sdram : ORIGIN = (0), LENGTH = (0x) }
+
OUTPUT_FORMAT(elf32-littlearm, elf32-littlearm, elf32-littlearm)
OUTPUT_ARCH(arm)
ENTRY(_start)
@@ -27,13 +29,13 @@ SECTIONS
{
arch/arm/cpu/armv7/start.o (.text)
*(.text*)
- }
+ } .sdram
. = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
+ .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } .sdram
. = ALIGN(4);
- .data : { *(SORT_BY_ALIGNMENT(.data*)) }
+ .data : { *(SORT_BY_ALIGNMENT(.data*)) } .sdram
. = ALIGN(4);
__image_copy_end = .;
@@ -45,7 +47,7 @@ SECTIONS
*(.bss*)
. = ALIGN(4);
__bss_end__ = .;
- }
+ } .sdram
. = ALIGN(8);
__malloc_start = .;
--
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[U-Boot] [PATCH 2/3] FEC: Rework the TX wait mechanism
The mechanism waiting for transmission to finish in fec_send() now
relies on the E-bit being cleared in the TX buffer descriptor. In
case of data cache being on, this means invalidation of data cache
above this TX buffer descriptor on each test for the E-bit being
cleared.
Apparently, there is another way to check if the transmission did
complete. This is by checking the TDAR bit in the X_DES_ACTIVE
register. Reading a register does not need any data cache invalidation,
which is beneficial.
Rework the sequence that wait for completion of the transmission so that
the TDAR bit is tested first and afterwards check the E-bit being clear.
This cuts down the number of cache invalidation calls to one.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Joe Hershberger joe.hershber...@ni.com
Cc: Fabio Estevam feste...@gmail.com
Cc: Otavio Salvador ota...@ossystems.com.br
Cc: Stefano Babic sba...@denx.de
---
drivers/net/fec_mxc.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 6f071e9..6ede464 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -768,19 +768,21 @@ static int fec_send(struct eth_device *dev, void *packet,
int length)
* invalidate data cache to see what's really in RAM. Also, we need
* barrier here.
*/
- invalidate_dcache_range(addr, addr + size);
- while (readw(fec-tbd_base[fec-tbd_index].status) FEC_TBD_READY) {
- udelay(1);
- invalidate_dcache_range(addr, addr + size);
- if (!timeout--) {
- ret = -EINVAL;
+ while (--timeout) {
+ if (!(readl(fec-eth-x_des_active) (1 24)))
break;
- }
}
- debug(fec_send: status 0x%x index %d\n,
+ if (!timeout)
+ ret = -EINVAL;
+
+ invalidate_dcache_range(addr, addr + size);
+ if (readw(fec-tbd_base[fec-tbd_index].status) FEC_TBD_READY)
+ ret = -EINVAL;
+
+ debug(fec_send: status 0x%x index %d ret %i\n,
readw(fec-tbd_base[fec-tbd_index].status),
- fec-tbd_index);
+ fec-tbd_index, ret);
/* for next transmission use the other buffer */
if (fec-tbd_index)
fec-tbd_index = 0;
--
1.7.10.4
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[U-Boot] [PATCH 1/3] FEC: Remove endless loop in the FEC driver
The FEC hardware sometimes errors out on data transfer and hangs in
the tightloop adjusted by this patch. So add timeout into the tightloop
to make such a hang recoverable.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Joe Hershberger joe.hershber...@ni.com
Cc: Fabio Estevam feste...@gmail.com
Cc: Otavio Salvador ota...@ossystems.com.br
Cc: Stefano Babic sba...@denx.de
---
drivers/net/fec_mxc.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index bc44d38..6f071e9 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -35,6 +35,12 @@
DECLARE_GLOBAL_DATA_PTR;
+/*
+ * Timeout the transfer after 5 mS. This is usually a bit more, since
+ * the code in the tightloops this timeout is used in adds some overhead.
+ */
+#define FEC_XFER_TIMEOUT 5000
+
#ifndef CONFIG_MII
#error CONFIG_MII has to be defined!
#endif
@@ -697,6 +703,8 @@ static int fec_send(struct eth_device *dev, void *packet,
int length)
unsigned int status;
uint32_t size, end;
uint32_t addr;
+ int timeout = FEC_XFER_TIMEOUT;
+ int ret = 0;
/*
* This routine transmits one frame. This routine only accepts
@@ -764,6 +772,10 @@ static int fec_send(struct eth_device *dev, void *packet,
int length)
while (readw(fec-tbd_base[fec-tbd_index].status) FEC_TBD_READY) {
udelay(1);
invalidate_dcache_range(addr, addr + size);
+ if (!timeout--) {
+ ret = -EINVAL;
+ break;
+ }
}
debug(fec_send: status 0x%x index %d\n,
@@ -775,7 +787,7 @@ static int fec_send(struct eth_device *dev, void *packet,
int length)
else
fec-tbd_index = 1;
- return 0;
+ return ret;
}
/**
--
1.7.10.4
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[U-Boot] [PATCH 3/3] FEC: Replace magic contants
Replace the magic contant 1 24 with properly defined bits.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Joe Hershberger joe.hershber...@ni.com
Cc: Fabio Estevam feste...@gmail.com
Cc: Otavio Salvador ota...@ossystems.com.br
Cc: Stefano Babic sba...@denx.de
---
drivers/net/fec_mxc.c |6 +++---
drivers/net/fec_mxc.h |3 +++
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 6ede464..3e232c7 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -256,7 +256,7 @@ static int miiphy_wait_aneg(struct eth_device *dev)
static int fec_rx_task_enable(struct fec_priv *fec)
{
- writel(1 24, fec-eth-r_des_active);
+ writel(FEC_R_DES_ACTIVE_RDAR, fec-eth-r_des_active);
return 0;
}
@@ -267,7 +267,7 @@ static int fec_rx_task_disable(struct fec_priv *fec)
static int fec_tx_task_enable(struct fec_priv *fec)
{
- writel(1 24, fec-eth-x_des_active);
+ writel(FEC_X_DES_ACTIVE_TDAR, fec-eth-x_des_active);
return 0;
}
@@ -769,7 +769,7 @@ static int fec_send(struct eth_device *dev, void *packet,
int length)
* barrier here.
*/
while (--timeout) {
- if (!(readl(fec-eth-x_des_active) (1 24)))
+ if (!(readl(fec-eth-x_des_active) FEC_X_DES_ACTIVE_TDAR))
break;
}
diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h
index 852b2e0..203285a 100644
--- a/drivers/net/fec_mxc.h
+++ b/drivers/net/fec_mxc.h
@@ -213,6 +213,9 @@ struct ethernet_regs {
#define FEC_X_WMRK_STRFWD 0x0100
+#define FEC_X_DES_ACTIVE_TDAR 0x0100
+#define FEC_R_DES_ACTIVE_RDAR 0x0100
+
#if defined(CONFIG_MX25) || defined(CONFIG_MX53)
/* defines for MIIGSK */
/* RMII frequency control: 0=50MHz, 1=5MHz */
--
1.7.10.4
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[U-Boot] [PATCH] ARM926: Add mb to the cache invalidate/flush
Add memory barrier to cache invalidate and flush calls. This prevents
compiler from reordering the code around these, possibly generating
invalid results.
Signed-off-by: Marek Vasut ma...@denx.de
CC: Albert Aribaud albert.u.b...@aribaud.net
Cc: Fabio Estevam feste...@gmail.com
Cc: Otavio Salvador ota...@ossystems.com.br
Cc: Stefano Babic sba...@denx.de
---
arch/arm/cpu/arm926ejs/cache.c |8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
index 2740ad7..c4102f6 100644
--- a/arch/arm/cpu/arm926ejs/cache.c
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -67,7 +67,8 @@ void invalidate_dcache_range(unsigned long start, unsigned
long stop)
return;
while (start stop) {
- asm volatile(mcr p15, 0, %0, c7, c6, 1\n : : r(start));
+ asm volatile(mcr p15, 0, %0, c7, c6, 1\n
+ : : r(start) : memory);
start += CONFIG_SYS_CACHELINE_SIZE;
}
}
@@ -78,11 +79,12 @@ void flush_dcache_range(unsigned long start, unsigned long
stop)
return;
while (start stop) {
- asm volatile(mcr p15, 0, %0, c7, c14, 1\n : : r(start));
+ asm volatile(mcr p15, 0, %0, c7, c14, 1\n
+ : : r(start) : memory);
start += CONFIG_SYS_CACHELINE_SIZE;
}
- asm volatile(mcr p15, 0, %0, c7, c10, 4\n : : r(0));
+ asm volatile(mcr p15, 0, %0, c7, c10, 4\n : : r(0) : memory);
}
void flush_cache(unsigned long start, unsigned long size)
--
1.7.10.4
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[U-Boot] [BUG] disk drivers do not free private memory
Hi, While implementing a loopback block device for the sandbox board, i have found an issue in block drivers. From what i can tell, none of the drivers ever free() their private data (that is sata_dev_desc[]-priv), some of them (dwc_ahsata, fsl_sata) do not even check if they are already inited. If i have one of these drivers, i can repeatedly do sata init until all my memory is leaked. Noone is stupid enough to do this, but it still shouldn't be possible. Best regards, Pavel Herrmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Changes for u-boot-ti/master
Hey all, If you have changes for u-boot-ti/master, please post them ASAP. The merge window formally closed on August 18th. I intend to only take bug fixes (rather than minor improvements) starting September 1. I will continue to review larger changes and start committing to u-boot-ti/next at that point. Thanks all! -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Loop block device for sandbox
This driver uses files as block devices, can be used for testing disk
operations on sandbox. Port count and filenames are set in board config.
Signed-off-by: Pavel Herrmann morpheus.i...@gmail.com
CC: Marek Vasut ma...@denx.de
---
drivers/block/Makefile| 1 +
drivers/block/loop.c | 107 ++
include/configs/sandbox.h | 9
3 files changed, 117 insertions(+)
create mode 100644 drivers/block/loop.c
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index f1ebdcc..5eecf37 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -40,6 +40,7 @@ COBJS-$(CONFIG_SATA_SIL) += sata_sil.o
COBJS-$(CONFIG_IDE_SIL680) += sil680.o
COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o
COBJS-$(CONFIG_SYSTEMACE) += systemace.o
+COBJS-${CONFIG_SATA_LOOP} += loop.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/block/loop.c b/drivers/block/loop.c
new file mode 100644
index 000..c9edfc3
--- /dev/null
+++ b/drivers/block/loop.c
@@ -0,0 +1,107 @@
+/*
+ * (C) Copyright 2012
+ * Pavel Herrmann morpheus.i...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include part.h
+#include ata.h
+#include libata.h
+#include errno.h
+#include os.h
+
+static const char revision[] = 0.0;
+static const char vendor[] = loopback;
+
+static const char * const filenames[] = CONFIG_SATA_LOOP_DISKS;
+static int max_devs = CONFIG_SYS_SATA_MAX_DEVICE;
+
+extern block_dev_desc_t sata_dev_desc[];
+
+int init_sata(int dev)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd;
+
+ if ((dev 0) || (dev = max_devs)) {
+ printf(file index %d is out of range\n, dev);
+ return -EINVAL;
+ }
+
+ fd = os_open(filenames[dev], OS_O_RDWR);
+ /* this is ugly, but saves allocation for 1 int */
+ pdev-priv = (void *) (long) fd;
+
+ return 0;
+}
+
+lbaint_t sata_read(int dev, lbaint_t start, lbaint_t blkcnt, void *buffer)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
+ lbaint_t retval;
+
+ os_lseek(fd, start*ATA_SECT_SIZE, OS_SEEK_SET);
+ retval = os_read(fd, buffer, ATA_SECT_SIZE * blkcnt);
+
+ return retval/ATA_SECT_SIZE;
+}
+
+lbaint_t sata_write(int dev, lbaint_t start, lbaint_t blkcnt, void *buffer)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
+ lbaint_t retval;
+
+ os_lseek(fd, start*ATA_SECT_SIZE, OS_SEEK_SET);
+ retval = os_write(fd, buffer, ATA_SECT_SIZE * blkcnt);
+
+ return retval/ATA_SECT_SIZE;
+}
+
+int scan_sata(int dev)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
+ int namelen;
+ lbaint_t bytes = 0;
+ memcpy(pdev-vendor, vendor, sizeof(vendor));
+ memcpy(pdev-revision, revision, sizeof(revision));
+ namelen = sizeof(filenames[dev]);
+ if (namelen 20)
+ namelen = 20;
+ memcpy(pdev-product, filenames[dev], namelen);
+ pdev-product[20] = 0;
+
+ if (fd != -1) {
+ pdev-type = DEV_TYPE_HARDDISK;
+ pdev-blksz = ATA_SECT_SIZE;
+ pdev-lun = 0;
+
+ bytes = os_lseek(fd, 0, OS_SEEK_END);
+ pdev-lba = bytes/ATA_SECT_SIZE;
+ }
+
+ printf(SATA loop info:\nfilename: %s\nsize: %lu\nblock count: %lu\n,
+ filenames[dev], bytes, pdev-lba);
+
+ return 0;
+}
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index 0220386..412341f 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -93,4 +93,13 @@
stdout=serial\0 \
stderr=serial\0
+/* SATA loopback device */
+#define CONFIG_CMD_SATA
+#define CONFIG_SATA_LOOP
+#define CONFIG_SATA_LOOP_DISKS {disk1, disk2}
+#define CONFIG_SYS_SATA_MAX_DEVICE 2
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+
#endif
--
1.7.12
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Re: [U-Boot] [PATCH] Loop block device for sandbox
More CC
On Wednesday 29 August 2012 17:46:43 Pavel Herrmann wrote:
This driver uses files as block devices, can be used for testing disk
operations on sandbox. Port count and filenames are set in board config.
Signed-off-by: Pavel Herrmann morpheus.i...@gmail.com
CC: Marek Vasut ma...@denx.de
---
drivers/block/Makefile| 1 +
drivers/block/loop.c | 107
++ include/configs/sandbox.h |
9
3 files changed, 117 insertions(+)
create mode 100644 drivers/block/loop.c
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index f1ebdcc..5eecf37 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -40,6 +40,7 @@ COBJS-$(CONFIG_SATA_SIL) += sata_sil.o
COBJS-$(CONFIG_IDE_SIL680) += sil680.o
COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o
COBJS-$(CONFIG_SYSTEMACE) += systemace.o
+COBJS-${CONFIG_SATA_LOOP} += loop.o
COBJS:= $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/block/loop.c b/drivers/block/loop.c
new file mode 100644
index 000..c9edfc3
--- /dev/null
+++ b/drivers/block/loop.c
@@ -0,0 +1,107 @@
+/*
+ * (C) Copyright 2012
+ * Pavel Herrmann morpheus.i...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include part.h
+#include ata.h
+#include libata.h
+#include errno.h
+#include os.h
+
+static const char revision[] = 0.0;
+static const char vendor[] = loopback;
+
+static const char * const filenames[] = CONFIG_SATA_LOOP_DISKS;
+static int max_devs = CONFIG_SYS_SATA_MAX_DEVICE;
+
+extern block_dev_desc_t sata_dev_desc[];
+
+int init_sata(int dev)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd;
+
+ if ((dev 0) || (dev = max_devs)) {
+ printf(file index %d is out of range\n, dev);
+ return -EINVAL;
+ }
+
+ fd = os_open(filenames[dev], OS_O_RDWR);
+ /* this is ugly, but saves allocation for 1 int */
+ pdev-priv = (void *) (long) fd;
+
+ return 0;
+}
+
+lbaint_t sata_read(int dev, lbaint_t start, lbaint_t blkcnt, void *buffer)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
+ lbaint_t retval;
+
+ os_lseek(fd, start*ATA_SECT_SIZE, OS_SEEK_SET);
+ retval = os_read(fd, buffer, ATA_SECT_SIZE * blkcnt);
+
+ return retval/ATA_SECT_SIZE;
+}
+
+lbaint_t sata_write(int dev, lbaint_t start, lbaint_t blkcnt, void *buffer)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
+ lbaint_t retval;
+
+ os_lseek(fd, start*ATA_SECT_SIZE, OS_SEEK_SET);
+ retval = os_write(fd, buffer, ATA_SECT_SIZE * blkcnt);
+
+ return retval/ATA_SECT_SIZE;
+}
+
+int scan_sata(int dev)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
+ int namelen;
+ lbaint_t bytes = 0;
+ memcpy(pdev-vendor, vendor, sizeof(vendor));
+ memcpy(pdev-revision, revision, sizeof(revision));
+ namelen = sizeof(filenames[dev]);
+ if (namelen 20)
+ namelen = 20;
+ memcpy(pdev-product, filenames[dev], namelen);
+ pdev-product[20] = 0;
+
+ if (fd != -1) {
+ pdev-type = DEV_TYPE_HARDDISK;
+ pdev-blksz = ATA_SECT_SIZE;
+ pdev-lun = 0;
+
+ bytes = os_lseek(fd, 0, OS_SEEK_END);
+ pdev-lba = bytes/ATA_SECT_SIZE;
+ }
+
+ printf(SATA loop info:\nfilename: %s\nsize: %lu\nblock count: %lu\n,
+ filenames[dev], bytes, pdev-lba);
+
+ return 0;
+}
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index 0220386..412341f 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -93,4 +93,13 @@
stdout=serial\0 \
stderr=serial\0
+/* SATA loopback device */
+#define CONFIG_CMD_SATA
+#define CONFIG_SATA_LOOP
+#define CONFIG_SATA_LOOP_DISKS {disk1, disk2}
+#define CONFIG_SYS_SATA_MAX_DEVICE 2
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+
#endif
[U-Boot] [PATCH] mx28evk: Add USB Ethernet support
From: Fabio Estevam fabio.este...@freescale.com Add USB Ethernet support. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx28evk.h |3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 8d83495..edf873e 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -185,6 +185,9 @@ #defineCONFIG_EHCI_MXS_PORT 1 #defineCONFIG_EHCI_IS_TDI #defineCONFIG_USB_STORAGE +#defineCONFIG_USB_HOST_ETHER +#defineCONFIG_USB_ETHER_ASIX +#defineCONFIG_USB_ETHER_SMSC95XX #endif /* I2C */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/9] This patchset updates boards based on the TAM3517 SOM.
On Wed, Aug 29, 2012 at 01:21:58PM +0200, Stefano Babic wrote: The MAC address provided by the manufacturer can be read from the EEPROM. Add also Video support to the mt_ventoux (TAM3517) board. Changes in v2: - Set dispc_config before checking for framebuffer - Use a common macro to set up the horizontal and vertical timing (Heiko Schocker) to not break beagleboard (Jeroen Hofstee) Changes in v3: - Add further macros to define the single fields (Jeroen Hofstee) I gave this a quick spin on Beagleboard / Beagleboard xM due to the video changes, and all is as good as before. Tested-by: Tom Rini tr...@ti.com -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v10 00/16] split tegra20 arm7 code into separate SPL
Allen/Albert, -Original Message- From: Allen Martin [mailto:amar...@nvidia.com] Sent: Tuesday, August 28, 2012 5:08 PM To: Tom Warren; swar...@wwwdotorg.org; s...@chromium.org; thierry.red...@avionic-design.de; d...@lynxeye.de Cc: u-boot@lists.denx.de; Allen Martin Subject: [PATCH v10 00/16] split tegra20 arm7 code into separate SPL This patch series fixes a long standing problem with the tegra20 u-boot build. Tegra20 contains an ARM7TDMI boot processor and a Cortex A9 main processor. Prior to this patch series this was accomplished by #ifdefing out any armv7 code from the early boot sequence and creating a single binary that runs on both both the ARM7TDMI and A9. This was very fragile as changes to compiler options or any additions or rearranging of the early boot code could add additional armv7 specific code causing it to fail on the ARM7TDMI. This patch series pulls all the armv4t code out into a separate SPL that does nothing more than initialize the A9 and transfer control to it. The resultint SPL and armv7 u-boot are concatenated together into a single image. This patch series is also available from: git://github.com/arm000/u-boot.git branch: tegra-spl-v10 Changes: v10: - added fix to MAKEALL script so that it correctly parses new boards.cfg I applied this to u-boot-tegra/master and pushed the new code upstream. The pull request remains the same (except for the inclusion of the MAKEALL patch, of course). I can send a new one if required - please let me know. Currently running a ./MAKEALL arm - I assume it'll complete w/o errors (except for the ohci-hcd.c warnings I mentioned previously that are not due to this patch series). Thanks, Tom syntax v9: - rebased mkconfig patch on top of version that went upstream to u- boot/master - fixed a whitespace checkpatch warning in arch/arm/cpu/arm720t/cpu.c v8: - rebased to u-boot-tegra/master - added changes to work with arm: Provide lowlevel_init C function wrapper for v7 - Moved JTAG init in SPL to earlier - fixed TEXT_BASE in SPL to use SPL TEXT_BASE not main u-boot TEXT_BASE - pad exception handlers in arm720t to 64 bytes with 0x12345678 to match armv7 - added another tegra2-tegra20 rename for some new code that was added to arch/arm/cpu/armv7/start.S - rolled in the mkconfig fix that was breaking ARM platforms that don't define SoC v7: - rebased to u-boot-tegra/next - added Acks and Tested-Bys v6: - changed combined SPL/u-boot target names to u-boot-dtb-tegra.bin and u- boot-nodtb-tegra.bin - fixed regression introduced in v5 that caused git bisect to fail to build at one of the patches - fix USE_PRIVATE_LIBGCC for SPL build and enable it - fix libtegra20-common.so link so it works if building with out of tree OBJDIR v5: - added missing mkdir rules in all tegra20 board Makefiles that include common code and changed them to be unconditional - make new u-boot-dtb-t2.bin rule default for tegra20 and copy resulting binary over u-boot.bin v4: - rebased to u-boot-tegra/next - reordered entire patch series to preserve git bisect, verified build and boot at each patch - merged patches that add SPL config defines and removes duplicate code from u-boot init, these have to go in atomically to preserve building at each patch - fixed compiler warnings introduced - fixed blank line at end of file on cpu.c - renamed u-boot.t2 to u-boot-t2.bin - cleaned up config.mk generation in mkconfig to make it more readable - added some text to clarify using arm720t code for arm7tdmi - rearranged SPL memory map to make resulting SPL + u-boot image much smaller - removed separate PAD_TO define in favor of just using CONFIG_SYS_TEXT_BASE - moved warmboot_save_sdram_params() from dram_init() to board_init() v3: - git bisect still does not work across this series, I'm saving that for the next revision, but I had enough changes that I wanted to get this out for review - expanded the tegra2 - tegra20 rename to include functions/variables/ defines - rebased to u-boot-tegra/next - removed some extra -march=armv4t flags, kept armv4t flags on warmboot_avp since it's special - removed bashisms from mkconfig - renamed CONFIG_MACH_TEGRA_GENERIC to CONFIG_TEGRA - moved SPL overrides to tegra2-common-post.h - changed SPL base address to 0x108000, u-boot goes to 0x208000 - moved warboot_save_sdram_params fix to separate patch - remove USE_PRIVATE_LIBGCC from non SPL build - expanded SPL support to all tegra20 boards, not just seaboard v2: - renamed tegra2 to tegra20 to match kernel and devicetree naming policy - pulled all SPL related config overrides to a separate file to clean up ifdefs from seabard.h - rebased to TOT u-boot/master and fixed a bug related to init sequence changes between this patch series and new EMC code - made u-boot.t2 target work even if CONFIG_OF is disabled - added back USE_PRIVATE_LIBGCC
Re: [U-Boot] [PATCH v3 0/9] This patchset updates boards based on the TAM3517 SOM.
On 08/29/2012 04:21 AM, Stefano Babic wrote: The MAC address provided by the manufacturer can be read from the EEPROM. Add also Video support to the mt_ventoux (TAM3517) board. Changes in v2: - Set dispc_config before checking for framebuffer - Use a common macro to set up the horizontal and vertical timing (Heiko Schocker) to not break beagleboard (Jeroen Hofstee) Changes in v3: - Add further macros to define the single fields (Jeroen Hofstee) Barring further comments, I plan to pick this up Friday for u-boot-ti/master, thanks! -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] SPL: Enable use of custom defined U-Boot entry point
On Tue, Aug 28, 2012 at 10:50:59AM +0200, Stefan Roese wrote: By setting CONFIG_SYS_UBOOT_START boards can now use a different entry point for their U-Boot image. So the U-Boot entry point is not fixed to CONFIG_SYS_TEXT_BASE any more. Signed-off-by: Stefan Roese s...@denx.de Picked up for my v6, thanks! -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
On Wed, Aug 29, 2012 at 03:41:54PM +0200, Pavel Machek wrote: Hi! diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds You should setup MEMORY declarations like the other u-boot-spl linker scripts do so we get build-time confirmation that we haven't exceeded our size limitations. Hmm, I tried, but I don't know socfpga memory layout by heart. Dinh, can you help here? I think once you get the answers you should be able to re-post the series cleanly and depend on my v5 (or v6) branch. Thanks! -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] ./MAKEALL arm is buggy
On Wed, Aug 29, 2012 at 09:55:17AM -0700, Tom Warren wrote: Allen/Albert, -Original Message- From: Allen Martin [mailto:amar...@nvidia.com] Sent: Tuesday, August 28, 2012 5:08 PM To: Tom Warren; swar...@wwwdotorg.org; s...@chromium.org; thierry.red...@avionic-design.de; d...@lynxeye.de Cc: u-boot@lists.denx.de; Allen Martin Subject: [PATCH v10 00/16] split tegra20 arm7 code into separate SPL This patch series fixes a long standing problem with the tegra20 u-boot build. Tegra20 contains an ARM7TDMI boot processor and a Cortex A9 main processor. Prior to this patch series this was accomplished by #ifdefing out any armv7 code from the early boot sequence and creating a single binary that runs on both both the ARM7TDMI and A9. This was very fragile as changes to compiler options or any additions or rearranging of the early boot code could add additional armv7 specific code causing it to fail on the ARM7TDMI. This patch series pulls all the armv4t code out into a separate SPL that does nothing more than initialize the A9 and transfer control to it. The resultint SPL and armv7 u-boot are concatenated together into a single image. This patch series is also available from: git://github.com/arm000/u-boot.git branch: tegra-spl-v10 Changes: v10: - added fix to MAKEALL script so that it correctly parses new boards.cfg I applied this to u-boot-tegra/master and pushed the new code upstream. The pull request remains the same (except for the inclusion of the MAKEALL patch, of course). I can send a new one if required - please let me know. Currently running a ./MAKEALL arm - I assume it'll complete w/o errors (except for the ohci-hcd.c warnings I mentioned previously that are not due to this patch series). Changing subject line to get Albert's attention Thanks Tom. I traced down why ./MAKEALL arm and ./MAKEALL -a arm come up with a different list of boards. It's because the LIST_arm rule in MAKEALL which ./MAKEALL arm uses is buggy and error prone. It's building all the Atmel boards twice and skipping a bunch of others like the arm720t, arm946es, and arm1176 boards. I'm going to work on a patch to make LIST_arm use the same logic as ./MAKEALL -a arm but in the mean time I strongly suggest using ./MAKEALL -a arm since it generates the correct list of boards. -Allen -- nvpublic ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] MAKEALL: fix ARM board lists
The LIST_arm rule included the Atmel boards twice (by virtue of
including both LIST_at91 and LIST_ARM9) and was missing all the
arm720t, arm946es, and arm1176 boards. Change this list to use
boards_by_arch() which is less error prone. After this change
./MAKEALL arm and ./MAKEALL -a arm build the same boards.
Also add the missing arm946es and arm1176 processors to the ARM9
and ARM11 lists respectively and add an ARM7 list for the arm720t
processor.
Signed-off-by: Allen Martin amar...@nvidia.com
---
MAKEALL | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/MAKEALL b/MAKEALL
index 6b9ff30..cdb65e7 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -331,18 +331,27 @@ LIST_ppc=\
LIST_SA=$(boards_by_cpu sa1100)
#
+## ARM7 Systems
+#
+
+LIST_ARM7=$(boards_by_cpu arm720t)
+
+#
## ARM9 Systems
#
LIST_ARM9=$(boards_by_cpu arm920t)\
$(boards_by_cpu arm926ejs) \
$(boards_by_cpu arm925t)\
+ $(boards_by_cpu arm946es) \
#
## ARM11 Systems
#
-LIST_ARM11=$(boards_by_cpu arm1136)
+LIST_ARM11=$(boards_by_cpu arm1136) \
+ $(boards_by_cpu arm1176)\
+
#
## ARMV7 Systems
@@ -368,16 +377,7 @@ LIST_ixp=$(boards_by_cpu ixp)
## ARM groups
#
-LIST_arm= \
- ${LIST_SA} \
- ${LIST_ARM9}\
- ${LIST_ARM10} \
- ${LIST_ARM11} \
- ${LIST_ARMV7} \
- ${LIST_at91}\
- ${LIST_pxa} \
- ${LIST_ixp} \
-
+LIST_arm=$(boards_by_arch arm)
#
## MIPS Systems(default = big endian)
--
1.7.9.5
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Re: [U-Boot] [PATCH] MAKEALL: fix ARM board lists
On 08/29/2012 12:13 PM, Allen Martin wrote:
The LIST_arm rule included the Atmel boards twice (by virtue of
including both LIST_at91 and LIST_ARM9) and was missing all the
arm720t, arm946es, and arm1176 boards. Change this list to use
boards_by_arch() which is less error prone. After this change
./MAKEALL arm and ./MAKEALL -a arm build the same boards.
Also add the missing arm946es and arm1176 processors to the ARM9
and ARM11 lists respectively and add an ARM7 list for the arm720t
processor.
Good find! Would you mind looking quickly over the other arches to see
if they have any similar but now obvious problems (where LIST_${ARCH}
doesn't use boards_by_arch)) ? Thanks!
--
Tom
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Re: [U-Boot] [PATCH] MAKEALL: fix ARM board lists
On Wed, Aug 29, 2012 at 01:03:40PM -0700, Tom Rini wrote:
On 08/29/2012 12:13 PM, Allen Martin wrote:
The LIST_arm rule included the Atmel boards twice (by virtue of
including both LIST_at91 and LIST_ARM9) and was missing all the
arm720t, arm946es, and arm1176 boards. Change this list to use
boards_by_arch() which is less error prone. After this change
./MAKEALL arm and ./MAKEALL -a arm build the same boards.
Also add the missing arm946es and arm1176 processors to the ARM9
and ARM11 lists respectively and add an ARM7 list for the arm720t
processor.
Good find! Would you mind looking quickly over the other arches to see
if they have any similar but now obvious problems (where LIST_${ARCH}
doesn't use boards_by_arch)) ? Thanks!
--
Tom
By experiment it look like m68k and mips have problems too, I'll investigate:
$ for i in $(awk '($1 !~ /^#/) {print $2}' boards.cfg | sort | uniq) ; do
echo $i
./MAKEALL -l -a $i | wc -l
./MAKEALL -l $i | wc -l
done
arm
250
250
avr32
9
9
blackfin
34
34
m68k
44
50
microblaze
1
1
mips
25
19
nds32
3
3
nios2
3
3
openrisc
1
1
powerpc
637
637
sandbox
1
1
sh
20
20
sparc
5
5
x86
3
3
-Allen
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Re: [U-Boot] [PATCH] mx28evk: Add USB Ethernet support
Dear Fabio Estevam, From: Fabio Estevam fabio.este...@freescale.com Add USB Ethernet support. Reviewed-by: Marek Vasut ma...@denx.de Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx28evk.h |3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 8d83495..edf873e 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -185,6 +185,9 @@ #define CONFIG_EHCI_MXS_PORT 1 #define CONFIG_EHCI_IS_TDI #define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX #endif /* I2C */ Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] MX28: SPI: Fix CTRL0 not being written at end of DMA transfer
The final DMA descriptor doesn't properly write CTRL0 register
during the DMA transfer. Properly write CTRL0 to make sure the
transmission is complete.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Fabio Estevam feste...@gmail.com
Cc: Otavio Salvador ota...@ossystems.com.br
Cc: Stefano Babic sba...@denx.de
---
drivers/spi/mxs_spi.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 168dbe4..5ee0ea1 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -226,6 +226,7 @@ static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave,
uint32_t cache_data_count;
int dmach;
int tl;
+ int ret = 0;
ALLOC_CACHE_ALIGN_BUFFER(struct mxs_dma_desc, desc, desc_count);
@@ -302,12 +303,25 @@ static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave,
MXS_DMA_DESC_IRQ | MXS_DMA_DESC_DEC_SEM;
if (flags SPI_XFER_END) {
ctrl0 = ~SSP_CTRL0_LOCK_CS;
- dp-cmd.pio_words[0] = ctrl0 | SSP_CTRL0_IGNORE_CRC;
+ ctrl0 |= SSP_CTRL0_IGNORE_CRC;
+ dp-cmd.pio_words[0] = ctrl0;
}
mxs_dma_desc_append(dmach, dp);
if (mxs_dma_go(dmach))
- return -EINVAL;
+ ret = -EINVAL;
+
+ /*
+* The DMA contains further hidden gems, like the last transfer
+* not writing the CTRL0 PIO word properly. Write the PIO word
+* directly here for proper operation. This issue was detected
+* on S25FL064P chip by issuing:
+*
+* sf probe 2:0 ; sf read 0x4200 0 0x80 ; sf probe 2:0
+*
+* This resulted in garbled subsequent probe.
+*/
+ writel(ctrl0, ssp_regs-hw_ssp_ctrl0_reg);
/* The data arrived into DRAM, invalidate cache over them */
if (!write) {
@@ -315,7 +329,7 @@ static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave,
(uint32_t)(data + cache_data_count));
}
- return 0;
+ return ret;
}
int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
--
1.7.10.4
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Re: [U-Boot] [PATCH 6/6] powerpc/mpc8xxx: fix core id for multicore booting
On Fri, Aug 17, 2012 at 1:20 PM, York Sun york...@freescale.com wrote: + * 8-19 CHIP_ID,2’b00 - SoC 1 + * all others - reserved + * 20-24 CLUSTER_ID 5’b0 - CCM 1 + * all others - reserved + * 25-26 CORE_CLUSTER_ID 2’b00 - cluster 1 + * 2’b01 - cluster 2 + * 2’b10 - cluster 3 + * 2’b11 - cluster 4 + * 27-28 CORE_ID 2’b00 - core 0 + * 2’b01 - core 1 + * 2’b10 - core 2 + * 2’b11 - core 3 + * 29-31 THREAD_ID 3’b000 - thread 0 + * 3’b001 - thread 1 It's too bad no one noticed the Unicode characters in this comment before the patch was applied. http://www.fileformat.info/info/unicode/char/2019/index.htm -- Timur Tabi Linux kernel developer at Freescale ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v10 00/16] split tegra20 arm7 code into separate SPL
Hello Tom, Am Mittwoch, den 29.08.2012, 09:55 -0700 schrieb Tom Warren: Allen/Albert, -Original Message- From: Allen Martin [mailto:amar...@nvidia.com] Sent: Tuesday, August 28, 2012 5:08 PM To: Tom Warren; swar...@wwwdotorg.org; s...@chromium.org; thierry.red...@avionic-design.de; d...@lynxeye.de Cc: u-boot@lists.denx.de; Allen Martin Subject: [PATCH v10 00/16] split tegra20 arm7 code into separate SPL This patch series fixes a long standing problem with the tegra20 u-boot build. Tegra20 contains an ARM7TDMI boot processor and a Cortex A9 main processor. Prior to this patch series this was accomplished by #ifdefing out any armv7 code from the early boot sequence and creating a single binary that runs on both both the ARM7TDMI and A9. This was very fragile as changes to compiler options or any additions or rearranging of the early boot code could add additional armv7 specific code causing it to fail on the ARM7TDMI. This patch series pulls all the armv4t code out into a separate SPL that does nothing more than initialize the A9 and transfer control to it. The resultint SPL and armv7 u-boot are concatenated together into a single image. This patch series is also available from: git://github.com/arm000/u-boot.git branch: tegra-spl-v10 Changes: v10: - added fix to MAKEALL script so that it correctly parses new boards.cfg I applied this to u-boot-tegra/master and pushed the new code upstream. The pull request remains the same (except for the inclusion of the MAKEALL patch, of course). I can send a new one if required - please let me know. Currently running a ./MAKEALL arm - I assume it'll complete w/o errors (except for the ohci-hcd.c warnings I mentioned previously that are not due to this patch series). Are you going to refresh the next branch anytime soon or are you planing on doing this once the master branch is merged to arm/master? Thanks, Lucas ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MAKEALL: fix ARM board lists
On Wed, Aug 29, 2012 at 01:13:39PM -0700, Allen Martin wrote:
On Wed, Aug 29, 2012 at 01:03:40PM -0700, Tom Rini wrote:
On 08/29/2012 12:13 PM, Allen Martin wrote:
The LIST_arm rule included the Atmel boards twice (by virtue of
including both LIST_at91 and LIST_ARM9) and was missing all the
arm720t, arm946es, and arm1176 boards. Change this list to use
boards_by_arch() which is less error prone. After this change
./MAKEALL arm and ./MAKEALL -a arm build the same boards.
Also add the missing arm946es and arm1176 processors to the ARM9
and ARM11 lists respectively and add an ARM7 list for the arm720t
processor.
Good find! Would you mind looking quickly over the other arches to see
if they have any similar but now obvious problems (where LIST_${ARCH}
doesn't use boards_by_arch)) ? Thanks!
--
Tom
By experiment it look like m68k and mips have problems too, I'll investigate:
It looks like mips splits out the little endian boards into a virtual
mips_el architecture that doesn't actually exist in boardfs.cfg, so
maybe I won't touch that. I founds some other missing/duplicate
boards in mips and m68k though so I'll add those to the patch.
-Allen
--
nvpublic
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Re: [U-Boot] [PATCH v4 1/5] net/bootp: add VCI support for BOOTP also
Hi Ilya, On Sun, Aug 5, 2012 at 4:21 PM, Ilya Yanok ilya.ya...@cogentembedded.com wrote: Vendor Class Identifier option is common to BOOTP and DHCP and can be useful without PXE. So send VCI in both BOOTP and DHCP requests if CONFIG_BOOTP_VCI_STRING is defined. Signed-off-by: Ilya Yanok ilya.ya...@cogentembedded.com --- Acked-by: Joe Hershberger joe.hershber...@ni.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] MAKEALL: fix per arch board lists
The LIST_arm rule included the Atmel boards twice (by virtue of
including both LIST_at91 and LIST_ARM9) and was missing all the
arm720t, arm946es, and arm1176 boards. Change this list to use
boards_by_arch() which is less error prone. After this change
./MAKEALL arm and ./MAKEALL -a arm build the same boards.
Also fix up some missing and duplicate boards to arm, mips, and m68k.
Signed-off-by: Allen Martin amar...@nvidia.com
---
MAKEALL | 34 +++---
1 file changed, 15 insertions(+), 19 deletions(-)
diff --git a/MAKEALL b/MAKEALL
index 6b9ff30..24d4fff 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -331,18 +331,27 @@ LIST_ppc=\
LIST_SA=$(boards_by_cpu sa1100)
#
+## ARM7 Systems
+#
+
+LIST_ARM7=$(boards_by_cpu arm720t)
+
+#
## ARM9 Systems
#
LIST_ARM9=$(boards_by_cpu arm920t)\
$(boards_by_cpu arm926ejs) \
$(boards_by_cpu arm925t)\
+ $(boards_by_cpu arm946es) \
#
## ARM11 Systems
#
-LIST_ARM11=$(boards_by_cpu arm1136)
+LIST_ARM11=$(boards_by_cpu arm1136) \
+ $(boards_by_cpu arm1176)\
+
#
## ARMV7 Systems
@@ -368,16 +377,7 @@ LIST_ixp=$(boards_by_cpu ixp)
## ARM groups
#
-LIST_arm= \
- ${LIST_SA} \
- ${LIST_ARM9}\
- ${LIST_ARM10} \
- ${LIST_ARM11} \
- ${LIST_ARMV7} \
- ${LIST_at91}\
- ${LIST_pxa} \
- ${LIST_ixp} \
-
+LIST_arm=$(boards_by_arch arm)
#
## MIPS Systems(default = big endian)
@@ -385,6 +385,9 @@ LIST_arm= \
LIST_mips4kc= \
incaip \
+ incaip_100MHz \
+ incaip_133MHz \
+ incaip_150MHz \
qemu_mips \
vct_platinum\
vct_platinum_small \
@@ -458,14 +461,7 @@ LIST_microblaze=$(boards_by_arch microblaze)
## ColdFire Systems
#
-LIST_m68k=$(boards_by_arch m68k)
- EB+MCF-EV123\
- EB+MCF-EV123_internal \
- M52277EVB \
- M5235EVB\
- M54451EVB \
- M54455EVB \
-
+LIST_m68k=$(boards_by_arch m68k)
LIST_coldfire=${LIST_m68k}
#
--
1.7.9.5
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Re: [U-Boot] [PATCH v5 4/5] OMAP: networking support for SPL
Hi Ilya,
On Tue, Aug 7, 2012 at 3:07 AM, Ilya Yanok
ilya.ya...@cogentembedded.com wrote:
This patch adds support for networking in SPL. Some devices are
capable of loading SPL via network so it makes sense to load the
main U-Boot binary via network too. This patch tries to use
existing network code as much as possible. Unfortunately, it depends
on environment which in turn depends on other code so SPL size
is increased significantly. No effort was done to decouple network
code and environment so far.
Signed-off-by: Ilya Yanok ilya.ya...@cogentembedded.com
---
Changes in v3:
- use BOOTP in SPL regardless of CONFIG_CMD_DHCP
- add support for setting different VCI in SPL
Changes in v4:
- fix compilation of SPL's libcommon with CONFIG_HUSH_PARSER
and CONFIG_BOOTD defined
- rename spl_eth.c to spl_net.c
- set ethact variable if device name is passed
Changes in v5:
- set up guards in cmd_nvedit.c more carefully
- now we don't need command.c and only need main.c for
show_boot_progress() so defined it to be noop and remove
both files from SPL sources
- SPL guards in command.c and main.c are no longer needed
- add some guards in env_common.c
- qsort.c is no longer needed
- add guard to hashtable.c to save some space
- undefine unneeded CONFIG_CMD_* while building SPL to save space
arch/arm/cpu/armv7/omap-common/Makefile |3 ++
arch/arm/cpu/armv7/omap-common/spl.c |9 ++
arch/arm/cpu/armv7/omap-common/spl_net.c | 52
++
arch/arm/include/asm/omap_common.h |4 +++
common/Makefile |4 +++
common/cmd_nvedit.c | 11 ++-
common/command.c |2 +-
common/env_common.c |7 ++--
include/bootstage.h |6 +++-
lib/Makefile |9 --
lib/hashtable.c |2 ++
lib/vsprintf.c |2 +-
net/bootp.c | 11 ++-
net/net.c| 13
net/tftp.c |4 +++
spl/Makefile |3 ++
16 files changed, 133 insertions(+), 9 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap-common/spl_net.c
diff --git a/arch/arm/cpu/armv7/omap-common/Makefile
b/arch/arm/cpu/armv7/omap-common/Makefile
index d37b22d..f042078 100644
--- a/arch/arm/cpu/armv7/omap-common/Makefile
+++ b/arch/arm/cpu/armv7/omap-common/Makefile
@@ -53,6 +53,9 @@ endif
ifdef CONFIG_SPL_YMODEM_SUPPORT
COBJS += spl_ymodem.o
endif
+ifdef CONFIG_SPL_NET_SUPPORT
+COBJS += spl_net.o
+endif
Why not use common pattern of...
COBJS-$(CONFIG_SPL_NET_SUPPORT) += spl_net.o
COBJS := $(sort $(COBJS-y))
endif
ifndef CONFIG_SPL_BUILD
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
b/arch/arm/cpu/armv7/omap-common/spl.c
index f0d766c..53b9261 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -178,6 +178,15 @@ void board_init_r(gd_t *id, ulong dummy)
spl_ymodem_load_image();
break;
#endif
+#ifdef CONFIG_SPL_ETH_SUPPORT
+ case BOOT_DEVICE_CPGMAC:
+#ifdef CONFIG_SPL_ETH_DEVICE
+ spl_net_load_image(CONFIG_SPL_ETH_DEVICE);
+#else
+ spl_net_load_image(NULL);
+#endif
+ break;
+#endif
default:
printf(SPL: Un-supported Boot Device - %d!!!\n,
boot_device);
hang();
diff --git a/arch/arm/cpu/armv7/omap-common/spl_net.c
b/arch/arm/cpu/armv7/omap-common/spl_net.c
new file mode 100644
index 000..cbb3087
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap-common/spl_net.c
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * (C) Copyright 2012
+ * Ilya Yanok ilya.ya...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+#include common.h
+#include net.h
+#include asm/omap_common.h
What in here needs this header?
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void spl_net_load_image(const char *device)
+{
+ int rv;
+
+
Re: [U-Boot] [PATCH] Loop block device for sandbox
Dear Pavel Herrmann,
This driver uses files as block devices, can be used for testing disk
operations on sandbox. Port count and filenames are set in board config.
Signed-off-by: Pavel Herrmann morpheus.i...@gmail.com
CC: Marek Vasut ma...@denx.de
---
drivers/block/Makefile| 1 +
drivers/block/loop.c | 107
++ include/configs/sandbox.h |
9
3 files changed, 117 insertions(+)
create mode 100644 drivers/block/loop.c
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index f1ebdcc..5eecf37 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -40,6 +40,7 @@ COBJS-$(CONFIG_SATA_SIL) += sata_sil.o
COBJS-$(CONFIG_IDE_SIL680) += sil680.o
COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o
COBJS-$(CONFIG_SYSTEMACE) += systemace.o
+COBJS-${CONFIG_SATA_LOOP} += loop.o
Move this to a more descriptive filename, maybe sata_loopback.c ?
COBJS:= $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/block/loop.c b/drivers/block/loop.c
new file mode 100644
index 000..c9edfc3
--- /dev/null
+++ b/drivers/block/loop.c
@@ -0,0 +1,107 @@
+/*
+ * (C) Copyright 2012
+ * Pavel Herrmann morpheus.i...@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include part.h
+#include ata.h
+#include libata.h
+#include errno.h
+#include os.h
+
+static const char revision[] = 0.0;
+static const char vendor[] = loopback;
+
+static const char * const filenames[] = CONFIG_SATA_LOOP_DISKS;
+static int max_devs = CONFIG_SYS_SATA_MAX_DEVICE;
+
+extern block_dev_desc_t sata_dev_desc[];
+
+int init_sata(int dev)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
Superfluous braces ... Actually, I think sata_dev_desc as it would work very
well too.
+ int fd;
+
+ if ((dev 0) || (dev = max_devs)) {
+ printf(file index %d is out of range\n, dev);
Capital F and period at the end of a sentence.
+ return -EINVAL;
+ }
+
+ fd = os_open(filenames[dev], OS_O_RDWR);
+ /* this is ugly, but saves allocation for 1 int */
Same here.
+ pdev-priv = (void *) (long) fd;
+
+ return 0;
+}
+
+lbaint_t sata_read(int dev, lbaint_t start, lbaint_t blkcnt, void *buffer)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
If pdev is NULL, this will crash
+ lbaint_t retval;
+
+ os_lseek(fd, start*ATA_SECT_SIZE, OS_SEEK_SET);
+ retval = os_read(fd, buffer, ATA_SECT_SIZE * blkcnt);
+
+ return retval/ATA_SECT_SIZE;
+}
+
+lbaint_t sata_write(int dev, lbaint_t start, lbaint_t blkcnt, void
*buffer) +{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
+ lbaint_t retval;
+
+ os_lseek(fd, start*ATA_SECT_SIZE, OS_SEEK_SET);
Please do the multiplication in a consistent manner, same for division etc. ...
like you do on the following line (x1 [space] oper [space] x2).
Besides, lseek can fail, can it not?
+ retval = os_write(fd, buffer, ATA_SECT_SIZE * blkcnt);
+
+ return retval/ATA_SECT_SIZE;
+}
+
+int scan_sata(int dev)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
+ int namelen;
+ lbaint_t bytes = 0;
newline here
+ memcpy(pdev-vendor, vendor, sizeof(vendor));
+ memcpy(pdev-revision, revision, sizeof(revision));
+ namelen = sizeof(filenames[dev]);
newline here
+ if (namelen 20)
+ namelen = 20;
Why do you trim down the string, won't simple strdup() work?
newline here
+ memcpy(pdev-product, filenames[dev], namelen);
+ pdev-product[20] = 0;
+
+ if (fd != -1) {
And if fd is -1 ?
+ pdev-type = DEV_TYPE_HARDDISK;
+ pdev-blksz = ATA_SECT_SIZE;
+ pdev-lun = 0;
+
+ bytes = os_lseek(fd, 0, OS_SEEK_END);
+ pdev-lba = bytes/ATA_SECT_SIZE;
+ }
+
+ printf(SATA loop info:\nfilename: %s\nsize: %lu\nblock count: %lu\n,
+ filenames[dev], bytes, pdev-lba);
+
+ return 0;
+}
diff --git a/include/configs/sandbox.h
Re: [U-Boot] [PATCH v5 4/5] OMAP: networking support for SPL
On 08/29/2012 02:25 PM, Joe Hershberger wrote: [snip] #include common.h +#ifdef CONFIG_SPL_BUILD +/* SPL needs only BOOTP + TFTP so undefine other stuff to save space */ +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_CDP +#undef CONFIG_CMD_DNS +#undef CONFIG_CMD_LINK_LOCAL +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_PING +#undef CONFIG_CMD_RARP +#undef CONFIG_CMD_SNTP +#undef CONFIG_CMD_TFTPPUT +#undef CONFIG_CMD_TFTPSRV +#endif Is this the best place to do this? Seems it would be clearer to modify config_cmd_default.h or add a config_cmd_spl.h that will undefine them, and include that. I was thinking about that too, include/config_cmd_spl.h should probably be how this happens. -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Hi! diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds You should setup MEMORY declarations like the other u-boot-spl linker scripts do so we get build-time confirmation that we haven't exceeded our size limitations. Hmm, I tried, but I don't know socfpga memory layout by heart. Dinh, can you help here? I think once you get the answers you should be able to re-post the series cleanly and depend on my v5 (or v6) branch. Thanks! Ok, figuring the .lds might be tricky. But... that's mostly additional (safety) feature. Would it be possible to merge it without that and add it later? Port to v5 of the patch should not be a problem. For the record and review, current version of patch is here. Pavel diff --git a/MAINTAINERS b/MAINTAINERS index c5a6f2f..df48dea 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -765,6 +765,11 @@ Nagendra T S nagen...@mistralsolutions.com am3517_craneARM ARMV7 (AM35x SoC) +Dinh Nguyen dingu...@altera.com +Chin Liang See cl...@altera.com + + socfpga socfpga_cyclone5 + Kyungmin Park kyungmin.p...@samsung.com apollon ARM1136EJS diff --git a/arch/arm/cpu/armv7/socfpga/Makefile b/arch/arm/cpu/armv7/socfpga/Makefile new file mode 100644 index 000..376a4bd --- /dev/null +++ b/arch/arm/cpu/armv7/socfpga/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# Copyright (C) 2012 Altera Corporation www.altera.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(SOC).o + +SOBJS := lowlevel_init.o +COBJS-y:= misc.o timer.o +COBJS-$(CONFIG_SPL_BUILD) += spl.o + +COBJS := $(COBJS-y) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) + +all:$(obj).depend $(LIB) + +$(LIB):$(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/arm/cpu/armv7/socfpga/config.mk b/arch/arm/cpu/armv7/socfpga/config.mk new file mode 100644 index 000..b72ed1e --- /dev/null +++ b/arch/arm/cpu/armv7/socfpga/config.mk @@ -0,0 +1,16 @@ +# +# Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed as is WITHOUT ANY WARRANTY of any +# kind, whether express or implied; without even the implied warranty +# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +ifndef CONFIG_SPL_BUILD +ALL-y += $(obj)u-boot.img +endif diff --git a/arch/arm/cpu/armv7/socfpga/lowlevel_init.S b/arch/arm/cpu/armv7/socfpga/lowlevel_init.S new file mode 100644 index 000..815073e --- /dev/null +++ b/arch/arm/cpu/armv7/socfpga/lowlevel_init.S @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2012 Altera Corporation www.altera.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see http://www.gnu.org/licenses/. + */ + +#include config.h +#include version.h + +/* Save the parameter pass in by previous boot loader */ +.global save_boot_params +save_boot_params:
Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
On Wed 2012-08-29 11:26:45, Tom Rini wrote:
On Wed, Aug 29, 2012 at 03:41:54PM +0200, Pavel Machek wrote:
Hi!
diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
You should setup MEMORY declarations like the other u-boot-spl linker
scripts do so we get build-time confirmation that we haven't exceeded
our size limitations.
Hmm, I tried, but I don't know socfpga memory layout by heart.
Dinh, can you help here?
I think once you get the answers you should be able to re-post the
series cleanly and depend on my v5 (or v6) branch. Thanks!
Porting it to your v5 was easy :-). Newer patch for review is attached.
I took oportunity to cleanup whitespace in
arch/arm/cpu/armv7/omap-common/u-boot-spl.lds. Perhaps someone can
merge that...
Thanks,
Pavel
commit a7ecaa40d9a02e84ac81da8f49d48595d7f342ad
Author: Pavel pa...@ucw.cz
Date: Thu Aug 30 01:28:00 2012 +0200
Add changes for socfpga
diff --git a/MAINTAINERS b/MAINTAINERS
index c5a6f2f..df48dea 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -765,6 +765,11 @@ Nagendra T S nagen...@mistralsolutions.com
am3517_craneARM ARMV7 (AM35x SoC)
+Dinh Nguyen dingu...@altera.com
+Chin Liang See cl...@altera.com
+
+ socfpga socfpga_cyclone5
+
Kyungmin Park kyungmin.p...@samsung.com
apollon ARM1136EJS
diff --git a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
index 8867e06..1d8efb2 100644
--- a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
@@ -37,9 +37,9 @@ SECTIONS
{
.text :
{
- __start = .;
- arch/arm/cpu/armv7/start.o(.text)
- *(.text*)
+ __start = .;
+ arch/arm/cpu/armv7/start.o (.text)
+ *(.text*)
} .sram
. = ALIGN(4);
diff --git a/arch/arm/cpu/armv7/socfpga/Makefile
b/arch/arm/cpu/armv7/socfpga/Makefile
new file mode 100644
index 000..376a4bd
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# Copyright (C) 2012 Altera Corporation www.altera.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(SOC).o
+
+SOBJS := lowlevel_init.o
+COBJS-y:= misc.o timer.o
+COBJS-$(CONFIG_SPL_BUILD) += spl.o
+
+COBJS := $(COBJS-y)
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+all:$(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/armv7/socfpga/config.mk
b/arch/arm/cpu/armv7/socfpga/config.mk
new file mode 100644
index 000..b72ed1e
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/config.mk
@@ -0,0 +1,16 @@
+#
+# Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed as is WITHOUT ANY WARRANTY of any
+# kind, whether express or implied; without even the implied warranty
+# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+ifndef CONFIG_SPL_BUILD
+ALL-y += $(obj)u-boot.img
+endif
diff --git a/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
b/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
new file mode 100644
index 000..815073e
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2012 Altera Corporation www.altera.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ *
Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Dear Pavel Machek,
Minor ramblings below :)
On Wed 2012-08-29 11:26:45, Tom Rini wrote:
On Wed, Aug 29, 2012 at 03:41:54PM +0200, Pavel Machek wrote:
Hi!
diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
You should setup MEMORY declarations like the other u-boot-spl linker
scripts do so we get build-time confirmation that we haven't exceeded
our size limitations.
Hmm, I tried, but I don't know socfpga memory layout by heart.
Dinh, can you help here?
I think once you get the answers you should be able to re-post the
series cleanly and depend on my v5 (or v6) branch. Thanks!
Porting it to your v5 was easy :-). Newer patch for review is attached.
I took oportunity to cleanup whitespace in
arch/arm/cpu/armv7/omap-common/u-boot-spl.lds. Perhaps someone can
merge that...
Argh ... what about using git send-email for the patch submission please?
NOTE: I really have a great deal of respect for Pavel, so i do have trouble
stepping on him properly during the patch review ;-)
Thanks,
Pavel
commit a7ecaa40d9a02e84ac81da8f49d48595d7f342ad
Author: Pavel pa...@ucw.cz
Date: Thu Aug 30 01:28:00 2012 +0200
Add changes for socfpga
diff --git a/MAINTAINERS b/MAINTAINERS
index c5a6f2f..df48dea 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -765,6 +765,11 @@ Nagendra T S nagen...@mistralsolutions.com
am3517_craneARM ARMV7 (AM35x SoC)
+Dinh Nguyen dingu...@altera.com
+Chin Liang See cl...@altera.com
+
+ socfpga socfpga_cyclone5
+
Kyungmin Park kyungmin.p...@samsung.com
apollon ARM1136EJS
diff --git a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds index 8867e06..1d8efb2
100644
--- a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
@@ -37,9 +37,9 @@ SECTIONS
{
.text :
{
- __start = .;
- arch/arm/cpu/armv7/start.o(.text)
- *(.text*)
+ __start = .;
+ arch/arm/cpu/armv7/start.o (.text)
+ *(.text*)
} .sram
Maybe the cleanup should simply be split into separate patch?
. = ALIGN(4);
diff --git a/arch/arm/cpu/armv7/socfpga/Makefile
b/arch/arm/cpu/armv7/socfpga/Makefile new file mode 100644
index 000..376a4bd
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# Copyright (C) 2012 Altera Corporation www.altera.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(SOC).o
+
+SOBJS:= lowlevel_init.o
+COBJS-y := misc.o timer.o
+COBJS-$(CONFIG_SPL_BUILD) += spl.o
+
+COBJS:= $(COBJS-y)
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+all: $(obj).depend $(LIB)
+
+$(LIB): $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/armv7/socfpga/config.mk
b/arch/arm/cpu/armv7/socfpga/config.mk new file mode 100644
index 000..b72ed1e
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/config.mk
@@ -0,0 +1,16 @@
+#
+# Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed as is WITHOUT ANY WARRANTY of any
+# kind, whether express or implied; without even the implied warranty
+# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+ifndef
Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
On 08/29/2012 04:21 PM, Pavel Machek wrote:
Hi!
diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
You should setup MEMORY declarations like the other u-boot-spl linker
scripts do so we get build-time confirmation that we haven't exceeded
our size limitations.
Hmm, I tried, but I don't know socfpga memory layout by heart.
Dinh, can you help here?
I think once you get the answers you should be able to re-post the
series cleanly and depend on my v5 (or v6) branch. Thanks!
Ok, figuring the .lds might be tricky. But... that's mostly additional
(safety) feature. Would it be possible to merge it without that and
add it later?
Port to v5 of the patch should not be a problem.
For the record and review, current version of patch is here.
A few small comments. No need to re-post intermediate patches, just
address in the next full go-round. Thanks!
diff --git a/arch/arm/cpu/armv7/socfpga/spl.c
b/arch/arm/cpu/armv7/socfpga/spl.c
[snip]
+/*
+ * Board initialization after bss clearance
+ */
+void spl_board_init(void)
[snip]
+ puts(SPL Boot\n);
Sure you want to keep that line? We already have a general U-Boot SPL
... line being printed.
[snip]
diff --git a/arch/arm/include/asm/arch-socfpga/spl.h
b/arch/arm/include/asm/arch-socfpga/spl.h
[snip]
+#define CONFIG_SPL_STACK (__stack_start)
+#define CONFIG_SYS_SPL_MALLOC_START (__malloc_start)
+#define CONFIG_SYS_SPL_MALLOC_SIZE (__malloc_end - __malloc_start)
These should be in the config file.
diff --git a/board/altera/socfpga_cyclone5/socfpga_cyclone5.c
b/board/altera/socfpga_cyclone5/socfpga_cyclone5.c
[snip]
+/*
+ * miscellaneous platform dependent initialisations
+ */
+int misc_init_r(void)
+{
+ /* Set to n for not verifying the uImage */
+ setenv(verify, n);
+ return 0;
+}
Not good to enforce policy like this. Just don't set it in the config
file by default and let users do as they need.
[snip]
diff --git a/common/spl/spl.c b/common/spl/spl.c
index eaea1c8..5adbf0e 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -78,6 +78,7 @@ void spl_parse_image_header(const struct image_header
*header)
u32 header_size = sizeof(struct image_header);
if (__be32_to_cpu(header-ih_magic) == IH_MAGIC) {
+ /* Valid image. Extract information out of header */
spl_image.size = __be32_to_cpu(header-ih_size) + header_size;
spl_image.entry_point = __be32_to_cpu(header-ih_load);
/* Load including the header */
Just an extra comment, drop please. Or split out if you feel it's
really helpful. No strong opinion here other than not in the same patch
as the rest.
[snip]
diff --git a/include/common.h b/include/common.h
index 55025c0..469a3af 100644
--- a/include/common.h
+++ b/include/common.h
@@ -704,7 +704,9 @@ void external_interrupt (struct pt_regs *);
void irq_install_handler(int, interrupt_handler_t *, void *);
void irq_free_handler (int);
void reset_timer(void);
-ulongget_timer (ulong base);
+ulongget_timer(ulong base);
+void reset_timer_count(void);
+ulongget_timer_count(ulong base);
void enable_interrupts (void);
int disable_interrupts (void);
Make the new declarations match the old, spacing wise please.
diff --git a/include/configs/socfpga_cyclone5.h
b/include/configs/socfpga_cyclone5.h
new file mode 100644
index 000..d001cbb
--- /dev/null
+++ b/include/configs/socfpga_cyclone5.h
[snip]
+#undef CONFIG_USE_IRQ
[snip]
+
+/*
+ * Stack sizes
+ * The stack sizes are set up in start.S using the settings below
+ */
+/* regular stack */
+#define CONFIG_STACKSIZE (128 10)
+#ifdef CONFIG_USE_IRQ
+/* IRQ stack */
+#define CONFIG_STACKSIZE_IRQ (4 10)
+/* FIQ stack */
+#define CONFIG_STACKSIZE_FIQ (4 10)
+#endif
Unused, please drop.
[snip]
+#define CONFIG_SYS_PROMPT_HUSH_PS2
This is the default now, can be dropped.
--
Tom
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Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
On 08/29/2012 04:34 PM, Pavel Machek wrote: On Wed 2012-08-29 11:26:45, Tom Rini wrote: On Wed, Aug 29, 2012 at 03:41:54PM +0200, Pavel Machek wrote: Hi! diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds You should setup MEMORY declarations like the other u-boot-spl linker scripts do so we get build-time confirmation that we haven't exceeded our size limitations. Hmm, I tried, but I don't know socfpga memory layout by heart. Dinh, can you help here? I think once you get the answers you should be able to re-post the series cleanly and depend on my v5 (or v6) branch. Thanks! Porting it to your v5 was easy :-). Newer patch for review is attached. I took oportunity to cleanup whitespace in arch/arm/cpu/armv7/omap-common/u-boot-spl.lds. Perhaps someone can merge that... Split it out and I'll grab it for v6. Thanks! Comments sent to the other part of the thread just now. -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 0/5] pci: light update work on common pci code
[PATCH 1/5] pci: fix errant data types and corresponding access functions [PATCH 2/5] [cosmetic] pci: clean up some whitespace and formatting [PATCH 3/5] pci: minor cleanup of CONFIG_PCI_PNP usage [PATCH 4/5] pci: update pci_ids.h with a few new entries [PATCH 5/5] pci: add CONFIG_PCI_ENUM_ONLY for platforms that don't need PCI setup done ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/5] pci: fix errant data types and corresponding access functions
In a couple of places, unsigned int and pci_config_*_dword were being
used when u16 and _word should be used. Unsigned int was also being
used in a couple of places that should be pci_addr_t.
Signed-off-by: Andrew Sharp andywy...@gmail.com
---
drivers/pci/pci.c |7 ---
drivers/pci/pci_auto.c | 15 ---
2 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 398542b..cd78312 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -118,11 +118,11 @@ PCI_WRITE_VIA_DWORD_OP(word, u16, 0x02, 0x)
void *pci_map_bar(pci_dev_t pdev, int bar, int flags)
{
pci_addr_t pci_bus_addr;
- u32 bar_response;
+ pci_addr_t bar_response;
/* read BAR address */
pci_read_config_dword(pdev, bar, bar_response);
- pci_bus_addr = (pci_addr_t)(bar_response ~0xf);
+ pci_bus_addr = bar_response ~0xf;
/*
* Pass 0 as the length argument to pci_bus_to_virt. The arg
@@ -385,7 +385,8 @@ int pci_hose_config_device(struct pci_controller *hose,
pci_addr_t mem,
unsigned long command)
{
- unsigned int bar_response, old_command;
+ pci_addr_t bar_response;
+ unsigned int old_command;
pci_addr_t bar_value;
pci_size_t bar_size;
unsigned char pin;
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 87ee2c2..2338706 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -88,15 +88,15 @@ void pciauto_setup_device(struct pci_controller *hose,
struct pci_region *prefetch,
struct pci_region *io)
{
- unsigned int bar_response;
+ pci_addr_t bar_response;
pci_addr_t bar_value;
pci_size_t bar_size;
- unsigned int cmdstat = 0;
+ u16 cmdstat = 0;
struct pci_region *bar_res;
int bar, bar_nr = 0;
int found_mem64 = 0;
- pci_hose_read_config_dword(hose, dev, PCI_COMMAND, cmdstat);
+ pci_hose_read_config_word(hose, dev, PCI_COMMAND, cmdstat);
cmdstat = (cmdstat ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) |
PCI_COMMAND_MASTER;
for (bar = PCI_BASE_ADDRESS_0; bar PCI_BASE_ADDRESS_0 + (bars_num*4);
bar += 4) {
@@ -167,7 +167,7 @@ void pciauto_setup_device(struct pci_controller *hose,
bar_nr++;
}
- pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
+ pci_hose_write_config_word(hose, dev, PCI_COMMAND, cmdstat);
pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE,
CONFIG_SYS_PCI_CACHE_LINE_SIZE);
pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
@@ -179,9 +179,9 @@ void pciauto_prescan_setup_bridge(struct pci_controller
*hose,
struct pci_region *pci_mem = hose-pci_mem;
struct pci_region *pci_prefetch = hose-pci_prefetch;
struct pci_region *pci_io = hose-pci_io;
- unsigned int cmdstat;
+ u16 cmdstat;
- pci_hose_read_config_dword(hose, dev, PCI_COMMAND, cmdstat);
+ pci_hose_read_config_word(hose, dev, PCI_COMMAND, cmdstat);
/* Configure bus number registers */
pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS,
@@ -229,7 +229,8 @@ void pciauto_prescan_setup_bridge(struct pci_controller
*hose,
}
/* Enable memory and I/O accesses, enable bus master */
- pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat |
PCI_COMMAND_MASTER);
+ pci_hose_write_config_word(hose, dev, PCI_COMMAND,
+ cmdstat | PCI_COMMAND_MASTER);
}
void pciauto_postscan_setup_bridge(struct pci_controller *hose,
--
1.7.1
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[U-Boot] [PATCH v2 3/5] pci: minor cleanup of CONFIG_PCI_PNP usage
Refactor the common PCI code just a tiny bit surrounding the PCI_PNP
(pciauto) stuff. Makes the code a tiny bit easier to read, and also
makes it more obvious that almost no platform needs to setup or use the
pci_config_table stuff.
Signed-off-by: Andrew Sharp andywy...@gmail.com
---
drivers/pci/pci.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 62cb969..2a6d0a7 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -627,7 +627,9 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus)
unsigned int sub_bus, found_multi = 0;
unsigned short vendor, device, class;
unsigned char header_type;
+#ifndef CONFIG_PCI_PNP
struct pci_config_table *cfg;
+#endif
pci_dev_t dev;
#ifdef CONFIG_PCI_SCAN_SHOW
static int indent = 0;
@@ -675,18 +677,16 @@ int pci_hose_scan_bus(struct pci_controller *hose, int
bus)
}
#endif
+#ifdef CONFIG_PCI_PNP
+ sub_bus = max(pciauto_config_device(hose, dev), sub_bus);
+#else
cfg = pci_find_config(hose, class, vendor, device,
PCI_BUS(dev), PCI_DEV(dev),
PCI_FUNC(dev));
if (cfg) {
cfg-config_device(hose, dev, cfg);
sub_bus = max(sub_bus, hose-current_busno);
-#ifdef CONFIG_PCI_PNP
- } else {
- int n = pciauto_config_device(hose, dev);
-
- sub_bus = max(sub_bus, n);
-#endif
}
+#endif
#ifdef CONFIG_PCI_SCAN_SHOW
indent--;
--
1.7.1
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[U-Boot] [PATCH v2 4/5] pci: update pci_ids.h with a few new entries
Add some recent entries to pci_ids.h for Intel and AMD/ATI devices that are somewhat relevant to u-boot. Signed-off-by: Andrew Sharp andywy...@gmail.com --- include/pci_ids.h | 16 1 files changed, 16 insertions(+), 0 deletions(-) diff --git a/include/pci_ids.h b/include/pci_ids.h index 6a85c06..df902f9 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -364,6 +364,10 @@ #define PCI_DEVICE_ID_ATI_RS400_166 0x5a32 #define PCI_DEVICE_ID_ATI_RS400_200 0x5a33 #define PCI_DEVICE_ID_ATI_RS480 0x5950 +/* additional Radeon families */ +#define PCI_DEVICE_ID_ATI_EVERGREEN 0x9802 +#define PCI_DEVICE_ID_ATI_EVERGREEN20x9804 +#define PCI_DEVICE_ID_ATI_WRESTLER 0x9806 /* ATI IXP Chipset */ #define PCI_DEVICE_ID_ATI_IXP200_IDE 0x4349 #define PCI_DEVICE_ID_ATI_IXP200_SMBUS 0x4353 @@ -375,9 +379,13 @@ #define PCI_DEVICE_ID_ATI_IXP400_SATA 0x4379 #define PCI_DEVICE_ID_ATI_IXP400_SATA2 0x437a #define PCI_DEVICE_ID_ATI_IXP600_SATA 0x4380 +#define PCI_DEVICE_ID_ATI_SBX00_PCI_BRIDGE 0x4384 #define PCI_DEVICE_ID_ATI_SBX00_SMBUS 0x4385 #define PCI_DEVICE_ID_ATI_IXP600_IDE 0x438c #define PCI_DEVICE_ID_ATI_IXP700_SATA 0x4390 +#define PCI_DEVICE_ID_ATI_SBX00_SATA_AHCI 0x4391 +#define PCI_DEVICE_ID_ATI_SBX00_EHCI 0x4396 +#define PCI_DEVICE_ID_ATI_SBX00_OHCI 0x4397 #define PCI_DEVICE_ID_ATI_IXP700_IDE 0x439c #define PCI_VENDOR_ID_VLSI 0x1004 @@ -2539,9 +2547,16 @@ #define PCI_DEVICE_ID_INTEL_82840_HB 0x1a21 #define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30 #define PCI_DEVICE_ID_INTEL_IOAT 0x1a38 +#define PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE0x1c03 +#define PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6 0x1c02 +#define PCI_DEVICE_ID_INTEL_COUGARPOINT_HDA0x1c20 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN0x1c41 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX0x1c5f +#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE 0x1e03 +#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_HDA 0x1e20 +#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN 0x1e41 +#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX 0x1e5f #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22 #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC 0x1d40 #define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410 @@ -2635,6 +2650,7 @@ #define PCI_DEVICE_ID_INTEL_ICH7_300x27b0 #define PCI_DEVICE_ID_INTEL_TGP_LPC0x27bc #define PCI_DEVICE_ID_INTEL_ICH7_310x27bd +#define PCI_DEVICE_ID_INTEL_NM10_AHCI 0x27c1 #define PCI_DEVICE_ID_INTEL_ICH7_170x27da #define PCI_DEVICE_ID_INTEL_ICH7_190x27dd #define PCI_DEVICE_ID_INTEL_ICH7_200x27de -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 2/5] [cosmetic] pci: clean up some whitespace and formatting
I tried to clean up the white space and formatting offenses and
inconsistencies in the generic PCI code that obviously has been around for
some time. Emphasis on large increases in readability and maintainability
and consistency. I omitted the platform/processor specific files in
the drivers/pci directory because I wanted to leave those file to those
that care more about them.
Signed-off-by: Andrew Sharp andywy...@gmail.com
---
drivers/pci/pci.c | 107 +--
drivers/pci/pci_auto.c | 54 +++-
2 files changed, 91 insertions(+), 70 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index cd78312..62cb969 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -151,13 +151,14 @@ void pci_register_hose(struct pci_controller* hose)
*phose = hose;
}
-struct pci_controller *pci_bus_to_hose (int bus)
+struct pci_controller *pci_bus_to_hose(int bus)
{
struct pci_controller *hose;
- for (hose = hose_head; hose; hose = hose-next)
+ for (hose = hose_head; hose; hose = hose-next) {
if (bus = hose-first_busno bus = hose-last_busno)
return hose;
+ }
printf(pci_bus_to_hose() failed\n);
return NULL;
@@ -196,21 +197,20 @@ pci_dev_t pci_find_devices(struct pci_device_id *ids, int
index)
pci_dev_t bdf;
int i, bus, found_multi = 0;
- for (hose = hose_head; hose; hose = hose-next)
- {
+ for (hose = hose_head; hose; hose = hose-next) {
#ifdef CONFIG_SYS_SCSI_SCAN_BUS_REVERSE
for (bus = hose-last_busno; bus = hose-first_busno; bus--)
#else
for (bus = hose-first_busno; bus = hose-last_busno; bus++)
#endif
- for (bdf = PCI_BDF(bus,0,0);
+ for (bdf = PCI_BDF(bus, 0, 0);
#if defined(CONFIG_ELPPC) || defined(CONFIG_PPMC7XX)
-bdf
PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
+bdf PCI_BDF(bus, PCI_MAX_PCI_DEVICES - 1,
+ PCI_MAX_PCI_FUNCTIONS - 1);
#else
-bdf PCI_BDF(bus+1,0,0);
+bdf PCI_BDF(bus + 1, 0, 0);
#endif
-bdf += PCI_BDF(0,0,1))
- {
+bdf += PCI_BDF(0, 0, 1)) {
if (!PCI_FUNC(bdf)) {
pci_read_config_byte(bdf,
PCI_HEADER_TYPE,
@@ -229,19 +229,19 @@ pci_dev_t pci_find_devices(struct pci_device_id *ids, int
index)
PCI_DEVICE_ID,
device);
- for (i=0; ids[i].vendor != 0; i++)
+ for (i = 0; ids[i].vendor != 0; i++) {
if (vendor == ids[i].vendor
- device == ids[i].device)
- {
+ device == ids[i].device) {
if (index = 0)
return bdf;
index--;
}
+ }
}
}
- return (-1);
+ return -1;
}
pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index)
@@ -258,7 +258,7 @@ pci_dev_t pci_find_device(unsigned int vendor, unsigned int
device, int index)
*
*/
-int __pci_hose_phys_to_bus (struct pci_controller *hose,
+int __pci_hose_phys_to_bus(struct pci_controller *hose,
phys_addr_t phys_addr,
unsigned long flags,
unsigned long skip_mask,
@@ -297,12 +297,14 @@ pci_addr_t pci_hose_phys_to_bus (struct pci_controller
*hose,
int ret;
if (!hose) {
- puts (pci_hose_phys_to_bus: invalid hose\n);
+ puts(pci_hose_phys_to_bus: invalid hose\n);
return bus_addr;
}
- /* if PCI_REGION_MEM is set we do a two pass search with preference
-* on matches that don't have PCI_REGION_SYS_MEMORY set */
+ /*
+* if PCI_REGION_MEM is set we do a two pass search with preference
+* on matches that don't have PCI_REGION_SYS_MEMORY set
+*/
if ((flags PCI_REGION_MEM) == PCI_REGION_MEM) {
ret = __pci_hose_phys_to_bus(hose, phys_addr,
flags, PCI_REGION_SYS_MEMORY, bus_addr);
@@ -313,12 +315,12 @@ pci_addr_t pci_hose_phys_to_bus (struct pci_controller
*hose,
ret = __pci_hose_phys_to_bus(hose, phys_addr, flags, 0, bus_addr);
[U-Boot] [PATCH v2 5/5] pci: add CONFIG_PCI_ENUM_ONLY for platforms that don't need PCI setup done
Introduce CONFIG_PCI_ENUM_ONLY variable for platforms that just want a
quick enumberation of the PCI devices, but don't need any setup work done.
This is very beneficial on platforms that have u-boot loaded by another
boot loader which does a more sophisticated job of setup of PCI devices
than u-boot. That way, u-boot can just read what's there and get on
with life. This is what SeaBIOS does.
Signed-off-by: Andrew Sharp andywy...@gmail.com
---
README |7 +++
drivers/pci/pci_auto.c | 35 +--
2 files changed, 32 insertions(+), 10 deletions(-)
diff --git a/README b/README
index fb9d904..5442ddd 100644
--- a/README
+++ b/README
@@ -3377,6 +3377,13 @@ Low Level (hardware related) configuration options:
Disable PCI-Express on systems where it is supported but not
required.
+- CONFIG_PCI_ENUM_ONLY
+ Only scan through and get the devices on the busses.
+ Don't do any setup work, presumably because someone or
+ something has already done it, and we don't need to do it
+ a second time. Useful for platforms that are pre-booted
+ by coreboot or similar.
+
- CONFIG_SYS_SRIO:
Chip has SRIO or not
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 9a42ede..ae61e24 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -90,12 +90,14 @@ void pciauto_setup_device(struct pci_controller *hose,
struct pci_region *io)
{
pci_addr_t bar_response;
- pci_addr_t bar_value;
pci_size_t bar_size;
u16 cmdstat = 0;
- struct pci_region *bar_res;
int bar, bar_nr = 0;
+#ifndef CONFIG_PCI_ENUM_ONLY
+ pci_addr_t bar_value;
+ struct pci_region *bar_res;
int found_mem64 = 0;
+#endif
pci_hose_read_config_word(hose, dev, PCI_COMMAND, cmdstat);
cmdstat = (cmdstat ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) |
PCI_COMMAND_MASTER;
@@ -103,20 +105,26 @@ void pciauto_setup_device(struct pci_controller *hose,
for (bar = PCI_BASE_ADDRESS_0;
bar PCI_BASE_ADDRESS_0 + (bars_num * 4); bar += 4) {
/* Tickle the BAR and get the response */
+#ifndef CONFIG_PCI_ENUM_ONLY
pci_hose_write_config_dword(hose, dev, bar, 0x);
+#endif
pci_hose_read_config_dword(hose, dev, bar, bar_response);
/* If BAR is not implemented go to the next BAR */
if (!bar_response)
continue;
+#ifndef CONFIG_PCI_ENUM_ONLY
found_mem64 = 0;
+#endif
/* Check the BAR type and set our address mask */
if (bar_response PCI_BASE_ADDRESS_SPACE) {
bar_size = ((~(bar_response PCI_BASE_ADDRESS_IO_MASK))
0x) + 1;
+#ifndef CONFIG_PCI_ENUM_ONLY
bar_res = io;
+#endif
DEBUGF(PCI Autoconfig: BAR %d, I/O, size=0x%llx, ,
bar_nr, (u64)bar_size);
} else {
@@ -124,26 +132,34 @@ void pciauto_setup_device(struct pci_controller *hose,
PCI_BASE_ADDRESS_MEM_TYPE_64) {
u32 bar_response_upper;
u64 bar64;
+
+#ifndef CONFIG_PCI_ENUM_ONLY
pci_hose_write_config_dword(hose, dev, bar + 4,
0x);
+#endif
pci_hose_read_config_dword(hose, dev, bar + 4,
bar_response_upper);
bar64 = ((u64)bar_response_upper 32) |
bar_response;
bar_size = ~(bar64 PCI_BASE_ADDRESS_MEM_MASK)
+ 1;
+#ifndef CONFIG_PCI_ENUM_ONLY
found_mem64 = 1;
+#endif
} else {
bar_size = (u32)(~(bar_response
PCI_BASE_ADDRESS_MEM_MASK) + 1);
}
+#ifndef CONFIG_PCI_ENUM_ONLY
if (prefetch (bar_response
PCI_BASE_ADDRESS_MEM_PREFETCH))
bar_res = prefetch;
else
bar_res = mem;
+#endif
DEBUGF(PCI Autoconfig: BAR %d, Mem, size=0x%llx, ,
bar_nr, (u64)bar_size);
}
+#ifndef CONFIG_PCI_ENUM_ONLY
if (pciauto_region_allocate(bar_res, bar_size, bar_value) ==
0) {
/* Write it out and update our limit */
pci_hose_write_config_dword(hose, dev, bar,
(u32)bar_value);
@@ -162,9 +178,10 @@ void pciauto_setup_device(struct pci_controller *hose,
#endif
}
- cmdstat |= (bar_response PCI_BASE_ADDRESS_SPACE) ?
- PCI_COMMAND_IO :
Re: [U-Boot] patman doesn't send patches
Hi Stefan, Stefan Roese sr at denx.de writes: Or does patman not even try to send, once checkpatch warning/errors are detected? That's it. Normally you don't want to send patches that are not chackpatch-clean. If you are sure that problems are irrelevant use -i switch to ignore them. Regards, Ilya. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2 V3] SMDK5250: Config: Enable MAX77686 pmic chip
On 24 August 2012 19:39, Rajeshwari Shinde rajeshwar...@samsung.com wrote: This patch enables MAX77686 pmic chip for SMDK5250. Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com --- Changes in V3: - Rebased on latest u-boot-samsung tree board/samsung/smdk5250/smdk5250.c |4 include/configs/smdk5250.h|5 + 2 files changed, 9 insertions(+), 0 deletions(-) Acked-by: Minkyu Kang mk7.k...@samsung.com -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
