Re: [U-Boot] [PATCH v3 02/13] ehci-mxc: Clean up
On 13/11/2012 20:55, Benoît Thébaudeau wrote: Clean up ehci-mxc: - Remove useless #if's. - Fix identation. - Issue a #error if used with an unsupported platform. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Cc: Marek Vasut ma...@denx.de Cc: Stefano Babic sba...@denx.de --- Applied (whole sries) to u-boot-imx, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 6/8] omap_gpmc: BCH8 support (ELM based)
Dear Ilya Yanok, On 15.11.2012 21:08, Ilya Yanok wrote: Dear Andreas, On Thu, Nov 15, 2012 at 2:25 PM, Andreas Bießmann andreas.de...@googlemail.com mailto:andreas.de...@googlemail.com wrote: Dear Ilya Yanok, On 07.11.2012 00:06, Ilya Yanok wrote: From: Mansoor Ahamed mansoor.aha...@ti.com mailto:mansoor.aha...@ti.com This patch adds support for BCH8 error correction code to omap_gpmc driver. We use GPMC to generate codes/syndromes but we need ELM to find error locations from given syndrome. first of all, I wonder why this is so different than the kernel implementation for BCH. I mean the API (and content) of this and commit 8d602cf50d3bba864bc1438f486b626df69c87b3 mainline linux seems to differ. The main question coming to mind is: Is the resulting OOB layout compatible then? Please note that these patches are AM33XX-specific (as we are using ELM that, I think, just isn't available on OMAP3) so we use OOB layout that is compatible with AM33xx ROM boot code. You are right, ELM is not available in OMAP3 devices. It seems the ROM loader of these devices only support the 1-Bit Hamming, but is also different to the OOB layout used for the SW 1-bit hamming provided by the Kernel. So we get here a lot of different OOB layouts ... I wonder if we can stick to e.g. the generic SW BCH layout (of linux kernel) for all but the ROM partition (where the SPL is placed). So the SPL need to know just one mechanism but software modifying that place needs to know about the 'special' ROM layout. It's likely that this layout doesn't match with the current kernel layout as RBL uses strange 14th byte for BCH8 while only 13 bytes are needed. Sorry, what does RBL mean in that context? There are some patches for the kernel that make it use the same layout too but I don't if they are going to be accepted soon. Ok, that would be required to write the SPL to flash. Actually, the only assumption the code does about the OOB layout is that ECC code occupies continuous area in the OOB. Well, but you have defined that for example it is written in big endian. I'm currently working on a omap3 enabled device that requires 4-bit ECC for all but the first block. And I'm searching for a clean solution that would be accepted mainline. I think it would be best to have the same OOB layout for the whole device but the SPL space (cause that needs to be read by ROM). The layout should be chosen at compile time of the SPL. What do you think about? Best regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/6] WIP: i2c: s3c24x0: modify driver for new I2C framework
Hello Piotr,
On 15.11.2012 09:15, Piotr Wilczek wrote:
This patch modifies s3c24x0 driver for the new I2C framework.
Configs for VCMA9.h and smdk5250.h boards are modified.
Boards compile successfully but were not tested.
Signed-off-by: Piotr Wilczekp.wilc...@samsung.com
Signed-off-by: Kyungmin Parkkyungmin.p...@samsung.com
CC: Minkyu Kangmk7.k...@samsung.com
---
drivers/i2c/i2c_core.c |5 ++
drivers/i2c/s3c24x0_i2c.c | 129 ---
include/configs/VCMA9.h|4 ++
include/configs/smdk5250.h |4 ++
4 files changed, 133 insertions(+), 9 deletions(-)
[...]
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 90d297a..d473eaa 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -155,7 +155,6 @@ static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed,
int slaveadd)
/* set prescaler, divisor according to freq, also set ACKGEN, IRQ */
writel((div 0x0F) | 0xA0 | ((pres == 512) ? 0x40 : 0),i2c-iiccon);
-
Why this delete?
/* init to SLAVE REVEIVE and set slaveaddr */
writel(0,i2c-iicstat);
writel(slaveadd,i2c-iicadd);
@@ -168,7 +167,7 @@ static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed,
int slaveadd)
*/
#ifdef CONFIG_I2C_MULTI_BUS
This define can go completely away.
-int i2c_set_bus_num(unsigned int bus)
+int s3c24x0_i2c_set_bus_num(unsigned int bus)
all functions are static now, please change.
{
struct s3c24x0_i2c *i2c;
@@ -184,13 +183,13 @@ int i2c_set_bus_num(unsigned int bus)
return 0;
}
-unsigned int i2c_get_bus_num(void)
+unsigned int s3c24x0_i2c_get_bus_num(void)
No longer needed.
{
return g_current_bus;
}
#endif
-void i2c_init(int speed, int slaveadd)
+void s3c24x0_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
static.
{
struct s3c24x0_i2c *i2c;
#if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
@@ -198,8 +197,7 @@ void i2c_init(int speed, int slaveadd)
#endif
int i;
- /* By default i2c channel 0 is the current bus */
- g_current_bus = 0;
+ g_current_bus = adap-hwadapnr;
Can we please delete g_current_bus and use adap-hwadapnr only.
g_current_bus should go away completely.
i2c = get_base_i2c();
/* wait for some time to give previous transfer a chance to finish */
@@ -415,11 +413,13 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
return result;
}
-int i2c_probe(uchar chip)
+int s3c24x0_i2c_probe(struct i2c_adapter *adap, uchar chip)
static.
{
struct s3c24x0_i2c *i2c;
uchar buf[1];
+ g_current_bus = adap-hwadapnr;
Please get rid of g_current_bus, and use adap-hwadapnr only!
+
i2c = get_base_i2c();
buf[0] = 0;
@@ -431,12 +431,15 @@ int i2c_probe(uchar chip)
return i2c_transfer(i2c, I2C_READ, chip 1, 0, 0, buf, 1) != I2C_OK;
}
-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
+int s3c24x0_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
+ int alen, uchar *buffer, int len)
static.
{
struct s3c24x0_i2c *i2c;
uchar xaddr[4];
int ret;
+ g_current_bus = adap-hwadapnr;
+
if (alen 4) {
debug(I2C read: addr len %d not supported\n, alen);
return 1;
@@ -475,11 +478,14 @@ int i2c_read(uchar chip, uint addr, int alen, uchar
*buffer, int len)
return 0;
}
-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
+int s3c24x0_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
+ int alen, uchar *buffer, int len)
static
{
struct s3c24x0_i2c *i2c;
uchar xaddr[4];
+ g_current_bus = adap-hwadapnr;
+
if (alen 4) {
debug(I2C write: addr len %d not supported\n, alen);
return 1;
@@ -512,4 +518,109 @@ int i2c_write(uchar chip, uint addr, int alen, uchar
*buffer, int len)
(i2c, I2C_WRITE, chip 1,xaddr[4 - alen], alen, buffer,
len) != 0);
}
+
+struct i2c_adapter s3c24x0_i2c_adap[] = {
+ {
+ .init = s3c24x0_i2c_init,
+ .probe = s3c24x0_i2c_probe,
+ .read = s3c24x0_i2c_read,
+ .write = s3c24x0_i2c_write,
+ .speed = CONFIG_SYS_I2C_SPEED,
+ .slaveaddr = CONFIG_SYS_I2C_SLAVE,
Please use a more driver specific name here, for example:
CONFIG_SYS_I2C_S3C24X0_{SPEED/SLAVE} ...
+ .init_done = 0,
+ .hwadapnr = 0,
+ .name = s3c24x0-i2c#0
+ },
+#if CONFIG_MAX_I2C_NUM 1
Please use a more driver specific name here, for example:
CONFIG_I2C_S3C24X0_MAX_NUM, thanks!
+ {
[...]
+#endif
+};
#endif /*
Re: [U-Boot] [PATCH 6/6] WIP: arm: trats: add support for new I2C framework
Hello Piotr,
On 15.11.2012 09:15, Piotr Wilczek wrote:
This enables new i2c framework on Trats board.
Hardware s3c24x0 i2c driver is used instead of software i2c.
Signed-off-by: Piotr Wilczekp.wilc...@samsung.com
Signed-off-by: Kyungmin Parkkyungmin.p...@samsung.com
CC: Minkyu Kangmk7.k...@samsung.com
---
board/samsung/trats/trats.c | 26 +-
include/configs/trats.h | 16 ++--
2 files changed, 35 insertions(+), 7 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index e11a892..71e1975 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -24,8 +24,10 @@
*/
#includecommon.h
+#includei2c.h
#includelcd.h
#includeasm/io.h
+#includeasm/arch/pinmux.h
#includeasm/arch/cpu.h
#includeasm/arch/gpio.h
#includeasm/arch/mmc.h
@@ -61,6 +63,19 @@ static int hwrevision(int rev)
struct s3c_plat_otg_data s5pc210_otg_data;
+void i2c_init_pinmux(void)
+{
+ int i, err;
+ for (i = 0; i CONFIG_MAX_I2C_NUM; i++) {
+ err = exynos_pinmux_config((PERIPH_ID_I2C0 + i),
+ PINMUX_FLAG_NONE);
+ if (err) {
+ debug(I2C%d not configured\n, (PERIPH_ID_I2C0 + i));
+ return;
+ }
+ }
+}
+
Is this change multibus specific? Why?
int board_init(void)
{
gd-bd-bi_boot_params = PHYS_SDRAM_1 + 0x100;
@@ -68,6 +83,8 @@ int board_init(void)
check_hw_revision();
printf(HW Revision:\t0x%x\n, board_rev);
+ i2c_init_pinmux();
+
Why this call not in i2c_init_board(void)?
#if defined(CONFIG_PMIC)
pmic_init();
#endif
@@ -77,14 +94,9 @@ int board_init(void)
void i2c_init_board(void)
{
- struct exynos4_gpio_part1 *gpio1 =
- (struct exynos4_gpio_part1 *)samsung_get_base_gpio_part1();
struct exynos4_gpio_part2 *gpio2 =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
- /* I2C_5 - PMIC */
- s5p_gpio_direction_output(gpio1-b, 7, 1);
- s5p_gpio_direction_output(gpio1-b, 6, 1);
Here again, what has this to do with the new multibus framework?
/* I2C_9 - FG */
s5p_gpio_direction_output(gpio2-y4, 0, 1);
s5p_gpio_direction_output(gpio2-y4, 1, 1);
@@ -415,6 +427,8 @@ static int lcd_power(void)
int ret = 0;
struct pmic *p = get_pmic();
+ i2c_set_bus_num(0);
^
Fix number? Please use here a define.
+
if (pmic_probe(p))
return 0;
@@ -475,6 +489,8 @@ static int mipi_power(void)
int ret = 0;
struct pmic *p = get_pmic();
+ i2c_set_bus_num(0);
+
if (pmic_probe(p))
return 0;
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 106fd37..54423f4 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -33,6 +33,7 @@
#define CONFIG_SAMSUNG/* in a SAMSUNG core */
#define CONFIG_S5P/* which is in a S5P Family */
#define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */
+#define CONFIG_EXYNOS4
#define CONFIG_TRATS /* working with TRATS */
#define CONFIG_TIZEN /* TIZEN lib */
@@ -211,18 +212,29 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR -
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_CACHELINE_SIZE 32
-
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_SOFT_SPEED 5
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
-#define CONFIG_SYS_I2C_ADAPTERS{soft_i2c_adap[0]}
Why you delete here this adapter? You can use now in the new
Framework Hard and soft i2c adapter ...
#define CONFIG_SOFT_I2C_READ_REPEATED_START
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SOFT_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS15
+#define CONFIG_HARD_I2C
No longer needed
+#define CONFIG_DRIVER_S3C24X0_I2C
+#define CONFIG_MAX_I2C_NUM 8
+#define CONFIG_SYS_I2C_SPEED 10
+#define CONFIG_SYS_I2C_SLAVE 0x0
This defines please rename, as posted in previous EMail ...
+#define CONFIG_CMD_I2C
+
+#define CONFIG_SYS_I2C_ADAPTERS{s3c24x0_i2c_adap[5]}
+#define CONFIG_SYS_NUM_I2C_ADAPTERS 1
+#define CONFIG_SYS_I2C_BUSSES {{0, {{{0, S3C24X0}, 0x00, 5}}}, \
You use here only one bus, so you do not need to define this here.
+ }
+#define CONFIG_SYS_NUM_I2C_BUSSES 1
+
#includeasm/arch/gpio.h
/* I2C PMIC */
bye,
Heiko
--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] [SPL mode] Question
Hi Andreas,
Dear Lukasz Majewski,
On 15.11.2012 16:51, Lukasz Majewski wrote:
Hi Stefano,
I've got some questions about Falcon mode and spl export command.
I've looked into the ./common/cmd_spl.c at master branch
SHA1: 59852d03867108217fe88e3bfc3e1e9cedfe63c5
Correct me if I'm wrong (or I've overlooked something).
It looks that, this file version is a very early version.
It is.
After reading Falcon mode README - I'd expect, that spl export
will write either ATAGS or FDT to NAND (or any other memory).
For this file it doesn't do that. Am I missing some additional
patches?
No, the 'spl export' does not write to a storage media at all, the
'spl export' command is intended to save the prepared information in
RAM. This information must then be transferred to a final destination
where the SPL will load it. The destination is defined at compile time
(CONFIG_CMD_SPL_NAND_OFS for NAND).
Since you stated, that Falcon mode is only (now) supported on NAND
memory, I'd like to ask if it is acceptable to extend cmd_spl.c to
write ATAGS/FDT image to eMMC or (better) to partition formatted as
EXT4 of FAT?
So far only NAND is implemented, if you plan to implement another mode
you need to extend the SPL by some mechanism to get the required data
('configuration BLOB' either ATAGS or FDT) and kernel from that media.
The 'configuration BLOB' generated by the 'spl export' command should
then be saved by other existing u-boot commands to its final
destination. I think the spl command do not need to know about the
storage media used. I personally think a 'spl export ..; nand write
...;' is fine, for more convenience this could also be scripted. In a
perfect world you will do this only once, but the complexity of spl
command will be carried always.
I can imagine a following scenario:
1. Use u-boot to generate ATAGS (from bootcmd args defined for board
or cmd line parameters) or FDT blob with spl export. Store it on a
partition or eMMC.
Well, the FDT blob will not be generated by the 'spl export' (or did I
get this wrong?). You will need a FDT blob to generate the stuff that
is handed to the kernel. In fact the existing FDT is encapsulated by
some header, isn't it that way?
2. Use SPL (second stage bootloader) to parse this blob, place
ATAGS or FDT accordingly, read uImage and pass execution to it.
SPL should not parse but copy the prepared data to RAM and branch the
kernel.
Best regards
Andreas Bießmann
Thanks for clarification. This is what I was missing.
--
Best regards,
Lukasz Majewski
Samsung Poland RD Center | Linux Platform Group
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Re: [U-Boot] [PATCH 2/4] mx5: Print CSPI clock in 'clock' command
Hi Dirk, On Fri, Nov 16, 2012 at 4:35 AM, Dirk Behme dirk.be...@gmail.com wrote: I wondered if we want something similar for i.MX6, too. And found that we have this on i.MX6, already. But without #ifdef. http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/mx6/clock.c;h=a01d96f48e04377d705b7a587ec7b3ea59aee283;hb=HEAD#l407 Do we want to add the #ifdef for i.MX6, too? Or would it be nicer to drop the #ifdef in this patch to make i.MX6 and i.MX5 equal? The reason I added the ifdef was to avoid showing the cspi clock on a board that does not use cspi. This would help not 'polluting' the clock command output. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mx6: clock: Only show CSPI clock if CSPI is enabled
From: Fabio Estevam fabio.este...@freescale.com If a board does not enable CSPI, there is no need to show the CSPI clock frequency as part of the 'clock' command. Reported-by: Dirk Behme dirk.be...@gmail.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- arch/arm/cpu/armv7/mx6/clock.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index a01d96f..a50db70 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -404,7 +404,9 @@ int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf(\n); printf(IPG%8d kHz\n, mxc_get_clock(MXC_IPG_CLK) / 1000); printf(UART %8d kHz\n, mxc_get_clock(MXC_UART_CLK) / 1000); +#ifdef CONFIG_MXC_SPI printf(CSPI %8d kHz\n, mxc_get_clock(MXC_CSPI_CLK) / 1000); +#endif printf(AHB%8d kHz\n, mxc_get_clock(MXC_AHB_CLK) / 1000); printf(AXI%8d kHz\n, mxc_get_clock(MXC_AXI_CLK) / 1000); printf(DDR%8d kHz\n, mxc_get_clock(MXC_DDR_CLK) / 1000); -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ehci-mxc: Fix host power mask bit for i.MX35
The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance selection bit. This issue has been reported by Michael Burkey mdbur...@gmail.com and fixed by Christoph Fritz chf.fr...@googlemail.com on Linux, from which these #define-s had been copied. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Cc: Stefano Babic sba...@denx.de Cc: Marek Vasut ma...@denx.de --- .../drivers/usb/host/ehci-mxc.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git u-boot-imx-f22e4fa.orig/drivers/usb/host/ehci-mxc.c u-boot-imx-f22e4fa/drivers/usb/host/ehci-mxc.c index 7c5f71c..f2642a0 100644 --- u-boot-imx-f22e4fa.orig/drivers/usb/host/ehci-mxc.c +++ u-boot-imx-f22e4fa/drivers/usb/host/ehci-mxc.c @@ -67,7 +67,7 @@ #define MX35_H1_SIC_SHIFT 21 #define MX35_H1_SIC_MASK (0x3 MX35_H1_SIC_SHIFT) #define MX35_H1_PP_BIT (1 18) -#define MX35_H1_PM_BIT (1 8) +#define MX35_H1_PM_BIT (1 16) #define MX35_H1_IPPUE_UP_BIT (1 7) #define MX35_H1_IPPUE_DOWN_BIT (1 6) #define MX35_H1_TLL_BIT(1 5) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/6] WIP: i2c: s3c24x0: modify driver for new I2C framework
Hello Heiko,
-Original Message-
From: Heiko Schocher [mailto:h...@denx.de]
Sent: Friday, November 16, 2012 11:34 AM
To: Piotr Wilczek
Cc: u-boot@lists.denx.de; Minkyu Kang; Kyungmin Park; Lukasz Majewski;
Simon Glass; Stephen Warren; Tom Rini
Subject: Re: [PATCH 5/6] WIP: i2c: s3c24x0: modify driver for new I2C
framework
Hello Piotr,
On 15.11.2012 09:15, Piotr Wilczek wrote:
This patch modifies s3c24x0 driver for the new I2C framework.
Configs for VCMA9.h and smdk5250.h boards are modified.
Boards compile successfully but were not tested.
Signed-off-by: Piotr Wilczekp.wilc...@samsung.com
Signed-off-by: Kyungmin Parkkyungmin.p...@samsung.com
CC: Minkyu Kangmk7.k...@samsung.com
---
drivers/i2c/i2c_core.c |5 ++
drivers/i2c/s3c24x0_i2c.c | 129
---
include/configs/VCMA9.h|4 ++
include/configs/smdk5250.h |4 ++
4 files changed, 133 insertions(+), 9 deletions(-)
[...]
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 90d297a..d473eaa 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -155,7 +155,6 @@ static void i2c_ch_init(struct s3c24x0_i2c *i2c,
int speed, int slaveadd)
/* set prescaler, divisor according to freq, also set ACKGEN, IRQ
*/
writel((div 0x0F) | 0xA0 | ((pres == 512) ? 0x40 :
0),i2c-iiccon);
-
Why this delete?
Unintentional, I fix it.
/* init to SLAVE REVEIVE and set slaveaddr */
writel(0,i2c-iicstat);
writel(slaveadd,i2c-iicadd);
@@ -168,7 +167,7 @@ static void i2c_ch_init(struct s3c24x0_i2c *i2c,
int speed, int slaveadd)
*/
#ifdef CONFIG_I2C_MULTI_BUS
This define can go completely away.
Right.
-int i2c_set_bus_num(unsigned int bus)
+int s3c24x0_i2c_set_bus_num(unsigned int bus)
all functions are static now, please change.
Yes, I overlooked it.
{
struct s3c24x0_i2c *i2c;
@@ -184,13 +183,13 @@ int i2c_set_bus_num(unsigned int bus)
return 0;
}
-unsigned int i2c_get_bus_num(void)
+unsigned int s3c24x0_i2c_get_bus_num(void)
No longer needed.
{
return g_current_bus;
}
#endif
-void i2c_init(int speed, int slaveadd)
+void s3c24x0_i2c_init(struct i2c_adapter *adap, int speed, int
+slaveadd)
static.
{
struct s3c24x0_i2c *i2c;
#if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5) @@ -198,8
+197,7 @@ void i2c_init(int speed, int slaveadd)
#endif
int i;
- /* By default i2c channel 0 is the current bus */
- g_current_bus = 0;
+ g_current_bus = adap-hwadapnr;
Can we please delete g_current_bus and use adap-hwadapnr only.
g_current_bus should go away completely.
Ok
i2c = get_base_i2c();
/* wait for some time to give previous transfer a chance to
finish
*/ @@ -415,11 +413,13 @@ static int i2c_transfer(struct s3c24x0_i2c
*i2c,
return result;
}
-int i2c_probe(uchar chip)
+int s3c24x0_i2c_probe(struct i2c_adapter *adap, uchar chip)
static.
{
struct s3c24x0_i2c *i2c;
uchar buf[1];
+ g_current_bus = adap-hwadapnr;
Please get rid of g_current_bus, and use adap-hwadapnr only!
+
i2c = get_base_i2c();
buf[0] = 0;
@@ -431,12 +431,15 @@ int i2c_probe(uchar chip)
return i2c_transfer(i2c, I2C_READ, chip 1, 0, 0, buf, 1) !=
I2C_OK;
}
-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int
len)
+int s3c24x0_i2c_read(struct i2c_adapter *adap, uchar chip, uint
addr,
+ int alen, uchar *buffer, int len)
static.
{
struct s3c24x0_i2c *i2c;
uchar xaddr[4];
int ret;
+ g_current_bus = adap-hwadapnr;
+
if (alen 4) {
debug(I2C read: addr len %d not supported\n, alen);
return 1;
@@ -475,11 +478,14 @@ int i2c_read(uchar chip, uint addr, int alen,
uchar *buffer, int len)
return 0;
}
-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int
len)
+int s3c24x0_i2c_write(struct i2c_adapter *adap, uchar chip, uint
addr,
+ int alen, uchar *buffer, int len)
static
{
struct s3c24x0_i2c *i2c;
uchar xaddr[4];
+ g_current_bus = adap-hwadapnr;
+
if (alen 4) {
debug(I2C write: addr len %d not supported\n, alen);
return 1;
@@ -512,4 +518,109 @@ int i2c_write(uchar chip, uint addr, int alen,
uchar *buffer, int len)
(i2c, I2C_WRITE, chip 1,xaddr[4 - alen], alen, buffer,
len) != 0);
}
+
+struct i2c_adapter s3c24x0_i2c_adap[] = {
+ {
+ .init = s3c24x0_i2c_init,
+ .probe = s3c24x0_i2c_probe,
+ .read = s3c24x0_i2c_read,
+ .write = s3c24x0_i2c_write,
+ .speed = CONFIG_SYS_I2C_SPEED,
+ .slaveaddr
Re: [U-Boot] [PATCH 6/6] WIP: arm: trats: add support for new I2C framework
Hello Heiko,
-Original Message-
From: Heiko Schocher [mailto:h...@denx.de]
Sent: Friday, November 16, 2012 11:46 AM
To: Piotr Wilczek
Cc: u-boot@lists.denx.de; Minkyu Kang; Kyungmin Park; Lukasz Majewski;
Simon Glass; Stephen Warren; Tom Rini
Subject: Re: [PATCH 6/6] WIP: arm: trats: add support for new I2C
framework
Hello Piotr,
On 15.11.2012 09:15, Piotr Wilczek wrote:
This enables new i2c framework on Trats board.
Hardware s3c24x0 i2c driver is used instead of software i2c.
Signed-off-by: Piotr Wilczekp.wilc...@samsung.com
Signed-off-by: Kyungmin Parkkyungmin.p...@samsung.com
CC: Minkyu Kangmk7.k...@samsung.com
---
board/samsung/trats/trats.c | 26 +-
include/configs/trats.h | 16 ++--
2 files changed, 35 insertions(+), 7 deletions(-)
diff --git a/board/samsung/trats/trats.c
b/board/samsung/trats/trats.c
index e11a892..71e1975 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -24,8 +24,10 @@
*/
#includecommon.h
+#includei2c.h
#includelcd.h
#includeasm/io.h
+#includeasm/arch/pinmux.h
#includeasm/arch/cpu.h
#includeasm/arch/gpio.h
#includeasm/arch/mmc.h
@@ -61,6 +63,19 @@ static int hwrevision(int rev)
struct s3c_plat_otg_data s5pc210_otg_data;
+void i2c_init_pinmux(void)
+{
+ int i, err;
+ for (i = 0; i CONFIG_MAX_I2C_NUM; i++) {
+ err = exynos_pinmux_config((PERIPH_ID_I2C0 + i),
+ PINMUX_FLAG_NONE);
+ if (err) {
+ debug(I2C%d not configured\n, (PERIPH_ID_I2C0 +
i));
+ return;
+ }
+ }
+}
+
Is this change multibus specific? Why?
GPIO must be set to I2C function when hardware I2C driver is used.
Also, because only one hardware I2C bus is used I should change pins
function for I2C_5 only.
int board_init(void)
{
gd-bd-bi_boot_params = PHYS_SDRAM_1 + 0x100; @@ -68,6 +83,8 @@
int board_init(void)
check_hw_revision();
printf(HW Revision:\t0x%x\n, board_rev);
+ i2c_init_pinmux();
+
Why this call not in i2c_init_board(void)?
Ok
#if defined(CONFIG_PMIC)
pmic_init();
#endif
@@ -77,14 +94,9 @@ int board_init(void)
void i2c_init_board(void)
{
- struct exynos4_gpio_part1 *gpio1 =
- (struct exynos4_gpio_part1 *)samsung_get_base_gpio_part1();
struct exynos4_gpio_part2 *gpio2 =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
- /* I2C_5 - PMIC */
- s5p_gpio_direction_output(gpio1-b, 7, 1);
- s5p_gpio_direction_output(gpio1-b, 6, 1);
Here again, what has this to do with the new multibus framework?
Currently only software I2c is used and pins must be set as outputs.
With this patchset I switch from software to hardware I2C for PMIC and I
must change pins function from output to I2C.
/* I2C_9 - FG */
s5p_gpio_direction_output(gpio2-y4, 0, 1);
s5p_gpio_direction_output(gpio2-y4, 1, 1); @@ -415,6 +427,8 @@
static int lcd_power(void)
int ret = 0;
struct pmic *p = get_pmic();
+ i2c_set_bus_num(0);
^
Fix number? Please use here a define.
Ok
+
if (pmic_probe(p))
return 0;
@@ -475,6 +489,8 @@ static int mipi_power(void)
int ret = 0;
struct pmic *p = get_pmic();
+ i2c_set_bus_num(0);
+
if (pmic_probe(p))
return 0;
diff --git a/include/configs/trats.h b/include/configs/trats.h index
106fd37..54423f4 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -33,6 +33,7 @@
#define CONFIG_SAMSUNG/* in a SAMSUNG core */
#define CONFIG_S5P/* which is in a S5P Family */
#define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */
+#define CONFIG_EXYNOS4
#define CONFIG_TRATS /* working with TRATS */
#define CONFIG_TIZEN /* TIZEN lib */
@@ -211,18 +212,29 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR -
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_CACHELINE_SIZE 32
-
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_SOFT_SPEED 5
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
-#define CONFIG_SYS_I2C_ADAPTERS{soft_i2c_adap[0]}
Why you delete here this adapter? You can use now in the new Framework
Hard and soft i2c adapter ...
Yes, soft adapter should be kept.
#define CONFIG_SOFT_I2C_READ_REPEATED_START
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SOFT_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS15
+#define CONFIG_HARD_I2C
No longer needed
Ok
+#define CONFIG_DRIVER_S3C24X0_I2C
+#define CONFIG_MAX_I2C_NUM 8
+#define CONFIG_SYS_I2C_SPEED
Re: [U-Boot] [PATCH] ehci-mxc: Fix host power mask bit for i.MX35
On 16/11/2012 12:42, Benoît Thébaudeau wrote: The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance selection bit. This issue has been reported by Michael Burkey mdbur...@gmail.com and fixed by Christoph Fritz chf.fr...@googlemail.com on Linux, from which these #define-s had been copied. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Cc: Stefano Babic sba...@denx.de Cc: Marek Vasut ma...@denx.de Hi Benoit, --- .../drivers/usb/host/ehci-mxc.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git u-boot-imx-f22e4fa.orig/drivers/usb/host/ehci-mxc.c u-boot-imx-f22e4fa/drivers/usb/host/ehci-mxc.c index 7c5f71c..f2642a0 100644 --- u-boot-imx-f22e4fa.orig/drivers/usb/host/ehci-mxc.c +++ u-boot-imx-f22e4fa/drivers/usb/host/ehci-mxc.c @@ -67,7 +67,7 @@ #define MX35_H1_SIC_SHIFT21 #define MX35_H1_SIC_MASK (0x3 MX35_H1_SIC_SHIFT) #define MX35_H1_PP_BIT (1 18) -#define MX35_H1_PM_BIT (1 8) +#define MX35_H1_PM_BIT (1 16) #define MX35_H1_IPPUE_UP_BIT (1 7) #define MX35_H1_IPPUE_DOWN_BIT (1 6) #define MX35_H1_TLL_BIT (1 5) Hey, the patch was sent today to linux-arm ! Very nice you noted and route the bug to u-boot. Acked-by: Stefano Babic sba...@denx.de Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] spi: mxc_spi: Fix spi clock glitch durant reset
On 15/11/2012 22:23, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- drivers/spi/mxc_spi.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index 4bed4f0..102fca5 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -140,8 +140,8 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, reg_ctrl = reg_read(regs-ctrl); /* Reset spi */ - reg_write(regs-ctrl, 0); - reg_write(regs-ctrl, (reg_ctrl | 0x1)); + reg_write(regs-ctrl, (reg_ctrl ~MXC_CSPICTRL_EN)); + reg_write(regs-ctrl, (reg_ctrl | MXC_CSPICTRL_EN)); Right - the enabled was set after clearing the register, but before setting it. Acked-by: Stefano Babic sba...@denx.de Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/4] mx5: Print CSPI clock in 'clock' command
On 16/11/2012 12:15, Fabio Estevam wrote: Hi Dirk, On Fri, Nov 16, 2012 at 4:35 AM, Dirk Behme dirk.be...@gmail.com wrote: I wondered if we want something similar for i.MX6, too. And found that we have this on i.MX6, already. But without #ifdef. http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/mx6/clock.c;h=a01d96f48e04377d705b7a587ec7b3ea59aee283;hb=HEAD#l407 Do we want to add the #ifdef for i.MX6, too? Or would it be nicer to drop the #ifdef in this patch to make i.MX6 and i.MX5 equal? The reason I added the ifdef was to avoid showing the cspi clock on a board that does not use cspi. This would help not 'polluting' the clock command output. Agree. Boards that do not support SPI can have a completely wrong value,. Regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC, PATCH] omap: Invalidate first page to avoid speculation
Hello u-boot list,
Here is a request for comments on the best way to solve a little
speculation issue on recent OMAPs. Any guidance/feedback on the way to go
would be greatly appreciated, please.
I am using u-boot on an OMAP5 HS device (with security, that is), and I am
experiencing security violations due to speculative accesses done by the
Cortex-A15 processor to the region near address zero. This region is a secure
region, where non-secure accesses are forbidden and reported by the security
firmware on an OMAP HS device. On an OMAP GP device, those accesses may very
well exist, but are silently ignored by the firmware. Note that the speculative
accesses are not actual functional accesses, so their being aborted does not
harm the functionality of u-boot as it is.
A quick (and dirty) solution is to mark the region near address zero as being
invalid, which prevents the processor from doing speculative accesses there
(see patch).
This patch as it is has a number of issues: it impacts all ARM devices and it
unmaps too large a region. I am not sure how to cleanly rework the patch so
that it would be made OMAP-only cleanly. Also, unmapping a smaller region to
better fit the hardware characteristics would require using second level
descriptors, and I do not know if this is recommended. To make this worse,
chips in the OMAP family have differences in their secure rom boundaries.
Does the u-boot community feels this issue needs to be addressed? What would be
the best way to solve this?
Best regards,
V.
Signed-off-by: Vincent Stehlé v-ste...@ti.com
---
arch/arm/lib/cache-cp15.c |7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 939de10..57e1974 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -72,8 +72,13 @@ static inline void mmu_setup(void)
u32 reg;
arm_init_before_mmu();
+
+ /* First page (starting at 0x0) is made invalid to avoid
+* speculative accesses in secure rom. */
+ page_table[0] = 0;
+
/* Set up an identity-mapping for all 4GB, rw for everyone */
- for (i = 0; i 4096; i++)
+ for (i = 1; i 4096; i++)
page_table[i] = i 20 | (3 10) | 0x12;
for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
--
1.7.9.5
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[U-Boot] [PATCH 1/8] mx28evk: Configure CONFIG_BOOTDELAY to one second
From: Fabio Estevam fabio.este...@freescale.com One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx28evk.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 2916c71..8b89b25 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -238,7 +238,7 @@ */ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_BOOTFILEuImage #define CONFIG_LOADADDR0x4200 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/8] mx6qsabrelite: Configure CONFIG_BOOTDELAY to one second
From: Fabio Estevam fabio.este...@freescale.com One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx6qsabrelite.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 318f857..759275a 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -144,7 +144,7 @@ #undef CONFIG_CMD_IMLS -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_PREBOOT -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/8] mx53loco: Configure CONFIG_BOOTDELAY to one second
From: Fabio Estevam fabio.este...@freescale.com One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx53loco.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index a62ea78..37f9d69 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -108,7 +108,7 @@ #undef CONFIG_CMD_IMLS -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_ETHPRIMEFEC0 -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/8] mx6qsabre_common: Configure CONFIG_BOOTDELAY to one second
From: Fabio Estevam fabio.este...@freescale.com One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx6qsabre_common.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h index 50f3b01..b8621b8 100644 --- a/include/configs/mx6qsabre_common.h +++ b/include/configs/mx6qsabre_common.h @@ -76,7 +76,7 @@ #define CONFIG_CMD_BOOTZ #undef CONFIG_CMD_IMLS -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_LOADADDR0x1080 #define CONFIG_SYS_TEXT_BASE 0x1780 -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 5/8] mx51evk: Configure CONFIG_BOOTDELAY to one second
From: Fabio Estevam fabio.este...@freescale.com One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx51evk.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 89feaed..e8c6618 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -149,7 +149,7 @@ #define CONFIG_CMD_DATE -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_ETHPRIMEFEC0 -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 8/8] mx35pdk: Configure CONFIG_BOOTDELAY to one second
From: Fabio Estevam fabio.este...@freescale.com One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx35pdk.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index d89db7a..44fb1cd 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -118,7 +118,7 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_LOADADDR0x8080 /* loadaddr env var */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 7/8] mx31pdk: Configure CONFIG_BOOTDELAY to one second
From: Fabio Estevam fabio.este...@freescale.com One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx31pdk.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 223b5b0..6572676 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -106,7 +106,7 @@ #define CONFIG_BOARD_LATE_INIT -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #defineCONFIG_EXTRA_ENV_SETTINGS \ bootargs_base=setenv bootargs console=ttymxc0,115200\0\ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 6/8] mx25pdk: Configure CONFIG_BOOTDELAY to one second
From: Fabio Estevam fabio.este...@freescale.com One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx25pdk.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index a4bd8b0..b5338a0 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -130,7 +130,7 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_NET -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_LOADADDR0x8100 /* loadaddr env var */ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 6/8] omap_gpmc: BCH8 support (ELM based)
Andreas == Andreas Bießmann andreas.de...@googlemail.com writes: Hi, Please note that these patches are AM33XX-specific (as we are using ELM that, I think, just isn't available on OMAP3) so we use OOB layout that is compatible with AM33xx ROM boot code. Andreas You are right, ELM is not available in OMAP3 devices. It seems Andreas the ROM loader of these devices only support the 1-Bit Andreas Hamming, but is also different to the OOB layout used for the Andreas SW 1-bit hamming provided by the Kernel. So we get here a lot Andreas of different OOB layouts ... I wonder if we can stick to Andreas e.g. the generic SW BCH layout (of linux kernel) for all but Andreas the ROM partition (where the SPL is placed). So the SPL need Andreas to know just one mechanism but software modifying that place Andreas needs to know about the 'special' ROM layout. No, please not. Having more than 1 OOB layout on the same NAND device leads to all kind of complications. There has also been kernel patches posted for the ELM, so IMHO the only sane option for am33xx is BCH8 everywhere (with the ROM layout). It's likely that this layout doesn't match with the current kernel layout as RBL uses strange 14th byte for BCH8 while only 13 bytes are needed. Andreas Sorry, what does RBL mean in that context? The ROM boot loader, E.G. the part loading the spl. Actually, the only assumption the code does about the OOB layout is that ECC code occupies continuous area in the OOB. Andreas Well, but you have defined that for example it is written in Andreas big endian. Andreas I'm currently working on a omap3 enabled device that requires Andreas 4-bit ECC for all but the first block. And I'm searching for a Andreas clean solution that would be accepted mainline. I think it Andreas would be best to have the same OOB layout for the whole device Andreas but the SPL space (cause that needs to be read by ROM). The Andreas layout should be chosen at compile time of the SPL. What do Andreas you think about? So the only reason to not have the same OOB layout everywhere is because of ROM restrictions and that 1bit ECC isn't good enough anymore? E.G. you actually would have prefered to use the ROM layout if it would have used something better like the am33xx ROM does. -- Bye, Peter Korsgaard ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ehci-mxc: Fix host power mask bit for i.MX25
The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance selection bit. This issue has been reported by Eric Bénard e...@eukrea.com and fixed by Christoph Fritz chf.fr...@googlemail.com on Linux, from which these #define-s had been copied. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Cc: Stefano Babic sba...@denx.de Cc: Marek Vasut ma...@denx.de --- .../drivers/usb/host/ehci-mxc.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git u-boot-imx-f22e4fa.orig/drivers/usb/host/ehci-mxc.c u-boot-imx-f22e4fa/drivers/usb/host/ehci-mxc.c index 7c5f71c..352ad86 100644 --- u-boot-imx-f22e4fa.orig/drivers/usb/host/ehci-mxc.c +++ u-boot-imx-f22e4fa/drivers/usb/host/ehci-mxc.c @@ -37,7 +37,7 @@ #define MX25_H1_SIC_SHIFT 21 #define MX25_H1_SIC_MASK (0x3 MX25_H1_SIC_SHIFT) #define MX25_H1_PP_BIT (1 18) -#define MX25_H1_PM_BIT (1 8) +#define MX25_H1_PM_BIT (1 16) #define MX25_H1_IPPUE_UP_BIT (1 7) #define MX25_H1_IPPUE_DOWN_BIT (1 6) #define MX25_H1_TLL_BIT(1 5) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6: clock: Only show CSPI clock if CSPI is enabled
Am 16.11.2012 12:30, schrieb Fabio Estevam: From: Fabio Estevam fabio.este...@freescale.com If a board does not enable CSPI, there is no need to show the CSPI clock frequency as part of the 'clock' command. Reported-by: Dirk Behme dirk.be...@gmail.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com Acked-by: Dirk Behme dirk.be...@gmail.com Thanks Dirk --- arch/arm/cpu/armv7/mx6/clock.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index a01d96f..a50db70 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -404,7 +404,9 @@ int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf(\n); printf(IPG%8d kHz\n, mxc_get_clock(MXC_IPG_CLK) / 1000); printf(UART %8d kHz\n, mxc_get_clock(MXC_UART_CLK) / 1000); +#ifdef CONFIG_MXC_SPI printf(CSPI %8d kHz\n, mxc_get_clock(MXC_CSPI_CLK) / 1000); +#endif printf(AHB%8d kHz\n, mxc_get_clock(MXC_AHB_CLK) / 1000); printf(AXI%8d kHz\n, mxc_get_clock(MXC_AXI_CLK) / 1000); printf(DDR%8d kHz\n, mxc_get_clock(MXC_DDR_CLK) / 1000); ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] pull request for u-boot-tegra/master into ARM/master
Albert, Please pull u-boot-tegra/master into ARM/master. Thanks! ./MAKEALL -a arm completes w/o any new errors. checkpatch is clean, also. The following changes since commit 7a5337732e3e05b2b0de1b592fa031b2c7b4f632: Rajeshwari Shinde (1): EXYNOS5: Enable SPI booting. are available in the git repository at: git://git.denx.de/u-boot-tegra master Allen Martin (1): tegra: add CONSOLE_MUX support to tegra-kbc Mayuresh Kulkarni (1): tegra: Enable display/lcd support on Seaboard Simon Glass (16): tegra: Use const for pinmux_config_pingroup/table() tegra: Add display support to funcmux tegra: fdt: Add pwm binding and node tegra: fdt: Add LCD definitions for Tegra tegra: Add support for PWM tegra: Add LCD driver tegra: Add LCD support to Nvidia boards arm: Add control over cachability of memory regions lcd: Add CONFIG_LCD_ALIGNMENT to select frame buffer alignment lcd: Add support for flushing LCD fb from dcache after update tegra: Align LCD frame buffer to section boundary tegra: Support control of cache settings for LCD tegra: fdt: Add LCD definitions for Seaboard lcd: Add CONFIG_CONSOLE_SCROLL_LINES option to speed console tegra: Remove unnecessary CONFIG_SYS_NAND_BASE tegra: config: seaboard: Move tegra-common-post to correct place Stephen Warren (4): ARM: tegra: TrimSlice: add support for USB1 port mmc: tegra: support 4-bit operation too on 8-bit slots ARM: tegra: enable 8-bit SD slots in board files tegra: use generic fs commands in BOOTCOMMAND Wei Ni (1): tegra: Add SOC support for display/lcd README | 16 + arch/arm/cpu/armv7/cache_v7.c | 11 + arch/arm/cpu/armv7/tegra20/Makefile|2 + arch/arm/cpu/armv7/tegra20/display.c | 409 ++ arch/arm/cpu/armv7/tegra20/pwm.c | 101 + arch/arm/cpu/tegra20-common/funcmux.c | 37 ++ arch/arm/cpu/tegra20-common/pinmux.c |4 +- arch/arm/dts/tegra20.dtsi | 105 + arch/arm/include/asm/arch-tegra20/dc.h | 545 arch/arm/include/asm/arch-tegra20/display.h| 152 +++ arch/arm/include/asm/arch-tegra20/pinmux.h |4 +- arch/arm/include/asm/arch-tegra20/pwm.h| 75 arch/arm/include/asm/system.h | 31 ++ arch/arm/lib/cache-cp15.c | 51 ++- board/compal/paz00/paz00.c |5 +- board/compulab/dts/tegra20-trimslice.dts |3 +- board/compulab/trimslice/trimslice.c |8 + board/nvidia/common/board.c| 24 + board/nvidia/dts/tegra20-seaboard.dts | 33 ++ board/nvidia/harmony/harmony.c |5 +- board/nvidia/seaboard/seaboard.c |5 +- common/lcd.c | 89 - common/main.c | 12 +- doc/device-tree-bindings/pwm/tegra20-pwm.txt | 18 + doc/device-tree-bindings/video/displaymode.txt | 42 ++ doc/device-tree-bindings/video/tegra20-dc.txt | 85 drivers/input/tegra-kbc.c | 18 +- drivers/mmc/tegra_mmc.c|7 +- drivers/video/Makefile |1 + drivers/video/tegra.c | 379 include/configs/harmony.h |4 +- include/configs/paz00.h|3 + include/configs/seaboard.h | 20 +- include/configs/tec.h |1 - include/configs/tegra-common-post.h| 39 +- include/configs/tegra20-common.h |3 + include/configs/trimslice.h|4 + include/configs/ventana.h |3 + include/configs/whistler.h |3 + include/fdtdec.h |2 + include/lcd.h | 11 + lib/fdtdec.c |2 + 42 files changed, 2294 insertions(+), 78 deletions(-) create mode 100644 arch/arm/cpu/armv7/tegra20/display.c create mode 100644 arch/arm/cpu/armv7/tegra20/pwm.c create mode 100644 arch/arm/include/asm/arch-tegra20/dc.h create mode 100644 arch/arm/include/asm/arch-tegra20/display.h create mode 100644 arch/arm/include/asm/arch-tegra20/pwm.h create mode 100644 doc/device-tree-bindings/pwm/tegra20-pwm.txt create mode 100644 doc/device-tree-bindings/video/displaymode.txt create mode 100644 doc/device-tree-bindings/video/tegra20-dc.txt create mode 100644 drivers/video/tegra.c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] nand: Add torture feature
This patch adds a NAND Flash torture feature, which is useful as a block stress
test to determine if a block is still good and reliable (or should be marked as
bad), e.g. after a write error.
This code is ported from mtd-utils' lib/libmtd.c.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Cc: Scott Wood scottw...@freescale.com
---
Changes for v2:
- Define and document CONFIG_CMD_NAND_TORTURE to selectively enable this
feature.
- Elaborate the documentation of the torture command.
- Print an error message if the erase, read or write fails.
- Rename the res variable to err in order to remove confusion with ret.
.../common/cmd_nand.c | 22
.../doc/README.nand| 21
.../drivers/mtd/nand/nand_util.c | 123
.../include/nand.h |3 +
4 files changed, 169 insertions(+)
diff --git u-boot-nand-flash-9c60e75.orig/common/cmd_nand.c
u-boot-nand-flash-9c60e75/common/cmd_nand.c
index 9c6dabe..639db81 100644
--- u-boot-nand-flash-9c60e75.orig/common/cmd_nand.c
+++ u-boot-nand-flash-9c60e75/common/cmd_nand.c
@@ -701,6 +701,25 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *
const argv[])
return ret == 0 ? 0 : 1;
}
+#ifdef CONFIG_CMD_NAND_TORTURE
+ if (strcmp(cmd, torture) == 0) {
+ if (argc 3)
+ goto usage;
+
+ if (!str2off(argv[2], off)) {
+ puts(Offset is not a valid number\n);
+ return 1;
+ }
+
+ printf(\nNAND torture: device %d offset 0x%llx size 0x%x\n,
+ dev, off, nand-erasesize);
+ ret = nand_torture(nand, off);
+ printf( %s\n, ret ? Failed : Passed);
+
+ return ret == 0 ? 0 : 1;
+ }
+#endif
+
if (strcmp(cmd, markbad) == 0) {
argc -= 2;
argv += 2;
@@ -812,6 +831,9 @@ U_BOOT_CMD(
nand erase.chip [clean] - erase entire chip'\n
nand bad - show bad blocks\n
nand dump[.oob] off - dump page\n
+#ifdef CONFIG_CMD_NAND_TORTURE
+ nand torture off - torture block at offset\n
+#endif
nand scrub [-y] off size | scrub.part partition | scrub.chip\n
really clean NAND erasing bad blocks (UNSAFE)\n
nand markbad off [...] - mark bad block(s) at offset (UNSAFE)\n
diff --git u-boot-nand-flash-9c60e75.orig/doc/README.nand
u-boot-nand-flash-9c60e75/doc/README.nand
index c130189..a1a511c 100644
--- u-boot-nand-flash-9c60e75.orig/doc/README.nand
+++ u-boot-nand-flash-9c60e75/doc/README.nand
@@ -108,6 +108,9 @@ Configuration Options:
CONFIG_CMD_NAND
Enables NAND support and commmands.
+ CONFIG_CMD_NAND_TORTURE
+ Enables the torture command (see description of this command below).
+
CONFIG_MTD_NAND_ECC_JFFS2
Define this if you want the Error Correction Code information in
the out-of-band data to be formatted to match the JFFS2 file system.
@@ -213,6 +216,24 @@ Miscellaneous and testing commands:
DANGEROUS!!! Factory set bad blocks will be lost. Use only
to remove artificial bad blocks created with the markbad command.
+ torture offset
+ Torture block to determine if it is still reliable.
+ Enabled by the CONFIG_CMD_NAND_TORTURE configuration option.
+ This command returns 0 if the block is still reliable, else 1.
+ If the block is detected as unreliable, it is up to the user to decide to
+ mark this block as bad.
+ The analyzed block is put through 3 erase / write cycles (or less if the
block
+ is detected as unreliable earlier).
+ This command can be used in scripts, e.g. together with the markbad command
to
+ automate retries and handling of possibly newly detected bad blocks if the
+ nand write command fails.
+ It can also be used manually by users having seen some NAND errors in logs to
+ search the root cause of these errors.
+ The underlying nand_torture() function is also useful for code willing to
+ automate actions following a nand-write() error. This would e.g. be required
+ in order to program or update safely firmware to NAND, especially for the UBI
+ part of such firmware.
+
NAND locking command (for chips with active LOCKPRE pin)
diff --git u-boot-nand-flash-9c60e75.orig/drivers/mtd/nand/nand_util.c
u-boot-nand-flash-9c60e75/drivers/mtd/nand/nand_util.c
index 2855683..a162964 100644
--- u-boot-nand-flash-9c60e75.orig/drivers/mtd/nand/nand_util.c
+++ u-boot-nand-flash-9c60e75/drivers/mtd/nand/nand_util.c
@@ -683,3 +683,126 @@ int nand_read_skip_bad(nand_info_t *nand, loff_t offset,
size_t *length,
return 0;
}
+
+#ifdef CONFIG_CMD_NAND_TORTURE
+
+/**
+ * check_pattern:
+ *
+ * Check if buffer contains only a certain byte pattern.
+ *
+ * @param buf buffer to check
+ * @param patt the pattern to check
+ * @param size buffer size in bytes
+ *
Re: [U-Boot] [PATCH v2 13/13] mxc nand: Add support for i.MX5
Hi Scott, On Thursday, November 15, 2012 11:22:03 PM, Scott Wood wrote: On 09/18/2012 01:11:21 PM, Tom Rini wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 09/17/12 17:36, Scott Wood wrote: On Tue, Aug 21, 2012 at 11:04:14PM +0200, Benoît Thébaudeau wrote: Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Cc: Scott Wood scottw...@freescale.com Cc: Stefano Babic sba...@denx.de --- Changes for v2: - Fix warning for unused tmp variable in board_nand_init() for NFC V1. .../arch/arm/include/asm/arch-mx5/imx-regs.h |9 + .../drivers/mtd/nand/mxc_nand.c| 219 +++- .../include/fsl_nfc.h | 149 - .../nand_spl/nand_boot_fsl_nfc.c | 114 +++--- 4 files changed, 365 insertions(+), 126 deletions(-) Unless Tom or Wolfgang object, I'm inclined to drop the objection to adding new hardware support to nand_spl in this case. I'd rather see the support be merged rather than ignored because a contributor has time for a small job but not a large one. Plus, this code will likely be reused by the new SPL support, if this platform is space constrained, so it's not dead-end effort. I'm OK with pulling this in while providing an on-the-record prod to please find some time to do a conversion or two in time for v2013.01. I'm going to leave this one until there's a config added that uses it, so that we at least get compile-testing. OK. I won't be able to add my i.MX51 board to mainline before at least a few months. It's hard to find the schematics of all the i.MX5 boards supported by mainline U-Boot. According to the links below, at least the Genesi EFIKA MX Smartbook and the Freescale MX53 ARD boards have embedded NAND. Matt, Fabio, is it possible to find the schematics of these boards somewhere? http://www.genesi-tech.com/products/smartbook https://community.freescale.com/thread/289468 The EFIKA MX Smartbook probably has MLC if we consider its NAND size. 4-kiB pages should be supported by nand_spl/nand_boot_fsl_nfc.c, but not yet by drivers/mtd/nand/mxc_nand.c. The latter currently has a CONFIG_SYS_NAND_LARGEPAGE to differentiate 512-B and 2-kiB pages. If we were to add support for 4-kiB pages to this driver, I think that this should be replaced with a CONFIG_SYS_NAND_PAGE_SIZE like in nand_boot_fsl_nfc.c. Do you agree? Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 13/13] mxc nand: Add support for i.MX5
On 11/16/2012 02:15:33 PM, Benoît Thébaudeau wrote: The EFIKA MX Smartbook probably has MLC if we consider its NAND size. 4-kiB pages should be supported by nand_spl/nand_boot_fsl_nfc.c, but not yet by drivers/mtd/nand/mxc_nand.c. The latter currently has a CONFIG_SYS_NAND_LARGEPAGE to differentiate 512-B and 2-kiB pages. If we were to add support for 4-kiB pages to this driver, I think that this should be replaced with a CONFIG_SYS_NAND_PAGE_SIZE like in nand_boot_fsl_nfc.c. Do you agree? Yes. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 13/13] mxc nand: Add support for i.MX5
On 11/16/2012 02:18:51 PM, Scott Wood wrote: On 11/16/2012 02:15:33 PM, Benoît Thébaudeau wrote: The EFIKA MX Smartbook probably has MLC if we consider its NAND size. 4-kiB pages should be supported by nand_spl/nand_boot_fsl_nfc.c, but not yet by drivers/mtd/nand/mxc_nand.c. The latter currently has a CONFIG_SYS_NAND_LARGEPAGE to differentiate 512-B and 2-kiB pages. If we were to add support for 4-kiB pages to this driver, I think that this should be replaced with a CONFIG_SYS_NAND_PAGE_SIZE like in nand_boot_fsl_nfc.c. Do you agree? Yes. ...or use the runtime detection if practical. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 13/13] mxc nand: Add support for i.MX5
On Friday, November 16, 2012 9:15:33 PM, Benoît Thébaudeau wrote: Hi Scott, On Thursday, November 15, 2012 11:22:03 PM, Scott Wood wrote: On 09/18/2012 01:11:21 PM, Tom Rini wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 09/17/12 17:36, Scott Wood wrote: On Tue, Aug 21, 2012 at 11:04:14PM +0200, Benoît Thébaudeau wrote: Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Cc: Scott Wood scottw...@freescale.com Cc: Stefano Babic sba...@denx.de --- Changes for v2: - Fix warning for unused tmp variable in board_nand_init() for NFC V1. .../arch/arm/include/asm/arch-mx5/imx-regs.h |9 + .../drivers/mtd/nand/mxc_nand.c| 219 +++- .../include/fsl_nfc.h | 149 - .../nand_spl/nand_boot_fsl_nfc.c | 114 +++--- 4 files changed, 365 insertions(+), 126 deletions(-) Unless Tom or Wolfgang object, I'm inclined to drop the objection to adding new hardware support to nand_spl in this case. I'd rather see the support be merged rather than ignored because a contributor has time for a small job but not a large one. Plus, this code will likely be reused by the new SPL support, if this platform is space constrained, so it's not dead-end effort. I'm OK with pulling this in while providing an on-the-record prod to please find some time to do a conversion or two in time for v2013.01. I'm going to leave this one until there's a config added that uses it, so that we at least get compile-testing. OK. I won't be able to add my i.MX51 board to mainline before at least a few months. It's hard to find the schematics of all the i.MX5 boards supported by mainline U-Boot. According to the links below, at least the Genesi EFIKA MX Smartbook and the Freescale MX53 ARD boards have embedded NAND. Matt, Fabio, is it possible to find the schematics of these boards somewhere? http://www.genesi-tech.com/products/smartbook https://community.freescale.com/thread/289468 The EFIKA MX Smartbook probably has MLC if we consider its NAND size. 4-kiB pages should be supported by nand_spl/nand_boot_fsl_nfc.c, but not yet by drivers/mtd/nand/mxc_nand.c. The latter currently has a CONFIG_SYS_NAND_LARGEPAGE to differentiate 512-B and 2-kiB pages. If we were to add support for 4-kiB pages to this driver, I think that this should be replaced with a CONFIG_SYS_NAND_PAGE_SIZE like in nand_boot_fsl_nfc.c. Do you agree? Also, I've noticed that some of the oobfree fields of the nand_ecclayout structures in mxc_nand.c are slightly different from what can be found in Linux. Any idea about which one is correct (if any)? This field does not even always start at offset 0 when it looks free according to the ECC info. Is this normal? Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC, PATCH] omap: Invalidate first page to avoid speculation
Hi Vincent,
On Fri, 16 Nov 2012 14:36:29 +0100, Vincent Stehlé v-ste...@ti.com
wrote:
Hello u-boot list,
Here is a request for comments on the best way to solve a little
speculation issue on recent OMAPs. Any guidance/feedback on the way to go
would be greatly appreciated, please.
I am using u-boot on an OMAP5 HS device (with security, that is), and I am
experiencing security violations due to speculative accesses done by the
Cortex-A15 processor to the region near address zero. This region is a secure
region, where non-secure accesses are forbidden and reported by the security
firmware on an OMAP HS device. On an OMAP GP device, those accesses may very
well exist, but are silently ignored by the firmware. Note that the
speculative
accesses are not actual functional accesses, so their being aborted does not
harm the functionality of u-boot as it is.
A quick (and dirty) solution is to mark the region near address zero as
being
invalid, which prevents the processor from doing speculative accesses there
(see patch).
This patch as it is has a number of issues: it impacts all ARM devices and
it
unmaps too large a region. I am not sure how to cleanly rework the patch so
that it would be made OMAP-only cleanly. Also, unmapping a smaller region to
better fit the hardware characteristics would require using second level
descriptors, and I do not know if this is recommended. To make this worse,
chips in the OMAP family have differences in their secure rom boundaries.
Does the u-boot community feels this issue needs to be addressed? What would
be
the best way to solve this?
Best regards,
V.
Signed-off-by: Vincent Stehlé v-ste...@ti.com
---
arch/arm/lib/cache-cp15.c |7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 939de10..57e1974 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -72,8 +72,13 @@ static inline void mmu_setup(void)
u32 reg;
arm_init_before_mmu();
+
+ /* First page (starting at 0x0) is made invalid to avoid
+ * speculative accesses in secure rom. */
+ page_table[0] = 0;
+
/* Set up an identity-mapping for all 4GB, rw for everyone */
- for (i = 0; i 4096; i++)
+ for (i = 1; i 4096; i++)
page_table[i] = i 20 | (3 10) | 0x12;
for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
To make this affect only some CPUs or even boards, you can define and
use a weak function which would handle filling the page-table; the weak,
default, function would fill table[0] like others, while OMAP5 would
have a strong version which would clear table[0].
Amicalement,
--
Albert.
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Re: [U-Boot] please pull u-boot-samsung master
Hi Minkyu, On Fri, 16 Nov 2012 15:40:58 +0900, Minkyu Kang mk7.k...@samsung.com wrote: On 16/11/12 08:50, Albert ARIBAUD wrote: Hi Minkyu, (Was your master branch rebased?) Yes. Is it not recommended? The wiki may still be lagging behind but it has been discussed here and master branches should never be rebased, they should merge. Merges can fast-forward, though, if possible. The idea is that custodian master branches should be fairly autonomous projects, synchronizing to/from upstream as required, but not rebasing. 'Next' branches should try to follow this too, although rebasing a 'next' is allowed. Thanks. Minkyu Kang. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] pull request for u-boot-tegra/master into ARM/master
Hi Tom, On Fri, 16 Nov 2012 10:14:46 -0700, Tom Warren twarren.nvi...@gmail.com wrote: Albert, Please pull u-boot-tegra/master into ARM/master. Thanks! ./MAKEALL -a arm completes w/o any new errors. checkpatch is clean, also. I see three boards failing which do build on current u-boot-arm/master: palmld palmtc zipitz2 All have the same error: /home/albert/src/u-boot-arm/common/lcd.c:125: undefined reference to `flush_dcache_range' git bisect run ./MAKEALL zipitz2 traces the problem to commit 9c9e9b0d... lcd: Add support for flushing LCD fb from dcache after update from Simon Glass (already Cc:). Simon, can you look into this? Tom, can you provide a fixed pull request once the issue is fixed? Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/57] RFC: Move arch-specific global data into its own structure
The previous generic board series hit a snag in that we needed generic code to access some of the architecture-specific fields in global_data. The solution eventually arrived at was to move these fields into a separate structure, so that global_data has the generic fields, and within that there is an arch_global_data structure holding the architecture-specific ones. This series makes that change. Assuming this is reasonable, the next step is to bring back the generic board patches on top of this. A few minor points need to be resolved in this series: - if it's ok with everyone, drop include/asm-generic/global_data_flags.h, since it should not be needed now - possibly unify brg_clk on powerpc (but that would involve unifying some ifdefs - decide what to do about PCI clock being present with there is no CONFIG_PCI. It seem wrong to me, but I haven't changed it for this series. I have completed a build of all commits for all builds and see no regressions. But the following boards had errors/warnings, so it seems I need to continue working on my toolchains: blackfin: + bf561-acvilon + dnp5370 + cm-bf561 + blackstamp + br4 + bct-brettl2 + cm-bf527 + bf506f-ezkit + ip04 + bf527-sdp + bf537-stamp + bf527-ezkit-v2 + cm-bf537e + tcm-bf518 + cm-bf537u + bf527-ezkit + bf537-pnav + cm-bf533 + pr1 + bf533-ezkit + ibf-dsp561 + bf537-srv1 + cm-bf548 + bf537-minotaur + bf538f-ezkit + bf548-ezkit + bf525-ucr2 + blackvme + tcm-bf537 + bf533-stamp + bf518f-ezbrd + bf527-ad7160-eval + bf526-ezbrd + bf561-ezkit avr32: + hammerhead + atngw100mkii + grasshopper + favr-32-ezkit + atstk1006 + atstk1004 + atstk1003 + atstk1002 + atngw100 + mimc200 m68k: + M5235EVB_Flash32 + M54455EVB_a66 + M5329AFEE + M5249EVB + idmr + M5208EVBE + eb_cpu5282 + M5475FFE + M54451EVB + astro_mcf5373l + M54418TWR_serial_rmii + M54455EVB_intel + M5282EVB + M54455EVB_i66 + M5475GFE + M5253DEMO + M54455EVB_stm33 + M5253EVBE + M5485BFE + M5485DFE + M5329BFEE + M52277EVB + M5475EFE + M54418TWR_nand_mii + M5475CFE + cobra5272 + M5485AFE + M53017EVB + M5475AFE + M5485HFE + M5235EVB + M5275EVB + M5271EVB + M54418TWR_nand_rmii_lowfreq + TASREG + M5475BFE + M5475DFE + M52277EVB_stmicro + eb_cpu5282_internal + M54451EVB_stmicro + M5485GFE + M5373EVB + M5485EFE + M5485FFE + M54418TWR + M54418TWR_nand_rmii + M54418TWR_serial_mii + M5485CFE + M54455EVB + M5272C3 powerpc: + MPC8641HPCN_36BIT + MPC8641HPCN + xpedite517x + MVBLM7 + MVSMR sparc: + grsim + grsim_leon2 + gr_cpci_ax2000 + gr_xc3s_1500 + gr_ep2s60 sh: + ap_sh4a_4a + ms7750se + sh7763rdp + r0p7734 + r2dplus + ms7720se + rsk7269 + rsk7264 + shmin + sh7757lcr + espt + mpr2 + ms7722se + r7780mp + ecovec + rsk7203 + MigoR + sh7785lcr_32bit + sh7785lcr + ap325rxa nios2: + PK1C20 + PCI5441 + nios2-generic microblaze: + microblaze-generic openrisc: + openrisc-generic mips: + incaip_150MHz + pb1000 + vct_premium_onenand + vct_platinum + qemu_mips + vct_premium_small + dbau1100 + vct_platinumavc_small + vct_premium_onenand_small + incaip + vct_platinum_small + dbau1550 + dbau1500 + qemu_mips64el + vct_platinumavc_onenand_small + incaip_133MHz + vct_platinum_onenand_small + vct_premium + vct_platinumavc_onenand + qemu_mips64 + qi_lb60 + vct_platinumavc + incaip_100MHz + vct_platinum_onenand + qemu_mipsel + dbau1550_el + dbau1000 arm: + VCMA9 + smdk2410 nds32: + adp-ag101p + adp-ag102 + adp-ag101 Simon Glass (57): Add architecture-specific global data at91: Move at91 global data into arch_global_data arm: Move timer_rate_hz into arch_global_data arm: Move tbu to arch_global_data arm: Move tbl to arch_global_data arm: Move lastinc to arch_global_data arm: Move timer_reset_value to arch_global_data ixp: Move timestamp to arch_global_data nds32: Drop tlb_addr from global data arm: Move tlb_addr to arch_global_data x86: Move gdt_addr, new_gd_addr to arch_global_data x86: Remove reset_status, relocoff from global_data x86: Move new_gd_addr to arch_global_data ppc: Move brg_clk to arch_global_data ppc: Remove extra pci_clk fields from global_data ppc: Move clock fields to arch_global_data ppc: Move mpc83xx clock fields to arch_global_data ppc: Move lbc_clk and cpu to arch_global_data ppc: m68k: Move i2c1_clk, i2c2_clk to arch_global_data ppc: Move CONFIG_QE to arch_global_data ppc: Move used_laws to arch_global_data ppc: Move used_tlb_cams to arch_global_data ppc: Move mpc5xxx clocks to arch_global_data ppc: Move mpc512x clocks to arch_global_data ppc: Move mpc8220 clocks to arch_global_data ppc: Move reset_status to arch_global_data ppc: Move arbiter fields to arch_global_data ppc: Move dp_alloc_base, dp_alloc_top to arch_global_data arm: Move uart_clk to arch_global_data ppc: Move mirror_hack to arch_global_data ppc: Remove console_addr from global data
[U-Boot] [PATCH 02/57] at91: Move at91 global data into arch_global_data
Move these fields into arch_global_data. Signed-off-by: Simon Glass s...@chromium.org --- arch/arm/cpu/arm920t/at91/clock.c| 24 +--- arch/arm/cpu/arm926ejs/at91/clock.c | 30 -- arch/arm/cpu/arm926ejs/at91/timer.c |2 +- arch/arm/include/asm/arch-at91/clk.h | 12 ++-- arch/arm/include/asm/global_data.h | 18 +- 5 files changed, 45 insertions(+), 41 deletions(-) diff --git a/arch/arm/cpu/arm920t/at91/clock.c b/arch/arm/cpu/arm920t/at91/clock.c index 09d2799..696200d 100644 --- a/arch/arm/cpu/arm920t/at91/clock.c +++ b/arch/arm/cpu/arm920t/at91/clock.c @@ -29,11 +29,11 @@ static unsigned long at91_css_to_rate(unsigned long css) case AT91_PMC_MCKR_CSS_SLOW: return CONFIG_SYS_AT91_SLOW_CLOCK; case AT91_PMC_MCKR_CSS_MAIN: - return gd-main_clk_rate_hz; + return gd-arch.main_clk_rate_hz; case AT91_PMC_MCKR_CSS_PLLA: - return gd-plla_rate_hz; + return gd-arch.plla_rate_hz; case AT91_PMC_MCKR_CSS_PLLB: - return gd-pllb_rate_hz; + return gd-arch.pllb_rate_hz; } return 0; @@ -124,10 +124,10 @@ int at91_clock_init(unsigned long main_clock) main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16); } #endif - gd-main_clk_rate_hz = main_clock; + gd-arch.main_clk_rate_hz = main_clock; /* report if PLLA is more than mildly overclocked */ - gd-plla_rate_hz = at91_pll_rate(main_clock, readl(pmc-pllar)); + gd-arch.plla_rate_hz = at91_pll_rate(main_clock, readl(pmc-pllar)); #ifdef CONFIG_USB_ATMEL /* @@ -136,9 +136,10 @@ int at91_clock_init(unsigned long main_clock) * * REVISIT: assumes MCK doesn't derive from PLLB! */ - gd-at91_pllb_usb_init = at91_pll_calc(main_clock, 4800 * 2) | + gd-arch.at91_pllb_usb_init = at91_pll_calc(main_clock, 4800 * 2) | AT91_PMC_PLLBR_USBDIV_2; - gd-pllb_rate_hz = at91_pll_rate(main_clock, gd-at91_pllb_usb_init); + gd-arch.pllb_rate_hz = at91_pll_rate(main_clock, + gd-arch.at91_pllb_usb_init); #endif /* @@ -146,13 +147,14 @@ int at91_clock_init(unsigned long main_clock) * For now, assume this parentage won't change. */ mckr = readl(pmc-mckr); - gd-mck_rate_hz = at91_css_to_rate(mckr AT91_PMC_MCKR_CSS_MASK); - freq = gd-mck_rate_hz; + gd-arch.mck_rate_hz = at91_css_to_rate(mckr AT91_PMC_MCKR_CSS_MASK); + freq = gd-arch.mck_rate_hz; freq /= (1 ((mckr AT91_PMC_MCKR_PRES_MASK) 2)); /* prescale */ /* mdiv */ - gd-mck_rate_hz = freq / (1 + ((mckr AT91_PMC_MCKR_MDIV_MASK) 8)); - gd-cpu_clk_rate_hz = freq; + gd-arch.mck_rate_hz = freq / + (1 + ((mckr AT91_PMC_MCKR_MDIV_MASK) 8)); + gd-arch.cpu_clk_rate_hz = freq; return 0; } diff --git a/arch/arm/cpu/arm926ejs/at91/clock.c b/arch/arm/cpu/arm926ejs/at91/clock.c index dc5c6c4..f825388 100644 --- a/arch/arm/cpu/arm926ejs/at91/clock.c +++ b/arch/arm/cpu/arm926ejs/at91/clock.c @@ -29,11 +29,11 @@ static unsigned long at91_css_to_rate(unsigned long css) case AT91_PMC_MCKR_CSS_SLOW: return CONFIG_SYS_AT91_SLOW_CLOCK; case AT91_PMC_MCKR_CSS_MAIN: - return gd-main_clk_rate_hz; + return gd-arch.main_clk_rate_hz; case AT91_PMC_MCKR_CSS_PLLA: - return gd-plla_rate_hz; + return gd-arch.plla_rate_hz; case AT91_PMC_MCKR_CSS_PLLB: - return gd-pllb_rate_hz; + return gd-arch.pllb_rate_hz; } return 0; @@ -132,10 +132,10 @@ int at91_clock_init(unsigned long main_clock) main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16); } #endif - gd-main_clk_rate_hz = main_clock; + gd-arch.main_clk_rate_hz = main_clock; /* report if PLLA is more than mildly overclocked */ - gd-plla_rate_hz = at91_pll_rate(main_clock, readl(pmc-pllar)); + gd-arch.plla_rate_hz = at91_pll_rate(main_clock, readl(pmc-pllar)); #ifdef CONFIG_USB_ATMEL /* @@ -144,9 +144,10 @@ int at91_clock_init(unsigned long main_clock) * * REVISIT: assumes MCK doesn't derive from PLLB! */ - gd-at91_pllb_usb_init = at91_pll_calc(main_clock, 4800 * 2) | + gd-arch.at91_pllb_usb_init = at91_pll_calc(main_clock, 4800 * 2) | AT91_PMC_PLLBR_USBDIV_2; - gd-pllb_rate_hz = at91_pll_rate(main_clock, gd-at91_pllb_usb_init); + gd-arch.pllb_rate_hz = at91_pll_rate(main_clock, + gd-arch.at91_pllb_usb_init); #endif /* @@ -157,15 +158,15 @@ int at91_clock_init(unsigned long main_clock) #if
[U-Boot] [PATCH 10/57] arm: Move tlb_addr to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/include/asm/global_data.h |6 +++---
arch/arm/lib/board.c |2 +-
arch/arm/lib/cache-cp15.c |4 ++--
common/cmd_bdinfo.c|2 +-
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/global_data.h
b/arch/arm/include/asm/global_data.h
index 35d07d0..0d1ebfd 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -44,6 +44,9 @@ struct arch_global_data {
#ifdef CONFIG_IXP425
unsigned long timestamp;
#endif
+#if !(defined(CONFIG_SYS_ICACHE_OFF) defined(CONFIG_SYS_DCACHE_OFF))
+ unsigned long tlb_addr;
+#endif
};
/*
@@ -74,9 +77,6 @@ typedef struct global_data {
unsigned long irq_sp; /* irq stack pointer */
unsigned long start_addr_sp; /* start_addr_stackpointer */
unsigned long reloc_off;
-#if !(defined(CONFIG_SYS_ICACHE_OFF) defined(CONFIG_SYS_DCACHE_OFF))
- unsigned long tlb_addr;
-#endif
const void *fdt_blob; /* Our device tree, NULL if none */
void**jt; /* jump table */
charenv_buf[32];/* buffer for getenv() before reloc. */
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 92cad9a..43cd970 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -351,7 +351,7 @@ void board_init_f(ulong bootflag)
/* round down to next 64 kB limit */
addr = ~(0x1 - 1);
- gd-tlb_addr = addr;
+ gd-arch.tlb_addr = addr;
debug(TLB table at: %08lx\n, addr);
#endif
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 939de10..5df6735 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -52,7 +52,7 @@ static void cp_delay (void)
static inline void dram_bank_mmu_setup(int bank)
{
- u32 *page_table = (u32 *)gd-tlb_addr;
+ u32 *page_table = (u32 *)gd-arch.tlb_addr;
bd_t *bd = gd-bd;
int i;
@@ -67,7 +67,7 @@ static inline void dram_bank_mmu_setup(int bank)
/* to activate the MMU we need to set up virtual memory: use 1M areas */
static inline void mmu_setup(void)
{
- u32 *page_table = (u32 *)gd-tlb_addr;
+ u32 *page_table = (u32 *)gd-arch.tlb_addr;
int i;
u32 reg;
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index 48cdd16..82a3693 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -371,7 +371,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
#endif
printf(baudrate= %u bps\n, bd-bi_baudrate);
#if !(defined(CONFIG_SYS_ICACHE_OFF) defined(CONFIG_SYS_DCACHE_OFF))
- print_num(TLB addr, gd-tlb_addr);
+ print_num(TLB addr, gd-arch.tlb_addr);
#endif
print_num(relocaddr, gd-relocaddr);
print_num(reloc off, gd-reloc_off);
--
1.7.7.3
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[U-Boot] [PATCH 09/57] nds32: Drop tlb_addr from global data
This field doesn't appear to be used for anything important, so drop it.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/nds32/include/asm/global_data.h |3 ---
arch/nds32/lib/board.c | 11 ---
2 files changed, 0 insertions(+), 14 deletions(-)
diff --git a/arch/nds32/include/asm/global_data.h
b/arch/nds32/include/asm/global_data.h
index 475bb44..e693b01 100644
--- a/arch/nds32/include/asm/global_data.h
+++ b/arch/nds32/include/asm/global_data.h
@@ -62,9 +62,6 @@ typedef struct global_data {
unsigned long mon_len;/* monitor len */
unsigned long irq_sp; /* irq stack pointer */
unsigned long start_addr_sp; /* start_addr_stackpointer */
-#if !(defined(CONFIG_SYS_ICACHE_OFF) defined(CONFIG_SYS_DCACHE_OFF))
- unsigned long tlb_addr;
-#endif
void**jt; /* jump table */
charenv_buf[32];/* buffer for getenv() before reloc. */
diff --git a/arch/nds32/lib/board.c b/arch/nds32/lib/board.c
index 91395ca..09feaf3 100644
--- a/arch/nds32/lib/board.c
+++ b/arch/nds32/lib/board.c
@@ -207,17 +207,6 @@ void board_init_f(ulong bootflag)
addr = CONFIG_SYS_SDRAM_BASE + gd-ram_size;
-#if !(defined(CONFIG_SYS_ICACHE_OFF) defined(CONFIG_SYS_DCACHE_OFF))
- /* reserve TLB table */
- addr -= (4096 * 4);
-
- /* round down to next 64 kB limit */
- addr = ~(0x1 - 1);
-
- gd-tlb_addr = addr;
- debug(TLB table at: %08lx\n, addr);
-#endif
-
/* round down to next 4 kB limit */
addr = ~(4096 - 1);
debug(Top of RAM usable for U-Boot at: %08lx\n, addr);
--
1.7.7.3
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[U-Boot] [PATCH 11/57] x86: Move gdt_addr, new_gd_addr to arch_global_data
Move these field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/global_data.h |4 ++--
arch/x86/lib/init_helpers.c| 10 +-
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/x86/include/asm/global_data.h
b/arch/x86/include/asm/global_data.h
index b4b749b..ce96efb 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -28,6 +28,8 @@
/* Architecture-specific global data */
struct arch_global_data {
+ unsigned long gdt_addr; /* Location of GDT */
+ unsigned long new_gd_addr; /* New location of Global Data */
};
/*
@@ -56,8 +58,6 @@ typedef struct global_data {
unsigned long bus_clk;
unsigned long relocaddr; /* Start address of U-Boot in RAM */
unsigned long start_addr_sp; /* start_addr_stackpointer */
- unsigned long gdt_addr; /* Location of GDT */
- unsigned long new_gd_addr;/* New location of Global Data */
phys_size_t ram_size; /* RAM size */
unsigned long reset_status; /* reset status register at boot */
void**jt; /* jump table */
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c
index 9ec34ff..05cadcd 100644
--- a/arch/x86/lib/init_helpers.c
+++ b/arch/x86/lib/init_helpers.c
@@ -87,12 +87,12 @@ int calculate_relocation_address(void)
dest_addr = gd-ram_size;
dest_addr -= GENERATED_GBL_DATA_SIZE;
dest_addr = ~15;
- gd-new_gd_addr = dest_addr;
+ gd-arch.new_gd_addr = dest_addr;
/* GDT is below Global Data */
dest_addr -= X86_GDT_SIZE;
dest_addr = ~15;
- gd-gdt_addr = dest_addr;
+ gd-arch.gdt_addr = dest_addr;
/* Stack is below GDT */
gd-start_addr_sp = dest_addr;
@@ -113,12 +113,12 @@ int copy_gd_to_ram_f_r(void)
/*
* Global data is still in temporary memory (the CPU cache).
-* calculate_relocation_address() has set gd-new_gd_addr to
+* calculate_relocation_address() has set gd-arch.new_gd_addr to
* where the global data lives in RAM but getting it there
* safely is a bit tricky due to the 'F-Segment Hack' that
* we need to use for x86
*/
- ram_gd = (gd_t *)gd-new_gd_addr;
+ ram_gd = (gd_t *)gd-arch.new_gd_addr;
memcpy((void *)ram_gd, gd, sizeof(gd_t));
/*
@@ -127,7 +127,7 @@ int copy_gd_to_ram_f_r(void)
* has already calculated the in-RAM location of the GDT)
*/
ram_gd-gd_addr = (ulong)ram_gd;
- init_gd(ram_gd, (u64 *)gd-gdt_addr);
+ init_gd(ram_gd, (u64 *)gd-arch.gdt_addr);
return 0;
}
--
1.7.7.3
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[U-Boot] [PATCH 03/57] arm: Move timer_rate_hz into arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/cpu/arm920t/a320/timer.c |8
arch/arm/cpu/arm920t/s3c24x0/timer.c |4 ++--
arch/arm/cpu/arm926ejs/at91/timer.c|8
arch/arm/cpu/arm926ejs/davinci/timer.c |9 +
arch/arm/include/asm/global_data.h |3 ++-
5 files changed, 17 insertions(+), 15 deletions(-)
diff --git a/arch/arm/cpu/arm920t/a320/timer.c
b/arch/arm/cpu/arm920t/a320/timer.c
index 4bfcef2..2873643 100644
--- a/arch/arm/cpu/arm920t/a320/timer.c
+++ b/arch/arm/cpu/arm920t/a320/timer.c
@@ -31,14 +31,14 @@ DECLARE_GLOBAL_DATA_PTR;
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tick *= CONFIG_SYS_HZ;
- do_div(tick, gd-timer_rate_hz);
+ do_div(tick, gd-arch.timer_rate_hz);
return tick;
}
static inline unsigned long long usec_to_tick(unsigned long long usec)
{
- usec *= gd-timer_rate_hz;
+ usec *= gd-arch.timer_rate_hz;
do_div(usec, 100);
return usec;
@@ -74,7 +74,7 @@ int timer_init(void)
cr |= FTTMR010_TM3_ENABLE;
writel(cr, tmr-cr);
- gd-timer_rate_hz = TIMER_CLOCK;
+ gd-arch.timer_rate_hz = TIMER_CLOCK;
gd-tbu = gd-tbl = 0;
return 0;
@@ -126,5 +126,5 @@ ulong get_timer(ulong base)
*/
ulong get_tbclk(void)
{
- return gd-timer_rate_hz;
+ return gd-arch.timer_rate_hz;
}
diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c
b/arch/arm/cpu/arm920t/s3c24x0/timer.c
index d8668be..7694fea 100644
--- a/arch/arm/cpu/arm920t/s3c24x0/timer.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c
@@ -52,7 +52,7 @@ int timer_init(void)
* @33.25MHz and 15625 @ 50 MHz
*/
gd-tbu = get_PCLK() / (2 * 16 * 100);
- gd-timer_rate_hz = get_PCLK() / (2 * 16);
+ gd-arch.timer_rate_hz = get_PCLK() / (2 * 16);
}
/* load value for 10 ms timeout */
writel(gd-tbu, timers-tcntb4);
@@ -93,7 +93,7 @@ ulong get_timer_masked(void)
{
ulong tmr = get_ticks();
- return tmr / (gd-timer_rate_hz / CONFIG_SYS_HZ);
+ return tmr / (gd-arch.timer_rate_hz / CONFIG_SYS_HZ);
}
void udelay_masked(unsigned long usec)
diff --git a/arch/arm/cpu/arm926ejs/at91/timer.c
b/arch/arm/cpu/arm926ejs/at91/timer.c
index 641ae3e..061ccaf 100644
--- a/arch/arm/cpu/arm926ejs/at91/timer.c
+++ b/arch/arm/cpu/arm926ejs/at91/timer.c
@@ -52,14 +52,14 @@ DECLARE_GLOBAL_DATA_PTR;
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tick *= CONFIG_SYS_HZ;
- do_div(tick, gd-timer_rate_hz);
+ do_div(tick, gd-arch.timer_rate_hz);
return tick;
}
static inline unsigned long long usec_to_tick(unsigned long long usec)
{
- usec *= gd-timer_rate_hz;
+ usec *= gd-arch.timer_rate_hz;
do_div(usec, 100);
return usec;
@@ -79,7 +79,7 @@ int timer_init(void)
/* Enable PITC */
writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , pit-mr);
- gd-timer_rate_hz = gd-arch.mck_rate_hz / 16;
+ gd-arch.timer_rate_hz = gd-arch.mck_rate_hz / 16;
gd-tbu = gd-tbl = 0;
return 0;
@@ -132,5 +132,5 @@ ulong get_timer(ulong base)
*/
ulong get_tbclk(void)
{
- return gd-timer_rate_hz;
+ return gd-arch.timer_rate_hz;
}
diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c
b/arch/arm/cpu/arm926ejs/davinci/timer.c
index 93c9e60..7e852b5 100644
--- a/arch/arm/cpu/arm926ejs/davinci/timer.c
+++ b/arch/arm/cpu/arm926ejs/davinci/timer.c
@@ -60,7 +60,7 @@ int timer_init(void)
writel(0x0, timer-tim34);
writel(TIMER_LOAD_VAL, timer-prd34);
writel(2 22, timer-tcr);
- gd-timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV;
+ gd-arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV;
gd-timer_reset_value = 0;
return(0);
@@ -87,14 +87,15 @@ ulong get_timer(ulong base)
timer_diff = get_ticks() - gd-timer_reset_value;
- return lldiv(timer_diff, (gd-timer_rate_hz / CONFIG_SYS_HZ)) - base;
+ return lldiv(timer_diff,
+(gd-arch.timer_rate_hz / CONFIG_SYS_HZ)) - base;
}
void __udelay(unsigned long usec)
{
unsigned long long endtime;
- endtime = lldiv((unsigned long long)usec * gd-timer_rate_hz,
+ endtime = lldiv((unsigned long long)usec * gd-arch.timer_rate_hz,
100UL);
endtime += get_ticks();
@@ -108,7 +109,7 @@ void __udelay(unsigned long usec)
*/
ulong get_tbclk(void)
{
- return gd-timer_rate_hz;
+ return gd-arch.timer_rate_hz;
}
#ifdef CONFIG_HW_WATCHDOG
diff --git a/arch/arm/include/asm/global_data.h
b/arch/arm/include/asm/global_data.h
index ba7814a..7a2f644 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -35,6 +35,8 @@ struct arch_global_data {
unsigned long
[U-Boot] [PATCH 12/57] x86: Remove reset_status, relocoff from global_data
These fields are not used on x86, so punt them.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/global_data.h |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/global_data.h
b/arch/x86/include/asm/global_data.h
index ce96efb..3df83bb 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -51,7 +51,6 @@ typedef struct global_data {
unsigned long precon_buf_idx; /* Pre-Console buffer index */
#endif
unsigned long reloc_off; /* Relocation Offset */
- unsigned long load_off; /* Load Offset */
unsigned long env_addr; /* Address of Environment struct */
unsigned long env_valid; /* Checksum of Environment valid? */
unsigned long cpu_clk;/* CPU clock in Hz! */
@@ -59,7 +58,6 @@ typedef struct global_data {
unsigned long relocaddr; /* Start address of U-Boot in RAM */
unsigned long start_addr_sp; /* start_addr_stackpointer */
phys_size_t ram_size; /* RAM size */
- unsigned long reset_status; /* reset status register at boot */
void**jt; /* jump table */
charenv_buf[32];/* buffer for getenv() before reloc. */
struct arch_global_data arch; /* architecture-specific data */
--
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[U-Boot] [PATCH 13/57] x86: Move new_gd_addr to arch_global_data
Move this field into arch_global_data and tidy up.
This will certainly break x86, so will need Graeme's help to sort out
the problem. I would prefer not to put the architecture-specific stuff
at the top of global_data since we relying on that seems even more ugly.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/cpu.c |2 +-
arch/x86/include/asm/global_data.h | 12 +---
arch/x86/lib/init_helpers.c|2 +-
3 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index e9bb0d7..c276aa6 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -92,7 +92,7 @@ static void load_gdt(const u64 *boot_gdt, u16 num_entries)
void init_gd(gd_t *id, u64 *gdt_addr)
{
- id-gd_addr = (ulong)id;
+ id-arch.gd_addr = (ulong)id;
setup_gdt(id, gdt_addr);
}
diff --git a/arch/x86/include/asm/global_data.h
b/arch/x86/include/asm/global_data.h
index 3df83bb..d2eb00a 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -28,8 +28,16 @@
/* Architecture-specific global data */
struct arch_global_data {
- unsigned long gdt_addr; /* Location of GDT */
+ /*
+* NOTE: gd_addr MUST be first member of struct global_data!
+*
+* But it now isn't, so this is sure to break x86. Can we change
+* x86 to not require this? I don't think we should put the
+* arch data first in global_data...
+*/
unsigned long new_gd_addr; /* New location of Global Data */
+ unsigned long gd_addr; /* Location of Global Data */
+ unsigned long gdt_addr; /* Location of GDT */
};
/*
@@ -41,8 +49,6 @@ struct arch_global_data {
*/
typedefstruct global_data {
- /* NOTE: gd_addr MUST be first member of struct global_data! */
- unsigned long gd_addr;/* Location of Global Data */
bd_t*bd;
unsigned long flags;
unsigned intbaudrate;
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c
index 05cadcd..ac789c2 100644
--- a/arch/x86/lib/init_helpers.c
+++ b/arch/x86/lib/init_helpers.c
@@ -126,7 +126,7 @@ int copy_gd_to_ram_f_r(void)
* in-RAM copy of Global Data (calculate_relocation_address()
* has already calculated the in-RAM location of the GDT)
*/
- ram_gd-gd_addr = (ulong)ram_gd;
+ ram_gd-arch.gd_addr = (ulong)ram_gd;
init_gd(ram_gd, (u64 *)gd-arch.gdt_addr);
return 0;
--
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[U-Boot] [PATCH 29/57] arm: Move uart_clk to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/cpu/ppc4xx/4xx_uart.c |4 ++--
arch/powerpc/cpu/ppc4xx/fdt.c |4 ++--
arch/powerpc/include/asm/global_data.h |6 +++---
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/cpu/ppc4xx/4xx_uart.c
b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
index 38ba60b..2ab185f 100644
--- a/arch/powerpc/cpu/ppc4xx/4xx_uart.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
@@ -296,10 +296,10 @@ int get_serial_clock(void)
* the UART divisor is available
*/
#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
- gd-uart_clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
+ gd-arch.uart_clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
#else
get_sys_info(sys_info);
- gd-uart_clk = sys_info.freqUART / udiv;
+ gd-arch.uart_clk = sys_info.freqUART / udiv;
#endif
return clk;
diff --git a/arch/powerpc/cpu/ppc4xx/fdt.c b/arch/powerpc/cpu/ppc4xx/fdt.c
index 5ddb880..37f5817 100644
--- a/arch/powerpc/cpu/ppc4xx/fdt.c
+++ b/arch/powerpc/cpu/ppc4xx/fdt.c
@@ -141,7 +141,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
/*
* Fixup all UART clocks for CPU internal UARTs
-* (only these UARTs are definitely clocked by gd-uart_clk)
+* (only these UARTs are definitely clocked by gd-arch.uart_clk)
*
* These UARTs are direct childs of /plb/opb. This code
* does not touch any UARTs that are connected to the ebc.
@@ -160,7 +160,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
(fdt_node_check_compatible(blob, off, ns16550) == 0))
fdt_setprop(blob, off,
clock-frequency,
- (void*)(gd-uart_clk), 4);
+ (void *)gd-arch.uart_clk, 4);
}
/*
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index 87f9268..2d7be45 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -116,6 +116,9 @@ struct arch_global_data {
unsigned int dp_alloc_base;
unsigned int dp_alloc_top;
#endif
+#if defined(CONFIG_4xx)
+ u32 uart_clk;
+#endif /* CONFIG_4xx */
};
/*
@@ -145,9 +148,6 @@ typedef struct global_data {
#ifdef CONFIG_PRE_CONSOLE_BUFFER
unsigned long precon_buf_idx; /* Pre-Console buffer index */
#endif
-#if defined(CONFIG_4xx)
- u32 uart_clk;
-#endif /* CONFIG_4xx */
#if defined(CONFIG_SYS_GT_6426x)
unsigned intmirror_hack[16];
#endif
--
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[U-Boot] [PATCH 15/57] ppc: Remove extra pci_clk fields from global_data
PPC has several of these fields, selected by chip type, although only one
is ever compiled in.
Instead, use a single field. It would be nice if this could be selected
by CONFIG_PCI, but some chips (e.g. mpc5xxx) use pci_clk even when
CONFIG_PCI is not enabled.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/include/asm/global_data.h |9 ++---
1 files changed, 2 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index ac348c6..8e3a726 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -54,14 +54,13 @@ typedef struct global_data {
unsigned intbaudrate;
unsigned long cpu_clk;/* CPU clock in Hz! */
unsigned long bus_clk;
+ /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
+ unsigned long pci_clk;
#if defined(CONFIG_CPM2)
/* There are many clocks on the MPC8260 - see page 9-5 */
unsigned long vco_out;
unsigned long cpm_clk;
unsigned long scc_clk;
-#ifdef CONFIG_PCI
- unsigned long pci_clk;
-#endif
#endif
unsigned long mem_clk;
#if defined(CONFIG_MPC83xx)
@@ -85,7 +84,6 @@ typedef struct global_data {
u32 enc_clk;
u32 lbiu_clk;
u32 lclk_clk;
- u32 pci_clk;
#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
defined(CONFIG_MPC837x)
u32 pciexp1_clk;
@@ -122,17 +120,14 @@ typedef struct global_data {
#endif
#if defined(CONFIG_MPC5xxx)
unsigned long ipb_clk;
- unsigned long pci_clk;
#endif
#if defined(CONFIG_MPC512X)
u32 ips_clk;
u32 csb_clk;
- u32 pci_clk;
#endif /* CONFIG_MPC512X */
#if defined(CONFIG_MPC8220)
unsigned long bExtUart;
unsigned long inp_clk;
- unsigned long pci_clk;
unsigned long vco_clk;
unsigned long pev_clk;
unsigned long flb_clk;
--
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[U-Boot] [PATCH 21/57] ppc: Move used_laws to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/include/asm/global_data.h |6 +++---
drivers/misc/fsl_law.c | 16
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index 760cdab..c7ce7fd 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -88,6 +88,9 @@ struct arch_global_data {
uint mp_alloc_base;
uint mp_alloc_top;
#endif /* CONFIG_QE */
+#if defined(CONFIG_FSL_LAW)
+ u32 used_laws;
+#endif
};
/*
@@ -110,9 +113,6 @@ typedef struct global_data {
#if defined(CONFIG_FSL_ESDHC)
u32 sdhc_clk;
#endif
-#if defined(CONFIG_FSL_LAW)
- u32 used_laws;
-#endif
#if defined(CONFIG_E500)
u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
#endif
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index 223cd5d..3bd21e8 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -69,7 +69,7 @@ static inline void set_law_base_addr(int idx, phys_addr_t
addr)
void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
{
- gd-used_laws |= (1 idx);
+ gd-arch.used_laws |= (1 idx);
out_be32(LAWAR_ADDR(idx), 0);
set_law_base_addr(idx, addr);
@@ -81,7 +81,7 @@ void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum
law_trgt_if id)
void disable_law(u8 idx)
{
- gd-used_laws = ~(1 idx);
+ gd-arch.used_laws = ~(1 idx);
out_be32(LAWAR_ADDR(idx), 0);
set_law_base_addr(idx, 0);
@@ -112,7 +112,7 @@ static int get_law_entry(u8 i, struct law_entry *e)
int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
{
- u32 idx = ffz(gd-used_laws);
+ u32 idx = ffz(gd-arch.used_laws);
if (idx = FSL_HW_NUM_LAWS)
return -1;
@@ -128,11 +128,11 @@ int set_last_law(phys_addr_t addr, enum law_size sz, enum
law_trgt_if id)
u32 idx;
/* we have no LAWs free */
- if (gd-used_laws == -1)
+ if (gd-arch.used_laws == -1)
return -1;
/* grab the last free law */
- idx = __ilog2(~(gd-used_laws));
+ idx = __ilog2(~(gd-arch.used_laws));
if (idx = FSL_HW_NUM_LAWS)
return -1;
@@ -240,9 +240,9 @@ void init_laws(void)
int i;
#if FSL_HW_NUM_LAWS 32
- gd-used_laws = ~((1 FSL_HW_NUM_LAWS) - 1);
+ gd-arch.used_laws = ~((1 FSL_HW_NUM_LAWS) - 1);
#elif FSL_HW_NUM_LAWS == 32
- gd-used_laws = 0;
+ gd-arch.used_laws = 0;
#else
#error FSL_HW_NUM_LAWS can not be greater than 32 w/o code changes
#endif
@@ -255,7 +255,7 @@ void init_laws(void)
u32 lawar = in_be32(LAWAR_ADDR(i));
if (lawar LAW_EN)
- gd-used_laws |= (1 i);
+ gd-arch.used_laws |= (1 i);
}
#if defined(CONFIG_NAND_U_BOOT) !defined(CONFIG_NAND_SPL)
--
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[U-Boot] [PATCH 25/57] ppc: Move mpc8220 clocks to arch_global_data
Move these fields into arch_global_data and tidy up. The bExtUart field
does not appear to be used, so punt it.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/cpu/mpc8220/speed.c | 12 +++-
arch/powerpc/include/asm/global_data.h | 13 ++---
arch/powerpc/lib/board.c | 14 +++---
3 files changed, 20 insertions(+), 19 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8220/speed.c b/arch/powerpc/cpu/mpc8220/speed.c
index 62ac845..bb72e5c 100644
--- a/arch/powerpc/cpu/mpc8220/speed.c
+++ b/arch/powerpc/cpu/mpc8220/speed.c
@@ -71,7 +71,7 @@ int get_clocks (void)
#error clock measuring not implemented yet - define CONFIG_SYS_MPC8220_CLKIN
#endif
- gd-inp_clk = CONFIG_SYS_MPC8220_CLKIN;
+ gd-arch.inp_clk = CONFIG_SYS_MPC8220_CLKIN;
/* Read XLB to PCI(INP) clock multiplier */
pci2bus = (*((volatile u32 *)PCI_REG_PCIGSCR)
@@ -85,7 +85,7 @@ int get_clocks (void)
/* FlexBus is temporary set as the same as input clock */
/* will do dynamic in the future */
- gd-flb_clk = CONFIG_SYS_MPC8220_CLKIN;
+ gd-arch.flb_clk = CONFIG_SYS_MPC8220_CLKIN;
/* CPU Clock - Read HID1 */
asm volatile (mfspr %0, 1009:=r (hid1):);
@@ -97,12 +97,14 @@ int get_clocks (void)
for (i = 0; i size; i++)
if (hid1 == bus2core[i].hid1) {
gd-cpu_clk = (bus2core[i].multi * gd-bus_clk) 1;
- gd-vco_clk = CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER
* (gd-pci_clk * bus2core[i].vco_div)/2;
+ gd-arch.vco_clk =
+ CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER *
+ (gd-pci_clk * bus2core[i].vco_div) / 2;
break;
}
/* hardcoded 81MHz for now */
- gd-pev_clk = 8100;
+ gd-arch.pev_clk = 8100;
return (0);
}
@@ -115,7 +117,7 @@ int prt_mpc8220_clks (void)
strmhz(buf1, gd-bus_clk),
strmhz(buf2, gd-cpu_clk),
strmhz(buf3, gd-pci_clk),
- strmhz(buf4, gd-vco_clk)
+ strmhz(buf4, gd-arch.vco_clk)
);
return (0);
}
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index fa5c504..656117b 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -101,6 +101,12 @@ struct arch_global_data {
u32 ips_clk;
u32 csb_clk;
#endif /* CONFIG_MPC512X */
+#if defined(CONFIG_MPC8220)
+ unsigned long inp_clk;
+ unsigned long vco_clk;
+ unsigned long pev_clk;
+ unsigned long flb_clk;
+#endif
};
/*
@@ -123,13 +129,6 @@ typedefstruct global_data {
#if defined(CONFIG_FSL_ESDHC)
u32 sdhc_clk;
#endif
-#if defined(CONFIG_MPC8220)
- unsigned long bExtUart;
- unsigned long inp_clk;
- unsigned long vco_clk;
- unsigned long pev_clk;
- unsigned long flb_clk;
-#endif
phys_size_t ram_size; /* RAM size */
unsigned long reset_status; /* reset status register at boot
*/
#if defined(CONFIG_MPC83xx)
diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c
index 76b6f7f..cac7d0e 100644
--- a/arch/powerpc/lib/board.c
+++ b/arch/powerpc/lib/board.c
@@ -556,11 +556,11 @@ void board_init_f(ulong bootflag)
#endif
#if defined(CONFIG_MPC8220)
bd-bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
- bd-bi_inpfreq = gd-inp_clk;
+ bd-bi_inpfreq = gd-arch.inp_clk;
bd-bi_pcifreq = gd-pci_clk;
- bd-bi_vcofreq = gd-vco_clk;
- bd-bi_pevfreq = gd-pev_clk;
- bd-bi_flbfreq = gd-flb_clk;
+ bd-bi_vcofreq = gd-arch.vco_clk;
+ bd-bi_pevfreq = gd-arch.pev_clk;
+ bd-bi_flbfreq = gd-arch.flb_clk;
/* store bootparam to sram (backward compatible), here? */
{
@@ -568,10 +568,10 @@ void board_init_f(ulong bootflag)
*sram++ = gd-ram_size;
*sram++ = gd-bus_clk;
- *sram++ = gd-inp_clk;
+ *sram++ = gd-arch.inp_clk;
*sram++ = gd-cpu_clk;
- *sram++ = gd-vco_clk;
- *sram++ = gd-flb_clk;
+ *sram++ = gd-arch.vco_clk;
+ *sram++ = gd-arch.flb_clk;
*sram++ = 0xb8c3ba11; /* boot signature */
}
#endif
--
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[U-Boot] [PATCH 32/57] ppc: Move fpga_state to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/include/asm/global_data.h |6 +++---
board/gdsys/405ep/405ep.c | 15 ---
board/gdsys/405ex/405ex.c | 13 +++--
board/gdsys/405ex/io64.c |2 +-
4 files changed, 19 insertions(+), 17 deletions(-)
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index 6f88b76..52aece0 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -122,6 +122,9 @@ struct arch_global_data {
#if defined(CONFIG_SYS_GT_6426x)
unsigned int mirror_hack[16];
#endif
+#ifdef CONFIG_SYS_FPGA_COUNT
+ unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
+#endif
};
/*
@@ -170,9 +173,6 @@ typedef struct global_data {
#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
unsigned long kbd_status;
#endif
-#ifdef CONFIG_SYS_FPGA_COUNT
- unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
-#endif
#if defined(CONFIG_WD_MAX_RATE)
unsigned long long wdt_last;/* trace watch-dog triggering rate */
#endif
diff --git a/board/gdsys/405ep/405ep.c b/board/gdsys/405ep/405ep.c
index bc9b7d0..6221171 100644
--- a/board/gdsys/405ep/405ep.c
+++ b/board/gdsys/405ep/405ep.c
@@ -38,14 +38,14 @@ DECLARE_GLOBAL_DATA_PTR;
int get_fpga_state(unsigned dev)
{
- return gd-fpga_state[dev];
+ return gd-arch.fpga_state[dev];
}
void print_fpga_state(unsigned dev)
{
- if (gd-fpga_state[dev] FPGA_STATE_DONE_FAILED)
+ if (gd-arch.fpga_state[dev] FPGA_STATE_DONE_FAILED)
puts( Waiting for FPGA-DONE timed out.\n);
- if (gd-fpga_state[dev] FPGA_STATE_REFLECTION_FAILED)
+ if (gd-arch.fpga_state[dev] FPGA_STATE_REFLECTION_FAILED)
puts( FPGA reflection test failed.\n);
}
@@ -54,7 +54,7 @@ int board_early_init_f(void)
unsigned k;
for (k = 0; k CONFIG_SYS_FPGA_COUNT; ++k)
- gd-fpga_state[k] = 0;
+ gd-arch.fpga_state[k] = 0;
mtdcr(UIC0SR, 0x); /* clear all ints */
mtdcr(UIC0ER, 0x); /* disable all ints */
@@ -78,7 +78,7 @@ int board_early_init_r(void)
unsigned ctr;
for (k = 0; k CONFIG_SYS_FPGA_COUNT; ++k)
- gd-fpga_state[k] = 0;
+ gd-arch.fpga_state[k] = 0;
/*
* reset FPGA
@@ -94,7 +94,8 @@ int board_early_init_r(void)
while (!gd405ep_get_fpga_done(k)) {
udelay(10);
if (ctr++ 5) {
- gd-fpga_state[k] |= FPGA_STATE_DONE_FAILED;
+ gd-arch.fpga_state[k] |=
+ FPGA_STATE_DONE_FAILED;
break;
}
}
@@ -126,7 +127,7 @@ int board_early_init_r(void)
udelay(10);
if (ctr++ 5) {
- gd-fpga_state[k] |=
+ gd-arch.fpga_state[k] |=
FPGA_STATE_REFLECTION_FAILED;
break;
}
diff --git a/board/gdsys/405ex/405ex.c b/board/gdsys/405ex/405ex.c
index 5766c0f..32e24c0 100644
--- a/board/gdsys/405ex/405ex.c
+++ b/board/gdsys/405ex/405ex.c
@@ -15,14 +15,14 @@ DECLARE_GLOBAL_DATA_PTR;
int get_fpga_state(unsigned dev)
{
- return gd-fpga_state[dev];
+ return gd-arch.fpga_state[dev];
}
void print_fpga_state(unsigned dev)
{
- if (gd-fpga_state[dev] FPGA_STATE_DONE_FAILED)
+ if (gd-arch.fpga_state[dev] FPGA_STATE_DONE_FAILED)
puts( Waiting for FPGA-DONE timed out.\n);
- if (gd-fpga_state[dev] FPGA_STATE_REFLECTION_FAILED)
+ if (gd-arch.fpga_state[dev] FPGA_STATE_REFLECTION_FAILED)
puts( FPGA reflection test failed.\n);
}
@@ -192,7 +192,7 @@ int board_early_init_r(void)
unsigned ctr;
for (k = 0; k CONFIG_SYS_FPGA_COUNT; ++k)
- gd-fpga_state[k] = 0;
+ gd-arch.fpga_state[k] = 0;
/*
* reset FPGA
@@ -208,7 +208,8 @@ int board_early_init_r(void)
while (!gd405ex_get_fpga_done(k)) {
udelay(10);
if (ctr++ 5) {
- gd-fpga_state[k] |= FPGA_STATE_DONE_FAILED;
+ gd-arch.fpga_state[k] |=
+ FPGA_STATE_DONE_FAILED;
break;
}
}
@@ -240,7 +241,7 @@ int board_early_init_r(void)
udelay(10);
if (ctr++ 5) {
- gd-fpga_state[k] |=
+
[U-Boot] [PATCH 36/57] sparc: Drop kbd_status and reset_status from global_data
These fields is not used on sparc, so punt them.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/sparc/include/asm/global_data.h |4
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/arch/sparc/include/asm/global_data.h
b/arch/sparc/include/asm/global_data.h
index a51c40b..7c3d2d5 100644
--- a/arch/sparc/include/asm/global_data.h
+++ b/arch/sparc/include/asm/global_data.h
@@ -50,7 +50,6 @@ typedef struct global_data {
phys_size_t ram_size; /* RAM size */
unsigned long reloc_off;/* Relocation Offset */
- unsigned long reset_status; /* reset status register at boot
*/
unsigned long env_addr; /* Address of Environment struct */
unsigned long env_valid;/* Checksum of Environment valid?
*/
unsigned long have_console; /* serial_init() was called */
@@ -73,9 +72,6 @@ typedef struct global_data {
unsigned long do_mdm_init;
unsigned long be_quiet;
#endif
-#ifdef CONFIG_LWMON
- unsigned long kbd_status;
-#endif
void**jt; /* jump table */
charenv_buf[32];/* buffer for getenv() before reloc. */
struct arch_global_data arch; /* architecture-specific data */
--
1.7.7.3
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[U-Boot] [PATCH 05/57] arm: Move tbl to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/cpu/arm1136/mx31/timer.c|6 +++---
arch/arm/cpu/arm1136/mx35/timer.c|2 +-
arch/arm/cpu/arm1136/omap24xx/timer.c| 17 ++---
arch/arm/cpu/arm920t/a320/timer.c|8
arch/arm/cpu/arm920t/at91/timer.c|8
arch/arm/cpu/arm920t/s3c24x0/timer.c |8
arch/arm/cpu/arm926ejs/armada100/timer.c | 14 +++---
arch/arm/cpu/arm926ejs/at91/timer.c |8
arch/arm/cpu/arm926ejs/davinci/timer.c |6 +++---
arch/arm/cpu/arm926ejs/kirkwood/timer.c |2 +-
arch/arm/cpu/arm926ejs/mb86r0x/timer.c |2 +-
arch/arm/cpu/arm926ejs/mx25/timer.c |2 +-
arch/arm/cpu/arm926ejs/mx27/timer.c |2 +-
arch/arm/cpu/arm926ejs/mxs/timer.c |2 +-
arch/arm/cpu/arm926ejs/omap/timer.c |2 +-
arch/arm/cpu/arm926ejs/orion5x/timer.c |2 +-
arch/arm/cpu/arm926ejs/pantheon/timer.c | 14 +++---
arch/arm/cpu/arm926ejs/spear/timer.c |2 +-
arch/arm/cpu/arm926ejs/versatile/timer.c |2 +-
arch/arm/cpu/armv7/omap-common/timer.c | 15 ---
arch/arm/cpu/armv7/s5p-common/timer.c|8
arch/arm/cpu/armv7/socfpga/timer.c |8
arch/arm/cpu/armv7/u8500/timer.c | 12 +++-
arch/arm/cpu/armv7/zynq/timer.c |8
arch/arm/cpu/pxa/timer.c |2 +-
arch/arm/cpu/tegra-common/timer.c|6 +++---
arch/arm/imx-common/timer.c |2 +-
arch/arm/include/asm/global_data.h |2 +-
arch/mips/cpu/xburst/timer.c | 12 ++--
29 files changed, 95 insertions(+), 89 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx31/timer.c
b/arch/arm/cpu/arm1136/mx31/timer.c
index 36266da..7a377cc 100644
--- a/arch/arm/cpu/arm1136/mx31/timer.c
+++ b/arch/arm/cpu/arm1136/mx31/timer.c
@@ -117,11 +117,11 @@ unsigned long long get_ticks(void)
if (now = gd-lastinc) /* normal mode (non roll) */
/* move stamp forward with absolut diff ticks */
- gd-tbl += (now - gd-lastinc);
+ gd-arch.tbl += (now - gd-lastinc);
else/* we have rollover of incrementer */
- gd-tbl += (0x - gd-lastinc) + now;
+ gd-arch.tbl += (0x - gd-lastinc) + now;
gd-lastinc = now;
- return gd-tbl;
+ return gd-arch.tbl;
}
ulong get_timer_masked(void)
diff --git a/arch/arm/cpu/arm1136/mx35/timer.c
b/arch/arm/cpu/arm1136/mx35/timer.c
index 9680b7f..c21ca3f 100644
--- a/arch/arm/cpu/arm1136/mx35/timer.c
+++ b/arch/arm/cpu/arm1136/mx35/timer.c
@@ -32,7 +32,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp (gd-tbl)
+#define timestamp (gd-arch.tbl)
#define lastinc(gd-lastinc)
/* General purpose timers bitfields */
diff --git a/arch/arm/cpu/arm1136/omap24xx/timer.c
b/arch/arm/cpu/arm1136/omap24xx/timer.c
index e929ae4..e179bb5 100644
--- a/arch/arm/cpu/arm1136/omap24xx/timer.c
+++ b/arch/arm/cpu/arm1136/omap24xx/timer.c
@@ -52,7 +52,7 @@ int timer_init (void)
/* reset time */
gd-lastinc = READ_TIMER; /* capture current incrementer value */
- gd-tbl = 0;/* start advancing time stamp */
+ gd-arch.tbl = 0; /* start advancing time stamp */
return(0);
}
@@ -82,7 +82,7 @@ void __udelay (unsigned long usec)
if ((tmo + tmp + 1) tmp) {/* if setting this forward will roll */
/* time stamp, then reset time */
gd-lastinc = READ_TIMER; /* capture incrementer value */
- gd-tbl = 0;/* start time stamp */
+ gd-arch.tbl = 0; /* start time stamp */
} else {
tmo += tmp; /* else, set advancing stamp wake up
time */
}
@@ -94,12 +94,15 @@ ulong get_timer_masked (void)
{
ulong now = READ_TIMER; /* current tick value */
- if (now = gd-lastinc) /* normal mode (non roll) */
- gd-tbl += (now - gd-lastinc); /* move stamp fordward with
absoulte diff ticks */
- else/* we have rollover of incrementer */
- gd-tbl += (0x - gd-lastinc) + now;
+ if (now = gd-lastinc) { /* normal mode (non roll) */
+ /* move stamp fordward with absoulte diff ticks */
+ gd-arch.tbl += (now - gd-lastinc);
+ } else {
+ /* we have rollover of incrementer */
+ gd-arch.tbl += (0x - gd-lastinc) + now;
+ }
gd-lastinc = now;
- return gd-tbl;
+ return gd-arch.tbl;
}
/* waits specified delay value and resets timestamp */
diff --git a/arch/arm/cpu/arm920t/a320/timer.c
[U-Boot] [PATCH 26/57] ppc: Move reset_status to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/cpu/mpc512x/cpu.c |2 +-
arch/powerpc/cpu/mpc512x/cpu_init.c|2 +-
arch/powerpc/cpu/mpc8260/cpu_init.c|4 ++--
arch/powerpc/cpu/mpc83xx/cpu_init.c|4 ++--
arch/powerpc/include/asm/global_data.h |2 +-
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/cpu/mpc512x/cpu.c b/arch/powerpc/cpu/mpc512x/cpu.c
index 641120f..bb03c6d 100644
--- a/arch/powerpc/cpu/mpc512x/cpu.c
+++ b/arch/powerpc/cpu/mpc512x/cpu.c
@@ -69,7 +69,7 @@ int checkcpu (void)
printf (at %s MHz, CSB at %s MHz (RSR=0x%04lx)\n,
strmhz(buf1, clock),
strmhz(buf2, gd-arch.csb_clk),
- gd-reset_status 0x);
+ gd-arch.reset_status 0x);
return 0;
}
diff --git a/arch/powerpc/cpu/mpc512x/cpu_init.c
b/arch/powerpc/cpu/mpc512x/cpu_init.c
index fe6beaf..32ade1b 100644
--- a/arch/powerpc/cpu/mpc512x/cpu_init.c
+++ b/arch/powerpc/cpu/mpc512x/cpu_init.c
@@ -62,7 +62,7 @@ void cpu_init_f (volatile immap_t * im)
#endif
/* RSR - Reset Status Register - clear all status */
- gd-reset_status = im-reset.rsr;
+ gd-arch.reset_status = im-reset.rsr;
out_be32(im-reset.rsr, ~RSR_RES);
/*
diff --git a/arch/powerpc/cpu/mpc8260/cpu_init.c
b/arch/powerpc/cpu/mpc8260/cpu_init.c
index acd48a9..3964e60 100644
--- a/arch/powerpc/cpu/mpc8260/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8260/cpu_init.c
@@ -120,7 +120,7 @@ void cpu_init_f (volatile immap_t * immr)
memset ((void *) gd, 0, sizeof (gd_t));
/* RSR - Reset Status Register - clear all status (5-4) */
- gd-reset_status = immr-im_clkrst.car_rsr;
+ gd-arch.reset_status = immr-im_clkrst.car_rsr;
immr-im_clkrst.car_rsr = RSR_ALLBITS;
/* RMR - Reset Mode Register - contains checkstop reset enable (5-5) */
@@ -274,7 +274,7 @@ int prt_8260_rsr (void)
RSR_EHRS, External Hard}
};
static int n = sizeof bits / sizeof bits[0];
- ulong rsr = gd-reset_status;
+ ulong rsr = gd-arch.reset_status;
int i;
char *sep;
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c
b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 20d0600..9325110 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -232,7 +232,7 @@ void cpu_init_f (volatile immap_t * im)
clrsetbits_be32(im-clk.sccr, sccr_mask, sccr_val);
/* RSR - Reset Status Register - clear all status (4.6.1.3) */
- gd-reset_status = __raw_readl(im-reset.rsr);
+ gd-arch.reset_status = __raw_readl(im-reset.rsr);
__raw_writel(~(RSR_RES), im-reset.rsr);
/* AER - Arbiter Event Register - store status */
@@ -499,7 +499,7 @@ int prt_83xx_rsr(void)
RSR_HRS, External/Internal Hard}
};
static int n = sizeof bits / sizeof bits[0];
- ulong rsr = gd-reset_status;
+ ulong rsr = gd-arch.reset_status;
int i;
char *sep;
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index 656117b..136b918 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -107,6 +107,7 @@ struct arch_global_data {
unsigned long pev_clk;
unsigned long flb_clk;
#endif
+ unsigned long reset_status; /* reset status register at boot */
};
/*
@@ -130,7 +131,6 @@ typedef struct global_data {
u32 sdhc_clk;
#endif
phys_size_t ram_size; /* RAM size */
- unsigned long reset_status; /* reset status register at boot
*/
#if defined(CONFIG_MPC83xx)
unsigned long arbiter_event_attributes;
unsigned long arbiter_event_address;
--
1.7.7.3
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[U-Boot] [PATCH 16/57] ppc: Move clock fields to arch_global_data
Move vco_out, cpm_clk, scc_clk, brg_clk into arch_global_data and tidy
up. Leave pci_clk on its own since this should really depend only on
CONFIG_PCI and not any particular chip type.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/cpu/mpc8260/speed.c | 16
arch/powerpc/cpu/mpc85xx/speed.c |8
arch/powerpc/include/asm/global_data.h |4
arch/powerpc/lib/board.c |6 +++---
4 files changed, 19 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8260/speed.c b/arch/powerpc/cpu/mpc8260/speed.c
index 4ad1ec2..7841e8a 100644
--- a/arch/powerpc/cpu/mpc8260/speed.c
+++ b/arch/powerpc/cpu/mpc8260/speed.c
@@ -135,17 +135,17 @@ int get_clocks (void)
(get_pvr () == PVR_8260_HIP7R1) ||
(get_pvr () == PVR_8260_HIP7RA)) {
pllmf = (scmr SCMR_PLLMF_MSKH7) SCMR_PLLMF_SHIFT;
- gd-vco_out = clkin * (pllmf + 1);
+ gd-arch.vco_out = clkin * (pllmf + 1);
} else {/* HiP3, HiP4 */
pllmf = (scmr SCMR_PLLMF_MSK) SCMR_PLLMF_SHIFT;
plldf = (scmr SCMR_PLLDF) ? 1 : 0;
- gd-vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
+ gd-arch.vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
}
- gd-cpm_clk = gd-vco_out / 2;
+ gd-arch.cpm_clk = gd-arch.vco_out / 2;
gd-bus_clk = clkin;
- gd-scc_clk = gd-vco_out / 4;
- gd-arch.brg_clk = gd-vco_out / (1 (2 * (dfbrg + 1)));
+ gd-arch.scc_clk = gd-arch.vco_out / 4;
+ gd-arch.brg_clk = gd-arch.vco_out / (1 (2 * (dfbrg + 1)));
if (cp-b2c_mult 0) {
gd-cpu_clk = (clkin * cp-b2c_mult) / 2;
@@ -173,7 +173,7 @@ int get_clocks (void)
pci_div = pcidf + 1;
}
- gd-pci_clk = (gd-cpm_clk * 2) / pci_div;
+ gd-pci_clk = (gd-arch.cpm_clk * 2) / pci_div;
}
#endif
@@ -231,10 +231,10 @@ int prt_8260_clks (void)
plldf, pllmf, pcidf);
printf ( - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n,
- gd-vco_out, gd-scc_clk, gd-arch.brg_clk);
+ gd-arch.vco_out, gd-arch.scc_clk, gd-arch.brg_clk);
printf ( - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n,
- gd-cpu_clk, gd-cpm_clk, gd-bus_clk);
+ gd-cpu_clk, gd-arch.cpm_clk, gd-bus_clk);
#ifdef CONFIG_PCI
printf ( - pci_clk %10ld\n, gd-pci_clk);
#endif
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 8a581ef..c4ca481 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -435,10 +435,10 @@ int get_clocks (void)
#endif /* defined(CONFIG_FSL_ESDHC) */
#if defined(CONFIG_CPM2)
- gd-vco_out = 2*sys_info.freqSystemBus;
- gd-cpm_clk = gd-vco_out / 2;
- gd-scc_clk = gd-vco_out / 4;
- gd-arch.brg_clk = gd-vco_out / (1 (2 * (dfbrg + 1)));
+ gd-arch.vco_out = 2*sys_info.freqSystemBus;
+ gd-arch.cpm_clk = gd-arch.vco_out / 2;
+ gd-arch.scc_clk = gd-arch.vco_out / 4;
+ gd-arch.brg_clk = gd-arch.vco_out / (1 (2 * (dfbrg + 1)));
#endif
if(gd-cpu_clk != 0) return (0);
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index 8e3a726..7d0115d 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -33,6 +33,10 @@ struct arch_global_data {
unsigned long brg_clk;
#endif
#if defined(CONFIG_CPM2)
+ /* There are many clocks on the MPC8260 - see page 9-5 */
+ unsigned long vco_out;
+ unsigned long cpm_clk;
+ unsigned long scc_clk;
unsigned long brg_clk;
#endif
#if defined(CONFIG_QE)
diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c
index 4174a73..517560a 100644
--- a/arch/powerpc/lib/board.c
+++ b/arch/powerpc/lib/board.c
@@ -580,10 +580,10 @@ void board_init_f(ulong bootflag)
bd-bi_intfreq = gd-cpu_clk; /* Internal Freq, in Hz */
bd-bi_busfreq = gd-bus_clk; /* Bus Freq, in Hz */
#if defined(CONFIG_CPM2)
- bd-bi_cpmfreq = gd-cpm_clk;
+ bd-bi_cpmfreq = gd-arch.cpm_clk;
bd-bi_brgfreq = gd-arch.brg_clk;
- bd-bi_sccfreq = gd-scc_clk;
- bd-bi_vco = gd-vco_out;
+ bd-bi_sccfreq = gd-arch.scc_clk;
+ bd-bi_vco = gd-arch.vco_out;
#endif /* CONFIG_CPM2 */
#if defined(CONFIG_MPC512X)
bd-bi_ipsfreq = gd-ips_clk;
--
1.7.7.3
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[U-Boot] [PATCH 06/57] arm: Move lastinc to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/cpu/arm1136/mx31/timer.c|8
arch/arm/cpu/arm1136/mx35/timer.c|2 +-
arch/arm/cpu/arm1136/omap24xx/timer.c| 12 ++--
arch/arm/cpu/arm920t/at91/timer.c| 10 +-
arch/arm/cpu/arm920t/s3c24x0/timer.c | 10 +-
arch/arm/cpu/arm926ejs/kirkwood/timer.c |2 +-
arch/arm/cpu/arm926ejs/mb86r0x/timer.c |2 +-
arch/arm/cpu/arm926ejs/mx25/timer.c |2 +-
arch/arm/cpu/arm926ejs/mx27/timer.c |2 +-
arch/arm/cpu/arm926ejs/mxs/timer.c |2 +-
arch/arm/cpu/arm926ejs/omap/timer.c |2 +-
arch/arm/cpu/arm926ejs/orion5x/timer.c |2 +-
arch/arm/cpu/arm926ejs/spear/timer.c |2 +-
arch/arm/cpu/arm926ejs/versatile/timer.c |2 +-
arch/arm/cpu/armv7/omap-common/timer.c | 11 ++-
arch/arm/cpu/armv7/s5p-common/timer.c| 10 +-
arch/arm/cpu/armv7/socfpga/timer.c | 11 ++-
arch/arm/cpu/armv7/u8500/timer.c | 10 +-
arch/arm/cpu/armv7/zynq/timer.c | 10 +-
arch/arm/cpu/ixp/timer.c |8
arch/arm/cpu/pxa/timer.c |2 +-
arch/arm/cpu/tegra-common/timer.c|8
arch/arm/imx-common/timer.c |2 +-
arch/arm/include/asm/global_data.h |2 +-
arch/mips/cpu/xburst/timer.c | 12 ++--
25 files changed, 74 insertions(+), 72 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx31/timer.c
b/arch/arm/cpu/arm1136/mx31/timer.c
index 7a377cc..1a7f71e 100644
--- a/arch/arm/cpu/arm1136/mx31/timer.c
+++ b/arch/arm/cpu/arm1136/mx31/timer.c
@@ -115,12 +115,12 @@ unsigned long long get_ticks(void)
{
ulong now = GPTCNT; /* current tick value */
- if (now = gd-lastinc) /* normal mode (non roll) */
+ if (now = gd-arch.lastinc)/* normal mode (non roll) */
/* move stamp forward with absolut diff ticks */
- gd-arch.tbl += (now - gd-lastinc);
+ gd-arch.tbl += (now - gd-arch.lastinc);
else/* we have rollover of incrementer */
- gd-arch.tbl += (0x - gd-lastinc) + now;
- gd-lastinc = now;
+ gd-arch.tbl += (0x - gd-arch.lastinc) + now;
+ gd-arch.lastinc = now;
return gd-arch.tbl;
}
diff --git a/arch/arm/cpu/arm1136/mx35/timer.c
b/arch/arm/cpu/arm1136/mx35/timer.c
index c21ca3f..584ad15 100644
--- a/arch/arm/cpu/arm1136/mx35/timer.c
+++ b/arch/arm/cpu/arm1136/mx35/timer.c
@@ -33,7 +33,7 @@
DECLARE_GLOBAL_DATA_PTR;
#define timestamp (gd-arch.tbl)
-#define lastinc(gd-lastinc)
+#define lastinc(gd-arch.lastinc)
/* General purpose timers bitfields */
#define GPTCR_SWR (115)/* Software reset */
diff --git a/arch/arm/cpu/arm1136/omap24xx/timer.c
b/arch/arm/cpu/arm1136/omap24xx/timer.c
index e179bb5..53015cb 100644
--- a/arch/arm/cpu/arm1136/omap24xx/timer.c
+++ b/arch/arm/cpu/arm1136/omap24xx/timer.c
@@ -51,7 +51,7 @@ int timer_init (void)
*((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val; /* start timer
*/
/* reset time */
- gd-lastinc = READ_TIMER; /* capture current incrementer value */
+ gd-arch.lastinc = READ_TIMER; /* capture current incrementer value */
gd-arch.tbl = 0; /* start advancing time stamp */
return(0);
@@ -81,7 +81,7 @@ void __udelay (unsigned long usec)
tmp = get_timer (0);/* get current timestamp */
if ((tmo + tmp + 1) tmp) {/* if setting this forward will roll */
/* time stamp, then reset time */
- gd-lastinc = READ_TIMER; /* capture incrementer value */
+ gd-arch.lastinc = READ_TIMER; /* capture incrementer value */
gd-arch.tbl = 0; /* start time stamp */
} else {
tmo += tmp; /* else, set advancing stamp wake up
time */
@@ -94,14 +94,14 @@ ulong get_timer_masked (void)
{
ulong now = READ_TIMER; /* current tick value */
- if (now = gd-lastinc) { /* normal mode (non roll) */
+ if (now = gd-arch.lastinc) { /* normal mode (non roll) */
/* move stamp fordward with absoulte diff ticks */
- gd-arch.tbl += (now - gd-lastinc);
+ gd-arch.tbl += (now - gd-arch.lastinc);
} else {
/* we have rollover of incrementer */
- gd-arch.tbl += (0x - gd-lastinc) + now;
+ gd-arch.tbl += (0x - gd-arch.lastinc) + now;
}
- gd-lastinc = now;
+ gd-arch.lastinc = now;
return gd-arch.tbl;
}
diff --git a/arch/arm/cpu/arm920t/at91/timer.c
b/arch/arm/cpu/arm920t/at91/timer.c
index
[U-Boot] [PATCH 40/57] avr32: Move cpu_hz to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/avr32/cpu/cpu.c |4 ++--
arch/avr32/cpu/interrupts.c |6 +++---
arch/avr32/include/asm/global_data.h |2 +-
arch/avr32/lib/bootm.c |2 +-
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/avr32/cpu/cpu.c b/arch/avr32/cpu/cpu.c
index 7907837..9d82ca4 100644
--- a/arch/avr32/cpu/cpu.c
+++ b/arch/avr32/cpu/cpu.c
@@ -47,7 +47,7 @@ int cpu_init(void)
{
extern void _evba(void);
- gd-cpu_hz = CONFIG_SYS_OSC0_HZ;
+ gd-arch.cpu_hz = CONFIG_SYS_OSC0_HZ;
/* TODO: Move somewhere else, but needs to be run before we
* increase the clock frequency. */
@@ -59,7 +59,7 @@ int cpu_init(void)
clk_init();
/* Update the CPU speed according to the PLL configuration */
- gd-cpu_hz = get_cpu_clk_rate();
+ gd-arch.cpu_hz = get_cpu_clk_rate();
/* Set up the exception handler table and enable exceptions */
sysreg_write(EVBA, (unsigned long)_evba);
diff --git a/arch/avr32/cpu/interrupts.c b/arch/avr32/cpu/interrupts.c
index 49a00f1..d87c6e1 100644
--- a/arch/avr32/cpu/interrupts.c
+++ b/arch/avr32/cpu/interrupts.c
@@ -46,7 +46,7 @@ static unsigned long tb_factor;
unsigned long get_tbclk(void)
{
- return gd-cpu_hz;
+ return gd-arch.cpu_hz;
}
unsigned long long get_ticks(void)
@@ -115,8 +115,8 @@ int timer_init(void)
sysreg_write(COUNT, 0);
tmp = (u64)CONFIG_SYS_HZ 32;
- tmp += gd-cpu_hz / 2;
- do_div(tmp, gd-cpu_hz);
+ tmp += gd-arch.cpu_hz / 2;
+ do_div(tmp, gd-arch.cpu_hz);
tb_factor = (u32)tmp;
if (set_interrupt_handler(0, timer_interrupt_handler, 3))
diff --git a/arch/avr32/include/asm/global_data.h
b/arch/avr32/include/asm/global_data.h
index 3be8628..aeb6605 100644
--- a/arch/avr32/include/asm/global_data.h
+++ b/arch/avr32/include/asm/global_data.h
@@ -25,6 +25,7 @@
/* Architecture-specific global data */
struct arch_global_data {
unsigned long stack_end;/* highest stack address */
+ unsigned long cpu_hz; /* cpu core clock frequency */
};
/*
@@ -46,7 +47,6 @@ typedef struct global_data {
unsigned long reloc_off; /* Relocation Offset */
unsigned long env_addr; /* Address of env struct */
unsigned long env_valid; /* Checksum of env valid? */
- unsigned long cpu_hz; /* cpu core clock frequency */
#if defined(CONFIG_LCD)
void*fb_base; /* framebuffer address */
#endif
diff --git a/arch/avr32/lib/bootm.c b/arch/avr32/lib/bootm.c
index 74ebeca..87f3f9c 100644
--- a/arch/avr32/lib/bootm.c
+++ b/arch/avr32/lib/bootm.c
@@ -109,7 +109,7 @@ static struct tag *setup_clock_tags(struct tag *params)
params-hdr.size = tag_size(tag_clock);
params-u.clock.clock_id = ACLOCK_BOOTCPU;
params-u.clock.clock_flags = 0;
- params-u.clock.clock_hz = gd-cpu_hz;
+ params-u.clock.clock_hz = gd-arch.cpu_hz;
#ifdef CONFIG_AT32AP7000
/*
--
1.7.7.3
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[U-Boot] [PATCH 38/57] mips: Move per_clk and dev_clk to arch_global_data
Move these field into arch_global_data and tidy up. The other
CONFIG_JZSOC fields are used by various architectures, so just remove
the #ifdef bracketing for these.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/mips/include/asm/global_data.h |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/mips/include/asm/global_data.h
b/arch/mips/include/asm/global_data.h
index 99949e1..fdd099e 100644
--- a/arch/mips/include/asm/global_data.h
+++ b/arch/mips/include/asm/global_data.h
@@ -28,6 +28,11 @@
/* Architecture-specific global data */
struct arch_global_data {
+#ifdef CONFIG_JZSOC
+ /* There are other clocks in the jz4740 */
+ unsigned long per_clk; /* Peripheral bus clock */
+ unsigned long dev_clk; /* Device clock */
+#endif
};
/*
@@ -41,13 +46,9 @@ struct arch_global_data {
typedefstruct global_data {
bd_t*bd;
unsigned long flags;
-#ifdef CONFIG_JZSOC
- /* There are other clocks in the jz4740 */
unsigned long cpu_clk;/* CPU core clock */
unsigned long sys_clk;/* System bus clock */
- unsigned long per_clk;/* Peripheral bus clock */
unsigned long mem_clk;/* Memory bus clock */
- unsigned long dev_clk;/* Device clock */
/* static data needed by most of timer.c */
unsigned long tbl;
unsigned long lastinc;
--
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[U-Boot] [PATCH 23/57] ppc: Move mpc5xxx clocks to arch_global_data
Move ipb_clk and pci_clk into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/cpu/mpc5xxx/i2c.c |2 +-
arch/powerpc/cpu/mpc5xxx/ide.c |2 +-
arch/powerpc/cpu/mpc5xxx/serial.c |4 ++--
arch/powerpc/cpu/mpc5xxx/speed.c | 18 --
arch/powerpc/cpu/mpc8220/fec.c |8 +---
arch/powerpc/include/asm/global_data.h |6 +++---
arch/powerpc/lib/board.c |2 +-
board/inka4x0/inkadiag.c |8
drivers/input/ps2ser.c |2 +-
drivers/net/mpc5xxx_fec.c |9 ++---
10 files changed, 36 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/cpu/mpc5xxx/i2c.c b/arch/powerpc/cpu/mpc5xxx/i2c.c
index b423d2f..8d5f47b 100644
--- a/arch/powerpc/cpu/mpc5xxx/i2c.c
+++ b/arch/powerpc/cpu/mpc5xxx/i2c.c
@@ -310,7 +310,7 @@ static int mpc_get_fdr(int speed)
{126, 128}
};
- ipb = gd-ipb_clk;
+ ipb = gd-arch.ipb_clk;
for (i = 7; i = 0; i--) {
for (j = 7; j = 0; j--) {
scl = 2 * (scltap[j].scl2tap +
diff --git a/arch/powerpc/cpu/mpc5xxx/ide.c b/arch/powerpc/cpu/mpc5xxx/ide.c
index d337abb..094f62b 100644
--- a/arch/powerpc/cpu/mpc5xxx/ide.c
+++ b/arch/powerpc/cpu/mpc5xxx/ide.c
@@ -75,7 +75,7 @@ int ide_preinit (void)
psdma-PtdCntrl |= 1;
/* Init timings : we use PIO mode 0 timings */
- period = 10 / gd-ipb_clk; /* period in ns */
+ period = 10 / gd-arch.ipb_clk; /* period in ns */
t0 = CALC_TIMING (600);
t2_8 = CALC_TIMING (290);
diff --git a/arch/powerpc/cpu/mpc5xxx/serial.c
b/arch/powerpc/cpu/mpc5xxx/serial.c
index eb14161..1ccb4e3 100644
--- a/arch/powerpc/cpu/mpc5xxx/serial.c
+++ b/arch/powerpc/cpu/mpc5xxx/serial.c
@@ -89,7 +89,7 @@ int serial_init_dev (unsigned long dev_base)
/* select clock sources */
psc-psc_clock_select = 0;
- baseclk = (gd-ipb_clk + 16) / 32;
+ baseclk = (gd-arch.ipb_clk + 16) / 32;
/* switch to UART mode */
psc-sicr = 0;
@@ -169,7 +169,7 @@ void serial_setbrg_dev (unsigned long dev_base)
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)dev_base;
unsigned long baseclk, div;
- baseclk = (gd-ipb_clk + 16) / 32;
+ baseclk = (gd-arch.ipb_clk + 16) / 32;
/* set up UART divisor */
div = (baseclk + (gd-baudrate/2)) / gd-baudrate;
diff --git a/arch/powerpc/cpu/mpc5xxx/speed.c b/arch/powerpc/cpu/mpc5xxx/speed.c
index 8027d3e..5353e3d 100644
--- a/arch/powerpc/cpu/mpc5xxx/speed.c
+++ b/arch/powerpc/cpu/mpc5xxx/speed.c
@@ -66,14 +66,20 @@ int get_clocks (void)
val = *(vu_long *)MPC5XXX_CDM_CFG;
if (val (1 8)) {
- gd-ipb_clk = gd-bus_clk / 2;
+ gd-arch.ipb_clk = gd-bus_clk / 2;
} else {
- gd-ipb_clk = gd-bus_clk;
+ gd-arch.ipb_clk = gd-bus_clk;
}
switch (val 3) {
- case 0: gd-pci_clk = gd-ipb_clk; break;
- case 1: gd-pci_clk = gd-ipb_clk / 2; break;
- default: gd-pci_clk = gd-bus_clk / 4; break;
+ case 0:
+ gd-pci_clk = gd-arch.ipb_clk;
+ break;
+ case 1:
+ gd-pci_clk = gd-arch.ipb_clk / 2;
+ break;
+ default:
+ gd-pci_clk = gd-bus_clk / 4;
+ break;
}
return (0);
@@ -85,7 +91,7 @@ int prt_mpc5xxx_clks (void)
printf ( Bus %s MHz, IPB %s MHz, PCI %s MHz\n,
strmhz(buf1, gd-bus_clk),
- strmhz(buf2, gd-ipb_clk),
+ strmhz(buf2, gd-arch.ipb_clk),
strmhz(buf3, gd-pci_clk)
);
return (0);
diff --git a/arch/powerpc/cpu/mpc8220/fec.c b/arch/powerpc/cpu/mpc8220/fec.c
index aaf9be1..43fa802 100644
--- a/arch/powerpc/cpu/mpc8220/fec.c
+++ b/arch/powerpc/cpu/mpc8220/fec.c
@@ -288,9 +288,11 @@ static int mpc8220_fec_init (struct eth_device *dev, bd_t
* bis)
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
*/
- /* tbd - rtm */
- /*fec-eth-mii_speed = (((gd-ipb_clk 20) / 5) 1); */
- /* No MII for 7-wire mode */
+ /*
+* tbd - rtm
+* fec-eth-mii_speed = (((gd-arch.ipb_clk 20) / 5) 1);
+* No MII for 7-wire mode
+*/
fec-eth-mii_speed = 0x0030;
}
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index ca36ca3..423e792 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -94,6 +94,9 @@ struct arch_global_data {
#if defined(CONFIG_E500)
u32
[U-Boot] [PATCH 41/57] sandbox: Move ram_buf to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/sandbox/cpu/cpu.c |2 +-
arch/sandbox/include/asm/global_data.h |2 +-
arch/sandbox/lib/board.c |6 +++---
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index d7684d3..b2788d5 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -54,7 +54,7 @@ int cleanup_before_linux(void)
void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
{
- return (void *)(gd-ram_buf + paddr);
+ return (void *)(gd-arch.ram_buf + paddr);
}
void flush_dcache_range(unsigned long start, unsigned long stop)
diff --git a/arch/sandbox/include/asm/global_data.h
b/arch/sandbox/include/asm/global_data.h
index f33f465..3ba7ed5 100644
--- a/arch/sandbox/include/asm/global_data.h
+++ b/arch/sandbox/include/asm/global_data.h
@@ -28,6 +28,7 @@
/* Architecture-specific global data */
struct arch_global_data {
+ u8 *ram_buf; /* emulated RAM buffer */
};
/*
@@ -46,7 +47,6 @@ typedef struct global_data {
unsigned long env_addr; /* Address of Environment struct */
unsigned long env_valid; /* Checksum of Environment valid? */
unsigned long fb_base;/* base address of frame buffer */
- u8 *ram_buf; /* emulated RAM buffer */
phys_size_t ram_size; /* RAM size */
const void *fdt_blob; /* Our device tree, NULL if none */
void**jt; /* jump table */
diff --git a/arch/sandbox/lib/board.c b/arch/sandbox/lib/board.c
index 83858c1..3752fab 100644
--- a/arch/sandbox/lib/board.c
+++ b/arch/sandbox/lib/board.c
@@ -174,7 +174,7 @@ void board_init_f(ulong bootflag)
mem = os_malloc(CONFIG_SYS_SDRAM_SIZE);
assert(mem);
- gd-ram_buf = mem;
+ gd-arch.ram_buf = mem;
addr = (ulong)(mem + size);
/*
@@ -227,8 +227,8 @@ void board_init_r(gd_t *id, ulong dest_addr)
#endif
/* The Malloc area is at the top of simulated DRAM */
- mem_malloc_init((ulong)gd-ram_buf + gd-ram_size - TOTAL_MALLOC_LEN,
- TOTAL_MALLOC_LEN);
+ mem_malloc_init((ulong)gd-arch.ram_buf + gd-ram_size -
+ TOTAL_MALLOC_LEN, TOTAL_MALLOC_LEN);
/* initialize environment */
env_relocate();
--
1.7.7.3
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[U-Boot] [PATCH 39/57] avr32: Move stack_end to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/avr32/cpu/exception.c |6 +++---
arch/avr32/include/asm/global_data.h |2 +-
arch/avr32/lib/board.c |2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/avr32/cpu/exception.c b/arch/avr32/cpu/exception.c
index b21ef1f..828fc00 100644
--- a/arch/avr32/cpu/exception.c
+++ b/arch/avr32/cpu/exception.c
@@ -112,11 +112,11 @@ void do_unknown_exception(unsigned int ecr, struct
pt_regs *regs)
printf(CPU Mode: %s\n, cpu_modes[mode]);
/* Avoid exception loops */
- if (regs-sp (gd-stack_end - CONFIG_STACKSIZE)
- || regs-sp = gd-stack_end)
+ if (regs-sp (gd-arch.stack_end - CONFIG_STACKSIZE)
+ || regs-sp = gd-arch.stack_end)
printf(\nStack pointer seems bogus, won't do stack dump\n);
else
- dump_mem(\nStack: , regs-sp, gd-stack_end);
+ dump_mem(\nStack: , regs-sp, gd-arch.stack_end);
panic(Unhandled exception\n);
}
diff --git a/arch/avr32/include/asm/global_data.h
b/arch/avr32/include/asm/global_data.h
index 236a9da..3be8628 100644
--- a/arch/avr32/include/asm/global_data.h
+++ b/arch/avr32/include/asm/global_data.h
@@ -24,6 +24,7 @@
/* Architecture-specific global data */
struct arch_global_data {
+ unsigned long stack_end;/* highest stack address */
};
/*
@@ -38,7 +39,6 @@ typedef struct global_data {
bd_t*bd;
unsigned long flags;
unsigned intbaudrate;
- unsigned long stack_end; /* highest stack address */
unsigned long have_console; /* serial_init() was called */
#ifdef CONFIG_PRE_CONSOLE_BUFFER
unsigned long precon_buf_idx; /* Pre-Console buffer index */
diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c
index e3287c4..d3c8cb7 100644
--- a/arch/avr32/lib/board.c
+++ b/arch/avr32/lib/board.c
@@ -231,7 +231,7 @@ void board_init_f(ulong board_type)
/* And finally, a new, bigger stack. */
new_sp = (unsigned long *)addr;
- gd-stack_end = addr;
+ gd-arch.stack_end = addr;
*(--new_sp) = 0;
*(--new_sp) = 0;
--
1.7.7.3
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[U-Boot] [PATCH 52/57] openrisc: Use generic global_data
Move openrisc over to use generic global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/openrisc/include/asm/global_data.h | 25 +
1 files changed, 1 insertions(+), 24 deletions(-)
diff --git a/arch/openrisc/include/asm/global_data.h
b/arch/openrisc/include/asm/global_data.h
index b478afa..d267ccd 100644
--- a/arch/openrisc/include/asm/global_data.h
+++ b/arch/openrisc/include/asm/global_data.h
@@ -29,30 +29,7 @@
struct arch_global_data {
};
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-
-typedef struct global_data {
- bd_t*bd;
- unsigned long flags;
- unsigned intbaudrate;
- unsigned long cpu_clk;/* CPU clock in Hz! */
- unsigned long have_console; /* serial_init() was called */
- phys_size_t ram_size; /* RAM size */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long fb_base;/* base address of frame buffer */
- void**jt; /* jump table */
- charenv_buf[32];/* buffer for getenv() before reloc. */
- struct arch_global_data arch; /* architecture-specific data */
-} gd_t;
-
-#include asm-generic/global_data_flags.h
+#include asm-generic/global_data.h
/* OR32 GCC already has r10 set as fixed-use */
#define DECLARE_GLOBAL_DATA_PTRregister volatile gd_t *gd asm (r10)
--
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[U-Boot] [PATCH 42/57] Add generic global_data
Add a generic global_data structure which all archs will eventually
use.
Signed-off-by: Simon Glass s...@chromium.org
---
include/asm-generic/global_data.h | 102 +
1 files changed, 102 insertions(+), 0 deletions(-)
create mode 100644 include/asm-generic/global_data.h
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h
new file mode 100644
index 000..1243f6e
--- /dev/null
+++ b/include/asm-generic/global_data.h
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * (C) Copyright 2002-2010
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef__ASM_GENERIC_GBL_DATA_H
+#define __ASM_GENERIC_GBL_DATA_H
+/*
+ * The following data structure is placed in some memory which is
+ * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
+ * some locked parts of the data cache) to allow for a minimum set of
+ * global variables during system initialization (until we have set
+ * up the memory controller so that we can use RAM).
+ *
+ * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE sizeof(gd_t)
+ *
+ * Each architecture has its own private fields. For now all are private
+ */
+
+#ifndef __ASSEMBLY__
+typedef struct global_data {
+ bd_t *bd;
+ unsigned long flags;
+ unsigned long baudrate;
+ unsigned long cpu_clk; /* CPU clock in Hz! */
+ unsigned long bus_clk;
+ /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
+ unsigned long pci_clk;
+ unsigned long mem_clk;
+#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
+ unsigned long fb_base; /* Base address of framebuffer mem */
+#endif
+#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
+ unsigned long post_log_word; /* Record POST activities */
+ unsigned long post_log_res; /* success of POST test */
+ unsigned long post_init_f_time; /* When post_init_f started */
+#endif
+#ifdef CONFIG_BOARD_TYPES
+ unsigned long board_type;
+#endif
+ unsigned long have_console; /* serial_init() was called */
+#ifdef CONFIG_PRE_CONSOLE_BUFFER
+ unsigned long precon_buf_idx; /* Pre-Console buffer index */
+#endif
+#ifdef CONFIG_MODEM_SUPPORT
+ unsigned long do_mdm_init;
+ unsigned long be_quiet;
+#endif
+ unsigned long env_addr; /* Address of Environment struct */
+ unsigned long env_valid;/* Checksum of Environment valid? */
+
+ /* TODO: is this the same as relocaddr, or something else? */
+ unsigned long dest_addr;/* Post-relocation address of U-Boot */
+ unsigned long dest_addr_sp;
+ unsigned long ram_top; /* Top address of RAM used by U-Boot */
+
+ unsigned long relocaddr;/* Start address of U-Boot in RAM */
+ phys_size_t ram_size; /* RAM size */
+ unsigned long mon_len; /* monitor len */
+ unsigned long irq_sp; /* irq stack pointer */
+ unsigned long start_addr_sp;/* start_addr_stackpointer */
+ unsigned long reloc_off;
+ struct global_data *new_gd; /* relocated global data */
+ const void *fdt_blob; /* Our device tree, NULL if none */
+ void **jt; /* jump table */
+ char env_buf[32]; /* buffer for getenv() before reloc. */
+ struct arch_global_data arch; /* architecture-specific data */
+} gd_t;
+#endif
+
+/*
+ * Global Data Flags
+ */
+#defineGD_FLG_RELOC0x1 /* Code was relocated to RAM
*/
+#defineGD_FLG_DEVINIT 0x2 /* Devices have been
initialized */
+#defineGD_FLG_SILENT 0x4 /* Silent mode
*/
+#defineGD_FLG_POSTFAIL 0x8 /* Critical POST test failed
*/
+#defineGD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted
*/
+#defineGD_FLG_LOGINIT 0x00020 /* Log Buffer has been
initialized */
+#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in out) */
+#define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */
+
+#endif /*
[U-Boot] [PATCH 04/57] arm: Move tbu to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/cpu/arm920t/a320/timer.c|6 +++---
arch/arm/cpu/arm920t/s3c24x0/timer.c | 14 +++---
arch/arm/cpu/arm926ejs/armada100/timer.c | 12 ++--
arch/arm/cpu/arm926ejs/at91/timer.c |6 +++---
arch/arm/cpu/arm926ejs/davinci/timer.c |4 ++--
arch/arm/cpu/arm926ejs/pantheon/timer.c | 12 ++--
arch/arm/cpu/armv7/u8500/timer.c |2 +-
arch/arm/include/asm/global_data.h |2 +-
8 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/arch/arm/cpu/arm920t/a320/timer.c
b/arch/arm/cpu/arm920t/a320/timer.c
index 2873643..781533b 100644
--- a/arch/arm/cpu/arm920t/a320/timer.c
+++ b/arch/arm/cpu/arm920t/a320/timer.c
@@ -75,7 +75,7 @@ int timer_init(void)
writel(cr, tmr-cr);
gd-arch.timer_rate_hz = TIMER_CLOCK;
- gd-tbu = gd-tbl = 0;
+ gd-arch.tbu = gd-tbl = 0;
return 0;
}
@@ -90,9 +90,9 @@ unsigned long long get_ticks(void)
/* increment tbu if tbl has rolled over */
if (now gd-tbl)
- gd-tbu++;
+ gd-arch.tbu++;
gd-tbl = now;
- return (((unsigned long long)gd-tbu) 32) | gd-tbl;
+ return (((unsigned long long)gd-arch.tbu) 32) | gd-tbl;
}
void __udelay(unsigned long usec)
diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c
b/arch/arm/cpu/arm920t/s3c24x0/timer.c
index 7694fea..e59e614 100644
--- a/arch/arm/cpu/arm920t/s3c24x0/timer.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c
@@ -45,17 +45,17 @@ int timer_init(void)
/* use PWM Timer 4 because it has no output */
/* prescaler for Timer 4 is 16 */
writel(0x0f00, timers-tcfg0);
- if (gd-tbu == 0) {
+ if (gd-arch.tbu == 0) {
/*
* for 10 ms clock period @ PCLK with 4 bit divider = 1/2
* (default) and prescaler = 16. Should be 10390
* @33.25MHz and 15625 @ 50 MHz
*/
- gd-tbu = get_PCLK() / (2 * 16 * 100);
+ gd-arch.tbu = get_PCLK() / (2 * 16 * 100);
gd-arch.timer_rate_hz = get_PCLK() / (2 * 16);
}
/* load value for 10 ms timeout */
- writel(gd-tbu, timers-tcntb4);
+ writel(gd-arch.tbu, timers-tcntb4);
/* auto load, manual update of timer 4 */
tmr = (readl(timers-tcon) ~0x070) | 0x060;
writel(tmr, timers-tcon);
@@ -82,7 +82,7 @@ void __udelay (unsigned long usec)
ulong start = get_ticks();
tmo = usec / 1000;
- tmo *= (gd-tbu * 100);
+ tmo *= (gd-arch.tbu * 100);
tmo /= 1000;
while ((ulong) (get_ticks() - start) tmo)
@@ -104,10 +104,10 @@ void udelay_masked(unsigned long usec)
if (usec = 1000) {
tmo = usec / 1000;
- tmo *= (gd-tbu * 100);
+ tmo *= (gd-arch.tbu * 100);
tmo /= 1000;
} else {
- tmo = usec * (gd-tbu * 100);
+ tmo = usec * (gd-arch.tbu * 100);
tmo /= (1000 * 1000);
}
@@ -133,7 +133,7 @@ unsigned long long get_ticks(void)
gd-tbl += gd-lastinc - now;
} else {
/* we have an overflow ... */
- gd-tbl += gd-lastinc + gd-tbu - now;
+ gd-tbl += gd-lastinc + gd-arch.tbu - now;
}
gd-lastinc = now;
diff --git a/arch/arm/cpu/arm926ejs/armada100/timer.c
b/arch/arm/cpu/arm926ejs/armada100/timer.c
index 355cd6d..18ffd0c 100644
--- a/arch/arm/cpu/arm926ejs/armada100/timer.c
+++ b/arch/arm/cpu/arm926ejs/armada100/timer.c
@@ -61,7 +61,7 @@ struct armd1tmr_registers {
#defineCOUNT_RD_REQ0x1
DECLARE_GLOBAL_DATA_PTR;
-/* Using gd-tbu from timestamp and gd-tbl for lastdec */
+/* Using gd-arch.tbu from timestamp and gd-tbl for lastdec */
/* For preventing risk of instability in reading counter value,
* first set read request to register cvwr and then read same
@@ -84,14 +84,14 @@ ulong get_timer_masked(void)
if (now = gd-tbl) {
/* normal mode */
- gd-tbu += now - gd-tbl;
+ gd-arch.tbu += now - gd-tbl;
} else {
/* we have an overflow ... */
- gd-tbu += now + TIMER_LOAD_VAL - gd-tbl;
+ gd-arch.tbu += now + TIMER_LOAD_VAL - gd-tbl;
}
gd-tbl = now;
- return gd-tbu;
+ return gd-arch.tbu;
}
ulong get_timer(ulong base)
@@ -135,9 +135,9 @@ int timer_init(void)
/* Enable timer 0 */
writel(0x1, armd1timers-cer);
- /* init the gd-tbu and gd-tbl value */
+ /* init the gd-arch.tbu and gd-tbl value */
gd-tbl = read_timer();
- gd-tbu = 0;
+ gd-arch.tbu = 0;
return 0;
}
diff --git a/arch/arm/cpu/arm926ejs/at91/timer.c
b/arch/arm/cpu/arm926ejs/at91/timer.c
index 061ccaf..f691518 100644
---
[U-Boot] [PATCH 30/57] ppc: Move mirror_hack to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/include/asm/global_data.h |6 +++---
board/evb64260/mpsc.c |2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index 2d7be45..b9037c4 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -119,6 +119,9 @@ struct arch_global_data {
#if defined(CONFIG_4xx)
u32 uart_clk;
#endif /* CONFIG_4xx */
+#if defined(CONFIG_SYS_GT_6426x)
+ unsigned int mirror_hack[16];
+#endif
};
/*
@@ -148,9 +151,6 @@ typedef struct global_data {
#ifdef CONFIG_PRE_CONSOLE_BUFFER
unsigned long precon_buf_idx; /* Pre-Console buffer index */
#endif
-#if defined(CONFIG_SYS_GT_6426x)
- unsigned intmirror_hack[16];
-#endif
#if defined(CONFIG_A3000) || \
defined(CONFIG_HIDDEN_DRAGON) || \
defined(CONFIG_MUSENKI)|| \
diff --git a/board/evb64260/mpsc.c b/board/evb64260/mpsc.c
index f3dc20b..9c211ac 100644
--- a/board/evb64260/mpsc.c
+++ b/board/evb64260/mpsc.c
@@ -88,7 +88,7 @@ static void galsdma_enable_rx(void);
/* GT64240A errata: cant read MPSC/BRG registers... so make mirrors in ram for
read/modify write */
-#define MIRROR_HACK ((struct _tag_mirror_hack *)(gd-mirror_hack[0]))
+#define MIRROR_HACK ((struct _tag_mirror_hack *)(gd-arch.mirror_hack[0]))
#define GT_REG_WRITE_MIRROR_G(a,d) {MIRROR_HACK-a ## _M = d;
GT_REG_WRITE(a,d);}
#define GTREGREAD_MIRROR_G(a) (MIRROR_HACK-a ## _M)
--
1.7.7.3
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[U-Boot] [PATCH 14/57] ppc: Move brg_clk to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/cpu/mpc8260/commproc.c|2 +-
arch/powerpc/cpu/mpc8260/i2c.c |2 +-
arch/powerpc/cpu/mpc8260/speed.c |4 ++--
arch/powerpc/cpu/mpc83xx/speed.c |5 +++--
arch/powerpc/cpu/mpc85xx/commproc.c|2 +-
arch/powerpc/cpu/mpc85xx/speed.c |4 ++--
arch/powerpc/cpu/mpc8xx/fdt.c |2 +-
arch/powerpc/cpu/mpc8xx/speed.c|2 +-
arch/powerpc/include/asm/global_data.h | 14 +-
arch/powerpc/lib/board.c |2 +-
common/cmd_immap.c |2 +-
drivers/qe/fdt.c |4 ++--
drivers/qe/qe.c|2 +-
13 files changed, 26 insertions(+), 21 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8260/commproc.c
b/arch/powerpc/cpu/mpc8260/commproc.c
index 082957e..e5bfed1 100644
--- a/arch/powerpc/cpu/mpc8260/commproc.c
+++ b/arch/powerpc/cpu/mpc8260/commproc.c
@@ -101,7 +101,7 @@ m8260_cpm_hostalloc(uint size, uint align)
* Baud rate clocks are zero-based in the driver code (as that maps
* to port numbers). Documentation uses 1-based numbering.
*/
-#define BRG_INT_CLKgd-brg_clk
+#define BRG_INT_CLKgd-arch.brg_clk
#define BRG_UART_CLK (BRG_INT_CLK / 16)
/* This function is used by UARTs, or anything else that uses a 16x
diff --git a/arch/powerpc/cpu/mpc8260/i2c.c b/arch/powerpc/cpu/mpc8260/i2c.c
index 7382cba..b720b1f 100644
--- a/arch/powerpc/cpu/mpc8260/i2c.c
+++ b/arch/powerpc/cpu/mpc8260/i2c.c
@@ -259,7 +259,7 @@ void i2c_init(int speed, int slaveadd)
* divide BRGCLK by 1)
*/
debug([I2C] Setting rate...\n);
- i2c_setrate(gd-brg_clk, CONFIG_SYS_I2C_SPEED);
+ i2c_setrate(gd-arch.brg_clk, CONFIG_SYS_I2C_SPEED);
/* Set I2C controller in master mode */
i2c-i2c_i2com = 0x01;
diff --git a/arch/powerpc/cpu/mpc8260/speed.c b/arch/powerpc/cpu/mpc8260/speed.c
index bb50dee..4ad1ec2 100644
--- a/arch/powerpc/cpu/mpc8260/speed.c
+++ b/arch/powerpc/cpu/mpc8260/speed.c
@@ -145,7 +145,7 @@ int get_clocks (void)
gd-cpm_clk = gd-vco_out / 2;
gd-bus_clk = clkin;
gd-scc_clk = gd-vco_out / 4;
- gd-brg_clk = gd-vco_out / (1 (2 * (dfbrg + 1)));
+ gd-arch.brg_clk = gd-vco_out / (1 (2 * (dfbrg + 1)));
if (cp-b2c_mult 0) {
gd-cpu_clk = (clkin * cp-b2c_mult) / 2;
@@ -231,7 +231,7 @@ int prt_8260_clks (void)
plldf, pllmf, pcidf);
printf ( - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n,
- gd-vco_out, gd-scc_clk, gd-brg_clk);
+ gd-vco_out, gd-scc_clk, gd-arch.brg_clk);
printf ( - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n,
gd-cpu_clk, gd-cpm_clk, gd-bus_clk);
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index b8c05d1..21e8b0a 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -496,7 +496,7 @@ int get_clocks(void)
#endif
#if defined(CONFIG_QE)
gd-qe_clk = qe_clk;
- gd-brg_clk = brg_clk;
+ gd-arch.brg_clk = brg_clk;
#endif
#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
defined(CONFIG_MPC837x)
@@ -540,7 +540,8 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
printf( Coherent System Bus: %-4s MHz\n, strmhz(buf, gd-csb_clk));
#if defined(CONFIG_QE)
printf( QE: %-4s MHz\n, strmhz(buf, gd-qe_clk));
- printf( BRG: %-4s MHz\n, strmhz(buf, gd-brg_clk));
+ printf( BRG: %-4s MHz\n,
+ strmhz(buf, gd-arch.brg_clk));
#endif
printf( Local Bus Controller:%-4s MHz\n, strmhz(buf, gd-lbiu_clk));
printf( Local Bus: %-4s MHz\n, strmhz(buf, gd-lclk_clk));
diff --git a/arch/powerpc/cpu/mpc85xx/commproc.c
b/arch/powerpc/cpu/mpc85xx/commproc.c
index 292b723..7f10476 100644
--- a/arch/powerpc/cpu/mpc85xx/commproc.c
+++ b/arch/powerpc/cpu/mpc85xx/commproc.c
@@ -110,7 +110,7 @@ m8560_cpm_hostalloc(uint size, uint align)
* Baud rate clocks are zero-based in the driver code (as that maps
* to port numbers). Documentation uses 1-based numbering.
*/
-#define BRG_INT_CLKgd-brg_clk
+#define BRG_INT_CLKgd-arch.brg_clk
#define BRG_UART_CLK ((BRG_INT_CLK + 15) / 16)
/* This function is used by UARTS, or anything else that uses a 16x
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 801ee07..8a581ef 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -395,7 +395,7 @@ int get_clocks (void)
#ifdef CONFIG_QE
gd-qe_clk = sys_info.freqQE;
- gd-brg_clk = gd-qe_clk / 2;
+ gd-arch.brg_clk = gd-qe_clk / 2;
#endif
/*
* The base clock for I2C depends on the actual SOC.
[U-Boot] [PATCH 08/57] ixp: Move timestamp to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/cpu/ixp/timer.c |8
arch/arm/include/asm/global_data.h |6 +++---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/ixp/timer.c b/arch/arm/cpu/ixp/timer.c
index 0450b51..663d989 100644
--- a/arch/arm/cpu/ixp/timer.c
+++ b/arch/arm/cpu/ixp/timer.c
@@ -70,14 +70,14 @@ unsigned long long get_ticks(void)
if (readl(IXP425_OSST) IXP425_OSST_TIMER_TS_PEND) {
/* rollover of timestamp timer register */
- gd-timestamp += (0x - gd-arch.lastinc) + now + 1;
+ gd-arch.timestamp += (0x - gd-arch.lastinc) + now + 1;
writel(IXP425_OSST_TIMER_TS_PEND, IXP425_OSST);
} else {
/* move stamp forward with absolut diff ticks */
- gd-timestamp += (now - gd-arch.lastinc);
+ gd-arch.timestamp += (now - gd-arch.lastinc);
}
gd-arch.lastinc = now;
- return gd-timestamp;
+ return gd-arch.timestamp;
}
@@ -86,7 +86,7 @@ void reset_timer_masked(void)
/* capture current timestamp counter */
gd-arch.lastinc = readl(IXP425_OSTS_B);
/* start advancing time stamp from 0 */
- gd-timestamp = 0;
+ gd-arch.timestamp = 0;
}
ulong get_timer_masked(void)
diff --git a/arch/arm/include/asm/global_data.h
b/arch/arm/include/asm/global_data.h
index 95e23e1..35d07d0 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -41,6 +41,9 @@ struct arch_global_data {
unsigned long tbl;
unsigned long lastinc;
unsigned long long timer_reset_value;
+#ifdef CONFIG_IXP425
+ unsigned long timestamp;
+#endif
};
/*
@@ -65,9 +68,6 @@ typedef struct global_data {
#ifdef CONFIG_FSL_ESDHC
unsigned long sdhc_clk;
#endif
-#ifdef CONFIG_IXP425
- unsigned long timestamp;
-#endif
unsigned long relocaddr; /* Start address of U-Boot in RAM */
phys_size_t ram_size; /* RAM size */
unsigned long mon_len;/* monitor len */
--
1.7.7.3
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[U-Boot] [PATCH 18/57] ppc: Move lbc_clk and cpu to arch_global_data
Move these fields into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/cpu/mpc85xx/cpu.c |2 +-
arch/powerpc/cpu/mpc85xx/fdt.c |4 ++--
arch/powerpc/cpu/mpc85xx/speed.c|2 +-
arch/powerpc/cpu/mpc86xx/cpu.c |2 +-
arch/powerpc/cpu/mpc86xx/fdt.c |4 ++--
arch/powerpc/cpu/mpc86xx/speed.c|2 +-
arch/powerpc/cpu/mpc8xxx/cpu.c |8
arch/powerpc/include/asm/global_data.h |8
arch/powerpc/lib/board.c|7 ---
board/freescale/bsc9131rdb/bsc9131rdb.c |2 +-
board/freescale/corenet_ds/corenet_ds.c |2 +-
board/freescale/p1010rdb/ddr.c |6 +++---
board/freescale/p1010rdb/p1010rdb.c |6 +++---
board/freescale/p1_p2_rdb/ddr.c |2 +-
board/freescale/p1_p2_rdb/p1_p2_rdb.c |2 +-
board/freescale/p2041rdb/p2041rdb.c |2 +-
board/freescale/t4qds/t4qds.c |2 +-
17 files changed, 32 insertions(+), 31 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index db232e6..a8a83cd 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -104,7 +104,7 @@ int checkcpu (void)
puts(CPU: );
}
- cpu = gd-cpu;
+ cpu = gd-arch.cpu;
puts(cpu-name);
if (IS_E_PROCESSOR(svr))
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index ab09330..6422e0f 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -613,9 +613,9 @@ void ft_cpu_setup(void *blob, bd_t *bd)
bus-frequency, bd-bi_busfreq, 1);
do_fixup_by_compat_u32(blob, fsl,pq3-localbus,
- bus-frequency, gd-lbc_clk, 1);
+ bus-frequency, gd-arch.lbc_clk, 1);
do_fixup_by_compat_u32(blob, fsl,elbc,
- bus-frequency, gd-lbc_clk, 1);
+ bus-frequency, gd-arch.lbc_clk, 1);
#ifdef CONFIG_QE
ft_qe_setup(blob);
ft_fixup_qe_snum(blob);
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index c4ca481..f3132fb 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -391,7 +391,7 @@ int get_clocks (void)
gd-cpu_clk = sys_info.freqProcessor[0];
gd-bus_clk = sys_info.freqSystemBus;
gd-mem_clk = sys_info.freqDDRBus;
- gd-lbc_clk = sys_info.freqLocalBus;
+ gd-arch.lbc_clk = sys_info.freqLocalBus;
#ifdef CONFIG_QE
gd-qe_clk = sys_info.freqQE;
diff --git a/arch/powerpc/cpu/mpc86xx/cpu.c b/arch/powerpc/cpu/mpc86xx/cpu.c
index d2c8c78..c553415 100644
--- a/arch/powerpc/cpu/mpc86xx/cpu.c
+++ b/arch/powerpc/cpu/mpc86xx/cpu.c
@@ -67,7 +67,7 @@ checkcpu(void)
}
puts(CPU: );
- cpu = gd-cpu;
+ cpu = gd-arch.cpu;
puts(cpu-name);
diff --git a/arch/powerpc/cpu/mpc86xx/fdt.c b/arch/powerpc/cpu/mpc86xx/fdt.c
index 2f955fe..26a65c5 100644
--- a/arch/powerpc/cpu/mpc86xx/fdt.c
+++ b/arch/powerpc/cpu/mpc86xx/fdt.c
@@ -34,10 +34,10 @@ void ft_cpu_setup(void *blob, bd_t *bd)
#if defined(CONFIG_MPC8641)
do_fixup_by_compat_u32(blob, fsl,mpc8641-localbus,
- bus-frequency, gd-lbc_clk, 1);
+ bus-frequency, gd-arch.lbc_clk, 1);
#endif
do_fixup_by_compat_u32(blob, fsl,elbc,
- bus-frequency, gd-lbc_clk, 1);
+ bus-frequency, gd-arch.lbc_clk, 1);
fdt_fixup_memory(blob, (u64)bd-bi_memstart, (u64)bd-bi_memsize);
diff --git a/arch/powerpc/cpu/mpc86xx/speed.c b/arch/powerpc/cpu/mpc86xx/speed.c
index a2d0a8a..e5798ee 100644
--- a/arch/powerpc/cpu/mpc86xx/speed.c
+++ b/arch/powerpc/cpu/mpc86xx/speed.c
@@ -120,7 +120,7 @@ int get_clocks(void)
get_sys_info(sys_info);
gd-cpu_clk = sys_info.freqProcessor;
gd-bus_clk = sys_info.freqSystemBus;
- gd-lbc_clk = sys_info.freqLocalBus;
+ gd-arch.lbc_clk = sys_info.freqLocalBus;
/*
* The base clock for I2C depends on the actual SOC. Unfortunately,
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index e8613be..dcbb199 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -146,7 +146,7 @@ struct cpu_type *identify_cpu(u32 ver)
u32 cpu_mask(void)
{
ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
- struct cpu_type *cpu = gd-cpu;
+ struct cpu_type *cpu = gd-arch.cpu;
/* better to query feature reporting register than just assume 1 */
if (cpu == cpu_type_unknown)
@@ -164,7 +164,7 @@ u32 cpu_mask(void)
*/
int cpu_numcores(void)
{
- struct cpu_type *cpu = gd-cpu;
+ struct cpu_type *cpu = gd-arch.cpu;
/*
* Report # of cores in terms of the cpu_mask if we haven't
@@ -194,7 +194,7 @@ int probecpu
[U-Boot] [PATCH 54/57] sandbox: Use generic global_data
Move sandbox over to use generic global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/sandbox/include/asm/global_data.h | 25 +
1 files changed, 1 insertions(+), 24 deletions(-)
diff --git a/arch/sandbox/include/asm/global_data.h
b/arch/sandbox/include/asm/global_data.h
index 3ba7ed5..3bedf77 100644
--- a/arch/sandbox/include/asm/global_data.h
+++ b/arch/sandbox/include/asm/global_data.h
@@ -31,30 +31,7 @@ struct arch_global_data {
u8 *ram_buf; /* emulated RAM buffer */
};
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-
-typedefstruct global_data {
- bd_t*bd;
- unsigned long flags;
- unsigned intbaudrate;
- unsigned long have_console; /* serial_init() was called */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long fb_base;/* base address of frame buffer */
- phys_size_t ram_size; /* RAM size */
- const void *fdt_blob; /* Our device tree, NULL if none */
- void**jt; /* jump table */
- charenv_buf[32];/* buffer for getenv() before reloc. */
- struct arch_global_data arch; /* architecture-specific data */
-} gd_t;
-
-#include asm-generic/global_data_flags.h
+#include asm-generic/global_data.h
#define DECLARE_GLOBAL_DATA_PTR extern gd_t *gd
--
1.7.7.3
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[U-Boot] [PATCH 45/57] avr32: Use generic global_data
Move avr32 over to use generic global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/avr32/include/asm/global_data.h | 29 +
1 files changed, 1 insertions(+), 28 deletions(-)
diff --git a/arch/avr32/include/asm/global_data.h
b/arch/avr32/include/asm/global_data.h
index aeb6605..a71f199 100644
--- a/arch/avr32/include/asm/global_data.h
+++ b/arch/avr32/include/asm/global_data.h
@@ -28,34 +28,7 @@ struct arch_global_data {
unsigned long cpu_hz; /* cpu core clock frequency */
};
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-
-typedefstruct global_data {
- bd_t*bd;
- unsigned long flags;
- unsigned intbaudrate;
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- unsigned long reloc_off; /* Relocation Offset */
- unsigned long env_addr; /* Address of env struct */
- unsigned long env_valid; /* Checksum of env valid? */
-#if defined(CONFIG_LCD)
- void*fb_base; /* framebuffer address */
-#endif
- void**jt; /* jump table */
- charenv_buf[32];/* buffer for getenv() before reloc. */
- struct arch_global_data arch; /* architecture-specific data */
-} gd_t;
-
-#include asm-generic/global_data_flags.h
+#include asm-generic/global_data.h
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm(r5)
--
1.7.7.3
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[U-Boot] [PATCH 33/57] ppc: Move wdt_last to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/include/asm/global_data.h |6 +++---
board/lwmon5/lwmon5.c |8
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index 52aece0..b138e64 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -125,6 +125,9 @@ struct arch_global_data {
#ifdef CONFIG_SYS_FPGA_COUNT
unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
#endif
+#if defined(CONFIG_WD_MAX_RATE)
+ unsigned long long wdt_last;/* trace watch-dog triggering rate */
+#endif
};
/*
@@ -173,9 +176,6 @@ typedef struct global_data {
#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
unsigned long kbd_status;
#endif
-#if defined(CONFIG_WD_MAX_RATE)
- unsigned long long wdt_last;/* trace watch-dog triggering rate */
-#endif
void**jt; /* jump table */
charenv_buf[32];/* buffer for getenv() before reloc. */
struct arch_global_data arch; /* architecture-specific data */
diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c
index ecd9536..29e24fb 100644
--- a/board/lwmon5/lwmon5.c
+++ b/board/lwmon5/lwmon5.c
@@ -357,16 +357,16 @@ void hw_watchdog_reset(void)
* Don't allow watch-dog triggering more frequently than
* the predefined value CONFIG_WD_MAX_RATE [ticks].
*/
- if (ct = gd-wdt_last) {
- if ((ct - gd-wdt_last) CONFIG_WD_MAX_RATE)
+ if (ct = gd-arch.wdt_last) {
+ if ((ct - gd-arch.wdt_last) CONFIG_WD_MAX_RATE)
return;
} else {
/* Time base counter had been reset */
- if (((unsigned long long)(-1) - gd-wdt_last + ct)
+ if (((unsigned long long)(-1) - gd-arch.wdt_last + ct)
CONFIG_WD_MAX_RATE)
return;
}
- gd-wdt_last = get_ticks();
+ gd-arch.wdt_last = get_ticks();
#endif
/*
--
1.7.7.3
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[U-Boot] [PATCH 17/57] ppc: Move mpc83xx clock fields to arch_global_data
Move al mpc83xx fields into arch_global_data and tidy up. Also indent
the nested #ifdef for clarity.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/cpu/mpc83xx/cpu.c |2 +-
arch/powerpc/cpu/mpc83xx/fdt.c |2 +-
arch/powerpc/cpu/mpc83xx/pcie.c|4 +-
arch/powerpc/cpu/mpc83xx/speed.c | 81 +++-
arch/powerpc/include/asm/global_data.h | 73 +---
5 files changed, 86 insertions(+), 76 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index e64b0c3..cc20234 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -122,7 +122,7 @@ int checkcpu(void)
printf( at %s MHz, , strmhz(buf, clock));
- printf(CSB: %s MHz\n, strmhz(buf, gd-csb_clk));
+ printf(CSB: %s MHz\n, strmhz(buf, gd-arch.csb_clk));
return 0;
}
diff --git a/arch/powerpc/cpu/mpc83xx/fdt.c b/arch/powerpc/cpu/mpc83xx/fdt.c
index 1f54781..fe553a7 100644
--- a/arch/powerpc/cpu/mpc83xx/fdt.c
+++ b/arch/powerpc/cpu/mpc83xx/fdt.c
@@ -118,7 +118,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
do_fixup_by_prop_u32(blob, device_type, cpu, 4,
bus-frequency, bd-bi_busfreq, 1);
do_fixup_by_prop_u32(blob, device_type, cpu, 4,
- clock-frequency, gd-core_clk, 1);
+ clock-frequency, gd-arch.core_clk, 1);
do_fixup_by_prop_u32(blob, device_type, soc, 4,
bus-frequency, bd-bi_busfreq, 1);
do_fixup_by_compat_u32(blob, fsl,soc,
diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
index 52d4461..609b133 100644
--- a/arch/powerpc/cpu/mpc83xx/pcie.c
+++ b/arch/powerpc/cpu/mpc83xx/pcie.c
@@ -286,8 +286,8 @@ static void mpc83xx_pcie_init_bus(int bus, struct
pci_region *reg)
get_clocks();
/* Configure the PCIE controller core clock ratio */
out_le32(hose_cfg_base + PEX_GCLK_RATIO,
- (((bus ? gd-pciexp2_clk : gd-pciexp1_clk) / 100) * 16)
- / 333);
+ (((bus ? gd-arch.pciexp2_clk : gd-arch.pciexp1_clk)
+ / 100) * 16) / 333);
udelay(100);
/* Do Type 1 bridge configuration */
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index 21e8b0a..7f98ee8 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -462,37 +462,37 @@ int get_clocks(void)
brg_clk = qe_clk / 2;
#endif
- gd-csb_clk = csb_clk;
+ gd-arch.csb_clk = csb_clk;
#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
- gd-tsec1_clk = tsec1_clk;
- gd-tsec2_clk = tsec2_clk;
- gd-usbdr_clk = usbdr_clk;
+ gd-arch.tsec1_clk = tsec1_clk;
+ gd-arch.tsec2_clk = tsec2_clk;
+ gd-arch.usbdr_clk = usbdr_clk;
#elif defined(CONFIG_MPC8309)
- gd-usbdr_clk = usbdr_clk;
+ gd-arch.usbdr_clk = usbdr_clk;
#endif
#if defined(CONFIG_MPC834x)
- gd-usbmph_clk = usbmph_clk;
+ gd-arch.usbmph_clk = usbmph_clk;
#endif
#if defined(CONFIG_MPC8315)
- gd-tdm_clk = tdm_clk;
+ gd-arch.tdm_clk = tdm_clk;
#endif
#if defined(CONFIG_FSL_ESDHC)
gd-sdhc_clk = sdhc_clk;
#endif
- gd-core_clk = core_clk;
+ gd-arch.core_clk = core_clk;
gd-i2c1_clk = i2c1_clk;
#if !defined(CONFIG_MPC832x)
gd-i2c2_clk = i2c2_clk;
#endif
#if !defined(CONFIG_MPC8309)
- gd-enc_clk = enc_clk;
+ gd-arch.enc_clk = enc_clk;
#endif
- gd-lbiu_clk = lbiu_clk;
- gd-lclk_clk = lclk_clk;
+ gd-arch.lbiu_clk = lbiu_clk;
+ gd-arch.lclk_clk = lclk_clk;
gd-mem_clk = mem_clk;
#if defined(CONFIG_MPC8360)
- gd-mem_sec_clk = mem_sec_clk;
+ gd-arch.mem_sec_clk = mem_sec_clk;
#endif
#if defined(CONFIG_QE)
gd-qe_clk = qe_clk;
@@ -500,15 +500,15 @@ int get_clocks(void)
#endif
#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
defined(CONFIG_MPC837x)
- gd-pciexp1_clk = pciexp1_clk;
- gd-pciexp2_clk = pciexp2_clk;
+ gd-arch.pciexp1_clk = pciexp1_clk;
+ gd-arch.pciexp2_clk = pciexp2_clk;
#endif
#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
- gd-sata_clk = sata_clk;
+ gd-arch.sata_clk = sata_clk;
#endif
gd-pci_clk = pci_sync_in;
- gd-cpu_clk = gd-core_clk;
- gd-bus_clk = gd-csb_clk;
+ gd-cpu_clk = gd-arch.core_clk;
+ gd-bus_clk = gd-arch.csb_clk;
return 0;
}
@@ -519,7 +519,7 @@ int get_clocks(void)
*/
ulong get_bus_freq(ulong dummy)
{
- return gd-csb_clk;
+ return gd-arch.csb_clk;
}
/
@@ -536,50 +536,65 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv[])
char buf[32];
printf(Clock
[U-Boot] [PATCH 07/57] arm: Move timer_reset_value to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/cpu/arm926ejs/davinci/timer.c |4 ++--
arch/arm/include/asm/global_data.h |5 +
2 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c
b/arch/arm/cpu/arm926ejs/davinci/timer.c
index b620bf7..4142932 100644
--- a/arch/arm/cpu/arm926ejs/davinci/timer.c
+++ b/arch/arm/cpu/arm926ejs/davinci/timer.c
@@ -61,7 +61,7 @@ int timer_init(void)
writel(TIMER_LOAD_VAL, timer-prd34);
writel(2 22, timer-tcr);
gd-arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV;
- gd-timer_reset_value = 0;
+ gd-arch.timer_reset_value = 0;
return(0);
}
@@ -85,7 +85,7 @@ ulong get_timer(ulong base)
{
unsigned long long timer_diff;
- timer_diff = get_ticks() - gd-timer_reset_value;
+ timer_diff = get_ticks() - gd-arch.timer_reset_value;
return lldiv(timer_diff,
(gd-arch.timer_rate_hz / CONFIG_SYS_HZ)) - base;
diff --git a/arch/arm/include/asm/global_data.h
b/arch/arm/include/asm/global_data.h
index 7d7f3cf..95e23e1 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -40,6 +40,7 @@ struct arch_global_data {
unsigned long tbu;
unsigned long tbl;
unsigned long lastinc;
+ unsigned long long timer_reset_value;
};
/*
@@ -64,10 +65,6 @@ typedef struct global_data {
#ifdef CONFIG_FSL_ESDHC
unsigned long sdhc_clk;
#endif
-#ifdef CONFIG_ARM
- /* static data needed by most of timer.c on ARM platforms */
- unsigned long long timer_reset_value;
-#endif
#ifdef CONFIG_IXP425
unsigned long timestamp;
#endif
--
1.7.7.3
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[U-Boot] [PATCH 24/57] ppc: Move mpc512x clocks to arch_global_data
Move ips_clk and csb_clk into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/cpu/mpc512x/cpu.c |2 +-
arch/powerpc/cpu/mpc512x/i2c.c |2 +-
arch/powerpc/cpu/mpc512x/ide.c |2 +-
arch/powerpc/cpu/mpc512x/serial.c |2 +-
arch/powerpc/cpu/mpc512x/speed.c | 15 +--
arch/powerpc/include/asm/global_data.h |8
arch/powerpc/lib/board.c |2 +-
drivers/net/mpc512x_fec.c |2 +-
8 files changed, 19 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/cpu/mpc512x/cpu.c b/arch/powerpc/cpu/mpc512x/cpu.c
index a1a3bd4..641120f 100644
--- a/arch/powerpc/cpu/mpc512x/cpu.c
+++ b/arch/powerpc/cpu/mpc512x/cpu.c
@@ -68,7 +68,7 @@ int checkcpu (void)
}
printf (at %s MHz, CSB at %s MHz (RSR=0x%04lx)\n,
strmhz(buf1, clock),
- strmhz(buf2, gd-csb_clk),
+ strmhz(buf2, gd-arch.csb_clk),
gd-reset_status 0x);
return 0;
}
diff --git a/arch/powerpc/cpu/mpc512x/i2c.c b/arch/powerpc/cpu/mpc512x/i2c.c
index 0ea1280..59040f8 100644
--- a/arch/powerpc/cpu/mpc512x/i2c.c
+++ b/arch/powerpc/cpu/mpc512x/i2c.c
@@ -250,7 +250,7 @@ static int mpc_get_fdr (int speed)
{126, 128}
};
- ips = gd-ips_clk;
+ ips = gd-arch.ips_clk;
for (i = 7; i = 0; i--) {
for (j = 7; j = 0; j--) {
scl = 2 * (scltap[j].scl2tap +
diff --git a/arch/powerpc/cpu/mpc512x/ide.c b/arch/powerpc/cpu/mpc512x/ide.c
index dd6b2f4..7a49673 100644
--- a/arch/powerpc/cpu/mpc512x/ide.c
+++ b/arch/powerpc/cpu/mpc512x/ide.c
@@ -100,7 +100,7 @@ int ide_preinit (void)
ide_set_reset(0);
/* Init timings : we use PIO mode 0 timings */
- t = 10 / gd-ips_clk; /* period in ns */
+ t = 10 / gd-arch.ips_clk; /* period in ns */
cfg.bytes.field1 = 3;
cfg.bytes.field2 = 3;
cfg.bytes.field3 = (pio_specs.t1 + t) / t;
diff --git a/arch/powerpc/cpu/mpc512x/serial.c
b/arch/powerpc/cpu/mpc512x/serial.c
index 58587fd..3afbe81 100644
--- a/arch/powerpc/cpu/mpc512x/serial.c
+++ b/arch/powerpc/cpu/mpc512x/serial.c
@@ -140,7 +140,7 @@ void serial_setbrg_dev(unsigned int idx)
}
/* calculate divisor for setting PSC CTUR and CTLR registers */
- baseclk = (gd-ips_clk + 8) / 16;
+ baseclk = (gd-arch.ips_clk + 8) / 16;
div = (baseclk + (baudrate / 2)) / baudrate;
out_8(psc-ctur, (div 8) 0xff);
diff --git a/arch/powerpc/cpu/mpc512x/speed.c b/arch/powerpc/cpu/mpc512x/speed.c
index 9d749f2..9a8f315 100644
--- a/arch/powerpc/cpu/mpc512x/speed.c
+++ b/arch/powerpc/cpu/mpc512x/speed.c
@@ -113,9 +113,9 @@ int get_clocks (void)
pci_clk = 33;
}
- gd-ips_clk = ips_clk;
+ gd-arch.ips_clk = ips_clk;
gd-pci_clk = pci_clk;
- gd-csb_clk = csb_clk;
+ gd-arch.csb_clk = csb_clk;
gd-cpu_clk = core_clk;
gd-bus_clk = csb_clk;
return 0;
@@ -128,7 +128,7 @@ int get_clocks (void)
*/
ulong get_bus_freq (ulong dummy)
{
- return gd-csb_clk;
+ return gd-arch.csb_clk;
}
int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
@@ -137,10 +137,13 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc,
char * const argv[])
printf(Clock configuration:\n);
printf( CPU: %-4s MHz\n, strmhz(buf, gd-cpu_clk));
- printf( Coherent System Bus: %-4s MHz\n, strmhz(buf, gd-csb_clk));
- printf( IPS Bus: %-4s MHz\n, strmhz(buf, gd-ips_clk));
+ printf( Coherent System Bus: %-4s MHz\n,
+ strmhz(buf, gd-arch.csb_clk));
+ printf( IPS Bus: %-4s MHz\n,
+ strmhz(buf, gd-arch.ips_clk));
printf( PCI: %-4s MHz\n, strmhz(buf, gd-pci_clk));
- printf( DDR: %-4s MHz\n, strmhz(buf, 2*gd-csb_clk));
+ printf( DDR: %-4s MHz\n,
+ strmhz(buf, 2 * gd-arch.csb_clk));
return 0;
}
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index 423e792..fa5c504 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -97,6 +97,10 @@ struct arch_global_data {
#if defined(CONFIG_MPC5xxx)
unsigned long ipb_clk;
#endif
+#if defined(CONFIG_MPC512X)
+ u32 ips_clk;
+ u32 csb_clk;
+#endif /* CONFIG_MPC512X */
};
/*
@@ -119,10 +123,6 @@ typedefstruct global_data {
#if defined(CONFIG_FSL_ESDHC)
u32 sdhc_clk;
#endif
-#if defined(CONFIG_MPC512X)
- u32 ips_clk;
- u32 csb_clk;
-#endif /* CONFIG_MPC512X */
#if defined(CONFIG_MPC8220)
unsigned long bExtUart;
unsigned
[U-Boot] [PATCH 20/57] ppc: Move CONFIG_QE to arch_global_data
Move the quantative easing fields into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/cpu/mpc83xx/speed.c |5 +++--
arch/powerpc/cpu/mpc85xx/speed.c |4 ++--
arch/powerpc/include/asm/global_data.h | 14 ++
drivers/qe/fdt.c |8
drivers/qe/qe.c| 19 ++-
5 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index a40a055..ba8b285 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -495,7 +495,7 @@ int get_clocks(void)
gd-arch.mem_sec_clk = mem_sec_clk;
#endif
#if defined(CONFIG_QE)
- gd-qe_clk = qe_clk;
+ gd-arch.qe_clk = qe_clk;
gd-arch.brg_clk = brg_clk;
#endif
#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
@@ -541,7 +541,8 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
printf( Coherent System Bus: %-4s MHz\n,
strmhz(buf, gd-arch.csb_clk));
#if defined(CONFIG_QE)
- printf( QE: %-4s MHz\n, strmhz(buf, gd-qe_clk));
+ printf( QE: %-4s MHz\n,
+ strmhz(buf, gd-arch.qe_clk));
printf( BRG: %-4s MHz\n,
strmhz(buf, gd-arch.brg_clk));
#endif
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 81c80e7..7173c07 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -394,8 +394,8 @@ int get_clocks (void)
gd-arch.lbc_clk = sys_info.freqLocalBus;
#ifdef CONFIG_QE
- gd-qe_clk = sys_info.freqQE;
- gd-arch.brg_clk = gd-qe_clk / 2;
+ gd-arch.qe_clk = sys_info.freqQE;
+ gd-arch.brg_clk = gd-arch.qe_clk / 2;
#endif
/*
* The base clock for I2C depends on the actual SOC. Unfortunately,
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index b710f25..760cdab 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -39,9 +39,6 @@ struct arch_global_data {
unsigned long scc_clk;
unsigned long brg_clk;
#endif
-#if defined(CONFIG_QE)
- u32 brg_clk;
-#endif
/* TODO: s...@chromium.org: Should these be unslgned long? */
#if defined(CONFIG_MPC83xx)
/* There are other clocks in the MPC83XX */
@@ -85,6 +82,12 @@ struct arch_global_data {
u32 i2c1_clk;
u32 i2c2_clk;
#endif
+#if defined(CONFIG_QE)
+ u32 qe_clk;
+ u32 brg_clk;
+ uint mp_alloc_base;
+ uint mp_alloc_top;
+#endif /* CONFIG_QE */
};
/*
@@ -107,11 +110,6 @@ typedefstruct global_data {
#if defined(CONFIG_FSL_ESDHC)
u32 sdhc_clk;
#endif
-#if defined(CONFIG_QE)
- u32 qe_clk;
- uint mp_alloc_base;
- uint mp_alloc_top;
-#endif /* CONFIG_QE */
#if defined(CONFIG_FSL_LAW)
u32 used_laws;
#endif
diff --git a/drivers/qe/fdt.c b/drivers/qe/fdt.c
index 1a123b8..5a0f277 100644
--- a/drivers/qe/fdt.c
+++ b/drivers/qe/fdt.c
@@ -75,16 +75,16 @@ error:
void ft_qe_setup(void *blob)
{
do_fixup_by_prop_u32(blob, device_type, qe, 4,
- bus-frequency, gd-qe_clk, 1);
+ bus-frequency, gd-arch.qe_clk, 1);
do_fixup_by_prop_u32(blob, device_type, qe, 4,
brg-frequency, gd-arch.brg_clk, 1);
do_fixup_by_compat_u32(blob, fsl,qe,
- clock-frequency, gd-qe_clk, 1);
+ clock-frequency, gd-arch.qe_clk, 1);
do_fixup_by_compat_u32(blob, fsl,qe,
- bus-frequency, gd-qe_clk, 1);
+ bus-frequency, gd-arch.qe_clk, 1);
do_fixup_by_compat_u32(blob, fsl,qe,
brg-frequency, gd-arch.brg_clk, 1);
do_fixup_by_compat_u32(blob, fsl,qe-gtm,
- clock-frequency, gd-qe_clk / 2, 1);
+ clock-frequency, gd-arch.qe_clk / 2, 1);
fdt_fixup_qe_firmware(blob);
}
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 72c585c..5fd2135 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -58,21 +58,22 @@ uint qe_muram_alloc(uint size, uint align)
uintsavebase;
align_mask = align - 1;
- savebase = gd-mp_alloc_base;
+ savebase = gd-arch.mp_alloc_base;
- if ((off = (gd-mp_alloc_base align_mask)) != 0)
- gd-mp_alloc_base += (align - off);
+ off = gd-arch.mp_alloc_base align_mask;
+ if (off != 0)
+ gd-arch.mp_alloc_base += (align - off);
if ((off = size align_mask) != 0)
size += (align - off);
- if ((gd-mp_alloc_base + size) = gd-mp_alloc_top) {
- gd-mp_alloc_base = savebase;
+ if ((gd-arch.mp_alloc_base + size) = gd-arch.mp_alloc_top) {
+ gd-arch.mp_alloc_base = savebase;
printf(%s: ran
[U-Boot] [PATCH 46/57] blackfin: Use generic global_data
Move blackfin over to use generic global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/blackfin/include/asm/global_data.h | 32 +--
1 files changed, 1 insertions(+), 31 deletions(-)
diff --git a/arch/blackfin/include/asm/global_data.h
b/arch/blackfin/include/asm/global_data.h
index 109069f..c2c4d4d 100644
--- a/arch/blackfin/include/asm/global_data.h
+++ b/arch/blackfin/include/asm/global_data.h
@@ -34,37 +34,7 @@
struct arch_global_data {
};
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
- unsigned long board_type;
- unsigned int baudrate;
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- phys_size_t ram_size; /* RAM size */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid;/* Checksum of Environment valid? */
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
- unsigned long post_log_word;/* Record POST activities */
- unsigned long post_log_res; /* success of POST test */
- unsigned long post_init_f_time; /* When post_init_f started */
-#endif
-
- void**jt; /* jump table */
- charenv_buf[32];/* buffer for getenv() before reloc. */
- struct arch_global_data arch; /* architecture-specific data */
-} gd_t;
-
-#include asm-generic/global_data_flags.h
+#include asm-generic/global_data.h
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm (P3)
--
1.7.7.3
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[U-Boot] [PATCH 27/57] ppc: Move arbiter fields to arch_global_data
Move arbiter_event_attributes and arbiter_event_address into
arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/cpu/mpc83xx/cpu_init.c| 28 +++-
arch/powerpc/include/asm/global_data.h |8
2 files changed, 19 insertions(+), 17 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c
b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 9325110..5153351 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -236,8 +236,8 @@ void cpu_init_f (volatile immap_t * im)
__raw_writel(~(RSR_RES), im-reset.rsr);
/* AER - Arbiter Event Register - store status */
- gd-arbiter_event_attributes = __raw_readl(im-arbiter.aeatr);
- gd-arbiter_event_address = __raw_readl(im-arbiter.aeadr);
+ gd-arch.arbiter_event_attributes = __raw_readl(im-arbiter.aeatr);
+ gd-arch.arbiter_event_address = __raw_readl(im-arbiter.aeadr);
/*
* RMR - Reset Mode Register
@@ -440,42 +440,44 @@ static int print_83xx_arb_event(int force)
reserved
};
- int etype = (gd-arbiter_event_attributes AEATR_EVENT)
+ int etype = (gd-arch.arbiter_event_attributes AEATR_EVENT)
AEATR_EVENT_SHIFT;
- int mstr_id = (gd-arbiter_event_attributes AEATR_MSTR_ID)
+ int mstr_id = (gd-arch.arbiter_event_attributes AEATR_MSTR_ID)
AEATR_MSTR_ID_SHIFT;
- int tbst = (gd-arbiter_event_attributes AEATR_TBST)
+ int tbst = (gd-arch.arbiter_event_attributes AEATR_TBST)
AEATR_TBST_SHIFT;
- int tsize = (gd-arbiter_event_attributes AEATR_TSIZE)
+ int tsize = (gd-arch.arbiter_event_attributes AEATR_TSIZE)
AEATR_TSIZE_SHIFT;
- int ttype = (gd-arbiter_event_attributes AEATR_TTYPE)
+ int ttype = (gd-arch.arbiter_event_attributes AEATR_TTYPE)
AEATR_TTYPE_SHIFT;
- if (!force !gd-arbiter_event_address)
+ if (!force !gd-arch.arbiter_event_address)
return 0;
puts(Arbiter Event Status:\n);
- printf( Event Address: 0x%08lX\n, gd-arbiter_event_address);
+ printf( Event Address: 0x%08lX\n,
+ gd-arch.arbiter_event_address);
printf( Event Type:0x%1x = %s\n, etype, event[etype]);
printf( Master ID: 0x%02x = %s\n, mstr_id, master[mstr_id]);
printf( Transfer Size: 0x%1x = %d bytes\n, (tbst3) | tsize,
tbst ? (tsize ? tsize : 8) : 16 + 8 * tsize);
printf( Transfer Type: 0x%02x = %s\n, ttype, transfer[ttype]);
- return gd-arbiter_event_address;
+ return gd-arch.arbiter_event_address;
}
#elif defined(CONFIG_DISPLAY_AER_BRIEF)
static int print_83xx_arb_event(int force)
{
- if (!force !gd-arbiter_event_address)
+ if (!force !gd-arch.arbiter_event_address)
return 0;
printf(Arbiter Event Status: AEATR=0x%08lX, AEADR=0x%08lX\n,
- gd-arbiter_event_attributes, gd-arbiter_event_address);
+ gd-arch.arbiter_event_attributes,
+ gd-arch.arbiter_event_address);
- return gd-arbiter_event_address;
+ return gd-arch.arbiter_event_address;
}
#endif /* CONFIG_DISPLAY_AER_ */
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index 136b918..b7534cd 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -108,6 +108,10 @@ struct arch_global_data {
unsigned long flb_clk;
#endif
unsigned long reset_status; /* reset status register at boot */
+#if defined(CONFIG_MPC83xx)
+ unsigned long arbiter_event_attributes;
+ unsigned long arbiter_event_address;
+#endif
};
/*
@@ -131,10 +135,6 @@ typedefstruct global_data {
u32 sdhc_clk;
#endif
phys_size_t ram_size; /* RAM size */
-#if defined(CONFIG_MPC83xx)
- unsigned long arbiter_event_attributes;
- unsigned long arbiter_event_address;
-#endif
unsigned long env_addr; /* Address of Environment struct
*/
unsigned long env_valid; /* Checksum of Environment valid?
*/
unsigned long have_console; /* serial_init() was called
*/
--
1.7.7.3
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[U-Boot] [PATCH 28/57] ppc: Move dp_alloc_base, dp_alloc_top to arch_global_data
Move these fields into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/cpu/mpc8260/commproc.c| 19 ++-
arch/powerpc/cpu/mpc85xx/commproc.c| 19 ++-
arch/powerpc/cpu/mpc8xx/commproc.c | 20 ++--
arch/powerpc/include/asm/global_data.h |8
examples/standalone/mem_to_mem_idma2intr.c |4 ++--
5 files changed, 36 insertions(+), 34 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8260/commproc.c
b/arch/powerpc/cpu/mpc8260/commproc.c
index e5bfed1..22cef3e 100644
--- a/arch/powerpc/cpu/mpc8260/commproc.c
+++ b/arch/powerpc/cpu/mpc8260/commproc.c
@@ -30,8 +30,8 @@ m8260_cpm_reset(void)
/* Reclaim the DP memory for our use.
*/
- gd-dp_alloc_base = CPM_DATAONLY_BASE;
- gd-dp_alloc_top = gd-dp_alloc_base + CPM_DATAONLY_SIZE;
+ gd-arch.dp_alloc_base = CPM_DATAONLY_BASE;
+ gd-arch.dp_alloc_top = gd-arch.dp_alloc_base + CPM_DATAONLY_SIZE;
/*
* Reset CPM
@@ -60,21 +60,22 @@ m8260_cpm_dpalloc(uint size, uint align)
uintsavebase;
align_mask = align - 1;
- savebase = gd-dp_alloc_base;
+ savebase = gd-arch.dp_alloc_base;
- if ((off = (gd-dp_alloc_base align_mask)) != 0)
- gd-dp_alloc_base += (align - off);
+ off = gd-arch.dp_alloc_base align_mask;
+ if (off != 0)
+ gd-arch.dp_alloc_base += (align - off);
if ((off = size align_mask) != 0)
size += align - off;
- if ((gd-dp_alloc_base + size) = gd-dp_alloc_top) {
- gd-dp_alloc_base = savebase;
+ if ((gd-arch.dp_alloc_base + size) = gd-arch.dp_alloc_top) {
+ gd-arch.dp_alloc_base = savebase;
panic(m8260_cpm_dpalloc: ran out of dual port ram!);
}
- retloc = gd-dp_alloc_base;
- gd-dp_alloc_base += size;
+ retloc = gd-arch.dp_alloc_base;
+ gd-arch.dp_alloc_base += size;
memset((void *)immr-im_dprambase[retloc], 0, size);
diff --git a/arch/powerpc/cpu/mpc85xx/commproc.c
b/arch/powerpc/cpu/mpc85xx/commproc.c
index 7f10476..37e7062 100644
--- a/arch/powerpc/cpu/mpc85xx/commproc.c
+++ b/arch/powerpc/cpu/mpc85xx/commproc.c
@@ -43,8 +43,8 @@ m8560_cpm_reset(void)
/* Reclaim the DP memory for our use.
*/
- gd-dp_alloc_base = CPM_DATAONLY_BASE;
- gd-dp_alloc_top = gd-dp_alloc_base + CPM_DATAONLY_SIZE;
+ gd-arch.dp_alloc_base = CPM_DATAONLY_BASE;
+ gd-arch.dp_alloc_top = gd-arch.dp_alloc_base + CPM_DATAONLY_SIZE;
/*
* Reset CPM
@@ -69,21 +69,22 @@ m8560_cpm_dpalloc(uint size, uint align)
uintsavebase;
align_mask = align - 1;
- savebase = gd-dp_alloc_base;
+ savebase = gd-arch.dp_alloc_base;
- if ((off = (gd-dp_alloc_base align_mask)) != 0)
- gd-dp_alloc_base += (align - off);
+ off = gd-arch.dp_alloc_base align_mask;
+ if (off != 0)
+ gd-arch.dp_alloc_base += (align - off);
if ((off = size align_mask) != 0)
size += align - off;
- if ((gd-dp_alloc_base + size) = gd-dp_alloc_top) {
- gd-dp_alloc_base = savebase;
+ if ((gd-arch.dp_alloc_base + size) = gd-arch.dp_alloc_top) {
+ gd-arch.dp_alloc_base = savebase;
panic(m8560_cpm_dpalloc: ran out of dual port ram!);
}
- retloc = gd-dp_alloc_base;
- gd-dp_alloc_base += size;
+ retloc = gd-arch.dp_alloc_base;
+ gd-arch.dp_alloc_base += size;
memset((void *)(cpm-im_dprambase[retloc]), 0, size);
diff --git a/arch/powerpc/cpu/mpc8xx/commproc.c
b/arch/powerpc/cpu/mpc8xx/commproc.c
index 5fe01ff..a364782 100644
--- a/arch/powerpc/cpu/mpc8xx/commproc.c
+++ b/arch/powerpc/cpu/mpc8xx/commproc.c
@@ -31,8 +31,8 @@ DECLARE_GLOBAL_DATA_PTR;
int dpram_init (void)
{
/* Reclaim the DP memory for our use. */
- gd-dp_alloc_base = CPM_DATAONLY_BASE;
- gd-dp_alloc_top = CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE;
+ gd-arch.dp_alloc_base = CPM_DATAONLY_BASE;
+ gd-arch.dp_alloc_top = CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE;
return (0);
}
@@ -43,19 +43,19 @@ int dpram_init (void)
*/
uint dpram_alloc (uint size)
{
- uint addr = gd-dp_alloc_base;
+ uint addr = gd-arch.dp_alloc_base;
- if ((gd-dp_alloc_base + size) = gd-dp_alloc_top)
+ if ((gd-arch.dp_alloc_base + size) = gd-arch.dp_alloc_top)
return (CPM_DP_NOSPACE);
- gd-dp_alloc_base += size;
+ gd-arch.dp_alloc_base += size;
return addr;
}
uint dpram_base (void)
{
- return gd-dp_alloc_base;
+ return gd-arch.dp_alloc_base;
}
/* Allocate some memory from the dual ported ram. We may want to
@@ -66,12 +66,12 @@ uint dpram_alloc_align (uint size, uint align)
{
uint addr, mask = align - 1;
- addr
[U-Boot] [PATCH 31/57] ppc: Remove console_addr from global data
This does not appear to be used, so punt it.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/include/asm/global_data.h |6 --
1 files changed, 0 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index b9037c4..6f88b76 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -151,12 +151,6 @@ typedefstruct global_data {
#ifdef CONFIG_PRE_CONSOLE_BUFFER
unsigned long precon_buf_idx; /* Pre-Console buffer index */
#endif
-#if defined(CONFIG_A3000) || \
-defined(CONFIG_HIDDEN_DRAGON) || \
-defined(CONFIG_MUSENKI)|| \
-defined(CONFIG_SANDPOINT)
- void * console_addr;
-#endif
unsigned long relocaddr; /* Start address of U-Boot in RAM */
#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
unsigned long fb_base;/* Base address of framebuffer memory
*/
--
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[U-Boot] [PATCH 53/57] powerpc: Use generic global_data
Move powerpc over to use generic global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/include/asm/global_data.h | 47 +---
1 files changed, 1 insertions(+), 46 deletions(-)
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index 9bf18fb..d5db854 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -136,52 +136,7 @@ struct arch_global_data {
#endif
};
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-
-typedefstruct global_data {
- bd_t*bd;
- unsigned long flags;
- unsigned intbaudrate;
- unsigned long cpu_clk;/* CPU clock in Hz! */
- unsigned long bus_clk;
- /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
- unsigned long pci_clk;
- unsigned long mem_clk;
- phys_size_t ram_size; /* RAM size */
- unsigned long env_addr; /* Address of Environment struct
*/
- unsigned long env_valid; /* Checksum of Environment valid?
*/
- unsigned long have_console; /* serial_init() was called
*/
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- unsigned long relocaddr; /* Start address of U-Boot in RAM */
-#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
- unsigned long fb_base;/* Base address of framebuffer memory
*/
-#endif
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
- unsigned long post_log_word; /* Record POST activities */
- unsigned long post_log_res; /* success of POST test */
- unsigned long post_init_f_time; /* When post_init_f started */
-#endif
-#ifdef CONFIG_BOARD_TYPES
- unsigned long board_type;
-#endif
-#ifdef CONFIG_MODEM_SUPPORT
- unsigned long do_mdm_init;
- unsigned long be_quiet;
-#endif
- void**jt; /* jump table */
- charenv_buf[32];/* buffer for getenv() before reloc. */
- struct arch_global_data arch; /* architecture-specific data */
-} gd_t;
-
-#include asm-generic/global_data_flags.h
+#include asm-generic/global_data.h
#if 1
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm (r2)
--
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[U-Boot] [PATCH 55/57] sh: Use generic global_data
Move sh over to use generic global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/sh/include/asm/global_data.h | 20 +---
1 files changed, 1 insertions(+), 19 deletions(-)
diff --git a/arch/sh/include/asm/global_data.h
b/arch/sh/include/asm/global_data.h
index db85d4d..0360230 100644
--- a/arch/sh/include/asm/global_data.h
+++ b/arch/sh/include/asm/global_data.h
@@ -31,25 +31,7 @@
struct arch_global_data {
};
-typedefstruct global_data
-{
- bd_t*bd;
- unsigned long flags;
- unsigned intbaudrate;
- unsigned long cpu_clk;/* CPU clock in Hz! */
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- phys_size_t ram_size; /* RAM size */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid */
- void**jt; /* Standalone app jump table */
- charenv_buf[32];/* buffer for getenv() before reloc. */
- struct arch_global_data arch; /* architecture-specific data */
-} gd_t;
-
-#include asm-generic/global_data_flags.h
+#include asm-generic/global_data.h
#define DECLARE_GLOBAL_DATA_PTRregister gd_t *gd asm (r13)
--
1.7.7.3
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[U-Boot] [PATCH 35/57] ppc: arm: Move sdhc_clk into arch_global_data
This is used by both powerpc and arm, but I think it still qualifies as
architecture-specific.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/cpu/arm1136/mx35/generic.c|6 +++---
arch/arm/cpu/arm926ejs/mx25/generic.c |4 ++--
arch/arm/imx-common/speed.c| 16
arch/arm/include/asm/global_data.h |6 +++---
arch/powerpc/cpu/mpc83xx/speed.c |5 +++--
arch/powerpc/cpu/mpc85xx/speed.c |4 ++--
arch/powerpc/include/asm/global_data.h |6 +++---
drivers/mmc/fsl_esdhc.c|6 +++---
8 files changed, 27 insertions(+), 26 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx35/generic.c
b/arch/arm/cpu/arm1136/mx35/generic.c
index 41e9639..9fb87c3 100644
--- a/arch/arm/cpu/arm1136/mx35/generic.c
+++ b/arch/arm/cpu/arm1136/mx35/generic.c
@@ -477,11 +477,11 @@ int get_clocks(void)
{
#ifdef CONFIG_FSL_ESDHC
#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
- gd-sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+ gd-arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
- gd-sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ gd-arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
#else
- gd-sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
+ gd-arch.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
#endif
#endif
return 0;
diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c
b/arch/arm/cpu/arm926ejs/mx25/generic.c
index b991418..679273b 100644
--- a/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -229,9 +229,9 @@ int get_clocks(void)
{
#ifdef CONFIG_FSL_ESDHC
#if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE
- gd-sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+ gd-arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#else
- gd-sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
+ gd-arch.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
#endif
#endif
return 0;
diff --git a/arch/arm/imx-common/speed.c b/arch/arm/imx-common/speed.c
index fbf4de3..638ee1a 100644
--- a/arch/arm/imx-common/speed.c
+++ b/arch/arm/imx-common/speed.c
@@ -37,23 +37,23 @@ int get_clocks(void)
#ifdef CONFIG_FSL_ESDHC
#ifdef CONFIG_FSL_USDHC
#if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR
- gd-sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+ gd-arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR
- gd-sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ gd-arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC4_BASE_ADDR
- gd-sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+ gd-arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
#else
- gd-sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ gd-arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
#endif
#else
#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
- gd-sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+ gd-arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
- gd-sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ gd-arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC4_BASE_ADDR
- gd-sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+ gd-arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
#else
- gd-sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ gd-arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
#endif
#endif
#endif
diff --git a/arch/arm/include/asm/global_data.h
b/arch/arm/include/asm/global_data.h
index 0d1ebfd..2f85b91 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -26,6 +26,9 @@
/* Architecture-specific global data */
struct arch_global_data {
+#if defined(CONFIG_FSL_ESDHC)
+ u32 sdhc_clk;
+#endif
#ifdef CONFIG_AT91FAMILY
/* static data needed by at91's clock.c */
unsigned long cpu_clk_rate_hz;
@@ -68,9 +71,6 @@ typedef struct global_data {
unsigned long env_addr; /* Address of Environment struct */
unsigned long env_valid; /* Checksum of Environment valid? */
unsigned long fb_base;/* base address of frame buffer */
-#ifdef CONFIG_FSL_ESDHC
- unsigned long sdhc_clk;
-#endif
unsigned long relocaddr; /* Start address of U-Boot in RAM */
phys_size_t ram_size; /* RAM size */
unsigned long mon_len;/* monitor len */
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index ba8b285..6be0e3a 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -478,7 +478,7 @@ int get_clocks(void)
gd-arch.tdm_clk = tdm_clk;
#endif
#if defined(CONFIG_FSL_ESDHC)
- gd-sdhc_clk = sdhc_clk;
+ gd-arch.sdhc_clk = sdhc_clk;
#endif
gd-arch.core_clk = core_clk;
gd-arch.i2c1_clk = i2c1_clk;
@@ -570,7 +570,8 @@ static int
[U-Boot] [PATCH 48/57] microblaze: Use generic global_data
Move microblaze over to use generic global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/microblaze/include/asm/global_data.h | 27 +--
1 files changed, 1 insertions(+), 26 deletions(-)
diff --git a/arch/microblaze/include/asm/global_data.h
b/arch/microblaze/include/asm/global_data.h
index 025131c..89dcef7 100644
--- a/arch/microblaze/include/asm/global_data.h
+++ b/arch/microblaze/include/asm/global_data.h
@@ -29,32 +29,7 @@
struct arch_global_data {
};
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-
-typedefstruct global_data {
- bd_t*bd;
- unsigned long flags;
- unsigned intbaudrate;
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- unsigned long env_addr; /* Address of Environment struct */
- const void *fdt_blob; /* Our device tree, NULL if none */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long fb_base;/* base address of frame buffer */
- void**jt; /* jump table */
- charenv_buf[32];/* buffer for getenv() before reloc. */
- struct arch_global_data arch; /* architecture-specific data */
-} gd_t;
-
-#include asm-generic/global_data_flags.h
+#include asm-generic/global_data.h
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm (r31)
--
1.7.7.3
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[U-Boot] [PATCH 34/57] ppc: Move kbd_status to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/include/asm/global_data.h |6 +++---
board/lwmon/lwmon.c| 10 +-
board/lwmon5/kbd.c | 10 +-
3 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index b138e64..ea67537 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -128,6 +128,9 @@ struct arch_global_data {
#if defined(CONFIG_WD_MAX_RATE)
unsigned long long wdt_last;/* trace watch-dog triggering rate */
#endif
+#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
+ unsigned long kbd_status;
+#endif
};
/*
@@ -173,9 +176,6 @@ typedef struct global_data {
unsigned long do_mdm_init;
unsigned long be_quiet;
#endif
-#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
- unsigned long kbd_status;
-#endif
void**jt; /* jump table */
charenv_buf[32];/* buffer for getenv() before reloc. */
struct arch_global_data arch; /* architecture-specific data */
diff --git a/board/lwmon/lwmon.c b/board/lwmon/lwmon.c
index b5e524b..34c6675 100644
--- a/board/lwmon/lwmon.c
+++ b/board/lwmon/lwmon.c
@@ -482,7 +482,7 @@ static void kbd_init (void)
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
- gd-kbd_status = 0;
+ gd-arch.kbd_status = 0;
/* Forced by PIC. Delays = 175us loose */
udelay(1000);
@@ -496,7 +496,7 @@ static void kbd_init (void)
/* clear irrelevant bits. Recommended by Martin Rajek, LWN */
errcd = ~(KEYBD_STATUS_H_RESET|KEYBD_STATUS_BROWNOUT);
if (errcd) {
- gd-kbd_status |= errcd 8;
+ gd-arch.kbd_status |= errcd 8;
}
/* Reset error code and verify */
val = KEYBD_CMD_RESET_ERRORS;
@@ -509,7 +509,7 @@ static void kbd_init (void)
val = KEYBD_STATUS_MASK; /* clear unused bits */
if (val) { /* permanent error, report it */
- gd-kbd_status |= val;
+ gd-arch.kbd_status |= val;
return;
}
@@ -568,8 +568,8 @@ int misc_init_r (void)
{
uchar kbd_data[KEYBD_DATALEN];
char keybd_env[2 * KEYBD_DATALEN + 1];
- uchar kbd_init_status = gd-kbd_status 8;
- uchar kbd_status = gd-kbd_status;
+ uchar kbd_init_status = gd-arch.kbd_status 8;
+ uchar kbd_status = gd-arch.kbd_status;
uchar val;
char *str;
int i;
diff --git a/board/lwmon5/kbd.c b/board/lwmon5/kbd.c
index 5231c7a..b66f681 100644
--- a/board/lwmon5/kbd.c
+++ b/board/lwmon5/kbd.c
@@ -113,7 +113,7 @@ static void kbd_init (void)
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
- gd-kbd_status = 0;
+ gd-arch.kbd_status = 0;
/* Forced by PIC. Delays = 175us loose */
udelay(1000);
@@ -127,7 +127,7 @@ static void kbd_init (void)
/* clear irrelevant bits. Recommended by Martin Rajek, LWN */
errcd = ~(KEYBD_STATUS_H_RESET|KEYBD_STATUS_BROWNOUT);
if (errcd) {
- gd-kbd_status |= errcd 8;
+ gd-arch.kbd_status |= errcd 8;
}
/* Reset error code and verify */
val = KEYBD_CMD_RESET_ERRORS;
@@ -140,7 +140,7 @@ static void kbd_init (void)
val = KEYBD_STATUS_MASK; /* clear unused bits */
if (val) { /* permanent error, report it */
- gd-kbd_status |= val;
+ gd-arch.kbd_status |= val;
return;
}
@@ -216,8 +216,8 @@ int misc_init_r_kbd (void)
{
uchar kbd_data[KEYBD_DATALEN];
char keybd_env[2 * KEYBD_DATALEN + 1];
- uchar kbd_init_status = gd-kbd_status 8;
- uchar kbd_status = gd-kbd_status;
+ uchar kbd_init_status = gd-arch.kbd_status 8;
+ uchar kbd_status = gd-arch.kbd_status;
uchar val;
ushort data, inv_data;
char *str;
--
1.7.7.3
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[U-Boot] [PATCH 57/57] x86: Use generic global_data
Move x86 over to use generic global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/global_data.h | 32 +++-
1 files changed, 3 insertions(+), 29 deletions(-)
diff --git a/arch/x86/include/asm/global_data.h
b/arch/x86/include/asm/global_data.h
index d2eb00a..f0875f8 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -40,35 +40,11 @@ struct arch_global_data {
unsigned long gdt_addr; /* Location of GDT */
};
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-
-typedefstruct global_data {
- bd_t*bd;
- unsigned long flags;
- unsigned intbaudrate;
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
#endif
- unsigned long reloc_off; /* Relocation Offset */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long cpu_clk;/* CPU clock in Hz! */
- unsigned long bus_clk;
- unsigned long relocaddr; /* Start address of U-Boot in RAM */
- unsigned long start_addr_sp; /* start_addr_stackpointer */
- phys_size_t ram_size; /* RAM size */
- void**jt; /* jump table */
- charenv_buf[32];/* buffer for getenv() before reloc. */
- struct arch_global_data arch; /* architecture-specific data */
-} gd_t;
+#include asm-generic/global_data.h
+
+#ifndef __ASSEMBLY__
static inline gd_t *get_fs_gd_ptr(void)
{
gd_t *gd_ptr;
@@ -82,8 +58,6 @@ static inline gd_t *get_fs_gd_ptr(void)
#endif
-#include asm-generic/global_data_flags.h
-
#define DECLARE_GLOBAL_DATA_PTR
#endif /* __ASM_GBL_DATA_H */
--
1.7.7.3
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[U-Boot] [PATCH 50/57] nds32: Use generic global_data
Move nds32 over to use generic global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/nds32/include/asm/global_data.h | 32 +---
1 files changed, 1 insertions(+), 31 deletions(-)
diff --git a/arch/nds32/include/asm/global_data.h
b/arch/nds32/include/asm/global_data.h
index e693b01..4927d52 100644
--- a/arch/nds32/include/asm/global_data.h
+++ b/arch/nds32/include/asm/global_data.h
@@ -38,37 +38,7 @@
struct arch_global_data {
};
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-
-typedefstruct global_data {
- bd_t*bd;
- unsigned long flags;
- unsigned intbaudrate;
- unsigned long have_console; /* serial_init() was called */
-
- unsigned long reloc_off; /* Relocation Offset */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long fb_base;/* base address of frame buffer */
-
- unsigned long relocaddr; /* Start address of U-Boot in RAM */
- phys_size_t ram_size; /* RAM size */
- unsigned long mon_len;/* monitor len */
- unsigned long irq_sp; /* irq stack pointer */
- unsigned long start_addr_sp; /* start_addr_stackpointer */
-
- void**jt; /* jump table */
- charenv_buf[32];/* buffer for getenv() before reloc. */
- struct arch_global_data arch; /* architecture-specific data */
-} gd_t;
-
-#include asm-generic/global_data_flags.h
+#include asm-generic/global_data.h
#ifdef CONFIG_GLOBAL_DATA_NOT_REG10
extern volatile gd_t g_gd;
--
1.7.7.3
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[U-Boot] [PATCH 51/57] nios2: Use generic global_data
Move nios2 over to use generic global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/nios2/include/asm/global_data.h | 24 +---
1 files changed, 1 insertions(+), 23 deletions(-)
diff --git a/arch/nios2/include/asm/global_data.h
b/arch/nios2/include/asm/global_data.h
index cf8597b..39c5700 100644
--- a/arch/nios2/include/asm/global_data.h
+++ b/arch/nios2/include/asm/global_data.h
@@ -27,29 +27,7 @@
struct arch_global_data {
};
-typedefstruct global_data {
- bd_t*bd;
- unsigned long flags;
- unsigned intbaudrate;
- unsigned long cpu_clk;/* CPU clock in Hz! */
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- phys_size_t ram_size; /* RAM size */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid */
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
- unsigned long post_log_word; /* Record POST activities */
- unsigned long post_log_res; /* success of POST test */
- unsigned long post_init_f_time; /* When post_init_f started */
-#endif
- void**jt; /* Standalone app jump table */
- charenv_buf[32];/* buffer for getenv() before reloc. */
- struct arch_global_data arch; /* architecture-specific data */
-} gd_t;
-
-#include asm-generic/global_data_flags.h
+#include asm-generic/global_data.h
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm (gp)
--
1.7.7.3
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[U-Boot] [PATCH 47/57] m68k: Use generic global_data
Move m68k over to use generic global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/m68k/include/asm/global_data.h | 39 +--
1 files changed, 1 insertions(+), 38 deletions(-)
diff --git a/arch/m68k/include/asm/global_data.h
b/arch/m68k/include/asm/global_data.h
index 9f37dcc..3ec298f 100644
--- a/arch/m68k/include/asm/global_data.h
+++ b/arch/m68k/include/asm/global_data.h
@@ -37,44 +37,7 @@ struct arch_global_data {
#endif
};
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-
-typedefstruct global_data {
- bd_t*bd;
- unsigned long flags;
- unsigned intbaudrate;
- unsigned long cpu_clk;/* CPU clock in Hz! */
- unsigned long bus_clk;
-#ifdef CONFIG_PCI
- unsigned long pci_clk;
-#endif
- phys_size_t ram_size; /* RAM size */
- unsigned long reloc_off; /* Relocation Offset */
- unsigned long reset_status; /* reset status register at boot
*/
- unsigned long env_addr; /* Address of Environment struct
*/
- unsigned long env_valid; /* Checksum of Environment valid?
*/
- unsigned long have_console; /* serial_init() was called
*/
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
-#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
- unsigned long fb_base;/* Base addr of framebuffer memory */
-#endif
-#ifdef CONFIG_BOARD_TYPES
- unsigned long board_type;
-#endif
- void**jt; /* Standalone app jump table */
- charenv_buf[32];/* buffer for getenv() before reloc. */
- struct arch_global_data arch; /* architecture-specific data */
-} gd_t;
-
-#include asm-generic/global_data_flags.h
+#include asm-generic/global_data.h
#if 0
extern gd_t *global_data;
--
1.7.7.3
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[U-Boot] [PATCH 43/57] Only use fb_base if we have a display
The ideal of having a frame buffer when there isn't a display is not that useful. Change the bdinfo command to expect this only when we have an lcd or video display. Signed-off-by: Simon Glass s...@chromium.org --- common/cmd_bdinfo.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index 82a3693..6800c4f 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -377,7 +377,9 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_num(reloc off, gd-reloc_off); print_num(irq_sp, gd-irq_sp);/* irq stack pointer */ print_num(sp start , gd-start_addr_sp); +#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) print_num(FB base , gd-fb_base); +#endif /* * TODO: Currently only support for davinci SOC's is added. * Remove this check once all the board implement this. @@ -463,7 +465,9 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_eth(0); printf(ip_addr = %s\n, getenv(ipaddr)); #endif +#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) print_num(FB base , gd-fb_base); +#endif return 0; } -- 1.7.7.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 37/57] m68k: Move CONFIG_EXTRA_CLOCK to arch_global_data
Move inp_clk, vco_clk and flb_clk into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/m68k/cpu/mcf5227x/cpu.c|6 +++---
arch/m68k/cpu/mcf5227x/speed.c | 10 +-
arch/m68k/cpu/mcf5445x/cpu.c| 10 +-
arch/m68k/cpu/mcf5445x/speed.c | 10 +-
arch/m68k/include/asm/global_data.h | 10 +-
arch/m68k/lib/board.c |6 +++---
6 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/arch/m68k/cpu/mcf5227x/cpu.c b/arch/m68k/cpu/mcf5227x/cpu.c
index 3a0ab97..705bd44 100644
--- a/arch/m68k/cpu/mcf5227x/cpu.c
+++ b/arch/m68k/cpu/mcf5227x/cpu.c
@@ -68,10 +68,10 @@ int checkcpu(void)
printf( CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n,
strmhz(buf1, gd-cpu_clk),
strmhz(buf2, gd-bus_clk),
- strmhz(buf3, gd-flb_clk));
+ strmhz(buf3, gd-arch.flb_clk));
printf( INP CLK %s MHz VCO CLK %s MHz\n,
- strmhz(buf1, gd-inp_clk),
- strmhz(buf2, gd-vco_clk));
+ strmhz(buf1, gd-arch.inp_clk),
+ strmhz(buf2, gd-arch.vco_clk));
}
return 0;
diff --git a/arch/m68k/cpu/mcf5227x/speed.c b/arch/m68k/cpu/mcf5227x/speed.c
index c1d5930..98f554a 100644
--- a/arch/m68k/cpu/mcf5227x/speed.c
+++ b/arch/m68k/cpu/mcf5227x/speed.c
@@ -114,24 +114,24 @@ int get_clocks(void)
((in_be32(pll-pcr) 0xFF00) 24) *
CONFIG_SYS_INPUT_CLKSRC;
}
- gd-vco_clk = vco; /* Vco clock */
+ gd-arch.vco_clk = vco; /* Vco clock */
} else if (bootmode == 3) {
/* serial mode */
vco = ((in_be32(pll-pcr) 0xFF00) 24) *
CONFIG_SYS_INPUT_CLKSRC;
- gd-vco_clk = vco; /* Vco clock */
+ gd-arch.vco_clk = vco; /* Vco clock */
}
if ((in_be16(ccm-ccr) CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) {
/* Limp mode */
} else {
- gd-inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */
+ gd-arch.inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */
temp = (in_be32(pll-pcr) PLL_PCR_OUTDIV1_MASK) + 1;
gd-cpu_clk = vco / temp; /* cpu clock */
temp = ((in_be32(pll-pcr) PLL_PCR_OUTDIV2_MASK) 4) + 1;
- gd-flb_clk = vco / temp; /* flexbus clock */
- gd-bus_clk = gd-flb_clk;
+ gd-arch.flb_clk = vco / temp; /* flexbus clock */
+ gd-bus_clk = gd-arch.flb_clk;
}
#ifdef CONFIG_FSL_I2C
diff --git a/arch/m68k/cpu/mcf5445x/cpu.c b/arch/m68k/cpu/mcf5445x/cpu.c
index b612cda..08930f4 100644
--- a/arch/m68k/cpu/mcf5445x/cpu.c
+++ b/arch/m68k/cpu/mcf5445x/cpu.c
@@ -101,16 +101,16 @@ int checkcpu(void)
printf( CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n,
strmhz(buf1, gd-cpu_clk),
strmhz(buf2, gd-bus_clk),
- strmhz(buf3, gd-flb_clk));
+ strmhz(buf3, gd-arch.flb_clk));
#ifdef CONFIG_PCI
printf( PCI CLK %s MHz INP CLK %s MHz VCO CLK %s MHz\n,
strmhz(buf1, gd-pci_clk),
- strmhz(buf2, gd-inp_clk),
- strmhz(buf3, gd-vco_clk));
+ strmhz(buf2, gd-arch.inp_clk),
+ strmhz(buf3, gd-arch.vco_clk));
#else
printf( INP CLK %s MHz VCO CLK %s MHz\n,
- strmhz(buf1, gd-inp_clk),
- strmhz(buf2, gd-vco_clk));
+ strmhz(buf1, gd-arch.inp_clk),
+ strmhz(buf2, gd-arch.vco_clk));
#endif
}
diff --git a/arch/m68k/cpu/mcf5445x/speed.c b/arch/m68k/cpu/mcf5445x/speed.c
index b7dbc65..aa73e1f 100644
--- a/arch/m68k/cpu/mcf5445x/speed.c
+++ b/arch/m68k/cpu/mcf5445x/speed.c
@@ -233,7 +233,7 @@ void setup_5445x_clocks(void)
out_be32(pll-pcr, pcrvalue);
}
- gd-vco_clk = vco; /* Vco clock */
+ gd-arch.vco_clk = vco; /* Vco clock */
} else if (bootmode == 2) {
/* Normal mode */
vco = ((in_be32(pll-pcr) 0xFF00) 24) *
CONFIG_SYS_INPUT_CLKSRC;
@@ -244,17 +244,17 @@ void setup_5445x_clocks(void)
out_be32(pll-pcr, pcrvalue);
vco = ((in_be32(pll-pcr) 0xFF00) 24) *
CONFIG_SYS_INPUT_CLKSRC;
}
- gd-vco_clk = vco; /* Vco clock */
+ gd-arch.vco_clk = vco; /* Vco clock */
} else if (bootmode == 3) {
/* serial mode */
vco = ((in_be32(pll-pcr) 0xFF00) 24) *
CONFIG_SYS_INPUT_CLKSRC;
-
[U-Boot] [PATCH 44/57] arm: Use generic global_data
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/include/asm/global_data.h | 38 +---
1 files changed, 1 insertions(+), 37 deletions(-)
diff --git a/arch/arm/include/asm/global_data.h
b/arch/arm/include/asm/global_data.h
index 2f85b91..8ee0883 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -52,43 +52,7 @@ struct arch_global_data {
#endif
};
-/*
- * The following data structure is placed in some memory which is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-
-typedefstruct global_data {
- bd_t*bd;
- unsigned long flags;
- unsigned intbaudrate;
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long fb_base;/* base address of frame buffer */
- unsigned long relocaddr; /* Start address of U-Boot in RAM */
- phys_size_t ram_size; /* RAM size */
- unsigned long mon_len;/* monitor len */
- unsigned long irq_sp; /* irq stack pointer */
- unsigned long start_addr_sp; /* start_addr_stackpointer */
- unsigned long reloc_off;
- const void *fdt_blob; /* Our device tree, NULL if none */
- void**jt; /* jump table */
- charenv_buf[32];/* buffer for getenv() before reloc. */
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
- unsigned long post_log_word; /* Record POST activities */
- unsigned long post_log_res; /* success of POST test */
- unsigned long post_init_f_time; /* When post_init_f started */
-#endif
- struct arch_global_data arch; /* architecture-specific data */
-} gd_t;
-
-#include asm-generic/global_data_flags.h
+#include asm-generic/global_data.h
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm (r8)
--
1.7.7.3
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[U-Boot] [PATCH 56/57] sparc: Use generic global_data
Move sparc over to use generic global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/sparc/include/asm/global_data.h | 46 +-
1 files changed, 1 insertions(+), 45 deletions(-)
diff --git a/arch/sparc/include/asm/global_data.h
b/arch/sparc/include/asm/global_data.h
index 7c3d2d5..9f019b1 100644
--- a/arch/sparc/include/asm/global_data.h
+++ b/arch/sparc/include/asm/global_data.h
@@ -33,51 +33,7 @@
struct arch_global_data {
};
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
- unsigned int baudrate;
- unsigned long cpu_clk; /* CPU clock in Hz! */
- unsigned long bus_clk;
-
- phys_size_t ram_size; /* RAM size */
- unsigned long reloc_off;/* Relocation Offset */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid;/* Checksum of Environment valid?
*/
- unsigned long have_console; /* serial_init() was called */
-
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
-#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
- unsigned long fb_base; /* Base address of framebuffer memory */
-#endif
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
- unsigned long post_log_word;/* Record POST activities */
- unsigned long post_log_res; /* success of POST test */
- unsigned long post_init_f_time; /* When post_init_f started */
-#endif
-#ifdef CONFIG_BOARD_TYPES
- unsigned long board_type;
-#endif
-#ifdef CONFIG_MODEM_SUPPORT
- unsigned long do_mdm_init;
- unsigned long be_quiet;
-#endif
- void**jt; /* jump table */
- charenv_buf[32];/* buffer for getenv() before reloc. */
- struct arch_global_data arch; /* architecture-specific data */
-} gd_t;
-
-#include asm-generic/global_data_flags.h
+#include asm-generic/global_data.h
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm (%g7)
--
1.7.7.3
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[U-Boot] [PATCH 49/57] mips: Use generic global_data
Move mips over to use generic global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/mips/include/asm/global_data.h | 34 +-
1 files changed, 1 insertions(+), 33 deletions(-)
diff --git a/arch/mips/include/asm/global_data.h
b/arch/mips/include/asm/global_data.h
index fdd099e..b39737f 100644
--- a/arch/mips/include/asm/global_data.h
+++ b/arch/mips/include/asm/global_data.h
@@ -35,39 +35,7 @@ struct arch_global_data {
#endif
};
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-
-typedefstruct global_data {
- bd_t*bd;
- unsigned long flags;
- unsigned long cpu_clk;/* CPU core clock */
- unsigned long sys_clk;/* System bus clock */
- unsigned long mem_clk;/* Memory bus clock */
- /* static data needed by most of timer.c */
- unsigned long tbl;
- unsigned long lastinc;
-#endif
- unsigned intbaudrate;
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- phys_size_t ram_size; /* RAM size */
- unsigned long reloc_off; /* Relocation Offset */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- void**jt; /* jump table */
- charenv_buf[32];/* buffer for getenv() before reloc. */
- struct arch_global_data arch; /* architecture-specific data */
-} gd_t;
-
-#include asm-generic/global_data_flags.h
+#include asm-generic/global_data.h
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm (k0)
--
1.7.7.3
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[U-Boot] [PATCH 22/57] ppc: Move used_tlb_cams to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/powerpc/cpu/mpc85xx/tlb.c |8
arch/powerpc/include/asm/global_data.h |6 +++---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index a548dec..bee8fc5 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -99,7 +99,7 @@ static inline void use_tlb_cam(u8 idx)
int i = idx / 32;
int bit = idx % 32;
- gd-used_tlb_cams[i] |= (1 bit);
+ gd-arch.used_tlb_cams[i] |= (1 bit);
}
static inline void free_tlb_cam(u8 idx)
@@ -107,7 +107,7 @@ static inline void free_tlb_cam(u8 idx)
int i = idx / 32;
int bit = idx % 32;
- gd-used_tlb_cams[i] = ~(1 bit);
+ gd-arch.used_tlb_cams[i] = ~(1 bit);
}
void init_used_tlb_cams(void)
@@ -116,7 +116,7 @@ void init_used_tlb_cams(void)
unsigned int num_cam = mfspr(SPRN_TLB1CFG) 0xfff;
for (i = 0; i ((CONFIG_SYS_NUM_TLBCAMS+31)/32); i++)
- gd-used_tlb_cams[i] = 0;
+ gd-arch.used_tlb_cams[i] = 0;
/* walk all the entries */
for (i = 0; i num_cam; i++) {
@@ -133,7 +133,7 @@ int find_free_tlbcam(void)
u32 idx;
for (i = 0; i ((CONFIG_SYS_NUM_TLBCAMS+31)/32); i++) {
- idx = ffz(gd-used_tlb_cams[i]);
+ idx = ffz(gd-arch.used_tlb_cams[i]);
if (idx != 32)
break;
diff --git a/arch/powerpc/include/asm/global_data.h
b/arch/powerpc/include/asm/global_data.h
index c7ce7fd..ca36ca3 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -91,6 +91,9 @@ struct arch_global_data {
#if defined(CONFIG_FSL_LAW)
u32 used_laws;
#endif
+#if defined(CONFIG_E500)
+ u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
+#endif
};
/*
@@ -113,9 +116,6 @@ typedef struct global_data {
#if defined(CONFIG_FSL_ESDHC)
u32 sdhc_clk;
#endif
-#if defined(CONFIG_E500)
- u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
-#endif
#if defined(CONFIG_MPC5xxx)
unsigned long ipb_clk;
#endif
--
1.7.7.3
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Re: [U-Boot] pull request for u-boot-tegra/master into ARM/master
Albert, A fix was found and posted awhile back by Simon (195662 on PatchWork - it's assigned to you as delegate). Marek's last comment was 'Just apply this', so I suppose that's his version of an Acked-by. I don't carry that fix in my tree since it's not specifically Tegra-related. I can add it and resend a pull request, or you can apply it to ARM/master and I can rebase on that (though I don't think that'll change my pull request much, if at all). Let me know, Tom On Fri, Nov 16, 2012 at 2:27 PM, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Tom, On Fri, 16 Nov 2012 10:14:46 -0700, Tom Warren twarren.nvi...@gmail.com wrote: Albert, Please pull u-boot-tegra/master into ARM/master. Thanks! ./MAKEALL -a arm completes w/o any new errors. checkpatch is clean, also. I see three boards failing which do build on current u-boot-arm/master: palmld palmtc zipitz2 All have the same error: /home/albert/src/u-boot-arm/common/lcd.c:125: undefined reference to `flush_dcache_range' git bisect run ./MAKEALL zipitz2 traces the problem to commit 9c9e9b0d... lcd: Add support for flushing LCD fb from dcache after update from Simon Glass (already Cc:). Simon, can you look into this? Tom, can you provide a fixed pull request once the issue is fixed? Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 08/57] ixp: Move timestamp to arch_global_data
Dear Simon Glass,
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass s...@chromium.org
Ick, this driver's ugly :)
Acked-by: Marek Vasut ma...@denx.de
Tom, is there any IXP maintainer?
---
arch/arm/cpu/ixp/timer.c |8
arch/arm/include/asm/global_data.h |6 +++---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/ixp/timer.c b/arch/arm/cpu/ixp/timer.c
index 0450b51..663d989 100644
--- a/arch/arm/cpu/ixp/timer.c
+++ b/arch/arm/cpu/ixp/timer.c
@@ -70,14 +70,14 @@ unsigned long long get_ticks(void)
if (readl(IXP425_OSST) IXP425_OSST_TIMER_TS_PEND) {
/* rollover of timestamp timer register */
- gd-timestamp += (0x - gd-arch.lastinc) + now + 1;
+ gd-arch.timestamp += (0x - gd-arch.lastinc) + now + 1;
writel(IXP425_OSST_TIMER_TS_PEND, IXP425_OSST);
} else {
/* move stamp forward with absolut diff ticks */
- gd-timestamp += (now - gd-arch.lastinc);
+ gd-arch.timestamp += (now - gd-arch.lastinc);
}
gd-arch.lastinc = now;
- return gd-timestamp;
+ return gd-arch.timestamp;
}
@@ -86,7 +86,7 @@ void reset_timer_masked(void)
/* capture current timestamp counter */
gd-arch.lastinc = readl(IXP425_OSTS_B);
/* start advancing time stamp from 0 */
- gd-timestamp = 0;
+ gd-arch.timestamp = 0;
}
ulong get_timer_masked(void)
diff --git a/arch/arm/include/asm/global_data.h
b/arch/arm/include/asm/global_data.h index 95e23e1..35d07d0 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -41,6 +41,9 @@ struct arch_global_data {
unsigned long tbl;
unsigned long lastinc;
unsigned long long timer_reset_value;
+#ifdef CONFIG_IXP425
+ unsigned long timestamp;
+#endif
};
/*
@@ -65,9 +68,6 @@ typedef struct global_data {
#ifdef CONFIG_FSL_ESDHC
unsigned long sdhc_clk;
#endif
-#ifdef CONFIG_IXP425
- unsigned long timestamp;
-#endif
unsigned long relocaddr; /* Start address of U-Boot in RAM */
phys_size_t ram_size; /* RAM size */
unsigned long mon_len;/* monitor len */
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2] mx5: Mark lowlevel_init board-specific code
Hi Stefano, On Wednesday, November 7, 2012 3:29:14 PM, Stefano Babic wrote: On 05/11/2012 21:07, Benoît Thébaudeau wrote: The mx5 lowlevel_init.S contains board-specific code based on the reference design. Let's keep it since it avoids creating new lowlevel_init files and it may be used by many boards. But add a config to make it optional in order not to cause issues on boards not following this part of the reference design. Right, and it is correct that this initialisation is not done for all boards. Acked-by: Stefano Babic sba...@denx.de You seem to have forgotten this one in your last couple of application rounds. Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] pull request for u-boot-tegra/master into ARM/master
Hi Tom, On Fri, 16 Nov 2012 14:45:49 -0700, Tom Warren twarren.nvi...@gmail.com wrote: Albert, A fix was found and posted awhile back by Simon (195662 on PatchWork - it's assigned to you as delegate). Marek's last comment was 'Just apply this', so I suppose that's his version of an Acked-by. I don't carry that fix in my tree since it's not specifically Tegra-related. I can add it and resend a pull request, or you can apply it to ARM/master and I can rebase on that (though I don't think that'll change my pull request much, if at all). Let me know, Ideally, I would like the tegra master branch to be reworked with the fix applied so that no commit fails building. Tom Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] pull request for u-boot-tegra/master into ARM/master
Albert, Please pull u-boot-tegra/master into ARM/master. The previously failing pxa boards are fixed with 'pxa: Disable dcache on palmld, palmtc, zipitz2'. The following changes since commit 7a5337732e3e05b2b0de1b592fa031b2c7b4f632: Rajeshwari Shinde (1): EXYNOS5: Enable SPI booting. are available in the git repository at: git://git.denx.de/u-boot-tegra master Allen Martin (1): tegra: add CONSOLE_MUX support to tegra-kbc Mayuresh Kulkarni (1): tegra: Enable display/lcd support on Seaboard Simon Glass (17): tegra: Use const for pinmux_config_pingroup/table() tegra: Add display support to funcmux tegra: fdt: Add pwm binding and node tegra: fdt: Add LCD definitions for Tegra tegra: Add support for PWM tegra: Add LCD driver tegra: Add LCD support to Nvidia boards arm: Add control over cachability of memory regions lcd: Add CONFIG_LCD_ALIGNMENT to select frame buffer alignment lcd: Add support for flushing LCD fb from dcache after update tegra: Align LCD frame buffer to section boundary tegra: Support control of cache settings for LCD tegra: fdt: Add LCD definitions for Seaboard lcd: Add CONFIG_CONSOLE_SCROLL_LINES option to speed console tegra: Remove unnecessary CONFIG_SYS_NAND_BASE tegra: config: seaboard: Move tegra-common-post to correct place pxa: Disable dcache on palmld, palmtc, zipitz2 Stephen Warren (4): ARM: tegra: TrimSlice: add support for USB1 port mmc: tegra: support 4-bit operation too on 8-bit slots ARM: tegra: enable 8-bit SD slots in board files tegra: use generic fs commands in BOOTCOMMAND Wei Ni (1): tegra: Add SOC support for display/lcd README | 16 + arch/arm/cpu/armv7/cache_v7.c | 11 + arch/arm/cpu/armv7/tegra20/Makefile|2 + arch/arm/cpu/armv7/tegra20/display.c | 409 ++ arch/arm/cpu/armv7/tegra20/pwm.c | 101 + arch/arm/cpu/tegra20-common/funcmux.c | 37 ++ arch/arm/cpu/tegra20-common/pinmux.c |4 +- arch/arm/dts/tegra20.dtsi | 105 + arch/arm/include/asm/arch-tegra20/dc.h | 545 arch/arm/include/asm/arch-tegra20/display.h| 152 +++ arch/arm/include/asm/arch-tegra20/pinmux.h |4 +- arch/arm/include/asm/arch-tegra20/pwm.h| 75 arch/arm/include/asm/system.h | 31 ++ arch/arm/lib/cache-cp15.c | 51 ++- board/compal/paz00/paz00.c |5 +- board/compulab/dts/tegra20-trimslice.dts |3 +- board/compulab/trimslice/trimslice.c |8 + board/nvidia/common/board.c| 24 + board/nvidia/dts/tegra20-seaboard.dts | 33 ++ board/nvidia/harmony/harmony.c |5 +- board/nvidia/seaboard/seaboard.c |5 +- common/lcd.c | 89 - common/main.c | 12 +- doc/device-tree-bindings/pwm/tegra20-pwm.txt | 18 + doc/device-tree-bindings/video/displaymode.txt | 42 ++ doc/device-tree-bindings/video/tegra20-dc.txt | 85 drivers/input/tegra-kbc.c | 18 +- drivers/mmc/tegra_mmc.c|7 +- drivers/video/Makefile |1 + drivers/video/tegra.c | 379 include/configs/harmony.h |4 +- include/configs/palmld.h |3 + include/configs/palmtc.h |3 + include/configs/paz00.h|3 + include/configs/seaboard.h | 20 +- include/configs/tec.h |1 - include/configs/tegra-common-post.h| 39 +- include/configs/tegra20-common.h |3 + include/configs/trimslice.h|4 + include/configs/ventana.h |3 + include/configs/whistler.h |3 + include/configs/zipitz2.h |3 + include/fdtdec.h |2 + include/lcd.h | 11 + lib/fdtdec.c |2 + 45 files changed, 2303 insertions(+), 78 deletions(-) create mode 100644 arch/arm/cpu/armv7/tegra20/display.c create mode 100644 arch/arm/cpu/armv7/tegra20/pwm.c create mode 100644 arch/arm/include/asm/arch-tegra20/dc.h create mode 100644 arch/arm/include/asm/arch-tegra20/display.h create mode 100644 arch/arm/include/asm/arch-tegra20/pwm.h create mode 100644 doc/device-tree-bindings/pwm/tegra20-pwm.txt create mode 100644 doc/device-tree-bindings/video/displaymode.txt create mode 100644 doc/device-tree-bindings/video/tegra20-dc.txt create mode 100644 drivers/video/tegra.c
Re: [U-Boot] [PATCH v2] nand: Add torture feature
On 11/16/2012 01:20:54 PM, Benoît Thébaudeau wrote:
+int nand_torture(nand_info_t *nand, loff_t offset)
+{
+ u_char patterns[] = {0xa5, 0x5a, 0x00};
+ struct erase_info instr = {
+ .mtd = nand,
+ .addr = offset,
+ .len = nand-erasesize,
+ };
+ size_t retlen;
+ int err, ret = -1, i, patt_count;
+ u_char *buf;
+
+ if ((offset (nand-erasesize - 1)) != 0) {
+ puts(Attempt to torture a block at a non block-aligned
+ offset\n);
+ return -EINVAL;
+ }
+
+ if (offset + nand-erasesize nand-size) {
+ puts(Attempt to torture a block outside the flash
area\n);
+ return -EINVAL;
+ }
I won't hold up the patch for this, since I think it works out OK due
to type promotion rules (and in any case there are easier ways for a
hostile user to do bad things in U-Boot) with nand-size being
uint64_t, but loff_t is signed. An explicit cast would be nice.
+ patt_count = ARRAY_SIZE(patterns);
+
+ buf = malloc(nand-erasesize);
+ if (buf == NULL) {
+ puts(Out of memory for erase block buffer\n);
+ return -ENOMEM;
+ }
+
+ for (i = 0; i patt_count; i++) {
+ err = nand-erase(nand, instr);
+ if (err) {
+ printf(%s: erase() failed for block at 0x%llx:
%d\n,
+ nand-name, instr.addr, err);
+ goto out;
+ }
+
+ /* Make sure the block contains only 0xff bytes */
+ err = nand-read(nand, offset, nand-erasesize,
retlen, buf);
+ if ((err err != -EUCLEAN) || retlen !=
nand-erasesize) {
+ printf(%s: read() failed for block at 0x%llx:
%d\n,
+ nand-name, instr.addr, err);
+ goto out;
+ }
+
+ err = check_pattern(buf, 0xff, nand-erasesize);
+ if (!err) {
+ printf(Erased block at 0x%llx, but a non-0xff
byte
+ was found\n, offset);
+ ret = -EIO;
+ goto out;
+ }
Strings should not be wrapped (to improve greppability of errors), even
if it would put the line over 80 columns. I'll fix this when applying.
diff --git u-boot-nand-flash-9c60e75.orig/include/nand.h
u-boot-nand-flash-9c60e75/include/nand.h
index bbe28b2..c4530b0 100644
--- u-boot-nand-flash-9c60e75.orig/include/nand.h
+++ u-boot-nand-flash-9c60e75/include/nand.h
@@ -139,6 +139,9 @@ int nand_read_skip_bad(nand_info_t *nand, loff_t
offset, size_t *length,
int nand_write_skip_bad(nand_info_t *nand, loff_t offset, size_t
*length,
u_char *buffer, int flags);
int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t
*opts);
+#ifdef CONFIG_CMD_NAND_TORTURE
+int nand_torture(nand_info_t *nand, loff_t offset);
+#endif
Prototypes should not be ifdeffed. Will fix when applying.
Applied to u-boot-nand-flash.
-Scott
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Re: [U-Boot] [PATCH v2 13/13] mxc nand: Add support for i.MX5
On 11/16/2012 02:28:16 PM, Benoît Thébaudeau wrote: Also, I've noticed that some of the oobfree fields of the nand_ecclayout structures in mxc_nand.c are slightly different from what can be found in Linux. Any idea about which one is correct (if any)? Unless there's an obvious error such as overlap with ECC or a bad block marker, there isn't really a right answer (except to the extent that you're wasting bytes) -- but it's important that everyone agree. So the answer is basically, which compatibility would it hurt more to break? That said, the U-Boot ones make more sense to me in terms of not having strange missing bytes. This field does not even always start at offset 0 when it looks free according to the ECC info. Is this normal? Yes. Bad block markers are at offset zero except on 8-bit 512b-page chips. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 01/57] Add architecture-specific global data
We plan to move architecture-specific data into a separate structure so
that we can make the rest of it common.
As a first step, create struct arch_global_data to hold these fields.
Initially it is empty.
This patch applies to all archs at once. I can split it if this is really
a pain.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/include/asm/global_data.h|6 ++
arch/avr32/include/asm/global_data.h |5 +
arch/blackfin/include/asm/global_data.h |5 +
arch/m68k/include/asm/global_data.h |6 ++
arch/microblaze/include/asm/global_data.h |6 ++
arch/mips/include/asm/global_data.h |5 +
arch/nds32/include/asm/global_data.h |6 ++
arch/nios2/include/asm/global_data.h |5 +
arch/openrisc/include/asm/global_data.h |6 ++
arch/powerpc/include/asm/global_data.h|5 +
arch/sandbox/include/asm/global_data.h|6 ++
arch/sh/include/asm/global_data.h |5 +
arch/sparc/include/asm/global_data.h |5 +
arch/x86/include/asm/global_data.h| 10 --
14 files changed, 79 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/global_data.h
b/arch/arm/include/asm/global_data.h
index 2b9af93..8ca45ca 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -23,6 +23,11 @@
#ifndef__ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
+
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
/*
* The following data structure is placed in some memory which is
* available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
@@ -82,6 +87,7 @@ typedef struct global_data {
unsigned long post_log_res; /* success of POST test */
unsigned long post_init_f_time; /* When post_init_f started */
#endif
+ struct arch_global_data arch; /* architecture-specific data */
} gd_t;
#include asm-generic/global_data_flags.h
diff --git a/arch/avr32/include/asm/global_data.h
b/arch/avr32/include/asm/global_data.h
index bf661e2..236a9da 100644
--- a/arch/avr32/include/asm/global_data.h
+++ b/arch/avr32/include/asm/global_data.h
@@ -22,6 +22,10 @@
#ifndef __ASM_GLOBAL_DATA_H__
#define __ASM_GLOBAL_DATA_H__
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
/*
* The following data structure is placed in some memory wich is
* available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
@@ -48,6 +52,7 @@ typedef struct global_data {
#endif
void**jt; /* jump table */
charenv_buf[32];/* buffer for getenv() before reloc. */
+ struct arch_global_data arch; /* architecture-specific data */
} gd_t;
#include asm-generic/global_data_flags.h
diff --git a/arch/blackfin/include/asm/global_data.h
b/arch/blackfin/include/asm/global_data.h
index d91e5a4..109069f 100644
--- a/arch/blackfin/include/asm/global_data.h
+++ b/arch/blackfin/include/asm/global_data.h
@@ -30,6 +30,10 @@
#include asm/u-boot.h
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
/*
* The following data structure is placed in some memory wich is
* available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
@@ -57,6 +61,7 @@ typedef struct global_data {
void**jt; /* jump table */
charenv_buf[32];/* buffer for getenv() before reloc. */
+ struct arch_global_data arch; /* architecture-specific data */
} gd_t;
#include asm-generic/global_data_flags.h
diff --git a/arch/m68k/include/asm/global_data.h
b/arch/m68k/include/asm/global_data.h
index 0cdb11c..fd8aacb 100644
--- a/arch/m68k/include/asm/global_data.h
+++ b/arch/m68k/include/asm/global_data.h
@@ -23,6 +23,11 @@
#ifndef__ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
+
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
/*
* The following data structure is placed in some memory wich is
* available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
@@ -66,6 +71,7 @@ typedef struct global_data {
#endif
void**jt; /* Standalone app jump table */
charenv_buf[32];/* buffer for getenv() before reloc. */
+ struct arch_global_data arch; /* architecture-specific data */
} gd_t;
#include asm-generic/global_data_flags.h
diff --git a/arch/microblaze/include/asm/global_data.h
b/arch/microblaze/include/asm/global_data.h
index 2111c7c..025131c 100644
--- a/arch/microblaze/include/asm/global_data.h
+++ b/arch/microblaze/include/asm/global_data.h
@@ -24,6 +24,11 @@
#ifndef__ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
+
+/* Architecture-specific global data */
+struct arch_global_data {
+};
+
/*
* The following data structure is placed in some memory wich is
* available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
@@ -46,6
Re: [U-Boot] pull request for u-boot-tegra/master into ARM/master
Hi Tom, On Fri, 16 Nov 2012 16:42:49 -0700, Tom Warren twarren.nvi...@gmail.com wrote: Albert, Please pull u-boot-tegra/master into ARM/master. The previously failing pxa boards are fixed with 'pxa: Disable dcache on palmld, palmtc, zipitz2'. Sorry to be a nuisance, but what I meant that I wanted all commits in the tegra pull req to succeed building if possible; with the added disable cache commit, the branch succeeds, but not all of its commits, which can hamper git bisects. Can the dcache disable patch actually appear before Simon's LCD commit? Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 13/13] mxc nand: Add support for i.MX5
Hi Scott, On Saturday, November 17, 2012 1:01:03 AM, Scott Wood wrote: On 11/16/2012 02:28:16 PM, Benoît Thébaudeau wrote: Also, I've noticed that some of the oobfree fields of the nand_ecclayout structures in mxc_nand.c are slightly different from what can be found in Linux. Any idea about which one is correct (if any)? Unless there's an obvious error such as overlap with ECC or a bad block marker, there isn't really a right answer (except to the extent that you're wasting bytes) -- but it's important that everyone agree. So the answer is basically, which compatibility would it hurt more to break? That said, the U-Boot ones make more sense to me in terms of not having strange missing bytes. I've just found this commit, which explains what's going on: http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git;a=commitdiff;h=8c1fd89a85f898384df02217c09c98c2f39b4832 It looks like Linux is correct here because each structure is used for both 8- and 16-bit NFs, which seem to have different locations for bad block markers. This fix is also missing from U-Boot: http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git;a=commitdiff;h=6c49939869c20550512386610ece45aceb65e7f4 It would help to drop some of the pagesize_2k that are weirdly mixed with writesize. Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
