Re: [U-Boot] [PATCH v1 1/3] blackfin: Enable early print via the generic serial API.

[Sonic Zhang]

Hi Mike,

On Mon, May 13, 2013 at 12:42 PM, Mike Frysinger vap...@gentoo.org wrote:
 On Monday 13 May 2013 00:20:15 Sonic Zhang wrote:
 Remove blackfin specific implementation of the generic serial API when
 early print macro is defined.

 In BFIN_BOOT_BYPASS mode, don't call generic serial_puts, because
 early print in bypass mode is running before code binary is relocated
 to the link address.

 the link address of the function doesn't matter.  all Blackfin func calls are
 pcrel based, not absolute address calls.  i specifically crafted all of this
 early serial code so that this does work regardless of the address where the
 code happens to be executing.


When you developed the bfin serial driver, the generic serial API
serial_puts() is implemented in bfin serial driver directly. No such
link address issue.

void serial_putc(const char c)
 {
   uart_putc(UART_BASE, c);
 }

void serial_puts(const char *s)
 {
   while (*s)
   serial_putc(*s++);
 }

While in latest generic serial.c, serial_puts() calls uart_puts()
function in bfin serial via a pointer to the default serial_device
structure, which contains the link address in DRAM, other than a
relative jump.

void serial_puts(const char *s)
{
get_current()-puts(s);
}

This has nothing to do with the patch  blackfin: Correct early serial
mess output in BYPASS boot mode..

07f572c8 _get_current:
 7f572c8:   67 01   [--SP] = RETS;
 7f572ca:   58 a0   R0 = [P3 + 0x4];
 7f572cc:   a6 6f   SP += -0xc; /* (-12) */
 7f572ce:   00 48   CC = !BITTST (R0, 0x0); /* bit  0 */
 7f572d0:   08 18   IF CC JUMP 0x7f572e0 _get_current+0x18;
 7f572d2:   4a e1 f8 07 P2.H = 0x7f8;   /* (2040)
 P2=0x7f8e77c _serial_devices */
 7f572d6:   0a e1 80 e7 P2.L = 0xe780;  /* (-6272)
 P2=0x7f8e780 _serial_current */
 7f572da:   10 91   R0 = [P2];
 7f572dc:   00 0c   CC = R0 == 0x0;
 7f572de:   0b 14   IF !CC JUMP 0x7f572f4 _get_current+0x2c (BP);
 7f572e0:   00 e3 02 02 CALL 0x7f576e4 _default_serial_console;
 7f572e4:   00 0c   CC = R0 == 0x0;
 7f572e6:   07 14   IF !CC JUMP 0x7f572f4 _get_current+0x2c (BP);
 7f572e8:   40 e1 f7 07 R0.H = 0x7f7;   /* (2039)
 R0=0x7f7e764(133687140) */
 7f572ec:   00 e1 cc 03 R0.L = 0x3cc;   /* (972)
 R0=0x7f703cc(133628876) */
 7f572f0:   00 e3 8e 3e CALL 0x7f5f00c _panic;
 7f572f4:   66 6c   SP += 0xc;  /* ( 12) */
 7f572f6:   27 01   RETS = [SP++];
 7f572f8:   10 00   RTS;
...

07f572fc _serial_puts:
 7f572fc:   78 05   [--SP] = (R7:7);
 7f572fe:   67 01   [--SP] = RETS;
 7f57300:   38 30   R7 = R0;
 7f57302:   a6 6f   SP += -0xc; /* (-12) */
 7f57304:   ff e3 e2 ff CALL 0x7f572c8 _get_current;
 7f57308:   10 32   P2 = R0;
 7f5730a:   66 6c   SP += 0xc;  /* ( 12) */
 7f5730c:   27 01   RETS = [SP++];
 7f5730e:   07 30   R0 = R7;
 7f57310:   38 05   (R7:7) = [SP++];
 7f57312:   92 ae   P2 = [P2 + 0x28];
 7f57314:   52 00   JUMP (P2);



Regards,

Sonic

 what doesn't work is if you try to use the early serial console with
 CONFIG_SYS_BFIN_UART (which allows all the serial devices to be selected on
 the fly).  but the header file specifically handles that:
 #ifndef CONFIG_DEBUG_EARLY_SERIAL
 # define CONFIG_SYS_BFIN_UART
 #endif

 i guess the problem is that this commit is wrong:

 commit 820edc18b5aefa8c82d420f6cba3e13b5631f9b8
 Author: Sonic Zhang sonic.zh...@analog.com
 Date:   Fri Nov 30 17:39:32 2012 +0800

 blackfin: Correct early serial mess output in BYPASS boot mode.

 it shouldn't be messing with the addresses there
 -mike
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[U-Boot] [PATCH] mmc: fix env in mmc with redundant compile error

[Bo Shen]

The commit d196bd8 (env_mmc: add support for redundant environment)
introduce the following compile error when enable reduandant
environment support with MMC
---8---
env_mmc.c:149: error: 'env_t' has no member named 'flags'
env_mmc.c:248: error: 'env_t' has no member named 'flags'
env_mmc.c:248: error: 'env_t' has no member named 'flags'
env_mmc.c:250: error: 'env_t' has no member named 'flags'
env_mmc.c:250: error: 'env_t' has no member named 'flags'
env_mmc.c:252: error: 'env_t' has no member named 'flags'
env_mmc.c:252: error: 'env_t' has no member named 'flags'
env_mmc.c:254: error: 'env_t' has no member named 'flags'
env_mmc.c:254: error: 'env_t' has no member named 'flags'
env_mmc.c:267: error: 'env_t' has no member named 'flags'
make[1]: *** [env_mmc.o] Error 1
---8---

Add this patch to fix it

Signed-off-by: Bo Shen voice.s...@atmel.com
---
 include/environment.h |6 ++
 1 file changed, 6 insertions(+)

diff --git a/include/environment.h b/include/environment.h
index 4c6a37b..460ccb4 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -75,6 +75,12 @@
 # endif
 #endif /* CONFIG_ENV_IS_IN_FLASH */
 
+#if defined(CONFIG_ENV_IS_IN_MMC)
+# ifdef CONFIG_ENV_OFFSET_REDUND
+#  define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+# endif
+#endif
+
 #if defined(CONFIG_ENV_IS_IN_NAND)
 # if defined(CONFIG_ENV_OFFSET_OOB)
 #  ifdef CONFIG_ENV_OFFSET_REDUND
-- 
1.7.9.5

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Re: [U-Boot] [Patch v2 4/4] ARM: atmel: add sama5d3xek support

[Bo Shen]

Hi Andreas,

On 5/12/2013 19:35, Andreas Bießmann wrote:

Dear Bo Shen,

On 12.03.2013 07:15, Bo Shen wrote:

Add sama5d3xek support with following feature
   - boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector
   - boot from SPI flash support
   - boot from SD card support
   - LCD support
   - EMAC support
   - USB support (OHCI)


no obvious objections here, please just change order order or split the
register definition changes out of this one.


OK, I will split the register definition changes out for this one.


Best regards

Andreas Bießmann


Best Regards,
Bo Shen
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Re: [U-Boot] [Patch v2 1/4] USB: ohci-at91: support sama5d3x devices

[Bo Shen]

Hi Andreas,

On 5/12/2013 19:28, Andreas Bießmann wrote:

Dear Bo Shen,

On 12.03.2013 07:15, Bo Shen wrote:

Add OHCI support for sama5d3x devices


can you please rebase this patch and send again?


OK, I will do it at next version.



Signed-off-by: Bo Shen voice.s...@atmel.com
---
change in v2:
   - change #if defined to #ifdef for sama5d3
---
  drivers/usb/host/ohci-at91.c |   14 --
  1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index efd711d..086cd0f 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -42,7 +42,7 @@ int usb_cpu_init(void)
  while ((readl(pmc-sr)  AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
  ;
  #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
|| \
-defined(CONFIG_AT91SAM9X5)
+defined(CONFIG_AT91SAM9X5) || defined(CONFIG_SAMA5D3)
  /* Enable UPLL */
  writel(readl(pmc-uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN,
  pmc-uckr);
@@ -54,7 +54,12 @@ int usb_cpu_init(void)
  #endif

  /* Enable USB host clock. */
+#ifdef CONFIG_SAMA5D3
+writel(1  (ATMEL_ID_UHP - 32), pmc-pcer1);


Please reorder the patches so that pmc-pcer1 is declared before used.


Ok, thanks for figure out this. I will do it at next version.


Best regards

Andreas Bießmann


Best Regards,
Bo Shen

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Re: [U-Boot] ARM: cfi_flash: Fix unaligned accesses to cfi_qry structure

[Albert ARIBAUD]

Hi Marek,

On Fri, 10 May 2013 14:36:00 +0200, Marek Vasut ma...@denx.de wrote:

 Hello Masahiro-san,

  By the way, I also had this unalignment access problem for my board.
  Before finding your patch, I was thinking another way to fix this problem.
  
  My idea is to just use 'get_unaligned' and 'put_unaligned' functions
  instead of introducing special macros.
  With this way, we don't need to change the fields of struct cfi_qry.
 
 I think we should make sure to use natural alignment as much as possible, 
 really. I'm keeping Albert in CC because this is his turf.

Marek, you invoked me; next time be careful what you wish for. :)

My rules (not 'of thumb', as they also apply to ARM) regarding
alignment are as follows (yes, it's a more general answer than your
question called for, but the last rules are more directly related):

0) Never assume that U-Boot can use native unaligned accesses. Yes,
ARMv7+ can do native unaligned accesses with almost no performance
cost, but U-Boot runs on all sorts of targets (not only ARM), some
allowing unaligned access but with a penalty, and some unable to
perform unaligned access at all. We always run the risk that some code
in U-Boot ends up running on target which will die horribly on some
unaligned access, so to avoid this we must assume and enforce strict
alignment, even for architectures which do not require it, such as
ARMv7+.

1) As per rule 0, always enable alignment check -- again, even on
targets which could do without it. This allows catching any unaligned
access, be they accidental (bad pointer arithmetic) or by design
(misaligned field in an otherwise aligned struct).

2) Despite rules 0 and 1, always enable native unaligned accesses (IOW,
always use option -munaligned-accesses). That is because without this
option (or more precisely, when -mno-unaligned-accesses is in effect),
the ARM compiler may silently detect misaligned accesses and fix them
using smaller aligned accesses, thus hiding a potential alignment
issue until it bites on some later and unrelated target run.

3) always size fields in a structure to their natural size, i.e., if a
field is 16-bits, make it u16 or s16.

4) always align fields in a structure to their natural boundaries,
i.e., if a field is 16-bits, align it to an even address.

5) if a field absolutely has to be unaligned because of hardware or
standard, then a) document that! and b) access it with explicit
unaligned access macros.

So in essence, I am opposed to changing fields from 16-bit to 2 x 8-bit
just 'because unaligned'. Either fix the fields' alignment, if at all
possible; and if not, then apply rule 5: document the issue and fix it
using explicit unaligned access macros.

 Best regards,
 Marek Vasut

Amicalement,
-- 
Albert.
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Re: [U-Boot] [RFC PATCH] arm: lds: Remove libgcc eabi exception handling tables

[Michal Simek]

On 05/10/2013 09:07 PM, Albert ARIBAUD wrote:
 Hi Michal,
 
 On Thu,  9 May 2013 11:35:33 +0200, Michal Simek
 michal.si...@xilinx.com wrote:
 
 Remove ARM eabi exception handling tables (for frame unwinding).
 AFAICT, u-boot stubs away the frame unwiding routines, so the tables will
 more or less just consume space. It should be OK to remove them.

 Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
 Signed-off-by: Michal Simek michal.si...@xilinx.com
 ---
 Other options could be to complete u-boot/arch/arm/lib/* so that
 libgcc routines with exception handling dont get pulled in. Or
 to avoid user code (like the mentioned patch) which causes external
 libgcc functions to get pulled in...
 
 Er... which mentioned patch?

Ah yeah. Let me give you background.
After adding:
arm: zynq: U-Boot udelay  1000 FIX
(sha1: d54cc007878697a92e7f696b71a3eb203c0386e2)

we have found that new program header is added to u-boot for zynq.

Program Header:
0x7001 off0x000405fc vaddr 0x040385fc paddr 0x040385fc align 2**2
 filesz 0x0020 memsz 0x0020 flags r--
LOAD off0x8000 vaddr 0x0400 paddr 0x0400 align 2**15
 filesz 0x00041240 memsz 0x00041240 flags rwx
   STACK off0x vaddr 0x paddr 0x align 2**2
 filesz 0x memsz 0x flags rwx

Tracing down this we found that uldivmod is used
27:  0 NOTYPE  GLOBAL DEFAULT  UND __aeabi_uldivmod

Based on that Edgar proposed this patch.

After my experiment we can also use the patch below to fix it
because external libgcc functions are not pulled it.
But probably removing that ARM eabi exception handling tables is better
solution then try to change code not to use it.
But for me it is no problem to send the patch below to fix this problem.

Thanks,
Michal

diff --git a/arch/arm/cpu/armv7/zynq/timer.c b/arch/arm/cpu/armv7/zynq/timer.c
index 1b56373..4b26e96 100644
--- a/arch/arm/cpu/armv7/zynq/timer.c
+++ b/arch/arm/cpu/armv7/zynq/timer.c
@@ -118,12 +118,13 @@ void __udelay(unsigned long usec)
u32 timeend;
u32 timediff;
u32 timenow;
+   u64 temp;

if (usec == 0)
return;

-   countticks = (u32) (((unsigned long long) TIMER_TICK_HZ * usec) /
-   100);
+   temp = (TIMER_TICK_HZ * usec) / 100;
+   countticks = (u32)temp;

/* decrementing timer */
timeend = readl(timer_base-counter) - countticks;



-- 
Michal Simek, Ing. (M.Eng), OpenPGP - KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform




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Re: [U-Boot] [PATCH] common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT

[Zhang Ying-B40530]

-Original Message-
From: Wood Scott-B07421 
Sent: Saturday, May 11, 2013 8:29 AM
To: Wolfgang Denk
Cc: Zhang Ying-B40530; u-boot@lists.denx.de; Xie Xiaobo-R63061; Zhang 
Ying-B40530
Subject: Re: [U-Boot] [PATCH] common/Makefile: Add new symbol 
CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT

On 05/10/2013 07:03:07 PM, Wolfgang Denk wrote:
 Dear ying.zh...@freescale.com,
 
 In message 1368182421-859-1-git-send-email-ying.zh...@freescale.com
 you wrote:
  From: Ying Zhang b40...@freescale.com
 
  Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace
 CONFIG_SPL_NET_SUPPORT.
 
 Any CONFIG_* stuff must be documented in the README.  Please add this 
 documentation.
 
  In common/Makefile, the environment-related files in SPL is difined
 by
  CONFIG_SPL_NET_SUPPORT, it is wrong.
 
 s/difined/defined/
 
 Could you please also explain, what exactly is wrong, and how your new 
 code fixes this?

We will need the environment in SPL for reasons other than network  
support (in particular, hwconfig contains info for how to set up DDR).   
Yes, this information should go in the changelog.
[Zhang Ying]
OK, I will update this patch and CONFIG_SPL_ENV_SUPPORT will be added in README.

 --- a/include/configs/am335x_evm.h
 +++ b/include/configs/am335x_evm.h
 @@ -325,6 +325,7 @@
  #define CONFIG_SPL_GPIO_SUPPORT
  #define CONFIG_SPL_YMODEM_SUPPORT
  #define CONFIG_SPL_NET_SUPPORT
 +#define CONFIG_SPL_ENV_SUPPORT
  #define CONFIG_SPL_NET_VCI_STRINGAM335x U-Boot SPL
  #define CONFIG_SPL_ETH_SUPPORT
  #define CONFIG_SPL_SPI_SUPPORT
 diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index 
 d0ea74e..926842f 100644
 --- a/include/configs/pcm051.h
 +++ b/include/configs/pcm051.h
 @@ -224,6 +224,7 @@
  #define CONFIG_SPL_GPIO_SUPPORT
  #define CONFIG_SPL_YMODEM_SUPPORT
  #define CONFIG_SPL_NET_SUPPORT
 +#define CONFIG_SPL_ENV_SUPPORT
  #define CONFIG_SPL_NET_VCI_STRINGpcm051 U-Boot SPL
  #define CONFIG_SPL_ETH_SUPPORT
  #define CONFIG_SPL_SPI_SUPPORT

Are you sure these are the only locations that need this?
[Zhang Ying]
I've searched for the symbol CONFIG_SPL_NET_SUPPORT all of the code, there is 
only the two files to define.


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[U-Boot] [PATCH v2] common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT

[ying.zhang]

From: Ying Zhang b40...@freescale.com

There will need the environment in SPL for reasons other than network
support (in particular, hwconfig contains info for how to set up DDR).

Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT in
common/Makefile.

Signed-off-by: Ying Zhang b40...@freescale.com
---
 README   |3 +++
 common/Makefile  |   16 ++--
 include/configs/am335x_evm.h |1 +
 include/configs/pcm051.h |1 +
 4 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/README b/README
index d8a1198..f38f375 100644
--- a/README
+++ b/README
@@ -2984,6 +2984,9 @@ FIT uImage format:
CONFIG_SPL_LIBGENERIC_SUPPORT
Support for lib/libgeneric.o in SPL binary
 
+   CONFIG_SPL_ENV_SUPPORT
+   Support for the environment operating in SPL binary
+
CONFIG_SPL_PAD_TO
Image offset to which the SPL should be padded before appending
the SPL payload. By default, this is defined as
diff --git a/common/Makefile b/common/Makefile
index 0e0fff1..1adae03 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -44,7 +44,6 @@ COBJS-$(CONFIG_SYS_GENERIC_BOARD) += board_r.o
 COBJS-y += cmd_boot.o
 COBJS-$(CONFIG_CMD_BOOTM) += cmd_bootm.o
 COBJS-y += cmd_help.o
-COBJS-y += cmd_nvedit.o
 COBJS-y += cmd_version.o
 
 # environment
@@ -67,7 +66,6 @@ COBJS-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o
 COBJS-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o
 COBJS-$(CONFIG_ENV_IS_IN_REMOTE) += env_remote.o
 COBJS-$(CONFIG_ENV_IS_IN_UBI) += env_ubi.o
-COBJS-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
 
 # command
 COBJS-$(CONFIG_CMD_AMBAPP) += cmd_ambapp.o
@@ -214,18 +212,16 @@ COBJS-$(CONFIG_CMD_GPT) += cmd_gpt.o
 endif
 
 ifdef CONFIG_SPL_BUILD
-COBJS-y += cmd_nvedit.o
-COBJS-y += env_common.o
 COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
 COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
-COBJS-$(CONFIG_SPL_NET_SUPPORT) += cmd_nvedit.o
-COBJS-$(CONFIG_SPL_NET_SUPPORT) += env_attr.o
-COBJS-$(CONFIG_SPL_NET_SUPPORT) += env_callback.o
-COBJS-$(CONFIG_SPL_NET_SUPPORT) += env_common.o
-COBJS-$(CONFIG_SPL_NET_SUPPORT) += env_flags.o
-COBJS-$(CONFIG_SPL_NET_SUPPORT) += env_nowhere.o
 COBJS-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o
+COBJS-$(CONFIG_SPL_ENV_SUPPORT) += env_common.o
+COBJS-$(CONFIG_SPL_ENV_SUPPORT) += env_attr.o
+COBJS-$(CONFIG_SPL_ENV_SUPPORT) += env_flags.o
+COBJS-$(CONFIG_SPL_ENV_SUPPORT) += env_callback.o
 endif
+COBJS-y += cmd_nvedit.o
+COBJS-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
 COBJS-$(CONFIG_BOUNCE_BUFFER) += bouncebuf.o
 COBJS-y += console.o
 COBJS-y += dlmalloc.o
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index ef00306..f47d3d1 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -325,6 +325,7 @@
 #define CONFIG_SPL_GPIO_SUPPORT
 #define CONFIG_SPL_YMODEM_SUPPORT
 #define CONFIG_SPL_NET_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_NET_VCI_STRING  AM335x U-Boot SPL
 #define CONFIG_SPL_ETH_SUPPORT
 #define CONFIG_SPL_SPI_SUPPORT
diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
index d0ea74e..926842f 100644
--- a/include/configs/pcm051.h
+++ b/include/configs/pcm051.h
@@ -224,6 +224,7 @@
 #define CONFIG_SPL_GPIO_SUPPORT
 #define CONFIG_SPL_YMODEM_SUPPORT
 #define CONFIG_SPL_NET_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_NET_VCI_STRING  pcm051 U-Boot SPL
 #define CONFIG_SPL_ETH_SUPPORT
 #define CONFIG_SPL_SPI_SUPPORT
-- 
1.7.0.4


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[U-Boot] [PATCH v2 1/2] blackfin: bf609: implement soft switch

[Sonic Zhang]

From: Sonic Zhang sonic.zh...@analog.com

Set up soft switch pins properly in board init code.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Scott Jiang scott.ji...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
Signed-off-by: Sonic Zhang sonic@gmail.com
---
Changes in v2: None

 board/bf609-ezkit/soft_switch.c | 180 
 board/bf609-ezkit/soft_switch.h |  71 
 2 files changed, 251 insertions(+)
 create mode 100644 board/bf609-ezkit/soft_switch.c
 create mode 100644 board/bf609-ezkit/soft_switch.h

diff --git a/board/bf609-ezkit/soft_switch.c b/board/bf609-ezkit/soft_switch.c
new file mode 100644
index 000..2e1404f
--- /dev/null
+++ b/board/bf609-ezkit/soft_switch.c
@@ -0,0 +1,180 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2008-2011 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include common.h
+#include asm/blackfin.h
+#include asm/io.h
+#include i2c.h
+#include soft_switch.h
+
+#define SWITCH_ADDR 0x21
+
+#define NUM_SWITCH  3
+#define IODIRA  0x0
+#define IODIRB  0x1
+#define OLATA   0x14
+#define OLATB   0x15
+
+struct switch_config {
+   uchar dir0; /* IODIRA */
+   uchar dir1; /* IODIRB */
+   uchar value0; /* OLATA */
+   uchar value1; /* OLATB */
+};
+
+static struct switch_config switch_config_array[NUM_SWITCH] = {
+   {
+/*
+   U45 Port A U45 Port B
+
+   7---  RMII_CLK_EN  |  7--- ~TEMP_THERM_EN
+   | 6- ~CNT0ZM_EN|  | 6- ~TEMP_IRQ_EN
+   | | 5--- ~CNT0DG_EN|  | | 5--- ~UART0CTS_146_EN
+   | | | 4- ~CNT0UD_EN|  | | | 4- ~UART0CTS_RST_EN
+   | | | | 3--- ~CAN0RX_EN|  | | | | 3--- ~UART0CTS_RTS_LPBK
+   | | | | | 2- ~CAN0_ERR_EN  |  | | | | | 2- ~UART0CTS_EN
+   | | | | | | 1--- ~CAN_STB  |  | | | | | | 1--- ~UART0RX_EN
+   | | | | | | | 0-  CAN_EN   |  | | | | | | | 0- ~UART0RTS_EN
+   | | | | | | | ||  | | | | | | | |
+   O O O O O O O O|  O O O O O O O O   (I/O direction)
+   1 0 0 0 0 0 1 1|  1 1 1 1 1 0 0 0   (value being set)
+*/
+   .dir0 = 0x0, /* all output */
+   .dir1 = 0x0, /* all output */
+   .value0 = RMII_CLK_EN | CAN_STB | CAN_EN,
+   .value1 = TEMP_THERM_EN | TEMP_IRQ_EN | UART0CTS_146_EN
+   | UART0CTS_RST_EN | UART0CTS_RTS_LPBK,
+   },
+   {
+/*
+   U46 Port A   U46 Port B
+
+   7--- ~LED4_GPIO_EN   |  7---  EMPTY
+   | 6- ~LED3_GPIO_EN   |  | 6- ~SPI0D3_EN
+   | | 5--- ~LED2_GPIO_EN   |  | | 5--- ~SPI0D2_EN
+   | | | 4- ~LED1_GPIO_EN   |  | | | 4- ~SPIFLASH_CS_EN
+   | | | | 3---  SMC0_LP0_EN|  | | | | 3--- ~SD_WP_EN
+   | | | | | 2-  EMPTY  |  | | | | | 2- ~SD_CD_EN
+   | | | | | | 1---  SMC0_EPPI2 |  | | | | | | 1--- ~PUSHBUTTON2_EN
+ _LP1_SWITCH
+   | | | | | | | 0-  OVERRIDE_SMC0  |  | | | | | | | 0- ~PUSHBUTTON1_EN
+ _LP0_BOOT
+   | | | | | | | |  |  | | | | | | | |
+   O O O O O O O O  |  O O O O O O O O   (I/O direction)
+   0 0 0 0 0 X 0 1  |  X 0 0 0 0 0 0 0   (value being set)
+*/
+   .dir0 = 0x0, /* all output */
+   .dir1 = 0x0, /* all output */
+#ifdef CONFIG_BFIN_LINKPORT
+   .value0 = OVERRIDE_SMC0_LP0_BOOT,
+#else
+   .value0 = SMC0_EPPI2_LP1_SWITCH,
+#endif
+   .value1 = 0x0,
+   },
+   {
+/*
+   U47 Port A U47 Port B
+
+   7--- ~PD2_SPI0MISO |  7---  EMPTY
+ _EI3_EN
+   | 6- ~PD1_SPI0D3   |  | 6-  EMPTY
+ _EPPI1D17
+ _SPI0SEL2
+ _EI3_EN
+   | | 5--- ~PD0_SPI0D2   |  | | 5---  EMPTY
+ _EPPI1D16
+ _SPI0SEL3
+ _EI3_EN
+   | | | 4- ~WAKE_PUSH|  | | | 4-  EMPTY
+ BUTTON_EN
+   | | | | 3--- ~ETHERNET_EN  |  | | | | 3---  EMPTY
+   | | | | | 2-  PHYAD0   |  | | | | | 2-  EMPTY
+   | | | | | | 1---  PHY_PWR  |  | | | | | | 1--- ~PD4_SPI0CK_EI3_EN
+ _DWN_INT
+   | | | | | | | 0- ~PHYINT_EN|  | | | | | | | 0- ~PD3_SPI0MOSI_EI3_EN
+   | | | | | | | ||  | | | | | | | |
+   O O O O O I I O|  O O O O O O O O   (I/O direction)
+   1 1 1 0 0 0 0 0|  X X X X X X 1 1   (value being set)
+*/
+   

[U-Boot] [PATCH v2 2/2] blackfin: bf609: add softswitch config command

[Sonic Zhang]

From: Bob Liu lliu...@gmail.com

Add softswitch_output command for bf609-ezkit to enable softswitches.

Signed-off-by: Bob Liu lliu...@gmail.com
Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Sonic Zhang sonic@gmail.com
---
Changes in v2:
- Add documentation for CONFIG_CMD_SOFTSWITCH to top-level README.

 README  |  1 +
 arch/blackfin/include/asm/soft_switch.h | 18 +++
 board/bf609-ezkit/soft_switch.c | 11 +
 board/bf609-ezkit/soft_switch.h | 25 +---
 common/Makefile |  1 +
 common/cmd_softswitch.c | 41 +
 include/configs/bf609-ezkit.h   |  1 +
 7 files changed, 80 insertions(+), 18 deletions(-)
 create mode 100644 arch/blackfin/include/asm/soft_switch.h
 create mode 100644 common/cmd_softswitch.c

diff --git a/README b/README
index 0d37d56..defdedb 100644
--- a/README
+++ b/README
@@ -898,6 +898,7 @@ The following options need to be configured:
CONFIG_CMD_SF   * Read/write/erase SPI NOR flash
CONFIG_CMD_SHA1SUMprint sha1 memory digest
  (requires CONFIG_CMD_MEMORY)
+   CONFIG_CMD_SOFTSWITCH   * Soft switch setting command for BF60x
CONFIG_CMD_SOURCE source command Support
CONFIG_CMD_SPI  * SPI serial bus support
CONFIG_CMD_TFTPSRV  * TFTP transfer in server mode
diff --git a/arch/blackfin/include/asm/soft_switch.h 
b/arch/blackfin/include/asm/soft_switch.h
new file mode 100644
index 000..ff8e44d
--- /dev/null
+++ b/arch/blackfin/include/asm/soft_switch.h
@@ -0,0 +1,18 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2008-2012 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __SOFT_SWITCH_H__
+#define __SOFT_SWITCH_H__
+
+#define IO_PORT_A  0
+#define IO_PORT_B  1
+#define IO_PORT_INPUT  0
+#define IO_PORT_OUTPUT 1
+
+int config_switch_bit(int num, int port, int bit, int dir, uchar value);
+#endif
diff --git a/board/bf609-ezkit/soft_switch.c b/board/bf609-ezkit/soft_switch.c
index 2e1404f..e0c8d93 100644
--- a/board/bf609-ezkit/soft_switch.c
+++ b/board/bf609-ezkit/soft_switch.c
@@ -12,14 +12,6 @@
 #include i2c.h
 #include soft_switch.h
 
-#define SWITCH_ADDR 0x21
-
-#define NUM_SWITCH  3
-#define IODIRA  0x0
-#define IODIRB  0x1
-#define OLATA   0x14
-#define OLATB   0x15
-
 struct switch_config {
uchar dir0; /* IODIRA */
uchar dir1; /* IODIRB */
@@ -126,9 +118,8 @@ static int setup_soft_switch(int addr, struct switch_config 
*config)
return i2c_write(addr, IODIRB, 1, config-dir1, 1);
 }
 
-int config_switch_bit(int num, int port, int bit, int dir, uchar value)
+int config_switch_bit(int addr, int port, int bit, int dir, uchar value)
 {
-   int addr = SWITCH_ADDR + num;
int ret, data_reg, dir_reg;
uchar tmp;
 
diff --git a/board/bf609-ezkit/soft_switch.h b/board/bf609-ezkit/soft_switch.h
index 8da0e44..d147fe1 100644
--- a/board/bf609-ezkit/soft_switch.h
+++ b/board/bf609-ezkit/soft_switch.h
@@ -6,8 +6,10 @@
  * Licensed under the GPL-2 or later.
  */
 
-#ifndef __SOFT_SWITCH_H__
-#define __SOFT_SWITCH_H__
+#ifndef __BOARD_SOFT_SWITCH_H__
+#define __BOARD_SOFT_SWITCH_H__
+
+#include asm/soft_switch.h
 
 /* switch 0 port A */
 #define CAN_EN 0x1
@@ -61,11 +63,18 @@
 #define PD3_SPI0MOSI_EN0x1
 #define PD4_SPI0CK_EN  0x2
 
-#define IO_PORT_A  0
-#define IO_PORT_B  1
-#define IO_PORT_INPUT  0
-#define IO_PORT_OUTPUT 1
+#ifdef CONFIG_BFIN_BOARD_VERSION_1_0
+#define SWITCH_ADDR 0x21
+#else
+#define SWITCH_ADDR 0x20
+#endif
+
+#define NUM_SWITCH  3
+#define IODIRA  0x0
+#define IODIRB  0x1
+#define OLATA   0x14
+#define OLATB   0x15
 
-int config_switch_bit(int num, int port, int bit, int dir, uchar value);
 int setup_board_switches(void);
-#endif
+
+#endif /* __BOARD_SOFT_SWITCH_H__ */
diff --git a/common/Makefile b/common/Makefile
index 0e0fff1..0429a3c 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -164,6 +164,7 @@ COBJS-$(CONFIG_CMD_SF) += cmd_sf.o
 COBJS-$(CONFIG_CMD_SCSI) += cmd_scsi.o
 COBJS-$(CONFIG_CMD_SHA1SUM) += cmd_sha1sum.o
 COBJS-$(CONFIG_CMD_SETEXPR) += cmd_setexpr.o
+COBJS-$(CONFIG_CMD_SOFTSWITCH) += cmd_softswitch.o
 COBJS-$(CONFIG_CMD_SPI) += cmd_spi.o
 COBJS-$(CONFIG_CMD_SPIBOOTLDR) += cmd_spibootldr.o
 COBJS-$(CONFIG_CMD_STRINGS) += cmd_strings.o
diff --git a/common/cmd_softswitch.c b/common/cmd_softswitch.c
new file mode 100644
index 000..f75d926
--- /dev/null
+++ b/common/cmd_softswitch.c
@@ -0,0 +1,41 @@
+/*
+ * cmd_softswitch.c - set the softswitch for bf60x
+ *
+ * Copyright (c) 2012 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ 

Re: [U-Boot] [PATCH v6 2/4] usb: ehci: add weak-aliased functions to portsc tdi

[Kuo-Jung Su]

2013/5/13 Marek Vasut ma...@denx.de:
 Dear Kuo-Jung Su,

 From: Kuo-Jung Su dant...@faraday-tech.com

 There is at least one non-EHCI compliant controller (i.e. Faraday EHCI)
 known to implement a non-standard TDI stuff.
 Futhermore, it not only leave reserved and CONFIGFLAG registers
 un-implemented but also has their address spaces removed.

 And thus, we need weak-aliased functions to both TDI stuff
 and PORTSC registers for interface abstraction.

 Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
 CC: Marek Vasut ma...@denx.de
 ---
 Changes for v6:
- Simplify weak aliased function declaration
- Drop redundant line feed

 Changes for v5:
- Split up from Faraday EHCI patch

 Changes for v2 - v4:
- See 'usb: ehci: add Faraday USB 2.0 EHCI support'

  drivers/usb/host/ehci-hcd.c |   91
 ++- 1 file changed, 55
 insertions(+), 36 deletions(-)

 diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
 index c816878..ae3f2a4 100644
 --- a/drivers/usb/host/ehci-hcd.c
 +++ b/drivers/usb/host/ehci-hcd.c
 @@ -117,10 +117,44 @@ static struct descriptor {
  };

  #if defined(CONFIG_EHCI_IS_TDI)
 -#define ehci_is_TDI()(1)
 -#else
 -#define ehci_is_TDI()(0)
 +# define ehci_is_TDI()   (1)

 btw you can remove those braces around (1) and (0) below. But I have one more
 question ...


Got it, thanks

 [...]

 @@ -609,13 +644,10 @@ ehci_submit_root(struct usb_device *dev, unsigned
 long pipe, void *buffer, uint32_t *status_reg;
   struct ehci_ctrl *ctrl = dev-controller;

 - if (le16_to_cpu(req-index)  CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
 - printf(The request port(%d) is not configured\n,
 - le16_to_cpu(req-index) - 1);
 + status_reg = ehci_get_portsc_register(ctrl-hcor,
 + le16_to_cpu(req-index) - 1);
 + if (!status_reg)

 What happens here if req-index is zero ?

 Hint: the above code always does unsigned comparison ...

 I think you should make the second argument of ehci_get_portsc_register()
 unsigned short too (as is req-index in struct devrequest).


Sorry, but I'll prefer 'int' over 'unsigned short', since it looks to me that
the u-boot would set 'req-index' to 0 at startup, which results in
a 'port = -1' to be passed to ehci_get_portsc_register().

And I think '-1' is a better self-explain value, so I'd like to stick with 'int'

   return -1;
 - }
 - status_reg = (uint32_t *)ctrl-hcor-or_portsc[
 - le16_to_cpu(req-index) - 1];
   srclen = 0;

   debug(req=%u (%#x), type=%u (%#x), value=%u, index=%u\n,

 [...]

 Best regards,
 Marek Vasut



--
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Kuo-Jung Su
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Re: [U-Boot] [PATCH v6 1/4] usb: hub: make minimum power-on delay configurable

[Kuo-Jung Su]

2013/5/13 Marek Vasut ma...@denx.de:
 Dear Kuo-Jung Su,

 From: Kuo-Jung Su dant...@faraday-tech.com

 This patch makes the minimum power-on delay for USB HUB
 become configurable. The original design waits at least
 100 msec here, but some EHCI controlers(e.g. Faraday EHCI)
 are known to require much longer delay interval.

 Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
 CC: Marek Vasut ma...@denx.de

 The rest of the patches are good, just 2/4 needs minor tweak.

 I'd do it myself, but they don't apply to u-boot-usb/master , can you please
 adjust, rebase them and repost? Then I'll pick them.


Sorry about that, I didn't notice that the usb ehci had been updated 7 days ago.
I'll rebase my patches and repost later.

 Thanks!

 Best regards,
 Marek Vasut



--
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[U-Boot] [PATCH v2 1/2] blackfin: bf609: implement soft switch

[Sonic Zhang]

Set up soft switch pins properly in board init code.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Scott Jiang scott.ji...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
Changes in v2: None

 board/bf609-ezkit/soft_switch.c | 180 
 board/bf609-ezkit/soft_switch.h |  71 
 2 files changed, 251 insertions(+)
 create mode 100644 board/bf609-ezkit/soft_switch.c
 create mode 100644 board/bf609-ezkit/soft_switch.h

diff --git a/board/bf609-ezkit/soft_switch.c b/board/bf609-ezkit/soft_switch.c
new file mode 100644
index 000..2e1404f
--- /dev/null
+++ b/board/bf609-ezkit/soft_switch.c
@@ -0,0 +1,180 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2008-2011 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include common.h
+#include asm/blackfin.h
+#include asm/io.h
+#include i2c.h
+#include soft_switch.h
+
+#define SWITCH_ADDR 0x21
+
+#define NUM_SWITCH  3
+#define IODIRA  0x0
+#define IODIRB  0x1
+#define OLATA   0x14
+#define OLATB   0x15
+
+struct switch_config {
+   uchar dir0; /* IODIRA */
+   uchar dir1; /* IODIRB */
+   uchar value0; /* OLATA */
+   uchar value1; /* OLATB */
+};
+
+static struct switch_config switch_config_array[NUM_SWITCH] = {
+   {
+/*
+   U45 Port A U45 Port B
+
+   7---  RMII_CLK_EN  |  7--- ~TEMP_THERM_EN
+   | 6- ~CNT0ZM_EN|  | 6- ~TEMP_IRQ_EN
+   | | 5--- ~CNT0DG_EN|  | | 5--- ~UART0CTS_146_EN
+   | | | 4- ~CNT0UD_EN|  | | | 4- ~UART0CTS_RST_EN
+   | | | | 3--- ~CAN0RX_EN|  | | | | 3--- ~UART0CTS_RTS_LPBK
+   | | | | | 2- ~CAN0_ERR_EN  |  | | | | | 2- ~UART0CTS_EN
+   | | | | | | 1--- ~CAN_STB  |  | | | | | | 1--- ~UART0RX_EN
+   | | | | | | | 0-  CAN_EN   |  | | | | | | | 0- ~UART0RTS_EN
+   | | | | | | | ||  | | | | | | | |
+   O O O O O O O O|  O O O O O O O O   (I/O direction)
+   1 0 0 0 0 0 1 1|  1 1 1 1 1 0 0 0   (value being set)
+*/
+   .dir0 = 0x0, /* all output */
+   .dir1 = 0x0, /* all output */
+   .value0 = RMII_CLK_EN | CAN_STB | CAN_EN,
+   .value1 = TEMP_THERM_EN | TEMP_IRQ_EN | UART0CTS_146_EN
+   | UART0CTS_RST_EN | UART0CTS_RTS_LPBK,
+   },
+   {
+/*
+   U46 Port A   U46 Port B
+
+   7--- ~LED4_GPIO_EN   |  7---  EMPTY
+   | 6- ~LED3_GPIO_EN   |  | 6- ~SPI0D3_EN
+   | | 5--- ~LED2_GPIO_EN   |  | | 5--- ~SPI0D2_EN
+   | | | 4- ~LED1_GPIO_EN   |  | | | 4- ~SPIFLASH_CS_EN
+   | | | | 3---  SMC0_LP0_EN|  | | | | 3--- ~SD_WP_EN
+   | | | | | 2-  EMPTY  |  | | | | | 2- ~SD_CD_EN
+   | | | | | | 1---  SMC0_EPPI2 |  | | | | | | 1--- ~PUSHBUTTON2_EN
+ _LP1_SWITCH
+   | | | | | | | 0-  OVERRIDE_SMC0  |  | | | | | | | 0- ~PUSHBUTTON1_EN
+ _LP0_BOOT
+   | | | | | | | |  |  | | | | | | | |
+   O O O O O O O O  |  O O O O O O O O   (I/O direction)
+   0 0 0 0 0 X 0 1  |  X 0 0 0 0 0 0 0   (value being set)
+*/
+   .dir0 = 0x0, /* all output */
+   .dir1 = 0x0, /* all output */
+#ifdef CONFIG_BFIN_LINKPORT
+   .value0 = OVERRIDE_SMC0_LP0_BOOT,
+#else
+   .value0 = SMC0_EPPI2_LP1_SWITCH,
+#endif
+   .value1 = 0x0,
+   },
+   {
+/*
+   U47 Port A U47 Port B
+
+   7--- ~PD2_SPI0MISO |  7---  EMPTY
+ _EI3_EN
+   | 6- ~PD1_SPI0D3   |  | 6-  EMPTY
+ _EPPI1D17
+ _SPI0SEL2
+ _EI3_EN
+   | | 5--- ~PD0_SPI0D2   |  | | 5---  EMPTY
+ _EPPI1D16
+ _SPI0SEL3
+ _EI3_EN
+   | | | 4- ~WAKE_PUSH|  | | | 4-  EMPTY
+ BUTTON_EN
+   | | | | 3--- ~ETHERNET_EN  |  | | | | 3---  EMPTY
+   | | | | | 2-  PHYAD0   |  | | | | | 2-  EMPTY
+   | | | | | | 1---  PHY_PWR  |  | | | | | | 1--- ~PD4_SPI0CK_EI3_EN
+ _DWN_INT
+   | | | | | | | 0- ~PHYINT_EN|  | | | | | | | 0- ~PD3_SPI0MOSI_EI3_EN
+   | | | | | | | ||  | | | | | | | |
+   O O O O O I I O|  O O O O O O O O   (I/O direction)
+   1 1 1 0 0 0 0 0|  X X X X X X 1 1   (value being set)
+*/
+   .dir0 = 0x6, /* bits 1 and 2 input, all others output */
+   .dir1 = 

[U-Boot] [PATCH v2 2/2] blackfin: bf609: add softswitch config command

[Sonic Zhang]

From: Bob Liu lliu...@gmail.com

Add softswitch_output command for bf609-ezkit to enable softswitches.

Signed-off-by: Bob Liu lliu...@gmail.com
Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
Changes in v2:
- Add documentation for CONFIG_CMD_SOFTSWITCH to top-level README.

 README  |  1 +
 arch/blackfin/include/asm/soft_switch.h | 18 +++
 board/bf609-ezkit/soft_switch.c | 11 +
 board/bf609-ezkit/soft_switch.h | 25 +---
 common/Makefile |  1 +
 common/cmd_softswitch.c | 41 +
 include/configs/bf609-ezkit.h   |  1 +
 7 files changed, 80 insertions(+), 18 deletions(-)
 create mode 100644 arch/blackfin/include/asm/soft_switch.h
 create mode 100644 common/cmd_softswitch.c

diff --git a/README b/README
index 0d37d56..defdedb 100644
--- a/README
+++ b/README
@@ -898,6 +898,7 @@ The following options need to be configured:
CONFIG_CMD_SF   * Read/write/erase SPI NOR flash
CONFIG_CMD_SHA1SUMprint sha1 memory digest
  (requires CONFIG_CMD_MEMORY)
+   CONFIG_CMD_SOFTSWITCH   * Soft switch setting command for BF60x
CONFIG_CMD_SOURCE source command Support
CONFIG_CMD_SPI  * SPI serial bus support
CONFIG_CMD_TFTPSRV  * TFTP transfer in server mode
diff --git a/arch/blackfin/include/asm/soft_switch.h 
b/arch/blackfin/include/asm/soft_switch.h
new file mode 100644
index 000..ff8e44d
--- /dev/null
+++ b/arch/blackfin/include/asm/soft_switch.h
@@ -0,0 +1,18 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2008-2012 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __SOFT_SWITCH_H__
+#define __SOFT_SWITCH_H__
+
+#define IO_PORT_A  0
+#define IO_PORT_B  1
+#define IO_PORT_INPUT  0
+#define IO_PORT_OUTPUT 1
+
+int config_switch_bit(int num, int port, int bit, int dir, uchar value);
+#endif
diff --git a/board/bf609-ezkit/soft_switch.c b/board/bf609-ezkit/soft_switch.c
index 2e1404f..e0c8d93 100644
--- a/board/bf609-ezkit/soft_switch.c
+++ b/board/bf609-ezkit/soft_switch.c
@@ -12,14 +12,6 @@
 #include i2c.h
 #include soft_switch.h
 
-#define SWITCH_ADDR 0x21
-
-#define NUM_SWITCH  3
-#define IODIRA  0x0
-#define IODIRB  0x1
-#define OLATA   0x14
-#define OLATB   0x15
-
 struct switch_config {
uchar dir0; /* IODIRA */
uchar dir1; /* IODIRB */
@@ -126,9 +118,8 @@ static int setup_soft_switch(int addr, struct switch_config 
*config)
return i2c_write(addr, IODIRB, 1, config-dir1, 1);
 }
 
-int config_switch_bit(int num, int port, int bit, int dir, uchar value)
+int config_switch_bit(int addr, int port, int bit, int dir, uchar value)
 {
-   int addr = SWITCH_ADDR + num;
int ret, data_reg, dir_reg;
uchar tmp;
 
diff --git a/board/bf609-ezkit/soft_switch.h b/board/bf609-ezkit/soft_switch.h
index 8da0e44..d147fe1 100644
--- a/board/bf609-ezkit/soft_switch.h
+++ b/board/bf609-ezkit/soft_switch.h
@@ -6,8 +6,10 @@
  * Licensed under the GPL-2 or later.
  */
 
-#ifndef __SOFT_SWITCH_H__
-#define __SOFT_SWITCH_H__
+#ifndef __BOARD_SOFT_SWITCH_H__
+#define __BOARD_SOFT_SWITCH_H__
+
+#include asm/soft_switch.h
 
 /* switch 0 port A */
 #define CAN_EN 0x1
@@ -61,11 +63,18 @@
 #define PD3_SPI0MOSI_EN0x1
 #define PD4_SPI0CK_EN  0x2
 
-#define IO_PORT_A  0
-#define IO_PORT_B  1
-#define IO_PORT_INPUT  0
-#define IO_PORT_OUTPUT 1
+#ifdef CONFIG_BFIN_BOARD_VERSION_1_0
+#define SWITCH_ADDR 0x21
+#else
+#define SWITCH_ADDR 0x20
+#endif
+
+#define NUM_SWITCH  3
+#define IODIRA  0x0
+#define IODIRB  0x1
+#define OLATA   0x14
+#define OLATB   0x15
 
-int config_switch_bit(int num, int port, int bit, int dir, uchar value);
 int setup_board_switches(void);
-#endif
+
+#endif /* __BOARD_SOFT_SWITCH_H__ */
diff --git a/common/Makefile b/common/Makefile
index 0e0fff1..0429a3c 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -164,6 +164,7 @@ COBJS-$(CONFIG_CMD_SF) += cmd_sf.o
 COBJS-$(CONFIG_CMD_SCSI) += cmd_scsi.o
 COBJS-$(CONFIG_CMD_SHA1SUM) += cmd_sha1sum.o
 COBJS-$(CONFIG_CMD_SETEXPR) += cmd_setexpr.o
+COBJS-$(CONFIG_CMD_SOFTSWITCH) += cmd_softswitch.o
 COBJS-$(CONFIG_CMD_SPI) += cmd_spi.o
 COBJS-$(CONFIG_CMD_SPIBOOTLDR) += cmd_spibootldr.o
 COBJS-$(CONFIG_CMD_STRINGS) += cmd_strings.o
diff --git a/common/cmd_softswitch.c b/common/cmd_softswitch.c
new file mode 100644
index 000..f75d926
--- /dev/null
+++ b/common/cmd_softswitch.c
@@ -0,0 +1,41 @@
+/*
+ * cmd_softswitch.c - set the softswitch for bf60x
+ *
+ * Copyright (c) 2012 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include common.h
+#include command.h

[U-Boot] [PATCH v7 0/4] usb: add Faraday EHCI Gadget support

[Kuo-Jung Su]

From: Kuo-Jung Su dant...@faraday-tech.com

This patch adds support to both Faraday FUSBH200 and FOTG210,
the differences between Faraday EHCI and standard EHCI are
listed bellow:

1. The PORTSC starts at 0x30 instead of 0x44.
2. The CONFIGFLAG(0x40) is not only un-implemented, and
   also has its address removed.
3. Faraday EHCI is a TDI design, but it doesn't
   compatible with the general TDI implementation
   found at both U-Boot and Linux.
4. The ISOC descriptors differs from standard EHCI in
   several ways. But since U-boot doesn't support ISOC,
   we don't have to worry about that.

The Faraday FOTG210 is an OTG chip which could operate
as either an EHCI Host or a USB Device at a time.

Changes for v7:
   - Rebase with u-boot-bbd0f7e3ba66d288a2f146f1c7797801e04598ae,
 and also make sure it's compatible with
 u-boot-usb-dc69e46302a36e60e2417bba8c6ea78761a37ebf.
   - Update TDI aliased functions, since there is another
 similar patch had been committed and acceptted.
   - ehci-hcd: ehci_get_portsc_register(): make sure port is always = 0

Changes for v6:
   - usb_hub: Simplify CONFIG_USB_HUB_MIN_POWER_ON_DELAY
 default value setup.
   - ehci-hcd: Simplify weak aliased function declaration
   - ehci-hcd: Drop redundant line feed

Changes for v5:
   - Split up EHCI changeset
   - usb_hub: replace the Faraday EHCI ifdef for the long delay
 in usb_hub_configure() with the new configuration option:
 USB_HUB_MIN_POWER_ON_DELAY, which is used in usb_hub_power_on()
 to control the minimum usb hub power-on delay.
   - ehci-faraday: fix the invalid multi-line comment style.
   - gadget-fotg210: coding style cleanup.
   - gadget-fotg210: drop postfix '__iomem' from struct fotg210_regs
   - gadget-fotg210: use permanent delay for hardware reset
   - gadget-fotg210: drop '#ifndef CONFIG_SYS_DCACHE_OFF'
   - gadget-fotg210: drop magic numbers

Changes for v4:
   - Use only macro constants and named bit/mask
   - Use weak-aliased functions for tdi implementation and
 also portsc registers to avoid poluting ehci.h with ifdefs

Changes for v3:
   - Coding Style cleanup.
   - Drop bit fields from c struct.
   - Drop macros for wirtel()/readl(), call them directly.
   - Always insert a blank line between declarations and code.
   - Replace all the infinite wait loop with a timeout.
   - Add '__iomem' to all the declaration of HW register pointers.

Changes for v2:
   - Coding Style cleanup.
   - Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
   - Use structure based hardware registers to replace the macro constants.
   - Replace BIT() with BIT_MASK().
   - echi-faraday: Remove debug codes.

Kuo-Jung Su (4):
  usb: hub: make minimum power-on delay configurable
  usb: ehci: add weak-aliased function for PORTSC
  usb: ehci: add Faraday USB 2.0 EHCI support
  usb: gadget: add Faraday FOTG210 USB gadget support

 README|3 +
 common/usb_hub.c  |   15 +-
 drivers/usb/gadget/Makefile   |1 +
 drivers/usb/gadget/fotg210.c  |  948 +
 drivers/usb/gadget/gadget_chips.h |8 +
 drivers/usb/host/Makefile |1 +
 drivers/usb/host/ehci-faraday.c   |  154 ++
 drivers/usb/host/ehci-hcd.c   |   28 +-
 include/usb/fotg210.h |  364 ++
 include/usb/fusbh200.h|   61 +++
 10 files changed, 1576 insertions(+), 7 deletions(-)
 create mode 100644 drivers/usb/gadget/fotg210.c
 create mode 100644 drivers/usb/host/ehci-faraday.c
 create mode 100644 include/usb/fotg210.h
 create mode 100644 include/usb/fusbh200.h

--
1.7.9.5

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[U-Boot] [PATCH v7 1/4] usb: hub: make minimum power-on delay configurable

[Kuo-Jung Su]

From: Kuo-Jung Su dant...@faraday-tech.com

This patch makes the minimum power-on delay for USB HUB
become configurable. The original design waits at least
100 msec here, but some EHCI controlers(e.g. Faraday EHCI)
are known to require much longer delay interval.

Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Marek Vasut ma...@denx.de
---
Changes for v7:
   - Rebase to u-boot-bbd0f7e3ba66d288a2f146f1c7797801e04598ae

Changes for v6:
   - Simplify CONFIG_USB_HUB_MIN_POWER_ON_DELAY default value setup.

Changes for v5:
   - Split up from Faraday EHCI patch
   - Replace the Faraday EHCI ifdef for the long delay
 in usb_hub_configure() with the new configuration option:
 USB_HUB_MIN_POWER_ON_DELAY, which is used in usb_hub_power_on()
 to control the minimum usb hub power-on delay.

Changes for v2 - v4:
   - See 'usb: ehci: add Faraday USB 2.0 EHCI support'

 README   |3 +++
 common/usb_hub.c |8 ++--
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/README b/README
index 0d37d56..c70a59b 100644
--- a/README
+++ b/README
@@ -1244,6 +1244,9 @@ The following options need to be configured:
CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
txfilltuning field in the EHCI controller on reset.

+   CONFIG_USB_HUB_MIN_POWER_ON_DELAY defines the minimum
+   interval for usb hub power-on delay.(minimum 100msec)
+
 - USB Device:
Define the below if you wish to use the USB console.
Once firmware is rebuilt from a serial console issue the
diff --git a/common/usb_hub.c b/common/usb_hub.c
index 0d79ec3..fc3a8c1 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -53,6 +53,10 @@
 #include asm/4xx_pci.h
 #endif

+#ifndef CONFIG_USB_HUB_MIN_POWER_ON_DELAY
+#define CONFIG_USB_HUB_MIN_POWER_ON_DELAY  100
+#endif
+
 #define USB_BUFSIZ 512

 static struct usb_hub_device hub_dev[USB_MAX_HUB];
@@ -148,8 +152,8 @@ static void usb_hub_power_on(struct usb_hub_device *hub)
debug(port %d returns %lX\n, i + 1, dev-status);
}

-   /* Wait at least 100 msec for power to become stable */
-   mdelay(max(pgood_delay, (unsigned)100));
+   /* Wait for power to become stable */
+   mdelay(max(pgood_delay, CONFIG_USB_HUB_MIN_POWER_ON_DELAY));
 }

 void usb_hub_reset(void)
--
1.7.9.5

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[U-Boot] [PATCH v7 2/4] usb: ehci: add weak-aliased function for PORTSC

[Kuo-Jung Su]

From: Kuo-Jung Su dant...@faraday-tech.com

There is at least one non-EHCI compliant controller (i.e. Faraday EHCI)
not only leave RESERVED and CONFIGFLAG registers un-implemented
but also has their address spaces removed.

As an result, the PORTSC register of Faraday EHCI always
starts from 0x30 instead of 0x44 in standard EHCI.

So that we'll need a weak-aliased function for abstraction.

Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Marek Vasut ma...@denx.de
---
Changes for v7:
   - Rebase to u-boot-bbd0f7e3ba66d288a2f146f1c7797801e04598ae
   - Drop TDI weak-aliased functions, since there is another similar
 patch had been committed and acceptted.
   - ehci_get_portsc_register(): make sure port is always = 0

Changes for v6:
   - Simplify weak aliased function declaration
   - Drop redundant line feed

Changes for v5:
   - Split up from Faraday EHCI patch

Changes for v2 - v4:
   - See 'usb: ehci: add Faraday USB 2.0 EHCI support'

 drivers/usb/host/ehci-hcd.c |   23 +++
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index e0f3e4b..316de15 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -603,6 +603,23 @@ fail:
return -1;
 }

+__weak uint32_t *ehci_get_portsc_register(struct ehci_hcor *hcor, int port)
+{
+   /*
+* The u-boot would somehow set port=-1 at usb start-up,
+* so this quick fix is necessary.
+*/
+   if (port  0)
+   port = 0;
+
+   if (port = CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
+   printf(The request port(%u) is not configured\n, port);
+   return NULL;
+   }
+
+   return (uint32_t *)hcor-or_portsc[port];
+}
+
 int
 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 int length, struct devrequest *req)
@@ -616,11 +633,9 @@ ehci_submit_root(struct usb_device *dev, unsigned long 
pipe, void *buffer,
int port = le16_to_cpu(req-index)  0xff;
struct ehci_ctrl *ctrl = dev-controller;

-   if (port  CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
-   printf(The request port(%d) is not configured\n, port - 1);
+   status_reg = ehci_get_portsc_register(ctrl-hcor, port - 1);
+   if (!status_reg)
return -1;
-   }
-   status_reg = (uint32_t *)ctrl-hcor-or_portsc[port - 1];
srclen = 0;

debug(req=%u (%#x), type=%u (%#x), value=%u, index=%u\n,
--
1.7.9.5

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[U-Boot] [PATCH v7 3/4] usb: ehci: add Faraday USB 2.0 EHCI support

[Kuo-Jung Su]

From: Kuo-Jung Su dant...@faraday-tech.com

This patch adds support to both Faraday FUSBH200 and FOTG210,
the differences between Faraday EHCI and standard EHCI are
listed bellow:

1. The PORTSC starts at 0x30 instead of 0x44.
2. The CONFIGFLAG(0x40) is not only un-implemented, and
   also has its address space removed.
3. Faraday EHCI is a TDI design, but it doesn't
   compatible with the general TDI implementation
   found at both U-Boot and Linux.
4. The ISOC descriptors differ from standard EHCI in
   several ways. But since U-boot doesn't support ISOC,
   we don't have to worry about that.

Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Marek Vasut ma...@denx.de
---
Changes for v7:
   - Nothing updates

Changes for v6:
   - Nothing updates

Changes for v5:
   - Break down EHCI changes as seperate changesets.
   - Fix the invalid multi-line comment style.

Changes for v4:
   - Use only macro constants and named bit/mask
   - Use weak-aliased functions for tdi implementation and
 also portsc registers to avoid poluting ehci.h with ifdefs

Changes for v3:
   - Coding Style cleanup.
   - Drop bit fields from c struct.
   - Drop macros for wirtel()/readl(), call them directly.
   - Always insert a blank line between declarations and code.
   - Replace all the infinite wait loop with a timeout.
   - Add '__iomem' to all the declaration of HW register pointers.

Changes for v2:
   - Coding Style cleanup.
   - Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
   - Use structure based hardware registers to replace the macro constants.
   - Replace BIT() with BIT_MASK().
   - echi-faraday: Remove debug codes.

 common/usb_hub.c|7 +-
 drivers/usb/host/Makefile   |1 +
 drivers/usb/host/ehci-faraday.c |  154 +
 drivers/usb/host/ehci-hcd.c |5 +
 include/usb/fotg210.h   |  364 +++
 include/usb/fusbh200.h  |   61 +++
 6 files changed, 591 insertions(+), 1 deletion(-)
 create mode 100644 drivers/usb/host/ehci-faraday.c
 create mode 100644 include/usb/fotg210.h
 create mode 100644 include/usb/fusbh200.h

diff --git a/common/usb_hub.c b/common/usb_hub.c
index fc3a8c1..774ba63 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -489,7 +489,11 @@ static int usb_hub_configure(struct usb_device *dev)
  i + 1, portstatus);
usb_clear_port_feature(dev, i + 1,
USB_PORT_FEAT_C_ENABLE);
-
+   /*
+* The following hack causes a ghost device problem
+* to Faraday EHCI
+*/
+#ifndef CONFIG_USB_EHCI_FARADAY
/* EM interference sometimes causes bad shielded USB
 * devices to be shutdown by the hub, this hack enables
 * them again. Works at least with mouse driver */
@@ -501,6 +505,7 @@ static int usb_hub_configure(struct usb_device *dev)
  re-enabling...\n, i + 1);
  usb_hub_port_connect_change(dev, i);
}
+#endif
}
if (portstatus  USB_PORT_STAT_SUSPEND) {
debug(port %d suspend change\n, i + 1);
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 87a5970..98f2a10 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -43,6 +43,7 @@ COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-mpc512x.o
 else
 COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o
 endif
+COBJS-$(CONFIG_USB_EHCI_FARADAY) += ehci-faraday.o
 COBJS-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o
 COBJS-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o
 COBJS-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o
diff --git a/drivers/usb/host/ehci-faraday.c b/drivers/usb/host/ehci-faraday.c
new file mode 100644
index 000..76b3b64
--- /dev/null
+++ b/drivers/usb/host/ehci-faraday.c
@@ -0,0 +1,154 @@
+/*
+ * Faraday USB 2.0 EHCI Controller
+ *
+ * (C) Copyright 2010 Faraday Technology
+ * Dante Su dant...@faraday-tech.com
+ *
+ * This file is released under the terms of GPL v2 and any later version.
+ * See the file COPYING in the root directory of the source tree for details.
+ */
+
+#include common.h
+#include asm/io.h
+#include usb.h
+#include usb/fusbh200.h
+#include usb/fotg210.h
+
+#include ehci.h
+
+#ifndef CONFIG_USB_EHCI_BASE_LIST
+#define CONFIG_USB_EHCI_BASE_LIST  { CONFIG_USB_EHCI_BASE }
+#endif
+
+union ehci_faraday_regs {
+   struct fusbh200_regs usb;
+   struct fotg210_regs  otg;
+};
+
+static inline int ehci_is_fotg2xx(union ehci_faraday_regs *regs)
+{
+   return !readl(regs-usb.easstr);
+}
+
+/*
+ * Create the appropriate control structures to manage
+ * a new EHCI host controller.
+ */
+int ehci_hcd_init(int index, struct ehci_hccr **ret_hccr,
+   struct ehci_hcor **ret_hcor)
+{
+   struct 

[U-Boot] [PATCH v7 4/4] usb: gadget: add Faraday FOTG210 USB gadget support

[Kuo-Jung Su]

From: Kuo-Jung Su dant...@faraday-tech.com

The Faraday FOTG210 is an OTG chip which could operate
as either an EHCI Host or a USB Device at a time.

Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Marek Vasut ma...@denx.de
---
Changes for v7:
   - Nothing updates

Changes for v6:
   - Nothing updates

Changes for v5:
   - Coding Style cleanup.
   - Drop postfix '__iomem' from struct fotg210_regs
   - Use permanent delay for hardware reset
   - Drop '#ifndef CONFIG_SYS_DCACHE_OFF'
   - Drop magic numbers

Changes for v4:
   - Use only macro constants and named bit/mask
   - Remove dcache_enable() from usb_gadget_register_driver()

Changes for v3:
   - Coding Style cleanup.
   - Drop bit fields from c struct.
   - Drop macros for wirtel()/readl(), call them directly.
   - Always insert a blank line between declarations and code.
   - Replace all the infinite wait loop with a timeout.
   - Add '__iomem' to all the declaration of HW register pointers.

Changes for v2:
   - Coding Style cleanup.
   - Use readl(), writel(), clrsetbits_le32() to replace REG() macros.
   - Use structure based hardware registers to replace the macro constants.
   - Replace BIT() with BIT_MASK().
   - echi-faraday: Remove debug codes.

 drivers/usb/gadget/Makefile   |1 +
 drivers/usb/gadget/fotg210.c  |  948 +
 drivers/usb/gadget/gadget_chips.h |8 +
 3 files changed, 957 insertions(+)
 create mode 100644 drivers/usb/gadget/fotg210.c

diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index e545b6b..432cf17 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -35,6 +35,7 @@ endif
 # new USB gadget layer dependencies
 ifdef CONFIG_USB_GADGET
 COBJS-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
+COBJS-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o
 COBJS-$(CONFIG_USBDOWNLOAD_GADGET) += g_dnl.o
 COBJS-$(CONFIG_DFU_FUNCTION) += f_dfu.o
 endif
diff --git a/drivers/usb/gadget/fotg210.c b/drivers/usb/gadget/fotg210.c
new file mode 100644
index 000..d003331
--- /dev/null
+++ b/drivers/usb/gadget/fotg210.c
@@ -0,0 +1,948 @@
+/*
+ * Faraday USB 2.0 OTG Controller
+ *
+ * (C) Copyright 2010 Faraday Technology
+ * Dante Su dant...@faraday-tech.com
+ *
+ * This file is released under the terms of GPL v2 and any later version.
+ * See the file COPYING in the root directory of the source tree for details.
+ */
+
+#include common.h
+#include command.h
+#include config.h
+#include net.h
+#include malloc.h
+#include asm/io.h
+#include asm/errno.h
+#include linux/types.h
+#include linux/usb/ch9.h
+#include linux/usb/gadget.h
+
+#include usb/fotg210.h
+
+#define CFG_NUM_ENDPOINTS  4
+#define CFG_EP0_MAX_PACKET_SIZE64
+#define CFG_EPX_MAX_PACKET_SIZE512
+
+#define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ  2) /* 250 ms */
+
+struct fotg210_chip;
+
+struct fotg210_ep {
+   struct usb_ep ep;
+
+   uint maxpacket;
+   uint id;
+   uint stopped;
+
+   struct list_head  queue;
+   struct fotg210_chip  *chip;
+   const struct usb_endpoint_descriptor *desc;
+};
+
+struct fotg210_request {
+   struct usb_request req;
+   struct list_head   queue;
+   struct fotg210_ep *ep;
+};
+
+struct fotg210_chip {
+   struct usb_gadget gadget;
+   struct usb_gadget_driver *driver;
+   struct fotg210_regs  *regs;
+   uint8_t   irq;
+   uint16_t  addr;
+   int   pullup;
+   enum usb_device_state state;
+   struct fotg210_ep ep[1 + CFG_NUM_ENDPOINTS];
+};
+
+static struct usb_endpoint_descriptor ep0_desc = {
+   .bLength = sizeof(struct usb_endpoint_descriptor),
+   .bDescriptorType = USB_DT_ENDPOINT,
+   .bEndpointAddress = USB_DIR_IN,
+   .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
+};
+
+static inline int fifo_to_ep(struct fotg210_chip *chip, int id, int in)
+{
+   return (id  0) ? 0 : ((id  0x03) + 1);
+}
+
+static inline int ep_to_fifo(struct fotg210_chip *chip, int id)
+{
+   return (id = 0) ? -1 : ((id - 1)  0x03);
+}
+
+static inline int ep_reset(struct fotg210_chip *chip, uint8_t ep_addr)
+{
+   int ep = ep_addr  USB_ENDPOINT_NUMBER_MASK;
+   struct fotg210_regs *regs = chip-regs;
+
+   if (ep_addr  USB_DIR_IN) {
+   /* reset endpoint */
+   setbits_le32(regs-iep[ep - 1], IEP_RESET);
+   mdelay(1);
+   clrbits_le32(regs-iep[ep - 1], IEP_RESET);
+   /* clear endpoint stall */
+   clrbits_le32(regs-iep[ep - 1], IEP_STALL);
+   } else {
+   /* reset endpoint */
+   setbits_le32(regs-oep[ep - 1], OEP_RESET);
+   mdelay(1);
+   clrbits_le32(regs-oep[ep - 1], OEP_RESET);
+   /* clear endpoint stall */
+   clrbits_le32(regs-oep[ep - 1], OEP_STALL);
+   }
+
+   return 0;
+}
+
+static 

Re: [U-Boot] [PATCH] avr32: fix relocation address calculation

[Andreas Bießmann]

Hi Albert,

On 05/10/2013 05:09 PM, Albert ARIBAUD wrote:
 Hi Andreas,
 
 On Fri, 10 May 2013 12:57:21 +0200, Andreas Bießmann
 andreas.de...@googlemail.com wrote:
 
 Hi Albert,

 On 05/10/2013 11:24 AM, Albert ARIBAUD wrote:
 Hi Andreas,

 On Wed,  8 May 2013 11:25:17 +0200, Andreas Bießmann
 andreas.de...@googlemail.com wrote:

 Commit 1865286466a5d0c7f2e3c37632da56556c838e9e (Introduce generic link
 section.h symbol files) changed the __bss_end symbol type from char[] to
 ulong. This led to wrong relocation parameters which ended up in a not 
 working
 u-boot. Unfortunately this is not clear to see cause due to RAM aliasing we
 may get a 'half-working' u-boot then.

 Fix this by dereferencing the __bss_end symbol where needed.

 (cc:ing Simon and Tom)

 The dereferencing is correct, so this patch seems good per se (it could
 actually have applied when __bss_end was still a char[]).

 well, as I understood this the __bss_end being a char[] did implicitly
 take the address when accessing __bss_end (as we do when we have a
 definition of char foo[2] and we take just 'foo'). But you say here we
 should reference the address of __bss_end while it was still of type
 char[]. Sorry, I do not understand that, can you please clarify?
 
 There are several concepts here, some pertaining to the compiler, some
 to the linker.
 
 From the linker viewpoint, a symbol is *always* and *only* an address,
 the first address of the object corresponding to the symbol, and an
 object is just some area in the addressable space.
 
 From the compiler viewpoint, an object has a C type, possibly with an
 initial value, and a name, which is the symbol. The compiler considers
 the name/symbol to be value, not the address of the corresponding
 object... at least most of the time: as you indicate, when the symbol
 denotes a C array, then the C compiler understand the symbol as the
 address of the array.
 
 The __bss_end symbol does not actually correspond to an object in the
 usual sense, since the BSS contains all sorts of data: any C global,
 either uninitialized or initialized with zeroes, whatever its type,
 ends up in BSS. The most general way one can assign a type to BSS
 itself is by considering it as a shapeless array of bytes -- hence the
 char[] definition.
 
 Thus, the C compiler considered the name __bss_end to denote the
 address of the BSS object, and the C code for AVR32 was correct as it
 was actually referring to the BSS object's address.
 
 When the __bss_end symbol's C type was changed to 'ulong', this changed
 the way the compiler understood the symbol: it now thinks __bss_end is
 the BSS' value, which has no true sense, and certainly does not mean
 'the first 4 bytes of BSS considered as a 32-bit value'.

 To compensate this, the AVR32 code has to add an  to find the address
 of __bss_end, but the original error is to have changed the type of
 the BSS.
 
 IOW, we should *always* take the address of __bss_end, since this is
 the only thing it was defined for. We should never give it a chance to
 even *have* a value at the C level, because we don't want to read, or
 worse, write, the BSS itself; we only want to access C globals in the
 BSS.

thank you for your detailed explanation. So now its clear why referring
the address of an object of type char[] will also work.
Another question, wouldn't it make sense to declare these C globals as
const then?

Best regards

Andreas Bießmann
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Re: [U-Boot] avr32: fix relocation address calculation

[Andreas Bießmann]

Dear Andreas Bießmann,

Andreas Bießmann andreas.de...@googlemail.com writes:
Commit 1865286466a5d0c7f2e3c37632da56556c838e9e (Introduce generic link
section.h symbol files) changed the __bss_end symbol type from char[] to
ulong. This led to wrong relocation parameters which ended up in a not working
u-boot. Unfortunately this is not clear to see cause due to RAM aliasing we
may get a 'half-working' u-boot then.

Fix this by dereferencing the __bss_end symbol where needed.

Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com

---
arch/avr32/lib/board.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bießmann
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[U-Boot] [PULL] please pull u-boot-avr32/master

[Andreas Bießmann]

Dear Tom Rini,

please pull the following change from u-boot-avr/master into u-boot/master.

The following changes since commit bbd0f7e3ba66d288a2f146f1c7797801e04598ae:

  Move FDT_RAMDISK_OVERHEAD from fdt.h to libfdt_env.h (2013-05-10 19:04:50 
-0400)

are available in the git repository at:

  git://git.denx.de/u-boot-avr32.git master

for you to fetch changes up to a7e62be09189dae3a16882e53f15c38754f9db91:

  avr32: fix relocation address calculation (2013-05-13 10:35:12 +0200)


Andreas Bießmann (1):
  avr32: fix relocation address calculation

 arch/avr32/lib/board.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
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Re: [U-Boot] avr32: fix relocation address calculation

[Andreas Bießmann]

On 05/13/2013 10:38 AM, Andreas Bießmann wrote:
 Dear Andreas Bießmann,
 
 Andreas Bießmann andreas.de...@googlemail.com writes:
 Commit 1865286466a5d0c7f2e3c37632da56556c838e9e (Introduce generic link
 section.h symbol files) changed the __bss_end symbol type from char[] to
 ulong. This led to wrong relocation parameters which ended up in a not 
 working
 u-boot. Unfortunately this is not clear to see cause due to RAM aliasing we
 may get a 'half-working' u-boot then.

 Fix this by dereferencing the __bss_end symbol where needed.

 Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com

 ---
 arch/avr32/lib/board.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
 
 applied to u-boot-atmel/master, thanks!

damn scripts ... have to rework them ;)

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[U-Boot] [PATCH 0/3] ARM: atmel: add sama5d3xek board support

[Bo Shen]

This patch series add sama5d3xek board support.

Included features
  - boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector
  - boot from SPI flash support
  - boot from SD card support
  - LCD support
  - EMAC support
  - USB OHCI support

Will do
  - Add GMAC support
  - Add of control support

Changes in v3:
  - Split new pmc register in a standalone patch
  - Rebase to u-boot-atmel master branch

Changes in v2:
  - Remove unneeded #undef
  - Using string directly
  - Add missed copyright
  - Using pull up for usart Tx line
  - Using pull up for spi cs
  - make code more readable in clock.c file
  - move LCD higher 8 bit to board file (This is board related)

Bo Shen (3):
  ARM: at91: add Atmel sama5d3 SoC new pmc register
  USB: ohci-at91: support sama5d3x devices
  ARM: atmel: add sama5d3xek support

 MAINTAINERS  |1 +
 arch/arm/cpu/armv7/at91/Makefile |   52 +
 arch/arm/cpu/armv7/at91/clock.c  |  125 
 arch/arm/cpu/armv7/at91/cpu.c|   90 +
 arch/arm/cpu/armv7/at91/reset.c  |   47 +
 arch/arm/cpu/armv7/at91/sama5d3_devices.c|  196 ++
 arch/arm/cpu/armv7/at91/timer.c  |  139 +
 arch/arm/include/asm/arch-at91/at91_dbu.h|4 +
 arch/arm/include/asm/arch-at91/at91_pmc.h|   23 +++
 arch/arm/include/asm/arch-at91/clk.h |1 +
 arch/arm/include/asm/arch-at91/hardware.h|2 +
 arch/arm/include/asm/arch-at91/sama5d3.h |  212 
 arch/arm/include/asm/arch-at91/sama5d3_smc.h |   79 
 board/atmel/sama5d3xek/Makefile  |   51 +
 board/atmel/sama5d3xek/sama5d3xek.c  |  275 ++
 boards.cfg   |3 +
 drivers/usb/host/ohci-at91.c |   14 +-
 include/configs/sama5d3xek.h |  245 +++
 18 files changed, 1557 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/at91/Makefile
 create mode 100644 arch/arm/cpu/armv7/at91/clock.c
 create mode 100644 arch/arm/cpu/armv7/at91/cpu.c
 create mode 100644 arch/arm/cpu/armv7/at91/reset.c
 create mode 100644 arch/arm/cpu/armv7/at91/sama5d3_devices.c
 create mode 100644 arch/arm/cpu/armv7/at91/timer.c
 create mode 100644 arch/arm/include/asm/arch-at91/sama5d3.h
 create mode 100644 arch/arm/include/asm/arch-at91/sama5d3_smc.h
 create mode 100644 board/atmel/sama5d3xek/Makefile
 create mode 100644 board/atmel/sama5d3xek/sama5d3xek.c
 create mode 100644 include/configs/sama5d3xek.h

-- 
1.7.9.5

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[U-Boot] [PATCH 1/3] ARM: at91: add Atmel sama5d3 SoC new pmc register

[Bo Shen]

Add Atmel sama5d3 SoC new pmc register

Signed-off-by: Bo Shen voice.s...@atmel.com
---
Changes in v3:
  - New splitted patch file.

Changes in v2:
  - No change

 arch/arm/include/asm/arch-at91/at91_pmc.h |   23 +++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm/include/asm/arch-at91/at91_pmc.h 
b/arch/arm/include/asm/arch-at91/at91_pmc.h
index 086cb9b..66075b4 100644
--- a/arch/arm/include/asm/arch-at91/at91_pmc.h
+++ b/arch/arm/include/asm/arch-at91/at91_pmc.h
@@ -55,7 +55,16 @@ typedef struct at91_pmc {
u32 reserved5[21];
u32 wpmr;   /* 0xE4 Write Protect Mode Register (CAP0) */
u32 wpsr;   /* 0xE8 Write Protect Status Register (CAP0) */
+#ifdef CONFIG_SAMA5D3
+   u32 reserved6[8];
+   u32 pcer1;  /* 0x100 Periperial Clock Enable Register 1 */
+   u32 pcdr1;  /* 0x104 Periperial Clock Disable Register 1 */
+   u32 pcsr1;  /* 0x108 Periperial Clock Status Register 1 */
+   u32 pcr;/* 0x10c Periperial Control Register */
+   u32 ocr;/* 0x110 Oscillator Calibration Register */
+#else
u32 reserved8[5];
+#endif
 } at91_pmc_t;
 
 #endif /* end not assembly */
@@ -82,6 +91,16 @@ typedef struct at91_pmc {
 #define AT91_PMC_MCKR_CSS_PLLB 0x0003
 #define AT91_PMC_MCKR_CSS_MASK 0x0003
 
+#ifdef CONFIG_SAMA5D3
+#define AT91_PMC_MCKR_PRES_1   0x
+#define AT91_PMC_MCKR_PRES_2   0x0010
+#define AT91_PMC_MCKR_PRES_4   0x0020
+#define AT91_PMC_MCKR_PRES_8   0x0030
+#define AT91_PMC_MCKR_PRES_16  0x0040
+#define AT91_PMC_MCKR_PRES_32  0x0050
+#define AT91_PMC_MCKR_PRES_64  0x0060
+#define AT91_PMC_MCKR_PRES_MASK0x0070
+#else
 #define AT91_PMC_MCKR_PRES_1   0x
 #define AT91_PMC_MCKR_PRES_2   0x0004
 #define AT91_PMC_MCKR_PRES_4   0x0008
@@ -90,6 +109,7 @@ typedef struct at91_pmc {
 #define AT91_PMC_MCKR_PRES_32  0x0014
 #define AT91_PMC_MCKR_PRES_64  0x0018
 #define AT91_PMC_MCKR_PRES_MASK0x001C
+#endif
 
 #ifdef CONFIG_AT91RM9200
 #define AT91_PMC_MCKR_MDIV_1   0x
@@ -100,6 +120,9 @@ typedef struct at91_pmc {
 #else
 #define AT91_PMC_MCKR_MDIV_1   0x
 #define AT91_PMC_MCKR_MDIV_2   0x0100
+#ifdef CONFIG_SAMA5D3
+#define AT91_PMC_MCKR_MDIV_3   0x0300
+#endif
 #define AT91_PMC_MCKR_MDIV_4   0x0200
 #define AT91_PMC_MCKR_MDIV_MASK0x0300
 #endif
-- 
1.7.9.5

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[U-Boot] [PATCH 2/3] USB: ohci-at91: support sama5d3x devices

[Bo Shen]

Add OHCI support for sama5d3x devices

Signed-off-by: Bo Shen voice.s...@atmel.com
---
Changes in v3:
  - Rebase to u-boot-atmel master branch

Changes in v2:
  - No Change

 drivers/usb/host/ohci-at91.c |   14 --
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index efd711d..086cd0f 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -42,7 +42,7 @@ int usb_cpu_init(void)
while ((readl(pmc-sr)  AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
;
 #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \
-   defined(CONFIG_AT91SAM9X5)
+   defined(CONFIG_AT91SAM9X5) || defined(CONFIG_SAMA5D3)
/* Enable UPLL */
writel(readl(pmc-uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN,
pmc-uckr);
@@ -54,7 +54,12 @@ int usb_cpu_init(void)
 #endif
 
/* Enable USB host clock. */
+#ifdef CONFIG_SAMA5D3
+   writel(1  (ATMEL_ID_UHP - 32), pmc-pcer1);
+#else
writel(1  ATMEL_ID_UHP, pmc-pcer);
+#endif
+
 #ifdef CONFIG_AT91SAM9261
writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, pmc-scer);
 #else
@@ -69,7 +74,12 @@ int usb_cpu_stop(void)
at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
 
/* Disable USB host clock. */
+#ifdef CONFIG_SAMA5D3
+   writel(1  (ATMEL_ID_UHP - 32), pmc-pcdr1);
+#else
writel(1  ATMEL_ID_UHP, pmc-pcdr);
+#endif
+
 #ifdef CONFIG_AT91SAM9261
writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, pmc-scdr);
 #else
@@ -83,7 +93,7 @@ int usb_cpu_stop(void)
while ((readl(pmc-sr)  AT91_PMC_LOCKB) != 0)
;
 #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \
-   defined(CONFIG_AT91SAM9X5)
+   defined(CONFIG_AT91SAM9X5) || defined(CONFIG_SAMA5D3)
/* Disable UPLL */
writel(readl(pmc-uckr)  (~AT91_PMC_UPLLEN), pmc-uckr);
while ((readl(pmc-sr)  AT91_PMC_LOCKU) == AT91_PMC_LOCKU)
-- 
1.7.9.5

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[U-Boot] [PATCH 3/3] ARM: atmel: add sama5d3xek support

[Bo Shen]

Add sama5d3xek support with following feature
  - boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector
  - boot from SPI flash support
  - boot from SD card support
  - LCD support
  - EMAC support
  - USB OHCI support

Signed-off-by: Bo Shen voice.s...@atmel.com
---
Changes in v3:
  - Split new pmc register in a standalone patch
  - The EMAC support need: net: macb: using AT91FAMILY replace #ifdeferry
- http://patchwork.ozlabs.org/patch/239064/

Changes in v2:
  - Remove unneeded #undef
  - Using string directly
  - Add missed copyright
  - Using pull up for usart Tx line
  - Using pull up for spi cs
  - make code more readable in clock.c file
  - move LCD higher 8 bit to board file (This is board related)

 MAINTAINERS  |1 +
 arch/arm/cpu/armv7/at91/Makefile |   52 +
 arch/arm/cpu/armv7/at91/clock.c  |  125 
 arch/arm/cpu/armv7/at91/cpu.c|   90 +
 arch/arm/cpu/armv7/at91/reset.c  |   47 +
 arch/arm/cpu/armv7/at91/sama5d3_devices.c|  196 ++
 arch/arm/cpu/armv7/at91/timer.c  |  139 +
 arch/arm/include/asm/arch-at91/at91_dbu.h|4 +
 arch/arm/include/asm/arch-at91/clk.h |1 +
 arch/arm/include/asm/arch-at91/hardware.h|2 +
 arch/arm/include/asm/arch-at91/sama5d3.h |  212 
 arch/arm/include/asm/arch-at91/sama5d3_smc.h |   79 
 board/atmel/sama5d3xek/Makefile  |   51 +
 board/atmel/sama5d3xek/sama5d3xek.c  |  275 ++
 boards.cfg   |3 +
 include/configs/sama5d3xek.h |  245 +++
 16 files changed, 1522 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/at91/Makefile
 create mode 100644 arch/arm/cpu/armv7/at91/clock.c
 create mode 100644 arch/arm/cpu/armv7/at91/cpu.c
 create mode 100644 arch/arm/cpu/armv7/at91/reset.c
 create mode 100644 arch/arm/cpu/armv7/at91/sama5d3_devices.c
 create mode 100644 arch/arm/cpu/armv7/at91/timer.c
 create mode 100644 arch/arm/include/asm/arch-at91/sama5d3.h
 create mode 100644 arch/arm/include/asm/arch-at91/sama5d3_smc.h
 create mode 100644 board/atmel/sama5d3xek/Makefile
 create mode 100644 board/atmel/sama5d3xek/sama5d3xek.c
 create mode 100644 include/configs/sama5d3xek.h

diff --git a/MAINTAINERS b/MAINTAINERS
index efc2ecc..2bd0a98 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -918,6 +918,7 @@ Matt Sealey m...@genesi-usa.com
 
 Bo Shen voice.s...@atmel.com
at91sam9x5ekARM926EJS (AT91SAM9G15,G25,G35,X25,X35 SoC)
+   sama5d3xek  ARMV7 (SAMA5D31, D33, D34, D35 SoC)
 
 Rajeshwari Shinde rajeshwar...@samsung.com
 
diff --git a/arch/arm/cpu/armv7/at91/Makefile b/arch/arm/cpu/armv7/at91/Makefile
new file mode 100644
index 000..040c67d
--- /dev/null
+++ b/arch/arm/cpu/armv7/at91/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2000-2008
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# (C) Copyright 2013
+# Bo Shen voice.s...@atmel.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(SOC).o
+
+COBJS-$(CONFIG_SAMA5D3)+= sama5d3_devices.o
+COBJS-y += clock.o
+COBJS-y += cpu.o
+COBJS-y += reset.o
+COBJS-y += timer.o
+
+SRCS:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
+
+all:   $(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/armv7/at91/clock.c b/arch/arm/cpu/armv7/at91/clock.c
new file mode 100644
index 000..624b52c
--- /dev/null
+++ b/arch/arm/cpu/armv7/at91/clock.c
@@ -0,0 +1,125 @@
+/*
+ * [origin: Linux kernel linux/arch/arm/mach-at91/clock.c]
+ *
+ * Copyright (C) 2005 David Brownell
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
+ * Copyright (C) 2013 Bo Shen 

Re: [U-Boot] Question: issues for usb keyboard work with OHCI HCD

[Bo Shen]

Hi All,

On 5/6/2013 11:01, Bo Shen wrote:

Hi Marek,

On 5/3/2013 21:40, Marek Vasut wrote:

Dear Bo Shen,


Hi All,
Now, I test usb host support with Atmel boards, for example,
at91sam9x5ek board.

When test OHCI USB host with usb keyboard. I meet the following
issue.
---8---
U-Boot 2013.04-dirty (May 03 2013 - 11:00:34)

CPU: AT91SAM9G35
Crystal frequency:   12 MHz
CPU clock:  400 MHz
Master clock :  133.333 MHz
DRAM:  128 MiB
WARNING: Caches not enabled
NAND:  256 MiB
MMC:   mci: 0
In:serial
Out:   serial
Err:   serial
Net:   macb0
Hit any key to stop autoboot:  0
U-Boot usb start
(Re)start USB...
USB0:   scanning bus 0 for devices... 2 USB Device(s) found
 scanning usb for storage devices... 0 Storage Device(s) found
U-Boot setenv stdin usbkbd
U-Boot ERROR: sohci_submit_job: ENOMEM
ERROR: sohci_submit_job failed
... ...
(repeat to print these two error line)


So the USB subsystem is leaking memory? Or do you only have too small
MALLOC
area?


I am not sure whether USB subsystem is leaking memory. I am digging it.

This issue is not relative with MALLOC area.
This issue come out when all ptd[i].usb_dev (the maximum value of i is
64) is not NULL. Each time to call td_alloc, it will check whether
ptd[i].usb_dev is NULL (i from 0 to 63), if not find one of
ptd[i].usb_dev is NULL, then report ENOMEM.


All clue for this issue?


---8---

After dig the usb ohci-hcd.c driver, I found every time it call
submit_int_msg --
submit_common_msg -- sohci_submit_job, it will allocate memory for td
(just call td_alloc),
however nowhere free the td. So, after allocate 64 times (#define NUM_TD
64),
all the ptd[i].usb_dev is not NULL. So, it will report: ENOMEM.

I don't know why in sohci_return_job it call td_submit_job again?


Any advice for this question?


Any clue for this question?


---8---
static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
{
  struct ohci_regs *regs = hc-regs;

  switch (usb_pipetype(urb-pipe)) {
  case PIPE_INTERRUPT:
  /* implicitly requeued */
  if (urb-dev-irq_handle 
  (urb-dev-irq_act_len = urb-actual_length)) {
  ohci_writel(OHCI_INTR_WDH, regs-intrenable);
  ohci_readl(regs-intrenable); /* PCI posting flush */
  urb-dev-irq_handle(urb-dev);
  ohci_writel(OHCI_INTR_WDH, regs-intrdisable);
  ohci_readl(regs-intrdisable); /* PCI posting flush */
  }
  urb-actual_length = 0;
  td_submit_job(
  urb-dev,
  urb-pipe,
  urb-transfer_buffer,
  urb-transfer_buffer_length,
  NULL,
  urb,
  urb-interval);
  break
---8---
Add where should we free the allocated td to fix the issue?


If I comment the td_submit_job and add urb_free_priv(urb) here, then usb
keyboard work properly. It looks like

---8---
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 9f47351..cc60bc5 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -516,6 +516,7 @@ static inline int sohci_return_job(struct ohci *hc,
urb_priv_t *urb)
 ohci_readl(regs-intrdisable); /* PCI posting
flush */
 }
 urb-actual_length = 0;
+#if 0
 td_submit_job(
 urb-dev,
 urb-pipe,
@@ -524,6 +525,8 @@ static inline int sohci_return_job(struct ohci *hc,
urb_priv_t *urb)
 NULL,
 urb,
 urb-interval);
+#endif
+   urb_free_priv(urb);
---8---



After digging more about the USB HCD driver, I don't find any better 
solution for this issue, except this one.


So, may I submit this as an RFC patch?

Best Regards,
Bo Shen

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Re: [U-Boot] [PULL] please pull u-boot-atmel/master

[Albert ARIBAUD]

Hi Andreas,

On Sun, 12 May 2013 17:01:39 +0200, Andreas Bießmann
andreas.de...@googlemail.com wrote:

 Dear Albert Aribaud,
 
 please pull the following changes from u-boot-atmel/master into
 u-boot-arm/master.
 
 The following changes since commit cac423a730d3506154744485af1bbc1cd3a1e6a8:
 
   Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' (2013-05-11 
 22:24:28 +0200)
 
 are available in the git repository at:
 
 
   git://git.denx.de/u-boot-atmel.git master
 
 for you to fetch changes up to d0a51373131c4ba565a2391d5ed78b87c406ce98:
 
   at91sam9260ek: move board id setup to config header (2013-05-12 16:49:14 
 +0200)
 
 
 Andreas Bießmann (1):
   at91sam9260ek: move board id setup to config header
 
 Bo Shen (3):
   spi: atmel_spi: using ip version to check whether has wdrbt
   mmc: atmel_mci: using IP version for different setting
   mmc: atmel_mci: add mmc card support
 
 Wu, Josh (4):
   arm: at91: add at91sam9n12 register definition
   arm: at91: add at91sam9n12ek board support
   arm: at91: enable mci support for at91sam9g20ek.
   arm: at91: add at91sam9g20ek_mmc_config, which can save environment in 
 mmc card
 
  MAINTAINERS|3 +
  arch/arm/cpu/arm926ejs/at91/Makefile   |1 +
  arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c  |4 +
  arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c  |  177 +++
  arch/arm/cpu/arm926ejs/at91/clock.c|4 +-
  arch/arm/include/asm/arch-at91/at91_common.h   |1 +
  arch/arm/include/asm/arch-at91/at91sam9_matrix.h   |2 +-
  arch/arm/include/asm/arch-at91/at91sam9x5.h|   19 +-
  arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h |   17 +-
  arch/arm/include/asm/arch-at91/hardware.h  |2 +-
  board/atmel/at91sam9260ek/at91sam9260ek.c  |   22 +-
  board/atmel/at91sam9n12ek/Makefile |   52 +
  board/atmel/at91sam9n12ek/at91sam9n12ek.c  |  228 +++
  boards.cfg |4 +
  drivers/mmc/gen_atmel_mci.c|   47 +++-
  drivers/spi/atmel_spi.c|   15 +-
  drivers/spi/atmel_spi.h|2 +-
  include/atmel_mci.h|2 +
  include/configs/at91sam9260ek.h|   52 -
  include/configs/at91sam9n12ek.h|  232 
 
  20 files changed, 852 insertions(+), 34 deletions(-)
  create mode 100644 arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c
  create mode 100644 board/atmel/at91sam9n12ek/Makefile
  create mode 100644 board/atmel/at91sam9n12ek/at91sam9n12ek.c
  create mode 100644 include/configs/at91sam9n12ek.h

Applied to u-boot-arm/master, thanks!

Amicalement,
-- 
Albert.
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[U-Boot] [PATCH] Makefile: move the common makefile line out of the CONFIG_SPL_BUILD ifdef

[ying.zhang]

From: Ying Zhang b40...@freescale.com

Move the common makefile line that U-Boot and SPL shared to the public area,
so that we can avoid excessive SPL symbols. Some of them will be used by the
SPL later.

This patch is on top of the patch add new symbol CONFIG_SPL_ENV_SUPPORT
to replace CONFIG_SPL_NET_SUPPORT.

Signed-off-by: Ying Zhang b40...@freescale.com
---
 common/Makefile |   20 
 lib/Makefile|   13 -
 2 files changed, 16 insertions(+), 17 deletions(-)

diff --git a/common/Makefile b/common/Makefile
index 1adae03..fa1db8e 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -187,14 +187,6 @@ COBJS-$(CONFIG_CMD_ZIP) += cmd_zip.o
 COBJS-$(CONFIG_CMD_ZFS) += cmd_zfs.o
 
 # others
-ifdef CONFIG_DDR_SPD
-SPD := y
-endif
-ifdef CONFIG_SPD_EEPROM
-SPD := y
-endif
-COBJS-$(SPD) += ddr_spd.o
-COBJS-$(CONFIG_HWCONFIG) += hwconfig.o
 COBJS-$(CONFIG_BOOTSTAGE) += bootstage.o
 COBJS-$(CONFIG_CONSOLE_MUX) += iomux.o
 COBJS-y += flash.o
@@ -221,7 +213,19 @@ COBJS-$(CONFIG_SPL_ENV_SUPPORT) += env_flags.o
 COBJS-$(CONFIG_SPL_ENV_SUPPORT) += env_callback.o
 endif
 COBJS-y += cmd_nvedit.o
+#environment
+COBJS-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o
+COBJS-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o
 COBJS-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
+# others
+ifdef CONFIG_DDR_SPD
+SPD := y
+endif
+ifdef CONFIG_SPD_EEPROM
+SPD := y
+endif
+COBJS-$(SPD) += ddr_spd.o
+COBJS-$(CONFIG_HWCONFIG) += hwconfig.o
 COBJS-$(CONFIG_BOUNCE_BUFFER) += bouncebuf.o
 COBJS-y += console.o
 COBJS-y += dlmalloc.o
diff --git a/lib/Makefile b/lib/Makefile
index 8f81862..9a0d54e 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk
 LIB= $(obj)libgeneric.o
 
 ifndef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_ADDR_MAP) += addr_map.o
 COBJS-$(CONFIG_AES) += aes.o
 COBJS-$(CONFIG_BZIP2) += bzlib.o
 COBJS-$(CONFIG_BZIP2) += bzlib_crctable.o
@@ -36,13 +35,10 @@ COBJS-$(CONFIG_BZIP2) += bzlib_huffman.o
 COBJS-$(CONFIG_USB_TTY) += circbuf.o
 COBJS-y += crc7.o
 COBJS-y += crc16.o
-COBJS-y += display_options.o
-COBJS-y += errno.o
 COBJS-$(CONFIG_OF_CONTROL) += fdtdec.o
 COBJS-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o
 COBJS-$(CONFIG_GZIP) += gunzip.o
 COBJS-$(CONFIG_GZIP_COMPRESSED) += gzip.o
-COBJS-y += hashtable.o
 COBJS-y += initcall.o
 COBJS-$(CONFIG_LMB) += lmb.o
 COBJS-y += ldiv.o
@@ -60,13 +56,12 @@ endif
 ifdef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += crc16.o
 COBJS-$(CONFIG_SPL_NET_SUPPORT) += crc32.o
-ifneq ($(CONFIG_SPL_SPI_FLASH_SUPPORT)$(CONFIG_SPL_NET_SUPPORT),)
-COBJS-y += display_options.o
-endif
-COBJS-$(CONFIG_SPL_NET_SUPPORT) += errno.o
-COBJS-$(CONFIG_SPL_NET_SUPPORT) += hashtable.o
 COBJS-$(CONFIG_SPL_NET_SUPPORT) += net_utils.o
 endif
+COBJS-$(CONFIG_ADDR_MAP) += addr_map.o
+COBJS-y += hashtable.o
+COBJS-y += errno.o
+COBJS-y += display_options.o
 COBJS-$(CONFIG_BCH) += bch.o
 COBJS-y += crc32.o
 COBJS-y += ctype.o
-- 
1.7.0.4


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[U-Boot] [PATCH 1/3] ARM: at91: fix and update README.at91 document

[Bo Shen]

This patch implement following things
  - The link no longer accessable
  - Remove the error configuration command
  - Update soldered data flash memory map
  - Update at91sam9m10g45ek memory size to 128MiB

Signed-off-by: Bo Shen voice.s...@atmel.com
---
 doc/README.at91 |   23 ++-
 1 file changed, 6 insertions(+), 17 deletions(-)

diff --git a/doc/README.at91 b/doc/README.at91
index b51df00..b3d110b 100644
--- a/doc/README.at91
+++ b/doc/README.at91
@@ -1,7 +1,5 @@
 Atmel AT91 Evaluation kits
 
-http://atmel.com/dyn/products/tools.asp?family_id=605#1443
-
 I. Board mapping  boot media
 --
 AT91SAM9260EK, AT91SAM9G20EK  AT91SAM9XEEK
@@ -10,7 +8,7 @@ AT91SAM9260EK, AT91SAM9G20EK  AT91SAM9XEEK
 Memory map
0x2000 - 23FF   SDRAM (64 MB)
0xC000 - Cxxx   Atmel Dataflash card (J13)
-   0xD000 - Dxxx   Soldered Atmel Dataflash
+   0xD000 - D07F   Soldered Atmel Dataflash (AT45DB642)
 
 Environment variables
 
@@ -20,7 +18,6 @@ Environment variables
- Nand flash.
 
You can choose your storage location at config step (here for 
at91sam9260ek) :
-   make at91sam9260ek_config   - use data flash (spi 
cs1) (default)
make at91sam9260ek_nandflash_config - use nand flash
make at91sam9260ek_dataflash_cs0_config - use data flash (spi 
cs0)
make at91sam9260ek_dataflash_cs1_config - use data flash (spi 
cs1)
@@ -32,7 +29,7 @@ AT91SAM9261EK, AT91SAM9G10EK
 
 Memory map
0x2000 - 23FF   SDRAM (64 MB)
-   0xC000 - Cxxx   Soldered Atmel Dataflash
+   0xC000 - C07F   Soldered Atmel Dataflash (AT45DB642)
0xD000 - Dxxx   Atmel Dataflash card (J22)
 
 Environment variables
@@ -43,7 +40,6 @@ Environment variables
- Nand flash.
 
You can choose your storage location at config step (here for 
at91sam9260ek) :
-   make at91sam9261ek_config   - use data flash (spi 
cs0) (default)
make at91sam9261ek_nandflash_config - use nand flash
make at91sam9261ek_dataflash_cs0_config - use data flash (spi 
cs0)
make at91sam9261ek_dataflash_cs3_config - use data flash (spi 
cs3)
@@ -65,7 +61,6 @@ Environment variables
- Nor flash (not populate by default)
 
You can choose your storage location at config step (here for 
at91sam9260ek) :
-   make at91sam9263ek_config   - use data flash (spi 
cs0) (default)
make at91sam9263ek_nandflash_config - use nand flash
make at91sam9263ek_dataflash_cs0_config - use data flash (spi 
cs0)
make at91sam9263ek_norflash_config  - use nor flash
@@ -79,19 +74,15 @@ AT91SAM9M10G45EK
 --
 
 Memory map
-   0x2000 - 23FF   SDRAM (64 MB)
-   0xC000 - Cxxx   Atmel Dataflash card (J12)
+   0x7000 - 77FF   SDRAM (128 MB)
 
 Environment variables
 
U-Boot environment variables can be stored at different places:
-   - Dataflash on SPI chip select 0 (dataflash card)
- Nand flash.
 
You can choose your storage location at config step (here for 
at91sam9m10g45ek) :
-   make at91sam9m10g45ek_config- use data 
flash (spi cs0) (default)
make at91sam9m10g45ek_nandflash_config  - use nand flash
-   make at91sam9m10g45ek_dataflash_cs0_config  - use data 
flash (spi cs0)
 
 
 --
@@ -100,7 +91,7 @@ AT91SAM9RLEK
 
 Memory map
0x2000 - 23FF   SDRAM (64 MB)
-   0xC000 - Cxxx   Soldered Atmel Dataflash
+   0xC000 - C07F   Soldered Atmel Dataflash (AT45DB642)
 
 Environment variables
 
@@ -108,10 +99,8 @@ Environment variables
- Dataflash on SPI chip select 0
- Nand flash.
 
-   You can choose your storage location at config step (here for 
at91sam9260ek) :
-   make at91sam9263ek_config   - use data flash (spi 
cs0) (default)
-   make at91sam9263ek_nandflash_config - use nand flash
-   make at91sam9263ek_dataflash_cs0_config - use data flash (spi 
cs0)
+   You can choose your storage location at config step (here for 
at91sam9rlek) :
+   make at91sam9rlek_nandflash_config  - use nand flash
 
 II. Watchdog support
 
-- 
1.7.9.5

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[U-Boot] [PATCH 2/3] ARM: at91: add at91sam9x5 and sama5d3x information

[Bo Shen]

This patch add following EK information
  - at91sam9n12ek, at91sam9x5ek
  - sama5d3xek

Signed-off-by: Bo Shen voice.s...@atmel.com
---
 doc/README.at91 |   42 ++
 1 file changed, 42 insertions(+)

diff --git a/doc/README.at91 b/doc/README.at91
index b3d110b..5cf9770 100644
--- a/doc/README.at91
+++ b/doc/README.at91
@@ -102,6 +102,48 @@ Environment variables
You can choose your storage location at config step (here for 
at91sam9rlek) :
make at91sam9rlek_nandflash_config  - use nand flash
 
+
+--
+AT91SAM9N12EK, AT91SAM9X5EK
+--
+
+Memory map
+   0x2000 - 27FF   SDRAM (128 MB)
+
+Environment variables
+
+   U-Boot environment variables can be stored at different places:
+   - Nand flash.
+   - SD/MMC card
+   - Serialflash/Dataflash on SPI chip select 0
+
+   You can choose your storage location at config step (here for 
at91sam9x5ek) :
+   make at91sam9x5ek_dataflash_config  - use data flash
+   make at91sam9x5ek_mmc_config- use sd/mmc card
+   make at91sam9x5ek_nandflash_config  - use nand flash
+   make at91sam9x5ek_spiflash_config   - use serial flash
+
+
+--
+SAMA5D3XEK
+--
+
+Memory map
+   0x2000 - 3FFF   SDRAM (512 MB)
+
+Environment variables
+
+   U-Boot environment variables can be stored at different places:
+   - Nand flash.
+   - SD/MMC card
+   - Serialflash on SPI chip select 0
+
+   You can choose your storage location at config step (here for 
sama5d3xek) :
+   make sama5d3xek_mmc_config  - use SD/MMC card
+   make sama5d3xek_nandflash_config- use nand flash
+   make sama5d3xek_serialflash_config  - use serial flash
+
+
 II. Watchdog support
 
For security reasons, the at91 watchdog is running at boot time and,
-- 
1.7.9.5

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[U-Boot] [PATCH 3/3] ARM: at91: add NAND partition table and index

[Bo Shen]

Add NAND partition table, EK board support boot up NAND flash using
the same NAND partition table

Add Index in this file

Signed-off-by: Bo Shen voice.s...@atmel.com
---
 doc/README.at91 |   21 -
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/doc/README.at91 b/doc/README.at91
index 5cf9770..6741213 100644
--- a/doc/README.at91
+++ b/doc/README.at91
@@ -1,5 +1,10 @@
 Atmel AT91 Evaluation kits
 
+Index
+  - I. Board mapping  boot media
+  - II. NAND partition table
+  - III. watchdog support
+
 I. Board mapping  boot media
 --
 AT91SAM9260EK, AT91SAM9G20EK  AT91SAM9XEEK
@@ -144,7 +149,21 @@ Environment variables
make sama5d3xek_serialflash_config  - use serial flash
 
 
-II. Watchdog support
+II. NAND partition table
+
+   All the board support boot from NAND flash will use the following NAND
+   partition table
+
+   0x - 0x0003 bootstrap   (256 KiB)
+   0x0004 - 0x000B u-boot  (512 KiB)
+   0x000C - 0x000F env (256 KiB)
+   0x0010 - 0x0013 env_redundant   (256 KiB)
+   0x0014 - 0x0017 spare   (256 KiB)
+   0x0018 - 0x001F dtb (512 KiB)
+   0x0020 - 0x007F kernel  (6 MiB)
+   0x0080 - 0x rootfs  (All left)
+
+III. Watchdog support
 
For security reasons, the at91 watchdog is running at boot time and,
if deactivated, cannot be used anymore.
-- 
1.7.9.5

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[U-Boot] [PATCH 0/3] ARM: at91: fix and update README.at91 file

[Bo Shen]

This patch series fix and update README.at91 file

Bo Shen (3):
  ARM: at91: fix and update README.at91 document
  ARM: at91: add at91sam9x5 and sama5d3x information
  ARM: at91: add NAND partition table and index

 doc/README.at91 |   84 ---
 1 file changed, 67 insertions(+), 17 deletions(-)

-- 
1.7.9.5

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Re: [U-Boot] [PATCH] powerpc/p1022ds: boot from SD card/SPI flash with SPL

[Zhang Ying-B40530]

 diff --git a/spl/Makefile b/spl/Makefile
 index b5a8de7..3a3b868 100644
 --- a/spl/Makefile
 +++ b/spl/Makefile
 @@ -51,6 +51,9 @@ LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
  endif
  ifeq ($(CPU),mpc85xx)
  LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
 +ifdef CONFIG_SPL_INIT_DDR_SUPPORT
 +LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
 +endif

Why isn't this handled as part of lib8xxx.o?  We should avoid putting
hardware-specific things in generic Makefiles.  There ones that are
already there should be fixed at some point.
[Zhang Ying] 
Do you mean that all things of the directory  arch/powerpc/cpu/mpc8xxx/ddr 
will be moved to the directory arch/powerpc/cpu/mpc8xxx/?

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Re: [U-Boot] [PATCH] .gitignore: add GNU GLOBAL files

[Wolfgang Denk]

Dear Masahiro Yamada,

In message 1368418445-18722-1-git-send-email-yamad...@jp.panasonic.com you 
wrote:
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 ---
  .gitignore |6 ++
  1 file changed, 6 insertions(+)
 
 diff --git a/.gitignore b/.gitignore
 index ed21203..4116448 100644
 --- a/.gitignore
 +++ b/.gitignore
 @@ -79,5 +79,11 @@ cscope.*
  /ctags
  /etags
  
 +# gnu global files
 +GPATH
 +GRTAGS
 +GSYMS
 +GTAGS

Please excuse my ignorance - but which tool would create such files?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
In the beginning there was nothing.
And the Lord said Let There Be Light!
And still there was nothing, but at least now you could see it.
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[U-Boot] [PATCH 1/2] usb: Use get_unaligned() in usb_endpoint_maxp() for wMaxPacketSize

[Vivek Gautam]

Use unaligned access to fetch wMaxPacketSize in usb_endpoint_maxp()
api.
In its absence we see following data abort message:
==
data abort

MAYBE you should read doc/README.arm-unaligned-accesses

pc : [bf794e24]  lr : [bf794e1c]
sp : bf37c7b0  ip : 002f fp : 
r10:   r9 : 0002 r8 : bf37fecc
r7 : 0001  r6 : bf7d8931 r5 : bf7d891c  r4 : bf7d8800
r3 : bf7d65b0  r2 : 0002 r1 : bf7d65b4  r0 : 0027
Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...

resetting ...
==

Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Ilya Yanok ilya.ya...@cogentembedded.com
Cc: Marek Vasut ma...@denx.de
---

Based on u-boot-usb/next. Tested with 'u-boot-usb/master' branch.

 include/linux/usb/ch9.h |3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index d1d732c..bd48704 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -35,6 +35,7 @@
 
 #include linux/types.h   /* __u8 etc */
 #include asm/byteorder.h /* le16_to_cpu */
+#include asm/unaligned.h /* get_unaligned() */
 
 /*-*/
 
@@ -596,7 +597,7 @@ static inline int usb_endpoint_is_isoc_out(
  */
 static inline int usb_endpoint_maxp(const struct usb_endpoint_descriptor *epd)
 {
-   return __le16_to_cpu(epd-wMaxPacketSize);
+   return __le16_to_cpu(get_unaligned(epd-wMaxPacketSize));
 }
 
 static inline int usb_endpoint_interrupt_type(
-- 
1.7.6.5

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[U-Boot] [PATCH 2/2] usb: gadget: Use unaligned access for wMaxPacketSize

[Vivek Gautam]

Use get_unaligned() while fetching wMaxPacketSize to avoid
voilating any alignment rules.

Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Piotr Wilczek p.wilc...@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Lukasz Dalek luk0...@gmail.com
Cc: Marek Vasut ma...@denx.de
---

Just did a build test on u-boot-usb/master branch.
Need to be tested further.

Based on u-boot-usb/next.

 drivers/usb/gadget/f_mass_storage.c |3 ++-
 drivers/usb/gadget/pxa25x_udc.c |   13 +++--
 2 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/usb/gadget/f_mass_storage.c 
b/drivers/usb/gadget/f_mass_storage.c
index c28866f..45bc132 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -2261,7 +2261,8 @@ reset:
if (rc)
goto reset;
fsg-bulk_out_enabled = 1;
-   common-bulk_out_maxpacket = le16_to_cpu(d-wMaxPacketSize);
+   common-bulk_out_maxpacket =
+   le16_to_cpu(get_unaligned(d-wMaxPacketSize));
clear_bit(IGNORE_BULK_OUT, fsg-atomic_bitflags);
 
/* Allocate the requests */
diff --git a/drivers/usb/gadget/pxa25x_udc.c b/drivers/usb/gadget/pxa25x_udc.c
index 9ce98f0..085503d 100644
--- a/drivers/usb/gadget/pxa25x_udc.c
+++ b/drivers/usb/gadget/pxa25x_udc.c
@@ -314,7 +314,8 @@ static int pxa25x_ep_enable(struct usb_ep *_ep,
if (!_ep || !desc || ep-desc || _ep-name == ep0name
|| desc-bDescriptorType != USB_DT_ENDPOINT
|| ep-bEndpointAddress != desc-bEndpointAddress
-   || ep-fifo_size  le16_to_cpu(desc-wMaxPacketSize)) {
+   || ep-fifo_size 
+  le16_to_cpu(get_unaligned(desc-wMaxPacketSize))) {
printf(%s, bad ep or descriptor\n, __func__);
return -EINVAL;
}
@@ -329,9 +330,9 @@ static int pxa25x_ep_enable(struct usb_ep *_ep,
 
/* hardware _could_ do smaller, but driver doesn't */
if ((desc-bmAttributes == USB_ENDPOINT_XFER_BULK
-le16_to_cpu(desc-wMaxPacketSize)
+le16_to_cpu(get_unaligned(desc-wMaxPacketSize))
!= BULK_FIFO_SIZE)
-   || !desc-wMaxPacketSize) {
+   || !get_unaligned(desc-wMaxPacketSize)) {
printf(%s, bad %s maxpacket\n, __func__, _ep-name);
return -ERANGE;
}
@@ -345,7 +346,7 @@ static int pxa25x_ep_enable(struct usb_ep *_ep,
ep-desc = desc;
ep-stopped = 0;
ep-pio_irqs = 0;
-   ep-ep.maxpacket = le16_to_cpu(desc-wMaxPacketSize);
+   ep-ep.maxpacket = le16_to_cpu(get_unaligned(desc-wMaxPacketSize));
 
/* flush fifo (mostly for OUT buffers) */
pxa25x_ep_fifo_flush(_ep);
@@ -485,7 +486,7 @@ write_fifo(struct pxa25x_ep *ep, struct pxa25x_request *req)
 {
unsigned max;
 
-   max = le16_to_cpu(ep-desc-wMaxPacketSize);
+   max = le16_to_cpu(get_unaligned(ep-desc-wMaxPacketSize));
do {
unsigned count;
int is_last, is_short;
@@ -766,7 +767,7 @@ pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request 
*_req, gfp_t gfp_flags)
 */
if (unlikely(ep-bmAttributes == USB_ENDPOINT_XFER_ISOC
 req-req.length 
-   le16_to_cpu(ep-desc-wMaxPacketSize)))
+   le16_to_cpu(get_unaligned(ep-desc-wMaxPacketSize
return -EMSGSIZE;
 
debug_cond(NOISY, %s queue req %p, len %d buf %p\n,
-- 
1.7.6.5

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Re: [U-Boot] [PATCH] .gitignore: add GNU GLOBAL files

[Masahiro Yamada]

Hi, Wolfgang Denk.

 Please excuse my ignorance - but which tool would create such files?

GNU GLOBAL creates them.
Please refer to http://www.gnu.org/software/global/

Please see Linux Kernel topleve .gitignore too.
The following lines are included.

 +# gnu global files
 +GPATH
 +GRTAGS
 +GSYMS
 +GTAGS



Best Regards
Masahiro Yamada

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Re: [U-Boot] [PATCH 2/2] usb: gadget: Use unaligned access for wMaxPacketSize

[Kyungmin Park]

On Mon, May 13, 2013 at 7:23 PM, Vivek Gautam gautam.vi...@samsung.comwrote:

 Use get_unaligned() while fetching wMaxPacketSize to avoid
 voilating any alignment rules.


It's another story, can we get performance gain with unaligned access
feature? In case of kernel, we got some gains.

Anyway, good job!

Acked-by: Kyungmin Park kyungmin.p...@samsung.com


 Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
 Cc: Lukasz Majewski l.majew...@samsung.com
 Cc: Piotr Wilczek p.wilc...@samsung.com
 Cc: Kyungmin Park kyungmin.p...@samsung.com
 Cc: Lukasz Dalek luk0...@gmail.com
 Cc: Marek Vasut ma...@denx.de
 ---

 Just did a build test on u-boot-usb/master branch.
 Need to be tested further.

 Based on u-boot-usb/next.

  drivers/usb/gadget/f_mass_storage.c |3 ++-
  drivers/usb/gadget/pxa25x_udc.c |   13 +++--
  2 files changed, 9 insertions(+), 7 deletions(-)

 diff --git a/drivers/usb/gadget/f_mass_storage.c
 b/drivers/usb/gadget/f_mass_storage.c
 index c28866f..45bc132 100644
 --- a/drivers/usb/gadget/f_mass_storage.c
 +++ b/drivers/usb/gadget/f_mass_storage.c
 @@ -2261,7 +2261,8 @@ reset:
 if (rc)
 goto reset;
 fsg-bulk_out_enabled = 1;
 -   common-bulk_out_maxpacket = le16_to_cpu(d-wMaxPacketSize);
 +   common-bulk_out_maxpacket =
 +
 le16_to_cpu(get_unaligned(d-wMaxPacketSize));
 clear_bit(IGNORE_BULK_OUT, fsg-atomic_bitflags);

 /* Allocate the requests */
 diff --git a/drivers/usb/gadget/pxa25x_udc.c
 b/drivers/usb/gadget/pxa25x_udc.c
 index 9ce98f0..085503d 100644
 --- a/drivers/usb/gadget/pxa25x_udc.c
 +++ b/drivers/usb/gadget/pxa25x_udc.c
 @@ -314,7 +314,8 @@ static int pxa25x_ep_enable(struct usb_ep *_ep,
 if (!_ep || !desc || ep-desc || _ep-name == ep0name
 || desc-bDescriptorType != USB_DT_ENDPOINT
 || ep-bEndpointAddress != desc-bEndpointAddress
 -   || ep-fifo_size 
 le16_to_cpu(desc-wMaxPacketSize)) {
 +   || ep-fifo_size 
 +
  le16_to_cpu(get_unaligned(desc-wMaxPacketSize))) {
 printf(%s, bad ep or descriptor\n, __func__);
 return -EINVAL;
 }
 @@ -329,9 +330,9 @@ static int pxa25x_ep_enable(struct usb_ep *_ep,

 /* hardware _could_ do smaller, but driver doesn't */
 if ((desc-bmAttributes == USB_ENDPOINT_XFER_BULK
 -le16_to_cpu(desc-wMaxPacketSize)
 +   
 le16_to_cpu(get_unaligned(desc-wMaxPacketSize))
 != BULK_FIFO_SIZE)
 -   || !desc-wMaxPacketSize) {
 +   || !get_unaligned(desc-wMaxPacketSize)) {
 printf(%s, bad %s maxpacket\n, __func__, _ep-name);
 return -ERANGE;
 }
 @@ -345,7 +346,7 @@ static int pxa25x_ep_enable(struct usb_ep *_ep,
 ep-desc = desc;
 ep-stopped = 0;
 ep-pio_irqs = 0;
 -   ep-ep.maxpacket = le16_to_cpu(desc-wMaxPacketSize);
 +   ep-ep.maxpacket =
 le16_to_cpu(get_unaligned(desc-wMaxPacketSize));

 /* flush fifo (mostly for OUT buffers) */
 pxa25x_ep_fifo_flush(_ep);
 @@ -485,7 +486,7 @@ write_fifo(struct pxa25x_ep *ep, struct pxa25x_request
 *req)
  {
 unsigned max;

 -   max = le16_to_cpu(ep-desc-wMaxPacketSize);
 +   max = le16_to_cpu(get_unaligned(ep-desc-wMaxPacketSize));
 do {
 unsigned count;
 int is_last, is_short;
 @@ -766,7 +767,7 @@ pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request
 *_req, gfp_t gfp_flags)
  */
 if (unlikely(ep-bmAttributes == USB_ENDPOINT_XFER_ISOC
  req-req.length 
 -   le16_to_cpu(ep-desc-wMaxPacketSize)))
 +
 le16_to_cpu(get_unaligned(ep-desc-wMaxPacketSize
 return -EMSGSIZE;

 debug_cond(NOISY, %s queue req %p, len %d buf %p\n,
 --
 1.7.6.5

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Re: [U-Boot] [PATCH] avr32: fix relocation address calculation

[Albert ARIBAUD]

Hi Andreas,

On Mon, 13 May 2013 10:35:12 +0200, Andreas Bießmann
andreas.de...@googlemail.com wrote:

 Hi Albert,
 
 On 05/10/2013 05:09 PM, Albert ARIBAUD wrote:
  Hi Andreas,
  
  On Fri, 10 May 2013 12:57:21 +0200, Andreas Bießmann
  andreas.de...@googlemail.com wrote:
  
  Hi Albert,
 
  On 05/10/2013 11:24 AM, Albert ARIBAUD wrote:
  Hi Andreas,
 
  On Wed,  8 May 2013 11:25:17 +0200, Andreas Bießmann
  andreas.de...@googlemail.com wrote:
 
  Commit 1865286466a5d0c7f2e3c37632da56556c838e9e (Introduce generic link
  section.h symbol files) changed the __bss_end symbol type from char[] to
  ulong. This led to wrong relocation parameters which ended up in a not 
  working
  u-boot. Unfortunately this is not clear to see cause due to RAM aliasing 
  we
  may get a 'half-working' u-boot then.
 
  Fix this by dereferencing the __bss_end symbol where needed.
 
  (cc:ing Simon and Tom)
 
  The dereferencing is correct, so this patch seems good per se (it could
  actually have applied when __bss_end was still a char[]).
 
  well, as I understood this the __bss_end being a char[] did implicitly
  take the address when accessing __bss_end (as we do when we have a
  definition of char foo[2] and we take just 'foo'). But you say here we
  should reference the address of __bss_end while it was still of type
  char[]. Sorry, I do not understand that, can you please clarify?
  
  There are several concepts here, some pertaining to the compiler, some
  to the linker.
  
  From the linker viewpoint, a symbol is *always* and *only* an address,
  the first address of the object corresponding to the symbol, and an
  object is just some area in the addressable space.
  
  From the compiler viewpoint, an object has a C type, possibly with an
  initial value, and a name, which is the symbol. The compiler considers
  the name/symbol to be value, not the address of the corresponding
  object... at least most of the time: as you indicate, when the symbol
  denotes a C array, then the C compiler understand the symbol as the
  address of the array.
  
  The __bss_end symbol does not actually correspond to an object in the
  usual sense, since the BSS contains all sorts of data: any C global,
  either uninitialized or initialized with zeroes, whatever its type,
  ends up in BSS. The most general way one can assign a type to BSS
  itself is by considering it as a shapeless array of bytes -- hence the
  char[] definition.
  
  Thus, the C compiler considered the name __bss_end to denote the
  address of the BSS object, and the C code for AVR32 was correct as it
  was actually referring to the BSS object's address.
  
  When the __bss_end symbol's C type was changed to 'ulong', this changed
  the way the compiler understood the symbol: it now thinks __bss_end is
  the BSS' value, which has no true sense, and certainly does not mean
  'the first 4 bytes of BSS considered as a 32-bit value'.
 
  To compensate this, the AVR32 code has to add an  to find the address
  of __bss_end, but the original error is to have changed the type of
  the BSS.
  
  IOW, we should *always* take the address of __bss_end, since this is
  the only thing it was defined for. We should never give it a chance to
  even *have* a value at the C level, because we don't want to read, or
  worse, write, the BSS itself; we only want to access C globals in the
  BSS.
 
 thank you for your detailed explanation. So now its clear why referring
 the address of an object of type char[] will also work.
 Another question, wouldn't it make sense to declare these C globals as
 const then?

Indeed, const may help prevent these symbols from being accidentally
written into, at least in the most expected cases such as passing
__bss_end to a function expecting a non-const char*.

There is, however, a much better way of preventing this and more:
just give these symbols a C type of 'struct {}' (empty struct).

Since this type has absolutely no field which could be written into or
read from, it is completely protected from direct write but also
from direct read; and a pointer to it has type struct {} * which
is incompatible with any other pointer, so any inconsiderate use of it
is detected at compile time.

I had thought of the 'struct {}' method for linker lists refactoring,
when I needed a zero-size type; I finally turned to char[0] instead
(and comment on this at line 150 of include/linker_lists.h) because the
struct method would cause gcc 4.4 and earlier, such as eldk42, to throw
diagnostics like warning: dereferencing type-punned pointer will break
strict-aliasing rules -- that is the incompatibility I am talking
about.

Note that the diagnostics did not stem from the empty struct variable
declarations as such, but type-casting the address of an empty struct
into a pointer to a known, non-empty, struct; I just checked now, and
doing an intermediate cast to char* or void* prevents the warnings.
Why I failed to find this when I was refactoring linker lists, I'll
never know.

Of 

Re: [U-Boot] [PATCH] avr32: fix relocation address calculation

[Albert ARIBAUD]

On Fri, 10 May 2013 11:24:44 +0200, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:

 Sorry for not spotting this before it was merged in; but now this must
 be fixed. I'm ok with the wrongly-ulong symbols being changed back to
 char[], though I would prefer their type to be char[0] if possible, as
 this is (admittedly marginally) more likely to help the compiler catch
 accidental dereferencings.

Following the latest exchange with Andreas, and after some tests with
eldk42 and a gcc 4.7 toolchain, I amend the previous paragraph: rather
than 'char[0]', I suggest using 'struct {}'.

Amicalement,
-- 
Albert.
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Re: [U-Boot] [PATCH 2/2] usb: gadget: Use unaligned access for wMaxPacketSize

[Vivek Gautam]

Hi,


On Mon, May 13, 2013 at 4:20 PM, Kyungmin Park kmp...@infradead.org wrote:
 On Mon, May 13, 2013 at 7:23 PM, Vivek Gautam gautam.vi...@samsung.comwrote:

 Use get_unaligned() while fetching wMaxPacketSize to avoid
 voilating any alignment rules.

typo here s/voilating/violating



 It's another story, can we get performance gain with unaligned access
 feature? In case of kernel, we got some gains.

This change was necessary since we get data abort if we try to fetch
wMaxPacketSize
which violates the natural alignment rules being a member of struct
usb_endpoint_descriptor.

I am not sure of the performance gains with this. However, if you can
guide me how to
measure that, we can get the numbers if any.


 Anyway, good job!

Thanks !


 Acked-by: Kyungmin Park kyungmin.p...@samsung.com


 Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
 Cc: Lukasz Majewski l.majew...@samsung.com
 Cc: Piotr Wilczek p.wilc...@samsung.com
 Cc: Kyungmin Park kyungmin.p...@samsung.com
 Cc: Lukasz Dalek luk0...@gmail.com
 Cc: Marek Vasut ma...@denx.de
 ---

 Just did a build test on u-boot-usb/master branch.
 Need to be tested further.

 Based on u-boot-usb/next.

  drivers/usb/gadget/f_mass_storage.c |3 ++-
  drivers/usb/gadget/pxa25x_udc.c |   13 +++--
  2 files changed, 9 insertions(+), 7 deletions(-)

 diff --git a/drivers/usb/gadget/f_mass_storage.c
 b/drivers/usb/gadget/f_mass_storage.c
 index c28866f..45bc132 100644
 --- a/drivers/usb/gadget/f_mass_storage.c
 +++ b/drivers/usb/gadget/f_mass_storage.c
 @@ -2261,7 +2261,8 @@ reset:
 if (rc)
 goto reset;
 fsg-bulk_out_enabled = 1;
 -   common-bulk_out_maxpacket = le16_to_cpu(d-wMaxPacketSize);
 +   common-bulk_out_maxpacket =
 +
 le16_to_cpu(get_unaligned(d-wMaxPacketSize));
 clear_bit(IGNORE_BULK_OUT, fsg-atomic_bitflags);

 /* Allocate the requests */
 diff --git a/drivers/usb/gadget/pxa25x_udc.c
 b/drivers/usb/gadget/pxa25x_udc.c
 index 9ce98f0..085503d 100644
 --- a/drivers/usb/gadget/pxa25x_udc.c
 +++ b/drivers/usb/gadget/pxa25x_udc.c
 @@ -314,7 +314,8 @@ static int pxa25x_ep_enable(struct usb_ep *_ep,
 if (!_ep || !desc || ep-desc || _ep-name == ep0name
 || desc-bDescriptorType != USB_DT_ENDPOINT
 || ep-bEndpointAddress != desc-bEndpointAddress
 -   || ep-fifo_size 
 le16_to_cpu(desc-wMaxPacketSize)) {
 +   || ep-fifo_size 
 +
  le16_to_cpu(get_unaligned(desc-wMaxPacketSize))) {
 printf(%s, bad ep or descriptor\n, __func__);
 return -EINVAL;
 }
 @@ -329,9 +330,9 @@ static int pxa25x_ep_enable(struct usb_ep *_ep,

 /* hardware _could_ do smaller, but driver doesn't */
 if ((desc-bmAttributes == USB_ENDPOINT_XFER_BULK
 -le16_to_cpu(desc-wMaxPacketSize)
 +   
 le16_to_cpu(get_unaligned(desc-wMaxPacketSize))
 != BULK_FIFO_SIZE)
 -   || !desc-wMaxPacketSize) {
 +   || !get_unaligned(desc-wMaxPacketSize)) {
 printf(%s, bad %s maxpacket\n, __func__, _ep-name);
 return -ERANGE;
 }
 @@ -345,7 +346,7 @@ static int pxa25x_ep_enable(struct usb_ep *_ep,
 ep-desc = desc;
 ep-stopped = 0;
 ep-pio_irqs = 0;
 -   ep-ep.maxpacket = le16_to_cpu(desc-wMaxPacketSize);
 +   ep-ep.maxpacket =
 le16_to_cpu(get_unaligned(desc-wMaxPacketSize));

 /* flush fifo (mostly for OUT buffers) */
 pxa25x_ep_fifo_flush(_ep);
 @@ -485,7 +486,7 @@ write_fifo(struct pxa25x_ep *ep, struct pxa25x_request
 *req)
  {
 unsigned max;

 -   max = le16_to_cpu(ep-desc-wMaxPacketSize);
 +   max = le16_to_cpu(get_unaligned(ep-desc-wMaxPacketSize));
 do {
 unsigned count;
 int is_last, is_short;
 @@ -766,7 +767,7 @@ pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request
 *_req, gfp_t gfp_flags)
  */
 if (unlikely(ep-bmAttributes == USB_ENDPOINT_XFER_ISOC
  req-req.length 
 -   le16_to_cpu(ep-desc-wMaxPacketSize)))
 +
 le16_to_cpu(get_unaligned(ep-desc-wMaxPacketSize
 return -EMSGSIZE;

 debug_cond(NOISY, %s queue req %p, len %d buf %p\n,
 --
 1.7.6.5

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-- 
Best Regards
Vivek
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Re: [U-Boot] [PATCH 2/2] usb: gadget: Use unaligned access for wMaxPacketSize

[Albert ARIBAUD]

Hi Kyungmin,

On Mon, 13 May 2013 19:50:28 +0900, Kyungmin Park
kmp...@infradead.org wrote:

 On Mon, May 13, 2013 at 7:23 PM, Vivek Gautam gautam.vi...@samsung.comwrote:
 
  Use get_unaligned() while fetching wMaxPacketSize to avoid
  voilating any alignment rules.
 
 
 It's another story, can we get performance gain with unaligned access
 feature? In case of kernel, we got some gains.

Please do not forget that U-Boot does not run on ARMv7+ only; it runs
on many ARM generations and on many non-ARM architectures too. Some of
these targets have a severe penalty on unaligned access; some cannot
even perform unaligned accesses.

File drivers/usb/gadget/f_mass_storage.c is generic and must build and
run for such targets too.

The best approach is to properly align fields wherever possible, and
when not possible, to use unaligned access macros (and if posisble
detect unaligned accesses at runtime).

Amicalement,
-- 
Albert.
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[U-Boot] [PATCH 0/2] Add support for Congatec Conga-QEVAl board

[SARTRE Leo]

 This patch add support for Congatec Conga-QEVAl Evaluation Carrier
 Board with a conga-Qmx6 module, more information can be found on the
 official website:
 http://www.congatec.com/en/products/accessories/dView/conga-qeval.html
 Files are based on the sabrelite configuration files because it uses
 the same processor i.MX6Q from Freescale.
 This patch provide also a README that shortly explain how to boot from
 SD on this board.

Leo Sartre (2):
  Add minimal support for Congatec Conga-QEVAl Evaluation Carrier Board
with a conga-Qmx6 module.
  Add instruction file (based on the README for the sabrelite) for
booting the Congatec board from SD-Card.
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[U-Boot] [PATCH] Add minimal support for Congatec Conga-QEVAl Evaluation Carrier Board with a conga-Qmx6 module.

[SARTRE Leo]

Signed-off-by: Leo Sartre lsar...@adeneo-embedded.com
---
 board/freescale/cgtqmx6/Makefile  |   42 +++
 board/freescale/cgtqmx6/cgtqmx6.c |  627 +
 boards.cfg|1 +
 include/configs/cgtqmx6.h |  294 +
 4 files changed, 964 insertions(+)
 create mode 100644 board/freescale/cgtqmx6/Makefile
 create mode 100644 board/freescale/cgtqmx6/cgtqmx6.c
 create mode 100644 include/configs/cgtqmx6.h

diff --git a/board/freescale/cgtqmx6/Makefile b/board/freescale/cgtqmx6/Makefile
new file mode 100644
index 000..a17603e
--- /dev/null
+++ b/board/freescale/cgtqmx6/Makefile
@@ -0,0 +1,41 @@
+#
+# Copyright (C) 2007, Guennadi Liakhovetski l...@denx.de
+#
+# (C) Copyright 2013 Adeneo Embedded www.adeneo-embedded.com
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  := cgtqmx6.o
+
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/freescale/cgtqmx6/cgtqmx6.c 
b/board/freescale/cgtqmx6/cgtqmx6.c
new file mode 100644
index 000..ed5476a
--- /dev/null
+++ b/board/freescale/cgtqmx6/cgtqmx6.c
@@ -0,0 +1,630 @@
+/*
+ * Copyright (C) 2013, Adeneo Embedded www.adeneo-embedded.com
+ * Leo Sartre, lsar...@adeneo-embedded.com
+ * Based on mx6qsabrelite.c file
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/imx-regs.h
+#include asm/arch/iomux.h
+#include asm/arch/mx6-pins.h
+#include asm/errno.h
+#include asm/gpio.h
+#include asm/imx-common/iomux-v3.h
+#include asm/imx-common/mxc_i2c.h
+#include asm/imx-common/boot_mode.h
+#include mmc.h
+#include fsl_esdhc.h
+#include malloc.h
+#include linux/fb.h
+#include ipu_pixfmt.h
+#include asm/arch/crm_regs.h
+#include asm/arch/mxc_hdmi.h
+#include i2c.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |\
+   PAD_CTL_PUS_100K_UP |\
+   PAD_CTL_SPEED_MED   |\
+   PAD_CTL_DSE_40ohm   |\
+   PAD_CTL_SRE_FAST|\
+   PAD_CTL_HYS)
+
+#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |\
+   PAD_CTL_PUS_47K_UP  |\
+   PAD_CTL_SPEED_LOW   |\
+   PAD_CTL_DSE_80ohm   |\
+   PAD_CTL_SRE_FAST|\
+   PAD_CTL_HYS)
+
+#define SPI_PAD_CTRL (PAD_CTL_HYS |\
+ PAD_CTL_PUS_100K_DOWN |\
+ PAD_CTL_SPEED_MED |\
+ PAD_CTL_DSE_40ohm |\
+ PAD_CTL_SRE_FAST)
+
+#define BUTTON_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |\
+PAD_CTL_PUS_100K_UP |\
+PAD_CTL_SPEED_MED   |\
+PAD_CTL_DSE_40ohm   |\
+   

[U-Boot] [PATCH 2/2] Add instruction file (based on the README for the sabrelite) for booting the Congatec board from SD-Card.

[SARTRE Leo]

Signed-off-by: Leo Sartre lsar...@adeneo-embedded.com
---
 board/freescale/cgtqmx6/README |   35 +++
 1 file changed, 35 insertions(+)
 create mode 100644 board/freescale/cgtqmx6/README

diff --git a/board/freescale/cgtqmx6/README b/board/freescale/cgtqmx6/README
new file mode 100644
index 000..bcacc71
--- /dev/null
+++ b/board/freescale/cgtqmx6/README
@@ -0,1 +1,35 @@
+U-Boot for the Congatec Conga-QEVAl Evaluation Carrier board
+
+This file contains information for the port of U-Boot to the Congatec
+Conga-QEVAl Evaluation Carrier board.
+
+1. Boot source, boot from SD card
+-
+
+This version of u-boot works only on the SD card. By default, the
+Congatec board boot from the SPI-NOR.
+With the uboot version provided with the board you can write boot
+registers to force the board to reboot and boot from the SD slot:
+
+conga-QMX6 U-Boot  mw.l 0x20d8040 0x3850
+conga-QMX6 U-Boot  mw.l 0x020d8044 0x1000
+conga-QMX6 U-Boot  reset
+resetting ...
+
+The the board will reboot and, if you burnt your SD correctly the
+board (see (2) for instructions) will use u-boot that live into the SD
+card.
+
+2. Build
+
+
+To build U-Boot for the Congatec board:
+
+ make cgtqmx6_config
+ make u-boot.imx
+
+To copy the resulting u-boot.imx to the SD card:
+
+ sudo dd if=u-boot.imx of=/dev/sXx bs=512 seek=2sudo sync
+
+Note: Replace sXx with the device representing the SD card in your system.
-- 
1.7.10.4
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Re: [U-Boot] [PATCH 2/2] usb: gadget: Use unaligned access for wMaxPacketSize

[Łukasz Dałek]

On 13.05.2013 12:23, Vivek Gautam wrote:

Use get_unaligned() while fetching wMaxPacketSize to avoid
voilating any alignment rules.

Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Piotr Wilczek p.wilc...@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Lukasz Dalek luk0...@gmail.com
Cc: Marek Vasut ma...@denx.de
---

Just did a build test on u-boot-usb/master branch.
Need to be tested further.

Based on u-boot-usb/next.

  drivers/usb/gadget/f_mass_storage.c |3 ++-
  drivers/usb/gadget/pxa25x_udc.c |   13 +++--
  2 files changed, 9 insertions(+), 7 deletions(-)


Tested pxa25x_udc.c on u-boot/master on h2200 (PXA255) and works fine.

Yours sincerely,
Lukasz Dalek
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Re: [U-Boot] [PATCH 3/6] am335x_evm: Only set CONFIG_NAND when !CONFIG_SPI_BOOT

[Tom Rini]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 05/12/2013 05:08 PM, Peter Korsgaard wrote:
 Tom == Tom Rini tr...@ti.com writes:
 
 Tom Due to hardware design, we can't have NAND present (as we know
 of NAND Tom today) when booting from SPI, so disable NAND then as
 that simplifies Tom logic.
 
 Sorry, this description is not clear to me. I didn't check in
 detail, but as far as I remember the default pins for spi0 don't
 conflict with gmpc.
 
 It's also not quite clear to me if you refer to SW support fo
 NAND flash or the hardware component when you say 'NAND' above.

OK, good point.  I'm talking about HW support, and it should be
spelled put better.  Note that we're talking about the TI GP EVM, EVM
SK, BeagleBone White and BeagleBone Black here, and not custom
hardware.  The EVM SK does not allow for expansion such as adding
NAND/NOR flash and probably not SPI.  The GP EVM can have only one of
NOR, NAND or SPI flash active based on the profile that is selected
for the whole hardware stack.  The BeagleBone White may have a memory
cape installed which in turn can have a NAND, NOR or eMMC board
plugged into it.  It's not impossible someone could come up with a SPI
flash cape and plug the memory cape into that, or come up with a
complex breadboard solution.  But lets see that happen and work before
worrying about that particular permutation.

- -- 
Tom
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Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/

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Re: [U-Boot] [PATCH 2/6] am335x_evm: Add MTDPARTS info for SPI flash

[Tom Rini]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 05/12/2013 05:10 PM, Peter Korsgaard wrote:
 Tom == Tom Rini tr...@ti.com writes:
 
 Tom Signed-off-by: Tom Rini tr...@ti.com Tom --- Tom
 include/configs/am335x_evm.h |7 +++ Tom  1 file changed, 7
 insertions(+)
 
 Tom diff --git a/include/configs/am335x_evm.h
 b/include/configs/am335x_evm.h Tom index 945ec09..004a06a 100644 
 Tom --- a/include/configs/am335x_evm.h Tom +++
 b/include/configs/am335x_evm.h Tom @@ -436,6 +436,13 @@ Tom  #
 define CONFIG_ENV_SPI_MAX_HZ  CONFIG_SF_DEFAULT_SPEED Tom  #
 define CONFIG_ENV_OFFSET  (892  10) /* 892 KiB in */ Tom  #
 define CONFIG_ENV_SECT_SIZE   (4  10) /* 4 KB sectors */ Tom
 +#define CONFIG_CMD_MTDPARTS Tom +#define MTDIDS_DEFAULT
 nor0=physmap-flash.0 Tom +#define MTDPARTS_DEFAULT
 mtdparts=physmap-flash.0:128k(SPL), \
 
 physmap for a spi flash? I would have expected to see m25p80?

Yes, I'd swear it's physmap when I've tested it on the vendor kernel tree.

- -- 
Tom
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Re: [U-Boot] [PATCH] Add minimal support for Congatec Conga-QEVAl Evaluation Carrier Board with a conga-Qmx6 module.

[Stefano Babic]

On 13/05/2013 14:02, SARTRE Leo wrote:
 Signed-off-by: Leo Sartre lsar...@adeneo-embedded.com
 ---

Hi Leo,

  board/freescale/cgtqmx6/Makefile  |   42 +++
  board/freescale/cgtqmx6/cgtqmx6.c |  627 
 +
  boards.cfg|1 +
  include/configs/cgtqmx6.h |  294 +

You have also to update the MAINTAINERS file.

As I understand from the Website, even if the board can be derived from
the SabreLite, it is a different product from a different vendor.

Why should the board then be put into freescale/ directory ?

Generally we have the schema:

board/board_name

or

board/vendor_name/board_name

 diff --git a/board/freescale/cgtqmx6/Makefile 
 b/board/freescale/cgtqmx6/Makefile
 new file mode 100644
 index 000..a17603e
 --- /dev/null
 +++ b/board/freescale/cgtqmx6/Makefile
 @@ -0,0 +1,41 @@
 +#
 +# Copyright (C) 2007, Guennadi Liakhovetski l...@denx.de
 +#
 +# (C) Copyright 2013 Adeneo Embedded www.adeneo-embedded.com
 +#
 +# This program is free software; you can redistribute it and/or
 +# modify it under the terms of the GNU General Public License as
 +# published by the Free Software Foundation; either version 2 of
 +# the License, or (at your option) any later version.
 +#
 +# This program is distributed in the hope that it will be useful,
 +# but WITHOUT ANY WARRANTY; without even the implied warranty of
 +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 +# GNU General Public License for more details.
 +#
 +# You should have received a copy of the GNU General Public License
 +# along with this program; if not, write to the Free Software
 +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 +# MA 02111-1307 USA
 +#
 +
 +include $(TOPDIR)/config.mk
 +
 +LIB= $(obj)lib$(BOARD).o
 +
 +COBJS  := cgtqmx6.o
 +
 +SRCS   := $(COBJS:.o=.c)
 +OBJS   := $(addprefix $(obj),$(COBJS))
 +
 +$(LIB):$(obj).depend $(OBJS)
 + $(call cmd_link_o_target, $(OBJS))
 +
 +#
 +
 +# defines $(obj).depend target
 +include $(SRCTREE)/rules.mk
 +
 +sinclude $(obj).depend
 +
 +#
 diff --git a/board/freescale/cgtqmx6/cgtqmx6.c 
 b/board/freescale/cgtqmx6/cgtqmx6.c
 new file mode 100644
 index 000..ed5476a
 --- /dev/null
 +++ b/board/freescale/cgtqmx6/cgtqmx6.c
 @@ -0,0 +1,630 @@
 +/*
 + * Copyright (C) 2013, Adeneo Embedded www.adeneo-embedded.com
 + * Leo Sartre, lsar...@adeneo-embedded.com
 + * Based on mx6qsabrelite.c file
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
 + * published by the Free Software Foundation; either version 2 of
 + * the License, or (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   See the
 + * GNU General Public License for more details.
 + *
 + * You should have received a copy of the GNU General Public License
 + * along with this program; if not, write to the Free Software
 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 + * MA 02111-1307 USA
 + */
 +
 +#include common.h
 +#include asm/io.h
 +#include asm/arch/clock.h
 +#include asm/arch/imx-regs.h
 +#include asm/arch/iomux.h
 +#include asm/arch/mx6-pins.h
 +#include asm/errno.h
 +#include asm/gpio.h
 +#include asm/imx-common/iomux-v3.h
 +#include asm/imx-common/mxc_i2c.h
 +#include asm/imx-common/boot_mode.h
 +#include mmc.h
 +#include fsl_esdhc.h
 +#include malloc.h
 +#include linux/fb.h
 +#include ipu_pixfmt.h
 +#include asm/arch/crm_regs.h
 +#include asm/arch/mxc_hdmi.h
 +#include i2c.h
 +
 +DECLARE_GLOBAL_DATA_PTR;
 +
 +#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |\
 + PAD_CTL_PUS_100K_UP |\
 + PAD_CTL_SPEED_MED   |\
 + PAD_CTL_DSE_40ohm   |\
 + PAD_CTL_SRE_FAST|\
 + PAD_CTL_HYS)
 +
 +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |\
 + PAD_CTL_PUS_47K_UP  |\
 + PAD_CTL_SPEED_LOW   |\
 + PAD_CTL_DSE_80ohm   |\
 + PAD_CTL_SRE_FAST|\
 + PAD_CTL_HYS)
 +
 +#define SPI_PAD_CTRL (PAD_CTL_HYS |\
 +   PAD_CTL_PUS_100K_DOWN |\
 +   PAD_CTL_SPEED_MED |\
 +   PAD_CTL_DSE_40ohm |\
 +   PAD_CTL_SRE_FAST)
 +
 

Re: [U-Boot] [PATCH 2/2] Add instruction file (based on the README for the sabrelite) for booting the Congatec board from SD-Card.

[Wolfgang Denk]

Dear SARTRE Leo,

In message 3465d313fdfb824f9a9c8cd24fa4f6bc0108c...@frontmail.adetel.com you 
wrote:
 Signed-off-by: Leo Sartre lsar...@adeneo-embedded.com
 ---
  board/freescale/cgtqmx6/README |   35 +++
  1 file changed, 35 insertions(+)
  create mode 100644 board/freescale/cgtqmx6/README

There is no good reason for making this a separate commit.  Please
squash with the other commit.

Best regards,

Wolfgang Denk

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Anyone who isn't confused here doesn't really know what's going on.
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Re: [U-Boot] [PATCH 2/2] Add instruction file (based on the README for the sabrelite) for booting the Congatec board from SD-Card.

[Stefano Babic]

On 13/05/2013 14:02, SARTRE Leo wrote:
 Signed-off-by: Leo Sartre lsar...@adeneo-embedded.com
 ---
  board/freescale/cgtqmx6/README |   35 +++
  1 file changed, 35 insertions(+)
  create mode 100644 board/freescale/cgtqmx6/README
 
 diff --git a/board/freescale/cgtqmx6/README b/board/freescale/cgtqmx6/README
 new file mode 100644
 index 000..bcacc71
 --- /dev/null
 +++ b/board/freescale/cgtqmx6/README
 @@ -0,1 +1,35 @@
 +U-Boot for the Congatec Conga-QEVAl Evaluation Carrier board
 +
 +This file contains information for the port of U-Boot to the Congatec
 +Conga-QEVAl Evaluation Carrier board.
 +
 +1. Boot source, boot from SD card
 +-
 +
 +This version of u-boot works only on the SD card. By default, the
 +Congatec board boot from the SPI-NOR.
 +With the uboot version provided with the board you can write boot
 +registers to force the board to reboot and boot from the SD slot:
 +
 +conga-QMX6 U-Boot  mw.l 0x20d8040 0x3850
 +conga-QMX6 U-Boot  mw.l 0x020d8044 0x1000
 +conga-QMX6 U-Boot  reset
 +resetting ...

But is this not exactly the purpose of the bmode command ? Anyway, at
next power-on, the board boots again from SPI-NOR. There should be
indication here how to erase the SPI Flash

 +
 +The the board will reboot and, if you burnt your SD correctly the
 +board (see (2) for instructions) will use u-boot that live into the SD
 +card.
 +
 +2. Build
 +
 +
 +To build U-Boot for the Congatec board:
 +
 + make cgtqmx6_config
 + make u-boot.imx

You do not need it. This is the general instruction to build any board
in u-boot, and u-boot.imx is automatically generated for i.MX6 boards.

 +
 +To copy the resulting u-boot.imx to the SD card:
 +
 + sudo dd if=u-boot.imx of=/dev/sXx bs=512 seek=2sudo sync
 +
 +Note: Replace sXx with the device representing the SD card in your system.

This can be wrong if the Linux PC uses /dev/mmcblk* instead of /dev/sXx

Best regards,
Stefano Babic


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Re: [U-Boot] [PATCH 5/6] am335x_evm:Add support for the NOR module on the memory cape

[Tom Rini]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 05/12/2013 05:19 PM, Peter Korsgaard wrote:
 Tom == Tom Rini tr...@ti.com writes:
 
 Space missing after ':' in subject.

Whoops.

 Tom From: Steve Kipisz s-kipi...@ti.com Tom This patch adds 
 support for the NOR module that attaches Tom to the memory cape 
 for a Beaglebone board. This does not Tom add booting support; 
 only support so that you can boot from Tom SD/MMC and see the NOR 
 module so that it can be programmed.
 
 Tom Signed-off-by: Steve Kipisz s-kipi...@ti.com Tom [trini: 
 Clean up config changes slightly] Tom Signed-off-by: Tom Rini 
 tr...@ti.com Tom --- Tom  arch/arm/cpu/armv7/am33xx/mem.c |
 30 +- Tom arch/arm/include/asm/arch-am33xx/mem.h |
 9 ++ Tom board/ti/am335x/mux.c  |   53 
  Tom  boards.cfg |1 + Tom
 include/configs/am335x_evm.h   |   28 +
 Tom  5 files changed, 120 insertions(+), 1 deletion(-)
 
 Tom diff --git a/arch/arm/cpu/armv7/am33xx/mem.c 
 b/arch/arm/cpu/armv7/am33xx/mem.c Tom index b86b0de..e46201a 
 100644 Tom --- a/arch/arm/cpu/armv7/am33xx/mem.c Tom +++ 
 b/arch/arm/cpu/armv7/am33xx/mem.c Tom @@ -46,6 +46,19 @@ static 
 const u32 gpmc_m_nand[GPMC_MAX_REG] = { Tom  }; Tom  #endif
 
 Tom +#if defined(CONFIG_CMD_FLASH) Tom +static const u32 
 gpmc_nor[GPMC_MAX_REG] = { Tom + STNOR_GPMC_CONFIG1, Tom + 
 STNOR_GPMC_CONFIG2, Tom +STNOR_GPMC_CONFIG3, Tom + 
 STNOR_GPMC_CONFIG4, Tom +STNOR_GPMC_CONFIG5, Tom + 
 STNOR_GPMC_CONFIG6, Tom +STNOR_GPMC_CONFIG7 Tom +};
 
 These values (and the gmpc_m_nand ones) are platform specific, 
 right? It would be nicer to have them in the board file than here, 
 similar to how I did for the ddr settings some time ago.

The GPMC setup stuff has historically been, lets say less than
optimal.  We might be able to move this to board_init like omap3 does,
however.  I'll check.

 Tom + Tom +#define GPMC_CS 0 Tom +#endif
 
 Tom  void enable_gpmc_cs_config(const u32 *gpmc_config, struct 
 gpmc_cs *cs, u32 base, Tom   u32 size) Tom @@ -75,16 +88,22 
 @@ 
 void gpmc_init(void) Tom /* putting a blanket check on GPMC 
 based on ZeBu for now */ Tom gpmc_cfg = (struct gpmc 
 *)GPMC_BASE;
 
 Tom -#ifdef CONFIG_CMD_NAND Tom +#if defined(CONFIG_CMD_NAND) || 
 defined(CONFIG_NOR) Tom  const u32 *gpmc_config = NULL; Tom u32
 base = 0; Tomu32 size = 0; Tom  #endif Tom /* global 
 settings */ Tom  writel(0x0008, gpmc_cfg-sysconfig); Tom 
 +#ifdef CONFIG_NOR Tom + writel(0x, gpmc_cfg-irqstatus);
 Tom +writel(0x, gpmc_cfg-irqenable); Tom +
 writel(0x0A00, gpmc_cfg-config); Tom +#else Tom
 writel(0x0100, gpmc_cfg-irqstatus); Tom
 writel(0x0100, gpmc_cfg-irqenable); Tom
 writel(0x0012, gpmc_cfg-config); Tom +#endif
 
 So now you cannot E.G. have a single binary working on both the 
 nand flash of the evm and beaglebone? That's not really nice.

It's worse than that.  We don't have a NOR cape, we have a memory cape
and NOR module.  We could have a memory cape and NAND module.  And
there's not a nice way at run-time to determine if we've got one or
the other.

- -- 
Tom
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Re: [U-Boot] [PATCH 6/6] am335x_evm: Add support to boot from NOR.

[Tom Rini]

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Hash: SHA1

On 05/12/2013 05:53 PM, Peter Korsgaard wrote:
 Tom == Tom Rini tr...@ti.com writes:
 
 Why not use SPL when booting from NOR as well? You still want
 to relocate into DDR.
 
 Tom Frankly, I'm allergic to SPL for NOR.  It's the historical and
 well Tom understood case, we're r/o until we move from flash to
 DDR.  And it is Tom fast enough here at least that it doesn't seem
 like we'd gain on Tom falcon mode like we do on other medium.
 
 Ok. It would be good to mention this in the commit message.

I'll reword things slightly.

- -- 
Tom
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[U-Boot] [PATCH v1 0/2] OMAP3+: introduce generic Adaptive Body Bias Support

[Andrii Tseglytskyi]

From: Andrii.Tseglytskyi andrii.tseglyts...@ti.com

Adaptive Body Biasing (ABB) modulates transistor bias voltages
dynamically in order to optimize switching speed versus leakage.
Adaptive Body-Bias ldos are present for some voltage domains:
starting with OMAP3630. There are three modes of operation:

* Bypass - the default, it just follows the vdd voltage
* Foward Body-Bias - applies voltage bias to increase transistor
  performance at the cost of power.  Used to operate safely at high
  OPPs.
* Reverse Body-Bias - applies voltage bias to decrease leakage and
  save power.  Used to save power at lower OPPs.

The application of FBB/RBB technique is determined for each unique
device in some process nodes, whereas, they are mandated on other
process nodes.

OMAP5 silicon requires ABB to be properly configured on early boot stage.
The following patch series adds generic ABB configuration and enables
it for OMAP5 silicons.

Andrii Tseglytskyi (1):
  OMAP3+: introduce generic ABB support

Andrii.Tseglytskyi (1):
  OMAP5: add ABB setup for MPU voltage domain

 arch/arm/cpu/armv7/omap-common/Makefile|1 +
 arch/arm/cpu/armv7/omap-common/abb.c   |  139 
 arch/arm/cpu/armv7/omap-common/clocks-common.c |9 ++
 arch/arm/cpu/armv7/omap5/Makefile  |1 +
 arch/arm/cpu/armv7/omap5/abb.c |   65 +++
 arch/arm/cpu/armv7/omap5/prcm-regs.c   |7 ++
 arch/arm/include/asm/arch-omap3/omap3.h|9 ++
 arch/arm/include/asm/arch-omap4/omap.h |7 ++
 arch/arm/include/asm/arch-omap5/omap.h |   13 +++
 arch/arm/include/asm/omap_common.h |   22 
 10 files changed, 273 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/omap-common/abb.c
 create mode 100644 arch/arm/cpu/armv7/omap5/abb.c

-- 
1.7.9.5

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[U-Boot] [PATCH v1 1/2] OMAP3+: introduce generic ABB support

[Andrii Tseglytskyi]

Adaptive Body Biasing (ABB) modulates transistor bias voltages
dynamically in order to optimize switching speed versus leakage.
Adaptive Body-Bias ldos are present for some voltage domains
starting with OMAP3630. There are three modes of operation:

* Bypass - the default, it just follows the vdd voltage
* Foward Body-Bias - applies voltage bias to increase transistor
  performance at the cost of power.  Used to operate safely at high
  OPPs.
* Reverse Body-Bias - applies voltage bias to decrease leakage and
  save power.  Used to save power at lower OPPs.

Signed-off-by: Andrii Tseglytskyi andrii.tseglyts...@ti.com
---
 arch/arm/cpu/armv7/omap-common/Makefile |1 +
 arch/arm/cpu/armv7/omap-common/abb.c|  139 +++
 arch/arm/cpu/armv7/omap5/Makefile   |1 +
 arch/arm/cpu/armv7/omap5/abb.c  |   65 +++
 arch/arm/include/asm/arch-omap3/omap3.h |9 ++
 arch/arm/include/asm/arch-omap4/omap.h  |7 ++
 arch/arm/include/asm/arch-omap5/omap.h  |   13 +++
 arch/arm/include/asm/omap_common.h  |   22 +
 8 files changed, 257 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/omap-common/abb.c
 create mode 100644 arch/arm/cpu/armv7/omap5/abb.c

diff --git a/arch/arm/cpu/armv7/omap-common/Makefile 
b/arch/arm/cpu/armv7/omap-common/Makefile
index 55e82ba..c4b9809 100644
--- a/arch/arm/cpu/armv7/omap-common/Makefile
+++ b/arch/arm/cpu/armv7/omap-common/Makefile
@@ -34,6 +34,7 @@ COBJS += hwinit-common.o
 COBJS  += clocks-common.o
 COBJS  += emif-common.o
 COBJS  += vc.o
+COBJS  += abb.o
 endif
 
 ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
diff --git a/arch/arm/cpu/armv7/omap-common/abb.c 
b/arch/arm/cpu/armv7/omap-common/abb.c
new file mode 100644
index 000..7ade110
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap-common/abb.c
@@ -0,0 +1,139 @@
+/*
+ *
+ * Adaptive Body Bias programming sequence for OMAP family
+ *
+ * (C) Copyright 2013
+ * Texas Instruments, www.ti.com
+ *
+ * Andrii Tseglytskyi R andrii.tseglyts...@ti.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/omap_common.h
+#include asm/io.h
+#include asm/arch/sys_proto.h
+
+__weak s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)
+{
+   return -1;
+}
+
+static void abb_setup_timings(u32 setup)
+{
+   u32 sys_rate, sr2_cnt, clk_cycles;
+
+   /*
+* SR2_WTCNT_VALUE is the settling time for the ABB ldo after a
+* transition and must be programmed with the correct time at boot.
+* The value programmed into the register is the number of SYS_CLK
+* clock cycles that match a given wall time profiled for the ldo.
+* This value depends on:
+* settling time of ldo in micro-seconds (varies per OMAP family),
+* of clock cycles per SYS_CLK period (varies per OMAP family),
+* the SYS_CLK frequency in MHz (varies per board)
+* The formula is:
+*
+* ldo settling time (in micro-seconds)
+* SR2_WTCNT_VALUE = --
+*  (# system clock cycles) * (sys_clk period)
+*
+* Put another way:
+*
+* SR2_WTCNT_VALUE = settling time / (# SYS_CLK cycles / SYS_CLK rate))
+*
+* To avoid dividing by zero multiply both # clock cycles and
+* settling time by 10 such that the final result is the one we want.
+*/
+
+   /* calculate SR2_WTCNT_VALUE */
+   sys_rate = DIV_ROUND(V_OSCK, 100);
+   clk_cycles = DIV_ROUND(OMAP_ABB_CLOCK_CYCLES * 10, sys_rate);
+   sr2_cnt = DIV_ROUND(OMAP_ABB_SETTLING_TIME * 10, clk_cycles);
+
+   setbits_le32(setup,
+sr2_cnt  (ffs(OMAP_ABB_SETUP_SR2_WTCNT_VALUE_MASK) - 1));
+}
+
+void abb_setup(u32 fuse, u32 ldovbb, u32 setup, u32 control,
+  u32 txdone, u32 txdone_mask, u32 opp)
+{
+   u32 abb_type_mask, opp_sel_mask;
+
+   /* sanity check */
+   if (!setup || !control || !txdone)
+   return;
+
+   /* setup ABB only in case of Fast or Slow OPP */
+   switch (opp) {
+   case OMAP_ABB_FAST_OPP:
+   abb_type_mask = 

[U-Boot] [PATCH v1 2/2] OMAP5: add ABB setup for MPU voltage domain

[Andrii Tseglytskyi]

From: Andrii.Tseglytskyi andrii.tseglyts...@ti.com

Patch adds a call of abb_setup() function, and proper registers
definitions needed for ABB setup sequence. ABB is initialized
for MPU voltage domain.

Signed-off-by: Andrii.Tseglytskyi andrii.tseglyts...@ti.com
---
 arch/arm/cpu/armv7/omap-common/clocks-common.c |9 +
 arch/arm/cpu/armv7/omap5/prcm-regs.c   |7 +++
 2 files changed, 16 insertions(+)

diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c 
b/arch/arm/cpu/armv7/omap-common/clocks-common.c
index 2b955c7..bdecaf8 100644
--- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
+++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
@@ -533,6 +533,15 @@ void scale_vcores(struct vcores_data const *vcores)
do_scale_vcore(vcores-mpu.addr, vcores-mpu.value,
  vcores-mpu.pmic);
 
+   /* Configure MPU ABB LDO after scale */
+   abb_setup((*ctrl)-control_std_fuse_opp_vdd_mpu_2,
+ (*ctrl)-control_wkup_ldovbb_mpu_voltage_ctrl,
+ (*prcm)-prm_abbldo_mpu_setup,
+ (*prcm)-prm_abbldo_mpu_ctrl,
+ (*prcm)-prm_irqstatus_mpu_2,
+ OMAP_ABB_MPU_TXDONE_MASK,
+ OMAP_ABB_FAST_OPP);
+
do_scale_vcore(vcores-mm.addr, vcores-mm.value,
  vcores-mm.pmic);
 
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c 
b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index b8a61fe..b4b624e 100644
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -311,6 +311,7 @@ struct prcm_regs const omap5_es1_prcm = {
 
 struct omap_sys_ctrl_regs const omap5_ctrl = {
.control_status = 0x4A002134,
+   .control_std_fuse_opp_vdd_mpu_2 = 0x4A0021B4,
.control_paconf_global  = 0x4A002DA0,
.control_paconf_mode= 0x4A002DA4,
.control_smart1io_padconf_0 = 0x4A002DA8,
@@ -358,6 +359,7 @@ struct omap_sys_ctrl_regs const omap5_ctrl = {
.control_port_emif2_sdram_config= 0x4AE0C118,
.control_emif1_sdram_config_ext = 0x4AE0C144,
.control_emif2_sdram_config_ext = 0x4AE0C148,
+   .control_wkup_ldovbb_mpu_voltage_ctrl   = 0x4AE0C318,
.control_smart1nopmio_padconf_0 = 0x4AE0CDA0,
.control_smart1nopmio_padconf_1 = 0x4AE0CDA4,
.control_padconf_mode   = 0x4AE0CDA8,
@@ -709,6 +711,9 @@ struct prcm_regs const omap5_es2_prcm = {
.cm_l3init_fsusb_clkctrl = 0x4a0096d0,
.cm_l3init_ocp2scp1_clkctrl = 0x4a0096e0,
 
+   /* prm irqstatus regs */
+   .prm_irqstatus_mpu_2 = 0x4ae06014,
+
/* l4 wkup regs */
.cm_abe_pll_ref_clksel = 0x4ae0610c,
.cm_sys_clksel = 0x4ae06110,
@@ -739,6 +744,8 @@ struct prcm_regs const omap5_es2_prcm = {
.prm_sldo_mpu_ctrl = 0x4ae07cd0,
.prm_sldo_mm_setup = 0x4ae07cd4,
.prm_sldo_mm_ctrl = 0x4ae07cd8,
+   .prm_abbldo_mpu_setup = 0x4ae07cdc,
+   .prm_abbldo_mpu_ctrl = 0x4ae07ce0,
 };
 
 struct prcm_regs const dra7xx_prcm = {
-- 
1.7.9.5

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Re: [U-Boot] [PATCH v3] at91sam9x5ek: Pass serial and revision tags to Linux

[Julius Hemanth P]

Hi Bo,

Thanks for the reference.

On Mon, May 13, 2013 at 8:09 AM, Bo Shen voice.s...@atmel.com wrote:
 Hi Julius,


 On 5/11/2013 13:01, Julius Hemanth P wrote:

 If Bo doesn't have any code in pipeline as of now, then I shall start
 working on it.


 Now, I don't have code in pipeline, you can work this on it.
 Thanks.

 BTW, you can take the reference code on github:
 https://github.com/linux4sam/at91bootstrap/blob/master/driver/ds24xx.c. This
 also have Atmel new SoC sama5d3 series support.

 Best Regards,
 Bo Shen
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Re: [U-Boot] [PATCH] powerpc/p1022ds: boot from SD card/SPI flash with SPL

[Scott Wood]

On 05/13/2013 05:17:40 AM, Zhang Ying-B40530 wrote:


 diff --git a/spl/Makefile b/spl/Makefile
 index b5a8de7..3a3b868 100644
 --- a/spl/Makefile
 +++ b/spl/Makefile
 @@ -51,6 +51,9 @@ LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
  endif
  ifeq ($(CPU),mpc85xx)
  LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
 +ifdef CONFIG_SPL_INIT_DDR_SUPPORT
 +LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
 +endif

Why isn't this handled as part of lib8xxx.o?  We should avoid putting
hardware-specific things in generic Makefiles.  There ones that are
already there should be fixed at some point.
[Zhang Ying]
Do you mean that all things of the directory   
arch/powerpc/cpu/mpc8xxx/ddr 

will be moved to the directory arch/powerpc/cpu/mpc8xxx/?


No.  I meant that arch/powerpc/cpu/mpc8xxx/Makefile should contain the  
LIBS addition for the subdirectory, but apparently it doesn't work that  
way even in non-SPL.  So ignore this; it's more of a future makefile  
cleanup issue.


-Scott
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Re: [U-Boot] [PATCH v1 1/2] OMAP3+: introduce generic ABB support

[Nishanth Menon]

Few minor comments follow:
On 17:15-20130513, Andrii Tseglytskyi wrote:
snip
 diff --git a/arch/arm/cpu/armv7/omap-common/abb.c 
 b/arch/arm/cpu/armv7/omap-common/abb.c
 new file mode 100644
 index 000..7ade110
 --- /dev/null
 +++ b/arch/arm/cpu/armv7/omap-common/abb.c
 @@ -0,0 +1,139 @@
snip
 + /* - On OMAP5+ silicons some ABB setting are fused
/*
 *
please
 +  *  in corresponding OPP control registers. Also additional
 +  *  setup for LDOVBB is required. Initialization
 +  *  sequence contains specific part which handles this.
 +  *  If function call fails - return quitely, it means
 +  *  no ABB is required for silicon.
 +  *
 +  * - OMAP3 and OMAP4 don't have any fused settings for ABB.
 +  *   EFUSE and LDOVBB registers are also not defined for them.
 +  *   ABB will be initialized in the common way without
 +  *   ldovbb setup.
OMAP4 does have ABB efuse offset for OPP_TURBO. LDOVBB override is not
used. please rephrase accordingly.
 +  */
 + if (fuse  ldovbb) {
 + if (abb_setup_ldovbb(fuse, ldovbb))
 + return;
 + }
snip
 +s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)
 +{
 + u32 vset;
 +
 + /* ABB parameters must be properly fused
 +  * otherwise ABB should be disabled */
please fix comment style.
 + vset = readl(fuse);
 + if (!(vset  OMAP5_ABB_FUSE_ENABLE_MASK))
 + return -1;
 +
 + /* prepare VSET value for LDOVBB mux register */
 + vset = OMAP5_ABB_FUSE_VSET_MASK;
 + vset = ffs(OMAP5_ABB_FUSE_VSET_MASK) - 1;
 + vset = ffs(OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK) - 1;
 + vset |= OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK;
 +
 + /* setup LDOVBB using fused value */
 + clrsetbits_le32(ldovbb, vset, vset);
 +
 + return 0;
 +}
 diff --git a/arch/arm/include/asm/arch-omap3/omap3.h 
 b/arch/arm/include/asm/arch-omap3/omap3.h
 index 2b5e9ae..66361d5 100644
 --- a/arch/arm/include/asm/arch-omap3/omap3.h
 +++ b/arch/arm/include/asm/arch-omap3/omap3.h
 @@ -253,4 +253,13 @@ struct gpio {
  
  #define OMAP3_EMU_HAL_START_HAL_CRITICAL 4
  
 +/*
 + * ABB settings
 + */
could be one line :)
 +#define OMAP_ABB_SETTLING_TIME   30
 +#define OMAP_ABB_CLOCK_CYCLES8
snip
otherwise looks ok to me.


-- 
Regards,
Nishanth Menon
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Re: [U-Boot] [PATCH] Add minimal support for Congatec Conga-QEVAl Evaluation Carrier Board with a conga-Qmx6 module.

[Eric Bénard]

Hi Leo,

Le Mon, 13 May 2013 14:02:57 +0200,
SARTRE Leo lsar...@adeneo-embedded.com a écrit :
 diff --git a/board/freescale/cgtqmx6/cgtqmx6.c 
 b/board/freescale/cgtqmx6/cgtqmx6.c
 new file mode 100644
 index 000..ed5476a
 --- /dev/null
 +++ b/board/freescale/cgtqmx6/cgtqmx6.c
 @@ -0,0 +1,630 @@
 +/*
 + * Copyright (C) 2013, Adeneo Embedded www.adeneo-embedded.com
 + * Leo Sartre, lsar...@adeneo-embedded.com
 + * Based on mx6qsabrelite.c file
 + *
cgtqmx6.c is a direct copy of mx6qsabrelite.c adapted to your board but
you remove the copyright to add your own, that's not a good practice.

 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
 + * published by the Free Software Foundation; either version 2 of
 + * the License, or (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   See the
 + * GNU General Public License for more details.
 + *
 + * You should have received a copy of the GNU General Public License
 + * along with this program; if not, write to the Free Software
 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 + * MA 02111-1307 USA
 + */
 +
 +#include common.h
 +#include asm/io.h
 +#include asm/arch/clock.h
 +#include asm/arch/imx-regs.h
 +#include asm/arch/iomux.h
 +#include asm/arch/mx6-pins.h
 +#include asm/errno.h
 +#include asm/gpio.h
 +#include asm/imx-common/iomux-v3.h
 +#include asm/imx-common/mxc_i2c.h
 +#include asm/imx-common/boot_mode.h
 +#include mmc.h
 +#include fsl_esdhc.h
 +#include malloc.h
 +#include linux/fb.h
 +#include ipu_pixfmt.h
 +#include asm/arch/crm_regs.h
 +#include asm/arch/mxc_hdmi.h
 +#include i2c.h
 +
 +DECLARE_GLOBAL_DATA_PTR;
 +
 +#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |\
 + PAD_CTL_PUS_100K_UP |\
 + PAD_CTL_SPEED_MED   |\
 + PAD_CTL_DSE_40ohm   |\
 + PAD_CTL_SRE_FAST|\
 + PAD_CTL_HYS)
 +
 +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |\
 + PAD_CTL_PUS_47K_UP  |\
 + PAD_CTL_SPEED_LOW   |\
 + PAD_CTL_DSE_80ohm   |\
 + PAD_CTL_SRE_FAST|\
 + PAD_CTL_HYS)
 +
 +#define SPI_PAD_CTRL (PAD_CTL_HYS |\
 +   PAD_CTL_PUS_100K_DOWN |\
 +   PAD_CTL_SPEED_MED |\
 +   PAD_CTL_DSE_40ohm |\
 +   PAD_CTL_SRE_FAST)
 +
 +#define BUTTON_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |\
 +  PAD_CTL_PUS_100K_UP |\
 +  PAD_CTL_SPEED_MED   |\
 +  PAD_CTL_DSE_40ohm   |\
 +  PAD_CTL_HYS)
 +
 +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |\
 +  PAD_CTL_PUS_100K_UP |\
 +  PAD_CTL_SPEED_MED   |\
 +  PAD_CTL_DSE_40ohm   |\
 +  PAD_CTL_HYS |\
 +  PAD_CTL_ODE |\
 +  PAD_CTL_SRE_FAST)
 +
 +int dram_init(void)
 +{
 + gd-ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
 +
 + return 0;
 +}
 +
 +iomux_v3_cfg_t const uart1_pads[] = {
 + MX6_PAD_CSI0_DAT10__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 + MX6_PAD_CSI0_DAT11__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 +};
 +
 +iomux_v3_cfg_t const uart2_pads[] = {
 + MX6_PAD_EIM_D26__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 + MX6_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
 +};
 +
 +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 +
 +/* I2C1, SGTL5000 */
 +struct i2c_pads_info i2c_pad_info0 = {
 + .scl = {
 + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC,
 + .gpio_mode = MX6_PAD_EIM_D21__GPIO_3_21 | PC,
 + .gp = IMX_GPIO_NR(3, 21)
 + },
 + .sda = {
 + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC,
 + .gpio_mode = MX6_PAD_EIM_D28__GPIO_3_28 | PC,
 + .gp = IMX_GPIO_NR(3, 28)
 + }
 +};
 +
 +/* I2C2 Camera, MIPI */
 +struct i2c_pads_info i2c_pad_info1 = {
 + .scl = {
 + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC,
 + .gpio_mode = MX6_PAD_KEY_COL3__GPIO_4_12 | PC,
 + .gp = 

Re: [U-Boot] [PATCH v1 1/2] OMAP3+: introduce generic ABB support

[Andrii Tseglytskyi]

On 05/13/2013 05:58 PM, Nishanth Menon wrote:

Few minor comments follow:
On 17:15-20130513, Andrii Tseglytskyi wrote:
snip

diff --git a/arch/arm/cpu/armv7/omap-common/abb.c 
b/arch/arm/cpu/armv7/omap-common/abb.c
new file mode 100644
index 000..7ade110
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap-common/abb.c
@@ -0,0 +1,139 @@

snip

+   /* - On OMAP5+ silicons some ABB setting are fused

/*
  *
please

+*  in corresponding OPP control registers. Also additional
+*  setup for LDOVBB is required. Initialization
+*  sequence contains specific part which handles this.
+*  If function call fails - return quitely, it means
+*  no ABB is required for silicon.
+*
+* - OMAP3 and OMAP4 don't have any fused settings for ABB.
+*   EFUSE and LDOVBB registers are also not defined for them.
+*   ABB will be initialized in the common way without
+*   ldovbb setup.

OMAP4 does have ABB efuse offset for OPP_TURBO. LDOVBB override is not
used. please rephrase accordingly.


OK.


+*/
+   if (fuse  ldovbb) {
+   if (abb_setup_ldovbb(fuse, ldovbb))
+   return;
+   }

snip

+s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)
+{
+   u32 vset;
+
+   /* ABB parameters must be properly fused
+* otherwise ABB should be disabled */

please fix comment style.


OK


+   vset = readl(fuse);
+   if (!(vset  OMAP5_ABB_FUSE_ENABLE_MASK))
+   return -1;
+
+   /* prepare VSET value for LDOVBB mux register */
+   vset = OMAP5_ABB_FUSE_VSET_MASK;
+   vset = ffs(OMAP5_ABB_FUSE_VSET_MASK) - 1;
+   vset = ffs(OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK) - 1;
+   vset |= OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK;
+
+   /* setup LDOVBB using fused value */
+   clrsetbits_le32(ldovbb, vset, vset);
+
+   return 0;
+}
diff --git a/arch/arm/include/asm/arch-omap3/omap3.h 
b/arch/arm/include/asm/arch-omap3/omap3.h
index 2b5e9ae..66361d5 100644
--- a/arch/arm/include/asm/arch-omap3/omap3.h
+++ b/arch/arm/include/asm/arch-omap3/omap3.h
@@ -253,4 +253,13 @@ struct gpio {
  
  #define OMAP3_EMU_HAL_START_HAL_CRITICAL	4
  
+/*

+ * ABB settings
+ */

could be one line :)
Yeah it could. The reason why I did this - all comments in this file 
have such style.

Anyway, agree with you.



+#define OMAP_ABB_SETTLING_TIME 30
+#define OMAP_ABB_CLOCK_CYCLES  8

snip
otherwise looks ok to me.




Thank you,

Regards,
Andrii
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Re: [U-Boot] [PATCH v6 2/4] usb: ehci: add weak-aliased functions to portsc tdi

[Marek Vasut]

Dear Kuo-Jung Su,

 2013/5/13 Marek Vasut ma...@denx.de:
  Dear Kuo-Jung Su,
  
  From: Kuo-Jung Su dant...@faraday-tech.com
  
  There is at least one non-EHCI compliant controller (i.e. Faraday EHCI)
  known to implement a non-standard TDI stuff.
  Futhermore, it not only leave reserved and CONFIGFLAG registers
  un-implemented but also has their address spaces removed.
  
  And thus, we need weak-aliased functions to both TDI stuff
  and PORTSC registers for interface abstraction.
  
  Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
  CC: Marek Vasut ma...@denx.de
  ---
  
  Changes for v6:
 - Simplify weak aliased function declaration
 - Drop redundant line feed
  
  Changes for v5:
 - Split up from Faraday EHCI patch
  
  Changes for v2 - v4:
 - See 'usb: ehci: add Faraday USB 2.0 EHCI support'
   
   drivers/usb/host/ehci-hcd.c |   91
  
  ++- 1 file changed, 55
  insertions(+), 36 deletions(-)
  
  diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
  index c816878..ae3f2a4 100644
  --- a/drivers/usb/host/ehci-hcd.c
  +++ b/drivers/usb/host/ehci-hcd.c
  @@ -117,10 +117,44 @@ static struct descriptor {
  
   };
   
   #if defined(CONFIG_EHCI_IS_TDI)
  
  -#define ehci_is_TDI()(1)
  -#else
  -#define ehci_is_TDI()(0)
  +# define ehci_is_TDI()   (1)
  
  btw you can remove those braces around (1) and (0) below. But I have one
  more question ...
 
 Got it, thanks
 
  [...]
  
  @@ -609,13 +644,10 @@ ehci_submit_root(struct usb_device *dev, unsigned
  long pipe, void *buffer, uint32_t *status_reg;
  
struct ehci_ctrl *ctrl = dev-controller;
  
  - if (le16_to_cpu(req-index)  CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
  { - printf(The request port(%d) is not configured\n, -   
   le16_to_cpu(req-index) - 1);
  + status_reg = ehci_get_portsc_register(ctrl-hcor,
  + le16_to_cpu(req-index) - 1);
  + if (!status_reg)
  
  What happens here if req-index is zero ?
  
  Hint: the above code always does unsigned comparison ...
  
  I think you should make the second argument of ehci_get_portsc_register()
  unsigned short too (as is req-index in struct devrequest).
 
 Sorry, but I'll prefer 'int' over 'unsigned short', since it looks to me
 that the u-boot would set 'req-index' to 0 at startup, which results in a
 'port = -1' to be passed to ehci_get_portsc_register().
 
 And I think '-1' is a better self-explain value, so I'd like to stick with
 'int'

Sure, but then the comparison is signed, not unsigned. Besides, it's 
unnecessary 
change to the logic of the code. Or did I miss something ?

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] Add minimal support for Congatec Conga-QEVAl Evaluation Carrier Board with a conga-Qmx6 module.

[SARTRE Leo]

On Monday 13 May 2013 14:58:32, Stefano Babic wrote :
 On 13/05/2013 14:02, SARTRE Leo wrote:
  Signed-off-by: Leo Sartre lsar...@adeneo-embedded.com
  ---
 
 Hi Leo,

Hi Stefano,

I will rework my patch taking all your remarks, and those from Wolfgang, into 
acount, I just like to talk a bit about the problem of duplicated code that 
you spooted. 
This patch is just a first commit for this board, there will come other commits 
to add missing functionnalities provided by the board, so I think that it will 
be more convenient to have a separate file even if for now, it is very similar 
to the sabrelite file. 
Anyway I will rework my patch and post again a cleaner version.

Best regards,
 
   board/freescale/cgtqmx6/Makefile  |   42 +++
   board/freescale/cgtqmx6/cgtqmx6.c |  627
   + boards.cfg   
   |1 +
   include/configs/cgtqmx6.h |  294 +
 
 You have also to update the MAINTAINERS file.
 
 As I understand from the Website, even if the board can be derived from
 the SabreLite, it is a different product from a different vendor.
 
 Why should the board then be put into freescale/ directory ?
 
 Generally we have the schema:
 
 board/board_name
 
 or
 
 board/vendor_name/board_name
 
  diff --git a/board/freescale/cgtqmx6/Makefile
  b/board/freescale/cgtqmx6/Makefile new file mode 100644
  index 000..a17603e
  --- /dev/null
  +++ b/board/freescale/cgtqmx6/Makefile
  @@ -0,0 +1,41 @@
  +#
  +# Copyright (C) 2007, Guennadi Liakhovetski l...@denx.de
  +#
  +# (C) Copyright 2013 Adeneo Embedded www.adeneo-embedded.com
  +#
  +# This program is free software; you can redistribute it and/or
  +# modify it under the terms of the GNU General Public License as
  +# published by the Free Software Foundation; either version 2 of
  +# the License, or (at your option) any later version.
  +#
  +# This program is distributed in the hope that it will be useful,
  +# but WITHOUT ANY WARRANTY; without even the implied warranty of
  +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  +# GNU General Public License for more details.
  +#
  +# You should have received a copy of the GNU General Public License
  +# along with this program; if not, write to the Free Software
  +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  +# MA 02111-1307 USA
  +#
  +
  +include $(TOPDIR)/config.mk
  +
  +LIB= $(obj)lib$(BOARD).o
  +
  +COBJS  := cgtqmx6.o
  +
  +SRCS   := $(COBJS:.o=.c)
  +OBJS   := $(addprefix $(obj),$(COBJS))
  +
  +$(LIB):$(obj).depend $(OBJS)
  +   $(call cmd_link_o_target, $(OBJS))
  +
  +
  # +
  +# defines $(obj).depend target
  +include $(SRCTREE)/rules.mk
  +
  +sinclude $(obj).depend
  +
  +
  # diff --git a/board/freescale/cgtqmx6/cgtqmx6.c
  b/board/freescale/cgtqmx6/cgtqmx6.c new file mode 100644
  index 000..ed5476a
  --- /dev/null
  +++ b/board/freescale/cgtqmx6/cgtqmx6.c
  @@ -0,0 +1,630 @@
  +/*
  + * Copyright (C) 2013, Adeneo Embedded www.adeneo-embedded.com
  + * Leo Sartre, lsar...@adeneo-embedded.com
  + * Based on mx6qsabrelite.c file
  + *
  + * This program is free software; you can redistribute it and/or
  + * modify it under the terms of the GNU General Public License as
  + * published by the Free Software Foundation; either version 2 of
  + * the License, or (at your option) any later version.
  + *
  + * This program is distributed in the hope that it will be useful,
  + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  + * GNU General Public License for more details.
  + *
  + * You should have received a copy of the GNU General Public License
  + * along with this program; if not, write to the Free Software
  + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  + * MA 02111-1307 USA
  + */
  +
  +#include common.h
  +#include asm/io.h
  +#include asm/arch/clock.h
  +#include asm/arch/imx-regs.h
  +#include asm/arch/iomux.h
  +#include asm/arch/mx6-pins.h
  +#include asm/errno.h
  +#include asm/gpio.h
  +#include asm/imx-common/iomux-v3.h
  +#include asm/imx-common/mxc_i2c.h
  +#include asm/imx-common/boot_mode.h
  +#include mmc.h
  +#include fsl_esdhc.h
  +#include malloc.h
  +#include linux/fb.h
  +#include ipu_pixfmt.h
  +#include asm/arch/crm_regs.h
  +#include asm/arch/mxc_hdmi.h
  +#include i2c.h
  +
  +DECLARE_GLOBAL_DATA_PTR;
  +
  +#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |\
  +   PAD_CTL_PUS_100K_UP |\
  +   PAD_CTL_SPEED_MED   |\
  +   PAD_CTL_DSE_40ohm   |\
  +   PAD_CTL_SRE_FAST|\
  +   PAD_CTL_HYS)
  +
  

Re: [U-Boot] Question: issues for usb keyboard work with OHCI HCD

[Marek Vasut]

Dear Bo Shen,

 Hi All,
 
 On 5/6/2013 11:01, Bo Shen wrote:
  Hi Marek,
  
  On 5/3/2013 21:40, Marek Vasut wrote:
  Dear Bo Shen,
  
  Hi All,
  
  Now, I test usb host support with Atmel boards, for example,
  
  at91sam9x5ek board.
  
  When test OHCI USB host with usb keyboard. I meet the following
  
  issue.
  ---8---
  U-Boot 2013.04-dirty (May 03 2013 - 11:00:34)
  
  CPU: AT91SAM9G35
  Crystal frequency:   12 MHz
  CPU clock:  400 MHz
  Master clock :  133.333 MHz
  DRAM:  128 MiB
  WARNING: Caches not enabled
  NAND:  256 MiB
  MMC:   mci: 0
  In:serial
  Out:   serial
  Err:   serial
  Net:   macb0
  Hit any key to stop autoboot:  0
  U-Boot usb start
  (Re)start USB...
  USB0:   scanning bus 0 for devices... 2 USB Device(s) found
  
   scanning usb for storage devices... 0 Storage Device(s) found
  
  U-Boot setenv stdin usbkbd
  U-Boot ERROR: sohci_submit_job: ENOMEM
  ERROR: sohci_submit_job failed
  ... ...
  (repeat to print these two error line)
  
  So the USB subsystem is leaking memory? Or do you only have too small
  MALLOC
  area?
  
  I am not sure whether USB subsystem is leaking memory. I am digging it.
  
  This issue is not relative with MALLOC area.
  This issue come out when all ptd[i].usb_dev (the maximum value of i is
  64) is not NULL. Each time to call td_alloc, it will check whether
  ptd[i].usb_dev is NULL (i from 0 to 63), if not find one of
  ptd[i].usb_dev is NULL, then report ENOMEM.
 
 All clue for this issue?

I assume you mean the TDs are all used up then? Are they not free'd ?

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] usb: asix: Move software resets to basic_init

[Marek Vasut]

Dear Simon Glass,

 From: Julius Werner jwer...@chromium.org
 
 The ASIX driver calls a basic_init() function during get_info(), so that
 not all initialization tasks need to be redone on every init().
 Unfortunately, the most important one is still triggered too often: the
 driver does a full port and MII reset on every asix_init(), requiring up
 to several seconds to reestablish the link.
 
 This patch confines that software reset into the asix_basic_init()
 function so that it will only be executed once. This saves about a
 second of boot time on systems using BOOTP.
 
 Note: this patch was previously submitted many moons ago as:
 
usb: usbeth: asix: Do a fast init if link already established
 
 That patch seens to have been lost or forgotten, so this is a rebased
 version. It is tested on snow with a Asix USB dongle (Cisco).
 
 Signed-off-by: Julius Werner jwer...@chromium.org
 Signed-off-by: Simon Glass s...@chromium.org
 Reviewed-by: Simon Glass s...@chromium.org
 Reviewed-by: Vadim Bendebury vben...@chromium.org

I'll pick it, but I wonder why Joe didn't ...

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 2/6] am335x_evm: Add MTDPARTS info for SPI flash

[Tom Rini]

On Mon, May 13, 2013 at 08:24:23AM -0400, Tom Rini wrote:
 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1
 
 On 05/12/2013 05:10 PM, Peter Korsgaard wrote:
  Tom == Tom Rini tr...@ti.com writes:
  
  Tom Signed-off-by: Tom Rini tr...@ti.com Tom --- Tom
  include/configs/am335x_evm.h |7 +++ Tom  1 file changed, 7
  insertions(+)
  
  Tom diff --git a/include/configs/am335x_evm.h
  b/include/configs/am335x_evm.h Tom index 945ec09..004a06a 100644 
  Tom --- a/include/configs/am335x_evm.h Tom +++
  b/include/configs/am335x_evm.h Tom @@ -436,6 +436,13 @@ Tom  #
  define CONFIG_ENV_SPI_MAX_HZCONFIG_SF_DEFAULT_SPEED Tom  #
  define CONFIG_ENV_OFFSET(892  10) /* 892 KiB in */ Tom  #
  define CONFIG_ENV_SECT_SIZE (4  10) /* 4 KB sectors */ Tom
  +#define CONFIG_CMD_MTDPARTS Tom +#define MTDIDS_DEFAULT
  nor0=physmap-flash.0 Tom +#define MTDPARTS_DEFAULT
  mtdparts=physmap-flash.0:128k(SPL), \
  
  physmap for a spi flash? I would have expected to see m25p80?
 
 Yes, I'd swear it's physmap when I've tested it on the vendor kernel tree.

Or I must be misrecalling things, changed.

-- 
Tom


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[U-Boot] [PATCH v02 1/2] OMAP3+: introduce generic ABB support

[Andrii Tseglytskyi]

Adaptive Body Biasing (ABB) modulates transistor bias voltages
dynamically in order to optimize switching speed versus leakage.
Adaptive Body-Bias ldos are present for some voltage domains
starting with OMAP3630. There are three modes of operation:

* Bypass - the default, it just follows the vdd voltage
* Foward Body-Bias - applies voltage bias to increase transistor
  performance at the cost of power.  Used to operate safely at high
  OPPs.
* Reverse Body-Bias - applies voltage bias to decrease leakage and
  save power.  Used to save power at lower OPPs.

Signed-off-by: Andrii Tseglytskyi andrii.tseglyts...@ti.com
---
 arch/arm/cpu/armv7/omap-common/Makefile |1 +
 arch/arm/cpu/armv7/omap-common/abb.c|  139 +++
 arch/arm/cpu/armv7/omap5/Makefile   |1 +
 arch/arm/cpu/armv7/omap5/abb.c  |   67 +++
 arch/arm/include/asm/arch-omap3/omap3.h |7 ++
 arch/arm/include/asm/arch-omap4/omap.h  |7 ++
 arch/arm/include/asm/arch-omap5/omap.h  |   13 +++
 arch/arm/include/asm/omap_common.h  |   22 +
 8 files changed, 257 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/omap-common/abb.c
 create mode 100644 arch/arm/cpu/armv7/omap5/abb.c

diff --git a/arch/arm/cpu/armv7/omap-common/Makefile 
b/arch/arm/cpu/armv7/omap-common/Makefile
index 55e82ba..c4b9809 100644
--- a/arch/arm/cpu/armv7/omap-common/Makefile
+++ b/arch/arm/cpu/armv7/omap-common/Makefile
@@ -34,6 +34,7 @@ COBJS += hwinit-common.o
 COBJS  += clocks-common.o
 COBJS  += emif-common.o
 COBJS  += vc.o
+COBJS  += abb.o
 endif
 
 ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
diff --git a/arch/arm/cpu/armv7/omap-common/abb.c 
b/arch/arm/cpu/armv7/omap-common/abb.c
new file mode 100644
index 000..73eadb2
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap-common/abb.c
@@ -0,0 +1,139 @@
+/*
+ *
+ * Adaptive Body Bias programming sequence for OMAP family
+ *
+ * (C) Copyright 2013
+ * Texas Instruments, www.ti.com
+ *
+ * Andrii Tseglytskyi andrii.tseglyts...@ti.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/omap_common.h
+#include asm/io.h
+#include asm/arch/sys_proto.h
+
+__weak s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)
+{
+   return -1;
+}
+
+static void abb_setup_timings(u32 setup)
+{
+   u32 sys_rate, sr2_cnt, clk_cycles;
+
+   /*
+* SR2_WTCNT_VALUE is the settling time for the ABB ldo after a
+* transition and must be programmed with the correct time at boot.
+* The value programmed into the register is the number of SYS_CLK
+* clock cycles that match a given wall time profiled for the ldo.
+* This value depends on:
+* settling time of ldo in micro-seconds (varies per OMAP family),
+* of clock cycles per SYS_CLK period (varies per OMAP family),
+* the SYS_CLK frequency in MHz (varies per board)
+* The formula is:
+*
+* ldo settling time (in micro-seconds)
+* SR2_WTCNT_VALUE = --
+*  (# system clock cycles) * (sys_clk period)
+*
+* Put another way:
+*
+* SR2_WTCNT_VALUE = settling time / (# SYS_CLK cycles / SYS_CLK rate))
+*
+* To avoid dividing by zero multiply both # clock cycles and
+* settling time by 10 such that the final result is the one we want.
+*/
+
+   /* calculate SR2_WTCNT_VALUE */
+   sys_rate = DIV_ROUND(V_OSCK, 100);
+   clk_cycles = DIV_ROUND(OMAP_ABB_CLOCK_CYCLES * 10, sys_rate);
+   sr2_cnt = DIV_ROUND(OMAP_ABB_SETTLING_TIME * 10, clk_cycles);
+
+   setbits_le32(setup,
+sr2_cnt  (ffs(OMAP_ABB_SETUP_SR2_WTCNT_VALUE_MASK) - 1));
+}
+
+void abb_setup(u32 fuse, u32 ldovbb, u32 setup, u32 control,
+  u32 txdone, u32 txdone_mask, u32 opp)
+{
+   u32 abb_type_mask, opp_sel_mask;
+
+   /* sanity check */
+   if (!setup || !control || !txdone)
+   return;
+
+   /* setup ABB only in case of Fast or Slow OPP */
+   switch (opp) {
+   case OMAP_ABB_FAST_OPP:
+   abb_type_mask = 

[U-Boot] [PATCH v02 0/2] OMAP3+: introduce generic Adaptive Body Bias Support

[Andrii Tseglytskyi]

Adaptive Body Biasing (ABB) modulates transistor bias voltages
dynamically in order to optimize switching speed versus leakage.
Adaptive Body-Bias ldos are present for some voltage domains:
starting with OMAP3630. There are three modes of operation:

* Bypass - the default, it just follows the vdd voltage
* Foward Body-Bias - applies voltage bias to increase transistor
  performance at the cost of power.  Used to operate safely at high
  OPPs.
* Reverse Body-Bias - applies voltage bias to decrease leakage and
  save power.  Used to save power at lower OPPs.

The application of FBB/RBB technique is determined for each unique
device in some process nodes, whereas, they are mandated on other
process nodes.

OMAP5 silicon requires ABB to be properly configured on early boot stage.
The following patch series adds generic ABB configuration and enables
it for OMAP5 silicons.

v02: series contains minor comments fixes.

Andrii Tseglytskyi (2):
  OMAP3+: introduce generic ABB support
  OMAP5: add ABB setup for MPU voltage domain

 arch/arm/cpu/armv7/omap-common/Makefile|1 +
 arch/arm/cpu/armv7/omap-common/abb.c   |  139 
 arch/arm/cpu/armv7/omap-common/clocks-common.c |9 ++
 arch/arm/cpu/armv7/omap5/Makefile  |1 +
 arch/arm/cpu/armv7/omap5/abb.c |   67 
 arch/arm/cpu/armv7/omap5/prcm-regs.c   |7 ++
 arch/arm/include/asm/arch-omap3/omap3.h|7 ++
 arch/arm/include/asm/arch-omap4/omap.h |7 ++
 arch/arm/include/asm/arch-omap5/omap.h |   13 +++
 arch/arm/include/asm/omap_common.h |   22 
 10 files changed, 273 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/omap-common/abb.c
 create mode 100644 arch/arm/cpu/armv7/omap5/abb.c

-- 
1.7.9.5

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[U-Boot] [PATCH v02 2/2] OMAP5: add ABB setup for MPU voltage domain

[Andrii Tseglytskyi]

Patch adds a call of abb_setup() function, and proper registers
definitions needed for ABB setup sequence. ABB is initialized
for MPU voltage domain.

Signed-off-by: Andrii Tseglytskyi andrii.tseglyts...@ti.com
---
 arch/arm/cpu/armv7/omap-common/clocks-common.c |9 +
 arch/arm/cpu/armv7/omap5/prcm-regs.c   |7 +++
 2 files changed, 16 insertions(+)

diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c 
b/arch/arm/cpu/armv7/omap-common/clocks-common.c
index 2b955c7..bdecaf8 100644
--- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
+++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
@@ -533,6 +533,15 @@ void scale_vcores(struct vcores_data const *vcores)
do_scale_vcore(vcores-mpu.addr, vcores-mpu.value,
  vcores-mpu.pmic);
 
+   /* Configure MPU ABB LDO after scale */
+   abb_setup((*ctrl)-control_std_fuse_opp_vdd_mpu_2,
+ (*ctrl)-control_wkup_ldovbb_mpu_voltage_ctrl,
+ (*prcm)-prm_abbldo_mpu_setup,
+ (*prcm)-prm_abbldo_mpu_ctrl,
+ (*prcm)-prm_irqstatus_mpu_2,
+ OMAP_ABB_MPU_TXDONE_MASK,
+ OMAP_ABB_FAST_OPP);
+
do_scale_vcore(vcores-mm.addr, vcores-mm.value,
  vcores-mm.pmic);
 
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c 
b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index b8a61fe..b4b624e 100644
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -311,6 +311,7 @@ struct prcm_regs const omap5_es1_prcm = {
 
 struct omap_sys_ctrl_regs const omap5_ctrl = {
.control_status = 0x4A002134,
+   .control_std_fuse_opp_vdd_mpu_2 = 0x4A0021B4,
.control_paconf_global  = 0x4A002DA0,
.control_paconf_mode= 0x4A002DA4,
.control_smart1io_padconf_0 = 0x4A002DA8,
@@ -358,6 +359,7 @@ struct omap_sys_ctrl_regs const omap5_ctrl = {
.control_port_emif2_sdram_config= 0x4AE0C118,
.control_emif1_sdram_config_ext = 0x4AE0C144,
.control_emif2_sdram_config_ext = 0x4AE0C148,
+   .control_wkup_ldovbb_mpu_voltage_ctrl   = 0x4AE0C318,
.control_smart1nopmio_padconf_0 = 0x4AE0CDA0,
.control_smart1nopmio_padconf_1 = 0x4AE0CDA4,
.control_padconf_mode   = 0x4AE0CDA8,
@@ -709,6 +711,9 @@ struct prcm_regs const omap5_es2_prcm = {
.cm_l3init_fsusb_clkctrl = 0x4a0096d0,
.cm_l3init_ocp2scp1_clkctrl = 0x4a0096e0,
 
+   /* prm irqstatus regs */
+   .prm_irqstatus_mpu_2 = 0x4ae06014,
+
/* l4 wkup regs */
.cm_abe_pll_ref_clksel = 0x4ae0610c,
.cm_sys_clksel = 0x4ae06110,
@@ -739,6 +744,8 @@ struct prcm_regs const omap5_es2_prcm = {
.prm_sldo_mpu_ctrl = 0x4ae07cd0,
.prm_sldo_mm_setup = 0x4ae07cd4,
.prm_sldo_mm_ctrl = 0x4ae07cd8,
+   .prm_abbldo_mpu_setup = 0x4ae07cdc,
+   .prm_abbldo_mpu_ctrl = 0x4ae07ce0,
 };
 
 struct prcm_regs const dra7xx_prcm = {
-- 
1.7.9.5

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Re: [U-Boot] [PATCH] Tegra: clk: always use find_best_divider() for periph clocks

[Tom Warren]

Allen,

 -Original Message-
 From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
 Sent: Friday, May 10, 2013 8:06 PM
 To: Allen Martin
 Cc: Tom Warren; Stephen Warren; U-Boot Mailing List
 Subject: Re: [PATCH] Tegra: clk: always use find_best_divider() for periph
 clocks
 
 On Fri, May 10, 2013 at 8:56 PM, Allen Martin amar...@nvidia.com wrote:
  When adjusting peripheral clocks always use find_best_divider()
  instead of clk_get_divider() even when a secondary divider is not
  available.  In the case where is requested clock is too slow to be
  derived from the parent clock this allows a best effort to get close
  to the requested clock.
 
  This comes up for commands like sf where the user can pass a clock
  speed on the command line or sspi where the clock is hardcoded to
  1MHz, but the Tegra114 SPI controller can't go that low.

Did you test all other periphs and check their config'd clocks to make sure 
this doesn't affect anything else negatively? This proc is pretty universal 
(called by clock_start_periph_pll, which is used by MMC/I2C/USB/display 
drivers).

Tom
 
  Signed-off-by: Allen Martin amar...@nvidia.com
 
 Seems right to me,
 
 Acked-by: Simon Glass s...@chromium.org

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Re: [U-Boot] [PATCH] Tegra: clk: always use find_best_divider() for periph clocks

[Allen Martin]

On Mon, May 13, 2013 at 10:24:17AM -0700, Tom Warren wrote:
 Allen,
 
  -Original Message-
  From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
  Sent: Friday, May 10, 2013 8:06 PM
  To: Allen Martin
  Cc: Tom Warren; Stephen Warren; U-Boot Mailing List
  Subject: Re: [PATCH] Tegra: clk: always use find_best_divider() for periph
  clocks
  
  On Fri, May 10, 2013 at 8:56 PM, Allen Martin amar...@nvidia.com wrote:
   When adjusting peripheral clocks always use find_best_divider()
   instead of clk_get_divider() even when a secondary divider is not
   available.  In the case where is requested clock is too slow to be
   derived from the parent clock this allows a best effort to get close
   to the requested clock.
  
   This comes up for commands like sf where the user can pass a clock
   speed on the command line or sspi where the clock is hardcoded to
   1MHz, but the Tegra114 SPI controller can't go that low.
 
 Did you test all other periphs and check their config'd clocks to make sure 
 this doesn't affect anything else negatively? This proc is pretty universal 
 (called by clock_start_periph_pll, which is used by MMC/I2C/USB/display 
 drivers).
 

I tested a handful of peripherals on dalmore, but you're right this is
generic enough that it warrants a more thorough test scrubbing.  I'll
try to hit all the peripherals I can across all chipsets and report
back. 

-Allen
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Re: [U-Boot] [PATCH 3/3] usb: Correct CLEAR_FEATURE code in ehci-hcd

[Julius Werner]

Thanks for taking charge of this Simon, looks good to me. Good catch
with the missing break!

Now that I look at it, the FEAT_C_ENABLE section seems to be broken as
well, it should be setting EHCI_PS_PEC instead of EHCI_PS_PE. Maybe
that code path is never used in practice.

Acked-by: Julius Werner jwer...@chromium.org
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[U-Boot] [PATCH v2 1/7] am33xx/omap3: Clean up gpmc_init slightly

[Tom Rini]

We don't really need the gpmc_config, base and size variables and can
just call enable_gpmc_cs_config more directly, like the boards which
need to re-configure CS0 or CS1 do.

Signed-off-by: Tom Rini tr...@ti.com

---
Changes in v2:
- New patch
---
 arch/arm/cpu/armv7/am33xx/mem.c |   12 ++--
 arch/arm/cpu/armv7/omap3/mem.c  |   18 --
 2 files changed, 6 insertions(+), 24 deletions(-)

diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c
index b86b0de..45f5426 100644
--- a/arch/arm/cpu/armv7/am33xx/mem.c
+++ b/arch/arm/cpu/armv7/am33xx/mem.c
@@ -75,11 +75,6 @@ void gpmc_init(void)
/* putting a blanket check on GPMC based on ZeBu for now */
gpmc_cfg = (struct gpmc *)GPMC_BASE;
 
-#ifdef CONFIG_CMD_NAND
-   const u32 *gpmc_config = NULL;
-   u32 base = 0;
-   u32 size = 0;
-#endif
/* global settings */
writel(0x0008, gpmc_cfg-sysconfig);
writel(0x0100, gpmc_cfg-irqstatus);
@@ -92,10 +87,7 @@ void gpmc_init(void)
sdelay(1000);
 
 #ifdef CONFIG_CMD_NAND
-   gpmc_config = gpmc_m_nand;
-
-   base = PISMO1_NAND_BASE;
-   size = PISMO1_NAND_SIZE;
-   enable_gpmc_cs_config(gpmc_config, gpmc_cfg-cs[0], base, size);
+   enable_gpmc_cs_config(gpmc_m_nand, gpmc_cfg-cs[0],
+ CONFIG_SYS_NAND_BASE, GPMC_SIZE_256M);
 #endif
 }
diff --git a/arch/arm/cpu/armv7/omap3/mem.c b/arch/arm/cpu/armv7/omap3/mem.c
index d04a5a1..6f65a73 100644
--- a/arch/arm/cpu/armv7/omap3/mem.c
+++ b/arch/arm/cpu/armv7/omap3/mem.c
@@ -113,11 +113,6 @@ void gpmc_init(void)
 {
/* putting a blanket check on GPMC based on ZeBu for now */
gpmc_cfg = (struct gpmc *)GPMC_BASE;
-#if defined(CONFIG_CMD_NAND) || defined(CONFIG_CMD_ONENAND)
-   const u32 *gpmc_config = NULL;
-   u32 base = 0;
-   u32 size = 0;
-#endif
u32 config = 0;
 
/* global settings */
@@ -136,17 +131,12 @@ void gpmc_init(void)
sdelay(1000);
 
 #if defined(CONFIG_CMD_NAND)   /* CS 0 */
-   gpmc_config = gpmc_m_nand;
-
-   base = PISMO1_NAND_BASE;
-   size = PISMO1_NAND_SIZE;
-   enable_gpmc_cs_config(gpmc_config, gpmc_cfg-cs[0], base, size);
+   enable_gpmc_cs_config(gpmc_m_nand, gpmc_cfg-cs[0], PISMO1_NAND_BASE,
+ PISMO1_NAND_SIZE);
 #endif
 
 #if defined(CONFIG_CMD_ONENAND)
-   gpmc_config = gpmc_onenand;
-   base = PISMO1_ONEN_BASE;
-   size = PISMO1_ONEN_SIZE;
-   enable_gpmc_cs_config(gpmc_config, gpmc_cfg-cs[0], base, size);
+   enable_gpmc_cs_config(gpmc_onenand, gpmc_cfg-cs[0], PISMO1_ONEN_BASE,
+ PISMO1_ONEN_SIZE);
 #endif
 }
-- 
1.7.9.5

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[U-Boot] [PATCH v2 2/7] am335x_evm: Drop useless CONFIG_ENV_IS_NOWHERE

[Tom Rini]

We always set a CONFIG_ENV_IS_...somewhere... so drop the initial define
of NOWHERE.

Reviewed-by: Peter Korsgaard jac...@sunsite.dk
Signed-off-by: Tom Rini tr...@ti.com
---
 include/configs/am335x_evm.h |4 
 1 file changed, 4 deletions(-)

diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index ef00306..945ec09 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -298,8 +298,6 @@
 #define CONFIG_ENV_OVERWRITE   1
 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 
-#define CONFIG_ENV_IS_NOWHERE
-
 /* Defines for SPL */
 #define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK
@@ -434,7 +432,6 @@
  * 0x442000 - 0x80 : Userland
  */
 #if defined(CONFIG_SPI_BOOT)
-# undef CONFIG_ENV_IS_NOWHERE
 # define CONFIG_ENV_IS_IN_SPI_FLASH
 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
 # define CONFIG_ENV_OFFSET (892  10) /* 892 KiB in */
@@ -481,7 +478,6 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE 1   /* Max number of NAND
   devices */
 #if !defined(CONFIG_SPI_BOOT)
-#undef CONFIG_ENV_IS_NOWHERE
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET  0x26 /* environment starts here */
 #define CONFIG_SYS_ENV_SECT_SIZE   (128  10) /* 128 KiB */
-- 
1.7.9.5

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[U-Boot] [PATCH v2 3/7] am335x_evm: Update SPI_BOOT support, add MTDPARTS info

[Tom Rini]

- Style cleanup (# define - #define)
- Due to ROM issues, redudant loading isn't feasible, so drop.
- Given extra space, increase max size of U-Boot to 512KiB
- Correct env size to match usage (we had not re-defined ENV_SIZE).
- Given extra space, keep env size as 128KiB, add redundant environment.

Signed-off-by: Tom Rini tr...@ti.com

---
Changes in v2:
- Correct physmap - m25p80 in mtdparts (Peter K).
- Style fixups, drop redundant SPL space, add redundant environment.

Signed-off-by: Tom Rini tr...@ti.com
---
 include/configs/am335x_evm.h |   33 +++--
 1 file changed, 19 insertions(+), 14 deletions(-)

diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 945ec09..15822b4 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -330,7 +330,7 @@
 #define CONFIG_SPL_SPI_LOAD
 #define CONFIG_SPL_SPI_BUS 0
 #define CONFIG_SPL_SPI_CS  0
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x2
 #define CONFIG_SPL_MUSB_NEW_SUPPORT
 #define CONFIG_SPL_LDSCRIPT$(CPUDIR)/am33xx/u-boot-spl.lds
 
@@ -420,22 +420,27 @@
 #endif
 
 /*
- * Default to using SPI for environment, etc.  We have multiple copies
- * of SPL as the ROM will check these locations.
- * 0x0 - 0x2 : First copy of SPL
- * 0x2 - 0x4 : Second copy of SPL
- * 0x4 - 0x6 : Third copy of SPL
- * 0x6 - 0x8 : Fourth copy of SPL
- * 0x8 - 0xDF000 : U-Boot
- * 0xDF000 - 0xE : U-Boot Environment
- * 0xE - 0x442000 : Linux Kernel
+ * Default to using SPI for environment, etc.
+ * 0x00 - 0x02 : SPL (128KiB)
+ * 0x02 - 0x0A : U-Boot (512KiB)
+ * 0x0A - 0x0B : First copy of U-Boot Environment (128KiB)
+ * 0x0C - 0x0D : Second copy of U-Boot Environment (128KiB)
+ * 0x0E - 0x442000 : Linux Kernel
  * 0x442000 - 0x80 : Userland
  */
 #if defined(CONFIG_SPI_BOOT)
-# define CONFIG_ENV_IS_IN_SPI_FLASH
-# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
-# define CONFIG_ENV_OFFSET (892  10) /* 892 KiB in */
-# define CONFIG_ENV_SECT_SIZE  (4  10) /* 4 KB sectors */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_ENV_SPI_MAX_HZ  CONFIG_SF_DEFAULT_SPEED
+#define CONFIG_ENV_SECT_SIZE   (4  10) /* 4 KB sectors */
+#define CONFIG_ENV_OFFSET  (768  10) /* 768 KiB in */
+#define CONFIG_ENV_OFFSET_REDUND   (896  10) /* 896 KiB in */
+#define CONFIG_CMD_MTDPARTS
+#define MTDIDS_DEFAULT nor0=m25p80-flash.0
+#define MTDPARTS_DEFAULT   mtdparts=m25p80-flash.0:128k(SPL), \
+   512k(u-boot),128k(u-boot-env1), \
+   128k(u-boot-env2),3464k(kernel), \
+   -(rootfs)
 #endif /* SPI support */
 
 /* Unsupported features */
-- 
1.7.9.5

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[U-Boot] [PATCH v2 4/7] am335x_evm: Only set CONFIG_NAND when !CONFIG_SPI_BOOT

[Tom Rini]

Due to hardware design the board supported by the am335x_evm config
cannot have both NAND and SPI (or NOR) enabled at the same time due to
conflicts.  Disable the NAND SW stack when we know we can't have it
present.

Signed-off-by: Tom Rini tr...@ti.com

---
Changes in v2:
- Reword commit message
---
 include/configs/am335x_evm.h |9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 15822b4..3df0840 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -230,7 +230,9 @@
 /* USB Device Firmware Update support */
 #define CONFIG_DFU_FUNCTION
 #define CONFIG_DFU_MMC
+#ifdef CONFIG_NAND
 #define CONFIG_DFU_NAND
+#endif
 #define CONFIG_CMD_DFU
 #define DFU_ALT_INFO_MMC \
boot part 0 1; \
@@ -335,11 +337,13 @@
 #define CONFIG_SPL_LDSCRIPT$(CPUDIR)/am33xx/u-boot-spl.lds
 
 #define CONFIG_SPL_BOARD_INIT
+#ifdef CONFIG_NAND
 #define CONFIG_SPL_NAND_AM33XX_BCH
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
+#endif
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
 CONFIG_SYS_NAND_PAGE_SIZE)
@@ -464,7 +468,10 @@
 #define CONFIG_PHY_ADDR0
 #define CONFIG_PHY_SMSC
 
+#if !defined(CONFIG_SPI_BOOT)
 #define CONFIG_NAND
+#endif
+
 /* NAND support */
 #ifdef CONFIG_NAND
 #define CONFIG_CMD_NAND
@@ -482,11 +489,9 @@
/* CS0 */
 #define CONFIG_SYS_MAX_NAND_DEVICE 1   /* Max number of NAND
   devices */
-#if !defined(CONFIG_SPI_BOOT)
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET  0x26 /* environment starts here */
 #define CONFIG_SYS_ENV_SECT_SIZE   (128  10) /* 128 KiB */
 #endif
-#endif
 
 #endif /* ! __CONFIG_AM335X_EVM_H */
-- 
1.7.9.5

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[U-Boot] [PATCH v2 7/7] am335x_evm: Add support to boot from NOR.

[Tom Rini]

From: Steve Kipisz s-kipi...@ti.com

NOR requires that s_init be within the first 4KiB of the image so that
we can perform the rest of the required pinmuxing to talk with the rest
of NOR that we are found on.  When NOR_BOOT is set we save our
environment in NOR at 512KiB and a redundant copy at 768KiB.  We avoid
using SPL for this case and u-boot.bin is written directly to the start
of NOR.

Signed-off-by: Steve Kipisz s-kipi...@ti.com
Signed-off-by: Tom Rini tr...@ti.com

---
Changes in v2:
- Reword commit message slightly
---
 arch/arm/cpu/armv7/am33xx/emif4.c |6 +-
 board/ti/am335x/Makefile  |2 +-
 board/ti/am335x/board.c   |   31 ++-
 board/ti/am335x/mux.c |6 +-
 board/ti/am335x/u-boot.lds|  110 +
 boards.cfg|1 +
 include/configs/am335x_evm.h  |   26 -
 7 files changed, 173 insertions(+), 9 deletions(-)
 create mode 100644 board/ti/am335x/u-boot.lds

diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c 
b/arch/arm/cpu/armv7/am33xx/emif4.c
index aa84e96..370230b 100644
--- a/arch/arm/cpu/armv7/am33xx/emif4.c
+++ b/arch/arm/cpu/armv7/am33xx/emif4.c
@@ -43,9 +43,11 @@ void dram_init_banksize(void)
 }
 
 
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+#ifdef CONFIG_TI81XX
 static struct dmm_lisa_map_regs *hw_lisa_map_regs =
(struct dmm_lisa_map_regs *)DMM_BASE;
+#endif
 static struct vtp_reg *vtpreg[2] = {
(struct vtp_reg *)VTP0_CTRL_ADDR,
(struct vtp_reg *)VTP1_CTRL_ADDR};
@@ -53,6 +55,7 @@ static struct vtp_reg *vtpreg[2] = {
 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
 #endif
 
+#ifdef CONFIG_TI81XX
 void config_dmm(const struct dmm_lisa_map_regs *regs)
 {
enable_dmm_clocks();
@@ -67,6 +70,7 @@ void config_dmm(const struct dmm_lisa_map_regs *regs)
writel(regs-dmm_lisa_map_1, hw_lisa_map_regs-dmm_lisa_map_1);
writel(regs-dmm_lisa_map_0, hw_lisa_map_regs-dmm_lisa_map_0);
 }
+#endif
 
 static void config_vtp(int nr)
 {
diff --git a/board/ti/am335x/Makefile b/board/ti/am335x/Makefile
index 67a87a1..1795e3e 100644
--- a/board/ti/am335x/Makefile
+++ b/board/ti/am335x/Makefile
@@ -18,7 +18,7 @@ include $(TOPDIR)/config.mk
 
 LIB= $(obj)lib$(BOARD).o
 
-ifdef CONFIG_SPL_BUILD
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y)
 COBJS  := mux.o
 endif
 
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 3660655..69b8e0d 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -39,7 +39,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || (CONFIG_NOR_BOOT)
 static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
 #endif
 
@@ -95,7 +95,7 @@ static int read_eeprom(struct am335x_baseboard_id *header)
 }
 
 /* UART Defines */
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
 #define UART_RESET (0x1  1)
 #define UART_CLK_RUNNING_MASK  0x1
 #define UART_SMART_IDLE_EN (0x1  0x3)
@@ -274,6 +274,24 @@ void s_init(void)
 {
__maybe_unused struct am335x_baseboard_id header;
 
+   /*
+* The ROM will only have set up sufficient pinmux to allow for the
+* first 4KiB NOR to be read, we must finish doing what we know of
+* the NOR mux in this space in order to continue.
+*/
+#ifdef CONFIG_NOR_BOOT
+   asm(stmfd  sp!, {r2 - r4});
+   asm(movw   r4, #0x8A4);
+   asm(movw   r3, #0x44E1);
+   asm(orrr4, r4, r3, lsl #16);
+   asm(movr2, #9);
+   asm(movr3, #8);
+   asm(gpmc_mux:  str r2, [r4], #4);
+   asm(subs   r3, r3, #1);
+   asm(bnegpmc_mux);
+   asm(ldmfd  sp!, {r2 - r4});
+#endif
+
/* WDT1 is already running when the bootloader gets control
 * Disable it to avoid random resets
 */
@@ -284,7 +302,7 @@ void s_init(void)
while (readl(wdtimer-wdtwwps) != 0x0)
;
 
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
/* Setup the PLLs and the clocks for the peripherals */
pll_init();
 
@@ -325,9 +343,16 @@ void s_init(void)
regVal |= UART_SMART_IDLE_EN;
writel(regVal, uart_base-uartsyscfg);
 
+#if defined(CONFIG_NOR_BOOT)
+   /* We want our console now. */
+   gd-baudrate = CONFIG_BAUDRATE;
+   serial_init();
+   gd-have_console = 1;
+#else
gd = gdata;
 
preloader_console_init();
+#endif
 
/* Initalize the board header */
enable_i2c0_pin_mux();
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 187468e..5b7ed63 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -190,7 +190,7 @@ static struct module_pin_mux 

[U-Boot] [PATCH v2 5/7] am335x_evm: Rework board_is_foo() checks

[Tom Rini]

We rework the various board_is_foo() checks to take a pointer to
struct am335x_baseboard_id rather than using a local copy in board.c.
This allows us to make use of the same checks in mux.c as well as fixing
problems when this code could be running from read-only memory.

Signed-off-by: Tom Rini tr...@ti.com

---
Changes in v2:
- Fix checkpatch warnings
---
 board/ti/am335x/board.c |   78 ---
 board/ti/am335x/board.h |   31 +++
 board/ti/am335x/mux.c   |   10 +++---
 3 files changed, 62 insertions(+), 57 deletions(-)

diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index b371376..0ee2f7e 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -51,43 +51,10 @@ static struct uart_sys *uart_base = (struct uart_sys 
*)DEFAULT_UART_BASE;
 
 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
 
-static struct am335x_baseboard_id __attribute__((section (.data))) header;
-
-static inline int board_is_bone(void)
-{
-   return !strncmp(header.name, A335BONE, HDR_NAME_LEN);
-}
-
-static inline int board_is_bone_lt(void)
-{
-   return !strncmp(header.name, A335BNLT, HDR_NAME_LEN);
-}
-
-static inline int board_is_evm_sk(void)
-{
-   return !strncmp(A335X_SK, header.name, HDR_NAME_LEN);
-}
-
-static inline int board_is_idk(void)
-{
-   return !strncmp(header.config, SKU#02, 6);
-}
-
-static int __maybe_unused board_is_gp_evm(void)
-{
-   return !strncmp(A33515BB, header.name, 8);
-}
-
-int board_is_evm_15_or_later(void)
-{
-   return (!strncmp(A33515BB, header.name, 8) 
-   strncmp(1.5, header.version, 3) = 0);
-}
-
 /*
  * Read header information from EEPROM into global structure.
  */
-static int read_eeprom(void)
+static int read_eeprom(struct am335x_baseboard_id *header)
 {
/* Check if baseboard eeprom is available */
if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {
@@ -97,28 +64,28 @@ static int read_eeprom(void)
}
 
/* read the eeprom using i2c */
-   if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)header,
-   sizeof(header))) {
+   if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)header,
+sizeof(struct am335x_baseboard_id))) {
puts(Could not read the EEPROM; something fundamentally
 wrong on the I2C bus.\n);
return -EIO;
}
 
-   if (header.magic != 0xEE3355AA) {
+   if (header-magic != 0xEE3355AA) {
/*
 * read the eeprom using i2c again,
 * but use only a 1 byte address
 */
-   if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 1,
-   (uchar *)header, sizeof(header))) {
+   if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 1, (uchar *)header,
+sizeof(struct am335x_baseboard_id))) {
puts(Could not read the EEPROM; something 
fundamentally wrong on the I2C bus.\n);
return -EIO;
}
 
-   if (header.magic != 0xEE3355AA) {
+   if (header-magic != 0xEE3355AA) {
printf(Incorrect magic number (0x%x) in EEPROM\n,
-   header.magic);
+   header-magic);
return -EINVAL;
}
}
@@ -304,6 +271,8 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
  */
 void s_init(void)
 {
+   __maybe_unused struct am335x_baseboard_id header;
+
/* WDT1 is already running when the bootloader gets control
 * Disable it to avoid random resets
 */
@@ -362,11 +331,11 @@ void s_init(void)
/* Initalize the board header */
enable_i2c0_pin_mux();
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-   if (read_eeprom()  0)
+   if (read_eeprom(header)  0)
puts(Could not get board ID.\n);
 
enable_board_pin_mux(header);
-   if (board_is_evm_sk()) {
+   if (board_is_evm_sk(header)) {
/*
 * EVM SK 1.2A and later use gpio0_7 to enable DDR3.
 * This is safe enough to do on older revs.
@@ -375,15 +344,15 @@ void s_init(void)
gpio_direction_output(GPIO_DDR_VTT_EN, 1);
}
 
-   if (board_is_evm_sk())
+   if (board_is_evm_sk(header))
config_ddr(303, MT41J128MJT125_IOCTRL_VALUE, ddr3_data,
   ddr3_cmd_ctrl_data, ddr3_emif_reg_data, 0);
-   else if (board_is_bone_lt())
+   else if (board_is_bone_lt(header))
config_ddr(400, MT41K256M16HA125E_IOCTRL_VALUE,
   ddr3_beagleblack_data,
   ddr3_beagleblack_cmd_ctrl_data,
   

[U-Boot] [PATCH v2 6/7] am335x_evm: Add support for the NOR module on the memory cape

[Tom Rini]

From: Steve Kipisz s-kipi...@ti.com

This patch adds support for the NOR module that attaches
to the memory cape for a Beaglebone board. This does not
add booting support; only support so that you can boot from
SD/MMC and see the NOR module so that it can be programmed.

Signed-off-by: Steve Kipisz s-kipi...@ti.com
[trini: Clean up config changes slightly]
Signed-off-by: Tom Rini tr...@ti.com

---
Changes in v2:
- Move GPMC config portion into board.c

Signed-off-by: Tom Rini tr...@ti.com
---
 arch/arm/cpu/armv7/am33xx/mem.c|6 
 arch/arm/include/asm/arch-am33xx/mem.h |9 ++
 board/ti/am335x/board.c|   13 
 board/ti/am335x/mux.c  |   53 
 boards.cfg |1 +
 include/configs/am335x_evm.h   |   28 +
 6 files changed, 110 insertions(+)

diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c
index 45f5426..923ea83 100644
--- a/arch/arm/cpu/armv7/am33xx/mem.c
+++ b/arch/arm/cpu/armv7/am33xx/mem.c
@@ -77,9 +77,15 @@ void gpmc_init(void)
 
/* global settings */
writel(0x0008, gpmc_cfg-sysconfig);
+#ifdef CONFIG_NOR
+   writel(0x, gpmc_cfg-irqstatus);
+   writel(0x, gpmc_cfg-irqenable);
+   writel(0x0A00, gpmc_cfg-config);
+#else
writel(0x0100, gpmc_cfg-irqstatus);
writel(0x0100, gpmc_cfg-irqenable);
writel(0x0012, gpmc_cfg-config);
+#endif
/*
 * Disable the GPMC0 config set by ROM code
 */
diff --git a/arch/arm/include/asm/arch-am33xx/mem.h 
b/arch/arm/include/asm/arch-am33xx/mem.h
index c3bf74e..ddcad62 100644
--- a/arch/arm/include/asm/arch-am33xx/mem.h
+++ b/arch/arm/include/asm/arch-am33xx/mem.h
@@ -61,6 +61,15 @@
 #define M_NAND_GPMC_CONFIG60x16000f80
 #define M_NAND_GPMC_CONFIG70x0008
 
+/* NOR chip on NOR module for Beaglebone */
+#define STNOR_GPMC_CONFIG1 0x1200
+#define STNOR_GPMC_CONFIG2 0x00101000
+#define STNOR_GPMC_CONFIG3 0x00030301
+#define STNOR_GPMC_CONFIG4 0x10041004
+#define STNOR_GPMC_CONFIG5 0x000C1010
+#define STNOR_GPMC_CONFIG6 0x08070280
+#define STNOR_GPMC_CONFIG7 0x0F48
+
 /* max number of GPMC Chip Selects */
 #define GPMC_MAX_CS8
 /* max number of GPMC regs */
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 0ee2f7e..3660655 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -27,6 +27,7 @@
 #include asm/arch/gpio.h
 #include asm/arch/mmc_host_def.h
 #include asm/arch/sys_proto.h
+#include asm/arch/mem.h
 #include asm/io.h
 #include asm/emif.h
 #include asm/gpio.h
@@ -366,10 +367,22 @@ void s_init(void)
  */
 int board_init(void)
 {
+#ifdef CONFIG_NOR
+   const u32 gpmc_nor[GPMC_MAX_REG] = { STNOR_GPMC_CONFIG1,
+   STNOR_GPMC_CONFIG2, STNOR_GPMC_CONFIG3, STNOR_GPMC_CONFIG4,
+   STNOR_GPMC_CONFIG5, STNOR_GPMC_CONFIG6, STNOR_GPMC_CONFIG7 };
+#endif
+
gd-bd-bi_boot_params = PHYS_DRAM_1 + 0x100;
 
gpmc_init();
 
+#ifdef CONFIG_NOR
+   /* Reconfigure CS0 for NOR instead of NAND. */
+   enable_gpmc_cs_config(gpmc_nor, gpmc_cfg-cs[0],
+ CONFIG_SYS_FLASH_BASE, GPMC_SIZE_16M);
+#endif
+
return 0;
 }
 
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 2e09d98..187468e 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -190,6 +190,56 @@ static struct module_pin_mux nand_pin_mux[] = {
{-1},
 };
 
+#if defined(CONFIG_NOR)
+static struct module_pin_mux bone_norcape_pin_mux[] = {
+   {OFFSET(lcd_data0), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A0 */
+   {OFFSET(lcd_data1), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A1 */
+   {OFFSET(lcd_data2), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A2 */
+   {OFFSET(lcd_data3), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A3 */
+   {OFFSET(lcd_data4), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A4 */
+   {OFFSET(lcd_data5), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A5 */
+   {OFFSET(lcd_data6), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A6 */
+   {OFFSET(lcd_data7), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A7 */
+   {OFFSET(lcd_vsync), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A8 */
+   {OFFSET(lcd_hsync), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A9 */
+   {OFFSET(lcd_pclk), MODE(1)| PULLUDEN | RXACTIVE},   /* NOR_A10 */
+   {OFFSET(lcd_ac_bias_en), MODE(1)| PULLUDEN | RXACTIVE}, /* NOR_A11 */
+   {OFFSET(lcd_data8), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A12 */
+   {OFFSET(lcd_data9), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A13 */
+   {OFFSET(lcd_data10), MODE(1) | PULLUDEN | RXACTIVE},/* NOR_A14 */
+   {OFFSET(lcd_data11), MODE(1) | PULLUDEN | RXACTIVE},/* NOR_A15 */
+   {OFFSET(lcd_data12), MODE(1) | PULLUDEN | RXACTIVE},/* NOR_A16 */
+   {OFFSET(lcd_data13), 

[U-Boot] [PATCHv3 5/6] spl_mmc: add Falcon mode support for raw variant

[Peter Korsgaard]

If Falcon mode support is enabled (and the system isn't directed into
booting u-boot), it will instead try to load kernel from sector
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR and
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS of kernel argument parameters
starting from sector CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR.

Signed-off-by: Peter Korsgaard peter.korsga...@barco.com
---
 README|   10 ++
 drivers/mmc/spl_mmc.c |   18 ++
 2 files changed, 28 insertions(+)

diff --git a/README b/README
index 595c05d..3bac95b 100644
--- a/README
+++ b/README
@@ -2915,6 +2915,16 @@ FIT uImage format:
Address, size and partition on the MMC to load U-Boot from
when the MMC is being used in raw mode.
 
+   CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
+   Sector to load kernel uImage from when MMC is being
+   used in raw mode (for Falcon mode)
+
+   CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
+   CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
+   Sector and number of sectors to load kernel argument
+   parameters from when MMC is being used in raw mode
+   (for falcon mode)
+
CONFIG_SPL_FAT_SUPPORT
Support for fs/fat/libfat.o in SPL binary
 
diff --git a/drivers/mmc/spl_mmc.c b/drivers/mmc/spl_mmc.c
index d710c0d..170fa38 100644
--- a/drivers/mmc/spl_mmc.c
+++ b/drivers/mmc/spl_mmc.c
@@ -63,6 +63,21 @@ end:
return (err == 0);
 }
 
+#ifdef CONFIG_SPL_OS_BOOT
+static int mmc_load_image_raw_os(struct mmc *mmc)
+{
+   if (!mmc-block_dev.block_read(0,
+  CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
+  CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS,
+  (void *)CONFIG_SYS_SPL_ARGS_ADDR)) {
+   printf(mmc args blk read error\n);
+   return -1;
+   }
+
+   return mmc_load_image_raw(mmc, CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR);
+}
+#endif
+
 #ifdef CONFIG_SPL_FAT_SUPPORT
 static int mmc_load_image_fat(struct mmc *mmc, const char *filename)
 {
@@ -130,6 +145,9 @@ void spl_mmc_load_image(void)
boot_mode = spl_boot_mode();
if (boot_mode == MMCSD_MODE_RAW) {
debug(boot mode - RAW\n);
+#ifdef CONFIG_SPL_OS_BOOT
+   if (spl_start_uboot() || mmc_load_image_raw_os(mmc))
+#endif
err = mmc_load_image_raw(mmc,
 
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
 #ifdef CONFIG_SPL_FAT_SUPPORT
-- 
1.7.10.4

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[U-Boot] [PATCHv3 1/6] spl_mmc: return error from mmc_load_image_{raw, fat} rather than hanging

[Peter Korsgaard]

So we can instead fallback to doing something else on errors.

Signed-off-by: Peter Korsgaard peter.korsga...@barco.com
---
 drivers/mmc/spl_mmc.c |   24 ++--
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/drivers/mmc/spl_mmc.c b/drivers/mmc/spl_mmc.c
index 7efdcb8..0c50657 100644
--- a/drivers/mmc/spl_mmc.c
+++ b/drivers/mmc/spl_mmc.c
@@ -32,7 +32,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static void mmc_load_image_raw(struct mmc *mmc)
+static int mmc_load_image_raw(struct mmc *mmc)
 {
unsigned long err;
u32 image_size_sectors;
@@ -61,14 +61,14 @@ static void mmc_load_image_raw(struct mmc *mmc)
image_size_sectors, (void *)spl_image.load_addr);
 
 end:
-   if (err == 0) {
+   if (err == 0)
printf(spl: mmc blk read err - %lu\n, err);
-   hang();
-   }
+
+   return (err == 0);
 }
 
 #ifdef CONFIG_SPL_FAT_SUPPORT
-static void mmc_load_image_fat(struct mmc *mmc)
+static int mmc_load_image_fat(struct mmc *mmc)
 {
int err;
struct image_header *header;
@@ -94,11 +94,11 @@ static void mmc_load_image_fat(struct mmc *mmc)
(u8 *)spl_image.load_addr, 0);
 
 end:
-   if (err = 0) {
+   if (err = 0)
printf(spl: error reading image %s, err - %d\n,
CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME, err);
-   hang();
-   }
+
+   return (err = 0);
 }
 #endif
 
@@ -121,17 +121,21 @@ void spl_mmc_load_image(void)
printf(spl: mmc init failed: err - %d\n, err);
hang();
}
+
boot_mode = spl_boot_mode();
if (boot_mode == MMCSD_MODE_RAW) {
debug(boot mode - RAW\n);
-   mmc_load_image_raw(mmc);
+   err = mmc_load_image_raw(mmc);
 #ifdef CONFIG_SPL_FAT_SUPPORT
} else if (boot_mode == MMCSD_MODE_FAT) {
debug(boot mode - FAT\n);
-   mmc_load_image_fat(mmc);
+   err = mmc_load_image_fat(mmc);
 #endif
} else {
puts(spl: wrong MMC boot mode\n);
hang();
}
+
+   if (err)
+   hang();
 }
-- 
1.7.10.4

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[U-Boot] [PATCHv3 4/6] spl_mmc: mmc_load_image_raw(): Add sector argument

[Peter Korsgaard]

So we can use it for falcon mode as well.

Signed-off-by: Peter Korsgaard peter.korsga...@barco.com
---
 drivers/mmc/spl_mmc.c |   15 ++-
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/mmc/spl_mmc.c b/drivers/mmc/spl_mmc.c
index d250b40..d710c0d 100644
--- a/drivers/mmc/spl_mmc.c
+++ b/drivers/mmc/spl_mmc.c
@@ -32,7 +32,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static int mmc_load_image_raw(struct mmc *mmc)
+static int mmc_load_image_raw(struct mmc *mmc, unsigned long sector)
 {
unsigned long err;
u32 image_size_sectors;
@@ -42,10 +42,7 @@ static int mmc_load_image_raw(struct mmc *mmc)
sizeof(struct image_header));
 
/* read image header to find the image size  load address */
-   err = mmc-block_dev.block_read(0,
-   CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, 1,
-   header);
-
+   err = mmc-block_dev.block_read(0, sector, 1, header);
if (err == 0)
goto end;
 
@@ -56,9 +53,8 @@ static int mmc_load_image_raw(struct mmc *mmc)
mmc-read_bl_len;
 
/* Read the header too to avoid extra memcpy */
-   err = mmc-block_dev.block_read(0,
-   CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR,
-   image_size_sectors, (void *)spl_image.load_addr);
+   err = mmc-block_dev.block_read(0, sector, image_size_sectors,
+   (void *)spl_image.load_addr);
 
 end:
if (err == 0)
@@ -134,7 +130,8 @@ void spl_mmc_load_image(void)
boot_mode = spl_boot_mode();
if (boot_mode == MMCSD_MODE_RAW) {
debug(boot mode - RAW\n);
-   err = mmc_load_image_raw(mmc);
+   err = mmc_load_image_raw(mmc,
+
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
 #ifdef CONFIG_SPL_FAT_SUPPORT
} else if (boot_mode == MMCSD_MODE_FAT) {
debug(boot mode - FAT\n);
-- 
1.7.10.4

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[U-Boot] [PATCHv3 3/6] spl_mmc: add Falcon mode support for FAT variant

[Peter Korsgaard]

If Falcon mode support is enabled (and the system isn't directed into
booting u-boot), it will instead try to load kernel from
CONFIG_SPL_FAT_LOAD_KERNEL_NAME file and kernel argument parameters from
CONFIG_SPL_FAT_LOAD_ARGS_NAME, both from the same partition as u-boot.

Signed-off-by: Peter Korsgaard peter.korsga...@barco.com
---
 README|8 
 drivers/mmc/spl_mmc.c |   21 +
 2 files changed, 29 insertions(+)

diff --git a/README b/README
index 0d37d56..595c05d 100644
--- a/README
+++ b/README
@@ -2921,6 +2921,14 @@ FIT uImage format:
CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME
Filename to read to load U-Boot when reading from FAT
 
+   CONFIG_SPL_FAT_LOAD_KERNEL_NAME
+   Filename to read to load kernel uImage when reading
+   from FAT (for Falcon mode)
+
+   CONFIG_SPL_FAT_LOAD_ARGS_NAME
+   Filename to read to load kernel argument parameters
+   when reading from FAT (for Falcon mode)
+
CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
Set this for NAND SPL on PPC mpc83xx targets, so that
start.S waits for the rest of the SPL to load before
diff --git a/drivers/mmc/spl_mmc.c b/drivers/mmc/spl_mmc.c
index fac6f2d..d250b40 100644
--- a/drivers/mmc/spl_mmc.c
+++ b/drivers/mmc/spl_mmc.c
@@ -91,6 +91,24 @@ end:
 
return (err = 0);
 }
+
+#ifdef CONFIG_SPL_OS_BOOT
+static int mmc_load_image_fat_os(struct mmc *mmc)
+{
+   int err;
+
+   err = file_fat_read(CONFIG_SPL_FAT_LOAD_ARGS_NAME,
+   (void *)CONFIG_SYS_SPL_ARGS_ADDR, 0);
+   if (err = 0) {
+   printf(spl: error reading image %s, err - %d\n,
+  CONFIG_SPL_FAT_LOAD_ARGS_NAME, err);
+   return -1;
+   }
+
+   return mmc_load_image_fat(mmc, CONFIG_SPL_FAT_LOAD_KERNEL_NAME);
+}
+#endif
+
 #endif
 
 void spl_mmc_load_image(void)
@@ -128,6 +146,9 @@ void spl_mmc_load_image(void)
hang();
}
 
+#ifdef CONFIG_SPL_OS_BOOT
+   if (spl_start_uboot() || mmc_load_image_fat_os(mmc))
+#endif
err = mmc_load_image_fat(mmc, CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME);
 #endif
} else {
-- 
1.7.10.4

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[U-Boot] [PATCHv3 0/6] Falcon boot mode for spl_mmc

[Peter Korsgaard]

This patch series adds falcon boot mode for MMC (raw and FAT), similar to
the existing nand support.

As an example, it adds falcon boot support for the am335x evm board, which
is the platform that has been used to test the series (FAT and raw).

Changes since V2:
- Drop RFC and adjust am335x nand MTDPARTS_DEFAULT settings according to
  Tom Rini's feedback.

Changes since V1:
- Adjusted am335x parameters according to Tom Rini's feedback. Added spl
  command for easy kernel parameter area snapshot creation.


Peter Korsgaard (6):
  spl_mmc: return error from mmc_load_image_{raw,fat} rather than
hanging
  spl_mmc: mmc_load_image_fat(): Add filename argument and move fat
init out
  spl_mmc: add Falcon mode support for FAT variant
  spl_mmc: mmc_load_image_raw(): Add sector argument
  spl_mmc: add Falcon mode support for raw variant
  am335x: enable falcon boot mode for mmc (raw and fat) and nand

 README   |   18 +
 board/ti/am335x/board.c  |9 +
 drivers/mmc/spl_mmc.c|   91 ++
 include/configs/am335x_evm.h |   30 --
 4 files changed, 119 insertions(+), 29 deletions(-)

-- 
1.7.10.4

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[U-Boot] [PATCHv3 2/6] spl_mmc: mmc_load_image_fat(): Add filename argument and move fat init out

[Peter Korsgaard]

So we can use it for falcon mode as well.

Signed-off-by: Peter Korsgaard peter.korsga...@barco.com
---
 drivers/mmc/spl_mmc.c |   27 +--
 1 file changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/mmc/spl_mmc.c b/drivers/mmc/spl_mmc.c
index 0c50657..fac6f2d 100644
--- a/drivers/mmc/spl_mmc.c
+++ b/drivers/mmc/spl_mmc.c
@@ -68,7 +68,7 @@ end:
 }
 
 #ifdef CONFIG_SPL_FAT_SUPPORT
-static int mmc_load_image_fat(struct mmc *mmc)
+static int mmc_load_image_fat(struct mmc *mmc, const char *filename)
 {
int err;
struct image_header *header;
@@ -76,27 +76,18 @@ static int mmc_load_image_fat(struct mmc *mmc)
header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
sizeof(struct image_header));
 
-   err = fat_register_device(mmc-block_dev,
-   CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION);
-   if (err) {
-   printf(spl: fat register err - %d\n, err);
-   hang();
-   }
-
-   err = file_fat_read(CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME,
-   header, sizeof(struct image_header));
+   err = file_fat_read(filename, header, sizeof(struct image_header));
if (err = 0)
goto end;
 
spl_parse_image_header(header);
 
-   err = file_fat_read(CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME,
-   (u8 *)spl_image.load_addr, 0);
+   err = file_fat_read(filename, (u8 *)spl_image.load_addr, 0);
 
 end:
if (err = 0)
printf(spl: error reading image %s, err - %d\n,
-   CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME, err);
+  filename, err);
 
return (err = 0);
 }
@@ -129,7 +120,15 @@ void spl_mmc_load_image(void)
 #ifdef CONFIG_SPL_FAT_SUPPORT
} else if (boot_mode == MMCSD_MODE_FAT) {
debug(boot mode - FAT\n);
-   err = mmc_load_image_fat(mmc);
+
+   err = fat_register_device(mmc-block_dev,
+ CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION);
+   if (err) {
+   printf(spl: fat register err - %d\n, err);
+   hang();
+   }
+
+   err = mmc_load_image_fat(mmc, CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME);
 #endif
} else {
puts(spl: wrong MMC boot mode\n);
-- 
1.7.10.4

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[U-Boot] [PATCHv3 6/6] am335x: enable falcon boot mode for mmc (raw and fat) and nand

[Peter Korsgaard]

Jump into full u-boot mode if a 'c' character is received on the uart.

We need to adjust the spl bss/malloc area to not overlap with the
loadaddr of the kernel (sdram + 32k), so move it past u-boot instead.

For raw mmc, we store the kernel parameter area in the free space after
the MBR (if used). For nand, we use the last sector of the partition
reserved for u-boot.

This also enables the spl command in the full u-boot so the kernel
parameter area snapshot can be created.

Signed-off-by: Peter Korsgaard peter.korsga...@barco.com
---
 board/ti/am335x/board.c  |9 +
 include/configs/am335x_evm.h |   30 +++---
 2 files changed, 36 insertions(+), 3 deletions(-)

diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index b371376..23fe188 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -297,6 +297,15 @@ static struct emif_regs ddr3_evm_emif_reg_data = {
.emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY |
PHY_EN_DYN_PWRDN,
 };
+
+#ifdef CONFIG_SPL_OS_BOOT
+int spl_start_uboot(void)
+{
+   /* break into full u-boot on 'c' */
+   return (serial_tstc()  serial_getc() == 'c');
+}
+#endif
+
 #endif
 
 /*
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index ef00306..034e5e6 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -307,13 +307,36 @@
 #define CONFIG_SPL_MAX_SIZE(101 * 1024)
 #define CONFIG_SPL_STACK   CONFIG_SYS_INIT_SP_ADDR
 
-#define CONFIG_SPL_BSS_START_ADDR  0x8000
+#define CONFIG_SPL_OS_BOOT
+
+#define CONFIG_SPL_BSS_START_ADDR  0x80a0
 #define CONFIG_SPL_BSS_MAX_SIZE0x8 /* 512 KB */
 
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR0x300 /* address 
0x6 */
 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION   1
 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME   u-boot.img
+
+#ifdef CONFIG_SPL_OS_BOOT
+/* fat */
+#define CONFIG_SPL_FAT_LOAD_KERNEL_NAMEuImage
+#define CONFIG_SPL_FAT_LOAD_ARGS_NAME  args
+#define CONFIG_SYS_SPL_ARGS_ADDR   (PHYS_DRAM_1 + 0x100)
+
+/* raw mmc */
+#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR0x500 /* address 
0xa */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0x8   /* address 0x1000 */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8 /* 4KB */
+
+/* nand */
+#define CONFIG_CMD_SPL_NAND_OFS0x24 /* end of 
u-boot */
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS0x28
+#define CONFIG_CMD_SPL_WRITE_SIZE  0x1000
+
+/* spl export command */
+#define CONFIG_CMD_SPL
+#endif
+
 #define CONFIG_SPL_MMC_SUPPORT
 #define CONFIG_SPL_FAT_SUPPORT
 #define CONFIG_SPL_I2C_SUPPORT
@@ -375,7 +398,7 @@
  * other needs.
  */
 #define CONFIG_SYS_TEXT_BASE   0x8080
-#define CONFIG_SYS_SPL_MALLOC_START0x80208000
+#define CONFIG_SYS_SPL_MALLOC_START0x80a08000
 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x10
 
 /* Since SPL did pll and ddr initialization for us,
@@ -471,7 +494,8 @@
 #define MTDPARTS_DEFAULT   mtdparts=omap2-nand.0:128k(SPL), \
128k(SPL.backup1), \
128k(SPL.backup2), \
-   128k(SPL.backup3),1920k(u-boot), \
+   128k(SPL.backup3),1792k(u-boot), \
+   128k(u-boot-spl-os), \
128k(u-boot-env),5m(kernel),-(rootfs)
 #define CONFIG_NAND_OMAP_GPMC
 #define GPMC_NAND_ECC_LP_x16_LAYOUT1
-- 
1.7.10.4

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Re: [U-Boot] [v2] Please pull u-boot-mpc85xx.git

[Andy Fleming]

Ok, I'm not quite sure how that happened (I did test 83xx...), but I see
it, now. I'm going to pull that patch, and apply some others, and I'll
submit another pull request today.


On Sat, May 11, 2013 at 7:29 AM, Tom Rini tr...@ti.com wrote:

 On Fri, May 10, 2013 at 02:26:35PM -0500, Andy Fleming wrote:

  The following changes since commit
 4e779ad2e54e39d5343c8c83b4fc686a7bb16859:
 
gpio: Add support for microblaze xilinx GPIO (2013-05-09 11:20:08
 +0200)
 
  are available in the git repository at:
 
git://www.denx.de/git/u-boot-mpc85xx.git master
 
  for you to fetch changes up to 65744debd1763f7499b11f7566615926adcae53b:
 
powerpc: Add T4160QDS (2013-05-10 14:14:08 -0500)
 
  
  Andy Fleming (2):
powerpc/mpc85xx: Add definitions for HDBCR registers
e6500: Move L1 enablement after L2 enablement
 
  Roy ZANG (1):
powerpc/pcie: add PCIe version 3.x support
  [fixed this by adding #include asm/fsl_pci.h to 83xx pcie.c file]

 Still blowing some stuff up:
 Configuring for mpc8308_p1m board...
 /home/trini/work/u-boot/u-boot/mpc8308_p1m/include2/asm/fsl_pci.h:299:2:
 error:
 #error FT_FSL_PCI_SETUP not defined
 /home/trini/work/u-boot/u-boot/mpc8308_p1m/include2/asm/fsl_pci.h:71:16:
 error:
 redefinition of 'struct pci_outbound_window'

 - SUMMARY 
 Boards compiled: 636
 Boards with errors: 7 ( mpc8308_p1m MPC8315ERDB_NAND MPC8315ERDB
 MPC837XERDB MPC837XEMDS_HOST MERGERBOX MPC8308RDB )

 --
 Tom

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Re: [U-Boot] [Patch v2, batch 2 03/23] powerpc/pcie: add PCIe version 3.x support

[Andy Fleming]

This patch causes all sorts of problems. I'm NACKing it for now. Please
make sure none of these changes break 83xx before re-submitting.


On Mon, Mar 25, 2013 at 12:33 PM, York Sun york...@freescale.com wrote:

 From: Roy ZANG tie-fei.z...@freescale.com

 T4240 PCIe IP is version 3.0 and has some update comparing previous
 QorIQ products.

 1.  Move Freescale specific register define
 to
 arch/powerpc/include/asm/fsl_pci.h
 and update the register offset define for T4240.

 2. add the status/control register define
 use status/control register to judge the link status

 3. The original code uses 'Programming Interface' field to judge if PCIE is
 EP or RC mode, however, T4240 does not support this functionality.
 According to PCIE specification, 'Header Type' offset 0x0e is used to
 indicate header type, so for PCIE controller, the patch changes code to
 use 'Header Type' field to identify if the PCIE is RC or EP mode.

 Signed-off-by: Roy Zang tie-fei.z...@freescale.com
 Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
 ---
  arch/powerpc/include/asm/config_mpc85xx.h |1 +
  arch/powerpc/include/asm/fsl_pci.h|   35
 +++--
  drivers/pci/fsl_pci_init.c|   20 -
  include/pci.h |7 --
  4 files changed, 48 insertions(+), 15 deletions(-)


[...]


 index 15f583f..c0ed553 100644
 --- a/include/pci.h
 +++ b/include/pci.h
 @@ -426,13 +426,6 @@
  #define PCI_MAX_PCI_DEVICES32
  #define PCI_MAX_PCI_FUNCTIONS  8

 -#define PCI_DCR0x54/* PCIe Device Control Register */
 -#define PCI_DSR0x56/* PCIe Device Status Register */
 -#define PCI_LSR0x5e/* PCIe Link Status Register */
 -#define PCI_LCR0x5c/* PCIe Link Control Register */
 -#define PCI_LTSSM  0x404   /* PCIe Link Training, Status State
 Machine */
 -#define  PCI_LTSSM_L0  0x16/* L0 state */



These were being used by 83xx as well, and are now unavailable. Please
devise a solution that works for all of our platforms.

Andy
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Re: [U-Boot] [PATCH] common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT

[Tom Rini]

On Fri, May 10, 2013 at 07:28:46PM -0500, Scott Wood wrote:
 On 05/10/2013 07:03:07 PM, Wolfgang Denk wrote:
 Dear ying.zh...@freescale.com,
 
 In message
 1368182421-859-1-git-send-email-ying.zh...@freescale.com you
 wrote:
  From: Ying Zhang b40...@freescale.com
 
  Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace
 CONFIG_SPL_NET_SUPPORT.
 
 Any CONFIG_* stuff must be documented in the README.  Please add this
 documentation.
 
  In common/Makefile, the environment-related files in SPL is
 difined by
  CONFIG_SPL_NET_SUPPORT, it is wrong.
 
 s/difined/defined/
 
 Could you please also explain, what exactly is wrong, and how your new
 code fixes this?
 
 We will need the environment in SPL for reasons other than network
 support (in particular, hwconfig contains info for how to set up
 DDR).  Yes, this information should go in the changelog.

Note that a3m071 already does SPL + Environment and should be updated,
CONFIG-symbol wise here.  It currently gets away with
env_common/cmd_nvedit being pulled in always on LIBCOMMON and then
discarded when not needed.

-- 
Tom


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Re: [U-Boot] [Patch v2, batch 2 03/23] powerpc/pcie: add PCIe version 3.x support

[York Sun]

Andy,

I think I caught this issue and asked Roy to submit another patch to fix
it http://patchwork.ozlabs.org/patch/230825/

York

On 05/13/2013 11:50 AM, Andy Fleming wrote:
 This patch causes all sorts of problems. I'm NACKing it for now. Please
 make sure none of these changes break 83xx before re-submitting.
 
 
 On Mon, Mar 25, 2013 at 12:33 PM, York Sun york...@freescale.com
 mailto:york...@freescale.com wrote:
 
 From: Roy ZANG tie-fei.z...@freescale.com
 mailto:tie-fei.z...@freescale.com
 
 T4240 PCIe IP is version 3.0 and has some update comparing previous
 QorIQ products.
 
 1.  Move Freescale specific register define
 to
 arch/powerpc/include/asm/fsl_pci.h
 and update the register offset define for T4240.
 
 2. add the status/control register define
 use status/control register to judge the link status
 
 3. The original code uses 'Programming Interface' field to judge if
 PCIE is
 EP or RC mode, however, T4240 does not support this functionality.
 According to PCIE specification, 'Header Type' offset 0x0e is used to
 indicate header type, so for PCIE controller, the patch changes code to
 use 'Header Type' field to identify if the PCIE is RC or EP mode.
 
 Signed-off-by: Roy Zang tie-fei.z...@freescale.com
 mailto:tie-fei.z...@freescale.com
 Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
 mailto:minghuan.l...@freescale.com
 ---
  arch/powerpc/include/asm/config_mpc85xx.h |1 +
  arch/powerpc/include/asm/fsl_pci.h|   35
 +++--
  drivers/pci/fsl_pci_init.c|   20 -
  include/pci.h |7 --
  4 files changed, 48 insertions(+), 15 deletions(-)
 
 
 [...] 
  
 
 index 15f583f..c0ed553 100644
 --- a/include/pci.h
 +++ b/include/pci.h
 @@ -426,13 +426,6 @@
  #define PCI_MAX_PCI_DEVICES32
  #define PCI_MAX_PCI_FUNCTIONS  8
 
 -#define PCI_DCR0x54/* PCIe Device Control
 Register */
 -#define PCI_DSR0x56/* PCIe Device Status
 Register */
 -#define PCI_LSR0x5e/* PCIe Link Status Register */
 -#define PCI_LCR0x5c/* PCIe Link Control Register */
 -#define PCI_LTSSM  0x404   /* PCIe Link Training, Status State
 Machine */
 -#define  PCI_LTSSM_L0  0x16/* L0 state */
 
 
 
 These were being used by 83xx as well, and are now unavailable. Please
 devise a solution that works for all of our platforms.
 
 Andy


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Re: [U-Boot] [PATCH 0/19] Remove unused code, add accurate timier and bootstage

[Tom Rini]

On Thu, May 09, 2013 at 02:22:32PM -0700, Simon Glass wrote:

 Hi Tom,
 
 On Thu, Apr 25, 2013 at 3:12 PM, Simon Glass s...@chromium.org wrote:
  Hi Vadim,
 
  On Thu, Apr 18, 2013 at 8:50 AM, Vadim Bendebury ()
  vben...@google.com wrote:
   On Wed, Apr 17, 2013 at 7:13 PM, Simon Glass s...@chromium.org wrote:
 
  This series removes unused x86 code based on advice from Graeme Russ. THis
  code was used for real mode which is no longer needed in U-Boot.
 
  A new more accurate timer is added, and this permits bootstage to be
  enabled and produce useful results on x86.
 
 
  Doug Anderson (2):
bootstage: Copy bootstage strings post-relocation
Call bootstage_relocate() after malloc is initted
 
  Simon Glass (17):
x86: Remove unused bios/pci code
x86: Remove unused portion of link script
x86: Remove legacy board init code
x86: Declare global_data pointer when it is used
x86: Implement panic output for coreboot
x86: Rationalise kernel booting logic and bootstage
x86: Add TSC timer
x86: Remove old broken timer implementation
x86: Remove ISR timer
x86: Re-enable PCAT timer 2 for beeping
bootstage: Add stubs for new bootstage functions
x86: Enable bootstage for coreboot
bootstage: Allow marking a particular line of code
x86: Fix warning in cmd_ximg.c when CONFIG_GZIP is not defined
x86: config: Enable LZO for coreboot, remove zlib, gzip
x86: Support adding coreboot timestanps to bootstage
x86: Add coreboot timestamps
 
   arch/x86/cpu/Makefile  |   2 +-
   arch/x86/cpu/coreboot/coreboot.c   |  13 ++
   arch/x86/cpu/coreboot/timestamp.c  |  42 +++-
   arch/x86/cpu/cpu.c |   5 +
   arch/x86/cpu/interrupts.c  |   2 +
   arch/x86/cpu/timer.c   |  17 --
   arch/x86/cpu/u-boot.lds|  12 --
   arch/x86/include/asm/arch-coreboot/timestamp.h |   7 +
   arch/x86/include/asm/init_helpers.h|   9 -
   arch/x86/include/asm/init_wrappers.h   |  42 
   arch/x86/include/asm/pci.h |   4 -
   arch/x86/include/asm/u-boot-x86.h  |   4 +
   arch/x86/include/asm/u-boot.h  |  32 ---
   arch/x86/lib/Makefile  |  10 +-
   arch/x86/lib/bios.h| 170 ---
   arch/x86/lib/board.c   | 273 
  -
   arch/x86/lib/bootm.c   |   8 -
   arch/x86/lib/cmd_boot.c|   2 +
   arch/x86/lib/init_helpers.c|  98 -
   arch/x86/lib/init_wrappers.c   | 164 ---
   arch/x86/lib/pcat_timer.c  |  69 +--
   arch/x86/lib/pci.c | 188 -
   arch/x86/lib/physmem.c |   2 +
   arch/x86/lib/relocate.c|   2 +
   arch/x86/lib/timer.c   | 116 ---
   arch/x86/lib/tsc_timer.c   | 107 ++
   arch/x86/lib/zimage.c  |  11 +-
   common/board_r.c   |   1 +
   common/bootstage.c |  44 
   common/cmd_ximg.c  |   2 +
   include/bootstage.h|  54 +
   include/configs/coreboot.h |  18 +-
   32 files changed, 314 insertions(+), 1216 deletions(-)
   delete mode 100644 arch/x86/cpu/timer.c
   delete mode 100644 arch/x86/include/asm/init_wrappers.h
   delete mode 100644 arch/x86/lib/bios.h
   delete mode 100644 arch/x86/lib/board.c
   delete mode 100644 arch/x86/lib/init_wrappers.c
   delete mode 100644 arch/x86/lib/pci.c
   delete mode 100644 arch/x86/lib/timer.c
   create mode 100644 arch/x86/lib/tsc_timer.c
 
 Some of these patches touch bootstage which is generic code. Are you
 OK with me doing an x86 pull request for this, or should we do
 something else?

I'm OK with the x86 tree.

-- 
Tom


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Re: [U-Boot] [PATCH] OMAP5: Add support for the SOM5_EVB board (OMAP5430-based)

[Tom Rini]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 04/26/2013 11:59 AM, Lubomir Popov wrote:
 Hi Tom,
 
 On 25/04/13 22:01, Tom Rini wrote:
 On Mon, Apr 01, 2013 at 05:06:16PM +0300, Lubomir Popov wrote:
 
 Signed-off-by: Lubomir Popov lpo...@mm-sol.com
 
 Thought I had reviewed this already, sorry.
 Thanks for your review. During the past month U-Boot has changed; I
 have tried to follow as well (although I'm engaged with other
 stuff) and some of your remarks have been already fixed. Please see
 my comments inline below.
 
 Anyway, I guess that a V2 patch shall have to be referenced against
 the current master. Or against u-boot-ti/next?

OK, sorry for the late reply again.  Now that u-boot-arm has resynced
with master, I've also resynced and gotten a pull done.  You can use
either u-boot-arm/master or u-boot-ti/master.

 
 Please note that for this board to work with the defined
 configuration, the following patches are also required
 (unfortunately some are already quite old and might cause 
 conflicts):
 
 - Power: http://patchwork.ozlabs.org/patch/232732/. Potential
 conflict with Nishanth Menon's series of March 26, applied to
 u-boot-ti/next. - For I2C support: * The patch series of Apr. 8
 that enables I2C4 and I2C5 (applied to u-boot-ti/next; affects all
 OMAP5 boards). * The modified i2c driver:
 http://patchwork.ozlabs.org/patch/233823/ (useful for all OMAP3/4/5
 boards). - For USB support: *
 http://patchwork.ozlabs.org/patch/235684/ (affects all OMAP5
 boards) * http://patchwork.ozlabs.org/patch/232742/ (affects all
 OMAP5 boards)

OK.  Please make sure these still apply and if not update and re-send.
 I think I've already grabbed a few of these.

[snip]
 +#define USB_HOST_HS_CLKCTRL_MASK   0x0100D7C0  /*
 CM_L3INIT_USB_HOST_HS_CLKCTRL */ +#define
 USB_TLL_HS_CLKCTRL_MASK 0x0700  /*
 CM_L3INIT_USB_TLL_HS_CLKCTRL */
 
 Some header please.
 Currently moved to board header. I wondered if a common OMAP header
 wouldn't be more suitable, but having in mind that the utilized USB
 ports (and thus the clocks that should be enabled) vary from board
 to board, perhaps this (i.e. board header) is the best place.

The masks won't change tho, yes?  Common header somewhere.

 
 +* TODO: Replace this ugly hardcoding with proper defines +
 */ +writel(0x0100, 0x4ae0a310);
 
 Again, do please.
 This should be (*scrm)-auxclk0. The problem is that the
 omap5_scrm_regs struct (holding the auxclk0 member) has to be
 defined somewhere in the common OMAP5 headers. Sricharan? Or should
 I hack around?

Add it to the most likely struct in the headers.

[snip]
 Ah, since you do have this part already, just update the rest as
 I had said.
 /* Machine type for Linux */ #ifndef MACH_TYPE_SOM5_EVB #define
 MACH_TYPE_SOM5_EVB4545 #endif #define CONFIG_MACH_TYPE
 MACH_TYPE_SOM5_EVB
 
 Is this OK?

I think we'd decided in general to not do ifndef and just always
define it.

 +/* Enable all clocks: */ +/*#define
 CONFIG_SYS_CLOCKS_ENABLE_ALL*/ + +#define
 CONFIG_SYS_ENABLE_PADS_ALL  /* Enable all PADS for now */
 
 Not allowed.
 Shall see to it. What if one needs to test pins and connections
 during board bring-up, e.g. via gpio commands?

Then code in what you need at the time, drop later.

[snip]
 This is a little un-clear. If MMC will be in mmc like the uEVM,
 just do so, and if no storage of env, leave it as NOWHERE.
 Cerrently looks like this: /* MMC ENV related defines */ #undef
 CONFIG_ENV_IS_IN_MMC #undef CONFIG_SYS_MMC_ENV_DEV #undef
 CONFIG_ENV_OFFSET #define CONFIG_ENV_IS_NOWHERE

Shouldn't need that now, omap5_common is common and the env bits got
moved to omap5_uevm.h

[snip]
 +/* + * memtest setup + */ +#define CONFIG_SYS_MEMTEST_START
 0xb800 +#define CONFIG_SYS_MEMTEST_END
 (CONFIG_SYS_MEMTEST_START + (256  20)) +/* Undef following
 two for simple mtest */ +#define CONFIG_SYS_ALT_MEMTEST 
 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x8100
 
 Please see doc/README.memory-test and update as mtest is no
 longer a default command.
 Now the config tail looks like this:
 
 /* Undef/remove after bring-up: */ #define CONFIG_CMD_MEMTEST
 
 /* Disabled commands */ #undef CONFIG_CMD_SAVEENV
 
 /* Prompt */ #define CONFIG_SYS_PROMPTSOM5_EVB # 
 
 #ifdef CONFIG_CMD_MEMTEST /* Undef following two for simple mtest
 */ #define CONFIG_SYS_ALT_MEMTEST #define
 CONFIG_SYS_MEMTEST_SCRATCH0xb7f0 #ifdef
 CONFIG_SYS_ALT_MEMTEST #undef CONFIG_SYS_MEMTEST_START #define
 CONFIG_SYS_MEMTEST_START  0xb800 #undef CONFIG_SYS_MEMTEST_END 
 #define CONFIG_SYS_MEMTEST_END(CONFIG_SYS_MEMTEST_START + 
 (256 
 20)) #endif #endif /* CONFIG_CMD_MEMTEST */

OK.

- -- 
Tom
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Re: [U-Boot] [PULL] please pull u-boot-avr32/master

[Tom Rini]

On Mon, May 13, 2013 at 10:39:55AM +0200, Andreas Bie??mann wrote:

 Dear Tom Rini,
 
 please pull the following change from u-boot-avr/master into u-boot/master.
 
 The following changes since commit bbd0f7e3ba66d288a2f146f1c7797801e04598ae:
 
   Move FDT_RAMDISK_OVERHEAD from fdt.h to libfdt_env.h (2013-05-10 19:04:50 
 -0400)
 
 are available in the git repository at:
 
   git://git.denx.de/u-boot-avr32.git master
 
 for you to fetch changes up to a7e62be09189dae3a16882e53f15c38754f9db91:
 
   avr32: fix relocation address calculation (2013-05-13 10:35:12 +0200)
 
 
 Andreas Bie??mann (1):
   avr32: fix relocation address calculation
 
  arch/avr32/lib/board.c |4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PATCH 1/4] powerpc: Correct im_dprambase cast

[Tom Rini]

When casting im_dprambase we must cast to unsigned char not unsigned
short.

Signed-off-by: Tom Rini tr...@ti.com
---
 arch/powerpc/cpu/mpc8260/commproc.c|2 +-
 arch/powerpc/cpu/mpc8260/cpu.c |2 +-
 arch/powerpc/cpu/mpc8260/i2c.c |8 
 arch/powerpc/cpu/mpc8260/serial_smc.c  |4 ++--
 arch/powerpc/cpu/mpc8260/spi.c |2 +-
 common/cmd_immap.c |2 +-
 examples/standalone/mem_to_mem_idma2intr.c |2 +-
 7 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8260/commproc.c 
b/arch/powerpc/cpu/mpc8260/commproc.c
index 22cef3e..9d6c8e2 100644
--- a/arch/powerpc/cpu/mpc8260/commproc.c
+++ b/arch/powerpc/cpu/mpc8260/commproc.c
@@ -43,7 +43,7 @@ m8260_cpm_reset(void)
} while ((immr-im_cpm.cp_cpcr  CPM_CR_FLG)  ++count  100);
 
 #ifdef CONFIG_HARD_I2C
-   *((unsigned short*)(immr-im_dprambase[PROFF_I2C_BASE])) = 0;
+   *((unsigned char*)(immr-im_dprambase[PROFF_I2C_BASE])) = 0;
 #endif
 }
 
diff --git a/arch/powerpc/cpu/mpc8260/cpu.c b/arch/powerpc/cpu/mpc8260/cpu.c
index f8bc5a9..26b3e8d 100644
--- a/arch/powerpc/cpu/mpc8260/cpu.c
+++ b/arch/powerpc/cpu/mpc8260/cpu.c
@@ -106,7 +106,7 @@ int checkcpu (void)
 * in the mask.
 */
m = immr  (IMMR_PARTNUM_MSK | IMMR_MASKNUM_MSK);
-   k = *((ushort *)  immap-im_dprambase[PROFF_REVNUM]);
+   k = *((uchar *)  immap-im_dprambase[PROFF_REVNUM]);
 
switch (m) {
case 0x:
diff --git a/arch/powerpc/cpu/mpc8260/i2c.c b/arch/powerpc/cpu/mpc8260/i2c.c
index b720b1f..48917ea 100644
--- a/arch/powerpc/cpu/mpc8260/i2c.c
+++ b/arch/powerpc/cpu/mpc8260/i2c.c
@@ -221,14 +221,14 @@ void i2c_init(int speed, int slaveadd)
i2c_init_board();
 #endif
 
-   dpaddr = *((unsigned short *) (immap-im_dprambase[PROFF_I2C_BASE]));
+   dpaddr = *((unsigned char *) (immap-im_dprambase[PROFF_I2C_BASE]));
if (dpaddr == 0) {
/* need to allocate dual port ram */
dpaddr = m8260_cpm_dpalloc(64 +
(NUM_RX_BDS * sizeof(I2C_BD)) +
(NUM_TX_BDS * sizeof(I2C_BD)) +
MAX_TX_SPACE, 64);
-   *((unsigned short *)(immap-im_dprambase[PROFF_I2C_BASE])) =
+   *((unsigned char *)(immap-im_dprambase[PROFF_I2C_BASE])) =
dpaddr;
}
 
@@ -305,7 +305,7 @@ void i2c_newio(i2c_state_t *state)
 
debug([I2C] i2c_newio\n);
 
-   dpaddr = *((unsigned short *)(immap-im_dprambase[PROFF_I2C_BASE]));
+   dpaddr = *((unsigned char *)(immap-im_dprambase[PROFF_I2C_BASE]));
iip = (iic_t *)immap-im_dprambase[dpaddr];
state-rx_idx = 0;
state-tx_idx = 0;
@@ -480,7 +480,7 @@ int i2c_doio(i2c_state_t *state)
return I2CERR_QUEUE_EMPTY;
}
 
-   dpaddr = *((unsigned short *)(immap-im_dprambase[PROFF_I2C_BASE]));
+   dpaddr = *((unsigned char *)(immap-im_dprambase[PROFF_I2C_BASE]));
iip = (iic_t *)immap-im_dprambase[dpaddr];
iip-iic_rbptr = iip-iic_rbase;
iip-iic_tbptr = iip-iic_tbase;
diff --git a/arch/powerpc/cpu/mpc8260/serial_smc.c 
b/arch/powerpc/cpu/mpc8260/serial_smc.c
index feba1f6..d57c44e 100644
--- a/arch/powerpc/cpu/mpc8260/serial_smc.c
+++ b/arch/powerpc/cpu/mpc8260/serial_smc.c
@@ -105,7 +105,7 @@ static int mpc8260_smc_serial_init(void)
/* initialize pointers to SMC */
 
sp = (smc_t *) (im-im_smc[SMC_INDEX]);
-   *(ushort *)(im-im_dprambase[PROFF_SMC_BASE]) = PROFF_SMC;
+   *(uchar *)(im-im_dprambase[PROFF_SMC_BASE]) = PROFF_SMC;
up = (smc_uart_t *)im-im_dprambase[PROFF_SMC];
 
/* Disable transmitter/receiver. */
@@ -331,7 +331,7 @@ kgdb_serial_init (void)
/* initialize pointers to SMC */
 
sp = (smc_t *) (im-im_smc[KGDB_SMC_INDEX]);
-   *(ushort *)(im-im_dprambase[KGDB_PROFF_SMC_BASE]) = KGDB_PROFF_SMC;
+   *(uchar *)(im-im_dprambase[KGDB_PROFF_SMC_BASE]) = KGDB_PROFF_SMC;
up = (smc_uart_t *)im-im_dprambase[KGDB_PROFF_SMC];
 
/* Disable transmitter/receiver. */
diff --git a/arch/powerpc/cpu/mpc8260/spi.c b/arch/powerpc/cpu/mpc8260/spi.c
index dc98ea7..b5ead9f 100644
--- a/arch/powerpc/cpu/mpc8260/spi.c
+++ b/arch/powerpc/cpu/mpc8260/spi.c
@@ -146,7 +146,7 @@ void spi_init_f (void)
immr = (immap_t *)  CONFIG_SYS_IMMR;
cp   = (cpm8260_t *) immr-im_cpm;
 
-   *(ushort *)(immr-im_dprambase[PROFF_SPI_BASE]) = PROFF_SPI;
+   *(uchar *)(immr-im_dprambase[PROFF_SPI_BASE]) = PROFF_SPI;
spi  = (spi_t *)immr-im_dprambase[PROFF_SPI];
 
 /* 1 */
diff --git a/common/cmd_immap.c b/common/cmd_immap.c
index fdf9489..2cee082 100644
--- a/common/cmd_immap.c
+++ b/common/cmd_immap.c
@@ -535,7 +535,7 @@ do_i2cinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
volatile iic_t *iip;
uint dpaddr;
 
-  

[U-Boot] [PATCH 2/4] mpc8xx: Correct cast of im_cpm.cp_dparam

[Tom Rini]

We must cast this to unsigned char not unsigned short to avoid warnings.

Cc: Wolfgang Denk w...@denx.de
Signed-off-by: Tom Rini tr...@ti.com
---
 arch/powerpc/cpu/mpc8xx/cpu.c |8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index b6b733d..db98e82 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -78,7 +78,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
if ((pvr  16) != 0x0050)
return -1;
 
-   k = (immr  16) | *((ushort *)  immap-im_cpm.cp_dparam[0xB0]);
+   k = (immr  16) | *((uchar *)  immap-im_cpm.cp_dparam[0xB0]);
m = 0;
suf = ;
 
@@ -194,7 +194,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
if ((pvr  16) != 0x0050)
return -1;
 
-   k = (immr  16) | *((ushort *)  immap-im_cpm.cp_dparam[0xB0]);
+   k = (immr  16) | *((uchar *)  immap-im_cpm.cp_dparam[0xB0]);
m = 0;
 
switch (k) {
@@ -253,7 +253,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
if ((pvr  16) != 0x0050)
return -1;
 
-   k = (immr  16) | in_be16((ushort *)immap-im_cpm.cp_dparam[0xB0]);
+   k = (immr  16) | in_be16((uchar *)immap-im_cpm.cp_dparam[0xB0]);
m = 0;
 
switch (k) {
@@ -312,7 +312,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
if ((pvr  16) != 0x0050)
return -1;
 
-   k = (immr  16) | *((ushort *)  immap-im_cpm.cp_dparam[0xB0]);
+   k = (immr  16) | *((uchar *)  immap-im_cpm.cp_dparam[0xB0]);
m = 0;
 
switch (k) {
-- 
1.7.9.5

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[U-Boot] [PATCH 4/4] mpc8323erdb: Update crc32 check of MAC

[Tom Rini]

We need to cast to unsigned char, not unsigned short here to avoid a
warning.

Cc: Michael Barkowski michael.barkow...@freescale.com
Signed-off-by: Tom Rini tr...@ti.com
---
 board/freescale/mpc8323erdb/mpc8323erdb.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c 
b/board/freescale/mpc8323erdb/mpc8323erdb.c
index f29b2f4..ba4993e 100644
--- a/board/freescale/mpc8323erdb/mpc8323erdb.c
+++ b/board/freescale/mpc8323erdb/mpc8323erdb.c
@@ -195,7 +195,7 @@ int mac_read_from_eeprom(void)
printf(\nEEPROM @ 0x%02x read FAILED!!!\n,
   CONFIG_SYS_I2C_EEPROM_ADDR);
} else {
-   if (crc32(crc, buf, 24) == *(unsigned int *)buf[24]) {
+   if (crc32(crc, buf, 24) == *(unsigned char *)buf[24]) {
printf(Reading MAC from EEPROM\n);
for (i = 0; i  4; i++) {
if (memcmp(buf[i * 6], \0\0\0\0\0\0, 6)) {
-- 
1.7.9.5

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[U-Boot] [PATCH 3/4] ELPPC: Don't write magic numbers via short.

[Tom Rini]

We need to write each segment of the buffer directly rather than using
shorts.

Cc: Frank Gottschling fgottschl...@eltec.de
Signed-off-by: Tom Rini tr...@ti.com
---
 board/eltec/elppc/misc.c |9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/board/eltec/elppc/misc.c b/board/eltec/elppc/misc.c
index 89f1b1d..a7d8486 100644
--- a/board/eltec/elppc/misc.c
+++ b/board/eltec/elppc/misc.c
@@ -207,9 +207,12 @@ int misc_init_r (void)
buf[4] = eerev.etheraddr[5];
buf[5] = eerev.etheraddr[4];
 
-   *(unsigned short *) buf[20] = 0x48B2;
-   *(unsigned short *) buf[22] = 0x0004;
-   *(unsigned short *) buf[24] = 0x1433;
+   buf[20] = 0x48;
+   buf[21] = 0xB2;
+   buf[22] = 0x00;
+   buf[23] = 0x04;
+   buf[24] = 0x14;
+   buf[25] = 0x33;
 
printf (\nSRom:  Writing i82559 info  );
if (eepro100_srom_store ((unsigned short *) buf) == -1)
-- 
1.7.9.5

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Re: [U-Boot] [PATCH] usb: asix: Move software resets to basic_init

[Joe Hershberger]

On Mon, May 13, 2013 at 10:14 AM, Marek Vasut ma...@denx.de wrote:
 Dear Simon Glass,

 From: Julius Werner jwer...@chromium.org

 The ASIX driver calls a basic_init() function during get_info(), so that
 not all initialization tasks need to be redone on every init().
 Unfortunately, the most important one is still triggered too often: the
 driver does a full port and MII reset on every asix_init(), requiring up
 to several seconds to reestablish the link.

 This patch confines that software reset into the asix_basic_init()
 function so that it will only be executed once. This saves about a
 second of boot time on systems using BOOTP.

 Note: this patch was previously submitted many moons ago as:

usb: usbeth: asix: Do a fast init if link already established

 That patch seens to have been lost or forgotten, so this is a rebased
 version. It is tested on snow with a Asix USB dongle (Cisco).

 Signed-off-by: Julius Werner jwer...@chromium.org
 Signed-off-by: Simon Glass s...@chromium.org
 Reviewed-by: Simon Glass s...@chromium.org
 Reviewed-by: Vadim Bendebury vben...@chromium.org

 I'll pick it, but I wonder why Joe didn't ...

Sorry... just swamped for the moment.

-Joe
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