Re: [U-Boot] [PATCH RFC] dfu: ram support

[Lukasz Majewski]

Hi Afzal Mohammed,

 DFU spec mentions it as a method to upgrade firmware (software stored
 in writable non-volatile memory). It also says other potential uses of
 DFU is beyond scope of the spec.
 
 Here such a beyond the scope use is being attempted - directly pumping
 binary images from host via USB to RAM. This facility is a developer
 centric one in that it gives advantage over upgrading non-volatile
 memory for testing new images every time during development and/or
 testing.
 
 Directly putting image onto RAM would speed up upgrade process. This
 and convenience was the initial thoughts that led to doing this, speed
 improvement over MMC was only 1 second though - 6 sec on RAM as
 opposed to 7 sec on MMC in beagle bone, perhaps enabling cache and/or
 optimizing DFU framework to avoid multiple copy for ram (if worth)
 may help, and on other platforms and other boot media like NAND maybe
 improvement would be higher.
 
 And for a platform that doesn't yet have proper DFU suppport for
 non-volatile media's, DFU to RAM can be used.
 
 Another minor advantage would be to increase life of mmc/nand as it
 would be less used during development/testing.
 
 usage: image name ram start address size
 eg. kernel ram 0x8100 0x100
 
 Downloading images to RAM using DFU is not something new, this is
 acheived in openmoko also.
 
 DFU on RAM can be used for extracting RAM contents to host using dfu
 upload. Perhaps this can be extended to io for squeezing out register
 dump through usb, if it is worth.
 

Above idea sounds very interesting. 
One minor thing: 
It also would be good to have dfu_alt_info environment properly defined
to have ram alt setting for beagle bone. Then we would have at least
one board which supports this new feature.

 Signed-off-by: Afzal Mohammed afzal.mohd...@gmail.com
 Cc: Lukasz Majewski l.majew...@samsung.com
 Cc: Pantelis Antoniou pa...@antoniou-consulting.com
 Cc: Heiko Schocher h...@denx.de
 ---
  drivers/dfu/Makefile  |  1 +
  drivers/dfu/dfu.c |  7 +++--
  drivers/dfu/dfu_ram.c | 82
 +++
 include/dfu.h | 18 +++ 4 files changed, 106
 insertions(+), 2 deletions(-) create mode 100644 drivers/dfu/dfu_ram.c
 
 diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile
 index fca370a..de9e44e 100644
 --- a/drivers/dfu/Makefile
 +++ b/drivers/dfu/Makefile
 @@ -12,6 +12,7 @@ LIB = $(obj)libdfu.o
  COBJS-$(CONFIG_DFU_FUNCTION) += dfu.o
  COBJS-$(CONFIG_DFU_MMC) += dfu_mmc.o
  COBJS-$(CONFIG_DFU_NAND) += dfu_nand.o
 +COBJS-$(CONFIG_DFU_RAM) += dfu_ram.o
  
  SRCS:= $(COBJS-y:.o=.c)
  OBJS := $(addprefix $(obj),$(COBJS-y))
 diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
 index d73d510..7b3d05d 100644
 --- a/drivers/dfu/dfu.c
 +++ b/drivers/dfu/dfu.c
 @@ -325,6 +325,9 @@ static int dfu_fill_entity(struct dfu_entity
 *dfu, char *s, int alt, } else if (strcmp(interface, nand) == 0) {
   if (dfu_fill_entity_nand(dfu, s))
   return -1;
 + } else if (strcmp(interface, ram) == 0) {
 + if (dfu_fill_entity_ram(dfu, s))
 + return -1;
   } else {
   printf(%s: Device %s not (yet) supported!\n,
  __func__,  interface);
 @@ -374,14 +377,14 @@ int dfu_config_entities(char *env, char
 *interface, int num) 
  const char *dfu_get_dev_type(enum dfu_device_type t)
  {
 - const char *dev_t[] = {NULL, eMMC, OneNAND, NAND };
 + const char *dev_t[] = {NULL, eMMC, OneNAND, NAND,
 RAM }; return dev_t[t];
  }
  
  const char *dfu_get_layout(enum dfu_layout l)
  {
   const char *dfu_layout[] = {NULL, RAW_ADDR, FAT, EXT2,
 -EXT3, EXT4 };
 +EXT3, EXT4,
 RAM_ADDR }; return dfu_layout[l];
  }
  
 diff --git a/drivers/dfu/dfu_ram.c b/drivers/dfu/dfu_ram.c
 new file mode 100644
 index 000..8562495
 --- /dev/null
 +++ b/drivers/dfu/dfu_ram.c
 @@ -0,0 +1,82 @@
 +/*
 + * (C) Copyright 2013
 + * Afzal Mohammed afzal.mohd...@gmail.com
 + *
 + * Reference: dfu_mmc.c
 + * Copyright (C) 2012 Samsung Electronics
 + * author: Lukasz Majewski l.majew...@samsung.com
 + *
 + * SPDX-License-Identifier:  GPL-2.0+
 + */
 +
 +#include common.h
 +#include malloc.h
 +#include errno.h
 +#include dfu.h
 +
 +enum dfu_ram_op {
 + DFU_OP_READ = 1,
 + DFU_OP_WRITE,
 +};

Minor:
Now I've realised that the dfu_nand_op and dfu_mmc_op have the same
defines. Maybe it is a good time to combine this and store it at
dfu.h?

 +
 +static int dfu_transfer_medium_ram(enum dfu_ram_op op, struct
 dfu_entity *dfu,
 +u64 offset, void *buf, long *len)
 +{
 + if (dfu-layout != DFU_RAM_ADDR) {
 + printf(%s: unsupported layout :%s\n, __func__,
 + dfu_get_layout(dfu-layout));
 + return  -EINVAL;
 + }
 +
 + if (offset  dfu-data.ram.size) {
 + printf(%s: request exceeds allowed area\n,
 

Re: [U-Boot] [PATCH 0/9] Consolidate ARM timer code

[Lukasz Majewski]

Hi Rob,

 From: Rob Herring rob.herr...@calxeda.com
 
 Much of the ARM timer code is re-implemented for each platform yet it
 is all pretty much the same code.
 
 This series introduces a common implementation of timer functions and
 simplifies the platform code down to 2 or 3 config defines. It is
 intended for platforms with 32-bit freerunning timers. I've converted
 a couple of platforms as an example, but there are many more still
 that can be converted. This probably could be extended to work with
 16-bit timers as well.

I'm wondering if we could also move the Exynos related timer code
to ./arch/arm/lib/time.c?

Anyway, Rob very good idea!

 
 I've compiled all ARM boards, but only tested on highbank.
 
 Rob
 
 Rob Herring (9):
   ARM: add common timer functions
   examples: enable gc-sections option
   time: create default __udelay
   ARM: highbank: convert to common timer code
   ARM: mx25: convert to common timer code
   ARM: mx27: convert to common timer code
   ARM: vexpress: convert to common timer code
   ARM: socfpga: convert to common timer code
   ARM: tegra: convert to common timer code
 
  arch/arm/cpu/arm926ejs/mx25/timer.c | 117
 
 arch/arm/cpu/arm926ejs/mx27/timer.c | 110
 --
 arch/arm/cpu/armv7/highbank/timer.c |  83 --
 arch/arm/cpu/armv7/socfpga/timer.c  |  72 
 arch/arm/cpu/tegra-common/Makefile  |   2 +-
 arch/arm/cpu/tegra-common/timer.c   |  95
 -- arch/arm/lib/Makefile
 |   2 +- arch/arm/lib/time.c |  59
  board/armltd/vexpress/vexpress_common.c |  71
 --- examples/api/Makefile   |   2 +-
 include/configs/highbank.h  |   4 ++
 include/configs/imx27lite-common.h  |   3 +
 include/configs/mx25pdk.h   |   3 +
 include/configs/socfpga_cyclone5.h  |   3 +-
 include/configs/tegra-common.h  |   3 +
 include/configs/tx25.h  |   2 +
 include/configs/vexpress_common.h   |   4 ++
 include/configs/zmx25.h |   3 +
 lib/time.c  |  21 ++ 19 files
 changed, 107 insertions(+), 552 deletions(-) delete mode 100644
 arch/arm/cpu/tegra-common/timer.c create mode 100644
 arch/arm/lib/time.c
 



-- 
Best regards,

Lukasz Majewski

Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH] arm:goni:mmc: Add sd card detection and initialization.

[Przemyslaw Marczak]

Hello Minkyu,

On 09/03/2013 02:45 PM, Przemyslaw Marczak wrote:

This change allow to use sd card on Goni the same like mmc 0.
SD card is mmc dev 1, so it can be used like this: fatls mmc 1:2.
SD card is inited even if eMMC initialization fails.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com


Could you review this patch, please?
Thank you.
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH] arm:mmc:goni/exynos: Fix wrong mmc base register devices offset.

[Przemyslaw Marczak]

Hello Minkyu,

On 09/03/2013 02:57 PM, Przemyslaw Marczak wrote:

On s5pc1xx mmc devices offset is multiply of 0x10,
wrong value was 0x1. Register offset always points
to mmc 0 before this change.

Add macro definition of mmc dev register offset to s5pc1xx and
exynos mmc.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
Acked-by: Jaehoon Chung jh80.chung at samsung.com


Could you review this patch, please?
Thank you.
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH v2] mmc: don't support write erase for SPL builds

[Paul Burton]

On Sun 08 Sep 2013 09:48:20 BST, Andreas Bießmann wrote:


Dear Paul Burton,

On 06.09.13 15:43, Paul Burton wrote:


For SPL builds this is just dead code since we'll only need to read.
Eliminating it results in a significant size reduction for the SPL
binary, which may be critical for certain platforms where the binary
size is highly constrained.

Signed-off-by: Paul Burton paul.bur...@imgtec.com
---
Changes in v2:
- Move the mmc_bwrite  mmc_berase functions to a new mmc_write.c
file which is only compiled for non-SPL builds, as per a request
from Pantelis Antoniou. This requires that a few formerly static
functions in mmc.c be accessible to the new file, so they are
declared in a new mmc_private.h header along with the write 
erase functions. For what it's worth I prefered v1, but hey ho.
---
drivers/mmc/Makefile | 2 +
drivers/mmc/mmc.c | 186 +
drivers/mmc/mmc_private.h | 45 +++
drivers/mmc/mmc_write.c | 189 
++

4 files changed, 240 insertions(+), 182 deletions(-)
create mode 100644 drivers/mmc/mmc_private.h
create mode 100644 drivers/mmc/mmc_write.c



snip



diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c
new file mode 100644
index 000..dde5cf2
--- /dev/null
+++ b/drivers/mmc/mmc_write.c
@@ -0,0 +1,189 @@
+/*
+ * Copyright 2008, Freescale Semiconductor, Inc
+ * Andy Fleming
+ *
+ * Based vaguely on the Linux code
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include config.h
+#include common.h
+#include part.h
+#include mmc_private.h
+
+static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
+{
+ struct mmc_cmd cmd;
+ ulong end;
+ int err, start_cmd, end_cmd;
+
+ if (mmc-high_capacity) {
+ end = start + blkcnt - 1;
+ } else {
+ end = (start + blkcnt - 1) * mmc-write_bl_len;
+ start *= mmc-write_bl_len;
+ }
+
+ if (IS_SD(mmc)) {
+ start_cmd = SD_CMD_ERASE_WR_BLK_START;
+ end_cmd = SD_CMD_ERASE_WR_BLK_END;
+ } else {
+ start_cmd = MMC_CMD_ERASE_GROUP_START;
+ end_cmd = MMC_CMD_ERASE_GROUP_END;
+ }
+
+ cmd.cmdidx = start_cmd;
+ cmd.cmdarg = start;
+ cmd.resp_type = MMC_RSP_R1;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err)
+ goto err_out;
+
+ cmd.cmdidx = end_cmd;
+ cmd.cmdarg = end;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err)
+ goto err_out;
+
+ cmd.cmdidx = MMC_CMD_ERASE;
+ cmd.cmdarg = SECURE_ERASE;
+ cmd.resp_type = MMC_RSP_R1b;
+
+ err = mmc_send_cmd(mmc, cmd, NULL);
+ if (err)
+ goto err_out;
+
+ return 0;
+
+err_out:
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
+ puts(mmc erase failed\n);
+#endif



this conditional compile in of puts/printf for SPL are no longer
required, I'd prefere to remove them globally in mmc_write.c.

Ah, yes good point, I'll remove that.




+ return err;
+}



Rest of this patch looks good to me.

Best regards

Andreas Bießmann

Thanks for looking at it!

Paul

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Re: [U-Boot] [PATCH] arm:goni:mmc: Add sd card detection and initialization.

[Jaehoon Chung]

Hi,

On 09/03/2013 09:45 PM, Przemyslaw Marczak wrote:
 This change allow to use sd card on Goni the same like mmc 0.
 SD card is mmc dev 1, so it can be used like this: fatls mmc 1:2.
 SD card is inited even if eMMC initialization fails.
 
 Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
 CC: Minkyu Kang mk7.k...@samsung.com
 ---
  board/samsung/goni/goni.c |   31 ++-
  1 file changed, 30 insertions(+), 1 deletion(-)
 
 diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
 index 5b3d6ef..7098fe7 100644
 --- a/board/samsung/goni/goni.c
 +++ b/board/samsung/goni/goni.c
 @@ -73,6 +73,7 @@ int checkboard(void)
  int board_mmc_init(bd_t *bis)
  {
   int i;
 + int ret;
  
   /* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
   s5p_gpio_direction_output(s5pc110_gpio-j2, 7, 1);
 @@ -95,7 +96,35 @@ int board_mmc_init(bd_t *bis)
   s5p_gpio_set_drv(s5pc110_gpio-g0, i, GPIO_DRV_4X);
   }
  
 - return s5p_mmc_init(0, 4);
 + ret = s5p_mmc_init(0, 4);
 + if (ret) {
 + puts(MMC: Failed to init MMC:0.\n);
 + }
 +
 + /*
 +  * SD card (T_FLASH) detect and init
 +  * T_FLASH_DETECT: EINT28: GPH3[4] input mode
 +  */
 + s5p_gpio_cfg_pin(s5pc110_gpio-h3, 4, GPIO_INPUT);
 + s5p_gpio_set_pull(s5pc110_gpio-h3, 4, GPIO_PULL_UP);
 +
 + if (!s5p_gpio_get_value(s5pc110_gpio-h3, 4)) {
 + for (i = 0; i  7; i++) {
 + if (i == 2)
 + continue;
 + /* GPG2[0:6] special function 2 */
 + s5p_gpio_cfg_pin(s5pc110_gpio-g2, i, 0x2);
 + /* GPG2[0:6] pull disable */
 + s5p_gpio_set_pull(s5pc110_gpio-g2, i, GPIO_PULL_NONE);
 + /* GPG2[0:6] drv 4x */
 + s5p_gpio_set_drv(s5pc110_gpio-g2, i, GPIO_DRV_4X);
 + }
 + if (s5p_mmc_init(2, 4))
 + puts(MMC: Failed to init SD card (MMC:2).\n);

Well, i think this is not good.

ret = s5p_mmc_init(2, 5)
if (ret) {

}
return ret;

Your checking is always returned fail,if emmc is failed.

Best Regards,
Jaehoon Chung

 + }
 +
 + /* SD card init is optional so print information when it fails only */
 + return ret;
  }
  #endif
  
 

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Re: [U-Boot] please pull u-boot-samsung master

[Minkyu Kang]

Dear Chander Kashyap,

On 06/09/13 13:32, Chander Kashyap wrote:
 Hi Albert,
 
 On 5 September 2013 18:58, Albert ARIBAUD albert.u.b...@aribaud.net wrote:
 Hi Chander,

 On Thu, 5 Sep 2013 17:36:34 +0530, Chander Kashyap
 chander.kash...@linaro.org wrote:

 Hi Albert,

 On 5 September 2013 17:08, Albert ARIBAUD albert.u.b...@aribaud.net wrote:
 Hi Chander,

 On Thu, 5 Sep 2013 16:47:27 +0530, Chander Kashyap
 chander.kash...@linaro.org wrote:

 Hi Lukasz,

 On 5 September 2013 16:27, Lukasz Majewski l.majew...@samsung.com wrote:
 Hi Chander,


 Its working for me.
 But my dtc -v: Version: DTC 1.3.0


 Have you managed to properly build test Samsung's u-boot tree with DTC
 1.3.0?

 Yes, I am able to build and test.
 I am running on ubuntu.

 Then you are not testing on a recent enough U-Boot source tree;
 currently, master (and arm) require dtc version = 1.4.0, and will fail
 as indicated by Lukasz and as experienced by me -- I had to build dtc
 version 1.4.0 from git source.

 Sorry for big mess. I had re-based my tree to u-boot samsung. I have
 tested it after re-basing to u-boot tree.
 It was failing.

 Shall i send all the patches again, or is it possible to send the
 single failing patch.

 Well, if you have rebased to u-boot-master, then you can as well do an
 interactive rebase so that the commit which breaks builds is omitted.

 
 Offending patch was part of two patch series. I have fixed it and
 resend it with series again.
 

Since the patchset is already applied to u-boot-samsung,
If you send new patchset, then I should do rebase and forced push.
If possible please send fixing patch instead of new patchset.

Thanks,
Minkyu Kang.
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Re: [U-Boot] [PATCH v2] mmc: don't support write erase for SPL builds

[Pantelis Antoniou]

Hi Paul,

On Sep 9, 2013, at 11:14 AM, Paul Burton wrote:

 On Sun 08 Sep 2013 09:48:20 BST, Andreas Bießmann wrote:
 
 Dear Paul Burton,
 
 On 06.09.13 15:43, Paul Burton wrote:
 
 For SPL builds this is just dead code since we'll only need to read.
 Eliminating it results in a significant size reduction for the SPL
 binary, which may be critical for certain platforms where the binary
 size is highly constrained.
 
 Signed-off-by: Paul Burton paul.bur...@imgtec.com
 ---
 Changes in v2:
 - Move the mmc_bwrite  mmc_berase functions to a new mmc_write.c
 file which is only compiled for non-SPL builds, as per a request
 from Pantelis Antoniou. This requires that a few formerly static
 functions in mmc.c be accessible to the new file, so they are
 declared in a new mmc_private.h header along with the write 
 erase functions. For what it's worth I prefered v1, but hey ho.
 ---
 drivers/mmc/Makefile | 2 +
 drivers/mmc/mmc.c | 186 +
 drivers/mmc/mmc_private.h | 45 +++
 drivers/mmc/mmc_write.c | 189 ++
 4 files changed, 240 insertions(+), 182 deletions(-)
 create mode 100644 drivers/mmc/mmc_private.h
 create mode 100644 drivers/mmc/mmc_write.c
 
 
 snip
 
 
 diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c
 new file mode 100644
 index 000..dde5cf2
 --- /dev/null
 +++ b/drivers/mmc/mmc_write.c
 @@ -0,0 +1,189 @@
 +/*
 + * Copyright 2008, Freescale Semiconductor, Inc
 + * Andy Fleming
 + *
 + * Based vaguely on the Linux code
 + *
 + * SPDX-License-Identifier: GPL-2.0+
 + */
 +
 +#include config.h
 +#include common.h
 +#include part.h
 +#include mmc_private.h
 +
 +static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
 +{
 + struct mmc_cmd cmd;
 + ulong end;
 + int err, start_cmd, end_cmd;
 +
 + if (mmc-high_capacity) {
 + end = start + blkcnt - 1;
 + } else {
 + end = (start + blkcnt - 1) * mmc-write_bl_len;
 + start *= mmc-write_bl_len;
 + }
 +
 + if (IS_SD(mmc)) {
 + start_cmd = SD_CMD_ERASE_WR_BLK_START;
 + end_cmd = SD_CMD_ERASE_WR_BLK_END;
 + } else {
 + start_cmd = MMC_CMD_ERASE_GROUP_START;
 + end_cmd = MMC_CMD_ERASE_GROUP_END;
 + }
 +
 + cmd.cmdidx = start_cmd;
 + cmd.cmdarg = start;
 + cmd.resp_type = MMC_RSP_R1;
 +
 + err = mmc_send_cmd(mmc, cmd, NULL);
 + if (err)
 + goto err_out;
 +
 + cmd.cmdidx = end_cmd;
 + cmd.cmdarg = end;
 +
 + err = mmc_send_cmd(mmc, cmd, NULL);
 + if (err)
 + goto err_out;
 +
 + cmd.cmdidx = MMC_CMD_ERASE;
 + cmd.cmdarg = SECURE_ERASE;
 + cmd.resp_type = MMC_RSP_R1b;
 +
 + err = mmc_send_cmd(mmc, cmd, NULL);
 + if (err)
 + goto err_out;
 +
 + return 0;
 +
 +err_out:
 +#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 + puts(mmc erase failed\n);
 +#endif
 
 
 this conditional compile in of puts/printf for SPL are no longer
 required, I'd prefere to remove them globally in mmc_write.c.
 Ah, yes good point, I'll remove that.
 
 
 + return err;
 +}
 
 
 Rest of this patch looks good to me.
 
 Best regards
 
 Andreas Bießmann
 Thanks for looking at it!
 
 Paul
 

Seem good to me too. I'll give it a spin later this week and make sure nothing 
breaks.

Regards

-- Pantelis


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[U-Boot] [PATCH v3] powerpc/p1010rdb: update readme for p1010rdb-pb board

[Shengzhou Liu]

- Remove duplicate doc/README.p1010rdb
- Update for P1010RDB-PB board

P1010RDB-PB is a variation of previous P1010RDB-PA board.
Henceforth we support P1010RDB-PB board instead of P1010RDB-PA.

Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
v3: add frequency combination support
v2: removed duplicate doc/README.p1010rdb


 board/freescale/p1010rdb/README | 296 +++-
 doc/README.p1010rdb | 199 ---
 2 files changed, 138 insertions(+), 357 deletions(-)
 delete mode 100644 doc/README.p1010rdb

diff --git a/board/freescale/p1010rdb/README b/board/freescale/p1010rdb/README
index 7f18aaa..9473b14 100644
--- a/board/freescale/p1010rdb/README
+++ b/board/freescale/p1010rdb/README
@@ -1,58 +1,40 @@
 Overview
 =
-The P1010RDB is a Freescale reference design board that hosts the P1010 SoC.
+The P1010RDB is a Freescale Reference Design Board that hosts the P1010 SoC.
+P1010RDB-PB is a variation of previous P1010RDB-PA board.
 
 The P1010 is a cost-effective, low-power, highly integrated host processor
-based on a Power Architecture e500v2 core (maximum core frequency 800/1000 
MHz),
-that addresses the requirements of several routing, gateways, storage, 
consumer,
+based on a Power Architecture e500v2 core (maximum core frequency 1GHz),that
+addresses the requirements of several routing, gateways, storage, consumer,
 and industrial applications. Applications of interest include the main CPUs and
 I/O processors in network attached storage (NAS), the voice over IP (VoIP)
 router/gateway, and wireless LAN (WLAN) and industrial controllers.
 
-The P1010RDB board features are as follows:
+The P1010RDB-PB board features are as following:
 Memory subsystem:
-   - 1Gbyte unbuffered DDR3 SDRAM discrete devices (32-bit bus)
-   - 32 Mbyte NOR flash single-chip memory
-   - 32 Mbyte NAND flash memory
-   - 256 Kbit M24256 I2C EEPROM
-   - 16 Mbyte SPI memory
+   - 1G bytes unbuffered DDR3 SDRAM discrete devices (32-bit bus)
+   - 32M bytes NOR flash single-chip memory
+   - 2G bytes NAND flash memory
+   - 16M bytes SPI memory
+   - 256K bit M24256 I2C EEPROM
- I2C Board EEPROM 128x8 bit memory
- SD/MMC connector to interface with the SD memory card
 Interfaces:
-   - PCIe:
-   - Lane0: x1 mini-PCIe slot
-   - Lane1: x1 PCIe standard slot
-   - SATA:
-   - 1 internal SATA connector to 2.5” 160G SATA2 HDD
-   - 1 eSATA connector to rear panel
-   - 10/100/1000 BaseT Ethernet ports:
-   - eTSEC1, RGMII: one 10/100/1000 port using Vitesse VSC8641XKO
-   - eTSEC2, SGMII: one 10/100/1000 port using Vitesse VSC8221
-   - eTSEC3, SGMII: one 10/100/1000 port using Vitesse VSC8221
-   - USB 2.0 port:
-   - x1 USB2.0 port via an external ULPI PHY to micro-AB connector
-   - x1 USB2.0 port via an internal UTMI PHY to micro-AB connector
-   - FlexCAN ports:
-   - 2 DB-9 female connectors for FlexCAN bus(revision 2.0B)
- interface;
-   - DUART interface:
-   - DUART interface: supports two UARTs up to 115200 bps for
-  console display
-   - RJ45 connectors are used for these 2 UART ports.
-   - TDM
-   - 2 FXS ports connected via an external SLIC to the TDM 
interface.
- SLIC is controllled via SPI.
-   - 1 FXO port connected via a relay to FXS for switchover to POTS
+   - Three 10/100/1000 BaseT Ethernet ports (One RGMII and two SGMII)
+   - PCIe 2.0: two x1 mini-PCIe slots
+   - SATA 2.0: two SATA interfaces
+   - USB 2.0: one USB interface
+   - FlexCAN: two FlexCAN interfaces (revision 2.0B)
+   - UART: one USB-to-Serial interface
+   - TDM: 2 FXS ports connected via an external SLIC to the TDM interface.
+  1 FXO port connected via a relay to FXS for switchover to POTS
+
 Board connectors:
- Mini-ITX power supply connector
- JTAG/COP for debugging
-IEEE Std. 1588 signals for test and measurement
-Real-time clock on I2C bus
-POR
-   - support critical POR setting changed via switch on board
-PCB
-   - 6-layer routing (4-layer signals, 2-layer power and ground)
 
+POR: support critical POR setting changed via switch on board
+PCB: 6-layer routing (4-layer signals, 2-layer power and ground)
 
 Physical Memory Map on P1010RDB
 ===
@@ -77,132 +59,130 @@ Configure the serial port of the attached computer with 
the following values:
-Flow Control: Hardware/None
 
 
-Settings of DIP-switch
-==
-  SW4[1:4]=  and SW6[4]=0 for boot from 16bit NOR flash
-  SW4[1:4]= 1000 and SW6[4]=1 for boot from 8bit NAND flash
-  SW4[1:4]= 0110 and SW6[4]=0 for boot from SPI flash
+P1010RDB-PB default DIP-switch settings

[U-Boot] [PATCH] powerpc/p1010rdb: add p1010rdb-pb support with updating p1010rdb-pa

[Shengzhou Liu]

- Rename old P1010RDB board as P1010RDB-PA.
- Add support for new P1010RDB-PB board.
- Enable IFC flash access in case of SD boot via hwconfig or mux command.
- Some optimization and code cleanup.
For more details, see board/freescale/p1010rdb/README.

Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
 board/freescale/p1010rdb/law.c  |   2 -
 board/freescale/p1010rdb/p1010rdb.c | 332 ++--
 board/freescale/p1010rdb/tlb.c  |   4 -
 boards.cfg  |  41 +++--
 include/configs/P1010RDB.h  | 113 +---
 5 files changed, 391 insertions(+), 101 deletions(-)

diff --git a/board/freescale/p1010rdb/law.c b/board/freescale/p1010rdb/law.c
index 0045127..ed41a05 100644
--- a/board/freescale/p1010rdb/law.c
+++ b/board/freescale/p1010rdb/law.c
@@ -9,11 +9,9 @@
 #include asm/mmu.h
 
 struct law_entry law_table[] = {
-#ifndef CONFIG_SDCARD
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_IFC),
SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_128K, LAW_TRGT_IF_IFC),
SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC),
-#endif
 };
 
 int num_law_entries = ARRAY_SIZE(law_table);
diff --git a/board/freescale/p1010rdb/p1010rdb.c 
b/board/freescale/p1010rdb/p1010rdb.c
index 06aa800..7f30ccb 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -21,10 +21,8 @@
 #include asm/fsl_serdes.h
 #include asm/fsl_ifc.h
 #include asm/fsl_pci.h
-
-#ifndef CONFIG_SDCARD
 #include hwconfig.h
-#endif
+#include i2c.h
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -33,10 +31,30 @@ DECLARE_GLOBAL_DATA_PTR;
 #define MUX_CPLD_TDM   0x01
 #define MUX_CPLD_SPICS0_FLASH  0x00
 #define MUX_CPLD_SPICS0_SLIC   0x02
+#define PMUXCR1_IFC_MASK   0x0000
+#define PMUXCR1_SDHC_MASK   0x00fff000
+#define PMUXCR1_SDHC_ENABLE 0x00555000
+
+enum {
+   MUX_TYPE_IFC,
+   MUX_TYPE_SDHC,
+   MUX_TYPE_SPIFLASH,
+   MUX_TYPE_TDM,
+   MUX_TYPE_CAN,
+   MUX_TYPE_CS0_NOR,
+   MUX_TYPE_CS0_NAND,
+};
+
+enum {
+   I2C_READ_BANK,
+   I2C_READ_PCB_VER,
+};
+
+static uint sd_ifc_mux;
 
-#ifndef CONFIG_SDCARD
 struct cpld_data {
u8 cpld_ver; /* cpld revision */
+#if defined(CONFIG_P1010RDB_PA)
u8 pcba_ver; /* pcb revision number */
u8 twindie_ddr3;
u8 res1[6];
@@ -51,53 +69,18 @@ struct cpld_data {
u8 por1; /* POR Options */
u8 por2; /* POR Options */
u8 por3; /* POR Options */
-};
-
-void cpld_show(void)
-{
-   struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
-
-   printf(CPLD: V%x.%x PCBA: V%x.0\n,
-   in_8(cpld_data-cpld_ver)  0xF0,
-   in_8(cpld_data-cpld_ver)  0x0F,
-   in_8(cpld_data-pcba_ver)  0x0F);
-
-#ifdef CONFIG_DEBUG
-   printf(twindie_ddr =%x\n,
-   in_8(cpld_data-twindie_ddr3));
-   printf(bank_sel =%x\n,
-   in_8(cpld_data-bank_sel));
-   printf(usb2_sel =%x\n,
-   in_8(cpld_data-usb2_sel));
-   printf(porsw_sel =%x\n,
-   in_8(cpld_data-porsw_sel));
-   printf(tdm_can_sel =%x\n,
-   in_8(cpld_data-tdm_can_sel));
-   printf(tdm_can_sel =%x\n,
-   in_8(cpld_data-tdm_can_sel));
-   printf(spi_cs0_sel =%x\n,
-   in_8(cpld_data-spi_cs0_sel));
-   printf(bcsr0 =%x\n,
-   in_8(cpld_data-bcsr0));
-   printf(bcsr1 =%x\n,
-   in_8(cpld_data-bcsr1));
-   printf(bcsr2 =%x\n,
-   in_8(cpld_data-bcsr2));
-   printf(bcsr3 =%x\n,
-   in_8(cpld_data-bcsr3));
-#endif
-}
+#elif defined(CONFIG_P1010RDB_PB)
+   u8 rom_loc;
 #endif
+};
 
 int board_early_init_f(void)
 {
ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
-#ifndef CONFIG_SDCARD
struct fsl_ifc *ifc = (void *)CONFIG_SYS_IFC_ADDR;
 
/* Clock configuration to access CPLD using IFC(GPCM) */
setbits_be32(ifc-ifc_gcr, 1  IFC_GCR_TBCTL_TRN_TIME_SHIFT);
-#endif
/*
* Reset PCIe slots via GPIO4
*/
@@ -109,7 +92,6 @@ int board_early_init_f(void)
 
 int board_early_init_r(void)
 {
-#ifndef CONFIG_SDCARD
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
 
@@ -133,7 +115,7 @@ int board_early_init_r(void)
CONFIG_SYS_FLASH_BASE_PHYS + 0x100,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel+1, BOOKE_PAGESZ_16M, 1);
-#endif
+
return 0;
 }
 
@@ -144,13 +126,201 @@ void pci_init_board(void)
 }
 #endif /* ifdef CONFIG_PCI */
 
+int config_board_mux(int ctrl_type)
+{
+   ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+   u8 tmp;
+
+#if defined(CONFIG_P1010RDB_PA)
+   struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
+
+   switch (ctrl_type) {

Re: [U-Boot] [PATCH] arm:goni:mmc: Add sd card detection and initialization.

[Minkyu Kang]

Dear Przemyslaw Marczak,

On 03/09/13 21:45, Przemyslaw Marczak wrote:
 This change allow to use sd card on Goni the same like mmc 0.
 SD card is mmc dev 1, so it can be used like this: fatls mmc 1:2.
 SD card is inited even if eMMC initialization fails.
 
 Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
 CC: Minkyu Kang mk7.k...@samsung.com
 ---
  board/samsung/goni/goni.c |   31 ++-
  1 file changed, 30 insertions(+), 1 deletion(-)
 
 diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
 index 5b3d6ef..7098fe7 100644
 --- a/board/samsung/goni/goni.c
 +++ b/board/samsung/goni/goni.c
 @@ -73,6 +73,7 @@ int checkboard(void)
  int board_mmc_init(bd_t *bis)
  {
   int i;
 + int ret;
  
   /* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
   s5p_gpio_direction_output(s5pc110_gpio-j2, 7, 1);
 @@ -95,7 +96,35 @@ int board_mmc_init(bd_t *bis)
   s5p_gpio_set_drv(s5pc110_gpio-g0, i, GPIO_DRV_4X);
   }
  
 - return s5p_mmc_init(0, 4);
 + ret = s5p_mmc_init(0, 4);
 + if (ret) {
 + puts(MMC: Failed to init MMC:0.\n);
 + }

please remove brace.

 +
 + /*
 +  * SD card (T_FLASH) detect and init
 +  * T_FLASH_DETECT: EINT28: GPH3[4] input mode
 +  */
 + s5p_gpio_cfg_pin(s5pc110_gpio-h3, 4, GPIO_INPUT);
 + s5p_gpio_set_pull(s5pc110_gpio-h3, 4, GPIO_PULL_UP);
 +
 + if (!s5p_gpio_get_value(s5pc110_gpio-h3, 4)) {
 + for (i = 0; i  7; i++) {
 + if (i == 2)
 + continue;

please add blank line.

 + /* GPG2[0:6] special function 2 */
 + s5p_gpio_cfg_pin(s5pc110_gpio-g2, i, 0x2);
 + /* GPG2[0:6] pull disable */
 + s5p_gpio_set_pull(s5pc110_gpio-g2, i, GPIO_PULL_NONE);
 + /* GPG2[0:6] drv 4x */
 + s5p_gpio_set_drv(s5pc110_gpio-g2, i, GPIO_DRV_4X);
 + }

please add blank line.

 + if (s5p_mmc_init(2, 4))
 + puts(MMC: Failed to init SD card (MMC:2).\n);
 + }
 +
 + /* SD card init is optional so print information when it fails only */

maybe this comment should be located near s5p_mmc_init(2, 4).

 + return ret;
  }
  #endif
  
 

Thanks,
Minkyu Kang.
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[U-Boot] powerpc SPL framework: Avoiding relocate_code

[Prabhakar Kushwaha]

Hi,

 SPL framework is used to support multi-stage booting.  Where first 
level boot loader is created via SPL having relocate_code() function.

I am working on a Freescale's SoC which has less internal SRAM.
I don't want to use relocate_code() as to support this function, I need 
to reduce SPL bin  to SRAM/2 size.


is there way to avoid relocate_code function ?

I tried with below sequence, but it is not working for me :(

.globlrelocate_code
relocate_code:
mrr1,r3/* Set new stack pointer*/
mrr9,r4/* Save copy of Init Data pointer*/
mrr10,r5/* Save copy of Destination Address*/

GET_GOT
#ifndef CONFIG_SPL_BUILD

--
--
#endif
.globlin_ram
in_ram:

The reason is bss variables which are mapped to 0x_ onwards 
because bsssection are mapped after 0xfffc in lds. They are not 
available during SPL execution.  is there way to relocate bss section in 
the execution range of SPL?


Please advice.

Regards,
Prabhakar



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[U-Boot] powerpc SPL framework: Avoiding relocate_code

[Prabhakar Kushwaha]

Hi,

 SPL framework is used to support multi-stage booting.  Where first 
level boot loader is created via SPL having relocate_code() function.

I am working on a Freescale's SoC which has less internal SRAM.
I don't want to use relocate_code() as to support this function, I need 
to reduce SPL bin  to SRAM/2 size.


is there way to avoid relocate_code function ?

I tried with below sequence, but it is not working for me :(

.globlrelocate_code
relocate_code:
mrr1,r3/* Set new stack pointer*/
mrr9,r4/* Save copy of Init Data pointer*/
mrr10,r5/* Save copy of Destination Address*/

GET_GOT
#ifndef CONFIG_SPL_BUILD

--
--
#endif
.globlin_ram
in_ram:

The reason is bss variables which are mapped to 0x_ onwards 
because bsssection are mapped after 0xfffc in lds. They are not 
available during SPL execution.  is there way to relocate bss section in 
the execution range of SPL?


Please advice.

Regards,
Prabhakar



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[U-Boot] [PATCH] arm:goni:mmc: Add sd card detection and initialization.

[Przemyslaw Marczak]

This change allow to use sd card on Goni the same like mmc 0.
SD card is mmc dev 1, so it can be used like this: fatls mmc 1:2.
SD card is inited even if eMMC initialization fails.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
 board/samsung/goni/goni.c |   33 +++--
 1 file changed, 31 insertions(+), 2 deletions(-)

diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index 5b3d6ef..d63e902 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -72,7 +72,7 @@ int checkboard(void)
 #ifdef CONFIG_GENERIC_MMC
 int board_mmc_init(bd_t *bis)
 {
-   int i;
+   int i, ret, ret_sd = 0;
 
/* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
s5p_gpio_direction_output(s5pc110_gpio-j2, 7, 1);
@@ -95,7 +95,36 @@ int board_mmc_init(bd_t *bis)
s5p_gpio_set_drv(s5pc110_gpio-g0, i, GPIO_DRV_4X);
}
 
-   return s5p_mmc_init(0, 4);
+   ret = s5p_mmc_init(0, 4);
+   if (ret)
+   puts(MMC: Failed to init MMC:0.\n);
+
+   /*
+* SD card (T_FLASH) detect and init
+* T_FLASH_DETECT: EINT28: GPH3[4] input mode
+*/
+   s5p_gpio_cfg_pin(s5pc110_gpio-h3, 4, GPIO_INPUT);
+   s5p_gpio_set_pull(s5pc110_gpio-h3, 4, GPIO_PULL_UP);
+
+   if (!s5p_gpio_get_value(s5pc110_gpio-h3, 4)) {
+   for (i = 0; i  7; i++) {
+   if (i == 2)
+   continue;
+
+   /* GPG2[0:6] special function 2 */
+   s5p_gpio_cfg_pin(s5pc110_gpio-g2, i, 0x2);
+   /* GPG2[0:6] pull disable */
+   s5p_gpio_set_pull(s5pc110_gpio-g2, i, GPIO_PULL_NONE);
+   /* GPG2[0:6] drv 4x */
+   s5p_gpio_set_drv(s5pc110_gpio-g2, i, GPIO_DRV_4X);
+   }
+
+   ret_sd = s5p_mmc_init(2, 4)
+   if (ret_sd)
+   puts(MMC: Failed to init SD card (MMC:2).\n);
+   }
+
+   return ret | ret_sd;
 }
 #endif
 
-- 
1.7.9.5

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[U-Boot] [PATCH] mmc:sdhci: Fix card ready status timeout.

[Przemyslaw Marczak]

According to JEDEC eMMC specification, after data transfer
(multiple or single block) host must wait for card ready
status. This is done by waiting for command and data lines
to be at idle state after transfer. JEDEC does not specify
maximum timeout.

Before this change max timeout was 10 ms but in case of UMS
- when system does multiple read/write operations on random
card blocks - timeout causes I/O errors.
The timeout has been increased to 200ms after data transfer.
For other transfers it stays unchanged. Default values are
now defined with if defined directive so it can be redefined
at board config if needed.

Tested on Goni and Trats.

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
---
 drivers/mmc/sdhci.c |   20 ++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 4261991..35bdb37 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -110,6 +110,20 @@ static int sdhci_transfer_data(struct sdhci_host *host, 
struct mmc_data *data,
return 0;
 }
 
+#if !defined(SDHCI_DATA_CMD_TIMEOUT)
+#define SDHCI_DATA_CMD_TIMEOUT 10
+#endif
+#if !defined(SDHCI_STATUS_CMD_TIMEOUT)
+#define SDHCI_STATUS_CMD_TIMEOUT   200
+#endif
+/*
+ * For some commands this function is called with NULL mmc_data
+ * pointer. One of those is CMD13 - send card status.
+ * After read/write data transfer or block erase commands - host sends
+ * CMD13 and is waiting for card ready status with some timeout.
+ * According to some internal cards operations after those commands
+ * this time must be increased.
+ */
 int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
   struct mmc_data *data)
 {
@@ -121,8 +135,10 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd 
*cmd,
unsigned int timeout, start_addr = 0;
unsigned int retry = 1;
 
-   /* Wait max 10 ms */
-   timeout = 10;
+   if (data)
+   timeout = SDHCI_DATA_CMD_TIMEOUT; /* ms */
+   else
+   timeout = SDHCI_STATUS_CMD_TIMEOUT;
 
sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
-- 
1.7.9.5

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[U-Boot] [PATCH v6 0/5] arm64 patch

[fenghua]

From: David Feng feng...@phytium.com.cn

The porting has been merged with arm architecture.
Most architecture codes are placed in arch/arm/cpu/armv8 directory.
Generic board is also supported after a few bugs are fixed.

Changes for v5:
  - Make modification to inappropriate licensed file and bugs according to 
ScottWood's advice.
Thanks Scott for his checking to these patches.
  - Enable u-boot's running at EL1.
  - Get rid of compiling warnings originated from hashtable.c and cmd_pxe.c.

David Feng (5):
  core support of arm64
  board support of arm64
  generic board patch of manual reloc and zero gd_t
  64bit initrd start address support
  remove compiling warnings

 arch/arm/config.mk  |4 +
 arch/arm/cpu/armv8/Makefile |   56 
 arch/arm/cpu/armv8/cache.S  |  145 ++
 arch/arm/cpu/armv8/cache_v8.c   |  284 
 arch/arm/cpu/armv8/config.mk|   31 +++
 arch/arm/cpu/armv8/cpu.c|   68 +
 arch/arm/cpu/armv8/crt0.S   |  130 +
 arch/arm/cpu/armv8/exceptions.S |  174 
 arch/arm/cpu/armv8/interrupts.c |  155 +++
 arch/arm/cpu/armv8/relocate.S   |   73 +
 arch/arm/cpu/armv8/start.S  |  253 ++
 arch/arm/cpu/armv8/timer.c  |   95 +++
 arch/arm/cpu/armv8/tlb.S|   45 
 arch/arm/cpu/armv8/u-boot.lds   |   83 ++
 arch/arm/include/asm/arch-armv8/armv8.h |   96 +++
 arch/arm/include/asm/arch-armv8/gpio.h  |   26 ++
 arch/arm/include/asm/arch-armv8/mmu.h   |  117 
 arch/arm/include/asm/byteorder.h|   12 +
 arch/arm/include/asm/config.h   |   10 +
 arch/arm/include/asm/global_data.h  |6 +-
 arch/arm/include/asm/io.h   |   12 +-
 arch/arm/include/asm/macro.h|   22 ++
 arch/arm/include/asm/posix_types.h  |   15 ++
 arch/arm/include/asm/proc-armv/ptrace.h |   37 +++
 arch/arm/include/asm/proc-armv/system.h |   58 +++-
 arch/arm/include/asm/types.h|4 +
 arch/arm/include/asm/u-boot.h   |4 +
 arch/arm/include/asm/unaligned.h|2 +-
 arch/arm/lib/Makefile   |8 +
 arch/arm/lib/board.c|   18 ++
 arch/arm/lib/bootm.c|   16 ++
 board/armltd/dts/vexpress64.dts |  439 +++
 board/armltd/vexpress64/Makefile|   43 +++
 board/armltd/vexpress64/vexpress64.c|   79 ++
 boards.cfg  |1 +
 common/board_f.c|   19 +-
 common/board_r.c|   17 ++
 common/cmd_pxe.c|4 +-
 common/fdt_support.c|   66 ++---
 common/image.c  |1 +
 doc/README.armv8|   10 +
 examples/standalone/stubs.c |   15 ++
 include/configs/vexpress_aemv8a.h   |  205 +++
 include/image.h |1 +
 lib/hashtable.c |1 +
 45 files changed, 2911 insertions(+), 49 deletions(-)
 create mode 100644 arch/arm/cpu/armv8/Makefile
 create mode 100644 arch/arm/cpu/armv8/cache.S
 create mode 100644 arch/arm/cpu/armv8/cache_v8.c
 create mode 100644 arch/arm/cpu/armv8/config.mk
 create mode 100644 arch/arm/cpu/armv8/cpu.c
 create mode 100644 arch/arm/cpu/armv8/crt0.S
 create mode 100644 arch/arm/cpu/armv8/exceptions.S
 create mode 100644 arch/arm/cpu/armv8/interrupts.c
 create mode 100644 arch/arm/cpu/armv8/relocate.S
 create mode 100644 arch/arm/cpu/armv8/start.S
 create mode 100644 arch/arm/cpu/armv8/timer.c
 create mode 100644 arch/arm/cpu/armv8/tlb.S
 create mode 100644 arch/arm/cpu/armv8/u-boot.lds
 create mode 100644 arch/arm/include/asm/arch-armv8/armv8.h
 create mode 100644 arch/arm/include/asm/arch-armv8/gpio.h
 create mode 100644 arch/arm/include/asm/arch-armv8/mmu.h
 create mode 100644 board/armltd/dts/vexpress64.dts
 create mode 100644 board/armltd/vexpress64/Makefile
 create mode 100644 board/armltd/vexpress64/vexpress64.c
 create mode 100644 doc/README.armv8
 create mode 100644 include/configs/vexpress_aemv8a.h

-- 
1.7.9.5


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[U-Boot] [PATCH v6 3/5] generic board patch of manual reloc and zero gd_t

[fenghua]

From: David Feng feng...@phytium.com.cn

1. function board_init_f in board_f.c should firstly zero gd_t structure
   before it call initcall_run_list, otherwise the debug print will go run
   if DEBUG is defined. Because the printf function will use global data
   to determine whether serial port is initialized and could be written.
2. function board_init_r in board_r.c should firstly relocate init_sequence_r
   table before it call initcall_run_list. Command table also should be 
relocated.

Signed-off-by: David Feng feng...@phytium.com.cn
---
Changes for v5:
  - no

 common/board_f.c |   19 +--
 common/board_r.c |   17 +
 2 files changed, 30 insertions(+), 6 deletions(-)

diff --git a/common/board_f.c b/common/board_f.c
index 0ada1af..98e24c3 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -458,7 +458,11 @@ static int reserve_round_4k(void)
 static int reserve_mmu(void)
 {
/* reserve TLB table */
+#ifndef CONFIG_ARMV8
gd-arch.tlb_size = 4096 * 4;
+#else
+   gd-arch.tlb_size = 0x1;
+#endif
gd-relocaddr -= gd-arch.tlb_size;
 
/* round down to next 64 kB limit */
@@ -610,7 +614,7 @@ static int reserve_stacks(void)
 * TODO(s...@chromium.org): Perhaps create arch_reserve_stack()
 * to handle this and put in arch/xxx/lib/stack.c
 */
-# ifdef CONFIG_ARM
+# if defined(CONFIG_ARM)  !defined(CONFIG_ARMV8)
 #  ifdef CONFIG_USE_IRQ
gd-start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
debug(Reserving %zu Bytes for IRQ stack at: %08lx\n,
@@ -807,11 +811,6 @@ static int mark_bootstage(void)
 }
 
 static init_fnc_t init_sequence_f[] = {
-#if !defined(CONFIG_CPM2)  !defined(CONFIG_MPC512X)  \
-   !defined(CONFIG_MPC83xx)  !defined(CONFIG_MPC85xx)  \
-   !defined(CONFIG_MPC86xx)  !defined(CONFIG_X86)
-   zero_global_data,
-#endif
 #ifdef CONFIG_SANDBOX
setup_ram_buf,
 #endif
@@ -1005,6 +1004,14 @@ void board_init_f(ulong boot_flags)
gd = data;
 #endif
 
+   /*
+* Zero gd_t first, otherwise the debug print in initcall_run_list
+* function before zero_global_data is called will go wrong.
+*/
+#ifndef CONFIG_X86
+   zero_global_data();
+#endif
+
gd-flags = boot_flags;
 
if (initcall_run_list(init_sequence_f))
diff --git a/common/board_r.c b/common/board_r.c
index 86ca1cb..1b4bdd2 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -157,6 +157,13 @@ static int initr_reloc_global_data(void)
 */
gd-env_addr += gd-relocaddr - CONFIG_SYS_MONITOR_BASE;
 #endif
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+   /*
+* We have to relocate the command table manually
+*/
+   fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd),
+   ll_entry_count(cmd_tbl_t, cmd));
+#endif /* CONFIG_NEEDS_MANUAL_RELOC */
return 0;
 }
 
@@ -899,6 +906,7 @@ init_fnc_t init_sequence_r[] = {
initr_modem,
 #endif
run_main_loop,
+   NULL,
 };
 
 void board_init_r(gd_t *new_gd, ulong dest_addr)
@@ -906,6 +914,15 @@ void board_init_r(gd_t *new_gd, ulong dest_addr)
 #ifndef CONFIG_X86
gd = new_gd;
 #endif
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+   /*
+* We have to relocate the init_sequence_r table manually
+*/
+   init_fnc_t  *init_fnc_ptr;
+   for (init_fnc_ptr = init_sequence_r; *init_fnc_ptr; ++init_fnc_ptr)
+   *init_fnc_ptr = (init_fnc_t *)((unsigned long)(*init_fnc_ptr) + 
gd-reloc_off);
+#endif /* CONFIG_NEEDS_MANUAL_RELOC */
+
if (initcall_run_list(init_sequence_r))
hang();
 
-- 
1.7.9.5


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[U-Boot] [PATCH v6 4/5] 64bit initrd start address support

[fenghua]

From: David Feng feng...@phytium.com.cn

This patch fix the fdt_initrd function.
It will get #adress_cells property fisrt, then write linux,initrd-start
and linux,initrd-end property value to fdt according to address cell size
such that the 64bit initrd start address could be supported.

Signed-off-by: David Feng feng...@phytium.com.cn
---
Changes for v5:
   - No

 common/fdt_support.c |   66 ++
 1 file changed, 34 insertions(+), 32 deletions(-)

diff --git a/common/fdt_support.c b/common/fdt_support.c
index b034c98..9bc5821 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -21,6 +21,34 @@
  */
 DECLARE_GLOBAL_DATA_PTR;
 
+/*
+ * Get cells len in bytes
+ * if #-cells property is 2 then len is 8
+ * otherwise len is 4
+ */
+static int get_cells_len(void *blob, char *nr_cells_name)
+{
+   const fdt32_t *cell;
+
+   cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
+   if (cell  fdt32_to_cpu(*cell) == 2)
+   return 8;
+
+   return 4;
+}
+
+/*
+ * Write a 4 or 8 byte big endian cell
+ */
+static void write_cell(u8 *addr, u64 val, int size)
+{
+   int shift = (size - 1) * 8;
+   while (size--  0) {
+   *addr++ = (val  shift)  0xff;
+   shift -= 8;
+   }
+}
+
 /**
  * fdt_getprop_u32_default - Find a node and return it's property or a default
  *
@@ -131,9 +159,9 @@ static int fdt_fixup_stdout(void *fdt, int chosenoff)
 
 int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int force)
 {
-   int   nodeoffset;
+   int   nodeoffset, addr_cell_len;
int   err, j, total;
-   fdt32_t  tmp;
+   fdt64_t  tmp;
const char *path;
uint64_t addr, size;
 
@@ -170,9 +198,11 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong 
initrd_end, int force)
return err;
}
 
+   addr_cell_len = get_cells_len(fdt, #address-cells);
+
path = fdt_getprop(fdt, nodeoffset, linux,initrd-start, NULL);
if ((path == NULL) || force) {
-   tmp = cpu_to_fdt32(initrd_start);
+   write_cell((u8 *)tmp, initrd_start, addr_cell_len);
err = fdt_setprop(fdt, nodeoffset,
linux,initrd-start, tmp, sizeof(tmp));
if (err  0) {
@@ -181,7 +211,7 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong 
initrd_end, int force)
fdt_strerror(err));
return err;
}
-   tmp = cpu_to_fdt32(initrd_end);
+   write_cell((u8 *)tmp, initrd_end, addr_cell_len);
err = fdt_setprop(fdt, nodeoffset,
linux,initrd-end, tmp, sizeof(tmp));
if (err  0) {
@@ -343,34 +373,6 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat,
do_fixup_by_compat(fdt, compat, prop, tmp, 4, create);
 }
 
-/*
- * Get cells len in bytes
- * if #-cells property is 2 then len is 8
- * otherwise len is 4
- */
-static int get_cells_len(void *blob, char *nr_cells_name)
-{
-   const fdt32_t *cell;
-
-   cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
-   if (cell  fdt32_to_cpu(*cell) == 2)
-   return 8;
-
-   return 4;
-}
-
-/*
- * Write a 4 or 8 byte big endian cell
- */
-static void write_cell(u8 *addr, u64 val, int size)
-{
-   int shift = (size - 1) * 8;
-   while (size--  0) {
-   *addr++ = (val  shift)  0xff;
-   shift -= 8;
-   }
-}
-
 #ifdef CONFIG_NR_DRAM_BANKS
 #define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS
 #else
-- 
1.7.9.5


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[U-Boot] [PATCH v6 5/5] remove compiling warnings

[fenghua]

From: David Feng feng...@phytium.com.cn

Signed-off-by: David Feng feng...@phytium.com.cn
---
 common/cmd_pxe.c |4 ++--
 lib/hashtable.c  |1 +
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index a2fb50a..52375a4 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -57,7 +57,7 @@ static int format_mac_pxe(char *outbuf, size_t outbuf_len)
uchar ethaddr[6];
 
if (outbuf_len  21) {
-   printf(outbuf is too small (%d  21)\n, outbuf_len);
+   printf(outbuf is too small (%ld  21)\n, outbuf_len);
 
return -EINVAL;
}
@@ -100,7 +100,7 @@ static int get_bootfile_path(const char *file_path, char 
*bootfile_path,
path_len = (last_slash - bootfile) + 1;
 
if (bootfile_path_size  path_len) {
-   printf(bootfile_path too small. (%d  %d)\n,
+   printf(bootfile_path too small. (%ld  %ld)\n,
bootfile_path_size, path_len);
 
return -1;
diff --git a/lib/hashtable.c b/lib/hashtable.c
index 644330a..ec53794 100644
--- a/lib/hashtable.c
+++ b/lib/hashtable.c
@@ -13,6 +13,7 @@
  * SPDX-License-Identifier:LGPL-2.1+
  */
 
+#include config.h
 #include errno.h
 #include malloc.h
 
-- 
1.7.9.5


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[U-Boot] [PATCH v6 2/5] board support of arm64

[fenghua]

From: David Feng feng...@phytium.com.cn

Signed-off-by: David Feng feng...@phytium.com.cn
---
Changes for v5:
   - add CONFIG_BOOTING_EL1 configuration to vexpress_aemv8a.h

 board/armltd/dts/vexpress64.dts  |  439 ++
 board/armltd/vexpress64/Makefile |   43 
 board/armltd/vexpress64/vexpress64.c |   79 ++
 boards.cfg   |1 +
 include/configs/vexpress_aemv8a.h|  205 
 5 files changed, 767 insertions(+)
 create mode 100644 board/armltd/dts/vexpress64.dts
 create mode 100644 board/armltd/vexpress64/Makefile
 create mode 100644 board/armltd/vexpress64/vexpress64.c
 create mode 100644 include/configs/vexpress_aemv8a.h

diff --git a/board/armltd/dts/vexpress64.dts b/board/armltd/dts/vexpress64.dts
new file mode 100644
index 000..067fea7
--- /dev/null
+++ b/board/armltd/dts/vexpress64.dts
@@ -0,0 +1,439 @@
+/*
+ * ARM Ltd. Fast Models
+ *
+ * Architecture Envelope Model (AEM) ARMv8-A
+ * ARMAEMv8AMPCT
+ *
+ * RTSM_VE_AEMv8A.lisa
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x8000 0x0001;
+
+/ {
+   /* boot configurations for u-boot */
+   config {
+   /*bootdelay = 1;*/
+   kernel-offset = 0x10;
+   rootdisk-offset = 0x80;
+   bootcmd = bootm 0x10 0x80:0x200;
+   };
+};
+
+/ {
+   model = RTSM_VE_AEMv8A;
+   compatible = arm,rtsm_ve,aemv8a, arm,vexpress;
+   interrupt-parent = gic;
+   #address-cells = 2;
+   #size-cells = 2;
+
+   /* chosen */
+   /* generated by u-boot */
+
+
+   aliases {
+   serial0 = v2m_serial0;
+   serial1 = v2m_serial1;
+   serial2 = v2m_serial2;
+   serial3 = v2m_serial3;
+   };
+
+   cpus {
+   #address-cells = 1;
+   #size-cells = 0;
+
+   cpu@0 {
+   device_type = cpu;
+   compatible = arm,armv8;
+   reg = 0;
+   enable-method = spin-table;
+   cpu-release-addr = 0x0 0x8000fff8;
+   };
+   cpu@1 {
+   device_type = cpu;
+   compatible = arm,armv8;
+   reg = 1;
+   enable-method = spin-table;
+   cpu-release-addr = 0x0 0x8000fff8;
+   };
+   cpu@2 {
+   device_type = cpu;
+   compatible = arm,armv8;
+   reg = 2;
+   enable-method = spin-table;
+   cpu-release-addr = 0x0 0x8000fff8;
+   };
+   cpu@3 {
+   device_type = cpu;
+   compatible = arm,armv8;
+   reg = 3;
+   enable-method = spin-table;
+   cpu-release-addr = 0x0 0x8000fff8;
+   };
+   };
+
+   memory@8000 {
+   device_type = memory;
+   reg = 0x 0x8000 0 0x8000,
+ 0x0008 0x8000 0 0x8000;
+   };
+
+   gic: interrupt-controller@2c001000 {
+   compatible = arm,cortex-a15-gic, arm,cortex-a9-gic;
+   #interrupt-cells = 3;
+   #address-cells = 0;
+   interrupt-controller;
+   reg = 0x0 0x2c001000 0 0x1000,
+ 0x0 0x2c002000 0 0x1000,
+ 0x0 0x2c004000 0 0x2000,
+ 0x0 0x2c006000 0 0x2000;
+   interrupts = 1 9 0xf04;
+   };
+
+   timer {
+   compatible = arm,armv8-timer;
+   interrupts = 1 13 0xff01,
+1 14 0xff01,
+1 11 0xff01,
+1 10 0xff01;
+   clock-frequency = 1;
+   };
+
+   pmu {
+   compatible = arm,armv8-pmuv3;
+   interrupts = 0 60 4,
+0 61 4,
+0 62 4,
+0 63 4;
+   };
+
+   smb {
+   compatible = simple-bus;
+
+   #address-cells = 2;
+   #size-cells = 1;
+   ranges = 0 0 0 0x0800 0x0400,
+1 0 0 0x1400 0x0400,
+2 0 0 0x1800 0x0400,
+3 0 0 0x1c00 0x0400,
+4 0 0 0x0c00 0x0400,
+5 0 0 0x1000 0x0400;
+
+   #interrupt-cells = 1;
+   interrupt-map-mask = 0 0 63;
+   interrupt-map = 0 0  0 gic 0  0 4,
+   0 0  1 gic 0  1 4,
+   0 0  2 gic 0  2 4,
+   0 0  3 gic 0  3 4,
+   0 0  4 gic 0  4 4,
+   0 0  5 gic 

Re: [U-Boot] [PATCH] config: consolidate CONFIG_SYS_HZ definition

[Wolfgang Denk]

Dear Rob Herring,

In message 1378670088-17602-1-git-send-email-robherri...@gmail.com you wrote:

...
 diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
 index e59ee96..4c25289 100644
 --- a/include/config_fallbacks.h
 +++ b/include/config_fallbacks.h
 @@ -53,4 +53,8 @@
  #define HAVE_BLOCK_DEVICE
  #endif
  
 +#ifndef CONFIG_SYS_HZ
 +#define CONFIG_SYS_HZ1000
 +#endif

This should be not a fallback (i. e. default value) which can be
silently overwritten - this should be a mandatory definition that
causes build errors if somebody tries to define a different value.

Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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dollars and you are either a government or a hero.
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Re: [U-Boot] [PATCH v6 2/5] board support of arm64

[Wolfgang Denk]

Dear feng...@phytium.com.cn,

In message 1378734616-37558-3-git-send-email-feng...@phytium.com.cn you wrote:
 From: David Feng feng...@phytium.com.cn
 
 Signed-off-by: David Feng feng...@phytium.com.cn
 ---
 Changes for v5:
- add CONFIG_BOOTING_EL1 configuration to vexpress_aemv8a.h
 
  board/armltd/dts/vexpress64.dts  |  439 
 ++
  board/armltd/vexpress64/Makefile |   43 
  board/armltd/vexpress64/vexpress64.c |   79 ++
  boards.cfg   |1 +
  include/configs/vexpress_aemv8a.h|  205 
  5 files changed, 767 insertions(+)
  create mode 100644 board/armltd/dts/vexpress64.dts
  create mode 100644 board/armltd/vexpress64/Makefile
  create mode 100644 board/armltd/vexpress64/vexpress64.c
  create mode 100644 include/configs/vexpress_aemv8a.h

Please fix the subject.  The board name is not arm64, but apparently
vexpress64. 

Please also add an entry to the MAINTAINERS file.

Best regards,

Wolfgang Denk

-- 
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Everyone who comes in here wants three things:
1. They want it quick.
2. They want it good.
3. They want it cheap.
I tell 'em to pick two and call me back.
- sign on the back wall of a small printing company in Delaware
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Re: [U-Boot] [PATCH v6 0/5] arm64 patch

[Wolfgang Denk]

Dear feng...@phytium.com.cn,

In message 1378734616-37558-1-git-send-email-feng...@phytium.com.cn you wrote:
 From: David Feng feng...@phytium.com.cn
 
 The porting has been merged with arm architecture.
 Most architecture codes are placed in arch/arm/cpu/armv8 directory.
 Generic board is also supported after a few bugs are fixed.

This patch series throws a large number of checkpatch warnings (like
line over 80 characters, space prohibited between function name and
open parenthesis, externs should be avoided in .c files, do not
initialise statics to 0 or NULL, trailing statements should be on next
line, Avoid CamelCase, do not use C99 // comments, please, no space
before tabs, ...) that need to be fixed.

Also, some constructs look pretty obscure and I wonder if they have
actually been tested; see for example here:

+#define S_X3   (24 /* offsetof(struct pt_regs, regs[3]) */

This does not look like correct code to me?


 Changes for v5:
   - Make modification to inappropriate licensed file and bugs according to 
 ScottWood's advice.
 Thanks Scott for his checking to these patches.
   - Enable u-boot's running at EL1.
   - Get rid of compiling warnings originated from hashtable.c and cmd_pxe.c.

Please always provide a complete change log, including all patch
versions.

Best regards,

Wolfgang Denk

-- 
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Bus error -- driver executed.
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Re: [U-Boot] [PATCH v6 5/5] remove compiling warnings

[Wolfgang Denk]

Dear feng...@phytium.com.cn,

In message 1378734616-37558-6-git-send-email-feng...@phytium.com.cn you wrote:
 From: David Feng feng...@phytium.com.cn
 
 Signed-off-by: David Feng feng...@phytium.com.cn
 ---
  common/cmd_pxe.c |4 ++--
  lib/hashtable.c  |1 +
  2 files changed, 3 insertions(+), 2 deletions(-)
 
 diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
 index a2fb50a..52375a4 100644
 --- a/common/cmd_pxe.c
 +++ b/common/cmd_pxe.c
 @@ -57,7 +57,7 @@ static int format_mac_pxe(char *outbuf, size_t outbuf_len)
   uchar ethaddr[6];
  
   if (outbuf_len  21) {
 - printf(outbuf is too small (%d  21)\n, outbuf_len);
 + printf(outbuf is too small (%ld  21)\n, outbuf_len);

This does not look right to me.  outbuf_len is of type size_t, which
may or may not be the same as long.

You should use %z here.

   return -EINVAL;
   }
 @@ -100,7 +100,7 @@ static int get_bootfile_path(const char *file_path, char 
 *bootfile_path,
   path_len = (last_slash - bootfile) + 1;
  
   if (bootfile_path_size  path_len) {
 - printf(bootfile_path too small. (%d  %d)\n,
 + printf(bootfile_path too small. (%ld  %ld)\n,

Ditto.

 --- a/lib/hashtable.c
 +++ b/lib/hashtable.c
 @@ -13,6 +13,7 @@
   * SPDX-License-Identifier:  LGPL-2.1+
   */
  
 +#include config.h
  #include errno.h
  #include malloc.h

Why would that be needed?

Best regards,

Wolfgang Denk

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 The software required `Windows 95 or better', so I installed Linux.
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Re: [U-Boot] [PATCH v6 3/5] generic board patch of manual reloc and zero gd_t

[Wolfgang Denk]

Dear feng...@phytium.com.cn,

In message 1378734616-37558-4-git-send-email-feng...@phytium.com.cn you wrote:
 From: David Feng feng...@phytium.com.cn
 
 1. function board_init_f in board_f.c should firstly zero gd_t structure
before it call initcall_run_list, otherwise the debug print will go run
if DEBUG is defined. Because the printf function will use global data
to determine whether serial port is initialized and could be written.
 2. function board_init_r in board_r.c should firstly relocate init_sequence_r
table before it call initcall_run_list. Command table also should be 
 relocated.

Please restrict the line length of your commit messages to some 70
characters or so.

 --- a/common/board_f.c
 +++ b/common/board_f.c
 @@ -458,7 +458,11 @@ static int reserve_round_4k(void)
  static int reserve_mmu(void)
  {
   /* reserve TLB table */
 +#ifndef CONFIG_ARMV8
   gd-arch.tlb_size = 4096 * 4;
 +#else
 + gd-arch.tlb_size = 0x1;
 +#endif
   gd-relocaddr -= gd-arch.tlb_size;

Please avoid such #ifdef's in the code.  Replace the hard coded
default (here 0x1) by a variable, and define these as needed.

 -#if !defined(CONFIG_CPM2)  !defined(CONFIG_MPC512X)  \
 - !defined(CONFIG_MPC83xx)  !defined(CONFIG_MPC85xx)  \
 - !defined(CONFIG_MPC86xx)  !defined(CONFIG_X86)
 - zero_global_data,
 -#endif
  #ifdef CONFIG_SANDBOX
   setup_ram_buf,
  #endif
 @@ -1005,6 +1004,14 @@ void board_init_f(ulong boot_flags)
   gd = data;
  #endif
  
 + /*
 +  * Zero gd_t first, otherwise the debug print in initcall_run_list
 +  * function before zero_global_data is called will go wrong.
 +  */
 +#ifndef CONFIG_X86
 + zero_global_data();
 +#endif

This change does not look right to me.  The condition was much
different before.


Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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takes  a  touch  of  genius  -  and a lot of courage - to move in the
opposite direction. - Albert Einstein
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[U-Boot] [PATCH] Subject: [PATCH v.2] at91: add support for CDU9G25 board

[Jiri Prchal]

This patch adds support for our companies board CDU9G25 with Atmel AT91SAM9G25, 
128MB DDR2, 256MB NAND.

v.2
Fixed static IP and MAC addr cofiguration by random MAC and DHCP.
Added entry to MAINTAINERS.
Fixed line lenght, trailing spaces and other cosmetics.

Signed-off-by: Jiri Prchal jiri.prc...@aksignal.cz
---
 MAINTAINERS   |3 +
 board/cdu9g25/Makefile|   48 +++
 board/cdu9g25/cdu9g25.c   |  134 +
 board/cdu9g25/config.mk   |1 +
 boards.cfg|1 +
 include/configs/cdu9g25.h |  204 +
 6 files changed, 391 insertions(+)
 create mode 100644 board/cdu9g25/Makefile
 create mode 100644 board/cdu9g25/cdu9g25.c
 create mode 100644 board/cdu9g25/config.mk
 create mode 100644 include/configs/cdu9g25.h

diff --git a/MAINTAINERS b/MAINTAINERS
index bd0f3a0..444500b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -939,6 +939,9 @@ Bo Shen voice.s...@atmel.com
at91sam9x5ekARM926EJS (AT91SAM9G15,G25,G35,X25,X35 SoC)
sama5d3xek  ARMV7 (SAMA5D31, D33, D34, D35 SoC)

+Jiri Prchal jiri.prc...@aksignal.cz
+   cdu9g25 ARM926EJS (AT91SAM9G25 SoC)
+
 Rajeshwari Shinde rajeshwar...@samsung.com

snowARM ARMV7 (EXYNOS5250 SoC)
diff --git a/board/cdu9g25/Makefile b/board/cdu9g25/Makefile
new file mode 100644
index 000..11e2d4f
--- /dev/null
+++ b/board/cdu9g25/Makefile
@@ -0,0 +1,48 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# (C) Copyright 2008
+# Stelian Pop stel...@popies.net
+# Lead Tech Design www.leadtechdesign.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS-y+= cdu9g25.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS-y))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/cdu9g25/cdu9g25.c b/board/cdu9g25/cdu9g25.c
new file mode 100644
index 000..e9cdbc3
--- /dev/null
+++ b/board/cdu9g25/cdu9g25.c
@@ -0,0 +1,134 @@
+/*
+ * (C) Copyright 2013
+ * Jiri Prchal jiri.prc...@aksignal.cz
+ * AK signal www.aksignal.cz
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/at91sam9x5_matrix.h
+#include asm/arch/at91sam9_smc.h
+#include asm/arch/at91_common.h
+#include asm/arch/at91_pmc.h
+#include asm/arch/at91_rstc.h
+#include asm/arch/gpio.h
+#include asm/arch/clk.h
+#include atmel_hlcdc.h
+#include atmel_mci.h
+
+#ifdef CONFIG_MACB
+#include net.h
+#endif
+
+#include netdev.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* - */
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+#ifdef CONFIG_CMD_NAND
+static void cdu9g25_nand_hw_init(void)
+{
+   struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+   struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+   struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+   unsigned long csa;
+
+   /* Enable CS3 */
+   csa = readl(matrix-ebicsa);
+   csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
+   writel(csa, matrix-ebicsa);
+
+   /* Configure SMC CS3 for NAND/SmartMedia */
+   writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+   AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+   smc-cs[3].setup);
+   writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(5) |
+   AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(6),
+   smc-cs[3].pulse);
+   writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(6),
+   smc-cs[3].cycle);
+   writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+   AT91_SMC_MODE_EXNW_DISABLE |
+   AT91_SMC_MODE_DBW_8 |
+

[U-Boot] [PATCH v3] mmc: don't support write erase for SPL builds

[Paul Burton]

For SPL builds this is just dead code since we'll only need to read.
Eliminating it results in a significant size reduction for the SPL
binary, which may be critical for certain platforms where the binary
size is highly constrained.

Signed-off-by: Paul Burton paul.bur...@imgtec.com
Acked-by: Pantelis Antoniou pa...@antoniou-consulting.com
---
Changes in v3:
  - Remove conditional compilation of prints/puts calls in mmc_write.c
since this file is only compiled for non-SPL builds making the
conditionals superfluous. As pointed out by Andreas Bießmann.

Changes in v2:
  - Move the mmc_bwrite  mmc_berase functions to a new mmc_write.c
file which is only compiled for non-SPL builds, as per a request
from Pantelis Antoniou. This requires that a few formerly static
functions in mmc.c be accessible to the new file, so they are
declared in a new mmc_private.h header along with the write 
erase functions. For what it's worth I prefered v1, but hey ho.
---
 drivers/mmc/Makefile  |   2 +
 drivers/mmc/mmc.c | 186 +-
 drivers/mmc/mmc_private.h |  45 +++
 drivers/mmc/mmc_write.c   | 179 
 4 files changed, 230 insertions(+), 182 deletions(-)
 create mode 100644 drivers/mmc/mmc_private.h
 create mode 100644 drivers/mmc/mmc_write.c

diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index bedf833..06280d1 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -34,6 +34,8 @@ COBJS-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
 COBJS-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o
 ifdef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
+else
+COBJS-$(CONFIG_GENERIC_MMC) += mmc_write.o
 endif
 
 COBJS  := $(COBJS-y)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 30a985b..666f77b 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -15,6 +15,7 @@
 #include malloc.h
 #include linux/list.h
 #include div64.h
+#include mmc_private.h
 
 /* Set block count limit because of 16 bit register limit on some hardware*/
 #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
@@ -52,8 +53,7 @@ int __board_mmc_getcd(struct mmc *mmc) {
 int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
alias(__board_mmc_getcd)));
 
-static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
-   struct mmc_data *data)
+int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 {
struct mmc_data backup;
int ret;
@@ -114,7 +114,7 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd 
*cmd,
return ret;
 }
 
-static int mmc_send_status(struct mmc *mmc, int timeout)
+int mmc_send_status(struct mmc *mmc, int timeout)
 {
struct mmc_cmd cmd;
int err, retries = 5;
@@ -162,7 +162,7 @@ static int mmc_send_status(struct mmc *mmc, int timeout)
return 0;
 }
 
-static int mmc_set_blocklen(struct mmc *mmc, int len)
+int mmc_set_blocklen(struct mmc *mmc, int len)
 {
struct mmc_cmd cmd;
 
@@ -192,184 +192,6 @@ struct mmc *find_mmc_device(int dev_num)
return NULL;
 }
 
-static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
-{
-   struct mmc_cmd cmd;
-   ulong end;
-   int err, start_cmd, end_cmd;
-
-   if (mmc-high_capacity)
-   end = start + blkcnt - 1;
-   else {
-   end = (start + blkcnt - 1) * mmc-write_bl_len;
-   start *= mmc-write_bl_len;
-   }
-
-   if (IS_SD(mmc)) {
-   start_cmd = SD_CMD_ERASE_WR_BLK_START;
-   end_cmd = SD_CMD_ERASE_WR_BLK_END;
-   } else {
-   start_cmd = MMC_CMD_ERASE_GROUP_START;
-   end_cmd = MMC_CMD_ERASE_GROUP_END;
-   }
-
-   cmd.cmdidx = start_cmd;
-   cmd.cmdarg = start;
-   cmd.resp_type = MMC_RSP_R1;
-
-   err = mmc_send_cmd(mmc, cmd, NULL);
-   if (err)
-   goto err_out;
-
-   cmd.cmdidx = end_cmd;
-   cmd.cmdarg = end;
-
-   err = mmc_send_cmd(mmc, cmd, NULL);
-   if (err)
-   goto err_out;
-
-   cmd.cmdidx = MMC_CMD_ERASE;
-   cmd.cmdarg = SECURE_ERASE;
-   cmd.resp_type = MMC_RSP_R1b;
-
-   err = mmc_send_cmd(mmc, cmd, NULL);
-   if (err)
-   goto err_out;
-
-   return 0;
-
-err_out:
-#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
-   puts(mmc erase failed\n);
-#endif
-   return err;
-}
-
-static unsigned long
-mmc_berase(int dev_num, lbaint_t start, lbaint_t blkcnt)
-{
-   int err = 0;
-   struct mmc *mmc = find_mmc_device(dev_num);
-   lbaint_t blk = 0, blk_r = 0;
-   int timeout = 1000;
-
-   if (!mmc)
-   return -1;
-
-#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
-   if ((start % mmc-erase_grp_size) || (blkcnt % mmc-erase_grp_size))
-   printf(\n\nCaution! Your devices Erase group is 0x%x\n
-  The erase 

Re: [U-Boot] [PATCH 0/1] m28evk board config

[Marek Vasut]

Dear lot...@denx.de,

 Hi,
 
 Following, an update for the m28evk board config, in order to support a
 standard setup for sdcards having an uImage and FDT files on boot
 partition (ext), and a rootfs partition (ext), as it will be used by the
 latest ELDK and its yocto build recipes.

You certainly do want to use git format-patch --cover-letter to generate 
these 
introductory mails. Once your patchset is produced, edit -cover-letter and 
then use git send-email on the result.

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/1] m28evk board config

[Marek Vasut]

Dear lot...@denx.de,

  From 24b6381162b4569ab86b481b8714d81877231f22 Mon Sep 17 00:00:00 2001
  From: Lothar Rubusch lot...@denx.de
 Date: Fri, 6 Sep 2013 15:01:39 +0200
 Subject: [PATCH] m28evk board specific configurations for setup with ext
 boot
   partition and separate ext rootfs
 
 
 Signed-off-by: Lothar Rubusch lot...@denx.de
 ---
   include/configs/m28evk.h | 78
 ++--
   1 file changed, 75 insertions(+), 3 deletions(-)
 
 diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
 index eba8759..b65456e 100644
 --- a/include/configs/m28evk.h
 +++ b/include/configs/m28evk.h
 @@ -150,15 +150,25 @@
   #endif
 
   /* Booting Linux */
 -#define CONFIG_BOOTDELAY 3
 +#define CONFIG_BOOTDELAY 5
   #define CONFIG_BOOTFILE uImage
   #define CONFIG_BOOTARGS console=ttyAMA0,115200n8 
 -#define CONFIG_BOOTCOMMAND   run bootcmd_net
 +#define CONFIG_BOOTCOMMAND   run mmc_mmc
   #define CONFIG_LOADADDR 0x4200
   #define CONFIG_SYS_LOAD_ADDRCONFIG_LOADADDR

These two options above do not seem right, they certainly can make use of some 
unification. But that's for another patch.

   /* Extra Environment */
   #define CONFIG_EXTRA_ENV_SETTINGS   \
 + fdtfile=imx28-m28evk.dtb\0\
 + consdev=ttyAMA0\0 \
 + baudrate=115200\0 \
 + bootdev=/dev/mmcblk0p2\0  \
 + rootdev=/dev/mmcblk0p3\0  \
 + netdev=eth0\0 \
 + hostname=m28evk\0 \
 + rootpath=/opt/eldk-5.3/armv5te/rootfs-qte-sdk\0   \

Use 5.4 here ?

 + kernel_addr_r=0x4200\0\
 + fdt_addr_r=0x4100\0   \
   update_nand_full_filename=u-boot.nand\0   \
   update_nand_firmware_filename=u-boot.sb\0 \
   update_sd_firmware_filename=u-boot.sd\0   \
 @@ -196,7 +206,69 @@
   setexpr fw_sz ${fw_sz} + 1 ;  \
   mmc write ${loadaddr} 0x800 ${fw_sz} ;\
   fi ;  \
 - fi\0
 + fi\0  \
 + addcons=setenv bootargs ${bootargs} console=${consdev},${baudrate}\0
 \
 + addip=\
 + setenv bootargs ${bootargs}   \
 + ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}: \
 + ${hostname}:${netdev}:off\0   \
 + addmisc=setenv bootargs ${bootargs} ${miscargs}\0 \
 + adddfltmtd=   \
 + if test \x${mtdparts}\ == \x\ ;   \
 + then mtdparts default ;   \
 + fi\0  \

I suspect the addmtd should be called unconditionally for every boot type 
(mmc_nfs...net_nand).

[...]

Best regards,
Marek Vasut
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Re: [U-Boot] Pull request: u-boot-arm/master

[Tom Rini]

On Sat, Sep 07, 2013 at 12:55:38AM +0200, Albert ARIBAUD wrote:

 Hello Tom,
 
 The following changes since commit
 fb18fa95a14ae875ef0a5421cd9fecc00c7c3a4c:
 
   Prepare v2013.10-rc2 (2013-09-02 14:20:36 -0400)
 
 are available in the git repository at:
 
   git://git.denx.de/u-boot-arm master
 
 for you to fetch changes up to 68e1747f9c0506159e8ecc9a4feb58e9c65a7b39:
 
   socfpga: Creating driver for Reset Manager (2013-09-06 12:09:06 +0200)
 
 
 Albert ARIBAUD (7):
   arm: omap3: fix SRAM copy and execution sequence
   Merge 'u-boot-microblaze/zynq' into (u-boot-arm/master'
   Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
   Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'
   Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
   Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
   Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'
 
 Amaury Pouly (1):
   mmc: mxsmmc: Enable MMC HC support
 
 Andreas Wass (2):
   ARM: mxs: Added application UART driver
   ARM: mxs: Add mx28evk_auart_console target
 
 Bo Shen (11):
   net: macb: fix the following building warning
   arm: atmel: add gmac support for sama5d3xek board
   arm: atmel: add nand trimffs subcommand for at91sam9n12 and
 at91sam9x5 arm: sama5d3: fix smc cs related registers offset
   arm: sama5d3: remove unused define
   arm: atmel: sama5d3: fix typo error for CONFIG_ENV_IS_NOWHERE
   arm: atmel: remove the config.mk file
   gpio: atmel: fix code to use pointer for pio port
   gpio: atmel: add gpio common API support
   gpio: atmel: add copyright and remove error header info
   ARM: atmel: sama5d3: drop unused CONFIG_NET_MULTI
 
 Chin Liang See (2):
   socfpga: Adding configuration for development kit
   socfpga: Creating driver for Reset Manager
 
 Eric Nelson (6):
   i.MX6: nitrogen6x: force HDMI onto IPU0/DI0
   fec_mxc: set ethaddr if fuses burned and not previously set
   i.MX6: Add convenience macros cpu_type(rev) and is_cpu_type(cpu)
   i.MX6: Correct ANATOP_PFD (Phase Fractional Divider) register
 declarations i.MX6: nitrogen6x: Don't bother setting PLL3(480) PFD1
 divisor i.MX6: Set and clear the gating bits for Phase Fractional
 Dividers
 
 Hector Palacios (1):
   ARM: mxs: rename function that sets AUTO_RESTART flag
 
 Heiko Schocher (6):
   arm, am33xx: add defines for gmii_sel_register bits
   arm, am335x: add some missing registers and defines for lcd and
 epwm support arm, spl: add watchdog library to SPL
   arm, am335x: add watchdog support
   video: add formike lcd panel init
   arm, am335x: add support for 3 siemens boards
 
 Javier Martinez Canillas (1):
   ARM: igep00x0.h: Enable raw initrd support
 
 Jens Scharsig (BuS Elektronik) (1):
   arm: atmel: cpux9k2: board update and enhancement
 
 Lubomir Popov (1):
   ARM: OMAP4470: Add Elpida EDB8164B3PF memory configuration
 
 Marek Vasut (3):
   ARM: mxs: tools: Add mkimage support for MXS bootstream
   tools: Sort lists of files in Makefile
   tools: mxsboot: Staticize functions
 
 Michal Simek (4):
   zynq: Add new ddrc driver for ECC support
   zynq: slcr: Wait 100ms till clk is properly setup
   zynq: Enable axi ethernet and emaclite driver initialization
   arm: lds: Remove libgcc eabi exception handling tables
 
 Oleksandr Tyshchenko (1):
   sdp4430: Initialize board id using CONFIG_MACH_TYPE
 
 SARTRE Leo (1):
   ARM: Congatec: README update
 
 Stefano Babic (7):
   tools: imx_header should not include flash_offset
   tools: rename mximage_flash_offset to imximage_ivt_offset
   tools: dynamically allocate imx_header in imximage
   tools: add variable padding of data image in mkimage
   tools: add padding of data image file for imximage
   tools: add support for setting the CSF into imximage
   imx: add status reporting for HAB status
 
 Stephen Warren (1):
   ARM: tegra: support raw ramdisks
 
 Taras Kondratiuk (3):
   ARM: OMAP4470: Add OMAP4470 identification
   ARM: OMAP4470: Add voltage and dpll data
   ARM: OMAP4460: sdp: Limit TPS mux config to 4460
 
 Thierry Reding (2):
   ARM: tegra: Make cache line size SoC specific
   ARM: tegra: Enable data cache on Dalmore
 
 Tom Rini (13):
   am33xx: Correct and expand comments on CONFIG_SPL_MAX_SIZE
   TI:armv7: Move CONFIG_SPL_LIBDISK_SUPPORT to MMC section
   omap5: Expand CONFIG_SPL_MAX_SIZE and comment upon
 SRAM_SCRATCH_SPACE_ADDR TI:am335x: Better comment and organize the
 networking related options am335x_evm: Add comment by SPL SPI support
   am335x_evm: Regroup USB options
   TI:armv7: Re-order slightly the generic CONFIG options, expand
 related comments am335x_evm: Update README for customization
   TI:am33xx: Move SPL YMODEM support to the per-board config

Re: [U-Boot] [PATCH] am335x_evm.h: Add back the actual load of the kernel image

[Tom Rini]

On Wed, Sep 04, 2013 at 08:41:44AM -0400, Robert P. J. Day wrote:

 Somewhere along the line of refactoring the am335x header files, the
 kernel image load was lost, so put it back in.
 
 Signed-off-by: Robert P. J. Day rpj...@crashcourse.ca

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] Please pull u-boot-ppc4xx/master

[Tom Rini]

On Sat, Sep 07, 2013 at 09:50:15AM +0200, Stefan Roese wrote:

 Hi Tom,
 
 please pull the following fix:
 
 The following changes since commit 1affd4d4a3fe512050e1ad1636d9360c670da531:
 
   cam_enc_4xx: Move CONFIG_SPL_PAD_TO to a config header (2013-09-06 13:09:08 
 -0400)
 
 are available in the git repository at:
 
   git://www.denx.de/git/u-boot-ppc4xx.git master
 
 for you to fetch changes up to 9055f66c2dfb637d0f30372a7e79cca854e45bae:
 
   ppc4xx: Fix GPIO handling in lwmon5 and lcd4_lwmon5 BSP (2013-09-07 
 09:48:06 +0200)
 
 
 Stefan Roese (1):
   ppc4xx: Fix GPIO handling in lwmon5 and lcd4_lwmon5 BSP
 
  board/lwmon5/lwmon5.c|  3 +++
  include/configs/lwmon5.h | 10 +-
  2 files changed, 12 insertions(+), 1 deletion(-)

Applied to u-boot/master, thanks!

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Re: [U-Boot] [i2c] Pull request

[Tom Rini]

On Mon, Sep 09, 2013 at 07:48:34AM +0200, Heiko Schocher wrote:

 Hello Tom,
 
 please pull from u-boot-i2c:
 
 The following changes since commit 1affd4d4a3fe512050e1ad1636d9360c670da531:
 
   cam_enc_4xx: Move CONFIG_SPL_PAD_TO to a config header (2013-09-06 13:09:08 
 -0400)
 
 are available in the git repository at:
 
   git://git.denx.de/u-boot-i2c.git master
 
 for you to fetch changes up to f62b123813ea604d16ed6115fe2fa552b23d9102:
 
   powerpc/mpc85xx: Fix the I2C bus speed error on p1022 (2013-09-09 07:44:27 
 +0200)
 
 
 Tang Yuantian (1):
   powerpc/mpc85xx: Fix the I2C bus speed error on p1022
 
 Ying Zhang (1):
   SPL: P1022DS: switch to new multibus/multiadapter support
 
  arch/powerpc/cpu/mpc85xx/speed.c| 3 ++-
  arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 5 +
  board/freescale/p1022ds/spl.c   | 6 +-
  3 Dateien ge?ndert, 12 Zeilen hinzugef?gt(+), 2 Zeilen entfernt(-)

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] config: consolidate CONFIG_SYS_HZ definition

[Rob Herring]

On 09/09/2013 09:06 AM, Wolfgang Denk wrote:
 Dear Rob Herring,
 
 In message 1378670088-17602-1-git-send-email-robherri...@gmail.com you 
 wrote:

 ...
 diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
 index e59ee96..4c25289 100644
 --- a/include/config_fallbacks.h
 +++ b/include/config_fallbacks.h
 @@ -53,4 +53,8 @@
  #define HAVE_BLOCK_DEVICE
  #endif
  
 +#ifndef CONFIG_SYS_HZ
 +#define CONFIG_SYS_HZ   1000
 +#endif
 
 This should be not a fallback (i. e. default value) which can be
 silently overwritten - this should be a mandatory definition that
 causes build errors if somebody tries to define a different value.

What do I do with current boards that are wrong? I should make all these
boards have build errors or fix them to use 1000 which may break them at
runtime depending on their possible misuse of CONFIG_SYS_HZ?

include/configs/KAREF.h:#define CONFIG_SYS_HZ 100
 /* decr freq: 1 ms ticks   */
include/configs/M5271EVB.h:#define CONFIG_SYS_HZ
100
include/configs/METROBOX.h:#define CONFIG_SYS_HZ
100/* decr freq: 1 ms ticks   */
include/configs/MVBLUE.h:#define CONFIG_SYS_HZ   1
include/configs/idmr.h:#define CONFIG_SYS_HZ
(5000 / 64)
include/configs/mini2440.h:#define CONFIG_SYS_HZ
1562500
include/configs/mx1ads.h:#define CONFIG_SYS_HZ  3686400
include/configs/omap3_zoom2.h:#define CONFIG_SYS_HZ
((V_SCLK) / (2  CONFIG_SYS_PTV))
include/configs/omap730p2.h:#define CONFIG_SYS_HZ
((CONFIG_SYS_CLK_FREQ)/(2  CONFIG_SYS_PTV))
include/configs/rsk7203.h:#define CONFIG_SYS_HZ
(CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
include/configs/rsk7264.h:#define CONFIG_SYS_HZ
(CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
include/configs/rsk7269.h:#define CONFIG_SYS_HZ
(CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
include/configs/scb9328.h:#define CONFIG_SYS_HZ 3686400
 /* incrementer freq: 3.6864 MHz */
include/configs/versatile.h:#define CONFIG_SYS_HZ
(100 / 256)

Rob
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Re: [U-Boot] [PATCH 0/9] Consolidate ARM timer code

[Rob Herring]

On 09/09/2013 12:53 AM, Wolfgang Denk wrote:
 Dear Rob Herring,
 
 In message 1378671174-18535-1-git-send-email-robherri...@gmail.com you 
 wrote:
 From: Rob Herring rob.herr...@calxeda.com

 Much of the ARM timer code is re-implemented for each platform yet it
 is all pretty much the same code.

 This series introduces a common implementation of timer functions and
 simplifies the platform code down to 2 or 3 config defines. It is
 intended for platforms with 32-bit freerunning timers. I've converted
 a couple of platforms as an example, but there are many more still that
 can be converted. This probably could be extended to work with 16-bit
 timers as well.

 I've compiled all ARM boards, but only tested on highbank.
 
 Why do we need any ARM specific code at all?  What's the difference
 between an ARM and - say - a PowerPC system in this respect, and why
 do we need different code for both?
 
 If we consolidate code, it should always be done in a cross-platform
 way, unless platform specifc code really cannot be avoided (which I
 fail to see yet here).

I agree, but it appeared that at least some PPC platforms implement
timers differently using a timer interrupt. I haven't really looked at
other architectures. At least moving the code to a common spot is
trivial. Aside from the location, do you have any comments on the
implementation?

Rob
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Re: [U-Boot] [PATCH RFC] dfu: ram support

[Afzal Mohammed]

Hi Lukasz Majewski,

On Mon, Sep 09, 2013 at 08:50:58AM +0200, Lukasz Majewski wrote:

  usage: image name ram start address size
  eg. kernel ram 0x8100 0x100
  
  Downloading images to RAM using DFU is not something new, this is
  acheived in openmoko also.
  
  DFU on RAM can be used for extracting RAM contents to host using dfu
  upload. Perhaps this can be extended to io for squeezing out register
  dump through usb, if it is worth.

 Above idea sounds very interesting. 

Thanks

 One minor thing: 
 It also would be good to have dfu_alt_info environment properly defined
 to have ram alt setting for beagle bone. Then we would have at least
 one board which supports this new feature.

Sure

  +enum dfu_ram_op {
  +   DFU_OP_READ = 1,
  +   DFU_OP_WRITE,
  +};

 Minor:
 Now I've realised that the dfu_nand_op and dfu_mmc_op have the same
 defines. Maybe it is a good time to combine this and store it at
 dfu.h?

Yes it is better

 Despite one minor comment, I like the code and looking forward for a
 patch :-).

Thanks, will wait for a working day for those on other side of the
globe and if no negative, would repost addressing your comments.

Regards
Afzal
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Re: [U-Boot] [PATCH] config: consolidate CONFIG_SYS_HZ definition

[Wolfgang Denk]

Dear Rob,

In message 522de2ff.2080...@gmail.com you wrote:

 What do I do with current boards that are wrong? I should make all these

Good question...

 boards have build errors or fix them to use 1000 which may break them at
 runtime depending on their possible misuse of CONFIG_SYS_HZ?
 
 include/configs/KAREF.h:#define CONFIG_SYS_HZ 100
  /* decr freq: 1 ms ticks   */
 include/configs/M5271EVB.h:#define CONFIG_SYS_HZ
 100
 include/configs/METROBOX.h:#define CONFIG_SYS_HZ
 100/* decr freq: 1 ms ticks   */
 include/configs/MVBLUE.h:#define CONFIG_SYS_HZ   1
 include/configs/idmr.h:#define CONFIG_SYS_HZ
 (5000 / 64)
 include/configs/mini2440.h:#define CONFIG_SYS_HZ
 1562500
 include/configs/mx1ads.h:#define CONFIG_SYS_HZ  3686400
 include/configs/omap3_zoom2.h:#define CONFIG_SYS_HZ
 ((V_SCLK) / (2  CONFIG_SYS_PTV))
 include/configs/omap730p2.h:#define CONFIG_SYS_HZ
 ((CONFIG_SYS_CLK_FREQ)/(2  CONFIG_SYS_PTV))
 include/configs/rsk7203.h:#define CONFIG_SYS_HZ
 (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
 include/configs/rsk7264.h:#define CONFIG_SYS_HZ
 (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
 include/configs/rsk7269.h:#define CONFIG_SYS_HZ
 (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
 include/configs/scb9328.h:#define CONFIG_SYS_HZ 3686400
  /* incrementer freq: 3.6864 MHz */
 include/configs/versatile.h:#define CONFIG_SYS_HZ
 (100 / 256)

Hm... which of these boards are actually still being maintained?

KAREF and METROBOX are PPC systems, and the comment suggests that the
value is actually just a typo.  Here it should be harmless to change
this to use 1000 Hz instead.  Ditto probably for MVBLUE.  The rest
might actually be dead?

Guess we should have their builds break and make the board maintainers
fix them.  If they don't (because the boards are unmaintained), we
will drop the board code from the repo.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH] Subject: [PATCH v.2] at91: add support for CDU9G25 board

[Wolfgang Denk]

Dear Jiri Prchal,

In message 1378736524-30870-1-git-send-email-jiri.prc...@aksignal.cz you 
wrote:
 This patch adds support for our companies board CDU9G25 with Atmel 
 AT91SAM9G25, 128MB DDR2, 256MB NAND.

Please keep the line length of the commit message  70 characters.

 v.2
 Fixed static IP and MAC addr cofiguration by random MAC and DHCP.
 Added entry to MAINTAINERS.
 Fixed line lenght, trailing spaces and other cosmetics.

This comment does not belong into the commit message - please move it
to the comment section, i. e. below the --- line.

 --- a/MAINTAINERS
 +++ b/MAINTAINERS
 @@ -939,6 +939,9 @@ Bo Shen voice.s...@atmel.com
   at91sam9x5ekARM926EJS (AT91SAM9G15,G25,G35,X25,X35 SoC)
   sama5d3xek  ARMV7 (SAMA5D31, D33, D34, D35 SoC)
 
 +Jiri Prchal jiri.prc...@aksignal.cz
 + cdu9g25 ARM926EJS (AT91SAM9G25 SoC)
 +
  Rajeshwari Shinde rajeshwar...@samsung.com

Please keep the list sorted.


 +#define CONFIG_BOOTARGS  console=ttyS0,115200 ubi.mtd=root\
 + root=ubi0:root rootfstype=ubifs rw\
 + g_ether.dev_addr=02:04:25:aa:55:5e\
 + g_ether.host_addr=02:04:25:aa:55:5f
 +#define CONFIG_SERVERIP  10.0.1.1

We do not allow static network configuration in board config files!
Please get rid of these MAC and IP addresses here.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH v5 1/4] core support of arm64

[Scott Wood]

On Sat, 2013-09-07 at 22:56 +0800, FengHua wrote:
 Fisrt, thank scott for checking the patch.
 
  -原始邮件-
  发件人: Scott Wood scottw...@freescale.com
  发送时间: 2013年9月7日 星期六
  收件人: feng...@phytium.com.cn
  抄送: u-boot@lists.denx.de, tr...@ti.com
  主题: Re: [U-Boot] [PATCH v5 1/4] core support of arm64
  
  On Sat, 2013-08-24 at 09:06 +0800, feng...@phytium.com.cn wrote:
   From: David Feng feng...@phytium.com.cn
   
   Signed-off-by: David Feng feng...@phytium.com.cn
   ---
   Changeds for v4:
 - Replace __ARMEB__ with __AARCH64EB__ in byteorder.h and unaligned.h,
   gcc for aarch64 use __AARCH64EB__ and __AARCH64EL__ to identify 
   endian.
 - Some modification to README.armv8
   
arch/arm/config.mk  |4 +
arch/arm/cpu/armv8/Makefile |   56 ++
arch/arm/cpu/armv8/cache.S  |  145 +++
arch/arm/cpu/armv8/cache_v8.c   |  291 
   +++
arch/arm/cpu/armv8/config.mk|   31 
arch/arm/cpu/armv8/cpu.c|   68 
arch/arm/cpu/armv8/crt0.S   |  130 ++
arch/arm/cpu/armv8/exceptions.S |  182 +++
arch/arm/cpu/armv8/interrupts.c |  116 
arch/arm/cpu/armv8/relocate.S   |   71 
arch/arm/cpu/armv8/start.S  |  200 +
arch/arm/cpu/armv8/timer.c  |   95 ++
arch/arm/cpu/armv8/tlb.S|   38 
arch/arm/cpu/armv8/u-boot.lds   |   83 +
  
  Subject says arm64, files say armv8.
  
  Some of these, such as relocate.S, probably are not going to be
  armv8-specific but just arm64-specific.
  
arch/arm/include/asm/arch-armv8/armv8.h |   44 +
arch/arm/include/asm/arch-armv8/gpio.h  |   26 +++
arch/arm/include/asm/arch-armv8/mmu.h   |  117 +
arch/arm/include/asm/byteorder.h|   12 ++
arch/arm/include/asm/config.h   |   10 ++
arch/arm/include/asm/global_data.h  |6 +-
arch/arm/include/asm/io.h   |   12 +-
arch/arm/include/asm/macro.h|   26 +++
arch/arm/include/asm/posix_types.h  |   31 
arch/arm/include/asm/proc-armv/ptrace.h |   38 
arch/arm/include/asm/proc-armv/system.h |   58 +-
arch/arm/include/asm/types.h|   14 ++
arch/arm/include/asm/u-boot.h   |4 +
arch/arm/include/asm/unaligned.h|   14 ++
arch/arm/lib/Makefile   |8 +
arch/arm/lib/board.c|   18 ++
arch/arm/lib/bootm.c|   16 ++
common/image.c  |1 +
doc/README.armv8|   14 ++
examples/standalone/stubs.c |   15 ++
include/image.h |1 +
35 files changed, 1987 insertions(+), 8 deletions(-)
create mode 100644 arch/arm/cpu/armv8/Makefile
create mode 100644 arch/arm/cpu/armv8/cache.S
create mode 100644 arch/arm/cpu/armv8/cache_v8.c
create mode 100644 arch/arm/cpu/armv8/config.mk
create mode 100644 arch/arm/cpu/armv8/cpu.c
create mode 100644 arch/arm/cpu/armv8/crt0.S
create mode 100644 arch/arm/cpu/armv8/exceptions.S
create mode 100644 arch/arm/cpu/armv8/interrupts.c
create mode 100644 arch/arm/cpu/armv8/relocate.S
create mode 100644 arch/arm/cpu/armv8/start.S
create mode 100644 arch/arm/cpu/armv8/timer.c
create mode 100644 arch/arm/cpu/armv8/tlb.S
create mode 100644 arch/arm/cpu/armv8/u-boot.lds
create mode 100644 arch/arm/include/asm/arch-armv8/armv8.h
create mode 100644 arch/arm/include/asm/arch-armv8/gpio.h
create mode 100644 arch/arm/include/asm/arch-armv8/mmu.h
create mode 100644 doc/README.armv8
   
   diff --git a/arch/arm/config.mk b/arch/arm/config.mk
   index ce3903b..f1c6a7b 100644
   --- a/arch/arm/config.mk
   +++ b/arch/arm/config.mk
   @@ -74,7 +74,9 @@ endif
endif

# needed for relocation
   +ifndef CONFIG_ARMV8
LDFLAGS_u-boot += -pie
   +endif
  
  CONFIG_ARM64 (until we fix this, of course)
   
#
# FIXME: binutils versions  2.22 have a bug in the assembler where
   @@ -95,6 +97,8 @@ endif
endif

# check that only R_ARM_RELATIVE relocations are generated
   +ifndef CONFIG_ARMV8
ifneq ($(CONFIG_SPL_BUILD),y)
ALL-y+= checkarmreloc
endif
   +endif
  
  ARM64, though I've got a patch coming that will make the check work with
  arm64.
  
  Likewise elsewhere -- most if not all of the CONFIG_ARMV8 uses should be
  CONFIG_ARM64.
 
  
 Actually, the naming is so confusing. The directory's name is armv8,  
 but it only represents aarch64 here. So, whether CONFIG_ARMV8 or CONFIG_ARM64 
 should be used
 is difficult to make decision.

Files that are about 64-bit rather than armv8 should not go in the armv8
directory.  E.g. relocate should be 

Re: [U-Boot] [PATCH 0/9] Consolidate ARM timer code

[Rob Herring]

On Mon, Sep 9, 2013 at 2:13 AM, Lukasz Majewski l.majew...@samsung.com wrote:
 Hi Rob,

 From: Rob Herring rob.herr...@calxeda.com

 Much of the ARM timer code is re-implemented for each platform yet it
 is all pretty much the same code.

 This series introduces a common implementation of timer functions and
 simplifies the platform code down to 2 or 3 config defines. It is
 intended for platforms with 32-bit freerunning timers. I've converted
 a couple of platforms as an example, but there are many more still
 that can be converted. This probably could be extended to work with
 16-bit timers as well.

 I'm wondering if we could also move the Exynos related timer code
 to ./arch/arm/lib/time.c?

Most likely yes. I don't intend to sloth thru all the implementations,
so patches welcome. :)

Rob
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Re: [U-Boot] [PATCH 5/9] ARM: mx25: convert to common timer code

[Rob Herring]

On Sun, Sep 8, 2013 at 6:56 PM, Benoît Thébaudeau
benoit.thebaud...@advansee.com wrote:
 Dear Rob Herring,

 On Sunday, September 8, 2013 10:12:50 PM, Rob Herring wrote:
 From: Rob Herring rob.herr...@calxeda.com

 Convert mx25 to use the commmon timer code.

 Signed-off-by: Rob Herring rob.herr...@calxeda.com
 ---
 [...]
 diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
 index ccd3b6c..568ed6c 100644
 --- a/include/configs/mx25pdk.h
 +++ b/include/configs/mx25pdk.h
 @@ -15,6 +15,9 @@
  #define CONFIG_SYS_TEXT_BASE 0x8120
  #define CONFIG_MXC_GPIO

 +#define CONFIG_SYS_TIMER_RATE32768
 ^
 MXC_CLK32 could be used here.

The problem the circular dependency that creates. MXC_CLK32 depends on
CONFIG_MX25_CLK32. Ordering could fix this, but


 +#define CONFIG_SYS_TIMER_COUNTER (IMX_GPT1_BASE + 0x24)

 This Linux-style (base + offset) register access is against U-Boot rules. You
 could write:
 (((struct gpt_regs *)IMX_GPT1_BASE)-counter)

This may also have ordering issues. Including imx-regs.h just for the
base address doesn't work on mx27 for example.

Also, it seems like if u-boot is moving towards using kconfig, then
creating more include dependencies in the config headers is the wrong
direction.

Rob
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[U-Boot] [PATCH] wandboard: Use imx6dl-wandboard.dtb for the solo version

[Fabio Estevam]

From: Fabio Estevam fabio.este...@freescale.com

The wandboard solo version should boot the 'imx6dl-wandboard.dtb' file, since
dual-lite and solo variants are the same SoC with only the number of cores being
different.

Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
 include/configs/wandboard.h | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index 665cfc3..442a984 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -99,12 +99,10 @@
 #define CONFIG_IPUV3_CLK 26000
 #define CONFIG_IMX_HDMI
 
-#if defined(CONFIG_MX6DL)
+#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
 #define CONFIG_DEFAULT_FDT_FILEimx6dl-wandboard.dtb
 #elif defined(CONFIG_MX6Q)
 #define CONFIG_DEFAULT_FDT_FILEimx6q-wandboard.dtb
-#elif defined(CONFIG_MX6S)
-#define CONFIG_DEFAULT_FDT_FILEimx6s-wandboard.dtb
 #endif
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
-- 
1.8.1.2

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Re: [U-Boot] [PATCH 0/9] Consolidate ARM timer code

[Wolfgang Denk]

Dear Rob Herring,

In message 522de0b3.20...@gmail.com you wrote:

  If we consolidate code, it should always be done in a cross-platform
  way, unless platform specifc code really cannot be avoided (which I
  fail to see yet here).
 
 I agree, but it appeared that at least some PPC platforms implement
 timers differently using a timer interrupt. I haven't really looked at

Correct, PPC uses the decrementer with interrupts.

 other architectures. At least moving the code to a common spot is
 trivial. Aside from the location, do you have any comments on the
 implementation?

Only very cursory.

Best regards,

Wolfgang Denk

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[U-Boot] [PATCH] am335x_evm.h: If mmcdev and bootpart switch to mmcdev 1, so should mmcroot.

[Robert P. J. Day]

If, in CONFIG_BOOTCOMMAND, the environment switches both the mmcdev
and bootpart variables to refer to MMC device 1, it would make sense
that the mmcroot env variable should switch to that device as well.

Signed-off-by: Robert P. J. Day rpj...@crashcourse.ca

---

  i asked about this a while back and didn't hear any objections, so
i'll submit it as a patch. as you can see, if the first attempt to run
mmcboot fails, the environment is switched to refer to MMC device 1
(eMMC), and it would seem natural that mmcroot should follow along for
consistency. but i'm willing to be convinced otherwise.

diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 3de30fc..56a60da 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -170,6 +170,7 @@
run mmcboot; \
setenv mmcdev 1;  \
setenv bootpart 1:2;  \
+   setenv mmcroot /dev/mmcblk1p2 ro;  \
run mmcboot; \
run nandboot;

-- 


Robert P. J. Day Ottawa, Ontario, CANADA
http://crashcourse.ca

Twitter:   http://twitter.com/rpjday
LinkedIn:   http://ca.linkedin.com/in/rpjday

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Re: [U-Boot] [PATCH v4 3/4] generic board patch of manual reloc and zero gd_t

[Scott Wood]

On Fri, 2013-08-23 at 19:17 -0500, Scott Wood wrote:
 On Fri, 2013-08-23 at 18:12 -0600, Simon Glass wrote:
  Hi,
  
  On Thu, Aug 22, 2013 at 8:55 AM, FengHua feng...@phytium.com.cn wrote:
  
   On Thu, Aug 22, 2013 at 09:31:35AM +0800, FengHua wrote:
  
  
  
--
?: Scott Wood scottw...@freescale.com
: 2013???8???22??? ?
?: Simon Glass s...@chromium.org
??: FengHua feng...@phytium.com.cn, tr...@ti.com 
tr...@ti.com,
U-Boot
 Mailing List u-boot@lists.denx.de
??: Re: [U-Boot] [PATCH v4 3/4] generic board patch of manual reloc
and zero gd_t
   
On Tue, 2013-08-20 at 23:27 -0600, Simon Glass wrote:
 Hi David,

 On Tue, Aug 20, 2013 at 4:48 AM,  feng...@phytium.com.cn wrote:
  diff --git a/common/board_r.c b/common/board_r.c
  index 86ca1cb..1b4bdd2 100644
  --- a/common/board_r.c
  +++ b/common/board_r.c
  @@ -157,6 +157,13 @@ static int initr_reloc_global_data(void)
   */
  gd-env_addr += gd-relocaddr - CONFIG_SYS_MONITOR_BASE;
   #endif
  +#ifdef CONFIG_NEEDS_MANUAL_RELOC
  +   /*
  +* We have to relocate the command table manually
  +*/
  +   fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd),
  +   ll_entry_count(cmd_tbl_t, cmd));
  +#endif /* CONFIG_NEEDS_MANUAL_RELOC */

 Should this be done here or in main_loop()? How is this currently 
 done
 when not using generic board?
   
It shouldn't be done at all -- let's not revive manual relocations.
I'll try to get proper relocation working.
  
   Even the rela relocation of aarch64 works we should keep this here.
   The generic board could be used by any other platform that need manual
   relocation.
  
  No, the point is that manual relocation is legacy and new platforms
   should be using proper relocation.
  
  
  
  Of course, manual relocation is not good. But I noticed that there are
   serveral architecture use manual relocation now, maybe we should keep this
   for compatibility. Another way, I am not sure whether we can get rid of
   manual relocation on all architecture. I used manual relocation on aarch64
   because I found the initial addresses of data in rela mode are all zero
   whatever the text base is, and I don't know how to solve this problem.
  
  Possible there is a new relocation type that you need to support?
 
 Yes, it's rela instead of rel.  FengHua claimed to have run into
 problems supporting it; I'll try to debug it hopefully somewhat soon
 (though I'll be on vacation most of next week, so probably not until at
 least the week after).

It seems the problem is that when rela is used, the linker *only* puts
the symbol in the rela struct.  The value in the data section itself is
zero, which means we can't run without relocation even if the address
hasn't changed.

Unless there's some way to change this linker behavior, the options I
can think of are:

1. Write a utility to apply the relocations (for the pre-relocation
address) at build time, or

2. Use SPL.  The SPL itself would not use -pie and would not relocate.
The main U-Boot would know that it has been loaded into RAM, and apply
relocations prior to entering C code.  Interactions with SPL being used
for other purposes could be awkward.

Any preferences, or other suggestions?  I think either of these options
is preferable to CONFIG_NEEDS_MANUAL_RELOC.  I'm inclined toward option
#1 as it avoids interactions with other SPL uses and in general doesn't
change the runtime flow.

-Scott



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Re: [U-Boot] [PATCH] arm:goni:mmc: Add sd card detection and initialization.

[Jaehoon Chung]

Dear Przemyslaw,

On 09/09/2013 09:50 PM, Przemyslaw Marczak wrote:
 This change allow to use sd card on Goni the same like mmc 0.
 SD card is mmc dev 1, so it can be used like this: fatls mmc 1:2.
 SD card is inited even if eMMC initialization fails.
 
 Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
 Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
 CC: Minkyu Kang mk7.k...@samsung.com
 ---
  board/samsung/goni/goni.c |   33 +++--
  1 file changed, 31 insertions(+), 2 deletions(-)
 
 diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
 index 5b3d6ef..d63e902 100644
 --- a/board/samsung/goni/goni.c
 +++ b/board/samsung/goni/goni.c
 @@ -72,7 +72,7 @@ int checkboard(void)
  #ifdef CONFIG_GENERIC_MMC
  int board_mmc_init(bd_t *bis)
  {
 - int i;
 + int i, ret, ret_sd = 0;
  
   /* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
   s5p_gpio_direction_output(s5pc110_gpio-j2, 7, 1);
 @@ -95,7 +95,36 @@ int board_mmc_init(bd_t *bis)
   s5p_gpio_set_drv(s5pc110_gpio-g0, i, GPIO_DRV_4X);
   }
  
 - return s5p_mmc_init(0, 4);
 + ret = s5p_mmc_init(0, 4);
 + if (ret)
 + puts(MMC: Failed to init MMC:0.\n);
 +
 + /*
 +  * SD card (T_FLASH) detect and init
 +  * T_FLASH_DETECT: EINT28: GPH3[4] input mode
 +  */
 + s5p_gpio_cfg_pin(s5pc110_gpio-h3, 4, GPIO_INPUT);
 + s5p_gpio_set_pull(s5pc110_gpio-h3, 4, GPIO_PULL_UP);
 +
 + if (!s5p_gpio_get_value(s5pc110_gpio-h3, 4)) {
 + for (i = 0; i  7; i++) {
 + if (i == 2)
 + continue;
 +
 + /* GPG2[0:6] special function 2 */
 + s5p_gpio_cfg_pin(s5pc110_gpio-g2, i, 0x2);
 + /* GPG2[0:6] pull disable */
 + s5p_gpio_set_pull(s5pc110_gpio-g2, i, GPIO_PULL_NONE);
 + /* GPG2[0:6] drv 4x */
 + s5p_gpio_set_drv(s5pc110_gpio-g2, i, GPIO_DRV_4X);
 + }
 +
 + ret_sd = s5p_mmc_init(2, 4)
 + if (ret_sd)
 + puts(MMC: Failed to init SD card (MMC:2).\n);
I think you can refer to trats.c.

Best Regards,
Jaehoon Chung
 + }
 +
 + return ret | ret_sd;
  }
  #endif
  
 

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[U-Boot] [PATCH v2 1/3] dfu: unify mmc/nand read/write ops enum

[Afzal Mohammed]

MMC and NAND independently defines same enumerators for read/write.
Unify them by defining enum in dfu header. RAM support that is being
added newly also can make use of it.

Signed-off-by: Afzal Mohammed afzal.mohd...@gmail.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
---

v2: new

 drivers/dfu/dfu_mmc.c  | 9 ++---
 drivers/dfu/dfu_nand.c | 7 +--
 include/dfu.h  | 5 +
 3 files changed, 8 insertions(+), 13 deletions(-)

diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
index 0871a77..f942758 100644
--- a/drivers/dfu/dfu_mmc.c
+++ b/drivers/dfu/dfu_mmc.c
@@ -13,16 +13,11 @@
 #include div64.h
 #include dfu.h
 
-enum dfu_mmc_op {
-   DFU_OP_READ = 1,
-   DFU_OP_WRITE,
-};
-
 static unsigned char __aligned(CONFIG_SYS_CACHELINE_SIZE)
dfu_file_buf[CONFIG_SYS_DFU_MAX_FILE_SIZE];
 static long dfu_file_buf_len;
 
-static int mmc_block_op(enum dfu_mmc_op op, struct dfu_entity *dfu,
+static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu,
u64 offset, void *buf, long *len)
 {
char cmd_buf[DFU_CMD_BUF_SIZE];
@@ -65,7 +60,7 @@ static int mmc_file_buffer(struct dfu_entity *dfu, void *buf, 
long *len)
return 0;
 }
 
-static int mmc_file_op(enum dfu_mmc_op op, struct dfu_entity *dfu,
+static int mmc_file_op(enum dfu_op op, struct dfu_entity *dfu,
void *buf, long *len)
 {
char cmd_buf[DFU_CMD_BUF_SIZE];
diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c
index 0ec12cf..edbf5a9 100644
--- a/drivers/dfu/dfu_nand.c
+++ b/drivers/dfu/dfu_nand.c
@@ -19,12 +19,7 @@
 #include jffs2/load_kernel.h
 #include nand.h
 
-enum dfu_nand_op {
-   DFU_OP_READ = 1,
-   DFU_OP_WRITE,
-};
-
-static int nand_block_op(enum dfu_nand_op op, struct dfu_entity *dfu,
+static int nand_block_op(enum dfu_op op, struct dfu_entity *dfu,
u64 offset, void *buf, long *len)
 {
loff_t start, lim;
diff --git a/include/dfu.h b/include/dfu.h
index 47b9055..6115d90 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -29,6 +29,11 @@ enum dfu_layout {
DFU_FS_EXT4,
 };
 
+enum dfu_op {
+   DFU_OP_READ = 1,
+   DFU_OP_WRITE,
+};
+
 struct mmc_internal_data {
/* RAW programming */
unsigned int lba_start;
-- 
1.8.2.135.g7b592fa

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[U-Boot] [PATCH v2 2/3] dfu: ram support

[Afzal Mohammed]

DFU spec mentions it as a method to upgrade firmware (software stored
in writable non-volatile memory). It also says other potential uses of
DFU is beyond scope of the spec.

Here such a beyond the scope use is being attempted - directly pumping
binary images from host via USB to RAM. This facility is a developer
centric one in that it gives advantage over upgrading non-volatile
memory for testing new images every time during development and/or
testing.

Directly putting image onto RAM would speed up upgrade process. This and
convenience was the initial thoughts that led to doing this, speed
improvement over MMC was only 1 second though - 6 sec on RAM as opposed
to 7 sec on MMC in beagle bone, perhaps enabling cache and/or optimizing
DFU framework to avoid multiple copy for ram (if worth) may help, and
on other platforms and other boot media like NAND maybe improvement
would be higher.

And for a platform that doesn't yet have proper DFU suppport for
non-volatile media's, DFU to RAM can be used.

Another minor advantage would be to increase life of mmc/nand as it
would be less used during development/testing.

usage: image name ram start address size
eg. kernel ram 0x8100 0x100

Downloading images to RAM using DFU is not something new, this is
acheived in openmoko also.

DFU on RAM can be used for extracting RAM contents to host using dfu
upload. Perhaps this can be extended to io for squeezing out register
dump through usb, if it is worth.

Signed-off-by: Afzal Mohammed afzal.mohd...@gmail.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
---

v2: remove read/write enumerator define's, instead use new common ones

 drivers/dfu/Makefile  |  1 +
 drivers/dfu/dfu.c |  7 +++--
 drivers/dfu/dfu_ram.c | 77 +++
 include/dfu.h | 18 
 4 files changed, 101 insertions(+), 2 deletions(-)
 create mode 100644 drivers/dfu/dfu_ram.c

diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile
index fca370a..de9e44e 100644
--- a/drivers/dfu/Makefile
+++ b/drivers/dfu/Makefile
@@ -12,6 +12,7 @@ LIB   = $(obj)libdfu.o
 COBJS-$(CONFIG_DFU_FUNCTION) += dfu.o
 COBJS-$(CONFIG_DFU_MMC) += dfu_mmc.o
 COBJS-$(CONFIG_DFU_NAND) += dfu_nand.o
+COBJS-$(CONFIG_DFU_RAM) += dfu_ram.o
 
 SRCS:= $(COBJS-y:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS-y))
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index d73d510..7b3d05d 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -325,6 +325,9 @@ static int dfu_fill_entity(struct dfu_entity *dfu, char *s, 
int alt,
} else if (strcmp(interface, nand) == 0) {
if (dfu_fill_entity_nand(dfu, s))
return -1;
+   } else if (strcmp(interface, ram) == 0) {
+   if (dfu_fill_entity_ram(dfu, s))
+   return -1;
} else {
printf(%s: Device %s not (yet) supported!\n,
   __func__,  interface);
@@ -374,14 +377,14 @@ int dfu_config_entities(char *env, char *interface, int 
num)
 
 const char *dfu_get_dev_type(enum dfu_device_type t)
 {
-   const char *dev_t[] = {NULL, eMMC, OneNAND, NAND };
+   const char *dev_t[] = {NULL, eMMC, OneNAND, NAND, RAM };
return dev_t[t];
 }
 
 const char *dfu_get_layout(enum dfu_layout l)
 {
const char *dfu_layout[] = {NULL, RAW_ADDR, FAT, EXT2,
-  EXT3, EXT4 };
+  EXT3, EXT4, RAM_ADDR };
return dfu_layout[l];
 }
 
diff --git a/drivers/dfu/dfu_ram.c b/drivers/dfu/dfu_ram.c
new file mode 100644
index 000..a603bfb
--- /dev/null
+++ b/drivers/dfu/dfu_ram.c
@@ -0,0 +1,77 @@
+/*
+ * (C) Copyright 2013
+ * Afzal Mohammed afzal.mohd...@gmail.com
+ *
+ * Reference: dfu_mmc.c
+ * Copyright (C) 2012 Samsung Electronics
+ * author: Lukasz Majewski l.majew...@samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include malloc.h
+#include errno.h
+#include dfu.h
+
+static int dfu_transfer_medium_ram(enum dfu_op op, struct dfu_entity *dfu,
+  u64 offset, void *buf, long *len)
+{
+   if (dfu-layout != DFU_RAM_ADDR) {
+   printf(%s: unsupported layout :%s\n, __func__,
+  dfu_get_layout(dfu-layout));
+   return  -EINVAL;
+   }
+
+   if (offset  dfu-data.ram.size) {
+   printf(%s: request exceeds allowed area\n, __func__);
+   return -EINVAL;
+   }
+
+   if (op == DFU_OP_WRITE)
+   memcpy(dfu-data.ram.start + offset, buf, *len);
+   else
+   memcpy(buf, dfu-data.ram.start + offset, *len);
+
+   return 0;
+}
+
+static int dfu_write_medium_ram(struct dfu_entity *dfu, u64 offset,
+   void *buf, long *len)
+{
+   return dfu_transfer_medium_ram(DFU_OP_WRITE, dfu, offset, buf, len);
+}
+
+static int 

[U-Boot] [PATCH v2 3/3] am335x_evm: enable DFU RAM

[Afzal Mohammed]

Enable DFU for RAM, provide example dfu_alt_info

Signed-off-by: Afzal Mohammed afzal.mohd...@gmail.com
Cc: Tom Rini tr...@ti.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
---

v2: new

 include/configs/am335x_evm.h | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 7969e07..0449a1f 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -100,6 +100,7 @@
loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0 \
importbootenv=echo Importing environment from mmc ...;  \
env import -t $loadaddr $filesize\0 \
+   dfu_alt_info_ram= DFU_ALT_INFO_RAM \0 \
ramargs=setenv bootargs console=${console}  \
${optargs}  \
root=${ramroot}  \
@@ -210,6 +211,11 @@
kernel part 0 8; \
rootfs part 0 9
 #endif
+#define CONFIG_DFU_RAM
+#define DFU_ALT_INFO_RAM \
+   kernel ram 0x8020 0xD8; \
+   fdt ram 0x80F8 0x8; \
+   ramdisk ram 0x8100 0x400
 
 /* NS16550 Configuration */
 #define CONFIG_SYS_NS16550_COM10x44e09000  /* Base EVM has 
UART0 */
-- 
1.8.2.135.g7b592fa

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[U-Boot] u-boot build error in current git tree

[Axel Lin]

Hit below build errors (on ARM platforms):

axel@phoenix:~/repos/git/u-boot$ make mx31pdk
Configuring for mx31pdk board...
make
make[1]: Entering directory `/home/axel/repos/git/u-boot'
Generating include/autoconf.mk
Generating include/autoconf.mk.dep
make[1]: Leaving directory `/home/axel/repos/git/u-boot'
make[1]: Entering directory `/home/axel/repos/git/u-boot'
Generating include/spl-autoconf.mk
Generating include/tpl-autoconf.mk
arm-unknown-linux-gnueabi-gcc -DDO_DEPS_ONLY \
-g  -Os   -ffunction-sections -fdata-sections -fno-common 
-ffixed-r8 -msoft-float  -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x87e0 
-I/home/axel/repos/git/u-boot/include -fno-builtin -ffreestanding -nostdinc 
-isystem 
/opt/arm/gcc-4.6.3-nolibc/arm-unknown-linux-gnueabi/bin/../lib/gcc/arm-unknown-linux-gnueabi/4.6.3/include
 -pipe  -DCONFIG_ARM -D__ARM__ -marm -mno-thumb-interwork -mabi=aapcs-linux 
-march=armv5 -Wall -Wstrict-prototypes -fno-stack-protector 
-Wno-format-nonliteral -Wno-format-security -fstack-usage   \
-o lib/asm-offsets.s lib/asm-offsets.c -c -S
Generating include/generated/generic-asm-offsets.h
tools/scripts/make-asm-offsets lib/asm-offsets.s 
include/generated/generic-asm-offsets.h
if [ -f arch/arm/cpu/arm1136/mx31/asm-offsets.c ];then \
arm-unknown-linux-gnueabi-gcc -DDO_DEPS_ONLY \
-g  -Os   -ffunction-sections -fdata-sections -fno-common 
-ffixed-r8 -msoft-float  -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x87e0 
-I/home/axel/repos/git/u-boot/include -fno-builtin -ffreestanding -nostdinc 
-isystem 
/opt/arm/gcc-4.6.3-nolibc/arm-unknown-linux-gnueabi/bin/../lib/gcc/arm-unknown-linux-gnueabi/4.6.3/include
 -pipe  -DCONFIG_ARM -D__ARM__ -marm -mno-thumb-interwork -mabi=aapcs-linux 
-march=armv5 -Wall -Wstrict-prototypes -fno-stack-protector 
-Wno-format-nonliteral -Wno-format-security -fstack-usage   \
-o arch/arm/cpu/arm1136/mx31/asm-offsets.s 
arch/arm/cpu/arm1136/mx31/asm-offsets.c -c -S; \
else \
touch arch/arm/cpu/arm1136/mx31/asm-offsets.s; \
fi
Generating include/generated/asm-offsets.h
tools/scripts/make-asm-offsets arch/arm/cpu/arm1136/mx31/asm-offsets.s 
include/generated/asm-offsets.h
for dir in tools examples/standalone examples/api arch/arm/cpu/arm1136  ; do \
make -C $dir _depend ; done
make[2]: Entering directory `/home/axel/repos/git/u-boot/tools'
make[2]: Nothing to be done for `_depend'.
make[2]: Leaving directory `/home/axel/repos/git/u-boot/tools'
make[2]: Entering directory `/home/axel/repos/git/u-boot/examples/standalone'
make[2]: Nothing to be done for `_depend'.
make[2]: Leaving directory `/home/axel/repos/git/u-boot/examples/standalone'
make[2]: Entering directory `/home/axel/repos/git/u-boot/examples/api'
make[2]: Nothing to be done for `_depend'.
make[2]: Leaving directory `/home/axel/repos/git/u-boot/examples/api'
make[2]: Entering directory `/home/axel/repos/git/u-boot/arch/arm/cpu/arm1136'
make[2]: Nothing to be done for `_depend'.
make[2]: Leaving directory `/home/axel/repos/git/u-boot/arch/arm/cpu/arm1136'
make -C tools all
make[2]: Entering directory `/home/axel/repos/git/u-boot/tools'
make[2]: *** No rule to make target 
`/home/axel/repos/git/u-boot/include/asm/arch/cpu.h', needed by 
`env_embedded.o'.  Stop.
make[2]: Leaving directory `/home/axel/repos/git/u-boot/tools'
make[1]: *** [tools] Error 2
make[1]: Leaving directory `/home/axel/repos/git/u-boot'
make: *** [mx31pdk] Error 2

And also hit build error for make omap3_beagle:

$ make omap3_beagle
Configuring for omap3_beagle board...
make
make[1]: Entering directory `/home/axel/repos/git/u-boot'
Generating include/autoconf.mk
Generating include/autoconf.mk.dep
make[1]: Leaving directory `/home/axel/repos/git/u-boot'
make[1]: Entering directory `/home/axel/repos/git/u-boot'
Generating include/spl-autoconf.mk
Generating include/tpl-autoconf.mk
arm-unknown-linux-gnueabi-gcc -DDO_DEPS_ONLY \
-g  -Os   -ffunction-sections -fdata-sections -fno-common 
-ffixed-r8 -msoft-float  -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x8010 
-I/home/axel/repos/git/u-boot/include -fno-builtin -ffreestanding -nostdinc 
-isystem 
/opt/arm/gcc-4.6.3-nolibc/arm-unknown-linux-gnueabi/bin/../lib/gcc/arm-unknown-linux-gnueabi/4.6.3/include
 -pipe  -DCONFIG_ARM -D__ARM__ -marm -mno-thumb-interwork -mabi=aapcs-linux 
-march=armv7-a -Wall -Wstrict-prototypes -fno-stack-protector 
-Wno-format-nonliteral -Wno-format-security -fstack-usage   \
-o lib/asm-offsets.s lib/asm-offsets.c -c -S
Generating include/generated/generic-asm-offsets.h
tools/scripts/make-asm-offsets lib/asm-offsets.s 
include/generated/generic-asm-offsets.h
if [ -f arch/arm/cpu/armv7/omap3/asm-offsets.c ];then \
arm-unknown-linux-gnueabi-gcc -DDO_DEPS_ONLY \
-g  -Os   -ffunction-sections -fdata-sections -fno-common 
-ffixed-r8 -msoft-float  -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x8010 

Re: [U-Boot] P2041RDB fails to boot with master (and 2013.10-rc1)

[sun york-R58495]

Chris,

Thanks a lot to bring this to our attention.

A brief look at the log shows the SPD wasn't found, probably due to recent I2C 
change. We will address this issue as soon as possible.

York

 Original Message 
From: Chris Packham
Sent: Mon, 09/09/2013 22:26
To: u-boot
CC: sun york-R58495 ; Xie Shaohui-B21989 ; aflem...@freescale.com
Subject: P2041RDB fails to boot with master (and 2013.10-rc1)


Hi,

I was just looking at something else and found that my P2041RDB no
longer boots from the master branch of u-boot.git (it hangs after DDR
initialisation). I checked 2013.10-rc1, same problem. 2013.07 works.

I haven't bisected further than that. I just thought I'd fire this off
now since it appears to be a regression that might affect 2013.10.

Thanks,
Chris

--

Output from 2013.10-rc1

U-Boot 2013.10-rc1 (Sep 10 2013 - 17:08:26)

CPU0:  P2041E, Version: 1.0, (0x82180110)
Core:  e500mc, Version: 2.2, (0x80230022)
Clock Configuration:
   CPU0:1500 MHz, CPU1:1500 MHz, CPU2:1500 MHz, CPU3:1500 MHz,
   CCB:750  MHz,
   DDR:666.667 MHz (1333.333 MT/s data rate) (Asynchronous), LBC:93.750 MHz
   FMAN1: 583.333 MHz
   QMAN:  375 MHz
   PME:   375 MHz
L1:D-cache 32 kB enabled
   I-cache 32 kB enabled
Reset Configuration Word (RCW):
   : 1260  241c 
   0010: 249f40c0 c3c02000 fe80 4000
   0020:    d0030f07
   0030:    
Board: P2041RDB, CPLD version: 3.0 vBank: 0
SERDES Reference Clocks: Bank1=100Mhz Bank2=125Mhz
I2C:   ready
SPI:   ready
DRAM:  InitializingWARNING: Calling __hwconfig without a buffer
and before environment is ready
using SPD
DDR: failed to read SPD from address 82
WARNING: Calling __hwconfig without a buffer and before environment is ready
WARNING: Calling __hwconfig without a buffer and before environment is ready
16 MiB (DDR2, 64-bit, CL=0.5, ECC off)
Testing 0x - 0x00ff
Remap DDR

Output from 2013.07


U-Boot 2013.07 (Sep 10 2013 - 17:00:18)

CPU0:  P2041E, Version: 1.0, (0x82180110)
Core:  e500mc, Version: 2.2, (0x80230022)
Clock Configuration:
   CPU0:1500 MHz, CPU1:1500 MHz, CPU2:1500 MHz, CPU3:1500 MHz,
   CCB:750  MHz,
   DDR:666.667 MHz (1333.333 MT/s data rate) (Asynchronous), LBC:93.750 MHz
   FMAN1: 583.333 MHz
   QMAN:  375 MHz
   PME:   375 MHz
L1:D-cache 32 kB enabled
   I-cache 32 kB enabled
Board: P2041RDB, CPLD version: 3.0 vBank: 0
Reset Configuration Word (RCW):
   : 1260  241c 
   0010: 249f40c0 c3c02000 fe80 4000
   0020:    d0030f07
   0030:    
SERDES Reference Clocks: Bank1=100Mhz Bank2=125Mhz
I2C:   ready
SPI:   ready
DRAM:  Initializingusing SPD
Detected UDIMM UG51U6400N8SU-ACF
2 GiB left unmapped
4 GiB (DDR3, 64-bit, CL=9, ECC off)
   DDR Chip-Select Interleaving Mode: CS0+CS1
Testing 0x - 0x7fff
Testing 0x8000 - 0x
Remap DDR 2 GiB left unmapped

POST memory PASSED
Flash: 128 MiB
L2:128 KB enabled
Corenet Platform Cache: 1024 KB enabled
SERDES: bank 3 disabled
SRIO1: disabled
SRIO2: disabled
NAND:  0 MiB
MMC:  FSL_SDHC: 0
EEPROM: Invalid ID (ff ff ff ff)
PCIe1: disabled
PCIe2: Root Complex, no link, regs @ 0xfe201000
PCIe2: Bus 00 - 00
PCIe3: disabled
In:serial
Out:   serial
Err:   serial
Net:   Initializing Fman
Fman1: DTSEC3 set to unknown interface 12
Fman1: Uploading microcode version 101.8.0
Phy not found
PHY reset timed out
FM1@DTSEC1, FM1@DTSEC2, FM1@DTSEC4, FM1@DTSEC5, FM1@TGEC1
=

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Re: [U-Boot] P2041RDB fails to boot with master (and 2013.10-rc1)

[Chris Packham]

git bisect points to the following commit

00f792e0df9ae942427e44595a0f4379582accee is the first bad commit
commit 00f792e0df9ae942427e44595a0f4379582accee
Author: Heiko Schocher h...@denx.de
Date:   Wed Oct 24 13:48:22 2012 +0200

i2c, fsl_i2c: switch to new multibus/multiadapter support

- added to fsl_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver

Signed-off-by: Heiko Schocher h...@denx.de
Cc: Simon Glass s...@chromium.org
Cc: Stephen Warren swar...@wwwdotorg.org

On Tue, Sep 10, 2013 at 5:31 PM, sun york-R58495 r58...@freescale.com wrote:
 Chris,

 Thanks a lot to bring this to our attention.

 A brief look at the log shows the SPD wasn't found, probably due to recent
 I2C change. We will address this issue as soon as possible.

 York



  Original Message 
 From: Chris Packham
 Sent: Mon, 09/09/2013 22:26
 To: u-boot
 CC: sun york-R58495 ; Xie Shaohui-B21989 ; aflem...@freescale.com
 Subject: P2041RDB fails to boot with master (and 2013.10-rc1)

 Hi,

 I was just looking at something else and found that my P2041RDB no
 longer boots from the master branch of u-boot.git (it hangs after DDR
 initialisation). I checked 2013.10-rc1, same problem. 2013.07 works.

 I haven't bisected further than that. I just thought I'd fire this off
 now since it appears to be a regression that might affect 2013.10.

 Thanks,
 Chris

 --

 Output from 2013.10-rc1

 U-Boot 2013.10-rc1 (Sep 10 2013 - 17:08:26)

 CPU0:  P2041E, Version: 1.0, (0x82180110)
 Core:  e500mc, Version: 2.2, (0x80230022)
 Clock Configuration:
CPU0:1500 MHz, CPU1:1500 MHz, CPU2:1500 MHz, CPU3:1500 MHz,
CCB:750  MHz,
DDR:666.667 MHz (1333.333 MT/s data rate) (Asynchronous), LBC:93.750
 MHz
FMAN1: 583.333 MHz
QMAN:  375 MHz
PME:   375 MHz
 L1:D-cache 32 kB enabled
I-cache 32 kB enabled
 Reset Configuration Word (RCW):
: 1260  241c 
0010: 249f40c0 c3c02000 fe80 4000
0020:    d0030f07
0030:    
 Board: P2041RDB, CPLD version: 3.0 vBank: 0
 SERDES Reference Clocks: Bank1=100Mhz Bank2=125Mhz
 I2C:   ready
 SPI:   ready
 DRAM:  InitializingWARNING: Calling __hwconfig without a buffer
 and before environment is ready
 using SPD
 DDR: failed to read SPD from address 82
 WARNING: Calling __hwconfig without a buffer and before environment is ready
 WARNING: Calling __hwconfig without a buffer and before environment is ready
 16 MiB (DDR2, 64-bit, CL=0.5, ECC off)
 Testing 0x - 0x00ff
 Remap DDR

 Output from 2013.07


 U-Boot 2013.07 (Sep 10 2013 - 17:00:18)

 CPU0:  P2041E, Version: 1.0, (0x82180110)
 Core:  e500mc, Version: 2.2, (0x80230022)
 Clock Configuration:
CPU0:1500 MHz, CPU1:1500 MHz, CPU2:1500 MHz, CPU3:1500 MHz,
CCB:750  MHz,
DDR:666.667 MHz (1333.333 MT/s data rate) (Asynchronous), LBC:93.750
 MHz
FMAN1: 583.333 MHz
QMAN:  375 MHz
PME:   375 MHz
 L1:D-cache 32 kB enabled
I-cache 32 kB enabled
 Board: P2041RDB, CPLD version: 3.0 vBank: 0
 Reset Configuration Word (RCW):
: 1260  241c 
0010: 249f40c0 c3c02000 fe80 4000
0020:    d0030f07
0030:    
 SERDES Reference Clocks: Bank1=100Mhz Bank2=125Mhz
 I2C:   ready
 SPI:   ready
 DRAM:  Initializingusing SPD
 Detected UDIMM UG51U6400N8SU-ACF
 2 GiB left unmapped
 4 GiB (DDR3, 64-bit, CL=9, ECC off)
DDR Chip-Select Interleaving Mode: CS0+CS1
 Testing 0x - 0x7fff
 Testing 0x8000 - 0x
 Remap DDR 2 GiB left unmapped

 POST memory PASSED
 Flash: 128 MiB
 L2:128 KB enabled
 Corenet Platform Cache: 1024 KB enabled
 SERDES: bank 3 disabled
 SRIO1: disabled
 SRIO2: disabled
 NAND:  0 MiB
 MMC:  FSL_SDHC: 0
 EEPROM: Invalid ID (ff ff ff ff)
 PCIe1: disabled
 PCIe2: Root Complex, no link, regs @ 0xfe201000
 PCIe2: Bus 00 - 00
 PCIe3: disabled
 In:serial
 Out:   serial
 Err:   serial
 Net:   Initializing Fman
 Fman1: DTSEC3 set to unknown interface 12
 Fman1: Uploading microcode version 101.8.0
 Phy not found
 PHY reset timed out
 FM1@DTSEC1, FM1@DTSEC2, FM1@DTSEC4, FM1@DTSEC5, FM1@TGEC1
 =

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[U-Boot] P2041RDB fails to boot with master (and 2013.10-rc1)

[Chris Packham]

Hi,

I was just looking at something else and found that my P2041RDB no
longer boots from the master branch of u-boot.git (it hangs after DDR
initialisation). I checked 2013.10-rc1, same problem. 2013.07 works.

I haven't bisected further than that. I just thought I'd fire this off
now since it appears to be a regression that might affect 2013.10.

Thanks,
Chris

--

Output from 2013.10-rc1

U-Boot 2013.10-rc1 (Sep 10 2013 - 17:08:26)

CPU0:  P2041E, Version: 1.0, (0x82180110)
Core:  e500mc, Version: 2.2, (0x80230022)
Clock Configuration:
   CPU0:1500 MHz, CPU1:1500 MHz, CPU2:1500 MHz, CPU3:1500 MHz,
   CCB:750  MHz,
   DDR:666.667 MHz (1333.333 MT/s data rate) (Asynchronous), LBC:93.750 MHz
   FMAN1: 583.333 MHz
   QMAN:  375 MHz
   PME:   375 MHz
L1:D-cache 32 kB enabled
   I-cache 32 kB enabled
Reset Configuration Word (RCW):
   : 1260  241c 
   0010: 249f40c0 c3c02000 fe80 4000
   0020:    d0030f07
   0030:    
Board: P2041RDB, CPLD version: 3.0 vBank: 0
SERDES Reference Clocks: Bank1=100Mhz Bank2=125Mhz
I2C:   ready
SPI:   ready
DRAM:  InitializingWARNING: Calling __hwconfig without a buffer
and before environment is ready
using SPD
DDR: failed to read SPD from address 82
WARNING: Calling __hwconfig without a buffer and before environment is ready
WARNING: Calling __hwconfig without a buffer and before environment is ready
16 MiB (DDR2, 64-bit, CL=0.5, ECC off)
Testing 0x - 0x00ff
Remap DDR

Output from 2013.07


U-Boot 2013.07 (Sep 10 2013 - 17:00:18)

CPU0:  P2041E, Version: 1.0, (0x82180110)
Core:  e500mc, Version: 2.2, (0x80230022)
Clock Configuration:
   CPU0:1500 MHz, CPU1:1500 MHz, CPU2:1500 MHz, CPU3:1500 MHz,
   CCB:750  MHz,
   DDR:666.667 MHz (1333.333 MT/s data rate) (Asynchronous), LBC:93.750 MHz
   FMAN1: 583.333 MHz
   QMAN:  375 MHz
   PME:   375 MHz
L1:D-cache 32 kB enabled
   I-cache 32 kB enabled
Board: P2041RDB, CPLD version: 3.0 vBank: 0
Reset Configuration Word (RCW):
   : 1260  241c 
   0010: 249f40c0 c3c02000 fe80 4000
   0020:    d0030f07
   0030:    
SERDES Reference Clocks: Bank1=100Mhz Bank2=125Mhz
I2C:   ready
SPI:   ready
DRAM:  Initializingusing SPD
Detected UDIMM UG51U6400N8SU-ACF
2 GiB left unmapped
4 GiB (DDR3, 64-bit, CL=9, ECC off)
   DDR Chip-Select Interleaving Mode: CS0+CS1
Testing 0x - 0x7fff
Testing 0x8000 - 0x
Remap DDR 2 GiB left unmapped

POST memory PASSED
Flash: 128 MiB
L2:128 KB enabled
Corenet Platform Cache: 1024 KB enabled
SERDES: bank 3 disabled
SRIO1: disabled
SRIO2: disabled
NAND:  0 MiB
MMC:  FSL_SDHC: 0
EEPROM: Invalid ID (ff ff ff ff)
PCIe1: disabled
PCIe2: Root Complex, no link, regs @ 0xfe201000
PCIe2: Bus 00 - 00
PCIe3: disabled
In:serial
Out:   serial
Err:   serial
Net:   Initializing Fman
Fman1: DTSEC3 set to unknown interface 12
Fman1: Uploading microcode version 101.8.0
Phy not found
PHY reset timed out
FM1@DTSEC1, FM1@DTSEC2, FM1@DTSEC4, FM1@DTSEC5, FM1@TGEC1
=
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Re: [U-Boot] P2041RDB fails to boot with master (and 2013.10-rc1)

[sun york-R58495]

Chris,

Thanks for the debugging work. As I suspected, it's related to I2C change. It's 
probably a problem in the board header file. If you fix it, please submit a 
patch. Otherwise, I will look into it tomorrow.

York

 Original Message 
From: Chris Packham
Sent: Mon, 09/09/2013 22:49
To: sun york-R58495
CC: u-boot ; Xie Shaohui-B21989 ; h...@denx.de
Subject: Re: P2041RDB fails to boot with master (and 2013.10-rc1)


git bisect points to the following commit

00f792e0df9ae942427e44595a0f4379582accee is the first bad commit
commit 00f792e0df9ae942427e44595a0f4379582accee
Author: Heiko Schocher h...@denx.de
Date:   Wed Oct 24 13:48:22 2012 +0200

i2c, fsl_i2c: switch to new multibus/multiadapter support

- added to fsl_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver

Signed-off-by: Heiko Schocher h...@denx.de
Cc: Simon Glass s...@chromium.org
Cc: Stephen Warren swar...@wwwdotorg.org

On Tue, Sep 10, 2013 at 5:31 PM, sun york-R58495 r58...@freescale.com wrote:
 Chris,

 Thanks a lot to bring this to our attention.

 A brief look at the log shows the SPD wasn't found, probably due to recent
 I2C change. We will address this issue as soon as possible.

 York



  Original Message 
 From: Chris Packham
 Sent: Mon, 09/09/2013 22:26
 To: u-boot
 CC: sun york-R58495 ; Xie Shaohui-B21989 ; aflem...@freescale.com
 Subject: P2041RDB fails to boot with master (and 2013.10-rc1)

 Hi,

 I was just looking at something else and found that my P2041RDB no
 longer boots from the master branch of u-boot.git (it hangs after DDR
 initialisation). I checked 2013.10-rc1, same problem. 2013.07 works.

 I haven't bisected further than that. I just thought I'd fire this off
 now since it appears to be a regression that might affect 2013.10.

 Thanks,
 Chris

 --

 Output from 2013.10-rc1

 U-Boot 2013.10-rc1 (Sep 10 2013 - 17:08:26)

 CPU0:  P2041E, Version: 1.0, (0x82180110)
 Core:  e500mc, Version: 2.2, (0x80230022)
 Clock Configuration:
CPU0:1500 MHz, CPU1:1500 MHz, CPU2:1500 MHz, CPU3:1500 MHz,
CCB:750  MHz,
DDR:666.667 MHz (1333.333 MT/s data rate) (Asynchronous), LBC:93.750
 MHz
FMAN1: 583.333 MHz
QMAN:  375 MHz
PME:   375 MHz
 L1:D-cache 32 kB enabled
I-cache 32 kB enabled
 Reset Configuration Word (RCW):
: 1260  241c 
0010: 249f40c0 c3c02000 fe80 4000
0020:    d0030f07
0030:    
 Board: P2041RDB, CPLD version: 3.0 vBank: 0
 SERDES Reference Clocks: Bank1=100Mhz Bank2=125Mhz
 I2C:   ready
 SPI:   ready
 DRAM:  InitializingWARNING: Calling __hwconfig without a buffer
 and before environment is ready
 using SPD
 DDR: failed to read SPD from address 82
 WARNING: Calling __hwconfig without a buffer and before environment is ready
 WARNING: Calling __hwconfig without a buffer and before environment is ready
 16 MiB (DDR2, 64-bit, CL=0.5, ECC off)
 Testing 0x - 0x00ff
 Remap DDR

 Output from 2013.07


 U-Boot 2013.07 (Sep 10 2013 - 17:00:18)

 CPU0:  P2041E, Version: 1.0, (0x82180110)
 Core:  e500mc, Version: 2.2, (0x80230022)
 Clock Configuration:
CPU0:1500 MHz, CPU1:1500 MHz, CPU2:1500 MHz, CPU3:1500 MHz,
CCB:750  MHz,
DDR:666.667 MHz (1333.333 MT/s data rate) (Asynchronous), LBC:93.750
 MHz
FMAN1: 583.333 MHz
QMAN:  375 MHz
PME:   375 MHz
 L1:D-cache 32 kB enabled
I-cache 32 kB enabled
 Board: P2041RDB, CPLD version: 3.0 vBank: 0
 Reset Configuration Word (RCW):
: 1260  241c 
0010: 249f40c0 c3c02000 fe80 4000
0020:    d0030f07
0030:    
 SERDES Reference Clocks: Bank1=100Mhz Bank2=125Mhz
 I2C:   ready
 SPI:   ready
 DRAM:  Initializingusing SPD
 Detected UDIMM UG51U6400N8SU-ACF
 2 GiB left unmapped
 4 GiB (DDR3, 64-bit, CL=9, ECC off)
DDR Chip-Select Interleaving Mode: CS0+CS1
 Testing 0x - 0x7fff
 Testing 0x8000 - 0x
 Remap DDR 2 GiB left unmapped

 POST memory PASSED
 Flash: 128 MiB
 L2:128 KB enabled
 Corenet Platform Cache: 1024 KB enabled
 SERDES: bank 3 disabled
 SRIO1: disabled
 SRIO2: disabled
 NAND:  0 MiB
 MMC:  FSL_SDHC: 0
 EEPROM: Invalid ID (ff ff ff ff)
 PCIe1: disabled
 PCIe2: Root Complex, no link, regs @ 0xfe201000
 PCIe2: Bus 00 - 00
 PCIe3: disabled
 In:serial
 Out:   serial
 Err:   serial
 Net:   Initializing Fman
 Fman1: DTSEC3 set to unknown interface 12
 Fman1: Uploading microcode version 101.8.0
 Phy not found
 PHY reset timed out
 FM1@DTSEC1, FM1@DTSEC2, FM1@DTSEC4, FM1@DTSEC5, FM1@TGEC1
 =


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[U-Boot] actux2 build error due to commit 4412db46

[Axel Lin]

Hi Jack,
I hit below build error, revert commit 4412db464
standalone-examples: support custom GCC lib fixes the build error.

$ ./MAKEALL actux2
Configuring for actux2 board...
make[1]: *** [hello_world] Error 1
make: *** [examples/standalone] Error 2
   textdata bss dec hex filename
 2262354912  543728  774875   bd2db ./u-boot
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function `__aeabi_llsl':
/home/axel/repos/git/u-boot/arch/arm/lib/_ashldi3.S:20: multiple definition of 
`__ashldi3'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/_ashldi3.S:20:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function `__lshrdi3':
/home/axel/repos/git/u-boot/arch/arm/lib/_lshrdi3.S:20: multiple definition of 
`__aeabi_llsr'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/_lshrdi3.S:20:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function `__aeabi_uidiv':
/home/axel/repos/git/u-boot/arch/arm/lib/_udivsi3.S:20: multiple definition of 
`__udivsi3'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/_udivsi3.S:20:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function `__lshrdi3':
/home/axel/repos/git/u-boot/arch/arm/lib/_lshrdi3.S:20: multiple definition of 
`__lshrdi3'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/_lshrdi3.S:20:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function `__umodsi3':
/home/axel/repos/git/u-boot/arch/arm/lib/_umodsi3.S:18: multiple definition of 
`__umodsi3'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/_umodsi3.S:18:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function `__divsi3':
/home/axel/repos/git/u-boot/arch/arm/lib/_divsi3.S:83: multiple definition of 
`__aeabi_idiv'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/_divsi3.S:83:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function `__aeabi_lasr':
/home/axel/repos/git/u-boot/arch/arm/lib/_ashrdi3.S:20: multiple definition of 
`__ashrdi3'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/_ashrdi3.S:20:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function `__aeabi_lasr':
/home/axel/repos/git/u-boot/arch/arm/lib/_ashrdi3.S:20: multiple definition of 
`__aeabi_lasr'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/_ashrdi3.S:20:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function `__div0':
/home/axel/repos/git/u-boot/arch/arm/lib/div0.c:13: multiple definition of 
`__div0'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/div0.c:13:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function `__aeabi_uidiv':
/home/axel/repos/git/u-boot/arch/arm/lib/_udivsi3.S:20: multiple definition of 
`__aeabi_uidiv'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/_udivsi3.S:20:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function `__divsi3':
/home/axel/repos/git/u-boot/arch/arm/lib/_divsi3.S:83: multiple definition of 
`__divsi3'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/_divsi3.S:83:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function `__aeabi_llsl':
/home/axel/repos/git/u-boot/arch/arm/lib/_ashldi3.S:20: multiple definition of 
`__aeabi_llsl'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/_ashldi3.S:20:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function 
`__aeabi_uidivmod':
/home/axel/repos/git/u-boot/arch/arm/lib/_udivsi3.S:78: multiple definition of 
`__aeabi_uidivmod'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/_udivsi3.S:78:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function `__modsi3':
/home/axel/repos/git/u-boot/arch/arm/lib/_modsi3.S:66: multiple definition of 
`__modsi3'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/_modsi3.S:66:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function 
`__aeabi_idivmod':
/home/axel/repos/git/u-boot/arch/arm/lib/_udivsi3.S:88: multiple definition of 
`__aeabi_idivmod'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o:/home/axel/repos/git/u-boot/arch/arm/lib/_udivsi3.S:88:
 first defined here
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function `__div0':
div0.c:(.text.__div0+0x0): undefined reference to `hang'
/home/axel/repos/git/u-boot/arch/arm/lib/libgcc.o: In function