Re: [U-Boot] [PATCH] mx6: Add IOMUX_CONFIG_SION flag to all GPIO pins
Hi Benoit, Eric, Otavio, On 01/10/2013 21:50, Benoît Thébaudeau wrote: You probably wouldn't just set SION on all pins, right? I suspect that there'd be some ramification in terms of power consumption if nothing else. Right. Well, instead of adding SION to the pin definition header files, then we could just add SION where needed on a per-pin basis, e.g.: --- imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D1__GPIO_2_1 | IOMUX_CONFIG_SION MUX_MODE_SHIFT); --- A helper macro could be defined in arch/arm/include/asm/imx-common/iomux-v3.h in order to simplify the writing, e.g.: --- #define MUX_MODE_SION (IOMUX_CONFIG_SION MUX_MODE_SHIFT) --- imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D1__GPIO_2_1 | MUX_MODE_SION); --- On the Linux side of things, the CONFIG field in the pinctrl DT bindings already provides bit 30 for SION. Hence, using MUX_MODE_SION like above would be close to Linux's pin config. Agree, this is a better solution for the issue, and it is easier to be tracked as setting SION for all pins. Best regards, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-boot] SPL: Reading large files with file_fat_read()
When enabling debug mode I get the following error: dlmalloc.c:2084: malloc_extend_top: Assertion `((unsigned long)((char*)top + top_size) (pagesz - 1)) == 0' failed. Best regards, -b ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-ti/master
Hi Tom, On Sat, 21 Sep 2013 08:06:13 -0400, Tom Rini tr...@ti.com wrote: Hey, The following changes since commit 82cecfce3fd33e151ed8bc382ae31b19535765c5: drivers: s3c44b0_rtc: delete an unused driver (2013-09-19 09:52:08 +0200) are available in the git repository at: git://git.denx.de/u-boot-ti.git master for you to fetch changes up to 827512fb1154c05c6eb1e2259e936df55c98a535: am335x_evm.h: If mmcdev and bootpart switch to mmcdev 1, so should mmcroot. (2013-09-20 16:57:40 -0400) Greg Guyotte (1): drivers/power/pmic: Add tps65217 driver Heiko Schocher (1): net, phy, cpsw: fix NULL pointer deference Lokesh Vutla (2): ARM: DRA7: Enable saveenv command ARM: OMAP5: Avoid writing into LDO SRAM bits Philip, Avinash (1): drivers/power/pmic: Add tps65910 driver Robert P. J. Day (1): am335x_evm.h: If mmcdev and bootpart switch to mmcdev 1, so should mmcroot. Steve Kipisz (1): am335x:Handle worst case scenario for Errata 1.0.24 Tom Rini (4): spl/Makefile: Add drivers/power/pmic/libpmic to CONFIG_SPL_POWER_SUPPORT am33xx: Add am33xx_spl_board_init function, call am33xx: Add the efuse_sma CONTROL_MODULE register am335x_evm: am33xx_spl_board_init function and scale core frequency arch/arm/cpu/armv7/am33xx/board.c| 11 ++ arch/arm/cpu/armv7/am33xx/clock_am33xx.c |8 +- arch/arm/cpu/armv7/am33xx/sys_info.c | 57 + arch/arm/cpu/armv7/omap-common/boot-common.c |3 + arch/arm/cpu/armv7/omap-common/clocks-common.c |7 -- arch/arm/cpu/armv7/omap5/prcm-regs.c | 12 -- arch/arm/include/asm/arch-am33xx/clocks_am33xx.h | 12 +- arch/arm/include/asm/arch-am33xx/cpu.h | 12 ++ arch/arm/include/asm/arch-am33xx/sys_proto.h |4 + arch/arm/include/asm/omap_common.h |6 - board/ti/am335x/board.c | 146 ++ drivers/net/cpsw.c | 10 +- drivers/power/pmic/Makefile |2 + drivers/power/pmic/pmic_tps65217.c | 109 drivers/power/pmic/pmic_tps65910.c | 83 include/configs/am335x_evm.h |6 + include/configs/dra7xx_evm.h |8 +- include/configs/pcm051.h |1 + include/power/tps65217.h | 83 include/power/tps65910.h | 77 spl/Makefile |3 +- 21 files changed, 629 insertions(+), 31 deletions(-) create mode 100644 drivers/power/pmic/pmic_tps65217.c create mode 100644 drivers/power/pmic/pmic_tps65910.c create mode 100644 include/power/tps65217.h create mode 100644 include/power/tps65910.h Thanks! Applied to u-boot-arm/master, thanks! Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PPC] get_timer without CONFIG_INTERRUPTS
On 30/09/13 21:22, Chris Packham wrote: Hi, Has anyone looked at a way of implementing get_timer for PowerPC without using interrupts. We appear to be having a problem with common/usb_hub.c where occasionally (1 in ~150 reboots) we seem to get stuck in the do/while loop in usb_hub_configure. It looks like this should timeout but because we don't define CONFIG_INTERRUPTS get_timer() will only ever return 0. I'm being a little paranoid (perhaps too paranoid) about turning on CONFIG_INTERRUPTS. Looking at the code I can't see too much that would cause problems but I want to avoid a rogue LBC or PCI-e interrupt locking up the CPU. Thanks, Chris To answer my own question you do not need CONFIG_INTERRUPTS for get_timer to work. You do however have to have called interrupts_init. Our mistake was to add a call to usb_start in our boards misc_init_r. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] imximage on the MX50
Hi Andre, On 02/10/2013 05:23, Andre Renaud wrote: Hi, I'm trying to port u-boot 2013.10-rc2 to the i.MX50 (which is very similar to the i.MX53). Fine ! However I'm not having much luck with the imximage, and have so far not managed to make the unit run stand-alone. Specifically, the dcd_ptr in the v2 imx header points to an address in DDR, however I would have thought that on power-up the DCD is loaded somewhere in iRAM (since the DDR isn't running at this stage), and then only once this has been interpreted is the full image loaded into DDR. The tools/imximage.c code appears to only work with DDR addresses, and I'm assuming that this same system works fine on the MX53. Can anyone shed any light on this? The bootROM copies the DCD data into an area that is not specified, but we can assume is in the IRAM. As part of the boot process, the bootROM copies the image into a DEST memory - this is as it is called in the manuals, and this after the DCD table is parsed and executed. That means that is possible to set dcd_ptr pointint to DDR if the DCD table is programmed to set up the DDR controller, as it is actually done for i.MX51/i.MX53/i.MX6 in u-boot. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: mx5: Enable L2 cache
Hi Fabio, On 30/09/2013 18:16, Fabio Estevam wrote: Enable L2 cache for improving the system performance. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- arch/arm/cpu/armv7/mx5/lowlevel_init.S | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S index fc7c767..e4cd85c 100644 --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S @@ -45,6 +45,12 @@ #endif mcr 15, 1, r0, c9, c0, 2 + + /* enable L2 cache */ + mrc 15, 0, r0, c1, c0, 1 + orr r0, r0, #2 + mcr 15, 0, r0, c1, c0, 1 + .endm /* init_l2cc */ /* AIPS setup - Only setup MPROTx registers. This is a repost from a your previous patch on August, 19th, where you report slow tftp transfer even with L2-cache enable. Was this issue solved or it is completeley unrelated to the cache ? Best regards, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PPC] get_timer without CONFIG_INTERRUPTS
Dear Chris, In message 524bccee.5020...@gmail.com you wrote: Our mistake was to add a call to usb_start in our boards misc_init_r. You never want to run this automatically. And if you do, you absolutely must make sure to shut down the USB controller after use / before booting Linux, otherwise you will experience rare and almost impossible to debug memory corruption errors in Linux. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de We are Microsoft. Unix is irrelevant. Openness is futile. Prepare to be assimilated. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mmc: sdhci: Avoid commands errors by simple timeout adaptation.
Hi Przemyslaw,
On Oct 1, 2013, at 7:59 PM, Przemyslaw Marczak wrote:
Hello Pantelis,
Thank you for reply
On 10/01/2013 05:50 PM, Pantelis Antoniou wrote:
while (sdhci_readl(host, SDHCI_PRESENT_STATE) mask) {
-if (timeout == 0) {
+if (time == cmd_timeout) {
time = cmd_timeout here.
You rely on the timeout hitting exactly the same value which is not
guaranteed.
I think this condition is guaranteed here, because of time value that is
incremented only inside the loop.
Also if meets (time == cmd_timeout) condition and next if timeout will be
increased twice, then eg. if current timeout
is 100ms - next will be 200 ms, so it needs 100 loops and no more.
Am I wrong?
OK, let's take things one at a time:
First of all you use the global variable cmd_timeout, and you alter it's value.
Where it is reset back
in case the operation starts all over again?
Secondly the check time == cmd_timeout is very very fragile. You depend on the
loop only incrementing
the time by one.
This is not always guaranteed to be the case in the future.
Using a greater than comparison you are safe even if in sometime in the future
the step changes and
there is absolutely no performance penalty.
Regards
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
Regards
-- Pantelis
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Re: [U-Boot] [PULL] u-boot-usb/master
On Fri, Sep 27, 2013 at 07:38:43PM +0200, Marek Vasut wrote: Hi Tom, this is mostly fixes + the dangling ATMEL UDC driver. Hope you don't mind the later. The following changes since commit 6b40852da5c8dd710f9d61204a3c6a3c9d22: Sound: MAX98095: Support I2S0 channel (2013-09-24 09:10:33 -0400) are available in the git repository at: git://git.denx.de/u-boot-usb.git master for you to fetch changes up to 5077f96f10fe88f1f7cbe09743ac7c765f9e98c3: usb: ehci: Fix test mode for connected ports (2013-09-27 16:20:52 +0200) Afzal Mohammed (3): dfu: unify mmc/nand read/write ops enum dfu: ram support am335x_evm: enable DFU RAM Bo Shen (4): USB: gadget: add atmel usba udc driver ARM: atmel: correct UDPHS name ARM: atmel: add RNDIS gadget support USB: gadget: atmel: disconnect before unbind Joel Fernandes (1): usb: gadget: Fix data aborts during USB ethernet boot Julius Werner (1): usb: ehci: Fix test mode for connected ports Lukasz Majewski (6): dfu:cosmetic: Fix printf text for buffer overflow condition dfu: Make maximum DFU file size equal to default DFU data buffer dfu: Extract common DFU code to handle dfu_alt_info environment variable usb:g_dnl:ums: Conditional compilation for mass storage function (f_mass_storage) usb:gadget:Remove redundant #includes for USB composite gadget and its functions usb:g_dnl:dfu: Download gadget and DFU function code clean up Troy Kisky (1): usb: gadget: config: fix unaligned access issues Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Buildman changes for release
On Tue, Oct 01, 2013 at 02:41:23PM -0600, Simon Glass wrote: Hi Tom, I picked up these two - a fix plus a feature that came in after the merge window for the previous release but should go into this one. The following changes since commit 6b40852da5c8dd710f9d61204a3c6a3c9d22: Sound: MAX98095: Support I2S0 channel (2013-09-24 09:10:33 -0400) are available in the git repository at: ssh://gu-...@git.denx.de/u-boot-x86.git buildman for you to fetch changes up to 4281ad8e7fcb304724127281f258d198001fd41a: buildman: Allow make flags to be specified for each board (2013-10-01 14:39:14 -0600) Simon Glass (2): buildman: Adjust tests for new boards.cfg format buildman: Allow make flags to be specified for each board tools/buildman/README | 22 ++ tools/buildman/bsettings.py | 3 --- tools/buildman/builder.py | 1 + tools/buildman/buildman.py | 13 + tools/buildman/test.py | 10 +- tools/buildman/toolchain.py | 81 +++-- 6 files changed, 120 insertions(+), 10 deletions(-) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request for u-boot-marvell.git
Hi Prafulla, On Wed, 25 Sep 2013 04:20:24 -0700, Prafulla Wadaskar prafu...@marvell.com wrote: Hi Albert, Please kindly pull The following changes since commit 12eba1b49380988fd87cc0b3af44014cca8b71c4: Jeroen Hofstee (1): README: update ARM register usage are available in the git repository at: u-boot-marvell.git master branch. Holger Brunck (2): arm/km: drop unneeded define arm/km: make local function startup_allowed static Karlheinz Jerg (1): arm/km: add support for km_kirkwood_128m16 board board/keymile/km_arm/km_arm.c |6 +- boards.cfg|1 + include/configs/km_kirkwood.h | 10 ++ 3 files changed, 12 insertions(+), 5 deletions(-) Regards... Prafulla . . . For km_kirkwood_128m16: ../common/ivm.c: In function 'ivm_read_eeprom': ../common/ivm.c:304:18: error: 'CONFIG_KM_IVM_BUS' undeclared (first use in this function) ../common/ivm.c:304:18: note: each undeclared identifier is reported only once for each function it appears in make[1]: *** [/home/albert/src/u-boot-arm/build/km_kirkwood_128m16/board/keymile/km_arm/../common/ivm.o] Error 1 make: *** [/home/albert/src/u-boot-arm/build/km_kirkwood_128m16/board/keymile/km_arm/libkm_arm.o] Error 2 Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [i2c] Pull request
On Tue, Oct 01, 2013 at 08:40:00AM +0200, Heiko Schocher wrote: Hello Tom, please pull from u-boot-i2c.git The following changes since commit 6b40852da5c8dd710f9d61204a3c6a3c9d22: Sound: MAX98095: Support I2S0 channel (2013-09-24 09:10:33 -0400) are available in the git repository at: git://git.denx.de/u-boot-i2c.git master for you to fetch changes up to e436193269620579164d7db4296a3d7a378dbf8d: exynos: i2c: Fix i2c driver to handle NACKs properly (2013-10-01 08:33:16 +0200) Naveen Krishna Ch (1): exynos: i2c: Fix i2c driver to handle NACKs properly drivers/i2c/s3c24x0_i2c.c | 213 -- 1 file changed, 89 insertions(+), 124 deletions(-) NAK: Testing VCMA9 on -00058-ga882b9e Wed Oct 2 09:02:24 EDT 2013 Configuring for VCMA9 board... s3c24x0_i2c.c:234:3: error: 'i' undeclared (first use in this function) make[1]: *** [/home/trini/work/u-boot/u-boot/VCMA9/drivers/i2c/s3c24x0_i2c.o] Error 1 make: *** [/home/trini/work/u-boot/u-boot/VCMA9/drivers/i2c/libi2c.o] Error 2 /opt/linaro/gcc-linaro-arm-linux-gnueabihf-4.7-2013.03-20130313_linux/bin/arm-linux-gnueabihf-size: 'VCMA9/u-boot': No such file s3c24x0_i2c.c: In function 'i2c_init': s3c24x0_i2c.c:234:3: error: 'i' undeclared (first use in this function) s3c24x0_i2c.c:234:3: note: each undeclared identifier is reported only once for each function it appears in make[1]: *** [/home/trini/work/u-boot/u-boot/VCMA9/drivers/i2c/s3c24x0_i2c.o] Error 1 make: *** [/home/trini/work/u-boot/u-boot/VCMA9/drivers/i2c/libi2c.o] Error 2 make: *** Waiting for unfinished jobs - SUMMARY Boards compiled: 1 Boards with errors: 1 ( VCMA9 ) -- Command exited with non-zero status 1 -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] compulab: adjustments before porting more boards
On Mon, Sep 30, 2013 at 11:36:32AM +0300, Igor Grinberg wrote:
ping!
On 09/16/13 21:49, Igor Grinberg wrote:
Two more adjustments before porting more Compulab boards to mainline U-Boot.
Move the eeprom code which can be used (and is suitable) by multiple
Compulab
boards to a common location.
Move the display initialization code which can be used by multiple Compulab
OMAP based boards.
Igor Grinberg (2):
cm-t35: move the eeprom code to common place
cm-t35: move the display code to common place
board/compulab/cm_t35/Makefile | 3 --
board/compulab/cm_t35/cm_t35.c | 7 ++-
board/compulab/common/Makefile | 36 +++
board/compulab/{cm_t35 = common}/eeprom.c | 51
--
board/compulab/{cm_t35 = common}/eeprom.h | 8 ++--
.../{cm_t35/display.c = common/omap3_display.c} | 0
6 files changed, 70 insertions(+), 35 deletions(-)
create mode 100644 board/compulab/common/Makefile
rename board/compulab/{cm_t35 = common}/eeprom.c (60%)
rename board/compulab/{cm_t35 = common}/eeprom.h (62%)
rename board/compulab/{cm_t35/display.c = common/omap3_display.c} (100%)
Generally fine, but posted after the merge window so I hadn't picked it
up for u-boot-ti yet, thanks.
--
Tom
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Re: [U-Boot] [PATCH 1/2] SPL: Add CONFIG_SPL_BOOTCOUNT_SUPPORT
On Mon, Sep 30, 2013 at 08:37:56AM +0200, Stefan Roese wrote: Hi Tom, On 27.09.2013 21:26, Tom Rini wrote: Add a new symbol, CONFIG_SPL_BOOTCOUNT_SUPPORT, to make use of the existing BOOTCOUNT_SUPPORT within SPL. It is strongly discouraged to use bootcount in both SPL and full U-Boot, as they use the same counter. I just noticed that I missed sending the SPL bootcount implementation I did a few weeks ago to the list. I'll send it shortly. The main differences I see right now are: - My implementation requires CONFIG_BOOTCOUNT_LIMIT and CONFIG_SPL_BOOTCOUNT_SUPPORT to be configured OK, I see where you went with this, and I like this idea better. I shall incorporate that in v2. - The check is not added to the board-specific code, but the medium code (here spl_nor.c). This might be consolidated even more by moving it to a non-boot-medium specific location (spl.c)? This I think takes things the wrong way. When it's part of spl_start_uboot we cover all boot method cases (MMC and NAND, in my case). Perhaps we should switch to a useful, but still weak default function? -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PULL] : Please pull u-boot-imx
Hi Stefano, On Fri, 27 Sep 2013 14:11:56 +0200, Stefano Babic sba...@denx.de wrote: Hi Albert, please pull from u-boot-imx, thanks ! The following changes since commit 8386ca8bea7a6a8469c3b6a99313afb642e6cbeb: Revert standalone-examples: support custom GCC lib (2013-09-12 10:27:29 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master for you to fetch changes up to ce7a7f5e6bda35d7d0972be07b6983552d1a2cb2: i.MX6DQ/DLS: Add pad MX6_PAD_GPIO_1__USB_OTG_ID (2013-09-27 13:53:35 +0200) Andrew Gabbasov (1): mx6: Fix calculation of emi_slow clock rate Elie De Brauwer (1): mxs_nand: Fix ECC strength for NAND flash with OOB size of 224 Eric Nelson (2): i.MX6DL/S: add drive-strength back to pads DISP0_DAT2/DAT10 i.MX6DQ/DLS: Add pad MX6_PAD_GPIO_1__USB_OTG_ID Fabio Estevam (17): mx6sabresd: Add LVDS splash screen support wandboard: Use imx6dl-wandboard.dtb for the solo version mx6sabresd: Avoid hang when HDMI cable is not connected mx6sabresd: Reset counter to prevent error message mmc: fsl_esdhc: Check the result from malloc() mx35pdk: Remove CONFIG_SYS_CACHELINE_SIZE mx6sabresd: Return error if cpu_eth_init() fails mx6qsabreauto: Return error if cpu_eth_init() fails net: fec_mxc: Add support for mx6 solo-lite mx6slevk: Add Ethernet support mx28evk: Fix checkpatch warning doc: README.mxs: Add instruction to install 'libssl-dev' mx6sabresd: Fix the fdt file for the mx6dl version net: fec_mxc: Fix timeouts during tftp transfer mx28evk: Propagate the error if cpu_eth_init() fails mx28evk: Propagate the error if cpu_eth_init() fails mx35pdk: Fix error handling in board_late_init() Marek Vasut (6): tools: mxsboot: Mark the FCB pages as valid ARM: mxs: Sort the mx23evk and mx23_olinuxino ARM: mxs: Document the power block initialization ARM: mxs: Receive r0 and r1 passed from BootROM ARM: mxs: Add Creative ZEN XFi3 board ARM: mxs: Add SanDisk Sansa Fuze+ board Markus Niebel (1): ARM: arch-mx6: fix PLL2_PFD2_FREQ Pierre Aubert (1): mx6: Fix use of improper value in enable_ipu_clock Robert Winkler (1): imx: nitrogen6x/mx6qsabrelite: Fix bug in board_video_skip Stefano Babic (1): Merge branch 'master' of git://git.denx.de/u-boot-arm York Sun (1): tools/imximage.c: Fix compiling warning trem (3): mx27: add missing constant for mx27 apf27: add support for the armadeus APF27 board apf27: add FPGA support for the apf27 board arch/arm/cpu/arm926ejs/mx27/asm-offsets.c |5 + arch/arm/cpu/arm926ejs/mxs/spl_boot.c |5 +- arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 209 +++ arch/arm/cpu/arm926ejs/mxs/start.S| 50 ++- arch/arm/cpu/armv7/mx6/clock.c| 40 +- arch/arm/include/asm/arch-mx27/imx-regs.h |6 +- arch/arm/include/asm/arch-mx6/clock.h |1 + arch/arm/include/asm/arch-mx6/crm_regs.h |2 +- arch/arm/include/asm/arch-mx6/iomux.h |5 + arch/arm/include/asm/arch-mx6/mx6dl_pins.h|6 +- arch/arm/include/asm/arch-mx6/mx6q_pins.h |1 + arch/arm/include/asm/arch-mx6/mx6sl_pins.h| 12 + arch/arm/include/asm/arch-mxs/sys_proto.h |5 +- board/armadeus/apf27/Makefile | 33 ++ board/armadeus/apf27/apf27.c | 256 + board/armadeus/apf27/apf27.h | 489 + board/armadeus/apf27/fpga.c | 224 +++ board/armadeus/apf27/fpga.h | 25 ++ board/armadeus/apf27/lowlevel_init.S | 168 + board/bluegiga/apx4devkit/spl_boot.c |4 +- board/boundary/nitrogen6x/nitrogen6x.c|4 +- board/creative/xfi3/Makefile | 31 ++ board/creative/xfi3/spl_boot.c| 134 +++ board/creative/xfi3/xfi3.c| 224 +++ board/denx/m28evk/m28evk.c|2 + board/denx/m28evk/spl_boot.c |4 +- board/freescale/mx23evk/spl_boot.c|4 +- board/freescale/mx28evk/iomux.c |4 +- board/freescale/mx28evk/mx28evk.c |4 +- board/freescale/mx35pdk/mx35pdk.c | 10 +- board/freescale/mx6qsabreauto/mx6qsabreauto.c |2 +- board/freescale/mx6sabresd/mx6sabresd.c | 169 +++-- board/freescale/mx6slevk/mx6slevk.c | 68 board/olimex/mx23_olinuxino/spl_boot.c|4 +- board/sandisk/sansa_fuze_plus/Makefile| 31 ++ board/sandisk/sansa_fuze_plus/sfp.c | 388 board/sandisk/sansa_fuze_plus/spl_boot.c | 140
Re: [U-Boot] [PATCH] ARM: mx5: Enable L2 cache
Hi Stefano, On Wed, Oct 2, 2013 at 5:36 AM, Stefano Babic sba...@denx.de wrote: This is a repost from a your previous patch on August, 19th, where you report slow tftp transfer even with L2-cache enable. Was this issue solved or it is completeley unrelated to the cache ? Actually the motivation for sending this patch this time was because I am currently working with a customer's USB centric application. By only applying this patch we can see CPU usage being decreased from 35% to 25%. The TFTP transfer in U-boot is still slow though, but this needs to be investigated separately. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [i2c] Pull request
Hello Tom, Am 02.10.2013 15:04, schrieb Tom Rini: On Tue, Oct 01, 2013 at 08:40:00AM +0200, Heiko Schocher wrote: Hello Tom, please pull from u-boot-i2c.git The following changes since commit 6b40852da5c8dd710f9d61204a3c6a3c9d22: Sound: MAX98095: Support I2S0 channel (2013-09-24 09:10:33 -0400) are available in the git repository at: git://git.denx.de/u-boot-i2c.git master for you to fetch changes up to e436193269620579164d7db4296a3d7a378dbf8d: exynos: i2c: Fix i2c driver to handle NACKs properly (2013-10-01 08:33:16 +0200) Naveen Krishna Ch (1): exynos: i2c: Fix i2c driver to handle NACKs properly drivers/i2c/s3c24x0_i2c.c | 213 -- 1 file changed, 89 insertions(+), 124 deletions(-) NAK: Testing VCMA9 on -00058-ga882b9e Wed Oct 2 09:02:24 EDT 2013 Configuring for VCMA9 board... s3c24x0_i2c.c:234:3: error: 'i' undeclared (first use in this Ups, Thanks for detecting this ... bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] exynos: i2c: Fix i2c driver to handle NACKs properly
Hello Naveen, Am 30.09.2013 08:58, schrieb Naveen Krishna Chatradhi: The Exynos5 i2c driver does not handle NACKs properly. This change: - fixes the NACK processing problem (do not continue transaction if address cycle was NACKed) - eliminates a fair amount of duplicate code Signed-off-by: Vadim Bendeburyvben...@chromium.org Reviewed-by: Simon Glasss...@google.com Signed-off-by: Naveen Krishna Chatradhich.nav...@samsung.com --- drivers/i2c/s3c24x0_i2c.c | 213 +++-- 1 file changed, 89 insertions(+), 124 deletions(-) Patch introduces a compileerror for the VCMA9 board: Testing VCMA9 on -00058-ga882b9e Wed Oct 2 09:02:24 EDT 2013 Configuring for VCMA9 board... s3c24x0_i2c.c:234:3: error: 'i' undeclared (first use in this function) make[1]: *** [/home/trini/work/u-boot/u-boot/VCMA9/drivers/i2c/s3c24x0_i2c.o] Error 1 make: *** [/home/trini/work/u-boot/u-boot/VCMA9/drivers/i2c/libi2c.o] Error 2 /opt/linaro/gcc-linaro-arm-linux-gnueabihf-4.7-2013.03-20130313_linux/bin/arm-linux-gnueabihf-size: 'VCMA9/u-boot': No such file s3c24x0_i2c.c: In function 'i2c_init': s3c24x0_i2c.c:234:3: error: 'i' undeclared (first use in this function) s3c24x0_i2c.c:234:3: note: each undeclared identifier is reported only once for each function it appears in make[1]: *** [/home/trini/work/u-boot/u-boot/VCMA9/drivers/i2c/s3c24x0_i2c.o] Error 1 make: *** [/home/trini/work/u-boot/u-boot/VCMA9/drivers/i2c/libi2c.o] Error 2 make: *** Waiting for unfinished jobs Please check this and add, when posting this patch again, the board Maintainer: David Müller d.muel...@elsoft.ch to Cc, so he maybe can test it ... Thanks! bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] compulab: adjustments before porting more boards
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi Tom,
On 10/02/13 15:53, Tom Rini wrote:
On Mon, Sep 30, 2013 at 11:36:32AM +0300, Igor Grinberg wrote:
ping!
On 09/16/13 21:49, Igor Grinberg wrote:
Two more adjustments before porting more Compulab boards to mainline U-Boot.
Move the eeprom code which can be used (and is suitable) by multiple
Compulab
boards to a common location.
Move the display initialization code which can be used by multiple Compulab
OMAP based boards.
Igor Grinberg (2):
cm-t35: move the eeprom code to common place
cm-t35: move the display code to common place
board/compulab/cm_t35/Makefile | 3 --
board/compulab/cm_t35/cm_t35.c | 7 ++-
board/compulab/common/Makefile | 36 +++
board/compulab/{cm_t35 = common}/eeprom.c | 51
--
board/compulab/{cm_t35 = common}/eeprom.h | 8 ++--
.../{cm_t35/display.c = common/omap3_display.c} | 0
6 files changed, 70 insertions(+), 35 deletions(-)
create mode 100644 board/compulab/common/Makefile
rename board/compulab/{cm_t35 = common}/eeprom.c (60%)
rename board/compulab/{cm_t35 = common}/eeprom.h (62%)
rename board/compulab/{cm_t35/display.c = common/omap3_display.c} (100%)
Generally fine, but posted after the merge window so I hadn't picked it
up for u-boot-ti yet, thanks.
No problem, I was actually aiming for v2014.01
(or which ever the next release will be).
I just have more stuff in the queue that depends on the above
and like it to be applied before sending out the next series.
10x!
- --
Regards,
Igor.
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Re: [U-Boot] [PATCH 7/9] net: tsec: Use portable types and accessors for BDs
On 10/1/2013 9:50 PM, Scott Wood wrote:
On Tue, 2013-10-01 at 14:38 +0300, Claudiu Manoil wrote:
On 10/1/2013 2:22 AM, Scott Wood wrote:
On Mon, 2013-09-30 at 12:44 +0300, Claudiu Manoil wrote:
+static RTXBD rtx __aligned(8);
+#define RXBD(i) rtx.rxbd[i]
+#define TXBD(i) rtx.txbd[i]
+#define GET_BD_STAT(T, i) be16_to_cpu((__force __be16)T##BD(i).status)
+#define SET_BD_STAT(T, i, v) T##BD(i).status = (__force __u16)cpu_to_be16(v)
+#define GET_BD_BLEN(T, i) be16_to_cpu((__force __be16)T##BD(i).length)
+#define SET_BD_BLEN(T, i, v) T##BD(i).length = (__force __u16)cpu_to_be16(v)
+#define GET_BD_BPTR(T, i) be32_to_cpu((__force __be32)T##BD(i).bufptr)
+#define SET_BD_BPTR(T, i, v) T##BD(i).bufptr = (__force __u32)cpu_to_be32(v)
Why the forcing? Can't you declare the data with __be16/__be32?
The __force annotation is obviously needed to suppress the sparse
warnings due to BD data declaration type not being __bexx, but the
generic uintxx_t, as you noticed as well.
Now, why I didn't use __bexx instead? The main reason would be
maintainability: the DMA descriptors may not be in big endian format
exclusively. The eTSEC hw may actually have an option to interpret
the DMA descriptors in little endian format.
May have or does have?
If it does have such a feature, do you plan to use it? Usually I have
not seen such features used for (e.g.) little-endian PCI devices on big
endian hosts.
I has that option, but I don't really plan to use it, clearly not for
big endian hosts. The may have was for future little endian hosts.
But I think this option is not really needed by the uboot driver
so doing the byte swapping in software should be ok (i.e. performance
wise).
What's wrong with:
for (t = 0; in_be16(rtx.rxbd[rx_idx].status) RXBD_EMPTY; t++) {
Or if you don't want to use I/O accessors on the DMA descriptors (Is
synchronization ensured some other way? We had problems with this in
the Linux driver before...):
Synchronization here is is insured by declaring the RTXBD structure
type as volatile (see RTXBD declaration, a couple of lines above).
That does not achieve hardware synchronization, and even the effects on
the compiler are questionable due to volatile's vague semantics.
The existing code has been working this way for quite a while on the
mpc85xx platforms,
It was working for a while in Linux as well, until we encountered a
workload where it didn't (though granted, there was no volatile in that
case). See Linux commit 3b6330ce2a3e1f152f79a6203f73d23356e243a7
Good point, I guess it would be safer too use some memory barriers
around accesses to BD fields in the uboot driver too. However some
portable barriers would be needed, eieio() doesn't have an equivalent
for ARM.
FWIW, I see some other places in U-Boot's TSEC driver that use
out_be32() on the descriptors (e.g. startup_tsec after Point to the
buffer descriptors).
That's only to program the tbase and rbase registers with the physical
address of the Tx/Rx BD rings' base.
so I thought it would be better not to change this
approach. Using i/o accessors for the Buffer Descriptors would be a
significant change, and I don't see how to argue such a change: why
would the I/O accessors be better than the current approach - i.e.
declaring the DMA descriptors as volatile? Is there something wrong
with about volatile usage in this case? (afaik, this is a case were
the volatile declaration is permitted)
Also, there doesn't seem to be other net drivers using I/O accessors
for the BD rings.
I picked some random examples, and the first driver in Linux in which I
could quickly find the BD rings uses I/O accessors
(drivers/net/ethernet/realtek/8319too.c). I then checked its U-Boot
eqivalent (drivers/net/rtl8139.c) and it also uses I/O accessors for the
descriptors.
I actually meant accessing buffer descriptor fields (like status,
length, dma address). As you can see in this example from linux
8319too.c's Rx routine, there's no I/O accessor involved:
/* read size+status of next frame from DMA ring buffer */
rx_status = le32_to_cpu (*(__le32 *) (rx_ring + ring_offset));
However the driver does use a rmb() just before this line.
for (t = 0; be16_to_cpup(rtx.rxbd[rx_idx].status) RXBD_EMPTY; t++) {
I opted for using macros instead due to code maintainability,
Obfuscatory macros do not help.
and to avoid overly long lines (80)
You could factor out an rxbd_empty() function, or factor that loop out
to be its own function, or have a local variable point to
rtx.rxbd[rx_idx]...
and to better control these changes.
For instance, if etsec were to access it's BDs in little endian format
in the future,
Either don't do that (preferred option), or at that point add
tsec16_to_cpup() and friends.
I'll have a try with the portable I/O accessors (in_be, out_be) to see
how it works that way.
Thanks,
Claudiu
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Re: [U-Boot] [PATCH] ARM: mx5: Enable L2 cache
Hi Fabio, On 02/10/2013 15:43, Fabio Estevam wrote: Hi Stefano, On Wed, Oct 2, 2013 at 5:36 AM, Stefano Babic sba...@denx.de wrote: This is a repost from a your previous patch on August, 19th, where you report slow tftp transfer even with L2-cache enable. Was this issue solved or it is completeley unrelated to the cache ? Actually the motivation for sending this patch this time was because I am currently working with a customer's USB centric application. By only applying this patch we can see CPU usage being decreased from 35% to 25%. The TFTP transfer in U-boot is still slow though, but this needs to be investigated separately. Ok, understood, thanks - I'll pick up this one for the next PR. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/8] hash: Export functions to find and show hash
These functions are generally useful for displaying a hash value and finding
available algorithms, so export them.
Signed-off-by: Simon Glass s...@chromium.org
---
common/hash.c | 13 ++---
include/hash.h | 22 ++
2 files changed, 28 insertions(+), 7 deletions(-)
diff --git a/common/hash.c b/common/hash.c
index 722c40b..7b34e83 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -204,7 +204,7 @@ static int parse_verify_sum(struct hash_algo *algo, char
*verify_str, u8 *vsum,
return 0;
}
-static struct hash_algo *find_hash_algo(const char *name)
+struct hash_algo *hash_find_algo(const char *name)
{
int i;
@@ -216,8 +216,7 @@ static struct hash_algo *find_hash_algo(const char *name)
return NULL;
}
-static void show_hash(struct hash_algo *algo, ulong addr, ulong len,
- u8 *output)
+void hash_show(struct hash_algo *algo, ulong addr, ulong len, u8 *output)
{
int i;
@@ -231,7 +230,7 @@ int hash_block(const char *algo_name, const void *data,
unsigned int len,
{
struct hash_algo *algo;
- algo = find_hash_algo(algo_name);
+ algo = hash_find_algo(algo_name);
if (!algo) {
debug(Unknown hash algorithm '%s'\n, algo_name);
return -EPROTONOSUPPORT;
@@ -265,7 +264,7 @@ int hash_command(const char *algo_name, int flags,
cmd_tbl_t *cmdtp, int flag,
u8 vsum[HASH_MAX_DIGEST_SIZE];
void *buf;
- algo = find_hash_algo(algo_name);
+ algo = hash_find_algo(algo_name);
if (!algo) {
printf(Unknown hash algorithm '%s'\n, algo_name);
return CMD_RET_USAGE;
@@ -298,7 +297,7 @@ int hash_command(const char *algo_name, int flags,
cmd_tbl_t *cmdtp, int flag,
if (memcmp(output, vsum, algo-digest_size) != 0) {
int i;
- show_hash(algo, addr, len, output);
+ hash_show(algo, addr, len, output);
printf( != );
for (i = 0; i algo-digest_size; i++)
printf(%02x, vsum[i]);
@@ -306,7 +305,7 @@ int hash_command(const char *algo_name, int flags,
cmd_tbl_t *cmdtp, int flag,
return 1;
}
} else {
- show_hash(algo, addr, len, output);
+ hash_show(algo, addr, len, output);
printf(\n);
if (argc) {
diff --git a/include/hash.h b/include/hash.h
index e92d272..c69bc25 100644
--- a/include/hash.h
+++ b/include/hash.h
@@ -77,4 +77,26 @@ int hash_command(const char *algo_name, int flags, cmd_tbl_t
*cmdtp, int flag,
int hash_block(const char *algo_name, const void *data, unsigned int len,
uint8_t *output, int *output_size);
+/**
+ * hash_find_algo() - Find an algorithm by name
+ *
+ * @name: Name of algorithm to search for
+ * @return pointer to algorithm structure, or NULL if not found
+ */
+struct hash_algo *hash_find_algo(const char *name);
+
+/**
+ * hash_show() - Print out a hash algorithm and value
+ *
+ * You will get a message like this (without a newline at the end):
+ *
+ * sha1 for 9eb3337c ... 9eb3338f ==
7942ef1df479fd3130f716eb9613d107dab7e257
+ *
+ * @algo: Algorithm used for hash
+ * @addr: Address of data that was hashed
+ * @len: Length of data that was hashed
+ * @output:Hash value to display
+ */
+void hash_show(struct hash_algo *algo, ulong addr, ulong len, u8 *output);
+
#endif
--
1.8.4
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[U-Boot] [PATCH 0/8] Secure boot improvements and test on Beaglebone Black
This series adds a few improvements to the image signing feature to make it easier to use on the Beaglebone Black. - Add a DEV_TREE_BIN option to make it easier to include the correct FDT (with embedded public keys) into the U-Boot image - Enable cache for more TI boards (to speed things up) - Increase malloc size - Enable CONFIG_OF_CONTROL, FIT and secure boot on am33xx/omap (RFC only, not sure we want this, although we could create a separate config for it) I also have a change to adjust mkimage to automatically make space in the FDT when adding hashes and signatures. Included here is the ENOSPC patch, but the fit_image.c patch will wait until the dumpimage tool is merged, since I am changing the same code. With this, secure boot was tested successfully on Beaglebone Black. Simon Glass (8): am33xx/omap: Allow cache enable for all Sitara/OMAP hash: Export functions to find and show hash fdt: Add DEV_TREE_BIN option to specify a device tree binary file fdt: Update functions which write to an FDT to return -ENOSPC arm: ti: Increase malloc size to 16MB for armv7 boards RFC: am33xx/omap: Enable CONFIG_OF_CONTROL RFC: am33xx/omap: Enable FIT support RFC: am33xx/omap: Enable secure boot with CONFIG_FIT_SIGNATURE Makefile | 8 +- arch/arm/cpu/armv7/omap-common/Makefile| 4 + arch/arm/cpu/armv7/omap-common/hwinit-common.c | 41 -- arch/arm/cpu/armv7/omap-common/omap-cache.c| 56 +++ arch/arm/cpu/armv7/omap3/board.c | 8 - arch/arm/dts/am33xx.dtsi | 649 + arch/arm/dts/dt-bindings/gpio/gpio.h | 15 + arch/arm/dts/dt-bindings/pinctrl/am33xx.h | 41 ++ arch/arm/dts/dt-bindings/pinctrl/omap.h| 54 ++ board/siemens/common/board.c | 9 - board/ti/dts/am335x-bone-common.dtsi | 262 ++ board/ti/dts/am335x-boneblack.dts | 17 + board/ti/dts/tps65217.dtsi | 56 +++ common/hash.c | 13 +- common/image-fit.c | 4 +- doc/README.fdt-control | 16 +- include/configs/am335x_evm.h | 9 + include/configs/ti_armv7_common.h | 2 +- include/hash.h | 22 + include/rsa.h | 3 +- lib/rsa/rsa-sign.c | 28 +- 21 files changed, 1236 insertions(+), 81 deletions(-) create mode 100644 arch/arm/cpu/armv7/omap-common/omap-cache.c create mode 100644 arch/arm/dts/am33xx.dtsi create mode 100644 arch/arm/dts/dt-bindings/gpio/gpio.h create mode 100644 arch/arm/dts/dt-bindings/pinctrl/am33xx.h create mode 100644 arch/arm/dts/dt-bindings/pinctrl/omap.h create mode 100644 board/ti/dts/am335x-bone-common.dtsi create mode 100644 board/ti/dts/am335x-boneblack.dts create mode 100644 board/ti/dts/tps65217.dtsi -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/8] am33xx/omap: Allow cache enable for all Sitara/OMAP
Enable the cache for all devices, unless CONFIG_SYS_DCACHE_OFF is defined.
This speeds up the Beaglebone Black boot considerable.
(Tested only on Beaglebone Black with SD card boot)
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/cpu/armv7/omap-common/Makefile| 4 ++
arch/arm/cpu/armv7/omap-common/hwinit-common.c | 41 ---
arch/arm/cpu/armv7/omap-common/omap-cache.c| 56 ++
arch/arm/cpu/armv7/omap3/board.c | 8
board/siemens/common/board.c | 9 -
5 files changed, 60 insertions(+), 58 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap-common/omap-cache.c
diff --git a/arch/arm/cpu/armv7/omap-common/Makefile
b/arch/arm/cpu/armv7/omap-common/Makefile
index 75b3753..3487972 100644
--- a/arch/arm/cpu/armv7/omap-common/Makefile
+++ b/arch/arm/cpu/armv7/omap-common/Makefile
@@ -21,6 +21,10 @@ COBJS+= vc.o
COBJS += abb.o
endif
+ifeq ($(CONFIG_SYS_DCACHE_OFF),)
+COBJS += omap-cache.o
+endif
+
ifeq ($(CONFIG_OMAP34XX),)
COBJS += boot-common.o
SOBJS += lowlevel_init.o
diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c
b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
index 85d3754..74f5e45 100644
--- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c
+++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
@@ -18,13 +18,8 @@
#include asm/emif.h
#include asm/omap_common.h
#include linux/compiler.h
-#include asm/cache.h
#include asm/system.h
-#define ARMV7_DCACHE_WRITEBACK 0xe
-#defineARMV7_DOMAIN_CLIENT 1
-#define ARMV7_DOMAIN_MASK (0x3 0)
-
DECLARE_GLOBAL_DATA_PTR;
void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
@@ -264,39 +259,3 @@ int print_cpuinfo(void)
return 0;
}
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
- /* Enable D-cache. I-cache is already enabled in start.S */
- dcache_enable();
-}
-
-void dram_bank_mmu_setup(int bank)
-{
- bd_t *bd = gd-bd;
- int i;
-
- u32 start = bd-bi_dram[bank].start 20;
- u32 size = bd-bi_dram[bank].size 20;
- u32 end = start + size;
-
- debug(%s: bank: %d\n, __func__, bank);
- for (i = start; i end; i++)
- set_section_dcache(i, ARMV7_DCACHE_WRITEBACK);
-
-}
-
-void arm_init_domains(void)
-{
- u32 reg;
-
- reg = get_dacr();
- /*
- * Set DOMAIN to client access so that all permissions
- * set in pagetables are validated by the mmu.
- */
- reg = ~ARMV7_DOMAIN_MASK;
- reg |= ARMV7_DOMAIN_CLIENT;
- set_dacr(reg);
-}
-#endif
diff --git a/arch/arm/cpu/armv7/omap-common/omap-cache.c
b/arch/arm/cpu/armv7/omap-common/omap-cache.c
new file mode 100644
index 000..579bebf
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap-common/omap-cache.c
@@ -0,0 +1,56 @@
+/*
+ *
+ * Common functions for OMAP4/5 based boards
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, www.ti.com
+ *
+ * Author :
+ * Aneesh Vane...@ti.com
+ * Steve Sakoman st...@sakoman.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/cache.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define ARMV7_DCACHE_WRITEBACK 0xe
+#define ARMV7_DOMAIN_CLIENT1
+#define ARMV7_DOMAIN_MASK (0x3 0)
+
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+
+void dram_bank_mmu_setup(int bank)
+{
+ bd_t *bd = gd-bd;
+ int i;
+
+ u32 start = bd-bi_dram[bank].start 20;
+ u32 size = bd-bi_dram[bank].size 20;
+ u32 end = start + size;
+
+ debug(%s: bank: %d\n, __func__, bank);
+ for (i = start; i end; i++)
+ set_section_dcache(i, ARMV7_DCACHE_WRITEBACK);
+}
+
+void arm_init_domains(void)
+{
+ u32 reg;
+
+ reg = get_dacr();
+ /*
+ * Set DOMAIN to client access so that all permissions
+ * set in pagetables are validated by the mmu.
+ */
+ reg = ~ARMV7_DOMAIN_MASK;
+ reg |= ARMV7_DOMAIN_CLIENT;
+ set_dacr(reg);
+}
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 7d1f8d9..fd12cdc 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -478,11 +478,3 @@ void omap3_outer_cache_disable(void)
omap3_update_aux_cr(0, 0x2);
}
#endif /* !CONFIG_SYS_L2CACHE_OFF */
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
- /* Enable D-cache. I-cache is already enabled in start.S */
- dcache_enable();
-}
-#endif /* !CONFIG_SYS_DCACHE_OFF */
diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c
index 6279c32..c3c7f2d 100644
--- a/board/siemens/common/board.c
+++ b/board/siemens/common/board.c
@@ -159,13 +159,4 @@ U_BOOT_CMD(
Sends U-Boot into infinite loop,
);
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
- printf(Enable d-cache\n);
-
[U-Boot] [PATCH 7/8] RFC: am33xx/omap: Enable FIT support
Enable booting a FIT containing a kernel/device tree. Signed-off-by: Simon Glass s...@chromium.org --- include/configs/am335x_evm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 2f942e5..8ba6301 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -19,6 +19,7 @@ #include configs/ti_am335x_common.h #ifndef CONFIG_SPL_BUILD +# define CONFIG_FIT # define CONFIG_OF_CONTROL # define CONFIG_OF_SEPARATE # define CONFIG_DEFAULT_DEVICE_TREE am335x-boneblack -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/8] fdt: Update functions which write to an FDT to return -ENOSPC
When writing values into an FDT it is possible that there will be
insufficient space. If the caller gets a useful error in the then it can
potentially deal with the situation.
Adjust these functions to return -ENOSPC when the FDT is full.
Signed-off-by: Simon Glass s...@chromium.org
---
common/image-fit.c | 4 ++--
include/rsa.h | 3 ++-
lib/rsa/rsa-sign.c | 28 +++-
3 files changed, 23 insertions(+), 12 deletions(-)
diff --git a/common/image-fit.c b/common/image-fit.c
index cf4b67e..8c866f8 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -832,7 +832,7 @@ static int fit_image_hash_get_ignore(const void *fit, int
noffset, int *ignore)
*
* returns:
* 0, on success
- * -1, on property read failure
+ * -ENOSPC if no space in device tree, -1 for other error
*/
int fit_set_timestamp(void *fit, int noffset, time_t timestamp)
{
@@ -846,7 +846,7 @@ int fit_set_timestamp(void *fit, int noffset, time_t
timestamp)
printf(Can't set '%s' property for '%s' node (%s)\n,
FIT_TIMESTAMP_PROP, fit_get_name(fit, noffset, NULL),
fdt_strerror(ret));
- return -1;
+ return ret == -FDT_ERR_NOSPACE ? -ENOSPC : -1;
}
return 0;
diff --git a/include/rsa.h b/include/rsa.h
index add4c78..0db76cc 100644
--- a/include/rsa.h
+++ b/include/rsa.h
@@ -46,7 +46,8 @@ int rsa_sign(struct image_sign_info *info,
*
* @info: Specifies key and FIT information
* @keydest: Destination FDT blob for public key data
- * @return: 0, on success, -ve on error
+ * @return: 0, on success, -ENOSPC if the keydest FDT blob ran out of space,
+ other -ve value on error
*/
int rsa_add_verify_data(struct image_sign_info *info, void *keydest);
#else
diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index 549130e..ef9a2f4 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -427,20 +427,30 @@ int rsa_add_verify_data(struct image_sign_info *info,
void *keydest)
ret = fdt_setprop_string(keydest, node, key-name-hint,
info-keyname);
- ret |= fdt_setprop_u32(keydest, node, rsa,num-bits, bits);
- ret |= fdt_setprop_u32(keydest, node, rsa,n0-inverse, n0_inv);
- ret |= fdt_add_bignum(keydest, node, rsa,modulus, modulus, bits);
- ret |= fdt_add_bignum(keydest, node, rsa,r-squared, r_squared, bits);
- ret |= fdt_setprop_string(keydest, node, FIT_ALGO_PROP,
- info-algo-name);
+ if (!ret)
+ ret = fdt_setprop_u32(keydest, node, rsa,num-bits, bits);
+ if (!ret)
+ ret = fdt_setprop_u32(keydest, node, rsa,n0-inverse, n0_inv);
+ if (!ret) {
+ ret = fdt_add_bignum(keydest, node, rsa,modulus, modulus,
+bits);
+ }
+ if (!ret) {
+ ret = fdt_add_bignum(keydest, node, rsa,r-squared, r_squared,
+bits);
+ }
+ if (!ret) {
+ ret = fdt_setprop_string(keydest, node, FIT_ALGO_PROP,
+info-algo-name);
+ }
if (info-require_keys) {
- fdt_setprop_string(keydest, node, required,
- info-require_keys);
+ ret = fdt_setprop_string(keydest, node, required,
+info-require_keys);
}
BN_free(modulus);
BN_free(r_squared);
if (ret)
- return -EIO;
+ return ret == FDT_ERR_NOSPACE ? -ENOSPC : -EIO;
return 0;
}
--
1.8.4
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Re: [U-Boot] [PATCH 1/1] am33xx: add CONFIG_SYS_NAND_DEVICE_WIDTH to determine NAND device bus-width
Hi, Please see last set of queries inline.. From: Scott Wood [mailto:scottw...@freescale.com] On Sat, 2013-09-28 at 06:24 +, Gupta, Pekon wrote: From: Scott Wood [mailto:scottw...@freescale.com] On Fri, 2013-09-27 at 04:18 +, Gupta, Pekon wrote: [snip] (1) drivers/mtd/nand/fsl_ifc_spl.c (2) drivers/mtd/nand/fsl_elbc_spl.c So CONFIG_SYS_NAND_DEVICE_WIDTH should help them also. right ? How would it help? I meant, instead of requiring the modification in board file, CONFIG_SPL_DEVICE_WIDTH can be put in include/configs/*.h So can this new CONFIG_xx be accepted ? Only for SPL usage. Ok. so should I rename to CONFIG_SPL_NAND_DEVICE_WIDTH ? I have recently sent another version of this patch (as PATCH 2/4) of series below. This series also adds checks for reading ONFI params. Request you to review that also, so that I can include all feedbacks in next patch version. http://lists.denx.de/pipermail/u-boot/2013-September/163878.html It looked like you were removing the code that does dynamic detection, which would also affect non-SPL. - /* If we are 16 bit dev, our gpmc config tells us that */ - if ((readl(gpmc_cfg-cs[cs].config1) 0x3000) == 0x1000) omap_gpmc.c never had dynamic detection support. Above gpmc_config bit which is used to tell whether device is x16 or x8, gets actually hard- coded in gpmc_init(). Thus it was actually a mechanism to pass hard-coded bus- width information to nand driver. Refer: arch/arm/cpu/armv7/am33xx/mem.c : gpmc_init() So, instead of hacking the gpmc_init() everytime for different devices, this patch introduces a generic CONFIG which can be used everywhere. Re-added dynamic detection for u-boot (second stage) in above series. CONFIG_SPL_NAND_DEVICE_WIDTH would be used only for SPL boot. http://lists.denx.de/pipermail/u-boot/2013-September/163879.html It looks like you do more NAND config in gpmc_init() than just setting this one bit, so I don't think you save anything here. BTW, do you not need to set this bit in the config register for the hardware to work in the SPL case? Yes, I'm not changing the default configs for GPMC in gpmc_init(), because they are ok for x8 device. I'm just overriding them again during board_nand_init() if CONFIG_SYS_NAND_DEVICE_WIDTH == x16 device. Is this due to wanting to do identification as x8? Yes, reading of on-chip ONFI params should happen only in x8 mode. [PATCH 1/4] of above series should explain this. http://lists.denx.de/pipermail/u-boot/2013-September/163882.html (dropping few emails from CC list as they are bouncing, and u-boot mailman rejects email saying too many recipients). with regards, pekon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/6] exynos: Use common pmic_reg_update() definition
Hi Leela,
This function is used by different Exynos platforms, put it in the
common file.
Signed-off-by: Vadim Bendebury vben...@chromium.org
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Doug Anderson diand...@google.com
---
board/samsung/common/board.c | 19 ---
drivers/power/power_i2c.c| 19 +++
include/power/pmic.h |1 +
3 files changed, 20 insertions(+), 19 deletions(-)
diff --git a/board/samsung/common/board.c
b/board/samsung/common/board.c index ce85ddb..87ca9de 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -152,25 +152,6 @@ static int board_init_cros_ec_devices(const void
*blob)
#if defined(CONFIG_POWER)
#ifdef CONFIG_POWER_MAX77686
-static int pmic_reg_update(struct pmic *p, int reg, uint regval)
-{
- u32 val;
- int ret = 0;
-
- ret = pmic_reg_read(p, reg, val);
- if (ret) {
- debug(%s: PMIC %d register read failed\n,
__func__, reg);
- return -1;
- }
- val |= regval;
- ret = pmic_reg_write(p, reg, val);
- if (ret) {
- debug(%s: PMIC %d register write failed\n,
__func__, reg);
- return -1;
- }
- return 0;
-}
-
static int max77686_init(void)
{
struct pmic *p;
diff --git a/drivers/power/power_i2c.c b/drivers/power/power_i2c.c
index ac76870..47c606f 100644
--- a/drivers/power/power_i2c.c
+++ b/drivers/power/power_i2c.c
@@ -96,6 +96,25 @@ int pmic_reg_read(struct pmic *p, u32 reg, u32
*val) return 0;
}
+int pmic_reg_update(struct pmic *p, int reg, uint regval)
It seems like this function shall be added to pmic_core.c, since it uses
the pmic_reg_{read|write}, which are defined for both, spi and i2c.
+{
+ u32 val;
+ int ret = 0;
+
+ ret = pmic_reg_read(p, reg, val);
+ if (ret) {
+ debug(%s: PMIC %d register read failed\n,
__func__, reg);
+ return -1;
+ }
+ val |= regval;
+ ret = pmic_reg_write(p, reg, val);
+ if (ret) {
+ debug(%s: PMIC %d register write failed\n,
__func__, reg);
+ return -1;
+ }
+ return 0;
+}
+
int pmic_probe(struct pmic *p)
{
i2c_set_bus_num(p-bus);
diff --git a/include/power/pmic.h b/include/power/pmic.h
index 0e7aa31..d17dbdc 100644
--- a/include/power/pmic.h
+++ b/include/power/pmic.h
@@ -83,6 +83,7 @@ int pmic_probe(struct pmic *p);
int pmic_reg_read(struct pmic *p, u32 reg, u32 *val);
int pmic_reg_write(struct pmic *p, u32 reg, u32 val);
int pmic_set_output(struct pmic *p, u32 reg, int ldo, int on);
+int pmic_reg_update(struct pmic *p, int reg, uint regval);
#define pmic_i2c_addr (p-hw.i2c.addr)
#define pmic_i2c_tx_num (p-hw.i2c.tx_num)
--
Best regards,
Lukasz Majewski
Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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[U-Boot] [PATCH 5/8] arm: ti: Increase malloc size to 16MB for armv7 boards
The current size of 1MB is not enough use to use DFU. Increase it for ARMv7 boards, all of which should have 32MB or more SDRAM. With this change it is possible to do 'dfu mmc 0' on a Beaglebone Black. Signed-off-by: Simon Glass s...@chromium.org --- include/configs/ti_armv7_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index e89e874..cf7d07d 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -102,7 +102,7 @@ * we are on so we do not need to rely on the command prompt. We set a * console baudrate of 115200 and use the default baud rate table. */ -#define CONFIG_SYS_MALLOC_LEN (1024 10) +#define CONFIG_SYS_MALLOC_LEN (16 20) #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT U-Boot# #define CONFIG_SYS_CONSOLE_INFO_QUIET -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/8] fdt: Add DEV_TREE_BIN option to specify a device tree binary file
In some cases, an externally-built device tree binary is required to be attached to U-Boot. An example is when using image signing, since in that case the .dtb file must include the public keys. Add a DEV_TREE_BIN option to the Makefile, and update the documentation. Usage is something like: make DEV_TREE_BIN=boot/am335x-boneblack-pubkey.dtb Signed-off-by: Simon Glass s...@chromium.org --- Makefile | 8 +++- doc/README.fdt-control | 16 ++-- 2 files changed, 21 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index 07abef4..c651af0 100644 --- a/Makefile +++ b/Makefile @@ -416,9 +416,15 @@ endif all: $(ALL-y) $(SUBDIR_EXAMPLES) +# Allow a device tree binary to be given as a make argument +ifneq ($(DEV_TREE_BIN),) +$(obj)u-boot.dtb: + cp $(DEV_TREE_BIN) $@ +else $(obj)u-boot.dtb: checkdtc $(obj)u-boot $(MAKE) -C dts binary mv $(obj)dts/dt.dtb $@ +endif $(obj)u-boot-dtb.bin: $(obj)u-boot.bin $(obj)u-boot.dtb cat $^ $@ @@ -452,7 +458,7 @@ ifndef CONFIG_SYS_UBOOT_START CONFIG_SYS_UBOOT_START := 0 endif -$(obj)u-boot.img: $(obj)u-boot.bin +$(obj)u-boot.img: $(obj)u-boot$(if $(CONFIG_OF_SEPARATE),-dtb,).bin $(obj)tools/mkimage -A $(ARCH) -T firmware -C none \ -O u-boot -a $(CONFIG_SYS_TEXT_BASE) \ -e $(CONFIG_SYS_UBOOT_START) \ diff --git a/doc/README.fdt-control b/doc/README.fdt-control index 86bae68..8a4aa7a 100644 --- a/doc/README.fdt-control +++ b/doc/README.fdt-control @@ -122,7 +122,8 @@ This should include your CPU or SOC's device tree file, placed in arch/arch/dts, and then make any adjustments required. If CONFIG_OF_EMBED is defined, then it will be picked up and built into -the U-Boot image (including u-boot.bin). +the U-Boot image (including u-boot.bin). This is suitable for debugging +and development only and is not recommended for production devices. If CONFIG_OF_SEPARATE is defined, then it will be built and placed in a u-boot.dtb file alongside u-boot.bin. A common approach is then to @@ -130,7 +131,10 @@ join the two: cat u-boot.bin u-boot.dtb image.bin -and then flash image.bin onto your board. +and then flash image.bin onto your board. Note that U-Boot creates +u-boot-dtb.bin which does the above step for you also. If you are using +CONFIG_SPL_FRAMEWORK, then u-boot.img will be built to include the device +tree binary. If CONFIG_OF_HOSTFILE is defined, then it will be read from a file on startup. This is only useful for sandbox. Use the -d flag to U-Boot to @@ -138,6 +142,14 @@ specify the file to read. You cannot use more than one of these options at the same time. +To use a device tree file that you have compiled yourself, pass +DEV_TREE_BIN=filename to 'make', as in: + + make DEV_TREE_BIN=boot/am335x-boneblack-pubkey.dtb + +Then U-Boot will copy that file to u-boot.dtb, put it in the .img file +if used, and u-boot-dtb.bin. + If you wish to put the fdt at a different address in memory, you can define the fdtcontroladdr environment variable. This is the hex address of the fdt binary blob, and will override either of the options. -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 8/8] RFC: am33xx/omap: Enable secure boot with CONFIG_FIT_SIGNATURE
Enable secure boot functionality. Signed-off-by: Simon Glass s...@chromium.org --- include/configs/am335x_evm.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 8ba6301..1887480 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -20,6 +20,8 @@ #ifndef CONFIG_SPL_BUILD # define CONFIG_FIT +# define CONFIG_FIT_SIGNATURE +# define CONFIG_RSA # define CONFIG_OF_CONTROL # define CONFIG_OF_SEPARATE # define CONFIG_DEFAULT_DEVICE_TREE am335x-boneblack -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] Add bootcount support to SPL
On Fri, Sep 27, 2013 at 10:20:52PM -0300, Otavio Salvador wrote: On Fri, Sep 27, 2013 at 4:26 PM, Tom Rini tr...@ti.com wrote: The following patches depend on the series I posted earlier that adds environment support to SPL as well as the series that converts the davinci bootcount driver to support am335x as well. The most obvious issue to me as that as Scott pointed out with the last series, this would be clearer Kconfig where we wouldn't need to introduce CONFIG_SPL_BOOTCOUNT_SUPPORT and just re-use CONFIG_BOOTCOUNT_SUPPORT. Other than that, I think things look good. It may be possible to re-jigger bootcount drivers to allow counting for both SPL and full U-Boot to happen, if that's strongly desired but the way I see this being used is to fall-back to a failsafe full U-Boot to do what's needed there. I think we need to count both; the SPL part solves the U-Boot failsafe but the full U-Boot is needed to failsafe the OS. It's _possible_ we could split the counter up further, 16bit magic, 8 bit SPL count, 8 bit U-Boot count. But I'm not sure if it's useful. Looking at Stefan's patch, we count in SPL, and use altbootcmd in full U-Boot to know we have failure rather than just booting fully via U-Boot. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 6/8] RFC: am33xx/omap: Enable CONFIG_OF_CONTROL
Add support for device tree control and add device tree files for the
beaglebone black initially.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/arm/dts/am33xx.dtsi | 649 ++
arch/arm/dts/dt-bindings/gpio/gpio.h | 15 +
arch/arm/dts/dt-bindings/pinctrl/am33xx.h | 41 ++
arch/arm/dts/dt-bindings/pinctrl/omap.h | 54 +++
board/ti/dts/am335x-bone-common.dtsi | 262
board/ti/dts/am335x-boneblack.dts | 17 +
board/ti/dts/tps65217.dtsi| 56 +++
include/configs/am335x_evm.h | 6 +
8 files changed, 1100 insertions(+)
create mode 100644 arch/arm/dts/am33xx.dtsi
create mode 100644 arch/arm/dts/dt-bindings/gpio/gpio.h
create mode 100644 arch/arm/dts/dt-bindings/pinctrl/am33xx.h
create mode 100644 arch/arm/dts/dt-bindings/pinctrl/omap.h
create mode 100644 board/ti/dts/am335x-bone-common.dtsi
create mode 100644 board/ti/dts/am335x-boneblack.dts
create mode 100644 board/ti/dts/tps65217.dtsi
diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi
new file mode 100644
index 000..f9c5da9
--- /dev/null
+++ b/arch/arm/dts/am33xx.dtsi
@@ -0,0 +1,649 @@
+/*
+ * Device Tree Source for AM33XX SoC
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include dt-bindings/gpio/gpio.h
+#include dt-bindings/pinctrl/am33xx.h
+
+#include skeleton.dtsi
+
+/ {
+ compatible = ti,am33xx;
+ interrupt-parent = intc;
+
+ aliases {
+ serial0 = uart0;
+ serial1 = uart1;
+ serial2 = uart2;
+ serial3 = uart3;
+ serial4 = uart4;
+ serial5 = uart5;
+ d_can0 = dcan0;
+ d_can1 = dcan1;
+ usb0 = usb0;
+ usb1 = usb1;
+ phy0 = usb0_phy;
+ phy1 = usb1_phy;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+ cpu@0 {
+ compatible = arm,cortex-a8;
+ device_type = cpu;
+ reg = 0;
+
+ /*
+* To consider voltage drop between PMIC and SoC,
+* tolerance value is reduced to 2% from 4% and
+* voltage value is increased as a precaution.
+*/
+ operating-points =
+ /* kHzuV */
+ 72 1285000
+ 60 1225000
+ 50 1125000
+ 275000 1125000
+ ;
+ voltage-tolerance = 2; /* 2 percentage */
+ clock-latency = 30; /* From omap-cpufreq driver */
+ };
+ };
+
+ /*
+* The soc node represents the soc top level view. It is uses for IPs
+* that are not memory mapped in the MPU view or for the MPU itself.
+*/
+ soc {
+ compatible = ti,omap-infra;
+ mpu {
+ compatible = ti,omap3-mpu;
+ ti,hwmods = mpu;
+ };
+ };
+
+ am33xx_pinmux: pinmux@44e10800 {
+ compatible = pinctrl-single;
+ reg = 0x44e10800 0x0238;
+ #address-cells = 1;
+ #size-cells = 0;
+ pinctrl-single,register-width = 32;
+ pinctrl-single,function-mask = 0x7f;
+ };
+
+ /*
+* XXX: Use a flat representation of the AM33XX interconnect.
+* The real AM33XX interconnect network is quite complex.Since
+* that will not bring real advantage to represent that in DT
+* for the moment, just use a fake OCP bus entry to represent
+* the whole bus hierarchy.
+*/
+ ocp {
+ compatible = simple-bus;
+ #address-cells = 1;
+ #size-cells = 1;
+ ranges;
+ ti,hwmods = l3_main;
+
+ intc: interrupt-controller@4820 {
+ compatible = ti,omap2-intc;
+ interrupt-controller;
+ #interrupt-cells = 1;
+ ti,intc-size = 128;
+ reg = 0x4820 0x1000;
+ };
+
+ gpio0: gpio@44e07000 {
+ compatible = ti,omap4-gpio;
+ ti,hwmods = gpio1;
+ gpio-controller;
+ #gpio-cells = 2;
+ interrupt-controller;
+ #interrupt-cells = 1;
+ reg = 0x44e07000 0x1000;
+
Re: [U-Boot] [PATCH 2/6] power: Explicitly select pmic device's bus
Hi Leela,
The current pmic i2c code assumes the current i2c bus is
the same as the pmic device's bus. There is nothing ensuring
that to be true. Therefore, select the proper bus before performing
a transaction.
Signed-off-by: Aaron Durbin adur...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Doug Anderson diand...@google.com
---
drivers/power/power_i2c.c | 62
+ 1 file changed, 57
insertions(+), 5 deletions(-)
diff --git a/drivers/power/power_i2c.c b/drivers/power/power_i2c.c
index 47c606f..c22e01f 100644
--- a/drivers/power/power_i2c.c
+++ b/drivers/power/power_i2c.c
@@ -16,9 +16,45 @@
#include i2c.h
#include compiler.h
+static int pmic_select(struct pmic *p)
+{
+ int ret, old_bus;
+
+ old_bus = i2c_get_bus_num();
+ if (old_bus != p-bus) {
+ debug(%s: Select bus %d\n, __func__, p-bus);
+ ret = i2c_set_bus_num(p-bus);
+ if (ret) {
+ debug(%s: Cannot select pmic %s, err %d\n,
+ __func__, p-name, ret);
+ return -1;
+ }
+ }
+
+ return old_bus;
+}
+
+static int pmic_deselect(int old_bus)
+{
+ int ret;
+
+ if (old_bus != i2c_get_bus_num()) {
+ ret = i2c_set_bus_num(old_bus);
+ debug(%s: Select bus %d\n, __func__, old_bus);
+ if (ret) {
+ debug(%s: Cannot restore i2c bus, err %d\n,
+ __func__, ret);
+ return -1;
+ }
+ }
+
+ return 0;
+}
+
int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
{
unsigned char buf[4] = { 0 };
+ int ret, old_bus;
if (check_reg(p, reg))
return -1;
@@ -52,23 +88,33 @@ int pmic_reg_write(struct pmic *p, u32 reg, u32
val) return -1;
}
- if (i2c_write(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num))
+ old_bus = pmic_select(p);
+ if (old_bus 0)
return -1;
- return 0;
+ ret = i2c_write(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num);
I'm wondering if setting the bus before each, single i2c write (when we
usually perform several writes to one device) will not be an overkill
(we search the ll_entry_count linker list each time to find max i2c
adapter names) ?
The i2c_set_bus_num() is now done at pmic_probe(), but this also
introduces overkill for probing each device when we want to read from
it.
As a side note - I would appreciate if you would add Stefano Babic and
me on the Cc (as we are listed at e.g. power_core.c).
+ pmic_deselect(old_bus);
+ return ret;
}
int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
{
unsigned char buf[4] = { 0 };
u32 ret_val = 0;
+ int ret, old_bus;
if (check_reg(p, reg))
return -1;
- if (i2c_read(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num))
+ old_bus = pmic_select(p);
+ if (old_bus 0)
return -1;
+ ret = i2c_read(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num);
+ pmic_deselect(old_bus);
+ if (ret)
+ return ret;
+
switch (pmic_i2c_tx_num) {
case 3:
if (p-sensor_byte_order ==
PMIC_SENSOR_BYTE_ORDER_BIG) @@ -117,9 +163,15 @@ int
pmic_reg_update(struct pmic *p, int reg, uint regval)
int pmic_probe(struct pmic *p)
{
- i2c_set_bus_num(p-bus);
+ int ret, old_bus;
+
+ old_bus = pmic_select(p);
+ if (old_bus 0)
+ return -1;
debug(Bus: %d PMIC:%s probed!\n, p-bus, p-name);
- if (i2c_probe(pmic_i2c_addr)) {
+ ret = i2c_probe(pmic_i2c_addr);
+ pmic_deselect(old_bus);
+ if (ret) {
printf(Can't find PMIC:%s\n, p-name);
return -1;
}
--
Best regards,
Lukasz Majewski
Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH 4/6] SMDK5420: S2MPS11: Adds the register settings for S2MPS11
Hi Leela,
Adds the register settings, addresses and voltages associated with
S2MPS11
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Vadim Bendebury vben...@google.com
---
include/power/s2mps11_pmic.h | 144
++ 1 file changed, 144
insertions(+) create mode 100644 include/power/s2mps11_pmic.h
diff --git a/include/power/s2mps11_pmic.h
b/include/power/s2mps11_pmic.h new file mode 100644
index 000..e4f21f9
--- /dev/null
+++ b/include/power/s2mps11_pmic.h
@@ -0,0 +1,144 @@
+/*
+ * s2mps11_pmic.h
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
modify it
+ * under the terms of the GNU General Public License as
published by the
+ * Free Software Foundation; either version 2 of the License, or
(at your
+ * option) any later version.
We have switched to SPDX license. Please write similar code to e.g.
power_core.c
+ *
+ */
+#ifndef __S2MPS11_H
+#define __S2MPS11_H
+
+/* S2MPS11 registers */
+enum s2mps11_reg {
+ S2MPS11_REG_ID,
+ S2MPS11_REG_INT1,
+ S2MPS11_REG_INT2,
+ S2MPS11_REG_INT3,
+ S2MPS11_REG_INT1M,
+ S2MPS11_REG_INT2M,
+ S2MPS11_REG_INT3M,
+ S2MPS11_REG_ST1,
+ S2MPS11_REG_ST2,
+ S2MPS11_REG_OFFSRC,
+ S2MPS11_REG_PWRONSRC,
+ S2MPS11_REG_RTC_CTRL,
+ S2MPS11_REG_CTRL1,
+ S2MPS11_REG_ETC_TEST,
+ S2MPS11_REG_RSVD3,
+ S2MPS11_REG_BU_CHG,
+ S2MPS11_REG_RAMP,
+ S2MPS11_REG_RAMP_BUCK,
+ S2MPS11_REG_LDO1_8,
+ S2MPS11_REG_LDO9_16,
+ S2MPS11_REG_LDO17_24,
+ S2MPS11_REG_LDO25_32,
+ S2MPS11_REG_LDO33_38,
+ S2MPS11_REG_LDO1_8_1,
+ S2MPS11_REG_LDO9_16_1,
+ S2MPS11_REG_LDO17_24_1,
+ S2MPS11_REG_LDO25_32_1,
+ S2MPS11_REG_LDO33_38_1,
+ S2MPS11_REG_OTP_ADRL,
+ S2MPS11_REG_OTP_ADRH,
+ S2MPS11_REG_OTP_DATA,
+ S2MPS11_REG_MON1SEL,
+ S2MPS11_REG_MON2SEL,
+ S2MPS11_REG_LEE,
+ S2MPS11_REG_RSVD_NO,
+ S2MPS11_REG_UVLO,
+ S2MPS11_REG_LEE_NO,
+ S2MPS11_REG_B1CTRL1,
+ S2MPS11_REG_B1CTRL2,
+ S2MPS11_REG_B2CTRL1,
+ S2MPS11_REG_B2CTRL2,
+ S2MPS11_REG_B3CTRL1,
+ S2MPS11_REG_B3CTRL2,
+ S2MPS11_REG_B4CTRL1,
+ S2MPS11_REG_B4CTRL2,
+ S2MPS11_REG_B5CTRL1,
+ S2MPS11_REG_BUCK5_SW,
+ S2MPS11_REG_B5CTRL2,
+ S2MPS11_REG_B5CTRL3,
+ S2MPS11_REG_B5CTRL4,
+ S2MPS11_REG_B5CTRL5,
+ S2MPS11_REG_B6CTRL1,
+ S2MPS11_REG_B6CTRL2,
+ S2MPS11_REG_B7CTRL1,
+ S2MPS11_REG_B7CTRL2,
+ S2MPS11_REG_B8CTRL1,
+ S2MPS11_REG_B8CTRL2,
+ S2MPS11_REG_B9CTRL1,
+ S2MPS11_REG_B9CTRL2,
+ S2MPS11_REG_B10CTRL1,
+ S2MPS11_REG_B10CTRL2,
+ S2MPS11_REG_L1CTRL,
+ S2MPS11_REG_L2CTRL,
+ S2MPS11_REG_L3CTRL,
+ S2MPS11_REG_L4CTRL,
+ S2MPS11_REG_L5CTRL,
+ S2MPS11_REG_L6CTRL,
+ S2MPS11_REG_L7CTRL,
+ S2MPS11_REG_L8CTRL,
+ S2MPS11_REG_L9CTRL,
+ S2MPS11_REG_L10CTRL,
+ S2MPS11_REG_L11CTRL,
+ S2MPS11_REG_L12CTRL,
+ S2MPS11_REG_L13CTRL,
+ S2MPS11_REG_L14CTRL,
+ S2MPS11_REG_L15CTRL,
+ S2MPS11_REG_L16CTRL,
+ S2MPS11_REG_L17CTRL,
+ S2MPS11_REG_L18CTRL,
+ S2MPS11_REG_L19CTRL,
+ S2MPS11_REG_L20CTRL,
+ S2MPS11_REG_L21CTRL,
+ S2MPS11_REG_L22CTRL,
+ S2MPS11_REG_L23CTRL,
+ S2MPS11_REG_L24CTRL,
+ S2MPS11_REG_L25CTRL,
+ S2MPS11_REG_L26CTRL,
+ S2MPS11_REG_L27CTRL,
+ S2MPS11_REG_L28CTRL,
+ S2MPS11_REG_L29CTRL,
+ S2MPS11_REG_L30CTRL,
+ S2MPS11_REG_L31CTRL,
+ S2MPS11_REG_L32CTRL,
+ S2MPS11_REG_L33CTRL,
+ S2MPS11_REG_L34CTRL,
+ S2MPS11_REG_L35CTRL,
+ S2MPS11_REG_L36CTRL,
+ S2MPS11_REG_L37CTRL,
+ S2MPS11_REG_L38CTRL,
+
+ S2MPS11_NUM_OF_REGS,
+};
+
+/* I2C device address for pmic S2MPS11 */
+#define S2MPS11_I2C_ADDR (0xCC 1)
+#define S2MPS11_BUS_NUM 4
+
+/* Value to set voltage as 1V */
+#define S2MPS11_BUCK_CTRL2_1V0x40
+/* Value to set voltage as 1.2V */
+#define S2MPS11_BUCK_CTRL2_1_2V 0x60
+/* Value to set voltage as 1.2625V */
+#define S2MPS11_BUCK_CTRL2_1_2625V 0x6A
+
+/* Buck register addresses */
+#define S2MPS11_BUCK1_CTRL2 0x26
+#define S2MPS11_BUCK2_CTRL2 0x28
+#define S2MPS11_BUCK3_CTRL2 0x2a
+#define S2MPS11_BUCK4_CTRL2 0x2c
+#define S2MPS11_BUCK6_CTRL2 0x34
+#define S2MPS11_LDO22_CTRL 0x52
+
+#define S2MPS11_DEVICE_NAME S2MPS11_PMIC
+
+#define S2MPS11_RTC_CTRL_32KHZ_CP_EN (1 1)
+#define S2MPS11_RTC_CTRL_JIT (1 4)
+#endif /* __LINUX_MFD_S2MPS11_H */
--
Best regards,
Lukasz Majewski
Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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[U-Boot] Pull request: u-boot-arm/master
Hello Tom, The following changes since commit 8386ca8bea7a6a8469c3b6a99313afb642e6cbeb: Revert standalone-examples: support custom GCC lib (2013-09-12 10:27:29 -0400) are available in the git repository at: git://git.denx.De/u-boot-arm master for you to fetch changes up to f04c53762962280365005c9db12ab561a18f2692: Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' (2013-10-02 14:53:27 +0200) Albert ARIBAUD (3): Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master' Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' Andrew Gabbasov (1): mx6: Fix calculation of emi_slow clock rate Elie De Brauwer (1): mxs_nand: Fix ECC strength for NAND flash with OOB size of 224 Eric Nelson (2): i.MX6DL/S: add drive-strength back to pads DISP0_DAT2/DAT10 i.MX6DQ/DLS: Add pad MX6_PAD_GPIO_1__USB_OTG_ID Fabio Estevam (17): mx6sabresd: Add LVDS splash screen support wandboard: Use imx6dl-wandboard.dtb for the solo version mx6sabresd: Avoid hang when HDMI cable is not connected mx6sabresd: Reset counter to prevent error message mmc: fsl_esdhc: Check the result from malloc() mx35pdk: Remove CONFIG_SYS_CACHELINE_SIZE mx6sabresd: Return error if cpu_eth_init() fails mx6qsabreauto: Return error if cpu_eth_init() fails net: fec_mxc: Add support for mx6 solo-lite mx6slevk: Add Ethernet support mx28evk: Fix checkpatch warning doc: README.mxs: Add instruction to install 'libssl-dev' mx6sabresd: Fix the fdt file for the mx6dl version net: fec_mxc: Fix timeouts during tftp transfer mx28evk: Propagate the error if cpu_eth_init() fails mx28evk: Propagate the error if cpu_eth_init() fails mx35pdk: Fix error handling in board_late_init() Greg Guyotte (1): drivers/power/pmic: Add tps65217 driver Heiko Schocher (1): net, phy, cpsw: fix NULL pointer deference Jens Scharsig (BuS Elektronik) (1): arm: atmel: cpux9k2: increase malloc space to fix crash on start u-boot Jeroen Hofstee (4): arm: prevent using movt/movw address loads ARM,relocate: do not use r9 ARM: use r9 for gd README: update ARM register usage Kuo-Jung Su (1): arm: dma_alloc_coherent: malloc() - memalign() Lokesh Vutla (2): ARM: DRA7: Enable saveenv command ARM: OMAP5: Avoid writing into LDO SRAM bits Marek Vasut (6): tools: mxsboot: Mark the FCB pages as valid ARM: mxs: Sort the mx23evk and mx23_olinuxino ARM: mxs: Document the power block initialization ARM: mxs: Receive r0 and r1 passed from BootROM ARM: mxs: Add Creative ZEN XFi3 board ARM: mxs: Add SanDisk Sansa Fuze+ board Markus Niebel (1): ARM: arch-mx6: fix PLL2_PFD2_FREQ Masahiro Yamada (6): arm: spl: Do not set the stack pointer twice ARM: s3c44b0: remove remainders of dead board drivers: s3c44b0_i2c: delete an unused driver drivers: serial_s3c44b0: delete an unused driver drivers: s3c44b0_rtc: delete an unused driver ARM: refactor compiler options in config.mk Michal Simek (1): arm: zynq: Fix timer loadaddress Philip, Avinash (1): drivers/power/pmic: Add tps65910 driver Pierre Aubert (1): mx6: Fix use of improper value in enable_ipu_clock Robert P. J. Day (1): am335x_evm.h: If mmcdev and bootpart switch to mmcdev 1, so should mmcroot. Robert Winkler (1): imx: nitrogen6x/mx6qsabrelite: Fix bug in board_video_skip Stefano Babic (1): Merge branch 'master' of git://git.denx.de/u-boot-arm Steve Kipisz (1): am335x:Handle worst case scenario for Errata 1.0.24 Tom Rini (4): spl/Makefile: Add drivers/power/pmic/libpmic to CONFIG_SPL_POWER_SUPPORT am33xx: Add am33xx_spl_board_init function, call am33xx: Add the efuse_sma CONTROL_MODULE register am335x_evm: am33xx_spl_board_init function and scale core frequency York Sun (1): tools/imximage.c: Fix compiling warning trem (3): mx27: add missing constant for mx27 apf27: add support for the armadeus APF27 board apf27: add FPGA support for the apf27 board README | 9 ++- arch/arm/config.mk | 11 ++- arch/arm/cpu/arm1136/config.mk | 1 - arch/arm/cpu/arm1176/config.mk | 1 - arch/arm/cpu/arm720t/config.mk | 2 - arch/arm/cpu/arm920t/config.mk | 2 - arch/arm/cpu/arm925t/config.mk | 2 - arch/arm/cpu/arm926ejs/config.mk | 2 - arch/arm/cpu/arm926ejs/mx27/asm-offsets.c | 5 ++ arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 5 +- arch/arm/cpu/arm926ejs/mxs/spl_power_init.c| 209
Re: [U-Boot] [PATCH v4 3/4] generic board patch of manual reloc and zero gd_t
On Wed, 2013-10-02 at 09:52 +0800, FengHua wrote: -原始邮件- 发件人: Scott Wood scottw...@freescale.com 发送时间: 2013年10月1日 星期二 收件人: FengHua feng...@phytium.com.cn 抄送: Simon Glass s...@chromium.org, trini tr...@ti.com, u-boot u-boot@lists.denx.de 主题: Re: Re: [U-Boot] [PATCH v4 3/4] generic board patch of manual reloc and zero gd_t On Tue, 2013-10-01 at 19:05 +0800, FengHua wrote: How about place u-boot.bin at 0x9000 and write a piece of code (elf format) jumping from 0x8000 to 0x9000. That seems even worse than converting the .bin back into an ELF... Why? I could load u-boot.bin at 0x9000 as data, I think it should works. Or maybe secure state make the program jumping to secure memory. so try switching to el2 before jumping. It requires building another program image (even if it's a relatively simple one), as opposed to just invoking objcopy and ld, and it makes invoking the simulator more complicated. Do you know why loading the raw image at 0x8000 isn't working? The foundation model require a elf(axf) image being loaded, it use it to determine the entry point. Then why does it even try to start without an ELF being supplied (but won't try to start if I don't supply ELF *or* raw data)? Why is there no other way to supply an entry point (even just defaulting to the beginning of the raw image if no ELF is provided)? Why does it fail when I supply *both* the ELF and the raw image, in either order? -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 09/32] sf: probe: Add support for SST25* flash parts
Added SST25* parts are which are avilable in spi_flash_probe_legacy.c.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Tested-by: Eric Nelson eric.nel...@boundarydevices.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- Enable CONFIG_SPI_FLASH_SST
drivers/mtd/spi/spi_flash_probe.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index a9ac571..d0955bf 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -88,6 +88,18 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
{N25Q1024,0x20ba21, 0x0, 64 * 1024, 2048},
{N25Q1024A, 0x20bb21, 0x0, 64 * 1024, 2048},
#endif
+#ifdef CONFIG_SPI_FLASH_SST/* SST */
+ {SST25VF040B, 0xbf258d, 0x0, 64 * 1024, 8},
+ {SST25VF080B, 0xbf258e, 0x0, 64 * 1024, 16},
+ {SST25VF016B, 0xbf2541, 0x0, 64 * 1024, 32},
+ {SST25VF032B, 0xbf254a, 0x0, 64 * 1024, 64},
+ {SST25VF064C, 0xbf254b, 0x0, 64 * 1024,128},
+ {SST25WF512, 0xbf2501, 0x0, 64 * 1024, 1},
+ {SST25WF010, 0xbf2502, 0x0, 64 * 1024, 2},
+ {SST25WF020, 0xbf2503, 0x0, 64 * 1024, 4},
+ {SST25WF040, 0xbf2504, 0x0, 64 * 1024, 8},
+ {SST25WF080, 0xbf2505, 0x0, 64 * 1024, 16},
+#endif
#ifdef CONFIG_SPI_FLASH_WINBOND/* WINBOND */
{W25P80, 0xef2014, 0x0, 64 * 1024, 16},
{W25P16, 0xef2015, 0x0, 64 * 1024, 32},
@@ -125,7 +137,6 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
* TODO:
* ATMEL
* RAMTRON
-* SST
*/
};
--
1.8.3
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[U-Boot] [PATCH v5 10/32] sf: probe: Add support for AT45DB* flash parts
Added AT45DB* parts are which are avilable in spi_flash_probe_legacy.c.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- Enable CONFIG_SPI_FLASH_ATMEL
drivers/mtd/spi/spi_flash_probe.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index d0955bf..af43272 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -36,6 +36,15 @@ struct spi_flash_params {
};
static const struct spi_flash_params spi_flash_params_table[] = {
+#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
+ {AT45DB011D, 0x1f2200, 0x0, 64 * 1024, 4},
+ {AT45DB021D, 0x1f2300, 0x0, 64 * 1024, 8},
+ {AT45DB041D, 0x1f2400, 0x0, 64 * 1024, 8},
+ {AT45DB081D, 0x1f2500, 0x0, 64 * 1024, 16},
+ {AT45DB161D, 0x1f2600, 0x0, 64 * 1024, 32},
+ {AT45DB321D, 0x1f2700, 0x0, 64 * 1024, 64},
+ {AT45DB641D, 0x1f2800, 0x0, 64 * 1024,128},
+#endif
#ifdef CONFIG_SPI_FLASH_EON/* EON */
{EN25Q32B,0x1c3016, 0x0, 64 * 1024, 64},
{EN25Q128B, 0x1c3018, 0x0, 64 * 1024,256},
@@ -135,7 +144,6 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
*/
/*
* TODO:
-* ATMEL
* RAMTRON
*/
};
--
1.8.3
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[U-Boot] [PATCH v5 25/32] sf: ops: Add static qualifier to spi_flash_cmd_bankaddr_write
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/spi_flash_internal.h | 5 -
drivers/mtd/spi/spi_flash_ops.c | 2 +-
2 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_internal.h
b/drivers/mtd/spi/spi_flash_internal.h
index 86966f6..1f9f170 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -94,11 +94,6 @@ static inline int spi_flash_cmd_write_disable(struct
spi_flash *flash)
/* Program the status register. */
int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
-#ifdef CONFIG_SPI_FLASH_BAR
-/* Program the bank address register */
-int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel);
-#endif
-
/*
* Same as spi_flash_cmd_read() except it also claims/releases the SPI
* bus. Used as common part of the -read() operation.
diff --git a/drivers/mtd/spi/spi_flash_ops.c b/drivers/mtd/spi/spi_flash_ops.c
index c408e27..b4e1c40 100644
--- a/drivers/mtd/spi/spi_flash_ops.c
+++ b/drivers/mtd/spi/spi_flash_ops.c
@@ -39,7 +39,7 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
}
#ifdef CONFIG_SPI_FLASH_BAR
-int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
+static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
{
u8 cmd;
int ret;
--
1.8.3
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[U-Boot] [PATCH v5 16/32] sf: probe: Simply the BAR configuration logic
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- more simplification.
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/spi_flash_internal.h | 8 -
drivers/mtd/spi/spi_flash_probe.c| 66 +++-
2 files changed, 20 insertions(+), 54 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_internal.h
b/drivers/mtd/spi/spi_flash_internal.h
index ce34ce0..61de237 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -31,11 +31,6 @@
#define SPI_FLASH_16MB_BOUN0x100
-/* Manufacture ID's */
-#define SPI_FLASH_SPANSION_IDCODE0 0x01
-#define SPI_FLASH_STMICRO_IDCODE0 0x20
-#define SPI_FLASH_WINBOND_IDCODE0 0xef
-
#ifdef CONFIG_SPI_FLASH_BAR
/* Bank addr access commands */
# define CMD_BANKADDR_BRWR 0x17
@@ -102,9 +97,6 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8
sr);
#ifdef CONFIG_SPI_FLASH_BAR
/* Program the bank address register */
int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel);
-
-/* Configure the BAR - discover the bank cmds */
-int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0);
#endif
/*
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 8ea6915..cc30ad1 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -221,54 +221,36 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave
*spi, u8 *idcode)
flash-poll_cmd = CMD_FLAG_STATUS;
#endif
- /* Flash powers up read-only, so clear BP# bits */
-#if defined(CONFIG_SPI_FLASH_ATMEL) || \
- defined(CONFIG_SPI_FLASH_MACRONIX) || \
- defined(CONFIG_SPI_FLASH_SST)
- spi_flash_cmd_write_status(flash, 0);
-#endif
-
- return flash;
-}
-
#ifdef CONFIG_SPI_FLASH_BAR
-int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
-{
- u8 cmd;
+ /* Configure the BAR - discover bank cmds and read current bank */
u8 curr_bank = 0;
-
- /* discover bank cmds */
- switch (idcode0) {
- case SPI_FLASH_SPANSION_IDCODE0:
- flash-bank_read_cmd = CMD_BANKADDR_BRRD;
- flash-bank_write_cmd = CMD_BANKADDR_BRWR;
- break;
- case SPI_FLASH_STMICRO_IDCODE0:
- case SPI_FLASH_WINBOND_IDCODE0:
- flash-bank_read_cmd = CMD_EXTNADDR_RDEAR;
- flash-bank_write_cmd = CMD_EXTNADDR_WREAR;
- break;
- default:
- printf(SF: Unsupported bank commands %02x\n, idcode0);
- return -1;
- }
-
- /* read the bank reg - on which bank the flash is in currently */
- cmd = flash-bank_read_cmd;
if (flash-size SPI_FLASH_16MB_BOUN) {
- if (spi_flash_read_common(flash, cmd, 1, curr_bank, 1)) {
+ flash-bank_read_cmd = (idcode[0] == 0x01) ?
+ CMD_BANKADDR_BRRD : CMD_EXTNADDR_RDEAR;
+ flash-bank_write_cmd = (idcode[0] == 0x01) ?
+ CMD_BANKADDR_BRWR : CMD_EXTNADDR_WREAR;
+
+ if (spi_flash_read_common(flash, flash-bank_read_cmd, 1,
+ curr_bank, 1)) {
debug(SF: fail to read bank addr register\n);
- return -1;
+ return NULL;
}
flash-bank_curr = curr_bank;
} else {
flash-bank_curr = curr_bank;
}
+#endif
- return 0;
-}
+ /* Flash powers up read-only, so clear BP# bits */
+#if defined(CONFIG_SPI_FLASH_ATMEL) || \
+ defined(CONFIG_SPI_FLASH_MACRONIX) || \
+ defined(CONFIG_SPI_FLASH_SST)
+ spi_flash_cmd_write_status(flash, 0);
#endif
+ return flash;
+}
+
#ifdef CONFIG_OF_CONTROL
int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
{
@@ -302,7 +284,7 @@ struct spi_flash *spi_flash_probe(unsigned int bus,
unsigned int cs,
{
struct spi_slave *spi;
struct spi_flash *flash = NULL;
- u8 idcode[5], *idp;
+ u8 idcode[5];
int ret;
/* Setup spi_slave */
@@ -332,18 +314,10 @@ struct spi_flash *spi_flash_probe(unsigned int bus,
unsigned int cs,
#endif
/* Validate ID's from flash dev table */
- idp = idcode;
- flash = spi_flash_validate_ids(spi, idp);
+ flash = spi_flash_validate_ids(spi, idcode);
if (!flash)
goto err_read_id;
-#ifdef CONFIG_SPI_FLASH_BAR
- /* Configure the BAR - discover bank cmds and read current bank */
- ret = spi_flash_bank_config(flash, *idp);
- if (ret 0)
- goto err_read_id;
-#endif
-
#ifdef CONFIG_OF_CONTROL
if (spi_flash_decode_fdt(gd-fdt_blob, flash)) {
debug(SF: FDT decode
[U-Boot] [PATCH v5 32/32] doc: SPI: Add status.txt for tracking SPI subsys status
doc/SPI/status.txt added to track the u-boot SPI subsystem status. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- Changes for v5: - none Changes for v4: - none Changes for v3: - none Changes for v2: - none doc/SPI/status.txt | 28 1 file changed, 28 insertions(+) create mode 100644 doc/SPI/status.txt diff --git a/doc/SPI/status.txt b/doc/SPI/status.txt new file mode 100644 index 000..6050e4a --- /dev/null +++ b/doc/SPI/status.txt @@ -0,0 +1,28 @@ +Status on SPI subsystem: +=== + +SPI COMMAND (common/cmd_sf, cmd_spi): +- + +SPI FLASH (drivers/mtd/spi): +- sf_probe.c: SPI flash probing code. +- sf_ops.c: SPI flash operations code. +- sf.c: SPI flash interface, which interacts controller driver. +- Bank Address Register (Accessing flashes 16Mbytes in 3-byte addressing) +- Common probe support for all supported flash vendors except, ramtron. + +SPI DRIVERS (drivers/spi): +- + +TODO: +- Runtime detection of spi_flash params(if possible) +- Extended read commands support(dual read, dual IO read) +- Quad Page Program support. +- Quad Read support(quad fast read, quad IO read) +- Dual flash connection topology support(accessing two spi flash memories with single cs) +- Banking support on dual flash connection topology. +- Need proper cleanups on spi_flash and drivers. + +-- +Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com +18-09-2013. -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 08/32] sf: probe: Add support for S25FL* flash parts
Added S25FL* parts are which are avilable in spi_flash_probe_legacy.c.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- Enable CONFIG_SPI_FLASH_SPANSION
drivers/mtd/spi/spi_flash_probe.c | 31 +--
1 file changed, 25 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 62fbd4f..a9ac571 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -53,6 +53,19 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
{MX25L12805, 0xc22018, 0x0, 64 * 1024,256},
{MX25L12855E, 0xc22618, 0x0, 64 * 1024,256},
#endif
+#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
+ {S25FL008A, 0x010213, 0x0, 64 * 1024, 16},
+ {S25FL016A, 0x010214, 0x0, 64 * 1024, 32},
+ {S25FL032A, 0x010215, 0x0, 64 * 1024, 64},
+ {S25FL064A, 0x010216, 0x0, 64 * 1024,128},
+ {S25FL128P_256K, 0x012018, 0x0300, 256 * 1024, 64},
+ {S25FL128P_64K, 0x012018, 0x0301, 64 * 1024,256},
+ {S25FL032P, 0x010215, 0x4d00, 64 * 1024, 64},
+ {S25FL064P, 0x010216, 0x4d00, 64 * 1024,128},
+ {S25FL128S_64K, 0x012018, 0x4d01, 64 * 1024,256},
+ {S25FL256S_64K, 0x010219, 0x4d01, 64 * 1024,512},
+ {S25FL512S_64K, 0x010220, 0x4d01, 64 * 1024, 1024},
+#endif
#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
{M25P10, 0x202011, 0x0, 32 * 1024, 4},
{M25P20, 0x202012, 0x0, 64 * 1024, 4},
@@ -98,6 +111,7 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
/*
* Note:
* Below paired flash devices has similar spi_flash_params params.
+* (S25FL129P_64K, S25FL128S_64K)
* (W25Q80BL, W25Q80BV)
* (W25Q16CL, W25Q16DV)
* (W25Q32BV, W25Q32FV_SPI)
@@ -111,7 +125,6 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
* TODO:
* ATMEL
* RAMTRON
-* SPANSION
* SST
*/
};
@@ -122,19 +135,25 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave
*spi, u8 *idcode)
struct spi_flash *flash;
int i;
u16 jedec = idcode[1] 8 | idcode[2];
+ u16 ext_jedec = idcode[3] 8 | idcode[4];
- /* Get the flash id (jedec = manuf_id + dev_id) */
+ /* Get the flash id (jedec = manuf_id + dev_id, ext_jedec) */
for (i = 0; i ARRAY_SIZE(spi_flash_params_table); i++) {
params = spi_flash_params_table[i];
if ((params-jedec 16) == idcode[0]) {
- if ((params-jedec 0x) == jedec)
- break;
+ if ((params-jedec 0x) == jedec) {
+ if (params-ext_jedec == 0)
+ break;
+ else if (params-ext_jedec == ext_jedec)
+ break;
+ }
}
}
if (i == ARRAY_SIZE(spi_flash_params_table)) {
- printf(SF: Unsupported flash ID: manuf %02x, jedec %04x\n,
- idcode[0], jedec);
+ printf(SF: Unsupported flash IDs: );
+ printf(manuf %02x, jedec %04x, ext_jedec %04x\n,
+ idcode[0], jedec, ext_jedec);
return NULL;
}
--
1.8.3
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[U-Boot] [PATCH v5 06/32] sf: probe: Add support for MX25L* flash parts
Added MX25L* parts are which are avilable in spi_flash_probe_legacy.c.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- Enable CONFIG_SPI_FLASH_MACRONIX
drivers/mtd/spi/spi_flash_probe.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index a66bcf9..7b36f60 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -44,6 +44,15 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
{GD25Q64B,0xc84017, 0x0, 64 * 1024,128},
{GD25LQ32,0xc86016, 0x0, 64 * 1024, 64},
#endif
+#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
+ {MX25L4005, 0xc22013, 0x0, 64 * 1024, 8},
+ {MX25L8005, 0xc22014, 0x0, 64 * 1024, 16},
+ {MX25L1605D, 0xc22015, 0x0, 64 * 1024, 32},
+ {MX25L3205D, 0xc22016, 0x0, 64 * 1024, 64},
+ {MX25L6405D, 0xc22017, 0x0, 64 * 1024,128},
+ {MX25L12805, 0xc22018, 0x0, 64 * 1024,256},
+ {MX25L12855E, 0xc22618, 0x0, 64 * 1024,256},
+#endif
#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
{M25P10, 0x202011, 0x0, 32 * 1024, 4},
{M25P20, 0x202012, 0x0, 64 * 1024, 4},
@@ -69,7 +78,6 @@ static const struct spi_flash_params spi_flash_params_table[]
= {
/*
* TODO:
* ATMEL
-* MACRONIX
* RAMTRON
* SPANSION
* SST
--
1.8.3
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[U-Boot] [PATCH v5 14/32] sf: probe: Add support for erase sector selection flag
SECT_4K, SECT_32K and SECT_64K opeartions are performed to
to specific flash by adding a SECT* flag on respective
spi_flash_params.flag param.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- Update the sector flag for winbond
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/spi_flash_ops.c | 8 +-
drivers/mtd/spi/spi_flash_probe.c | 166 --
include/spi_flash.h | 10 ++-
3 files changed, 100 insertions(+), 84 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_ops.c b/drivers/mtd/spi/spi_flash_ops.c
index 79381b1..c408e27 100644
--- a/drivers/mtd/spi/spi_flash_ops.c
+++ b/drivers/mtd/spi/spi_flash_ops.c
@@ -153,17 +153,13 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32
offset, size_t len)
u8 cmd[4];
int ret = -1;
- erase_size = flash-sector_size;
+ erase_size = flash-erase_size;
if (offset % erase_size || len % erase_size) {
debug(SF: Erase offset/length not multiple of erase size\n);
return -1;
}
- if (erase_size == 4096)
- cmd[0] = CMD_ERASE_4K;
- else
- cmd[0] = CMD_ERASE_64K;
-
+ cmd[0] = flash-erase_cmd;
while (len) {
#ifdef CONFIG_SPI_FLASH_BAR
u8 bank_sel;
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 4659134..9c2e115 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -39,97 +39,97 @@ struct spi_flash_params {
static const struct spi_flash_params spi_flash_params_table[] = {
#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
- {AT45DB011D, 0x1f2200, 0x0, 64 * 1024, 4,0},
- {AT45DB021D, 0x1f2300, 0x0, 64 * 1024, 8,0},
- {AT45DB041D, 0x1f2400, 0x0, 64 * 1024, 8,0},
- {AT45DB081D, 0x1f2500, 0x0, 64 * 1024,16,0},
- {AT45DB161D, 0x1f2600, 0x0, 64 * 1024,32,0},
- {AT45DB321D, 0x1f2700, 0x0, 64 * 1024,64,0},
- {AT45DB641D, 0x1f2800, 0x0, 64 * 1024, 128,0},
+ {AT45DB011D, 0x1f2200, 0x0, 64 * 1024, 4,
SECT_4K},
+ {AT45DB021D, 0x1f2300, 0x0, 64 * 1024, 8,
SECT_4K},
+ {AT45DB041D, 0x1f2400, 0x0, 64 * 1024, 8,
SECT_4K},
+ {AT45DB081D, 0x1f2500, 0x0, 64 * 1024,16,
SECT_4K},
+ {AT45DB161D, 0x1f2600, 0x0, 64 * 1024,32,
SECT_4K},
+ {AT45DB321D, 0x1f2700, 0x0, 64 * 1024,64,
SECT_4K},
+ {AT45DB641D, 0x1f2800, 0x0, 64 * 1024, 128,
SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_EON/* EON */
- {EN25Q32B, 0x1c3016, 0x0, 64 * 1024,64,0},
- {EN25Q128B, 0x1c3018, 0x0, 64 * 1024, 256,0},
+ {EN25Q32B, 0x1c3016, 0x0, 64 * 1024,64,
0},
+ {EN25Q128B, 0x1c3018, 0x0, 64 * 1024, 256,
0},
#endif
#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
- {GD25Q64B, 0xc84017, 0x0, 64 * 1024, 128,0},
- {GD25LQ32, 0xc86016, 0x0, 64 * 1024,64,0},
+ {GD25Q64B, 0xc84017, 0x0, 64 * 1024, 128,
SECT_4K},
+ {GD25LQ32, 0xc86016, 0x0, 64 * 1024,64,
SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
- {MX25L4005, 0xc22013, 0x0, 64 * 1024, 8,0},
- {MX25L8005, 0xc22014, 0x0, 64 * 1024,16,0},
- {MX25L1605D, 0xc22015, 0x0, 64 * 1024,32,0},
- {MX25L3205D, 0xc22016, 0x0, 64 * 1024,64,0},
- {MX25L6405D, 0xc22017, 0x0, 64 * 1024, 128,0},
- {MX25L12805, 0xc22018, 0x0, 64 * 1024, 256,0},
- {MX25L12855E,0xc22618, 0x0, 64 * 1024, 256,0},
+ {MX25L4005, 0xc22013, 0x0, 64 * 1024, 8,
0},
+ {MX25L8005, 0xc22014, 0x0, 64 * 1024,16,
0},
+ {MX25L1605D, 0xc22015, 0x0, 64 * 1024,32,
0},
+ {MX25L3205D, 0xc22016, 0x0, 64 * 1024,64,
0},
+ {MX25L6405D, 0xc22017, 0x0, 64 * 1024, 128,
0},
+ {MX25L12805, 0xc22018, 0x0, 64 * 1024, 256,
0},
+ {MX25L12855E,0xc22618, 0x0, 64 * 1024, 256,
0},
#endif
#ifdef CONFIG_SPI_FLASH_SPANSION
[U-Boot] [PATCH v5 27/32] sf: probe: Add support for MX25L51235F
Add support for Macronix MX25L51235F SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/spi_flash_probe.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index aa7ea1a..1806fd1 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -64,6 +64,7 @@ static const struct spi_flash_params spi_flash_params_table[]
= {
{MX25L6405D, 0xc22017, 0x0, 64 * 1024, 128,
0},
{MX25L12805, 0xc22018, 0x0, 64 * 1024, 256,
0},
{MX25L25635F,0xc22019, 0x0, 64 * 1024, 512,
0},
+ {MX25L51235F,0xc2201A, 0x0, 64 * 1024, 1024,
0},
{MX25L12855E,0xc22618, 0x0, 64 * 1024, 256,
0},
#endif
#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
--
1.8.3
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[U-Boot] [PATCH v5 01/32] sf: Divide spi_flash into multiple parts
Divided the spi_flash framework into mutiple parts for
- spi_flash.c:
spi flash core file, interaction for spi/qspi driver to
spi_flash framework.
- spi_flash_ops.c
spi flash preffered operations, erase,write and read.
- spi_flash_probe.c
spi flash probing, easy to extend probing functionality.
This change will support to extend the functionality in a
proper manner.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/Makefile | 2 +-
drivers/mtd/spi/spi_flash.c | 571 +-
drivers/mtd/spi/spi_flash_ops.c | 314 +
drivers/mtd/spi/spi_flash_probe.c | 276 ++
4 files changed, 596 insertions(+), 567 deletions(-)
create mode 100644 drivers/mtd/spi/spi_flash_ops.c
create mode 100644 drivers/mtd/spi/spi_flash_probe.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 191138a..193cb5d 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -14,7 +14,7 @@ COBJS-$(CONFIG_SPL_SPI_LOAD) += spi_spl_load.o
COBJS-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o
endif
-COBJS-$(CONFIG_SPI_FLASH) += spi_flash.o
+COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o spi_flash.o
COBJS-$(CONFIG_SPI_FLASH_ATMEL)+= atmel.o
COBJS-$(CONFIG_SPI_FLASH_EON) += eon.o
COBJS-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.o
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 5d5055f..ddbdda0 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -8,23 +8,7 @@
*/
#include common.h
-#include fdtdec.h
-#include malloc.h
#include spi.h
-#include spi_flash.h
-#include watchdog.h
-
-#include spi_flash_internal.h
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static void spi_flash_addr(u32 addr, u8 *cmd)
-{
- /* cmd[0] is actual command */
- cmd[1] = addr 16;
- cmd[2] = addr 8;
- cmd[3] = addr 0;
-}
static int spi_flash_read_write(struct spi_slave *spi,
const u8 *cmd, size_t cmd_len,
@@ -52,564 +36,19 @@ static int spi_flash_read_write(struct spi_slave *spi,
return ret;
}
-int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
-{
- return spi_flash_cmd_read(spi, cmd, 1, response, len);
-}
-
int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
size_t cmd_len, void *data, size_t data_len)
{
return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len);
}
-int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
- const void *data, size_t data_len)
-{
- return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
-}
-
-int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
-{
- struct spi_slave *spi = flash-spi;
- unsigned long timebase;
- int ret;
- u8 status;
- u8 check_status = 0x0;
- u8 poll_bit = STATUS_WIP;
- u8 cmd = flash-poll_cmd;
-
- if (cmd == CMD_FLAG_STATUS) {
- poll_bit = STATUS_PEC;
- check_status = poll_bit;
- }
-
- ret = spi_xfer(spi, 8, cmd, NULL, SPI_XFER_BEGIN);
- if (ret) {
- debug(SF: fail to read %s status register\n,
- cmd == CMD_READ_STATUS ? read : flag);
- return ret;
- }
-
- timebase = get_timer(0);
- do {
- WATCHDOG_RESET();
-
- ret = spi_xfer(spi, 8, NULL, status, 0);
- if (ret)
- return -1;
-
- if ((status poll_bit) == check_status)
- break;
-
- } while (get_timer(timebase) timeout);
-
- spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
-
- if ((status poll_bit) == check_status)
- return 0;
-
- /* Timed out */
- debug(SF: time out!\n);
- return -1;
-}
-
-int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
- size_t cmd_len, const void *buf, size_t buf_len)
-{
- struct spi_slave *spi = flash-spi;
- unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
- int ret;
-
- if (buf == NULL)
- timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
-
- ret = spi_claim_bus(flash-spi);
- if (ret) {
- debug(SF: unable to claim SPI bus\n);
- return ret;
- }
-
- ret = spi_flash_cmd_write_enable(flash);
- if (ret 0) {
- debug(SF: enabling write failed\n);
- return ret;
- }
-
- ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
- if (ret 0) {
- debug(SF: write cmd failed\n);
- return ret;
- }
-
- ret = spi_flash_cmd_wait_ready(flash, timeout);
[U-Boot] [PATCH v5 21/32] sf: probe: Add support for S25FL256S_256K
Add support for Spansion S25FL256S_256K SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/spi_flash_probe.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 883bc27..badbbf5 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -75,6 +75,7 @@ static const struct spi_flash_params spi_flash_params_table[]
= {
{S25FL032P, 0x010215, 0x4d00,64 * 1024,64,
0},
{S25FL064P, 0x010216, 0x4d00,64 * 1024, 128,
0},
{S25FL128S_64K, 0x012018, 0x4d01,64 * 1024, 256,
0},
+ {S25FL256S_256K, 0x010219, 0x4d00,64 * 1024, 512,
0},
{S25FL256S_64K, 0x010219, 0x4d01,64 * 1024, 512,
0},
{S25FL512S_64K, 0x010220, 0x4d01,64 * 1024, 1024,
0},
#endif
@@ -195,7 +196,7 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave
*spi, u8 *idcode)
flash-read = spi_flash_cmd_read_fast;
/* Compute the flash size */
- flash-page_size = 256;
+ flash-page_size = (ext_jedec == 0x4d00) ? 512 : 256;
flash-sector_size = params-sector_size;
flash-size = flash-sector_size * params-nr_sectors;
--
1.8.3
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[U-Boot] [PATCH v5 07/32] sf: probe: Add support for W25* flash parts
Added W25* parts are which are avilable in spi_flash_probe_legacy.c.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- Enable CONFIG_SPI_FLASH_WINBOND
drivers/mtd/spi/spi_flash_probe.c | 33 -
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 7b36f60..62fbd4f 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -75,13 +75,44 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
{N25Q1024,0x20ba21, 0x0, 64 * 1024, 2048},
{N25Q1024A, 0x20bb21, 0x0, 64 * 1024, 2048},
#endif
+#ifdef CONFIG_SPI_FLASH_WINBOND/* WINBOND */
+ {W25P80, 0xef2014, 0x0, 64 * 1024, 16},
+ {W25P16, 0xef2015, 0x0, 64 * 1024, 32},
+ {W25P32, 0xef2016, 0x0, 64 * 1024, 64},
+ {W25X40, 0xef3013, 0x0, 64 * 1024, 8},
+ {W25X16, 0xef3015, 0x0, 64 * 1024, 32},
+ {W25X32, 0xef3016, 0x0, 64 * 1024, 64},
+ {W25X64, 0xef3017, 0x0, 64 * 1024,128},
+ {W25Q80BL,0xef4014, 0x0, 64 * 1024, 16},
+ {W25Q16CL,0xef4015, 0x0, 64 * 1024, 32},
+ {W25Q32BV,0xef4016, 0x0, 64 * 1024, 64},
+ {W25Q64CV,0xef4017, 0x0, 64 * 1024,128},
+ {W25Q128BV, 0xef4018, 0x0, 64 * 1024,256},
+ {W25Q256, 0xef4019, 0x0, 64 * 1024,512},
+ {W25Q80BW,0xef5014, 0x0, 64 * 1024, 16},
+ {W25Q16DW,0xef6015, 0x0, 64 * 1024, 32},
+ {W25Q32DW,0xef6016, 0x0, 64 * 1024, 64},
+ {W25Q64DW,0xef6017, 0x0, 64 * 1024,128},
+ {W25Q128FW, 0xef6018, 0x0, 64 * 1024,256},
+#endif
+ /*
+* Note:
+* Below paired flash devices has similar spi_flash_params params.
+* (W25Q80BL, W25Q80BV)
+* (W25Q16CL, W25Q16DV)
+* (W25Q32BV, W25Q32FV_SPI)
+* (W25Q64CV, W25Q64FV_SPI)
+* (W25Q128BV, W25Q128FV_SPI)
+* (W25Q32DW, W25Q32FV_QPI)
+* (W25Q64DW, W25Q64FV_QPI)
+* (W25Q128FW, W25Q128FV_QPI)
+*/
/*
* TODO:
* ATMEL
* RAMTRON
* SPANSION
* SST
-* WINBOND
*/
};
--
1.8.3
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[U-Boot] [PATCH v5 28/32] sf: Remove spi_flash_do_alloc references
Added a support for common probe, hence removed removed
spi_flash_do_alloc reference.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
include/spi_flash.h | 38 --
1 file changed, 38 deletions(-)
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 7ffc7b2..a539516 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -75,44 +75,6 @@ struct spi_flash {
int (*erase)(struct spi_flash *flash, u32 offset, size_t len);
};
-/**
- * spi_flash_do_alloc - Allocate a new spi flash structure
- *
- * The structure is allocated and cleared with default values for
- * read, write and erase, which the caller can modify. The caller must set
- * up size, page_size and sector_size.
- *
- * Use the helper macro spi_flash_alloc() to call this.
- *
- * @offset: Offset of struct spi_slave within slave structure
- * @size: Size of slave structure
- * @spi: SPI slave
- * @name: Name of SPI flash device
- */
-void *spi_flash_do_alloc(int offset, int size, struct spi_slave *spi,
-const char *name);
-
-/**
- * spi_flash_alloc - Allocate a new SPI flash structure
- *
- * @_struct: Name of structure to allocate (e.g. struct ramtron_spi_fram). This
- * structure must contain a member 'struct spi_flash *flash'.
- * @spi: SPI slave
- * @name: Name of SPI flash device
- */
-#define spi_flash_alloc(_struct, spi, name) \
- spi_flash_do_alloc(offsetof(_struct, flash), sizeof(_struct), \
- spi, name)
-
-/**
- * spi_flash_alloc_base - Allocate a new SPI flash structure with no private
data
- *
- * @spi: SPI slave
- * @name: Name of SPI flash device
- */
-#define spi_flash_alloc_base(spi, name) \
- spi_flash_do_alloc(0, sizeof(struct spi_flash), spi, name)
-
struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int spi_mode);
void spi_flash_free(struct spi_flash *flash);
--
1.8.3
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[U-Boot] [PATCH v5 23/32] sf: probe: Use print_size arg as page_size
Use flash-page_size arg in print_size() instead of flash-sector_size while printing detected flas part details. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- Changes for v5: - none Changes for v4: - none Changes for v3: - none Changes for v2: - none drivers/mtd/spi/spi_flash_probe.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi_flash_probe.c b/drivers/mtd/spi/spi_flash_probe.c index d9be30f..68290bb 100644 --- a/drivers/mtd/spi/spi_flash_probe.c +++ b/drivers/mtd/spi/spi_flash_probe.c @@ -325,7 +325,7 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, #endif #ifndef CONFIG_SPL_BUILD printf(SF: Detected %s with page size , flash-name); - print_size(flash-sector_size, , total ); + print_size(flash-page_size, , total ); print_size(flash-size, ); if (flash-memory_map) printf(, mapped at %p, flash-memory_map); -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 22/32] sf: probe: Add support for S25FL512S_256K
Add support for Spansion S25FL512S_256K SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/spi_flash_probe.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index badbbf5..d9be30f 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -77,6 +77,7 @@ static const struct spi_flash_params spi_flash_params_table[]
= {
{S25FL128S_64K, 0x012018, 0x4d01,64 * 1024, 256,
0},
{S25FL256S_256K, 0x010219, 0x4d00,64 * 1024, 512,
0},
{S25FL256S_64K, 0x010219, 0x4d01,64 * 1024, 512,
0},
+ {S25FL512S_256K, 0x010220, 0x4d00,64 * 1024, 1024,
0},
{S25FL512S_64K, 0x010220, 0x4d01,64 * 1024, 1024,
0},
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
--
1.8.3
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[U-Boot] [PATCH v5 13/32] sf: probe: Add support to clear flash BP# bits
Few of the flashes(Atmel, Macronix and SST) require to clear BP# bits in flash power ups. So clear these BP# bits at probe time, so-that the flash is ready for user operations. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- Changes for v5: - Added macro for conditional compile Changes for v4: - none Changes for v3: - none Changes for v2: - none drivers/mtd/spi/spi_flash_probe.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/mtd/spi/spi_flash_probe.c b/drivers/mtd/spi/spi_flash_probe.c index 199eab8..4659134 100644 --- a/drivers/mtd/spi/spi_flash_probe.c +++ b/drivers/mtd/spi/spi_flash_probe.c @@ -203,6 +203,13 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode) flash-sector_size = params-sector_size; flash-size = flash-sector_size * params-nr_sectors; + /* Flash powers up read-only, so clear BP# bits */ +#if defined(CONFIG_SPI_FLASH_ATMEL) || \ + defined(CONFIG_SPI_FLASH_MACRONIX) || \ + defined(CONFIG_SPI_FLASH_SST) + spi_flash_cmd_write_status(flash, 0); +#endif + return flash; } -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 02/32] sf: probe: Add new spi_flash_probe support
Added new spi_flash_probe support, currently added N25Q*
flash part attributes support.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- Removed CONFIG_SPI_FLASH_LEGACY
Changes for v3:
- Fix warning issue.
Changes for v2:
- Removed CONFIG_SPI_FLASH_NEW, add CONFIG_SPI_FLASH_LEGACY
- Enable CONFIG_SPI_FLASH_STMICRO in spi_flash_params table
- Updated few structure members
drivers/mtd/spi/Makefile | 2 +-
drivers/mtd/spi/spi_flash_probe.c| 229 -
drivers/mtd/spi/spi_flash_probe_legacy.c | 276 +++
3 files changed, 385 insertions(+), 122 deletions(-)
create mode 100644 drivers/mtd/spi/spi_flash_probe_legacy.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 193cb5d..a10c850 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -14,7 +14,7 @@ COBJS-$(CONFIG_SPL_SPI_LOAD) += spi_spl_load.o
COBJS-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o
endif
-COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o spi_flash.o
+COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe_legacy.o spi_flash_ops.o
spi_flash.o
COBJS-$(CONFIG_SPI_FLASH_ATMEL)+= atmel.o
COBJS-$(CONFIG_SPI_FLASH_EON) += eon.o
COBJS-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.o
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 32ec578..3e13837 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -18,6 +18,98 @@
DECLARE_GLOBAL_DATA_PTR;
+/*
+ * struct spi_flash_params - SPI/QSPI flash device params structure
+ *
+ * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
+ * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
+ * @ext_jedec: Device ext_jedec ID
+ * @sector_size: Sector size of this device
+ * @nr_sectors:No.of sectors on this device
+ */
+struct spi_flash_params {
+ const char *name;
+ u32 jedec;
+ u16 ext_jedec;
+ u32 sector_size;
+ u32 nr_sectors;
+};
+
+static const struct spi_flash_params spi_flash_params_table[] = {
+#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
+ {N25Q32, 0x20ba16, 0x0, 64 * 1024, 64},
+ {N25Q32A, 0x20bb16, 0x0, 64 * 1024, 64},
+ {N25Q64, 0x20ba17, 0x0, 64 * 1024,128},
+ {N25Q64A, 0x20bb17, 0x0, 64 * 1024,128},
+ {N25Q128, 0x20ba18, 0x0, 64 * 1024,256},
+ {N25Q128A,0x20bb18, 0x0, 64 * 1024,256},
+ {N25Q256, 0x20ba19, 0x0, 64 * 1024,512},
+ {N25Q256A,0x20bb19, 0x0, 64 * 1024,512},
+ {N25Q512, 0x20ba20, 0x0, 64 * 1024, 1024},
+ {N25Q512A,0x20bb20, 0x0, 64 * 1024, 1024},
+ {N25Q1024,0x20ba21, 0x0, 64 * 1024, 2048},
+ {N25Q1024A, 0x20bb21, 0x0, 64 * 1024, 2048},
+#endif
+ /*
+* TODO:
+* ATMEL
+* EON
+* GIGADEVICE
+* MACRONIX
+* RAMTRON
+* SPANSION
+* SST
+* STMICRO (M25*)
+* WINBOND
+*/
+};
+
+struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode)
+{
+ const struct spi_flash_params *params;
+ struct spi_flash *flash;
+ int i;
+ u16 jedec = idcode[1] 8 | idcode[2];
+
+ /* Get the flash id (jedec = manuf_id + dev_id) */
+ for (i = 0; i ARRAY_SIZE(spi_flash_params_table); i++) {
+ params = spi_flash_params_table[i];
+ if ((params-jedec 16) == idcode[0]) {
+ if ((params-jedec 0x) == jedec)
+ break;
+ }
+ }
+
+ if (i == ARRAY_SIZE(spi_flash_params_table)) {
+ printf(SF: Unsupported flash ID: manuf %02x, jedec %04x\n,
+ idcode[0], jedec);
+ return NULL;
+ }
+
+ flash = malloc(sizeof(*flash));
+ if (!flash) {
+ debug(SF: Failed to allocate spi_flash\n);
+ return NULL;
+ }
+ memset(flash, '\0', sizeof(*flash));
+
+ flash-spi = spi;
+ flash-name = params-name;
+ flash-poll_cmd = CMD_READ_STATUS;
+
+ /* Assign spi_flash ops */
+ flash-write = spi_flash_cmd_write_multi;
+ flash-erase = spi_flash_cmd_erase;
+ flash-read = spi_flash_cmd_read_fast;
+
+ /* Compute the flash size */
+ flash-page_size = 256;
+ flash-sector_size = params-sector_size;
+ flash-size = flash-sector_size * params-nr_sectors;
+
+ return flash;
+}
+
#ifdef
[U-Boot] [PATCH v5 05/32] sf: probe: Add support for GD25* flash parts
Added GD25* parts are which are avilable in spi_flash_probe_legacy.c.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- Enable CONFIG_SPI_FLASH_GIGADEVICE
drivers/mtd/spi/spi_flash_probe.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index e64b010..a66bcf9 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -40,6 +40,10 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
{EN25Q32B,0x1c3016, 0x0, 64 * 1024, 64},
{EN25Q128B, 0x1c3018, 0x0, 64 * 1024,256},
#endif
+#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
+ {GD25Q64B,0xc84017, 0x0, 64 * 1024,128},
+ {GD25LQ32,0xc86016, 0x0, 64 * 1024, 64},
+#endif
#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
{M25P10, 0x202011, 0x0, 32 * 1024, 4},
{M25P20, 0x202012, 0x0, 64 * 1024, 4},
@@ -65,7 +69,6 @@ static const struct spi_flash_params spi_flash_params_table[]
= {
/*
* TODO:
* ATMEL
-* GIGADEVICE
* MACRONIX
* RAMTRON
* SPANSION
--
1.8.3
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[U-Boot] [PATCH v5 26/32] sf: probe: Add support for MX25L25635F
Add support for Macronix MX25L25635F SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/spi_flash_probe.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 8abb27d..aa7ea1a 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -63,6 +63,7 @@ static const struct spi_flash_params spi_flash_params_table[]
= {
{MX25L3205D, 0xc22016, 0x0, 64 * 1024,64,
0},
{MX25L6405D, 0xc22017, 0x0, 64 * 1024, 128,
0},
{MX25L12805, 0xc22018, 0x0, 64 * 1024, 256,
0},
+ {MX25L25635F,0xc22019, 0x0, 64 * 1024, 512,
0},
{MX25L12855E,0xc22618, 0x0, 64 * 1024, 256,
0},
#endif
#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
--
1.8.3
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[U-Boot] [PATCH v5 11/32] sf: probe: Give proper spacing on flash table params
Given proper spacing between flash table params.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/spi_flash_probe.c | 154 +++---
1 file changed, 77 insertions(+), 77 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index af43272..b6cf60c 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -37,97 +37,97 @@ struct spi_flash_params {
static const struct spi_flash_params spi_flash_params_table[] = {
#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
- {AT45DB011D, 0x1f2200, 0x0, 64 * 1024, 4},
- {AT45DB021D, 0x1f2300, 0x0, 64 * 1024, 8},
- {AT45DB041D, 0x1f2400, 0x0, 64 * 1024, 8},
- {AT45DB081D, 0x1f2500, 0x0, 64 * 1024, 16},
- {AT45DB161D, 0x1f2600, 0x0, 64 * 1024, 32},
- {AT45DB321D, 0x1f2700, 0x0, 64 * 1024, 64},
- {AT45DB641D, 0x1f2800, 0x0, 64 * 1024,128},
+ {AT45DB011D, 0x1f2200, 0x0, 64 * 1024, 4},
+ {AT45DB021D, 0x1f2300, 0x0, 64 * 1024, 8},
+ {AT45DB041D, 0x1f2400, 0x0, 64 * 1024, 8},
+ {AT45DB081D, 0x1f2500, 0x0, 64 * 1024,16},
+ {AT45DB161D, 0x1f2600, 0x0, 64 * 1024,32},
+ {AT45DB321D, 0x1f2700, 0x0, 64 * 1024,64},
+ {AT45DB641D, 0x1f2800, 0x0, 64 * 1024, 128},
#endif
#ifdef CONFIG_SPI_FLASH_EON/* EON */
- {EN25Q32B,0x1c3016, 0x0, 64 * 1024, 64},
- {EN25Q128B, 0x1c3018, 0x0, 64 * 1024,256},
+ {EN25Q32B, 0x1c3016, 0x0, 64 * 1024,64},
+ {EN25Q128B, 0x1c3018, 0x0, 64 * 1024, 256},
#endif
#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
- {GD25Q64B,0xc84017, 0x0, 64 * 1024,128},
- {GD25LQ32,0xc86016, 0x0, 64 * 1024, 64},
+ {GD25Q64B, 0xc84017, 0x0, 64 * 1024, 128},
+ {GD25LQ32, 0xc86016, 0x0, 64 * 1024,64},
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
- {MX25L4005, 0xc22013, 0x0, 64 * 1024, 8},
- {MX25L8005, 0xc22014, 0x0, 64 * 1024, 16},
- {MX25L1605D, 0xc22015, 0x0, 64 * 1024, 32},
- {MX25L3205D, 0xc22016, 0x0, 64 * 1024, 64},
- {MX25L6405D, 0xc22017, 0x0, 64 * 1024,128},
- {MX25L12805, 0xc22018, 0x0, 64 * 1024,256},
- {MX25L12855E, 0xc22618, 0x0, 64 * 1024,256},
+ {MX25L4005, 0xc22013, 0x0, 64 * 1024, 8},
+ {MX25L8005, 0xc22014, 0x0, 64 * 1024,16},
+ {MX25L1605D, 0xc22015, 0x0, 64 * 1024,32},
+ {MX25L3205D, 0xc22016, 0x0, 64 * 1024,64},
+ {MX25L6405D, 0xc22017, 0x0, 64 * 1024, 128},
+ {MX25L12805, 0xc22018, 0x0, 64 * 1024, 256},
+ {MX25L12855E,0xc22618, 0x0, 64 * 1024, 256},
#endif
#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
- {S25FL008A, 0x010213, 0x0, 64 * 1024, 16},
- {S25FL016A, 0x010214, 0x0, 64 * 1024, 32},
- {S25FL032A, 0x010215, 0x0, 64 * 1024, 64},
- {S25FL064A, 0x010216, 0x0, 64 * 1024,128},
- {S25FL128P_256K, 0x012018, 0x0300, 256 * 1024, 64},
- {S25FL128P_64K, 0x012018, 0x0301, 64 * 1024,256},
- {S25FL032P, 0x010215, 0x4d00, 64 * 1024, 64},
- {S25FL064P, 0x010216, 0x4d00, 64 * 1024,128},
- {S25FL128S_64K, 0x012018, 0x4d01, 64 * 1024,256},
- {S25FL256S_64K, 0x010219, 0x4d01, 64 * 1024,512},
- {S25FL512S_64K, 0x010220, 0x4d01, 64 * 1024, 1024},
+ {S25FL008A, 0x010213, 0x0, 64 * 1024,16},
+ {S25FL016A, 0x010214, 0x0, 64 * 1024,32},
+ {S25FL032A, 0x010215, 0x0, 64 * 1024,64},
+ {S25FL064A, 0x010216, 0x0, 64 * 1024, 128},
+ {S25FL128P_256K, 0x012018, 0x0300, 256 * 1024,64},
+ {S25FL128P_64K, 0x012018, 0x0301,64 * 1024, 256},
+ {S25FL032P, 0x010215, 0x4d00,64 * 1024,64},
+ {S25FL064P, 0x010216, 0x4d00,64 * 1024, 128},
+ {S25FL128S_64K, 0x012018, 0x4d01,64 * 1024, 256},
+ {S25FL256S_64K, 0x010219, 0x4d01,64 * 1024, 512},
+ {S25FL512S_64K, 0x010220, 0x4d01,64 * 1024, 1024},
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
- {M25P10, 0x202011, 0x0, 32 *
[U-Boot] [PATCH v5 00/32] sf: Add new probe support
This is v5 series for earlier series where I was breakdown
the quad support and will send for next version.
http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/170343
This patch series adds common probe support for all flash vendors
except ramtron.
spi_flash_probe is a new addition where all flash driver
probing is combined into a common file, this means spi_flash_probe.c
adds a new probing style common to all flashes.
Please use git://git.denx.de/u-boot-spi.git master-probe for testing
http://git.denx.de/?p=u-boot/u-boot-spi.git;a=tree;h=refs/heads/master-probe;hb=master-probe
Tested on SST, STMICRO, WINBOND and SPANSION flash devices.
REQUEST FOR ALL SPI CODE CONTRIBUTORS/USERS, PLEASE TEST THESE CHANGES
W.R.T YOUR HW IF POSSIBLE.
Please let me know for any issues/concerns/questions.
--
Thanks,
Jagan.
Jagannadha Sutradharudu Teki (32):
sf: Divide spi_flash into multiple parts
sf: probe: Add new spi_flash_probe support
sf: probe: Add support for M25P* flash parts
sf: probe: Add support for EN25Q* flash parts
sf: probe: Add support for GD25* flash parts
sf: probe: Add support for MX25L* flash parts
sf: probe: Add support for W25* flash parts
sf: probe: Add support for S25FL* flash parts
sf: probe: Add support for SST25* flash parts
sf: probe: Add support for AT45DB* flash parts
sf: probe: Give proper spacing on flash table params
sf: probe: Add support for SST_WP
sf: probe: Add support to clear flash BP# bits
sf: probe: Add support for erase sector selection flag
sf: probe: Add support for flag status polling
sf: probe: Simply the BAR configuration logic
sf: Add proper comment style on spi_flash structure
sf: ramtron: Add support for separate flash driver
sf: Remove unneeded flash drivers files
sf: probe: Add support for EN25Q64
sf: probe: Add support for S25FL256S_256K
sf: probe: Add support for S25FL512S_256K
sf: probe: Use print_size arg as page_size
sf: probe: Print erase_size while printing flash details
sf: ops: Add static qualifier to spi_flash_cmd_bankaddr_write
sf: probe: Add support for MX25L25635F
sf: probe: Add support for MX25L51235F
sf: Remove spi_flash_do_alloc references
sf: spi_flash cleanups
spi: spi cleanups
sf: Rename spi_flash files
doc: SPI: Add status.txt for tracking SPI subsys status
doc/SPI/status.txt | 28 +
drivers/mtd/spi/Makefile | 15 +-
drivers/mtd/spi/atmel.c| 544 --
drivers/mtd/spi/eon.c | 60 --
drivers/mtd/spi/gigadevice.c | 65 ---
drivers/mtd/spi/macronix.c | 98
drivers/mtd/spi/ramtron.c | 123 -
drivers/mtd/spi/sf.c | 54 ++
.../spi/{spi_flash_internal.h = sf_internal.h}| 140 ++---
drivers/mtd/spi/sf_ops.c | 403 ++
drivers/mtd/spi/sf_probe.c | 360
drivers/mtd/spi/spansion.c | 141 -
drivers/mtd/spi/spi_flash.c| 615 -
drivers/mtd/spi/sst.c | 238
drivers/mtd/spi/stmicro.c | 202 ---
drivers/mtd/spi/winbond.c | 141 -
include/configs/top9000.h | 1 -
include/spi.h | 87 +--
include/spi_flash.h| 103 ++--
19 files changed, 1127 insertions(+), 2291 deletions(-)
create mode 100644 doc/SPI/status.txt
delete mode 100644 drivers/mtd/spi/atmel.c
delete mode 100644 drivers/mtd/spi/eon.c
delete mode 100644 drivers/mtd/spi/gigadevice.c
delete mode 100644 drivers/mtd/spi/macronix.c
create mode 100644 drivers/mtd/spi/sf.c
rename drivers/mtd/spi/{spi_flash_internal.h = sf_internal.h} (61%)
create mode 100644 drivers/mtd/spi/sf_ops.c
create mode 100644 drivers/mtd/spi/sf_probe.c
delete mode 100644 drivers/mtd/spi/spansion.c
delete mode 100644 drivers/mtd/spi/spi_flash.c
delete mode 100644 drivers/mtd/spi/sst.c
delete mode 100644 drivers/mtd/spi/stmicro.c
delete mode 100644 drivers/mtd/spi/winbond.c
--
1.8.3
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[U-Boot] [PATCH v5 24/32] sf: probe: Print erase_size while printing flash details
Included erase_size while printing probed flash details. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- Changes for v5: - none Changes for v4: - none Changes for v3: - none Changes for v2: - none drivers/mtd/spi/spi_flash_probe.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi_flash_probe.c b/drivers/mtd/spi/spi_flash_probe.c index 68290bb..8abb27d 100644 --- a/drivers/mtd/spi/spi_flash_probe.c +++ b/drivers/mtd/spi/spi_flash_probe.c @@ -325,7 +325,8 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, #endif #ifndef CONFIG_SPL_BUILD printf(SF: Detected %s with page size , flash-name); - print_size(flash-page_size, , total ); + print_size(flash-page_size, , erase size ); + print_size(flash-erase_size, , total ); print_size(flash-size, ); if (flash-memory_map) printf(, mapped at %p, flash-memory_map); -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 18/32] sf: ramtron: Add support for separate flash driver
Compared to other spi flashes, ramtron has a different
probing and implementation on flash ops, hence moved
ramtron probe code into ramtron driver.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/Makefile | 5 +-
drivers/mtd/spi/ramtron.c| 123 +-
drivers/mtd/spi/spi_flash_probe.c| 4 -
drivers/mtd/spi/spi_flash_probe_legacy.c | 276 ---
include/configs/top9000.h| 1 -
5 files changed, 125 insertions(+), 284 deletions(-)
delete mode 100644 drivers/mtd/spi/spi_flash_probe_legacy.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index a10c850..2605e57 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -14,7 +14,10 @@ COBJS-$(CONFIG_SPL_SPI_LOAD) += spi_spl_load.o
COBJS-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o
endif
-COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe_legacy.o spi_flash_ops.o
spi_flash.o
+ifdef CONFIG_CMD_SF
+COBJS-y+= spi_flash.o
+endif
+COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o
COBJS-$(CONFIG_SPI_FLASH_ATMEL)+= atmel.o
COBJS-$(CONFIG_SPI_FLASH_EON) += eon.o
COBJS-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.o
diff --git a/drivers/mtd/spi/ramtron.c b/drivers/mtd/spi/ramtron.c
index 38f9d69..c9701d0 100644
--- a/drivers/mtd/spi/ramtron.c
+++ b/drivers/mtd/spi/ramtron.c
@@ -214,7 +214,8 @@ static int ramtron_erase(struct spi_flash *flash, u32
offset, size_t len)
* nore: we are called here with idcode pointing to the first non-0x7f byte
* already!
*/
-struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode)
+static struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi,
+ u8 *idcode)
{
const struct ramtron_spi_fram_params *params;
struct ramtron_spi_fram *sn;
@@ -270,7 +271,7 @@ struct spi_flash *spi_fram_probe_ramtron(struct spi_slave
*spi, u8 *idcode)
return NULL;
found:
- sn = spi_flash_alloc(struct ramtron_spi_fram, spi, params-name);
+ sn = malloc(sizeof(*sn));
if (!sn) {
debug(SF: Failed to allocate memory\n);
return NULL;
@@ -285,3 +286,121 @@ found:
return sn-flash;
}
+
+/*
+ * The following table holds all device probe functions
+ * (All flashes are removed and implemented a common probe at
+ * spi_flash_probe.c)
+ *
+ * shift: number of continuation bytes before the ID
+ * idcode: the expected IDCODE or 0xff for non JEDEC devices
+ * probe: the function to call
+ *
+ * Non JEDEC devices should be ordered in the table such that
+ * the probe functions with best detection algorithms come first.
+ *
+ * Several matching entries are permitted, they will be tried
+ * in sequence until a probe function returns non NULL.
+ *
+ * IDCODE_CONT_LEN may be redefined if a device needs to declare a
+ * larger shift value. IDCODE_PART_LEN generally shouldn't be
+ * changed. This is the max number of bytes probe functions may
+ * examine when looking up part-specific identification info.
+ *
+ * Probe functions will be given the idcode buffer starting at their
+ * manu id byte (the idcode in the table below). In other words,
+ * all of the continuation bytes will be skipped (the shift below).
+ */
+#define IDCODE_CONT_LEN 0
+#define IDCODE_PART_LEN 5
+static const struct {
+ const u8 shift;
+ const u8 idcode;
+ struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
+} flashes[] = {
+ /* Keep it sorted by define name */
+#ifdef CONFIG_SPI_FRAM_RAMTRON
+ { 6, 0xc2, spi_fram_probe_ramtron, },
+# undef IDCODE_CONT_LEN
+# define IDCODE_CONT_LEN 6
+#endif
+#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
+ { 0, 0xff, spi_fram_probe_ramtron, },
+#endif
+};
+#define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
+
+struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int spi_mode)
+{
+ struct spi_slave *spi;
+ struct spi_flash *flash = NULL;
+ int ret, i, shift;
+ u8 idcode[IDCODE_LEN], *idp;
+
+ spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
+ if (!spi) {
+ printf(SF: Failed to set up slave\n);
+ return NULL;
+ }
+
+ ret = spi_claim_bus(spi);
+ if (ret) {
+ debug(SF: Failed to claim SPI bus: %d\n, ret);
+ goto err_claim_bus;
+ }
+
+ /* Read the ID codes */
+ ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
+ if (ret)
+ goto err_read_id;
+
+#ifdef DEBUG
+ printf(SF: Got idcodes\n);
+ print_buffer(0, idcode, 1, sizeof(idcode), 0);
+#endif
+
+ /* count the number of continuation bytes */
+ for (shift = 0, idp = idcode;
+shift
[U-Boot] [PATCH v5 19/32] sf: Remove unneeded flash drivers files
Now the common probing is handled in spi_flash_probe.c
hence removed the unneeded flash drivers.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/Makefile | 8 -
drivers/mtd/spi/atmel.c | 544 ---
drivers/mtd/spi/eon.c| 60
drivers/mtd/spi/gigadevice.c | 65 -
drivers/mtd/spi/macronix.c | 98 ---
drivers/mtd/spi/spansion.c | 141 -
drivers/mtd/spi/spi_flash_internal.h | 11 -
drivers/mtd/spi/sst.c| 238 ---
drivers/mtd/spi/stmicro.c| 202 -
drivers/mtd/spi/winbond.c| 141 -
10 files changed, 1508 deletions(-)
delete mode 100644 drivers/mtd/spi/atmel.c
delete mode 100644 drivers/mtd/spi/eon.c
delete mode 100644 drivers/mtd/spi/gigadevice.c
delete mode 100644 drivers/mtd/spi/macronix.c
delete mode 100644 drivers/mtd/spi/spansion.c
delete mode 100644 drivers/mtd/spi/sst.c
delete mode 100644 drivers/mtd/spi/stmicro.c
delete mode 100644 drivers/mtd/spi/winbond.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 2605e57..5678134 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -18,14 +18,6 @@ ifdef CONFIG_CMD_SF
COBJS-y+= spi_flash.o
endif
COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o
-COBJS-$(CONFIG_SPI_FLASH_ATMEL)+= atmel.o
-COBJS-$(CONFIG_SPI_FLASH_EON) += eon.o
-COBJS-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.o
-COBJS-$(CONFIG_SPI_FLASH_MACRONIX) += macronix.o
-COBJS-$(CONFIG_SPI_FLASH_SPANSION) += spansion.o
-COBJS-$(CONFIG_SPI_FLASH_SST) += sst.o
-COBJS-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.o
-COBJS-$(CONFIG_SPI_FLASH_WINBOND) += winbond.o
COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o
COBJS-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o
diff --git a/drivers/mtd/spi/atmel.c b/drivers/mtd/spi/atmel.c
deleted file mode 100644
index f34df43..000
--- a/drivers/mtd/spi/atmel.c
+++ /dev/null
@@ -1,544 +0,0 @@
-/*
- * Atmel SPI DataFlash support
- *
- * Copyright (C) 2008 Atmel Corporation
- * Licensed under the GPL-2 or later.
- */
-
-#include common.h
-#include malloc.h
-#include spi_flash.h
-
-#include spi_flash_internal.h
-
-/* AT45-specific commands */
-#define CMD_AT45_READ_STATUS 0xd7
-#define CMD_AT45_ERASE_PAGE0x81
-#define CMD_AT45_LOAD_PROG_BUF10x82
-#define CMD_AT45_LOAD_BUF1 0x84
-#define CMD_AT45_LOAD_PROG_BUF20x85
-#define CMD_AT45_LOAD_BUF2 0x87
-#define CMD_AT45_PROG_BUF1 0x88
-#define CMD_AT45_PROG_BUF2 0x89
-
-/* AT45 status register bits */
-#define AT45_STATUS_P2_PAGE_SIZE (1 0)
-#define AT45_STATUS_READY (1 7)
-
-/* DataFlash family IDs, as obtained from the second idcode byte */
-#define DF_FAMILY_AT26F0
-#define DF_FAMILY_AT45 1
-#define DF_FAMILY_AT26DF 2 /* AT25DF and AT26DF */
-
-struct atmel_spi_flash_params {
- u8 idcode1;
- /* Log2 of page size in power-of-two mode */
- u8 l2_page_size;
- u8 pages_per_block;
- u8 blocks_per_sector;
- u8 nr_sectors;
- const char *name;
-};
-
-/* spi_flash needs to be first so upper layers can free() it */
-struct atmel_spi_flash {
- struct spi_flash flash;
- const struct atmel_spi_flash_params *params;
-};
-
-static inline struct atmel_spi_flash *
-to_atmel_spi_flash(struct spi_flash *flash)
-{
- return container_of(flash, struct atmel_spi_flash, flash);
-}
-
-static const struct atmel_spi_flash_params atmel_spi_flash_table[] = {
- {
- .idcode1= 0x22,
- .l2_page_size = 8,
- .pages_per_block= 8,
- .blocks_per_sector = 16,
- .nr_sectors = 4,
- .name = AT45DB011D,
- },
- {
- .idcode1= 0x23,
- .l2_page_size = 8,
- .pages_per_block= 8,
- .blocks_per_sector = 16,
- .nr_sectors = 8,
- .name = AT45DB021D,
- },
- {
- .idcode1= 0x24,
- .l2_page_size = 8,
- .pages_per_block= 8,
- .blocks_per_sector = 32,
- .nr_sectors = 8,
- .name = AT45DB041D,
- },
- {
- .idcode1= 0x25,
- .l2_page_size = 8,
- .pages_per_block
[U-Boot] [PATCH v5 17/32] sf: Add proper comment style on spi_flash structure
Added proper comment style on spi_flash structure to make
more readable.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- Added comments on func
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
include/spi_flash.h | 67 +++--
1 file changed, 39 insertions(+), 28 deletions(-)
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 09af55d..7ffc7b2 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -29,39 +29,50 @@
# define CMD_SST_AAI_WP0xAD/* Auto Address Incr Word
Program */
#endif
+/**
+ * struct spi_flash - SPI flash structure
+ *
+ * @spi: SPI slave
+ * @name: Name of SPI flash
+ * @size: Total flash size
+ * @page_size: Write (page) size
+ * @sector_size: Sector size
+ * @erase_size:Erase size
+ * @bank_read_cmd: Bank read cmd
+ * @bank_write_cmd:Bank write cmd
+ * @bank_curr: Current flash bank
+ * @poll_cmd: Poll cmd - for flash erase/program
+ * @erase_cmd: Erase cmd 4K, 32K, 64K
+ * @memory_map:Address of read-only SPI flash access
+ * @read: Flash read ops: Read len bytes at offset into buf
+ * Supported cmds: Fast Array Read
+ * @write: Flash write ops: Write len bytes from buf into offeset
+ * Supported cmds: Page Program
+ * @erase: Flash erase ops: Erase len bytes from offset
+ * Supported cmds: Sector erase 4K, 32K, 64K
+ * return 0 - Sucess, 1 - Failure
+ */
struct spi_flash {
struct spi_slave *spi;
+ const char *name;
- const char *name;
-
- /* Total flash size */
- u32 size;
- /* Write (page) size */
- u32 page_size;
- /* Sector size */
- u32 sector_size;
- /* Erase size */
- u32 erase_size;
+ u32 size;
+ u32 page_size;
+ u32 sector_size;
+ u32 erase_size;
#ifdef CONFIG_SPI_FLASH_BAR
- /* Bank read cmd */
- u8 bank_read_cmd;
- /* Bank write cmd */
- u8 bank_write_cmd;
- /* Current flash bank */
- u8 bank_curr;
+ u8 bank_read_cmd;
+ u8 bank_write_cmd;
+ u8 bank_curr;
#endif
- /* Poll cmd - for flash erase/program */
- u8 poll_cmd;
- /* Erase cmd 4K, 32K, 64K */
- u8 erase_cmd;
-
- void *memory_map; /* Address of read-only SPI flash access */
- int (*read)(struct spi_flash *flash, u32 offset,
- size_t len, void *buf);
- int (*write)(struct spi_flash *flash, u32 offset,
- size_t len, const void *buf);
- int (*erase)(struct spi_flash *flash, u32 offset,
- size_t len);
+ u8 poll_cmd;
+ u8 erase_cmd;
+
+ void *memory_map;
+ int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf);
+ int (*write)(struct spi_flash *flash, u32 offset, size_t len,
+ const void *buf);
+ int (*erase)(struct spi_flash *flash, u32 offset, size_t len);
};
/**
--
1.8.3
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[U-Boot] [PATCH v5 04/32] sf: probe: Add support for EN25Q* flash parts
Added EN25Q* parts are which are avilable in spi_flash_probe_legacy.c.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- Enable CONFIG_SPI_FLASH_EON
drivers/mtd/spi/spi_flash_probe.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 7d8ed6e..e64b010 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -36,6 +36,10 @@ struct spi_flash_params {
};
static const struct spi_flash_params spi_flash_params_table[] = {
+#ifdef CONFIG_SPI_FLASH_EON/* EON */
+ {EN25Q32B,0x1c3016, 0x0, 64 * 1024, 64},
+ {EN25Q128B, 0x1c3018, 0x0, 64 * 1024,256},
+#endif
#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
{M25P10, 0x202011, 0x0, 32 * 1024, 4},
{M25P20, 0x202012, 0x0, 64 * 1024, 4},
@@ -61,7 +65,6 @@ static const struct spi_flash_params spi_flash_params_table[]
= {
/*
* TODO:
* ATMEL
-* EON
* GIGADEVICE
* MACRONIX
* RAMTRON
--
1.8.3
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[U-Boot] [PATCH v5 15/32] sf: probe: Add support for flag status polling
From Micron, 512MB onwards, flash requires to poll flag status
instead of read status- hence added E_FSR flag on spectific
flash parts.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/spi_flash_probe.c | 16 +++-
include/spi_flash.h | 1 +
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 9c2e115..8ea6915 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -94,10 +94,10 @@ static const struct spi_flash_params
spi_flash_params_table[] = {
{N25Q128A, 0x20bb18, 0x0, 64 * 1024, 256,
SECT_4K},
{N25Q256,0x20ba19, 0x0, 64 * 1024, 512,
SECT_4K},
{N25Q256A, 0x20bb19, 0x0, 64 * 1024, 512,
SECT_4K},
- {N25Q512,0x20ba20, 0x0, 64 * 1024, 1024,
SECT_4K},
- {N25Q512A, 0x20bb20, 0x0, 64 * 1024, 1024,
SECT_4K},
- {N25Q1024, 0x20ba21, 0x0, 64 * 1024, 2048,
SECT_4K},
- {N25Q1024A, 0x20bb21, 0x0, 64 * 1024, 2048,
SECT_4K},
+ {N25Q512,0x20ba20, 0x0, 64 * 1024, 1024, E_FSR |
SECT_4K},
+ {N25Q512A, 0x20bb20, 0x0, 64 * 1024, 1024, E_FSR |
SECT_4K},
+ {N25Q1024, 0x20ba21, 0x0, 64 * 1024, 2048, E_FSR |
SECT_4K},
+ {N25Q1024A, 0x20bb21, 0x0, 64 * 1024, 2048, E_FSR |
SECT_4K},
#endif
#ifdef CONFIG_SPI_FLASH_SST/* SST */
{SST25VF040B,0xbf258d, 0x0, 64 * 1024, 8, SECT_4K |
SST_WP},
@@ -187,7 +187,6 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave
*spi, u8 *idcode)
flash-spi = spi;
flash-name = params-name;
- flash-poll_cmd = CMD_READ_STATUS;
/* Assign spi_flash ops */
flash-write = spi_flash_cmd_write_multi;
@@ -215,6 +214,13 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave
*spi, u8 *idcode)
flash-erase_size = flash-sector_size;
}
+ /* Poll cmd seclection */
+ flash-poll_cmd = CMD_READ_STATUS;
+#ifdef CONFIG_SPI_FLASH_STMICRO
+ if (params-flags E_FSR)
+ flash-poll_cmd = CMD_FLAG_STATUS;
+#endif
+
/* Flash powers up read-only, so clear BP# bits */
#if defined(CONFIG_SPI_FLASH_ATMEL) || \
defined(CONFIG_SPI_FLASH_MACRONIX) || \
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 0d40e6c..09af55d 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -20,6 +20,7 @@
/* SECT flags */
#define SECT_4K(1 1)
#define SECT_32K (1 2)
+#define E_FSR (1 3)
/* SST specific macros */
#ifdef CONFIG_SPI_FLASH_SST
--
1.8.3
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[U-Boot] [PATCH v5 03/32] sf: probe: Add support for M25P* flash parts
Added M25P* parts are which are avilable in spi_flash_probe_legacy.c.
Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size of flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/spi_flash_probe.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index 3e13837..7d8ed6e 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -37,6 +37,14 @@ struct spi_flash_params {
static const struct spi_flash_params spi_flash_params_table[] = {
#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
+ {M25P10, 0x202011, 0x0, 32 * 1024, 4},
+ {M25P20, 0x202012, 0x0, 64 * 1024, 4},
+ {M25P40, 0x202013, 0x0, 64 * 1024, 8},
+ {M25P80, 0x202014, 0x0, 64 * 1024, 16},
+ {M25P16, 0x202015, 0x0, 64 * 1024, 32},
+ {M25P32, 0x202016, 0x0, 64 * 1024, 64},
+ {M25P64, 0x202017, 0x0, 64 * 1024,128},
+ {M25P128, 0x202018, 0x0,256 * 1024, 64},
{N25Q32, 0x20ba16, 0x0, 64 * 1024, 64},
{N25Q32A, 0x20bb16, 0x0, 64 * 1024, 64},
{N25Q64, 0x20ba17, 0x0, 64 * 1024,128},
@@ -59,7 +67,6 @@ static const struct spi_flash_params spi_flash_params_table[]
= {
* RAMTRON
* SPANSION
* SST
-* STMICRO (M25*)
* WINBOND
*/
};
--
1.8.3
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[U-Boot] [PATCH v5 30/32] spi: spi cleanups
- Rearranged multi-line comment style.
- Add tabs.
- Add spaces.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
include/spi.h | 87 ++-
1 file changed, 44 insertions(+), 43 deletions(-)
diff --git a/include/spi.h b/include/spi.h
index c0dab57..c44ebe8 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -29,10 +29,11 @@
#define SPI_XFER_END 0x02/* Deassert CS after transfer */
/* Header byte that marks the start of the message */
-#define SPI_PREAMBLE_END_BYTE 0xec
+#define SPI_PREAMBLE_END_BYTE 0xec
-/*---
- * Representation of a SPI slave, i.e. what we're communicating with.
+/**
+ * struct spi_slave: Representation of a SPI slave,
+ * i.e. what we're communicating with.
*
* Drivers are expected to extend this with controller-specific data.
*
@@ -42,12 +43,12 @@
* be written at once, excluding command bytes.
*/
struct spi_slave {
- unsigned intbus;
- unsigned intcs;
+ unsigned int bus;
+ unsigned int cs;
unsigned int max_write_size;
};
-/*---
+/**
* Initialization, must be called once on start up.
*
* TODO: I don't think we really need this.
@@ -60,10 +61,10 @@ void spi_init(void);
* Allocate and zero all fields in the spi slave, and set the bus/chip
* select. Use the helper macro spi_alloc_slave() to call this.
*
- * @offset: Offset of struct spi_slave within slave structure
- * @size: Size of slave structure
- * @bus: Bus ID of the slave chip.
- * @cs: Chip select ID of the slave chip on the specified bus.
+ * @offset:Offset of struct spi_slave within slave structure.
+ * @size: Size of slave structure.
+ * @bus: Bus ID of the slave chip.
+ * @cs:Chip select ID of the slave chip on the specified bus.
*/
void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
unsigned int cs);
@@ -74,10 +75,10 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int
bus,
* Allocate and zero all fields in the spi slave, and set the bus/chip
* select.
*
- * @_struct: Name of structure to allocate (e.g. struct tegra_spi). This
- * structure must contain a member 'struct spi_slave *slave'.
- * @bus: Bus ID of the slave chip.
- * @cs: Chip select ID of the slave chip on the specified bus.
+ * @_struct: Name of structure to allocate (e.g. struct tegra_spi).
+ * This structure must contain a member 'struct spi_slave *slave'.
+ * @bus: Bus ID of the slave chip.
+ * @cs:Chip select ID of the slave chip on the specified bus.
*/
#define spi_alloc_slave(_struct, bus, cs) \
spi_do_alloc_slave(offsetof(_struct, slave), \
@@ -89,13 +90,13 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int
bus,
* Allocate and zero all fields in the spi slave, and set the bus/chip
* select.
*
- * @bus: Bus ID of the slave chip.
- * @cs: Chip select ID of the slave chip on the specified bus.
+ * @bus: Bus ID of the slave chip.
+ * @cs:Chip select ID of the slave chip on the specified bus.
*/
#define spi_alloc_slave_base(bus, cs) \
spi_do_alloc_slave(0, sizeof(struct spi_slave), bus, cs)
-/*---
+/**
* Set up communications parameters for a SPI slave.
*
* This must be called once for each slave. Note that this function
@@ -103,10 +104,10 @@ void *spi_do_alloc_slave(int offset, int size, unsigned
int bus,
* contents of spi_slave so that the hardware can be easily
* initialized later.
*
- * bus: Bus ID of the slave chip.
- * cs: Chip select ID of the slave chip on the specified bus.
- * max_hz: Maximum SCK rate in Hz.
- * mode:Clock polarity, clock phase and other parameters.
+ * @bus: Bus ID of the slave chip.
+ * @cs:Chip select ID of the slave chip on the specified bus.
+ * @max_hz:Maximum SCK rate in Hz.
+ * @mode: Clock polarity, clock phase and other parameters.
*
* Returns: A spi_slave reference that can be used in subsequent SPI
* calls, or NULL if one or more of the parameters are not supported.
@@ -114,14 +115,14 @@ void *spi_do_alloc_slave(int offset, int size, unsigned
int bus,
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode);
-/*---
+/**
* Free any memory associated with a SPI slave.
*
- * slave:The SPI slave
+ * @slave: The SPI slave
*/
void spi_free_slave(struct spi_slave *slave);
[U-Boot] [PATCH v5 20/32] sf: probe: Add support for EN25Q64
Add support for EON EN25Q64 SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/spi_flash_probe.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index c432b04..883bc27 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -49,6 +49,7 @@ static const struct spi_flash_params spi_flash_params_table[]
= {
#endif
#ifdef CONFIG_SPI_FLASH_EON/* EON */
{EN25Q32B, 0x1c3016, 0x0, 64 * 1024,64,
0},
+ {EN25Q64,0x1c3017, 0x0, 64 * 1024, 128,
SECT_4K},
{EN25Q128B, 0x1c3018, 0x0, 64 * 1024, 256,
0},
#endif
#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
--
1.8.3
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[U-Boot] [PATCH v5 12/32] sf: probe: Add support for SST_WP
Most of the SST flashes needs to write up using SST_WP, AAI
Word Program, so added a flag param on spi_flash_params table.
SST flashes, which supports SST_WP need to use a WP write
sst_write_wp instead of common flash write.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/spi_flash_internal.h | 5 ++
drivers/mtd/spi/spi_flash_ops.c | 93
drivers/mtd/spi/spi_flash_probe.c| 160 ++-
include/spi_flash.h | 7 ++
4 files changed, 188 insertions(+), 77 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_internal.h
b/drivers/mtd/spi/spi_flash_internal.h
index af1afa9..ce34ce0 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -75,6 +75,11 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8
*cmd, size_t cmd_len,
int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
size_t len, const void *buf);
+#ifdef CONFIG_SPI_FLASH_SST
+int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
+ const void *buf);
+#endif
+
/*
* Enable writing on the SPI flash.
*/
diff --git a/drivers/mtd/spi/spi_flash_ops.c b/drivers/mtd/spi/spi_flash_ops.c
index 6133363..79381b1 100644
--- a/drivers/mtd/spi/spi_flash_ops.c
+++ b/drivers/mtd/spi/spi_flash_ops.c
@@ -312,3 +312,96 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
return ret;
}
+
+#ifdef CONFIG_SPI_FLASH_SST
+static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
+{
+ int ret;
+ u8 cmd[4] = {
+ CMD_SST_BP,
+ offset 16,
+ offset 8,
+ offset,
+ };
+
+ debug(BP[%02x]: 0x%p = cmd = { 0x%02x 0x%06x }\n,
+ spi_w8r8(flash-spi, CMD_READ_STATUS), buf, cmd[0], offset);
+
+ ret = spi_flash_cmd_write_enable(flash);
+ if (ret)
+ return ret;
+
+ ret = spi_flash_cmd_write(flash-spi, cmd, sizeof(cmd), buf, 1);
+ if (ret)
+ return ret;
+
+ return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+}
+
+int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
+ const void *buf)
+{
+ size_t actual, cmd_len;
+ int ret;
+ u8 cmd[4];
+
+ ret = spi_claim_bus(flash-spi);
+ if (ret) {
+ debug(SF: Unable to claim SPI bus\n);
+ return ret;
+ }
+
+ /* If the data is not word aligned, write out leading single byte */
+ actual = offset % 2;
+ if (actual) {
+ ret = sst_byte_write(flash, offset, buf);
+ if (ret)
+ goto done;
+ }
+ offset += actual;
+
+ ret = spi_flash_cmd_write_enable(flash);
+ if (ret)
+ goto done;
+
+ cmd_len = 4;
+ cmd[0] = CMD_SST_AAI_WP;
+ cmd[1] = offset 16;
+ cmd[2] = offset 8;
+ cmd[3] = offset;
+
+ for (; actual len - 1; actual += 2) {
+ debug(WP[%02x]: 0x%p = cmd = { 0x%02x 0x%06x }\n,
+ spi_w8r8(flash-spi, CMD_READ_STATUS), buf + actual,
+ cmd[0], offset);
+
+ ret = spi_flash_cmd_write(flash-spi, cmd, cmd_len,
+ buf + actual, 2);
+ if (ret) {
+ debug(SF: sst word program failed\n);
+ break;
+ }
+
+ ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+ if (ret)
+ break;
+
+ cmd_len = 1;
+ offset += 2;
+ }
+
+ if (!ret)
+ ret = spi_flash_cmd_write_disable(flash);
+
+ /* If there is a single trailing byte, write it out */
+ if (!ret actual != len)
+ ret = sst_byte_write(flash, offset, buf + actual);
+
+ done:
+ debug(SF: sst: program %s %zu bytes @ 0x%zx\n,
+ ret ? failure : success, len, offset - actual);
+
+ spi_release_bus(flash-spi);
+ return ret;
+}
+#endif
diff --git a/drivers/mtd/spi/spi_flash_probe.c
b/drivers/mtd/spi/spi_flash_probe.c
index b6cf60c..199eab8 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -26,6 +26,7 @@ DECLARE_GLOBAL_DATA_PTR;
* @ext_jedec: Device ext_jedec ID
* @sector_size: Sector size of this device
* @nr_sectors:No.of sectors on this device
+ * @flags: Importent param, for flash specific behaviour
*/
struct spi_flash_params {
const char *name;
@@ -33,101 +34,102 @@ struct spi_flash_params {
u16 ext_jedec;
u32 sector_size;
u32 nr_sectors;
+ u16 flags;
};
static const struct spi_flash_params
[U-Boot] [PATCH v5 29/32] sf: spi_flash cleanups
More cleanups on spi_flash side: - Removed unneeded comments. - Rearranged macros in proper location. - Rearranged func declerations - Renamed few function names. - Added License headers. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- Changes for v5: - none Changes for v4: - none Changes for v3: - none Changes for v2: - none drivers/mtd/spi/Makefile | 4 +- drivers/mtd/spi/spi_flash_internal.h | 119 --- drivers/mtd/spi/spi_flash_ops.c | 6 +- drivers/mtd/spi/spi_flash_probe.c| 14 ++--- include/spi_flash.h | 16 + 5 files changed, 85 insertions(+), 74 deletions(-) diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index 5678134..0fa867d 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -17,8 +17,8 @@ endif ifdef CONFIG_CMD_SF COBJS-y+= spi_flash.o endif -COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o -COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o +COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o +COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o COBJS-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o COBJS := $(COBJS-y) diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 1f9f170..29a14f4 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -2,37 +2,43 @@ * SPI flash internal definitions * * Copyright (C) 2008 Atmel Corporation + * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. + * + * Licensed under the GPL-2 or later. */ -/* Common parameters -- kind of high, but they should only occur when there - * is a problem (and well your system already is broken), so err on the side - * of caution in case we're dealing with slower SPI buses and/or processors. - */ -#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ) -#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ) -#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ) +#ifndef _SPI_FLASH_INTERNAL_H_ +#define _SPI_FLASH_INTERNAL_H_ -/* Common commands */ -#define CMD_READ_ID0x9f +#define SPI_FLASH_16MB_BOUN0x100 -#define CMD_READ_ARRAY_SLOW0x03 -#define CMD_READ_ARRAY_FAST0x0b +/* SECT flags */ +#define SECT_4K(1 1) +#define SECT_32K (1 2) +#define E_FSR (1 3) + +/* Erase commands */ +#define CMD_ERASE_4K 0x20 +#define CMD_ERASE_32K 0x52 +#define CMD_ERASE_CHIP 0xc7 +#define CMD_ERASE_64K 0xd8 +/* Write commands */ #define CMD_WRITE_STATUS 0x01 #define CMD_PAGE_PROGRAM 0x02 #define CMD_WRITE_DISABLE 0x04 #define CMD_READ_STATUS0x05 -#define CMD_FLAG_STATUS0x70 #define CMD_WRITE_ENABLE 0x06 -#define CMD_ERASE_4K 0x20 -#define CMD_ERASE_32K 0x52 -#define CMD_ERASE_64K 0xd8 -#define CMD_ERASE_CHIP 0xc7 +#define CMD_READ_CONFIG0x35 +#define CMD_FLAG_STATUS0x70 -#define SPI_FLASH_16MB_BOUN0x100 +/* Read commands */ +#define CMD_READ_ARRAY_SLOW0x03 +#define CMD_READ_ARRAY_FAST0x0b +#define CMD_READ_ID0x9f -#ifdef CONFIG_SPI_FLASH_BAR /* Bank addr access commands */ +#ifdef CONFIG_SPI_FLASH_BAR # define CMD_BANKADDR_BRWR 0x17 # define CMD_BANKADDR_BRRD 0x16 # define CMD_EXTNADDR_WREAR0xC5 @@ -43,6 +49,21 @@ #define STATUS_WIP 0x01 #define STATUS_PEC 0x80 +/* Flash timeout values */ +#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ) +#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ) +#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ) + +/* SST specific */ +#ifdef CONFIG_SPI_FLASH_SST +# define SST_WP0x01/* Supports AAI word program */ +# define CMD_SST_BP0x02/* Byte Program */ +# define CMD_SST_AAI_WP0xAD/* Auto Address Incr Word Program */ + +int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len, + const void *buf); +#endif + /* Send a single-byte command to the device and read the response */ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); @@ -53,9 +74,6 @@ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, void *data, size_t data_len); -int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, - size_t len, void *data); - /* * Send a multi-byte command to the device
[U-Boot] [PATCH v5 31/32] sf: Rename spi_flash files
Renamed:
spi_flash.c - sf.c
spi_flash_internal.h - sf_internal.h
spi_flash_ops.c - sf_ops.c
spi_flash_probe.c - sf_probe.c
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v5:
- none
Changes for v4:
- none
Changes for v3:
- none
Changes for v2:
- none
drivers/mtd/spi/Makefile| 4 ++--
drivers/mtd/spi/{spi_flash.c = sf.c} | 0
drivers/mtd/spi/{spi_flash_internal.h = sf_internal.h} | 0
drivers/mtd/spi/{spi_flash_ops.c = sf_ops.c} | 2 +-
drivers/mtd/spi/{spi_flash_probe.c = sf_probe.c} | 2 +-
5 files changed, 4 insertions(+), 4 deletions(-)
rename drivers/mtd/spi/{spi_flash.c = sf.c} (100%)
rename drivers/mtd/spi/{spi_flash_internal.h = sf_internal.h} (100%)
rename drivers/mtd/spi/{spi_flash_ops.c = sf_ops.c} (99%)
rename drivers/mtd/spi/{spi_flash_probe.c = sf_probe.c} (99%)
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 0fa867d..86ffc59 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -15,9 +15,9 @@ COBJS-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o
endif
ifdef CONFIG_CMD_SF
-COBJS-y+= spi_flash.o
+COBJS-y+= sf.o
endif
-COBJS-$(CONFIG_SPI_FLASH) += spi_flash_probe.o spi_flash_ops.o
+COBJS-$(CONFIG_SPI_FLASH) += sf_probe.o sf_ops.o
COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o
COBJS-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/sf.c
similarity index 100%
rename from drivers/mtd/spi/spi_flash.c
rename to drivers/mtd/spi/sf.c
diff --git a/drivers/mtd/spi/spi_flash_internal.h
b/drivers/mtd/spi/sf_internal.h
similarity index 100%
rename from drivers/mtd/spi/spi_flash_internal.h
rename to drivers/mtd/spi/sf_internal.h
diff --git a/drivers/mtd/spi/spi_flash_ops.c b/drivers/mtd/spi/sf_ops.c
similarity index 99%
rename from drivers/mtd/spi/spi_flash_ops.c
rename to drivers/mtd/spi/sf_ops.c
index 882c8f5..c009af5 100644
--- a/drivers/mtd/spi/spi_flash_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -13,7 +13,7 @@
#include spi_flash.h
#include watchdog.h
-#include spi_flash_internal.h
+#include sf_internal.h
static void spi_flash_addr(u32 addr, u8 *cmd)
{
diff --git a/drivers/mtd/spi/spi_flash_probe.c b/drivers/mtd/spi/sf_probe.c
similarity index 99%
rename from drivers/mtd/spi/spi_flash_probe.c
rename to drivers/mtd/spi/sf_probe.c
index e9fd013..8f56c63 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -14,7 +14,7 @@
#include spi.h
#include spi_flash.h
-#include spi_flash_internal.h
+#include sf_internal.h
DECLARE_GLOBAL_DATA_PTR;
--
1.8.3
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Re: [U-Boot] [PATCH v4 3/4] generic board patch of manual reloc and zero gd_t
-原始邮件- 发件人: Scott Wood scottw...@freescale.com 发送时间: 2013年10月1日 星期二 收件人: FengHua feng...@phytium.com.cn 抄送: Simon Glass s...@chromium.org, trini tr...@ti.com, u-boot u-boot@lists.denx.de 主题: Re: Re: [U-Boot] [PATCH v4 3/4] generic board patch of manual reloc and zero gd_t On Tue, 2013-10-01 at 19:05 +0800, FengHua wrote: How about place u-boot.bin at 0x9000 and write a piece of code (elf format) jumping from 0x8000 to 0x9000. That seems even worse than converting the .bin back into an ELF... Why? I could load u-boot.bin at 0x9000 as data, I think it should works. Or maybe secure state make the program jumping to secure memory. so try switching to el2 before jumping. It requires building another program image (even if it's a relatively simple one), as opposed to just invoking objcopy and ld, and it makes invoking the simulator more complicated. Do not need to write a new program, just add the jumping code immediately after setup_el3 of current aarch64-uboot, it's the first booting program. compile another u-boot without jumping code at 0x9000, it's the data. Do you know why loading the raw image at 0x8000 isn't working? The foundation model require a elf(axf) image being loaded, it use it to determine the entry point. Then why does it even try to start without an ELF being supplied (but won't try to start if I don't supply ELF *or* raw data)? Why is there no other way to supply an entry point (even just defaulting to the beginning of the raw image if no ELF is provided)? Fast model for aarch64 support all of these. Maybe that's why Foundatiom model is free. Why does it fail when I supply *both* the ELF and the raw image, in either order? The elf file will override the raw image if they are loaded at same address. David ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-arm/master
On Wed, Oct 02, 2013 at 05:34:07PM +0200, Albert ARIBAUD wrote: Hello Tom, The following changes since commit 8386ca8bea7a6a8469c3b6a99313afb642e6cbeb: Revert standalone-examples: support custom GCC lib (2013-09-12 10:27:29 -0400) are available in the git repository at: git://git.denx.De/u-boot-arm master for you to fetch changes up to f04c53762962280365005c9db12ab561a18f2692: Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' (2013-10-02 14:53:27 +0200) Albert ARIBAUD (3): Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master' Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' Andrew Gabbasov (1): mx6: Fix calculation of emi_slow clock rate Elie De Brauwer (1): mxs_nand: Fix ECC strength for NAND flash with OOB size of 224 Eric Nelson (2): i.MX6DL/S: add drive-strength back to pads DISP0_DAT2/DAT10 i.MX6DQ/DLS: Add pad MX6_PAD_GPIO_1__USB_OTG_ID Fabio Estevam (17): mx6sabresd: Add LVDS splash screen support wandboard: Use imx6dl-wandboard.dtb for the solo version mx6sabresd: Avoid hang when HDMI cable is not connected mx6sabresd: Reset counter to prevent error message mmc: fsl_esdhc: Check the result from malloc() mx35pdk: Remove CONFIG_SYS_CACHELINE_SIZE mx6sabresd: Return error if cpu_eth_init() fails mx6qsabreauto: Return error if cpu_eth_init() fails net: fec_mxc: Add support for mx6 solo-lite mx6slevk: Add Ethernet support mx28evk: Fix checkpatch warning doc: README.mxs: Add instruction to install 'libssl-dev' mx6sabresd: Fix the fdt file for the mx6dl version net: fec_mxc: Fix timeouts during tftp transfer mx28evk: Propagate the error if cpu_eth_init() fails mx28evk: Propagate the error if cpu_eth_init() fails mx35pdk: Fix error handling in board_late_init() Greg Guyotte (1): drivers/power/pmic: Add tps65217 driver Heiko Schocher (1): net, phy, cpsw: fix NULL pointer deference Jens Scharsig (BuS Elektronik) (1): arm: atmel: cpux9k2: increase malloc space to fix crash on start u-boot Jeroen Hofstee (4): arm: prevent using movt/movw address loads ARM,relocate: do not use r9 ARM: use r9 for gd README: update ARM register usage Kuo-Jung Su (1): arm: dma_alloc_coherent: malloc() - memalign() Lokesh Vutla (2): ARM: DRA7: Enable saveenv command ARM: OMAP5: Avoid writing into LDO SRAM bits Marek Vasut (6): tools: mxsboot: Mark the FCB pages as valid ARM: mxs: Sort the mx23evk and mx23_olinuxino ARM: mxs: Document the power block initialization ARM: mxs: Receive r0 and r1 passed from BootROM ARM: mxs: Add Creative ZEN XFi3 board ARM: mxs: Add SanDisk Sansa Fuze+ board Markus Niebel (1): ARM: arch-mx6: fix PLL2_PFD2_FREQ Masahiro Yamada (6): arm: spl: Do not set the stack pointer twice ARM: s3c44b0: remove remainders of dead board drivers: s3c44b0_i2c: delete an unused driver drivers: serial_s3c44b0: delete an unused driver drivers: s3c44b0_rtc: delete an unused driver ARM: refactor compiler options in config.mk Michal Simek (1): arm: zynq: Fix timer loadaddress Philip, Avinash (1): drivers/power/pmic: Add tps65910 driver Pierre Aubert (1): mx6: Fix use of improper value in enable_ipu_clock Robert P. J. Day (1): am335x_evm.h: If mmcdev and bootpart switch to mmcdev 1, so should mmcroot. Robert Winkler (1): imx: nitrogen6x/mx6qsabrelite: Fix bug in board_video_skip Stefano Babic (1): Merge branch 'master' of git://git.denx.de/u-boot-arm Steve Kipisz (1): am335x:Handle worst case scenario for Errata 1.0.24 Tom Rini (4): spl/Makefile: Add drivers/power/pmic/libpmic to CONFIG_SPL_POWER_SUPPORT am33xx: Add am33xx_spl_board_init function, call am33xx: Add the efuse_sma CONTROL_MODULE register am335x_evm: am33xx_spl_board_init function and scale core frequency York Sun (1): tools/imximage.c: Fix compiling warning trem (3): mx27: add missing constant for mx27 apf27: add support for the armadeus APF27 board apf27: add FPGA support for the apf27 board README | 9 ++- arch/arm/config.mk | 11 ++- arch/arm/cpu/arm1136/config.mk | 1 - arch/arm/cpu/arm1176/config.mk | 1 - arch/arm/cpu/arm720t/config.mk | 2 - arch/arm/cpu/arm920t/config.mk | 2 - arch/arm/cpu/arm925t/config.mk | 2 - arch/arm/cpu/arm926ejs/config.mk
[U-Boot] [PATCH] ARM: fdt support: Add usbethaddr as an acceptable MAC
A board that has a USB ethernet device only may set the usbetheraddr
and not the ethaddr.
ethaddr will be the default MAC address that is chosen and if that
is not populated then the usbethaddr is looked at. If neither are set
then then device tree blob is not modified.
Signed-off-by: Dan Murphy dmur...@ti.com
---
common/fdt_support.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index b034c98..fef7e60 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -450,8 +450,18 @@ void fdt_fixup_ethernet(void *fdt)
if (node 0)
return;
+ if (!getenv(ethaddr)) {
+ if (getenv(usbethaddr)) {
+ strcpy(mac, usbethaddr);
+ } else {
+ debug(No ethernet MAC Address defined\n);
+ return;
+ }
+ } else {
+ strcpy(mac, ethaddr);
+ }
+
i = 0;
- strcpy(mac, ethaddr);
while ((tmp = getenv(mac)) != NULL) {
sprintf(enet, ethernet%d, i);
path = fdt_getprop(fdt, node, enet, NULL);
--
1.7.9.5
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[U-Boot] [PATCH v5] usb: new board-specific USB init interface
This commit unifies board-specific USB initialization implementations
under one symbol (usb_board_init), declaration of which is available in
usb.h.
New API allows selective initialization of USB controllers whenever needed.
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Reviewed-by: Lukasz Majewski l.majew...@samsung.com
Cc: Marek Vasut ma...@denx.de
Cc: Lukasz Majewski l.majew...@samsung.com
---
Changes since RFC (v1):
- NVIDIA Tegra doesn't postpone its USB init anymore
- board_usb_init()'s sole argument name was shortened
- networking code comment style (/* blurb...) dropped
- squashed RFC changes so that patch won't break bisect
v2 changes:
- commit message fixup
v3 changes:
- added 'index' argument to perform selective port initialization
v4 changes:
- board_usb_init_fail() renamed to board_usb_cleanup()
- board_usb_cleanup() accepts controller index and init type
- DFU and UMS commands don't init all USB controllers anymore
- minor related fixes refactorization
v5 changes:
- fixed an issue with boards based on canyonlands.c
- patch passes MAKEALL -a powerpc (vide: ^)
---
arch/arm/include/asm/arch-tegra/usb.h | 3 +-
arch/arm/include/asm/ehci-omap.h | 4 +--
board/amcc/canyonlands/canyonlands.c | 5 +--
board/balloon3/balloon3.c | 7 +++--
board/compulab/cm_t35/cm_t35.c| 2 +-
board/esd/apc405/apc405.c | 8 ++---
board/esd/pmc440/pmc440.c | 8 ++---
board/htkw/mcx/mcx.c | 2 +-
board/icpdas/lp8x4x/lp8x4x.c | 7 +++--
board/nvidia/common/board.c | 4 ++-
board/samsung/trats/trats.c | 5 +--
board/technexion/twister/twister.c| 2 +-
board/teejet/mt_ventoux/mt_ventoux.c | 2 +-
board/ti/beagle/beagle.c | 2 +-
board/ti/omap5_uevm/evm.c | 2 +-
board/ti/panda/panda.c| 2 +-
board/toradex/colibri_pxa270/colibri_pxa270.c | 7 +++--
board/trizepsiv/conxs.c | 7 +++--
board/vpac270/vpac270.c | 7 +++--
common/cmd_dfu.c | 31 +++
common/cmd_usb_mass_storage.c | 44 ++-
common/usb.c | 5 +++
drivers/dfu/dfu.c | 2 +-
drivers/usb/host/ehci-omap.c | 12 ++--
drivers/usb/host/ehci-tegra.c | 2 +-
drivers/usb/host/ohci-hcd.c | 4 +--
drivers/usb/host/ohci.h | 11 +++
include/g_dnl.h | 2 --
include/usb.h | 30 --
include/usb_mass_storage.h| 13 +++-
30 files changed, 137 insertions(+), 105 deletions(-)
diff --git a/arch/arm/include/asm/arch-tegra/usb.h
b/arch/arm/include/asm/arch-tegra/usb.h
index f66257c..a1efd07 100644
--- a/arch/arm/include/asm/arch-tegra/usb.h
+++ b/arch/arm/include/asm/arch-tegra/usb.h
@@ -131,8 +131,7 @@
/* USB3_IF_USB_PHY_VBUS_SENSORS_0 */
#define VBUS_VLD_STS (1 26)
-
/* Setup USB on the board */
-int board_usb_init(const void *blob);
+int usb_process_devicetree(const void *blob);
#endif /* _TEGRA_USB_H_ */
diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h
index ac83a53..c7bca05 100644
--- a/arch/arm/include/asm/ehci-omap.h
+++ b/arch/arm/include/asm/ehci-omap.h
@@ -145,8 +145,8 @@ struct omap_ehci {
struct ehci_hccr;
struct ehci_hcor;
-int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata,
- struct ehci_hccr **hccr, struct ehci_hcor **hcor);
+int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor);
int omap_ehci_hcd_stop(void);
#endif /* _OMAP_COMMON_EHCI_H_ */
diff --git a/board/amcc/canyonlands/canyonlands.c
b/board/amcc/canyonlands/canyonlands.c
index cc36f45..395095e 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -16,6 +16,7 @@
#include asm/4xx_pcie.h
#include asm/ppc4xx-gpio.h
#include asm/errno.h
+#include usb.h
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH
chips */
@@ -188,7 +189,7 @@ int board_early_init_f(void)
}
#if defined(CONFIG_USB_OHCI_NEW) defined(CONFIG_SYS_USB_OHCI_BOARD_INIT)
-int usb_board_init(void)
+int board_usb_init(int index, enum board_usb_init_type init)
{
struct board_bcsr *bcsr_data =
(struct board_bcsr *)CONFIG_SYS_BCSR_BASE;
@@ -229,7 +230,7 @@ int usb_board_stop(void)
return 0;
}
-int usb_board_init_fail(void)
+int board_usb_cleanup(int index, enum board_usb_init_type init)
{
return usb_board_stop();
}
diff --git
[U-Boot] [ANN] v2013.10-rc4
Hey all, I've put v2013.10-rc4 out, only a little later than I had hoped, but I wanted to get those PRs in for this. uploaded soon. At this point, we're just about ready to release so: 1) If you have a bugfix outstand please let me know (I know about the igep and pcm cpsw fixes, those are on my list) 2) If something is broken, please shout! Thanks all! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: fdt support: Add usbethaddr as an acceptable MAC
On Wed, Oct 02, 2013 at 02:00:15PM -0500, Dan Murphy wrote:
A board that has a USB ethernet device only may set the usbetheraddr
and not the ethaddr.
ethaddr will be the default MAC address that is chosen and if that
is not populated then the usbethaddr is looked at. If neither are set
then then device tree blob is not modified.
Signed-off-by: Dan Murphy dmur...@ti.com
---
common/fdt_support.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index b034c98..fef7e60 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -450,8 +450,18 @@ void fdt_fixup_ethernet(void *fdt)
if (node 0)
return;
+ if (!getenv(ethaddr)) {
+ if (getenv(usbethaddr)) {
+ strcpy(mac, usbethaddr);
+ } else {
+ debug(No ethernet MAC Address defined\n);
+ return;
+ }
+ } else {
+ strcpy(mac, ethaddr);
+ }
+
i = 0;
- strcpy(mac, ethaddr);
while ((tmp = getenv(mac)) != NULL) {
sprintf(enet, ethernet%d, i);
path = fdt_getprop(fdt, node, enet, NULL);
The problem is we may well have both. I think we need to re-work the
function slightly to be:
while ((tmp = getenv(mac)) != NULL) {
do_fdt_fixup_ethernet_x(tmp, fdt, node, enet, i)
}
if (getenv(usbethaddr))
do_fdt_fixup_ethernet_x(usbethaddr, fdt, ...)
Where the name of the new function, and parameter order also makes sense
and is complete of course. Thanks!
--
Tom
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Re: [U-Boot] [PATCH] config.mk: Add -Wundef to CFLAGS
Hi Masahiro, On Wed, 21 Aug 2013 13:33:19 +0900, Masahiro Yamada yamad...@jp.panasonic.com wrote: Hello, Albert and U-Boot developers. The current status of this patch is Changes Requested. I love -Wundef option to be in, but it looks like difficult for me to post the version 2. The first choice to meet Albert's requirement is Therefore I ask: - that this patch be submitted along fixes to build failures it causes, as a proper patch series, by a single individual, Sorry, I cannot do this because: I am not familiar with architectures other than ARM. I understand only a few devices. To fix warnings in a correct way, a close look is often needed, but I cannot cover the whole code in the U-Boot tree. If possible, could anyone take over this task? The other option is collected by someone in an officially created git repo or branch; OK, I can do this. But I am not sure this will go well. Even if I create a new repo u-boot-wundef, how many people will pay attention to this repository? Most of users/developers track upstream repos where -Wundef warnings are never displayed. This means no one will have the motivation to fix the warnings. If this patch is desired, in which way should we continue? Comments are welcome. Sorry not to have followed up earlier. As I said, I want fixes for trivial cases -- cases where, for instance, a macro is used in an #if which has absolutely *no* definition in the whole codebase. I do not want fixes for all cases. OTOH, to find out which failures would be trivial to fix and which ones would not, you'd have to go through all of them, which could be time-consuming, depending on the number of targets. I thus suggest we use the typical U-Boot strategy: right at the beginning of the merge period, we apply the -Wundef patch onto all repos (or on the main repo and then pulled into others) and then wait for screams. Screams should come fst from custodians, who routinely build for all targets of their assigned architecture. They will see which boards fail due to undefined macros and will report those failures on the list, copying the board maintainers (or subsystem owners if the issue is not board-specific. All boards not fixed before merge window closure release will be declared dying; all those not fixed before 2014.01 will be declared dead, and orphaned and put in the scrapyard (and then, people who want them back can always resurrect *and fix* them). Subsystems... will have to be fixed some way or other. Of course, anyone with an interest can spontaneously provide fixes for boards or subsystems affected. Adding Tom and Wolfgang for advice, but of course comments are welcome from everyone. Best Regards, Masahiro Yamada Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] zynq: Use arch_cpu_init() instead of lowlevel_init()
Hi Michal,
On Tue, 24 Sep 2013 12:38:38 +0200, Michal Simek mon...@monstr.eu
wrote:
Hi Albert,
On 09/23/2013 04:37 PM, Albert ARIBAUD wrote:
Hi Michal,
On Mon, 23 Sep 2013 16:19:52 +0200, Michal Simek mon...@monstr.eu
wrote:
On 09/23/2013 02:31 PM, Albert ARIBAUD wrote:
Hi Michal,
On Thu, 22 Aug 2013 14:52:02 +0200, Michal Simek
michal.si...@xilinx.com wrote:
Zynq lowlevel_init() was implemented in C but stack
pointer is setup after function call in _main().
Move architecture setup to arch_cpu_init() which is call
as the first function in board_init_f() which
already have correct stack pointer.
Reported-by: Sven Schwermer sven.schwer...@tuhh.de
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
I can't see any problem to call zynq setup a little
bit later. There is already expectation that u-boot
runs from DDR.
Moving lowlevel_init from C to ASM is possible but
I will have to introduce new macros with hardcoded
values. Using structures is much nicer.
---
arch/arm/cpu/armv7/zynq/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/cpu/armv7/zynq/cpu.c
b/arch/arm/cpu/armv7/zynq/cpu.c
index 4367d1a..8846f30 100644
--- a/arch/arm/cpu/armv7/zynq/cpu.c
+++ b/arch/arm/cpu/armv7/zynq/cpu.c
@@ -11,6 +11,10 @@
void lowlevel_init(void)
{
+}
I'd rather you deleted lowlevel_init() as a C function with this
name should not exist.
Ok. Do you want me to create almost empty low_level.S or just use
arch/arm/cpu/arvm7/lowlevel_init.S and define empty s_init()?
Urgh. I realize removing the C function would give you more work than
simply keeping it empty until the whole s_init() mess is cleaned up. :(
I'll take your change as-is, sorry for the noise.
In connection to this topic we have recently found one issue
regarding to neon instruction which u-boot uses.
We have this code to enable them in asm and adding this to lowlevel_init.S
is straight way how to do so.
mov r0, r0
mrc p15, 0, r1, c1, c0, 2
orr r1, r1, #(0xf 20)
mcr p15, 0, r1, c1, c0, 2
fmrxr1, FPEXC
orr r1,r1, #(130)
fmxrFPEXC, r1
Is it ok to create zynq asm specific lowlevel function
or doing this through s_init() or you have nice a clean way how
this should be solved when you are saying that s_init() is mess.
Sorry for responding slowly.
I suspect when you say neon instruction that U-Boot uses, you mean neon
instructions that GCC is allowed to emit while building U-Boot, right?
So we're talking about neon insns in C code only, not asm, correct?
If this is correct, then does something prevent you from enabling
neon instructions as early as possible, in e.g. the lowlevel_init
routine?
Thanks,
Michal
Amicalement,
--
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Re: [U-Boot] imximage on the MX50
Hi Stefano, Specifically, the dcd_ptr in the v2 imx header points to an address in DDR, however I would have thought that on power-up the DCD is loaded somewhere in iRAM (since the DDR isn't running at this stage), and then only once this has been interpreted is the full image loaded into DDR. The tools/imximage.c code appears to only work with DDR addresses, and I'm assuming that this same system works fine on the MX53. Can anyone shed any light on this? The bootROM copies the DCD data into an area that is not specified, but we can assume is in the IRAM. As part of the boot process, the bootROM copies the image into a DEST memory - this is as it is called in the manuals, and this after the DCD table is parsed and executed. That means that is possible to set dcd_ptr pointint to DDR if the DCD table is programmed to set up the DDR controller, as it is actually done for i.MX51/i.MX53/i.MX6 in u-boot. Can you recommend any mechanism for debugging the boot rom execution? I can see on the SPI bus that it is trying to read from the boot flash, and it is getting the correct data (ie, the u-boot.imx image is programmed properly). However it is still failing and ending up in USB fall-back mode. Given your comments about the dcd_ptr, I can assume that isn't the problem, which leaves me at a bit of a dead end. Regards, Andre ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: fdt support: Add usbethaddr as an acceptable MAC
Tom
On 10/02/2013 02:19 PM, Tom Rini wrote:
On Wed, Oct 02, 2013 at 02:00:15PM -0500, Dan Murphy wrote:
A board that has a USB ethernet device only may set the usbetheraddr
and not the ethaddr.
ethaddr will be the default MAC address that is chosen and if that
is not populated then the usbethaddr is looked at. If neither are set
then then device tree blob is not modified.
Signed-off-by: Dan Murphy dmur...@ti.com
---
common/fdt_support.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index b034c98..fef7e60 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -450,8 +450,18 @@ void fdt_fixup_ethernet(void *fdt)
if (node 0)
return;
+if (!getenv(ethaddr)) {
+if (getenv(usbethaddr)) {
+strcpy(mac, usbethaddr);
+} else {
+debug(No ethernet MAC Address defined\n);
+return;
+}
+} else {
+strcpy(mac, ethaddr);
+}
+
i = 0;
-strcpy(mac, ethaddr);
while ((tmp = getenv(mac)) != NULL) {
sprintf(enet, ethernet%d, i);
path = fdt_getprop(fdt, node, enet, NULL);
The problem is we may well have both. I think we need to re-work the
function slightly to be:
while ((tmp = getenv(mac)) != NULL) {
do_fdt_fixup_ethernet_x(tmp, fdt, node, enet, i)
}
if (getenv(usbethaddr))
do_fdt_fixup_ethernet_x(usbethaddr, fdt, ...)
Where the name of the new function, and parameter order also makes sense
and is complete of course. Thanks!
One issue with this approach is that we don't know which inteface in the dt is
usb ethernet and which is not.
So correctly assigning the MAC to the correct inteface will be tricky.
But the patch is flawed in the affect is that it does not take into account
multiple usbethaddr either. I will rework it for this but I am not sure about
the other.
Dan
--
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Re: [U-Boot] [PATCH] ARM: fdt support: Add usbethaddr as an acceptable MAC
On Wed, Oct 02, 2013 at 03:14:26PM -0500, Dan Murphy wrote:
Tom
On 10/02/2013 02:19 PM, Tom Rini wrote:
On Wed, Oct 02, 2013 at 02:00:15PM -0500, Dan Murphy wrote:
A board that has a USB ethernet device only may set the usbetheraddr
and not the ethaddr.
ethaddr will be the default MAC address that is chosen and if that
is not populated then the usbethaddr is looked at. If neither are set
then then device tree blob is not modified.
Signed-off-by: Dan Murphy dmur...@ti.com
---
common/fdt_support.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index b034c98..fef7e60 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -450,8 +450,18 @@ void fdt_fixup_ethernet(void *fdt)
if (node 0)
return;
+ if (!getenv(ethaddr)) {
+ if (getenv(usbethaddr)) {
+ strcpy(mac, usbethaddr);
+ } else {
+ debug(No ethernet MAC Address defined\n);
+ return;
+ }
+ } else {
+ strcpy(mac, ethaddr);
+ }
+
i = 0;
- strcpy(mac, ethaddr);
while ((tmp = getenv(mac)) != NULL) {
sprintf(enet, ethernet%d, i);
path = fdt_getprop(fdt, node, enet, NULL);
The problem is we may well have both. I think we need to re-work the
function slightly to be:
while ((tmp = getenv(mac)) != NULL) {
do_fdt_fixup_ethernet_x(tmp, fdt, node, enet, i)
}
if (getenv(usbethaddr))
do_fdt_fixup_ethernet_x(usbethaddr, fdt, ...)
Where the name of the new function, and parameter order also makes sense
and is complete of course. Thanks!
One issue with this approach is that we don't know which inteface in
the dt is usb ethernet and which is not. So correctly assigning the
MAC to the correct inteface will be tricky.
Oh, that's true... Maybe I should withdraw my objection, since we're
unlikely to really see both in production cases.
But the patch is flawed in the affect is that it does not take into
account multiple usbethaddr either. I will rework it for this but I
am not sure about the other.
But we don't support that either, did a quick grep before posting.
--
Tom
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Re: [U-Boot] [PATCH] ARM: fdt support: Add usbethaddr as an acceptable MAC
Tom
On 10/02/2013 03:19 PM, Tom Rini wrote:
On Wed, Oct 02, 2013 at 03:14:26PM -0500, Dan Murphy wrote:
Tom
On 10/02/2013 02:19 PM, Tom Rini wrote:
On Wed, Oct 02, 2013 at 02:00:15PM -0500, Dan Murphy wrote:
A board that has a USB ethernet device only may set the usbetheraddr
and not the ethaddr.
ethaddr will be the default MAC address that is chosen and if that
is not populated then the usbethaddr is looked at. If neither are set
then then device tree blob is not modified.
Signed-off-by: Dan Murphy dmur...@ti.com
---
common/fdt_support.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index b034c98..fef7e60 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -450,8 +450,18 @@ void fdt_fixup_ethernet(void *fdt)
if (node 0)
return;
+ if (!getenv(ethaddr)) {
+ if (getenv(usbethaddr)) {
+ strcpy(mac, usbethaddr);
+ } else {
+ debug(No ethernet MAC Address defined\n);
+ return;
+ }
+ } else {
+ strcpy(mac, ethaddr);
+ }
+
i = 0;
- strcpy(mac, ethaddr);
while ((tmp = getenv(mac)) != NULL) {
sprintf(enet, ethernet%d, i);
path = fdt_getprop(fdt, node, enet, NULL);
The problem is we may well have both. I think we need to re-work the
function slightly to be:
while ((tmp = getenv(mac)) != NULL) {
do_fdt_fixup_ethernet_x(tmp, fdt, node, enet, i)
}
if (getenv(usbethaddr))
do_fdt_fixup_ethernet_x(usbethaddr, fdt, ...)
Where the name of the new function, and parameter order also makes sense
and is complete of course. Thanks!
One issue with this approach is that we don't know which inteface in
the dt is usb ethernet and which is not. So correctly assigning the
MAC to the correct inteface will be tricky.
Oh, that's true... Maybe I should withdraw my objection, since we're
unlikely to really see both in production cases.
But the patch is flawed in the affect is that it does not take into
account multiple usbethaddr either. I will rework it for this but I
am not sure about the other.
But we don't support that either, did a quick grep before posting.
Actually we do. If you setenv eth1addr in the enviroment it will try to set it
in the dtb for the next ethernet instance.
The other option is to set the ethaddr and then have usbethaddr reference
ethaddr and leave this code alone.
Dan
--
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Re: [U-Boot] [PATCH v2 1/3] arm/km: add support for km_kirkwood_128m16 board
Hi Holger, On Wed, 18 Sep 2013 09:32:48 +0200, Holger Brunck holger.bru...@keymile.com wrote: From: Karlheinz Jerg karlheinz.j...@keymile.com The board is similar to the standard km_kirkwood board. From a u-boot point of view, the only difference is an increased 256 MiB DRAM (128M16). A board based on this design is for example the SUP12. Signed-off-by: Karlheinz Jerg karlheinz.j...@keymile.com Signed-off-by: Holger Brunck holger.bru...@keymile.com --- boards.cfg| 1 + include/configs/km_kirkwood.h | 10 ++ 2 files changed, 11 insertions(+) diff --git a/boards.cfg b/boards.cfg index dbd8479..f48c5bb 100644 --- a/boards.cfg +++ b/boards.cfg @@ -167,6 +167,7 @@ Active arm arm926ejs kirkwoodiomega - Active arm arm926ejs kirkwoodkarotk71 tk71 - - Active arm arm926ejs kirkwoodkeymile km_arm km_kirkwood km_kirkwood:KM_KIRKWOOD Valentin Longchamp valentin.longch...@keymile.com Active arm arm926ejs kirkwoodkeymile km_arm km_kirkwood_pci km_kirkwood:KM_KIRKWOOD_PCI Valentin Longchamp valentin.longch...@keymile.com +Active arm arm926ejs kirkwoodkeymile km_arm km_kirkwood_128m16 km_kirkwood:KM_KIRKWOOD_128M16 Valentin Longchamp valentin.longch...@keymile.com Active arm arm926ejs kirkwoodkeymile km_arm kmcoge5unkm_kirkwood:KM_COGE5UN Valentin Longchamp valentin.longch...@keymile.com Active arm arm926ejs kirkwoodkeymile km_arm kmnusa km_kirkwood:KM_NUSA Valentin Longchamp valentin.longch...@keymile.com Active arm arm926ejs kirkwoodkeymile km_arm kmsuv31 km_kirkwood:KM_SUV31 Valentin Longchamp valentin.longch...@keymile.com diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h index 0e6073c..b8b64c4 100644 --- a/include/configs/km_kirkwood.h +++ b/include/configs/km_kirkwood.h @@ -35,6 +35,16 @@ #define CONFIG_KM_IVM_BUS1 /* I2C2 (Mux-Port 1)*/ #define CONFIG_KM_FPGA_CONFIG +/* KM_KIRKWOOD_128M16 */ +#elif defined(CONFIG_KM_KIRKWOOD_128M16) +#define CONFIG_IDENT_STRING \nKeymile Kirkwood 128M16 +#define CONFIG_HOSTNAME km_kirkwood_128m16 +#undef CONFIG_SYS_KWD_CONFIG +#define CONFIG_SYS_KWD_CONFIG \ + $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg +#define CONFIG_KM_DISABLE_PCIE +#define KM_IVM_BUS pca9544a:70:9 /* I2C2 (Mux-Port 1)*/ + /* KM_NUSA */ #elif defined(CONFIG_KM_NUSA) #define CONFIG_KM_IVM_BUS1 /* I2C2 (Mux-Port 1)*/ This was assigned to me on patchwork; should go to Prafulla actually, as V1 did. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ANN] v2013.10-rc4
Hi Tom, On Wed, 2 Oct 2013 15:14:09 -0400, Tom Rini tr...@ti.com wrote: Hey all, I've put v2013.10-rc4 out, only a little later than I had hoped, but I wanted to get those PRs in for this. uploaded soon. At this point, we're just about ready to release so: 1) If you have a bugfix outstand please let me know (I know about the igep and pcm cpsw fixes, those are on my list) 2) If something is broken, please shout! Thanks all! I still have the HYP mode patches to pick up, at least. They're not bugfixes but V1 was submitted wy before the merge window was closed. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] imximage on the MX50
Hi Andre, On 02/10/2013 21:41, Andre Renaud wrote: Can you recommend any mechanism for debugging the boot rom execution? I can see on the SPI bus that it is trying to read from the boot flash, and it is getting the correct data (ie, the u-boot.imx image is programmed properly). However it is still failing and ending up in USB fall-back mode. Given your comments about the dcd_ptr, I can assume that isn't the problem, which leaves me at a bit of a dead end. Are you sure that the DDR controller is corrctly initialized ? You can check with the JTAG debugger if the RAM is working as expected. If there are some errors in your DCD table and the controller is not correctly set, the processor will fall back to USB. You could also set a breakpoint to the U-Boot start address - after loading U-Boot, the SOC jumps to this address. You can check if it is hit. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] am33xx: add CONFIG_SYS_NAND_DEVICE_WIDTH to determine NAND device bus-width
On Wed, 2013-10-02 at 14:40 +, Gupta, Pekon wrote: Hi, Please see last set of queries inline.. From: Scott Wood [mailto:scottw...@freescale.com] On Sat, 2013-09-28 at 06:24 +, Gupta, Pekon wrote: From: Scott Wood [mailto:scottw...@freescale.com] On Fri, 2013-09-27 at 04:18 +, Gupta, Pekon wrote: [snip] (1) drivers/mtd/nand/fsl_ifc_spl.c (2) drivers/mtd/nand/fsl_elbc_spl.c So CONFIG_SYS_NAND_DEVICE_WIDTH should help them also. right ? How would it help? I meant, instead of requiring the modification in board file, CONFIG_SPL_DEVICE_WIDTH can be put in include/configs/*.h Those registers are already specified in include/configs/*.h for eLBC/IFC. So can this new CONFIG_xx be accepted ? Only for SPL usage. Ok. so should I rename to CONFIG_SPL_NAND_DEVICE_WIDTH ? In theory yes, though the other similar SPL NAND parameters use CONFIG_SYS. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 7/9] net: tsec: Use portable types and accessors for BDs
On Wed, 2013-10-02 at 17:16 +0300, Claudiu Manoil wrote:
On 10/1/2013 9:50 PM, Scott Wood wrote:
On Tue, 2013-10-01 at 14:38 +0300, Claudiu Manoil wrote:
On 10/1/2013 2:22 AM, Scott Wood wrote:
On Mon, 2013-09-30 at 12:44 +0300, Claudiu Manoil wrote:
+static RTXBD rtx __aligned(8);
+#define RXBD(i) rtx.rxbd[i]
+#define TXBD(i) rtx.txbd[i]
+#define GET_BD_STAT(T, i) be16_to_cpu((__force __be16)T##BD(i).status)
+#define SET_BD_STAT(T, i, v) T##BD(i).status = (__force
__u16)cpu_to_be16(v)
+#define GET_BD_BLEN(T, i) be16_to_cpu((__force __be16)T##BD(i).length)
+#define SET_BD_BLEN(T, i, v) T##BD(i).length = (__force
__u16)cpu_to_be16(v)
+#define GET_BD_BPTR(T, i) be32_to_cpu((__force __be32)T##BD(i).bufptr)
+#define SET_BD_BPTR(T, i, v) T##BD(i).bufptr = (__force
__u32)cpu_to_be32(v)
Why the forcing? Can't you declare the data with __be16/__be32?
The __force annotation is obviously needed to suppress the sparse
warnings due to BD data declaration type not being __bexx, but the
generic uintxx_t, as you noticed as well.
Now, why I didn't use __bexx instead? The main reason would be
maintainability: the DMA descriptors may not be in big endian format
exclusively. The eTSEC hw may actually have an option to interpret
the DMA descriptors in little endian format.
May have or does have?
If it does have such a feature, do you plan to use it? Usually I have
not seen such features used for (e.g.) little-endian PCI devices on big
endian hosts.
I has that option, but I don't really plan to use it, clearly not for
big endian hosts. The may have was for future little endian hosts.
But I think this option is not really needed by the uboot driver
so doing the byte swapping in software should be ok (i.e. performance
wise).
If we don't plan to use it even on future little endian hosts, then it's
no big deal to use __beNN.
What's wrong with:
for (t = 0; in_be16(rtx.rxbd[rx_idx].status) RXBD_EMPTY; t++) {
Or if you don't want to use I/O accessors on the DMA descriptors (Is
synchronization ensured some other way? We had problems with this in
the Linux driver before...):
Synchronization here is is insured by declaring the RTXBD structure
type as volatile (see RTXBD declaration, a couple of lines above).
That does not achieve hardware synchronization, and even the effects on
the compiler are questionable due to volatile's vague semantics.
The existing code has been working this way for quite a while on the
mpc85xx platforms,
It was working for a while in Linux as well, until we encountered a
workload where it didn't (though granted, there was no volatile in that
case). See Linux commit 3b6330ce2a3e1f152f79a6203f73d23356e243a7
Good point, I guess it would be safer too use some memory barriers
around accesses to BD fields in the uboot driver too. However some
portable barriers would be needed, eieio() doesn't have an equivalent
for ARM.
FWIW, I see some other places in U-Boot's TSEC driver that use
out_be32() on the descriptors (e.g. startup_tsec after Point to the
buffer descriptors).
That's only to program the tbase and rbase registers with the physical
address of the Tx/Rx BD rings' base.
Oops. :-P
Also, there doesn't seem to be other net drivers using I/O accessors
for the BD rings.
I picked some random examples, and the first driver in Linux in which I
could quickly find the BD rings uses I/O accessors
(drivers/net/ethernet/realtek/8319too.c). I then checked its U-Boot
eqivalent (drivers/net/rtl8139.c) and it also uses I/O accessors for the
descriptors.
I actually meant accessing buffer descriptor fields (like status,
length, dma address). As you can see in this example from linux
8319too.c's Rx routine, there's no I/O accessor involved:
/* read size+status of next frame from DMA ring buffer */
rx_status = le32_to_cpu (*(__le32 *) (rx_ring + ring_offset));
However the driver does use a rmb() just before this line.
Yeah, it doesn't help when both types of accesses show up when searching
for the ring, and accessors exist with both possible argument orderings.
Especially when a driver has custom accessors.
It's OK to use explicit synchronization rather than I/O accessors, if
you're careful to ensure that it's correct.
It looks like drivers/net/fec_mxc.c in U-Boot is an example that uses
I/O accessors on ring data, e.g.:
writew(length, fec-tbd_base[fec-tbd_index].data_length);
-Scott
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Re: [U-Boot] [ANN] v2013.10-rc4
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 10/02/2013 04:39 PM, Albert ARIBAUD wrote: Hi Tom, On Wed, 2 Oct 2013 15:14:09 -0400, Tom Rini tr...@ti.com wrote: Hey all, I've put v2013.10-rc4 out, only a little later than I had hoped, but I wanted to get those PRs in for this. uploaded soon. At this point, we're just about ready to release so: 1) If you have a bugfix outstand please let me know (I know about the igep and pcm cpsw fixes, those are on my list) 2) If something is broken, please shout! Thanks all! I still have the HYP mode patches to pick up, at least. They're not bugfixes but V1 was submitted wy before the merge window was closed. Ah yes, and potentially still arm64/armv8 code as well, if we can all agree on things there. - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJSTKC1AAoJENk4IS6UOR1WlRMQALBUYsK1L+8yD7lhSZHpySLG Jhy9T49yAYQO+XsPWxmNWDVJ4NTWwvZxmBM1jusWUjdBSlM/vLKuVToSUI00oQEx ySgznxC50dfqcO+E7TGJe5gtWRxrW4ODTYBB8vYyLVJ2ulBgCMdGNYdmhnKpLMtZ UOINIQF5fHjm405asschiMj4KTNv8c6FTwjnFtyIXgKa1SFZxgAp3UUFmP8WfNQW q8tNeqbGq9Kze9nwnamR/GyAZQxs05hJB3pa58A9TSIhHwUMyb7s9dwfWsLM1oPe EtR+mZ+Mbrznw5duhAq+o7EFOLHdV9Dx8cQAvZvIZBaKy+WAGQIbm2xF/m+J+oA3 175z3EGTMgD9T/zFWqR8pVD07IO0CjTNjF3hqgteK+G7fttTXV27VUPRCLe40Nm3 soivTqSWZ7py8OjlPwOl/8lWlsOGhmagoK9zeRruvu/7lVeBxRNzDUHOlcIb0q9/ Txqi6uX3uernGe3GeaJ+3qgIYZLLJxUG5/jmz27JESroix2JuknBgfRLG/Q/GVb2 GVGPj12x3/xQyKXtXwH1XUteVnRDGyCGGm2pZTilmdfgURGq9aD6JAsTOl/SgxmK r1uf4wtQ9tNd7wDQdRQfMKSzAad48cS1alXEAxOsAcoUrOEloc4kmb9VZW2vGome SVUrQFHt3aXzz6MO6YZg =ma2N -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3][v4] mtd: move update nand_ecclayout structure
nand_ecclayout is present in mtd.h at Linux.
Move this structure to mtd.h to comply with Linux.
Also, increase the ecc placement locations to 640 to suport device having
writesize/oobsize of 8KB/640B. This means that the maximum oobsize has gone
up to 640 bytes and consequently the maximum ecc placement locations have
also gone up to 640.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
CC: Vipin Kumar vipin.ku...@st.com
---
Changes for v2: Incorporated Scott's comments
- move nand_ecclayout to mtd.h
- updated OOBFREE, ECCPOS max entries
Changes for v3: Sending as it is
Changes for v4: Sending as it is
include/linux/mtd/mtd.h | 14 ++
include/mtd/mtd-abi.h | 12
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 6f44abd..3a18f8f 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -96,6 +96,20 @@ struct mtd_oob_ops {
uint8_t *oobbuf;
};
+#define MTD_MAX_OOBFREE_ENTRIES32
+#define MTD_MAX_ECCPOS_ENTRIES 640
+
+/*
+ * ECC layout control structure. Exported to userspace for
+ * diagnosis and to allow creation of raw images
+ */
+struct nand_ecclayout {
+ uint32_t eccbytes;
+ uint32_t eccpos[MTD_MAX_ECCPOS_ENTRIES];
+ uint32_t oobavail;
+ struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES];
+};
+
struct mtd_info {
u_char type;
u_int32_t flags;
diff --git a/include/mtd/mtd-abi.h b/include/mtd/mtd-abi.h
index d51c1ab..ac3c298 100644
--- a/include/mtd/mtd-abi.h
+++ b/include/mtd/mtd-abi.h
@@ -155,18 +155,6 @@ struct nand_oobfree {
uint32_t length;
};
-#define MTD_MAX_OOBFREE_ENTRIES8
-/*
- * ECC layout control structure. Exported to userspace for
- * diagnosis and to allow creation of raw images
- */
-struct nand_ecclayout {
- uint32_t eccbytes;
- uint32_t eccpos[128];
- uint32_t oobavail;
- struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES];
-};
-
/**
* struct mtd_ecc_stats - error correction stats
*
--
1.7.9.5
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[U-Boot] [PATCH 3/3][v4] board/c29xpcie: Add support of 8K page size NAND flash
Defines constants required to support 8K page size NAND flash. Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com --- Changes for v2:Sending as it is Changes for v3:Sending as it is Changes for v4:Sending as it is include/configs/C29XPCIE.h | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 83779ef..6a1e145 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -189,13 +189,14 @@ | CSPR_MSEL_NAND \ | CSPR_V) #define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) +#define CONFIG_SYS_NAND_OOBSIZE0x0280 /* 640b */ #define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ - | CSOR_NAND_RAL_2 /* RAL = 2 Bytes */ \ - | CSOR_NAND_PGS_2K /* Page Size = 2k */ \ - | CSOR_NAND_SPRZ_64 /* Spare size = 64 */ \ - | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ + | CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \ + | CSOR_NAND_PGS_8K /* Page Size = 8K */ \ + | CSOR_NAND_SPRZ_CSOR_EXT /*oob in csor_ext*/\ + | CSOR_NAND_PB(128))/*128 Pages Per Block*/ #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x01) | \ FTIM0_NAND_TWP(0x0c) | \ FTIM0_NAND_TWCHT(0x08) | \ @@ -222,6 +223,7 @@ #define CONFIG_SYS_CSPR1 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK1 CONFIG_SYS_NAND_AMASK #define CONFIG_SYS_CSOR1 CONFIG_SYS_NAND_CSOR +#define CONFIG_SYS_CSOR1_EXT CONFIG_SYS_NAND_OOBSIZE #define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NAND_FTIM0 #define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NAND_FTIM1 #define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2 -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3][v4] mtd/ifc: Add support of 8K page size NAND flash
Current IFC driver supports till 4K page size NAND flash. Add support of 8K NAND flash - Program Spare region size in csor_ext - Add nand_ecclayout for 4 bit 8 bit ecc - Defines constants - Add support of 8K NAND boot. Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com CC: Liu Po po@freescale.com --- Changes for v2: sending as it is Changes for v3: Incorporated Liu Po's commetns - Updated fsl_ifc_spl 8K if conditional check Changes for v4: fix SPL 8K condition check arch/powerpc/cpu/mpc8xxx/fsl_ifc.c | 24 +++ arch/powerpc/include/asm/fsl_ifc.h |2 + drivers/mtd/nand/fsl_ifc_nand.c| 78 drivers/mtd/nand/fsl_ifc_spl.c |5 ++- 4 files changed, 108 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c b/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c index 2d0fb43..64a5225 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c @@ -34,6 +34,9 @@ void init_early_memctl_regs(void) #ifdef CONFIG_SYS_CSPR0_EXT set_ifc_cspr_ext(IFC_CS0, CONFIG_SYS_CSPR0_EXT); #endif +#ifdef CONFIG_SYS_CSOR0_EXT + set_ifc_csor_ext(IFC_CS0, CONFIG_SYS_CSOR0_EXT); +#endif set_ifc_cspr(IFC_CS0, CONFIG_SYS_CSPR0); set_ifc_amask(IFC_CS0, CONFIG_SYS_AMASK0); set_ifc_csor(IFC_CS0, CONFIG_SYS_CSOR0); @@ -43,6 +46,9 @@ void init_early_memctl_regs(void) #ifdef CONFIG_SYS_CSPR1_EXT set_ifc_cspr_ext(IFC_CS1, CONFIG_SYS_CSPR1_EXT); #endif +#ifdef CONFIG_SYS_CSOR1_EXT + set_ifc_csor_ext(IFC_CS1, CONFIG_SYS_CSOR1_EXT); +#endif #if defined(CONFIG_SYS_CSPR1) defined(CONFIG_SYS_CSOR1) set_ifc_ftim(IFC_CS1, IFC_FTIM0, CONFIG_SYS_CS1_FTIM0); set_ifc_ftim(IFC_CS1, IFC_FTIM1, CONFIG_SYS_CS1_FTIM1); @@ -57,6 +63,9 @@ void init_early_memctl_regs(void) #ifdef CONFIG_SYS_CSPR2_EXT set_ifc_cspr_ext(IFC_CS2, CONFIG_SYS_CSPR2_EXT); #endif +#ifdef CONFIG_SYS_CSOR2_EXT + set_ifc_csor_ext(IFC_CS2, CONFIG_SYS_CSOR2_EXT); +#endif #if defined(CONFIG_SYS_CSPR2) defined(CONFIG_SYS_CSOR2) set_ifc_ftim(IFC_CS2, IFC_FTIM0, CONFIG_SYS_CS2_FTIM0); set_ifc_ftim(IFC_CS2, IFC_FTIM1, CONFIG_SYS_CS2_FTIM1); @@ -71,6 +80,9 @@ void init_early_memctl_regs(void) #ifdef CONFIG_SYS_CSPR3_EXT set_ifc_cspr_ext(IFC_CS3, CONFIG_SYS_CSPR3_EXT); #endif +#ifdef CONFIG_SYS_CSOR3_EXT + set_ifc_csor_ext(IFC_CS3, CONFIG_SYS_CSOR3_EXT); +#endif #if defined(CONFIG_SYS_CSPR3) defined(CONFIG_SYS_CSOR3) set_ifc_ftim(IFC_CS3, IFC_FTIM0, CONFIG_SYS_CS3_FTIM0); set_ifc_ftim(IFC_CS3, IFC_FTIM1, CONFIG_SYS_CS3_FTIM1); @@ -85,6 +97,9 @@ void init_early_memctl_regs(void) #ifdef CONFIG_SYS_CSPR4_EXT set_ifc_cspr_ext(IFC_CS4, CONFIG_SYS_CSPR4_EXT); #endif +#ifdef CONFIG_SYS_CSOR4_EXT + set_ifc_csor_ext(IFC_CS4, CONFIG_SYS_CSOR4_EXT); +#endif #if defined(CONFIG_SYS_CSPR4) defined(CONFIG_SYS_CSOR4) set_ifc_ftim(IFC_CS4, IFC_FTIM0, CONFIG_SYS_CS4_FTIM0); set_ifc_ftim(IFC_CS4, IFC_FTIM1, CONFIG_SYS_CS4_FTIM1); @@ -99,6 +114,9 @@ void init_early_memctl_regs(void) #ifdef CONFIG_SYS_CSPR5_EXT set_ifc_cspr_ext(IFC_CS5, CONFIG_SYS_CSPR5_EXT); #endif +#ifdef CONFIG_SYS_CSOR5_EXT + set_ifc_csor_ext(IFC_CS5, CONFIG_SYS_CSOR5_EXT); +#endif #if defined(CONFIG_SYS_CSPR5) defined(CONFIG_SYS_CSOR5) set_ifc_ftim(IFC_CS5, IFC_FTIM0, CONFIG_SYS_CS5_FTIM0); set_ifc_ftim(IFC_CS5, IFC_FTIM1, CONFIG_SYS_CS5_FTIM1); @@ -113,6 +131,9 @@ void init_early_memctl_regs(void) #ifdef CONFIG_SYS_CSPR6_EXT set_ifc_cspr_ext(IFC_CS6, CONFIG_SYS_CSPR6_EXT); #endif +#ifdef CONFIG_SYS_CSOR6_EXT + set_ifc_csor_ext(IFC_CS6, CONFIG_SYS_CSOR6_EXT); +#endif #if defined(CONFIG_SYS_CSPR6) defined(CONFIG_SYS_CSOR6) set_ifc_ftim(IFC_CS6, IFC_FTIM0, CONFIG_SYS_CS6_FTIM0); set_ifc_ftim(IFC_CS6, IFC_FTIM1, CONFIG_SYS_CS6_FTIM1); @@ -127,6 +148,9 @@ void init_early_memctl_regs(void) #ifdef CONFIG_SYS_CSPR7_EXT set_ifc_cspr_ext(IFC_CS7, CONFIG_SYS_CSPR7_EXT); #endif +#ifdef CONFIG_SYS_CSOR7_EXT + set_ifc_csor_ext(IFC_CS7, CONFIG_SYS_CSOR7_EXT); +#endif #if defined(CONFIG_SYS_CSPR7) defined(CONFIG_SYS_CSOR7) set_ifc_ftim(IFC_CS7, IFC_FTIM0, CONFIG_SYS_CS7_FTIM0); set_ifc_ftim(IFC_CS7, IFC_FTIM1, CONFIG_SYS_CS7_FTIM1); diff --git a/arch/powerpc/include/asm/fsl_ifc.h b/arch/powerpc/include/asm/fsl_ifc.h index a945e4b..182b1a6 100644 --- a/arch/powerpc/include/asm/fsl_ifc.h +++ b/arch/powerpc/include/asm/fsl_ifc.h @@ -77,6 +77,7 @@ #define CSOR_NAND_PGS_512 0x #define CSOR_NAND_PGS_2K 0x0008 #define CSOR_NAND_PGS_4K 0x0010 +#define CSOR_NAND_PGS_8K 0x0018 /* Spare region Size */ #define CSOR_NAND_SPRZ_MASK0xE000 #define CSOR_NAND_SPRZ_SHIFT 13 @@ -86,6 +87,7 @@ #define CSOR_NAND_SPRZ_210 0x6000 #define CSOR_NAND_SPRZ_218
Re: [U-Boot] [PATCH 2/6] power: Explicitly select pmic device's bus
Hello Lukasz,
Am 02.10.2013 17:11, schrieb Lukasz Majewski:
Hi Leela,
The current pmic i2c code assumes the current i2c bus is
the same as the pmic device's bus. There is nothing ensuring
that to be true. Therefore, select the proper bus before performing
a transaction.
Signed-off-by: Aaron Durbinadur...@chromium.org
Signed-off-by: Simon Glasss...@chromium.org
Signed-off-by: Leela Krishna Amudalal.kris...@samsung.com
Reviewed-by: Doug Andersondiand...@google.com
---
drivers/power/power_i2c.c | 62
+ 1 file changed, 57
insertions(+), 5 deletions(-)
diff --git a/drivers/power/power_i2c.c b/drivers/power/power_i2c.c
index 47c606f..c22e01f 100644
--- a/drivers/power/power_i2c.c
+++ b/drivers/power/power_i2c.c
@@ -16,9 +16,45 @@
#includei2c.h
#includecompiler.h
+static int pmic_select(struct pmic *p)
+{
+ int ret, old_bus;
+
+ old_bus = i2c_get_bus_num();
+ if (old_bus != p-bus) {
+ debug(%s: Select bus %d\n, __func__, p-bus);
+ ret = i2c_set_bus_num(p-bus);
+ if (ret) {
+ debug(%s: Cannot select pmic %s, err %d\n,
+ __func__, p-name, ret);
+ return -1;
+ }
+ }
+
+ return old_bus;
+}
+
+static int pmic_deselect(int old_bus)
+{
+ int ret;
+
+ if (old_bus != i2c_get_bus_num()) {
+ ret = i2c_set_bus_num(old_bus);
+ debug(%s: Select bus %d\n, __func__, old_bus);
+ if (ret) {
+ debug(%s: Cannot restore i2c bus, err %d\n,
+ __func__, ret);
+ return -1;
+ }
+ }
+
+ return 0;
+}
+
int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
{
unsigned char buf[4] = { 0 };
+ int ret, old_bus;
if (check_reg(p, reg))
return -1;
@@ -52,23 +88,33 @@ int pmic_reg_write(struct pmic *p, u32 reg, u32
val) return -1;
}
- if (i2c_write(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num))
+ old_bus = pmic_select(p);
+ if (old_bus 0)
return -1;
- return 0;
+ ret = i2c_write(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num);
I'm wondering if setting the bus before each, single i2c write (when we
usually perform several writes to one device) will not be an overkill
(we search the ll_entry_count linker list each time to find max i2c
adapter names) ?
Yes, maybe we could optimze this in drivers/i2c/i2c_core.c. It should be
enough to detect the max adapter once ... but it is not a search...
ll_entry_count() calculates the number ...
Looking in i2c_set_bus_num(), I think it can be optimized ...
lets speaking code:
diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c
index d1072e8..170423a 100644
--- a/drivers/i2c/i2c_core.c
+++ b/drivers/i2c/i2c_core.c
@@ -278,20 +278,22 @@ unsigned int i2c_get_bus_num(void)
*/
int i2c_set_bus_num(unsigned int bus)
{
- int max = ll_entry_count(struct i2c_adapter, i2c);
+ int max;
+
+ if ((bus == I2C_BUS) (I2C_ADAP-init_done 0))
+ return 0;
- if (I2C_ADAPTER(bus) = max) {
- printf(Error, wrong i2c adapter %d max %d possible\n,
- I2C_ADAPTER(bus), max);
- return -2;
- }
#ifndef CONFIG_SYS_I2C_DIRECT_BUS
if (bus = CONFIG_SYS_NUM_I2C_BUSES)
return -1;
#endif
- if ((bus == I2C_BUS) (I2C_ADAP-init_done 0))
- return 0;
+ max = ll_entry_count(struct i2c_adapter, i2c);
+ if (I2C_ADAPTER(bus) = max) {
+ printf(Error, wrong i2c adapter %d max %d possible\n,
+ I2C_ADAPTER(bus), max);
+ return -2;
+ }
#ifndef CONFIG_SYS_I2C_DIRECT_BUS
i2c_mux_disconnet_all();
So, first check, if we are on the correct bus, and return immediately!
What do you think?
Beside of that, pmic_select() does the check, if we are on the correct
bus too, and calls i2c_set_bus_num() only, if not ... so this is here
no problem ... but exactly I want to get rid of this code as it is in
pmic_select() someday, when all i2c drivers converted to the new i2c
framework. i2c_set_bus_num() should go static then in drivers/i2c/i2c_core.c
and i2c_read/write/... become a new int bus parameter ... but this
will be a big api change ... but will prevent exactly such code
all over the u-boot code ...
bye,
Heiko
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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