Re: [U-Boot] [PATCH] Powerpc/QE: Add QE support for T1040
On Sat, Jan 25, 2014 at 11:49 PM, Timur Tabiti...@tabi.org wrote: -Original Message- From: Timur Tabi [mailto:ti...@tabi.org] Sent: Saturday, January 25, 2014 11:49 PM To: Zhao Qiang-B45475 Cc: U-Boot Mailing List; Xu Jiucheng-B37781; Xie Xiaobo-R63061 Subject: Re: [U-Boot] [PATCH] Powerpc/QE: Add QE support for T1040 On Fri, Jan 24, 2014 at 3:05 AM, Zhao Qiang b45...@freescale.com wrote: +#ifdef CONFIG_PPC_T1040 + qe_upload_firmware((const void *)CONFIG_SYS_QE_UCODE_FW_ADDR); +#else qe_upload_firmware((const void *)CONFIG_SYS_QE_FMAN_FW_ADDR); +#endif It's been a while since I looked at the QE code in U-Boot, but this should be unnecessary. CONFIG_SYS_QE_FMAN_FW_ADDR is supposed to point to the QE microcode blob. Why do you need to define CONFIG_SYS_QE_UCODE_FW_ADDR? That's redundant. CONFIG_SYS_QE_FMAN_FW_ADDR is used for Fman microcode while CONFIG_SYS_QE_UCODE_FW_ADDR used For QE microcode. Regards, Zhao Qiang ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Powerpc/QE: Add QE support for T1040
Timur Tabi wrote: -Original Message- From: Timur Tabi [mailto:ti...@tabi.org] Sent: Sunday, January 26, 2014 12:37 PM To: Zhao Qiang-B45475 Cc: U-Boot Mailing List; Xu Jiucheng-B37781; Xie Xiaobo-R63061 Subject: Re: [U-Boot] [PATCH] Powerpc/QE: Add QE support for T1040 qiang.z...@freescale.com wrote: Other boards have either Fman or QE, So CONFIG_SYS_QE_FMAN_FW_ADDR can be used either Fman or QE. But T1040QDS have both Fman and QE. Does the T1040QDS have microcode for both Fman and QE? Normally, QE microcode is not needed. T1040QDS has microcode for Fman and another microcode for QE. The two microcodes is different. QE microcode is needed. Regards, Zhao Qiang ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3] mpc85xx: Add support for the supplement configuration unit register
From: Tang Yuantian yuantian.t...@freescale.com
The supplement configuration unit (SCFG) provides chip-specific
configuration and status registers for the device. It is the chip
defined module for extending the device configuration unit (DCFG)
module. It provides a set of CCSR registers in addition to those
available in the device configuration unit.
The base address for this unit is 0x0F_C000.
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
arch/powerpc/include/asm/immap_85xx.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index 68c3c82..71d803b 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -3113,4 +3113,26 @@ struct dcsr_dcfg_regs {
#defineDCSR_DCFG_ECC_DISABLE_USB2 0x4000
u8 res_524[0x1000 - 0x524]; /* 0x524 - 0x1000 */
};
+
+#define CONFIG_SYS_MPC85xx_SCFG \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_SCFG_OFFSET)
+#define CONFIG_SYS_MPC85xx_SCFG_OFFSET 0xfc000
+/* The supplement configuration unit register */
+struct ccsr_scfg {
+ u32 dpslpcr;/* 0x000 Deep Sleep Control register */
+ u32 usb1dpslpcsr; /* 0x004 USB1 Deep Sleep Control Status
register */
+ u32 usb2dpslpcsr; /* 0x008 USB2 Deep Sleep Control Status
register */
+ u32 fmclkdpslpcr; /* 0x00c FM Clock Deep Sleep Control register */
+ u32 res1[4];
+ u32 esgmiiselcr;/* 0x020 Ethernet Switch SGMII Select Control
register */
+ u32 res2;
+ u32 pixclkcr; /* 0x028 Pixel Clock Control register */
+ u32 res3[245];
+ u32 qeioclkcr; /* 0x400 QUICC Engine IO Clock Control register
*/
+ u32 emiiocr;/* 0x404 EMI MDIO Control Register */
+ u32 sdhciovselcr; /* 0x408 SDHC IO VSEL Control register */
+ u32 qmifrstcr; /* 0x40c QMAN Interface Reset Control register
*/
+ u32 res4[60];
+ u32 sparecr[8]; /* 0x500 Spare Control register(0-7) */
+};
#endif /*__IMMAP_85xx__*/
--
1.8.0
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Re: [U-Boot] [PATCH] Powerpc/QE: Add QE support for T1040
Timur Tabi wrote: -Original Message- From: Timur Tabi [mailto:ti...@tabi.org] Sent: Sunday, January 26, 2014 11:23 AM To: Zhao Qiang-B45475 Cc: U-Boot Mailing List; Xu Jiucheng-B37781; Xie Xiaobo-R63061 Subject: Re: [U-Boot] [PATCH] Powerpc/QE: Add QE support for T1040 qiang.z...@freescale.com wrote: CONFIG_SYS_QE_FMAN_FW_ADDR is used for Fman microcode while CONFIG_SYS_QE_UCODE_FW_ADDR used For QE microcode. No, CONFIG_SYS_QE_FMAN_FW_ADDR is used for both QE and Fman microcode. That's why it says QE_FMAN in it. This is documented in the README. Other boards have either Fman or QE, So CONFIG_SYS_QE_FMAN_FW_ADDR can be used either Fman or QE. But T1040QDS have both Fman and QE. Regards, Zhao Qiang ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3] mpc85xx: Add deep sleep framework support
From: Tang Yuantian yuantian.t...@freescale.com
When system wakes up from warm reset, control is passed to the
primary core that starts executing uboot. After re-initialized some
IP blocks, like DDRC, kernel will take responsibility to continue
to restore environment it leaves before.
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
arch/powerpc/cpu/mpc85xx/cpu_init.c| 7
arch/powerpc/cpu/mpc85xx/fdt.c | 27 +++
arch/powerpc/cpu/mpc85xx/liodn.c | 24 +
arch/powerpc/cpu/mpc85xx/start.S | 8 +
arch/powerpc/include/asm/global_data.h | 1 +
arch/powerpc/lib/board.c | 61 +++---
drivers/ddr/fsl/mpc85xx_ddr_gen3.c | 44 +---
include/fsl_ddr_sdram.h| 6
8 files changed, 163 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index b31efb7..376c659 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -231,6 +231,7 @@ void cpu_init_f (void)
#ifdef CONFIG_MPC8548
ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
uint svr = get_svr();
+ gd = (gd_t *)(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
/*
* CPU2 errata workaround: A core hang possible while executing
@@ -282,6 +283,12 @@ void cpu_init_f (void)
in_be32(gur-dcsrcr);
#endif
+#ifdef CONFIG_DEEP_SLEEP
+ /* disable the console if boot from warm reset */
+ if (in_be32(gur-scrtsr[0]) (1 3))
+ gd-flags |=
+ GD_FLG_SILENT | GD_FLG_WARM_BOOT |
GD_FLG_DISABLE_CONSOLE;
+#endif
}
/* Implement a dummy function for those platforms w/o SERDES */
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 33bc900..b3b9250 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -24,6 +24,9 @@ DECLARE_GLOBAL_DATA_PTR;
extern void ft_qe_setup(void *blob);
extern void ft_fixup_num_cores(void *blob);
extern void ft_srio_setup(void *blob);
+#ifdef CONFIG_DEEP_SLEEP
+extern ulong __bss_end;
+#endif
#ifdef CONFIG_MP
#include mp.h
@@ -35,6 +38,9 @@ void ft_fixup_cpu(void *blob, u64 memory_limit)
u32 bootpg = determine_mp_bootpg(NULL);
u32 id = get_my_id();
const char *enable_method;
+#ifdef CONFIG_DEEP_SLEEP
+ ulong len;
+#endif
off = fdt_node_offset_by_prop_value(blob, -1, device_type, cpu, 4);
while (off != -FDT_ERR_NOTFOUND) {
@@ -77,6 +83,25 @@ void ft_fixup_cpu(void *blob, u64 memory_limit)
device_type, cpu, 4);
}
+#ifdef CONFIG_DEEP_SLEEP
+ /*
+* reserve the memory space for warm reset.
+* This space will be re-used next time when boot from deep sleep.
+* The space includes bd_t, gd_t, stack and uboot image.
+* Reserve 1K for stack.
+*/
+ len = sizeof(bd_t) + sizeof(gd_t) + (1 10);
+ /* round up to 4K */
+ len = (len + (4096 - 1)) ~(4096 - 1);
+
+ off = fdt_add_mem_rsv(blob, gd-relocaddr - len,
+ len + ((ulong)__bss_end - gd-relocaddr));
+ if (off 0)
+ printf(Failed to reserve memory for warm reset: %s\n,
+ fdt_strerror(off));
+
+#endif
+
/* Reserve the boot page so OSes dont use it */
if ((u64)bootpg memory_limit) {
off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
@@ -100,6 +125,7 @@ void ft_fixup_cpu(void *blob, u64 memory_limit)
}
#endif
+#ifndef CONFIG_DEEP_SLEEP
/* Reserve spin table page */
if (spin_tbl_addr memory_limit) {
off = fdt_add_mem_rsv(blob,
@@ -108,6 +134,7 @@ void ft_fixup_cpu(void *blob, u64 memory_limit)
printf(Failed to reserve memory for spin table: %s\n,
fdt_strerror(off));
}
+#endif
}
#endif
diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c
index 19e130e..898685b 100644
--- a/arch/powerpc/cpu/mpc85xx/liodn.c
+++ b/arch/powerpc/cpu/mpc85xx/liodn.c
@@ -14,6 +14,10 @@
#include asm/fsl_portals.h
#include asm/fsl_liodn.h
+#ifdef CONFIG_DEEP_SLEEP
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
int get_dpaa_liodn(enum fsl_dpaa_dev dpaa_dev, u32 *liodns, int liodn_offset)
{
liodns[0] = liodn_bases[dpaa_dev].id[0] + liodn_offset;
@@ -180,14 +184,22 @@ void set_liodns(void)
/* setup FMAN block(s) liodn bases offsets if we have one */
#ifdef CONFIG_SYS_DPAA_FMAN
- set_liodn(fman1_liodn_tbl, fman1_liodn_tbl_sz);
- setup_fman_liodn_base(FSL_HW_PORTAL_FMAN1, fman1_liodn_tbl,
- fman1_liodn_tbl_sz);
+#ifdef CONFIG_DEEP_SLEEP
+ if ((gd-flags GD_FLG_WARM_BOOT) == 0) {
+ set_liodn(fman1_liodn_tbl, fman1_liodn_tbl_sz);
+
[U-Boot] [PATCH 3/3] mpc85xx: Add deep sleep support on T1040QDS
From: Tang Yuantian yuantian.t...@freescale.com
Add deep sleep support on T1040QDS platforms.
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
board/freescale/t1040qds/t1040qds.c | 12
include/configs/T1040QDS.h | 4
2 files changed, 16 insertions(+)
diff --git a/board/freescale/t1040qds/t1040qds.c
b/board/freescale/t1040qds/t1040qds.c
index de3ea5c..2494da6 100644
--- a/board/freescale/t1040qds/t1040qds.c
+++ b/board/freescale/t1040qds/t1040qds.c
@@ -18,6 +18,7 @@
#include asm/fsl_portals.h
#include asm/fsl_liodn.h
#include fm_eth.h
+#include asm/mpc85xx_gpio.h
#include ../common/qixis.h
#include t1040qds.h
@@ -244,3 +245,14 @@ int board_need_mem_reset(void)
{
return 1;
}
+
+#ifdef CONFIG_DEEP_SLEEP
+void board_mem_sleep_setup(void)
+{
+ /* does not provide HW signals for power management */
+ QIXIS_WRITE(pwr_ctl[1], (QIXIS_READ(pwr_ctl[1]) ~0x2));
+ /* Disable MCKE isolation */
+ gpio_set_value(2, 0);
+ udelay(1);
+}
+#endif
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 91b511b..9c5daf1 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -36,6 +36,10 @@
#define CONFIG_SYS_FSL_PBL_RCW
$(SRCTREE)/board/freescale/t1040qds/t1040_rcw.cfg
#endif
+/* support deep sleep */
+#define CONFIG_DEEP_SLEEP
+#define CONFIG_SILENT_CONSOLE
+
/* High Level Configuration Options */
#define CONFIG_BOOKE
#define CONFIG_E500/* BOOKE e500 family */
--
1.8.0
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Re: [U-Boot] [PATCH 1/4] ARM: armv7: Make indirect vector addresses globl
Hi Marek, On 14/12/2013 05:55, Marek Vasut wrote: Make indirect vectors addresses global, so they can be replaced by various code that needs to do so. For example the MX6 PCI express driver needs to temporarily replace data abort handler when reading the config space. Signed-off-by: Marek Vasut ma...@denx.de Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: Eric Nelson eric.nel...@boundarydevices.com Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sba...@denx.de --- Applied (due to dependencies with the rest of pathset) to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 2/4] ARM: mx6: Add PCI express clock configuration
Hi Marek, On 14/12/2013 06:27, Marek Vasut wrote: Split the SATA clock enabling function and add PCI express clock enabling function. The SATA clock enabling function starts up the 100MHz SATA reference PLL in ENET_PLL register, but the code can be re-used to enable the 125MHz PCIe reference in ENET_PLL, so pull this code into separate function. Moreover, add the PCIe clock enabling code. Signed-off-by: Marek Vasut ma...@denx.de Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: Eric Nelson eric.nel...@boundarydevices.com Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sba...@denx.de Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 3/4] ARM: mx6: Add PCI express driver
Hi Marek, On 14/12/2013 05:55, Marek Vasut wrote: Add PCIe driver for the Freescale i.MX6 SoC . This driver operates the PCIe block in RC mode only, the EP mode is NOT supported. The driver is tested with the Intel e1000 NIC driver. Signed-off-by: Marek Vasut ma...@denx.de Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: Eric Nelson eric.nel...@boundarydevices.com Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sba...@denx.de Applied to u-boot-imx, thanks ! Best regards, Stefano Babic - = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 4/4] ARM: mx6: Enable PCIe on Sabrelite
Hi Marek, On 14/12/2013 05:55, Marek Vasut wrote: Enable PCI express on MX6 Sabrelite. Signed-off-by: Marek Vasut ma...@denx.de Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: Eric Nelson eric.nel...@boundarydevices.com Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sba...@denx.de --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] mx6: Distinguish mx6dual from mx6quad
Hi Fabio, hi Otavio,
On 22/01/2014 21:19, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
Currently when we boot a mx6dual U-boot reports that it is a mx6quad.
Report it as MX6D instead:
CPU: Freescale i.MX6D rev1.2 at 792 MHz
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Tested-by: Otavio Salvador ota...@ossystems.com.br
---
Changes since v1:
- Fix mx5 build error (Otavio)
arch/arm/cpu/armv7/mx6/soc.c | 14 +++---
arch/arm/imx-common/cpu.c | 2 ++
arch/arm/include/asm/arch-mx5/sys_proto.h | 1 +
arch/arm/include/asm/arch-mx6/sys_proto.h | 1 +
4 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 0208cba..9acd8c9 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -41,14 +41,19 @@ u32 get_cpu_rev(void)
if (type != MXC_CPU_MX6SL) {
reg = readl(anatop-digprog);
+ struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
+ u32 cfg = readl(scu-config) 3;
type = ((reg 16) 0xff);
if (type == MXC_CPU_MX6DL) {
- struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
- u32 cfg = readl(scu-config) 3;
-
if (!cfg)
type = MXC_CPU_MX6SOLO;
}
+
+ if (type == MXC_CPU_MX6Q) {
+ if (cfg == 1)
+ type = MXC_CPU_MX6D;
+ }
+
}
reg = 0xff;/* mx6 silicon revision */
return (type 12) | (reg + 0x10);
@@ -62,6 +67,9 @@ u32 __weak get_board_rev(void)
if (type == MXC_CPU_MX6SOLO)
cpurev = (MXC_CPU_MX6DL) 12 | (cpurev 0xFFF);
+ if (type == MXC_CPU_MX6D)
+ cpurev = (MXC_CPU_MX6Q) 12 | (cpurev 0xFFF);
+
return cpurev;
}
#endif
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 9231649..a77c4de 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -106,6 +106,8 @@ const char *get_imx_type(u32 imxtype)
switch (imxtype) {
case MXC_CPU_MX6Q:
return 6Q; /* Quad-core version of the mx6 */
+ case MXC_CPU_MX6D:
+ return 6D; /* Dual-core version of the mx6 */
case MXC_CPU_MX6DL:
return 6DL; /* Dual Lite version of the mx6 */
case MXC_CPU_MX6SOLO:
diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h
b/arch/arm/include/asm/arch-mx5/sys_proto.h
index 9949ad1..7dacc4c 100644
--- a/arch/arm/include/asm/arch-mx5/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx5/sys_proto.h
@@ -14,6 +14,7 @@
#define MXC_CPU_MX6DL 0x61
#define MXC_CPU_MX6SOLO 0x62
#define MXC_CPU_MX6Q 0x63
+#define MXC_CPU_MX6D 0x64
Agree generally with the patch, but it seems to me better, instead of
fixing the MX5 here, to move all CPU definitions outside the specific
MX5/MX6 files into imx-common. They can be then defined once else in
each sys_proto.h.
I have nothing against a new file, maybe cpu.h ?
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH] nitrogen6x: README: Only calling 'make' is enough
Hi Fabio, On 24/01/2014 12:15, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com No need to pass 'u-boot.imx' as parameter for 'make' because u-boot.imx is built by default. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- board/boundary/nitrogen6x/README | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/boundary/nitrogen6x/README b/board/boundary/nitrogen6x/README index 5049093..6f449be 100644 --- a/board/boundary/nitrogen6x/README Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] nitrogen6x: README: Do not refer to MAINTAINERS file
Hi Fabio, On 24/01/2014 12:27, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com MAINTAINERS file has been removed from the project. Replace its reference with 'boards.cfg' file instead. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] ARM: m53evk: Rename mxc-nand to mxc_nand
On 21/01/2014 22:00, Marek Vasut wrote: The name the Linux kernel expects is 'mxc_nand' , not 'mxc-nand' . This patch renames the driver name. Signed-off-by: Marek Vasut ma...@denx.de Cc: Stefano Babic sba...@denx.de --- include/configs/m53evk.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h index d812349..db3697d 100644 --- a/include/configs/m53evk.h Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] ARM: m53evk: Enable CONFIG_REGEX
On 21/01/2014 22:00, Marek Vasut wrote: Enable CONFIG_REGEX on M53EVK to allow usage of regular expressions on environment variables. Signed-off-by: Marek Vasut ma...@denx.de Cc: Stefano Babic sba...@denx.de --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Powerpc/QE: Add QE support for T1040
qiang.z...@freescale.com wrote: T1040QDS has microcode for Fman and another microcode for QE. The two microcodes is different. QE microcode is needed. Then why do you have an #else statement: +#ifdef CONFIG_PPC_T1040 + qe_upload_firmware((const void *)CONFIG_SYS_QE_UCODE_FW_ADDR); +#else qe_upload_firmware((const void *)CONFIG_SYS_QE_FMAN_FW_ADDR); +#endif On the T1040, you're uploading only the QE firmware. I think you're going to have to do a lot of work to fix this. #ifdef CONFIG_PPC_T1040 is not acceptable. 1. Replace CONFIG_SYS_QE_FMAN_FW_ADDR with CONFIG_SYS_QE_FW_ADDR and CONFIG_SYS_FMAN_FW_ADDR. Any board that uses CONFIG_SYS_QE_FMAN_FW_ADDR for QE firmware will use CONFIG_SYS_QE_FW_ADDR instead. Any board that uses CONFIG_SYS_QE_FMAN_FW_ADDR for Fman firmware will use CONFIG_SYS_FMAN_FW_ADDR instead. 2. Modify the QE code to use CONFIG_SYS_QE_FW_ADDR to upload the QE firmware. Modify the Fman code to use CONFIG_SYS_FMAN_FW_ADDR to upload the Fman firmwre. Then you can do this: #ifdef CONFIG_SYS_QE_FW_ADDR qe_upload_firmware((const void *)CONFIG_SYS_QE_FW_ADDR); #endif #ifdef CONFIG_SYS_FMAN_FW_ADDR qe_upload_firmware((const void *)CONFIG_SYS_FMAN_FW_ADDR); +#endif 3. Update the README This way, you can support all SoCs that have QE and/or Fman, without making the code work only on the T1040. Don't forget to test other boards with QE and Fman before posting patches so that you know you didn't break any other boards. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 1/5] fs: fix generic save command implementation
On 23 January 2014 12:56, Stephen Warren swar...@wwwdotorg.org wrote: From: Stephen Warren swar...@nvidia.com Fix a few issues with the generic save shell command, and fs_write() function. 1) fstypes[].write wasn't filled in for some file-systems, and isn't checked when used, which could cause crashes/... if executing save on e.g. fat/ext filesystems. 2) fs_write() requires the length argument to be non-zero, since it needs to know exactly how many bytes to write. Adjust the comments and code according to this. 3) fs_write() wasn't prototyped in fs.h like other generic functions; other code should be able to call this directly rather than invoking the save shell command. Cc: Simon Glass s...@chromium.org Signed-off-by: Stephen Warren swar...@nvidia.com Not sure about the change log for v2, but the patch looks good. Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 2/5] fs: implement infra-structure for an 'exists' function
Hi Stephen,
On 23 January 2014 12:56, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
This could be used in scripts such as:
if exists mmc 0:1 /boot/boot.scr; then
load mmc 0:1 ${scriptaddr} /boot/boot.scr
source ${scriptaddr}
fi
rather than:
if load mmc 0:1 ${scriptaddr} /boot/boot.scr; then
source ${scriptaddr}
fi
This prevents errors being printed by attempts to load non-existent
files, which can be important when checking for a large set of files,
such as /boot/boot.scr.uimg, /boot/boot.scr, /boot/extlinux.conf,
/boot.scr.uimg, /boot.scr, /extlinux.conf.
Change log?
Signed-off-by: Stephen Warren swar...@nvidia.com
Acked-by: Simon Glass s...@chromium.org
Seems useful.
In addition, if it is just the error messages you are worried about (and I
agree they should be eliminated) I wonder if we should consider adding a -e
flag (or similar) to the read command to make it silently fail when the
file does not exist? Arguably your code fragment above could be:
if load -e mmc 0:1 ${scriptaddr} /boot/boot.scr; then
source ${scriptaddr}
fi
Regards,
Simon
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Re: [U-Boot] [PATCH V2 3/5] sandbox: implement fs_exists() and 'sb exists' shell function
On 23 January 2014 12:56, Stephen Warren swar...@wwwdotorg.org wrote: From: Stephen Warren swar...@nvidia.com This hooks into the generic file exists support added in the previous patch, and provides an implementation for the sandbox test environment. Signed-off-by: Stephen Warren swar...@nvidia.com Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 4/5] ext4: implement exists() for ext4fs
On 23 January 2014 12:56, Stephen Warren swar...@wwwdotorg.org wrote: From: Stephen Warren swar...@nvidia.com This hooks into the generic file exists support added in an earlier patch, and provides an implementation for the ext4 filesystem. Signed-off-by: Stephen Warren swar...@nvidia.com Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 5/5] fat: implement exists() for FAT fs
Hi Stephen,
On 23 January 2014 12:57, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
This hooks into the generic file exists support added in an earlier
patch, and provides an implementation for the ext4 filesystem.
s/ext4/fat
Signed-off-by: Stephen Warren swar...@nvidia.com
---
v2: s/ext/fat/ in the commit subject
---
fs/fat/fat.c | 18 ++
fs/fs.c | 2 +-
include/fat.h | 1 +
3 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index b41d62e3c386..bc06c0a3c688 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -808,7 +808,7 @@ __u8 do_fat_read_at_block[MAX_CLUSTSIZE]
long
do_fat_read_at(const char *filename, unsigned long pos, void *buffer,
- unsigned long maxsize, int dols)
+ unsigned long maxsize, int dols, int dogetsize)
I think it would be better to combine the three available operations (read,
ls and getsize) into an enum and pass the required operation explicitly
into this function in a single parameter.
{
char fnamecopy[2048];
boot_sector bs;
@@ -1152,7 +1152,10 @@ rootdir_done:
subname = nextname;
}
- ret = get_contents(mydata, dentptr, pos, buffer, maxsize);
+ if (dogetsize)
+ ret = FAT2CPU32(dentptr-size);
+ else
+
Doesn't this mean you are actually reading the contents here into a NULL
buffer? At least I think it needs a comment as to why this works.
ret = get_contents(mydata, dentptr, pos, buffer, maxsize);
debug(Size: %d, got: %ld\n, FAT2CPU32(dentptr-size), ret);
exit:
@@ -1163,7 +1166,7 @@ exit:
long
do_fat_read(const char *filename, void *buffer, unsigned long maxsize,
int dols)
{
- return do_fat_read_at(filename, 0, buffer, maxsize, dols);
+ return do_fat_read_at(filename, 0, buffer, maxsize, dols, 0);
}
int file_fat_detectfs(void)
@@ -1233,11 +1236,18 @@ int file_fat_ls(const char *dir)
return do_fat_read(dir, NULL, 0, LS_YES);
}
+int fat_exists(const char *filename)
+{
+ int sz;
+ sz = do_fat_read_at(filename, 0, NULL, 0, LS_NO, 1);
+ return (sz = 0) ? 0 : 1;
+}
+
long file_fat_read_at(const char *filename, unsigned long pos, void
*buffer,
unsigned long maxsize)
{
printf(reading %s\n, filename);
- return do_fat_read_at(filename, pos, buffer, maxsize, LS_NO);
+ return do_fat_read_at(filename, pos, buffer, maxsize, LS_NO, 0);
}
long file_fat_read(const char *filename, void *buffer, unsigned long
maxsize)
diff --git a/fs/fs.c b/fs/fs.c
index 3f14d0169b43..d2bc8d0f1459 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -80,7 +80,7 @@ static struct fstype_info fstypes[] = {
.probe = fat_set_blk_dev,
.close = fat_close,
.ls = file_fat_ls,
- .exists = fs_exists_unsupported,
+ .exists = fat_exists,
.read = fat_read_file,
.write = fs_write_unsupported,
},
diff --git a/include/fat.h b/include/fat.h
index 2c951e7d79c6..c8eb7ccd2904 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -188,6 +188,7 @@ file_read_func file_fat_read;
int file_cd(const char *path);
int file_fat_detectfs(void);
int file_fat_ls(const char *dir);
+int fat_exists(const char *filename);
long file_fat_read_at(const char *filename, unsigned long pos, void
*buffer,
unsigned long maxsize);
long file_fat_read(const char *filename, void *buffer, unsigned long
maxsize);
--
1.8.1.5
Regards,
Simon
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Re: [U-Boot] [PATCH] Add lzmadec command
Hi Patrice, On 24 January 2014 14:39, Tom Rini tr...@ti.com wrote: On Thu, Dec 19, 2013 at 11:10:24AM +0100, Patrice B wrote: Hi, I needed to be able to uncompress lzma files. I did this command based on unzip command and propose it if it could help. Hopping the patch is correctly done... Best regards. Patrice Signed-off-by: Patrice Bouchand pbfwdlist_gmail_com The code looks fine, but we don't add code that isn't enabled anywhere. So unless Simon wants to pick this up for sandbox, I'm marking this as deferred in patchwork, thanks! It's fine to enable this in sandbox if you want to - just send a separate patch to add the CONFIG to include/configs/sandbox.h, test it in sandbox (make sandbox_config; make; ./u-boot) and Cc me. I will pick it up. Regards, Simon -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 01/14] mmc: tegra: support Tegra124
Hi Stephen, On 24 January 2014 12:46, Stephen Warren swar...@wwwdotorg.org wrote: From: Stephen Warren swar...@nvidia.com Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren swar...@nvidia.com Acked-by: Pantelis Antoniou pa...@antoniou-consulting.com Tested-by: Thierry Reding tred...@nvidia.com As a general comment on this series (not this patch) there is is distressing amount of code duplication. It seems to me that this is just going to get more and more painful unless it is addressed. Removing and refactoring duplicated code is a difficult task. In particular defining almost identical clock functions in multiple files just doesn't seem like a good idea. Other than that this series looks good to me. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/2] imx: Introduce a header for the imx cpu versions
From: Fabio Estevam fabio.este...@freescale.com Instead of duplicating the CPU definitions at mx5 and mx6 sys_proto.h header files, introduce a common header to centralize such definitions. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- arch/arm/include/asm/arch-imx/cpu.h | 12 arch/arm/include/asm/arch-mx5/sys_proto.h | 7 +-- arch/arm/include/asm/arch-mx6/sys_proto.h | 8 +--- 3 files changed, 14 insertions(+), 13 deletions(-) create mode 100644 arch/arm/include/asm/arch-imx/cpu.h diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h new file mode 100644 index 000..8c725e2 --- /dev/null +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -0,0 +1,12 @@ +/* + * (C) Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#define MXC_CPU_MX51 0x51 +#define MXC_CPU_MX53 0x53 +#define MXC_CPU_MX6SL 0x60 +#define MXC_CPU_MX6DL 0x61 +#define MXC_CPU_MX6SOLO0x62 +#define MXC_CPU_MX6Q 0x63 diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h index 9949ad1..ac7705b 100644 --- a/arch/arm/include/asm/arch-mx5/sys_proto.h +++ b/arch/arm/include/asm/arch-mx5/sys_proto.h @@ -8,12 +8,7 @@ #ifndef _SYS_PROTO_H_ #define _SYS_PROTO_H_ -#define MXC_CPU_MX51 0x51 -#define MXC_CPU_MX53 0x53 -#define MXC_CPU_MX6SL 0x60 -#define MXC_CPU_MX6DL 0x61 -#define MXC_CPU_MX6SOLO0x62 -#define MXC_CPU_MX6Q 0x63 +#include ../arch-imx/cpu.h #define is_soc_rev(rev)((get_cpu_rev() 0xFF) - rev) u32 get_cpu_rev(void); diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 17125a6..38851a1 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -9,13 +9,7 @@ #define _SYS_PROTO_H_ #include asm/imx-common/regs-common.h - -#define MXC_CPU_MX51 0x51 -#define MXC_CPU_MX53 0x53 -#define MXC_CPU_MX6SL 0x60 -#define MXC_CPU_MX6DL 0x61 -#define MXC_CPU_MX6SOLO0x62 -#define MXC_CPU_MX6Q 0x63 +#include ../arch-imx/cpu.h #define is_soc_rev(rev)((get_cpu_rev() 0xFF) - rev) u32 get_cpu_rev(void); -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/2] mx6: Distinguish mx6dual from mx6quad
Currently when we boot a mx6dual U-boot reports that it is a mx6quad.
Report it as MX6D instead:
CPU: Freescale i.MX6D rev1.2 at 792 MHz
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
arch/arm/cpu/armv7/mx6/soc.c| 14 +++---
arch/arm/imx-common/cpu.c | 2 ++
arch/arm/include/asm/arch-imx/cpu.h | 1 +
3 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 0208cba..9acd8c9 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -41,14 +41,19 @@ u32 get_cpu_rev(void)
if (type != MXC_CPU_MX6SL) {
reg = readl(anatop-digprog);
+ struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
+ u32 cfg = readl(scu-config) 3;
type = ((reg 16) 0xff);
if (type == MXC_CPU_MX6DL) {
- struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
- u32 cfg = readl(scu-config) 3;
-
if (!cfg)
type = MXC_CPU_MX6SOLO;
}
+
+ if (type == MXC_CPU_MX6Q) {
+ if (cfg == 1)
+ type = MXC_CPU_MX6D;
+ }
+
}
reg = 0xff;/* mx6 silicon revision */
return (type 12) | (reg + 0x10);
@@ -62,6 +67,9 @@ u32 __weak get_board_rev(void)
if (type == MXC_CPU_MX6SOLO)
cpurev = (MXC_CPU_MX6DL) 12 | (cpurev 0xFFF);
+ if (type == MXC_CPU_MX6D)
+ cpurev = (MXC_CPU_MX6Q) 12 | (cpurev 0xFFF);
+
return cpurev;
}
#endif
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 9231649..a77c4de 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -106,6 +106,8 @@ const char *get_imx_type(u32 imxtype)
switch (imxtype) {
case MXC_CPU_MX6Q:
return 6Q;/* Quad-core version of the mx6 */
+ case MXC_CPU_MX6D:
+ return 6D;/* Dual-core version of the mx6 */
case MXC_CPU_MX6DL:
return 6DL; /* Dual Lite version of the mx6 */
case MXC_CPU_MX6SOLO:
diff --git a/arch/arm/include/asm/arch-imx/cpu.h
b/arch/arm/include/asm/arch-imx/cpu.h
index 8c725e2..a35940e 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -10,3 +10,4 @@
#define MXC_CPU_MX6DL 0x61
#define MXC_CPU_MX6SOLO0x62
#define MXC_CPU_MX6Q 0x63
+#define MXC_CPU_MX6D 0x64
--
1.8.1.2
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Re: [U-Boot] fdt performance
Hi Aaron, On 13 January 2014 23:13, Aaron Williams aaron.willi...@caviumnetworks.com wrote: Hi Simon, Sorry for the long delay. On 10/17/2013 03:27 PM, Simon Glass wrote: Hi Aaron, On Thu, Oct 17, 2013 at 12:24 AM, Aaron Williams aaron.willi...@caviumnetworks.com wrote: Hi all, In our bootloader based off of 2013.07 we make extensive use of the flat device tree. In profiling our bootloader in our simulator I found that the function eating up the most time is fdt_next_tag. Looking at it, especially fdt_offset_ptr, it looks like there is a lot of room for improvement especially in the skip name section. Some of the checks in fdt_offset_ptr also look useless, such as if ((offset + len) offset) which will always be false, or if (p + len p) len is always positive. Are you using CONFIG_OF_CONTROL? If so, as a higher-level point, we could bring in an efficient DT library, which converts the the FDT into a tree structure for faster parsing. I can point you to a starting point if you like. Regards, Simon A higher-level point is not desirable since when we are experiencing the performance issues we are running out of NOR flash or our simulator. Since most of our customers use NOR flash this a huge issue for us. We have very little memory available for holding data structures since basically only the stack is available before relocation. Taking out these checks significantly sped up our boot process. If you're checking for a wrap-around it should not check for each byte but should check only once if it will wrap and handle it accordingly. If we're wrapping then the device tree is hosed and we have bigger problems. Are you scanning through the FDT multiple times before relocation? Certainly libfdt is designed to be careful about things and there are many checks. Are you suggesting adding some kind of CONFIG optoin tot turn them off? I'm having a hard time understanding why these simple checks (which would expand to a few machine instructions) should take so long. Have you confirmed that removing them does significantly speed up the hardware, and it is not just an artifact of your profiling system? It is certainly possible to pass a -ve number as the device tree offset to any of the exported functions. This should result in correct behaviour (returning an error) rather than a crash. Of course anything that speeds up the code is welcome so long as it is still correct. Regards, Simon -Aaron -- Aaron Williams Software Engineer Cavium, Inc. (408) 943-7198 (510) 789-8988 (cell) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 2/2] mx6: Distinguish mx6dual from mx6quad
From: Fabio Estevam fabio.este...@freescale.com
Currently when we boot a mx6dual U-boot reports that it is a mx6quad.
Report it as MX6D instead:
CPU: Freescale i.MX6D rev1.2 at 792 MHz
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v3:
- Fix From field
Changes since v2:
- use a common cpu.h header
arch/arm/cpu/armv7/mx6/soc.c| 14 +++---
arch/arm/imx-common/cpu.c | 2 ++
arch/arm/include/asm/arch-imx/cpu.h | 1 +
3 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 0208cba..9acd8c9 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -41,14 +41,19 @@ u32 get_cpu_rev(void)
if (type != MXC_CPU_MX6SL) {
reg = readl(anatop-digprog);
+ struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
+ u32 cfg = readl(scu-config) 3;
type = ((reg 16) 0xff);
if (type == MXC_CPU_MX6DL) {
- struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
- u32 cfg = readl(scu-config) 3;
-
if (!cfg)
type = MXC_CPU_MX6SOLO;
}
+
+ if (type == MXC_CPU_MX6Q) {
+ if (cfg == 1)
+ type = MXC_CPU_MX6D;
+ }
+
}
reg = 0xff;/* mx6 silicon revision */
return (type 12) | (reg + 0x10);
@@ -62,6 +67,9 @@ u32 __weak get_board_rev(void)
if (type == MXC_CPU_MX6SOLO)
cpurev = (MXC_CPU_MX6DL) 12 | (cpurev 0xFFF);
+ if (type == MXC_CPU_MX6D)
+ cpurev = (MXC_CPU_MX6Q) 12 | (cpurev 0xFFF);
+
return cpurev;
}
#endif
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 9231649..a77c4de 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -106,6 +106,8 @@ const char *get_imx_type(u32 imxtype)
switch (imxtype) {
case MXC_CPU_MX6Q:
return 6Q;/* Quad-core version of the mx6 */
+ case MXC_CPU_MX6D:
+ return 6D;/* Dual-core version of the mx6 */
case MXC_CPU_MX6DL:
return 6DL; /* Dual Lite version of the mx6 */
case MXC_CPU_MX6SOLO:
diff --git a/arch/arm/include/asm/arch-imx/cpu.h
b/arch/arm/include/asm/arch-imx/cpu.h
index 8c725e2..a35940e 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -10,3 +10,4 @@
#define MXC_CPU_MX6DL 0x61
#define MXC_CPU_MX6SOLO0x62
#define MXC_CPU_MX6Q 0x63
+#define MXC_CPU_MX6D 0x64
--
1.8.1.2
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[U-Boot] [PATCH v4 1/2] imx: Introduce a header for the imx cpu versions
From: Fabio Estevam fabio.este...@freescale.com Instead of duplicating the CPU definitions at mx5 and mx6 sys_proto.h header files, introduce a common header to centralize such definitions. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Changes since v3: - no changes Changes since v2: - Newly introduced arch/arm/include/asm/arch-imx/cpu.h | 12 arch/arm/include/asm/arch-mx5/sys_proto.h | 7 +-- arch/arm/include/asm/arch-mx6/sys_proto.h | 8 +--- 3 files changed, 14 insertions(+), 13 deletions(-) create mode 100644 arch/arm/include/asm/arch-imx/cpu.h diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h new file mode 100644 index 000..8c725e2 --- /dev/null +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -0,0 +1,12 @@ +/* + * (C) Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#define MXC_CPU_MX51 0x51 +#define MXC_CPU_MX53 0x53 +#define MXC_CPU_MX6SL 0x60 +#define MXC_CPU_MX6DL 0x61 +#define MXC_CPU_MX6SOLO0x62 +#define MXC_CPU_MX6Q 0x63 diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h index 9949ad1..ac7705b 100644 --- a/arch/arm/include/asm/arch-mx5/sys_proto.h +++ b/arch/arm/include/asm/arch-mx5/sys_proto.h @@ -8,12 +8,7 @@ #ifndef _SYS_PROTO_H_ #define _SYS_PROTO_H_ -#define MXC_CPU_MX51 0x51 -#define MXC_CPU_MX53 0x53 -#define MXC_CPU_MX6SL 0x60 -#define MXC_CPU_MX6DL 0x61 -#define MXC_CPU_MX6SOLO0x62 -#define MXC_CPU_MX6Q 0x63 +#include ../arch-imx/cpu.h #define is_soc_rev(rev)((get_cpu_rev() 0xFF) - rev) u32 get_cpu_rev(void); diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 17125a6..38851a1 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -9,13 +9,7 @@ #define _SYS_PROTO_H_ #include asm/imx-common/regs-common.h - -#define MXC_CPU_MX51 0x51 -#define MXC_CPU_MX53 0x53 -#define MXC_CPU_MX6SL 0x60 -#define MXC_CPU_MX6DL 0x61 -#define MXC_CPU_MX6SOLO0x62 -#define MXC_CPU_MX6Q 0x63 +#include ../arch-imx/cpu.h #define is_soc_rev(rev)((get_cpu_rev() 0xFF) - rev) u32 get_cpu_rev(void); -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] mx6: Distinguish mx6dual from mx6quad
Hi Stefano, On Sun, Jan 26, 2014 at 10:07 AM, Stefano Babic sba...@denx.de wrote: Agree generally with the patch, but it seems to me better, instead of fixing the MX5 here, to move all CPU definitions outside the specific MX5/MX6 files into imx-common. They can be then defined once else in each sys_proto.h. I have nothing against a new file, maybe cpu.h ? Yes, it looks better by having a common cpu.h. Just sent v4. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 2/5] fs: implement infra-structure for an 'exists' function
Dear Stephen Warren,
In message 1390507020-15766-2-git-send-email-swar...@wwwdotorg.org you wrote:
From: Stephen Warren swar...@nvidia.com
This could be used in scripts such as:
if exists mmc 0:1 /boot/boot.scr; then
load mmc 0:1 ${scriptaddr} /boot/boot.scr
source ${scriptaddr}
fi
I understand and agree with your intentions, but I dislike to invent a
new, totally non-standard command.
In UNIX, we would use the test command for such purposes. Would it
not make sense to implement this feature in a more compatible way? we
have test, soo, so we should be able to plug it in there?
What do you think?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Life, loathe it or ignore it, you can't like it.
- Marvin the paranoid android
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Re: [U-Boot] [PATCH v4 0/8] Provide a mechanism to avoid using #ifdef everywhere
Hi Detlev,
On 17 January 2014 08:13, Detlev Zundel d...@denx.de wrote:
Hi Simon,
[...]
I think the Linux code has two big advantages - for one, we increase the
overlap with Linux kernel proper and secondly we keep the 'grep'ability
of the names which I really missed in your proposal.
Yes that seems reasonable.
Ok, I'm glad we are in agreement.
Many of U-Boot's options are not just yes/no, so I'm not sure what will
happen with those. Perhaps they just can't be used with this macro? Part
of
my intent was to allow any option to be used.
In those cases the defines then are a shortcut to using a boolean + a
value and we can make it work by introducing this boolean? I have no
idea of how much work this would be, but it might be worthwhile getting
some real numbers to that.
So for example you can do this:
struct {
const char *str;
u_int len;
int retry;
const char *conf; /* Configuration value */
}
delaykey [] = {
{ str: getenv(bootdelaykey), retry: 1,
conf: autoconf_autoboot_delay_str() },
{ str: getenv(bootdelaykey2), retry: 1,
conf: autoconf_autoboot_delay_str2() },
{ str: getenv(bootstopkey), retry: 0,
conf: autoconf_autoboot_stop_str() },
{ str: getenv(bootstopkey2), retry: 0,
conf: autoconf_autoboot_stop_str2() },
};
or this:
/* don't retry auto boot? */
if (autoconf_boot_retry_time()
!delaykey[i].retry)
retry_time = -1;
Note that autoconf_boot_retry_time() will return 0 if the CONFIG is not
defined, or if its value is 0.
I'm having real trouble figuring out what this would do on first sight.
Of course you could call me lazy, but by experience I tend to favour
solutions that do not need geniuses to understand ;)
Well it is simply that we currently have options which may or may not
be defined. If they are not defined, then it is an error to refer to
them, so they must be guarded by an #ifdef. By defining them to 0 when
not defined, we can avoid that guard.
Ok, I see. But in this way we are actually shutting up the compiler on
code paths that we did not have before. This in effect is a rather be
quiet than error strategy and I'm not sure that I want to use that
when doing such changes. Call me old-fashioned, but I'd prefer to throw
an error and fix it after thinking it through from todays perspective
(I can say this easily if I'm not the one who has to do the fixes ;)
Well another approach would be to change the meaning of options like
CONFIG_BOOTDELAY:
- Boot Delay: CONFIG_BOOTDELAY - in seconds
Delay before automatically booting the default image;
set to -1 to disable autoboot.
set to -2 to autoboot with no delay and not check for abort
(even when CONFIG_ZERO_BOOTDELAY_CHECK is defined).
Here it is enabled if = 0, disabled if -1 and -2 for another option.
If it is not defined at all then it is effectively -1, meaning
disabled. IMO these could be separated out a little better. The
problem here is that we can't have code like:
if (CONFIG_BOOTDELAY != -1) {
// do some bootdelay processing
}
as we will get a compile error if CONFIG_BOOTDELAY is not defined. In
this case, CONFIG_BOOTDELAY being undefined is equivalent to defining
it to -1 (I think).
There are only a small number of options in this category, but even
with one, it prevents the technique above.
It seems to me we should provide the Linux feature in U-Boot as part of
the
Kconfig stuff, and see where it takes us. Combined with a bit more
rationalisation of things like main.c it might be enough.
Why not reimplement your patch set along those lines? I still really
would _love_ to see us using the compiler more to check for errors and
reduce the number of potential source code combination that we have.
Well certainly I could, but I did not want to do this while
Kbuild/Kconfig is in progress, and we are not quite clear on what to
do. I think Kbuild is done - we will probably get the Linux autoconf
stuff for free with Kconfig which I understand is coming very soon.
This makes a lot of sense yes. Actually I'm pretty excited about this
excellent and continuous work from Masahiro-san on that topic!
Yes, looking forward to an early merge!
After that I can certainly take another look at main.c and see how it
can be improved.
Sure, its only that I wanted to keep the ball rolling as I really
believe the wins to be had from such a change are substantial for our
codebase.
Certainly main.c could use something like this as my example showed.
In fact it might be nice to split out the parser into a separate file.
Regards,
Simon
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Re: [U-Boot] [PATCH 2/7] fdt: add fdt sign command
Hi Heiko,
On 24 January 2014 23:44, Heiko Schocher h...@denx.de wrote:
check if a fdt is correct signed
pass an optional addr value. Contains the addr of the key blob
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Simon Glass s...@chromium.org
---
common/cmd_fdt.c | 38 +-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/common/cmd_fdt.c b/common/cmd_fdt.c
index 3a9edd6..b8468ea 100644
--- a/common/cmd_fdt.c
+++ b/common/cmd_fdt.c
@@ -243,7 +243,7 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
/*
* Set the value of a property in the working_fdt.
*/
- } else if (argv[1][0] == 's') {
+ } else if (strncmp(argv[1], se, 2) == 0) {
char *pathp;/* path */
char *prop; /* property */
int nodeoffset;/* node offset from libfdt */
@@ -283,6 +283,37 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
return 1;
}
+#if defined(CONFIG_FIT_SIGNATURE)
+ } else if (strncmp(argv[1], si, 2) == 0) {
+ int cfg_noffset;
+ int ret;
+ unsigned long addr;
+ struct fdt_header *blob;
+
+ if (!working_fdt)
+ return CMD_RET_FAILURE;
+
+ if (argc 2) {
+ addr = simple_strtoul(argv[2], NULL, 16);
+ blob = map_sysmem(addr, 0);
+ } else {
+ blob = (struct fdt_header *)gd-fdt_blob;
+ }
+ if (!fdt_valid(blob))
+ return 1;
+
+ gd-fdt_blob = blob;
+ cfg_noffset = fit_conf_get_node(working_fdt, NULL);
+ if (!cfg_noffset)
+ return CMD_RET_FAILURE;
May need to print an error here, since otherwise it won't be clear
what went wrong.
+
+ ret = fit_config_verify(working_fdt, cfg_noffset);
+ if (ret == 1)
+ return CMD_RET_SUCCESS;
+ else
+ return CMD_RET_FAILURE;
+#endif
+
/
* Get the value of a property in the working_fdt.
/
@@ -992,6 +1023,11 @@ static char fdt_help_text[] =
fdt rsvmem delete index - Delete a mem reserves\n
fdt chosen [start end] - Add/update the /chosen branch
in the tree\n
start/end - initrd
start/end addr\n
+#if defined(CONFIG_FIT_SIGNATURE)
+ fdt sign [addr] - check FIT signature\n
How about checksig instead of sign? 'sign' sounds like you are going to sign it.
+ start - addr of key blob\n
+ default
gd-fdt_blob\n
+#endif
NOTE: Dereference aliases by omiting the leading '/',
e.g. fdt print ethernet0.;
#endif
--
1.8.3.1
Regards,
Simon
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Re: [U-Boot] [PATCH 1/7] tools/image-host: fix sign-images bug
Hi Heiko, On 24 January 2014 23:44, Heiko Schocher h...@denx.de wrote: property sign-images is never found, fix this. Signed-off-by: Heiko Schocher h...@denx.de Cc: Simon Glass s...@chromium.org --- tools/image-host.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/image-host.c b/tools/image-host.c index 0d5c88c..8e185ec 100644 --- a/tools/image-host.c +++ b/tools/image-host.c @@ -403,7 +403,7 @@ static int fit_config_get_hash_list(void *fit, int conf_noffset, goto err_mem; /* Get a list of images that we intend to sign */ - prop = fit_config_get_image_list(fit, conf_noffset, len, + prop = fit_config_get_image_list(fit, sig_offset, len, allow_missing); Acked-by: Simon Glass s...@chromium.org Unfortunately I did not add a test for this. if (!prop) return 0; -- 1.8.3.1 Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/7] fit: add sha256 support
On 24 January 2014 23:44, Heiko Schocher h...@denx.de wrote:
add sha256 support to fit images
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Simon Glass s...@chromium.org
Acked-by: Simon Glass s...@chromium.org
---
common/image-fit.c | 5 +
include/image.h| 9 +
lib/sha256.c | 2 +-
tools/Makefile | 3 +++
4 files changed, 18 insertions(+), 1 deletion(-)
diff --git a/common/image-fit.c b/common/image-fit.c
index cf4b67e..f32feb6 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -22,6 +22,7 @@ DECLARE_GLOBAL_DATA_PTR;
#include bootstage.h
#include sha1.h
+#include sha256.h
#include u-boot/crc.h
#include u-boot/md5.h
@@ -882,6 +883,10 @@ int calculate_hash(const void *data, int data_len, const
char *algo,
sha1_csum_wd((unsigned char *)data, data_len,
(unsigned char *)value, CHUNKSZ_SHA1);
*value_len = 20;
+ } else if (IMAGE_ENABLE_SHA256 strcmp(algo, sha256) == 0) {
+ sha256_csum_wd((unsigned char *)data, data_len,
+ (unsigned char *)value, CHUNKSZ_SHA256);
+ *value_len = SHA256_SUM_LEN;
} else if (IMAGE_ENABLE_MD5 strcmp(algo, md5) == 0) {
md5_wd((unsigned char *)data, data_len, value, CHUNKSZ_MD5);
*value_len = 16;
diff --git a/include/image.h b/include/image.h
index 7de2bb2..f001a5f 100644
--- a/include/image.h
+++ b/include/image.h
@@ -57,13 +57,18 @@ struct lmb;
# ifdef CONFIG_SPL_SHA1_SUPPORT
# define IMAGE_ENABLE_SHA1 1
# endif
+# ifdef CONFIG_SPL_SHA256_SUPPORT
+# define IMAGE_ENABLE_SHA256 1
+# endif
# else
# define CONFIG_CRC32 /* FIT images need CRC32 support */
# define CONFIG_MD5 /* and MD5 */
# define CONFIG_SHA1 /* and SHA1 */
+# define CONFIG_SHA256/* and SHA256 */
# define IMAGE_ENABLE_CRC32 1
# define IMAGE_ENABLE_MD5 1
# define IMAGE_ENABLE_SHA11
+# define IMAGE_ENABLE_SHA256 1
# endif
#ifndef IMAGE_ENABLE_CRC32
@@ -78,6 +83,10 @@ struct lmb;
#define IMAGE_ENABLE_SHA1 0
#endif
+#ifndef IMAGE_ENABLE_SHA256
+#define IMAGE_ENABLE_SHA2560
+#endif
+
#endif /* CONFIG_FIT */
#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
diff --git a/lib/sha256.c b/lib/sha256.c
index 7348162..5766de2 100644
--- a/lib/sha256.c
+++ b/lib/sha256.c
@@ -258,7 +258,7 @@ void sha256_csum_wd(const unsigned char *input, unsigned
int ilen,
{
sha256_context ctx;
#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
- unsigned char *end, *curr;
+ const unsigned char *end, *curr;
int chunk;
#endif
diff --git a/tools/Makefile b/tools/Makefile
index 328cea3..5e36e5e 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -71,6 +71,7 @@ EXT_OBJ_FILES-y += common/image-sig.o
EXT_OBJ_FILES-y += lib/crc32.o
EXT_OBJ_FILES-y += lib/md5.o
EXT_OBJ_FILES-y += lib/sha1.o
+EXT_OBJ_FILES-y += lib/sha256.o
# Source files located in the tools directory
NOPED_OBJ_FILES-y += aisimage.o
@@ -223,6 +224,7 @@ $(obj)dumpimage$(SFX): $(obj)aisimage.o \
$(obj)os_support.o \
$(obj)pblimage.o \
$(obj)sha1.o \
+ $(obj)sha256.o \
$(obj)ublimage.o \
$(LIBFDT_OBJS) \
$(RSA_OBJS)
@@ -252,6 +254,7 @@ $(obj)mkimage$(SFX):$(obj)aisimage.o \
$(obj)os_support.o \
$(obj)pblimage.o \
$(obj)sha1.o \
+ $(obj)sha256.o \
$(obj)ublimage.o \
$(LIBFDT_OBJS) \
$(RSA_OBJS)
--
1.8.3.1
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Re: [U-Boot] [PATCH 4/7] rsa: add sha256-rsa2048 algorithm
Hi Heiko,
On 24 January 2014 23:44, Heiko Schocher h...@denx.de wrote:
based on patch from andr...@oetken.name:
http://patchwork.ozlabs.org/patch/294318/
Should probably add the full commit message in here.
- removed checkpatch warnings
- removed compiler warnings
- rebased against current head
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Simon Glass s...@chromium.org
Cc: andr...@oetken.name
---
common/image-sig.c | 33 +
include/image.h| 21 +++
include/rsa-checksum.h | 25 +
include/rsa.h | 25 +
lib/rsa/Makefile | 2 +-
lib/rsa/rsa-checksum.c | 98
++
lib/rsa/rsa-sign.c | 10 +++---
lib/rsa/rsa-verify.c | 83 +-
8 files changed, 233 insertions(+), 64 deletions(-)
create mode 100644 include/rsa-checksum.h
create mode 100644 lib/rsa/rsa-checksum.c
diff --git a/common/image-sig.c b/common/image-sig.c
index 973b06d..8b212a7 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -14,15 +14,47 @@ DECLARE_GLOBAL_DATA_PTR;
#endif /* !USE_HOSTCC*/
#include image.h
#include rsa.h
+#include rsa-checksum.h
#define IMAGE_MAX_HASHED_NODES 100
+#if defined(CONFIG_FIT_SIGNATURE)
+struct checksum_algo checksum_algos[] = {
+ {
+ sha1,
+ SHA1_SUM_LEN,
+#if IMAGE_ENABLE_SIGN
+ EVP_sha1,
+#else
+ sha1_calculate,
+ padding_sha1_rsa2048,
+#endif
+ },
+ {
+ sha256,
+ SHA256_SUM_LEN,
+#if IMAGE_ENABLE_SIGN
+ EVP_sha256,
+#else
+ sha256_calculate,
+ padding_sha256_rsa2048,
+#endif
+ }
+};
struct image_sig_algo image_sig_algos[] = {
{
sha1,rsa2048,
rsa_sign,
rsa_add_verify_data,
rsa_verify,
+ checksum_algos[0],
+ },
+ {
+ sha256,rsa2048,
+ rsa_sign,
+ rsa_add_verify_data,
+ rsa_verify,
+ checksum_algos[1],
}
};
@@ -407,3 +439,4 @@ int fit_config_verify(const void *fit, int conf_noffset)
return !fit_config_verify_required_sigs(fit, conf_noffset,
gd_fdt_blob());
}
+#endif
diff --git a/include/image.h b/include/image.h
index f001a5f..eb3429f 100644
--- a/include/image.h
+++ b/include/image.h
@@ -832,6 +832,7 @@ int calculate_hash(const void *data, int data_len, const
char *algo,
# ifdef USE_HOSTCC
# define IMAGE_ENABLE_SIGN1
# define IMAGE_ENABLE_VERIFY 0
+# include openssl/evp.h
#else
# define IMAGE_ENABLE_SIGN0
# define IMAGE_ENABLE_VERIFY 1
@@ -871,6 +872,23 @@ struct image_region {
int size;
};
+#if IMAGE_ENABLE_VERIFY
+# include rsa-checksum.h
+#endif
+struct checksum_algo {
+ const char *name;
+ const int checksum_len;
+#if IMAGE_ENABLE_SIGN
+ const EVP_MD *(*calculate)(void);
+#else
+#if IMAGE_ENABLE_VERIFY
+ void (*calculate)(const struct image_region region[],
+ int region_count, uint8_t *checksum);
+ const uint8_t *rsa_padding;
+#endif
+#endif
+};
+
struct image_sig_algo {
const char *name; /* Name of algorithm */
@@ -921,6 +939,9 @@ struct image_sig_algo {
int (*verify)(struct image_sign_info *info,
const struct image_region region[], int region_count,
uint8_t *sig, uint sig_len);
+
+ /* pointer to checksum algorithm */
+ struct checksum_algo *checksum;
};
/**
diff --git a/include/rsa-checksum.h b/include/rsa-checksum.h
new file mode 100644
index 000..12494a6
--- /dev/null
+++ b/include/rsa-checksum.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2013, Andreas Oetken.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+*/
+
+#ifndef _RSA_CHECKSUM_H
+#define _RSA_CHECKSUM_H
+
+#include errno.h
+#include image.h
+#include sha1.h
+#include sha256.h
+
+#if IMAGE_ENABLE_VERIFY
+extern const uint8_t padding_sha256_rsa2048[];
+extern const uint8_t padding_sha1_rsa2048[];
+
+void sha256_calculate(const struct image_region region[], int region_count,
+ uint8_t *checksum);
+void sha1_calculate(const struct image_region region[], int region_count,
+ uint8_t *checksum);
+#endif
+
+#endif
diff --git a/include/rsa.h b/include/rsa.h
index add4c78..adf809b 100644
--- a/include/rsa.h
+++ b/include/rsa.h
@@ -15,6 +15,20 @@
#include errno.h
#include image.h
+/**
+ * struct rsa_public_key - holder for a public key
+ *
+ * An RSA public key consists of a modulus (typically called N), the inverse
+ * and R^2, where R is 2^(# key bits).
+ */
+
+struct rsa_public_key {
+ uint len;
Re: [U-Boot] [PATCH 5/7] rsa: add sha256,rsa4096 algorithm
Hi Heiko,
On 24 January 2014 23:44, Heiko Schocher h...@denx.de wrote:
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Simon Glass s...@chromium.org
Missing commit message. Is there no way to integrate this with
common/hash.c? Perhaps the start/finish part of the hashing algorithm
should be added to hash.h struct hash_algo?
I have a patch from Hung-ying Tyan that mostly does this. It won't
apply directly, but here it is below in case it helps...
Regards,
Simon
From: Hung-ying Tyan ty...@chromium.org
Date: Tue, 21 May 2013 18:24:37 +0800
Subject: [PATCH] gen: Add progressive hash API
Add hash_init(), hash_update() and hash_finish() to the hash_algo struct.
Add hash_lookup_algo() to look up the struct given an algorithm name.
Got properly encoded result. See
https://gerrit-int.chromium.org/#/c/38781 for the hashp command.
Used mm command to iteratively write and md command to dump
standard string (mentioned below) to memory location 0x40008000.
String:
20656854 63697571 7262206b 206e776f
20786f66 706d756a 766f2073 74207265
6c206568 20797a61 00676f64
(The quick brown fox jumps over the lazy dog)
Encoded String:
d7a8fbb307d7809469ca9abcb0082e4f8d5651e46d3cdb762d02d0bf37c9e592
Signed-off-by: Hung-ying Tyan ty...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
common/hash.c | 115 +++--
include/hash.h | 49
2 files changed, 153 insertions(+), 11 deletions(-)
diff --git a/common/hash.c b/common/hash.c
index 10e887f..5d4fc4e 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -26,11 +26,94 @@
#include common.h
#include command.h
#include hash.h
+#include malloc.h
#include sha1.h
#include sha256.h
#include asm/io.h
#include asm/errno.h
+#ifdef CONFIG_CMD_SHA1SUM
+static int hash_init_sha1(struct hash_algo *algo, void **ctxp)
+{
+ sha1_context *ctx = malloc(sizeof(sha1_context));
+ sha1_starts(ctx);
+ *ctxp = ctx;
+ return 0;
+}
+
+static int hash_update_sha1(struct hash_algo *algo, void *ctx, const void *buf,
+unsigned int size, int is_last)
+{
+ sha1_update((sha1_context *) ctx, buf, size);
+ return 0;
+}
+
+static int hash_finish_sha1(struct hash_algo *algo, void *ctx, void *dest_buf,
+int size)
+{
+ if (size algo-digest_size) {
+ return -1;
+ }
+ sha1_finish((sha1_context *) ctx, dest_buf);
+ free(ctx);
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_SHA256
+static int hash_init_sha256(struct hash_algo *algo, void **ctxp)
+{
+ sha256_context *ctx = malloc(sizeof(sha256_context));
+ sha256_starts(ctx);
+ *ctxp = ctx;
+ return 0;
+}
+
+static int hash_update_sha256(struct hash_algo *algo, void *ctx,
+ const void *buf, unsigned int size, int is_last)
+{
+ sha256_update((sha256_context *) ctx, buf, size);
+ return 0;
+}
+
+static int hash_finish_sha256(struct hash_algo *algo, void *ctx, void
*dest_buf,
+int size)
+{
+ if (size algo-digest_size) {
+ return -1;
+ }
+ sha256_finish((sha256_context *) ctx, dest_buf);
+ free(ctx);
+ return 0;
+}
+#endif
+
+static int hash_init_crc32(struct hash_algo *algo, void **ctxp)
+{
+ uint32_t *ctx = malloc(sizeof(uint32_t));
+ *ctx = 0;
+ *ctxp = ctx;
+ return 0;
+}
+
+static int hash_update_crc32(struct hash_algo *algo, void *ctx,
+ const void *buf, unsigned int size, int is_last)
+{
+ *((uint32_t *) ctx) = crc32(*((uint32_t *) ctx), buf, size);
+ return 0;
+}
+
+static int hash_finish_crc32(struct hash_algo *algo, void *ctx, void *dest_buf,
+int size)
+{
+ if (size algo-digest_size) {
+ return -1;
+ }
+ *((uint32_t *) dest_buf) = *((uint32_t *) ctx);
+ free(ctx);
+ return 0;
+}
+
/*
* These are the hash algorithms we support. Chips which support accelerated
* crypto could perhaps add named version of these algorithms here. Note that
@@ -65,6 +148,9 @@ static struct hash_algo hash_algo[] = {
SHA1_SUM_LEN,
sha1_csum_wd,
CHUNKSZ_SHA1,
+ hash_init_sha1,
+ hash_update_sha1,
+ hash_finish_sha1,
},
#define MULTI_HASH
#endif
@@ -74,6 +160,9 @@ static struct hash_algo hash_algo[] = {
SHA256_SUM_LEN,
sha256_csum_wd,
CHUNKSZ_SHA256,
+ hash_init_sha256,
+ hash_update_sha256,
+ hash_finish_sha256,
},
#define MULTI_HASH
#endif
@@ -82,6 +171,9 @@ static struct hash_algo hash_algo[] = {
4,
crc32_wd_buf,
CHUNKSZ_CRC32,
+ hash_init_crc32,
+ hash_update_crc32,
+ hash_finish_crc32,
},
};
@@ -216,16 +308,19 @@ static int parse_verify_sum(struct hash_algo
*algo, char *verify_str, u8 *vsum,
return 0;
}
-static struct hash_algo *find_hash_algo(const char *name)
+int hash_lookup_algo(const char *algo_name, struct hash_algo **algop)
{
int i;
for (i = 0; i ARRAY_SIZE(hash_algo); i++) {
- if (!strcmp(name, hash_algo[i].name))
- return hash_algo[i];
+ if (!strcmp(algo_name, hash_algo[i].name)) {
+ *algop = hash_algo[i];
+ return 0;
+ }
}
- return NULL;
+ debug(Unknown hash algorithm '%s'\n, algo_name);
+ return -EPROTONOSUPPORT;
}
static void show_hash(struct hash_algo *algo, ulong addr, ulong len,
@@
Re: [U-Boot] [PATCH v4 2/2] mx6: Distinguish mx6dual from mx6quad
Hi Fabio,
On 26/01/2014 18:06, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
Currently when we boot a mx6dual U-boot reports that it is a mx6quad.
Report it as MX6D instead:
CPU: Freescale i.MX6D rev1.2 at 792 MHz
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v3:
- Fix From field
Changes since v2:
- use a common cpu.h header
arch/arm/cpu/armv7/mx6/soc.c| 14 +++---
arch/arm/imx-common/cpu.c | 2 ++
arch/arm/include/asm/arch-imx/cpu.h | 1 +
3 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 0208cba..9acd8c9 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -41,14 +41,19 @@ u32 get_cpu_rev(void)
if (type != MXC_CPU_MX6SL) {
reg = readl(anatop-digprog);
+ struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
+ u32 cfg = readl(scu-config) 3;
type = ((reg 16) 0xff);
if (type == MXC_CPU_MX6DL) {
- struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
- u32 cfg = readl(scu-config) 3;
-
if (!cfg)
type = MXC_CPU_MX6SOLO;
}
+
+ if (type == MXC_CPU_MX6Q) {
+ if (cfg == 1)
+ type = MXC_CPU_MX6D;
+ }
+
}
reg = 0xff;/* mx6 silicon revision */
return (type 12) | (reg + 0x10);
@@ -62,6 +67,9 @@ u32 __weak get_board_rev(void)
if (type == MXC_CPU_MX6SOLO)
cpurev = (MXC_CPU_MX6DL) 12 | (cpurev 0xFFF);
+ if (type == MXC_CPU_MX6D)
+ cpurev = (MXC_CPU_MX6Q) 12 | (cpurev 0xFFF);
+
return cpurev;
}
#endif
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 9231649..a77c4de 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -106,6 +106,8 @@ const char *get_imx_type(u32 imxtype)
switch (imxtype) {
case MXC_CPU_MX6Q:
return 6Q; /* Quad-core version of the mx6 */
+ case MXC_CPU_MX6D:
+ return 6D; /* Dual-core version of the mx6 */
case MXC_CPU_MX6DL:
return 6DL; /* Dual Lite version of the mx6 */
case MXC_CPU_MX6SOLO:
diff --git a/arch/arm/include/asm/arch-imx/cpu.h
b/arch/arm/include/asm/arch-imx/cpu.h
index 8c725e2..a35940e 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -10,3 +10,4 @@
#define MXC_CPU_MX6DL 0x61
#define MXC_CPU_MX6SOLO 0x62
#define MXC_CPU_MX6Q 0x63
+#define MXC_CPU_MX6D 0x64
Acked-by: Stefano babic sba...@denx.de
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
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Re: [U-Boot] [PATCH v4 2/2] mx6: Distinguish mx6dual from mx6quad
On Sun, Jan 26, 2014 at 8:39 PM, Stefano Babic sba...@denx.de wrote:
Hi Fabio,
On 26/01/2014 18:06, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
Currently when we boot a mx6dual U-boot reports that it is a mx6quad.
Report it as MX6D instead:
CPU: Freescale i.MX6D rev1.2 at 792 MHz
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v3:
- Fix From field
Changes since v2:
- use a common cpu.h header
arch/arm/cpu/armv7/mx6/soc.c| 14 +++---
arch/arm/imx-common/cpu.c | 2 ++
arch/arm/include/asm/arch-imx/cpu.h | 1 +
3 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 0208cba..9acd8c9 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -41,14 +41,19 @@ u32 get_cpu_rev(void)
if (type != MXC_CPU_MX6SL) {
reg = readl(anatop-digprog);
+ struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
+ u32 cfg = readl(scu-config) 3;
type = ((reg 16) 0xff);
if (type == MXC_CPU_MX6DL) {
- struct scu_regs *scu = (struct scu_regs
*)SCU_BASE_ADDR;
- u32 cfg = readl(scu-config) 3;
-
if (!cfg)
type = MXC_CPU_MX6SOLO;
}
+
+ if (type == MXC_CPU_MX6Q) {
+ if (cfg == 1)
+ type = MXC_CPU_MX6D;
+ }
+
}
reg = 0xff;/* mx6 silicon revision */
return (type 12) | (reg + 0x10);
@@ -62,6 +67,9 @@ u32 __weak get_board_rev(void)
if (type == MXC_CPU_MX6SOLO)
cpurev = (MXC_CPU_MX6DL) 12 | (cpurev 0xFFF);
+ if (type == MXC_CPU_MX6D)
+ cpurev = (MXC_CPU_MX6Q) 12 | (cpurev 0xFFF);
+
return cpurev;
}
#endif
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 9231649..a77c4de 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -106,6 +106,8 @@ const char *get_imx_type(u32 imxtype)
switch (imxtype) {
case MXC_CPU_MX6Q:
return 6Q;/* Quad-core version of the mx6 */
+ case MXC_CPU_MX6D:
+ return 6D;/* Dual-core version of the mx6 */
case MXC_CPU_MX6DL:
return 6DL; /* Dual Lite version of the mx6 */
case MXC_CPU_MX6SOLO:
diff --git a/arch/arm/include/asm/arch-imx/cpu.h
b/arch/arm/include/asm/arch-imx/cpu.h
index 8c725e2..a35940e 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -10,3 +10,4 @@
#define MXC_CPU_MX6DL 0x61
#define MXC_CPU_MX6SOLO 0x62
#define MXC_CPU_MX6Q 0x63
+#define MXC_CPU_MX6D 0x64
Acked-by: Stefano babic sba...@denx.de
Acked-by: Otavio Salvador ota...@ossystems.com.br
--
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://code.ossystems.com.br
Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750
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[U-Boot] [PATCH v3] arm: exynos: change to use clrbits macro instead of readl/writel function
Use setbits/clrbits macro instead of readl/writel function
Signed-off-by: Inha Song ideal.s...@samsung.com
---
Changes for v2:
- Coding Style cleanup
- add signed-off-by
Changes for v3:
- Modified to use mask value for clear bit
- Use clrsetbits instead of clrbits in exynos5_set_lcd_clk(void) function
arch/arm/cpu/armv7/exynos/clock.c | 82 +
1 file changed, 20 insertions(+), 62 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 5bde9d1..5b7e12f 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -870,7 +870,6 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int
div)
struct exynos4_clock *clk =
(struct exynos4_clock *)samsung_get_base_clock();
unsigned int addr;
- unsigned int val;
/*
* CLK_DIV_FSYS1
@@ -890,10 +889,8 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned
int div)
dev_index -= 2;
}
- val = readl(addr);
- val = ~(0xff ((dev_index 4) + 8));
- val |= (div 0xff) ((dev_index 4) + 8);
- writel(val, addr);
+ clrsetbits_le32(addr, 0xff ((dev_index 4) + 8),
+ (div 0xff) ((dev_index 4) + 8));
}
/* exynos4x12: set the mmc clock */
@@ -902,7 +899,6 @@ static void exynos4x12_set_mmc_clk(int dev_index, unsigned
int div)
struct exynos4x12_clock *clk =
(struct exynos4x12_clock *)samsung_get_base_clock();
unsigned int addr;
- unsigned int val;
/*
* CLK_DIV_FSYS1
@@ -917,10 +913,8 @@ static void exynos4x12_set_mmc_clk(int dev_index, unsigned
int div)
dev_index -= 2;
}
- val = readl(addr);
- val = ~(0xff ((dev_index 4) + 8));
- val |= (div 0xff) ((dev_index 4) + 8);
- writel(val, addr);
+ clrsetbits_le32(addr, 0xff ((dev_index 4) + 8),
+ (div 0xff) ((dev_index 4) + 8));
}
/* exynos5: set the mmc clock */
@@ -929,7 +923,6 @@ static void exynos5_set_mmc_clk(int dev_index, unsigned int
div)
struct exynos5_clock *clk =
(struct exynos5_clock *)samsung_get_base_clock();
unsigned int addr;
- unsigned int val;
/*
* CLK_DIV_FSYS1
@@ -944,10 +937,8 @@ static void exynos5_set_mmc_clk(int dev_index, unsigned
int div)
dev_index -= 2;
}
- val = readl(addr);
- val = ~(0xff ((dev_index 4) + 8));
- val |= (div 0xff) ((dev_index 4) + 8);
- writel(val, addr);
+ clrsetbits_le32(addr, 0xff ((dev_index 4) + 8),
+ (div 0xff) ((dev_index 4) + 8));
}
/* exynos5: set the mmc clock */
@@ -956,7 +947,7 @@ static void exynos5420_set_mmc_clk(int dev_index, unsigned
int div)
struct exynos5420_clock *clk =
(struct exynos5420_clock *)samsung_get_base_clock();
unsigned int addr;
- unsigned int val, shift;
+ unsigned int shift;
/*
* CLK_DIV_FSYS1
@@ -967,10 +958,7 @@ static void exynos5420_set_mmc_clk(int dev_index, unsigned
int div)
addr = (unsigned int)clk-div_fsys1;
shift = dev_index * 10;
- val = readl(addr);
- val = ~(0x3ff shift);
- val |= (div 0x3ff) shift;
- writel(val, addr);
+ clrsetbits_le32(addr, 0x3ff shift, (div 0x3ff) shift);
}
/* get_lcd_clk: return lcd clock frequency */
@@ -1061,7 +1049,6 @@ void exynos4_set_lcd_clk(void)
{
struct exynos4_clock *clk =
(struct exynos4_clock *)samsung_get_base_clock();
- unsigned int cfg = 0;
/*
* CLK_GATE_BLOCK
@@ -1073,9 +1060,7 @@ void exynos4_set_lcd_clk(void)
* CLK_LCD1 [5]
* CLK_GPS [7]
*/
- cfg = readl(clk-gate_block);
- cfg |= 1 4;
- writel(cfg, clk-gate_block);
+ setbits_le32(clk-gate_block, 1 4);
/*
* CLK_SRC_LCD0
@@ -1085,10 +1070,7 @@ void exynos4_set_lcd_clk(void)
* MIPI0_SEL[12:15]
* set lcd0 src clock 0x6: SCLK_MPLL
*/
- cfg = readl(clk-src_lcd0);
- cfg = ~(0xf);
- cfg |= 0x6;
- writel(cfg, clk-src_lcd0);
+ clrsetbits_le32(clk-src_lcd0, 0xf, 0x6);
/*
* CLK_GATE_IP_LCD0
@@ -1100,9 +1082,7 @@ void exynos4_set_lcd_clk(void)
* CLK_PPMULCD0 [5]
* Gating all clocks for FIMD0
*/
- cfg = readl(clk-gate_ip_lcd0);
- cfg |= 1 0;
- writel(cfg, clk-gate_ip_lcd0);
+ setbits_le32(clk-gate_ip_lcd0, 1 0);
/*
* CLK_DIV_LCD0
@@ -1114,16 +1094,13 @@ void exynos4_set_lcd_clk(void)
* MIPI0_PRE_RATIO [23:20]
* set fimd ratio
*/
- cfg = ~(0xf);
- cfg |= 0x1;
- writel(cfg, clk-div_lcd0);
+ clrsetbits_le32(clk-div_lcd0, 0xf, 0x1);
}
void
Re: [U-Boot] [PATCH V2 13/13] ARM: tegra: fix bootp issue for Tegra124 too
On Fri, 2014-01-24 at 08:43 +0800, Stephen Warren wrote: From: Jim Lin ji...@nvidia.com Fix the timeout issue after running bootp command in U-Boot console. TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10 after a controller reset and before RUN bit is se, (per technical reference manual. Stephen, Could you help to replace , with t and put right parenthesis? Like controller reset and before RUN bit is set (per technical reference manual). Thanks, --nvpublic ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] SECURE BOOT: add version info for ISBC
T4/B4 SoC's have a different version of ISBC. The secure boot functionality is different with the new version of ISBC compared to the earlier SoC's. So the version information is added in file config_mpc85xx.h Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com Signed-off-by: Aneesh Bansal aneesh.ban...@freescale.com --- README| 3 +++ arch/powerpc/include/asm/config_mpc85xx.h | 9 + 2 files changed, 12 insertions(+) diff --git a/README b/README index aea82be..6c3a8d1 100644 --- a/README +++ b/README @@ -423,6 +423,9 @@ The following options need to be configured: CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT This value denotes start offset of DSP CCSR space. + CONFIG_SYS_FSL_ISBC_VER + This value indicates the major ISBC version on the platform. + CONFIG_SYS_FSL_SINGLE_SOURCE_CLK Single Source Clock is clocking mode present in some of FSL SoC's. In this mode, a single differential clock is used to supply You already have all relevant information present in the current configuration. There is no need to add yet another CONFIG_SYS_ option; the information can easily be derived from the existing data. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Ernest asks Frank how long he has been working for the company. Ever since they threatened to fire me. ISBC (Internal Secure Boot Code) is an IP which has different versions on different SOC's. The major difference which this CONFIG represents is whether CAAM block is being used for cryptographic operations or not. I will be adding more details in the description IN README and resend the patch. The only other way that this can be derived is by doing SoC specific checking which would become a little messy. Regards, Aneesh Bansal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/7] fdt: add fdt sign command
Hello Simon,
Am 26.01.2014 22:04, schrieb Simon Glass:
Hi Heiko,
On 24 January 2014 23:44, Heiko Schocherh...@denx.de wrote:
check if a fdt is correct signed
pass an optional addr value. Contains the addr of the key blob
Signed-off-by: Heiko Schocherh...@denx.de
Cc: Simon Glasss...@chromium.org
---
common/cmd_fdt.c | 38 +-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/common/cmd_fdt.c b/common/cmd_fdt.c
index 3a9edd6..b8468ea 100644
--- a/common/cmd_fdt.c
+++ b/common/cmd_fdt.c
@@ -243,7 +243,7 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
/*
* Set the value of a property in the working_fdt.
*/
- } else if (argv[1][0] == 's') {
+ } else if (strncmp(argv[1], se, 2) == 0) {
char *pathp;/* path */
char *prop; /* property */
int nodeoffset;/* node offset from libfdt */
@@ -283,6 +283,37 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
return 1;
}
+#if defined(CONFIG_FIT_SIGNATURE)
+ } else if (strncmp(argv[1], si, 2) == 0) {
+ int cfg_noffset;
+ int ret;
+ unsigned long addr;
+ struct fdt_header *blob;
+
+ if (!working_fdt)
+ return CMD_RET_FAILURE;
+
+ if (argc 2) {
+ addr = simple_strtoul(argv[2], NULL, 16);
+ blob = map_sysmem(addr, 0);
+ } else {
+ blob = (struct fdt_header *)gd-fdt_blob;
+ }
+ if (!fdt_valid(blob))
+ return 1;
+
+ gd-fdt_blob = blob;
+ cfg_noffset = fit_conf_get_node(working_fdt, NULL);
+ if (!cfg_noffset)
+ return CMD_RET_FAILURE;
May need to print an error here, since otherwise it won't be clear
what went wrong.
Hmm... fit_conf_get_node() prints a dedicated error message if debug is
activated... I thought this is enough ... ?
+
+ ret = fit_config_verify(working_fdt, cfg_noffset);
+ if (ret == 1)
+ return CMD_RET_SUCCESS;
+ else
+ return CMD_RET_FAILURE;
+#endif
+
/
* Get the value of a property in the working_fdt.
/
@@ -992,6 +1023,11 @@ static char fdt_help_text[] =
fdt rsvmem deleteindex- Delete a mem reserves\n
fdt chosen [start end] - Add/update the /chosen branch in
the tree\n
start/end - initrd start/end addr\n
+#if defined(CONFIG_FIT_SIGNATURE)
+ fdt sign [addr] - check FIT signature\n
How about checksig instead of sign? 'sign' sounds like you are going to sign it.
Of course, that sounds better!
Change this for v2, thanks!
+ start - addr of key blob\n
+ default
gd-fdt_blob\n
+#endif
NOTE: Dereference aliases by omiting the leading '/',
e.g. fdt print ethernet0.;
#endif
--
1.8.3.1
Regards,
Simon
Thanks for the review.
bye,
Heiko
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Re: [U-Boot] POST in u-boot for P2020 process
Hi Denx, Thanks for replying, I have read the document, i have to enable the POST as well with the macro CONFIG_POST and CONFIG_CMD_DIAG, but i am getting lot of compilation errors. Am i missing something while configuring ?? And post.h is also getting generated, which describes the different types POST operation ( cache test, memory test... etc). All macros are there in post.h , is there anything which i need to include in configuration file ?? Thanks Pradeep -- View this message in context: http://u-boot.10912.n7.nabble.com/POST-in-u-boot-for-P2020-process-tp172115p172427.html Sent from the U-Boot mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/7] rsa: add sha256-rsa2048 algorithm
Hello Simon,
Am 26.01.2014 22:10, schrieb Simon Glass:
Hi Heiko,
On 24 January 2014 23:44, Heiko Schocherh...@denx.de wrote:
based on patch from andr...@oetken.name:
http://patchwork.ozlabs.org/patch/294318/
Should probably add the full commit message in here.
Ok, do this in v2.
- removed checkpatch warnings
- removed compiler warnings
- rebased against current head
Signed-off-by: Heiko Schocherh...@denx.de
Cc: Simon Glasss...@chromium.org
Cc: andr...@oetken.name
---
common/image-sig.c | 33 +
include/image.h| 21 +++
include/rsa-checksum.h | 25 +
include/rsa.h | 25 +
lib/rsa/Makefile | 2 +-
lib/rsa/rsa-checksum.c | 98 ++
lib/rsa/rsa-sign.c | 10 +++---
lib/rsa/rsa-verify.c | 83 +-
8 files changed, 233 insertions(+), 64 deletions(-)
create mode 100644 include/rsa-checksum.h
create mode 100644 lib/rsa/rsa-checksum.c
[...]
diff --git a/include/rsa.h b/include/rsa.h
index add4c78..adf809b 100644
--- a/include/rsa.h
+++ b/include/rsa.h
@@ -15,6 +15,20 @@
#includeerrno.h
#includeimage.h
+/**
+ * struct rsa_public_key - holder for a public key
+ *
+ * An RSA public key consists of a modulus (typically called N), the inverse
+ * and R^2, where R is 2^(# key bits).
+ */
+
+struct rsa_public_key {
+ uint len;/* Length of modulus[] in number of uint32_t */
+ uint32_t n0inv;/* -1 / modulus[0] mod 2^32 */
+ uint32_t *modulus;/* modulus as little endian array */
+ uint32_t *rr;/* R^2 as little endian array */
+};
+
#if IMAGE_ENABLE_SIGN
/**
* sign() - calculate and return signature for given input data
@@ -80,6 +94,10 @@ static inline int rsa_add_verify_data(struct image_sign_info
*info,
int rsa_verify(struct image_sign_info *info,
const struct image_region region[], int region_count,
uint8_t *sig, uint sig_len);
+
+int rsa_verify_256(struct image_sign_info *info,
+ const struct image_region region[], int region_count,
+ uint8_t *sig, uint sig_len);
Do we need to create this as a separate function? It seems a bit icky.
Can rsa_verify() not handle both?
Good catch! I never defined rsa_verify_256(), remove this in v2.
#else
static inline int rsa_verify(struct image_sign_info *info,
const struct image_region region[], int region_count,
@@ -87,6 +105,13 @@ static inline int rsa_verify(struct image_sign_info *info,
{
return -ENXIO;
}
+
+static inline int rsa_verify_256(struct image_sign_info *info,
+ const struct image_region region[], int region_count,
+ uint8_t *sig, uint sig_len)
+{
+ return -ENXIO;
+}
#endif
#endif
[...]
Also can you please update the tests to include a sha256 test?
You mean the test/vboot/vboot_test.sh ?
bye,
Heiko
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Re: [U-Boot] POST in u-boot for P2020 process
Hi Denx, Thanks for replying, I have read the document, i have to enable the POST as well with the macro CONFIG_POST and CONFIG_CMD_DIAG, but i am getting lot of compilation errors. Am i missing something while configuring ?? And post.h is also getting generated, which describes the different types POST operation ( cache test, memory test... etc). All macros are there in post.h , is there anything which i need to include in configuration file ?? Thanks Pradeep -- View this message in context: http://u-boot.10912.n7.nabble.com/POST-in-u-boot-for-P2020-process-tp172115p172426.html Sent from the U-Boot mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/7] fdt: add fdt sign command
Dear Heiko, In message 52e5fe93.2030...@denx.de you wrote: + cfg_noffset = fit_conf_get_node(working_fdt, NULL); + if (!cfg_noffset) + return CMD_RET_FAILURE; May need to print an error here, since otherwise it won't be clear what went wrong. Hmm... fit_conf_get_node() prints a dedicated error message if debug is ^^^ activated... I thought this is enough ... ? ^ But in production versions (with debug NOT enabled) the user would never know what went wrong? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de It's when they say 2 + 2 = 5 that I begin to argue.- Eric Pepke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] SECURE BOOT: add version info for ISBC
Dear aneesh.ban...@freescale.com, In message aba33ec5436c40939359f93b6d243...@dm2pr03mb415.namprd03.prod.outlook.com you wrote: CONFIG_SYS_FSL_SINGLE_SOURCE_CLK Single Source Clock is clocking mode present in some of FSL SoC's. In this mode, a single differential clock is used to supply You already have all relevant information present in the current configuration. There is no need to add yet another CONFIG_SYS_ option; the information can easily be derived from the existing data. ... ISBC (Internal Secure Boot Code) is an IP which has different versions on different SOC's. The major difference which this CONFIG represents is whether CAAM block is being used for cryptographic operations or not. I will be adding more details in the de scription IN README and resend the patch. The only other way that this can be derived is by doing SoC specific checking which would become a little messy. But this is what I had in mind. It appears to be a simple 1:1 mapping from SoC to ISBC version to me, or am I wrong here? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de When the ax entered the forest, the trees said, The handle is one of us! -- Turkish proverb ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] POST in u-boot for P2020 process
Dear Pradeep, In message 1390803626357-172426.p...@n7.nabble.com you wrote: Thanks for replying, I have read the document, i have to enable the POST as well with the macro CONFIG_POST and CONFIG_CMD_DIAG, but i am getting lot of compilation errors. Am i missing something while It's difficult to tell when you do not mention what exactly you selected / enabled, and when you do not tell us what these lot of compilation errors are exactly (include a log?). configuring ?? And post.h is also getting generated, which describes the different types POST operation ( cache test, memory test... etc). All macros are there in post.h , is there anything which i need to include in configuration file ?? There are completely generic tests, there are SoC specific tests, and there are board specific tests. Depending on what you enabled, some of these tests may ned to be implemented for your configuration. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de HEALTH WARNING: Care Should Be Taken When Lifting This Product, Since Its Mass, and Thus Its Weight, Is Dependent on Its Velocity Relative to the User. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] POST in u-boot for P2020 process
Hi Denx, Logs for your Reference --- post/libpost.a(post.o): In function `post_bootmode_get': /home/raghu/Emerson_BSP/p2020/u-boot/u-boot-2009.11/post/post.c:91: undefined reference to `post_word_load' post/libpost.a(post.o): In function `post_bootmode_init': /home/raghu/Emerson_BSP/p2020/u-boot/u-boot-2009.11/post/post.c:66: undefined reference to `post_hotkeys_pressed' /home/raghu/Emerson_BSP/p2020/u-boot/u-boot-2009.11/post/post.c:74: undefined reference to `post_word_load' /home/raghu/Emerson_BSP/p2020/u-boot/u-boot-2009.11/post/post.c:83: undefined reference to `post_word_store' post/libpost.a(post.o): In function `post_bootmode_test_on': /home/raghu/Emerson_BSP/p2020/u-boot/u-boot-2009.11/post/post.c:138: undefined reference to `post_word_load' /home/raghu/Emerson_BSP/p2020/u-boot/u-boot-2009.11/post/post.c:144: undefined reference to `post_word_store' post/libpost.a(post.o): In function `post_bootmode_test_off': /home/raghu/Emerson_BSP/p2020/u-boot/u-boot-2009.11/post/post.c:149: undefined reference to `post_word_load' /home/raghu/Emerson_BSP/p2020/u-boot/u-boot-2009.11/post/post.c:153: undefined reference to `post_word_store' drivers/mtd/spi/libspi_flash.a(stmicro.o): In function `stmicro_wait_ready': /home/raghu/Emerson_BSP/p2020/u-boot/u-boot-2009.11/drivers/mtd/spi/stmicro.c:140: undefined reference to `spi_xfer' /home/raghu/Emerson_BSP/p2020/u-boot/u-boot-2009.11/drivers/mtd/spi/stmicro.c:162: undefined reference to `spi_xfer' drivers/mtd/spi/libspi_flash.a(winbond.o): In function `winbond_wait_ready': /home/raghu/Emerson_BSP/p2020/u-boot/u-boot-2009.11/drivers/mtd/spi/winbond.c:99: undefined reference to `spi_xfer' /home/raghu/Emerson_BSP/p2020/u-boot/u-boot-2009.11/drivers/mtd/spi/winbond.c:111: undefined reference to `spi_xfer' /home/raghu/Emerson_BSP/p2020/u-boot/u-boot-2009.11/drivers/mtd/spi/winbond.c:126: undefined reference to `spi_xfer' Thanks Pradeep -- View this message in context: http://u-boot.10912.n7.nabble.com/POST-in-u-boot-for-P2020-process-tp172115p172435.html Sent from the U-Boot mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] SECURE BOOT: add version info for ISBC
CONFIG_SYS_FSL_SINGLE_SOURCE_CLK Single Source Clock is clocking mode present in some of FSL SoC's. In this mode, a single differential clock is used to supply You already have all relevant information present in the current configuration. There is no need to add yet another CONFIG_SYS_ option; the information can easily be derived from the existing data. ... ISBC (Internal Secure Boot Code) is an IP which has different versions on different SOC's. The major difference which this CONFIG represents is whether CAAM block is being used for cryptographic operations or not. I will be adding more details in the de scription IN README and resend the patch. The only other way that this can be derived is by doing SoC specific checking which would become a little messy. But this is what I had in mind. It appears to be a simple 1:1 mapping from SoC to ISBC version to me, or am I wrong here? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de When the ax entered the forest, the trees said, The handle is one of us! -- Turkish proverb Yes, it is a 1:1 mapping from SoC to ISBC version but we have multiple SoC's having the same ISBC version. So using the SoC names would result in having a long list of SoC's wherever we are doing some stuff specific to the ISBC version. Also in future, we might have new versions of ISBC with more features. SO having multiple SoC specific checks inside the code would lead to confusion. Regards, Aneesh Bansal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] powerpc/p1010rdb: SECURE BOOT- enable workaround for IFC errata A003399
The workaround for IFC errata A003399 was not enabled in case of secure boot. So, secure boot from NOR was not working. Signed-off-by: Aneesh Bansal aneesh.ban...@freescale.com --- include/configs/P1010RDB.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index c21cf07..b0e51fb 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -455,8 +455,7 @@ extern unsigned long get_sdram_size(void); #endif #ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A003399 -#if !defined(CONFIG_SPL) !defined(CONFIG_SYS_RAMBOOT)\ - !defined(CONFIG_SECURE_BOOT) +#if !defined(CONFIG_SPL) !defined(CONFIG_SYS_RAMBOOT) #define CONFIG_A003399_NOR_WORKAROUND #endif #endif Why do you need the workaround? Doesn't secure boot involve the bootrom loading U-Boot into SRAM, rather than execute-in-place from NOR? -Scott The Boot ROM code does not copy the U-boot from NOR into SRAM. In case of secure boot from NOR, it is executed as an execute-in-place memory and so this workaround is required. Regards, Aneesh Bansal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2][v2] powerpc/mpc85xx: SECURE BOOT- Add secure boot target for B4860QDS
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 4c7f0b1..db124df 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -15,5 +15,11 @@ #endif #define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff8 +#if CONFIG_SYS_FSL_ISBC_VER 1 +#define CONFIG_SECURE_HKAREA_CPC +#undef CONFIG_SYS_INIT_L3_ADDR +#define CONFIG_SYS_INIT_L3_ADDR 0xbff0 +#endif Where is CONFIG_SECURE_HKAREA_CPC documented? Shouldn't it be in CONFIG_SYS? -Scott We will resubmit the patch after adding the description. Regards, Aneesh Bansal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] powerpc/p1010rdb: SECURE BOOT- define CONFIG_SYS_RAMBOOT for NAND boot
In case of secure boot, boot from NAND is ramboot. It was removed by some other commit. So defining it again. In case of not-secure-boot, it's not ramboot. What user of CONFIG_SYS_RAMBOOT are you concerned about? Many of them look like this: #elif !defined(CONFIG_SYS_RAMBOOT) defined(CONFIG_SECURE_BOOT) ...which doesn't make sense if secure boot is always considered ramboot. -Scott CONFIG_SYS_RAMBOOT is for secure boot from NAND, SPI and SD. CONFIG_SYS_RAMBOOT is not used for secure boot from NOR. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] powerpc/mpc85xx: SECURE BOOT- Disable law 0 for non PBL platforms
ISBC creates a LAW 0 entry for non PBL platforms, which is not disabled before transferring the control to uboot. The LAW 0 entry has to be disabled. Signed-off-by: Aneesh Bansal aneesh.ban...@freescale.com --- arch/powerpc/cpu/mpc85xx/start.S | 58 1 file changed, 58 insertions(+) diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 5440bf5..2b2c4dd 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -116,6 +116,64 @@ _start_e500: mtspr SPRN_HDBCR0, r3 #endif +#if defined(CONFIG_SECURE_BOOT) defined(CONFIG_E500) \ + !defined(CONFIG_E500MC) CONFIG_E500 can be assumed in this file. + /* ISBC creates a LAW 0 entry for non PBL platforms, + * which is not disabled before transferring the control to uboot. + * Disable the LAW 0 entry here. + */ Could you explain what this LAW 0 entry is for, why we don't need it, and why we can't wait until later to clear it? -Scott Boot ROM creates a LAW 0 entry for IFC and at entry at U-boot during secure boot, we want to have the same environment as in case of Non-secure Boot. So, this LAW entry is being removed at start. Regards, Aneesh Bansal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/7] rsa: add sha256,rsa4096 algorithm
Hello Simon, Am 26.01.2014 22:19, schrieb Simon Glass: Hi Heiko, On 24 January 2014 23:44, Heiko Schocherh...@denx.de wrote: Signed-off-by: Heiko Schocherh...@denx.de Cc: Simon Glasss...@chromium.org Missing commit message. Is there no way to integrate this with common/hash.c? Perhaps the start/finish part of the hashing algorithm should be added to hash.h struct hash_algo? I have a patch from Hung-ying Tyan that mostly does this. It won't apply directly, but here it is below in case it helps... I tried this patch, and it works fine. I prefer to add this patch to my patchserie, so this change is cleanly seperated. Is this ok? bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/7] fdt: add fdt sign command
Hello Wolfgang, Am 27.01.2014 07:50, schrieb Wolfgang Denk: Dear Heiko, In message52e5fe93.2030...@denx.de you wrote: + cfg_noffset = fit_conf_get_node(working_fdt, NULL); + if (!cfg_noffset) + return CMD_RET_FAILURE; May need to print an error here, since otherwise it won't be clear what went wrong. Hmm... fit_conf_get_node() prints a dedicated error message if debug is ^^^ activated... I thought this is enough ... ? ^ But in production versions (with debug NOT enabled) the user would never know what went wrong? Good argument, so, add an error message in next patch version. bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
