Re: [U-Boot] Question about Zynq SPL
Hi Masahiro, On 02/26/2014 08:49 AM, Masahiro Yamada wrote: Hello Michal, Please let me confirm if I am correctly understanding Zynq SPL added by commit d7e269c. Before that commit, Zynq booted like follows [1] Boot ROM [2] First Stage Boot Loader (created by Xilinx SDK) [3] U-Boot Now, SPL replaces FSBL. So, now Zynq boots like follows [1] Boot ROM [2] U-Boot SPL [3] U-Boot Is this correct? yes or of course what SPL supports just directly to the OS [1] Boot ROM [2] U-Boot SPL [3] OS any question regarding this? Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP - KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] fix: trats: clock setup: enable all clocks in clk_gate_block.
Hello Tom, On 02/25/2014 06:58 PM, Tom Rini wrote: On Tue, Feb 25, 2014 at 06:37:43PM +0100, Przemyslaw Marczak wrote: This change fixes kernel boot issue on trats. Some drivers in kernel 3.10 expects that proper clocks are enabled, e.g. mfc driver clock. Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com cc: Lukasz Majewski l.majew...@samsung.com cc: Minkyu Kang mk7.k...@samsung.com cc: Tom Rini tr...@ti.com My first inclination is NAK, the kernel is responsible for enabling clocks that it needs and we spent a while in TI-land dealing with the fallout in various ways of enabling everything in U-Boot (you run into various types of PM-related fun). If you have a vendor kernel you need to support this on, you need a vendor U-Boot with this work-around until the kernel is fixed. Thank you for reply. You're right, it wasn't good idea. So I will wait for such fix in mainline kernel. Regards -- Przemyslaw Marczak Samsung RD Institute Poland Samsung Electronics p.marc...@samsung.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 2/3] mpc85xx: Add deep sleep framework support
On 2014/2/25 星期二 3:11, Scott Wood wrote:
Why what? Why we need it?
It is a help function and used by ASM code in which
we can't determine whether it is a warm reset boot.
Why don't you just open code it?
I can't check the warmboot status in ASM code.
In order to get the warmboot status in ASM code, I wrote this function.
Why can't you check it in asm code? See lib/asm-offsets.c.
Found it. Still learn how to use it.
Thanks,
Yuantian
+ if (gd-flags GD_FLG_WARM_BOOT) {
+ src = (u64 *)in_be32(scfg-sparecr[2]);
+ dst = (u64 *)(0);
+ for (i = 0; i 128/sizeof(u64); i++) {
+ *dst = *src;
+ dst++;
+ src++;
+ }
+ }
(u64 *)(0) is a NULL pointer. Dereferencing NULL pointers is undefined
and GCC has been getting increasingly free with making surprising
optimizations based on that (such as assuming any code path that it knows
can reach a NULL dereference is dead code and can be removed).
Then how we operate 0 address if not dereferencing NULL pointer?
With an I/O accessor (or other inline asm), a TLB mapping, or using a
different memory location.
we found the zero address has benefit.
I don't know how to achieve this in inline asm or TLB mapping, could you
be more specific or write a example for me?
Inline asm would be something like:
asm(stw %1, 0(%0); stw %2, 4(%0) : =r (dst) :
r ((u32)(src 32)), r ((u32)src));
-Scott
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Question about Zynq SPL
Hello Michal, yes or of course what SPL supports just directly to the OS [1] Boot ROM [2] U-Boot SPL [3] OS any question regarding this? Thanks. FSBL can download FPGA bit stream. Is it supported by U-Boot SPL too? If I don't have to launch Xilinx SDK to create FSBL, that'd be better. Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Question about Zynq SPL
Hi, On 02/26/2014 09:14 AM, Masahiro Yamada wrote: Hello Michal, yes or of course what SPL supports just directly to the OS [1] Boot ROM [2] U-Boot SPL [3] OS any question regarding this? Thanks. FSBL can download FPGA bit stream. Is it supported by U-Boot SPL too? Not by the version which is in currently in the mailine. But if you look at git.xilinx.com u-boot repo master-next branch you will see that loading bitstream from U-BOOT spl is there for MMC boot which I am using. If I don't have to launch Xilinx SDK to create FSBL, that'd be better. You just need to have ps7_init.c/h files or generate this setting out of SDK for your hardware project. Currently in our and in mainline repo are just weak functions because make no sense to push to the mainline setting which is just used by one hardware design. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP - KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH] nand_spl: display warning message to inform the end of nand_spl
Now we have two different frameworks for doing the same thing. I'd like to propose to drop nand_spl framework. How about deleting it before v2014.07 release? In the interim, this commit will display a warning message when compiling nand_spl board. Now we have 19 nand_spl boards: MPC8315ERDB_NAND SIMPC8313_LP SIMPC8313_SP MPC8536DS_NAND MPC8569MDS_NAND MPC8572DS_NAND P1023RDS_NAND P1011RDB_NAND P1020RDB_NAND P2010RDB_NAND P2020RDB_NAND acadia_nand bamboo_nand canyonlands_nand glacier_nand haleakala_nand kilauea_nand rainier_nand sequoia_nand They must be ported to SPL before the deadline, otherwise they will be removed. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Cc: Dave Liu dave...@freescale.com Cc: Ron Madrid i...@sheldoninst.com Cc: Roy Zang tie-fei.z...@freescale.com Cc: Stefan Roese s...@denx.de --- Makefile | 7 +++ 1 file changed, 7 insertions(+) diff --git a/Makefile b/Makefile index 54cf080..e08c0af 100644 --- a/Makefile +++ b/Makefile @@ -1063,6 +1063,13 @@ u-boot.lds: $(LDSCRIPT) prepare FORCE PHONY += nand_spl nand_spl: prepare $(Q)$(MAKE) $(build)=nand_spl/board/$(BOARDDIR) all + @echo 2 + @echo 2 WARNING = + @echo 2 nand_spl will not be included in v2014.07 release. + @echo 2 Please switch over to SPL. + @echo 2 Otherwise, this board will be removed. + @echo 2 == + @echo 2 nand_spl/u-boot-spl-16k.bin: nand_spl @: -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Question about Zynq SPL
Hello Michal, On Wed, 26 Feb 2014 09:33:19 +0100 Michal Simek mon...@monstr.eu wrote: Hi, On 02/26/2014 09:14 AM, Masahiro Yamada wrote: Hello Michal, yes or of course what SPL supports just directly to the OS [1] Boot ROM [2] U-Boot SPL [3] OS any question regarding this? Thanks. FSBL can download FPGA bit stream. Is it supported by U-Boot SPL too? Not by the version which is in currently in the mailine. But if you look at git.xilinx.com u-boot repo master-next branch you will see that loading bitstream from U-BOOT spl is there for MMC boot which I am using. If I don't have to launch Xilinx SDK to create FSBL, that'd be better. You just need to have ps7_init.c/h files or generate this setting out of SDK for your hardware project. Currently in our and in mainline repo are just weak functions because make no sense to push to the mainline setting which is just used by one hardware design. That's good to know. I will give it a try. Thanks! Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] powerpc/usb: Workaround for erratum-A006261
USB spec says that the minimum disconnect threshold should be
over 525 mV. However, internal USB PHY threshold value is below
this specified value. Due to this some devices disconnect at
run-time. Hence, phy settings are tweaked to increased disconnect
threshold to be above 525mV by using this workaround.
Signed-off-by: Suresh Gupta suresh.gu...@freescale.com
---
Changes for v2:
- Incorporated missing SOC's affected by errata
arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4 ++
arch/powerpc/cpu/mpc85xx/cpu_init.c | 62 +++
arch/powerpc/include/asm/config_mpc85xx.h | 7
arch/powerpc/include/asm/fsl_errata.h | 34 +
include/fsl_usb.h | 23 +++-
5 files changed, 128 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 7693899..2a15802 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -265,6 +265,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
(SVR_REV(svr) = CONFIG_SYS_FSL_A004447_SVR_REV))
puts(Work-around for Erratum I2C-A004447 enabled\n);
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A006261
+ if (has_erratum_a006261())
+ puts(Work-around for Erratum A006261 enabled\n);
+#endif
return 0;
}
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index b31efb7..81aeadd 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -36,6 +36,54 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_SYS_FSL_ERRATUM_A006261
+void fsl_erratum_a006261_workaround(struct ccsr_usb_phy __iomem *usb_phy)
+{
+#ifdef CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
+ u32 xcvrprg = in_be32(usb_phy-port1.xcvrprg);
+
+ /* Increase Disconnect Threshold by 50mV */
+ xcvrprg = ~CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK |
+ INC_DCNT_THRESHOLD_50MV;
+ /* Enable programming of USB High speed Disconnect threshold */
+ xcvrprg |= CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN;
+ out_be32(usb_phy-port1.xcvrprg, xcvrprg);
+
+ xcvrprg = in_be32(usb_phy-port2.xcvrprg);
+ /* Increase Disconnect Threshold by 50mV */
+ xcvrprg = ~CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK |
+ INC_DCNT_THRESHOLD_50MV;
+ /* Enable programming of USB High speed Disconnect threshold */
+ xcvrprg |= CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN;
+ out_be32(usb_phy-port2.xcvrprg, xcvrprg);
+#else
+
+ u32 temp = 0;
+ u32 status = in_be32(usb_phy-status1);
+
+ u32 squelch_prog_rd_0_2 =
+ (status CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_0)
+CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK;
+
+ u32 squelch_prog_rd_3_5 =
+ (status CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_3)
+CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK;
+
+ setbits_be32(usb_phy-config1,
+CONFIG_SYS_FSL_USB_HS_DISCNCT_INC);
+ setbits_be32(usb_phy-config2,
+CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL);
+
+ temp = squelch_prog_rd_0_2 CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0;
+ out_be32(usb_phy-config2, in_be32(usb_phy-config2) | temp);
+
+ temp = squelch_prog_rd_3_5 CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3;
+ out_be32(usb_phy-config2, in_be32(usb_phy-config2) | temp);
+#endif
+}
+#endif
+
+
#ifdef CONFIG_QE
extern qe_iop_conf_t qe_iop_conf_tab[];
extern void qe_config_iopin(u8 port, u8 pin, int dir,
@@ -625,6 +673,10 @@ skip_l2:
{
struct ccsr_usb_phy __iomem *usb_phy1 =
(void *)CONFIG_SYS_MPC85xx_USB1_PHY_ADDR;
+#ifdef CONFIG_SYS_FSL_ERRATUM_A006261
+ if (has_erratum_a006261())
+ fsl_erratum_a006261_workaround(usb_phy1);
+#endif
out_be32(usb_phy1-usb_enable_override,
CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE);
}
@@ -633,6 +685,10 @@ skip_l2:
{
struct ccsr_usb_phy __iomem *usb_phy2 =
(void *)CONFIG_SYS_MPC85xx_USB2_PHY_ADDR;
+#ifdef CONFIG_SYS_FSL_ERRATUM_A006261
+ if (has_erratum_a006261())
+ fsl_erratum_a006261_workaround(usb_phy2);
+#endif
out_be32(usb_phy2-usb_enable_override,
CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE);
}
@@ -672,8 +728,14 @@ skip_l2:
CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN);
setbits_be32(usb_phy-port2.pwrfltcfg,
CONFIG_SYS_FSL_USB_PWRFLT_CR_EN);
+
+#ifdef CONFIG_SYS_FSL_ERRATUM_A006261
+ if (has_erratum_a006261())
+
[U-Boot] [PATCH] board/b4860qds: Add support to make Aurora work on B4860QDS
1) Add new SerDes1 protocols having Aurora in them
2) Add VSC cross point connections for Aurora to work with
CPRI and SGMIIs
3) Configure VSC crossbar switch to connect SerDes1
lanes to aurora on board, by checking SerDes1 protocols
4) SerDes1 Refclks have been set properly to make
Aurora, CPRI and SGMIIs to work together properly
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/cpu/mpc85xx/b4860_serdes.c | 32 +
board/freescale/b4860qds/b4860qds.c | 75 -
board/freescale/b4860qds/b4860qds_crossbar_con.h |8 ++
3 files changed, 111 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/b4860_serdes.c
b/arch/powerpc/cpu/mpc85xx/b4860_serdes.c
index 6ff6a70..c96ad0b 100644
--- a/arch/powerpc/cpu/mpc85xx/b4860_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/b4860_serdes.c
@@ -18,6 +18,24 @@ struct serdes_config {
#ifdef CONFIG_PPC_B4860
static struct serdes_config serdes1_cfg_tbl[] = {
/* SerDes 1 */
+ {0x02, {AURORA, AURORA, CPRI6, CPRI5,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
+ {0x04, {AURORA, AURORA, CPRI6, CPRI5,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
+ {0x05, {AURORA, AURORA, CPRI6, CPRI5,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
+ {0x06, {AURORA, AURORA, CPRI6, CPRI5,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
+ {0x08, {AURORA, AURORA, CPRI6, CPRI5,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
+ {0x09, {AURORA, AURORA, CPRI6, CPRI5,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
+ {0x0A, {AURORA, AURORA, CPRI6, CPRI5,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
+ {0x0B, {AURORA, AURORA, CPRI6, CPRI5,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
+ {0x0C, {AURORA, AURORA, CPRI6, CPRI5,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
{0x0D, {CPRI8, CPRI7, CPRI6, CPRI5,
CPRI4, CPRI3, CPRI2, CPRI1}},
{0x0E, {CPRI8, CPRI7, CPRI6, CPRI5,
@@ -44,8 +62,22 @@ static struct serdes_config serdes1_cfg_tbl[] = {
{0x34, {AURORA, AURORA,
SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
CPRI4, CPRI3, CPRI2, CPRI1}},
+ {0x39, {AURORA, AURORA, CPRI6, CPRI5,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
+ {0x3A, {AURORA, AURORA, CPRI6, CPRI5,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
+ {0x3C, {AURORA, AURORA, CPRI6, CPRI5,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
+ {0x3D, {AURORA, AURORA, CPRI6, CPRI5,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
{0x3E, {CPRI8, CPRI7, CPRI6, CPRI5,
CPRI4, CPRI3, CPRI2, CPRI1}},
+ {0x5C, {AURORA, AURORA,
+ SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
+ {0x5D, {AURORA, AURORA,
+ SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
+ CPRI4, CPRI3, CPRI2, CPRI1} },
{}
};
static struct serdes_config serdes2_cfg_tbl[] = {
diff --git a/board/freescale/b4860qds/b4860qds.c
b/board/freescale/b4860qds/b4860qds.c
index f6b012d..f6faa24 100644
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -151,6 +151,53 @@ int configure_vsc3316_3308(void)
}
break;
+ case 0x02:
+ case 0x04:
+ case 0x05:
+ case 0x06:
+ case 0x08:
+ case 0x09:
+ case 0x0A:
+ case 0x0B:
+ case 0x0C:
+ case 0x30:
+ case 0x32:
+ case 0x33:
+ case 0x34:
+ case 0x39:
+ case 0x3A:
+ case 0x3C:
+ case 0x3D:
+ case 0x5C:
+ case 0x5D:
+ /*
+* Configuration:
+* SERDES: 1
+* Lanes: A,B: AURORA
+* Lanes: C,d: SGMII
+* Lanes: E,F,G,H: CPRI
+*/
+ debug(Configuring crossbar for Aurora, SGMII 3 and 4,
+and CPRI. srds_prctl:%x\n, serdes1_prtcl);
+ num_vsc16_con = NUM_CON_VSC3316;
+ /* Configure VSC3316 crossbar switch */
+ ret = select_i2c_ch_pca(I2C_CH_VSC3316);
+ if (!ret) {
+ ret = vsc3316_config(VSC3316_TX_ADDRESS,
+ vsc16_tx_sfp_sgmii_aurora,
+ num_vsc16_con);
+ if (ret)
+ return ret;
+ ret = vsc3316_config(VSC3316_RX_ADDRESS,
+ vsc16_rx_sfp_sgmii_aurora,
+ num_vsc16_con);
+ if (ret)
+ return ret;
+ } else {
+ return ret;
+ }
+ break;
+
#ifdef CONFIG_PPC_B4420
case 0x18:
/*
@@ -245,7 +292,7 @@ int
[U-Boot] [PATCH 1/2] B4860/B4420: Add PLL_NUM define for B4420/B4860 to use SerDes2 Refclks re-configuration
- B4860 has two PLL per SerDes whereas B4420 has one PLL
per SerDes, add their defines in
arch/powerpc/include/asm/config_mpc85xx.h
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/include/asm/config_mpc85xx.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch/powerpc/include/asm/config_mpc85xx.h
index 56587ae..0ec1417 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -667,6 +667,7 @@
#ifdef CONFIG_PPC_B4860
#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
#define CONFIG_MAX_CPUS4
+#define CONFIG_SYS_FSL_SRDS_NUM_PLLS 2
#define CONFIG_SYS_FSL_NUM_CC_PLLS 4
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 4, 4, 4 }
#define CONFIG_SYS_NUM_FM1_DTSEC 6
@@ -679,6 +680,7 @@
#define CONFIG_SYS_FSL_SRIO_LIODN
#else
#define CONFIG_MAX_CPUS2
+#define CONFIG_SYS_FSL_SRDS_NUM_PLLS 1
#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 2
#define CONFIG_SYS_FSL_NUM_CC_PLLS 4
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 4 }
--
1.7.6.GIT
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] B4860qds: Set SerDes2 refclk2 at to 156.25MHz for XFI to work
- Change setting of SerDes2 refclk2 to have the default value
as it is coming on board that is 156.25MHz, for XFI to work
- Also change PLL_NUM variable to the one defined in
config_mpc85xx.h for B4860 and B4420
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
board/freescale/b4860qds/b4860qds.c |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/board/freescale/b4860qds/b4860qds.c
b/board/freescale/b4860qds/b4860qds.c
index 9d51864..15b3f62 100644
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -29,7 +29,6 @@
#define CLK_MUX_SEL_MASK 0x4
#define ETH_PHY_CLK_OUT0x4
-#define PLL_NUM2
DECLARE_GLOBAL_DATA_PTR;
@@ -384,7 +383,7 @@ int config_serdes1_refclks(void)
/* Steps For SerDes PLLs reset and reconfiguration after
* changing SerDes's refclks
*/
- for (i = 0; i PLL_NUM; i++) {
+ for (i = 0; i CONFIG_SYS_FSL_SRDS_NUM_PLLS; i++) {
debug(For PLL%d reset and reconfiguration after
changing refclks\n, i+1);
clrbits_be32(srds_regs-bank[i].rstctl,
@@ -451,7 +450,7 @@ int config_serdes2_refclks(void)
if (!ret) {
ret = set_serdes_refclk(IDT_SERDES2_ADDRESS, 2,
SERDES_REFCLK_100,
- SERDES_REFCLK_100, 0);
+ SERDES_REFCLK_156_25, 0);
if (ret) {
printf(IDT8T49N222A configuration failed.\n);
goto out;
@@ -465,7 +464,7 @@ int config_serdes2_refclks(void)
/* Steps For SerDes PLLs reset and reconfiguration after
* changing SerDes's refclks
*/
- for (i = 0; i PLL_NUM; i++) {
+ for (i = 0; i CONFIG_SYS_FSL_SRDS_NUM_PLLS; i++) {
clrbits_be32(srds2_regs-bank[i].rstctl,
SRDS_RSTCTL_SDRST_B);
udelay(10);
--
1.7.6.GIT
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/b4860: Add workaround for errata A006384 and A006475
SerDes PLLs may not lock reliably at 5 G VCO configuration(A006384)
and at cold temperatures(A006475), workaround recalibrate the
PLLs with some SerDes configuration
Both these errata are only applicable for b4 rev1.
So, make workaround for these errata conditional,
depending upon soc version.
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c |8 ++
arch/powerpc/include/asm/config_mpc85xx.h |2 +
arch/powerpc/include/asm/immap_85xx.h | 19 +++-
board/freescale/b4860qds/b4860qds.c | 193 +
4 files changed, 220 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 7693899..d0a1c51 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -229,6 +229,14 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
if (IS_SVR_REV(svr, 1, 0))
puts(Work-around for Erratum A005871 enabled\n);
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A006475
+ if (SVR_MAJ(get_svr()) == 1)
+ puts(Work-around for Erratum A006475 enabled\n);
+#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A006384
+ if (SVR_MAJ(get_svr()) == 1)
+ puts(Work-around for Erratum A006384 enabled\n);
+#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_A004849
/* This work-around is implemented in PBI, so just check for it */
check_erratum_a4849(svr);
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch/powerpc/include/asm/config_mpc85xx.h
index 0ec1417..2f47b3f 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -662,6 +662,8 @@
#define CONFIG_SYS_FSL_ERRATUM_A005871
#define CONFIG_SYS_FSL_ERRATUM_A006379
#define CONFIG_SYS_FSL_ERRATUM_A006593
+#define CONFIG_SYS_FSL_ERRATUM_A006475
+#define CONFIG_SYS_FSL_ERRATUM_A006384
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe00
#ifdef CONFIG_PPC_B4860
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index e0efc7e..edd7888 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2495,6 +2495,7 @@ typedef struct serdes_corenet {
#define SRDS_RSTCTL_SDEN 0x0020
#define SRDS_RSTCTL_SDRST_B0x0040
#define SRDS_RSTCTL_PLLRST_B 0x0080
+#define SRDS_RSTCTL_RSTERR_SHIFT 29
u32 pllcr0; /* PLL Control Register 0 */
#define SRDS_PLLCR0_POFF 0x8000
#define SRDS_PLLCR0_RFCK_SEL_MASK 0x7000
@@ -2504,6 +2505,7 @@ typedef struct serdes_corenet {
#define SRDS_PLLCR0_RFCK_SEL_150 0x3000
#define SRDS_PLLCR0_RFCK_SEL_161_130x4000
#define SRDS_PLLCR0_RFCK_SEL_122_880x5000
+#define SRDS_PLLCR0_DCBIAS_OUT_EN 0x0200
#define SRDS_PLLCR0_FRATE_SEL_MASK 0x000f
#define SRDS_PLLCR0_FRATE_SEL_50x
#define SRDS_PLLCR0_FRATE_SEL_3_75 0x0005
@@ -2511,9 +2513,22 @@ typedef struct serdes_corenet {
#define SRDS_PLLCR0_FRATE_SEL_40x0007
#define SRDS_PLLCR0_FRATE_SEL_3_12 0x0009
#define SRDS_PLLCR0_FRATE_SEL_30x000a
+#define SRDS_PLLCR0_DCBIAS_OVRD0x00F0
+#define SRDS_PLLCR0_DCBIAS_OVRD_SHIFT 4
u32 pllcr1; /* PLL Control Register 1 */
-#define SRDS_PLLCR1_PLL_BWSEL 0x0800
- u32 res_0c; /* 0x00c */
+#define SRDS_PLLCR1_BCAP_EN0x2000
+#define SRDS_PLLCR1_BCAP_OVD 0x1000
+#define SRDS_PLLCR1_PLL_FCAP 0x001F8000
+#define SRDS_PLLCR1_PLL_FCAP_SHIFT 15
+#define SRDS_PLLCR1_PLL_BWSEL 0x0800
+#define SRDS_PLLCR1_BYP_CAL0x0200
+ u32 pllsr2; /* At 0x00c, PLL Status Register 2 */
+#define SRDS_PLLSR2_BCAP_EN0x0080
+#define SRDS_PLLSR2_BCAP_EN_SHIFT 23
+#define SRDS_PLLSR2_FCAP 0x003F
+#define SRDS_PLLSR2_FCAP_SHIFT 16
+#define SRDS_PLLSR2_DCBIAS 0x000F
+#define SRDS_PLLSR2_DCBIAS_SHIFT 16
u32 pllcr3;
u32 pllcr4;
u8 res_18[0x20-0x18];
diff --git a/board/freescale/b4860qds/b4860qds.c
b/board/freescale/b4860qds/b4860qds.c
index 15b3f62..264d8c7 100644
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -286,6 +286,182 @@ int configure_vsc3316_3308(void)
return 0;
}
+static int calibrate_pll(serdes_corenet_t *srds_regs, int pll_num)
+{
+ u32 rst_err;
+
+ /* Steps For SerDes PLLs reset and reconfiguration
+* or PLL power-up procedure
+*/
+ debug(CALIBRATE PLL:%d\n, pll_num);
+ clrbits_be32(srds_regs-bank[pll_num].rstctl,
+ SRDS_RSTCTL_SDRST_B);
+ udelay(10);
+ clrbits_be32(srds_regs-bank[pll_num].rstctl,
+
[U-Boot] [PATCH] board/b4860qds: Add support to make PCIe SATA work on B4860QDS
1) SerDes2 Refclks have been set properly to make
PCIe SATA to work as it work on SerDes refclk of 100MHz
2) Mask the SerDes's device reset request before changing
the Refclks for SerDes1 and SerDes2 for PLL locks to
happen properly, device reset request bit unmasked
after SerDes refclks configuration
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/include/asm/immap_85xx.h |3 +
board/freescale/b4860qds/b4860qds.c | 119 ++---
2 files changed, 113 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index 9d08321..e0efc7e 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1722,6 +1722,9 @@ typedef struct ccsr_gur {
u32 rstrqpblsr; /* Reset request preboot loader status */
u8 res11[8];
u32 rstrqmr1; /* Reset request mask */
+#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
+#define FSL_CORENET_RSTRQMR1_SRDS_RST_MSK 0x0800
+#endif
u8 res12[4];
u32 rstrqsr1; /* Reset request status */
u8 res13[4];
diff --git a/board/freescale/b4860qds/b4860qds.c
b/board/freescale/b4860qds/b4860qds.c
index f6faa24..9d51864 100644
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -11,6 +11,7 @@
#include linux/compiler.h
#include asm/mmu.h
#include asm/processor.h
+#include asm/errno.h
#include asm/cache.h
#include asm/immap_85xx.h
#include asm/fsl_law.h
@@ -293,7 +294,8 @@ int config_serdes1_refclks(void)
(void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
u32 serdes1_prtcl, lane;
unsigned int flag_sgmii_aurora_prtcl = 0;
- int ret, i;
+ int i;
+ int ret = 0;
serdes1_prtcl = in_be32(gur-rcwsr[4])
FSL_CORENET2_RCWSR4_SRDS1_PRTCL;
@@ -304,10 +306,12 @@ int config_serdes1_refclks(void)
serdes1_prtcl = FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT;
debug(Using SERDES1 Protocol: 0x%x:\n, serdes1_prtcl);
- /* Clear SRDS_RSTCTL_RST bit for both PLLs before changing refclks
+ /* To prevent generation of reset request from SerDes
+* while changing the refclks, By setting SRDS_RST_MSK bit,
+* SerDes reset event cannot cause a reset request
*/
- for (i = 0; i PLL_NUM; i++)
- clrbits_be32(srds_regs-bank[i].rstctl, SRDS_RSTCTL_RST);
+ setbits_be32(gur-rstrqmr1, FSL_CORENET_RSTRQMR1_SRDS_RST_MSK);
+
/* Reconfigure IDT idt8t49n222a device for CPRI to work
* For this SerDes1's Refclk1 and refclk2 need to be set
* to 122.88MHz
@@ -345,11 +349,11 @@ int config_serdes1_refclks(void)
SERDES_REFCLK_122_88, 0);
if (ret) {
printf(IDT8T49N222A configuration failed.\n);
- return ret;
+ goto out;
} else
- printf(IDT8T49N222A configured.\n);
+ debug(IDT8T49N222A configured.\n);
} else {
- return ret;
+ goto out;
}
select_i2c_ch_pca(I2C_CH_DEFAULT);
@@ -400,16 +404,99 @@ int config_serdes1_refclks(void)
printf(WARNING:IDT8T49N222A configuration not
supported for:%x SerDes1 Protocol.\n,
serdes1_prtcl);
- return -1;
}
- return 0;
+out:
+ /* Clearing SRDS_RST_MSK bit as now
+* SerDes reset event can cause a reset request
+*/
+ clrbits_be32(gur-rstrqmr1, FSL_CORENET_RSTRQMR1_SRDS_RST_MSK);
+ return ret;
+}
+
+int config_serdes2_refclks(void)
+{
+ ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ serdes_corenet_t *srds2_regs =
+ (void *)CONFIG_SYS_FSL_CORENET_SERDES2_ADDR;
+ u32 serdes2_prtcl;
+ int ret = 0;
+ int i;
+
+ serdes2_prtcl = in_be32(gur-rcwsr[4])
+ FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
+ if (!serdes2_prtcl) {
+ debug(SERDES2 is not enabled\n);
+ return -ENODEV;
+ }
+ serdes2_prtcl = FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT;
+ debug(Using SERDES2 Protocol: 0x%x:\n, serdes2_prtcl);
+
+ /* To prevent generation of reset request from SerDes
+* while changing the refclks, By setting SRDS_RST_MSK bit,
+* SerDes reset event cannot cause a reset request
+*/
+ setbits_be32(gur-rstrqmr1, FSL_CORENET_RSTRQMR1_SRDS_RST_MSK);
+
+ /* Reconfigure IDT idt8t49n222a device for PCIe SATA to work
+* For this SerDes2's Refclk1 need to be set to 100MHz
+*/
+ switch (serdes2_prtcl) {
+ case 0x9E:
+ case 0x9A:
[U-Boot] [PATCH][v2] powerpc/t1040qds: Add Video - HDMI support
T1040 has internal display interface unit (DIU) for driving video.
T1040QDS supports video mode via
-LCD using TI enconder
-HDMI type interface via HDMI encoder
Chrontel, CH7301C encoder which is I2C programmable is used as
HDMI connector on T1040QDS.
This patch add support to
-enable Video interface for T1040QDS
-route qixis multiplexing to enable DIU-HDMI interface on board
-program DIU pixel clock gerenartor for T1040
-program HDMI encoder via I2C on board
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
---
Changes for v2: Fix compilation warnings
Depends on http://patchwork.ozlabs.org/patch/315294/
board/freescale/t1040qds/Makefile |1 +
board/freescale/t1040qds/diu.c| 215 +
board/freescale/t1040qds/t1040qds.h |1 +
board/freescale/t1040qds/t1040qds_qixis.h | 12 ++
include/configs/T1040QDS.h| 27 -
5 files changed, 255 insertions(+), 1 deletions(-)
create mode 100644 board/freescale/t1040qds/diu.c
diff --git a/board/freescale/t1040qds/Makefile
b/board/freescale/t1040qds/Makefile
index c7470d7..19ed21b 100644
--- a/board/freescale/t1040qds/Makefile
+++ b/board/freescale/t1040qds/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_PCI) += pci.o
obj-y += law.o
obj-y += tlb.o
obj-y += eth.o
+obj-y += diu.o
diff --git a/board/freescale/t1040qds/diu.c b/board/freescale/t1040qds/diu.c
new file mode 100644
index 000..ffd074b
--- /dev/null
+++ b/board/freescale/t1040qds/diu.c
@@ -0,0 +1,215 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ * Author: Priyanka Jain priyanka.j...@freescale.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include command.h
+#include linux/ctype.h
+#include asm/io.h
+#include stdio_dev.h
+#include video_fb.h
+#include fsl_diu_fb.h
+#include ../common/qixis.h
+#include t1040qds.h
+#include t1040qds_qixis.h
+#include i2c.h
+
+
+#define I2C_DVI_INPUT_DATA_FORMAT_REG 0x1F
+#define I2C_DVI_PLL_CHARGE_CNTL_REG0x33
+#define I2C_DVI_PLL_DIVIDER_REG0x34
+#define I2C_DVI_PLL_SUPPLY_CNTL_REG0x35
+#define I2C_DVI_PLL_FILTER_REG 0x36
+#define I2C_DVI_TEST_PATTERN_REG 0x48
+#define I2C_DVI_POWER_MGMT_REG 0x49
+#define I2C_DVI_LOCK_STATE_REG 0x4D
+#define I2C_DVI_SYNC_POLARITY_REG 0x56
+
+/*
+ * Set VSYNC/HSYNC to active high. This is polarity of sync signals
+ * from DIU-DVI. The DIU default is active igh, so DVI is set to
+ * active high.
+ */
+#define I2C_DVI_INPUT_DATA_FORMAT_VAL 0x98
+
+#define I2C_DVI_PLL_CHARGE_CNTL_HIGH_SPEED_VAL 0x06
+#define I2C_DVI_PLL_DIVIDER_HIGH_SPEED_VAL 0x26
+#define I2C_DVI_PLL_FILTER_HIGH_SPEED_VAL 0xA0
+#define I2C_DVI_PLL_CHARGE_CNTL_LOW_SPEED_VAL 0x08
+#define I2C_DVI_PLL_DIVIDER_LOW_SPEED_VAL 0x16
+#define I2C_DVI_PLL_FILTER_LOW_SPEED_VAL 0x60
+
+/* Clear test pattern */
+#define I2C_DVI_TEST_PATTERN_VAL 0x18
+/* Exit Power-down mode */
+#define I2C_DVI_POWER_MGMT_VAL 0xC0
+
+/* Monitor polarity is handled via DVI Sync Polarity Register */
+#define I2C_DVI_SYNC_POLARITY_VAL 0x00
+
+/*
+ * DIU Area Descriptor
+ *
+ * Note that we need to byte-swap the value before it's written to the AD
+ * register. So even though the registers don't look like they're in the same
+ * bit positions as they are on the MPC8610, the same value is written to the
+ * AD register on the MPC8610 and on the P1022.
+ */
+#define AD_BYTE_F 0x1000
+#define AD_ALPHA_C_SHIFT 25
+#define AD_BLUE_C_SHIFT23
+#define AD_GREEN_C_SHIFT 21
+#define AD_RED_C_SHIFT 19
+#define AD_PIXEL_S_SHIFT 16
+#define AD_COMP_3_SHIFT12
+#define AD_COMP_2_SHIFT8
+#define AD_COMP_1_SHIFT4
+#define AD_COMP_0_SHIFT0
+
+/* Programming of HDMI Chrontel CH7301 connector */
+int diu_set_dvi_encoder(unsigned int pixclock)
+{
+ int ret;
+ u8 temp;
+ select_i2c_ch_pca9547(I2C_MUX_CH_DIU);
+
+ temp = I2C_DVI_TEST_PATTERN_VAL;
+ ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_TEST_PATTERN_REG, 1,
+ temp, 1);
+ if (ret) {
+ puts(I2C: failed to select proper dvi test pattern\n);
+ return ret;
+ }
+ temp = I2C_DVI_INPUT_DATA_FORMAT_VAL;
+ ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_INPUT_DATA_FORMAT_REG,
+ 1, temp, 1);
+ if (ret) {
+ puts(I2C: failed to select dvi input data format\n);
+ return ret;
+ }
+
+ /* Set Sync polarity register */
+ temp = I2C_DVI_SYNC_POLARITY_VAL;
+ ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_SYNC_POLARITY_REG, 1,
+ temp, 1);
+ if (ret) {
+ puts(I2C: failed to select dvi syc polarity\n);
+
[U-Boot] [PATCH][v2] powerpc/t1040qds: Add Video - HDMI support
T1040 has internal display interface unit (DIU) for driving video.
T1040QDS supports video mode via
-LCD using TI enconder
-HDMI type interface via HDMI encoder
Chrontel, CH7301C encoder which is I2C programmable is used as
HDMI connector on T1040QDS.
This patch add support to
-enable Video interface for T1040QDS
-route qixis multiplexing to enable DIU-HDMI interface on board
-program DIU pixel clock gerenartor for T1040
-program HDMI encoder via I2C on board
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
---
Changes for v2: Fix compilation warnings
board/freescale/t1040qds/Makefile |1 +
board/freescale/t1040qds/diu.c| 215 +
board/freescale/t1040qds/t1040qds.h |1 +
board/freescale/t1040qds/t1040qds_qixis.h | 12 ++
include/configs/T1040QDS.h| 27 -
5 files changed, 255 insertions(+), 1 deletions(-)
create mode 100644 board/freescale/t1040qds/diu.c
diff --git a/board/freescale/t1040qds/Makefile
b/board/freescale/t1040qds/Makefile
index c7470d7..19ed21b 100644
--- a/board/freescale/t1040qds/Makefile
+++ b/board/freescale/t1040qds/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_PCI) += pci.o
obj-y += law.o
obj-y += tlb.o
obj-y += eth.o
+obj-y += diu.o
diff --git a/board/freescale/t1040qds/diu.c b/board/freescale/t1040qds/diu.c
new file mode 100644
index 000..ffd074b
--- /dev/null
+++ b/board/freescale/t1040qds/diu.c
@@ -0,0 +1,215 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ * Author: Priyanka Jain priyanka.j...@freescale.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include command.h
+#include linux/ctype.h
+#include asm/io.h
+#include stdio_dev.h
+#include video_fb.h
+#include fsl_diu_fb.h
+#include ../common/qixis.h
+#include t1040qds.h
+#include t1040qds_qixis.h
+#include i2c.h
+
+
+#define I2C_DVI_INPUT_DATA_FORMAT_REG 0x1F
+#define I2C_DVI_PLL_CHARGE_CNTL_REG0x33
+#define I2C_DVI_PLL_DIVIDER_REG0x34
+#define I2C_DVI_PLL_SUPPLY_CNTL_REG0x35
+#define I2C_DVI_PLL_FILTER_REG 0x36
+#define I2C_DVI_TEST_PATTERN_REG 0x48
+#define I2C_DVI_POWER_MGMT_REG 0x49
+#define I2C_DVI_LOCK_STATE_REG 0x4D
+#define I2C_DVI_SYNC_POLARITY_REG 0x56
+
+/*
+ * Set VSYNC/HSYNC to active high. This is polarity of sync signals
+ * from DIU-DVI. The DIU default is active igh, so DVI is set to
+ * active high.
+ */
+#define I2C_DVI_INPUT_DATA_FORMAT_VAL 0x98
+
+#define I2C_DVI_PLL_CHARGE_CNTL_HIGH_SPEED_VAL 0x06
+#define I2C_DVI_PLL_DIVIDER_HIGH_SPEED_VAL 0x26
+#define I2C_DVI_PLL_FILTER_HIGH_SPEED_VAL 0xA0
+#define I2C_DVI_PLL_CHARGE_CNTL_LOW_SPEED_VAL 0x08
+#define I2C_DVI_PLL_DIVIDER_LOW_SPEED_VAL 0x16
+#define I2C_DVI_PLL_FILTER_LOW_SPEED_VAL 0x60
+
+/* Clear test pattern */
+#define I2C_DVI_TEST_PATTERN_VAL 0x18
+/* Exit Power-down mode */
+#define I2C_DVI_POWER_MGMT_VAL 0xC0
+
+/* Monitor polarity is handled via DVI Sync Polarity Register */
+#define I2C_DVI_SYNC_POLARITY_VAL 0x00
+
+/*
+ * DIU Area Descriptor
+ *
+ * Note that we need to byte-swap the value before it's written to the AD
+ * register. So even though the registers don't look like they're in the same
+ * bit positions as they are on the MPC8610, the same value is written to the
+ * AD register on the MPC8610 and on the P1022.
+ */
+#define AD_BYTE_F 0x1000
+#define AD_ALPHA_C_SHIFT 25
+#define AD_BLUE_C_SHIFT23
+#define AD_GREEN_C_SHIFT 21
+#define AD_RED_C_SHIFT 19
+#define AD_PIXEL_S_SHIFT 16
+#define AD_COMP_3_SHIFT12
+#define AD_COMP_2_SHIFT8
+#define AD_COMP_1_SHIFT4
+#define AD_COMP_0_SHIFT0
+
+/* Programming of HDMI Chrontel CH7301 connector */
+int diu_set_dvi_encoder(unsigned int pixclock)
+{
+ int ret;
+ u8 temp;
+ select_i2c_ch_pca9547(I2C_MUX_CH_DIU);
+
+ temp = I2C_DVI_TEST_PATTERN_VAL;
+ ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_TEST_PATTERN_REG, 1,
+ temp, 1);
+ if (ret) {
+ puts(I2C: failed to select proper dvi test pattern\n);
+ return ret;
+ }
+ temp = I2C_DVI_INPUT_DATA_FORMAT_VAL;
+ ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_INPUT_DATA_FORMAT_REG,
+ 1, temp, 1);
+ if (ret) {
+ puts(I2C: failed to select dvi input data format\n);
+ return ret;
+ }
+
+ /* Set Sync polarity register */
+ temp = I2C_DVI_SYNC_POLARITY_VAL;
+ ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_SYNC_POLARITY_REG, 1,
+ temp, 1);
+ if (ret) {
+ puts(I2C: failed to select dvi syc polarity\n);
+ return ret;
+ }
+
+ /* Set PLL
[U-Boot] env variable in linux
Hi, I have to get environment variables in linux from uboot. For that i did make cross compile on env tools in my uboot(uboot-toradex).after this i executed the fw_printenv in my linux it is giving like following, sh-4.2# fw_printenv Too few good blocks within range and my fw_env.config file is, # NOR example # MTD device name Device offset Env. size Flash sector size Number of sectors #/dev/mtd1 0x 0x30 0x4 #/dev/mtd2 0x 0x4000 0x4000 # MTD SPI-dataflash example # MTD device name Device offset Env. size Flash sector size Number of sectors #/dev/mtd5 0x4200 0x4200 #/dev/mtd6 0x4200 0x4200 # NAND example #/dev/mtd0 0x4000 0x4000 0x2 2 /dev/mtd5 0x 0x20 0x4 2 and in linux, sh-4.2# cat /proc/mtd dev:size erasesize name mtd0: 1e7c 0004 USR mtd1: 0030 0004 BCT mtd2: 0004 0004 PT mtd3: 0020 0004 EBT mtd4: 0004 0004 BMP mtd5: 0020 0004 ENV mtd6: 0080 0004 LNX mtd7: 0004 0004 ARG please give me a solution. regards, shobin.b ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] fsl/usb: Workaround for USB erratum-A007075
Put a delay of 5 millisecond after reset so that ULPI phy
gets enough time to come out of reset. Erratum A007075 applies
to following SOCs and their variants, if any
P1010 rev 1.0
B4860 rev 1.0, 2.0
P4080 rev 2.0, 3.0
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4
arch/powerpc/include/asm/config_mpc85xx.h | 3 +++
arch/powerpc/include/asm/fsl_errata.h | 16
drivers/usb/host/ehci-fsl.c | 9 +
4 files changed, 32 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 7693899..c23707b 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -260,6 +260,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
#ifdef CONFIG_SYS_FSL_ERRATUM_A005125
puts(Work-around for Erratum A005125 enabled\n);
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A007075
+ if (has_erratum_a007075())
+ puts(Work-around for Erratum A007075 enabled\n);
+#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_I2C_A004447
if ((SVR_SOC_VER(svr) == SVR_8548 IS_SVR_REV(svr, 3, 1)) ||
(SVR_REV(svr) = CONFIG_SYS_FSL_A004447_SVR_REV))
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch/powerpc/include/asm/config_mpc85xx.h
index 56587ae..9d41d3b 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -154,6 +154,7 @@
#define CONFIG_SYS_FSL_ERRATUM_IFC_A003399
#define CONFIG_SYS_FSL_ERRATUM_A005125
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
+#define CONFIG_SYS_FSL_ERRATUM_A007075
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x10
#define CONFIG_ESDHC_HC_BLK_ADDR
@@ -473,6 +474,7 @@
#define CONFIG_SYS_P4080_ERRATUM_PCIE_A003
#define CONFIG_SYS_FSL_ERRATUM_A005812
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
+#define CONFIG_SYS_FSL_ERRATUM_A007075
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x20
#elif defined(CONFIG_PPC_P5020) /* also supports P5010 */
@@ -662,6 +664,7 @@
#define CONFIG_SYS_FSL_ERRATUM_A005871
#define CONFIG_SYS_FSL_ERRATUM_A006379
#define CONFIG_SYS_FSL_ERRATUM_A006593
+#define CONFIG_SYS_FSL_ERRATUM_A007075
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe00
#ifdef CONFIG_PPC_B4860
diff --git a/arch/powerpc/include/asm/fsl_errata.h
b/arch/powerpc/include/asm/fsl_errata.h
index a590919..5599680 100644
--- a/arch/powerpc/include/asm/fsl_errata.h
+++ b/arch/powerpc/include/asm/fsl_errata.h
@@ -26,4 +26,20 @@ static inline bool has_erratum_a006379(void)
}
#endif
+static inline bool has_erratum_a007075(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+ case SVR_B4860:
+ case SVR_B4420:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+ case SVR_P1010:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_P4080:
+ return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0);
+ }
+ return false;
+}
#endif
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 45e5d6a..afd61f1 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -14,6 +14,7 @@
#include asm/io.h
#include usb/ehci-fsl.h
#include hwconfig.h
+#include asm/fsl_errata.h
#include ehci.h
@@ -46,6 +47,14 @@ int ehci_hcd_init(int index, enum usb_init_type init,
usb_phy[0] = '\0';
#endif
+ if (has_erratum_a007075())
+ /*
+* A 5ms delay is needed after applying soft-reset to the
+* controller to let external ULPI phy come out of reset.
+* This delay needs to be added before re-initializing
+* the controller after soft-resetting completes
+*/
+ mdelay(5);
switch (index) {
case 0:
--
1.7.11.7
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 00/13] ARMv7: add PSCI support to u-boot
Thank´s Marc Error Compile How could solve this compilation problem? What am I doing wrong? Have since I'm Very Grateful! make Cubieboard2 ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- arm-linux-gnueabihf-gcc -M -g -Os -ffunction-sections -fdata-sections -fno-common -ffixed-r9 -msoft-float -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x4a00 -I/root/cubie-test/util/u-boot-maz-wip-psci/include -I/root/cubie-test/util/u-boot-maz-wip-psci/arch/arm/include -fno-builtin -ffreestanding -nostdinc -isystem /usr/lib/gcc/arm-linux-gnueabihf/4.7/include -pipe -DCONFIG_ARM -D__ARM__ -marm -mno-thumb-interwork -mabi=aapcs-linux -mword-relocations -march=armv7-a -MQ designware.o designware.c .depend.designware designware.c:21:3: error: #error DesignWare Ether MAC requires PHYLIB - missing CONFIG_PHYLIB make[2]: *** Sem regra para processar o alvo `.depend', necessário por `built-in.o'. Pare. make[2]: Saindo do diretório `/root/cubie-test/util/u-boot-maz-wip-psci/drivers/net' make[1]: ** [drivers/net/built-in.o] Erro 2 make[1]: Saindo do diretório `/root/cubie-test/util/u-boot-maz-wip-psci' make: ** [Cubieboard2] Erro 2 root@vbi7:~/cubie-test/util/u-boot-maz-wip-psci# _ Em terça-feira, 25 de fevereiro de 2014 11h04min55s UTC-3, maz escreveu: Hi, On 2014-02-25 13:38, Ezaul Zillmer wrote: Hi Marc Zyngier Where could obtain this repository with these alterations to be able to test virtualization with KVM on my cubieboard2'm using Kernel 3.14.rc4 I appreciate if you help You're looking at an older patch series. The new one can be found there: http://permalink.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/7151 I also have a repository with this code at: git://git.kernel.org/pub/scm/linux/kernel/git/maz/u-boot.git wip/psci Cheers, M. -- Who you jivin' with that Cosmik Debris? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [Regression][ext4] Regression at EXT4 filesystem code
On Mon, Feb 24, 2014 at 05:42:59PM +0100, Ionut Nicu wrote: Hi, On 24.02.2014 16:13, ext Lukasz Majewski wrote: Dear All, In the newest master u-boot (SHA1: 1674df60d17e0e72396c961d5390bb62b184ad95) I've found a regression with writing to EXT4 file system: Writing uImage to ext4 partition - created with Debian's mkfs.ext4 /dev/sdd2 (size 58M) dfu-util -R -a2 -D arch/arm/boot/uImage uImage size - 4.8 MiB GADGET DRIVER: usb_dnl_dfu USB PHY0 Enable #Extent Error ext4fs_devread read outside partition 4294967294 Extent Error Ugh ... It's pretty stupid, but my patch is completely ignoring the write path. The error occurs because in read_allocated_block() I'm trying to use the extent cache, but this extent cache is only built in ext4fs_read_file(). After reverting following patch: Commit: ext4fs: Add ext4 extent cache for read operations SHA1: fc0fc50f38a4d7d0554558076a79dfe8b0d78cd5 I am able to store files on the ext4 partition: USB PHY0 Enable #File System is consistent file found deleting update journal finished File System is consistent update journal finished DFU complete CRC32: 0x3875a108 DOWNLOAD ... OK Ctrl+C to exit ... resetting ... Any ideas how to fix it? I guess the best solution for the moment is to revert the patch and I'll try to come up with an updated version which doesn't break the write functionality. Sorry about this. Reverted for now, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] nand_spl: display warning message to inform the end of nand_spl
On Wed, Feb 26, 2014 at 05:51:11PM +0900, Masahiro Yamada wrote: Now we have two different frameworks for doing the same thing. I'd like to propose to drop nand_spl framework. How about deleting it before v2014.07 release? In the interim, this commit will display a warning message when compiling nand_spl board. Now we have 19 nand_spl boards: MPC8315ERDB_NAND SIMPC8313_LP SIMPC8313_SP MPC8536DS_NAND MPC8569MDS_NAND MPC8572DS_NAND P1023RDS_NAND P1011RDB_NAND P1020RDB_NAND P2010RDB_NAND P2020RDB_NAND acadia_nand bamboo_nand canyonlands_nand glacier_nand haleakala_nand kilauea_nand rainier_nand sequoia_nand They must be ported to SPL before the deadline, otherwise they will be removed. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Cc: Dave Liu dave...@freescale.com Cc: Ron Madrid i...@sheldoninst.com Cc: Roy Zang tie-fei.z...@freescale.com Cc: Stefan Roese s...@denx.de Scott? York? I'm fine with the above date. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] sizes.h - consolidate for all architectures
Copied from Linux sources include/linux/sizes.h commit 413541dd66d51f791a0b169d9b9014e4f56be13c Signed-off-by: Alexey Brodkin abrod...@synopsys.com Cc: Vineet Gupta vgu...@synopsys.com Cc: Tom Rini tr...@ti.com Cc: Stefan Roese s...@denx.de Cc: Albert Aribaud albert.u.b...@aribaud.net --- arch/arm/cpu/armv7/omap-common/hwinit-common.c | 2 +- arch/arm/cpu/armv7/omap4/hwinit.c | 2 +- arch/arm/cpu/armv7/omap5/hwinit.c | 2 +- arch/arm/cpu/at91-common/phy.c | 2 +- arch/arm/include/asm/arch-davinci/hardware.h | 2 +- arch/arm/include/asm/arch-mb86r0x/hardware.h | 2 +- arch/arm/include/asm/arch-tnetv107x/hardware.h | 2 +- arch/arm/include/asm/sizes.h | 39 - board/BuS/vl_ma2sc/vl_ma2sc.c | 2 +- board/atmel/at91sam9263ek/at91sam9263ek.c | 2 +- board/compulab/cm_t335/spl.c | 2 +- board/freescale/mx6slevk/mx6slevk.c| 2 +- board/highbank/highbank.c | 2 +- board/ronetix/pm9261/pm9261.c | 2 +- board/ronetix/pm9263/pm9263.c | 2 +- board/ronetix/pm9g45/pm9g45.c | 2 +- board/samsung/common/misc.c| 2 +- board/wandboard/wandboard.c| 2 +- drivers/fpga/zynqpl.c | 2 +- drivers/gpio/at91_gpio.c | 2 +- drivers/pci/pcie_imx.c | 2 +- drivers/usb/gadget/f_thor.h| 2 +- include/configs/at91rm9200ek.h | 2 +- include/configs/beaver.h | 2 +- include/configs/cardhu.h | 2 +- include/configs/cpuat91.h | 2 +- include/configs/dalmore.h | 2 +- include/configs/devkit3250.h | 2 +- include/configs/harmony.h | 2 +- include/configs/hummingboard.h | 2 +- include/configs/mx6sabre_common.h | 2 +- include/configs/mx6slevk.h | 2 +- include/configs/omap1510.h | 2 +- include/configs/omap3_sdp3430.h| 2 +- include/configs/paz00.h| 2 +- include/configs/rpi_b.h| 2 +- include/configs/sbc35_a9g20.h | 2 +- include/configs/seaboard.h | 2 +- include/configs/snapper9260.h | 2 +- include/configs/tegra-common.h | 2 +- include/configs/tnetv107x_evm.h| 2 +- include/configs/trats.h| 2 +- include/configs/trats2.h | 2 +- include/configs/trimslice.h| 2 +- include/configs/udoo.h | 2 +- include/configs/venice2.h | 2 +- include/configs/ventana.h | 2 +- include/configs/wandboard.h| 2 +- include/configs/whistler.h | 2 +- include/linux/sizes.h | 47 ++ include/usb/s3c_udc.h | 2 +- 51 files changed, 96 insertions(+), 88 deletions(-) delete mode 100644 arch/arm/include/asm/sizes.h create mode 100644 include/linux/sizes.h diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c index ade744e..8ebc0ce 100644 --- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c @@ -14,7 +14,7 @@ #include common.h #include spl.h #include asm/arch/sys_proto.h -#include asm/sizes.h +#include linux/sizes.h #include asm/emif.h #include asm/omap_common.h #include linux/compiler.h diff --git a/arch/arm/cpu/armv7/omap4/hwinit.c b/arch/arm/cpu/armv7/omap4/hwinit.c index b0598a0..db16548 100644 --- a/arch/arm/cpu/armv7/omap4/hwinit.c +++ b/arch/arm/cpu/armv7/omap4/hwinit.c @@ -15,7 +15,7 @@ #include asm/armv7.h #include asm/arch/cpu.h #include asm/arch/sys_proto.h -#include asm/sizes.h +#include linux/sizes.h #include asm/emif.h #include asm/arch/gpio.h #include asm/omap_common.h diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c index 737d23c..93feb16 100644 --- a/arch/arm/cpu/armv7/omap5/hwinit.c +++ b/arch/arm/cpu/armv7/omap5/hwinit.c @@ -17,7 +17,7 @@ #include asm/arch/cpu.h #include asm/arch/sys_proto.h #include asm/arch/clock.h -#include asm/sizes.h +#include linux/sizes.h #include asm/utils.h #include asm/arch/gpio.h #include asm/emif.h diff --git a/arch/arm/cpu/at91-common/phy.c b/arch/arm/cpu/at91-common/phy.c index 3b6c60c..2cba716 100644 --- a/arch/arm/cpu/at91-common/phy.c +++ b/arch/arm/cpu/at91-common/phy.c @@ -14,7 +14,7 @@ #include common.h #include asm/io.h -#include asm/sizes.h +#include linux/sizes.h #include asm/arch/at91_pmc.h #include asm/arch/at91_rstc.h #include watchdog.h diff --git
Re: [U-Boot] [PATCH 0/8] Kbuild: A collection of trivial refactoring
On Wed, Feb 26, 2014 at 02:50:57PM +0900, Masahiro Yamada wrote:
Masahiro Yamada (8):
config.mk: Delete unused variable BCURDIR
Makefile: delete unused variable LDSCRIPT_MAKEFILE_DIR
nand_spl: simpc8313: move config.mk used only for nand_spl
x86: Delete redundant compiler flags
sh: Do not define -ffreestanding twice
sh: merge compiler flag -ffixed-r13
m68k: merge compile flags -ffixed-d7 -sep-data
arm64: Do not double -mstrict-align option
Makefile | 4
arch/arm/cpu/armv8/config.mk | 1 -
arch/m68k/config.mk | 3 ++-
arch/m68k/cpu/mcf5227x/config.mk | 1 -
arch/m68k/cpu/mcf523x/config.mk | 1 -
arch/m68k/cpu/mcf52x2/config.mk | 2 --
arch/m68k/cpu/mcf532x/config.mk | 2 --
arch/m68k/cpu/mcf5445x/config.mk | 2 --
arch/m68k/cpu/mcf547x_8x/config.mk| 1 -
arch/sh/config.mk | 1 +
arch/sh/cpu/sh2/config.mk | 3 +--
arch/sh/cpu/sh3/config.mk | 1 -
arch/sh/cpu/sh4/config.mk | 1 -
arch/x86/config.mk| 5 +
config.mk | 2 --
nand_spl/board/sheldon/simpc8313/Makefile | 2 ++
{board = nand_spl/board}/sheldon/simpc8313/config.mk | 0
17 files changed, 7 insertions(+), 25 deletions(-)
rename {board = nand_spl/board}/sheldon/simpc8313/config.mk (100%)
Patches 1 through 7 look good and I'll pick them up soon, commented on
8.
--
Tom
signature.asc
Description: Digital signature
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 8/8] arm64: Do not double -mstrict-align option
On Wed, Feb 26, 2014 at 02:51:05PM +0900, Masahiro Yamada wrote: Seeing arch/arm/cpu/armv8/config.mk, -mstrict-align option was added to both PLATFORM_NO_UNALIGNED and PLATFORM_CPPFLAGS. $(PLATFORM_CPPFLAGS) is given to all compiled objects. Adding the same option to also PLATFORM_NO_UNALIGNED is redundant. For example, common/hush.o was compiled with double -mstrict-align. You can comfirm it by checking common/.hush.o.cmd file. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Cc: David Feng feng...@phytium.com.cn Cc: Albert ARIBAUD albert.u.b...@aribaud.net Cc: Tom Rini tr...@ti.com With the v3 series about unaligned bits this patch should no longer be needed. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] sizes.h - consolidate for all architectures
On Wed, Feb 26, 2014 at 05:47:58PM +0400, Alexey Brodkin wrote: Copied from Linux sources include/linux/sizes.h commit 413541dd66d51f791a0b169d9b9014e4f56be13c Signed-off-by: Alexey Brodkin abrod...@synopsys.com Cc: Vineet Gupta vgu...@synopsys.com Cc: Tom Rini tr...@ti.com Cc: Stefan Roese s...@denx.de Cc: Albert Aribaud albert.u.b...@aribaud.net Acked-by: Tom Rini tr...@ti.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] sizes.h - consolidate for all architectures
On 26.02.2014 14:47, Alexey Brodkin wrote: Copied from Linux sources include/linux/sizes.h commit 413541dd66d51f791a0b169d9b9014e4f56be13c Signed-off-by: Alexey Brodkin abrod...@synopsys.com Cc: Vineet Gupta vgu...@synopsys.com Cc: Tom Rini tr...@ti.com Cc: Stefan Roese s...@denx.de Cc: Albert Aribaud albert.u.b...@aribaud.net Even though that I know that Wolfgang is against the usage of those SZ_xxx macros, this is still better that before. So: Acked-by: Stefan Roese s...@denx.de Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] nand_spl: display warning message to inform the end of nand_spl
On 26.02.2014 09:51, Masahiro Yamada wrote: Now we have two different frameworks for doing the same thing. I'd like to propose to drop nand_spl framework. How about deleting it before v2014.07 release? In the interim, this commit will display a warning message when compiling nand_spl board. Now we have 19 nand_spl boards: MPC8315ERDB_NAND SIMPC8313_LP SIMPC8313_SP MPC8536DS_NAND MPC8569MDS_NAND MPC8572DS_NAND P1023RDS_NAND P1011RDB_NAND P1020RDB_NAND P2010RDB_NAND P2020RDB_NAND acadia_nand bamboo_nand canyonlands_nand glacier_nand haleakala_nand kilauea_nand rainier_nand sequoia_nand They must be ported to SPL before the deadline, otherwise they will be removed. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Cc: Dave Liu dave...@freescale.com Cc: Ron Madrid i...@sheldoninst.com Cc: Roy Zang tie-fei.z...@freescale.com Cc: Stefan Roese s...@denx.de The AMCC/APM PPC4xx NAND booting boards, which were used to introduce the nand_spl infrastructure, are practically unmaintained. There doesn't seem to be much interest in porting those boards to the SPL infrastructure. So I'm fine with the date as well: Acked-by: Stefan Roese s...@denx.de Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] nand_spl: display warning message to inform the end of nand_spl
On Wed, Feb 26, 2014 at 03:20:27PM +0100, Stefan Roese wrote: On 26.02.2014 09:51, Masahiro Yamada wrote: Now we have two different frameworks for doing the same thing. I'd like to propose to drop nand_spl framework. How about deleting it before v2014.07 release? In the interim, this commit will display a warning message when compiling nand_spl board. Now we have 19 nand_spl boards: MPC8315ERDB_NAND SIMPC8313_LP SIMPC8313_SP MPC8536DS_NAND MPC8569MDS_NAND MPC8572DS_NAND P1023RDS_NAND P1011RDB_NAND P1020RDB_NAND P2010RDB_NAND P2020RDB_NAND acadia_nand bamboo_nand canyonlands_nand glacier_nand haleakala_nand kilauea_nand rainier_nand sequoia_nand They must be ported to SPL before the deadline, otherwise they will be removed. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Cc: Dave Liu dave...@freescale.com Cc: Ron Madrid i...@sheldoninst.com Cc: Roy Zang tie-fei.z...@freescale.com Cc: Stefan Roese s...@denx.de The AMCC/APM PPC4xx NAND booting boards, which were used to introduce the nand_spl infrastructure, are practically unmaintained. There doesn't seem to be much interest in porting those boards to the SPL infrastructure. So I'm fine with the date as well: Acked-by: Stefan Roese s...@denx.de In that case can you please post a patch to remove them now? Or if you really want, we can delay until v2014.04 is out. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] libfdt: Fix segfault when calling fit_check_format() on corrupt FIT images
From: Jon Nalley li...@bluebot.org
It has been observed that fit_check_format() will fail when passed a
corrupt FIT image. This was tracked down to _fdt_string_eq():
return (strlen(p) == len) (memcmp(p, s, len) == 0);
In the case of a corrupt FIT image one can't depend on 'p' being NULL
terminated. I changed it to use strnlen() to fix the issue.
Signed-off-by: Tom Rini tr...@ti.com
---
Changes in v2:
- Pass len + 1, not len to strnlen as that's the best practice for
strnlen.
---
lib/libfdt/fdt_ro.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c
index f2154e8..36af043 100644
--- a/lib/libfdt/fdt_ro.c
+++ b/lib/libfdt/fdt_ro.c
@@ -44,7 +44,7 @@ static int _fdt_string_eq(const void *fdt, int stroffset,
{
const char *p = fdt_string(fdt, stroffset);
- return (strlen(p) == len) (memcmp(p, s, len) == 0);
+ return (strnlen(p, len + 1) == len) (memcmp(p, s, len) == 0);
}
int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v8 0/14] Driver model implementation, tests, demo and GPIO
On Mon, Feb 17, 2014 at 03:06:34PM -0700, Simon Glass wrote: This series adds a driver model implementation. It is taken from the driver model code developed by: Marek Vasut ma...@denx.de Pavel Herrmann morpheus.i...@gmail.com Viktor Křivák viktor.kri...@gmail.com Tomas Hlavacek tmshl...@gmail.com Please see doc/driver-model/README.txt for details of how to run this and what to look for. The old driver model documentation is removed. Note: If you are reviewing this code, but don't have a lot of time, please consider starting with the 'demo' driver (patch 'dm: Add a demonstration/example driver') since it clearly shows how devices and uclasses work. Much of this series consists of test code and plumbing, so is of less interest to driver authors. There is also a presentation on driver model at this page: http://www.denx.de/wiki/U-Boot/MiniSummitELCE2013 You can find a test version of the code used here in branch dm9 at: http://git.denx.de/u-boot-x86.git (Branch dm contains the original implementation) This looks OK, aside from a comment on 13/14. It does need another rebase, and then I'll grab it. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v8 13/14] dm: Enable gpio command to support driver model
On Mon, Feb 17, 2014 at 03:06:47PM -0700, Simon Glass wrote: Now that named GPIO banks are supported, along with a way of obtaining the status of a GPIO (input or output), we can provide an enhanced GPIO command for driver model. Where the driver provides its own operation for obtaining the GPIO state, this is used, otherwise a generic version is sufficient. [snip] +#if defined(CONFIG_DM_GPIO) + /* + * TODO(s...@chromium.org): Convert this code over to use the GPIO + * uclass interface instead of the numbered GPIO compatibility + * layer. + */ + ret = gpio_lookup_name(str_gpio, NULL, NULL, gpio); + if (ret) + return cmd_process_error(cmdtp, ret); Since this is part of the initial lets show DM code shouldn't we do this TODO before merging? -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v8 13/14] dm: Enable gpio command to support driver model
Hi Tom, On 26 February 2014 09:34, Tom Rini tr...@ti.com wrote: On Mon, Feb 17, 2014 at 03:06:47PM -0700, Simon Glass wrote: Now that named GPIO banks are supported, along with a way of obtaining the status of a GPIO (input or output), we can provide an enhanced GPIO command for driver model. Where the driver provides its own operation for obtaining the GPIO state, this is used, otherwise a generic version is sufficient. [snip] +#if defined(CONFIG_DM_GPIO) + /* + * TODO(s...@chromium.org): Convert this code over to use the GPIO + * uclass interface instead of the numbered GPIO compatibility + * layer. + */ + ret = gpio_lookup_name(str_gpio, NULL, NULL, gpio); + if (ret) + return cmd_process_error(cmdtp, ret); Since this is part of the initial lets show DM code shouldn't we do this TODO before merging? The problem is that this is generic code, which must work with and without driver model. So we can't move the command code over to exclusively use driver model until all GPIO drivers use driver model. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v8 13/14] dm: Enable gpio command to support driver model
On Wed, Feb 26, 2014 at 10:21:15AM -0700, Simon Glass wrote: Hi Tom, On 26 February 2014 09:34, Tom Rini tr...@ti.com wrote: On Mon, Feb 17, 2014 at 03:06:47PM -0700, Simon Glass wrote: Now that named GPIO banks are supported, along with a way of obtaining the status of a GPIO (input or output), we can provide an enhanced GPIO command for driver model. Where the driver provides its own operation for obtaining the GPIO state, this is used, otherwise a generic version is sufficient. [snip] +#if defined(CONFIG_DM_GPIO) + /* + * TODO(s...@chromium.org): Convert this code over to use the GPIO + * uclass interface instead of the numbered GPIO compatibility + * layer. + */ + ret = gpio_lookup_name(str_gpio, NULL, NULL, gpio); + if (ret) + return cmd_process_error(cmdtp, ret); Since this is part of the initial lets show DM code shouldn't we do this TODO before merging? The problem is that this is generic code, which must work with and without driver model. So we can't move the command code over to exclusively use driver model until all GPIO drivers use driver model. OK, since we're inside a CONFIG_DM_GPIO can you just expand the comment a little so it's clear it's blocked by further conversion? -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v8 13/14] dm: Enable gpio command to support driver model
Hi Tom, On 26 February 2014 10:28, Tom Rini tr...@ti.com wrote: On Wed, Feb 26, 2014 at 10:21:15AM -0700, Simon Glass wrote: Hi Tom, On 26 February 2014 09:34, Tom Rini tr...@ti.com wrote: On Mon, Feb 17, 2014 at 03:06:47PM -0700, Simon Glass wrote: Now that named GPIO banks are supported, along with a way of obtaining the status of a GPIO (input or output), we can provide an enhanced GPIO command for driver model. Where the driver provides its own operation for obtaining the GPIO state, this is used, otherwise a generic version is sufficient. [snip] +#if defined(CONFIG_DM_GPIO) + /* + * TODO(s...@chromium.org): Convert this code over to use the GPIO + * uclass interface instead of the numbered GPIO compatibility + * layer. + */ + ret = gpio_lookup_name(str_gpio, NULL, NULL, gpio); + if (ret) + return cmd_process_error(cmdtp, ret); Since this is part of the initial lets show DM code shouldn't we do this TODO before merging? The problem is that this is generic code, which must work with and without driver model. So we can't move the command code over to exclusively use driver model until all GPIO drivers use driver model. OK, since we're inside a CONFIG_DM_GPIO can you just expand the comment a little so it's clear it's blocked by further conversion? Sure, I'll do that and retest, resend. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC] mmc: Remove ops from struct mmc and put in mmc_ops
Remove the in-structure ops and put them in mmc_ops with
a constant pointer to it.
This makes the mmc structure smaller as well as conserving
code space (in theory).
All in-tree drivers are converted as well; this is done in a
single patch in order to not break git bisect.
Signed-off-by: Pantelis Antoniou pa...@antoniou-consulting.com
---
drivers/mmc/arm_pl180_mmci.c | 12 +
drivers/mmc/bfin_sdh.c | 11
drivers/mmc/davinci_mmc.c| 13 -
drivers/mmc/dw_mmc.c | 10 ---
drivers/mmc/fsl_esdhc.c | 14 +-
drivers/mmc/ftsdc010_mci.c | 11 +---
drivers/mmc/gen_atmel_mci.c | 12 +
drivers/mmc/mmc.c| 21 ---
drivers/mmc/mmc_spi.c| 12 +
drivers/mmc/mxcmmc.c | 12 +
drivers/mmc/mxsmmc.c | 12 +
drivers/mmc/omap_hsmmc.c | 63 +++-
drivers/mmc/pxa_mmc_gen.c| 11 +---
drivers/mmc/sdhci.c | 13 +
drivers/mmc/sh_mmcif.c | 12 +
drivers/mmc/tegra_mmc.c | 19 +++--
include/mmc.h| 19 -
17 files changed, 167 insertions(+), 110 deletions(-)
diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c
index 5a55fe7..4490e97 100644
--- a/drivers/mmc/arm_pl180_mmci.c
+++ b/drivers/mmc/arm_pl180_mmci.c
@@ -335,6 +335,12 @@ static void host_set_ios(struct mmc *dev)
udelay(CLK_CHANGE_DELAY);
}
+static const struct mmc_ops arm_pl180_mmci_ops = {
+ .send_cmd = host_request,
+ .set_ios = host_set_ios,
+ .init = mmc_host_reset,
+};
+
/*
* mmc_host_init - initialize the mmc controller.
* Set initial clock and power for mmc slot.
@@ -360,11 +366,7 @@ int arm_pl180_mmci_init(struct pl180_mmc_host *host)
sdi_u32 = readl(host-base-mask0) ~SDI_MASK0_MASK;
writel(sdi_u32, host-base-mask0);
strncpy(dev-name, host-name, sizeof(dev-name));
- dev-send_cmd = host_request;
- dev-set_ios = host_set_ios;
- dev-init = mmc_host_reset;
- dev-getcd = NULL;
- dev-getwp = NULL;
+ dev-ops = arm_pl180_mmci_ops;
dev-host_caps = host-caps;
dev-voltages = host-voltages;
dev-f_min = host-clock_min;
diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c
index bd9b641..f0871ec 100644
--- a/drivers/mmc/bfin_sdh.c
+++ b/drivers/mmc/bfin_sdh.c
@@ -274,6 +274,11 @@ static int bfin_sdh_init(struct mmc *mmc)
return 0;
}
+static const struct mmc_ops bfin_mmc_ops = {
+ .send_cmd = bfin_sdh_request,
+ .set_ios= bfin_sdh_set_ios,
+ .init = bfin_sdh_init,
+};
int bfin_mmc_init(bd_t *bis)
{
@@ -284,11 +289,7 @@ int bfin_mmc_init(bd_t *bis)
if (!mmc)
return -ENOMEM;
sprintf(mmc-name, Blackfin SDH);
- mmc-send_cmd = bfin_sdh_request;
- mmc-set_ios = bfin_sdh_set_ios;
- mmc-init = bfin_sdh_init;
- mmc-getcd = NULL;
- mmc-getwp = NULL;
+ mmc-ops = bfin_mmc_ops;
mmc-host_caps = MMC_MODE_4BIT;
mmc-voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c
index b380961..29ca4a6 100644
--- a/drivers/mmc/davinci_mmc.c
+++ b/drivers/mmc/davinci_mmc.c
@@ -363,6 +363,12 @@ static void dmmc_set_ios(struct mmc *mmc)
dmmc_set_clock(mmc, mmc-clock);
}
+static const struct mmc_ops dmmc_ops = {
+ .send_cmd = dmmc_send_cmd,
+ .set_ios= dmmc_set_ios,
+ .init = dmmc_init,
+};
+
/* Called from board_mmc_init during startup. Can be called multiple times
* depending on the number of slots available on board and controller
*/
@@ -375,12 +381,7 @@ int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host)
sprintf(mmc-name, davinci);
mmc-priv = host;
- mmc-send_cmd = dmmc_send_cmd;
- mmc-set_ios = dmmc_set_ios;
- mmc-init = dmmc_init;
- mmc-getcd = NULL;
- mmc-getwp = NULL;
-
+ mmc-ops = dmmc_ops;
mmc-f_min = 20;
mmc-f_max = 2500;
mmc-voltages = host-voltages;
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index d45c15c..2e6576e 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -343,6 +343,12 @@ static int dwmci_init(struct mmc *mmc)
return 0;
}
+static const struct mmc_ops dwmci_ops = {
+ .send_cmd = dwmci_send_cmd,
+ .set_ios= dwmci_set_ios,
+ .init = dwmci_init,
+};
+
int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk)
{
struct mmc *mmc;
@@ -358,9 +364,7 @@ int add_dwmci(struct dwmci_host *host, u32 max_clk, u32
min_clk)
host-mmc = mmc;
sprintf(mmc-name, %s, host-name);
- mmc-send_cmd = dwmci_send_cmd;
- mmc-set_ios = dwmci_set_ios;
- mmc-init = dwmci_init;
+ mmc-ops = dwmci_ops;
mmc-f_min = min_clk;
Re: [U-Boot] [PATCH 2/2] env export fix: compute the CRC on the real lenght of the exported variables.
[ Catching up on some old emails ]
On Fri, Nov 15, 2013 at 08:20:09AM +0100, Pierre AUBERT wrote:
Dear Wolfgang Denk,
Le 14/11/2013 18:24, Wolfgang Denk a écrit :
Dear Pierre Aubert,
In message 1384434720-11214-3-git-send-email-p.aub...@staubli.com you
wrote:
Signed-off-by: Pierre Aubert p.aub...@staubli.com
---
common/cmd_nvedit.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index 5bcc324..c32a932 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -922,14 +922,15 @@ NXTARG: ;
len = hexport_r(env_htab, '\0',
H_MATCH_KEY | H_MATCH_IDENT,
- res, ENV_SIZE, argc, argv);
+ res, size, argc, argv);
+
if (len 0) {
error(Cannot export environment: errno = %d\n, errno);
return 1;
}
if (chk) {
- envp-crc = crc32(0, envp-data, ENV_SIZE);
+ envp-crc = crc32(0, envp-data, len);
This is not correct. When exporting with CRC, then the CRC
computation should be the same as is done with the persistently
stored environment, i. e. it should be taken over ENV_SIZE bytes.
In this case, there's an inconstisency between the export and the
import. It isn't possible to export some variables and the reimport
them:
U-Boot env export -c addr
U-Boot env import -c same addr fails with a CRC error.
The import computes the CRC on the real lenght of the environment
variables. IMO, as the import and the export are done to work
together, it seems to me that the export should compute its CRC on
the real lenght.
But env import -c same addr $filesize does work as the export sets
filesize.
--
Tom
signature.asc
Description: Digital signature
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5] socfpga: Add socfpga preloader signing to mkimage
Hi Charles,
On 02/26/2014 01:42 AM, Charles Manning wrote:
On Wednesday 26 February 2014 19:16:37 Michal Simek wrote:
On 02/26/2014 02:17 AM, Charles Manning wrote:
Like many platforms, the Altera socfpga platform requires that the
preloader be signed in a certain way or the built-in boot ROM will
not boot the code.
This change automatically creates an appropriately signed preloader
from an SPL image.
The signed image includes a CRC which must, of course, be generated
with a CRC generator that the SoCFPGA boot ROM agrees with otherwise
the boot ROM will reject the image.
Unfortunately the CRC used in this boot ROM is not the same as the
Adler CRC in lib/crc32.c. Indeed the Adler code is not technically a
CRC but is more correctly described as a checksum.
Thus, the appropriate CRC generator is added to lib/ as crc32_alt.c.
Signed-off-by: Charles Manning cdhmann...@gmail.com
---
Changes for v3:
- Fix some coding style issues.
- Move from a standalone tool to the mkimgae framework.
Changes for v4:
- Fix more coding style issues.
- Fix typos in Makefile.
- Rebase on master (previous version was not on master, but on a
working socfpga branch).
Changes for v5:
- Fix more coding style issues.
- Add some more comments.
- Remove some unused defines.
- Move the local CRC32 code into lib/crc32_alt.c.
Note: Building a SOCFPGA preloader will currently not produe a working
image if built in master, but that is due to issues in building SPL,
not in this signer.
common/image.c |1 +
include/crc32_alt.h | 17
include/image.h |1 +
lib/Makefile |1 +
lib/crc32_alt.c | 94 +
spl/Makefile |5 +
tools/Makefile |2 +
tools/crc32_alt.c|1 +
tools/imagetool.c|2 +
tools/imagetool.h|1 +
tools/socfpgaimage.c | 276
++ 11 files changed, 401
insertions(+)
create mode 100644 include/crc32_alt.h
create mode 100644 lib/crc32_alt.c
create mode 100644 tools/crc32_alt.c
create mode 100644 tools/socfpgaimage.c
diff --git a/common/image.c b/common/image.c
index 9c6bec5..e7dc8cc 100644
--- a/common/image.c
+++ b/common/image.c
@@ -135,6 +135,7 @@ static const table_entry_t uimage_type[] = {
{ IH_TYPE_PBLIMAGE, pblimage, Freescale PBL Boot Image,},
{ IH_TYPE_RAMDISK,ramdisk, RAMDisk Image,},
{ IH_TYPE_SCRIPT, script, Script, },
+ { IH_TYPE_SOCFPGAIMAGE, socfpgaimage, Altera SOCFPGA
preloader,},
{ IH_TYPE_STANDALONE, standalone, Standalone Program, },
{ IH_TYPE_UBLIMAGE, ublimage, Davinci UBL image,},
{ IH_TYPE_MXSIMAGE, mxsimage, Freescale MXS Boot Image,},
diff --git a/include/crc32_alt.h b/include/crc32_alt.h
new file mode 100644
index 000..813d55d
--- /dev/null
+++ b/include/crc32_alt.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2014 Charles Manning cdhmann...@gmail.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Note that the CRC is **not** the zlib/Adler crc32 in crc32.c.
+ * It is the CRC-32 used in bzip2, ethernet and elsewhere.
+ */
+
+#ifndef __CRC32_ALT_H__
+#define __CRC32_ALT_H__
+
+#include stdint.h
+
+uint32_t crc32_alt(uint32_t crc, const void *_buf, int length);
+
+#endif
diff --git a/include/image.h b/include/image.h
index 6afd57b..bde31d9 100644
--- a/include/image.h
+++ b/include/image.h
@@ -215,6 +215,7 @@ struct lmb;
#define IH_TYPE_KERNEL_NOLOAD 14 /* OS Kernel Image, can run from any
load address */ #define IH_TYPE_PBLIMAGE15 /* Freescale PBL Boot
Image */
#define IH_TYPE_MXSIMAGE 16 /* Freescale MXSBoot Image */
+#define IH_TYPE_SOCFPGAIMAGE 17 /* Altera SOCFPGA Preloader */
/*
* Compression Types
diff --git a/lib/Makefile b/lib/Makefile
index 8c483c9..7ee07a5 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -52,6 +52,7 @@ obj-y += errno.o
obj-y += display_options.o
obj-$(CONFIG_BCH) += bch.o
obj-y += crc32.o
+obj-y += crc32_alt.o
obj-y += ctype.o
obj-y += div64.o
obj-y += hang.o
diff --git a/lib/crc32_alt.c b/lib/crc32_alt.c
new file mode 100644
index 000..e0db335
--- /dev/null
+++ b/lib/crc32_alt.c
@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2014 Charles Manning cdhmann...@gmail.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Note that the CRC is **not** the zlib/Adler crc32 in crc32.c.
+ * It is the CRC-32 used in bzip2, ethernet and elsewhere.
+ */
+
+#include crc32_alt.h
+#include stdint.h
+
+static uint32_t crc_table[256] = {
+ 0x, 0x04c11db7, 0x09823b6e, 0x0d4326d9,
+ 0x130476dc, 0x17c56b6b, 0x1a864db2, 0x1e475005,
+ 0x2608edb8, 0x22c9f00f, 0x2f8ad6d6, 0x2b4bcb61,
+ 0x350c9b64, 0x31cd86d3, 0x3c8ea00a, 0x384fbdbd,
+ 0x4c11db70, 0x48d0c6c7, 0x4593e01e, 0x4152fda9,
+ 0x5f15adac, 0x5bd4b01b, 0x569796c2, 0x52568b75,
+ 0x6a1936c8,
Re: [U-Boot] [PATCH v7 1/3] cm_t335: fix linker file to produce full ELF
On Sat, 22 Feb 2014 17:53:41 +0100, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Newly added cm_t335 was missed in commit 47ed5dd0 which made ARM targets produce full ELF files. Fix its linker script. This change is binary-invariant when only .dynsym, .dynstr, .dynamic, .plt, .interp and .gun sections are declared. Sections .hash, .got.plt, .dynbss and .ARM.exidx are also declared so that their (unused) content is moved out of the u-boot binary. Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net --- Series applied to u-boot-arm/master. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 0/6] Introducing the Broadcom bcm281xx Architecture
Hi Darwin, On Tue, 11 Feb 2014 11:06:32 -0800, Darwin Rambo dra...@broadcom.com wrote: This patchset introduces the Broadcom bcm281xx family of mobile SoC chips. Broadcom kona hardware blocks are often found in Broadcom mobile SoC chips including the bcm281xx family, so support for some of these kona blocks is also provided here. These patches work on u-boot master as well as the u-boot-arm custodian tree. Applied to u-boot-arm/master, thanks! Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] arm: ep9315: Return back Cirrus Logic EDB9315A board support
Hi Sergey, On Wed, 12 Feb 2014 17:29:35 +0400, Sergey Kostanbaev sergey.kostanb...@gmail.com wrote: From: Sergey Kostanbaev sergey.kostanb...@gmail.com This patch returns back support for old ep93xx processors family Signed-off-by: Sergey Kostanbaev sergey.kostanb...@fairwaves.ru Cc: albert.u.b...@aribaud.net --- This patch does not apply cleanly above current u-boot-arm/master. Can you rebase onto the PR I4ll be sending out later today? Thanks. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Patch v2 2/3] armv8/cache: Flush D-cache, invalidate I-cache for relocation
If D-cache is enabled, we need to flush it, and invalidate i-cache before jumping to the new location. This should be done right after relocation. Signed-off-by: York Sun york...@freescale.com CC: David Feng feng...@phytium.com.cn --- Changed since v1: v2: use macro switch_el invalidate i-cache by detection of SCTLR.IC arch/arm/cpu/armv8/start.S |6 -- arch/arm/lib/relocate_64.S | 19 +++ 2 files changed, 19 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 90daa4d..e70c51d 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -122,12 +122,6 @@ ENDPROC(lowlevel_init) /*---*/ ENTRY(c_runtime_cpu_setup) - /* If I-cache is enabled invalidate it */ -#ifndef CONFIG_SYS_ICACHE_OFF - ic iallu /* I+BTB cache invalidate */ - isb sy -#endif - /* Relocate vBAR */ adr x0, vectors switch_el x1, 3f, 2f, 1f diff --git a/arch/arm/lib/relocate_64.S b/arch/arm/lib/relocate_64.S index 7fba9e2..5c51cae 100644 --- a/arch/arm/lib/relocate_64.S +++ b/arch/arm/lib/relocate_64.S @@ -11,6 +11,7 @@ #include asm-offsets.h #include config.h #include linux/linkage.h +#include asm/macro.h /* * void relocate_code (addr_moni) @@ -19,6 +20,9 @@ * x0 holds the destination address. */ ENTRY(relocate_code) + stp x29, x30, [sp, #-32]! /* create a stack frame */ + mov x29, sp + str x0, [sp, #16] /* * Copy u-boot from flash to RAM */ @@ -32,6 +36,7 @@ copy_loop: stp x10, x11, [x0], #16 /* copy to target address [x0] */ cmp x1, x2 /* until source end address [x2] */ b.locopy_loop + str x0, [sp, #24] /* * Fix .rela.dyn relocations @@ -54,5 +59,19 @@ fixnext: b.lofixloop relocate_done: + switch_el x1, 3f, 2f, 1f + bl hang +3: mrs x0, sctlr_el3 + b 0f +2: mrs x0, sctlr_el2 + b 0f +1: mrs x0, sctlr_el1 +0: tbz w0, #2, 5f /* skip flushing cache if disabled */ + tbz w0, #12, 4f /* invalide i-cache is enabled */ + ic iallu /* i-cache invalidate all */ + isb sy +4: ldp x0, x1, [sp, #16] + bl __asm_flush_dcache_range +5: ldp x29, x30, [sp],#16 ret ENDPROC(relocate_code) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Patch v2 1/3] armv8/cache: Consolidate setting for MAIR and TCR
Move setting for MAIR and TCR to cache_v8.c, to avoid conflict with
sub-architecture.
Signed-off-by: York Sun york...@freescale.com
CC: David Feng feng...@phytium.com.cn
---
Changed since v1
v1: Acked-by: David Feng feng...@phytium.com.cn
v2: No change.
arch/arm/cpu/armv8/cache_v8.c | 22 +++---
arch/arm/cpu/armv8/start.S| 22 --
2 files changed, 19 insertions(+), 25 deletions(-)
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 131fdab..7acae1b 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -45,15 +45,31 @@ static void mmu_setup(void)
/* load TTBR0 */
el = current_el();
- if (el == 1)
+ if (el == 1) {
asm volatile(msr ttbr0_el1, %0
: : r (gd-arch.tlb_addr) : memory);
- else if (el == 2)
+ asm volatile(msr tcr_el1, %0
+: : r (TCR_FLAGS | TCR_EL1_IPS_BITS)
+: memory);
+ asm volatile(msr mair_el1, %0
+: : r (MEMORY_ATTRIBUTES) : memory);
+ } else if (el == 2) {
asm volatile(msr ttbr0_el2, %0
: : r (gd-arch.tlb_addr) : memory);
- else
+ asm volatile(msr tcr_el2, %0
+: : r (TCR_FLAGS | TCR_EL2_IPS_BITS)
+: memory);
+ asm volatile(msr mair_el2, %0
+: : r (MEMORY_ATTRIBUTES) : memory);
+ } else {
asm volatile(msr ttbr0_el3, %0
: : r (gd-arch.tlb_addr) : memory);
+ asm volatile(msr tcr_el3, %0
+: : r (TCR_FLAGS | TCR_EL2_IPS_BITS)
+: memory);
+ asm volatile(msr mair_el3, %0
+: : r (MEMORY_ATTRIBUTES) : memory);
+ }
/* enable the mmu */
set_sctlr(get_sctlr() | CR_M);
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index bcc2603..90daa4d 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -128,28 +128,6 @@ ENTRY(c_runtime_cpu_setup)
isb sy
#endif
-#ifndef CONFIG_SYS_DCACHE_OFF
- /*
-* Setup MAIR and TCR.
-*/
- ldr x0, =MEMORY_ATTRIBUTES
- ldr x1, =TCR_FLAGS
-
- switch_el x2, 3f, 2f, 1f
-3: orr x1, x1, TCR_EL3_IPS_BITS
- msr mair_el3, x0
- msr tcr_el3, x1
- b 0f
-2: orr x1, x1, TCR_EL2_IPS_BITS
- msr mair_el2, x0
- msr tcr_el2, x1
- b 0f
-1: orr x1, x1, TCR_EL1_IPS_BITS
- msr mair_el1, x0
- msr tcr_el1, x1
-0:
-#endif
-
/* Relocate vBAR */
adr x0, vectors
switch_el x1, 3f, 2f, 1f
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Patch v2 3/3] armv8/cache: Change cache invalidate and flush function
When SoC first boots up, we should invalidate the cache but not flush it.
We can use the same function for invalid and flush mostly, with a wrapper.
Invalidating large cache can ben slow on emulator, so we postpone doing
so until I-cache is enabled, and before enabling D-cache.
Signed-off-by: York Sun york...@freescale.com
CC: David Feng feng...@phytium.com.cn
---
Changed since v1:
v2: Move calling __asm_invalidate_icache_all from start.S to icache_enable()
Remove calling __asm_invalidate_tlb_all from start.S
arch/arm/cpu/armv8/cache.S| 53 +
arch/arm/cpu/armv8/cache_v8.c |3 ++-
arch/arm/cpu/armv8/start.S| 10
arch/arm/include/asm/system.h |1 +
4 files changed, 47 insertions(+), 20 deletions(-)
diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S
index 546a83e..249799c 100644
--- a/arch/arm/cpu/armv8/cache.S
+++ b/arch/arm/cpu/armv8/cache.S
@@ -19,11 +19,12 @@
* clean and invalidate one level cache.
*
* x0: cache level
- * x1~x9: clobbered
+ * x1: 0 flush invalidate, 1 invalidate only
+ * x2~x9: clobbered
*/
ENTRY(__asm_flush_dcache_level)
- lsl x1, x0, #1
- msr csselr_el1, x1 /* select cache level */
+ lsl x12, x0, #1
+ msr csselr_el1, x12 /* select cache level */
isb /* sync change of cssidr_el1 */
mrs x6, ccsidr_el1 /* read the new cssidr_el1 */
and x2, x6, #7 /* x2 - log2(cache line size)-4 */
@@ -35,7 +36,7 @@ ENTRY(__asm_flush_dcache_level)
clz w5, w4 /* bit position of #ways */
mov x4, #0x7fff
and x4, x4, x6, lsr #13 /* x4 - max number of #sets */
- /* x1 - cache level 1 */
+ /* x12 - cache level 1 */
/* x2 - line length offset */
/* x3 - number of cache ways - 1 */
/* x4 - number of cache sets - 1 */
@@ -45,11 +46,14 @@ loop_set:
mov x6, x3 /* x6 - working copy of #ways */
loop_way:
lsl x7, x6, x5
- orr x9, x1, x7 /* map way and level to cisw value */
+ orr x9, x12, x7 /* map way and level to cisw value */
lsl x7, x4, x2
orr x9, x9, x7 /* map set number to cisw value */
- dc cisw, x9/* clean invalidate by set/way */
- subsx6, x6, #1 /* decrement the way */
+ tbz w1, #0, 1f
+ dc isw, x9
+ b 2f
+1: dc cisw, x9/* clean invalidate by set/way */
+2: subsx6, x6, #1 /* decrement the way */
b.geloop_way
subsx4, x4, #1 /* decrement the set */
b.geloop_set
@@ -58,11 +62,14 @@ loop_way:
ENDPROC(__asm_flush_dcache_level)
/*
- * void __asm_flush_dcache_all(void)
+ * void __asm_flush_dcache_all(int invalidate_only)
+ *
+ * x0: 0 flush invalidate, 1 invalidate only
*
* clean and invalidate all data cache by SET/WAY.
*/
-ENTRY(__asm_flush_dcache_all)
+ENTRY(__asm_dcache_all)
+ mov x1, x0
dsb sy
mrs x10, clidr_el1 /* read clidr_el1 */
lsr x11, x10, #24
@@ -76,13 +83,13 @@ ENTRY(__asm_flush_dcache_all)
/* x15 - return address */
loop_level:
- lsl x1, x0, #1
- add x1, x1, x0 /* x0 - tripled cache level */
- lsr x1, x10, x1
- and x1, x1, #7 /* x1 - cache type */
- cmp x1, #2
+ lsl x12, x0, #1
+ add x12, x12, x0/* x0 - tripled cache level */
+ lsr x12, x10, x12
+ and x12, x12, #7/* x12 - cache type */
+ cmp x12, #2
b.ltskip/* skip if no cache or icache */
- bl __asm_flush_dcache_level
+ bl __asm_flush_dcache_level/* x1 = 0 flush, 1 invalidate */
skip:
add x0, x0, #1 /* increment cache level */
cmp x11, x0
@@ -96,8 +103,24 @@ skip:
finished:
ret
+ENDPROC(__asm_dcache_all)
+
+ENTRY(__asm_flush_dcache_all)
+ mov x16, lr
+ mov x0, #0
+ bl __asm_dcache_all
+ mov lr, x16
+ ret
ENDPROC(__asm_flush_dcache_all)
+ENTRY(__asm_invalidate_dcache_all)
+ mov x16, lr
+ mov x0, #0x
+ bl __asm_dcache_all
+ mov lr, x16
+ ret
+ENDPROC(__asm_invalidate_dcache_all)
+
/*
* void __asm_flush_dcache_range(start, end)
*
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 7acae1b..a96ecda 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -80,7 +80,7 @@ static void mmu_setup(void)
*/
void invalidate_dcache_all(void)
{
- __asm_flush_dcache_all();
+ __asm_invalidate_dcache_all();
}
/*
@@ -177,6
[U-Boot] Pull request: u-boot-arm/master
Hi Tom, The following changes since commit 3e11350255d9c5d4bd03c2a65769da84c05d3294: Merge branch 'u-boot/master' into 'u-boot-arm/master' (2014-02-20 13:16:05 +0100) are available in the git repository at: git://git.denx.de/u-boot-arm master for you to fetch changes up to 1551df35f296f0a8df32f4f2054254f46e8be252: arm: Switch to -mno-unaligned-access when supported by the compiler (2014-02-26 21:19:32 +0100) Albert ARIBAUD (4): Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' cm_t335: fix linker file to produce full ELF arm: make _end compiler-generated arm: remove unneeded symbol offsets and _TEXT_BASE Darwin Rambo (6): arch: kona: Initial commit of kona-common architecture code arch: bcm281xx: Initial commit of bcm281xx architecture code gpio: kona: Add Kona gpio driver i2c: kona: Add Kona I2C driver mmc: kona: Add Kona mmc driver board: bcm28155_ap: Add board files Dave Gerlach (1): ARM: AM43xx: GP-EVM: Correct GPIO used for VTT regulator control Hannes Petermaier (2): board: Add support for BR T-Series Motherboard Add support for BR KWB Motherboard Janne Grunau (1): ARM: OMAP4: fix DDR timings for OMAP4430 ES2.0 Lothar Felten (1): am335x: Initial support for Silica Pengwyn board Måns Rullgård (1): ti814x: Fix illegal use of FP ops in clock_ti814x.c Nishanth Menon (2): DRA7: fix ABB efuse offset for OPP_NOM omap4_common: config: remove I2C for SPL mode Stefan Roese (2): arm: omap3: Fix tao3530/omap3_ha SPL boot hangup (GPIO clocks not enabled) arm: omap: cm_t35: Remove CONFIG_SYS_BOOTMAPSZ to fix FDT Linux booting Stefano Babic (3): OMAP3: add missing gpio clock init and fix NAND SPL for mcx board omap3: fix pinmux for mcx board OMAP3: fix default environment for mcx board Stephen Warren (4): pxe: allow compilation when !defined(CONFIG_CMD_NET) ARM: rpi_b: convert to use distro defaults ARM: rpi_b: load /uEnv.txt from MMC at startup ARM: rpi_b: rework boot scripts, enable sysboot Tom Rini (5): am335x_evm: Enable GPT commands am43xx_evm: Enable GPT commands dra7xx_evm: Enable GPT commands checkpatch.pl: Add warning for new __packed additions arm: Switch to -mno-unaligned-access when supported by the compiler README | 8 +- arch/arm/cpu/arm1136/start.S | 27 - arch/arm/cpu/arm1136/u-boot-spl.lds| 6 +- arch/arm/cpu/arm1176/start.S | 27 - arch/arm/cpu/arm720t/start.S | 26 - arch/arm/cpu/arm920t/ep93xx/u-boot.lds | 5 +- arch/arm/cpu/arm920t/start.S | 26 - arch/arm/cpu/arm926ejs/at91/lowlevel_init.S| 14 +-- arch/arm/cpu/arm926ejs/mxs/start.S | 27 - arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds | 9 +- arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds| 9 +- arch/arm/cpu/arm926ejs/start.S | 27 - arch/arm/cpu/arm946es/start.S | 26 - arch/arm/cpu/arm_intcm/start.S | 26 - arch/arm/cpu/armv7/Makefile| 1 + arch/arm/cpu/armv7/am33xx/board.c | 6 +- arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 2 + arch/arm/cpu/armv7/am33xx/clock_ti814x.c | 5 +- arch/arm/cpu/armv7/am33xx/u-boot-spl.lds | 6 +- arch/arm/cpu/armv7/bcm281xx/Makefile | 11 ++ arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 523 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 52 + arch/arm/cpu/armv7/bcm281xx/clk-core.c | 513 +++ arch/arm/cpu/armv7/bcm281xx/clk-core.h | 495 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 73 arch/arm/cpu/armv7/bcm281xx/reset.c| 27 + arch/arm/cpu/armv7/config.mk | 7 +- arch/arm/cpu/armv7/kona-common/Makefile| 9 ++ arch/arm/cpu/armv7/kona-common/clk-stubs.c | 21 arch/arm/cpu/armv7/kona-common/hwinit-common.c | 16 +++ arch/arm/cpu/armv7/kona-common/s_init.c| 12 ++ arch/arm/cpu/armv7/omap-common/u-boot-spl.lds | 6 +- arch/arm/cpu/armv7/omap3/lowlevel_init.S | 3 - arch/arm/cpu/armv7/omap4/hw_data.c | 18 +++ arch/arm/cpu/armv7/omap5/prcm-regs.c | 2 +- arch/arm/cpu/armv7/socfpga/u-boot-spl.lds | 6 +- arch/arm/cpu/armv7/start.S | 23 arch/arm/cpu/armv7/zynq/u-boot.lds | 7 +- arch/arm/cpu/armv8/config.mk | 5 +- arch/arm/cpu/at91-common/u-boot-spl.lds
Re: [U-Boot] [Patch v2 1/3] armv8/cache: Consolidate setting for MAIR and TCR
Hi York, On Wed, 26 Feb 2014 13:26:02 -0800, York Sun york...@freescale.com wrote: Move setting for MAIR and TCR to cache_v8.c, to avoid conflict with sub-architecture. Signed-off-by: York Sun york...@freescale.com CC: David Feng feng...@phytium.com.cn --- Changed since v1 v1: Acked-by: David Feng feng...@phytium.com.cn v2: No change. Didn't a v3 already hit the list, and shouldn't this series be v4? Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 8/8] arm64: Do not double -mstrict-align option
Hi Tom, On Wed, 26 Feb 2014 08:55:43 -0500, Tom Rini tr...@ti.com wrote: On Wed, Feb 26, 2014 at 02:51:05PM +0900, Masahiro Yamada wrote: Seeing arch/arm/cpu/armv8/config.mk, -mstrict-align option was added to both PLATFORM_NO_UNALIGNED and PLATFORM_CPPFLAGS. $(PLATFORM_CPPFLAGS) is given to all compiled objects. Adding the same option to also PLATFORM_NO_UNALIGNED is redundant. For example, common/hush.o was compiled with double -mstrict-align. You can comfirm it by checking common/.hush.o.cmd file. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Cc: David Feng feng...@phytium.com.cn Cc: Albert ARIBAUD albert.u.b...@aribaud.net Cc: Tom Rini tr...@ti.com With the v3 series about unaligned bits this patch should no longer be needed. Hmm... This patch is about not repeating -mstrict-align twice, which is a bug unrelated with switching to -mno-unaligned-access. Besides, -mstrict-align means Don't assume that unaligned accesses are handled, which I think is for aarch64 what -mno-unaligned-access is for arm(32), so it *should* be specified. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [Patch v2 1/3] armv8/cache: Consolidate setting for MAIR and TCR
On 02/26/2014 01:53 PM, Albert ARIBAUD wrote: Hi York, On Wed, 26 Feb 2014 13:26:02 -0800, York Sun york...@freescale.com wrote: Move setting for MAIR and TCR to cache_v8.c, to avoid conflict with sub-architecture. Signed-off-by: York Sun york...@freescale.com CC: David Feng feng...@phytium.com.cn --- Changed since v1 v1: Acked-by: David Feng feng...@phytium.com.cn v2: No change. Didn't a v3 already hit the list, and shouldn't this series be v4? Really? I don't recall. Did I leak an internal review patch to the list? Previous version is http://patchwork.ozlabs.org/patch/319067/ York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 8/8] arm64: Do not double -mstrict-align option
On Wed, Feb 26, 2014 at 10:58:10PM +0100, Albert ARIBAUD wrote: Hi Tom, On Wed, 26 Feb 2014 08:55:43 -0500, Tom Rini tr...@ti.com wrote: On Wed, Feb 26, 2014 at 02:51:05PM +0900, Masahiro Yamada wrote: Seeing arch/arm/cpu/armv8/config.mk, -mstrict-align option was added to both PLATFORM_NO_UNALIGNED and PLATFORM_CPPFLAGS. $(PLATFORM_CPPFLAGS) is given to all compiled objects. Adding the same option to also PLATFORM_NO_UNALIGNED is redundant. For example, common/hush.o was compiled with double -mstrict-align. You can comfirm it by checking common/.hush.o.cmd file. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Cc: David Feng feng...@phytium.com.cn Cc: Albert ARIBAUD albert.u.b...@aribaud.net Cc: Tom Rini tr...@ti.com With the v3 series about unaligned bits this patch should no longer be needed. Hmm... This patch is about not repeating -mstrict-align twice, which is a bug unrelated with switching to -mno-unaligned-access. Besides, -mstrict-align means Don't assume that unaligned accesses are handled, which I think is for aarch64 what -mno-unaligned-access is for arm(32), so it *should* be specified. Yes, but my patch cleaned up the places that set PLATFORM_NO_UNALIGNED so this duplication was dropped. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 8/8] arm64: Do not double -mstrict-align option
Hi Tom, On Wed, 26 Feb 2014 17:03:08 -0500, Tom Rini tr...@ti.com wrote: On Wed, Feb 26, 2014 at 10:58:10PM +0100, Albert ARIBAUD wrote: Hi Tom, On Wed, 26 Feb 2014 08:55:43 -0500, Tom Rini tr...@ti.com wrote: On Wed, Feb 26, 2014 at 02:51:05PM +0900, Masahiro Yamada wrote: Seeing arch/arm/cpu/armv8/config.mk, -mstrict-align option was added to both PLATFORM_NO_UNALIGNED and PLATFORM_CPPFLAGS. $(PLATFORM_CPPFLAGS) is given to all compiled objects. Adding the same option to also PLATFORM_NO_UNALIGNED is redundant. For example, common/hush.o was compiled with double -mstrict-align. You can comfirm it by checking common/.hush.o.cmd file. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Cc: David Feng feng...@phytium.com.cn Cc: Albert ARIBAUD albert.u.b...@aribaud.net Cc: Tom Rini tr...@ti.com With the v3 series about unaligned bits this patch should no longer be needed. Hmm... This patch is about not repeating -mstrict-align twice, which is a bug unrelated with switching to -mno-unaligned-access. Besides, -mstrict-align means Don't assume that unaligned accesses are handled, which I think is for aarch64 what -mno-unaligned-access is for arm(32), so it *should* be specified. Yes, but my patch cleaned up the places that set PLATFORM_NO_UNALIGNED so this duplication was dropped. Oh, ok. My bad, then. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v9 0/14] Driver model implementation, tests, demo and GPIO
This series adds a driver model implementation. It is taken from the driver model code developed by: Marek Vasut ma...@denx.de Pavel Herrmann morpheus.i...@gmail.com Viktor Křivák viktor.kri...@gmail.com Tomas Hlavacek tmshl...@gmail.com Please see doc/driver-model/README.txt for details of how to run this and what to look for. The old driver model documentation is removed. Note: If you are reviewing this code, but don't have a lot of time, please consider starting with the 'demo' driver (patch 'dm: Add a demonstration/example driver') since it clearly shows how devices and uclasses work. Much of this series consists of test code and plumbing, so is of less interest to driver authors. There is also a presentation on driver model at this page: http://www.denx.de/wiki/U-Boot/MiniSummitELCE2013 You can find a test version of the code used here in branch dm9 at: http://git.denx.de/u-boot-x86.git (Branch dm contains the original implementation) Changes in v9: - Move sandbox device tree file into arch/sandbox/dts - Rebase to master - Update comment about GPIO command conversion from numbers to uclass Changes in v8: - Add new patch to fix yaffs compile error on two boards - Adjust simple driver text slightly - Rename simple_ops to shape_ops and fix a typo Changes in v7: - Fix typo in README - Rebase to master - Update Makefile libraries to specify only the directory - Update cover letter to point to ELCE 2013 presentation, etc. Changes in v6: - Add a test script for driver model - Add dev_get_platdata to access devices's platdata - Add dev_get_priv() to access device's private data - Add ofdata_to_pdata method to convert device tree data to platdata - Convert Makefiles to new Kconfig format - Rename platform_data to platdata - Revise and update README - Use ofdata_to_platdata feature - Use ofdata_to_platdata method to convert device tree data to platdata Changes in v5: - Adjust patch to completely remove old driver model documentation - Change to new SPDX license headers - Correct 80col line missed last time - Fix style nit on for() loop Changes in v4: - Change 'dm dump' command to 'dm tree' - Correct 'out.dtb' typo - Move common/dm to drivers/core - Remove duplicated .op line - device_chld_unbind() continues on error Changes in v3: - Add a flag for tracking whether DM allocates/frees platform_data - Add function/struct comments to tests - Add new patch to build a device tree file for sandbox - Add new patch to move driver model documentation - Fix up demo command help - Rename per_device_priv_size to per_device_auto_alloc_size, etc. - Tidy up commenting of functions and structures - Tidy up comments/documentation in GPIO module - Update GPIO support to use new struct member names - Update demo driver to use device tree - Update sandbox GPIO header file comments - Updated README.txt to cover changes since version 2 Changes in v2: - Add GPIO uclass and tests - Add U_BOOT_DEVICE to declare platform_data - Add a single include/dm.h to bring in driver model code - Add auto-probing feature for platform_data to avoid driver_bind() calls - Add automatic allocation of device-specific priv data for uclasses - Add automatic allocation of platform_data for FDT - Add automatic allocation of priv data for devices - Add device tree support in driver model - Add dm_warn() to warn about impending doom - Add integration tests for driver model - Add new header file for lists - Add new util file to hold utility functions - Add sandbox GPIO driver - Add script to run tests - Add simple unit test functions - Add test infrastructure for driver model - Add tests for core code - Allow a driver to bind to only one uclass - Allow driver_bind() to support a NULL parent - Put platform_data definitions in their own header file - Remove relocation functions - Remove unneeded arguments to uclass_bind(), uclass_unbind() - Removed pointer return values in favour of integer - Rename data structures to hopefully be clearer - Rename struct device's 'bus' to 'parent' - Standardise variable names (e.g. uclass instead of class) - Update gpio command to use driver model - Use driver_bind() in dm_init() instead of writing new code Simon Glass (14): sandbox: Build a device tree file for sandbox Add cmd_process_error() to report and process errors yaffs: Remove private list implementation dm: Add README for driver model dm: Add base driver model support sandbox: config: Enable driver model dm: Set up driver model after relocation dm: Add basic tests dm: Add a 'dm' command for testing dm: Add a demonstration/example driver dm: Add GPIO support and tests sandbox: Convert GPIOs to use driver model dm: Enable gpio command to support driver model dm: Remove old driver model documentation Makefile | 4 + arch/sandbox/config.mk| 2 + arch/sandbox/dts/Makefile | 11 + arch/sandbox/dts/sandbox.dts | 20 ++ arch/sandbox/include/asm/gpio.h | 14
[U-Boot] [PATCH v9 11/14] dm: Add GPIO support and tests
Add driver model support for GPIOs. Since existing GPIO drivers do not use
driver model, this feature must be enabled by CONFIG_DM_GPIO. After all
GPO drivers are converted over we can perhaps remove this config.
Tests are provided for the sandbox implementation, and are a sufficient
sanity check for basic operation.
The GPIO uclass understands the concept of named banks of GPIOs, with each
GPIO device providing a single bank. Within each bank the GPIOs are numbered
using an offset from 0 to n-1. For example a bank named 'b' with 20
offsets will provide GPIOs named b0 to b19.
Anonymous GPIO banks are also supported, and are just numbered without any
prefix.
Each time a GPIO driver is added to the uclass, the GPIOs are renumbered
accordinging, so there is always a global GPIO numbering order.
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Marek Vasut ma...@denx.de
Signed-off-by: Pavel Herrmann morpheus.i...@gmail.com
Signed-off-by: Viktor Křivák viktor.kri...@gmail.com
Signed-off-by: Tomas Hlavacek tmshl...@gmail.com
---
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
- Rename platform_data to platdata
Changes in v5:
- Change to new SPDX license headers
Changes in v4: None
Changes in v3:
- Tidy up comments/documentation in GPIO module
- Update GPIO support to use new struct member names
Changes in v2: None
drivers/gpio/Makefile | 2 +
drivers/gpio/gpio-uclass.c | 266 +
include/asm-generic/gpio.h | 104 ++
test/dm/gpio.c | 111 +++
4 files changed, 483 insertions(+)
create mode 100644 drivers/gpio/gpio-uclass.c
create mode 100644 test/dm/gpio.c
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index b903c45..cd581e8 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -5,6 +5,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
+obj-$(CONFIG_DM_GPIO) += gpio-uclass.o
+
obj-$(CONFIG_AT91_GPIO)+= at91_gpio.o
obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o
obj-$(CONFIG_KIRKWOOD_GPIO)+= kw_gpio.o
diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c
new file mode 100644
index 000..56bfd11
--- /dev/null
+++ b/drivers/gpio/gpio-uclass.c
@@ -0,0 +1,266 @@
+/*
+ * Copyright (c) 2013 Google, Inc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include dm.h
+#include errno.h
+#include asm/gpio.h
+
+/**
+ * gpio_to_device() - Convert global GPIO number to device, number
+ * gpio: The numeric representation of the GPIO
+ *
+ * Convert the GPIO number to an entry in the list of GPIOs
+ * or GPIO blocks registered with the GPIO controller. Returns
+ * entry on success, NULL on error.
+ */
+static int gpio_to_device(unsigned int gpio, struct device **devp,
+ unsigned int *offset)
+{
+ struct gpio_dev_priv *uc_priv;
+ struct device *dev;
+ int ret;
+
+ for (ret = uclass_first_device(UCLASS_GPIO, dev);
+dev;
+ret = uclass_next_device(dev)) {
+ uc_priv = dev-uclass_priv;
+ if (gpio = uc_priv-gpio_base
+ gpio uc_priv-gpio_base + uc_priv-gpio_count) {
+ *devp = dev;
+ *offset = gpio - uc_priv-gpio_base;
+ return 0;
+ }
+ }
+
+ /* No such GPIO */
+ return ret ? ret : -EINVAL;
+}
+
+int gpio_lookup_name(const char *name, struct device **devp,
+unsigned int *offsetp, unsigned int *gpiop)
+{
+ struct gpio_dev_priv *uc_priv;
+ struct device *dev;
+ int ret;
+
+ if (devp)
+ *devp = NULL;
+ for (ret = uclass_first_device(UCLASS_GPIO, dev);
+dev;
+ret = uclass_next_device(dev)) {
+ ulong offset;
+ int len;
+
+ uc_priv = dev-uclass_priv;
+ len = uc_priv-bank_name ? strlen(uc_priv-bank_name) : 0;
+
+ if (!strncmp(name, uc_priv-bank_name, len)) {
+ if (strict_strtoul(name + len, 10, offset))
+ continue;
+ if (devp)
+ *devp = dev;
+ if (offsetp)
+ *offsetp = offset;
+ if (gpiop)
+ *gpiop = uc_priv-gpio_base + offset;
+ return 0;
+ }
+ }
+
+ return ret ? ret : -EINVAL;
+}
+
+/**
+ * gpio_request() - [COMPAT] Request GPIO
+ * gpio: GPIO number
+ * label: Name for the requested GPIO
+ *
+ * This function implements the API that's compatible with current
+ * GPIO API used in U-Boot. The request is forwarded to particular
+ * GPIO driver. Returns 0 on success, negative value on error.
+ */
+int gpio_request(unsigned gpio, const char *label)
+{
+ unsigned int
[U-Boot] [PATCH v9 02/14] Add cmd_process_error() to report and process errors
U-Boot now uses errors defined in include/errno.h which are negative
integers. Commands which fail need to report the error and return 1
to indicate failure. Add this functionality in cmd_process_error().
For now this merely reports the error number. It would be possible
also to produce a helpful error message by storing the error strings
in U-Boot.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
common/command.c | 10 ++
include/command.h | 9 +
2 files changed, 19 insertions(+)
diff --git a/common/command.c b/common/command.c
index 597ab4c..26c37f2 100644
--- a/common/command.c
+++ b/common/command.c
@@ -538,3 +538,13 @@ enum command_ret_t cmd_process(int flag, int argc, char *
const argv[],
rc = cmd_usage(cmdtp);
return rc;
}
+
+int cmd_process_error(cmd_tbl_t *cmdtp, int err)
+{
+ if (err) {
+ printf(Command '%s' failed: Error %d\n, cmdtp-name, err);
+ return 1;
+ }
+
+ return 0;
+}
diff --git a/include/command.h b/include/command.h
index f782779..d3f700f 100644
--- a/include/command.h
+++ b/include/command.h
@@ -64,6 +64,15 @@ extern int var_complete(int argc, char * const argv[], char
last_char, int maxv,
extern int cmd_auto_complete(const char *const prompt, char *buf, int *np, int
*colp);
#endif
+/**
+ * cmd_process_error() - report and process a possible error
+ *
+ * @cmdtp: Command which caused the error
+ * @err: Error code (0 if none, -ve for error, like -EIO)
+ * @return 0 if there is not error, 1 (CMD_RET_FAILURE) if an error is found
+ */
+int cmd_process_error(cmd_tbl_t *cmdtp, int err);
+
/*
* Monitor Command
*
--
1.9.0.rc1.175.g0b1dcb5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v9 04/14] dm: Add README for driver model
This adds a README to help with understanding of this series. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v9: - Rebase to master Changes in v8: - Adjust simple driver text slightly Changes in v7: - Fix typo in README - Rebase to master - Update cover letter to point to ELCE 2013 presentation, etc. Changes in v6: - Rename platform_data to platdata - Revise and update README Changes in v5: None Changes in v4: None Changes in v3: - Updated README.txt to cover changes since version 2 Changes in v2: - Add GPIO uclass and tests - Add U_BOOT_DEVICE to declare platform_data - Add a single include/dm.h to bring in driver model code - Add auto-probing feature for platform_data to avoid driver_bind() calls - Add automatic allocation of device-specific priv data for uclasses - Add automatic allocation of platform_data for FDT - Add automatic allocation of priv data for devices - Add device tree support in driver model - Add dm_warn() to warn about impending doom - Add integration tests for driver model - Add new header file for lists - Add new util file to hold utility functions - Add sandbox GPIO driver - Add script to run tests - Add simple unit test functions - Add test infrastructure for driver model - Add tests for core code - Allow a driver to bind to only one uclass - Allow driver_bind() to support a NULL parent - Put platform_data definitions in their own header file - Remove relocation functions - Remove unneeded arguments to uclass_bind(), uclass_unbind() - Removed pointer return values in favour of integer - Rename data structures to hopefully be clearer - Rename struct device's 'bus' to 'parent' - Standardise variable names (e.g. uclass instead of class) - Update gpio command to use driver model - Use driver_bind() in dm_init() instead of writing new code doc/driver-model/README.txt | 368 1 file changed, 368 insertions(+) create mode 100644 doc/driver-model/README.txt diff --git a/doc/driver-model/README.txt b/doc/driver-model/README.txt new file mode 100644 index 000..e0b395a --- /dev/null +++ b/doc/driver-model/README.txt @@ -0,0 +1,368 @@ +Driver Model + + +This README contains high-level information about driver model, a unified +way of declaring and accessing drivers in U-Boot. The original work was done +by: + + Marek Vasut ma...@denx.de + Pavel Herrmann morpheus.i...@gmail.com + Viktor Křivák viktor.kri...@gmail.com + Tomas Hlavacek tmshl...@gmail.com + +This has been both simplified and extended into the current implementation +by: + + Simon Glass s...@chromium.org + + +Terminology +--- + +Uclass - a group of devices which operate in the same way. A uclass provides + a way of accessing invidual devices within the group, but always + using the same interface. For example a GPIO uclass provides + operations for get/set value. An I2C uclass may have 10 I2C ports, + 4 with one driver, and 6 with another. + +Driver - some code which talks to a peripheral and presents a higher-level + interface to it. + +Device - an instance of a driver, tied to a particular port or peripheral. + + +How to try it +- + +Build U-Boot sandbox and run it: + + make sandbox_config + make + ./u-boot + + (type 'reset' to exit U-Boot) + + +There is a uclass called 'demo'. This uclass handles +saying hello, and reporting its status. There are two drivers in this +uclass: + + - simple: Just prints a message for hello, doesn't implement status + - shape: Prints shapes and reports number of characters printed as status + +The demo class is pretty simple, but not trivial. The intention is that it +can be used for testing, so it will implement all driver model features and +provide good code coverage of them. It does have multiple drivers, it +handles parameter data and platdata (data which tells the driver how +to operate on a particular platform) and it uses private driver data. + +To try it, see the example session below: + +=demo hello 1 +Hello '@' from 07981110: red 4 +=demo status 2 +Status: 0 +=demo hello 2 +g +r@ +e@@ +e@@@ +n +g@ +=demo status 2 +Status: 21 +=demo hello 4 ^ + y^^^ + e^ +l^^^ +l^^^ + o^ + w^^^ +=demo status 4 +Status: 36 += + + +Running the tests +- + +The intent with driver model is that the core portion has 100% test coverage +in sandbox, and every uclass has its own test. As a move towards this, tests +are provided in test/dm. To run them, try: + + ./test/dm/test-dm.sh + +You should see something like this: + +...U-Boot banner... +Running 12 driver model tests +Test: dm_test_autobind +Test: dm_test_autoprobe +Test: dm_test_children +Test: dm_test_fdt +Test: dm_test_gpio +sandbox_gpio: sb_gpio_get_value: error: offset 4 not reserved +Test: dm_test_leak +Warning: Please add '#define DEBUG' to the top of common/dlmalloc.c +Warning: Please add '#define DEBUG' to the
[U-Boot] [PATCH v9 12/14] sandbox: Convert GPIOs to use driver model
Convert sandbox over to use driver model GPIOs.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
- Rename platform_data to platdata
- Use ofdata_to_platdata feature
Changes in v5: None
Changes in v4: None
Changes in v3:
- Update sandbox GPIO header file comments
Changes in v2: None
arch/sandbox/include/asm/gpio.h | 14 +--
board/sandbox/sandbox/sandbox.c | 7 +-
drivers/gpio/sandbox.c | 217 +---
include/configs/sandbox.h | 1 +
4 files changed, 151 insertions(+), 88 deletions(-)
diff --git a/arch/sandbox/include/asm/gpio.h b/arch/sandbox/include/asm/gpio.h
index afb9c78..95b59da 100644
--- a/arch/sandbox/include/asm/gpio.h
+++ b/arch/sandbox/include/asm/gpio.h
@@ -29,7 +29,7 @@
* @param gp GPIO number
* @return -1 on error, 0 if GPIO is low, 0 if high
*/
-int sandbox_gpio_get_value(unsigned gp);
+int sandbox_gpio_get_value(struct device *dev, unsigned int offset);
/**
* Set the simulated value of a GPIO (used only in sandbox test code)
@@ -38,7 +38,7 @@ int sandbox_gpio_get_value(unsigned gp);
* @param valuevalue to set (0 for low, non-zero for high)
* @return -1 on error, 0 if ok
*/
-int sandbox_gpio_set_value(unsigned gp, int value);
+int sandbox_gpio_set_value(struct device *dev, unsigned int offset, int value);
/**
* Return the simulated direction of a GPIO (used only in sandbox test code)
@@ -46,7 +46,7 @@ int sandbox_gpio_set_value(unsigned gp, int value);
* @param gp GPIO number
* @return -1 on error, 0 if GPIO is input, 0 if output
*/
-int sandbox_gpio_get_direction(unsigned gp);
+int sandbox_gpio_get_direction(struct device *dev, unsigned int offset);
/**
* Set the simulated direction of a GPIO (used only in sandbox test code)
@@ -55,11 +55,7 @@ int sandbox_gpio_get_direction(unsigned gp);
* @param output 0 to set as input, 1 to set as output
* @return -1 on error, 0 if ok
*/
-int sandbox_gpio_set_direction(unsigned gp, int output);
-
-/* Display information about each GPIO */
-void gpio_info(void);
-
-#define gpio_status() gpio_info()
+int sandbox_gpio_set_direction(struct device *dev, unsigned int offset,
+ int output);
#endif
diff --git a/board/sandbox/sandbox/sandbox.c b/board/sandbox/sandbox/sandbox.c
index 95efaff..2f90df5 100644
--- a/board/sandbox/sandbox/sandbox.c
+++ b/board/sandbox/sandbox/sandbox.c
@@ -4,7 +4,7 @@
*/
#include common.h
-
+#include dm.h
#include os.h
/*
@@ -14,6 +14,11 @@
*/
gd_t *gd;
+/* Add a simple GPIO device */
+U_BOOT_DEVICE(gpio_sandbox) = {
+ .name = gpio_sandbox,
+};
+
void flush_cache(unsigned long start, unsigned long size)
{
}
diff --git a/drivers/gpio/sandbox.c b/drivers/gpio/sandbox.c
index 3c6cfec..22b6a5f 100644
--- a/drivers/gpio/sandbox.c
+++ b/drivers/gpio/sandbox.c
@@ -4,8 +4,13 @@
*/
#include common.h
+#include dm.h
+#include fdtdec.h
+#include malloc.h
#include asm/gpio.h
+DECLARE_GLOBAL_DATA_PTR;
+
/* Flags for each GPIO */
#define GPIOF_OUTPUT (1 0)/* Currently set as an output */
#define GPIOF_HIGH (1 1)/* Currently set high */
@@ -16,34 +21,30 @@ struct gpio_state {
u8 flags; /* flags (GPIOF_...) */
};
-/*
- * State of GPIOs
- * TODO: Put this into sandbox state
- */
-static struct gpio_state state[CONFIG_SANDBOX_GPIO_COUNT];
-
/* Access routines for GPIO state */
-static u8 *get_gpio_flags(unsigned gp)
+static u8 *get_gpio_flags(struct device *dev, unsigned offset)
{
- /* assert()'s could be disabled, so make sure we handle that */
- assert(gp ARRAY_SIZE(state));
- if (gp = ARRAY_SIZE(state)) {
+ struct gpio_dev_priv *uc_priv = dev-uclass_priv;
+ struct gpio_state *state = dev_get_priv(dev);
+
+ if (offset = uc_priv-gpio_count) {
static u8 invalid_flags;
- printf(sandbox_gpio: error: invalid gpio %u\n, gp);
+ printf(sandbox_gpio: error: invalid gpio %u\n, offset);
return invalid_flags;
}
- return state[gp].flags;
+ return state[offset].flags;
}
-static int get_gpio_flag(unsigned gp, int flag)
+static int get_gpio_flag(struct device *dev, unsigned offset, int flag)
{
- return (*get_gpio_flags(gp) flag) != 0;
+ return (*get_gpio_flags(dev, offset) flag) != 0;
}
-static int set_gpio_flag(unsigned gp, int flag, int value)
+static int set_gpio_flag(struct device *dev, unsigned offset, int flag,
+int value)
{
- u8 *gpio = get_gpio_flags(gp);
+ u8 *gpio = get_gpio_flags(dev, offset);
if (value)
*gpio |= flag;
@@ -53,11 +54,12 @@ static int set_gpio_flag(unsigned gp, int flag, int value)
return 0;
}
-static int check_reserved(unsigned gpio, const char *func)
+static int check_reserved(struct device *dev, unsigned offset,
+
[U-Boot] [PATCH v9 07/14] dm: Set up driver model after relocation
Make driver model available after relocation, by setting up data structures
and scanning for devices using compiled-in platform_data and (when available)
the device tree.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
- Rename platform_data to platdata
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
common/board_r.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/common/board_r.c b/common/board_r.c
index c2d0763..1f4345b 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -18,6 +18,7 @@
#ifdef CONFIG_HAS_DATAFLASH
#include dataflash.h
#endif
+#include dm.h
#include environment.h
#include fdtdec.h
#if defined(CONFIG_CMD_IDE)
@@ -51,7 +52,9 @@
#ifdef CONFIG_X86
#include asm/init_helpers.h
#endif
+#include dm/root.h
#include linux/compiler.h
+#include linux/err.h
DECLARE_GLOBAL_DATA_PTR;
@@ -263,6 +266,33 @@ static int initr_malloc(void)
return 0;
}
+#ifdef CONFIG_DM
+static int initr_dm(void)
+{
+ int ret;
+
+ ret = dm_init();
+ if (ret) {
+ debug(dm_init() failed: %d\n, ret);
+ return ret;
+ }
+ ret = dm_scan_platdata();
+ if (ret) {
+ debug(dm_scan_platdata() failed: %d\n, ret);
+ return ret;
+ }
+#ifdef CONFIG_OF_CONTROL
+ ret = dm_scan_fdt(gd-fdt_blob);
+ if (ret) {
+ debug(dm_scan_fdt() failed: %d\n, ret);
+ return ret;
+ }
+#endif
+
+ return 0;
+}
+#endif
+
__weak int power_init_board(void)
{
return 0;
@@ -761,6 +791,9 @@ init_fnc_t init_sequence_r[] = {
initr_barrier,
initr_malloc,
bootstage_relocate,
+#ifdef CONFIG_DM
+ initr_dm,
+#endif
#ifdef CONFIG_ARCH_EARLY_INIT_R
arch_early_init_r,
#endif
--
1.9.0.rc1.175.g0b1dcb5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v9 06/14] sandbox: config: Enable driver model
Use driver model in sandbox to permit running of driver model unit test. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None include/configs/sandbox.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index fbb9791..9cdfcc7 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -20,6 +20,7 @@ #define CONFIG_BOOTSTAGE #define CONFIG_BOOTSTAGE_REPORT +#define CONFIG_DM /* Number of bits in a C 'long' on this architecture */ #define CONFIG_SANDBOX_BITS_PER_LONG 64 -- 1.9.0.rc1.175.g0b1dcb5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v9 09/14] dm: Add a 'dm' command for testing
This command is not required for driver model operation, but can be useful
for testing. It provides simple dumps of internal data structures.
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Marek Vasut ma...@denx.de
Signed-off-by: Pavel Herrmann morpheus.i...@gmail.com
Signed-off-by: Viktor Křivák viktor.kri...@gmail.com
Signed-off-by: Tomas Hlavacek tmshl...@gmail.com
---
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5:
- Change to new SPDX license headers
Changes in v4:
- Change 'dm dump' command to 'dm tree'
Changes in v3: None
Changes in v2: None
include/configs/sandbox.h | 1 +
test/dm/Makefile | 1 +
test/dm/cmd_dm.c | 133 ++
3 files changed, 135 insertions(+)
create mode 100644 test/dm/cmd_dm.c
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index c9c8509..8e034a7 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -21,6 +21,7 @@
#define CONFIG_BOOTSTAGE
#define CONFIG_BOOTSTAGE_REPORT
#define CONFIG_DM
+#define CONFIG_CMD_DM
#define CONFIG_DM_TEST
/* Number of bits in a C 'long' on this architecture */
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 6af85b9..4e9afe6 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -4,6 +4,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
+obj-$(CONFIG_CMD_DM) += cmd_dm.o
obj-$(CONFIG_DM_TEST) += test-driver.o
obj-$(CONFIG_DM_TEST) += test-fdt.o
obj-$(CONFIG_DM_TEST) += test-main.o
diff --git a/test/dm/cmd_dm.c b/test/dm/cmd_dm.c
new file mode 100644
index 000..a03fe20
--- /dev/null
+++ b/test/dm/cmd_dm.c
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2013 Google, Inc
+ *
+ * (C) Copyright 2012
+ * Marek Vasut ma...@denx.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include dm.h
+#include malloc.h
+#include errno.h
+#include asm/io.h
+#include dm/root.h
+#include dm/test.h
+#include dm/uclass-internal.h
+
+static int display_succ(struct device *in, char *buf)
+{
+ int len;
+ int ip = 0;
+ char local[16];
+ struct device *pos, *n, *prev = NULL;
+
+ printf(%s- %s @ %08x, buf, in-name, map_to_sysmem(in));
+ if (in-flags DM_FLAG_ACTIVATED)
+ puts( - activated);
+ puts(\n);
+
+ if (list_empty(in-child_head))
+ return 0;
+
+ len = strlen(buf);
+ strncpy(local, buf, sizeof(local));
+ snprintf(local + len, 2, |);
+ if (len local[len - 1] == '`')
+ local[len - 1] = ' ';
+
+ list_for_each_entry_safe(pos, n, in-child_head, sibling_node) {
+ if (ip++)
+ display_succ(prev, local);
+ prev = pos;
+ }
+
+ snprintf(local + len, 2, `);
+ display_succ(prev, local);
+
+ return 0;
+}
+
+static int dm_dump(struct device *dev)
+{
+ if (!dev)
+ return -EINVAL;
+ return display_succ(dev, );
+}
+
+static int do_dm_dump_all(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ struct device *root;
+
+ root = dm_root();
+ printf(ROOT %08x\n, map_to_sysmem(root));
+ return dm_dump(root);
+}
+
+static int do_dm_dump_uclass(cmd_tbl_t *cmdtp, int flag, int argc,
+char * const argv[])
+{
+ struct uclass *uc;
+ int ret;
+ int id;
+
+ for (id = 0; id UCLASS_COUNT; id++) {
+ struct device *dev;
+
+ ret = uclass_get(id, uc);
+ if (ret)
+ continue;
+
+ printf(uclass %d: %s\n, id, uc-uc_drv-name);
+ for (ret = uclass_first_device(id, dev);
+dev;
+ret = uclass_next_device(dev)) {
+ printf( %s @ %08x:\n, dev-name,
+ map_to_sysmem(dev));
+ }
+ puts(\n);
+ }
+
+ return 0;
+}
+
+static int do_dm_test(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ return dm_test_main();
+}
+
+static cmd_tbl_t test_commands[] = {
+ U_BOOT_CMD_MKENT(tree, 0, 1, do_dm_dump_all, , ),
+ U_BOOT_CMD_MKENT(uclass, 1, 1, do_dm_dump_uclass, , ),
+ U_BOOT_CMD_MKENT(test, 1, 1, do_dm_test, , ),
+};
+
+static int do_dm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ cmd_tbl_t *test_cmd;
+ int ret;
+
+ if (argc != 2)
+ return CMD_RET_USAGE;
+ test_cmd = find_cmd_tbl(argv[1], test_commands,
+ ARRAY_SIZE(test_commands));
+ argc -= 2;
+ argv += 2;
+ if (!test_cmd || argc test_cmd-maxargs)
+ return CMD_RET_USAGE;
+
+ ret = test_cmd-cmd(test_cmd, flag, argc, argv);
+
+ return cmd_process_error(test_cmd, ret);
+}
+
+U_BOOT_CMD(
+ dm, 2, 1, do_dm,
+ Driver
[U-Boot] [PATCH v9 10/14] dm: Add a demonstration/example driver
As an example of how to write a uclass and a driver, provide a demo version
of each, accessible through the 'demo' command.
To use these with driver model, define CONFIG_CMD_DEMO and CONFIG_DM_DEMO.
The two demo drivers are enabled with CONFIG_DM_DEMO_SIMPLE and
CONFIG_DM_DEMO_SHAPE.
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Marek Vasut ma...@denx.de
Signed-off-by: Pavel Herrmann morpheus.i...@gmail.com
Signed-off-by: Viktor Křivák viktor.kri...@gmail.com
Signed-off-by: Tomas Hlavacek tmshl...@gmail.com
---
Changes in v9: None
Changes in v8: None
Changes in v7:
- Update Makefile libraries to specify only the directory
Changes in v6:
- Convert Makefiles to new Kconfig format
- Rename platform_data to platdata
- Use ofdata_to_platdata method to convert device tree data to platdata
Changes in v5:
- Change to new SPDX license headers
Changes in v4:
- Remove duplicated .op line
Changes in v3:
- Fix up demo command help
- Update demo driver to use device tree
Changes in v2: None
Makefile | 1 +
common/Makefile| 1 +
common/cmd_demo.c | 102
drivers/demo/Makefile | 9
drivers/demo/demo-pdata.c | 47 +
drivers/demo/demo-shape.c | 127 +
drivers/demo/demo-simple.c | 47 +
drivers/demo/demo-uclass.c | 58 +
include/configs/sandbox.h | 4 ++
include/dm-demo.h | 36 +
10 files changed, 432 insertions(+)
create mode 100644 common/cmd_demo.c
create mode 100644 drivers/demo/Makefile
create mode 100644 drivers/demo/demo-pdata.c
create mode 100644 drivers/demo/demo-shape.c
create mode 100644 drivers/demo/demo-simple.c
create mode 100644 drivers/demo/demo-uclass.c
create mode 100644 include/dm-demo.h
diff --git a/Makefile b/Makefile
index 1c39071..bf242ff 100644
--- a/Makefile
+++ b/Makefile
@@ -631,6 +631,7 @@ libs-$(CONFIG_API) += api/
libs-$(CONFIG_HAS_POST) += post/
libs-y += test/
libs-y += test/dm/
+libs-$(CONFIG_DM_DEMO) += drivers/demo/
ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610))
libs-y += arch/$(ARCH)/imx-common/
diff --git a/common/Makefile b/common/Makefile
index 6652ad4..fed86d8 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -64,6 +64,7 @@ obj-$(CONFIG_CMD_CONSOLE) += cmd_console.o
obj-$(CONFIG_CMD_CPLBINFO) += cmd_cplbinfo.o
obj-$(CONFIG_DATAFLASH_MMC_SELECT) += cmd_dataflash_mmc_mux.o
obj-$(CONFIG_CMD_DATE) += cmd_date.o
+obj-$(CONFIG_CMD_DEMO) += cmd_demo.o
obj-$(CONFIG_CMD_SOUND) += cmd_sound.o
ifdef CONFIG_4xx
obj-$(CONFIG_CMD_SETGETDCR) += cmd_dcr.o
diff --git a/common/cmd_demo.c b/common/cmd_demo.c
new file mode 100644
index 000..a3bba7f
--- /dev/null
+++ b/common/cmd_demo.c
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2013 Google, Inc
+ *
+ * (C) Copyright 2012
+ * Pavel Herrmann morpheus.i...@gmail.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include dm-demo.h
+#include asm/io.h
+
+struct device *demo_dev;
+
+static int do_demo_hello(cmd_tbl_t *cmdtp, int flag, int argc,
+char * const argv[])
+{
+ int ch = 0;
+
+ if (argc)
+ ch = *argv[0];
+
+ return demo_hello(demo_dev, ch);
+}
+
+static int do_demo_status(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ int status;
+ int ret;
+
+ ret = demo_status(demo_dev, status);
+ if (ret)
+ return ret;
+
+ printf(Status: %d\n, status);
+
+ return 0;
+}
+
+int do_demo_list(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ struct device *dev;
+ int i, ret;
+
+ puts(Demo uclass entries:\n);
+
+ for (i = 0, ret = uclass_first_device(UCLASS_DEMO, dev);
+dev;
+ret = uclass_next_device(dev)) {
+ printf(entry %d - instance %08x, ops %08x, platdata %08x\n,
+ i++, map_to_sysmem(dev),
+ map_to_sysmem(dev-driver-ops),
+ map_to_sysmem(dev_get_platdata(dev)));
+ }
+
+ return cmd_process_error(cmdtp, ret);
+}
+
+static cmd_tbl_t demo_commands[] = {
+ U_BOOT_CMD_MKENT(list, 0, 1, do_demo_list, , ),
+ U_BOOT_CMD_MKENT(hello, 2, 1, do_demo_hello, , ),
+ U_BOOT_CMD_MKENT(status, 1, 1, do_demo_status, , ),
+};
+
+static int do_demo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ cmd_tbl_t *demo_cmd;
+ int devnum = 0;
+ int ret;
+
+ if (argc 2)
+ return CMD_RET_USAGE;
+ demo_cmd = find_cmd_tbl(argv[1], demo_commands,
+ ARRAY_SIZE(demo_commands));
+ argc -= 2;
+ argv += 2;
+ if (!demo_cmd || argc demo_cmd-maxargs)
+ return CMD_RET_USAGE;
+
+ if (argc) {
+ devnum = simple_strtoul(argv[0], NULL, 10);
+
Re: [U-Boot] [PATCH v9 0/14] Driver model implementation, tests, demo and GPIO
Hi Tom, On 26 February 2014 15:59, Simon Glass s...@chromium.org wrote: This series adds a driver model implementation. It is taken from the driver model code developed by: Marek Vasut ma...@denx.de Pavel Herrmann morpheus.i...@gmail.com Viktor Křivák viktor.kri...@gmail.com Tomas Hlavacek tmshl...@gmail.com Please see doc/driver-model/README.txt for details of how to run this and what to look for. The old driver model documentation is removed. FYI, buildman results: ./tools/buildman/buildman -b dm10 -s Summary of 15 commits for 1202 boards (32 threads, 1 job per thread) 01: Revert ext4fs: Add ext4 extent cache for read operations blackfin: + bf609-ezkit m68k: + M54455EVB_a66 M5329AFEE M5249EVB idmr M5208EVBE eb_cpu5282 M54451EVB astro_mcf5373l M54418TWR_serial_rmii M54455EVB_intel M5475FFE M5282EVB M54455EVB_i66 M5475GFE M5253DEMO M54455EVB_stm33 M5485BFE M5485DFE TASREG M5329BFEE M52277EVB M5475EFE M5475CFE cobra5272 M5485AFE M53017EVB M5485HFE M5235EVB M5253EVBE M54418TWR_nand_mii M54418TWR_nand_rmii_lowfreq M5475BFE M54418TWR_nand_rmii M5475DFE M5275EVB M52277EVB_stmicro eb_cpu5282_internal M54451EVB_stmicro M5271EVB M5485GFE M5373EVB M5485EFE M5485FFE M54418TWR M5235EVB_Flash32 M54418TWR_serial_mii M5485CFE M54455EVB M5475AFE M5272C3 powerpc: + MVBLM7 MVSMR sparc: + grsim grsim_leon2 gr_cpci_ax2000 gr_xc3s_1500 gr_ep2s60 sh: + rsk7269 rsk7264 rsk7203 nios2: + nios2-generic PK1C20 microblaze: + microblaze-generic openrisc: + openrisc-generic 02: sandbox: Build a device tree file for sandbox 03: Add cmd_process_error() to report and process errors 04: yaffs: Remove private list implementation 05: dm: Add README for driver model 06: dm: Add base driver model support 07: sandbox: config: Enable driver model 08: dm: Set up driver model after relocation 09: dm: Add basic tests 10: dm: Add a 'dm' command for testing 11: dm: Add a demonstration/example driver 12: dm: Add GPIO support and tests 13: sandbox: Convert GPIOs to use driver model 14: dm: Enable gpio command to support driver model 15: dm: Remove old driver model documentation Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v9 03/14] yaffs: Remove private list implementation
U-Boot already has a list implementation, and files which include both
that and the yaffs implementation will get errors:
In file included from ydirectenv.h:80:0,
from yportenv.h:81,
from yaffs_guts.h:19,
from yaffs_allocator.h:19,
from yaffs_allocator.c:14:
yaffs_list.h:32:8: error: redefinition of ‘struct list_head’
struct list_head {
^
Remove the yaffs implementation.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v9: None
Changes in v8:
- Add new patch to fix yaffs compile error on two boards
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
fs/yaffs2/yaffs_list.h | 126 -
fs/yaffs2/ydirectenv.h | 2 +-
2 files changed, 1 insertion(+), 127 deletions(-)
delete mode 100644 fs/yaffs2/yaffs_list.h
diff --git a/fs/yaffs2/yaffs_list.h b/fs/yaffs2/yaffs_list.h
deleted file mode 100644
index a7afaea..000
--- a/fs/yaffs2/yaffs_list.h
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * YAFFS: Yet another Flash File System . A NAND-flash specific file system.
- *
- * Copyright (C) 2002-2011 Aleph One Ltd.
- * for Toby Churchill Ltd and Brightstar Engineering
- *
- * Created by Charles Manning char...@aleph1.co.uk
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License version 2.1 as
- * published by the Free Software Foundation.
- *
- * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
- */
-
-/*
- * This file is just holds extra declarations of macros that would normally
- * be providesd in the Linux kernel. These macros have been written from
- * scratch but are functionally equivalent to the Linux ones.
- *
- */
-
-#ifndef __YAFFS_LIST_H__
-#define __YAFFS_LIST_H__
-
-
-/*
- * This is a simple doubly linked list implementation that matches the
- * way the Linux kernel doubly linked list implementation works.
- */
-
-struct list_head {
- struct list_head *next; /* next in chain */
- struct list_head *prev; /* previous in chain */
-};
-
-
-/* Initialise a static list */
-#define LIST_HEAD(name) \
-struct list_head name = { (name), (name)}
-
-
-
-/* Initialise a list head to an empty list */
-#define INIT_LIST_HEAD(p) \
-do { \
- (p)-next = (p);\
- (p)-prev = (p); \
-} while (0)
-
-
-/* Add an element to a list */
-static inline void list_add(struct list_head *new_entry,
- struct list_head *list)
-{
- struct list_head *list_next = list-next;
-
- list-next = new_entry;
- new_entry-prev = list;
- new_entry-next = list_next;
- list_next-prev = new_entry;
-
-}
-
-static inline void list_add_tail(struct list_head *new_entry,
-struct list_head *list)
-{
- struct list_head *list_prev = list-prev;
-
- list-prev = new_entry;
- new_entry-next = list;
- new_entry-prev = list_prev;
- list_prev-next = new_entry;
-
-}
-
-
-/* Take an element out of its current list, with or without
- * reinitialising the links.of the entry*/
-static inline void list_del(struct list_head *entry)
-{
- struct list_head *list_next = entry-next;
- struct list_head *list_prev = entry-prev;
-
- list_next-prev = list_prev;
- list_prev-next = list_next;
-
-}
-
-static inline void list_del_init(struct list_head *entry)
-{
- list_del(entry);
- entry-next = entry-prev = entry;
-}
-
-
-/* Test if the list is empty */
-static inline int list_empty(struct list_head *entry)
-{
- return (entry-next == entry);
-}
-
-
-/* list_entry takes a pointer to a list entry and offsets it to that
- * we can find a pointer to the object it is embedded in.
- */
-
-
-#define list_entry(entry, type, member) \
- ((type *)((char *)(entry)-(unsigned long)(((type *)NULL)-member)))
-
-
-/* list_for_each and list_for_each_safe iterate over lists.
- * list_for_each_safe uses temporary storage to make the list delete safe
- */
-
-#define list_for_each(itervar, list) \
- for (itervar = (list)-next; itervar != (list); itervar = itervar-next)
-
-#define list_for_each_safe(itervar, save_var, list) \
- for (itervar = (list)-next, save_var = (list)-next-next; \
- itervar != (list); \
- itervar = save_var, save_var = save_var-next)
-
-
-#endif
diff --git a/fs/yaffs2/ydirectenv.h b/fs/yaffs2/ydirectenv.h
index c2ffbfd..c6614f1 100644
--- a/fs/yaffs2/ydirectenv.h
+++ b/fs/yaffs2/ydirectenv.h
@@ -77,7 +77,7 @@ void yaffs_qsort(void *aa, size_t n, size_t es,
#define YAFFS_ROOT_MODE0666
#define YAFFS_LOSTNFOUND_MODE 0666
-#include yaffs_list.h
+#include linux/list.h
#include yaffsfs.h
--
1.9.0.rc1.175.g0b1dcb5
___
U-Boot mailing list
U-Boot@lists.denx.de
[U-Boot] [PATCH v9 08/14] dm: Add basic tests
Add some tests of driver model functionality. Coverage includes:
- basic init
- binding of drivers to devices using platform_data
- automatic probing of devices when referenced
- availability of platform data to devices
- lifecycle from bind to probe to remove to unbind
- renumbering within a uclass when devices are probed/removed
- calling driver-defined operations
- deactivation of drivers when removed
- memory leak across creation and destruction of drivers/uclasses
- uclass init/destroy methods
- automatic probe/remove of children/parents when needed
This function is enabled for sandbox, using CONFIG_DM_TEST.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v9: None
Changes in v8: None
Changes in v7:
- Update Makefile libraries to specify only the directory
Changes in v6:
- Add a test script for driver model
- Convert Makefiles to new Kconfig format
- Rename platform_data to platdata
- Use ofdata_to_platdata feature
Changes in v5:
- Change to new SPDX license headers
- Fix style nit on for() loop
Changes in v4:
- Correct 'out.dtb' typo
Changes in v3:
- Add function/struct comments to tests
Changes in v2: None
Makefile | 1 +
include/configs/sandbox.h | 1 +
include/dm/test.h | 167 ++
include/dm/ut.h | 95
test/dm/.gitignore| 1 +
test/dm/Makefile | 17 ++
test/dm/core.c| 544 ++
test/dm/test-dm.sh| 7 +
test/dm/test-driver.c | 146 +
test/dm/test-fdt.c| 144
test/dm/test-main.c | 107 +
test/dm/test-uclass.c | 104 +
test/dm/test.dts | 59 +
test/dm/ut.c | 33 +++
14 files changed, 1426 insertions(+)
create mode 100644 include/dm/test.h
create mode 100644 include/dm/ut.h
create mode 100644 test/dm/.gitignore
create mode 100644 test/dm/Makefile
create mode 100644 test/dm/core.c
create mode 100755 test/dm/test-dm.sh
create mode 100644 test/dm/test-driver.c
create mode 100644 test/dm/test-fdt.c
create mode 100644 test/dm/test-main.c
create mode 100644 test/dm/test-uclass.c
create mode 100644 test/dm/test.dts
create mode 100644 test/dm/ut.c
diff --git a/Makefile b/Makefile
index e5870f7..1c39071 100644
--- a/Makefile
+++ b/Makefile
@@ -630,6 +630,7 @@ libs-y += lib/libfdt/
libs-$(CONFIG_API) += api/
libs-$(CONFIG_HAS_POST) += post/
libs-y += test/
+libs-y += test/dm/
ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610))
libs-y += arch/$(ARCH)/imx-common/
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index 9cdfcc7..c9c8509 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -21,6 +21,7 @@
#define CONFIG_BOOTSTAGE
#define CONFIG_BOOTSTAGE_REPORT
#define CONFIG_DM
+#define CONFIG_DM_TEST
/* Number of bits in a C 'long' on this architecture */
#define CONFIG_SANDBOX_BITS_PER_LONG 64
diff --git a/include/dm/test.h b/include/dm/test.h
new file mode 100644
index 000..eeaa2eb
--- /dev/null
+++ b/include/dm/test.h
@@ -0,0 +1,167 @@
+/*
+ * Copyright (c) 2013 Google, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __DM_TEST_H
+#define __DM_TEST_H
+
+#include dm.h
+
+/**
+ * struct dm_test_cdata - configuration data for test instance
+ *
+ * @ping_add: Amonut to add each time we get a ping
+ * @base: Base address of this device
+ */
+struct dm_test_pdata {
+ int ping_add;
+ uint32_t base;
+};
+
+/**
+ * struct test_ops - Operations supported by the test device
+ *
+ * @ping: Ping operation
+ * @dev: Device to operate on
+ * @pingval: Value to ping the device with
+ * @pingret: Returns resulting value from driver
+ * @return 0 if OK, -ve on error
+ */
+struct test_ops {
+ int (*ping)(struct device *dev, int pingval, int *pingret);
+};
+
+/* Operations that our test driver supports */
+enum {
+ DM_TEST_OP_BIND = 0,
+ DM_TEST_OP_UNBIND,
+ DM_TEST_OP_PROBE,
+ DM_TEST_OP_REMOVE,
+
+ /* For uclass */
+ DM_TEST_OP_POST_BIND,
+ DM_TEST_OP_PRE_UNBIND,
+ DM_TEST_OP_POST_PROBE,
+ DM_TEST_OP_PRE_REMOVE,
+ DM_TEST_OP_INIT,
+ DM_TEST_OP_DESTROY,
+
+ DM_TEST_OP_COUNT,
+};
+
+/* Test driver types */
+enum {
+ DM_TEST_TYPE_FIRST = 0,
+ DM_TEST_TYPE_SECOND,
+};
+
+/* The number added to the ping total on each probe */
+#define DM_TEST_START_TOTAL5
+
+/**
+ * struct dm_test_priv - private data for the test devices
+ */
+struct dm_test_priv {
+ int ping_total;
+ int op_count[DM_TEST_OP_COUNT];
+};
+
+/**
+ * struct dm_test_perdev_class_priv - private per-device data for test uclass
+ */
+struct dm_test_uclass_perdev_priv {
+ int base_add;
+};
+
+/**
+ * struct dm_test_uclass_priv - private data for test uclass
+ */
+struct dm_test_uclass_priv {
+ int total_add;
+};
+
+/*
+ * Operation counts for the test driver, used to check that
[U-Boot] [PATCH v9 13/14] dm: Enable gpio command to support driver model
Now that named GPIO banks are supported, along with a way of obtaining
the status of a GPIO (input or output), we can provide an enhanced
GPIO command for driver model. Where the driver provides its own operation
for obtaining the GPIO state, this is used, otherwise a generic version
is sufficient.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v9:
- Update comment about GPIO command conversion from numbers to uclass
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
common/cmd_gpio.c | 129 --
1 file changed, 116 insertions(+), 13 deletions(-)
diff --git a/common/cmd_gpio.c b/common/cmd_gpio.c
index 47eee89..778aa5f 100644
--- a/common/cmd_gpio.c
+++ b/common/cmd_gpio.c
@@ -8,7 +8,7 @@
#include common.h
#include command.h
-
+#include dm.h
#include asm/gpio.h
#ifndef name_to_gpio
@@ -22,25 +22,115 @@ enum gpio_cmd {
GPIO_TOGGLE,
};
+#if defined(CONFIG_DM_GPIO) !defined(gpio_status)
+static const char * const gpio_function[] = {
+ input,
+ output,
+ unknown,
+};
+
+static void show_gpio(struct device *dev, const char *bank_name, int offset)
+{
+ struct dm_gpio_ops *ops = gpio_get_ops(dev);
+ char buf[80];
+ int ret;
+
+ *buf = '\0';
+ if (ops-get_state) {
+ ret = ops-get_state(dev, offset, buf, sizeof(buf));
+ if (ret) {
+ puts(unknown);
+ return;
+ }
+ } else {
+ int func = GPIOF_UNKNOWN;
+ int ret;
+
+ if (ops-get_function) {
+ ret = ops-get_function(dev, offset);
+ if (ret = 0 ret ARRAY_SIZE(gpio_function))
+ func = ret;
+ }
+ sprintf(buf, %s%u: %8s %d, bank_name, offset,
+ gpio_function[func], ops-get_value(dev, offset));
+ }
+
+ puts(buf);
+ puts(\n);
+}
+
+static int do_gpio_status(const char *gpio_name)
+{
+ struct device *dev;
+ int newline = 0;
+ int ret;
+
+ if (gpio_name !*gpio_name)
+ gpio_name = NULL;
+ for (ret = uclass_first_device(UCLASS_GPIO, dev);
+dev;
+ret = uclass_next_device(dev)) {
+ const char *bank_name;
+ int num_bits;
+
+ bank_name = gpio_get_bank_info(dev, num_bits);
+
+ if (!gpio_name || !bank_name ||
+ !strncmp(gpio_name, bank_name, strlen(bank_name))) {
+ const char *p = NULL;
+ int offset;
+
+ if (bank_name) {
+ if (newline)
+ putc('\n');
+ printf(Bank %s:\n, bank_name);
+ }
+ newline = 1;
+ if (gpio_name bank_name) {
+ p = gpio_name + strlen(bank_name);
+ offset = simple_strtoul(p, NULL, 10);
+ show_gpio(dev, bank_name, offset);
+ } else {
+ for (offset = 0; offset num_bits; offset++)
+ show_gpio(dev, bank_name, offset);
+ }
+ }
+ }
+
+ return ret;
+}
+#endif
+
static int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- int gpio;
+ unsigned int gpio;
enum gpio_cmd sub_cmd;
ulong value;
- const char *str_cmd, *str_gpio;
+ const char *str_cmd, *str_gpio = NULL;
+#ifdef CONFIG_DM_GPIO
+ int ret;
+#endif
+ if (argc 2)
+ show_usage:
+ return CMD_RET_USAGE;
+ str_cmd = argv[1];
+ if (argc 2)
+ str_gpio = argv[2];
+ if (!strcmp(str_cmd, status)) {
+ /* Support deprecated gpio_status() */
#ifdef gpio_status
- if (argc == 2 !strcmp(argv[1], status)) {
gpio_status();
return 0;
- }
+#elif defined(CONFIG_DM_GPIO)
+ return cmd_process_error(cmdtp, do_gpio_status(str_gpio));
+#else
+ goto show_usage;
#endif
+ }
- if (argc != 3)
- show_usage:
- return CMD_RET_USAGE;
- str_cmd = argv[1];
- str_gpio = argv[2];
+ if (!str_gpio)
+ goto show_usage;
/* parse the behavior */
switch (*str_cmd) {
@@ -51,11 +141,23 @@ static int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
default: goto show_usage;
}
+#if defined(CONFIG_DM_GPIO)
+ /*
+* TODO(s...@chromium.org): For now we must fit into the existing GPIO
+* framework, so we look up the name here and
Re: [U-Boot] [PATCH] kbuild: post: fix dependency tracking correctly
On 25 February 2014 19:26, Masahiro Yamada yamad...@jp.panasonic.com wrote: $(call if_changed,...) must take FORCE as a prerequite. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v9 01/14] sandbox: Build a device tree file for sandbox
Add support for building a device tree for sandbox's CONFIG_OF_HOSTFILE
option to make it easier to use device tree with sandbox.
This adjusts the Makefile to build a u-boot.dtb file which can be passed
to sandbox U-Boot with:
./u-boot -d u-boot.dtb
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v9:
- Move sandbox device tree file into arch/sandbox/dts
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- Add new patch to build a device tree file for sandbox
Changes in v2: None
Makefile | 1 +
arch/sandbox/config.mk | 2 ++
arch/sandbox/dts/Makefile| 11 +++
arch/sandbox/dts/sandbox.dts | 20
include/configs/sandbox.h| 1 +
5 files changed, 35 insertions(+)
create mode 100644 arch/sandbox/dts/Makefile
create mode 100644 arch/sandbox/dts/sandbox.dts
diff --git a/Makefile b/Makefile
index 0281171..4ff3ef6 100644
--- a/Makefile
+++ b/Makefile
@@ -712,6 +712,7 @@ ALL-$(CONFIG_SPL) += spl/u-boot-spl.bin
ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot.img
ALL-$(CONFIG_TPL) += tpl/u-boot-tpl.bin
ALL-$(CONFIG_OF_SEPARATE) += u-boot.dtb u-boot-dtb.bin
+ALL-$(CONFIG_OF_HOSTFILE) += u-boot.dtb
ifneq ($(CONFIG_SPL_TARGET),)
ALL-$(CONFIG_SPL) += $(CONFIG_SPL_TARGET:%=%)
endif
diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk
index 23b057e..668aa71 100644
--- a/arch/sandbox/config.mk
+++ b/arch/sandbox/config.mk
@@ -11,3 +11,5 @@ __HAVE_ARCH_GENERIC_BOARD := y
cmd_u-boot__ = $(CC) -o $@ -T u-boot.lds \
-Wl,--start-group $(u-boot-main) -Wl,--end-group \
$(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot.map
+
+CONFIG_ARCH_DEVICE_TREE := sandbox
diff --git a/arch/sandbox/dts/Makefile b/arch/sandbox/dts/Makefile
new file mode 100644
index 000..a4c980b
--- /dev/null
+++ b/arch/sandbox/dts/Makefile
@@ -0,0 +1,11 @@
+dtb-$(CONFIG_SANDBOX) += sandbox.dtb
+
+targets += $(dtb-y)
+
+DTC_FLAGS += -R 4 -p 0x1000
+
+PHONY += dtbs
+dtbs: $(addprefix $(obj)/, $(dtb-y))
+ @:
+
+clean-files := *.dtb
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
new file mode 100644
index 000..96a4438
--- /dev/null
+++ b/arch/sandbox/dts/sandbox.dts
@@ -0,0 +1,20 @@
+/dts-v1/;
+
+/ {
+ triangle {
+ compatible = demo-shape;
+ colour = cyan;
+ sides = 3;
+ character = 83;
+ };
+ square {
+ compatible = demo-shape;
+ colour = blue;
+ sides = 4;
+ };
+ hexagon {
+ compatible = demo-simple;
+ colour = white;
+ sides = 6;
+ };
+};
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index e77d06b..fbb9791 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -32,6 +32,7 @@
#define CONFIG_FIT_SIGNATURE
#define CONFIG_RSA
#define CONFIG_CMD_FDT
+#define CONFIG_DEFAULT_DEVICE_TREE sandbox
#define CONFIG_FS_FAT
#define CONFIG_FS_EXT4
--
1.9.0.rc1.175.g0b1dcb5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-arm/master
On Wed, Feb 26, 2014 at 10:40:13PM +0100, Albert ARIBAUD wrote: Hi Tom, The following changes since commit 3e11350255d9c5d4bd03c2a65769da84c05d3294: Merge branch 'u-boot/master' into 'u-boot-arm/master' (2014-02-20 13:16:05 +0100) are available in the git repository at: git://git.denx.de/u-boot-arm master for you to fetch changes up to 1551df35f296f0a8df32f4f2054254f46e8be252: arm: Switch to -mno-unaligned-access when supported by the compiler (2014-02-26 21:19:32 +0100) Albert ARIBAUD (4): Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' cm_t335: fix linker file to produce full ELF arm: make _end compiler-generated arm: remove unneeded symbol offsets and _TEXT_BASE Darwin Rambo (6): arch: kona: Initial commit of kona-common architecture code arch: bcm281xx: Initial commit of bcm281xx architecture code gpio: kona: Add Kona gpio driver i2c: kona: Add Kona I2C driver mmc: kona: Add Kona mmc driver board: bcm28155_ap: Add board files Dave Gerlach (1): ARM: AM43xx: GP-EVM: Correct GPIO used for VTT regulator control Hannes Petermaier (2): board: Add support for BR T-Series Motherboard Add support for BR KWB Motherboard Janne Grunau (1): ARM: OMAP4: fix DDR timings for OMAP4430 ES2.0 Lothar Felten (1): am335x: Initial support for Silica Pengwyn board Måns Rullgård (1): ti814x: Fix illegal use of FP ops in clock_ti814x.c Nishanth Menon (2): DRA7: fix ABB efuse offset for OPP_NOM omap4_common: config: remove I2C for SPL mode Stefan Roese (2): arm: omap3: Fix tao3530/omap3_ha SPL boot hangup (GPIO clocks not enabled) arm: omap: cm_t35: Remove CONFIG_SYS_BOOTMAPSZ to fix FDT Linux booting Stefano Babic (3): OMAP3: add missing gpio clock init and fix NAND SPL for mcx board omap3: fix pinmux for mcx board OMAP3: fix default environment for mcx board Stephen Warren (4): pxe: allow compilation when !defined(CONFIG_CMD_NET) ARM: rpi_b: convert to use distro defaults ARM: rpi_b: load /uEnv.txt from MMC at startup ARM: rpi_b: rework boot scripts, enable sysboot Tom Rini (5): am335x_evm: Enable GPT commands am43xx_evm: Enable GPT commands dra7xx_evm: Enable GPT commands checkpatch.pl: Add warning for new __packed additions arm: Switch to -mno-unaligned-access when supported by the compiler README | 8 +- arch/arm/cpu/arm1136/start.S | 27 - arch/arm/cpu/arm1136/u-boot-spl.lds| 6 +- arch/arm/cpu/arm1176/start.S | 27 - arch/arm/cpu/arm720t/start.S | 26 - arch/arm/cpu/arm920t/ep93xx/u-boot.lds | 5 +- arch/arm/cpu/arm920t/start.S | 26 - arch/arm/cpu/arm926ejs/at91/lowlevel_init.S| 14 +-- arch/arm/cpu/arm926ejs/mxs/start.S | 27 - arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds | 9 +- arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds| 9 +- arch/arm/cpu/arm926ejs/start.S | 27 - arch/arm/cpu/arm946es/start.S | 26 - arch/arm/cpu/arm_intcm/start.S | 26 - arch/arm/cpu/armv7/Makefile| 1 + arch/arm/cpu/armv7/am33xx/board.c | 6 +- arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 2 + arch/arm/cpu/armv7/am33xx/clock_ti814x.c | 5 +- arch/arm/cpu/armv7/am33xx/u-boot-spl.lds | 6 +- arch/arm/cpu/armv7/bcm281xx/Makefile | 11 ++ arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 523 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 52 + arch/arm/cpu/armv7/bcm281xx/clk-core.c | 513 +++ arch/arm/cpu/armv7/bcm281xx/clk-core.h | 495 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 73 arch/arm/cpu/armv7/bcm281xx/reset.c| 27 + arch/arm/cpu/armv7/config.mk | 7 +- arch/arm/cpu/armv7/kona-common/Makefile| 9 ++ arch/arm/cpu/armv7/kona-common/clk-stubs.c | 21 arch/arm/cpu/armv7/kona-common/hwinit-common.c | 16 +++ arch/arm/cpu/armv7/kona-common/s_init.c| 12 ++ arch/arm/cpu/armv7/omap-common/u-boot-spl.lds | 6 +- arch/arm/cpu/armv7/omap3/lowlevel_init.S | 3 - arch/arm/cpu/armv7/omap4/hw_data.c | 18 +++ arch/arm/cpu/armv7/omap5/prcm-regs.c | 2 +- arch/arm/cpu/armv7/socfpga/u-boot-spl.lds | 6 +- arch/arm/cpu/armv7/start.S
[U-Boot] [PATCH] Add 64-bit data support for memory commands
Add 64-bit data for memory commands, such as md, mw, mm, cmp. The new
size .q is introduced.
For 64-bit architecture, 64-bit data is enabled by default, by detecting
compiler __LP64__. It is optional for other architectures.
Signed-off-by: York Sun york...@freescale.com
---
Please comment if using __LP64__ is the right way to detect 64-bit systems.
README|3 +
common/cmd_mem.c | 157 +
common/command.c |4 ++
include/common.h |4 ++
lib/display_options.c | 17 +-
5 files changed, 174 insertions(+), 11 deletions(-)
diff --git a/README b/README
index f51f17e..9cc265b 100644
--- a/README
+++ b/README
@@ -3470,6 +3470,9 @@ typically in board_init_f() and board_init_r().
Configuration Settings:
---
+- CONFIG_SYS_SUPPORT_64BIT_DATA: Defined automatically if compiled as 64-bit.
+ Optionally it can be defined to support 64-bit memory commands.
+
- CONFIG_SYS_LONGHELP: Defined when you want long help messages included;
undefine this when you're short of memory.
diff --git a/common/cmd_mem.c b/common/cmd_mem.c
index 6d75d02..5b03c2d 100644
--- a/common/cmd_mem.c
+++ b/common/cmd_mem.c
@@ -41,7 +41,7 @@ staticulong base_address = 0;
/* Memory Display
*
* Syntax:
- * md{.b, .w, .l} {addr} {len}
+ * md{.b, .w, .l, .q} {addr} {len}
*/
#define DISP_LINE_LEN 16
static int do_mem_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -155,7 +155,12 @@ static int do_mem_nm(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
static int do_mem_mw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- ulong addr, writeval, count;
+#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
+ u64 writeval;
+#else
+ ulong writeval;
+#endif
+ ulong addr, count;
int size;
void *buf;
ulong bytes;
@@ -175,7 +180,11 @@ static int do_mem_mw(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
/* Get the value to write.
*/
+#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
+ writeval = simple_strtoull(argv[2], NULL, 16);
+#else
writeval = simple_strtoul(argv[2], NULL, 16);
+#endif
/* Count ? */
if (argc == 4) {
@@ -189,6 +198,10 @@ static int do_mem_mw(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
while (count-- 0) {
if (size == 4)
*((u32 *)buf) = (u32)writeval;
+#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
+ else if (size == 8)
+ *((u64 *)buf) = (u64)writeval;
+#endif
else if (size == 2)
*((u16 *)buf) = (u16)writeval;
else
@@ -262,6 +275,11 @@ static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv[])
int rcode = 0;
const char *type;
const void *buf1, *buf2, *base;
+#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
+ u64 word1, word2;
+#else
+ ulong word1, word2;
+#endif
if (argc != 4)
return CMD_RET_USAGE;
@@ -270,7 +288,9 @@ static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
*/
if ((size = cmd_get_data_size(argv[0], 4)) 0)
return 1;
- type = size == 4 ? word : size == 2 ? halfword : byte;
+ type = size == 8 ? double word :
+ size == 4 ? word :
+ size == 2 ? halfword : byte;
addr1 = simple_strtoul(argv[1], NULL, 16);
addr1 += base_address;
@@ -298,10 +318,14 @@ static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv[])
base = buf1 = map_sysmem(addr1, bytes);
buf2 = map_sysmem(addr2, bytes);
for (ngood = 0; ngood count; ++ngood) {
- ulong word1, word2;
if (size == 4) {
word1 = *(u32 *)buf1;
word2 = *(u32 *)buf2;
+#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
+ } else if (size == 8) {
+ word1 = *(u64 *)buf1;
+ word2 = *(u64 *)buf2;
+#endif
} else if (size == 2) {
word1 = *(u16 *)buf1;
word2 = *(u16 *)buf2;
@@ -311,10 +335,15 @@ static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv[])
}
if (word1 != word2) {
ulong offset = buf1 - base;
-
+#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
+ printf(%s at 0x%p (%#0*llx) != %s at 0x%p (%#0*llx)\n,
+ type, (void *)(addr1 + offset), size, word1,
+ type, (void *)(addr2 + offset), size, word2);
+#else
printf(%s at 0x%08lx (%#0*lx) != %s at 0x%08lx
(%#0*lx)\n,
type, (ulong)(addr1 + offset), size, word1,
[U-Boot] [PATCH v6] socfpga: Add socfpga preloader signing to mkimage
Like many platforms, the Altera socfpga platform requires that the
preloader be signed in a certain way or the built-in boot ROM will
not boot the code.
This change automatically creates an appropriately signed preloader
from an SPL image.
The signed image includes a CRC which must, of course, be generated
with a CRC generator that the SoCFPGA boot ROM agrees with otherwise
the boot ROM will reject the image.
Unfortunately the CRC used in this boot ROM is not the same as the
Adler CRC in lib/crc32.c. Indeed the Adler code is not technically a
CRC but is more correctly described as a checksum.
Thus, the appropriate CRC generator is added to lib/ as crc32_alt.c.
Signed-off-by: Charles Manning cdhmann...@gmail.com
---
Changes for v3:
- Fix some coding style issues.
- Move from a standalone tool to the mkimgae framework.
Changes for v4:
- Fix more coding style issues.
- Fix typos in Makefile.
- Rebase on master (previous version was not on master, but on a
working socfpga branch).
Changes for v5:
- Fix more coding style issues.
- Add some more comments.
- Remove some unused defines.
- Move the local CRC32 code into lib/crc32_alt.c.
Changes for v6:
- Fix more coding style issues.
- Rejig socfpgaimage_vrec_header() function so that it has one return
path and does stricter size checks.
Note: Building a SOCFPGA preloader will currently not produe a working
image if built in master, but that is due to issues in building SPL,
not in this signer.
common/image.c |1 +
include/crc32_alt.h | 17 +++
include/image.h |1 +
lib/Makefile |1 +
lib/crc32_alt.c | 94 +
spl/Makefile |5 +
tools/Makefile |2 +
tools/crc32_alt.c|1 +
tools/imagetool.c|2 +
tools/imagetool.h|1 +
tools/socfpgaimage.c | 278 ++
11 files changed, 403 insertions(+)
create mode 100644 include/crc32_alt.h
create mode 100644 lib/crc32_alt.c
create mode 100644 tools/crc32_alt.c
create mode 100644 tools/socfpgaimage.c
diff --git a/common/image.c b/common/image.c
index 9c6bec5..e7dc8cc 100644
--- a/common/image.c
+++ b/common/image.c
@@ -135,6 +135,7 @@ static const table_entry_t uimage_type[] = {
{ IH_TYPE_PBLIMAGE, pblimage, Freescale PBL Boot Image,},
{ IH_TYPE_RAMDISK,ramdisk,RAMDisk Image, },
{ IH_TYPE_SCRIPT, script, Script, },
+ { IH_TYPE_SOCFPGAIMAGE, socfpgaimage, Altera SOCFPGA
preloader,},
{ IH_TYPE_STANDALONE, standalone, Standalone Program, },
{ IH_TYPE_UBLIMAGE, ublimage, Davinci UBL image,},
{ IH_TYPE_MXSIMAGE, mxsimage, Freescale MXS Boot Image,},
diff --git a/include/crc32_alt.h b/include/crc32_alt.h
new file mode 100644
index 000..813d55d
--- /dev/null
+++ b/include/crc32_alt.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2014 Charles Manning cdhmann...@gmail.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Note that the CRC is **not** the zlib/Adler crc32 in crc32.c.
+ * It is the CRC-32 used in bzip2, ethernet and elsewhere.
+ */
+
+#ifndef __CRC32_ALT_H__
+#define __CRC32_ALT_H__
+
+#include stdint.h
+
+uint32_t crc32_alt(uint32_t crc, const void *_buf, int length);
+
+#endif
diff --git a/include/image.h b/include/image.h
index 6afd57b..bde31d9 100644
--- a/include/image.h
+++ b/include/image.h
@@ -215,6 +215,7 @@ struct lmb;
#define IH_TYPE_KERNEL_NOLOAD 14 /* OS Kernel Image, can run from any
load address */
#define IH_TYPE_PBLIMAGE 15 /* Freescale PBL Boot Image */
#define IH_TYPE_MXSIMAGE 16 /* Freescale MXSBoot Image */
+#define IH_TYPE_SOCFPGAIMAGE 17 /* Altera SOCFPGA Preloader */
/*
* Compression Types
diff --git a/lib/Makefile b/lib/Makefile
index 8c483c9..7ee07a5 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -52,6 +52,7 @@ obj-y += errno.o
obj-y += display_options.o
obj-$(CONFIG_BCH) += bch.o
obj-y += crc32.o
+obj-y += crc32_alt.o
obj-y += ctype.o
obj-y += div64.o
obj-y += hang.o
diff --git a/lib/crc32_alt.c b/lib/crc32_alt.c
new file mode 100644
index 000..e0db335
--- /dev/null
+++ b/lib/crc32_alt.c
@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2014 Charles Manning cdhmann...@gmail.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Note that the CRC is **not** the zlib/Adler crc32 in crc32.c.
+ * It is the CRC-32 used in bzip2, ethernet and elsewhere.
+ */
+
+#include crc32_alt.h
+#include stdint.h
+
+static uint32_t crc_table[256] = {
+ 0x, 0x04c11db7, 0x09823b6e, 0x0d4326d9,
+ 0x130476dc, 0x17c56b6b, 0x1a864db2, 0x1e475005,
+ 0x2608edb8, 0x22c9f00f, 0x2f8ad6d6, 0x2b4bcb61,
+ 0x350c9b64, 0x31cd86d3, 0x3c8ea00a, 0x384fbdbd,
+ 0x4c11db70, 0x48d0c6c7, 0x4593e01e, 0x4152fda9,
+ 0x5f15adac, 0x5bd4b01b, 0x569796c2, 0x52568b75,
+ 0x6a1936c8, 0x6ed82b7f, 0x639b0da6, 0x675a1011,
+
Re: [U-Boot] [RFC] mmc: Remove ops from struct mmc and put in mmc_ops
Dear Pantelis Antoniou Pantelis Antoniou panto at antoniou-consulting.com writes: Remove the in-structure ops and put them in mmc_ops with a constant pointer to it. This makes the mmc structure smaller as well as conserving code space (in theory). First build is latest master. Second build was with your patch. Compare size output. [local (powerpc-linux-gnuspe)]$ powerpc-linux-gnuspe-size obj- P5040DS_SPIFLASH_master/u-boot textdata bss dec hex filename 463352 39236 314064 816652 c760c obj-P5040DS_SPIFLASH_master/u-boot [local (powerpc-linux-gnuspe)]$ powerpc-linux-gnuspe-size obj- P5040DS_SPIFLASH/u-boot textdata bss dec hex filename 463364 39256 314064 816684 c762c obj-P5040DS_SPIFLASH/u-boot All in-tree drivers are converted as well; this is done in a single patch in order to not break git bisect. snipped ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [Patch v2 1/3] armv8/cache: Consolidate setting for MAIR and TCR
Hi York, On Wed, 26 Feb 2014 13:58:20 -0800, York Sun york...@freescale.com wrote: On 02/26/2014 01:53 PM, Albert ARIBAUD wrote: Hi York, On Wed, 26 Feb 2014 13:26:02 -0800, York Sun york...@freescale.com wrote: Move setting for MAIR and TCR to cache_v8.c, to avoid conflict with sub-architecture. Signed-off-by: York Sun york...@freescale.com CC: David Feng feng...@phytium.com.cn --- Changed since v1 v1: Acked-by: David Feng feng...@phytium.com.cn v2: No change. Didn't a v3 already hit the list, and shouldn't this series be v4? Really? I don't recall. Did I leak an internal review patch to the list? Previous version is http://patchwork.ozlabs.org/patch/319067/ My mistake (and second one yesterday evening). V2 is fine. York Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] hush: when a variable expansion is empty, don't drop the parameter
The following shell command fails:
if test -z $x; then echo zero; else echo non-zero; fi
(assuming $x does not exist, it prints non-zero rather than zero).
... since $x expands to nothing, and the argument is completely
dropped, causing too few to be passed to -z, causing cmd_test() to
error out early.
This is because when variable expansions are processed by make_string(),
the expanded results are concatenated back into a new string. However,
no quoting is applied when doing so, so any empty variables simply don't
generate any parameter when the combined string is parsed again.
Fix this by explicitly replacing any empty expansion with an empty pair
of quotes, so that an argument is still generated.
Reported-by: Russell King li...@arm.linux.org.uk
Signed-off-by: Stephen Warren swar...@wwwdotorg.org
---
Hmm. I wonder if this causes other problems, such as:
if test -z $x; then echo zero; else echo non-zero; fi
I guess we should only quote the expansion if the input string had quotes
around the text being expanded, but I'm not sure if we can know that.
Perhaps more investigation is needed:-( Although... I /guess/ that case
is rarer, so this patch still improves things?
---
common/hush.c | 8 ++--
test/command_ut.c | 6 ++
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/common/hush.c b/common/hush.c
index 3f3a79c..7a67706 100644
--- a/common/hush.c
+++ b/common/hush.c
@@ -116,7 +116,7 @@
#endif
#endif
#define SPECIAL_VAR_SYMBOL 03
-#define SUBSTED_VAR_SYMBOL 04
+#define q 04
#ifndef __U_BOOT__
#define FLAG_EXIT_FROM_LOOP 1
#define FLAG_PARSE_SEMICOLON (1 1) /* symbol ';' is special for
parser */
@@ -3594,12 +3594,15 @@ static char * make_string(char ** inp)
int len = 2;
char *noeval_str;
int noeval = 0;
+ char *empty = \\;
noeval_str = get_local_var(HUSH_NO_EVAL);
if (noeval_str != NULL *noeval_str != '0' *noeval_str != '\0')
noeval = 1;
for (n = 0; inp[n]; n++) {
p = insert_var_value_sub(inp[n], noeval);
+ if (!*p)
+ p = empty;
str = xrealloc(str, (len + strlen(p)));
if (n) {
strcat(str, );
@@ -3608,7 +3611,8 @@ static char * make_string(char ** inp)
}
strcat(str, p);
len = strlen(str) + 3;
- if (p != inp[n]) free(p);
+ if (p != inp[n] p != empty)
+ free(p);
}
len = strlen(str);
*(str + len) = '\n';
diff --git a/test/command_ut.c b/test/command_ut.c
index 620a297..6074b0e 100644
--- a/test/command_ut.c
+++ b/test/command_ut.c
@@ -137,6 +137,12 @@ static int do_ut_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
HUSH_TEST(or_1_0_inv_inv, ! ! aaa = aaa -o ! ! bbb != bbb, y);
HUSH_TEST(or_1_1_inv_inv, ! ! aaa = aaa -o ! ! bbb = bbb, y);
+ run_command(setenv ut_var_nonexistent, 0);
+ run_command(setenv ut_var_exists 1, 0);
+ HUSH_TEST(z_varexp, -z \$ut_var_nonexistent\, y);
+ HUSH_TEST(z_varexp, -z \$ut_var_exists\, n);
+ run_command(setenv ut_var_exists, 0);
+
#ifdef CONFIG_SANDBOX
/*
* File existence
--
1.8.3.2
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] 16 bit I2c read write on omap4 ?
Hi all, I have a doubt how to do 16 bit read write on i2c bus at u-boot. I am working on i2c sensor(of address accessing is 16 bit read/write). I want to configure this sensor at u-boot but i dont know how to do 16 bit i2c md/mw or i2c read/write. I seen the i2c md/mw commands they do not support 16 bit i2c read write, how can i enable 16 bit i2c access at u-boot. One more doubt : If i make a my own i2c command for 16 bit read or write, Is i2c driver inside u-boot supports 16 bit data read or write?If not how can i make it to do 16 bit read or write? Thanks Regards Vikram ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
