[U-Boot] [PATCH] net/phy: Correct AR8021 phy_mask

2014-03-04 Thread Haijun Zhang
There was wrong phy_mask for AR8021 device,
so the AR8021 can't be probed correctly.
Changed it from 0x4f to 0x40.

Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
---
 drivers/net/phy/atheros.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index 5332e1a..b80980d 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -41,7 +41,7 @@ static int ar8035_config(struct phy_device *phydev)
 static struct phy_driver AR8021_driver =  {
.name = AR8021,
.uid = 0x4dd040,
-   .mask = 0x4f,
+   .mask = 0x40,
.features = PHY_GBIT_FEATURES,
.config = ar8021_config,
.startup = genphy_startup,
-- 
1.8.5


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[U-Boot] Help with Raspberry Pi

2014-03-04 Thread Artur Sterz Uni
Hi,
is it possible to boot a raspbian Image with U-Boot on a Raspberry Pi?

And I found this API-Folder. Is this for developing U-Boot Standalone-Apps?

Thank you,
Artur
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Re: [U-Boot] [PATCH REPOST] usb: create common header virtual root hub descriptors

2014-03-04 Thread Pierre AUBERT

Hello Stephen,

Sorry for the delay, I wasn't connected during 2 weeks.
I can't comment your patch because I no longer have an MPC5200-based board.

Best regards

Le 21/02/2014 05:19, Stephen Warren a écrit :

On 02/13/2014 09:15 PM, Stephen Warren wrote:

Many USB host controller drivers contain almost identical copies of the
same virtual root hub descriptors. Put these into a common file to avoid
duplication.

Note that there were some very minor differences between the descriptors
in the various files, such as:

- USB 1.0 vs. USB 1.1
- Manufacturer/Device ID
- Max packet size
- String content

I assume these aren't relevant.

Marek, how long do you think we should wait for acks/naks from the CC'd
people?





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Re: [U-Boot] [PATCH v2 1/2] nand/denali: Adding Denali NAND driver support

2014-03-04 Thread Masahiro Yamada
Hello Scott, Chin,


  +/* this is a helper macro that allows us to
  + * format the bank into the proper bits for the controller */
  +#define BANK(x) ((x)  24)
  +
  +/* Interrupts are cleared by writing a 1 to the appropriate status bit */
  +static inline void clear_interrupt(uint32_t irq_mask)
  +{
  +   uint32_t intr_status_reg = 0;
  +   intr_status_reg = INTR_STATUS(denali.flash_bank);
  +   __raw_writel(irq_mask, denali.flash_reg + intr_status_reg);
  +}
 
 Why are you using raw I/O accessors?  The Linux driver doesn't do this.

Add ioread32/iowrite32 to arch/arm/include/asm/io.h
and use them?



  +
  +static uint32_t wait_for_irq(uint32_t irq_mask)
  +{
  +   unsigned long comp_res = 1000;
  +   uint32_t intr_status = 0;
  +
  +   do {
  +   intr_status = read_interrupt_status()  DENALI_IRQ_ALL;
  +   if (intr_status  irq_mask) {
  +   denali.irq_status = ~irq_mask;
  +   /* our interrupt was detected */
  +   break;
  +   }
  +   udelay(1);
  +   comp_res--;
  +   } while (comp_res != 0);
 
 This looks like a much shorter timeout than Linux uses (1000us versus
 1000ms).  Though FWIW the Linux timeout code looks buggy.
 
 Also, comp_res is a very odd name for a timeout variable.

Right. I think wait time is too short.
When I tested this code on my board, timeout error always
occurred on page write command.

I had to fix it to run write command.
s/udelay(1)/udelay(1000)/




There is another problem.
I think there is a cache coherency problem in this driver code.
DMA is used in this driver but D-cache is never flushed.

When D-cache is on (CONFIG_SYS_DCACHE_OFF is not defined),
ARM processor writes to/reads from the buffer through D-cache.
On the other hand, Denali NAND controller always wites to/reads from
the buffer on physical memory.
So, this driver writes/reads wrong data.

I had to add flush_dcache_range() function call
in denali_setup_dma_sequence().


  @@ -689,6 +689,8 @@ static void denali_setup_dma_sequence(int op)
  uint32_t mode;
  uint32_t addr = (uint32_t)denali.buf.dma_buf;
   
  +   flush_dcache_range(addr, addr + sizeof(denali.buf.dma_buf));
  +
  mode = MODE_10 | BANK(denali.flash_bank);
   
  /* DMA is a four step process */




Best Regards
Masahiro Yamada

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Re: [U-Boot] [PATCH] usb: dfu: add static alt num count in dfu_config_entities()

2014-03-04 Thread Lukasz Majewski
Hi Heiko,

 Thanks to this multiple call of function dfu_config_entities()
 gives continuous dfu alt numbering until call dfu_free_entities().
 
 This allows to store dfu entities in multiple variables.

Could you test this patch on your boards, which are using DFU?

Thanks in advance.

 
 Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
 Acked-by: Łukasz Majewski l.majew...@samsung.com
 ---
  drivers/dfu/dfu.c |6 +-
  1 file changed, 5 insertions(+), 1 deletion(-)
 
 diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
 index 07011e9..56e69fd 100644
 --- a/drivers/dfu/dfu.c
 +++ b/drivers/dfu/dfu.c
 @@ -19,6 +19,7 @@
  static bool dfu_reset_request;
  static LIST_HEAD(dfu_list);
  static int dfu_alt_num;
 +static int alt_num_cnt;
  
  bool dfu_reset(void)
  {
 @@ -377,6 +378,8 @@ void dfu_free_entities(void)
   if (t)
   free(t);
   INIT_LIST_HEAD(dfu_list);
 +
 + alt_num_cnt = 0;
  }
  
  int dfu_config_entities(char *env, char *interface, int num)
 @@ -394,11 +397,12 @@ int dfu_config_entities(char *env, char
 *interface, int num) for (i = 0; i  dfu_alt_num; i++) {
  
   s = strsep(env, ;);
 - ret = dfu_fill_entity(dfu[i], s, i, interface, num);
 + ret = dfu_fill_entity(dfu[i], s, alt_num_cnt,
 interface, num); if (ret)
   return -1;
  
   list_add_tail(dfu[i].list, dfu_list);
 + alt_num_cnt++;
   }
  
   return 0;

-- 
Best regards,

Lukasz Majewski

Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH] usb: dfu: add static alt num count in dfu_config_entities()

2014-03-04 Thread Heiko Schocher

Hello Lukasz,

Am 04.03.2014 12:33, schrieb Lukasz Majewski:

Hi Heiko,


Thanks to this multiple call of function dfu_config_entities()
gives continuous dfu alt numbering until call dfu_free_entities().

This allows to store dfu entities in multiple variables.


Could you test this patch on your boards, which are using DFU?


Of course, but not before next week ...

bye,
Heiko
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Re: [U-Boot] [PATCH] usb: dfu: add static alt num count in dfu_config_entities()

2014-03-04 Thread Lukasz Majewski
Hi Heiko,

 Hello Lukasz,
 
 Am 04.03.2014 12:33, schrieb Lukasz Majewski:
  Hi Heiko,
 
  Thanks to this multiple call of function dfu_config_entities()
  gives continuous dfu alt numbering until call dfu_free_entities().
 
  This allows to store dfu entities in multiple variables.
 
  Could you test this patch on your boards, which are using DFU?
 
 Of course, but not before next week ...

Ok. Thanks. :-)

 
 bye,
 Heiko



-- 
Best regards,

Lukasz Majewski

Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [RESEND PATCH v2 4/4] kbuild: improve Kbuild speed

2014-03-04 Thread Masahiro Yamada
Hello Tom,


 Kbuild brought about many advantages for us but a significant
 performance regression was reported by Simon Glass.
 
 After some discussions and analysis, it turned out
 its main cause is in $(call cc-option,...).
 
 Historically, U-Boot parses all config.mk
 (arch/*/config.mk and board/*/config.mk)
 every time descending into subdirectories.
 That means cc-options are evaluated over and over again.
 
 $(call cc-option,...) is useful but costly.
 So we want to evaluate them only in ./Makefile
 and spl/Makefile and export compiler flags.
 
 This commit changes the build system as follows:

Please hold applying this patch.
I have found a bug in this patch.

microblaze-generic board will be broken with this patch.
( microblaze-linux-gcc  fails in building this board,
 so I missed this bug when I tested this series.)

I will post version 3 tomorrow.

Best Regards
Masahiro Yamada

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[U-Boot] U-Boot doesn't silent the output

2014-03-04 Thread Frank Ihle
Hi everyone,

I searched the Internet but the help I found didn't work. I hope someone here 
may know how to fix it, here's the situation:

I have this ARM9 SAM9G25 which is accessed by its ttyS0. I
 want to disable all of the output, that was made during the U-Boot (v. 
2010.06) 
boot, to decrease the CPU's load. Therefore there is the 


  setenv silent 1



parameter, which i put into the BOOTCMD string like:



  #define CONFIG_BOOTCOMMANDsetenv silent 1; \

bootm 



and there is (as mentioned in the Readme.silent 
http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=blob;f=doc/README.silent;hb=v2013.10
 ) the
#define CONFIG_SILENT_CONSOLE
#define CONFIG_SYS_DEVICE_NULLDEV
#define CONFIG_SILENT_CONSOLE_UPDATE_ON_SET


command, neither one is working (the lines printed out are still the same and 
the boot time didn't change). Whereas the 
 setenv varify n
is working, just to give an example.

Does somebody see the error ?

BTW (I'm not sure if this is related to this) in the referenced link there is 
the information, that u-boot sets the kernel command line to console= so that 
in the end there will be no output for the kernel too, but that didn't happen 
and it doesn't even happen if i force to boot Linux with console= in the 
default Linux command line string
Thanks for your help.
Kind Regards,
Frank



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[U-Boot] [PATCH V4 00/12] Exynos4: add support for device tree

2014-03-04 Thread Piotr Wilczek
This patch set enables support for device tree on all Exynos4 based boards.

DT support is enabled on Exynos mipi dsim and sdhci drives.
Common board.c file is reused for all functions common for
Exynos4 boards. Board specific files are implemented in the board files.
Origen, Universal, Trats and Trats2 boards are modifed to support device tree.

This patch series depends on:
[U-Boot] sizes.h - consolidate for all architectures
http://patchwork.ozlabs.org/patch/324427/

Changes for v4:
 - define CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, CONFIG_CMD_I2C at each board
 - use - hypen in DT bindings
 - remove duplicated DT properties at exynos_fb.c file

Changes for v3:
 - moved max77686 init function to smdk5250 board file
 - board DTS files moved to arch/arm/dts
 - rebased on the latest tree

Changes for v2:
 - removed incorrectly implemented check for invalid peripheral id
 - removed unnecesary white space
 - removed panel specific init function 's6e8ax0_init' to the board file
 - removed duplicate DTB node parsing for panel_info.logo_on
 - added (weak) exynos_lcd_panel_init function for panel specific
initialisation from board file
 - fixed checking for SDMMC boundary
 - fiex debug message
 - fixed comment to 'pwr_gpio' struct filed
 - new patch to move checkboard to common file
 - reuse existing common board.c file
 - new patch that removes unused max77686_init function
 - fixed mmc2 addres in DT on Trats2

Piotr Wilczek (12):
  exynos4:pinmux:fdt: decode peripheral id
  video:mipidsim:fdt: Add DT support for mipi dsim driver
  video:exynos_fb:fdt: add additional fdt data
  drivers:mmc:sdhci: enable support for DT
  board:samsung: move checkboard to common file
  arm:exynos: add common DTS file for exynos 4
  board:samsung:common: move max77686 init function
  arm:exynos: enable sdhci and misc_init to common board
  board:origen: Enable device tree on Origen
  board:universal: Enable device tree on Universal
  board:trats: Enable device tree on Trats
  board:trats2: Enable device tree on Trats2

 arch/arm/cpu/armv7/exynos/pinmux.c   |  17 ++
 arch/arm/dts/Makefile|   5 +
 arch/arm/dts/exynos4.dtsi| 138 +
 arch/arm/dts/exynos4210-origen.dts   |  45 +++
 arch/arm/dts/exynos4210-trats.dts| 120 
 arch/arm/dts/exynos4210-universal_c210.dts   |  83 +
 arch/arm/dts/exynos4412-trats2.dts   | 434 +++
 arch/arm/include/asm/arch-exynos/board.h |  12 +
 arch/arm/include/asm/arch-exynos/mipi_dsim.h |   5 +
 arch/arm/include/asm/arch-exynos/mmc.h   |   7 +
 board/samsung/common/board.c | 180 ---
 board/samsung/origen/origen.c| 112 +--
 board/samsung/smdk5250/exynos5-dt.c  |  15 -
 board/samsung/smdk5250/smdk5250.c| 125 
 board/samsung/smdk5420/smdk5420.c|  15 -
 board/samsung/trats/trats.c  | 213 +
 board/samsung/trats2/trats2.c| 233 +-
 board/samsung/universal_c210/universal.c | 204 -
 drivers/mmc/s5p_sdhci.c  | 129 
 drivers/video/exynos_fb.c|  15 +
 drivers/video/exynos_mipi_dsi.c  |  96 ++
 include/configs/exynos4-dt.h | 138 +
 include/configs/origen.h | 110 ++-
 include/configs/s5pc210_universal.h  | 152 +++---
 include/configs/trats.h  | 206 -
 include/configs/trats2.h | 204 +++--
 include/fdtdec.h |   2 +
 include/sdhci.h  |   5 +
 lib/fdtdec.c |   2 +
 29 files changed, 1686 insertions(+), 1336 deletions(-)
 create mode 100644 arch/arm/dts/exynos4.dtsi
 create mode 100644 arch/arm/dts/exynos4210-origen.dts
 create mode 100644 arch/arm/dts/exynos4210-trats.dts
 create mode 100644 arch/arm/dts/exynos4210-universal_c210.dts
 create mode 100644 arch/arm/dts/exynos4412-trats2.dts
 create mode 100644 include/configs/exynos4-dt.h

-- 
1.8.3.2

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[U-Boot] [PATCH V4 02/12] video:mipidsim:fdt: Add DT support for mipi dsim driver

2014-03-04 Thread Piotr Wilczek
This patch enables parsing mipi data from device tree.
Non device tree case is still supported.

Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes for v4:
 - use - hypen for DT bindings

Changes for v3:
 - none

Changes for v2:
 - removed panel specific init function 's6e8ax0_init' to the board file

 arch/arm/include/asm/arch-exynos/mipi_dsim.h |  5 ++
 drivers/video/exynos_mipi_dsi.c  | 96 
 include/fdtdec.h |  1 +
 lib/fdtdec.c |  1 +
 4 files changed, 103 insertions(+)

diff --git a/arch/arm/include/asm/arch-exynos/mipi_dsim.h 
b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
index 40aca71..50e5c25 100644
--- a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
+++ b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
@@ -12,6 +12,7 @@
 
 #include linux/list.h
 #include linux/fb.h
+#include lcd.h
 
 #define PANEL_NAME_SIZE(32)
 
@@ -368,8 +369,12 @@ int exynos_mipi_dsi_register_lcd_device(struct 
mipi_dsim_lcd_device
*lcd_dev);
 
 void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd);
+void exynos_init_dsim_platform_data(vidinfo_t *vid);
 
 /* panel driver init based on mipi dsi interface */
 void s6e8ax0_init(void);
 
+#ifdef CONFIG_OF_CONTROL
+extern int mipi_power(void);
+#endif
 #endif /* _DSIM_H */
diff --git a/drivers/video/exynos_mipi_dsi.c b/drivers/video/exynos_mipi_dsi.c
index 8bb8fea..7dd4652 100644
--- a/drivers/video/exynos_mipi_dsi.c
+++ b/drivers/video/exynos_mipi_dsi.c
@@ -9,6 +9,8 @@
 
 #include common.h
 #include malloc.h
+#include fdtdec.h
+#include libfdt.h
 #include linux/err.h
 #include asm/arch/dsim.h
 #include asm/arch/mipi_dsim.h
@@ -22,7 +24,14 @@
 #define master_to_driver(a)(a-dsim_lcd_drv)
 #define master_to_device(a)(a-dsim_lcd_dev)
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static struct exynos_platform_mipi_dsim *dsim_pd;
+#ifdef CONFIG_OF_CONTROL
+static struct mipi_dsim_config dsim_config_dt;
+static struct exynos_platform_mipi_dsim dsim_platform_data_dt;
+static struct mipi_dsim_lcd_device mipi_lcd_device_dt;
+#endif
 
 struct mipi_dsim_ddi {
int bus_id;
@@ -238,3 +247,90 @@ void exynos_set_dsim_platform_data(struct 
exynos_platform_mipi_dsim *pd)
 
dsim_pd = pd;
 }
+
+#ifdef CONFIG_OF_CONTROL
+int exynos_dsim_config_parse_dt(const void *blob)
+{
+   int node;
+
+   node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS_MIPI_DSI);
+   if (node = 0) {
+   printf(exynos_mipi_dsi: Can't get device node for mipi dsi\n);
+   return -ENODEV;
+   }
+
+   dsim_config_dt.e_interface = fdtdec_get_int(blob, node,
+   samsung,dsim-config-e-interface, 0);
+
+   dsim_config_dt.e_virtual_ch = fdtdec_get_int(blob, node,
+   samsung,dsim-config-e-virtual-ch, 0);
+
+   dsim_config_dt.e_pixel_format = fdtdec_get_int(blob, node,
+   samsung,dsim-config-e-pixel-format, 0);
+
+   dsim_config_dt.e_burst_mode = fdtdec_get_int(blob, node,
+   samsung,dsim-config-e-burst-mode, 0);
+
+   dsim_config_dt.e_no_data_lane = fdtdec_get_int(blob, node,
+   samsung,dsim-config-e-no-data-lane, 0);
+
+   dsim_config_dt.e_byte_clk = fdtdec_get_int(blob, node,
+   samsung,dsim-config-e-byte-clk, 0);
+
+   dsim_config_dt.hfp = fdtdec_get_int(blob, node,
+   samsung,dsim-config-hfp, 0);
+
+   dsim_config_dt.p = fdtdec_get_int(blob, node,
+ samsung,dsim-config-p, 0);
+   dsim_config_dt.m = fdtdec_get_int(blob, node,
+ samsung,dsim-config-m, 0);
+   dsim_config_dt.s = fdtdec_get_int(blob, node,
+ samsung,dsim-config-s, 0);
+
+   dsim_config_dt.pll_stable_time = fdtdec_get_int(blob, node,
+   samsung,dsim-config-pll-stable-time, 0);
+
+   dsim_config_dt.esc_clk = fdtdec_get_int(blob, node,
+   samsung,dsim-config-esc-clk, 0);
+
+   dsim_config_dt.stop_holding_cnt = fdtdec_get_int(blob, node,
+   samsung,dsim-config-stop-holding-cnt, 0);
+
+   dsim_config_dt.bta_timeout = fdtdec_get_int(blob, node,
+   samsung,dsim-config-bta-timeout, 0);
+
+   dsim_config_dt.rx_timeout = fdtdec_get_int(blob, node,
+   samsung,dsim-config-rx-timeout, 0);
+
+   mipi_lcd_device_dt.name = fdtdec_get_config_string(blob,
+   samsung,dsim-device-name);
+
+   mipi_lcd_device_dt.id = fdtdec_get_int(blob, node,
+   

[U-Boot] [PATCH V4 01/12] exynos4:pinmux:fdt: decode peripheral id

2014-03-04 Thread Piotr Wilczek
This patch adds api to decode peripheral id based on interrupt number.

Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
Changes for v4:
 - none

Changes for v3:
 - none

Changes for v2:
 - removed incorrectly implemented check for invalid peripheral id
 - removed unnecesary white space

 arch/arm/cpu/armv7/exynos/pinmux.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c 
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 645c497..8d6e5c1 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -741,6 +741,21 @@ int exynos_pinmux_config(int peripheral, int flags)
 }
 
 #ifdef CONFIG_OF_CONTROL
+static int exynos4_pinmux_decode_periph_id(const void *blob, int node)
+{
+   int err;
+   u32 cell[3];
+
+   err = fdtdec_get_int_array(blob, node, interrupts, cell,
+   ARRAY_SIZE(cell));
+   if (err) {
+   debug( invalid peripheral id\n);
+   return PERIPH_ID_NONE;
+   }
+
+   return cell[1];
+}
+
 static int exynos5_pinmux_decode_periph_id(const void *blob, int node)
 {
int err;
@@ -758,6 +773,8 @@ int pinmux_decode_periph_id(const void *blob, int node)
 {
if (cpu_is_exynos5())
return  exynos5_pinmux_decode_periph_id(blob, node);
+   else if (cpu_is_exynos4())
+   return  exynos4_pinmux_decode_periph_id(blob, node);
else
return PERIPH_ID_NONE;
 }
-- 
1.8.3.2

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[U-Boot] [PATCH V4 03/12] video:exynos_fb:fdt: add additional fdt data

2014-03-04 Thread Piotr Wilczek
This patch adds additional data parsing from DTB and adds the new
exynos_lcd_panel_init() function for panel specific initialisation
from the board file.

Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes for v4:
 - remove duplicated DT properties at exynos_fb.c file

Changes for v3:
 - none

Changes for v2:
 - removed duplicate DTB node parsing for panel_info.logo_on
 - added (weak) exynos_lcd_panel_init function for panel specific
initialisation from board file

 drivers/video/exynos_fb.c | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index 00a0a11..77a3186 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -104,6 +104,13 @@ void __exynos_backlight_reset(void)
 void exynos_backlight_reset(void)
__attribute__((weak, alias(__exynos_backlight_reset)));
 
+int __exynos_lcd_panel_init(vidinfo_t *vid)
+{
+   return 0;
+}
+int exynos_lcd_panel_init(vidinfo_t *vid)
+   __attribute__((weak, alias(__exynos_lcd_panel_init)));
+
 static void lcd_panel_on(vidinfo_t *vid)
 {
udelay(vid-init_delay);
@@ -269,6 +276,9 @@ int exynos_fimd_parse_dt(const void *blob)
panel_info.dual_lcd_enabled = fdtdec_get_int(blob, node,
samsung,dual-lcd-enabled, 0);
 
+   panel_info.resolution = fdtdec_get_int(blob, node,
+   samsung,resolution, 0);
+
return 0;
 }
 #endif
@@ -281,10 +291,15 @@ void lcd_ctrl_init(void *lcdbase)
 #ifdef CONFIG_OF_CONTROL
if (exynos_fimd_parse_dt(gd-fdt_blob))
debug(Can't get proper panel info\n);
+#ifdef CONFIG_EXYNOS_MIPI_DSIM
+   exynos_init_dsim_platform_data(panel_info);
+#endif
+   exynos_lcd_panel_init(panel_info);
 #else
/* initialize parameters which is specific to panel. */
init_panel_info(panel_info);
 #endif
+
panel_width = panel_info.vl_width;
panel_height = panel_info.vl_height;
 
-- 
1.8.3.2

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[U-Boot] [PATCH V4 04/12] drivers:mmc:sdhci: enable support for DT

2014-03-04 Thread Piotr Wilczek
This patch enables support for device tree for sdhci driver.
Non DT case is still supported.

Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes for v4:
 - none

Changes for v3:
 - none

Changes for v2:
 - fixed checking for SDMMC boundary
 - fiex debug message
 - fixed comment to 'pwr_gpio' struct filed

 arch/arm/include/asm/arch-exynos/mmc.h |   7 ++
 drivers/mmc/s5p_sdhci.c| 129 +
 include/fdtdec.h   |   1 +
 include/sdhci.h|   5 ++
 lib/fdtdec.c   |   1 +
 5 files changed, 143 insertions(+)

diff --git a/arch/arm/include/asm/arch-exynos/mmc.h 
b/arch/arm/include/asm/arch-exynos/mmc.h
index 98d6530..0fb6461 100644
--- a/arch/arm/include/asm/arch-exynos/mmc.h
+++ b/arch/arm/include/asm/arch-exynos/mmc.h
@@ -53,6 +53,8 @@
 #define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x)  16)
 #define SDHCI_CTRL4_DRIVE_SHIFT(16)
 
+#define SDHCI_MAX_HOSTS 4
+
 int s5p_sdhci_init(u32 regbase, int index, int bus_width);
 
 static inline int s5p_mmc_init(int index, int bus_width)
@@ -62,4 +64,9 @@ static inline int s5p_mmc_init(int index, int bus_width)
 
return s5p_sdhci_init(base, index, bus_width);
 }
+
+#ifdef CONFIG_OF_CONTROL
+int exynos_mmc_init(const void *blob);
+#endif
+
 #endif
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 40ff873..ccae4cc 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -8,8 +8,15 @@
 #include common.h
 #include malloc.h
 #include sdhci.h
+#include fdtdec.h
+#include libfdt.h
+#include asm/gpio.h
 #include asm/arch/mmc.h
 #include asm/arch/clk.h
+#include errno.h
+#ifdef CONFIG_OF_CONTROL
+#include asm/arch/pinmux.h
+#endif
 
 static char *S5P_NAME = SAMSUNG SDHCI;
 static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
@@ -86,3 +93,125 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
 
return add_sdhci(host, 5200, 40);
 }
+
+#ifdef CONFIG_OF_CONTROL
+struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
+
+static int do_sdhci_init(struct sdhci_host *host)
+{
+   int dev_id, flag;
+   int err = 0;
+
+   flag = host-bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE;
+   dev_id = host-index + PERIPH_ID_SDMMC0;
+
+   if (fdt_gpio_isvalid(host-pwr_gpio)) {
+   gpio_direction_output(host-pwr_gpio.gpio, 1);
+   err = exynos_pinmux_config(dev_id, flag);
+   if (err) {
+   debug(MMC not configured\n);
+   return err;
+   }
+   }
+
+   if (fdt_gpio_isvalid(host-cd_gpio)) {
+   gpio_direction_output(host-cd_gpio.gpio, 0xf);
+   if (gpio_get_value(host-cd_gpio.gpio))
+   return -ENODEV;
+
+   err = exynos_pinmux_config(dev_id, flag);
+   if (err) {
+   printf(external SD not configured\n);
+   return err;
+   }
+   }
+
+   host-name = S5P_NAME;
+
+   host-quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
+   SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
+   SDHCI_QUIRK_WAIT_SEND_CMD;
+   host-voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
+   host-version = sdhci_readw(host, SDHCI_HOST_VERSION);
+
+   host-set_control_reg = s5p_sdhci_set_control_reg;
+   host-set_clock = set_mmc_clk;
+
+   host-host_caps = MMC_MODE_HC;
+
+   return add_sdhci(host, 5200, 40);
+}
+
+static int sdhci_get_config(const void *blob, int node, struct sdhci_host 
*host)
+{
+   int bus_width, dev_id;
+   unsigned int base;
+
+   /* Get device id */
+   dev_id = pinmux_decode_periph_id(blob, node);
+   if (dev_id  PERIPH_ID_SDMMC0  dev_id  PERIPH_ID_SDMMC3) {
+   debug(MMC: Can't get device id\n);
+   return -1;
+   }
+   host-index = dev_id - PERIPH_ID_SDMMC0;
+
+   /* Get bus width */
+   bus_width = fdtdec_get_int(blob, node, samsung,bus-width, 0);
+   if (bus_width = 0) {
+   debug(MMC: Can't get bus-width\n);
+   return -1;
+   }
+   host-bus_width = bus_width;
+
+   /* Get the base address from the device node */
+   base = fdtdec_get_addr(blob, node, reg);
+   if (!base) {
+   debug(MMC: Can't get base address\n);
+   return -1;
+   }
+   host-ioaddr = (void *)base;
+
+   fdtdec_decode_gpio(blob, node, pwr-gpios, host-pwr_gpio);
+   fdtdec_decode_gpio(blob, node, cd-gpios, host-cd_gpio);
+
+   return 0;
+}
+
+static int process_nodes(const void *blob, int node_list[], int count)
+{
+   struct sdhci_host *host;
+   int i, node;
+
+   debug(%s: count = %d\n, __func__, count);
+
+   /* build sdhci_host[] for each 

[U-Boot] [PATCH V4 05/12] board:samsung: move checkboard to common file

2014-03-04 Thread Piotr Wilczek
The checkboard function's implementation is common for all
DT supporting boards and should be placed in the board common file.

Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Chander Kashyap k.chan...@samsung.com
Cc: Rajeshwari S Shinde rajeshwar...@samsung.com
Cc: Amar amarendra...@samsung.com

Acked-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes for v4:
 - none

Changes for v3:
 - none

Changes for v2:
 - new patch

 board/samsung/common/board.c| 12 
 board/samsung/smdk5250/exynos5-dt.c | 15 ---
 board/samsung/smdk5420/smdk5420.c   | 15 ---
 3 files changed, 12 insertions(+), 30 deletions(-)

diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index cd873bc..f8562b2 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -377,7 +377,19 @@ int board_mmc_init(bd_t *bis)
return ret;
 }
 #endif
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+   const char *board_name;
+
+   board_name = fdt_getprop(gd-fdt_blob, 0, model, NULL);
+   printf(Board: %s\n, board_name ? board_name : unknown);
+
+   return 0;
+}
 #endif
+#endif /* CONFIG_OF_CONTROL */
 
 #ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
diff --git a/board/samsung/smdk5250/exynos5-dt.c 
b/board/samsung/smdk5250/exynos5-dt.c
index 5fb8664..b22fba5 100644
--- a/board/samsung/smdk5250/exynos5-dt.c
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -45,21 +45,6 @@ int exynos_init(void)
return 0;
 }
 
-#ifdef CONFIG_DISPLAY_BOARDINFO
-int checkboard(void)
-{
-   const char *board_name;
-
-   board_name = fdt_getprop(gd-fdt_blob, 0, model, NULL);
-   if (board_name == NULL)
-   printf(\nUnknown Board\n);
-   else
-   printf(\nBoard: %s\n, board_name);
-
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_LCD
 void exynos_cfg_lcd_gpio(void)
 {
diff --git a/board/samsung/smdk5420/smdk5420.c 
b/board/samsung/smdk5420/smdk5420.c
index 3ad2ad0..e4606ec 100644
--- a/board/samsung/smdk5420/smdk5420.c
+++ b/board/samsung/smdk5420/smdk5420.c
@@ -142,18 +142,3 @@ int board_get_revision(void)
 {
return 0;
 }
-
-#ifdef CONFIG_DISPLAY_BOARDINFO
-int checkboard(void)
-{
-   const char *board_name;
-
-   board_name = fdt_getprop(gd-fdt_blob, 0, model, NULL);
-   if (board_name == NULL)
-   printf(\nUnknown Board\n);
-   else
-   printf(\nBoard: %s\n, board_name);
-
-   return 0;
-}
-#endif
-- 
1.8.3.2

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[U-Boot] [PATCH V4 09/12] board:origen: Enable device tree on Origen

2014-03-04 Thread Piotr Wilczek
This patch enables to run Origen board on device tree.

Uart, DRAM and MMC init functions are removed as their
generic replacements form the common board file are used.

The config file is modified to contain only board specific options.

Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Chander Kashyap k.chan...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes for v4:
 - define CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, CONFIG_CMD_I2C at each board

Changes for v3:
 - dts file moved to arch/arm/dts

Changes for v2:
 - no changes

 arch/arm/dts/Makefile  |   2 +
 arch/arm/dts/exynos4210-origen.dts |  45 +++
 board/samsung/origen/origen.c  | 112 +++--
 include/configs/origen.h   | 110 ++--
 4 files changed, 87 insertions(+), 182 deletions(-)
 create mode 100644 arch/arm/dts/exynos4210-origen.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 2658911..7abca75 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1,3 +1,5 @@
+dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb
+
 dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5250-snow.dtb \
exynos5250-smdk5250.dtb \
diff --git a/arch/arm/dts/exynos4210-origen.dts 
b/arch/arm/dts/exynos4210-origen.dts
new file mode 100644
index 000..5c9d2ae
--- /dev/null
+++ b/arch/arm/dts/exynos4210-origen.dts
@@ -0,0 +1,45 @@
+/*
+ * Samsung's Exynos4210 based Origen board device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ skeleton.dtsi
+/include/ exynos4.dtsi
+
+/ {
+   model = Insignal Origen evaluation board based on Exynos4210;
+   compatible = insignal,origen, samsung,exynos4210;
+
+   chosen {
+   bootargs =;
+   };
+
+   aliases {
+   serial0 = /serial@1380;
+   console = /serial@1382;
+   mmc2 = sdhci@1253;
+   };
+
+   sdhci@1251 {
+   status = disabled;
+   };
+
+   sdhci@1252 {
+   status = disabled;
+   };
+
+   sdhci@1253 {
+   samsung,bus-width = 4;
+   samsung,timing = 1 2 3;
+   cd-gpios = gpio 0x2008002 0;
+   };
+
+   sdhci@1254 {
+   status = disabled;
+   };
+};
\ No newline at end of file
diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c
index 15f77ca..d502f02 100644
--- a/board/samsung/origen/origen.c
+++ b/board/samsung/origen/origen.c
@@ -11,129 +11,35 @@
 #include asm/arch/mmc.h
 #include asm/arch/periph.h
 #include asm/arch/pinmux.h
+#include usb.h
 
 DECLARE_GLOBAL_DATA_PTR;
-struct exynos4_gpio_part1 *gpio1;
-struct exynos4_gpio_part2 *gpio2;
 
-int board_init(void)
+u32 get_board_rev(void)
 {
-   gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
-   gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
-
-   gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
return 0;
 }
 
-static int board_uart_init(void)
+int exynos_init(void)
 {
-   int err;
-
-   err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
-   if (err) {
-   debug(UART0 not configured\n);
-   return err;
-   }
-
-   err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
-   if (err) {
-   debug(UART1 not configured\n);
-   return err;
-   }
-
-   err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
-   if (err) {
-   debug(UART2 not configured\n);
-   return err;
-   }
-
-   err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
-   if (err) {
-   debug(UART3 not configured\n);
-   return err;
-   }
-
return 0;
 }
 
-#ifdef CONFIG_BOARD_EARLY_INIT_F
-int board_early_init_f(void)
-{
-   int err;
-   err = board_uart_init();
-   if (err) {
-   debug(UART init failed\n);
-   return err;
-   }
-   return err;
-}
-#endif
-
-int dram_init(void)
+int board_usb_init(int index, enum usb_init_type init)
 {
-   gd-ram_size= get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
-   + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
-   + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
-   + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
-
return 0;
 }
 
-void dram_init_banksize(void)
-{
-   gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
-   gd-bd-bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
-   PHYS_SDRAM_1_SIZE);
-   gd-bd-bi_dram[1].start = PHYS_SDRAM_2;
-   gd-bd-bi_dram[1].size = 

[U-Boot] [PATCH V4 08/12] arm:exynos: enable sdhci and misc_init to common board

2014-03-04 Thread Piotr Wilczek
This patch enables sdhci initialisation and misc_init_r in common board
file for all exynos 4 based boards.

Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes for v4:
 - none

Changes for v3:
 - none

Changes for v2:
 - new patch

 board/samsung/common/board.c | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index a74b044..e95e9c4 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -22,6 +22,8 @@
 #include asm/arch/power.h
 #include power/pmic.h
 #include asm/arch/sromc.h
+#include lcd.h
+#include samsung/misc.h
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -183,6 +185,7 @@ int power_init_board(void)
 #endif
 
 #ifdef CONFIG_OF_CONTROL
+#ifdef CONFIG_SMC911X
 static int decode_sromc(const void *blob, struct fdt_sromc *config)
 {
int err;
@@ -206,6 +209,7 @@ static int decode_sromc(const void *blob, struct fdt_sromc 
*config)
}
return 0;
 }
+#endif
 
 int board_eth_init(bd_t *bis)
 {
@@ -263,10 +267,18 @@ int board_mmc_init(bd_t *bis)
 {
int ret;
 
+#ifdef CONFIG_SDHCI
+   /* mmc initializattion for available channels */
+   ret = exynos_mmc_init(gd-fdt_blob);
+   if (ret)
+   debug(mmc init failed\n);
+#endif
+#ifdef CONFIG_DWMMC
/* dwmmc initializattion for available channels */
ret = exynos_dwmmc_init(gd-fdt_blob);
if (ret)
debug(dwmmc init failed\n);
+#endif
 
return ret;
 }
@@ -315,3 +327,21 @@ int arch_early_init_r(void)
 
return 0;
 }
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+   set_board_info();
+#endif
+#ifdef CONFIG_LCD_MENU
+   keys_init();
+   check_boot_mode();
+#endif
+#ifdef CONFIG_CMD_BMP
+   if (panel_info.logo_on)
+   draw_logo();
+#endif
+   return 0;
+}
+#endif
-- 
1.8.3.2

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[U-Boot] [PATCH V4 06/12] arm:exynos: add common DTS file for exynos 4

2014-03-04 Thread Piotr Wilczek
This patch adds common dtsi file and config header for all
Exynos 4 based boards.

Patch additionaly adds board specific (weak) functions for
board_early_init_f and board_power_init functions.

Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes for v4:
 - none

Changes for v3:
 - none

Changes for v2:
 - reuse existing common board.c file

 arch/arm/dts/exynos4.dtsi| 138 +++
 arch/arm/include/asm/arch-exynos/board.h |  12 +++
 board/samsung/common/board.c |  18 +++-
 include/configs/exynos4-dt.h | 138 +++
 4 files changed, 304 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/dts/exynos4.dtsi
 create mode 100644 include/configs/exynos4-dt.h

diff --git a/arch/arm/dts/exynos4.dtsi b/arch/arm/dts/exynos4.dtsi
new file mode 100644
index 000..71dc7eb
--- /dev/null
+++ b/arch/arm/dts/exynos4.dtsi
@@ -0,0 +1,138 @@
+/*
+ * Samsung's Exynos4 SoC common device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/include/ skeleton.dtsi
+
+/ {
+   serial@1380 {
+   compatible = samsung,exynos4210-uart;
+   reg = 0x1380 0x3c;
+   id = 0;
+   };
+
+   serial@1381 {
+   compatible = samsung,exynos4210-uart;
+   reg = 0x1381 0x3c;
+   id = 1;
+   };
+
+   serial@1382 {
+   compatible = samsung,exynos4210-uart;
+   reg = 0x1382 0x3c;
+   id = 2;
+   };
+
+   serial@1383 {
+   compatible = samsung,exynos4210-uart;
+   reg = 0x1383 0x3c;
+   id = 3;
+   };
+
+   serial@1384 {
+   compatible = samsung,exynos4210-uart;
+   reg = 0x1384 0x3c;
+   id = 4;
+   };
+
+   i2c@1386 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = samsung,s3c2440-i2c;
+   interrupts = 0 0 0;
+   };
+
+   i2c@1387 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = samsung,s3c2440-i2c;
+   interrupts = 1 1 0;
+   };
+
+   i2c@1388 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = samsung,s3c2440-i2c;
+   interrupts = 2 2 0;
+   };
+
+   i2c@1389 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = samsung,s3c2440-i2c;
+   interrupts = 3 3 0;
+   };
+
+   i2c@138a {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = samsung,s3c2440-i2c;
+   interrupts = 4 4 0;
+   };
+
+   i2c@138b {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = samsung,s3c2440-i2c;
+   interrupts = 5 5 0;
+   };
+
+   i2c@138c {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = samsung,s3c2440-i2c;
+   interrupts = 6 6 0;
+   };
+
+   i2c@138d {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = samsung,s3c2440-i2c;
+   interrupts = 7 7 0;
+   };
+
+   sdhci@1251 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = samsung,exynos-mmc;
+   reg = 0x1251 0x1000;
+   interrupts = 0 75 0;
+   };
+
+   sdhci@1252 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = samsung,exynos-mmc;
+   reg = 0x1252 0x1000;
+   interrupts = 0 76 0;
+   };
+
+   sdhci@1253 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = samsung,exynos-mmc;
+   reg = 0x1253 0x1000;
+   interrupts = 0 77 0;
+   };
+
+   sdhci@1254 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = samsung,exynos-mmc;
+   reg = 0x1254 0x1000;
+   interrupts = 0 78 0;
+   };
+
+   gpio: gpio {
+   gpio-controller;
+   #gpio-cells = 2;
+
+   interrupt-controller;
+   #interrupt-cells = 2;
+   };
+};
diff --git a/arch/arm/include/asm/arch-exynos/board.h 
b/arch/arm/include/asm/arch-exynos/board.h
index 243fb12..1b1cd0d 100644
--- a/arch/arm/include/asm/arch-exynos/board.h
+++ b/arch/arm/include/asm/arch-exynos/board.h
@@ -14,4 +14,16 @@
  */
 int exynos_init(void);
 
+/*
+ * Exynos board specific 

[U-Boot] [PATCH V4 07/12] board:samsung:common: move max77686 init function

2014-03-04 Thread Piotr Wilczek
This patch moves board specific max77686 init function from
common board to smdk5250 board file.

Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Rajeshwari S Shinde rajeshwar...@samsung.com
Cc: Rajeshwari Birje rajeshwari.bi...@gmail.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes for v4:
 - none

Changes for v3:
 - max77686 init function is moved to smdk5250 board file

Changes for v2:
 - new patch

 board/samsung/common/board.c  | 120 
 board/samsung/smdk5250/smdk5250.c | 125 ++
 2 files changed, 125 insertions(+), 120 deletions(-)

diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index cf78d36..a74b044 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -22,7 +22,6 @@
 #include asm/arch/power.h
 #include power/pmic.h
 #include asm/arch/sromc.h
-#include power/max77686_pmic.h
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -175,129 +174,10 @@ static int board_init_cros_ec_devices(const void *blob)
 #endif
 
 #if defined(CONFIG_POWER)
-#ifdef CONFIG_POWER_MAX77686
-static int pmic_reg_update(struct pmic *p, int reg, uint regval)
-{
-   u32 val;
-   int ret = 0;
-
-   ret = pmic_reg_read(p, reg, val);
-   if (ret) {
-   debug(%s: PMIC %d register read failed\n, __func__, reg);
-   return -1;
-   }
-   val |= regval;
-   ret = pmic_reg_write(p, reg, val);
-   if (ret) {
-   debug(%s: PMIC %d register write failed\n, __func__, reg);
-   return -1;
-   }
-   return 0;
-}
-
-static int max77686_init(void)
-{
-   struct pmic *p;
-
-   if (pmic_init(I2C_PMIC))
-   return -1;
-
-   p = pmic_get(MAX77686_PMIC);
-   if (!p)
-   return -ENODEV;
-
-   if (pmic_probe(p))
-   return -1;
-
-   if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN))
-   return -1;
-
-   if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT,
-   MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V))
-   return -1;
-
-   /* VDD_MIF */
-   if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT,
-  MAX77686_BUCK1OUT_1V)) {
-   debug(%s: PMIC %d register write failed\n, __func__,
- MAX77686_REG_PMIC_BUCK1OUT);
-   return -1;
-   }
-
-   if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL,
-   MAX77686_BUCK1CTRL_EN))
-   return -1;
-
-   /* VDD_ARM */
-   if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1,
-  MAX77686_BUCK2DVS1_1_3V)) {
-   debug(%s: PMIC %d register write failed\n, __func__,
- MAX77686_REG_PMIC_BUCK2DVS1);
-   return -1;
-   }
-
-   if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1,
-   MAX77686_BUCK2CTRL_ON))
-   return -1;
-
-   /* VDD_INT */
-   if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1,
-  MAX77686_BUCK3DVS1_1_0125V)) {
-   debug(%s: PMIC %d register write failed\n, __func__,
- MAX77686_REG_PMIC_BUCK3DVS1);
-   return -1;
-   }
-
-   if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL,
-   MAX77686_BUCK3CTRL_ON))
-   return -1;
-
-   /* VDD_G3D */
-   if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1,
-  MAX77686_BUCK4DVS1_1_2V)) {
-   debug(%s: PMIC %d register write failed\n, __func__,
- MAX77686_REG_PMIC_BUCK4DVS1);
-   return -1;
-   }
-
-   if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1,
-   MAX77686_BUCK3CTRL_ON))
-   return -1;
-
-   /* VDD_LDO2 */
-   if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1,
-   MAX77686_LD02CTRL1_1_5V | EN_LDO))
-   return -1;
-
-   /* VDD_LDO3 */
-   if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1,
-   MAX77686_LD03CTRL1_1_8V | EN_LDO))
-   return -1;
-
-   /* VDD_LDO5 */
-   if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1,
-   MAX77686_LD05CTRL1_1_8V | EN_LDO))
-   return -1;
-
-   /* VDD_LDO10 */
-   if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1,
-   MAX77686_LD10CTRL1_1_8V | EN_LDO))
-   return -1;
-
-   return 0;
-}
-#endif
-
 int power_init_board(void)
 {
-   int ret = 0;
-
set_ps_hold_ctrl();
 
-#ifdef CONFIG_POWER_MAX77686
-   ret = max77686_init();
-#endif
-
return exynos_power_init();
 }
 #endif
diff --git a/board/samsung/smdk5250/smdk5250.c 
b/board/samsung/smdk5250/smdk5250.c
index a69f73d..28a6d9e 100644
--- 

[U-Boot] [PATCH V4 10/12] board:universal: Enable device tree on Universal

2014-03-04 Thread Piotr Wilczek
This patch enables to run Universal board on device tree.

Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com

Acked-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes for v4:
 - define CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, CONFIG_CMD_I2C at each board

Changes for v3:
 - dts file moved to arch/arm/dts

Changes for v2:
 - no changes

 arch/arm/dts/Makefile  |   3 +-
 arch/arm/dts/exynos4210-universal_c210.dts |  83 
 board/samsung/universal_c210/universal.c   | 204 -
 include/configs/s5pc210_universal.h| 152 +++--
 4 files changed, 185 insertions(+), 257 deletions(-)
 create mode 100644 arch/arm/dts/exynos4210-universal_c210.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7abca75..d30954c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1,4 +1,5 @@
-dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb
+dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
+   exynos4210-universal_c210.dtb
 
 dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5250-snow.dtb \
diff --git a/arch/arm/dts/exynos4210-universal_c210.dts 
b/arch/arm/dts/exynos4210-universal_c210.dts
new file mode 100644
index 000..1cdd981
--- /dev/null
+++ b/arch/arm/dts/exynos4210-universal_c210.dts
@@ -0,0 +1,83 @@
+/*
+ * Samsung's Exynos4210 based Universal C210 board device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ exynos4.dtsi
+
+/ {
+   model = Samsung Universal C210 based on Exynos4210 rev0;
+   compatible = samsung,universal_c210, samsung,exynos4210;
+
+   aliases {
+   serial0 = /serial@1380;
+   console = /serial@1382;
+   mmc0 = sdhci@1251;
+   mmc2 = sdhci@1253;
+   };
+
+   sdhci@1251 {
+   samsung,bus-width = 8;
+   samsung,timing = 1 3 3;
+   pwr-gpios = gpio 0x2008002 0;
+   };
+
+   sdhci@1252 {
+   status = disabled;
+   };
+
+   sdhci@1253 {
+   samsung,bus-width = 4;
+   samsung,timing = 1 2 3;
+   cd-gpios = gpio 0x20c6004 0;
+   };
+
+   sdhci@1254 {
+   status = disabled;
+   };
+
+   fimd@11c0 {
+   compatible = samsung,exynos-fimd;
+   reg = 0x11c0 0xa4;
+
+   samsung,vl-freq = 60;
+   samsung,vl-col = 480;
+   samsung,vl-row = 800;
+   samsung,vl-width = 480;
+   samsung,vl-height = 800;
+
+   samsung,vl-clkp = 0;
+   samsung,vl-oep = 0;
+   samsung,vl-hsp = 1;
+   samsung,vl-vsp = 1;
+   samsung,vl-dp = 1;
+   samsung,vl-bpix = 4;
+
+   samsung,vl-hspw = 2;
+   samsung,vl-hbpd = 16;
+   samsung,vl-hfpd = 16;
+   samsung,vl-vspw = 2;
+   samsung,vl-vbpd = 8;
+   samsung,vl-vfpd = 8;
+   samsung,vl-cmd-allow-len = 0xf;
+
+   samsung,pclk_name = 1;
+   samsung,sclk_div = 1;
+
+   samsung,winid = 0;
+   samsung,power-on-delay = 1;
+   samsung,interface-mode = 1;
+   samsung,mipi-enabled = 0;
+   samsung,dp-enabled;
+   samsung,dual-lcd-enabled;
+
+   samsung,logo-on = 1;
+   samsung,resolution = 0;
+   samsung,rgb-mode = 0;
+   };
+};
diff --git a/board/samsung/universal_c210/universal.c 
b/board/samsung/universal_c210/universal.c
index 96da7e0..82249d3 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -13,16 +13,17 @@
 #include asm/gpio.h
 #include asm/arch/adc.h
 #include asm/arch/gpio.h
-#include asm/arch/mmc.h
 #include asm/arch/pinmux.h
 #include asm/arch/watchdog.h
-#include libtizen.h
 #include ld9040.h
 #include power/pmic.h
+#include usb.h
 #include usb/s3c_udc.h
 #include asm/arch/cpu.h
 #include power/max8998_pmic.h
+#include libtizen.h
 #include samsung/misc.h
+#include usb_mass_storage.h
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -42,7 +43,7 @@ static int get_hwrev(void)
 
 static void init_pmic_lcd(void);
 
-int power_init_board(void)
+int exynos_power_init(void)
 {
int ret;
 
@@ -59,22 +60,6 @@ int power_init_board(void)
return 0;
 }
 
-int dram_init(void)
-{
-   gd-ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
-   get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
-
-   return 0;
-}
-
-void dram_init_banksize(void)
-{
-   gd-bd-bi_dram[0].start = PHYS_SDRAM_1;
-   gd-bd-bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-   

[U-Boot] [PATCH V4 11/12] board:trats: Enable device tree on Trats

2014-03-04 Thread Piotr Wilczek
This patch enables to run Trats board on device tree.

Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
CC: Lukasz Majewski l.majew...@samsung.com
---
Changes for v4:
 - use - hypen in DT bindings
 - define CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, CONFIG_CMD_I2C at each board

Changes for v3:
 - dts file moved to arch/arm/dts

Changes for v2:
 - no changes

 arch/arm/dts/Makefile |   3 +-
 arch/arm/dts/exynos4210-trats.dts | 120 +
 board/samsung/trats/trats.c   | 213 ++
 include/configs/trats.h   | 206 ++--
 4 files changed, 185 insertions(+), 357 deletions(-)
 create mode 100644 arch/arm/dts/exynos4210-trats.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d30954c..20c081e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1,5 +1,6 @@
 dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
-   exynos4210-universal_c210.dtb
+   exynos4210-universal_c210.dtb \
+   exynos4210-trats.dtb
 
 dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5250-snow.dtb \
diff --git a/arch/arm/dts/exynos4210-trats.dts 
b/arch/arm/dts/exynos4210-trats.dts
new file mode 100644
index 000..992e023
--- /dev/null
+++ b/arch/arm/dts/exynos4210-trats.dts
@@ -0,0 +1,120 @@
+/*
+ * Samsung's Exynos4210 based Trats board device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ exynos4.dtsi
+
+/ {
+   model = Samsung Trats based on Exynos4210;
+   compatible = samsung,trats, samsung,exynos4210;
+
+   config {
+   samsung,dsim-device-name = s6e8ax0;
+   };
+
+   aliases {
+   i2c0 = /i2c@1386;
+   i2c1 = /i2c@1387;
+   i2c2 = /i2c@1388;
+   i2c3 = /i2c@1389;
+   i2c4 = /i2c@138a;
+   i2c5 = /i2c@138b;
+   i2c6 = /i2c@138c;
+   i2c7 = /i2c@138d;
+   serial0 = /serial@1380;
+   console = /serial@1382;
+   mmc0 = sdhci@1251;
+   mmc2 = sdhci@1253;
+   };
+
+   fimd@11c0 {
+   compatible = samsung,exynos-fimd;
+   reg = 0x11c0 0xa4;
+
+   samsung,vl-freq = 60;
+   samsung,vl-col = 720;
+   samsung,vl-row = 1280;
+   samsung,vl-width = 720;
+   samsung,vl-height = 1280;
+
+   samsung,vl-clkp = 0;
+   samsung,vl-oep = 0;
+   samsung,vl-hsp = 1;
+   samsung,vl-vsp = 1;
+   samsung,vl-dp = 1;
+   samsung,vl-bpix = 4;
+
+   samsung,vl-hspw = 5;
+   samsung,vl-hbpd = 10;
+   samsung,vl-hfpd = 10;
+   samsung,vl-vspw = 2;
+   samsung,vl-vbpd = 1;
+   samsung,vl-vfpd = 13;
+   samsung,vl-cmd-allow-len = 0xf;
+
+   samsung,winid = 3;
+   samsung,power-on-delay = 30;
+   samsung,interface-mode = 1;
+   samsung,mipi-enabled = 1;
+   samsung,dp-enabled;
+   samsung,dual-lcd-enabled;
+
+   samsung,logo-on = 1;
+   samsung,resolution = 0;
+   samsung,rgb-mode = 0;
+   };
+
+   mipidsi@11c8 {
+   compatible = samsung,exynos-mipi-dsi;
+   reg = 0x11c8 0x5c;
+
+   samsung,dsim-config-e-interface = 1;
+   samsung,dsim-config-e-virtual-ch = 0;
+   samsung,dsim-config-e-pixel-format = 7;
+   samsung,dsim-config-e-burst-mode = 1;
+   samsung,dsim-config-e-no-data-lane = 3;
+   samsung,dsim-config-e-byte-clk = 0;
+   samsung,dsim-config-hfp = 1;
+
+   samsung,dsim-config-p = 3;
+   samsung,dsim-config-m = 120;
+   samsung,dsim-config-s = 1;
+
+   samsung,dsim-config-pll-stable-time = 500;
+   samsung,dsim-config-esc-clk = 2000;
+   samsung,dsim-config-stop-holding-cnt = 0x7ff;
+   samsung,dsim-config-bta-timeout = 0xff;
+   samsung,dsim-config-rx-timeout = 0x;
+
+   samsung,dsim-device-id = 0x;
+   samsung,dsim-device-bus-id = 0;
+
+   samsung,dsim-device-reverse-panel = 1;
+   };
+
+   sdhci@1251 {
+   samsung,bus-width = 8;
+   samsung,timing = 1 3 3;
+   pwr-gpios = gpio 0x2008002 0;
+   };
+
+   sdhci@1252 {
+   status = disabled;
+   };
+
+   sdhci@1253 {
+   samsung,bus-width = 4;
+   samsung,timing = 1 2 3;
+  

[U-Boot] [PATCH V4 12/12] board:trats2: Enable device tree on Trats2

2014-03-04 Thread Piotr Wilczek
This patch enables to run Trats2 board on device tree.

Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
Changes for v4:
 - use - hypen in DT bindings
 - define CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, CONFIG_CMD_I2C at each board

Changes for v3:
 - dts file moved to arch/arm/dts

Changes for v2:
 - fixed mmc2 address in DT

 arch/arm/dts/Makefile  |   3 +-
 arch/arm/dts/exynos4412-trats2.dts | 434 +
 board/samsung/trats2/trats2.c  | 233 +---
 include/configs/trats2.h   | 204 -
 4 files changed, 483 insertions(+), 391 deletions(-)
 create mode 100644 arch/arm/dts/exynos4412-trats2.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 20c081e..fa6f496 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1,6 +1,7 @@
 dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
exynos4210-universal_c210.dtb \
-   exynos4210-trats.dtb
+   exynos4210-trats.dtb \
+   exynos4412-trats2.dtb
 
 dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5250-snow.dtb \
diff --git a/arch/arm/dts/exynos4412-trats2.dts 
b/arch/arm/dts/exynos4412-trats2.dts
new file mode 100644
index 000..7d32067
--- /dev/null
+++ b/arch/arm/dts/exynos4412-trats2.dts
@@ -0,0 +1,434 @@
+/*
+ * Samsung's Exynos4412 based Trats2 board device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ exynos4.dtsi
+
+/ {
+   model = Samsung Trats2 based on Exynos4412;
+   compatible = samsung,trats2, samsung,exynos4412;
+
+   config {
+   samsung,dsim-device-name = s6e8ax0;
+   };
+
+   aliases {
+   i2c0 = /i2c@1386;
+   i2c1 = /i2c@1387;
+   i2c2 = /i2c@1388;
+   i2c3 = /i2c@1389;
+   i2c4 = /i2c@138a;
+   i2c5 = /i2c@138b;
+   i2c6 = /i2c@138c;
+   i2c7 = /i2c@138d;
+   serial0 = /serial@1380;
+   console = /serial@1382;
+   mmc0 = sdhci@1251;
+   mmc2 = sdhci@1253;
+   };
+
+   i2c@138d {
+   samsung,i2c-sda-delay = 100;
+   samsung,i2c-slave-addr = 0x10;
+   samsung,i2c-max-bus-freq = 10;
+   status = okay;
+
+   max77686_pmic@09 {
+   compatible = maxim,max77686_pmic;
+   interrupts = 7 0;
+   reg = 0x09 0 0;
+   #clock-cells = 1;
+
+   voltage-regulators {
+   ldo1_reg: ldo1 {
+   regulator-compatible = LDO1;
+   regulator-name = VALIVE_1.0V_AP;
+   regulator-min-microvolt = 100;
+   regulator-max-microvolt = 100;
+   regulator-always-on;
+   regulator-mem-on;
+   };
+
+   ldo2_reg: ldo2 {
+   regulator-compatible = LDO2;
+   regulator-name = VM1M2_1.2V_AP;
+   regulator-min-microvolt = 120;
+   regulator-max-microvolt = 120;
+   regulator-always-on;
+   regulator-mem-on;
+   };
+
+   ldo3_reg: ldo3 {
+   regulator-compatible = LDO3;
+   regulator-name = VCC_1.8V_AP;
+   regulator-min-microvolt = 180;
+   regulator-max-microvolt = 180;
+   regulator-always-on;
+   regulator-mem-on;
+   };
+
+   ldo4_reg: ldo4 {
+   regulator-compatible = LDO4;
+   regulator-name = VCC_2.8V_AP;
+   regulator-min-microvolt = 280;
+   regulator-max-microvolt = 280;
+   regulator-always-on;
+   regulator-mem-on;
+   };
+
+   ldo5_reg: ldo5 {
+   regulator-compatible = LDO5;
+   regulator-name = VCC_1.8V_IO;
+ 

Re: [U-Boot] [PATCH v6] socfpga: Adding Scan Manager driver

2014-03-04 Thread Chin Liang See
Hi Michal,

On Fri, 2014-02-28 at 11:17 +0100, Michal Simek wrote:
 On 02/27/2014 05:03 PM, Chin Liang See wrote:
  Scan Manager driver will be called to configure the IOCSR
  scan chain. This configuration will setup the IO buffer settings
  
  Signed-off-by: Chin Liang See cl...@altera.com
  Cc: Dinh Nguyen dingu...@altera.com
  Cc: Wolfgang Denk w...@denx.de
  CC: Pavel Machek pa...@denx.de
  Cc: Tom Rini tr...@ti.com
  Cc: Albert Aribaud albert.u.b...@aribaud.net
  ---
  Changes for v6
  - Fixed various coding style issue
  Changes for v5
  - Removal of additional blank line
  - Added comment for magic number
  Changes for v4
  - avoid code duplication by add goto error
  - include underscore to variables name
  Changes for v3
  - merge the handoff file and driver into single patch
  Changes for v2
  - rebase with latest v2014.01-rc1
  ---
   arch/arm/cpu/armv7/socfpga/Makefile|2 +-
   arch/arm/cpu/armv7/socfpga/scan_manager.c  |  211 +++
   arch/arm/cpu/armv7/socfpga/spl.c   |4 +
   arch/arm/include/asm/arch-socfpga/scan_manager.h   |   96 +++
   .../include/asm/arch-socfpga/socfpga_base_addrs.h  |1 +
   board/altera/socfpga/iocsr_config.c|  657 
  
   board/altera/socfpga/iocsr_config.h|   17 +
 
 
 I still have problem with content of these two files.
 In iocsr_config.c is ~600 lines which targets just one specific hardware 
 design
 configuration. I can't see any reason why this should go to mainline
 and stay there. Because it brings no value.
 
 I would recommend you just to define that arrays like this
 
 const unsigned long iocsr_scan_chain0_table[];
 const unsigned long iocsr_scan_chain0_table[];
 ...
 
 + in header
 #define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH0
 #define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH0
 #define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH0
 #define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH0
 
 and write these 2 files by hand. Then your users will just replace them
 by hand for specific board/design.

Actually the intention is that user can pull the code from git and build
it. We want to avoid any tools dependency here. 

At same time, these files are located inside board folders. If user have
different boards, they will have new set of folders here their own
handoff files. From there, there won't the need to regenerate everytime.

Thanks
Chin Liang

 
 Thanks,
 Michal
 


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Re: [U-Boot] [PATCH] malta: correct tcl script path in README.malta

2014-03-04 Thread Paul Burton
On Tue, Mar 04, 2014 at 02:48:42PM +, James Hogan wrote:
 README.malta referred to board/malta, but malta has now been moved
 within board/imgtec/, so correct the path.

Well spotted :)

Paul

 
 Signed-off-by: James Hogan james.ho...@imgtec.com
 Cc: Daniel Schwierzeck daniel.schwierz...@googlemail.com
 Cc: Paul Burton paul.bur...@imgtec.com
 ---
  doc/README.malta | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/doc/README.malta b/doc/README.malta
 index a495d02..c8db8a0 100644
 --- a/doc/README.malta
 +++ b/doc/README.malta
 @@ -9,7 +9,7 @@ How to flash using a MIPS Navigator Probe:
  
- Within Navigator Console run the following commands:
  
 -  source /path/to/u-boot/board/malta/flash-malta-boot.tcl
 +  source /path/to/u-boot/board/imgtec/malta/flash-malta-boot.tcl
reset
flash-boot /path/to/u-boot/u-boot.bin
  
 -- 
 1.8.1.2
 
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Re: [U-Boot] Help with Raspberry Pi

2014-03-04 Thread Stephen Warren
On 03/03/2014 09:08 AM, Artur Sterz Uni wrote:
 is it possible to boot a raspbian Image with U-Boot on a Raspberry Pi?

Yes, I use Raspbian as the user-space for all my Pi development work. I
use an upstream/mainline kernel rather than the Pi Foundation's
downstream kernel though; I have no idea if the downstream kernel works
or not.
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Re: [U-Boot] [PATCH v6] socfpga: Adding Scan Manager driver

2014-03-04 Thread Michal Simek
On 03/04/2014 04:01 PM, Chin Liang See wrote:
 Hi Michal,
 
 On Fri, 2014-02-28 at 11:17 +0100, Michal Simek wrote:
 On 02/27/2014 05:03 PM, Chin Liang See wrote:
 Scan Manager driver will be called to configure the IOCSR
 scan chain. This configuration will setup the IO buffer settings

 Signed-off-by: Chin Liang See cl...@altera.com
 Cc: Dinh Nguyen dingu...@altera.com
 Cc: Wolfgang Denk w...@denx.de
 CC: Pavel Machek pa...@denx.de
 Cc: Tom Rini tr...@ti.com
 Cc: Albert Aribaud albert.u.b...@aribaud.net
 ---
 Changes for v6
 - Fixed various coding style issue
 Changes for v5
 - Removal of additional blank line
 - Added comment for magic number
 Changes for v4
 - avoid code duplication by add goto error
 - include underscore to variables name
 Changes for v3
 - merge the handoff file and driver into single patch
 Changes for v2
 - rebase with latest v2014.01-rc1
 ---
  arch/arm/cpu/armv7/socfpga/Makefile|2 +-
  arch/arm/cpu/armv7/socfpga/scan_manager.c  |  211 +++
  arch/arm/cpu/armv7/socfpga/spl.c   |4 +
  arch/arm/include/asm/arch-socfpga/scan_manager.h   |   96 +++
  .../include/asm/arch-socfpga/socfpga_base_addrs.h  |1 +
  board/altera/socfpga/iocsr_config.c|  657 
 
  board/altera/socfpga/iocsr_config.h|   17 +


 I still have problem with content of these two files.
 In iocsr_config.c is ~600 lines which targets just one specific hardware 
 design
 configuration. I can't see any reason why this should go to mainline
 and stay there. Because it brings no value.

 I would recommend you just to define that arrays like this

 const unsigned long iocsr_scan_chain0_table[];
 const unsigned long iocsr_scan_chain0_table[];
 ...

 + in header
 #define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH0
 #define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH0
 #define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH0
 #define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH0

 and write these 2 files by hand. Then your users will just replace them
 by hand for specific board/design.
 
 Actually the intention is that user can pull the code from git and build
 it. We want to avoid any tools dependency here. 

There is tool dependency even you don't want to have it. These files are
autogenerated by tools it means you already have dependency.

Also I expect that you can change all pins for uarts/ethernets/spi/i2c/etc
that's why there is no golden configuration for socfpga that's why
it is better to keep it empty just to compile it.

 At same time, these files are located inside board folders. If user have
 different boards, they will have new set of folders here their own
 handoff files. From there, there won't the need to regenerate everytime.

Please explain me one thing how many users will use this configuration?
Especially these ~600 lines?
I also expect that you can generate unlimited number of configuration for
the same board. It means this is just one configuration for one board
which you will use till the time when you find out a bug in your tools
and you will regenerate this.

Also I expect that socfpga_cyclone is family that's why you are also
missing connection to the real board that's why every socfpga user
will have to open tool and generate this configuration for the board
(Or can download it from web or get with the board).

It is the same situation which we have with zynq that's why I didn't
add our ps7_init file because it is just useless for others.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP - KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform




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[U-Boot] [PATCH] Cosmetic: Typo fixes

2014-03-04 Thread Vasili Galka
From: Vasili Galka vvv...@gmail.com

Signed-off-by: Vasili Galka vas...@visionmap.com
---
 include/spi_flash.h |6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/spi_flash.h b/include/spi_flash.h
index f79f0ea..1a11286 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -52,7 +52,7 @@ enum spi_dual_flash {
  * @sector_size:   Sector size of this device
  * @nr_sectors:No.of sectors on this device
  * @e_rd_cmd:  Enum list for read commands
- * @flags: Importent param, for flash specific behaviour
+ * @flags: Important param, for flash specific behaviour
  */
 struct spi_flash_params {
const char *name;
@@ -88,11 +88,11 @@ extern const struct spi_flash_params 
spi_flash_params_table[];
  * @memory_map:Address of read-only SPI flash access
  * @read:  Flash read ops: Read len bytes at offset into buf
  * Supported cmds: Fast Array Read
- * @write: Flash write ops: Write len bytes from buf into offeset
+ * @write: Flash write ops: Write len bytes from buf into offset
  * Supported cmds: Page Program
  * @erase: Flash erase ops: Erase len bytes from offset
  * Supported cmds: Sector erase 4K, 32K, 64K
- * return 0 - Sucess, 1 - Failure
+ * return 0 - Success, 1 - Failure
  */
 struct spi_flash {
struct spi_slave *spi;
-- 
1.7.9

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Re: [U-Boot] [PATCH 1/3] powerpc/p1010rdb: SECURE BOOT- define CONFIG_SYS_RAMBOOT for NAND boot

2014-03-04 Thread York Sun
On 01/27/2014 09:35 PM, Wolfgang Denk wrote:
 Dear Aneesh,
 
 In message 
 7f771c64c5c44208b24e38c75e159...@dm2pr03mb415.namprd03.prod.outlook.com you 
 wrote:

 Sorry for the misleading statement. Yes, CONFIG_SYS_RAMBOOT is for
 booting from RAM directly and we have used it for the same purpose in
 the patch. Let me try and explain.
 
 Mind the directly in this sentence, and no, you have not used it in
 this way.
 
 What I meant is that for P1010 like platforms for normal (non-secure)
 boot in case of NAND, we don't use the CONFIG_SYS_RAMBOOT as we
 don't boot from RAM directly in this case.
 
 You also do not boot directly from RAM in the secure case.
 
 However in case of secure boot, even for NAND, we boot from RAM
 directly with boot ROM (ISBC) code copying the image from NAND to
 RAM. So in P1010RDB.h config file, for NAND Secure boot, we have
 
 This is NOT a RAM boot.  This is a completely normal boot process from
 NAND.  You must not declare this as RAM booting, as it is NOT.
 
 defined CONFIG_RAMBOOT_NAND and then further are enabling
 CONFIG_SYS_RAMBOOT for the same.
 
 This is wrong.  You have the ROM boot loader booting from NAND and
 not from RAM.
 
 The name CONFIG_RAMBOOT_NAND is an oxymoron in itself (and it's
 undocumented as well).   This should be fixed, as it makes no sense.
 
 You cannot RAM-boot form NAND - you can always boot from a single
 boot device only - either NOR or NAND or SDCard or ... or RAM.
 

Let me try to get the bottom of the CONFIG_SYS_RAMBOOT.

When a complete u-boot image boots from RAM (DDR, SRAM, etc), we can call it
RAMBOOT regardless how the image is loaded there. It can be JTAG, PBI, or other
bootloader. This line becomes blurred when we have SPL, TPL, secure boot. We
need to go back to see why we had CONFIG_SYS_RAMBOOT at the first place. If I
remember correctly, we had this RAMBOOT because we didn't want u-boot to
initialized DRAM for obvious reason. If we still have the same purpose of
RAMBOOT, then it is not difficult to draw the line for current situations.

Any booting method which initializes DRAM in its complete image is not a
RAMBOOT. So clearly NAND boot has its own DDR init code, even sometimes using
fixed register settings. So a normal NAND boot is not RAMBOOT. If a u-boot image
is wrapped by another bootloader, and the bootloader is responsible to
initialize DRAM, the u-boot image runs from DRAM doesn't init DRAM again, this
u-boot is a RAMBOOT.

Now we are back to secure NAND boot. Does the secure boot mechanism initialize
DRAM and load a complete u-boot image from NAND to DRAM? If true, then we can
call that image a RAMBOOT. But if the image has its own code to initialize DRAM,
it is not a RAMBOOT.

Do we all agree on this clarification?

York

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Re: [U-Boot] [PATCH v2 1/2] nand/denali: Adding Denali NAND driver support

2014-03-04 Thread Scott Wood
On Tue, 2014-03-04 at 19:31 +0900, Masahiro Yamada wrote:
 Hello Scott, Chin,
 
 
   +/* this is a helper macro that allows us to
   + * format the bank into the proper bits for the controller */
   +#define BANK(x) ((x)  24)
   +
   +/* Interrupts are cleared by writing a 1 to the appropriate status bit */
   +static inline void clear_interrupt(uint32_t irq_mask)
   +{
   + uint32_t intr_status_reg = 0;
   + intr_status_reg = INTR_STATUS(denali.flash_bank);
   + __raw_writel(irq_mask, denali.flash_reg + intr_status_reg);
   +}
  
  Why are you using raw I/O accessors?  The Linux driver doesn't do this.
 
 Add ioread32/iowrite32 to arch/arm/include/asm/io.h
 and use them?

We probably should add them given they're the standard arch and bus
independent accessors in Linux, but you could also use readl()/writel().
Why did you choose the raw version?

 There is another problem.
 I think there is a cache coherency problem in this driver code.
 DMA is used in this driver but D-cache is never flushed.
 
 When D-cache is on (CONFIG_SYS_DCACHE_OFF is not defined),
 ARM processor writes to/reads from the buffer through D-cache.
 On the other hand, Denali NAND controller always wites to/reads from
 the buffer on physical memory.
 So, this driver writes/reads wrong data.
 
 I had to add flush_dcache_range() function call
 in denali_setup_dma_sequence().

Yes, in Linux this would have been handled through the DMA API.

-Scott


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Re: [U-Boot] Add 64-bit data support for memory commands

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 05:03:19PM -0800, York Sun wrote:

 Add 64-bit data for memory commands, such as md, mw, mm, cmp. The new
 size .q  is introduced.
 
 For 64-bit architecture, 64-bit data is enabled by default, by detecting
 compiler __LP64__. It is optional for other architectures.
 
 Signed-off-by: York Sun york...@freescale.com

Applied to u-boot/master, thanks!  Please note this introduces warnings
on mips64 boards because we can now better support 64bitness.  Or we
need to discuss things more but, lets get that started.  Thanks!

-- 
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Re: [U-Boot] [U-Boot, 01/10] drivers: net: cpsw: add support to have phy address from cpsw platform data

2014-03-04 Thread Tom Rini
On Tue, Feb 18, 2014 at 07:31:52AM -0500, Tom Rini wrote:

 From: Mugunthan V N mugunthan...@ti.com
 
 Some platforms like AM437x have different EVMs with different phy addresses,
 so this patch adds support for passing phy address via cpsw plaform data.
 Also renamed phy_id to phy_addr so better understanding of the code.
 
 Reviewed-by: Felipe Balbi ba...@ti.com
 Signed-off-by: Mugunthan V N mugunthan...@ti.com
 [trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335 pengwyn
 boards]
 Signed-off-by: Tom Rini tr...@ti.com

Applied to u-boot-ti/master, thanks!

Hannes, can you check the BuR boards please?  I'm fairly sure I did the
conversion correctly here.

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Re: [U-Boot] [U-Boot, 04/10] ARM: AM335x: add support for reading cpsw 2nd mac address from efuse

2014-03-04 Thread Tom Rini
On Tue, Feb 18, 2014 at 07:31:55AM -0500, Tom Rini wrote:

 From: Mugunthan V N mugunthan...@ti.com
 
 Adding support for reading cpsw 2nd mac address from efuse and pass it
 to kernel via dtb which will be used in dual emac mode of cpsw.
 Also adding mii command support to am335x common config.
 
 Acked-by: Tom Rini tr...@ti.com
 Signed-off-by: Mugunthan V N mugunthan...@ti.com

Applied to u-boot-ti/master, thanks!

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Re: [U-Boot] [U-Boot, 05/10] ARM: DRA7xx: add support for reading cpsw 2nd mac from efuse

2014-03-04 Thread Tom Rini
On Tue, Feb 18, 2014 at 07:31:56AM -0500, Tom Rini wrote:

 From: Mugunthan V N mugunthan...@ti.com
 
 Adding support for reading cpsw 2nd mac address from efuse and pass it
 to kernel via dtb which will be used in dual emac mode of cpsw.
 Also correct the bit masking of mac id read from the efuse.
 
 Acked-by: Tom Rini tr...@ti.com
 Signed-off-by: Mugunthan V N mugunthan...@ti.com

Applied to u-boot-ti/master, thanks!

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Re: [U-Boot] [U-Boot, 06/10] ARM: AM4372: Update EMIF registers for DDR3

2014-03-04 Thread Tom Rini
On Tue, Feb 18, 2014 at 07:31:57AM -0500, Tom Rini wrote:

 From: Lokesh Vutla lokeshvu...@ti.com
 
 Updating EMIF_PHY_CTRL and adding EMIF_READ_WRITE_EXECUTION_THRESHOLD
 registers.
 In EMIF_PHY_CTRL:
 Updating [4:0]READ_LATENCY to 8, because at higher frequencies like
 400MHz the read latency expected will be CL+3 as per tests from HW
 folks.
 Clearing [19]PHY_DIS_CALIB_RST bit as this is used onl for debug
 purpose. With out this resume is not working(Still waiting for PHY team
 to come back for better explanation).
 
 Signed-off-by: Lokesh Vutla lokeshvu...@ti.com

Applied to u-boot-ti/master, thanks!

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Re: [U-Boot] [U-Boot, 03/10] ARM: AM43xx: Add CPSW support to AM43xx EPOS and GP EVM

2014-03-04 Thread Tom Rini
On Tue, Feb 18, 2014 at 07:31:54AM -0500, Tom Rini wrote:

 From: Mugunthan V N mugunthan...@ti.com
 
 Adding support for CPSW to AM43xx EPOS nad GP EVM which is connected
 to RMII and RGMII phy respectively and enable cpsw in config.
 
 Reviewed-by: Felipe Balbi ba...@ti.com
 Signed-off-by: Mugunthan V N mugunthan...@ti.com

Applied to u-boot-ti/master, thanks!

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Re: [U-Boot] [U-Boot, 07/10] ARM: AM43xx: Add Ethernet boot support to SPL

2014-03-04 Thread Tom Rini
On Tue, Feb 18, 2014 at 07:31:58AM -0500, Tom Rini wrote:

 From: Mugunthan V N mugunthan...@ti.com
 
 Add Ethernet Boot support to SPL
 
 Acked-by: Tom Rini tr...@ti.com
 Signed-off-by: Mugunthan V N mugunthan...@ti.com

Applied to u-boot-ti/master, thanks!

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Re: [U-Boot] [U-Boot, 08/10] ARM: AM43xx: EMIF: configure self-refresh entry delay

2014-03-04 Thread Tom Rini
On Tue, Feb 18, 2014 at 07:31:59AM -0500, Tom Rini wrote:

 From: Dave Gerlach d-gerl...@ti.com
 
 Per a suggestion from the hardware team, program the emif_pwr_mgmt_ctrl
 and emif_pwr_mgmt_ctrl_shdw registers within the EMIF to hold the
 desired delay in cycles that the EMIF waits without an access to enter
 self-refresh, in this case 8192 cycles. With this, code desiring to
 enter self refresh only has to toggle one bit to enable it.
 
 Signed-off-by: Dave Gerlach d-gerl...@ti.com

Applied to u-boot-ti/master, thanks!

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Re: [U-Boot] [U-Boot, 09/10] ARM: AM43xx: Write sdram_config to secure_emif_sdram_config

2014-03-04 Thread Tom Rini
On Tue, Feb 18, 2014 at 07:32:00AM -0500, Tom Rini wrote:

 From: Dave Gerlach d-gerl...@ti.com
 
 The register secure_emif_sdram_config in control module is copied to
 the EMIF sdram_config register when it is coming out of DeepSleep0 in
 order to ensure that the EMIF comes up for the correct type of DDR.
 Without this, resume can hang from within the kernel.
 
 Signed-off-by: Dave Gerlach d-gerl...@ti.com

Applied to u-boot-ti/master, thanks!

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Re: [U-Boot] [U-Boot,v2,1/6] net: emaclite: Fix OF initialization

2014-03-04 Thread Tom Rini
On Mon, Feb 24, 2014 at 11:16:28AM +0100, Michal Simek wrote:

 - Add xilinx_emaclite_of_init to netdev.h
 - Remove global data pointer from the driver
 - Add better handling for error state.
 
 Signed-off-by: Michal Simek michal.si...@xilinx.com

Applied to u-boot/master, thanks!

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Re: [U-Boot] arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootup

2014-03-04 Thread Tom Rini
On Tue, Feb 25, 2014 at 11:07:22AM +0100, Stefan Roese wrote:

 Since the switch may be re-configured for VLAN usage in Linux (or any
 other OS), lets reset the switch to its default register values upon
 power-up. Otherwise network might not be available in U-Boot.
 
 Signed-off-by: Stefan Roese s...@denx.de
 Cc: Heiko Schocher h...@denx.de
 Cc: Roger Meier r.me...@siemens.com
 Cc: Lukas Stockmann lukas.stockm...@siemens.com
 Cc: Tom Rini tr...@ti.com

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Re: [U-Boot] [U-Boot, v2, 2/6] zynq: Do not use SPL OF initialization

2014-03-04 Thread Tom Rini
On Mon, Feb 24, 2014 at 11:16:29AM +0100, Michal Simek wrote:

 Disable CONFIG_OF_CONTROL for SPL compilation.
 
 Signed-off-by: Michal Simek michal.si...@xilinx.com

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Re: [U-Boot] [U-Boot,10/10] ARM: AM43xx: Change DDR3 Reset Value

2014-03-04 Thread Tom Rini
On Tue, Feb 18, 2014 at 07:32:01AM -0500, Tom Rini wrote:

 From: Dave Gerlach d-gerl...@ti.com
 
 The bit DDR3_RST_DEF_VAL inside CTRL_DDR_IO represents the default value
 of the ddr reset value for DDR3 before the EMIF takes over. We must have
 this bit set high so that on exit from DeepSleep0 within the kernel the
 reset line has the proper value.
 
 Signed-off-by: Dave Gerlach d-gerl...@ti.com

Applied to u-boot-ti/master, thanks!

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Re: [U-Boot] [U-Boot, v2, 4/6] mmc: zynq: Add OF initialization support

2014-03-04 Thread Tom Rini
On Mon, Feb 24, 2014 at 11:16:31AM +0100, Michal Simek wrote:

 Enable initialize sdhci from DTB.
 
 Signed-off-by: Michal Simek michal.si...@xilinx.com

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2, 3/6] net: gem: Add OF initialization support

2014-03-04 Thread Tom Rini
On Mon, Feb 24, 2014 at 11:16:30AM +0100, Michal Simek wrote:

 Gem can be directly initialized from DTB.
 
 Signed-off-by: Michal Simek michal.si...@xilinx.com

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v2, 6/6] serial: zynq: Add OF initialization support

2014-03-04 Thread Tom Rini
On Mon, Feb 24, 2014 at 11:16:33AM +0100, Michal Simek wrote:

 Add console selection from DTB which is enough to have
 OF driven solution.
 
 Signed-off-by: Michal Simek michal.si...@xilinx.com

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 3/8] nand_spl: simpc8313: move config.mk used only for nand_spl

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 02:51:00PM +0900, Masahiro Yamada wrote:

 board/sheldon/simpc8313/config.mk is used only for nand_spl.
 So it should go into nand_spl/board/sheldon/simpc8313/.
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com

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Re: [U-Boot] [U-Boot, 2/8] Makefile: delete unused variable LDSCRIPT_MAKEFILE_DIR

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 02:50:59PM +0900, Masahiro Yamada wrote:

 LDSCRIPT_MAKEFILE_DIR is not referenced from anywhere. Remove.
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com

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Re: [U-Boot] [U-Boot, v2, 5/6] zynq: Add OF ram initialization support

2014-03-04 Thread Tom Rini
On Mon, Feb 24, 2014 at 11:16:32AM +0100, Michal Simek wrote:

 Read ram size directly from DTB.
 
 Signed-off-by: Michal Simek michal.si...@xilinx.com
 

Applied to u-boot/master, thanks!

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Re: [U-Boot] kbuild: post: fix dependency tracking correctly

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 11:26:08AM +0900, Masahiro Yamada wrote:

 $(call if_changed,...) must take FORCE as a prerequite.
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 Acked-by: Simon Glass s...@chromium.org

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Re: [U-Boot] [U-Boot, 1/8] config.mk: Delete unused variable BCURDIR

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 02:50:58PM +0900, Masahiro Yamada wrote:

 This variable was abolished by Kbuild series.
 I forgot to delete it.
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com

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Re: [U-Boot] [U-Boot, RFC] nand_spl: display warning message to inform the end of nand_spl

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 05:51:11PM +0900, Masahiro Yamada wrote:

 Now we have two different frameworks for doing the same thing.
 I'd like to propose to drop nand_spl framework.
 How about deleting it before v2014.07 release?
 
 In the interim, this commit will display a warning message
 when compiling nand_spl board.
 
 Now we have 19 nand_spl boards:
 
   MPC8315ERDB_NAND
   SIMPC8313_LP
   SIMPC8313_SP
   MPC8536DS_NAND
   MPC8569MDS_NAND
   MPC8572DS_NAND
   P1023RDS_NAND
   P1011RDB_NAND
   P1020RDB_NAND
   P2010RDB_NAND
   P2020RDB_NAND
   acadia_nand
   bamboo_nand
   canyonlands_nand
   glacier_nand
   haleakala_nand
   kilauea_nand
   rainier_nand
   sequoia_nand
 
 They must be ported to SPL before the deadline,
 otherwise they will be removed.
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 Cc: Dave Liu dave...@freescale.com
 Cc: Ron Madrid i...@sheldoninst.com
 Cc: Roy Zang tie-fei.z...@freescale.com
 Cc: Stefan Roese s...@denx.de
 Acked-by: Stefan Roese s...@denx.de

Applied to u-boot/master, thanks!

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Re: [U-Boot] sizes.h - consolidate for all architectures

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 05:47:58PM +0400, Alexey Brodkin wrote:

 Copied from Linux sources include/linux/sizes.h commit
 413541dd66d51f791a0b169d9b9014e4f56be13c
 
 Signed-off-by: Alexey Brodkin abrod...@synopsys.com
 
 Cc: Vineet Gupta vgu...@synopsys.com
 Cc: Tom Rini tr...@ti.com
 Cc: Stefan Roese s...@denx.de
 Cc: Albert Aribaud albert.u.b...@aribaud.net
 Acked-by: Tom Rini tr...@ti.com
 Acked-by: Stefan Roese s...@denx.de

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Re: [U-Boot] [U-Boot, 7/8] m68k: merge compile flags -ffixed-d7 -sep-data

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 02:51:04PM +0900, Masahiro Yamada wrote:

 All arch/m68k/cpu/*/config.mk define the same flags
   PLAGFORM_REFLFLAGS += -ffixed-d7 -msep-data
 Move it to arch/m68k/config.mk
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 Cc: Jason Jin jason@freescale.com

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Re: [U-Boot] [U-Boot,4/8] x86: Delete redundant compiler flags

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 02:51:01PM +0900, Masahiro Yamada wrote:

 -Wstrict-prototypes, -ffreestanding, -fno-stack-protector
 are defined at the top Makefile for all architectures.
 
 Do not define them twice for x86.
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 Cc: Simon Glass s...@chromium.org
 Acked-by: Simon Glass s...@chromium.org

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Re: [U-Boot] [U-Boot, v9, 02/14] Add cmd_process_error() to report and process errors

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 03:59:15PM -0700, Simon Glass wrote:

 U-Boot now uses errors defined in include/errno.h which are negative
 integers. Commands which fail need to report the error and return 1
 to indicate failure. Add this functionality in cmd_process_error().
 
 For now this merely reports the error number. It would be possible
 also to produce a helpful error message by storing the error strings
 in U-Boot.
 
 Signed-off-by: Simon Glass s...@chromium.org

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Re: [U-Boot] [U-Boot, v9, 01/14] sandbox: Build a device tree file for sandbox

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 03:59:14PM -0700, Simon Glass wrote:

 Add support for building a device tree for sandbox's CONFIG_OF_HOSTFILE
 option to make it easier to use device tree with sandbox.
 
 This adjusts the Makefile to build a u-boot.dtb file which can be passed
 to sandbox U-Boot with:
 
./u-boot -d u-boot.dtb
 
 Signed-off-by: Simon Glass s...@chromium.org

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v9, 03/14] yaffs: Remove private list implementation

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 03:59:16PM -0700, Simon Glass wrote:

 U-Boot already has a list implementation, and files which include both
 that and the yaffs implementation will get errors:
 
 In file included from ydirectenv.h:80:0,
  from yportenv.h:81,
  from yaffs_guts.h:19,
  from yaffs_allocator.h:19,
  from yaffs_allocator.c:14:
 yaffs_list.h:32:8: error: redefinition of ‘struct list_head’
  struct list_head {
 ^
 
 Remove the yaffs implementation.
 
 Signed-off-by: Simon Glass s...@chromium.org

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Re: [U-Boot] [U-Boot,v9,09/14] dm: Add a 'dm' command for testing

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 03:59:22PM -0700, Simon Glass wrote:

 This command is not required for driver model operation, but can be useful
 for testing. It provides simple dumps of internal data structures.
 
 Signed-off-by: Simon Glass s...@chromium.org
 Signed-off-by: Marek Vasut ma...@denx.de
 Signed-off-by: Pavel Herrmann morpheus.i...@gmail.com
 Signed-off-by: Viktor Křivák viktor.kri...@gmail.com
 Signed-off-by: Tomas Hlavacek tmshl...@gmail.com

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v9,08/14] dm: Add basic tests

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 03:59:21PM -0700, Simon Glass wrote:

 Add some tests of driver model functionality. Coverage includes:
 
 - basic init
 - binding of drivers to devices using platform_data
 - automatic probing of devices when referenced
 - availability of platform data to devices
 - lifecycle from bind to probe to remove to unbind
 - renumbering within a uclass when devices are probed/removed
 - calling driver-defined operations
 - deactivation of drivers when removed
 - memory leak across creation and destruction of drivers/uclasses
 - uclass init/destroy methods
 - automatic probe/remove of children/parents when needed
 
 This function is enabled for sandbox, using CONFIG_DM_TEST.
 
 Signed-off-by: Simon Glass s...@chromium.org

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v9, 06/14] sandbox: config: Enable driver model

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 03:59:19PM -0700, Simon Glass wrote:

 Use driver model in sandbox to permit running of driver model unit test.
 
 Signed-off-by: Simon Glass s...@chromium.org

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,v9,05/14] dm: Add base driver model support

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 03:59:18PM -0700, Simon Glass wrote:

 Add driver model functionality for generic board.
 
 This includes data structures and base code for registering devices and
 uclasses (groups of devices with the same purpose, e.g. all I2C ports will
 be in the same uclass).
 
 The feature is enabled with CONFIG_DM.
 
 Signed-off-by: Simon Glass s...@chromium.org
 Signed-off-by: Marek Vasut ma...@denx.de
 Signed-off-by: Pavel Herrmann morpheus.i...@gmail.com
 Signed-off-by: Viktor Křivák viktor.kri...@gmail.com
 Signed-off-by: Tomas Hlavacek tmshl...@gmail.com

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, v9, 07/14] dm: Set up driver model after relocation

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 03:59:20PM -0700, Simon Glass wrote:

 Make driver model available after relocation, by setting up data structures
 and scanning for devices using compiled-in platform_data and (when available)
 the device tree.
 
 Signed-off-by: Simon Glass s...@chromium.org

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Re: [U-Boot] [U-Boot,v9,04/14] dm: Add README for driver model

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 03:59:17PM -0700, Simon Glass wrote:

 This adds a README to help with understanding of this series.
 
 Signed-off-by: Simon Glass s...@chromium.org

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Re: [U-Boot] [U-Boot, v9, 10/14] dm: Add a demonstration/example driver

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 03:59:23PM -0700, Simon Glass wrote:

 As an example of how to write a uclass and a driver, provide a demo version
 of each, accessible through the 'demo' command.
 
 To use these with driver model, define CONFIG_CMD_DEMO and CONFIG_DM_DEMO.
 
 The two demo drivers are enabled with CONFIG_DM_DEMO_SIMPLE and
 CONFIG_DM_DEMO_SHAPE.
 
 Signed-off-by: Simon Glass s...@chromium.org
 Signed-off-by: Marek Vasut ma...@denx.de
 Signed-off-by: Pavel Herrmann morpheus.i...@gmail.com
 Signed-off-by: Viktor Křivák viktor.kri...@gmail.com
 Signed-off-by: Tomas Hlavacek tmshl...@gmail.com

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Re: [U-Boot] [U-Boot, v9, 12/14] sandbox: Convert GPIOs to use driver model

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 03:59:25PM -0700, Simon Glass wrote:

 Convert sandbox over to use driver model GPIOs.
 
 Signed-off-by: Simon Glass s...@chromium.org

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Re: [U-Boot] [U-Boot,v9,11/14] dm: Add GPIO support and tests

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 03:59:24PM -0700, Simon Glass wrote:

 Add driver model support for GPIOs. Since existing GPIO drivers do not use
 driver model, this feature must be enabled by CONFIG_DM_GPIO. After all
 GPO drivers are converted over we can perhaps remove this config.
 
 Tests are provided for the sandbox implementation, and are a sufficient
 sanity check for basic operation.
 
 The GPIO uclass understands the concept of named banks of GPIOs, with each
 GPIO device providing a single bank. Within each bank the GPIOs are numbered
 using an offset from 0 to n-1. For example a bank named 'b' with 20
 offsets will provide GPIOs named b0 to b19.
 
 Anonymous GPIO banks are also supported, and are just numbered without any
 prefix.
 
 Each time a GPIO driver is added to the uclass, the GPIOs are renumbered
 accordinging, so there is always a global GPIO numbering order.
 
 Signed-off-by: Simon Glass s...@chromium.org
 Signed-off-by: Marek Vasut ma...@denx.de
 Signed-off-by: Pavel Herrmann morpheus.i...@gmail.com
 Signed-off-by: Viktor Křivák viktor.kri...@gmail.com
 Signed-off-by: Tomas Hlavacek tmshl...@gmail.com

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Re: [U-Boot] [U-Boot, v9, 13/14] dm: Enable gpio command to support driver model

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 03:59:26PM -0700, Simon Glass wrote:

 Now that named GPIO banks are supported, along with a way of obtaining
 the status of a GPIO (input or output), we can provide an enhanced
 GPIO command for driver model. Where the driver provides its own operation
 for obtaining the GPIO state, this is used, otherwise a generic version
 is sufficient.
 
 Signed-off-by: Simon Glass s...@chromium.org

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Re: [U-Boot] [U-Boot, v9, 14/14] dm: Remove old driver model documentation

2014-03-04 Thread Tom Rini
On Wed, Feb 26, 2014 at 03:59:27PM -0700, Simon Glass wrote:

 This documentation pertains to the planned implementation of driver model
 in U-Boot for each subsystem, but it has not been superseded. It is
 probably better to have this documentation in the source code for each
 subsystem where possible, so that docbook will pick it up. Where this does
 not make sense, new documentation can be placed in some suitable file in
 doc/driver-model.
 
 Signed-off-by: Simon Glass s...@chromium.org

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Re: [U-Boot] scripts: update checkpatch.pl to latest upstream version

2014-03-04 Thread Tom Rini
On Thu, Feb 27, 2014 at 08:27:28AM -0500, Tom Rini wrote:

 Update to v3.14-rc4's version of checkpatch.pl.  In doing so we drop the
 changes to top_of_kernel_tree() as we pass in --no-tree and drop our
 changes about MAINTAINERS as that's for reporting checkpatch.pl problems
 itself (and upstream has said they'll reword this section to be
 clearer).
 
 Signed-off-by: Tom Rini tr...@ti.com

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Re: [U-Boot] board: gaisler: delete unnecessary include path

2014-03-04 Thread Tom Rini
On Fri, Feb 28, 2014 at 07:42:26PM +0900, Masahiro Yamada wrote:

 The same outputs are generated with or without -I$(TOPDIR)/board.
 I cannot understand why it is necessary. Remove.
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 Cc: Daniel Hellstrom dan...@gaisler.com

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Re: [U-Boot] kbuild: consolidate PLATFORM_LIBS

2014-03-04 Thread Tom Rini
On Thu, Feb 27, 2014 at 10:40:34PM +0900, Masahiro Yamada wrote:

 We had switched to Kbuild so now we can specify
 PLATFORM_LIBS/PLATFORM_LIBGCC with relative path.
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 Acked-by: Tom Rini tr...@ti.com
 Acked-by: Simon Glass s...@chromium.org
 Tested-by: Simon Glass s...@chromium.org

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Re: [U-Boot] kbuild: fix CROSS_COMPILE settings in config.mk

2014-03-04 Thread Tom Rini
On Fri, Feb 28, 2014 at 02:33:30PM +0900, Masahiro Yamada wrote:

 The syntax
   CROSS_COMIPLE ?= cross_compiler_prefix
 does not work because config.mk is parsed after
 exporting CROSS_COMPILE.
 
 Like Linux Kernel's arch/$(ARCH)/Makefile,
 we must write as follows:
 
   ifeq ($(CROSS_COMPILE),)
   CROSS_COMPILE := cross_compiler_prefix
   endif
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com

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Re: [U-Boot] [U-Boot, 02/10] ARM: AM43xx: clocks: Enable CPGMAC clock control

2014-03-04 Thread Tom Rini
On Tue, Feb 18, 2014 at 07:31:53AM -0500, Tom Rini wrote:

 From: Mugunthan V N mugunthan...@ti.com
 
 Enable CPGMAC clock control for AM43xx to use ethernet in U-Boot
 
 Signed-off-by: Mugunthan V N mugunthan...@ti.com

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Re: [U-Boot] board: .gitignore: ignore board-specific generated files

2014-03-04 Thread Tom Rini
On Fri, Feb 28, 2014 at 07:59:16PM +0900, Masahiro Yamada wrote:

 Ignore
   - board/cray/L1/bootscript.{c|image}
   - board/matrix_vision/mvblm7/bootscript.img
   - board/maxtir_vision/mvsmr/bootscript.img
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 Cc: Andre Schwarz andre.schw...@matrix-vision.de

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] board: config.mk: delete unused sinclude directive

2014-03-04 Thread Tom Rini
On Fri, Feb 28, 2014 at 08:12:34PM +0900, Masahiro Yamada wrote:

 config.tmp is not there.
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,1/2] kbuild: fix tools-all target

2014-03-04 Thread Tom Rini
On Mon, Mar 03, 2014 at 11:06:18AM +0900, Masahiro Yamada wrote:

 The top Makefile must export HOST_TOOLS_ALL to use it
 in tools/Makefile.
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 Tested-by: Heiko Schocher h...@denx.de
 Acked-by: Heiko Schocher h...@denx.de

Applied to u-boot/master, thanks!

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Re: [U-Boot] kbuild: tools: fix a bug that always builds Denx logo

2014-03-04 Thread Tom Rini
On Mon, Mar 03, 2014 at 06:40:56PM +0900, Masahiro Yamada wrote:

 LOGO_BMP was never overwritten by board-specific or
 vendor-specific logos.
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 Reported-by: Bo Shen voice.s...@atmel.com
 Tested-by: Bo Shen voice.s...@atmel.com

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot,1/2] kbuild: allow empty board directories

2014-03-04 Thread Tom Rini
On Mon, Mar 03, 2014 at 07:03:17PM +0900, Masahiro Yamada wrote:

 U-Boot has compelled all boards to have
 board/${BOARD}/ or board/${VENDOR}/${BOARD}/ directory.
 
 Sometimes it does not seem suitable for some boards,
 for example Sandbox. (Is it a board?)
 
 And arcangel4 board has nothing to compile
 under the board directory.
 
 This commit makes the build system more flexible:
 If 'none' is given to the 6th column (=Board name) of boards.cfg,
 Kbuild will not descend into the board directory.
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 2/2] kbuild: add cross_tools target to build tools for the target

2014-03-04 Thread Tom Rini
On Mon, Mar 03, 2014 at 11:06:19AM +0900, Masahiro Yamada wrote:

 Programs in tools/ directory are usually built for the host.
 But some of them (mkimage, dumpimge, gen_eth_addr, etc.) are
 useful on the target OS too.
 
 Actually, prior to Kbuild, U-Boot could build tools for
 the target like follows:
 
   $ make target_board_config
   $ export CROSS_COMPILE=cross_gcc_prefix
   $ make HOSTCC=${CROSS_COMPILE}gcc HOSTSTRIP=${CROSS_COMPILE}strip tools
 
 In Kbuild, we can no longer replace HOSTCC at the command line.
 
 In order to get back that feature, this commit adds cross-tools target.
 
 Usage:
 
   Build tools for the host
   $ make CROSS_COMPILE=cross_gcc_prefix tools
 
   Build tools for the target
   $ make CROSS_COMPILE=cross_gcc_prefix cross_tools
 
 Besides, make cross_tools strip tools programs because we
 generally expect smaller storages on embedded systems.
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 Reported-by: Heiko Schocher h...@denx.de
 Cc: Wolfgang Denk w...@denx.de
 Cc: Tom Rini tr...@ti.com
 Tested-by: Heiko Schocher h...@denx.de
 Acked-by: Heiko Schocher h...@denx.de

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 2/2] arc: arcangel4: set board entry none to fix a build error

2014-03-04 Thread Tom Rini
On Mon, Mar 03, 2014 at 07:03:18PM +0900, Masahiro Yamada wrote:

 There are no source files in board/synopsys/arcangel4/
 directory.
 
 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
 Cc: Alexey Brodkin alexey.brod...@synopsys.com

Applied to u-boot/master, thanks!

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[U-Boot] Please pull u-boot-ti/master

2014-03-04 Thread Tom Rini
Hey,

The following changes since commit eeb72e67619b98d2502fe634a3a5d9953de92ad0:

  Merge branch 'master' of git://git.denx.de/u-boot-arm (2014-02-26 16:49:58 
-0500)

are available in the git repository at:


  git://git.denx.de/u-boot-ti.git master

for you to fetch changes up to cc07294bc704694ae33db75b25ac557e5917a83f:

  arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootup (2014-03-04 
09:42:07 -0500)


Dave Gerlach (3):
  ARM: AM43xx: EMIF: configure self-refresh entry delay
  ARM: AM43xx: Write sdram_config to secure_emif_sdram_config
  ARM: AM43xx: Change DDR3 Reset Value

Lokesh Vutla (1):
  ARM: AM4372: Update EMIF registers for DDR3

Mugunthan V N (6):
  drivers: net: cpsw: add support to have phy address from cpsw platform 
data
  ARM: AM43xx: clocks: Enable CPGMAC clock control
  ARM: AM43xx: Add CPSW support to AM43xx EPOS and GP EVM
  ARM: AM335x: add support for reading cpsw 2nd mac address from efuse
  ARM: DRA7xx: add support for reading cpsw 2nd mac from efuse
  ARM: AM43xx: Add Ethernet boot support to SPL

Stefan Roese (1):
  arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootup

 arch/arm/cpu/armv7/am33xx/clock_am43xx.c |1 +
 arch/arm/cpu/armv7/am33xx/ddr.c  |5 +-
 arch/arm/cpu/armv7/am33xx/emif4.c|2 +-
 board/BuR/common/common.c|4 +-
 board/compulab/cm_t335/cm_t335.c |2 +-
 board/isee/igep0033/board.c  |2 +-
 board/phytec/pcm051/board.c  |4 +-
 board/siemens/dxr2/board.c   |9 ++-
 board/siemens/dxr2/mux.c |2 +
 board/siemens/pxm2/board.c   |4 +-
 board/siemens/rut/board.c|4 +-
 board/silica/pengwyn/board.c |4 +-
 board/ti/am335x/board.c  |   19 +-
 board/ti/am43xx/board.c  |  100 +-
 board/ti/am43xx/mux.c|   44 -
 board/ti/dra7xx/evm.c|   19 +-
 board/ti/ti814x/evm.c|4 +-
 drivers/net/cpsw.c   |4 +-
 include/configs/am335x_evm.h |1 -
 include/configs/am335x_igep0033.h|1 -
 include/configs/am43xx_evm.h |   26 
 include/configs/bur_am335x_common.h  |1 -
 include/configs/cm_t335.h|1 -
 include/configs/dra7xx_evm.h |1 -
 include/configs/dxr2.h   |2 +-
 include/configs/pcm051.h |1 -
 include/configs/pengwyn.h|1 -
 include/configs/pxm2.h   |1 -
 include/configs/rut.h|1 -
 include/configs/ti814x_evm.h |1 -
 include/configs/ti_am335x_common.h   |1 +
 include/cpsw.h   |2 +-
 32 files changed, 235 insertions(+), 39 deletions(-)

-- 
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Re: [U-Boot] [PATCH] malta: correct tcl script path in README.malta

2014-03-04 Thread Daniel Schwierzeck
2014-03-04 15:48 GMT+01:00 James Hogan james.ho...@imgtec.com:
 README.malta referred to board/malta, but malta has now been moved
 within board/imgtec/, so correct the path.

 Signed-off-by: James Hogan james.ho...@imgtec.com
 Cc: Daniel Schwierzeck daniel.schwierz...@googlemail.com
 Cc: Paul Burton paul.bur...@imgtec.com
 ---
  doc/README.malta | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)


could you resend the patch? Patchwork didn't pick it up.

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Re: [U-Boot] [PATCH 5/8] sh: Do not define -ffreestanding twice

2014-03-04 Thread Tom Rini
On Fri, Feb 28, 2014 at 12:39:35PM +0900, Masahiro Yamada wrote:

 Hello Nobihiro,
 
 Thanks.
 
 I want this and 6/8 on u-boot/master.
 
 Can you please send pull-request now?

Yes, soon please :)

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[U-Boot] [PATCH] cmd_nvedit: Make 'env import -c' require size parameter

2014-03-04 Thread Tom Rini
When importing a checksummed area we need to be told how big the area in
question is so that we know that will match the size of the area which
the checksum is generated against.

Reported-by: Pierre AUBERT p.aub...@staubli.com
Signed-off-by: Tom Rini tr...@ti.com
---
 common/cmd_nvedit.c |3 +++
 1 file changed, 3 insertions(+)

diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index 5bcc324..c53601c 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -1008,6 +1008,9 @@ static int do_env_import(cmd_tbl_t *cmdtp, int flag,
 
if (argc == 2) {
size = simple_strtoul(argv[1], NULL, 16);
+   } else if (argc == 1  chk) {
+   puts(## Error: external checksum format must pass size\n);
+   return CMD_RET_FAILURE;
} else {
char *s = addr;
 
-- 
1.7.9.5

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[U-Boot] Is it OK to use target code from host tools

2014-03-04 Thread Charles Manning
Hello All

I am currently reworking a socfpga signer patch which is part of mkimage.

One thing I need to do is to stuff some bytes into a header ensuring the
endianism is correct.

This is a trivial thing to do in C, but I have been instructed to use the
existing functions put_unaligned_le32() etc.

These are part of Linux in linux/unaligned/access_ok.h. But this includes
asm/*

It seems to me that this mixing of host space and target space is
potentially problematic.

Is this a safe thing to do?

Thanks

Charles
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[U-Boot] [PATCH] MIPS: fix types u64 and __u64 to unsigned long long

2014-03-04 Thread Daniel Schwierzeck
Linux MIPS uses asm-generic/int-ll64.h in asm/types.h.
Thus u64 and __u64 are defined as unsigned long long. Port this
over to U-Boot.

Signed-off-by: Daniel Schwierzeck daniel.schwierz...@gmail.com
---
This fixes all warnings on qemu_mips64 introduced by patch
http://patchwork.ozlabs.org/patch/324673/.
---
 arch/mips/include/asm/types.h | 23 +++
 1 file changed, 3 insertions(+), 20 deletions(-)

diff --git a/arch/mips/include/asm/types.h b/arch/mips/include/asm/types.h
index d4bb859..aebafdb 100644
--- a/arch/mips/include/asm/types.h
+++ b/arch/mips/include/asm/types.h
@@ -27,18 +27,12 @@ typedef unsigned short __u16;
 typedef __signed__ int __s32;
 typedef unsigned int __u32;
 
-#if (_MIPS_SZLONG == 64)
-
-typedef __signed__ long __s64;
-typedef unsigned long __u64;
-
-#else
-
 #if defined(__GNUC__)
 __extension__ typedef __signed__ long long __s64;
 __extension__ typedef unsigned long long __u64;
-#endif
-
+#else
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
 #endif
 
 #endif /* __ASSEMBLY__ */
@@ -61,19 +55,8 @@ typedef unsigned short u16;
 typedef __signed int s32;
 typedef unsigned int u32;
 
-#if (_MIPS_SZLONG == 64)
-
-typedef __signed__ long s64;
-typedef unsigned long u64;
-
-#else
-
-#if defined(__GNUC__)  !defined(__STRICT_ANSI__)
 typedef __signed__ long long s64;
 typedef unsigned long long u64;
-#endif
-
-#endif
 
 #if (defined(CONFIG_HIGHMEM)  defined(CONFIG_64BIT_PHYS_ADDR)) \
 || defined(CONFIG_64BIT)
-- 
1.8.3.2

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[U-Boot] [PATCH RESEND] MIPS: fix types u64 and __u64 to unsigned long long

2014-03-04 Thread Daniel Schwierzeck
Linux MIPS uses asm-generic/int-ll64.h in asm/types.h.
Thus u64 and __u64 are defined as unsigned long long. Port this
over to U-Boot.

Signed-off-by: Daniel Schwierzeck daniel.schwierz...@gmail.com
---
This fixes all warnings on qemu_mips64 introduced by patch
http://patchwork.ozlabs.org/patch/324673/.
---
 arch/mips/include/asm/types.h | 23 +++
 1 file changed, 3 insertions(+), 20 deletions(-)

diff --git a/arch/mips/include/asm/types.h b/arch/mips/include/asm/types.h
index d4bb859..aebafdb 100644
--- a/arch/mips/include/asm/types.h
+++ b/arch/mips/include/asm/types.h
@@ -27,18 +27,12 @@ typedef unsigned short __u16;
 typedef __signed__ int __s32;
 typedef unsigned int __u32;
 
-#if (_MIPS_SZLONG == 64)
-
-typedef __signed__ long __s64;
-typedef unsigned long __u64;
-
-#else
-
 #if defined(__GNUC__)
 __extension__ typedef __signed__ long long __s64;
 __extension__ typedef unsigned long long __u64;
-#endif
-
+#else
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
 #endif
 
 #endif /* __ASSEMBLY__ */
@@ -61,19 +55,8 @@ typedef unsigned short u16;
 typedef __signed int s32;
 typedef unsigned int u32;
 
-#if (_MIPS_SZLONG == 64)
-
-typedef __signed__ long s64;
-typedef unsigned long u64;
-
-#else
-
-#if defined(__GNUC__)  !defined(__STRICT_ANSI__)
 typedef __signed__ long long s64;
 typedef unsigned long long u64;
-#endif
-
-#endif
 
 #if (defined(CONFIG_HIGHMEM)  defined(CONFIG_64BIT_PHYS_ADDR)) \
 || defined(CONFIG_64BIT)
-- 
1.8.3.2

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Re: [U-Boot] [PATCH] MIPS: fix types u64 and __u64 to unsigned long long

2014-03-04 Thread Tom Rini
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 03/04/2014 05:25 PM, Daniel Schwierzeck wrote:
 Linux MIPS uses asm-generic/int-ll64.h in asm/types.h. Thus u64 and
 __u64 are defined as unsigned long long. Port this over to U-Boot.
 
 Signed-off-by: Daniel Schwierzeck daniel.schwierz...@gmail.com

I hoped this would be the fix, thanks!

Acked-by: Tom Rini tr...@ti.com

And if you want to get me a u-boot-mips PR soon I'll take it along.

- -- 
Tom
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Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/

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[U-Boot] [GIT PULL] u-boot-mips/master

2014-03-04 Thread Daniel Schwierzeck
Hi Tom,

I've included a documentation fix which was posted today.

The following changes since commit eeb72e67619b98d2502fe634a3a5d9953de92ad0:

  Merge branch 'master' of git://git.denx.de/u-boot-arm (2014-02-26
16:49:58 -0500)

are available in the git repository at:


  git://git.denx.de/u-boot-mips.git master

for you to fetch changes up to b2099d16dc90fc94f050dfc9391c645c83d06cb8:

  malta: correct tcl script path in README.malta (2014-03-04 23:41:54 +0100)


Daniel Schwierzeck (1):
  MIPS: fix types u64 and __u64 to unsigned long long

James Hogan (1):
  malta: correct tcl script path in README.malta

 arch/mips/include/asm/types.h | 23 +++
 doc/README.malta  |  2 +-
 2 files changed, 4 insertions(+), 21 deletions(-)
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Re: [U-Boot] [PATCH v4 1/2] watchdog/denali: Adding DesignWare watchdog driver support

2014-03-04 Thread Chin Liang See
On Fri, 2014-02-28 at 11:30 +0100, Michal Simek wrote:
 On 02/27/2014 08:53 PM, Chin Liang See wrote:
  To add the DesignWare watchdog driver support. It required
  information such as register base address and clock info from
  configuration header file  within include/configs folder.
  
  Signed-off-by: Chin Liang See cl...@altera.com
  Cc: Anatolij Gustschin ag...@denx.de
  Cc: Albert Aribaud albert.u.b...@aribaud.net
  Cc: Heiko Schocher h...@denx.de
  Cc: Tom Rini tr...@ti.com
  ---
  Changes for v4
  - Add 2014 to license header
  Changes for v3
  - Split to 2 series patch
  Changes for v2
  - Enable this driver at socfpga_cyclone5 board
  ---
   drivers/watchdog/Makefile |1 +
   drivers/watchdog/designware_wdt.c |   73 
  +
   2 files changed, 74 insertions(+)
   create mode 100644 drivers/watchdog/designware_wdt.c
  
  diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
  index 06ced10..0276a10 100644
  --- a/drivers/watchdog/Makefile
  +++ b/drivers/watchdog/Makefile
  @@ -15,3 +15,4 @@ obj-$(CONFIG_S5P)   += s5p_wdt.o
   obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
   obj-$(CONFIG_BFIN_WATCHDOG)  += bfin_wdt.o
   obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
  +obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
  diff --git a/drivers/watchdog/designware_wdt.c 
  b/drivers/watchdog/designware_wdt.c
  new file mode 100644
  index 000..6abee81
  --- /dev/null
  +++ b/drivers/watchdog/designware_wdt.c
  @@ -0,0 +1,73 @@
  +/*
  + * Copyright (C) 2013-2014 Altera Corporation www.altera.com
  + *
  + * SPDX-License-Identifier:GPL-2.0+
  + */
  +
  +#include common.h
  +#include watchdog.h
  +#include asm/io.h
  +#include asm/utils.h
  +
  +#define DW_WDT_CR  0x00
  +#define DW_WDT_TORR0x04
  +#define DW_WDT_CRR 0x0C
  +
  +#define DW_WDT_CR_EN_OFFSET0x00
  +#define DW_WDT_CR_RMOD_OFFSET  0x01
  +#define DW_WDT_CR_RMOD_VAL 0x00
  +#define DW_WDT_CRR_RESTART_VAL 0x76
  +
  +/*
  + * Set the watchdog time interval.
  + * Counter is 32 bit.
  + */
  +int designware_wdt_settimeout(unsigned int timeout)
  +{
  +   signed int i;
  +   /* calculate the timeout range value */
  +   i = (log_2_n_round_up(timeout * CONFIG_DW_WDT_CLOCK_KHZ)) - 16;
  +   if (i  15)
  +   i = 15;
  +   if (i  0)
  +   i = 0;
  +
  +   writel((i | (i4)), (CONFIG_DW_WDT_BASE + DW_WDT_TORR));
 
 i  4

Fixed

 
 
  +   return 0;
  +}
  +
  +void designware_wdt_enable(void)
  +{
  +   writel(((DW_WDT_CR_RMOD_VAL  DW_WDT_CR_RMOD_OFFSET) |
  +  (0x1  DW_WDT_CR_EN_OFFSET)),
  +  (CONFIG_DW_WDT_BASE + DW_WDT_CR));
  +}
  +
  +unsigned int designware_wdt_is_enabled(void)
  +{
  +   unsigned long val;
  +   val = readl((CONFIG_DW_WDT_BASE + DW_WDT_CR));
  +   return val  0x1;
  +}
 
 all 3 functions above I believe should be static because
 you use them just here.

Yup, I can enhance that.
Thanks

Chin Liang


 
 Thanks,
 Michal
 



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Re: [U-Boot] [PATCH v3 2/2] socfpga: Adding DesignWare watchdog support

2014-03-04 Thread Chin Liang See
On Fri, 2014-02-28 at 11:31 +0100, Michal Simek wrote:
 On 02/27/2014 08:55 PM, Chin Liang See wrote:
  Hi Michal,
  
  On Mon, 2014-02-24 at 08:52 +0100, Michal Simek wrote:
  On 02/21/2014 09:57 PM, Chin Liang See wrote:
  To enable the DesignWare watchdog support at SOCFPGA Cyclone V
  dev kit.
 
  Signed-off-by: Chin Liang See cl...@altera.com
  Cc: Anatolij Gustschin ag...@denx.de
  Cc: Albert Aribaud albert.u.b...@aribaud.net
  Cc: Heiko Schocher h...@denx.de
  Cc: Tom Rini tr...@ti.com
  ---
  Changes for v3
  - Split to 2 series patch
  Changes for v2
  - Enable this driver at socfpga_cyclone5 board
  ---
   .../include/asm/arch-socfpga/socfpga_base_addrs.h  |1 +
   include/configs/socfpga_cyclone5.h |   13 +
   2 files changed, 14 insertions(+)
 
  diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h 
  b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
  index 20f12e0..5f73824 100644
  --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
  +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
  @@ -11,6 +11,7 @@
   #define SOCFPGA_UART0_ADDRESS 0xffc02000
   #define SOCFPGA_UART1_ADDRESS 0xffc03000
   #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd0
  +#define SOCFPGA_L4WD0_ADDRESS 0xffd02000
   #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
   #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
   #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
  diff --git a/include/configs/socfpga_cyclone5.h 
  b/include/configs/socfpga_cyclone5.h
  index fc921ee..1b78ccb 100644
  --- a/include/configs/socfpga_cyclone5.h
  +++ b/include/configs/socfpga_cyclone5.h
  @@ -207,6 +207,16 @@
   #define CONFIG_ENV_IS_NOWHERE
   
   /*
  + * L4 Watchdog
  + */
 
  Why multiline comment here?
  
  Oh its just for easy reading.
  
 
  +#define CONFIG_HW_WATCHDOG
  +#define CONFIG_HW_WATCHDOG_TIMEOUT_MS2000
  +#define CONFIG_DESIGNWARE_WATCHDOG
  +#define CONFIG_DW_WDT_BASE   SOCFPGA_L4WD0_ADDRESS
 
  Why not just use SOCFPGA_L4WD0_ADDRESS directly?
  
  Nope, cause this driver might be used by other platform.
 
 ok It means that SOCFPGA_L4WD0_ADDRESS is system controller right?

Its the base address for watchdog registers.

Thanks
Chin Liang

 
 Thanks,
 Michal
 


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Re: [U-Boot] [PATCH v2 1/2] nand/denali: Adding Denali NAND driver support

2014-03-04 Thread Chin Liang See
On Fri, 2014-02-28 at 11:37 +0100, Michal Simek wrote:
  +/* lld_nand.h */
  +/*
  + * NAND Flash Controller Device Driver
  + * Copyright (c) 2009, Intel Corporation and its suppliers.
  + *
  + * This program is free software; you can redistribute it and/or modify 
  it
  + * under the terms and conditions of the GNU General Public License,
  + * version 2, as published by the Free Software Foundation.
  + *
  + * This program is distributed in the hope it will be useful, but WITHOUT
  + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License 
  for
  + * more details.
  + *
  + * You should have received a copy of the GNU General Public License 
  along with
  + * this program; if not, write to the Free Software Foundation, Inc.,
  + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
 
 
  Isn't this pretty weird if we are using SPDX?
  
  I believe the Linux driver owner wish to maintain this header when
  he/she copy into NAND driver. Anyhow, the SPDX license already stated at
  top of the header file.
 
 1. Using address in license is just wrong and it should be removed
 because they can move to different location.
 
 2. u-boot adopted SPDX and all these fragments were removed.
 
 Wolfgang/Tom: IMHO this should be also changed/fixed.


Just check the latest denali.h in Linux and this license header still
there. But removing the license header put by original author might not
a good thing to do. Unless we can get some approval from Wolfgang or
Jason (who is submitter of this file to Linux).

Thanks
Chin Liang


 
 Thanks,
 Michal
 
 


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Re: [U-Boot] [GIT PULL] u-boot-mips/master

2014-03-04 Thread Tom Rini
On Tue, Mar 04, 2014 at 11:49:17PM +0100, Daniel Schwierzeck wrote:

 Hi Tom,
 
 I've included a documentation fix which was posted today.
 
 The following changes since commit eeb72e67619b98d2502fe634a3a5d9953de92ad0:
 
   Merge branch 'master' of git://git.denx.de/u-boot-arm (2014-02-26
 16:49:58 -0500)
 
 are available in the git repository at:
 
 
   git://git.denx.de/u-boot-mips.git master
 
 for you to fetch changes up to b2099d16dc90fc94f050dfc9391c645c83d06cb8:
 
   malta: correct tcl script path in README.malta (2014-03-04 23:41:54 +0100)
 
 
 Daniel Schwierzeck (1):
   MIPS: fix types u64 and __u64 to unsigned long long
 
 James Hogan (1):
   malta: correct tcl script path in README.malta
 
  arch/mips/include/asm/types.h | 23 +++
  doc/README.malta  |  2 +-
  2 files changed, 4 insertions(+), 21 deletions(-)

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH v2 1/2] nand/denali: Adding Denali NAND driver support

2014-03-04 Thread Chin Liang See
Hi Masahiro,

On Fri, 2014-02-28 at 21:57 +0900, Masahiro Yamada wrote:
 Hello Chin,
 
 
 Where do you set nand-ecc.strength?

I believe this is only applicable for NAND_ECC_HW_SYNDROME mode. We are
using the NAND_ECC_HW (without the syndrome). Wonder you hit error
during run?
   
   No, it must always be set for hardware ECC.  Note the lack of a break;
   before case NAND_ECC_HW_SYNDROME.
  
  Good catch, thanks Scott!
 
 ecc.strengh must be set for NAND_ECC_HW.
 
 Otherwise, error message will be displayed and reboot.
 
NAND:  NAND:  Denali NAND controller
BUG: failure at drivers/mtd/nand/nand_base.c:3224/nand_scan_tail()!
BUG!
resetting ...
 
 You said this driver was tested against 3 different devices.
 
 In that case, I can't understand how your board passed
 through nand_scan_tail().
 
 Anyway, I modifed denali_nand_init() locally
 to set nand-ecc.strength.
 


Actually this first revision of this patch was last year. It was tested
again old code base too that time. As I don't have the board with me
now, might need your help for new changes testing. I believe we can work
together to upstream this driver.


 
 
  Hi Masahiro,
  
  I rechecked my documentation and the value is 8.
  The data sector size is 512 bytes while ECC sector size is 14 bytes.
  With that, the controller able to auto correct up to 8 bits.
  This is how a page will look like
  
  512 bytes data | 14 bytes ECC | 512 bytes data | 14 bytes ECC | 512
  bytes data | 14 bytes ECC | 470 bytes data | 2 byte for bad block marker
  | 42 bytes data | 14 bytes ECC | unused 
  
  FYI, my documentation is located at
  http://rocketboards.org/gitweb/?p=u-boot-socfpga.git;a=blob_plain;f=doc/README.SOCFPGA;hb=refs/heads/socfpga_v2013.01.01
 
 For SOCFPAG, Denali controller IP is configured with
 512 byte ECC sector size. OK.
 
 I refer to Denali NAND Flash Memory Controller User's Guide.
 
 Accoding to it, Denali's IP has 2  choice for  ECC sector size:
 512 byte or 1024 byte.
 
 Panasonic's UniPhier SoCs adopt 1024 byte ECC sector size.
 (CONFIG_NAND_DENALI_ECC_SIZE = nand-ecc.size = 1024 for us.)
 ECC strength (nand-ecc.strength) is selectable from 8bit/16bit/24bit.
 (They correspond to  nand-ecc.bytes = 14, 28, 42, respectively)
 
 So, In our SoC s
 1024 byte data | {14 or 28 or 42 byte ECC} | 1024 byte data | 
 {14 or 28 or 42 byte ECC} ...


Hmmm from Denali user guide dated Jul 20 2009, 1024 can use correct bit
of 26 or 30 bits. 26 will yield 46 bytes of ECC sector size while 30
will yield 54 bytes sector size. 


 
 
  #ifdef CONFIG_SYS_NAND_15BIT_HW_ECC_OOBFIRST
  #define ECC_15BITS  26
  static struct nand_ecclayout nand_15bit_oob = {
  .eccbytes = ECC_15BITS,
  };
  #else
  #define ECC_8BITS   14
  static struct nand_ecclayout nand_8bit_oob = {
  .eccbytes = ECC_8BITS,
  };
  #endif  /* CONFIG_SYS_NAND_15BIT_HW_ECC_OOBFIRST */
 
 I'm afraid this part works only for 512 byte ECC sector.


From the original comment, controller in MRST only support 15bit and
8bit ECC correction. So I am not sure this constrain might due to older
version controller. Wonder you have any insight on this?


 
 Denali's document says
 For 512B ECC sector size,
ecc.bytes = Ceiling to next word (13 * ecc.strength)
 For 1024B ECC sector size,
ecc.bytes = Ceiling to next word (14 * ecc.strength)
 
 
 
 And denali_setup_dma_sequence() function
 (Why did you rename this function?)
 did not work either.
 I needed to fix it locally.
 
 
 So bad news is this version itself does not work for me.
 Good news is I could adjust it locally and confirmed some features
 worked. (But I think I need more test.)
 
 So, how will this situation work?
 It turned out there are some differences between
 two Denali hardwares and this driver works only for yours.
 
 You merge it first, and (if you don't mind) shall I modify it
 in a more generic way to run on both hardwares?
 


Anyway will work for me. I can take your comments and change the driver
accordingly too.


  If you want to run under SPL, there are some patches for that. Let me
  know if you need that. While for U-Boot, they are working fine. Probably
 
 Thanks for your offering help.
 But I am not sure if SOCFPGA and UniPhier can share a SPL nand driver.
 (Actually I have locally our own Denali driver for SPL.
 And I have Denali driver for main U-Boot, which is adjusted for
 our SoCs, too.
 But I don't mind to switch onto your driver if it works for me.)
 


Oh for SPL, I can use the same driver too. Just that I would need to
update the nand_spl_simple.c. The main changes is to use the HW ECC
feature instead of getting software calculate and fix the ECC. FYI, the
patch I made for SPL is located at
http://rocketboards.org/gitweb/?p=u-boot-socfpga.git;a=commit;h=461a61b8f03d3b690de1f4ff007cd23fb80018a5

  +#define CONFIG_SYS_NAND_USE_FLASH_BBT
  +#define CONFIG_SYS_NAND_REGS_BASE  SOCFPGA_NAND_REGS_ADDRESS
  +#define CONFIG_SYS_NAND_DATA_BASE  SOCFPGA_NAND_DATA_ADDRESS
  

Re: [U-Boot] [PATCH 5/8] sh: Do not define -ffreestanding twice

2014-03-04 Thread Nobuhiro Iwamatsu
Hi,

These were already applied to u-boot/master.
Thanks, Tom,.

Nobuhiro

2014-03-05 5:37 GMT+09:00 Tom Rini tr...@ti.com:
 On Fri, Feb 28, 2014 at 12:39:35PM +0900, Masahiro Yamada wrote:

 Hello Nobihiro,

 Thanks.

 I want this and 6/8 on u-boot/master.

 Can you please send pull-request now?

 Yes, soon please :)

 --
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Re: [U-Boot] [PATCH] ppc4xx: Remove 4xx NAND booting support

2014-03-04 Thread Masahiro Yamada
Hello Stefan,


On Tue,  4 Mar 2014 15:34:35 +0100
Stefan Roese s...@denx.de wrote:

 As ppc4xx currently only supports the deprecated nand_spl infrastructure
 and nobody seems to have time / resources to port this over to the newer
 SPL infrastructure, lets remove NAND booting completely.
 
 This should not affect the normal, non NAND-booting ppc4xx platforms
 that are currently supported.

Could you add dead boards to doc/README.scrapyard, please?


Best Regards
Masahiro Yamada


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[U-Boot] Pull request: nand flash

2014-03-04 Thread Scott Wood
The following changes since commit eeb72e67619b98d2502fe634a3a5d9953de92ad0:

  Merge branch 'master' of git://git.denx.de/u-boot-arm (2014-02-26 16:49:58 
-0500)

are available in the git repository at:


  git://git.denx.de/u-boot-nand-flash.git master

for you to fetch changes up to 2eda892f00fbcf46143326f72e8ac5b472bd225a:

  mtd: nand: omap: move omap_elm.h from arch/arm/include/asm to 
drivers/mtd/nand (2014-03-04 17:23:54 -0600)


pekon gupta (9):
  mtd: nand: omap: optimize chip-ecc.hwctl() for H/W ECC schemes
  mtd: nand: omap: optimize chip-ecc.calculate() for H/W ECC schemes
  mtd: nand: omap: optimized chip-ecc.correct() for H/W ECC schemes
  board/ti/am335x/README: update for NAND boot
  mtd: nand: omap: remove redundant platform specific header: 
arch-xx/omap_gpmc.h
  mtd: nand: omap: remove unused #defines from common omap_gpmc.h
  mtd: nand: omap: merge duplicate GPMC data from different arch-xx headers 
into common omap_gpmc.h
  mtd: nand: omap: move omap_gpmc.h from arch/arm/include/asm to 
drivers/mtd/nand
  mtd: nand: omap: move omap_elm.h from arch/arm/include/asm to 
drivers/mtd/nand

 arch/arm/include/asm/arch-am33xx/cpu.h |  51 --
 arch/arm/include/asm/arch-am33xx/omap_gpmc.h   |  48 --
 arch/arm/include/asm/arch-am33xx/sys_proto.h   |   1 +
 arch/arm/include/asm/arch-omap3/cpu.h  |  54 +-
 arch/arm/include/asm/arch-omap3/mem.h  |  10 +
 arch/arm/include/asm/arch-omap3/omap_gpmc.h|  36 --
 arch/arm/include/asm/arch-omap3/sys_proto.h|   1 +
 arch/arm/include/asm/arch-omap4/cpu.h  |  45 --
 arch/arm/include/asm/arch-omap4/sys_proto.h|   1 +
 arch/arm/include/asm/arch-omap5/cpu.h  |  45 --
 arch/arm/include/asm/arch-omap5/sys_proto.h|   1 +
 arch/arm/include/asm/omap_gpmc.h   |  87 
 board/isee/igep00x0/igep00x0.c |   1 -
 board/overo/overo.c|   1 -
 board/ti/am335x/README |  53 +-
 drivers/mtd/nand/omap_elm.c|   6 +-
 drivers/mtd/nand/omap_gpmc.c   | 572 +++--
 include/configs/am335x_evm.h   |   1 -
 include/configs/am335x_igep0033.h  |   1 -
 include/configs/am3517_crane.h |   1 -
 include/configs/am3517_evm.h   |   1 -
 include/configs/cm_t35.h   |   2 -
 include/configs/devkit8000.h   |   2 -
 include/configs/dig297.h   |   2 -
 include/configs/mcx.h  |   1 -
 include/configs/omap3_beagle.h |   2 -
 include/configs/omap3_evm_common.h |   1 -
 include/configs/omap3_igep00x0.h   |   1 -
 include/configs/omap3_logic.h  |   1 -
 include/configs/omap3_overo.h  |   2 -
 include/configs/omap3_pandora.h|   2 -
 include/configs/omap3_zoom1.h  |   2 -
 include/configs/siemens-am33x-common.h |   1 -
 include/configs/tam3517-common.h   |   1 -
 include/configs/tricorder.h|   2 -
 .../include/asm = include/linux/mtd}/omap_elm.h   |   0
 include/linux/mtd/omap_gpmc.h  |  84 +++
 37 files changed, 321 insertions(+), 802 deletions(-)
 delete mode 100644 arch/arm/include/asm/arch-am33xx/omap_gpmc.h
 delete mode 100644 arch/arm/include/asm/arch-omap3/omap_gpmc.h
 delete mode 100644 arch/arm/include/asm/omap_gpmc.h
 rename {arch/arm/include/asm = include/linux/mtd}/omap_elm.h (100%)
 create mode 100644 include/linux/mtd/omap_gpmc.h
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Re: [U-Boot] [PATCH 5/8] sh: Do not define -ffreestanding twice

2014-03-04 Thread Tom Rini
On Wed, Mar 05, 2014 at 09:45:26AM +0900, Nobuhiro Iwamatsu wrote:
 Hi,
 
 These were already applied to u-boot/master.
 Thanks, Tom,.

Bah, I was intending to not apply them, but I guess dropped them too
late.  So long as u-boot-sh ends up being sane, oh well :)

 
 Nobuhiro
 
 2014-03-05 5:37 GMT+09:00 Tom Rini tr...@ti.com:
  On Fri, Feb 28, 2014 at 12:39:35PM +0900, Masahiro Yamada wrote:
 
  Hello Nobihiro,
 
  Thanks.
 
  I want this and 6/8 on u-boot/master.
 
  Can you please send pull-request now?
 
  Yes, soon please :)
 
  --
  Tom
 
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[U-Boot] [PATCH v4 1/2] watchdog/denali: Adding DesignWare watchdog driver support

2014-03-04 Thread Chin Liang See
To add the DesignWare watchdog driver support. It required
information such as register base address and clock info from
configuration header file  within include/configs folder.

Signed-off-by: Chin Liang See cl...@altera.com
Cc: Anatolij Gustschin ag...@denx.de
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Heiko Schocher h...@denx.de
Cc: Tom Rini tr...@ti.com
---
Changes for v4
- Added static for local function
Changes for v3
- Split to 2 series patch
Changes for v2
- Enable this driver at socfpga_cyclone5 board
---
 drivers/watchdog/Makefile |1 +
 drivers/watchdog/designware_wdt.c |   74 +
 2 files changed, 75 insertions(+)
 create mode 100644 drivers/watchdog/designware_wdt.c

diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 06ced10..0276a10 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_S5P)   += s5p_wdt.o
 obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
 obj-$(CONFIG_BFIN_WATCHDOG)  += bfin_wdt.o
 obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
+obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
diff --git a/drivers/watchdog/designware_wdt.c 
b/drivers/watchdog/designware_wdt.c
new file mode 100644
index 000..e788e1b
--- /dev/null
+++ b/drivers/watchdog/designware_wdt.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2013 Altera Corporation www.altera.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include watchdog.h
+#include asm/io.h
+#include asm/utils.h
+
+#define DW_WDT_CR  0x00
+#define DW_WDT_TORR0x04
+#define DW_WDT_CRR 0x0C
+
+#define DW_WDT_CR_EN_OFFSET0x00
+#define DW_WDT_CR_RMOD_OFFSET  0x01
+#define DW_WDT_CR_RMOD_VAL 0x00
+#define DW_WDT_CRR_RESTART_VAL 0x76
+
+/*
+ * Set the watchdog time interval.
+ * Counter is 32 bit.
+ */
+static int designware_wdt_settimeout(unsigned int timeout)
+{
+   signed int i;
+
+   /* calculate the timeout range value */
+   i = (log_2_n_round_up(timeout * CONFIG_DW_WDT_CLOCK_KHZ)) - 16;
+   if (i  15)
+   i = 15;
+   if (i  0)
+   i = 0;
+
+   writel((i | (i  4)), (CONFIG_DW_WDT_BASE + DW_WDT_TORR));
+   return 0;
+}
+
+static void designware_wdt_enable(void)
+{
+   writel(((DW_WDT_CR_RMOD_VAL  DW_WDT_CR_RMOD_OFFSET) |
+ (0x1  DW_WDT_CR_EN_OFFSET)),
+ (CONFIG_DW_WDT_BASE + DW_WDT_CR));
+}
+
+static unsigned int designware_wdt_is_enabled(void)
+{
+   unsigned long val;
+   val = readl((CONFIG_DW_WDT_BASE + DW_WDT_CR));
+   return val  0x1;
+}
+
+#if defined(CONFIG_HW_WATCHDOG)
+void hw_watchdog_reset(void)
+{
+   if (designware_wdt_is_enabled())
+   /* restart the watchdog counter */
+   writel(DW_WDT_CRR_RESTART_VAL,
+  (CONFIG_DW_WDT_BASE + DW_WDT_CRR));
+}
+
+void hw_watchdog_init(void)
+{
+   /* reset to disable the watchdog */
+   hw_watchdog_reset();
+   /* set timer in miliseconds */
+   designware_wdt_settimeout(CONFIG_HW_WATCHDOG_TIMEOUT_MS);
+   /* enable the watchdog */
+   designware_wdt_enable();
+   /* reset the watchdog */
+   hw_watchdog_reset();
+}
+#endif
-- 
1.7.9.5

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[U-Boot] [PATCH v3] socfpga: Adding Clock Manager driver

2014-03-04 Thread Chin Liang See
Clock Manager driver will be called to reconfigure all the
clocks setting based on user input. The input are passed to
Preloader through handoff files

Signed-off-by: Chin Liang See cl...@altera.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Tom Rini tr...@ti.com
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
---
Changes for v3
- Shorten some variables name
- Fixed some coding style
Changes for v2
- merge the handoff file and driver into single patch
---
 arch/arm/cpu/armv7/socfpga/Makefile|2 +-
 arch/arm/cpu/armv7/socfpga/clock_manager.c |  361 
 arch/arm/cpu/armv7/socfpga/spl.c   |   89 +
 arch/arm/include/asm/arch-socfpga/clock_manager.h  |  205 +++
 .../include/asm/arch-socfpga/socfpga_base_addrs.h  |1 +
 board/altera/socfpga/pll_config.h  |  118 +++
 include/configs/socfpga_cyclone5.h |1 +
 7 files changed, 776 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/armv7/socfpga/clock_manager.c
 create mode 100644 arch/arm/include/asm/arch-socfpga/clock_manager.h
 create mode 100644 board/altera/socfpga/pll_config.h

diff --git a/arch/arm/cpu/armv7/socfpga/Makefile 
b/arch/arm/cpu/armv7/socfpga/Makefile
index 3e84a0c..cbe1d40 100644
--- a/arch/arm/cpu/armv7/socfpga/Makefile
+++ b/arch/arm/cpu/armv7/socfpga/Makefile
@@ -8,5 +8,5 @@
 #
 
 obj-y  := lowlevel_init.o
-obj-y  += misc.o timer.o reset_manager.o system_manager.o
+obj-y  += misc.o timer.o reset_manager.o system_manager.o clock_manager.o
 obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o
diff --git a/arch/arm/cpu/armv7/socfpga/clock_manager.c 
b/arch/arm/cpu/armv7/socfpga/clock_manager.c
new file mode 100644
index 000..23d697d
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/clock_manager.c
@@ -0,0 +1,361 @@
+/*
+ *  Copyright (C) 2013 Altera Corporation www.altera.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/clock_manager.h
+
+static const struct socfpga_clock_manager *clock_manager_base =
+   (void *)SOCFPGA_CLKMGR_ADDRESS;
+
+#define CLKMGR_BYPASS_ENABLE   1
+#define CLKMGR_BYPASS_DISABLE  0
+#define CLKMGR_STAT_IDLE   0
+#define CLKMGR_STAT_BUSY   1
+#define CLKMGR_BYPASS_PERPLLSRC_SELECT_EOSC1   0
+#define CLKMGR_BYPASS_PERPLLSRC_SELECT_INPUT_MUX   1
+#define CLKMGR_BYPASS_SDRPLLSRC_SELECT_EOSC1   0
+#define CLKMGR_BYPASS_SDRPLLSRC_SELECT_INPUT_MUX   1
+
+#define CLEAR_BGP_EN_PWRDN \
+   (CLKMGR_MAINPLLGRP_VCO_PWRDN_SET(0)| \
+   CLKMGR_MAINPLLGRP_VCO_EN_SET(0)| \
+   CLKMGR_MAINPLLGRP_VCO_BGPWRDN_SET(0))
+
+#define VCO_EN_BASE \
+   (CLKMGR_MAINPLLGRP_VCO_PWRDN_SET(0)| \
+   CLKMGR_MAINPLLGRP_VCO_EN_SET(1)| \
+   CLKMGR_MAINPLLGRP_VCO_BGPWRDN_SET(0))
+
+static inline void cm_wait_for_lock(uint32_t mask)
+{
+   register uint32_t inter_val;
+   do {
+   inter_val = readl(clock_manager_base-inter)  mask;
+   } while (inter_val != mask);
+}
+
+/* function to poll in the fsm busy bit */
+static inline void cm_wait_for_fsm(void)
+{
+   while (readl(clock_manager_base-stat)  CLKMGR_STAT_BUSY)
+   ;
+}
+
+/*
+ * function to write the bypass register which requires a poll of the
+ * busy bit
+ */
+static inline void cm_write_bypass(uint32_t val)
+{
+   writel(val, clock_manager_base-bypass);
+   cm_wait_for_fsm();
+}
+
+/* function to write the ctrl register which requires a poll of the busy bit */
+static inline void cm_write_ctrl(uint32_t val)
+{
+   writel(val, clock_manager_base-ctrl);
+   cm_wait_for_fsm();
+}
+
+/* function to write a clock register that has phase information */
+static inline void cm_write_with_phase(uint32_t value,
+   uint32_t reg_address, uint32_t mask)
+{
+   /* poll until phase is zero */
+   while (readl(reg_address)  mask)
+   ;
+
+   writel(value, reg_address);
+
+   while (readl(reg_address)  mask)
+   ;
+}
+
+/*
+ * Setup clocks while making no assumptions about previous state of the clocks.
+ *
+ * Start by being paranoid and gate all sw managed clocks
+ * Put all plls in bypass
+ * Put all plls VCO registers back to reset value (bandgap power down).
+ * Put peripheral and main pll src to reset value to avoid glitch.
+ * Delay 5 us.
+ * Deassert bandgap power down and set numerator and denominator
+ * Start 7 us timer.
+ * set internal dividers
+ * Wait for 7 us timer.
+ * Enable plls
+ * Set external dividers while plls are locking
+ * Wait for pll lock
+ * Assert/deassert outreset all.
+ * Take all pll's out of bypass
+ * Clear safe mode
+ * set source main and peripheral clocks
+ * Ungate clocks
+ */
+
+void cm_basic_init(const cm_config_t *cfg)
+{
+   uint32_t start, timeout;
+
+   /* Start by being paranoid and gate all sw managed clocks */
+
+   /*
+* We need to disable 

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