[U-Boot] [PATCH v3 1/4] kbuild, blackfin: Add CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED
Many (but not all) of Blackfin boards give -O2 option
to compile under lib/ directory.
That means lib/ should be speed-optimized,
whereas other parts should be size-optimized.
We want to keep the same behavior,
but do not want to parse board/*/config.mk again and again.
We've got no choice but to invent a new method.
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED, if it is enabled,
gives -O2 flag only for building under lib/ directory.
Dirty codes which I had marked as FIX ME
in board/${BOARD}/config.mk have been deleted.
Instead, CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED has been
defined in include/configs/${BOARD}.h.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Sonic Zhang sonic.zh...@analog.com
---
Changes in v3: None
Changes in v2: None
board/bct-brettl2/config.mk | 13 -
board/bf518f-ezbrd/config.mk| 13 -
board/bf526-ezbrd/config.mk | 13 -
board/bf527-ad7160-eval/config.mk | 13 -
board/bf527-ezkit/config.mk | 13 -
board/bf527-sdp/config.mk | 5 -
board/bf533-ezkit/config.mk | 5 -
board/bf533-stamp/config.mk | 5 -
board/bf537-stamp/config.mk | 5 -
board/bf538f-ezkit/config.mk| 5 -
board/bf548-ezkit/config.mk | 5 -
board/bf561-acvilon/config.mk | 5 -
board/bf561-ezkit/config.mk | 5 -
board/br4/config.mk | 15 ---
board/cm-bf527/config.mk| 13 -
board/cm-bf533/config.mk| 5 -
board/cm-bf537e/config.mk | 5 -
board/cm-bf537u/config.mk | 5 -
board/cm-bf548/config.mk| 5 -
board/cm-bf561/config.mk| 5 -
board/ip04/config.mk| 5 -
board/pr1/config.mk | 15 ---
board/tcm-bf518/config.mk | 13 -
board/tcm-bf537/config.mk | 5 -
include/configs/bct-brettl2.h | 2 +-
include/configs/bf518f-ezbrd.h | 2 +-
include/configs/bf526-ezbrd.h | 1 +
include/configs/bf527-ad7160-eval.h | 2 +-
include/configs/bf527-ezkit.h | 2 +-
include/configs/bf527-sdp.h | 2 +-
include/configs/bf533-ezkit.h | 2 +-
include/configs/bf533-stamp.h | 1 +
include/configs/bf537-stamp.h | 1 +
include/configs/bf538f-ezkit.h | 2 +-
include/configs/bf548-ezkit.h | 1 +
include/configs/bf561-acvilon.h | 2 +-
include/configs/bf561-ezkit.h | 1 +
include/configs/br4.h | 2 +-
include/configs/cm-bf527.h | 2 +-
include/configs/cm-bf533.h | 2 +-
include/configs/cm-bf537e.h | 1 +
include/configs/cm-bf537u.h | 2 +-
include/configs/cm-bf548.h | 1 +
include/configs/cm-bf561.h | 2 +-
include/configs/ip04.h | 1 +
include/configs/pr1.h | 2 +-
include/configs/tcm-bf518.h | 2 +-
include/configs/tcm-bf537.h | 2 +-
lib/Makefile| 2 ++
49 files changed, 26 insertions(+), 212 deletions(-)
delete mode 100644 board/bct-brettl2/config.mk
delete mode 100644 board/bf518f-ezbrd/config.mk
delete mode 100644 board/bf526-ezbrd/config.mk
delete mode 100644 board/bf527-ad7160-eval/config.mk
delete mode 100644 board/bf527-ezkit/config.mk
delete mode 100644 board/br4/config.mk
delete mode 100644 board/cm-bf527/config.mk
delete mode 100644 board/pr1/config.mk
delete mode 100644 board/tcm-bf518/config.mk
diff --git a/board/bct-brettl2/config.mk b/board/bct-brettl2/config.mk
deleted file mode 100644
index 0d3df2d..000
--- a/board/bct-brettl2/config.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Copyright (c) 2005-2008 Analog Device Inc.
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-# FIX ME
-ifneq ($(filter lib lib/lzma lib/zlib, $(obj)),)
-ccflags-y := -O2
-endif
diff --git a/board/bf518f-ezbrd/config.mk b/board/bf518f-ezbrd/config.mk
deleted file mode 100644
index 0d3df2d..000
--- a/board/bf518f-ezbrd/config.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Copyright (c) 2005-2008 Analog Device Inc.
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-# FIX ME
-ifneq ($(filter lib lib/lzma lib/zlib, $(obj)),)
-ccflags-y := -O2
-endif
diff --git a/board/bf526-ezbrd/config.mk b/board/bf526-ezbrd/config.mk
deleted file mode 100644
index 0d3df2d..000
--- a/board/bf526-ezbrd/config.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Copyright (c) 2005-2008 Analog Device Inc.
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-# FIX ME
-ifneq ($(filter lib lib/lzma lib/zlib, $(obj)),)
-ccflags-y := -O2
-endif
diff --git a/board/bf527-ad7160-eval/config.mk
[U-Boot] [PATCH v3 0/4] Big acceleration of Kbuild performance
Kbuild brought about many advantages for us but a significant performance regression was reported by Simon Glass. After some discussions and analysis, it turned out its main cause is in $(call cc-option,...). Historically, U-Boot parses all config.mk (arch/*/config.mk and board/*/config.mk) every time descending into subdirectories. That means cc-options are evaluated over and over again. $(call cc-option,...) is useful but costly. So we want to evaluate them only in ./Makefile and spl/Makefile and export compiler flags. 1/4 through 3/4 are preparation for 4/4. 4/4 is what we really want to do. By applying it, I think Kbuild will get much faster. I confirmed this series can apply on commit 32907339. Masahiro Yamada (4): kbuild,blackfin: Add CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED kbuild: add CONFIG_ prefix to USE_PRIVATE_LIBGCC config.mk: specify the exact path to standalone linker script kbuild: improve Kbuild speed Makefile| 13 +++-- arch/arm/cpu/arm720t/tegra114/config.mk | 19 --- arch/arm/cpu/arm720t/tegra124/config.mk | 7 --- arch/arm/cpu/arm720t/tegra20/config.mk | 10 -- arch/arm/cpu/arm720t/tegra30/config.mk | 19 --- arch/arm/lib/Makefile | 13 ++--- arch/blackfin/config.mk | 1 + arch/mips/cpu/mips32/config.mk | 3 ++- arch/mips/cpu/mips64/config.mk | 3 ++- arch/mips/cpu/xburst/config.mk | 3 ++- arch/mips/lib/Makefile | 7 +-- arch/nds32/config.mk| 3 ++- arch/powerpc/lib/Makefile | 6 +- arch/sh/lib/Makefile| 14 ++ arch/sparc/config.mk| 4 +++- arch/x86/config.mk | 2 +- board/bct-brettl2/config.mk | 13 - board/bf518f-ezbrd/config.mk| 13 - board/bf526-ezbrd/config.mk | 13 - board/bf527-ad7160-eval/config.mk | 13 - board/bf527-ezkit/config.mk | 13 - board/bf527-sdp/config.mk | 5 - board/bf533-ezkit/config.mk | 5 - board/bf533-stamp/config.mk | 5 - board/bf537-stamp/config.mk | 5 - board/bf538f-ezkit/config.mk| 5 - board/bf548-ezkit/config.mk | 5 - board/bf561-acvilon/config.mk | 5 - board/bf561-ezkit/config.mk | 5 - board/br4/config.mk | 15 --- board/cm-bf527/config.mk| 13 - board/cm-bf533/config.mk| 5 - board/cm-bf537e/config.mk | 5 - board/cm-bf537u/config.mk | 5 - board/cm-bf548/config.mk| 5 - board/cm-bf561/config.mk| 5 - board/ip04/config.mk| 5 - board/pr1/config.mk | 15 --- board/tcm-bf518/config.mk | 13 - board/tcm-bf537/config.mk | 5 - config.mk | 28 examples/standalone/Makefile| 5 ++--- include/configs/bct-brettl2.h | 2 +- include/configs/bf518f-ezbrd.h | 2 +- include/configs/bf526-ezbrd.h | 1 + include/configs/bf527-ad7160-eval.h | 2 +- include/configs/bf527-ezkit.h | 2 +- include/configs/bf527-sdp.h | 2 +- include/configs/bf533-ezkit.h | 2 +- include/configs/bf533-stamp.h | 1 + include/configs/bf537-stamp.h | 1 + include/configs/bf538f-ezkit.h | 2 +- include/configs/bf548-ezkit.h | 1 + include/configs/bf561-acvilon.h | 2 +- include/configs/bf561-ezkit.h | 1 + include/configs/br4.h | 2 +- include/configs/cm-bf527.h | 2 +- include/configs/cm-bf533.h | 2 +- include/configs/cm-bf537e.h | 1 + include/configs/cm-bf537u.h | 2 +- include/configs/cm-bf548.h | 1 + include/configs/cm-bf561.h | 2 +- include/configs/ip04.h | 1 + include/configs/pr1.h | 2 +- include/configs/tcm-bf518.h | 2 +- include/configs/tcm-bf537.h | 2 +- include/configs/tegra-common.h | 4 lib/Makefile| 2 ++ scripts/Makefile.build | 10 +- scripts/Makefile.lib| 7 +++ spl/Makefile| 17 - 71 files changed, 94 insertions(+), 342 deletions(-) delete mode 100644 arch/arm/cpu/arm720t/tegra114/config.mk delete mode 100644 arch/arm/cpu/arm720t/tegra124/config.mk delete mode 100644 arch/arm/cpu/arm720t/tegra20/config.mk delete mode 100644
[U-Boot] [PATCH v3 4/4] kbuild: improve Kbuild speed
Kbuild brought about many advantages for us but a significant performance regression was reported by Simon Glass. After some discussions and analysis, it turned out its main cause is in $(call cc-option,...). Historically, U-Boot parses all config.mk (arch/*/config.mk and board/*/config.mk) every time descending into subdirectories. That means cc-options are evaluated over and over again. $(call cc-option,...) is useful but costly. So we want to evaluate them only in ./Makefile and spl/Makefile and export compiler flags. This commit changes the build system as follows: - Modify scripts/Makefile.build to not include config.mk Instead, add $(PLATFORM_CPPFLAGS) to asflags-y, ccflags-y, cppflags-y. - Export many variables Going forward, Kbuild will not parse config.mk files when it descends into subdirectories. If we want to set variables in config.mk and use them in subdirectories, they must be exported. This is the list of variables to get exported: PLATFORM_CPPFLAGS CPUDIR BOARDDIR OBJCOPYFLAGS LDFLAGS LDFLAGS_FINAL (used in nand_spl/board/*/*/Makefile) CONFIG_STANDALONE_LOAD_ADDR (used in examples/standalone/Makefile) SYM_PREFIX (used in examples/standalone/Makefile) RELFLAGS (used in examples/standalone/Makefile) - Delete CPPFLAGS This variable has been replaced with PLATFORM_CPPFLAGS - Copy gcclibdir from example/standalone/Makefile to arch/sparc/config.mk The reference in CONFIG_STANDALONE_LOAD_ADDR must be resolved before it is exported. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Reported-by: Simon Glass s...@chromium.org Acked-by: Simon Glass s...@chromium.org Tested-by: Simon Glass s...@chromium.org [on Sandbox] Tested-by: Stephen Warren swar...@nvidia.com [on Tegra] --- Changes in v3: - Modify spl/Makefile: Move KBUILD_CFLAGS += -ffunction-sections -fdata-sections LDFLAGS_FINAL += --gc-sections after include $(TOPDIR)/config.mk because $(TOPDIR)/config.mk resets the state of LDFLAGS_FINAL. Otherwise, microblaze-generic board will be broken. Changes in v2: None Makefile | 7 --- arch/blackfin/config.mk | 1 + arch/sparc/config.mk | 2 ++ config.mk| 28 examples/standalone/Makefile | 5 ++--- scripts/Makefile.build | 10 +- scripts/Makefile.lib | 7 +++ spl/Makefile | 15 +++ 8 files changed, 44 insertions(+), 31 deletions(-) diff --git a/Makefile b/Makefile index b546d76..9e91509 100644 --- a/Makefile +++ b/Makefile @@ -358,13 +358,13 @@ UBOOTRELEASE = $(shell cat include/config/uboot.release 2 /dev/null) UBOOTVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION) export VERSION PATCHLEVEL SUBLEVEL UBOOTRELEASE UBOOTVERSION -export ARCH CPU BOARD VENDOR SOC +export ARCH CPU BOARD VENDOR SOC CPUDIR BOARDDIR export CONFIG_SHELL HOSTCC HOSTCFLAGS HOSTLDFLAGS CROSS_COMPILE AS LD CC export CPP AR NM LDR STRIP OBJCOPY OBJDUMP export MAKE AWK export DTC CHECK CHECKFLAGS -export KBUILD_CPPFLAGS NOSTDINC_FLAGS UBOOTINCLUDE +export KBUILD_CPPFLAGS NOSTDINC_FLAGS UBOOTINCLUDE OBJCOPYFLAGS LDFLAGS export KBUILD_CFLAGS KBUILD_AFLAGS # When compiling out-of-tree modules, put MODVERDIR in the module @@ -567,7 +567,8 @@ NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include) CHECKFLAGS += $(NOSTDINC_FLAGS) # FIX ME -cpp_flags := $(KBUILD_CPPFLAGS) $(CPPFLAGS) $(UBOOTINCLUDE) $(NOSTDINC_FLAGS) +cpp_flags := $(KBUILD_CPPFLAGS) $(PLATFORM_CPPFLAGS) $(UBOOTINCLUDE) \ + $(NOSTDINC_FLAGS) c_flags := $(KBUILD_CFLAGS) $(cpp_flags) # diff --git a/arch/blackfin/config.mk b/arch/blackfin/config.mk index adc9712..fcaa44f 100644 --- a/arch/blackfin/config.mk +++ b/arch/blackfin/config.mk @@ -43,6 +43,7 @@ CREATE_LDR_ENV = endif SYM_PREFIX = _ +export SYM_PREFIX LDR_FLAGS-y := LDR_FLAGS-$(CONFIG_BFIN_BOOTROM_USES_EVT1) += -J diff --git a/arch/sparc/config.mk b/arch/sparc/config.mk index 6dbf20f..be59f58 100644 --- a/arch/sparc/config.mk +++ b/arch/sparc/config.mk @@ -9,6 +9,8 @@ ifeq ($(CROSS_COMPILE),) CROSS_COMPILE := sparc-elf- endif +gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`) + CONFIG_STANDALONE_LOAD_ADDR ?= 0x -L $(gcclibdir) \ -T $(srctree)/examples/standalone/sparc.lds diff --git a/config.mk b/config.mk index af25c11..4657577 100644 --- a/config.mk +++ b/config.mk @@ -6,11 +6,18 @@ # # -# clean the slate ... -PLATFORM_RELFLAGS = -PLATFORM_CPPFLAGS = -PLATFORM_LDFLAGS = - +# This file is included from ./Makefile
[U-Boot] [PATCH v3 3/4] config.mk: specify the exact path to standalone linker script
We want to change the build system to include config.mk only from ./Makefile and spl/Makefile. We must prepare for that in this commit. $(src) is a moving target and not handy for our purpose. We must replace it with a fixed path. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- Changes in v3: None Changes in v2: None arch/mips/cpu/mips32/config.mk | 3 ++- arch/mips/cpu/mips64/config.mk | 3 ++- arch/mips/cpu/xburst/config.mk | 3 ++- arch/nds32/config.mk | 3 ++- arch/sparc/config.mk | 2 +- 5 files changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/mips/cpu/mips32/config.mk b/arch/mips/cpu/mips32/config.mk index 7ee7faa..cd4ce7a 100644 --- a/arch/mips/cpu/mips32/config.mk +++ b/arch/mips/cpu/mips32/config.mk @@ -21,4 +21,5 @@ else PLATFORM_LDFLAGS += -m elf32ltsmip endif -CONFIG_STANDALONE_LOAD_ADDR ?= 0x8020 -T $(srctree)/$(src)/mips.lds +CONFIG_STANDALONE_LOAD_ADDR ?= 0x8020 \ + -T $(srctree)/examples/standalone/mips.lds diff --git a/arch/mips/cpu/mips64/config.mk b/arch/mips/cpu/mips64/config.mk index 02113a1..3c01136 100644 --- a/arch/mips/cpu/mips64/config.mk +++ b/arch/mips/cpu/mips64/config.mk @@ -21,4 +21,5 @@ else PLATFORM_LDFLAGS += -m elf64ltsmip endif -CONFIG_STANDALONE_LOAD_ADDR ?= 0x8020 -T $(srctree)/$(src)/mips64.lds +CONFIG_STANDALONE_LOAD_ADDR ?= 0x8020 \ + -T $(srctree)/examples/standalone/mips64.lds diff --git a/arch/mips/cpu/xburst/config.mk b/arch/mips/cpu/xburst/config.mk index 00b0fd9..b8e53e5 100644 --- a/arch/mips/cpu/xburst/config.mk +++ b/arch/mips/cpu/xburst/config.mk @@ -12,4 +12,5 @@ else PLATFORM_LDFLAGS += -m elf32ltsmip endif -CONFIG_STANDALONE_LOAD_ADDR ?= 0x8020 -T $(srctree)/$(src)/mips.lds +CONFIG_STANDALONE_LOAD_ADDR ?= 0x8020 \ + -T $(srctree)/examples/standalone/mips.lds diff --git a/arch/nds32/config.mk b/arch/nds32/config.mk index 0cbc4ad..1024852 100644 --- a/arch/nds32/config.mk +++ b/arch/nds32/config.mk @@ -12,7 +12,8 @@ ifeq ($(CROSS_COMPILE),) CROSS_COMPILE := nds32le-linux- endif -CONFIG_STANDALONE_LOAD_ADDR = 0x30 -T $(srctree)/$(src)/nds32.lds +CONFIG_STANDALONE_LOAD_ADDR = 0x30 \ + -T $(srctree)/examples/standalone/nds32.lds PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -mrelax PLATFORM_RELFLAGS += -gdwarf-2 diff --git a/arch/sparc/config.mk b/arch/sparc/config.mk index e2327ec..6dbf20f 100644 --- a/arch/sparc/config.mk +++ b/arch/sparc/config.mk @@ -10,6 +10,6 @@ CROSS_COMPILE := sparc-elf- endif CONFIG_STANDALONE_LOAD_ADDR ?= 0x -L $(gcclibdir) \ - -T $(srctree)/$(src)/sparc.lds + -T $(srctree)/examples/standalone/sparc.lds PLATFORM_CPPFLAGS += -DCONFIG_SPARC -D__sparc__ -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/4] kbuild: add CONFIG_ prefix to USE_PRIVATE_LIBGCC
Before this commit, USE_PRIVATE_LIBGCC was defined in arch-specific config.mk and referenced in arch/$(ARCH)/lib/Makefile. We are not happy about parsing config.mk again and again. We have to keep the same behavior with a different way. By adding CONFIG_ prefix, this macro appears in include/autoconf.mk, include/spl-autoconf.mk. (And treating USE_PRIVATE_LIBGCC as CONFIG macro is reasonable enough.) Tegra SoC family defined USE_PRIVATE_LIBGCC as yes in arch/arm/cpu/arm720t/tegra*/config.mk, whereas did not define it in arch/arm/cpu/armv7/tegra*/config.mk. It means Tegra enables PRIVATE_LIBGCC only for SPL. We can describe the same behavior by adding #ifdef CONFIG_SPL_BUILD # define CONFIG_USE_PRIVATE_LIBGCC #endif to include/configs/tegra-common.h. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Cc: Tom Warren twar...@nvidia.com Cc: Simon Glass s...@chromium.org Acked-by: Stephen Warren swar...@nvidia.com --- Changes in v3: None Changes in v2: - Fix the subject and commit description s/USE_PRIVATE_LIBS/USE_PRIVATE_LIBGCC/ Makefile| 6 +++--- arch/arm/cpu/arm720t/tegra114/config.mk | 19 --- arch/arm/cpu/arm720t/tegra124/config.mk | 7 --- arch/arm/cpu/arm720t/tegra20/config.mk | 10 -- arch/arm/cpu/arm720t/tegra30/config.mk | 19 --- arch/arm/lib/Makefile | 13 ++--- arch/mips/lib/Makefile | 7 +-- arch/powerpc/lib/Makefile | 6 +- arch/sh/lib/Makefile| 14 ++ arch/x86/config.mk | 2 +- include/configs/tegra-common.h | 4 spl/Makefile| 2 +- 12 files changed, 15 insertions(+), 94 deletions(-) delete mode 100644 arch/arm/cpu/arm720t/tegra114/config.mk delete mode 100644 arch/arm/cpu/arm720t/tegra124/config.mk delete mode 100644 arch/arm/cpu/arm720t/tegra20/config.mk delete mode 100644 arch/arm/cpu/arm720t/tegra30/config.mk diff --git a/Makefile b/Makefile index 5b7e5e6..b546d76 100644 --- a/Makefile +++ b/Makefile @@ -651,11 +651,11 @@ u-boot-main := $(libs-y) # Add GCC lib -ifdef USE_PRIVATE_LIBGCC -ifeq ($(USE_PRIVATE_LIBGCC), yes) +ifdef CONFIG_USE_PRIVATE_LIBGCC +ifeq ($(CONFIG_USE_PRIVATE_LIBGCC),y) PLATFORM_LIBGCC = arch/$(ARCH)/lib/lib.a else -PLATFORM_LIBGCC = -L $(USE_PRIVATE_LIBGCC) -lgcc +PLATFORM_LIBGCC = -L $(CONFIG_USE_PRIVATE_LIBGCC) -lgcc endif else PLATFORM_LIBGCC := -L $(shell dirname `$(CC) $(c_flags) -print-libgcc-file-name`) -lgcc diff --git a/arch/arm/cpu/arm720t/tegra114/config.mk b/arch/arm/cpu/arm720t/tegra114/config.mk deleted file mode 100644 index 7947b50..000 --- a/arch/arm/cpu/arm720t/tegra114/config.mk +++ /dev/null @@ -1,19 +0,0 @@ -# -# Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, ga...@denx.de -# -# This program is free software; you can redistribute it and/or modify it -# under the terms and conditions of the GNU General Public License, -# version 2, as published by the Free Software Foundation. -# -# This program is distributed in the hope it will be useful, but WITHOUT -# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -# more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see http://www.gnu.org/licenses/. -# -USE_PRIVATE_LIBGCC = yes diff --git a/arch/arm/cpu/arm720t/tegra124/config.mk b/arch/arm/cpu/arm720t/tegra124/config.mk deleted file mode 100644 index 5e10701..000 --- a/arch/arm/cpu/arm720t/tegra124/config.mk +++ /dev/null @@ -1,7 +0,0 @@ -# -# (C) Copyright 2010-2013 -# NVIDIA Corporation www.nvidia.com -# -# SPDX-License-Identifier: GPL-2.0+ -#/ -USE_PRIVATE_LIBGCC = yes diff --git a/arch/arm/cpu/arm720t/tegra20/config.mk b/arch/arm/cpu/arm720t/tegra20/config.mk deleted file mode 100644 index e073345..000 --- a/arch/arm/cpu/arm720t/tegra20/config.mk +++ /dev/null @@ -1,10 +0,0 @@ -# -# (C) Copyright 2010,2011 -# NVIDIA Corporation www.nvidia.com -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, ga...@denx.de -# -# SPDX-License-Identifier: GPL-2.0+ -# -USE_PRIVATE_LIBGCC = yes diff --git a/arch/arm/cpu/arm720t/tegra30/config.mk b/arch/arm/cpu/arm720t/tegra30/config.mk deleted file mode 100644 index 2388c56..000 --- a/arch/arm/cpu/arm720t/tegra30/config.mk +++ /dev/null @@ -1,19 +0,0 @@ -# -# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, ga...@denx.de -# -# This program is free software; you can redistribute it and/or modify it -# under the terms and conditions of the GNU General Public License, -# version 2, as published by the Free Software Foundation. -# -# This program is
[U-Boot] [PATCH] mips: move CONFIG_MIPS{32, 64} definition to config.mk
All mip32 boards define CONFIG_MIPS32 in config headers except malta board which defines it in boards.cfg. We can consolidate them by defining it in arch/mips/cpu/mips32/config.mk. CONFIG_MIPS64 definition can be moved to arch/mips/cpu/mips64/config.mk as well. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Cc: Daniel Schwierzeck daniel.schwierz...@gmail.com --- arch/mips/cpu/mips32/config.mk | 4 +--- arch/mips/cpu/mips64/config.mk | 4 +--- boards.cfg | 4 ++-- include/configs/dbau1x00.h | 1 - include/configs/incaip.h | 1 - include/configs/pb1x00.h | 1 - include/configs/qemu-mips.h| 1 - include/configs/qemu-mips64.h | 1 - include/configs/vct.h | 1 - 9 files changed, 4 insertions(+), 14 deletions(-) diff --git a/arch/mips/cpu/mips32/config.mk b/arch/mips/cpu/mips32/config.mk index cd4ce7a..afd541c 100644 --- a/arch/mips/cpu/mips32/config.mk +++ b/arch/mips/cpu/mips32/config.mk @@ -11,9 +11,7 @@ # Note: Toolchains with binutils prior to v2.16 # are no longer supported by U-Boot MIPS tree! # -MIPSFLAGS := -march=mips32r2 - -PLATFORM_CPPFLAGS += $(MIPSFLAGS) +PLATFORM_CPPFLAGS += -DCONFIG_MIP32 -march=mips32r2 PLATFORM_CPPFLAGS += -mabi=32 -DCONFIG_32BIT ifdef CONFIG_SYS_BIG_ENDIAN PLATFORM_LDFLAGS += -m elf32btsmip diff --git a/arch/mips/cpu/mips64/config.mk b/arch/mips/cpu/mips64/config.mk index 3c01136..c55eb7f 100644 --- a/arch/mips/cpu/mips64/config.mk +++ b/arch/mips/cpu/mips64/config.mk @@ -11,9 +11,7 @@ # Note: Toolchains with binutils prior to v2.16 # are no longer supported by U-Boot MIPS tree! # -MIPSFLAGS = -march=mips64 - -PLATFORM_CPPFLAGS += $(MIPSFLAGS) +PLATFORM_CPPFLAGS += -DCONFIG_MIPS64 -march=mips64 PLATFORM_CPPFLAGS += -mabi=64 -DCONFIG_64BIT ifdef CONFIG_SYS_BIG_ENDIAN PLATFORM_LDFLAGS += -m elf64btsmip diff --git a/boards.cfg b/boards.cfg index 9bad27f..e26ef32 100644 --- a/boards.cfg +++ b/boards.cfg @@ -500,8 +500,8 @@ Active m68kmcf547x_8x - freescale m548xevb Active microblaze microblaze - xilinx microblaze-generic microblaze-generic - Michal Simek mon...@monstr.eu Active mipsmips32 - - qemu-mips qemu_mipsqemu-mips:SYS_BIG_ENDIAN Vlad Lungu vlad.lu...@windriver.com Active mipsmips32 - - qemu-mips qemu_mipsel qemu-mips:SYS_LITTLE_ENDIAN - -Active mipsmips32 - imgtec malta maltamalta:MIPS32,SYS_BIG_ENDIAN Paul Burton paul.bur...@imgtec.com -Active mipsmips32 - imgtec malta maltael malta:MIPS32,SYS_LITTLE_ENDIAN Paul Burton paul.bur...@imgtec.com +Active mipsmips32 - imgtec malta maltamalta:SYS_BIG_ENDIAN Paul Burton paul.bur...@imgtec.com +Active mipsmips32 - imgtec malta maltael malta:SYS_LITTLE_ENDIAN Paul Burton paul.bur...@imgtec.com Active mipsmips32 - micronasvct vct_platinum vct:VCT_PLATINUM - Active mipsmips32 - micronasvct vct_platinum_onenand vct:VCT_PLATINUM,VCT_ONENAND - Active mipsmips32 - micronasvct vct_platinum_onenand_small vct:VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE - diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h index da4ff8e..e0bf3dc 100644 --- a/include/configs/dbau1x00.h +++ b/include/configs/dbau1x00.h @@ -12,7 +12,6 @@ #ifndef __CONFIG_H #define
[U-Boot] [PATCH v2] mips: move CONFIG_MIPS{32, 64} definition to config.mk
All mips32 boards define CONFIG_MIPS32 in config headers except malta boards which define it in boards.cfg. We can consolidate them by defining it in arch/mips/cpu/mips32/config.mk. CONFIG_MIPS64 definition can be moved to arch/mips/cpu/mips64/config.mk as well. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Cc: Daniel Schwierzeck daniel.schwierz...@gmail.com --- Changes in v2: - Fix typo s/mip32/mips32/ in commit log. s/CONFIG_MIP32/CONFIG_MIPS32/ Anyway, CONFIG_MIPS32 is not used anywhere... arch/mips/cpu/mips32/config.mk | 4 +--- arch/mips/cpu/mips64/config.mk | 4 +--- boards.cfg | 4 ++-- include/configs/dbau1x00.h | 1 - include/configs/incaip.h | 1 - include/configs/pb1x00.h | 1 - include/configs/qemu-mips.h| 1 - include/configs/qemu-mips64.h | 1 - include/configs/vct.h | 1 - 9 files changed, 4 insertions(+), 14 deletions(-) diff --git a/arch/mips/cpu/mips32/config.mk b/arch/mips/cpu/mips32/config.mk index cd4ce7a..332cd62 100644 --- a/arch/mips/cpu/mips32/config.mk +++ b/arch/mips/cpu/mips32/config.mk @@ -11,9 +11,7 @@ # Note: Toolchains with binutils prior to v2.16 # are no longer supported by U-Boot MIPS tree! # -MIPSFLAGS := -march=mips32r2 - -PLATFORM_CPPFLAGS += $(MIPSFLAGS) +PLATFORM_CPPFLAGS += -DCONFIG_MIPS32 -march=mips32r2 PLATFORM_CPPFLAGS += -mabi=32 -DCONFIG_32BIT ifdef CONFIG_SYS_BIG_ENDIAN PLATFORM_LDFLAGS += -m elf32btsmip diff --git a/arch/mips/cpu/mips64/config.mk b/arch/mips/cpu/mips64/config.mk index 3c01136..c55eb7f 100644 --- a/arch/mips/cpu/mips64/config.mk +++ b/arch/mips/cpu/mips64/config.mk @@ -11,9 +11,7 @@ # Note: Toolchains with binutils prior to v2.16 # are no longer supported by U-Boot MIPS tree! # -MIPSFLAGS = -march=mips64 - -PLATFORM_CPPFLAGS += $(MIPSFLAGS) +PLATFORM_CPPFLAGS += -DCONFIG_MIPS64 -march=mips64 PLATFORM_CPPFLAGS += -mabi=64 -DCONFIG_64BIT ifdef CONFIG_SYS_BIG_ENDIAN PLATFORM_LDFLAGS += -m elf64btsmip diff --git a/boards.cfg b/boards.cfg index 9bad27f..e26ef32 100644 --- a/boards.cfg +++ b/boards.cfg @@ -500,8 +500,8 @@ Active m68kmcf547x_8x - freescale m548xevb Active microblaze microblaze - xilinx microblaze-generic microblaze-generic - Michal Simek mon...@monstr.eu Active mipsmips32 - - qemu-mips qemu_mipsqemu-mips:SYS_BIG_ENDIAN Vlad Lungu vlad.lu...@windriver.com Active mipsmips32 - - qemu-mips qemu_mipsel qemu-mips:SYS_LITTLE_ENDIAN - -Active mipsmips32 - imgtec malta maltamalta:MIPS32,SYS_BIG_ENDIAN Paul Burton paul.bur...@imgtec.com -Active mipsmips32 - imgtec malta maltael malta:MIPS32,SYS_LITTLE_ENDIAN Paul Burton paul.bur...@imgtec.com +Active mipsmips32 - imgtec malta maltamalta:SYS_BIG_ENDIAN Paul Burton paul.bur...@imgtec.com +Active mipsmips32 - imgtec malta maltael malta:SYS_LITTLE_ENDIAN Paul Burton paul.bur...@imgtec.com Active mipsmips32 - micronasvct vct_platinum vct:VCT_PLATINUM - Active mipsmips32 - micronasvct vct_platinum_onenand vct:VCT_PLATINUM,VCT_ONENAND - Active mipsmips32 - micronasvct vct_platinum_onenand_small vct:VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE - diff --git a/include/configs/dbau1x00.h
[U-Boot] [PATCH] powerpc: mpc8260: consolidate CONFIG_MPC8260 and CONFIG_8260
Before this commit, CONFIG_MPC8260 and CONFIG_8260 were used mixed-up. All boards with mpc8260 cpu defined both of them: - CONFIG_MPC8260 was defined in board config headers and include/common.h - CONFIG_8260 was defined arch/powerpc/cpu/mpc8260/config.mk We do not need to have both of them. This commit keeps only CONFIG_MPC8260. This commit does: - Delete CONFIG_8260 and CONFIG_MPC8260 definition in config headers and include/common.h - Rename CONFIG_8260 to CONFIG_MPC8260 in arch/powerpc/cpu/mpc8260/config.mk. - Rename #ifdef CONFIG_8260 to #ifdef CONFIG_MPC8260 Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Cc: Wolfgang Denk w...@denx.de --- This commit edits lots of files. So I built all PowerPC boards and compared MD5SUM to confirm the same binaries should still be produced with or without this patch. api/api_platform-powerpc.c| 2 +- arch/powerpc/cpu/mpc8260/config.mk| 2 +- arch/powerpc/cpu/mpc8260/kgdb.S | 2 -- arch/powerpc/cpu/mpc8260/start.S | 2 -- arch/powerpc/include/asm/processor.h | 2 +- arch/powerpc/include/asm/status_led.h | 2 +- arch/powerpc/include/asm/u-boot.h | 2 +- arch/powerpc/lib/board.c | 6 ++--- arch/powerpc/lib/kgdb.c | 10 board/cogent/mb.c | 4 ++-- board/cogent/serial.c | 2 +- board/hymod/hymod.h | 2 +- common/board_f.c | 6 ++--- common/cmd_bdinfo.c | 2 +- common/cmd_immap.c| 44 +-- examples/standalone/Makefile | 2 +- include/asm-generic/u-boot.h | 2 +- include/common.h | 11 - include/configs/CPU86.h | 1 - include/configs/CPU87.h | 1 - include/configs/IDS8247.h | 1 - include/configs/IPHASE4539.h | 1 - include/configs/ISPAN.h | 1 - include/configs/MPC8260ADS.h | 2 -- include/configs/MPC8266ADS.h | 1 - include/configs/PM826.h | 1 - include/configs/PM828.h | 1 - include/configs/RPXsuper.h| 1 - include/configs/Rattler.h | 1 - include/configs/TQM8260.h | 1 - include/configs/TQM8272.h | 1 - include/configs/ZPC1900.h | 1 - include/configs/atc.h | 1 - include/configs/ep8260.h | 1 - include/configs/ep82xxm.h | 1 - include/configs/gw8260.h | 1 - include/configs/hymod.h | 1 - include/configs/muas3001.h| 2 -- include/configs/ppmc8260.h| 1 - include/configs/rsdproto.h| 1 - include/configs/sacsng.h | 1 - include/ppc_asm.tmpl | 2 +- 42 files changed, 50 insertions(+), 82 deletions(-) diff --git a/api/api_platform-powerpc.c b/api/api_platform-powerpc.c index eb421d6..f23f175 100644 --- a/api/api_platform-powerpc.c +++ b/api/api_platform-powerpc.c @@ -30,7 +30,7 @@ int platform_sys_info(struct sys_info *si) si-clk_bus = gd-bus_clk; si-clk_cpu = gd-cpu_clk; -#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) || \ +#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || \ defined(CONFIG_E500) || defined(CONFIG_MPC86xx) #define bi_bar bi_immr_base #elif defined(CONFIG_MPC5xxx) diff --git a/arch/powerpc/cpu/mpc8260/config.mk b/arch/powerpc/cpu/mpc8260/config.mk index dfac710..59f152d 100644 --- a/arch/powerpc/cpu/mpc8260/config.mk +++ b/arch/powerpc/cpu/mpc8260/config.mk @@ -5,5 +5,5 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 \ +PLATFORM_CPPFLAGS += -DCONFIG_MPC8260 -DCONFIG_CPM2 \ -mstring -mcpu=603e -mmultiple diff --git a/arch/powerpc/cpu/mpc8260/kgdb.S b/arch/powerpc/cpu/mpc8260/kgdb.S index dd04d6b..1432344 100644 --- a/arch/powerpc/cpu/mpc8260/kgdb.S +++ b/arch/powerpc/cpu/mpc8260/kgdb.S @@ -9,8 +9,6 @@ #include mpc8260.h #include version.h -#define CONFIG_8260 1 /* needed for Linux kernel header files */ - #include ppc_asm.tmpl #include ppc_defs.h diff --git a/arch/powerpc/cpu/mpc8260/start.S b/arch/powerpc/cpu/mpc8260/start.S index 65510fa..324f132 100644 --- a/arch/powerpc/cpu/mpc8260/start.S +++ b/arch/powerpc/cpu/mpc8260/start.S @@ -14,8 +14,6 @@ #include mpc8260.h #include version.h -#define CONFIG_8260 1 /* needed for Linux kernel header files */ - #include ppc_asm.tmpl #include ppc_defs.h diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 831804c..72f30fe 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -1356,7 +1356,7 @@ void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); #elif defined(CONFIG_GEMINI) #define _machine _MACH_gemini
[U-Boot] [PATCH 3/3] net/phy: Add support for CS4315/CS4340 PHY
Add support for Cortina CS4315/CS4340 10G PHY.
- This driver loads CS43xx firmware to initialize Cortina PHY.
- To define macro CONFIG_PHY_CORTINA will enable this driver.
- Cortina PHY has non-standard offset of PHY ID registers, so
define own get_phy_id function.
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
drivers/net/phy/Makefile | 1 +
drivers/net/phy/cortina.c | 263 ++
drivers/net/phy/phy.c | 3 +
include/cortina.h | 73 +
include/phy.h | 2 +
5 files changed, 342 insertions(+)
create mode 100644 drivers/net/phy/cortina.c
create mode 100644 include/cortina.h
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index dbf7bf7..b091962 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -24,3 +24,4 @@ obj-$(CONFIG_PHY_REALTEK) += realtek.o
obj-$(CONFIG_PHY_SMSC) += smsc.o
obj-$(CONFIG_PHY_TERANETICS) += teranetics.o
obj-$(CONFIG_PHY_VITESSE) += vitesse.o
+obj-$(CONFIG_PHY_CORTINA) += cortina.o
diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c
new file mode 100644
index 000..35716f5
--- /dev/null
+++ b/drivers/net/phy/cortina.c
@@ -0,0 +1,263 @@
+/*
+ * Cortina CS4315/CS4340 10G PHY drivers
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ */
+
+#include config.h
+#include common.h
+#include linux/ctype.h
+#include linux/string.h
+#include linux/err.h
+#include phy.h
+#include cortina.h
+
+#ifndef CONFIG_PHYLIB_10G
+#error The Cortina PHY needs 10G support
+#endif
+
+struct cortina_reg_config cortina_reg_cfg[] = {
+ /* CS4315_enable_sr_mode */
+ {VILLA_GLOBAL_MSEQCLKCTRL, 0x8004},
+ {VILLA_MSEQ_OPTIONS, 0xf},
+ {VILLA_MSEQ_PC, 0x0},
+ {VILLA_MSEQ_BANKSELECT,0x4},
+ {VILLA_LINE_SDS_COMMON_SRX0_RX_CPA, 0x55},
+ {VILLA_LINE_SDS_COMMON_SRX0_RX_LOOP_FILTER, 0x30},
+ {VILLA_DSP_SDS_SERDES_SRX_DFE0_SELECT, 0x1},
+ {VILLA_DSP_SDS_DSP_COEF_DFE0_SELECT, 0x2},
+ {VILLA_LINE_SDS_COMMON_SRX0_RX_CPB, 0x2003},
+ {VILLA_DSP_SDS_SERDES_SRX_FFE_DELAY_CTRL, 0xF047},
+ {VILLA_MSEQ_ENABLE_MSB, 0x},
+ {VILLA_MSEQ_SPARE21_LSB, 0x6},
+ {VILLA_MSEQ_RESET_COUNT_LSB, 0x0},
+ {VILLA_MSEQ_SPARE12_MSB, 0x},
+ /*
+* to invert the receiver path, uncomment the next line
+* write (VILLA_MSEQ_SPARE12_MSB, 0x4000)
+*
+* SPARE2_LSB is used to configure the device while in sr mode to
+* enable power savings and to use the optical module LOS signal.
+* in power savings mode, the internal prbs checker can not be used.
+* if the optical module LOS signal is used as an input to the micro
+* code, then the micro code will wait until the optical module
+* LOS = 0 before turning on the adaptive equalizer.
+* Setting SPARE2_LSB bit 0 to 1 places the devie in power savings mode
+* while setting bit 0 to 0 disables power savings mode.
+* Setting SPARE2_LSB bit 2 to 0 configures the device to use the
+* optical module LOS signal while setting bit 2 to 1 configures the
+* device so that it will ignore the optical module LOS SPARE2_LSB = 0
+*/
+
+ /* enable power savings, ignore optical module LOS */
+ {VILLA_MSEQ_SPARE2_LSB, 0x5},
+
+ {VILLA_MSEQ_SPARE7_LSB, 0x1e},
+ {VILLA_MSEQ_BANKSELECT, 0x4},
+ {VILLA_MSEQ_SPARE9_LSB, 0x2},
+ {VILLA_MSEQ_SPARE3_LSB, 0x0F53},
+ {VILLA_MSEQ_SPARE3_MSB, 0x2006},
+ {VILLA_MSEQ_SPARE8_LSB, 0x3FF7},
+ {VILLA_MSEQ_SPARE8_MSB, 0x0A46},
+ {VILLA_MSEQ_COEF8_FFE0_LSB, 0xD500},
+ {VILLA_MSEQ_COEF8_FFE1_LSB, 0x0200},
+ {VILLA_MSEQ_COEF8_FFE2_LSB, 0xBA00},
+ {VILLA_MSEQ_COEF8_FFE3_LSB, 0x0100},
+ {VILLA_MSEQ_COEF8_FFE4_LSB, 0x0300},
+ {VILLA_MSEQ_COEF8_FFE5_LSB, 0x0300},
+ {VILLA_MSEQ_COEF8_DFE0_LSB, 0x0700},
+ {VILLA_MSEQ_COEF8_DFE0N_LSB, 0x0E00},
+ {VILLA_MSEQ_COEF8_DFE1_LSB, 0x0B00},
+ {VILLA_DSP_SDS_DSP_COEF_LARGE_LEAK, 0x2},
+ {VILLA_DSP_SDS_SERDES_SRX_DAC_ENABLEB_LSB, 0xD000},
+ {VILLA_MSEQ_POWER_DOWN_LSB, 0x},
+ {VILLA_MSEQ_POWER_DOWN_MSB, 0x0},
+ {VILLA_MSEQ_CAL_RX_SLICER, 0x80},
+ {VILLA_DSP_SDS_SERDES_SRX_DAC_BIAS_SELECT1_MSB, 0x3f},
+ {VILLA_GLOBAL_MSEQCLKCTRL, 0x4},
+ {VILLA_MSEQ_OPTIONS, 0x7},
+
+ /* set up min value for ffe1 */
+ {VILLA_MSEQ_COEF_INIT_SEL, 0x2},
+ {VILLA_DSP_SDS_DSP_PRECODEDINITFFE21, 0x41},
+
+ /* CS4315_sr_rx_pre_eq_set_4in */
+ {VILLA_GLOBAL_MSEQCLKCTRL, 0x8004},
+ {VILLA_MSEQ_OPTIONS, 0xf},
+ {VILLA_MSEQ_BANKSELECT, 0x4},
+ {VILLA_MSEQ_PC, 0x0},
+
+ /* for lengths from 3.5 to 4.5inches */
+ {VILLA_MSEQ_SERDES_PARAM_LSB, 0x0306},
+ {VILLA_MSEQ_SPARE25_LSB, 0x0306},
+ {VILLA_MSEQ_SPARE21_LSB, 0x2},
+
[U-Boot] [PATCH 2/3] net/phy: update get_phy_device_by_mask to probe more 10G PHY
In function get_phy_device_by_mask(), when trying Clause 45,
we should extend the value of devad(used in create_phy_by_mask)
to zero to cover more PHYs (e.g. devad must be 0 for CS4315 PHY).
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
drivers/net/phy/phy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index c8e7f64..7e9f2b2 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -647,9 +647,9 @@ static struct phy_device *get_phy_device_by_mask(struct
mii_dev *bus,
return phydev;
/* Try Standard (ie Clause 22) access */
/* Otherwise we have to try Clause 45 */
- for (i = 0; i 5; i++) {
+ for (i = 0; i 6; i++) {
phydev = create_phy_by_mask(bus, phy_mask,
- i ? i : MDIO_DEVAD_NONE, interface);
+ i ? i - 1 : MDIO_DEVAD_NONE, interface);
if (IS_ERR(phydev))
return NULL;
if (phydev)
--
1.8.0
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[U-Boot] [PATCH] malta: correct tcl script path in README.malta
README.malta referred to board/malta, but malta has now been moved within board/imgtec/, so correct the path. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Daniel Schwierzeck daniel.schwierz...@googlemail.com Cc: Paul Burton paul.bur...@imgtec.com --- doc/README.malta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/README.malta b/doc/README.malta index a495d02..c8db8a0 100644 --- a/doc/README.malta +++ b/doc/README.malta @@ -9,7 +9,7 @@ How to flash using a MIPS Navigator Probe: - Within Navigator Console run the following commands: - source /path/to/u-boot/board/malta/flash-malta-boot.tcl + source /path/to/u-boot/board/imgtec/malta/flash-malta-boot.tcl reset flash-boot /path/to/u-boot/u-boot.bin -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/3] samsung: Add mmc controller to use dw mmc
This patch set for use dw mmc controller. First, add dw mmc controller initialization. And then, change exynos4 mmc gpio configuration. Additionally, I have removed exynos4x12_set_mmc_clk function. Because samsung_get_base_clock() (exynos4x12/ exynos4) return same value. This patch set is tested on Trats2 board. Beomho Seo (3): board: samsung: trats2: Add DW MMC controller initialization arm: exynos: pinmux: Add sdmmc4 gpio confifuration arm: exynos: clock: Remove exynos4x12_set_mmc_clk function arch/arm/cpu/armv7/exynos/clock.c | 29 + arch/arm/cpu/armv7/exynos/pinmux.c | 20 +++- board/samsung/trats2/trats2.c | 31 +-- 3 files changed, 37 insertions(+), 43 deletions(-) -- Best Regards, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3] board: samsung: trats2: Add DW MMC controller initialization
Add DW MMC controller initialization. Selectively use DW MMC controller instead of SDHCI controller. Signed-off-by: Beomho Seo beomho@samsung.com Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com Cc: Minkyu Kang mk7.k...@samsung.com --- board/samsung/trats2/trats2.c | 31 +-- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c index c17c24d..11bebb9 100644 --- a/board/samsung/trats2/trats2.c +++ b/board/samsung/trats2/trats2.c @@ -11,6 +11,7 @@ #include asm/io.h #include asm/arch/gpio.h #include asm/arch/mmc.h +#include asm/arch/dwmmc.h #include asm/arch/power.h #include asm/arch/clk.h #include asm/arch/clock.h @@ -280,18 +281,19 @@ int board_mmc_init(bd_t *bis) gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2(); - /* eMMC_EN: SD_0_CDn: GPK0[2] Output High */ + /* eMMC_EN: SD_0_CDn or SD_4_CDn: GPK0[2] Output High */ s5p_gpio_direction_output(gpio2-k0, 2, 1); s5p_gpio_set_pull(gpio2-k0, 2, GPIO_PULL_NONE); /* * eMMC GPIO: * SDR 8-bit@48MHz at MMC0 -* GPK0[0] SD_0_CLK(2) -* GPK0[1] SD_0_CMD(2) -* GPK0[2] SD_0_CDn- Not used -* GPK0[3:6]SD_0_DATA[0:3](2) -* GPK1[3:6]SD_0_DATA[0:3](3) +* SDHCI DW-MMC +* GPK0[0] SD_0_CLK(2) SD_4_CLK(3) +* GPK0[1] SD_0_CMD(2) SD_4_CMD(3) +* GPK0[2] SD_0_CDnSD_4_CDn- Not used +* GPK0[3:6]SD_0_DATA[0:3](2) SD_4_DATA[0:3](3) +* GPK1[3:6]SD_0_DATA[4:7](3) SD_4_DATA[4:7](4) * * DDR 4-bit@26MHz at MMC4 * GPK0[0] SD_4_CLK(3) @@ -301,17 +303,26 @@ int board_mmc_init(bd_t *bis) * GPK1[3:6]SD_4_DATA[4:7](4) */ - err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE); - /* * MMC device init -* mmc0 : eMMC (8-bit buswidth) -* mmc2 : SD card (4-bit buswidth) +* mmc0 : eMMC, sdhci controller (8-bit buswidth) +* mmc2 : SD card, sdhci controller (4-bit buswidth) +* mmc4 : eMMC, dw-mmc controller (8-bit buswidth) */ + +#ifndef CONFIG_DWMMC + err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE); if (err0) debug(SDMMC0 not configured\n); else err0 = s5p_mmc_init(0, 8); +#else + err0 = exynos_pinmux_config(PERIPH_ID_SDMMC4, PINMUX_FLAG_8BIT_MODE); + if (err0) + debug(SDMMC4 not configured\n); + else + err0 = exynos_dwmci_add_port(4, 0x1255, 8, 0x0001); +#endif /* T-flash detect */ s5p_gpio_cfg_pin(gpio2-x3, 4, 0xf); -- 1.7.9.5 -- Best Regards, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3] arm: exynos: pinmux: Add sdmmc4 gpio configuration
For use dwmmc controller, add SDMMC4 gpio configuration.
Signed-off-by: Beomho Seo beomho@samsung.com
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
arch/arm/cpu/armv7/exynos/pinmux.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 645c497..a67664f 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -623,16 +623,25 @@ static int exynos4_mmc_config(int peripheral, int flags)
struct exynos4_gpio_part2 *gpio2 =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
struct s5p_gpio_bank *bank, *bank_ext;
+ unsigned int func, func_ext = 0;
int i;
switch (peripheral) {
case PERIPH_ID_SDMMC0:
bank = gpio2-k0;
bank_ext = gpio2-k1;
+ func = GPIO_FUNC(0x2);
+ func_ext = GPIO_FUNC(0x3);
break;
case PERIPH_ID_SDMMC2:
bank = gpio2-k2;
- bank_ext = gpio2-k3;
+ func = GPIO_FUNC(0x2);
+ break;
+ case PERIPH_ID_SDMMC4:
+ bank = gpio2-k0;
+ bank_ext = gpio2-k1;
+ func = GPIO_FUNC(0x3);
+ func_ext = GPIO_FUNC(0x4);
break;
default:
return -1;
@@ -640,13 +649,14 @@ static int exynos4_mmc_config(int peripheral, int flags)
for (i = 0; i 7; i++) {
if (i == 2)
continue;
- s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ s5p_gpio_cfg_pin(bank, i, func);
s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
}
- if (flags PINMUX_FLAG_8BIT_MODE) {
+ if ((flags PINMUX_FLAG_8BIT_MODE)
+ ~(peripheral PERIPH_ID_SDMMC2)) {
for (i = 3; i 7; i++) {
- s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(bank_ext, i, func_ext);
s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
}
@@ -710,10 +720,10 @@ static int exynos4_pinmux_config(int peripheral, int
flags)
break;
case PERIPH_ID_SDMMC0:
case PERIPH_ID_SDMMC2:
+ case PERIPH_ID_SDMMC4:
return exynos4_mmc_config(peripheral, flags);
case PERIPH_ID_SDMMC1:
case PERIPH_ID_SDMMC3:
- case PERIPH_ID_SDMMC4:
debug(SDMMC device %d not implemented\n, peripheral);
return -1;
default:
--
1.7.9.5
--
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Re: [U-Boot] FW: [PATCH v2] socfpga: Adding Clock Manager driver
Hi Pavel,
Hi!
Clock Manager driver will be called to reconfigure all the clocks
setting based on user input. The input are passed to Preloader through
handoff files
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Tom Rini tr...@ti.com
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
---
Changes for v2
- merge the handoff file and driver into single patch
+#include common.h
+#include asm/io.h
+#include asm/arch/clock_manager.h
+
+static const struct socfpga_clock_manager *clock_manager_base =
+ (void *)SOCFPGA_CLKMGR_ADDRESS;
+
+#define CLKMGR_BYPASS_ENUM_ENABLE1
+#define CLKMGR_BYPASS_ENUM_DISABLE 0
+#define CLKMGR_STAT_BUSY_ENUM_IDLE 0x0
+#define CLKMGR_STAT_BUSY_ENUM_BUSY 0x1
+#define CLKMGR_BYPASS_PERPLLSRC_ENUM_SELECT_EOSC10x0
+#define CLKMGR_BYPASS_PERPLLSRC_ENUM_SELECT_INPUT_MUX0x1
+#define CLKMGR_BYPASS_SDRPLLSRC_ENUM_SELECT_EOSC10x0
+#define CLKMGR_BYPASS_SDRPLLSRC_ENUM_SELECT_INPUT_MUX0x1
This is not too consistent. I guess dropping the 0x here would help. And
maybe CLKMGR_STAT_IDLE and CLKMGR_STAT_BUSY would be better define names?
Dropping _ENUM would help, too.
Fixed
+static inline void cm_wait_for_lock(uint32_t mask) {
+ register uint32_t inter_val;
+ do {
+ inter_val = readl(clock_manager_base-inter) mask;
+ } while (inter_val != mask);
+}
+
+/* function to poll in the fsm busy bit */ static inline void
+cm_wait4fsm(void) {
+ register uint32_t inter_val;
+ do {
+ inter_val = readl(clock_manager_base-stat)
CLKMGR_STAT_BUSY_ENUM_BUSY;
+ } while (inter_val);
+}
wait4fsm vs. wait_for_lock. Pick one style...
Fixed by using _for_
And actually ... maybe
while (readl(clock_manager_base-stat) CLKMGR_STAT_BUSY_ENUM_BUSY)
;
is easier to read? No need for variable...
Yup, fixed
+/* function to write a clock register that has phase information */
+static inline void cm_write_with_phase(uint32_t value,
+ uint32_t reg_address, uint32_t mask) {
+ /* poll until phase is zero */
+ do {} while (readl(reg_address) mask);
+
+ writel(value, reg_address);
+
+ do {} while (readl(reg_address) mask); }
drop do {} .
Fixed
+/*
+ * Setup clocks while making no assumptions of the
+ * previous state of the clocks.
...no assumptions about...?
+ * Start by being paranoid and gate all sw managed clocks
+ *
+ * Put all plls in bypass
+ *
+ * Put all plls VCO registers back to reset value (bgpwr dwn).
+ *
+ * Put peripheral and main pll src to reset value to avoid glitch.
+ *
+ * Delay 5 us.
+ *
+ * Deassert bg pwr dn and set numerator and denominator
+ *
+ * Start 7 us timer.
+ *
+ * set internal dividers
+ *
+ * Wait for 7 us timer.
+ *
+ * Enable plls
+ *
+ * Set external dividers while plls are locking
+ *
+ * Wait for pll lock
+ *
+ * Assert/deassert outreset all.
+ *
+ * Take all pll's out of bypass
+ *
+ * Clear safe mode
+ *
+ * set source main and peripheral clocks
+ *
+ * Ungate clocks
+ */
Drop empty lines, add . to end sentences, and spell out bg pwr dn?
Fixed
+void cm_basic_init(const cm_config_t *cfg) {
Split to smaller functions? Then you will not need the summary comment...
+ /* 7 us must have elapsed before we can enable the VCO */
+ for ( ; get_timer(start) timeout ; )
+ ;
while() ?
Fixed
--- a/arch/arm/cpu/armv7/socfpga/spl.c
+++ b/arch/arm/cpu/armv7/socfpga/spl.c
@@ -28,10 +28,100 @@ u32 spl_boot_device(void) void
spl_board_init(void) { #ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
+
+ cm_config_t cm_default_cfg = {
+ /* main group */
+ MAIN_VCO_BASE,
This will generate pretty bad code, no? Should it be static?
Its already a local variable.
+ CLKMGR_MAINPLLGRP_MPUCLK_CNT_SET(
+ CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT),
+ CLKMGR_MAINPLLGRP_MAINCLK_CNT_SET(
+ CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT),
+ CLKMGR_MAINPLLGRP_DBGATCLK_CNT_SET(
+ CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT),
+ CLKMGR_MAINPLLGRP_MAINQSPICLK_CNT_SET(
+ CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT),
+ CLKMGR_PERPLLGRP_PERNANDSDMMCCLK_CNT_SET(
+ CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT),
It would be good to somehow shorted identifiers so this fits to one line.
Yup, I tried but the variable contain few info there such as PLL type,
which portion of PLL and functionality.
+typedef struct {
...
+ uint32_t sdram_vco_base;
+ uint32_t ddrdqsclk;
+ uint32_t ddr2xdqsclk;
+ uint32_t ddrdqclk;
+ uint32_t s2fuser2clk;
+} cm_config_t;
typedefs for structs are usually not welcome...
Actually the struct only used in clock configuration. By
[U-Boot] [PATCH 3/3] arm: exynos: clock: Remove exynos4x12_set_mmc_clk function
Remove exynos4x12_set_mmc_clk.
Signed-off-by: Beomho Seo beomho@samsung.com
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 29 +
1 file changed, 1 insertion(+), 28 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 1fea4d6..2c2029a 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -893,30 +893,6 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned
int div)
(div 0xff) ((dev_index 4) + 8));
}
-/* exynos4x12: set the mmc clock */
-static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div)
-{
- struct exynos4x12_clock *clk =
- (struct exynos4x12_clock *)samsung_get_base_clock();
- unsigned int addr;
-
- /*
-* CLK_DIV_FSYS1
-* MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
-* CLK_DIV_FSYS2
-* MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
-*/
- if (dev_index 2) {
- addr = (unsigned int)clk-div_fsys1;
- } else {
- addr = (unsigned int)clk-div_fsys2;
- dev_index -= 2;
- }
-
- clrsetbits_le32(addr, 0xff ((dev_index 4) + 8),
- (div 0xff) ((dev_index 4) + 8));
-}
-
/* exynos5: set the mmc clock */
static void exynos5_set_mmc_clk(int dev_index, unsigned int div)
{
@@ -1612,10 +1588,7 @@ void set_mmc_clk(int dev_index, unsigned int div)
else
exynos5_set_mmc_clk(dev_index, div);
} else {
- if (proid_is_exynos4412())
- exynos4x12_set_mmc_clk(dev_index, div);
- else
- exynos4_set_mmc_clk(dev_index, div);
+ exynos4_set_mmc_clk(dev_index, div);
}
}
--
1.7.9.5
--
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[U-Boot] [PATCH 1/2] kbuild: move checkthumb to ARM archprepare
checkthumb makes sense only for ARM architecture. Move it to arch/arm/config.mk. To make sure gcc supports THUMB mode before beginning build, run checkthumb during archprepare. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- Makefile | 8 arch/arm/config.mk | 12 +++- 2 files changed, 11 insertions(+), 9 deletions(-) diff --git a/Makefile b/Makefile index 6882d10..7ed2d97 100644 --- a/Makefile +++ b/Makefile @@ -1114,14 +1114,6 @@ SYSTEM_MAP = \ System.map:u-boot @$(call SYSTEM_MAP,$) $@ -checkthumb: - @if test $(call cc-version) -lt 0404; then \ - echo -n '*** Your GCC does not produce working '; \ - echo 'binaries in THUMB mode.'; \ - echo '*** Your board is configured for THUMB mode.'; \ - false; \ - fi - # GCC 3.x is reported to have problems generating the type of relocation # that U-Boot wants. # See http://lists.denx.de/pipermail/u-boot/2012-September/135156.html diff --git a/arch/arm/config.mk b/arch/arm/config.mk index c5fd22f..be9e4c7 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -41,7 +41,17 @@ endif # Only test once ifneq ($(CONFIG_SPL_BUILD),y) -ALL-$(CONFIG_SYS_THUMB_BUILD) += checkthumb +ifeq ($(CONFIG_SYS_THUMB_BUILD),y) +archprepare: checkthumb + +checkthumb: + @if test $(call cc-version) -lt 0404; then \ + echo -n '*** Your GCC does not produce working '; \ + echo 'binaries in THUMB mode.'; \ + echo '*** Your board is configured for THUMB mode.'; \ + false; \ + fi +endif endif # Try if EABI is supported, else fall back to old API, -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] kbuild: move checkgcc4 to PowerPC archprepare
checkgcc4 is used only for PowerPC. Move it to arch/powerpc/config.mk. To make sure gcc is new enough before beginning build, run checkgcc4 during archprepare. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- Makefile | 9 - arch/powerpc/config.mk | 11 ++- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/Makefile b/Makefile index 7ed2d97..ea9400d 100644 --- a/Makefile +++ b/Makefile @@ -1114,15 +1114,6 @@ SYSTEM_MAP = \ System.map:u-boot @$(call SYSTEM_MAP,$) $@ -# GCC 3.x is reported to have problems generating the type of relocation -# that U-Boot wants. -# See http://lists.denx.de/pipermail/u-boot/2012-September/135156.html -checkgcc4: - @if test $(call cc-version) -lt 0400; then \ - echo -n '*** Your GCC is too old, please upgrade to GCC 4.x or newer'; \ - false; \ - fi - checkdtc: @if test $(call dtc-version) -lt 0104; then \ echo '*** Your dtc is too old, please upgrade to dtc 1.4 or newer'; \ diff --git a/arch/powerpc/config.mk b/arch/powerpc/config.mk index ac94b2e..9821068 100644 --- a/arch/powerpc/config.mk +++ b/arch/powerpc/config.mk @@ -35,5 +35,14 @@ endif # Only test once ifneq ($(CONFIG_SPL_BUILD),y) -ALL-y += checkgcc4 +archprepare: checkgcc4 + +# GCC 3.x is reported to have problems generating the type of relocation +# that U-Boot wants. +# See http://lists.denx.de/pipermail/u-boot/2012-September/135156.html +checkgcc4: + @if test $(call cc-version) -lt 0400; then \ + echo -n '*** Your GCC is too old, please upgrade to GCC 4.x or newer'; \ + false; \ + fi endif -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-ti/master
Hi Tom, On Tue, 4 Mar 2014 14:19:47 -0500, Tom Rini tr...@ti.com wrote: Hey, The following changes since commit eeb72e67619b98d2502fe634a3a5d9953de92ad0: Merge branch 'master' of git://git.denx.de/u-boot-arm (2014-02-26 16:49:58 -0500) are available in the git repository at: git://git.denx.de/u-boot-ti.git master for you to fetch changes up to cc07294bc704694ae33db75b25ac557e5917a83f: arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootup (2014-03-04 09:42:07 -0500) Dave Gerlach (3): ARM: AM43xx: EMIF: configure self-refresh entry delay ARM: AM43xx: Write sdram_config to secure_emif_sdram_config ARM: AM43xx: Change DDR3 Reset Value Lokesh Vutla (1): ARM: AM4372: Update EMIF registers for DDR3 Mugunthan V N (6): drivers: net: cpsw: add support to have phy address from cpsw platform data ARM: AM43xx: clocks: Enable CPGMAC clock control ARM: AM43xx: Add CPSW support to AM43xx EPOS and GP EVM ARM: AM335x: add support for reading cpsw 2nd mac address from efuse ARM: DRA7xx: add support for reading cpsw 2nd mac from efuse ARM: AM43xx: Add Ethernet boot support to SPL Stefan Roese (1): arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootup arch/arm/cpu/armv7/am33xx/clock_am43xx.c |1 + arch/arm/cpu/armv7/am33xx/ddr.c |5 +- arch/arm/cpu/armv7/am33xx/emif4.c|2 +- board/BuR/common/common.c|4 +- board/compulab/cm_t335/cm_t335.c |2 +- board/isee/igep0033/board.c |2 +- board/phytec/pcm051/board.c |4 +- board/siemens/dxr2/board.c |9 ++- board/siemens/dxr2/mux.c |2 + board/siemens/pxm2/board.c |4 +- board/siemens/rut/board.c|4 +- board/silica/pengwyn/board.c |4 +- board/ti/am335x/board.c | 19 +- board/ti/am43xx/board.c | 100 +- board/ti/am43xx/mux.c| 44 - board/ti/dra7xx/evm.c| 19 +- board/ti/ti814x/evm.c|4 +- drivers/net/cpsw.c |4 +- include/configs/am335x_evm.h |1 - include/configs/am335x_igep0033.h|1 - include/configs/am43xx_evm.h | 26 include/configs/bur_am335x_common.h |1 - include/configs/cm_t335.h|1 - include/configs/dra7xx_evm.h |1 - include/configs/dxr2.h |2 +- include/configs/pcm051.h |1 - include/configs/pengwyn.h|1 - include/configs/pxm2.h |1 - include/configs/rut.h|1 - include/configs/ti814x_evm.h |1 - include/configs/ti_am335x_common.h |1 + include/cpsw.h |2 +- 32 files changed, 235 insertions(+), 39 deletions(-) Applied to u-boot-arm/master, thanks! Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] Move arch-specific checks to archprepare target
Masahiro Yamada (2): kbuild: move checkthumb to ARM archprepare kbuild: move checkgcc4 to PowerPC archprepare Makefile | 17 - arch/arm/config.mk | 12 +++- arch/powerpc/config.mk | 11 ++- 3 files changed, 21 insertions(+), 19 deletions(-) -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3] net/phy: enable get_phy_id redefinable
As some PHYs have non-standard PHY ID registers, PHY Id can't
be read correctly by current get_phy_id function, so we enable
get_phy_id redefinable to permit specific PHY driver having own
specific get_phy_id function.
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
drivers/net/phy/phy.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index c691fbb..c8e7f64 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -577,7 +577,7 @@ static struct phy_device *phy_device_create(struct mii_dev
*bus, int addr,
* Description: Reads the ID registers of the PHY at @addr on the
* @bus, stores it in @phy_id and returns zero on success.
*/
-static int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
+static int __get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
{
int phy_reg;
@@ -601,6 +601,9 @@ static int get_phy_id(struct mii_dev *bus, int addr, int
devad, u32 *phy_id)
return 0;
}
+int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
+ __attribute__((weak, alias(__get_phy_id)));
+
static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
unsigned phy_mask, int devad, phy_interface_t interface)
{
--
1.8.0
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Re: [U-Boot] [PATCH 0/3] samsung: Add mmc controller to use dw mmc
Hi Beomho, This patch set for use dw mmc controller. First, add dw mmc controller initialization. And then, change exynos4 mmc gpio configuration. Additionally, I have removed exynos4x12_set_mmc_clk function. Because samsung_get_base_clock() (exynos4x12/ exynos4) return same value. Thank you for supporting the DW_MMC on Trats2. I've got following comments: 1. Piotr Wilczek (added to CC) is moving the Trats/Trats2 board to support configuration via device tree. From device tree it is easier to seamlessly enable support for DW_MMC (SDMMC4 controller) - at least we would avoid adding new #ifdefs. The way to enable it is almost identical to Exynos5250 (board snow). Now the v4 has been sent, so please look (and probably rebase your work) on them: [PATCH V4 00/12] Exynos4: add support for device tree http://article.gmane.org/gmane.comp.boot-loaders.u-boot/181576/match=exynos4+add+support+device+tree 2. We did some rough tests for the DW_MMC implementation on Trats2 (with clock phase settings similar to the one in the kernel) and it turned out that SDHCI is faster. Two possible explanations: - DDR is not supported by memory embedded on Trats2 - We did something wrong, so as a result the DDR mode for DW_MMC/eMMC memory was not working properly. However, I still believe, that DW_MMC with properly enabled DDR could outperform SDHCI. Why this speedup is important? We struggle to reduce time needed for flashing large images (like rootfs - e.g. 400 MiB in size). Any help is more than welcome :-). 3. u-boot general advice: When you alter things related to a particular board (like trats2 in this case) it is welcome to add the board's maintainer to CC. You can find them at boards.cfg. This patch set is tested on Trats2 board. Beomho Seo (3): board: samsung: trats2: Add DW MMC controller initialization arm: exynos: pinmux: Add sdmmc4 gpio confifuration arm: exynos: clock: Remove exynos4x12_set_mmc_clk function arch/arm/cpu/armv7/exynos/clock.c | 29 + arch/arm/cpu/armv7/exynos/pinmux.c | 20 +++- board/samsung/trats2/trats2.c | 31 +-- 3 files changed, 37 insertions(+), 43 deletions(-) -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH] kbuild: use cc-cross-prefix to choose CROSS_COMPILE
CROSS_COMPILE is generally passed from the command line or by the environment variable because cross tools vary from user to user. But, having some choices of often used CROSS_COMPILE seems reasonable. $(call cc-cross-prefix, ...) returns the first prefix where a prefix$(CC) is found in PATH. If your cross tools exist in the argument of $(call cc-cross-prefix, ...), you do not have to specify it explicitly. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- My question is which cross tools are popular enough to be added to the list. In my opition, arm-linux-gnueabi-gcc is popular because it is distributed in Ubuntu. On the other hand, I am not sure ppc_8xx-gcc is currently being used. Which one should be to added/deleted to our default list. Your comments are very welcome. (I am not familiar with compilers very much.) arch/arm/config.mk| 2 +- arch/microblaze/config.mk | 2 +- arch/powerpc/config.mk| 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/config.mk b/arch/arm/config.mk index 792cb43..c5fd22f 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -6,7 +6,7 @@ # ifeq ($(CROSS_COMPILE),) -CROSS_COMPILE := arm-linux- +CROSS_COMPILE := $(call cc-cross-prefix, arm-linux- arm-linux-gnueabi-) endif ifndef CONFIG_STANDALONE_LOAD_ADDR diff --git a/arch/microblaze/config.mk b/arch/microblaze/config.mk index cdb321a..dae74f8 100644 --- a/arch/microblaze/config.mk +++ b/arch/microblaze/config.mk @@ -9,7 +9,7 @@ # ifeq ($(CROSS_COMPILE),) -CROSS_COMPILE := mb- +CROSS_COMPILE := $(call cc-cross-prefix, mb- microblaze-linux-) endif CONFIG_STANDALONE_LOAD_ADDR ?= 0x80F0 diff --git a/arch/powerpc/config.mk b/arch/powerpc/config.mk index e398f97..ac94b2e 100644 --- a/arch/powerpc/config.mk +++ b/arch/powerpc/config.mk @@ -6,7 +6,7 @@ # ifeq ($(CROSS_COMPILE),) -CROSS_COMPILE := ppc_8xx- +CROSS_COMPILE := $(call cc-cross-prefix, ppc_8xx- powerpc-linux-) endif CONFIG_STANDALONE_LOAD_ADDR ?= 0x4 -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] kbuild: use cc-cross-prefix to choose CROSS_COMPILE
Hi Masahiro, CROSS_COMPILE is generally passed from the command line or by the environment variable because cross tools vary from user to user. But, having some choices of often used CROSS_COMPILE seems reasonable. $(call cc-cross-prefix, ...) returns the first prefix where a prefix$(CC) is found in PATH. If your cross tools exist in the argument of $(call cc-cross-prefix, ...), you do not have to specify it explicitly. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com I have to admit that I don't really like this approach. On the one hand it is an heuristic trying to guess the intentions of the user. This is nice if it works but can be very surprising when it goes wrong. But more imprtantly, it will blur the the boundaries of the build process as we trade the very self contained determinism of use what CROSS_COMPILE says to use what we may find in the rest of the system. It would even be possible that a once working build process will not work anymore because the user has installed a new toolchain in the meantime and then this completely unrelated action has an (unwanted) impact. In short, I would rather want to stay with our current (clearly defined) setup :) Best wishes Detlev -- He who can properly define and divide is to be considered a god. -- Plato -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] kbuild: use cc-cross-prefix to choose CROSS_COMPILE
Hi Detlev, On Wed, 05 Mar 2014 11:06:03 +0100 Detlev Zundel d...@denx.de wrote: Hi Masahiro, CROSS_COMPILE is generally passed from the command line or by the environment variable because cross tools vary from user to user. But, having some choices of often used CROSS_COMPILE seems reasonable. $(call cc-cross-prefix, ...) returns the first prefix where a prefix$(CC) is found in PATH. If your cross tools exist in the argument of $(call cc-cross-prefix, ...), you do not have to specify it explicitly. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com I have to admit that I don't really like this approach. On the one hand it is an heuristic trying to guess the intentions of the user. This is nice if it works but can be very surprising when it goes wrong. But more imprtantly, it will blur the the boundaries of the build process as we trade the very self contained determinism of use what CROSS_COMPILE says to use what we may find in the rest of the system. It would even be possible that a once working build process will not work anymore because the user has installed a new toolchain in the meantime and then this completely unrelated action has an (unwanted) impact. In short, I would rather want to stay with our current (clearly defined) setup :) Maybe this is verbose, but just in case, let me add a few words. If you like, you can still pass CROSS_COMPILE from the command line or by the environment variable. ifeq ($(CROSS_COMPILE),) CROSS_COMPILE := $(call cc-cross-prefix, arm-linux- arm-linux-gnueabi-) endif $(call cc-cross-prefix, ...) is invoked only when $(CROSS_COMPILE) is empty, that is CROSS_COMPILE is not explicitely specified. For users who know everything happening in the built system, this patch might be helpful for less typing... Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] kbuild: use cc-cross-prefix to choose CROSS_COMPILE
Hi Masahiro, Hi Detlev, On Wed, 05 Mar 2014 11:06:03 +0100 Detlev Zundel d...@denx.de wrote: Hi Masahiro, CROSS_COMPILE is generally passed from the command line or by the environment variable because cross tools vary from user to user. But, having some choices of often used CROSS_COMPILE seems reasonable. $(call cc-cross-prefix, ...) returns the first prefix where a prefix$(CC) is found in PATH. If your cross tools exist in the argument of $(call cc-cross-prefix, ...), you do not have to specify it explicitly. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com I have to admit that I don't really like this approach. On the one hand it is an heuristic trying to guess the intentions of the user. This is nice if it works but can be very surprising when it goes wrong. But more imprtantly, it will blur the the boundaries of the build process as we trade the very self contained determinism of use what CROSS_COMPILE says to use what we may find in the rest of the system. It would even be possible that a once working build process will not work anymore because the user has installed a new toolchain in the meantime and then this completely unrelated action has an (unwanted) impact. In short, I would rather want to stay with our current (clearly defined) setup :) Maybe this is verbose, but just in case, let me add a few words. If you like, you can still pass CROSS_COMPILE from the command line or by the environment variable. ifeq ($(CROSS_COMPILE),) CROSS_COMPILE := $(call cc-cross-prefix, arm-linux- arm-linux-gnueabi-) endif $(call cc-cross-prefix, ...) is invoked only when $(CROSS_COMPILE) is empty, that is CROSS_COMPILE is not explicitely specified. For users who know everything happening in the built system, this patch might be helpful for less typing... Yes, I fully understand your intention but I still believe that setting CROSS_COMPILE is usually scripted anyway so the savings are near negligible and the price we pay is adding (more) information about cross-toolchains which is really outside of the scope of U-Boot (or any other project I'd say). If there would be real savings, then maybe it is worth to break the principle of modularity but in the current discussion I just don't see that. Best wishes Detlev -- Our choice isn't between a digital world where the NSA can eavesdrop and one where the NSA is prevented from eavesdropping; it's between a digital world that is vulnerable to allattackers, and one that is secure for all users. -- Bruce Schneier -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 1/2] power: add PFUZE100 PMIC driver
On 13/02/2014 08:48, Tim Harvey wrote: Signed-off-by: Tim Harvey thar...@gateworks.com Acked-by: Stefano Babic sba...@denx.de --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/2] ventana: Add Gateworks Ventana family support
On 13/02/2014 08:48, Tim Harvey wrote: Gateworks Ventana is a product family based on the i.MX6. This patch adds support for all boards in the Ventana family. Where possible, data from the boards EEPROM is used to determine various details about the board at runtime. Signed-off-by: Tim Harvey thar...@gateworks.com Cc: Stefano Babic sba...@denx.de --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/5] wandboard: Staticize usdhc1_pads
On 15/02/2014 17:51, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Fix the following sparse warning: wandboard.c:58:22: warning: symbol 'usdhc1_pads' was not declared. Should it be static? Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/5] mmc: Add a prototype for board_mmc_init()
On 15/02/2014 17:51, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Fixes the following sparse warning: wandboard.c:137:5: warning: symbol 'board_mmc_init' was not declared. Should it be static? Cc: Pantelis Antoniou pa...@antoniou-consulting.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/5] wandboard: Include input.h
On 15/02/2014 17:52, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Include input.h in order to fix the following sparse warning: wandboard.c:278:5: warning: symbol 'overwrite_console' was not declared. Should it be static? Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/5] wandboard: Fix sparse warning
On 15/02/2014 17:52, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Add a prototype for board_phy_config() to fix the following sparse warning: wandboard.c:200:5: warning: symbol 'board_phy_config' was not declared. Should it be static? Cc: Joe Hershberger joe.hershber...@ni.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/5] fb: Add a prototype for board_video_skip()
On 15/02/2014 17:52, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Add a prototype for board_video_skip() in order to fix the following sparse warning: wandboard.c:227:5: warning: symbol 'board_video_skip' was not declared. Should it be static? Cc: Anatolij Gustschin ag...@denx.de Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/2] ventana: Add Gateworks Ventana family support
Hi Tim, On 05/03/2014 12:06, Stefano Babic wrote: On 13/02/2014 08:48, Tim Harvey wrote: Gateworks Ventana is a product family based on the i.MX6. This patch adds support for all boards in the Ventana family. Where possible, data from the boards EEPROM is used to determine various details about the board at runtime. Signed-off-by: Tim Harvey thar...@gateworks.com Cc: Stefano Babic sba...@denx.de --- Applied to u-boot-imx, thanks ! I merged but not yet pushed to the server. I have found an issue: gwventanaq cannot be compiled. In fact, the combination quad + 512MB RAM is not covered in /gw_ventana.cfg: /home/stefano/Projects/imx/u-boot-imx/board/gateworks/gw_ventana/gw_ventana.cfg:40:4: error: #error Unsupported CPU/Memory configuration Can you fix and resubmit ? Thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] kbuild: use cc-cross-prefix to choose CROSS_COMPILE
On Wed, Mar 05, 2014 at 06:24:24PM +0900, Masahiro Yamada wrote: CROSS_COMPILE is generally passed from the command line or by the environment variable because cross tools vary from user to user. But, having some choices of often used CROSS_COMPILE seems reasonable. $(call cc-cross-prefix, ...) returns the first prefix where a prefix$(CC) is found in PATH. If your cross tools exist in the argument of $(call cc-cross-prefix, ...), you do not have to specify it explicitly. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- My question is which cross tools are popular enough to be added to the list. In my opition, arm-linux-gnueabi-gcc is popular because it is distributed in Ubuntu. On the other hand, I am not sure ppc_8xx-gcc is currently being used. Which one should be to added/deleted to our default list. Your comments are very welcome. (I am not familiar with compilers very much.) arch/arm/config.mk| 2 +- arch/microblaze/config.mk | 2 +- arch/powerpc/config.mk| 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) Looking at the kernel, mips is a better example of where this becomes a handy thing, over just a stop passing CROSS_COMPILE. But that includes adding tool-archpref. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] mips: move CONFIG_MIPS{32, 64} definition to config.mk
2014-03-05 9:25 GMT+01:00 Masahiro Yamada yamad...@jp.panasonic.com: All mips32 boards define CONFIG_MIPS32 in config headers except malta boards which define it in boards.cfg. We can consolidate them by defining it in arch/mips/cpu/mips32/config.mk. CONFIG_MIPS64 definition can be moved to arch/mips/cpu/mips64/config.mk as well. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Cc: Daniel Schwierzeck daniel.schwierz...@gmail.com --- Changes in v2: - Fix typo s/mip32/mips32/ in commit log. s/CONFIG_MIP32/CONFIG_MIPS32/ Anyway, CONFIG_MIPS32 is not used anywhere... Indeed those defines are unused but it's a nice cleanup. Maybe I'll drop those defines in the future. arch/mips/cpu/mips32/config.mk | 4 +--- arch/mips/cpu/mips64/config.mk | 4 +--- boards.cfg | 4 ++-- include/configs/dbau1x00.h | 1 - include/configs/incaip.h | 1 - include/configs/pb1x00.h | 1 - include/configs/qemu-mips.h| 1 - include/configs/qemu-mips64.h | 1 - include/configs/vct.h | 1 - 9 files changed, 4 insertions(+), 14 deletions(-) Acked-by: Daniel Schwierzeck daniel.schwierz...@gmail.com -- - Daniel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] malta: correct tcl script path in README.malta
2014-03-04 15:48 GMT+01:00 James Hogan james.ho...@imgtec.com: README.malta referred to board/malta, but malta has now been moved within board/imgtec/, so correct the path. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Daniel Schwierzeck daniel.schwierz...@googlemail.com Cc: Paul Burton paul.bur...@imgtec.com --- doc/README.malta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) applied, thanks -- - Daniel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ppc4xx: Remove 4xx NAND booting support
Hi Stefan, On 04.03.2014 15:34, Stefan Roese wrote: As ppc4xx currently only supports the deprecated nand_spl infrastructure and nobody seems to have time / resources to port this over to the newer SPL infrastructure, lets remove NAND booting completely. This should not affect the normal, non NAND-booting ppc4xx platforms that are currently supported. Signed-off-by: Stefan Roese s...@denx.de Cc: Wolfgang Denk w...@denx.de Cc: Tirumala Marri tma...@apm.com Cc: Matthias Fuchs matthias.fu...@esd.eu Cc: Masahiro Yamada yamad...@jp.panasonic.com Cc: Tom Rini tr...@ti.com I used this chance to test today's U-Boot master with your patch on our PMC440 board. I do not see any problems related to your patch. So you may add Tested-by: Matthias Fuchs matthias.fu...@esd.eu Matthias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] A proposal/hack for an efficient USB DFU for linux based boards
Hi All, I was working with dfu-utill couple of years ago as part of my thesis. My task was to provide a firmware upgrade mechanism using USB. I had an open moko so I thought of implementing a solution based on it. The board I used is SAM9G45 http://www.atmel.com/devices/sam9g45.aspx. My observation in the current implementation was that, the partitions are getting listed as DFU capable devices with fixed address and to change their size or address, you need to change the u-boot-env. Considering the requirement I tweaked the protocol and some code to make a fast and flexible upgrade. I have explained about it here http://codelectron.wordpress.com/2014/02/28/flexible-firmware-upgrade/ Header source code here https://github.com/codelectron/DFU-Tweak/ Let me know your comments and feedback about this idea?. Thanks, Krishna ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] pinmux:exynos:uart:fix: Add default statement to remove warnings (gcc-4.8.2)
For Exynos' pinmux UART implementation there was a possibility to run
for() statement with uninitialized bank, start and count values.
Those warnings appear when following toolchain is used
(gcc-4.8.2-glibc-2.18-binutils-2.24):
warning: 'count' may be used uninitialized in this function
[-Wmaybe-uninitialized]
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
arch/arm/cpu/armv7/exynos/pinmux.c |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 645c497..494f608 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -39,6 +39,9 @@ static void exynos5_uart_config(int peripheral)
start = 4;
count = 2;
break;
+ default:
+ error(UART device %d not implemented\n, peripheral);
+ return;
}
for (i = start; i start + count; i++) {
s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
@@ -74,6 +77,9 @@ static void exynos5420_uart_config(int peripheral)
start = 4;
count = 2;
break;
+ default:
+ error(UART device %d not implemented\n, peripheral);
+ return;
}
for (i = start; i start + count; i++) {
@@ -683,6 +689,9 @@ static void exynos4_uart_config(int peripheral)
start = 4;
count = 2;
break;
+ default:
+ error(UART device %d not implemented\n, peripheral);
+ return;
}
for (i = start; i start + count; i++) {
s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
--
1.7.10.4
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[U-Boot] [PATCH v7] socfpga: Adding Scan Manager driver
Scan Manager driver will be called to configure the IOCSR
scan chain. This configuration will setup the IO buffer settings
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Dinh Nguyen dingu...@altera.com
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v7
- Enhance the function scan_chain_engine_is_idle
Changes for v6
- Fixed various coding style issue
Changes for v5
- Removal of additional blank line
- Added comment for magic number
Changes for v4
- avoid code duplication by add goto error
- include underscore to variables name
Changes for v3
- merge the handoff file and driver into single patch
Changes for v2
- rebase with latest v2014.01-rc1
---
arch/arm/cpu/armv7/socfpga/Makefile|2 +-
arch/arm/cpu/armv7/socfpga/scan_manager.c | 209 +++
arch/arm/cpu/armv7/socfpga/spl.c |4 +
arch/arm/include/asm/arch-socfpga/scan_manager.h | 90 +++
.../include/asm/arch-socfpga/socfpga_base_addrs.h |1 +
board/altera/socfpga/iocsr_config.c| 657
board/altera/socfpga/iocsr_config.h| 17 +
include/configs/socfpga_cyclone5.h |1 +
8 files changed, 980 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/cpu/armv7/socfpga/scan_manager.c
create mode 100644 arch/arm/include/asm/arch-socfpga/scan_manager.h
create mode 100644 board/altera/socfpga/iocsr_config.c
create mode 100644 board/altera/socfpga/iocsr_config.h
diff --git a/arch/arm/cpu/armv7/socfpga/Makefile
b/arch/arm/cpu/armv7/socfpga/Makefile
index cbe1d40..eb33f2c 100644
--- a/arch/arm/cpu/armv7/socfpga/Makefile
+++ b/arch/arm/cpu/armv7/socfpga/Makefile
@@ -9,4 +9,4 @@
obj-y := lowlevel_init.o
obj-y += misc.o timer.o reset_manager.o system_manager.o clock_manager.o
-obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o
+obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o scan_manager.o
diff --git a/arch/arm/cpu/armv7/socfpga/scan_manager.c
b/arch/arm/cpu/armv7/socfpga/scan_manager.c
new file mode 100644
index 000..a820b1b
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/scan_manager.c
@@ -0,0 +1,209 @@
+/*
+ * Copyright (C) 2013 Altera Corporation www.altera.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/freeze_controller.h
+#include asm/arch/scan_manager.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const struct socfpga_scan_manager *scan_manager_base =
+ (void *)(SOCFPGA_SCANMGR_ADDRESS);
+static const struct socfpga_freeze_controller *freeze_controller_base =
+ (void *)(SOCFPGA_SYSMGR_ADDRESS + SYSMGR_FRZCTRL_ADDRESS);
+
+/*
+ * Function to check IO scan chain engine status and wait if the engine is
+ * is active. Poll the IO scan chain engine till maximum iteration reached.
+ */
+static inline uint32_t scan_chain_engine_is_idle(uint32_t max_iter)
+{
+ uint32_t scanmgr_status;
+
+ scanmgr_status = readl(scan_manager_base-stat);
+
+ /* Poll the engine until the scan engine is inactive */
+ while (SCANMGR_STAT_ACTIVE_GET(scanmgr_status) ||
+ (SCANMGR_STAT_WFIFOCNT_GET(scanmgr_status) 0)) {
+ max_iter--;
+ if (max_iter 0)
+ scanmgr_status = readl(scan_manager_base-stat);
+ else
+ return 0;
+ }
+ return 1;
+}
+
+/* Program HPS IO Scan Chain */
+uint32_t scan_mgr_io_scan_chain_prg(
+ uint32_t io_scan_chain_id,
+ uint32_t io_scan_chain_len_in_bits,
+ const uint32_t *iocsr_scan_chain)
+{
+ uint16_t tdi_tdo_header;
+ uint32_t io_program_iter;
+ uint32_t io_scan_chain_data_residual;
+ uint32_t residual;
+ uint32_t i;
+ uint32_t index = 0;
+
+ /*
+* De-assert reinit if the IO scan chain is intended for HIO. In
+* this, its the chain 3.
+*/
+ if (io_scan_chain_id == 3)
+ clrbits_le32(freeze_controller_base-hioctrl,
+SYSMGR_FRZCTRL_HIOCTRL_DLLRST_MASK);
+
+ /*
+* Check if the scan chain engine is inactive and the
+* WFIFO is empty before enabling the IO scan chain
+*/
+ if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY))
+ return 1;
+
+ /*
+* Enable IO Scan chain based on scan chain id
+* Note: only one chain can be enabled at a time
+*/
+ setbits_le32(scan_manager_base-en, 1 io_scan_chain_id);
+
+ /*
+* Calculate number of iteration needed for full 128-bit (4 x32-bits)
+* bits shifting. Each TDI_TDO packet can shift in maximum 128-bits
+*/
+ io_program_iter = io_scan_chain_len_in_bits
+ IO_SCAN_CHAIN_128BIT_SHIFT;
+ io_scan_chain_data_residual = io_scan_chain_len_in_bits
+ IO_SCAN_CHAIN_128BIT_MASK;
+
+ /*
Re: [U-Boot] [PATCH v3] socfpga: Adding Clock Manager driver
On Tue 2014-03-04 22:13:53, Chin Liang See wrote: Clock Manager driver will be called to reconfigure all the clocks setting based on user input. The input are passed to Preloader through handoff files Signed-off-by: Chin Liang See cl...@altera.com Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: Tom Rini tr...@ti.com Cc: Wolfgang Denk w...@denx.de Acked-by: Pavel Machek pa...@denx.de -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6] socfpga: Adding Scan Manager driver
Hi! Also I expect that you can change all pins for uarts/ethernets/spi/i2c/etc that's why there is no golden configuration for socfpga that's why it is better to keep it empty just to compile it. Well, there are some development boards around... and having u-boot able to boot on the devel board by default would be very very useful. At same time, these files are located inside board folders. If user have different boards, they will have new set of folders here their own handoff files. From there, there won't the need to regenerate everytime. Please explain me one thing how many users will use this configuration? Especially these ~600 lines? Pretty much everyone when they test-boot their system...? Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6] socfpga: Adding Scan Manager driver
Hi! I changed that to if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY)) It should much better now Yes, thanks. Removed. Thanks Thanks for all the changes, it looks better now, so you have my Acked-by in another thread. Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6] socfpga: Adding Scan Manager driver
Hi Pavel,
On Mon, 2014-03-03 at 21:41 +0100, ZY - pavel wrote:
Hi!
Scan Manager driver will be called to configure the IOCSR
scan chain. This configuration will setup the IO buffer settings
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Dinh Nguyen dingu...@altera.com
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
+static inline uint32_t scan_chain_engine_is_idle(uint32_t max_iter)
+{
+ uint32_t scanmgr_status;
+
+ scanmgr_status = readl(scan_manager_base-stat);
+
+ /* Poll the engine until the scan engine is inactive */
+ while (SCANMGR_STAT_ACTIVE_GET(scanmgr_status) ||
+ (SCANMGR_STAT_WFIFOCNT_GET(scanmgr_status) 0)) {
+ max_iter--;
+ if (max_iter 0)
+ scanmgr_status = readl(scan_manager_base-stat);
+ else
+ return SCAN_MGR_STATUS_ACTIVE;
+ }
+ return SCAN_MGR_STATUS_IDLE;
+}
The function is named _is_idle, but returns 1 if it is _active_. I'd
get rid of SCAN_MGR_STATUS_* defines (they make it harder to read) and
reverse the logic...
This seems is controversial function :)
Yup, I already fixed that by removed the status variable.
+/* Program HPS IO Scan Chain */
+uint32_t scan_mgr_io_scan_chain_prg(
+ uint32_t io_scan_chain_id,
+ uint32_t io_scan_chain_len_in_bits,
+ const uint32_t *iocsr_scan_chain)
+{
...
+ /*
+* Check if the scan chain engine is inactive and the
+* WFIFO is empty before enabling the IO scan chain
+*/
+ if (scan_chain_engine_is_idle(SCAN_MAX_DELAY) != SCAN_MGR_STATUS_IDLE)
+ return 1;
Maybe it would be better to return 0 numbers on error?
I changed that to if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY))
It should much better now
Should the function be static? Then it could have shorter name...
Its already static and fit into single line now.
+ /* Disable IO Scan chain when configuration done*/
I'd put space before end of comment.
+/*
+ * Program HPS IO Scan Chain
+ * io_scan_chain_id - IO scan chain ID
+ * io_scan_chain_len_in_bits - IO scan chain length in bits
+ * iocsr_scan_chain - IO scan chain table
+ */
+uint32_t scan_mgr_io_scan_chain_prg(
+ uint32_t io_scan_chain_id,
+ uint32_t io_scan_chain_len_in_bits,
+ const uint32_t *iocsr_scan_chain);
...and you can probably drop the prototype...
Removed. Thanks
Chin Liang
Thanks,
Pavel
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[U-Boot] [PATCH V2 3/3] cmd:gpt: randomly generate each partition uuid if undefined
Changes:
- randomly generate each partition uuid if undefined
- print info about generated uuid
- save environment on gpt write success
- update doc/README.gpt
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Acked-by: Lukasz Majewski l.majew...@samsung.com
cc: Piotr Wilczek p.wilc...@samsung.com
cc: Tom Rini tr...@ti.com
---
Changes v2:
- cmd_gpt: extract_env: change return type from char to int
- add tmp array to generate uuid string
- store generated uuid in env and next get it from it - don't need to alloc
and maintain allcoated memory outside extract_env()
---
common/cmd_gpt.c | 33 ++---
doc/README.gpt |1 +
include/common.h |3 ++-
lib/Makefile |1 +
4 files changed, 30 insertions(+), 8 deletions(-)
diff --git a/common/cmd_gpt.c b/common/cmd_gpt.c
index 1f12e6d..cad402f 100644
--- a/common/cmd_gpt.c
+++ b/common/cmd_gpt.c
@@ -29,9 +29,11 @@
*
* @return - zero on successful expand and env is set
*/
-static char extract_env(const char *str, char **env)
+static int extract_env(const char *str, char **env)
{
+ int ret = -1;
char *e, *s;
+ char uuid_str[37];
if (!str || strlen(str) 4)
return -1;
@@ -43,16 +45,25 @@ static char extract_env(const char *str, char **env)
memset(s + strlen(s) - 1, '\0', 1);
memmove(s, s + 2, strlen(s) - 1);
e = getenv(s);
- free(s);
if (e == NULL) {
- printf(Environmental '%s' not set\n, str);
- return -1; /* env not set */
+ printf(%s unset. , str);
+ gen_rand_uuid_str(uuid_str);
+ setenv(s, uuid_str);
+
+ e = getenv(s);
+ if (e) {
+ puts(Setting to random.\n);
+ ret = 0;
+ }
+ } else {
+ ret = 0;
}
+
*env = e;
- return 0;
+ free(s);
}
- return -1;
+ return ret;
}
/**
@@ -299,8 +310,16 @@ static int do_gpt(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
return CMD_RET_FAILURE;
}
- if (gpt_default(blk_dev_desc, argv[4]))
+ puts(Writing GPT: );
+
+ ret = gpt_default(blk_dev_desc, argv[4]);
+ if (!ret) {
+ puts(success!\n);
+ return CMD_RET_SUCCESS;
+ } else {
+ puts(error!\n);
return CMD_RET_FAILURE;
+ }
} else {
return CMD_RET_USAGE;
}
diff --git a/doc/README.gpt b/doc/README.gpt
index 5c133f3..afe2538 100644
--- a/doc/README.gpt
+++ b/doc/README.gpt
@@ -176,3 +176,4 @@ Please, pay attention at -l switch for parted.
uuid program is recommended to generate UUID string. Moreover it can decode
(-d switch) passed in UUID string. It can be used to generate partitions UUID
passed to u-boot environment variables.
+If each partition uuid no exists then it will be randomly generated.
diff --git a/include/common.h b/include/common.h
index 20e9ae6..665c98f 100644
--- a/include/common.h
+++ b/include/common.h
@@ -834,7 +834,8 @@ char * strmhz(char *buf, unsigned long hz);
#if defined(CONFIG_RANDOM_MACADDR) || \
defined(CONFIG_BOOTP_RANDOM_DELAY) || \
defined(CONFIG_CMD_LINK_LOCAL) || \
- defined(CONFIG_RANDOM_UUID)
+ defined(CONFIG_RANDOM_UUID) || \
+ defined(CONFIG_PARTITION_UUIDS)
#define RAND_MAX -1U
void srand(unsigned int seed);
unsigned int rand(void);
diff --git a/lib/Makefile b/lib/Makefile
index 64a430f..e989b18 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -65,6 +65,7 @@ obj-$(CONFIG_BOOTP_PXE) += uuid.o
obj-$(CONFIG_PARTITION_UUIDS) += uuid.o
obj-$(CONFIG_RANDOM_UUID) += uuid.o
obj-$(CONFIG_RANDOM_UUID) += rand.o
+obj-$(CONFIG_PARTITION_UUIDS) += rand.o
obj-$(CONFIG_RANDOM_MACADDR) += rand.o
obj-$(CONFIG_BOOTP_RANDOM_DELAY) += rand.o
obj-$(CONFIG_CMD_LINK_LOCAL) += rand.o
--
1.7.9.5
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[U-Boot] [PATCH V2 1/3] part_efi: move uuid_string() and string_uuid() to lib/uuid.c
Changes:
Move functions:
- disk/part_efi.c uuid_string() to lib/uuid.c - uuid_bin_to_str()
- disk/part_efi.c string_uuid() to lib/uuid.c - uuid_str_to_bin()
Update files:
- include/common.h
- disk/part_efi.c
- lib/Makefile
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Acked-by: Lukasz Majewski l.majew...@samsung.com
cc: Stephen Warren swar...@nvidia.com
cc: tr...@ti.com
---
Changes v2:
- This commit is new after separate:
[PATCH 1/2] lib: uuid: add function to generate UUID version 4
- it introduces small refactor of common lib uuid functions
---
disk/part_efi.c | 90 +++---
include/common.h |3 +-
lib/Makefile |1 +
lib/uuid.c | 33 ++--
4 files changed, 44 insertions(+), 83 deletions(-)
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 733d5bd..a280ab5 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -63,26 +63,6 @@ static char *print_efiname(gpt_entry *pte)
return name;
}
-static void uuid_string(unsigned char *uuid, char *str)
-{
- static const u8 le[16] = {3, 2, 1, 0, 5, 4, 7, 6, 8, 9, 10, 11,
- 12, 13, 14, 15};
- int i;
-
- for (i = 0; i 16; i++) {
- sprintf(str, %02x, uuid[le[i]]);
- str += 2;
- switch (i) {
- case 3:
- case 5:
- case 7:
- case 9:
- *str++ = '-';
- break;
- }
- }
-}
-
static efi_guid_t system_guid = PARTITION_SYSTEM_GUID;
static inline int is_bootable(gpt_entry *p)
@@ -103,6 +83,7 @@ void print_part_efi(block_dev_desc_t * dev_desc)
gpt_entry *gpt_pte = NULL;
int i = 0;
char uuid[37];
+ unsigned char *uuid_bin;
if (!dev_desc) {
printf(%s: Invalid Argument(s)\n, __func__);
@@ -132,9 +113,11 @@ void print_part_efi(block_dev_desc_t * dev_desc)
le64_to_cpu(gpt_pte[i].ending_lba),
print_efiname(gpt_pte[i]));
printf(\tattrs:\t0x%016llx\n, gpt_pte[i].attributes.raw);
- uuid_string(gpt_pte[i].partition_type_guid.b, uuid);
+ uuid_bin = (unsigned char *)gpt_pte[i].partition_type_guid.b;
+ uuid_bin_to_str(uuid_bin, uuid);
printf(\ttype:\t%s\n, uuid);
- uuid_string(gpt_pte[i].unique_partition_guid.b, uuid);
+ uuid_bin = (unsigned char *)gpt_pte[i].unique_partition_guid.b;
+ uuid_bin_to_str(uuid_bin, uuid);
printf(\tuuid:\t%s\n, uuid);
}
@@ -182,7 +165,7 @@ int get_partition_info_efi(block_dev_desc_t * dev_desc, int
part,
sprintf((char *)info-type, U-Boot);
info-bootable = is_bootable(gpt_pte[part - 1]);
#ifdef CONFIG_PARTITION_UUIDS
- uuid_string(gpt_pte[part - 1].unique_partition_guid.b, info-uuid);
+ uuid_bin_to_str(gpt_pte[part - 1].unique_partition_guid.b, info-uuid);
#endif
debug(%s: start 0x LBAF , size 0x LBAF , name %s, __func__,
@@ -237,60 +220,6 @@ static int set_protective_mbr(block_dev_desc_t *dev_desc)
return 0;
}
-/**
- * string_uuid(); Convert UUID stored as string to bytes
- *
- * @param uuid - UUID represented as string
- * @param dst - GUID buffer
- *
- * @return return 0 on successful conversion
- */
-static int string_uuid(char *uuid, u8 *dst)
-{
- efi_guid_t guid;
- u16 b, c, d;
- u64 e;
- u32 a;
- u8 *p;
- u8 i;
-
- const u8 uuid_str_len = 36;
-
- /* The UUID is written in text: */
- /* 1914 19 24 */
- /* ---- */
-
- debug(%s: uuid: %s\n, __func__, uuid);
-
- if (strlen(uuid) != uuid_str_len)
- return -1;
-
- for (i = 0; i uuid_str_len; i++) {
- if ((i == 8) || (i == 13) || (i == 18) || (i == 23)) {
- if (uuid[i] != '-')
- return -1;
- } else {
- if (!isxdigit(uuid[i]))
- return -1;
- }
- }
-
- a = (u32)simple_strtoul(uuid, NULL, 16);
- b = (u16)simple_strtoul(uuid + 9, NULL, 16);
- c = (u16)simple_strtoul(uuid + 14, NULL, 16);
- d = (u16)simple_strtoul(uuid + 19, NULL, 16);
- e = (u64)simple_strtoull(uuid + 24, NULL, 16);
-
- p = (u8 *) e;
- guid = EFI_GUID(a, b, c, d 8, d 0xFF,
- *(p + 5), *(p + 4), *(p + 3),
- *(p + 2), *(p + 1) , *p);
-
- memcpy(dst, guid.b, sizeof(efi_guid_t));
-
- return 0;
-}
-
int write_gpt_table(block_dev_desc_t *dev_desc,
gpt_header *gpt_h, gpt_entry *gpt_e)
{
@@ -358,6 +287,7 @@ int gpt_fill_pte(gpt_header *gpt_h, gpt_entry *gpt_e,
size_t efiname_len, dosname_len;
#ifdef CONFIG_PARTITION_UUIDS
char
[U-Boot] [PATCH V2 2/3] lib: uuid: add functions to generate UUID version 4
This patch adds support to generate UUID (Universally Unique Identifier)
in version 4 based on RFC4122, which is randomly.
Source: https://www.ietf.org/rfc/rfc4122.txt
Changes:
- add new config: CONFIG_RANDOM_UUID: compile uuid.c and rand.c
Update files:
- include/common.h
- lib/Makefile
- lib/uuid.c
lib/uuid.c:
- add gen_rand_uuid() - this function writes 16 bytes len binary representation
UUID v4 to address given by user.
- add gen_rand_uuid_str() - this function writes 37 bytes len hexadecimal
ASCII string representation of 16 bytes binary UUID to address given by user.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
cc: Stephen Warren swar...@nvidia.com
cc: tr...@ti.com
---
Changes v2:
- put uuid generation changes in a separate commit
- get_uuid_str() - change name to gen_rand_uuid_str()
- add new function: gen_rand_uuid()
- remove unnecessary '\0' at the end of uuid string
- drop unnecessary error checking
- functions now takes pointers to allocated memory instead of alloc it itself
- add new config option: CONFIG_RANDOM_UUID
---
include/common.h |5 +++-
lib/Makefile |4 ++-
lib/uuid.c | 81 ++
3 files changed, 88 insertions(+), 2 deletions(-)
diff --git a/include/common.h b/include/common.h
index 32377ad..20e9ae6 100644
--- a/include/common.h
+++ b/include/common.h
@@ -815,6 +815,8 @@ voidudelay(unsigned long);
void mdelay(unsigned long);
/* lib/uuid.c */
+void gen_rand_uuid(unsigned char *uuid_bin);
+void gen_rand_uuid_str(char *uuid_str);
void uuid_bin_to_str(unsigned char *uuid, char *str);
int uuid_str_to_bin(char *uuid, unsigned char *out);
int uuid_str_valid(const char *uuid);
@@ -831,7 +833,8 @@ char * strmhz(char *buf, unsigned long hz);
/* lib/rand.c */
#if defined(CONFIG_RANDOM_MACADDR) || \
defined(CONFIG_BOOTP_RANDOM_DELAY) || \
- defined(CONFIG_CMD_LINK_LOCAL)
+ defined(CONFIG_CMD_LINK_LOCAL) || \
+ defined(CONFIG_RANDOM_UUID)
#define RAND_MAX -1U
void srand(unsigned int seed);
unsigned int rand(void);
diff --git a/lib/Makefile b/lib/Makefile
index 70962b2..64a430f 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -59,10 +59,12 @@ obj-y += linux_string.o
obj-$(CONFIG_REGEX) += slre.o
obj-y += string.o
obj-y += time.o
+obj-y += vsprintf.o
obj-$(CONFIG_TRACE) += trace.o
obj-$(CONFIG_BOOTP_PXE) += uuid.o
obj-$(CONFIG_PARTITION_UUIDS) += uuid.o
-obj-y += vsprintf.o
+obj-$(CONFIG_RANDOM_UUID) += uuid.o
+obj-$(CONFIG_RANDOM_UUID) += rand.o
obj-$(CONFIG_RANDOM_MACADDR) += rand.o
obj-$(CONFIG_BOOTP_RANDOM_DELAY) += rand.o
obj-$(CONFIG_CMD_LINK_LOCAL) += rand.o
diff --git a/lib/uuid.c b/lib/uuid.c
index 803bdcd..c0218ba 100644
--- a/lib/uuid.c
+++ b/lib/uuid.c
@@ -7,6 +7,29 @@
#include linux/ctype.h
#include errno.h
#include common.h
+#include part_efi.h
+#include malloc.h
+
+#define UUID_STR_LEN 36
+#define UUID_STR_BYTE_LEN 37
+#define UUID_BIN_BYTE_LEN 16
+
+#define UUID_VERSION_CLEAR_BITS0x0fff
+#define UUID_VERSION_SHIFT 12
+#define UUID_VERSION 0x4
+
+#define UUID_VARIANT_CLEAR_BITS0x3f
+#define UUID_VARIANT_SHIFT 7
+#define UUID_VARIANT 0x1
+
+struct uuid {
+ unsigned int time_low;
+ unsigned short time_mid;
+ unsigned short time_hi_and_version;
+ unsigned char clock_seq_hi_and_reserved;
+ unsigned char clock_seq_low;
+ unsigned char node[6];
+};
/*
* This is what a UUID string looks like.
@@ -94,3 +117,61 @@ void uuid_bin_to_str(unsigned char *uuid, char *str)
}
}
}
+
+/*
+ * gen_rand_uuid() - this function generates 16 bytes len UUID V4 (randomly)
+ * and stores it at a given pointer.
+ *
+ * Layout of UUID Version 4:
+ * timestamp - 60-bit: time_low, time_mid, time_hi_and_version
+ * version - 4 bit (bit 4 through 7 of the time_hi_and_version)
+ * clock seq - 14 bit: clock_seq_hi_and_reserved, clock_seq_low
+ * variant: - bit 6 and 7 of clock_seq_hi_and_reserved
+ * node - 48 bit
+ * In this version all fields beside 4 bit version are randomly generated.
+ * source: https://www.ietf.org/rfc/rfc4122.txt
+ *
+ * @param uuid_bin pointer to 16 bytes len array
+*/
+void gen_rand_uuid(unsigned char *uuid_bin)
+{
+ struct uuid *uuid = (struct uuid *)uuid_bin;
+ unsigned int *ptr = (unsigned int *)uuid_bin;
+ int i;
+
+ if (!uuid_bin)
+ return;
+
+ memset(uuid_bin, 0x0, sizeof(struct uuid));
+
+ /* Set all fields randomly */
+ for (i = 0; i sizeof(struct uuid) / sizeof(*ptr); i++)
+ *(ptr + i) = rand();
+
+ /* Set V4 format */
+ uuid-time_hi_and_version = UUID_VERSION_CLEAR_BITS;
+ uuid-time_hi_and_version |= UUID_VERSION UUID_VERSION_SHIFT;
+
+ uuid-clock_seq_hi_and_reserved = UUID_VARIANT_CLEAR_BITS;
+
[U-Boot] [PATCH V2 1/3] cpu: exynos4: ace_sha: add hardware random number generator support.
This patch adds implementation of function hw_rand() based on exynos
security sub system.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
cc: Akshay Saraswat aksha...@samsung.com
cc: ARUN MANKUZHI aru...@samsung.com
cc: Minkyu Kang mk7.k...@samsung.com
---
Changes v2:
- none
arch/arm/include/asm/arch-exynos/cpu.h |4 ++--
drivers/crypto/ace_sha.c | 41
drivers/crypto/ace_sha.h |8 ---
3 files changed, 48 insertions(+), 5 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index bccce63..a5c280d 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -48,7 +48,7 @@
#define EXYNOS4_GPIO_PART4_BASEDEVICE_NOT_AVAILABLE
#define EXYNOS4_DP_BASEDEVICE_NOT_AVAILABLE
#define EXYNOS4_SPI_ISP_BASE DEVICE_NOT_AVAILABLE
-#define EXYNOS4_ACE_SFR_BASE DEVICE_NOT_AVAILABLE
+#define EXYNOS4_ACE_SFR_BASE 0x1083
#define EXYNOS4_DMC_PHY_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS4_AUDIOSS_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS4_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE
@@ -87,7 +87,7 @@
#define EXYNOS4X12_I2S_BASEDEVICE_NOT_AVAILABLE
#define EXYNOS4X12_SPI_BASEDEVICE_NOT_AVAILABLE
#define EXYNOS4X12_SPI_ISP_BASEDEVICE_NOT_AVAILABLE
-#define EXYNOS4X12_ACE_SFR_BASEDEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_ACE_SFR_BASE0x1083
#define EXYNOS4X12_DMC_PHY_BASEDEVICE_NOT_AVAILABLE
#define EXYNOS4X12_AUDIOSS_BASEDEVICE_NOT_AVAILABLE
#define EXYNOS4X12_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE
diff --git a/drivers/crypto/ace_sha.c b/drivers/crypto/ace_sha.c
index acbafde..d12a507 100644
--- a/drivers/crypto/ace_sha.c
+++ b/drivers/crypto/ace_sha.c
@@ -111,3 +111,44 @@ void hw_sha1(const unsigned char *pbuf, unsigned int
buf_len,
if (ace_sha_hash_digest(pbuf, buf_len, pout, ACE_SHA_TYPE_SHA1))
debug(ACE was not setup properly or it is faulty\n);
}
+
+unsigned int hw_rand(void)
+{
+ struct exynos_ace_sfr *reg =
+ (struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
+ int status, i;
+ int seed[5];
+ unsigned int ret = 0;
+
+ /* Seed data */
+ for (i = 0; i ACE_HASH_PRNG_REG_NUM; i++)
+ writel(seed[i], reg-hash_seed[i]);
+
+ status = 0;
+ /* Wait for seed setup done */
+ while (!(status ACE_HASH_SEEDSETTING_MASK)) {
+ status = readl(reg-hash_status);
+ if (status ACE_HASH_PRNGERROR_MASK)
+ return 0;
+ }
+
+ /* Start PRNG */
+ writel(ACE_HASH_ENGSEL_PRNG | ACE_HASH_STARTBIT_ON, reg-hash_control);
+
+ status = 0;
+ /* Wait for PRNG done */
+ while (!(status ACE_HASH_PRNGDONE_MASK)) {
+ status = readl(reg-hash_status);
+ if (status ACE_HASH_PRNGERROR_MASK)
+ return 0;
+ }
+
+ /* Clear Done IRQ */
+ writel(ACE_HASH_PRNGDONE_MASK, reg-hash_status);
+
+ /* Read a PRNG result */
+ for (i = 0; i ACE_HASH_PRNG_REG_NUM; i++)
+ ret += readl(reg-hash_prng[i]);
+
+ return ret;
+}
diff --git a/drivers/crypto/ace_sha.h b/drivers/crypto/ace_sha.h
index a426d52..f1097f7 100644
--- a/drivers/crypto/ace_sha.h
+++ b/drivers/crypto/ace_sha.h
@@ -72,9 +72,10 @@ struct exynos_ace_sfr {
unsigned char res12[0x30];
unsigned inthash_result[8];
unsigned char res13[0x20];
- unsigned inthash_seed[8];
- unsigned inthash_prng[8];
- unsigned char res14[0x180];
+ unsigned inthash_seed[5];
+ unsigned char res14[12];
+ unsigned inthash_prng[5];
+ unsigned char res15[0x18c];
unsigned intpka_sfr[5]; /* base + 0x700 */
};
@@ -291,6 +292,7 @@ struct exynos_ace_sfr {
#define ACE_HASH_PRNGERROR_MASK(1 7)
#define ACE_HASH_PRNGERROR_OFF (0 7)
#define ACE_HASH_PRNGERROR_ON (1 7)
+#define ACE_HASH_PRNG_REG_NUM 5
#define ACE_SHA_TYPE_SHA1 1
#define ACE_SHA_TYPE_SHA2562
--
1.7.9.5
___
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[U-Boot] [PATCH V2 2/3] lib: rand: add call to hw_rand() - hardware random number generator
Changes:
- lib/rand.c: add call to hw_rand() (depends on CONFIG_RAND_HW_ACCEL)
- include/common.h: add hw_rand() declaration.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
cc: Michael Walle mich...@walle.cc
cc: Tom Rini tr...@ti.com
---
Changes v2:
- move function hw_rand() from rand() to rand_r() and ignore its argument
include/common.h |3 +++
lib/rand.c |3 +++
2 files changed, 6 insertions(+)
diff --git a/include/common.h b/include/common.h
index 96a45a6..58e2fbc 100644
--- a/include/common.h
+++ b/include/common.h
@@ -836,6 +836,9 @@ void srand(unsigned int seed);
unsigned int rand(void);
unsigned int rand_r(unsigned int *seedp);
#endif
+#ifdef CONFIG_RAND_HW_ACCEL
+unsigned int hw_rand(void);
+#endif
/* common/console.c */
intconsole_init_f(void); /* Before relocation; uses the serial stuff
*/
diff --git a/lib/rand.c b/lib/rand.c
index 5c367e1..0617063 100644
--- a/lib/rand.c
+++ b/lib/rand.c
@@ -14,6 +14,9 @@ static unsigned int y = 1U;
unsigned int rand_r(unsigned int *seedp)
{
+#ifdef CONFIG_RAND_HW_ACCEL
+ return hw_rand();
+#endif
*seedp ^= (*seedp 13);
*seedp ^= (*seedp 17);
*seedp ^= (*seedp 5);
--
1.7.9.5
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[U-Boot] [PATCH V2 3/3] trats/trats2: enable exynos security subsystem and function hw_rand()
This allows to use hardware random number generator from exynos security subsystem. Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com Acked-by: Lukasz Majewski l.majew...@samsung.com cc: Piotr Wilczek p.wilc...@samsung.com cc: Minkyu Kang mk7.k...@samsung.com --- Changes v2: - none include/configs/trats.h |4 include/configs/trats2.h |4 2 files changed, 8 insertions(+) diff --git a/include/configs/trats.h b/include/configs/trats.h index 718107a..2bf4172 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -313,6 +313,10 @@ #define CONFIG_USB_GADGET_VBUS_DRAW2 #define CONFIG_USB_CABLE_CHECK +/* Security subsystem - enable hw_rand() */ +#define CONFIG_EXYNOS_ACE_SHA +#define CONFIG_RAND_HW_ACCEL + /* Common misc for Samsung */ #define CONFIG_MISC_COMMON diff --git a/include/configs/trats2.h b/include/configs/trats2.h index e30c428..4163fcd 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -324,6 +324,10 @@ int get_soft_i2c_sda_pin(void); #define CONFIG_USB_GADGET_VBUS_DRAW2 #define CONFIG_USB_CABLE_CHECK +/* Security subsystem - enable hw_rand() */ +#define CONFIG_EXYNOS_ACE_SHA +#define CONFIG_RAND_HW_ACCEL + /* Common misc for Samsung */ #define CONFIG_MISC_COMMON -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] CONFIG_SYS_XIP_BOOT for when it's a choice?
Hey all, I'm looking over some patches for am43xx to enable the case of non-SPL XIP booting and this means we start getting code that's shared with am335x that looks like: #if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) || \ defined(CONFIG_QSPI_BOOT) ... #endif Because we need to do certain init either in SPL or early U-Boot. While I don't see another XIP boot case being added anytime soon, it would be nice to instead write: #if defined(CONFIG_SPL_BUILD) || defined(CONFIG_SYS_XIP_BOOT) or whatever makes the most sense for a name. Thoughts on the name? Thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] nand/denali: Adding Denali NAND driver support
On Mon, 2014-03-03 at 18:03 -0600, Scott Wood wrote:
On Fri, 2014-02-21 at 14:51 -0600, Chin Liang See wrote:
To add the Denali NAND driver support into U-Boot. It required
information such as register base address from configuration
header file within include/configs folder.
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Artem Bityutskiy artem.bityuts...@linux.intel.com
Cc: David Woodhouse david.woodho...@intel.com
Cc: Brian Norris computersforpe...@gmail.com
Cc: Scott Wood scottw...@freescale.com
---
Changes for v2
- Enable this driver support for SOCFPGA
---
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/denali_nand.c | 1166
drivers/mtd/nand/denali_nand.h | 501 +
3 files changed, 1668 insertions(+)
create mode 100644 drivers/mtd/nand/denali_nand.c
create mode 100644 drivers/mtd/nand/denali_nand.h
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 02b149c..24e8218 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o
obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o
obj-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
+obj-$(CONFIG_NAND_DENALI) += denali_nand.o
obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
diff --git a/drivers/mtd/nand/denali_nand.c b/drivers/mtd/nand/denali_nand.c
new file mode 100644
index 000..55246c9
--- /dev/null
+++ b/drivers/mtd/nand/denali_nand.c
It's denali.c in Linux -- why denali_nand.c here?
It seems all the existing U-Boot nand driver is using this naming
standard where platform_nand.
@@ -0,0 +1,1166 @@
+/*
+ * Copyright (C) 2013 Altera Corporation www.altera.com
+ * Copyright (C) 2009-2010, Intel Corporation and its suppliers.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include nand.h
+#include asm/errno.h
+#include asm/io.h
+
+#include denali_nand.h
+
+/* We define a module parameter that allows the user to override
+ * the hardware and decide what timing mode should be used.
+ */
+#define NAND_DEFAULT_TIMINGS -1
A module parameter? In U-Boot?
Removed
Sharing code with Linux is fine, but try to edit out the stuff that's
irrelevant in U-Boot.
+static struct denali_nand_info denali;
+static int onfi_timing_mode = NAND_DEFAULT_TIMINGS;
+
+/* We define a macro here that combines all interrupts this driver uses
into
+ * a single constant value, for convenience. */
+#define DENALI_IRQ_ALL (INTR_STATUS__DMA_CMD_COMP | \
+ INTR_STATUS__ECC_TRANSACTION_DONE | \
+ INTR_STATUS__ECC_ERR | \
+ INTR_STATUS__PROGRAM_FAIL | \
+ INTR_STATUS__LOAD_COMP | \
+ INTR_STATUS__PROGRAM_COMP | \
+ INTR_STATUS__TIME_OUT | \
+ INTR_STATUS__ERASE_FAIL | \
+ INTR_STATUS__RST_COMP | \
+ INTR_STATUS__ERASE_COMP | \
+ INTR_STATUS__ECC_UNCOR_ERR | \
+ INTR_STATUS__INT_ACT | \
+ INTR_STATUS__LOCKED_BLK)
+
+/* indicates whether or not the internal value for the flash bank is
+ * valid or not */
+#define CHIP_SELECT_INVALID-1
+
+#define SUPPORT_8BITECC1
+
+/* This macro divides two integers and rounds fractional values up
+ * to the nearest integer value. */
+#define CEIL_DIV(X, Y) (((X)%(Y)) ? ((X)/(Y)+1) : ((X)/(Y)))
+
+/* These constants are defined by the driver to enable common driver
+ * configuration options. */
+#define SPARE_ACCESS 0x41
+#define MAIN_ACCESS0x42
+#define MAIN_SPARE_ACCESS 0x43
+
+#define DENALI_UNLOCK_START0x10
+#define DENALI_UNLOCK_END 0x11
+#define DENALI_LOCK0x21
+#define DENALI_LOCK_TIGHT 0x31
+#define DENALI_BUFFER_LOAD 0x60
+#define DENALI_BUFFER_WRITE0x62
+
+#define DENALI_READ0
+#define DENALI_WRITE 0x100
+
+/* types of device accesses. We can issue commands and get status */
+#define COMMAND_CYCLE 0
+#define ADDR_CYCLE 1
+#define STATUS_CYCLE 2
+
+/* this is a helper macro that allows us to
+ * format the bank into the proper bits for the controller */
+#define BANK(x) ((x) 24)
+
+/* Interrupts are cleared by writing a 1 to the appropriate status bit */
+static inline void clear_interrupt(uint32_t irq_mask)
+{
+ uint32_t intr_status_reg = 0;
+ intr_status_reg = INTR_STATUS(denali.flash_bank);
+ __raw_writel(irq_mask, denali.flash_reg + intr_status_reg);
+}
Why are you using raw I/O accessors? The Linux driver doesn't do this.
Changed all to
Re: [U-Boot] [U-Boot, v3] nand/denali: Adding Denali NAND driver support
On Mon, 2014-03-03 at 20:24 -0600, Scott Wood wrote: On Thu, Feb 27, 2014 at 11:05:06AM -0600, Chin Liang See wrote: To add the Denali NAND driver support into U-Boot. It required information such as register base address from configuration header file within include/configs folder. Signed-off-by: Chin Liang See cl...@altera.com Cc: Artem Bityutskiy artem.bityuts...@linux.intel.com Cc: David Woodhouse david.woodho...@intel.com Cc: Brian Norris computersforpe...@gmail.com Cc: Scott Wood scottw...@freescale.com --- Changes for v3 - Fixed coding style Changes for v2 - Enable this driver support for SOCFPGA Sorry, didn't see this when I replied to v2. Some of those comments still apply, though. Yup, fixed +/* + * This macro divides two integers and rounds fractional values up + * to the nearest integer value. + */ +#define CEIL_DIV(X, Y) (((X)%(Y)) ? ((X)/(Y)+1) : ((X)/(Y))) How is this different from DIV_ROUND_UP(), other than being more complicated? All change to use DIV_ROUND_UP as no need to duplicate Thanks Chin Liang -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] nand/denali: Adding Denali NAND driver support
Hi Masahiro,
On Tue, 2014-03-04 at 19:31 +0900, Masahiro Yamada wrote:
Hello Scott, Chin,
+/* this is a helper macro that allows us to
+ * format the bank into the proper bits for the controller */
+#define BANK(x) ((x) 24)
+
+/* Interrupts are cleared by writing a 1 to the appropriate status bit */
+static inline void clear_interrupt(uint32_t irq_mask)
+{
+ uint32_t intr_status_reg = 0;
+ intr_status_reg = INTR_STATUS(denali.flash_bank);
+ __raw_writel(irq_mask, denali.flash_reg + intr_status_reg);
+}
Why are you using raw I/O accessors? The Linux driver doesn't do this.
Add ioread32/iowrite32 to arch/arm/include/asm/io.h
and use them?
Changed all to use standard writel and readl.
+
+static uint32_t wait_for_irq(uint32_t irq_mask)
+{
+ unsigned long comp_res = 1000;
+ uint32_t intr_status = 0;
+
+ do {
+ intr_status = read_interrupt_status() DENALI_IRQ_ALL;
+ if (intr_status irq_mask) {
+ denali.irq_status = ~irq_mask;
+ /* our interrupt was detected */
+ break;
+ }
+ udelay(1);
+ comp_res--;
+ } while (comp_res != 0);
This looks like a much shorter timeout than Linux uses (1000us versus
1000ms). Though FWIW the Linux timeout code looks buggy.
Also, comp_res is a very odd name for a timeout variable.
Right. I think wait time is too short.
When I tested this code on my board, timeout error always
occurred on page write command.
I had to fix it to run write command.
s/udelay(1)/udelay(1000)/
Hmmm that is interesting.
Probably I speed up the NAND controller to max.
Anyway, the delay now is 1s.
There is another problem.
I think there is a cache coherency problem in this driver code.
DMA is used in this driver but D-cache is never flushed.
When D-cache is on (CONFIG_SYS_DCACHE_OFF is not defined),
ARM processor writes to/reads from the buffer through D-cache.
On the other hand, Denali NAND controller always wites to/reads from
the buffer on physical memory.
So, this driver writes/reads wrong data.
I had to add flush_dcache_range() function call
in denali_setup_dma_sequence().
@@ -689,6 +689,8 @@ static void denali_setup_dma_sequence(int op)
uint32_t mode;
uint32_t addr = (uint32_t)denali.buf.dma_buf;
+ flush_dcache_range(addr, addr + sizeof(denali.buf.dma_buf));
+
mode = MODE_10 | BANK(denali.flash_bank);
/* DMA is a four step process */
I miss out this as I didn't enable the cache.
Thanks and I will put this into new patches
Chin Liang
Best Regards
Masahiro Yamada
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Re: [U-Boot] [PATCH 1/3] powerpc/p1010rdb: SECURE BOOT- define CONFIG_SYS_RAMBOOT for NAND boot
On Tue, 2014-03-04 at 23:30 -0600, Bansal Aneesh-B39320 wrote: Yes, in case of secure boot from NAND, the DRAM is initialized by the BootROM and complete u-boot image is copied from NAND to DRAM by the BootROM. So, it should be called RAMBOOT. DRAM or SRAM? Having ROM initialize DDR is a bit scary. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 1/2] nand/denali: Adding Denali NAND driver support
To add the Denali NAND driver support into U-Boot. It required
information such as register base address from configuration
header file within include/configs folder.
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Artem Bityutskiy artem.bityuts...@linux.intel.com
Cc: David Woodhouse david.woodho...@intel.com
Cc: Brian Norris computersforpe...@gmail.com
Cc: Scott Wood scottw...@freescale.com
Cc: Masahiro Yamada yamad...@jp.panasonic.com
---
Changes for v4
- Added cache flush to handle dcache enabled
- Used standard return where 0 for pass
- Removed unnecessary casting
- Used standard readl and writel
Changes for v3
- Fixed coding style
Changes for v2
- Enable this driver support for SOCFPGA
---
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/denali_nand.c | 1146
drivers/mtd/nand/denali_nand.h | 493 +
3 files changed, 1640 insertions(+)
create mode 100644 drivers/mtd/nand/denali_nand.c
create mode 100644 drivers/mtd/nand/denali_nand.h
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 02b149c..24e8218 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o
obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o
obj-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
+obj-$(CONFIG_NAND_DENALI) += denali_nand.o
obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
diff --git a/drivers/mtd/nand/denali_nand.c b/drivers/mtd/nand/denali_nand.c
new file mode 100644
index 000..ffa69ad
--- /dev/null
+++ b/drivers/mtd/nand/denali_nand.c
@@ -0,0 +1,1146 @@
+/*
+ * Copyright (C) 2013-2014 Altera Corporation www.altera.com
+ * Copyright (C) 2009-2010, Intel Corporation and its suppliers.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include nand.h
+#include asm/errno.h
+#include asm/io.h
+
+#include denali_nand.h
+
+#define NAND_DEFAULT_TIMINGS -1
+
+static struct denali_nand_info denali;
+static int onfi_timing_mode = NAND_DEFAULT_TIMINGS;
+
+/* We define a macro here that combines all interrupts this driver uses into
+ * a single constant value, for convenience. */
+#define DENALI_IRQ_ALL (INTR_STATUS__DMA_CMD_COMP | \
+ INTR_STATUS__ECC_TRANSACTION_DONE | \
+ INTR_STATUS__ECC_ERR | \
+ INTR_STATUS__PROGRAM_FAIL | \
+ INTR_STATUS__LOAD_COMP | \
+ INTR_STATUS__PROGRAM_COMP | \
+ INTR_STATUS__TIME_OUT | \
+ INTR_STATUS__ERASE_FAIL | \
+ INTR_STATUS__RST_COMP | \
+ INTR_STATUS__ERASE_COMP | \
+ INTR_STATUS__ECC_UNCOR_ERR | \
+ INTR_STATUS__INT_ACT | \
+ INTR_STATUS__LOCKED_BLK)
+
+/* indicates whether or not the internal value for the flash bank is
+ * valid or not */
+#define CHIP_SELECT_INVALID-1
+
+#define SUPPORT_8BITECC1
+
+/* These constants are defined by the driver to enable common driver
+ * configuration options. */
+#define SPARE_ACCESS 0x41
+#define MAIN_ACCESS0x42
+#define MAIN_SPARE_ACCESS 0x43
+
+#define DENALI_UNLOCK_START0x10
+#define DENALI_UNLOCK_END 0x11
+#define DENALI_LOCK0x21
+#define DENALI_LOCK_TIGHT 0x31
+#define DENALI_BUFFER_LOAD 0x60
+#define DENALI_BUFFER_WRITE0x62
+
+#define DENALI_READ0
+#define DENALI_WRITE 0x100
+
+#define DENALI_DATA_OFFSET_ADDRESS 0x10
+
+/* types of device accesses. We can issue commands and get status */
+#define COMMAND_CYCLE 0
+#define ADDR_CYCLE 1
+#define STATUS_CYCLE 2
+
+/* this is a helper macro that allows us to
+ * format the bank into the proper bits for the controller */
+#define BANK(x) ((x) 24)
+
+/* Interrupts are cleared by writing a 1 to the appropriate status bit */
+static inline void clear_interrupt(uint32_t irq_mask)
+{
+ uint32_t intr_status_reg = 0;
+ intr_status_reg = INTR_STATUS(denali.flash_bank);
+ writel(irq_mask, denali.flash_reg + intr_status_reg);
+}
+
+static uint32_t read_interrupt_status(void)
+{
+ uint32_t intr_status_reg = 0;
+ intr_status_reg = INTR_STATUS(denali.flash_bank);
+ return readl(denali.flash_reg + intr_status_reg);
+}
+
+static void clear_interrupts(void)
+{
+ uint32_t status = 0;
+ status = read_interrupt_status();
+ clear_interrupt(status);
+ denali.irq_status = 0;
+}
+
+static void denali_irq_enable(uint32_t int_mask)
+{
+ int i;
+ for (i = 0; i denali.max_banks; ++i)
+ writel(int_mask, denali.flash_reg + INTR_EN(i));
+}
+
+static uint32_t wait_for_irq(uint32_t irq_mask)
+{
+ unsigned long timeout = 100;
+ uint32_t intr_status;
+
+ do {
+
Re: [U-Boot] [PATCH v6] socfpga: Adding Scan Manager driver
On Wed, 2014-03-05 at 17:15 +0100, ZY - pavel wrote: Hi! I changed that to if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY)) It should much better now Yes, thanks. Removed. Thanks Thanks for all the changes, it looks better now, so you have my Acked-by in another thread. Thanks for reviewing too! Chin Liang Pavel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] nand/denali: Adding Denali NAND driver support
On Wed, 2014-03-05 at 11:34 -0600, Chin Liang See wrote: On Mon, 2014-03-03 at 18:03 -0600, Scott Wood wrote: On Fri, 2014-02-21 at 14:51 -0600, Chin Liang See wrote: To add the Denali NAND driver support into U-Boot. It required information such as register base address from configuration header file within include/configs folder. Signed-off-by: Chin Liang See cl...@altera.com Cc: Artem Bityutskiy artem.bityuts...@linux.intel.com Cc: David Woodhouse david.woodho...@intel.com Cc: Brian Norris computersforpe...@gmail.com Cc: Scott Wood scottw...@freescale.com --- Changes for v2 - Enable this driver support for SOCFPGA --- drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/denali_nand.c | 1166 drivers/mtd/nand/denali_nand.h | 501 + 3 files changed, 1668 insertions(+) create mode 100644 drivers/mtd/nand/denali_nand.c create mode 100644 drivers/mtd/nand/denali_nand.h diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index 02b149c..24e8218 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -39,6 +39,7 @@ obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o obj-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o +obj-$(CONFIG_NAND_DENALI) += denali_nand.o obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o diff --git a/drivers/mtd/nand/denali_nand.c b/drivers/mtd/nand/denali_nand.c new file mode 100644 index 000..55246c9 --- /dev/null +++ b/drivers/mtd/nand/denali_nand.c It's denali.c in Linux -- why denali_nand.c here? It seems all the existing U-Boot nand driver is using this naming standard where platform_nand. Not all -- there's omap_gpmc.c, omap_elm.c, nomadik.c, ndfc.c, etc. A lot of them have the _nand.c suffix in Linux, too. Personally, I think it's redundant. Why PASS/FAIL rather than normal 0 on success, negative error code on error? Why uint16_t? Fixed by returning 0 when pass. Also changed uint16_t to uint32_t Why uint32_t and not int? Is that return value somewhere used in a context that expects a NAND hardware status? -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mx25pdk: Align the environment with other FSL boards
From: Fabio Estevam fabio.este...@freescale.com
Allow the boot of a device tree mainline kernel by aligning the environment
variables with other FSL boards.
Tested NFS boot of a dt 3.14-rc5 kernel.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
include/configs/mx25pdk.h | 103 +++---
1 file changed, 98 insertions(+), 5 deletions(-)
diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index af6aafa..aff2419 100644
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -62,6 +62,7 @@
/* No NOR flash present */
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
#define CONFIG_ENV_SIZE(8 * 1024)
+#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_IS_IN_MMC
@@ -69,7 +70,7 @@
/* U-Boot general configuration */
#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */
/* Print buffer sz */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
@@ -132,12 +133,104 @@
#define CONFIG_LOADADDR0x8100 /* loadaddr env var */
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#define CONFIG_DEFAULT_FDT_FILEimx25-pdk.dtb
+
#define CONFIG_EXTRA_ENV_SETTINGS \
script=boot.scr\0 \
- uimage=uImage\0 \
- netargs=setenv bootargs console=ttymxc0,${baudrate} \
+ image=zImage\0 \
+ console=ttymxc0\0 \
+ splashpos=m,m\0 \
+ fdt_high=0x\0 \
+ initrd_high=0x\0 \
+ fdt_file= CONFIG_DEFAULT_FDT_FILE \0 \
+ fdt_addr=0x8200\0 \
+ boot_fdt=try\0 \
+ ip_dyn=yes\0 \
+ mmcdev= __stringify(CONFIG_SYS_MMC_ENV_DEV) \0 \
+ mmcpart=1\0 \
+ mmcroot=/dev/mmcblk0p2 rootwait rw\0 \
+ update_sd_firmware_filename=u-boot.imx\0 \
+ update_sd_firmware= \
+ if test ${ip_dyn} = yes; then \
+ setenv get_cmd dhcp; \
+ else \
+ setenv get_cmd tftp; \
+ fi; \
+ if mmc dev ${mmcdev}; then\
+ if ${get_cmd} ${update_sd_firmware_filename}; then \
+ setexpr fw_sz ${filesize} / 0x200; \
+ setexpr fw_sz ${fw_sz} + 1; \
+ mmc write ${loadaddr} 0x2 ${fw_sz}; \
+ fi; \
+ fi\0 \
+ mmcargs=setenv bootargs console=${console},${baudrate} \
+ root=${mmcroot}\0 \
+ loadbootscript= \
+ fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0 \
+ bootscript=echo Running bootscript from mmc ...; \
+ source\0 \
+ loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0 \
+ loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0 \
+ mmcboot=echo Booting from mmc ...; \
+ run mmcargs; \
+ if test ${boot_fdt} = yes || test ${boot_fdt} = try; then \
+ if run loadfdt; then \
+ bootz ${loadaddr} - ${fdt_addr}; \
+ else \
+ if test ${boot_fdt} = try; then \
+ bootz; \
+ else \
+ echo WARN: Cannot load the DT; \
+ fi; \
+ fi; \
+ else \
+ bootz; \
+ fi;\0 \
+ netargs=setenv bootargs console=${console},${baudrate} \
root=/dev/nfs \
- ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0 \
- bootcmd=run netargs; dhcp ${uimage}; bootm\0 \
+ ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0 \
+ netboot=echo Booting from net ...; \
+ run netargs; \
+ if test ${ip_dyn} = yes; then \
+ setenv get_cmd dhcp; \
+ else \
+ setenv get_cmd tftp; \
+ fi; \
+ ${get_cmd} ${image}; \
+ if test ${boot_fdt} = yes || test ${boot_fdt} = try; then \
+ if ${get_cmd} ${fdt_addr} ${fdt_file}; then \
+ bootz ${loadaddr} - ${fdt_addr}; \
+ else \
+ if test ${boot_fdt} = try; then \
+ bootz; \
+ else \
+ echo WARN: Cannot load the DT; \
+ fi; \
+ fi; \
+ else \
+ bootz; \
+ fi;\0
+
+#define CONFIG_BOOTCOMMAND \
+ mmc dev ${mmcdev}; if
Re: [U-Boot] [PATCH] mx25pdk: Align the environment with other FSL boards
On Wed, Mar 5, 2014 at 3:51 PM, Fabio Estevam feste...@gmail.com wrote: From: Fabio Estevam fabio.este...@freescale.com Allow the boot of a device tree mainline kernel by aligning the environment variables with other FSL boards. Tested NFS boot of a dt 3.14-rc5 kernel. Signed-off-by: Fabio Estevam fabio.este...@freescale.com Awesome! Acked-by: Otavio Salvador ota...@ossystems.com.br -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6] socfpga: Adding Scan Manager driver
Hi Pavel, 2014-03-05 17:13 GMT+01:00 Pavel Machek pa...@denx.de: Hi! Also I expect that you can change all pins for uarts/ethernets/spi/i2c/etc that's why there is no golden configuration for socfpga that's why it is better to keep it empty just to compile it. Well, there are some development boards around... and having u-boot able to boot on the devel board by default would be very very useful. I believe you but the point is somewhere else if you can reach it by universal target. At same time, these files are located inside board folders. If user have different boards, they will have new set of folders here their own handoff files. From there, there won't the need to regenerate everytime. Please explain me one thing how many users will use this configuration? Especially these ~600 lines? Pretty much everyone when they test-boot their system...? Really? It means that all development boards/custom boards with socfpga use the same configuration which seems to me weird. If yes, then why these files are autogenerated if the same config can be use for all boards? Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP - KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4] aes: Fix kerneldoc for aes.h
Fix the function annotations in aes.h so they're compatible with kerneldoc.
Signed-off-by: Marek Vasut ma...@denx.de
---
include/aes.h | 22 --
1 file changed, 12 insertions(+), 10 deletions(-)
diff --git a/include/aes.h b/include/aes.h
index ea06308..c70eda6 100644
--- a/include/aes.h
+++ b/include/aes.h
@@ -25,29 +25,31 @@ enum {
};
/**
+ * aes_expand_key() - Expand the AES key
+ *
* Expand a key into a key schedule, which is then used for the other
* operations.
*
- * \param key Key, of length AES_KEY_LENGTH bytes
- * \param expkey Buffer to place expanded key, AES_EXPAND_KEY_LENGTH
+ * @keyKey, of length AES_KEY_LENGTH bytes
+ * @expkey Buffer to place expanded key, AES_EXPAND_KEY_LENGTH
*/
void aes_expand_key(u8 *key, u8 *expkey);
/**
- * Encrypt a single block of data
+ * aes_encrypt() - Encrypt single block of data with AES 128
*
- * in Input data
- * expkey Expanded key to use for encryption (from aes_expand_key())
- * out Output data
+ * @in Input data
+ * @expkey Expanded key to use for encryption (from aes_expand_key())
+ * @outOutput data
*/
void aes_encrypt(u8 *in, u8 *expkey, u8 *out);
/**
- * Decrypt a single block of data
+ * aes_decrypt() - Decrypt single block of data with AES 128
*
- * in Input data
- * expkey Expanded key to use for decryption (from aes_expand_key())
- * out Output data
+ * @in Input data
+ * @expkey Expanded key to use for decryption (from aes_expand_key())
+ * @outOutput data
*/
void aes_decrypt(u8 *in, u8 *expkey, u8 *out);
--
1.8.5.2
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[U-Boot] [PATCH 4/4] aes: Add 'aes' command to access AES-128-CBC
Add simple 'aes' command, which allows using the AES-128-CBC encryption
and decryption functions from U-Boot command line.
Signed-off-by: Marek Vasut ma...@denx.de
---
README | 1 +
common/Makefile | 1 +
common/cmd_aes.c | 89
3 files changed, 91 insertions(+)
create mode 100644 common/cmd_aes.c
diff --git a/README b/README
index 216f0c7..fd717bf 100644
--- a/README
+++ b/README
@@ -910,6 +910,7 @@ The following options need to be configured:
The default command configuration includes all commands
except those marked below with a *.
+ CONFIG_CMD_AESAES 128 CBC encrypt/decrypt
CONFIG_CMD_ASKENV * ask for env variable
CONFIG_CMD_BDIbdinfo
CONFIG_CMD_BEDBUG * Include BedBug Debugger
diff --git a/common/Makefile b/common/Makefile
index 04e9cdd..622f7bb 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_ENV_IS_IN_UBI) += env_ubi.o
obj-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
# command
+obj-$(CONFIG_CMD_AES) += cmd_aes.o
obj-$(CONFIG_CMD_AMBAPP) += cmd_ambapp.o
obj-$(CONFIG_SOURCE) += cmd_source.o
obj-$(CONFIG_CMD_SOURCE) += cmd_source.o
diff --git a/common/cmd_aes.c b/common/cmd_aes.c
new file mode 100644
index 000..76da3ef
--- /dev/null
+++ b/common/cmd_aes.c
@@ -0,0 +1,89 @@
+/*
+ * Copyright (C) 2014 Marek Vasut ma...@denx.de
+ *
+ * Command for en/de-crypting block of memory with AES-128-CBC cipher.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include command.h
+#include environment.h
+#include aes.h
+#include malloc.h
+#include asm/byteorder.h
+#include linux/compiler.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * do_aes() - Handle the aes command-line command
+ * @cmdtp: Command data struct pointer
+ * @flag: Command flag
+ * @argc: Command-line argument count
+ * @argv: Array of command-line arguments
+ *
+ * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
+ * on error.
+ */
+static int do_aes(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+ uint32_t key_addr, src_addr, dst_addr, len;
+ uint8_t *key_ptr, *src_ptr, *dst_ptr;
+ uint8_t key_exp[AES_EXPAND_KEY_LENGTH];
+ uint32_t aes_blocks;
+ int enc;
+
+ if (argc != 6)
+ return CMD_RET_USAGE;
+
+ if (!strncmp(argv[1], enc, 3))
+ enc = 1;
+ else if (!strncmp(argv[1], dec, 3))
+ enc = 0;
+ else
+ return CMD_RET_USAGE;
+
+ key_addr = simple_strtoul(argv[2], NULL, 16);
+ src_addr = simple_strtoul(argv[3], NULL, 16);
+ dst_addr = simple_strtoul(argv[4], NULL, 16);
+ len = simple_strtoul(argv[5], NULL, 16);
+
+ key_ptr = (uint8_t *)key_addr;
+ src_ptr = (uint8_t *)src_addr;
+ dst_ptr = (uint8_t *)dst_addr;
+
+ /* First we expand the key. */
+ aes_expand_key(key_ptr, key_exp);
+
+ /* Calculate the number of AES blocks to encrypt. */
+ aes_blocks = DIV_ROUND_UP(len, AES_KEY_LENGTH);
+
+ if (enc)
+ aes_cbc_encrypt_blocks(key_exp, src_ptr, dst_ptr, aes_blocks);
+ else
+ aes_cbc_decrypt_blocks(key_exp, src_ptr, dst_ptr, aes_blocks);
+
+ return 0;
+}
+
+/***/
+#ifdef CONFIG_SYS_LONGHELP
+static char aes_help_text[] =
+ enc key src dst len - Encrypt block of data $len bytes long\n
+ at address $src using a key at address\n
+ $key and store the result at address\n
+ $dst. The $len size must be multiple of\n
+ 16 bytes and $key must be 16 bytes long.\n
+ aes dec key src dst len - Decrypt block of data $len bytes long\n
+ at address $src using a key at address\n
+ $key and store the result at address\n
+ $dst. The $len size must be multiple of\n
+ 16 bytes and $key must be 16 bytes long.;
+#endif
+
+U_BOOT_CMD(
+ aes, 6, 1, do_aes,
+ AES 128 CBC encryption,
+ aes_help_text
+);
--
1.8.5.2
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[U-Boot] [PATCH V2 2/4] aes: Move the AES-128-CBC encryption function to common code
Move the AES-128-CBC encryption function implemented in tegra20-common/crypto.c
into lib/aes.c . This is well re-usable common code. Moreover, clean the code up
a bit and fix the kerneldoc-style annotations.
Signed-off-by: Marek Vasut ma...@denx.de
---
arch/arm/cpu/tegra20-common/crypto.c | 72 +---
include/aes.h| 10 +
lib/aes.c| 52 ++
3 files changed, 64 insertions(+), 70 deletions(-)
V2: Replace AES_AES_KEY_LENGTH with AES_KEY_LENGTH
Use print_buffer() instead of ad-hoc implementation
diff --git a/arch/arm/cpu/tegra20-common/crypto.c
b/arch/arm/cpu/tegra20-common/crypto.c
index 8209f76..b18e67c 100644
--- a/arch/arm/cpu/tegra20-common/crypto.c
+++ b/arch/arm/cpu/tegra20-common/crypto.c
@@ -19,74 +19,6 @@ enum security_op {
SECURITY_ENCRYPT= 1 1, /* Encrypt the data */
};
-static void debug_print_vector(char *name, u32 num_bytes, u8 *data)
-{
- u32 i;
-
- debug(%s [%d] @0x%08x, name, num_bytes, (u32)data);
- for (i = 0; i num_bytes; i++) {
- if (i % 16 == 0)
- debug( = );
- debug(%02x, data[i]);
- if ((i+1) % 16 != 0)
- debug( );
- }
- debug(\n);
-}
-
-/**
- * Apply chain data to the destination using EOR
- *
- * Each array is of length AES_AES_KEY_LENGTH.
- *
- * \param cbc_chain_data Chain data
- * \param src Source data
- * \param dst Destination data, which is modified here
- */
-static void apply_cbc_chain_data(u8 *cbc_chain_data, u8 *src, u8 *dst)
-{
- int i;
-
- for (i = 0; i 16; i++)
- *dst++ = *src++ ^ *cbc_chain_data++;
-}
-
-/**
- * Encrypt some data with AES.
- *
- * \param key_schedule Expanded key to use
- * \param src Source data to encrypt
- * \param dst Destination buffer
- * \param num_aes_blocks Number of AES blocks to encrypt
- */
-static void encrypt_object(u8 *key_schedule, u8 *src, u8 *dst,
- u32 num_aes_blocks)
-{
- u8 tmp_data[AES_KEY_LENGTH];
- u8 *cbc_chain_data;
- u32 i;
-
- cbc_chain_data = zero_key; /* Convenient array of 0's for IV */
-
- for (i = 0; i num_aes_blocks; i++) {
- debug(encrypt_object: block %d of %d\n, i, num_aes_blocks);
- debug_print_vector(AES Src, AES_KEY_LENGTH, src);
-
- /* Apply the chain data */
- apply_cbc_chain_data(cbc_chain_data, src, tmp_data);
- debug_print_vector(AES Xor, AES_KEY_LENGTH, tmp_data);
-
- /* encrypt the AES block */
- aes_encrypt(tmp_data, key_schedule, dst);
- debug_print_vector(AES Dst, AES_KEY_LENGTH, dst);
-
- /* Update pointers for next loop. */
- cbc_chain_data = dst;
- src += AES_KEY_LENGTH;
- dst += AES_KEY_LENGTH;
- }
-}
-
/**
* Shift a vector left by one bit
*
@@ -129,7 +61,7 @@ static void sign_object(u8 *key, u8 *key_schedule, u8 *src,
u8 *dst,
for (i = 0; i AES_KEY_LENGTH; i++)
tmp_data[i] = 0;
- encrypt_object(key_schedule, tmp_data, left, 1);
+ aes_cbc_encrypt_blocks(key_schedule, tmp_data, left, 1);
debug_print_vector(AES(key, nonce), AES_KEY_LENGTH, left);
left_shift_vector(left, k1, sizeof(left));
@@ -193,7 +125,7 @@ static int encrypt_and_sign(u8 *key, enum security_op oper,
u8 *src,
if (oper SECURITY_ENCRYPT) {
/* Perform this in place, resulting in src being encrypted. */
debug(encrypt_and_sign: begin encryption\n);
- encrypt_object(key_schedule, src, src, num_aes_blocks);
+ aes_cbc_encrypt_blocks(key_schedule, src, src, num_aes_blocks);
debug(encrypt_and_sign: end encryption\n);
}
diff --git a/include/aes.h b/include/aes.h
index c70eda6..d9bb387 100644
--- a/include/aes.h
+++ b/include/aes.h
@@ -53,4 +53,14 @@ void aes_encrypt(u8 *in, u8 *expkey, u8 *out);
*/
void aes_decrypt(u8 *in, u8 *expkey, u8 *out);
+/**
+ * aes_cbc_encrypt_blocks() - Encrypt multiple blocks of data with AES CBC.
+ *
+ * @key_expExpanded key to use
+ * @srcSource data to encrypt
+ * @dstDestination buffer
+ * @num_aes_blocks Number of AES blocks to encrypt
+ */
+void aes_cbc_encrypt_blocks(u8 *key_exp, u8 *src, u8 *dst, u32 num_aes_blocks);
+
#endif /* _AES_REF_H_ */
diff --git a/lib/aes.c b/lib/aes.c
index e996b27..a6648f9 100644
--- a/lib/aes.c
+++ b/lib/aes.c
@@ -580,3 +580,55 @@ void aes_decrypt(u8 *in, u8 *expkey, u8 *out)
memcpy(out, state, sizeof(state));
}
+
+static void debug_print_vector(char *name, u32 num_bytes, u8 *data)
+{
+#ifdef DEBUG
+ printf(%s [%d] @0x%08x, name, num_bytes,
[U-Boot] [PATCH V2 3/3] env: Implement support for AES encryption into fw_* tools
Implement support for encrypting/decrypting the environment block
into the tools/env/fw_* tools. The cipher used is AES 128 CBC and
the implementation depends solely on components internal to U-Boot.
To allow building against the internal AES library, the library did
need minor adjustments to not include U-Boot's headers which are not
wanted to be included and define missing types.
Signed-off-by: Marek Vasut ma...@denx.de
---
include/aes.h | 7 +++
lib/aes.c | 4 ++
tools/env/Makefile | 2 +-
tools/env/fw_env.c | 129 +++-
tools/env/fw_env_main.c | 17 +--
5 files changed, 151 insertions(+), 8 deletions(-)
V2: Checkpatch cleanup
diff --git a/include/aes.h b/include/aes.h
index 4897e6f..ee0e6c2 100644
--- a/include/aes.h
+++ b/include/aes.h
@@ -8,6 +8,13 @@
#ifndef _AES_REF_H_
#define _AES_REF_H_
+#ifdef USE_HOSTCC
+/* Define compat stuff for use in fw_* tools. */
+typedef unsigned char u8;
+typedef unsigned int u32;
+#define debug(...) do {} while (0)
+#endif
+
/*
* AES encryption library, with small code size, supporting only 128-bit AES
*
diff --git a/lib/aes.c b/lib/aes.c
index 9dadb22..05c97cd 100644
--- a/lib/aes.c
+++ b/lib/aes.c
@@ -22,7 +22,11 @@
* REDISTRIBUTION OF THIS SOFTWARE.
*/
+#ifndef USE_HOSTCC
#include common.h
+#else
+#include string.h
+#endif
#include aes.h
/* forward s-box */
diff --git a/tools/env/Makefile b/tools/env/Makefile
index 6ad81fd..fa4c258 100644
--- a/tools/env/Makefile
+++ b/tools/env/Makefile
@@ -25,7 +25,7 @@ hostprogs-y := fw_printenv_unstripped
fw_printenv_unstripped-objs := fw_env.o fw_env_main.o \
crc32.o ctype.o linux_string.o \
- env_attr.o env_flags.o
+ env_attr.o env_flags.o aes.o
quiet_cmd_strip = STRIP $@
cmd_strip = $(STRIP) -o $@ $
diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index 577ce2d..acf0fa5 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -31,6 +31,10 @@
#include fw_env.h
+#include aes.h
+
+#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
+
#define WHITESPACE(c) ((c == '\t') || (c == ' '))
#define min(x, y) ({ \
@@ -98,6 +102,11 @@ static struct environment environment = {
.flag_scheme = FLAG_NONE,
};
+/* Is AES encryption used? */
+static int aes_flag;
+static uint8_t aes_key[AES_KEY_LENGTH] = { 0 };
+static int env_aes_cbc_crypt(char *data, const int enc);
+
static int HaveRedundEnv = 0;
static unsigned char active_flag = 1;
@@ -120,6 +129,10 @@ static inline ulong getenvsize (void)
if (HaveRedundEnv)
rc -= sizeof (char);
+
+ if (aes_flag)
+ rc = ~(AES_KEY_LENGTH - 1);
+
return rc;
}
@@ -191,6 +204,36 @@ char *fw_getdefenv(char *name)
return NULL;
}
+static int parse_aes_key(char *key)
+{
+ char tmp[5] = { '0', 'x', 0, 0, 0 };
+ unsigned long ul;
+ int i;
+
+ if (strnlen(key, 64) != 32) {
+ fprintf(stderr,
+ ## Error: '-a' option requires 16-byte AES key\n);
+ return -1;
+ }
+
+ for (i = 0; i 16; i++) {
+ tmp[2] = key[0];
+ tmp[3] = key[1];
+ errno = 0;
+ ul = strtoul(tmp, NULL, 16);
+ if (errno) {
+ fprintf(stderr,
+ ## Error: '-a' option requires valid AES
key\n);
+ return -1;
+ }
+ aes_key[i] = ul 0xff;
+ key += 2;
+ }
+ aes_flag = 1;
+
+ return 0;
+}
+
/*
* Print the current definition of one, or more, or all
* environment variables
@@ -201,6 +244,19 @@ int fw_printenv (int argc, char *argv[])
int i, n_flag;
int rc = 0;
+ if (argc = 2 strcmp(argv[1], -a) == 0) {
+ if (argc 3) {
+ fprintf(stderr,
+ ## Error: '-a' option requires AES key\n);
+ return -1;
+ }
+ rc = parse_aes_key(argv[2]);
+ if (rc)
+ return rc;
+ argv += 2;
+ argc -= 2;
+ }
+
if (fw_env_open())
return -1;
@@ -266,6 +322,16 @@ int fw_printenv (int argc, char *argv[])
int fw_env_close(void)
{
+ int ret;
+ if (aes_flag) {
+ ret = env_aes_cbc_crypt(environment.data, 1);
+ if (ret) {
+ fprintf(stderr,
+ Error: can't encrypt env for flash\n);
+ return ret;
+ }
+ }
+
/*
* Update CRC
*/
@@ -413,7 +479,7 @@ int fw_env_write(char *name, char *value)
*/
int fw_setenv(int argc, char *argv[])
{
- int i;
+ int i, rc;
size_t len;
char *name;
char *value = NULL;
@@ -423,6 +489,24 @@
[U-Boot] [PATCH V2 1/3] env: Add env_export() wrapper
Implement env_export() wrapper, so that all implementers of saveenv() don't
have to call hexport_r(), crc32() etc. sequence . This trims down a bit of
code duplication.
Signed-off-by: Marek Vasut ma...@denx.de
---
common/env_common.c| 17 +
common/env_dataflash.c | 17 ++---
common/env_eeprom.c| 12 +++-
common/env_fat.c | 12 +++-
common/env_flash.c | 21 ++---
common/env_mmc.c | 12 ++--
common/env_nand.c | 13 -
common/env_nvram.c | 12 +++-
common/env_onenand.c | 13 -
common/env_sf.c| 24 +++-
common/env_ubi.c | 27 ---
include/environment.h | 3 +++
12 files changed, 66 insertions(+), 117 deletions(-)
V2: Fix minor bug in env_nand.c where I was passing env_new instead of env_new
diff --git a/common/env_common.c b/common/env_common.c
index c0bfc2f..fe35ff4 100644
--- a/common/env_common.c
+++ b/common/env_common.c
@@ -172,6 +172,23 @@ int env_import(const char *buf, int check)
return 0;
}
+/* Emport the environment and generate CRC for it. */
+int env_export(env_t *env_out)
+{
+ char *res;
+ ssize_t len;
+
+ res = (char *)env_out-data;
+ len = hexport_r(env_htab, '\0', 0, res, ENV_SIZE, 0, NULL);
+ if (len 0) {
+ error(Cannot export environment: errno = %d\n, errno);
+ return 1;
+ }
+ env_out-crc = crc32(0, env_out-data, ENV_SIZE);
+
+ return 0;
+}
+
void env_relocate(void)
{
#if defined(CONFIG_NEEDS_MANUAL_RELOC)
diff --git a/common/env_dataflash.c b/common/env_dataflash.c
index b53b87e..034e323 100644
--- a/common/env_dataflash.c
+++ b/common/env_dataflash.c
@@ -56,17 +56,12 @@ void env_relocate_spec(void)
int saveenv(void)
{
- env_t env_new;
- ssize_t len;
- char*res;
-
- res = (char *)env_new.data;
- len = hexport_r(env_htab, '\0', 0, res, ENV_SIZE, 0, NULL);
- if (len 0) {
- error(Cannot export environment: errno = %d\n, errno);
- return 1;
- }
- env_new.crc = crc32(0, env_new.data, ENV_SIZE);
+ env_t env_new;
+ int ret;
+
+ ret = env_export(env_new);
+ if (ret)
+ return ret;
return write_dataflash(CONFIG_ENV_ADDR,
(unsigned long)env_new,
diff --git a/common/env_eeprom.c b/common/env_eeprom.c
index 0db2bb6..490ac73 100644
--- a/common/env_eeprom.c
+++ b/common/env_eeprom.c
@@ -98,8 +98,6 @@ void env_relocate_spec(void)
int saveenv(void)
{
env_t env_new;
- ssize_t len;
- char*res;
int rc;
unsigned int off= CONFIG_ENV_OFFSET;
#ifdef CONFIG_ENV_OFFSET_REDUND
@@ -109,13 +107,9 @@ int saveenv(void)
BUG_ON(env_ptr != NULL);
- res = (char *)env_new.data;
- len = hexport_r(env_htab, '\0', 0, res, ENV_SIZE, 0, NULL);
- if (len 0) {
- error(Cannot export environment: errno = %d\n, errno);
- return 1;
- }
- env_new.crc = crc32(0, env_new.data, ENV_SIZE);
+ rc = env_export(env_new);
+ if (rc)
+ return rc;
#ifdef CONFIG_ENV_OFFSET_REDUND
if (gd-env_valid == 1) {
diff --git a/common/env_fat.c b/common/env_fat.c
index 708fd13..aad0487 100644
--- a/common/env_fat.c
+++ b/common/env_fat.c
@@ -37,19 +37,14 @@ int env_init(void)
int saveenv(void)
{
env_t env_new;
- ssize_t len;
- char*res;
block_dev_desc_t *dev_desc = NULL;
int dev = FAT_ENV_DEVICE;
int part = FAT_ENV_PART;
int err;
- res = (char *)env_new.data;
- len = hexport_r(env_htab, '\0', 0, res, ENV_SIZE, 0, NULL);
- if (len 0) {
- error(Cannot export environment: errno = %d\n, errno);
- return 1;
- }
+ err = env_export(env_new);
+ if (err)
+ return err;
#ifdef CONFIG_MMC
if (strcmp(FAT_ENV_INTERFACE, mmc) == 0) {
@@ -79,7 +74,6 @@ int saveenv(void)
return 1;
}
- env_new.crc = crc32(0, env_new.data, ENV_SIZE);
err = file_fat_write(FAT_ENV_FILE, (void *)env_new, sizeof(env_t));
if (err == -1) {
printf(\n** Unable to write \%s\ from %s%d:%d **\n,
diff --git a/common/env_flash.c b/common/env_flash.c
index 7d5a4cf..b3ad908 100644
--- a/common/env_flash.c
+++ b/common/env_flash.c
@@ -106,8 +106,7 @@ int env_init(void)
int saveenv(void)
{
env_t env_new;
- ssize_t len;
- char*res, *saved_data = NULL;
+ char*saved_data = NULL;
charflag = OBSOLETE_FLAG, new_flag = ACTIVE_FLAG;
int rc = 1;
#if CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
@@ -125,13 +124,9 @@ int saveenv(void)
if (flash_sect_protect(0, (ulong)flash_addr_new, end_addr_new))
goto done;
- res =
[U-Boot] [PATCH 2/3] env: Implement support for encrypting environment
Add function which allows encrypting the whole environment block with
AES-128-CBC. The key for the environment is retrieved by env_aes_cbc_get_key()
function, which must be implemented on a per-board basis.
Signed-off-by: Marek Vasut ma...@denx.de
---
common/env_common.c | 62 +++
include/environment.h | 12 +-
2 files changed, 73 insertions(+), 1 deletion(-)
NOTE: We have one style issue here, but we must keep using
__attribute__((aligned(16))) here as we're including
this include/environment.h from tools as well.
diff --git a/common/env_common.c b/common/env_common.c
index fe35ff4..cd7b4cd 100644
--- a/common/env_common.c
+++ b/common/env_common.c
@@ -140,6 +140,52 @@ int set_default_vars(int nvars, char * const vars[])
H_NOCLEAR | H_INTERACTIVE, nvars, vars);
}
+#ifdef CONFIG_ENV_AES
+#include aes.h
+/**
+ * env_aes_cbc_get_key() - Get AES-128-CBC key for the environment
+ *
+ * This function shall return 16-byte array containing AES-128 key used
+ * to encrypt and decrypt the environment. This function must be overriden
+ * by the implementer as otherwise the environment encryption will not
+ * work.
+ */
+__weak uint8_t *env_aes_cbc_get_key(void)
+{
+ return NULL;
+}
+
+static int env_aes_cbc_crypt(env_t *env, const int enc)
+{
+ unsigned char *data = env-data;
+ uint8_t *key;
+ uint8_t key_exp[AES_EXPAND_KEY_LENGTH];
+ uint32_t aes_blocks;
+
+ key = env_aes_cbc_get_key();
+ if (!key)
+ return -EINVAL;
+
+ /* First we expand the key. */
+ aes_expand_key(key, key_exp);
+
+ /* Calculate the number of AES blocks to encrypt. */
+ aes_blocks = ENV_SIZE / AES_KEY_LENGTH;
+
+ if (enc)
+ aes_cbc_encrypt_blocks(key_exp, data, data, aes_blocks);
+ else
+ aes_cbc_decrypt_blocks(key_exp, data, data, aes_blocks);
+
+ return 0;
+}
+#else
+static inline int env_aes_cbc_crypt(env_t *env, const int enc)
+{
+ return 0;
+}
+#endif
+
/*
* Check if CRC is valid and (if yes) import the environment.
* Note that buf may or may not be aligned.
@@ -147,6 +193,7 @@ int set_default_vars(int nvars, char * const vars[])
int env_import(const char *buf, int check)
{
env_t *ep = (env_t *)buf;
+ int ret;
if (check) {
uint32_t crc;
@@ -159,6 +206,14 @@ int env_import(const char *buf, int check)
}
}
+ /* Decrypt the env if desired. */
+ ret = env_aes_cbc_crypt(ep, 0);
+ if (ret) {
+ error(Failed to decrypt env!\n);
+ set_default_env(!import failed);
+ return ret;
+ }
+
if (himport_r(env_htab, (char *)ep-data, ENV_SIZE, '\0', 0,
0, NULL)) {
gd-flags |= GD_FLG_ENV_READY;
@@ -177,6 +232,7 @@ int env_export(env_t *env_out)
{
char *res;
ssize_t len;
+ int ret;
res = (char *)env_out-data;
len = hexport_r(env_htab, '\0', 0, res, ENV_SIZE, 0, NULL);
@@ -184,6 +240,12 @@ int env_export(env_t *env_out)
error(Cannot export environment: errno = %d\n, errno);
return 1;
}
+
+ /* Encrypt the env if desired. */
+ ret = env_aes_cbc_crypt(env_out, 1);
+ if (ret)
+ return ret;
+
env_out-crc = crc32(0, env_out-data, ENV_SIZE);
return 0;
diff --git a/include/environment.h b/include/environment.h
index f797595..08679ae 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -146,7 +146,12 @@ extern unsigned long nand_env_oob_offset;
extern char *env_name_spec;
#endif
+#ifdef CONFIG_ENV_AES
+/* Make sure the payload is multiple of AES block size */
+#define ENV_SIZE ((CONFIG_ENV_SIZE - ENV_HEADER_SIZE) ~(16 - 1))
+#else
#define ENV_SIZE (CONFIG_ENV_SIZE - ENV_HEADER_SIZE)
+#endif
typedef struct environment_s {
uint32_tcrc;/* CRC32 over data bytes*/
@@ -154,7 +159,12 @@ typedef struct environment_s {
unsigned char flags; /* active/obsolete flags*/
#endif
unsigned char data[ENV_SIZE]; /* Environment data */
-} env_t;
+} env_t
+#ifdef CONFIG_ENV_AES
+/* Make sure the env is aligned to block size. */
+__attribute__((aligned(16)))
+#endif
+;
#ifdef ENV_IS_EMBEDDED
extern env_t environment;
--
1.8.5.2
___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6] socfpga: Adding Scan Manager driver
On Wed, 2014-03-05 at 19:47 +0100, Michal Simek wrote: Hi Pavel, 2014-03-05 17:13 GMT+01:00 Pavel Machek pa...@denx.de: Hi! Also I expect that you can change all pins for uarts/ethernets/spi/i2c/etc that's why there is no golden configuration for socfpga that's why it is better to keep it empty just to compile it. Well, there are some development boards around... and having u-boot able to boot on the devel board by default would be very very useful. I believe you but the point is somewhere else if you can reach it by universal target. At same time, these files are located inside board folders. If user have different boards, they will have new set of folders here their own handoff files. From there, there won't the need to regenerate everytime. Please explain me one thing how many users will use this configuration? Especially these ~600 lines? Pretty much everyone when they test-boot their system...? Really? It means that all development boards/custom boards with socfpga I believe you confuse with arch and board. These files are located inside board. For board/altera/socfpga, its referring to Altera dev kit. When another vendor, example like Xilinx, fabricated a board with SOCFPGA chip, then it will have another folder called board/xilinx/socfpga. use the same configuration which seems to me weird. If yes, then why these files are autogenerated if the same config can be use for all boards? Probably an example will clear your doubt. When the board is fabricated, the pin mux used will be fixed. You won't need to change it until you fabricated a new board. Hope this info helps. Thanks Chin Liang Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] arm: mxs: Adjust the load address of U-Boot and SPL for HAB
When using HAB, there are additional special requirements on the placement of
U-Boot and the U-Boot SPL in memory. To fullfill these, this patch moves the
U-Boot binary a little further from the begining of the DRAM, so the HAB CST
and IVT can be placed in front of the U-Boot binary. This is necessary, since
both the U-Boot and the IVT must be contained in single CST signature. To
make things worse, the IVT must be concatenated with one more entry at it's
end, that is the length of the entire CST signature, IVT and U-Boot binary
in memory. By placing the blocks in this order -- CST, IVT, U-Boot, we can
easily align them all and then produce the length field as needed.
As for the SPL, on i.MX23/i.MX28, the SPL size is limited to 32 KiB, thus
we place the IVT at 0x8000 offset, CST right past IVT and claim the size
is correct. The HAB library accepts this setup.
Finally, to make sure the vectoring in SPL still works even after moving
the SPL from 0x0 to 0x1000, we add a small function which copies the
vectoring code and tables to 0x0. This is fine, since the vectoring code
is position independent.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Stefano Babic sba...@denx.de
---
arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg | 8
arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg | 8
arch/arm/cpu/arm926ejs/mxs/spl_boot.c| 15 +++
arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds| 2 +-
include/configs/mxs.h| 10 +-
5 files changed, 33 insertions(+), 10 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
b/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
index c9cf4b3..70abfbc 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
+++ b/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
@@ -1,6 +1,6 @@
SECTION 0x0 BOOTABLE
TAG LAST
- LOAD 0x0OBJTREE/spl/u-boot-spl.bin
- CALL 0x14 0x0
- LOAD 0x4100 OBJTREE/u-boot.bin
- CALL 0x4100 0x0
+ LOAD 0x1000 OBJTREE/spl/u-boot-spl.bin
+ CALL 0x1000 0x0
+ LOAD 0x40002000 OBJTREE/u-boot.bin
+ CALL 0x40002000 0x0
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
b/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
index 676f5c8..e98c97b 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
+++ b/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
@@ -1,8 +1,8 @@
SECTION 0x0 BOOTABLE
TAG LAST
- LOAD 0x0OBJTREE/spl/u-boot-spl.bin
- LOAD IVT 0x8000 0x14
+ LOAD 0x1000 OBJTREE/spl/u-boot-spl.bin
+ LOAD IVT 0x8000 0x1000
CALL HAB 0x8000 0x0
- LOAD 0x4100 OBJTREE/u-boot.bin
- LOAD IVT 0x8000 0x4100
+ LOAD 0x40002000 OBJTREE/u-boot.bin
+ LOAD IVT 0x8000 0x40002000
CALL HAB 0x8000 0x0
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index 68c30af..38109c5 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -102,6 +102,18 @@ static uint8_t mxs_get_bootmode_index(void)
return i;
}
+static void mxs_spl_fixup_vectors(void)
+{
+ /*
+* Copy our vector table to 0x0, since due to HAB, we cannot
+* be loaded to 0x0. We want to have working vectoring though,
+* thus this fixup. Our vectoring table is PIC, so copying is
+* fine.
+*/
+ extern uint32_t _start;
+ memcpy(0x0, _start, 0x60);
+}
+
void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,
const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size)
@@ -110,7 +122,10 @@ void mxs_common_spl_init(const uint32_t arg, const
uint32_t *resptr,
((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) ~0xf);
uint8_t bootmode = mxs_get_bootmode_index();
+ mxs_spl_fixup_vectors();
+
mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size);
+
mxs_power_init();
mxs_mem_init();
diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
index d0b482d..f4bf8ac 100644
--- a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
+++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
@@ -16,7 +16,7 @@ OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
- . = 0x;
+ . = CONFIG_SPL_TEXT_BASE;
. = ALIGN(4);
.text :
diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index 55ecef9..a9f4d89 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -80,8 +80,16 @@
* We need to sacrifice first 4 bytes of RAM here to avoid triggering some
* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
* binary. In case there was more of this mess, 0x100 bytes are skipped.
+ *
+ * In case of a HAB boot, we cannot for some weird reason use the first 4KiB
+ * of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST
+ * blocks, thus U-Boot starts at offset +8 KiB of DRAM start.
+ *
+ * As for
[U-Boot] [PATCH 2/2] arm: mxs: Add support for generating signed BootStream
This patch adds the groundwork for generating signed BootStream, which can be used by the HAB library in i.MX28. We are adding a new target, u-boot-signed.sb , since the process for generating regular non-signed BootStream is much easier. Moreover, the signed bootstream depends on external _proprietary_ _binary-only_ tool from Freescale called 'cst', which is available only under NDA. To make things even uglier, the CST or HAB mandates a kind-of circular dependency. The problem is, unlike the regular IVT, which is generated by mxsimage, the IVT for signed boot must be generated by hand here due to special demands of the CST. The U-Boot binary (or SPL binary) and IVT are then signed by the CST as a one block. But here is the problem. The size of the entire image (U-Boot, IVT, CST blocks) must be appended at the end of IVT. But the size of the entire image is not known until the CST has finished signing the U-Boot and IVT. We solve this by expecting the CST block to be always 3904B (which it is in case two files, U-Boot and the hand-made IVT, are signed in the CST block). Signed-off-by: Marek Vasut ma...@denx.de Cc: Stefano Babic sba...@denx.de --- Makefile | 2 + arch/arm/cpu/arm926ejs/mxs/Makefile| 77 ++ arch/arm/cpu/arm926ejs/mxs/mxsimage-signed.cfg | 10 3 files changed, 89 insertions(+) create mode 100644 arch/arm/cpu/arm926ejs/mxs/mxsimage-signed.cfg diff --git a/Makefile b/Makefile index ecac292..01d4011 100644 --- a/Makefile +++ b/Makefile @@ -856,6 +856,8 @@ OBJCOPYFLAGS_u-boot.ais = -I binary -O binary --pad-to=$(CONFIG_SPL_MAX_SIZE) u-boot.ais: spl/u-boot-spl.ais u-boot.img FORCE $(call if_changed,pad_cat) +u-boot-signed.sb: u-boot.bin spl/u-boot-spl.bin + $(Q)$(MAKE) $(build)=arch/arm/cpu/arm926ejs/mxs $(objtree)/u-boot-signed.sb u-boot.sb: u-boot.bin spl/u-boot-spl.bin $(Q)$(MAKE) $(build)=arch/arm/cpu/arm926ejs/mxs $(objtree)/u-boot.sb diff --git a/arch/arm/cpu/arm926ejs/mxs/Makefile b/arch/arm/cpu/arm926ejs/mxs/Makefile index 152546e..540e589 100644 --- a/arch/arm/cpu/arm926ejs/mxs/Makefile +++ b/arch/arm/cpu/arm926ejs/mxs/Makefile @@ -17,8 +17,85 @@ endif MKIMAGE_TARGET-$(CONFIG_MX23) = mx23 MKIMAGE_TARGET-$(CONFIG_MX28) = mx28 +# Convert hexadecimal value to bytes +define hex2bin +$(shell echo -n $1 | sed 's/0x//;s/\(..\)\(..\)\(..\)\(..\)/\4\3\2\1/;s/../x/g') +endef + +# Compute the post-IVT size field value for the U-Boot binary. +# The value is the result of adding the following: +# - The size of U-Boot binary aligned to 64B (u-boot.bin) +# - The size of IVT block aligned to 64B (u-boot.ivt) +# - The size of U-Boot signature (u-boot.sig), 3904 B +# - The 64B hole in front of U-Boot binary for 'struct mxs_spl_data' passing +define uboot_ivt_size +$(shell expr `stat -c %s $1` + 64 + 3904 + 128 | xargs printf 0x%08x) +endef + $(OBJTREE)/mxsimage.cfg: $(SRCTREE)/$(CPUDIR)/$(SOC)/mxsimage.$(MKIMAGE_TARGET-y).cfg sed s@OBJTREE@$(OBJTREE)@g $^ $@ +# HAB signature is i.MX28 only +$(OBJTREE)/mxsimage-signed.cfg: $(SRCTREE)/$(CPUDIR)/$(SOC)/mxsimage-signed.cfg + sed s@OBJTREE@$(OBJTREE)@g $^ $@ + +$(OBJTREE)/spl/u-boot-spl.ivt: $(OBJTREE)/spl/u-boot-spl.bin + # Align U-Boot SPL binary to 64B + dd if=$^ of=$@ ibs=64 conv=sync 2/dev/null + mv $@ $^ + # Assemble IVT, append size field and align it to 64B. + (echo -ne $(call hex2bin,0x402000d1) ;\ +echo -ne $(call hex2bin,$(CONFIG_SPL_TEXT_BASE)) ; \ +echo -ne $(call hex2bin,0x) ;\ +echo -ne $(call hex2bin,0x) ;\ +echo -ne $(call hex2bin,0x) ;\ +echo -ne $(call hex2bin,0x8000) ;\ +echo -ne $(call hex2bin,0x8040) ;\ +echo -ne $(call hex2bin,0x) ;\ +echo -ne $(call hex2bin,$(call uboot_ivt_size,$^)) \ + ) | dd of=$@ ibs=64 count=1 conv=sync 2/dev/null + +$(OBJTREE)/u-boot.ivt: $(OBJTREE)/u-boot.bin + # Align U-Boot binary to 64B + dd if=$^ of=$@ ibs=64 conv=sync 2/dev/null + mv $@ $^ + # Assemble IVT, append size field and align it to 64B. + (echo -ne $(call hex2bin,0x402000d1) ;\ +echo -ne $(call hex2bin,$(CONFIG_SYS_TEXT_BASE)) ; \ +echo -ne $(call hex2bin,0x) ;\ +echo -ne $(call hex2bin,0x) ;\ +echo -ne $(call hex2bin,0x) ;\ +echo -ne $(call hex2bin,0x40001000) ;\ +echo -ne $(call hex2bin,0x40001040) ;\ +echo -ne $(call hex2bin,0x) ;\ +echo -ne $(call hex2bin,$(call uboot_ivt_size,$^)) \ + ) | dd of=$@ ibs=64 count=1 conv=sync 2/dev/null + +$(OBJTREE)/spl/u-boot-spl.csf: $(OBJTREE)/spl/u-boot-spl.ivt
Re: [U-Boot] [PATCH 2/4] aes: Move the AES-128-CBC encryption function to common code
On Sunday, February 16, 2014 at 12:30:54 AM, Simon Glass wrote: Hi Marek, On 5 February 2014 20:44, Marek Vasut ma...@denx.de wrote: Move the AES-128-CBC encryption function implemented in tegra20-common/crypto.c into lib/aes.c . This is well re-usable common code. Moreover, clean the code up a bit and fix the kerneldoc-style annotations. Signed-off-by: Marek Vasut ma...@denx.de Fixed all and V2 is out, thanks! Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] fit: rsa: Add support for SHA256 hash
On Sunday, February 16, 2014 at 12:31:53 AM, Simon Glass wrote: Hi Marek, On 5 February 2014 20:47, Marek Vasut ma...@denx.de wrote: Add support for sha256,rsa2048 signature. This patch utilises the previously laid groundwork for adding other hashes. Signed-off-by: Marek Vasut ma...@denx.de Does this conflict with Heiko's patch or is it the same? Heiko's patchset is superior, so I drop this one please. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/4] aes: Implement AES-128-CBC decryption function
Implement a compatible AES-128-CBC decryption function as a counterpart
of the encryption function pulled from tegra20-common/crypto.c .
Signed-off-by: Marek Vasut ma...@denx.de
---
include/aes.h | 10 ++
lib/aes.c | 28
2 files changed, 38 insertions(+)
diff --git a/include/aes.h b/include/aes.h
index d9bb387..4897e6f 100644
--- a/include/aes.h
+++ b/include/aes.h
@@ -63,4 +63,14 @@ void aes_decrypt(u8 *in, u8 *expkey, u8 *out);
*/
void aes_cbc_encrypt_blocks(u8 *key_exp, u8 *src, u8 *dst, u32 num_aes_blocks);
+/**
+ * Decrypt multiple blocks of data with AES CBC.
+ *
+ * @key_expExpanded key to use
+ * @srcSource data to decrypt
+ * @dstDestination buffer
+ * @num_aes_blocks Number of AES blocks to decrypt
+ */
+void aes_cbc_decrypt_blocks(u8 *key_exp, u8 *src, u8 *dst, u32 num_aes_blocks);
+
#endif /* _AES_REF_H_ */
diff --git a/lib/aes.c b/lib/aes.c
index a6648f9..9dadb22 100644
--- a/lib/aes.c
+++ b/lib/aes.c
@@ -632,3 +632,31 @@ void aes_cbc_encrypt_blocks(u8 *key_exp, u8 *src, u8 *dst,
u32 num_aes_blocks)
dst += AES_KEY_LENGTH;
}
}
+
+void aes_cbc_decrypt_blocks(u8 *key_exp, u8 *src, u8 *dst, u32 num_aes_blocks)
+{
+ u8 tmp_data[AES_KEY_LENGTH], tmp_block[AES_KEY_LENGTH];
+ /* Convenient array of 0's for IV */
+ u8 cbc_chain_data[AES_KEY_LENGTH] = { 0 };
+ u32 i;
+
+ for (i = 0; i num_aes_blocks; i++) {
+ debug(encrypt_object: block %d of %d\n, i, num_aes_blocks);
+ debug_print_vector(AES Src, AES_KEY_LENGTH, src);
+
+ memcpy(tmp_block, src, AES_KEY_LENGTH);
+
+ /* Decrypt the AES block */
+ aes_decrypt(src, key_exp, tmp_data);
+ debug_print_vector(AES Xor, AES_KEY_LENGTH, tmp_data);
+
+ /* Apply the chain data */
+ apply_cbc_chain_data(cbc_chain_data, tmp_data, dst);
+ debug_print_vector(AES Dst, AES_KEY_LENGTH, dst);
+
+ /* Update pointers for next loop. */
+ memcpy(cbc_chain_data, tmp_block, AES_KEY_LENGTH);
+ src += AES_KEY_LENGTH;
+ dst += AES_KEY_LENGTH;
+ }
+}
--
1.8.5.2
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[U-Boot] Single u-boot for quad/duallite
Since we are slowly heading toward a single u-boot for quad/duallite, can we find a solution to this now. mx6sabre_common.h: fdt_file= CONFIG_DEFAULT_FDT_FILE \0 \ mx6sabresd.h:#define CONFIG_DEFAULT_FDT_FILEimx6q-sabresd.dtb mx6sabresd.h:#define CONFIG_DEFAULT_FDT_FILEimx6dl-sabresd.dtb Perhaps common code could create this environment variable by concatenating with the board name if not already existing in the environment. Opinions? Thanks Troy ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Single u-boot for quad/duallite
On Wed, Mar 5, 2014 at 4:30 PM, Troy Kisky troy.ki...@boundarydevices.com wrote: Since we are slowly heading toward a single u-boot for quad/duallite, can we find a solution to this now. mx6sabre_common.h: fdt_file= CONFIG_DEFAULT_FDT_FILE \0 \ mx6sabresd.h:#define CONFIG_DEFAULT_FDT_FILEimx6q-sabresd.dtb mx6sabresd.h:#define CONFIG_DEFAULT_FDT_FILEimx6dl-sabresd.dtb Perhaps common code could create this environment variable by concatenating with the board name if not already existing in the environment. Opinions? I fully agree. Are you going to look at this? -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] am33xx: Rework #ifdef's around s_init for clarity
The s_init function is only called on SPL or XIP cases, so lets only
build it for them. This makes the #if logic within the function a bit
clearer as to when we are or are not calling things, and makes it easier
to see that for example preloader_console_init isn't ever called in the
non-XIP full U-Boot case.
Signed-off-by: Tom Rini tr...@ti.com
---
arch/arm/cpu/armv7/am33xx/board.c |8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index 2b15a64..fb44cc8 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -202,6 +202,7 @@ static void watchdog_disable(void)
}
#endif
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
void s_init(void)
{
/*
@@ -220,22 +221,19 @@ void s_init(void)
#ifdef CONFIG_SPL_BUILD
save_omap_boot_params();
#endif
-#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
watchdog_disable();
timer_init();
set_uart_mux_conf();
setup_clocks_for_console();
uart_soft_reset();
-#endif
#ifdef CONFIG_NOR_BOOT
gd-baudrate = CONFIG_BAUDRATE;
serial_init();
gd-have_console = 1;
-#else
+#elif defined(CONFIG_SPL_BUILD)
gd = gdata;
preloader_console_init();
#endif
-#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
prcm_init();
set_mux_conf_regs();
#if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC)
@@ -243,8 +241,8 @@ void s_init(void)
rtc32k_enable();
#endif
sdram_init();
-#endif
}
+#endif
#ifndef CONFIG_SYS_DCACHE_OFF
void enable_caches(void)
--
1.7.9.5
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Re: [U-Boot] Pull request: nand flash
On Tue, Mar 04, 2014 at 08:09:19PM -0600, Scott Wood wrote:
The following changes since commit eeb72e67619b98d2502fe634a3a5d9953de92ad0:
Merge branch 'master' of git://git.denx.de/u-boot-arm (2014-02-26 16:49:58
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-nand-flash.git master
for you to fetch changes up to 2eda892f00fbcf46143326f72e8ac5b472bd225a:
mtd: nand: omap: move omap_elm.h from arch/arm/include/asm to
drivers/mtd/nand (2014-03-04 17:23:54 -0600)
pekon gupta (9):
mtd: nand: omap: optimize chip-ecc.hwctl() for H/W ECC schemes
mtd: nand: omap: optimize chip-ecc.calculate() for H/W ECC schemes
mtd: nand: omap: optimized chip-ecc.correct() for H/W ECC schemes
board/ti/am335x/README: update for NAND boot
mtd: nand: omap: remove redundant platform specific header:
arch-xx/omap_gpmc.h
mtd: nand: omap: remove unused #defines from common omap_gpmc.h
mtd: nand: omap: merge duplicate GPMC data from different arch-xx
headers into common omap_gpmc.h
mtd: nand: omap: move omap_gpmc.h from arch/arm/include/asm to
drivers/mtd/nand
mtd: nand: omap: move omap_elm.h from arch/arm/include/asm to
drivers/mtd/nand
arch/arm/include/asm/arch-am33xx/cpu.h | 51 --
arch/arm/include/asm/arch-am33xx/omap_gpmc.h | 48 --
arch/arm/include/asm/arch-am33xx/sys_proto.h | 1 +
arch/arm/include/asm/arch-omap3/cpu.h | 54 +-
arch/arm/include/asm/arch-omap3/mem.h | 10 +
arch/arm/include/asm/arch-omap3/omap_gpmc.h| 36 --
arch/arm/include/asm/arch-omap3/sys_proto.h| 1 +
arch/arm/include/asm/arch-omap4/cpu.h | 45 --
arch/arm/include/asm/arch-omap4/sys_proto.h| 1 +
arch/arm/include/asm/arch-omap5/cpu.h | 45 --
arch/arm/include/asm/arch-omap5/sys_proto.h| 1 +
arch/arm/include/asm/omap_gpmc.h | 87
board/isee/igep00x0/igep00x0.c | 1 -
board/overo/overo.c| 1 -
board/ti/am335x/README | 53 +-
drivers/mtd/nand/omap_elm.c| 6 +-
drivers/mtd/nand/omap_gpmc.c | 572
+++--
include/configs/am335x_evm.h | 1 -
include/configs/am335x_igep0033.h | 1 -
include/configs/am3517_crane.h | 1 -
include/configs/am3517_evm.h | 1 -
include/configs/cm_t35.h | 2 -
include/configs/devkit8000.h | 2 -
include/configs/dig297.h | 2 -
include/configs/mcx.h | 1 -
include/configs/omap3_beagle.h | 2 -
include/configs/omap3_evm_common.h | 1 -
include/configs/omap3_igep00x0.h | 1 -
include/configs/omap3_logic.h | 1 -
include/configs/omap3_overo.h | 2 -
include/configs/omap3_pandora.h| 2 -
include/configs/omap3_zoom1.h | 2 -
include/configs/siemens-am33x-common.h | 1 -
include/configs/tam3517-common.h | 1 -
include/configs/tricorder.h| 2 -
.../include/asm = include/linux/mtd}/omap_elm.h | 0
include/linux/mtd/omap_gpmc.h | 84 +++
37 files changed, 321 insertions(+), 802 deletions(-)
delete mode 100644 arch/arm/include/asm/arch-am33xx/omap_gpmc.h
delete mode 100644 arch/arm/include/asm/arch-omap3/omap_gpmc.h
delete mode 100644 arch/arm/include/asm/omap_gpmc.h
rename {arch/arm/include/asm = include/linux/mtd}/omap_elm.h (100%)
create mode 100644 include/linux/mtd/omap_gpmc.h
Applied to u-boot/master, thanks!
--
Tom
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Re: [U-Boot] [PATCH V2 2/3] lib: rand: add call to hw_rand() - hardware random number generator
On Wed, Mar 05, 2014 at 05:57:46PM +0100, Przemyslaw Marczak wrote:
Changes:
- lib/rand.c: add call to hw_rand() (depends on CONFIG_RAND_HW_ACCEL)
- include/common.h: add hw_rand() declaration.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
cc: Michael Walle mich...@walle.cc
cc: Tom Rini tr...@ti.com
---
Changes v2:
- move function hw_rand() from rand() to rand_r() and ignore its argument
include/common.h |3 +++
lib/rand.c |3 +++
2 files changed, 6 insertions(+)
diff --git a/include/common.h b/include/common.h
index 96a45a6..58e2fbc 100644
--- a/include/common.h
+++ b/include/common.h
@@ -836,6 +836,9 @@ void srand(unsigned int seed);
unsigned int rand(void);
unsigned int rand_r(unsigned int *seedp);
#endif
+#ifdef CONFIG_RAND_HW_ACCEL
+unsigned int hw_rand(void);
+#endif
/* common/console.c */
int console_init_f(void); /* Before relocation; uses the serial stuff
*/
diff --git a/lib/rand.c b/lib/rand.c
index 5c367e1..0617063 100644
--- a/lib/rand.c
+++ b/lib/rand.c
@@ -14,6 +14,9 @@ static unsigned int y = 1U;
unsigned int rand_r(unsigned int *seedp)
{
+#ifdef CONFIG_RAND_HW_ACCEL
+ return hw_rand();
+#endif
*seedp ^= (*seedp 13);
*seedp ^= (*seedp 17);
*seedp ^= (*seedp 5);
This doesn't already generate warnings about unreachable code?
I hate to say at but I think we should add lib/hw_rand.c which does:
void srand(uint seed) {}
unsigned int rand(void) { return hw_rand(); }
unsigned int rand_r(unsigned int *seedp) { seedp = hw_rand(); return
*seedp;}
(please double check how hw_rand() returns and net/link_local.c if we
can really avoid using the callers pointer...).
And then in correct Kbuild fashion, something like
randsrc-y ?= rand.o
randsrc-$(CONFIG_RAND_HW_ACCEL) = hw_rand.o
(The above is probably wrong, help please Masahiro :))
--
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[U-Boot] omap24xx_i2c: i2c 16-bit write to pcf8575
Hello, My platform is a dra7xx_evm. My code baseline is denx master I am trying to write to the pcf8575 i2c gpio expander at address 0x21 (bit P4) I can read 16-bit okay in this version, but 16-bit writing is not working. // Display current values i2c md 21 0.0 2 : f7 eb.. // Set bit P4 to 1 i2c mw 21 0.0 0xffeb 2 // But it remains at 0xf7 i2c md 21 0.0 2 : f7 eb.. When we put scopes on the i2c lines, it seems that the i2c mw transaction produces a longer i2c bus sequence that does not map to the [Start:Addr:W:A:P7-P0:A:P17-P10:A:Stop] that the pcf8575 device expects. Either I am invoking i2c mw incorrectly, or the oma24xx_i2c driver is not handling i2c 16-bit writes correctly yet. Any hints will be appreciated. Thanks for everyone's time -- Richard Retanubun ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] kbuild: use cc-cross-prefix to choose CROSS_COMPILE
On Wed, Mar 05, 2014 at 19:27 +0900, Masahiro Yamada wrote: If you like, you can still pass CROSS_COMPILE from the command line or by the environment variable. ifeq ($(CROSS_COMPILE),) CROSS_COMPILE := $(call cc-cross-prefix, arm-linux- arm-linux-gnueabi-) endif $(call cc-cross-prefix, ...) is invoked only when $(CROSS_COMPILE) is empty, that is CROSS_COMPILE is not explicitely specified. Ouch! Please don't do this. You may call it not explicitely specified, while I call it explicitly NOT specified. What I did in the past is to specifically pass 'CROSS_COMPILE=' on the command line, explicitly voiding any potentially set value. If the computer takes this as an invitation to come up with its own idea of what I might have meant, this is bad. I agree with Detlev, and strongly so. Computers should strictly do what they were told to do, and not try guess (they are awful at that), or even to outsmart the user (this is counter productive, and causes a lot of heat). virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] nand/denali: Adding Denali NAND driver support
On Wed, 2014-03-05 at 12:23 -0600, Scott Wood wrote: On Wed, 2014-03-05 at 11:34 -0600, Chin Liang See wrote: On Mon, 2014-03-03 at 18:03 -0600, Scott Wood wrote: On Fri, 2014-02-21 at 14:51 -0600, Chin Liang See wrote: To add the Denali NAND driver support into U-Boot. It required information such as register base address from configuration header file within include/configs folder. Signed-off-by: Chin Liang See cl...@altera.com Cc: Artem Bityutskiy artem.bityuts...@linux.intel.com Cc: David Woodhouse david.woodho...@intel.com Cc: Brian Norris computersforpe...@gmail.com Cc: Scott Wood scottw...@freescale.com --- Changes for v2 - Enable this driver support for SOCFPGA --- drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/denali_nand.c | 1166 drivers/mtd/nand/denali_nand.h | 501 + 3 files changed, 1668 insertions(+) create mode 100644 drivers/mtd/nand/denali_nand.c create mode 100644 drivers/mtd/nand/denali_nand.h diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index 02b149c..24e8218 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -39,6 +39,7 @@ obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o obj-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o +obj-$(CONFIG_NAND_DENALI) += denali_nand.o obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o diff --git a/drivers/mtd/nand/denali_nand.c b/drivers/mtd/nand/denali_nand.c new file mode 100644 index 000..55246c9 --- /dev/null +++ b/drivers/mtd/nand/denali_nand.c It's denali.c in Linux -- why denali_nand.c here? It seems all the existing U-Boot nand driver is using this naming standard where platform_nand. Not all -- there's omap_gpmc.c, omap_elm.c, nomadik.c, ndfc.c, etc. A lot of them have the _nand.c suffix in Linux, too. Personally, I think it's redundant. Sure, I can change to denali.c Why PASS/FAIL rather than normal 0 on success, negative error code on error? Why uint16_t? Fixed by returning 0 when pass. Also changed uint16_t to uint32_t Why uint32_t and not int? Is that return value somewhere used in a context that expects a NAND hardware status? Nope, the return value is not used to compare against 0 or 0 Thanks Chin Liang -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] nand/denali: Adding Denali NAND driver support
On Wed, 2014-03-05 at 17:01 -0600, Chin Liang See wrote: On Wed, 2014-03-05 at 12:23 -0600, Scott Wood wrote: On Wed, 2014-03-05 at 11:34 -0600, Chin Liang See wrote: On Mon, 2014-03-03 at 18:03 -0600, Scott Wood wrote: On Fri, 2014-02-21 at 14:51 -0600, Chin Liang See wrote: Why PASS/FAIL rather than normal 0 on success, negative error code on error? Why uint16_t? Fixed by returning 0 when pass. Also changed uint16_t to uint32_t Why uint32_t and not int? Is that return value somewhere used in a context that expects a NAND hardware status? Nope, the return value is not used to compare against 0 or 0 Why not? -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] nand/denali: Adding Denali NAND driver support
On Wed, 2014-03-05 at 17:04 -0600, Scott Wood wrote: On Wed, 2014-03-05 at 17:01 -0600, Chin Liang See wrote: On Wed, 2014-03-05 at 12:23 -0600, Scott Wood wrote: On Wed, 2014-03-05 at 11:34 -0600, Chin Liang See wrote: On Mon, 2014-03-03 at 18:03 -0600, Scott Wood wrote: On Fri, 2014-02-21 at 14:51 -0600, Chin Liang See wrote: Why PASS/FAIL rather than normal 0 on success, negative error code on error? Why uint16_t? Fixed by returning 0 when pass. Also changed uint16_t to uint32_t Why uint32_t and not int? Is that return value somewhere used in a context that expects a NAND hardware status? Nope, the return value is not used to compare against 0 or 0 Why not? We just check whether 0 or not as success will return 0. Thanks Chin Liang -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] nand/denali: Adding Denali NAND driver support
On Wed, 2014-03-05 at 17:09 -0600, Chin Liang See wrote: On Wed, 2014-03-05 at 17:04 -0600, Scott Wood wrote: On Wed, 2014-03-05 at 17:01 -0600, Chin Liang See wrote: On Wed, 2014-03-05 at 12:23 -0600, Scott Wood wrote: On Wed, 2014-03-05 at 11:34 -0600, Chin Liang See wrote: On Mon, 2014-03-03 at 18:03 -0600, Scott Wood wrote: On Fri, 2014-02-21 at 14:51 -0600, Chin Liang See wrote: Why PASS/FAIL rather than normal 0 on success, negative error code on error? Why uint16_t? Fixed by returning 0 when pass. Also changed uint16_t to uint32_t Why uint32_t and not int? Is that return value somewhere used in a context that expects a NAND hardware status? Nope, the return value is not used to compare against 0 or 0 Why not? We just check whether 0 or not as success will return 0. The standard error idiom in Linux and U-Boot is negative values for errors. That's why I asked if there was a reason for this, such as passing the value to something that expects status values as would be returned by hardware. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] nand/denali: Adding Denali NAND driver support
On Wed, 2014-03-05 at 17:11 -0600, Scott Wood wrote: On Wed, 2014-03-05 at 17:09 -0600, Chin Liang See wrote: On Wed, 2014-03-05 at 17:04 -0600, Scott Wood wrote: On Wed, 2014-03-05 at 17:01 -0600, Chin Liang See wrote: On Wed, 2014-03-05 at 12:23 -0600, Scott Wood wrote: On Wed, 2014-03-05 at 11:34 -0600, Chin Liang See wrote: On Mon, 2014-03-03 at 18:03 -0600, Scott Wood wrote: On Fri, 2014-02-21 at 14:51 -0600, Chin Liang See wrote: Why PASS/FAIL rather than normal 0 on success, negative error code on error? Why uint16_t? Fixed by returning 0 when pass. Also changed uint16_t to uint32_t Why uint32_t and not int? Is that return value somewhere used in a context that expects a NAND hardware status? Nope, the return value is not used to compare against 0 or 0 Why not? We just check whether 0 or not as success will return 0. The standard error idiom in Linux and U-Boot is negative values for errors. That's why I asked if there was a reason for this, such as passing the value to something that expects status values as would be returned by hardware. Yup, there are function which return the register value. From there, there will be a check for whether certain bit is set or not. Thanks Chin Liang -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] OMAP3 ECC: Writing u-boot to NAND within u-boot
Hi, I'm working with an OMAP3503 processor with a NAND chip attached via the GPMC interface. The NAND chip required at least 4-bit ECC outside of the first block. Currently, I write the MLO and u-boot.img files from u-boot using 1-bit hardware ECC (i.e. nandecc hw) to NAND and boot the board. It seems like this ECC is not really appropriate for writing u-boot though---is this correct? If I understand correctly, I have three options: 1. Write u-boot to NAND from linux using BCH-8 which SPL can now understand 2. Write u-boot to NAND using the on-die ECC for my NAND chip 3. Write u-boot to NAND from u-boot using BCH8 (nandecc hw bch8)this is my preference but when I try, I just see errors when trying to load u-boot from nand. Forgive my stupidity if this has been asked and answered a hundred times---I've been getting thoroughly confused with the changes to the ECC on OMAP3 in u-boot. --Ash ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ARM: mxs: Add OCOTP driver
Add yet another OCOTP driver for this i.MX family. This time, it's a driver for
the OCOTP variant found in the i.MX23 and i.MX28. This version of OCOTP is too
different from the i.MX6 one that I could not use the mxc_ocotp.c driver without
making it into a big pile of #ifdef . This driver implements the regular fuse
command interface, but due to the IP blocks' limitation, we support only READ
and PROG functions.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Stefano Babic sba...@denx.de
---
drivers/misc/Makefile| 1 +
drivers/misc/mxs_ocotp.c | 311 +++
include/configs/mxs.h| 5 +
3 files changed, 317 insertions(+)
create mode 100644 drivers/misc/mxs_ocotp.c
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index c77e40a..0f9f6f1 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_FSL_IIM) += fsl_iim.o
obj-$(CONFIG_GPIO_LED) += gpio_led.o
obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
+obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o
obj-$(CONFIG_NS87308) += ns87308.o
obj-$(CONFIG_PDSP188x) += pdsp188x.o
obj-$(CONFIG_STATUS_LED) += status_led.o
diff --git a/drivers/misc/mxs_ocotp.c b/drivers/misc/mxs_ocotp.c
new file mode 100644
index 000..545d3eb
--- /dev/null
+++ b/drivers/misc/mxs_ocotp.c
@@ -0,0 +1,311 @@
+/*
+ * Freescale i.MX28 OCOTP Driver
+ *
+ * Copyright (C) 2014 Marek Vasut ma...@denx.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Note: The i.MX23/i.MX28 OCOTP block is a predecessor to the OCOTP block
+ * used in i.MX6 . While these blocks are very similar at the first
+ * glance, by digging deeper, one will notice differences (like the
+ * tight dependence on MXS power block, some completely new registers
+ * etc.) which would make common driver an ifdef nightmare :-(
+ */
+
+#include common.h
+#include fuse.h
+#include asm/errno.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/imx-regs.h
+#include asm/arch/sys_proto.h
+
+#define MXS_OCOTP_TIMEOUT 10
+
+static struct mxs_ocotp_regs *ocotp_regs =
+ (struct mxs_ocotp_regs *)MXS_OCOTP_BASE;
+static struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
+static struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
+
+static int mxs_ocotp_wait_busy_clear(void)
+{
+ uint32_t reg;
+ int timeout = MXS_OCOTP_TIMEOUT;
+
+ while (--timeout) {
+ reg = readl(ocotp_regs-hw_ocotp_ctrl);
+ if (!(reg OCOTP_CTRL_BUSY))
+ break;
+ udelay(10);
+ }
+
+ if (!timeout)
+ return -EINVAL;
+
+ /* Wait a little as per FSL datasheet's 'write postamble' section. */
+ udelay(10);
+
+ return 0;
+}
+
+static void mxs_ocotp_clear_error(void)
+{
+ writel(OCOTP_CTRL_ERROR, ocotp_regs-hw_ocotp_ctrl_clr);
+}
+
+static int mxs_ocotp_read_bank_open(bool open)
+{
+ int ret = 0;
+
+ if (open) {
+ writel(OCOTP_CTRL_RD_BANK_OPEN,
+ ocotp_regs-hw_ocotp_ctrl_set);
+
+ /*
+* Wait before polling the BUSY bit, since the BUSY bit might
+* be asserted only after a few HCLK cycles and if we were to
+* poll immediatelly, we could miss the busy bit.
+*/
+ udelay(10);
+ ret = mxs_ocotp_wait_busy_clear();
+ } else {
+ writel(OCOTP_CTRL_RD_BANK_OPEN,
+ ocotp_regs-hw_ocotp_ctrl_clr);
+ }
+
+ return ret;
+}
+
+static void mxs_ocotp_scale_vddio(bool enter, uint32_t *val)
+{
+ uint32_t scale_val;
+
+ if (enter) {
+ /*
+* Enter the fuse programming VDDIO voltage setup. We start
+* scaling the voltage from it's current value down to 2.8V
+* which is the one and only correct voltage for programming
+* the OCOTP fuses (according to datasheet).
+*/
+ scale_val = readl(power_regs-hw_power_vddioctrl);
+ scale_val = POWER_VDDIOCTRL_TRG_MASK;
+
+ /* Return the original voltage. */
+ *val = scale_val;
+
+ /*
+* Start scaling VDDIO down to 0x2, which is 2.8V . Actually,
+* the value 0x0 should be 2.8V, but that's not the case on
+* most designs due to load etc., so we play safe. Undervolt
+* can actually cause incorrect programming of the fuses and
+* or reboots of the board.
+*/
+ while (scale_val 2) {
+ clrsetbits_le32(power_regs-hw_power_vddioctrl,
+ POWER_VDDIOCTRL_TRG_MASK, --scale_val);
+ udelay(500);
+ }
+ } else {
+
[U-Boot] [PATCH v7] socfpga: Add socfpga preloader signing to mkimage
Like many platforms, the Altera socfpga platform requires that the
preloader be signed in a certain way or the built-in boot ROM will
not boot the code.
This change automatically creates an appropriately signed preloader
from an SPL image.
The signed image includes a CRC which must, of course, be generated
with a CRC generator that the SoCFPGA boot ROM agrees with otherwise
the boot ROM will reject the image.
Unfortunately the CRC used in this boot ROM is not the same as the
Adler CRC in lib/crc32.c. Indeed the Adler code is not technically a
CRC but is more correctly described as a checksum.
Thus, the appropriate CRC generator is added to lib/ as crc32_alt.c.
Signed-off-by: Charles Manning cdhmann...@gmail.com
---
Changes for v3:
- Fix some coding style issues.
- Move from a standalone tool to the mkimgae framework.
Changes for v4:
- Fix more coding style issues.
- Fix typos in Makefile.
- Rebase on master (previous version was not on master, but on a
working socfpga branch).
Changes for v5:
- Fix more coding style issues.
- Add some more comments.
- Remove some unused defines.
- Move the local CRC32 code into lib/crc32_alt.c.
Changes for v6:
- Fix more coding style issues.
- Rejig socfpgaimage_vrec_header() function so that it has one return
path and does stricter size checks.
Changes for v7:
- Use bzlib's crc table instead of adding another one.
- Use existing code and a packed structure for header marshalling.
Note: Building a SOCFPGA preloader will currently not produce a
working image if built in master, but that is due to issues in
building SPL, not in this signer.
common/image.c |1 +
include/bzlib_crc32.h | 17
include/image.h|1 +
lib/bzlib_crc32.c | 26 +
spl/Makefile |5 +
tools/Makefile |3 +
tools/bzlib_crc32.c|1 +
tools/bzlib_crctable.c |1 +
tools/bzlib_private.h |1 +
tools/imagetool.c |2 +
tools/imagetool.h |1 +
tools/socfpgaimage.c | 255
12 files changed, 314 insertions(+)
create mode 100644 include/bzlib_crc32.h
create mode 100644 lib/bzlib_crc32.c
create mode 100644 tools/bzlib_crc32.c
create mode 100644 tools/bzlib_crctable.c
create mode 100644 tools/bzlib_private.h
create mode 100644 tools/socfpgaimage.c
diff --git a/common/image.c b/common/image.c
index 9c6bec5..e7dc8cc 100644
--- a/common/image.c
+++ b/common/image.c
@@ -135,6 +135,7 @@ static const table_entry_t uimage_type[] = {
{ IH_TYPE_PBLIMAGE, pblimage, Freescale PBL Boot Image,},
{ IH_TYPE_RAMDISK,ramdisk,RAMDisk Image, },
{ IH_TYPE_SCRIPT, script, Script, },
+ { IH_TYPE_SOCFPGAIMAGE, socfpgaimage, Altera SOCFPGA
preloader,},
{ IH_TYPE_STANDALONE, standalone, Standalone Program, },
{ IH_TYPE_UBLIMAGE, ublimage, Davinci UBL image,},
{ IH_TYPE_MXSIMAGE, mxsimage, Freescale MXS Boot Image,},
diff --git a/include/bzlib_crc32.h b/include/bzlib_crc32.h
new file mode 100644
index 000..96d8124
--- /dev/null
+++ b/include/bzlib_crc32.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2014 Charles Manning cdhmann...@gmail.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Note that the CRC is **not** the zlib/Adler crc32 in crc32.c.
+ * It is the CRC-32 used in bzip2, ethernet and elsewhere.
+ */
+
+#ifndef __BZLIB_CRC32_H__
+#define __BZLIB_CRC32_H__
+
+#include stdint.h
+
+uint32_t bzlib_crc32(uint32_t crc, const void *_buf, int length);
+
+#endif
diff --git a/include/image.h b/include/image.h
index 6afd57b..bde31d9 100644
--- a/include/image.h
+++ b/include/image.h
@@ -215,6 +215,7 @@ struct lmb;
#define IH_TYPE_KERNEL_NOLOAD 14 /* OS Kernel Image, can run from any
load address */
#define IH_TYPE_PBLIMAGE 15 /* Freescale PBL Boot Image */
#define IH_TYPE_MXSIMAGE 16 /* Freescale MXSBoot Image */
+#define IH_TYPE_SOCFPGAIMAGE 17 /* Altera SOCFPGA Preloader */
/*
* Compression Types
diff --git a/lib/bzlib_crc32.c b/lib/bzlib_crc32.c
new file mode 100644
index 000..cc1a8a0
--- /dev/null
+++ b/lib/bzlib_crc32.c
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2014 Charles Manning cdhmann...@gmail.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * This provides a CRC-32 using the tables in bzlib_crctable.c
+ */
+
+#include bzlib_crc32.h
+#include bzlib_private.h
+
+uint32_t bzlib_crc32(uint32_t crc, const void *_buf, int length)
+{
+ const uint8_t *buf = _buf;
+
+ crc ^= ~0;
+
+ while (length--) {
+ crc = (crc 8) ^ BZ2_crc32Table[((crc 24) ^ *buf) 0xff];
+ buf++;
+ }
+
+ crc ^= ~0;
+
+ return crc;
+}
diff --git a/spl/Makefile b/spl/Makefile
index 346d0aa..4e0f33f 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -182,6 +182,11 @@ MLO MLO.byteswap: $(obj)/u-boot-spl.bin
Re: [U-Boot] [PATCH 0/3] samsung: Add mmc controller to use dw mmc
On 03/05/2014 06:21 PM, Lukasz Majewski wrote: Hi Beomho, This patch set for use dw mmc controller. First, add dw mmc controller initialization. And then, change exynos4 mmc gpio configuration. Additionally, I have removed exynos4x12_set_mmc_clk function. Because samsung_get_base_clock() (exynos4x12/ exynos4) return same value. Thank you for supporting the DW_MMC on Trats2. I've got following comments: 1. Piotr Wilczek (added to CC) is moving the Trats/Trats2 board to support configuration via device tree. From device tree it is easier to seamlessly enable support for DW_MMC (SDMMC4 controller) - at least we would avoid adding new #ifdefs. The way to enable it is almost identical to Exynos5250 (board snow). Now the v4 has been sent, so please look (and probably rebase your work) on them: [PATCH V4 00/12] Exynos4: add support for device tree http://article.gmane.org/gmane.comp.boot-loaders.u-boot/181576/match=exynos4+add+support+device+tree Ok. It will be change to use the dt file. 2. We did some rough tests for the DW_MMC implementation on Trats2 (with clock phase settings similar to the one in the kernel) and it turned out that SDHCI is faster. Two possible explanations: - DDR is not supported by memory embedded on Trats2 - We did something wrong, so as a result the DDR mode for DW_MMC/eMMC memory was not working properly. DDR mode didn't implement at u-boot. It need to update code for DDR mode. If you want to use DDR mode, then i will implement it. However, I still believe, that DW_MMC with properly enabled DDR could outperform SDHCI. Right, If DW-mmc is used with DDR mode, then it's more better than SDHCI. there is no reason that we didn't use the dw-mmc controller at trats2 board. Why this speedup is important? We struggle to reduce time needed for flashing large images (like rootfs - e.g. 400 MiB in size). Any help is more than welcome :-). 3. u-boot general advice: When you alter things related to a particular board (like trats2 in this case) it is welcome to add the board's maintainer to CC. You can find them at boards.cfg. Maybe, need to add Samsung-SoC maintainer, and base on SoC repository. Best Regards, Jaehoon Chung This patch set is tested on Trats2 board. Beomho Seo (3): board: samsung: trats2: Add DW MMC controller initialization arm: exynos: pinmux: Add sdmmc4 gpio confifuration arm: exynos: clock: Remove exynos4x12_set_mmc_clk function arch/arm/cpu/armv7/exynos/clock.c | 29 + arch/arm/cpu/armv7/exynos/pinmux.c | 20 +++- board/samsung/trats2/trats2.c | 31 +-- 3 files changed, 37 insertions(+), 43 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 2/3] lib: rand: add call to hw_rand() - hardware random number generator
Hello Tom,
unsigned int rand_r(unsigned int *seedp)
{
+#ifdef CONFIG_RAND_HW_ACCEL
+ return hw_rand();
+#endif
*seedp ^= (*seedp 13);
*seedp ^= (*seedp 17);
*seedp ^= (*seedp 5);
This doesn't already generate warnings about unreachable code?
I hate to say at but I think we should add lib/hw_rand.c which does:
void srand(uint seed) {}
unsigned int rand(void) { return hw_rand(); }
unsigned int rand_r(unsigned int *seedp) { seedp = hw_rand(); return
*seedp;}
(please double check how hw_rand() returns and net/link_local.c if we
can really avoid using the callers pointer...).
And then in correct Kbuild fashion, something like
randsrc-y ?= rand.o
randsrc-$(CONFIG_RAND_HW_ACCEL) = hw_rand.o
(The above is probably wrong, help please Masahiro :))
In the first place, I don't like the idea to add a new function
hw_rand() very much.
I think lib/rand.c is just one implementation among
some possible choices.
drivers/crypto/ace_sha.c is another implementation.
How about treating them in the same way?
I mean, srand(), rand(), rand_r()
should be defined in drivers/crypto/ace_sha.c
rather than adding lib/hw_rand.c.
drivers/crypto/ace_sha.c is like this:
void srand(uint seed) {}
unsigned int rand(void)
{
your hardware rand implementation
}
unsigned int rand_r(unsigned int *seedp)
{
return rand();
}
lib/Makefile will be changed like this:
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -62,8 +62,6 @@ obj-y += time.o
obj-$(CONFIG_TRACE) += trace.o
obj-$(CONFIG_BOOTP_PXE) += uuid.o
obj-y += vsprintf.o
-obj-$(CONFIG_RANDOM_MACADDR) += rand.o
-obj-$(CONFIG_BOOTP_RANDOM_DELAY) += rand.o
-obj-$(CONFIG_CMD_LINK_LOCAL) += rand.o
+obj-$(CONFIG_SW_RAND) += rand.o
It looks like CONFIG_SW_RAND (or CONFIG_EXYNOS_ACE_SHA)
must be added to the following boards.
include/configs/lsxl.h(for CONFIG_RANDOM_MACADDR)
include/configs/MERGERBOX.h (for CONFIG_BOOTP_RAMDOM_DELAY)
include/configs/MVBC_P.h (for CONFIG_BOOTP_RAMDOM_DELAY)
include/configs/MVBLM7.h (for CONFIG_BOOTP_RAMDOM_DELAY)
include/configs/MVSMR.h (for CONFIG_BOOTP_RAMDOM_DELAY)
include/configs/bfin_adi_common.h (for CONFIG_BOOTP_RAMDOM_DELAY)
include/configs/sacsng.h(for CONFIG_BOOTP_RAMDOM_DELAY)
include/config_uncmd_spl.h (for CONFIG_CMD_LINK_LOCAL)
include/configs/a3m071.h (for CONFIG_CMD_LINK_LOCAL)
Best Regards
Masahiro Yamada
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Re: [U-Boot] [PATCH V2 1/3] cpu: exynos4: ace_sha: add hardware random number generator support.
On 03/06/2014 01:57 AM, Przemyslaw Marczak wrote:
This patch adds implementation of function hw_rand() based on exynos
security sub system.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
cc: Akshay Saraswat aksha...@samsung.com
cc: ARUN MANKUZHI aru...@samsung.com
cc: Minkyu Kang mk7.k...@samsung.com
---
Changes v2:
- none
arch/arm/include/asm/arch-exynos/cpu.h |4 ++--
drivers/crypto/ace_sha.c | 41
drivers/crypto/ace_sha.h |8 ---
3 files changed, 48 insertions(+), 5 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index bccce63..a5c280d 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -48,7 +48,7 @@
#define EXYNOS4_GPIO_PART4_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS4_DP_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS4_SPI_ISP_BASE DEVICE_NOT_AVAILABLE
-#define EXYNOS4_ACE_SFR_BASE DEVICE_NOT_AVAILABLE
+#define EXYNOS4_ACE_SFR_BASE 0x1083
#define EXYNOS4_DMC_PHY_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS4_AUDIOSS_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS4_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE
@@ -87,7 +87,7 @@
#define EXYNOS4X12_I2S_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS4X12_SPI_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS4X12_SPI_ISP_BASE DEVICE_NOT_AVAILABLE
-#define EXYNOS4X12_ACE_SFR_BASE DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_ACE_SFR_BASE 0x1083
#define EXYNOS4X12_DMC_PHY_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS4X12_AUDIOSS_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS4X12_USB_HOST_XHCI_BASEDEVICE_NOT_AVAILABLE
diff --git a/drivers/crypto/ace_sha.c b/drivers/crypto/ace_sha.c
index acbafde..d12a507 100644
--- a/drivers/crypto/ace_sha.c
+++ b/drivers/crypto/ace_sha.c
@@ -111,3 +111,44 @@ void hw_sha1(const unsigned char *pbuf, unsigned int
buf_len,
if (ace_sha_hash_digest(pbuf, buf_len, pout, ACE_SHA_TYPE_SHA1))
debug(ACE was not setup properly or it is faulty\n);
}
+
+unsigned int hw_rand(void)
+{
+ struct exynos_ace_sfr *reg =
+ (struct exynos_ace_sfr *)samsung_get_base_ace_sfr();
+ int status, i;
+ int seed[5];
+ unsigned int ret = 0;
+
+ /* Seed data */
+ for (i = 0; i ACE_HASH_PRNG_REG_NUM; i++)
+ writel(seed[i], reg-hash_seed[i]);
+
+ status = 0;
+ /* Wait for seed setup done */
+ while (!(status ACE_HASH_SEEDSETTING_MASK)) {
+ status = readl(reg-hash_status);
+ if (status ACE_HASH_PRNGERROR_MASK)
+ return 0;
+ }
Can it use do{ }while?
+
+ /* Start PRNG */
+ writel(ACE_HASH_ENGSEL_PRNG | ACE_HASH_STARTBIT_ON, reg-hash_control);
+
+ status = 0;
+ /* Wait for PRNG done */
+ while (!(status ACE_HASH_PRNGDONE_MASK)) {
+ status = readl(reg-hash_status);
+ if (status ACE_HASH_PRNGERROR_MASK)
+ return 0;
+ }
+
+ /* Clear Done IRQ */
+ writel(ACE_HASH_PRNGDONE_MASK, reg-hash_status);
+
+ /* Read a PRNG result */
+ for (i = 0; i ACE_HASH_PRNG_REG_NUM; i++)
+ ret += readl(reg-hash_prng[i]);
+
+ return ret;
+}
diff --git a/drivers/crypto/ace_sha.h b/drivers/crypto/ace_sha.h
index a426d52..f1097f7 100644
--- a/drivers/crypto/ace_sha.h
+++ b/drivers/crypto/ace_sha.h
@@ -72,9 +72,10 @@ struct exynos_ace_sfr {
unsigned char res12[0x30];
unsigned inthash_result[8];
unsigned char res13[0x20];
- unsigned inthash_seed[8];
- unsigned inthash_prng[8];
- unsigned char res14[0x180];
+ unsigned inthash_seed[5];
+ unsigned char res14[12];
+ unsigned inthash_prng[5];
+ unsigned char res15[0x18c];
unsigned intpka_sfr[5]; /* base + 0x700 */
};
@@ -291,6 +292,7 @@ struct exynos_ace_sfr {
#define ACE_HASH_PRNGERROR_MASK (1 7)
#define ACE_HASH_PRNGERROR_OFF (0 7)
#define ACE_HASH_PRNGERROR_ON(1 7)
+#define ACE_HASH_PRNG_REG_NUM5
#define ACE_SHA_TYPE_SHA11
#define ACE_SHA_TYPE_SHA256 2
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[U-Boot] [PATCH] board/BuR/common: fix phy addresses
BR boards are using Phy Addresses 'one' and 'two', prior this was
defined through #define PHYADDR 1 within a header file.
Now this is addresses are given with device-driver structure.
Signed-off-by: Hannes Petermaier oe5...@oevsv.at
---
board/BuR/common/common.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index 04f3f1f..4c926ce 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -141,12 +141,12 @@ static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
- .phy_addr = 0,
+ .phy_addr = 1,
},
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
- .phy_addr = 1,
+ .phy_addr = 2,
},
};
--
1.7.10.4
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[U-Boot] Secure booting using u-boot 2013
Hello, I am trying to perform secure booting on nitrogen 6X SOM using u-boot 2013. I tried to pad and sign the u-boot.imx image for authentication.But the size of both u-boot.imx as well as u-boot-signed-padded.imx remains same. Technically signed and padded image should have more size than normal .imx image. Can anyone inform where and what changes should I make in the source code of u-boot so that I can solve the problem? Thanks in Advance! ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mips: xburst: remove remainders of dead board
Commit 54e458de deleted qi_lb60 board support
because of the incompatible license issue.
There is no board with XBurst CPU.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Daniel Schwierzeck daniel.schwierz...@gmail.com
Cc: Tom Rini tr...@ti.com
---
README | 2 +-
arch/mips/cpu/xburst/Makefile| 9 --
arch/mips/cpu/xburst/config.mk | 16 ---
arch/mips/cpu/xburst/cpu.c | 136 --
arch/mips/cpu/xburst/jz4740.c| 235 ---
arch/mips/cpu/xburst/jz_serial.c | 118
arch/mips/cpu/xburst/start.S | 179 -
arch/mips/cpu/xburst/timer.c | 149 -
8 files changed, 1 insertion(+), 843 deletions(-)
delete mode 100644 arch/mips/cpu/xburst/Makefile
delete mode 100644 arch/mips/cpu/xburst/config.mk
delete mode 100644 arch/mips/cpu/xburst/cpu.c
delete mode 100644 arch/mips/cpu/xburst/jz4740.c
delete mode 100644 arch/mips/cpu/xburst/jz_serial.c
delete mode 100644 arch/mips/cpu/xburst/start.S
delete mode 100644 arch/mips/cpu/xburst/timer.c
diff --git a/README b/README
index 216f0c7..48b8f36 100644
--- a/README
+++ b/README
@@ -164,7 +164,7 @@ Directory Hierarchy:
/mipsFiles generic to MIPS architecture
/cpu CPU specific files
/mips32 Files specific to MIPS32 CPUs
- /xburst Files specific to Ingenic XBurst CPUs
+ /mips64 Files specific to MIPS64 CPUs
/lib Architecture specific library files
/nds32 Files generic to NDS32 architecture
/cpu CPU specific files
diff --git a/arch/mips/cpu/xburst/Makefile b/arch/mips/cpu/xburst/Makefile
deleted file mode 100644
index 57714d0..000
--- a/arch/mips/cpu/xburst/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# Copyright (C) 2011 Xiangfu Liu xian...@openmobilefree.net
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-extra-y= start.o
-obj-y = cpu.o timer.o jz_serial.o
-obj-$(CONFIG_JZ4740) += jz4740.o
diff --git a/arch/mips/cpu/xburst/config.mk b/arch/mips/cpu/xburst/config.mk
deleted file mode 100644
index b8e53e5..000
--- a/arch/mips/cpu/xburst/config.mk
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# Copyright (C) 2011 Xiangfu Liu xian...@openmobilefree.net
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-PLATFORM_CPPFLAGS += -march=mips32
-PLATFORM_CPPFLAGS += -mabi=32 -DCONFIG_32BIT
-ifdef CONFIG_SYS_BIG_ENDIAN
-PLATFORM_LDFLAGS += -m elf32btsmip
-else
-PLATFORM_LDFLAGS += -m elf32ltsmip
-endif
-
-CONFIG_STANDALONE_LOAD_ADDR ?= 0x8020 \
- -T $(srctree)/examples/standalone/mips.lds
diff --git a/arch/mips/cpu/xburst/cpu.c b/arch/mips/cpu/xburst/cpu.c
deleted file mode 100644
index 1fdaa32..000
--- a/arch/mips/cpu/xburst/cpu.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de
- * (C) Copyright 2011
- * Xiangfu Liu xian...@openmobilefree.net
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include command.h
-#include netdev.h
-#include asm/mipsregs.h
-#include asm/cacheops.h
-#include asm/reboot.h
-#include asm/io.h
-#include asm/jz4740.h
-
-#define cache_op(op, addr) \
- __asm__ __volatile__( \
- .set push\n \
- .set noreorder\n\
- .set mips3\n\
- cache %0, %1\n \
- .set pop\n \
- : \
- : i (op), R (*(unsigned char *)(addr)))
-
-void __attribute__((weak)) _machine_restart(void)
-{
- struct jz4740_wdt *wdt = (struct jz4740_wdt *)JZ4740_WDT_BASE;
- struct jz4740_tcu *tcu = (struct jz4740_tcu *)JZ4740_TCU_BASE;
- u16 tmp;
-
- /* wdt_select_extalclk() */
- tmp = readw(wdt-tcsr);
- tmp = ~(WDT_TCSR_EXT_EN | WDT_TCSR_RTC_EN | WDT_TCSR_PCK_EN);
- tmp |= WDT_TCSR_EXT_EN;
- writew(tmp, wdt-tcsr);
-
- /* wdt_select_clk_div64() */
- tmp = readw(wdt-tcsr);
- tmp = ~WDT_TCSR_PRESCALE_MASK;
- tmp |= WDT_TCSR_PRESCALE64,
- writew(tmp, wdt-tcsr);
-
- writew(100, wdt-tdr); /* wdt_set_data(100) */
- writew(0, wdt-tcnt); /* wdt_set_count(0); */
- writel(TCU_TSSR_WDTSC, tcu-tscr); /* tcu_start_wdt_clock */
- writeb(readb(wdt-tcer) | WDT_TCER_TCEN, wdt-tcer); /* wdt start */
-
- while (1)
- ;
-}
-
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- _machine_restart();
-
- fprintf(stderr, *** reset failed ***\n);
- return 0;
-}
-
-void flush_cache(ulong start_addr, ulong size)
-{
- unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE;
- unsigned long addr = start_addr ~(lsize - 1);
- unsigned long aend = (start_addr + size - 1) ~(lsize - 1);
-
- for (; addr = aend;
Re: [U-Boot] [PATCH 1/3] samsung: misc: check_keys(), key_pressed() - remove type static.
On 28/02/14 23:30, Przemyslaw Marczak wrote:
This patch removes type static from those functions declaration.
Now it can be used outside.
outside where?
I think there's no reason to make them to non-static function.
If you want to use it at outside then please send the patch together.
Change-Id: I2244ca3568b73251401e5102f26cc113ea69c1a4
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
cc: Minkyu Kang mk7.k...@samsung.com
---
board/samsung/common/misc.c |5 ++---
include/samsung/misc.h |4
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index eb15739..1d6f4e4 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -15,7 +15,6 @@
#include asm/arch/cpu.h
#include asm/arch/gpio.h
#include asm/gpio.h
-#include linux/input.h
#include power/pmic.h
#include mmc.h
@@ -72,7 +71,7 @@ static int power_key_pressed(u32 reg)
return !!(status mask);
}
-static int key_pressed(int key)
+int key_pressed(int key)
{
int value;
@@ -94,7 +93,7 @@ static int key_pressed(int key)
return value;
}
-static int check_keys(void)
+int check_keys(void)
{
int keys = 0;
diff --git a/include/samsung/misc.h b/include/samsung/misc.h
index ede6c15..47beb1f 100644
--- a/include/samsung/misc.h
+++ b/include/samsung/misc.h
@@ -1,6 +1,8 @@
#ifndef __SAMSUNG_MISC_COMMON_H__
#define __SAMSUNG_MISC_COMMON_H__
+#include linux/input.h
+
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void);
#endif
@@ -19,6 +21,8 @@ enum {
};
void keys_init(void);
+int check_keys(void);
+int key_pressed(int key);
void check_boot_mode(void);
#endif /* CONFIG_LCD_MENU */
Thanks,
Minkyu Kang.
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Re: [U-Boot] [PATCH 2/3] arm: exynos: pinmux: Add sdmmc4 gpio configuration
On 05/03/14 10:57, Beomho Seo wrote:
For use dwmmc controller, add SDMMC4 gpio configuration.
Signed-off-by: Beomho Seo beomho@samsung.com
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
arch/arm/cpu/armv7/exynos/pinmux.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 645c497..a67664f 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -623,16 +623,25 @@ static int exynos4_mmc_config(int peripheral, int flags)
struct exynos4_gpio_part2 *gpio2 =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
struct s5p_gpio_bank *bank, *bank_ext;
+ unsigned int func, func_ext = 0;
please do not set initial value.
please set value explicitly at switch..case statement instead.
int i;
switch (peripheral) {
case PERIPH_ID_SDMMC0:
bank = gpio2-k0;
bank_ext = gpio2-k1;
+ func = GPIO_FUNC(0x2);
+ func_ext = GPIO_FUNC(0x3);
break;
case PERIPH_ID_SDMMC2:
bank = gpio2-k2;
- bank_ext = gpio2-k3;
+ func = GPIO_FUNC(0x2);
+ break;
+ case PERIPH_ID_SDMMC4:
+ bank = gpio2-k0;
+ bank_ext = gpio2-k1;
+ func = GPIO_FUNC(0x3);
+ func_ext = GPIO_FUNC(0x4);
break;
default:
return -1;
@@ -640,13 +649,14 @@ static int exynos4_mmc_config(int peripheral, int flags)
for (i = 0; i 7; i++) {
if (i == 2)
continue;
- s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ s5p_gpio_cfg_pin(bank, i, func);
s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
}
- if (flags PINMUX_FLAG_8BIT_MODE) {
+ if ((flags PINMUX_FLAG_8BIT_MODE)
+ ~(peripheral PERIPH_ID_SDMMC2)) {
Actually, I can't catch easily what you expected here.
So.. could you please modify more readable?
for (i = 3; i 7; i++) {
- s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(bank_ext, i, func_ext);
s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
}
@@ -710,10 +720,10 @@ static int exynos4_pinmux_config(int peripheral, int
flags)
break;
case PERIPH_ID_SDMMC0:
case PERIPH_ID_SDMMC2:
+ case PERIPH_ID_SDMMC4:
return exynos4_mmc_config(peripheral, flags);
case PERIPH_ID_SDMMC1:
case PERIPH_ID_SDMMC3:
- case PERIPH_ID_SDMMC4:
debug(SDMMC device %d not implemented\n, peripheral);
return -1;
default:
Thanks,
Minkyu Kang.
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Re: [U-Boot] [PATCH 1/3] board: samsung: trats2: Add DW MMC controller initialization
On 05/03/14 10:57, Beomho Seo wrote: Add DW MMC controller initialization. Selectively use DW MMC controller instead of SDHCI controller. Signed-off-by: Beomho Seo beomho@samsung.com Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com Cc: Minkyu Kang mk7.k...@samsung.com --- board/samsung/trats2/trats2.c | 31 +-- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c index c17c24d..11bebb9 100644 --- a/board/samsung/trats2/trats2.c +++ b/board/samsung/trats2/trats2.c @@ -11,6 +11,7 @@ #include asm/io.h #include asm/arch/gpio.h #include asm/arch/mmc.h +#include asm/arch/dwmmc.h #include asm/arch/power.h #include asm/arch/clk.h #include asm/arch/clock.h @@ -280,18 +281,19 @@ int board_mmc_init(bd_t *bis) gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2(); - /* eMMC_EN: SD_0_CDn: GPK0[2] Output High */ + /* eMMC_EN: SD_0_CDn or SD_4_CDn: GPK0[2] Output High */ s5p_gpio_direction_output(gpio2-k0, 2, 1); s5p_gpio_set_pull(gpio2-k0, 2, GPIO_PULL_NONE); /* * eMMC GPIO: * SDR 8-bit@48MHz at MMC0 - * GPK0[0] SD_0_CLK(2) - * GPK0[1] SD_0_CMD(2) - * GPK0[2] SD_0_CDn- Not used - * GPK0[3:6]SD_0_DATA[0:3](2) - * GPK1[3:6]SD_0_DATA[0:3](3) + * SDHCI DW-MMC + * GPK0[0] SD_0_CLK(2) SD_4_CLK(3) + * GPK0[1] SD_0_CMD(2) SD_4_CMD(3) + * GPK0[2] SD_0_CDnSD_4_CDn- Not used + * GPK0[3:6]SD_0_DATA[0:3](2) SD_4_DATA[0:3](3) + * GPK1[3:6]SD_0_DATA[4:7](3) SD_4_DATA[4:7](4) * * DDR 4-bit@26MHz at MMC4 * GPK0[0] SD_4_CLK(3) @@ -301,17 +303,26 @@ int board_mmc_init(bd_t *bis) * GPK1[3:6]SD_4_DATA[4:7](4) */ - err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE); - /* * MMC device init - * mmc0 : eMMC (8-bit buswidth) - * mmc2 : SD card (4-bit buswidth) + * mmc0 : eMMC, sdhci controller (8-bit buswidth) + * mmc2 : SD card, sdhci controller (4-bit buswidth) + * mmc4 : eMMC, dw-mmc controller (8-bit buswidth) */ + +#ifndef CONFIG_DWMMC + err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE); if (err0) debug(SDMMC0 not configured\n); else err0 = s5p_mmc_init(0, 8); +#else + err0 = exynos_pinmux_config(PERIPH_ID_SDMMC4, PINMUX_FLAG_8BIT_MODE); + if (err0) + debug(SDMMC4 not configured\n); + else + err0 = exynos_dwmci_add_port(4, 0x1255, 8, 0x0001); what means 0x1255, 0x0001? +#endif /* T-flash detect */ s5p_gpio_cfg_pin(gpio2-x3, 4, 0xf); Thanks, Minkyu Kang. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] arm: exynos: clock: Remove exynos4x12_set_mmc_clk function
On 05/03/14 10:57, Beomho Seo wrote:
Remove exynos4x12_set_mmc_clk.
Please describe here why you remove it.
Signed-off-by: Beomho Seo beomho@samsung.com
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 29 +
1 file changed, 1 insertion(+), 28 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 1fea4d6..2c2029a 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -893,30 +893,6 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned
int div)
(div 0xff) ((dev_index 4) + 8));
}
-/* exynos4x12: set the mmc clock */
-static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div)
-{
- struct exynos4x12_clock *clk =
- (struct exynos4x12_clock *)samsung_get_base_clock();
- unsigned int addr;
-
- /*
- * CLK_DIV_FSYS1
- * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
- * CLK_DIV_FSYS2
- * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
- */
- if (dev_index 2) {
- addr = (unsigned int)clk-div_fsys1;
- } else {
- addr = (unsigned int)clk-div_fsys2;
- dev_index -= 2;
- }
-
- clrsetbits_le32(addr, 0xff ((dev_index 4) + 8),
- (div 0xff) ((dev_index 4) + 8));
-}
-
/* exynos5: set the mmc clock */
static void exynos5_set_mmc_clk(int dev_index, unsigned int div)
{
@@ -1612,10 +1588,7 @@ void set_mmc_clk(int dev_index, unsigned int div)
else
exynos5_set_mmc_clk(dev_index, div);
} else {
- if (proid_is_exynos4412())
- exynos4x12_set_mmc_clk(dev_index, div);
- else
- exynos4_set_mmc_clk(dev_index, div);
+ exynos4_set_mmc_clk(dev_index, div);
}
}
Thanks,
Minkyu Kang.
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Re: [U-Boot] [PATCH 2/3] arm: exynos: pinmux: Add sdmmc4 gpio configuration
On 03/06/2014 03:58 PM, Minkyu Kang wrote:
On 05/03/14 10:57, Beomho Seo wrote:
For use dwmmc controller, add SDMMC4 gpio configuration.
Signed-off-by: Beomho Seo beomho@samsung.com
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
arch/arm/cpu/armv7/exynos/pinmux.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 645c497..a67664f 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -623,16 +623,25 @@ static int exynos4_mmc_config(int peripheral, int
flags)
struct exynos4_gpio_part2 *gpio2 =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
struct s5p_gpio_bank *bank, *bank_ext;
+unsigned int func, func_ext = 0;
please do not set initial value.
please set value explicitly at switch..case statement instead.
int i;
switch (peripheral) {
case PERIPH_ID_SDMMC0:
bank = gpio2-k0;
bank_ext = gpio2-k1;
+func = GPIO_FUNC(0x2);
+func_ext = GPIO_FUNC(0x3);
break;
case PERIPH_ID_SDMMC2:
bank = gpio2-k2;
-bank_ext = gpio2-k3;
+func = GPIO_FUNC(0x2);
+break;
+case PERIPH_ID_SDMMC4:
+bank = gpio2-k0;
+bank_ext = gpio2-k1;
+func = GPIO_FUNC(0x3);
+func_ext = GPIO_FUNC(0x4);
break;
default:
return -1;
@@ -640,13 +649,14 @@ static int exynos4_mmc_config(int peripheral, int
flags)
for (i = 0; i 7; i++) {
if (i == 2)
continue;
-s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+s5p_gpio_cfg_pin(bank, i, func);
s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
}
-if (flags PINMUX_FLAG_8BIT_MODE) {
+if ((flags PINMUX_FLAG_8BIT_MODE)
+~(peripheral PERIPH_ID_SDMMC2)) {
Actually, I can't catch easily what you expected here.
So.. could you please modify more readable?
I think that this point didn't need to change.
SDMMC2 didn't use 8bit mode at exynos4/5.
Best Regards,
Jaehoon Chung
for (i = 3; i 7; i++) {
-s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
+s5p_gpio_cfg_pin(bank_ext, i, func_ext);
s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
}
@@ -710,10 +720,10 @@ static int exynos4_pinmux_config(int peripheral, int
flags)
break;
case PERIPH_ID_SDMMC0:
case PERIPH_ID_SDMMC2:
+case PERIPH_ID_SDMMC4:
return exynos4_mmc_config(peripheral, flags);
case PERIPH_ID_SDMMC1:
case PERIPH_ID_SDMMC3:
-case PERIPH_ID_SDMMC4:
debug(SDMMC device %d not implemented\n, peripheral);
return -1;
default:
Thanks,
Minkyu Kang.
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