Re: [U-Boot] [RFC PATCH 0/17] Version 0 of Kconfig for U-Boot
Dear Masahiro, In message 20140324145814.b35f.aa925...@jp.panasonic.com you wrote: You are suggesting a better idea below. We should not treat SPL as a special case. In my opinion, CONFIG_SPL_* should be discontinued. For example, we can merge CONFIG_SPL_TEXT_BASE to CONFIG_SYS_TEXT_BASE. Are you sure this is always possible? #ifdef CONFIG_SPL_BUILD # define CONFIG_SYS_TEXT_BASE0x #else # define CONFIG_SYS_TEXT_BASE0x1000 #endif rather than #define CONFIG_SPL_TEXT_BASE0x #define CONFIG_SYS_TEXT_BASE0x1000 Are there really no cases where for example the SPL needs to know CONFIG_SYS_TEXT_BASE, for example when loading U-Boot to RAM? I think that the normal U-Boot does not need to know about the SPL, but is this also always true the other way round? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Our business is run on trust. We trust you will pay in advance. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/4] cpu: exynos4: add ace sha base address
Hello Minkyu, On 03/22/2014 04:18 PM, Minkyu Kang wrote: Dear Przemyslaw Marczak, On 21 March 2014 17:56, Przemyslaw Marczak p.marc...@samsung.com wrote: Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com Cc: Minkyu Kang mk7.k...@samsung.com --- Changes v3: - new commit - after separate changes from next commit Changes v4: - none --- arch/arm/include/asm/arch-exynos/cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index bccce63..bd3300a 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -44,11 +44,11 @@ #define EXYNOS4_MODEM_BASE 0x13A0 #define EXYNOS4_USBPHY_CONTROL 0x10020704 #define EXYNOS4_I2S_BASE 0xE210 +#define EXYNOS4_ACE_SFR_BASE 0x1083 Could you please align this list? I am not sure why this is not aligned in patch - it was generated by git format patch. The source was aligned and after apply this patch by git am the code is also aligned. Thanks -- Przemyslaw Marczak Samsung RD Institute Poland Samsung Electronics p.marc...@samsung.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] driver/net/fm/memac_phy: Initialize mdio_clock for SoCs wih FMANv3
MDIO clock needs to be initialized in u-boot code for SoCs having FMAN-v3(v3H or v3L) controller due to below reasons -On SoCs that have FMAN-v3H like B4860, default value of MDIO_CLK_DIV bits in mdio_stat(mdio_cfg) register generates mdio clock too high (much higher than 2.5MHz), violating the IEEE specs. -On SOCs that have FMAN-v3L like T1040, default value of MDIO_CLK_DIV bits is zero, so MDIO clock is disabled. So, for proper functioninig of MDIO, MDIO_CLK_DIV bits needs to be properly initialized. Also this type of initialization is generally done in PBI(pre-bootloader) phase using rcw.But for chips like T1040 which support deep-sleep, such type of initialization cannot be done in PBI phase due to the limitation that during deep-sleep resume, FMAN (MDIO) registers are not accessible in PBI phase. So, mdio clock initailization must be done as part of u-boot. This initialization code is implemented in memac_phy.c which gets compiled only for SoCs having FMANv3, so no extra compilation flag is required. Signed-off-by: Priyanka Jain priyanka.j...@freescale.com Change-Id: I1d2240fe424ecda55a9028190108a2677228ade5 Reviewed-on: http://git.am.freescale.net:8181/9839 Tested-by: Review Code-CDREVIEW cdrev...@freescale.com Reviewed-by: Yusong Sun york...@freescale.com --- drivers/net/fm/memac_phy.c | 12 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c index 140e59b..2f4bc11 100644 --- a/drivers/net/fm/memac_phy.c +++ b/drivers/net/fm/memac_phy.c @@ -133,5 +133,17 @@ int fm_memac_mdio_init(bd_t *bis, struct memac_mdio_info *info) bus-priv = info-regs; + /* +* On some platforms like B4860, default value of MDIO_CLK_DIV bits +* in mdio_stat(mdio_cfg) register generates MDIO clock too high +* (much higher than 2.5MHz), violating the IEEE specs. +* On other platforms like T1040, default value of MDIO_CLK_DIV bits +* is zero, so MDIO clock is disabled. +* So, for proper functioning of MDIO, MDIO_CLK_DIV bits needs to +* be properly initialized. +*/ + setbits_be32(((struct memac_mdio_controller *)info-regs)-mdio_stat, +MDIO_STAT_CLKDIV(258)); + return mdio_register(bus); } -- 1.7.4.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mmc: Handle switch error status bit in MMC card status
MMC switch command for unsupported feature (e.g. bus width) sets a switch error bit in card status. This bit should be checked, and, if it's set, no access with new controller settings should be performed. Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com --- drivers/mmc/mmc.c |4 +++- include/mmc.h |2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 8ab0bc9..16105bc 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -155,6 +155,8 @@ int mmc_send_status(struct mmc *mmc, int timeout) #endif return TIMEOUT; } + if (cmd.response[0] MMC_STATUS_SWITCH_ERROR) + return SWITCH_ERR; return 0; } @@ -505,7 +507,7 @@ static int mmc_change_freq(struct mmc *mmc) err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); if (err) - return err; + return ((err == SWITCH_ERR) ? 0 : err); /* Now check to see that it worked */ err = mmc_send_ext_csd(mmc, ext_csd); diff --git a/include/mmc.h b/include/mmc.h index e95a237..d5833f8 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -53,6 +53,7 @@ #define COMM_ERR -18 /* Communications Error */ #define TIMEOUT-19 #define IN_PROGRESS-20 /* operation is in progress */ +#define SWITCH_ERR -21 /* Card reports failure to switch mode */ #define MMC_CMD_GO_IDLE_STATE 0 #define MMC_CMD_SEND_OP_COND 1 @@ -108,6 +109,7 @@ #define SECURE_ERASE 0x8000 #define MMC_STATUS_MASK(~0x0206BF7F) +#define MMC_STATUS_SWITCH_ERROR(1 7) #define MMC_STATUS_RDY_FOR_DATA (1 8) #define MMC_STATUS_CURR_STATE (0xf 9) #define MMC_STATUS_ERROR (1 19) -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 0/17] Version 0 of Kconfig for U-Boot
Hi Wolfgang, On Mon, 24 Mar 2014 08:30:56 +0100 Wolfgang Denk w...@denx.de wrote: Dear Masahiro, In message 20140324145814.b35f.aa925...@jp.panasonic.com you wrote: You are suggesting a better idea below. We should not treat SPL as a special case. In my opinion, CONFIG_SPL_* should be discontinued. For example, we can merge CONFIG_SPL_TEXT_BASE to CONFIG_SYS_TEXT_BASE. Are you sure this is always possible? #ifdef CONFIG_SPL_BUILD # define CONFIG_SYS_TEXT_BASE0x #else # define CONFIG_SYS_TEXT_BASE0x1000 #endif rather than #define CONFIG_SPL_TEXT_BASE0x #define CONFIG_SYS_TEXT_BASE0x1000 Are there really no cases where for example the SPL needs to know CONFIG_SYS_TEXT_BASE, for example when loading U-Boot to RAM? I think that the normal U-Boot does not need to know about the SPL, but is this also always true the other way round? SPL should refer to load addr in the uImage header when loading U-Boot to RAM. So __if the code is written correctly__, CONFIG_SYS_TEXT_BASE should not be refered from another image. But I am not sure. There may be some exception. By the way, the rule of CONFIG_SYS_ is broken here too. We're using CONFIG_SPL_TEXT_BASE instead of CONFIG_SYS_SPL_TEXT_BASE inconsistently. I'm afraid inconsistent rules sometimes make the situation worse than nothing. Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mmc: fsl_esdhc: fix calculation of timeout for data transactions
Calculation of the timeout value should be based on actual clock value, written to controller registers. Since mmc-tran_speed is either the maximum allowed speed, or the preliminary value, that is be not yet set to registers, the actual timeout, taken by the controller, based on its clock settings, may be much longer than expected, based on mmc-tran_speed value. In particular it happens at early initialization stage, when typical value of mmc-tran_speed is 20MHz or 26MHz, while actual clock setting, configured in the controller, is 400kHz. It's more correct to use mmc-clock value for timeout calculation instead. Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com --- drivers/mmc/fsl_esdhc.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 7b146a3..f4d3132 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -221,16 +221,16 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) * 2)Timeout period should be minimum 0.250sec as per SD Card spec * So, Number of SD Clock cycles for 0.25sec should be minimum * (SD Clock/sec * 0.25 sec) SD Clock cycles -* = (mmc-tran_speed * 1/4) SD Clock cycles +* = (mmc-clock * 1/4) SD Clock cycles * As 1) = 2) -* = (2^(timeout+13)) = mmc-tran_speed * 1/4 +* = (2^(timeout+13)) = mmc-clock * 1/4 * Taking log2 both the sides -* = timeout + 13 = log2(mmc-tran_speed/4) +* = timeout + 13 = log2(mmc-clock/4) * Rounding up to next power of 2 -* = timeout + 13 = log2(mmc-tran_speed/4) + 1 -* = timeout + 13 = fls(mmc-tran_speed/4) +* = timeout + 13 = log2(mmc-clock/4) + 1 +* = timeout + 13 = fls(mmc-clock/4) */ - timeout = fls(mmc-tran_speed/4); + timeout = fls(mmc-clock/4); timeout -= 13; if (timeout 14) -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mmc: fsl_esdhc: add controller reset in case of data related errors too
The controller reset is performed now if command error occurs.
This commit adds the reset for the case of data related errors too.
Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com
---
drivers/mmc/fsl_esdhc.c | 63 +++
1 file changed, 36 insertions(+), 27 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index f4d3132..dfb1cc3 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -265,6 +265,7 @@ static void check_and_invalidate_dcache_range
static int
esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
{
+ int err = 0;
uintxfertyp;
uintirqstat;
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc-priv;
@@ -296,8 +297,6 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct
mmc_data *data)
/* Set up for a data transfer if we have one */
if (data) {
- int err;
-
err = esdhc_setup_data(mmc, data);
if(err)
return err;
@@ -325,27 +324,15 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
irqstat = esdhc_read32(regs-irqstat);
- /* Reset CMD and DATA portions on error */
- if (irqstat (CMD_ERR | IRQSTAT_CTOE)) {
- esdhc_write32(regs-sysctl, esdhc_read32(regs-sysctl) |
- SYSCTL_RSTC);
- while (esdhc_read32(regs-sysctl) SYSCTL_RSTC)
- ;
-
- if (data) {
- esdhc_write32(regs-sysctl,
- esdhc_read32(regs-sysctl) |
- SYSCTL_RSTD);
- while ((esdhc_read32(regs-sysctl) SYSCTL_RSTD))
- ;
- }
+ if (irqstat CMD_ERR) {
+ err = COMM_ERR;
+ goto out;
}
- if (irqstat CMD_ERR)
- return COMM_ERR;
-
- if (irqstat IRQSTAT_CTOE)
- return TIMEOUT;
+ if (irqstat IRQSTAT_CTOE) {
+ err = TIMEOUT;
+ goto out;
+ }
/* Workaround for ESDHC errata ENGcm03648 */
if (!data (cmd-resp_type MMC_RSP_BUSY)) {
@@ -360,7 +347,8 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct
mmc_data *data)
if (timeout = 0) {
printf(Timeout waiting for DAT0 to go high!\n);
- return TIMEOUT;
+ err = TIMEOUT;
+ goto out;
}
}
@@ -387,20 +375,41 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
do {
irqstat = esdhc_read32(regs-irqstat);
- if (irqstat IRQSTAT_DTOE)
- return TIMEOUT;
+ if (irqstat IRQSTAT_DTOE) {
+ err = TIMEOUT;
+ goto out;
+ }
- if (irqstat DATA_ERR)
- return COMM_ERR;
+ if (irqstat DATA_ERR) {
+ err = COMM_ERR;
+ goto out;
+ }
} while ((irqstat DATA_COMPLETE) != DATA_COMPLETE);
#endif
if (data-flags MMC_DATA_READ)
check_and_invalidate_dcache_range(cmd, data);
}
+out:
+ /* Reset CMD and DATA portions on error */
+ if (err) {
+ esdhc_write32(regs-sysctl, esdhc_read32(regs-sysctl) |
+ SYSCTL_RSTC);
+ while (esdhc_read32(regs-sysctl) SYSCTL_RSTC)
+ ;
+
+ if (data) {
+ esdhc_write32(regs-sysctl,
+ esdhc_read32(regs-sysctl) |
+ SYSCTL_RSTD);
+ while ((esdhc_read32(regs-sysctl) SYSCTL_RSTD))
+ ;
+ }
+ }
+
esdhc_write32(regs-irqstat, -1);
- return 0;
+ return err;
}
static void set_sysctl(struct mmc *mmc, uint clock)
--
1.7.10.4
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Re: [U-Boot] [linux-sunxi] [PATCH v2 0/9] sunxi: initial upstreamining effort
On Mon, 2014-03-24 at 01:14 +0100, Henrik Nordström wrote: fre 2014-03-21 klockan 21:54 + skrev Ian Campbell: I've tried to give corect credit and S-o-b based upon: git log --pretty='%aN' linux-sunxi/sunxi -- [PATHS] | sort -u git log linux-sunxi/sunxi -- [PATHS] | grep -i signed.off.by | sort -u Manual inspection As you noticed there is S-o-b lines missing on most of my commits in sunxi branch. This was corrected in the sunxi-patchqueue branch where previous patchset were prepared for mainlining. Please add an implicit S-o-b line on any arch/arm/cpu/armv7/sunxi/ or board/sunxi/ on patches including code I have committed. I will do. Thank you very much! Ian. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] kbuild: out-of-tree build issues
Hi Wolfgang,
I notice an issues with out of tree builds in current top of tree
code: make O=${SOMEDIR} distclean leaves files around:
- rm -fr ${SOMEDIR}
- mkdir -p ${SOMEDIR}
- make -s O=${SOMEDIR} TQM5200S_config
Configuring for TQM5200S - Board: TQM5200, Options:
TQM5200_B,TQM5200S
- make -s -j8 O=${SOMEDIR}
- find ${SOMEDIR} -type f | wc -l
858
- make O=${SOMEDIR} distclean
CLEAN u-boot.lds include/autoconf.mk include/autoconf.mk.dep
CLEAN u-boot.map u-boot.bin u-boot.srec u-boot System.map
CLEAN include/config include/generated
CLEAN include/config.h include/config.mk
- find ${SOMEDIR} -type f
/work/wd/tmp/examples/standalone/interrupt.bin
/work/wd/tmp/examples/standalone/interrupt
/work/wd/tmp/examples/standalone/sched
/work/wd/tmp/examples/standalone/interrupt.srec
/work/wd/tmp/examples/standalone/sched.srec
/work/wd/tmp/examples/standalone/hello_world.srec
/work/wd/tmp/examples/standalone/hello_world.bin
/work/wd/tmp/examples/standalone/hello_world
/work/wd/tmp/examples/standalone/sched.bin
/work/wd/tmp/scripts/basic/fixdep
/work/wd/tmp/tools/envcrc
/work/wd/tmp/tools/proftool
/work/wd/tmp/tools/mkenvimage
/work/wd/tmp/tools/mkimage
/work/wd/tmp/tools/dumpimage
/work/wd/tmp/tools/img2srec
/work/wd/tmp/tools/gen_eth_addr
/work/wd/tmp/Makefile
I think after a make O=${SOMEDIR} distclean the directory
${SOMEDIR} should be really empty (or actually get removed
completely).
It seems there are some bugs here.
I will fix it in a few days.
(Sorry, I am not feeling well today.
I've got to go home soon and take a rest.)
Another nice feature that got lost when converting to kbuild is that
we used to be able to run just make name as a shortcut for make
name_config ; make all - this does not work any more.
Or you can make name_config all.
Can you live with it?
I am not sure make name works along with Kconfig.
If it is mandatory, we need to do something with it.
Best Regards
Masahiro Yamada
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Re: [U-Boot] Query on u-boot
On Mon, Mar 24, 2014 at 9:31 AM, S Durga Prasad Paladugu durgaprasad.p...@gmail.com wrote: Hi, I have a below query on u-boot bootup. When UBOOT does not detect NOR flash during bootup it throws up an error message that indicates that uboot did not detect NOR flash and stops there. But when uboot does not detect QSPI flash it just gives a warning message that uboot sf_probe_failed, and comes to the uboot prompt. Why is this behavior different for NOR flash and QSPI flash. As per my understanding wrt code is concern. Yes - this can be an implementation logic where the SPI/QSPI flash code is more handy with the users while using spi/sf commands. Due to this we couldn't need/have any architecture initialization calls unlike with NAND/NOR - arch/arm/lib/board.c The initialization code that resides in arch' board file generally have safe monitored where something can't get at the time of board init phase, they might give an err/warn to exit. this is not the case in spi/qspi where most of the initialization is done through user interaction unlike in arch' board files. Did you see any special need/requirement to behave SPI/QSPI similar to NOR? thanks! -- Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] we don't went version control for .cmd files
Hi! .cmd files should not be version-controlled. Signed-off-by: Pavel Machek pa...@denx.de diff --git a/.gitignore b/.gitignore index a163728..77fb2c8 100644 --- a/.gitignore +++ b/.gitignore @@ -15,6 +15,7 @@ *.swp *.patch *.bin +*.cmd # Build tree /build-* Which files do you need this patch for? Could you give me an example, please? My build leaves files such as ./common/.fdt_support.o.cmd ./common/.console.o.cmd ./common/.main.o.cmd ./common/.cmd_load.o.cmd ./common/.flash.o.cmd ./common/.env_flags.o.cmd ./common/.cmd_source.o.cmd ./common/.built-in.o.cmd . Git usage would be slightly nicer if those were ignored. My u-boot is based on v2013.01.01... hmm. I expected Altera to have slightly newer version. That may explain stuff. Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] ARM: U-boot and 2 GiB of ram with get_ram_size only being long
Hey all, *ping* On 10/21/2013 09:44 PM, Wolfgang Denk wrote: Dear Scott Wood, In message 1382138723.7979.928.ca...@snotra.buserror.net you wrote: And the one 64-bit environment that we're about to have in U-Boot (armv8) has discontiguous memory, which is another case where get_ram_size() won't work. get_ram_size() is supposed to be run per memory bank. If you have discontiguous memory, then you probably have several memory banks that can be sized separately? BTW, shouldn't get_ram_size restore the original data in the final return (maxsize) case? I know, patches welcome. :-) Yes, get_ram_size() is non-destructive (at least in the no-error case; otherwise things like PRAM would not work). Is there anything else that needs to be cleaned up in the patch I submitted back then (other then re-basing it I suppose). With all the sunxi stuff slowly being cleaned up, this patch came to mind again and I was just wondering if anything needs to be done to get it merged. There was quite a big discussion about get_ram_size() in general, but nobody ever said if the signed long - unsigned long was a good fix. Olliver Best regards, Wolfgang Denk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request: u-boot-mmc 24032014
Hi Tom, The following changes since commit 2c072c958bb544c72f0e848375803dbd6971f022: sandbox: config: Enable cros_ec emulation and related items (2014-03-17 20:05:50 -0600) are available in the git repository at: git://git.denx.de/u-boot-mmc.git master for you to fetch changes up to eea4e6fe82fef9975e0153644935b89882890450: dfu: mmc: Replace calls to u-boot commands with native mmc API (2014-03-24 12:59:54 +0200) Pantelis Antoniou (3): mmc: Remove ops from struct mmc and put in mmc_ops mmc: Convert mmc struct's name array to a pointer mmc: Split mmc struct, rework mmc initialization (v2) Łukasz Majewski (1): dfu: mmc: Replace calls to u-boot commands with native mmc API arch/arm/include/asm/arch-davinci/sdmmc_defs.h | 1 + arch/arm/include/asm/arch-tegra/tegra_mmc.h| 4 common/cmd_mmc.c | 2 +- common/cmd_mmc_spi.c | 2 +- drivers/dfu/dfu_mmc.c | 31 --- drivers/mmc/arm_pl180_mmci.c | 50 +++--- drivers/mmc/arm_pl180_mmci.h | 4 drivers/mmc/bfin_sdh.c | 40 drivers/mmc/davinci_mmc.c | 41 ++--- drivers/mmc/dw_mmc.c | 58 +++--- drivers/mmc/fsl_esdhc.c| 65 + drivers/mmc/ftsdc010_mci.c | 63 --- drivers/mmc/gen_atmel_mci.c| 53 - drivers/mmc/mmc.c | 99 +-- drivers/mmc/mmc_spi.c | 50 +++--- drivers/mmc/mmc_write.c| 3 ++- drivers/mmc/mxcmmc.c | 45 + drivers/mmc/mxsmmc.c | 48 drivers/mmc/omap_hsmmc.c | 142 +++--- drivers/mmc/pxa_mmc_gen.c | 70 +++--- drivers/mmc/sdhci.c| 84 +++- drivers/mmc/sh_mmcif.c | 52 ++-- drivers/mmc/tegra_mmc.c| 53 + include/dwmmc.h| 2 ++ include/fsl_esdhc.h| 4 include/mmc.h | 48 ++-- include/sdhci.h| 2 ++ 27 files changed, 621 insertions(+), 495 deletions(-) Regards -- Pantelis ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] axs101 - increase EEPROM page write delay from 32 to 64 msec
With 32 milliseconds delay on some boards EEMPROM got written inconsistently. With 64 msec all of our existig boards show properly written EEPROM. Cc: Tom Rini tr...@ti.com Signed-off-by: Alexey Brodkin abrod...@synopsys.com --- include/configs/axs101.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/axs101.h b/include/configs/axs101.h index f6b569a..8d03110 100644 --- a/include/configs/axs101.h +++ b/include/configs/axs101.h @@ -103,7 +103,7 @@ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW1 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 32 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 64 /* * SD/MMC configuration -- 1.8.5.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/t4240: updated RCW and PBI for rev2.0
From: Shaohui Xie shaohui@freescale.com Also, remove workaround of rev1.0. Signed-off-by: Shaohui Xie shaohui@freescale.com --- board/freescale/t4qds/t4_pbi.cfg | 14 -- board/freescale/t4qds/t4_rcw.cfg | 4 ++-- 2 files changed, 2 insertions(+), 16 deletions(-) diff --git a/board/freescale/t4qds/t4_pbi.cfg b/board/freescale/t4qds/t4_pbi.cfg index c598fb5..6126266 100644 --- a/board/freescale/t4qds/t4_pbi.cfg +++ b/board/freescale/t4qds/t4_pbi.cfg @@ -13,20 +13,6 @@ 09000d00 09000d04 fff8 09000d08 8112 -#workaround for IFC bus speed -091241c0 f03f3f3f -091241c4 ff003f3f -09124010 0101 -09124130 000c -#workaround for SERDES A-006031 -090ea000 064740e6 -090ea020 064740e6 -090eb000 064740e6 -090eb020 064740e6 -090ec000 064740e6 -090ec020 064740e6 -090ed000 064740e6 -090ed020 064740e6 #Configure alternate space 0910 0914 ff00 diff --git a/board/freescale/t4qds/t4_rcw.cfg b/board/freescale/t4qds/t4_rcw.cfg index 74df01a..7334ca6 100644 --- a/board/freescale/t4qds/t4_rcw.cfg +++ b/board/freescale/t4qds/t4_rcw.cfg @@ -1,7 +1,7 @@ #PBL preamble and RCW header aa55aa55 010e0100 #serdes protocol 1_28_6_12 -120c0019 0c101915 +16070019 18101916 04383063 30548c00 6c02 1d00 eeee 000307fc - 0020 + 0028 -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6] nand/denali: Adding Denali NAND driver support
Hi Mashiro,
On Wed, 2014-03-19 at 20:26 +0900, Masahiro Yamada wrote:
Hi Chin,
--- /dev/null
+++ b/drivers/mtd/nand/denali.c
@@ -0,0 +1,1132 @@
+/*
+ * Copyright (C) 2013-2014 Altera Corporation www.altera.com
+ * Copyright (C) 2009-2010, Intel Corporation and its suppliers.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
If you don't mind, is it OK to add the creadit of Panasonic?
Going forward, Altera and Panasonic will share this driver
and I am contributing on code improvement and run test.
(I will post Panasonic boards support code after
this driver is merged.)
Sure, no problem.
Its open source and code belongs to everyone :)
+/* setups the HW to perform the data DMA */
+static void denali_setup_dma(int op)
+{
I sent a question to Cadence again and
finally received an answer I had wanted.
They said DMA command sequence depends on the bus width.
Panasonic bought 64bit bus version.
I guess Altera bought 32bit bus version.
So I'd like to suggest to use #ifdef CONFIG_NAND_DENALI_64BIT
here.
Yup, finally we know why.
Added in next patch.
+/*
+ * Although controller spec said SLC ECC is forceb to be 4bit, but denali
+ * controller in MRST only support 15bit and 8bit ECC correction
+ */
+#ifdef CONFIG_SYS_NAND_15BIT_HW_ECC_OOBFIRST
+#define ECC_15BITS 26
+static struct nand_ecclayout nand_15bit_oob = {
+ .eccbytes = ECC_15BITS,
+};
+#else
+#define ECC_8BITS 14
+static struct nand_ecclayout nand_8bit_oob = {
+ .eccbytes = ECC_8BITS,
+};
I think supporting only 15bit, 8bit is odd.
The number of ECC bits depends on the hardware.
(You can choose ECC bits you like when you buy the IP
from Cadence.)
I'd like to suggest to re-write this part in a generic way
by using the formula given in Denali's document.
if (ecc.size == 512)
ecc.bytes = Ceiling_to_next_word(ecc.strength * 13)
if (ecc.size == 1024)
ecc.bytes = Ceiling_to_next_word(ecc.strength * 14)
Sure, we can enhance this. The old code which mentioned MRST seems not
applicable any more. At least, this is true for both of us.
+ nand-ecc.mode = NAND_ECC_HW;
+ nand-ecc.size = CONFIG_NAND_DENALI_ECC_SIZE;
+ nand-ecc.read_oob = denali_read_oob;
+ nand-ecc.write_oob = denali_write_oob;
+ nand-ecc.read_page = denali_read_page;
+ nand-ecc.read_page_raw = denali_read_page_raw;
+ nand-ecc.write_page = denali_write_page;
+ nand-ecc.write_page_raw = denali_write_page_raw;
+#ifdef CONFIG_SYS_NAND_15BIT_HW_ECC_OOBFIRST
+ /* 15bit ECC */
+ nand-ecc.bytes = 26;
+ nand-ecc.layout = nand_15bit_oob;
+#else /* 8bit ECC */
+ nand-ecc.bytes = 14;
+ nand-ecc.layout = nand_8bit_oob;
+#endif
+ nand-ecc.calculate = denali_ecc_calculate;
+ nand-ecc.correct = denali_ecc_correct;
+ nand-ecc.hwctl = denali_ecc_hwctl;
denali_ecc_calculate(),
denali_ecc_correct(),
denali_ecc_hwctl()
are never called. Nor do we need to set stub functions.
Besides, ecc.strength must be set.
I guess ECC_CORRECTION register is already set correctly.
(In the case of SOCFPGA, it would be set to 8.)
So, ecc.strength should be set to the value of ECC_CORRECTION.
Yup, these can be removed.
It was added for SPL version but later I modified the SPL driver to use
the HW ECC correction.
+
+typedef int irqreturn_t;
+
+#define IRQ_HANDLED1
+#define IRQ_NONE 0
These typedef and macros are not used.
denali.h in Linux Kernel does not have them either.
Please delete.
+#define SUPPORT_15BITECC1
+#define SUPPORT_8BITECC 1
These are no longer necessary.
Noted. They are removed.
+#define DENALI_BUF_SIZE(NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE)
NAND_MAX_PAGESIZE and NAND_MAX_OOBSIZE are defined in
include/linux/mtd/nand.h
So, denali.h must include it.
Added in next patch.
Code diff is as follows:
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index fce1b62..8ba8f04 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -1,5 +1,6 @@
/*
- * Copyright (C) 2013-2014 Altera Corporation www.altera.com
+ * Copyright (C) 2014 Panasonic Corporation
+ * Copyright (C) 2013-2014 Altera Corporation www.altera.com
* Copyright (C) 2009-2010, Intel Corporation and its suppliers.
*
* SPDX-License-Identifier:GPL-2.0+
@@ -660,6 +661,21 @@ static void denali_setup_dma(int op)
flush_dcache_range(addr, addr + sizeof(denali.buf.dma_buf));
+#ifdef CONFIG_NAND_DENALI_64BIT
+ mode = MODE_10 | BANK(denali.flash_bank) | denali.page;
+
+ /* DMA is a three step process */
+
+ /* 1. setup transfer type, interrupt when complete,
+ burst len = 64 bytes, the number of pages */
+ index_addr(mode, 0x01002000 | (64 16) | op | page_count);
+
+
Re: [U-Boot] [PATCH v7] socfpga: Adding Scan Manager driver
Hi Michal, On Wed, 2014-03-12 at 15:54 +0100, Michal Simek wrote: On 03/12/2014 03:45 PM, Chin Liang See wrote: Hi guys, Any ACK or further comments? I still have a comment that you should at least rename your socfpga board name to something better because currently it is more suggesting that this is generic socfpga arch support not cyclone V soc dev kit. Actually socfpga board folder includes code to support both Cyclone V and Arria V soc dev kit. Thanks Chin Liang Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7] socfpga: Adding Scan Manager driver
Hi Michal,
On Wed, 2014-03-12 at 15:57 +0100, Michal Simek wrote:
On 03/05/2014 05:05 PM, Chin Liang See wrote:
Scan Manager driver will be called to configure the IOCSR
scan chain. This configuration will setup the IO buffer settings
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Dinh Nguyen dingu...@altera.com
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v7
- Enhance the function scan_chain_engine_is_idle
Changes for v6
- Fixed various coding style issue
Changes for v5
- Removal of additional blank line
- Added comment for magic number
Changes for v4
- avoid code duplication by add goto error
- include underscore to variables name
Changes for v3
- merge the handoff file and driver into single patch
Changes for v2
- rebase with latest v2014.01-rc1
---
arch/arm/cpu/armv7/socfpga/Makefile|2 +-
arch/arm/cpu/armv7/socfpga/scan_manager.c | 209 +++
arch/arm/cpu/armv7/socfpga/spl.c |4 +
arch/arm/include/asm/arch-socfpga/scan_manager.h | 90 +++
.../include/asm/arch-socfpga/socfpga_base_addrs.h |1 +
board/altera/socfpga/iocsr_config.c| 657
board/altera/socfpga/iocsr_config.h| 17 +
include/configs/socfpga_cyclone5.h |1 +
8 files changed, 980 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/cpu/armv7/socfpga/scan_manager.c
create mode 100644 arch/arm/include/asm/arch-socfpga/scan_manager.h
create mode 100644 board/altera/socfpga/iocsr_config.c
create mode 100644 board/altera/socfpga/iocsr_config.h
+ /*
+* Program the last part of IO scan chain write TDI_TDO packet
+* header (2 bytes) to scan manager
+*/
+ writel(tdi_tdo_header, scan_manager_base-fifo_double_byte);
+
+ for (i = 0; i io_program_iter; i++) {
+ /*
+* write remaining scan chain data into scan
+* manager WFIFO with 4 bytes write
+ */
Wrong indentation here.
Just a small cosmetic error. I would just leave it as of now.
+ writel(iocsr_scan_chain[index + i],
+ scan_manager_base-fifo_quad_byte);
+ }
+
+ index += io_program_iter;
+ residual = io_scan_chain_data_residual
+ IO_SCAN_CHAIN_32BIT_MASK;
+
+ if (IO_SCAN_CHAIN_PAYLOAD_24BIT residual) {
+ /*
+* write the last 4B scan chain data
+* into scan manager WFIFO
+*/
+ writel(iocsr_scan_chain[index],
+ scan_manager_base-fifo_quad_byte);
+ } else {
+ /*
+* write the remaining 1 - 3 bytes scan chain
+* data into scan manager WFIFO byte by byte
+* to prevent JTAG engine shifting unused data
+* from the FIFO and mistaken the data as a
+* valid command (even though unused bits are
+* set to 0, but just to prevent hardware
+* glitch)
+*/
+ for (i = 0; i residual; i += 8) {
+ writel(((iocsr_scan_chain[index] i)
+IO_SCAN_CHAIN_BYTE_MASK),
+ scan_manager_base-fifo_single_byte);
+ }
+ }
+
+ /*
+* Check if the scan chain engine has completed the
+* IO scan chain data shifting
+*/
+ if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY))
+ goto error;
+ }
+
+ /* Disable IO Scan chain when configuration done*/
space*/ here.
same as above.
Thanks
Chin Liang
Thanks,
Michal
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[U-Boot] [PATCH 0/6] Adjust command macros to allow smaller U-Boot size
A large chunk of U-Boot's executable size is the code to process and execute commands. This is reasonable, since commands and scripts are an important part of U-Boot's feature set and provide much of its flexibility. However, for some applications only a very limited set of commands is required. Where image size is important, it is desirable to be able to easily remove unwanted code. This series introduces a new board_run_command() function which can be used to run a small subset of commands as required by the board (typically load and bootm), thus allowing the rest of the commands to be automatically and reliably dropped from the image using toolchain dead code elimination. Tests on snow (ARMv7) show this reduces image size dramatically, more than just undefining all the commands: textdata bss dec hex filename before: 356359 12550 300056 668965 a3525 b/snow/u-boot with all commands undefined: 15533654028624 169362 29592 b/snow/u-boot with this series: 12317729581544 127679 1f2bf b/snow/u-boot The difference is more pronounced the more effort is put into reducing the image size. For example, removing additional subsystem options yields: textdata bss dec hex filename with all commands undefined and most subsystems: 8647941867480 98145 17f61 b/snow/u-boot with this series: 523951818 228 54441d4a9 b/snow/u-boot Further, it is possible to enable some of the split-use options like CONFIG_CMD_USB, and get USB support without the unwanted command overhead (it would be better if USB had a separate option for the command and the USB stack, but that is not the case, and a few other features have a similar problem). U-Boot can then become a really minimal boot loader, with only the required functions available. Simply undefining various unwanted commands in the board config is not as effective, and is much more time-consuming to figure out. Apart from the cost of the parsing code, the commands necessarily provide a lot options and features which are not required by many boards. In particular, with this series, it is possible to run a minimal U-Boot within the SRAM of a modern SoC, providing the benefits of the full U-Boot environment with the small size of SPL. This helps to bridge the gap somewhat. A key difference between U-Boot and SPL is the inclusion of the command parser, and this small size of SPL is a key reason why some boards currently use 'falcon mode', where only SPL is used to boot a kernel. This series has a fairly small impact on the source code, changing command.h and a fairly small change to each list of subcommands (there are about 19 such sites in U-Boot). Note: some effort was expended in trying to obtain the same result with just linker code elimination. However this did not work, since the linker would not eliminate some transitively-called functions like do_fdt() even when callers are removed. Simon Glass (6): Add an info word to commands Refactor command macros so they can compile to nothing Add CONFIG_CMDLINE to allow removal of all commands main: Exclude getline code when CONFIG_CMDLINE is not defined main: Process FDT options even without CONFIG_BOOTDELAY sandbox: Add board_run_command() function README | 8 +++ arch/x86/cpu/u-boot.lds| 4 ++ board/inka4x0/inkadiag.c | 12 ++-- board/intercontrol/digsy_mtc/cmd_mtc.c | 20 +++ board/sandbox/sandbox/sandbox.c| 10 common/cmd_bmp.c | 8 +-- common/cmd_bootm.c | 39 - common/cmd_bootstage.c | 10 ++-- common/cmd_cbfs.c | 3 +- common/cmd_clk.c | 6 +- common/cmd_demo.c | 10 ++-- common/cmd_help.c | 4 ++ common/cmd_i2c.c | 34 +-- common/cmd_nvedit.c| 42 +++--- common/cmd_onenand.c | 23 common/cmd_pxe.c | 6 +- common/cmd_sandbox.c | 14 ++--- common/cmd_sound.c | 8 +-- common/cmd_spl.c | 14 ++--- common/cmd_tpm.c | 52 - common/command.c | 12 +++- common/main.c | 101 ++-- drivers/gpio/pca953x.c | 14 ++--- drivers/gpio/tca642x.c | 14 ++--- drivers/misc/ds4510.c | 24 include/command.h | 102 - include/config_defaults.h | 2 + include/config_fallbacks.h | 7 +++ test/dm/cmd_dm.c | 10 ++-- 29 files changed, 392 insertions(+), 221 deletions(-) -- 1.9.1.423.g4596e3a ___
[U-Boot] [PATCH 6/6] sandbox: Add board_run_command() function
Add a simple board_run_command() function for sandbox. It does nothing
except print the command that would be executed. This can be extended
to perform actual tasks.
Signed-off-by: Simon Glass s...@chromium.org
---
board/sandbox/sandbox/sandbox.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/board/sandbox/sandbox/sandbox.c b/board/sandbox/sandbox/sandbox.c
index e4d4e02..71ccab3 100644
--- a/board/sandbox/sandbox/sandbox.c
+++ b/board/sandbox/sandbox/sandbox.c
@@ -78,6 +78,16 @@ int board_late_init(void)
panic(Cannot init cros-ec device);
return -1;
}
+
+ return 0;
+}
+#endif
+
+#ifndef CONFIG_CMDLINE
+int board_run_command(const char *cmd)
+{
+ printf(Run command: %s\n, cmd);
+
return 0;
}
#endif
--
1.9.1.423.g4596e3a
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[U-Boot] [PATCH 3/6] Add CONFIG_CMDLINE to allow removal of all commands
A large chunk of the U-Boot code is the command line. For some applications
this is not needed, since the boot can be controlled by a board-specific
hard-coded boot procedure. This saves a significant amount of space.
This makes U-Boot proper look a little more like SPL in terms of size.
Signed-off-by: Simon Glass s...@chromium.org
---
README | 8
arch/x86/cpu/u-boot.lds| 4
common/cmd_cbfs.c | 3 ++-
common/cmd_help.c | 4
common/command.c | 2 ++
common/main.c | 6 ++
include/command.h | 30 ++
include/config_defaults.h | 2 ++
include/config_fallbacks.h | 7 +++
9 files changed, 65 insertions(+), 1 deletion(-)
diff --git a/README b/README
index 216f0c7..28c79fb 100644
--- a/README
+++ b/README
@@ -1035,6 +1035,14 @@ The following options need to be configured:
XXX - this list needs to get updated!
+- Removal of commands
+ If no commands are needed to boot, you can undefine
+ CONFIG_CMDLINE in your board config file to remove them.
+ In this case, the command line will not be available, and
+ when U-Boot wants to execute the boot command (on start-up)
+ it will call board_run_command() instead. This can reduce
+ image size significantly for very simple boot procedures.
+
- Regular expression support:
CONFIG_REGEX
If this variable is defined, U-Boot is linked against
diff --git a/arch/x86/cpu/u-boot.lds b/arch/x86/cpu/u-boot.lds
index f48bff5..9720286 100644
--- a/arch/x86/cpu/u-boot.lds
+++ b/arch/x86/cpu/u-boot.lds
@@ -12,6 +12,10 @@ ENTRY(_start)
SECTIONS
{
+#ifndef CONFIG_CMDLINE
+ /DISCARD/ : { *(.u_boot_list_2_cmd_*) }
+#endif
+
. = CONFIG_SYS_TEXT_BASE; /* Location of bootcode in flash */
__text_start = .;
.text : { *(.text*); }
diff --git a/common/cmd_cbfs.c b/common/cmd_cbfs.c
index 35d8a7a..5f1add8 100644
--- a/common/cmd_cbfs.c
+++ b/common/cmd_cbfs.c
@@ -44,7 +44,8 @@ U_BOOT_CMD(
CBFS is in. It defaults to 0x\n
);
-int do_cbfs_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_cbfs_fsload(cmd_tbl_t *cmdtp, int flag, int argc,
+ char *const argv[])
{
const struct cbfs_cachenode *file;
unsigned long offset;
diff --git a/common/cmd_help.c b/common/cmd_help.c
index 6ff494d..701ae7e 100644
--- a/common/cmd_help.c
+++ b/common/cmd_help.c
@@ -10,9 +10,13 @@
static int do_help(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
+#ifdef CONFIG_CMDLINE
cmd_tbl_t *start = ll_entry_start(cmd_tbl_t, cmd);
const int len = ll_entry_count(cmd_tbl_t, cmd);
return _do_help(start, len, cmdtp, flag, argc, argv);
+#else
+ return 0;
+#endif
}
U_BOOT_CMD(
diff --git a/common/command.c b/common/command.c
index 35c9d71..180ce27 100644
--- a/common/command.c
+++ b/common/command.c
@@ -87,6 +87,7 @@ int _do_help (cmd_tbl_t *cmd_start, int cmd_items, cmd_tbl_t
* cmdtp, int
*/
cmd_tbl_t *find_cmd_tbl (const char *cmd, cmd_tbl_t *table, int table_len)
{
+#ifdef CONFIG_CMDLINE
cmd_tbl_t *cmdtp;
cmd_tbl_t *cmdtp_temp = table; /*Init value */
const char *p;
@@ -115,6 +116,7 @@ cmd_tbl_t *find_cmd_tbl (const char *cmd, cmd_tbl_t *table,
int table_len)
if (n_found == 1) { /* exactly one match */
return cmdtp_temp;
}
+#endif /* CONFIG_CMDLINE */
return NULL;/* not found or ambiguous command */
}
diff --git a/common/main.c b/common/main.c
index 8b6f274..cb021d3 100644
--- a/common/main.c
+++ b/common/main.c
@@ -270,7 +270,9 @@ static int abortboot(int bootdelay)
#if defined(CONFIG_BOOTDELAY) defined(CONFIG_OF_CONTROL)
static void secure_boot_cmd(char *cmd)
{
+#ifdef CONFIG_CMDLINE
cmd_tbl_t *cmdtp;
+#endif
int rc;
if (!cmd) {
@@ -282,6 +284,7 @@ static void secure_boot_cmd(char *cmd)
disable_ctrlc(1);
/* Find the command directly. */
+#ifdef CONFIG_CMDLINE
cmdtp = find_cmd(cmd);
if (!cmdtp) {
printf(## Error: \%s\ not defined\n, cmd);
@@ -290,6 +293,9 @@ static void secure_boot_cmd(char *cmd)
/* Run the command, forcing no flags and faking argc and argv. */
rc = (cmdtp-cmd)(cmdtp, 0, 1, cmd);
+#else
+ rc = board_run_command(cmd);
+#endif
/* Shouldn't ever return from boot command. */
printf(## Error: \%s\ returned (code %d)\n, cmd, rc);
diff --git a/include/command.h b/include/command.h
index 1a3871f..9f507d9 100644
--- a/include/command.h
+++ b/include/command.h
@@ -184,6 +184,7 @@ int cmd_process(int flag, int argc, char * const argv[],
*
* We need to ensure that a command is placed between each entry
*/
+#ifdef CONFIG_CMDLINE
#define
[U-Boot] [PATCH 4/6] main: Exclude getline code when CONFIG_CMDLINE is not defined
It would be better to split common/main.c into a few chunks: readline, the
standard parser and the real main. However such a change is fairly invasive.
For now, use #ifdef to remove the unwanted code.
This helps to reduce the image size by removing unwanted code.
Signed-off-by: Simon Glass s...@chromium.org
---
common/command.c | 7 +++
common/main.c| 26 --
2 files changed, 27 insertions(+), 6 deletions(-)
diff --git a/common/command.c b/common/command.c
index 180ce27..dd09d08 100644
--- a/common/command.c
+++ b/common/command.c
@@ -481,6 +481,7 @@ void fixup_cmdtable(cmd_tbl_t *cmdtp, int size)
}
#endif
+#ifdef CONFIG_CMDLINE
/**
* Call a command function. This should be the only route in U-Boot to call
* a command, so that we can track whether we are waiting for input or
@@ -501,11 +502,14 @@ static int cmd_call(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
debug(Command failed, result=%d, result);
return result;
}
+#endif /* CONFIG_CMDLINE */
enum command_ret_t cmd_process(int flag, int argc, char * const argv[],
int *repeatable, ulong *ticks)
{
enum command_ret_t rc = CMD_RET_SUCCESS;
+
+#ifdef CONFIG_CMDLINE
cmd_tbl_t *cmdtp;
/* Look up command in command table */
@@ -543,6 +547,9 @@ enum command_ret_t cmd_process(int flag, int argc, char *
const argv[],
}
if (rc == CMD_RET_USAGE)
rc = cmd_usage(cmdtp);
+#else
+ rc = board_run_command(argv[0]);
+#endif
return rc;
}
diff --git a/common/main.c b/common/main.c
index cb021d3..2fdea01 100644
--- a/common/main.c
+++ b/common/main.c
@@ -45,7 +45,9 @@ void show_boot_progress (int val) __attribute__((weak,
alias(__show_boot_progre
charconsole_buffer[CONFIG_SYS_CBSIZE + 1]; /* console I/O buffer
*/
+#ifdef CONFIG_CMDLINE
static char * delete_char (char *buffer, char *p, int *colp, int *np, int
plen);
+#endif
static const char erase_seq[] = \b \b; /* erase sequence
*/
static const char tab_seq[] = ;/* used to expand TABs
*/
@@ -421,7 +423,7 @@ static void process_boot_delay(void)
void main_loop(void)
{
-#ifndef CONFIG_SYS_HUSH_PARSER
+#if defined(CONFIG_CMDLINE) !defined(CONFIG_SYS_HUSH_PARSER)
static char lastcommand[CONFIG_SYS_CBSIZE] = { 0, };
int len;
int rc = 1;
@@ -464,8 +466,9 @@ void main_loop(void)
# ifdef CONFIG_AUTOBOOT_KEYED
int prev = disable_ctrlc(1);/* disable Control C checking */
# endif
-
+#ifdef CONFIG_CMDLINE
run_command_list(p, -1, 0);
+#endif
# ifdef CONFIG_AUTOBOOT_KEYED
disable_ctrlc(prev);/* restore Control C checking */
@@ -483,6 +486,7 @@ void main_loop(void)
/*
* Main Loop for Monitor Command Processing
*/
+#ifdef CONFIG_CMDLINE
#ifdef CONFIG_SYS_HUSH_PARSER
parse_file_outer();
/* This point is never reached */
@@ -528,7 +532,8 @@ void main_loop(void)
lastcommand[0] = 0;
}
}
-#endif /*CONFIG_SYS_HUSH_PARSER*/
+#endif /* CONFIG_SYS_HUSH_PARSER */
+#endif /* CONFIG_CMDLINE */
}
#ifdef CONFIG_BOOT_RETRY_TIME
@@ -983,6 +988,7 @@ static int cread_line(const char *const prompt, char *buf,
unsigned int *len,
//
+#ifdef CONFIG_CMDLINE
/*
* Prompt for input and read a line.
* If CONFIG_BOOT_RETRY_TIME is defined and retry_time = 0,
@@ -1211,10 +1217,10 @@ int parse_line (char *line, char *argv[])
debug_parser(parse_line: nargs=%d\n, nargs);
return (nargs);
}
-
+#endif /* CONFIG_CMDLINE */
//
-#ifndef CONFIG_SYS_HUSH_PARSER
+#if !defined(CONFIG_SYS_HUSH_PARSER) defined(CONFIG_CMDLINE)
static void process_macros (const char *input, char *output)
{
char c, prev;
@@ -1433,6 +1439,7 @@ static int builtin_run_command(const char *cmd, int flag)
*/
int run_command(const char *cmd, int flag)
{
+#ifdef CONFIG_CMDLINE
#ifndef CONFIG_SYS_HUSH_PARSER
/*
* builtin_run_command can return 0 or 1 for success, so clean up
@@ -1446,9 +1453,12 @@ int run_command(const char *cmd, int flag)
return parse_string_outer(cmd,
FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP);
#endif
+#else
+ return board_run_command(cmd);
+#endif
}
-#ifndef CONFIG_SYS_HUSH_PARSER
+#if !defined(CONFIG_SYS_HUSH_PARSER) defined(CONFIG_CMDLINE)
/**
* Execute a list of command separated by ; or \n using the built-in parser.
*
@@ -1493,6 +1503,7 @@ static int builtin_run_command_list(char *cmd, int flag)
int run_command_list(const char *cmd, int len, int flag)
{
+#ifdef CONFIG_CMDLINE
int need_buff = 1;
char *buff = (char *)cmd; /* cast away const */
int
[U-Boot] [PATCH 5/6] main: Process FDT options even without CONFIG_BOOTDELAY
At present when this option is not defined, we do not process the FDT
options - for example we do not run the boot command specified by the FDT.
Move this code into the common function and make sure it is always called
when CONFIG_OF_CONTROL is defined.
Signed-off-by: Simon Glass s...@chromium.org
---
common/main.c | 69 ++-
1 file changed, 45 insertions(+), 24 deletions(-)
diff --git a/common/main.c b/common/main.c
index 2fdea01..0a65593 100644
--- a/common/main.c
+++ b/common/main.c
@@ -269,7 +269,7 @@ static int abortboot(int bootdelay)
* printing the error message to console.
*/
-#if defined(CONFIG_BOOTDELAY) defined(CONFIG_OF_CONTROL)
+#if defined(CONFIG_OF_CONTROL)
static void secure_boot_cmd(char *cmd)
{
#ifdef CONFIG_CMDLINE
@@ -309,29 +309,54 @@ err:
*/
hang();
}
+#endif /* CONFIG_OF_CONTROL */
-static void process_fdt_options(const void *blob)
+/**
+ * Process options contained in the device tree
+ *
+ * This handles various features provided by the device tree, which can
+ * affect environment variables or operation on start-up.
+ *
+ * @param blob Device tree to process
+ * @param cmdp Returns the boot command obtained from the FDT
+ */
+static void process_fdt_options(const void *blob, char **cmdp)
{
+#ifdef CONFIG_OF_CONTROL
ulong addr;
+ char *s = *cmdp, *env;
+
+ /* Allow the fdt to override the boot command */
+ env = fdtdec_get_config_string(blob, bootcmd);
+ if (env)
+ s = env;
/* Add an env variable to point to a kernel payload, if available */
- addr = fdtdec_get_config_int(gd-fdt_blob, kernel-offset, 0);
+ addr = fdtdec_get_config_int(blob, kernel-offset, 0);
if (addr)
setenv_addr(kernaddr, (void *)(CONFIG_SYS_TEXT_BASE + addr));
/* Add an env variable to point to a root disk, if available */
- addr = fdtdec_get_config_int(gd-fdt_blob, rootdisk-offset, 0);
+ addr = fdtdec_get_config_int(blob, rootdisk-offset, 0);
if (addr)
setenv_addr(rootaddr, (void *)(CONFIG_SYS_TEXT_BASE + addr));
-}
+
+ /*
+* If the bootsecure option was chosen, use secure_boot_cmd().
+* Always use 'env' in this case, since bootsecure requres that the
+* bootcmd was specified in the FDT too.
+*/
+ if (fdtdec_get_config_int(blob, bootsecure, 0)) {
+ secure_boot_cmd(s);
+ panic(Secure boot command returned);
+ }
+ *cmdp = s;
#endif /* CONFIG_OF_CONTROL */
+}
#ifdef CONFIG_BOOTDELAY
static void process_boot_delay(void)
{
-#ifdef CONFIG_OF_CONTROL
- char *env;
-#endif
char *s;
int bootdelay;
#ifdef CONFIG_BOOTCOUNT_LIMIT
@@ -379,23 +404,8 @@ static void process_boot_delay(void)
else
#endif /* CONFIG_BOOTCOUNT_LIMIT */
s = getenv (bootcmd);
-#ifdef CONFIG_OF_CONTROL
- /* Allow the fdt to override the boot command */
- env = fdtdec_get_config_string(gd-fdt_blob, bootcmd);
- if (env)
- s = env;
- process_fdt_options(gd-fdt_blob);
-
- /*
-* If the bootsecure option was chosen, use secure_boot_cmd().
-* Always use 'env' in this case, since bootsecure requres that the
-* bootcmd was specified in the FDT too.
-*/
- if (fdtdec_get_config_int(gd-fdt_blob, bootsecure, 0))
- secure_boot_cmd(env);
-
-#endif /* CONFIG_OF_CONTROL */
+ process_fdt_options(gd-fdt_blob, s);
debug (### main_loop: bootcmd=\%s\\n, s ? s : UNDEFINED);
@@ -482,6 +492,17 @@ void main_loop(void)
#ifdef CONFIG_BOOTDELAY
process_boot_delay();
+#else
+ char *s = NULL;
+
+ process_fdt_options(gd-fdt_blob, s);
+ if (s) {
+# ifdef CONFIG_CMDLINE
+ run_command_list(s, -1, 0);
+# else
+ board_run_command(s);
+# endif
+ }
#endif
/*
* Main Loop for Monitor Command Processing
--
1.9.1.423.g4596e3a
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/6] Refactor command macros so they can compile to nothing
Commands are declared entirely within a macro, like this:
U_BOOT_CMD(...);
Sub-commands are not the same. At present the U_BOOT_CMD_MKENT() macro is
used within an array declaration, but the array itself is not handled by
macros. We have this:
static cmd_tbl_t table[] = {
U_BOOT_CMD_MKENT(...),
U_BOOT_CMD_MKENT(...),
};
There are two problems with this. The first is that it requires knowledge
of the command type (a minor issue). The second is that it is not possible
to make sub-commands compile to nothing if we want to.
Introduce a new syntax which matches U_BOOT_CMD() as follows:
U_BOOT_SUBCMD_START
U_BOOT_CMD_MKENT(...)
U_BOOT_CMD_MKENT(...)
U_BOOT_SUBCMD_END
Note that the U_BOOT_CMD_MKENT() lines no longer have a comma at the end.
It would be possible to put a semicolon after U_BOOT_SUBCMD_END, but it
seems syntactically odd to do so.
Signed-off-by: Simon Glass s...@chromium.org
---
board/inka4x0/inkadiag.c | 12
board/intercontrol/digsy_mtc/cmd_mtc.c | 20 ++---
common/cmd_bmp.c | 8 +++---
common/cmd_bootm.c | 22 +++---
common/cmd_bootstage.c | 10 +++
common/cmd_clk.c | 6 ++--
common/cmd_demo.c | 10 +++
common/cmd_i2c.c | 34 +++---
common/cmd_nvedit.c| 32 ++---
common/cmd_onenand.c | 23 ---
common/cmd_pxe.c | 6 ++--
common/cmd_sandbox.c | 14 -
common/cmd_sound.c | 8 +++---
common/cmd_spl.c | 14 -
common/cmd_tpm.c | 52 +-
drivers/gpio/pca953x.c | 14 -
drivers/gpio/tca642x.c | 14 -
drivers/misc/ds4510.c | 24
include/command.h | 37 +++-
test/dm/cmd_dm.c | 10 +++
20 files changed, 197 insertions(+), 173 deletions(-)
diff --git a/board/inka4x0/inkadiag.c b/board/inka4x0/inkadiag.c
index 0bd12ec..56978b4 100644
--- a/board/inka4x0/inkadiag.c
+++ b/board/inka4x0/inkadiag.c
@@ -416,17 +416,17 @@ static int do_inkadiag_buzzer(cmd_tbl_t *cmdtp, int flag,
int argc,
static int do_inkadiag_help(cmd_tbl_t *cmdtp, int flag, int argc, char * const
argv[]);
-cmd_tbl_t cmd_inkadiag_sub[] = {
+U_BOOT_SUBCMD_START(cmd_inkadiag_sub)
U_BOOT_CMD_MKENT(io, 1, 1, do_inkadiag_io, read digital input,
-drawer1|drawer2|other [value] - get or set specified signal),
+drawer1|drawer2|other [value] - get or set specified signal)
U_BOOT_CMD_MKENT(serial, 4, 1, do_inkadiag_serial, test serial port,
num mode baudrate msg - test uart num [0..11] in mode\n
-and baudrate with msg),
+and baudrate with msg)
U_BOOT_CMD_MKENT(buzzer, 2, 1, do_inkadiag_buzzer, activate buzzer,
-period freq - turn buzzer on for period ms with freq hz),
+period freq - turn buzzer on for period ms with freq hz)
U_BOOT_CMD_MKENT(help, 4, 1, do_inkadiag_help, get help,
-[command] - get help for command),
-};
+[command] - get help for command)
+U_BOOT_SUBCMD_END
static int do_inkadiag_help(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[]) {
diff --git a/board/intercontrol/digsy_mtc/cmd_mtc.c
b/board/intercontrol/digsy_mtc/cmd_mtc.c
index f17ec55..1138a7a 100644
--- a/board/intercontrol/digsy_mtc/cmd_mtc.c
+++ b/board/intercontrol/digsy_mtc/cmd_mtc.c
@@ -292,32 +292,32 @@ static int do_mtc_state(cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv[
static int do_mtc_help(cmd_tbl_t *cmdtp, int flag, int argc, char * const
argv[]);
-cmd_tbl_t cmd_mtc_sub[] = {
+U_BOOT_SUBCMD_START(cmd_mtc_sub)
U_BOOT_CMD_MKENT(led, 3, 1, do_mtc_led,
set state of leds,
[ledname] [state] [blink]\n
- lednames: diag can1 can2 can3 can4 usbpwr usbbusy user1 user2\n
- state: off red green orange\n
-- blink: blink interval in 100ms steps (1 - 10; 0 = static)\n),
+- blink: blink interval in 100ms steps (1 - 10; 0 = static)\n)
U_BOOT_CMD_MKENT(key, 0, 1, do_mtc_key,
- returns state of user key, ),
+ returns state of user key, )
U_BOOT_CMD_MKENT(version, 0, 1, do_mtc_version,
- returns firmware version of supervisor uC, ),
+ returns firmware version of supervisor uC, )
U_BOOT_CMD_MKENT(appreg, 1, 1, do_mtc_appreg,
reads or writes appreg value and stores in environment
variable 'appreg',
- [value] - value (1 - 255) to write to appreg),
+ [value] - value (1 - 255) to write to appreg)
U_BOOT_CMD_MKENT(digin, 1, 1, do_mtc_digin,
returns state of digital input,
- channel_num - get
[U-Boot] [PATCH 1/6] Add an info word to commands
In cmd_bootm.c the function pointer is misused as a flags word. It is better
to add a flag word to each command, so that bootm can avoid this hack.
To avoid increasing the size of the U-Boot binary, we can re-use the existing
'repeatable' flag, which only needs a single bit.
Signed-off-by: Simon Glass s...@chromium.org
---
common/cmd_bootm.c | 35 ++-
common/cmd_nvedit.c | 10 +-
common/command.c| 3 ++-
include/command.h | 41 +++--
4 files changed, 60 insertions(+), 29 deletions(-)
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 9751edc..14d504b 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -522,19 +522,28 @@ static int do_bootm_standalone(int flag, int argc, char *
const argv[],
/* we overload the cmd field with our state machine info instead of a
* function pointer */
static cmd_tbl_t cmd_bootm_sub[] = {
- U_BOOT_CMD_MKENT(start, 0, 1, (void *)BOOTM_STATE_START, , ),
- U_BOOT_CMD_MKENT(loados, 0, 1, (void *)BOOTM_STATE_LOADOS, , ),
+ U_BOOT_CMD_MKENT_COMPLETE(start, 0, 1, cmd_dummy, , , NULL,
+ BOOTM_STATE_START),
+ U_BOOT_CMD_MKENT_COMPLETE(loados, 0, 1, cmd_dummy, , , NULL,
+ BOOTM_STATE_LOADOS),
#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
- U_BOOT_CMD_MKENT(ramdisk, 0, 1, (void *)BOOTM_STATE_RAMDISK, , ),
+ U_BOOT_CMD_MKENT_COMPLETE(ramdisk, 0, 1, cmd_dummy, , , NULL,
+ BOOTM_STATE_RAMDISK),
#endif
#ifdef CONFIG_OF_LIBFDT
- U_BOOT_CMD_MKENT(fdt, 0, 1, (void *)BOOTM_STATE_FDT, , ),
-#endif
- U_BOOT_CMD_MKENT(cmdline, 0, 1, (void *)BOOTM_STATE_OS_CMDLINE, , ),
- U_BOOT_CMD_MKENT(bdt, 0, 1, (void *)BOOTM_STATE_OS_BD_T, , ),
- U_BOOT_CMD_MKENT(prep, 0, 1, (void *)BOOTM_STATE_OS_PREP, , ),
- U_BOOT_CMD_MKENT(fake, 0, 1, (void *)BOOTM_STATE_OS_FAKE_GO, , ),
- U_BOOT_CMD_MKENT(go, 0, 1, (void *)BOOTM_STATE_OS_GO, , ),
+ U_BOOT_CMD_MKENT_COMPLETE(fdt, 0, 1, cmd_dummy, , , NULL,
+ BOOTM_STATE_FDT),
+#endif
+ U_BOOT_CMD_MKENT_COMPLETE(cmdline, 0, 1, cmd_dummy, , , NULL,
+ BOOTM_STATE_OS_CMDLINE),
+ U_BOOT_CMD_MKENT_COMPLETE(bdt, 0, 1, cmd_dummy, , , NULL,
+ BOOTM_STATE_OS_BD_T),
+ U_BOOT_CMD_MKENT_COMPLETE(prep, 0, 1, cmd_dummy, , , NULL,
+ BOOTM_STATE_OS_PREP),
+ U_BOOT_CMD_MKENT_COMPLETE(fake, 0, 1, cmd_dummy, , , NULL,
+ BOOTM_STATE_OS_FAKE_GO),
+ U_BOOT_CMD_MKENT_COMPLETE(go, 0, 1, cmd_dummy, , , NULL,
+ BOOTM_STATE_OS_GO),
};
static int boot_selected_os(int argc, char * const argv[], int state,
@@ -752,9 +761,7 @@ static int do_bootm_subcommand(cmd_tbl_t *cmdtp, int flag,
int argc,
argc--; argv++;
if (c) {
- state = (long)c-cmd;
- if (state == BOOTM_STATE_START)
- state |= BOOTM_STATE_FINDOS | BOOTM_STATE_FINDOTHER;
+ state = cmd_get_info(c);
} else {
/* Unrecognized command */
return CMD_RET_USAGE;
@@ -765,6 +772,8 @@ static int do_bootm_subcommand(cmd_tbl_t *cmdtp, int flag,
int argc,
return CMD_RET_USAGE;
}
+ if (state == BOOTM_STATE_START)
+ state |= BOOTM_STATE_FINDOS | BOOTM_STATE_FINDOTHER;
ret = do_bootm_states(cmdtp, flag, argc, argv, state, images, 0);
return ret;
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index c53601c..a09263c 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -1201,7 +1201,7 @@ U_BOOT_CMD_COMPLETE(
edit environment variable,
name\n
- edit environment variable 'name',
- var_complete
+ var_complete, 0
);
#endif
@@ -1211,7 +1211,7 @@ U_BOOT_CMD_COMPLETE(
[-a]\n- print [all] values of all environment variables\n
printenv name ...\n
- print value of environment variable 'name',
- var_complete
+ var_complete, 0
);
#ifdef CONFIG_CMD_GREPENV
@@ -1229,7 +1229,7 @@ U_BOOT_CMD_COMPLETE(
#endif
\-n\: search variable names; \-v\: search values;\n
\-b\: search both names and values (default),
- var_complete
+ var_complete, 0
);
#endif
@@ -1240,7 +1240,7 @@ U_BOOT_CMD_COMPLETE(
- [forcibly] set environment variable 'name' to 'value ...'\n
setenv [-f] name\n
- [forcibly] delete environment variable 'name',
- var_complete
+ var_complete, 0
);
#if defined(CONFIG_CMD_ASKENV)
@@ -1259,7 +1259,7 @@ U_BOOT_CMD_COMPLETE(
run commands in an environment variable,
var [...]\n
- run the commands in the environment variable(s) 'var',
- var_complete
+ var_complete, 0
);
[U-Boot] [PATCH v3] arm: Add support for semihosting for armv8 fastmodel targets.
The reason for this change is to be able to use the ARM Trusted Firmware (ATF) to load the various ATF images, plus u-boot, which can then load the kernel/ramdisk/dtb with calls to an external host from a standard fastmodel armv8 board file using semihosting, and then launch the kernel without a bootwrapper. This gives us a more realistic boot sequence. There are two main ARM virtual Fixed Virtual Platform (FVP) models, Versatile Express (VE) FVP and BASE FVP (See http://www.arm.com/products/tools/models/fast-models/foundation-model.php) The initial vexpress64 u-boot board created here runs on the VE virtual platform using the license-free Foundation_v8 simulator. Fortunately, the Foundation_v8 simulator also supports the BASE_FVP model which companies can purchase licenses for and contain much more functionality. So we can, in u-boot, run either model by either using the VE FVP (default), or turning on CONFIG_BASE_FVP for the more full featured model. Rather than create a new armv8 board similar to armltd/vexpress64, add semihosting calls to the existing one, enabled with CONFIG_SEMIHOSTING and CONFIG_BASE_FVP both set. Also reuse the existing board config file vexpress_aemv8a.h but differentiate the two models by the presence or absence of CONFIG_BASE_FVP. This change is tested and works on both the Foundation and Base fastmodel simulators. Support for armv7 in fastmodel is less useful due to the wide range of available silicon and the lack of a free armv7 fastmodel, so this change contains an untested armv7 placeholder for the service trap opcode. The level of semihosting support is minimal, restricted to just what it takes to load images to memory. If more semihosting functionality is required, such as file seek, outputting strings, reading characters, etc, then it can be easily added later. Signed-off-by: Darwin Rambo dra...@broadcom.com --- Changes in v3: - minor format fixup in board file Changes in v2: - use kernel_addr_r, fdt_addr_r, initrd_addr_r convention. - Use env variables for kernel/fdt/initrd file names. - Add CONFIG_BASE_FVP to differentiate VE and BASE FVP models. - CONFIG_SEMIHOSTING only refers to bringing in semihosting code now. - Remove unnecessary CONFIG_SYS_BAUDRATE_TABLE, CONFIG_SYS_PROMPT_HUSH_PS2 - Remove vexpress_aemv8a_semi.h and replace with CONFIG_BASE_FVP - Update boards.cfg with option SEMIHOSTING and BASE_FVP - Add doc/README.semihosting Changes in v1: - Initial code - Remove empty timer_init() function. arch/arm/include/asm/semihosting.h | 21 +++ arch/arm/lib/Makefile|1 + arch/arm/lib/semihosting.c | 235 ++ board/armltd/vexpress64/vexpress64.c | 101 ++- boards.cfg |1 + doc/README.semihosting | 35 + include/configs/vexpress_aemv8a.h| 59 - 7 files changed, 441 insertions(+), 12 deletions(-) create mode 100644 arch/arm/include/asm/semihosting.h create mode 100644 arch/arm/lib/semihosting.c create mode 100644 doc/README.semihosting diff --git a/arch/arm/include/asm/semihosting.h b/arch/arm/include/asm/semihosting.h new file mode 100644 index 000..74111dc --- /dev/null +++ b/arch/arm/include/asm/semihosting.h @@ -0,0 +1,21 @@ +/* + * Copyright 2014 Broadcom Corporation + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef __SEMIHOSTING_H__ +#define __SEMIHOSTING_H__ + +/* + * ARM semihosting functions for loading images to memory. See the source + * code for more information. + */ +int smh_load(const char *fname, void *memp, int avail, int verbose); +int smh_read(int fd, void *memp, int len); +int smh_open(const char *fname, char *modestr); +int smh_close(int fd); +int smh_len_fd(int fd); +int smh_len(const char *fname); + +#endif /* __SEMIHOSTING_H__ */ diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 9fc81cd..0ba929d 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -32,6 +32,7 @@ obj-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o else obj-$(CONFIG_SPL_FRAMEWORK) += spl.o endif +obj-$(CONFIG_SEMIHOSTING) += semihosting.o obj-y += sections.o ifdef CONFIG_ARM64 diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c new file mode 100644 index 000..d603789 --- /dev/null +++ b/arch/arm/lib/semihosting.c @@ -0,0 +1,235 @@ +/* + * Copyright 2014 Broadcom Corporation + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +/* + * Minimal semihosting implementation for reading files into memory. If more + * features like writing files or console output are required they can be + * added later. This code has been tested on arm64/aarch64 fastmodel only. + * An untested placeholder exists for armv7 architectures, but since they + * are commonly available in silicon now, fastmodel usage makes less sense + * for them. + */ +#include common.h +#include asm/semihosting.h + +#define SYSOPEN0x01 +#define SYSCLOSE 0x02 +#define SYSREAD
[U-Boot] Need some help setting default DRAM clock to a lower value
Hi I am working on a project with cubie2 boards loading linux (Patricks nand boot loader patch, and kernel 3.3.0+ and ubuntu linaro 13.04 distro). I have met with stability issues (lock-up) and as I dug deeper, a number of other people have also complained about lockup issue relating to high DRAM clock (480 Mhz), as mentioned here https://groups.google.com/forum/#!topic/cubieboard/9WMBFAL7JBE and here: https://groups.google.com/forum/#!topic/linux-sunxi/hw0yyWFVYgM As mentioend, a lower value of DRAM clock seems to fix the problem, however I am not finding a way to do this (I am booting from NAND). I have edited script.bin, but it does not read the changed values. I also compiled a new boot.axf after putting 384Mhz values in the file boot1/core/start/eCon2_Start.c default_clock = eGon2_clock_set(0, 384); default_clock = 384; but to no avail as I moved the boot.axf file over, no change. I noticed binaries from core gets compiled into a boot1_nand.bin file, how is this used in the nand boot loading process? I am working with the lichee-a20-dev branch. Can anybody help? Thanks ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 04/17] kconfig: add defconfig files for all boards
2014-03-24 7:35 GMT+01:00 Masahiro Yamada yamad...@jp.panasonic.com: Thanks for your effort. I think basicly we're going to the right direction. But I am afraind more careful check is necessary before posting the series. I did build test on your patches on kconfig-support branch. I noticed many boards would be broken: - ARM cm_t335 am335x_boneblack am335x_evm am335x_evm_nor am335x_evm_norboot am335x_evm_spiboot am335x_evm_uart1 am335x_evm_uart2 am335x_evm_uart3 am335x_evm_uart4 am335x_evm_uart5 am335x_evm_usbspl h2200 palmld palmtc palmtreo680 zipitz2 vpac270_ond_256 mx31ads lubbock - AVR32 favr-32-ezkit - Blackfin bf527-ad7160-eval - PowerPC MVBLUE hermes svm_sc8xx ESTEEM192E ELPT860 FPS850L FPS860L NSCU SM850 TK885D TQM823L TQM823L_LCD TQM823M TQM850L TQM850M TQM855L TQM855M TQM860L TQM860M TQM862L TQM862M TQM866M TQM885D TTTech virtlab2 wtk MVSMR GENIETV ) Those boards have linker errors, but I do not understand yet why. For example on ARM the linker complains about multiple definition of board_init() and board_eth_init(). The solely difference is that there are one or two additional intermediate objects (board/built-in.o and if necessary board/VENDOR/built-in.o). But board/built-in.o and board/BOARD/built-in.o respectively board/VENDOR/BOARD/built-in.o contain the same symbols and object code. The strange thing is that the error only affects some boards. Could you run MAKEALL or buildman over all target boards and fix all errors? sure, if I find a solution And I want you to also fix a strange Makefile, board/synopsys/Makefile obj-$(CONFIG_BOARD_AXS101) += axs101/ obj-$(CONFIG_BOARD_NONE) += none/ fixed, I missed the special handling for the value of 'none' in the boad column -- - Daniel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 8/9] sunxi: mmc support
On Friday, March 21, 2014 at 10:54:25 PM, Ian Campbell wrote:
As well as the following signed-off-by the sunxi branch shows commits to
these files authored by the following:
Stefan Roese
Tom Cubie
yemao
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Luke Leighton l...@lkcl.net
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Wills Wang wills.wang.o...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
[...]
+
+static void dumphex32(char *name, char *base, int len)
+{
+ __u32 i;
+
+ debug(dump %s registers:, name);
+ for (i = 0; i len; i += 4) {
+ if (!(i 0xf))
+ debug(\n0x%p : , base + i);
+ debug(0x%08x , readl(base + i));
+ }
+ debug(\n);
+}
Looks like print_hex_dump() reimplementation ...
[...]
+static int mmc_trans_data_by_cpu(struct mmc *mmc, struct mmc_data *data)
+{
+ struct sunxi_mmc_host *mmchost = (struct sunxi_mmc_host *)mmc-priv;
+ unsigned i;
+ unsigned byte_cnt = data-blocksize * data-blocks;
+ unsigned *buff;
+ unsigned timeout = 0xf;
+
+ if (data-flags MMC_DATA_READ) {
+ buff = (unsigned int *)data-dest;
+ for (i = 0; i (byte_cnt 2); i++) {
+ while (--timeout
+(readl(mmchost-reg-status)
+ SUNXI_MMC_STATUS_FIFO_EMPTY))
+ ;
+ if (timeout = 0)
+ goto out;
+ buff[i] = readl(mmchost-database);
+ timeout = 0xf;
+ }
+ } else {
+ buff = (unsigned int *)data-src;
+ for (i = 0; i (byte_cnt 2); i++) {
+ while (--timeout
+(readl(mmchost-reg-status)
+ SUNXI_MMC_STATUS_FIFO_FULL))
+ ;
+ if (timeout = 0)
+ goto out;
+ writel(buff[i], mmchost-database);
+ timeout = 0xf;
Are these two branches almost the same ? Why not just clear that up by
squashing
them into one with a small if (...) at the begining of this function ?
[...]
+static int mmc_trans_data_by_dma(struct mmc *mmc, struct mmc_data *data)
+{
+ struct sunxi_mmc_host *mmchost = (struct sunxi_mmc_host *)mmc-priv;
+ unsigned byte_cnt = data-blocksize * data-blocks;
+ unsigned char *buff;
+ unsigned des_idx = 0;
+ unsigned buff_frag_num =
+ (byte_cnt + SDXC_DES_BUFFER_MAX_LEN - 1) SDXC_DES_NUM_SHIFT;
+ unsigned remain;
+ unsigned i, rval;
+ ALLOC_CACHE_ALIGN_BUFFER(struct sunxi_mmc_des, pdes, buff_frag_num);
+
+ buff = data-flags MMC_DATA_READ ?
+ (unsigned char *)data-dest : (unsigned char *)data-src;
+ remain = byte_cnt (SDXC_DES_BUFFER_MAX_LEN - 1);
+ if (!remain)
+ remain = SDXC_DES_BUFFER_MAX_LEN;
+
+ flush_cache((unsigned long)buff, (unsigned long)byte_cnt);
+ for (i = 0; i buff_frag_num; i++, des_idx++) {
+ memset((void *)pdes[des_idx], 0, sizeof(struct sunxi_mmc_des));
+ pdes[des_idx].des_chain = 1;
+ pdes[des_idx].own = 1;
+ pdes[des_idx].dic = 1;
+ if (buff_frag_num 1 i != buff_frag_num - 1)
+ pdes[des_idx].data_buf1_sz =
+ (SDXC_DES_BUFFER_MAX_LEN -
+ 1) SDXC_DES_BUFFER_MAX_LEN;
+ else
+ pdes[des_idx].data_buf1_sz = remain;
+
+ pdes[des_idx].buf_addr_ptr1 =
+ (u32) buff + i * SDXC_DES_BUFFER_MAX_LEN;
+ if (i == 0)
+ pdes[des_idx].first_des = 1;
+
+ if (i == buff_frag_num - 1) {
+ pdes[des_idx].dic = 0;
+ pdes[des_idx].last_des = 1;
+ pdes[des_idx].end_of_ring = 1;
+ pdes[des_idx].buf_addr_ptr2 = 0;
+ } else {
+ pdes[des_idx].buf_addr_ptr2 = (u32)pdes[des_idx + 1];
+ }
+ debug(frag %d, remain %d, des[%d](%08x): ,
+ i, remain, des_idx, (u32)pdes[des_idx]);
+ debug([0] = %08x, [1] = %08x, [2] = %08x, [3] = %08x\n,
+ (u32)((u32 *)pdes[des_idx])[0],
+ (u32)((u32 *)pdes[des_idx])[1],
+ (u32)((u32 *)pdes[des_idx])[2],
+ (u32)((u32 *)pdes[des_idx])[3]);
Yum, this pointer voodoo looks tasty (and ready for fixing up ... ).
[...]
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Re: [U-Boot] [PATCH v2 2/9] sunxi: initial sun7i pinmux and gpio support
On Friday, March 21, 2014 at 10:54:19 PM, Ian Campbell wrote:
[...]
diff --git a/arch/arm/cpu/armv7/sunxi/pinmux.c
b/arch/arm/cpu/armv7/sunxi/pinmux.c new file mode 100644
index 000..8f5cbfe
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/pinmux.c
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright 2007-2011
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Tom Cubie tangli...@allwinnertech.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/gpio.h
+
+int sunxi_gpio_set_cfgpin(u32 pin, u32 val)
+{
+ u32 cfg;
+ u32 bank = GPIO_BANK(pin);
+ u32 index = GPIO_CFG_INDEX(pin);
+ u32 offset = GPIO_CFG_OFFSET(pin);
+ struct sunxi_gpio *pio =
+ ((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[bank];
+
+ cfg = readl(pio-cfg[0] + index);
+ cfg = ~(0xf offset);
+ cfg |= val offset;
+
+ writel(cfg, pio-cfg[0] + index);
clrsetbits_le32() here.
+ return 0;
+}
+
+int sunxi_gpio_get_cfgpin(u32 pin)
+{
+ u32 cfg;
+ u32 bank = GPIO_BANK(pin);
+ u32 index = GPIO_CFG_INDEX(pin);
+ u32 offset = GPIO_CFG_OFFSET(pin);
+ struct sunxi_gpio *pio =
+ ((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[bank];
+
+ cfg = readl(pio-cfg[0] + index);
+ cfg = offset;
+
+ return cfg 0xf;
+}
+
+int sunxi_gpio_set_drv(u32 pin, u32 val)
+{
+ u32 drv;
+ u32 bank = GPIO_BANK(pin);
+ u32 index = GPIO_DRV_INDEX(pin);
+ u32 offset = GPIO_DRV_OFFSET(pin);
+ struct sunxi_gpio *pio =
+ ((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[bank];
+
+ drv = readl(pio-drv[0] + index);
+ drv = ~(0x3 offset);
+ drv |= val offset;
+
+ writel(drv, pio-drv[0] + index);
Here as well.
+ return 0;
+}
+
+int sunxi_gpio_set_pull(u32 pin, u32 val)
+{
+ u32 pull;
+ u32 bank = GPIO_BANK(pin);
+ u32 index = GPIO_PULL_INDEX(pin);
+ u32 offset = GPIO_PULL_OFFSET(pin);
+ struct sunxi_gpio *pio =
+ ((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)-gpio_bank[bank];
+
+ pull = readl(pio-pull[0] + index);
+ pull = ~(0x3 offset);
+ pull |= val offset;
+
+ writel(pull, pio-pull[0] + index);
Same here.
+ return 0;
+}
[...]
+int sunxi_gpio_set_cfgpin(u32 pin, u32 val);
+int sunxi_gpio_get_cfgpin(u32 pin);
+int sunxi_gpio_set_drv(u32 pin, u32 val);
+int sunxi_gpio_set_pull(u32 pin, u32 val);
+int name_to_gpio(const char *name);
+#define name_to_gpio name_to_gpio
What is this ugly define doing here ?
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Re: [U-Boot] [PATCH v2 1/9] sunxi: initial sun7i clocks and timer support.
On Friday, March 21, 2014 at 10:54:18 PM, Ian Campbell wrote:
This has been stripped back for mainlining and supports only sun7i. These
changes are not useful by themselves but are split out to make the patch
sizes more manageable.
[...]
+int clock_init(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+#ifdef CONFIG_SPL_BUILD
+ clock_init_safe();
+#endif
+
+ /* uart clock source is apb1 */
+ sr32(ccm-apb1_clk_div_cfg, 24, 2, APB1_CLK_SRC_OSC24M);
+ sr32(ccm-apb1_clk_div_cfg, 16, 2, APB1_FACTOR_N);
+ sr32(ccm-apb1_clk_div_cfg, 0, 5, APB1_FACTOR_M);
sr32() is not defined anywhere.
+ /* open the clock for uart */
+ sr32(ccm-apb1_gate, 16 + CONFIG_CONS_INDEX - 1, 1, CLK_GATE_OPEN);
+
+ return 0;
+}
+
+/* Return PLL5 frequency in Hz
+ * Note: Assumes PLL5 reference is 24MHz clock
+ */
+unsigned int clock_get_pll5(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ uint32_t rval = readl(ccm-pll5_cfg);
+ int n = (rval 8) 0x1f;
+ int k = ((rval 4) 3) + 1;
+ int p = 1 ((rval 16) 3);
+ return 2400 * n * k / p;
Please fix the magic values here.
[...]
+#ifdef CONFIG_SPL_BUILD
+#define PLL1_CFG(N, K, M, P) (1 31 | 0 30 | 8 26 | 0 25 |
\
+ 16 20 | (P) 16 | 2 13 | (N) 8 | \
+ (K) 4 | 0 3 | 0 2 | (M) 0)
Here is well.
+#define RDIV(a, b) ((a + (b) - 1) / (b))
This is some kind of DIV_ROUND_UP() from include/common.h ?
[...]
+ /* Map divisors to register values */
+ axi = axi - 1;
+ if (ahb 4)
+ ahb = 3;
+ else if (ahb 2)
+ ahb = 2;
+ else if (ahb 1)
+ ahb = 1;
+ else
+ ahb = 0;
+
+ apb0 = apb0 - 1;
+
+ /* Switch to 24MHz clock while changing PLL1 */
+ writel(AXI_DIV_1 AXI_DIV_SHIFT |
+AHB_DIV_2 AHB_DIV_SHIFT |
+APB0_DIV_1 APB0_DIV_SHIFT |
+CPU_CLK_SRC_OSC24M CPU_CLK_SRC_SHIFT,
+ccm-cpu_ahb_apb0_cfg);
+ sdelay(20);
What is sdelay() function all about ?
[...]
+static struct sunxi_timer *timer_base =
+ ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)-timer[TIMER_NUM];
+
+/* macro to read the 32 bit timer: since it decrements, we invert read
value */ +#define READ_TIMER() (~readl(timer_base-val))
This macro has to go, just use ~readl() in place. But still, why do you use
that
negation in ~readl() anyway ?
[...]
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Re: [U-Boot] [PATCH v2 5/9] sunxi: generic sun7i build infrastructure.
On Friday, March 21, 2014 at 10:54:22 PM, Ian Campbell wrote:
This has been stripped back for mainlining and supports only sun7i booting
via FEL mode. These changes are not useful by themselves but are split out
to make the patch sizes more manageable.
As well as the following signed-off-by the sunxi branch shows commits to
these files authored by the following:
Almo Nito
Carl van Schaik
FUKAUMI Naoki
hehopmajieh
j
Sergey Lapin
Tom Cubie
Signed-off-by: Adam Sampson a...@offog.org
Signed-off-by: Aleksei Mamlin mamli...@gmail.com
Signed-off-by: Chen-Yu Tsai w...@csie.org
Signed-off-by: Emilio López emi...@elopez.com.ar
Signed-off-by: Hans de Goede hdego...@redhat.com
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Jens Kuske jensku...@gmail.com
Signed-off-by: Luc Verhaegen l...@skynet.be
Signed-off-by: Luke Leighton l...@lkcl.net
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Patrick Wood patrickhw...@gmail.com
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Wills Wang wills.wang.o...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- sunxi-common.h updates, including pulling some command additions back
from the non-FEL patch and switchin to bootm_size not BOOTMAPSZ
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle
.gnu.hash section in ldscripts vs v2014.01.
---
arch/arm/cpu/armv7/Makefile | 2 +-
arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds | 59 +++
arch/arm/include/asm/arch-sunxi/spl.h | 20
board/sunxi/Makefile| 1 +
include/configs/sun7i.h | 24 +
include/configs/sunxi-common.h | 153
6 files changed, 258 insertions(+), 1
deletion(-)
create mode 100644 arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds
create mode 100644 arch/arm/include/asm/arch-sunxi/spl.h
create mode 100644 include/configs/sun7i.h
create mode 100644 include/configs/sunxi-common.h
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 119ebb3..ddf00f3 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -12,7 +12,7 @@ obj-y += cache_v7.o
obj-y+= cpu.o
obj-y+= syslib.o
-ifneq
($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CON
FIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY),) +ifneq
($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CON
FIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI),
) ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
obj-y+= lowlevel_init.o
endif
diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds
b/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds new file mode 100644
index 000..cf02300
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds
@@ -0,0 +1,59 @@
+OUTPUT_FORMAT(elf32-littlearm, elf32-littlearm, elf32-littlearm)
+OUTPUT_ARCH(arm)
+ENTRY(s_init)
+SECTIONS
+{
+ . = 0x2000;
+ . = ALIGN(4);
+ .text :
+ {
This file is unreadable. Can you not actually merge it into u-boot-spl.lds with
some #ifdef ?
[...]
+/*
+ * Display CPU information
+ */
+#define CONFIG_DISPLAY_CPUINFO
+
+/* Serial console */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+/* ns16550 reg in the low bits of cpu reg */
+#define CONFIG_SYS_NS16550_REG_SIZE (-4)
+#define CONFIG_SYS_NS16550_CLK (2400)
The braces are not needed .
+#define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
+#define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
+#define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
+#define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
[...]
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Re: [U-Boot] [PATCH] kbuild: create a build directory automatically for out-of-tree build
+Tom On 23 March 2014 22:55, Masahiro Yamada yamad...@jp.panasonic.com wrote: Prior to Kbuild, the build system created a build directory, when it did not exist, for out-of-tree build. This feature was dropped when we switched to Kbuild because many of lines in makefiles were copied from Linux Kernel. (In Linux Kernel, we have to create a build directory by ourselves before starting build.) That feature seems worth reviving for less typing even if our code and Linux Kernel diverge. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Suggested-by: Simon Glass s...@chromium.org Acked-by: Simon Glass s...@chromium.org Tested-by: Simon Glass s...@chromium.org Arguably could be a bug-fix for this release. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/9] sunxi: initial sun7i clocks and timer support.
On Monday, March 24, 2014 at 11:42:17 PM, Olliver Schinagl wrote:
On 03/24/2014 09:52 PM, Marek Vasut wrote:
On Friday, March 21, 2014 at 10:54:18 PM, Ian Campbell wrote:
This has been stripped back for mainlining and supports only sun7i.
These changes are not useful by themselves but are split out to make
the patch sizes more manageable.
[...]
+int clock_init(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+#ifdef CONFIG_SPL_BUILD
+ clock_init_safe();
+#endif
+
+ /* uart clock source is apb1 */
+ sr32(ccm-apb1_clk_div_cfg, 24, 2, APB1_CLK_SRC_OSC24M);
+ sr32(ccm-apb1_clk_div_cfg, 16, 2, APB1_FACTOR_N);
+ sr32(ccm-apb1_clk_div_cfg, 0, 5, APB1_FACTOR_M);
sr32() is not defined anywhere.
it should be defined in
arch/arm/include/asm/arch-sunxi/sys_proto.h
and comes from
arch/arm/cpu/armv7/syslib.c
it was added for the ti omap's
I've got a local cleanup patch set where I fixed this already to
clrsetbits_le32
It's not part of this patch, but then, use clrsetbits_le32() instead of course.
+ /* open the clock for uart */
+ sr32(ccm-apb1_gate, 16 + CONFIG_CONS_INDEX - 1, 1, CLK_GATE_OPEN);
+
+ return 0;
+}
+
+/* Return PLL5 frequency in Hz
+ * Note: Assumes PLL5 reference is 24MHz clock
+ */
+unsigned int clock_get_pll5(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ uint32_t rval = readl(ccm-pll5_cfg);
+ int n = (rval 8) 0x1f;
+ int k = ((rval 4) 3) + 1;
+ int p = 1 ((rval 16) 3);
+ return 2400 * n * k / p;
Please fix the magic values here.
[...]
Same here, got that in my local tree too
Then make it part of the V3 please.
[...]
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Re: [U-Boot] [PATCH v4 2/4] cpu: exynos4: add ace sha base address
On 24/03/14 16:44, Przemyslaw Marczak wrote: Hello Minkyu, On 03/22/2014 04:18 PM, Minkyu Kang wrote: Dear Przemyslaw Marczak, On 21 March 2014 17:56, Przemyslaw Marczak p.marc...@samsung.com wrote: Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com Cc: Minkyu Kang mk7.k...@samsung.com --- Changes v3: - new commit - after separate changes from next commit Changes v4: - none --- arch/arm/include/asm/arch-exynos/cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index bccce63..bd3300a 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -44,11 +44,11 @@ #define EXYNOS4_MODEM_BASE 0x13A0 #define EXYNOS4_USBPHY_CONTROL 0x10020704 #define EXYNOS4_I2S_BASE 0xE210 +#define EXYNOS4_ACE_SFR_BASE 0x1083 Could you please align this list? I am not sure why this is not aligned in patch - it was generated by git format patch. The source was aligned and after apply this patch by git am the code is also aligned. hm, sorry to misunderstanding. It means the ordering. I want to keep ordering of this list by base address. (although it looks already broken) #define EXYNOS4_DMC_CTRL_BASE 0x1040 +#define EXYNOS4_ACE_SFR_BASE 0x1083 #define EXYNOS4_GPIO_PART2_BASE0x1100 Thanks, Minkyu Kang. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] board: ecovec: fix debug LEDs pin direction
Applied, thanks!
Best regards,
Nobuhiro
2014-03-17 23:14 GMT+09:00 Baruch Siach bar...@tkos.co.il:
All pins should be output.
Signed-off-by: Baruch Siach bar...@tkos.co.il
---
board/renesas/ecovec/ecovec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/renesas/ecovec/ecovec.c b/board/renesas/ecovec/ecovec.c
index fb4acf3641b5..450e38783056 100644
--- a/board/renesas/ecovec/ecovec.c
+++ b/board/renesas/ecovec/ecovec.c
@@ -76,7 +76,7 @@ int board_init(void)
{
/* LED (PTG) */
- outw((inw(PGCR) ~0xFF) | 0x66, PGCR);
+ outw((inw(PGCR) ~0xFF) | 0x55, PGCR);
outw((inw(HIZCRA) ~0x02), HIZCRA);
debug_led(1 0);
--
1.9.0
--
Nobuhiro Iwamatsu
iwamatsu at {nigauri.org / debian.org}
GPG ID: 40AD1FA6
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Re: [U-Boot] [PATCH 2/2] board: ecovec: fix USB0 clock enable
Applied, thanks!
Best regards,
Nobuhiro
2014-03-17 23:14 GMT+09:00 Baruch Siach bar...@tkos.co.il:
Enable USB0 clock by resetting bit 20 of MSTPCR2. Leave other bits unchanged.
Signed-off-by: Baruch Siach bar...@tkos.co.il
---
board/renesas/ecovec/ecovec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/renesas/ecovec/ecovec.c b/board/renesas/ecovec/ecovec.c
index 450e38783056..2804d9133da0 100644
--- a/board/renesas/ecovec/ecovec.c
+++ b/board/renesas/ecovec/ecovec.c
@@ -97,7 +97,7 @@ int board_init(void)
/* USB host */
outw((inw(PBCR) ~0x300) | 0x100, PBCR);
outb((inb(PBDR) ~0x10) | 0x10, PBDR);
- outl(inl(MSTPCR2) 0x10, MSTPCR2);
+ outl(inl(MSTPCR2) ~0x10, MSTPCR2);
outw(0x0600, UPONCR0);
debug_led(1 3);
--
1.9.0
--
Nobuhiro Iwamatsu
iwamatsu at {nigauri.org / debian.org}
GPG ID: 40AD1FA6
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Re: [U-Boot] [PATCH] arm: Handle .gnu.hash section in ldscripts
On 26 January 2014 20:48, Andreas Färber afaer...@suse.de wrote: Avoids could not find output section .gnu.hash ld.bfd errors on openSUSE. Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: Tom Rini tr...@ti.com Signed-off-by: Andreas Färber afaer...@suse.de Acked-by: Simon Glass s...@chromium.org Tested on snow Tested-by: Simon Glass s...@chromium.org before: $ crosfw -b daisy Configuring for smdk5250 board... /usr/x86_64-pc-linux-gnu/armv7a-cros-linux-gnueabi/binutils-bin/2.22/ld.bfd.real: u-boot: could not find output section .gnu.hash /usr/x86_64-pc-linux-gnu/armv7a-cros-linux-gnueabi/binutils-bin/2.22/ld.bfd.real: final link failed: Nonrepresentable section on output make[1]: *** [u-boot] Error 1 make[1]: *** Waiting for unfinished jobs make: *** [sub-make] Error 2 after: no error Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 05/13] ARM: tegra: use apb_misc.h in more places
On 21 March 2014 11:28, Stephen Warren swar...@wwwdotorg.org wrote: From: Stephen Warren swar...@nvidia.com Tegra's APB misc register region contains various miscellaneous registers and the Tegra pinmux registers. Some code that touches the misc registers currently uses struct pmux_tri_ctlr, which is intended to be a definition of pinmux registers, rather than struct apb_misc_pp_ctrl, which is intended to be a definition of the miscellaneous registers. Convert all such code to use struct apb_misc_pp_ctrl, since struct pmux_tri_ctlr goes away in the next patch. This requires adding a missing field definition to struct apb_misc_pp_ctrl, and moving the header into a more common location. Signed-off-by: Stephen Warren swar...@nvidia.com Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 06/13] ARM: tegra: pinctrl: remove duplication
Hi Stephen, On 21 March 2014 11:28, Stephen Warren swar...@wwwdotorg.org wrote: From: Stephen Warren swar...@nvidia.com Much of arch/arm/cpu/tegra*-common/pinmux.c is identical. Remove the duplication by creating pinmux-common.c for all the identical code. This leaves: * arch/arm/include/asm/arch-tegra*/pinmux.h defining only the names of the various pins/pin groups, drive groups, and mux functions. * arch/arm/cpu/tegra*-common/pinmux.c containing only the lookup table stating which pin groups support which mux functions. The code in pinmux-common.c is semantically identical to that in the various original pinmux.c, but had some consistency and cleanup fixes applied during migration. I removed the definition of struct pmux_tri_ctlr, since this is different between SoCs (especially Tegra20 vs all others), and it's much simpler to deal with this via the new REG/MUX_REG/... defines. spl.c, warmboot.c, and warmboot_avp.c needed updates due to this, since they previously hijacked this struct to encode the location of some non-pinmux registers. Now, that code simply calculates these register addresses directly using simple and obvious math. I like this method better irrespective of the pinmux code cleanup anyway. Signed-off-by: Stephen Warren swar...@nvidia.com Acked-by: Simon Glass s...@chromium.org IMO it would be better for the #defines to go in the relevant header (e.g. T20/T30) rather than having #ifdef TEGRA20 in this file. But OK. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 08/13] ARM: tegra: pinmux naming consistency fixes
On 21 March 2014 11:28, Stephen Warren swar...@wwwdotorg.org wrote: From: Stephen Warren swar...@nvidia.com Clean up the naming of pinmux-related objects: * Refer to drive groups rather than pad groups to match the Linux kernel. * Ensure all pinmux API types are prefixed with pmux_, values (defines) are prefixed with PMUX_, and functions prefixed with pinmux_. * Modify a few type names to make their content clearer. * Minimal changes to SoC-specific .h/.c files are made so the code still compiles. A separate per-SoC change will be made immediately following, in order to keep individual patch size down. Signed-off-by: Stephen Warren swar...@nvidia.com Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 09/13] ARM: tegra: use clrsetbits_le32 in pinmux driver
Hi Stephen,
On 21 March 2014 11:28, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
This removes a bunch of open-coded register IO, masking, and shifting.
I would have squashed this into ARM: tegra: pinctrl: remove duplication
except that keeping it a separate commit allows easier bisection of any
issues that are introduced by this patch. I also wrote this patch on top
of the series, and pushing it any lower in the series results in some
conflicts I didn't feel like fixing.
Signed-off-by: Stephen Warren swar...@nvidia.com
Acked-by: Simon Glass s...@chromium.org
But see comment below.
---
V2: New patch.
---
arch/arm/cpu/tegra-common/pinmux-common.c | 135
+-
1 file changed, 23 insertions(+), 112 deletions(-)
diff --git a/arch/arm/cpu/tegra-common/pinmux-common.c
b/arch/arm/cpu/tegra-common/pinmux-common.c
index 32a46d53f068..7f7d4a87a4aa 100644
--- a/arch/arm/cpu/tegra-common/pinmux-common.c
+++ b/arch/arm/cpu/tegra-common/pinmux-common.c
@@ -87,11 +87,15 @@
#define IO_RESET_SHIFT 8
#define RCV_SEL_SHIFT 9
+static inline void update_field(u32 *reg, u32 mask, u32 shift, u32 val)
+{
+ clrsetbits_le32(reg, mask shift, val shift);
I wonder if it would be better to write this out explicitly in each site.
+}
+
void pinmux_set_func(enum pmux_pingrp pin, enum pmux_func func)
{
u32 *reg = MUX_REG(pin);
int i, mux = -1;
- u32 val;
/* Error check on pin and func */
assert(pmux_pingrp_isvalid(pin));
@@ -110,42 +114,29 @@ void pinmux_set_func(enum pmux_pingrp pin, enum
pmux_func func)
}
assert(mux != -1);
- val = readl(reg);
- val = ~(3 MUX_SHIFT(pin));
- val |= (mux MUX_SHIFT(pin));
- writel(val, reg);
+ update_field(reg, 3, MUX_SHIFT(pin), mux);
Because here you are obscuring the shift - the parameter order is by
no means obvious.
Or perhaps update_reg_mask_shift_val()?
Regards,
Simon
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Re: [U-Boot] [PATCH V2 10/13] ARM: tegra: Tegra20 pinmux cleanup
Hi Stephen, On 21 March 2014 11:28, Stephen Warren swar...@wwwdotorg.org wrote: From: Stephen Warren swar...@nvidia.com This renames all the Tegra20 pinmux pins and functions so they have a prefix which matches the type name. The entries in tegra20_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. Signed-off-by: Stephen Warren swar...@nvidia.com Acked-by: Simon Glass s...@chromium.org I see you have removed the 'safe' parameter - I guess that is what you mean. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 11/13] ARM: tegra: Tegra30 pinmux cleanup
On 21 March 2014 11:28, Stephen Warren swar...@wwwdotorg.org wrote: From: Stephen Warren swar...@nvidia.com This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra30_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. This introduces a few changes to pin/group/function naming and the set of available functions for each pin. The new values now exactly match the TRM; the chip documentation. I adjusted one entry in pinmux-config-cardhu.h due to this. Signed-off-by: Stephen Warren swar...@nvidia.com Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: tegra: pack pinmux data tables tighter
Hi Stephen, On 21 March 2014 14:58, Stephen Warren swar...@wwwdotorg.org wrote: From: Stephen Warren swar...@nvidia.com Use smaller fields in the Tegra pinmux structures in order to pack the data tables into a smaller space. This saves around 1-3KB for the SPL and around 3-8KB for the main build of U-Boot, depending on the board, which SoC it uses, and how many pinmux table entries there are. In order to pack PMUX_FUNC_* into a smaller space, don't hard-code the values of PMUX_FUNC_RSVD* to values which require 16 bits to store them, but instead let their values be assigned automatically, so they end up fitting into 8 bits. Signed-off-by: Stephen Warren swar...@nvidia.com Acked-by: Simon Glass s...@chromium.org Unfortunate that we lose the enum type checking but I guess it is worth it. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Numbered GPIO patch for exynos
Hi Rajeshwari, I recall you mentioning that this patch has not made it to mainline yet. Do you know who is working on it please? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/9] sunxi: initial sun7i clocks and timer support.
On 03/24/2014 09:52 PM, Marek Vasut wrote:
On Friday, March 21, 2014 at 10:54:18 PM, Ian Campbell wrote:
This has been stripped back for mainlining and supports only sun7i. These
changes are not useful by themselves but are split out to make the patch
sizes more manageable.
[...]
+int clock_init(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+#ifdef CONFIG_SPL_BUILD
+ clock_init_safe();
+#endif
+
+ /* uart clock source is apb1 */
+ sr32(ccm-apb1_clk_div_cfg, 24, 2, APB1_CLK_SRC_OSC24M);
+ sr32(ccm-apb1_clk_div_cfg, 16, 2, APB1_FACTOR_N);
+ sr32(ccm-apb1_clk_div_cfg, 0, 5, APB1_FACTOR_M);
sr32() is not defined anywhere.
it should be defined in
arch/arm/include/asm/arch-sunxi/sys_proto.h
and comes from
arch/arm/cpu/armv7/syslib.c
it was added for the ti omap's
I've got a local cleanup patch set where I fixed this already to
clrsetbits_le32
+ /* open the clock for uart */
+ sr32(ccm-apb1_gate, 16 + CONFIG_CONS_INDEX - 1, 1, CLK_GATE_OPEN);
+
+ return 0;
+}
+
+/* Return PLL5 frequency in Hz
+ * Note: Assumes PLL5 reference is 24MHz clock
+ */
+unsigned int clock_get_pll5(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ uint32_t rval = readl(ccm-pll5_cfg);
+ int n = (rval 8) 0x1f;
+ int k = ((rval 4) 3) + 1;
+ int p = 1 ((rval 16) 3);
+ return 2400 * n * k / p;
Please fix the magic values here.
[...]
Same here, got that in my local tree too
+#ifdef CONFIG_SPL_BUILD
+#define PLL1_CFG(N, K, M, P) (1 31 | 0 30 | 8 26 | 0 25 |
\
+16 20 | (P) 16 | 2 13 | (N) 8 | \
+(K) 4 | 0 3 | 0 2 | (M) 0)
Here is well.
dito :)
+#define RDIV(a, b) ((a + (b) - 1) / (b))
This is some kind of DIV_ROUND_UP() from include/common.h ?
[...]
That one i didn't have;
Ian, I guess you can verify that generic macro works for here?
+ /* Map divisors to register values */
+ axi = axi - 1;
+ if (ahb 4)
+ ahb = 3;
+ else if (ahb 2)
+ ahb = 2;
+ else if (ahb 1)
+ ahb = 1;
+ else
+ ahb = 0;
+
+ apb0 = apb0 - 1;
+
+ /* Switch to 24MHz clock while changing PLL1 */
+ writel(AXI_DIV_1 AXI_DIV_SHIFT |
+ AHB_DIV_2 AHB_DIV_SHIFT |
+ APB0_DIV_1 APB0_DIV_SHIFT |
+ CPU_CLK_SRC_OSC24M CPU_CLK_SRC_SHIFT,
+ ccm-cpu_ahb_apb0_cfg);
+ sdelay(20);
What is sdelay() function all about ?
It also is from
arch/arm/include/asm/arch-sunxi/sys_proto.h
and I thought all where replaced with udelays
With the sr32 and sdelays gone everywhere, sunxi/sys_proto.h can even go!
[...]
+static struct sunxi_timer *timer_base =
+ ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)-timer[TIMER_NUM];
+
+/* macro to read the 32 bit timer: since it decrements, we invert read
value */ +#define READ_TIMER() (~readl(timer_base-val))
This macro has to go, just use ~readl() in place. But still, why do you use that
negation in ~readl() anyway ?
[...]
Olliver
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