Re: [U-Boot] [RFC] RFC: convert MPC8536DS to use generic board
Dear York Sun, In message 1398474623-4709-1-git-send-email-york...@freescale.com you wrote: Add #ifdef CONFIG_OF_CONTROL for reserve_fdt(), setup_fdt(), reloc_fdt(). This looks wrong to me. This is a global file, and you are affecting a ton of unrelated boards. Set initial value for gd. Powerpc SoCs use locked cache as init RAM. Well, some of them do, not all. Change return value for mac_read_from_eeprom() when mismatch happens to prevent calling hang(). You mean, you just ignore the error? This is a change of the cpolicy that has nothing to do with generic board support, right? Why should this be done now, i. e. why has it been accepted and considered to be working before? board/freescale/common/sys_eeprom.c |2 +- common/board_f.c| 18 +- include/configs/MPC8536DS.h |2 ++ 3 files changed, 20 insertions(+), 2 deletions(-) I think thease are at least 2, eventually 3 independent changes. You should split them in several commits. +#ifdef CONFIG_PPC + gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); + __asm__ __volatile__(:::memory); +#endif Again, this is a global change. Why is this now needed? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The high cost of living hasn't affected its popularity. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 04/10] ARM: add missing HYP mode constant
In order to be able to use the various mode constants (far more
readable than random hex values), add the missing HYP and A
values.
Also update arm/lib/interrupts.c to display HYP instead of an
unknown value.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/include/asm/proc-armv/ptrace.h | 2 ++
arch/arm/lib/interrupts.c | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/proc-armv/ptrace.h
b/arch/arm/include/asm/proc-armv/ptrace.h
index 21aef58..71df5a9 100644
--- a/arch/arm/include/asm/proc-armv/ptrace.h
+++ b/arch/arm/include/asm/proc-armv/ptrace.h
@@ -38,12 +38,14 @@ struct pt_regs {
#define IRQ_MODE 0x12
#define SVC_MODE 0x13
#define ABT_MODE 0x17
+#define HYP_MODE 0x1a
#define UND_MODE 0x1b
#define SYSTEM_MODE0x1f
#define MODE_MASK 0x1f
#define T_BIT 0x20
#define F_BIT 0x40
#define I_BIT 0x80
+#define A_BIT 0x100
#define CC_V_BIT (1 28)
#define CC_C_BIT (1 29)
#define CC_Z_BIT (1 30)
diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index 758b013..f6b7c03 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -103,7 +103,7 @@ void show_regs (struct pt_regs *regs)
UK12_26, UK13_26, UK14_26, UK15_26,
USER_32, FIQ_32, IRQ_32, SVC_32,
UK4_32, UK5_32, UK6_32, ABT_32,
- UK8_32, UK9_32, UK10_32, UND_32,
+ UK8_32, UK9_32, HYP_32, UND_32,
UK12_32, UK13_32, UK14_32, SYS_32,
};
--
1.9.2
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[U-Boot] [PATCH v4 02/10] ARM: HYP/non-sec: add a barrier after setting SCR.NS==1
A CP15 instruction execution can be reordered, requiring an isb to be sure it is executed in program order. Signed-off-by: Marc Zyngier marc.zyng...@arm.com --- arch/arm/cpu/armv7/nonsec_virt.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index 6367e09..12de5c2 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -46,6 +46,7 @@ _secure_monitor: #endif mcr p15, 0, r1, c1, c1, 0 @ write SCR (with NS bit set) + isb #ifdef CONFIG_ARMV7_VIRT mrceq p15, 0, r0, c12, c0, 1 @ get MVBAR value -- 1.9.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 09/10] ARM: convert arch_fixup_memory_node to a generic FDT fixup function
From: Ma Haijun mahaij...@gmail.com
Some architecture needs extra device tree setup. Instead of adding
yet another hook, convert arch_fixup_memory_node to be a generic
FDT fixup function.
[maz: collapsed 3 patches into one, rewrote commit message]
Signed-off-by: Ma Haijun mahaij...@gmail.com
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/lib/bootm-fdt.c | 2 +-
arch/arm/lib/bootm.c | 2 +-
common/image-fdt.c | 7 +--
include/common.h | 6 +++---
4 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index e40691d..8394e15 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -20,7 +20,7 @@
DECLARE_GLOBAL_DATA_PTR;
-int arch_fixup_memory_node(void *blob)
+int arch_fixup_fdt(void *blob)
{
bd_t *bd = gd-bd;
int bank;
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 61aa14e..4cff6b0 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -357,7 +357,7 @@ void boot_prep_vxworks(bootm_headers_t *images)
if (images-ft_addr) {
off = fdt_path_offset(images-ft_addr, /memory);
if (off 0) {
- if (arch_fixup_memory_node(images-ft_addr))
+ if (arch_fixup_fdt(images-ft_addr))
puts(## WARNING: fixup memory failed!\n);
}
}
diff --git a/common/image-fdt.c b/common/image-fdt.c
index a54a919..6f074de 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -445,7 +445,7 @@ __weak int ft_verify_fdt(void *fdt)
return 1;
}
-__weak int arch_fixup_memory_node(void *blob)
+__weak int arch_fixup_fdt(void *blob)
{
return 0;
}
@@ -462,7 +462,10 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
puts( - must RESET the board to recover.\n);
return -1;
}
- arch_fixup_memory_node(blob);
+ if (arch_fixup_fdt(blob) 0) {
+ puts(ERROR: arch specific fdt fixup failed);
+ return -1;
+ }
if (IMAGE_OF_BOARD_SETUP)
ft_board_setup(blob, gd-bd);
fdt_fixup_ethernet(blob);
diff --git a/include/common.h b/include/common.h
index 5fb0bb2..3f50437 100644
--- a/include/common.h
+++ b/include/common.h
@@ -326,14 +326,14 @@ int arch_early_init_r(void);
void board_show_dram(ulong size);
/**
- * arch_fixup_memory_node() - Write arch-specific memory information to fdt
+ * arch_fixup_fdt() - Write arch-specific information to fdt
*
- * Defined in arch/$(ARCH)/lib/bootm.c
+ * Defined in arch/$(ARCH)/lib/bootm-fdt.c
*
* @blob: FDT blob to write to
* @return 0 if ok, or -ve FDT_ERR_... on failure
*/
-int arch_fixup_memory_node(void *blob);
+int arch_fixup_fdt(void *blob);
/* common/flash.c */
void flash_perror (int);
--
1.9.2
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[U-Boot] [PATCH v4 07/10] ARM: HYP/non-sec: add generic ARMv7 PSCI code
Implement core support for PSCI. As this is generic code, it doesn't
implement anything really useful (all the functions are returning
Not Implemented).
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/cpu/armv7/Makefile | 4 ++
arch/arm/cpu/armv7/psci.S | 102
arch/arm/include/asm/psci.h | 35 +++
3 files changed, 141 insertions(+)
create mode 100644 arch/arm/cpu/armv7/psci.S
create mode 100644 arch/arm/include/asm/psci.h
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 119ebb3..de1cc1a 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -23,6 +23,10 @@ obj-y+= nonsec_virt.o
obj-y += virt-v7.o
endif
+ifneq ($(CONFIG_ARMV7_PSCI),)
+obj-y += psci.o
+endif
+
obj-$(CONFIG_KONA) += kona-common/
obj-$(CONFIG_OMAP_COMMON) += omap-common/
obj-$(CONFIG_TEGRA) += tegra-common/
diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
new file mode 100644
index 000..bf11a34
--- /dev/null
+++ b/arch/arm/cpu/armv7/psci.S
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2013,2014 - ARM Ltd
+ * Author: Marc Zyngier marc.zyng...@arm.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see http://www.gnu.org/licenses/.
+ */
+
+#include config.h
+#include linux/linkage.h
+#include asm/psci.h
+
+ .pushsection ._secure.text, ax
+
+ .arch_extension sec
+
+ .align 5
+ .globl _psci_vectors
+_psci_vectors:
+ b default_psci_vector @ reset
+ b default_psci_vector @ undef
+ b _smc_psci @ smc
+ b default_psci_vector @ pabort
+ b default_psci_vector @ dabort
+ b default_psci_vector @ hyp
+ b default_psci_vector @ irq
+ b psci_fiq_enter @ fiq
+
+ENTRY(psci_fiq_enter)
+ movspc, lr
+ENDPROC(psci_fiq_enter)
+.weak psci_fiq_enter
+
+ENTRY(default_psci_vector)
+ movspc, lr
+ENDPROC(default_psci_vector)
+.weak default_psci_vector
+
+ENTRY(psci_cpu_suspend)
+ENTRY(psci_cpu_off)
+ENTRY(psci_cpu_on)
+ENTRY(psci_migrate)
+ mov r0, #ARM_PSCI_RET_NI@ Return -1 (Not Implemented)
+ mov pc, lr
+ENDPROC(psci_migrate)
+ENDPROC(psci_cpu_on)
+ENDPROC(psci_cpu_off)
+ENDPROC(psci_cpu_suspend)
+.weak psci_cpu_suspend
+.weak psci_cpu_off
+.weak psci_cpu_on
+.weak psci_migrate
+
+_psci_table:
+ .word ARM_PSCI_FN_CPU_SUSPEND
+ .word psci_cpu_suspend
+ .word ARM_PSCI_FN_CPU_OFF
+ .word psci_cpu_off
+ .word ARM_PSCI_FN_CPU_ON
+ .word psci_cpu_on
+ .word ARM_PSCI_FN_MIGRATE
+ .word psci_migrate
+ .word 0
+ .word 0
+
+_smc_psci:
+ push{r4-r7,lr}
+
+ @ Switch to secure
+ mrc p15, 0, r7, c1, c1, 0
+ bic r4, r7, #1
+ mcr p15, 0, r4, c1, c1, 0
+ isb
+
+ adr r4, _psci_table
+1: ldr r5, [r4]@ Load PSCI function ID
+ ldr r6, [r4, #4]@ Load target PC
+ cmp r5, #0 @ If reach the end, bail out
+ moveq r0, #ARM_PSCI_RET_INVAL @ Return -2 (Invalid)
+ beq 2f
+ cmp r0, r5 @ If not matching, try next entry
+ addne r4, r4, #8
+ bne 1b
+
+ blx r6 @ Execute PSCI function
+
+ @ Switch back to non-secure
+2: mcr p15, 0, r7, c1, c1, 0
+
+ pop {r4-r7, lr}
+ movspc, lr @ Return to the kernel
+
+ .popsection
diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
new file mode 100644
index 000..704b4b0
--- /dev/null
+++ b/arch/arm/include/asm/psci.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2013 - ARM Ltd
+ * Author: Marc Zyngier marc.zyng...@arm.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see http://www.gnu.org/licenses/.
+ */
+
+#ifndef
[U-Boot] [PATCH v4 08/10] ARM: HYP/non-sec: add the option for a second-stage monitor
Allow the switch to a second stage secure monitor just before switching to non-secure. This allows a resident piece of firmware to be active once the kernel has been entered (the u-boot monitor is dead anyway, its pages being reused). Signed-off-by: Marc Zyngier marc.zyng...@arm.com --- arch/arm/cpu/armv7/nonsec_virt.S | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index 2a43e3c..745670e 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -44,10 +44,19 @@ _monitor_vectors: * ip: target PC */ _secure_monitor: +#ifdef CONFIG_ARMV7_PSCI + ldr r5, =_psci_vectors @ Switch to the next monitor + mcr p15, 0, r5, c12, c0, 1 + isb + + @ Obtain a secure stack, and configure the PSCI backend + bl psci_arch_init +#endif + mrc p15, 0, r5, c1, c1, 0 @ read SCR - bic r5, r5, #0x4e @ clear IRQ, FIQ, EA, nET bits + bic r5, r5, #0x4a @ clear IRQ, EA, nET bits orr r5, r5, #0x31 @ enable NS, AW, FW bits - + @ FIQ preserved for secure mode mov r6, #SVC_MODE @ default mode is SVC is_cpu_virt_capable r4 #ifdef CONFIG_ARMV7_VIRT -- 1.9.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 05/10] ARM: HYP/non-sec: add separate section for secure code
In anticipation of refactoring the HYP/non-secure code to run
from secure RAM, add a new linker section that will contain that
code.
Nothing is using it just yet.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/config.mk | 2 +-
arch/arm/cpu/u-boot.lds | 30 ++
arch/arm/lib/sections.c | 2 ++
3 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 66ecc2e..a729ed2 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -113,7 +113,7 @@ endif
ifdef CONFIG_ARM64
OBJCOPYFLAGS += -j .text -j .rodata -j .data -j .u_boot_list -j .rela.dyn
else
-OBJCOPYFLAGS += -j .text -j .rodata -j .hash -j .data -j .got.plt -j
.u_boot_list -j .rel.dyn
+OBJCFLAGS += -j .text -j .secure_text -j .rodata -j .hash -j .data -j .got.plt
-j .u_boot_list -j .rel.dyn
endif
ifneq ($(CONFIG_IMX_CONFIG),)
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 33c1f99..f45885d 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -7,6 +7,8 @@
* SPDX-License-Identifier:GPL-2.0+
*/
+#include config.h
+
OUTPUT_FORMAT(elf32-littlearm, elf32-littlearm, elf32-littlearm)
OUTPUT_ARCH(arm)
ENTRY(_start)
@@ -22,6 +24,34 @@ SECTIONS
*(.text*)
}
+#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) ||
defined(CONFIG_ARMV7_PSCI)
+
+#ifndef CONFIG_ARMV7_SECURE_BASE
+#define CONFIG_ARMV7_SECURE_BASE
+#endif
+
+ .__secure_start : {
+ . = ALIGN(0x1000);
+ *(.__secure_start)
+ }
+
+ .secure_text CONFIG_ARMV7_SECURE_BASE :
+ AT(ADDR(.__secure_start) + SIZEOF(.__secure_start))
+ {
+ *(._secure.text)
+ }
+
+ . = LOADADDR(.__secure_start) +
+ SIZEOF(.__secure_start) +
+ SIZEOF(.secure_text);
+
+ __secure_end_lma = .;
+ .__secure_end : AT(__secure_end_lma) {
+ *(.__secure_end)
+ LONG(0x1d1071c);/* Must output something to reset LMA */
+ }
+#endif
+
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
diff --git a/arch/arm/lib/sections.c b/arch/arm/lib/sections.c
index 5b30bcb..a1205c3 100644
--- a/arch/arm/lib/sections.c
+++ b/arch/arm/lib/sections.c
@@ -25,4 +25,6 @@ char __image_copy_start[0]
__attribute__((section(.__image_copy_start)));
char __image_copy_end[0] __attribute__((section(.__image_copy_end)));
char __rel_dyn_start[0] __attribute__((section(.__rel_dyn_start)));
char __rel_dyn_end[0] __attribute__((section(.__rel_dyn_end)));
+char __secure_start[0] __attribute__((section(.__secure_start)));
+char __secure_end[0] __attribute__((section(.__secure_end)));
char _end[0] __attribute__((section(.__end)));
--
1.9.2
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[U-Boot] [PATCH v4 03/10] ARM: non-sec: reset CNTVOFF to zero
Before switching to non-secure, make sure that CNTVOFF is set to zero on all CPUs. Otherwise, kernel running in non-secure without HYP enabled (hence using virtual timers) may observe timers that are not synchronized, effectively seeing time going backward... Signed-off-by: Marc Zyngier marc.zyng...@arm.com --- arch/arm/cpu/armv7/nonsec_virt.S | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index 12de5c2..b5c946f 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -38,10 +38,10 @@ _secure_monitor: bic r1, r1, #0x4e @ clear IRQ, FIQ, EA, nET bits orr r1, r1, #0x31 @ enable NS, AW, FW bits -#ifdef CONFIG_ARMV7_VIRT mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1 and r0, r0, #CPUID_ARM_VIRT_MASK@ mask virtualization bits cmp r0, #(1 CPUID_ARM_VIRT_SHIFT) +#ifdef CONFIG_ARMV7_VIRT orreq r1, r1, #0x100 @ allow HVC instruction #endif @@ -52,7 +52,14 @@ _secure_monitor: mrceq p15, 0, r0, c12, c0, 1 @ get MVBAR value mcreq p15, 4, r0, c12, c0, 0 @ write HVBAR #endif + bne 1f + @ Reset CNTVOFF to 0 before leaving monitor mode + mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1 + andsr0, r0, #CPUID_ARM_GENTIMER_MASK@ test arch timer bits + movne r0, #0 + mcrrne p15, 4, r0, r0, c14 @ Reset CNTVOFF to zero +1: movspc, lr @ return to non-secure SVC _hyp_trap: -- 1.9.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 01/10] ARM: HYP/non-sec: move switch to non-sec to the last boot phase
Having the switch to non-secure in the prep phase is causing
all kind of troubles, as that stage can be called multiple times.
Instead, move the switch to non-secure to the last possible phase,
when there is no turning back anymore.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/lib/bootm.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 47ee070..10634a4 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -242,7 +242,6 @@ static void boot_prep_linux(bootm_headers_t *images)
printf(FDT and ATAGS support not compiled in - hanging\n);
hang();
}
- do_nonsec_virt_switch();
}
/* Subcommand: GO */
@@ -287,8 +286,10 @@ static void boot_jump_linux(bootm_headers_t *images, int
flag)
else
r2 = gd-bd-bi_boot_params;
- if (!fake)
+ if (!fake) {
+ do_nonsec_virt_switch();
kernel_entry(0, machid, r2);
+ }
#endif
}
--
1.9.2
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[U-Boot] [PATCH v4 06/10] ARM: HYP/non-sec: allow relocation to secure RAM
The current non-sec switching code suffers from one major issue: it cannot run in secure RAM, as a large part of u-boot still needs to be run while we're switched to non-secure. This patch reworks the whole HYP/non-secure strategy by: - making sure the secure code is the *last* thing u-boot executes before entering the payload - performing an exception return from secure mode directly into the payload - allowing the code to be dynamically relocated to secure RAM before switching to non-secure. This involves quite a bit of horrible code, specially as u-boot relocation is quite primitive. Signed-off-by: Marc Zyngier marc.zyng...@arm.com --- arch/arm/cpu/armv7/nonsec_virt.S | 161 +++ arch/arm/cpu/armv7/virt-v7.c | 59 +- arch/arm/include/asm/armv7.h | 10 ++- arch/arm/include/asm/secure.h| 26 +++ arch/arm/lib/bootm.c | 22 +++--- 5 files changed, 138 insertions(+), 140 deletions(-) create mode 100644 arch/arm/include/asm/secure.h diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index b5c946f..2a43e3c 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -10,10 +10,13 @@ #include linux/linkage.h #include asm/gic.h #include asm/armv7.h +#include asm/proc-armv/ptrace.h .arch_extension sec .arch_extension virt + .pushsection ._secure.text, ax + .align 5 /* the vector table for secure state and HYP mode */ _monitor_vectors: @@ -22,51 +25,86 @@ _monitor_vectors: adr pc, _secure_monitor .word 0 .word 0 - adr pc, _hyp_trap + .word 0 .word 0 .word 0 +.macro is_cpu_virt_capable tmp + mrc p15, 0, \tmp, c0, c1, 1 @ read ID_PFR1 + and \tmp, \tmp, #CPUID_ARM_VIRT_MASK@ mask virtualization bits + cmp \tmp, #(1 CPUID_ARM_VIRT_SHIFT) +.endm + /* * secure monitor handler * U-boot calls this software interrupt in start.S * This is executed on a smc instruction, we use a smc #0 to switch * to non-secure state. - * We use only r0 and r1 here, due to constraints in the caller. + * r0, r1, r2: passed to the callee + * ip: target PC */ _secure_monitor: - mrc p15, 0, r1, c1, c1, 0 @ read SCR - bic r1, r1, #0x4e @ clear IRQ, FIQ, EA, nET bits - orr r1, r1, #0x31 @ enable NS, AW, FW bits + mrc p15, 0, r5, c1, c1, 0 @ read SCR + bic r5, r5, #0x4e @ clear IRQ, FIQ, EA, nET bits + orr r5, r5, #0x31 @ enable NS, AW, FW bits - mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1 - and r0, r0, #CPUID_ARM_VIRT_MASK@ mask virtualization bits - cmp r0, #(1 CPUID_ARM_VIRT_SHIFT) + mov r6, #SVC_MODE @ default mode is SVC + is_cpu_virt_capable r4 #ifdef CONFIG_ARMV7_VIRT - orreq r1, r1, #0x100 @ allow HVC instruction + orreq r5, r5, #0x100 @ allow HVC instruction + moveq r6, #HYP_MODE @ Enter the kernel as HYP #endif - mcr p15, 0, r1, c1, c1, 0 @ write SCR (with NS bit set) + mcr p15, 0, r5, c1, c1, 0 @ write SCR (with NS bit set) isb -#ifdef CONFIG_ARMV7_VIRT - mrceq p15, 0, r0, c12, c0, 1 @ get MVBAR value - mcreq p15, 4, r0, c12, c0, 0 @ write HVBAR -#endif bne 1f @ Reset CNTVOFF to 0 before leaving monitor mode - mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1 - andsr0, r0, #CPUID_ARM_GENTIMER_MASK@ test arch timer bits - movne r0, #0 - mcrrne p15, 4, r0, r0, c14 @ Reset CNTVOFF to zero + mrc p15, 0, r4, c0, c1, 1 @ read ID_PFR1 + andsr4, r4, #CPUID_ARM_GENTIMER_MASK@ test arch timer bits + movne r4, #0 + mcrrne p15, 4, r4, r4, c14 @ Reset CNTVOFF to zero 1: - movspc, lr @ return to non-secure SVC - -_hyp_trap: - mrs lr, elr_hyp @ for older asm: .byte 0x00, 0xe3, 0x0e, 0xe1 - mov pc, lr @ do no switch modes, but - @ return to caller - + mov lr, ip + mov ip, #(F_BIT | I_BIT | A_BIT)@ Set A, I and F + tst lr, #1 @ Check for Thumb PC + orrne ip, ip, #T_BIT @ Set T if Thumb + orr ip, ip, r6 @ Slot target mode in + msr spsr_cxfs, ip @ Set full SPSR + movspc, lr @ ERET to non-secure + +ENTRY(_do_nonsec_entry) + mov ip, r0 + mov r0, r1 + mov r1, r2 + mov r2, r3 + smc #0
[U-Boot] [PATCH v4 00/10] ARMv7: add PSCI support to U-Boot
PSCI is an ARM standard that provides a generic interface that supervisory software can use to manage power in the following situations: - Core idle management - CPU hotplug - big.LITTLE migration models - System shutdown and reset It basically allows the kernel to offload these tasks to the firmware, and rely on common kernel side code that just calls into PSCI. More importantly, it gives a way to ensure that CPUs enter the kernel at the appropriate exception level (ie HYP mode, to allow the use of the virtualization extensions), even across events like CPUs being powered off/on or suspended. The main idea here is to turn some of the existing U-Boot code into a separate section that can live in secure RAM (or a reserved page of memory), containing a secure monitor that will implement the PSCI operations. This code will still be alive when U-Boot is long gone, hence the need for a piece of memory that will not be touched by the OS. This patch series contains 3 parts: - the first four patches are just bug fixes - the next two refactor the HYP/non-secure code to allow relocation in secure memory - the last four contain the generic PSCI code and DT infrastructure This implements the original 0.1 spec, as nobody implements the new 0.2 version so far. I plan to update this support to 0.2 once there is an official binding available (and support in the kernel). Most of the development has been done on an Allwinner A20 SoC, which is the main user of this code at the moment. I hope new SoCs will be using this method in the future (my primary goal for this series being to avoid more stupid SMP code from creeping up in the Linux kernel). As instructed, I've removed the A20 support code and made it a separate series, as there is now an effort to mainline this code (see Ian Campbell patch series). With these three series applied, the A20 now boots in HYP mode, Linux finds the secondary CPU without any SMP code present in the kernel, and runs KVM out of the box. The Xen/ARM guys managed to do the same fairly easily, as did at least one XVizor user. This code has also been tested on a VExpress TC2, running KVM with all 5 CPUs, in order to make sure there was no obvious regression. The code is also available at: git://git.kernel.org/pub/scm/linux/kernel/git/maz/u-boot.git wip/psci-v4 A fully merged branch with the A20 support is in the wip/psci-v4-a20 branch of the same repo. Cheers, M. From v3: - Return ARM_PSCI_RET_INVAL instead of ARM_PSCI_RET_NI when PSCI is entered with an invalid function code. - Fix !NONSEC compilation - Rebased on top of adcdeac From v2: - Dropped the secure stack allocation from the generic PSCI code. There was too little space there for it to be really useful, and the arch code knows a lot better about its requirements anyway. It is now the responsibility of the arch code to provide a stack. This allows it to get rid of the silly game with the thread registers that was confusing everyone... - Added provision for FIQ handling in secure mode. Allwinner A20 is going to require this for CPU_OFF. - Better integration of the FDT injection code with the rest of the code, fixing the truncated FDT issue that people have been reporting (courtesy of Ma Haijun). - Cleanup of the AW-specific code (stack allocation, timer macro). - Rebased on mainline U-Boot (on top of 22a240c32c13). From v1: - Complete rewrite, now directly relocating the secure code withing U-Boot, instead of having a separate psci blob. Ma Haijun (1): ARM: convert arch_fixup_memory_node to a generic FDT fixup function Marc Zyngier (9): ARM: HYP/non-sec: move switch to non-sec to the last boot phase ARM: HYP/non-sec: add a barrier after setting SCR.NS==1 ARM: non-sec: reset CNTVOFF to zero ARM: add missing HYP mode constant ARM: HYP/non-sec: add separate section for secure code ARM: HYP/non-sec: allow relocation to secure RAM ARM: HYP/non-sec: add generic ARMv7 PSCI code ARM: HYP/non-sec: add the option for a second-stage monitor ARM: HYP/non-sec/PSCI: emit DT nodes arch/arm/config.mk | 2 +- arch/arm/cpu/armv7/Makefile | 5 + arch/arm/cpu/armv7/nonsec_virt.S| 168 +--- arch/arm/cpu/armv7/psci.S | 102 +++ arch/arm/cpu/armv7/virt-dt.c| 100 +++ arch/arm/cpu/armv7/virt-v7.c| 59 --- arch/arm/cpu/u-boot.lds | 30 ++ arch/arm/include/asm/armv7.h| 11 ++- arch/arm/include/asm/proc-armv/ptrace.h | 2 + arch/arm/include/asm/psci.h | 35 +++ arch/arm/include/asm/secure.h | 26 + arch/arm/lib/bootm-fdt.c| 14 ++- arch/arm/lib/bootm.c| 27 +++-- arch/arm/lib/interrupts.c | 2 +- arch/arm/lib/sections.c | 2 + common/image-fdt.c | 7 +- include/common.h| 6 +-
[U-Boot] [PATCH v4 10/10] ARM: HYP/non-sec/PSCI: emit DT nodes
Generate the PSCI node in the device tree.
Also add a reserve section for the secure code that lives in
in normal RAM, so that the kernel knows it'd better not trip on
it.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/cpu/armv7/Makefile | 1 +
arch/arm/cpu/armv7/virt-dt.c | 100 +++
arch/arm/include/asm/armv7.h | 1 +
arch/arm/lib/bootm-fdt.c | 12 +-
4 files changed, 112 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/cpu/armv7/virt-dt.c
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index de1cc1a..44329cd 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -21,6 +21,7 @@ endif
ifneq ($(CONFIG_ARMV7_NONSEC)$(CONFIG_ARMV7_VIRT),)
obj-y += nonsec_virt.o
obj-y += virt-v7.o
+obj-y += virt-dt.o
endif
ifneq ($(CONFIG_ARMV7_PSCI),)
diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c
new file mode 100644
index 000..0b0d6a7
--- /dev/null
+++ b/arch/arm/cpu/armv7/virt-dt.c
@@ -0,0 +1,100 @@
+/*
+ * Copyright (C) 2013 - ARM Ltd
+ * Author: Marc Zyngier marc.zyng...@arm.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see http://www.gnu.org/licenses/.
+ */
+
+#include common.h
+#include stdio_dev.h
+#include linux/ctype.h
+#include linux/types.h
+#include asm/global_data.h
+#include libfdt.h
+#include fdt_support.h
+#include asm/armv7.h
+#include asm/psci.h
+
+static int fdt_psci(void *fdt)
+{
+#ifdef CONFIG_ARMV7_PSCI
+ int nodeoff;
+ int tmp;
+
+ nodeoff = fdt_path_offset(fdt, /cpus);
+ if (nodeoff 0) {
+ printf(couldn't find /cpus\n);
+ return nodeoff;
+ }
+
+ /* add 'enable-method = psci' to each cpu node */
+ for (tmp = fdt_first_subnode(fdt, nodeoff);
+tmp = 0;
+tmp = fdt_next_subnode(fdt, tmp)) {
+ const struct fdt_property *prop;
+ int len;
+
+ prop = fdt_get_property(fdt, tmp, device_type, len);
+ if (!prop)
+ continue;
+ if (len 4)
+ continue;
+ if (strcmp(prop-data, cpu))
+ continue;
+
+ fdt_setprop_string(fdt, tmp, enable-method, psci);
+ }
+
+ nodeoff = fdt_path_offset(fdt, /psci);
+ if (nodeoff 0) {
+ nodeoff = fdt_path_offset(fdt, /);
+ if (nodeoff 0)
+ return nodeoff;
+
+ nodeoff = fdt_add_subnode(fdt, nodeoff, psci);
+ if (nodeoff 0)
+ return nodeoff;
+ }
+
+ tmp = fdt_setprop_string(fdt, nodeoff, compatible, arm,psci);
+ if (tmp)
+ return tmp;
+ tmp = fdt_setprop_string(fdt, nodeoff, method, smc);
+ if (tmp)
+ return tmp;
+ tmp = fdt_setprop_u32(fdt, nodeoff, cpu_suspend,
ARM_PSCI_FN_CPU_SUSPEND);
+ if (tmp)
+ return tmp;
+ tmp = fdt_setprop_u32(fdt, nodeoff, cpu_off, ARM_PSCI_FN_CPU_OFF);
+ if (tmp)
+ return tmp;
+ tmp = fdt_setprop_u32(fdt, nodeoff, cpu_on, ARM_PSCI_FN_CPU_ON);
+ if (tmp)
+ return tmp;
+ tmp = fdt_setprop_u32(fdt, nodeoff, migrate, ARM_PSCI_FN_MIGRATE);
+ if (tmp)
+ return tmp;
+#endif
+ return 0;
+}
+
+int armv7_update_dt(void *fdt)
+{
+#ifndef CONFIG_ARMV7_SECURE_BASE
+ /* secure code lives in RAM, keep it alive */
+ fdt_add_mem_rsv(fdt, (unsigned long)__secure_start,
+ __secure_end - __secure_start);
+#endif
+
+ return fdt_psci(fdt);
+}
diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
index 11476dd..323f282 100644
--- a/arch/arm/include/asm/armv7.h
+++ b/arch/arm/include/asm/armv7.h
@@ -79,6 +79,7 @@ void v7_outer_cache_inval_range(u32 start, u32 end);
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
int armv7_init_nonsec(void);
+int armv7_update_dt(void *fdt);
/* defined in assembly file */
unsigned int _nonsec_init(void);
diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index 8394e15..d4f1578 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -17,13 +17,14 @@
#include common.h
#include fdt_support.h
+#include asm/armv7.h
DECLARE_GLOBAL_DATA_PTR;
int arch_fixup_fdt(void *blob)
{
bd_t *bd = gd-bd;
- int bank;
+ int
Re: [U-Boot] [PATCH v4 00/10] ARMv7: add PSCI support to U-Boot
On Sat, 26 Apr 2014 13:17:01 +0100 Marc Zyngier marc.zyng...@arm.com wrote: PSCI is an ARM standard that provides a generic interface that supervisory software can use to manage power in the following situations: - Core idle management - CPU hotplug - big.LITTLE migration models - System shutdown and reset It basically allows the kernel to offload these tasks to the firmware, and rely on common kernel side code that just calls into PSCI. More importantly, it gives a way to ensure that CPUs enter the kernel at the appropriate exception level (ie HYP mode, to allow the use of the virtualization extensions), even across events like CPUs being powered off/on or suspended. The main idea here is to turn some of the existing U-Boot code into a separate section that can live in secure RAM (or a reserved page of memory), containing a secure monitor that will implement the PSCI operations. This code will still be alive when U-Boot is long gone, hence the need for a piece of memory that will not be touched by the OS. This patch series contains 3 parts: - the first four patches are just bug fixes - the next two refactor the HYP/non-secure code to allow relocation in secure memory - the last four contain the generic PSCI code and DT infrastructure This implements the original 0.1 spec, as nobody implements the new 0.2 version so far. I plan to update this support to 0.2 once there is an official binding available (and support in the kernel). Most of the development has been done on an Allwinner A20 SoC, which is the main user of this code at the moment. I hope new SoCs will be using this method in the future (my primary goal for this series being to avoid more stupid SMP code from creeping up in the Linux kernel). As instructed, I've removed the A20 support code and made it a separate series, as there is now an effort to mainline this code (see Ian Campbell patch series). With these three series applied, the A20 now boots in HYP mode, Linux finds the secondary CPU without any SMP code present in the kernel, and runs KVM out of the box. The Xen/ARM guys managed to do the same fairly easily, as did at least one XVizor user. This code has also been tested on a VExpress TC2, running KVM with all 5 CPUs, in order to make sure there was no obvious regression. The code is also available at: git://git.kernel.org/pub/scm/linux/kernel/git/maz/u-boot.git wip/psci-v4 A fully merged branch with the A20 support is in the wip/psci-v4-a20 branch of the same repo. Cheers, M. From v3: - Return ARM_PSCI_RET_INVAL instead of ARM_PSCI_RET_NI when PSCI is entered with an invalid function code. - Fix !NONSEC compilation - Rebased on top of adcdeac From v2: - Dropped the secure stack allocation from the generic PSCI code. There was too little space there for it to be really useful, and the arch code knows a lot better about its requirements anyway. It is now the responsibility of the arch code to provide a stack. This allows it to get rid of the silly game with the thread registers that was confusing everyone... - Added provision for FIQ handling in secure mode. Allwinner A20 is going to require this for CPU_OFF. - Better integration of the FDT injection code with the rest of the code, fixing the truncated FDT issue that people have been reporting (courtesy of Ma Haijun). - Cleanup of the AW-specific code (stack allocation, timer macro). - Rebased on mainline U-Boot (on top of 22a240c32c13). From v1: - Complete rewrite, now directly relocating the secure code withing U-Boot, instead of having a separate psci blob. Ma Haijun (1): ARM: convert arch_fixup_memory_node to a generic FDT fixup function Marc Zyngier (9): ARM: HYP/non-sec: move switch to non-sec to the last boot phase ARM: HYP/non-sec: add a barrier after setting SCR.NS==1 ARM: non-sec: reset CNTVOFF to zero ARM: add missing HYP mode constant ARM: HYP/non-sec: add separate section for secure code ARM: HYP/non-sec: allow relocation to secure RAM ARM: HYP/non-sec: add generic ARMv7 PSCI code ARM: HYP/non-sec: add the option for a second-stage monitor ARM: HYP/non-sec/PSCI: emit DT nodes arch/arm/config.mk | 2 +- arch/arm/cpu/armv7/Makefile | 5 + arch/arm/cpu/armv7/nonsec_virt.S| 168 +--- arch/arm/cpu/armv7/psci.S | 102 +++ arch/arm/cpu/armv7/virt-dt.c| 100 +++ arch/arm/cpu/armv7/virt-v7.c| 59 --- arch/arm/cpu/u-boot.lds | 30 ++ arch/arm/include/asm/armv7.h| 11 ++- arch/arm/include/asm/proc-armv/ptrace.h | 2 + arch/arm/include/asm/psci.h | 35 +++ arch/arm/include/asm/secure.h | 26 + arch/arm/lib/bootm-fdt.c| 14 ++- arch/arm/lib/bootm.c| 27 +++--
Re: [U-Boot] [PATCH v4 00/10] ARMv7: add PSCI support to U-Boot
On 2014-04-26 15:24, Dennis Gilmore wrote: On Sat, 26 Apr 2014 13:17:01 +0100 Marc Zyngier marc.zyng...@arm.com wrote: PSCI is an ARM standard that provides a generic interface that supervisory software can use to manage power in the following situations: - Core idle management [...] this series fails to compile for me CC spl/arch/arm/cpu/armv7/virt-v7.o arch/arm/cpu/armv7/virt-v7.c: In function ‘armv7_init_nonsec’: arch/arm/cpu/armv7/virt-v7.c:128:41: error: ‘_smp_pen’ undeclared (first use in this function) smp_set_core_boot_addr((unsigned long)secure_ram_addr(_smp_pen), -1); ^ arch/arm/cpu/armv7/virt-v7.c:128:41: note: each undeclared identifier is reported only once for each function it appears in arch/arm/cpu/armv7/virt-v7.c:134:3: error: ‘_nonsec_init’ undeclared (first use in this function) secure_ram_addr(_nonsec_init)(); ^ is there a series I am missing? Interesting. What are you compiling for? Having the non-virt part built in the SPL is unexpected though.. Thanks, M. -- Fast, cheap, reliable. Pick two. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] RFC: convert MPC8536DS to use generic board
On 04/26/2014 02:22 AM, Wolfgang Denk wrote: Dear York Sun, In message 1398474623-4709-1-git-send-email-york...@freescale.com you wrote: Add #ifdef CONFIG_OF_CONTROL for reserve_fdt(), setup_fdt(), reloc_fdt(). This looks wrong to me. This is a global file, and you are affecting a ton of unrelated boards. Understood it is a global file. These functions deal with FDT. They should not be in the path if targets don't use device tree to configure their devices. If there is another more appropriate macro to use, please let me know. Take the example I used, MPC8536DS, the gd-fdt_blob would have incorrect value because it doesn't use device tree. Set initial value for gd. Powerpc SoCs use locked cache as init RAM. Well, some of them do, not all. arch/powerpc/lib/board.c uses this way. I presume it is safe to use for all PPC parts.nn Change return value for mac_read_from_eeprom() when mismatch happens to prevent calling hang(). You mean, you just ignore the error? This is a change of the cpolicy that has nothing to do with generic board support, right? Why should this be done now, i. e. why has it been accepted and considered to be working before? This function is helpful but not critical. If reading fails, the board should continue to boot then users will have a chance to fix it. The new generic board treats this as other functions in board_init_r. Any error will cause hanging. board/freescale/common/sys_eeprom.c |2 +- common/board_f.c| 18 +- include/configs/MPC8536DS.h |2 ++ 3 files changed, 20 insertions(+), 2 deletions(-) I think thease are at least 2, eventually 3 independent changes. You should split them in several commits. Again, this patch is for discussion. Once we are clear what we should fix, I will generate appropriate patch set. +#ifdef CONFIG_PPC +gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); +__asm__ __volatile__(:::memory); +#endif Again, this is a global change. Why is this now needed? It has been this way for powerpc. Do we have an alternative? York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [linux-sunxi] Uboot error: address not aligned in v7_dcache_inval_range
On Saturday, April 19, 2014 at 03:30:14 PM, Ian Campbell wrote:
On Sun, 2014-04-13 at 23:45 -0400, Shixin Zeng wrote:
Hi,
I compiled the current u-boot from
https://github.com/jwrdegoede/u-boot-sunxi.git for cubieboard2, and
wrote it to the SD card. I was trying to boot the kernel on my
computer over network by tftp, however it failed when I ran dhcp or
tftp command in uboot with a tons of:
ERROR: v7_dcache_inval_range - start address is not aligned - 0x7fb677e0
ERROR: v7_dcache_inval_range - stop address is not aligned - 0x7fb67820
I'm seeing this on Cubieboard2 and Cubietruck. It appears to be down to
a change to the upstream designware driver:
commit 50b0df814b0f75c08a3d45a017016a75af3edb5d
Author: Alexey Brodkin alexey.brod...@synopsys.com
Date: Wed Jan 22 20:49:09 2014 +0400
net/designware: make driver compatible with data cache
Up until now this driver only worked with data cache disabled.
To make it work with enabled data cache following changes were
required:
* Flush Tx/Rx buffer descriptors their modification
* Invalidate Tx/Rx buffer descriptors before reading its values
* Flush cache for data passed from CPU to GMAC
* Invalidate cache for data passed from GMAC to CPU
http://git.denx.de/?p=u-boot.git;a=commit;h=50b0df814b0f75c08a3d45a017016a7
5af3edb5d
I suppose this was only tested on some architecture which allows DMA
flush/invaidation at a fairly fine granularity (at least down to 4 byte
boundaries)
This was a sheer luck this ever worked. Looking at the entire driver, to fix
all
your issues with DMA and caches, it would be sufficient to re-align struct
dw_eth_dev properly.
See drivers/net/designware.h:
1) struct dmamacdescr {} is already __aligned(ARCH_DMA_MINALIGN)
= This structure, if aligned in memory to proper boundary, can be flushed/
invalidated without problems.
2) struct dw_eth_dev {} can be aligned to ANY 4-byte boundary
But this structure contains two arrays of struct dmamacdescr {} , which each
have their elements' lenght aligned to ARCH_DMA_MINALIGN
Solution:
Your patch [1/3] and reorder the structure in designware.h so that the
struct dmamacdescr tx_mac_descrtable[]
struct dmamacdescr rx_mac_descrtable[]
are first and anything that does not need to be aligned follows. This way, the
DMA descriptors will always be aligned and you need not worry about the
flushes.
You don't even need to ROUNDUP their length, since they are already fine.
When reordering the struct dw_eth_dev {}, make sure to add a comment about the
alignment.
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v3 2/9] sunxi: add sun7i pinmux and gpio support
On Friday, April 18, 2014 at 08:05:43 PM, Ian Campbell wrote: This patch adds the basic pinmux and gpio support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: Chen-Yu Tsai w...@csie.org Signed-off-by: Hans de Goede hdego...@redhat.com Signed-off-by: Ma Haijun mahaij...@gmail.com Signed-off-by: Oliver Schinagl oli...@schinagl.nl Signed-off-by: Henrik Nordström hen...@henriknordstrom.net Signed-off-by: Ian Campbell i...@hellion.org.uk Reviewed-by: Tom Rini tr...@ti.com Cc: Stefan Roese s...@denx.de Cc: Tom Cubie mr.hip...@gmail.com Acked-by: Marek Vasut ma...@denx.de Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 6/9] sunxi: add gmac Ethernet support
On Friday, April 18, 2014 at 08:05:47 PM, Ian Campbell wrote:
Add support for the GMAC Ethernet controller on Allwinner A20 (sun7i)
processors. Enable for the Cubietruck.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Signed-off-by: Jens Kuske jensku...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
v3: Based on c89867dca2e9 sunxi: clocks: clock_get_pll5
prototype and coding style.
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- drop accidentally doubled hunk
- use gpio setup functions
- moved before mmc patches
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle
.gnu.hash section in ldscripts vs v2014.01.
---
arch/arm/cpu/armv7/sunxi/board.c | 15 +++
boards.cfg | 2 +-
drivers/net/Makefile | 1 +
drivers/net/sunxi_gmac.c | 34 ++
include/configs/sunxi-common.h | 26 ++
include/netdev.h | 1 +
6 files changed, 78 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/sunxi_gmac.c
diff --git a/arch/arm/cpu/armv7/sunxi/board.c
b/arch/arm/cpu/armv7/sunxi/board.c index b5c0cb7..9755320 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -11,6 +11,8 @@
*/
#include common.h
+#include netdev.h
+#include miiphy.h
#include serial.h
#ifdef CONFIG_SPL_BUILD
#include spl.h
@@ -86,3 +88,16 @@ void enable_caches(void)
dcache_enable();
}
#endif
+
+#if defined(CONFIG_SUNXI_GMAC)
This is something line ifdef CONFIG_CMD_NET
+/*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
+ */
+int cpu_eth_init(bd_t *bis)
+{
+ sunxi_gmac_initialize(bis);
And this is CONFIG_SUNXI_GMAC ... what if I wanted to enable USB ethernet or
such ?
+
+ return 0;
Handle possible failures of sunxi_gmac_initialize() and propagate the return
value please.
[...]
+int sunxi_gmac_initialize(bd_t *bis)
Stick this into arch/arm/sunxi/... , there's no need to keep it in drivers/net/
as it's no real driver, but just a glue.
+{
+ int pin;
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* Set up clock gating */
+ setbits_le32(ccm-ahb_gate1, 0x1 AHB_GATE_OFFSET_GMAC);
+
+ /* Set MII clock */
+ setbits_le32(ccm-gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
+ CCM_GMAC_CTRL_GPIT_RGMII);
+
+ /* Configure pin mux settings for GMAC */
+ for (pin = SUNXI_GPA(0); pin = SUNXI_GPA(16); pin++) {
+ /* skip unused pins in RGMII mode */
+ if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14))
+ continue;
+ sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC);
+ sunxi_gpio_set_drv(pin, 3);
+ }
+
+ designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII);
+
+ return 0;
DTTO here, designware_initialize() might fail ...
+}
diff --git a/include/configs/sunxi-common.h
b/include/configs/sunxi-common.h index 3f7e314..b76c3b0 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -127,6 +127,32 @@
#define CONFIG_CONS_INDEX 1 /* UART0 */
+#ifdef CONFIG_SUNXI_GMAC
+#define CONFIG_DESIGNWARE_ETH/* GMAC can use designware
driver
*/
+#define CONFIG_DW_AUTONEG
+#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY
*/
+#define CONFIG_PHY_ADDR 1
+#define CONFIG_MII /* MII PHY management */
+#define CONFIG_PHYLIB
+#endif
+
+#ifdef CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
Do you really need this ?
+#define CONFIG_TIMESTAMP /* Needed by SNTP */
+#define CONFIG_CMD_DNS
+#define CONFIG_NETCONSOLE
+#define CONFIG_BOOTP_NISDOMAIN
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_NTPSERVER
+#define CONFIG_BOOTP_TIMEOFFSET
+#define CONFIG_BOOTP_MAY_FAIL
+#define CONFIG_BOOTP_SERVERIP
+#define CONFIG_BOOTP_DHCP_REQUEST_DELAY 5
Just delete this BOOTP nonsense.
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Re: [U-Boot] [PATCH v3 9/9] net/designware: Reduce DMA burst length
On Friday, April 18, 2014 at 08:05:50 PM, Ian Campbell wrote: From: Jens Kuske jensku...@gmail.com The GMAC module in Allwinner sunxi SoCs seems to have problems with burst lengths 8. Is there any explanation for the problems please ? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/9] sunxi: add sun7i clocks and timer support.
On Friday, April 18, 2014 at 08:05:42 PM, Ian Campbell wrote:
[...]
+static ulong read_timer(void)
+{
+ struct sunxi_timer_reg *timers =
+ (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
+ struct sunxi_timer *timer = timers-timer[TIMER_NUM];
+ /* The hardware timer counts down, therefore we invert to
+ * produce an incrementing timer. */
This comment doesn't follow coding style.
+ return ~readl(timer-val);
+}
[...]
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/3] net/designware: ensure device private data is DMA aligned.
On Saturday, April 19, 2014 at 03:52:20 PM, Ian Campbell wrote: struct dw_eth_dev contains fields which are accessed via DMA, so make sure it is aligned to a dma boundary. Without this I see: ERROR: v7_dcache_inval_range - start address is not aligned - 0x7fb677e0 Signed-off-by: Ian Campbell ian.campb...@citrix.com --- drivers/net/designware.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 6ece479..1120f70 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -412,7 +412,8 @@ int designware_initialize(ulong base_addr, u32 interface) * Since the priv structure contains the descriptors which need a strict * buswidth alignment, memalign is used to allocate memory */ - priv = (struct dw_eth_dev *) memalign(16, sizeof(struct dw_eth_dev)); + priv = (struct dw_eth_dev *) memalign(ARCH_DMA_MINALIGN, + sizeof(struct dw_eth_dev)); Acked-by: Marek Vasut ma...@denx.de Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 5/9] sunxi: add support for Cubietruck booting in FEL mode
On Friday, April 18, 2014 at 08:05:46 PM, Ian Campbell wrote: Signed-off-by: Oliver Schinagl oli...@schinagl.nl Signed-off-by: Jens Kuske jensku...@gmail.com Signed-off-by: Ian Campbell i...@hellion.org.uk Reviewed-by: Tom Rini tr...@ti.com Reviewed-by: Marek Vasut ma...@denx.de Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 8/9] sunxi: non-FEL SPL boot support for sun7i
On Friday, April 18, 2014 at 08:05:49 PM, Ian Campbell wrote:
Add support for booting from an MMC card.
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Henrik Nordström hen...@henriknordstrom.net
Signed-off-by: Ian Campbell i...@hellion.org.uk
Cc: Tom Cubie mr.hip...@gmail.com
[...]
+typedef unsigned char u8;
+typedef unsigned int u32;
Uh, really ? Just use uint8_t or uint32_t ...
+/* boot head definition from sun4i boot code */
+struct boot_file_head {
+ u32 jump_instruction; /* one intruction jumping to real code */
+ u8 magic[8];/* =eGON.BT0 or eGON.BT1, not C-style str */
+ u32 check_sum; /* generated by PC */
+ u32 length; /* generated by PC */
+#if 1
+ /* We use a simplified header, only filling in what is needed by the
+ * boot ROM. To be compatible with Allwinner tools the larger header
+ * below should be used, followed by a custom header if desired. */
+ u8 pad[12]; /* align to 32 bytes */
+#else
Please fix or remove dead code.
+ u32 pub_head_size; /* the size of boot_file_head */
+ u8 pub_head_vsn[4]; /* the version of boot_file_head */
+ u8 file_head_vsn[4];/* the version of boot0_file_head or
+boot1_file_head */
+ u8 Boot_vsn[4]; /* Boot version */
+ u8 eGON_vsn[4]; /* eGON version */
+ u8 platform[8]; /* platform information */
+#endif
+};
+
+#define BOOT0_MAGIC eGON.BT0
+#define STAMP_VALUE 0x5F0A6C39
+
+/* check sum functon from sun4i boot code */
+int gen_check_sum(void *boot_buf)
+{
+ struct boot_file_head *head_p;
+ u32 length;
+ u32 *buf;
+ u32 loop;
+ u32 i;
+ u32 sum;
+
+ head_p = (struct boot_file_head *)boot_buf;
+ length = head_p-length;
+ if ((length 0x3) != 0)/* must 4-byte-aligned */
+ return -1;
+ buf = (u32 *)boot_buf;
This will cause unaligned access if ran on ARM and boot_buf is not aligned.
+ head_p-check_sum = STAMP_VALUE;/* fill stamp */
+ loop = length 2;
+
+ /* calculate the sum */
+ for (i = 0, sum = 0; i loop; i++)
+ sum += buf[i];
+
+ /* write back check sum */
+ head_p-check_sum = sum;
+
+ return 0;
+}
+
+#define ALIGN(x, a) __ALIGN_MASK((x), (typeof(x))(a)-1)
+#define __ALIGN_MASK(x, mask) (((x)+(mask))~(mask))
Isn't this already defined in include/common.h ?
Looks like this tool might as well be wrapped into the mkimage toolset ...
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Re: [U-Boot] [PATCH v3 3/9] sunxi: add sun7i dram setup support
On Friday, April 18, 2014 at 08:05:44 PM, Ian Campbell wrote: This patch adds DRAM initialisation support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: Alexandru Gagniuc mr.nuke...@gmail.com Signed-off-by: Emilio López emi...@elopez.com.ar Signed-off-by: Hans de Goede hdego...@redhat.com Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net Signed-off-by: Jens Kuske jensku...@gmail.com Signed-off-by: Luke Leighton l...@lkcl.net Signed-off-by: Oliver Schinagl oli...@schinagl.nl Signed-off-by: Stefan Roese s...@denx.de Signed-off-by: Ian Campbell i...@hellion.org.uk Cc: Tom Cubie mr.hip...@gmail.com There's a lot of unbounded endless loops [ while (cond) ; ] in this patch. Add timeouts and handle them please, otherwise the board would get stuck during boot and you won't know why. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 7/9] sunxi: mmc support
On Friday, April 18, 2014 at 08:05:48 PM, Ian Campbell wrote:
This adds support for the MMC controller on the Allwinner A20 (sun7i)
processor.
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Luke Leighton l...@lkcl.net
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Wills Wang wills.wang.o...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
Cc: Stefan Roese s...@denx.de
Cc: Tom Cubie mr.hip...@gmail.com
Cc: Aaron Maoye leafy.m...@allwinnertech.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
[...]
+static int mmc_clk_io_on(int sdc_no)
+{
+ unsigned int pin;
+ unsigned int rval;
+ unsigned int pll_clk;
+ unsigned int divider;
+ struct sunxi_mmc_host *mmchost = mmc_host[sdc_no];
+ struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ debug(init mmc %d clock and io\n, sdc_no);
+
+ /* config gpio */
+ switch (sdc_no) {
+ case 0:
+ /* D1-PF0, D0-PF1, CLK-PF2, CMD-PF3, D3-PF4, D4-PF5 */
+ for (pin = SUNXI_GPF(0); pin = SUNXI_GPF(5); pin++) {
+ sunxi_gpio_set_cfgpin(pin, SUNXI_GPF0_SDC0);
+ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_drv(pin, 2);
+ }
+ break;
Pinmux config is part of board files , not part of driver.
[...]
Best regards,
Marek Vasut
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[U-Boot] DA850EVM with USE_NAND config does not pad the AIS file
I'm a U-Boot newbie so please feel free to correct how I'm reporting this issue.. I recently downloaded the 2014.04-rc3 snapshot to build U-Boot for my custom DA850-based board. The only change was to add a new target dav850evm_nand in boards.cfg with the added parameter USE_NAND. The resulting AIS file was programmed into EVM-compatible NAND using standard sfh_OMAP-L138 method. The board failed to boot, and stayed in a loop printing the SPL console message repeatedly. After some debugging with CCS 5.5 and an XDS100v2, I found that incorrect code was being loaded into the 0xc108000 RAM destination. The da850evm.h file defines CONFIG_SYS_NAND_U_BOOT_OFFS as 0x28000, which corresponds to an AIS offset of 0x8000 but the u-boot header did not appear there in the AIS file. A search revealed that the Makefile catenated u-boot immediately after the SPL without any padding. Further investigation revealed that the target Makefile needs CONFIG_SPL_MAX_SIZE to be defined as 0x8000 in order for the padding to be performed properly; however, this constant was apparently deleted during a series of changes in April, 2013 to accommodate separate code and BSS size limits for another target. In its place, CONFIG_SPL_MAX_FOOTPRINT was defined as 32768. Unfortunately, the da850evm Makefile does not refer to this constant. To solve the problem, I added the following 2 lines in my custom-modified da850evm.h: #define CONFIG_SPL_PAD_TO0x8000 #define CONFIG_SPL_MAX_SIZE 0x8000 although the first line may not be strictly required. This solved the problem and allowed the board to boot. Doesn't this mean that other similar targets may be broken? How can I assist with contributing the patch to fix this? One problem I have is that I only have an EXP, not an EVM board. My custom target board shares some features with the EVM such as NOR and NAND memory, but other things are different like the use of a fixed PHY. This makes it impossible for me to completely verify a da850evm build. I would like to see more target configurations available for the DA850EVM but it seems like development for this has stopped. NAND boot was a simple change, but adding USB support required me to copy paste code from the da830evm target. Are there any future plans to do this, or will I need to do this development for my custom board only? Tom Taylor ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] RFC: convert MPC8536DS to use generic board
Dear York Sun, In message 535be09f.80...@freescale.com you wrote: Add #ifdef CONFIG_OF_CONTROL for reserve_fdt(), setup_fdt(), reloc_fdt(). This looks wrong to me. This is a global file, and you are affecting a ton of unrelated boards. Understood it is a global file. These functions deal with FDT. They should not It appears you assume every board using the DT has CONFIG_OF_CONTROL set in its configuration? For example, all PPC boards have been using the DT for years, but count how many of them define CONFIG_OF_CONTROL ... How many other boards have you actually tested with this modification applied? Set initial value for gd. Powerpc SoCs use locked cache as init RAM. Well, some of them do, not all. arch/powerpc/lib/board.c uses this way. I presume it is safe to use for all PPC parts.nn At least your comment is wrong. And again: how many other boards have actually been testes? And why is this now necessary? Everything has been working perfectly fine without that for all other boards - so why do we now need such a global modification just for this specific board? Change return value for mac_read_from_eeprom() when mismatch happens to prevent calling hang(). You mean, you just ignore the error? This is a change of the cpolicy that has nothing to do with generic board support, right? Why should this be done now, i. e. why has it been accepted and considered to be working before? This function is helpful but not critical. If reading fails, the board should continue to boot then users will have a chance to fix it. The new generic board treats this as other functions in board_init_r. Any error will cause hanging. You repeat yourself, but you do not answer my questions. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de What is mind? No matter. What is matter? Never mind. -- Thomas Hewitt Key, 1799-1875 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] RFC: convert MPC8536DS to use generic board
Hi York, On 26 April 2014 10:36, York Sun york...@freescale.com wrote: On 04/26/2014 02:22 AM, Wolfgang Denk wrote: Dear York Sun, In message 1398474623-4709-1-git-send-email-york...@freescale.com you wrote: Add #ifdef CONFIG_OF_CONTROL for reserve_fdt(), setup_fdt(), reloc_fdt(). This looks wrong to me. This is a global file, and you are affecting a ton of unrelated boards. Understood it is a global file. These functions deal with FDT. They should not be in the path if targets don't use device tree to configure their devices. If there is another more appropriate macro to use, please let me know. Take the example I used, MPC8536DS, the gd-fdt_blob would have incorrect value because it doesn't use device tree. It should be NULL, so none of this code will do anything. See the code at the top of board_init_f(): #if !defined(CONFIG_CPM2) !defined(CONFIG_MPC512X) \ !defined(CONFIG_MPC83xx) !defined(CONFIG_MPC85xx) \ !defined(CONFIG_MPC86xx) !defined(CONFIG_X86) zero_global_data(); #endif For x86 the data is zeroed for us by previous start-up code. Possibly the same is true of ARM. For the MPC devices I copied what was there, but it is possible that it shold be zeroed, or at least fdt_blob should be zeroed. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Start the deprecation process for generic board
Hi York, On 25 April 2014 16:29, York Sun york...@freescale.com wrote: On 03/22/2014 04:14 PM, Simon Glass wrote: We should move forward to remove the old board init code. Add a prominent message to encourage maintainers to get started on this work. Signed-off-by: Simon Glass s...@chromium.org --- Simon, How much test has been done on powerpc boards? I randomly pick one MPC8536DS and it doesn't work. I have spent hours to track the difference and I am still struggling. I understand the first one could be more work, but if you have done any, especially 85xx family, please let me know. I don't have any of those boards. I believe Wolfgang tested three of them some time ago. See my other message - board_init_f() doesn't zero the global_data structure. It needs to be zeroed so make sure it is done elsewhere. Originally the code uses the cache which may have been zeroed, but now global_data is on the stack (still cache but maybe a different part?). Sorry I don't understand PowerPC very well, so I'm not sure of the pre-conditions. Also, can you please be more specific about the failure? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 00/10] ARMv7: add PSCI support to U-Boot
On Sat, 26 Apr 2014 17:31:03 +0100 Marc Zyngier marc.zyng...@arm.com wrote: On 2014-04-26 15:24, Dennis Gilmore wrote: On Sat, 26 Apr 2014 13:17:01 +0100 Marc Zyngier marc.zyng...@arm.com wrote: PSCI is an ARM standard that provides a generic interface that supervisory software can use to manage power in the following situations: - Core idle management [...] this series fails to compile for me CC spl/arch/arm/cpu/armv7/virt-v7.o arch/arm/cpu/armv7/virt-v7.c: In function ‘armv7_init_nonsec’: arch/arm/cpu/armv7/virt-v7.c:128:41: error: ‘_smp_pen’ undeclared (first use in this function) smp_set_core_boot_addr((unsigned long)secure_ram_addr(_smp_pen), -1); ^ arch/arm/cpu/armv7/virt-v7.c:128:41: note: each undeclared identifier is reported only once for each function it appears in arch/arm/cpu/armv7/virt-v7.c:134:3: error: ‘_nonsec_init’ undeclared (first use in this function) secure_ram_addr(_nonsec_init)(); ^ is there a series I am missing? Interesting. What are you compiling for? Having the non-virt part built in the SPL is unexpected though.. Cubietruck trying to pull in the patches so we can support it in Fedora, ended up being user error. I did a make mrproper and reconfigured then it built fine. Dennis ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/11] kconfig: import Kconfig files from Linux v3.14 tag
On 23 April 2014 23:04, Masahiro Yamada yamad...@jp.panasonic.com wrote: Import - All files under scripts/kconfig/ - include/linux/kconfig.h from Linux Kernel v3.14. I know they include lots of trailing spaces but I keep intentionally them untouched. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Reviewed-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] usbtty using i.MX6
Hello, I'd like to know if someone has succeed in using usbtty with i.MX6. I am interested in using it for one board but been not succed, it seems: /home/otavio/hacking/u-boot/drivers/serial/usbtty.c:553: undefined reference to `udc_init' drivers/serial/built-in.o: In function `usbtty_init_instances': /home/otavio/hacking/u-boot/drivers/serial/usbtty.c:686: undefined reference to `udc_setup_ep' /home/otavio/hacking/u-boot/drivers/serial/usbtty.c:708: undefined reference to `urb_link_init' /home/otavio/hacking/u-boot/drivers/serial/usbtty.c:709: undefined reference to `urb_link_init' /home/otavio/hacking/u-boot/drivers/serial/usbtty.c:710: undefined reference to `urb_link_init ... Does someone got it working? -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 02/11] Do not apply: tools: add genkconfig
Hi Masahiro,
On 23 April 2014 23:04, Masahiro Yamada yamad...@jp.panasonic.com wrote:
Do not apply this patch to the main line
What is this tool?
--
This tool converts boards.cfg to defconfig and Kconfig files.
It automatically generates
- arch/${ARCH}/Kconfig
- board/Kconfig
- board/${VENDOR}/${BOARD}/Kconfig
- board/${BOARD}/Kconfig
- configs/*_defconfig
How to use?
---
Open tools/print_allconfigs with an editor.
Adjust cross compilers part for your environment.
# Specify your favoriate cross tools
CROSS_COMPILE_ARC=arc-linux-
CROSS_COMPILE_AARCH64=aarch64-linux-gnu-
CROSS_COMPILE_ARM=arm-unknown-linux-gnueabi-
[snip]
CROSS_COMPILE_X86=i386-linux-
And then, run tools/genkconfig.
Why is this patch here?
---
The file boards.cfg is touched very frequently.
All the time, new/old boards are being added/removed.
The next commit was generated based on the u-boot/master at the time
I posted it.
It will become out-dated soon.
You can update it with this tool.
Will this tool become useless once this series is applied?
Regards,
Simon
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
tools/genkconfig | 253
+
tools/print_allconfigs | 77 +++
2 files changed, 330 insertions(+)
create mode 100755 tools/genkconfig
create mode 100755 tools/print_allconfigs
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