Re: [U-Boot] [PATCH] lcd: Add support for CONFIG_LCD_NOSTDOUT
Hi Jeroen, many thanks for answer. Unfortunately no. The LCD-framework does overrule this environment settings. I guess the reason for this behaviour is, that environment ist loaded _before_ the lcd-driver is initialized. best regards, hannes Jeroen Hofstee wrote: On do, 2014-03-06 at 15:26 +0100, Hannes Petermaier wrote: - Adds support for CONFIG_LCD_NOSTDOUT, which prevents switching stdout to the LCD screen, usefull in case when only lcd_puts(...), lcd_printf(...) is used for displaying status informations. Signed-off-by: Hannes Petermaier oe5...@oevsv.at --- Perhaps I am missing something, but doesn't 'setenv stdout serial' not already do what you want to achieve? Regards, Jeroen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] fsl/pci: Add workaround for erratum A-005434
For BSC9132 platform, all PEX inbound windows PEX_PEXIWARn[TRGT]
defaults to 0xF, which is mapped to CCSRBAR. However, for other
products, 0xF is mapped to the local memory. Therefore, for the
BSC9132, any default PCI Express access to the local memory (DDR)
will now access the CCSRBAR.
This patch can change the mapping of targets of inbound windows
PEX_PEXIWARn[TRGT] to the following value:
Local address space – 0x0 (from 0xF)
Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
Signed-off-by: Chunhe Lan chunhe@freescale.com
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c |3 +++
arch/powerpc/include/asm/config_mpc85xx.h |1 +
drivers/pci/fsl_pci_init.c|9 +++--
3 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 8b79c05..4bf5bc7 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -277,6 +277,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
if (has_erratum_a006261())
puts(Work-around for Erratum A006261 enabled\n);
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A005434
+ puts(Work-around for Erratum A-005434 enabled\n);
+#endif
return 0;
}
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch/powerpc/include/asm/config_mpc85xx.h
index df44451..94c769d 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -583,6 +583,7 @@
#define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
#define CONFIG_SYS_FSL_PCIE_COMPAT fsl,qoriq-pcie-v2.2
#define CONFIG_SYS_FSL_ERRATUM_A005125
+#define CONFIG_SYS_FSL_ERRATUM_A005434
#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
#define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
#define CONFIG_ESDHC_HC_BLK_ADDR
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index 6317fb1..3a41b0e 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -49,8 +49,13 @@ static void set_inbound_window(volatile pit_t *pi,
u64 size)
{
u32 sz = (__ilog2_u64(size) - 1);
- u32 flag = PIWAR_EN | PIWAR_LOCAL |
- PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;
+#ifdef CONFIG_SYS_FSL_ERRATUM_A005434
+ u32 flag = 0;
+#else
+ u32 flag = PIWAR_LOCAL;
+#endif
+
+ flag |= PIWAR_EN | PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;
out_be32(pi-pitar, r-phys_start 12);
out_be32(pi-piwbar, r-bus_start 12);
--
1.7.6.5
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[U-Boot] booting signed Images
Hello Simon, just talked with Wolfgang about the booting process from signed images, as it is described in: doc/uImage.FIT/verified-boot.txt doc/uImage.FIT/signature.txt If we see it correct, then it is still possible to boot an uImage or a FIT image without signature with bootm when CONFIG_FIT_SIGNATURE is defined. The question raised, if this is a good behaviour. Should we not prevent booting uImages or not signed FIT Images when CONFIG_FIT_SIGNATURE is defined? Or at least prevent booting such unsigned images through an U-Boot env variable. What Do you think? Thanks in advance bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 01/12] mmc: mmc header fix
Hi Mateusz, Structure definition used type block_dev_desc_t, defined in part.h, which wasn't included in mmc.h. It worked only in circumstances when common.h, or another header using part.h was incuded in implementation files. Signed-off-by: Mateusz Zalega m.zal...@samsung.com Cc: Minkyu Kang mk7.k...@samsung.com Cc: Pantelis Antoniou pa...@antoniou-consulting.com Applied to u-boot-dfu branch. -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 02/12] part: header fix
Hi Mateusz, Implementation made use of types defined in common.h, even though it wasn't #included. It worked in circumstances when .c files included every needed header (all). Signed-off-by: Mateusz Zalega m.zal...@samsung.com Cc: Tom Rini tr...@ti.com Cc: Minkyu Kang mk7.k...@samsung.com Applied to u-boot-dfu branch. -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 03/12] usb: dfu: fix boards wo USB cable detection
Hi Mateusz, Former usb_cable_connected() patch broke compilation of boards which do not support this feature. I've renamed usb_cable_connected() to g_dnl_usb_cable_connected() and added its default implementation to gadget downloader driver code. There's only one driver of this kind and it's unlikely there'll be another, so there's no point in keeping it in /common. Previously this function was declared in usb.h. I've moved it, since it's more appropriate to keep it in g_dnl.h - usb.h seems to be intended for USB host implementation. Existing code, confronted with default -EOPNOTSUPP return value, continues as if the cable was connected. CONFIG_USB_CABLE_CHECK was removed. Signed-off-by: Mateusz Zalega m.zal...@samsung.com Cc: Lukasz Majewski l.majew...@samsung.com Cc: Marek Vasut ma...@denx.de Applied to u-boot-dfu. Thanks -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 04/12] dfu: mmc: raw data write fix
Hi Mateusz, When user attempted to perform a raw write using DFU (vide dfu_fill_entity_mmc) with MMC interface not initialized before, get_mmc_blk_size() reported invalid (zero) block size - it wasn't possible to write ie. a new u-boot image. This commit fixes that by initializing MMC device before use in dfu_fill_entity_mmc(). While fixing initialization sequence, I had to change about half of dfu_fill_entity_mmc's body, so I refactored it on the way to make it, IMHO, considerably more comprehensible. Being left as dead code, get_mmc_blk_size() was removed. Tested on Samsung Goni. Signed-off-by: Mateusz Zalega m.zal...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com Acked-by: Lukasz Majewski l.majew...@samsung.com Acked-by: Tom Rini tr...@ti.com Cc: Minkyu Kang mk7.k...@samsung.com Applied to u-boot-dfu. Thanks. -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 05/12] dfu: mmc: change offset base handling
Hi Mateusz, Previously offsets handled by dfu_fill_entity_mmc(), defined in boards' CONFIG_DFU_ALT were treated as hexadecimal regardless of their prefix, which sometimes led to confusion. This patch forces usage of explicit numerical base prefixes. Signed-off-by: Mateusz Zalega m.zal...@samsung.com Cc: Lukasz Majewski l.majew...@samsung.com Cc: Tom Rini tr...@ti.com Cc: Minkyu Kang mk7.k...@samsung.com Applied to u-boot-dfu. Thanks. -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 06/12] ums: always initialize mmc before ums_disk_init()
Hi Mateusz,
In cases when MMC hadn't been initialized before, ie. by the user or
other subsystem, it was still uninitialized while UMS media capacity
check, leading to broken ums command.
UMS has to initialize resources it uses.
Tested on Samsung Goni.
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Tested-by: Mateusz Zalega m.zal...@samsung.com
Acked-by: Lukasz Majewski l.majew...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Applied to u-boot-dfu. THanks,
---
Changes since v3:
- Added const attribute of ums_disk_init introduced type warnings. It
would take a lot of changes to MMC core code to fix it, so it was
dropped, even though ums_disk_init shouldn't and doesn't change
struct mmc it is passed. Changes since v4:
- added slightly more detailed commit message
---
board/samsung/common/ums.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/board/samsung/common/ums.c b/board/samsung/common/ums.c
index dc155ad..cebabe9 100644
--- a/board/samsung/common/ums.c
+++ b/board/samsung/common/ums.c
@@ -66,11 +66,9 @@ static struct ums *ums_disk_init(struct mmc *mmc)
struct ums *ums_init(unsigned int dev_num)
{
- struct mmc *mmc = NULL;
+ struct mmc *mmc = find_mmc_device(dev_num);
- mmc = find_mmc_device(dev_num);
- if (!mmc)
+ if (!mmc || mmc_init(mmc))
return NULL;
-
return ums_disk_init(mmc);
}
--
Best regards,
Lukasz Majewski
Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH v5 07/12] am335x: dfu: disable DFU in am335x_evm SPL build
Hi Mateusz, Future patches will make DFU too large to fit in this board's SPL build. Signed-off-by: Mateusz Zalega m.zal...@samsung.com Acked-by: Tom Rini tr...@ti.com Reviewed-by: Lukasz Majewski l.majew...@samsung.com Applied to u-boot-dfu. THanks. -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 08/12] USB: gadget: added a saner gadget downloader registration API
Hi Mateusz, Preprocessor definitions and hardcoded implementation selection in g_dnl core were replaced by a linker list made of (usb_function_name, bind_callback) pairs. Signed-off-by: Mateusz Zalega m.zal...@samsung.com Acked-by: Lukasz Majewski l.majew...@samsung.com Acked-by: Marek Vasut ma...@denx.de Applied to u-boot-dfu. Thanks. -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] USB: gadget: save driver name before registering it
Hi Stephen, From: Stephen Warren swar...@nvidia.com g_dnl_register() currently first attempts to register a composite driver by name, and then saves the driver name once it's registered. Internally to the registration code, g_dnl_do_config() is called and attempts to compare the composite device's name with the list of known device names. This fails since the composite device's name has not yet been stored. This means that the first time ums 0 0 is run, it fails, but subsequent attempts succeed. Re-order the name-saving and registration code to solve this. Fixes: e5b834e07f51 (USB: gadget: added a saner gadget downloader registration API) Signed-off-by: Stephen Warren swar...@nvidia.com Applied to u-boot-dfu. Thanks. -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request: u-boot-dfu
Hi Marek, Please find following PR. I have also added commit from Stephen, since it immediately fixes problem with the current code. And linker list documentation update, since this fix emerged during the work with this code. The following changes since commit 2fc5dab2ed19b6e15ba0726905b6311793397806: usb: gadget: allow ci_udc to build with new gadget framework (2014-05-01 12:44:24 +0200) are available in the git repository at: git://git.denx.de/u-boot-dfu.git master for you to fetch changes up to af41d6b4cb1602abebaaa9c8774a9b0ece564796: common: fixed linker-list example (2014-05-05 10:24:13 +0200) Mateusz Zalega (9): mmc: mmc header fix part: header fix usb: dfu: fix boards wo USB cable detection dfu: mmc: raw data write fix dfu: mmc: change offset base handling ums: always initialize mmc before ums_disk_init() am335x: dfu: disable DFU in am335x_evm SPL build USB: gadget: added a saner gadget downloader registration API common: fixed linker-list example Stephen Warren (1): USB: gadget: save driver name before registering it README |7 --- board/samsung/common/ums.c |6 ++ board/samsung/origen/origen.c|7 --- board/samsung/trats/trats.c |4 +--- board/samsung/trats2/trats2.c|4 +--- board/samsung/universal_c210/universal.c |7 --- common/cmd_dfu.c |3 +-- common/cmd_thordown.c|3 +-- common/cmd_usb_mass_storage.c| 10 +++--- drivers/dfu/dfu_mmc.c| 109 + drivers/usb/gadget/f_dfu.c |3 +++ drivers/usb/gadget/f_mass_storage.c | 11 +++ drivers/usb/gadget/f_thor.c |2 ++ drivers/usb/gadget/g_dnl.c | 66 -- include/configs/am335x_evm.h | 10 ++ include/configs/exynos4-dt.h |1 - include/configs/trats.h |4 ++-- include/configs/trats2.h |4 ++-- include/dfu.h| 12 include/g_dnl.h | 24 include/linker_lists.h | 2 +- include/mmc.h|1 + include/part.h |1 + include/thor.h |8 include/usb.h| 10 -- include/usb_mass_storage.h |8 26 files changed, 163 insertions(+), 164 deletions(-) -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] common: fixed linker-list example
Hi Mateusz,
Last argument shouldn't be there.
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
Acked-by: Marek Vasut ma...@denx.de
Cc: Tom Rini tr...@ti.com
---
Detached from earlier DFU, MMC, Gadget, Goni, misc. series because
of lack of relevance to other patches.
v2:
- deleted change-id line from commit message, sorry!
Applied to u-boot-dfu. Thanks.
---
include/linker_lists.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linker_lists.h b/include/linker_lists.h
index 997d149..557e627 100644
--- a/include/linker_lists.h
+++ b/include/linker_lists.h
@@ -228,7 +228,7 @@
* and it's name.
*
* Example:
- * ll_entry_declare(struct my_sub_cmd, my_sub_cmd, cmd_sub, cmd.sub)
= {
+ * ll_entry_declare(struct my_sub_cmd, my_sub_cmd, cmd_sub) = {
* .x = 3,
* .y = 4,
* };
--
Best regards,
Lukasz Majewski
Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH 03/12] MX6: add common SPL configuration
Hi Tim, On 28/04/2014 22:17, Tim Harvey wrote: Add a common header which can hopefully be shared amon imx6 SPL users Signed-off-by: Tim Harvey thar...@gateworks.com --- v2: - adjust CONFIG_SPL_TEXT_BASE, CONFIG_SPL_STACK and CONFIG_SPL_MAX_SIZE to accomodate the IMX6SOLO/DUALLITE which have half the iRAM of the IMX6DUAL/IMX6QUAD --- include/configs/imx6_spl.h | 71 ++ 1 file changed, 71 insertions(+) create mode 100644 include/configs/imx6_spl.h diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h new file mode 100644 index 000..20078cc --- /dev/null +++ b/include/configs/imx6_spl.h @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2014 Gateworks Corporation + * Author: Tim Harvey thar...@gateworks.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __IMX6_SPL_CONFIG_H +#define __IMX6_SPL_CONFIG_H + +#ifdef CONFIG_SPL + +#define CONFIG_SPL_FRAMEWORK + +/* + * see Figure 8-3 in IMX6DQ/IMX6SDL Reference manuals: + * - IMX6 OCRAM (IRAM) is from 0x00907000 to 0x0091 (IMX6SLD) + * - IMX6DQ has 2x IRAM of IMX6SLD but we intend to support IMX6SLD as well + * - BOOT ROM stack is at 0x0091FFB8 + * - if icache/dcache is enabled (eFuse/strapping controlled) then the + *IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to + *fit between 0x00907000 and 0x00918000. + * - Additionally the BOOT ROM loads what they consider the firmware image + *which consists of a 4K header in front of us that contains the IVT, DCD + *and some padding thus 'our' max size is really 0x00908000 - 0x00918000 + *or 64KB + */ +#define CONFIG_SPL_LDSCRIPT arch/arm/cpu/armv7/omap-common/u-boot-spl.lds +#define CONFIG_SPL_TEXT_BASE 0x00908000 +#define CONFIG_SPL_MAX_SIZE (64 * 1024) +#define CONFIG_SPL_START_S_PATH arch/arm/cpu/armv7 +#define CONFIG_SPL_STACK 0x0091FFB8 +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT + +/* NAND support */ +#if defined(CONFIG_SPL_NAND_SUPPORT) +#define CONFIG_SPL_NAND_MXS +#define CONFIG_SPL_DMA_SUPPORT +#endif + +/* MMC support */ +#if defined(CONFIG_SPL_MMC_SUPPORT) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 138 /* offset 69KB */ +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ +#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 +#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS/2*1024) +#endif + +/* SATA support */ +#if defined(CONFIG_SPL_SATA_SUPPORT) +#define CONFIG_SPL_SATA_BOOT_DEVICE 0 +#define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1 +#endif + +/* Define the payload for FAT/EXT support */ +#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME u-boot.img +#define CONFIG_SPL_LIBDISK_SUPPORT +#endif + +#define CONFIG_SPL_BSS_START_ADDR0x1820 +#define CONFIG_SPL_BSS_MAX_SIZE 0x10/* 1 MB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x1830 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x320 /* 50 MB */ +#define CONFIG_SYS_TEXT_BASE 0x1780 +#endif + +#endif I generally agree with the idea having a common setup - this simplifies porting of new boards to SPL ! Apart the small typos found by Eric/Igor: Acked-by: Stefano Babic sba...@denx.de Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 05/12] MX6: add boot device support for SPL
Hi Tim,
On 28/04/2014 22:17, Tim Harvey wrote:
Add a common spl.c file to support boot device functions needed for SPL
such as detecting the boot device.
Signed-off-by: Tim Harvey thar...@gateworks.com
---
v2:
- re-base on top of Masahiro Yamada's consolidation patch:
http://patchwork.ozlabs.org/patch/341817/
- moved spl_boot_device() and get_boot_mode() into own common imx spl.c file
- use mem-mapped structure for smbr reg access
---
arch/arm/imx-common/Makefile | 1 +
arch/arm/imx-common/spl.c| 79
2 files changed, 80 insertions(+)
create mode 100644 arch/arm/imx-common/spl.c
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index b04dfbb..c97ea48 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
endif
ifeq ($(SOC),$(filter $(SOC),mx6 mxs))
obj-y+= misc.o
+obj-$(CONFIG_SPL_BUILD) += spl.o
endif
ifeq ($(SOC),$(filter $(SOC),mx6))
obj-$(CONFIG_CMD_SATA) += sata.o
diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c
new file mode 100644
index 000..5c1667c
--- /dev/null
+++ b/arch/arm/imx-common/spl.c
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2014 Gateworks Corporation
+ * Author: Tim Harvey thar...@gateworks.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
Just a little remark. Do you have written the function on your own or
have you ported it from Freescale's 2009.08 ? Apart names, it looks similar.
If this is the case, you should also add Freescale's Copyright to the
header.
+#include common.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/spl.h
+#include spl.h
+
+#if defined(CONFIG_MX6)
+/* determine boot device from SRC_SBMR1 register (BOOT_CFG[4:1]) */
+u32 spl_boot_device(void)
+{
+ struct src *psrc = (struct src *)SRC_BASE_ADDR;
+ unsigned reg = readl(psrc-sbmr1);
+
+ /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
+ switch ((reg 0x00FF) 4) {
+ /* EIM: See 8.5.1, Table 8-9 */
+ case 0x0:
+ /* BOOT_CFG1[3]: NOR/OneNAND Selection */
+ if ((reg 0x0008) 3)
+ return BOOT_DEVICE_ONENAND;
+ else
+ return BOOT_DEVICE_NOR;
+ break;
+ /* SATA: See 8.5.4, Table 8-20 */
+ case 0x2:
+ return BOOT_DEVICE_SATA;
+ /* Serial ROM: See 8.5.5.1, Table 8-22 */
+ case 0x3:
+ /* BOOT_CFG4[2:0] */
+ switch ((reg 0x0700) 24) {
+ case 0x0 ... 0x4:
+ return BOOT_DEVICE_SPI;
+ case 0x5 ... 0x7:
+ return BOOT_DEVICE_I2C;
+ }
+ break;
+ /* SD/eSD: 8.5.3, Table 8-15 */
+ case 0x4:
+ case 0x5:
+ return BOOT_DEVICE_MMC1;
+ /* MMC/eMMC: 8.5.3 */
+ case 0x6:
+ case 0x7:
+ return BOOT_DEVICE_MMC1;
+ /* NAND Flash: 8.5.2 */
+ case 0x8 ... 0xf:
+ return BOOT_DEVICE_NAND;
+ }
+ return BOOT_DEVICE_NONE;
+}
+#endif
+
+#if defined(CONFIG_SPL_MMC_SUPPORT)
+/* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
+u32 spl_boot_mode(void)
+{
+ switch (spl_boot_device()) {
+ /* for MMC return either RAW or FAT mode */
+ case BOOT_DEVICE_MMC1:
+ case BOOT_DEVICE_MMC2:
+#ifdef CONFIG_SPL_FAT_SUPPORT
+ return MMCSD_MODE_FAT;
+#else
+ return MMCSD_MODE_RAW;
+#endif
+ break;
+ default:
+ puts(spl: ERROR: unsupported device\n);
+ hang();
+ }
+}
+#endif
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH 2/4] video: Add support for imx25 lcd controller
Hi, On Wed, 23 Apr 2014 07:52:43 +0200 die...@gmx.de wrote: From: Thomas Diener die...@gmx.de This patch adds support for the imx25 lcd display controller. Signed-off-by: Thomas Diener die...@gmx.de --- drivers/video/Makefile|1 + drivers/video/imx25lcdc.c | 123 + 2 files changed, 124 insertions(+) create mode 100644 drivers/video/imx25lcdc.c There are two empty lines at the end of the added file. These can be removed when applying, so there is no need to resubmit the patch. Otherwise Acked-by: Anatolij Gustschin ag...@denx.de Thanks, Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 7/8] ums: move all variable declarations to the start of the block
Hello Stephen, On 05/01/2014 11:47 PM, Stephen Warren wrote: On 05/01/2014 01:43 PM, Lukasz Majewski wrote: Hi Stephen, On 05/01/2014 04:51 AM, Marek Vasut wrote: On Wednesday, April 30, 2014 at 11:13:21 PM, Stephen Warren wrote: From: Stephen Warren swar...@nvidia.com It's easier to assign values to the variables inside an if statement body if the assignment and declaration are separate. Cc: Przemyslaw Marczak p.marc...@samsung.com Cc: Lukasz Majewski l.majew...@samsung.com Signed-off-by: Stephen Warren swar...@nvidia.com --- common/cmd_usb_mass_storage.c | 24 1 file changed, 16 insertions(+), 8 deletions(-) This doesn't apply on u-boot-usb/master, sorry. Is this the first patch in the series which doesn't apply? Did you apply any of the earlier patches? I guess I'll go try to rebase the series and find out myself... This is why we need a uboot-next just like linux-next, and stricter controls on which git repos take patches that touch subsystem code, to avoid cross-repo conflicts:-( +1 Yesterday Marek and I agreed that some patches regarding DFU and gadgets (patches 1 to 8) done by Mateusz: http://patchwork.ozlabs.org/patch/343517/ will be go through u-boot-dfu tree, which will be rebased on top of u-boot-usb tree. Afterwards I will send PR to Marek. Unfortunately I didn't manage to add them to u-boot-denx tree yesterday. I will do it on Monday as well as the review regarding your ums work. I hope, that you can wait until then. OK, that's fine. FWIW, I have applied that series locally and rebased my patches on top of it. If you want to see the latest version, feel free to look at: git://github.com/swarren/u-boot.git tegra_dev Note that branch gets rebased as I do local development. I tested your tegra_dev branch on trats2 and also on goni(after apply the rest of Mateusz Zalega patches) and it works fine. So for this patch set: Acked-by: Przemyslaw Marczak p.marc...@samsung.com Thanks, -- Przemyslaw Marczak Samsung RD Institute Poland Samsung Electronics p.marc...@samsung.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 04/12] spl: consolidate arch/arm/include/asm/arch-*/spl.h
Hi Tim,
On 30/04/2014 07:39, Masahiro Yamada wrote:
Hi Tim,
Cc : Stefano, Tom
On Mon, 28 Apr 2014 13:17:30 -0700
Tim Harvey thar...@gateworks.com wrote:
From: Masahiro Yamada yamad...@jp.panasonic.com
arch/arm/include/asm/spl.h requires all SoCs to have
arch/arm/include/asm/arch-*/spl.h.
But many of them just define BOOT_DEVICE_* macros.
Those macros are used in the switch (boot_device) { ... }
statement in common/spl/spl.c.
So they should not be archtecture specific, but be described as
a simpile enumeration.
This commit merges most of arch/arm/include/asm/arch-*/spl.h
into arch/arm/include/asm/spl.h.
With a little more effort, arch-zynq/spl.h and arch-socfpga/spl.h
will be merged, while I am not sure about OMAP and Exynos.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Cc: Tom Rini tr...@ti.com
Cc: Michal Simek michal.si...@xilinx.com
Cc: Andreas Biesmann andreas.de...@googlemail.com
Cc: Stephen Warren swar...@nvidia.com
Cc: Tom Warren twar...@nvidia.com
CC: Stefano Babic sba...@denx.de
CC: Minkyu Kang mk7.k...@samsung.com
Cc: Dinh Nguyen dingu...@altera.com
Acked-by: Andreas Biesmann andreas.de...@googlemail.com
Acked-by: Michal Simek mon...@monstr.eu
Acked-by: Stefano Babic sba...@denx.de
Acked-by: Stephen Warren swar...@nvidia.com
Acked-by: Tim Harvey thar...@gateworks.com
Tested-by: Bo Shen voice.s...@atmel.com [on sama5d3xek board for at91 part]
Acked-by: Stephen Warren swar...@nvidia.com
Signed-off-by: Tim Harvey thar...@gateworks.com
I understand my patch is here because your series uses
it as a prerequisite.
But, please make sure this patch should be reviewed and
applied by Tom Rini because this patch is relevant to
various SoCs.
Indeed. Tim, it is enough you add in the cover letter for the next
version that your patchset depends on Masahiro's patch, without
including it in your series. I will check by merging if all dependencies
will be satisfied.
Best regards,
Stefano Babic
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[U-Boot] MPC8641 ASMP u-boot booting
Hi, I am a little bit confused about u-boot smp and u-boot asmp on mpc8641d based HPCN board. when i am enable config_mp, in which mode it boots? In SMP u-boot or ASMP u-boot? and if it boots in smp mode then how am i going to boot ASMP linux? Please show me some way to boot ASMP linux . Any pointer/direction will be really helpful. Thanks Regards @$hi$h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] Update of the company logo
On Wed, 23 Apr 2014 07:52:45 +0200 die...@gmx.de wrote: From: Thomas Diener die...@gmx.de Signed-off-by: Thomas Diener die...@gmx.de --- tools/logos/syteco.bmp | Bin 11414 - 11414 bytes 1 file changed, 0 insertions(+), 0 deletions(-) applied to u-boot-video/master. Thanks! Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] config: enable CMD_BMP when API+LCD is enabled
On Fri, 18 Apr 2014 11:15:55 -0600 Stephen Warren swar...@wwwdotorg.org wrote: From: Stephen Warren swar...@nvidia.com When both CONFIG_API and CONFIG_LCD are enabled, the API code calls lcd_display_bitmap(). That isn't compiled unless either CONFIG_CMD_BMP or CONFIG_SPLASH_SCREEN is enabled. In order to prevent build problems, have config_fallbacks.h enable CONFIG_CMD_BMP when both API and LCD are enabled. Signed-off-by: Stephen Warren swar...@nvidia.com --- include/config_fallbacks.h | 4 1 file changed, 4 insertions(+) applied to u-boot-video/master. Thanks! Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] at91: video: atmel_hlcdfb.c: fix bad timing configuration
On Mon, 10 Mar 2014 16:40:41 +0800 Josh Wu josh...@atmel.com wrote: The right correspondance between LCD margins and LCD timings is: * upper margin - vertical back porch * lower margin - vertical front porch * left margin - horizontal back porch * right margin - horizontal front porch Signed-off-by: Josh Wu josh...@atmel.com --- drivers/video/atmel_hlcdfb.c |8 1 file changed, 4 insertions(+), 4 deletions(-) applied to u-boot-video/master. Thanks! Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-dfu
On Monday, May 05, 2014 at 10:27:42 AM, Lukasz Majewski wrote: Hi Marek, Please find following PR. I have also added commit from Stephen, since it immediately fixes problem with the current code. And linker list documentation update, since this fix emerged during the work with this code. Pulled, thanks. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PULL] u-boot-usb/master
The following changes since commit a405764c1ec835a41ccda943b9156aee25e15d5e: drivers/i2c/fsl_i2c: modify i2c_read to handle multi-byte write (2014-04-29 07:10:58 +0200) are available in the git repository at: git://git.denx.de/u-boot-usb.git master for you to fetch changes up to af41d6b4cb1602abebaaa9c8774a9b0ece564796: common: fixed linker-list example (2014-05-05 10:24:13 +0200) Adrian Cox (2): usb: Add endian support macros to interrupt transfers in the EHCI driver. usb: Fix USB keyboard polling via control endpoint Lukasz Majewski (1): dfu:fix: Replace wrong return value with proper one Mateusz Zalega (9): mmc: mmc header fix part: header fix usb: dfu: fix boards wo USB cable detection dfu: mmc: raw data write fix dfu: mmc: change offset base handling ums: always initialize mmc before ums_disk_init() am335x: dfu: disable DFU in am335x_evm SPL build USB: gadget: added a saner gadget downloader registration API common: fixed linker-list example Nobuhiro Iwamatsu (1): usb: ehci: rmobile: Add support ehci host driver of rmobile SoCs Przemyslaw Marczak (2): usb:gadget:f_thor: code cleanup in function download_tail() usb:gadget:f_thor: fix write to filesystem by add dfu_flush() Rob Herring (2): usb: handle NULL table in usb_gadget_get_string usb: musb: fill in usb_gadget_unregister_driver Stephen Warren (7): usb: ci_udc: Support larger packets usb: ci_udc: set ep-req.actual after transfer usb: ci_udc: make PHY initialization conditional usb: ci_udc: support variants with hostpc register usb: ums: use only 1 buffer for CI_UDC usb: gadget: allow ci_udc to build with new gadget framework USB: gadget: save driver name before registering it andrey.konova...@linaro.org (1): exynos: usb: Fix data abort on boards w/o vbus-gpio node in the DT README | 7 - arch/arm/include/asm/arch-rmobile/ehci-rmobile.h | 147 + board/samsung/common/ums.c | 6 ++-- board/samsung/origen/origen.c| 7 - board/samsung/trats/trats.c | 4 +-- board/samsung/trats2/trats2.c| 4 +-- board/samsung/universal_c210/universal.c | 7 - common/cmd_dfu.c | 3 +- common/cmd_thordown.c| 3 +- common/cmd_usb_mass_storage.c| 10 -- common/usb_kbd.c | 36 +++--- drivers/dfu/dfu.c| 2 +- drivers/dfu/dfu_mmc.c| 109 ++ drivers/usb/gadget/Makefile | 1 + drivers/usb/gadget/ci_udc.c | 31 --- drivers/usb/gadget/ci_udc.h | 65 --- drivers/usb/gadget/f_dfu.c | 3 ++ drivers/usb/gadget/f_mass_storage.c | 11 --- drivers/usb/gadget/f_thor.c | 15 ++--- drivers/usb/gadget/g_dnl.c | 66 drivers/usb/gadget/storage_common.c | 4 +++ drivers/usb/gadget/usbstring.c | 3 ++ drivers/usb/host/Makefile| 1 + drivers/usb/host/ehci-exynos.c | 3 +- drivers/usb/host/ehci-hcd.c | 56 +++--- drivers/usb/host/ehci-rmobile.c | 130 ++ drivers/usb/host/xhci-exynos5.c | 3 +- drivers/usb/musb-new/musb_uboot.c| 5 ++- include/configs/am335x_evm.h | 10 +++--- include/configs/exynos4-dt.h | 1 - include/configs/trats.h | 4 +-- include/configs/trats2.h | 4 +-- include/dfu.h| 12 include/g_dnl.h | 24 +++ include/linker_lists.h | 2 +- include/mmc.h| 1 + include/part.h | 1 + include/thor.h | 8 - include/usb.h| 10 -- include/usb_mass_storage.h | 8 - 40 files changed, 597 insertions(+), 230 deletions(-) create mode 100644 arch/arm/include/asm/arch-rmobile/ehci-rmobile.h create mode 100644 drivers/usb/host/ehci-rmobile.c
Re: [U-Boot] [PATCH 06/12] IMX: add comments and remove unused struct fields
Hi Tim,
On 28/04/2014 22:17, Tim Harvey wrote:
Add comment block for the imx_ddr_size function and remove the extra unused
fields from struct esd_mmdc_regs which are also not common between IMX53 and
IMX6. There are no functional changes here.
Signed-off-by: Tim Harvey thar...@gateworks.com
---
arch/arm/imx-common/cpu.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index a77c4de..392b8d4 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -58,6 +58,7 @@ char *get_reset_cause(void)
static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9};
static const unsigned char bank_lookup[] = {3, 2};
+/* these MMDC registers are common to the IMX53 and IMX6 */
struct esd_mmdc_regs {
uint32_tctl;
uint32_tpdc;
@@ -66,15 +67,6 @@ struct esd_mmdc_regs {
uint32_tcfg1;
uint32_tcfg2;
uint32_tmisc;
- uint32_tscr;
- uint32_tref;
- uint32_trsvd1;
- uint32_trsvd2;
- uint32_trwd;
- uint32_tor;
- uint32_tmrr;
- uint32_tcfg3lp;
- uint32_tmr4;
};
#define ESD_MMDC_CTL_GET_ROW(mdctl) ((ctl 24) 7)
@@ -83,6 +75,12 @@ struct esd_mmdc_regs {
#define ESD_MMDC_CTL_GET_CS1(mdctl) ((ctl 30) 1)
#define ESD_MMDC_MISC_GET_BANK(mdmisc) ((misc 5) 1)
+/**
Just a *very* minor point: why do you introduce doxygen-like comment ?
As U-Boot does not support it, this is uncommon and not useful.
+ * imx_ddr_size - return size in bytes of DRAM according MMDC config
+ * The MMDC MDCTL register holds the number of bits for row, col, and data
+ * width and the MMDC MDMISC register holds the number of banks. Combine
+ * all these bits to determine the meme size the MMDC has been configured for
+ */
unsigned imx_ddr_size(void)
{
struct esd_mmdc_regs *mem = (struct esd_mmdc_regs *)MEMCTL_BASE;
Apart of that:
Acked-by: Stefano Babic sba...@denx.de
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH 07/12] MX6: add structs for mmdc and ddr iomux registers
Hi Tim,
On 28/04/2014 22:17, Tim Harvey wrote:
Add memory-mapped structures for MMDC iomux and configuration. Note that while
the MMDC configuration registers are common between the IMX6DQ
(IMX6DUAL/IMX6QUAD) and IMX6SDL (IMX6SOLO/IMX6DUALLITE) types the iomux
registers differ. This requires two sets of structures.
Add structures to describe DDR3 device information, system information
(memory layout, etc), and MMDC calibration regitsers that can be used to
configure the MMDC dynamically.
We define these structures for SPL builds instead of including mx6q-ddr.h and
mx6dl-ddr.h which use the same namespace and are only useful for imximage cfg
files.
Signed-off-by: Tim Harvey thar...@gateworks.com
---
v2:
- split out from original mmdc configuration patch
- only define for SPL build
- do not include mx6q-ddr.h and mx6dl-ddr.h for SPL build - these use the
same namespace and are only useful for imximage cfg files
---
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 231
1 file changed, 231 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
index 43d377a..d544d2e 100644
--- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
+++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
@@ -6,6 +6,7 @@
#ifndef __ASM_ARCH_MX6_DDR_H__
#define __ASM_ARCH_MX6_DDR_H__
+#ifndef CONFIG_SPL_BUILD
#ifdef CONFIG_MX6Q
#include mx6q-ddr.h
#else
@@ -15,6 +16,236 @@
#error Please select cpu
#endif /* CONFIG_MX6DL or CONFIG_MX6S */
#endif /* CONFIG_MX6Q */
+#else
+
+/* MMDC P0/P1 Registers */
+struct mmdc_p_regs {
+ u32 mdctl;
+ u32 mdpdc;
+ u32 mdotc;
+ u32 mdcfg0;
+ u32 mdcfg1;
+ u32 mdcfg2;
+ u32 mdmisc;
+ u32 mdscr;
+ u32 mdref;
+ u32 res1[2];
+ u32 mdrwd;
+ u32 mdor;
+ u32 res2[3];
+ u32 mdasp;
+ u32 res3[240];
+ u32 mapsr;
+ u32 res4[254];
+ u32 mpzqhwctrl;
+ u32 res5[2];
+ u32 mpwldectrl0;
+ u32 mpwldectrl1;
+ u32 res6;
+ u32 mpodtctrl;
+ u32 mprddqby0dl;
+ u32 mprddqby1dl;
+ u32 mprddqby2dl;
+ u32 mprddqby3dl;
+ u32 res7[4];
+ u32 mpdgctrl0;
+ u32 mpdgctrl1;
+ u32 res8;
+ u32 mprddlctl;
+ u32 res9;
+ u32 mpwrdlctl;
+ u32 res10[25];
+ u32 mpmur0;
+};
+
+/*
+ * MMDC iomux registers (pinctl/padctl) - (different for IMX6DQ vs IMX6SDL)
+ */
+#define MX6DQ_IOM_DDR_BASE 0x020e0500
It is only a question - having the value here let us know where the
registers are located. Anyway, registers' offsets are stored in the
imx-regs.h file of the SOC. Which is the reason to set them here ?
+struct mx6dq_iomux_ddr_regs {
+ u32 res1[3];
+ u32 dram_sdqs5;
+ u32 dram_dqm5;
+ u32 dram_dqm4;
+ u32 dram_sdqs4;
+ u32 dram_sdqs3;
+ u32 dram_dqm3;
+ u32 dram_sdqs2;
+ u32 dram_dqm2;
+ u32 res2[16];
+ u32 dram_cas;
+ u32 res3[2];
+ u32 dram_ras;
+ u32 dram_reset;
+ u32 res4[2];
+ u32 dram_sdclk_0;
+ u32 dram_sdba2;
+ u32 dram_sdcke0;
+ u32 dram_sdclk_1;
+ u32 dram_sdcke1;
+ u32 dram_sdodt0;
+ u32 dram_sdodt1;
+ u32 res5;
+ u32 dram_sdqs0;
+ u32 dram_dqm0;
+ u32 dram_sdqs1;
+ u32 dram_dqm1;
+ u32 dram_sdqs6;
+ u32 dram_dqm6;
+ u32 dram_sdqs7;
+ u32 dram_dqm7;
+};
+
+#define MX6DQ_IOM_GRP_BASE 0x020e0700
+struct mx6dq_iomux_grp_regs {
+ u32 res1[18];
+ u32 grp_b7ds;
+ u32 grp_addds;
+ u32 grp_ddrmode_ctl;
+ u32 res2;
+ u32 grp_ddrpke;
+ u32 res3[6];
+ u32 grp_ddrmode;
+ u32 res4[3];
+ u32 grp_b0ds;
+ u32 grp_b1ds;
+ u32 grp_ctlds;
+ u32 res5;
+ u32 grp_b2ds;
+ u32 grp_ddr_type;
+ u32 grp_b3ds;
+ u32 grp_b4ds;
+ u32 grp_b5ds;
+ u32 grp_b6ds;
+};
+
+#define MX6SDL_IOM_DDR_BASE 0x020e0400
+struct mx6sdl_iomux_ddr_regs {
+ u32 res1[25];
+ u32 dram_cas;
+ u32 res2[2];
+ u32 dram_dqm0;
+ u32 dram_dqm1;
+ u32 dram_dqm2;
+ u32 dram_dqm3;
+ u32 dram_dqm4;
+ u32 dram_dqm5;
+ u32 dram_dqm6;
+ u32 dram_dqm7;
+ u32 dram_ras;
+ u32 dram_reset;
+ u32 res3[2];
+ u32 dram_sdba2;
+ u32 dram_sdcke0;
+ u32 dram_sdcke1;
+ u32 dram_sdclk_0;
+ u32 dram_sdclk_1;
+ u32 dram_sdodt0;
+ u32 dram_sdodt1;
+ u32 dram_sdqs0;
+ u32 dram_sdqs1;
+ u32 dram_sdqs2;
+ u32 dram_sdqs3;
+ u32 dram_sdqs4;
+ u32 dram_sdqs5;
+ u32 dram_sdqs6;
+ u32 dram_sdqs7;
+};
+
+#define MX6SDL_IOM_GRP_BASE 0x020e0700
+struct mx6sdl_iomux_grp_regs {
+ u32 res1[18];
+ u32 grp_b7ds;
+ u32 grp_addds;
+ u32 grp_ddrmode_ctl;
+ u32 grp_ddrpke;
+ u32 res2[2];
+ u32 grp_ddrmode;
+ u32 grp_b0ds;
+ u32 res3;
+ u32 grp_ctlds;
+
[U-Boot] [PATCH v11 0/2] S5P: Exynos: Add GPIO numbering feature
Used a script to recheck/verify pin mapping and existing mapping appears to be fine, returning correct bank and pin values. Did ./MAKEALL -a arm and found all Exynos/S5P related boards compiled successfully. Couldn't test booting over all of them. Tested U-Boot bootup over SMDK5420, SMDK5250, Snow. Requesting maintaners to please test over affected SoCs/boards. Changes in V2: - Enabled CMD_GPIO as suggested by Simon Glass and supported same for EXYNOS5. Changes in V3: - New patch added to rename S5P GPIO definitions to S5P_GPIO. - GPIO Table added to calculate the base address of input gpio bank. Changes in V4: - To have consistent 0..n-1 GPIO numbering the banks are divided into different parts where ever they have holes in them. - Function and table to support gpio command moved to s5p-gpio driver. - Rebased on latest u-boot-samsung tree. Changes in V5: - Rebased on latest u-boot-samsung tree. - Removed Exynos5 specific code in gpio driver api to get bank. - Added #define HAVE_GENERIC_GPIO in config file to remove conditinal CPU check in gpio driver. Changes in V6: - Isolated config changes in a new patch. - Updated patches with corresponding changes for Exynos 5420. Changes in V7: - Added changes for other SoCs like Exynos 4412, 4210 etc. Changes in V8: - Changed Subject of patch 2/2 to reflect affected SoCs/boards. - Fixed arndale board compile time errors introduced due to patch-set v7. Changes in V9: - Fixed checkpatch errors. - Fixed naming error in exynos_gpio_data arrays which could be the possible reason behind data abort witnessed over Exynos4 boards. Changes in v10: - Made arch-exynos/gpio.h - arch/gpio.h. - Removed dead code. - Replaced exynos_gpio_get calls with corresponding pin number. - Edited pin numbmers in dts files. Changes in v11: - Created and fixed pinmux config for Exynos 4412. - Removed dead code. Akshay Saraswat (2): S5P: Exynos: Add GPIO pin numbering and rename definitions S5P: Exynos: Config: Enable GPIO CMD config arch/arm/cpu/armv7/exynos/pinmux.c | 549 + arch/arm/dts/exynos4210-origen.dts |4 +- arch/arm/dts/exynos4210-trats.dts |6 +- arch/arm/dts/exynos4210-universal_c210.dts |4 +- arch/arm/dts/exynos4412-trats2.dts |4 +- arch/arm/include/asm/arch-exynos/cpu.h | 17 +- arch/arm/include/asm/arch-exynos/gpio.h| 1761 +++- arch/arm/include/asm/arch-s5pc1xx/gpio.h | 945 --- board/samsung/arndale/arndale.c| 11 +- board/samsung/goni/goni.c | 26 +- board/samsung/smdk5250/exynos5-dt.c| 20 +- board/samsung/smdk5250/smdk5250.c | 19 +- board/samsung/smdk5420/smdk5420.c | 15 +- board/samsung/smdkc100/smdkc100.c |5 +- board/samsung/smdkv310/smdkv310.c | 17 +- board/samsung/trats/trats.c| 39 +- board/samsung/trats2/trats2.c | 74 +- board/samsung/universal_c210/universal.c | 51 +- drivers/gpio/s5p_gpio.c| 198 +++- include/configs/exynos5-dt.h |2 + include/configs/s5p_goni.h |4 +- include/configs/s5pc210_universal.h| 16 +- include/configs/smdkv310.h |1 + include/configs/trats.h|8 +- include/configs/trats2.h |4 +- 25 files changed, 2902 insertions(+), 898 deletions(-) -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v11 2/2] S5P: Exynos: Config: Enable GPIO CMD config
Enabling configs for GPIO CMD, EXYNOS4 family and replacing exynos_gpio_get with new linear GPIO pin number required because of the new function asking only 2 arguments (pin and value) instead of 3 (bank, pin and value). Signed-off-by: Akshay Saraswat aksha...@samsung.com --- include/configs/exynos5-dt.h| 2 ++ include/configs/s5p_goni.h | 4 ++-- include/configs/s5pc210_universal.h | 16 include/configs/smdkv310.h | 1 + include/configs/trats.h | 8 include/configs/trats2.h| 4 ++-- 6 files changed, 19 insertions(+), 16 deletions(-) diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h index 414db42..5a9b1b4 100644 --- a/include/configs/exynos5-dt.h +++ b/include/configs/exynos5-dt.h @@ -288,4 +288,6 @@ #define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_GPIO + #endif /* __CONFIG_H */ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 991c43e..799d4fe 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -214,8 +214,8 @@ /* * I2C Settings */ -#define CONFIG_SOFT_I2C_GPIO_SCL s5pc110_gpio_get(j4, 3) -#define CONFIG_SOFT_I2C_GPIO_SDA s5pc110_gpio_get(j4, 0) +#define CONFIG_SOFT_I2C_GPIO_SCL S5PC110_GPIO_J43 +#define CONFIG_SOFT_I2C_GPIO_SDA S5PC110_GPIO_J40 #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_SOFT/* I2C bit-banged */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 2da8871..b368266 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -170,8 +170,8 @@ /* * I2C Settings */ -#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(1, b, 7) -#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(1, b, 6) +#define CONFIG_SOFT_I2C_GPIO_SCL EXYNOS4_GPIO_B7 +#define CONFIG_SOFT_I2C_GPIO_SDA EXYNOS4_GPIO_B6 #define CONFIG_CMD_I2C @@ -196,10 +196,10 @@ */ #define CONFIG_SOFT_SPI #define CONFIG_SOFT_SPI_MODE SPI_MODE_3 -#define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_get(2, y3, 1) -#define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_get(2, y3, 3) -#define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_get(2, y3, 0) -#define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_get(2, y4, 3) +#define CONFIG_SOFT_SPI_GPIO_SCLK EXYNOS4_GPIO_Y31 +#define CONFIG_SOFT_SPI_GPIO_MOSI EXYNOS4_GPIO_Y33 +#define CONFIG_SOFT_SPI_GPIO_MISO EXYNOS4_GPIO_Y30 +#define CONFIG_SOFT_SPI_GPIO_CS EXYNOS4_GPIO_Y43 #define SPI_DELAY udelay(1) #undef SPI_INIT @@ -231,8 +231,8 @@ int universal_spi_read(void); #define KEY_PWR_INTERRUPT_REG MAX8998_REG_IRQ1 #define KEY_PWR_INTERRUPT_MASK (1 7) -#define KEY_VOL_UP_GPIOexynos4_gpio_get(2, x2, 0) -#define KEY_VOL_DOWN_GPIO exynos4_gpio_get(2, x2, 1) +#define KEY_VOL_UP_GPIOEXYNOS4_GPIO_X20 +#define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21 #endif /* __ASSEMBLY__ */ /* LCD console */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 1388f49..34adfaf 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -12,6 +12,7 @@ /* High Level Configuration Options */ #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ #define CONFIG_S5P 1 /* S5P Family */ +#define CONFIG_EXYNOS4 /* EXYNOS4 Family */ #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ #define CONFIG_SMDKV3101 /* working with SMDKV310*/ diff --git a/include/configs/trats.h b/include/configs/trats.h index 5d8bd60..6cade07 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -207,8 +207,8 @@ #define CONFIG_SYS_I2C_INIT_BOARD /* I2C FG */ -#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(2, y4, 1) -#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(2, y4, 0) +#define CONFIG_SOFT_I2C_GPIO_SCL EXYNOS4_GPIO_Y41 +#define CONFIG_SOFT_I2C_GPIO_SDA EXYNOS4_GPIO_Y40 /* POWER */ #define CONFIG_POWER @@ -245,8 +245,8 @@ #define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1 #define KEY_PWR_INTERRUPT_MASK (1 0) -#define KEY_VOL_UP_GPIOexynos4_gpio_get(2, x2, 0) -#define KEY_VOL_DOWN_GPIO exynos4_gpio_get(2, x2, 1) +#define KEY_VOL_UP_GPIOEXYNOS4_GPIO_X20 +#define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21 #endif /* __ASSEMBLY__ */ /* LCD console */ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 53d449c..856c03b 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -227,8 +227,8 @@ int get_soft_i2c_sda_pin(void); #define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1 #define KEY_PWR_INTERRUPT_MASK (1 1) -#define KEY_VOL_UP_GPIOexynos4x12_gpio_get(2, x2, 2) -#define KEY_VOL_DOWN_GPIO exynos4x12_gpio_get(2, x3, 3) +#define KEY_VOL_UP_GPIO
Re: [U-Boot] [PATCH] disk: part_efi: add support for the Alternate GPT
Hello Steve,
On 04/30/2014 12:31 AM, Steve Rae wrote:
Check the Alternate GPT table if the Primary GPT table is invalid.
Signed-off-by: Steve Rae s...@broadcom.com
---
disk/part_efi.c | 20 ++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 216a292..ad899fa 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -93,7 +93,15 @@ void print_part_efi(block_dev_desc_t * dev_desc)
if (is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA,
gpt_head, gpt_pte) != 1) {
printf(%s: *** ERROR: Invalid GPT ***\n, __func__);
- return;
+ if (is_gpt_valid(dev_desc, (dev_desc-lba - 1),
+gpt_head, gpt_pte) != 1) {
+ printf(%s: *** ERROR: Invalid Alternate GPT ***\n,
+ __func__);
+ return;
+ } else {
+ printf(%s: ***Using Alternate GPT ***\n,
+ __func__);
+ }
}
debug(%s: gpt-entry at %p\n, __func__, gpt_pte);
@@ -142,7 +150,15 @@ int get_partition_info_efi(block_dev_desc_t * dev_desc,
int part,
if (is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA,
gpt_head, gpt_pte) != 1) {
printf(%s: *** ERROR: Invalid GPT ***\n, __func__);
- return -1;
+ if (is_gpt_valid(dev_desc, (dev_desc-lba - 1),
+gpt_head, gpt_pte) != 1) {
+ printf(%s: *** ERROR: Invalid Alternate GPT ***\n,
+ __func__);
+ return -1;
+ } else {
+ printf(%s: ***Using Alternate GPT ***\n,
+ __func__);
+ }
}
if (part le32_to_cpu(gpt_head-num_partition_entries) ||
This looks ok, we can still use u-boot filesystem commands after gpt
header block corruption, but the gpt is still...corrupted.
Maybe we need additional gpt subcommand for restore gpt in case when
backup of gpt header is valid?
Actually we have only gpt write command but it needs proper
environment variables. So I think that gpt restore is welcome.
Thank you,
--
Przemyslaw Marczak
Samsung RD Institute Poland
Samsung Electronics
p.marc...@samsung.com
___
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[U-Boot] [PATCH v5 2/8] sunxi: add sun7i pinmux and gpio support
This patch adds the basic pinmux and gpio support for the Allwinner A20 (sun7i)
processor. This code will not been compiled until the build is hooked up in a
later patch. It has been split out to keep the patches manageable.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Signed-off-by: Hans de Goede hdego...@redhat.com
Signed-off-by: Ma Haijun mahaij...@gmail.com
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Henrik Nordström hen...@henriknordstrom.net
Signed-off-by: Ian Campbell i...@hellion.org.uk
Reviewed-by: Tom Rini tr...@ti.com
Acked-by: Marek Vasut ma...@denx.de
Cc: Stefan Roese s...@denx.de
Cc: Tom Cubie mr.hip...@gmail.com
---
v5: Based on 3f5ff92b1503 sunxi: add comments to pll1_para array.
- No changes required
v4: Based on d9fe0a1e061e sunxi: mksunxiboot: remove unnecessary casts.
- No changes required
v3: Based on c89867dca2e9 sunxi: clocks: clock_get_pll5
prototype and coding style.
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- Additional pin definitions
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch/arm/cpu/armv7/sunxi/pinmux.c | 61 ++
arch/arm/include/asm/arch-sunxi/gpio.h | 147 +
3 files changed, 209 insertions(+)
create mode 100644 arch/arm/cpu/armv7/sunxi/pinmux.c
create mode 100644 arch/arm/include/asm/arch-sunxi/gpio.h
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile
b/arch/arm/cpu/armv7/sunxi/Makefile
index 440d266..529e7ec 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -9,4 +9,5 @@
#
obj-y += timer.o
obj-y += clock.o
+obj-y += pinmux.o
obj-$(CONFIG_SUN7I)+= clock_sun4i.o
diff --git a/arch/arm/cpu/armv7/sunxi/pinmux.c
b/arch/arm/cpu/armv7/sunxi/pinmux.c
new file mode 100644
index 000..1f2843f
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/pinmux.c
@@ -0,0 +1,61 @@
+/*
+ * (C) Copyright 2007-2011
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Tom Cubie tangli...@allwinnertech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/gpio.h
+
+int sunxi_gpio_set_cfgpin(u32 pin, u32 val)
+{
+ u32 bank = GPIO_BANK(pin);
+ u32 index = GPIO_CFG_INDEX(pin);
+ u32 offset = GPIO_CFG_OFFSET(pin);
+ struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
+
+ clrsetbits_le32(pio-cfg[0] + index, 0xf offset, val offset);
+
+ return 0;
+}
+
+int sunxi_gpio_get_cfgpin(u32 pin)
+{
+ u32 cfg;
+ u32 bank = GPIO_BANK(pin);
+ u32 index = GPIO_CFG_INDEX(pin);
+ u32 offset = GPIO_CFG_OFFSET(pin);
+ struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
+
+ cfg = readl(pio-cfg[0] + index);
+ cfg = offset;
+
+ return cfg 0xf;
+}
+
+int sunxi_gpio_set_drv(u32 pin, u32 val)
+{
+ u32 bank = GPIO_BANK(pin);
+ u32 index = GPIO_DRV_INDEX(pin);
+ u32 offset = GPIO_DRV_OFFSET(pin);
+ struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
+
+ clrsetbits_le32(pio-drv[0] + index, 0x3 offset, val offset);
+
+ return 0;
+}
+
+int sunxi_gpio_set_pull(u32 pin, u32 val)
+{
+ u32 bank = GPIO_BANK(pin);
+ u32 index = GPIO_PULL_INDEX(pin);
+ u32 offset = GPIO_PULL_OFFSET(pin);
+ struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
+
+ clrsetbits_le32(pio-pull[0] + index, 0x3 offset, val offset);
+
+ return 0;
+}
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
new file mode 100644
index 000..892479c
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -0,0 +1,147 @@
+/*
+ * (C) Copyright 2007-2012
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Tom Cubie tangli...@allwinnertech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _SUNXI_GPIO_H
+#define _SUNXI_GPIO_H
+
+#include linux/types.h
+
+/*
+ * sunxi has 9 banks of gpio, they are:
+ * PA0 - PA17 | PB0 - PB23 | PC0 - PC24
+ * PD0 - PD27 | PE0 - PE31 | PF0 - PF5
+ * PG0 - PG9 | PH0 - PH27 | PI0 - PI12
+ */
+
+#define SUNXI_GPIO_A 0
+#define SUNXI_GPIO_B 1
+#define SUNXI_GPIO_C 2
+#define SUNXI_GPIO_D 3
+#define SUNXI_GPIO_E 4
+#define SUNXI_GPIO_F 5
+#define SUNXI_GPIO_G 6
+#define SUNXI_GPIO_H 7
+#define SUNXI_GPIO_I 8
+#define SUNXI_GPIO_BANKS 9
+
+struct sunxi_gpio {
+ u32 cfg[4];
+ u32 dat;
+ u32 drv[2];
+ u32 pull[2];
+};
+
+/* gpio interrupt control */
+struct sunxi_gpio_int {
+ u32 cfg[3];
+ u32 ctl;
+ u32 sta;
+ u32 deb;/* interrupt debounce */
+};
+
+struct sunxi_gpio_reg {
+ struct sunxi_gpio gpio_bank[SUNXI_GPIO_BANKS];
+ u8 res[0xbc];
+ struct sunxi_gpio_int gpio_int;
+};
+
+#define BANK_TO_GPIO(bank) \
+ ((struct sunxi_gpio_reg
[U-Boot] [PATCH v5 0/8] sunxi: initial upstreaming effort
This is my fifth attempt at an upstreamable series based upon the https://github.com/linux-sunxi/u-boot-sunxi.git#sunxi tree. The intention is to present a minimal starting point for upstreaming to which support for other processors, peripherals, boards etc can be added in the future. Therefore this has been stripped right back and currently supports only sun7i processors (AKA Allwinner A20) and the cubietruck board. Supported peripherals are UART, MMC and Ethernet. The code here is from u-boot-sunxi.git#sunxi[0] changeset based on d9fe0a1e061e 3f5ff92b1503 sunxi: add comments to pll1_para array. and applies to u-boot v2014.04. It merges cleanly into current mainline head. As of v4 the majority of the series now has at least one Ack or Reviewed-by. In summary: + sunxi: add sun7i clocks and timer support. mT sunxi: add sun7i pinmux and gpio support Msunxi: add sun7i dram setup support M + sunxi: add sun7i cpu, board and start of day support MT sunxi: add support for Cubietruck booting in FEL mode Msunxi: add gmac Ethernet support Msunxi: mmc support Msunxi: non-FEL SPL boot support for sun7i M==Reviewed-by Marek Vasut. m==Acked-by Marek Vasut. T==Reviewed-by Tom Rini +==Minor changes in v5 Changes in v5: - Resynced with u-boot-sunxi.git 3f5ff92b1503 sunxi: add comments to pll1_para array.. Dropped Reduce DMA burst length patch which is being handled elsewhere. Otherwise see individual commit logs for details. Changes in v4: - Resynced with u-boot-sunxi.git d9fe0a1e061e which pulled lots of fixes for Marek's review comments. Global changes in v3: - Rebased onto v2014.04 and resynced with u-boot-sunxi.git c89867dca2e9 - Improved commit messages - Updated lists of contributors - Added some CCs - Lots of cleanup based on review comments. Global changes in v2: - Use SPDX-License-Identifier - Resync with u-boot-sunxi.git - Lot of updates to the individual patches, see the individual commit messages (checkpatch.pl fixes, magic number removal etc). - Pulled the Ethernet stuff before the MMC and non-FEL boot stuff. The MMC stuff (which non-FEL boot needs) still needs some more cleanup, but the reordering means that the initial part of the series could in principal go in. This series can also be found at: git://gitorious.org/ijc/u-boot.git sunxi-mainlining-v5 There is no SMP here, since that relies on the PSCI support from Marc Zyngier which has yet to land in mainline. Marc has recently rebased and a version based on this series can be found at: git://gitorious.org/ijc/u-boot.git sunxi-mainlining-v5-smp I've tried to give corect credit and S-o-b based upon: git log --pretty='%aN' linux-sunxi/sunxi -- [PATHS] | sort -u git log linux-sunxi/sunxi -- [PATHS] | grep -i signed.off.by | sort -u Manual inspection This will tend to over credit, since it will include folks who contributed code which has since been removed as well as those who contributed code which is not included in this patch set, but I think it is better to be conservative and include too many rather than incorrectly exclude people. Doing better than this would be IMHO too hard to be worth it (e.g. git blame would prefer a recent whitespace cleanup to the actual author of the code and prefer someone did code motion over the original author, so it would be a massive manual process). [0] https://github.com/linux-sunxi/u-boot-sunxi.git ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 6/8] sunxi: add gmac Ethernet support
Add support for the GMAC Ethernet controller on Allwinner A20 (sun7i)
processors. Enable for the Cubietruck.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Signed-off-by: Jens Kuske jensku...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
Reviewed-by: Marek Vasut ma...@denx.de
---
v5: Based on 3f5ff92b1503 sunxi: add comments to pll1_para array.
- No changes required
v4: Based on d9fe0a1e061e sunxi: mksunxiboot: remove unnecessary casts.
- Use correct ifdef's in and around cpu_eth_init
- Log and propagate errors from sunxi_gmac_initialize
- Move glue from drivers/net/sunxi_gmac.c to board/sunxi/gmac.c
- Remove SNTP and useless BOOTP config options.
v3: Based on c89867dca2e9 sunxi: clocks: clock_get_pll5
prototype and coding style.
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- drop accidentally doubled hunk
- use gpio setup functions
- moved before mmc patches
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
arch/arm/cpu/armv7/sunxi/board.c | 23 +++
board/sunxi/Makefile | 1 +
board/sunxi/gmac.c | 32
boards.cfg | 2 +-
include/configs/sunxi-common.h | 17 +
include/netdev.h | 1 +
6 files changed, 75 insertions(+), 1 deletion(-)
create mode 100644 board/sunxi/gmac.c
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index b5c0cb7..49c9448 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -11,6 +11,8 @@
*/
#include common.h
+#include netdev.h
+#include miiphy.h
#include serial.h
#ifdef CONFIG_SPL_BUILD
#include spl.h
@@ -86,3 +88,24 @@ void enable_caches(void)
dcache_enable();
}
#endif
+
+#ifdef CONFIG_CMD_NET
+/*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
+ */
+int cpu_eth_init(bd_t *bis)
+{
+ int rc;
+
+#ifdef CONFIG_SUNXI_GMAC
+ rc = sunxi_gmac_initialize(bis);
+ if (rc 0) {
+ printf(sunxi: failed to initialize gmac\n);
+ return rc;
+ }
+#endif
+
+ return 0;
+}
+#endif
diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index 18b1e11..cbf8f08 100644
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -9,4 +9,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += board.o
+obj-$(CONFIG_SUNXI_GMAC) += gmac.o
obj-$(CONFIG_CUBIETRUCK) += dram_cubietruck.o
diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c
new file mode 100644
index 000..e48328d
--- /dev/null
+++ b/board/sunxi/gmac.c
@@ -0,0 +1,32 @@
+#include common.h
+#include netdev.h
+#include miiphy.h
+#include asm/gpio.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/gpio.h
+
+int sunxi_gmac_initialize(bd_t *bis)
+{
+ int pin;
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* Set up clock gating */
+ setbits_le32(ccm-ahb_gate1, 0x1 AHB_GATE_OFFSET_GMAC);
+
+ /* Set MII clock */
+ setbits_le32(ccm-gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
+ CCM_GMAC_CTRL_GPIT_RGMII);
+
+ /* Configure pin mux settings for GMAC */
+ for (pin = SUNXI_GPA(0); pin = SUNXI_GPA(16); pin++) {
+ /* skip unused pins in RGMII mode */
+ if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14))
+ continue;
+ sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC);
+ sunxi_gpio_set_drv(pin, 3);
+ }
+
+ return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII);
+}
diff --git a/boards.cfg b/boards.cfg
index 31b02df..b74f8c8 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -371,7 +371,7 @@ Active arm armv7 rmobile renesas
lager
Active arm armv7 s5pc1xx samsung goni
s5p_goni -
Mateusz Zalega m.zal...@samsung.com
Active arm armv7 s5pc1xx samsung smdkc100
smdkc100 -
Minkyu Kang mk7.k...@samsung.com
Active arm armv7 socfpga altera socfpga
socfpga_cyclone5 -
-
-Active arm armv7 sunxi - sunxi
Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL
[U-Boot] [PATCH v5 5/8] sunxi: add support for Cubietruck booting in FEL mode
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Jens Kuske jensku...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
Reviewed-by: Tom Rini tr...@ti.com
Reviewed-by: Marek Vasut ma...@denx.de
---
v5: Based on 3f5ff92b1503 sunxi: add comments to pll1_para array.
- No changes required
v4: Based on d9fe0a1e061e sunxi: mksunxiboot: remove unnecessary casts.
- No changes required
v3: Based on c89867dca2e9 sunxi: clocks: clock_get_pll5
prototype and coding style.
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in.
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
board/sunxi/Makefile | 1 +
board/sunxi/dram_cubietruck.c | 31 +++
boards.cfg| 1 +
3 files changed, 33 insertions(+)
create mode 100644 board/sunxi/dram_cubietruck.c
diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index 559112e..18b1e11 100644
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -9,3 +9,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += board.o
+obj-$(CONFIG_CUBIETRUCK) += dram_cubietruck.o
diff --git a/board/sunxi/dram_cubietruck.c b/board/sunxi/dram_cubietruck.c
new file mode 100644
index 000..fbcd687
--- /dev/null
+++ b/board/sunxi/dram_cubietruck.c
@@ -0,0 +1,31 @@
+/* this file is generated, don't edit it yourself */
+
+#include common.h
+#include asm/arch/dram.h
+
+static struct dram_para dram_para = {
+ .clock = 432,
+ .type = 3,
+ .rank_num = 1,
+ .density = 4096,
+ .io_width = 8,
+ .bus_width = 32,
+ .cas = 9,
+ .zq = 0x7f,
+ .odt_en = 0,
+ .size = 2048,
+ .tpr0 = 0x42d899b7,
+ .tpr1 = 0xa090,
+ .tpr2 = 0x22a00,
+ .tpr3 = 0x0,
+ .tpr4 = 0x1,
+ .tpr5 = 0x0,
+ .emr1 = 0x4,
+ .emr2 = 0x10,
+ .emr3 = 0x0,
+};
+
+unsigned long sunxi_dram_init(void)
+{
+ return dramc_init(dram_para);
+}
diff --git a/boards.cfg b/boards.cfg
index b4203f1..31b02df 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -371,6 +371,7 @@ Active arm armv7 rmobile renesas
lager
Active arm armv7 s5pc1xx samsung goni
s5p_goni -
Mateusz Zalega m.zal...@samsung.com
Active arm armv7 s5pc1xx samsung smdkc100
smdkc100 -
Minkyu Kang mk7.k...@samsung.com
Active arm armv7 socfpga altera socfpga
socfpga_cyclone5 -
-
+Active arm armv7 sunxi - sunxi
Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL
-
Active arm armv7 u8500 st-ericsson snowball
snowball -
Mathieu Poirier mathieu.poir...@linaro.org
Active arm armv7 u8500 st-ericsson u8500
u8500_href -
-
Active arm armv7 vf610 freescale vf610twr
vf610twr
vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg
Alison Wang
b18...@freescale.com
--
1.9.0
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 8/8] sunxi: non-FEL SPL boot support for sun7i
Add support for booting from an MMC card.
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Henrik Nordström hen...@henriknordstrom.net
Signed-off-by: Ian Campbell i...@hellion.org.uk
Reviewed-by: Marek Vasut ma...@denx.de
Cc: Tom Cubie mr.hip...@gmail.com
---
v5: Based on 3f5ff92b1503 sunxi: add comments to pll1_para array.
- No changes required
v4: Based on d9fe0a1e061e sunxi: mksunxiboot: remove unnecessary casts.
- fixed in mksunxiboot.c
- use stdint.h types
- drop unused code
- fix the types to avoid casting and potential misalignments
v3: Based on c89867dca2e9 sunxi: clocks: clock_get_pll5
prototype and coding style.
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- mksunxiboot cleanups
- rebase on Kbuild stuff
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
Makefile| 10 +++
arch/arm/cpu/armv7/sunxi/config.mk | 8 ++
arch/arm/cpu/armv7/sunxi/u-boot-spl.lds | 52
boards.cfg | 1 +
include/configs/sunxi-common.h | 26 ++
spl/Makefile| 13 +++
tools/.gitignore| 1 +
tools/Makefile | 2 +
tools/mksunxiboot.c | 142
9 files changed, 255 insertions(+)
create mode 100644 arch/arm/cpu/armv7/sunxi/config.mk
create mode 100644 arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
create mode 100644 tools/mksunxiboot.c
diff --git a/Makefile b/Makefile
index c91c10e..379731c 100644
--- a/Makefile
+++ b/Makefile
@@ -870,6 +870,13 @@ OBJCOPYFLAGS_u-boot.spr = -I binary -O binary
--pad-to=$(CONFIG_SPL_PAD_TO) \
u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE
$(call if_changed,pad_cat)
+ifneq ($(CONFIG_SUNXI),)
+OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \
+ --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff
+u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img FORCE
+ $(call if_changed,pad_cat)
+endif
+
ifneq ($(CONFIG_TEGRA),)
OBJCOPYFLAGS_u-boot-nodtb-tegra.bin = -O binary
--pad-to=$(CONFIG_SYS_TEXT_BASE)
u-boot-nodtb-tegra.bin: spl/u-boot-spl u-boot.bin FORCE
@@ -1081,6 +1088,9 @@ spl/u-boot-spl.bin: spl/u-boot-spl
spl/u-boot-spl: tools prepare
$(Q)$(MAKE) obj=spl -f $(srctree)/spl/Makefile all
+spl/sunxi-spl.bin: spl/u-boot-spl
+ @:
+
tpl/u-boot-tpl.bin: tools prepare
$(Q)$(MAKE) obj=tpl -f $(srctree)/spl/Makefile all CONFIG_TPL_BUILD=y
diff --git a/arch/arm/cpu/armv7/sunxi/config.mk
b/arch/arm/cpu/armv7/sunxi/config.mk
new file mode 100644
index 000..00f5ffc
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/config.mk
@@ -0,0 +1,8 @@
+# Build a combined spl + u-boot image
+ifdef CONFIG_SPL
+ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_SPL_FEL
+ALL-y += u-boot-sunxi-with-spl.bin
+endif
+endif
+endif
diff --git a/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
new file mode 100644
index 000..5008028
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/u-boot-spl.lds
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2012
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Tom Cubie tangli...@allwinnertech.com
+ *
+ * Based on omap-common/u-boot-spl.lds:
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, ga...@denx.de
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, www.ti.com
+ * Aneesh V ane...@ti.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
+ LENGTH = CONFIG_SPL_MAX_SIZE }
+MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
+ LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
+
+OUTPUT_FORMAT(elf32-littlearm, elf32-littlearm, elf32-littlearm)
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ .text :
+ {
+ __start = .;
+ arch/arm/cpu/armv7/start.o (.text)
+ *(.text*)
+ } .sram
+
+ . = ALIGN(4);
+ .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } .sram
+
+ . = ALIGN(4);
+ .data : { *(SORT_BY_ALIGNMENT(.data*)) } .sram
+
+ . = ALIGN(4);
+ __image_copy_end = .;
+ _end = .;
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start = .;
+ *(.bss*)
+ . = ALIGN(4);
+ __bss_end = .;
+ } .sdram
+}
diff --git a/boards.cfg b/boards.cfg
index b74f8c8..b6e20ae 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -371,6 +371,7 @@ Active arm armv7 rmobile renesas
lager
Active arm armv7 s5pc1xx samsung goni
s5p_goni -
[U-Boot] [PATCH v5 7/8] sunxi: mmc support
This adds support for the MMC controller on the Allwinner A20 (sun7i)
processor.
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Luke Leighton l...@lkcl.net
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Wills Wang wills.wang.o...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
Reviewed-by: Marek Vasut ma...@denx.de
Cc: Stefan Roese s...@denx.de
Cc: Tom Cubie mr.hip...@gmail.com
Cc: Aaron Maoye leafy.m...@allwinnertech.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
---
v5: Based on 3f5ff92b1503 sunxi: add comments to pll1_para array.
- No changes required
v4: Based on d9fe0a1e061e sunxi: mksunxiboot: remove unnecessary casts.
- Moved pinmux setup from drivers/mmc/sunxi_mmc.c to
board/sunxi/board.c
- Use setbits_le32 to manipulate the ahb0 gate.
v3: Based on c89867dca2e9 sunxi: clocks: clock_get_pll5
prototype and coding style.
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- use proper gpio interfaces, removing awkward casts and some magic numbers.
- remove magic numbers
- other cleanups
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
mmc: drop debug
---
arch/arm/include/asm/arch-sunxi/mmc.h | 124 +
board/sunxi/board.c | 72 +
drivers/mmc/Makefile | 1 +
drivers/mmc/sunxi_mmc.c | 503 ++
include/configs/sunxi-common.h| 11 +
5 files changed, 711 insertions(+)
create mode 100644 arch/arm/include/asm/arch-sunxi/mmc.h
create mode 100644 drivers/mmc/sunxi_mmc.c
diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h
b/arch/arm/include/asm/arch-sunxi/mmc.h
new file mode 100644
index 000..53196e3
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
@@ -0,0 +1,124 @@
+/*
+ * (C) Copyright 2007-2011
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Aaron leafy.m...@allwinnertech.com
+ *
+ * MMC register definition for allwinner sunxi platform.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _SUNXI_MMC_H
+#define _SUNXI_MMC_H
+
+#include linux/types.h
+
+struct sunxi_mmc {
+ u32 gctrl; /* 0x00 global control */
+ u32 clkcr; /* 0x04 clock control */
+ u32 timeout;/* 0x08 time out */
+ u32 width; /* 0x0c bus width */
+ u32 blksz; /* 0x10 block size */
+ u32 bytecnt;/* 0x14 byte count */
+ u32 cmd;/* 0x18 command */
+ u32 arg;/* 0x1c argument */
+ u32 resp0; /* 0x20 response 0 */
+ u32 resp1; /* 0x24 response 1 */
+ u32 resp2; /* 0x28 response 2 */
+ u32 resp3; /* 0x2c response 3 */
+ u32 imask; /* 0x30 interrupt mask */
+ u32 mint; /* 0x34 masked interrupt status */
+ u32 rint; /* 0x38 raw interrupt status */
+ u32 status; /* 0x3c status */
+ u32 ftrglevel; /* 0x40 FIFO threshold watermark*/
+ u32 funcsel;/* 0x44 function select */
+ u32 cbcr; /* 0x48 CIU byte count */
+ u32 bbcr; /* 0x4c BIU byte count */
+ u32 dbgc; /* 0x50 debug enable */
+ u32 res0[11];
+ u32 dmac; /* 0x80 internal DMA control */
+ u32 dlba; /* 0x84 internal DMA descr list base address */
+ u32 idst; /* 0x88 internal DMA status */
+ u32 idie; /* 0x8c internal DMA interrupt enable */
+ u32 chda; /* 0x90 */
+ u32 cbda; /* 0x94 */
+ u32 res1[26];
+ u32 fifo; /* 0x100 FIFO access address */
+};
+
+#define SUNXI_MMC_CLK_POWERSAVE(0x1 17)
+#define SUNXI_MMC_CLK_ENABLE (0x1 16)
+#define SUNXI_MMC_CLK_DIVIDER_MASK (0xff)
+
+#define SUNXI_MMC_GCTRL_SOFT_RESET (0x1 0)
+#define SUNXI_MMC_GCTRL_FIFO_RESET (0x1 1)
+#define SUNXI_MMC_GCTRL_DMA_RESET (0x1 2)
+#define SUNXI_MMC_GCTRL_RESET (SUNXI_MMC_GCTRL_SOFT_RESET|\
+SUNXI_MMC_GCTRL_FIFO_RESET|\
+SUNXI_MMC_GCTRL_DMA_RESET)
+#define SUNXI_MMC_GCTRL_DMA_ENABLE (0x1 5)
+#define SUNXI_MMC_GCTRL_ACCESS_BY_AHB (0x1 31)
+
+#define SUNXI_MMC_CMD_RESP_EXPIRE (0x1 6)
+#define SUNXI_MMC_CMD_LONG_RESPONSE(0x1 7)
+#define SUNXI_MMC_CMD_CHK_RESPONSE_CRC (0x1 8)
+#define SUNXI_MMC_CMD_DATA_EXPIRE (0x1 9)
+#define SUNXI_MMC_CMD_WRITE(0x1 10)
+#define SUNXI_MMC_CMD_AUTO_STOP(0x1 12)
+#define SUNXI_MMC_CMD_WAIT_PRE_OVER(0x1 13)
+#define SUNXI_MMC_CMD_SEND_INIT_SEQ(0x1 15)
+#define SUNXI_MMC_CMD_UPCLK_ONLY (0x1 21)
[U-Boot] [PATCH v5 3/8] sunxi: add sun7i dram setup support
This patch adds DRAM initialisation support for the Allwinner A20 (sun7i)
processor. This code will not been compiled until the build is hooked up in a
later patch. It has been split out to keep the patches manageable.
Signed-off-by: Alexandru Gagniuc mr.nuke...@gmail.com
Signed-off-by: Emilio López emi...@elopez.com.ar
Signed-off-by: Hans de Goede hdego...@redhat.com
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Jens Kuske jensku...@gmail.com
Signed-off-by: Luke Leighton l...@lkcl.net
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Siarhei Siamashka siarhei.siamas...@gmail.com
Signed-off-by: Stefan Roese s...@denx.de
Signed-off-by: Ian Campbell i...@hellion.org.uk
Reviewed-by: Marek Vasut ma...@denx.de
Cc: Tom Cubie mr.hip...@gmail.com
---
v5: Based on 3f5ff92b1503 sunxi: add comments to pll1_para array.
- No changes required
v4: Based on d9fe0a1e061e sunxi: mksunxiboot: remove unnecessary casts.
- removed unbounded loops
- support more dram clock speeds.
v3: Based on c89867dca2e9 sunxi: clocks: clock_get_pll5
prototype and coding style.
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- remove redundant braces in mctl_ddr3_reset
- remove incorrect call to mctl_ddr3_reset.
- add CONFIG_SUN7I to simplify future SUN?I support.
- add a comment about the magic numbers from the a/w code dumps
- fix a bunch of checkpatch.pl issues
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch/arm/cpu/armv7/sunxi/dram.c| 593 +
arch/arm/include/asm/arch-sunxi/dram.h | 179 ++
3 files changed, 773 insertions(+)
create mode 100644 arch/arm/cpu/armv7/sunxi/dram.c
create mode 100644 arch/arm/include/asm/arch-sunxi/dram.h
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile
b/arch/arm/cpu/armv7/sunxi/Makefile
index 529e7ec..d81d26c 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -11,3 +11,4 @@ obj-y += timer.o
obj-y += clock.o
obj-y += pinmux.o
obj-$(CONFIG_SUN7I)+= clock_sun4i.o
+obj-$(CONFIG_SUN7I)+= dram.o
diff --git a/arch/arm/cpu/armv7/sunxi/dram.c b/arch/arm/cpu/armv7/sunxi/dram.c
new file mode 100644
index 000..b43c4b4
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/dram.c
@@ -0,0 +1,593 @@
+/*
+ * sunxi DRAM controller initialization
+ * (C) Copyright 2012 Henrik Nordstrom hen...@henriknordstrom.net
+ * (C) Copyright 2013 Luke Kenneth Casson Leighton l...@lkcl.net
+ *
+ * Based on sun4i Linux kernel sources mach-sunxi/pm/standby/dram*.c
+ * and earlier U-Boot Allwiner A10 SPL work
+ *
+ * (C) Copyright 2007-2012
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Berg Xing bergx...@allwinnertech.com
+ * Tom Cubie tangli...@allwinnertech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * Unfortunately the only documentation we have on the sun7i DRAM
+ * controller is Allwinner boot0 + boot1 code, and that code uses
+ * magic numbers shifts with no explanations. Hence this code is
+ * rather undocumented and full of magic.
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/dram.h
+#include asm/arch/timer.h
+#include asm/arch/sys_proto.h
+
+#define CPU_CFG_CHIP_VER(n) ((n) 6)
+#define CPU_CFG_CHIP_VER_MASK CPU_CFG_CHIP_VER(0x3)
+#define CPU_CFG_CHIP_REV_A 0x0
+#define CPU_CFG_CHIP_REV_C1 0x1
+#define CPU_CFG_CHIP_REV_C2 0x2
+#define CPU_CFG_CHIP_REV_B 0x3
+
+/*
+ * Wait up to 1s for mask to be clear in given reg.
+ */
+static void await_completion(u32 *reg, u32 mask)
+{
+ unsigned long tmo = timer_get_us() + 100;
+
+ while (readl(reg) mask) {
+ if (timer_get_us() tmo)
+ panic(Timeout initialising DRAM\n);
+ }
+}
+
+static void mctl_ddr3_reset(void)
+{
+ struct sunxi_dram_reg *dram =
+ (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
+
+ clrbits_le32(dram-mcr, DRAM_MCR_RESET);
+ udelay(2);
+ setbits_le32(dram-mcr, DRAM_MCR_RESET);
+}
+
+static void mctl_set_drive(void)
+{
+ struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
+
+ clrsetbits_le32(dram-mcr, DRAM_MCR_MODE_NORM(0x3) | (0x3 28),
+ DRAM_MCR_MODE_EN(0x3) |
+ 0xffc);
+}
+
+static void mctl_itm_disable(void)
+{
+ struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
+
+ clrsetbits_le32(dram-ccr, DRAM_CCR_INIT, DRAM_CCR_ITM_OFF);
+}
+
+static void mctl_itm_enable(void)
+{
+ struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
+
+ clrbits_le32(dram-ccr, DRAM_CCR_ITM_OFF);
+}
+
+static void mctl_enable_dll0(u32 phase)
+{
+ struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE;
+
+
[U-Boot] [PATCH v5 4/8] sunxi: add sun7i cpu, board and start of day support
This patch adds generic board, start of day and basic build system support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: Adam Sampson a...@offog.org Signed-off-by: Aleksei Mamlin mamli...@gmail.com Signed-off-by: Alexandru Gagniuc mr.nuke...@gmail.com Signed-off-by: Chen-Yu Tsai w...@csie.org Signed-off-by: Emilio López emi...@elopez.com.ar Signed-off-by: Hans de Goede hdego...@redhat.com Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net Signed-off-by: Jens Kuske jensku...@gmail.com Signed-off-by: Luc Verhaegen l...@skynet.be Signed-off-by: Luke Leighton l...@lkcl.net Signed-off-by: Oliver Schinagl oli...@schinagl.nl Signed-off-by: Patrick Wood patrickhw...@gmail.com Signed-off-by: Stefan Roese s...@denx.de Signed-off-by: Wills Wang wills.wang.o...@gmail.com Signed-off-by: Ian Campbell i...@hellion.org.uk Reviewed-by: Marek Vasut ma...@denx.de Cc: Tom Cubie mr.hip...@gmail.com --- v5: Based on 3f5ff92b1503 sunxi: add comments to pll1_para array. - Correct SRAM_B/SRAM_D memory map v4: Based on d9fe0a1e061e sunxi: mksunxiboot: remove unnecessary casts. - No changes required v3: Based on c89867dca2e9 sunxi: clocks: clock_get_pll5 prototype and coding style. v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc: checkpatch whitespace fixes with v2014.04-rc2 merged in: - just init dram once - remove clock ramping until power control is implemented - add CONFIG_SUN7I to simplify future SUN?I support. - fix a typo v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash section in ldscripts vs v2014.01. --- arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/sunxi/Makefile | 11 +++ arch/arm/cpu/armv7/sunxi/board.c| 88 + arch/arm/cpu/armv7/sunxi/cpu_info.c | 19 arch/arm/cpu/armv7/sunxi/start.c| 1 + arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds | 77 +++ arch/arm/include/asm/arch-sunxi/cpu.h | 122 arch/arm/include/asm/arch-sunxi/spl.h | 20 board/sunxi/Makefile| 11 +++ board/sunxi/board.c | 57 +++ include/configs/sun7i.h | 24 + include/configs/sunxi-common.h | 141 12 files changed, 572 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv7/sunxi/board.c create mode 100644 arch/arm/cpu/armv7/sunxi/cpu_info.c create mode 100644 arch/arm/cpu/armv7/sunxi/start.c create mode 100644 arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds create mode 100644 arch/arm/include/asm/arch-sunxi/cpu.h create mode 100644 arch/arm/include/asm/arch-sunxi/spl.h create mode 100644 board/sunxi/Makefile create mode 100644 board/sunxi/board.c create mode 100644 include/configs/sun7i.h create mode 100644 include/configs/sunxi-common.h diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 119ebb3..ddf00f3 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -12,7 +12,7 @@ obj-y += cache_v7.o obj-y += cpu.o obj-y += syslib.o -ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY),) +ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI),) ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y) obj-y += lowlevel_init.o endif diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index d81d26c..a64bfa1 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -8,7 +8,18 @@ # SPDX-License-Identifier: GPL-2.0+ # obj-y += timer.o +obj-y += board.o obj-y += clock.o obj-y += pinmux.o obj-$(CONFIG_SUN7I)+= clock_sun4i.o + +ifndef CONFIG_SPL_BUILD +obj-y += cpu_info.o +endif + +ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SUN7I)+= dram.o +ifdef CONFIG_SPL_FEL +obj-y += start.o +endif +endif diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c new file mode 100644 index 000..b5c0cb7 --- /dev/null +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -0,0 +1,88 @@ +/* + * (C) Copyright 2012 Henrik Nordstrom hen...@henriknordstrom.net + * + * (C) Copyright 2007-2011 + * Allwinner Technology Co., Ltd. www.allwinnertech.com + * Tom Cubie tangli...@allwinnertech.com + * + * Some init for sunxi platform. + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#include common.h +#include serial.h +#ifdef CONFIG_SPL_BUILD +#include spl.h +#endif +#include asm/gpio.h +#include asm/io.h +#include asm/arch/clock.h +#include asm/arch/gpio.h +#include asm/arch/sys_proto.h +#include asm/arch/timer.h + +#ifdef CONFIG_SPL_BUILD +/* Pointer to the global data structure for
[U-Boot] [PATCH v5 1/8] sunxi: add sun7i clocks and timer support.
This patch adds the basic clocks and timer support for the Allwinner A20
(sun7i) processor. This code will not been compiled until the build is hooked
up in a later patch. It has been split out to keep the patches manageable.
Some of the code here is common to multiple sunxi subarchtectures, hence files
are named sun4i which is the earliest similar variant.
Signed-off-by: Alexandru Gagniuc mr.nuke...@gmail.com
Signed-off-by: Chen-Yu Tsai w...@csie.org
Signed-off-by: Emilio López emi...@elopez.com.ar
Signed-off-by: Hans de Goede hdego...@redhat.com
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Jens Kuske jensku...@gmail.com
Signed-off-by: Luke Leighton l...@lkcl.net
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Ian Campbell i...@hellion.org.uk
Cc: Stefan Roese s...@denx.de
Cc: Tom Cubie mr.hip...@gmail.com
---
v5: Based on 3f5ff92b1503 sunxi: add comments to pll1_para array.
- add comments to pll1_para array.
- hz parameter to clock_set_pll1 = an unsigned int.
v4: Based on d9fe0a1e061e sunxi: mksunxiboot: remove unnecessary casts.
- clock_get_pll6 moved to clock_sun4i.c.
- fixed coding style of comment in read_timer.
v3: Based on c89867dca2e9 sunxi: clocks: clock_get_pll5
prototype and coding style.
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- define magic numbers
- simplify get_tbclk
- correct clock_set_pll1 prototype
- add CONFIG_SUN7I to simplify future SUN?I support.
- defines for MMC AHB clocks
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
---
arch/arm/cpu/armv7/sunxi/Makefile | 12 ++
arch/arm/cpu/armv7/sunxi/clock.c | 25 +++
arch/arm/cpu/armv7/sunxi/clock_sun4i.c| 188 +++
arch/arm/cpu/armv7/sunxi/timer.c | 113
arch/arm/include/asm/arch-sunxi/clock.h | 29 +++
arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 256 ++
arch/arm/include/asm/arch-sunxi/sys_proto.h | 16 ++
arch/arm/include/asm/arch-sunxi/timer.h | 88 +
8 files changed, 727 insertions(+)
create mode 100644 arch/arm/cpu/armv7/sunxi/Makefile
create mode 100644 arch/arm/cpu/armv7/sunxi/clock.c
create mode 100644 arch/arm/cpu/armv7/sunxi/clock_sun4i.c
create mode 100644 arch/arm/cpu/armv7/sunxi/timer.c
create mode 100644 arch/arm/include/asm/arch-sunxi/clock.h
create mode 100644 arch/arm/include/asm/arch-sunxi/clock_sun4i.h
create mode 100644 arch/arm/include/asm/arch-sunxi/sys_proto.h
create mode 100644 arch/arm/include/asm/arch-sunxi/timer.h
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile
b/arch/arm/cpu/armv7/sunxi/Makefile
new file mode 100644
index 000..440d266
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -0,0 +1,12 @@
+#
+# (C) Copyright 2012 Henrik Nordstrom hen...@henriknordstrom.net
+#
+# Based on some other Makefile
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+obj-y += timer.o
+obj-y += clock.o
+obj-$(CONFIG_SUN7I)+= clock_sun4i.o
diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c
new file mode 100644
index 000..47fb70f
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/clock.c
@@ -0,0 +1,25 @@
+/*
+ * (C) Copyright 2007-2012
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Tom Cubie tangli...@allwinnertech.com
+ *
+ * (C) Copyright 2013 Luke Kenneth Casson Leighton l...@lkcl.net
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/gpio.h
+#include asm/arch/sys_proto.h
+
+int clock_init(void)
+{
+#ifdef CONFIG_SPL_BUILD
+ clock_init_safe();
+#endif
+ clock_init_uart();
+
+ return 0;
+}
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
new file mode 100644
index 000..5a7da3c
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
@@ -0,0 +1,188 @@
+/*
+ * sun4i, sun5i and sun7i specific clock code
+ *
+ * (C) Copyright 2007-2012
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Tom Cubie tangli...@allwinnertech.com
+ *
+ * (C) Copyright 2013 Luke Kenneth Casson Leighton l...@lkcl.net
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/gpio.h
+#include asm/arch/sys_proto.h
+
+#ifdef CONFIG_SPL_BUILD
+void clock_init_safe(void)
+{
+ struct sunxi_ccm_reg * const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* Set safe defaults until PMU is configured */
+ writel(AXI_DIV_1 AXI_DIV_SHIFT |
+ AHB_DIV_2 AHB_DIV_SHIFT |
+ APB0_DIV_1 APB0_DIV_SHIFT |
+ CPU_CLK_SRC_OSC24M CPU_CLK_SRC_SHIFT,
+
Re: [U-Boot] [PATCH v5 0/8] sunxi: initial upstreaming effort
On Monday, May 05, 2014 at 12:52:02 PM, Ian Campbell wrote: This is my fifth attempt at an upstreamable series based upon the https://github.com/linux-sunxi/u-boot-sunxi.git#sunxi tree. The intention is to present a minimal starting point for upstreaming to which support for other processors, peripherals, boards etc can be added in the future. Therefore this has been stripped right back and currently supports only sun7i processors (AKA Allwinner A20) and the cubietruck board. Supported peripherals are UART, MMC and Ethernet. The code here is from u-boot-sunxi.git#sunxi[0] changeset based on d9fe0a1e061e 3f5ff92b1503 sunxi: add comments to pll1_para array. and applies to u-boot v2014.04. It merges cleanly into current mainline head. I'm fine here. Tom/Albert, can you do one last skim over them and apply if OK? Thanks! Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v11 0/2] S5P: Exynos: Add GPIO numbering feature
Hello Akshay, On 05/05/2014 12:39 PM, Akshay Saraswat wrote: Used a script to recheck/verify pin mapping and existing mapping appears to be fine, returning correct bank and pin values. Did ./MAKEALL -a arm and found all Exynos/S5P related boards compiled successfully. Couldn't test booting over all of them. Tested U-Boot bootup over SMDK5420, SMDK5250, Snow. Requesting maintaners to please test over affected SoCs/boards. Changes in V2: - Enabled CMD_GPIO as suggested by Simon Glass and supported same for EXYNOS5. Changes in V3: - New patch added to rename S5P GPIO definitions to S5P_GPIO. - GPIO Table added to calculate the base address of input gpio bank. Changes in V4: - To have consistent 0..n-1 GPIO numbering the banks are divided into different parts where ever they have holes in them. - Function and table to support gpio command moved to s5p-gpio driver. - Rebased on latest u-boot-samsung tree. Changes in V5: - Rebased on latest u-boot-samsung tree. - Removed Exynos5 specific code in gpio driver api to get bank. - Added #define HAVE_GENERIC_GPIO in config file to remove conditinal CPU check in gpio driver. Changes in V6: - Isolated config changes in a new patch. - Updated patches with corresponding changes for Exynos 5420. Changes in V7: - Added changes for other SoCs like Exynos 4412, 4210 etc. Changes in V8: - Changed Subject of patch 2/2 to reflect affected SoCs/boards. - Fixed arndale board compile time errors introduced due to patch-set v7. Changes in V9: - Fixed checkpatch errors. - Fixed naming error in exynos_gpio_data arrays which could be the possible reason behind data abort witnessed over Exynos4 boards. Changes in v10: - Made arch-exynos/gpio.h - arch/gpio.h. - Removed dead code. - Replaced exynos_gpio_get calls with corresponding pin number. - Edited pin numbmers in dts files. Changes in v11: - Created and fixed pinmux config for Exynos 4412. - Removed dead code. Akshay Saraswat (2): S5P: Exynos: Add GPIO pin numbering and rename definitions S5P: Exynos: Config: Enable GPIO CMD config arch/arm/cpu/armv7/exynos/pinmux.c | 549 + arch/arm/dts/exynos4210-origen.dts |4 +- arch/arm/dts/exynos4210-trats.dts |6 +- arch/arm/dts/exynos4210-universal_c210.dts |4 +- arch/arm/dts/exynos4412-trats2.dts |4 +- arch/arm/include/asm/arch-exynos/cpu.h | 17 +- arch/arm/include/asm/arch-exynos/gpio.h| 1761 +++- arch/arm/include/asm/arch-s5pc1xx/gpio.h | 945 --- board/samsung/arndale/arndale.c| 11 +- board/samsung/goni/goni.c | 26 +- board/samsung/smdk5250/exynos5-dt.c| 20 +- board/samsung/smdk5250/smdk5250.c | 19 +- board/samsung/smdk5420/smdk5420.c | 15 +- board/samsung/smdkc100/smdkc100.c |5 +- board/samsung/smdkv310/smdkv310.c | 17 +- board/samsung/trats/trats.c| 39 +- board/samsung/trats2/trats2.c | 74 +- board/samsung/universal_c210/universal.c | 51 +- drivers/gpio/s5p_gpio.c| 198 +++- include/configs/exynos5-dt.h |2 + include/configs/s5p_goni.h |4 +- include/configs/s5pc210_universal.h| 16 +- include/configs/smdkv310.h |1 + include/configs/trats.h|8 +- include/configs/trats2.h |4 +- 25 files changed, 2902 insertions(+), 898 deletions(-) This patch set was tested on: goni, universal, trats and trats2 - works fine. Acked-by: Przemyslaw Marczak p.marc...@samsung.com Thanks you -- Przemyslaw Marczak Samsung RD Institute Poland Samsung Electronics p.marc...@samsung.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [linux-sunxi] [PATCH v5 7/8] sunxi: mmc support
On 05.05.2014 12:52, Ian Campbell wrote:
This adds support for the MMC controller on the Allwinner A20 (sun7i)
processor.
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Luke Leighton l...@lkcl.net
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Wills Wang wills.wang.o...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
Reviewed-by: Marek Vasut ma...@denx.de
Cc: Stefan Roese s...@denx.de
Cc: Tom Cubie mr.hip...@gmail.com
Cc: Aaron Maoye leafy.m...@allwinnertech.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
Ian, thanks a lot for your endurance and patience to get this sunxi stuff
upstream. Really appreciated. One comment below:
snip
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 328334a..dc7f636 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -14,6 +14,8 @@
#include common.h
#include asm/arch/clock.h
#include asm/arch/dram.h
+#include asm/arch/gpio.h
+#include asm/arch/mmc.h
DECLARE_GLOBAL_DATA_PTR;
@@ -43,6 +45,76 @@ int dram_init(void)
return 0;
}
+#ifdef CONFIG_GENERIC_MMC
+static void mmc_pinmux_setup(int sdc)
+{
+ unsigned int pin;
+
+ switch (sdc) {
+ case 0:
+ /* D1-PF0, D0-PF1, CLK-PF2, CMD-PF3, D3-PF4, D4-PF5 */
+ for (pin = SUNXI_GPF(0); pin = SUNXI_GPF(5); pin++) {
+ sunxi_gpio_set_cfgpin(pin, SUNXI_GPF0_SDC0);
+ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_drv(pin, 2);
+ }
+ break;
+
+ case 1:
+#if CONFIG_MMC1_PG
+ /* PG0-CMD, PG1-CLK, PG2~5-D0~3 : 4 */
+ for (pin = SUNXI_GPG(0); pin = SUNXI_GPG(5); pin++) {
+ sunxi_gpio_set_cfgpin(pin, SUN4I_GPG0_SDC1);
+ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_drv(pin, 2);
+ }
+#else
+ /* PH22-CMD, PH23-CLK, PH24~27-D0~D3 : 5 */
+ for (pin = SUNXI_GPH(22); pin = SUNXI_GPH(27); pin++) {
+ sunxi_gpio_set_cfgpin(pin, SUN4I_GPH22_SDC1);
+ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_drv(pin, 2);
+ }
+#endif
Are you sure that this is correct and shouldn't be:
+#ifdef CONFIG_MMC1_PG
?
A quick scan through this patch series shows that this define
is not set at all. Perhaps its outdated? Or is it used to support
some other sunxi SoC? Not sure, perhaps it should be removed for
now.
Other than this please add my:
Reviewed-by: Stefan Roese s...@denx.de
Thanks,
Stefan
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[U-Boot] [PATCH] lib:crc32: Allow setting of the initial crc32 value
The current approach set the initial value of crc32 calculation to zero,
which is correct for calculating checksum of the whole chunk of data.
It however, lacks the flexibility, when one wants to calculate CRC32 of
a file comprised of many smaller parts received separately.
In the proposed approach the output value is used as a starting condition
for the proper crc32 calculation at crc32_wd function. This behavior is
identical to the one provided by crc32() method implementation.
Additionally, comments were appropriately updated.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Cc: Marek Vasut ma...@denx.de
Cc: Simon Glass s...@chromium.org
---
include/hash.h |2 +-
include/u-boot/crc.h |3 ++-
lib/crc32.c |2 +-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/include/hash.h b/include/hash.h
index dc21678..abf704d 100644
--- a/include/hash.h
+++ b/include/hash.h
@@ -101,7 +101,7 @@ int hash_command(const char *algo_name, int flags,
cmd_tbl_t *cmdtp, int flag,
* @algo_name: Hash algorithm to use
* @data: Data to hash
* @len: Lengh of data to hash in bytes
- * @output:Place to put hash value
+ * @output:Place to put hash value - also the initial value (crc32)
* @output_size: On entry, pointer to the number of bytes available in
* output. On exit, pointer to the number of bytes used.
* If NULL, then it is assumed that the caller has
diff --git a/include/u-boot/crc.h b/include/u-boot/crc.h
index 754ac72..7a87911 100644
--- a/include/u-boot/crc.h
+++ b/include/u-boot/crc.h
@@ -19,7 +19,8 @@ uint32_t crc32_no_comp (uint32_t, const unsigned char *,
uint);
*
* @input: Input buffer
* @ilen: Input buffer length
- * @output:Place to put checksum result (4 bytes)
+ * @output:Place to provide initial CRC32 value and afterwards
+ * put checksum result (4 bytes)
* @chunk_sz: Trigger watchdog after processing this many bytes
*/
void crc32_wd_buf(const unsigned char *input, uint ilen,
diff --git a/lib/crc32.c b/lib/crc32.c
index 9759212..f6266c7 100644
--- a/lib/crc32.c
+++ b/lib/crc32.c
@@ -257,7 +257,7 @@ void crc32_wd_buf(const unsigned char *input, unsigned int
ilen,
{
uint32_t crc;
- crc = crc32_wd(0, input, ilen, chunk_sz);
+ crc = crc32_wd(*(uint32_t *)output, input, ilen, chunk_sz);
crc = htonl(crc);
memcpy(output, crc, sizeof(crc));
}
--
1.7.10.4
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Re: [U-Boot] DA850EVM with USE_NAND config does not pad the AIS file
On Sat, Apr 26, 2014 at 01:34:58PM -0400, Tom Taylor wrote: I'm a U-Boot newbie so please feel free to correct how I'm reporting this issue.. I recently downloaded the 2014.04-rc3 snapshot to build U-Boot for my custom DA850-based board. The only change was to add a new target dav850evm_nand in boards.cfg with the added parameter USE_NAND. The resulting AIS file was programmed into EVM-compatible NAND using standard sfh_OMAP-L138 method. The board failed to boot, and stayed in a loop printing the SPL console message repeatedly. After some debugging with CCS 5.5 and an XDS100v2, I found that incorrect code was being loaded into the 0xc108000 RAM destination. The da850evm.h file defines CONFIG_SYS_NAND_U_BOOT_OFFS as 0x28000, which corresponds to an AIS offset of 0x8000 but the u-boot header did not appear there in the AIS file. A search revealed that the Makefile catenated u-boot immediately after the SPL without any padding. Further investigation revealed that the target Makefile needs CONFIG_SPL_MAX_SIZE to be defined as 0x8000 in order for the padding to be performed properly; however, this constant was apparently deleted during a series of changes in April, 2013 to accommodate separate code and BSS size limits for another target. In its place, CONFIG_SPL_MAX_FOOTPRINT was defined as 32768. Unfortunately, the da850evm Makefile does not refer to this constant. To solve the problem, I added the following 2 lines in my custom-modified da850evm.h: #define CONFIG_SPL_PAD_TO0x8000 #define CONFIG_SPL_MAX_SIZE 0x8000 Thanks for looking into this. I saw a similar issue on my am18xx EVM but was 5 bugs deep and didn't have time to bisect it then. I think the answer here is to post a patch fixing the boards listed in: $ git grep -l ARM926EJS include/configs/ | xargs grep -l DAVINCI As they all share that set of constraints. Thanks for digging into this! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/2] wandboard: add Future Eletronics 7 WVGA LCD extension board
Hi Otavio,
On 02/05/2014 00:02, Otavio Salvador wrote:
This adds support for the 7 WVGA produced by Future Eletronics and
make it dynamically detect if it is connected or not based on the
touchscreen controller.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v3:
- Drop LVDS related code (unused)
Changes in v2:
- Drop LDB related code (unused)
board/wandboard/wandboard.c | 147
include/configs/wandboard.h | 7 +++
2 files changed, 128 insertions(+), 26 deletions(-)
diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c
index f1951dc..311a442 100644
--- a/board/wandboard/wandboard.c
+++ b/board/wandboard/wandboard.c
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2013 Freescale Semiconductor, Inc.
+ * Copyright (C) 2014 O.S. Systems Software LTDA.
*
* Author: Fabio Estevam fabio.este...@freescale.com
*
@@ -15,18 +16,19 @@
#include asm/arch/sys_proto.h
#include asm/gpio.h
#include asm/imx-common/iomux-v3.h
+#include asm/imx-common/mxc_i2c.h
#include asm/imx-common/boot_mode.h
+#include asm/imx-common/video.h
#include asm/io.h
#include linux/sizes.h
#include common.h
#include fsl_esdhc.h
-#include ipu_pixfmt.h
#include mmc.h
#include miiphy.h
#include netdev.h
-#include linux/fb.h
#include phy.h
#include input.h
+#include i2c.h
DECLARE_GLOBAL_DATA_PTR;
@@ -41,6 +43,10 @@ DECLARE_GLOBAL_DATA_PTR;
#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP |\
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
+ PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 2)
#define USDHC3_CD_GPIO IMX_GPIO_NR(3, 9)
#define ETH_PHY_RESETIMX_GPIO_NR(3, 29)
@@ -210,41 +216,124 @@ int board_phy_config(struct phy_device *phydev)
}
#if defined(CONFIG_VIDEO_IPUV3)
-static struct fb_videomode const hdmi = {
- .name = HDMI,
- .refresh= 60,
- .xres = 1024,
- .yres = 768,
- .pixclock = 15385,
- .left_margin= 220,
- .right_margin = 40,
- .upper_margin = 21,
- .lower_margin = 7,
- .hsync_len = 60,
- .vsync_len = 10,
- .sync = FB_SYNC_EXT,
- .vmode = FB_VMODE_NONINTERLACED
+struct i2c_pads_info i2c2_pad_info = {
+ .scl = {
+ .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL
+ | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12
+ | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ .gp = IMX_GPIO_NR(4, 12)
+ },
+ .sda = {
+ .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA
+ | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13
+ | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ .gp = IMX_GPIO_NR(4, 13)
+ }
};
-int board_video_skip(void)
-{
- int ret;
+static iomux_v3_cfg_t const fwadapt_7wvga_pads[] = {
+ MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK,
+ MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02, /* HSync */
+ MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03, /* VSync */
+ MX6_PAD_DI0_PIN4__IPU1_DI0_PIN04
+ | MUX_PAD_CTRL(PAD_CTL_DSE_120ohm), /* Contrast */
+ MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15, /* DISP0_DRDY */
+
+ MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00,
+ MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01,
+ MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02,
+ MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03,
+ MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04,
+ MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05,
+ MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06,
+ MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07,
+ MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08,
+ MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09,
+ MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10,
+ MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11,
+ MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12,
+ MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13,
+ MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14,
+ MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15,
+ MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16,
+ MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17,
+
+ MX6_PAD_SD4_DAT2__GPIO2_IO10
+ | MUX_PAD_CTRL(NO_PAD_CTRL), /* DISP0_BKLEN */
+ MX6_PAD_SD4_DAT3__GPIO2_IO11
+ | MUX_PAD_CTRL(NO_PAD_CTRL), /* DISP0_VDDEN */
+};
- ret = ipuv3_fb_init(hdmi, 0, IPU_PIX_FMT_RGB24);
+static void do_enable_hdmi(struct display_info_t const *dev)
+{
+ imx_enable_hdmi_phy();
+}
- if (ret) {
- printf(HDMI cannot be configured: %d\n, ret);
- return ret;
- }
+static int detect_i2c(struct display_info_t const *dev)
+{
+ return (0 == i2c_set_bus_num(dev-bus))
+
[U-Boot] [PATCH v2] dfu: Introduction of the dfu_checksum_method env variable for checksum method setting
Up till now the CRC32 of received data was calculated unconditionally.
The standard crc32 implementation causes long delays when large images
were uploaded.
The dfu_checksum_method environment variable gives the opportunity to
enable on demand (when e.g. debugging) the crc32 calculation.
It can be done without need to recompile the u-boot binary.
By default the crc32 is not calculated.
Tests results:
400 MiB ums.img file
Withcrc32 calculation: 65 sec [avg 6.29 MB/s]
Without crc32 calculation: 25 sec [avg 16.17 MB/s]
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Cc: Marek Vasut ma...@denx.de
---
Dependency:
lib:crc32: Allow setting of the initial crc32 value
http://patchwork.ozlabs.org/patch/345720/
Changes for v2:
- Utilization of hash_block generic function to calculate CRC32 checksum
---
drivers/dfu/dfu.c | 53 +++--
1 file changed, 47 insertions(+), 6 deletions(-)
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index 51b1026..7705c37 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -13,6 +13,7 @@
#include mmc.h
#include fat.h
#include dfu.h
+#include hash.h
#include linux/list.h
#include linux/compiler.h
@@ -20,6 +21,7 @@ static bool dfu_reset_request;
static LIST_HEAD(dfu_list);
static int dfu_alt_num;
static int alt_num_cnt;
+static char *dfu_checksum_method;
bool dfu_reset(void)
{
@@ -99,6 +101,24 @@ unsigned char *dfu_get_buf(void)
return dfu_buf;
}
+static char *dfu_get_checksum_method(void)
+{
+ char *s;
+
+ s = getenv(dfu_checksum_method);
+ if (!s)
+ return NULL;
+
+ if (!strcmp(s, crc32)) {
+ debug(%s: DFU checksum method: %s\n, __func__, s);
+ return s;
+ }
+
+ error(DFU checksum method: %s not supported!\n, s);
+
+ return NULL;
+}
+
static int dfu_write_buffer_drain(struct dfu_entity *dfu)
{
long w_size;
@@ -109,9 +129,16 @@ static int dfu_write_buffer_drain(struct dfu_entity *dfu)
if (w_size == 0)
return 0;
- /* update CRC32 */
- dfu-crc = crc32(dfu-crc, dfu-i_buf_start, w_size);
-
+ if (dfu_checksum_method) {
+ hash_block(dfu_checksum_method, dfu-i_buf_start, w_size,
+ (uint8_t *)dfu-crc, NULL);
+ /*
+* Call to ntohl() is necessary because of
+* hash_block() implementation, which returns
+* crc32 in the network order (big endian)
+*/
+ dfu-crc = ntohl(dfu-crc);
+ }
ret = dfu-write_medium(dfu, dfu-offset, dfu-i_buf_start, w_size);
if (ret)
debug(%s: Write error!\n, __func__);
@@ -134,7 +161,9 @@ int dfu_flush(struct dfu_entity *dfu, void *buf, int size,
int blk_seq_num)
if (dfu-flush_medium)
ret = dfu-flush_medium(dfu);
- printf(\nDFU complete CRC32: 0x%08x\n, dfu-crc);
+ if (dfu_checksum_method)
+ printf(\nDFU complete %s: 0x%08x\n, dfu_checksum_method,
+ dfu-crc);
/* clear everything */
dfu_free_buf();
@@ -234,7 +263,16 @@ static int dfu_read_buffer_fill(struct dfu_entity *dfu,
void *buf, int size)
/* consume */
if (chunk 0) {
memcpy(buf, dfu-i_buf, chunk);
- dfu-crc = crc32(dfu-crc, buf, chunk);
+ if (dfu_checksum_method) {
+ hash_block(dfu_checksum_method, buf, chunk,
+ (uint8_t *)dfu-crc, NULL);
+ /*
+* Call to ntohl() is necessary because of
+* hash_block() implementation, which returns
+* crc32 in the network order (big endian)
+*/
+ dfu-crc = ntohl(dfu-crc);
+ }
dfu-i_buf += chunk;
dfu-b_left -= chunk;
dfu-r_left -= chunk;
@@ -318,7 +356,9 @@ int dfu_read(struct dfu_entity *dfu, void *buf, int size,
int blk_seq_num)
}
if (ret size) {
- debug(%s: %s CRC32: 0x%x\n, __func__, dfu-name, dfu-crc);
+ if (dfu_checksum_method)
+ debug(%s: %s %s: 0x%x\n, __func__, dfu-name,
+ dfu_checksum_method, dfu-crc);
puts(\nUPLOAD ... done\nCtrl+C to exit ...\n);
dfu_free_buf();
@@ -393,6 +433,7 @@ int dfu_config_entities(char *env, char *interface, int num)
dfu_alt_num = dfu_find_alt_num(env);
debug(%s: dfu_alt_num=%d\n, __func__, dfu_alt_num);
+ dfu_checksum_method = dfu_get_checksum_method();
dfu = calloc(sizeof(*dfu), dfu_alt_num);
if (!dfu)
return
Re: [U-Boot] [PATCH 2/4] video: Add support for imx25 lcd controller
On 05/05/2014 11:16, Anatolij Gustschin wrote: Hi, On Wed, 23 Apr 2014 07:52:43 +0200 die...@gmx.de wrote: From: Thomas Diener die...@gmx.de This patch adds support for the imx25 lcd display controller. Signed-off-by: Thomas Diener die...@gmx.de --- drivers/video/Makefile|1 + drivers/video/imx25lcdc.c | 123 + 2 files changed, 124 insertions(+) create mode 100644 drivers/video/imx25lcdc.c There are two empty lines at the end of the added file. These can be removed when applying, so there is no need to resubmit the patch. Otherwise Acked-by: Anatolij Gustschin ag...@denx.de Thanks Anatoljii - put in my list for merging. Regrads, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 5/5] samsung: misc: remove download mode info screen
Dear Przemyslaw Marczak,
On 30 April 2014 20:28, Przemyslaw Marczak p.marc...@samsung.com wrote:
This change removes LCD menu download mode info screen.
Now key press timeout is checked in function download_menu()
and menu options are displayed directly after PWR + VOLUP keys.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes v4:
- new commit
Changes v5:
- none
---
board/samsung/common/misc.c | 73
+++--
1 file changed, 31 insertions(+), 42 deletions(-)
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index 2ea275e..03106fd 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -261,7 +261,7 @@ static void display_download_menu(int mode)
selection[mode] = [=];
lcd_clear();
- lcd_printf(\n\t\tDownload Mode Menu\n);
+ lcd_printf(\n\n\t\tDownload Mode Menu\n\n);
for (i = 0; i = BOOT_MODE_EXIT; i++)
lcd_printf(\t%s %s - %s\n\n, selection[i],
@@ -274,10 +274,38 @@ static void download_menu(void)
int mode = 0;
int last_mode = 0;
int run;
- int key;
+ int key = 0;
+ int timeout = 15; /* sec */
+ int i;
display_download_menu(mode);
+ lcd_puts(\n);
+
+ /* Start count if no key is pressed */
+ while (check_keys())
+ continue;
+
+ while (timeout--) {
+ lcd_printf(\r\tNormal boot will start in: %2.d seconds.,
+ timeout);
+
+ /* about 1000 ms in for loop */
+ for (i = 0; i 10; i++) {
+ mdelay(100);
+ key = check_keys();
+ if (key)
+ break;
+ }
+ if (key)
maybe, unnecessary if statement.
+ break;
+ }
+
+ if (!key) {
+ lcd_clear();
+ return;
+ }
+
while (1) {
run = 0;
@@ -315,45 +343,6 @@ static void download_menu(void)
lcd_clear();
}
-static void display_mode_info(void)
-{
- lcd_position_cursor(4, 4);
- lcd_printf(%s\n, U_BOOT_VERSION);
- lcd_puts(\nDownload Mode Menu\n);
-#ifdef CONFIG_SYS_BOARD
- lcd_printf(Board name: %s\n, CONFIG_SYS_BOARD);
-#endif
- lcd_printf(Press POWER KEY to display MENU options.);
-}
-
-static int boot_menu(void)
-{
- int key = 0;
- int timeout = 10;
-
- display_mode_info();
-
- while (timeout--) {
- lcd_printf(\rNormal boot will start in: %d seconds.,
timeout);
- mdelay(1000);
-
- key = key_pressed(KEY_POWER);
- if (key)
- break;
- }
-
- lcd_clear();
-
- /* If PWR pressed - show download menu */
- if (key) {
- printf(Power pressed - go to download menu\n);
- download_menu();
- printf(Download mode exit.\n);
- }
-
- return 0;
-}
-
void check_boot_mode(void)
{
int pwr_key;
@@ -366,7 +355,7 @@ void check_boot_mode(void)
power_key_pressed(KEY_PWR_INTERRUPT_REG);
if (key_pressed(KEY_VOLUMEUP))
- boot_menu();
+ download_menu();
else if (key_pressed(KEY_VOLUMEDOWN))
mode_leave_menu(BOOT_MODE_THOR);
}
--
1.9.1
___
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Thanks,
Minkyu Kang.
--
from. prom.
www.promsoft.net
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Re: [U-Boot] [PATCH v5 4/5] samsung: misc: menu: increase delay in menu main loop
On Wed, 2014-04-30 at 13:28 +0200, Przemyslaw Marczak wrote: Increase menu loop delay to 200 ms helps choose the right menu option by user. Before this, each time key was pressed the current menu option was changed few times. Now it changes only once and also changes few times if key is pressed for a longer time. Since this description better reflects the motivation of the change, and because there appears to be no need to actually de-bounce the keys, I think this patch is good. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [linux-sunxi] [PATCH v5 7/8] sunxi: mmc support
On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote:
+ case 1:
+#if CONFIG_MMC1_PG
Are you sure that this is correct and shouldn't be:
+#ifdef CONFIG_MMC1_PG
?
It's correct in so far as it works (the boards.cfg config stuff
#defines things to 1), but I think you are right that it isn't the
preferred style. But...
A quick scan through this patch series shows that this define
is not set at all. Perhaps its outdated? Or is it used to support
some other sunxi SoC? Not sure, perhaps it should be removed for
now.
...I had thought that it was to support some other board which wasn't
being upstreamed right now, so eventually useful and harmless for now,
but I've just checked and it isn't actually used by any of the boards in
u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it.
Rather than resend the entire series, here is v5.1 of this patch.
Other than this please add my:
Reviewed-by: Stefan Roese s...@denx.de
Thanks!
8-
From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001
From: Ian Campbell i...@hellion.org.uk
Date: Fri, 7 Mar 2014 04:29:39 +
Subject: [PATCH v5.1 7/8] sunxi: mmc support
This adds support for the MMC controller on the Allwinner A20 (sun7i)
processor.
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Luke Leighton l...@lkcl.net
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Wills Wang wills.wang.o...@gmail.com
Signed-off-by: Ian Campbell i...@hellion.org.uk
Reviewed-by: Marek Vasut ma...@denx.de
Reviewed-by: Stefan Roese s...@denx.de
Cc: Tom Cubie mr.hip...@gmail.com
Cc: Aaron Maoye leafy.m...@allwinnertech.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
---
v5.1: Based on 3f5ff92b1503 sunxi: add comments to pll1_para array.
- Drop unused CONFIG_MMC1_PG option
- Make comments in mmc_pinmux_setup be consistent (always Function-Pin, not
half Pin-Function).
v5: Based on 3f5ff92b1503 sunxi: add comments to pll1_para array.
- No changes required
v4: Based on d9fe0a1e061e sunxi: mksunxiboot: remove unnecessary casts.
- Moved pinmux setup from drivers/mmc/sunxi_mmc.c to
board/sunxi/board.c
- Use setbits_le32 to manipulate the ahb0 gate.
v3: Based on c89867dca2e9 sunxi: clocks: clock_get_pll5
prototype and coding style.
v2: Based on u-boot-sunxi.git#sunxi d9aa5dd3d15c sunxi: mmc:
checkpatch whitespace fixes with v2014.04-rc2 merged in:
- use proper gpio interfaces, removing awkward casts and some magic numbers.
- remove magic numbers
- other cleanups
v1: Based on u-boot-sunxi.git#sunxi commit d854c4de2f57 arm: Handle .gnu.hash
section in ldscripts vs v2014.01.
mmc: drop debug
---
arch/arm/include/asm/arch-sunxi/mmc.h | 124 +
board/sunxi/board.c | 63 +
drivers/mmc/Makefile | 1 +
drivers/mmc/sunxi_mmc.c | 503 ++
include/configs/sunxi-common.h| 11 +
5 files changed, 702 insertions(+)
create mode 100644 arch/arm/include/asm/arch-sunxi/mmc.h
create mode 100644 drivers/mmc/sunxi_mmc.c
diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h
b/arch/arm/include/asm/arch-sunxi/mmc.h
new file mode 100644
index 000..53196e3
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
@@ -0,0 +1,124 @@
+/*
+ * (C) Copyright 2007-2011
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * Aaron leafy.m...@allwinnertech.com
+ *
+ * MMC register definition for allwinner sunxi platform.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _SUNXI_MMC_H
+#define _SUNXI_MMC_H
+
+#include linux/types.h
+
+struct sunxi_mmc {
+ u32 gctrl; /* 0x00 global control */
+ u32 clkcr; /* 0x04 clock control */
+ u32 timeout;/* 0x08 time out */
+ u32 width; /* 0x0c bus width */
+ u32 blksz; /* 0x10 block size */
+ u32 bytecnt;/* 0x14 byte count */
+ u32 cmd;/* 0x18 command */
+ u32 arg;/* 0x1c argument */
+ u32 resp0; /* 0x20 response 0 */
+ u32 resp1; /* 0x24 response 1 */
+ u32 resp2; /* 0x28 response 2 */
+ u32 resp3; /* 0x2c response 3 */
+ u32 imask; /* 0x30 interrupt mask */
+ u32 mint; /* 0x34 masked interrupt status */
+ u32 rint; /* 0x38 raw interrupt status */
+ u32 status; /* 0x3c status */
+ u32 ftrglevel; /* 0x40 FIFO threshold watermark*/
+ u32 funcsel;/* 0x44 function select */
+ u32 cbcr; /* 0x48 CIU byte count */
+ u32 bbcr; /* 0x4c BIU byte count */
+ u32 dbgc; /* 0x50 debug enable */
+ u32 res0[11];
+ u32 dmac; /* 0x80 internal DMA control */
+ u32 dlba; /* 0x84 internal
[U-Boot] [UBOOT][PATCH 3/3] ti: qspi: populate slave device to set flash quad bit.
The patch populates the slave data which will be used by flash driver to set the flash quad enable bit. Signed-off-by: Sourav Poddar sourav.pod...@ti.com --- drivers/spi/ti_qspi.c |1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index c5d2245..fd7fea8 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -106,6 +106,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave) slave-memory_map = (void *)MMAP_START_ADDR_DRA; #else slave-memory_map = (void *)MMAP_START_ADDR_AM43x; + slave-op_mode_rx = 8; #endif memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [UBOOT][PATCH 1/3] am33xx: Rework #ifdef's around s_init for clarity
From: Tom Rini tr...@ti.com
The s_init function is only called on SPL or XIP cases, so lets only
build it for them. This makes the #if logic within the function a bit
clearer as to when we are or are not calling things, and makes it easier
to see that for example preloader_console_init isn't ever called in the
non-XIP full U-Boot case.
Signed-off-by: Tom Rini tr...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
arch/arm/cpu/armv7/am33xx/board.c |8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index 2b15a64..fb44cc8 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -202,6 +202,7 @@ static void watchdog_disable(void)
}
#endif
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
void s_init(void)
{
/*
@@ -220,22 +221,19 @@ void s_init(void)
#ifdef CONFIG_SPL_BUILD
save_omap_boot_params();
#endif
-#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
watchdog_disable();
timer_init();
set_uart_mux_conf();
setup_clocks_for_console();
uart_soft_reset();
-#endif
#ifdef CONFIG_NOR_BOOT
gd-baudrate = CONFIG_BAUDRATE;
serial_init();
gd-have_console = 1;
-#else
+#elif defined(CONFIG_SPL_BUILD)
gd = gdata;
preloader_console_init();
#endif
-#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
prcm_init();
set_mux_conf_regs();
#if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC)
@@ -243,8 +241,8 @@ void s_init(void)
rtc32k_enable();
#endif
sdram_init();
-#endif
}
+#endif
#ifndef CONFIG_SYS_DCACHE_OFF
void enable_caches(void)
--
1.7.9.5
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[U-Boot] [UBOOT][PATCH 2/3] am43xx_evm: Add qspi and qspiboot targets
Only the ePOS EVM has QSPI as an option and QSPI and NAND are mutually
exclusive. Add a qspi target that can see QSPI and work with it (as we
cannot do the pinmux for both QSPI and NAND at the same time) and a
qspiboot target that can be written to QSPI and booted (we are XIP and
thus need a different CONFIG_SYS_TEXT_BASE than normal).
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
Signed-off-by: Tom Rini tr...@ti.com
---
arch/arm/cpu/armv7/am33xx/board.c |6 --
arch/arm/cpu/armv7/am33xx/emif4.c |3 ++-
board/ti/am43xx/Makefile |2 +-
board/ti/am43xx/board.c |2 +-
board/ti/am43xx/mux.c |4
boards.cfg|3 +++
include/configs/am43xx_evm.h | 39 ++---
include/configs/ti_armv7_common.h |2 +-
8 files changed, 44 insertions(+), 17 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index fb44cc8..93bdd9d 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -142,7 +142,8 @@ int arch_misc_init(void)
return 0;
}
-#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) || \
+ defined(CONFIG_QSPI_XIP)
/*
* This function is the place to do per-board things such as ramp up the
* MPU clock frequency.
@@ -202,7 +203,8 @@ static void watchdog_disable(void)
}
#endif
-#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) || \
+ defined(CONFIG_QSPI_XIP)
void s_init(void)
{
/*
diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c
b/arch/arm/cpu/armv7/am33xx/emif4.c
index 3e39752..f3fe53b 100644
--- a/arch/arm/cpu/armv7/am33xx/emif4.c
+++ b/arch/arm/cpu/armv7/am33xx/emif4.c
@@ -35,7 +35,8 @@ void dram_init_banksize(void)
}
-#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) || \
+ defined(CONFIG_QSPI_XIP)
#ifdef CONFIG_TI81XX
static struct dmm_lisa_map_regs *hw_lisa_map_regs =
(struct dmm_lisa_map_regs *)DMM_BASE;
diff --git a/board/ti/am43xx/Makefile b/board/ti/am43xx/Makefile
index cb5fe88..7d12363 100644
--- a/board/ti/am43xx/Makefile
+++ b/board/ti/am43xx/Makefile
@@ -6,7 +6,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
-ifdef CONFIG_SPL_BUILD
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_QSPI_XIP),y)
obj-y := mux.o
endif
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index d744977..7cc5a0e 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -70,7 +70,7 @@ static int read_eeprom(struct am43xx_board_id *header)
return 0;
}
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_QSPI_XIP)
#define NUM_OPPS 6
diff --git a/board/ti/am43xx/mux.c b/board/ti/am43xx/mux.c
index 77c53d2..3cfaf7c 100644
--- a/board/ti/am43xx/mux.c
+++ b/board/ti/am43xx/mux.c
@@ -73,6 +73,7 @@ static struct module_pin_mux gpio5_7_pin_mux[] = {
{-1},
};
+#ifdef CONFIG_QSPI
static struct module_pin_mux qspi_pin_mux[] = {
{OFFSET(gpmc_csn0), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_CS0 */
{OFFSET(gpmc_csn3), (MODE(2) | PULLUP_EN | RXACTIVE)}, /* QSPI_CLK */
@@ -82,6 +83,7 @@ static struct module_pin_mux qspi_pin_mux[] = {
{OFFSET(gpmc_be0n_cle), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D3 */
{-1},
};
+#endif
void enable_uart0_pin_mux(void)
{
@@ -99,7 +101,9 @@ void enable_board_pin_mux(void)
configure_module_pin_mux(rgmii1_pin_mux);
} else if (board_is_eposevm()) {
configure_module_pin_mux(rmii1_pin_mux);
+#ifdef CONFIG_QSPI
configure_module_pin_mux(qspi_pin_mux);
+#endif
}
}
diff --git a/boards.cfg b/boards.cfg
index d6d5bb3..588ef5d 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -276,6 +276,9 @@ Active arm armv7 am33xx ti
am335x
Active arm armv7 am33xx ti am335x
am335x_evm_uart5 am335x_evm:SERIAL6,CONS_INDEX=6,NAND
Tom Rini tr...@ti.com
Active arm armv7 am33xx ti am335x
am335x_evm_usbspl
am335x_evm:SERIAL1,CONS_INDEX=1,NAND,SPL_USBETH_SUPPORT
Tom Rini tr...@ti.com
Active arm armv7 am33xx ti am43xx
am43xx_evm am43xx_evm:SERIAL1,CONS_INDEX=1
Lokesh Vutla lokeshvu...@ti.com
+Active arm armv7 am33xx ti
[U-Boot] [UBOOT][PATCH 0/3] am43xx: add xip support for ti qspi
This add support for am43xx qspi XIP boot. In this mode, we will
use only u-boot.bin.
This patch series is tested with a small hack change-
===
--- u-boot.orig/drivers/i2c/i2c_core.c 2014-05-05 16:14:08.305216507 +0530
+++ u-boot/drivers/i2c/i2c_core.c 2014-05-05 18:36:34.837855777 +0530
@@ -258,6 +258,7 @@
*/
unsigned int i2c_get_bus_num(void)
{
+ gd-cur_i2c_bus = 0;
return gd-cur_i2c_bus;
}
We need to do this, beacuse global data(gd) gets populated in _main api
which gets called after s_init. In s_init, we do a i2c_init for which we access
a gd-cur_bus_num, but since gd is not
initilaised, so I get a data abort here.
Sourav Poddar (2):
am43xx_evm: Add qspi and qspiboot targets
ti: qspi: Notify core to use quad command.
Tom Rini (1):
am33xx: Rework #ifdef's around s_init for clarity
arch/arm/cpu/armv7/am33xx/board.c | 12 ++--
arch/arm/cpu/armv7/am33xx/emif4.c |3 ++-
board/ti/am43xx/Makefile |2 +-
board/ti/am43xx/board.c |2 +-
board/ti/am43xx/mux.c |4
boards.cfg|3 +++
drivers/spi/ti_qspi.c |1 +
include/configs/am43xx_evm.h | 39 ++---
include/configs/ti_armv7_common.h |2 +-
9 files changed, 47 insertions(+), 21 deletions(-)
--
1.7.9.5
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Re: [U-Boot] [PATCH] mx6sabred: Add PFUZE100 PMIC support
On Sun, May 4, 2014 at 4:14 PM, Fabio Estevam feste...@gmail.com wrote: From: Fabio Estevam fabio.este...@freescale.com mx6sabresd boards have a PFUZE100 PMIC connected to I2C2 bus. Add support for it. Signed-off-by: Fabio Estevam fabio.este...@freescale.com Are you doing to add the equivalent for the mx6slevk too? -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6sabred: Add PFUZE100 PMIC support
On Mon, May 5, 2014 at 11:00 AM, Otavio Salvador ota...@ossystems.com.br wrote: On Sun, May 4, 2014 at 4:14 PM, Fabio Estevam feste...@gmail.com wrote: From: Fabio Estevam fabio.este...@freescale.com mx6sabresd boards have a PFUZE100 PMIC connected to I2C2 bus. Add support for it. Signed-off-by: Fabio Estevam fabio.este...@freescale.com Are you doing to add the equivalent for the mx6slevk too? After this one gets accepted I will add PMIC support for mx6slevk and mx6qsabreauto. I also plan to add ldo-bypass mode support. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] fs:ext4:cleanup: Remove superfluous code
Hi Lukasz,
On 4 May 2014 23:20, Lukasz Majewski l.majew...@samsung.com wrote:
Hi Simon,
On 30 April 2014 03:39, Lukasz Majewski l.majew...@samsung.com
wrote:
Code responsible for handling situation when ext4 has block size of
1024B can be ordered to take less space.
This patch does that for ext4 common and write files.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Reviewed-by: Simon Glass s...@chromium.org
---
fs/ext4/ext4_common.c |6 ++
fs/ext4/ext4_write.c | 50
- 2 files changed,
18 insertions(+), 38 deletions(-)
diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 02da75c..62e2e80 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
[snip]
@@ -181,10 +179,8 @@ static void
delete_double_indirect_block(struct ext2_inode *inode) break;
debug(DICB releasing %u\n, *di_buffer);
- if (fs-blksz != 1024) {
- bg_idx = (*di_buffer) / blk_per_grp;
- } else {
- bg_idx = (*di_buffer) / blk_per_grp;
+ bg_idx = (*di_buffer) / blk_per_grp;
You don't need the brackets here (or below).
Maybe the GIT formatting is a bit misleading, but I've double checked
and it seems that those parenthesis are necessary here.
OK. What is di_buffer such that (*di_buffer) works but *di_buffer doesn't?
Regards,
Simon
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Re: [U-Boot] [PATCH] mx6sabred: Add PFUZE100 PMIC support
Hi Fabio,
just a minor question:
On 04/05/2014 21:14, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
mx6sabresd boards have a PFUZE100 PMIC connected to I2C2 bus.
Add support for it.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx6sabresd/mx6sabresd.c | 83
+
include/configs/mx6sabresd.h| 14 ++
include/power/pfuze100_pmic.h | 4 ++
3 files changed, 101 insertions(+)
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
b/board/freescale/mx6sabresd/mx6sabresd.c
index 3e314da..9e35711 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -12,6 +12,7 @@
#include asm/arch/mx6-pins.h
#include asm/errno.h
#include asm/gpio.h
+#include asm/imx-common/mxc_i2c.h
#include asm/imx-common/iomux-v3.h
#include asm/imx-common/boot_mode.h
#include asm/imx-common/video.h
@@ -23,6 +24,9 @@
#include asm/arch/crm_regs.h
#include asm/io.h
#include asm/arch/sys_proto.h
+#include i2c.h
+#include power/pmic.h
+#include power/pfuze100_pmic.h
DECLARE_GLOBAL_DATA_PTR;
#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP |\
@@ -39,6 +43,14 @@ DECLARE_GLOBAL_DATA_PTR;
#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
+ PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
+#define I2C_PMIC 1
+
+#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
+
int dram_init(void)
{
gd-ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
@@ -129,6 +141,19 @@ iomux_v3_cfg_t const ecspi1_pads[] = {
MX6_PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
+static struct i2c_pads_info i2c_pad_info1 = {
+ .scl = {
+ .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,
+ .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD,
+ .gp = IMX_GPIO_NR(4, 12)
+ },
+ .sda = {
+ .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD,
+ .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD,
+ .gp = IMX_GPIO_NR(4, 13)
+ }
+};
+
static void setup_spi(void)
{
imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
@@ -426,6 +451,64 @@ int board_init(void)
#ifdef CONFIG_MXC_SPI
setup_spi();
#endif
+ setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, i2c_pad_info1);
+
+ return 0;
+}
+
+int misc_init_r(void)
+{
Do we need misc_init ? Why not to use power_init_board() ? It is already
defined as weak.
OT: I confess I am quite losing which functions are already foreseen.
Most of them have the prefix board_, and they are easier to find.
However, power_init_board() does not follow the same rule.
+ struct pmic *p;
+ int ret;
+ unsigned int reg;
+
+ ret = pmic_init(I2C_PMIC);
+ if (ret)
+ return ret;
+
+ p = pmic_get(PFUZE100_PMIC);
+ ret = pmic_probe(p);
+ if (ret)
+ return ret;
+
+ pmic_reg_read(p, PFUZE100_DEVICEID, reg);
+ printf(PMIC: PFUZE100 ID=0x%02x\n, reg);
+
+ /* Increase VGEN3 from 2.5 to 2.8V */
+ pmic_reg_read(p, PFUZE100_VGEN3VOL, reg);
+ reg = ~0xf;
+ reg |= 0xa;
+ pmic_reg_write(p, PFUZE100_VGEN3VOL, reg);
+
+ /* Increase VGEN5 from 2.8 to 3V */
+ pmic_reg_read(p, PFUZE100_VGEN5VOL, reg);
+ reg = ~0xf;
+ reg |= 0xc;
+ pmic_reg_write(p, PFUZE100_VGEN5VOL, reg);
+
+ /* Set SW1AB stanby volage to 0.975V */
+ pmic_reg_read(p, PFUZE100_SW1ABSTBY, reg);
+ reg = ~0x3f;
+ reg |= 0x1b;
+ pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
+
+ /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
+ pmic_reg_read(p, PUZE_100_SW1ABCONF, reg);
+ reg = ~0xc0;
+ reg |= 0x40;
+ pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
+
+ /* Set SW1C standby voltage to 0.975V */
+ pmic_reg_read(p, PFUZE100_SW1CSTBY, reg);
+ reg = ~0x3f;
+ reg |= 0x1b;
+ pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
+
+ /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
+ pmic_reg_read(p, PFUZE100_SW1CCONF, reg);
+ reg = ~0xc0;
+ reg |= 0x40;
+ pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
return 0;
}
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index 0fa6573..fe846e6 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -25,6 +25,8 @@
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
+#define CONFIG_MISC_INIT_R
+
#include mx6sabre_common.h
#define CONFIG_SYS_FSL_USDHC_NUM 3
@@ -59,4 +61,16 @@
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
#endif
+/* I2C Configs */
+#define
Re: [U-Boot] [PATCH v4 00/10] ARMv7: add PSCI support to U-Boot
Mark, Not sure on which patch of your series to base the following comment, but thought it was worth bringing up for discussion nevertheless. So, over in U-Boot ARMv7's arch/arm/cpu/armv7/start.S code, there is a bit of code under the enty-point named cpu_init_cp15 that does some I-Cache/MMU/state and Errata fi-xup for the boot CPU. As it should. That's all splendid. However, any secondary CPU coming out of reset *after* the U-Boot is gone and only the secure monitor remains will still need to execute code that is substantially similar if not exactly the same. That means the same code block (that cpu_init_cp15 code) needs to be assembled into the original out-of-reset sequence for the boot CPU, and also needs to be assembled into the secure monitor code for secondary CPU out-of-reset sequences. We clearly can not directly refactor that function, extracting it and reusing it wiith the same entry-point as it needs to be linked into two different sections. We could put it in some header file and #include it into both places. We could define a macro and instantiate it in each place. We could do some hacky assemble it twice with different names thing. Thoughts? Thanks, jdl On Sat, Apr 26, 2014 at 7:17 AM, Marc Zyngier marc.zyng...@arm.com wrote: PSCI is an ARM standard that provides a generic interface that supervisory software can use to manage power in the following situations: - Core idle management - CPU hotplug - big.LITTLE migration models - System shutdown and reset It basically allows the kernel to offload these tasks to the firmware, and rely on common kernel side code that just calls into PSCI. More importantly, it gives a way to ensure that CPUs enter the kernel at the appropriate exception level (ie HYP mode, to allow the use of the virtualization extensions), even across events like CPUs being powered off/on or suspended. The main idea here is to turn some of the existing U-Boot code into a separate section that can live in secure RAM (or a reserved page of memory), containing a secure monitor that will implement the PSCI operations. This code will still be alive when U-Boot is long gone, hence the need for a piece of memory that will not be touched by the OS. This patch series contains 3 parts: - the first four patches are just bug fixes - the next two refactor the HYP/non-secure code to allow relocation in secure memory - the last four contain the generic PSCI code and DT infrastructure This implements the original 0.1 spec, as nobody implements the new 0.2 version so far. I plan to update this support to 0.2 once there is an official binding available (and support in the kernel). Most of the development has been done on an Allwinner A20 SoC, which is the main user of this code at the moment. I hope new SoCs will be using this method in the future (my primary goal for this series being to avoid more stupid SMP code from creeping up in the Linux kernel). As instructed, I've removed the A20 support code and made it a separate series, as there is now an effort to mainline this code (see Ian Campbell patch series). With these three series applied, the A20 now boots in HYP mode, Linux finds the secondary CPU without any SMP code present in the kernel, and runs KVM out of the box. The Xen/ARM guys managed to do the same fairly easily, as did at least one XVizor user. This code has also been tested on a VExpress TC2, running KVM with all 5 CPUs, in order to make sure there was no obvious regression. The code is also available at: git://git.kernel.org/pub/scm/linux/kernel/git/maz/u-boot.git wip/psci-v4 A fully merged branch with the A20 support is in the wip/psci-v4-a20 branch of the same repo. Cheers, M. From v3: - Return ARM_PSCI_RET_INVAL instead of ARM_PSCI_RET_NI when PSCI is entered with an invalid function code. - Fix !NONSEC compilation - Rebased on top of adcdeac From v2: - Dropped the secure stack allocation from the generic PSCI code. There was too little space there for it to be really useful, and the arch code knows a lot better about its requirements anyway. It is now the responsibility of the arch code to provide a stack. This allows it to get rid of the silly game with the thread registers that was confusing everyone... - Added provision for FIQ handling in secure mode. Allwinner A20 is going to require this for CPU_OFF. - Better integration of the FDT injection code with the rest of the code, fixing the truncated FDT issue that people have been reporting (courtesy of Ma Haijun). - Cleanup of the AW-specific code (stack allocation, timer macro). - Rebased on mainline U-Boot (on top of 22a240c32c13). From v1: - Complete rewrite, now directly relocating the secure code withing U-Boot, instead of having a separate psci blob. Ma Haijun (1): ARM: convert arch_fixup_memory_node to a generic FDT fixup function Marc Zyngier (9): ARM: HYP/non-sec: move switch to non-sec to the last
[U-Boot] [PATCH 2/2] siemens, draco: add new target
Signed-off-by: Samuel Egli samuel.e...@siemens.com Reviewed-by: Roger Meier r.me...@siemens.com Cc: Heiko Schocher h...@denx.de Cc: Wolfgang Denk w...@denx.de --- boards.cfg |1 + include/configs/draco.h | 92 +++ 2 files changed, 93 insertions(+) create mode 100644 include/configs/draco.h diff --git a/boards.cfg b/boards.cfg index 76c8764..4cc0235 100644 --- a/boards.cfg +++ b/boards.cfg @@ -260,6 +260,7 @@ Active arm armv7 am33xx compulab cm_t335 Active arm armv7 am33xx iseeigep0033 am335x_igep0033 - Enric Balletbo i Serra eballe...@iseebcn.com Active arm armv7 am33xx phytec pcm051 pcm051_rev1 pcm051:REV1 Lars Poeschel poesc...@lemonage.de Active arm armv7 am33xx phytec pcm051 pcm051_rev3 pcm051:REV3 Lars Poeschel poesc...@lemonage.de +Active arm armv7 am33xx siemens draco draco- Roger Meier r.me...@siemens.com Active arm armv7 am33xx siemens draco dxr2 - Roger Meier r.me...@siemens.com Active arm armv7 am33xx siemens pxm2 pxm2 - Roger Meier r.me...@siemens.com Active arm armv7 am33xx siemens rut rut - Roger Meier r.me...@siemens.com diff --git a/include/configs/draco.h b/include/configs/draco.h new file mode 100644 index 000..a2438d8 --- /dev/null +++ b/include/configs/draco.h @@ -0,0 +1,92 @@ +/* + * (C) Copyright 2013 Siemens Schweiz AG + * (C) Heiko Schocher, DENX Software Engineering, h...@denx.de. + * + * Based on: + * U-Boot file:/include/configs/am335x_evm.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef __CONFIG_DRACO_H +#define __CONFIG_DRACO_H + +#define CONFIG_SIEMENS_DRACO +#define MACH_TYPE_DRACO4314 +#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_DRACO + +#include siemens-am33x-common.h + +#define CONFIG_SYS_MPUCLK 275 +#define DDR_PLL_FREQ 303 +#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC + +#define BOARD_DFU_BUTTON_GPIO 27 +#define BOARD_DFU_BUTTON_LED 64 /* red LED */ +#define BOARD_STATUS_LED 103 /* green LED */ +#define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ + +#undef CONFIG_DOS_PARTITION +#undef CONFIG_CMD_FAT + + + /* Physical Memory Map */ +#define CONFIG_MAX_RAM_BANK_SIZE (1024 20)/* 1GB */ + +/* I2C Configuration */ +#define CONFIG_SYS_I2C_SPEED 10 + +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define EEPROM_ADDR_DDR3 0x90 +#define EEPROM_ADDR_CHIP 0x120 + +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x300 + +#undef CONFIG_SPL_NET_SUPPORT +#undef CONFIG_SPL_NET_VCI_STRING +#undef CONFIG_SPL_ETH_SUPPORT + +#undef CONFIG_MII +#undef CONFIG_PHY_GIGE +#define CONFIG_PHY_SMSC + +#define CONFIG_FACTORYSET + +/* Watchdog */ +#define CONFIG_OMAP_WATCHDOG + +#ifndef CONFIG_SPL_BUILD + +/* Default env settings */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + nand_img_size=0x40\0 \ + optargs=\0 \ + CONFIG_COMMON_ENV_SETTINGS + +#ifndef CONFIG_RESTORE_FLASH +/* set to negative value for no autoboot */ +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_BOOTCOMMAND \ +if dfubutton; then \ + run dfu_start; \ + reset; \ +fi; \ +run nand_boot; \ +reset; + + +#else +#define CONFIG_BOOTDELAY 0 + +#define CONFIG_BOOTCOMMAND \ + setenv autoload no; \ + dhcp; \ + if tftp 8000 debrick.scr; then\ + source 8000; \ + fi +#endif +#endif
[U-Boot] [PATCH 1/2] siemens:cosmetic, dxr2: rename dxr2 to draco
The actual board name is draco and dxr2 is the target name.
In the future we'll have different targets based on draco board.
All changes are purely non-functional and basically rename dxr2
to draco.
One style fix in board.c that existed already before.
Signed-off-by: Samuel Egli samuel.e...@siemens.com
Reviewed-by: Roger Meier r.me...@siemens.com
Cc: Heiko Schocher h...@denx.de
Cc: Wolfgang Denk w...@denx.de
---
board/siemens/{dxr2 = draco}/Makefile |0
board/siemens/{dxr2 = draco}/board.c | 71
board/siemens/{dxr2 = draco}/board.h |2 +-
board/siemens/{dxr2 = draco}/mux.c|2 +-
boards.cfg |2 +-
5 files changed, 38 insertions(+), 39 deletions(-)
rename board/siemens/{dxr2 = draco}/Makefile (100%)
rename board/siemens/{dxr2 = draco}/board.c (77%)
rename board/siemens/{dxr2 = draco}/board.h (98%)
rename board/siemens/{dxr2 = draco}/mux.c (99%)
diff --git a/board/siemens/dxr2/Makefile b/board/siemens/draco/Makefile
similarity index 100%
rename from board/siemens/dxr2/Makefile
rename to board/siemens/draco/Makefile
diff --git a/board/siemens/dxr2/board.c b/board/siemens/draco/board.c
similarity index 77%
rename from board/siemens/dxr2/board.c
rename to board/siemens/draco/board.c
index e9f157a..9be2e34 100644
--- a/board/siemens/dxr2/board.c
+++ b/board/siemens/draco/board.c
@@ -1,5 +1,5 @@
/*
- * Board functions for TI AM335X based dxr2 board
+ * Board functions for TI AM335X based draco board
* (C) Copyright 2013 Siemens Schweiz AG
* (C) Heiko Schocher, DENX Software Engineering, h...@denx.de.
*
@@ -37,7 +37,7 @@
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SPL_BUILD
-static struct dxr2_baseboard_id __attribute__((section(.data))) settings;
+static struct draco_baseboard_id __attribute__((section(.data))) settings;
#if DDR_PLL_FREQ == 303
/* Default@303MHz-i0 */
@@ -138,11 +138,10 @@ static int read_eeprom(void)
set_default_ddr3_timings();
}
- if (MAGIC_CHIP == settings.chip.magic) {
+ if (MAGIC_CHIP == settings.chip.magic)
print_chip_data();
- } else {
+ else
printf(Warning: No chip data in eeprom\n);
- }
print_ddr3_timings();
#endif
@@ -152,48 +151,48 @@ static int read_eeprom(void)
#ifdef CONFIG_SPL_BUILD
static void board_init_ddr(void)
{
-struct emif_regs dxr2_ddr3_emif_reg_data = {
+struct emif_regs draco_ddr3_emif_reg_data = {
.zq_config = 0x50074BE4,
};
-struct ddr_data dxr2_ddr3_data = {
+struct ddr_data draco_ddr3_data = {
};
-struct cmd_control dxr2_ddr3_cmd_ctrl_data = {
+struct cmd_control draco_ddr3_cmd_ctrl_data = {
};
-struct ctrl_ioregs dxr2_ddr3_ioregs = {
+struct ctrl_ioregs draco_ddr3_ioregs = {
};
/* pass values from eeprom */
- dxr2_ddr3_emif_reg_data.sdram_tim1 = settings.ddr3.sdram_tim1;
- dxr2_ddr3_emif_reg_data.sdram_tim2 = settings.ddr3.sdram_tim2;
- dxr2_ddr3_emif_reg_data.sdram_tim3 = settings.ddr3.sdram_tim3;
- dxr2_ddr3_emif_reg_data.emif_ddr_phy_ctlr_1 =
+ draco_ddr3_emif_reg_data.sdram_tim1 = settings.ddr3.sdram_tim1;
+ draco_ddr3_emif_reg_data.sdram_tim2 = settings.ddr3.sdram_tim2;
+ draco_ddr3_emif_reg_data.sdram_tim3 = settings.ddr3.sdram_tim3;
+ draco_ddr3_emif_reg_data.emif_ddr_phy_ctlr_1 =
settings.ddr3.emif_ddr_phy_ctlr_1;
- dxr2_ddr3_emif_reg_data.sdram_config = settings.ddr3.sdram_config;
- dxr2_ddr3_emif_reg_data.ref_ctrl = settings.ddr3.ref_ctrl;
-
- dxr2_ddr3_data.datardsratio0 = settings.ddr3.dt0rdsratio0;
- dxr2_ddr3_data.datawdsratio0 = settings.ddr3.dt0wdsratio0;
- dxr2_ddr3_data.datafwsratio0 = settings.ddr3.dt0fwsratio0;
- dxr2_ddr3_data.datawrsratio0 = settings.ddr3.dt0wrsratio0;
-
- dxr2_ddr3_cmd_ctrl_data.cmd0csratio = settings.ddr3.ddr3_sratio;
- dxr2_ddr3_cmd_ctrl_data.cmd0iclkout = settings.ddr3.iclkout;
- dxr2_ddr3_cmd_ctrl_data.cmd1csratio = settings.ddr3.ddr3_sratio;
- dxr2_ddr3_cmd_ctrl_data.cmd1iclkout = settings.ddr3.iclkout;
- dxr2_ddr3_cmd_ctrl_data.cmd2csratio = settings.ddr3.ddr3_sratio;
- dxr2_ddr3_cmd_ctrl_data.cmd2iclkout = settings.ddr3.iclkout;
-
- dxr2_ddr3_ioregs.cm0ioctl = settings.ddr3.ioctr_val,
- dxr2_ddr3_ioregs.cm1ioctl = settings.ddr3.ioctr_val,
- dxr2_ddr3_ioregs.cm2ioctl = settings.ddr3.ioctr_val,
- dxr2_ddr3_ioregs.dt0ioctl = settings.ddr3.ioctr_val,
- dxr2_ddr3_ioregs.dt1ioctl = settings.ddr3.ioctr_val,
-
- config_ddr(DDR_PLL_FREQ, dxr2_ddr3_ioregs, dxr2_ddr3_data,
- dxr2_ddr3_cmd_ctrl_data, dxr2_ddr3_emif_reg_data, 0);
+ draco_ddr3_emif_reg_data.sdram_config = settings.ddr3.sdram_config;
+ draco_ddr3_emif_reg_data.ref_ctrl = settings.ddr3.ref_ctrl;
+
+ draco_ddr3_data.datardsratio0 = settings.ddr3.dt0rdsratio0;
+ draco_ddr3_data.datawdsratio0 = settings.ddr3.dt0wdsratio0;
+
[U-Boot] [PATCH 0/2] siemens: rename board dxr2 to draco and add target draco
These two patches rename board dxr2 to draco and add new target draco with
new MACH_TYPE. New target (patch 2) depends on renaming (patch 1).
Samuel Egli (2):
siemens:cosmetic, dxr2: rename dxr2 to draco
siemens, draco: add new target
board/siemens/{dxr2 = draco}/Makefile |0
board/siemens/{dxr2 = draco}/board.c | 71
board/siemens/{dxr2 = draco}/board.h |2 +-
board/siemens/{dxr2 = draco}/mux.c|2 +-
boards.cfg |3 +-
include/configs/draco.h| 92
6 files changed, 131 insertions(+), 39 deletions(-)
rename board/siemens/{dxr2 = draco}/Makefile (100%)
rename board/siemens/{dxr2 = draco}/board.c (77%)
rename board/siemens/{dxr2 = draco}/board.h (98%)
rename board/siemens/{dxr2 = draco}/mux.c (99%)
create mode 100644 include/configs/draco.h
--
1.7.10.4
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[U-Boot] [PATCH 4/4] [PATCH] ventana: Add support for the LTC3676 PMIC
The LTC3676 PMIC is used instead of the PFUZE100 PMIC on the
GW51xx/GW52xx/GW53xx Ventana baseboards. In order to support the IMX6Q SoC
at 1GHz on those baseboards, we need to adjust the voltage scaling for the SW1
and SW3 DC/DC converters on the LTC3676 for 1225mV. Note that the scalar
values for the LTC3676 are board-specific as they relate to a resistor devider
chosen by the board design.
Signed-off-by: Tim Harvey thar...@gateworks.com
---
board/gateworks/gw_ventana/gw_ventana.c | 78 +++--
include/configs/gw_ventana.h| 2 +
2 files changed, 57 insertions(+), 23 deletions(-)
diff --git a/board/gateworks/gw_ventana/gw_ventana.c
b/board/gateworks/gw_ventana/gw_ventana.c
index 48e90e0..cf42fcf 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -30,6 +30,7 @@
#include mtd_node.h
#include netdev.h
#include power/pmic.h
+#include power/ltc3676_pmic.h
#include power/pfuze100_pmic.h
#include i2c.h
#include fdt_support.h
@@ -733,6 +734,60 @@ struct ventana gpio_cfg[] = {
},
};
+/* setup board specific PMIC */
+int power_init_board(void)
+{
+ struct pmic *p;
+ u32 reg;
+
+ /* configure PFUZE100 PMIC */
+ if (board_type == GW54xx || board_type == GW54proto) {
+ power_pfuze100_init(I2C_PMIC);
+ p = pmic_get(PFUZE100_PMIC);
+ if (p !pmic_probe(p)) {
+ pmic_reg_read(p, PFUZE100_DEVICEID, reg);
+ printf(PMIC: PFUZE100 ID=0x%02x\n, reg);
+
+ /* Set VGEN1 to 1.5V and enable */
+ pmic_reg_read(p, PFUZE100_VGEN1VOL, reg);
+ reg = ~(LDO_VOL_MASK);
+ reg |= (LDOA_1_50V | LDO_EN);
+ pmic_reg_write(p, PFUZE100_VGEN1VOL, reg);
+
+ /* Set SWBST to 5.0V and enable */
+ pmic_reg_read(p, PFUZE100_SWBSTCON1, reg);
+ reg = ~(SWBST_MODE_MASK | SWBST_VOL_MASK);
+ reg |= (SWBST_5_00V | SWBST_MODE_AUTO);
+ pmic_reg_write(p, PFUZE100_SWBSTCON1, reg);
+ }
+ }
+
+ /* configure LTC3676 PMIC */
+ else {
+ power_ltc3676_init(I2C_PMIC);
+ p = pmic_get(LTC3676_PMIC);
+ if (p !pmic_probe(p)) {
+ puts(PMIC: LTC3676\n);
+ /* set board-specific scalar to 1225mV for IMX6Q@1GHz */
+ if (is_cpu_type(MXC_CPU_MX6Q)) {
+ /* mask PGOOD during SW1 transition */
+ reg = 0x1d | LTC3676_PGOOD_MASK;
+ pmic_reg_write(p, LTC3676_DVB1B, reg);
+ /* set SW1 (VDD_SOC) to 1259mV */
+ reg = 0x1d;
+ pmic_reg_write(p, LTC3676_DVB1A, reg);
+
+ /* mask PGOOD during SW3 transition */
+ reg = 0x1d | LTC3676_PGOOD_MASK;
+ pmic_reg_write(p, LTC3676_DVB3B, reg);
+ /*set SW3 (VDD_ARM) to 1259mV */
+ reg = 0x1d;
+ pmic_reg_write(p, LTC3676_DVB3A, reg);
+ }
+ }
+ }
+}
+
/* setup GPIO pinmux and default configuration per baseboard */
static void setup_board_gpio(int board)
{
@@ -1076,29 +1131,6 @@ int misc_init_r(void)
setenv(serial#, str);
}
- /* configure PFUZE100 PMIC (not used on all Ventana baseboards) */
- power_pfuze100_init(I2C_PMIC);
- if (board_type == GW54xx || board_type == GW54proto) {
- struct pmic *p = pmic_get(PFUZE100_PMIC);
- u32 reg;
-
- if (p !pmic_probe(p)) {
- pmic_reg_read(p, PFUZE100_DEVICEID, reg);
- printf(PMIC: PFUZE100 ID=0x%02x\n, reg);
-
- /* Set VGEN1 to 1.5V and enable */
- pmic_reg_read(p, PFUZE100_VGEN1VOL, reg);
- reg = ~(LDO_VOL_MASK);
- reg |= (LDOA_1_50V | LDO_EN);
- pmic_reg_write(p, PFUZE100_VGEN1VOL, reg);
-
- /* Set SWBST to 5.0V and enable */
- pmic_reg_read(p, PFUZE100_SWBSTCON1, reg);
- reg = ~(SWBST_MODE_MASK | SWBST_VOL_MASK);
- reg |= (SWBST_5_00V | SWBST_MODE_AUTO);
- pmic_reg_write(p, PFUZE100_SWBSTCON1, reg);
- }
- }
/* setup baseboard specific GPIO pinmux and config */
setup_board_gpio(board_type);
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 3398390..b984f27 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@
[U-Boot] [RFC PATCH v0 0/4] Improve arm64 support
After talking with some folks at ELC and getting a feel for some things, here is a series to start addressing some issues with the ARM64 port. The following RFC series corrects our passing of args to the Linux kernel and cleans up the vexpress_aemv8a config a bit (and corrects some values too). This also adds support for Image booting. This isn't 100% ready to merge in that it exposes an issue which will be addressed in the kernel soon. The Image format doesn't say how big it is, so for now I hack in a value of 16MB. I've been told this will change in the future (and one of the reserved fields will be unreserved), so I'll adapt when we can adapt. The other thing not yet handled is automatic detection of a compressed image. We should be able to tell if the address passed is a gzip archive and if so, uncompress a block so we can tell where to decompress to. This however will open up the possibility of decompression overwriting ourselves unless we get loaded into a high enough location to start with. Coming up with a good default there will in turn require knowing how far another future change (randomization of text_offset, ala CONFIG_RANDOMIZE_BASE for x86 I imagine) can push where things may be. It's possible we'll just have to say for safety to do it as two steps, but we'll see. Note that we also need do a fix in arch/arm/cpu/armv8/transition.S wrt cnthctl_el2 in that we shouldn't rely on a valid value to be in there at reset to orr against but instead set the values directly. -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH v0 4/4] vexpress_aemv8a.h: Enable CONFIG_CMD_BOOTI and CONFIG_CMD_UNZIP
Add support for booting Images and for unzipping Image.gz files. Signed-off-by: Tom Rini tr...@ti.com --- include/configs/vexpress_aemv8a.h |2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index ae0ee1b..aa64750 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -116,6 +116,8 @@ /*#define CONFIG_MENU_SHOW*/ #define CONFIG_CMD_CACHE #define CONFIG_CMD_BDI +#define CONFIG_CMD_BOOTI +#define CONFIG_CMD_UNZIP #define CONFIG_CMD_DHCP #define CONFIG_CMD_PXE #define CONFIG_CMD_ENV -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH v0 1/4] arm64: Correct passing of Linux kernel args
The Documentation/arm64/booting.txt document says that pass in x1/x2/x3
as 0 as they are reserved for future use.
Signed-off-by: Tom Rini tr...@ti.com
---
arch/arm/lib/bootm.c |8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 47ee070..0706086 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -249,10 +249,12 @@ static void boot_prep_linux(bootm_headers_t *images)
static void boot_jump_linux(bootm_headers_t *images, int flag)
{
#ifdef CONFIG_ARM64
- void (*kernel_entry)(void *fdt_addr);
+ void (*kernel_entry)(void *fdt_addr, void *res0, void *res1,
+ void *res2);
int fake = (flag BOOTM_STATE_OS_FAKE_GO);
- kernel_entry = (void (*)(void *fdt_addr))images-ep;
+ kernel_entry = (void (*)(void *fdt_addr, void *res0, void *res1,
+ void *res2))images-ep;
debug(## Transferring control to Linux (at address %lx)...\n,
(ulong) kernel_entry);
@@ -261,7 +263,7 @@ static void boot_jump_linux(bootm_headers_t *images, int
flag)
announce_and_cleanup(fake);
if (!fake)
- kernel_entry(images-ft_addr);
+ kernel_entry(images-ft_addr, 0x0, 0x0, 0x0);
#else
unsigned long machid = gd-bd-bi_arch_number;
char *s;
--
1.7.9.5
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[U-Boot] [RFC PATCH v0 2/4] cmd_bootm.c: Add 'booti' for ARM64 Linux kernel Images
The default format for arm64 Linux kernels is the Image format,
described in Documentation/arm64/booting.txt. This, along with an
optional gzip compression on top is all that is generated by default.
The Image format has a magic number within the header for verification,
a text_offset where the Image must be run from and reserved fields.
This does not support automatic detection of a gzip compressed image.
Signed-off-by: Tom Rini tr...@ti.com
---
README |1 +
common/cmd_bootm.c | 139
2 files changed, 140 insertions(+)
diff --git a/README b/README
index 12758dc..e7c8b2e 100644
--- a/README
+++ b/README
@@ -946,6 +946,7 @@ The following options need to be configured:
CONFIG_CMD_BMP * BMP support
CONFIG_CMD_BSP * Board specific commands
CONFIG_CMD_BOOTD bootd
+ CONFIG_CMD_BOOTI* ARM64 Linux kernel Image support
CONFIG_CMD_CACHE* icache, dcache
CONFIG_CMD_CLK * clock command support
CONFIG_CMD_CONSOLEconinfo
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index c243a5b..3b9635c 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -1929,3 +1929,142 @@ U_BOOT_CMD(
boot Linux zImage image from memory, bootz_help_text
);
#endif /* CONFIG_CMD_BOOTZ */
+
+#ifdef CONFIG_CMD_BOOTI
+/* See Documentation/arm64/booting.txt in the Linux kernel */
+struct Image_header {
+ uint32_tcode0; /* Executable code */
+ uint32_tcode1; /* Executable code */
+ uint64_ttext_offset;/* Image load offset */
+ uint64_tres0; /* reserved */
+ uint64_tres1; /* reserved */
+ uint64_tres2; /* reserved */
+ uint64_tres3; /* reserved */
+ uint64_tres4; /* reserved */
+ uint32_tmagic; /* Magic number */
+ uint32_tres5;
+};
+
+#define LINUX_ARM64_IMAGE_MAGIC0x644d5241
+/* XXX: Hack 16MB image size for now */
+#define HACK_ARM64_IMAGE_SIZE (16 20)
+
+static int booti_setup(bootm_headers_t *images)
+{
+ struct Image_header *ih;
+ uint64_t dst;
+
+ ih = (struct Image_header *)map_sysmem(images-ep, 0);
+
+ if (ih-magic != LINUX_ARM64_IMAGE_MAGIC) {
+ puts(Bad Linux ARM64 Image magic!\n);
+ return 1;
+ }
+
+ /*
+* If we are not at the correct run-time location, set the new
+* correct location and then move the image there.
+*/
+ dst = gd-bd-bi_dram[0].start + ih-text_offset;
+ if (images-ep != dst) {
+ void *src;
+
+ debug(Moving Image from 0x%lx to 0x%llx\n, images-ep, dst);
+
+ src = (void *)images-ep;
+ images-ep = dst;
+ memmove((void *)dst, src, HACK_ARM64_IMAGE_SIZE);
+ }
+
+ return 0;
+}
+
+/*
+ * Image booting support
+ */
+static int booti_start(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[], bootm_headers_t *images)
+{
+ int ret;
+
+ ret = do_bootm_states(cmdtp, flag, argc, argv, BOOTM_STATE_START,
+ images, 1);
+
+ /* Setup Linux kernel Image entry point */
+ if (!argc) {
+ images-ep = load_addr;
+ debug(* kernel: default image load address = 0x%08lx\n,
+ load_addr);
+ } else {
+ images-ep = simple_strtoul(argv[0], NULL, 16);
+ debug(* kernel: cmdline image address = 0x%08lx\n,
+ images-ep);
+ }
+
+ ret = booti_setup(images);
+ if (ret != 0)
+ return 1;
+
+ lmb_reserve(images-lmb, images-ep, HACK_ARM64_IMAGE_SIZE);
+
+ /*
+* Handle the BOOTM_STATE_FINDOTHER state ourselves as we do not
+* have a header that provide this informaiton.
+*/
+ if (bootm_find_ramdisk(flag, argc, argv))
+ return 1;
+
+#if defined(CONFIG_OF_LIBFDT)
+ if (bootm_find_fdt(flag, argc, argv))
+ return 1;
+#endif
+
+ return 0;
+}
+
+int do_booti(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ int ret;
+
+ /* Consume 'booti' */
+ argc--; argv++;
+
+ if (booti_start(cmdtp, flag, argc, argv, images))
+ return 1;
+
+ /*
+* We are doing the BOOTM_STATE_LOADOS state ourselves, so must
+* disable interrupts ourselves
+*/
+ bootm_disable_interrupts();
+
+ images.os.os = IH_OS_LINUX;
+ ret = do_bootm_states(cmdtp, flag, argc, argv,
+ BOOTM_STATE_OS_PREP | BOOTM_STATE_OS_FAKE_GO |
+ BOOTM_STATE_OS_GO,
+ images, 1);
+
+
[U-Boot] [RFC PATCH v0 3/4] vexpress_aemv8a.h: Clean up the config
- Drop DEBUG
- Drop defines we can use the default of.
- Drop CONFIG_GICV3 and related defines, we aren't using interrupts and
do not need to configure the interrupt controller.
- Provide a larger malloc pool.
- Correct default locations for kernel / initrd / device tree
Signed-off-by: Tom Rini tr...@ti.com
---
include/configs/vexpress_aemv8a.h | 26 +-
1 file changed, 5 insertions(+), 21 deletions(-)
diff --git a/include/configs/vexpress_aemv8a.h
b/include/configs/vexpress_aemv8a.h
index dff6adc..ae0ee1b 100644
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -8,12 +8,8 @@
#ifndef __VEXPRESS_AEMV8A_H
#define __VEXPRESS_AEMV8A_H
-#define DEBUG
-
#define CONFIG_REMAKE_ELF
-#define CONFIG_GICV3
-
/*#define CONFIG_ARMV8_SWITCH_TO_EL1*/
/*#define CONFIG_SYS_GENERIC_BOARD*/
@@ -94,20 +90,11 @@
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY (0x180) /* 24MHz */
-/* Generic Interrupt Controller Definitions */
-#ifdef CONFIG_GICV3
-#define GICD_BASE (0x2f00)
-#define GICR_BASE (0x2f10)
-#else
-#define GICD_BASE (0x2C001000)
-#define GICC_BASE (0x2C002000)
-#endif
-
#define CONFIG_SYS_MEMTEST_START V2M_BASE
#define CONFIG_SYS_MEMTEST_END (V2M_BASE + 0x8000)
/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 20))
/* SMSC91C111 Ethernet Configuration */
#define CONFIG_SMC91
@@ -121,7 +108,6 @@
#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE115200
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_SYS_SERIAL0 V2M_UART0
#define CONFIG_SYS_SERIAL1 V2M_UART1
@@ -166,10 +152,9 @@
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
- kernel_addr=0x20\0\
- initrd_addr=0xa0\0\
- initrd_size=0x200\0 \
- fdt_addr=0x10\0 \
+ kernel_addr=0x8008\0 \
+ initrd_addr=0x9000\0 \
+ fdt_addr=0x8800\0 \
fdt_high=0xa000\0
#define CONFIG_BOOTARGSconsole=ttyAMA0 root=/dev/ram0
@@ -187,10 +172,9 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2
#define CONFIG_SYS_BARGSIZECONFIG_SYS_CBSIZE
#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING 1
+#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_MAXARGS 64 /* max command args */
#endif /* __VEXPRESS_AEMV8A_H */
--
1.7.9.5
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Re: [U-Boot] [PATCH] mx6sabred: Add PFUZE100 PMIC support
On Mon, May 5, 2014 at 7:29 AM, Stefano Babic sba...@denx.de wrote:
Hi Fabio,
just a minor question:
On 04/05/2014 21:14, Fabio Estevam wrote:
snip
+int misc_init_r(void)
+{
Do we need misc_init ? Why not to use power_init_board() ? It is already
defined as weak.
OT: I confess I am quite losing which functions are already foreseen.
Most of them have the prefix board_, and they are easier to find.
However, power_init_board() does not follow the same rule.
Hi Fabio,
Yes, I think Stefano is correct in that power_init_board() is the
right place to put pmic init. He asked me to do that to my recent
series as well and it worked fine. Note that in that series I do have
a patch that will rename pmic_init() for the PFUZE100 to
power_pfuze100_init() [1]. I'm hoping that will make it in soon.
Tim
[1] - http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/184853/focus=184851
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Re: [U-Boot] [PATCH 05/12] MX6: add boot device support for SPL
+cc Edward Lin
On Mon, May 5, 2014 at 2:14 AM, Stefano Babic sba...@denx.de wrote:
Hi Tim,
On 28/04/2014 22:17, Tim Harvey wrote:
Add a common spl.c file to support boot device functions needed for SPL
such as detecting the boot device.
Signed-off-by: Tim Harvey thar...@gateworks.com
---
v2:
- re-base on top of Masahiro Yamada's consolidation patch:
http://patchwork.ozlabs.org/patch/341817/
- moved spl_boot_device() and get_boot_mode() into own common imx spl.c file
- use mem-mapped structure for smbr reg access
---
arch/arm/imx-common/Makefile | 1 +
arch/arm/imx-common/spl.c| 79
2 files changed, 80 insertions(+)
create mode 100644 arch/arm/imx-common/spl.c
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index b04dfbb..c97ea48 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
endif
ifeq ($(SOC),$(filter $(SOC),mx6 mxs))
obj-y+= misc.o
+obj-$(CONFIG_SPL_BUILD) += spl.o
endif
ifeq ($(SOC),$(filter $(SOC),mx6))
obj-$(CONFIG_CMD_SATA) += sata.o
diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c
new file mode 100644
index 000..5c1667c
--- /dev/null
+++ b/arch/arm/imx-common/spl.c
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2014 Gateworks Corporation
+ * Author: Tim Harvey thar...@gateworks.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
Just a little remark. Do you have written the function on your own or
have you ported it from Freescale's 2009.08 ? Apart names, it looks similar.
If this is the case, you should also add Freescale's Copyright to the
header.
Hi Stefano,
I've never looked at Freescales 2009.08 code myself (I have an
aversion to vendor specific forks of u-boot almost 5 years old heh),
but its likely bits of the function came from there originally but my
inspiration likely came from Edward Lin's patch a while back. A
switch/case seems the logical approach given the bitfield from the
IMX6 reference manual with several don't-cares spread around and I
felt that was much easier to read than trying to convert it all the
shifts and masks.
I can add additional copyright's if anyone feels its necessary - I've
added Edward to the cc to see if he feels its necessary.
Tim
+#include common.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/spl.h
+#include spl.h
+
+#if defined(CONFIG_MX6)
+/* determine boot device from SRC_SBMR1 register (BOOT_CFG[4:1]) */
+u32 spl_boot_device(void)
+{
+ struct src *psrc = (struct src *)SRC_BASE_ADDR;
+ unsigned reg = readl(psrc-sbmr1);
+
+ /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
+ switch ((reg 0x00FF) 4) {
+ /* EIM: See 8.5.1, Table 8-9 */
+ case 0x0:
+ /* BOOT_CFG1[3]: NOR/OneNAND Selection */
+ if ((reg 0x0008) 3)
+ return BOOT_DEVICE_ONENAND;
+ else
+ return BOOT_DEVICE_NOR;
+ break;
+ /* SATA: See 8.5.4, Table 8-20 */
+ case 0x2:
+ return BOOT_DEVICE_SATA;
+ /* Serial ROM: See 8.5.5.1, Table 8-22 */
+ case 0x3:
+ /* BOOT_CFG4[2:0] */
+ switch ((reg 0x0700) 24) {
+ case 0x0 ... 0x4:
+ return BOOT_DEVICE_SPI;
+ case 0x5 ... 0x7:
+ return BOOT_DEVICE_I2C;
+ }
+ break;
+ /* SD/eSD: 8.5.3, Table 8-15 */
+ case 0x4:
+ case 0x5:
+ return BOOT_DEVICE_MMC1;
+ /* MMC/eMMC: 8.5.3 */
+ case 0x6:
+ case 0x7:
+ return BOOT_DEVICE_MMC1;
+ /* NAND Flash: 8.5.2 */
+ case 0x8 ... 0xf:
+ return BOOT_DEVICE_NAND;
+ }
+ return BOOT_DEVICE_NONE;
+}
+#endif
+
+#if defined(CONFIG_SPL_MMC_SUPPORT)
+/* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
+u32 spl_boot_mode(void)
+{
+ switch (spl_boot_device()) {
+ /* for MMC return either RAW or FAT mode */
+ case BOOT_DEVICE_MMC1:
+ case BOOT_DEVICE_MMC2:
+#ifdef CONFIG_SPL_FAT_SUPPORT
+ return MMCSD_MODE_FAT;
+#else
+ return MMCSD_MODE_RAW;
+#endif
+ break;
+ default:
+ puts(spl: ERROR: unsupported device\n);
+ hang();
+ }
+}
+#endif
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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Re: [U-Boot] [PATCH 07/12] MX6: add structs for mmdc and ddr iomux registers
On Mon, May 5, 2014 at 3:34 AM, Stefano Babic sba...@denx.de wrote:
Hi Tim,
On 28/04/2014 22:17, Tim Harvey wrote:
Add memory-mapped structures for MMDC iomux and configuration. Note that
while
the MMDC configuration registers are common between the IMX6DQ
(IMX6DUAL/IMX6QUAD) and IMX6SDL (IMX6SOLO/IMX6DUALLITE) types the iomux
registers differ. This requires two sets of structures.
Add structures to describe DDR3 device information, system information
(memory layout, etc), and MMDC calibration regitsers that can be used to
configure the MMDC dynamically.
We define these structures for SPL builds instead of including mx6q-ddr.h and
mx6dl-ddr.h which use the same namespace and are only useful for imximage cfg
files.
Signed-off-by: Tim Harvey thar...@gateworks.com
---
v2:
- split out from original mmdc configuration patch
- only define for SPL build
- do not include mx6q-ddr.h and mx6dl-ddr.h for SPL build - these use the
same namespace and are only useful for imximage cfg files
---
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 231
1 file changed, 231 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
index 43d377a..d544d2e 100644
--- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
+++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
@@ -6,6 +6,7 @@
#ifndef __ASM_ARCH_MX6_DDR_H__
#define __ASM_ARCH_MX6_DDR_H__
+#ifndef CONFIG_SPL_BUILD
#ifdef CONFIG_MX6Q
#include mx6q-ddr.h
#else
@@ -15,6 +16,236 @@
#error Please select cpu
#endif /* CONFIG_MX6DL or CONFIG_MX6S */
#endif /* CONFIG_MX6Q */
+#else
+
+/* MMDC P0/P1 Registers */
+struct mmdc_p_regs {
+ u32 mdctl;
+ u32 mdpdc;
+ u32 mdotc;
+ u32 mdcfg0;
+ u32 mdcfg1;
+ u32 mdcfg2;
+ u32 mdmisc;
+ u32 mdscr;
+ u32 mdref;
+ u32 res1[2];
+ u32 mdrwd;
+ u32 mdor;
+ u32 res2[3];
+ u32 mdasp;
+ u32 res3[240];
+ u32 mapsr;
+ u32 res4[254];
+ u32 mpzqhwctrl;
+ u32 res5[2];
+ u32 mpwldectrl0;
+ u32 mpwldectrl1;
+ u32 res6;
+ u32 mpodtctrl;
+ u32 mprddqby0dl;
+ u32 mprddqby1dl;
+ u32 mprddqby2dl;
+ u32 mprddqby3dl;
+ u32 res7[4];
+ u32 mpdgctrl0;
+ u32 mpdgctrl1;
+ u32 res8;
+ u32 mprddlctl;
+ u32 res9;
+ u32 mpwrdlctl;
+ u32 res10[25];
+ u32 mpmur0;
+};
+
+/*
+ * MMDC iomux registers (pinctl/padctl) - (different for IMX6DQ vs IMX6SDL)
+ */
+#define MX6DQ_IOM_DDR_BASE 0x020e0500
It is only a question - having the value here let us know where the
registers are located. Anyway, registers' offsets are stored in the
imx-regs.h file of the SOC. Which is the reason to set them here ?
I felt they belonged with the ddr structures themselves. I can move
them but then will someone claim that the ddr structures should also
be moved?
Tim
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Re: [U-Boot] [PATCH] mx6sabred: Add PFUZE100 PMIC support
On Mon, May 5, 2014 at 12:32 PM, Tim Harvey thar...@gateworks.com wrote: Hi Fabio, Yes, I think Stefano is correct in that power_init_board() is the right place to put pmic init. He asked me to do that to my recent series as well and it worked fine. Note that in that series I do have a patch that will rename pmic_init() for the PFUZE100 to power_pfuze100_init() [1]. I'm hoping that will make it in soon. Thanks, Tim. Stefano, It seems that I need to wait for Tim's series to be applied, otherwise there will be a build breakage. Are you taking his series? Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] disk: part_efi: add support for the Alternate GPT
On 14-05-05 03:50 AM, Przemyslaw Marczak wrote:
Hello Steve,
On 04/30/2014 12:31 AM, Steve Rae wrote:
Check the Alternate GPT table if the Primary GPT table is invalid.
Signed-off-by: Steve Rae s...@broadcom.com
---
disk/part_efi.c | 20 ++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 216a292..ad899fa 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -93,7 +93,15 @@ void print_part_efi(block_dev_desc_t * dev_desc)
if (is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA,
gpt_head, gpt_pte) != 1) {
printf(%s: *** ERROR: Invalid GPT ***\n, __func__);
-return;
+if (is_gpt_valid(dev_desc, (dev_desc-lba - 1),
+ gpt_head, gpt_pte) != 1) {
+printf(%s: *** ERROR: Invalid Alternate GPT ***\n,
+ __func__);
+return;
+} else {
+printf(%s: ***Using Alternate GPT ***\n,
+ __func__);
+}
}
debug(%s: gpt-entry at %p\n, __func__, gpt_pte);
@@ -142,7 +150,15 @@ int get_partition_info_efi(block_dev_desc_t *
dev_desc, int part,
if (is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA,
gpt_head, gpt_pte) != 1) {
printf(%s: *** ERROR: Invalid GPT ***\n, __func__);
-return -1;
+if (is_gpt_valid(dev_desc, (dev_desc-lba - 1),
+ gpt_head, gpt_pte) != 1) {
+printf(%s: *** ERROR: Invalid Alternate GPT ***\n,
+ __func__);
+return -1;
+} else {
+printf(%s: ***Using Alternate GPT ***\n,
+ __func__);
+}
}
if (part le32_to_cpu(gpt_head-num_partition_entries) ||
This looks ok, we can still use u-boot filesystem commands after gpt
header block corruption, but the gpt is still...corrupted.
Maybe we need additional gpt subcommand for restore gpt in case when
backup of gpt header is valid?
Actually we have only gpt write command but it needs proper
environment variables. So I think that gpt restore is welcome.
Thank you,
Agree -- maybe I can find time to work on a gpt restore in the near
future
Thanks, Steve
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Re: [U-Boot] [PATCH] mx6sabred: Add PFUZE100 PMIC support
On Mon, May 5, 2014 at 12:56 PM, Fabio Estevam feste...@gmail.com wrote: On Mon, May 5, 2014 at 12:32 PM, Tim Harvey thar...@gateworks.com wrote: Hi Fabio, Yes, I think Stefano is correct in that power_init_board() is the right place to put pmic init. He asked me to do that to my recent series as well and it worked fine. Note that in that series I do have a patch that will rename pmic_init() for the PFUZE100 to power_pfuze100_init() [1]. I'm hoping that will make it in soon. Thanks, Tim. Stefano, It seems that I need to wait for Tim's series to be applied, otherwise there will be a build breakage. In the meantime I converted the current patch to using power_init_board() instead, but this causes problems: = pmic list PMIC devices: name: PFUZE100_PMIC bus: I2C_1 = pmic PFUZE100_PMIC dump PMIC: PFUZE100_PMIC wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=0 wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=1 wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0x8 retry=2 i2c_init_transfer: give up i2c_regs=021a PMIC: Registers dump failed With the previous misc_init_r() approach the 'dump' command worked correctly. Any suggestions? Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH v2 0/13] Enable driver model for GPIOs on Tegra
Now that driver model is part of U-Boot, the task of converting drivers over to it begins. GPIO is one of the easiest to convert, since it already has a sandbox driver and a uclass driver. The Tegra GPIO driver is relatively simple since it has a linear numbering and already uses the generic GPIO framework. Along the way some minor deficiencies were found with driver model - these are corrected in this series. Also it was difficult to exhaustively test the new driver against the old, so a new 'iotrace' framework was created to make this easier for future driver authors. This series has been tested on Trimslice (Tegra 20). I will try it on a beaver also. Changes in v2: - Add a new patch for an I/O tracing feature - Add a new patch to enable iotrace for arm - Add a new patch to enable iotrace for sandbox - Add new patch to support include files for .dts files - Add new patch to bring in Tegra device tree files from linux - Update README to encourage conversion to driver model - Add new patch to use case-insensitive comparison for GPIO banks - Add new patch to add missing header files in lists and root - Add new patch to deal with const-ness of the global_data pointer - Add new patch to allow driver model tests only for sandbox - Add new patch to fix printf() strings in the 'dm' command - Split out a separate patch to enable driver model for tegra - Split out driver model changes into separate patches - Correct bugs found during testing Simon Glass (13): Add an I/O tracing feature arm: Support iotrace feature sandbox: Support iotrace feature Makefile: Support include files for .dts files tegra: dts: Bring in GPIO bindings from linux dm: Update README to encourage conversion to driver model dm: Use case-insensitive comparison for GPIO banks dm: Add missing header files in lists and root dm: Case away the const-ness of the global_data pointer dm: Allow driver model tests only for sandbox dm: Fix printf() strings in the 'dm' command tegra: Enable driver model tegra: Convert tegra GPIO driver to use driver model README | 28 ++ arch/arm/dts/tegra20.dtsi | 15 +- arch/arm/include/asm/arch-tegra/gpio.h | 14 +- arch/arm/include/asm/io.h | 3 + arch/sandbox/include/asm/io.h | 10 + board/nvidia/seaboard/seaboard.c | 2 +- common/Makefile| 2 + common/cmd_iotrace.c | 73 common/iotrace.c | 169 + drivers/core/lists.c | 1 + drivers/core/root.c| 7 +- drivers/core/uclass.c | 2 +- drivers/gpio/gpio-uclass.c | 2 +- drivers/gpio/tegra_gpio.c | 393 - include/configs/sandbox.h | 3 + include/configs/tegra-common.h | 4 + include/dm/device-internal.h | 4 + include/dt-bindings/gpio/gpio.h| 15 + include/dt-bindings/gpio/tegra-gpio.h | 51 +++ include/dt-bindings/interrupt-controller/arm-gic.h | 22 ++ include/dt-bindings/interrupt-controller/irq.h | 19 + include/iotrace.h | 102 ++ scripts/Makefile.lib | 1 + test/dm/Makefile | 2 + test/dm/cmd_dm.c | 19 +- 25 files changed, 848 insertions(+), 115 deletions(-) create mode 100644 common/cmd_iotrace.c create mode 100644 common/iotrace.c create mode 100644 include/dt-bindings/gpio/gpio.h create mode 100644 include/dt-bindings/gpio/tegra-gpio.h create mode 100644 include/dt-bindings/interrupt-controller/arm-gic.h create mode 100644 include/dt-bindings/interrupt-controller/irq.h create mode 100644 include/iotrace.h -- 1.9.1.423.g4596e3a ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH v2 11/13] dm: Fix printf() strings in the 'dm' command
The values here are int, but the map_to_sysmem() call can return a long.
Add a cast to deal with this.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add new patch to fix printf() strings in the 'dm' command
test/dm/cmd_dm.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/test/dm/cmd_dm.c b/test/dm/cmd_dm.c
index 62eccd6..c6b2eb8 100644
--- a/test/dm/cmd_dm.c
+++ b/test/dm/cmd_dm.c
@@ -23,7 +23,7 @@ static int display_succ(struct device *in, char *buf)
char local[16];
struct device *pos, *n, *prev = NULL;
- printf(%s- %s @ %08x, buf, in-name, map_to_sysmem(in));
+ printf(%s- %s @ %08x, buf, in-name, (uint)map_to_sysmem(in));
if (in-flags DM_FLAG_ACTIVATED)
puts( - activated);
puts(\n);
@@ -62,7 +62,7 @@ static int do_dm_dump_all(cmd_tbl_t *cmdtp, int flag, int
argc,
struct device *root;
root = dm_root();
- printf(ROOT %08x\n, map_to_sysmem(root));
+ printf(ROOT %08x\n, (uint)map_to_sysmem(root));
return dm_dump(root);
}
@@ -84,8 +84,8 @@ static int do_dm_dump_uclass(cmd_tbl_t *cmdtp, int flag, int
argc,
for (ret = uclass_first_device(id, dev);
dev;
ret = uclass_next_device(dev)) {
- printf( %s @ %08x:\n, dev-name,
- map_to_sysmem(dev));
+ printf( %s @ %08x:\n, dev-name,
+ (uint)map_to_sysmem(dev));
}
puts(\n);
}
--
1.9.1.423.g4596e3a
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[U-Boot] [RFC PATCH v2 01/13] Add an I/O tracing feature
When debugging drivers it is useful to see what I/O accesses were done and in what order. Even if the individual accesses are of little interest it can be useful to verify that the access pattern is consistent each time an operation is performed. In this case a checksum can be used to characterise the operation of a driver. The checksum can be compared across different runs of the operation to verify that the driver is working properly. In particular, when performing major refactoring of the driver, where the access pattern should not change, the checksum provides assurance that the refactoring work has not broken the driver. Add an I/O tracing feature and associated commands to provide this facility. It works by sneaking into the io.h heder for an architecture and redirecting I/O accesses through its tracing mechanism. For now no commands are provided to examine the trace buffer. The format is fairly simple, so 'md' is a reasonable substitute. Note: The checksum feature is only useful for I/O regions where the contents do not change outside of software control. Where this is not suitable you can fall back to manually comparing the addresses. It might be useful to enhance tracing to only checksum the accesses and not the data read/written. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v2: - Add a new patch for an I/O tracing feature README | 23 +++ common/Makefile | 2 + common/cmd_iotrace.c | 73 ++ common/iotrace.c | 169 +++ include/iotrace.h| 102 +++ 5 files changed, 369 insertions(+) create mode 100644 common/cmd_iotrace.c create mode 100644 common/iotrace.c create mode 100644 include/iotrace.h diff --git a/README b/README index 12758dc..6b41630 100644 --- a/README +++ b/README @@ -987,6 +987,7 @@ The following options need to be configured: CONFIG_CMD_IMLS List all images found in NOR flash CONFIG_CMD_IMLS_NAND* List all images found in NAND flash CONFIG_CMD_IMMAP* IMMR dump support + CONFIG_CMD_IOTRACE * I/O tracing for debugging CONFIG_CMD_IMPORTENV* import an environment CONFIG_CMD_INI * import data from an ini file into the env CONFIG_CMD_IRQ * irqinfo @@ -1158,6 +1159,28 @@ The following options need to be configured: Note that if the GPIO device uses I2C, then the I2C interface must also be configured. See I2C Support, below. +- I/O tracing: + When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O + accesses and can checksum them or write a list of them out + to memory. See the 'iotrace' command for details. This is + useful for testing device drivers since it can confirm that + the driver behaves the same way before and after a code + change. Currently this is supported on sandbox and arm. To + add support for your architecture, add '#include iotrace.h' + to the bottom of arch/arch/include/asm/io.h and test. + + Example output from the 'iotrace stats' command is below. + Note that if the trace buffer is exhausted, the checksum will + still continue to operate. + + iotrace is enabled + Start: 1000(buffer start address) + Size: 0001(buffer size) + Offset: 0120(current buffer offset) + Output: 1120(start + offset) + Count: 0018(number of trace records) + CRC32: 9526fb66(CRC32 of all trace records) + - Timestamp Support: When CONFIG_TIMESTAMP is selected, the timestamp diff --git a/common/Makefile b/common/Makefile index 7c853ae..0dccb90 100644 --- a/common/Makefile +++ b/common/Makefile @@ -96,6 +96,7 @@ obj-$(CONFIG_CMD_FUSE) += cmd_fuse.o obj-$(CONFIG_CMD_GETTIME) += cmd_gettime.o obj-$(CONFIG_CMD_GPIO) += cmd_gpio.o obj-$(CONFIG_CMD_I2C) += cmd_i2c.o +obj-$(CONFIG_CMD_IOTRACE) += cmd_iotrace.o obj-$(CONFIG_CMD_HASH) += cmd_hash.o obj-$(CONFIG_CMD_IDE) += cmd_ide.o obj-$(CONFIG_CMD_IMMAP) += cmd_immap.o @@ -240,6 +241,7 @@ obj-y += image.o obj-$(CONFIG_OF_LIBFDT) += image-fdt.o obj-$(CONFIG_FIT) += image-fit.o obj-$(CONFIG_FIT_SIGNATURE) += image-sig.o +obj-$(CONFIG_IO_TRACE) += iotrace.o obj-y += memsize.o obj-y += stdio.o diff --git a/common/cmd_iotrace.c b/common/cmd_iotrace.c new file mode 100644 index 000..f54276d --- /dev/null +++ b/common/cmd_iotrace.c @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#include common.h +#include command.h +#include iotrace.h + +static
[U-Boot] [RFC PATCH v2 08/13] dm: Add missing header files in lists and root
These files don't compile in some architectures. Fix it by adding the missing headers. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v2: - Add new patch to add missing header files in lists and root drivers/core/lists.c | 1 + drivers/core/root.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/core/lists.c b/drivers/core/lists.c index 4f2c126..6a53362 100644 --- a/drivers/core/lists.c +++ b/drivers/core/lists.c @@ -14,6 +14,7 @@ #include dm/platdata.h #include dm/uclass.h #include dm/util.h +#include fdtdec.h #include linux/compiler.h struct driver *lists_driver_lookup_name(const char *name) diff --git a/drivers/core/root.c b/drivers/core/root.c index 407bc0d..88d2f45 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -10,6 +10,7 @@ #include common.h #include errno.h #include malloc.h +#include libfdt.h #include dm/device.h #include dm/device-internal.h #include dm/lists.h -- 1.9.1.423.g4596e3a ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH v2 10/13] dm: Allow driver model tests only for sandbox
The GPIO tests require the sandbox GPIO driver, so cannot be run on other
platforms. Similarly for the 'dm test' command.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add new patch to allow driver model tests only for sandbox
test/dm/Makefile | 2 ++
test/dm/cmd_dm.c | 11 +--
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 4e9afe6..c0f2135 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -15,4 +15,6 @@ obj-$(CONFIG_DM_TEST) += ut.o
# subsystem you must add sandbox tests here.
obj-$(CONFIG_DM_TEST) += core.o
obj-$(CONFIG_DM_TEST) += ut.o
+ifneq ($(CONFIG_SANDBOX),)
obj-$(CONFIG_DM_GPIO) += gpio.o
+endif
diff --git a/test/dm/cmd_dm.c b/test/dm/cmd_dm.c
index a03fe20..62eccd6 100644
--- a/test/dm/cmd_dm.c
+++ b/test/dm/cmd_dm.c
@@ -93,16 +93,23 @@ static int do_dm_dump_uclass(cmd_tbl_t *cmdtp, int flag,
int argc,
return 0;
}
+#ifdef CONFIG_DM_TEST
static int do_dm_test(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
{
return dm_test_main();
}
+#define TEST_HELP \ndm test Run tests
+#else
+#define TEST_HELP
+#endif
static cmd_tbl_t test_commands[] = {
U_BOOT_CMD_MKENT(tree, 0, 1, do_dm_dump_all, , ),
U_BOOT_CMD_MKENT(uclass, 1, 1, do_dm_dump_uclass, , ),
+#ifdef CONFIG_DM_TEST
U_BOOT_CMD_MKENT(test, 1, 1, do_dm_test, , ),
+#endif
};
static int do_dm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -128,6 +135,6 @@ U_BOOT_CMD(
dm, 2, 1, do_dm,
Driver model low level access,
tree Dump driver model tree\n
- dm uclassDump list of instances for each uclass\n
- dm test Run tests
+ dm uclassDump list of instances for each uclass
+ TEST_HELP
);
--
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[U-Boot] [RFC PATCH v2 03/13] sandbox: Support iotrace feature
Support the iotrace feature for sandbox, and enable it, using some dummy I/O access methods. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v2: - Add a new patch to enable iotrace for sandbox arch/sandbox/include/asm/io.h | 10 ++ include/configs/sandbox.h | 3 +++ 2 files changed, 13 insertions(+) diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h index 7956041..895fcb8 100644 --- a/arch/sandbox/include/asm/io.h +++ b/arch/sandbox/include/asm/io.h @@ -40,4 +40,14 @@ static inline void unmap_sysmem(const void *vaddr) /* Map from a pointer to our RAM buffer */ phys_addr_t map_to_sysmem(const void *ptr); +/* Define nops for sandbox I/O access */ +#define readb(addr) 0 +#define readw(addr) 0 +#define readl(addr) 0 +#define writeb(v, addr) +#define writew(v, addr) +#define writel(v, addr) + +#include iotrace.h + #endif diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index fa62cb6..8ca2a55 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -16,6 +16,9 @@ #endif +#define CONFIG_IO_TRACE +#define CONFIG_CMD_IO_TRACE + #define CONFIG_SYS_TIMER_RATE 100 #define CONFIG_BOOTSTAGE -- 1.9.1.423.g4596e3a ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH v2 06/13] dm: Update README to encourage conversion to driver model
Add a note to encourage people to convert drivers to use driver model. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v2: - Update README to encourage conversion to driver model README | 5 + 1 file changed, 5 insertions(+) diff --git a/README b/README index 6b41630..5be8e8c 100644 --- a/README +++ b/README @@ -5246,6 +5246,11 @@ Information structure as we define in include/asm-arch/u-boot.h, and make sure that your definition of IMAP_ADDR uses the same value as your U-Boot configuration in CONFIG_SYS_IMMR. +Note that U-Boot now has a driver model, a unified model for drivers. +If you are adding a new driver, plumb it into driver model. If there +is no uclass available, you are encouraged to create one. See +doc/driver-model. + Configuring the Linux kernel: - -- 1.9.1.423.g4596e3a ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH v2 02/13] arm: Support iotrace feature
Support the iotrace feature for ARM, when enabled. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v2: - Add a new patch to enable iotrace for arm arch/arm/include/asm/io.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 6a1f05a..9f35fd6 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -437,4 +437,7 @@ out: #endif /* __mem_isa */ #endif /* __KERNEL__ */ + +#include iotrace.h + #endif /* __ASM_ARM_IO_H */ -- 1.9.1.423.g4596e3a ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH v2 12/13] tegra: Enable driver model
Enable driver model for Tegra boards. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v2: - Split out a separate patch to enable driver model for tegra include/configs/tegra-common.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index ae786cf..3943249 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -19,6 +19,8 @@ #include asm/arch/tegra.h/* get chip and board defs */ +#define CONFIG_DM + #define CONFIG_SYS_TIMER_RATE 100 #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE -- 1.9.1.423.g4596e3a ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH v2 05/13] tegra: dts: Bring in GPIO bindings from linux
These files are taken from Linux 3.14.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add new patch to bring in Tegra device tree files from linux
arch/arm/dts/tegra20.dtsi | 15 ++-
include/dt-bindings/gpio/gpio.h| 15 +++
include/dt-bindings/gpio/tegra-gpio.h | 51 ++
include/dt-bindings/interrupt-controller/arm-gic.h | 22 ++
include/dt-bindings/interrupt-controller/irq.h | 19
5 files changed, 120 insertions(+), 2 deletions(-)
create mode 100644 include/dt-bindings/gpio/gpio.h
create mode 100644 include/dt-bindings/gpio/tegra-gpio.h
create mode 100644 include/dt-bindings/interrupt-controller/arm-gic.h
create mode 100644 include/dt-bindings/interrupt-controller/irq.h
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index 3805750..a524f6e 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -1,3 +1,6 @@
+#include dt-bindings/gpio/tegra-gpio.h
+#include dt-bindings/interrupt-controller/arm-gic.h
+
#include skeleton.dtsi
/ {
@@ -139,10 +142,18 @@
gpio: gpio@6000d000 {
compatible = nvidia,tegra20-gpio;
- reg = 0x6000d000 0x1000 ;
- interrupts = 64 65 66 67 87 119 121 ;
+ reg = 0x6000d000 0x1000;
+ interrupts = GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH;
#gpio-cells = 2;
gpio-controller;
+ #interrupt-cells = 2;
+ interrupt-controller;
};
pinmux: pinmux@7000 {
diff --git a/include/dt-bindings/gpio/gpio.h b/include/dt-bindings/gpio/gpio.h
new file mode 100644
index 000..e6b1e0a
--- /dev/null
+++ b/include/dt-bindings/gpio/gpio.h
@@ -0,0 +1,15 @@
+/*
+ * This header provides constants for most GPIO bindings.
+ *
+ * Most GPIO bindings include a flags cell as part of the GPIO specifier.
+ * In most cases, the format of the flags cell uses the standard values
+ * defined in this header.
+ */
+
+#ifndef _DT_BINDINGS_GPIO_GPIO_H
+#define _DT_BINDINGS_GPIO_GPIO_H
+
+#define GPIO_ACTIVE_HIGH 0
+#define GPIO_ACTIVE_LOW 1
+
+#endif
diff --git a/include/dt-bindings/gpio/tegra-gpio.h
b/include/dt-bindings/gpio/tegra-gpio.h
new file mode 100644
index 000..197dc28
--- /dev/null
+++ b/include/dt-bindings/gpio/tegra-gpio.h
@@ -0,0 +1,51 @@
+/*
+ * This header provides constants for binding nvidia,tegra*-gpio.
+ *
+ * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
+ * provide names for this.
+ *
+ * The second cell contains standard flag values specified in gpio.h.
+ */
+
+#ifndef _DT_BINDINGS_GPIO_TEGRA_GPIO_H
+#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H
+
+#include dt-bindings/gpio/gpio.h
+
+#define TEGRA_GPIO_BANK_ID_A 0
+#define TEGRA_GPIO_BANK_ID_B 1
+#define TEGRA_GPIO_BANK_ID_C 2
+#define TEGRA_GPIO_BANK_ID_D 3
+#define TEGRA_GPIO_BANK_ID_E 4
+#define TEGRA_GPIO_BANK_ID_F 5
+#define TEGRA_GPIO_BANK_ID_G 6
+#define TEGRA_GPIO_BANK_ID_H 7
+#define TEGRA_GPIO_BANK_ID_I 8
+#define TEGRA_GPIO_BANK_ID_J 9
+#define TEGRA_GPIO_BANK_ID_K 10
+#define TEGRA_GPIO_BANK_ID_L 11
+#define TEGRA_GPIO_BANK_ID_M 12
+#define TEGRA_GPIO_BANK_ID_N 13
+#define TEGRA_GPIO_BANK_ID_O 14
+#define TEGRA_GPIO_BANK_ID_P 15
+#define TEGRA_GPIO_BANK_ID_Q 16
+#define TEGRA_GPIO_BANK_ID_R 17
+#define TEGRA_GPIO_BANK_ID_S 18
+#define TEGRA_GPIO_BANK_ID_T 19
+#define TEGRA_GPIO_BANK_ID_U 20
+#define TEGRA_GPIO_BANK_ID_V 21
+#define TEGRA_GPIO_BANK_ID_W 22
+#define TEGRA_GPIO_BANK_ID_X 23
+#define TEGRA_GPIO_BANK_ID_Y 24
+#define TEGRA_GPIO_BANK_ID_Z 25
+#define TEGRA_GPIO_BANK_ID_AA 26
+#define TEGRA_GPIO_BANK_ID_BB 27
+#define TEGRA_GPIO_BANK_ID_CC 28
+#define TEGRA_GPIO_BANK_ID_DD 29
+#define TEGRA_GPIO_BANK_ID_EE 30
+#define TEGRA_GPIO_BANK_ID_FF 31
+
+#define TEGRA_GPIO(bank, offset) \
+ ((TEGRA_GPIO_BANK_ID_##bank * 8) + offset)
+
+#endif
diff --git a/include/dt-bindings/interrupt-controller/arm-gic.h
b/include/dt-bindings/interrupt-controller/arm-gic.h
new file mode 100644
index 000..1ea1b70
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/arm-gic.h
@@ -0,0 +1,22 @@
+/*
+ * This header provides constants for the ARM GIC.
+ */
+
+#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
+#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
+
+#include dt-bindings/interrupt-controller/irq.h
+
+/* interrupt specific cell 0 */
+
+#define GIC_SPI 0
+#define GIC_PPI 1
+
+/*
+ * Interrupt specifier cell 2.
+ * The flaggs in irq.h are valid, plus those below.
+ */
+#define GIC_CPU_MASK_RAW(x) ((x) 8)
+#define
[U-Boot] [RFC PATCH v2 04/13] Makefile: Support include files for .dts files
Linux supports this, and if we are to have compatible device tree files, U-Boot should also. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v2: - Add new patch to support include files for .dts files scripts/Makefile.lib | 1 + 1 file changed, 1 insertion(+) diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index a04439d..10358ba 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -153,6 +153,7 @@ ld_flags = $(LDFLAGS) $(ldflags-y) # Modified for U-Boot dtc_cpp_flags = -Wp,-MD,$(depfile).pre.tmp -nostdinc\ -I$(srctree)/arch/$(ARCH)/dts \ +-I$(srctree)/include\ -undef -D__DTS__ # Finds the multi-part object the current object will be linked into -- 1.9.1.423.g4596e3a ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH v2 13/13] tegra: Convert tegra GPIO driver to use driver model
This is an implementation of GPIOs for Tegra that uses driver model. It has
been tested on trimslice and also using the new iotrace feature.
The implementation uses a top-level GPIO device (which has no actual GPIOS).
Under this all the banks are created as separate GPIO devices.
The GPIOs are named as per the Tegra datasheet/header files: A0..A7, B0..B7,
..., Z0..Z7, AA0..AA7, etc.
Since driver model is not yet available before relocation, or in SPL, a
special function is provided for seaboard's SPL code.
This series is marked RFC since the Tegra driver may need further discussion.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Split out driver model changes into separate patches
- Correct bugs found during testing
arch/arm/include/asm/arch-tegra/gpio.h | 14 +-
board/nvidia/seaboard/seaboard.c | 2 +-
drivers/gpio/tegra_gpio.c | 393 +
include/configs/tegra-common.h | 2 +
4 files changed, 309 insertions(+), 102 deletions(-)
diff --git a/arch/arm/include/asm/arch-tegra/gpio.h
b/arch/arm/include/asm/arch-tegra/gpio.h
index d97190d..80e4a73 100644
--- a/arch/arm/include/asm/arch-tegra/gpio.h
+++ b/arch/arm/include/asm/arch-tegra/gpio.h
@@ -6,6 +6,8 @@
#ifndef _TEGRA_GPIO_H_
#define _TEGRA_GPIO_H_
+#define TEGRA_GPIOS_PER_PORT 8
+#define TEGRA_PORTS_PER_BANK 4
#define MAX_NUM_GPIOS (TEGRA_GPIO_PORTS * TEGRA_GPIO_BANKS * 8)
#define GPIO_NAME_SIZE 20 /* gpio_request max label len */
@@ -14,11 +16,13 @@
#define GPIO_FULLPORT(x) ((x) 3)
#define GPIO_BIT(x)((x) 0x7)
-/*
- * Tegra-specific GPIO API
+/**
+ * tegra_spl_gpio_direction_output() - set the output value of a GPIO
+ *
+ * This function is only used from SPL on seaboard, which needs to enable a
+ * GPIO to get the UART running. It could be done in U-Boot rather than SPL,
+ * but for now, this gets it working
*/
+int tegra_spl_gpio_direction_output(int gpio, int value);
-void gpio_info(void);
-
-#define gpio_status() gpio_info()
#endif /* TEGRA_GPIO_H_ */
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
index ef4e481..e27efcd 100644
--- a/board/nvidia/seaboard/seaboard.c
+++ b/board/nvidia/seaboard/seaboard.c
@@ -22,7 +22,7 @@ void gpio_early_init_uart(void)
#ifndef CONFIG_SPL_BUILD
gpio_request(GPIO_PI3, NULL);
#endif
- gpio_direction_output(GPIO_PI3, 0);
+ tegra_spl_gpio_direction_output(GPIO_PI3, 0);
}
#endif
diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c
index 82b30d5..4cca266 100644
--- a/drivers/gpio/tegra_gpio.c
+++ b/drivers/gpio/tegra_gpio.c
@@ -12,10 +12,17 @@
*/
#include common.h
+#include dm.h
+#include malloc.h
+#include errno.h
+#include fdtdec.h
#include asm/io.h
#include asm/bitops.h
#include asm/arch/tegra.h
#include asm/gpio.h
+#include dm/device-internal.h
+
+DECLARE_GLOBAL_DATA_PTR;
enum {
TEGRA_CMD_INFO,
@@ -24,24 +31,30 @@ enum {
TEGRA_CMD_INPUT,
};
-static struct gpio_names {
- char name[GPIO_NAME_SIZE];
-} gpio_names[MAX_NUM_GPIOS];
+struct tegra_gpio_platdata {
+ struct gpio_ctlr_bank *bank;
+ const char *port_name; /* Name of port, e.g. B */
+ int base_port; /* Port number for this port (0, 1,.., n-1) */
+};
-static char *get_name(int i)
-{
- return *gpio_names[i].name ? gpio_names[i].name : UNKNOWN;
-}
+/* Information about each port at run-time */
+struct tegra_port_info {
+ char label[TEGRA_GPIOS_PER_PORT][GPIO_NAME_SIZE];
+ struct gpio_ctlr_bank *bank;
+ int base_port; /* Port number for this port (0, 1,.., n-1) */
+};
+
+#define GPIO_NUM(state, offset) \
+ (((state)-base_port * TEGRA_GPIOS_PER_PORT) + (offset))
/* Return config of pin 'gpio' as GPIO (1) or SFPIO (0) */
-static int get_config(unsigned gpio)
+static int get_config(struct tegra_port_info *state, int offset)
{
- struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = ctlr-gpio_bank[GPIO_BANK(gpio)];
+ int gpio = GPIO_NUM(state, offset);
u32 u;
int type;
- u = readl(bank-gpio_config[GPIO_PORT(gpio)]);
+ u = readl(state-bank-gpio_config[GPIO_PORT(gpio)]);
type = (u GPIO_BIT(gpio)) 1;
debug(get_config: port = %d, bit = %d is %s\n,
@@ -51,32 +64,32 @@ static int get_config(unsigned gpio)
}
/* Config pin 'gpio' as GPIO or SFPIO, based on 'type' */
-static void set_config(unsigned gpio, int type)
+static void set_config(struct tegra_port_info *state, int offset, int type)
{
- struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
- struct gpio_ctlr_bank *bank = ctlr-gpio_bank[GPIO_BANK(gpio)];
+ int gpio = GPIO_NUM(state, offset);
u32 u;
debug(set_config: port = %d, bit = %d, %s\n,
- GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? GPIO : SFPIO);
+
[U-Boot] [RFC PATCH v2 07/13] dm: Use case-insensitive comparison for GPIO banks
We want 'N0' and 'n0' to mean the same thing, so ensure that case is not
considered when naming GPIO banks.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add new patch to use case-insensitive comparison for GPIO banks
drivers/gpio/gpio-uclass.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c
index 56bfd11..ec605dc 100644
--- a/drivers/gpio/gpio-uclass.c
+++ b/drivers/gpio/gpio-uclass.c
@@ -58,7 +58,7 @@ int gpio_lookup_name(const char *name, struct device **devp,
uc_priv = dev-uclass_priv;
len = uc_priv-bank_name ? strlen(uc_priv-bank_name) : 0;
- if (!strncmp(name, uc_priv-bank_name, len)) {
+ if (!strncasecmp(name, uc_priv-bank_name, len)) {
if (strict_strtoul(name + len, 10, offset))
continue;
if (devp)
--
1.9.1.423.g4596e3a
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[U-Boot] [RFC PATCH v2 09/13] dm: Case away the const-ness of the global_data pointer
In a very few cases we need to adjust the driver model root device, such as
when setting it up at initialisation. Add a macro to make this easier.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add new patch to deal with const-ness of the global_data pointer
drivers/core/root.c | 6 +++---
drivers/core/uclass.c| 2 +-
include/dm/device-internal.h | 4
3 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/core/root.c b/drivers/core/root.c
index 88d2f45..4427b81 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -43,9 +43,9 @@ int dm_init(void)
dm_warn(Virtual root driver already exists!\n);
return -EINVAL;
}
- INIT_LIST_HEAD(gd-uclass_root);
+ INIT_LIST_HEAD(DM_UCLASS_ROOT());
- ret = device_bind_by_name(NULL, root_info, gd-dm_root);
+ ret = device_bind_by_name(NULL, root_info, DM_ROOT());
if (ret)
return ret;
@@ -56,7 +56,7 @@ int dm_scan_platdata(void)
{
int ret;
- ret = lists_bind_drivers(gd-dm_root);
+ ret = lists_bind_drivers(DM_ROOT());
if (ret == -ENOENT) {
dm_warn(Some drivers were not found\n);
ret = 0;
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 4df5a8b..afb5fdc 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -75,7 +75,7 @@ static int uclass_add(enum uclass_id id, struct uclass **ucp)
uc-uc_drv = uc_drv;
INIT_LIST_HEAD(uc-sibling_node);
INIT_LIST_HEAD(uc-dev_head);
- list_add(uc-sibling_node, gd-uclass_root);
+ list_add(uc-sibling_node, DM_UCLASS_ROOT());
if (uc_drv-init) {
ret = uc_drv-init(uc);
diff --git a/include/dm/device-internal.h b/include/dm/device-internal.h
index c026e8e..e95b7a9 100644
--- a/include/dm/device-internal.h
+++ b/include/dm/device-internal.h
@@ -84,4 +84,8 @@ int device_remove(struct device *dev);
*/
int device_unbind(struct device *dev);
+/* Cast away any volatile pointer */
+#define DM_ROOT() (((gd_t *)gd)-dm_root)
+#define DM_UCLASS_ROOT() (((gd_t *)gd)-uclass_root)
+
#endif
--
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Re: [U-Boot] [PATCH] WIP: tegra: Use driver model for GPIO driver
On 05/02/2014 10:25 PM, Simon Glass wrote: Hi Stephen, On 2 May 2014 16:43, Stephen Warren swar...@wwwdotorg.org wrote: On 05/02/2014 02:51 PM, Simon Glass wrote: This is an implementation of GPIOs for Tegra that uses driver model. It is written for comment and need work and testing before it is ready to use. Specific points for discussion: 1. I can't find much in the way of GPIO device tree bindings, so ended up just creating the GPIO devices The binding is already defined in the Linux kernel at: Documentation/devicetree/bindings/gpio/gpio.txt Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt An example is in: arch/arm/boot/dts/tegra20.dtsi Yes but all the parameters are hard-coded in the driver, not in the device tree. I ended up doing the same thing, as you probably noticed. To be honest, since I saw all the DT binding changes and mentions of banks, I didn't look at the driver, since I assumed it'd have to be re-written to solve those issues first. If the driver doesn't actually use any of that stuff, then perhaps I should take another look at the patch. 3. Driver model understand the concept of a bank of GPIOs, but this is equivalent to 'port' in Tegra. So it is somewhat confusing. Need to think about this. There's no need at all to expose the banks separately. This is purely an implementation detail of the internal register layout of the HW, and not something that anyone outside the GPIO driver need concern itself with. Tegra simply has N GPIOs numbered 0..n-1. Admittedly the GPIOs also have textual names derived from the banked register layout, but this has no practical consequence, and need not be represented anywhere. I would imagine this is true of any GPIO controller. Why does the driver model know/care about GPIO banks? For naming - A, B, C, etc. Each of these is considered a 'bank'. At present each is a separate GPIO device, also. This will allow us to support I2C extenders and other ways of adding GPIOs. I don't think individual GPIO controllers have to be broken down into banks in order for U-Boot to support multiple GPIO controllers. U-Boot should know that multiple controller instances exist. U-Boot shouldn't dictate the internal structure of each controller; if it wants to expose 1000 GPIOs in a flat naming space, that should be OK. Or, when you mentioned bank, did you mean HW module or GPIO expander chip i.e. what the Linux kernel calls a struct gpio_chip, rather than a bank being a sub-division of a whole HW module or GPIO expander chip? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 7/8] ums: move all variable declarations to the start of the block
On 05/05/2014 03:16 AM, Przemyslaw Marczak wrote: ... On Wednesday, April 30, 2014 at 11:13:21 PM, Stephen Warren wrote: It's easier to assign values to the variables inside an if statement body if the assignment and declaration are separate. ... FWIW, I have applied that series locally and rebased my patches on top of it. If you want to see the latest version, feel free to look at: git://github.com/swarren/u-boot.git tegra_dev ... I tested your tegra_dev branch on trats2 and also on goni(after apply the rest of Mateusz Zalega patches) and it works fine. So for this patch set: Acked-by: Przemyslaw Marczak p.marc...@samsung.com Good new:-) Thanks for the testing. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] WIP: tegra: Use driver model for GPIO driver
Hi Stephen, On 5 May 2014 10:10, Stephen Warren swar...@wwwdotorg.org wrote: On 05/02/2014 10:25 PM, Simon Glass wrote: Hi Stephen, On 2 May 2014 16:43, Stephen Warren swar...@wwwdotorg.org wrote: On 05/02/2014 02:51 PM, Simon Glass wrote: This is an implementation of GPIOs for Tegra that uses driver model. It is written for comment and need work and testing before it is ready to use. Specific points for discussion: 1. I can't find much in the way of GPIO device tree bindings, so ended up just creating the GPIO devices The binding is already defined in the Linux kernel at: Documentation/devicetree/bindings/gpio/gpio.txt Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt An example is in: arch/arm/boot/dts/tegra20.dtsi Yes but all the parameters are hard-coded in the driver, not in the device tree. I ended up doing the same thing, as you probably noticed. To be honest, since I saw all the DT binding changes and mentions of banks, I didn't look at the driver, since I assumed it'd have to be re-written to solve those issues first. If the driver doesn't actually use any of that stuff, then perhaps I should take another look at the patch. Well...you could :-) I sent an updated and cleaned-up version that has actually been tested. 3. Driver model understand the concept of a bank of GPIOs, but this is equivalent to 'port' in Tegra. So it is somewhat confusing. Need to think about this. There's no need at all to expose the banks separately. This is purely an implementation detail of the internal register layout of the HW, and not something that anyone outside the GPIO driver need concern itself with. Tegra simply has N GPIOs numbered 0..n-1. Admittedly the GPIOs also have textual names derived from the banked register layout, but this has no practical consequence, and need not be represented anywhere. I would imagine this is true of any GPIO controller. Why does the driver model know/care about GPIO banks? For naming - A, B, C, etc. Each of these is considered a 'bank'. At present each is a separate GPIO device, also. This will allow us to support I2C extenders and other ways of adding GPIOs. I don't think individual GPIO controllers have to be broken down into banks in order for U-Boot to support multiple GPIO controllers. U-Boot should know that multiple controller instances exist. U-Boot shouldn't dictate the internal structure of each controller; if it wants to expose 1000 GPIOs in a flat naming space, that should be OK. Or, when you mentioned bank, did you mean HW module or GPIO expander chip i.e. what the Linux kernel calls a struct gpio_chip, rather than a bank being a sub-division of a whole HW module or GPIO expander chip? I suppose I mean a conceptual 'bank', such as is used to name GPIOs in the datasheet. The current GPIO uclass implementation uses one device per bank, which has the virtue of simplicity, and it's easy to use 'dm tree' to see the available GPIO banks. But it remains to be seen whether this fits best with actual SOCs. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2 2/8] ums: remove UMS_{NUM, START}_SECTORS + UMS_START_SECTOR
From: Stephen Warren swar...@nvidia.com
These values aren't set anywhere at present, and hence have no effect.
The concept of a single global offset/number of sectors to expose through
USB Mass Storage doesn't even make sense in the face of multiple storage
devices. Remove these defines to simplify the code.
Cc: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Stephen Warren swar...@nvidia.com
Acked-by: Przemyslaw Marczak p.marc...@samsung.com
---
board/samsung/common/ums.c | 14 ++
include/usb_mass_storage.h | 8
2 files changed, 2 insertions(+), 20 deletions(-)
diff --git a/board/samsung/common/ums.c b/board/samsung/common/ums.c
index ffe63685835c..1f7dda43629b 100644
--- a/board/samsung/common/ums.c
+++ b/board/samsung/common/ums.c
@@ -39,7 +39,6 @@ static struct ums ums_dev = {
static struct ums *ums_disk_init(struct mmc *mmc)
{
uint64_t mmc_end_sector = mmc-capacity / SECTOR_SIZE;
- uint64_t ums_end_sector = UMS_NUM_SECTORS + UMS_START_SECTOR;
if (!mmc_end_sector) {
error(MMC capacity is not valid);
@@ -47,17 +46,8 @@ static struct ums *ums_disk_init(struct mmc *mmc)
}
ums_dev.block_dev = mmc-block_dev;
-
- if (ums_end_sector = mmc_end_sector) {
- ums_dev.start_sector = UMS_START_SECTOR;
- if (UMS_NUM_SECTORS)
- ums_dev.num_sectors = UMS_NUM_SECTORS;
- else
- ums_dev.num_sectors = mmc_end_sector - UMS_START_SECTOR;
- } else {
- ums_dev.num_sectors = mmc_end_sector;
- puts(UMS: defined bad disk parameters. Using default.\n);
- }
+ ums_dev.start_sector = 0;
+ ums_dev.num_sectors = mmc_end_sector;
printf(UMS: disk start sector: %#x, count: %#x\n,
ums_dev.start_sector, ums_dev.num_sectors);
diff --git a/include/usb_mass_storage.h b/include/usb_mass_storage.h
index e3eb1ebb2e47..2b959ec057e4 100644
--- a/include/usb_mass_storage.h
+++ b/include/usb_mass_storage.h
@@ -12,14 +12,6 @@
#include part.h
#include linux/usb/composite.h
-#ifndef UMS_START_SECTOR
-#define UMS_START_SECTOR 0
-#endif
-
-#ifndef UMS_NUM_SECTORS
-#define UMS_NUM_SECTORS0
-#endif
-
/* Wait at maximum 60 seconds for cable connection */
#define UMS_CABLE_READY_TIMEOUT60
--
1.8.1.5
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[U-Boot] [PATCH V2 5/8] ums: move IO support code to common location
From: Stephen Warren swar...@nvidia.com
There's nothing Samsung-/board-specfic about the implementation of
ums_init(). Move the code into cmd_usb_mass_storage.c, so that it can
be shared by any user of that command.
Cc: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Stephen Warren swar...@nvidia.com
Acked-by: Przemyslaw Marczak p.marc...@samsung.com
---
board/samsung/common/Makefile | 1 -
board/samsung/common/ums.c| 55 ---
common/cmd_usb_mass_storage.c | 46
include/usb_mass_storage.h| 1 -
4 files changed, 46 insertions(+), 57 deletions(-)
delete mode 100644 board/samsung/common/ums.c
diff --git a/board/samsung/common/Makefile b/board/samsung/common/Makefile
index 7d2bb8c4a2f3..41d0cc381494 100644
--- a/board/samsung/common/Makefile
+++ b/board/samsung/common/Makefile
@@ -7,7 +7,6 @@
obj-$(CONFIG_SOFT_I2C_MULTI_BUS) += multi_i2c.o
obj-$(CONFIG_THOR_FUNCTION) += thor.o
-obj-$(CONFIG_CMD_USB_MASS_STORAGE) += ums.o
obj-$(CONFIG_MISC_COMMON) += misc.o
ifndef CONFIG_SPL_BUILD
diff --git a/board/samsung/common/ums.c b/board/samsung/common/ums.c
deleted file mode 100644
index b35670d9966a..
--- a/board/samsung/common/ums.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * Copyright (C) 2013 Samsung Electronics
- * Lukasz Majewski l.majew...@samsung.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include usb_mass_storage.h
-#include mmc.h
-#include part.h
-
-static int ums_read_sector(struct ums *ums_dev,
- ulong start, lbaint_t blkcnt, void *buf)
-{
- block_dev_desc_t *block_dev = ums_dev-block_dev;
- lbaint_t blkstart = start + ums_dev-start_sector;
- int dev_num = block_dev-dev;
-
- return block_dev-block_read(dev_num, blkstart, blkcnt, buf);
-}
-
-static int ums_write_sector(struct ums *ums_dev,
- ulong start, lbaint_t blkcnt, const void *buf)
-{
- block_dev_desc_t *block_dev = ums_dev-block_dev;
- lbaint_t blkstart = start + ums_dev-start_sector;
- int dev_num = block_dev-dev;
-
- return block_dev-block_write(dev_num, blkstart, blkcnt, buf);
-}
-
-static struct ums ums_dev = {
- .read_sector = ums_read_sector,
- .write_sector = ums_write_sector,
- .name = UMS disk,
-};
-
-struct ums *ums_init(unsigned int dev_num)
-{
- struct mmc *mmc = NULL;
-
- mmc = find_mmc_device(dev_num);
- if (!mmc || mmc_init(mmc))
- return NULL;
-
- ums_dev.block_dev = mmc-block_dev;
- ums_dev.start_sector = 0;
- ums_dev.num_sectors = mmc-capacity / SECTOR_SIZE;
-
- printf(UMS: disk start sector: %#x, count: %#x\n,
- ums_dev.start_sector, ums_dev.num_sectors);
-
- return ums_dev;
-}
diff --git a/common/cmd_usb_mass_storage.c b/common/cmd_usb_mass_storage.c
index 31b7eb0b57ef..9888ed4f1756 100644
--- a/common/cmd_usb_mass_storage.c
+++ b/common/cmd_usb_mass_storage.c
@@ -9,9 +9,55 @@
#include common.h
#include command.h
#include g_dnl.h
+#include mmc.h
+#include part.h
#include usb.h
#include usb_mass_storage.h
+static int ums_read_sector(struct ums *ums_dev,
+ ulong start, lbaint_t blkcnt, void *buf)
+{
+ block_dev_desc_t *block_dev = ums_dev-block_dev;
+ lbaint_t blkstart = start + ums_dev-start_sector;
+ int dev_num = block_dev-dev;
+
+ return block_dev-block_read(dev_num, blkstart, blkcnt, buf);
+}
+
+static int ums_write_sector(struct ums *ums_dev,
+ ulong start, lbaint_t blkcnt, const void *buf)
+{
+ block_dev_desc_t *block_dev = ums_dev-block_dev;
+ lbaint_t blkstart = start + ums_dev-start_sector;
+ int dev_num = block_dev-dev;
+
+ return block_dev-block_write(dev_num, blkstart, blkcnt, buf);
+}
+
+static struct ums ums_dev = {
+ .read_sector = ums_read_sector,
+ .write_sector = ums_write_sector,
+ .name = UMS disk,
+};
+
+struct ums *ums_init(unsigned int dev_num)
+{
+ struct mmc *mmc = NULL;
+
+ mmc = find_mmc_device(dev_num);
+ if (!mmc || mmc_init(mmc))
+ return NULL;
+
+ ums_dev.block_dev = mmc-block_dev;
+ ums_dev.start_sector = 0;
+ ums_dev.num_sectors = mmc-capacity / SECTOR_SIZE;
+
+ printf(UMS: disk start sector: %#x, count: %#x\n,
+ ums_dev.start_sector, ums_dev.num_sectors);
+
+ return ums_dev;
+}
+
int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
{
diff --git a/include/usb_mass_storage.h b/include/usb_mass_storage.h
index 2b959ec057e4..69b80cd1a367 100644
--- a/include/usb_mass_storage.h
+++ b/include/usb_mass_storage.h
@@ -30,7 +30,6 @@ extern struct ums *ums;
int fsg_init(struct ums *);
void fsg_cleanup(void);
-struct ums *ums_init(unsigned int);
int fsg_main_thread(void *);
int fsg_add(struct usb_configuration *c);
[U-Boot] [PATCH V2 1/8] ums: support block devices not MMC devices
From: Stephen Warren swar...@nvidia.com
The USB Mass Storage function could equally well support a SATA device
as support an MMC device. Update struct ums to contain a block device
descriptor, not an MMC device descriptor.
Cc: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Stephen Warren swar...@nvidia.com
Acked-by: Przemyslaw Marczak p.marc...@samsung.com
---
v2: (The series) rebased onto latest u-boot-usb/master to pick up
Mateusz's DFU changes.
board/samsung/common/ums.c | 7 ---
include/usb_mass_storage.h | 4 ++--
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/board/samsung/common/ums.c b/board/samsung/common/ums.c
index cebabe920a29..ffe63685835c 100644
--- a/board/samsung/common/ums.c
+++ b/board/samsung/common/ums.c
@@ -7,12 +7,13 @@
#include common.h
#include usb_mass_storage.h
+#include mmc.h
#include part.h
static int ums_read_sector(struct ums *ums_dev,
ulong start, lbaint_t blkcnt, void *buf)
{
- block_dev_desc_t *block_dev = ums_dev-mmc-block_dev;
+ block_dev_desc_t *block_dev = ums_dev-block_dev;
lbaint_t blkstart = start + ums_dev-start_sector;
int dev_num = block_dev-dev;
@@ -22,7 +23,7 @@ static int ums_read_sector(struct ums *ums_dev,
static int ums_write_sector(struct ums *ums_dev,
ulong start, lbaint_t blkcnt, const void *buf)
{
- block_dev_desc_t *block_dev = ums_dev-mmc-block_dev;
+ block_dev_desc_t *block_dev = ums_dev-block_dev;
lbaint_t blkstart = start + ums_dev-start_sector;
int dev_num = block_dev-dev;
@@ -45,7 +46,7 @@ static struct ums *ums_disk_init(struct mmc *mmc)
return NULL;
}
- ums_dev.mmc = mmc;
+ ums_dev.block_dev = mmc-block_dev;
if (ums_end_sector = mmc_end_sector) {
ums_dev.start_sector = UMS_START_SECTOR;
diff --git a/include/usb_mass_storage.h b/include/usb_mass_storage.h
index ed460644c1fe..e3eb1ebb2e47 100644
--- a/include/usb_mass_storage.h
+++ b/include/usb_mass_storage.h
@@ -9,7 +9,7 @@
#define __USB_MASS_STORAGE_H__
#define SECTOR_SIZE0x200
-#include mmc.h
+#include part.h
#include linux/usb/composite.h
#ifndef UMS_START_SECTOR
@@ -31,7 +31,7 @@ struct ums {
unsigned int start_sector;
unsigned int num_sectors;
const char *name;
- struct mmc *mmc;
+ block_dev_desc_t *block_dev;
};
extern struct ums *ums;
--
1.8.1.5
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[U-Boot] [PATCH V2 3/8] ums: remove error-checking of MMC device size
From: Stephen Warren swar...@nvidia.com
There's no reason to believe that an MMC device will incorrectly report
its capacity. Remove error checking of this value from ums_disk_init()
to simplify it.
Cc: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Stephen Warren swar...@nvidia.com
Acked-by: Przemyslaw Marczak p.marc...@samsung.com
---
board/samsung/common/ums.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/board/samsung/common/ums.c b/board/samsung/common/ums.c
index 1f7dda43629b..42a49018f584 100644
--- a/board/samsung/common/ums.c
+++ b/board/samsung/common/ums.c
@@ -38,16 +38,9 @@ static struct ums ums_dev = {
static struct ums *ums_disk_init(struct mmc *mmc)
{
- uint64_t mmc_end_sector = mmc-capacity / SECTOR_SIZE;
-
- if (!mmc_end_sector) {
- error(MMC capacity is not valid);
- return NULL;
- }
-
ums_dev.block_dev = mmc-block_dev;
ums_dev.start_sector = 0;
- ums_dev.num_sectors = mmc_end_sector;
+ ums_dev.num_sectors = mmc-capacity / SECTOR_SIZE;
printf(UMS: disk start sector: %#x, count: %#x\n,
ums_dev.start_sector, ums_dev.num_sectors);
--
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[U-Boot] [PATCH V2 4/8] ums: remove ums_disk_init()
From: Stephen Warren swar...@nvidia.com
Now that ums_disk_init() is so simple, there's no need for it to be a
separate function. Instead, just add it to the tail end of ums_init().
Cc: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Stephen Warren swar...@nvidia.com
Acked-by: Przemyslaw Marczak p.marc...@samsung.com
---
board/samsung/common/ums.c | 17 +++--
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/board/samsung/common/ums.c b/board/samsung/common/ums.c
index 42a49018f584..b35670d9966a 100644
--- a/board/samsung/common/ums.c
+++ b/board/samsung/common/ums.c
@@ -36,8 +36,14 @@ static struct ums ums_dev = {
.name = UMS disk,
};
-static struct ums *ums_disk_init(struct mmc *mmc)
+struct ums *ums_init(unsigned int dev_num)
{
+ struct mmc *mmc = NULL;
+
+ mmc = find_mmc_device(dev_num);
+ if (!mmc || mmc_init(mmc))
+ return NULL;
+
ums_dev.block_dev = mmc-block_dev;
ums_dev.start_sector = 0;
ums_dev.num_sectors = mmc-capacity / SECTOR_SIZE;
@@ -47,12 +53,3 @@ static struct ums *ums_disk_init(struct mmc *mmc)
return ums_dev;
}
-
-struct ums *ums_init(unsigned int dev_num)
-{
- struct mmc *mmc = find_mmc_device(dev_num);
-
- if (!mmc || mmc_init(mmc))
- return NULL;
- return ums_disk_init(mmc);
-}
--
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[U-Boot] [PATCH V2 6/8] ums: use get_device() not find_mmc_device();
From: Stephen Warren swar...@nvidia.com
get_device() is a generic routine that will support any type of block
device. Use this instead of the type-specific find_mmc_device(), for
future flexibility.
Cc: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Stephen Warren swar...@nvidia.com
Acked-by: Przemyslaw Marczak p.marc...@samsung.com
---
common/cmd_usb_mass_storage.c | 25 ++---
1 file changed, 14 insertions(+), 11 deletions(-)
diff --git a/common/cmd_usb_mass_storage.c b/common/cmd_usb_mass_storage.c
index 9888ed4f1756..b5954fc5c6e5 100644
--- a/common/cmd_usb_mass_storage.c
+++ b/common/cmd_usb_mass_storage.c
@@ -9,7 +9,6 @@
#include common.h
#include command.h
#include g_dnl.h
-#include mmc.h
#include part.h
#include usb.h
#include usb_mass_storage.h
@@ -40,17 +39,22 @@ static struct ums ums_dev = {
.name = UMS disk,
};
-struct ums *ums_init(unsigned int dev_num)
+struct ums *ums_init(const char *devtype, const char *devnum)
{
- struct mmc *mmc = NULL;
+ block_dev_desc_t *block_dev;
+ int ret;
- mmc = find_mmc_device(dev_num);
- if (!mmc || mmc_init(mmc))
+ ret = get_device(devtype, devnum, block_dev);
+ if (ret 0)
return NULL;
- ums_dev.block_dev = mmc-block_dev;
+ /* f_mass_storage.c assumes SECTOR_SIZE sectors */
+ if (block_dev-blksz != SECTOR_SIZE)
+ return NULL;
+
+ ums_dev.block_dev = block_dev;
ums_dev.start_sector = 0;
- ums_dev.num_sectors = mmc-capacity / SECTOR_SIZE;
+ ums_dev.num_sectors = block_dev-lba;
printf(UMS: disk start sector: %#x, count: %#x\n,
ums_dev.start_sector, ums_dev.num_sectors);
@@ -65,11 +69,10 @@ int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
return CMD_RET_USAGE;
const char *usb_controller = argv[1];
- const char *mmc_devstring = argv[2];
-
- unsigned int dev_num = simple_strtoul(mmc_devstring, NULL, 0);
+ const char *devtype = mmc;
+ const char *devnum = argv[2];
- struct ums *ums = ums_init(dev_num);
+ struct ums *ums = ums_init(devtype, devnum);
if (!ums)
return CMD_RET_FAILURE;
--
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[U-Boot] [PATCH V2 7/8] ums: move all variable declarations to the start of the block
From: Stephen Warren swar...@nvidia.com
It's easier to assign values to the variables inside an if statement body
if the assignment and declaration are separate.
Cc: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Stephen Warren swar...@nvidia.com
Acked-by: Przemyslaw Marczak p.marc...@samsung.com
---
common/cmd_usb_mass_storage.c | 24
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/common/cmd_usb_mass_storage.c b/common/cmd_usb_mass_storage.c
index b5954fc5c6e5..5e0211683c8f 100644
--- a/common/cmd_usb_mass_storage.c
+++ b/common/cmd_usb_mass_storage.c
@@ -65,25 +65,33 @@ struct ums *ums_init(const char *devtype, const char
*devnum)
int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
{
+ const char *usb_controller;
+ const char *devtype;
+ const char *devnum;
+ struct ums *ums;
+ unsigned int controller_index;
+ int rc;
+ int cable_ready_timeout __maybe_unused;
+
if (argc 3)
return CMD_RET_USAGE;
- const char *usb_controller = argv[1];
- const char *devtype = mmc;
- const char *devnum = argv[2];
+ usb_controller = argv[1];
+ devtype = mmc;
+ devnum = argv[2];
- struct ums *ums = ums_init(devtype, devnum);
+ ums = ums_init(devtype, devnum);
if (!ums)
return CMD_RET_FAILURE;
- unsigned int controller_index = (unsigned int)(simple_strtoul(
- usb_controller, NULL, 0));
+ controller_index = (unsigned int)(simple_strtoul(
+ usb_controller, NULL, 0));
if (board_usb_init(controller_index, USB_INIT_DEVICE)) {
error(Couldn't init USB controller.);
return CMD_RET_FAILURE;
}
- int rc = fsg_init(ums);
+ rc = fsg_init(ums);
if (rc) {
error(fsg_init failed);
return CMD_RET_FAILURE;
@@ -96,7 +104,7 @@ int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
}
/* Timeout unit: seconds */
- int cable_ready_timeout = UMS_CABLE_READY_TIMEOUT;
+ cable_ready_timeout = UMS_CABLE_READY_TIMEOUT;
if (!g_dnl_board_usb_cable_connected()) {
/*
--
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[U-Boot] [PATCH V2 8/8] ums: allow the user to specify the device type
From: Stephen Warren swar...@nvidia.com
Allow an optional devtype parameter to the ums command, which specifies
the type of the device to be exported. This could allow exporting a SATA
or even another USB device.
Cc: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Stephen Warren swar...@nvidia.com
Acked-by: Przemyslaw Marczak p.marc...@samsung.com
---
common/cmd_usb_mass_storage.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/common/cmd_usb_mass_storage.c b/common/cmd_usb_mass_storage.c
index 5e0211683c8f..2c879ea0837c 100644
--- a/common/cmd_usb_mass_storage.c
+++ b/common/cmd_usb_mass_storage.c
@@ -77,8 +77,13 @@ int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
return CMD_RET_USAGE;
usb_controller = argv[1];
- devtype = mmc;
- devnum = argv[2];
+ if (argc = 4) {
+ devtype = argv[2];
+ devnum = argv[3];
+ } else {
+ devtype = mmc;
+ devnum = argv[2];
+ }
ums = ums_init(devtype, devnum);
if (!ums)
@@ -152,7 +157,8 @@ exit:
return CMD_RET_SUCCESS;
}
-U_BOOT_CMD(ums, CONFIG_SYS_MAXARGS, 1, do_usb_mass_storage,
+U_BOOT_CMD(ums, 4, 1, do_usb_mass_storage,
Use the UMS [User Mass Storage],
- ums USB_controller mmc_dev e.g. ums 0 0
+ ums USB_controller [devtype] devnum e.g. ums 0 mmc 0\n
+ devtype defaults to mmc
);
--
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[U-Boot] Pull request for u-boot-arm - u-boot?
Albert, I was wondering when the next pull request for u-boot-arm/master - u-boot/master was likely to be? I asked because some changes to the Tegra USB driver went through the u-boot-tegra/master and hence are now in u-boot-arm/master, but not in u-boot-usb/master. I have some more USB driver changes which rely on the earlier USB patches, and these should really go through u-boot-usb/master rather than the Tegra/ARM tree. For this to happen, u-boot-usb/master needs to contain the patches currently in u-boot-arm/master, and the best way for that to happen is for those patches to get into u-boot/master so that u-boot-usb/master can merge them. Or, should Marek just merge u-boot-arm/master into his tree directly? Thanks. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
