date:20141216

Hi Simon,

On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass s...@chromium.org wrote:
 Intel delivers microcode updates in a microcode.dat file which must be
 split up into individual files for each CPU. Add a tool which performs
 this task. It can list available microcode updates for each model and
 produce a new microcode update in U-Boot's .dtsi format.

 Signed-off-by: Simon Glass s...@chromium.org
 ---

 Changes in v2:
 - Add function comments
 - Fix problem with specifying the full microcode filename
 - Allow 'list' command to display a list of matching microcode chunks
 - Print a message when generating microcode
 - Expand the help a little
 - Print an error when an ambiguous microcode model is given

  tools/microcode-tool|   1 +
  tools/microcode-tool.py | 245 
 
  2 files changed, 246 insertions(+)
  create mode 12 tools/microcode-tool
  create mode 100755 tools/microcode-tool.py

 diff --git a/tools/microcode-tool b/tools/microcode-tool
 new file mode 12
 index 000..8be8507
 --- /dev/null
 +++ b/tools/microcode-tool
 @@ -0,0 +1 @@
 +microcode-tool.py
 \ No newline at end of file
 diff --git a/tools/microcode-tool.py b/tools/microcode-tool.py
 new file mode 100755
 index 000..5dbb0db
 --- /dev/null
 +++ b/tools/microcode-tool.py
 @@ -0,0 +1,245 @@
 +#!/usr/bin/env python
 +#
 +# Copyright (c) 2014 Google, Inc
 +#
 +# SPDX-License-Identifier:  GPL-2.0+
 +#
 +#
 +# Intel microcode update tool
 +
 +from optparse import OptionParser
 +import os
 +import re
 +import struct
 +import sys
 +
 +MICROCODE_DIR = 'arch/x86/dts/microcode'
 +
 +class Microcode:
 +Holds information about the microcode for a particular model of CPU.
 +
 +Attributes:
 +name:  Name of the CPU this microcode is for, including any version
 +   information (e.g. 'm12206a7_0029')
 +model: Model code string (this is cpuid(1).eax, e.g. '206a7')
 +words: List of hex words containing the microcode. The first 16 words
 +   are the public header.
 +
 +def __init__(self, name, data):
 +self.name = name
 +# Convert data into a list of hex words
 +self.words = []
 +for value in ''.join(data).split(','):
 +hexval = value.strip()
 +if hexval:
 +self.words.append(int(hexval, 0))
 +
 +# The model is in the 4rd hex word
 +self.model = '%x' % self.words[3]
 +
 +def ParseFile(fname):
 +Parse a micrcode.dat file and return the component parts
 +
 +Args:
 +fname: Filename to parse
 +Returns:
 +3-Tuple:
 +date:   String containing date from the file's header
 +license:List of text lines for the license file
 +microcodes: List of Microcode objects from the file
 +
 +re_date = re.compile('/\* *(.* [0-9]{4}) *\*/$')
 +re_license = re.compile('/[^-*+] *(.*)$')
 +re_name = re.compile('/\* *(.*)\.inc *\*/', re.IGNORECASE)
 +microcodes = {}
 +license = []
 +date = ''
 +data = []
 +name = None
 +with open(fname) as fd:
 +for line in fd:
 +line = line.rstrip()
 +m_date = re_date.match(line)
 +m_license = re_license.match(line)
 +m_name = re_name.match(line)
 +if m_name:
 +if name:
 +microcodes[name] = Microcode(name, data)
 +name = m_name.group(1).lower()
 +data = []
 +elif m_license:
 +license.append(m_license.group(1))
 +elif m_date:
 +date = m_date.group(1)
 +else:
 +data.append(line)
 +if name:
 +microcodes[name] = Microcode(name, data)
 +return date, license, microcodes
 +
 +def List(date, microcodes, model):
 +List the available microcode chunks
 +
 +Args:
 +date:   Date of the microcode file
 +microcodes: Dict of Microcode objects indexed by name
 +model:  Model string to search for, or None
 +
 +print 'Date: %s' % date
 +if model:
 +mcode_list, tried = FindMicrocode(microcodes, model.lower())
 +print 'Matching models %s:' % (', '.join(tried))
 +else:
 +print 'All models:'
 +mcode_list = [microcodes[m] for m in microcodes.keys()]
 +for mcode in mcode_list:
 +print '%-20s: model %s' % (mcode.name, mcode.model)
 +
 +def FindMicrocode(microcodes, model):
 +Find all the microcode chunks which match the given model.
 +
 +This model is something like 306a9 (the value returned in eax from
 +cpuid(1) when running on Intel CPUs). But we allow a partial match,
 +omitting the last 1 or two characters to allow many families to have the
 +same microcode.
 +
 +If the model name is ambiguous we return a list of matches.
 +
 +Args:
 +microcodes: Dict of

Re: [U-Boot] [PATCH] mtd: nand: mxs: fix PIO_WORD number


On 15/12/2014 12:14, Marek Vasut wrote:

On Monday, December 15, 2014 at 09:45:13 AM, Luca Ellero wrote:

Hi Marek,

On 13/12/2014 14:12, Marek Vasut wrote:

On Friday, December 12, 2014 at 04:03:14 PM, Luca Ellero wrote:

Hi Marek,

On 12/12/2014 13:58, Marek Vasut wrote:

On Friday, December 12, 2014 at 01:43:22 PM, Stefan Roese wrote:

Hi Luca,

On 12.12.2014 13:40, Luca Ellero wrote:

On 10.12.2014 09:24, Luca Ellero wrote:

There is only one pio_word in this DMA transaction so data field
must be 1.

Signed-off-by: Luca Ellero luca.ell...@brickedbrain.com
---

 drivers/mtd/nand/mxs_nand.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/mxs_nand.c
b/drivers/mtd/nand/mxs_nand.c index 7a064ab..616c9ca 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -305,7 +305,7 @@ static void mxs_nand_cmd_ctrl(struct mtd_info
*mtd, int data, unsigned int ctrl)

 d-cmd.data =

 MXS_DMA_DESC_COMMAND_DMA_READ | MXS_DMA_DESC_IRQ |
 MXS_DMA_DESC_CHAIN | MXS_DMA_DESC_DEC_SEM |

-MXS_DMA_DESC_WAIT4END | (3 
MXS_DMA_DESC_PIO_WORDS_OFFSET)

| +MXS_DMA_DESC_WAIT4END | (1 

MXS_DMA_DESC_PIO_WORDS_OFFSET) |

 (nand_info-cmd_queue_len 
 MXS_DMA_DESC_BYTES_OFFSET);


What error or problem does this incorrect setup cause in your case?
I'm asking since I'm also using this driver in some mx6 system and
have not seen any issues.


As far as I can see, it doesn't seem to cause any issue. But, if you
read the iMX6 Reference Manual (chapter 14.2) this field should
reflect the number of PIO_WORDS appended to the DMA command, in this
case 1.


Okay. I just wanted to check if this patch fixes a real problem that
you have experienced. Thanks for the explanation.

Reviewed-by: Stefan Roese s...@denx.de


The patch does in fact change the behavior such that it no longer
clears the ECCCTRL and COMPARE registers both on MX28 and on MX6 .
Could this have some impact?


I'm not sure. The manual doesn't tell much about it. Anyway if we want
to clear COMPARE and ECCCTRL register, we should at least ensure that
pio_words 1 and 2 are 0 before executing the DMA chain.

Something like this:
d-cmd.pio_words[1] = 0;
d-cmd.pio_words[2] = 0;

What do you think?


I believe the descriptor is zeroed out in mxs_nand_return_dma_descs(),
though I admit depending on such behavior is pretty iffy.

The question is, does your patch introduce a side-effect ? My proposal
would be to schedule the patch for -next and see what happens. I believe
the patch would be just fine and won't break anything.

What do you think ?


Scheduling the patch for -next it's ok for me.
However there are other two points where pio_words number doesn't
reflect the pio_words really initiated, one is in mxs_nand_read_buf()
and one is in mxs_nand_write_buf(). Each one declares 4 pio_words but
only one is initiated.
I wonder what we should do in this cases.


You can fix those as well. I recall that all this goop came from the original
(2.6.35) GPMI NAND driver, which is likely where all those bugs came from as
well.

Thank you!



OK, I will send a patch to fix them.
Regards

--
Luca Ellero

E-mail: luca.ell...@brickedbrain.com
Internet: www.brickedbrain.com

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Re: [U-Boot] [PATCH v2 3/6] x86: Move microcode updates into a separate directory

On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass s...@chromium.org wrote:
 We might end up with a few of these, so put them in their own directory.

 Signed-off-by: Simon Glass s...@chromium.org
 ---

 Changes in v2: None

  arch/x86/dts/link.dts   | 4 ++--
  arch/x86/dts/{ = microcode}/m12206a7_0028.dtsi | 0
  arch/x86/dts/{ = microcode}/m12306a9_0017.dtsi | 0
  3 files changed, 2 insertions(+), 2 deletions(-)
  rename arch/x86/dts/{ = microcode}/m12206a7_0028.dtsi (100%)
  rename arch/x86/dts/{ = microcode}/m12306a9_0017.dtsi (100%)

 diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts
 index 592af16..c435a67 100644
 --- a/arch/x86/dts/link.dts
 +++ b/arch/x86/dts/link.dts
 @@ -214,10 +214,10 @@

 microcode {
 update@0 {
 -#include m12206a7_0028.dtsi
 +#include microcode/m12206a7_0028.dtsi
 };
 update@1 {
 -#include m12306a9_0017.dtsi
 +#include microcode/m12306a9_0017.dtsi
 };
 };

 diff --git a/arch/x86/dts/m12206a7_0028.dtsi 
 b/arch/x86/dts/microcode/m12206a7_0028.dtsi
 similarity index 100%
 rename from arch/x86/dts/m12206a7_0028.dtsi
 rename to arch/x86/dts/microcode/m12206a7_0028.dtsi
 diff --git a/arch/x86/dts/m12306a9_0017.dtsi 
 b/arch/x86/dts/microcode/m12306a9_0017.dtsi
 similarity index 100%
 rename from arch/x86/dts/m12306a9_0017.dtsi
 rename to arch/x86/dts/microcode/m12306a9_0017.dtsi
 --

Reviewed-by: Bin Meng bmeng...@gmail.com
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Re: [U-Boot] [PATCH v2 2/6] x86: ifdtool: Add support for early microcode access

On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass s...@chromium.org wrote:
 Some Intel CPUs use an 'FSP' binary blob which provides an inflexible
 means of starting up the CPU. One result is that microcode updates can only
 be done before RAM is available and therefore parsing of the device tree
 is impracticle.

 Worse, the addess of the microcode update must be stored in ROM since a
 pointer to its start address and size is passed to the 'FSP' blob. It is
 not possible to perform any calculations to obtain the address and size.

 To work around this, ifdtool is enhanced to work out the address and size of
 the first microcode update it finds in the supplied device tree. It then
 writes these into the correct place in the ROM. U-Boot can then start up
 the FSP correctly.

 Signed-off-by: Simon Glass s...@chromium.org
 ---

 Changes in v2:
 - Finish off comments in write_uboot() function
 - Write the correct microcode pointer to U-Boot (fix fdt-addr bug)

  tools/Makefile  |   1 +
  tools/ifdtool.c | 110 
 +++-
  2 files changed, 103 insertions(+), 8 deletions(-)

 diff --git a/tools/Makefile b/tools/Makefile
 index a4216a1..e549f8e 100644
 --- a/tools/Makefile
 +++ b/tools/Makefile
 @@ -126,6 +126,7 @@ hostprogs-$(CONFIG_EXYNOS5250) += mkexynosspl
  hostprogs-$(CONFIG_EXYNOS5420) += mkexynosspl
  HOSTCFLAGS_mkexynosspl.o := -pedantic

 +ifdtool-objs := $(LIBFDT_OBJS) ifdtool.o
  hostprogs-$(CONFIG_X86) += ifdtool

  hostprogs-$(CONFIG_MX23) += mxsboot
 diff --git a/tools/ifdtool.c b/tools/ifdtool.c
 index 4077ba8..fe8366b 100644
 --- a/tools/ifdtool.c
 +++ b/tools/ifdtool.c
 @@ -18,6 +18,7 @@
  #include unistd.h
  #include sys/types.h
  #include sys/stat.h
 +#include libfdt.h
  #include ifdtool.h

  #undef DEBUG
 @@ -34,6 +35,8 @@

  enum input_file_type_t {
 IF_normal,
 +   IF_fdt,
 +   IF_uboot,
  };

  struct input_file {
 @@ -703,7 +706,7 @@ int inject_region(char *image, int size, int region_type, 
 char *region_fname)
   * 0x so use an address relative to that. For an
   * 8MB ROM the start address is 0xfff8.
   * @write_fname:   Filename to add to the image
 - * @return 0 if OK, -ve on error
 + * @return number of bytes written if OK, -ve on error
   */
  static int write_data(char *image, int size, unsigned int addr,
   const char *write_fname)
 @@ -715,7 +718,7 @@ static int write_data(char *image, int size, unsigned int 
 addr,
 if (write_fd  0)
 return write_fd;

 -   offset = addr + size;
 +   offset = (uint32_t)(addr + size);
 debug(Writing %s to offset %#x\n, write_fname, offset);

 if (offset  0 || offset + write_size  size) {
 @@ -731,6 +734,68 @@ static int write_data(char *image, int size, unsigned 
 int addr,

 close(write_fd);

 +   return write_size;
 +}
 +
 +/**
 + * write_uboot() - Write U-Boot, device tree and microcode pointer
 + *
 + * This writes U-Boot into a place in the flash, followed by its device tree.
 + * The microcode pointer is written so that U-Boot can find the microcode in
 + * the device tree very early in boot.
 + *
 + * @image: Pointer to image
 + * @size:  Size of image in bytes
 + * @uboot: Input file information for u-boot.bin
 + * @fdt:   Input file information for u-boot.dtb
 + * @ucode_ptr: Address in U-Boot where the microcode pointer should be placed
 + * @return 0 if OK, -ve on error
 + */
 +static int write_uboot(char *image, int size, struct input_file *uboot,
 +  struct input_file *fdt, unsigned int ucode_ptr)
 +{
 +   const void *blob;
 +   const char *data;
 +   int uboot_size;
 +   uint32_t *ptr;
 +   int data_size;
 +   int offset;
 +   int node;
 +   int ret;
 +
 +   uboot_size = write_data(image, size, uboot-addr, uboot-fname);
 +   if (uboot_size  0)
 +   return uboot_size;
 +   fdt-addr = uboot-addr + uboot_size;
 +   debug(U-Boot size %#x, FDT at %#x\n, uboot_size, fdt-addr);
 +   ret = write_data(image, size, fdt-addr, fdt-fname);
 +   if (ret  0)
 +   return ret;
 +
 +   if (ucode_ptr) {
 +   blob = (void *)image + (uint32_t)(fdt-addr + size);
 +   debug(DTB at %lx\n, (char *)blob - image);
 +   node = fdt_node_offset_by_compatible(blob, 0,
 +intel,microcode);
 +   if (node  0) {
 +   debug(No microcode found in FDT: %s\n,
 + fdt_strerror(node));
 +   return -ENOENT;
 +   }
 +   data = fdt_getprop(blob, node, data, data_size);
 +   if (!data) {
 +   debug(No microcode data found in FDT: %s\n,
 + fdt_strerror(data_size));
 +   return -ENOENT;
 +   }

Re: [U-Boot] [PATCH v2 5/6] x86: Correct problems in the microcode loading

Hi Simon,

On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass s...@chromium.org wrote:
 There are several problems in the code. The device tree decode is incorrect
 in ways that are masked due to a matching bug. Both are fixed. Also
 microcode_read_rev() should be inline and called before the microcode is
 written.

 Note: microcode writing does not work correctly on ivybridge for me. Further
 work is needed to resolve this. But this patch tidies up the existing code
 so that will be easier.

Yep, I noticed that with the new microcode.dtsi generated from the
microcode tool, the endianness is different from previous ivybridge
one. I think the new one is correct due to dts is using big-endian
while IA processor is little-endian. I just wonder why previous dtsi
could work on ivybridge? And now since we are using little-endian so
we should decode dts using little-endian too. Is this endianness issue
that causes the microcode writing does not work on ivybridge?

 Signed-off-by: Simon Glass s...@chromium.org
 ---

 Changes in v2:
 - Add new patch to correct problems in the microcode loading

  arch/x86/cpu/ivybridge/microcode_intel.c | 25 +++--
  1 file changed, 15 insertions(+), 10 deletions(-)

 diff --git a/arch/x86/cpu/ivybridge/microcode_intel.c 
 b/arch/x86/cpu/ivybridge/microcode_intel.c
 index 79c075f..0817751 100644
 --- a/arch/x86/cpu/ivybridge/microcode_intel.c
 +++ b/arch/x86/cpu/ivybridge/microcode_intel.c
 @@ -50,17 +50,17 @@ static int microcode_decode_node(const void *blob, int 
 node,
 update-date_code = fdtdec_get_int(blob, node,
intel,date-code, 0);
 update-processor_signature = fdtdec_get_int(blob, node,
 -   intel.processor-signature, 0);
 +   intel,processor-signature, 0);
 update-checksum = fdtdec_get_int(blob, node, intel,checksum, 0);
 update-loader_revision = fdtdec_get_int(blob, node,
 -loader-revision, 0);
 +intel,loader-revision, 0);
 update-processor_flags = fdtdec_get_int(blob, node,
 -processor-flags, 0);
 +intel,processor-flags, 0);

 return 0;
  }

 -static uint32_t microcode_read_rev(void)
 +static inline uint32_t microcode_read_rev(void)
  {
 /*
  * Some Intel CPUs can be very finicky about the CPUID sequence used.
 @@ -116,6 +116,7 @@ int microcode_update_intel(void)
  {
 struct microcode_update cpu, update;
 const void *blob = gd-fdt_blob;
 +   int skipped;
 int count;
 int node;
 int ret;
 @@ -123,12 +124,13 @@ int microcode_update_intel(void)
 microcode_read_cpu(cpu);
 node = 0;
 count = 0;
 +   skipped = 0;
 do {
 node = fdtdec_next_compatible(blob, node,
   COMPAT_INTEL_MICROCODE);
 if (node  0) {
 debug(%s: Found %d updates\n, __func__, count);
 -   return count ? 0 : -ENOENT;
 +   return count ? 0 : skipped ? -EEXIST : -ENOENT;
 }

 ret = microcode_decode_node(blob, node, update);
 @@ -137,12 +139,15 @@ int microcode_update_intel(void)
   ret);
 return ret;
 }
 -   if (update.processor_signature == cpu.processor_signature 
 -   (update.processor_flags  cpu.processor_flags)) {
 -   debug(%s: Update already exists\n, __func__);
 -   return -EEXIST;
 +   if (!(update.processor_signature == cpu.processor_signature 
 + (update.processor_flags  cpu.processor_flags))) {
 +   debug(%s: Skipping non-matching update, sig=%x, 
 pf=%x\n,
 + __func__, update.processor_signature,
 + update.processor_flags);
 +   skipped++;
 +   continue;
 }
 -
 +   ret = microcode_read_rev();
 wrmsr(0x79, (ulong)update.data, 0);
 debug(microcode: updated to revision 0x%x 
 date=%04x-%02x-%02x\n,
   microcode_read_rev(), update.date_code  0x,
 --

Regards,
Bin
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Re: [U-Boot] [PATCH v2 6/6] x86: Convert microcode format to device-tree-only

On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass s...@chromium.org wrote:
 To avoid having two microcode formats, adjust the build system to support
 obtaining the microcode from the device tree, even in the case where it
 must be made available before the device tree can be accessed.

 Also move the microcode for queensbay (unfortunately the wrong version).

 Signed-off-by: Simon Glass s...@chromium.org
 ---

 Changes in v2:
 - Update microcode file to version 5_cv
 - Drop patches that have already been applied

  Makefile   |4 +-
  arch/x86/cpu/queensbay/M0220661105.inc | 1288 
 
  arch/x86/cpu/queensbay/tnc_car.S   |   11 +-
  arch/x86/dts/crownbay.dts  |7 +
  arch/x86/dts/microcode/m0220661105_cv.dtsi |  366 
  5 files changed, 380 insertions(+), 1296 deletions(-)
  delete mode 100644 arch/x86/cpu/queensbay/M0220661105.inc
  create mode 100644 arch/x86/dts/microcode/m0220661105_cv.dtsi

 diff --git a/Makefile b/Makefile
 index 67a7ecb..49c4a89 100644
 --- a/Makefile
 +++ b/Makefile
 @@ -947,7 +947,9 @@ ifneq ($(CONFIG_X86_RESET_VECTOR),)
  rom: u-boot.rom FORCE

  IFDTOOL=$(objtree)/tools/ifdtool
 -IFDTOOL_FLAGS  = -w $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot-dtb.bin
 +IFDTOOL_FLAGS  = -f 0:$(objtree)/u-boot.dtb
 +IFDTOOL_FLAGS += -m 0x$(shell $(NM) u-boot |grep _dt_ucode_base_size |cut 
 -d' ' -f1)
 +IFDTOOL_FLAGS += -U $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot.bin
  IFDTOOL_FLAGS += -w $(CONFIG_SYS_X86_START16):$(objtree)/u-boot-x86-16bit.bin

  ifneq ($(CONFIG_HAVE_INTEL_ME),)
 diff --git a/arch/x86/cpu/queensbay/M0220661105.inc 
 b/arch/x86/cpu/queensbay/M0220661105.inc
 deleted file mode 100644
 index f2b2b4e..000
 --- a/arch/x86/cpu/queensbay/M0220661105.inc
 +++ /dev/null
 @@ -1,1288 +0,0 @@
 -/*
 - * Copyright (C) 2013, Intel Corporation
 - *
 - * SPDX-License-Identifier:Intel
 - */
 -
 -/* External Header */
 -.long 0x0001 /* Header Version */
 -.long 0x0105 /* Update Revision */
 -.long 0x07182011 /* Date */
 -.long 0x00020661 /* Processor Signature */
 -.long 0x52558795 /* Checksum */
 -.long 0x0001 /* Loader Revision */
 -.long 0x0002 /* Processor Flags */
 -.long 0x13d0 /* Data Size (excluding headers) */
 -.long 0x1400 /* Total Size (including headers) */
 -.long 0x /* Reserved */
 -.long 0x /* Reserved */
 -.long 0x /* Reserved */
 -/* Data */
 -.long 0x
 -.long 0x00a1
 -.long 0x00020001
 -.long 0x0105
 -.long 0x0019
 -.long 0x00050100
 -.long 0x20110715
 -.long 0x0401
 -.long 0x0001
 -.long 0x00020661
 -.long 0x
 -.long 0x
 -.long 0x
 -.long 0x
 -.long 0x
 -.long 0x
 -.long 0x
 -.long 0x
 -.long 0x
 -.long 0x
 -.long 0x
 -.long 0x
 -.long 0x
 -.long 0x
 -.long 0x57a55795
 -.long 0xe30f7a7d
 -.long 0x53be2f8e
 -.long 0x46e3b90d
 -.long 0xd6005cd3
 -.long 0xb734bb21
 -.long 0x06642b66
 -.long 0x355042a0
 -.long 0x0882023d
 -.long 0x953684cb
 -.long 0x0abe06ee
 -.long 0xa7ef1798
 -.long 0x160d6cb8
 -.long 0x930cf745
 -.long 0xafc3fd79
 -.long 0xa70df3d5
 -.long 0xb0620f46
 -.long 0x70048a23
 -.long 0xbf95ecf0
 -.long 0x76c1b997
 -.long 0x5128616d
 -.long 0xb6b4b969
 -.long 0xcc69f71d
 -.long 0xdf7416e1
 -.long 0xdf9a571b
 -.long 0x50c0bcc8
 -.long 0x85e2b3cd
 -.long 0xc1927532
 -.long 0x7a04b6be
 -.long 0xe56b7f97
 -.long 0x524085c4
 -.long 0x668bf327
 -.long 0xb3eaa54c
 -.long 0xccde06f8
 -.long 0x09b4e42b
 -.long 0x033b0a46
 -.long 0x0f6e2fde
 -.long 0xb308ce53
 -.long 0x93eff03e
 -.long 0x8830014e
 -.long 0x5c8a6f22
 -.long 0x91d2f757
 -.long 0xf70b648d
 -.long 0x0789998a
 -.long 0xd84d4640
 -.long 0xe5f34e80
 -.long 0xf3357e64
 -.long 0xd1e2beea
 -.long 0xc7e95c3a
 -.long 0x30e57e4d
 -.long 0xec214356
 -.long 0x7e10859e
 -.long 0x1d5895d5
 -.long 0xdeeff6cb
 -.long 0xed1030ed
 -.long 0x827e603d
 -.long 0x6b4b2de3
 -.long 0x83ec6fd0
 -.long 0xa64092f3
 -.long 0x8d9887e4
 -.long 0xbefcbedd
 -.long 0x2111afef
 -.long 0xcb9abf96
 -.long 0x5c79ceac
 -.long 0x9bf8a57f
 -.long 0x5d0e44be
 -.long 0xdca3d3b6
 -.long 0x9072d1ca
 -.long 0x48e73a50
 -.long 0x8d0bc804
 -.long 0x6aea94d3
 -.long 0xc372403e
 -.long 0x0011
 -.long 0x5de60a0b
 -.long 0xbd3cc5c6
 -.long 0x2d6c2ad5
 -.long 0x2f19cc84
 -.long 0x7d8e4989
 -.long 0x86062789
 -.long 0xe00581e6
 -.long 0x70a57340
 -.long 0x8e8d33d3
 -.long 0x52311951
 -.long 0x2f186672
 -.long 0xfa530598
 -.long 0x909cb851
 -.long 0x51613bd1
 -.long 0x910ae4e6
 -.long 0xd897b90a
 -.long 0x3b440a2d
 -.long 0x6d563d9d
 -.long 0xd1020482
 -.long 0xcc9fe7db
 -.long 0x450b5e7c
 -.long 0x6d2194af
 -.long 0x507971bf
 -.long 0xd43d0b52
 -.long 0x96336a56
 -.long 0x4f796f0b
 -.long 0xa5eddfc5
 -.long 0x020fba71
 -.long 0xeda53948
 -.long 0xa6e4a439
 -.long 0x52c667e5
 -.long 0x9749040e
 -.long 0xfdefa084
 -.long 0x7871c609
 -.long 0xc815a889
 -.long 0x551582ac
 -.long

[U-Boot] [PATCH] spl: mmc: Fix raw boot mode (related to commit 4c5bbc2328a24f5e1ee990c9a9527e48e5fb3b5f)

2014-12-16 Thread Guillaume GARDET

As reported by Robert Nelson, commit 4c5bbc2328a24f5e1ee990c9a9527e48e5fb3b5f 
may break MMC RAW boot mode.
This patch fixes the check path to fix MMC Raw boot mode.

Tested raw boot mode and FS boot mode on a pandaboard (rev. A3).

Reported-by: Robert Nelson robertcnel...@gmail.com
Signed-off-by: Guillaume GARDET guillaume.gar...@free.fr

Cc: Tom Rini tr...@ti.com
Cc: Robert Nelson robertcnel...@gmail.com

---
 common/spl/spl_mmc.c | 19 ---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 7bae16b..c2e596b 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -172,11 +172,24 @@ void spl_mmc_load_image(void)
err = mmc_load_image_raw_sector(mmc,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
 #endif
-   } else {
+   }
+
+   switch(boot_mode){
+   case MMCSD_MODE_RAW:
+#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
+   case MMCSD_MODE_FS:
+#endif
+#ifdef CONFIG_SUPPORT_EMMC_BOOT
+   case MMCSD_MODE_EMMCBOOT:
+#endif
+   /* Boot mode is ok. Nothing to do. */
+   break;
+   case MMCSD_MODE_UNDEFINED:
+   default:
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
-   puts(spl: wrong MMC boot mode\n);
+   puts(spl: wrong MMC boot mode\n);
 #endif
-   hang();
+   hang();
}
 
if (err)
-- 
1.8.4.5

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Re: [U-Boot] [PATCH] spl: if MMCSD_MODE_RAW fails, try MMCSD_MODE_FS, if available

2014-12-16 Thread Guillaume Gardet


Le 15/12/2014 10:01, Guillaume Gardet a écrit :

Le 15/12/2014 09:43, Guillaume Gardet a écrit :

Hi Robert,


Le 12/12/2014 22:49, Robert Nelson a écrit :

On Tue, Nov 18, 2014 at 3:44 AM, Guillaume GARDET
guillaume.gar...@free.fr wrote:

In SPL MMC, boot modes are exclusive. So, if MMCSD_MODE_RAW fails, the board 
hangs. This patch allows to
try MMCSD_MODE_FS then, if available.

It has been tested on a pandaboard (rev. A3).

HI Guillaume,

What mode did you test this is? (RAW or FS)


I did test for FS for sure, but not sure about raw mode.



In Raw Mode with the omap5_uevm  beaglebone black, i've had to revert
this. (I'm using RAW mode by default)

U-Boot SPL 2015.01-rc3-dirty (Dec 08 2014 - 20:04:01)
OMAP5432 ES2.0
SPL: Please implement spl_start_uboot() for your board
SPL: Direct Linux boot not active!
spl: wrong MMC boot mode
### ERROR ### Please RESET the board ###


Ok, I think I found the problem. Could you test the following patch, please?
http://guillaume.gardet.free.fr/u-boot/0001-spl-mmc-Fix-raw-boot-mode-related-to-commit.patch

If this patch fix your boot problem, I will send it ASAP.


Just updated the patch with a  better fix:
http://guillaume.gardet.free.fr/u-boot/0001-spl-mmc-Fix-raw-boot-mode-related-to-commit.patch


As I was able to test this patch, I just sent it:
https://patchwork.ozlabs.org/patch/421858/


Guillaume

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Re: [U-Boot] [PATCH] powerpc/913x: Add config flag for bootdelay

2014-12-16 Thread Harninder Rai

I am not sure I followed you completely but if I just use CONFIG_BOOTDELAY then 
I get the following compilation error

common/autoboot.c: In function 'bootdelay_process':
common/autoboot.c:247:68: error: expected expression before ';' token

Is there something which I am missing?


Thanks and Regards
Harry++

From: Sun York-R58495
Sent: Tuesday, December 16, 2014 11:46 AM
To: Rai Harninder-B01044; u-boot@lists.denx.de
Subject: RE: [PATCH] powerpc/913x: Add config flag for bootdelay


You understand this is the default value of the said variable. You can save 
your environmental variable when you boot up. You can save it to any value you 
want, and this default value doesn't matter any more, until you erase it.

York


From: Rai Harninder-B01044
Sent: Mon, 15/12/2014 22:07
To: Sun York-R58495 york...@freescale.commailto:york...@freescale.com; 
u-boot@lists.denx.demailto:u-boot@lists.denx.de
Subject: RE: [PATCH] powerpc/913x: Add config flag for bootdelay

 The change is trivial. Do you mind to explain why you need this change?
Thanks for the review. This change is required to give user some time to 
interrupt the booting process
Also, this will allow the system to boot from flash after power-on (does help 
in automation testing)
Is this sufficient for a commit message?

Harry++

 York
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Re: [U-Boot] [PATCH] mtd: nand: mxs: fix PIO_WORD number

On Tuesday, December 16, 2014 at 09:06:34 AM, Luca Ellero wrote:
 On 15/12/2014 12:14, Marek Vasut wrote:
  On Monday, December 15, 2014 at 09:45:13 AM, Luca Ellero wrote:
  Hi Marek,
  
  On 13/12/2014 14:12, Marek Vasut wrote:
  On Friday, December 12, 2014 at 04:03:14 PM, Luca Ellero wrote:
  Hi Marek,
  
  On 12/12/2014 13:58, Marek Vasut wrote:
  On Friday, December 12, 2014 at 01:43:22 PM, Stefan Roese wrote:
  Hi Luca,
  
  On 12.12.2014 13:40, Luca Ellero wrote:
  On 10.12.2014 09:24, Luca Ellero wrote:
  There is only one pio_word in this DMA transaction so data field
  must be 1.
  
  Signed-off-by: Luca Ellero luca.ell...@brickedbrain.com
  ---
  
   drivers/mtd/nand/mxs_nand.c |2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)
  
  diff --git a/drivers/mtd/nand/mxs_nand.c
  b/drivers/mtd/nand/mxs_nand.c index 7a064ab..616c9ca 100644
  --- a/drivers/mtd/nand/mxs_nand.c
  +++ b/drivers/mtd/nand/mxs_nand.c
  @@ -305,7 +305,7 @@ static void mxs_nand_cmd_ctrl(struct mtd_info
  *mtd, int data, unsigned int ctrl)
  
   d-cmd.data =
   
   MXS_DMA_DESC_COMMAND_DMA_READ | MXS_DMA_DESC_IRQ |
   MXS_DMA_DESC_CHAIN | MXS_DMA_DESC_DEC_SEM |
  
  -MXS_DMA_DESC_WAIT4END | (3 
  MXS_DMA_DESC_PIO_WORDS_OFFSET)
  
  | +MXS_DMA_DESC_WAIT4END | (1 
  
  MXS_DMA_DESC_PIO_WORDS_OFFSET) |
  
   (nand_info-cmd_queue_len 
   MXS_DMA_DESC_BYTES_OFFSET);
  
  What error or problem does this incorrect setup cause in your
  case? I'm asking since I'm also using this driver in some mx6
  system and have not seen any issues.
  
  As far as I can see, it doesn't seem to cause any issue. But, if
  you read the iMX6 Reference Manual (chapter 14.2) this field
  should reflect the number of PIO_WORDS appended to the DMA
  command, in this case 1.
  
  Okay. I just wanted to check if this patch fixes a real problem that
  you have experienced. Thanks for the explanation.
  
  Reviewed-by: Stefan Roese s...@denx.de
  
  The patch does in fact change the behavior such that it no longer
  clears the ECCCTRL and COMPARE registers both on MX28 and on MX6 .
  Could this have some impact?
  
  I'm not sure. The manual doesn't tell much about it. Anyway if we want
  to clear COMPARE and ECCCTRL register, we should at least ensure that
  pio_words 1 and 2 are 0 before executing the DMA chain.
  
  Something like this:
   d-cmd.pio_words[1] = 0;
   d-cmd.pio_words[2] = 0;
  
  What do you think?
  
  I believe the descriptor is zeroed out in mxs_nand_return_dma_descs(),
  though I admit depending on such behavior is pretty iffy.
  
  The question is, does your patch introduce a side-effect ? My proposal
  would be to schedule the patch for -next and see what happens. I
  believe the patch would be just fine and won't break anything.
  
  What do you think ?
  
  Scheduling the patch for -next it's ok for me.
  However there are other two points where pio_words number doesn't
  reflect the pio_words really initiated, one is in mxs_nand_read_buf()
  and one is in mxs_nand_write_buf(). Each one declares 4 pio_words but
  only one is initiated.
  I wonder what we should do in this cases.
  
  You can fix those as well. I recall that all this goop came from the
  original (2.6.35) GPMI NAND driver, which is likely where all those bugs
  came from as well.
  
  Thank you!
 
 OK, I will send a patch to fix them.

Thanks!
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Re: [U-Boot] Falcon mode boot support

2014-12-16 Thread Andy Pont

Hi Tom,

 How big is the args file?  We default to placing the args at 0x8800
 in ti_am335x_common.h (see CONFIG_SYS_SPL_ARGS_ADDR) to make sure that
 we don't have an overlap between the DT and the kernel which is quite
 possible with a reasonably sized DT and placing it at 0x8100.

Changing the CONFIG_SYS_SPL_ARGS_ADDR to be the same as the value in the ti_
am335x_common.h header file seems to have fixed the issue.

Unfortunately it hasn't improved the boot time by much - the bulk of the
time seems to be in reading and decompressing the kernel from SPI flash
device (Spansion S25FL164).  The only other storage medium on the board is
an eMMC flash device - would putting the kernel in there give a faster boot
time?

Thanks,

Andy.

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[U-Boot] [PATCH 1/2] image: bootm: Add OpenRTOS image type

Add separate image type for the Wittenstein OpenRTOS .

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Simon Glass s...@chromium.org
Cc: Tom Rini tr...@ti.com
---
 common/bootm_os.c | 29 +
 common/image.c|  4 
 include/image.h   |  1 +
 3 files changed, 34 insertions(+)

diff --git a/common/bootm_os.c b/common/bootm_os.c
index 5be4467..72477f0 100644
--- a/common/bootm_os.c
+++ b/common/bootm_os.c
@@ -404,6 +404,32 @@ static int do_bootm_integrity(int flag, int argc, char * 
const argv[],
 }
 #endif
 
+#ifdef CONFIG_BOOTM_OPENRTOS
+static int do_bootm_openrtos(int flag, int argc, char * const argv[],
+  bootm_headers_t *images)
+{
+   void (*entry_point)(void);
+
+   if (flag != BOOTM_STATE_OS_GO)
+   return 0;
+
+   entry_point = (void (*)(void))images-ep;
+
+   printf(## Transferring control to OpenRTOS (at address %08lx) ...\n,
+   (ulong)entry_point);
+
+   bootstage_mark(BOOTSTAGE_ID_RUN_OS);
+
+   /*
+* OpenRTOS Parameters:
+*   None
+*/
+   (*entry_point)();
+
+   return 1;
+}
+#endif
+
 static boot_os_fn *boot_os[] = {
[IH_OS_U_BOOT] = do_bootm_standalone,
 #ifdef CONFIG_BOOTM_LINUX
@@ -434,6 +460,9 @@ static boot_os_fn *boot_os[] = {
 #ifdef CONFIG_INTEGRITY
[IH_OS_INTEGRITY] = do_bootm_integrity,
 #endif
+#ifdef CONFIG_BOOTM_OPENRTOS
+   [IH_OS_OPENRTOS] = do_bootm_openrtos,
+#endif
 };
 
 /* Allow for arch specific config before we boot */
diff --git a/common/image.c b/common/image.c
index b75a5ce..64b4281 100644
--- a/common/image.c
+++ b/common/image.c
@@ -120,6 +120,10 @@ static const table_entry_t uimage_os[] = {
{   IH_OS_SOLARIS,  solaris,  Solaris,  },
{   IH_OS_SVR4, svr4, SVR4, },
 #endif
+#if defined(CONFIG_BOOTM_OPENRTOS) || defined(USE_HOSTCC)
+   {   IH_OS_OPENRTOS, openrtos, OpenRTOS, },
+#endif
+
{   -1, , , },
 };
 
diff --git a/include/image.h b/include/image.h
index af30d60..ee3afe3 100644
--- a/include/image.h
+++ b/include/image.h
@@ -152,6 +152,7 @@ struct lmb;
 #define IH_OS_INTEGRITY21  /* INTEGRITY*/
 #define IH_OS_OSE  22  /* OSE  */
 #define IH_OS_PLAN923  /* Plan 9   */
+#define IH_OS_OPENRTOS 24  /* OpenRTOS */
 
 /*
  * CPU Architecture Codes (supported by Linux)
-- 
2.1.3

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[U-Boot] [PATCH 2/2] image: Enable OpenRTOS booting via fitImage

Allow booting the OpenRTOS payloads via fitImage image type.

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Simon Glass s...@chromium.org
Cc: Tom Rini tr...@ti.com
---
 common/image-fit.c | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/common/image-fit.c b/common/image-fit.c
index 4ffc5aa..1589ee3 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1518,6 +1518,7 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
size_t size;
int type_ok, os_ok;
ulong load, data, len;
+   uint8_t os;
const char *prop_name;
int ret;
 
@@ -1612,10 +1613,15 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
(image_type == IH_TYPE_KERNEL 
fit_image_check_type(fit, noffset,
 IH_TYPE_KERNEL_NOLOAD));
+
os_ok = image_type == IH_TYPE_FLATDT ||
-   fit_image_check_os(fit, noffset, IH_OS_LINUX);
+   fit_image_check_os(fit, noffset, IH_OS_LINUX) ||
+   fit_image_check_os(fit, noffset, IH_OS_OPENRTOS);
if (!type_ok || !os_ok) {
-   printf(No Linux %s %s Image\n, genimg_get_arch_name(arch),
+   fit_image_get_os(fit, noffset, os);
+   printf(No %s %s %s Image\n,
+  genimg_get_os_name(os),
+  genimg_get_arch_name(arch),
   genimg_get_type_name(image_type));
bootstage_error(bootstage_id + BOOTSTAGE_SUB_CHECK_ALL);
return -EIO;
-- 
2.1.3

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[U-Boot] [PATCH 1/8] imx: i2c: Zap unnecessary malloc() calls

The malloc() calls are unnecessary, just allocate the stuff on stack.
While at it, reorder the code a little, so that only one variable is
used for the text, use snprintf() instead of sprintf() and use %01d
as a formatting string to avoid any possible overflows.

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Igor Grinberg grinb...@compulab.co.il
Cc: Nikita Kiryanov nik...@compulab.co.il
Cc: Sean Cross x...@kosagi.com
Cc: Simon Glass s...@chromium.org
Cc: Stefano Babic sba...@denx.de
Cc: Tim Harvey thar...@gateworks.com
---
 arch/arm/imx-common/i2c-mxv7.c | 24 
 1 file changed, 8 insertions(+), 16 deletions(-)

diff --git a/arch/arm/imx-common/i2c-mxv7.c b/arch/arm/imx-common/i2c-mxv7.c
index 34f5387..1a632e7 100644
--- a/arch/arm/imx-common/i2c-mxv7.c
+++ b/arch/arm/imx-common/i2c-mxv7.c
@@ -73,26 +73,21 @@ static void * const i2c_bases[] = {
 int setup_i2c(unsigned i2c_index, int speed, int slave_addr,
  struct i2c_pads_info *p)
 {
-   char *name1, *name2;
+   char name[9];
int ret;
 
if (i2c_index = ARRAY_SIZE(i2c_bases))
return -EINVAL;
 
-   name1 = malloc(9);
-   name2 = malloc(9);
-   if (!name1 || !name2)
-   return -ENOMEM;
-
-   sprintf(name1, i2c_sda%d, i2c_index);
-   sprintf(name2, i2c_scl%d, i2c_index);
-   ret = gpio_request(p-sda.gp, name1);
+   snprintf(name, sizeof(name), i2c_sda%01d, i2c_index);
+   ret = gpio_request(p-sda.gp, name);
if (ret)
-   goto err_req1;
+   return ret;
 
-   ret = gpio_request(p-scl.gp, name2);
+   snprintf(name, sizeof(name), i2c_scl%01d, i2c_index);
+   ret = gpio_request(p-scl.gp, name);
if (ret)
-   goto err_req2;
+   goto err_req;
 
/* Enable i2c clock */
ret = enable_i2c_clk(1, i2c_index);
@@ -112,11 +107,8 @@ int setup_i2c(unsigned i2c_index, int speed, int 
slave_addr,
 err_idle:
 err_clk:
gpio_free(p-scl.gp);
-err_req2:
+err_req:
gpio_free(p-sda.gp);
-err_req1:
-   free(name1);
-   free(name2);
 
return ret;
 }
-- 
2.1.3

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[U-Boot] [PATCH 2/8] arm: mx6: gw_ventana: Define CONFIG_SYS_MALLOC_F_LEN

This board uses setup_i2c() in SPL. The setup_i2c() function internally
calls gpio_request(), which in turn internally calls strdup(). The strdup()
requires a running mallocator, so this patch makes the mallocator available.

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Igor Grinberg grinb...@compulab.co.il
Cc: Nikita Kiryanov nik...@compulab.co.il
Cc: Sean Cross x...@kosagi.com
Cc: Simon Glass s...@chromium.org
Cc: Stefano Babic sba...@denx.de
Cc: Tim Harvey thar...@gateworks.com
---
 include/configs/gw_ventana.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 620f950..4f137fc 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -39,6 +39,7 @@
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN  (10 * 1024 * 1024)
+#define CONFIG_SYS_MALLOC_F_LEN(1  10)
 
 /* Init Functions */
 #define CONFIG_BOARD_EARLY_INIT_F
-- 
2.1.3

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[U-Boot] [PATCH 7/8] arm: mx6: novena: Pull video handling into separate file

Pull all of the video handling into a separate file, since a lot
more code will be added and such code would polute the board file.

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Igor Grinberg grinb...@compulab.co.il
Cc: Nikita Kiryanov nik...@compulab.co.il
Cc: Sean Cross x...@kosagi.com
Cc: Simon Glass s...@chromium.org
Cc: Stefano Babic sba...@denx.de
Cc: Tim Harvey thar...@gateworks.com
---
 board/kosagi/novena/Makefile |   1 +
 board/kosagi/novena/novena.c |  79 +
 board/kosagi/novena/novena.h |   2 +
 board/kosagi/novena/video.c  | 102 +++
 4 files changed, 106 insertions(+), 78 deletions(-)
 create mode 100644 board/kosagi/novena/video.c

diff --git a/board/kosagi/novena/Makefile b/board/kosagi/novena/Makefile
index 6fba177..6893b63 100644
--- a/board/kosagi/novena/Makefile
+++ b/board/kosagi/novena/Makefile
@@ -8,4 +8,5 @@ ifdef CONFIG_SPL_BUILD
 obj-y  := novena_spl.o
 else
 obj-y  := novena.o
+obj-$(CONFIG_VIDEO_IPUV3)  += video.o
 endif
diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c
index 5493e07..e7a6adb 100644
--- a/board/kosagi/novena/novena.c
+++ b/board/kosagi/novena/novena.c
@@ -152,87 +152,10 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
-/*
- * Video over HDMI
- */
-#if defined(CONFIG_VIDEO_IPUV3)
-static void enable_hdmi(struct display_info_t const *dev)
-{
-   imx_enable_hdmi_phy();
-}
-
-struct display_info_t const displays[] = {
-   {
-   /* HDMI Output */
-   .bus= -1,
-   .addr   = 0,
-   .pixfmt = IPU_PIX_FMT_RGB24,
-   .detect = detect_hdmi,
-   .enable = enable_hdmi,
-   .mode   = {
-   .name   = HDMI,
-   .refresh= 60,
-   .xres   = 1024,
-   .yres   = 768,
-   .pixclock   = 15385,
-   .left_margin= 220,
-   .right_margin   = 40,
-   .upper_margin   = 21,
-   .lower_margin   = 7,
-   .hsync_len  = 60,
-   .vsync_len  = 10,
-   .sync   = FB_SYNC_EXT,
-   .vmode  = FB_VMODE_NONINTERLACED
-   }
-   }
-};
-
-size_t display_count = ARRAY_SIZE(displays);
-
-static void setup_display(void)
-{
-   struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-   struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
-   enable_ipu_clock();
-   imx_setup_hdmi();
-
-   /* Turn on LDB0,IPU,IPU DI0 clocks */
-   setbits_le32(mxc_ccm-CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK);
-
-   /* set LDB0, LDB1 clk select to 011/011 */
-   clrsetbits_le32(mxc_ccm-cs2cdr,
-   MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK |
-   MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK,
-   (3  MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) |
-   (3  MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET));
-
-   setbits_le32(mxc_ccm-cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV);
-
-   setbits_le32(mxc_ccm-chsccdr, CHSCCDR_CLK_SEL_LDB_DI0 
-MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
-
-   writel(IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES |
-  IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH |
-  IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW |
-  IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG |
-  IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT |
-  IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG |
-  IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT |
-  IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED |
-  IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0,
-  iomux-gpr[2]);
-
-   clrsetbits_le32(iomux-gpr[3], IOMUXC_GPR3_LVDS0_MUX_CTL_MASK,
-   IOMUXC_GPR3_MUX_SRC_IPU1_DI0 
-   IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
-}
-#endif
-
 int board_early_init_f(void)
 {
 #if defined(CONFIG_VIDEO_IPUV3)
-   setup_display();
+   setup_display_clock();
 #endif
 
return 0;
diff --git a/board/kosagi/novena/novena.h b/board/kosagi/novena/novena.h
index 6613ad4..244004d 100644
--- a/board/kosagi/novena/novena.h
+++ b/board/kosagi/novena/novena.h
@@ -20,4 +20,6 @@
 #define NOVENA_SD_CD   IMX_GPIO_NR(1, 4)
 #define NOVENA_SD_WP   IMX_GPIO_NR(1, 2)
 
+void setup_display_clock(void);
+
 #endif /* __BOARD_KOSAGI_NOVENA_NOVENA_H__ */
diff --git a/board/kosagi/novena/video.c b/board/kosagi/novena/video.c
new file mode 100644
index 000..fdcd100
--- /dev/null
+++ b/board/kosagi/novena/video.c
@@ -0,0 +1,102 @@
+/*
+ * Novena video output support
+ *
+ * Copyright (C) 2014 Marek Vasut ma...@denx.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/errno.h
+#include asm/gpio.h
+#include asm/io.h

[U-Boot] [PATCH 5/8] arm: mx6: novena: Minor config file fix

Sequence like the following is completely useless and results from
an errorneous ordering of the statements during development. Zap it.
 #ifdef FOO
 #define FOO

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Igor Grinberg grinb...@compulab.co.il
Cc: Nikita Kiryanov nik...@compulab.co.il
Cc: Sean Cross x...@kosagi.com
Cc: Simon Glass s...@chromium.org
Cc: Stefano Babic sba...@denx.de
Cc: Tim Harvey thar...@gateworks.com
---
 include/configs/novena.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/configs/novena.h b/include/configs/novena.h
index 0f3621a..4924cbf 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -226,7 +226,6 @@
 
 /* Video output */
 #ifdef CONFIG_VIDEO
-#define CONFIG_VIDEO
 #define CONFIG_VIDEO_IPUV3
 #define CONFIG_CFB_CONSOLE
 #define CONFIG_VGA_AS_SINGLE_DEVICE
-- 
2.1.3

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[U-Boot] [PATCH 4/8] arm: mx6: novena: Minor coding style fix

Just zap multiple spaces and replace them with tabs properly.

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Igor Grinberg grinb...@compulab.co.il
Cc: Nikita Kiryanov nik...@compulab.co.il
Cc: Sean Cross x...@kosagi.com
Cc: Simon Glass s...@chromium.org
Cc: Stefano Babic sba...@denx.de
Cc: Tim Harvey thar...@gateworks.com
---
 board/kosagi/novena/novena.c | 26 +-
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c
index 6add9e5..e303a57 100644
--- a/board/kosagi/novena/novena.c
+++ b/board/kosagi/novena/novena.c
@@ -172,19 +172,19 @@ struct display_info_t const displays[] = {
.detect = detect_hdmi,
.enable = enable_hdmi,
.mode   = {
-   .name   = HDMI,
-   .refresh= 60,
-   .xres   = 1024,
-   .yres   = 768,
-   .pixclock   = 15385,
-   .left_margin= 220,
-   .right_margin   = 40,
-   .upper_margin   = 21,
-   .lower_margin   = 7,
-   .hsync_len  = 60,
-   .vsync_len  = 10,
-   .sync   = FB_SYNC_EXT,
-   .vmode  = FB_VMODE_NONINTERLACED
+   .name   = HDMI,
+   .refresh= 60,
+   .xres   = 1024,
+   .yres   = 768,
+   .pixclock   = 15385,
+   .left_margin= 220,
+   .right_margin   = 40,
+   .upper_margin   = 21,
+   .lower_margin   = 7,
+   .hsync_len  = 60,
+   .vsync_len  = 10,
+   .sync   = FB_SYNC_EXT,
+   .vmode  = FB_VMODE_NONINTERLACED
}
}
 };
-- 
2.1.3

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[U-Boot] [PATCH 6/8] arm: mx6: novena: Pull GPIO definitions into header

Pull the definitions of GPIOs into a separate header file, so that
they can be used across all source files.

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Igor Grinberg grinb...@compulab.co.il
Cc: Nikita Kiryanov nik...@compulab.co.il
Cc: Sean Cross x...@kosagi.com
Cc: Simon Glass s...@chromium.org
Cc: Stefano Babic sba...@denx.de
Cc: Tim Harvey thar...@gateworks.com
---
 board/kosagi/novena/novena.c |  6 ++
 board/kosagi/novena/novena.h | 23 +++
 board/kosagi/novena/novena_spl.c | 10 ++
 3 files changed, 27 insertions(+), 12 deletions(-)
 create mode 100644 board/kosagi/novena/novena.h

diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c
index e303a57..5493e07 100644
--- a/board/kosagi/novena/novena.c
+++ b/board/kosagi/novena/novena.c
@@ -36,11 +36,9 @@
 #include power/pfuze100_pmic.h
 #include stdio_dev.h
 
-DECLARE_GLOBAL_DATA_PTR;
+#include novena.h
 
-#define NOVENA_BUTTON_GPIO IMX_GPIO_NR(4, 14)
-#define NOVENA_SD_WP   IMX_GPIO_NR(1, 2)
-#define NOVENA_SD_CD   IMX_GPIO_NR(1, 4)
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * GPIO button
diff --git a/board/kosagi/novena/novena.h b/board/kosagi/novena/novena.h
new file mode 100644
index 000..6613ad4
--- /dev/null
+++ b/board/kosagi/novena/novena.h
@@ -0,0 +1,23 @@
+/*
+ * Novena board support
+ *
+ * Copyright (C) 2014 Marek Vasut ma...@denx.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __BOARD_KOSAGI_NOVENA_NOVENA_H__
+#define __BOARD_KOSAGI_NOVENA_NOVENA_H__
+
+#define NOVENA_AUDIO_PWRON IMX_GPIO_NR(5, 17)
+#define NOVENA_BUTTON_GPIO IMX_GPIO_NR(4, 14)
+#define NOVENA_FPGA_RESET_N_GPIO   IMX_GPIO_NR(5, 7)
+#define NOVENA_HDMI_GHOST_HPD  IMX_GPIO_NR(5, 4)
+#define NOVENA_PCIE_DISABLE_GPIO   IMX_GPIO_NR(2, 16)
+#define NOVENA_PCIE_POWER_ON_GPIO  IMX_GPIO_NR(7, 12)
+#define NOVENA_PCIE_RESET_GPIO IMX_GPIO_NR(3, 29)
+#define NOVENA_PCIE_WAKE_UP_GPIO   IMX_GPIO_NR(3, 22)
+#define NOVENA_SD_CD   IMX_GPIO_NR(1, 4)
+#define NOVENA_SD_WP   IMX_GPIO_NR(1, 2)
+
+#endif /* __BOARD_KOSAGI_NOVENA_NOVENA_H__ */
diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c
index c07735a..5ebc59b 100644
--- a/board/kosagi/novena/novena_spl.c
+++ b/board/kosagi/novena/novena_spl.c
@@ -25,6 +25,8 @@
 
 #include asm/arch/mx6-ddr.h
 
+#include novena.h
+
 DECLARE_GLOBAL_DATA_PTR;
 
 #define UART_PAD_CTRL  \
@@ -68,14 +70,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 
-#define NOVENA_AUDIO_PWRON IMX_GPIO_NR(5, 17)
-#define NOVENA_FPGA_RESET_N_GPIO   IMX_GPIO_NR(5, 7)
-#define NOVENA_HDMI_GHOST_HPD  IMX_GPIO_NR(5, 4)
-#define NOVENA_PCIE_RESET_GPIO IMX_GPIO_NR(3, 29)
-#define NOVENA_PCIE_POWER_ON_GPIO  IMX_GPIO_NR(7, 12)
-#define NOVENA_PCIE_WAKE_UP_GPIO   IMX_GPIO_NR(3, 22)
-#define NOVENA_PCIE_DISABLE_GPIO   IMX_GPIO_NR(2, 16)
-
 /*
  * Audio
  */
-- 
2.1.3

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[U-Boot] [PATCH 3/8] arm: mx6: novena: Define CONFIG_SYS_MALLOC_F_LEN

This board uses setup_i2c() in SPL. The setup_i2c() function internally
calls gpio_request(), which in turn internally calls strdup(). The strdup()
requires a running mallocator, so this patch makes the mallocator available.

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Igor Grinberg grinb...@compulab.co.il
Cc: Nikita Kiryanov nik...@compulab.co.il
Cc: Sean Cross x...@kosagi.com
Cc: Simon Glass s...@chromium.org
Cc: Stefano Babic sba...@denx.de
Cc: Tim Harvey thar...@gateworks.com
---
 include/configs/novena.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/novena.h b/include/configs/novena.h
index 879141a..0f3621a 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -115,6 +115,7 @@
 #define CONFIG_SYS_MEMTEST_END 0x2000
 
 #define CONFIG_SYS_MALLOC_LEN  (64 * 1024 * 1024)
+#define CONFIG_SYS_MALLOC_F_LEN(1  10)
 
 /* SPL */
 #define CONFIG_SPL_FAT_SUPPORT
-- 
2.1.3

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[U-Boot] [PATCH 8/8] arm: mx6: novena: Add proper LVDS display support

Repair the register configuration and add proper support for the
display attached to both LVDS channels.

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Igor Grinberg grinb...@compulab.co.il
Cc: Nikita Kiryanov nik...@compulab.co.il
Cc: Sean Cross x...@kosagi.com
Cc: Simon Glass s...@chromium.org
Cc: Stefano Babic sba...@denx.de
Cc: Tim Harvey thar...@gateworks.com
---
 board/kosagi/novena/novena.c |   8 +
 board/kosagi/novena/novena.h |   8 +
 board/kosagi/novena/novena_spl.c |   7 +
 board/kosagi/novena/video.c  | 400 ---
 include/configs/novena.h |   1 +
 5 files changed, 401 insertions(+), 23 deletions(-)

diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c
index e7a6adb..69f5be3 100644
--- a/board/kosagi/novena/novena.c
+++ b/board/kosagi/novena/novena.c
@@ -173,6 +173,14 @@ int board_init(void)
return 0;
 }
 
+int board_late_init(void)
+{
+#if defined(CONFIG_VIDEO_IPUV3)
+   setup_display_lvds();
+#endif
+   return 0;
+}
+
 int checkboard(void)
 {
puts(Board: Novena 4x\n);
diff --git a/board/kosagi/novena/novena.h b/board/kosagi/novena/novena.h
index 244004d..8f11583 100644
--- a/board/kosagi/novena/novena.h
+++ b/board/kosagi/novena/novena.h
@@ -10,9 +10,12 @@
 #define __BOARD_KOSAGI_NOVENA_NOVENA_H__
 
 #define NOVENA_AUDIO_PWRON IMX_GPIO_NR(5, 17)
+#define NOVENA_BACKLIGHT_PWM_GPIO  IMX_GPIO_NR(4, 29)
+#define NOVENA_BACKLIGHT_PWR_GPIO  IMX_GPIO_NR(4, 15)
 #define NOVENA_BUTTON_GPIO IMX_GPIO_NR(4, 14)
 #define NOVENA_FPGA_RESET_N_GPIO   IMX_GPIO_NR(5, 7)
 #define NOVENA_HDMI_GHOST_HPD  IMX_GPIO_NR(5, 4)
+#define NOVENA_ITE6251_PWR_GPIOIMX_GPIO_NR(5, 28)
 #define NOVENA_PCIE_DISABLE_GPIO   IMX_GPIO_NR(2, 16)
 #define NOVENA_PCIE_POWER_ON_GPIO  IMX_GPIO_NR(7, 12)
 #define NOVENA_PCIE_RESET_GPIO IMX_GPIO_NR(3, 29)
@@ -20,6 +23,11 @@
 #define NOVENA_SD_CD   IMX_GPIO_NR(1, 4)
 #define NOVENA_SD_WP   IMX_GPIO_NR(1, 2)
 
+#define NOVENA_IT6251_I2C_BUS  2
+#define NOVENA_IT6251_CHIPADDR 0x5c
+#define NOVENA_IT6251_LVDSADDR 0x5e
+
 void setup_display_clock(void);
+void setup_display_lvds(void);
 
 #endif /* __BOARD_KOSAGI_NOVENA_NOVENA_H__ */
diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c
index 5ebc59b..b1688e0 100644
--- a/board/kosagi/novena/novena_spl.c
+++ b/board/kosagi/novena/novena_spl.c
@@ -386,6 +386,13 @@ static void novena_spl_setup_iomux_uart(void)
 static iomux_v3_cfg_t hdmi_pads[] = {
/* Ghost HPD pin */
MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL),
+
+   /* LCD_PWR_CTL */
+   MX6_PAD_CSI0_DAT10__GPIO5_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL),
+   /* LCD_BL_ON */
+   MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
+   /* GPIO_PWM1 */
+   MX6_PAD_DISP0_DAT8__GPIO4_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
 };
 
 static void novena_spl_setup_iomux_video(void)
diff --git a/board/kosagi/novena/video.c b/board/kosagi/novena/video.c
index fdcd100..6e9fd7d 100644
--- a/board/kosagi/novena/video.c
+++ b/board/kosagi/novena/video.c
@@ -1,6 +1,10 @@
 /*
  * Novena video output support
  *
+ * IT6251 code based on code Copyright (C) 2014 Sean Cross
+ * from https://github.com/xobs/novena-linux.git commit
+ * 3d85836ee1377d445531928361809612aa0a18db
+ *
  * Copyright (C) 2014 Marek Vasut ma...@denx.de
  *
  * SPDX-License-Identifier:GPL-2.0+
@@ -29,11 +33,275 @@
 
 #include novena.h
 
+#define IT6251_VENDOR_ID_LOW   0x00
+#define IT6251_VENDOR_ID_HIGH  0x01
+#define IT6251_DEVICE_ID_LOW   0x02
+#define IT6251_DEVICE_ID_HIGH  0x03
+#define IT6251_SYSTEM_STATUS   0x0d
+#define IT6251_SYSTEM_STATUS_RINTSTATUS(1  0)
+#define IT6251_SYSTEM_STATUS_RHPDSTATUS(1  1)
+#define IT6251_SYSTEM_STATUS_RVIDEOSTABLE  (1  2)
+#define IT6251_SYSTEM_STATUS_RPLL_IOLOCK   (1  3)
+#define IT6251_SYSTEM_STATUS_RPLL_XPLOCK   (1  4)
+#define IT6251_SYSTEM_STATUS_RPLL_SPLOCK   (1  5)
+#define IT6251_SYSTEM_STATUS_RAUXFREQ_LOCK (1  6)
+#define IT6251_REF_STATE   0x0e
+#define IT6251_REF_STATE_MAIN_LINK_DISABLED(1  0)
+#define IT6251_REF_STATE_AUX_CHANNEL_READ  (1  1)
+#define IT6251_REF_STATE_CR_PATTERN(1  2)
+#define IT6251_REF_STATE_EQ_PATTERN(1  3)
+#define IT6251_REF_STATE_NORMAL_OPERATION  (1  4)
+#define IT6251_REF_STATE_MUTED (1  5)
+
+#define IT6251_REG_PCLK_CNT_LOW0x57
+#define IT6251_REG_PCLK_CNT_HIGH   0x58
+
+#define IT6521_RETRY_MAX   20
+
+static int it6251_is_stable(void)
+{
+   const unsigned int

Re: [U-Boot] [Patch V2 1/3] dfu: mmc: check if mmc device exists in mmc_block_op()

Hi Przemyslaw,

 The function mmc_block_op() is the last function before
 the physicall data write, but the mmc device pointer is not
 checked. If mmc device not exists, then data abort will occur.
 To avoid this, first the mmc device pointer is checked.
 
 Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
 ---
 Change v2:
 - mmc_block_op(): change printf() to error()
 ---
  drivers/dfu/dfu_mmc.c | 8 +++-
  1 file changed, 7 insertions(+), 1 deletion(-)
 
 diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
 index 72fa03e..62d72fe 100644
 --- a/drivers/dfu/dfu_mmc.c
 +++ b/drivers/dfu/dfu_mmc.c
 @@ -40,10 +40,16 @@ static int mmc_access_part(struct dfu_entity
 *dfu, struct mmc *mmc, int part) static int mmc_block_op(enum dfu_op
 op, struct dfu_entity *dfu, u64 offset, void *buf, long *len)
  {
 - struct mmc *mmc = find_mmc_device(dfu-data.mmc.dev_num);
 + struct mmc *mmc;
   u32 blk_start, blk_count, n = 0;
   int ret, part_num_bkp = 0;
  
 + mmc = find_mmc_device(dfu-data.mmc.dev_num);
 + if (!mmc) {
 + error(Device MMC %d - not found!,
 dfu-data.mmc.dev_num);
 + return -ENODEV;
 + }
 +
   /*
* We must ensure that we work in lba_blk_size chunks, so
 ALIGN
* this value.

Applied to u-boot-dfu, thanks!

-- 
Best regards,

Lukasz Majewski

Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [Patch V2 2/3] gadget: f_thor: check pointers before use in download_tail()

Hi Przemyslaw,

 Some pointers in function download_tail() were not checked
 before the use. This could possibly cause the data abort.
 To avoid this, check if the pointers are not null is added.
 
 Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
 ---
 Change v2:
 - download_tail(): change printf() to error()
 ---
  drivers/usb/gadget/f_thor.c | 16 ++--
  1 file changed, 14 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
 index 78519fa..2d0410d 100644
 --- a/drivers/usb/gadget/f_thor.c
 +++ b/drivers/usb/gadget/f_thor.c
 @@ -205,12 +205,24 @@ static long long int download_head(unsigned
 long long total, 
  static int download_tail(long long int left, int cnt)
  {
 - struct dfu_entity *dfu_entity =
 dfu_get_entity(alt_setting_num);
 - void *transfer_buffer = dfu_get_buf(dfu_entity);
 + struct dfu_entity *dfu_entity;
 + void *transfer_buffer;
   int ret;
  
   debug(%s: left: %llu cnt: %d\n, __func__, left, cnt);
  
 + dfu_entity = dfu_get_entity(alt_setting_num);
 + if (!dfu_entity) {
 + error(Alt setting: %d entity not found!\n,
 alt_setting_num);
 + return -ENOENT;
 + }
 +
 + transfer_buffer = dfu_get_buf(dfu_entity);
 + if (!transfer_buffer) {
 + error(Transfer buffer not allocated!);
 + return -ENXIO;
 + }
 +
   if (left) {
   ret = dfu_write(dfu_entity, transfer_buffer, left,
 cnt++); if (ret) {

Applied to u-boot-dfu, thanks!

-- 
Best regards,

Lukasz Majewski

Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [Patch V2 3/3] dfu: dfu_get_buf: check the value of env dfu_bufsiz before use

Hi Przemyslaw,

 In function dfu_get_buf(), the size of allocated buffer could
 be defined by the env variable. The size from this variable
 was passed for memalign() without checking its value.
 And the the memalign will return non null pointer for size 0.
 
 This could possibly cause data abort, so now the value of var
 is checked before use. And if this variable is set to 0 then
 the default size will be used.
 
 This commit also changes the base passed to simple_strtoul()
 to 0. Now decimal and hex values can be used for the variable
 dfu_bufsiz.
 
 Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
 ---
 Change v2:
 - new patch
 ---
  drivers/dfu/dfu.c | 8 ++--
  1 file changed, 6 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
 index c0aba6e..49abd85 100644
 --- a/drivers/dfu/dfu.c
 +++ b/drivers/dfu/dfu.c
 @@ -111,8 +111,12 @@ unsigned char *dfu_get_buf(struct dfu_entity
 *dfu) return dfu_buf;
  
   s = getenv(dfu_bufsiz);
 - dfu_buf_size = s ? (unsigned long)simple_strtol(s, NULL,
 16) :
 - CONFIG_SYS_DFU_DATA_BUF_SIZE;
 + if (s)
 + dfu_buf_size = (unsigned long)simple_strtol(s, NULL,
 0); +
 + if (!s || !dfu_buf_size)
 + dfu_buf_size = CONFIG_SYS_DFU_DATA_BUF_SIZE;
 +
   if (dfu-max_buf_size  dfu_buf_size  dfu-max_buf_size)
   dfu_buf_size = dfu-max_buf_size;
  

Applied to u-boot-dfu, thanks!

-- 
Best regards,

Lukasz Majewski

Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH v4 1/2] disk: part_efi: move code to static functions

Hi Steve,

 Signed-off-by: Steve Rae s...@broadcom.com
 ---
 
 Changes in v4:
 - move common code to static functions
 
 Changes in v3: None
 Changes in v2: None
 
  disk/part_efi.c | 175
 +--- 1 file
 changed, 102 insertions(+), 73 deletions(-)
 
 diff --git a/disk/part_efi.c b/disk/part_efi.c
 index efed58f..2c77f29 100644
 --- a/disk/part_efi.c
 +++ b/disk/part_efi.c
 @@ -69,6 +69,105 @@ static inline int is_bootable(gpt_entry *p)
   sizeof(efi_guid_t));
  }
  
 +static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba,
 + lbaint_t lastlba)
 +{
 + uint32_t crc32_backup = 0;
 + uint32_t calc_crc32;
 +
 + /* Check the GPT header signature */
 + if (le64_to_cpu(gpt_h-signature) != GPT_HEADER_SIGNATURE) {
 + printf(%s signature is wrong: 0x%llX != 0x%llX\n,
 +GUID Partition Table Header,
 +le64_to_cpu(gpt_h-signature),
 +GPT_HEADER_SIGNATURE);
 + return -1;
 + }
 +
 + /* Check the GUID Partition Table CRC */
 + memcpy(crc32_backup, gpt_h-header_crc32,
 sizeof(crc32_backup));
 + memset(gpt_h-header_crc32, 0, sizeof(gpt_h-header_crc32));
 +
 + calc_crc32 = efi_crc32((const unsigned char *)gpt_h,
 + le32_to_cpu(gpt_h-header_size));
 +
 + memcpy(gpt_h-header_crc32, crc32_backup,
 sizeof(crc32_backup)); +
 + if (calc_crc32 != le32_to_cpu(crc32_backup)) {
 + printf(%s CRC is wrong: 0x%x != 0x%x\n,
 +GUID Partition Table Header,
 +le32_to_cpu(crc32_backup), calc_crc32);
 + return -1;
 + }
 +
 + /*
 +  * Check that the my_lba entry points to the LBA that
 contains the GPT
 +  */
 + if (le64_to_cpu(gpt_h-my_lba) != lba) {
 + printf(GPT: my_lba incorrect: %llX !=  LBAF \n,
 +le64_to_cpu(gpt_h-my_lba),
 +lba);
 + return -1;
 + }
 +
 + /*
 +  * Check that the first_usable_lba and that the
 last_usable_lba are
 +  * within the disk.
 +  */
 + if (le64_to_cpu(gpt_h-first_usable_lba)  lastlba) {
 + printf(GPT: first_usable_lba incorrect: %llX  
 LBAF \n,
 +le64_to_cpu(gpt_h-first_usable_lba),
 lastlba);
 + return -1;
 + }
 + if (le64_to_cpu(gpt_h-last_usable_lba)  lastlba) {
 + printf(GPT: last_usable_lba incorrect: %llX  
 LBAF \n,
 +le64_to_cpu(gpt_h-last_usable_lba), lastlba);
 + return -1;
 + }
 +
 + debug(GPT: first_usable_lba: %llX last_usable_lba: %llX
 last lba: 
 +   LBAF \n, le64_to_cpu(gpt_h-first_usable_lba),
 +   le64_to_cpu(gpt_h-last_usable_lba), lastlba);
 +
 + return 0;
 +}
 +
 +static int validate_gpt_entries(gpt_header *gpt_h, gpt_entry *gpt_e)
 +{
 + uint32_t calc_crc32;
 +
 + /* Check the GUID Partition Table Entry Array CRC */
 + calc_crc32 = efi_crc32((const unsigned char *)gpt_e,
 + le32_to_cpu(gpt_h-num_partition_entries) *
 + le32_to_cpu(gpt_h-sizeof_partition_entry));
 +
 + if (calc_crc32 !=
 le32_to_cpu(gpt_h-partition_entry_array_crc32)) {
 + printf(%s: 0x%x != 0x%x\n,
 +GUID Partition Table Entry Array CRC is
 wrong,
 +
 le32_to_cpu(gpt_h-partition_entry_array_crc32),
 +calc_crc32);
 + return -1;
 + }
 +
 + return 0;
 +}
 +
 +static void prepare_backup_gpt_header(gpt_header *gpt_h)
 +{
 + uint32_t calc_crc32;
 + uint64_t val;
 +
 + /* recalculate the values for the Backup GPT Header */
 + val = le64_to_cpu(gpt_h-my_lba);
 + gpt_h-my_lba = gpt_h-alternate_lba;
 + gpt_h-alternate_lba = cpu_to_le64(val);
 + gpt_h-header_crc32 = 0;
 +
 + calc_crc32 = efi_crc32((const unsigned char *)gpt_h,
 +le32_to_cpu(gpt_h-header_size));
 + gpt_h-header_crc32 = cpu_to_le32(calc_crc32);
 +}
 +
  #ifdef CONFIG_EFI_PARTITION
  /*
   * Public Functions (include/part.h)
 @@ -259,7 +358,6 @@ int write_gpt_table(block_dev_desc_t *dev_desc,
   const int pte_blk_cnt =
 BLOCK_CNT((gpt_h-num_partition_entries
  * sizeof(gpt_entry)),
 dev_desc); u32 calc_crc32;
 - u64 val;
  
   debug(max lba: %x\n, (u32) dev_desc-lba);
   /* Setup the Protective MBR */
 @@ -284,15 +382,7 @@ int write_gpt_table(block_dev_desc_t *dev_desc,
   != pte_blk_cnt)
   goto err;
  
 - /* recalculate the values for the Backup GPT Header */
 - val = le64_to_cpu(gpt_h-my_lba);
 - gpt_h-my_lba = gpt_h-alternate_lba;
 - gpt_h-alternate_lba = cpu_to_le64(val);
 - gpt_h-header_crc32 = 0;
 -
 - calc_crc32 = efi_crc32((const unsigned char *)gpt_h,
 -   le32_to_cpu(gpt_h-header_size));
 - gpt_h-header_crc32 = cpu_to_le32(calc_crc32);
 +

Re: [U-Boot] [PATCH v4 2/2] fastboot: handle flash write to GPT partitions

Hi Steve,

 Implement a feature to allow fastboot to write the downloaded image
 to the space reserved for the Protective MBR and the Primary GUID
 Partition Table.
 Additionally, prepare and write the Backup GUID Partition Table.
 
 Signed-off-by: Steve Rae s...@broadcom.com
 ---
 
 Changes in v4:
 fix bug with partition_entry_lba in Backup GPT
 use common static functions
 
 Changes in v3:
 - prefer leXX_to_cpu() over cpu_to_leXX()
 - enhance calculation of pointer to GPT Entries
 - prepare and write the Backup GPT
(requested by: Lukasz Majewski l.majew...@samsung.com)
 
 Changes in v2:
 add validation of the GPT before writing to flash
 (suggested by: Lukasz Majewski l.majew...@samsung.com)
 
  README  |  9 ++
  common/fb_mmc.c | 26 ++--
  disk/part_efi.c | 93
 +
 include/part.h  | 20 + 4 files changed, 145
 insertions(+), 3 deletions(-)
 
 diff --git a/README b/README
 index 4ca04d0..42ece99 100644
 --- a/README
 +++ b/README
 @@ -1773,6 +1773,15 @@ The following options need to be configured:
   regarding the non-volatile storage device. Define
 this to the eMMC device that fastboot should use to store the image.
  
 + CONFIG_FASTBOOT_GPT_NAME
 + The fastboot flash command supports writing the
 downloaded
 + image to the Protective MBR and the Primary GUID
 Partition
 + Table. (Additionally, this downloaded image is
 post-processed
 + to generate and write the Backup GUID Partition
 Table.)
 + This occurs when the specified partition name on
 the
 + fastboot flash command line matches this value.
 + Default is GPT_ENTRY_NAME (currently gpt) if
 undefined. +
  - Journaling Flash filesystem support:
   CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF,
 CONFIG_JFFS2_NAND_SIZE, CONFIG_JFFS2_NAND_DEV
 diff --git a/common/fb_mmc.c b/common/fb_mmc.c
 index fb06d8a..6ea3938 100644
 --- a/common/fb_mmc.c
 +++ b/common/fb_mmc.c
 @@ -4,12 +4,17 @@
   * SPDX-License-Identifier:  GPL-2.0+
   */
  
 +#include config.h
  #include common.h
  #include fb_mmc.h
  #include part.h
  #include aboot.h
  #include sparse_format.h
  
 +#ifndef CONFIG_FASTBOOT_GPT_NAME
 +#define CONFIG_FASTBOOT_GPT_NAME GPT_ENTRY_NAME
 +#endif
 +
  /* The 64 defined bytes plus the '\0' */
  #define RESPONSE_LEN (64 + 1)
  
 @@ -62,7 +67,6 @@ static void write_raw_image(block_dev_desc_t
 *dev_desc, disk_partition_t *info, void fb_mmc_flash_write(const char
 *cmd, void *download_buffer, unsigned int download_bytes, char
 *response) {
 - int ret;
   block_dev_desc_t *dev_desc;
   disk_partition_t info;
  
 @@ -76,8 +80,24 @@ void fb_mmc_flash_write(const char *cmd, void
 *download_buffer, return;
   }
  
 - ret = get_partition_info_efi_by_name(dev_desc, cmd, info);
 - if (ret) {
 + if (strcmp(cmd, CONFIG_FASTBOOT_GPT_NAME) == 0) {
 + printf(%s: updating MBR, Primary and Backup
 GPT(s)\n,
 +__func__);
 + if (is_valid_gpt_buf(dev_desc, download_buffer)) {
 + printf(%s: invalid GPT - refusing to write
 to flash\n,
 +__func__);
 + fastboot_fail(invalid GPT partition);
 + return;
 + }
 + if (write_mbr_and_gpt_partitions(dev_desc,
 download_buffer)) {
 + printf(%s: writing GPT partitions
 failed\n, __func__);
 + fastboot_fail(writing GPT partitions
 failed);
 + return;
 + }
 + printf( success\n);
 + fastboot_okay();
 + return;
 + } else if (get_partition_info_efi_by_name(dev_desc, cmd,
 info)) { error(cannot find partition: '%s'\n, cmd);
   fastboot_fail(cannot find partition);
   return;
 diff --git a/disk/part_efi.c b/disk/part_efi.c
 index 2c77f29..338010e 100644
 --- a/disk/part_efi.c
 +++ b/disk/part_efi.c
 @@ -161,6 +161,8 @@ static void prepare_backup_gpt_header(gpt_header
 *gpt_h) val = le64_to_cpu(gpt_h-my_lba);
   gpt_h-my_lba = gpt_h-alternate_lba;
   gpt_h-alternate_lba = cpu_to_le64(val);
 + gpt_h-partition_entry_lba =
 +
 cpu_to_le64(le64_to_cpu(gpt_h-last_usable_lba) + 1);
 gpt_h-header_crc32 = 0; 
   calc_crc32 = efi_crc32((const unsigned char *)gpt_h,
 @@ -545,6 +547,97 @@ err:
   free(gpt_h);
   return ret;
  }
 +
 +int is_valid_gpt_buf(block_dev_desc_t *dev_desc, void *buf)
 +{
 + gpt_header *gpt_h;
 + gpt_entry *gpt_e;
 +
 + /* determine start of GPT Header in the buffer */
 + gpt_h = buf + (GPT_PRIMARY_PARTITION_TABLE_LBA *
 +dev_desc-blksz);
 + if (validate_gpt_header(gpt_h,
 GPT_PRIMARY_PARTITION_TABLE_LBA,
 + dev_desc-lba))
 + return -1;
 +
 + /* determine start of GPT Entries in the buffer */
 +

Re: [U-Boot] Falcon mode boot support

On Tue, Dec 16, 2014 at 12:58:33PM -, Andy Pont wrote:
 Hi Tom,
 
  How big is the args file?  We default to placing the args at 0x8800
  in ti_am335x_common.h (see CONFIG_SYS_SPL_ARGS_ADDR) to make sure that
  we don't have an overlap between the DT and the kernel which is quite
  possible with a reasonably sized DT and placing it at 0x8100.
 
 Changing the CONFIG_SYS_SPL_ARGS_ADDR to be the same as the value in the ti_
 am335x_common.h header file seems to have fixed the issue.
 
 Unfortunately it hasn't improved the boot time by much - the bulk of the
 time seems to be in reading and decompressing the kernel from SPI flash
 device (Spansion S25FL164).  The only other storage medium on the board is
 an eMMC flash device - would putting the kernel in there give a faster boot
 time?

eMMC is likely to be faster, yes.  You may also want to see what can be
trimmed from the kernel binary, in either case, and if going with an
uncompressed kernel ends up being quicker.

-- 
Tom


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Re: [U-Boot] [PATCH] arm: socfpga: board: Repair Micrel PHY tuning

On Thursday, December 11, 2014 at 06:06:31 PM, Marek Vasut wrote:
 From: Pavel Machek pa...@denx.de

 Add proper error checking into the PHY tuning patch. Make the PHY tunning
 only happen in case the KSZ9021 PHY is enabled in config. Call the config
 callback after the tuning finished.

 Signed-off-by: Marek Vasut ma...@denx.de
 Cc: Chin Liang See cl...@opensource.altera.com
 Cc: Dinh Nguyen dingu...@opensource.altera.com
 Cc: Tom Rini tr...@ti.com
 Cc: Pavel Machek pa...@denx.de

Applied, thanks.

Best regards,
Marek Vasut
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Re: [U-Boot] [PULL] u-boot-socfpga/master

The following changes since commit 97cdf64026c7d749dd7a5c0dbaba7a60a7292ac9:

  Merge branch 'sandbox' of git://git.denx.de/u-boot-x86 (2014-12-04 09:24:05 
-0500)

are available in the git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 065496d1b5304a6a67b366b613c3504aab2e2dbd:

  arm: socfpga: board: Repair Micrel PHY tuning (2014-12-16 15:32:14 +0100)


Dinh Nguyen (3):
  arm: socfpga: set skew settings for ethernet phy
  socfpga: add missing struct member fifo_triple_byte
  socfpga: correctly increment freeze_controller_base address

Pavel Machek (1):
  arm: socfpga: board: Repair Micrel PHY tuning

Stefan Roese (15):
  arm: socfpga: Add myself as maintainer for the SoCrates board
  arm: socfpga: dts: Move to SPDX license identifiers
  spi: Add Cadence QSPI DM driver used by SoCFPGA
  arm: socfpga: dts: Add Cadence QSPI DT node to socfpga.dtsi
  arm: socfpga: dts: Add spi0 alias for Cadence QSPI driver
  arm: socfpga: Add Cadence QSPI support to config header
  spi: Add designware master SPI DM driver used on SoCFPGA
  arm: socfpga: dts: Add spi0/1 dts nodes for the Designware master SPI 
devices
  arm: socfpga: dts: socrates: Add spi1/2 aliases needed DM SPI probing
  arm: socfpga: Add Designware (DW) SPI support to config header
  arm: socfpga: dts: altr,rst-mgr.h: Move to SPDX license identifiers
  arm: socfpga: Use only one clrbits_le32 call to deassert SPI reset bits
  arm: socfpga: Add missing DW master SPI clock prototyp to clock_manager.h
  spi: designware_spi: Some fixes / changes
  arm: socfpga: DW_SPI: Remove clock info from config header

 arch/arm/cpu/armv7/socfpga/freeze_controller.c|   6 +-
 arch/arm/cpu/armv7/socfpga/reset_manager.c|   4 +-
 arch/arm/dts/socfpga.dtsi |  56 --
 arch/arm/dts/socfpga_cyclone5.dtsi|  13 +-
 arch/arm/dts/socfpga_cyclone5_socrates.dts|  39 ++--
 arch/arm/include/asm/arch-socfpga/clock_manager.h |   1 +
 arch/arm/include/asm/arch-socfpga/freeze_controller.h |   1 -
 arch/arm/include/asm/arch-socfpga/scan_manager.h  |   1 +
 board/altera/socfpga/MAINTAINERS  |   5 +
 board/altera/socfpga/socfpga_cyclone5.c   |  38 
 drivers/spi/Makefile  |   2 +
 drivers/spi/cadence_qspi.c| 345 

 drivers/spi/cadence_qspi.h|  76 
 drivers/spi/cadence_qspi_apb.c| 898 

 drivers/spi/designware_spi.c  | 426 

 include/configs/socfpga_common.h  |  33 +++-
 include/dt-bindings/reset/altr,rst-mgr.h  |   9 +-
 17 files changed, 1901 insertions(+), 52 deletions(-)
 create mode 100644 drivers/spi/cadence_qspi.c
 create mode 100644 drivers/spi/cadence_qspi.h
 create mode 100644 drivers/spi/cadence_qspi_apb.c
 create mode 100644 drivers/spi/designware_spi.c
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[U-Boot] [PATCH 2/2] mtd: nand: mxs: fix PIO_WORDs in mxs_nand_write_buf()

There is only one pio_word in this DMA transaction so data field must be 1.

Signed-off-by: Luca Ellero luca.ell...@brickedbrain.com
---
 drivers/mtd/nand/mxs_nand.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index d17e0d0..428a250 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -510,7 +510,7 @@ static void mxs_nand_write_buf(struct mtd_info *mtd, const 
uint8_t *buf,
d-cmd.data =
MXS_DMA_DESC_COMMAND_DMA_READ | MXS_DMA_DESC_IRQ |
MXS_DMA_DESC_DEC_SEM | MXS_DMA_DESC_WAIT4END |
-   (4  MXS_DMA_DESC_PIO_WORDS_OFFSET) |
+   (1  MXS_DMA_DESC_PIO_WORDS_OFFSET) |
(length  MXS_DMA_DESC_BYTES_OFFSET);
 
d-cmd.address = (dma_addr_t)nand_info-data_buf;
-- 
1.7.10.4

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[U-Boot] [PATCH 1/2] mtd: nand: mxs: fix PIO_WORDs in mxs_nand_read_buf()

There is only one pio_word in this DMA transaction so data field must be 1.

Signed-off-by: Luca Ellero luca.ell...@brickedbrain.com
---
 drivers/mtd/nand/mxs_nand.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 616c9ca..d17e0d0 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -453,7 +453,7 @@ static void mxs_nand_read_buf(struct mtd_info *mtd, uint8_t 
*buf, int length)
d-cmd.data =
MXS_DMA_DESC_COMMAND_NO_DMAXFER | MXS_DMA_DESC_IRQ |
MXS_DMA_DESC_NAND_WAIT_4_READY | MXS_DMA_DESC_DEC_SEM |
-   MXS_DMA_DESC_WAIT4END | (4  MXS_DMA_DESC_PIO_WORDS_OFFSET);
+   MXS_DMA_DESC_WAIT4END | (1  MXS_DMA_DESC_PIO_WORDS_OFFSET);
 
d-cmd.address = 0;
 
-- 
1.7.10.4

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[U-Boot] [PATCH 0/2] mtd: nand: mxs: fix PIO_WORD number

In this driver, the CMDPIOWORDS field doesn't always reflect the real number of
pio_words sent in the actual DMA transfer (see iMX6 Reference Manual, Ch. 14.2)
This patchset fixes them.

Luca Ellero (2):
  mtd: nand: mxs: fix PIO_WORDs in mxs_nand_read_buf()
  mtd: nand: mxs: fix PIO_WORDs in mxs_nand_write_buf()

 drivers/mtd/nand/mxs_nand.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

-- 
1.7.10.4

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Re: [U-Boot] Falcon mode boot support

2014-12-16 Thread Andy Pont

Hi Tom,

 eMMC is likely to be faster, yes.  You may also want to see what can be
 trimmed from the kernel binary, in either case, and if going with an
 uncompressed kernel ends up being quicker.

There are I think two issues going on here one with decompression time
which, as you say, I can resolve by using an uncompressed kernel.  The other
is with the SPI transfer time and some testing has shown that if I boot to
U-Boot and then run:

U-Boot time sf read ${loadaddr} 0x20 ${loadsize}

I get the following back:

SF: 2541352 bytes @ 0x20 Read: OK
time: 2.447 seconds

The Spansion datasheet states that in read mode it can transfer 6.25Mbytes/s
in standard read mode at 50MHz clock.  I have the clock at 40MHz as the
device on the other SPI interface won't support anything faster.

When I tested this on the Starter Kit reference board and again on the
target hardware I had to increase the value of SPI_WAIT_TIMEOUT in
driver/spi/omap3_spi.c from 300 by adding an extra '0' in order to stop
getting read failures with sf read commands with more than about 2MB of
data as per the discussion on the TI E2E community here:
http://e2e.ti.com/support/arm/sitara_arm/f/791/p/366019/1293837.aspx#1293837
.

Regards,

Andy.



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Re: [U-Boot] [PATCH] USB: gadget: atmel_usba_udc: fix transfer hang issue

On Monday, December 15, 2014 at 11:12:47 AM, Bo Shen wrote:
 When receive data, the RXRDY in status register set by hardware
 after a new packet has been stored in the endpoint FIFO. After,
 we copy from FIFO, we clear it, make the FIFO can be accessed
 again.
 In the receive_data() function, this bit RXRDY has been cleared.
 So, after the receive_data() function return, this bit should
 not be cleared again, or else it will cause the accessing FIFO
 corrupt, which will make the data loss.
 
 Signed-off-by: Bo Shen voice.s...@atmel.com

Applied, thanks!

Best regards,
Marek Vasut
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Re: [U-Boot] [Patch V2 3/3] dfu: dfu_get_buf: check the value of env dfu_bufsiz before use

On Tuesday, December 16, 2014 at 02:48:46 PM, Lukasz Majewski wrote:
[...]
 Applied to u-boot-dfu, thanks!

Hi,

Will you have any PR for me for this MW please ? If so, when ?

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 0/2] mtd: nand: mxs: fix PIO_WORD number

On Tuesday, December 16, 2014 at 03:36:13 PM, Luca Ellero wrote:
 In this driver, the CMDPIOWORDS field doesn't always reflect the real
 number of pio_words sent in the actual DMA transfer (see iMX6 Reference
 Manual, Ch. 14.2) This patchset fixes them.
 
 Luca Ellero (2):
   mtd: nand: mxs: fix PIO_WORDs in mxs_nand_read_buf()
   mtd: nand: mxs: fix PIO_WORDs in mxs_nand_write_buf()
 
  drivers/mtd/nand/mxs_nand.c |4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

Technically, this all makes sense. I see no reason to oppose this series,
even if there really was no explicit bug in the first place.

Acked-by: Marek Vasut ma...@denx.de

Thank you for fixing this!

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/8] imx: i2c: Zap unnecessary malloc() calls

2014-12-16 Thread Christian Gmeiner

2014-12-16 14:09 GMT+01:00 Marek Vasut ma...@denx.de:
 The malloc() calls are unnecessary, just allocate the stuff on stack.
 While at it, reorder the code a little, so that only one variable is
 used for the text, use snprintf() instead of sprintf() and use %01d
 as a formatting string to avoid any possible overflows.

 Signed-off-by: Marek Vasut ma...@denx.de
 Cc: Igor Grinberg grinb...@compulab.co.il
 Cc: Nikita Kiryanov nik...@compulab.co.il
 Cc: Sean Cross x...@kosagi.com
 Cc: Simon Glass s...@chromium.org
 Cc: Stefano Babic sba...@denx.de
 Cc: Tim Harvey thar...@gateworks.com
 ---
  arch/arm/imx-common/i2c-mxv7.c | 24 
  1 file changed, 8 insertions(+), 16 deletions(-)

 diff --git a/arch/arm/imx-common/i2c-mxv7.c b/arch/arm/imx-common/i2c-mxv7.c
 index 34f5387..1a632e7 100644
 --- a/arch/arm/imx-common/i2c-mxv7.c
 +++ b/arch/arm/imx-common/i2c-mxv7.c
 @@ -73,26 +73,21 @@ static void * const i2c_bases[] = {
  int setup_i2c(unsigned i2c_index, int speed, int slave_addr,
   struct i2c_pads_info *p)
  {
 -   char *name1, *name2;
 +   char name[9];
 int ret;

 if (i2c_index = ARRAY_SIZE(i2c_bases))
 return -EINVAL;

 -   name1 = malloc(9);
 -   name2 = malloc(9);
 -   if (!name1 || !name2)
 -   return -ENOMEM;
 -
 -   sprintf(name1, i2c_sda%d, i2c_index);
 -   sprintf(name2, i2c_scl%d, i2c_index);
 -   ret = gpio_request(p-sda.gp, name1);
 +   snprintf(name, sizeof(name), i2c_sda%01d, i2c_index);
 +   ret = gpio_request(p-sda.gp, name);
 if (ret)
 -   goto err_req1;
 +   return ret;

 -   ret = gpio_request(p-scl.gp, name2);
 +   snprintf(name, sizeof(name), i2c_scl%01d, i2c_index);
 +   ret = gpio_request(p-scl.gp, name);
 if (ret)
 -   goto err_req2;
 +   goto err_req;

 /* Enable i2c clock */
 ret = enable_i2c_clk(1, i2c_index);
 @@ -112,11 +107,8 @@ int setup_i2c(unsigned i2c_index, int speed, int 
 slave_addr,
  err_idle:
  err_clk:
 gpio_free(p-scl.gp);
 -err_req2:
 +err_req:
 gpio_free(p-sda.gp);
 -err_req1:
 -   free(name1);
 -   free(name2);

 return ret;
  }
 --
 2.1.3


Reviewed-by: Christian Gmeiner christian.gmei...@gmail.com
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Re: [U-Boot] [Patch V2 3/3] dfu: dfu_get_buf: check the value of env dfu_bufsiz before use

Hi Marek,

 On Tuesday, December 16, 2014 at 02:48:46 PM, Lukasz Majewski wrote:
 [...]
  Applied to u-boot-dfu, thanks!
 
 Hi,
 
 Will you have any PR for me for this MW please ? If so, when ?

Some fixes and clean ups I hope. By the end of current week.

 
 Best regards,
 Marek Vasut



-- 
Best regards,

Lukasz Majewski

Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH 8/8] arm: mx6: novena: Add proper LVDS display support

Hi Marek,

On 16 December 2014 at 06:09, Marek Vasut ma...@denx.de wrote:
 Repair the register configuration and add proper support for the
 display attached to both LVDS channels.

 Signed-off-by: Marek Vasut ma...@denx.de
 Cc: Igor Grinberg grinb...@compulab.co.il
 Cc: Nikita Kiryanov nik...@compulab.co.il
 Cc: Sean Cross x...@kosagi.com
 Cc: Simon Glass s...@chromium.org
 Cc: Stefano Babic sba...@denx.de
 Cc: Tim Harvey thar...@gateworks.com
 ---
  board/kosagi/novena/novena.c |   8 +
  board/kosagi/novena/novena.h |   8 +
  board/kosagi/novena/novena_spl.c |   7 +
  board/kosagi/novena/video.c  | 400 
 ---
  include/configs/novena.h |   1 +
  5 files changed, 401 insertions(+), 23 deletions(-)

Could perhaps move the board to driver model for I2C.

Regards,
Simon
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Re: [U-Boot] [PATCH 2/2] image: Enable OpenRTOS booting via fitImage

On 16 December 2014 at 06:07, Marek Vasut ma...@denx.de wrote:
 Allow booting the OpenRTOS payloads via fitImage image type.

 Signed-off-by: Marek Vasut ma...@denx.de
 Cc: Simon Glass s...@chromium.org
 Cc: Tom Rini tr...@ti.com
 ---
  common/image-fit.c | 10 --
  1 file changed, 8 insertions(+), 2 deletions(-)

Reviewed-by: Simon Glass s...@chromium.org
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Re: [U-Boot] [PATCH 1/8] imx: i2c: Zap unnecessary malloc() calls

Hi Marek,

On 16 December 2014 at 06:09, Marek Vasut ma...@denx.de wrote:
 The malloc() calls are unnecessary, just allocate the stuff on stack.
 While at it, reorder the code a little, so that only one variable is
 used for the text, use snprintf() instead of sprintf() and use %01d
 as a formatting string to avoid any possible overflows.

 Signed-off-by: Marek Vasut ma...@denx.de
 Cc: Igor Grinberg grinb...@compulab.co.il
 Cc: Nikita Kiryanov nik...@compulab.co.il
 Cc: Sean Cross x...@kosagi.com
 Cc: Simon Glass s...@chromium.org
 Cc: Stefano Babic sba...@denx.de
 Cc: Tim Harvey thar...@gateworks.com
 ---
  arch/arm/imx-common/i2c-mxv7.c | 24 
  1 file changed, 8 insertions(+), 16 deletions(-)

 diff --git a/arch/arm/imx-common/i2c-mxv7.c b/arch/arm/imx-common/i2c-mxv7.c
 index 34f5387..1a632e7 100644
 --- a/arch/arm/imx-common/i2c-mxv7.c
 +++ b/arch/arm/imx-common/i2c-mxv7.c
 @@ -73,26 +73,21 @@ static void * const i2c_bases[] = {
  int setup_i2c(unsigned i2c_index, int speed, int slave_addr,
   struct i2c_pads_info *p)
  {
 -   char *name1, *name2;
 +   char name[9];
 int ret;

 if (i2c_index = ARRAY_SIZE(i2c_bases))
 return -EINVAL;

 -   name1 = malloc(9);
 -   name2 = malloc(9);
 -   if (!name1 || !name2)
 -   return -ENOMEM;
 -
 -   sprintf(name1, i2c_sda%d, i2c_index);
 -   sprintf(name2, i2c_scl%d, i2c_index);
 -   ret = gpio_request(p-sda.gp, name1);
 +   snprintf(name, sizeof(name), i2c_sda%01d, i2c_index);
 +   ret = gpio_request(p-sda.gp, name);

Does this board use driver model? If not it should be easy to convert
since one MX6 board supports it. With driver model there is
gpio_requestf(i2c_sda%01d, i2c_index);

 if (ret)
 -   goto err_req1;
 +   return ret;

 -   ret = gpio_request(p-scl.gp, name2);
 +   snprintf(name, sizeof(name), i2c_scl%01d, i2c_index);
 +   ret = gpio_request(p-scl.gp, name);
 if (ret)
 -   goto err_req2;
 +   goto err_req;

 /* Enable i2c clock */
 ret = enable_i2c_clk(1, i2c_index);
 @@ -112,11 +107,8 @@ int setup_i2c(unsigned i2c_index, int speed, int 
 slave_addr,
  err_idle:
  err_clk:
 gpio_free(p-scl.gp);
 -err_req2:
 +err_req:
 gpio_free(p-sda.gp);
 -err_req1:
 -   free(name1);
 -   free(name2);

 return ret;
  }
 --
 2.1.3


Regards,
Simon
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Re: [U-Boot] [PATCH 1/2] image: bootm: Add OpenRTOS image type

On 16 December 2014 at 06:07, Marek Vasut ma...@denx.de wrote:
 Add separate image type for the Wittenstein OpenRTOS .

 Signed-off-by: Marek Vasut ma...@denx.de
 Cc: Simon Glass s...@chromium.org
 Cc: Tom Rini tr...@ti.com
 ---
  common/bootm_os.c | 29 +
  common/image.c|  4 
  include/image.h   |  1 +
  3 files changed, 34 insertions(+)

Reviewed-by: Simon Glass s...@chromium.org
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Re: [U-Boot] [PATCH v2 5/6] x86: Correct problems in the microcode loading

Hi Bin,

On 16 December 2014 at 02:41, Bin Meng bmeng...@gmail.com wrote:
 Hi Simon,

 On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass s...@chromium.org wrote:
 There are several problems in the code. The device tree decode is incorrect
 in ways that are masked due to a matching bug. Both are fixed. Also
 microcode_read_rev() should be inline and called before the microcode is
 written.

 Note: microcode writing does not work correctly on ivybridge for me. Further
 work is needed to resolve this. But this patch tidies up the existing code
 so that will be easier.

 Yep, I noticed that with the new microcode.dtsi generated from the
 microcode tool, the endianness is different from previous ivybridge
 one. I think the new one is correct due to dts is using big-endian
 while IA processor is little-endian. I just wonder why previous dtsi
 could work on ivybridge? And now since we are using little-endian so
 we should decode dts using little-endian too. Is this endianness issue
 that causes the microcode writing does not work on ivybridge?

I think what happened is that I originally tested an early version of
the code (perhaps before device tree), but because the error handling
was broken I did not notice when it started failing, perhaps due to
something unrelated. I'll get back to looking at it again sometime but
for now I'm a bit stuck.

[snip]

Regards,
Simon
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Re: [U-Boot] [PATCH v2 1/6] x86: Add a script to process Intel microcode files

Hi Bin,

On 16 December 2014 at 01:04, Bin Meng bmeng...@gmail.com wrote:
 Hi Simon,

 On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass s...@chromium.org wrote:
 Intel delivers microcode updates in a microcode.dat file which must be
 split up into individual files for each CPU. Add a tool which performs
 this task. It can list available microcode updates for each model and
 produce a new microcode update in U-Boot's .dtsi format.

 Signed-off-by: Simon Glass s...@chromium.org
 ---

 Changes in v2:
 - Add function comments
 - Fix problem with specifying the full microcode filename
 - Allow 'list' command to display a list of matching microcode chunks
 - Print a message when generating microcode
 - Expand the help a little
 - Print an error when an ambiguous microcode model is given

  tools/microcode-tool|   1 +
  tools/microcode-tool.py | 245 
 
  2 files changed, 246 insertions(+)
  create mode 12 tools/microcode-tool
  create mode 100755 tools/microcode-tool.py

 diff --git a/tools/microcode-tool b/tools/microcode-tool
 new file mode 12
 index 000..8be8507
 --- /dev/null
 +++ b/tools/microcode-tool
 @@ -0,0 +1 @@
 +microcode-tool.py
 \ No newline at end of file
 diff --git a/tools/microcode-tool.py b/tools/microcode-tool.py
 new file mode 100755
 index 000..5dbb0db
 --- /dev/null
 +++ b/tools/microcode-tool.py
 @@ -0,0 +1,245 @@
 +#!/usr/bin/env python
 +#
 +# Copyright (c) 2014 Google, Inc
 +#
 +# SPDX-License-Identifier:  GPL-2.0+
 +#
 +#
 +# Intel microcode update tool
 +
 +from optparse import OptionParser
 +import os
 +import re
 +import struct
 +import sys
 +
 +MICROCODE_DIR = 'arch/x86/dts/microcode'
 +
 +class Microcode:
 +Holds information about the microcode for a particular model of CPU.
 +
 +Attributes:
 +name:  Name of the CPU this microcode is for, including any version
 +   information (e.g. 'm12206a7_0029')
 +model: Model code string (this is cpuid(1).eax, e.g. '206a7')
 +words: List of hex words containing the microcode. The first 16 
 words
 +   are the public header.
 +
 +def __init__(self, name, data):
 +self.name = name
 +# Convert data into a list of hex words
 +self.words = []
 +for value in ''.join(data).split(','):
 +hexval = value.strip()
 +if hexval:
 +self.words.append(int(hexval, 0))
 +
 +# The model is in the 4rd hex word
 +self.model = '%x' % self.words[3]
 +
 +def ParseFile(fname):
 +Parse a micrcode.dat file and return the component parts
 +
 +Args:
 +fname: Filename to parse
 +Returns:
 +3-Tuple:
 +date:   String containing date from the file's header
 +license:List of text lines for the license file
 +microcodes: List of Microcode objects from the file
 +
 +re_date = re.compile('/\* *(.* [0-9]{4}) *\*/$')
 +re_license = re.compile('/[^-*+] *(.*)$')
 +re_name = re.compile('/\* *(.*)\.inc *\*/', re.IGNORECASE)
 +microcodes = {}
 +license = []
 +date = ''
 +data = []
 +name = None
 +with open(fname) as fd:
 +for line in fd:
 +line = line.rstrip()
 +m_date = re_date.match(line)
 +m_license = re_license.match(line)
 +m_name = re_name.match(line)
 +if m_name:
 +if name:
 +microcodes[name] = Microcode(name, data)
 +name = m_name.group(1).lower()
 +data = []
 +elif m_license:
 +license.append(m_license.group(1))
 +elif m_date:
 +date = m_date.group(1)
 +else:
 +data.append(line)
 +if name:
 +microcodes[name] = Microcode(name, data)
 +return date, license, microcodes
 +
 +def List(date, microcodes, model):
 +List the available microcode chunks
 +
 +Args:
 +date:   Date of the microcode file
 +microcodes: Dict of Microcode objects indexed by name
 +model:  Model string to search for, or None
 +
 +print 'Date: %s' % date
 +if model:
 +mcode_list, tried = FindMicrocode(microcodes, model.lower())
 +print 'Matching models %s:' % (', '.join(tried))
 +else:
 +print 'All models:'
 +mcode_list = [microcodes[m] for m in microcodes.keys()]
 +for mcode in mcode_list:
 +print '%-20s: model %s' % (mcode.name, mcode.model)
 +
 +def FindMicrocode(microcodes, model):
 +Find all the microcode chunks which match the given model.
 +
 +This model is something like 306a9 (the value returned in eax from
 +cpuid(1) when running on Intel CPUs). But we allow a partial match,
 +omitting the last 1 or two characters to allow many families to have the
 +same microcode.
 +
 +If the model name is ambiguous

Re: [U-Boot] [PATCH] powerpc/913x: Add config flag for bootdelay

On 12/16/2014 02:55 AM, Rai Harninder-B01044 wrote:
 I am not sure I followed you completely but if I just use CONFIG_BOOTDELAY 
 then
 I get the following compilation error
 
  
 
 common/autoboot.c: In function 'bootdelay_process':
 
 common/autoboot.c:247:68: error: expected expression before ';' token
 
  
 
 Is there something which I am missing?
 

I am guessing you has some extra character for the CONFIG_BOOTDELAY. Anyway,
since you are on this line common/autoboot.c:247, you can see the bootdelay
variable one line above. Your purpose of adding delay to boot is easily
implemented by these command under u-boot

setenv bootdelay 10
saveenv

There is no need to change the code for this purpose.

York


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Re: [U-Boot] [PATCH 8/8] arm: mx6: novena: Add proper LVDS display support

On Tuesday, December 16, 2014 at 05:22:31 PM, Simon Glass wrote:
 Hi Marek,

 On 16 December 2014 at 06:09, Marek Vasut ma...@denx.de wrote:
  Repair the register configuration and add proper support for the
  display attached to both LVDS channels.

  Signed-off-by: Marek Vasut ma...@denx.de
  Cc: Igor Grinberg grinb...@compulab.co.il
  Cc: Nikita Kiryanov nik...@compulab.co.il
  Cc: Sean Cross x...@kosagi.com
  Cc: Simon Glass s...@chromium.org
  Cc: Stefano Babic sba...@denx.de
  Cc: Tim Harvey thar...@gateworks.com
  ---

   board/kosagi/novena/novena.c |   8 +
   board/kosagi/novena/novena.h |   8 +
   board/kosagi/novena/novena_spl.c |   7 +
   board/kosagi/novena/video.c  | 400
   --- include/configs/novena.h   
|   1 +
   5 files changed, 401 insertions(+), 23 deletions(-)

 Could perhaps move the board to driver model for I2C.

That's the plan, not only this one, but SoCFPGA in general and all the DENX 
boards.

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/8] imx: i2c: Zap unnecessary malloc() calls

On Tuesday, December 16, 2014 at 05:27:53 PM, Simon Glass wrote:
 Hi Marek,
 
 On 16 December 2014 at 06:09, Marek Vasut ma...@denx.de wrote:
  The malloc() calls are unnecessary, just allocate the stuff on stack.
  While at it, reorder the code a little, so that only one variable is
  used for the text, use snprintf() instead of sprintf() and use %01d
  as a formatting string to avoid any possible overflows.
  
  Signed-off-by: Marek Vasut ma...@denx.de
  Cc: Igor Grinberg grinb...@compulab.co.il
  Cc: Nikita Kiryanov nik...@compulab.co.il
  Cc: Sean Cross x...@kosagi.com
  Cc: Simon Glass s...@chromium.org
  Cc: Stefano Babic sba...@denx.de
  Cc: Tim Harvey thar...@gateworks.com
  ---
  
   arch/arm/imx-common/i2c-mxv7.c | 24 
   1 file changed, 8 insertions(+), 16 deletions(-)
  
  diff --git a/arch/arm/imx-common/i2c-mxv7.c
  b/arch/arm/imx-common/i2c-mxv7.c index 34f5387..1a632e7 100644
  --- a/arch/arm/imx-common/i2c-mxv7.c
  +++ b/arch/arm/imx-common/i2c-mxv7.c
  @@ -73,26 +73,21 @@ static void * const i2c_bases[] = {
  
   int setup_i2c(unsigned i2c_index, int speed, int slave_addr,
   
struct i2c_pads_info *p)
   
   {
  
  -   char *name1, *name2;
  +   char name[9];
  
  int ret;
  
  if (i2c_index = ARRAY_SIZE(i2c_bases))
  
  return -EINVAL;
  
  -   name1 = malloc(9);
  -   name2 = malloc(9);
  -   if (!name1 || !name2)
  -   return -ENOMEM;
  -
  -   sprintf(name1, i2c_sda%d, i2c_index);
  -   sprintf(name2, i2c_scl%d, i2c_index);
  -   ret = gpio_request(p-sda.gp, name1);
  +   snprintf(name, sizeof(name), i2c_sda%01d, i2c_index);
  +   ret = gpio_request(p-sda.gp, name);
 
 Does this board use driver model? If not it should be easy to convert
 since one MX6 board supports it. With driver model there is
 gpio_requestf(i2c_sda%01d, i2c_index);

No, not yet, but it's in the pipeline. I am already keeping an eye on a few
conversion patches to get this done.
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Re: [U-Boot] [PATCH 1/2] image: bootm: Add OpenRTOS image type

On Tuesday, December 16, 2014 at 05:28:55 PM, Simon Glass wrote:
 On 16 December 2014 at 06:07, Marek Vasut ma...@denx.de wrote:
  Add separate image type for the Wittenstein OpenRTOS .

  Signed-off-by: Marek Vasut ma...@denx.de
  Cc: Simon Glass s...@chromium.org
  Cc: Tom Rini tr...@ti.com
  ---

   common/bootm_os.c | 29 +
   common/image.c|  4 
   include/image.h   |  1 +
   3 files changed, 34 insertions(+)

 Reviewed-by: Simon Glass s...@chromium.org

Thank you! I was a bit worried if these patches are really done
right and if this is the correct way to integrate the OpenRTOS
support.

Best regards,
Marek Vasut
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Re: [U-Boot] [Patch V2 3/3] dfu: dfu_get_buf: check the value of env dfu_bufsiz before use

On Tuesday, December 16, 2014 at 05:07:06 PM, Lukasz Majewski wrote:
 Hi Marek,
 
  On Tuesday, December 16, 2014 at 02:48:46 PM, Lukasz Majewski wrote:
  [...]
  
   Applied to u-boot-dfu, thanks!
  
  Hi,
  
  Will you have any PR for me for this MW please ? If so, when ?
 
 Some fixes and clean ups I hope. By the end of current week.

I pushed an up-to-date u-boot-usb/master tree, so you can use the
up-to-date code.

Hope that helps!

Thanks!

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] powerpc/t4240rdb: Convert to use generic board code

On 12/01/2014 12:21 AM, Chunhe Lan wrote:
 Signed-off-by: Chunhe Lan chunhe@freescale.com
 ---

Applied to u-boot-mpc85xx master, awaiting upstream.

York



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Re: [U-Boot] [PATCH] powerpc/bsc913x: Convert to use generic board code

On 12/02/2014 02:25 AM, Harninder Rai wrote:
 Signed-off-by: Harninder Rai harninder@freescale.com
 ---

Applied to u-boot-mpc85xx master, awaiting upstream.

York


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Re: [U-Boot] [PATCH] spl: mmc: Fix raw boot mode (related to commit 4c5bbc2328a24f5e1ee990c9a9527e48e5fb3b5f)

2014-12-16 Thread Robert Nelson

On Tue, Dec 16, 2014 at 5:00 AM, Guillaume GARDET
guillaume.gar...@free.fr wrote:
 As reported by Robert Nelson, commit 4c5bbc2328a24f5e1ee990c9a9527e48e5fb3b5f
 may break MMC RAW boot mode.
 This patch fixes the check path to fix MMC Raw boot mode.

 Tested raw boot mode and FS boot mode on a pandaboard (rev. A3).

 Reported-by: Robert Nelson robertcnel...@gmail.com
 Signed-off-by: Guillaume GARDET guillaume.gar...@free.fr

 Cc: Tom Rini tr...@ti.com
 Cc: Robert Nelson robertcnel...@gmail.com

Thanks Guillaume!

Tested in raw  fs mode on a beaglebone black (microSD  eMMC)

Regards,

-- 
Robert Nelson
http://www.rcn-ee.com/
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Re: [U-Boot] [PATCH] powerpc/p2041rdb: enable generic board configs

On 11/30/2014 11:39 PM, shh@gmail.com wrote:
 From: Shaohui Xie shaohui@freescale.com
 
 Add following configs in header file:
 CONFIG_SYS_GENERIC_BOARD
 CONFIG_DISPLAY_BOARDINFO
 
 Signed-off-by: Shaohui Xie shaohui@freescale.com
 ---

Applied to u-boot-mpc85xx master, awaiting upstream.

York


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Re: [U-Boot] [Patch v3] driver/ddr/fsl: Fix MRC_CYC calculation for DDR3

On 12/02/2014 11:18 AM, York Sun wrote:
 For DDR controller version 4.7 or newer, MRC_CYC (mode register set
 cycle time) is max(tMRD, tMOD). tMRD is 4nCK, or 8nCK (RDIMM). tMOD
 is max(12nCK, 15ns) according to JEDEC spec.
 
 DDR4 is not affected by this change.
 
 Signed-off-by: York Sun york...@freescale.com
 ---
 Change log
  v3: Add cast for using max()
  v2: Apply the change only to DDR controller newer than v4.7
  Older DDRC needs to take into account of RDIMM for tMRD

Applied to u-boot-mpc85xx master, awaiting upstream.

York



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Re: [U-Boot] [Patch v3] powerpc/mpc85xx: Fix DDR TLB mapping leftover

On 12/02/2014 11:21 AM, York Sun wrote:
 Commit f29f804a93e87c17670607641d120f431a3b0633 generalized the TLB
 mapping function, but made the DDR mapping leftover size to zero,
 causing the message not printed.
 
 Signed-off-by: York Sun york...@freescale.com
 CC: Alexander Graf ag...@suse.de
 CC: Scott Wood scottw...@freescale.com
 ---
 Change log
  v3: Add checking for memsize  CONFIG_MAX_MEM_MAPPED for print_size
  v2: Fix unnecessary parentheses
 

Applied to u-boot-mpc85xx master, awaiting upstream.

York



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Re: [U-Boot] [PATCH] net/fm: update ft_fixup_port to differentiate dual-role mac

On 12/02/2014 11:27 PM, Shengzhou Liu wrote:
 we need to differentiate dual-role MACs into two types: MACs with
 10GEC enumeration consistent with DTSEC enumeration(defined by
 CONFIG_FSL_FM_10GEC_REGULAR_NOTATION) and other MACs without
 CONFIG_FSL_FM_10GEC_REGULAR_NOTATION defined.
 
 Signed-off-by: Shengzhou Liu shengzhou@freescale.com
 ---

Applied to u-boot-mpc85xx master, awaiting upstream.

York



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Re: [U-Boot] [PATCH V5] mpc85xx: inhibit qman and bman portals by default

On 12/08/2014 11:54 AM, Jeffrey Ladouceur wrote:
 Not all portals might be managed and therefore visible.
 Set the isdr register so that the corresponding isr register
 won't be set. This is required when supporting power management.
 
 Signed-off-by: Jeffrey Ladouceur jeffrey.ladouc...@freescale.com
 ---
 The following dependent patches should be applied first:
 http://patchwork.ozlabs.org/patch/403532
 http://patchwork.ozlabs.org/patch/403533
 http://patchwork.ozlabs.org/patch/403540
 http://patchwork.ozlabs.org/patch/403534
 http://patchwork.ozlabs.org/patch/403535
 http://patchwork.ozlabs.org/patch/403538
 http://patchwork.ozlabs.org/patch/403536
 http://patchwork.ozlabs.org/patch/403539
 
 Changes in v5:
  - Qman portals also require their isdr register to be set in order to support
  power management (sleep, deepsleep). Otherwise QMan will appear to not be 
 idle
  if all portals are not managed by the OS.
 
 Changes in v4:
  - The assertion that reading from portal reserved memory would return zero
  is incorrect. Therefore modify code to depend on specified number of
  portals in board config file
 
 Changes in v3:
  - Update subject title to be consistent
 Changes in v2:
  - Removed P1023RDS as it is no longer supported.
 

Applied to u-boot-mpc85xx master, awaiting upstream.

York



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Re: [U-Boot] [PATCH][v2] crypto/fsl: Fix RNG instantiation failure.

On 12/03/2014 11:30 PM, Gaurav Rana wrote:
 Corrected the order of arguments in memset in run_descriptor
 function. Wrong order of argumnets led to improper initialization
 of members of struct type result. This resulted in RNG instantiation
 error.
 
 Signed-off-by: Gaurav Rana gaurav.r...@freescale.com
 ---
 Changes from v1:
 Corrected typo in Subject message
 

Applied to u-boot-mpc85xx master, awaiting upstream.

York



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Re: [U-Boot] [PATCH] p5040ds: changed liodn offsets

On 12/09/2014 01:00 AM, Laurentiu Tudor wrote:
 Offsets were overlaping, causing pamu access violations in
 hypervised scenarios.
 
 Signed-off-by: Cristian Sovaiala cristian.sovai...@freescale.com
 Signed-off-by: Laurentiu Tudor laurentiu.tu...@freescale.com
 Reviewed-by: Fleming Andrew-AFLEMING aflem...@freescale.com
 Reviewed-by: Sun Yusong-R58495 york...@freescale.com
 ---

Applied to u-boot-mpc85xx master, awaiting upstream.

York



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Re: [U-Boot] [PATCH] qe/deep-sleep: modify qe deep-sleep for generic board

On 12/14/2014 11:50 PM, Zhao Qiang wrote:
 Deep sleep for generic board is supported now,
 modify qe deep-sleep code to adapt it.
 
 Signed-off-by: Zhao Qiang b45...@freescale.com
 ---
 Changes for v2:
   - rebase
 

Applied to u-boot-mpc85xx master, awaiting upstream.

York



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Re: [U-Boot] [PATCH] mpc85xx/t104xrdb: convert deep sleep to generic board interface

On 11/20/2014 07:17 PM, yuantian.t...@freescale.com wrote:
 From: Tang Yuantian yuantian.t...@freescale.com
 
 A new interface is introduced to support generic board structure.
 Converts it to use new interface.
 
 Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
 ---

Applied to u-boot-mpc85xx master, awaiting upstream.

York



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[U-Boot] Please pull u-boot-mpc85xx master

Tom,

The following changes since commit fc9b0b80435cda721fbdbe507c9e4f388b0ea62b:

  Merge branch 'master' of git://git.denx.de/u-boot-usb (2014-12-11 18:40:49 
-0500)

are available in the git repository at:


  git://git.denx.de/u-boot-mpc85xx.git master

for you to fetch changes up to 00233528559c913e4bfafb1505ebf65f78e02976:

  mpc85xx/t104xrdb: convert deep sleep to generic board interface (2014-12-15
09:17:12 -0800)


Chunhe Lan (1):
  powerpc/t4240rdb: Convert to use generic board code

Jeffrey Ladouceur (2):
  mpc85xx: inhibit qman and bman portals by default
  powerpc/T10xx: Fix number of portals

Shaohui Xie (1):
  powerpc/p2041rdb: enable generic board configs

Shengzhou Liu (1):
  net/fm: update ft_fixup_port to differentiate dual-role mac

Tang Yuantian (1):
  mpc85xx/t104xrdb: convert deep sleep to generic board interface

Tudor Laurentiu (1):
  p5040ds: changed liodn offsets

York Sun (2):
  driver/ddr/fsl: Fix MRC_CYC calculation for DDR3
  powerpc/mpc85xx: Fix DDR TLB mapping leftover

Zhao Qiang (1):
  qe/deep-sleep: modify qe deep-sleep for generic board

gaurav rana (1):
  crypto/fsl: Fix RNG instantiation failure.

harninder rai (1):
  powerpc/bsc913x: Convert to use generic board code

 arch/powerpc/cpu/mpc85xx/p5040_ids.c |   24 +--
 arch/powerpc/cpu/mpc85xx/portals.c   |   43 ++
 arch/powerpc/cpu/mpc85xx/tlb.c   |   12 ++
 board/freescale/t104xrdb/ddr.c   |   19 +++
 board/freescale/t104xrdb/spl.c   |   19 +++
 board/freescale/t104xrdb/t104xrdb.c  |   24 +--
 drivers/crypto/fsl/jr.c  |2 +-
 drivers/ddr/fsl/ctrl_regs.c  |   21 -
 drivers/net/fm/init.c|   21 +
 drivers/qe/qe.c  |   11 +
 include/configs/B4860QDS.h   |   16 +
 include/configs/BSC9131RDB.h |3 +++
 include/configs/BSC9132QDS.h |3 +++
 include/configs/P1023RDB.h   |   16 +
 include/configs/P2041RDB.h   |   18 ++
 include/configs/T102xQDS.h   |   20 ++--
 include/configs/T102xRDB.h   |   20 ++--
 include/configs/T1040QDS.h   |   20 ++--
 include/configs/T104xRDB.h   |   23 --
 include/configs/T208xQDS.h   |   16 +
 include/configs/T208xRDB.h   |   16 +
 include/configs/T4240EMU.h   |   16 +
 include/configs/T4240QDS.h   |   16 +
 include/configs/T4240RDB.h   |   18 ++
 include/configs/corenet_ds.h |   16 +
 include/configs/km/kmp204x-common.h  |   16 +
 26 files changed, 389 insertions(+), 60 deletions(-)

Thanks.

York
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Re: [U-Boot] [PATCH] powerpc/T10xx: Fix number of portals

On 12/03/2014 03:08 PM, Jeffrey Ladouceur wrote:
 Following boards has incorrect number of portals defined.
 powerpc/T102xQDS
 powerpc/T102xRDB
 powerpc/T1040QDS
 powerpc/T104xRDB
 
 Signed-off-by: Jeffrey Ladouceur jeffrey.ladouc...@freescale.com
 ---

Applied to u-boot-mpc85xx master, awaiting upstream.

York



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Re: [U-Boot] [PATCH] spl: mmc: Fix raw boot mode (related to commit 4c5bbc2328a24f5e1ee990c9a9527e48e5fb3b5f)

2014-12-16 Thread Guillaume Gardet



Le 16/12/2014 18:16, Robert Nelson a écrit :

On Tue, Dec 16, 2014 at 5:00 AM, Guillaume GARDET
guillaume.gar...@free.fr wrote:

As reported by Robert Nelson, commit 4c5bbc2328a24f5e1ee990c9a9527e48e5fb3b5f
may break MMC RAW boot mode.
This patch fixes the check path to fix MMC Raw boot mode.

Tested raw boot mode and FS boot mode on a pandaboard (rev. A3).

Reported-by: Robert Nelson robertcnel...@gmail.com
Signed-off-by: Guillaume GARDET guillaume.gar...@free.fr

Cc: Tom Rini tr...@ti.com
Cc: Robert Nelson robertcnel...@gmail.com

Thanks Guillaume!

Tested in raw  fs mode on a beaglebone black (microSD  eMMC)


Thanks for testing it. :) You could add your tested by tag.


Guillaume

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Re: [U-Boot] RFC Pin Configuration Device Tree Bindings for Altera Arria10 SOCFPGA

On Thursday, December 04, 2014 at 11:08:32 PM, mgerlach wrote:
 On Wed, 3 Dec 2014, Pavel Machek wrote:
  Hi!
  
altr,pinmux-regs = 0xF 0xF 0xF 0xF 0xF 0xF 0xF 0xF 0xF 0xF
reg = 0xffd07300 0x0048;
altr,pinmux-regs = 0x0 0x51010 0x51010 0x51010 0x40605

   0x40605 0x00605 0x40605 0x40605 0x40605
   0x10605 0x51010 0x51010 0x51010 0x51010
   0x51010 0x03030 0x23030;

};
fpga {

reg = 0xffd07400 0x0044;
altr,pinmux-regs = 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0

   0x0 0x0 0x0 0x0 0x0 0x0 0x0;

};

};
   
   Does this match the kernel? Or does the kernel have no such binding
   yet?
   
There are no such bindings in the kernel yet.  Dynamic pinmuxing is
not supported by the Arria 10; so we don't anticipate the kernel
needing pinmux information.
   
   OK. Currently device tree files are stored in the kernel, so it might
   be worth submitting it there one day regardless.
  
  Actually, I believe you should use standard pinmux format. Just
  because dynamic pinmuxing is not supported now does not mean it will
  not be supported in Arria 11... And it was already supported in older
  chipsets (right?).
  
  Pavel
 
 Hi Pavel,
 
 Thanks for the suggestion.  I had another look at the pinctlr bindings
 in the kernel.  I think we should be using standard bindings defined in
 Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt for
 the Arria 10 SOCFPGA.

Thanks for letting me know about the discussion today.

As for the SPL, we agreed that the SPL should parse the DT and do the 
configuration from the DT. The DT for the SPL might be stripped down
in case there was a problem with fitting the full-size DT into the memory.

As for the DT bindings (in general), these should go to the DT mailing list,
see http://elinux.org/Device_Tree#Device-tree_Mailing_List . By running those
bindings against the DT ML, you will get some kind of a guarantee that their
design is sound and these bindings will be somewhat future-proof.

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/2] image: bootm: Add OpenRTOS image type

2014-12-16 Thread Jeroen Hofstee


Hello Marek,

On 16-12-14 14:07, Marek Vasut wrote:

Add separate image type for the Wittenstein OpenRTOS .

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Simon Glass s...@chromium.org
Cc: Tom Rini tr...@ti.com
---
  common/bootm_os.c | 29 +
  common/image.c|  4 
  include/image.h   |  1 +
  3 files changed, 34 insertions(+)

diff --git a/common/bootm_os.c b/common/bootm_os.c
index 5be4467..72477f0 100644
--- a/common/bootm_os.c
+++ b/common/bootm_os.c
@@ -404,6 +404,32 @@ static int do_bootm_integrity(int flag, int argc, char * 
const argv[],
  }
  #endif
  
+#ifdef CONFIG_BOOTM_OPENRTOS

+static int do_bootm_openrtos(int flag, int argc, char * const argv[],
+  bootm_headers_t *images)
+{
+   void (*entry_point)(void);
+
+   if (flag != BOOTM_STATE_OS_GO)
+   return 0;
+
+   entry_point = (void (*)(void))images-ep;
+
+   printf(## Transferring control to OpenRTOS (at address %08lx) ...\n,
+   (ulong)entry_point);
+
+   bootstage_mark(BOOTSTAGE_ID_RUN_OS);


You might consider adding a prepare function here, similar to e.g.
boot_prep_vxworks(images) which eventually calls cleanup_before_linux(),
so you end up jumping into the image with caches flushed and disabled
(at least on ARM).  I don't know if this is needed in your case though...


+
+   /*
+* OpenRTOS Parameters:
+*   None
+*/
+   (*entry_point)();
+
+   return 1;
+}
+#endif


Regards,
Jeroen
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[U-Boot] [PATCH 03/14] sunxi: axp221: Add axp223 support

The axp223 appears to be the same as the axp221, except that it uses the
rsb to communicate rather then the p2wi. At least all the registers we use
are 100% the same.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 arch/arm/cpu/armv7/sunxi/cpu_info.c |  2 +-
 drivers/power/Kconfig   |  8 ++--
 drivers/power/axp221.c  | 88 -
 include/axp221.h|  4 ++
 4 files changed, 76 insertions(+), 26 deletions(-)

diff --git a/arch/arm/cpu/armv7/sunxi/cpu_info.c 
b/arch/arm/cpu/armv7/sunxi/cpu_info.c
index 7a3a4ca..b6cb9de 100644
--- a/arch/arm/cpu/armv7/sunxi/cpu_info.c
+++ b/arch/arm/cpu/armv7/sunxi/cpu_info.c
@@ -76,7 +76,7 @@ int print_cpuinfo(void)
 
 int sunxi_get_sid(unsigned int *sid)
 {
-#ifdef CONFIG_MACH_SUN6I
+#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I
 #ifdef CONFIG_AXP221_POWER
return axp221_get_sid(sid);
 #else
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 1ec7c0e..7373a79 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -1,10 +1,10 @@
 config AXP221_POWER
-   boolean axp221 pmic support
-   depends on MACH_SUN6I
+   boolean axp221 / axp223 pmic support
+   depends on MACH_SUN6I || MACH_SUN8I
default y
---help---
-   Say y here to enable support for the axp221 pmic found on most sun6i
-   (A31) boards.
+   Say y here to enable support for the axp221 / axp223 pmic found on most
+   sun6i (A31) / sun8i (A23) boards.
 
 config AXP221_DLDO1_VOLT
int axp221 dldo1 voltage
diff --git a/drivers/power/axp221.c b/drivers/power/axp221.c
index 826567a..717adad 100644
--- a/drivers/power/axp221.c
+++ b/drivers/power/axp221.c
@@ -1,4 +1,10 @@
 /*
+ * AXP221 and AXP223 driver
+ *
+ * IMPORTANT when making changes to this file check that the registers
+ * used are the same for the axp221 and axp223.
+ * 
+ * (C) Copyright 2014 Hans de Goede hdego...@redhat.com
  * (C) Copyright 2013 Oliver Schinagl oli...@schinagl.nl
  *
  * SPDX-License-Identifier:GPL-2.0+
@@ -7,8 +13,50 @@
 #include common.h
 #include errno.h
 #include asm/arch/p2wi.h
+#include asm/arch/rsb.h
 #include axp221.h
 
+/*
+ * The axp221 uses the p2wi bus, the axp223 is identical (for all registers
+ * used sofar) but uses the rsb bus. These functions abstract this.
+ */
+static int pmic_bus_init(void)
+{
+#ifdef CONFIG_MACH_SUN6I
+   p2wi_init();
+   return p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR,
+   AXP221_INIT_DATA);
+#else
+   int ret;
+
+   rsb_init();
+   
+   ret = rsb_set_device_mode(AXP223_DEVICE_MODE_DATA);
+   if (ret)
+   return ret;
+
+   return rsb_set_device_address(AXP223_DEVICE_ADDR, AXP223_RUNTIME_ADDR);
+#endif
+}
+
+static int pmic_bus_read(const u8 addr, u8 *data)
+{
+#ifdef CONFIG_MACH_SUN6I
+   return p2wi_read(addr, data);
+#else
+   return rsb_read(AXP223_RUNTIME_ADDR, addr, data);
+#endif
+}
+
+static int pmic_bus_write(const u8 addr, u8 data)
+{
+#ifdef CONFIG_MACH_SUN6I
+   return p2wi_write(addr, data);
+#else
+   return rsb_write(AXP223_RUNTIME_ADDR, addr, data);
+#endif
+}
+
 static u8 axp221_mvolt_to_cfg(int mvolt, int min, int max, int div)
 {
if (mvolt  min)
@@ -24,12 +72,12 @@ static int axp221_setbits(u8 reg, u8 bits)
int ret;
u8 val;
 
-   ret = p2wi_read(reg, val);
+   ret = pmic_bus_read(reg, val);
if (ret)
return ret;
 
val |= bits;
-   return p2wi_write(reg, val);
+   return pmic_bus_write(reg, val);
 }
 
 int axp221_set_dcdc1(unsigned int mvolt)
@@ -37,7 +85,7 @@ int axp221_set_dcdc1(unsigned int mvolt)
int ret;
u8 cfg = axp221_mvolt_to_cfg(mvolt, 1600, 3400, 100);
 
-   ret = p2wi_write(AXP221_DCDC1_CTRL, cfg);
+   ret = pmic_bus_write(AXP221_DCDC1_CTRL, cfg);
if (ret)
return ret;
 
@@ -49,28 +97,28 @@ int axp221_set_dcdc2(unsigned int mvolt)
 {
u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1540, 20);
 
-   return p2wi_write(AXP221_DCDC2_CTRL, cfg);
+   return pmic_bus_write(AXP221_DCDC2_CTRL, cfg);
 }
 
 int axp221_set_dcdc3(unsigned int mvolt)
 {
u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1860, 20);
 
-   return p2wi_write(AXP221_DCDC3_CTRL, cfg);
+   return pmic_bus_write(AXP221_DCDC3_CTRL, cfg);
 }
 
 int axp221_set_dcdc4(unsigned int mvolt)
 {
u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1540, 20);
 
-   return p2wi_write(AXP221_DCDC4_CTRL, cfg);
+   return pmic_bus_write(AXP221_DCDC4_CTRL, cfg);
 }
 
 int axp221_set_dcdc5(unsigned int mvolt)
 {
u8 cfg = axp221_mvolt_to_cfg(mvolt, 1000, 2550, 50);
 
-   return p2wi_write(AXP221_DCDC5_CTRL, cfg);
+   return pmic_bus_write(AXP221_DCDC5_CTRL, cfg);
 }
 
 int axp221_set_dldo1(unsigned int mvolt)
@@ -78,7 +126,7 @@ int axp221_set_dldo1(unsigned int mvolt)
int ret;

[U-Boot] [PATCH 01/14] sun6i: s/SUNXI_GPL0_R_P2WI/SUN6I_GPL0_R_P2WI/

The p2wi interface is only available on sun6i, adjust the gpio pinmux defines
for it to reflect this.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 arch/arm/cpu/armv7/sunxi/p2wi.c| 4 ++--
 arch/arm/include/asm/arch-sunxi/gpio.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv7/sunxi/p2wi.c b/arch/arm/cpu/armv7/sunxi/p2wi.c
index 48613bd..52c2c53 100644
--- a/arch/arm/cpu/armv7/sunxi/p2wi.c
+++ b/arch/arm/cpu/armv7/sunxi/p2wi.c
@@ -31,8 +31,8 @@ void p2wi_init(void)
/* Enable p2wi and PIO clk, and de-assert their resets */
prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_P2WI);
 
-   sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUNXI_GPL0_R_P2WI_SCK);
-   sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUNXI_GPL1_R_P2WI_SDA);
+   sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN6I_GPL0_R_P2WI_SCK);
+   sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN6I_GPL1_R_P2WI_SDA);
 
/* Reset p2wi controller and set clock to CLKIN(12)/8 = 1.5 MHz */
writel(P2WI_CTRL_RESET, p2wi-ctrl);
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h 
b/arch/arm/include/asm/arch-sunxi/gpio.h
index 366c0dc..9f972ce 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -173,8 +173,8 @@ enum sunxi_gpio_number {
 
 #define SUN4I_GPI4_SDC32
 
-#define SUNXI_GPL0_R_P2WI_SCK  3
-#define SUNXI_GPL1_R_P2WI_SDA  3
+#define SUN6I_GPL0_R_P2WI_SCK  3
+#define SUN6I_GPL1_R_P2WI_SDA  3
 
 #define SUN8I_GPL2_R_UART_TX   2
 #define SUN8I_GPL3_R_UART_RX   2
-- 
2.1.0

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[U-Boot] [PATCH 02/14] sunxi: Add support for the rsb (Reduced Serial Bus)

sun8i (A23) introduces a new bus for communicating with the pmic, the rsb,
the rsb is also used to communicate with the pmic on the A80, and is
documented in the A80 user manual.

This commit adds support for this based on the rsb driver from the allwinner
u-boot sources.

Note: Not yet ready for upstream, code needs some significant cleanups.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 arch/arm/cpu/armv7/sunxi/Makefile  |   1 +
 arch/arm/cpu/armv7/sunxi/rsb.c | 158 +
 arch/arm/include/asm/arch-sunxi/cpu.h  |   3 +-
 arch/arm/include/asm/arch-sunxi/gpio.h |   2 +
 arch/arm/include/asm/arch-sunxi/prcm.h |   3 +-
 arch/arm/include/asm/arch-sunxi/rsb.h  |  55 
 6 files changed, 220 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/sunxi/rsb.c
 create mode 100644 arch/arm/include/asm/arch-sunxi/rsb.h

diff --git a/arch/arm/cpu/armv7/sunxi/Makefile 
b/arch/arm/cpu/armv7/sunxi/Makefile
index 1337b60..3e8975a 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -15,6 +15,7 @@ obj-y += pinmux.o
 obj-$(CONFIG_MACH_SUN6I)   += prcm.o
 obj-$(CONFIG_MACH_SUN8I)   += prcm.o
 obj-$(CONFIG_MACH_SUN6I)   += p2wi.o
+obj-$(CONFIG_MACH_SUN8I)   += rsb.o
 obj-$(CONFIG_MACH_SUN4I)   += clock_sun4i.o
 obj-$(CONFIG_MACH_SUN5I)   += clock_sun4i.o
 obj-$(CONFIG_MACH_SUN6I)   += clock_sun6i.o
diff --git a/arch/arm/cpu/armv7/sunxi/rsb.c b/arch/arm/cpu/armv7/sunxi/rsb.c
new file mode 100644
index 000..b72bb9d
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/rsb.c
@@ -0,0 +1,158 @@
+/*
+ * (C) Copyright 2014 Hans de Goede hdego...@redhat.com
+ *
+ * Based on allwinner u-boot sources rsb code which is:
+ * (C) Copyright 2007-2013
+ * Allwinner Technology Co., Ltd. www.allwinnertech.com
+ * lixiang lixi...@allwinnertech.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include errno.h
+#include asm/arch/cpu.h
+#include asm/arch/gpio.h
+#include asm/arch/prcm.h
+#include asm/arch/rsb.h
+
+static void rsb_cfg_io(void)
+{
+   sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL0_R_RSB_SCK);
+   sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL1_R_RSB_SDA);
+   sunxi_gpio_set_pull(SUNXI_GPL(0), 1);
+   sunxi_gpio_set_pull(SUNXI_GPL(1), 1);
+   sunxi_gpio_set_drv(SUNXI_GPL(0), 2);
+   sunxi_gpio_set_drv(SUNXI_GPL(1), 2);
+}
+
+static void rsb_set_clk(void)
+{
+   struct sunxi_rsb_reg * const rsb =
+   (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
+   u32 div = 0;
+   u32 cd_odly = 0;
+
+   /* Source is Hosc24M, set RSB clk to 3Mhz */
+   div = 2400 / 300 / 2 - 1;
+   cd_odly = div  1;
+   if (!cd_odly)
+   cd_odly = 1;
+
+   writel((cd_odly  8) | div, rsb-ccr);
+}
+
+void rsb_init(void)
+{
+   struct sunxi_rsb_reg * const rsb =
+   (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
+
+   rsb_cfg_io();
+
+   /* Enable RSB and PIO clk, and de-assert their resets */
+   prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_RSB);
+
+   writel(RSB_CTRL_SOFT_RST, rsb-ctrl);
+   rsb_set_clk();
+}
+
+static int rsb_await_trans(void)
+{
+   struct sunxi_rsb_reg * const rsb =
+   (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
+   unsigned long tmo = timer_get_us() + 100;
+   u32 stat;
+   int ret;
+
+   while (1) {
+   stat = readl(rsb-stat);
+   if (stat  RSB_STAT_LBSY_INT) {
+   ret = -EBUSY;
+   break;
+   }
+   if (stat  RSB_STAT_TERR_INT) {
+   ret = -EIO;
+   break;
+   }
+   if (stat  RSB_STAT_TOVER_INT) {
+   ret = 0;
+   break;
+   }
+   if (timer_get_us()  tmo) {
+   ret = -ETIME;
+   break;
+   }
+   }
+   writel(stat, rsb-stat); /* Clear status bits */
+
+   return ret;
+}
+
+int rsb_set_device_mode(u32 device_mode_data)
+{
+   struct sunxi_rsb_reg * const rsb =
+   (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
+   unsigned long tmo = timer_get_us() + 100;
+
+   writel(RSB_DMCR_DEVICE_MODE_START | device_mode_data, rsb-dmcr);
+
+   while (readl(rsb-dmcr)  RSB_DMCR_DEVICE_MODE_START) {
+   if (timer_get_us()  tmo)
+   return -ETIME;
+   }
+
+   return rsb_await_trans();
+}
+
+static int rsb_do_trans(void)
+{
+   struct sunxi_rsb_reg * const rsb =
+   (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
+
+   setbits_le32(rsb-ctrl, RSB_CTRL_START_TRANS);
+   return rsb_await_trans();
+}
+
+int rsb_set_device_address(u16 device_addr, u16 runtime_addr)
+{
+   struct sunxi_rsb_reg * const rsb =
+   (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
+
+

[U-Boot] [PATCH 04/14] sunxi: axp221: Add Kconfig help and sane defaults for typical ldo usage

Some of the ldo-s of the axp221 are used in the same way on most boards, add
comments to the Kconfig help text to reflect this, and give them defaults
matching their typical usage.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 configs/CSQ_CS908_defconfig   |  3 ---
 configs/Colombus_defconfig|  3 ---
 configs/Hummingbird_A31_defconfig |  4 
 configs/Mele_M9_defconfig |  3 ---
 drivers/power/Kconfig | 20 ++--
 5 files changed, 14 insertions(+), 19 deletions(-)

diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig
index 4c9cff6..1b6cdbf 100644
--- a/configs/CSQ_CS908_defconfig
+++ b/configs/CSQ_CS908_defconfig
@@ -11,9 +11,6 @@ CONFIG_FDTFILE=sun6i-a31s-cs908.dtb
 +S:CONFIG_AXP221_DLDO1_VOLT=3300
 # Wifi power
 +S:CONFIG_AXP221_ALDO1_VOLT=3300
-# HDMI power ?
-+S:CONFIG_AXP221_ALDO2_VOLT=1800
-+S:CONFIG_AXP221_ALDO3_VOLT=3000
 # No Vbus gpio for either usb
 +S:CONFIG_USB1_VBUS_PIN=
 +S:CONFIG_USB2_VBUS_PIN=
diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig
index b8c5400..f42ae52 100644
--- a/configs/Colombus_defconfig
+++ b/configs/Colombus_defconfig
@@ -9,8 +9,5 @@ CONFIG_FDTFILE=sun6i-a31-colombus.dtb
 +S:CONFIG_DRAM_ZQ=251
 # Wifi power
 +S:CONFIG_AXP221_ALDO1_VOLT=3300
-# HDMI power ?
-+S:CONFIG_AXP221_ALDO2_VOLT=1800
-+S:CONFIG_AXP221_ALDO3_VOLT=3000
 # No Vbus gpio for usb1
 +S:CONFIG_USB1_VBUS_PIN=
diff --git a/configs/Hummingbird_A31_defconfig 
b/configs/Hummingbird_A31_defconfig
index 73855c5..7f59a0d 100644
--- a/configs/Hummingbird_A31_defconfig
+++ b/configs/Hummingbird_A31_defconfig
@@ -9,10 +9,6 @@ CONFIG_FDTFILE=sun6i-a31-hummingbird.dtb
 +S:CONFIG_DRAM_ZQ=251
 # Wifi power
 +S:CONFIG_AXP221_ALDO1_VOLT=3300
-# PM-CPUS GPIO power
-+S:CONFIG_AXP221_ALDO2_VOLT=1800
-# SoC IR, PLL and Analog power (must be 3.0V)
-+S:CONFIG_AXP221_ALDO3_VOLT=3000
 # Vbus gpio for usb1
 +S:CONFIG_USB1_VBUS_PIN=PH24
 # No Vbus gpio for usb2
diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig
index a598254..445cc57 100644
--- a/configs/Mele_M9_defconfig
+++ b/configs/Mele_M9_defconfig
@@ -13,9 +13,6 @@ CONFIG_FDTFILE=sun6i-a31-m9.dtb
 +S:CONFIG_AXP221_DLDO4_VOLT=3300
 # Wifi power
 +S:CONFIG_AXP221_ALDO1_VOLT=3300
-# HDMI power ?
-+S:CONFIG_AXP221_ALDO2_VOLT=1800
-+S:CONFIG_AXP221_ALDO3_VOLT=3000
 # Vbus gpio for usb1
 +S:CONFIG_USB1_VBUS_PIN=PC27
 # No Vbus gpio for usb2
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 7373a79..af66887 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -12,7 +12,9 @@ config AXP221_DLDO1_VOLT
default -1
---help---
Set the voltage (mV) to program the axp221 dldo1 at, set to -1 to
-   disable dldo1.
+   disable dldo1. On sun6i (A31) boards with ethernet this is often used
+   to power the ethernet phy. On sun8i (A23) boards this is often used to
+   power the wifi.
 
 config AXP221_DLDO4_VOLT
int axp221 dldo4 voltage
@@ -28,20 +30,26 @@ config AXP221_ALDO1_VOLT
default -1
---help---
Set the voltage (mV) to program the axp221 aldo1 at, set to -1 to
-   disable aldo1.
+   disable aldo1. On sun6i (A31) boards which have a wifi module this is
+   often used to power the wifi module.
 
 config AXP221_ALDO2_VOLT
int axp221 aldo2 voltage
depends on AXP221_POWER
-   default -1
+   default 1800 if MACH_SUN6I
+   default 2500 if MACH_SUN8I
---help---
Set the voltage (mV) to program the axp221 aldo2 at, set to -1 to
-   disable aldo2.
+   disable aldo2. On sun6i (A31) boards this is typically connected to
+   VCC-PM, which powers the port M gpios, and should be set to 1.8V.
+   On sun8i (A23) this is typically connected to VDD-DLL and must be
+   set to 2.5V.
 
 config AXP221_ALDO3_VOLT
int axp221 aldo3 voltage
depends on AXP221_POWER
-   default -1
+   default 3000
---help---
Set the voltage (mV) to program the axp221 aldo3 at, set to -1 to
-   disable aldo3.
+   disable aldo3. This is typically connected to VCC-PLL and AVCC and
+   must be set to 3V.
-- 
2.1.0

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[U-Boot] [PATCH 07/14] sunxi: axp221: Disable dcdc4 on sun8i (A23)

dcdc4 is not used on sun8i, disable it.

While at it also add comments to the other fixed voltages to document what
they are used for.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 board/sunxi/board.c | 12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 5bf19b7..7d6d075 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -176,10 +176,14 @@ void sunxi_board_init(void)
 #ifdef CONFIG_AXP221_POWER
power_failed = axp221_init();
power_failed |= axp221_set_dcdc1(CONFIG_AXP221_DCDC1_VOLT);
-   power_failed |= axp221_set_dcdc2(1200);
-   power_failed |= axp221_set_dcdc3(1200);
-   power_failed |= axp221_set_dcdc4(1200);
-   power_failed |= axp221_set_dcdc5(1500);
+   power_failed |= axp221_set_dcdc2(1200); /* A31:VDD-GPU, A23:VDD-SYS */
+   power_failed |= axp221_set_dcdc3(1200); /* VDD-CPU */
+#ifdef CONFIG_MACH_SUN6I
+   power_failed |= axp221_set_dcdc4(1200); /* A31:VDD-SYS */
+#else
+   power_failed |= axp221_set_dcdc4(0);/* A23:unused */
+#endif
+   power_failed |= axp221_set_dcdc5(1500); /* VCC-DRAM */
power_failed |= axp221_set_dldo1(CONFIG_AXP221_DLDO1_VOLT);
power_failed |= axp221_set_dldo4(CONFIG_AXP221_DLDO4_VOLT);
power_failed |= axp221_set_aldo1(CONFIG_AXP221_ALDO1_VOLT);
-- 
2.1.0

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[U-Boot] [PATCH 06/14] sunxi: axp221: Explicitly turn off unused voltages

Explicitly turn off unused voltages, rather then leaving them as is. Likewise
explictly enabled the dcdc convertors, rather then assuming they are already
enabled at boot.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 board/sunxi/board.c|  10 -
 drivers/power/Kconfig  |  16 
 drivers/power/axp221.c | 102 ++---
 include/axp221.h   |   8 +++-
 4 files changed, 111 insertions(+), 25 deletions(-)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index e2ebf83..5bf19b7 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -180,22 +180,12 @@ void sunxi_board_init(void)
power_failed |= axp221_set_dcdc3(1200);
power_failed |= axp221_set_dcdc4(1200);
power_failed |= axp221_set_dcdc5(1500);
-#if CONFIG_AXP221_DLDO1_VOLT != -1
power_failed |= axp221_set_dldo1(CONFIG_AXP221_DLDO1_VOLT);
-#endif
-#if CONFIG_AXP221_DLDO4_VOLT != -1
power_failed |= axp221_set_dldo4(CONFIG_AXP221_DLDO4_VOLT);
-#endif
-#if CONFIG_AXP221_ALDO1_VOLT != -1
power_failed |= axp221_set_aldo1(CONFIG_AXP221_ALDO1_VOLT);
-#endif
-#if CONFIG_AXP221_ALDO2_VOLT != -1
power_failed |= axp221_set_aldo2(CONFIG_AXP221_ALDO2_VOLT);
-#endif
-#if CONFIG_AXP221_ALDO3_VOLT != -1
power_failed |= axp221_set_aldo3(CONFIG_AXP221_ALDO3_VOLT);
 #endif
-#endif
 
printf(DRAM:);
ramsize = sunxi_dram_init();
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index e132759..ef0c093 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -19,9 +19,9 @@ config AXP221_DCDC1_VOLT
 config AXP221_DLDO1_VOLT
int axp221 dldo1 voltage
depends on AXP221_POWER
-   default -1
+   default 0
---help---
-   Set the voltage (mV) to program the axp221 dldo1 at, set to -1 to
+   Set the voltage (mV) to program the axp221 dldo1 at, set to 0 to
disable dldo1. On sun6i (A31) boards with ethernet this is often used
to power the ethernet phy. On sun8i (A23) boards this is often used to
power the wifi.
@@ -29,17 +29,17 @@ config AXP221_DLDO1_VOLT
 config AXP221_DLDO4_VOLT
int axp221 dldo4 voltage
depends on AXP221_POWER
-   default -1
+   default 0
---help---
-   Set the voltage (mV) to program the axp221 dldo4 at, set to -1 to
+   Set the voltage (mV) to program the axp221 dldo4 at, set to 0 to
disable dldo4.
 
 config AXP221_ALDO1_VOLT
int axp221 aldo1 voltage
depends on AXP221_POWER
-   default -1
+   default 0
---help---
-   Set the voltage (mV) to program the axp221 aldo1 at, set to -1 to
+   Set the voltage (mV) to program the axp221 aldo1 at, set to 0 to
disable aldo1. On sun6i (A31) boards which have a wifi module this is
often used to power the wifi module.
 
@@ -49,7 +49,7 @@ config AXP221_ALDO2_VOLT
default 1800 if MACH_SUN6I
default 2500 if MACH_SUN8I
---help---
-   Set the voltage (mV) to program the axp221 aldo2 at, set to -1 to
+   Set the voltage (mV) to program the axp221 aldo2 at, set to 0 to
disable aldo2. On sun6i (A31) boards this is typically connected to
VCC-PM, which powers the port M gpios, and should be set to 1.8V.
On sun8i (A23) this is typically connected to VDD-DLL and must be
@@ -60,6 +60,6 @@ config AXP221_ALDO3_VOLT
depends on AXP221_POWER
default 3000
---help---
-   Set the voltage (mV) to program the axp221 aldo3 at, set to -1 to
+   Set the voltage (mV) to program the axp221 aldo3 at, set to 0 to
disable aldo3. This is typically connected to VCC-PLL and AVCC and
must be set to 3V.
diff --git a/drivers/power/axp221.c b/drivers/power/axp221.c
index 717adad..c438849 100644
--- a/drivers/power/axp221.c
+++ b/drivers/power/axp221.c
@@ -80,45 +80,107 @@ static int axp221_setbits(u8 reg, u8 bits)
return pmic_bus_write(reg, val);
 }
 
+static int axp221_clrbits(u8 reg, u8 bits)
+{
+   int ret;
+   u8 val;
+
+   ret = pmic_bus_read(reg, val);
+   if (ret)
+   return ret;
+
+   val = ~bits;
+   return pmic_bus_write(reg, val);
+}
+
 int axp221_set_dcdc1(unsigned int mvolt)
 {
int ret;
u8 cfg = axp221_mvolt_to_cfg(mvolt, 1600, 3400, 100);
 
+   if (mvolt == 0)
+   return axp221_clrbits(AXP221_OUTPUT_CTRL1,
+ AXP221_OUTPUT_CTRL1_DCDC1_EN);
+
ret = pmic_bus_write(AXP221_DCDC1_CTRL, cfg);
if (ret)
return ret;
 
-   return axp221_setbits(AXP221_OUTPUT_CTRL2,
- AXP221_OUTPUT_CTRL2_DCDC1_EN);
+   ret = axp221_setbits(AXP221_OUTPUT_CTRL2,
+AXP221_OUTPUT_CTRL2_DCDC1SW_EN);
+   if (ret)
+   return ret;
+
+   return axp221_setbits(AXP221_OUTPUT_CTRL1,
+

[U-Boot] [PATCH 05/14] sunxi: axp221: Make dcdc1 voltage configurable

The dcdc1 voltage is typically used as generic 3.3V IO voltage for things like
GPIO-s, sdcard interfaces, etc. On most boards this is undervolted to 3.0V to
safe battery, but not on all, make it configurable so that we can use the
same settings as the original firmware on all boards.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 board/sunxi/board.c   |  2 +-
 configs/Mele_M9_defconfig |  2 ++
 drivers/power/Kconfig | 10 ++
 3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index b5dfe95..e2ebf83 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -175,7 +175,7 @@ void sunxi_board_init(void)
 #endif
 #ifdef CONFIG_AXP221_POWER
power_failed = axp221_init();
-   power_failed |= axp221_set_dcdc1(3000);
+   power_failed |= axp221_set_dcdc1(CONFIG_AXP221_DCDC1_VOLT);
power_failed |= axp221_set_dcdc2(1200);
power_failed |= axp221_set_dcdc3(1200);
power_failed |= axp221_set_dcdc4(1200);
diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig
index 445cc57..e5ab0ec 100644
--- a/configs/Mele_M9_defconfig
+++ b/configs/Mele_M9_defconfig
@@ -7,6 +7,8 @@ CONFIG_FDTFILE=sun6i-a31-m9.dtb
 +S:CONFIG_TARGET_MELE_M9=y
 +S:CONFIG_DRAM_CLK=312
 +S:CONFIG_DRAM_ZQ=120
+# The Mele M9 uses 3.3V for general IO
++S:CONFIG_AXP221_DCDC1_VOLT=3300
 # Ethernet phy power
 +S:CONFIG_AXP221_DLDO1_VOLT=3300
 # USB hub power
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index af66887..e132759 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -6,6 +6,16 @@ config AXP221_POWER
Say y here to enable support for the axp221 / axp223 pmic found on most
sun6i (A31) / sun8i (A23) boards.
 
+config AXP221_DCDC1_VOLT
+   int axp221 dcdc1 voltage
+   depends on AXP221_POWER
+   default 3000
+   ---help---
+   Set the voltage (mV) to program the axp221 dcdc1 at, set to 0 to
+   disable dcdc1. This is typically used as generic 3.3V IO voltage for
+   things like GPIO-s, sdcard interfaces, etc. On most boards this is
+   undervolted to 3.0V to safe battery.
+
 config AXP221_DLDO1_VOLT
int axp221 dldo1 voltage
depends on AXP221_POWER
-- 
2.1.0

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[U-Boot] [PATCH 09/14] sun6i: Add k and m parameters to clock_set_pll5()

The A23 (sun8i) requires different values for these then sun6i, so make them
function parameters.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 arch/arm/cpu/armv7/sunxi/clock_sun6i.c| 4 +---
 arch/arm/cpu/armv7/sunxi/dram_sun6i.c | 2 +-
 arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 2 +-
 3 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c 
b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
index 193e314..8ef19df 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
@@ -144,12 +144,10 @@ void clock_set_pll3(unsigned int clk)
   ccm-pll3_cfg);
 }
 
-void clock_set_pll5(unsigned int clk, bool sigma_delta_enable)
+void clock_set_pll5(unsigned int clk, int k, int m, bool sigma_delta_enable)
 {
struct sunxi_ccm_reg * const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-   const int k = 2;
-   const int m = 1;
 
if (sigma_delta_enable)
writel(CCM_PLL5_PATTERN, ccm-pll5_pattern_cfg);
diff --git a/arch/arm/cpu/armv7/sunxi/dram_sun6i.c 
b/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
index bc6428a..a8bbdfd 100644
--- a/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
@@ -46,7 +46,7 @@ static void mctl_sys_init(void)
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
const int dram_clk_div = 2;
 
-   clock_set_pll5(DRAM_CLK * dram_clk_div, false);
+   clock_set_pll5(DRAM_CLK * dram_clk_div, 2, 1, false);
 
clrsetbits_le32(ccm-dram_clk_cfg, CCM_DRAMCLK_CFG_DIV0_MASK,
CCM_DRAMCLK_CFG_DIV0(dram_clk_div) | CCM_DRAMCLK_CFG_RST |
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h 
b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index f807af3..7d61216 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -311,6 +311,6 @@ struct sunxi_ccm_reg {
 #define CCM_DE_CTRL_PLL10  (5  24)
 #define CCM_DE_CTRL_GATE   (1  31)
 
-void clock_set_pll5(unsigned int clk, bool sigma_delta_enable);
+void clock_set_pll5(unsigned int clk, int k, int m, bool sigma_delta_enable);
 
 #endif /* _SUNXI_CLOCK_SUN6I_H */
-- 
2.1.0

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[U-Boot] [PATCH 10/14] sunxi: Move await_completion dram helper to dram.h

The await_completion helper is already copy pasted between the sun4i and sun6i
dram code, and we need it for sun8i too, so lets make it an inline helper in
dram.h, rather then adding yet another copy.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 arch/arm/cpu/armv7/sunxi/dram_sun4i.c  | 17 ++---
 arch/arm/cpu/armv7/sunxi/dram_sun6i.c  | 31 +--
 arch/arm/include/asm/arch-sunxi/dram.h | 14 ++
 3 files changed, 25 insertions(+), 37 deletions(-)

diff --git a/arch/arm/cpu/armv7/sunxi/dram_sun4i.c 
b/arch/arm/cpu/armv7/sunxi/dram_sun4i.c
index ec8aaa7..c736fa3 100644
--- a/arch/arm/cpu/armv7/sunxi/dram_sun4i.c
+++ b/arch/arm/cpu/armv7/sunxi/dram_sun4i.c
@@ -36,24 +36,11 @@
 #define CPU_CFG_CHIP_REV_B 0x3
 
 /*
- * Wait up to 1s for value to be set in given part of reg.
- */
-static void await_completion(u32 *reg, u32 mask, u32 val)
-{
-   unsigned long tmo = timer_get_us() + 100;
-
-   while ((readl(reg)  mask) != val) {
-   if (timer_get_us()  tmo)
-   panic(Timeout initialising DRAM\n);
-   }
-}
-
-/*
  * Wait up to 1s for mask to be clear in given reg.
  */
 static inline void await_bits_clear(u32 *reg, u32 mask)
 {
-   await_completion(reg, mask, 0);
+   mctl_await_completion(reg, mask, 0);
 }
 
 /*
@@ -61,7 +48,7 @@ static inline void await_bits_clear(u32 *reg, u32 mask)
  */
 static inline void await_bits_set(u32 *reg, u32 mask)
 {
-   await_completion(reg, mask, mask);
+   mctl_await_completion(reg, mask, mask);
 }
 
 /*
diff --git a/arch/arm/cpu/armv7/sunxi/dram_sun6i.c 
b/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
index a8bbdfd..e1670e5 100644
--- a/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
@@ -27,19 +27,6 @@ struct dram_sun6i_para {
u16 page_size;
 };
 
-/*
- * Wait up to 1s for value to be set in given part of reg.
- */
-static void await_completion(u32 *reg, u32 mask, u32 val)
-{
-   unsigned long tmo = timer_get_us() + 100;
-
-   while ((readl(reg)  mask) != val) {
-   if (timer_get_us()  tmo)
-   panic(Timeout initialising DRAM\n);
-   }
-}
-
 static void mctl_sys_init(void)
 {
struct sunxi_ccm_reg * const ccm =
@@ -51,7 +38,7 @@ static void mctl_sys_init(void)
clrsetbits_le32(ccm-dram_clk_cfg, CCM_DRAMCLK_CFG_DIV0_MASK,
CCM_DRAMCLK_CFG_DIV0(dram_clk_div) | CCM_DRAMCLK_CFG_RST |
CCM_DRAMCLK_CFG_UPD);
-   await_completion(ccm-dram_clk_cfg, CCM_DRAMCLK_CFG_UPD, 0);
+   mctl_await_completion(ccm-dram_clk_cfg, CCM_DRAMCLK_CFG_UPD, 0);
 
writel(MDFS_CLK_DEFAULT, ccm-mdfs_clk_cfg);
 
@@ -107,8 +94,8 @@ static bool mctl_rank_detect(u32 *gsr0, int rank)
const u32 done = MCTL_DX_GSR0_RANK0_TRAIN_DONE  rank;
const u32 err = MCTL_DX_GSR0_RANK0_TRAIN_ERR  rank;
 
-   await_completion(gsr0, done, done);
-   await_completion(gsr0 + 0x10, done, done);
+   mctl_await_completion(gsr0, done, done);
+   mctl_await_completion(gsr0 + 0x10, done, done);
 
return !(readl(gsr0)  err)  !(readl(gsr0 + 0x10)  err);
 }
@@ -129,7 +116,7 @@ static void mctl_channel_init(int ch_index, struct 
dram_sun6i_para *para)
}
 
writel(MCTL_MCMD_NOP, mctl_ctl-mcmd);
-   await_completion(mctl_ctl-mcmd, MCTL_MCMD_BUSY, 0);
+   mctl_await_completion(mctl_ctl-mcmd, MCTL_MCMD_BUSY, 0);
 
/* PHY initialization */
writel(MCTL_PGCR, mctl_phy-pgcr);
@@ -166,14 +153,14 @@ static void mctl_channel_init(int ch_index, struct 
dram_sun6i_para *para)
writel(MCTL_DX_GCR | MCTL_DX_GCR_EN, mctl_phy-dx2gcr);
writel(MCTL_DX_GCR | MCTL_DX_GCR_EN, mctl_phy-dx3gcr);
 
-   await_completion(mctl_phy-pgsr, 0x03, 0x03);
+   mctl_await_completion(mctl_phy-pgsr, 0x03, 0x03);
 
writel(CONFIG_DRAM_ZQ, mctl_phy-zq0cr1);
 
setbits_le32(mctl_phy-pir, MCTL_PIR_CLEAR_STATUS);
writel(MCTL_PIR_STEP1, mctl_phy-pir);
udelay(10);
-   await_completion(mctl_phy-pgsr, 0x1f, 0x1f);
+   mctl_await_completion(mctl_phy-pgsr, 0x1f, 0x1f);
 
/* rank detect */
if (!mctl_rank_detect(mctl_phy-dx0gsr0, 1)) {
@@ -204,14 +191,14 @@ static void mctl_channel_init(int ch_index, struct 
dram_sun6i_para *para)
setbits_le32(mctl_phy-pir, MCTL_PIR_CLEAR_STATUS);
writel(MCTL_PIR_STEP2, mctl_phy-pir);
udelay(10);
-   await_completion(mctl_phy-pgsr, 0x11, 0x11);
+   mctl_await_completion(mctl_phy-pgsr, 0x11, 0x11);
 
if (readl(mctl_phy-pgsr)  MCTL_PGSR_TRAIN_ERR_MASK)
panic(Training error initialising DRAM\n);
 
/* Move to configure state */
writel(MCTL_SCTL_CONFIG, mctl_ctl-sctl);
-   await_completion(mctl_ctl-sstat, 0x07, 0x01);
+   mctl_await_completion(mctl_ctl-sstat, 0x07, 0x01);
 
/* Set number of clks per micro-second */
writel(DRAM_CLK / 100, mctl_ctl-togcnt1u);

[U-Boot] [PATCH 12/14] sunxi: Use memcmp for mctl_mem_matches

Use memcmp for mctl_mem_matches instead of DIY.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 arch/arm/include/asm/arch-sunxi/dram.h | 12 +++-
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/arch/arm/include/asm/arch-sunxi/dram.h 
b/arch/arm/include/asm/arch-sunxi/dram.h
index 0bf718c..a8a37d5 100644
--- a/arch/arm/include/asm/arch-sunxi/dram.h
+++ b/arch/arm/include/asm/arch-sunxi/dram.h
@@ -55,15 +55,9 @@ static inline void mctl_mem_fill(void)
  */
 static inline bool mctl_mem_matches(u32 offset)
 {
-   int i, matches = 0;
-
-   for (i = 0; i  MCTL_MEM_FILL_MATCH_COUNT; i++) {
-   if (readl(CONFIG_SYS_SDRAM_BASE + i * 4) ==
-   readl(CONFIG_SYS_SDRAM_BASE + offset + i * 4))
-   matches++;
-   }
-
-   return matches == MCTL_MEM_FILL_MATCH_COUNT;
+   return memcmp((u32 *)CONFIG_SYS_SDRAM_BASE,
+ (u32 *)(CONFIG_SYS_SDRAM_BASE + offset),
+ MCTL_MEM_FILL_MATCH_COUNT * 4) == 0;
 }
 
 #endif /* _SUNXI_DRAM_H */
-- 
2.1.0

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[U-Boot] [PATCH 11/14] sunxi: Fill memory before comparing it when doing dram init on sun6i

The sun8i boot0 code fills the DRAM with a random pattern before comparing
it at different offsets to do columns, etc. detection. The sun6i boot0 code
does not do it, but it seems like a good idea to do this regardless.

The new mctl_mem_fill function this introduces is added as an inline helper
in dram.h, so that it can be shared with the sun8i dram code.

While at it move mctl_mem_matches to dram.h for re-use in sun8i too.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 arch/arm/cpu/armv7/sunxi/dram_sun6i.c  | 15 +--
 arch/arm/include/asm/arch-sunxi/dram.h | 29 +
 2 files changed, 30 insertions(+), 14 deletions(-)

diff --git a/arch/arm/cpu/armv7/sunxi/dram_sun6i.c 
b/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
index e1670e5..4675c48 100644
--- a/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
@@ -326,20 +326,6 @@ static void mctl_port_cfg(void)
writel(0x0307, mctl_com-mbagcr[5]);
 }
 
-static bool mctl_mem_matches(u32 offset)
-{
-   const int match_count = 64;
-   int i, matches = 0;
-
-   for (i = 0; i  match_count; i++) {
-   if (readl(CONFIG_SYS_SDRAM_BASE + i * 4) ==
-   readl(CONFIG_SYS_SDRAM_BASE + offset + i * 4))
-   matches++;
-   }
-
-   return matches == match_count;
-}
-
 unsigned long sunxi_dram_init(void)
 {
struct sunxi_mctl_com_reg * const mctl_com =
@@ -391,6 +377,7 @@ unsigned long sunxi_dram_init(void)
MCTL_CR_BANK(1) | MCTL_CR_RANK(1));
 
/* Detect and set page size */
+   mctl_mem_fill();
for (columns = 7; columns  20; columns++) {
if (mctl_mem_matches(1  columns))
break;
diff --git a/arch/arm/include/asm/arch-sunxi/dram.h 
b/arch/arm/include/asm/arch-sunxi/dram.h
index 18924f5..0bf718c 100644
--- a/arch/arm/include/asm/arch-sunxi/dram.h
+++ b/arch/arm/include/asm/arch-sunxi/dram.h
@@ -22,6 +22,8 @@
 #include asm/arch/dram_sun4i.h
 #endif
 
+#define MCTL_MEM_FILL_MATCH_COUNT 64
+
 unsigned long sunxi_dram_init(void);
 
 /*
@@ -37,4 +39,31 @@ static inline void mctl_await_completion(u32 *reg, u32 mask, 
u32 val)
}
 }
 
+/*
+ * Fill beginning of DRAM with random data for mctl_mem_matches()
+ */
+static inline void mctl_mem_fill(void)
+{
+   int i;
+
+   for (i = 0; i  MCTL_MEM_FILL_MATCH_COUNT; i++)
+   writel(0xaa55aa55 + i, CONFIG_SYS_SDRAM_BASE + i * 4);
+}
+
+/*
+ * Test if memory at offset offset matches memory at begin of DRAM
+ */
+static inline bool mctl_mem_matches(u32 offset)
+{
+   int i, matches = 0;
+
+   for (i = 0; i  MCTL_MEM_FILL_MATCH_COUNT; i++) {
+   if (readl(CONFIG_SYS_SDRAM_BASE + i * 4) ==
+   readl(CONFIG_SYS_SDRAM_BASE + offset + i * 4))
+   matches++;
+   }
+
+   return matches == MCTL_MEM_FILL_MATCH_COUNT;
+}
+
 #endif /* _SUNXI_DRAM_H */
-- 
2.1.0

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[U-Boot] [PATCH 08/14] sun6i: Add a sigma_delta_enable paramter to clock_set_pll5()

The sun8i dram code sometimes wants to enable sigma delta mode,
add a parameter to allow this.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 arch/arm/cpu/armv7/sunxi/clock_sun6i.c| 9 +++--
 arch/arm/cpu/armv7/sunxi/dram_sun6i.c | 2 +-
 arch/arm/include/asm/arch-sunxi/clock.h   | 1 -
 arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 5 +
 4 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c 
b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
index 8e949c6..193e314 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
@@ -144,15 +144,20 @@ void clock_set_pll3(unsigned int clk)
   ccm-pll3_cfg);
 }
 
-void clock_set_pll5(unsigned int clk)
+void clock_set_pll5(unsigned int clk, bool sigma_delta_enable)
 {
struct sunxi_ccm_reg * const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
const int k = 2;
const int m = 1;
 
+   if (sigma_delta_enable)
+   writel(CCM_PLL5_PATTERN, ccm-pll5_pattern_cfg);
+
/* PLL5 rate = 2400 * n * k / m */
-   writel(CCM_PLL5_CTRL_EN | CCM_PLL5_CTRL_UPD |
+   writel(CCM_PLL5_CTRL_EN |
+  (sigma_delta_enable ? CCM_PLL5_CTRL_SIGMA_DELTA_EN : 0) |
+  CCM_PLL5_CTRL_UPD |
   CCM_PLL5_CTRL_N(clk / (2400 * k / m)) |
   CCM_PLL5_CTRL_K(k) | CCM_PLL5_CTRL_M(m), ccm-pll5_cfg);
 
diff --git a/arch/arm/cpu/armv7/sunxi/dram_sun6i.c 
b/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
index 61bb8d4..bc6428a 100644
--- a/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/dram_sun6i.c
@@ -46,7 +46,7 @@ static void mctl_sys_init(void)
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
const int dram_clk_div = 2;
 
-   clock_set_pll5(DRAM_CLK * dram_clk_div);
+   clock_set_pll5(DRAM_CLK * dram_clk_div, false);
 
clrsetbits_le32(ccm-dram_clk_cfg, CCM_DRAMCLK_CFG_DIV0_MASK,
CCM_DRAMCLK_CFG_DIV0(dram_clk_div) | CCM_DRAMCLK_CFG_RST |
diff --git a/arch/arm/include/asm/arch-sunxi/clock.h 
b/arch/arm/include/asm/arch-sunxi/clock.h
index 64acff3..505c363 100644
--- a/arch/arm/include/asm/arch-sunxi/clock.h
+++ b/arch/arm/include/asm/arch-sunxi/clock.h
@@ -26,7 +26,6 @@ int clock_init(void);
 int clock_twi_onoff(int port, int state);
 void clock_set_pll1(unsigned int hz);
 void clock_set_pll3(unsigned int hz);
-void clock_set_pll5(unsigned int hz);
 unsigned int clock_get_pll5p(void);
 unsigned int clock_get_pll6(void);
 void clock_set_de_mod_clock(u32 *clk_cfg, unsigned int hz);
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h 
b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index 3d4fcd1..f807af3 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -185,6 +185,7 @@ struct sunxi_ccm_reg {
 #define CCM_PLL5_CTRL_K(n) n) - 1)  0x3)  4)
 #define CCM_PLL5_CTRL_N(n) n) - 1)  0x1f)  8)
 #define CCM_PLL5_CTRL_UPD  (0x1  20)
+#define CCM_PLL5_CTRL_SIGMA_DELTA_EN   (0x1  24)
 #define CCM_PLL5_CTRL_EN   (0x1  31)
 
 #define PLL6_CFG_DEFAULT   0x90041811 /* 600 MHz */
@@ -274,6 +275,8 @@ struct sunxi_ccm_reg {
 
 #define MBUS_CLK_DEFAULT   0x8101 /* PLL6 / 2 */
 
+#define CCM_PLL5_PATTERN   0xd130
+
 /* ahb_reset0 offsets */
 #define AHB_RESET_OFFSET_GMAC  17
 #define AHB_RESET_OFFSET_MCTL  14
@@ -308,4 +311,6 @@ struct sunxi_ccm_reg {
 #define CCM_DE_CTRL_PLL10  (5  24)
 #define CCM_DE_CTRL_GATE   (1  31)
 
+void clock_set_pll5(unsigned int clk, bool sigma_delta_enable);
+
 #endif /* _SUNXI_CLOCK_SUN6I_H */
-- 
2.1.0

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[U-Boot] [PATCH 13/14] sun8i: Add dram initialization support

Based on the register / dram_para headers from the Allwinner u-boot / linux
sources + the init sequences from boot0.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 arch/arm/cpu/armv7/sunxi/Makefile |   1 +
 arch/arm/cpu/armv7/sunxi/board.c  |   3 +-
 arch/arm/cpu/armv7/sunxi/dram_sun8i.c | 340 ++
 arch/arm/include/asm/arch-sunxi/clock_sun6i.h |   4 +
 arch/arm/include/asm/arch-sunxi/dram.h|   2 +
 arch/arm/include/asm/arch-sunxi/dram_sun8i.h  | 266 
 board/sunxi/Kconfig   |   3 +-
 configs/Ippo_q8h_v5_defconfig |  17 +-
 include/configs/sun8i.h   |   2 +
 9 files changed, 631 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/sunxi/dram_sun8i.c
 create mode 100644 arch/arm/include/asm/arch-sunxi/dram_sun8i.h

diff --git a/arch/arm/cpu/armv7/sunxi/Makefile 
b/arch/arm/cpu/armv7/sunxi/Makefile
index 3e8975a..1e89937 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_MACH_SUN4I)  += dram_sun4i.o
 obj-$(CONFIG_MACH_SUN5I)   += dram_sun4i.o
 obj-$(CONFIG_MACH_SUN6I)   += dram_sun6i.o
 obj-$(CONFIG_MACH_SUN7I)   += dram_sun4i.o
+obj-$(CONFIG_MACH_SUN8I)   += dram_sun8i.o
 ifdef CONFIG_SPL_FEL
 obj-y  += start.o
 endif
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 9b3e80c..bc98c56 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -114,7 +114,8 @@ void reset_cpu(ulong addr)
 /* do some early init */
 void s_init(void)
 {
-#if defined CONFIG_SPL_BUILD  defined CONFIG_MACH_SUN6I
+#if defined CONFIG_SPL_BUILD  \
+   (defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I)
/* Magic (undocmented) value taken from boot0, without this DRAM
 * access gets messed up (seems cache related) */
setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0x1800);
diff --git a/arch/arm/cpu/armv7/sunxi/dram_sun8i.c 
b/arch/arm/cpu/armv7/sunxi/dram_sun8i.c
new file mode 100644
index 000..3736fd1
--- /dev/null
+++ b/arch/arm/cpu/armv7/sunxi/dram_sun8i.c
@@ -0,0 +1,340 @@
+/*
+ * Sun8i platform dram controller init.
+ *
+ * (C) Copyright 2014 Hans de Goede hdego...@redhat.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * Note this code uses a lot of magic hex values, that is because this code
+ * simply replays the init sequence as done by the Allwinner boot0 code, so
+ * we do not know what these values mean. There are no symbolic constants for
+ * these magic values, since we do not know how to name them and making up
+ * names for them is not useful.
+ */
+
+#include common.h
+#include errno.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/dram.h
+#include asm/arch/prcm.h
+
+static const struct dram_para dram_para = {
+   .clock = CONFIG_DRAM_CLK,
+   .type = 3,
+   .zq = CONFIG_DRAM_ZQ,
+   .odt_en = 1,
+   .para1 = 0, /* not used (only used when tpr13 bit 31 is set */
+   .para2 = 0, /* not used (only used when tpr13 bit 31 is set */
+   .mr0 = 6736,
+   .mr1 = 4,
+   .mr2 = 16,
+   .mr3 = 0,
+   /* tpr0 - 10 contain timing constants or-ed together in u32 vals */
+   .tpr0 = 0x2ab83def,
+   .tpr1 = 0x18082356,
+   .tpr2 = 0x00034156,
+   .tpr3 = 0x448c5533,
+   .tpr4 = 0x08010d00,
+   .tpr5 = 0x0340b20f,
+   .tpr6 = 0x20d118cc,
+   .tpr7 = 0x14062485,
+   .tpr8 = 0x220d1d52,
+   .tpr9 = 0x1e078c22,
+   .tpr10 = 0x3c,
+   .tpr11 = 0, /* not used */
+   .tpr12 = 0, /* not used */
+   .tpr13 = 0x3,
+};
+
+static void mctl_sys_init(void)
+{
+   struct sunxi_ccm_reg * const ccm =
+   (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+   /* enable pll5, note the divide by 2 is deliberate! */
+   clock_set_pll5(dram_para.clock * 100 / 2, 1, 2,
+  dram_para.tpr13  0x4);
+
+   /* deassert ahb mctl reset */
+   setbits_le32(ccm-ahb_reset0_cfg, 1  AHB_RESET_OFFSET_MCTL);
+
+   /* enable ahb mctl clock */
+   setbits_le32(ccm-ahb_gate0, 1  AHB_GATE_OFFSET_MCTL);
+}
+
+static void mctl_apply_odt_correction(u32 *reg, int correction)
+{
+   int val;
+
+   val = (readl(reg)  8)  0xff;
+   val += correction;
+
+   /* clamp */
+   if (val  0)
+   val = 0;
+   else if (val  255)
+   val = 255;
+
+   clrsetbits_le32(reg, 0xff00, val  8);
+}
+
+static void mctl_init(u32 *bus_width)
+{
+   struct sunxi_ccm_reg * const ccm =
+   (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+   struct sunxi_mctl_com_reg * const mctl_com =
+   (struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE;
+   struct sunxi_mctl_ctl_reg * const mctl_ctl =
+   (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE;
+   struct sunxi_mctl_phy_reg * const

[U-Boot] [PATCH 14/14] sun8i: Add defconfig for Ippo_q8h v1.2

We need separate defconfigs for the v5 and v1.2 versions of this board, as
they use different DRAM parameters.

Note they also use different dtb files, as the wifi is different too.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 configs/Ippo_q8h_v1.2_defconfig | 15 +++
 1 file changed, 15 insertions(+)
 create mode 100644 configs/Ippo_q8h_v1.2_defconfig

diff --git a/configs/Ippo_q8h_v1.2_defconfig b/configs/Ippo_q8h_v1.2_defconfig
new file mode 100644
index 000..fefed32
--- /dev/null
+++ b/configs/Ippo_q8h_v1.2_defconfig
@@ -0,0 +1,15 @@
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS=CONS_INDEX=5
+CONFIG_FDTFILE=sun8i-a23-ippo-q8h-v1.2.dtb
+CONFIG_VIDEO=n
+CONFIG_USB_KEYBOARD=n
++S:CONFIG_ARM=y
++S:CONFIG_ARCH_SUNXI=y
++S:CONFIG_MACH_SUN8I=y
++S:CONFIG_DRAM_CLK=432
+# zq = 0xf74a
++S:CONFIG_DRAM_ZQ=63306
+# Wifi power
++S:CONFIG_AXP221_DLDO1_VOLT=3300
+# aldo1 is connected to VCC-IO, VCC-PD, VCC-USB and VCC-HP
++S:CONFIG_AXP221_ALDO1_VOLT=3000
-- 
2.1.0

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Re: [U-Boot] [PATCH] fat: scripts for prepare and test read fat files

Hi Przemyslaw,

On 12 December 2014 at 08:54, Przemyslaw Marczak p.marc...@samsung.com wrote:

 Hello,


 On 12/12/2014 04:52 PM, Przemyslaw Marczak wrote:

 -
 mktest_files: script for generating random size long name files
 -
 Usage:
 ./1_mktest_files.sh count

 count - number of files to be generated

 The output directory is: ./test_files

 -
 copy_files: copy the test_files/* into test partition mount point
 -
 Usage:
 ./2_copy_files.sh mount_point

 ---
 fat_test.sh: test fat read by write commands to the device console
 --
 This script send commands to U-Boot console.
 First specify few script variables, e.g:
 - TTY=/dev/ttyS0
 - MMCDEV=0
 - PARTITION=2
 - LOAD_ADDR=0x4000

 usage:
 1. Target:
 run: ums 0 mmc 0
 2. Run script 1 and 2 to make and copy the test files
 onto the test partition by UMS
 3. This script:
 - set test device $PARTITION and other variables in the script,
   which is required for sending proper commands
 - set $TTY in the script
 run: ./3_fat_test.sh
 4. Compare the crc results on the target and device consoles
 (sorry for the mess on the console)

 Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
 ---
   1_mktest_files.sh | 82 
 +++
   2_copy_files.sh   | 20 ++
   3_fat_test.sh | 38 ++
   3 files changed, 140 insertions(+)
   create mode 100755 1_mktest_files.sh
   create mode 100755 2_copy_files.sh
   create mode 100755 3_fat_test.sh


 This is just for some quick test.
 I will add something more pretty to the sandbox.

Perhaps this should be written in Python? We now have quite a few
tests and it's getting to the point where we might want to have a way
to run them all, check results, etc. That would be easier if we could
import them through some standard interface. For now, perhaps we
should avoid shell scripts except for really trivial things.

You can bring in the patman libraries (we could break these out into
another dir but it doesn't seem important):

import os
import sys

# Bring in the patman libraries
our_path = os.path.dirname(os.path.realpath(__file__))
sys.path.append(os.path.join(our_path, 'tools/patman'))

import command

The, for example:
print command.Output('ls', '-l')

Regards,
Simon
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Re: [U-Boot] [PATCH] spl: mmc: Fix raw boot mode (related to commit 4c5bbc2328a24f5e1ee990c9a9527e48e5fb3b5f)

2014-12-16 Thread Robert Nelson

On Tue, Dec 16, 2014 at 11:43 AM, Guillaume Gardet
guillaume.gar...@free.fr wrote:

 Le 16/12/2014 18:16, Robert Nelson a écrit :

 On Tue, Dec 16, 2014 at 5:00 AM, Guillaume GARDET
 guillaume.gar...@free.fr wrote:

 As reported by Robert Nelson, commit
 4c5bbc2328a24f5e1ee990c9a9527e48e5fb3b5f
 may break MMC RAW boot mode.
 This patch fixes the check path to fix MMC Raw boot mode.

 Tested raw boot mode and FS boot mode on a pandaboard (rev. A3).

 Reported-by: Robert Nelson robertcnel...@gmail.com
 Signed-off-by: Guillaume GARDET guillaume.gar...@free.fr

Tested-by: Robert Nelson robertcnel...@gmail.com


 Cc: Tom Rini tr...@ti.com
 Cc: Robert Nelson robertcnel...@gmail.com

 Thanks Guillaume!

 Tested in raw  fs mode on a beaglebone black (microSD  eMMC)


 Thanks for testing it. :) You could add your tested by tag.


I always forget. ;)

Regards,

-- 
Robert Nelson
http://www.rcn-ee.com/
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Re: [U-Boot] [PATCH 1/2] kbuild: Fix a false error of generic board support

2014-12-16 Thread mgerlach


Hello Masahiro Yamada,

Even the with this patch, we encountered a false error of generic board
support.  The problem was very interrmittent for us, but we were able 
to debug the problem to performing builds on EXT3 file systems which
have a time stamp resolution of one second.  To reproduce the problem,
touch ./include/config/auto.conf and .config on a configured uboot tree on
an EXT3 file system.

The patch below fixes the problem for us.  

Thanks,

Matthew Gerlach

---
 Makefile | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 99097e1..84de2f9 100644
--- a/Makefile
+++ b/Makefile
@@ -493,8 +493,12 @@ include/config/%.conf: $(KCONFIG_CONFIG) 
include/config/auto.conf.cmd
 # is up-to-date. When we switch to a different board configuration, old 
CONFIG
 # macros are still remaining in include/config/auto.conf. Without the 
following
 # gimmick, wrong config.mk would be included leading nasty 
warnings/errors.
-autoconf_is_current := $(if $(wildcard $(KCONFIG_CONFIG)),$(shell find . 
\
-   -path ./include/config/auto.conf -newer 
$(KCONFIG_CONFIG)))
+# We use if not (not -newer) so that we include config.mk in the event 
that the
+# file timestamps are exacty equal which can happen on EXT3 filesystems.
+autoconf_is_current := $(if $(wildcard $(KCONFIG_CONFIG)),\
+   $(if $(shell find . -path ./include/config/auto.conf \
+   \! -newer $(KCONFIG_CONFIG)),,./include/config/auto.conf))
+
 ifneq ($(autoconf_is_current),)
 include $(srctree)/config.mk
 endif
-- 
1.8.2.

 Before this commit, make terminated with an error
 where it shouldn't under some condition.

 This bug happened when we built a board unsupporting
 generic board right after building with generic board.

 For example, the following sequence failed.
 (harmony uses generic board but microblaze-generic does not
 support it)

   $ make harmony_config
   Configuring for harmony board...
   $ make CROSS_COMPILE=arm-linux-gnueabi-
 [ Build succeed ]
   $ make microblaze-generic_config
   Configuring for microblaze-generic board...
   $ make CROSS_COMPILE=microblaze-linux-
   Makefile:488: *** Your architecture does not support generic board.
   Please undefined CONFIG_SYS_GENERIC_BOARD in your board config file.
 Stop.

 We had to do make mrproper before building the microblaze board.

 This commit fixes this unconvenience.

 Move generic board sanity check to prepare1 target,
 which is run after generation of include/autoconf.mk.

 Signed-off-by: Masahiro Yamada yamada.m at jp.panasonic.com
 ---
~  





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Re: [U-Boot] [PATCH] Fix hash verification

Hi Nikolay,

On 12 December 2014 at 11:01,  picmas...@mail.bg wrote:
 From: Nikolay Dimitrov picmas...@mail.bg

 Fix issue in parse_verify_sum() which swaps handling of env-var and *address.
 Move hash_command() argc check earlier.
 Cosmetic change on do_hash() variable declaration.
 Improved help message for hash command.

 Signed-off-by: Nikolay Dimitrov picmas...@mail.bg

Thanks for this. Main change looks good, a few nits.

 ---
  common/cmd_hash.c |   28 +---
  common/hash.c |6 ++
  2 files changed, 15 insertions(+), 19 deletions(-)

 diff --git a/common/cmd_hash.c b/common/cmd_hash.c
 index 90facbb..704d21e 100644
 --- a/common/cmd_hash.c
 +++ b/common/cmd_hash.c
 @@ -18,9 +18,9 @@
  static int do_hash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  {
 char *s;
 -#ifdef CONFIG_HASH_VERIFY
 int flags = HASH_FLAG_ENV;

 +#ifdef CONFIG_HASH_VERIFY
 if (argc  4)
 return CMD_RET_USAGE;
 if (!strcmp(argv[1], -v)) {
 @@ -28,8 +28,6 @@ static int do_hash(cmd_tbl_t *cmdtp, int flag, int argc, 
 char * const argv[])
 argc--;
 argv++;
 }
 -#else
 -   const int flags = HASH_FLAG_ENV;
  #endif
 /* Move forward to 'algorithm' parameter */
 argc--;
 @@ -40,19 +38,19 @@ static int do_hash(cmd_tbl_t *cmdtp, int flag, int argc, 
 char * const argv[])
  }

  #ifdef CONFIG_HASH_VERIFY
 -U_BOOT_CMD(
 -   hash,   6,  1,  do_hash,
 -   compute hash message digest,
 -   algorithm address count [[*]sum_dest]\n
 -   - compute message digest [save to env var / *address]\n
 -   hash -v algorithm address count [*]sum\n
 -   - verify hash of memory area with env var / *address
 -);
 +#define HARGS 6
  #else
 +#define HARGS 5
 +#endif
 +
  U_BOOT_CMD(
 -   hash,   5,  1,  do_hash,
 -   compute message digest,
 -   algorithm address count [[*]sum_dest]\n
 +   hash,   HARGS,  1,  do_hash,
 +   compute hash message digest,
 +   algorithm address count [[*]hash_dest]\n
 - compute message digest [save to env var / *address]
 -);
 +#ifdef CONFIG_HASH_VERIFY
 +   \nhash -v algorithm address count [*]hash\n
 +   - verify message digest of memory area to immediate 
 value, \n

Perhaps  verify message digest of memory area, display result or
write to env var or *address

  #endif
 +);
 diff --git a/common/hash.c b/common/hash.c
 index 12d6759..aceabc5 100644
 --- a/common/hash.c
 +++ b/common/hash.c
 @@ -256,7 +256,7 @@ static int parse_verify_sum(struct hash_algo *algo, char 
 *verify_str,
 env_var = 1;
 }

 -   if (env_var) {
 +   if (!env_var) {
 ulong addr;
 void *buf;

 @@ -347,7 +347,7 @@ int hash_command(const char *algo_name, int flags, 
 cmd_tbl_t *cmdtp, int flag,
  {
 ulong addr, len;

 -   if (argc  2)
 +   if ((argc  2) || ((flags  HASH_FLAG_VERIFY)  (argc  3)))
 return CMD_RET_USAGE;

 addr = simple_strtoul(*argv++, NULL, 16);
 @@ -380,8 +380,6 @@ int hash_command(const char *algo_name, int flags, 
 cmd_tbl_t *cmdtp, int flag,
  #else
 if (0) {
  #endif
 -   if (!argc)
 -   return CMD_RET_USAGE;

What does this change achieve?

 if (parse_verify_sum(algo, *argv, vsum,
 flags  HASH_FLAG_ENV)) {
 printf(ERROR: %s does not contain a valid 
 --
 1.7.10.4


Regards,
Simon
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Re: [U-Boot] [PATCH] Fix hash verification

2014-12-16 Thread Nikolay Dimitrov


Hi Simon,

On 12/17/2014 12:02 AM, Simon Glass wrote:

Hi Nikolay,

On 12 December 2014 at 11:01,  picmas...@mail.bg wrote:

From: Nikolay Dimitrov picmas...@mail.bg

Fix issue in parse_verify_sum() which swaps handling of env-var and *address.
Move hash_command() argc check earlier.
Cosmetic change on do_hash() variable declaration.
Improved help message for hash command.

Signed-off-by: Nikolay Dimitrov picmas...@mail.bg


Thanks for this. Main change looks good, a few nits.


---
  common/cmd_hash.c |   28 +---
  common/hash.c |6 ++
  2 files changed, 15 insertions(+), 19 deletions(-)

diff --git a/common/cmd_hash.c b/common/cmd_hash.c
index 90facbb..704d21e 100644
--- a/common/cmd_hash.c
+++ b/common/cmd_hash.c
@@ -18,9 +18,9 @@
  static int do_hash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  {
 char *s;
-#ifdef CONFIG_HASH_VERIFY
 int flags = HASH_FLAG_ENV;

+#ifdef CONFIG_HASH_VERIFY
 if (argc  4)
 return CMD_RET_USAGE;
 if (!strcmp(argv[1], -v)) {
@@ -28,8 +28,6 @@ static int do_hash(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
 argc--;
 argv++;
 }
-#else
-   const int flags = HASH_FLAG_ENV;
  #endif
 /* Move forward to 'algorithm' parameter */
 argc--;
@@ -40,19 +38,19 @@ static int do_hash(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
  }

  #ifdef CONFIG_HASH_VERIFY
-U_BOOT_CMD(
-   hash,   6,  1,  do_hash,
-   compute hash message digest,
-   algorithm address count [[*]sum_dest]\n
-   - compute message digest [save to env var / *address]\n
-   hash -v algorithm address count [*]sum\n
-   - verify hash of memory area with env var / *address
-);
+#define HARGS 6
  #else
+#define HARGS 5
+#endif
+
  U_BOOT_CMD(
-   hash,   5,  1,  do_hash,
-   compute message digest,
-   algorithm address count [[*]sum_dest]\n
+   hash,   HARGS,  1,  do_hash,
+   compute hash message digest,
+   algorithm address count [[*]hash_dest]\n
 - compute message digest [save to env var / *address]
-);
+#ifdef CONFIG_HASH_VERIFY
+   \nhash -v algorithm address count [*]hash\n
+   - verify message digest of memory area to immediate value, 
\n


Perhaps  verify message digest of memory area, display result or
write to env var or *address


I think that the initial description was appropriate, because the
hash command supports 3 modes of operation (I chose crc32 for shorter
examples):

1. Verify hash against immediate value, like this

hash -v crc32 0x2000 $filesize e9b11acd

2. Verify hash against environment variable, which holds the actual
hash value

hash -v crc32 0x2000 $filesize env_var_name

3, Verify hash against value, placed at specific memory address

hash -v crc32 0x2000 $filesize *0x3000

As far as I observed the code and its behavior, the only case when the
hash -v result was printed was when the verification failed. Please
correct me if I'm wrong.


  #endif
+);
diff --git a/common/hash.c b/common/hash.c
index 12d6759..aceabc5 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -256,7 +256,7 @@ static int parse_verify_sum(struct hash_algo *algo, char 
*verify_str,
 env_var = 1;
 }

-   if (env_var) {
+   if (!env_var) {
 ulong addr;
 void *buf;

@@ -347,7 +347,7 @@ int hash_command(const char *algo_name, int flags, 
cmd_tbl_t *cmdtp, int flag,
  {
 ulong addr, len;

-   if (argc  2)
+   if ((argc  2) || ((flags  HASH_FLAG_VERIFY)  (argc  3)))
 return CMD_RET_USAGE;

 addr = simple_strtoul(*argv++, NULL, 16);
@@ -380,8 +380,6 @@ int hash_command(const char *algo_name, int flags, 
cmd_tbl_t *cmdtp, int flag,
  #else
 if (0) {
  #endif
-   if (!argc)
-   return CMD_RET_USAGE;


What does this change achieve?


I moved the verification earlier, because the original implementation
first calculated the hash and just then complained about the last
missing argument. My personal understanding is that errors should be
caught as early as possible, and work should be done only as necessary
:D.




 if (parse_verify_sum(algo, *argv, vsum,
 flags  HASH_FLAG_ENV)) {
 printf(ERROR: %s does not contain a valid 
--
1.7.10.4



Regards,
Simon


Kind regards,
Nikolay
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Re: [U-Boot] [PATCH] fs: fat: read: fix fat16 ls/read issue

Hi Przemyslaw,

On 12 December 2014 at 08:30, Przemyslaw Marczak p.marc...@samsung.com wrote:
Hello,

On 12/12/2014 01:32 AM, Simon Glass wrote:

Hi Przemyslaw,

On 11 December 2014 at 05:01, Przemyslaw Marczak p.marc...@samsung.com
wrote:

The present fat implementation ignores FAT16 long name
directory entries which aren't placed in a single sector.

This was becouse of the buffer was always filled by the
two sectors, and the loop was made also for two sectors.

If some file long name entries are stored in two sectors,
the we have two cases:

Case 1:
Both of sectors are in the buffer - all required data
for long file name is in the buffer.
- Read OK!

Case 2:
The current directory entry is placed at the end of the
second buffered sector. And the next entries are placed
in a sector which is not buffered yet. Then two next
sectors are buffered and the mentioned entry is ignored.
- Read fail!

This commit fixes this issue by:
- read two sectors after loop on each single is done
- keep the last used sector as a first in the buffer
before the read of two next

The commit doesn't affects the fat32 imlementation,
which works good as previous.

This is very interesting\! Is this the same failure that I saw on this
thread?

http://u-boot.10912.n7.nabble.com/PATCH-U-Boot-ARM-rpi-b-detect-board-revision-td196720.html

(search for fatload)

I tried this out. It worked OK for me except that it can't find the
device tree file bcm2835-rpi-b-rev2.dtb.

Oddly I can fatload it from /bcm2835-rpi-b-rev2.dtb but when I try
from /syslinux/..//bcm2835-rpi-b-rev2.dtb it fails and cannot find the
file. Reducing the filename length to 8 chars works. I wonder what
year of my life FAT will stop plaguing me?

Also can you write a test for this in test/fs/fs-test.sh?

Regards,
Simon

[snip]

Probably this is an another case which is caused by the sector buffer bug.
Does this patch fixed your issue?

I have some simple test for manual use with the ums tool.
It just copy the test files to the tested fat16 partition mounted using the
UMS, next it computes CRC32 of those files on the host and next using U-Boot
fatload/crc32 commands - it tests the read feature. But it's not full
automated - I didn't work on getting the log from U-Boot console.

So I could check if the file checksums are proper and if all files were
found on the partiion, by the U-Boot read command. It's not useful for the
test/fs/fs-test.sh because this is not designed for the sandbox.
My test writes some commands directly to U-Boot console, like this: echo
some cmd /dev/ttyS0.

Unfortunately the sandbox config seems to be broken.

The bug was not so obvious, any read/write on fat partition can change fat
directory entries or add the new ones and then all data can be read right.

I will send the scripts for such simple test.

I'm not sure if it fixes my problem but it seems likely. I will see if
I can make time to test it.

If you want to write input data to U-Boot sandbox we can do that
fairly easily. You can import cros_subprocess and use the function
there to generate output from your test and inspect the input from
U-Boot's command line. Let me know if you'd like an example.

Regards,
Simon
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Re: [U-Boot] [PATCH] Fix hash verification

2014-12-16 Thread Nikolay Dimitrov


Hi Simon,

I omitted one clarification, which I think it's important.

On 12/17/2014 12:25 AM, Nikolay Dimitrov wrote:

Hi Simon,

On 12/17/2014 12:02 AM, Simon Glass wrote:

Hi Nikolay,

On 12 December 2014 at 11:01,  picmas...@mail.bg wrote:

From: Nikolay Dimitrov picmas...@mail.bg

Fix issue in parse_verify_sum() which swaps handling of env-var and
*address.
Move hash_command() argc check earlier.
Cosmetic change on do_hash() variable declaration.
Improved help message for hash command.

Signed-off-by: Nikolay Dimitrov picmas...@mail.bg


Thanks for this. Main change looks good, a few nits.


---
  common/cmd_hash.c |   28 +---
  common/hash.c |6 ++
  2 files changed, 15 insertions(+), 19 deletions(-)

diff --git a/common/cmd_hash.c b/common/cmd_hash.c
index 90facbb..704d21e 100644
--- a/common/cmd_hash.c
+++ b/common/cmd_hash.c
@@ -18,9 +18,9 @@
  static int do_hash(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
  {
 char *s;
-#ifdef CONFIG_HASH_VERIFY
 int flags = HASH_FLAG_ENV;

+#ifdef CONFIG_HASH_VERIFY
 if (argc  4)
 return CMD_RET_USAGE;
 if (!strcmp(argv[1], -v)) {
@@ -28,8 +28,6 @@ static int do_hash(cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv[])
 argc--;
 argv++;
 }
-#else
-   const int flags = HASH_FLAG_ENV;
  #endif
 /* Move forward to 'algorithm' parameter */
 argc--;
@@ -40,19 +38,19 @@ static int do_hash(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
  }

  #ifdef CONFIG_HASH_VERIFY
-U_BOOT_CMD(
-   hash,   6,  1,  do_hash,
-   compute hash message digest,
-   algorithm address count [[*]sum_dest]\n
-   - compute message digest [save to env var /
*address]\n
-   hash -v algorithm address count [*]sum\n
-   - verify hash of memory area with env var /
*address
-);
+#define HARGS 6
  #else
+#define HARGS 5
+#endif
+
  U_BOOT_CMD(
-   hash,   5,  1,  do_hash,
-   compute message digest,
-   algorithm address count [[*]sum_dest]\n
+   hash,   HARGS,  1,  do_hash,
+   compute hash message digest,
+   algorithm address count [[*]hash_dest]\n
 - compute message digest [save to env var /
*address]
-);
+#ifdef CONFIG_HASH_VERIFY
+   \nhash -v algorithm address count [*]hash\n
+   - verify message digest of memory area to
immediate value, \n


Perhaps  verify message digest of memory area, display result or
write to env var or *address


I think that the initial description was appropriate, because the
hash command supports 3 modes of operation (I chose crc32 for shorter
examples):

1. Verify hash against immediate value, like this

hash -v crc32 0x2000 $filesize e9b11acd

2. Verify hash against environment variable, which holds the actual
hash value

hash -v crc32 0x2000 $filesize env_var_name

3, Verify hash against value, placed at specific memory address

hash -v crc32 0x2000 $filesize *0x3000

As far as I observed the code and its behavior, the only case when the
hash -v result was printed was when the verification failed. Please
correct me if I'm wrong.


In all these modes of verification, the last argument is used as the
reference value to compare against, this is another reason why it
would be inappropriate to say ...or write to env var or *address.




  #endif
+);
diff --git a/common/hash.c b/common/hash.c
index 12d6759..aceabc5 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -256,7 +256,7 @@ static int parse_verify_sum(struct hash_algo
*algo, char *verify_str,
 env_var = 1;
 }

-   if (env_var) {
+   if (!env_var) {
 ulong addr;
 void *buf;

@@ -347,7 +347,7 @@ int hash_command(const char *algo_name, int
flags, cmd_tbl_t *cmdtp, int flag,
  {
 ulong addr, len;

-   if (argc  2)
+   if ((argc  2) || ((flags  HASH_FLAG_VERIFY)  (argc  3)))
 return CMD_RET_USAGE;

 addr = simple_strtoul(*argv++, NULL, 16);
@@ -380,8 +380,6 @@ int hash_command(const char *algo_name, int
flags, cmd_tbl_t *cmdtp, int flag,
  #else
 if (0) {
  #endif
-   if (!argc)
-   return CMD_RET_USAGE;


What does this change achieve?


I moved the verification earlier, because the original implementation
first calculated the hash and just then complained about the last
missing argument. My personal understanding is that errors should be
caught as early as possible, and work should be done only as necessary
:D.




 if (parse_verify_sum(algo, *argv, vsum,
 flags  HASH_FLAG_ENV)) {
 printf(ERROR: %s does not contain a
valid 
--
1.7.10.4



Regards,
Simon


Kind regards,
Nikolay


Kind regards,
Nikolay

Re: [U-Boot] [PATCH] Fix hash verification

Hi Nikolay,

On 16 December 2014 at 15:29, Nikolay Dimitrov picmas...@mail.bg wrote:
 Hi Simon,

 I omitted one clarification, which I think it's important.


 On 12/17/2014 12:25 AM, Nikolay Dimitrov wrote:

 Hi Simon,

 On 12/17/2014 12:02 AM, Simon Glass wrote:

 Hi Nikolay,

 On 12 December 2014 at 11:01,  picmas...@mail.bg wrote:

 From: Nikolay Dimitrov picmas...@mail.bg

 Fix issue in parse_verify_sum() which swaps handling of env-var and
 *address.
 Move hash_command() argc check earlier.
 Cosmetic change on do_hash() variable declaration.
 Improved help message for hash command.

 Signed-off-by: Nikolay Dimitrov picmas...@mail.bg


 Thanks for this. Main change looks good, a few nits.

 ---
   common/cmd_hash.c |   28 +---
   common/hash.c |6 ++
   2 files changed, 15 insertions(+), 19 deletions(-)

 diff --git a/common/cmd_hash.c b/common/cmd_hash.c
 index 90facbb..704d21e 100644
 --- a/common/cmd_hash.c
 +++ b/common/cmd_hash.c
 @@ -18,9 +18,9 @@
   static int do_hash(cmd_tbl_t *cmdtp, int flag, int argc, char *
 const argv[])
   {
  char *s;
 -#ifdef CONFIG_HASH_VERIFY
  int flags = HASH_FLAG_ENV;

 +#ifdef CONFIG_HASH_VERIFY
  if (argc  4)
  return CMD_RET_USAGE;
  if (!strcmp(argv[1], -v)) {
 @@ -28,8 +28,6 @@ static int do_hash(cmd_tbl_t *cmdtp, int flag, int
 argc, char * const argv[])
  argc--;
  argv++;
  }
 -#else
 -   const int flags = HASH_FLAG_ENV;
   #endif
  /* Move forward to 'algorithm' parameter */
  argc--;
 @@ -40,19 +38,19 @@ static int do_hash(cmd_tbl_t *cmdtp, int flag,
 int argc, char * const argv[])
   }

   #ifdef CONFIG_HASH_VERIFY
 -U_BOOT_CMD(
 -   hash,   6,  1,  do_hash,
 -   compute hash message digest,
 -   algorithm address count [[*]sum_dest]\n
 -   - compute message digest [save to env var /
 *address]\n
 -   hash -v algorithm address count [*]sum\n
 -   - verify hash of memory area with env var /
 *address
 -);
 +#define HARGS 6
   #else
 +#define HARGS 5
 +#endif
 +
   U_BOOT_CMD(
 -   hash,   5,  1,  do_hash,
 -   compute message digest,
 -   algorithm address count [[*]sum_dest]\n
 +   hash,   HARGS,  1,  do_hash,
 +   compute hash message digest,
 +   algorithm address count [[*]hash_dest]\n
  - compute message digest [save to env var /
 *address]
 -);
 +#ifdef CONFIG_HASH_VERIFY
 +   \nhash -v algorithm address count [*]hash\n
 +   - verify message digest of memory area to
 immediate value, \n


 Perhaps  verify message digest of memory area, display result or
 write to env var or *address


 I think that the initial description was appropriate, because the
 hash command supports 3 modes of operation (I chose crc32 for shorter
 examples):

 1. Verify hash against immediate value, like this

 hash -v crc32 0x2000 $filesize e9b11acd

 2. Verify hash against environment variable, which holds the actual
 hash value

 hash -v crc32 0x2000 $filesize env_var_name

 3, Verify hash against value, placed at specific memory address

 hash -v crc32 0x2000 $filesize *0x3000

 As far as I observed the code and its behavior, the only case when the
 hash -v result was printed was when the verification failed. Please
 correct me if I'm wrong.


 In all these modes of verification, the last argument is used as the
 reference value to compare against, this is another reason why it
 would be inappropriate to say ...or write to env var or *address.



   #endif
 +);
 diff --git a/common/hash.c b/common/hash.c
 index 12d6759..aceabc5 100644
 --- a/common/hash.c
 +++ b/common/hash.c
 @@ -256,7 +256,7 @@ static int parse_verify_sum(struct hash_algo
 *algo, char *verify_str,
  env_var = 1;
  }

 -   if (env_var) {
 +   if (!env_var) {
  ulong addr;
  void *buf;

 @@ -347,7 +347,7 @@ int hash_command(const char *algo_name, int
 flags, cmd_tbl_t *cmdtp, int flag,
   {
  ulong addr, len;

 -   if (argc  2)
 +   if ((argc  2) || ((flags  HASH_FLAG_VERIFY)  (argc  3)))
  return CMD_RET_USAGE;

  addr = simple_strtoul(*argv++, NULL, 16);
 @@ -380,8 +380,6 @@ int hash_command(const char *algo_name, int
 flags, cmd_tbl_t *cmdtp, int flag,
   #else
  if (0) {
   #endif
 -   if (!argc)
 -   return CMD_RET_USAGE;


 What does this change achieve?


 I moved the verification earlier, because the original implementation
 first calculated the hash and just then complained about the last
 missing argument. My personal understanding is that errors should be
 caught as early as possible, and work should be done only as necessary
 :D.


  if (parse_verify_sum(algo, *argv, vsum,

Re: [U-Boot] [PATCH v3] common/board_f.c: fix compile error when tracing disabled

On 15 December 2014 at 13:07, Kevin Hilman khil...@kernel.org wrote:
 From: Kevin Hilman khil...@linaro.org

 When CONFIG_TRACE is disabled, linking fails with:

 common/built-in.o:(.data.init_sequence_f+0x8): undefined reference to 
 `trace_early_init'

 To fix, wrap trace init calls with #ifdef CONFIG_TRACE.

 While at it, remove the static inline version of the init call from
 trace.h as suggested by Simon Glass, since it doesnt work.

 Cc: Simon Glass s...@chromium.org
 Cc: Tom Rini tr...@ti.com
 Signed-off-by: Kevin Hilman khil...@linaro.org
 ---
 Applies to v2015.01-rc3

 v3: Actually remove the static inlines this time. :/

  common/board_f.c | 2 ++
  include/trace.h  | 7 ---
  2 files changed, 2 insertions(+), 7 deletions(-)

Acked-by: Simon Glass s...@chromium.org
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[U-Boot] Booting imx6 board via USB-OTG and SPL

2014-12-16 Thread Nikolay Dimitrov


Hi guys,

When booting a fresh imx6 board via USB-OTG, the SPL is kinda useless
for bootstrapping my board when the SPI NOR is empty and u-boot.img
payload is not available.

I currently use a non-SPL U-Boot to prepare my boards after
manufacturing (write fuses  SPI NOR), but do you see a better way to
boot SPL+u-boot.img via OTG?

The reason I'm asking this is that I'm currently using a SPL-enabled
U-Boot as the production boot-loader, and having to support 2 versions
is non-optimal, so I'm looking for a better solution.

Thanks in advance. Regards,
Nikolay
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[U-Boot] [PATCH v2] mmc: rmobile: Add SDHC support for Renesas rmobile ARM SoC

2014-12-16 Thread Nobuhiro Iwamatsu

This adds Renesas rmobile ARM SoC's SD/MMC host support.
This drivers tested with Gose board and Koelsch board.

Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
---
 v2: - Remove global variable, and move to sh_sdhi_host.
 - Remove define for each SoCs, use instead of quirks.
 - Add timeout control for loop.
 - Change printf to debug for some debug messages.
 - Remove volatile declaration.

 arch/arm/include/asm/arch-rmobile/r8a7790.h   |   6 +
 arch/arm/include/asm/arch-rmobile/r8a7791.h   |   5 +
 arch/arm/include/asm/arch-rmobile/r8a7793.h   |   5 +
 arch/arm/include/asm/arch-rmobile/r8a7794.h   |   5 +
 arch/arm/include/asm/arch-rmobile/rcar-base.h |   3 +
 arch/arm/include/asm/arch-rmobile/sh_sdhi.h   | 168 +++
 drivers/mmc/Kconfig   |   9 +
 drivers/mmc/Makefile  |   1 +
 drivers/mmc/sh_sdhi.c | 696 ++
 9 files changed, 898 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-rmobile/sh_sdhi.h
 create mode 100644 drivers/mmc/sh_sdhi.c

diff --git a/arch/arm/include/asm/arch-rmobile/r8a7790.h 
b/arch/arm/include/asm/arch-rmobile/r8a7790.h
index de14869..a70adc6 100644
--- a/arch/arm/include/asm/arch-rmobile/r8a7790.h
+++ b/arch/arm/include/asm/arch-rmobile/r8a7790.h
@@ -15,6 +15,12 @@
 #define CONFIG_SYS_I2C_SH_BASE20xE652
 #define CONFIG_SYS_I2C_SH_BASE30xE60B
 
+/* SDHI */
+#define CONFIG_SYS_SH_SDHI1_BASE 0xEE12
+#define CONFIG_SYS_SH_SDHI2_BASE 0xEE14
+#define CONFIG_SYS_SH_SDHI3_BASE 0xEE16
+#define CONFIG_SYS_SH_SDHI_NR_CHANNEL 4
+
 #define R8A7790_CUT_ES2X   2
 #define IS_R8A7790_ES2()   \
(rmobile_get_cpu_rev_integer() == R8A7790_CUT_ES2X)
diff --git a/arch/arm/include/asm/arch-rmobile/r8a7791.h 
b/arch/arm/include/asm/arch-rmobile/r8a7791.h
index 26a0bd5..658d435 100644
--- a/arch/arm/include/asm/arch-rmobile/r8a7791.h
+++ b/arch/arm/include/asm/arch-rmobile/r8a7791.h
@@ -17,6 +17,11 @@
 /* SH-I2C */
 #define CONFIG_SYS_I2C_SH_BASE20xE60B
 
+/* SDHI */
+#define CONFIG_SYS_SH_SDHI1_BASE 0xEE14
+#define CONFIG_SYS_SH_SDHI2_BASE 0xEE16
+#define CONFIG_SYS_SH_SDHI_NR_CHANNEL 3
+
 #define DBSC3_1_QOS_R0_BASE0xE67A1000
 #define DBSC3_1_QOS_R1_BASE0xE67A1100
 #define DBSC3_1_QOS_R2_BASE0xE67A1200
diff --git a/arch/arm/include/asm/arch-rmobile/r8a7793.h 
b/arch/arm/include/asm/arch-rmobile/r8a7793.h
index 778812e..505c812 100644
--- a/arch/arm/include/asm/arch-rmobile/r8a7793.h
+++ b/arch/arm/include/asm/arch-rmobile/r8a7793.h
@@ -18,6 +18,11 @@
 /* SH-I2C */
 #define CONFIG_SYS_I2C_SH_BASE20xE60B
 
+/* SDHI */
+#define CONFIG_SYS_SH_SDHI1_BASE 0xEE14
+#define CONFIG_SYS_SH_SDHI2_BASE 0xEE16
+#define CONFIG_SYS_SH_SDHI_NR_CHANNEL 3
+
 #define DBSC3_1_QOS_R0_BASE0xE67A1000
 #define DBSC3_1_QOS_R1_BASE0xE67A1100
 #define DBSC3_1_QOS_R2_BASE0xE67A1200
diff --git a/arch/arm/include/asm/arch-rmobile/r8a7794.h 
b/arch/arm/include/asm/arch-rmobile/r8a7794.h
index 66d5a29..e8f1d1d 100644
--- a/arch/arm/include/asm/arch-rmobile/r8a7794.h
+++ b/arch/arm/include/asm/arch-rmobile/r8a7794.h
@@ -14,4 +14,9 @@
 /* SH-I2C */
 #define CONFIG_SYS_I2C_SH_BASE20xE60B
 
+/* SDHI */
+#define CONFIG_SYS_SH_SDHI1_BASE 0xEE14
+#define CONFIG_SYS_SH_SDHI2_BASE 0xEE16
+#define CONFIG_SYS_SH_SDHI_NR_CHANNEL 3
+
 #endif /* __ASM_ARCH_R8A7794_H */
diff --git a/arch/arm/include/asm/arch-rmobile/rcar-base.h 
b/arch/arm/include/asm/arch-rmobile/rcar-base.h
index dbbebcf..0bae173 100644
--- a/arch/arm/include/asm/arch-rmobile/rcar-base.h
+++ b/arch/arm/include/asm/arch-rmobile/rcar-base.h
@@ -43,6 +43,9 @@
 #define CONFIG_SYS_RCAR_I2C2_BASE  0xE653
 #define CONFIG_SYS_RCAR_I2C3_BASE  0xE654
 
+/* SDHI */
+#define CONFIG_SYS_SH_SDHI0_BASE   0xEE10
+
 #define S3C_BASE   0xE6784000
 #define S3C_INT_BASE   0xE6784A00
 #define S3C_MEDIA_BASE 0xE6784B00
diff --git a/arch/arm/include/asm/arch-rmobile/sh_sdhi.h 
b/arch/arm/include/asm/arch-rmobile/sh_sdhi.h
new file mode 100644
index 000..057bf3f
--- /dev/null
+++ b/arch/arm/include/asm/arch-rmobile/sh_sdhi.h
@@ -0,0 +1,168 @@
+/*
+ * drivers/mmc/sh-sdhi.h
+ *
+ * SD/MMC driver for Reneas rmobile ARM SoCs
+ *
+ * Copyright (C) 2013-2014 Renesas Electronics Corporation
+ * Copyright (C) 2008-2009 Renesas Solutions Corp.
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#ifndef _SH_SDHI_H
+#define _SH_SDHI_H
+
+#define SDHI_CMD   (0x  1)
+#define SDHI_PORTSEL   (0x0004  1)
+#define SDHI_ARG0  (0x0008  1)
+#define SDHI_ARG1  (0x000C  1)
+#define SDHI_STOP  (0x0010  1)
+#define SDHI_SECCNT(0x0014  1)
+#define SDHI_RSP00 (0x0018  1)
+#define SDHI_RSP01 (0x001C  1)
+#define SDHI_RSP02

Re: [U-Boot] Problem converting da850evm to generic board and use libfdt

2014-12-16 Thread Peter Howard

On Tue, 2014-12-16 at 17:27 +1100, Peter Howard wrote:
 On Wed, 2014-12-10 at 19:10 -0700, Simon Glass wrote:
  Hi Peter,
  
  On 10 December 2014 at 18:37, Simon Glass s...@chromium.org wrote:
   Hi Peter,
  
   On Dec 10, 2014 6:23 PM, Peter Howard p...@northern-ridge.com.au 
   wrote:
  
   On Wed, 2014-12-10 at 17:49 -0700, Simon Glass wrote:
Hi Peter,
   
On 10 December 2014 at 17:19, Peter Howard p...@northern-ridge.com.au
wrote:
 On Wed, 2014-12-10 at 15:43 -0700, Simon Glass wrote:
 Hi Peter,

 On 10 December 2014 at 15:17, Peter Howard
 p...@northern-ridge.com.au wrote:
 
  On Tue, 2014-12-09 at 17:45 -0700, Simon Glass wrote:
   Hi Peter,
  
   On 9 December 2014 at 17:13, Peter Howard
   p...@northern-ridge.com.au wrote:
   
On Wed, 2014-12-03 at 14:20 -0800, Simon Glass wrote:
 Hi Peter,

 On 3 December 2014 at 13:53, Peter Howard
 p...@northern-ridge.com.au wrote:
  On Wed, 2014-12-03 at 06:38 -0700, Simon Glass wrote:
  Hi Peter,
 
  On 2 December 2014 at 14:59, Peter Howard
  p...@northern-ridge.com.au wrote:
  
   I'm trying to make two changes to building u-boot for
   the da850evm.
 * Use the generic board code to get rid of the
   warning, and
 * Enable libfdt to allow booting of linux with a
   standalone dtb
   image.
  
   The first part appears to be simple.  Just adding
  
   #define CONFIG_SYS_GENERIC_BOARD
  
   in include/configs/da850evm.h works with no obvious
   side-effects.
  
   However, adding
  
   #define CONFIG_OF_LIBFDT
  
   is a different story.  It appears to introduce memory
   corruption when
   loading the environment.  On first boot it gives the
   bad CRC! warning
   and uses the default environment.  If you *don't* save
   the environment
   you can boot fine (including manual editing of the
   environment). However
   if you save the environment via saveenv bad things
   happen on the next
   boot.  An example log:
  
   U-Boot SPL 2015.01-rc1 (Nov 27 2014 - 14:30:26)
  
  
   U-Boot 2015.01-rc1 (Nov 27 2014 - 14:30:26)
  
   I2C:   ready
   DRAM:  64 MiB
   WARNING: Caches not enabled
   MMC:   davinci: 0
   SF: Detected M25P64 with page size 256 Bytes, erase 
   size
   64 KiB, total 8 MiB
   In:serial
   Out:   serial
   Err:   serial
   SF: Detected M25P64 with page size 256 Bytes, erase 
   size
   64 KiB, total 8 MiB
   Warning: Invalid MAC address read from SPI flash
   Net:   DaVinci-EMAC
   Error: DaVinci-EMAC address not set.
  
   U-Boot  help
   data abort
   pc : [c108ffd8]  lr : [c10900b4]
   sp : c3e5f838  ip :  fp : c3e5fda4
   r10: c10b1f28  r9 : c3e5ff08 r8 : 000e
   r7 : c10b22c4  r6 : c10aa2a0 r5 :   r4 :
   001b
   r3 : c10b8f70  r2 : 0001 r1 : c3e5f840  r0 :
   
   Flags: Nzcv  IRQs off  FIQs off  Mode SVC_32
   Resetting CPU ...
  
   If I rebuild  with CONFIG_OF_LIBFDT removed again from
   da850evm.h the
   problem disappears.  And you can see that the saveenv
   worked (i.e. the
   environment is what was saved before the reboot and 
   data
   abort).
  
   I've traced the problem as far as the inline version of
   console_puts()
   in common/console.c.  The table dispatch there and the
   fact that the
   problem appears only when you load the environment 
   makes
   me think it's
   memory corruption.
  
   Note: if you do *not* specify CONFIG_SYS_GENERIC_BOARD
   you still get the
   data abort, however it takes a bit more effort to
   trigger (like actually
   looking at the environment :-)  )
  
   (Note: This is building against the u-boot-2015.01-rc1
   tree)
  
   Suggestions?
 
  In case it helps, I got the same symptom (help crashes)
  and it was due
  to BSS not being cleared. Stefan (on cc) found this
  problem - he said
  something to do with GDT calculation or handling. However
  it is just a
  guess and probably has nothing to do with your issue.
 
  I may be missing something, but the GDT appears to be
  x86-specific
  whereas I'm building for ARMv5.

Re: [U-Boot] [PATCH v2] dm: sh: serial: Add support driver model

2014-12-16 Thread Nobuhiro Iwamatsu

Hi,

2014-12-12 11:53 GMT+09:00 Simon Glass s...@chromium.org:
 On 11 December 2014 at 19:04, Nobuhiro Iwamatsu
 nobuhiro.iwamatsu...@renesas.com wrote:
 This adds driver model support with this driver. This was tested by Koelsch
 board and Gose board.

 Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
 ---
  V2: Fix loop for tx fifo and tx fifo.
  Fix write return code writing with DM.

 Acked-by: Simon Glass s...@chromium.org

Thanks.


 But see question below.


  drivers/serial/serial_sh.c   | 311 
 ---
  drivers/serial/serial_sh.h   |  10 +-
  include/dm/platform_data/serial_sh.h |  37 +
  3 files changed, 252 insertions(+), 106 deletions(-)
  create mode 100644 include/dm/platform_data/serial_sh.h

 diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
 index 7c1f271..882c147 100644
 --- a/drivers/serial/serial_sh.c
 +++ b/drivers/serial/serial_sh.c
 @@ -1,78 +1,21 @@
  /*
   * SuperH SCIF device driver.
   * Copyright (C) 2013  Renesas Electronics Corporation
 - * Copyright (C) 2007,2008,2010 Nobuhiro Iwamatsu
 + * Copyright (C) 2007,2008,2010, 2014 Nobuhiro Iwamatsu
   * Copyright (C) 2002 - 2008  Paul Mundt
   *
   * SPDX-License-Identifier:GPL-2.0+
   */

  #include common.h
 +#include errno.h
 +#include dm.h
  #include asm/io.h
  #include asm/processor.h
 -#include serial_sh.h
  #include serial.h
  #include linux/compiler.h
 -
 -#if defined(CONFIG_CONS_SCIF0)
 -# define SCIF_BASE SCIF0_BASE
 -#elif defined(CONFIG_CONS_SCIF1)
 -# define SCIF_BASE SCIF1_BASE
 -#elif defined(CONFIG_CONS_SCIF2)
 -# define SCIF_BASE SCIF2_BASE
 -#elif defined(CONFIG_CONS_SCIF3)
 -# define SCIF_BASE SCIF3_BASE
 -#elif defined(CONFIG_CONS_SCIF4)
 -# define SCIF_BASE SCIF4_BASE
 -#elif defined(CONFIG_CONS_SCIF5)
 -# define SCIF_BASE SCIF5_BASE
 -#elif defined(CONFIG_CONS_SCIF6)
 -# define SCIF_BASE SCIF6_BASE
 -#elif defined(CONFIG_CONS_SCIF7)
 -# define SCIF_BASE SCIF7_BASE
 -#else
 -# error Default SCIF doesn't set.
 -#endif
 -
 -#if defined(CONFIG_SCIF_A)
 -   #define SCIF_BASE_PORT  PORT_SCIFA
 -#else
 -   #define SCIF_BASE_PORT  PORT_SCIF
 -#endif
 -
 -static struct uart_port sh_sci = {
 -   .membase= (unsigned char*)SCIF_BASE,
 -   .mapbase= SCIF_BASE,
 -   .type   = SCIF_BASE_PORT,
 -};
 -
 -static void sh_serial_setbrg(void)
 -{
 -   DECLARE_GLOBAL_DATA_PTR;
 -#ifdef CONFIG_SCIF_USE_EXT_CLK
 -   unsigned short dl = DL_VALUE(gd-baudrate, CONFIG_SH_SCIF_CLK_FREQ);
 -   sci_out(sh_sci, DL, dl);
 -   /* Need wait: Clock * 1/dl × 1/16 */
 -   udelay((100 * dl * 16 / CONFIG_SYS_CLK_FREQ) * 1000 + 1);
 -#else
 -   sci_out(sh_sci, SCBRR,
 -   SCBRR_VALUE(gd-baudrate, CONFIG_SH_SCIF_CLK_FREQ));
 -#endif
 -}
 -
 -static int sh_serial_init(void)
 -{
 -   sci_out(sh_sci, SCSCR , SCSCR_INIT(sh_sci));
 -   sci_out(sh_sci, SCSCR , SCSCR_INIT(sh_sci));
 -   sci_out(sh_sci, SCSMR, 0);
 -   sci_out(sh_sci, SCSMR, 0);
 -   sci_out(sh_sci, SCFCR, SCFCR_RFRST|SCFCR_TFRST);
 -   sci_in(sh_sci, SCFCR);
 -   sci_out(sh_sci, SCFCR, 0);
 -
 -   serial_setbrg();
 -   return 0;
 -}
 +#include dm/platform_data/serial_sh.h
 +#include serial_sh.h

  #if defined(CONFIG_CPU_SH7760) || \
 defined(CONFIG_CPU_SH7780) || \
 @@ -109,83 +52,250 @@ static int scif_rxfill(struct uart_port *port)
  }
  #endif

 -static int serial_rx_fifo_level(void)
 +static void sh_serial_init_generic(struct uart_port *port)
 +{
 +   sci_out(port, SCSCR , SCSCR_INIT(port));
 +   sci_out(port, SCSCR , SCSCR_INIT(port));
 +   sci_out(port, SCSMR, 0);
 +   sci_out(port, SCSMR, 0);
 +   sci_out(port, SCFCR, SCFCR_RFRST|SCFCR_TFRST);
 +   sci_in(port, SCFCR);
 +   sci_out(port, SCFCR, 0);
 +}
 +
 +static void
 +sh_serial_setbrg_generic(struct uart_port *port, int clk, int baudrate)
  {
 -   return scif_rxfill(sh_sci);
 +   if (port-clk_mode == EXT_CLK) {
 +   unsigned short dl = DL_VALUE(baudrate, clk);
 +   sci_out(port, DL, dl);
 +   /* Need wait: Clock * 1/dl × 1/16 */
 +   udelay((100 * dl * 16 / clk) * 1000 + 1);
 +   } else {
 +   sci_out(port, SCBRR, SCBRR_VALUE(baudrate, clk));
 +   }
  }

 -static void handle_error(void)
 +static void handle_error(struct uart_port *port)
  {
 -   sci_in(sh_sci, SCxSR);
 -   sci_out(sh_sci, SCxSR, SCxSR_ERROR_CLEAR(sh_sci));
 -   sci_in(sh_sci, SCLSR);
 -   sci_out(sh_sci, SCLSR, 0x00);
 +   sci_in(port, SCxSR);
 +   sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
 +   sci_in(port, SCLSR);
 +   sci_out(port, SCLSR, 0x00);
  }

 -static void serial_raw_putc(const char c)
 +static int serial_raw_putc(struct uart_port *port, const char c)
  {
 -   while (1) {
 -   /* Tx fifo is empty */
 -   if (sci_in(sh_sci, SCxSR)

Re: [U-Boot] Problem converting da850evm to generic board and use libfdt

On 16 December 2014 at 16:21, Peter Howard p...@northern-ridge.com.au wrote:
 On Tue, 2014-12-16 at 17:27 +1100, Peter Howard wrote:
 On Wed, 2014-12-10 at 19:10 -0700, Simon Glass wrote:
  Hi Peter,
 
  On 10 December 2014 at 18:37, Simon Glass s...@chromium.org wrote:
   Hi Peter,
  
   On Dec 10, 2014 6:23 PM, Peter Howard p...@northern-ridge.com.au 
   wrote:
  
   On Wed, 2014-12-10 at 17:49 -0700, Simon Glass wrote:
Hi Peter,
   
On 10 December 2014 at 17:19, Peter Howard 
p...@northern-ridge.com.au
wrote:
 On Wed, 2014-12-10 at 15:43 -0700, Simon Glass wrote:
 Hi Peter,

 On 10 December 2014 at 15:17, Peter Howard
 p...@northern-ridge.com.au wrote:
 
  On Tue, 2014-12-09 at 17:45 -0700, Simon Glass wrote:
   Hi Peter,
  
   On 9 December 2014 at 17:13, Peter Howard
   p...@northern-ridge.com.au wrote:
   
On Wed, 2014-12-03 at 14:20 -0800, Simon Glass wrote:
 Hi Peter,

 On 3 December 2014 at 13:53, Peter Howard
 p...@northern-ridge.com.au wrote:
  On Wed, 2014-12-03 at 06:38 -0700, Simon Glass wrote:
  Hi Peter,
 
  On 2 December 2014 at 14:59, Peter Howard
  p...@northern-ridge.com.au wrote:
  
   I'm trying to make two changes to building u-boot for
   the da850evm.
 * Use the generic board code to get rid of the
   warning, and
 * Enable libfdt to allow booting of linux with a
   standalone dtb
   image.
  
   The first part appears to be simple.  Just adding
  
   #define CONFIG_SYS_GENERIC_BOARD
  
   in include/configs/da850evm.h works with no obvious
   side-effects.
  
   However, adding
  
   #define CONFIG_OF_LIBFDT
  
   is a different story.  It appears to introduce memory
   corruption when
   loading the environment.  On first boot it gives the
   bad CRC! warning
   and uses the default environment.  If you *don't* save
   the environment
   you can boot fine (including manual editing of the
   environment). However
   if you save the environment via saveenv bad things
   happen on the next
   boot.  An example log:
  
   U-Boot SPL 2015.01-rc1 (Nov 27 2014 - 14:30:26)
  
  
   U-Boot 2015.01-rc1 (Nov 27 2014 - 14:30:26)
  
   I2C:   ready
   DRAM:  64 MiB
   WARNING: Caches not enabled
   MMC:   davinci: 0
   SF: Detected M25P64 with page size 256 Bytes, erase 
   size
   64 KiB, total 8 MiB
   In:serial
   Out:   serial
   Err:   serial
   SF: Detected M25P64 with page size 256 Bytes, erase 
   size
   64 KiB, total 8 MiB
   Warning: Invalid MAC address read from SPI flash
   Net:   DaVinci-EMAC
   Error: DaVinci-EMAC address not set.
  
   U-Boot  help
   data abort
   pc : [c108ffd8]  lr : [c10900b4]
   sp : c3e5f838  ip :  fp : c3e5fda4
   r10: c10b1f28  r9 : c3e5ff08 r8 : 000e
   r7 : c10b22c4  r6 : c10aa2a0 r5 :   r4 :
   001b
   r3 : c10b8f70  r2 : 0001 r1 : c3e5f840  r0 :
   
   Flags: Nzcv  IRQs off  FIQs off  Mode SVC_32
   Resetting CPU ...
  
   If I rebuild  with CONFIG_OF_LIBFDT removed again from
   da850evm.h the
   problem disappears.  And you can see that the saveenv
   worked (i.e. the
   environment is what was saved before the reboot and 
   data
   abort).
  
   I've traced the problem as far as the inline version 
   of
   console_puts()
   in common/console.c.  The table dispatch there and the
   fact that the
   problem appears only when you load the environment 
   makes
   me think it's
   memory corruption.
  
   Note: if you do *not* specify CONFIG_SYS_GENERIC_BOARD
   you still get the
   data abort, however it takes a bit more effort to
   trigger (like actually
   looking at the environment :-)  )
  
   (Note: This is building against the u-boot-2015.01-rc1
   tree)
  
   Suggestions?
 
  In case it helps, I got the same symptom (help crashes)
  and it was due
  to BSS not being cleared. Stefan (on cc) found this
  problem - he said
  something to do with GDT calculation or handling. 
  However
  it is just a
  guess and probably has nothing to do with your issue.
 
  I may be

Re: [U-Boot] [PATCH 1/2] kbuild: Fix a false error of generic board support

On Tue, Dec 16, 2014 at 02:56:44PM -0600, mgerlach wrote:

 Hello Masahiro Yamada,
 
 Even the with this patch, we encountered a false error of generic board
 support.  The problem was very interrmittent for us, but we were able 
 to debug the problem to performing builds on EXT3 file systems which
 have a time stamp resolution of one second.  To reproduce the problem,
 touch ./include/config/auto.conf and .config on a configured uboot tree on
 an EXT3 file system.
 
 The patch below fixes the problem for us.  

This makes an odd race condition problem I run into when doing massively
paralell builds worse :(  With MAKEALL no ARM boards build (ARCH wasn't
set in time so it tried arch//Makefile for something) and buildman was
also broken in a bunch of places.

-- 
Tom


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[U-Boot] [PATCH v3] dm: sh: serial: Add support driver model

2014-12-16 Thread Nobuhiro Iwamatsu

This adds driver model support with this driver. This was tested by Koelsch
board and Gose board.

Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
---
 V3: Add function of checking -EAGAIN without DM.
 V2: Fix loop for tx fifo and tx fifo.
 Fix write return code writing with DM.

 drivers/serial/serial_sh.c   | 321 ---
 drivers/serial/serial_sh.h   |  10 +-
 include/dm/platform_data/serial_sh.h |  37 
 3 files changed, 260 insertions(+), 108 deletions(-)
 create mode 100644 include/dm/platform_data/serial_sh.h

diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
index 7c1f271..3641c9f 100644
--- a/drivers/serial/serial_sh.c
+++ b/drivers/serial/serial_sh.c
@@ -1,78 +1,21 @@
 /*
  * SuperH SCIF device driver.
  * Copyright (C) 2013  Renesas Electronics Corporation
- * Copyright (C) 2007,2008,2010 Nobuhiro Iwamatsu
+ * Copyright (C) 2007,2008,2010, 2014 Nobuhiro Iwamatsu
  * Copyright (C) 2002 - 2008  Paul Mundt
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
 
 #include common.h
+#include errno.h
+#include dm.h
 #include asm/io.h
 #include asm/processor.h
-#include serial_sh.h
 #include serial.h
 #include linux/compiler.h
-
-#if defined(CONFIG_CONS_SCIF0)
-# define SCIF_BASE SCIF0_BASE
-#elif defined(CONFIG_CONS_SCIF1)
-# define SCIF_BASE SCIF1_BASE
-#elif defined(CONFIG_CONS_SCIF2)
-# define SCIF_BASE SCIF2_BASE
-#elif defined(CONFIG_CONS_SCIF3)
-# define SCIF_BASE SCIF3_BASE
-#elif defined(CONFIG_CONS_SCIF4)
-# define SCIF_BASE SCIF4_BASE
-#elif defined(CONFIG_CONS_SCIF5)
-# define SCIF_BASE SCIF5_BASE
-#elif defined(CONFIG_CONS_SCIF6)
-# define SCIF_BASE SCIF6_BASE
-#elif defined(CONFIG_CONS_SCIF7)
-# define SCIF_BASE SCIF7_BASE
-#else
-# error Default SCIF doesn't set.
-#endif
-
-#if defined(CONFIG_SCIF_A)
-   #define SCIF_BASE_PORT  PORT_SCIFA
-#else
-   #define SCIF_BASE_PORT  PORT_SCIF
-#endif
-
-static struct uart_port sh_sci = {
-   .membase= (unsigned char*)SCIF_BASE,
-   .mapbase= SCIF_BASE,
-   .type   = SCIF_BASE_PORT,
-};
-
-static void sh_serial_setbrg(void)
-{
-   DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_SCIF_USE_EXT_CLK
-   unsigned short dl = DL_VALUE(gd-baudrate, CONFIG_SH_SCIF_CLK_FREQ);
-   sci_out(sh_sci, DL, dl);
-   /* Need wait: Clock * 1/dl $B!_(B 1/16 */
-   udelay((100 * dl * 16 / CONFIG_SYS_CLK_FREQ) * 1000 + 1);
-#else
-   sci_out(sh_sci, SCBRR,
-   SCBRR_VALUE(gd-baudrate, CONFIG_SH_SCIF_CLK_FREQ));
-#endif
-}
-
-static int sh_serial_init(void)
-{
-   sci_out(sh_sci, SCSCR , SCSCR_INIT(sh_sci));
-   sci_out(sh_sci, SCSCR , SCSCR_INIT(sh_sci));
-   sci_out(sh_sci, SCSMR, 0);
-   sci_out(sh_sci, SCSMR, 0);
-   sci_out(sh_sci, SCFCR, SCFCR_RFRST|SCFCR_TFRST);
-   sci_in(sh_sci, SCFCR);
-   sci_out(sh_sci, SCFCR, 0);
-
-   serial_setbrg();
-   return 0;
-}
+#include dm/platform_data/serial_sh.h
+#include serial_sh.h
 
 #if defined(CONFIG_CPU_SH7760) || \
defined(CONFIG_CPU_SH7780) || \
@@ -86,7 +29,7 @@ static int scif_rxfill(struct uart_port *port)
 static int scif_rxfill(struct uart_port *port)
 {
if ((port-mapbase == 0xffe0) ||
-   (port-mapbase == 0xffe08000)) {
+   (port-mapbase == 0xffe08000)) {
/* SCIF0/1*/
return sci_in(port, SCRFDR)  0xff;
} else {
@@ -109,80 +52,253 @@ static int scif_rxfill(struct uart_port *port)
 }
 #endif
 
-static int serial_rx_fifo_level(void)
+static void sh_serial_init_generic(struct uart_port *port)
 {
-   return scif_rxfill(sh_sci);
+   sci_out(port, SCSCR , SCSCR_INIT(port));
+   sci_out(port, SCSCR , SCSCR_INIT(port));
+   sci_out(port, SCSMR, 0);
+   sci_out(port, SCSMR, 0);
+   sci_out(port, SCFCR, SCFCR_RFRST|SCFCR_TFRST);
+   sci_in(port, SCFCR);
+   sci_out(port, SCFCR, 0);
 }
 
-static void handle_error(void)
+static void
+sh_serial_setbrg_generic(struct uart_port *port, int clk, int baudrate)
 {
-   sci_in(sh_sci, SCxSR);
-   sci_out(sh_sci, SCxSR, SCxSR_ERROR_CLEAR(sh_sci));
-   sci_in(sh_sci, SCLSR);
-   sci_out(sh_sci, SCLSR, 0x00);
+   if (port-clk_mode == EXT_CLK) {
+   unsigned short dl = DL_VALUE(baudrate, clk);
+   sci_out(port, DL, dl);
+   /* Need wait: Clock * 1/dl $B!_(B 1/16 */
+   udelay((100 * dl * 16 / clk) * 1000 + 1);
+   } else {
+   sci_out(port, SCBRR, SCBRR_VALUE(baudrate, clk));
+   }
 }
 
-static void serial_raw_putc(const char c)
+static void handle_error(struct uart_port *port)
 {
-   while (1) {
-   /* Tx fifo is empty */
-   if (sci_in(sh_sci, SCxSR)  SCxSR_TEND(sh_sci))
-   break;
-   }
+   sci_in(port, SCxSR);
+   sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
+   sci_in(port, SCLSR);
+

Re: [U-Boot] [PULL] u-boot-socfpga/master

On Tue, Dec 16, 2014 at 03:34:18PM +0100, Marek Vasut wrote:

 The following changes since commit 97cdf64026c7d749dd7a5c0dbaba7a60a7292ac9:
 
   Merge branch 'sandbox' of git://git.denx.de/u-boot-x86 (2014-12-04 09:24:05 
 -0500)
 
 are available in the git repository at:
 
   git://git.denx.de/u-boot-socfpga.git master
 
 for you to fetch changes up to 065496d1b5304a6a67b366b613c3504aab2e2dbd:
 
   arm: socfpga: board: Repair Micrel PHY tuning (2014-12-16 15:32:14 +0100)
 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] Please pull u-boot-mpc85xx master