Re: [U-Boot] [PATCH 07/12] imx:mx6 Support LDO bypass
Hi Tim, On Tue, Feb 10, 2015 at 12:50 PM, Tim Harvey thar...@gateworks.com wrote: I think what you are trying to do here is to put the anatop regulators in bypass mode so that the Freescale vendor kernel leaves them bypassed (which is what the 3.10.x based vendor kernels supporting device-tree at http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git do). This is what the Freescale vendor U-Boot does and so they have created a horrible dependence between kernel and bootloader. I agree. Instead you may be interested in what I did for our BSP's that use the Freescale vendor kernel. Instead of touching U-Boot, I look for the fsl,ldo-bypass node in the kernel and enable it just like their bootloader would have: https://github.com/Gateworks/linux-imx6/commit/a1af6ac6f00b4da7c8a5656e8ff093d4ab5cadee That said, I would love to see some help getting IMX6 ldo-bypass support upstream. All of our boards have an external PMIC and are I want to help you on upstreaming ldo-bypass support in the kernel, Tim. Can we do like your approach, but defining imx_anatop_ldobypass_enable() inside rivers/regulator/anatop-regulator.c instead? Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 07/12] imx:mx6 Support LDO bypass
On Fri, Jan 9, 2015 at 12:59 AM, Peng Fan peng@freescale.com wrote:
The basic graph for voltage input is:
VDDARM_IN --- LDO_DIG(ARM) --- VDD_ARM_CAP
VDDSOC_IN --- LDO_DIG(SOC) --- VDD_SOC_CAP
Hi Peng,
Glad to see someone else interested in IMX6 LDO bypass mode. I've made
a couple of stabs at getting it supported in mainline but I haven't
had the time to follow-through yet there.
We can bypass the LDO to save power, if the board already has pmic.
set_anatop_bypass is the function to do the bypass VDDARM and VDDSOC
work.
Current only set VDDARM_IN@1.175V/VDDSOC_IN@1.175V before ldo
bypass switch. So until ldo bypass switch happened, these voltage
setting is set in ldo-enable mode. But in datasheet, we need
1.15V + 125mV = 1.275V for VDDARM_IN. We need to downgrade cpufreq
to 400Mhz and restore after ldo bypass mode switch. So add
prep_anatop_bypass/finish_anatop_bypass/set_arm_freq_400M to do
this work.
LDO bypass is dependent on the flatten device tree file. If speed
grading fuse is for 1.2GHz, enable LDO bypass and setup PMIC voltages.
So add check for 1.2GHz core speed. So add check_1_2G function.
This isn't quite how it works. If you are 'operating at 1.2GHz'
(supposing you had a processor cabable of it) you must use the LDO (to
avoid ripple sensitivity issues).
In ldo-bypass mode, we need trigger WDOG_B pin to reset pmic in
ldo-bypass mode. So add set_wdog_reset to do this work.
This is very board dependent. Here you are referring to a board that
has a reset input to the PMIC's from the IMX6's watchdog output. In
this case, this reset routing/pinmux would be needed regardless of
using ldo-bypass mode or not and that should just be a pinmux of the
pin your using for WDOG_B.
snip
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 5f5f497..5d02755 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -18,6 +18,7 @@
#include asm/arch/sys_proto.h
#include asm/imx-common/boot_mode.h
#include asm/imx-common/dma.h
+#include libfdt.h
#include stdbool.h
#include asm/arch/mxc_hdmi.h
#include asm/arch/crm_regs.h
@@ -429,6 +430,146 @@ void s_init(void)
writel(mask528, anatop-pfd_528_clr);
}
+#ifdef CONFIG_LDO_BYPASS_CHECK
+DECLARE_GLOBAL_DATA_PTR;
+static int ldo_bypass;
+
+int check_ldo_bypass(void)
+{
+ const int *ldo_mode;
+ int node;
+
+ /* get the right fdt_blob from the global working_fdt */
+ gd-fdt_blob = working_fdt;
+ /* Get the node from FDT for anatop ldo-bypass */
+ node = fdt_node_offset_by_compatible(gd-fdt_blob, -1,
+ fsl,imx6q-gpc);
+ if (node 0) {
+ printf(No gpc device node %d, force to ldo-enable.\n, node);
+ return 0;
+ }
+ ldo_mode = fdt_getprop(gd-fdt_blob, node, fsl,ldo-bypass, NULL);
+ /*
+* return 1 if fsl,ldo-bypass = 1, else return 0 if
+* fsl,ldo-bypass = 0 or no fsl,ldo-bypass property
+*/
+ ldo_bypass = fdt32_to_cpu(*ldo_mode) == 1 ? 1 : 0;
+
+ return ldo_bypass;
+}
What you are doing here is relying on a device-tree binding from the
Freescale 'vendor' kernel, which will NEVER make it upstream and this
is one of the issues I was running into getting ldo-bypass capability
upstream in the kernel.
The issue here is that LDO bypass is dependent on the following things:
1. your voltage rail requirements - which are dependent on the CPU
frequency (there is a nice table in the IMX6 datasheets of voltage on
each rail at each frequency operating point validated by Freescale).
The exception of always using the LDO for 1.2GHz is specified here as
well.
2. you have a PMIC in your design on VDD_ARM_IN and VDD_SOC_IN rails
- this should be specified in the device-tree as well
3. you have valid PMIC drivers configured
In the kernel, its not desired to have a single device-tree node
called 'fsl,ldo-bypass' for an enable. Instead you need to make sure
that you PMIC regulators that are 'not' the internal IMX6 anatop
regulators. This property is not a mainline linux device-tree binding.
+
+int check_1_2G(void)
+{
+ u32 reg;
+ int result = 0;
+ struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+ struct fuse_bank *bank = ocotp-bank[0];
+ struct fuse_bank0_regs *fuse_bank0 =
+ (struct fuse_bank0_regs *)bank-fuse_regs;
+
+ reg = readl(fuse_bank0-cfg3);
+ if (((reg 16) 0x3) == 0x3) {
+ if (ldo_bypass) {
+ printf(Wrong dtb file used! i.MX6Q@1.2Ghz only works
with ldo-enable mode!\n);
+ /*
+* Currently, only imx6q-sabresd board might be here,
+* since only i.MX6Q support 1.2G and only Sabresd
board
+* support ldo-bypass mode. So hardcode here.
+* You can also
Re: [U-Boot] [PATCH v1] tools/imagetool: remove linker script
Hi Andreas,
On 8 February 2015 at 16:06, Andreas Bießmann
andreas.de...@googlemail.com wrote:
Commit a93648d197df48fa46dd55f925ff70468bd81c71 introduced linker generated
lists for imagetool which is the base for some host tools (mkimage, dumpimage,
et al.). Unfortunately some host tool chains do not support the used type of
linker scripts. Therefore this commit broke these host-tools for them, namely
FreeBSD and Darwin (OS/X).
This commit tries to fix this. In order to have a clean distinction between
host
and embedded code space we need to introduce our own linker generated list
instead of re-using the available linker_lists.h provided functionality. So
we
copy the implementation used in linux kernel script/mod/file2alias.c which has
the very same problem (cause it is a host tool). This code also comes with an
abstraction for Mach-O binary format used in Darwin systems.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
Cc: Guilherme Maciel Ferreira guilherme.maciel.ferre...@gmail.com
---
It is highly encouraged to have a clear distinction between host stuff and
embedded stuff. We have the __KERNEL__/__UBOOT__ preprocessor directive to do
so, lets respect it and do not pollute the host space with the embedded stuff.
I think this is a reference ot the defining of __KERNEL__ in
imagetool.h. That is apparently needed for linker_lists.h although I
really don't see why. It should be possible to adjust either
compiler.h or linker_lsits.h to work around this.
Wait a minute ... wasn't there a stdint.h discussion these
days? Isn't this exactly the same thing but the other way round?
I think that is a separate topic and as mentioned there I feel this is
a feature of the toolchain, not the host.
Changes in v1:
- disable ASLR for host tools on OS X, it generates a linker warning
Makefile|5 +
tools/Makefile |2 --
tools/imagetool.c | 35
tools/imagetool.h | 56
+--
tools/imagetool.lds | 24 --
5 files changed, 67 insertions(+), 55 deletions(-)
delete mode 100644 tools/imagetool.lds
diff --git a/Makefile b/Makefile
index 92faed6..aca8587 100644
--- a/Makefile
+++ b/Makefile
@@ -281,6 +281,11 @@ os_x_before= $(shell if [
$(DARWIN_MAJOR_VERSION) -le $(1) -a \
HOSTCC = $(call os_x_before, 10, 5, cc, gcc)
HOSTCFLAGS += $(call os_x_before, 10, 4, -traditional-cpp)
HOSTLDFLAGS += $(call os_x_before, 10, 5, -multiply_defined suppress)
+
+# since Lion (10.7) ASLR is on by default, but we use linker generated lists
+# in some host tools which is a problem then ... so disable ASLR for these
+# tools
+HOSTLDFLAGS += $(call os_x_before, 10, 7, , -Xlinker -no_pie)
endif
# Decide whether to build built-in, modular, or both.
diff --git a/tools/Makefile b/tools/Makefile
index 6e1ce79..ea76a3e 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -124,8 +124,6 @@ HOSTLOADLIBES_dumpimage := $(HOSTLOADLIBES_mkimage)
HOSTLOADLIBES_fit_info := $(HOSTLOADLIBES_mkimage)
HOSTLOADLIBES_fit_check_sign := $(HOSTLOADLIBES_mkimage)
-HOSTLDFLAGS += -T $(srctree)/tools/imagetool.lds
-
hostprogs-$(CONFIG_EXYNOS5250) += mkexynosspl
hostprogs-$(CONFIG_EXYNOS5420) += mkexynosspl
HOSTCFLAGS_mkexynosspl.o := -pedantic
diff --git a/tools/imagetool.c b/tools/imagetool.c
index 148e466..4b0b73d 100644
--- a/tools/imagetool.c
+++ b/tools/imagetool.c
@@ -12,16 +12,16 @@
struct image_type_params *imagetool_get_type(int type)
{
- struct image_type_params *curr;
- struct image_type_params *start = ll_entry_start(
- struct image_type_params, image_type);
- struct image_type_params *end = ll_entry_end(
- struct image_type_params, image_type);
+ struct image_type_params **curr;
+ INIT_SECTION(image_type);
+
+ struct image_type_params **start = __start_image_type;
+ struct image_type_params **end = __stop_image_type;
for (curr = start; curr != end; curr++) {
- if (curr-check_image_type) {
- if (!curr-check_image_type(type))
- return curr;
+ if ((*curr)-check_image_type) {
+ if (!(*curr)-check_image_type(type))
+ return *curr;
}
}
return NULL;
@@ -34,16 +34,15 @@ int imagetool_verify_print_header(
struct image_tool_params *params)
{
int retval = -1;
- struct image_type_params *curr;
+ struct image_type_params **curr;
+ INIT_SECTION(image_type);
- struct image_type_params *start = ll_entry_start(
- struct image_type_params, image_type);
- struct image_type_params *end = ll_entry_end(
- struct image_type_params, image_type);
+
Re: [U-Boot] [PATCH 07/12] imx:mx6 Support LDO bypass
On Tue, Feb 10, 2015 at 6:59 AM, Fabio Estevam feste...@gmail.com wrote: Hi Tim, On Tue, Feb 10, 2015 at 12:50 PM, Tim Harvey thar...@gateworks.com wrote: I think what you are trying to do here is to put the anatop regulators in bypass mode so that the Freescale vendor kernel leaves them bypassed (which is what the 3.10.x based vendor kernels supporting device-tree at http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git do). This is what the Freescale vendor U-Boot does and so they have created a horrible dependence between kernel and bootloader. I agree. Instead you may be interested in what I did for our BSP's that use the Freescale vendor kernel. Instead of touching U-Boot, I look for the fsl,ldo-bypass node in the kernel and enable it just like their bootloader would have: https://github.com/Gateworks/linux-imx6/commit/a1af6ac6f00b4da7c8a5656e8ff093d4ab5cadee That said, I would love to see some help getting IMX6 ldo-bypass support upstream. All of our boards have an external PMIC and are I want to help you on upstreaming ldo-bypass support in the kernel, Tim. Great! Can we do like your approach, but defining imx_anatop_ldobypass_enable() inside rivers/regulator/anatop-regulator.c instead? Yes, I think that makes sense. I hope to be able to get back to this in a couple of weeks after a round of U-Boot updates that are next on my list. Thanks, Tim ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] sandbox on FreeBSD
Hi Jeroen, On 9 February 2015 at 16:20, Jeroen Hofstee jer...@myspectrum.nl wrote: Hello Simon, On 02/07/15 16:10, Simon Glass wrote: I am not giving up, I think it is sane if a tool which adds a header and a checksum does not use linker magic. Sandbox biggest problem is not the linking, but the fact that linux headers and std* are included, it is a different topic. This should be easy to fix in os.c since all the inclusions are isolated to there. I'd been keen to see a patch for that. Also if you want LCD support, sdl.c. I had a look at this and hacked my way through and linked it with a GNU ld (GNU Binutils) 2.25. So at least I have a binary, but unfortunately it doesn't work, and errors out with: Fatal error 'Can't allocate initial thread' at line 350 in file /usr/src/lib/libthr/thread/thr_init.c (errno = 2) The reason for this seems to be void _thread_init_hack(void) __attribute__ ((constructor)); which calls _libpthread_init - _thr_alloc - calloc and that calls the version in u-boots version of dl-malloc which is not initialized yet. Did you encounter such problems on linux as well? Or does libpthread simply not allocate memory before reaching main? No I see no such problem but I can understand why it might happen. There is a USE_DL_PREFIX in malloc.h which might fix the naming clash. U-Boot sandbox uses mmap() to allocate memory from the OS. It may be worth sending a patch even if you are not quite there? I suspect we can adjust the Makefile to use U-Boot's internal malloc() only for U-Boot and not for the libraries it uses. I've done that sort of thing before and remember it being a little painful. Regards, Jeroen ldd ../u-boot-build/u-boot ../u-boot-build/u-boot: librt.so.1 = /usr/lib/librt.so.1 (0x800896000) libSDL-1.2.so.0 = /usr/local/lib/libSDL-1.2.so.0 (0x800a9c000) libthr.so.3 = /lib/libthr.so.3 (0x800d02000) libc.so.7 = /lib/libc.so.7 (0x800f27000) libm.so.5 = /lib/libm.so.5 (0x8012d) libvgl.so.6 = /usr/lib/libvgl.so.6 (0x8014f8000) libaa.so.1 = /usr/local/lib/libaa.so.1 (0x801701000) libusbhid.so.4 = /usr/lib/libusbhid.so.4 (0x801919000) libncurses.so.8 = /lib/libncurses.so.8 (0x801b1d000) Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] tools/imagetool: remove linker generated list
Hi Andreas,
On 7 February 2015 at 14:19, Andreas Bießmann
andreas.de...@googlemail.com wrote:
Commit a93648d197df48fa46dd55f925ff70468bd81c71 introduced linker generated
lists for imagetool which is part of mkimage. It is a nice feature to remove
the annoying register function calls, but is not portable. Unfortunately some
host compilers do not support this type of linker scripts. Therefore this
commit broke this host-tool for theem, namely FreeBSD and Darwin (OS/X).
This commit tries to fix this. We won't go back to the register functions but
we also can not use the linker script. So use another approach copied from
linux kernel scripts/mod/file2alias.c.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
Cc: Guilherme Maciel Ferreira guilherme.maciel.ferre...@gmail.com
---
tools/Makefile |2 --
tools/imagetool.c | 34 +++
tools/imagetool.h | 56
+--
tools/imagetool.lds | 24 --
4 files changed, 61 insertions(+), 55 deletions(-)
delete mode 100644 tools/imagetool.lds
I have a FreeBSD set up now thanks to Jeroen so have had a play with this.
diff --git a/tools/Makefile b/tools/Makefile
index 6e1ce79..ea76a3e 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -124,8 +124,6 @@ HOSTLOADLIBES_dumpimage := $(HOSTLOADLIBES_mkimage)
HOSTLOADLIBES_fit_info := $(HOSTLOADLIBES_mkimage)
HOSTLOADLIBES_fit_check_sign := $(HOSTLOADLIBES_mkimage)
-HOSTLDFLAGS += -T $(srctree)/tools/imagetool.lds
-
hostprogs-$(CONFIG_EXYNOS5250) += mkexynosspl
hostprogs-$(CONFIG_EXYNOS5420) += mkexynosspl
HOSTCFLAGS_mkexynosspl.o := -pedantic
diff --git a/tools/imagetool.c b/tools/imagetool.c
index 148e466..8563032 100644
--- a/tools/imagetool.c
+++ b/tools/imagetool.c
@@ -12,16 +12,15 @@
struct image_type_params *imagetool_get_type(int type)
{
- struct image_type_params *curr;
- struct image_type_params *start = ll_entry_start(
- struct image_type_params, image_type);
- struct image_type_params *end = ll_entry_end(
- struct image_type_params, image_type);
+ struct image_type_params **curr;
+ INIT_SECTION(image_type);
+ struct image_type_params **start = __start_image_type;
+ struct image_type_params **end = __stop_image_type;
for (curr = start; curr != end; curr++) {
- if (curr-check_image_type) {
- if (!curr-check_image_type(type))
- return curr;
+ if ((*curr)-check_image_type) {
+ if (!(*curr)-check_image_type(type))
+ return *curr;
}
}
return NULL;
@@ -34,16 +33,15 @@ int imagetool_verify_print_header(
struct image_tool_params *params)
{
int retval = -1;
- struct image_type_params *curr;
+ struct image_type_params **curr;
+ INIT_SECTION(image_type);
- struct image_type_params *start = ll_entry_start(
- struct image_type_params, image_type);
- struct image_type_params *end = ll_entry_end(
- struct image_type_params, image_type);
+ struct image_type_params **start = __start_image_type;
+ struct image_type_params **end = __stop_image_type;
for (curr = start; curr != end; curr++) {
- if (curr-verify_header) {
- retval = curr-verify_header((unsigned char *)ptr,
+ if ((*curr)-verify_header) {
+ retval = (*curr)-verify_header((unsigned char *)ptr,
sbuf-st_size, params);
if (retval == 0) {
@@ -51,12 +49,12 @@ int imagetool_verify_print_header(
* Print the image information if verify is
* successful
*/
- if (curr-print_header) {
- curr-print_header(ptr);
+ if ((*curr)-print_header) {
+ (*curr)-print_header(ptr);
} else {
fprintf(stderr,
%s: print_header undefined
for %s\n,
- params-cmdname, curr-name);
+ params-cmdname,
(*curr)-name);
}
break;
}
diff --git a/tools/imagetool.h b/tools/imagetool.h
index f35dec7..3e15b4e 100644
--- a/tools/imagetool.h
+++ b/tools/imagetool.h
@@ -20,15 +20,6 @@
#include unistd.h
#include u-boot/sha1.h
-/* define __KERNEL__ in
[U-Boot] [PATCH v3 6/6] KM/IVM: remove ivm_read_eeprom(void)
This is not used anymore since the procedure was split into a simple
read function and a later alaysis.
The ivm_read_eeprom name is now used for the previous
ivm_simple_read_eeprom function.
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
---
Changes in v3: None
Changes in v2: None
board/keymile/common/common.h | 3 +--
board/keymile/common/ivm.c | 21 +
board/keymile/km82xx/km82xx.c | 2 +-
board/keymile/km83xx/km83xx.c | 2 +-
board/keymile/km_arm/km_arm.c | 2 +-
board/keymile/kmp204x/kmp204x.c | 2 +-
6 files changed, 6 insertions(+), 26 deletions(-)
diff --git a/board/keymile/common/common.h b/board/keymile/common/common.h
index 7e16d25..dcfefc4 100644
--- a/board/keymile/common/common.h
+++ b/board/keymile/common/common.h
@@ -126,8 +126,7 @@ struct bfticu_iomap {
#endif
int ethernet_present(void);
-int ivm_read_eeprom(void);
-int ivm_simple_read_eeprom(unsigned char *buf, int len);
+int ivm_read_eeprom(unsigned char *buf, int len);
int ivm_analyze_eeprom(unsigned char *buf, int len);
int trigger_fpga_config(void);
diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c
index 9abc09a..42db542 100644
--- a/board/keymile/common/ivm.c
+++ b/board/keymile/common/ivm.c
@@ -315,7 +315,7 @@ static int ivm_populate_env(unsigned char *buf, int len)
return 0;
}
-int ivm_simple_read_eeprom(unsigned char *buf, int len)
+int ivm_read_eeprom(unsigned char *buf, int len)
{
int ret;
@@ -331,22 +331,3 @@ int ivm_simple_read_eeprom(unsigned char *buf, int len)
return ivm_populate_env(buf, len);
}
-
-int ivm_read_eeprom(void)
-{
- uchar i2c_buffer[CONFIG_SYS_IVM_EEPROM_MAX_LEN];
- int ret;
-
- i2c_set_bus_num(CONFIG_KM_IVM_BUS);
- /* add deblocking here */
- i2c_make_abort();
-
- ret = i2c_read(CONFIG_SYS_IVM_EEPROM_ADR, 0, 1, i2c_buffer,
- CONFIG_SYS_IVM_EEPROM_MAX_LEN);
- if (ret != 0) {
- printf(Error reading EEprom\n);
- return -2;
- }
-
- return ivm_analyze_eeprom(i2c_buffer, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
-}
diff --git a/board/keymile/km82xx/km82xx.c b/board/keymile/km82xx/km82xx.c
index c3a1131..c599b40 100644
--- a/board/keymile/km82xx/km82xx.c
+++ b/board/keymile/km82xx/km82xx.c
@@ -397,7 +397,7 @@ int board_early_init_r(void)
int misc_init_r(void)
{
- ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
+ ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
return 0;
}
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index fc68a2f..89e9e1e 100644
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -192,7 +192,7 @@ int board_early_init_r(void)
int misc_init_r(void)
{
- ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
+ ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
return 0;
}
diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 6eb6712..2938861 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -212,7 +212,7 @@ int misc_init_r(void)
}
#endif
- ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
+ ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
initialize_unit_leds();
set_km_env();
diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c
index 0f544fb..eebb47f 100644
--- a/board/keymile/kmp204x/kmp204x.c
+++ b/board/keymile/kmp204x/kmp204x.c
@@ -197,7 +197,7 @@ int misc_init_r(void)
}
}
- ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
+ ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
return 0;
}
--
1.8.0.1
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[U-Boot] [PATCH v3 2/6] kirkwood/km_arm: read the IVM eeprom earlier
This allows to define the ethaddr env variable according to the the IVM
content by reading the IVM in misc_init_r.
Later, when HUSH is available the content read earlier is analyzed to
populate some non env variables.
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
---
Changes in v3: None
Changes in v2: None
board/keymile/km_arm/km_arm.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 1c7c108..6eb6712 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -102,6 +102,8 @@ static const u32 kwmpp_config[] = {
0
};
+static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN];
+
#if defined(CONFIG_KM_MGCOGE3UN)
/*
* Wait for startup OK from mgcoge3ne
@@ -210,6 +212,8 @@ int misc_init_r(void)
}
#endif
+ ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
+
initialize_unit_leds();
set_km_env();
set_bootcount_addr();
@@ -419,7 +423,7 @@ void reset_phy(void)
#if defined(CONFIG_HUSH_INIT_VAR)
int hush_init_var(void)
{
- ivm_read_eeprom();
+ ivm_analyze_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
return 0;
}
#endif
--
1.8.0.1
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[U-Boot] [PATCH v3 3/6] 85xx/kmp204x: read the IVM eeprom earlier
This allows to define the ethaddr env variable according to the the IVM
content by reading the IVM in misc_init_r.
Later, when HUSH is available the content read earlier is analyzed to
populate some non env variables.
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
---
Changes in v3: None
Changes in v2: None
board/keymile/kmp204x/kmp204x.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c
index a74f75b..0f544fb 100644
--- a/board/keymile/kmp204x/kmp204x.c
+++ b/board/keymile/kmp204x/kmp204x.c
@@ -26,6 +26,8 @@
DECLARE_GLOBAL_DATA_PTR;
+static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN];
+
int checkboard(void)
{
printf(Board: Keymile %s\n, CONFIG_KM_BOARD_NAME);
@@ -195,13 +197,14 @@ int misc_init_r(void)
}
}
+ ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
return 0;
}
#if defined(CONFIG_HUSH_INIT_VAR)
int hush_init_var(void)
{
- ivm_read_eeprom();
+ ivm_analyze_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
return 0;
}
#endif
--
1.8.0.1
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[U-Boot] [PATCH v3 4/6] 83xx/km83xx: read the IVM eeprom earlier
This allows to define the ethaddr env variable according to the the IVM
content by reading the IVM in misc_init_r.
Later, when HUSH is available the content read earlier is analyzed to
populate some non env variables.
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
---
Changes in v3: None
Changes in v2: None
board/keymile/km83xx/km83xx.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index 1da0dcb..fc68a2f 100644
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -28,6 +28,8 @@
#include ../common/common.h
+static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN];
+
const qe_iop_conf_t qe_iop_conf_tab[] = {
/* port pin dir open_drain assign */
#if defined(CONFIG_MPC8360)
@@ -190,6 +192,7 @@ int board_early_init_r(void)
int misc_init_r(void)
{
+ ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
return 0;
}
@@ -370,7 +373,7 @@ int ft_board_setup(void *blob, bd_t *bd)
#if defined(CONFIG_HUSH_INIT_VAR)
int hush_init_var(void)
{
- ivm_read_eeprom();
+ ivm_analyze_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
return 0;
}
#endif
--
1.8.0.1
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[U-Boot] [PATCH v3 0/6] keymile: enhance IVM reading
All Keymile boards have an EEPROM that is called IVM that contain information about the board that is progammed at production time. One piece of information is the MAC addresses assigned to the board. u-boot requires the MAC address of the ethernet interfaces it uses to be defined when the interface is intialized. This is most of the time read from the environment but in the case where only the default environment is available, this must be read from somewhere else, in our case the IVM. This patch series splits the reading and analysis of the IVM content in 2, so that the IVM content and MAC addresses can be read prior to ethernet initialization. The analysis of the rest of the IVM content still happens at a later second stage. Changes in v3: - Fix typo that prevented patch 1/6 from compiling Changes in v2: - Include the first patch, which was forgotten in the first submission Valentin Longchamp (6): KM/IVM: split the IVM reading and parsing in 2 parts kirkwood/km_arm: read the IVM eeprom earlier 85xx/kmp204x: read the IVM eeprom earlier 83xx/km83xx: read the IVM eeprom earlier 82xx/km82xx: read the IVM eeprom earlier KM/IVM: remove ivm_read_eeprom(void) board/keymile/common/common.h | 3 +- board/keymile/common/ivm.c | 77 + board/keymile/km82xx/km82xx.c | 10 +- board/keymile/km83xx/km83xx.c | 5 ++- board/keymile/km_arm/km_arm.c | 6 +++- board/keymile/kmp204x/kmp204x.c | 5 ++- include/configs/km82xx.h| 2 ++ 7 files changed, 73 insertions(+), 35 deletions(-) -- 1.8.0.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] recent tools on FreeBSD
Hi Jeroen, On 8 February 2015 at 03:03, Jeroen Hofstee jer...@myspectrum.nl wrote: Hello Simon, On 07-02-15 22:02, Simon Glass wrote: If this still fails, you can always build it from source, but needs a bit of patience. Somthing like this should always work: portsnap fetch portsnap extract cd /usr/ports/devel/git make config-recursive make make install Let me know if you still have issues. Regards, Jeroen [1] (as root) pkg install nano git git clone git://git.denx.de/u-boot.git git checkout v2015.01 -b b2015.01 cd u-boot pkg install arm-gnueabi-binutils gmake gmake CC=clang -target arm-freebsd-eabi -no-integrated-as -mllvm -arm-use-movt=0 rpi_defconfig gmake CROSS_COMPILE=arm-gnueabi-freebsd- CC=clang -target arm-freebsd-eabi -no-integrated-as -mllvm -arm-use-movt=0 -B/usr/local/bin/arm-gnueabi-freebsd- CONFIG_USE_PRIVATE_LIBGCC=y Is this for using an ARM cross-compiler? What should I do for building the tools? I keep seeing 'gcc not found'. Yes it is for cross building. So the host clang / host ld do the native build, the host clang with some help from arm-gnueabi-freebsd-as and arm-gnueabi-freebsd-ld do the cross build. If you only want to build tools for the host you need something like: gmake CC=cc sandbox_config tools Since CC is defined to $(CROSS_COMPILE)gcc it ends up being gcc when CROSS_COMPILE is not set, hence you get the 'gcc not found' errors. Thanks for your help. I have a FreeBSD running now and can build the tools with your patch. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 07/12] imx:mx6 Support LDO bypass
On Tue, Feb 10, 2015 at 3:23 AM, Stefano Babic sba...@denx.de wrote:
Ok - with this explanation, I would try to understand how the changes
can be split. If the feature/change works for several boards, it makes
sense to have it common and general. If it is only for one board, must
flow into the board directory.
It should be common as there are several boards which use PMIC's and can use it.
It looks like that ldo-bypass is strictly dependent on the board.
Firstly, it must have PMIC, and not all boards have it. Your last sentence:
Any board that has a PMIC capable of regulating VDD_ARM_IN and
VDD_SOC_IN to the setpoints from the IMX6 datasheet can operate in LDO
bypass mode, unless operating at 1.2GHz in which case the datasheet
states that the LDO must be used (not bypassed) to avoid ripple
sensitivity issues.
In ldo-bypass mode, we need trigger WDOG_B pin to reset pmic in
ldo-bypass mode. So add set_wdog_reset to do this work.
This looks to me as an item very bound to the board. Could it be
possible to use another pin (I do not know the schematics, I remember
that such as reset pin was fix on previous i.MX) ? If answer is yes, can
these changes be used by other board or are they only for sabresd ?
agreed - this is a board-specific pinmux
Signed-off-by: Peng Fan peng@freescale.com
Signed-off-by: Robin Gong b38...@freescale.com
Signed-off-by: Nitin Garg nitin.g...@freescale.com
---
arch/arm/cpu/armv7/mx6/soc.c | 141
++
arch/arm/include/asm/arch-mx6/sys_proto.h | 9 ++
2 files changed, 150 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 5f5f497..5d02755 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -18,6 +18,7 @@
#include asm/arch/sys_proto.h
#include asm/imx-common/boot_mode.h
#include asm/imx-common/dma.h
+#include libfdt.h
#include stdbool.h
#include asm/arch/mxc_hdmi.h
#include asm/arch/crm_regs.h
@@ -429,6 +430,146 @@ void s_init(void)
writel(mask528, anatop-pfd_528_clr);
}
+#ifdef CONFIG_LDO_BYPASS_CHECK
+DECLARE_GLOBAL_DATA_PTR;
+static int ldo_bypass;
mmmhhglobal to the module ?
+
+int check_ldo_bypass(void)
+{
+ const int *ldo_mode;
+ int node;
+
+ /* get the right fdt_blob from the global working_fdt */
+ gd-fdt_blob = working_fdt;
+ /* Get the node from FDT for anatop ldo-bypass */
+ node = fdt_node_offset_by_compatible(gd-fdt_blob, -1,
+ fsl,imx6q-gpc);
+ if (node 0) {
+ printf(No gpc device node %d, force to ldo-enable.\n, node);
+ return 0;
+ }
+ ldo_mode = fdt_getprop(gd-fdt_blob, node, fsl,ldo-bypass, NULL);
I am quite lost. I have searched in kernel (current TOT), and I have not
found such property. Can you help me to understand ?
Right - you won't find it because its a Freescale vendor kernel
implementation only. A hack if you ask me to avoid having to doing
ldo-byapss the right way.
Here are the threads that I know of regarding ldo-bypass in the
kernel, where it needs to be:
https://lkml.org/lkml/2014/12/18/255
https://lkml.org/lkml/2014/10/31/3
Peng,
I think what you are trying to do here is to put the anatop regulators
in bypass mode so that the Freescale vendor kernel leaves them
bypassed (which is what the 3.10.x based vendor kernels supporting
device-tree at http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git
do). This is what the Freescale vendor U-Boot does and so they have
created a horrible dependence between kernel and bootloader.
Instead you may be interested in what I did for our BSP's that use the
Freescale vendor kernel. Instead of touching U-Boot, I look for the
fsl,ldo-bypass node in the kernel and enable it just like their
bootloader would have:
https://github.com/Gateworks/linux-imx6/commit/a1af6ac6f00b4da7c8a5656e8ff093d4ab5cadee
That said, I would love to see some help getting IMX6 ldo-bypass
support upstream. All of our boards have an external PMIC and are
capable of bypass mode. Bypassing the LDO on such boards really helps
reduce overall board power consumption as well as move heat from the
CPU to the PMIC.
Tim
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Re: [U-Boot] [PATCH] mtd: nand: mxs: fix PIO_WORD number
On 10/02/2015 14:14, Stefano Babic wrote: Hi Luca, On 16/12/2014 09:06, Luca Ellero wrote: Scheduling the patch for -next it's ok for me. However there are other two points where pio_words number doesn't reflect the pio_words really initiated, one is in mxs_nand_read_buf() and one is in mxs_nand_write_buf(). Each one declares 4 pio_words but only one is initiated. I wonder what we should do in this cases. You can fix those as well. I recall that all this goop came from the original (2.6.35) GPMI NAND driver, which is likely where all those bugs came from as well. Thank you! OK, I will send a patch to fix them. Do you plan to send a V2 patch for fixing all the issues at once ? Best regards, Stefano Babic Hi Stefano, yes, I can send a patch with all the fixes, that's fine. I plan to send it tomorrow. Regards Luca -- Luca Ellero E-mail: luca.ell...@brickedbrain.com Internet: www.brickedbrain.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 5/6] 82xx/km82xx: read the IVM eeprom earlier
This allows to define the ethaddr env variable according to the the IVM
content by reading the IVM in misc_init_r.
Later, when HUSH is available the content read earlier is analyzed to
populate some non env variables.
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
---
Changes in v3: None
Changes in v2: None
board/keymile/km82xx/km82xx.c | 10 +-
include/configs/km82xx.h | 2 ++
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/board/keymile/km82xx/km82xx.c b/board/keymile/km82xx/km82xx.c
index bf84676..c3a1131 100644
--- a/board/keymile/km82xx/km82xx.c
+++ b/board/keymile/km82xx/km82xx.c
@@ -18,6 +18,8 @@
#include i2c.h
#include ../common/common.h
+static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN];
+
/*
* I/O Port configuration table
*
@@ -393,9 +395,15 @@ int board_early_init_r(void)
return 0;
}
+int misc_init_r(void)
+{
+ ivm_simple_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
+ return 0;
+}
+
int hush_init_var(void)
{
- ivm_read_eeprom();
+ ivm_analyze_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
return 0;
}
diff --git a/include/configs/km82xx.h b/include/configs/km82xx.h
index 14fd290..12f9d42 100644
--- a/include/configs/km82xx.h
+++ b/include/configs/km82xx.h
@@ -34,6 +34,8 @@
#defineCONFIG_SYS_TEXT_BASE0xFE00
+#define CONFIG_MISC_INIT_R
+
/* include common defines/options for all Keymile boards */
#include km/keymile-common.h
#include km/km-powerpc.h
--
1.8.0.1
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[U-Boot] [PATCH v3 1/6] KM/IVM: split the IVM reading and parsing in 2 parts
This allows to first read the IVM content (earlier in the boot sequence)
and define the ethaddr env variable thanks to the ivm_read_eepromi().
Later, the IVM content can be parsed and used to define some hush
variables, when the hush subsystem is available thanks to
ivm_analyze_eeprom().
To avoid the HW read to happen twice, the buffer passed to
ivm_read_eeprom() has to be reused by ivm_analyze_eeprom (and thus
allocated before calling ivm_read_eeprom()).
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
---
Changes in v3:
- Fix typo that prevented patch 1/6 from compiling
Changes in v2:
- Include the first patch, which was forgotten in the first submission
board/keymile/common/common.h | 2 +
board/keymile/common/ivm.c| 86 ++-
2 files changed, 63 insertions(+), 25 deletions(-)
diff --git a/board/keymile/common/common.h b/board/keymile/common/common.h
index e075f46..7e16d25 100644
--- a/board/keymile/common/common.h
+++ b/board/keymile/common/common.h
@@ -127,6 +127,8 @@ struct bfticu_iomap {
int ethernet_present(void);
int ivm_read_eeprom(void);
+int ivm_simple_read_eeprom(unsigned char *buf, int len);
+int ivm_analyze_eeprom(unsigned char *buf, int len);
int trigger_fpga_config(void);
int wait_for_fpga_config(void);
diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c
index b6b19cc..9abc09a 100644
--- a/board/keymile/common/ivm.c
+++ b/board/keymile/common/ivm.c
@@ -10,6 +10,8 @@
#include i2c.h
#include common.h
+#define MAC_STR_SZ 20
+
static int ivm_calc_crc(unsigned char *buf, int len)
{
const unsigned short crc_tab[16] = {
@@ -185,45 +187,37 @@ static int ivm_check_crc(unsigned char *buf, int block)
return 0;
}
-static int calculate_mac_offset(unsigned char *valbuf, unsigned char *buf,
+/* take care of the possible MAC address offset and the IVM content offset */
+static int process_mac(unsigned char *valbuf, unsigned char *buf,
int offset)
{
+ unsigned char mac[6];
unsigned long val = (buf[4] 16) + (buf[5] 8) + buf[6];
- if (offset == 0)
- return 0;
+ /* use an intermediate buffer, to not change IVM content
+* MAC address is at offset 1
+*/
+ memcpy(mac, buf+1, 6);
- val += offset;
- buf[4] = (val 16) 0xff;
- buf[5] = (val 8) 0xff;
- buf[6] = val 0xff;
- sprintf((char *)valbuf, %pM, buf + 1);
+ if (offset) {
+ val += offset;
+ mac[3] = (val 16) 0xff;
+ mac[4] = (val 8) 0xff;
+ mac[5] = val 0xff;
+ }
+
+ sprintf((char *)valbuf, %pM, mac);
return 0;
}
static int ivm_analyze_block2(unsigned char *buf, int len)
{
- unsigned char valbuf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN];
+ unsigned char valbuf[MAC_STR_SZ];
unsigned long count;
/* IVM_MAC Adress begins at offset 1 */
sprintf((char *)valbuf, %pM, buf + 1);
ivm_set_value(IVM_MacAddress, (char *)valbuf);
- /* if an offset is defined, add it */
- calculate_mac_offset(buf, valbuf, CONFIG_PIGGY_MAC_ADRESS_OFFSET);
-#ifdef MACH_TYPE_KM_KIRKWOOD
- setenv((char *)ethaddr, (char *)valbuf);
-#else
- if (getenv(ethaddr) == NULL)
- setenv((char *)ethaddr, (char *)valbuf);
-#endif
-#ifdef CONFIG_KMVECT1
-/* KMVECT1 has two ethernet interfaces */
- if (getenv(eth1addr) == NULL) {
- calculate_mac_offset(buf, valbuf, 1);
- setenv((char *)eth1addr, (char *)valbuf);
- }
-#endif
/* IVM_MacCount */
count = (buf[10] 24) +
(buf[11] 16) +
@@ -236,7 +230,7 @@ static int ivm_analyze_block2(unsigned char *buf, int len)
return 0;
}
-static int ivm_analyze_eeprom(unsigned char *buf, int len)
+int ivm_analyze_eeprom(unsigned char *buf, int len)
{
unsigned short val;
unsigned char valbuf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN];
@@ -296,6 +290,48 @@ static int ivm_analyze_eeprom(unsigned char *buf, int len)
return 0;
}
+static int ivm_populate_env(unsigned char *buf, int len)
+{
+ unsigned char *page2;
+ unsigned char valbuf[MAC_STR_SZ];
+
+ /* do we have the page 2 filled ? if not return */
+ if (ivm_check_crc(buf, 2))
+ return 0;
+ page2 = buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN*2];
+
+ /* if an offset is defined, add it */
+ process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET);
+ if (getenv(ethaddr) == NULL)
+ setenv((char *)ethaddr, (char *)valbuf);
+#ifdef CONFIG_KMVECT1
+/* KMVECT1 has two ethernet interfaces */
+ if (getenv(eth1addr) == NULL) {
+ process_mac(valbuf, page2, 1);
+ setenv((char *)eth1addr, (char *)valbuf);
+ }
+#endif
+
+ return 0;
+}
+
+int ivm_simple_read_eeprom(unsigned char *buf, int len)
+{
+
[U-Boot] [RFC PATCH v3 07/14] dm: eth: Add basic driver model support to Ethernet stack
First just add support for MAC drivers.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
Changes in v3:
-Correct the pre_unbind logic
-Correct failure chaining from bind to probe to init
--Fail init if not activated
--Fail probe if ethaddr not set
-Update ethaddr from env unconditionally on init
-Use set current to select the current device regardless of the previous
selection
-Allow current eth dev to be NULL
-Fixed blank line formatting for variable declaration
Changes in v2:
-Updated comments
-Removed extra parentheses
-Changed eth_uclass_priv local var names to be uc_priv
-Update error codes
-Cause an invalid name to fail binding
-Rebase on top of dm/master
-Stop maintaining our own index and use DM seq now that it works for our needs
-Move the hwaddr to platdata so that its memory is allocated at bind when we
need it
-Prevent device from being probed before used by a command (i.e. before
eth_init()).
common/board_r.c | 4 +-
common/cmd_bdinfo.c| 2 +
include/dm/uclass-id.h | 1 +
include/net.h | 25
net/eth.c | 336 -
5 files changed, 361 insertions(+), 7 deletions(-)
diff --git a/common/board_r.c b/common/board_r.c
index 68a9448..75147b7 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -556,7 +556,7 @@ static int initr_bbmii(void)
}
#endif
-#ifdef CONFIG_CMD_NET
+#if defined(CONFIG_CMD_NET) !defined(CONFIG_DM_ETH)
static int initr_net(void)
{
puts(Net: );
@@ -825,7 +825,7 @@ init_fnc_t init_sequence_r[] = {
#ifdef CONFIG_BITBANGMII
initr_bbmii,
#endif
-#ifdef CONFIG_CMD_NET
+#if defined(CONFIG_CMD_NET) !defined(CONFIG_DM_ETH)
INIT_FUNC_WATCHDOG_RESET
initr_net,
#endif
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index e6d8a7a..8688cf9 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -34,6 +34,7 @@ static void print_eth(int idx)
printf(%-12s= %s\n, name, val);
}
+#ifndef CONFIG_DM_ETH
__maybe_unused
static void print_eths(void)
{
@@ -52,6 +53,7 @@ static void print_eths(void)
printf(current eth = %s\n, eth_get_name());
printf(ip_addr = %s\n, getenv(ipaddr));
}
+#endif
__maybe_unused
static void print_lnum(const char *name, unsigned long long value)
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 91bb90d..ad96682 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -34,6 +34,7 @@ enum uclass_id {
UCLASS_I2C_GENERIC, /* Generic I2C device */
UCLASS_I2C_EEPROM, /* I2C EEPROM device */
UCLASS_MOD_EXP, /* RSA Mod Exp device */
+ UCLASS_ETH, /* Ethernet device */
UCLASS_COUNT,
UCLASS_INVALID = -1,
diff --git a/include/net.h b/include/net.h
index 4d7575e..11471bd 100644
--- a/include/net.h
+++ b/include/net.h
@@ -78,6 +78,30 @@ enum eth_state_t {
ETH_STATE_ACTIVE
};
+#ifdef CONFIG_DM_ETH
+struct eth_pdata {
+ phys_addr_t iobase;
+ unsigned char enetaddr[6];
+};
+
+struct eth_ops {
+ int (*init)(struct udevice *dev, bd_t *bis);
+ int (*send)(struct udevice *dev, void *packet, int length);
+ int (*recv)(struct udevice *dev);
+ void (*halt)(struct udevice *dev);
+#ifdef CONFIG_MCAST_TFTP
+ int (*mcast)(struct udevice *dev, const u8 *enetaddr, u8 set);
+#endif
+ int (*write_hwaddr)(struct udevice *dev);
+};
+
+struct udevice *eth_get_dev(void); /* get the current device */
+unsigned char *eth_get_ethaddr(void); /* get the current device MAC */
+int eth_init_state_only(bd_t *bis); /* Set active state */
+void eth_halt_state_only(void); /* Set passive state */
+#endif
+
+#ifndef CONFIG_DM_ETH
struct eth_device {
char name[16];
unsigned char enetaddr[6];
@@ -145,6 +169,7 @@ int eth_write_hwaddr(struct eth_device *dev, const char
*base_name,
int eth_number);
int usb_eth_initialize(bd_t *bi);
+#endif
void eth_try_another(int first_restart); /* Change the device */
void eth_set_current(void);/* set nterface to ethcur var */
diff --git a/net/eth.c b/net/eth.c
index c02548c..e84b948 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -1,12 +1,15 @@
/*
* (C) Copyright 2001-2010
* Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ * Joe Hershberger, National Instruments
*
* SPDX-License-Identifier:GPL-2.0+
*/
#include common.h
#include command.h
+#include dm.h
+#include dm/device-internal.h
#include net.h
#include miiphy.h
#include phy.h
@@ -72,6 +75,331 @@ static int eth_mac_skip(int index)
return ((skip_state = getenv(enetvar)) != NULL);
}
+static void eth_current_changed(void);
+
+#ifdef CONFIG_DM_ETH
+struct eth_device_priv {
+ int state;
+ void *priv;
+};
+
+struct eth_uclass_priv {
+ struct udevice *current;
+};
+
+static void eth_set_current_to_next(void)
+{
+ struct uclass *uc;
+ struct eth_uclass_priv
[U-Boot] [RFC PATCH v3 11/14] dm: eth: Add support for aliases
Allow network devices to be referred to as eth0 instead of
eth@12345678 when specified in ethact.
Add tests to verify this behavior.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
Changes in v3:
-Added support for aliases
Changes in v2: None
include/configs/sandbox.h | 4 ++--
include/fdtdec.h | 1 +
include/net.h | 5 +
lib/fdtdec.c | 1 +
net/eth.c | 53 +++
test/dm/eth.c | 25 ++
test/dm/test.dts | 10 +
7 files changed, 84 insertions(+), 15 deletions(-)
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index fdba1c8..9df5f74 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -187,7 +187,7 @@
stderr=serial,lcd\0 \
ethaddr=00:00:11:22:33:44\0 \
eth1addr=00:00:11:22:33:45\0 \
- eth2addr=00:00:11:22:33:46\0 \
+ eth5addr=00:00:11:22:33:46\0 \
ipaddr=1.2.3.4\0
#else
@@ -196,7 +196,7 @@
stderr=serial,lcd\0 \
ethaddr=00:00:11:22:33:44\0 \
eth1addr=00:00:11:22:33:45\0 \
- eth2addr=00:00:11:22:33:46\0 \
+ eth5addr=00:00:11:22:33:46\0 \
ipaddr=1.2.3.4\0
#endif
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 231eed7..e945baa 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -167,6 +167,7 @@ enum fdt_compat_id {
COMPAT_INTEL_GMA, /* Intel Graphics Media Accelerator */
COMPAT_AMS_AS3722, /* AMS AS3722 PMIC */
COMPAT_INTEL_ICH_SPI, /* Intel ICH7/9 SPI controller */
+ COMPAT_ETHERNET,/* Ethernet devices */
COMPAT_COUNT,
};
diff --git a/include/net.h b/include/net.h
index 11471bd..4e98850 100644
--- a/include/net.h
+++ b/include/net.h
@@ -38,6 +38,8 @@
#define PKTALIGN ARCH_DMA_MINALIGN
+#define ETH_MAX_DEVS 32
+
/* IPv4 addresses are always 32 bits in size */
typedef __be32 IPaddr_t;
@@ -79,6 +81,8 @@ enum eth_state_t {
};
#ifdef CONFIG_DM_ETH
+#define ETH_ALIAS_ROOT eth
+
struct eth_pdata {
phys_addr_t iobase;
unsigned char enetaddr[6];
@@ -96,6 +100,7 @@ struct eth_ops {
};
struct udevice *eth_get_dev(void); /* get the current device */
+struct udevice *eth_get_dev_by_name(const char *devname);
unsigned char *eth_get_ethaddr(void); /* get the current device MAC */
int eth_init_state_only(bd_t *bis); /* Set active state */
void eth_halt_state_only(void); /* Set passive state */
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 5bf8f29..33b0a53 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -75,6 +75,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(INTEL_GMA, intel,gma),
COMPAT(AMS_AS3722, ams,as3722),
COMPAT(INTEL_ICH_SPI, intel,ich-spi),
+ COMPAT(ETHERNET, eth),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
diff --git a/net/eth.c b/net/eth.c
index e84b948..762effe 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -10,11 +10,14 @@
#include command.h
#include dm.h
#include dm/device-internal.h
+#include fdtdec.h
#include net.h
#include miiphy.h
#include phy.h
#include asm/errno.h
+DECLARE_GLOBAL_DATA_PTR;
+
void eth_parse_enetaddr(const char *addr, uchar *enetaddr)
{
char *end;
@@ -121,6 +124,39 @@ static void eth_set_dev(struct udevice *dev)
uc_priv-current = dev;
}
+/*
+ * Find the udevice that either has the name passed in as devname or has an
+ * alias named devname.
+ */
+struct udevice *eth_get_dev_by_name(const char *devname)
+{
+ int node_list[ETH_MAX_DEVS];
+ int count;
+ int seq;
+ char *endp = NULL;
+ const char *true_name = devname;
+ struct udevice *it;
+ struct uclass *uc;
+
+ count = fdtdec_find_aliases_for_id(gd-fdt_blob, ETH_ALIAS_ROOT,
+ COMPAT_ETHERNET, node_list,
+ ETH_MAX_DEVS);
+
+ seq = simple_strtoul(devname + strlen(ETH_ALIAS_ROOT), endp, 10);
+
+ if (endp devname + strlen(ETH_ALIAS_ROOT) count seq
+ node_list[seq])
+ true_name = fdt_get_name(gd-fdt_blob, node_list[seq], NULL);
+
+ uclass_get(UCLASS_ETH, uc);
+ uclass_foreach_dev(it, uc) {
+ if (strcmp(it-name, true_name) == 0 || it-seq == seq)
+ return it;
+ }
+
+ return NULL;
+}
+
unsigned char *eth_get_ethaddr(void)
{
struct eth_pdata *pdata;
@@ -396,6 +432,7 @@ UCLASS_DRIVER(eth) = {
[U-Boot] [RFC PATCH v3 06/14] net: Refactor in preparation for driver model
Move some things around and organize things so that the driver model
implementation will fit in more easily.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Reviewed-by: Simon Glass s...@chromium.org
---
Changes in v3:
-Move the get_dev_by_* protos to also be !DM_ETH like the impl
Changes in v2: None
include/net.h | 66 +++-
net/eth.c | 75 +++
2 files changed, 74 insertions(+), 67 deletions(-)
diff --git a/include/net.h b/include/net.h
index ff8b7af..4d7575e 100644
--- a/include/net.h
+++ b/include/net.h
@@ -100,10 +100,7 @@ struct eth_device {
int eth_initialize(bd_t *bis); /* Initialize network subsystem */
int eth_register(struct eth_device *dev);/* Register network device */
int eth_unregister(struct eth_device *dev);/* Remove network device */
-void eth_try_another(int first_restart); /* Change the device */
-void eth_set_current(void);/* set nterface to ethcur var */
-/* get the current device MAC */
extern struct eth_device *eth_current;
static inline __attribute__((always_inline))
@@ -111,7 +108,10 @@ struct eth_device *eth_get_dev(void)
{
return eth_current;
}
+struct eth_device *eth_get_dev_by_name(const char *devname);
+struct eth_device *eth_get_dev_by_index(int index); /* get dev @ index */
+/* get the current device MAC */
static inline unsigned char *eth_get_ethaddr(void)
{
if (eth_current)
@@ -119,8 +119,36 @@ static inline unsigned char *eth_get_ethaddr(void)
return NULL;
}
-struct eth_device *eth_get_dev_by_name(const char *devname);
-struct eth_device *eth_get_dev_by_index(int index); /* get dev @ index */
+/* Set active state */
+static inline __attribute__((always_inline)) int eth_init_state_only(bd_t *bis)
+{
+ eth_get_dev()-state = ETH_STATE_ACTIVE;
+
+ return 0;
+}
+/* Set passive state */
+static inline __attribute__((always_inline)) void eth_halt_state_only(void)
+{
+ eth_get_dev()-state = ETH_STATE_PASSIVE;
+}
+
+/*
+ * Set the hardware address for an ethernet interface based on 'eth%daddr'
+ * environment variable (or just 'ethaddr' if eth_number is 0).
+ * Args:
+ * base_name - base name for device (normally eth)
+ * eth_number - value of %d (0 for first device of this type)
+ * Returns:
+ * 0 is success, non-zero is error status from driver.
+ */
+int eth_write_hwaddr(struct eth_device *dev, const char *base_name,
+int eth_number);
+
+int usb_eth_initialize(bd_t *bi);
+
+void eth_try_another(int first_restart); /* Change the device */
+void eth_set_current(void);/* set nterface to ethcur var */
+
int eth_get_dev_index(void); /* get the device index */
void eth_parse_enetaddr(const char *addr, uchar *enetaddr);
int eth_getenv_enetaddr(char *name, uchar *enetaddr);
@@ -138,7 +166,6 @@ int eth_setenv_enetaddr(char *name, const uchar *enetaddr);
int eth_getenv_enetaddr_by_index(const char *base_name, int index,
uchar *enetaddr);
-int usb_eth_initialize(bd_t *bi);
int eth_init(bd_t *bis); /* Initialize the device */
int eth_send(void *packet, int length); /* Send a packet */
@@ -148,32 +175,7 @@ void (*push_packet)(void *packet, int length);
#endif
int eth_rx(void); /* Check for received packets */
void eth_halt(void); /* stop SCC */
-char *eth_get_name(void); /* get name of current device */
-
-/* Set active state */
-static inline __attribute__((always_inline)) int eth_init_state_only(bd_t *bis)
-{
- eth_get_dev()-state = ETH_STATE_ACTIVE;
-
- return 0;
-}
-/* Set passive state */
-static inline __attribute__((always_inline)) void eth_halt_state_only(void)
-{
- eth_get_dev()-state = ETH_STATE_PASSIVE;
-}
-
-/*
- * Set the hardware address for an ethernet interface based on 'eth%daddr'
- * environment variable (or just 'ethaddr' if eth_number is 0).
- * Args:
- * base_name - base name for device (normally eth)
- * eth_number - value of %d (0 for first device of this type)
- * Returns:
- * 0 is success, non-zero is error status from driver.
- */
-int eth_write_hwaddr(struct eth_device *dev, const char *base_name,
-int eth_number);
+const char *eth_get_name(void);/* get name of current device */
#ifdef CONFIG_MCAST_TFTP
int eth_mcast_join(IPaddr_t mcast_addr, u8 join);
diff --git a/net/eth.c b/net/eth.c
index 65e8c77..c02548c 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -55,6 +55,14 @@ static inline int eth_setenv_enetaddr_by_index(const char
*base_name, int index,
return eth_setenv_enetaddr(enetvar, enetaddr);
}
+static void eth_env_init(void)
+{
+ const char *s;
+
+ s = getenv(bootfile);
+ if (s != NULL)
+ copy_filename(BootFile, s, sizeof(BootFile));
+}
static int eth_mac_skip(int
[U-Boot] [RFC PATCH v3 02/14] test: dm: Reorder the objects to build
Signed-off-by: Joe Hershberger joe.hershber...@ni.com --- Changes in v3: -Reorder dm test makefile Changes in v2: None test/dm/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/test/dm/Makefile b/test/dm/Makefile index 612aa95..1d9148f 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -18,7 +18,7 @@ obj-$(CONFIG_DM_TEST) += core.o obj-$(CONFIG_DM_TEST) += ut.o ifneq ($(CONFIG_SANDBOX),) obj-$(CONFIG_DM_GPIO) += gpio.o -obj-$(CONFIG_DM_SPI) += spi.o -obj-$(CONFIG_DM_SPI_FLASH) += sf.o obj-$(CONFIG_DM_I2C) += i2c.o +obj-$(CONFIG_DM_SPI_FLASH) += sf.o +obj-$(CONFIG_DM_SPI) += spi.o endif -- 1.7.11.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH v3 12/14] dm: eth: Add support for ethprime env var
The ethprime env var is used to indicate the starting device if none is
specified in ethact. Also support aliases specified in the ethprime var.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
Changes in v3:
-Added support for ethprime
Changes in v2: None
net/eth.c | 13 -
test/dm/eth.c | 21 +
2 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/net/eth.c b/net/eth.c
index 762effe..1770662 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -893,8 +893,19 @@ void eth_set_current(void)
act = getenv(ethact);
env_changed_id = env_id;
}
- if (act != NULL)
+
+ if (act == NULL) {
+ char *ethprime = getenv(ethprime);
+
+ if (ethprime eth_get_dev_by_name(ethprime)) {
+ eth_set_dev(eth_get_dev_by_name(ethprime));
+ } else {
+ eth_set_dev(NULL);
+ eth_set_current_to_next();
+ }
+ } else {
eth_set_dev(eth_get_dev_by_name(act));
+ }
eth_current_changed();
}
diff --git a/test/dm/eth.c b/test/dm/eth.c
index c0a8ab5..b39a94a 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -62,3 +62,24 @@ static int dm_test_eth_alias(struct dm_test_state *dms)
}
DM_TEST(dm_test_eth_alias, DM_TESTF_SCAN_FDT);
+
+static int dm_test_eth_prime(struct dm_test_state *dms)
+{
+ NetPingIP = string_to_ip(1.1.2.2);
+
+ /* Expected to be eth@10003000 because of ethprime variable */
+ setenv(ethact, NULL);
+ setenv(ethprime, eth5);
+ ut_assertok(NetLoop(PING));
+ ut_asserteq_str(eth@10003000, getenv(ethact));
+
+ /* Expected to be eth@10002000 because it is first */
+ setenv(ethact, NULL);
+ setenv(ethprime, NULL);
+ ut_assertok(NetLoop(PING));
+ ut_asserteq_str(eth@10002000, getenv(ethact));
+
+ return 0;
+}
+
+DM_TEST(dm_test_eth_prime, DM_TESTF_SCAN_FDT);
--
1.7.11.5
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[U-Boot] [RFC PATCH v3 03/14] net: Provide a function to get the current MAC address
The current implementation exposes the eth_device struct to code that
needs to access the MAC address. Add a wrapper function for this to
abstract away the pointer for this operation.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Reviewed-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
arch/mips/cpu/mips32/au1x00/au1x00_eth.c | 2 +-
arch/powerpc/cpu/mpc8260/ether_fcc.c | 2 +-
arch/powerpc/cpu/mpc85xx/ether_fcc.c | 2 +-
arch/powerpc/cpu/mpc8xx/scc.c| 2 +-
include/net.h| 8
net/net.c| 2 +-
6 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/arch/mips/cpu/mips32/au1x00/au1x00_eth.c
b/arch/mips/cpu/mips32/au1x00/au1x00_eth.c
index 4770f56..535d713 100644
--- a/arch/mips/cpu/mips32/au1x00/au1x00_eth.c
+++ b/arch/mips/cpu/mips32/au1x00/au1x00_eth.c
@@ -238,7 +238,7 @@ static int au1x00_init(struct eth_device* dev, bd_t * bd){
}
/* Put mac addr in little endian */
-#define ea eth_get_dev()-enetaddr
+#define ea eth_get_ethaddr()
*mac_addr_high = (ea[5] 8) | (ea[4] ) ;
*mac_addr_low = (ea[3] 24) | (ea[2] 16) |
(ea[1] 8) | (ea[0] ) ;
diff --git a/arch/powerpc/cpu/mpc8260/ether_fcc.c
b/arch/powerpc/cpu/mpc8260/ether_fcc.c
index f9f15b5..f777ba1 100644
--- a/arch/powerpc/cpu/mpc8260/ether_fcc.c
+++ b/arch/powerpc/cpu/mpc8260/ether_fcc.c
@@ -299,7 +299,7 @@ static int fec_init(struct eth_device* dev, bd_t *bis)
* it unique by setting a few bits in the upper byte of the
* non-static part of the address.
*/
-#define ea eth_get_dev()-enetaddr
+#define ea eth_get_ethaddr()
pram_ptr-fen_paddrh = (ea[5] 8) + ea[4];
pram_ptr-fen_paddrm = (ea[3] 8) + ea[2];
pram_ptr-fen_paddrl = (ea[1] 8) + ea[0];
diff --git a/arch/powerpc/cpu/mpc85xx/ether_fcc.c
b/arch/powerpc/cpu/mpc85xx/ether_fcc.c
index 166dc9e..58d4bfb 100644
--- a/arch/powerpc/cpu/mpc85xx/ether_fcc.c
+++ b/arch/powerpc/cpu/mpc85xx/ether_fcc.c
@@ -338,7 +338,7 @@ static int fec_init(struct eth_device* dev, bd_t *bis)
* it unique by setting a few bits in the upper byte of the
* non-static part of the address.
*/
-#define ea eth_get_dev()-enetaddr
+#define ea eth_get_ethaddr()
pram_ptr-fen_paddrh = (ea[5] 8) + ea[4];
pram_ptr-fen_paddrm = (ea[3] 8) + ea[2];
pram_ptr-fen_paddrl = (ea[1] 8) + ea[0];
diff --git a/arch/powerpc/cpu/mpc8xx/scc.c b/arch/powerpc/cpu/mpc8xx/scc.c
index 251966b..66e4014 100644
--- a/arch/powerpc/cpu/mpc8xx/scc.c
+++ b/arch/powerpc/cpu/mpc8xx/scc.c
@@ -339,7 +339,7 @@ static int scc_init (struct eth_device *dev, bd_t * bis)
pram_ptr-sen_gaddr3 = 0x0; /* Group Address Filter 3 (unused) */
pram_ptr-sen_gaddr4 = 0x0; /* Group Address Filter 4 (unused) */
-#define ea eth_get_dev()-enetaddr
+#define ea eth_get_ethaddr()
pram_ptr-sen_paddrh = (ea[5] 8) + ea[4];
pram_ptr-sen_paddrm = (ea[3] 8) + ea[2];
pram_ptr-sen_paddrl = (ea[1] 8) + ea[0];
diff --git a/include/net.h b/include/net.h
index 73ea88b..a9579ee 100644
--- a/include/net.h
+++ b/include/net.h
@@ -111,6 +111,14 @@ struct eth_device *eth_get_dev(void)
{
return eth_current;
}
+
+static inline unsigned char *eth_get_ethaddr(void)
+{
+ if (eth_current)
+ return eth_current-enetaddr;
+ return NULL;
+}
+
extern struct eth_device *eth_get_dev_by_name(const char *devname);
extern struct eth_device *eth_get_dev_by_index(int index); /* get dev @ index
*/
extern int eth_get_dev_index(void);/* get the device index */
diff --git a/net/net.c b/net/net.c
index 2bea07b..ddd630c 100644
--- a/net/net.c
+++ b/net/net.c
@@ -275,7 +275,7 @@ static void NetInitLoop(void)
env_changed_id = env_id;
}
if (eth_get_dev())
- memcpy(NetOurEther, eth_get_dev()-enetaddr, 6);
+ memcpy(NetOurEther, eth_get_ethaddr(), 6);
return;
}
--
1.7.11.5
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[U-Boot] [PATCH] sandbox: Adjust the order of the NO_SDL check
An option is provided to avoid using SDL in U-Boot sandbox (and drop support for the LCD). However the check in the Makefile is too late and warnings are printed even if NO_SDL=y is given. Adjust the order to avoid this warning. Signed-off-by: Simon Glass s...@chromium.org --- arch/sandbox/config.mk | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk index e38a44b..7b84f02 100644 --- a/arch/sandbox/config.mk +++ b/arch/sandbox/config.mk @@ -5,10 +5,16 @@ PLATFORM_CPPFLAGS += -D__SANDBOX__ -U_FORTIFY_SOURCE PLATFORM_CPPFLAGS += -DCONFIG_ARCH_MAP_SYSMEM -DCONFIG_SYS_GENERIC_BOARD PLATFORM_LIBS += -lrt +# Define this to avoid linking with SDL, which requires SDL libraries +# This can solve 'sdl-config: Command not found' errors +ifneq ($(NO_SDL),) +PLATFORM_CPPFLAGS += -DSANDBOX_NO_SDL +else ifdef CONFIG_SANDBOX_SDL PLATFORM_LIBS += $(shell sdl-config --libs) PLATFORM_CPPFLAGS += $(shell sdl-config --cflags) endif +endif # Support generic board on sandbox __HAVE_ARCH_GENERIC_BOARD := y @@ -18,9 +24,3 @@ cmd_u-boot__ = $(CC) -o $@ -T u-boot.lds \ $(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot.map CONFIG_ARCH_DEVICE_TREE := sandbox - -# Define this to avoid linking with SDL, which requires SDL libraries -# This can solve 'sdl-config: Command not found' errors -ifneq ($(NO_SDL),) -PLATFORM_CPPFLAGS += -DSANDBOX_NO_SDL -endif -- 2.2.0.rc0.207.ga3a616c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/6] x86: Move common Chromebook config into a separate file
Since Chromebooks mostly have similar configuration, put it in a common
file.
Signed-off-by: Simon Glass s...@chromium.org
---
include/configs/chromebook_link.h | 61 +--
include/configs/x86-chromebook.h | 68 +++
2 files changed, 69 insertions(+), 60 deletions(-)
create mode 100644 include/configs/x86-chromebook.h
diff --git a/include/configs/chromebook_link.h
b/include/configs/chromebook_link.h
index 7b460e8..5265787 100644
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -14,65 +14,6 @@
#define __CONFIG_H
#include configs/x86-common.h
-
-
-#define CONFIG_SYS_MONITOR_LEN (1 20)
-
-#define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_MISC_INIT_R
-
-#define CONFIG_NR_DRAM_BANKS 8
-#define CONFIG_X86_MRC_ADDR0xfffa
-#define CONFIG_CACHE_MRC_SIZE_KB 512
-
-#define CONFIG_X86_SERIAL
-
-#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \
- PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
- {PCI_VENDOR_ID_INTEL, \
- PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
- {PCI_VENDOR_ID_INTEL, \
- PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
- {PCI_VENDOR_ID_INTEL, \
- PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
-
-#define CONFIG_X86_OPTION_ROM_FILE pci8086,0166.bin
-#define CONFIG_X86_OPTION_ROM_ADDR 0xfff9
-
-#define CONFIG_PCI_MEM_BUS 0xe000
-#define CONFIG_PCI_MEM_PHYSCONFIG_PCI_MEM_BUS
-#define CONFIG_PCI_MEM_SIZE0x1000
-
-#define CONFIG_PCI_PREF_BUS0xd000
-#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS
-#define CONFIG_PCI_PREF_SIZE 0x1000
-
-#define CONFIG_PCI_IO_BUS 0x1000
-#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
-#define CONFIG_PCI_IO_SIZE 0xefff
-
-#define CONFIG_SYS_EARLY_PCI_INIT
-#define CONFIG_PCI_PNP
-
-#define CONFIG_BIOSEMU
-#define VIDEO_IO_OFFSET0
-#define CONFIG_X86EMU_RAW_IO
-
-#define CONFIG_CROS_EC
-#define CONFIG_CROS_EC_LPC
-#define CONFIG_CMD_CROS_EC
-#define CONFIG_ARCH_EARLY_INIT_R
-
-#undef CONFIG_ENV_IS_NOWHERE
-#undef CONFIG_ENV_SIZE
-#define CONFIG_ENV_SIZE0x1000
-#define CONFIG_ENV_SECT_SIZE 0x1000
-#define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_OFFSET 0x003f8000
-
-#define CONFIG_STD_DEVICES_SETTINGS stdin=usbkbd,vga,serial\0 \
- stdout=vga,serial\0 \
- stderr=vga,serial\0
+#include configs/x86-chromebook.h
#endif /* __CONFIG_H */
diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h
new file mode 100644
index 000..b6a76fe
--- /dev/null
+++ b/include/configs/x86-chromebook.h
@@ -0,0 +1,68 @@
+/*
+ *
+ * Copyright (c) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _X86_CHROMEBOOK_H
+#define _X86_CHROMEBOOK_H
+
+#define CONFIG_SYS_MONITOR_LEN (1 20)
+
+#define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_NR_DRAM_BANKS 8
+#define CONFIG_X86_MRC_ADDR0xfffa
+#define CONFIG_CACHE_MRC_SIZE_KB 512
+
+#define CONFIG_X86_SERIAL
+
+#define CONFIG_SCSI_DEV_LIST \
+ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
+ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
+ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
+ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}, \
+ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI}
+
+#define CONFIG_X86_OPTION_ROM_FILE pci8086,0166.bin
+#define CONFIG_X86_OPTION_ROM_ADDR 0xfff9
+
+#define CONFIG_PCI_MEM_BUS 0xe000
+#define CONFIG_PCI_MEM_PHYSCONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE0x1000
+
+#define CONFIG_PCI_PREF_BUS0xd000
+#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS
+#define CONFIG_PCI_PREF_SIZE 0x1000
+
+#define CONFIG_PCI_IO_BUS 0x1000
+#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE 0xefff
+
+#define CONFIG_SYS_EARLY_PCI_INIT
+#define CONFIG_PCI_PNP
+
+#define CONFIG_BIOSEMU
+#define VIDEO_IO_OFFSET0
+#define CONFIG_X86EMU_RAW_IO
+
+#define CONFIG_CROS_EC
+#define CONFIG_CROS_EC_LPC
+#define CONFIG_CMD_CROS_EC
+#define CONFIG_ARCH_EARLY_INIT_R
+
+#undef CONFIG_ENV_IS_NOWHERE
+#undef CONFIG_ENV_SIZE
+#define CONFIG_ENV_SIZE0x1000
+#define CONFIG_ENV_SECT_SIZE 0x1000
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_OFFSET
[U-Boot] [PATCH 5/6] x86: pci: Add PCI IDs for lynxpoint
Add some new device IDs used by this haswell-based chipset. Signed-off-by: Simon Glass s...@chromium.org --- include/pci_ids.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/pci_ids.h b/include/pci_ids.h index dc2ca21..2e66851 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -3016,6 +3016,8 @@ #define PCI_DEVICE_ID_INTEL_TCF_UART_2 0x8813 #define PCI_DEVICE_ID_INTEL_TCF_UART_3 0x8814 #define PCI_DEVICE_ID_INTEL_IXP28000x9004 +#define PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI 0x9c03 +#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LPC 0x9c45 #define PCI_DEVICE_ID_INTEL_S21152BB 0xb152 #define PCI_VENDOR_ID_SCALEMP 0x8686 -- 2.2.0.rc0.207.ga3a616c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/6] x86: video: Allow keyboard presence to be controlled by device tree
At present a VGA console assumes a keyboard unless a CONFIG option is set.
This difference can be dealt with by a device tree option, allowing boards
that are otherwise the same to use the same configuration.
Signed-off-by: Simon Glass s...@chromium.org
---
doc/README.fdt-control | 16
drivers/video/cfb_console.c | 29 +++--
2 files changed, 35 insertions(+), 10 deletions(-)
diff --git a/doc/README.fdt-control b/doc/README.fdt-control
index d8fe4a8..e6d5ed0 100644
--- a/doc/README.fdt-control
+++ b/doc/README.fdt-control
@@ -171,6 +171,22 @@ After board configuration is done, fdt supported u-boot
can be build in two ways
$ make DEVICE_TREE=dts-file-name
+Configuration Options
+-
+
+A number of run-time configuration options are provided in the /config node
+of the control device tree. You can access these using fdtdec_get_config_int(),
+fdtdec_get_config_bool() and fdtdec_get_config_string().
+
+Available options are:
+
+silent-console
+ If present and non-zero, the console is silenced by default on boot.
+
+no-keyboard
+ Tells U-Boot not to expect an attached keyboard with a VGA console
+
+
Limitations
---
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index a81affa..fcaaa7f 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -87,6 +87,7 @@
*/
#include common.h
+#include fdtdec.h
#include version.h
#include malloc.h
#include linux/compiler.h
@@ -2251,6 +2252,7 @@ int drv_video_init(void)
{
int skip_dev_init;
struct stdio_dev console_dev;
+ bool have_keyboard;
/* Check if video initialization should be skipped */
if (board_video_skip())
@@ -2262,11 +2264,18 @@ int drv_video_init(void)
if (board_cfb_skip())
return 0;
-#if !defined(CONFIG_VGA_AS_SINGLE_DEVICE)
- debug(KBD: Keyboard init ...\n);
- skip_dev_init |= (VIDEO_KBD_INIT_FCT == -1);
+#if defined(CONFIG_VGA_AS_SINGLE_DEVICE)
+ have_keyboard = false;
+#elif defined(CONFIG_OF_CONTROL)
+ have_keyboard = !fdtdec_get_config_bool(gd-fdt_blob,
+ u-boot,no-keyboard);
+#else
+ have_keyboard = true;
#endif
-
+ if (have_keyboard) {
+ debug(KBD: Keyboard init ...\n);
+ skip_dev_init |= (VIDEO_KBD_INIT_FCT == -1);
+ }
if (skip_dev_init)
return 0;
@@ -2278,12 +2287,12 @@ int drv_video_init(void)
console_dev.putc = video_putc; /* 'putc' function */
console_dev.puts = video_puts; /* 'puts' function */
-#if !defined(CONFIG_VGA_AS_SINGLE_DEVICE)
- /* Also init console device */
- console_dev.flags |= DEV_FLAGS_INPUT;
- console_dev.tstc = VIDEO_TSTC_FCT; /* 'tstc' function */
- console_dev.getc = VIDEO_GETC_FCT; /* 'getc' function */
-#endif /* CONFIG_VGA_AS_SINGLE_DEVICE */
+ if (have_keyboard) {
+ /* Also init console device */
+ console_dev.flags |= DEV_FLAGS_INPUT;
+ console_dev.tstc = VIDEO_TSTC_FCT; /* 'tstc' function */
+ console_dev.getc = VIDEO_GETC_FCT; /* 'getc' function */
+ }
if (stdio_register(console_dev) != 0)
return 0;
--
2.2.0.rc0.207.ga3a616c
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Re: [U-Boot] [PATCH v5 3/3] imx:mx6 set normal APS and standby PFM mode
Hi, Stefano On 1/30/2015 1:48 AM, Stefano Babic wrote: On 27/01/2015 03:14, Peng Fan wrote: To normal mode, use APS switching mode. To standy mode, use PFM switching mode. Signed-off-by: Peng Fan peng@freescale.com Acked-by: Przemyslaw Marczak p.marc...@samsung.com --- Applied to u-boot-imx, thanks ! Did you miss this patch? I also did not see this one applied. Best regards, Stefano Babic Regards, Peng. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 06/12] pmic:pfuze add macro for setting voltage
Hi, Stefano
On 2/10/2015 7:54 PM, Stefano Babic wrote:
On 09/01/2015 09:59, Peng Fan wrote:
#define PFUZE100_SW1ABC_SETP(x) ((x - 3000) / 250)
This macro is for configuring SW1A/B/C Output Voltage easily.
Signed-off-by: Peng Fan peng@freescale.com
---
include/power/pfuze100_pmic.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/power/pfuze100_pmic.h b/include/power/pfuze100_pmic.h
index 7474afb..d304658 100644
--- a/include/power/pfuze100_pmic.h
+++ b/include/power/pfuze100_pmic.h
@@ -61,6 +61,8 @@ enum {
* Buck Regulators
*/
+#define PFUZE100_SW1ABC_SETP(x) ((x - 3000) / 250)
+
/* SW1A/B/C Output Voltage Configuration */
#define SW1x_0_300V 0
#define SW1x_0_325V 1
To inform you: patches 1-3 must be rebased and reworked, mainly due to
pmic_mode_init() (you have postpone V2 after discussion about
ldo-bypass). I start applying the 5-6, that contain only new defines.
I'll rebase patches 1-3 and make the three patches a single v2 patch set.
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
Thanks,
Peng.
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[U-Boot] [PATCH] ARM: imx6 Add WDOG3 for i.MX6SX
There are three wdogs for i.MX 6SoloX. Add wdog3 support in function imx_set_wdog_powerdown. Signed-off-by: Peng Fan peng@freescale.com --- arch/arm/cpu/armv7/mx6/soc.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index e599a12..e0bc9a9 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -230,6 +230,11 @@ static void imx_set_wdog_powerdown(bool enable) struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR; struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR; +#ifdef CONFIG_MX6SX + struct wdog_regs *wdog3 = (struct wdog_regs *)WDOG3_BASE_ADDR; + writew(enable, wdog3-wmcr); +#endif + /* Write to the PDE (Power Down Enable) bit */ writew(enable, wdog1-wmcr); writew(enable, wdog2-wmcr); -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/3] sunxi: Normalise FEL support
On Mon, 9 Feb 2015 15:23:17 -0700
Simon Glass s...@chromium.org wrote:
Hi Siarhei,
On 7 February 2015 at 20:48, Siarhei Siamashka
siarhei.siamas...@gmail.com wrote:
On Sat, 7 Feb 2015 10:47:30 -0700
Simon Glass s...@chromium.org wrote:
Make sunxi's FEL code fit with the normal U-Boot boot sequence instead of
creating its own. There are some #ifdefs required in start.S. Future work
will hopefully remove these.
This series is available at u-boot-dm, branch sunxi-working.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Adjust for new save_boot_params() API
- Drop patch to change r0 to r2 in start.S
- Add #ifdefs to start.S to deal with FEL
- Use 'Fast Early Loader' as the full name for FEL
Thanks for working on these patches. It looks like we are finally
getting really close to resolving the sunxi FEL boot problem.
Some comments are below.
arch/arm/cpu/armv7/start.S | 5 +-
arch/arm/cpu/armv7/sunxi/Makefile | 4 +-
arch/arm/cpu/armv7/sunxi/board.c| 21
arch/arm/cpu/armv7/sunxi/config.mk | 2 -
arch/arm/cpu/armv7/sunxi/fel_utils.S| 25 +
arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds | 82
-
arch/arm/include/asm/arch-sunxi/sys_proto.h | 10
board/sunxi/Kconfig | 10
include/configs/sunxi-common.h | 6 +--
scripts/Makefile.spl| 2 -
10 files changed, 73 insertions(+), 94 deletions(-)
create mode 100644 arch/arm/cpu/armv7/sunxi/fel_utils.S
delete mode 100644 arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 9b49ece..098a83a 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -54,7 +54,8 @@ save_boot_params_ret:
* (OMAP4 spl TEXT_BASE is not 32 byte aligned.
* Continue to use ROM code vector only in OMAP4 spl)
*/
-#if !(defined(CONFIG_OMAP44XX) defined(CONFIG_SPL_BUILD))
+#if !(defined(CONFIG_OMAP44XX) defined(CONFIG_SPL_BUILD)) \
+ !defined(CONFIG_SPL_FEL)
Maybe we can just update the 'save_boot_params' function to save the
important configuration registers and then undo this configuration
in 'return_to_fel'? This allows us to avoid the sunxi specific ifdefs
in the core ARM code.
In this particular case, restoring VBAR and CPSR is important because
the BROM code uses an IRQ handler for FEL (presumably USB related).
And we want to ensure that this IRQ handler works properly again
after resuming the FEL code.
We could indeed.
It would avoid the #ifdef but my understanding is that you might be
able to avoid having to 'return' to the BROM through another means. In
any case we could perhaps leave that change until the next release?
I just previously thought that the FEL tool could store the return
address somewhere in beginning of SRAM in the eGON header extension.
In this case, restoring the 'lr' and 'sp' registers would be unnecessary
and the use of the 'save_boot_params' function could be dropped.
But if we still need to save/restore VBAR and the other control
registers, then this idea about not saving 'lr' and 'sp' does not
really improve anything.
[...]
u32 spl_boot_device(void)
{
+ /*
+ * Have we been asked to return to the FEL portion of the boot ROM?
+ * TODO: We need a more robust test here, or bracket this with
+ * #ifdef CONFIG_SPL_FEL.
+ */
+ if (fel_stash.lr = 0x fel_stash.lr 0x4000)
+ return BOOT_DEVICE_BOARD;
return BOOT_DEVICE_MMC1;
It is probably better to do it this way:
#ifdef CONFIG_SPL_FEL
return BOOT_DEVICE_BOARD;
#else
if (memcmp((void *)4, eGON.BT0, 8) == 0)
return BOOT_DEVICE_MMC1;
else
return BOOT_DEVICE_BOARD;
#endif
The memcmp (or equivalent code) ensures that it is compatible with
https://github.com/ssvb/sunxi-tools/commit/aa7e1880986e5c9a825b08aed9dc5621b821805f
Then the new 'fel spl u-boot-sunxi-with-spl.bin' command for loading
and executing the SPL works fine without CONFIG_SPL_FEL defined
(because the SD card specific eGON.BT0 signature is replaced with
the eGON.FEL signature by the 'fel' tool in the device memory
before transferring control to the SPL code). Needless to say that
the SPL built this way still works when written to the SD card.
And if CONFIG_SPL_FEL is defined, then the FEL support still works in a
legacy way (via 'fel write 0x2000 u-boot-spl.bin; fel exe 0x2000').
We would only need to drop the legacy way in u-boot v2015.07 if the
new one proves to be problem free by that time :-)
So you mean that we can drop CONFIG_SPL_FEL?
Yes, we can already do this. But in order to play safe, the
CONFIG_SPL_FEL option could be still kept for
Re: [U-Boot] [RFC PATCH v3 01/14] dm: core: Allow seq numbers to be resolved before probe
Hi Joe,
On 10 February 2015 at 18:30, Joe Hershberger joe.hershber...@ni.com wrote:
Before this patch, if the sequence numbers were resolved before probe,
this code would insist on defining new non-conflicting-with-itself seq
numbers. Now any non -1 seq number is accepted as already resolved.
Can you explain what problem this solves? At present, when probing a
device, -seq must be -1 (sort-of by definition since it doesn't exist
as an active device in the uclass).
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
Changes in v3:
-Add seq patch to dm core
Changes in v2: None
drivers/core/uclass.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 289a5d2..2d8b6f8 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -366,7 +366,9 @@ int uclass_resolve_seq(struct udevice *dev)
int seq;
int ret;
- assert(dev-seq == -1);
+ if (dev-seq != -1)
+ return dev-seq;
+
ret = uclass_find_device_by_seq(dev-uclass-uc_drv-id, dev-req_seq,
false, dup);
if (!ret) {
--
1.7.11.5
Regards,
Simon
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Re: [U-Boot] [RFC PATCH v3 02/14] test: dm: Reorder the objects to build
On 10 February 2015 at 18:30, Joe Hershberger joe.hershber...@ni.com wrote: Signed-off-by: Joe Hershberger joe.hershber...@ni.com --- Changes in v3: -Reorder dm test makefile Changes in v2: None test/dm/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH v3 10/14] test: dm: eth: Add tests for the eth dm implementation
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
Changes in v3:
-Added dm eth testing
Changes in v2: None
test/dm/Makefile | 1 +
test/dm/eth.c| 39 +++
test/dm/test.dts | 18 ++
3 files changed, 58 insertions(+)
create mode 100644 test/dm/eth.c
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 1d9148f..b2eb989 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_DM_TEST) += ut.o
obj-$(CONFIG_DM_TEST) += core.o
obj-$(CONFIG_DM_TEST) += ut.o
ifneq ($(CONFIG_SANDBOX),)
+obj-$(CONFIG_DM_ETH) += eth.o
obj-$(CONFIG_DM_GPIO) += gpio.o
obj-$(CONFIG_DM_I2C) += i2c.o
obj-$(CONFIG_DM_SPI_FLASH) += sf.o
diff --git a/test/dm/eth.c b/test/dm/eth.c
new file mode 100644
index 000..2b29fa2
--- /dev/null
+++ b/test/dm/eth.c
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2015 National Instruments
+ *
+ * (C) Copyright 2015
+ * Joe Hershberger joe.hershber...@ni.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include dm.h
+#include dm/test.h
+#include dm/ut.h
+#include fdtdec.h
+#include malloc.h
+#include net.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int dm_test_eth(struct dm_test_state *dms)
+{
+ NetPingIP = string_to_ip(1.1.2.2);
+
+ setenv(ethact, eth@10002000);
+ ut_assertok(NetLoop(PING));
+ ut_asserteq_str(eth@10002000, getenv(ethact));
+
+ setenv(ethact, eth@10003000);
+ ut_assertok(NetLoop(PING));
+ ut_asserteq_str(eth@10003000, getenv(ethact));
+
+ setenv(ethact, eth@10004000);
+ ut_assertok(NetLoop(PING));
+ ut_asserteq_str(eth@10004000, getenv(ethact));
+
+ return 0;
+}
+
+DM_TEST(dm_test_eth, DM_TESTF_SCAN_FDT);
diff --git a/test/dm/test.dts b/test/dm/test.dts
index 84024a4..2f68cdf 100644
--- a/test/dm/test.dts
+++ b/test/dm/test.dts
@@ -149,4 +149,22 @@
};
};
+ eth@10002000 {
+ compatible = sandbox,eth;
+ reg = 0x10002000 0x1000;
+ fake-host-hwaddr = 0x00 0x00 0x66 0x44 0x22 0x00;
+ };
+
+ eth@10003000 {
+ compatible = sandbox,eth;
+ reg = 0x10003000 0x1000;
+ fake-host-hwaddr = 0x00 0x00 0x66 0x44 0x22 0x11;
+ };
+
+ eth@10004000 {
+ compatible = sandbox,eth;
+ reg = 0x10004000 0x1000;
+ fake-host-hwaddr = 0x00 0x00 0x66 0x44 0x22 0x22;
+ };
+
};
--
1.7.11.5
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[U-Boot] [RFC PATCH v3 0/14] Add Driver Model support to network stack
For now this simply addresses the MAC part of the network hardware. The next part to implement is the PHY children. I wanted to get early feedback on what I have so far to make sure I'm going in the direction that Simon envisioned. I've now added unit tests to verify functionality. Added an additional patch that I've been playing with to allow actual networking from within sandbox, but I haven't come across a good way to make it build in the u-boot build system. Any good ideas are welcome. Changes in v3: -Add seq patch to dm core -Reorder dm test makefile -Move the get_dev_by_* protos to also be !DM_ETH like the impl -Correct the pre_unbind logic -Correct failure chaining from bind to probe to init --Fail init if not activated --Fail probe if ethaddr not set -Update ethaddr from env unconditionally on init -Use set current to select the current device regardless of the previous selection -Allow current eth dev to be NULL -Fixed blank line formatting for variable declaration -Added 2 more ethaddr to sandbox -Print which device in the debug write hwaddr -Prevent a crash if memory is not allocated -Added dm eth testing -Added support for aliases -Added support for ethprime -Added testing for netretry -Made the os raw packet support for sandbox eth build and work. Changes in v2: -Updated comments -Removed extra parentheses -Changed eth_uclass_priv local var names to be uc_priv -Update error codes -Cause an invalid name to fail binding -Rebase on top of dm/master -Stop maintaining our own index and use DM seq now that it works for our needs -Move the hwaddr to platdata so that its memory is allocated at bind when we need it -Prevent device from being probed before used by a command (i.e. before eth_init()). -Change printfs to debug in sandbox driver -Remove unused priv struct for sandbox driver -Change printfs to debug in sandbox driver -Move static data to priv -Move fake hwaddr to the device tree -Added the raw packet proof-of-concept patch. Joe Hershberger (14): dm: core: Allow seq numbers to be resolved before probe test: dm: Reorder the objects to build net: Provide a function to get the current MAC address net: Rename helper function to be more clear net: Remove unneeded extern in net.h net: Refactor in preparation for driver model dm: eth: Add basic driver model support to Ethernet stack dm: eth: Add network support to sandbox dm: eth: Add ARP and PING response to sandbox driver test: dm: eth: Add tests for the eth dm implementation dm: eth: Add support for aliases dm: eth: Add support for ethprime env var dm: eth: Add testing for netretry env var dm: eth: Add a bridge to a real network for sandbox arch/mips/cpu/mips32/au1x00/au1x00_eth.c | 2 +- arch/powerpc/cpu/mpc8260/ether_fcc.c | 2 +- arch/powerpc/cpu/mpc85xx/ether_fcc.c | 2 +- arch/powerpc/cpu/mpc8xx/scc.c | 2 +- arch/sandbox/dts/sandbox.dts | 11 + arch/sandbox/include/asm/sandbox-raw-os.h | 16 + common/board_r.c | 4 +- common/cmd_bdinfo.c | 2 + drivers/core/uclass.c | 4 +- drivers/net/Makefile | 12 + drivers/net/sandbox-raw-os.c | 105 +++ drivers/net/sandbox-raw.c | 128 drivers/net/sandbox.c | 187 include/configs/sandbox.h | 19 +- include/dm/uclass-id.h| 1 + include/fdtdec.h | 1 + include/net.h | 164 +++ lib/fdtdec.c | 1 + net/eth.c | 474 ++ net/net.c | 2 +- test/dm/Makefile | 5 +- test/dm/eth.c | 110 +++ test/dm/test.dts | 20 ++ 23 files changed, 1146 insertions(+), 128 deletions(-) create mode 100644 arch/sandbox/include/asm/sandbox-raw-os.h create mode 100644 drivers/net/sandbox-raw-os.c create mode 100644 drivers/net/sandbox-raw.c create mode 100644 drivers/net/sandbox.c create mode 100644 test/dm/eth.c -- 1.7.11.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH v3 05/14] net: Remove unneeded extern in net.h
Many of the functions in net.h were preceded extern needlessly. Removing
them to limit the number of checkpatch.pl complaints.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Reviewed-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
include/net.h | 96 +--
1 file changed, 48 insertions(+), 48 deletions(-)
diff --git a/include/net.h b/include/net.h
index a9579ee..ff8b7af 100644
--- a/include/net.h
+++ b/include/net.h
@@ -97,11 +97,11 @@ struct eth_device {
void *priv;
};
-extern int eth_initialize(bd_t *bis); /* Initialize network subsystem */
-extern int eth_register(struct eth_device* dev);/* Register network device */
-extern int eth_unregister(struct eth_device *dev);/* Remove network device */
-extern void eth_try_another(int first_restart);/* Change the device */
-extern void eth_set_current(void); /* set nterface to ethcur var */
+int eth_initialize(bd_t *bis); /* Initialize network subsystem */
+int eth_register(struct eth_device *dev);/* Register network device */
+int eth_unregister(struct eth_device *dev);/* Remove network device */
+void eth_try_another(int first_restart); /* Change the device */
+void eth_set_current(void);/* set nterface to ethcur var */
/* get the current device MAC */
extern struct eth_device *eth_current;
@@ -119,12 +119,12 @@ static inline unsigned char *eth_get_ethaddr(void)
return NULL;
}
-extern struct eth_device *eth_get_dev_by_name(const char *devname);
-extern struct eth_device *eth_get_dev_by_index(int index); /* get dev @ index
*/
-extern int eth_get_dev_index(void);/* get the device index */
-extern void eth_parse_enetaddr(const char *addr, uchar *enetaddr);
-extern int eth_getenv_enetaddr(char *name, uchar *enetaddr);
-extern int eth_setenv_enetaddr(char *name, const uchar *enetaddr);
+struct eth_device *eth_get_dev_by_name(const char *devname);
+struct eth_device *eth_get_dev_by_index(int index); /* get dev @ index */
+int eth_get_dev_index(void); /* get the device index */
+void eth_parse_enetaddr(const char *addr, uchar *enetaddr);
+int eth_getenv_enetaddr(char *name, uchar *enetaddr);
+int eth_setenv_enetaddr(char *name, const uchar *enetaddr);
/*
* Get the hardware address for an ethernet interface .
@@ -135,20 +135,20 @@ extern int eth_setenv_enetaddr(char *name, const uchar
*enetaddr);
* Returns:
* Return true if the address is valid.
*/
-extern int eth_getenv_enetaddr_by_index(const char *base_name, int index,
- uchar *enetaddr);
+int eth_getenv_enetaddr_by_index(const char *base_name, int index,
+uchar *enetaddr);
-extern int usb_eth_initialize(bd_t *bi);
-extern int eth_init(bd_t *bis);/* Initialize the
device */
-extern int eth_send(void *packet, int length);/* Send a packet */
+int usb_eth_initialize(bd_t *bi);
+int eth_init(bd_t *bis); /* Initialize the device */
+int eth_send(void *packet, int length); /* Send a packet */
#ifdef CONFIG_API
-extern int eth_receive(void *packet, int length); /* Receive a packet*/
-extern void (*push_packet)(void *packet, int length);
+int eth_receive(void *packet, int length); /* Receive a packet*/
+void (*push_packet)(void *packet, int length);
#endif
-extern int eth_rx(void); /* Check for received packets */
-extern void eth_halt(void);/* stop SCC */
-extern char *eth_get_name(void); /* get name of current device */
+int eth_rx(void); /* Check for received packets */
+void eth_halt(void); /* stop SCC */
+char *eth_get_name(void); /* get name of current device */
/* Set active state */
static inline __attribute__((always_inline)) int eth_init_state_only(bd_t *bis)
@@ -469,25 +469,25 @@ extern IPaddr_t Mcast_addr;
#endif
/* Initialize the network adapter */
-extern void net_init(void);
-extern int NetLoop(enum proto_t);
+void net_init(void);
+int NetLoop(enum proto_t);
/* Shutdown adapters and cleanup */
-extern voidNetStop(void);
+void NetStop(void);
/* Load failed. Start again. */
-extern voidNetStartAgain(void);
+void NetStartAgain(void);
/* Get size of the ethernet header when we send */
-extern int NetEthHdrSize(void);
+intNetEthHdrSize(void);
/* Set ethernet header; returns the size of the header */
-extern int NetSetEther(uchar *, uchar *, uint);
-extern int net_update_ether(struct ethernet_hdr *et, uchar *addr, uint prot);
+int NetSetEther(uchar *, uchar *, uint);
+int net_update_ether(struct ethernet_hdr *et, uchar *addr, uint prot);
/* Set IP header */
-extern void net_set_ip_header(uchar *pkt, IPaddr_t dest, IPaddr_t source);
-extern void net_set_udp_header(uchar *pkt, IPaddr_t dest, int dport,
+void
[U-Boot] [RFC PATCH v3 14/14] dm: eth: Add a bridge to a real network for sandbox
Implement a bridge between u-boot's network stack and Linux's raw packet
API allowing the sandbox to send and receive packets using the host
machine's network interface.
This raw Ethernet API requires elevated privileges. You can either run
as root, or you can add the capability needed like so:
sudo /sbin/setcap CAP_NET_RAW+ep u-boot
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
Changes in v3:
-Made the os raw packet support for sandbox eth build and work.
Changes in v2:
-Added the raw packet proof-of-concept patch.
arch/sandbox/dts/sandbox.dts | 6 ++
arch/sandbox/include/asm/sandbox-raw-os.h | 16
drivers/net/Makefile | 11 +++
drivers/net/sandbox-raw-os.c | 105
drivers/net/sandbox-raw.c | 128 ++
include/configs/sandbox.h | 1 +
6 files changed, 267 insertions(+)
create mode 100644 arch/sandbox/include/asm/sandbox-raw-os.h
create mode 100644 drivers/net/sandbox-raw-os.c
create mode 100644 drivers/net/sandbox-raw.c
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index ba635e8..13bd6c2 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -188,4 +188,10 @@
reg = 0x10002000 0x1000;
fake-host-hwaddr = 0x00 0x00 0x66 0x44 0x22 0x00;
};
+
+ eth@8000 {
+ compatible = sandbox,eth,raw;
+ reg = 0x8000 0x1000;
+ host-raw-interface = eth0;
+ };
};
diff --git a/arch/sandbox/include/asm/sandbox-raw-os.h
b/arch/sandbox/include/asm/sandbox-raw-os.h
new file mode 100644
index 000..4e5d418
--- /dev/null
+++ b/arch/sandbox/include/asm/sandbox-raw-os.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2015 National Instruments
+ *
+ * (C) Copyright 2015
+ * Joe Hershberger joe.hershber...@ni.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#pragma once
+
+int sandbox_raw_init(int *sd, void **devp, const char *ifname,
+unsigned char *ethmac);
+int sandbox_raw_send(void *packet, int length, int sd, void *device);
+int sandbox_raw_recv(void *packet, int *length, int sd, void *device);
+void sandbox_raw_halt(int *sd, void **devp);
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 15dc431..39975b3 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -51,6 +51,8 @@ obj-$(CONFIG_PCNET) += pcnet.o
obj-$(CONFIG_RTL8139) += rtl8139.o
obj-$(CONFIG_RTL8169) += rtl8169.o
obj-$(CONFIG_ETH_SANDBOX) += sandbox.o
+obj-$(CONFIG_ETH_SANDBOX_RAW) += sandbox-raw.o
+obj-$(CONFIG_ETH_SANDBOX_RAW) += sandbox-raw-os.o
obj-$(CONFIG_SH_ETHER) += sh_eth.o
obj-$(CONFIG_SMC9) += smc9.o
obj-$(CONFIG_SMC911X) += smc911x.o
@@ -68,3 +70,12 @@ obj-$(CONFIG_XILINX_LL_TEMAC) += xilinx_ll_temac.o
xilinx_ll_temac_mdio.o \
obj-$(CONFIG_ZYNQ_GEM) += zynq_gem.o
obj-$(CONFIG_FSL_MC_ENET) += fsl_mc/
obj-$(CONFIG_VSC9953) += vsc9953.o
+
+# sandbox-raw-os.c is built in the system env, so needs standard includes
+# CFLAGS_REMOVE_sandbox-raw-os.o cannot be used to drop header include path
+quiet_cmd_cc_sandbox-raw-os.o = CC $(quiet_modtag) $@
+cmd_cc_sandbox-raw-os.o = $(CC) $(filter-out -nostdinc, \
+ $(patsubst -I%,-idirafter%,$(c_flags))) -c -o $@ $
+
+$(obj)/sandbox-raw-os.o: $(src)/sandbox-raw-os.c FORCE
+ $(call if_changed_dep,cc_sandbox-raw-os.o)
diff --git a/drivers/net/sandbox-raw-os.c b/drivers/net/sandbox-raw-os.c
new file mode 100644
index 000..43fae60
--- /dev/null
+++ b/drivers/net/sandbox-raw-os.c
@@ -0,0 +1,105 @@
+/*
+ * Copyright (c) 2015 National Instruments
+ *
+ * (C) Copyright 2015
+ * Joe Hershberger joe.hershber...@ni.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include errno.h
+#include net/if.h
+#include netinet/in.h
+#include stdio.h
+#include stdlib.h
+#include string.h
+#include sys/types.h
+#include sys/ioctl.h
+#include sys/socket.h
+#include unistd.h
+
+#include linux/if_ether.h
+#include linux/if_packet.h
+
+int sandbox_raw_init(int *sd, void **devp, const char *ifname,
+unsigned char *ethmac)
+{
+ int tempsd = 0;
+ struct ifreq ifr;
+
+ strcpy(ifr.ifr_name, ifname);
+ ifr.ifr_addr.sa_family = AF_INET;
+ memset(ethmac, 0, 6);
+ tempsd = socket(AF_INET, SOCK_RAW, IPPROTO_RAW);
+ if (tempsd 0) {
+ printf(Failed to open socket: %d %s\n, errno,
+ strerror(errno));
+ return 1;
+ }
+ if (ioctl(tempsd, SIOCGIFHWADDR, ifr) 0) {
+ printf(Failed to call ioctl: %s\n, strerror(errno));
+ close(tempsd);
+ return 1;
+ }
+ /*
+* This only works if the MAC address is overridden with the actual MAC
+* address of the interface being used.
+*/
+ memcpy(ethmac, ifr.ifr_hwaddr.sa_data, 6 * sizeof(uint8_t));
+ close(tempsd);
+
+
[U-Boot] [RFC PATCH v3 04/14] net: Rename helper function to be more clear
Make it clear that the helper is checking the addr, not setting it.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Reviewed-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
net/eth.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/net/eth.c b/net/eth.c
index eac4f7b..65e8c77 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -153,11 +153,6 @@ static void eth_current_changed(void)
setenv(ethact, NULL);
}
-static int eth_address_set(unsigned char *addr)
-{
- return memcmp(addr, \0\0\0\0\0\0, 6);
-}
-
int eth_write_hwaddr(struct eth_device *dev, const char *base_name,
int eth_number)
{
@@ -166,9 +161,9 @@ int eth_write_hwaddr(struct eth_device *dev, const char
*base_name,
eth_getenv_enetaddr_by_index(base_name, eth_number, env_enetaddr);
- if (eth_address_set(env_enetaddr)) {
- if (eth_address_set(dev-enetaddr)
- memcmp(dev-enetaddr, env_enetaddr, 6)) {
+ if (!is_zero_ether_addr(env_enetaddr)) {
+ if (!is_zero_ether_addr(dev-enetaddr)
+ memcmp(dev-enetaddr, env_enetaddr, 6)) {
printf(\nWarning: %s MAC addresses don't match:\n,
dev-name);
printf(Address in SROM is %pM\n,
@@ -183,7 +178,7 @@ int eth_write_hwaddr(struct eth_device *dev, const char
*base_name,
dev-enetaddr);
printf(\nWarning: %s using MAC address from net device\n,
dev-name);
- } else if (!(eth_address_set(dev-enetaddr))) {
+ } else if (is_zero_ether_addr(dev-enetaddr)) {
printf(\nError: %s address not set.\n,
dev-name);
return -EINVAL;
--
1.7.11.5
___
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[U-Boot] [RFC PATCH v3 09/14] dm: eth: Add ARP and PING response to sandbox driver
The sandbox driver will now generate response traffic to exercise the
ping command even when no network exists. This allows the basic data
pathways of the DM to be tested.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Reviewed-by: Simon Glass s...@chromium.org
---
Changes in v3:
-Prevent a crash if memory is not allocated
Changes in v2:
-Change printfs to debug in sandbox driver
-Move static data to priv
-Move fake hwaddr to the device tree
arch/sandbox/dts/sandbox.dts | 1 +
drivers/net/sandbox.c| 101 +++
2 files changed, 102 insertions(+)
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index 502eb3d..ba635e8 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -186,5 +186,6 @@
eth@10002000 {
compatible = sandbox,eth;
reg = 0x10002000 0x1000;
+ fake-host-hwaddr = 0x00 0x00 0x66 0x44 0x22 0x00;
};
};
diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
index 2a2ad41..f9fa1a1 100644
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -15,22 +15,121 @@
DECLARE_GLOBAL_DATA_PTR;
+struct eth_sandbox_priv {
+ uchar fake_host_hwaddr[ARP_HLEN];
+ IPaddr_t fake_host_ipaddr;
+ uchar recv_packet_buffer[PKTSIZE];
+ int recv_packet_length;
+};
+
static int sb_eth_init(struct udevice *dev, bd_t *bis)
{
debug(eth_sandbox: Init\n);
+ struct eth_sandbox_priv *priv = dev-priv;
+ u32 int_array[ARP_HLEN];
+ int i;
+
+ if (!priv)
+ return -EINVAL;
+
+ fdtdec_get_int_array(gd-fdt_blob, dev-of_offset, fake-host-hwaddr,
+int_array, ARP_HLEN);
+ for (i = 0; i ARP_HLEN; i++)
+ priv-fake_host_hwaddr[i] = (uchar)int_array[i];
+
return 0;
}
static int sb_eth_send(struct udevice *dev, void *packet, int length)
{
debug(eth_sandbox: Send packet %d\n, length);
+ struct eth_sandbox_priv *priv = dev-priv;
+ struct ethernet_hdr *eth = packet;
+
+ if (ntohs(eth-et_protlen) == PROT_ARP) {
+ struct arp_hdr *arp = packet + ETHER_HDR_SIZE;
+ if (ntohs(arp-ar_op) == ARPOP_REQUEST) {
+ /* store this as the assumed IP of the fake host */
+ priv-fake_host_ipaddr = NetReadIP(arp-ar_tpa);
+ /* Formulate a fake response */
+ struct ethernet_hdr *eth_recv =
+ (void *)priv-recv_packet_buffer;
+ memcpy(eth_recv-et_dest, eth-et_src, ARP_HLEN);
+ memcpy(eth_recv-et_src, priv-fake_host_hwaddr,
+ ARP_HLEN);
+ eth_recv-et_protlen = htons(PROT_ARP);
+
+ struct arp_hdr *arp_recv =
+ (void *)priv-recv_packet_buffer +
+ ETHER_HDR_SIZE;
+ arp_recv-ar_hrd = htons(ARP_ETHER);
+ arp_recv-ar_pro = htons(PROT_IP);
+ arp_recv-ar_hln = ARP_HLEN;
+ arp_recv-ar_pln = ARP_PLEN;
+ arp_recv-ar_op = htons(ARPOP_REPLY);
+ memcpy(arp_recv-ar_sha, priv-fake_host_hwaddr,
+ ARP_HLEN);
+ NetWriteIP(arp_recv-ar_spa, priv-fake_host_ipaddr);
+ memcpy(arp_recv-ar_tha, arp-ar_sha, ARP_HLEN);
+ NetCopyIP(arp_recv-ar_tpa, arp-ar_spa);
+
+ priv-recv_packet_length = ETHER_HDR_SIZE +
+ ARP_HDR_SIZE;
+ }
+ } else if (ntohs(eth-et_protlen) == PROT_IP) {
+ struct ip_udp_hdr *ip = packet + ETHER_HDR_SIZE;
+ if (ip-ip_p == IPPROTO_ICMP) {
+ struct icmp_hdr *icmp = (struct icmp_hdr *)ip-udp_src;
+ if (icmp-type == ICMP_ECHO_REQUEST) {
+ /* reply to the ping */
+ memcpy(priv-recv_packet_buffer, packet,
+ length);
+ struct ethernet_hdr *eth_recv =
+ (void *)priv-recv_packet_buffer;
+ struct ip_udp_hdr *ipr =
+ (void *)priv-recv_packet_buffer +
+ ETHER_HDR_SIZE;
+ struct icmp_hdr *icmpr =
+ (struct icmp_hdr *)ipr-udp_src;
+ memcpy(eth_recv-et_dest, eth-et_src,
+ ARP_HLEN);
+ memcpy(eth_recv-et_src, priv-fake_host_hwaddr,
+ ARP_HLEN);
+ ipr-ip_sum = 0;
+
[U-Boot] [RFC PATCH v3 08/14] dm: eth: Add network support to sandbox
Add basic network support to sandbox which includes a network driver.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Reviewed-by: Simon Glass s...@chromium.org
---
Changes in v3:
-Added 2 more ethaddr to sandbox
-Print which device in the debug write hwaddr
Changes in v2:
-Change printfs to debug in sandbox driver
-Remove unused priv struct for sandbox driver
arch/sandbox/dts/sandbox.dts | 4 +++
drivers/net/Makefile | 1 +
drivers/net/sandbox.c| 86
include/configs/sandbox.h| 18 +++---
4 files changed, 104 insertions(+), 5 deletions(-)
create mode 100644 drivers/net/sandbox.c
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index 4c63e4f..502eb3d 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -183,4 +183,8 @@
};
};
+ eth@10002000 {
+ compatible = sandbox,eth;
+ reg = 0x10002000 0x1000;
+ };
};
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 46c4ac6..15dc431 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_NS8382X) += ns8382x.o
obj-$(CONFIG_PCNET) += pcnet.o
obj-$(CONFIG_RTL8139) += rtl8139.o
obj-$(CONFIG_RTL8169) += rtl8169.o
+obj-$(CONFIG_ETH_SANDBOX) += sandbox.o
obj-$(CONFIG_SH_ETHER) += sh_eth.o
obj-$(CONFIG_SMC9) += smc9.o
obj-$(CONFIG_SMC911X) += smc911x.o
diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
new file mode 100644
index 000..2a2ad41
--- /dev/null
+++ b/drivers/net/sandbox.c
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2015 National Instruments
+ *
+ * (C) Copyright 2015
+ * Joe Hershberger joe.hershber...@ni.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include dm.h
+#include fdtdec.h
+#include malloc.h
+#include net.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int sb_eth_init(struct udevice *dev, bd_t *bis)
+{
+ debug(eth_sandbox: Init\n);
+
+ return 0;
+}
+
+static int sb_eth_send(struct udevice *dev, void *packet, int length)
+{
+ debug(eth_sandbox: Send packet %d\n, length);
+
+ return 0;
+}
+
+static int sb_eth_recv(struct udevice *dev)
+{
+ return 0;
+}
+
+static void sb_eth_halt(struct udevice *dev)
+{
+ debug(eth_sandbox: Halt\n);
+}
+
+static int sb_eth_write_hwaddr(struct udevice *dev)
+{
+ struct eth_pdata *pdata = dev-platdata;
+ debug(eth_sandbox %s: Write HW ADDR - %pM\n, dev-name,
+ pdata-enetaddr);
+ return 0;
+}
+
+static const struct eth_ops sb_eth_ops = {
+ .init = sb_eth_init,
+ .send = sb_eth_send,
+ .recv = sb_eth_recv,
+ .halt = sb_eth_halt,
+ .write_hwaddr = sb_eth_write_hwaddr,
+};
+
+static int sb_eth_remove(struct udevice *dev)
+{
+ return 0;
+}
+
+#ifdef CONFIG_OF_CONTROL
+static int sb_eth_ofdata_to_platdata(struct udevice *dev)
+{
+ struct eth_pdata *pdata = dev-platdata;
+
+ pdata-iobase = fdtdec_get_addr(gd-fdt_blob, dev-of_offset, reg);
+ return 0;
+}
+
+static const struct udevice_id sb_eth_ids[] = {
+ { .compatible = sandbox,eth },
+ { }
+};
+#endif
+
+U_BOOT_DRIVER(eth_sandbox) = {
+ .name = eth_sandbox,
+ .id = UCLASS_ETH,
+ .of_match = of_match_ptr(sb_eth_ids),
+ .ofdata_to_platdata = of_match_ptr(sb_eth_ofdata_to_platdata),
+ .remove = sb_eth_remove,
+ .ops= sb_eth_ops,
+ .platdata_auto_alloc_size = sizeof(struct eth_pdata),
+};
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index e9d3f32..fdba1c8 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -139,9 +139,9 @@
/* include default commands */
#include config_cmd_default.h
-/* We don't have networking support yet */
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
+#define CONFIG_DM_ETH
+#define CONFIG_ETH_SANDBOX
+#define CONFIG_CMD_PING
#define CONFIG_CMD_HASH
#define CONFIG_HASH_VERIFY
@@ -184,12 +184,20 @@
#define CONFIG_EXTRA_ENV_SETTINGS stdin=serial,cros-ec-keyb\0 \
stdout=serial,lcd\0 \
- stderr=serial,lcd\0
+ stderr=serial,lcd\0 \
+ ethaddr=00:00:11:22:33:44\0 \
+ eth1addr=00:00:11:22:33:45\0 \
+ eth2addr=00:00:11:22:33:46\0 \
+ ipaddr=1.2.3.4\0
#else
#define CONFIG_EXTRA_ENV_SETTINGS stdin=serial\0 \
stdout=serial,lcd\0 \
- stderr=serial,lcd\0
+ stderr=serial,lcd\0 \
+ ethaddr=00:00:11:22:33:44\0 \
+
Re: [U-Boot] [PATCH] ARMv8: Bug fix of dcache_disable()
hi Mark, Thank you review this patch. -Original Messages- From: Mark Rutland mark.rutl...@arm.com Sent Time: 2015-02-09 19:05:54 (Monday) To: feng...@phytium.com.cn feng...@phytium.com.cn Cc: u-boot@lists.denx.de u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH] ARMv8: Bug fix of dcache_disable() On Mon, Feb 09, 2015 at 08:51:59AM +, feng...@phytium.com.cn wrote: From: David Feng feng...@phytium.com.cn The cache disable operation shoud be performed after flush_dcache_all(). If cache disable operation is performed before flush_dcache_all(), flush_dcache_all() store data directly to memory and may be overrided by data copy in cache. The reasoning above (and hence this patch) is wrong. While the caches are on, they can allocate lines for any portion of the address space with cacheable attributes, and can acquire dirty cache lines from other CPUs. Additionally, there is no restriction preventing lines from migrating between levels of cache while they are active. So calling flush_dcache_all (which performs maintenance by Set/Way) while the caches are enabled is wrong. Per the architecture it provides no guarantee whatsoever. To empty the caches by Set/Way, they must first be disabled. Note that this only guarantees that the caches are empty; not where the data went. Other CPUs might acquire dirty lines, or the data might only reach a system cache rather than memory. If you need certain portions of data to be flushed out to memory, then those must be flushed by VA. If flush_dcache_all performs any memory accesses before it has completed Set/Way maintenance, it is buggy. Thanks, Mark. You are right. If data acess exist when flushing cache when cache is enabled, the data may be brought to cache again. In normal circumstance we can not do like this. But the problem is flush_dcahe_all is a C routine, it will preserve return address in stack. If disable cache first the return address will be directly store in memory, and if the stack has a copy in cache the data will be covered when flushing cache, then flush_dcache_all will get wrong return address. There should be no data access between disabling cache and flushing cache. U-boot for aarch64 runs at only one processor and the data flush_dcache_all manipulated will not be used by following routines. By simply adjusting the sequence can fix this bug although it's not the best solution. Yours, David. Signed-off-by: David Feng feng...@phytium.com.cn --- arch/arm/cpu/armv8/cache_v8.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 9dbcdf2..dc2fc8c 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -124,9 +124,10 @@ void dcache_disable(void) if (!(sctlr CR_C)) return; + flush_dcache_all(); + set_sctlr(sctlr ~(CR_C|CR_M)); - flush_dcache_all(); __asm_invalidate_tlb_all(); } -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] sunxi: dram: Allow to configure vdd-dll voltage on sun[457]i
On Mon, 02 Feb 2015 14:13:18 +0100
Hans de Goede hdego...@redhat.com wrote:
Hi,
Thanks for the dram timing patches. Since they do not make any changes without
them being explictly enabled in Kconfig, I've queued up patches 1 2 into
u-boot-sunxi/next for merging upstream.
I would like to see this one handled slightly different though, see below.
I assume you're also preparing some defconfig patches to use the new settings
on boards where we know exactly which DRAM chips are used (e.g. cubieboard and
olinuxino boards) and thus what the proper timings are ?
In fact I'm working on providing a more feature complete update for
http://lists.denx.de/pipermail/u-boot/2015-January/202306.html
with integrated DRAM reliability tests and the ability to probe the
DRAM and CPU overclocking limits. Which should allow us to collect
some data from more real devices and make decisions about what kind
of configuration we want to have set for them by default.
Also a small wiki page explaining how to figure out the right timing based
on dram chip markings would be welcome.
On 31-01-15 23:27, Siarhei Siamashka wrote:
Higher vdd-dll voltage allows to use higher dram and mbus clock speeds.
The vdd-int/vdd-dll voltage is currently set to 1.25V by default, which
is much lower than 1.4V, allowed by datasheets (the exact maximum differs
for different SoCs).
There are different use cases. For a tablet, it may be preferable to
favor longer battery life and use lower dram clock speed voltage.
But for non-battery powered devices, especially the ones driving full-hd
monitors, memory performance may be a lot more important than the power
consumption.
A configurable vdd-dll voltage provides better flexibility.
Signed-off-by: Siarhei Siamashka siarhei.siamas...@gmail.com
---
arch/arm/include/asm/arch-sunxi/dram.h | 1 +
arch/arm/include/asm/arch-sunxi/dram_sun4i.h | 1 +
board/sunxi/Kconfig | 8
board/sunxi/board.c | 10 +-
board/sunxi/dram_sun4i_auto.c| 6 ++
board/sunxi/dram_sun5i_auto.c| 7 +++
6 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-sunxi/dram.h
b/arch/arm/include/asm/arch-sunxi/dram.h
index 7ff43e6..61ed77c 100644
--- a/arch/arm/include/asm/arch-sunxi/dram.h
+++ b/arch/arm/include/asm/arch-sunxi/dram.h
@@ -25,6 +25,7 @@
#endif
unsigned long sunxi_dram_init(void);
+u32 sunxi_dram_get_min_dll_volt(void);
/*
* Wait up to 1s for value to be set in given part of reg.
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun4i.h
b/arch/arm/include/asm/arch-sunxi/dram_sun4i.h
index 40c385a..32493cc 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sun4i.h
@@ -88,6 +88,7 @@ struct dram_para {
u32 emr3;
u32 dqs_gating_delay;
u32 active_windowing;
+ u32 min_dll_volt;
};
#define DRAM_CCR_COMMAND_RATE_1T (0x1 5)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 4a21589..3092edc 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -99,6 +99,14 @@ config DRAM_DQS_GATING_DELAY
is usually good enough, unless running at really high DRAM
clocks speeds (up to 600MHz). If unsure, keep as 0.
+config DRAM_MIN_DLL_VOLT
+ int sunxi dram odt_en value
+ default 1250
+ ---help---
+ Set the minimum VDD-DLL/VDD-INT voltage (mV), required for
+ reliable DRAM operation. On Allwinner A10/A13/A20 devices with
+ AXP209 PMIC it is provided from DCDC3.
+
choice
prompt sunxi dram timings
default DRAM_TIMINGS_VENDOR_MAGIC
Can you please split this patch in 2:
1) Add a CONFIG_AXP209_POWER, mirroring config AXP221_POWER
in drivers/power/Kconfig (put it at the top of the Kconfig file
please), and update all the sunxi defconfig-s which currently
set AXP209_POWER in CONFIG_SYS_EXTRA_OPTIONS to instead set
+S:CONFIG_AXP209_POWER=y in there defconfigs
2) Add a config AXP209_DCDC3_VOLT with a default of 1250
(copy paste from AXP221_DCDC1_VOLT) and then in
board/sunxi/board.c simply replace:
power_failed |= axp209_set_dcdc3(min_dll_volt);
with:
power_failed |= axp209_set_dcdc3(CONFIG_AXP209_DCDC3_VOLT);
This approach has 3 advantages:
1) it is consistent with what we're doing for the axp221
2) it cleans up a bit of our CONFIG_SYS_EXTRA_OPTIONS (ab)use
3) it avoids the IMHO unnecessary indirection you add with the
suggested sunxi_dram_get_min_dll_volt approach
The fundamental difference of your approach is that it focuses on
the voltage producer (the DCDC3 rail of the PMIC) instead of the
voltage consumer (the VDD-INT/VDD-DLL pins of the SoC). We even
already have a minor inconsistency on A10s, which has a different
PMIC and uses DCDC4 for powering VDD-INT/VDD-DLL instead of DCDC3
Re: [U-Boot] [RFC/PATCH] tools: New 'spl-stackusage' script
On Mon, 02 Feb 2015 14:15:33 +0100 Andreas Bießmann andreas.de...@googlemail.com wrote: Dear Siarhei Siamashka, Hi Andreas, Thanks for your feedback. On 02/01/2015 12:47 AM, Siarhei Siamashka wrote: This is a script, which tries to provide a pessimistic estimate of the stack usage in the SPL binary. A more detailed description about how it works and some example pictures are available in an earlier e-mail: http://lists.denx.de/pipermail/u-boot/2015-January/201713.html In fact, I have done nothing with it since that old status update and the code is still very much just at the proof of concept stage and can be only treated as a somewhat working prototype. It only supports 32-bit ARM so far. An example of trying it: 1. First compile u-boot for some ARM board. For example: make CROSS_COMPILE=arm-none-linux-gnueabi- Cubieboard_defconfig make CROSS_COMPILE=arm-none-linux-gnueabi- -j8 unfortunately out-of-tree build is not directly supported with this script. I mean some environment (CROSS_COMPILE) is re-used/required by the script but others not (O). It would be fine to just replace the make in cmdline with this tool to run it. I'm not so sure that replacing make is a very good idea because that's outside of the scope of this script. The script only needs the 'spl' directory with the SPL binary itself and also the *.su files generated by GCC. The CROSS_COMPILE environment variable is only used to find the arm variant of the objdump tool. This variable is even only used as a fallback method, because the script contains the list of possible arm toolchain triplets and probes them. In many cases it can be run even without the CROSS_COMPILE variable defined. 2. Run the script: tools/spl-stackusage/spl-stackusage 3. Look at the (slightly reformatted) output: Execution path with maximized stack usage (3152 bytes): entry _main board_init_f board_init_r spl_mmc_load_image mmc_init mmc_startup mmc_switch.isra.1 mmc_send_status printf puts console_puts ? mmc_bread mmc_set_blocklen mmc_send_cmd ? sunxi_mmc_getcd gpio_get_value axp_gpio_get_value axp209_read i2c_read ? twsi_i2c_read i2c_begin twsi_wait udelay __udelay The '' symbols indicate normal calls. The '?' symbols indicate a suspected indirect call. Now we can see that the 'console_puts ? mmc_bread' indirect call does not make any sense. So we can run the script again, now indicating that a call from 'console_puts' to 'mmc_bread' is impossible: 4. Run the script again as: tools/spl-stackusage/spl-stackusage \ remove_arrow[console_puts,mmc_bread] Unfortunately dynamic stack allocation is not considered. The use of dynamic stack size is at least detected and the script refuses to work. I wanted to get some feedback before deciding how to best handle it. So adding FAT to SPL will result in an empty list here. I only get 'dynamic stack size in get_cluster'. I think the most important thing is to always print out the summary and the caller stack, mark the dynamic parts of the stack and mention that there is some more required. Thanks for the suggestion. For now you can just find the relevant .su file and edit it fake some some arbitrary stack usage estimate there. Some interface to declare the maximum amount of dynamic stack usage for a specific symbol by command line would be really great. So one can guess the relevant parts and calculate the maximum size. Yes. Or alternatively it is perhaps possible to just fix the FAT code and use malloc instead of dynamic allocations on stack. The large buffers in .bss in the FAT code is already responsible for the .bss section placement in DRAM. And these dynamic allocations on stack are yet another wacky thing in this code. Another point ... I really appreciate your efforts to bring this tool in. So don't get me wrong, but ... why ruby? That's because I know ruby, but don't know python at the moment. Why I have picked ruby over python some years ago is another story. But I don't want to start a programming language holy war here :) A while ago some guys started to introduce python for some complex scripts, before that u-boot only had shell scripts. I personally think one interpreter in u-boot world is enough. I'm curious how others think about that. If python is a requirement, then I will have to learn it first. Which is fair enough. But this requirement first needs to be explicitly communicated by somebody. -- Best regards, Siarhei Siamashka ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/4] mx6: soc: Add ENET2 support
Hi Stefano,
On 2/10/2015 6:22 PM, Stefano Babic wrote:
Hi,
On 12/01/2015 09:46, Ye.Li wrote:
The mx6sx has two ENET controllers, some board like mx6sxsabreauto
uses the ENET2 for ethernet. So add ENET2 support to soc level,
including: ENET2 clock enable and MAC address fuse for ENET2.
Signed-off-by: Ye.Li b37...@freescale.com
---
arch/arm/cpu/armv7/mx6/clock.c |9 -
arch/arm/cpu/armv7/mx6/soc.c | 25 -
arch/arm/include/asm/arch-mx6/crm_regs.h |7 +++
3 files changed, 39 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 055f44e..fd57f22 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -498,7 +498,11 @@ int enable_fec_anatop_clock(enum enet_freq freq)
reg = readl(anatop-pll_enet);
reg = ~BM_ANADIG_PLL_ENET_DIV_SELECT;
-reg |= freq;
+reg |= BF_ANADIG_PLL_ENET_DIV_SELECT(freq);
+#ifdef CONFIG_MX6SX
+reg = ~BM_ANADIG_PLL_ENET2_DIV_SELECT;
+reg |= BF_ANADIG_PLL_ENET2_DIV_SELECT(freq);
+#endif
if ((reg BM_ANADIG_PLL_ENET_POWERDOWN) ||
(!(reg BM_ANADIG_PLL_ENET_LOCK))) {
@@ -514,6 +518,9 @@ int enable_fec_anatop_clock(enum enet_freq freq)
/* Enable FEC clock */
reg |= BM_ANADIG_PLL_ENET_ENABLE;
+#ifdef CONFIG_MX6SX
+reg |= BM_ANADIG_PLL_ENET2_ENABLE;
+#endif
reg = ~BM_ANADIG_PLL_ENET_BYPASS;
writel(reg, anatop-pll_enet);
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 5f5f497..4994eab 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -337,6 +337,29 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char
*mac)
struct fuse_bank4_regs *fuse =
(struct fuse_bank4_regs *)bank-fuse_regs;
+#ifdef CONFIG_MX6SX
+if (0 == dev_id) {
+u32 value = readl(fuse-mac_addr_high);
+mac[0] = (value 8);
+mac[1] = value ;
+
+value = readl(fuse-mac_addr_low);
+mac[2] = value 24 ;
^---
Checkpatch complains about extra spaces.
I will fix this problem.
+mac[3] = value 16 ;
+mac[4] = value 8 ;
+mac[5] = value ;
+} else {
+u32 value = readl(fuse-mac_addr2);
+mac[0] = value 24 ;
+mac[1] = value 16 ;
+mac[2] = value 8 ;
+mac[3] = value ;
+
+value = readl(fuse-mac_addr_high);
+mac[4] = value 24 ;
+mac[5] = value 16 ;
Is it desired that the layout is different between the two mac addresses
? As far as I know, MAC_ADDR in fuses is reserved to customers, and it
makes sense they have the same layout.
Is there some reason (that I do not know, obviously) to have them
different ?
I think the reason is to save one fuse. If the enet2 has same mac fuse layout
as enet1, obviously we have to use one more fuse than
current layout. Additional, the layout is determined by IC, software just
follows it.
+}
+#else
u32 value = readl(fuse-mac_addr_high);
mac[0] = (value 8);
mac[1] = value ;
@@ -346,7 +369,7 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char
*mac)
mac[3] = value 16 ;
mac[4] = value 8 ;
mac[5] = value ;
-
+#endif
}
#endif
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h
b/arch/arm/include/asm/arch-mx6/crm_regs.h
index 39f3c07..eec03cf 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -1012,6 +1012,13 @@ struct mxc_ccm_reg {
#define BM_ANADIG_PLL_ENET_DIV_SELECT 0x0003
#define BF_ANADIG_PLL_ENET_DIV_SELECT(v) \
(((v) 0) BM_ANADIG_PLL_ENET_DIV_SELECT)
+#ifdef CONFIG_MX6SX
+#define BM_ANADIG_PLL_ENET2_ENABLE 0x0010
+
+#define BM_ANADIG_PLL_ENET2_DIV_SELECT 0x000C
+#define BF_ANADIG_PLL_ENET2_DIV_SELECT(v) \
+(((v) 2) BM_ANADIG_PLL_ENET2_DIV_SELECT)
+#endif
#define BM_ANADIG_PFD_480_PFD3_CLKGATE 0x8000
#define BM_ANADIG_PFD_480_PFD3_STABLE 0x4000
Best regards,
Stefano Babic
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[U-Boot] [RFC PATCH v3 13/14] dm: eth: Add testing for netretry env var
Make sure that the retry behavior occurs as expected.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
Changes in v3:
-Added testing for netretry
Changes in v2: None
test/dm/eth.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/test/dm/eth.c b/test/dm/eth.c
index b39a94a..831a994 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -83,3 +83,28 @@ static int dm_test_eth_prime(struct dm_test_state *dms)
}
DM_TEST(dm_test_eth_prime, DM_TESTF_SCAN_FDT);
+
+static int dm_test_eth_retry(struct dm_test_state *dms)
+{
+ char ethaddr[18];
+
+ NetPingIP = string_to_ip(1.1.2.2);
+ strcpy(ethaddr, getenv(eth1addr));
+ setenv(ethact, eth@10004000);
+ setenv(eth1addr, NULL);
+ ut_assertok(NetLoop(PING));
+ ut_asserteq_str(eth@10002000, getenv(ethact));
+
+ setenv(ethact, eth@10004000);
+ setenv(netretry, no);
+ ut_asserteq(-1, NetLoop(PING));
+ ut_asserteq_str(eth@10004000, getenv(ethact));
+
+ /* Restore the env */
+ setenv(eth1addr, ethaddr);
+ setenv(netretry, NULL);
+
+ return 0;
+}
+
+DM_TEST(dm_test_eth_retry, DM_TESTF_SCAN_FDT);
--
1.7.11.5
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[U-Boot] [RFC PATCH v3 01/14] dm: core: Allow seq numbers to be resolved before probe
Before this patch, if the sequence numbers were resolved before probe,
this code would insist on defining new non-conflicting-with-itself seq
numbers. Now any non -1 seq number is accepted as already resolved.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
---
Changes in v3:
-Add seq patch to dm core
Changes in v2: None
drivers/core/uclass.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 289a5d2..2d8b6f8 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -366,7 +366,9 @@ int uclass_resolve_seq(struct udevice *dev)
int seq;
int ret;
- assert(dev-seq == -1);
+ if (dev-seq != -1)
+ return dev-seq;
+
ret = uclass_find_device_by_seq(dev-uclass-uc_drv-id, dev-req_seq,
false, dup);
if (!ret) {
--
1.7.11.5
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Re: [U-Boot] [PATCH 04/12] imx:mx6 update mxc_ccm_reg
Hi, Stefano
On 2/10/2015 7:03 PM, Stefano Babic wrote:
Hi Peng,
On 09/01/2015 09:59, Peng Fan wrote:
Add more register for structure mxc_ccm_reg.
Signed-off-by: Peng Fan peng@freescale.com
---
arch/arm/include/asm/arch-mx6/crm_regs.h | 87
1 file changed, 87 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h
b/arch/arm/include/asm/arch-mx6/crm_regs.h
index 39f3c07..55e1287 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -103,6 +103,93 @@ struct mxc_ccm_reg {
u32 analog_pfd_528_set;
u32 analog_pfd_528_clr;
u32 analog_pfd_528_tog;
+ u32 reg_1p1;/* 0x4110 */
+ u32 reg_1p1_set;/* 0x4114 */
Even if the offset can be sometimes quite useful, the best reference is
the manual. You see that other fields have no offset in comments, so
please remove them here.
Ok. I'll remove the offset here.
+ u32 reg_1p1_clr;/* 0x4118 */
+ u32 reg_1p1_tog;/* 0x411c */
+ u32 reg_3p0;/* 0x4120 */
+ u32 reg_3p0_set;/* 0x4124 */
+ u32 reg_3p0_clr;/* 0x4128 */
+ u32 reg_3p0_tog;/* 0x412c */
+ u32 reg_2p5;/* 0x4130 */
+ u32 reg_2p5_set;/* 0x4134 */
+ u32 reg_2p5_clr;/* 0x4138 */
+ u32 reg_2p5_tog;/* 0x413c */
+ u32 reg_core; /* 0x4140 */
+ u32 reg_core_set; /* 0x4144 */
+ u32 reg_core_clr; /* 0x4148 */
+ u32 reg_core_tog; /* 0x414c */
+ u32 ana_misc0; /* 0x4150 */
+ u32 ana_misc0_set; /* 0x4154 */
+ u32 ana_misc0_clr; /* 0x4158 */
+ u32 ana_misc0_tog; /* 0x415c */
+ u32 ana_misc1; /* 0x4160 */
+ u32 ana_misc1_set; /* 0x4164 */
+ u32 ana_misc1_clr; /* 0x4168 */
+ u32 ana_misc1_tog; /* 0x416c */
+ u32 ana_misc2; /* 0x4170 */
+ u32 ana_misc2_set; /* 0x4174 */
+ u32 ana_misc2_clr; /* 0x4178 */
+ u32 ana_misc2_tog; /* 0x417c */
+ u32 tempsense0; /* 0x4180 */
+ u32 tempsense0_set; /* 0x4184 */
+ u32 tempsense0_clr; /* 0x4188 */
+ u32 tempsense0_tog; /* 0x418c */
+ u32 tempsense1; /* 0x4190 */
+ u32 tempsense1_set; /* 0x4194 */
+ u32 tempsense1_clr; /* 0x4198 */
+ u32 tempsense1_tog; /* 0x419c */
+ u32 usb1_vbus_detect; /* 0x41a0 */
+ u32 usb1_vbus_detect_set; /* 0x41a4 */
+ u32 usb1_vbus_detect_clr; /* 0x41a8 */
+ u32 usb1_vbus_detect_tog; /* 0x41ac */
+ u32 usb1_chrg_detect; /* 0x41b0 */
+ u32 usb1_chrg_detect_set; /* 0x41b4 */
+ u32 usb1_chrg_detect_clr; /* 0x41b8 */
+ u32 usb1_chrg_detect_tog; /* 0x41bc */
+ u32 usb1_vbus_det_stat; /* 0x41c0 */
+ u32 usb1_vbus_det_stat_set; /* 0x41c4 */
+ u32 usb1_vbus_det_stat_clr; /* 0x41c8 */
+ u32 usb1_vbus_det_stat_tog; /* 0x41cc */
+ u32 usb1_chrg_det_stat; /* 0x41d0 */
+ u32 usb1_chrg_det_stat_set; /* 0x41d4 */
+ u32 usb1_chrg_det_stat_clr; /* 0x41d8 */
+ u32 usb1_chrg_det_stat_tog; /* 0x41dc */
+ u32 usb1_loopback; /* 0x41e0 */
+ u32 usb1_loopback_set; /* 0x41e4 */
+ u32 usb1_loopback_clr; /* 0x41e8 */
+ u32 usb1_loopback_tog; /* 0x41ec */
+ u32 usb1_misc; /* 0x41f0 */
+ u32 usb1_misc_set; /* 0x41f4 */
+ u32 usb1_misc_clr; /* 0x41f8 */
+ u32 usb1_misc_tog; /* 0x41fc */
+ u32 usb2_vbus_detect; /* 0x4200 */
+ u32 usb2_vbus_detect_set; /* 0x4204 */
+ u32 usb2_vbus_detect_clr; /* 0x4208 */
+ u32 usb2_vbus_detect_tog; /* 0x420c */
+ u32 usb2_chrg_detect; /* 0x4210 */
+ u32 usb2_chrg_detect_set; /* 0x4214 */
+ u32 usb2_chrg_detect_clr; /* 0x4218 */
+ u32
Re: [U-Boot] [PATCH sunxi-tools v2 0/2] Support unified u-boot SPL for SD cards and FEL mode
On Mon, 9 Feb 2015 15:14:51 -0700 Simon Glass s...@chromium.org wrote: Hi Siarhei, On 8 February 2015 at 19:37, Siarhei Siamashka siarhei.siamas...@gmail.com wrote: An updated variant of the older patch http://lists.denx.de/pipermail/u-boot/2015-February/204024.html These patches are not for the u-boot code (unless u-boot decides to cannibalize the 'fel' tool later) but still provide a glue layer between the Allwinner BROM code and the u-boot SPL code. And need to play nice with both of them. It's an interesting idea actually - I wonder what people think about putting these tools in the source tree. I suspect it could get a bit out of hand? But it would make it easier to keep things in sync, Yes, keeping it is sync with the mksunxiboot program would be easier in this case. But I searched a bit, and can see that sunxi-tools is already packaged in some linux distributions, for example: https://packages.debian.org/search?keywords=sunxi-tools Maybe it's better to keep the 'fel' tool in the 'sunxi-tools' package and just make sure that it gets reasonably well supported in linux distributions. In addition, there might be other bootloaders or bare metal users. I have found this very cool project, which relies on the FEL mode and allows to run code on the OpenRISC core in Allwinner A31: https://github.com/skristiansson/ar100-info What's particularly interesting is that it apparently had the DRAM controller support for A31 (sun6i) even before this was implemented in u-boot :) -- Best regards, Siarhei Siamashka ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/6] x86: spi: Add support for lynxpoint
Add Lynxpoint to the driver so that the Asus Chromebox can be supported. Signed-off-by: Simon Glass s...@chromium.org --- drivers/spi/ich.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index 194e882..9848e0b 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -185,7 +185,8 @@ static int get_ich_version(uint16_t device_id) device_id = PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX) || (device_id = PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN device_id = PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX) || - device_id == PCI_DEVICE_ID_INTEL_VALLEYVIEW_LPC) + device_id == PCI_DEVICE_ID_INTEL_VALLEYVIEW_LPC || + device_id == PCI_DEVICE_ID_INTEL_LYNXPOINT_LPC) return 9; return 0; -- 2.2.0.rc0.207.ga3a616c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 2/3] pmic:pfuze implement pmic_mode_init
Hi, Stefano On 1/30/2015 1:48 AM, Stefano Babic wrote: On 27/01/2015 03:14, Peng Fan wrote: This patch is to implement pmic_mode_init function, and add prototype in header file. This function is to set switching mode for pmic buck regulators to improve system efficiency. Mode: OFF: The regulator is switched off and the output voltage is discharged. PFM: In this mode, the regulator is always in PFM mode, which is useful at light loads for optimized efficiency. PWM: In this mode, the regulator is always in PWM mode operation regardless of load conditions. APS: In this mode, the regulator moves automatically between pulse skipping mode and PWM mode depending on load conditions. Signed-off-by: Peng Fan peng@freescale.com Acked-by: Przemyslaw Marczak p.marc...@samsung.com --- Applied to u-boot-imx, thanks ! I did not see this patch applied to u-boot-imx, I saw only patch 1/3 is applied. Do you miss this one? Best regards, Stefano Babic Regards, Peng. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 6/6] x86: Add support for panther (Asus Chromebox)
Support running U-Boot as a coreboot payload. Tested peripherals include:
- Video (HDMI and DisplayPort)
- SATA disk
- Gigabit Ethernet
- SPI flash
USB3 does not work. This may be a problem with the USB3 PCI driver or
something in the USB3 stack and has not been investigated So far this is
disabled. The SD card slot also does not work.
For video, coreboot will need to run the OPROM to set this up.
With this board, bare support (running without coreboot) is not available
as yet.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/Kconfig | 16 +
arch/x86/dts/Makefile | 1 +
arch/x86/dts/chromebox_panther.dts | 64 ++
board/google/chromebox_panther/Kconfig | 18 ++
configs/chromebox_panther_defconfig| 11 ++
include/configs/chromebox_panther.h| 17 +
6 files changed, 127 insertions(+)
create mode 100644 arch/x86/dts/chromebox_panther.dts
create mode 100644 board/google/chromebox_panther/Kconfig
create mode 100644 configs/chromebox_panther_defconfig
create mode 100644 include/configs/chromebox_panther.h
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index fef11f3..6c667ae 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -32,6 +32,20 @@ config TARGET_CHROMEBOOK_LINK
and it provides a 2560x1700 high resolution touch-enabled LCD
display.
+config TARGET_CHROMEBOX_PANTHER
+ bool Support Chromebox panther (not available)
+ select n
+ help
+ Note: At present this must be used with Coreboot. See README.x86
+ for instructions.
+
+ This is the Asus Chromebox CN60 released in 2014. It uses an Intel
+ Haswell Celeron 2955U Dual Core CPU with 2GB of SDRAM. It has a
+ Lynx Point platform controller hub, PCIe WiFi and Bluetooth. It also
+ includes a USB SD reader, four USB3 ports, display port and HDMI
+ video output and a 16GB SATA solid state drive. There is no Chrome
+ OS EC on this model.
+
config TARGET_CROWNBAY
bool Support Intel Crown Bay CRB
help
@@ -420,6 +434,8 @@ source board/coreboot/coreboot/Kconfig
source board/google/chromebook_link/Kconfig
+source board/google/chromebox_panther/Kconfig
+
source board/intel/crownbay/Kconfig
source board/intel/minnowmax/Kconfig
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
index 7a66133..431bbd8 100644
--- a/arch/x86/dts/Makefile
+++ b/arch/x86/dts/Makefile
@@ -1,4 +1,5 @@
dtb-y += chromebook_link.dtb \
+ chromebox_panther.dtb \
crownbay.dtb \
galileo.dtb \
minnowmax.dtb
diff --git a/arch/x86/dts/chromebox_panther.dts
b/arch/x86/dts/chromebox_panther.dts
new file mode 100644
index 000..01d43e4
--- /dev/null
+++ b/arch/x86/dts/chromebox_panther.dts
@@ -0,0 +1,64 @@
+/dts-v1/;
+
+/include/ skeleton.dtsi
+/include/ serial.dtsi
+
+/ {
+ model = Google Panther;
+ compatible = google,panther, intel,celeron-haswell;
+
+ aliases {
+ spi0 = /spi;
+ };
+
+ config {
+ silent-console = 0;
+ no-keyboard;
+ };
+
+ gpioa {
+ compatible = intel,ich6-gpio;
+ u-boot,dm-pre-reloc;
+ reg = 0 0x10;
+ bank-name = A;
+ };
+
+ gpiob {
+ compatible = intel,ich6-gpio;
+ u-boot,dm-pre-reloc;
+ reg = 0x30 0x10;
+ bank-name = B;
+ };
+
+ gpioc {
+ compatible = intel,ich6-gpio;
+ u-boot,dm-pre-reloc;
+ reg = 0x40 0x10;
+ bank-name = C;
+ };
+
+ chosen {
+ stdout-path = /serial;
+ };
+
+ spi {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = intel,ich-spi;
+ spi-flash@0 {
+ #size-cells = 1;
+ #address-cells = 1;
+ reg = 0;
+ compatible = winbond,w25q64, spi-flash;
+ memory-map = 0xff80 0x0080;
+ rw-mrc-cache {
+ label = rw-mrc-cache;
+ /* Alignment: 4k (for updating) */
+ reg = 0x003e 0x0001;
+ type = wiped;
+ wipe-value = [ff];
+ };
+ };
+ };
+
+};
diff --git a/board/google/chromebox_panther/Kconfig
b/board/google/chromebox_panther/Kconfig
new file mode 100644
index 000..788b122
--- /dev/null
+++ b/board/google/chromebox_panther/Kconfig
@@ -0,0 +1,18 @@
+if TARGET_CHROMEBOX_PANTHER
+
+config SYS_BOARD
+ default chromebox_panther
+
+config SYS_VENDOR
+ default google
+
+config SYS_SOC
+ default haswell
+
+config SYS_CONFIG_NAME
+ default chromebox_panther
+
[U-Boot] [PATCH 1/6] x86: Support machines with 4GB of RAM
Some systems have more than 4GB of RAM. U-Boot can only place things below
4GB so any memory above that should not be used. Ignore any such memory so
that the memory size will not exceed the maximum.
This prevents gd-ram_size exceeding 4GB which causes problems for PCI
devices which use DMA.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/coreboot/sdram.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c
index e98a230..9c3ab81 100644
--- a/arch/x86/cpu/coreboot/sdram.c
+++ b/arch/x86/cpu/coreboot/sdram.c
@@ -90,7 +90,8 @@ int dram_init(void)
struct memrange *memrange = lib_sysinfo.memrange[i];
unsigned long long end = memrange-base + memrange-size;
- if (memrange-type == CB_MEM_RAM end ram_size)
+ if (memrange-type == CB_MEM_RAM end ram_size
+ memrange-base (1ULL 32))
ram_size = end;
}
gd-ram_size = ram_size;
@@ -108,7 +109,8 @@ void dram_init_banksize(void)
for (i = 0, j = 0; i lib_sysinfo.n_memranges; i++) {
struct memrange *memrange = lib_sysinfo.memrange[i];
- if (memrange-type == CB_MEM_RAM) {
+ if (memrange-type == CB_MEM_RAM
+ memrange-base (1ULL 32)) {
gd-bd-bi_dram[j].start = memrange-base;
gd-bd-bi_dram[j].size = memrange-size;
j++;
--
2.2.0.rc0.207.ga3a616c
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Re: [U-Boot] [PATCH sunxi-tools v2 0/2] Support unified u-boot SPL for SD cards and FEL mode
On Tue, 10 Feb 2015 09:21:59 +0100 Hans de Goede hdego...@redhat.com wrote: Hi, On 09-02-15 03:37, Siarhei Siamashka wrote: An updated variant of the older patch http://lists.denx.de/pipermail/u-boot/2015-February/204024.html These patches are not for the u-boot code (unless u-boot decides to cannibalize the 'fel' tool later) but still provide a glue layerHi, between the Allwinner BROM code and the u-boot SPL code. And need to play nice with both of them. The updated 'fel' tool is supposed to be used together with u-boot v2015.04 and provide support for booting regular u-boot SPL binaries over USB via FEL mode. So that a special u-boot sunxi FEL configuration can be eventually dropped in the future. The usage instructions are in the 'New method of booting u-boot over USB (u-boot v2015.04 and later versions)' section of the linux-sunxi wiki page http://linux-sunxi.org/index.php?title=FEL/USBBootoldid=12979 It temporarily moves the BROM data from the first 32 KiB of SRAM into a different SRAM section before calling the SPL code. And then moves it back before returning from the SPL back to the FEL code in BROM. This provides a contiguous 32 KiB block in the beginning of SRAM for use by the SPL. And in the case if an extra SRAM section is not available, we can at least defragmemnt the free memory areas and still provide a contiguous ~21 KiB block to the SPL in the beginning of SRAM. This code is also available in the following branch: https://github.com/ssvb/sunxi-tools/commits/20150206-fel-large-spl-support Siarhei Siamashka (2): fel: Split 'aw_fel_get_version' into 'get' and 'print' variants fel: New command for loading U-Boot SPL binaries in eGON format fel-to-spl-thunk.S | 172 +++ fel-to-spl-thunk.h | 69 + fel.c | 291 + 3 files changed, 510 insertions(+), 22 deletions(-) create mode 100644 fel-to-spl-thunk.S create mode 100644 fel-to-spl-thunk.h Thanks for your work on this, ACK to both patches, feel free to push them. Thanks, pushed to sunxi-tool One question, the new wiki instructions say that for the latest upstream u-boot _felconfig is no longer necessary, but Simon's patches to fix FEL support upstream contain some #ifdef FEL in start.S to skip some lowlevel init when in FEL mode, does that mean that skipping this is no longer necessary ? Skipping is not necessary if we save/restore some additional registers instead. I'm just applying extra changes on top of Simon's patches, and it works (the wiki page links to the git branch with these changes). This is discussed at http://lists.denx.de/pipermail/u-boot/2015-February/204361.html -- Best regards, Siarhei Siamashka ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] rpi: add support for Raspberry Pi 2 model B
On 02/09/2015 11:56 PM, Stephen Warren wrote: The get board rev firmware API doesn't seem to return a useful value on this platform, so we hard-code the board ID for now, since there's only one bcm2836-based RPi board at present. USB doesn't seem to work yet; the controller detects the on-board Hub/ Ethernet device but can't read the descriptors from it. I haven't investigated yet. HDMI is untested. HDMI is now tested, and works fine. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Mainline U-Boot for MinnowBoard MAX
Hi, Just a note to say that support for the MinnowBoard MAX has now landed in U-Boot mainline (also Intel Quark support as it happens). You can run it both 'bare metal' and as a coreboot payload. The upcoming 2015.04 release will include this support but for now you can get it from the U-Boot git tree. You can find a basic README here [1]. There is still work to do so if anyone is interested, please contribute patches! Thanks to those on the MinnowBoard list who helped with setting up a suitable working environment. Regards, Simon [1] http://git.denx.de/?p=u-boot.git;a=blob;f=doc/README.x86 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] mx6: clock: Modify GPMI clock to support mx6sx
Hi Stefano,
On 2/10/2015 6:26 PM, Stefano Babic wrote:
Hi Ye,
On 12/01/2015 09:46, Ye.Li wrote:
On mx6sx, the CCM register bits for GPMI are different as other
mx6 platforms. Modify the GPMI clock function to support mx6sx.
Signed-off-by: Ye.Li b37...@freescale.com
---
arch/arm/cpu/armv7/mx6/clock.c | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index fd57f22..ce7f0f7 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -47,6 +47,17 @@ void setup_gpmi_io_clk(u32 cfg)
MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK |
MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK);
+#if defined(CONFIG_MX6SX)
+clrbits_le32(imx_ccm-CCGR4, MXC_CCM_CCGR4_QSPI2_ENFC_MASK);
+
+clrsetbits_le32(imx_ccm-cs2cdr,
+MXC_CCM_CS2CDR_QSPI2_CLK_PODF_MASK |
+MXC_CCM_CS2CDR_QSPI2_CLK_PRED_MASK |
+MXC_CCM_CS2CDR_QSPI2_CLK_SEL_MASK,
+cfg);
+
+setbits_le32(imx_ccm-CCGR4, MXC_CCM_CCGR4_QSPI2_ENFC_MASK);
+#els
If I have well understood, this code is protected by CONFIG_NAND_MXS,
and that conflicts with what you are willing to do (setting clocks for
QSPI). I suggest to split setup_gpmi_io_clk() function, that at the
moment is ony for NAND, having something like:
void setup_gpmi_io_clk()
{
#ifdef CONFIG_NAND_MXS
...setup nand
#endif
...setup qspi
}
Best regards,
Stefano Babic
I feel you misunderstand the patch. On i.MX6sx, the QSPI2 and GPMI shares the
same clock root of QSPI2. So you can see the register bits are
named with MXC_CCM_CS2CDR_QSPI2_xxx. Actually, not only the name, there is a
little different in the CS2CDR register bits layout. The patch is used to fix
the gap.
Also the the GPMI pins are multiplexed with QSPI2 pins, so either NAND or QSPI2
can work, there is no conflict.
Best regards,
Ye Li
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Re: [U-Boot] [PATCH v2 3/3] sunxi: Normalise FEL support
Hi Siarhei,
On 10 February 2015 at 20:05, Siarhei Siamashka
siarhei.siamas...@gmail.com wrote:
On Mon, 9 Feb 2015 15:23:17 -0700
Simon Glass s...@chromium.org wrote:
Hi Siarhei,
On 7 February 2015 at 20:48, Siarhei Siamashka
siarhei.siamas...@gmail.com wrote:
On Sat, 7 Feb 2015 10:47:30 -0700
Simon Glass s...@chromium.org wrote:
Make sunxi's FEL code fit with the normal U-Boot boot sequence instead of
creating its own. There are some #ifdefs required in start.S. Future work
will hopefully remove these.
This series is available at u-boot-dm, branch sunxi-working.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Adjust for new save_boot_params() API
- Drop patch to change r0 to r2 in start.S
- Add #ifdefs to start.S to deal with FEL
- Use 'Fast Early Loader' as the full name for FEL
Thanks for working on these patches. It looks like we are finally
getting really close to resolving the sunxi FEL boot problem.
Some comments are below.
arch/arm/cpu/armv7/start.S | 5 +-
arch/arm/cpu/armv7/sunxi/Makefile | 4 +-
arch/arm/cpu/armv7/sunxi/board.c| 21
arch/arm/cpu/armv7/sunxi/config.mk | 2 -
arch/arm/cpu/armv7/sunxi/fel_utils.S| 25 +
arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds | 82
-
arch/arm/include/asm/arch-sunxi/sys_proto.h | 10
board/sunxi/Kconfig | 10
include/configs/sunxi-common.h | 6 +--
scripts/Makefile.spl| 2 -
10 files changed, 73 insertions(+), 94 deletions(-)
create mode 100644 arch/arm/cpu/armv7/sunxi/fel_utils.S
delete mode 100644 arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 9b49ece..098a83a 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -54,7 +54,8 @@ save_boot_params_ret:
* (OMAP4 spl TEXT_BASE is not 32 byte aligned.
* Continue to use ROM code vector only in OMAP4 spl)
*/
-#if !(defined(CONFIG_OMAP44XX) defined(CONFIG_SPL_BUILD))
+#if !(defined(CONFIG_OMAP44XX) defined(CONFIG_SPL_BUILD)) \
+ !defined(CONFIG_SPL_FEL)
Maybe we can just update the 'save_boot_params' function to save the
important configuration registers and then undo this configuration
in 'return_to_fel'? This allows us to avoid the sunxi specific ifdefs
in the core ARM code.
In this particular case, restoring VBAR and CPSR is important because
the BROM code uses an IRQ handler for FEL (presumably USB related).
And we want to ensure that this IRQ handler works properly again
after resuming the FEL code.
We could indeed.
It would avoid the #ifdef but my understanding is that you might be
able to avoid having to 'return' to the BROM through another means. In
any case we could perhaps leave that change until the next release?
I just previously thought that the FEL tool could store the return
address somewhere in beginning of SRAM in the eGON header extension.
In this case, restoring the 'lr' and 'sp' registers would be unnecessary
and the use of the 'save_boot_params' function could be dropped.
But if we still need to save/restore VBAR and the other control
registers, then this idea about not saving 'lr' and 'sp' does not
really improve anything.
OK I see see.
[...]
u32 spl_boot_device(void)
{
+ /*
+ * Have we been asked to return to the FEL portion of the boot ROM?
+ * TODO: We need a more robust test here, or bracket this with
+ * #ifdef CONFIG_SPL_FEL.
+ */
+ if (fel_stash.lr = 0x fel_stash.lr 0x4000)
+ return BOOT_DEVICE_BOARD;
return BOOT_DEVICE_MMC1;
It is probably better to do it this way:
#ifdef CONFIG_SPL_FEL
return BOOT_DEVICE_BOARD;
#else
if (memcmp((void *)4, eGON.BT0, 8) == 0)
return BOOT_DEVICE_MMC1;
else
return BOOT_DEVICE_BOARD;
#endif
The memcmp (or equivalent code) ensures that it is compatible with
https://github.com/ssvb/sunxi-tools/commit/aa7e1880986e5c9a825b08aed9dc5621b821805f
Then the new 'fel spl u-boot-sunxi-with-spl.bin' command for loading
and executing the SPL works fine without CONFIG_SPL_FEL defined
(because the SD card specific eGON.BT0 signature is replaced with
the eGON.FEL signature by the 'fel' tool in the device memory
before transferring control to the SPL code). Needless to say that
the SPL built this way still works when written to the SD card.
And if CONFIG_SPL_FEL is defined, then the FEL support still works in a
legacy way (via 'fel write 0x2000 u-boot-spl.bin; fel exe 0x2000').
We would only need to drop the legacy way in u-boot v2015.07 if the
new one proves to be problem free by that time :-)
So you mean that we can drop
Re: [U-Boot] [PATCH 2/3] bcm2836 SoC support (used in Raspberry Pi 2 model B)
On 02/10/2015 01:14 AM, Masahiro Yamada wrote: Hi Tom, On Mon, 9 Feb 2015 23:56:45 -0700 Stephen Warren swar...@wwwdotorg.org wrote: The bcm2835 and bcm2836 are essentially identical, except: - The CPU is an ARM1176 v.s. a quad-core Cortex-A7. - The physical address of many IO controllers has moved. Rather than introducing a whole new bcm2836 value for $(SOC) or $(ARCH), update the existing bcm2835 code to handle the minor differences, and plumb it into the ARMv7 CPU architecture. [ snip ] diff --git a/arch/arm/cpu/armv7/bcm2835/Makefile b/arch/arm/cpu/armv7/bcm2835/Makefile new file mode 100644 index ..ed1ee4753d49 --- /dev/null +++ b/arch/arm/cpu/armv7/bcm2835/Makefile @@ -0,0 +1,13 @@ +# +# (C) Copyright 2012 Stephen Warren +# +# SPDX-License-Identifier: GPL-2.0+ +# + +src_dir := ../../arm1176/bcm2835/ + +obj-y := +obj-y += $(src_dir)/init.o +obj-y += $(src_dir)/reset.o +obj-y += $(src_dir)/timer.o +obj-y += $(src_dir)/mbox.o Tom, Here is another proof that the arch/$(ARCH)/cpu/$(CPU)/$(SOC) structure is wrong. BCM2836 crib most of the source files from BCM2835 but they must be placed separetely because of the difference of the main processor. Could you tell me your impression about my RFC series? (Anyway, it is already out-dated. I can rebase if you like.) FWIW, I did wonder about basing my patches on top of your directory re-org. However, since it was (IIRC) an RFC, I shied away from that for now. Of course, we can merge arch/arm/cpu/arm1176/bcm2835 and arch/arm/cpu/armv7/bcm2836 into arch/arm/mach-bcm lator. mach-bcm2835 or mach-bcm283x would likely be better than mach-bcm, since there are various other lines of Broadcom SoCs (some already supported in U-Boot), and I have no particular reason to believe they share design with the bcm2835/6. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] imx: don't clobber reset cause
Hi Stefano, On 02/05/2015 11:49 AM, Stefano Babic wrote: Hi Eric, On 05/02/2015 19:22, Eric Nelson wrote: Certainly, but it seems wrong to make a decision about where and how this might get passed to an O/S in code. If we want to generalize it, I'd be inclined to add commands to query (into a variable) and clear the reset cause. That would still require this patch though. I do not think there should be a command. The cause must be directly associated to the variable, and the reset cause cleared. I posted a couple of additional options and received no comment from you. Neither of them works as-is because of the ordering of events (print_cpuinfo() is called before restoring the environment), so your suggestion would require an additional call at startup which currently doesn't exist across i.MX boards. The primary argument against the original patch was that bits **could** accumulate. In practice, I believe this to be a bit of a red herring, since two bits cover essentially all of the normal conditions: bit 0 - power on bit 4 - watchdog The watchdog flag is set with reboot under Linux and reset in U-Boot, so we could re-work the switch statement to do the right thing. In fact, it appears broken now because it has 0x11 displaying POR, when I believe that should be WDOG. Other bits could conceivably accumulate, but I don't see the value of worrying about cases like JTAG_RESET. The reason we're pursuing this at all is because we'd like to know the difference between a restart caused by power interruption and a system lockup, and we'd like to do this under Linux or Windows Embedded. Without a patch, things are pretty much broken unless we're screen-scraping. Please advise, Eric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/19] powerpc: Introduce device tree control and driver model
Hi, On 7 February 2015 at 11:53, Simon Glass s...@chromium.org wrote: Hi, On 7 February 2015 at 11:51, Simon Glass s...@chromium.org wrote: This series does a small amount of tweaking to support device tree control (CONFIG_OF_CONTROL) on PowerPC platforms. It also adds support for driver model. In both cases the main effort is to set things up correctly before calling board_init_f(). A new generic function, board_init_f_mem() is introduced. This does the various memory calculations in C code, since they are messy in assembler and every architecture should in fact be the same. A later series will adjust ARM and x86 to use this function. As an example, the Canyonlands boards are converted over to use device tree control and driver model for their serial console. It should be fairly straightforward to convert over other boards. Changes in v2: - Reduce reserved stack space for board_init_f_mem() to 64 bytes - Add SYS_MALLOC_F to Kconfig I'm trying to catch up on a few things I haven't got to. If it suits I can apply this to u-boot-dm since it is a driver-model-enablement series and Stefan has tested it. OK unless I hear any screams I'm going ahead with that plan this week. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] bcm2836 SoC support (used in Raspberry Pi 2 model B)
Hi Tom, On Mon, 9 Feb 2015 23:56:45 -0700 Stephen Warren swar...@wwwdotorg.org wrote: The bcm2835 and bcm2836 are essentially identical, except: - The CPU is an ARM1176 v.s. a quad-core Cortex-A7. - The physical address of many IO controllers has moved. Rather than introducing a whole new bcm2836 value for $(SOC) or $(ARCH), update the existing bcm2835 code to handle the minor differences, and plumb it into the ARMv7 CPU architecture. [ snip ] diff --git a/arch/arm/cpu/armv7/bcm2835/Makefile b/arch/arm/cpu/armv7/bcm2835/Makefile new file mode 100644 index ..ed1ee4753d49 --- /dev/null +++ b/arch/arm/cpu/armv7/bcm2835/Makefile @@ -0,0 +1,13 @@ +# +# (C) Copyright 2012 Stephen Warren +# +# SPDX-License-Identifier: GPL-2.0+ +# + +src_dir := ../../arm1176/bcm2835/ + +obj-y:= +obj-y+= $(src_dir)/init.o +obj-y+= $(src_dir)/reset.o +obj-y+= $(src_dir)/timer.o +obj-y+= $(src_dir)/mbox.o Tom, Here is another proof that the arch/$(ARCH)/cpu/$(CPU)/$(SOC) structure is wrong. BCM2836 crib most of the source files from BCM2835 but they must be placed separetely because of the difference of the main processor. Could you tell me your impression about my RFC series? (Anyway, it is already out-dated. I can rebase if you like.) Of course, we can merge arch/arm/cpu/arm1176/bcm2835 and arch/arm/cpu/armv7/bcm2836 into arch/arm/mach-bcm lator. What I can tell now is: more we wait, more work we will have to do. Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 1/1] usb: gadget: fastboot: Add fastboot erase
Adds the fastboot erase functionality, to erase a partition
specified by name. The erase is performed based on erase group size,
to avoid erasing other partitions. The start address and the size
is aligned to the erase group size for this.
Currently only supports erasing from eMMC.
Signed-off-by: Dileep Katta dileep.ka...@linaro.org
---
Note: The changes are on top of oem command support added by r...@kernel.org
common/fb_mmc.c | 58 +
drivers/usb/gadget/f_fastboot.c | 23
include/fb_mmc.h| 1 +
3 files changed, 82 insertions(+)
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 6ea3938..3911989 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -10,6 +10,7 @@
#include part.h
#include aboot.h
#include sparse_format.h
+#include mmc.h
#ifndef CONFIG_FASTBOOT_GPT_NAME
#define CONFIG_FASTBOOT_GPT_NAME GPT_ENTRY_NAME
@@ -110,3 +111,60 @@ void fb_mmc_flash_write(const char *cmd, void
*download_buffer,
write_raw_image(dev_desc, info, cmd, download_buffer,
download_bytes);
}
+
+void fb_mmc_erase(const char *cmd, char *response)
+{
+ int ret;
+ block_dev_desc_t *dev_desc;
+ disk_partition_t info;
+ lbaint_t blks, blks_start, blks_size, grp_size;
+ struct mmc *mmc = find_mmc_device(CONFIG_FASTBOOT_FLASH_MMC_DEV);
+
+ if (mmc == NULL) {
+ error(invalid mmc device\n);
+ fastboot_fail(invalid mmc device);
+ return;
+ }
+
+ /* initialize the response buffer */
+ response_str = response;
+
+ dev_desc = get_dev(mmc, CONFIG_FASTBOOT_FLASH_MMC_DEV);
+ if (!dev_desc || dev_desc-type == DEV_TYPE_UNKNOWN) {
+ error(invalid mmc device\n);
+ fastboot_fail(invalid mmc device);
+ return;
+ }
+
+ ret = get_partition_info_efi_by_name(dev_desc, cmd, info);
+ if (ret) {
+ error(cannot find partition: '%s'\n, cmd);
+ fastboot_fail(cannot find partition);
+ return;
+ }
+
+ puts(Erasing partition\n);
+
+ /* Align blocks to erase group size to avoid erasing other partitions */
+ grp_size = mmc-erase_grp_size;
+ blks_start = (info.start + grp_size - 1) ~(grp_size - 1);
+ if (info.size = grp_size)
+ blks_size = (info.size - (blks_start - info.start))
+ (~(grp_size - 1));
+ else
+ blks_size = 0;
+
+ printf(Erasing blocks LBAFU to LBAFU due to alignment\n,
+ blks_start, blks_start + blks_size);
+
+ blks = dev_desc-block_erase(dev_desc-dev, blks_start, blks_size);
+ if (blks != blks_size) {
+ error(failed erasing from device %d\n, dev_desc-dev);
+ fastboot_fail(failed erasing from device);
+ return;
+ }
+
+ printf( erased LBAFU bytes from '%s'\n,
+ blks_size * info.blksz, cmd);
+ fastboot_okay();
+}
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index f7d84bf..a8d8205 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -535,6 +535,26 @@ static void cb_oem(struct usb_ep *ep, struct usb_request
*req)
}
}
+static void cb_erase(struct usb_ep *ep, struct usb_request *req)
+{
+ char *cmd = req-buf;
+ char response[RESPONSE_LEN];
+
+ strsep(cmd, :);
+ if (!cmd) {
+ error(missing partition name\n);
+ fastboot_tx_write_str(FAILmissing partition name);
+ return;
+ }
+
+ strcpy(response, FAILno flash device defined);
+
+#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
+ fb_mmc_erase(cmd, response);
+#endif
+ fastboot_tx_write_str(response);
+}
+
struct cmd_dispatch_info {
char *cmd;
void (*cb)(struct usb_ep *ep, struct usb_request *req);
@@ -566,6 +586,9 @@ static const struct cmd_dispatch_info cmd_dispatch_info[] =
{
{
.cmd = oem,
.cb = cb_oem,
+ }, {
+ .cmd = erase,
+ .cb = cb_erase,
},
};
diff --git a/include/fb_mmc.h b/include/fb_mmc.h
index 1ad1d13..402ba9b 100644
--- a/include/fb_mmc.h
+++ b/include/fb_mmc.h
@@ -6,3 +6,4 @@
void fb_mmc_flash_write(const char *cmd, void *download_buffer,
unsigned int download_bytes, char *response);
+void fb_mmc_erase(const char *cmd, char *response);
--
1.8.3.2
___
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Re: [U-Boot] [PATCH 17/17] sunxi: Hookup OTG USB controller support
Hi, On 09-02-15 23:10, Michal Suchanek wrote: On 9 February 2015 at 04:54, Siarhei Siamashka siarhei.siamas...@gmail.com wrote: On Sat, 31 Jan 2015 04:54:47 +0200 Siarhei Siamashka siarhei.siamas...@gmail.com wrote: On Sun, 11 Jan 2015 20:34:55 +0100 Hans de Goede hdego...@redhat.com wrote: Hookup OTG USB controller support and enable the otg controller + USB-keyb on various tablets. This allows tablet owners to interact with u-boot without needing to solder a serial console onto their tablet PCB. Thanks. Works great on my Primo73 and Primo81 tablets. However I have just one naive question before happily taking it into use by default. Is the hardcoded otg host mode (without checking the id pin) always safe? For example, what happens if somebody connects a charger instead of a usb keyboard to the tablet? So, does anyone have any idea if it is theoretically safe to have two USB hosts connected to each other and both driving VBUS at +5V? A somewhat realistic scenario is booting an Allwinner tablet over USB using the FEL mode. Is it a good idea for such tablet to have CONFIG_USB_MUSB_SUNXI=y and CONFIG_USB0_VBUS_PIN=axp_drivebus in defconfig? From my past experiments with some non-standard-compliant cables which allow connecting a tablet with a PC without telling the tablet to go OTG mode it seems the tablet battery is drained really quick in this case. There is a protocol for telling the tablet not to power the bus (or telling the PC not to power it for that matter) but both sides have to support matching part of the protocol. Either way, ideal case is that tablet gets power form PC or powered hub even in host mode which is not standards-compliant and obviously does not work with stuff like keyboards. However, it should be possible to detect that there is bus power at the moment a device is connected and not power the device in that case regardless of usb mode negotiated after the connection. Right, I've fixing this on my todo list, the plan is to add vbus_det support, and first check if there is an external vbus before enabling vbus. Regards, Hans ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH sunxi-tools v2 0/2] Support unified u-boot SPL for SD cards and FEL mode
Hi, On 09-02-15 03:37, Siarhei Siamashka wrote: An updated variant of the older patch http://lists.denx.de/pipermail/u-boot/2015-February/204024.html These patches are not for the u-boot code (unless u-boot decides to cannibalize the 'fel' tool later) but still provide a glue layerHi, between the Allwinner BROM code and the u-boot SPL code. And need to play nice with both of them. The updated 'fel' tool is supposed to be used together with u-boot v2015.04 and provide support for booting regular u-boot SPL binaries over USB via FEL mode. So that a special u-boot sunxi FEL configuration can be eventually dropped in the future. The usage instructions are in the 'New method of booting u-boot over USB (u-boot v2015.04 and later versions)' section of the linux-sunxi wiki page http://linux-sunxi.org/index.php?title=FEL/USBBootoldid=12979 It temporarily moves the BROM data from the first 32 KiB of SRAM into a different SRAM section before calling the SPL code. And then moves it back before returning from the SPL back to the FEL code in BROM. This provides a contiguous 32 KiB block in the beginning of SRAM for use by the SPL. And in the case if an extra SRAM section is not available, we can at least defragmemnt the free memory areas and still provide a contiguous ~21 KiB block to the SPL in the beginning of SRAM. This code is also available in the following branch: https://github.com/ssvb/sunxi-tools/commits/20150206-fel-large-spl-support Siarhei Siamashka (2): fel: Split 'aw_fel_get_version' into 'get' and 'print' variants fel: New command for loading U-Boot SPL binaries in eGON format fel-to-spl-thunk.S | 172 +++ fel-to-spl-thunk.h | 69 + fel.c | 291 + 3 files changed, 510 insertions(+), 22 deletions(-) create mode 100644 fel-to-spl-thunk.S create mode 100644 fel-to-spl-thunk.h Thanks for your work on this, ACK to both patches, feel free to push them. One question, the new wiki instructions say that for the latest upstream u-boot _felconfig is no longer necessary, but Simon's patches to fix FEL support upstream contain some #ifdef FEL in start.S to skip some lowlevel init when in FEL mode, does that mean that skipping this is no longer necessary ? Regards, Hans ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] arc: introduce U-Boot port for ARCv2 ISA
ARC HS and ARC EM are new cores based on ARCv2 ISA which is binary incompatible with ISAv1 (AKA ARCompact). Significant difference between ISAv2 and v1 is implementation of interrupt vector table. In v1 it is implemented in the same way as on many other architectures - as a special location where user may put whether code executed in place (if machine word of space is enough) or jump to a full-scale interrupt handler. In v2 interrupt table is just an array of adresses of real interrupt handlers. That requires a separate section for IVT that is not encoded as code by assembler. This change adds support for following cores: * ARC EM6 (simple 32-bit microcontroller without MMU) * ARC HS36 (advanced 32-bit microcontroller without MMU) * ARC HS38 (advanced 32-bit microcontroller with MMU) As a part of ARC HS38 new version of MMU (v4) was introduced. Also this change adds AXS131 board which is the same DW ARC SDP base board but with ARC HS38 CPU tile. Signed-off-by: Alexey Brodkin abrod...@synopsys.com --- arch/arc/Kconfig | 59 +- arch/arc/config.mk | 12 ++ arch/arc/cpu/arcv2/Makefile | 7 ++ arch/arc/cpu/arcv2/start.S | 254 +++ arch/arc/include/asm/cache.h | 6 +- configs/axs103_defconfig | 5 + 6 files changed, 340 insertions(+), 3 deletions(-) create mode 100644 arch/arc/cpu/arcv2/Makefile create mode 100644 arch/arc/cpu/arcv2/start.S create mode 100644 configs/axs103_defconfig diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index a8dc4e2..92a61ba 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -8,30 +8,79 @@ config USE_PRIVATE_LIBGCC default y config SYS_CPU - default arcv1 + default arcv1 if ISA_ARCOMPACT + default arcv2 if ISA_ARCV2 + +choice + prompt ARC Instruction Set + default ISA_ARCOMPACT + +config ISA_ARCOMPACT + bool ARCompact ISA + help + The original ARC ISA of ARC600/700 cores + +config ISA_ARCV2 + bool ARC ISA v2 + help + ISA for the Next Generation ARC-HS cores + +endchoice choice prompt CPU selection - default CPU_ARC770D + default CPU_ARC770D if ISA_ARCOMPACT + default CPU_ARCHS38 if ISA_ARCV2 config CPU_ARC750D bool ARC 750D select ARC_MMU_V2 + depends on ISA_ARCOMPACT help Choose this option to build an U-Boot for ARC750D CPU. config CPU_ARC770D bool ARC 770D select ARC_MMU_V3 + depends on ISA_ARCOMPACT help Choose this option to build an U-Boot for ARC770D CPU. +config CPU_ARCEM6 + bool ARC EM6 + select ARC_MMU_ABSENT + depends on ISA_ARCV2 + help + Next Generation ARC Core based on ISA-v2 ISA without MMU. + +config CPU_ARCHS36 + bool ARC HS36 + select ARC_MMU_ABSENT + depends on ISA_ARCV2 + help + Next Generation ARC Core based on ISA-v2 ISA without MMU. + +config CPU_ARCHS38 + bool ARC HS38 + select ARC_MMU_V4 + depends on ISA_ARCV2 + help + Next Generation ARC Core based on ISA-v2 ISA with MMU. + endchoice choice prompt MMU Version default ARC_MMU_V3 if CPU_ARC770D default ARC_MMU_V2 if CPU_ARC750D + default ARC_MMU_ABSENT if CPU_ARCEM6 + default ARC_MMU_ABSENT if CPU_ARCHS36 + default ARC_MMU_V4 if CPU_ARCHS38 + +config ARC_MMU_ABSENT + bool No MMU + help + No MMU config ARC_MMU_V2 bool MMU v2 @@ -47,6 +96,12 @@ config ARC_MMU_V3 Introduced with ARC700 4.10: New Features Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) Shared Address Spaces (SASID) + +config ARC_MMU_V4 + bool MMU v4 + depends on CPU_ARCHS38 + help + Introduced as a part of ARC HS38 release. endchoice diff --git a/arch/arc/config.mk b/arch/arc/config.mk index f1e81b6..4fcd407 100644 --- a/arch/arc/config.mk +++ b/arch/arc/config.mk @@ -38,6 +38,18 @@ ifdef CONFIG_CPU_ARC770D PLATFORM_CPPFLAGS += -marc700 -mlock -mswape endif +ifdef CONFIG_CPU_ARCEM6 +PLATFORM_CPPFLAGS += -marcem +endif + +ifdef CONFIG_CPU_ARCHS34 +PLATFORM_CPPFLAGS += -marchs +endif + +ifdef CONFIG_CPU_ARCHS38 +PLATFORM_CPPFLAGS += -marchs +endif + PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2 # Needed for relocation diff --git a/arch/arc/cpu/arcv2/Makefile b/arch/arc/cpu/arcv2/Makefile new file mode 100644 index 000..cc69e5a --- /dev/null +++ b/arch/arc/cpu/arcv2/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += start.o diff --git a/arch/arc/cpu/arcv2/start.S b/arch/arc/cpu/arcv2/start.S new file mode 100644 index 000..3ce6896 --- /dev/null +++ b/arch/arc/cpu/arcv2/start.S @@ -0,0 +1,254 @@ +/* + * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved. + * + *
Re: [U-Boot] [RFC PATCH] dm: Add support for all targets which requires MANUAL_RELOC
On 02/09/2015 11:14 PM, Simon Glass wrote: Hi MIchal, On 9 February 2015 at 03:27, Michal Simek michal.si...@xilinx.com wrote: Hi Simon, On 02/06/2015 06:45 AM, Simon Glass wrote: On 4 February 2015 at 23:31, Michal Simek michal.si...@xilinx.com wrote: Hi, On 02/05/2015 04:07 AM, Simon Glass wrote: Hi Michal, On 3 February 2015 at 17:40, Simon Glass s...@chromium.org wrote: Hi Michal, On 3 February 2015 at 02:11, Michal Simek michal.si...@xilinx.com wrote: Hi Simon, On 02/03/2015 03:02 AM, Masahiro Yamada wrote: Hi. On Mon, 2 Feb 2015 16:57:15 -0700 Simon Glass s...@chromium.org wrote: Hi Michal, On 2 February 2015 at 08:31, Michal Simek michal.si...@xilinx.com wrote: Targets with CONFIG_NEEDS_MANUAL_RELOC do not use REL/RELA relocation (mostly only GOT) where functions aray are not updated. This patch is fixing function pointers for DM core and serial-uclass to ensure that relocated functions are called. Signed-off-by: Michal Simek michal.si...@xilinx.com --- drivers/core/root.c| 64 ++ drivers/serial/serial-uclass.c | 16 +++ 2 files changed, 80 insertions(+) How long will we have to carry this patch? It seems that if we add any new driver we will have to add more code like this? This patch is unfortunate. Can we discontinue CONFIG_NEEDS_MANUAL_RELOC some day? This patch (or similar one) has to be alive when we have platform which requires CONFIG_NEEDS_MANUAL_RELOC for full u-boot. There is an option to move to REL/RELA but the question is if all platforms have it/support it. Unfortunately I think that it will be in the tree for a long time. If we use SPL, we do not have to relocate code, I think. SPL doesn't have relocation that's why this code is not used there. Maybe I asked this before, but when can we remove CONFIG_NEEDS_MANUAL_RELOC? What platforms need it? Sorry if you answered these questions but can you please resend if so as I missed it. Graeme has answered it + my response here. http://lists.denx.de/pipermail/u-boot/2015-February/203911.html removing: When all platforms are moved to REL/RELA we can remove this manual reloc option. With a heavy heart: Acked-by: Simon Glass s...@chromium.org Are you going to take this patch to your DM tree? I'm hoping to bring in the Kconfig patches and send a pull request this week, so could do that if it suits. But it is up to you, so let's do whatever makes your life easier. Let me know. works for me. Taking it via your tree is the right way to reach master branch. Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] mx6sx: pins: Enable SION for I2C3 iomux setting
Hi,
On 09/02/2015 14:27, Li Ye-B37916 wrote:
Hi Stefano, Nikolay,
On 1/30/2015 1:54 AM, Stefano Babic wrote:
Hi,
On 12/01/2015 11:37, Nikolay Dimitrov wrote:
Hi Ye.Li,
On 01/12/2015 10:46 AM, Ye.Li wrote:
The I2C SDA and SCL require the IOMUX SION bit set to get input signal.
Signed-off-by: Ye.Li b37...@freescale.com
---
arch/arm/include/asm/arch-mx6/mx6sx_pins.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/mx6sx_pins.h
b/arch/arm/include/asm/arch-mx6/mx6sx_pins.h
index 7c6c1e8..da8c698 100644
--- a/arch/arm/include/asm/arch-mx6/mx6sx_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6sx_pins.h
@@ -420,7 +420,7 @@ enum {
MX6_PAD_KEY_COL4__KPP_COL_4=
IOMUX_PAD(0x03FC, 0x00B4, 0, 0x, 0, 0),
MX6_PAD_KEY_COL4__ENET2_MDC=
IOMUX_PAD(0x03FC, 0x00B4, 1, 0x, 0, 0),
- MX6_PAD_KEY_COL4__I2C3_SCL =
IOMUX_PAD(0x03FC, 0x00B4, 2, 0x07B8, 2, 0),
+ MX6_PAD_KEY_COL4__I2C3_SCL =
IOMUX_PAD(0x03FC, 0x00B4, IOMUX_CONFIG_SION | 2, 0x07B8, 2, 0),
MX6_PAD_KEY_COL4__USDHC2_LCTL =
IOMUX_PAD(0x03FC, 0x00B4, 3, 0x, 0, 0),
MX6_PAD_KEY_COL4__AUDMUX_AUD5_RXC =
IOMUX_PAD(0x03FC, 0x00B4, 4, 0x0664, 0, 0),
MX6_PAD_KEY_COL4__GPIO2_IO_14 =
IOMUX_PAD(0x03FC, 0x00B4, 5, 0x, 0, 0),
@@ -467,7 +467,7 @@ enum {
MX6_PAD_KEY_ROW4__KPP_ROW_4=
IOMUX_PAD(0x0410, 0x00C8, 0, 0x, 0, 0),
MX6_PAD_KEY_ROW4__ENET2_MDIO =
IOMUX_PAD(0x0410, 0x00C8, 1, 0x0770, 3, 0),
- MX6_PAD_KEY_ROW4__I2C3_SDA =
IOMUX_PAD(0x0410, 0x00C8, 2, 0x07BC, 2, 0),
+ MX6_PAD_KEY_ROW4__I2C3_SDA =
IOMUX_PAD(0x0410, 0x00C8, IOMUX_CONFIG_SION | 2, 0x07BC, 2, 0),
MX6_PAD_KEY_ROW4__USDHC1_LCTL =
IOMUX_PAD(0x0410, 0x00C8, 3, 0x, 0, 0),
MX6_PAD_KEY_ROW4__AUDMUX_AUD5_RXFS =
IOMUX_PAD(0x0410, 0x00C8, 4, 0x0668, 0, 0),
MX6_PAD_KEY_ROW4__GPIO2_IO_19 =
IOMUX_PAD(0x0410, 0x00C8, 5, 0x, 0, 0),
Usually the SCL is output-only, driven by the I2C master. Why do you
need to enable SION bit on SCL, if the pin will be used as output-only?
Right - I do not see why SION should be set.
Regards,
Stefano Babic
Setting SION to both SDA and SCL is required by i.MX6 reference manual. You
can find the information below from i2c chapter.
34.2 External Signals
This section discusses I2C signals that connect off-chip.
For I2C compliance, all devices connected to the I2Cn_SCL and I2Cn_SDA
signals must
have open-drain or open-collector outputs. The logic AND function is
implemented on
both lines with external pull-up resistors.
Inputs of I2Cn_SCL and I2Cn_SDA also need to be manually enabled by setting
the
SION bit in the IOMUX after the corresponding PADs are selected as I2C
function.
Checked in manual, thanks for link. However, I have still a couple of
questions. The controller can work as slave or as master, and according
to the manual, the slave is the default after a reset. I understand that
putting the controller into slave mode must require the SION bit set.
Anyway, you are using I2C3 as master in your patch 4/4. Is it still
mandatory even in this case to set the SION bit ? The manual states that
to use the signal as input the SION bit must be set, but as far as I see
in the patchset SCL is output only.
Best regards,
Stefano Babic
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[U-Boot] [PATCH] ARM: move -march=* and -mtune= options to arch/arm/Makefile
My main motivation for this commit: [1] Follow the arch/arm/Makefile style of Linux Kernel [2] Maintain compiler options systematically Currently, we give -march=* and -mtune=* options inconsistently: Only some of the CPUs pass -march=* and -mtune=* options. By collecting flags into the arch/arm/Makefile, we can tell which options are missing at a glance. [3] Prepare for deprecating arch/*/cpu/*/config.mk Note: This commit just moves the compiler options so as not to change the behavior at all. It does not care the correctness of the given options. Fox example, -march=armv5te might be better than -march=armv4 for ARM946EJS, but it is beyond the scope this commit. Also, filling the missing -march=* and -tune=* is left to follow-up patches. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- arch/arm/Makefile| 32 arch/arm/cpu/arm1136/config.mk | 9 - arch/arm/cpu/arm1176/config.mk | 9 - arch/arm/cpu/arm720t/config.mk | 9 - arch/arm/cpu/arm920t/config.mk | 8 arch/arm/cpu/arm926ejs/config.mk | 8 arch/arm/cpu/arm946es/config.mk | 8 arch/arm/cpu/armv7/config.mk | 5 - arch/arm/cpu/armv8/config.mk | 2 -- arch/arm/cpu/pxa/config.mk | 2 -- arch/arm/cpu/sa1100/config.mk| 9 - 11 files changed, 32 insertions(+), 69 deletions(-) delete mode 100644 arch/arm/cpu/arm1136/config.mk delete mode 100644 arch/arm/cpu/arm1176/config.mk delete mode 100644 arch/arm/cpu/arm720t/config.mk delete mode 100644 arch/arm/cpu/arm920t/config.mk delete mode 100644 arch/arm/cpu/arm926ejs/config.mk delete mode 100644 arch/arm/cpu/arm946es/config.mk delete mode 100644 arch/arm/cpu/sa1100/config.mk diff --git a/arch/arm/Makefile b/arch/arm/Makefile index ebb7dc3..b63544f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -2,6 +2,38 @@ # SPDX-License-Identifier: GPL-2.0+ # +# This selects which instruction set is used. +arch-$(CONFIG_CPU_ARM720T) =-march=armv4 +arch-$(CONFIG_CPU_ARM920T) =-march=armv4 +arch-$(CONFIG_CPU_ARM926EJS) =-march=armv5te +arch-$(CONFIG_CPU_ARM946ES)=-march=armv4 +arch-$(CONFIG_CPU_SA1100) =-march=armv4 +arch-$(CONFIG_CPU_PXA) = +arch-$(CONFIG_CPU_ARM1136) =-march=armv5 +arch-$(CONFIG_CPU_ARM1176) =-march=armv5t +arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, -march=armv5) +arch-$(CONFIG_ARM64) =-march=armv8-a + +# Evaluate arch cc-option calls now +arch-y := $(arch-y) + +# This selects how we optimise for the processor. +tune-$(CONFIG_CPU_ARM720T) =-mtune=arm7tdmi +tune-$(CONFIG_CPU_ARM920T) = +tune-$(CONFIG_CPU_ARM926EJS) = +tune-$(CONFIG_CPU_ARM946ES)= +tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100 +tune-$(CONFIG_CPU_PXA) =-mcpu=xscale +tune-$(CONFIG_CPU_ARM1136) = +tune-$(CONFIG_CPU_ARM1176) = +tune-$(CONFIG_CPU_V7) = +tune-$(CONFIG_ARM64) = + +# Evaluate tune cc-option calls now +tune-y := $(tune-y) + +PLATFORM_CPPFLAGS += $(arch-y) $(tune-y) + head-y := arch/arm/cpu/$(CPU)/start.o ifeq ($(CONFIG_SPL_BUILD),y) diff --git a/arch/arm/cpu/arm1136/config.mk b/arch/arm/cpu/arm1136/config.mk deleted file mode 100644 index a82c6ce..000 --- a/arch/arm/cpu/arm1136/config.mk +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, ga...@denx.de -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Make ARMv5 to allow more compilers to work, even though its v6. -PLATFORM_CPPFLAGS += -march=armv5 diff --git a/arch/arm/cpu/arm1176/config.mk b/arch/arm/cpu/arm1176/config.mk deleted file mode 100644 index 5dc2ebb..000 --- a/arch/arm/cpu/arm1176/config.mk +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, ga...@denx.de -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Make ARMv5 to allow more compilers to work, even though its v6. -PLATFORM_CPPFLAGS += -march=armv5t diff --git a/arch/arm/cpu/arm720t/config.mk b/arch/arm/cpu/arm720t/config.mk deleted file mode 100644 index 772fb41..000 --- a/arch/arm/cpu/arm720t/config.mk +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2002 -# Sysgo Real-Time Solutions, GmbH www.elinos.com -# Marius Groeger mgroe...@sysgo.de -# -# SPDX-License-Identifier: GPL-2.0+ -# - -PLATFORM_CPPFLAGS += -march=armv4 -mtune=arm7tdmi diff --git a/arch/arm/cpu/arm920t/config.mk b/arch/arm/cpu/arm920t/config.mk deleted file mode 100644 index 799afff..000 --- a/arch/arm/cpu/arm920t/config.mk +++ /dev/null @@ -1,8 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, ga...@denx.de -# -# SPDX-License-Identifier: GPL-2.0+ -# - -PLATFORM_CPPFLAGS += -march=armv4 diff --git a/arch/arm/cpu/arm926ejs/config.mk b/arch/arm/cpu/arm926ejs/config.mk deleted file mode 100644 index bdb3da1..000 --- a/arch/arm/cpu/arm926ejs/config.mk +++
Re: [U-Boot] [PATCH] imx: mx6qsabreauto: Change to use common GPMI IO clock function
Hi, On 12/01/2015 10:37, Ye.Li wrote: Since a clock function setup_gpmi_io_clk is implemented for GPMI IO clock settings, change to use this common function in GPMI setup. Signed-off-by: Ye.Li b37...@freescale.com --- board/freescale/mx6qsabreauto/mx6qsabreauto.c | 25 ++--- 1 files changed, 2 insertions(+), 23 deletions(-) diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 59387ff..a90360f 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -311,30 +311,9 @@ static void setup_gpmi_nand(void) /* config gpmi nand iomux */ imx_iomux_v3_setup_multiple_pads(gpmi_pads, ARRAY_SIZE(gpmi_pads)); - /* gate ENFC_CLK_ROOT clock first,before clk source switch */ - clrbits_le32(mxc_ccm-CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); - clrbits_le32(mxc_ccm-CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK); - - /* config gpmi and bch clock to 100 MHz */ - clrsetbits_le32(mxc_ccm-cs2cdr, - MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK | - MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK | - MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK, - MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) | + setup_gpmi_io_clk((MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) | MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) | - MXC_CCM_CS2CDR_ENFC_CLK_SEL(3)); - - /* enable ENFC_CLK_ROOT clock */ - setbits_le32(mxc_ccm-CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); - - /* enable gpmi and bch clock gating */ - setbits_le32(mxc_ccm-CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_OFFSET); + MXC_CCM_CS2CDR_ENFC_CLK_SEL(3))); /* enable apbh clock gating */ setbits_le32(mxc_ccm-CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); This is ok, but you see that if setup_gpmi_io_clk() is exapanded as in your mx6: clock: Modify GPMI clock to support mx6sx (I understand that it was protected by processor's config), it could be a problem. Anyway, this is ok and will be merged. Acked-by: Stefano Babic sba...@denx.de Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] mx6: clock: Modify GPMI clock to support mx6sx
Hi Ye,
On 12/01/2015 09:46, Ye.Li wrote:
On mx6sx, the CCM register bits for GPMI are different as other
mx6 platforms. Modify the GPMI clock function to support mx6sx.
Signed-off-by: Ye.Li b37...@freescale.com
---
arch/arm/cpu/armv7/mx6/clock.c | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index fd57f22..ce7f0f7 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -47,6 +47,17 @@ void setup_gpmi_io_clk(u32 cfg)
MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK |
MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK);
+#if defined(CONFIG_MX6SX)
+ clrbits_le32(imx_ccm-CCGR4, MXC_CCM_CCGR4_QSPI2_ENFC_MASK);
+
+ clrsetbits_le32(imx_ccm-cs2cdr,
+ MXC_CCM_CS2CDR_QSPI2_CLK_PODF_MASK |
+ MXC_CCM_CS2CDR_QSPI2_CLK_PRED_MASK |
+ MXC_CCM_CS2CDR_QSPI2_CLK_SEL_MASK,
+ cfg);
+
+ setbits_le32(imx_ccm-CCGR4, MXC_CCM_CCGR4_QSPI2_ENFC_MASK);
+#els
If I have well understood, this code is protected by CONFIG_NAND_MXS,
and that conflicts with what you are willing to do (setting clocks for
QSPI). I suggest to split setup_gpmi_io_clk() function, that at the
moment is ony for NAND, having something like:
void setup_gpmi_io_clk()
{
#ifdef CONFIG_NAND_MXS
...setup nand
#endif
...setup qspi
}
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH 4/4] imx: mx6sxsabreauto: Add support for mx6sx SABREAUTO board
Hi, On 12/01/2015 09:46, Ye.Li wrote: Initial version for mx6sx SABREAUTO board support with features: PMIC, QSPI, NAND flash, SD/MMC, USB, Ethernet, I2C, IO Expander. Signed-off-by: Ye.Li b37...@freescale.com --- arch/arm/Kconfig|5 + board/freescale/mx6sxsabreauto/Kconfig | 15 + board/freescale/mx6sxsabreauto/MAINTAINERS |6 + board/freescale/mx6sxsabreauto/Makefile |6 + board/freescale/mx6sxsabreauto/imximage.cfg | 136 ++ board/freescale/mx6sxsabreauto/mx6sxsabreauto.c | 498 +++ configs/mx6sxsabreauto_defconfig|3 + include/configs/mx6sxsabreauto.h| 275 + 8 files changed, 944 insertions(+), 0 deletions(-) create mode 100644 board/freescale/mx6sxsabreauto/Kconfig create mode 100644 board/freescale/mx6sxsabreauto/MAINTAINERS create mode 100644 board/freescale/mx6sxsabreauto/Makefile create mode 100644 board/freescale/mx6sxsabreauto/imximage.cfg create mode 100644 board/freescale/mx6sxsabreauto/mx6sxsabreauto.c create mode 100644 configs/mx6sxsabreauto_defconfig create mode 100644 include/configs/mx6sxsabreauto.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5eb1d03..9c54914 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -638,6 +638,10 @@ config TARGET_MX6SXSABRESD bool Support mx6sxsabresd select CPU_V7 +config TARGET_MX6SXSABREAUTO + bool Support mx6sxsabreauto + select CPU_V7 + config TARGET_GW_VENTANA bool Support gw_ventana select CPU_V7 @@ -916,6 +920,7 @@ source board/freescale/mx6qsabreauto/Kconfig source board/freescale/mx6sabresd/Kconfig source board/freescale/mx6slevk/Kconfig source board/freescale/mx6sxsabresd/Kconfig +source board/freescale/mx6sxsabreauto/Kconfig source board/freescale/vf610twr/Kconfig source board/gateworks/gw_ventana/Kconfig source board/genesi/mx51_efikamx/Kconfig diff --git a/board/freescale/mx6sxsabreauto/Kconfig b/board/freescale/mx6sxsabreauto/Kconfig new file mode 100644 index 000..b0f5167 --- /dev/null +++ b/board/freescale/mx6sxsabreauto/Kconfig @@ -0,0 +1,15 @@ +if TARGET_MX6SXSABREAUTO + +config SYS_BOARD + default mx6sxsabreauto + +config SYS_VENDOR + default freescale + +config SYS_SOC + default mx6 + +config SYS_CONFIG_NAME + default mx6sxsabreauto + +endif diff --git a/board/freescale/mx6sxsabreauto/MAINTAINERS b/board/freescale/mx6sxsabreauto/MAINTAINERS new file mode 100644 index 000..dd3ae41 --- /dev/null +++ b/board/freescale/mx6sxsabreauto/MAINTAINERS @@ -0,0 +1,6 @@ +MX6SXSABREAUTO BOARD +M: Ye Li ye...@freescale.com +S: Maintained +F: board/freescale/mx6sxsabreauto/ +F: include/configs/mx6sxsabreauto.h +F: configs/mx6sxsabreauto_defconfig diff --git a/board/freescale/mx6sxsabreauto/Makefile b/board/freescale/mx6sxsabreauto/Makefile new file mode 100644 index 000..f0cd1ce --- /dev/null +++ b/board/freescale/mx6sxsabreauto/Makefile @@ -0,0 +1,6 @@ +# (C) Copyright 2014 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := mx6sxsabreauto.o diff --git a/board/freescale/mx6sxsabreauto/imximage.cfg b/board/freescale/mx6sxsabreauto/imximage.cfg new file mode 100644 index 000..529e555 --- /dev/null +++ b/board/freescale/mx6sxsabreauto/imximage.cfg @@ -0,0 +1,136 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#define __ASSEMBLY__ +#include config.h + +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi/sd/nand/onenand, qspi/nor + */ + +BOOT_FROMsd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type AddressValue + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Enable all clocks */ +DATA 4 0x020c4068 0x +DATA 4 0x020c406c 0x +DATA 4 0x020c4070 0x +DATA 4 0x020c4074 0x +DATA 4 0x020c4078 0x +DATA 4 0x020c407c 0x +DATA 4 0x020c4080 0x +DATA 4 0x020c4084 0x + I will not block the patch for this: you are the maintainer and you can test and check if this ok. I would only to point to the discussion with Peng regarding the same issue for the mx6sxsabresd. Peng confirmed that he would send a following patch for enabling only the clocks are needed. Mybe you can synchronize wit him. +/* IOMUX - DDR IO Type */ +DATA 4 0x020e0618 0x000c +DATA 4 0x020e05fc 0x + +/* Clock */ +DATA 4 0x020e032c 0x0030 + +/* Address */ +DATA 4 0x020e0300 0x0030 +DATA 4 0x020e02fc 0x0030 +DATA 4 0x020e05f4 0x0030 + +/* Control */ +DATA 4 0x020e0340 0x0030 + +DATA 4
Re: [U-Boot] [PATCH 2/4] mx6: soc: Add ENET2 support
Hi,
On 12/01/2015 09:46, Ye.Li wrote:
The mx6sx has two ENET controllers, some board like mx6sxsabreauto
uses the ENET2 for ethernet. So add ENET2 support to soc level,
including: ENET2 clock enable and MAC address fuse for ENET2.
Signed-off-by: Ye.Li b37...@freescale.com
---
arch/arm/cpu/armv7/mx6/clock.c |9 -
arch/arm/cpu/armv7/mx6/soc.c | 25 -
arch/arm/include/asm/arch-mx6/crm_regs.h |7 +++
3 files changed, 39 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 055f44e..fd57f22 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -498,7 +498,11 @@ int enable_fec_anatop_clock(enum enet_freq freq)
reg = readl(anatop-pll_enet);
reg = ~BM_ANADIG_PLL_ENET_DIV_SELECT;
- reg |= freq;
+ reg |= BF_ANADIG_PLL_ENET_DIV_SELECT(freq);
+#ifdef CONFIG_MX6SX
+ reg = ~BM_ANADIG_PLL_ENET2_DIV_SELECT;
+ reg |= BF_ANADIG_PLL_ENET2_DIV_SELECT(freq);
+#endif
if ((reg BM_ANADIG_PLL_ENET_POWERDOWN) ||
(!(reg BM_ANADIG_PLL_ENET_LOCK))) {
@@ -514,6 +518,9 @@ int enable_fec_anatop_clock(enum enet_freq freq)
/* Enable FEC clock */
reg |= BM_ANADIG_PLL_ENET_ENABLE;
+#ifdef CONFIG_MX6SX
+ reg |= BM_ANADIG_PLL_ENET2_ENABLE;
+#endif
reg = ~BM_ANADIG_PLL_ENET_BYPASS;
writel(reg, anatop-pll_enet);
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 5f5f497..4994eab 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -337,6 +337,29 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char
*mac)
struct fuse_bank4_regs *fuse =
(struct fuse_bank4_regs *)bank-fuse_regs;
+#ifdef CONFIG_MX6SX
+ if (0 == dev_id) {
+ u32 value = readl(fuse-mac_addr_high);
+ mac[0] = (value 8);
+ mac[1] = value ;
+
+ value = readl(fuse-mac_addr_low);
+ mac[2] = value 24 ;
^---
Checkpatch complains about extra spaces.
+ mac[3] = value 16 ;
+ mac[4] = value 8 ;
+ mac[5] = value ;
+ } else {
+ u32 value = readl(fuse-mac_addr2);
+ mac[0] = value 24 ;
+ mac[1] = value 16 ;
+ mac[2] = value 8 ;
+ mac[3] = value ;
+
+ value = readl(fuse-mac_addr_high);
+ mac[4] = value 24 ;
+ mac[5] = value 16 ;
Is it desired that the layout is different between the two mac addresses
? As far as I know, MAC_ADDR in fuses is reserved to customers, and it
makes sense they have the same layout.
Is there some reason (that I do not know, obviously) to have them
different ?
+ }
+#else
u32 value = readl(fuse-mac_addr_high);
mac[0] = (value 8);
mac[1] = value ;
@@ -346,7 +369,7 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
mac[3] = value 16 ;
mac[4] = value 8 ;
mac[5] = value ;
-
+#endif
}
#endif
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h
b/arch/arm/include/asm/arch-mx6/crm_regs.h
index 39f3c07..eec03cf 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -1012,6 +1012,13 @@ struct mxc_ccm_reg {
#define BM_ANADIG_PLL_ENET_DIV_SELECT 0x0003
#define BF_ANADIG_PLL_ENET_DIV_SELECT(v) \
(((v) 0) BM_ANADIG_PLL_ENET_DIV_SELECT)
+#ifdef CONFIG_MX6SX
+#define BM_ANADIG_PLL_ENET2_ENABLE 0x0010
+
+#define BM_ANADIG_PLL_ENET2_DIV_SELECT 0x000C
+#define BF_ANADIG_PLL_ENET2_DIV_SELECT(v) \
+ (((v) 2) BM_ANADIG_PLL_ENET2_DIV_SELECT)
+#endif
#define BM_ANADIG_PFD_480_PFD3_CLKGATE 0x8000
#define BM_ANADIG_PFD_480_PFD3_STABLE 0x4000
Best regards,
Stefano Babic
--
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Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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Re: [U-Boot] [PATCH V2 08/10] arm: socfpga: Add Altera Arria V DK support
On Mon 2015-02-09 20:09:50, Marek Vasut wrote: On Monday, February 02, 2015 at 08:47:52 AM, Stefan Roese wrote: On 30.01.2015 23:08, Marek Vasut wrote: Add support for the Altera Arria V development kit. Signed-off-by: Marek Vasut ma...@denx.de Cc: Chin Liang See cl...@opensource.altera.com Cc: Dinh Nguyen dingu...@opensource.altera.com Cc: Pavel Machek pa...@denx.de Cc: Stefan Roese s...@denx.de Cc: Vince Bridgers vbrid...@opensource.altera.com --- [...] +/* The rest of the configuration is shared */ +#include configs/socfpga_common.h + +#endif /* __CONFIG_SOCFPGA_ARRIA5_H__ */ Without really diff'ing this file with socfpga_cyclone5.h, I'm pretty sure that they share many lines. Wouldn't it make sense to move those common defines / configs to a common file instead (socfpga_common.h)? Hi! I agree they share a lot, but I would not recommend moving any of this into socfpga_common.h . Not all boards which include socfpga_common.h will want all that's common between socfpga_cyclone5.h and socfpga_arria5.h as well. We need to switch to DM really soon, since without DM, we cannot really make any common configuration. The socfpga_cyclone5.h file in fact represents a configuration for SoCDK with Cyclone 5, same for Arria 5. Unless you have any suggestion, I'd just apply this stuff as is for now with the note that these config files must be cleaned up once DM is in place. Or do you have any suggestions please ? Could we simply have socfpga_common_5.h which stuff that is shared between cyclone and arrira? Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 03/12] imx:mx6slevk implement power init board
Hi Peng,
On 09/01/2015 09:59, Peng Fan wrote:
Implement power_init_board and related I2C interface configuration.
After adding this, uboot can successfully detect and configure pmic.
U-Boot 2015.01-rc4-00110-g5697113-dirty (Jan 08 2015 - 21:06:44)
CPU: Freescale i.MX6SL rev1.0 at 396 MHz
Reset cause: POR
Board: MX6SLEVK
I2C: ready
DRAM: 1 GiB
PMIC: PFUZE100 ID=0x10
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Signed-off-by: Peng Fan peng@freescale.com
---
board/freescale/mx6slevk/mx6slevk.c | 47
+
1 file changed, 47 insertions(+)
diff --git a/board/freescale/mx6slevk/mx6slevk.c
b/board/freescale/mx6slevk/mx6slevk.c
index 838ea6c..f74b237 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -13,13 +13,18 @@
#include asm/arch/sys_proto.h
#include asm/gpio.h
#include asm/imx-common/iomux-v3.h
+#include asm/imx-common/mxc_i2c.h
#include asm/imx-common/spi.h
#include asm/io.h
#include linux/sizes.h
#include common.h
#include fsl_esdhc.h
+#include i2c.h
#include mmc.h
#include netdev.h
+#include power/pmic.h
+#include power/pfuze100_pmic.h
+#include ../common/pfuze.h
#include usb.h
#include usb/ehci-fsl.h
@@ -40,6 +45,11 @@ DECLARE_GLOBAL_DATA_PTR;
#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |\
+ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
+ PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
#define ETH_PHY_RESETIMX_GPIO_NR(4, 21)
int dram_init(void)
@@ -221,6 +231,39 @@ int board_mmc_init(bd_t *bis)
return 0;
}
+#ifdef CONFIG_SYS_I2C_MXC
+#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
+/* I2C1 for PMIC */
+struct i2c_pads_info i2c_pad_info1 = {
+ .sda = {
+ .i2c_mode = MX6_PAD_I2C1_SDA__I2C1_SDA | PC,
+ .gpio_mode = MX6_PAD_I2C1_SDA__GPIO_3_13 | PC,
+ .gp = IMX_GPIO_NR(3, 13),
+ },
+ .scl = {
+ .i2c_mode = MX6_PAD_I2C1_SCL__I2C1_SCL | PC,
+ .gpio_mode = MX6_PAD_I2C1_SCL__GPIO_3_12 | PC,
+ .gp = IMX_GPIO_NR(3, 12),
+ },
+};
+
+int power_init_board(void)
+{
+ struct pmic *p;
+ unsigned int ret;
+
+ p = pfuze_common_init(I2C_PMIC);
+ if (!p)
+ return -ENODEV;
+
+ ret = pfuze_mode_init(p, APS_PFM);
+ if (ret 0)
+ return -EIO;
+
+ return 0;
+}
+#endif
+
#ifdef CONFIG_FEC_MXC
int board_eth_init(bd_t *bis)
{
@@ -297,6 +340,10 @@ int board_init(void)
/* address of boot parameters */
gd-bd-bi_boot_params = PHYS_SDRAM + 0x100;
+#ifdef CONFIG_SYS_I2C_MXC
+ setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, i2c_pad_info1);
+#endif
+
#ifdef CONFIG_FEC_MXC
setup_fec();
#endif
Patches are quite orthogonal: patches 1-3 have nothing to do with the
subject of the patchset (LDO bypass) and can flawlessly be applied.
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH 05/12] imx:mx6 update fuse_bank0_regs
On 09/01/2015 09:59, Peng Fan wrote:
Update fuse_bank0_regs structure according reference mannual.
Signed-off-by: Peng Fan peng@freescale.com
---
arch/arm/include/asm/arch-mx6/imx-regs.h | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
b/arch/arm/include/asm/arch-mx6/imx-regs.h
index c968600..22f371d 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -624,12 +624,16 @@ struct fuse_bank0_regs {
u32 rsvd1[3];
u32 uid_high;
u32 rsvd2[3];
- u32 rsvd3[4];
- u32 rsvd4[4];
- u32 rsvd5[4];
+ u32 cfg2;
+ u32 rsvd3[3];
+ u32 cfg3;
+ u32 rsvd4[3];
+ u32 cfg4;
+ u32 rsvd5[3];
u32 cfg5;
u32 rsvd6[3];
- u32 rsvd7[4];
+ u32 cfg6;
+ u32 rsvd7[3];
};
#ifdef CONFIG_MX6SX
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH 06/12] pmic:pfuze add macro for setting voltage
On 09/01/2015 09:59, Peng Fan wrote:
#define PFUZE100_SW1ABC_SETP(x) ((x - 3000) / 250)
This macro is for configuring SW1A/B/C Output Voltage easily.
Signed-off-by: Peng Fan peng@freescale.com
---
include/power/pfuze100_pmic.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/power/pfuze100_pmic.h b/include/power/pfuze100_pmic.h
index 7474afb..d304658 100644
--- a/include/power/pfuze100_pmic.h
+++ b/include/power/pfuze100_pmic.h
@@ -61,6 +61,8 @@ enum {
* Buck Regulators
*/
+#define PFUZE100_SW1ABC_SETP(x) ((x - 3000) / 250)
+
/* SW1A/B/C Output Voltage Configuration */
#define SW1x_0_300V 0
#define SW1x_0_325V 1
To inform you: patches 1-3 must be rebased and reworked, mainly due to
pmic_mode_init() (you have postpone V2 after discussion about
ldo-bypass). I start applying the 5-6, that contain only new defines.
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
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=
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Re: [U-Boot] [v3 PATCH 1/3] arm: mxs: Add debug outputs and comments to mxs SPL source files
On 25/01/2015 02:07, Graeme Russ wrote: It is difficult to track down fail to boot issues in the mxs SPL. Implement the following to make it easier: - Add debug outputs to allow tracing of SPL progress in order to track where failure to boot occurs. DEUBUG and CONFIG_SPL_SERIAL_SUPPORT must be defined to enable debug output in SPL - Add TODO comments where it is not clear if the code is doing what it is meant to be doing, even tough the board boots properly (these comments refer to existing code, not to any code added by this patch) Signed-off-by: Graeme Russ gr...@tss-engineering.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [v3 PATCH 2/3] arm: mxs: Enable booting of mx28 without battery
On 25/01/2015 02:07, Graeme Russ wrote: Section 4.1.2 of Freescale Application Note AN4199 describes the configuration required to operate the mx28 from a 5V source without a battery. This patch changes the behaviour of the dropout control of the DC-DC converter (refer to section 11.12.9 of the mx28 Application Processor Reference Manual - Document Number: MCIMX28RM, Rev 2, 08/2013) to the following: - Always use 4P2 Linear Regulator if CONFIG_SYS_MXS_VDD5V_ONLY is defined - Switch between 4P2 Linear Regulator and Battery, using whichever has the highest voltage if CONFIG_SYS_MXS_VDD5V_ONLY isnot set (this is the same as the pre-patch behaviour) Signed-off-by: Graeme Russ gr...@tss-engineering.com Signed-off-by: Damien Gotfroi dgotf...@greenwatch.be --- Changes in v2 - Implemented Damien Gotfroi's simplified version Changes in v3 - Updated commit message - Explicitly use POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2 for the DCDC4P2_DROPOUT_CONFIG define (it is 0x0 so it make no functional difference) --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [v3 PATCH 3/3] arm: mxs: Add 'Wait for JTAG user' if booted in JTAG mode
On 25/01/2015 02:07, Graeme Russ wrote: When booting in JTAG mode, there is no way to use soft break-points, and no way of knowing when SPL has finished executing (so the user can issue a 'halt' command to load u-boot.bin for example) Add a debug output and simple loop to stop execution at the completion of the SPL initialisation as a pseudo break-point when booting in JTAG mode Signed-off-by: Graeme Russ gr...@tss-engineering.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 04/12] imx:mx6 update mxc_ccm_reg
Hi Peng,
On 09/01/2015 09:59, Peng Fan wrote:
Add more register for structure mxc_ccm_reg.
Signed-off-by: Peng Fan peng@freescale.com
---
arch/arm/include/asm/arch-mx6/crm_regs.h | 87
1 file changed, 87 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h
b/arch/arm/include/asm/arch-mx6/crm_regs.h
index 39f3c07..55e1287 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -103,6 +103,93 @@ struct mxc_ccm_reg {
u32 analog_pfd_528_set;
u32 analog_pfd_528_clr;
u32 analog_pfd_528_tog;
+ u32 reg_1p1;/* 0x4110 */
+ u32 reg_1p1_set;/* 0x4114 */
Even if the offset can be sometimes quite useful, the best reference is
the manual. You see that other fields have no offset in comments, so
please remove them here.
+ u32 reg_1p1_clr;/* 0x4118 */
+ u32 reg_1p1_tog;/* 0x411c */
+ u32 reg_3p0;/* 0x4120 */
+ u32 reg_3p0_set;/* 0x4124 */
+ u32 reg_3p0_clr;/* 0x4128 */
+ u32 reg_3p0_tog;/* 0x412c */
+ u32 reg_2p5;/* 0x4130 */
+ u32 reg_2p5_set;/* 0x4134 */
+ u32 reg_2p5_clr;/* 0x4138 */
+ u32 reg_2p5_tog;/* 0x413c */
+ u32 reg_core; /* 0x4140 */
+ u32 reg_core_set; /* 0x4144 */
+ u32 reg_core_clr; /* 0x4148 */
+ u32 reg_core_tog; /* 0x414c */
+ u32 ana_misc0; /* 0x4150 */
+ u32 ana_misc0_set; /* 0x4154 */
+ u32 ana_misc0_clr; /* 0x4158 */
+ u32 ana_misc0_tog; /* 0x415c */
+ u32 ana_misc1; /* 0x4160 */
+ u32 ana_misc1_set; /* 0x4164 */
+ u32 ana_misc1_clr; /* 0x4168 */
+ u32 ana_misc1_tog; /* 0x416c */
+ u32 ana_misc2; /* 0x4170 */
+ u32 ana_misc2_set; /* 0x4174 */
+ u32 ana_misc2_clr; /* 0x4178 */
+ u32 ana_misc2_tog; /* 0x417c */
+ u32 tempsense0; /* 0x4180 */
+ u32 tempsense0_set; /* 0x4184 */
+ u32 tempsense0_clr; /* 0x4188 */
+ u32 tempsense0_tog; /* 0x418c */
+ u32 tempsense1; /* 0x4190 */
+ u32 tempsense1_set; /* 0x4194 */
+ u32 tempsense1_clr; /* 0x4198 */
+ u32 tempsense1_tog; /* 0x419c */
+ u32 usb1_vbus_detect; /* 0x41a0 */
+ u32 usb1_vbus_detect_set; /* 0x41a4 */
+ u32 usb1_vbus_detect_clr; /* 0x41a8 */
+ u32 usb1_vbus_detect_tog; /* 0x41ac */
+ u32 usb1_chrg_detect; /* 0x41b0 */
+ u32 usb1_chrg_detect_set; /* 0x41b4 */
+ u32 usb1_chrg_detect_clr; /* 0x41b8 */
+ u32 usb1_chrg_detect_tog; /* 0x41bc */
+ u32 usb1_vbus_det_stat; /* 0x41c0 */
+ u32 usb1_vbus_det_stat_set; /* 0x41c4 */
+ u32 usb1_vbus_det_stat_clr; /* 0x41c8 */
+ u32 usb1_vbus_det_stat_tog; /* 0x41cc */
+ u32 usb1_chrg_det_stat; /* 0x41d0 */
+ u32 usb1_chrg_det_stat_set; /* 0x41d4 */
+ u32 usb1_chrg_det_stat_clr; /* 0x41d8 */
+ u32 usb1_chrg_det_stat_tog; /* 0x41dc */
+ u32 usb1_loopback; /* 0x41e0 */
+ u32 usb1_loopback_set; /* 0x41e4 */
+ u32 usb1_loopback_clr; /* 0x41e8 */
+ u32 usb1_loopback_tog; /* 0x41ec */
+ u32 usb1_misc; /* 0x41f0 */
+ u32 usb1_misc_set; /* 0x41f4 */
+ u32 usb1_misc_clr; /* 0x41f8 */
+ u32 usb1_misc_tog; /* 0x41fc */
+ u32 usb2_vbus_detect; /* 0x4200 */
+ u32 usb2_vbus_detect_set; /* 0x4204 */
+ u32 usb2_vbus_detect_clr; /* 0x4208 */
+ u32 usb2_vbus_detect_tog; /* 0x420c */
+ u32 usb2_chrg_detect; /* 0x4210 */
+ u32 usb2_chrg_detect_set; /* 0x4214 */
+ u32 usb2_chrg_detect_clr; /* 0x4218 */
+ u32 usb2_chrg_detect_tog; /* 0x421c */
+ u32 usb2_vbus_det_stat; /* 0x4220 */
+ u32 usb2_vbus_det_stat_set; /* 0x4224 */
Re: [U-Boot] [PATCH] ARM: move -march=* and -mtune= options to arch/arm/Makefile
On Tuesday, February 10, 2015 at 11:52:56 AM, Masahiro Yamada wrote: My main motivation for this commit: [1] Follow the arch/arm/Makefile style of Linux Kernel [2] Maintain compiler options systematically Currently, we give -march=* and -mtune=* options inconsistently: Only some of the CPUs pass -march=* and -mtune=* options. By collecting flags into the arch/arm/Makefile, we can tell which options are missing at a glance. [3] Prepare for deprecating arch/*/cpu/*/config.mk Note: This commit just moves the compiler options so as not to change the behavior at all. It does not care the correctness of the given options. Fox example, -march=armv5te might be better than -march=armv4 for ARM946EJS, but it is beyond the scope this commit. Also, filling the missing -march=* and -tune=* is left to follow-up patches. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Very nice, Acked-by: Marek Vasut ma...@denx.de Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 07/12] imx:mx6 Support LDO bypass
Hi Peng,
On 09/01/2015 09:59, Peng Fan wrote:
The basic graph for voltage input is:
VDDARM_IN --- LDO_DIG(ARM) --- VDD_ARM_CAP
VDDSOC_IN --- LDO_DIG(SOC) --- VDD_SOC_CAP
We can bypass the LDO to save power, if the board already has pmic.
set_anatop_bypass is the function to do the bypass VDDARM and VDDSOC
work.
Current only set VDDARM_IN@1.175V/VDDSOC_IN@1.175V before ldo
bypass switch. So until ldo bypass switch happened, these voltage
setting is set in ldo-enable mode. But in datasheet, we need
1.15V + 125mV = 1.275V for VDDARM_IN. We need to downgrade cpufreq
to 400Mhz and restore after ldo bypass mode switch. So add
prep_anatop_bypass/finish_anatop_bypass/set_arm_freq_400M to do
this work.
LDO bypass is dependent on the flatten device tree file. If speed
grading fuse is for 1.2GHz, enable LDO bypass and setup PMIC voltages.
So add check for 1.2GHz core speed. So add check_1_2G function.
In ldo-bypass mode, we need trigger WDOG_B pin to reset pmic in
ldo-bypass mode. So add set_wdog_reset to do this work.
Also add related function prototype in sys_proto.h
Ok - with this explanation, I would try to understand how the changes
can be split. If the feature/change works for several boards, it makes
sense to have it common and general. If it is only for one board, must
flow into the board directory.
It looks like that ldo-bypass is strictly dependent on the board.
Firstly, it must have PMIC, and not all boards have it. Your last sentence:
In ldo-bypass mode, we need trigger WDOG_B pin to reset pmic in
ldo-bypass mode. So add set_wdog_reset to do this work.
This looks to me as an item very bound to the board. Could it be
possible to use another pin (I do not know the schematics, I remember
that such as reset pin was fix on previous i.MX) ? If answer is yes, can
these changes be used by other board or are they only for sabresd ?
Signed-off-by: Peng Fan peng@freescale.com
Signed-off-by: Robin Gong b38...@freescale.com
Signed-off-by: Nitin Garg nitin.g...@freescale.com
---
arch/arm/cpu/armv7/mx6/soc.c | 141
++
arch/arm/include/asm/arch-mx6/sys_proto.h | 9 ++
2 files changed, 150 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 5f5f497..5d02755 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -18,6 +18,7 @@
#include asm/arch/sys_proto.h
#include asm/imx-common/boot_mode.h
#include asm/imx-common/dma.h
+#include libfdt.h
#include stdbool.h
#include asm/arch/mxc_hdmi.h
#include asm/arch/crm_regs.h
@@ -429,6 +430,146 @@ void s_init(void)
writel(mask528, anatop-pfd_528_clr);
}
+#ifdef CONFIG_LDO_BYPASS_CHECK
+DECLARE_GLOBAL_DATA_PTR;
+static int ldo_bypass;
mmmhhglobal to the module ?
+
+int check_ldo_bypass(void)
+{
+ const int *ldo_mode;
+ int node;
+
+ /* get the right fdt_blob from the global working_fdt */
+ gd-fdt_blob = working_fdt;
+ /* Get the node from FDT for anatop ldo-bypass */
+ node = fdt_node_offset_by_compatible(gd-fdt_blob, -1,
+ fsl,imx6q-gpc);
+ if (node 0) {
+ printf(No gpc device node %d, force to ldo-enable.\n, node);
+ return 0;
+ }
+ ldo_mode = fdt_getprop(gd-fdt_blob, node, fsl,ldo-bypass, NULL);
I am quite lost. I have searched in kernel (current TOT), and I have not
found such property. Can you help me to understand ?
+ /*
+ * return 1 if fsl,ldo-bypass = 1, else return 0 if
+ * fsl,ldo-bypass = 0 or no fsl,ldo-bypass property
+ */
+ ldo_bypass = fdt32_to_cpu(*ldo_mode) == 1 ? 1 : 0;
+
+ return ldo_bypass;
+}
+
+int check_1_2G(void)
+{
+ u32 reg;
+ int result = 0;
+ struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+ struct fuse_bank *bank = ocotp-bank[0];
+ struct fuse_bank0_regs *fuse_bank0 =
+ (struct fuse_bank0_regs *)bank-fuse_regs;
+
+ reg = readl(fuse_bank0-cfg3);
+ if (((reg 16) 0x3) == 0x3) {
+ if (ldo_bypass) {
+ printf(Wrong dtb file used! i.MX6Q@1.2Ghz only works
with ldo-enable mode!\n);
+ /*
+ * Currently, only imx6q-sabresd board might be here,
+ * since only i.MX6Q support 1.2G and only Sabresd board
+ * support ldo-bypass mode. So hardcode here.
+ * You can also modify your board(i.MX6Q) dtb name if it
+ * supports both ldo-bypass and ldo-enable mode.
This enforce my doubts.
+ */
+ printf(Please use imx6q-sabresd-ldo.dtb!\n);
In any case, do not use hard-coded filenames into u-boot. They can change.
+ hang();
+ }
+ result = 1;
+ }
+
+ return result;
+}
+
+static int arm_orig_podf;
Re: [U-Boot] [PATCH] imx: mx6qsabreauto: Change to use common GPMI IO clock function
On 12/01/2015 10:37, Ye.Li wrote: Since a clock function setup_gpmi_io_clk is implemented for GPMI IO clock settings, change to use this common function in GPMI setup. Signed-off-by: Ye.Li b37...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] imx: mx6: Fixed AIPS3 base address issue
On 14/01/2015 10:18, Ye.Li wrote: Should use AIPS3 configuration address 0x0227C000 to set AIPS3, not the AIPS3 base address. Additional, replace AIPS1_BASE_ADDR to AIPS3_ARB_BASE_ADDR to align with AIPS1 and AIPS2, and resolve the AIPS3_ARB_BASE_ADDR undefine problem. Signed-off-by: Ye.Li b37...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] imx: imximage: Add QuadSPI boot support
On 13/01/2015 08:53, Ye.Li wrote: Add QuadSPI boot support to imximage tool. Note: The QuadSPI configuration parameters at offset 0x400 are not included in this patch. Need other tools to generate the parameters part. Signed-off-by: Ye.Li b37...@freescale.com --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] video: Update MXS LCDIF driver for mx6sx
Hi,
On 14/01/2015 10:19, Ye.Li wrote:
Add a new interface mxs_lcd_panel_setup to setup fb parameters and
specifies the LCDIF controller for multiple controllers of iMX6SX.
Pass fb parameters via videomode env remains work if the new interface
is not called before video initialization.
Modify LCDIF clock interface mxs_set_lcdclk to support multiple
LCDIF controllers on iMX6SX.
Signed-off-by: Ye.Li b37...@freescale.com
---
arch/arm/cpu/arm926ejs/mxs/clock.c|4 +-
arch/arm/include/asm/arch-mxs/clock.h |2 +-
drivers/video/mxsfb.c | 57
+++--
include/mxsfb.h | 15 +
4 files changed, 65 insertions(+), 13 deletions(-)
create mode 100644 include/mxsfb.h
diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c
b/arch/arm/cpu/arm926ejs/mxs/clock.c
index e9d8800..ca020ca 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -5,7 +5,7 @@
* on behalf of DENX Software Engineering GmbH
*
* Based on code from LTIB:
- * Copyright (C) 2010 Freescale Semiconductor, Inc.
+ * Copyright (C) 2010-2014 Freescale Semiconductor, Inc.
We have already discussed that there could be problems changing the
Copyright. If changes are done only by Freescale, fine. But as in this
case the file is changed by other authors, it is not correct.
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -309,7 +309,7 @@ void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq)
bus, tgtclk, freq);
}
-void mxs_set_lcdclk(uint32_t freq)
+void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
diff --git a/arch/arm/include/asm/arch-mxs/clock.h
b/arch/arm/include/asm/arch-mxs/clock.h
index fc9d75b..8840335 100644
--- a/arch/arm/include/asm/arch-mxs/clock.h
+++ b/arch/arm/include/asm/arch-mxs/clock.h
@@ -46,7 +46,7 @@ uint32_t mxc_get_clock(enum mxc_clock clk);
void mxs_set_ioclk(enum mxs_ioclock io, uint32_t freq);
void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal);
void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq);
-void mxs_set_lcdclk(uint32_t freq);
+void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq);
/* Compatibility with the FEC Ethernet driver */
#define imx_get_fecclk()mxc_get_clock(MXC_AHB_CLK)
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index 03b0f88..2653862 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -18,6 +18,10 @@
#include asm/imx-common/dma.h
#include videomodes.h
+#include linux/string.h
+#include linux/list.h
+#include linux/fb.h
+
#define PS2KHZ(ps) (10UL / (ps))
@@ -35,6 +39,22 @@ __weak void mxsfb_system_setup(void)
{
}
+static int setup;
+static struct fb_videomode fbmode;
+static int depth;
+
+int mxs_lcd_panel_setup(struct fb_videomode mode, int bpp,
+ uint32_t base_addr)
+{
+ fbmode = mode;
+ depth = bpp;
+ panel.isaBase = base_addr;
+
+ setup = 1;
+
+ return 0;
+}
+
/*
* DENX M28EVK:
* setenv videomode
@@ -50,15 +70,15 @@ __weak void mxsfb_system_setup(void)
static void mxs_lcd_init(GraphicDevice *panel,
struct ctfb_res_modes *mode, int bpp)
{
- struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE;
+ struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)(panel-isaBase);
uint32_t word_len = 0, bus_width = 0;
uint8_t valid_data = 0;
/* Kick in the LCDIF clock */
- mxs_set_lcdclk(PS2KHZ(mode-pixclock));
+ mxs_set_lcdclk(panel-isaBase, PS2KHZ(mode-pixclock));
/* Restart the LCDIF block */
- mxs_reset_block(regs-hw_lcdif_ctrl_reg);
+ mxs_reset_block((struct mxs_register_32 *)regs-hw_lcdif_ctrl);
switch (bpp) {
case 24:
@@ -140,15 +160,32 @@ void *video_hw_init(void)
puts(Video: );
- /* Suck display configuration from videomode variable */
- penv = getenv(videomode);
- if (!penv) {
- puts(MXSFB: 'videomode' variable not set!\n);
- return NULL;
+ if (!setup) {
+
+ /* Suck display configuration from videomode variable */
Suck ??
+ penv = getenv(videomode);
+ if (!penv) {
+ printf(MXSFB: 'videomode' variable not set!\n);
+ return NULL;
+ }
+
+ bpp = video_get_params(mode, penv);
+ panel.isaBase = MXS_LCDIF_BASE;
+ } else {
+ mode.xres = fbmode.xres;
+ mode.yres = fbmode.yres;
+ mode.pixclock = fbmode.pixclock;
+ mode.left_margin = fbmode.left_margin;
+ mode.right_margin = fbmode.right_margin;
+ mode.upper_margin = fbmode.upper_margin;
+
Re: [U-Boot] [PATCH] ARM: move -march=* and -mtune= options to arch/arm/Makefile
On 10.02.2015 11:52, Masahiro Yamada wrote: My main motivation for this commit: [1] Follow the arch/arm/Makefile style of Linux Kernel [2] Maintain compiler options systematically Currently, we give -march=* and -mtune=* options inconsistently: Only some of the CPUs pass -march=* and -mtune=* options. By collecting flags into the arch/arm/Makefile, we can tell which options are missing at a glance. [3] Prepare for deprecating arch/*/cpu/*/config.mk Note: This commit just moves the compiler options so as not to change the behavior at all. It does not care the correctness of the given options. Fox example, -march=armv5te might be better than -march=armv4 for ARM946EJS, but it is beyond the scope this commit. Also, filling the missing -march=* and -tune=* is left to follow-up patches. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Great! Acked-by: Stefan Roese s...@denx.de Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] imx: mx6: Update mx6sx registers and clock functions for display
Hi,
On 14/01/2015 10:19, Ye.Li wrote:
Add clock functions and relevant registers to enable/set LCDIF
clock and LVDS clock.
Signed-off-by: Ye.Li b37...@freescale.com
---
arch/arm/cpu/armv7/mx6/clock.c | 238 +
arch/arm/include/asm/arch-mx6/clock.h|5 +
arch/arm/include/asm/arch-mx6/crm_regs.h | 53 ++-
arch/arm/include/asm/arch-mx6/imx-regs.h | 242
++
4 files changed, 533 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index b6983e6..24b9b95 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -545,6 +545,244 @@ u32 imx_get_fecclk(void)
return mxc_get_clock(MXC_IPG_CLK);
}
+#ifdef CONFIG_MX6SX
+static void enable_lcdif_clock(uint32_t base_addr)
+{
I always find tricky to select a source with the physical address.
Really, you are selecting which LCDIF, and it would make sense to have
something enable_lcdif_clock(uint32_t index), with index [0..1].
+ u32 reg = 0;
+
+ /* Enable the LCDIF pix clock, axi clock, disp axi clock */
+ reg = readl(imx_ccm-CCGR3);
+ if (base_addr == LCDIF1_BASE_ADDR)
+ reg |= (MXC_CCM_CCGR3_LCDIF1_PIX_MASK |
MXC_CCM_CCGR3_DISP_AXI_MASK);
+ else
+ reg |= (MXC_CCM_CCGR3_LCDIF2_PIX_MASK |
MXC_CCM_CCGR3_DISP_AXI_MASK);
+ writel(reg, imx_ccm-CCGR3);
+
+ reg = readl(imx_ccm-CCGR2);
+ reg |= (MXC_CCM_CCGR2_LCD_MASK);
+ writel(reg, imx_ccm-CCGR2);
+}
+
+static void disable_lcdif_clock(uint32_t base_addr)
+{
Same here and in the rest of the patch.
+ u32 reg = 0;
+
+ /* Disable the LCDIF pix clock, axi clock, disp axi clock */
+ reg = readl(imx_ccm-CCGR3);
+ if (base_addr == LCDIF1_BASE_ADDR)
+ reg = ~(MXC_CCM_CCGR3_LCDIF1_PIX_MASK |
MXC_CCM_CCGR3_DISP_AXI_MASK);
+ else
+ reg = ~(MXC_CCM_CCGR3_LCDIF2_PIX_MASK |
MXC_CCM_CCGR3_DISP_AXI_MASK);
+ writel(reg, imx_ccm-CCGR3);
+
+ reg = readl(imx_ccm-CCGR2);
+ reg = ~(MXC_CCM_CCGR2_LCD_MASK);
+ writel(reg, imx_ccm-CCGR2);
+}
+
+
+void setup_lvds_clock(uint32_t lcdif_base)
+{
+ u32 reg = 0;
+ struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
+
+ disable_lcdif_clock(lcdif_base);
+
+ /* Turn off LDB DI0 clocks */
+ reg = readl(imx_ccm-CCGR3);
+ reg = ~MXC_CCM_CCGR3_LDB_DI0_MASK;
+ writel(reg, imx_ccm-CCGR3);
+
+ /* set LDB DI0 clk select to 011 PLL2 PFD3 200M*/
+ reg = readl(imx_ccm-cs2cdr);
+ reg = ~MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK;
+ reg |= (3 MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET);
+ writel(reg, imx_ccm-cs2cdr);
+
+ reg = readl(imx_ccm-cscmr2);
+ reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV;
+ writel(reg, imx_ccm-cscmr2);
+
+ /* set LDB DI0 clock for LCDIF PIX clock */
+ reg = readl(imx_ccm-cscdr2);
+ if (lcdif_base == LCDIF1_BASE_ADDR) {
+ reg = ~MXC_CCM_CSCDR2_LCDIF1_CLK_SEL_MASK;
+ reg |= (0x3 MXC_CCM_CSCDR2_LCDIF1_CLK_SEL_OFFSET);
+ } else {
+ reg = ~MXC_CCM_CSCDR2_LCDIF2_CLK_SEL_MASK;
+ reg |= (0x3 MXC_CCM_CSCDR2_LCDIF2_CLK_SEL_OFFSET);
+ }
+ writel(reg, imx_ccm-cscdr2);
+
+ reg = IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW
+ | IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG
+ | IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT
+ | IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0;
+ writel(reg, iomux-gpr[6]);
+
+ reg = readl(iomux-gpr[5]);
+ if (lcdif_base == LCDIF1_BASE_ADDR)
+ reg = ~0x8; /* MUX LVDS to LCDIF1 */
+ else
+ reg |= 0x8; /* MUX LVDS to LCDIF2 */
+ writel(reg, iomux-gpr[5]);
+
It is more readable if you write this as:
common setup
switch (index) {
case (LCDIF1):
..do for LCDIF1
break;
case (LCDIF2):
..do for LCDIF2
break;
}
...finish setup
+ /* Turn on LDB DI0 clocks */
+ reg = readl(imx_ccm-CCGR3);
+ reg |= MXC_CCM_CCGR3_LDB_DI0_MASK;
+ writel(reg, imx_ccm-CCGR3);
+
+ enable_lcdif_clock(lcdif_base);
+}
+
+void setup_lcdif_clock(uint32_t base_addr)
+{
+ u32 reg = 0;
+
+ /* Disable the lcdif clocks, the driver will enable the lcdif clock */
+ disable_lcdif_clock(base_addr);
+
+ /* Set to pre-mux clock at default */
+ reg = readl(imx_ccm-cscdr2);
+ if (base_addr == LCDIF1_BASE_ADDR)
+ reg = ~MXC_CCM_CSCDR2_LCDIF1_CLK_SEL_MASK;
+ else
+ reg = ~MXC_CCM_CSCDR2_LCDIF2_CLK_SEL_MASK;
+ writel(reg, imx_ccm-cscdr2);
+}
+
+static int enable_pll_video(u32 pll_div, u32 pll_num, u32 pll_denom)
+{
+ u32 reg = 0;
+ ulong start;
+
+ debug(pll5 div = %d, num = %d, denom = %d\n,
+ pll_div, pll_num, pll_denom);
+
+ /* Power up PLL5 video */
+ writel(BM_ANADIG_PLL_VIDEO_POWERDOWN |
Re: [U-Boot] [PATCH] arm: support Thumb-1 with CONFIG_SYS_THUMB_BUILD
Hi Albert,
On 01.02.2015 03:55, Albert ARIBAUD wrote:
When building a THumb-1-only target with CONFIG_SYS_THUMB_BUILD,
some files fail to build, most of the time because they include
mcr instructions, which only exist for Thumb-2.
Thos patch introduces a Kconfig option CONFIG_THUMB2 and uses
it to select between Thumb-2 and ARM mode for the aforementioned
files.
This code has been build-tested and run-tested on ED Mini V2,
both with U-Boot and SPL.
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
Thanks. This helped me to get Thumb-1 working on the x600 (SPEAr600
with ARM926EJS). Where I some size constraints. So for this patch:
Tested-by: Stefan Roese s...@denx.de
But I have another Thumb-1 related problem. I'm also including UBIFS
in my board. And this results in these errors:
{standard input}: Assembler messages:
{standard input}:695: Error: selected processor does not support Thumb mode
`mrs r2,cpsr'
{standard input}:696: Error: unshifted register required -- `orr r1,r2,#128'
{standard input}:697: Error: selected processor does not support Thumb mode
`msr cpsr_c,r1'
{standard input}:711: Error: selected processor does not support Thumb mode
`msr cpsr_c,r2'
{standard input}:766: Error: selected processor does not support Thumb mode
`mrs r2,cpsr'
{standard input}:767: Error: unshifted register required -- `orr r4,r2,#128'
{standard input}:768: Error: selected processor does not support Thumb mode
`msr cpsr_c,r4'
{standard input}:782: Error: selected processor does not support Thumb mode
`msr cpsr_c,r2'
make[2]: *** [fs/ubifs/super.o] Error 1
...
This is because the UBIFS code uses the atomic_foo() functions
and the bitops functions. Which call the local_irq_foo() functions.
And these include the msr/mrs instructions, which seem to be
unsupported in Thumb-1, similar to the mcr instruction.
I've solved this problem by adding these lines to the UBIFS
Makefile:
+# some files can only build in ARM or THUMB2, not THUMB1
+ifdef CONFIG_SYS_THUMB_BUILD
+ifndef CONFIG_HAS_THUMB2
+CFLAGS_lpt.o := -marm
+CFLAGS_lpt_commit.o := -marm
+CFLAGS_super.o := -marm
+CFLAGS_tnc.o := -marm
+CFLAGS_tnc_misc.o := -marm
+endif
+endif
But I'm not really happy with this solution.
Another option would be to remove all the irq_off/_on stuff from
the atomic_foo() and the bitops functions. We are running in a
single-threaded environment after all in U-Boot. So there should
be no need for such synch mechanisms. But these files are copied
from Linux. And I really don't like to make changes to these files.
And ideas / comments welcome.
BTW: You can easily test this on your ED Mini board as well by
enabling UBI UBIFS support. Then you also should see those errors.
Thanks,
Stefan
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Re: [U-Boot] [PATCH] odroid: update link to X2/U3 proprietary binaries
Hello Tobias, On 02/01/2015 07:53 PM, Tobias Jakobi wrote: The old link was dead. Link to the Github repository which is probably a more long-term solution. --- doc/README.odroid | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/README.odroid b/doc/README.odroid index 528bb95..cc85348 100644 --- a/doc/README.odroid +++ b/doc/README.odroid @@ -19,7 +19,7 @@ iROM-BL1-(BL2 + TrustZone)-U-BOOT This version of U-BOOT doesn't implement SPL but it is required(BL2) and can be found in boot.tar.gz from here: -http://dev.odroid.com/projects/4412boot/wiki/FrontPage?action=downloadvalue=boot.tar.gz +https://github.com/hardkernel/u-boot/tree/odroid-v2010.12/sd_fuse or here: http://odroid.in/guides/ubuntu-lfs/boot.tar.gz -- 2.0.5 I checked the old link, and it is fine. So maybe the link was dead only for a while? Please add an alternative instead of removing the working one. Best regards, -- Przemyslaw Marczak Samsung RD Institute Poland Samsung Electronics p.marc...@samsung.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/19] powerpc: Introduce device tree control and driver model
Hi Simon, On 10.02.2015 17:35, Simon Glass wrote: On 7 February 2015 at 11:51, Simon Glass s...@chromium.org wrote: This series does a small amount of tweaking to support device tree control (CONFIG_OF_CONTROL) on PowerPC platforms. It also adds support for driver model. In both cases the main effort is to set things up correctly before calling board_init_f(). A new generic function, board_init_f_mem() is introduced. This does the various memory calculations in C code, since they are messy in assembler and every architecture should in fact be the same. A later series will adjust ARM and x86 to use this function. As an example, the Canyonlands boards are converted over to use device tree control and driver model for their serial console. It should be fairly straightforward to convert over other boards. Changes in v2: - Reduce reserved stack space for board_init_f_mem() to 64 bytes - Add SYS_MALLOC_F to Kconfig I'm trying to catch up on a few things I haven't got to. If it suits I can apply this to u-boot-dm since it is a driver-model-enablement series and Stefan has tested it. OK unless I hear any screams I'm going ahead with that plan this week. Yes, please go ahead. Lazy people (like me) tend to only scream when really forced to test the latest and greatest stuff. ;) Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] imx: don't clobber reset cause
On 10 Feb 2015, eric.nel...@boundarydevices.com wrote: I posted a couple of additional options and received no comment from you. Neither of them works as-is because of the ordering of events (print_cpuinfo() is called before restoring the environment), so your suggestion would require an additional call at startup which currently doesn't exist across i.MX boards. The primary argument against the original patch was that bits **could** accumulate. In practice, I believe this to be a bit of a red herring, since two bits cover essentially all of the normal conditions: bit 0 - power on bit 4 - watchdog Yes, the normal case is easy. Odd things can happen during software development. We both agree you could miss something; maybe only whether that is important is not clear. People using the CSU to protect errant memory writes to disabled peripherals might be useful. From the imx6 RM, Software has to take care to clear this register by writing one after every reset that occurs so that the register will contain the information of recently occurred reset. The watchdog flag is set with reboot under Linux and reset in U-Boot, so we could re-work the switch statement to do the right thing. In fact, it appears broken now because it has 0x11 displaying POR, when I believe that should be WDOG. I am pretty sure that the register is full of garbage on a 'POR', so the 'POR' bit overrides everything; at least on the Vybrid. This is why it is important to clear the bits. The imx6DL-RM seems to say the same, When the system comes out of reset, this register will have bits set corresponding to all the reset sources that occurred during system reset. Other bits could conceivably accumulate, but I don't see the value of worrying about cases like JTAG_RESET. The reason we're pursuing this at all is because we'd like to know the difference between a restart caused by power interruption and a system lockup, and we'd like to do this under Linux or Windows Embedded. Please don't mis-understand. I see value in what you are trying to accomplish. I just want to make sure the information that gets reported is robust and correct. It would probably be nice if the Vybrid followed the same pattern; but maybe they are different? From reading the RMs they seem the same. Regards, Bill Pringlemeir. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mtd: nand: mxs: fix PIO_WORD number
On Tuesday, February 10, 2015 at 04:18:12 PM, Luca Ellero wrote: On 10/02/2015 14:14, Stefano Babic wrote: Hi Luca, On 16/12/2014 09:06, Luca Ellero wrote: Scheduling the patch for -next it's ok for me. However there are other two points where pio_words number doesn't reflect the pio_words really initiated, one is in mxs_nand_read_buf() and one is in mxs_nand_write_buf(). Each one declares 4 pio_words but only one is initiated. I wonder what we should do in this cases. You can fix those as well. I recall that all this goop came from the original (2.6.35) GPMI NAND driver, which is likely where all those bugs came from as well. Thank you! OK, I will send a patch to fix them. Do you plan to send a V2 patch for fixing all the issues at once ? Best regards, Stefano Babic Hi Stefano, yes, I can send a patch with all the fixes, that's fine. I plan to send it tomorrow. Thank you :) Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH 0/7] RFC: dm: Add USB support
On Tuesday, February 10, 2015 at 06:28:30 AM, Simon Glass wrote: Hi Marek, Hi! [...] Hi! I'll look at this by the end of next week, I will be free by then. It's not possible for me to do it earlier, sorry. Does this still work for you please? Definitely, that sounds good. I was planning to leave it a week or two anyway, although I might fiddle more with the sandbox side in the meantime. I skimmed through the series finally, it looks mostly good for but a few minor coding style things. I would prefer if this went in for the next MW, what do you think please ? Sounds good, hopefully we can bring in wider driver support too. I'd like to get this lot in before thinking too hard about how to deal with actual devices! Maybe we can target getting this series cleaned up and into u-boot-dm/next by end of Feb? I'll be happy to see it there, yes. Thank you! Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] net: phy: Add ability to program the ksz9031 skew values from the uboot env
On Monday, February 09, 2015 at 10:31:42 PM, Vince Bridgers wrote: Hi Marek! Hi Vince! We already do this kind of a programming in board/altera/socfpga/socfpga.c in board_phy_config(), don't we ? Yes, good point. This patch series is a first in some upcoming patches to make this better. The Linux implementation uses devicetree settings to set the skews, so if we were to follow that same model the code in socfpga.c would become deprecated in favor of setting the skews through the phy driver and subsequently removed. That way other users could take advantage of this through devicetree. Setting the skews in DT would indeed be preferable in my opinion. The other problem with the current implementation is the skew values are part specific - we set the actual register values in the environment when it would be better to use a skewed time value (in +/- picoseconds). You mean they are specific for particular PHY model ? Or board model ? Or even particular board itself ? Also, see [1], once I apply this, the DT support (not DM) for SoCFPGA will become mandatory. Won't it make more sense to pull these values from the DT instead of poluting the board environment with those please ? I agree it would make more sense to pull these from devicetree - I'm planning on adding that in a future patch. I thought it would be a good idea to pull these values from the environment first, overriding the devicetree (if present in the environment). This approach is helpful during bringup debug since it doesn't require one to change the devicetree to try something quickly. I'm ok with any approach you think would work for the community. You can do that with the 'mii' command as well I think, but I might be wrong. I'm ok with whatever the community decides considering my rationale above. +CC Stefan and Pavel, please comment. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 08/10] arm: socfpga: Add Altera Arria V DK support
On Tuesday, February 10, 2015 at 06:53:19 AM, Stefan Roese wrote: On 09.02.2015 20:09, Marek Vasut wrote: On Monday, February 02, 2015 at 08:47:52 AM, Stefan Roese wrote: On 30.01.2015 23:08, Marek Vasut wrote: Add support for the Altera Arria V development kit. Signed-off-by: Marek Vasut ma...@denx.de Cc: Chin Liang See cl...@opensource.altera.com Cc: Dinh Nguyen dingu...@opensource.altera.com Cc: Pavel Machek pa...@denx.de Cc: Stefan Roese s...@denx.de Cc: Vince Bridgers vbrid...@opensource.altera.com --- [...] +/* The rest of the configuration is shared */ +#include configs/socfpga_common.h + +#endif /* __CONFIG_SOCFPGA_ARRIA5_H__ */ Without really diff'ing this file with socfpga_cyclone5.h, I'm pretty sure that they share many lines. Wouldn't it make sense to move those common defines / configs to a common file instead (socfpga_common.h)? Hi! I agree they share a lot, but I would not recommend moving any of this into socfpga_common.h . Not all boards which include socfpga_common.h will want all that's common between socfpga_cyclone5.h and socfpga_arria5.h as well. We need to switch to DM really soon, since without DM, we cannot really make any common configuration. The socfpga_cyclone5.h file in fact represents a configuration for SoCDK with Cyclone 5, same for Arria 5. Unless you have any suggestion, I'd just apply this stuff as is for now with the note that these config files must be cleaned up once DM is in place. Or do you have any suggestions please ? No. Please go ahead with this series. We can merge stuff later as well. Once we have better view on how this multi-board support for SoCFPGA will really end up. Yeah, I'm kinda tempted to merge it as-is, but I wanted to collect more feedback, since this was a discussed change. Thanks! Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 08/10] arm: socfpga: Add Altera Arria V DK support
On Tuesday, February 10, 2015 at 11:29:32 AM, Pavel Machek wrote: On Mon 2015-02-09 20:09:50, Marek Vasut wrote: On Monday, February 02, 2015 at 08:47:52 AM, Stefan Roese wrote: On 30.01.2015 23:08, Marek Vasut wrote: Add support for the Altera Arria V development kit. Signed-off-by: Marek Vasut ma...@denx.de Cc: Chin Liang See cl...@opensource.altera.com Cc: Dinh Nguyen dingu...@opensource.altera.com Cc: Pavel Machek pa...@denx.de Cc: Stefan Roese s...@denx.de Cc: Vince Bridgers vbrid...@opensource.altera.com --- [...] +/* The rest of the configuration is shared */ +#include configs/socfpga_common.h + +#endif /* __CONFIG_SOCFPGA_ARRIA5_H__ */ Without really diff'ing this file with socfpga_cyclone5.h, I'm pretty sure that they share many lines. Wouldn't it make sense to move those common defines / configs to a common file instead (socfpga_common.h)? Hi! I agree they share a lot, but I would not recommend moving any of this into socfpga_common.h . Not all boards which include socfpga_common.h will want all that's common between socfpga_cyclone5.h and socfpga_arria5.h as well. We need to switch to DM really soon, since without DM, we cannot really make any common configuration. The socfpga_cyclone5.h file in fact represents a configuration for SoCDK with Cyclone 5, same for Arria 5. Unless you have any suggestion, I'd just apply this stuff as is for now with the note that these config files must be cleaned up once DM is in place. Or do you have any suggestions please ? Could we simply have socfpga_common_5.h which stuff that is shared between cyclone and arrira? Hi! I think we can improve this later. In the end, the structure should be either the way DTs are structured in kernel OR we should have just one single config for all SoCFPGA boards. The later is of course preferred. For now, I'm tempted to apply this as-is so we at least have the groundwork in place and can move on from that. What do you say ? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 5/5] Make export interface support CONFIG_SYS_MALLOC_SIMPLE
When CONFIG_SYS_MALLOC_SIMPLE is defined, free() is a static inline. Make sure that the export interface still builds in this case. Signed-off-by: Simon Glass s...@chromium.org --- Changes in v4: - Add new patch to make the export interface support CONFIG_SYS_MALLOC_SIMPLE Changes in v3: None Changes in v2: None include/_exports.h | 2 ++ include/exports.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/include/_exports.h b/include/_exports.h index 5944703..279017e 100644 --- a/include/_exports.h +++ b/include/_exports.h @@ -23,7 +23,9 @@ EXPORT_FUNC(dummy, void, free_hdlr, void) #endif EXPORT_FUNC(malloc, void *, malloc, size_t) +#ifndef CONFIG_SYS_MALLOC_SIMPLE EXPORT_FUNC(free, void, free, void *) +#endif EXPORT_FUNC(udelay, void, udelay, unsigned long) EXPORT_FUNC(get_timer, unsigned long, get_timer, unsigned long) EXPORT_FUNC(vprintf, int, vprintf, const char *, va_list) diff --git a/include/exports.h b/include/exports.h index 205affe..1a01e43 100644 --- a/include/exports.h +++ b/include/exports.h @@ -15,7 +15,9 @@ int printf(const char* fmt, ...); void install_hdlr(int, interrupt_handler_t, void*); void free_hdlr(int); void *malloc(size_t); +#ifndef CONFIG_SYS_MALLOC_SIMPLE void free(void*); +#endif void __udelay(unsigned long); unsigned long get_timer(unsigned long); int vprintf(const char *, va_list); -- 2.2.0.rc0.207.ga3a616c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 1/5] arm: Reduce the scope of lowlevel_init()
This function has grown into something of a monster. Some boards are setting
up a console and DRAM here in SPL. This requires global_data which should be
set up in one place (crt0.S).
There is no need for SPL to use s_init() for anything since board_init_f()
is called immediately afterwards.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/armv7/lowlevel_init.S | 23 +--
1 file changed, 13 insertions(+), 10 deletions(-)
diff --git a/arch/arm/cpu/armv7/lowlevel_init.S
b/arch/arm/cpu/armv7/lowlevel_init.S
index f1aea05..4803150 100644
--- a/arch/arm/cpu/armv7/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/lowlevel_init.S
@@ -17,24 +17,27 @@
ENTRY(lowlevel_init)
/*
-* Setup a temporary stack
+* Setup a temporary stack. Global data is not available yet.
*/
ldr sp, =CONFIG_SYS_INIT_SP_ADDR
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-#ifdef CONFIG_SPL_BUILD
- ldr r9, =gdata
-#else
- sub sp, sp, #GD_SIZE
- bic sp, sp, #7
- mov r9, sp
-#endif
+ mov r9, #0
/*
* Save the old lr(passed in ip) and the current lr to stack
*/
push{ip, lr}
/*
-* go setup pll, mux, memory
+* Call the very early init function. This should do only the
+* absolute bare minimum to get started. It should not:
+*
+* - set up DRAM
+* - use global_data
+* - clear BSS
+* - try to start a console
+*
+* For boards with SPL this should be empty since SPL can do all of
+* this init in the SPL board_init_f() function which is called
+* immediately after this.
*/
bl s_init
pop {ip, pc}
--
2.2.0.rc0.207.ga3a616c
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[U-Boot] [PATCH v4 2/5] arm: spl: Avoid setting up a duplicate global data structure
This is already set up in crt0.S. We don't need a new structure and don't
really want one in the 'data' section of the image, since it will be empty
and crt0.S's changes will be ignored.
As an interim measure, remove it only if CONFIG_DM is not defined. This
allows us to press ahead with driver model in SPL and allow the stragglers
to catch up.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v4:
- Squash the gdata revert patch into this one
- Allow gdata to survive unless CONFIG_DM is defined, for now
Changes in v3: None
Changes in v2:
- Remove gdata definition from ARM spl header file also
arch/arm/include/asm/spl.h | 2 ++
arch/arm/lib/spl.c | 4
2 files changed, 6 insertions(+)
diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h
index 8acd7cd..a6fdcf0 100644
--- a/arch/arm/include/asm/spl.h
+++ b/arch/arm/include/asm/spl.h
@@ -33,6 +33,8 @@ enum {
/* Linker symbols. */
extern char __bss_start[], __bss_end[];
+#ifndef CONFIG_DM
extern gd_t gdata;
+#endif
#endif
diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c
index c41850a..bd8c7d2 100644
--- a/arch/arm/lib/spl.c
+++ b/arch/arm/lib/spl.c
@@ -13,6 +13,7 @@
#include image.h
#include linux/compiler.h
+#ifndef CONFIG_DM
/* Pointer to as well as the global data structure for SPL */
DECLARE_GLOBAL_DATA_PTR;
@@ -21,6 +22,7 @@ DECLARE_GLOBAL_DATA_PTR;
* pafches that rely on it. The global_data area is set up in crt0.S.
*/
gd_t gdata __attribute__ ((section(.data)));
+#endif
/*
* In the context of SPL, board_init_f must ensure that any clocks/etc for
@@ -33,8 +35,10 @@ void __weak board_init_f(ulong dummy)
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
+#ifndef CONFIG_DM
/* TODO: Remove settings of the global data pointer here */
gd = gdata;
+#endif
board_init_r(NULL, 0);
}
--
2.2.0.rc0.207.ga3a616c
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Re: [U-Boot] [PATCH v1 1/1] usb: gadget: fastboot: Add fastboot erase
Hi, Dileep
On 15-02-10 12:49 AM, Dileep Katta wrote:
Adds the fastboot erase functionality, to erase a partition
specified by name. The erase is performed based on erase group size,
to avoid erasing other partitions. The start address and the size
is aligned to the erase group size for this.
Currently only supports erasing from eMMC.
Signed-off-by: Dileep Katta dileep.ka...@linaro.org
---
Note: The changes are on top of oem command support added by r...@kernel.org
common/fb_mmc.c | 58 +
drivers/usb/gadget/f_fastboot.c | 23
include/fb_mmc.h| 1 +
3 files changed, 82 insertions(+)
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 6ea3938..3911989 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -10,6 +10,7 @@
#include part.h
#include aboot.h
#include sparse_format.h
+#include mmc.h
#ifndef CONFIG_FASTBOOT_GPT_NAME
#define CONFIG_FASTBOOT_GPT_NAME GPT_ENTRY_NAME
@@ -110,3 +111,60 @@ void fb_mmc_flash_write(const char *cmd, void
*download_buffer,
write_raw_image(dev_desc, info, cmd, download_buffer,
download_bytes);
}
+
+void fb_mmc_erase(const char *cmd, char *response)
+{
+ int ret;
+ block_dev_desc_t *dev_desc;
+ disk_partition_t info;
+ lbaint_t blks, blks_start, blks_size, grp_size;
+ struct mmc *mmc = find_mmc_device(CONFIG_FASTBOOT_FLASH_MMC_DEV);
+
+ if (mmc == NULL) {
+ error(invalid mmc device\n);
no newline with error()
+ fastboot_fail(invalid mmc device);
+ return;
+ }
+
+ /* initialize the response buffer */
+ response_str = response;
+
+ dev_desc = get_dev(mmc, CONFIG_FASTBOOT_FLASH_MMC_DEV);
+ if (!dev_desc || dev_desc-type == DEV_TYPE_UNKNOWN) {
+ error(invalid mmc device\n);
no newline with error()
+ fastboot_fail(invalid mmc device);
+ return;
+ }
+
+ ret = get_partition_info_efi_by_name(dev_desc, cmd, info);
+ if (ret) {
+ error(cannot find partition: '%s'\n, cmd);
no newline with error()
+ fastboot_fail(cannot find partition);
+ return;
+ }
+
+ puts(Erasing partition\n);
+
+ /* Align blocks to erase group size to avoid erasing other partitions */
+ grp_size = mmc-erase_grp_size;
+ blks_start = (info.start + grp_size - 1) ~(grp_size - 1);
+ if (info.size = grp_size)
+ blks_size = (info.size - (blks_start - info.start))
+ (~(grp_size - 1));
+ else
+ blks_size = 0;
Is this logic correct??? Isn't the erase_grp_size in bytes? and the
info.start info.size in LBA's?
+
+ printf(Erasing blocks LBAFU to LBAFU due to alignment\n,
+ blks_start, blks_start + blks_size);
+
+ blks = dev_desc-block_erase(dev_desc-dev, blks_start, blks_size);
+ if (blks != blks_size) {
+ error(failed erasing from device %d\n, dev_desc-dev);
no newline with error()
+ fastboot_fail(failed erasing from device);
+ return;
+ }
+
+ printf( erased LBAFU bytes from '%s'\n,
+ blks_size * info.blksz, cmd);
+ fastboot_okay();
+}
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index f7d84bf..a8d8205 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -535,6 +535,26 @@ static void cb_oem(struct usb_ep *ep, struct usb_request
*req)
}
}
+static void cb_erase(struct usb_ep *ep, struct usb_request *req)
+{
+ char *cmd = req-buf;
+ char response[RESPONSE_LEN];
+
+ strsep(cmd, :);
+ if (!cmd) {
+ error(missing partition name\n);
no newline with error()
+ fastboot_tx_write_str(FAILmissing partition name);
+ return;
+ }
+
+ strcpy(response, FAILno flash device defined);
+
+#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
+ fb_mmc_erase(cmd, response);
+#endif
+ fastboot_tx_write_str(response);
+}
+
struct cmd_dispatch_info {
char *cmd;
void (*cb)(struct usb_ep *ep, struct usb_request *req);
@@ -566,6 +586,9 @@ static const struct cmd_dispatch_info cmd_dispatch_info[] =
{
{
.cmd = oem,
.cb = cb_oem,
+ }, {
+ .cmd = erase,
+ .cb = cb_erase,
},
};
diff --git a/include/fb_mmc.h b/include/fb_mmc.h
index 1ad1d13..402ba9b 100644
--- a/include/fb_mmc.h
+++ b/include/fb_mmc.h
@@ -6,3 +6,4 @@
void fb_mmc_flash_write(const char *cmd, void *download_buffer,
unsigned int download_bytes, char *response);
+void fb_mmc_erase(const char *cmd, char *response);
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