Re: [U-Boot] [PATCH] Vexpress64: Fix the compiling error when CONFIG_ARMV8_MULTIENTRY defined
-Original Messages- From: Linus Walleij linus.wall...@linaro.org Sent Time: 2015-03-10 18:08:03 (Tuesday) To: David Feng feng...@phytium.com.cn Cc: U-Boot Mailing List u-boot@lists.denx.de, Tom Rini tr...@ti.com, Albert ARIBAUD albert.u.b...@aribaud.net Subject: Re: [PATCH] Vexpress64: Fix the compiling error when CONFIG_ARMV8_MULTIENTRY defined On Tue, Mar 10, 2015 at 3:08 AM, feng...@phytium.com.cn wrote: From: David Feng feng...@phytium.com.cn CPU_RELEASE_ADDR should be defined when CONFIG_ARMV8_MULTIENTRY is used. Signed-off-by: David Feng feng...@phytium.com.cn As asked earlier: how can I test this with FVP or the base model? I usually use Foundation Model. I'm very interested in doing this as I guess it involves starting U-Boot at EL3 on bare metal and I really want to try this. +/* SMP Spin Table Definitions */ +#ifdef CONFIG_BASE_FVP +#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f0) +#else +#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) +#endif Where are these address defines coming from? It's just hard coded and should be the same value with that in DTS. Do these spin tables exist in a standard ARM FVP or base model? I get the impression that a secondary operating system is being booted on the secondary CPU at one of these addresses, but why is it running at these addresses specifically, and is that something coming with these simulators, or is it some image that is loaded on the side, that the community does not have access to? PSCI is not implemented in uboot-armv8. If booting u-boot on bare-metal only spin table can be used. All we do is describing booting method(spin table) and cpu release address in DTS. Linux kernel get cpu release address from DTS also. Yours, David. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V6 07/11] ARM: OMAP3: Get rid of omap3_gp_romcode_call and replace with omap_smc1
On Wed, Mar 11, 2015 at 10:53:41AM -0500, Nishanth Menon wrote: On Wed, Mar 11, 2015 at 10:48 AM, Tom Rini tr...@konsulko.com wrote: On Mon, Mar 09, 2015 at 05:12:05PM -0500, Nishanth Menon wrote: omap_smc1 is now generic enough to remove duplicate omap3_gp_romcode_call logic that omap3 introduced. As part of this change, move to using the generic lowlevel_init.S for omap3 as well. Signed-off-by: Nishanth Menon n...@ti.com Reviewed-by: Tom Rini tr...@konsulko.com But I've always wondered, does OMAP3 not actually pass in the same info in the same location / manner as OMAP4 and later? For smc call, the calls are similar, but the parameters change Right, sorry but I mean for boot params as that's what's still being omap3-specific in lowlevel_init.S -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mmc: fsl_esdhc fix register offset
On Wed, 2015-03-11 at 15:55 +0200, Pantelis Antoniou wrote: Hi Peng, On Mar 11, 2015, at 04:17 , Peng Fan peng@freescale.com wrote: Hi, Marek On 3/11/2015 10:03 AM, Marek Vasut wrote: On Wednesday, March 11, 2015 at 01:58:37 AM, Peng Fan wrote: Hi, Marek Hi! On 3/10/2015 9:45 PM, Marek Vasut wrote: On Tuesday, March 10, 2015 at 08:35:46 AM, Peng Fan wrote: Commit f022d36e8a4517b2a9d25ff2d75bd2459d0c68b1 introduces error register offset. Change the char reserved3[59] to char reserved3[56]. Signed-off-by: Peng Fan peng@freescale.com This should probably be applied to 2015.04 . What are the symptoms of this bug please ? I just found the reserved3 size is wrong, did not do test. From the driver, only the entry 'scr' of fsl_esdhc below reserved3 is used, so the offset of scr is wrong if using `char reserved3[59]` Uh, is the patch tested at all on real hardware ? Still not test on real hardware. From commit f022d36e8a4517b2a9d25ff2d75bd2459d0c68b1, uintadsaddr;/* ADMA system address register */ - charreserved2[160]; /* reserved */ + charreserved2[100]; /* reserved */ + uintvendorspec; /* Vendor Specific register */ + charreserved3[59]; /* reserved */ uinthostver;/* Host controller version register */ It's clear that 160 bytes does not equal with (100 + 4 + 59)bytes. Best regards, Marek Vasut Regards, Peng. Although I agree with fixing this, I’m kinda scared about how fragile structs for describing hardware registers are. But we’re stuck with it I guess. Without this patch my emmc (T1042)is broken beyond repair, please commit. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] 4K padding of ARM DT blob
Hi. 2015-03-12 15:46 GMT+09:00 Yehuda Yitschak yehu...@marvell.com: Hey Simon Thanks for the clarification Just out of curiosity, how can the padding help modify the FDT in u-boot ? If you insert a new node/property, or change a property for a longer value, the FDT blob will get longer. So, you need some extra space for modification. Otherwise, the U-Boot image will be overritten in case of CONFIG_OF_EMBED. But, as Simon said, U-Boot never modifies a FDT that is used to configure U-Boot itself. Just in case, let me add a little more explanation: What is confusing is, U-Boot can modify a FDT that is passed to the kernel. U-Boot can have two different instances of FDTs: one for configuring U-Boot and the other for configuring Linux. We are talking about the former in this thread. Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] MinnowBoard Max uboot
Hi Tom, On 10 March 2015 at 05:24, Beaman, Thomas thomas.bea...@xerox.com wrote: Hi Simon, Do you know what will be the timeframe of when someone may be able to look at this in more detail. I will be able to help test any updates if needed I will take a look once I have things lined up for the next release, likely mid April. Regards, Simon Thanks, Tom -Original Message- From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass Sent: Monday, March 09, 2015 11:49 AM To: Beaman, Thomas Cc: u-boot@lists.denx.de; Bin Meng; gabriel huau Subject: Re: MinnowBoard Max uboot +Bin and Gabriel Hi Tom, On 9 March 2015 at 08:08, Beaman, Thomas thomas.bea...@xerox.com wrote: Hi Simon, I see you have put support for the MinnowBoard Max in the u-boot mainline. Thanks this is a very useful addition. I have been able to follow your readme and build a working bare metal uboot. Using the built uboot I can load and bring up a Linux Kernel. What I noticed from the running kernel is that only one of the two cores on the E3825 is running. In the power PC uboots I usually see a section for the multiple cores in the .dts file. My questions is how do I get both CPUs running on this board. Is it a uboot .dts file setup that will enable this, or is something in the kernel start up that does this. As a test I boot the same kernel using the EFI BIOS on the minnow board and both CPUs are running. Any suggestions or comments you have would be welcomed. My guess is that the LAPIC CPU start-up is missing. It isn't 100% clear what the FSP does and does not do, but perhaps it does not do that. I did make something of a start on this with ivybridge but it isn't complete, and it seems to be needed here. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix
On Wed, 2015-03-11 at 08:56 +, Ian Campbell wrote: On Mon, 2015-03-09 at 08:00 +0100, Jan Kiszka wrote: Changes in v4: - rebased over master - implemented psci_get_cpu_id as weak function - implemented psci_disable/enable_smp as weak functions - adjusted register interface of psci_get_cpu_stack_top This version (+ the non-cached memory init fix) can also be found at https://github.com/siemens/u-boot/tree/jetson-tk1-v5. Tested-by: Ian Campbell i...@hellion.org.uk ... that was on Jetson. I've now tested it on sunxi (Cubietruck) too. Ian. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] common/board_f.c: Enable IMX watchdog in init_func_watchdog_init()
Hello Stefan, Am 10.03.2015 08:04, schrieb Stefan Roese: Without this patch, the IMX watchdog will not be initialized. And therefor not active. This patch fixes this by calling hw_watchdog_init() also when CONFIG_IMX_WATCHDOG is defined. Signed-off-by: Stefan Roese s...@denx.de Cc: Simon Glass s...@chromium.org Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sba...@denx.de Cc: Heiko Schocher h...@denx.de --- v2: - Move closing parenthesis to include all || parts common/board_f.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) Thanks! Acked-by: Heiko Schocher h...@denx.de bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 08/14] virt-dt: Allow reservation of secure region when in a RAM carveout
On Wed, Mar 11, 2015 at 11:12:25AM -0400, Tom Rini wrote: * PGP Signed by an unknown key On Mon, Mar 09, 2015 at 08:00:18AM +0100, Jan Kiszka wrote: In this case the secure code lives in RAM, and hence the memory node in the device tree needs to be adjusted. This avoids that the OS will map and possibly access the reservation. Add support for setting CONFIG_ARMV7_SECURE_RESERVE_SIZE to carve out such a region. We only support cutting off memory from the beginning or the end of a RAM bank as we do not want to increase their number (which would happen if punching a hole) for simplicity reasons This will be used in a subsequent patch for Jetson-TK1. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- arch/arm/cpu/armv7/virt-dt.c | 29 + My concern here is that this looks a lot like things we would re-use on armv8 and we're making them potentially needlessly v7-centric. If nothing else, the function names should be generic and this be the v7 implementation of them, yes? In my opinion it's fine to go along with this and then refactor things once we have an ARMv8 board that makes use of this. Thierry pgpEzHOJboZau.pgp Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] mx6_common: Do not select esdhc DDR mode for all boards
On 12.03.2015 02:52, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE should be selected only by boards that really have a DDR-capable eMMC, so remove this option from common code to avoid regressions. Reported-by: Stefan Roese s...@denx.de Signed-off-by: Fabio Estevam fabio.este...@freescale.com These 2 patches fix this DDR issue on my board. So: Tested-by: Stefan Roese s...@denx.de Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-tegra.git/master
On Tue, Mar 10, 2015 at 07:12:29PM -0700, Tom Warren wrote: Thanks, Tom. Should I send future PRs to you instead of Albert? Yeah, and CC the list as always. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] autoboot.c: Add feature to stop autobooting via SHA256 encrypted password
Hi Tom, On 11.03.2015 15:36, Tom Rini wrote: On Wed, Mar 11, 2015 at 09:51:37AM +0100, Stefan Roese wrote: This patch adds the feature to only stop the autobooting, and therefor boot into the U-Boot prompt, when the input string / password matches a values that is encypted via a SHA256 hash and saved in the environment. This feature is enabled by defined these config options: CONFIG_AUTOBOOT_KEYED CONFIG_AUTOBOOT_STOP_STR_SHA256 Signed-off-by: Stefan Roese s...@denx.de This is certainly interesting but I think brings us back to a point Simon made a long while back about needing to factor out this code better. Especially since this adds big long #if-#else-#endif blocks. Can we re-do this so at least have some functions be called out instead? Yes, I'll try to rework this patch a bit to make this feature integration less ugly. Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd_led: Extend led command to support blinking and more leds
On Wed, Mar 11, 2015 at 09:51:39AM +0100, Stefan Roese wrote: This patch extends the U-Boot led command to support automatic blinking by setting a blink frequency in milliseconds. Additionally the number of supported LEDs is increased to 6 (0...5). This will be used by the PCA9551 LED driver. Signed-off-by: Stefan Roese s...@denx.de Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/4] Introduce lcd_console rotation.
Sometimes, for example if the display is mounted in portrait mode or even if it mounted landscape but rotated by 180 degree, we need to rotate our content of the display respectively the framebuffer, so that user can read the messages who are printed out. For this we introduce the feature called CONFIG_LCD_ROTATION, this may be defined in the board-configuration if needed. After this the lcd_console will be initialized with a given rotation from vl_rot out of vidinfo_t which is provided by the board specific code. If CONFIG_LCD_ROTATION is not defined, the console will be initialized with 0 degrees rotation - the screen behaves like the days before. Patch 1-3 make preparations to the code. Patch 4 implements the new feature Hannes Petermaier (4): common/lcd_console: cleanup lcd_drawchars/lcd_putc_xy common/lcd_console: ask only one-time for bg/fg-color per call common/lcd_console: move single static variables into common (static) structure common/lcd_console: introduce display/framebuffer rotation README| 17 +++ common/lcd.c | 22 +-- common/lcd_console.c | 395 + include/lcd.h |1 + include/lcd_console.h |9 +- 5 files changed, 334 insertions(+), 110 deletions(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V6 01/11] ARM: Introduce erratum workaround for 798870
On Mon, Mar 09, 2015 at 05:11:59PM -0500, Nishanth Menon wrote: Add workaround for Cortex-A15 ARM erratum 798870 which says If back-to-back speculative cache line fills (fill A and fill B) are issued from the L1 data cache of a CPU to the L2 cache, the second request (fill B) is then cancelled, and the second request would have detected a hazard against a recent write or eviction (write B) to the same cache line as fill B then the L2 logic might deadlock. Implementations for SoC families such as Exynos, OMAP5/DRA7 etc will be widely different. Every SoC has slightly different manner of setting up access to L2ACLR and similar registers since the Secure Monitor handling of Secure Monitor Call(smc) is diverse. Hence an weak function is introduced which may be overriden to implement SoC specific accessor implementation. Based on ARM errata Document revision 18.0 (22 Nov 2013) Signed-off-by: Nishanth Menon n...@ti.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V6 10/11] ARM: OMAP3: Enable workaround for ARM errata 454179, 430973, 621766
On Mon, Mar 09, 2015 at 05:12:08PM -0500, Nishanth Menon wrote: Enable the OMAP3 specific errata code for 454179, 430973, 621766 and while at it, remove legacy non-revision checked errata logic. Signed-off-by: Nishanth Menon n...@ti.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V6 07/11] ARM: OMAP3: Get rid of omap3_gp_romcode_call and replace with omap_smc1
On Wed, Mar 11, 2015 at 10:48 AM, Tom Rini tr...@konsulko.com wrote: On Mon, Mar 09, 2015 at 05:12:05PM -0500, Nishanth Menon wrote: omap_smc1 is now generic enough to remove duplicate omap3_gp_romcode_call logic that omap3 introduced. As part of this change, move to using the generic lowlevel_init.S for omap3 as well. Signed-off-by: Nishanth Menon n...@ti.com Reviewed-by: Tom Rini tr...@konsulko.com But I've always wondered, does OMAP3 not actually pass in the same info in the same location / manner as OMAP4 and later? For smc call, the calls are similar, but the parameters change -- --- Regards, Nishanth Menon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] No console output once kernel starts loading.
To update anyone who comes across this issue... Yes, a stripped version of the dts, like above, is all that is necessary to see console output. You just have to setup your uart pads correctly in imx53.dtsi. My main issue was the uart setting in .config. I had earlyprintk turned on and the uart port number is one based. It defaulted to port 1 while ours is port 2 (mxc1). This zero based/one based inconsistency has bit me more than once. ;-) Initially I thought it was a machine type mismatch, but that proved to be wrong. As a matter of fact I stripped all machine type references from u-boot and kernel and it works fine. My question is: Is it ok to remove machine type when using a newer version of u-boot and linux? The dtb has a model description, but no other handshake to validate the system between u-boot and linux. -- View this message in context: http://u-boot.10912.n7.nabble.com/No-console-output-once-kernel-starts-loading-tp207674p208246.html Sent from the U-Boot mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mmc: fsl_esdhc fix register offset
On Wed, Mar 11, 2015 at 10:55 AM, Pantelis Antoniou pa...@antoniou-consulting.com wrote: Although I agree with fixing this, I’m kinda scared about how fragile structs for describing hardware registers are. Agreed! But we’re stuck with it I guess. Yes, it seems this is mandatory in U-boot. Kernel does not have such requirement and the standard way there is to use (base + offset) for register accesses. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/4] fastboot: call board_usb_init() to enable usb
Hi Dileep, Marek
On 5 March 2015 at 20:07, Tom Rini tr...@konsulko.com wrote:
On Thu, Mar 05, 2015 at 12:36:57AM +0530, Dileep Katta wrote:
On 4 March 2015 at 23:59, Tom Rini tr...@konsulko.com wrote:
On Wed, Mar 04, 2015 at 05:05:11PM +, Stegmaier, Angela
wrote:
Hi Dileep,
-Original Message-
From: Dileep Katta [mailto:dileep.ka...@linaro.org]
Sent: Tuesday, March 03, 2015 5:11 AM
To: u-boot@lists.denx.de; robherri...@gmail.com; Rini, Tom;
rob.herr...@linaro.org; s...@broadcom.com;
l.majew...@samsung.com; Stegmaier, Angela
Cc: Dileep Katta
Subject: [U-Boot][PATCH v2 2/4] fastboot: call
board_usb_init() to
enable
usb
g_dnl_gadget_register() fails for dra7xx dwc3 gadget when
running cmd_fastboot.
Calling board_usb_init() fixes this.
Signed-off-by: Angela Stegmaier angelaba...@ti.com
Signed-off-by: Dileep Katta dileep.ka...@linaro.org
---
common/cmd_fastboot.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/common/cmd_fastboot.c b/common/cmd_fastboot.c
index 346ab80..d7b8f6d 100644
--- a/common/cmd_fastboot.c
+++ b/common/cmd_fastboot.c
@@ -10,11 +10,13 @@
#include common.h
#include command.h
#include g_dnl.h
+#include usb.h
static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int
argc, char
*const
argv[]) {
int ret;
+ board_usb_init(0, USB_INIT_DEVICE);
The controller index should be configurable.
We are not getting controller Index as an argument for fastboot
function. Might have to add extra logic to get the same.
But do we need configurable index here for fastboot?
Experts, please advise.
Some time ago we have changed syntax of all gadget related commands
(from e.g. dfu mmc 0 - dfu 0 mmc 0) to support different controllers.
Rationale was to prepare ourself for future changes.
IMHO it would be feasible to do the same with fastboot command.
However, lets wait for Marek's opinion.
Also, should
board_usb_cleanup be called at the end?
I _really_ _really_ want to see if we can modify things so that
we
don't
have to sprinkle ever gadget driver with a cleanup() and every
gadget too if we don't have to. Thanks!
Most of the boards have board_usb_cleanup() as just a stub. For
some, the function is not present, and adding board_usb_cleanup()
here breaks the build for others with fastboot enabled.
That's a problem that needs fixing since those boards without a
functional board_usb_cleanup() are likely causing breakage in Linux.
Will add the board_usb_cleanup() function at the end.
+1
--
Tom
--
Best regards,
Lukasz Majewski
Samsung RD Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH] odroid: defconfig: fix build break caused by missing dts
Hi Tom, The build break was caused by one of my previous commit: 'odroid: defconfig: disable memset at malloc init' It removes the dts from odroid defconfig - rebase mistake. Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com Cc: Minkyu Kang mk7.k...@samsung.com --- configs/odroid_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index cfb29e0..d32b5b5 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_ODROID=y CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE=exynos4412-odroid CONFIG_DM_I2C=y CONFIG_DM_I2C_COMPAT=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set Tom, could you fetch this fix patch ? Thanks in advance. -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 14/14] tegra: Set CNTFRQ for secondary CPUs
On Mon, Mar 09, 2015 at 08:00:24AM +0100, Jan Kiszka wrote: We only set CNTFRQ in arch_timer_init for the boot CPU. But this has to happen for all cores. Fixing this resolves problems of KVM with emulating the generic timer/counter. Signed-off-by: Jan Kiszka jan.kis...@siemens.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] config_distro_bootcmd.h: add note on error handling
On 03/11/2015 09:51 AM, Tom Rini wrote: On Tue, Mar 10, 2015 at 03:40:58PM -0600, Stephen Warren wrote: From: Stephen Warren swar...@nvidia.com This should make it more clear why there appear to be C pre-processor symbols in the file that contain mixed case. They're really error messages. Suggested-by: Simon Glass s...@chromium.org Signed-off-by: Stephen Warren swar...@nvidia.com Reviewed-by: Tom Rini tr...@konsulko.com Thanks. It looks like you usually apply the patches to this file rather than acking it for someone else to take. Was your reviewed-by just a hint you're waiting for e.g. Simon to review it too? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] 4K padding of ARM DT blob
Thanks Masahiro Actually, I am considering to modify u-boot's own FDT to reflect changes in configurable boards like development boards. So maybe the padding is good for my needs after all :) Do you see any issue with such an approach ? Thanks Yehuda -Original Message- From: Masahiro Yamada [mailto:yamada.masah...@socionext.com] Sent: Thursday, March 12, 2015 10:10 To: Yehuda Yitschak Cc: Simon Glass; Tom Rini; Hanna Hawa; u-boot@lists.denx.de Subject: Re: [U-Boot] 4K padding of ARM DT blob Hi. 2015-03-12 15:46 GMT+09:00 Yehuda Yitschak yehu...@marvell.com: Hey Simon Thanks for the clarification Just out of curiosity, how can the padding help modify the FDT in u-boot ? If you insert a new node/property, or change a property for a longer value, the FDT blob will get longer. So, you need some extra space for modification. Otherwise, the U-Boot image will be overritten in case of CONFIG_OF_EMBED. But, as Simon said, U-Boot never modifies a FDT that is used to configure U- Boot itself. Just in case, let me add a little more explanation: What is confusing is, U-Boot can modify a FDT that is passed to the kernel. U-Boot can have two different instances of FDTs: one for configuring U-Boot and the other for configuring Linux. We are talking about the former in this thread. Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] MIPS UHI spec
Am 09.03.2015 um 18:04 schrieb Andrew Bresticker: Hi Daniel, On Thu, Feb 26, 2015 at 4:37 AM, Daniel Schwierzeck daniel.schwierz...@gmail.com wrote: 2015-02-26 11:17 GMT+01:00 Paul Burton paul.bur...@imgtec.com: On Thu, Feb 19, 2015 at 01:50:23PM +, Matthew Fortune wrote: Hi Daniel, The spec for MIPS Unified Hosting Interface is available here: http://prplfoundation.org/wiki/MIPS_documentation As we have previously discussed, this is an ideal place to define the handover of device tree data from bootloader to kernel. Using a0 == -2 and defining which register(s) you need for the actual data will fit nicely. I'll happily include whatever is decided into the next version of the spec. this originates from an off-list discussion some months ago started by John Crispin. (CC +John, Ralf, Jonas, linux-mips) (CC +Andrew, Ezequiel, James, James) On the talk of DT handover, this recent patchset adding support for a system doing so to Linux is relevant: http://www.linux-mips.org/archives/linux-mips/2015-02/msg00312.html I'm also working on a system for which I'll need to implement DT handover very soon. It would be very nice if we could agree on some standard way of doing so (and eventually if the code on the Linux side can be generic enough to allow a multiplatform kernel). to be conformant with UHI I propose $a0 == -2 and $a1 == address of DT blob. It is a simple extension and should not interfere with the various legacy boot interfaces. Just to be clear, is $a1 expected to be the physical or virtual (KSEG0) address of the DTB? U-Boot currently uses KSEG0 addresses for kernel entry and initramfs. Therefore the DTB address would be also KSEG0. But I'm not sure if it is correct for MIPS64. Shouldn't the kernel sanitize the DTB address anyway like it's done with initramfs? Maybe Matthew or others could comment. -- - Daniel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix
On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote: Changes in v4: - rebased over master - implemented psci_get_cpu_id as weak function - implemented psci_disable/enable_smp as weak functions - adjusted register interface of psci_get_cpu_stack_top This version (+ the non-cached memory init fix) can also be found at https://github.com/siemens/u-boot/tree/jetson-tk1-v5. So, I don't know where exactly this should come in. Hans or Ian, if you can ack the sunxi changes (I saw you tested it Ian, thanks!) and Tom W., if you can ack the Tegra parts, I can take this in or Albert, do you want to chime in too since this is kinda core ARM stuff too? Thanks everyone! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 05/14] ARM: Factor out reusable psci_get_cpu_stack_top
On Mon, Mar 09, 2015 at 08:00:15AM +0100, Jan Kiszka wrote: This algorithm will be useful on Tegra as well, plus we will need it for making _psci_target_pc per-CPU. CC: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Jan Kiszka jan.kis...@siemens.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 03/14] ARM: Factor out reusable psci_cpu_off_common
On Mon, Mar 09, 2015 at 08:00:13AM +0100, Jan Kiszka wrote: Move parts of sunxi's psci_cpu_off into psci_cpu_off_common, namely cache disabling and flushing, clrex and the disabling of SMP for the dying CPU. These steps are apparently generic for ARMv7 and will be reused for Tegra124 support. As the way of disabled SMP is not architectural, though commonly done via ACLTR, the related function can be overloaded. CC: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Jan Kiszka jan.kis...@siemens.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] kconfig: remove meaningless prefixes in defconfig files
Since commit e02ee2548afe (kconfig: switch to single .config configuration), the prefixes in defconfig files such as +S:, +ST:, etc., are meaningless. This commit was generated by the following command: find configs -name '*_defconfig' | xargs sed -i 's/^+*S*T*://' Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Tom, This patch is trivial, but prone to conflicts. Could you apply it asap, please? configs/A10-OLinuXino-Lime_defconfig | 12 ++-- configs/A10s-OLinuXino-M_defconfig | 16 configs/A13-OLinuXinoM_defconfig | 12 ++-- configs/A13-OLinuXino_defconfig | 12 ++-- configs/A20-OLinuXino-Lime2_defconfig| 12 ++-- configs/A20-OLinuXino-Lime_defconfig | 12 ++-- configs/A20-OLinuXino_MICRO_defconfig| 16 configs/Ampe_A76_defconfig | 12 ++-- configs/Auxtek-T004_defconfig| 12 ++-- configs/B4420QDS_NAND_defconfig | 6 +++--- configs/B4860QDS_NAND_defconfig | 6 +++--- configs/BSC9131RDB_NAND_SYSCLK100_defconfig | 6 +++--- configs/BSC9131RDB_NAND_defconfig| 6 +++--- configs/BSC9132QDS_NAND_DDRCLK100_defconfig | 6 +++--- configs/BSC9132QDS_NAND_DDRCLK133_defconfig | 6 +++--- configs/Bananapi_defconfig | 12 ++-- configs/Bananapro_defconfig | 12 ++-- configs/C29XPCIE_NAND_defconfig | 6 +++--- configs/CSQ_CS908_defconfig | 18 +- configs/Chuwi_V7_CW0825_defconfig| 12 ++-- configs/Colombus_defconfig | 14 +++--- configs/Cubieboard2_defconfig| 12 ++-- configs/Cubieboard_defconfig | 12 ++-- configs/Cubietruck_defconfig | 12 ++-- configs/Hummingbird_A31_defconfig| 16 configs/Hyundai_A7HD_defconfig | 12 ++-- configs/Inet_86VS_defconfig | 12 ++-- configs/Ippo_q8h_v1_2_defconfig | 14 +++--- configs/Ippo_q8h_v5_defconfig| 14 +++--- configs/Linksprite_pcDuino3_Nano_defconfig | 12 ++-- configs/Linksprite_pcDuino3_defconfig| 12 ++-- configs/Linksprite_pcDuino3_fdt_defconfig| 12 ++-- configs/Linksprite_pcDuino_defconfig | 12 ++-- configs/MK808C_defconfig | 12 ++-- configs/MPC8313ERDB_NAND_33_defconfig| 6 +++--- configs/MPC8313ERDB_NAND_66_defconfig| 6 +++--- configs/MSI_Primo73_defconfig| 12 ++-- configs/MSI_Primo81_defconfig| 12 ++-- configs/Marsboard_A10_defconfig | 12 ++-- configs/Mele_A1000_defconfig | 12 ++-- configs/Mele_I7_defconfig| 22 +++--- configs/Mele_M3_defconfig| 16 configs/Mele_M5_defconfig| 18 +- configs/Mele_M9_defconfig| 22 +++--- configs/Mini-X_defconfig | 12 ++-- configs/Orangepi_defconfig | 12 ++-- configs/Orangepi_mini_defconfig | 12 ++-- configs/P1010RDB-PA_36BIT_NAND_defconfig | 6 +++--- configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 6 +++--- configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 6 +++--- configs/P1010RDB-PA_NAND_defconfig | 6 +++--- configs/P1010RDB-PA_SDCARD_defconfig | 6 +++--- configs/P1010RDB-PA_SPIFLASH_defconfig | 6 +++--- configs/P1010RDB-PB_36BIT_NAND_defconfig | 6 +++--- configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 6 +++--- configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 6 +++--- configs/P1010RDB-PB_NAND_defconfig | 6 +++--- configs/P1010RDB-PB_SDCARD_defconfig | 6 +++--- configs/P1010RDB-PB_SPIFLASH_defconfig | 6 +++--- configs/P1020MBG-PC_36BIT_SDCARD_defconfig | 6 +++--- configs/P1020MBG-PC_SDCARD_defconfig | 6 +++--- configs/P1020RDB-PC_36BIT_NAND_defconfig | 6 +++--- configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 6 +++--- configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 6 +++--- configs/P1020RDB-PC_NAND_defconfig | 6 +++--- configs/P1020RDB-PC_SDCARD_defconfig | 6 +++--- configs/P1020RDB-PC_SPIFLASH_defconfig | 6 +++--- configs/P1020RDB-PD_NAND_defconfig | 6 +++--- configs/P1020RDB-PD_SDCARD_defconfig | 6 +++--- configs/P1020RDB-PD_SPIFLASH_defconfig | 6 +++--- configs/P1020UTM-PC_36BIT_SDCARD_defconfig | 6 +++--- configs/P1020UTM-PC_SDCARD_defconfig | 6 +++--- configs/P1021RDB-PC_36BIT_NAND_defconfig | 6 +++--- configs/P1021RDB-PC_36BIT_SDCARD_defconfig | 6 +++---
Re: [U-Boot] [PATCH v1 1/1] fastboot: Add support for flashing zImage
Hi Dileep,
This patch adds support to flash zImage to the boot partition on eMMC.
Usage: fastboot flash zImage path_to_zImage
Signed-off-by: Angela Stegmaier angelaba...@ti.com
Signed-off-by: Dileep Katta dileep.ka...@linaro.org
---
drivers/usb/gadget/f_fastboot.c | 152
1 file changed, 152
insertions(+)
diff --git a/drivers/usb/gadget/f_fastboot.c
b/drivers/usb/gadget/f_fastboot.c index 310175a..d3d16c0 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -23,6 +23,7 @@
#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
#include fb_mmc.h
#endif
+#include android_image.h
#define FASTBOOT_VERSION 0.4
@@ -492,6 +493,152 @@ static void cb_continue(struct usb_ep *ep,
struct usb_request *req) }
#ifdef CONFIG_FASTBOOT_FLASH
+static int fastboot_update_zimage(void);
+
+static u32 fastboot_get_boot_ptn(struct andr_img_hdr *hdr, char
^ could you explain this acronym?
My gut feeling is that this function name could be better.
As fair as I can tell you return number of header sectors.
*response,
+ block_dev_desc_t
*dev_desc) +{
+ u32 hdr_sectors = 0;
+ u32 sector_size;
+ int status = 0;
+ strcpy(response, OKAY);
+ disk_partition_t info;
+
+ status = get_partition_info_efi_by_name(dev_desc, boot,
info);
+ if (status) {
+ strcpy(response, FAILCannot find boot partition);
+ goto out;
+ }
+
+ /* Read the boot image header */
+ sector_size = info.blksz;
+ hdr_sectors = (sizeof(struct andr_img_hdr)/sector_size) + 1;
^^^ checkpatch.pl would complain about this line.
+ status = dev_desc-block_read(dev_desc-dev, info.start,
+ hdr_sectors, (void *)hdr);
+
+ if (status 0) {
+ strcpy(response, FAILCannot read hdr from boot
partition);
+ goto out;
+ }
+ if (android_image_check_header(hdr) != 0) {
+ printf(bad boot image magic\n);
^^ error()?
+ strcpy(response, FAILBoot partition not
initialized);
+ goto out;
+ }
+
+ return hdr_sectors;
+
+out:
+ strcpy(response, INFO);
+ fastboot_tx_write_str(response);
+
+ return -1;
Please use appropriate -Ex error code in the whole file.
+}
+
+#define CEIL(a, b) (((a) / (b)) + ((a % b) 0 ? 1 : 0))
Maybe you could add this code to ./include/common.h file, so it would
be reusable in the future?
+
+static int fastboot_update_zimage(void)
+{
+ struct andr_img_hdr *hdr = NULL;
+ u8 *ramdisk_buffer;
+ u32 ramdisk_sector_start, ramdisk_sectors;
+ u32 kernel_sector_start, kernel_sectors;
+ u32 hdr_sectors = 0;
+ u32 sectors_per_page = 0;
+ int ret = 0;
+ block_dev_desc_t *dev_desc;
+ disk_partition_t info;
+ char response[RESPONSE_LEN];
this is defined as (64 + 1)
Isn't there any change that such unaligned buffer would cause
cache flush/invalidation related bugs?
Please look into ALLOC_CACHE_ALIGN_BUFFER comment
at ./include/common.h file
+ u32 addr = CONFIG_USB_FASTBOOT_BUF_ADDR;
+
+ strcpy(response, OKAY);
+ printf(Flashing zImage...%d bytes\n, download_bytes);
+
+ dev_desc = get_dev(mmc, CONFIG_FASTBOOT_FLASH_MMC_DEV);
+ if (!dev_desc || dev_desc-type == DEV_TYPE_UNKNOWN) {
+ sprintf(response + strlen(response),
+ FAILInvalid mmc device);
+ ret = -1;
+ goto out;
+ }
+
+ addr += CEIL(download_bytes, 0x1000) * 0x1000;
^^ Please use define for this
magic number. It would be more
informative.
+ hdr = (struct andr_img_hdr *)addr;
+
+ hdr_sectors = fastboot_get_boot_ptn(hdr, response, dev_desc);
^^^ the comment the same as
above.
+ if (hdr_sectors = 0) {
+ sprintf(response + strlen(response),
+ FAILInvalid number of boot sectors %d,
hdr_sectors);
+ ret = -1;
+ goto out;
+ }
+ ret = get_partition_info_efi_by_name(dev_desc, boot,
info);
+ if (ret) {
+ strcpy(response, FAILCannot find boot partition);
+ ret = -1;
+ goto out;
+ }
+
+ /* Extract ramdisk location and read it into local buffer */
+ sectors_per_page = hdr-page_size / info.blksz;
+ ramdisk_sector_start = info.start + sectors_per_page;
+ ramdisk_sector_start += CEIL(hdr-kernel_size,
hdr-page_size)*
+ sectors_per_page;
+
Re: [U-Boot] [PATCH] mx6: Set shared override bit in PL310 AUX_CTRL register
On Wed, Mar 11, 2015 at 08:12:12PM +, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Having bit 22 cleared in the PL310 Auxiliary Control register (shared attribute override enable) has the side effect of transforming Normal Shared Non-cacheable reads into Cacheable no-allocate reads. Coherent DMA buffers in Linux always have a Cacheable alias via the kernel linear mapping and the processor can speculatively load cache lines into the PL310 controller. With bit 22 cleared, Non-cacheable reads would unexpectedly hit such cache lines leading to buffer corruption. This was inspired by a patch from Catalin Marinas [1] and also from recent discussions in the linux-arm-kernel list [2] where Russell King and Rob Herring suggested that bootloaders should initialize the cache. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2010-November/031810.html [2] https://lkml.org/lkml/2015/2/20/199 Signed-off-by: Fabio Estevam fabio.este...@freescale.com Acked-by: Catalin Marinas catalin.mari...@arm.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC PATCH] PMIC: add act8865 series support
Add Active-Semi act8865 series PMU support.
Signed-off-by: Bo Shen voice.s...@atmel.com
---
drivers/power/Makefile | 1 +
drivers/power/act8865.c | 104
include/act8865.h | 54 +
3 files changed, 159 insertions(+)
create mode 100644 drivers/power/act8865.c
create mode 100644 include/act8865.h
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 2145652..0c2a8cf 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -5,6 +5,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
+obj-$(CONFIG_ACT8865_POWER)+= act8865.o
obj-$(CONFIG_AS3722_POWER) += as3722.o
obj-$(CONFIG_AXP152_POWER) += axp152.o
obj-$(CONFIG_AXP209_POWER) += axp209.o
diff --git a/drivers/power/act8865.c b/drivers/power/act8865.c
new file mode 100644
index 000..c36f7bd
--- /dev/null
+++ b/drivers/power/act8865.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2015 Atmel Corporation
+ * Bo Shen voice.s...@atmel.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include i2c.h
+#include act8865.h
+
+static int act8865_read(u32 reg, uchar *val)
+{
+ return i2c_read(ACT8865_I2C_ADDR, reg, 1, val, 1);
+}
+
+static int act8865_write(u32 reg, uchar val)
+{
+ return i2c_write(ACT8865_I2C_ADDR, reg, 1, val, 1);
+}
+
+int act8865_disable_i2c_interface(void)
+{
+ uchar val;
+
+ /* Check the I2C interface is disabled or not */
+ if (act8865_read(ACT8865_SYS_CONTROL0, val)) {
+ debug(ACT8865: i2c interface has been disabled\n);
+ return 0;
+ }
+
+ /*
+* As the ACT8865 don't have ID register, so we try one by one
+* to disable the exist chips (303, 304, 305) in this series.
+*/
+
+ /* Try to disable ACT8865QI303 */
+ act8865_write(0x0B, 0xE9);
+ act8865_write(0x02, 0x07);
+ if (act8865_write(0x03, 0x01)) {
+ debug(ACT8865: subtype 303 has been disabled\n);
+ return 0;
+ }
+
+ /* Try to disable ACT8865QI304 */
+ act8865_write(0x0B, 0xEE);
+ act8865_write(0x02, 0x07);
+ if (act8865_write(0x03, 0x01)) {
+ debug(ACT8865: subtype 304 has been disabled\n);
+ return 0;
+ }
+
+ /* Try to disable ACT8865QI305 */
+ act8865_write(0x0B, 0xEE);
+ act8865_write(0x02, 0x07);
+ if (act8865_write(0x03, 0x01)) {
+ debug(ACT8865: subtype 305 has been disabled\n);
+ return 0;
+ }
+
+ debug(ACT8865: the chip can not be disabled\n);
+
+ return 0;
+}
+
+int act8865_enable_ldo_output(enum act8865_ldo ldo, enum act8865_volt volt)
+{
+ u32 conf_reg, ctrl_reg;
+ uchar val;
+
+ switch (ldo) {
+ case ACT8865_LDO_REG4:
+ conf_reg = ACT8865_REG4_CONFIG0;
+ ctrl_reg = ACT8865_REG4_CONTROL;
+ break;
+
+ case ACT8865_LDO_REG5:
+ conf_reg = ACT8865_REG5_CONFIG0;
+ ctrl_reg = ACT8865_REG5_CONTROL;
+ break;
+
+ case ACT8865_LDO_REG6:
+ conf_reg = ACT8865_REG6_CONFIG0;
+ ctrl_reg = ACT8865_REG6_CONTROL;
+ break;
+
+ case ACT8865_LDO_REG7:
+ conf_reg = ACT8865_REG7_CONFIG0;
+ ctrl_reg = ACT8865_REG7_CONTROL;
+ break;
+ default:
+ error(ACT8865: unsupported LDO\n);
+ return -1;
+ }
+
+ /* Set the LDO output voltage */
+ act8865_write(conf_reg, 0x18);
+ /* Enable the LDO */
+ act8865_read(ctrl_reg, val);
+ val |= ACT8865_OUTPUT_ENABLE;
+ act8865_write(ctrl_reg, val);
+
+ return 0;
+}
diff --git a/include/act8865.h b/include/act8865.h
new file mode 100644
index 000..f6053ac
--- /dev/null
+++ b/include/act8865.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2015 Atmel Corporation
+ * Bo Shen voice.s...@atmel.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#define ACT8865_SYS_CONTROL0 0x00
+#define ACT8865_SYS_CONTROL1 0x01
+
+#define ACT8865_REG1_CONFIG0 0x20
+#define ACT8865_REG1_CONFIG1 0x21
+#define ACT8865_REG1_CONTROL 0x22
+
+#define ACT8865_REG2_CONFIG0 0x30
+#define ACT8865_REG2_CONFIG1 0x31
+#define ACT8865_REG2_CONTROL 0x32
+
+#define ACT8865_REG3_CONFIG0 0x40
+#define ACT8865_REG3_CONFIG1 0x41
+#define ACT8865_REG3_CONTROL 0x42
+
+#define ACT8865_REG4_CONFIG0 0x50
+#define ACT8865_REG4_CONTROL 0x51
+
+#define ACT8865_REG5_CONFIG0 0x54
+#define ACT8865_REG5_CONTROL 0x55
+
+#define ACT8865_REG6_CONFIG0 0x60
+#define ACT8865_REG6_CONTROL 0x61
+
+#define ACT8865_REG7_CONFIG0 0x64
+#define ACT8865_REG7_CONTROL 0x65
+
+#define ACT8865_OUTPUT_ENABLE (0x01 7)
+
+#define ACT8865_I2C_ADDR 0x5B
+
+enum act8865_ldo {
+ ACT8865_LDO_REG4 = 4,
+ ACT8865_LDO_REG5,
+ ACT8865_LDO_REG6,
+
[U-Boot] [PATCH] powerpc/t1023rdb: add ddr support for t1023rdb
Tested on the discrete DDR4 MT40A512M8HX with raw timing on T1023RDB.
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
board/freescale/t102xrdb/ddr.c | 78 +-
1 file changed, 77 insertions(+), 1 deletion(-)
diff --git a/board/freescale/t102xrdb/ddr.c b/board/freescale/t102xrdb/ddr.c
index a2a8f4c..adf9fd5 100644
--- a/board/freescale/t102xrdb/ddr.c
+++ b/board/freescale/t102xrdb/ddr.c
@@ -135,8 +135,83 @@ found:
/* for DDR bus 32bit test on T1024 */
popts-data_bus_width = DDR_DATA_BUS_WIDTH_32;
#endif
+
+#ifdef CONFIG_T1023RDB
+ popts-wrlvl_ctl_2 = 0x07070606;
+ popts-half_strength_driver_enable = 1;
+#endif
}
+#ifdef CONFIG_SYS_DDR_RAW_TIMING
+/* 2GB discrete DDR4 MT40A512M8HX on T1023RDB */
+dimm_params_t ddr_raw_timing = {
+ .n_ranks = 1,
+ .rank_density = 0x8000,
+ .capacity = 0x8000,
+ .primary_sdram_width = 32,
+ .ec_sdram_width = 8,
+ .registered_dimm = 0,
+ .mirrored_dimm = 0,
+ .n_row_addr = 15,
+ .n_col_addr = 10,
+ .bank_addr_bits = 2,
+ .bank_group_bits = 2,
+ .edc_config = 0,
+ .burst_lengths_bitmask = 0x0c,
+ .tckmin_x_ps = 938,
+ .tckmax_ps = 1500,
+ .caslat_x = 0x000DFA00,
+ .taa_ps = 13500,
+ .trcd_ps = 13500,
+ .trp_ps = 13500,
+ .tras_ps = 33000,
+ .trc_ps = 46500,
+ .trfc1_ps = 26,
+ .trfc2_ps = 16,
+ .trfc4_ps = 11,
+ .tfaw_ps = 25000,
+ .trrds_ps = 3700,
+ .trrdl_ps = 5300,
+ .tccdl_ps = 5355,
+ .refresh_rate_ps = 780,
+ .dq_mapping[0] = 0x0,
+ .dq_mapping[1] = 0x0,
+ .dq_mapping[2] = 0x0,
+ .dq_mapping[3] = 0x0,
+ .dq_mapping[4] = 0x0,
+ .dq_mapping[5] = 0x0,
+ .dq_mapping[6] = 0x0,
+ .dq_mapping[7] = 0x0,
+ .dq_mapping[8] = 0x0,
+ .dq_mapping[9] = 0x0,
+ .dq_mapping[10] = 0x0,
+ .dq_mapping[11] = 0x0,
+ .dq_mapping[12] = 0x0,
+ .dq_mapping[13] = 0x0,
+ .dq_mapping[14] = 0x0,
+ .dq_mapping[15] = 0x0,
+ .dq_mapping[16] = 0x0,
+ .dq_mapping[17] = 0x0,
+ .dq_mapping_ors = 1,
+};
+
+int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
+ unsigned int controller_number,
+ unsigned int dimm_number)
+{
+ const char dimm_model[] = Fixed DDR4 on board;
+
+ if (((controller_number == 0) (dimm_number == 0)) ||
+ ((controller_number == 1) (dimm_number == 0))) {
+ memcpy(pdimm, ddr_raw_timing, sizeof(dimm_params_t));
+ memset(pdimm-mpart, 0, sizeof(pdimm-mpart));
+ memcpy(pdimm-mpart, dimm_model, sizeof(dimm_model) - 1);
+ }
+
+ return 0;
+}
+#endif
+
#if defined(CONFIG_DEEP_SLEEP)
void board_mem_sleep_setup(void)
{
@@ -155,8 +230,9 @@ phys_size_t initdram(int board_type)
phys_size_t dram_size;
#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_RAMBOOT_PBL)
+#ifndef CONFIG_SYS_DDR_RAW_TIMING
puts(Initializingusing SPD\n);
-
+#endif
dram_size = fsl_ddr_sdram();
dram_size = setup_ddr_tlbs(dram_size / 0x10);
dram_size *= 0x10;
--
2.1.0.27.g96db324
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Re: [U-Boot] [PATCH v2] misc: led: Add PCA9551 LED driver
On Thu, Mar 12, 2015 at 7:22 AM, Stefan Roese s...@denx.de wrote: This patch adds a driver for the PCA9551 LED controller. Originated-by: Timo Herbrecher t.herbrec...@gateware.de Signed-off-by: Stefan Roese s...@denx.de Reviewed-by: Tom Rini tr...@konsulko.com Cc: Fabio Estevam feste...@gmail.com Reviewed-by: Fabio Estevam fabio.este...@freescale.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/3] arm: mx6: tqma6: Extract baseboard configs into separate config file
This patch extracts all baseboard specific defines into a separate config file.
This makes it easier to add other baseboards that use the TQMa6 SoM.
This patch will be used by the upcoming WRU-IV board support which also
uses the TQMa6 SoM.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Markus Niebel markus.nie...@tq-group.com
Cc: Stefano Babic sba...@denx.de
---
include/configs/tqma6.h | 52 ++--
include/configs/tqma6_mba6.h | 32 +++
2 files changed, 43 insertions(+), 41 deletions(-)
create mode 100644 include/configs/tqma6_mba6.h
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index 9022550..69b6b57 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -35,16 +35,6 @@
#define PHYS_SDRAM_SIZE(1024u * SZ_1M)
#endif
-#if defined(CONFIG_MBA6)
-
-#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
-#define CONFIG_DEFAULT_FDT_FILEimx6dl-mba6x.dtb
-#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6Q)
-#define CONFIG_DEFAULT_FDT_FILEimx6q-mba6x.dtb
-#endif
-
-#endif
-
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_GENERIC_BOARD
@@ -85,11 +75,6 @@
/* I2C SYSMON (LM75) */
#define CONFIG_DTT_LM75
-#if defined(CONFIG_MBA6)
-#define CONFIG_DTT_SENSORS { 0, 1 }
-#else
-#define CONFIG_DTT_SENSORS { 0 }
-#endif
#define CONFIG_DTT_MAX_TEMP70
#define CONFIG_DTT_MIN_TEMP-30
#define CONFIG_DTT_HYSTERESIS 3
@@ -150,38 +135,12 @@
#define CONFIG_PHYLIB
#define CONFIG_MII
-#if defined(CONFIG_MBA6)
-
-#define CONFIG_FEC_XCV_TYPERGMII
-#define CONFIG_ETHPRIMEFEC
-
-#define CONFIG_FEC_MXC_PHYADDR 0x03
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_KSZ9031
-
-#else
-
-#error define PHY to use for your baseboard
-
-#endif
-
#define CONFIG_ARP_TIMEOUT 200UL
/* Network config - Allow larger/faster download for TFTP/NFS */
#define CONFIG_IP_DEFRAG
#define CONFIG_TFTP_BLOCKSIZE 4096
#define CONFIG_NFS_READ_SIZE 4096
-#if defined(CONFIG_MBA6)
-
-#define CONFIG_MXC_UART_BASE UART2_BASE
-#define CONFIG_CONSOLE_DEV ttymxc1
-
-#else
-
-#error define baseboard specific things (uart, number of SD-card slots)
-
-#endif
-
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
@@ -495,4 +454,15 @@
#define CONFIG_CMD_CACHE
#endif
+/*
+ * All the defines above are for the TQMa6 SoM
+ *
+ * Now include the baseboard specific configuration
+ */
+#ifdef CONFIG_MBA6
+#include tqma6_mba6.h
+#else
+#error No baseboard for the TQMa6 defined!
+#endif
+
#endif /* __CONFIG_H */
diff --git a/include/configs/tqma6_mba6.h b/include/configs/tqma6_mba6.h
new file mode 100644
index 000..a16120a
--- /dev/null
+++ b/include/configs/tqma6_mba6.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2013, 2014 Markus Niebel markus.nie...@tq-group.com
+ *
+ * Configuration settings for the TQ Systems TQMa6Q,S module.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __CONFIG_TQMA6_MBA6_H
+#define __CONFIG_TQMA6_MBA6_H
+
+/* And now the baseboard specific configuration */
+
+#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
+#define CONFIG_DEFAULT_FDT_FILEimx6dl-mba6x.dtb
+#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6Q)
+#define CONFIG_DEFAULT_FDT_FILEimx6q-mba6x.dtb
+#endif
+
+#define CONFIG_DTT_SENSORS { 0, 1 }
+
+#define CONFIG_FEC_XCV_TYPERGMII
+#define CONFIG_ETHPRIMEFEC
+
+#define CONFIG_FEC_MXC_PHYADDR 0x03
+#define CONFIG_PHY_MICREL
+#define CONFIG_PHY_KSZ9031
+
+#define CONFIG_MXC_UART_BASE UART2_BASE
+#define CONFIG_CONSOLE_DEV ttymxc1
+
+#endif /* __CONFIG_TQMA6_MBA6_H */
--
2.3.2
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[U-Boot] [PATCH 2/3] arm: mx6: tqma6: Update to optionally configure an alternative SPI setup
By making the tqma6_iomuxc_spi() weak, this patch adds the possibility to
add a different function for this SPI configuration. This can be used
by other baseboards, that might have a different SPI setup.
This patch will be used by the upcoming WRU-IV board support which also
uses the TQMa6 SoM.
Signed-off-by: Stefan Roese s...@denx.de
---
board/tqc/tqma6/tqma6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c
index c9e163e..29db838 100644
--- a/board/tqc/tqma6/tqma6.c
+++ b/board/tqc/tqma6/tqma6.c
@@ -145,7 +145,7 @@ static unsigned const tqma6_ecspi1_cs[] = {
TQMA6_SF_CS_GPIO,
};
-static void tqma6_iomuxc_spi(void)
+__weak void tqma6_iomuxc_spi(void)
{
unsigned i;
--
2.3.2
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[U-Boot] [PATCH 1/3] arm: mx6: tqma6: Fix USB and add other filesystems
This patch fixes the USB EHCI support on the TQMa6 SoM. Additionally some filesystems are added, included the generic FS commands (e.g. ls...). Signed-off-by: Stefan Roese s...@denx.de Cc: Markus Niebel markus.nie...@tq-group.com Cc: Stefano Babic sba...@denx.de --- include/configs/tqma6.h | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index a099687..9022550 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -125,16 +125,19 @@ #define CONFIG_USB_STORAGE #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_SMSC95XX -#define CONFIG_MXC_USB_PORT1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ /* Fuses */ #define CONFIG_MXC_OCOTP #define CONFIG_CMD_FUSE #define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_EXT4_WRITE #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC #define CONFIG_DOS_PARTITION #define CONFIG_CMD_PING -- 2.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6: Set shared override bit in PL310 AUX_CTRL register
On Thu, Mar 12, 2015 at 10:41 AM, Tom Rini tr...@konsulko.com wrote: We should put this somewhere a bit more common that other A9 cores can also call into like OMAP4, SoCFPGA and maybe zynq later (based on a quick git grep pl310). I thought about it as well, but I didn't find a suitable common place for putting it. Suggestions? Thanks ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] dfu: cmd: trigger watchdog before calling usb_gadget_handle_interrupts
trigger watchdog before calling usb_gadget_handle_interrupts() This prevents board resets when calling dfu command on boards which have a watchdog. Signed-off-by: Heiko Schocher h...@denx.de --- common/cmd_dfu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/common/cmd_dfu.c b/common/cmd_dfu.c index e975abe..46af4cf 100644 --- a/common/cmd_dfu.c +++ b/common/cmd_dfu.c @@ -9,6 +9,7 @@ */ #include common.h +#include watchdog.h #include dfu.h #include g_dnl.h #include usb.h @@ -64,6 +65,7 @@ static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (ctrlc()) goto exit; + WATCHDOG_RESET(); usb_gadget_handle_interrupts(); } exit: -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] arm: mx6: tqma6: Fix USB and add other filesystems
Am 12.03.2015 um 13:34 schrieb Stefan Roese: This patch fixes the USB EHCI support on the TQMa6 SoM. Additionally some filesystems are added, included the generic FS commands (e.g. ls...). Signed-off-by: Stefan Roese s...@denx.de Cc: Markus Niebel markus.nie...@tq-group.com Cc: Stefano Babic sba...@denx.de --- include/configs/tqma6.h | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index a099687..9022550 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -125,16 +125,19 @@ #define CONFIG_USB_STORAGE #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_SMSC95XX -#define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC(PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ /* Fuses */ #define CONFIG_MXC_OCOTP #define CONFIG_CMD_FUSE #define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_EXT4_WRITE #define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC #define CONFIG_DOS_PARTITION #define CONFIG_CMD_PING Acked-By: Markus Niebel markus.nie...@tq-group.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6: Set shared override bit in PL310 AUX_CTRL register
On 03/11/2015 03:12 PM, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
Having bit 22 cleared in the PL310 Auxiliary Control register (shared
attribute override enable) has the side effect of transforming Normal
Shared Non-cacheable reads into Cacheable no-allocate reads.
Coherent DMA buffers in Linux always have a Cacheable alias via the
kernel linear mapping and the processor can speculatively load cache
lines into the PL310 controller. With bit 22 cleared, Non-cacheable
reads would unexpectedly hit such cache lines leading to buffer
corruption.
This was inspired by a patch from Catalin Marinas [1] and also from recent
discussions in the linux-arm-kernel list [2] where Russell King and Rob
Herring
suggested that bootloaders should initialize the cache.
[1]
http://lists.infradead.org/pipermail/linux-arm-kernel/2010-November/031810.html
[2] https://lkml.org/lkml/2015/2/20/199
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
arch/arm/cpu/armv7/mx6/soc.c | 8
arch/arm/include/asm/pl310.h | 2 ++
2 files changed, 10 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index ef02972..5aab305 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -506,6 +506,14 @@ void v7_outer_cache_enable(void)
struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE;
unsigned int val;
+
+ /*
+ * Set bit 22 in the auxiliary control register. If this bit
+ * is cleared, PL310 treats Normal Shared Non-cacheable
+ * accesses as Cacheable no-allocate.
+ */
+ setbits_le32(pl310-pl310_aux_ctrl, L310_SHARED_ATT_OVERRIDE_ENABLE);
+
#if defined CONFIG_MX6SL
struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
val = readl(iomux-gpr[11]);
diff --git a/arch/arm/include/asm/pl310.h b/arch/arm/include/asm/pl310.h
index ddc245b..de7650e 100644
--- a/arch/arm/include/asm/pl310.h
+++ b/arch/arm/include/asm/pl310.h
@@ -16,6 +16,8 @@
#define L2X0_STNDBY_MODE_EN (1 0)
#define L2X0_CTRL_EN 1
+#define L310_SHARED_ATT_OVERRIDE_ENABLE (1 22)
+
struct pl310_regs {
u32 pl310_cache_id;
u32 pl310_cache_type;
is it possible for us to centralize the pl310 logic - that'd let us
reuse generic logic cross SoCs without having to duplicate bits like
these over and over. at least A9 based TI SoCs could potentially
benefit out of this.
The only problem was to deal with actual PL310 configuration path
which could be SoC dependent, but then, we could implement weak
functions that allow us to override the same. I tried to do something
like that for CP15 errata[1]
just my 2 cents.
[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/214436
--
Regards,
Nishanth Menon
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Re: [U-Boot] [PATCH 3/3] arm: mx6: tqma6: Extract baseboard configs into separate config file
Hello Stefan,
I like the idea - did not know at time when we brought it to mainline that
splitting configs
is an allowed way. See comment.
Am 12.03.2015 um 13:34 schrieb Stefan Roese:
This patch extracts all baseboard specific defines into a separate config
file.
This makes it easier to add other baseboards that use the TQMa6 SoM.
This patch will be used by the upcoming WRU-IV board support which also
uses the TQMa6 SoM.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Markus Niebel markus.nie...@tq-group.com
Cc: Stefano Babic sba...@denx.de
---
include/configs/tqma6.h | 52
++--
include/configs/tqma6_mba6.h | 32 +++
2 files changed, 43 insertions(+), 41 deletions(-)
create mode 100644 include/configs/tqma6_mba6.h
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index 9022550..69b6b57 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -35,16 +35,6 @@
#define PHYS_SDRAM_SIZE (1024u * SZ_1M)
#endif
-#if defined(CONFIG_MBA6)
-
-#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
-#define CONFIG_DEFAULT_FDT_FILE imx6dl-mba6x.dtb
-#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6Q)
-#define CONFIG_DEFAULT_FDT_FILE imx6q-mba6x.dtb
-#endif
-
-#endif
-
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_GENERIC_BOARD
@@ -85,11 +75,6 @@
/* I2C SYSMON (LM75) */
#define CONFIG_DTT_LM75
-#if defined(CONFIG_MBA6)
-#define CONFIG_DTT_SENSORS { 0, 1 }
-#else
-#define CONFIG_DTT_SENSORS { 0 }
This will be lost for baseboards not implementing DTT_SENSORS feature
-#endif
#define CONFIG_DTT_MAX_TEMP 70
#define CONFIG_DTT_MIN_TEMP -30
#define CONFIG_DTT_HYSTERESIS3
@@ -150,38 +135,12 @@
#define CONFIG_PHYLIB
#define CONFIG_MII
-#if defined(CONFIG_MBA6)
-
-#define CONFIG_FEC_XCV_TYPE RGMII
-#define CONFIG_ETHPRIME FEC
-
-#define CONFIG_FEC_MXC_PHYADDR 0x03
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_KSZ9031
-
-#else
-
-#error define PHY to use for your baseboard
-
-#endif
-
#define CONFIG_ARP_TIMEOUT 200UL
/* Network config - Allow larger/faster download for TFTP/NFS */
#define CONFIG_IP_DEFRAG
#define CONFIG_TFTP_BLOCKSIZE4096
#define CONFIG_NFS_READ_SIZE 4096
-#if defined(CONFIG_MBA6)
-
-#define CONFIG_MXC_UART_BASE UART2_BASE
-#define CONFIG_CONSOLE_DEV ttymxc1
-
-#else
-
-#error define baseboard specific things (uart, number of SD-card slots)
-
-#endif
-
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX1
@@ -495,4 +454,15 @@
#define CONFIG_CMD_CACHE
#endif
+/*
+ * All the defines above are for the TQMa6 SoM
+ *
+ * Now include the baseboard specific configuration
+ */
+#ifdef CONFIG_MBA6
+#include tqma6_mba6.h
+#else
+#error No baseboard for the TQMa6 defined!
+#endif
Maybe this is the right place to add something like:
/* support at least the sensor on TQMa6 SOM */
#if !defined(CONFIG_DTT_SENSORS)
#define CONFIG_DTT_SENSORS { 0 }
#endif
+
#endif /* __CONFIG_H */
diff --git a/include/configs/tqma6_mba6.h b/include/configs/tqma6_mba6.h
new file mode 100644
index 000..a16120a
--- /dev/null
+++ b/include/configs/tqma6_mba6.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2013, 2014 Markus Niebel markus.nie...@tq-group.com
+ *
+ * Configuration settings for the TQ Systems TQMa6Q,S module.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_TQMA6_MBA6_H
+#define __CONFIG_TQMA6_MBA6_H
+
+/* And now the baseboard specific configuration */
Please delete this comment.
+
+#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
+#define CONFIG_DEFAULT_FDT_FILE imx6dl-mba6x.dtb
+#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6Q)
+#define CONFIG_DEFAULT_FDT_FILE imx6q-mba6x.dtb
+#endif
+
+#define CONFIG_DTT_SENSORS { 0, 1 }
+
+#define CONFIG_FEC_XCV_TYPE RGMII
+#define CONFIG_ETHPRIME FEC
+
+#define CONFIG_FEC_MXC_PHYADDR 0x03
+#define CONFIG_PHY_MICREL
+#define CONFIG_PHY_KSZ9031
+
+#define CONFIG_MXC_UART_BASE UART2_BASE
+#define CONFIG_CONSOLE_DEV ttymxc1
+
+#endif /* __CONFIG_TQMA6_MBA6_H */
Regards
Markus
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Re: [U-Boot] [PATCH 2/3] arm: mx6: tqma6: Update to optionally configure an alternative SPI setup
Hello Stefan,
Am 12.03.2015 um 13:34 schrieb Stefan Roese:
By making the tqma6_iomuxc_spi() weak, this patch adds the possibility to
add a different function for this SPI configuration. This can be used
by other baseboards, that might have a different SPI setup.
This patch will be used by the upcoming WRU-IV board support which also
uses the TQMa6 SoM.
Signed-off-by: Stefan Roese s...@denx.de
---
board/tqc/tqma6/tqma6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c
index c9e163e..29db838 100644
--- a/board/tqc/tqma6/tqma6.c
+++ b/board/tqc/tqma6/tqma6.c
@@ -145,7 +145,7 @@ static unsigned const tqma6_ecspi1_cs[] = {
TQMA6_SF_CS_GPIO,
};
-static void tqma6_iomuxc_spi(void)
+__weak void tqma6_iomuxc_spi(void)
{
unsigned i;
When implementing an baseboard specific init handler, we will get a warning
about unused
tqma6_ecspi1_pads and tqma6_ecspi1_cs, or did I miss something?
Just as a thought (not ready): Could we supply CS initialisation data via
defines in the
baseboard config header and append it to the tables if needed?
Regards
Markus
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Re: [U-Boot] [PATCH] mx6: Set shared override bit in PL310 AUX_CTRL register
Tom/Nishanth,
On Thu, Mar 12, 2015 at 10:57 AM, Fabio Estevam feste...@gmail.com wrote:
On Thu, Mar 12, 2015 at 10:41 AM, Tom Rini tr...@konsulko.com wrote:
We should put this somewhere a bit more common that other A9 cores can
also call into like OMAP4, SoCFPGA and maybe zynq later (based on a
quick git grep pl310).
I thought about it as well, but I didn't find a suitable common place
for putting it.
Suggestions? Thanks
What about this?
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index 0f9d837..e3335f2 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -8,6 +8,7 @@
#include linux/types.h
#include common.h
#include asm/armv7.h
+#include asm/pl310.h
#include asm/utils.h
#define ARMV7_DCACHE_INVAL_ALL1
@@ -274,8 +275,25 @@ void flush_dcache_range(unsigned long start,
unsigned long stop)
v7_outer_cache_flush_range(start, stop);
}
+#ifdef CONFIG_SYS_L2_PL310
+static void pl310_set_override(void)
+{
+struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE;
+
+/*
+ * Set bit 22 in the auxiliary control register. If this bit
+ * is cleared, PL310 treats Normal Shared Non-cacheable
+ * accesses as Cacheable no-allocate.
+ */
+setbits_le32(pl310-pl310_aux_ctrl, L310_SHARED_ATT_OVERRIDE_ENABLE);
+}
+#endif
+
void arm_init_before_mmu(void)
{
+#ifdef CONFIG_SYS_L2_PL310
+pl310_set_override();
+#endif
v7_outer_cache_enable();
invalidate_dcache_all();
v7_inval_tlb();
diff --git a/arch/arm/include/asm/pl310.h b/arch/arm/include/asm/pl310.h
index ddc245b..de7650e 100644
--- a/arch/arm/include/asm/pl310.h
+++ b/arch/arm/include/asm/pl310.h
@@ -16,6 +16,8 @@
#define L2X0_STNDBY_MODE_EN(1 0)
#define L2X0_CTRL_EN1
+#define L310_SHARED_ATT_OVERRIDE_ENABLE(1 22)
+
struct pl310_regs {
u32 pl310_cache_id;
u32 pl310_cache_type;
--
1.9.1
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Re: [U-Boot] [PATCH] mx6: Set shared override bit in PL310 AUX_CTRL register
On Wed, Mar 11, 2015 at 05:12:12PM -0300, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Having bit 22 cleared in the PL310 Auxiliary Control register (shared attribute override enable) has the side effect of transforming Normal Shared Non-cacheable reads into Cacheable no-allocate reads. Coherent DMA buffers in Linux always have a Cacheable alias via the kernel linear mapping and the processor can speculatively load cache lines into the PL310 controller. With bit 22 cleared, Non-cacheable reads would unexpectedly hit such cache lines leading to buffer corruption. This was inspired by a patch from Catalin Marinas [1] and also from recent discussions in the linux-arm-kernel list [2] where Russell King and Rob Herring suggested that bootloaders should initialize the cache. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2010-November/031810.html [2] https://lkml.org/lkml/2015/2/20/199 Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- arch/arm/cpu/armv7/mx6/soc.c | 8 arch/arm/include/asm/pl310.h | 2 ++ 2 files changed, 10 insertions(+) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index ef02972..5aab305 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -506,6 +506,14 @@ void v7_outer_cache_enable(void) struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE; unsigned int val; + + /* + * Set bit 22 in the auxiliary control register. If this bit + * is cleared, PL310 treats Normal Shared Non-cacheable + * accesses as Cacheable no-allocate. + */ + setbits_le32(pl310-pl310_aux_ctrl, L310_SHARED_ATT_OVERRIDE_ENABLE); + #if defined CONFIG_MX6SL struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; val = readl(iomux-gpr[11]); We should put this somewhere a bit more common that other A9 cores can also call into like OMAP4, SoCFPGA and maybe zynq later (based on a quick git grep pl310). -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Writing to MMC(%d)... failed
I had tried another card with the same result. I didn't think it would be a problem since the hardkernel's release still works. I expanded the output by defining DEBUG and am updating my thread with my new findings: ... Bound device i2c@138d to root_driver - ignoring disabled device - ignoring disabled device bind node sdhci@1253 No match for node 'sdhci@1253' - ignoring disabled device bind node dwmmc@1255 No match for node 'dwmmc@1255' bind node pinctrl@1140 - found match at 'gpio_exynos' fdtdec_get_addr_size: reg: 1140 ... i2c_get_chip: Searching bus 'i2c@1386' for address 09: found, ret=0 initcall: 43e068e4 (relocated to bde3d8e4) MMC: fdtdec_add_aliases_for_id: warning: maxcount exceeded with alias 'mmc' process_nodes: count = 1 fdtdec_get_int_array: interrupts get_prop_check_min_len: interrupts fdtdec_get_int: samsung,bus-width: 0x4 (4) fdtdec_get_addr_size: reg: 1253 _gpio_request_by_name_nodev: fdtdec_parse_phandle_with_args failed _gpio_request_by_name_nodev: Node 'sdhci@1253', property 'pwr-gpios', failed to request GPIO index 0: -2 fdtdec_get_int: #gpio-cells: 0x2 (2) ... gpio=118, bank=1160 get_mmc_clk: invalid MMC index 4mmc init failed SAMSUNG SDHCI: 0, EXYNOS DWMMC: 1 initcall: 43e06890 (relocated to bde3d890) fdtdec_get_config_int: load-environment ... I think the kicker is No match for node 'sdhci@1253'. I even manually set/forced the status=okay in the dts, but it still says it's disabled. I shall continue to pursue this, working my way back from lists_bind_fdt() in lists.c If you wish to NOT be included in the reply to all, just let me know. I won't take any offense. I won't be inundating you with a lot of replies anyway as I slowly work my way through this problem. Only updating after a notable finding. On Tue, Mar 10, 2015 at 10:12 AM, Przemyslaw Marczak p.marc...@samsung.com wrote: We are often using the SD cards for a number of Odroid boards, in our office, with no issues. If you have other card, then I suggest to test it, the first one, could be tired :) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] 4K padding of ARM DT blob
Thanks a lot Masahiro Yehuda -Original Message- From: Masahiro Yamada [mailto:yamada.masah...@socionext.com] Sent: Thursday, March 12, 2015 11:50 To: Yehuda Yitschak Cc: Tom Rini; Hanna Hawa; u-boot@lists.denx.de Subject: Re: [U-Boot] 4K padding of ARM DT blob Hi. 2015-03-12 17:58 GMT+09:00 Yehuda Yitschak yehu...@marvell.com: Thanks Masahiro Actually, I am considering to modify u-boot's own FDT to reflect changes in configurable boards like development boards. So maybe the padding is good for my needs after all :) Do you see any issue with such an approach ? Yes, depending on when you modify the FDT. In Driver Model, most of drivers refer to the FDT when probing. (The offset address is stored in the of_offset member of struct udevice.) The scenario of our trouble is like this: [1] Devices are bound by dm_init_and_scan(). (udevice-of_offset is set) [2] The FDT is modified. (The offset address to each node changes.) [3] Some devices are probed (udevice-of_offset is referred, but the expected node is not there!) I guess you can modify the FDT before [1] or after[3]. Simon, What do you think? -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6: Set shared override bit in PL310 AUX_CTRL register
On 03/12/2015 09:25 AM, Fabio Estevam wrote:
Tom/Nishanth,
On Thu, Mar 12, 2015 at 10:57 AM, Fabio Estevam feste...@gmail.com wrote:
On Thu, Mar 12, 2015 at 10:41 AM, Tom Rini tr...@konsulko.com wrote:
We should put this somewhere a bit more common that other A9 cores can
also call into like OMAP4, SoCFPGA and maybe zynq later (based on a
quick git grep pl310).
I thought about it as well, but I didn't find a suitable common place
for putting it.
Suggestions? Thanks
What about this?
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index 0f9d837..e3335f2 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -8,6 +8,7 @@
#include linux/types.h
#include common.h
#include asm/armv7.h
+#include asm/pl310.h
#include asm/utils.h
#define ARMV7_DCACHE_INVAL_ALL1
@@ -274,8 +275,25 @@ void flush_dcache_range(unsigned long start,
unsigned long stop)
v7_outer_cache_flush_range(start, stop);
}
+#ifdef CONFIG_SYS_L2_PL310
+static void pl310_set_override(void)
+{
+struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE;
+
+/*
+ * Set bit 22 in the auxiliary control register. If this bit
+ * is cleared, PL310 treats Normal Shared Non-cacheable
+ * accesses as Cacheable no-allocate.
+ */
+setbits_le32(pl310-pl310_aux_ctrl, L310_SHARED_ATT_OVERRIDE_ENABLE);
I dont think this works for OMAP4 (which also uses A9, PL310) - we use
an smc #0 with service 0x109 (I have to reconfirm) to set l2 aux_ctrl.
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/mach-omap2/omap4-common.c#n178
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/mach-omap2/omap-secure.h#n44
we might want to ensure that:
a) The setting part of things get into a weak function with default
function that may be SoC dependent if needed
b) there be revision checks as needed to add this.
c) each configuration be adequately isolated perhaps?
+}
+#endif
+
void arm_init_before_mmu(void)
{
+#ifdef CONFIG_SYS_L2_PL310
+pl310_set_override();
+#endif
v7_outer_cache_enable();
invalidate_dcache_all();
v7_inval_tlb();
diff --git a/arch/arm/include/asm/pl310.h b/arch/arm/include/asm/pl310.h
index ddc245b..de7650e 100644
--- a/arch/arm/include/asm/pl310.h
+++ b/arch/arm/include/asm/pl310.h
@@ -16,6 +16,8 @@
#define L2X0_STNDBY_MODE_EN(1 0)
#define L2X0_CTRL_EN1
+#define L310_SHARED_ATT_OVERRIDE_ENABLE(1 22)
+
struct pl310_regs {
u32 pl310_cache_id;
u32 pl310_cache_type;
--
Regards,
Nishanth Menon
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Re: [U-Boot] [PATCH v5 01/14] sun7i: Remove duplicate call to psci_arch_init
Am 2015-03-12 um 13:28 schrieb Tom Rini: On Thu, Mar 12, 2015 at 08:34:34AM +0100, Jan Kiszka wrote: Am 2015-03-11 um 16:11 schrieb Tom Rini: On Mon, Mar 09, 2015 at 08:00:11AM +0100, Jan Kiszka wrote: This is already invoked a few cycles later in monitor mode by _secure_monitor. Drop it here, it serves no purpose. For clarity, because of the vector tables? Sorry, didn't get the question yet. Are you asking why it was added initially (that would be a question for Marc) or why it serves no purpose now? You're saying we can drop the call to that function from where it was because it's called a few cycles later. In mainline we would only (as far as I can see) call the function because the CPU went to the vector table and called it that way. Or rather, I'm unclear as to how the function would be called a few cycles later, can you please expand the commit message to make it clearer? Thanks! Yeah, the call chain continues like this: _sunxi_cpu_entry calls _do_nonsec_entry which which triggers via smc #0 _secure_monitor, and there we have the second invocation. There is no alternative path. Better? Jan -- Siemens AG, Corporate Technology, CT RTC ITP SES-DE Corporate Competence Center Embedded Linux ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] T2080QDS/PCIe: Soft Reset PCIe for down-training issue
-Original Message-
From: Kushwaha Prabhakar-B32579
Sent: Wednesday, March 11, 2015 8:12 PM
To: Zhao Qiang-B45475; u-boot@lists.denx.de; Sun York-R58495
Cc: Zhao Qiang-B45475
Subject: RE: [U-Boot] [PATCH v2] T2080QDS/PCIe: Soft Reset PCIe for down-
training issue
Hi Zhao,
-Original Message-
From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Zhao
Qiang
Sent: Wednesday, March 11, 2015 2:42 PM
To: u-boot@lists.denx.de; Sun York-R58495
Cc: Zhao Qiang-B45475
Subject: [U-Boot] [PATCH v2] T2080QDS/PCIe: Soft Reset PCIe for
down-training issue
T2080QDS PEX1/Slot#1 will down-train from x4 to x2, Soft reset PCIe
can fix this issue, this is a workaround.
Signed-off-by: Zhao Qiang b45...@freescale.com
---
changes for v2
- modify the commit message
drivers/pci/fsl_pci_init.c | 17 +
include/configs/T208xQDS.h
| 1 +
2 files changed, 18 insertions(+)
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index 231b075..327fa7d 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -481,6 +481,23 @@ void fsl_pci_init(struct pci_controller *hose,
struct fsl_pci_info *pci_info) #endif
}
+#ifdef CONFIG_FSL_PCIE_T2080QDS_RESET
+ int i;
+ /* assert PCIe reset */
+ setbits_be32(pci-pdb_stat, 0x0800);
+ (void) in_be32(pci-pdb_stat);
+ udelay(1000);
+ /* clear PCIe reset */
+ clrbits_be32(pci-pdb_stat, 0x0800);
+ asm(sync;isync);
+ for (i = 0; i 100 ltssm PCI_LTSSM_L0; i++) {
+ pci_hose_read_config_word(hose, dev, PCI_LTSSM,
+ ltssm);
+ udelay(1000);
+ }
+
+#endif
+
#ifdef CONFIG_SYS_P4080_ERRATUM_PCIE_A003
if (enabled == 0) {
serdes_corenet_t *srds_regs = (void
*)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index
395472b..851b4f9 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -558,6 +558,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_PCIE2 /* PCIE controler 2 */
#define CONFIG_PCIE3 /* PCIE controler 3 */
#define CONFIG_PCIE4 /* PCIE controler 4 */
+#define CONFIG_FSL_PCIE_T2080QDS_RESET
do we really require this new define?
Can we not manage with CONFIG_FSL_PCIE_RESET?
I read and test the code again, I think it is necessary for a new define.
-prabhakar
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Re: [U-Boot] [PATCH] autoboot.c: Add feature to stop autobooting via SHA256 encrypted password
Hi, On 11 March 2015 at 08:36, Tom Rini tr...@konsulko.com wrote: On Wed, Mar 11, 2015 at 09:51:37AM +0100, Stefan Roese wrote: This patch adds the feature to only stop the autobooting, and therefor boot into the U-Boot prompt, when the input string / password matches a values that is encypted via a SHA256 hash and saved in the environment. This feature is enabled by defined these config options: CONFIG_AUTOBOOT_KEYED CONFIG_AUTOBOOT_STOP_STR_SHA256 Signed-off-by: Stefan Roese s...@denx.de This is certainly interesting but I think brings us back to a point Simon made a long while back about needing to factor out this code better. Especially since this adds big long #if-#else-#endif blocks. Can we re-do this so at least have some functions be called out instead? Thanks! Also if these CONFIG options are in Kconfig (as they should be) then we can use if (IS_ENABLED(CONFIG_AUTOBOOT_STOP_STR_SHA256)) instead of #ifdef which may improve the code. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Patch to mkenvimage to handle text files with length that exceed env size
The current head revision of mkenvimage
(e72be8947e129f5ab274c0a9f235d2cc0014b2ea) will prevent you from creating
an env image from a text file that is larger than the env length specified
by the '-s' option. That doesn't make sense given that the tool now allows
comments and blank lines. This patch removes that limitation and allows
longer text files to be used.
I don't have time / desire at the moment to figure out patman and could
really care less if this is adopted up stream. Just figured I would share
in case anybody else finds it useful enough to take time to do a proper
patch.
From 39ff30190c2bf687861f4b4b33230f1944fb64f9 Mon Sep 17 00:00:00 2001
From: Brian McFarland bmcfarl...@rldrake.com
Date: Thu, 12 Mar 2015 11:37:19 -0400
Subject: [PATCH] In mkenvimage, removed the check that prevented using a
source text file larger than the output environment image. Instead, the main
parsing loop checks to see if the environment buffer is full, and quits if it
is. After the main parse loop, a second loop swallows comments and
whitespace until either the EOF is reached or more env vars are found, in
which case an error will be thrown.
---
tools/mkenvimage.c | 29 ++---
1 file changed, 22 insertions(+), 7 deletions(-)
diff --git a/tools/mkenvimage.c b/tools/mkenvimage.c
index 6971b91..8eee72e 100644
--- a/tools/mkenvimage.c
+++ b/tools/mkenvimage.c
@@ -214,14 +214,10 @@ int main(int argc, char **argv)
}
ret = close(txt_fd);
}
- /* The +1 is for the additionnal ending \0. See below. */
- if (filesize + 1 envsize) {
- fprintf(stderr, The input file is larger than the environment partition size\n);
- return EXIT_FAILURE;
- }
- /* Replace newlines separating variables with \0 */
- for (fp = 0, ep = 0 ; fp filesize ; fp++) {
+ /* Parse a byte at time until reaching the file OR until the environment fills
+ * up. Check ep against envsize - 1 to allow for extra trailing '\0'. */
+ for (fp = 0, ep = 0 ; fp filesize ep envsize - 1; fp++) {
if (filebuf[fp] == '\n') {
if (fp == 0 || filebuf[fp-1] == '\n') {
/*
@@ -249,6 +245,25 @@ int main(int argc, char **argv)
envptr[ep++] = filebuf[fp];
}
}
+ /* If there are more bytes in the file still, it means the env filled up
+ * before parsing the whole file. Eat comments whitespace here to see if
+ * there was anything meaning full left in the file, and if so, throw a error
+ * and exit. */
+ for( ; fp filesize; fp++ )
+ {
+ if (filebuf[fp] == '\n') {
+ if (fp == 0 || filebuf[fp-1] == '\n') {
+/* Ignore blank lines */
+continue;
+ }
+ } else if ((fp == 0 || filebuf[fp-1] == '\n') filebuf[fp] == '#') {
+ while (++fp filesize filebuf[fp] != '\n')
+ continue;
+ } else {
+ fprintf(stderr, The environment file is too large for the target environment storage\n);
+ return EXIT_FAILURE;
+ }
+ }
/*
* Make sure there is a final '\0'
* And do it again on the next byte to mark the end of the environment.
--
1.9.1
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[U-Boot] Wrong clocks computed when PCI_HOST disabled on MPC8313
Hello, I'm doing some work on the MPC8313, while not using the PCI bus. In order to compute the correct clocks I must set HRCWH_PCI_HOST in my configuration in order to compute the correct clock values (U-Boot clocks command, and startup message). I can live with PCI_HOST, so I will leave this on, but it might be nice to fix it in case someone wants to use this processor as PCI Agent... Best regards, Tjeerd Pinkert ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Question about board-specific Makefile actions
Hi James, 2015-03-13 3:35 GMT+09:00 James Chargin jimccr...@gmail.com: I could still use some help with this from someone who really knows how the make system works. Tom and Simon provided hints that were helpful, as I note below. On 03/09/2015 08:34 AM, James Chargin wrote: So, is no one willing to offer a hint? Thanks, Jim On 03/03/2015 01:39 PM, James Chargin wrote: I have a custom board in a git workspace for U-Boot 2014.07. I've copied most of this from the .../board/ti/beagle. My board directory Makefile looks like 8--- obj-y := board.o 8--- I'd like to add a few files to this directory that are processed during make all and have any newly derived files deleted during make clean. I've experimented with various Makefile contents but I can't get the new files processed or any newly derived files deleted. U-Boot's makefile system is quite large for my experience level and it seems I don't have enough understanding. A new file might contain some hush commands that are to be executed from the U-Boot command line. I'd like to use source to process these commands. The source command requires that its argument be an image (I get this into memory via TFTP), so I'd like make all to transform the text file containing the hush commands into the image file. I'd also like make clean to delete the derived image file. So, if my hush commands are in a text file called test.txt, I'd like make all to apply mkimage so that a test.img is generated. I'd also like make clean to delete test.img. I tried various changes to my Makefile, but the most likely seeming changes are 8--- IMG = test.img obj-y:= board.o board.o : $(IMG) %.img : %.txt $(srctree)/tools/mkimage -T script -n $* -C none -d $ $@ CLEAN_FILES += $(IMG) CLEAN_DIRS += . 8--- I assume you put these lines into your own board/my_board/Makefile. You cannot use CLEAN_FILES, CLEAN_DIRS in sub-directory Makefiles. They are only available at the top-level Makefile. Instead, clean-files is available in sub Makefiles. but, it is redundant if you are willing to add it to extra-y because files in $(extra-y) are automatically cleaned up. This doesn't work, nor has any other approach I've taken. mkimage is never run for make all and test.img doesn't get deleted if I create a fake one and run make clean Could someone offer a solution, either directly, or by pointing at an existing board that does something similar? On 03/09/2015 08:54 AM, Tom Rini wrote: Off the top of my head, try throwing test.img into obj-y ? Adding text.img to obj-y did cause the .img file to get generated, but it also added text.img to the list of files supplied to ld, causing the final u-boot link to fail Right. As you have already noticed, you should use extra-y for your purpose. On 03/09/2015 11:49 AM, Simon Glass wrote: Also you may want to add a command like cmd_img_txt (see Makefile.lib for examples). Did you need to add anything to ALL-y? Your mention of Makefile.lib prompted my to look there for other targets I might use. I discovered extra-y and adding extra-y := test.img Yes, this is correct. to my board's Makefile caused the correct operations. As you suggest, I added cmd_my_mkimage, which while not actually needed, is a very nice way to have a non-verbose progress report in the make output. Another option is to put this outside the U-Boot build system, and just run mkimage later. I really want these steps to be part of the normal board make. Requiring a separate manual build step will inevitably result in that separate step being forgotten (most probably by me). Is there any documentation you could point me at that might explain the way these Makefiles interact? As Simon suggested, Documentation/kbuild/makefiles.txt of Linux Kernel is the best one. I know most of this was derived from somewhere else (Linux kernel?) as part of the move to KConfig. But I have no To be precise, you should say Kbuild, not Kconfig. Kbuild and Kconfig should be considered separately. Kbuild - build system Kconfig - configuration system They both originate in Linux Kernel. U-Boot switched to Kbuild at 2014.04-rc1, and to Kconfig at 2014.10-rc1. You mentioned you are using u-boot v2014.07. So, you are building U-Boot with Kbuild, but using the old, conventional configuration system (mkconfig + boards.cfg). Your questions in this thread are all about Kbuild. experience with the kernel build system and following make's debug output is difficult, at best. Some overview of how makes are done would be quite helpful to me and maybe to other non-U-Boot-developers. Remaining problems: 1) I can't figure out how to clean my newly created derived .img file. I've tried each of the following four lines (one at a time), but none worked CLEAN_FILES += board/aja/helo/helo_setupdeveloper.img CLEAN_FILES += test.img CLEAN_FILES := test.img CLEAN_FILES is only available at the
Re: [U-Boot] Question about board-specific Makefile actions
Hi Simon, 2015-03-13 3:55 GMT+09:00 Simon Glass s...@chromium.org: 2) More generally, I'd like to be able to add some arbitrary make steps that are peculiar to my boards Makefile, but I can't figure this out either, so far. I've tried adding my_all to extra-y and then adding steps for my_all, similar to the following. 8--- extra-y := test.img my_all .PHONY my_all my_all : test1.txt # some arbitrary commands to be executed if test1.txt isn't present cp -f test.txt test1.txt 8--- In this case, make reports an error make[1]: *** No rule to make target `board/my_board/my_all', needed by `__build'. Stop. make: *** [board/my_board] Error 2 Any help would be appreciated. Maybe: targets += test1.txt targets is necessary for including .*.cmd files, so it has nothing to do with the error here. Moreover, as $(extra-y) is automatically added to targets, you need not touch targets in most cases. -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/3 v2] arm: mx6: tqma6: Extract baseboard configs into separate config file
This patch extracts all baseboard specific defines into a separate config file.
This makes it easier to add other baseboards that use the TQMa6 SoM.
This patch will be used by the upcoming WRU-IV board support which also
uses the TQMa6 SoM.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Markus Niebel markus.nie...@tq-group.com
Cc: Stefano Babic sba...@denx.de
---
v2:
- Move default DTT sensor definion to end of config header
for baseboards not implementing any additional sensors
- Remove comment
include/configs/tqma6.h | 57 +---
include/configs/tqma6_mba6.h | 30 +++
2 files changed, 46 insertions(+), 41 deletions(-)
create mode 100644 include/configs/tqma6_mba6.h
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index 9022550..d064c81 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -35,16 +35,6 @@
#define PHYS_SDRAM_SIZE(1024u * SZ_1M)
#endif
-#if defined(CONFIG_MBA6)
-
-#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
-#define CONFIG_DEFAULT_FDT_FILEimx6dl-mba6x.dtb
-#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6Q)
-#define CONFIG_DEFAULT_FDT_FILEimx6q-mba6x.dtb
-#endif
-
-#endif
-
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_GENERIC_BOARD
@@ -85,11 +75,6 @@
/* I2C SYSMON (LM75) */
#define CONFIG_DTT_LM75
-#if defined(CONFIG_MBA6)
-#define CONFIG_DTT_SENSORS { 0, 1 }
-#else
-#define CONFIG_DTT_SENSORS { 0 }
-#endif
#define CONFIG_DTT_MAX_TEMP70
#define CONFIG_DTT_MIN_TEMP-30
#define CONFIG_DTT_HYSTERESIS 3
@@ -150,38 +135,12 @@
#define CONFIG_PHYLIB
#define CONFIG_MII
-#if defined(CONFIG_MBA6)
-
-#define CONFIG_FEC_XCV_TYPERGMII
-#define CONFIG_ETHPRIMEFEC
-
-#define CONFIG_FEC_MXC_PHYADDR 0x03
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_KSZ9031
-
-#else
-
-#error define PHY to use for your baseboard
-
-#endif
-
#define CONFIG_ARP_TIMEOUT 200UL
/* Network config - Allow larger/faster download for TFTP/NFS */
#define CONFIG_IP_DEFRAG
#define CONFIG_TFTP_BLOCKSIZE 4096
#define CONFIG_NFS_READ_SIZE 4096
-#if defined(CONFIG_MBA6)
-
-#define CONFIG_MXC_UART_BASE UART2_BASE
-#define CONFIG_CONSOLE_DEV ttymxc1
-
-#else
-
-#error define baseboard specific things (uart, number of SD-card slots)
-
-#endif
-
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
@@ -495,4 +454,20 @@
#define CONFIG_CMD_CACHE
#endif
+/*
+ * All the defines above are for the TQMa6 SoM
+ *
+ * Now include the baseboard specific configuration
+ */
+#ifdef CONFIG_MBA6
+#include tqma6_mba6.h
+#else
+#error No baseboard for the TQMa6 defined!
+#endif
+
+/* Support at least the sensor on TQMa6 SOM */
+#if !defined(CONFIG_DTT_SENSORS)
+#define CONFIG_DTT_SENSORS { 0 }
+#endif
+
#endif /* __CONFIG_H */
diff --git a/include/configs/tqma6_mba6.h b/include/configs/tqma6_mba6.h
new file mode 100644
index 000..88c0067
--- /dev/null
+++ b/include/configs/tqma6_mba6.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2013, 2014 Markus Niebel markus.nie...@tq-group.com
+ *
+ * Configuration settings for the TQ Systems TQMa6Q,S module.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __CONFIG_TQMA6_MBA6_H
+#define __CONFIG_TQMA6_MBA6_H
+
+#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
+#define CONFIG_DEFAULT_FDT_FILEimx6dl-mba6x.dtb
+#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6Q)
+#define CONFIG_DEFAULT_FDT_FILEimx6q-mba6x.dtb
+#endif
+
+#define CONFIG_DTT_SENSORS { 0, 1 }
+
+#define CONFIG_FEC_XCV_TYPERGMII
+#define CONFIG_ETHPRIMEFEC
+
+#define CONFIG_FEC_MXC_PHYADDR 0x03
+#define CONFIG_PHY_MICREL
+#define CONFIG_PHY_KSZ9031
+
+#define CONFIG_MXC_UART_BASE UART2_BASE
+#define CONFIG_CONSOLE_DEV ttymxc1
+
+#endif /* __CONFIG_TQMA6_MBA6_H */
--
2.3.2
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Re: [U-Boot] [PATCH 3/3] arm: mx6: tqma6: Extract baseboard configs into separate config file
Hi Markus,
On 12.03.2015 15:17, Markus Niebel wrote:
I like the idea - did not know at time when we brought it to
mainline that splitting configs
is an allowed way.
No, I'm not aware of such a thing. This proposed config file addition
for the baseboard makes integration of multiple baseboards much easier
than the current approach with the ugly #ifdef mess. So I definitely
prefer this new version.
See comment.
Okay. Some answers from me as well below.
Am 12.03.2015 um 13:34 schrieb Stefan Roese:
This patch extracts all baseboard specific defines into a separate config file.
This makes it easier to add other baseboards that use the TQMa6 SoM.
This patch will be used by the upcoming WRU-IV board support which also
uses the TQMa6 SoM.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Markus Niebel markus.nie...@tq-group.com
Cc: Stefano Babic sba...@denx.de
---
include/configs/tqma6.h | 52 ++--
include/configs/tqma6_mba6.h | 32 +++
2 files changed, 43 insertions(+), 41 deletions(-)
create mode 100644 include/configs/tqma6_mba6.h
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index 9022550..69b6b57 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -35,16 +35,6 @@
#define PHYS_SDRAM_SIZE (1024u * SZ_1M)
#endif
-#if defined(CONFIG_MBA6)
-
-#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
-#define CONFIG_DEFAULT_FDT_FILEimx6dl-mba6x.dtb
-#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6Q)
-#define CONFIG_DEFAULT_FDT_FILEimx6q-mba6x.dtb
-#endif
-
-#endif
-
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_GENERIC_BOARD
@@ -85,11 +75,6 @@
/* I2C SYSMON (LM75) */
#define CONFIG_DTT_LM75
-#if defined(CONFIG_MBA6)
-#define CONFIG_DTT_SENSORS { 0, 1 }
-#else
-#define CONFIG_DTT_SENSORS { 0 }
This will be lost for baseboards not implementing DTT_SENSORS feature
I was wondering, why this define was there. And now its clear. Thanks.
I'll update the patch accordingly.
-#endif
#define CONFIG_DTT_MAX_TEMP 70
#define CONFIG_DTT_MIN_TEMP -30
#define CONFIG_DTT_HYSTERESIS 3
@@ -150,38 +135,12 @@
#define CONFIG_PHYLIB
#define CONFIG_MII
-#if defined(CONFIG_MBA6)
-
-#define CONFIG_FEC_XCV_TYPERGMII
-#define CONFIG_ETHPRIMEFEC
-
-#define CONFIG_FEC_MXC_PHYADDR 0x03
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_KSZ9031
-
-#else
-
-#error define PHY to use for your baseboard
-
-#endif
-
#define CONFIG_ARP_TIMEOUT200UL
/* Network config - Allow larger/faster download for TFTP/NFS */
#define CONFIG_IP_DEFRAG
#define CONFIG_TFTP_BLOCKSIZE 4096
#define CONFIG_NFS_READ_SIZE 4096
-#if defined(CONFIG_MBA6)
-
-#define CONFIG_MXC_UART_BASE UART2_BASE
-#define CONFIG_CONSOLE_DEV ttymxc1
-
-#else
-
-#error define baseboard specific things (uart, number of SD-card slots)
-
-#endif
-
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
@@ -495,4 +454,15 @@
#define CONFIG_CMD_CACHE
#endif
+/*
+ * All the defines above are for the TQMa6 SoM
+ *
+ * Now include the baseboard specific configuration
+ */
+#ifdef CONFIG_MBA6
+#include tqma6_mba6.h
+#else
+#error No baseboard for the TQMa6 defined!
+#endif
Maybe this is the right place to add something like:
/* support at least the sensor on TQMa6 SOM */
#if !defined(CONFIG_DTT_SENSORS)
#define CONFIG_DTT_SENSORS { 0 }
#endif
Yes, will do. Thanks.
+
#endif /* __CONFIG_H */
diff --git a/include/configs/tqma6_mba6.h b/include/configs/tqma6_mba6.h
new file mode 100644
index 000..a16120a
--- /dev/null
+++ b/include/configs/tqma6_mba6.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2013, 2014 Markus Niebel markus.nie...@tq-group.com
+ *
+ * Configuration settings for the TQ Systems TQMa6Q,S module.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __CONFIG_TQMA6_MBA6_H
+#define __CONFIG_TQMA6_MBA6_H
+
+/* And now the baseboard specific configuration */
Please delete this comment.
Okay.
Thanks,
Stefan
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[U-Boot] [PATCH v4 0/8] Extend LPC32xx functionality and add LPC32xx-based work_92015 board
This series extends functionality for the LPC32xx platform and introduces the WORK Microwave work_92105 board which makes use of the extended functionality. NOTES: A - I2C driver remains non-DM During v2 review, it was suggested to move to DM for I2C. However, this caused issues with the 'date', 'dtt' and 'eeprom' commands which are configured in this board. Therefore the I2C move to DM was not done. B - Some checkpatch diagnostics are not fixed The following warnings checkpatch warnings and checks were not fixed: 1. warning: arch/arm/Kconfig,135: please write a paragraph that describes the config symbol fully Other symbols in the same file have no description either. For consistency, I did not add the requested description. 1. check: include/configs/work_92105.h,185: spaces required around that ':' (ctx:VxV) (5 occurrences on the same line) This is due to the value of CONFIG_ETHADDR not being in quotes. As it never is in any other definition of CONFIG_ETHADDR, I left it unchanged. Changes in v4: - remove two debugging statements - add __iomem to regs struct - remove useless 'else return;' - take BB marker out of free OOB area - replace magic numbers in OOB reads/writes - add timeouts in NAND loops - use DIV_ROUND_UP where applicable - fix erroneous comment - skip bad blocks in SPL chainload loop Changes in v3: - move DM dependency constraint into Kconfig - move regs pointer and function cache into private struct - discourage readers from using functions implementation as an example - move regs and functions in private struct - remove script/Makefile.spl change - use writel() in DRAM initialization code - remove useless conditionals in dram.c - fix and complete the board README - remove redundant CONFIG_CMD_DM from config header file - add a note re the hard-coded MAC address - add 'single flashable file' make target Changes in v2: - move from legacy to Driver Model support - added MUX setting for SSP0 - cosmetic: added a blank line before copyright - move boot image generation to mkimage framework Albert ARIBAUD (3ADEV) (8): lpc32xx: add Ethernet support lpc32xx: mtd: nand: add MLC NAND controller lpc32xx: i2c: add LPC32xx I2C interface support lpc32xx: add GPIO support lpc32xx: add LPC32xx SSP support (SPI mode) dtt: add ds620 support lpc32xx: add lpc32xx-spl.bin boot image target lpc32xx: add support for board work_92105 Makefile | 20 + arch/arm/Kconfig | 6 + arch/arm/cpu/arm926ejs/lpc32xx/Makefile| 2 + arch/arm/cpu/arm926ejs/lpc32xx/clk.c | 34 ++ arch/arm/cpu/arm926ejs/lpc32xx/cpu.c | 13 + arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 43 ++ arch/arm/cpu/arm926ejs/lpc32xx/dram.c | 79 +++ arch/arm/cpu/arm926ejs/lpc32xx/lowlevel_init.S | 45 ++ arch/arm/include/asm/arch-lpc32xx/clk.h| 16 + arch/arm/include/asm/arch-lpc32xx/config.h | 3 + arch/arm/include/asm/arch-lpc32xx/cpu.h| 3 + arch/arm/include/asm/arch-lpc32xx/gpio.h | 43 ++ arch/arm/include/asm/arch-lpc32xx/mux.h| 18 + arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 8 +- board/work-microwave/work_92105/Kconfig| 15 + board/work-microwave/work_92105/MAINTAINERS| 6 + board/work-microwave/work_92105/Makefile | 10 + board/work-microwave/work_92105/README | 91 +++ board/work-microwave/work_92105/work_92105.c | 62 ++ .../work-microwave/work_92105/work_92105_display.c | 349 +++ .../work-microwave/work_92105/work_92105_display.h | 14 + board/work-microwave/work_92105/work_92105_spl.c | 33 ++ common/image.c | 1 + configs/work_92105_defconfig | 5 + drivers/gpio/Kconfig | 7 + drivers/gpio/Makefile | 1 + drivers/gpio/lpc32xx_gpio.c| 293 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/ds620.c | 65 +++ drivers/i2c/Makefile | 1 + drivers/i2c/lpc32xx_i2c.c | 249 drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/lpc32xx_nand_mlc.c| 644 + drivers/net/Makefile | 1 + drivers/net/lpc32xx_eth.c | 636 drivers/spi/Makefile | 1 + drivers/spi/lpc32xx_ssp.c | 144 + include/configs/work_92105.h | 266 + include/dtt.h | 15 +- include/image.h| 1 + include/netdev.h | 1 + tools/Makefile
Re: [U-Boot] [PATCH 2/3] arm: mx6: tqma6: Update to optionally configure an alternative SPI setup
Hi Markus,
On 12.03.2015 15:25, Markus Niebel wrote:
Am 12.03.2015 um 13:34 schrieb Stefan Roese:
By making the tqma6_iomuxc_spi() weak, this patch adds the possibility to
add a different function for this SPI configuration. This can be used
by other baseboards, that might have a different SPI setup.
This patch will be used by the upcoming WRU-IV board support which also
uses the TQMa6 SoM.
Signed-off-by: Stefan Roese s...@denx.de
---
board/tqc/tqma6/tqma6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c
index c9e163e..29db838 100644
--- a/board/tqc/tqma6/tqma6.c
+++ b/board/tqc/tqma6/tqma6.c
@@ -145,7 +145,7 @@ static unsigned const tqma6_ecspi1_cs[] = {
TQMA6_SF_CS_GPIO,
};
-static void tqma6_iomuxc_spi(void)
+__weak void tqma6_iomuxc_spi(void)
{
unsigned i;
When implementing an baseboard specific init handler, we will get
a warning about unused
tqma6_ecspi1_pads and tqma6_ecspi1_cs, or did I miss something?
I'm not getting one with the current (unfinished) WRU4 baseboard. Which
has no SPI.
Just as a thought (not ready): Could we supply CS initialisation
data via defines in the
baseboard config header and append it to the tables if needed?
Not sure if I understand this correctly. Could you give an example?
Again, my current baseboard has no SPI at all.
Thanks,
Stefan
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Re: [U-Boot] [PATCH] mx6: Set shared override bit in PL310 AUX_CTRL register
On Thu, Mar 12, 2015 at 10:15 AM, Fabio Estevam feste...@gmail.com wrote: On Thu, Mar 12, 2015 at 11:43 AM, Nishanth Menon n...@ti.com wrote: I dont think this works for OMAP4 (which also uses A9, PL310) - we use an smc #0 with service 0x109 (I have to reconfirm) to set l2 aux_ctrl. https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/mach-omap2/omap4-common.c#n178 https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/mach-omap2/omap-secure.h#n44 we might want to ensure that: a) The setting part of things get into a weak function with default function that may be SoC dependent if needed b) there be revision checks as needed to add this. c) each configuration be adequately isolated perhaps? Adding a common support for this seems to be far more complex then I expected. Maybe someone could come up with a proper common solution for this. If not, then we should go with the mx6 specific patch for the time being. Maybe the following can help? (reposting) http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/214436 -- --- Regards, Nishanth Menon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6: Set shared override bit in PL310 AUX_CTRL register
On Thu, Mar 12, 2015 at 11:43 AM, Nishanth Menon n...@ti.com wrote: I dont think this works for OMAP4 (which also uses A9, PL310) - we use an smc #0 with service 0x109 (I have to reconfirm) to set l2 aux_ctrl. https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/mach-omap2/omap4-common.c#n178 https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/arm/mach-omap2/omap-secure.h#n44 we might want to ensure that: a) The setting part of things get into a weak function with default function that may be SoC dependent if needed b) there be revision checks as needed to add this. c) each configuration be adequately isolated perhaps? Adding a common support for this seems to be far more complex then I expected. Maybe someone could come up with a proper common solution for this. If not, then we should go with the mx6 specific patch for the time being. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 1/8] lpc32xx: add Ethernet support
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/cpu.c | 9 +
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 7 +
arch/arm/include/asm/arch-lpc32xx/config.h| 3 +
arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 +
drivers/net/Makefile | 1 +
drivers/net/lpc32xx_eth.c | 636 ++
include/netdev.h | 1 +
7 files changed, 658 insertions(+)
create mode 100644 drivers/net/lpc32xx_eth.c
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/cpu.c
b/arch/arm/cpu/arm926ejs/lpc32xx/cpu.c
index 35095a9..eec4d9e 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/cpu.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/cpu.c
@@ -5,6 +5,7 @@
*/
#include common.h
+#include netdev.h
#include asm/arch/cpu.h
#include asm/arch/clk.h
#include asm/arch/wdt.h
@@ -55,3 +56,11 @@ int print_cpuinfo(void)
return 0;
}
#endif
+
+#ifdef CONFIG_LPC32XX_ETH
+int cpu_eth_init(bd_t *bis)
+{
+ lpc32xx_eth_initialize(bis);
+ return 0;
+}
+#endif
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index b567657..062db8d 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -37,3 +37,10 @@ void lpc32xx_uart_init(unsigned int uart_id)
writel(CLK_UART_X_DIV(1) | CLK_UART_Y_DIV(1),
clk-u3clk + (uart_id - 3));
}
+
+void lpc32xx_mac_init(void)
+{
+ /* Enable MAC interface */
+ writel(CLK_MAC_REG | CLK_MAC_SLAVE | CLK_MAC_MASTER
+ | CLK_MAC_MII, clk-macclk_ctrl);
+}
diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h
b/arch/arm/include/asm/arch-lpc32xx/config.h
index 564441c..d57bc48 100644
--- a/arch/arm/include/asm/arch-lpc32xx/config.h
+++ b/arch/arm/include/asm/arch-lpc32xx/config.h
@@ -52,6 +52,9 @@
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 9600, 19200, 38400, 57600, 115200, 230400, 460800 }
+/* Ethernet */
+#define LPC32XX_ETH_BASE ETHERNET_BASE
+
/* NOR Flash */
#if defined(CONFIG_SYS_FLASH_CFI)
#define CONFIG_FLASH_CFI_DRIVER
diff --git a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
index 28812be..a6b8826 100644
--- a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
@@ -8,5 +8,6 @@
#define _LPC32XX_SYS_PROTO_H
void lpc32xx_uart_init(unsigned int uart_id);
+void lpc32xx_mac_init(void);
#endif /* _LPC32XX_SYS_PROTO_H */
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index b8b0803..af8941f 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_GRETH) += greth.o
obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_net.o
obj-$(CONFIG_KS8851_MLL) += ks8851_mll.o
obj-$(CONFIG_LAN91C96) += lan91c96.o
+obj-$(CONFIG_LPC32XX_ETH) += lpc32xx_eth.o
obj-$(CONFIG_MACB) += macb.o
obj-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
obj-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o
diff --git a/drivers/net/lpc32xx_eth.c b/drivers/net/lpc32xx_eth.c
new file mode 100644
index 000..16c8ef0
--- /dev/null
+++ b/drivers/net/lpc32xx_eth.c
@@ -0,0 +1,636 @@
+/*
+ * LPC32xx Ethernet MAC interface driver
+ *
+ * (C) Copyright 2014 DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD - 3ADEV albert.arib...@3adev.fr
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include net.h
+#include malloc.h
+#include miiphy.h
+#include asm/io.h
+#include asm/errno.h
+#include asm/types.h
+#include asm/system.h
+#include asm/byteorder.h
+#include asm/arch/cpu.h
+#include asm/arch/config.h
+
+/*
+ * Notes:
+ *
+ * 1. Unless specified otherwise, all references to tables or paragraphs
+ *are to UM10326, LPC32x0 and LPC32x0/01 User manual.
+ *
+ * 2. Only bitfield masks/values which are actually used by the driver
+ *are defined.
+ */
+
+/* a single RX descriptor. The controller has an array of these */
+struct lpc32xx_eth_rxdesc {
+ u32 packet; /* Receive packet pointer */
+ u32 control;/* Descriptor command status */
+};
+
+#define LPC32XX_ETH_RX_DESC_SIZE (sizeof(struct lpc32xx_eth_rxdesc))
+
+/* RX control bitfields/masks (see Table 330) */
+#define LPC32XX_ETH_RX_CTRL_SIZE_MASK 0x07FF
+#define LPC32XX_ETH_RX_CTRL_UNUSED0x7800
+#define LPC32XX_ETH_RX_CTRL_INTERRUPT 0x8000
+
+/* a single RX status. The controller has an array of these */
+struct lpc32xx_eth_rxstat {
+ u32 statusinfo; /* Transmit Descriptor status */
+ u32 statushashcrc; /* Transmit Descriptor CRCs */
+};
+
+#define LPC32XX_ETH_RX_STAT_SIZE (sizeof(struct lpc32xx_eth_rxstat))
+
+/* RX statusinfo bitfields/masks (see Table 333) */
+#define RX_STAT_RXSIZE 0x07FF
+/* Helper: OR of all errors except RANGE */
+#define RX_STAT_ERRORS 0x1B80
+
+/* a single
[U-Boot] [PATCH v4 6/8] dtt: add ds620 support
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- cosmetic: added a blank line before copyright
drivers/hwmon/Makefile | 1 +
drivers/hwmon/ds620.c | 65 ++
include/dtt.h | 15 ++--
3 files changed, 74 insertions(+), 7 deletions(-)
create mode 100644 drivers/hwmon/ds620.c
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 25b8e8a..b4fb057 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_DTT_ADT7460) += adt7460.o
obj-$(CONFIG_DTT_DS1621) += ds1621.o
obj-$(CONFIG_DTT_DS1722) += ds1722.o
obj-$(CONFIG_DTT_DS1775) += ds1775.o
+obj-$(CONFIG_DTT_DS620) += ds620.o
obj-$(CONFIG_DTT_LM63) += lm63.o
obj-$(CONFIG_DTT_LM73) += lm73.o
obj-$(CONFIG_DTT_LM75) += lm75.o
diff --git a/drivers/hwmon/ds620.c b/drivers/hwmon/ds620.c
new file mode 100644
index 000..1ecc3da
--- /dev/null
+++ b/drivers/hwmon/ds620.c
@@ -0,0 +1,65 @@
+/*
+ * DS620 DTT support
+ *
+ * (C) Copyright 2014 3ADEV http://www.3adev.com
+ * Written-by: Albert ARIBAUD albert.arib...@3adev.fr
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * Dallas Semiconductor's DS1621/1631 Digital Thermometer and Thermostat.
+ */
+
+#include common.h
+#include i2c.h
+#include dtt.h
+
+/*
+ * Device code
+ */
+#define DTT_I2C_DEV_CODE 0x48
+#define DTT_START_CONVERT 0x51
+#define DTT_TEMP 0xAA
+#define DTT_CONFIG 0xAC
+
+/*
+ * Config register MSB bits
+ */
+#define DTT_CONFIG_1SHOT 0x01
+#define DTT_CONFIG_AUTOC 0x02
+#define DTT_CONFIG_R0 0x04 /* always 1 */
+#define DTT_CONFIG_R1 0x08 /* always 1 */
+#define DTT_CONFIG_TLF 0x10
+#define DTT_CONFIG_THF 0x20
+#define DTT_CONFIG_NVB 0x40
+#define DTT_CONFIG_DONE0x80
+
+#define CHIP(sensor) (DTT_I2C_DEV_CODE + (sensor 0x07))
+
+int dtt_init_one(int sensor)
+{
+ uint8_t config = DTT_CONFIG_1SHOT
+ | DTT_CONFIG_R0
+ | DTT_CONFIG_R1;
+ return i2c_write(CHIP(sensor), DTT_CONFIG, 1, config, 1);
+}
+
+int dtt_get_temp(int sensor)
+{
+ uint8_t status;
+ uint8_t temp[2];
+
+ /* Start a conversion, may take up to 1 second. */
+ i2c_write(CHIP(sensor), DTT_START_CONVERT, 1, NULL, 0);
+ do {
+ if (i2c_read(CHIP(sensor), DTT_CONFIG, 1, status, 1))
+ /* bail out if I2C error */
+ status |= DTT_CONFIG_DONE;
+ } while (!(status DTT_CONFIG_DONE));
+ if (i2c_read(CHIP(sensor), DTT_TEMP, 1, temp, 2))
+ /* bail out if I2C error */
+ return -274; /* below absolute zero == error */
+
+ return ((int16_t)(temp[1] | (temp[0] 8))) 7;
+}
diff --git a/include/dtt.h b/include/dtt.h
index 058bca4..173159d 100644
--- a/include/dtt.h
+++ b/include/dtt.h
@@ -12,13 +12,14 @@
#define _DTT_H_
#if defined(CONFIG_DTT_ADM1021)|| \
-defined(CONFIG_DTT_ADT7460)|| \
-defined(CONFIG_DTT_DS1621) || \
-defined(CONFIG_DTT_DS1775) || \
-defined(CONFIG_DTT_LM63) || \
-defined(CONFIG_DTT_LM73) || \
-defined(CONFIG_DTT_LM75) || \
-defined(CONFIG_DTT_LM81)
+ defined(CONFIG_DTT_ADT7460) || \
+ defined(CONFIG_DTT_DS1621) || \
+ defined(CONFIG_DTT_DS1775) || \
+ defined(CONFIG_DTT_DS620) || \
+ defined(CONFIG_DTT_LM63)|| \
+ defined(CONFIG_DTT_LM73)|| \
+ defined(CONFIG_DTT_LM75)|| \
+ defined(CONFIG_DTT_LM81)
#define CONFIG_DTT /* We have a DTT */
--
2.1.0
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[U-Boot] [PATCH v4 2/8] lpc32xx: mtd: nand: add MLC NAND controller
The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.
The SPL framework is supported.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4:
- remove two debugging statements
- add __iomem to regs struct
- remove useless 'else return;'
- take BB marker out of free OOB area
- replace magic numbers in OOB reads/writes
- add timeouts in NAND loops
- use DIV_ROUND_UP where applicable
- fix erroneous comment
- skip bad blocks in SPL chainload loop
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 6 +
arch/arm/include/asm/arch-lpc32xx/clk.h | 4 +
arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 +
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/lpc32xx_nand_mlc.c | 644 ++
5 files changed, 656 insertions(+)
create mode 100644 drivers/mtd/nand/lpc32xx_nand_mlc.c
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index 062db8d..be4c93d 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -44,3 +44,9 @@ void lpc32xx_mac_init(void)
writel(CLK_MAC_REG | CLK_MAC_SLAVE | CLK_MAC_MASTER
| CLK_MAC_MII, clk-macclk_ctrl);
}
+
+void lpc32xx_mlc_nand_init(void)
+{
+ /* Enable NAND interface */
+ writel(CLK_NAND_MLC | CLK_NAND_MLC_INT, clk-flashclk_ctrl);
+}
diff --git a/arch/arm/include/asm/arch-lpc32xx/clk.h
b/arch/arm/include/asm/arch-lpc32xx/clk.h
index 92f6c15..bc7d33d 100644
--- a/arch/arm/include/asm/arch-lpc32xx/clk.h
+++ b/arch/arm/include/asm/arch-lpc32xx/clk.h
@@ -147,6 +147,10 @@ struct clk_pm_regs {
/* DMA Clock Control Register bits */
#define CLK_DMA_ENABLE (1 0)
+/* NAND Clock Control Register bits */
+#define CLK_NAND_MLC (1 1)
+#define CLK_NAND_MLC_INT (1 5)
+
unsigned int get_sys_clk_rate(void);
unsigned int get_hclk_pll_rate(void);
unsigned int get_hclk_clk_div(void);
diff --git a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
index a6b8826..0c4e712 100644
--- a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
@@ -9,5 +9,6 @@
void lpc32xx_uart_init(unsigned int uart_id);
void lpc32xx_mac_init(void);
+void lpc32xx_mlc_nand_init(void);
#endif /* _LPC32XX_SYS_PROTO_H */
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 1f02bfc..347ea62 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o
obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
+obj-$(CONFIG_NAND_LPC32XX_MLC) += lpc32xx_nand_mlc.o
obj-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o
obj-$(CONFIG_NAND_VF610_NFC) += vf610_nfc.o
obj-$(CONFIG_NAND_MXC) += mxc_nand.o
diff --git a/drivers/mtd/nand/lpc32xx_nand_mlc.c
b/drivers/mtd/nand/lpc32xx_nand_mlc.c
new file mode 100644
index 000..389989d
--- /dev/null
+++ b/drivers/mtd/nand/lpc32xx_nand_mlc.c
@@ -0,0 +1,644 @@
+/*
+ * LPC32xx MLC NAND flash controller driver
+ *
+ * (C) Copyright 2014 3ADEV http://3adev.com
+ * Written by Albert ARIBAUD albert.arib...@3adev.fr
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * NOTE:
+ *
+ * The MLC NAND flash controller provides hardware Reed-Solomon ECC
+ * covering in- and out-of-band data together. Therefore, in- and out-
+ * of-band data must be written together in order to have a valid ECC.
+ *
+ * Consequently, pages with meaningful in-band data are written with
+ * blank (all-ones) out-of-band data and a valid ECC, and any later
+ * out-of-band data write will void the ECC.
+ *
+ * Therefore, code which reads such late-written out-of-band data
+ * should not rely on the ECC validity.
+ */
+
+#include common.h
+#include nand.h
+#include asm/errno.h
+#include asm/io.h
+#include nand.h
+#include asm/arch/clk.h
+#include asm/arch/sys_proto.h
+
+/*
+ * MLC NAND controller registers.
+ */
+struct lpc32xx_nand_mlc_registers {
+ u8 buff[32768]; /* controller's serial data buffer */
+ u8 data[32768]; /* NAND's raw data buffer */
+ u32 cmd;
+ u32 addr;
+ u32 ecc_enc_reg;
+ u32 ecc_dec_reg;
+ u32 ecc_auto_enc_reg;
+ u32 ecc_auto_dec_reg;
+ u32 rpr;
+ u32 wpr;
+ u32 rubp;
+ u32 robp;
+ u32 sw_wp_add_low;
+ u32 sw_wp_add_hig;
+ u32 icr;
+ u32 time_reg;
+ u32 irq_mr;
+ u32 irq_sr;
+ u32 lock_pr;
+ u32 isr;
+ u32 ceh;
+};
+
+/* LOCK_PR register defines */
+#define LOCK_PR_UNLOCK_KEY 0xA25E /* Magic unlock value */
+
+/* ICR defines */
+#define ICR_LARGE_BLOCKS 0x0004/* configure for 2KB blocks */
+#define ICR_ADDR4
Re: [U-Boot] [PATCH] powerpc/t1023rdb: add ddr support for t1023rdb
Shengzhou, On 03/12/2015 02:43 AM, Shengzhou Liu wrote: Tested on the discrete DDR4 MT40A512M8HX with raw timing on T1023RDB. Signed-off-by: Shengzhou Liu shengzhou@freescale.com --- board/freescale/t102xrdb/ddr.c | 78 +- 1 file changed, 77 insertions(+), 1 deletion(-) Why don't you squash this patch the the one adding T1023RDB? Could you compile the other patch without this one? York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 5/8] lpc32xx: add LPC32xx SSP support (SPI mode)
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4: None
Changes in v3:
- move regs and functions in private struct
Changes in v2:
- added MUX setting for SSP0
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 14 +++
arch/arm/include/asm/arch-lpc32xx/clk.h | 3 +
arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 +
drivers/spi/Makefile | 1 +
drivers/spi/lpc32xx_ssp.c | 144 ++
5 files changed, 163 insertions(+)
create mode 100644 drivers/spi/lpc32xx_ssp.c
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index a407098..5a453e3 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -8,11 +8,13 @@
#include asm/arch/cpu.h
#include asm/arch/clk.h
#include asm/arch/uart.h
+#include asm/arch/mux.h
#include asm/io.h
#include dm.h
static struct clk_pm_regs*clk = (struct clk_pm_regs *)CLK_PM_BASE;
static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;
+static struct mux_regs *mux = (struct mux_regs *)MUX_BASE;
void lpc32xx_uart_init(unsigned int uart_id)
{
@@ -66,3 +68,15 @@ void lpc32xx_i2c_init(unsigned int devnum)
U_BOOT_DEVICE(lpc32xx_gpios) = {
.name = gpio_lpc32xx
};
+
+/* Mux for SCK0, MISO0, MOSI0. We do not use SSEL0. */
+
+#define P_MUX_SET_SSP0 0x1600
+
+void lpc32xx_ssp_init(void)
+{
+ /* Enable SSP0 interface */
+ writel(CLK_SSP0_ENABLE_CLOCK, clk-ssp_ctrl);
+ /* Mux SSP0 pins */
+ writel(P_MUX_SET_SSP0, mux-p_mux_set);
+}
diff --git a/arch/arm/include/asm/arch-lpc32xx/clk.h
b/arch/arm/include/asm/arch-lpc32xx/clk.h
index 781ac07..2cb5703 100644
--- a/arch/arm/include/asm/arch-lpc32xx/clk.h
+++ b/arch/arm/include/asm/arch-lpc32xx/clk.h
@@ -155,6 +155,9 @@ struct clk_pm_regs {
#define CLK_NAND_MLC (1 1)
#define CLK_NAND_MLC_INT (1 5)
+/* SSP Clock Control Register bits */
+#define CLK_SSP0_ENABLE_CLOCK (1 0)
+
unsigned int get_sys_clk_rate(void);
unsigned int get_hclk_pll_rate(void);
unsigned int get_hclk_clk_div(void);
diff --git a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
index a4a05d1..86d5ee9 100644
--- a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
@@ -11,5 +11,6 @@ void lpc32xx_uart_init(unsigned int uart_id);
void lpc32xx_mac_init(void);
void lpc32xx_mlc_nand_init(void);
void lpc32xx_i2c_init(unsigned int devnum);
+void lpc32xx_ssp_init(void);
#endif /* _LPC32XX_SYS_PROTO_H */
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index edbd520..ce6f1cc 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
obj-$(CONFIG_FTSSP010_SPI) += ftssp010_spi.o
obj-$(CONFIG_ICH_SPI) += ich.o
obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
+obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o
obj-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
obj-$(CONFIG_MXC_SPI) += mxc_spi.o
diff --git a/drivers/spi/lpc32xx_ssp.c b/drivers/spi/lpc32xx_ssp.c
new file mode 100644
index 000..0fc44a0
--- /dev/null
+++ b/drivers/spi/lpc32xx_ssp.c
@@ -0,0 +1,144 @@
+/*
+ * LPC32xx SSP interface (SPI mode)
+ *
+ * (C) Copyright 2014 DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD albert.arib...@3adev.fr
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include linux/compat.h
+#include asm/io.h
+#include malloc.h
+#include spi.h
+#include asm/arch/clk.h
+
+/* SSP chip registers */
+struct ssp_regs {
+ u32 cr0;
+ u32 cr1;
+ u32 data;
+ u32 sr;
+ u32 cpsr;
+ u32 imsc;
+ u32 ris;
+ u32 mis;
+ u32 icr;
+ u32 dmacr;
+};
+
+/* CR1 register defines */
+#define SSP_CR1_SSP_ENABLE 0x0002
+
+/* SR register defines */
+#define SSP_SR_TNF 0x0002
+/* SSP status RX FIFO not empty bit */
+#define SSP_SR_RNE 0x0004
+
+/* zynq spi slave */
+struct lpc32xx_spi_slave {
+ struct spi_slave slave;
+ struct ssp_regs *regs;
+};
+
+static inline struct lpc32xx_spi_slave *to_lpc32xx_spi_slave(
+ struct spi_slave *slave)
+{
+ return container_of(slave, struct lpc32xx_spi_slave, slave);
+}
+
+/* spi_init is called during boot when CONFIG_CMD_SPI is defined */
+void spi_init(void)
+{
+ /*
+* nothing to do: clocking was enabled in lpc32xx_ssp_enable()
+* and configuration will be done in spi_setup_slave()
+ */
+}
+
+/* the following is called in sequence by do_spi_xfer() */
+
+struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
+{
+ struct lpc32xx_spi_slave *lslave;
+
+ /* we only set up SSP0 for now, so ignore bus */
+
+ if (mode SPI_3WIRE) {
+ error(3-wire mode not supported);
+ return NULL;
Re: [U-Boot] [PATCH 3/3 v2] arm: mx6: tqma6: Extract baseboard configs into separate config file
Am 12.03.2015 um 16:34 schrieb Stefan Roese:
This patch extracts all baseboard specific defines into a separate config
file.
This makes it easier to add other baseboards that use the TQMa6 SoM.
This patch will be used by the upcoming WRU-IV board support which also
uses the TQMa6 SoM.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Markus Niebel markus.nie...@tq-group.com
Cc: Stefano Babic sba...@denx.de
---
v2:
- Move default DTT sensor definion to end of config header
for baseboards not implementing any additional sensors
- Remove comment
include/configs/tqma6.h | 57
+---
include/configs/tqma6_mba6.h | 30 +++
2 files changed, 46 insertions(+), 41 deletions(-)
create mode 100644 include/configs/tqma6_mba6.h
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index 9022550..d064c81 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -35,16 +35,6 @@
#define PHYS_SDRAM_SIZE (1024u * SZ_1M)
#endif
-#if defined(CONFIG_MBA6)
-
-#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
-#define CONFIG_DEFAULT_FDT_FILE imx6dl-mba6x.dtb
-#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6Q)
-#define CONFIG_DEFAULT_FDT_FILE imx6q-mba6x.dtb
-#endif
-
-#endif
-
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_GENERIC_BOARD
@@ -85,11 +75,6 @@
/* I2C SYSMON (LM75) */
#define CONFIG_DTT_LM75
-#if defined(CONFIG_MBA6)
-#define CONFIG_DTT_SENSORS { 0, 1 }
-#else
-#define CONFIG_DTT_SENSORS { 0 }
-#endif
#define CONFIG_DTT_MAX_TEMP 70
#define CONFIG_DTT_MIN_TEMP -30
#define CONFIG_DTT_HYSTERESIS3
@@ -150,38 +135,12 @@
#define CONFIG_PHYLIB
#define CONFIG_MII
-#if defined(CONFIG_MBA6)
-
-#define CONFIG_FEC_XCV_TYPE RGMII
-#define CONFIG_ETHPRIME FEC
-
-#define CONFIG_FEC_MXC_PHYADDR 0x03
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_KSZ9031
-
-#else
-
-#error define PHY to use for your baseboard
-
-#endif
-
#define CONFIG_ARP_TIMEOUT 200UL
/* Network config - Allow larger/faster download for TFTP/NFS */
#define CONFIG_IP_DEFRAG
#define CONFIG_TFTP_BLOCKSIZE4096
#define CONFIG_NFS_READ_SIZE 4096
-#if defined(CONFIG_MBA6)
-
-#define CONFIG_MXC_UART_BASE UART2_BASE
-#define CONFIG_CONSOLE_DEV ttymxc1
-
-#else
-
-#error define baseboard specific things (uart, number of SD-card slots)
-
-#endif
-
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX1
@@ -495,4 +454,20 @@
#define CONFIG_CMD_CACHE
#endif
+/*
+ * All the defines above are for the TQMa6 SoM
+ *
+ * Now include the baseboard specific configuration
+ */
+#ifdef CONFIG_MBA6
+#include tqma6_mba6.h
+#else
+#error No baseboard for the TQMa6 defined!
+#endif
+
+/* Support at least the sensor on TQMa6 SOM */
+#if !defined(CONFIG_DTT_SENSORS)
+#define CONFIG_DTT_SENSORS { 0 }
+#endif
+
#endif /* __CONFIG_H */
diff --git a/include/configs/tqma6_mba6.h b/include/configs/tqma6_mba6.h
new file mode 100644
index 000..88c0067
--- /dev/null
+++ b/include/configs/tqma6_mba6.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2013, 2014 Markus Niebel markus.nie...@tq-group.com
+ *
+ * Configuration settings for the TQ Systems TQMa6Q,S module.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_TQMA6_MBA6_H
+#define __CONFIG_TQMA6_MBA6_H
+
+#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
+#define CONFIG_DEFAULT_FDT_FILE imx6dl-mba6x.dtb
+#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6Q)
+#define CONFIG_DEFAULT_FDT_FILE imx6q-mba6x.dtb
+#endif
+
+#define CONFIG_DTT_SENSORS { 0, 1 }
+
+#define CONFIG_FEC_XCV_TYPE RGMII
+#define CONFIG_ETHPRIME FEC
+
+#define CONFIG_FEC_MXC_PHYADDR 0x03
+#define CONFIG_PHY_MICREL
+#define CONFIG_PHY_KSZ9031
+
+#define CONFIG_MXC_UART_BASE UART2_BASE
+#define CONFIG_CONSOLE_DEV ttymxc1
+
+#endif /* __CONFIG_TQMA6_MBA6_H */
Acked-By: Markus Niebel markus.nie...@tq-group.com
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Re: [U-Boot] [PATCH] fastboot: check for alias when looking up partition by name
On 15-03-11 10:02 AM, Michael Scott wrote:
Implement an alias name check for devices where GPT limitations prevent
user-friendly partition names such as boot, system and cache. Or,
where the actual partition name doesn't match a standard partition name
used commonly with fastboot.
To set an alias, add an environment setting as follows:
fastboot_partition_alias_alias partition name=actual partition name
Example: fastboot_partition_alias_boot=LNX
Signed-off-by: Michael Scott michael.sc...@linaro.org
Cc: Steve Rae s...@broadcom.com
Cc: Lukasz Majewski l.majew...@samsung.com
---
common/fb_mmc.c | 26 --
doc/README.android-fastboot | 9 +
2 files changed, 33 insertions(+), 2 deletions(-)
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 75899e4..0c48cf9 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -33,6 +33,28 @@ void fastboot_okay(const char *s)
strncat(response_str, s, RESPONSE_LEN - 4 - 1);
}
+static int get_partition_info_efi_by_name_or_alias(block_dev_desc_t *dev_desc,
+ const char *name, disk_partition_t *info)
+{
+ int ret;
+
+ ret = get_partition_info_efi_by_name(dev_desc, name, info);
+ if (ret) {
+ /* strlen(fastboot_partition_alias_) + 32(part_name) + 1 */
+ char env_alias_name[25 + 32 + 1];
+ char *aliased_part_name;
+
+ /* check for alias */
+ strcpy(env_alias_name, fastboot_partition_alias_);
+ strncat(env_alias_name, name, 32);
+ aliased_part_name = getenv(env_alias_name);
+ if (aliased_part_name != NULL)
+ ret = get_partition_info_efi_by_name(dev_desc,
+ aliased_part_name, info);
+ }
+ return ret;
+}
+
static void write_raw_image(block_dev_desc_t *dev_desc, disk_partition_t
*info,
const char *part_name, void *buffer,
unsigned int download_bytes)
@@ -98,7 +120,7 @@ void fb_mmc_flash_write(const char *cmd, void
*download_buffer,
printf( success\n);
fastboot_okay();
return;
- } else if (get_partition_info_efi_by_name(dev_desc, cmd, info)) {
+ } else if (get_partition_info_efi_by_name_or_alias(dev_desc, cmd,
info)) {
error(cannot find partition: '%s'\n, cmd);
fastboot_fail(cannot find partition);
return;
@@ -136,7 +158,7 @@ void fb_mmc_erase(const char *cmd, char *response)
return;
}
- ret = get_partition_info_efi_by_name(dev_desc, cmd, info);
+ ret = get_partition_info_efi_by_name_or_alias(dev_desc, cmd, info);
if (ret) {
error(cannot find partition: '%s', cmd);
fastboot_fail(cannot find partition);
diff --git a/doc/README.android-fastboot b/doc/README.android-fastboot
index 5526a43..04411e9 100644
--- a/doc/README.android-fastboot
+++ b/doc/README.android-fastboot
@@ -50,6 +50,15 @@ buffer should be as large as possible for a platform. The
location of the
buffer and size are set with CONFIG_USB_FASTBOOT_BUF_ADDR and
CONFIG_USB_FASTBOOT_BUF_SIZE.
+Fastboot partition aliases can also be defined for devices where GPT
+limitations prevent user-friendly partition names such as boot, system
+and cache. Or, where the actual partition name doesn't match a standard
+partition name used commonly with fastboot. Current implentation checks
+aliases when accessing partitions by name (flash_write andThere's already a
driver
for DWC2 in drivers/usb/gadget/s3c_udc_otg.c . This driver should really
be properly renamed though ;-/ erase functions).
+To define a partition alias add an environment variable similar to:
+fastboot_partition_alias_alias partition name=actual partition name
+Example: fastboot_partition_alias_boot=LNX
+
In Action
=
Enter into fastboot by executing the fastboot command in u-boot and you
An interesting feature (which seems unnecessary to me...) However,
Acked-by: Steve Rae s...@broadcom.com
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Re: [U-Boot] [PATCH v4 2/8] lpc32xx: mtd: nand: add MLC NAND controller
Le Thu, 12 Mar 2015 16:48:43 +0100, Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr a écrit : The controller's Reed-Solomon ECC hardware is used except of course for raw reads and writes. It covers in- and out-of-band data together. The SPL framework is supported. Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr --- Changes in v4: - remove two debugging statements - add __iomem to regs struct - remove useless 'else return;' - take BB marker out of free OOB area - replace magic numbers in OOB reads/writes - add timeouts in NAND loops - use DIV_ROUND_UP where applicable - fix erroneous comment - skip bad blocks in SPL chainload loop [...] +int board_nand_init(struct nand_chip *nand) Drat. Missed the bit about CONFIG_SYS_NAND_SELF_INIT. Will fix in v5 tomorrow. Cordialement, Albert ARIBAUD 3ADEV ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] common/lcd_console: introduce display/framebuffer rotation
On 2015-03-12 13:26, Igor Grinberg wrote:
Hi Hannes,
Hi Igor,
thanks for response.
#endif
- /* Paint the logo and retrieve LCD base address */
- debug([LCD] Drawing the logo...\n);
-#if defined(CONFIG_LCD_LOGO) !defined(CONFIG_LCD_INFO_BELOW_LOGO)
- console_rows = (panel_info.vl_row - BMP_LOGO_HEIGHT);
- console_rows /= VIDEO_FONT_HEIGHT;
+ /* setup text-console */
+ debug([LCD] setting up console...\n);
+#ifdef CONFIG_LCD_ROTATION
+ lcd_init_console(lcd_base,
+panel_info.vl_col,
+panel_info.vl_row,
+panel_info.vl_rot);
#else
- console_rows = panel_info.vl_row / VIDEO_FONT_HEIGHT;
+ lcd_init_console(lcd_base,
+panel_info.vl_col,
+panel_info.vl_row,
+0);
#endif
Please, don't start the #ifdef mess here...
just always pass the panel_info.vl_rot.
This is not possible, because 'vl_rot' does'nt exist if
CONFIG_LCD_ROTATION is not defined. (have a look into lcd.h). I made
this to be compatible to all who have allready initialized a panel_info
without vl_rot.
- console_cols = panel_info.vl_col / VIDEO_FONT_WIDTH;
- lcd_init_console(lcd_base, console_rows, console_cols);
+ /* Paint the logo and retrieve LCD base address */
+ debug([LCD] Drawing the logo...\n);
if (do_splash) {
s = getenv(splashimage);
if (s) {
diff --git a/common/lcd_console.c b/common/lcd_console.c
index cac77be..6199c9a 100644
--- a/common/lcd_console.c
+++ b/common/lcd_console.c
@@ -2,6 +2,7 @@
* (C) Copyright 2001-2014
* DENX Software Engineering -- w...@denx.de
* Compulab Ltd - http://compulab.co.il/
+ * Bernecker Rainer Industrieelektronik GmbH - http://www.br-automation.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -10,26 +11,27 @@
#include lcd.h
#include video_font.h /* Get font data, width and height */
-#define CONSOLE_ROW_SIZE (VIDEO_FONT_HEIGHT * lcd_line_length)
-#define CONSOLE_ROW_FIRST cons.lcd_address
-#define CONSOLE_SIZE (CONSOLE_ROW_SIZE * cons.rows)
+#define PIXLBYTES (NBYTES(LCD_BPP))
+
+#if LCD_BPP == LCD_COLOR16
+ #define fbptr_t ushort
+#elif LCD_BPP == LCD_COLOR32
+ #define fbptr_t u32
+#else
+ #define fbptr_t uchar
+#endif
struct console_t {
short curr_col, curr_row;
short cols, rows;
void *lcd_address;
+ u32 lcdsizex, lcdsizey;
+ void (*fp_putc_xy)(ushort x, ushort y, char c);
+ void (*fp_console_moverow)(u32 rowdst, u32 rowsrc);
+ void (*fp_console_setrow)(u32 row, int clr);
};
static struct console_t cons;
-void lcd_init_console(void *address, int rows, int cols)
-{
- memset(cons, 0, sizeof(cons));
- cons.cols = cols;
- cons.rows = rows;
- cons.lcd_address = address;
-
-}
-
void lcd_set_col(short col)
{
cons.curr_col = col;
@@ -56,63 +58,221 @@ int lcd_get_screen_columns(void)
return cons.cols;
}
-static void lcd_putc_xy(ushort x, ushort y, char c)
+static void lcd_putc_xy0(ushort x, ushort y, char c)
{
- uchar *dest;
- ushort row;
int fg_color = lcd_getfgcolor();
int bg_color = lcd_getbgcolor();
+ int i, row;
+ uchar *dest = (uchar *)(cons.lcd_address +
+ y * cons.lcdsizex * PIXLBYTES +
+ x * PIXLBYTES);
+
+ for (row = 0; row VIDEO_FONT_HEIGHT; row++) {
+ fbptr_t *d = (fbptr_t *)dest;
+ uchar bits;
+ bits = video_fontdata[c * VIDEO_FONT_HEIGHT + row];
+ for (i = 0; i 8; ++i) {
+ *d++ = (bits 0x80) ? fg_color : bg_color;
+ bits = 1;
+ }
+ dest += cons.lcdsizex * PIXLBYTES;
+ }
+}
+
+static inline void console_setrow0(u32 row, int clr)
+{
int i;
+ uchar *dst = (uchar *)(cons.lcd_address +
+ row * VIDEO_FONT_HEIGHT *
+ cons.lcdsizex * PIXLBYTES);
- dest = (uchar *)(cons.lcd_address +
-y * lcd_line_length + x * NBITS(LCD_BPP) / 8);
+ fbptr_t *d = (fbptr_t *)dst;
+ for (i = 0; i (VIDEO_FONT_HEIGHT * cons.lcdsizex); i++)
+ *d++ = clr;
+}
- for (row = 0; row VIDEO_FONT_HEIGHT; ++row, dest += lcd_line_length) {
-#if LCD_BPP == LCD_COLOR16
- ushort *d = (ushort *)dest;
-#elif LCD_BPP == LCD_COLOR32
- u32 *d = (u32 *)dest;
-#else
- uchar *d = dest;
-#endif
+static inline void console_moverow0(u32 rowdst, u32 rowsrc)
+{
+ int i;
+ uchar *dst = (uchar *)(cons.lcd_address +
+ rowdst * VIDEO_FONT_HEIGHT *
+ cons.lcdsizex * PIXLBYTES);
+
+ uchar *src = (uchar *)(cons.lcd_address
Re: [U-Boot] [PATCH v2 2/4] fastboot: call board_usb_init() to enable usb
On Thursday, March 12, 2015 at 09:55:57 AM, Lukasz Majewski wrote: Hi! [...] We are not getting controller Index as an argument for fastboot function. Might have to add extra logic to get the same. But do we need configurable index here for fastboot? Experts, please advise. Some time ago we have changed syntax of all gadget related commands (from e.g. dfu mmc 0 - dfu 0 mmc 0) to support different controllers. Rationale was to prepare ourself for future changes. IMHO it would be feasible to do the same with fastboot command. However, lets wait for Marek's opinion. I'm all for that. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] fastboot: check for alias when looking up partition by name
On 03/12/2015 09:23 AM, Steve Rae wrote:
On 15-03-11 10:02 AM, Michael Scott wrote:
Implement an alias name check for devices where GPT limitations prevent
user-friendly partition names such as boot, system and cache. Or,
where the actual partition name doesn't match a standard partition name
used commonly with fastboot.
To set an alias, add an environment setting as follows:
fastboot_partition_alias_alias partition name=actual partition name
Example: fastboot_partition_alias_boot=LNX
Signed-off-by: Michael Scott michael.sc...@linaro.org
Cc: Steve Rae s...@broadcom.com
Cc: Lukasz Majewski l.majew...@samsung.com
---
common/fb_mmc.c | 26 --
doc/README.android-fastboot | 9 +
2 files changed, 33 insertions(+), 2 deletions(-)
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 75899e4..0c48cf9 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -33,6 +33,28 @@ void fastboot_okay(const char *s)
strncat(response_str, s, RESPONSE_LEN - 4 - 1);
}
+static int get_partition_info_efi_by_name_or_alias(block_dev_desc_t
*dev_desc,
+const char *name, disk_partition_t *info)
+{
+int ret;
+
+ret = get_partition_info_efi_by_name(dev_desc, name, info);
+if (ret) {
+/* strlen(fastboot_partition_alias_) + 32(part_name) + 1 */
+char env_alias_name[25 + 32 + 1];
+char *aliased_part_name;
+
+/* check for alias */
+strcpy(env_alias_name, fastboot_partition_alias_);
+strncat(env_alias_name, name, 32);
+aliased_part_name = getenv(env_alias_name);
+if (aliased_part_name != NULL)
+ret = get_partition_info_efi_by_name(dev_desc,
+aliased_part_name, info);
+}
+return ret;
+}
+
static void write_raw_image(block_dev_desc_t *dev_desc,
disk_partition_t *info,
const char *part_name, void *buffer,
unsigned int download_bytes)
@@ -98,7 +120,7 @@ void fb_mmc_flash_write(const char *cmd, void
*download_buffer,
printf( success\n);
fastboot_okay();
return;
-} else if (get_partition_info_efi_by_name(dev_desc, cmd, info)) {
+} else if (get_partition_info_efi_by_name_or_alias(dev_desc,
cmd, info)) {
error(cannot find partition: '%s'\n, cmd);
fastboot_fail(cannot find partition);
return;
@@ -136,7 +158,7 @@ void fb_mmc_erase(const char *cmd, char *response)
return;
}
-ret = get_partition_info_efi_by_name(dev_desc, cmd, info);
+ret = get_partition_info_efi_by_name_or_alias(dev_desc, cmd,
info);
if (ret) {
error(cannot find partition: '%s', cmd);
fastboot_fail(cannot find partition);
diff --git a/doc/README.android-fastboot b/doc/README.android-fastboot
index 5526a43..04411e9 100644
--- a/doc/README.android-fastboot
+++ b/doc/README.android-fastboot
@@ -50,6 +50,15 @@ buffer should be as large as possible for a
platform. The location of the
buffer and size are set with CONFIG_USB_FASTBOOT_BUF_ADDR and
CONFIG_USB_FASTBOOT_BUF_SIZE.
+Fastboot partition aliases can also be defined for devices where GPT
+limitations prevent user-friendly partition names such as boot,
system
+and cache. Or, where the actual partition name doesn't match a
standard
+partition name used commonly with fastboot. Current implentation
checks
+aliases when accessing partitions by name (flash_write andThere's
already a driver
for DWC2 in drivers/usb/gadget/s3c_udc_otg.c . This driver should really
be properly renamed though ;-/ erase functions).
Hi Steve,
I'm a bit confused with the mention of drivers/usb/gadget/s3c_udc_otg.c and
how it relates back this patch. I'm willing to make any corrections you
would
like, but may need some clarification.
+To define a partition alias add an environment variable similar to:
+fastboot_partition_alias_alias partition name=actual partition name
+Example: fastboot_partition_alias_boot=LNX
+
In Action
=
Enter into fastboot by executing the fastboot command in u-boot and
you
An interesting feature (which seems unnecessary to me...) However,
A bit of background:
We are using fastboot support on Nvidia Jetson-TK1 platform where
a GPT limitation sets partition names to 3 letters.
IE: LNX = boot, APP = system and UDA = userdata.
To present a normal fastboot experience to users, we use this patch.
Acked-by: Steve Rae s...@broadcom.com
Thank you for the Ack!
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[U-Boot] [PATCH v2 2/4] fastboot: call board_usb_init() to enable usb
g_dnl_gadget_register() fails for dra7xx dwc3 gadget when running
cmd_fastboot. Calling board_usb_init() to fix this.
fastboot command is now added with an optional controller index argument
with default value as 0, to facilitate configurable controller index.
Signed-off-by: Angela Stegmaier angelaba...@ti.com
Signed-off-by: Dileep Katta dileep.ka...@linaro.org
---
Changes in v2:
- Changed fastboot command to facilitate passing controller index
- Added board_usb_cleanup()
This patch considers the following change by Inha Song, without which
the build will be broken on BeagleBone Black platform
https://patchwork.ozlabs.org/patch/430303/
common/cmd_fastboot.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/common/cmd_fastboot.c b/common/cmd_fastboot.c
index 346ab80..9ca4a2f 100644
--- a/common/cmd_fastboot.c
+++ b/common/cmd_fastboot.c
@@ -10,11 +10,19 @@
#include common.h
#include command.h
#include g_dnl.h
+#include usb.h
static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const
argv[])
{
int ret;
+ int controller_index = 0;
+ if (argc == 2) {
+ char *usb_controller = argv[1];
+ controller_index = simple_strtoul(usb_controller, NULL, 0);
+ }
+
+ board_usb_init(controller_index, USB_INIT_DEVICE);
g_dnl_clear_detach();
ret = g_dnl_register(usb_dnl_fastboot);
if (ret)
@@ -36,12 +44,13 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int
argc, char *const argv[])
g_dnl_unregister();
g_dnl_clear_detach();
+ board_usb_cleanup(controller_index, USB_INIT_DEVICE);
return CMD_RET_SUCCESS;
}
U_BOOT_CMD(
- fastboot, 1, 0, do_fastboot,
+ fastboot, 2, 0, do_fastboot,
use USB Fastboot protocol,
- \n
- - run as a fastboot usb device
+ [USB_controller]\n
+ - run as a fastboot usb device via USB_controller
);
--
1.8.3.2
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[U-Boot] [PATCH] config: peach: Correct memory layout environment settings
The peach boards have their SDRAM start address at 0x2000 instead of 0x4000 which seems common for all other exynos5 based boards. This means the layout set in exynos5-common.h causes the kernel be loaded more then 128MB (at 0x4200) away from memory start which breaks booting kernels with CONFIG_AUTO_ZRELADDR Define a custom MEM_LAYOUT_ENV_SETTINGS for both peach boards which uses the same offsets from start of memory as the common exynos5 settings. This fixes booting via bootz and PXE Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk --- include/configs/peach-pi.h | 8 include/configs/peach-pit.h | 8 2 files changed, 16 insertions(+) diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h index f04f061..e3cb09e 100644 --- a/include/configs/peach-pi.h +++ b/include/configs/peach-pi.h @@ -16,6 +16,14 @@ #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) #define CONFIG_SPI_BOOTING +#define MEM_LAYOUT_ENV_SETTINGS \ + bootm_size=0x1000\0 \ + kernel_addr_r=0x2200\0 \ + fdt_addr_r=0x2300\0 \ + ramdisk_addr_r=0x2330\0 \ + scriptaddr=0x3000\0 \ + pxefile_addr_r=0x3100\0 + #include configs/exynos5420-common.h #include configs/exynos5-dt-common.h diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h index b5efbdc..3ee42ef 100644 --- a/include/configs/peach-pit.h +++ b/include/configs/peach-pit.h @@ -16,6 +16,14 @@ #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) #define CONFIG_SPI_BOOTING +#define MEM_LAYOUT_ENV_SETTINGS \ + bootm_size=0x1000\0 \ + kernel_addr_r=0x2200\0 \ + fdt_addr_r=0x2300\0 \ + ramdisk_addr_r=0x2330\0 \ + scriptaddr=0x3000\0 \ + pxefile_addr_r=0x3100\0 + #include configs/exynos5420-common.h #include configs/exynos5-dt-common.h -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 3/8] lpc32xx: i2c: add LPC32xx I2C interface support
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 11 ++
arch/arm/include/asm/arch-lpc32xx/clk.h | 4 +
arch/arm/include/asm/arch-lpc32xx/cpu.h | 2 +
arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 +
drivers/i2c/Makefile | 1 +
drivers/i2c/lpc32xx_i2c.c | 249 ++
6 files changed, 268 insertions(+)
create mode 100644 drivers/i2c/lpc32xx_i2c.c
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index be4c93d..81b53ea 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -50,3 +50,14 @@ void lpc32xx_mlc_nand_init(void)
/* Enable NAND interface */
writel(CLK_NAND_MLC | CLK_NAND_MLC_INT, clk-flashclk_ctrl);
}
+
+void lpc32xx_i2c_init(unsigned int devnum)
+{
+ /* Enable I2C interface */
+ uint32_t ctrl = readl(clk-i2cclk_ctrl);
+ if (devnum == 1)
+ ctrl |= CLK_I2C1_ENABLE;
+ if (devnum == 2)
+ ctrl |= CLK_I2C2_ENABLE;
+ writel(ctrl, clk-i2cclk_ctrl);
+}
diff --git a/arch/arm/include/asm/arch-lpc32xx/clk.h
b/arch/arm/include/asm/arch-lpc32xx/clk.h
index bc7d33d..781ac07 100644
--- a/arch/arm/include/asm/arch-lpc32xx/clk.h
+++ b/arch/arm/include/asm/arch-lpc32xx/clk.h
@@ -123,6 +123,10 @@ struct clk_pm_regs {
#define CLK_MAC_SLAVE (1 1)
#define CLK_MAC_REG(1 0)
+/* I2C Clock Control Register bits */
+#define CLK_I2C2_ENABLE(1 1)
+#define CLK_I2C1_ENABLE(1 0)
+
/* Timer Clock Control1 Register bits */
#define CLK_TIMCLK_MOTOR (1 6)
#define CLK_TIMCLK_TIMER3 (1 5)
diff --git a/arch/arm/include/asm/arch-lpc32xx/cpu.h
b/arch/arm/include/asm/arch-lpc32xx/cpu.h
index 199b4a0..1067107 100644
--- a/arch/arm/include/asm/arch-lpc32xx/cpu.h
+++ b/arch/arm/include/asm/arch-lpc32xx/cpu.h
@@ -37,6 +37,8 @@
#define UART4_BASE 0x40088000 /* UART 4 registers base*/
#define UART5_BASE 0x4009 /* UART 5 registers base*/
#define UART6_BASE 0x40098000 /* UART 6 registers base*/
+#define I2C1_BASE 0x400A /* I2C 1 registers base*/
+#define I2C2_BASE 0x400A8000 /* I2C 2 registers base*/
/* External SDRAM Memory Bank base addresses */
#define EMC_DYCS0_BASE 0x8000 /* SDRAM DYCS0 base address */
diff --git a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
index 0c4e712..a4a05d1 100644
--- a/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-lpc32xx/sys_proto.h
@@ -10,5 +10,6 @@
void lpc32xx_uart_init(unsigned int uart_id);
void lpc32xx_mac_init(void);
void lpc32xx_mlc_nand_init(void);
+void lpc32xx_i2c_init(unsigned int devnum);
#endif /* _LPC32XX_SYS_PROTO_H */
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 774bc94..26ea854 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
obj-$(CONFIG_SYS_I2C_IHS) += ihs_i2c.o
obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
+obj-$(CONFIG_SYS_I2C_LPC32XX) += lpc32xx_i2c.o
obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o
diff --git a/drivers/i2c/lpc32xx_i2c.c b/drivers/i2c/lpc32xx_i2c.c
new file mode 100644
index 000..78d26e4
--- /dev/null
+++ b/drivers/i2c/lpc32xx_i2c.c
@@ -0,0 +1,249 @@
+/*
+ * LPC32xx I2C interface driver
+ *
+ * (C) Copyright 2014 DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD - 3ADEV albert.arib...@3adev.fr
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include i2c.h
+#include asm/errno.h
+#include asm/arch/clk.h
+
+/*
+ * Provide default speed and slave if target did not
+ */
+
+#if !defined(CONFIG_SYS_I2C_LPC32XX_SPEED)
+#define CONFIG_SYS_I2C_LPC32XX_SPEED 35
+#endif
+
+#if !defined(CONFIG_SYS_I2C_LPC32XX_SLAVE)
+#define CONFIG_SYS_I2C_LPC32XX_SLAVE 0
+#endif
+
+/* i2c register set */
+struct lpc32xx_i2c_registers {
+ union {
+ u32 rx;
+ u32 tx;
+ };
+ u32 stat;
+ u32 ctrl;
+ u32 clk_hi;
+ u32 clk_lo;
+ u32 adr;
+ u32 rxfl;
+ u32 txfl;
+ u32 rxb;
+ u32 txb;
+ u32 stx;
+ u32 stxfl;
+};
+
+/* TX register fields */
+#define LPC32XX_I2C_TX_START 0x0100
+#define LPC32XX_I2C_TX_STOP0x0200
+
+/* Control register values */
+#define LPC32XX_I2C_SOFT_RESET 0x0100
+
+/* Status register values */
+#define LPC32XX_I2C_STAT_TFF 0x0400
+#define
[U-Boot] [PATCH v4 8/8] lpc32xx: add support for board work_92105
Work_92105 from Work Microwave is an LPC3250- based board with the following features: - 64MB SDR DRAM - 1 GB SLC NAND, managed through MLC controller. - Ethernet - Ethernet + PHY SMSC8710 - I2C: - EEPROM (24M01-compatible) - RTC (DS1374-compatible) - Temperature sensor (DS620) - DACs (2 x MAX518) - SPI (through SSP interface) - Port expander MAX6957 - LCD display (HD44780-compatible), controlled through the port expander and DACs This board has SPL support, and uses the LPC32XX boot image format. Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr --- Changes in v4: None Changes in v3: - use writel() in DRAM initialization code - remove useless conditionals in dram.c - fix and complete the board README - remove redundant CONFIG_CMD_DM from config header file - add a note re the hard-coded MAC address - add 'single flashable file' make target Changes in v2: None Makefile | 20 ++ arch/arm/Kconfig | 6 + arch/arm/cpu/arm926ejs/lpc32xx/Makefile| 2 + arch/arm/cpu/arm926ejs/lpc32xx/clk.c | 34 ++ arch/arm/cpu/arm926ejs/lpc32xx/cpu.c | 4 + arch/arm/cpu/arm926ejs/lpc32xx/dram.c | 79 + arch/arm/cpu/arm926ejs/lpc32xx/lowlevel_init.S | 45 +++ arch/arm/include/asm/arch-lpc32xx/clk.h| 5 + arch/arm/include/asm/arch-lpc32xx/cpu.h| 1 + arch/arm/include/asm/arch-lpc32xx/mux.h| 18 ++ arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 4 +- board/work-microwave/work_92105/Kconfig| 15 + board/work-microwave/work_92105/MAINTAINERS| 6 + board/work-microwave/work_92105/Makefile | 10 + board/work-microwave/work_92105/README | 91 ++ board/work-microwave/work_92105/work_92105.c | 62 .../work-microwave/work_92105/work_92105_display.c | 349 + .../work-microwave/work_92105/work_92105_display.h | 14 + board/work-microwave/work_92105/work_92105_spl.c | 33 ++ configs/work_92105_defconfig | 5 + include/configs/work_92105.h | 266 21 files changed, 1068 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/dram.c create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/lowlevel_init.S create mode 100644 arch/arm/include/asm/arch-lpc32xx/mux.h create mode 100644 board/work-microwave/work_92105/Kconfig create mode 100644 board/work-microwave/work_92105/MAINTAINERS create mode 100644 board/work-microwave/work_92105/Makefile create mode 100644 board/work-microwave/work_92105/README create mode 100644 board/work-microwave/work_92105/work_92105.c create mode 100644 board/work-microwave/work_92105/work_92105_display.c create mode 100644 board/work-microwave/work_92105/work_92105_display.h create mode 100644 board/work-microwave/work_92105/work_92105_spl.c create mode 100644 configs/work_92105_defconfig create mode 100644 include/configs/work_92105.h diff --git a/Makefile b/Makefile index 9747bd2..6013712 100644 --- a/Makefile +++ b/Makefile @@ -896,6 +896,26 @@ OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \ u-boot-with-spl.bin: spl/u-boot-spl.bin $(SPL_PAYLOAD) FORCE $(call if_changed,pad_cat) +MKIMAGEFLAGS_lpc32xx-spl.img = -T lpc32xximage -a $(CONFIG_SPL_TEXT_BASE) + +lpc32xx-spl.img: spl/u-boot-spl.bin FORCE + $(call if_changed,mkimage) + +OBJCOPYFLAGS_lpc32xx-boot-0.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) + +lpc32xx-boot-0.bin: lpc32xx-spl.img + $(call if_changed,objcopy) + +OBJCOPYFLAGS_lpc32xx-boot-1.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) + +lpc32xx-boot-1.bin: lpc32xx-spl.img + $(call if_changed,objcopy) + +lpc32xx-full.bin: lpc32xx-boot-0.bin lpc32xx-boot-1.bin u-boot.img + $(call if_changed,cat) + +CLEAN_FILES += lpc32xx-* + OBJCOPYFLAGS_u-boot-with-tpl.bin = -I binary -O binary \ --pad-to=$(CONFIG_TPL_PAD_TO) tpl/u-boot-with-tpl.bin: tpl/u-boot-tpl.bin u-boot.bin FORCE diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b9ebee1..10d9280 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -132,6 +132,11 @@ config TARGET_DEVKIT3250 bool Support devkit3250 select CPU_ARM926EJS +config TARGET_WORK_92105 + bool Support work_92105 + select CPU_ARM926EJS + select SUPPORT_SPL + config TARGET_MX25PDK bool Support mx25pdk select CPU_ARM926EJS @@ -871,6 +876,7 @@ source board/vpac270/Kconfig source board/wandboard/Kconfig source board/warp/Kconfig source board/woodburn/Kconfig +source board/work-microwave/work_92105/Kconfig source board/xaeniax/Kconfig source board/xilinx/zynqmp/Kconfig source board/zipitz2/Kconfig diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/Makefile b/arch/arm/cpu/arm926ejs/lpc32xx/Makefile index 314f004..4837377 100644 ---
[U-Boot] [PATCH v4 4/8] lpc32xx: add GPIO support
This driver only supports Driver Model, not legacy model.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4: None
Changes in v3:
- move DM dependency constraint into Kconfig
- move regs pointer and function cache into private struct
- discourage readers from using functions implementation as an example
Changes in v2:
- move from legacy to Driver Model support
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 5 +
arch/arm/include/asm/arch-lpc32xx/gpio.h | 43 +
drivers/gpio/Kconfig | 7 +
drivers/gpio/Makefile| 1 +
drivers/gpio/lpc32xx_gpio.c | 293 +++
5 files changed, 349 insertions(+)
create mode 100644 arch/arm/include/asm/arch-lpc32xx/gpio.h
create mode 100644 drivers/gpio/lpc32xx_gpio.c
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index 81b53ea..a407098 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -9,6 +9,7 @@
#include asm/arch/clk.h
#include asm/arch/uart.h
#include asm/io.h
+#include dm.h
static struct clk_pm_regs*clk = (struct clk_pm_regs *)CLK_PM_BASE;
static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;
@@ -61,3 +62,7 @@ void lpc32xx_i2c_init(unsigned int devnum)
ctrl |= CLK_I2C2_ENABLE;
writel(ctrl, clk-i2cclk_ctrl);
}
+
+U_BOOT_DEVICE(lpc32xx_gpios) = {
+ .name = gpio_lpc32xx
+};
diff --git a/arch/arm/include/asm/arch-lpc32xx/gpio.h
b/arch/arm/include/asm/arch-lpc32xx/gpio.h
new file mode 100644
index 000..3bd94e3
--- /dev/null
+++ b/arch/arm/include/asm/arch-lpc32xx/gpio.h
@@ -0,0 +1,43 @@
+/*
+ * LPC32xx GPIO interface
+ *
+ * (C) Copyright 2014 DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD albert.arib...@3adev.fr
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/**
+ * GPIO Register map for LPC32xx
+ */
+
+struct gpio_regs {
+ u32 p3_inp_state;
+ u32 p3_outp_set;
+ u32 p3_outp_clr;
+ u32 p3_outp_state;
+ /* Watch out! the following are shared between p2 and p3 */
+ u32 p2_p3_dir_set;
+ u32 p2_p3_dir_clr;
+ u32 p2_p3_dir_state;
+ /* Now back to 'one register for one port' */
+ u32 p2_inp_state;
+ u32 p2_outp_set;
+ u32 p2_outp_clr;
+ u32 reserved1[6];
+ u32 p0_inp_state;
+ u32 p0_outp_set;
+ u32 p0_outp_clr;
+ u32 p0_outp_state;
+ u32 p0_dir_set;
+ u32 p0_dir_clr;
+ u32 p0_dir_state;
+ u32 reserved2;
+ u32 p1_inp_state;
+ u32 p1_outp_set;
+ u32 p1_outp_clr;
+ u32 p1_outp_state;
+ u32 p1_dir_set;
+ u32 p1_dir_clr;
+ u32 p1_dir_state;
+};
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index b609e73..7b5178a 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -7,3 +7,10 @@ config DM_GPIO
the GPIO uclass. Drivers provide methods to query the
particular GPIOs that they provide. The uclass interface
is defined in include/asm-generic/gpio.h.
+
+config LPC32XX_GPIO
+ bool LPC32XX GPIO driver
+ depends on DM
+ default n
+ help
+ Support for the LPC32XX GPIO driver.
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index fe9a3b2..85f71c5 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -41,3 +41,4 @@ obj-$(CONFIG_ADI_GPIO2) += adi_gpio2.o
obj-$(CONFIG_TCA642X) += tca642x.o
oby-$(CONFIG_SX151X) += sx151x.o
obj-$(CONFIG_SUNXI_GPIO) += sunxi_gpio.o
+obj-$(CONFIG_LPC32XX_GPIO) += lpc32xx_gpio.o
diff --git a/drivers/gpio/lpc32xx_gpio.c b/drivers/gpio/lpc32xx_gpio.c
new file mode 100644
index 000..96b3125
--- /dev/null
+++ b/drivers/gpio/lpc32xx_gpio.c
@@ -0,0 +1,293 @@
+/*
+ * LPC32xxGPIO driver
+ *
+ * (C) Copyright 2014 DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD albert.arib...@3adev.fr
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include asm/io.h
+#include asm/arch-lpc32xx/cpu.h
+#include asm/arch-lpc32xx/gpio.h
+#include asm-generic/gpio.h
+#include dm.h
+
+/**
+ * LPC32xx GPIOs work in banks but are non-homogeneous:
+ * - each bank holds a different number of GPIOs
+ * - some GPIOs are input/ouput, some input only, some output only;
+ * - some GPIOs have different meanings as an input and as an output;
+ * - some GPIOs are controlled on a given port and bit index, but
+ * read on another one.
+*
+ * In order to keep this code simple, GPIOS are considered here as
+ * homogeneous and linear, from 0 to 127.
+ *
+ * ** WARNING #1 **
+ *
+ * Client code is responsible for properly using valid GPIO numbers,
+ * including cases where a single physical GPIO has differing numbers
+ * for setting its direction, reading it and/or writing to it.
+ *
+ * ** WARNING #2 **
+ *
+ * Please read NOTE in description of
[U-Boot] [PATCH v4 7/8] lpc32xx: add lpc32xx-spl.bin boot image target
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4: None
Changes in v3:
- remove script/Makefile.spl change
Changes in v2:
- move boot image generation to mkimage framework
common/image.c | 1 +
include/image.h | 1 +
tools/Makefile | 1 +
tools/lpc32xximage.c | 178 +++
4 files changed, 181 insertions(+)
create mode 100644 tools/lpc32xximage.c
diff --git a/common/image.c b/common/image.c
index a911aa9..162b682 100644
--- a/common/image.c
+++ b/common/image.c
@@ -149,6 +149,7 @@ static const table_entry_t uimage_type[] = {
{ IH_TYPE_MXSIMAGE, mxsimage, Freescale MXS Boot Image,},
{ IH_TYPE_ATMELIMAGE, atmelimage, ATMEL ROM-Boot Image,},
{ IH_TYPE_X86_SETUP, x86_setup, x86 setup.bin,},
+ { IH_TYPE_LPC32XXIMAGE, lpc32xximage, LPC32XX Boot Image, },
{ -1, , , },
};
diff --git a/include/image.h b/include/image.h
index 0e6af00..3844be6 100644
--- a/include/image.h
+++ b/include/image.h
@@ -242,6 +242,7 @@ struct lmb;
#define IH_TYPE_ATMELIMAGE 18 /* ATMEL ROM bootable Image */
#define IH_TYPE_SOCFPGAIMAGE 19 /* Altera SOCFPGA Preloader */
#define IH_TYPE_X86_SETUP 20 /* x86 setup.bin Image */
+#define IH_TYPE_LPC32XXIMAGE 21 /* x86 setup.bin Image */
/*
* Compression Types
diff --git a/tools/Makefile b/tools/Makefile
index 88770b0..4bbb153 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -83,6 +83,7 @@ dumpimage-mkimage-objs := aisimage.o \
imximage.o \
kwbimage.o \
lib/md5.o \
+ lpc32xximage.o \
mxsimage.o \
omapimage.o \
os_support.o \
diff --git a/tools/lpc32xximage.c b/tools/lpc32xximage.c
new file mode 100644
index 000..6b3865f
--- /dev/null
+++ b/tools/lpc32xximage.c
@@ -0,0 +1,178 @@
+/*
+ * Image manipulator for LPC32XX SoCs
+ *
+ * (C) Copyright 2015 DENX Software Engineering GmbH
+ * Written-by: Albert ARIBAUD albert.arib...@3adev.fr
+ *
+ * Derived from omapimage.c:
+ *
+ * (C) Copyright 2010
+ * Linaro LTD, www.linaro.org
+ * Author: John Rigby john.ri...@linaro.org
+ * Based on TI's signGP.c
+ *
+ * (C) Copyright 2009
+ * Stefano Babic, DENX Software Engineering, sba...@denx.de.
+ *
+ * (C) Copyright 2008
+ * Marvell Semiconductor www.marvell.com
+ * Written-by: Prafulla Wadaskar prafu...@marvell.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include imagetool.h
+#include compiler.h
+#include image.h
+
+/*
+ * NAND page 0 boot header
+ */
+
+struct nand_page_0_boot_header {
+ uint32_t data[129];
+ uint32_t pad[383];
+};
+
+/*
+ * Default ICC (interface configuration data [sic]) if none specified
+ * in board config
+ */
+
+#ifndef LPC32XX_BOOT_ICR
+#define LPC32XX_BOOT_ICR 0x0096
+#endif
+
+/*
+ * Default boot NAND page size if none specified in board config
+ */
+
+#ifndef LPC32XX_BOOT_NAND_PAGESIZE
+#define LPC32XX_BOOT_NAND_PAGESIZE 2048
+#endif
+
+/*
+ * Default boot NAND pages per sector if none specified in board config
+ */
+
+#ifndef LPC32XX_BOOT_NAND_PAGES_PER_SECTOR
+#define LPC32XX_BOOT_NAND_PAGES_PER_SECTOR 64
+#endif
+
+/*
+ * Maximum size for boot code is 56K unless defined in board config
+ */
+
+#ifndef LPC32XX_BOOT_CODESIZE
+#define LPC32XX_BOOT_CODESIZE (56*1024)
+#endif
+
+/* signature byte for a readable block */
+
+#define LPC32XX_BOOT_BLOCK_OK 0xaa
+
+static struct nand_page_0_boot_header lpc32xximage_header;
+
+static int lpc32xximage_check_image_types(uint8_t type)
+{
+ if (type == IH_TYPE_LPC32XXIMAGE)
+ return EXIT_SUCCESS;
+ return EXIT_FAILURE;
+}
+
+static int lpc32xximage_verify_header(unsigned char *ptr, int image_size,
+ struct image_tool_params *params)
+{
+ struct nand_page_0_boot_header *hdr =
+ (struct nand_page_0_boot_header *)ptr;
+
+ /* turn image size from bytes to NAND pages, page 0 included */
+ int image_size_in_pages = ((image_size - 1)
+ / LPC32XX_BOOT_NAND_PAGESIZE);
+
+ if (hdr-data[0] != (0xff LPC32XX_BOOT_ICR))
+ return -1;
+ if (hdr-data[1] != (0xff ~LPC32XX_BOOT_ICR))
+ return -1;
+ if (hdr-data[2] != (0xff LPC32XX_BOOT_ICR))
+ return -1;
+ if (hdr-data[3] != (0xff ~LPC32XX_BOOT_ICR))
+ return -1;
+ if (hdr-data[4] != (0xff image_size_in_pages))
+ return -1;
+ if (hdr-data[5] != (0xff ~image_size_in_pages))
+ return -1;
+ if (hdr-data[6] != (0xff image_size_in_pages))
+ return -1;
+ if (hdr-data[7] != (0xff ~image_size_in_pages))
+ return -1;
+ if (hdr-data[8] != (0xff
Re: [U-Boot] [PATCH] fastboot: check for alias when looking up partition by name
On 15-03-12 10:17 AM, Michael Scott wrote:
On 03/12/2015 09:23 AM, Steve Rae wrote:
On 15-03-11 10:02 AM, Michael Scott wrote:
Implement an alias name check for devices where GPT limitations prevent
user-friendly partition names such as boot, system and cache. Or,
where the actual partition name doesn't match a standard partition name
used commonly with fastboot.
To set an alias, add an environment setting as follows:
fastboot_partition_alias_alias partition name=actual partition name
Example: fastboot_partition_alias_boot=LNX
Signed-off-by: Michael Scott michael.sc...@linaro.org
Cc: Steve Rae s...@broadcom.com
Cc: Lukasz Majewski l.majew...@samsung.com
---
common/fb_mmc.c | 26 --
doc/README.android-fastboot | 9 +
2 files changed, 33 insertions(+), 2 deletions(-)
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 75899e4..0c48cf9 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -33,6 +33,28 @@ void fastboot_okay(const char *s)
strncat(response_str, s, RESPONSE_LEN - 4 - 1);
}
+static int get_partition_info_efi_by_name_or_alias(block_dev_desc_t
*dev_desc,
+const char *name, disk_partition_t *info)
+{
+int ret;
+
+ret = get_partition_info_efi_by_name(dev_desc, name, info);
+if (ret) {
+/* strlen(fastboot_partition_alias_) + 32(part_name) + 1 */
+char env_alias_name[25 + 32 + 1];
+char *aliased_part_name;
+
+/* check for alias */
+strcpy(env_alias_name, fastboot_partition_alias_);
+strncat(env_alias_name, name, 32);
+aliased_part_name = getenv(env_alias_name);
+if (aliased_part_name != NULL)
+ret = get_partition_info_efi_by_name(dev_desc,
+aliased_part_name, info);
+}
+return ret;
+}
+
static void write_raw_image(block_dev_desc_t *dev_desc,
disk_partition_t *info,
const char *part_name, void *buffer,
unsigned int download_bytes)
@@ -98,7 +120,7 @@ void fb_mmc_flash_write(const char *cmd, void
*download_buffer,
printf( success\n);
fastboot_okay();
return;
-} else if (get_partition_info_efi_by_name(dev_desc, cmd, info)) {
+} else if (get_partition_info_efi_by_name_or_alias(dev_desc,
cmd, info)) {
error(cannot find partition: '%s'\n, cmd);
fastboot_fail(cannot find partition);
return;
@@ -136,7 +158,7 @@ void fb_mmc_erase(const char *cmd, char *response)
return;
}
-ret = get_partition_info_efi_by_name(dev_desc, cmd, info);
+ret = get_partition_info_efi_by_name_or_alias(dev_desc, cmd,
info);
if (ret) {
error(cannot find partition: '%s', cmd);
fastboot_fail(cannot find partition);
diff --git a/doc/README.android-fastboot b/doc/README.android-fastboot
index 5526a43..04411e9 100644
--- a/doc/README.android-fastboot
+++ b/doc/README.android-fastboot
@@ -50,6 +50,15 @@ buffer should be as large as possible for a
platform. The location of the
buffer and size are set with CONFIG_USB_FASTBOOT_BUF_ADDR and
CONFIG_USB_FASTBOOT_BUF_SIZE.
+Fastboot partition aliases can also be defined for devices where GPT
+limitations prevent user-friendly partition names such as boot,
system
+and cache. Or, where the actual partition name doesn't match a
standard
+partition name used commonly with fastboot. Current implentation
checks
+aliases when accessing partitions by name (flash_write andThere's
already a driver
for DWC2 in drivers/usb/gadget/s3c_udc_otg.c . This driver should really
be properly renamed though ;-/ erase functions).
Hi Steve,
I'm a bit confused with the mention of drivers/usb/gadget/s3c_udc_otg.c and
how it relates back this patch. I'm willing to make any corrections you
would
like, but may need some clarification.
Sorry -- I corrupted this (finger trouble!) - please ignore
+To define a partition alias add an environment variable similar to:
+fastboot_partition_alias_alias partition name=actual partition name
+Example: fastboot_partition_alias_boot=LNX
+
In Action
=
Enter into fastboot by executing the fastboot command in u-boot and
you
An interesting feature (which seems unnecessary to me...) However,
A bit of background:
We are using fastboot support on Nvidia Jetson-TK1 platform where
a GPT limitation sets partition names to 3 letters.
IE: LNX = boot, APP = system and UDA = userdata.
OK -- then this patch makes much more sense!
- so when the user performs mmc part, (I'm assuming it will list the
3 letter names), then they perform fastboot flash LNX boot.bin
(which makes sense to me)
- or they can setup these aliases and perform fastboot flash boot boot.bin
(I would probably stick with the former myself...)
Thanks, Steve
To present a normal fastboot experience to users, we use this patch.
Acked-by: Steve Rae s...@broadcom.com
Thank you for the Ack!
___
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Re: [U-Boot] [PATCH v1 1/4] ARM: DRA7XX: Add config file for Android with fastboot support
On Thu, Mar 12, 2015 at 12:01:15PM +0530, Dileep Katta wrote: Hi Tom and Lukasz, On 4 March 2015 at 22:22, Tom Rini tr...@konsulko.com wrote: On Tue, Mar 03, 2015 at 04:40:41PM +0530, Dileep Katta wrote: Signed-off-by: Angela Stegmaier angelaba...@ti.com Signed-off-by: Dileep Katta dileep.ka...@linaro.org --- arch/arm/cpu/armv7/omap5/Kconfig | 5 + board/ti/dra7xx/Kconfig | 13 ++ board/ti/dra7xx/MAINTAINERS | 2 + configs/dra7xx_evm_android_defconfig | 5 + include/configs/dra7xx_evm_android.h | 313 +++ 5 files changed, 338 insertions(+) create mode 100644 configs/dra7xx_evm_android_defconfig create mode 100644 include/configs/dra7xx_evm_android.h I _really_ don't like how we're duplicating large hunks of dra7xx_evm.h. The first question is, what parts of this are not appropriate to just do in dra7xx_evm.h directly? And the second question would be, which of those cannot simply be done via Kconfig choices. Discussed this with Angela from TI, and arrived at a common header file so that the duplication could be avoided. Will send a follow-up patch with the update. Note that I'm still skeptical that there's things that can't just be Kconfig choices and the rest just be in dra7xx_evm.h. Sort out and come up with a common flash/etc layout and so forth. Thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Question about board-specific Makefile actions
I could still use some help with this from someone who really knows how the make system works. Tom and Simon provided hints that were helpful, as I note below. On 03/09/2015 08:34 AM, James Chargin wrote: So, is no one willing to offer a hint? Thanks, Jim On 03/03/2015 01:39 PM, James Chargin wrote: I have a custom board in a git workspace for U-Boot 2014.07. I've copied most of this from the .../board/ti/beagle. My board directory Makefile looks like 8--- obj-y := board.o 8--- I'd like to add a few files to this directory that are processed during make all and have any newly derived files deleted during make clean. I've experimented with various Makefile contents but I can't get the new files processed or any newly derived files deleted. U-Boot's makefile system is quite large for my experience level and it seems I don't have enough understanding. A new file might contain some hush commands that are to be executed from the U-Boot command line. I'd like to use source to process these commands. The source command requires that its argument be an image (I get this into memory via TFTP), so I'd like make all to transform the text file containing the hush commands into the image file. I'd also like make clean to delete the derived image file. So, if my hush commands are in a text file called test.txt, I'd like make all to apply mkimage so that a test.img is generated. I'd also like make clean to delete test.img. I tried various changes to my Makefile, but the most likely seeming changes are 8--- IMG = test.img obj-y:= board.o board.o : $(IMG) %.img : %.txt $(srctree)/tools/mkimage -T script -n $* -C none -d $ $@ CLEAN_FILES += $(IMG) CLEAN_DIRS += . 8--- This doesn't work, nor has any other approach I've taken. mkimage is never run for make all and test.img doesn't get deleted if I create a fake one and run make clean Could someone offer a solution, either directly, or by pointing at an existing board that does something similar? On 03/09/2015 08:54 AM, Tom Rini wrote: Off the top of my head, try throwing test.img into obj-y ? Adding text.img to obj-y did cause the .img file to get generated, but it also added text.img to the list of files supplied to ld, causing the final u-boot link to fail On 03/09/2015 11:49 AM, Simon Glass wrote: Also you may want to add a command like cmd_img_txt (see Makefile.lib for examples). Did you need to add anything to ALL-y? Your mention of Makefile.lib prompted my to look there for other targets I might use. I discovered extra-y and adding extra-y := test.img to my board's Makefile caused the correct operations. As you suggest, I added cmd_my_mkimage, which while not actually needed, is a very nice way to have a non-verbose progress report in the make output. Another option is to put this outside the U-Boot build system, and just run mkimage later. I really want these steps to be part of the normal board make. Requiring a separate manual build step will inevitably result in that separate step being forgotten (most probably by me). Is there any documentation you could point me at that might explain the way these Makefiles interact? I know most of this was derived from somewhere else (Linux kernel?) as part of the move to KConfig. But I have no experience with the kernel build system and following make's debug output is difficult, at best. Some overview of how makes are done would be quite helpful to me and maybe to other non-U-Boot-developers. Remaining problems: 1) I can't figure out how to clean my newly created derived .img file. I've tried each of the following four lines (one at a time), but none worked CLEAN_FILES += board/aja/helo/helo_setupdeveloper.img CLEAN_FILES += test.img CLEAN_FILES := test.img clean-files += test.img clean-files := test.img 2) More generally, I'd like to be able to add some arbitrary make steps that are peculiar to my boards Makefile, but I can't figure this out either, so far. I've tried adding my_all to extra-y and then adding steps for my_all, similar to the following. 8--- extra-y := test.img my_all .PHONY my_all my_all : test1.txt # some arbitrary commands to be executed if test1.txt isn't present cp -f test.txt test1.txt 8--- In this case, make reports an error make[1]: *** No rule to make target `board/my_board/my_all', needed by `__build'. Stop. make: *** [board/my_board] Error 2 Any help would be appreciated. Thanks, Jim ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Question about board-specific Makefile actions
+Masahiro Hi James, On 12 March 2015 at 12:35, James Chargin jimccr...@gmail.com wrote: I could still use some help with this from someone who really knows how the make system works. Tom and Simon provided hints that were helpful, as I note below. On 03/09/2015 08:34 AM, James Chargin wrote: So, is no one willing to offer a hint? Thanks, Jim On 03/03/2015 01:39 PM, James Chargin wrote: I have a custom board in a git workspace for U-Boot 2014.07. I've copied most of this from the .../board/ti/beagle. My board directory Makefile looks like 8--- obj-y := board.o 8--- I'd like to add a few files to this directory that are processed during make all and have any newly derived files deleted during make clean. I've experimented with various Makefile contents but I can't get the new files processed or any newly derived files deleted. U-Boot's makefile system is quite large for my experience level and it seems I don't have enough understanding. A new file might contain some hush commands that are to be executed from the U-Boot command line. I'd like to use source to process these commands. The source command requires that its argument be an image (I get this into memory via TFTP), so I'd like make all to transform the text file containing the hush commands into the image file. I'd also like make clean to delete the derived image file. So, if my hush commands are in a text file called test.txt, I'd like make all to apply mkimage so that a test.img is generated. I'd also like make clean to delete test.img. I tried various changes to my Makefile, but the most likely seeming changes are 8--- IMG = test.img obj-y:= board.o board.o : $(IMG) %.img : %.txt $(srctree)/tools/mkimage -T script -n $* -C none -d $ $@ CLEAN_FILES += $(IMG) CLEAN_DIRS += . 8--- This doesn't work, nor has any other approach I've taken. mkimage is never run for make all and test.img doesn't get deleted if I create a fake one and run make clean Could someone offer a solution, either directly, or by pointing at an existing board that does something similar? On 03/09/2015 08:54 AM, Tom Rini wrote: Off the top of my head, try throwing test.img into obj-y ? Adding text.img to obj-y did cause the .img file to get generated, but it also added text.img to the list of files supplied to ld, causing the final u-boot link to fail On 03/09/2015 11:49 AM, Simon Glass wrote: Also you may want to add a command like cmd_img_txt (see Makefile.lib for examples). Did you need to add anything to ALL-y? Your mention of Makefile.lib prompted my to look there for other targets I might use. I discovered extra-y and adding extra-y := test.img to my board's Makefile caused the correct operations. As you suggest, I added cmd_my_mkimage, which while not actually needed, is a very nice way to have a non-verbose progress report in the make output. Another option is to put this outside the U-Boot build system, and just run mkimage later. I really want these steps to be part of the normal board make. Requiring a separate manual build step will inevitably result in that separate step being forgotten (most probably by me). Is there any documentation you could point me at that might explain the way these Makefiles interact? I know most of this was derived from somewhere else (Linux kernel?) as part of the move to KConfig. But I have no experience with the kernel build system and following make's debug output is difficult, at best. Some overview of how makes are done would be quite helpful to me and maybe to other non-U-Boot-developers. Yes it is called Kbuild. You could try this: https://www.kernel.org/doc/Documentation/kbuild/makefiles.txt Remaining problems: 1) I can't figure out how to clean my newly created derived .img file. I've tried each of the following four lines (one at a time), but none worked CLEAN_FILES += board/aja/helo/helo_setupdeveloper.img CLEAN_FILES += test.img CLEAN_FILES := test.img clean-files += test.img clean-files := test.img You could try adding $(warning CLEAN_FILES is $(CLEAN_FILES)) in a few places in the Makefile. 2) More generally, I'd like to be able to add some arbitrary make steps that are peculiar to my boards Makefile, but I can't figure this out either, so far. I've tried adding my_all to extra-y and then adding steps for my_all, similar to the following. 8--- extra-y := test.img my_all .PHONY my_all my_all : test1.txt # some arbitrary commands to be executed if test1.txt isn't present cp -f test.txt test1.txt 8--- In this case, make reports an error make[1]: *** No rule to make target `board/my_board/my_all', needed by `__build'. Stop. make: *** [board/my_board] Error 2 Any help would be appreciated. Maybe: targets += test1.txt Masahiro may know about this one. Regards, Simon ___ U-Boot mailing list
Re: [U-Boot] [PATCH] Odroid-XU3: Undefine TRACE CONFIGs in Odroid XU3
Hi, On 12 March 2015 at 00:27, Sjoerd Simons sjoerd.sim...@collabora.co.uk wrote: On Thu, 2015-03-12 at 14:32 +0900, Inha Song wrote: This patch undefines Trace configs in Odroidx XU3. Trace configs are defined in exynos5-common.h Would be great to explain why you want to disable trace on this specific board but leave it enabled on all other exynos5 boards? Can I suggest putting an #ifdef FTRACE around the #define options as with sandbox.h? Signed-off-by: Inha Song ideal.s...@samsung.com --- include/configs/odroid_xu3.h | 5 + 1 file changed, 5 insertions(+) diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index c395020..f427fe2 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -23,6 +23,11 @@ #define TZPC_BASE_OFFSET 0x1 +/* TRACE configs are defined in exynos5-common */ +#undef CONFIG_TRACE +#undef CONFIG_CMD_TRACE +#undef CONFIG_TRACE_EARLY + #define CONFIG_CMD_MMC #define CONFIG_NR_DRAM_BANKS 8 Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] x86: quark: Enable on-chip ethernet controllers
Hi Bin,
On 10 March 2015 at 20:25, Bin Meng bmeng...@gmail.com wrote:
Intel Quark SoC integrates two 10/100 ethernet controllers which can
be connected to an external RMII PHY. The MAC IP is from Designware.
Enable this support with the existing U-Boot Designware MAC driver
so that the ethernet port on Intel Galileo board can be used.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
arch/x86/cpu/quark/quark.c | 19 +++
include/configs/galileo.h | 5 +
2 files changed, 24 insertions(+)
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index dccf7ac..25edcf7 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -6,6 +6,8 @@
#include common.h
#include mmc.h
+#include netdev.h
+#include phy.h
#include asm/io.h
#include asm/pci.h
#include asm/post.h
@@ -116,3 +118,20 @@ int cpu_mmc_init(bd_t *bis)
return pci_mmc_init(Quark SDHCI, mmc_supported,
ARRAY_SIZE(mmc_supported));
}
+
+int cpu_eth_init(bd_t *bis)
+{
+ u32 base;
+ int ret0, ret1;
+
+ pci_read_config_dword(QUARK_EMAC0, PCI_BASE_ADDRESS_0, base);
+ ret0 = designware_initialize(base, PHY_INTERFACE_MODE_RMII);
+
+ pci_read_config_dword(QUARK_EMAC1, PCI_BASE_ADDRESS_0, base);
+ ret1 = designware_initialize(base, PHY_INTERFACE_MODE_RMII);
+
+ if (ret0 0 ret1 0)
+ return -1;
+ else
+ return 0;
+}
diff --git a/include/configs/galileo.h b/include/configs/galileo.h
index d745f4e..65a2c3e 100644
--- a/include/configs/galileo.h
+++ b/include/configs/galileo.h
@@ -57,4 +57,9 @@
#define CONFIG_MMC_SDMA
#define CONFIG_CMD_MMC
+/* 10/100M Ethernet support */
+#define CONFIG_DESIGNWARE_ETH
+#define CONFIG_DW_ALTDESCRIPTOR
+#define CONFIG_PHYLIB
+
#endif /* __CONFIG_H */
--
1.8.2.1
Acked-by: Simon Glass s...@chromium.org
BTW I expect the driver model Ethernet support to land soon, and I
sent a series that moves the Designware Ethernet to driver model. So
by the time we come to apply this, we may want to use that. But as
things stand it looks good.
Regards,
Simon
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Re: [U-Boot] Clearing silent environment variable not taking affect at boot
Hi Chris, On 10 March 2015 at 20:22, Chris Packham judge.pack...@gmail.com wrote: Hi, I have a board using SPI flash for it's boot-loader and environment, I'm currently based of u-boot 2014.01. In my boards config file I have the following #define CONFIG_SILENT_CONSOLE #define CONFIG_SILENT_U_BOOT_ONLY #define CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC #define CONFIG_BOARD_EXTRA_ENV_SETTINGS silent=1 By default I want u-boot to be silent, and that's what I get. But for debugging I do want to be able to run setenv silent; saveenv; reset to enable non-silent mode. Unfortunately this doesn't work for me. I _think_ the problem is that when console_init_f() is called the environment can't be read from SPI flash so I get the default silent=1 behaviour (and that's OK). After relocation the environment is read from SPI flash for some reason the on_silent() callback isn't called I'm not sure why but I'm guessing that hdelete_r() is bypassed (possibly because the whole default environment is dropped) thus the callback for silent being deleted is not invoked. Is my thinking along the right lines? Would there be any objection to doing something like this: diff --git a/common/console.c b/common/console.c index 29560c3..6719019 100644 --- a/common/console.c +++ b/common/console.c @@ -808,6 +808,11 @@ int console_init_r(void) struct list_head *pos; struct stdio_dev *dev; +#ifdef CONFIG_SILENT_CONSOLE + if (getenv(silent) == NULL) + gd-flags = ~GD_FLG_SILENT; +#endif + #ifdef CONFIG_SPLASH_SCREEN /* * suppress all output if splash screen is enabled and we have We have something similar in console_init_f() so should probably put this code in a separate (common) function called from both places. But as you say, I cannot see where else this happens. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] x86: crownbay: Enable saving environment in SPI flash
On 11 March 2015 at 02:22, Bin Meng bmeng...@gmail.com wrote: Saving U-Boot's environment in SPI flash on Intel CrownBay board. Signed-off-by: Bin Meng bmeng...@gmail.com --- include/configs/crownbay.h | 8 1 file changed, 8 insertions(+) diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index b927b1c..4a74f82 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -56,4 +56,12 @@ #undef CONFIG_VIDEO #undef CONFIG_CFB_CONSOLE +/* Environment configuration */ +#undef CONFIG_ENV_IS_NOWHERE +#undef CONFIG_ENV_SIZE +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SIZE0x1000 +#define CONFIG_ENV_SECT_SIZE 0x1000 +#define CONFIG_ENV_OFFSET 0 + #endif /* __CONFIG_H */ -- 1.8.2.1 Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] x86: galileo: Enable saving environment in SPI flash
On 11 March 2015 at 02:22, Bin Meng bmeng...@gmail.com wrote: Saving U-Boot's environment in SPI flash on Intel Galileo board. Signed-off-by: Bin Meng bmeng...@gmail.com --- include/configs/galileo.h | 8 1 file changed, 8 insertions(+) diff --git a/include/configs/galileo.h b/include/configs/galileo.h index 65a2c3e..288acf3 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -62,4 +62,12 @@ #define CONFIG_DW_ALTDESCRIPTOR #define CONFIG_PHYLIB +/* Environment configuration */ +#undef CONFIG_ENV_IS_NOWHERE +#undef CONFIG_ENV_SIZE +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SIZE0x1000 +#define CONFIG_ENV_SECT_SIZE 0x1000 +#define CONFIG_ENV_OFFSET 0 + #endif /* __CONFIG_H */ -- 1.8.2.1 Acked-by: Simon Glass s...@chromium.org I wonder at what point we should move some of this to x86-common.h? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] MinnowBoard Max uboot
Hi Thomas, On 11 March 2015 at 05:06, Beaman, Thomas thomas.bea...@xerox.com wrote: Thank you, can you keep me updated if possible. OK I'll see if I can copy you on the patches. Regards, Simon Tom -Original Message- From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass Sent: Tuesday, March 10, 2015 1:21 PM To: Beaman, Thomas Cc: u-boot@lists.denx.de; Bin Meng; gabriel huau Subject: Re: MinnowBoard Max uboot Hi Tom, On 10 March 2015 at 05:24, Beaman, Thomas thomas.bea...@xerox.com wrote: Hi Simon, Do you know what will be the timeframe of when someone may be able to look at this in more detail. I will be able to help test any updates if needed I will take a look once I have things lined up for the next release, likely mid April. Regards, Simon Thanks, Tom -Original Message- From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass Sent: Monday, March 09, 2015 11:49 AM To: Beaman, Thomas Cc: u-boot@lists.denx.de; Bin Meng; gabriel huau Subject: Re: MinnowBoard Max uboot +Bin and Gabriel Hi Tom, On 9 March 2015 at 08:08, Beaman, Thomas thomas.bea...@xerox.com wrote: Hi Simon, I see you have put support for the MinnowBoard Max in the u-boot mainline. Thanks this is a very useful addition. I have been able to follow your readme and build a working bare metal uboot. Using the built uboot I can load and bring up a Linux Kernel. What I noticed from the running kernel is that only one of the two cores on the E3825 is running. In the power PC uboots I usually see a section for the multiple cores in the .dts file. My questions is how do I get both CPUs running on this board. Is it a uboot .dts file setup that will enable this, or is something in the kernel start up that does this. As a test I boot the same kernel using the EFI BIOS on the minnow board and both CPUs are running. Any suggestions or comments you have would be welcomed. My guess is that the LAPIC CPU start-up is missing. It isn't 100% clear what the FSP does and does not do, but perhaps it does not do that. I did make something of a start on this with ivybridge but it isn't complete, and it seems to be needed here. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/t1023rdb: Add T1023 RDB board support
T1023RDB is a Freescale Reference Design Board that hosts the T1023 SoC. T1023RDB board Overview --- - T1023 SoC integrating two 64-bit e5500 cores up to 1.4GHz - CoreNet fabric supporting coherent and noncoherent transactions with prioritization and bandwidth allocation - SDRAM memory: 2GB Micron MT40A512M8HX unbuffered 32-bit DDR4 without ECC - Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC - Ethernet interfaces: - one 1G RGMII port on-board(RTL8211F PHY) - one 1G SGMII port on-board(RTL8211F PHY) - one 2.5G SGMII port on-board(AQR105 PHY) - PCIe: Two Mini-PCIe connectors on-board. - SerDes: 4 lanes up to 10.3125GHz - NOR: 128MB S29GL01GS110TFIV10 Spansion NOR Flash - NAND: 512MB S34MS04G200BFI000 Spansion NAND Flash - eSPI: 64MB S25FL512SAGMFI010 Spansion SPI flash. - USB: one Type-A USB 2.0 port with internal PHY - eSDHC: support SD/MMC and eMMC card - 256Kbit M24256 I2C EEPROM - RTC: Real-time clock DS1339 on I2C bus - UART: one serial port on-board with RJ45 connector - Debugging: JTAG/COP for T1023 debugging As well updated T1024RDB to add T1023RDB. Signed-off-by: Shengzhou Liu shengzhou@freescale.com --- board/freescale/t102xrdb/Makefile | 2 +- board/freescale/t102xrdb/README | 89 +- board/freescale/t102xrdb/eth_t102xrdb.c | 23 +++- board/freescale/t102xrdb/t1023_rcw.cfg | 8 +++ board/freescale/t102xrdb/t102xrdb.c | 98 +++-- board/freescale/t102xrdb/t102xrdb.h | 4 +- include/configs/T102xRDB.h | 73 7 files changed, 263 insertions(+), 34 deletions(-) create mode 100644 board/freescale/t102xrdb/t1023_rcw.cfg diff --git a/board/freescale/t102xrdb/Makefile b/board/freescale/t102xrdb/Makefile index a0cf8f6..0520066 100644 --- a/board/freescale/t102xrdb/Makefile +++ b/board/freescale/t102xrdb/Makefile @@ -8,7 +8,7 @@ ifdef CONFIG_SPL_BUILD obj-y += spl.o else obj-y += t102xrdb.o -obj-y += cpld.o +obj-$(CONFIG_T1024RDB) += cpld.o obj-y += eth_t102xrdb.o obj-$(CONFIG_PCI) += pci.o endif diff --git a/board/freescale/t102xrdb/README b/board/freescale/t102xrdb/README index 2b17f50..775de06 100644 --- a/board/freescale/t102xrdb/README +++ b/board/freescale/t102xrdb/README @@ -98,6 +98,29 @@ T1024RDB board Overview - Four I2C ports +T1023RDB board Overview +--- +- T1023 SoC integrating two 64-bit e5500 cores up to 1.4GHz +- CoreNet fabric supporting coherent and noncoherent transactions with + prioritization and bandwidth allocation +- SDRAM memory: 2GB Micron MT40A512M8HX unbuffered 32-bit DDR4 w/o ECC +- Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC +- Ethernet interfaces: + - one 1G RGMII port on-board(RTL8211FS PHY) + - one 1G SGMII port on-board(RTL8211FS PHY) + - one 2.5G SGMII port on-board(AQR105 PHY) +- PCIe: Two Mini-PCIe connectors on-board. +- SerDes: 4 lanes up to 10.3125GHz +- NOR: 128MB S29GL01GS110TFIV10 Spansion NOR Flash +- NAND: 512MB S34MS04G200BFI000 Spansion NAND Flash +- eSPI: 64MB S25FL512SAGMFI010 Spansion SPI flash. +- USB: one Type-A USB 2.0 port with internal PHY +- eSDHC: support SD/MMC and eMMC card +- 256Kbit M24256 I2C EEPROM +- RTC: Real-time clock DS1339U on I2C bus +- UART: one serial port on-board with RJ45 connector +- Debugging: JTAG/COP for T1023 debugging + Memory map on T1024RDB -- Start Address End Address DescriptionSize @@ -124,22 +147,32 @@ Start Address End Address Definition Max size 0xEFF2 0xEFF3 u-boot env (current bank) 128KB 0xEFF0 0xEFF1 FMAN Ucode (current bank) 128KB 0xEFE0 0xEFE3 QE firmware (current bank) 256KB -0xED30 0xEFEF rootfs (alt bank) 44MB +0xED30 0xEFDF rootfs (alt bank) 44MB +0xED00 0xED2F Guest image #3 (alternate bank) 3MB +0xECD0 0xECFF Guest image #2 (alternate bank) 3MB +0xECA0 0xECCF Guest image #1 (alternate bank) 3MB +0xEC90 0xEC9F HV config device tree(alt bank) 1MB 0xEC80 0xEC8F Hardware device tree (alt bank) 1MB -0xEC02 0xEC7F Linux.uImage (alt bank)7MB + 875KB +0xEC70 0xEC7F HV.uImage (alternate bank) 1MB +0xEC02 0xEC6F Linux.uImage (alt bank)~7MB 0xEC00 0xEC01 RCW (alt bank) 128KB 0xEBF4 0xEBFF u-boot (alt bank) 768KB 0xEBF2 0xEBF3 u-boot env (alt bank) 128KB 0xEBF0 0xEBF1 FMAN ucode (alt bank) 128KB 0xEBE0 0xEBE3 QE firmware (alt bank) 256KB -0xE930 0xEBEF rootfs (current bank) 44MB +0xE930
[U-Boot] [PATCH v2] misc: led: Add PCA9551 LED driver
This patch adds a driver for the PCA9551 LED controller.
Originated-by: Timo Herbrecher t.herbrec...@gateware.de
Signed-off-by: Stefan Roese s...@denx.de
Reviewed-by: Tom Rini tr...@konsulko.com
Cc: Fabio Estevam feste...@gmail.com
---
v2:
- Removed __packed fromstruct pca9551_blink_rate as it doesn't seem to be
needed
- Removed PCA9551 dependency from Kconfig to allow usage with other boards
- Better handling of return codes as suggested by Fabio
drivers/misc/Kconfig | 13
drivers/misc/Makefile | 1 +
drivers/misc/pca9551_led.c | 155 +
3 files changed, 169 insertions(+)
create mode 100644 drivers/misc/pca9551_led.c
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 36a8f0d..4114be3 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -61,3 +61,16 @@ config CONFIG_FSL_SEC_MON
system states.
Security Monitor can be transitioned on any security failures,
like software violations or hardware security violations.
+
+config PCA9551_LED
+ bool Enable PCA9551 LED driver
+ help
+ Enable driver for PCA9551 LED controller. This controller
+ is connected via I2C. So I2C needs to be enabled.
+
+config PCA9551_I2C_ADDR
+ hex I2C address of PCA9551 LED controller
+ depends on PCA9551_LED
+ default 0x60
+ help
+ The I2C address of the PCA9551 LED controller.
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 6028cd4..149e686 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -29,3 +29,4 @@ obj-$(CONFIG_STATUS_LED) += status_led.o
obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
obj-$(CONFIG_FSL_IFC) += fsl_ifc.o
obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o
+obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
diff --git a/drivers/misc/pca9551_led.c b/drivers/misc/pca9551_led.c
new file mode 100644
index 000..79b1e20
--- /dev/null
+++ b/drivers/misc/pca9551_led.c
@@ -0,0 +1,155 @@
+/*
+ * Copyright (C) 2015 Stefan Roese s...@denx.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include errno.h
+#include i2c.h
+
+#ifndef CONFIG_PCA9551_I2C_ADDR
+#error CONFIG_PCA9551_I2C_ADDR not defined!
+#endif
+
+#define PCA9551_REG_INPUT 0x00/* Input register (read only) */
+#define PCA9551_REG_PSC0 0x01/* Frequency prescaler 0 */
+#define PCA9551_REG_PWM0 0x02/* PWM0 */
+#define PCA9551_REG_PSC1 0x03/* Frequency prescaler 1 */
+#define PCA9551_REG_PWM1 0x04/* PWM1 */
+#define PCA9551_REG_LS00x05/* LED0 to LED3 selector */
+#define PCA9551_REG_LS10x06/* LED4 to LED7 selector */
+
+#define PCA9551_CTRL_AI(1 4)/* Auto-increment flag
*/
+
+#define PCA9551_LED_STATE_ON 0x00
+#define PCA9551_LED_STATE_OFF 0x01
+#define PCA9551_LED_STATE_BLINK0 0x02
+#define PCA9551_LED_STATE_BLINK1 0x03
+
+struct pca9551_blink_rate {
+ u8 psc; /* Frequency preescaler, see PCA9551_7.pdf p. 6 */
+ u8 pwm; /* Pulse width modulation, see PCA9551_7.pdf p. 6 */
+};
+
+static int freq0, freq1;
+
+static int pca9551_led_get_state(int led, int *state)
+{
+ unsigned int reg;
+ u8 shift, buf;
+ int ret;
+
+ if (led 0 || led 7) {
+ return -EINVAL;
+ } else if (led 4) {
+ reg = PCA9551_REG_LS0;
+ shift = led 1;
+ } else {
+ reg = PCA9551_REG_LS1;
+ shift = (led - 4) 1;
+ }
+
+ ret = i2c_read(CONFIG_PCA9551_I2C_ADDR, reg, 1, buf, 1);
+ if (ret)
+ return ret;
+
+ *state = (buf shift) 0x03;
+ return 0;
+}
+
+static int pca9551_led_set_state(int led, int state)
+{
+ unsigned int reg;
+ u8 shift, buf, mask;
+ int ret;
+
+ if (led 0 || led 7) {
+ return -EINVAL;
+ } else if (led 4) {
+ reg = PCA9551_REG_LS0;
+ shift = led 1;
+ } else {
+ reg = PCA9551_REG_LS1;
+ shift = (led - 4) 1;
+ }
+ mask = 0x03 shift;
+
+ ret = i2c_read(CONFIG_PCA9551_I2C_ADDR, reg, 1, buf, 1);
+ if (ret)
+ return ret;
+
+ buf = (buf ~mask) | ((state 0x03) shift);
+
+ ret = i2c_write(CONFIG_PCA9551_I2C_ADDR, reg, 1, buf, 1);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int pca9551_led_set_blink_rate(int idx, struct pca9551_blink_rate rate)
+{
+ unsigned int reg;
+ int ret;
+
+ switch (idx) {
+ case 0:
+ reg = PCA9551_REG_PSC0;
+ break;
+ case 1:
+ reg = PCA9551_REG_PSC1;
+ break;
+ default:
+ return -EINVAL;
+ }
+ reg |= PCA9551_CTRL_AI;
+
+ ret = i2c_write(CONFIG_PCA9551_I2C_ADDR, reg, 1, (u8 *)rate, 2);
+ if (ret)
+ return ret;
+
[U-Boot] [PATCH] net/phy: Add support for realtek RTL8211F
RTL8211F has different registers from RTL8211E.
This patch adds support for RTL8211F PHY which
can be found on Freescale's T1023 RDB board.
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
drivers/net/phy/realtek.c | 84 +++
1 file changed, 84 insertions(+)
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index a3ace68..fbb46f9 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -21,6 +21,17 @@
#define MIIM_RTL8211x_PHYSTAT_SPDDONE 0x0800
#define MIIM_RTL8211x_PHYSTAT_LINK 0x0400
+/* RTL8211F PHY Status Register */
+#define MIIM_RTL8211F_PHY_STATUS 0x1a
+#define MIIM_RTL8211F_AUTONEG_ENABLE 0x1000
+#define MIIM_RTL8211F_PHYSTAT_SPEED0x0030
+#define MIIM_RTL8211F_PHYSTAT_GBIT 0x0020
+#define MIIM_RTL8211F_PHYSTAT_100 0x0010
+#define MIIM_RTL8211F_PHYSTAT_DUPLEX 0x0008
+#define MIIM_RTL8211F_PHYSTAT_SPDDONE 0x0800
+#define MIIM_RTL8211F_PHYSTAT_LINK 0x0004
+
+#define MIIM_RTL8211F_PAGE_SELECT 0x1f
/* RealTek RTL8211x */
static int rtl8211x_config(struct phy_device *phydev)
@@ -89,6 +100,58 @@ static int rtl8211x_parse_status(struct phy_device *phydev)
return 0;
}
+static int rtl8211f_parse_status(struct phy_device *phydev)
+{
+ unsigned int speed;
+ unsigned int mii_reg;
+ int i = 0;
+
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, 0xa43);
+ mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PHY_STATUS);
+
+ phydev-link = 1;
+ while (!(mii_reg MIIM_RTL8211F_PHYSTAT_LINK)) {
+ if (i PHY_AUTONEGOTIATE_TIMEOUT) {
+ puts( TIMEOUT !\n);
+ phydev-link = 0;
+ break;
+ }
+
+ if ((i++ % 1000) == 0)
+ putc('.');
+ udelay(1000);
+ mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
+ MIIM_RTL8211F_PHY_STATUS);
+ }
+
+ if (mii_reg MIIM_RTL8211F_PHYSTAT_DUPLEX)
+ phydev-duplex = DUPLEX_FULL;
+ else
+ phydev-duplex = DUPLEX_HALF;
+
+ speed = (mii_reg MIIM_RTL8211F_PHYSTAT_SPEED);
+
+ switch (speed) {
+ case MIIM_RTL8211F_PHYSTAT_GBIT:
+ phydev-speed = SPEED_1000;
+ break;
+ case MIIM_RTL8211F_PHYSTAT_100:
+ phydev-speed = SPEED_100;
+ break;
+ default:
+ phydev-speed = SPEED_10;
+ }
+
+ if (phydev-interface == PHY_INTERFACE_MODE_RGMII) {
+ /* enable TXDLY */
+ phy_write(phydev, MDIO_DEVAD_NONE,
+ MIIM_RTL8211F_PAGE_SELECT, 0xd08);
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x11, 0x109);
+ }
+
+ return 0;
+}
+
static int rtl8211x_startup(struct phy_device *phydev)
{
/* Read the Status (2x to make sure link is right) */
@@ -98,6 +161,15 @@ static int rtl8211x_startup(struct phy_device *phydev)
return 0;
}
+static int rtl8211f_startup(struct phy_device *phydev)
+{
+ /* Read the Status (2x to make sure link is right) */
+ genphy_update_link(phydev);
+ rtl8211f_parse_status(phydev);
+
+ return 0;
+}
+
/* Support for RTL8211B PHY */
static struct phy_driver RTL8211B_driver = {
.name = RealTek RTL8211B,
@@ -131,10 +203,22 @@ static struct phy_driver RTL8211DN_driver = {
.shutdown = genphy_shutdown,
};
+/* Support for RTL8211F PHY */
+static struct phy_driver RTL8211F_driver = {
+ .name = RealTek RTL8211F,
+ .uid = 0x1cc916,
+ .mask = 0xff,
+ .features = PHY_GBIT_FEATURES,
+ .config = rtl8211x_config,
+ .startup = rtl8211f_startup,
+ .shutdown = genphy_shutdown,
+};
+
int phy_realtek_init(void)
{
phy_register(RTL8211B_driver);
phy_register(RTL8211E_driver);
+ phy_register(RTL8211F_driver);
phy_register(RTL8211DN_driver);
return 0;
--
2.1.0.27.g96db324
___
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Re: [U-Boot] [PATCH v5 01/14] sun7i: Remove duplicate call to psci_arch_init
On Thu, Mar 12, 2015 at 08:34:34AM +0100, Jan Kiszka wrote: Am 2015-03-11 um 16:11 schrieb Tom Rini: On Mon, Mar 09, 2015 at 08:00:11AM +0100, Jan Kiszka wrote: This is already invoked a few cycles later in monitor mode by _secure_monitor. Drop it here, it serves no purpose. For clarity, because of the vector tables? Sorry, didn't get the question yet. Are you asking why it was added initially (that would be a question for Marc) or why it serves no purpose now? You're saying we can drop the call to that function from where it was because it's called a few cycles later. In mainline we would only (as far as I can see) call the function because the CPU went to the vector table and called it that way. Or rather, I'm unclear as to how the function would be called a few cycles later, can you please expand the commit message to make it clearer? Thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2][v2] pci/layerscape: remove unnecessary pcie_layerscape.h
On Thu, Mar 12, 2015 at 10:58:48AM +0800, Minghuan Lian wrote: The patch uses the common function name ft_pci_setup to replace ft_pcie_setup, then removes unnecessary pcie_layerscape.h because all the functions have been declared in common.h. Signed-off-by: Minghuan Lian minghuan.l...@freescale.com Thanks for reworking things! Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] common/lcd_console: introduce display/framebuffer rotation
Hi Hannes,
On 03/11/15 14:57, Hannes Petermaier wrote:
From: Hannes Petermaier hannes.peterma...@br-automation.com
Sometimes, for example if the display is mounted in portrait mode or even if
it
mounted landscape but rotated by 180 degrees, we need to rotate our content of
the display respectively the framebuffer, so that user can read the messages
who are printed out.
For this we introduce the feature called CONFIG_LCD_ROTATION, this may be
defined in the board-configuration if needed. After this the lcd_console will
be initialized with a given rotation from vl_rot out of vidinfo_t which is
provided by the board specific code.
If CONFIG_LCD_ROTATION is not defined, the console will be initialized with
0 degrees rotation - the screen behaves like the days before.
Signed-off-by: Hannes Petermaier hannes.peterma...@br-automation.com
Signed-off-by: Hannes Petermaier oe5...@oevsv.at
[...]
diff --git a/common/lcd.c b/common/lcd.c
index f33942c..dfa4c69 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -167,7 +167,6 @@ int drv_lcd_init(void)
void lcd_clear(void)
{
- short console_rows, console_cols;
int bg_color;
char *s;
ulong addr;
@@ -211,16 +210,21 @@ void lcd_clear(void)
}
#endif
#endif
- /* Paint the logo and retrieve LCD base address */
- debug([LCD] Drawing the logo...\n);
-#if defined(CONFIG_LCD_LOGO) !defined(CONFIG_LCD_INFO_BELOW_LOGO)
- console_rows = (panel_info.vl_row - BMP_LOGO_HEIGHT);
- console_rows /= VIDEO_FONT_HEIGHT;
+ /* setup text-console */
+ debug([LCD] setting up console...\n);
+#ifdef CONFIG_LCD_ROTATION
+ lcd_init_console(lcd_base,
+ panel_info.vl_col,
+ panel_info.vl_row,
+ panel_info.vl_rot);
#else
- console_rows = panel_info.vl_row / VIDEO_FONT_HEIGHT;
+ lcd_init_console(lcd_base,
+ panel_info.vl_col,
+ panel_info.vl_row,
+ 0);
#endif
Please, don't start the #ifdef mess here...
just always pass the panel_info.vl_rot.
- console_cols = panel_info.vl_col / VIDEO_FONT_WIDTH;
- lcd_init_console(lcd_base, console_rows, console_cols);
+ /* Paint the logo and retrieve LCD base address */
+ debug([LCD] Drawing the logo...\n);
if (do_splash) {
s = getenv(splashimage);
if (s) {
diff --git a/common/lcd_console.c b/common/lcd_console.c
index cac77be..6199c9a 100644
--- a/common/lcd_console.c
+++ b/common/lcd_console.c
@@ -2,6 +2,7 @@
* (C) Copyright 2001-2014
* DENX Software Engineering -- w...@denx.de
* Compulab Ltd - http://compulab.co.il/
+ * Bernecker Rainer Industrieelektronik GmbH - http://www.br-automation.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -10,26 +11,27 @@
#include lcd.h
#include video_font.h /* Get font data, width and height */
-#define CONSOLE_ROW_SIZE (VIDEO_FONT_HEIGHT * lcd_line_length)
-#define CONSOLE_ROW_FIRSTcons.lcd_address
-#define CONSOLE_SIZE (CONSOLE_ROW_SIZE * cons.rows)
+#define PIXLBYTES(NBYTES(LCD_BPP))
+
+#if LCD_BPP == LCD_COLOR16
+ #define fbptr_t ushort
+#elif LCD_BPP == LCD_COLOR32
+ #define fbptr_t u32
+#else
+ #define fbptr_t uchar
+#endif
struct console_t {
short curr_col, curr_row;
short cols, rows;
void *lcd_address;
+ u32 lcdsizex, lcdsizey;
+ void (*fp_putc_xy)(ushort x, ushort y, char c);
+ void (*fp_console_moverow)(u32 rowdst, u32 rowsrc);
+ void (*fp_console_setrow)(u32 row, int clr);
};
static struct console_t cons;
-void lcd_init_console(void *address, int rows, int cols)
-{
- memset(cons, 0, sizeof(cons));
- cons.cols = cols;
- cons.rows = rows;
- cons.lcd_address = address;
-
-}
-
void lcd_set_col(short col)
{
cons.curr_col = col;
@@ -56,63 +58,221 @@ int lcd_get_screen_columns(void)
return cons.cols;
}
-static void lcd_putc_xy(ushort x, ushort y, char c)
+static void lcd_putc_xy0(ushort x, ushort y, char c)
{
- uchar *dest;
- ushort row;
int fg_color = lcd_getfgcolor();
int bg_color = lcd_getbgcolor();
+ int i, row;
+ uchar *dest = (uchar *)(cons.lcd_address +
+ y * cons.lcdsizex * PIXLBYTES +
+ x * PIXLBYTES);
+
+ for (row = 0; row VIDEO_FONT_HEIGHT; row++) {
+ fbptr_t *d = (fbptr_t *)dest;
+ uchar bits;
+ bits = video_fontdata[c * VIDEO_FONT_HEIGHT + row];
+ for (i = 0; i 8; ++i) {
+ *d++ = (bits 0x80) ? fg_color : bg_color;
+ bits = 1;
+ }
+ dest += cons.lcdsizex * PIXLBYTES;
+ }
+}
+
+static inline void console_setrow0(u32 row, int clr)
+{
int i;
+ uchar *dst = (uchar
Re: [U-Boot] [PATCH v5 08/14] virt-dt: Allow reservation of secure region when in a RAM carveout
On Thu, Mar 12, 2015 at 09:18:01AM +0100, Thierry Reding wrote: On Wed, Mar 11, 2015 at 11:12:25AM -0400, Tom Rini wrote: * PGP Signed by an unknown key On Mon, Mar 09, 2015 at 08:00:18AM +0100, Jan Kiszka wrote: In this case the secure code lives in RAM, and hence the memory node in the device tree needs to be adjusted. This avoids that the OS will map and possibly access the reservation. Add support for setting CONFIG_ARMV7_SECURE_RESERVE_SIZE to carve out such a region. We only support cutting off memory from the beginning or the end of a RAM bank as we do not want to increase their number (which would happen if punching a hole) for simplicity reasons This will be used in a subsequent patch for Jetson-TK1. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- arch/arm/cpu/armv7/virt-dt.c | 29 + My concern here is that this looks a lot like things we would re-use on armv8 and we're making them potentially needlessly v7-centric. If nothing else, the function names should be generic and this be the v7 implementation of them, yes? In my opinion it's fine to go along with this and then refactor things once we have an ARMv8 board that makes use of this. I'll live with it then but I expect the time to refactor things to approach really quickly too. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6: Set shared override bit in PL310 AUX_CTRL register
On Thu, Mar 12, 2015 at 01:04:31AM +, Russell King - ARM Linux wrote: On Wed, Mar 11, 2015 at 05:12:12PM -0300, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Having bit 22 cleared in the PL310 Auxiliary Control register (shared attribute override enable) has the side effect of transforming Normal Shared Non-cacheable reads into Cacheable no-allocate reads. Coherent DMA buffers in Linux always have a Cacheable alias via the kernel linear mapping and the processor can speculatively load cache lines into the PL310 controller. No, this is wrong. They do not. CMA remaps pages to be non-cacheable rather than the old technique where the above statement was true. There's some corner cases which make that less effective than it once was, and as I've already said, those need to be fixed. The reason that these were missed is because all the ARM CMA work bypassed me - CMA on ARM has had zero review from the point of view of the ARM architecture, so it's not surprising it gets stuff like this wrong. Once that's fixed, setting bit 22 is not necessary. And I strongly disagree with your statement. Seriously, there are so many assumption about when this bit will no longer be required like the platform always using CMA, having fixed the CMA code in Linux. That's a boot loader patch and even though it's used mostly (only) to load Linux, we should not make this assumption. Most importantly, not setting this bit makes your SoC non-compliant with the ARM ARM clarifications on mismatched aliases. It was a hardware mistake to have it cleared out of reset but just let firmware or boot-loaders deal with it. (there are some very specific use-cases for this bit that the hw guys had in mind but none of them apply to Linux) -- Catalin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] 4K padding of ARM DT blob
Hi. 2015-03-12 17:58 GMT+09:00 Yehuda Yitschak yehu...@marvell.com: Thanks Masahiro Actually, I am considering to modify u-boot's own FDT to reflect changes in configurable boards like development boards. So maybe the padding is good for my needs after all :) Do you see any issue with such an approach ? Yes, depending on when you modify the FDT. In Driver Model, most of drivers refer to the FDT when probing. (The offset address is stored in the of_offset member of struct udevice.) The scenario of our trouble is like this: [1] Devices are bound by dm_init_and_scan(). (udevice-of_offset is set) [2] The FDT is modified. (The offset address to each node changes.) [3] Some devices are probed (udevice-of_offset is referred, but the expected node is not there!) I guess you can modify the FDT before [1] or after[3]. Simon, What do you think? -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] autoboot.c: Add feature to stop autobooting via SHA256 encrypted password
This patch adds the feature to only stop the autobooting, and therefor
boot into the U-Boot prompt, when the input string / password matches
a values that is encypted via a SHA256 hash and saved in the environment.
This feature is enabled by defined these config options:
CONFIG_AUTOBOOT_KEYED
CONFIG_AUTOBOOT_STOP_STR_SHA256
Signed-off-by: Stefan Roese s...@denx.de
Cc: Tom Rini tr...@konsulko.com
---
v2:
- Extracted the passwd checking functions (sha256 and non-sha256)
into passwd_abort(). Resulting in an easier to read code with
less #ifdef's.
common/autoboot.c | 90 +--
1 file changed, 74 insertions(+), 16 deletions(-)
diff --git a/common/autoboot.c b/common/autoboot.c
index c27cc2c..def1612 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -12,6 +12,7 @@
#include fdtdec.h
#include menu.h
#include post.h
+#include u-boot/sha256.h
DECLARE_GLOBAL_DATA_PTR;
@@ -26,15 +27,58 @@ DECLARE_GLOBAL_DATA_PTR;
/* Stored value of bootdelay, used by autoboot_command() */
static int stored_bootdelay;
-/***
- * Watch for 'delay' seconds for autoboot stop or autoboot delay string.
- * returns: 0 - no key string, allow autoboot 1 - got key string, abort
- */
-# if defined(CONFIG_AUTOBOOT_KEYED)
-static int abortboot_keyed(int bootdelay)
+#if defined(CONFIG_AUTOBOOT_KEYED)
+#if defined(CONFIG_AUTOBOOT_STOP_STR_SHA256)
+static int passwd_abort(uint64_t etime)
+{
+ const char *sha_env_str = getenv(bootstopkeysha256);
+ u8 sha_env[SHA256_SUM_LEN];
+ u8 sha[SHA256_SUM_LEN];
+ char presskey[MAX_DELAY_STOP_STR];
+ u_int presskey_len = 0;
+ int i;
+ int abort = 0;
+
+ if (sha_env_str == NULL)
+ sha_env_str = CONFIG_AUTOBOOT_STOP_STR_SHA256;
+
+ /*
+* Generate the binary value from the environment hash value
+* so that we can compare this value with the computed hash
+* from the user input
+*/
+ for (i = 0; i SHA256_SUM_LEN; i++) {
+ char chr[3];
+
+ strncpy(chr, sha_env_str[i * 2], 2);
+ sha_env[i] = simple_strtoul(chr, NULL, 16);
+ }
+
+ /*
+* We don't know how long the stop-string is, so we need to
+* generate the sha256 hash upon each input character and
+* compare the value with the one saved in the environment
+*/
+ do {
+ if (tstc()) {
+ presskey[presskey_len++] = getc();
+
+ /* Calculate sha256 upon each new char */
+ sha256_csum_wd((unsigned char *)presskey, presskey_len,
+ sha, CHUNKSZ_SHA256);
+
+ /* And check if sha matches saved value in env */
+ if (memcmp(sha, sha_env, SHA256_SUM_LEN) == 0)
+ abort = 1;
+ }
+ } while (!abort get_ticks() = etime);
+
+ return abort;
+}
+#else
+static int passwd_abort(uint64_t etime)
{
int abort = 0;
- uint64_t etime = endtick(bootdelay);
struct {
char *str;
u_int len;
@@ -52,15 +96,6 @@ static int abortboot_keyed(int bootdelay)
u_int presskey_max = 0;
u_int i;
-#ifndef CONFIG_ZERO_BOOTDELAY_CHECK
- if (bootdelay == 0)
- return 0;
-#endif
-
-# ifdef CONFIG_AUTOBOOT_PROMPT
- printf(CONFIG_AUTOBOOT_PROMPT);
-# endif
-
# ifdef CONFIG_AUTOBOOT_DELAY_STR
if (delaykey[0].str == NULL)
delaykey[0].str = CONFIG_AUTOBOOT_DELAY_STR;
@@ -125,6 +160,29 @@ static int abortboot_keyed(int bootdelay)
}
} while (!abort get_ticks() = etime);
+ return abort;
+}
+#endif
+
+/***
+ * Watch for 'delay' seconds for autoboot stop or autoboot delay string.
+ * returns: 0 - no key string, allow autoboot 1 - got key string, abort
+ */
+static int abortboot_keyed(int bootdelay)
+{
+ int abort;
+ uint64_t etime = endtick(bootdelay);
+
+#ifndef CONFIG_ZERO_BOOTDELAY_CHECK
+ if (bootdelay == 0)
+ return 0;
+#endif
+
+# ifdef CONFIG_AUTOBOOT_PROMPT
+ printf(CONFIG_AUTOBOOT_PROMPT);
+# endif
+
+ abort = passwd_abort(etime);
if (!abort)
debug_bootkeys(key timeout\n);
--
2.3.2
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Re: [U-Boot] [PATCH] Odroid-XU3: Undefine TRACE CONFIGs in Odroid XU3
Hi, Simon, On Thu, 12 Mar 2015 15:11:05 -0700 Simon Glass s...@chromium.org wrote: Hi, On 12 March 2015 at 00:27, Sjoerd Simons sjoerd.sim...@collabora.co.uk wrote: On Thu, 2015-03-12 at 14:32 +0900, Inha Song wrote: This patch undefines Trace configs in Odroidx XU3. Trace configs are defined in exynos5-common.h Would be great to explain why you want to disable trace on this specific board but leave it enabled on all other exynos5 boards? Can I suggest putting an #ifdef FTRACE around the #define options as with sandbox.h? Tracing is always enabled with FTRACE. Right? So that, We need to add #ifdef FTRACE in exynos5-common.h as you mentioned. I will send exynos5-common.h patch. Best Regards, Inha Song. Signed-off-by: Inha Song ideal.s...@samsung.com --- include/configs/odroid_xu3.h | 5 + 1 file changed, 5 insertions(+) diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index c395020..f427fe2 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -23,6 +23,11 @@ #define TZPC_BASE_OFFSET 0x1 +/* TRACE configs are defined in exynos5-common */ +#undef CONFIG_TRACE +#undef CONFIG_CMD_TRACE +#undef CONFIG_TRACE_EARLY + #define CONFIG_CMD_MMC #define CONFIG_NR_DRAM_BANKS 8 Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] x86: galileo: Enable saving environment in SPI flash
Hi Simon, On Fri, Mar 13, 2015 at 6:15 AM, Simon Glass s...@chromium.org wrote: On 11 March 2015 at 02:22, Bin Meng bmeng...@gmail.com wrote: Saving U-Boot's environment in SPI flash on Intel Galileo board. Signed-off-by: Bin Meng bmeng...@gmail.com --- include/configs/galileo.h | 8 1 file changed, 8 insertions(+) diff --git a/include/configs/galileo.h b/include/configs/galileo.h index 65a2c3e..288acf3 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -62,4 +62,12 @@ #define CONFIG_DW_ALTDESCRIPTOR #define CONFIG_PHYLIB +/* Environment configuration */ +#undef CONFIG_ENV_IS_NOWHERE +#undef CONFIG_ENV_SIZE +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SIZE0x1000 +#define CONFIG_ENV_SECT_SIZE 0x1000 +#define CONFIG_ENV_OFFSET 0 + #endif /* __CONFIG_H */ -- 1.8.2.1 Acked-by: Simon Glass s...@chromium.org I wonder at what point we should move some of this to x86-common.h? I believe we can only put #define CONFIG_ENV_IS_IN_SPI_FLASH in x86-common.h and leave others still in the board file due to they are spi flash/board-specific. Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] 4K padding of ARM DT blob
Hey Simon Thanks for the clarification Just out of curiosity, how can the padding help modify the FDT in u-boot ? Yehuda -Original Message- From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass Sent: Wednesday, March 11, 2015 21:01 To: Masahiro Yamada Cc: Tom Rini; Yehuda Yitschak; u-boot@lists.denx.de; Hanna Hawa Subject: Re: [U-Boot] 4K padding of ARM DT blob Hi, On 10 March 2015 at 23:48, Masahiro Yamada yamada.masah...@socionext.com wrote: Hi Yehuda, Tom, Simon, 2015-03-07 0:12 GMT+09:00 Tom Rini tr...@konsulko.com: On Thu, Mar 05, 2015 at 06:20:35PM +, Yehuda Yitschak wrote: Hey Tom In arch/arm/dts/Makfile: line 56 DTC_FLAGS += -R 4 -p 0x1000 this tell the dtc tool to add a 4K padding to the device tree blob. i can't figure out why this is needed. Its creating a 4KB penalty on the dtb file so i guess it has some justification. That's interesting and I don't see a corresponding thing in the kernel. Masahiro? This dates back to the introduction of the Makefile and that's you in the git log, thanks! Not me! I just converted the Makefile into Kbuild style. The option -R 4 -p 0x1000 was introduced by: commit bbb0b128c3956ac549471addc314702fbe0ace63 Author: Simon Glass s...@chromium.org Date: Sat Oct 15 05:48:21 2011 + fdt: Add support for embedded device tree (CONFIG_OF_EMBED) Simon, Looks like the 4K padding was introduced by you. Can you explain why? I think at the time perhaps we were thinking of modifying the FDT in early U- Boot init, but that did not happen. I think it can be dropped. Using my time machine I just sent a patch to do this a few weeks ago: http://patchwork.ozlabs.org/patch/444847/ Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
