Re: [U-Boot] [PATCH 2/5] net: gem: Fix return value from recv

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:43 AM, Michal Simek  wrote:
> recv function should return 0 instead of frame_len not to
> proceed the same packet again in core.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 3/5] net: gem: Separate recv and free_pkt functions

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:43 AM, Michal Simek  wrote:
> Use core to call net_process_received_packet() instead of call inside
> the driver.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 5/5] drivers: net: vsc9953: Add LAG support

[Joe Hershberger]

On Tue, Dec 15, 2015 at 7:21 AM, Codrin Ciubotariu
 wrote:
> You can now configure LAG on VSC9953's ports using the command:
> ethsw [port ] aggr {[help] | show | }
>
> A port must belong to a single LAG. By default, a port
> belongs to a LAG equal to the port's number.
>
> For each frame, a hash will be calculated based on
> Source/Destination MAC addresses, Source/Destination IP(v4/v6)
> addresses, Source/Destination ports. This hash will be used to
> select a single egress port from LAG. This also assures
> that frames from the same flow will always have the
> same egress port.
>
> Signed-off-by: Codrin Ciubotariu 

Acked-by: Joe Hershberger 
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[U-Boot] [PATCH 2/3] gpio: s5p: use dev_get_reg() instead of dev_get_addr()

[Przemyslaw Marczak]

In a result of enabling the CONFIG_OF_TRANSLAE, function dev_get_addr(),
doesn't support device tree nodes with 'size-cells == 0'.

But this is the way how the s5p gpio driver's compatible device tree
nodes are defined. Switching the driver to use function dev_get_reg(),
fixes this issue.

Signed-off-by: Przemyslaw Marczak 
Cc: Joe Hershberger 
Cc: Stephen Warren 
Cc: Minkyu Kang 
Cc: Simon Glass 
---
 drivers/gpio/s5p_gpio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index 0f22b23..383c6ce 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -350,7 +350,7 @@ static int gpio_exynos_bind(struct udevice *parent)
 
dev->of_offset = node;
 
-   reg = dev_get_addr(dev);
+   reg = dev_get_reg(dev);
if (reg != FDT_ADDR_T_NONE)
bank = (struct s5p_gpio_bank *)((ulong)base + reg);
 
-- 
1.9.1

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Re: [U-Boot] [PATCH 1/5] Make RBTREE selectable by Kconfig

[Lars Poeschel]

Am Dienstag, 18. August 2015, 14:32:13 schrieb Joe Hershberger:
> On Tue, Aug 18, 2015 at 2:27 PM, Tom Rini  wrote:
> > On Tue, Aug 18, 2015 at 01:47:20PM -0500, Joe Hershberger wrote:
> >> Hi Lars,
> >> 
> >> On Tue, Aug 11, 2015 at 2:29 PM, Joe Hershberger
> >> 
> >>  wrote:
> >> > Hi Lars,
> >> > 
> >> > On Tue, Jul 28, 2015 at 11:01 AM, Joe Hershberger
> >> > 
> >> >  wrote:
> >> >> Hi Lars,
> >> >> 
> >> >> On Tue, Jul 28, 2015 at 3:25 AM, Lars Poeschel  
wrote:
> >> >>> Hi Joe,
> >> >>> 
> >> >>> On Wed, Jun 10, 2015 at 11:03:59AM -0500, Joe Hershberger wrote:
> >>  >> I beat you to it:
> >>  >> http://lists.denx.de/pipermail/u-boot/2015-May/214261.html>>  
> 
> >>  > Well, ... ok. You won ;-) Your patchset is by far more
> >>  > comprehensive than
> >>  > mine.
> >>  > If I see this right in the archives, you did not receive any
> >>  > comments
> >>  > since nearly a month.
> >>  
> >>  That is true. I really would like a little feedback on it... or
> >>  maybe
> >>  I can just drop the controversial one and only include these
> >>  things...
> >>  they seem to be mostly straightforward.
> >>  
> >>  > This was RFC will you resend this as a "real" PATCH ?
> >>  
> >>  Yes.
> >>  
> >>  > Could you then include two of the dependencies from my patches:
> >>  > I think CMD_UBI has to depend on MTD_PARTITIONS and obivously
> >>  > CMD_UBIFS
> >> 
> >> I noticed when adding MTD_PARTITIONS that MTD_DEVICE is not moved over
> >> yet. Do you know what the dependency relationship is there? If not
> >> I'll dig into it a bit.
> >> 
> >>  > has to depend on CMD_UBI.
> >>  
> >>  Will do.
> >> >>> 
> >> >>> I saw no action from you on this one. Can I help out - at least for
> >> >>> the
> >> >>> decompression / ubi / ubifs part ?
> >> >> 
> >> >> Sorry about that... the end of last release got a little crazy.
> >> >> 
> >> >>> I think the setexpr / env location parts from your patchset can then
> >> >>> go
> >> >>> in as seperate patches.
> >> >> 
> >> >> I agree. I'll split them apart and send these out.
> >> > 
> >> > I haven't forgotten about this... I plan to get this sent out this
> >> > week.
> >> 
> >> I had this ready to go, but conflicts with
> >> https://patchwork.ozlabs.org/patch/508134/, so I'm gonna have to
> >> regenerate the moves after that goes in.
> > 
> > Note that since it's part of the E1000 series I gave it to you in
> > patchwork :)
> 
> Sure, I expect to take it in once all feedback is addressed on that series.
> :)

Joe,
a gentle ping on this.
I don't see RBTREE, MTD_PARTIONS and UBIFS in Kconfig yet.

Regards,
Lars

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[U-Boot] [PATCH 1/3] dm: core: extend API by new function: dev_get_reg()

[Przemyslaw Marczak]

After changes introduced to dev_get_addr() by:

commit: dm: core: Enable optional use of fdt_translate_address()

the mentioned function is not allowed to parse the 'reg' property
of child node for which the '#size-cells == 0'.

To fill the gap, this commit introduces new core function dev_get_reg(),
which makes it possible to get the 'reg' property's value for that use case.

Signed-off-by: Przemyslaw Marczak 
Cc: Masahiro Yamada 
Cc: Simon Glass 
Cc: Marek Vasut 
Cc: Stefan Roese 
---
 drivers/core/device.c | 17 +
 include/dm/device.h   | 23 +++
 2 files changed, 36 insertions(+), 4 deletions(-)

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 758f390..1131175 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -581,6 +581,18 @@ const char *dev_get_uclass_name(struct udevice *dev)
return dev->uclass->uc_drv->name;
 }
 
+fdt_addr_t dev_get_reg(struct udevice *dev)
+{
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+   return fdtdec_get_addr_size_auto_parent(gd->fdt_blob,
+   dev->parent->of_offset,
+   dev->of_offset, "reg",
+   0, NULL);
+#else
+   return FDT_ADDR_T_NONE;
+#endif
+}
+
 fdt_addr_t dev_get_addr(struct udevice *dev)
 {
 #if CONFIG_IS_ENABLED(OF_CONTROL)
@@ -601,14 +613,11 @@ fdt_addr_t dev_get_addr(struct udevice *dev)
 dev->of_offset, reg);
}
 
+   addr = dev_get_reg(dev);
/*
 * Use the "simple" translate function for less complex
 * bus setups.
 */
-   addr = fdtdec_get_addr_size_auto_parent(gd->fdt_blob,
-   dev->parent->of_offset,
-   dev->of_offset, "reg",
-   0, NULL);
if (CONFIG_IS_ENABLED(SIMPLE_BUS) && addr != FDT_ADDR_T_NONE) {
if (device_get_uclass_id(dev->parent) == UCLASS_SIMPLE_BUS)
addr = simple_bus_translate(dev->parent, addr);
diff --git a/include/dm/device.h b/include/dm/device.h
index 7fb9935..08bcb02 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -445,8 +445,31 @@ int device_find_first_child(struct udevice *parent, struct 
udevice **devp);
 int device_find_next_child(struct udevice **devp);
 
 /**
+ * dev_get_reg() - Get the reg property of a device
+ *
+ * This returns the address without bus/child address space translation.
+ *
+ * @dev: Pointer to a device
+ *
+ * @return addr
+ */
+fdt_addr_t dev_get_reg(struct udevice *dev);
+
+/**
  * dev_get_addr() - Get the reg property of a device
  *
+ * The returned address value depends on a config options:
+ * Case 1: CONFIG_OF_TRANSLATE=y (default)
+ * Result: Make bus/child address space translation, that dependents on 
"ranges"
+ * property.
+ *
+ * Case 2: CONFIG_OF_TRANSLATE is not set
+ * Result: Decode only device node's 'reg' property, without translation.
+ *
+ * Case 3: CONFIG_OF_TRANSLATE is not set; CONFIG_SIMPLE_BUS=y
+ * Result: When 'dev->parent' is a simple bus - then do the same as in case 1,
+ * otherwise do the same as in case 2.
+ *
  * @dev: Pointer to a device
  *
  * @return addr
-- 
1.9.1

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[U-Boot] [PATCH 3/3] dm: i2c: get chip address with dev_get_reg()

[Przemyslaw Marczak]

This commit cleanups the I2C uclass driver by:
- simplify i2c_child_post_bind() method
- cleanups i2c_chip_ofdata_to_platdata(), by calling dev_get_reg()
  for getting chip address

Signed-off-by: Przemyslaw Marczak 
Cc: Masahiro Yamada 
Cc: Joe Hershberger 
Cc: Simon Glass 
Cc: Heiko Schocher 
Cc: Stefan Roese 
---
 drivers/i2c/i2c-uclass.c | 17 -
 include/i2c.h| 11 ---
 2 files changed, 12 insertions(+), 16 deletions(-)

diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 50b99ea..3cfbd22 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -467,16 +467,17 @@ int i2c_deblock(struct udevice *bus)
return ops->deblock(bus);
 }
 
-int i2c_chip_ofdata_to_platdata(const void *blob, int node,
-   struct dm_i2c_chip *chip)
+int i2c_chip_ofdata_to_platdata(struct udevice *dev)
 {
-   chip->offset_len = fdtdec_get_int(gd->fdt_blob, node,
+   struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
+
+   chip->offset_len = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
  "u-boot,i2c-offset-len", 1);
chip->flags = 0;
-   chip->chip_addr = fdtdec_get_int(gd->fdt_blob, node, "reg", -1);
-   if (chip->chip_addr == -1) {
+   chip->chip_addr = dev_get_reg(dev);
+   if (chip->chip_addr == FDT_ADDR_T_NONE) {
debug("%s: I2C Node '%s' has no 'reg' property\n", __func__,
- fdt_get_name(blob, node, NULL));
+ fdt_get_name(gd->fdt_blob, dev->of_offset, NULL));
return -EINVAL;
}
 
@@ -501,12 +502,10 @@ static int i2c_post_bind(struct udevice *dev)
 
 static int i2c_child_post_bind(struct udevice *dev)
 {
-   struct dm_i2c_chip *plat = dev_get_parent_platdata(dev);
-
if (dev->of_offset == -1)
return 0;
 
-   return i2c_chip_ofdata_to_platdata(gd->fdt_blob, dev->of_offset, plat);
+   return i2c_chip_ofdata_to_platdata(dev);
 }
 
 UCLASS_DRIVER(i2c) = {
diff --git a/include/i2c.h b/include/i2c.h
index 1f5ae45..c5bb39c 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -518,15 +518,12 @@ int i2c_get_chip_for_busnum(int busnum, int chip_addr, 
uint offset_len,
  * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
  *
  * This decodes the chip address from a device tree node and puts it into
- * its dm_i2c_chip structure. This should be called in your driver's
- * ofdata_to_platdata() method.
+ * its dm_i2c_chip structure. This is called after device's bind inside
+ * uclass driver's i2c_child_post_bind() method.
  *
- * @blob:  Device tree blob
- * @node:  Node offset to read from
- * @spi:   Place to put the decoded information
+ * @dev:   pointer to a chip device
  */
-int i2c_chip_ofdata_to_platdata(const void *blob, int node,
-   struct dm_i2c_chip *chip);
+int i2c_chip_ofdata_to_platdata(struct udevice *dev);
 
 /**
  * i2c_dump_msgs() - Dump a list of I2C messages
-- 
1.9.1

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Re: [U-Boot] [PATCH 2/5] drivers: net: vsc9953: Fix FDB aging time

[Joe Hershberger]

On Tue, Dec 15, 2015 at 7:21 AM, Codrin Ciubotariu
 wrote:
> By default, the aging period is set to 0, so the dynamic
> FDB entries are never removed. This patch sets the aging
> time to 300 seconds.
>
> Signed-off-by: Codrin Ciubotariu 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH] Re-enable setexpr on Raspberry Pi

[Joe Hershberger]

On Tue, Dec 1, 2015 at 10:04 PM, Stephen Warren  wrote:
> On 11/28/2015 06:56 PM, Marco Schuster wrote:
>> This patch re-enables the setexpr command, I don't really understand
>> why it got excluded in the first place.
>>
>> setexpr can be used e.g. to implement failed-boot-counters and
>> failovers to rescue firmware.
>>
>>
>
> Two blank lines?
>
>> Signed-off-by: Marco Schuster 
>
> This looks like a reasonable change, but
>
> * You should CC the author of the patch that caused this issue (now CC'd)
>
> * You should CC the person who would apply this patch (Tom Rini, now CC'd)
>
> * You should include a Fixes: tag that specifies the commit that caused
> this issue; I think:
>
> Fixes: ef0f2f57524e ("Move defaults from config_cmd_default.h to Kconfig")

I knew I shouldn't work on that kind of patch. Too easy to miss
something. :/ Maybe modern buildman will help.

> * You should double-check all the changes in the original patch in case
> any other similar issues were introduced.
>
>> ---
>>  configs/rpi_2_defconfig | 1 -
>>  configs/rpi_defconfig   | 1 -
>>  2 files changed, 2 deletions(-)
>>
>> diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
>> index 5c9e69a..bd81ee6 100644
>> --- a/configs/rpi_2_defconfig
>> +++ b/configs/rpi_2_defconfig
>> @@ -6,5 +6,4 @@ CONFIG_SYS_PROMPT="U-Boot> "
>>  # CONFIG_CMD_FLASH is not set
>>  # CONFIG_CMD_FPGA is not set
>>  CONFIG_CMD_GPIO=y
>> -# CONFIG_CMD_SETEXPR is not set
>>  CONFIG_PHYS_TO_BUS=y
>> diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
>> index b8b267f..5d27909 100644
>> --- a/configs/rpi_defconfig
>> +++ b/configs/rpi_defconfig
>> @@ -6,5 +6,4 @@ CONFIG_SYS_PROMPT="U-Boot> "
>>  # CONFIG_CMD_FLASH is not set
>>  # CONFIG_CMD_FPGA is not set
>>  CONFIG_CMD_GPIO=y
>> -# CONFIG_CMD_SETEXPR is not set
>>  CONFIG_PHYS_TO_BUS=y
>
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Re: [U-Boot] [PATCH 4/5] net: gem: Fix typo in Kconfig entry

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:43 AM, Michal Simek  wrote:
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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[U-Boot] [PATCH 0/3] dm: add dev_get_reg() for getting device node's reg

[Przemyslaw Marczak]

commit: dm: core: Enable optional use of fdt_translate_address()

enables device's bus/child address translation method, depending
on bus 'ranges' property and including child 'reg' property.
This change makes impossible to decode the 'reg' for node with
'#size-cells' equal to 0.

Such case is possible by the specification and is also used in U-Boot,
e.g. by I2C uclass or S5P GPIO - the last one is broken at present.

For this purpose this patch set introduces new core function:
 fdt_addr_t dev_get_reg(struct udevice *dev)
which returns the 'reg' value in the same way as previously dev_get_addr().

This fixes s5p gpio driver and booting issue on few Exynos based boards:
- Trats2
- Odroid U3/X2

As an example of use, this patch set also modifies i2c uclass driver
by using the new function for getting chip address.

Przemyslaw Marczak (3):
  dm: core: extend API by new function: dev_get_reg()
  gpio: s5p: use dev_get_reg() instead of dev_get_addr()
  dm: i2c: get chip address with dev_get_reg()

 drivers/core/device.c| 17 +
 drivers/gpio/s5p_gpio.c  |  2 +-
 drivers/i2c/i2c-uclass.c | 17 -
 include/dm/device.h  | 23 +++
 include/i2c.h| 11 ---
 5 files changed, 49 insertions(+), 21 deletions(-)

-- 
1.9.1

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Re: [U-Boot] [PATCH 3/5] doc: t1040-l2switch: Update README

[Joe Hershberger]

On Tue, Dec 15, 2015 at 7:21 AM, Codrin Ciubotariu
 wrote:
> The driver for VSC9953 L2 switch IP supports many features and
> the documentation needs to be updated.
>
> Signed-off-by: Codrin Ciubotariu 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 1/5] drivers: net: vsc9953: Fix number of reserved registers

[Joe Hershberger]

On Tue, Dec 15, 2015 at 7:21 AM, Codrin Ciubotariu
 wrote:
> There are only 21 registers reserved between ana_ana and
> ana_pgid register groups.

Oops!

> Signed-off-by: Codrin Ciubotariu 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 4/5] common: cmd_ethsw: Spelling fixes

[Joe Hershberger]

Hi Codrin,

On Tue, Dec 15, 2015 at 7:21 AM, Codrin Ciubotariu
 wrote:
> Signed-off-by: Codrin Ciubotariu 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [Patch V2 1/4] spi: fsl_qspi: fix compile warning for 64-bit platform

[Jagan Teki]

On 15 December 2015 at 15:59, Gong Qianyu  wrote:
> This patch fixes the following compile warning:
> drivers/spi/fsl_qspi.c: In function 'fsl_qspi_probe':
> drivers/spi/fsl_qspi.c:937:15:
>   warning: cast to pointer from integer of different size
>  [-Wint-to-pointer-cast]
>   priv->regs = (struct fsl_qspi_regs *)plat->reg_base;
>^
>
> Signed-off-by: Gong Qianyu 
> ---
> V2:
>  - No change.
>
>  drivers/spi/fsl_qspi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
> index ed39114..9f296c1 100644
> --- a/drivers/spi/fsl_qspi.c
> +++ b/drivers/spi/fsl_qspi.c
> @@ -931,7 +931,7 @@ static int fsl_qspi_probe(struct udevice *bus)
>
> dm_spi_bus->max_hz = plat->speed_hz;
>
> -   priv->regs = (struct fsl_qspi_regs *)plat->reg_base;
> +   priv->regs = (struct fsl_qspi_regs *)(unsigned long)plat->reg_base;

What about using fdtdec_get_addr instead of typecasting long?

thanks!
-- 
Jagan.
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Re: [U-Boot] [PATCH v2 01/14] ARM: zynq: Remove PHYLIB from config to defconfig

[Joe Hershberger]

Hi Michal,

On Wed, Dec 2, 2015 at 5:36 AM, Michal Simek  wrote:
> Move PHYLIB from board config to defconfig
>
> Signed-off-by: Michal Simek 
> ---

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH] dm: net: Fix DM for targets which use MANUAL_RELOC

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:46 AM, Michal Simek  wrote:
> All ethernet operation needs to be updated for architectures which
> requires MANUAL_RELOC.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 5/5] net: gem: Add driver dependencies to PHYLIB and MII

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:43 AM, Michal Simek  wrote:
> Clear driver dependecies via Kconfig. Remove PHYLIB dependency from
> the driver.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 



> diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
> index 50ac5f531c49..757ab3ac3aa4 100644
> --- a/include/configs/xilinx_zynqmp.h
> +++ b/include/configs/xilinx_zynqmp.h
> @@ -186,9 +186,7 @@
>  /* Ethernet driver */
>  #if defined(CONFIG_ZYNQ_GEM)
>  # define CONFIG_NET_MULTI
> -# define CONFIG_MII

I guess this was already moved out from other zynq targets, right?

>  # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
> -# define CONFIG_PHYLIB
>  # define CONFIG_PHY_MARVELL
>  # define CONFIG_PHY_TI
>  #endif
> --
> 1.9.1
>
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Re: [U-Boot] [PATCH 1/6] arm: socfpga: cyclone5-socdk: Enabling mtd partitioning layout

[Marek Vasut]

On Tuesday, December 15, 2015 at 11:09:59 AM, Chin Liang See wrote:
> On Tue, 2015-12-15 at 02:15 +0100, Marek Vasut wrote:
> > On Tuesday, December 15, 2015 at 02:09:42 AM, Chin Liang See wrote:
> > > On Tue, 2015-12-15 at 01:32 +0100, Marek Vasut wrote:
> > > > On Monday, December 14, 2015 at 04:22:57 PM, Chin Liang See
> > > > 
> > > > wrote:
> > > > > On Mon, 2015-12-14 at 02:25 +0100, Marek Vasut wrote:
> > > > > > On Monday, December 14, 2015 at 02:22:32 AM, Chin Liang See
> > > 
> > > > > > wrote:
> > > [...]
> > > 
> > > > > Yeah, I can successfully mounted with ubifs :)
> > > > > 
> > > > > Just that I still have the issue with U-Boot ubifsmount
> > > > > although I
> > > > > already applied the patch for cache ARMV7. I will take a look
> > > > > into
> > > > > ubi
> > > > > code as I suspect its due to eraseblock size issue.
> > > > 
> > > > Keep looking, good luck.
> > > 
> > > Yup, will compare the UBI code with the Linux one.
> 
> Yeah, I managed to get ubiufsmount work in U-Boot now. Need to disable
> the 4K_SECTORS when enabling UBI at NOR flash.

In that case, look at commit 0a02655481834a4ebdf457e43c24729ffd7daf37

> > > > The armv7 cache issue is more serious than I thought, I am
> > > > starting
> > > > to suspect
> > > > there is some problem with the L3 interconnect, but I cannot put
> > > > my
> > > > finger on
> > > > it yet.
> > > 
> > > Hmmm... I can try to help.
> > > 
> > > FYI, I was trying to understand how the code error in cache-cp15
> > > will
> > > cause the misbehave. One thing I am suspecting it might due to
> > > mismatch
> > > of cache policy for the memory that store the page table and
> > > translation page walk mechanism. But with your fix, it should be
> > > good
> > > as they are matching now.
> > 
> > I would suggest to move this to the thread below the CPU_V7 patch.
> 
> Would you able to include me to the thread? Thanks in advance!

https://www.mail-archive.com/u-boot@lists.denx.de/msg195327.html

> > btw. the L2 cache is not enabled on SoCFPGA at all :-( I have a patch
> > to fix
> > it, but this doesn't help us.
> 
> Hmmm... I saw the PL310 is defined. I might want to look further.

I will send that patch out shortly, but I think there is something else
going on. I am starting to suspect something with the L3 interconnect.
Maybe some R/W reordering or something like that in NIC301 .

Are you able to replicate my USB issue with mainline on socfpga ? What
happens if you run usb reset with a USB stick plugged in? What compiler
version do you use ?

> > I suspect there might be some synchronisation
> > or timing issue with accesses through the L3 interconnect, which
> > would point
> > to NIC301 misconfiguration, but that's purely hypothetical.Do you
> > have some
> > hardware-level or RTL-level/simulation tool to debug such issues at
> > Altera ?
> 
> I hardly use simulation except for in house pre-silicon validation. But
> I use DS-5 a lot to troubleshoot an issue (by probing various registers
> including cp15).
> 
> Thanks
> Chin Liang
> 
> > Best regards,
> > Marek Vasut

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/5] net: gem: Setup default phy address to -1

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:43 AM, Michal Simek  wrote:
> Undefined phy address is -1 not 0.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 2/2] arm: lpc32xx: switch SPL builds to driver model

[Simon Glass]

Hi Vladimir,

On 12 December 2015 at 17:48, Vladimir Zapolskiy  wrote:
> For NXP LPC32xx boards the change enables SPL_DM option, this allows
> to use any driver model UART driver in SPL images, hence a restriction
> on HSUART in SPL image is removed and well as definitions for non-DM
> NS16550 driver, its DM version is used instead.
>
> Note, CONFIG_SPL_DM option noticeably increases SPL image, if just
> NAND SLC and DM version of NS16650 are included to the image, the size
> of SPL image is increased almost in two times from 10672 bytes to
> 19704 bytes.
> If SPL image is downloaded from a small page NAND device, then this
> can cause a problem, according to the LPC32xx User's Manual the
> maximum size of a secondary bootloader stored on small page NAND flash
> should not exceed 15.5KB (maximum size of a secondary bootloader on a
> large page NAND is 54KB).
>
> Because SPL_DM requires malloc(), enable CONFIG_SYS_MALLOC_SIMPLE for
> all LPC32xx boards in shared config.h file.
>
> Signed-off-by: Vladimir Zapolskiy 
> ---
>  arch/arm/cpu/arm926ejs/lpc32xx/devices.c   |  2 +-
>  arch/arm/include/asm/arch-lpc32xx/config.h | 24 ++--
>  configs/devkit3250_defconfig   |  1 +
>  configs/work_92105_defconfig   |  1 +
>  4 files changed, 9 insertions(+), 19 deletions(-)

You are bringing in the full malloc(). Try adding:

CONFIG_SPL_SYS_MALLOC_SIMPLE=y

to your defconfig. The should cut the size increment to just under
5KB. That is still a lot. Are you able to use Thumb on your board?

Regards,
Simon
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Re: [U-Boot] [PATCH 26/57] x86: Bring up northbridge, pch and lpc after the CPUs

[Simon Glass]

Hi Bin,

On 13 December 2015 at 05:54, Bin Meng  wrote:
> Hi Simon,
>
> On Tue, Dec 8, 2015 at 11:38 AM, Simon Glass  wrote:
>> These devices currently need to be inited early in boot. Once we have the
>> init in the right places (with each device doing its own init and no
>> problems with ordering) we should be able to remove this. For now it is
>> needed to keep things working.
>>
>> Signed-off-by: Simon Glass 
>> ---
>>
>>  arch/x86/cpu/cpu.c | 16 ++--
>>  1 file changed, 14 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
>> index 3cbed17..35fa046 100644
>> --- a/arch/x86/cpu/cpu.c
>> +++ b/arch/x86/cpu/cpu.c
>> @@ -704,8 +704,20 @@ static int x86_init_cpus(void)
>>
>>  int cpu_init_r(void)
>>  {
>> -   if (ll_boot_init())
>> -   return x86_init_cpus();
>> +   struct udevice *dev;
>> +   int ret;
>> +
>> +   if (!ll_boot_init())
>> +   return 0;
>> +
>> +   ret = x86_init_cpus();
>> +   if (ret)
>> +   return ret;
>> +
>> +   /* Set up the northbridge, PCH and LPC if available */
>> +   uclass_first_device(UCLASS_NORTHBRIDGE, );
>> +   uclass_first_device(UCLASS_PCH, );
>> +   uclass_first_device(UCLASS_LPC, );
>
> I don't get it. The NORTHBRIDGE, PCH, LPC are already inited in the
> pre-reolcation stage. This cpu_init_r() is pretty late, how do we
> ensure the init order here?

Driver model is restarted after relocation, so we end up probing these
devices again. Some of them do different in before relocation and
after.

Regards,
Simon
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Re: [U-Boot] [PATCH 07/10] net: axi_emac: Move driver to DM

[Simon Glass]

Hi Michal,

On 11 December 2015 at 04:59, Michal Simek  wrote:
> Move driver to DM.
>
> Signed-off-by: Michal Simek 
> ---
>
>  .../xilinx/microblaze-generic/microblaze-generic.c |   5 -
>  board/xilinx/zynq/board.c  |   4 -
>  drivers/net/xilinx_axi_emac.c  | 190 
> +
>  include/netdev.h   |   2 -
>  4 files changed, 122 insertions(+), 79 deletions(-)

Reviewed-by: Simon Glass 

See a few things below.

>
> diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c 
> b/board/xilinx/microblaze-generic/microblaze-generic.c
> index dfa62933..a3122da9acaa 100644
> --- a/board/xilinx/microblaze-generic/microblaze-generic.c
> +++ b/board/xilinx/microblaze-generic/microblaze-generic.c
> @@ -105,11 +105,6 @@ int board_eth_init(bd_t *bis)
>  {
> int ret = 0;
>
> -#ifdef CONFIG_XILINX_AXIEMAC
> -   ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
> -   XILINX_AXIDMA_BASEADDR);
> -#endif
> -
>  #if defined(CONFIG_XILINX_EMACLITE) && defined(XILINX_EMACLITE_BASEADDR)
> u32 txpp = 0;
> u32 rxpp = 0;
> diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
> index 414f5302a066..427e75485deb 100644
> --- a/board/xilinx/zynq/board.c
> +++ b/board/xilinx/zynq/board.c
> @@ -103,10 +103,6 @@ int board_eth_init(bd_t *bis)
>  {
> u32 ret = 0;
>
> -#ifdef CONFIG_XILINX_AXIEMAC
> -   ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
> -   XILINX_AXIDMA_BASEADDR);
> -#endif
>  #ifdef CONFIG_XILINX_EMACLITE
> u32 txpp = 0;
> u32 rxpp = 0;
> diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
> index 77b1869dc9dc..c03f8f730d3a 100644
> --- a/drivers/net/xilinx_axi_emac.c
> +++ b/drivers/net/xilinx_axi_emac.c
> @@ -8,12 +8,15 @@
>
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
>  #include 
>  #include 
>
> +DECLARE_GLOBAL_DATA_PTR;
> +
>  #if !defined(CONFIG_PHYLIB)
>  # error AXI_ETHERNET requires PHYLIB
>  #endif
> @@ -87,6 +90,7 @@ struct axidma_priv {
> struct axidma_reg *dmarx;
> int phyaddr;
> struct axi_regs *iobase;
> +   phy_interface_t interface;
> struct phy_device *phydev;
> struct mii_dev *bus;
>  };
> @@ -218,11 +222,11 @@ static u32 phywrite(struct axidma_priv *priv, u32 
> phyaddress, u32 registernum,
>  }
>
>  /* Setting axi emac and phy to proper setting */
> -static int setup_phy(struct eth_device *dev)
> +static int setup_phy(struct udevice *dev)
>  {
> u16 phyreg;
> u32 i, speed, emmc_reg, ret;
> -   struct axidma_priv *priv = dev->priv;
> +   struct axidma_priv *priv = dev_get_priv(dev);
> struct axi_regs *regs = priv->iobase;
> struct phy_device *phydev;
>
> @@ -298,9 +302,9 @@ static int setup_phy(struct eth_device *dev)
>  }
>
>  /* STOP DMA transfers */
> -static void axiemac_halt(struct eth_device *dev)
> +static void axiemac_halt(struct udevice *dev)
>  {
> -   struct axidma_priv *priv = dev->priv;
> +   struct axidma_priv *priv = dev_get_priv(dev);
> u32 temp;
>
> /* Stop the hardware */
> @@ -358,16 +362,18 @@ static int axi_ethernet_init(struct axidma_priv *priv)
> return 0;
>  }
>
> -static int axiemac_setup_mac(struct eth_device *dev)
> +static int axiemac_setup_mac(struct udevice *dev)
>  {
> -   struct axi_regs *regs = (struct axi_regs *)dev->iobase;
> +   struct eth_pdata *pdata = dev_get_platdata(dev);
> +   struct axidma_priv *priv = dev_get_priv(dev);
> +   struct axi_regs *regs = priv->iobase;
>
> /* Set the MAC address */
> -   int val = ((dev->enetaddr[3] << 24) | (dev->enetaddr[2] << 16) |
> -   (dev->enetaddr[1] << 8) | (dev->enetaddr[0]));
> +   int val = ((pdata->enetaddr[3] << 24) | (pdata->enetaddr[2] << 16) |
> +   (pdata->enetaddr[1] << 8) | (pdata->enetaddr[0]));
> out_be32(>uaw0, val);
>
> -   val = (dev->enetaddr[5] << 8) | dev->enetaddr[4] ;
> +   val = (pdata->enetaddr[5] << 8) | pdata->enetaddr[4];
> val |= in_be32(>uaw1) & ~XAE_UAW1_UNICASTADDR_MASK;
> out_be32(>uaw1, val);
> return 0;
> @@ -396,10 +402,10 @@ static void axi_dma_init(struct axidma_priv *priv)
> printf("%s: Timeout\n", __func__);
>  }
>
> -static int axiemac_init(struct eth_device *dev, bd_t * bis)
> +static int axiemac_init(struct udevice *dev)
>  {
> -   struct axidma_priv *priv = dev->priv;
> -   struct axi_regs *regs = (struct axi_regs *)dev->iobase;
> +   struct axidma_priv *priv = dev_get_priv(dev);
> +   struct axi_regs *regs = priv->iobase;
> u32 temp;
>
> debug("axiemac: Init started\n");
> @@ -458,9 +464,9 @@ static int 

Re: [U-Boot] [PATCH 0/5] Add wait_for_bit()

[LEMIEUX, SYLVAIN]

> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Mateusz 
> Kulikowski
> Sent: 14-Dec-15 7:09 PM
> To: u-boot@lists.denx.de; Marek Vasut; Joe Hershberger
> Subject: [U-Boot] [PATCH 0/5] Add wait_for_bit()
>
>
> This series add generic function to poll register waiting for
> one or more bits to change.
>
> Very similar function was used in several drivers:
> - dwc2
> - ohci-lp32xx
> - ehci-mx6
> - zynq_gem
>
> First patch adds function, following patches update drivers and
> board config files / defconfigs.
>
> This series was compile-tested with buildman for ~50 boards
> (most or even all boards affected by change)
>
> Code was also run-tested on ehci-msm driver (not yet in mainline)
>
> There is single difference in behavior: ohci-lp32xx driver will
> not print "Timeout..." message with debug disabled.
> I think it's not a big issue as this driver seems unused, but
> if it's an issue - please drop that patch.

This is not an issue; the lpc32xx driver is used in our custom board based on 
u-boot 2015.10.

>
>
...
>
> --
> 2.5.0
>
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Re: [U-Boot] [RFC PATCH 01/11] serial: Add support for Qualcomm serial port

[Simon Glass]

Hi Mateusz,

On 10 December 2015 at 14:41, Mateusz Kulikowski
 wrote:
> This driver works in "new" Data Mover UART mode, so
> will be compatible with modern Qualcomm chips only.
>
> Signed-off-by: Mateusz Kulikowski 
> ---
>
>  drivers/serial/Kconfig  |   5 ++
>  drivers/serial/Makefile |   1 +
>  drivers/serial/serial_msm.c | 204 
> 
>  3 files changed, 210 insertions(+)
>  create mode 100644 drivers/serial/serial_msm.c
>
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index 1fc287e..f28c093 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -223,4 +223,9 @@ config UNIPHIER_SERIAL
>   If you have a UniPhier based board and want to use the on-chip
>   serial ports, say Y to this option. If unsure, say N.
>
> +config MSM_SERIAL
> +   bool "Qualcomm on-chip UART"
> +   depends on DM_SERIAL
> +   help
> + Support Data Mover UART used on Qualcomm Snapdragon SoCs.

Any more details? What baud rates does it support? What SoCs use it?

>  endmenu
> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> index dd87147..d052175 100644
> --- a/drivers/serial/Makefile
> +++ b/drivers/serial/Makefile
> @@ -41,6 +41,7 @@ obj-$(CONFIG_MXS_AUART) += mxs_auart.o
>  obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
>  obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
>  obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
> +obj-$(CONFIG_MSM_SERIAL) += serial_msm.o
>
>  ifndef CONFIG_SPL_BUILD
>  obj-$(CONFIG_USB_TTY) += usbtty.o
> diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
> new file mode 100644
> index 000..13dad33
> --- /dev/null
> +++ b/drivers/serial/serial_msm.c
> @@ -0,0 +1,204 @@
> +/*
> + * Qualcomm UART driver
> + *
> + * (C) Copyright 2015 Mateusz Kulikowski 
> + *
> + * UART will work in Data Mover mode.
> + * Based on Linux driver.
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

Ordering:

common.h
clk.h
dm.h
errno.h
serial.h
watchdog.h
asm/
linux/


> +
> +/* Serial registers - this driver works in uartdm mode*/
> +
> +#define UARTDM_DMRX 0x34 /* Max RX transfer length */
> +#define UARTDM_NCF_TX   0x40 /* Number of chars to TX */
> +
> +#define UARTDM_RXFS 0x50 /* RX channel status register */
> +#define UARTDM_RXFS_BUF_SHIFT   0x7  /* Number of bytes in the packing 
> buffer */
> +#define UARTDM_RXFS_BUF_MASK0x7
> +
> +#define UARTDM_SR0xA4 /* Status register */
> +#define UARTDM_SR_RX_READY   (1 << 0) /* Word is the receiver FIFO */
> +#define UARTDM_SR_TX_EMPTY   (1 << 3) /* Transmitter underrun */
> +#define UARTDM_SR_UART_OVERRUN   (1 << 4) /* Receive overrun */
> +
> +#define UARTDM_CR 0xA8 /* Command register */
> +#define UARTDM_CR_CMD_RESET_ERR   (3 << 4) /* Clear overrun error */
> +#define UARTDM_CR_CMD_RESET_STALE_INT (8 << 4) /* Clears stale irq */
> +#define UARTDM_CR_CMD_RESET_TX_READY  (3 << 8) /* Clears TX Ready irq*/
> +#define UARTDM_CR_CMD_FORCE_STALE (4 << 8) /* Causes stale event */
> +#define UARTDM_CR_CMD_STALE_EVENT_DISABLE (6 << 8) /* Disable stale event */
> +
> +#define UARTDM_IMR0xB0 /* Interrupt mask register */
> +#define UARTDM_ISR0xB4 /* Interrupt status register */
> +#define UARTDM_ISR_TX_READY   0x80 /* TX FIFO empty */
> +
> +#define UARTDM_TF   0x100 /* UART Transmit FIFO register */
> +#define UARTDM_RF   0x140 /* UART Receive FIFO register */
> +
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct msm_serial_data {
> +   phys_addr_t base;
> +   unsigned chars_cnt; /* number of buffered chars */
> +   uint32_t chars_buf; /* buffered chars */
> +};
> +
> +static int msm_serial_getc(struct udevice *dev)
> +{
> +   struct msm_serial_data *p = dev_get_priv(dev);
> +   unsigned sr;
> +   char c;
> +
> +   /* There was something buffered */
> +   if (p->chars_cnt) {
> +   c = p->chars_buf & 0xFF;
> +   p->chars_buf >>= 8;
> +   p->chars_cnt--;
> +   return c;
> +   }
> +
> +   /* Clear error in case of buffer overrun */
> +   if (readl(p->base + UARTDM_SR) & UARTDM_SR_UART_OVERRUN)
> +   writel(UARTDM_CR_CMD_RESET_ERR, p->base + UARTDM_CR);
> +
> +   /* We need to fetch new character */
> +   sr = readl(p->base + UARTDM_SR);
> +
> +   /* There are at least 4 bytes in fifo */
> +   if (sr & UARTDM_SR_RX_READY) {
> +   p->chars_buf = readl(p->base + UARTDM_RF);
> +   c = p->chars_buf & 0xFF;
> +   p->chars_cnt = 3; /* 4 - one read */
> +   p->chars_buf >>= 8;
> +   return c;
> +   }
> 

Re: [U-Boot] [PATCH 2/5] net: gem: Fix return value from recv

[Joe Hershberger]

Hi Michal,

On Tue, Dec 15, 2015 at 11:47 AM, Joe Hershberger
 wrote:
> On Fri, Dec 11, 2015 at 5:43 AM, Michal Simek  wrote:
>> recv function should return 0 instead of frame_len not to
>> proceed the same packet again in core.
>>
>> Signed-off-by: Michal Simek 
>
> Acked-by: Joe Hershberger 

Oops. NAK. Didn't realize this was the top-level recv function being
passed to the eth layer.

-Joe
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Re: [U-Boot] [PATCH 07/10] net: axi_emac: Move driver to DM

[Joe Hershberger]

Hi Michal,

On Tue, Dec 15, 2015 at 1:40 PM, Michal Simek  wrote:
> On 15.12.2015 19:57, Simon Glass wrote:
>> Hi Michal,
>>
>> On 11 December 2015 at 04:59, Michal Simek  wrote:
>>> Move driver to DM.
>>>
>>> Signed-off-by: Michal Simek 
>>> ---
>>>
>>>  .../xilinx/microblaze-generic/microblaze-generic.c |   5 -
>>>  board/xilinx/zynq/board.c  |   4 -
>>>  drivers/net/xilinx_axi_emac.c  | 190 
>>> +
>>>  include/netdev.h   |   2 -
>>>  4 files changed, 122 insertions(+), 79 deletions(-)
>>
>> Reviewed-by: Simon Glass 
>>
>> See a few things below.
>>
>>>
>>> diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c 
>>> b/board/xilinx/microblaze-generic/microblaze-generic.c
>>> index dfa62933..a3122da9acaa 100644
>>> --- a/board/xilinx/microblaze-generic/microblaze-generic.c
>>> +++ b/board/xilinx/microblaze-generic/microblaze-generic.c
>>> @@ -105,11 +105,6 @@ int board_eth_init(bd_t *bis)
>>>  {
>>> int ret = 0;
>>>
>>> -#ifdef CONFIG_XILINX_AXIEMAC
>>> -   ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
>>> -   XILINX_AXIDMA_BASEADDR);
>>> -#endif
>>> -
>>>  #if defined(CONFIG_XILINX_EMACLITE) && defined(XILINX_EMACLITE_BASEADDR)
>>> u32 txpp = 0;
>>> u32 rxpp = 0;
>>> diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
>>> index 414f5302a066..427e75485deb 100644
>>> --- a/board/xilinx/zynq/board.c
>>> +++ b/board/xilinx/zynq/board.c
>>> @@ -103,10 +103,6 @@ int board_eth_init(bd_t *bis)
>>>  {
>>> u32 ret = 0;
>>>
>>> -#ifdef CONFIG_XILINX_AXIEMAC
>>> -   ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
>>> -   XILINX_AXIDMA_BASEADDR);
>>> -#endif
>>>  #ifdef CONFIG_XILINX_EMACLITE
>>> u32 txpp = 0;
>>> u32 rxpp = 0;
>>> diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
>>> index 77b1869dc9dc..c03f8f730d3a 100644
>>> --- a/drivers/net/xilinx_axi_emac.c
>>> +++ b/drivers/net/xilinx_axi_emac.c
>>> @@ -8,12 +8,15 @@
>>>
>>>  #include 
>>>  #include 
>>> +#include 
>>>  #include 
>>>  #include 
>>>  #include 
>>>  #include 
>>>  #include 
>>>
>>> +DECLARE_GLOBAL_DATA_PTR;
>>> +
>>>  #if !defined(CONFIG_PHYLIB)
>>>  # error AXI_ETHERNET requires PHYLIB
>>>  #endif
>>> @@ -87,6 +90,7 @@ struct axidma_priv {
>>> struct axidma_reg *dmarx;
>>> int phyaddr;
>>> struct axi_regs *iobase;
>>> +   phy_interface_t interface;
>>> struct phy_device *phydev;
>>> struct mii_dev *bus;
>>>  };
>>> @@ -218,11 +222,11 @@ static u32 phywrite(struct axidma_priv *priv, u32 
>>> phyaddress, u32 registernum,
>>>  }
>>>
>>>  /* Setting axi emac and phy to proper setting */
>>> -static int setup_phy(struct eth_device *dev)
>>> +static int setup_phy(struct udevice *dev)
>>>  {
>>> u16 phyreg;
>>> u32 i, speed, emmc_reg, ret;
>>> -   struct axidma_priv *priv = dev->priv;
>>> +   struct axidma_priv *priv = dev_get_priv(dev);
>>> struct axi_regs *regs = priv->iobase;
>>> struct phy_device *phydev;
>>>
>>> @@ -298,9 +302,9 @@ static int setup_phy(struct eth_device *dev)
>>>  }
>>>
>>>  /* STOP DMA transfers */
>>> -static void axiemac_halt(struct eth_device *dev)
>>> +static void axiemac_halt(struct udevice *dev)
>>>  {
>>> -   struct axidma_priv *priv = dev->priv;
>>> +   struct axidma_priv *priv = dev_get_priv(dev);
>>> u32 temp;
>>>
>>> /* Stop the hardware */
>>> @@ -358,16 +362,18 @@ static int axi_ethernet_init(struct axidma_priv *priv)
>>> return 0;
>>>  }
>>>
>>> -static int axiemac_setup_mac(struct eth_device *dev)
>>> +static int axiemac_setup_mac(struct udevice *dev)
>>>  {
>>> -   struct axi_regs *regs = (struct axi_regs *)dev->iobase;
>>> +   struct eth_pdata *pdata = dev_get_platdata(dev);
>>> +   struct axidma_priv *priv = dev_get_priv(dev);
>>> +   struct axi_regs *regs = priv->iobase;
>>>
>>> /* Set the MAC address */
>>> -   int val = ((dev->enetaddr[3] << 24) | (dev->enetaddr[2] << 16) |
>>> -   (dev->enetaddr[1] << 8) | (dev->enetaddr[0]));
>>> +   int val = ((pdata->enetaddr[3] << 24) | (pdata->enetaddr[2] << 16) |
>>> +   (pdata->enetaddr[1] << 8) | (pdata->enetaddr[0]));
>>> out_be32(>uaw0, val);
>>>
>>> -   val = (dev->enetaddr[5] << 8) | dev->enetaddr[4] ;
>>> +   val = (pdata->enetaddr[5] << 8) | pdata->enetaddr[4];
>>> val |= in_be32(>uaw1) & ~XAE_UAW1_UNICASTADDR_MASK;
>>> out_be32(>uaw1, val);
>>> return 0;
>>> @@ -396,10 +402,10 @@ static void axi_dma_init(struct axidma_priv *priv)
>>> printf("%s: Timeout\n", __func__);
>>>  }
>>>
>>> -static int axiemac_init(struct 

Re: [U-Boot] [PATCH 01/10] net: axi_emac: Fix parentheses around operand !

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:59 AM, Michal Simek  wrote:
> Fix these compilation warning by proper grouping:
> In function 'axi_dma_init': drivers/net/xilinx_axi_emac.c:391:7:
> warning: suggest parentheses around operand of '!' or change '&' to '&&'
> or '!' to '~' [-Wparentheses]
> if (!(in_be32(>dmatx->control) |
> ^
> In function 'axiemac_send': drivers/net/xilinx_axi_emac.c:501:21:
> warning: suggest parentheses around operand of '!' or change '&' to '&&'
> or '!' to '~' [-Wparentheses]
>   while (timeout && (!in_be32(>dmatx->status) &
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 07/10] net: axi_emac: Move driver to DM

[Michal Simek]

On 15.12.2015 19:57, Simon Glass wrote:
> Hi Michal,
> 
> On 11 December 2015 at 04:59, Michal Simek  wrote:
>> Move driver to DM.
>>
>> Signed-off-by: Michal Simek 
>> ---
>>
>>  .../xilinx/microblaze-generic/microblaze-generic.c |   5 -
>>  board/xilinx/zynq/board.c  |   4 -
>>  drivers/net/xilinx_axi_emac.c  | 190 
>> +
>>  include/netdev.h   |   2 -
>>  4 files changed, 122 insertions(+), 79 deletions(-)
> 
> Reviewed-by: Simon Glass 
> 
> See a few things below.
> 
>>
>> diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c 
>> b/board/xilinx/microblaze-generic/microblaze-generic.c
>> index dfa62933..a3122da9acaa 100644
>> --- a/board/xilinx/microblaze-generic/microblaze-generic.c
>> +++ b/board/xilinx/microblaze-generic/microblaze-generic.c
>> @@ -105,11 +105,6 @@ int board_eth_init(bd_t *bis)
>>  {
>> int ret = 0;
>>
>> -#ifdef CONFIG_XILINX_AXIEMAC
>> -   ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
>> -   XILINX_AXIDMA_BASEADDR);
>> -#endif
>> -
>>  #if defined(CONFIG_XILINX_EMACLITE) && defined(XILINX_EMACLITE_BASEADDR)
>> u32 txpp = 0;
>> u32 rxpp = 0;
>> diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
>> index 414f5302a066..427e75485deb 100644
>> --- a/board/xilinx/zynq/board.c
>> +++ b/board/xilinx/zynq/board.c
>> @@ -103,10 +103,6 @@ int board_eth_init(bd_t *bis)
>>  {
>> u32 ret = 0;
>>
>> -#ifdef CONFIG_XILINX_AXIEMAC
>> -   ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
>> -   XILINX_AXIDMA_BASEADDR);
>> -#endif
>>  #ifdef CONFIG_XILINX_EMACLITE
>> u32 txpp = 0;
>> u32 rxpp = 0;
>> diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
>> index 77b1869dc9dc..c03f8f730d3a 100644
>> --- a/drivers/net/xilinx_axi_emac.c
>> +++ b/drivers/net/xilinx_axi_emac.c
>> @@ -8,12 +8,15 @@
>>
>>  #include 
>>  #include 
>> +#include 
>>  #include 
>>  #include 
>>  #include 
>>  #include 
>>  #include 
>>
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>>  #if !defined(CONFIG_PHYLIB)
>>  # error AXI_ETHERNET requires PHYLIB
>>  #endif
>> @@ -87,6 +90,7 @@ struct axidma_priv {
>> struct axidma_reg *dmarx;
>> int phyaddr;
>> struct axi_regs *iobase;
>> +   phy_interface_t interface;
>> struct phy_device *phydev;
>> struct mii_dev *bus;
>>  };
>> @@ -218,11 +222,11 @@ static u32 phywrite(struct axidma_priv *priv, u32 
>> phyaddress, u32 registernum,
>>  }
>>
>>  /* Setting axi emac and phy to proper setting */
>> -static int setup_phy(struct eth_device *dev)
>> +static int setup_phy(struct udevice *dev)
>>  {
>> u16 phyreg;
>> u32 i, speed, emmc_reg, ret;
>> -   struct axidma_priv *priv = dev->priv;
>> +   struct axidma_priv *priv = dev_get_priv(dev);
>> struct axi_regs *regs = priv->iobase;
>> struct phy_device *phydev;
>>
>> @@ -298,9 +302,9 @@ static int setup_phy(struct eth_device *dev)
>>  }
>>
>>  /* STOP DMA transfers */
>> -static void axiemac_halt(struct eth_device *dev)
>> +static void axiemac_halt(struct udevice *dev)
>>  {
>> -   struct axidma_priv *priv = dev->priv;
>> +   struct axidma_priv *priv = dev_get_priv(dev);
>> u32 temp;
>>
>> /* Stop the hardware */
>> @@ -358,16 +362,18 @@ static int axi_ethernet_init(struct axidma_priv *priv)
>> return 0;
>>  }
>>
>> -static int axiemac_setup_mac(struct eth_device *dev)
>> +static int axiemac_setup_mac(struct udevice *dev)
>>  {
>> -   struct axi_regs *regs = (struct axi_regs *)dev->iobase;
>> +   struct eth_pdata *pdata = dev_get_platdata(dev);
>> +   struct axidma_priv *priv = dev_get_priv(dev);
>> +   struct axi_regs *regs = priv->iobase;
>>
>> /* Set the MAC address */
>> -   int val = ((dev->enetaddr[3] << 24) | (dev->enetaddr[2] << 16) |
>> -   (dev->enetaddr[1] << 8) | (dev->enetaddr[0]));
>> +   int val = ((pdata->enetaddr[3] << 24) | (pdata->enetaddr[2] << 16) |
>> +   (pdata->enetaddr[1] << 8) | (pdata->enetaddr[0]));
>> out_be32(>uaw0, val);
>>
>> -   val = (dev->enetaddr[5] << 8) | dev->enetaddr[4] ;
>> +   val = (pdata->enetaddr[5] << 8) | pdata->enetaddr[4];
>> val |= in_be32(>uaw1) & ~XAE_UAW1_UNICASTADDR_MASK;
>> out_be32(>uaw1, val);
>> return 0;
>> @@ -396,10 +402,10 @@ static void axi_dma_init(struct axidma_priv *priv)
>> printf("%s: Timeout\n", __func__);
>>  }
>>
>> -static int axiemac_init(struct eth_device *dev, bd_t * bis)
>> +static int axiemac_init(struct udevice *dev)
>>  {
>> -   struct axidma_priv *priv = dev->priv;
>> -   struct axi_regs *regs = (struct axi_regs *)dev->iobase;
>> +   struct axidma_priv 

Re: [U-Boot] [PATCH 02/10] net: axi_emac: Show phy address instead of register content

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:59 AM, Michal Simek  wrote:
> Fix debug message.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 06/57] x86: ivybridge: Set up the LPC device using driver model

[Simon Glass]

Hi Bin,

On 13 December 2015 at 05:52, Bin Meng  wrote:
> Hi Simon,
>
> On Tue, Dec 8, 2015 at 11:38 AM, Simon Glass  wrote:
>> Find the LPC device in arch_cpu_init_dm() as a first step to converting
>> this code to use driver model. Probing the LPC will probe its parent (the
>> PCH) automatically, so make sure that probing the PCH does nothing before
>> relocation.
>>
>> Signed-off-by: Simon Glass 
>> ---
>>
>>  arch/x86/cpu/ivybridge/bd82x6x.c | 3 +++
>>  arch/x86/cpu/ivybridge/cpu.c | 6 +-
>>  arch/x86/cpu/ivybridge/lpc.c | 6 ++
>>  arch/x86/dts/chromebook_link.dts | 1 +
>>  4 files changed, 15 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c 
>> b/arch/x86/cpu/ivybridge/bd82x6x.c
>> index abd59da..be39bcd 100644
>> --- a/arch/x86/cpu/ivybridge/bd82x6x.c
>> +++ b/arch/x86/cpu/ivybridge/bd82x6x.c
>> @@ -64,6 +64,9 @@ static int bd82x6x_probe(struct udevice *dev)
>> int sata_node, gma_node;
>> int ret;
>>
>> +   if (!(gd->flags & GD_FLG_RELOC))
>> +   return 0;
>> +
>> hose = pci_bus_to_hose(0);
>> lpc_enable(PCH_LPC_DEV);
>> lpc_init(hose, PCH_LPC_DEV);
>> diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
>> index 0387444..fd7e1fc 100644
>> --- a/arch/x86/cpu/ivybridge/cpu.c
>> +++ b/arch/x86/cpu/ivybridge/cpu.c
>> @@ -126,7 +126,7 @@ int arch_cpu_init_dm(void)
>>  {
>> const void *blob = gd->fdt_blob;
>> struct pci_controller *hose;
>> -   struct udevice *bus;
>> +   struct udevice *bus, *dev;
>> int node;
>> int ret;
>>
>> @@ -141,6 +141,10 @@ int arch_cpu_init_dm(void)
>> /* TODO(s...@chromium.org): Get rid of gd->hose */
>> gd->hose = hose;
>>
>> +   ret = uclass_first_device(UCLASS_LPC, );
>> +   if (!dev)
>> +   return -ENODEV;
>> +
>> node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_PCH);
>> if (node < 0)
>> return -ENOENT;
>> diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c
>> index 3efd3e8..04a7451 100644
>> --- a/arch/x86/cpu/ivybridge/lpc.c
>> +++ b/arch/x86/cpu/ivybridge/lpc.c
>> @@ -568,6 +568,11 @@ void lpc_enable(pci_dev_t dev)
>> setbits_le32(RCB_REG(FD2), PCH_ENABLE_DBDF);
>>  }
>>
>> +static int bd82x6x_lpc_probe(struct udevice *dev)
>> +{
>> +   return 0;
>> +}
>> +
>>  static const struct udevice_id bd82x6x_lpc_ids[] = {
>> { .compatible = "intel,bd82x6x-lpc" },
>> { }
>> @@ -577,4 +582,5 @@ U_BOOT_DRIVER(bd82x6x_lpc_drv) = {
>> .name   = "lpc",
>> .id = UCLASS_LPC,
>> .of_match   = bd82x6x_lpc_ids,
>> +   .probe  = bd82x6x_lpc_probe,
>>  };
>> diff --git a/arch/x86/dts/chromebook_link.dts 
>> b/arch/x86/dts/chromebook_link.dts
>> index 4d158da..7a009db 100644
>> --- a/arch/x86/dts/chromebook_link.dts
>> +++ b/arch/x86/dts/chromebook_link.dts
>> @@ -223,6 +223,7 @@
>> compatible = "intel,bd82x6x-lpc";
>> #address-cells = <1>;
>> #size-cells = <0>;
>> +   u-boot,dm-pre-reloc;
>> cros-ec@200 {
>> compatible = "google,cros-ec";
>> reg = <0x204 1 0x200 1 0x880 0x80>;
>> --
>
> The codes look good to me, but I have one question: what is the LPC
> uclass for? My understanding is that we already have the PCH uclass,
> which is for the bridge. LPC uclass seems to be duplicated. We can
> have cros-ec directly attached to the PCH node in the device tree.

I was going to mention that in the cover letter.

At present I have the northbridge as 0,0,0 device. The PCH is at
0,1f,0. Looking at the Intel datasheets the LPC is one of the pieces
in the PCH. SPI is another piece. So I came up with having the PCH as
the parent device and LPC and SPI as children.

Regards,
Simon
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Re: [U-Boot] [PATCH 3/5] usb: ohci-lpc32xx: Use shared wait_for_bit

[LEMIEUX, SYLVAIN]

> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Mateusz 
> Kulikowski
> Sent: 14-Dec-15 7:09 PM
> To: u-boot@lists.denx.de; Marek Vasut; Joe Hershberger
> Subject: [U-Boot] [PATCH 3/5] usb: ohci-lpc32xx: Use shared wait_for_bit
>
> Use existing library function to poll bit(s).
> No config files are updated, as there is no board using this driver.

I tested the change using our custom lpc32xx board.

>
> Signed-off-by: Mateusz Kulikowski 
> ---
>
>  drivers/usb/host/ohci-lpc32xx.c | 36 ++--
>  1 file changed, 10 insertions(+), 26 deletions(-)
>

...
Tested-by: Sylvain Lemieux 



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Re: [U-Boot] [RFC PATCH 08/11] pmic: Add support for Qualcomm PM8916 PMIC

[Simon Glass]

Hi Mateusz,

On 10 December 2015 at 14:41, Mateusz Kulikowski
 wrote:
> This PMIC is connected on SPMI bus so needs SPMI support enabled.
>
> Signed-off-by: Mateusz Kulikowski 
> ---
>
>  drivers/power/pmic/Kconfig  | 14 +++
>  drivers/power/pmic/Makefile |  1 +
>  drivers/power/pmic/pm8916.c | 92 
> +
>  3 files changed, 107 insertions(+)
>  create mode 100644 drivers/power/pmic/pm8916.c
>
> diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
> index fb29843..eb1dde0 100644
> --- a/drivers/power/pmic/Kconfig
> +++ b/drivers/power/pmic/Kconfig
> @@ -89,3 +89,17 @@ config PMIC_TPS65090
> FETs and a battery charger. This driver provides register access
> only, and you can enable the regulator/charger drivers separately if
> required.
> +
> +config PMIC_PM8916
> +   bool "Enable Driver Model for Qualcomm PM8916 PMIC"
> +   depends on DM_PMIC
> +   ---help---
> +   The PM8916 is a PMIC connected to one (or several) processors
> +   with SPMI bus. It has 2 slaves with several peripherals:
> +   - 18x LDO
> +   - 4x GPIO
> +   - Power and Reset buttons
> +   - Watchdog
> +   - RTC
> +   - Vibrator drivers
> +   - Others

Nice help!

> diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
> index 91e78f8..ac653c7 100644
> --- a/drivers/power/pmic/Makefile
> +++ b/drivers/power/pmic/Makefile
> @@ -13,6 +13,7 @@ obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o
>  obj-$(CONFIG_PMIC_ACT8846) += act8846.o
>  obj-$(CONFIG_PMIC_TPS65090) += tps65090.o
>  obj-$(CONFIG_PMIC_S5M8767) += s5m8767.o
> +obj-$(CONFIG_PMIC_PM8916) += pm8916.o
>
>  obj-$(CONFIG_POWER_LTC3676) += pmic_ltc3676.o
>  obj-$(CONFIG_POWER_MAX77696) += pmic_max77696.o
> diff --git a/drivers/power/pmic/pm8916.c b/drivers/power/pmic/pm8916.c
> new file mode 100644
> index 000..5fe50ef
> --- /dev/null
> +++ b/drivers/power/pmic/pm8916.c
> @@ -0,0 +1,92 @@
> +/*
> + * Qualcomm pm8916 pmic driver
> + *
> + * (C) Copyright 2015 Mateusz Kulikowski 
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

Fix ordering

> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define EXTRACT_PID(x) (((x) >> 8) & 0xFF)
> +#define EXTRACT_REG(x) ((x) & 0xFF)

Can you define

#define PID_SHIFT 8
#define PID_MASK (0xff << PID_SHIFT)

and use those? I prefer lower-case hex but there is no convention on that.

> +
> +struct pm8916_priv {
> +   uint16_t usid; /* Slave ID on SPMI bus */
> +};
> +
> +static int pm8916_reg_count(struct udevice *dev)
> +{
> +   return 0x;
> +}
> +
> +static int pm8916_write(struct udevice *dev, uint reg, const uint8_t *buff,
> +   int len)
> +{
> +   struct pm8916_priv *priv = dev_get_priv(dev);
> +
> +   if (len != 1)
> +   return -EINVAL;
> +
> +   return spmi_reg_write(dev->parent, priv->usid, EXTRACT_PID(reg),
> + EXTRACT_REG(reg), *buff);
> +}
> +
> +static int pm8916_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
> +{
> +   struct pm8916_priv *priv = dev_get_priv(dev);
> +   int val;
> +
> +   if (len != 1)
> +   return -EINVAL;
> +
> +   val = spmi_reg_read(dev->parent, priv->usid, EXTRACT_PID(reg),
> +   EXTRACT_REG(reg));
> +
> +   if (val < 0)
> +   return val;
> +   *buff = val;
> +   return 0;
> +}
> +
> +static struct dm_pmic_ops pm8916_ops = {
> +   .reg_count = pm8916_reg_count,
> +   .read = pm8916_read,
> +   .write = pm8916_write,
> +};
> +
> +static const struct udevice_id pm8916_ids[] = {
> +   { .compatible = "qcom,spmi-pmic" },

Binding doc?

> +   { }
> +};
> +
> +static int pm8916_probe(struct udevice *dev)
> +{
> +   struct pm8916_priv *priv = dev_get_priv(dev);

blank line

> +   priv->usid = dev_get_addr(dev);
> +   return 0;
> +}
> +
> +
> +static int pm8916_bind(struct udevice *dev)
> +{
> +   return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
> +}
> +
> +U_BOOT_DRIVER(pmic_pm8916) = {
> +   .name = "pmic_pm8916",
> +   .id = UCLASS_PMIC,
> +   .of_match = pm8916_ids,
> +   .bind = pm8916_bind,
> +   .probe = pm8916_probe,
> +   .ops = _ops,
> +   .priv_auto_alloc_size = sizeof(struct pm8916_priv),
> +};
> --
> 2.5.0
>

Regards,
Simon
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Re: [U-Boot] [PATCH 06/10] net: axi_emac: Pass private structure where possible

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:59 AM, Michal Simek  wrote:
> Simplify move to DM to avoid handling with eth_device structure.

I think you need to change this commit log. You are moving functions
to use axidma_priv instead of eth_device in preparation of the DM
move. You are not actually moving to DM with this patch.

> Signed-off-by: Michal Simek 
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Re: [U-Boot] [PATCH 2/5] microblaze: Do not print eth device when DM_ETH is enabled

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:56 AM, Michal Simek  wrote:
> Doing the same fix as is done for ARM by:
> "Avoid calling print_eths() with driver model"
> (sha1: ff97380015b6b5d7d6267417a1cd6fc0e67b81bc)
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [RFC PATCH 06/11] drivers: Add SPMI bus uclass

[Simon Glass]

Hi Matheusz,

On 10 December 2015 at 14:41, Mateusz Kulikowski
 wrote:
> Qualcom processors use proprietary bus to talk with PMIC devices -
> SPMI (System Power Management Interface).
> On wiring level it is similar to I2C, but on protocol level, it's
> multi-master and has simple autodetection capabilities.
> This commit adds simple uclass that provides bus read/write interface.
>
> Signed-off-by: Mateusz Kulikowski 
> ---
>
>  drivers/Kconfig|  2 ++
>  drivers/Makefile   |  1 +
>  drivers/spmi/Kconfig   | 10 +
>  drivers/spmi/Makefile  |  7 ++
>  drivers/spmi/spmi-uclass.c | 53 
> ++
>  include/dm/uclass-id.h |  1 +
>  include/spmi/spmi.h| 44 ++
>  7 files changed, 118 insertions(+)
>  create mode 100644 drivers/spmi/Kconfig
>  create mode 100644 drivers/spmi/Makefile
>  create mode 100644 drivers/spmi/spmi-uclass.c
>  create mode 100644 include/spmi/spmi.h
>
> diff --git a/drivers/Kconfig b/drivers/Kconfig
> index c481e93..4cbe976 100644
> --- a/drivers/Kconfig
> +++ b/drivers/Kconfig
> @@ -52,6 +52,8 @@ source "drivers/remoteproc/Kconfig"
>
>  source "drivers/rtc/Kconfig"
>
> +source "drivers/spmi/Kconfig"
> +
>  source "drivers/serial/Kconfig"
>
>  source "drivers/sound/Kconfig"
> diff --git a/drivers/Makefile b/drivers/Makefile
> index c9031f2..7ae72c0 100644
> --- a/drivers/Makefile
> +++ b/drivers/Makefile
> @@ -53,6 +53,7 @@ obj-y += pcmcia/
>  obj-y += dfu/
>  obj-y += rtc/
>  obj-y += sound/
> +obj-y += spmi/
>  obj-y += timer/
>  obj-y += tpm/
>  obj-y += twserial/
> diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
> new file mode 100644
> index 000..2d8d78b
> --- /dev/null
> +++ b/drivers/spmi/Kconfig
> @@ -0,0 +1,10 @@
> +menu "SPMI support"
> +
> +config DM_SPMI
> +   bool "Enable SPMI bus support"
> +   depends on DM
> +   ---help---
> +   Select this to enable to support SPMI bus.
> +   SPMI (System Power Management Interface) bus is used
> +   to connect PMIC devices on various SoCs.
> +endmenu
> diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile
> new file mode 100644
> index 000..2015b1a
> --- /dev/null
> +++ b/drivers/spmi/Makefile
> @@ -0,0 +1,7 @@
> +#
> +# (C) Copyright 2015 Mateusz Kulikowski 
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +obj-$(CONFIG_DM_SPMI)  += spmi-uclass.o
> diff --git a/drivers/spmi/spmi-uclass.c b/drivers/spmi/spmi-uclass.c
> new file mode 100644
> index 000..981da68
> --- /dev/null
> +++ b/drivers/spmi/spmi-uclass.c
> @@ -0,0 +1,53 @@
> +/*
> + * SPMI bus uclass driver
> + *
> + * (C) Copyright 2015 Mateusz Kulikowski 
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

Fix ordering

> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int spmi_reg_read(struct udevice *dev, int usid, int pid, int reg)
> +{
> +   const struct dm_spmi_ops *ops = dev_get_driver_ops(dev);
> +
> +   if (!ops || !ops->read)
> +   return -ENOSYS;
> +
> +   return ops->read(dev, usid, pid, reg);
> +}
> +
> +int spmi_reg_write(struct udevice *dev, int usid, int pid, int reg,
> +  uint8_t value)
> +{
> +   const struct dm_spmi_ops *ops = dev_get_driver_ops(dev);
> +
> +   if (!ops || !ops->write)
> +   return -ENOSYS;
> +
> +   return ops->write(dev, usid, pid, reg, value);
> +}
> +
> +static int msm_spmi_post_bind(struct udevice *dev)
> +{
> +   return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
> +}
> +
> +UCLASS_DRIVER(spmi) = {
> +   .id = UCLASS_SPMI,
> +   .name   = "spmi",
> +   .post_bind  = msm_spmi_post_bind,
> +};
> diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
> index 27fa0b6..772e780 100644
> --- a/include/dm/uclass-id.h
> +++ b/include/dm/uclass-id.h
> @@ -57,6 +57,7 @@ enum uclass_id {
> UCLASS_RTC, /* Real time clock device */
> UCLASS_SERIAL,  /* Serial UART */
> UCLASS_SPI, /* SPI bus */
> +   UCLASS_SPMI,/* System Power Management Interface bus */
> UCLASS_SPI_FLASH,   /* SPI flash */
> UCLASS_SPI_GENERIC, /* Generic SPI flash target */
> UCLASS_SYSCON,  /* System configuration device */
> diff --git a/include/spmi/spmi.h b/include/spmi/spmi.h
> new file mode 100644
> index 000..e06a79e
> --- /dev/null
> +++ b/include/spmi/spmi.h
> @@ -0,0 +1,44 @@
> +#ifndef _SPMI_SPMI_H
> +#define _SPMI_SPMI_H
> +
> +/**
> + * struct dm_spmi_ops - SPMI device I/O interface
> + *
> + * Should be implemented by UCLASS_SPMI device drivers. The standard
> + * device operations provides the 

Re: [U-Boot] [RFC PATCH 02/11] gpio: Add support for Qualcomm gpio controller

[Simon Glass]

Hi Mateusz,

On 10 December 2015 at 14:41, Mateusz Kulikowski
 wrote:
> Add support for gpio controllers on Qualcomm Snapdragon devices.
> This devices are usually called Top Level Mode Multiplexing in
> Qualcomm documentation.
>
> Signed-off-by: Mateusz Kulikowski 
> ---
>
>  drivers/gpio/Kconfig|   7 +++
>  drivers/gpio/Makefile   |   2 +-
>  drivers/gpio/msm_gpio.c | 115 
> 
>  3 files changed, 123 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/gpio/msm_gpio.c
>
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index e60e9fd..1d9443b 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -46,6 +46,13 @@ config LPC32XX_GPIO
> help
>   Support for the LPC32XX GPIO driver.
>
> +config MSM_GPIO
> +   bool "Qualcomm GPIO driver"
> +   depends on DM_GPIO
> +   default n
> +   help
> + Support GPIO controllers on Qualcomm Snapdragon family of SoCs.

Any more details? How many banks? How are they named? What features
does the driver support?

> +
>  config ROCKCHIP_GPIO
> bool "Rockchip GPIO driver"
> depends on DM_GPIO
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index fb4fd25..9520b1e 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -46,4 +46,4 @@ obj-$(CONFIG_STM32_GPIO)  += stm32_gpio.o
>  obj-$(CONFIG_ZYNQ_GPIO)+= zynq_gpio.o
>  obj-$(CONFIG_VYBRID_GPIO)  += vybrid_gpio.o
>  obj-$(CONFIG_HIKEY_GPIO)   += hi6220_gpio.o
> -
> +obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
> diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c
> new file mode 100644
> index 000..9bb9e89
> --- /dev/null
> +++ b/drivers/gpio/msm_gpio.c
> @@ -0,0 +1,115 @@
> +/*
> + * Qualcomm GPIO driver
> + *
> + * (C) Copyright 2015 Mateusz Kulikowski 
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

Put errno.h below dm.h

> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct msm_gpio_bank {
> +   phys_addr_t base;
> +};
> +
> +static int msm_gpio_direction_input(struct udevice *dev, unsigned int gpio)
> +{
> +   struct msm_gpio_bank *priv = dev_get_priv(dev);
> +   phys_addr_t reg = priv->base + GPIO_CONFIG_OFF(gpio);
> +
> +   /* Disable OE bit */
> +   writel((readl(reg) & ~GPIO_OE_MASK) | GPIO_OE_DISABLE , reg);

How about:

clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_DISABLE)

> +   return 0;
> +}
> +
> +static int msm_gpio_set_value(struct udevice *dev, unsigned gpio, int value)
> +{
> +   struct msm_gpio_bank *priv = dev_get_priv(dev);
> +
> +   value = !!value;
> +   /* set value */
> +   writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_OFF(gpio));
> +   return 0;
> +}
> +
> +static int msm_gpio_direction_output(struct udevice *dev, unsigned gpio,
> +int value)
> +{
> +   struct msm_gpio_bank *priv = dev_get_priv(dev);
> +   phys_addr_t reg = priv->base + GPIO_CONFIG_OFF(gpio);
> +
> +   value = !!value;
> +   /* set value */
> +   writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_OFF(gpio));
> +   /* switch direction */
> +   writel((readl(reg) & ~GPIO_OE_MASK) | GPIO_OE_ENABLE , reg);
> +   return 0;
> +}
> +
> +static int msm_gpio_get_value(struct udevice *dev, unsigned gpio)
> +{
> +   struct msm_gpio_bank *priv = dev_get_priv(dev);
> +
> +   return !!(readl(priv->base + GPIO_IN_OUT_OFF(gpio)) >> GPIO_IN);
> +}
> +
> +static int msm_gpio_get_function(struct udevice *dev, unsigned offset)
> +{
> +   struct msm_gpio_bank *priv = dev_get_priv(dev);
> +
> +   if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE)
> +   return GPIOF_OUTPUT;
> +   return GPIOF_INPUT;
> +}
> +
> +static const struct dm_gpio_ops gpio_msm_ops = {
> +   .direction_input= msm_gpio_direction_input,
> +   .direction_output   = msm_gpio_direction_output,
> +   .get_value  = msm_gpio_get_value,
> +   .set_value  = msm_gpio_set_value,
> +   .get_function   = msm_gpio_get_function,
> +};
> +
> +static int msm_gpio_probe(struct udevice *dev)
> +{
> +   struct msm_gpio_bank *priv = dev_get_priv(dev);
> +
> +   priv->base = dev_get_addr(dev);
> +   return priv->base == FDT_ADDR_T_NONE;
> +}
> +
> +static int msm_gpio_ofdata_to_platdata(struct udevice *dev)
> +{
> +   struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
> +
> +   uc_priv->gpio_count = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
> +"gpio-count", 0);
> +   uc_priv->bank_name = fdt_getprop(gd->fdt_blob, dev->of_offset,
> +"gpio-bank-name", NULL);
> +   if (uc_priv->bank_name == NULL)
> +

Re: [U-Boot] [PATCH] net: macb: sama5d4 is not gigabit capable

[Joe Hershberger]

Hi Gregory,

On Mon, Dec 14, 2015 at 10:37 AM, Gregory CLEMENT
 wrote:
> During the initialization of PHY the gigabit bit capable is set if the
> controller is a GEM. However, for sama5d4, the GEM is not gigabit
> capable. Improperly setting the GBE capability leads to an unresponsive
> MAC controller. This patch fix this behavior allowing to use the gmac
> with the sama5d4.
>
> Suggested-by: Nicolas Ferre 
> Signed-off-by: Gregory CLEMENT 
> ---
>  drivers/net/macb.c | 7 +--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/macb.c b/drivers/net/macb.c
> index a5c1880..642717d 100644
> --- a/drivers/net/macb.c
> +++ b/drivers/net/macb.c
> @@ -480,8 +480,11 @@ static int macb_phy_init(struct macb_device *macb)
> return 0;
> }
>
> -   /* First check for GMAC */
> -   if (macb_is_gem(macb)) {
> +   /*
> +* First check for GMAC, but not the one on SAMA5D4 which is
> +* not gigabit capabale
> +*/
> +   if (macb_is_gem(macb) && ! cpu_is_sama5d4()) {

Is there not some other property that can identify the lack of Gigabit
support in the "GEM"? It would be better to not have to keep track of
the next processor and the one after that which has the same
situation.

> lpa = macb_mdio_read(macb, MII_STAT1000);
>
> if (lpa & (LPA_1000FULL | LPA_1000HALF)) {
> --
> 2.5.0
>
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Re: [U-Boot] [PATCH 04/10] net: axi_emac: Put iobase to private structure

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:59 AM, Michal Simek  wrote:
> Saving iobase directly to private structure helps with moving to DM.
> There is an option to load iobase from pdata but it is additional load.
> Pointer to private structure is available all the time.

As long as the information is still coming from the pdata or device
tree that should be fine.

> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 05/10] net: axi_emac: Pass private structure to phyread/phywrite

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:59 AM, Michal Simek  wrote:
> Prepare for move to DM.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [RFC PATCH 09/11] gpio: Add support for Qualcomm PM8916 gpios

[Simon Glass]

Hi Mateusz,

On 10 December 2015 at 14:41, Mateusz Kulikowski
 wrote:
> This driver supports GPIOs present on PM8916 PMIC.
> There are 2 device drivers inside:
> - GPIO driver (4 "generic" GPIOs)
> - Keypad driver that presents itself as GPIO with 2 inputs (power and reset)
>
> Signed-off-by: Mateusz Kulikowski 
> ---
>
>  drivers/gpio/Kconfig   |   7 ++
>  drivers/gpio/Makefile  |   1 +
>  drivers/gpio/pm8916_gpio.c | 306 
> +
>  3 files changed, 314 insertions(+)
>  create mode 100644 drivers/gpio/pm8916_gpio.c
>
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index 1d9443b..1fbdfeb 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -53,6 +53,13 @@ config MSM_GPIO
> help
>   Support GPIO controllers on Qualcomm Snapdragon family of SoCs.
>
> +config PM8916_GPIO
> +   bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
> +   depends on DM_GPIO && PMIC_PM8916
> +   help
> + Support for GPIO1-GPIO4 pins and power/reset buttons found on
> + Qualcomm PM8916 PMIC.
> +
>  config ROCKCHIP_GPIO
> bool "Rockchip GPIO driver"
> depends on DM_GPIO
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index 9520b1e..aaa9f8d 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -47,3 +47,4 @@ obj-$(CONFIG_ZYNQ_GPIO)   += zynq_gpio.o
>  obj-$(CONFIG_VYBRID_GPIO)  += vybrid_gpio.o
>  obj-$(CONFIG_HIKEY_GPIO)   += hi6220_gpio.o
>  obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
> +obj-$(CONFIG_PM8916_GPIO)  += pm8916_gpio.o
> diff --git a/drivers/gpio/pm8916_gpio.c b/drivers/gpio/pm8916_gpio.c
> new file mode 100644
> index 000..9214984
> --- /dev/null
> +++ b/drivers/gpio/pm8916_gpio.c
> @@ -0,0 +1,306 @@
> +/*
> + * Qualcomm pm8916 pmic gpio driver - part of Qualcomm PM8916 PMIC
> + *
> + * (C) Copyright 2015 Mateusz Kulikowski 
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

Ordering

> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +/* Register offset for each gpio */
> +#define REG_OFFSET(x)  ((x) * 0x100)
> +
> +/* Register maps */
> +#define REG_STATUS 0x08
> +#define REG_STATUS_VAL_MASK0x1
> +
> +/* MODE_CTL */
> +#define REG_CTL   0x40
> +#define REG_CTL_MODE_MASK   0x70
> +#define REG_CTL_MODE_INPUT  0x00
> +#define REG_CTL_MODE_INOUT  0x20
> +#define REG_CTL_MODE_OUTPUT 0x10
> +#define REG_CTL_OUTPUT_MASK 0x0F
> +
> +#define REG_DIG_VIN_CTL0x41
> +#define REG_DIG_VIN_VIN0   0
> +
> +#define REG_DIG_PULL_CTL   0x42
> +#define REG_DIG_PULL_NO_PU 0x5
> +
> +#define REG_DIG_OUT_CTL0x45
> +#define REG_DIG_OUT_CTL_CMOS   (0x0 << 4)
> +#define REG_DIG_OUT_CTL_DRIVE_L 0x1
> +
> +#define REG_EN_CTL 0x46
> +#define REG_EN_CTL_ENABLE  (1 << 7)
> +
> +struct pm8916_gpio_bank {
> +   uint16_t pid; /* Peripheral ID on SPMI bus */
> +};
> +
> +static int pm8916_gpio_direction_input(struct udevice *dev, unsigned offset)
> +{
> +   struct pm8916_gpio_bank *priv = dev_get_priv(dev);
> +   uint32_t gpio_base = priv->pid + REG_OFFSET(offset);
> +   int val, ret;
> +
> +   /* Disable the GPIO */
> +   val = pmic_reg_read(dev->parent, gpio_base + REG_EN_CTL);
> +   if (val < 0)
> +   return val;
> +
> +   val &= ~REG_EN_CTL_ENABLE;
> +   ret = pmic_reg_write(dev->parent, gpio_base + REG_EN_CTL, val);
> +   if (ret < 0)
> +   return ret;

Can you use pmic_clrsetbits()?

> +
> +   /* Select the mode */
> +   val = REG_CTL_MODE_INPUT;
> +   ret = pmic_reg_write(dev->parent, gpio_base + REG_CTL, val);
> +   if (ret < 0)
> +   return ret;
> +
> +   /* Set the right pull (no pull) */
> +   ret = pmic_reg_write(dev->parent, gpio_base + REG_DIG_PULL_CTL,
> +REG_DIG_PULL_NO_PU);
> +   if (ret < 0)
> +   return ret;
> +
> +   /* Select the VIN - VIN0, pin is input so it doesn't matter */
> +   ret = pmic_reg_write(dev->parent, gpio_base + REG_DIG_VIN_CTL,
> +REG_DIG_VIN_VIN0);
> +   if (ret < 0)
> +   return ret;
> +
> +   /* Enable the GPIO */
> +   val = pmic_reg_read(dev->parent, gpio_base + REG_EN_CTL);
> +   if (val < 0)
> +   return val;
> +
> +   val |= REG_EN_CTL_ENABLE;
> +
> +   ret = pmic_reg_write(dev->parent, gpio_base + REG_EN_CTL, val);
> +   return ret;
> +}
> +
> +static int pm8916_gpio_direction_output(struct udevice *dev, unsigned offset,
> +   int value)
> +{
> +   struct pm8916_gpio_bank *priv = dev_get_priv(dev);
> +   uint32_t gpio_base = priv->pid + REG_OFFSET(offset);
> +   int 

Re: [U-Boot] [PATCH 38/57] x86: ivybridge: Drop the special PCI driver

[Simon Glass]

Hi Bin,

On 13 December 2015 at 05:56, Bin Meng  wrote:
> Hi Simon,
>
> On Tue, Dec 8, 2015 at 11:38 AM, Simon Glass  wrote:
>> There is nothing special about the ivybridge pci driver now, so just use
>> the generic one.
>>
>> Signed-off-by: Simon Glass 
>> ---
>>
>>  arch/x86/cpu/ivybridge/Makefile |  1 -
>>  arch/x86/cpu/ivybridge/pci.c| 46 
>> -
>>  2 files changed, 47 deletions(-)
>>  delete mode 100644 arch/x86/cpu/ivybridge/pci.c
>>
>> diff --git a/arch/x86/cpu/ivybridge/Makefile 
>> b/arch/x86/cpu/ivybridge/Makefile
>> index bdbd3fa..259a5df 100644
>> --- a/arch/x86/cpu/ivybridge/Makefile
>> +++ b/arch/x86/cpu/ivybridge/Makefile
>> @@ -15,7 +15,6 @@ obj-y += model_206ax.o
>>  obj-y += microcode_intel.o
>>  obj-y += northbridge.o
>>  obj-y += pch.o
>> -obj-y += pci.o
>>  obj-y += report_platform.o
>>  obj-y += sata.o
>>  obj-y += sdram.o
>> diff --git a/arch/x86/cpu/ivybridge/pci.c b/arch/x86/cpu/ivybridge/pci.c
>> deleted file mode 100644
>> index 5195002..000
>> --- a/arch/x86/cpu/ivybridge/pci.c
>> +++ /dev/null
>> @@ -1,46 +0,0 @@
>> -/*
>> - * Copyright (c) 2011 The Chromium OS Authors.
>> - * (C) Copyright 2008,2009
>> - * Graeme Russ, 
>> - *
>> - * (C) Copyright 2002
>> - * Daniel Engström, Omicron Ceti AB, 
>> - *
>> - * SPDX-License-Identifier:GPL-2.0+
>> - */
>> -
>> -#include 
>> -#include 
>> -#include 
>> -#include 
>> -#include 
>> -#include 
>> -#include 
>> -
>> -static int pci_ivybridge_probe(struct udevice *bus)
>> -{
>> -   if (!(gd->flags & GD_FLG_RELOC))
>> -   return 0;
>> -   post_code(0x50);
>> -   post_code(0x51);
>> -
>> -   return 0;
>> -}
>> -
>> -static const struct dm_pci_ops pci_ivybridge_ops = {
>> -   .read_config= pci_x86_read_config,
>> -   .write_config   = pci_x86_write_config,
>> -};
>> -
>> -static const struct udevice_id pci_ivybridge_ids[] = {
>> -   { .compatible = "intel,pci-ivybridge" },
>> -   { }
>> -};
>> -
>> -U_BOOT_DRIVER(pci_ivybridge_drv) = {
>> -   .name   = "pci_ivybridge",
>> -   .id = UCLASS_PCI,
>> -   .of_match   = pci_ivybridge_ids,
>> -   .ops= _ivybridge_ops,
>> -   .probe  = pci_ivybridge_probe,
>> -};
>> --
>
> We don't need change chromebook_link.dts to update pci node compatible string?
>
> Regards,
> Bin

It isn't necessary, but I can remove the 'intel,pci-ivybridge' string.

Regards,
Simon
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Re: [U-Boot] [RFC PATCH 00/11] Add support for 96boards Dragonboard410C board

[sk.syed2]

>
> With a slight delay (Sorry Syed) I'm finally ready to show code
> I've been working recently on.

Thanks for the patches. I will update my git tree for snapdragon_810
with these changes. I only have serial and cache support working on 810
and it boots to u-boot prompt. The
arch/arm/cpu/armv8/cache_v8.c/mmu_setup() causes the board to reset. I
didn't dig deeper. I switched to use
mmu_setup() as implemented in arch/arm/cpu/armv8/zynqmp/cpu.c and
everything works fine.

>create mode 100644 arch/arm/mach-snapdragon/reset.c
Can you rename this  arch/arm/mach-snapdragon/reset-apq8016.c as I
have arch/arm/mach-snapdragon/reset-apq8094.c to be added.

Will provide more feedback going forward.

Thanks
-syed
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Re: [U-Boot] [PATCH 43/57] x86: ivybridge: Convert enable_usb_bar() to use DM PCI API

[Simon Glass]

Hi Bin,

On 13 December 2015 at 05:56, Bin Meng  wrote:
> Hi Simon,
>
> On Tue, Dec 8, 2015 at 11:39 AM, Simon Glass  wrote:
>> Convert this function over to use the driver model PCI API. In this case
>> we want to avoid using the real PCI devices since they have not yet been
>> probed. Instead, write directly to their PCI configuration address.
>>
>> Signed-off-by: Simon Glass 
>> ---
>>
>
> Reviewed-by: Bin Meng 
>
> One question below.
>
>>  arch/x86/cpu/ivybridge/cpu.c | 42 +-
>>  1 file changed, 21 insertions(+), 21 deletions(-)
>>
>> diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
>> index 95a9db5..b79a726 100644
>> --- a/arch/x86/cpu/ivybridge/cpu.c
>> +++ b/arch/x86/cpu/ivybridge/cpu.c
>> @@ -134,33 +134,33 @@ int arch_cpu_init_dm(void)
>>   *
>>   * This is used to speed up the resume path.
>>   */
>> -static void enable_usb_bar(void)
>> +static void enable_usb_bar(struct udevice *bus)
>>  {
>> pci_dev_t usb0 = PCH_EHCI1_DEV;
>> pci_dev_t usb1 = PCH_EHCI2_DEV;
>> pci_dev_t usb3 = PCH_XHCI_DEV;
>> -   u32 cmd;
>> +   ulong cmd;
>>
>> /* USB Controller 1 */
>> -   x86_pci_write_config32(usb0, PCI_BASE_ADDRESS_0,
>> -  PCH_EHCI0_TEMP_BAR0);
>> -   cmd = x86_pci_read_config32(usb0, PCI_COMMAND);
>> +   pci_bus_write_config(bus, usb0, PCI_BASE_ADDRESS_0,
>> +PCH_EHCI0_TEMP_BAR0, PCI_SIZE_32);
>> +   pci_bus_read_config(bus, usb0, PCI_COMMAND, , PCI_SIZE_32);
>> cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
>> -   x86_pci_write_config32(usb0, PCI_COMMAND, cmd);
>> +   pci_bus_write_config(bus, usb0, PCI_COMMAND, cmd, PCI_SIZE_32);
>>
>> -   /* USB Controller 1 */
>> -   x86_pci_write_config32(usb1, PCI_BASE_ADDRESS_0,
>> -  PCH_EHCI1_TEMP_BAR0);
>> -   cmd = x86_pci_read_config32(usb1, PCI_COMMAND);
>> +   /* USB Controller 2 */
>> +   pci_bus_write_config(bus, usb1, PCI_BASE_ADDRESS_0,
>> +PCH_EHCI1_TEMP_BAR0, PCI_SIZE_32);
>> +   pci_bus_read_config(bus, usb1, PCI_COMMAND, , PCI_SIZE_32);
>> cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
>> -   x86_pci_write_config32(usb1, PCI_COMMAND, cmd);
>> +   pci_bus_write_config(bus, usb1, PCI_COMMAND, cmd, PCI_SIZE_32);
>>
>> -   /* USB3 Controller */
>> -   x86_pci_write_config32(usb3, PCI_BASE_ADDRESS_0,
>> -  PCH_XHCI_TEMP_BAR0);
>> -   cmd = x86_pci_read_config32(usb3, PCI_COMMAND);
>> +   /* USB3 Controller 1 */
>> +   pci_bus_write_config(bus, usb3, PCI_BASE_ADDRESS_0,
>> +PCH_XHCI_TEMP_BAR0, PCI_SIZE_32);
>> +   pci_bus_read_config(bus, usb3, PCI_COMMAND, , PCI_SIZE_32);
>> cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
>> -   x86_pci_write_config32(usb3, PCI_COMMAND, cmd);
>> +   pci_bus_write_config(bus, usb3, PCI_COMMAND, cmd, PCI_SIZE_32);
>
> What is the purpose to do this temporary BAR assignment?

See comment above. It stops the MRC from re-initing the USB in resume.
>
>>  }
>>
>>  static int report_bist_failure(void)
>> @@ -178,7 +178,7 @@ int print_cpuinfo(void)
>>  {
>> enum pei_boot_mode_t boot_mode = PEI_BOOT_NONE;
>> char processor_name[CPU_MAX_NAME_LEN];
>> -   struct udevice *dev, *lpc;
>> +   struct udevice *dev, *lpc, *pch;
>> const char *name;
>> uint32_t pm1_cnt;
>> uint16_t pm1_sts;
>> @@ -211,12 +211,12 @@ int print_cpuinfo(void)
>> /* Early chipset init required before RAM init can work */
>> uclass_first_device(UCLASS_NORTHBRIDGE, );
>>
>> -   ret = uclass_first_device(UCLASS_PCH, );
>> +   ret = uclass_first_device(UCLASS_PCH, );
>> if (ret)
>> return ret;
>> -   if (!dev)
>> +   if (!pch)
>> return -ENODEV;
>> -   ret = pch_init(dev);
>> +   ret = pch_init(pch);
>> if (ret)
>> return ret;
>>
>> @@ -266,7 +266,7 @@ int print_cpuinfo(void)
>>
>> /* Prepare USB controller early in S3 resume */
>> if (boot_mode == PEI_BOOT_RESUME)
>> -   enable_usb_bar();
>> +   enable_usb_bar(pch->parent);
>>
>> gd->arch.pei_boot_mode = boot_mode;
>>
>> --

Regards,
Simon
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Re: [U-Boot] [RFC PATCH 03/11] mmc: Add support for Qualcomm SDHCI controller

[Simon Glass]

Hi Mateusz,

On 10 December 2015 at 14:41, Mateusz Kulikowski
 wrote:
> Signed-off-by: Mateusz Kulikowski 
> ---

Please add a commit message.

>
>  drivers/mmc/Kconfig |   6 ++
>  drivers/mmc/Makefile|   1 +
>  drivers/mmc/msm_sdhci.c | 149 
> 
>  3 files changed, 156 insertions(+)
>  create mode 100644 drivers/mmc/msm_sdhci.c
>
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index ceae7bc..3f75fa7 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -16,6 +16,12 @@ config DM_MMC
>   appear as block devices in U-Boot and can support filesystems such
>   as EXT4 and FAT.
>
> +config MSM_SDHCI
> +   bool "Qualcomm SDHCI controller"
> +   depends on DM_MMC
> +   help
> + Enables support for SDHCI 2.0 controller manufactured by Qualcomm.

Can you add any more detail here?

> +
>  config ROCKCHIP_DWMMC
> bool "Rockchip SD/MMC controller support"
> depends on DM_MMC && OF_CONTROL
> diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
> index 5d35705..f4fdfca 100644
> --- a/drivers/mmc/Makefile
> +++ b/drivers/mmc/Makefile
> @@ -49,3 +49,4 @@ else
>  obj-$(CONFIG_GENERIC_MMC) += mmc_write.o
>  endif
>
> +obj-$(CONFIG_MSM_SDHCI) += msm_sdhci.o
> diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
> new file mode 100644
> index 000..96119f0
> --- /dev/null
> +++ b/drivers/mmc/msm_sdhci.c
> @@ -0,0 +1,149 @@
> +/*
> + * Qualcomm SDHCI driver - SD/eMMC controller
> + *
> + * (C) Copyright 2015 Mateusz Kulikowski 
> + *
> + * Based on Linux driver
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

Ordering:

common.h always goes first
clk.h
dm.h
sdhci.h
asm/
linux/

> +
> +/* Non-standard registers needed for SDHCI startup */
> +#define SDCC_MCI_POWER   0x0
> +#define SDCC_MCI_POWER_SW_RST BIT(7)
> +
> +/* This is undocumented register */
> +#define SDCC_MCI_VERSION 0x50
> +#define SDCC_MCI_VERSION_MAJOR_SHIFT 28
> +#define SDCC_MCI_VERSION_MAJOR_MASK  (0xf << SDCC_MCI_VERSION_MAJOR_SHIFT)
> +#define SDCC_MCI_VERSION_MINOR_MASK  0xff
> +
> +#define SDCC_MCI_HC_MODE 0x78
> +
> +/* Offset to SDHCI registers */
> +#define SDCC_SDHCI_OFFSET 0x900
> +
> +/* Non standard (?) SDHCI register */
> +#define SDHCI_VENDOR_SPEC_CAPABILITIES0  0x11c
> +
> +struct msm_sdhc {
> +   struct sdhci_host host;
> +   phys_addr_t base;
> +   unsigned width;

Comment - what is width?

> +};
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +static int msm_sdc_clk_init(struct udevice *dev)
> +{
> +   uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
> +   "clock-frequency", 40);
> +   uint clkd[2]; /* clk_id and clk_no */
> +   fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, "clock", clkd, 2);
> +   clkd[0] = fdt_node_offset_by_phandle(gd->fdt_blob, clkd[0]);
> +
> +   struct udevice *clk = NULL;
> +   uclass_get_device_by_of_offset(UCLASS_CLK, clkd[0], );
> +   if (clk)
> +   clk_set_periph_rate(clk, clkd[1], clk_rate);
> +

See comments on the previous patch. Also you could move the DT decode
code all into your ofdata_to_platdata function (if you like).

> +   return 0;
> +}
> +
> +static int msm_sdc_probe(struct udevice *dev)
> +{
> +   struct msm_sdhc *prv = dev_get_priv(dev);
> +   struct sdhci_host *host = >host;
> +   u32 core_version, core_minor, core_major;
> +
> +   host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_BROKEN_R1B;
> +
> +   /* Init clocks */
> +   if (msm_sdc_clk_init(dev))
> +   return -EIO;
> +
> +   /* Reset the core and Enable SDHC mode */
> +   writel(readl(prv->base + SDCC_MCI_POWER) | SDCC_MCI_POWER_SW_RST,
> +  prv->base + SDCC_MCI_POWER);
> +
> +   /* SW reset can take upto 10HCLK + 15MCLK cycles. (min 40us) */
> +   mdelay(2);

So why such a long delay? Perhaps you should put the code immediately
below int a timeout loop?

start = get_timer(0);
while (readl...) {
   if (get_timer(start) > 2)
  return -ETIMEDOUT;
}

> +
> +   if (readl(prv->base + SDCC_MCI_POWER) & SDCC_MCI_POWER_SW_RST) {
> +   printf("msm_sdhci: stuck in reset\n");
> +   return -1;

-ETIMEDOUT?

> +   }
> +
> +   /* Enable host-controller mode */
> +   writel(1, prv->base + SDCC_MCI_HC_MODE);
> +
> +   core_version = readl(prv->base + SDCC_MCI_VERSION);
> +
> +   core_major = (core_version & SDCC_MCI_VERSION_MAJOR_MASK);
> +   core_major >>= SDCC_MCI_VERSION_MAJOR_SHIFT;
> +
> +   core_minor = core_version & SDCC_MCI_VERSION_MINOR_MASK;
> +
> +   /*
> +* Support for some capabilities is not advertised by newer
> +* controller versions and must be explicitly 

Re: [U-Boot] [PATCH 03/10] net: axi_emac: Pass directly pointer to register space

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:59 AM, Michal Simek  wrote:
> Simplify mdio_wait function by passing regs directly.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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[U-Boot] [PATCH 4/5] imx: mx6slevk: implement mmc_get_env_devno

[Peng Fan]

Implement mmc_get_env_devno, support loading env successfully
when booting from different slots.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
---
 board/freescale/mx6slevk/mx6slevk.c | 16 
 1 file changed, 16 insertions(+)

diff --git a/board/freescale/mx6slevk/mx6slevk.c 
b/board/freescale/mx6slevk/mx6slevk.c
index 5eab4b5..7617c76 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -170,6 +170,22 @@ static struct fsl_esdhc_cfg usdhc_cfg[3] = {
{USDHC3_BASE_ADDR, 0, 4},
 };
 
+int mmc_get_env_devno(void)
+{
+   struct src *src_regs = (struct src *)SRC_BASE_ADDR;
+   u32 soc_sbmr = readl(_regs->sbmr1);
+   u32 bootsel;
+
+   bootsel = (soc_sbmr & 0x00FF) >> 6 ;
+
+   /* If not boot from sd/mmc, use default value */
+   if (bootsel != 1)
+   return CONFIG_SYS_MMC_ENV_DEV;
+
+   /* BOOT_CFG2[3] and BOOT_CFG2[4] */
+   return (soc_sbmr & 0x1800) >> 11;
+}
+
 int board_mmc_getcd(struct mmc *mmc)
 {
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-- 
2.6.2


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[U-Boot] [PATCH 5/5] imx: mx6sxsabresd: implement mmc_get_env_devno

[Peng Fan]

Implement mmc_get_env_devno, support loading env successfully
when booting from different slots.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
---
 board/freescale/mx6sxsabresd/mx6sxsabresd.c | 24 
 1 file changed, 24 insertions(+)

diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c 
b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
index 3ee4662..f524e71 100644
--- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -309,6 +309,30 @@ static struct fsl_esdhc_cfg usdhc_cfg[3] = {
 #define USDHC3_PWR_GPIOIMX_GPIO_NR(2, 11)
 #define USDHC4_CD_GPIO IMX_GPIO_NR(6, 21)
 
+int mmc_get_env_devno(void)
+{
+   struct src *src_regs = (struct src *)SRC_BASE_ADDR;
+   u32 soc_sbmr = readl(_regs->sbmr1);
+   int dev_no;
+   u32 bootsel;
+
+   bootsel = (soc_sbmr & 0x00FF) >> 6 ;
+
+   /* If not boot from sd/mmc, use default value */
+   if (bootsel != 1)
+   return CONFIG_SYS_MMC_ENV_DEV;
+
+   /* BOOT_CFG2[3] and BOOT_CFG2[4] */
+   dev_no = (soc_sbmr & 0x1800) >> 11;
+
+   /*
+* need ubstract 1 to map to the mmc device id
+* see the comments in board_mmc_init function
+*/
+
+   return --dev_no;
+}
+
 int board_mmc_getcd(struct mmc *mmc)
 {
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-- 
2.6.2


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[U-Boot] [PATCH 3/5] imx: mx6qarm2: implement mmc_get_env_devno

[Peng Fan]

Implement mmc_get_env_devno, support loading env successfully
when booting from different slots.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
---
 board/freescale/mx6qarm2/mx6qarm2.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/board/freescale/mx6qarm2/mx6qarm2.c 
b/board/freescale/mx6qarm2/mx6qarm2.c
index 98ccdb7..245ac47 100644
--- a/board/freescale/mx6qarm2/mx6qarm2.c
+++ b/board/freescale/mx6qarm2/mx6qarm2.c
@@ -110,6 +110,29 @@ struct fsl_esdhc_cfg usdhc_cfg[2] = {
{USDHC4_BASE_ADDR},
 };
 
+int mmc_get_env_devno(void)
+{
+   struct src *src_regs = (struct src *)SRC_BASE_ADDR;
+   u32 soc_sbmr = readl(_regs->sbmr1);
+   u32 dev_no;
+   u32 bootsel;
+
+   bootsel = (soc_sbmr & 0x00FF) >> 6 ;
+
+   /* If not boot from sd/mmc, use default value */
+   if (bootsel != 1)
+   return CONFIG_SYS_MMC_ENV_DEV;
+
+   /* BOOT_CFG2[3] and BOOT_CFG2[4] */
+   dev_no = (soc_sbmr & 0x1800) >> 11;
+
+   /*
+* need ubstract 2 to map to the mmc device id
+* see the comments in board_mmc_init function
+*/
+   return dev_no - 2;
+}
+
 int board_mmc_getcd(struct mmc *mmc)
 {
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-- 
2.6.2


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[U-Boot] [PATCH] imx: mx6qsabreauto: support lvds display

[Peng Fan]

Move setup_display from board_early_init_f to board_init.
Add more clock settings.
Add blacklight iomux setting.
Add display_info_t info for the lvds screen.

Signed-off-by: Peng Fan 
Cc: Fabio Estevam 
Cc: Stefano Babic 
---
 board/freescale/mx6qsabreauto/mx6qsabreauto.c | 87 ++-
 1 file changed, 84 insertions(+), 3 deletions(-)

diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c 
b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index 7c0e90a..c2e9c57 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -412,14 +412,44 @@ u32 get_board_rev(void)
 }
 
 #if defined(CONFIG_VIDEO_IPUV3)
+static void disable_lvds(struct display_info_t const *dev)
+{
+   struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
+
+   clrbits_le32(>gpr[2],
+IOMUXC_GPR2_LVDS_CH0_MODE_MASK |
+IOMUXC_GPR2_LVDS_CH1_MODE_MASK);
+}
+
 static void do_enable_hdmi(struct display_info_t const *dev)
 {
+   disable_lvds(dev);
imx_enable_hdmi_phy();
 }
 
 struct display_info_t const displays[] = {{
.bus= -1,
.addr   = 0,
+   .pixfmt = IPU_PIX_FMT_RGB666,
+   .detect = NULL,
+   .enable = NULL,
+   .mode   = {
+   .name   = "Hannstar-XGA",
+   .refresh= 60,
+   .xres   = 1024,
+   .yres   = 768,
+   .pixclock   = 15385,
+   .left_margin= 220,
+   .right_margin   = 40,
+   .upper_margin   = 21,
+   .lower_margin   = 7,
+   .hsync_len  = 60,
+   .vsync_len  = 10,
+   .sync   = FB_SYNC_EXT,
+   .vmode  = FB_VMODE_NONINTERLACED
+} }, {
+   .bus= -1,
+   .addr   = 0,
.pixfmt = IPU_PIX_FMT_RGB24,
.detect = detect_hdmi,
.enable = do_enable_hdmi,
@@ -440,18 +470,69 @@ struct display_info_t const displays[] = {{
 } } };
 size_t display_count = ARRAY_SIZE(displays);
 
+iomux_v3_cfg_t const backlight_pads[] = {
+   MX6_PAD_SD4_DAT1__GPIO2_IO09 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+};
+
+static void setup_iomux_backlight(void)
+{
+   gpio_direction_output(IMX_GPIO_NR(2, 9), 1);
+   imx_iomux_v3_setup_multiple_pads(backlight_pads,
+ARRAY_SIZE(backlight_pads));
+}
+
 static void setup_display(void)
 {
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+   struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
int reg;
 
+   setup_iomux_backlight();
enable_ipu_clock();
imx_setup_hdmi();
 
+   /* Turn on LDB_DI0 and LDB_DI1 clocks */
+   reg = readl(_ccm->CCGR3);
+   reg |= MXC_CCM_CCGR3_LDB_DI0_MASK | MXC_CCM_CCGR3_LDB_DI1_MASK;
+   writel(reg, _ccm->CCGR3);
+
+   /* Set LDB_DI0 and LDB_DI1 clk select to 3b'011 */
+   reg = readl(_ccm->cs2cdr);
+   reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK |
+MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);
+   reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) |
+  (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);
+   writel(reg, _ccm->cs2cdr);
+
+   reg = readl(_ccm->cscmr2);
+   reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV | MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV;
+   writel(reg, _ccm->cscmr2);
+
reg = readl(_ccm->chsccdr);
reg |= (CHSCCDR_CLK_SEL_LDB_DI0
<< MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
+   reg |= (CHSCCDR_CLK_SEL_LDB_DI0 <<
+   MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET);
writel(reg, _ccm->chsccdr);
+
+   reg = IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW |
+ IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW |
+ IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG |
+ IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT |
+ IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG |
+ IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT |
+ IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0 |
+ IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED;
+   writel(reg, >gpr[2]);
+
+   reg = readl(>gpr[3]);
+   reg &= ~(IOMUXC_GPR3_LVDS0_MUX_CTL_MASK |
+IOMUXC_GPR3_HDMI_MUX_CTL_MASK);
+   reg |= (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 <<
+   IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET) |
+  (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 <<
+   IOMUXC_GPR3_HDMI_MUX_CTL_OFFSET);
+   writel(reg, >gpr[3]);
 }
 #endif /* CONFIG_VIDEO_IPUV3 */
 
@@ -467,9 +548,6 @@ int overwrite_console(void)
 int board_early_init_f(void)
 {
setup_iomux_uart();
-#ifdef CONFIG_VIDEO_IPUV3
-   setup_display();
-#endif
 
 #ifdef CONFIG_NAND_MXS
setup_gpmi_nand();
@@ -494,6 +572,9 @@ int board_init(void)
gpio_direction_output(IMX_GPIO_NR(1, 15), 1);
imx_iomux_v3_setup_multiple_pads(port_exp, 

Re: [U-Boot] [PATCH] eeprom: fix eeprom write procedure

[Alexey Brodkin]

Hi Marek,

On Tue, 2015-12-15 at 01:27 +0100, Marek Vasut wrote:
> On Monday, December 14, 2015 at 04:45:34 PM, Alexey Brodkin wrote:
> > This fixes commit 1a37889b0ad084a740b4f785031d7ae9955d947b:
> > --->8
> > eeprom: Pull out the RW loop
> > 
> > Unify the code for doing read/write into single function, since the
> > code for both the read and write is almost identical. This again
> > trims down the code duplication.
> > --->8
> > 
> > where the same one routine is utilized for both EEPROM writing and
> > reading. The only difference was supposed to be a "read" flag which
> > in both cases was set with 1 somehow.
> > 
> > That lead to a missing delay in case of writing which lead to write
> > failure (in my case no data was written).
> > 
> > Signed-off-by: Alexey Brodkin 
> > Cc: Marek Vasut 
> > Cc: Simon Glass 
> > Cc: Tom Rini 
> > Cc: Heiko Schocher 
> 
> Obviously correct,
> 
> Acked-by: Marek Vasut 
> 
> Thanks for spotting this, nice!

That was a nice exercise for me.
>From the first glance DW SPI and ARC-specific changes
were not guilty so I tried some previous RC-s and found that
v2016.01-rc1 is good while rc2 is not.

So I recalled articles and talks about git bisect.
And literally in few next minutes I knew commit that introduced
that breakage. At that point problem became really obvious.

That said it's really fantastic what cool tools we have now that
simplify our life as developers significantly.

-Alexey
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Re: [U-Boot] [PATCH v4 05/16] spi: Add support for dual and quad mode

[Jagan Teki]

On 15 December 2015 at 13:22, Mugunthan V N  wrote:
> spi bus can support dual and quad wire data transfers for tx and
> rx. So defining dual and quad modes for both tx and rx. Also add
> support to parse bus width used for spi tx and rx transfers.
>
> Signed-off-by: Mugunthan V N 
> Reviewed-by: Simon Glass 
> Reviewed-by: Tom Rini 
> ---
>
> Changes from v3->v4
> * used op_mode_{t/r}x to hold flash tx/rx modes.
>
> This has been tested on am437x-sk evm logs [1] and pushed a
> branch for others to test [2]
>
> [1] - http://pastebin.ubuntu.com/14024895/
> [2] - git://git.ti.com/~mugunthanvnm/ti-u-boot/mugunth-ti-u-boot.git 
> dm-qspi-v4
>
> ---

Please rebase it on master, there is some changes regarding SPI_TX_*
and also please send the whole series with next version, it easy for
me to quantify all at once and pick.

thanks!
-- 
Jagan.
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[U-Boot] [PATCH 2/5] imx: mx6sabresd: implement mmc_get_env_devno

[Peng Fan]

Implement mmc_get_env_devno, support loading env successfully
when booting from different slots.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
---
 board/freescale/mx6sabresd/mx6sabresd.c | 29 +
 1 file changed, 29 insertions(+)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c 
b/board/freescale/mx6sabresd/mx6sabresd.c
index 581c9d5..22ed331 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -234,6 +234,35 @@ struct fsl_esdhc_cfg usdhc_cfg[3] = {
 #define USDHC2_CD_GPIO IMX_GPIO_NR(2, 2)
 #define USDHC3_CD_GPIO IMX_GPIO_NR(2, 0)
 
+int mmc_get_env_devno(void)
+{
+   struct src *src_regs = (struct src *)SRC_BASE_ADDR;
+   u32 soc_sbmr = readl(_regs->sbmr1);
+   u32 dev_no;
+   u32 bootsel;
+
+   /*
+* Refer to
+* "i.MX 6Dual/6Quad Applications Processor Reference Manual"
+* Chapter "8.5.3.1 Expansion Device eFUSE Configuration"
+*/
+   bootsel = (soc_sbmr & 0x00FF) >> 6 ;
+
+   /* If not boot from sd/mmc, use default value */
+   if (bootsel != 1)
+   return CONFIG_SYS_MMC_ENV_DEV;
+
+   /* BOOT_CFG2[3] and BOOT_CFG2[4] */
+   dev_no = (soc_sbmr & 0x1800) >> 11;
+
+   /*
+* need ubstract 1 to map to the mmc device id
+* see the comments in board_mmc_init function
+*/
+
+   return --dev_no;
+}
+
 int board_mmc_getcd(struct mmc *mmc)
 {
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-- 
2.6.2


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[U-Boot] [PATCH 1/5] common: env_mmc: support loading env from different cards

[Peng Fan]

Some boards support booting from different SD card slots.
For example, mx6dpsabresd board supports booting from SD2,
SD3, EMMC4, using different boot switch. And the index
numbers are SD2(0), SD3(1), EMMC4(2).
But CONFIG_SYS_MMC_ENV_DEV is hardcoded to 1(for SD3), so when
booting from SD2(using 0), uboot complains "MMC: no card present",
since there is no card in SD3 slot.

This patch introduces a weak function which still returns
CONFIG_SYS_MMC_ENV_DEV to avoid break other boards. Then
different boards can implement mmc_get_env_devno to read
env from the correct sd/emmc.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
Cc: Simon Glass 
Cc: Tim Harvey 
Cc: Hans de Goede 
---
 common/env_mmc.c | 22 ++
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/common/env_mmc.c b/common/env_mmc.c
index 9639822..d2e2a40 100644
--- a/common/env_mmc.c
+++ b/common/env_mmc.c
@@ -63,6 +63,11 @@ int env_init(void)
return 0;
 }
 
+__weak uint mmc_get_env_devno(void)
+{
+   return CONFIG_SYS_MMC_ENV_DEV;
+}
+
 #ifdef CONFIG_SYS_MMC_ENV_PART
 __weak uint mmc_get_env_part(struct mmc *mmc)
 {
@@ -72,7 +77,7 @@ __weak uint mmc_get_env_part(struct mmc *mmc)
 static int mmc_set_env_part(struct mmc *mmc)
 {
uint part = mmc_get_env_part(mmc);
-   int dev = CONFIG_SYS_MMC_ENV_DEV;
+   int dev = mmc_get_env_devno();
int ret = 0;
 
 #ifdef CONFIG_SPL_BUILD
@@ -108,7 +113,7 @@ static const char *init_mmc_for_env(struct mmc *mmc)
 static void fini_mmc_for_env(struct mmc *mmc)
 {
 #ifdef CONFIG_SYS_MMC_ENV_PART
-   int dev = CONFIG_SYS_MMC_ENV_DEV;
+   int dev = mmc_get_env_devno();
 
 #ifdef CONFIG_SPL_BUILD
dev = 0;
@@ -127,7 +132,7 @@ static inline int write_env(struct mmc *mmc, unsigned long 
size,
blk_start   = ALIGN(offset, mmc->write_bl_len) / mmc->write_bl_len;
blk_cnt = ALIGN(size, mmc->write_bl_len) / mmc->write_bl_len;
 
-   n = mmc->block_dev.block_write(CONFIG_SYS_MMC_ENV_DEV, blk_start,
+   n = mmc->block_dev.block_write(mmc_get_env_devno(), blk_start,
blk_cnt, (u_char *)buffer);
 
return (n == blk_cnt) ? 0 : -1;
@@ -140,7 +145,8 @@ static unsigned char env_flags;
 int saveenv(void)
 {
ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
-   struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV);
+   int mmc_env_devno = mmc_get_env_devno();
+   struct mmc *mmc = find_mmc_device(mmc_env_devno);
u32 offset;
int ret, copy = 0;
const char *errmsg;
@@ -168,7 +174,7 @@ int saveenv(void)
}
 
printf("Writing to %sMMC(%d)... ", copy ? "redundant " : "",
-  CONFIG_SYS_MMC_ENV_DEV);
+  mmc_env_devno);
if (write_env(mmc, CONFIG_ENV_SIZE, offset, (u_char *)env_new)) {
puts("failed\n");
ret = 1;
@@ -192,7 +198,7 @@ static inline int read_env(struct mmc *mmc, unsigned long 
size,
   unsigned long offset, const void *buffer)
 {
uint blk_start, blk_cnt, n;
-   int dev = CONFIG_SYS_MMC_ENV_DEV;
+   int dev = mmc_get_env_devno();
 
 #ifdef CONFIG_SPL_BUILD
dev = 0;
@@ -216,7 +222,7 @@ void env_relocate_spec(void)
int crc1_ok = 0, crc2_ok = 0;
env_t *ep;
int ret;
-   int dev = CONFIG_SYS_MMC_ENV_DEV;
+   int dev = mmc_get_env_devno();
const char *errmsg = NULL;
 
ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env1, 1);
@@ -302,7 +308,7 @@ void env_relocate_spec(void)
struct mmc *mmc;
u32 offset;
int ret;
-   int dev = CONFIG_SYS_MMC_ENV_DEV;
+   int dev = mmc_get_env_devno();
const char *errmsg;
 
 #ifdef CONFIG_SPL_BUILD
-- 
2.6.2


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Re: [U-Boot] [PATCH] serial: Use static inline for _debug_uart_init()

[Thomas Chou]

Hi Michal,

On 2015年12月14日 23:53, Michal Simek wrote:

Reported-by: Thomas Chou 
Signed-off-by: Michal Simek 
---

  drivers/serial/serial_xuartlite.c | 2 +-
  drivers/serial/serial_zynq.c  | 2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/serial/serial_xuartlite.c 
b/drivers/serial/serial_xuartlite.c
index fe87b515d902..0238a52380c7 100644
--- a/drivers/serial/serial_xuartlite.c
+++ b/drivers/serial/serial_xuartlite.c
@@ -122,7 +122,7 @@ U_BOOT_DRIVER(serial_uartlite) = {
  };

  #ifdef CONFIG_DEBUG_UART_UARTLITE
-void _debug_uart_init(void)
+static inline void _debug_uart_init(void)
  {
struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;

diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c
index b2b98dea1561..3430482f8d8b 100644
--- a/drivers/serial/serial_zynq.c
+++ b/drivers/serial/serial_zynq.c
@@ -192,7 +192,7 @@ U_BOOT_DRIVER(serial_zynq) = {
  };

  #ifdef CONFIG_DEBUG_UART_ZYNQ
-void _debug_uart_init(void)
+static inline void _debug_uart_init(void)
  {
struct uart_zynq *regs = (struct uart_zynq *)CONFIG_DEBUG_UART_BASE;




Reviewed-by: Thomas Chou 

Thanks,
Thomas
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Re: [U-Boot] [PATCH 1/6] arm: socfpga: cyclone5-socdk: Enabling mtd partitioning layout

[Chin Liang See]

On Tue, 2015-12-15 at 02:15 +0100, Marek Vasut wrote:
> On Tuesday, December 15, 2015 at 02:09:42 AM, Chin Liang See wrote:
> > On Tue, 2015-12-15 at 01:32 +0100, Marek Vasut wrote:
> > > On Monday, December 14, 2015 at 04:22:57 PM, Chin Liang See
> > > wrote:
> > > > On Mon, 2015-12-14 at 02:25 +0100, Marek Vasut wrote:
> > > > > On Monday, December 14, 2015 at 02:22:32 AM, Chin Liang See
> > 
> > > > > wrote:
> > [...]
> > 
> > > > Yeah, I can successfully mounted with ubifs :)
> > > > 
> > > > Just that I still have the issue with U-Boot ubifsmount
> > > > although I
> > > > already applied the patch for cache ARMV7. I will take a look
> > > > into
> > > > ubi
> > > > code as I suspect its due to eraseblock size issue.
> > > 
> > > Keep looking, good luck.
> > 
> > Yup, will compare the UBI code with the Linux one.
> > 

Yeah, I managed to get ubiufsmount work in U-Boot now. Need to disable
the 4K_SECTORS when enabling UBI at NOR flash.


> > > The armv7 cache issue is more serious than I thought, I am
> > > starting
> > > to suspect
> > > there is some problem with the L3 interconnect, but I cannot put
> > > my
> > > finger on
> > > it yet.
> > 
> > Hmmm... I can try to help.
> > 
> > FYI, I was trying to understand how the code error in cache-cp15
> > will
> > cause the misbehave. One thing I am suspecting it might due to
> > mismatch
> > of cache policy for the memory that store the page table and
> > translation page walk mechanism. But with your fix, it should be
> > good
> > as they are matching now.
> 
> I would suggest to move this to the thread below the CPU_V7 patch.

Would you able to include me to the thread? Thanks in advance!

> 
> btw. the L2 cache is not enabled on SoCFPGA at all :-( I have a patch
> to fix
> it, but this doesn't help us. 

Hmmm... I saw the PL310 is defined. I might want to look further.

> I suspect there might be some synchronisation
> or timing issue with accesses through the L3 interconnect, which
> would point
> to NIC301 misconfiguration, but that's purely hypothetical.Do you
> have some
> hardware-level or RTL-level/simulation tool to debug such issues at
> Altera ?

I hardly use simulation except for in house pre-silicon validation. But
I use DS-5 a lot to troubleshoot an issue (by probing various registers
including cp15).

Thanks
Chin Liang

> 
> Best regards,
> Marek Vasut
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[U-Boot] [PATCH 1/3] sf: Fix quad bit set for micron devices

[Jagan Teki]

Setting up quad bit for micron devices need to do the
same way as other flash devices like spansion, winbond
etc does using enhanced volatile config register so this
patch adds this support instead of printing "QEB is volatile"

Cc: Simon Glass 
Cc: Bin Meng 
Cc: Peter Pan 
Cc: Fabio Estevam 
Cc: Michal Simek 
Cc: Siva Durga Prasad Paladugu 
Signed-off-by: Jagan Teki 
---
 drivers/mtd/spi/sf_internal.h |  3 +++
 drivers/mtd/spi/spi_flash.c   | 62 +--
 2 files changed, 63 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 561abc3..55ba81e 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -77,6 +77,7 @@ enum spi_nor_option_flags {
 #define CMD_WRITE_DISABLE  0x04
 #define CMD_WRITE_ENABLE   0x06
 #define CMD_QUAD_PAGE_PROGRAM  0x32
+#define CMD_WRITE_EVCR 0x61
 
 /* Read commands */
 #define CMD_READ_ARRAY_SLOW0x03
@@ -90,6 +91,7 @@ enum spi_nor_option_flags {
 #define CMD_READ_STATUS1   0x35
 #define CMD_READ_CONFIG0x35
 #define CMD_FLAG_STATUS0x70
+#define CMD_READ_EVCR  0x65
 
 /* Bank addr access commands */
 #ifdef CONFIG_SPI_FLASH_BAR
@@ -104,6 +106,7 @@ enum spi_nor_option_flags {
 #define STATUS_QEB_WINSPAN BIT(1)
 #define STATUS_QEB_MXICBIT(6)
 #define STATUS_PEC BIT(7)
+#define STATUS_QEB_MICRON  BIT(7)
 #define SR_BP0 BIT(2)  /* Block protect 0 */
 #define SR_BP1 BIT(3)  /* Block protect 1 */
 #define SR_BP2 BIT(4)  /* Block protect 2 */
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 6fe8c9d..fc1538c 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -73,6 +73,37 @@ static int write_sr(struct spi_flash *flash, u8 ws)
return 0;
 }
 
+#ifdef CONFIG_SPI_FLASH_STMICRO
+static int read_evcr(struct spi_flash *flash, u8 *evcr)
+{
+   int ret;
+   const u8 cmd = CMD_READ_EVCR;
+
+   ret = spi_flash_read_common(flash, , 1, evcr, 1);
+   if (ret < 0) {
+   debug("SF: error reading EVCR\n");
+   return ret;
+   }
+
+   return 0;
+}
+
+static int write_evcr(struct spi_flash *flash, u8 evcr)
+{
+   u8 cmd;
+   int ret;
+
+   cmd = CMD_WRITE_EVCR;
+   ret = spi_flash_write_common(flash, , 1, , 1);
+   if (ret < 0) {
+   debug("SF: error while writing EVCR register\n");
+   return ret;
+   }
+
+   return 0;
+}
+#endif
+
 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
 static int read_cr(struct spi_flash *flash, u8 *rc)
 {
@@ -843,6 +874,34 @@ static int spansion_quad_enable(struct spi_flash *flash)
 }
 #endif
 
+#ifdef CONFIG_SPI_FLASH_STMICRO
+static int micron_quad_enable(struct spi_flash *flash)
+{
+   u8 qeb_status;
+   int ret;
+
+   ret = read_evcr(flash, _status);
+   if (ret < 0)
+   return ret;
+
+   if (!(qeb_status & STATUS_QEB_MICRON))
+   return 0;
+
+   ret = write_evcr(flash, qeb_status & ~STATUS_QEB_MICRON);
+   if (ret < 0)
+   return ret;
+
+   /* read EVCR and check it */
+   ret = read_evcr(flash, _status);
+   if (!(ret > 0 && !(qeb_status & STATUS_QEB_MICRON))) {
+   printf("SF: Micron EVCR Quad bit not clear\n");
+   return -EINVAL;
+   }
+
+   return ret;
+}
+#endif
+
 static int set_quad_mode(struct spi_flash *flash, u8 idcode0)
 {
switch (idcode0) {
@@ -857,8 +916,7 @@ static int set_quad_mode(struct spi_flash *flash, u8 
idcode0)
 #endif
 #ifdef CONFIG_SPI_FLASH_STMICRO
case SPI_FLASH_CFI_MFR_STMICRO:
-   debug("SF: QEB is volatile for %02x flash\n", idcode0);
-   return 0;
+   return micron_quad_enable(flash);
 #endif
default:
printf("SF: Need set QEB func for %02x flash\n", idcode0);
-- 
1.9.1

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[U-Boot] [PATCH 3/3] sf: Read back and check once macronix quad bit set

[Jagan Teki]

One macronix quad bit set using SR, it's good to
read back and check the written bit and also if
it's already been set check for the bit and return.

Cc: Vignesh R 
Cc: Mugunthan V N 
Cc: Simon Glass 
Cc: Bin Meng 
Signed-off-by: Jagan Teki 
---
 drivers/mtd/spi/spi_flash.c | 18 --
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 2e21eaa..d019de8 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -840,12 +840,18 @@ static int macronix_quad_enable(struct spi_flash *flash)
if (ret < 0)
return ret;
 
-   if (qeb_status & STATUS_QEB_MXIC) {
-   debug("SF: mxic: QEB is already set\n");
-   } else {
-   ret = write_sr(flash, STATUS_QEB_MXIC);
-   if (ret < 0)
-   return ret;
+   if (qeb_status & STATUS_QEB_MXIC)
+   return 0;
+
+   ret = write_sr(flash, STATUS_QEB_MXIC);
+   if (ret < 0)
+   return ret;
+
+   /* read SR and check it */
+   ret = read_sr(flash, _status);
+   if (!(ret > 0 && (qeb_status & STATUS_QEB_MXIC))) {
+   printf("SF: Macronix SR Quad bit not clear\n");
+   return -EINVAL;
}
 
return ret;
-- 
1.9.1

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[U-Boot] [PATCH 2/3] sf: Read back and check once spansion quad bit set

[Jagan Teki]

One spansion quad bit set using CR, it's good to
read back and check the written bit and also if
it's already been set check for the bit and return.

Cc: Vignesh R 
Cc: Mugunthan V N 
Cc: Simon Glass 
Cc: Bin Meng 
Cc: Michal Simek 
Cc: Siva Durga Prasad Paladugu 
Signed-off-by: Jagan Teki 
---
 drivers/mtd/spi/spi_flash.c | 18 --
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index fc1538c..2e21eaa 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -862,12 +862,18 @@ static int spansion_quad_enable(struct spi_flash *flash)
if (ret < 0)
return ret;
 
-   if (qeb_status & STATUS_QEB_WINSPAN) {
-   debug("SF: winspan: QEB is already set\n");
-   } else {
-   ret = write_cr(flash, STATUS_QEB_WINSPAN);
-   if (ret < 0)
-   return ret;
+   if (qeb_status & STATUS_QEB_WINSPAN)
+   return 0;
+
+   ret = write_cr(flash, STATUS_QEB_WINSPAN);
+   if (ret < 0)
+   return ret;
+
+   /* read CR and check it */
+   ret = read_cr(flash, _status);
+   if (!(ret > 0 && (qeb_status & STATUS_QEB_WINSPAN))) {
+   printf("SF: Spansion CR Quad bit not clear\n");
+   return -EINVAL;
}
 
return ret;
-- 
1.9.1

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[U-Boot] [RFC] board_f: generalize code for case of no relocation

[Alexey Brodkin]

Current implementation of disabled relocation only works for EFI.

In case of GD_FLG_SKIP_RELOC jump_to_copy() will return instead of
jumping further in board_init_r() etc. And jump_to_copy() being the last
call in init_sequence_f when returning simply triggers hang() in
board_init_f(). Well for everything except ARM, SANDBOX and EFI_APP.

Not sure why ARM and SANBOX are here - I would assume it's all on
purpose but as for EFI_APP this is an essential need for getting out of
board_init_f() and jumping in board_init_r() immediately afterwards, see
efi_main().

But what if in case of no relocation we jump in board_init_r() right
from jump_to_copy()? In that case we remove one ifdef from
board_init_f() and leave a chance to seamlessly re-use disabled
relocation for other (non-EFI) cases.

Signed-off-by: Alexey Brodkin 
---

Note I didn't test it for EFI because I don't know how to do that in
simulation, please let me know if there's a simple way to do it.

But I did test it for ARC boards (with additional patches) that enable
disabled relocation - these patches to follow once something similar to
my proposal here is implemented.

 common/board_f.c  | 11 ---
 lib/efi/efi_app.c |  2 +-
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/common/board_f.c b/common/board_f.c
index eac7c5e..2d60ed9 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -720,8 +720,14 @@ static int setup_reloc(void)
 
 static int jump_to_copy(void)
 {
+   /*
+* In case of no relocation nothing to do between "running from flash"
+* (init_f) and "running from ram" (init_r), so just jumping in
+* board_init_r().
+*/
if (gd->flags & GD_FLG_SKIP_RELOC)
-   return 0;
+   board_init_r((gd_t *)gd, gd->relocaddr);
+
/*
 * x86 is special, but in a nice way. It uses a trampoline which
 * enables the dcache if possible.
@@ -1017,8 +1023,7 @@ void board_init_f(ulong boot_flags)
if (initcall_run_list(init_sequence_f))
hang();
 
-#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
-   !defined(CONFIG_EFI_APP)
+#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
/* NOTREACHED - jump_to_copy() does not return */
hang();
 #endif
diff --git a/lib/efi/efi_app.c b/lib/efi/efi_app.c
index 452ab5d..5e41b7f 100644
--- a/lib/efi/efi_app.c
+++ b/lib/efi/efi_app.c
@@ -123,7 +123,7 @@ efi_status_t efi_main(efi_handle_t image, struct 
efi_system_table *sys_table)
printf("starting\n");
 
board_init_f(GD_FLG_SKIP_RELOC);
-   board_init_r(NULL, 0);
+   /* board_init_r() is called in the end of board_init_f() */
free_memory(priv);
 
return EFI_SUCCESS;
-- 
2.4.3

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Re: [U-Boot] [PATCH 5/5] nios2: Soup up the shell experience

[Marek Vasut]

On Tuesday, December 15, 2015 at 06:33:57 AM, Thomas Chou wrote:
> Hi Marek,
> 
> On 2015年12月15日 10:09, Marek Vasut wrote:
> > Enable command auto completion and enable $version variable. This makes
> > working with U-Boot far more enjoyable.
> > 
> > Signed-off-by: Marek Vasut 
> > Cc: Thomas Chou 
> > ---
> > 
> >   include/configs/10m50_devboard.h | 3 +++
> >   include/configs/3c120_devboard.h | 3 +++
> >   2 files changed, 6 insertions(+)
> > 
> > diff --git a/include/configs/10m50_devboard.h
> > b/include/configs/10m50_devboard.h index 0aa79f7..72d455f0 100644
> > --- a/include/configs/10m50_devboard.h
> > +++ b/include/configs/10m50_devboard.h
> > @@ -101,6 +101,9 @@
> > 
> >  CONFIG_ENV_SIZE - \
> >  CONFIG_SYS_MALLOC_LEN -\
> >  0x1)
> > 
> > +#define CONFIG_VERSION_VARIABLE
> > +#define CONFIG_AUTO_COMPLETE
> > 
> >   #define CONFIG_CMDLINE_EDITING
> > 
> > +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
> 
> This is the default value in common/cli_hush.c.
> 
> >   #endif /* __CONFIG_H */
> > 
> > diff --git a/include/configs/3c120_devboard.h
> > b/include/configs/3c120_devboard.h index 0054d8b..ed30d6f 100644
> > --- a/include/configs/3c120_devboard.h
> > +++ b/include/configs/3c120_devboard.h
> > @@ -104,6 +104,9 @@
> > 
> >  CONFIG_ENV_SIZE - \
> >  CONFIG_SYS_MALLOC_LEN -\
> >  0x1)
> > 
> > +#define CONFIG_VERSION_VARIABLE
> > +#define CONFIG_AUTO_COMPLETE
> > 
> >   #define CONFIG_CMDLINE_EDITING
> > 
> > +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
> 
> Ditto.

Oops, thanks, nice catch.

Can you pick 1-3 ? I will re-post 4,5 then.

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] eeprom: fix eeprom write procedure

[Marek Vasut]

On Tuesday, December 15, 2015 at 09:07:01 AM, Alexey Brodkin wrote:
> Hi Marek,
> 
> On Tue, 2015-12-15 at 01:27 +0100, Marek Vasut wrote:
> > On Monday, December 14, 2015 at 04:45:34 PM, Alexey Brodkin wrote:
> > > This fixes commit 1a37889b0ad084a740b4f785031d7ae9955d947b:
> > > --->8
> > > eeprom: Pull out the RW loop
> > > 
> > > Unify the code for doing read/write into single function, since the
> > > code for both the read and write is almost identical. This again
> > > trims down the code duplication.
> > > --->8
> > > 
> > > where the same one routine is utilized for both EEPROM writing and
> > > reading. The only difference was supposed to be a "read" flag which
> > > in both cases was set with 1 somehow.
> > > 
> > > That lead to a missing delay in case of writing which lead to write
> > > failure (in my case no data was written).
> > > 
> > > Signed-off-by: Alexey Brodkin 
> > > Cc: Marek Vasut 
> > > Cc: Simon Glass 
> > > Cc: Tom Rini 
> > > Cc: Heiko Schocher 
> > 
> > Obviously correct,
> > 
> > Acked-by: Marek Vasut 
> > 
> > Thanks for spotting this, nice!
> 
> That was a nice exercise for me.
> From the first glance DW SPI and ARC-specific changes
> were not guilty so I tried some previous RC-s and found that
> v2016.01-rc1 is good while rc2 is not.
> 
> So I recalled articles and talks about git bisect.
> And literally in few next minutes I knew commit that introduced
> that breakage. At that point problem became really obvious.

... and then you cursed at me, yeah, I did not sleep very well last night ;-)

> That said it's really fantastic what cool tools we have now that
> simplify our life as developers significantly.

:)

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 4/5] nios2: Enable support for fitImage

[Marek Vasut]

On Tuesday, December 15, 2015 at 06:31:11 AM, Thomas Chou wrote:
> Hi Marek,
> 
> On 2015年12月15日 10:09, Marek Vasut wrote:
> > The uImage format is legacy for years now, enable support for the
> > fitImage format, which allows combining multiple files (kernel and
> > dtb) into a single file, offers better protection of the payload
> > and so on.
> > 
> > Signed-off-by: Marek Vasut 
> > Cc: Thomas Chou 
> > ---
> > 
> >   include/configs/10m50_devboard.h | 2 ++
> >   include/configs/3c120_devboard.h | 2 ++
> >   2 files changed, 4 insertions(+)
> > 
> > diff --git a/include/configs/10m50_devboard.h
> > b/include/configs/10m50_devboard.h index 608127f..0aa79f7 100644
> > --- a/include/configs/10m50_devboard.h
> > +++ b/include/configs/10m50_devboard.h
> > @@ -14,6 +14,8 @@
> > 
> >*/
> >   
> >   #define CONFIG_DISPLAY_CPUINFO
> >   #define CONFIG_DISPLAY_BOARDINFO_LATE
> > 
> > +#define CONFIG_OF_LIBFDT
> 
> Already defined.
> 
> > +#define CONFIG_FIT
> > 
> >   /*
> >   
> >* SERIAL
> > 
> > diff --git a/include/configs/3c120_devboard.h
> > b/include/configs/3c120_devboard.h index 6c9dc3f..0054d8b 100644
> > --- a/include/configs/3c120_devboard.h
> > +++ b/include/configs/3c120_devboard.h
> > @@ -14,6 +14,8 @@
> > 
> >*/
> >   
> >   #define CONFIG_DISPLAY_CPUINFO
> >   #define CONFIG_DISPLAY_BOARDINFO_LATE
> > 
> > +#define CONFIG_OF_LIBFDT
> 
> Ditto.
> 
> > +#define CONFIG_FIT
> > 
> >   /*
> >   
> >* SERIAL

The compiler is not complaining, is it really ?

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] eeprom: fix eeprom write procedure

[Alexey Brodkin]

Hi Marek,

On Tue, 2015-12-15 at 12:47 +0100, Marek Vasut wrote:
> On Tuesday, December 15, 2015 at 09:07:01 AM, Alexey Brodkin wrote:
> > Hi Marek,
> > 
> > On Tue, 2015-12-15 at 01:27 +0100, Marek Vasut wrote:
> > > On Monday, December 14, 2015 at 04:45:34 PM, Alexey Brodkin wrote:
> > > > This fixes commit 1a37889b0ad084a740b4f785031d7ae9955d947b:
> > > > --->8
> > > > eeprom: Pull out the RW loop
> > > > 
> > > > Unify the code for doing read/write into single function, since the
> > > > code for both the read and write is almost identical. This again
> > > > trims down the code duplication.
> > > > --->8
> > > > 
> > > > where the same one routine is utilized for both EEPROM writing and
> > > > reading. The only difference was supposed to be a "read" flag which
> > > > in both cases was set with 1 somehow.
> > > > 
> > > > That lead to a missing delay in case of writing which lead to write
> > > > failure (in my case no data was written).
> > > > 
> > > > Signed-off-by: Alexey Brodkin 
> > > > Cc: Marek Vasut 
> > > > Cc: Simon Glass 
> > > > Cc: Tom Rini 
> > > > Cc: Heiko Schocher 
> > > 
> > > Obviously correct,
> > > 
> > > Acked-by: Marek Vasut 
> > > 
> > > Thanks for spotting this, nice!
> > 
> > That was a nice exercise for me.
> > From the first glance DW SPI and ARC-specific changes
> > were not guilty so I tried some previous RC-s and found that
> > v2016.01-rc1 is good while rc2 is not.
> > 
> > So I recalled articles and talks about git bisect.
> > And literally in few next minutes I knew commit that introduced
> > that breakage. At that point problem became really obvious.
> 
> ... and then you cursed at me, yeah, I did not sleep very well last night ;-)

Well 1 beer may definitely help to improve our relationships indeed :)

But jokes aside I'm a bit confused with development cycle of U-Boot.
I mean here we're free to push quite important changes at any point
even if tomorrow Tom is cutting the next release. RCs are out of the
question at all.

I have to confess I do it myself from time to time just because it's
so easy and nobody cares. But that really makes me worry because I cannot
afford running U-Boot on every board I support on each and every commit.
Which in turn means there's a possibility in final release some of my boards
will be broken to some extent.

That said I really like Linux development procedure when merge window is
open just for a week or so and then only regression fixes are accepted
during RC cycles.

Still that very-very formal approach could be a bit of overkill for us here.
But there's another good example - Buildroot.

In the same way as we do it they accept patches right in master branch
but only until the first RC. From RC1 on only fixes go in master,
everything else goes to "next" branch. And "next" gets merged in master
right after release.

Again I'm not following U-boot mailing list closely so I might be missing
similar ongoing discussion so please be lenient to that my rant :)

-Alexey
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[U-Boot] [Patch V2 4/4] dm: env_sf: fix saveenv() to use driver model

[Gong Qianyu]

It might be missed when converting spi_flash_probe() in cmd_sf.c.

This commit refers to fbb099183e3a53f77a975964cdf2e73d11e565af.

Signed-off-by: Gong Qianyu 
---
V2:
 - New Patch.

 common/env_sf.c | 49 +
 1 file changed, 49 insertions(+)

diff --git a/common/env_sf.c b/common/env_sf.c
index 9409831..31d96a7 100644
--- a/common/env_sf.c
+++ b/common/env_sf.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifndef CONFIG_ENV_SPI_BUS
 # define CONFIG_ENV_SPI_BUS0
@@ -51,6 +52,29 @@ int saveenv(void)
char*saved_buffer = NULL, flag = OBSOLETE_FLAG;
u32 saved_size, saved_offset, sector = 1;
int ret;
+#ifdef CONFIG_DM_SPI_FLASH
+   struct udevice *new, *bus_dev;
+   unsigned int bus = CONFIG_SF_DEFAULT_BUS;
+   unsigned int cs = CONFIG_SF_DEFAULT_CS;
+   unsigned int speed = CONFIG_SF_DEFAULT_SPEED;
+   unsigned int mode = CONFIG_SF_DEFAULT_MODE;
+
+   /* Remove the old device, otherwise probe will just be a nop */
+   ret = spi_find_bus_and_cs(bus, cs, _dev, );
+   if (!ret) {
+   device_remove(new);
+   device_unbind(new);
+   }
+   env_flash = NULL;
+   ret = spi_flash_probe_bus_cs(bus, cs, speed, mode, );
+   if (ret) {
+   printf("Failed to initialize SPI flash at %u:%u (error %d)\n",
+  bus, cs, ret);
+   return 1;
+   }
+
+   env_flash = dev_get_uclass_priv(new);
+#else
 
if (!env_flash) {
env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS,
@@ -61,6 +85,7 @@ int saveenv(void)
return 1;
}
}
+#endif
 
ret = env_export(_new);
if (ret)
@@ -227,6 +252,29 @@ int saveenv(void)
char*saved_buffer = NULL;
int ret = 1;
env_t   env_new;
+#ifdef CONFIG_DM_SPI_FLASH
+   struct udevice *new, *bus_dev;
+   unsigned int bus = CONFIG_SF_DEFAULT_BUS;
+   unsigned int cs = CONFIG_SF_DEFAULT_CS;
+   unsigned int speed = CONFIG_SF_DEFAULT_SPEED;
+   unsigned int mode = CONFIG_SF_DEFAULT_MODE;
+
+   /* Remove the old device, otherwise probe will just be a nop */
+   ret = spi_find_bus_and_cs(bus, cs, _dev, );
+   if (!ret) {
+   device_remove(new);
+   device_unbind(new);
+   }
+   env_flash = NULL;
+   ret = spi_flash_probe_bus_cs(bus, cs, speed, mode, );
+   if (ret) {
+   printf("Failed to initialize SPI flash at %u:%u (error %d)\n",
+  bus, cs, ret);
+   return 1;
+   }
+
+   env_flash = dev_get_uclass_priv(new);
+#else
 
if (!env_flash) {
env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS,
@@ -237,6 +285,7 @@ int saveenv(void)
return 1;
}
}
+#endif
 
/* Is the sector larger than the env (i.e. embedded) */
if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
-- 
2.1.0.27.g96db324

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Re: [U-Boot] [PATCH 1/6] dm: x86: Create a driver for x86 interrupts

[Simon Glass]

Hi Bin,

On 14 December 2015 at 22:45, Bin Meng  wrote:
> Hi Simon,
>
> On Tue, Dec 15, 2015 at 10:04 AM, Bin Meng  wrote:
>> Hi Simon,
>>
>> On Tue, Dec 15, 2015 at 6:14 AM, Simon Glass  wrote:
>>> Hi Bin,
>>>
>>> On 13 December 2015 at 23:05, Bin Meng  wrote:
 Hi Simon,

 On Tue, Dec 1, 2015 at 12:46 PM, Simon Glass  wrote:
> It seems likely that at some point we will want a generic interrupt 
> uclass.
> But this is a big undertaking as it involves unifying code across multiple
> architectures.
>
> As a first step, create a simple IRQ uclass and a driver for x86. This can
> be generalised later as required.
>
> Adjust pirq_init() to probe this driver, which has the effect of creating
> routing tables and setting up the interrupt routing. This is a start
> towards making interrupts fit better with driver model.
>
> Signed-off-by: Simon Glass 
> ---
>

 Reviewed-by: Bin Meng 

 I will test this series when all previous DM changes are applied.
>>>
>>> Do you mean the series that I just pushed to dm/next. or something else?
>>>
>>
>> Yes, I mean all previous DM changes as I suspect this series has some
>> dependency on previous series. I will apply this series on top of
>> dm/next and test there.
>
> patch#4, patch#5 does not apply on top of dm/next. I guess there are
> some other dependencies?

I'm not sure, but you can use u-boot-dm/pcid-working for your testing.

Regards,
Simon
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[U-Boot] [Patch V2 2/4] spi: fsl_qspi: Fix qspi_op_rdid memcpy issue

[Gong Qianyu]

In current driver everytime we memcpy 4 bytes to the dest memory
regardless of the remaining length.
This patch adds checking the remaining length before memcpy.
If the length is shorter than 4 bytes, memcpy the actual length of data
to the dest memory.

Signed-off-by: Gong Qianyu 
---
V2:
 - No change.

 drivers/spi/fsl_qspi.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index 9f296c1..1278981 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -499,7 +499,10 @@ static void qspi_op_rdid(struct fsl_qspi_priv *priv, u32 
*rxbuf, u32 len)
if (rbsr_reg & QSPI_RBSR_RDBFL_MASK) {
data = qspi_read32(priv->flags, >rbdr[i]);
data = qspi_endian_xchg(data);
-   memcpy(rxbuf, , 4);
+   if (size < 4)
+   memcpy(rxbuf, , size);
+   else
+   memcpy(rxbuf, , 4);
rxbuf++;
size -= 4;
i++;
-- 
2.1.0.27.g96db324

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[U-Boot] [Patch V2 1/4] spi: fsl_qspi: fix compile warning for 64-bit platform

[Gong Qianyu]

This patch fixes the following compile warning:
drivers/spi/fsl_qspi.c: In function 'fsl_qspi_probe':
drivers/spi/fsl_qspi.c:937:15:
  warning: cast to pointer from integer of different size
 [-Wint-to-pointer-cast]
  priv->regs = (struct fsl_qspi_regs *)plat->reg_base;
   ^

Signed-off-by: Gong Qianyu 
---
V2:
 - No change.

 drivers/spi/fsl_qspi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index ed39114..9f296c1 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -931,7 +931,7 @@ static int fsl_qspi_probe(struct udevice *bus)
 
dm_spi_bus->max_hz = plat->speed_hz;
 
-   priv->regs = (struct fsl_qspi_regs *)plat->reg_base;
+   priv->regs = (struct fsl_qspi_regs *)(unsigned long)plat->reg_base;
priv->flags = plat->flags;
 
priv->speed_hz = plat->speed_hz;
-- 
2.1.0.27.g96db324

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[U-Boot] [Patch V2 3/4] spi: fsl_qspi: Fix qspi_op_rdsr memcpy issue

[Gong Qianyu]

In current driver, we always copy 4 bytes to the dest memory.
Actually the dest memory may be shorter than 4 bytes.
Add an argument to indicate the dest memory length.
Avoid writing memory outside of the bounds.

Signed-off-by: Gong Qianyu 
---
V2:
 - New Patch.

 drivers/spi/fsl_qspi.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index 1278981..b6b9e91 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -637,7 +637,7 @@ static void qspi_op_write(struct fsl_qspi_priv *priv, u8 
*txbuf, u32 len)
qspi_write32(priv->flags, >mcr, mcr_reg);
 }
 
-static void qspi_op_rdsr(struct fsl_qspi_priv *priv, u32 *rxbuf)
+static void qspi_op_rdsr(struct fsl_qspi_priv *priv, void *rxbuf, u32 len)
 {
struct fsl_qspi_regs *regs = priv->regs;
u32 mcr_reg, reg, data;
@@ -660,7 +660,7 @@ static void qspi_op_rdsr(struct fsl_qspi_priv *priv, u32 
*rxbuf)
if (reg & QSPI_RBSR_RDBFL_MASK) {
data = qspi_read32(priv->flags, >rbdr[0]);
data = qspi_endian_xchg(data);
-   memcpy(rxbuf, , 4);
+   memcpy(rxbuf, , len);
qspi_write32(priv->flags, >mcr,
 qspi_read32(priv->flags, >mcr) |
 QSPI_MCR_CLR_RXF_MASK);
@@ -749,7 +749,7 @@ int qspi_xfer(struct fsl_qspi_priv *priv, unsigned int 
bitlen,
} else if (priv->cur_seqid == QSPI_CMD_RDID)
qspi_op_rdid(priv, din, bytes);
else if (priv->cur_seqid == QSPI_CMD_RDSR)
-   qspi_op_rdsr(priv, din);
+   qspi_op_rdsr(priv, din, bytes);
 #ifdef CONFIG_SPI_FLASH_BAR
else if ((priv->cur_seqid == QSPI_CMD_BRRD) ||
 (priv->cur_seqid == QSPI_CMD_RDEAR)) {
-- 
2.1.0.27.g96db324

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Re: [U-Boot] [PATCH 07/10] net: axi_emac: Move driver to DM

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:59 AM, Michal Simek  wrote:
> Move driver to DM.
>
> Signed-off-by: Michal Simek 

Other than a few nits below and the issue with recv return value,

Acked-by: Joe Hershberger 

>  .../xilinx/microblaze-generic/microblaze-generic.c |   5 -
>  board/xilinx/zynq/board.c  |   4 -
>  drivers/net/xilinx_axi_emac.c  | 190 
> +
>  include/netdev.h   |   2 -
>  4 files changed, 122 insertions(+), 79 deletions(-)
>
> diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c 
> b/board/xilinx/microblaze-generic/microblaze-generic.c
> index dfa62933..a3122da9acaa 100644
> --- a/board/xilinx/microblaze-generic/microblaze-generic.c
> +++ b/board/xilinx/microblaze-generic/microblaze-generic.c
> @@ -105,11 +105,6 @@ int board_eth_init(bd_t *bis)
>  {
> int ret = 0;
>
> -#ifdef CONFIG_XILINX_AXIEMAC
> -   ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
> -   XILINX_AXIDMA_BASEADDR);
> -#endif
> -
>  #if defined(CONFIG_XILINX_EMACLITE) && defined(XILINX_EMACLITE_BASEADDR)
> u32 txpp = 0;
> u32 rxpp = 0;
> diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
> index 414f5302a066..427e75485deb 100644
> --- a/board/xilinx/zynq/board.c
> +++ b/board/xilinx/zynq/board.c
> @@ -103,10 +103,6 @@ int board_eth_init(bd_t *bis)
>  {
> u32 ret = 0;
>
> -#ifdef CONFIG_XILINX_AXIEMAC
> -   ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
> -   XILINX_AXIDMA_BASEADDR);
> -#endif
>  #ifdef CONFIG_XILINX_EMACLITE
> u32 txpp = 0;
> u32 rxpp = 0;
> diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
> index 77b1869dc9dc..c03f8f730d3a 100644
> --- a/drivers/net/xilinx_axi_emac.c
> +++ b/drivers/net/xilinx_axi_emac.c
> @@ -8,12 +8,15 @@
>
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
>  #include 
>  #include 
>
> +DECLARE_GLOBAL_DATA_PTR;
> +
>  #if !defined(CONFIG_PHYLIB)
>  # error AXI_ETHERNET requires PHYLIB
>  #endif
> @@ -87,6 +90,7 @@ struct axidma_priv {
> struct axidma_reg *dmarx;
> int phyaddr;
> struct axi_regs *iobase;
> +   phy_interface_t interface;
> struct phy_device *phydev;
> struct mii_dev *bus;
>  };
> @@ -218,11 +222,11 @@ static u32 phywrite(struct axidma_priv *priv, u32 
> phyaddress, u32 registernum,
>  }
>
>  /* Setting axi emac and phy to proper setting */
> -static int setup_phy(struct eth_device *dev)
> +static int setup_phy(struct udevice *dev)
>  {
> u16 phyreg;
> u32 i, speed, emmc_reg, ret;
> -   struct axidma_priv *priv = dev->priv;
> +   struct axidma_priv *priv = dev_get_priv(dev);
> struct axi_regs *regs = priv->iobase;
> struct phy_device *phydev;
>
> @@ -298,9 +302,9 @@ static int setup_phy(struct eth_device *dev)
>  }
>
>  /* STOP DMA transfers */
> -static void axiemac_halt(struct eth_device *dev)
> +static void axiemac_halt(struct udevice *dev)
>  {
> -   struct axidma_priv *priv = dev->priv;
> +   struct axidma_priv *priv = dev_get_priv(dev);
> u32 temp;
>
> /* Stop the hardware */
> @@ -358,16 +362,18 @@ static int axi_ethernet_init(struct axidma_priv *priv)
> return 0;
>  }
>
> -static int axiemac_setup_mac(struct eth_device *dev)
> +static int axiemac_setup_mac(struct udevice *dev)
>  {
> -   struct axi_regs *regs = (struct axi_regs *)dev->iobase;
> +   struct eth_pdata *pdata = dev_get_platdata(dev);
> +   struct axidma_priv *priv = dev_get_priv(dev);
> +   struct axi_regs *regs = priv->iobase;
>
> /* Set the MAC address */
> -   int val = ((dev->enetaddr[3] << 24) | (dev->enetaddr[2] << 16) |
> -   (dev->enetaddr[1] << 8) | (dev->enetaddr[0]));
> +   int val = ((pdata->enetaddr[3] << 24) | (pdata->enetaddr[2] << 16) |
> +   (pdata->enetaddr[1] << 8) | (pdata->enetaddr[0]));
> out_be32(>uaw0, val);
>
> -   val = (dev->enetaddr[5] << 8) | dev->enetaddr[4] ;
> +   val = (pdata->enetaddr[5] << 8) | pdata->enetaddr[4];
> val |= in_be32(>uaw1) & ~XAE_UAW1_UNICASTADDR_MASK;
> out_be32(>uaw1, val);
> return 0;
> @@ -396,10 +402,10 @@ static void axi_dma_init(struct axidma_priv *priv)
> printf("%s: Timeout\n", __func__);
>  }
>
> -static int axiemac_init(struct eth_device *dev, bd_t * bis)
> +static int axiemac_init(struct udevice *dev)
>  {
> -   struct axidma_priv *priv = dev->priv;
> -   struct axi_regs *regs = (struct axi_regs *)dev->iobase;
> +   struct axidma_priv *priv = dev_get_priv(dev);
> +   struct axi_regs *regs = priv->iobase;
> u32 temp;
>
> debug("axiemac: Init started\n");
> @@ -458,9 +464,9 @@ static int 

Re: [U-Boot] [PATCH 10/10] net: Add axi emac to Kconfig

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:59 AM, Michal Simek  wrote:
> Also add dependency on PHYLIB and MII which is required.
> Clean PHYLIB dependency from the driver too.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 03/12] net: emaclite: Convert MDIO to use register offset

[Joe Hershberger]

On Fri, Dec 11, 2015 at 6:03 AM, Michal Simek  wrote:
> Use u-boot coding style how to setup and access MDIO bus.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 08/10] net: axi_emac: Enable access to MDIO in probe

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:59 AM, Michal Simek  wrote:
> Detect phy when driver probes.
>
> Signed-off-by: Michal Simek 

A few nits below, but otherwise,

Acked-by: Joe Hershberger 

> ---
>
>  drivers/net/xilinx_axi_emac.c | 22 --
>  1 file changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
> index c03f8f730d3a..bff4d1b5affe 100644
> --- a/drivers/net/xilinx_axi_emac.c
> +++ b/drivers/net/xilinx_axi_emac.c
> @@ -222,10 +222,10 @@ static u32 phywrite(struct axidma_priv *priv, u32 
> phyaddress, u32 registernum,
>  }
>
>  /* Setting axi emac and phy to proper setting */

I think you didn't mean to leave this comment here.

> -static int setup_phy(struct udevice *dev)
> +static int axiemac_phy_init(struct udevice *dev)
>  {
> u16 phyreg;
> -   u32 i, speed, emmc_reg, ret;
> +   u32 i, ret;
> struct axidma_priv *priv = dev_get_priv(dev);
> struct axi_regs *regs = priv->iobase;
> struct phy_device *phydev;
> @@ -237,6 +237,9 @@ static int setup_phy(struct udevice *dev)
> SUPPORTED_1000baseT_Half |
> SUPPORTED_1000baseT_Full;
>
> +   /* Set default MDIO divisor */
> +   out_be32(>mdio_mc, XAE_MDIO_DIV_DFT | XAE_MDIO_MC_MDIOEN_MASK);
> +
> if (priv->phyaddr == -1) {
> /* Detect the PHY address */
> for (i = 31; i >= 0; i--) {
> @@ -259,6 +262,18 @@ static int setup_phy(struct udevice *dev)
> phydev->advertising = phydev->supported;
> priv->phydev = phydev;
> phy_config(phydev);
> +
> +   return 0;
> +}
> +
> +/* Setting axi emac and phy to proper setting */
> +static int setup_phy(struct udevice *dev)
> +{
> +   u32 speed, emmc_reg;
> +   struct axidma_priv *priv = dev_get_priv(dev);
> +   struct axi_regs *regs = priv->iobase;
> +   struct phy_device *phydev = priv->phydev;
> +
> if (phy_startup(phydev)) {
> printf("axiemac: could not initialize PHY %s\n",
>phydev->dev->name);
> @@ -358,6 +373,7 @@ static int axi_ethernet_init(struct axidma_priv *priv)
> /* Set default MDIO divisor */
> out_be32(>mdio_mc, XAE_MDIO_DIV_DFT | XAE_MDIO_MC_MDIOEN_MASK);
>
> +

Why do we need two blank lines?

> debug("axiemac: InitHw done\n");
> return 0;
>  }
> @@ -621,6 +637,8 @@ static int axi_emac_probe(struct udevice *dev)
> if (ret)
> return ret;
>
> +   axiemac_phy_init(dev);
> +
> return 0;
>  }
>
> --
> 1.9.1
>
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Re: [U-Boot] [PATCH 09/10] net: axi_emac: Split recv from free_pkt

[Joe Hershberger]

On Fri, Dec 11, 2015 at 5:59 AM, Michal Simek  wrote:
> Call net_process_received_packet() by core.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 01/12] net: emaclite: Remove ancient OF probe function

[Joe Hershberger]

On Fri, Dec 11, 2015 at 6:03 AM, Michal Simek  wrote:
> Prepare for DM move.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 3/5] usb: ohci-lpc32xx: Use shared wait_for_bit

[Mateusz Kulikowski]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256

On 15.12.2015 19:49, LEMIEUX, SYLVAIN wrote:
> 
>> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Mateusz 
>> Kulikowski
>> Sent: 14-Dec-15 7:09 PM
>> To: u-boot@lists.denx.de; Marek Vasut; Joe Hershberger
>> Subject: [U-Boot] [PATCH 3/5] usb: ohci-lpc32xx: Use shared wait_for_bit
>>
>> Use existing library function to poll bit(s).
>> No config files are updated, as there is no board using this driver.
> 
> I tested the change using our custom lpc32xx board.

Thanks!

> 
>>
>> Signed-off-by: Mateusz Kulikowski 
>> ---
>>
>>  drivers/usb/host/ohci-lpc32xx.c | 36 ++--
>>  1 file changed, 10 insertions(+), 26 deletions(-)
>>
> 
> ...
> Tested-by: Sylvain Lemieux 
> 
> 
> 
> This e-mail contains privileged and confidential information intended for the 
> use of the addressees named above. If you are not the intended recipient of 
> this e-mail, you are hereby notified that you must not disseminate, copy or 
> take any action in respect of any information contained in it. If you have 
> received this e-mail in error, please notify the sender immediately by e-mail 
> and immediately destroy this e-mail and its attachments.
> 

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Re: [U-Boot] [PATCH 05/12] net: emaclite: Use indirect register access for tx_ping/pong

[Joe Hershberger]

On Fri, Dec 11, 2015 at 6:03 AM, Michal Simek  wrote:
> Do initialization via indirect register access.

I think you need to change the subject of this patch. It is identical
the the previous one.

>
> Signed-off-by: Michal Simek 
> ---
>
>  drivers/net/xilinx_emaclite.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
> index 654ad58cea3c..724b61e0b7e1 100644
> --- a/drivers/net/xilinx_emaclite.c
> +++ b/drivers/net/xilinx_emaclite.c
> @@ -364,11 +364,10 @@ static int emaclite_init(struct eth_device *dev, bd_t 
> *bis)
>   * RX - RX_PING & RX_PONG initialization
>   */
> /* Write out the value to flush the RX buffer */
> -   out_be32 (dev->iobase + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK);
> +   out_be32(>rx_ping_rsr, XEL_RSR_RECV_IE_MASK);
>
> if (emaclite->rxpp)
> -   out_be32 (dev->iobase + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET,
> -   XEL_RSR_RECV_IE_MASK);
> +   out_be32(>rx_pong_rsr, XEL_RSR_RECV_IE_MASK);
>
>  #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
> out_be32(>mdioctrl, XEL_MDIOCTRL_MDIOEN_MASK);
> --
> 1.9.1
>
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Re: [U-Boot] [PATCH 11/12] net: emaclite: Move driver to DM

[Joe Hershberger]

On Fri, Dec 11, 2015 at 6:03 AM, Michal Simek  wrote:
> Move driver to DM.
>
> Signed-off-by: Michal Simek 

A few nits below, but otherwise,

Acked-by: Joe Hershberger 

> ---
>
>  .../xilinx/microblaze-generic/microblaze-generic.c |  21 ---
>  board/xilinx/zynq/board.c  |  20 ---
>  configs/microblaze-generic_defconfig   |   1 +
>  drivers/net/xilinx_emaclite.c  | 158 
> -
>  include/netdev.h   |   2 -
>  5 files changed, 92 insertions(+), 110 deletions(-)
>
> diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c 
> b/board/xilinx/microblaze-generic/microblaze-generic.c
> index a3122da9acaa..0e7509d288ce 100644
> --- a/board/xilinx/microblaze-generic/microblaze-generic.c
> +++ b/board/xilinx/microblaze-generic/microblaze-generic.c
> @@ -12,7 +12,6 @@
>  #include 
>  #include 
>  #include 
> -#include 
>  #include 
>  #include 
>  #include 
> @@ -100,23 +99,3 @@ void board_init(void)
>  {
> gpio_init();
>  }
> -
> -int board_eth_init(bd_t *bis)
> -{
> -   int ret = 0;
> -
> -#if defined(CONFIG_XILINX_EMACLITE) && defined(XILINX_EMACLITE_BASEADDR)
> -   u32 txpp = 0;
> -   u32 rxpp = 0;
> -# ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
> -   txpp = 1;
> -# endif
> -# ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
> -   rxpp = 1;
> -# endif
> -   ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
> -   txpp, rxpp);
> -#endif
> -
> -   return ret;
> -}
> diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
> index 427e75485deb..e89b05dffb4c 100644
> --- a/board/xilinx/zynq/board.c
> +++ b/board/xilinx/zynq/board.c
> @@ -8,7 +8,6 @@
>  #include 
>  #include 
>  #include 
> -#include 
>  #include 
>  #include 
>  #include 
> @@ -99,25 +98,6 @@ int checkboard(void)
>  }
>  #endif
>
> -int board_eth_init(bd_t *bis)
> -{
> -   u32 ret = 0;
> -
> -#ifdef CONFIG_XILINX_EMACLITE
> -   u32 txpp = 0;
> -   u32 rxpp = 0;
> -# ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
> -   txpp = 1;
> -# endif
> -# ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
> -   rxpp = 1;
> -# endif
> -   ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
> -   txpp, rxpp);
> -#endif
> -   return ret;
> -}
> -
>  int dram_init(void)
>  {
>  #if CONFIG_IS_ENABLED(OF_CONTROL)
> diff --git a/configs/microblaze-generic_defconfig 
> b/configs/microblaze-generic_defconfig
> index dad05410be50..5e815c6bcdcb 100644
> --- a/configs/microblaze-generic_defconfig
> +++ b/configs/microblaze-generic_defconfig
> @@ -9,6 +9,7 @@ CONFIG_CMD_GPIO=y
>  # CONFIG_CMD_SETEXPR is not set
>  CONFIG_SPL_OF_CONTROL=y
>  CONFIG_OF_EMBED=y
> +CONFIG_DM_ETH=y
>  CONFIG_PHYLIB=y
>  CONFIG_SYS_NS16550=y
>  CONFIG_XILINX_UARTLITE=y
> diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
> index b5ff4f099251..06286f267104 100644
> --- a/drivers/net/xilinx_emaclite.c
> +++ b/drivers/net/xilinx_emaclite.c
> @@ -10,6 +10,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -18,7 +19,7 @@
>  #include 
>  #include 
>
> -#undef DEBUG
> +DECLARE_GLOBAL_DATA_PTR;
>
>  #define ENET_ADDR_LENGTH   6
>
> @@ -144,7 +145,6 @@ static void xemaclite_alignedwrite(void *srcptr, u32 
> *destptr, u32 bytecount)
> *to32ptr++ = alignbuffer;
>  }
>
> -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
>  static int wait_for_bit(const char *func, u32 *reg, const u32 mask,
> bool set, unsigned int timeout)
>  {
> @@ -229,9 +229,8 @@ static u32 phywrite(struct xemaclite *emaclite, u32 
> phyaddress, u32 registernum,
>
> return 0;
>  }
> -#endif
>
> -static void emaclite_halt(struct eth_device *dev)
> +static void emaclite_halt(struct udevice *dev)
>  {
> debug("eth_halt\n");
>  }
> @@ -247,12 +246,11 @@ static void emaclite_halt(struct eth_device *dev)
>   */
>  #define PHY_DETECT_MASK 0x1808
>
> -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
> -static int setup_phy(struct eth_device *dev)
> +static int setup_phy(struct udevice *dev)
>  {
> int i;
> u16 phyreg;
> -   struct xemaclite *emaclite = dev->priv;
> +   struct xemaclite *emaclite = dev_get_priv(dev);
> struct phy_device *phydev;
>
> u32 supported = SUPPORTED_10baseT_Half |
> @@ -312,11 +310,11 @@ static int setup_phy(struct eth_device *dev)
> /* Do not setup anything */
> return 1;
>  }
> -#endif
>
> -static int emaclite_init(struct eth_device *dev, bd_t *bis)
> +static int emaclite_init(struct udevice *dev)
>  {
> -   struct xemaclite *emaclite = dev->priv;
> +   struct xemaclite *emaclite = dev_get_priv(dev);
> +   struct eth_pdata *pdata = dev_get_platdata(dev);
> struct 

Re: [U-Boot] [PATCH 2/5] usb: dwc2: Use shared wait_for_bit

[Mateusz Kulikowski]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256

On 15.12.2015 01:21, Marek Vasut wrote:
> On Tuesday, December 15, 2015 at 01:09:24 AM, Mateusz Kulikowski wrote:
[...]
> 
> Just enable this stuff by default (ie. dont introduce new config option,
> just use obj-y in lib/Makefile). The compiler will throw the function away
> if it's not used.
I had some concerns about that in the morning but now everything is clear, 
will do it that way (and learned something today).


Thanks for the review,
Mateusz

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Re: [U-Boot] [RFC PATCH 00/11] Add support for 96boards Dragonboard410C board

[Mateusz Kulikowski]

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On 15.12.2015 19:57, sk.syed2 wrote:
>>
>> With a slight delay (Sorry Syed) I'm finally ready to show code
>> I've been working recently on.
> 
> Thanks for the patches. I will update my git tree for snapdragon_810
> with these changes. I only have serial and cache support working on 810
> and it boots to u-boot prompt. The
> arch/arm/cpu/armv8/cache_v8.c/mmu_setup() causes the board to reset. I
> didn't dig deeper. I switched to use
> mmu_setup() as implemented in arch/arm/cpu/armv8/zynqmp/cpu.c and
> everything works fine.

Try to make it able to boot Linux somehow (either via mmc or usb or somehow).

After I'm done with this series for 410C I can take a look at drivers / dts for 
810 and try to give you some hints.

> 
>> create mode 100644 arch/arm/mach-snapdragon/reset.c
> Can you rename this  arch/arm/mach-snapdragon/reset-apq8016.c as I
> have arch/arm/mach-snapdragon/reset-apq8094.c to be added.

Sure - will do that.

> 
> Will provide more feedback going forward.

Great
> 
> Thanks
> -syed
> 

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Re: [U-Boot] [PATCH 02/12] net: emaclite: Add MDIO support to driver

[Joe Hershberger]

On Fri, Dec 11, 2015 at 6:03 AM, Michal Simek  wrote:
> Add MDIO support before move to DM.
>
> Signed-off-by: Michal Simek 

It looks like this is using the old MDIO API. I'm guessing this is a
patch that has existed for a while or something. You seem to follow it
up with a patch that reworks this. Since this is ephemeral, I guess...

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 10/12] net: emaclite: Use indirect access in emaclite_recv

[Joe Hershberger]

On Fri, Dec 11, 2015 at 6:03 AM, Michal Simek  wrote:
> When IP is configured with pong buffers, IP is receiving packets to ping
> and then to pong buffer and than ping again.
> Origin logic in the driver remains there that when ping buffer is

Origin -> Original

> free, pong buffer is checked too and return if both are free.
>
> Signed-off-by: Michal Simek 
> ---
>
> Do you know macros which I could use for addressing certain fields in
> ethernet and IP packet? The code is there because copying huge amount of
> data is causing performance penalty.

So you're saying the IP will not tell you the length of the frame
received? You have to pull it out of the packet data?

> ---
>  drivers/net/xilinx_emaclite.c | 90 
> ---
>  1 file changed, 51 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
> index e97ce2ce31f3..b5ff4f099251 100644
> --- a/drivers/net/xilinx_emaclite.c
> +++ b/drivers/net/xilinx_emaclite.c
> @@ -22,11 +22,6 @@
>
>  #define ENET_ADDR_LENGTH   6

Use ARP_HLEN from include/net.h

>
> -/* EmacLite constants */
> -#define XEL_BUFFER_OFFSET  0x0800  /* Next buffer's offset */
> -#define XEL_RSR_OFFSET 0x17FC  /* Rx status */
> -#define XEL_RXBUFF_OFFSET  0x1000  /* Receive Buffer */
> -
>  /* Xmit complete */
>  #define XEL_TSR_XMIT_BUSY_MASK 0x0001UL
>  /* Xmit interrupt enable bit */
> @@ -86,7 +81,7 @@ struct emaclite_regs {
>  };
>
>  struct xemaclite {
> -   u32 nextrxbuffertouse;  /* Next RX buffer to read from */
> +   bool nextrxbuffertouse; /* Next RX buffer to read from */

When using a boolean for this sort of thing it is good to give it a
more clear name, such as "use_rx_pong_buffer_next".

> u32 txpp;   /* TX ping pong buffer */
> u32 rxpp;   /* RX ping pong buffer */
> int phyaddr;
> @@ -455,45 +450,63 @@ static int emaclite_recv(struct eth_device *dev)
>  {
> u32 length;
> u32 reg;
> -   u32 baseaddress;
> +   u32 *addr, *ack;
> struct xemaclite *emaclite = dev->priv;
> -
> -   baseaddress = dev->iobase + emaclite->nextrxbuffertouse;
> -   reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
> -   debug("Testing data at address 0x%x\n", baseaddress);
> -   if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
> -   if (emaclite->rxpp)
> -   emaclite->nextrxbuffertouse ^= XEL_BUFFER_OFFSET;
> +   struct emaclite_regs *regs = emaclite->regs;
> +   u32 attempt = 0;
> +
> +try_again:
> +   if (!emaclite->nextrxbuffertouse) {
> +   reg = in_be32(>rx_ping_rsr);
> +   debug("Testing data at rx_ping\n");
> +   if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) 
> {
> +   debug("Data found in rx_ping buffer\n");
> +   addr = >rx_ping;
> +   ack = >rx_ping_rsr;
> +   } else {
> +   debug("Data not found in rx_ping buffer\n");
> +   /* Pong buffer is not available - return immediatelly 
> */

immediatelly -> immediately

> +   if (!emaclite->rxpp)
> +   return -1;
> +
> +   /* Try pong buffer if this is first attempt */
> +   if (attempt++)
> +   return -1;
> +   emaclite->nextrxbuffertouse =
> + 
> !emaclite->nextrxbuffertouse;
> +   goto try_again;
> +   }
> } else {
> -
> -   if (!emaclite->rxpp) {
> -   debug("No data was available - address 0x%x\n",
> -   baseaddress);
> -   return 0;
> +   reg = in_be32(>rx_pong_rsr);
> +   debug("Testing data at rx_pong\n");
> +   if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) 
> {
> +   debug("Data found in rx_pong buffer\n");
> +   addr = >rx_pong;
> +   ack = >rx_pong_rsr;
> } else {
> -   baseaddress ^= XEL_BUFFER_OFFSET;
> -   reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
> -   if ((reg & XEL_RSR_RECV_DONE_MASK) !=
> -   XEL_RSR_RECV_DONE_MASK) {
> -   debug("No data was available - address 
> 0x%x\n",
> -   baseaddress);
> -   return 0;
> -   }
> +   debug("Data not found in rx_pong buffer\n");
> +   /* Try ping buffer if this is first attempt */
> + 

Re: [U-Boot] [PATCH 2/5] usb: dwc2: Use shared wait_for_bit

[Marek Vasut]

On Tuesday, December 15, 2015 at 10:22:22 PM, Mateusz Kulikowski wrote:
> On 15.12.2015 01:21, Marek Vasut wrote:
> > On Tuesday, December 15, 2015 at 01:09:24 AM, Mateusz Kulikowski wrote:
> [...]
> 
> > Just enable this stuff by default (ie. dont introduce new config option,
> > just use obj-y in lib/Makefile). The compiler will throw the function
> > away if it's not used.
> 
> I had some concerns about that in the morning but now everything is clear,
> will do it that way (and learned something today).

Good , thanks!

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 07/10] net: axi_emac: Move driver to DM

[Joe Hershberger]

Hi Simon,

On Tue, Dec 15, 2015 at 12:57 PM, Simon Glass  wrote:
> Hi Michal,
>
> On 11 December 2015 at 04:59, Michal Simek  wrote:
>> Move driver to DM.
>>
>> Signed-off-by: Michal Simek 
>> ---
>>
>>  .../xilinx/microblaze-generic/microblaze-generic.c |   5 -
>>  board/xilinx/zynq/board.c  |   4 -
>>  drivers/net/xilinx_axi_emac.c  | 190 
>> +
>>  include/netdev.h   |   2 -
>>  4 files changed, 122 insertions(+), 79 deletions(-)
>
> Reviewed-by: Simon Glass 
>
> See a few things below.
>
>>
>> diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c 
>> b/board/xilinx/microblaze-generic/microblaze-generic.c
>> index dfa62933..a3122da9acaa 100644
>> --- a/board/xilinx/microblaze-generic/microblaze-generic.c
>> +++ b/board/xilinx/microblaze-generic/microblaze-generic.c
>> @@ -105,11 +105,6 @@ int board_eth_init(bd_t *bis)
>>  {
>> int ret = 0;
>>
>> -#ifdef CONFIG_XILINX_AXIEMAC
>> -   ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
>> -   XILINX_AXIDMA_BASEADDR);
>> -#endif
>> -
>>  #if defined(CONFIG_XILINX_EMACLITE) && defined(XILINX_EMACLITE_BASEADDR)
>> u32 txpp = 0;
>> u32 rxpp = 0;
>> diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
>> index 414f5302a066..427e75485deb 100644
>> --- a/board/xilinx/zynq/board.c
>> +++ b/board/xilinx/zynq/board.c
>> @@ -103,10 +103,6 @@ int board_eth_init(bd_t *bis)
>>  {
>> u32 ret = 0;
>>
>> -#ifdef CONFIG_XILINX_AXIEMAC
>> -   ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
>> -   XILINX_AXIDMA_BASEADDR);
>> -#endif
>>  #ifdef CONFIG_XILINX_EMACLITE
>> u32 txpp = 0;
>> u32 rxpp = 0;
>> diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
>> index 77b1869dc9dc..c03f8f730d3a 100644
>> --- a/drivers/net/xilinx_axi_emac.c
>> +++ b/drivers/net/xilinx_axi_emac.c
>> @@ -8,12 +8,15 @@
>>
>>  #include 
>>  #include 
>> +#include 
>>  #include 
>>  #include 
>>  #include 
>>  #include 
>>  #include 
>>
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>>  #if !defined(CONFIG_PHYLIB)
>>  # error AXI_ETHERNET requires PHYLIB
>>  #endif
>> @@ -87,6 +90,7 @@ struct axidma_priv {
>> struct axidma_reg *dmarx;
>> int phyaddr;
>> struct axi_regs *iobase;
>> +   phy_interface_t interface;
>> struct phy_device *phydev;
>> struct mii_dev *bus;
>>  };
>> @@ -218,11 +222,11 @@ static u32 phywrite(struct axidma_priv *priv, u32 
>> phyaddress, u32 registernum,
>>  }
>>
>>  /* Setting axi emac and phy to proper setting */
>> -static int setup_phy(struct eth_device *dev)
>> +static int setup_phy(struct udevice *dev)
>>  {
>> u16 phyreg;
>> u32 i, speed, emmc_reg, ret;
>> -   struct axidma_priv *priv = dev->priv;
>> +   struct axidma_priv *priv = dev_get_priv(dev);
>> struct axi_regs *regs = priv->iobase;
>> struct phy_device *phydev;
>>
>> @@ -298,9 +302,9 @@ static int setup_phy(struct eth_device *dev)
>>  }
>>
>>  /* STOP DMA transfers */
>> -static void axiemac_halt(struct eth_device *dev)
>> +static void axiemac_halt(struct udevice *dev)
>>  {
>> -   struct axidma_priv *priv = dev->priv;
>> +   struct axidma_priv *priv = dev_get_priv(dev);
>> u32 temp;
>>
>> /* Stop the hardware */
>> @@ -358,16 +362,18 @@ static int axi_ethernet_init(struct axidma_priv *priv)
>> return 0;
>>  }
>>
>> -static int axiemac_setup_mac(struct eth_device *dev)
>> +static int axiemac_setup_mac(struct udevice *dev)
>>  {
>> -   struct axi_regs *regs = (struct axi_regs *)dev->iobase;
>> +   struct eth_pdata *pdata = dev_get_platdata(dev);
>> +   struct axidma_priv *priv = dev_get_priv(dev);
>> +   struct axi_regs *regs = priv->iobase;
>>
>> /* Set the MAC address */
>> -   int val = ((dev->enetaddr[3] << 24) | (dev->enetaddr[2] << 16) |
>> -   (dev->enetaddr[1] << 8) | (dev->enetaddr[0]));
>> +   int val = ((pdata->enetaddr[3] << 24) | (pdata->enetaddr[2] << 16) |
>> +   (pdata->enetaddr[1] << 8) | (pdata->enetaddr[0]));
>> out_be32(>uaw0, val);
>>
>> -   val = (dev->enetaddr[5] << 8) | dev->enetaddr[4] ;
>> +   val = (pdata->enetaddr[5] << 8) | pdata->enetaddr[4];
>> val |= in_be32(>uaw1) & ~XAE_UAW1_UNICASTADDR_MASK;
>> out_be32(>uaw1, val);
>> return 0;
>> @@ -396,10 +402,10 @@ static void axi_dma_init(struct axidma_priv *priv)
>> printf("%s: Timeout\n", __func__);
>>  }
>>
>> -static int axiemac_init(struct eth_device *dev, bd_t * bis)
>> +static int axiemac_init(struct udevice *dev)
>>  {
>> -   struct axidma_priv *priv = dev->priv;
>> -   struct axi_regs *regs = (struct axi_regs 

Re: [U-Boot] [PATCH 06/12] net: emaclite: Use indirect register access for TX reset

[Joe Hershberger]

On Fri, Dec 11, 2015 at 6:03 AM, Michal Simek  wrote:
> Move to use indirect register access when timeout expires for resetting
> TX buffers.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 09/12] net: emaclite: Use indirect reg access in send

[Joe Hershberger]

On Fri, Dec 11, 2015 at 6:03 AM, Michal Simek  wrote:
> Origin logic in the driver was exchanging buffers which are used for

Origin -> The original

> sending packet and tx_ping and tx_pong buffers were exchanged all the
> time to ensure that IP has enough time to send the packet out.
> Based on this "feature" send function was using nextbuffertouse variable
> to save which buffer should be used.
> Before this algorithm was called driver checked that there is free
> buffer available.
> This checking remains in the driver but driver tries to use tx_ping
> first if available. If not, tx_pong buffer is used instead.
> To reach this code origin condition is met that at least on of the

origin -> ", the original"

on of the -> one of the

> buffer should be available.
> Testing doesn't show any performance drop when this patch is applied.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 07/12] net: emaclite: Fix logic around available TX buffers

[Joe Hershberger]

On Fri, Dec 11, 2015 at 6:03 AM, Michal Simek  wrote:
> Simplify logic how to find out if there is free TX buffer.
> Both buffers are checked all the time that's why logic around order
> can be removed.
> Also add check when only one buffer is available.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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[U-Boot] [PATCH] gpio: mxs: add name_to_gpio() function

[Mans Rullgard]

Override the default name_to_gpio() function with one that
accepts strings of the form bank:pin.  If a colon is present
in the provided name, it behaves like the default version.

This lets the "gpio" command work with sane names rather than
requiring the user to enter the bank/pin composite in decimal.

Signed-off-by: Mans Rullgard 
---
 drivers/gpio/mxs_gpio.c | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index da0199b..b54a10b 100644
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -114,3 +114,18 @@ int gpio_free(unsigned gpio)
 {
return 0;
 }
+
+int name_to_gpio(const char *name)
+{
+   unsigned bank, pin;
+   char *end;
+
+   bank = simple_strtoul(name, , 10);
+
+   if (!*end || *end != ':')
+   return bank;
+
+   pin = simple_strtoul(end + 1, NULL, 10);
+
+   return (bank << MXS_PAD_BANK_SHIFT) | (pin << MXS_PAD_PIN_SHIFT);
+}
-- 
2.6.3

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Re: [U-Boot] [PATCH 07/10] net: axi_emac: Move driver to DM

[Simon Glass]

Hi Joe,

On 15 December 2015 at 13:52, Joe Hershberger  wrote:
>
> Hi Simon,
>
> On Tue, Dec 15, 2015 at 12:57 PM, Simon Glass  wrote:
> > Hi Michal,
> >
> > On 11 December 2015 at 04:59, Michal Simek  wrote:
> >> Move driver to DM.
> >>
> >> Signed-off-by: Michal Simek 
> >> ---
> >>
> >>  .../xilinx/microblaze-generic/microblaze-generic.c |   5 -
> >>  board/xilinx/zynq/board.c  |   4 -
> >>  drivers/net/xilinx_axi_emac.c  | 190 
> >> +
> >>  include/netdev.h   |   2 -
> >>  4 files changed, 122 insertions(+), 79 deletions(-)
> >
> > Reviewed-by: Simon Glass 
> >
> > See a few things below.
> >
> >>
> >> diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c 
> >> b/board/xilinx/microblaze-generic/microblaze-generic.c
> >> index dfa62933..a3122da9acaa 100644
> >> --- a/board/xilinx/microblaze-generic/microblaze-generic.c
> >> +++ b/board/xilinx/microblaze-generic/microblaze-generic.c
> >> @@ -105,11 +105,6 @@ int board_eth_init(bd_t *bis)
> >>  {
> >> int ret = 0;
> >>
> >> -#ifdef CONFIG_XILINX_AXIEMAC
> >> -   ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
> >> -   XILINX_AXIDMA_BASEADDR);
> >> -#endif
> >> -
> >>  #if defined(CONFIG_XILINX_EMACLITE) && defined(XILINX_EMACLITE_BASEADDR)
> >> u32 txpp = 0;
> >> u32 rxpp = 0;
> >> diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
> >> index 414f5302a066..427e75485deb 100644
> >> --- a/board/xilinx/zynq/board.c
> >> +++ b/board/xilinx/zynq/board.c
> >> @@ -103,10 +103,6 @@ int board_eth_init(bd_t *bis)
> >>  {
> >> u32 ret = 0;
> >>
> >> -#ifdef CONFIG_XILINX_AXIEMAC
> >> -   ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
> >> -   XILINX_AXIDMA_BASEADDR);
> >> -#endif
> >>  #ifdef CONFIG_XILINX_EMACLITE
> >> u32 txpp = 0;
> >> u32 rxpp = 0;
> >> diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
> >> index 77b1869dc9dc..c03f8f730d3a 100644
> >> --- a/drivers/net/xilinx_axi_emac.c
> >> +++ b/drivers/net/xilinx_axi_emac.c
> >> @@ -8,12 +8,15 @@
> >>
> >>  #include 
> >>  #include 
> >> +#include 
> >>  #include 
> >>  #include 
> >>  #include 
> >>  #include 
> >>  #include 
> >>
> >> +DECLARE_GLOBAL_DATA_PTR;
> >> +
> >>  #if !defined(CONFIG_PHYLIB)
> >>  # error AXI_ETHERNET requires PHYLIB
> >>  #endif
> >> @@ -87,6 +90,7 @@ struct axidma_priv {
> >> struct axidma_reg *dmarx;
> >> int phyaddr;
> >> struct axi_regs *iobase;
> >> +   phy_interface_t interface;
> >> struct phy_device *phydev;
> >> struct mii_dev *bus;
> >>  };
> >> @@ -218,11 +222,11 @@ static u32 phywrite(struct axidma_priv *priv, u32 
> >> phyaddress, u32 registernum,
> >>  }
> >>
> >>  /* Setting axi emac and phy to proper setting */
> >> -static int setup_phy(struct eth_device *dev)
> >> +static int setup_phy(struct udevice *dev)
> >>  {
> >> u16 phyreg;
> >> u32 i, speed, emmc_reg, ret;
> >> -   struct axidma_priv *priv = dev->priv;
> >> +   struct axidma_priv *priv = dev_get_priv(dev);
> >> struct axi_regs *regs = priv->iobase;
> >> struct phy_device *phydev;
> >>
> >> @@ -298,9 +302,9 @@ static int setup_phy(struct eth_device *dev)
> >>  }
> >>
> >>  /* STOP DMA transfers */
> >> -static void axiemac_halt(struct eth_device *dev)
> >> +static void axiemac_halt(struct udevice *dev)
> >>  {
> >> -   struct axidma_priv *priv = dev->priv;
> >> +   struct axidma_priv *priv = dev_get_priv(dev);
> >> u32 temp;
> >>
> >> /* Stop the hardware */
> >> @@ -358,16 +362,18 @@ static int axi_ethernet_init(struct axidma_priv 
> >> *priv)
> >> return 0;
> >>  }
> >>
> >> -static int axiemac_setup_mac(struct eth_device *dev)
> >> +static int axiemac_setup_mac(struct udevice *dev)
> >>  {
> >> -   struct axi_regs *regs = (struct axi_regs *)dev->iobase;
> >> +   struct eth_pdata *pdata = dev_get_platdata(dev);
> >> +   struct axidma_priv *priv = dev_get_priv(dev);
> >> +   struct axi_regs *regs = priv->iobase;
> >>
> >> /* Set the MAC address */
> >> -   int val = ((dev->enetaddr[3] << 24) | (dev->enetaddr[2] << 16) |
> >> -   (dev->enetaddr[1] << 8) | (dev->enetaddr[0]));
> >> +   int val = ((pdata->enetaddr[3] << 24) | (pdata->enetaddr[2] << 16) 
> >> |
> >> +   (pdata->enetaddr[1] << 8) | (pdata->enetaddr[0]));
> >> out_be32(>uaw0, val);
> >>
> >> -   val = (dev->enetaddr[5] << 8) | dev->enetaddr[4] ;
> >> +   val = (pdata->enetaddr[5] << 8) | pdata->enetaddr[4];
> >> val |= in_be32(>uaw1) & ~XAE_UAW1_UNICASTADDR_MASK;
> >> out_be32(>uaw1, val);
> >> return 

Re: [U-Boot] [PATCH 12/12] net: emaclite: Move emaclite to Kconfig

[Joe Hershberger]

On Fri, Dec 11, 2015 at 6:03 AM, Michal Simek  wrote:
> Add PHYLIB and MII dependencies and enable it by default for Microblaze.
>
> Signed-off-by: Michal Simek 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH 1/5] Make RBTREE selectable by Kconfig

[Joe Hershberger]

Hi Lars,

On Tue, Dec 15, 2015 at 8:44 AM, Lars Poeschel  wrote:
> Am Dienstag, 18. August 2015, 14:32:13 schrieb Joe Hershberger:
>> On Tue, Aug 18, 2015 at 2:27 PM, Tom Rini  wrote:
>> > On Tue, Aug 18, 2015 at 01:47:20PM -0500, Joe Hershberger wrote:
>> >> Hi Lars,
>> >>
>> >> On Tue, Aug 11, 2015 at 2:29 PM, Joe Hershberger
>> >>
>> >>  wrote:
>> >> > Hi Lars,
>> >> >
>> >> > On Tue, Jul 28, 2015 at 11:01 AM, Joe Hershberger
>> >> >
>> >> >  wrote:
>> >> >> Hi Lars,
>> >> >>
>> >> >> On Tue, Jul 28, 2015 at 3:25 AM, Lars Poeschel 
> wrote:
>> >> >>> Hi Joe,
>> >> >>>
>> >> >>> On Wed, Jun 10, 2015 at 11:03:59AM -0500, Joe Hershberger wrote:
>> >>  >> I beat you to it:
>> >>  >> http://lists.denx.de/pipermail/u-boot/2015-May/214261.html>> 
>>
>> >>  > Well, ... ok. You won ;-) Your patchset is by far more
>> >>  > comprehensive than
>> >>  > mine.
>> >>  > If I see this right in the archives, you did not receive any
>> >>  > comments
>> >>  > since nearly a month.
>> >> 
>> >>  That is true. I really would like a little feedback on it... or
>> >>  maybe
>> >>  I can just drop the controversial one and only include these
>> >>  things...
>> >>  they seem to be mostly straightforward.
>> >> 
>> >>  > This was RFC will you resend this as a "real" PATCH ?
>> >> 
>> >>  Yes.
>> >> 
>> >>  > Could you then include two of the dependencies from my patches:
>> >>  > I think CMD_UBI has to depend on MTD_PARTITIONS and obivously
>> >>  > CMD_UBIFS
>> >>
>> >> I noticed when adding MTD_PARTITIONS that MTD_DEVICE is not moved over
>> >> yet. Do you know what the dependency relationship is there? If not
>> >> I'll dig into it a bit.
>> >>
>> >>  > has to depend on CMD_UBI.
>> >> 
>> >>  Will do.
>> >> >>>
>> >> >>> I saw no action from you on this one. Can I help out - at least for
>> >> >>> the
>> >> >>> decompression / ubi / ubifs part ?
>> >> >>
>> >> >> Sorry about that... the end of last release got a little crazy.
>> >> >>
>> >> >>> I think the setexpr / env location parts from your patchset can then
>> >> >>> go
>> >> >>> in as seperate patches.
>> >> >>
>> >> >> I agree. I'll split them apart and send these out.
>> >> >
>> >> > I haven't forgotten about this... I plan to get this sent out this
>> >> > week.
>> >>
>> >> I had this ready to go, but conflicts with
>> >> https://patchwork.ozlabs.org/patch/508134/, so I'm gonna have to
>> >> regenerate the moves after that goes in.
>> >
>> > Note that since it's part of the E1000 series I gave it to you in
>> > patchwork :)
>>
>> Sure, I expect to take it in once all feedback is addressed on that series.
>> :)
>
> Joe,
> a gentle ping on this.
> I don't see RBTREE, MTD_PARTIONS and UBIFS in Kconfig yet.

Argh! I forgot that I had this sitting in a branch that still had a
few targets not building cleanly. This moving configs stuff is a pain
when so many boards use them and in odd / slightly different ways.

Now all the work has to be regenerated and reanalyzed for build
failures. Maybe I'll just start with one dependency... get that in,
then focus on the next, etc. There are so many boards that conflict
readily if you have to spend any amount of time resolving issues.

Sorry for the delay.
-Joe
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[U-Boot] [PATCH] net: phy: mv88e61xx: Revise as a PHY driver

[Kevin Smith]

The previous version of this driver just implemented a shell
command to manually configure the switch.  It did not integrate
with the PHY infrastructure to allow a MAC to use it as its PHY.
This is pretty much a complete rewrite to allow this switch to
function as a PHY driver.

This version configures the switch to have a CPU connected over
an MII interface.  It will enable PHY interfaces based on the
MV88E61XX_PHY_PORTS bitmask macro.  The switch is configured to
allow PHY ports to only communicate to the CPU and the CPU to
communicate to all PHY ports.  This allows the switch to be used
as a basic PHY on any/all ports.

This driver was developed with a mv88e6176 switch and a CPU
connected over SGMII on port 5.  Other configurations should be
supported, but this is the only one that could be tested.

Signed-off-by: Kevin Smith 
Cc: Joe Hershberger 
Cc: Prafulla Wadaskar 
Cc: Stefan Roese 
Cc: Marek Vasut 
---
 drivers/net/phy/mv88e61xx.c | 899 +++-
 drivers/net/phy/mv88e61xx.h |  61 ---
 drivers/net/phy/phy.c   |   3 +
 include/phy.h   |   1 +
 4 files changed, 484 insertions(+), 480 deletions(-)
 delete mode 100644 drivers/net/phy/mv88e61xx.h

diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c
index 302abe8..4b02f29 100644
--- a/drivers/net/phy/mv88e61xx.c
+++ b/drivers/net/phy/mv88e61xx.c
@@ -7,531 +7,592 @@
  */
 
 #include 
+#include 
+#include 
 #include 
-#include "mv88e61xx.h"
 
-/*
- * Uncomment either of the following line for local debug control;
- * otherwise global debug control will apply.
- */
-
-/* #undef DEBUG */
-/* #define DEBUG */
+#define PHY_AUTONEGOTIATE_TIMEOUT  5000
+
+#define PORT_COUNT 7
+#define CPU_PORT   5
+#define PORT_MASK  ((1 << PORT_COUNT) - 1)
+
+/* Device addresses */
+#define DEVADDR_PORT(p)(0x10 + (p))
+#define DEVADDR_SERDES 0x0F
+#define DEVADDR_GLOBAL_1   0x1B
+#define DEVADDR_GLOBAL_2   0x1C
+
+/* Global registers */
+#define GLOBAL1_STATUS 0x00
+#define GLOBAL1_CONTROL0x04
+
+/* Global 2 registers */
+#define GLOBAL2_REG_PHY_CMD0x18
+#define GLOBAL2_REG_PHY_DATA   0x19
+
+/* Port registers */
+#define PORT_REG_STATUS0x00
+#define PORT_REG_PHYS_CONTROL  0x01
+#define PORT_REG_SWITCH_ID 0x03
+#define PORT_REG_CONTROL   0x04
+#define PORT_REG_VLAN_MAP  0x06
+#define PORT_REG_VLAN_ID   0x07
+
+/* Phy registers */
+#define PHY_REG_STATUS10x11
+#define PHY_REG_PAGE   0x16
+
+/* Serdes registers */
+#define SERDES_REG_CONTROL_1   0x10
+
+/* Phy page numbers */
+#define PHY_PAGE_COPPER0
+#define PHY_PAGE_SERDES1
+
+#define PHY_WRITE_CMD  0x9400
+#define PHY_READ_CMD   0x9800
+
+/* PHY Status Register */
+#define PHY_REG_STATUS1_SPEED  0xc000
+#define PHY_REG_STATUS1_GBIT   0x8000
+#define PHY_REG_STATUS1_1000x4000
+#define PHY_REG_STATUS1_DUPLEX 0x2000
+#define PHY_REG_STATUS1_SPDDONE0x0800
+#define PHY_REG_STATUS1_LINK   0x0400
+#define PHY_REG_STATUS1_ENERGY 0x0010
+
+#ifndef CONFIG_MV88E61XX_PHY_PORTS
+#error Define CONFIG_MV88E61XX_PHY_PORTS to indicate which physical ports \
+   to activate
+#endif
 
-#ifdef CONFIG_MV88E61XX_MULTICHIP_ADRMODE
-/* Chip Address mode
- * The Switch support two modes of operation
- * 1. single chip mode and
- * 2. Multi-chip mode
- * Refer section 9.2 &9.3 in chip datasheet-02 for more details
- *
- * By default single chip mode is configured
- * multichip mode operation can be configured in board header
- */
-static int mv88e61xx_busychk_multic(char *name, u32 devaddr)
+/* Wait for the current SMI PHY command to complete */
+static int mv88e61xx_smi_wait(struct mii_dev *bus)
 {
-   u16 reg = 0;
-   u32 timeout = MV88E61XX_PHY_TIMEOUT;
+   int reg;
+   u32 timeout = 100;
 
-   /* Poll till SMIBusy bit is clear */
do {
-   miiphy_read(name, devaddr, 0x0, );
-   if (timeout-- == 0) {
-   printf("SMI busy timeout\n");
-   return -1;
-   }
-   } while (reg & (1 << 15));
-   return 0;
-}
+   reg = bus->read(bus, DEVADDR_GLOBAL_2, MDIO_DEVAD_NONE,
+   GLOBAL2_REG_PHY_CMD);
+   if (reg >= 0 && (reg & (1 << 15)) == 0)
+   return 0;
 
-static void mv88e61xx_switch_write(char *name, u32 phy_adr,
-   u32 reg_ofs, u16 data)
-{
-   u16 mii_dev_addr;
+   mdelay(1);
+   } while (--timeout);
 
-   /* 

Re: [U-Boot] [PATCH] usb: kbd: don't use int xfers when polling via ctrl xfers

[Marek Vasut]

On Wednesday, December 16, 2015 at 12:35:23 AM, Stephen Warren wrote:
> On 11/13/2015 06:16 PM, Marek Vasut wrote:
> > On Friday, November 13, 2015 at 09:34:09 PM, Stephen Warren wrote:
> >> From: Stephen Warren 
> >> 
> >> When CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is enabled, use a
> >> GET_REPORT control transfer to retrieve the initial state of the
> >> keyboard. This matches the technique used to poll the keyboard state.
> >> This is useful since it eliminates the remaining use of interrupt
> >> transfers from the USB keyboard driver, which allows it to work with
> >> USB HCD that don't support interrupt transfers.
> >> 
> >> Cc: Hans de Goede 
> >> Signed-off-by: Stephen Warren 
> >> ---
> >> Are there any disadvantages to using control transfers over interrupt
> >> transfers? I'm not aware of any, but I assume there must be a reason
> >> that U-Boot typically uses interrupt transfers.
> > 
> > I initially implemented the control EP polling because I had a keyboard
> > which had issues with interrupt transfers.
> > 
> > Reviewed-by: Marek Vasut 
> 
> Did you intend someone else to apply this?

Is the discussion concluded already? I was under the impression that there
was no general agreement.

Otherwise I can pick this of course.

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 00/24] usb: s3c-otg: Rename driver to dwc2-otg

[Marek Vasut]

On Tuesday, December 15, 2015 at 03:40:33 PM, Lukasz Majewski wrote:
> Hi Marek,

Hi!

> > On Thursday, December 10, 2015 at 05:51:12 PM, Marek Vasut wrote:
> > > On Thursday, December 10, 2015 at 05:07:53 PM, Lukasz Majewski
> > > 
> > > wrote:
> > > > Hi Marek,
> > > > 
> > > > > On Wednesday, December 09, 2015 at 05:06:52 PM, Lukasz Majewski
> > > > > 
> > > > > wrote:
> > > > > > Hi Marek,
> > > > > > 
> > > > > > > On Wednesday, December 09, 2015 at 04:02:58 PM, Lukasz
> > > > > > > Majewski
> > > > > > > 
> > > > > > > wrote:
> > > > > > > > Hi Marek,
> > > > > > > > 
> > > > > > > > > On Wednesday, December 09, 2015 at 10:37:42 AM, Lukasz
> > > > > > > > > Majewski
> > > > > > > > > 
> > > > > > > > > wrote:
> > > > > > > > > > Hi Marek,
> > > > > > > > > > 
> > > > > > > > > > > The driver is for the dwc2 otg block , so rename it
> > > > > > > > > > > accordingly finally.
> > > > > > > > > > > 
> > > > > > > > > > > Marek Vasut (24):
> > > > > > > > > > >   usb: s3c-otg: Rename regs-otg.h to
> > > > > > > > > > > 
> > > > > > > > > > > s3c_udc_otg_regs.h usb: s3c-otg: Rename struct
> > > > > > > > > > > s3c_udc to dwc2_udc usb: s3c-otg: Rename struct
> > > > > > > > > > > s3c_usbotg_reg to
> > > > > > > > > > > 
> > > > > > > > > > > dwc2_usbotg_reg usb: s3c-otg: Split private bits
> > > > > > > > > > > from s3c_udc.h usb: s3c-otg: Rename struct
> > > > > > > > > > > s3c_usbotg_phy to dwc2_usbotg_phy usb: s3c-otg:
> > > > > > > > > > > Rename struct s3c_dev_*_ep
> > > > > > > > > > > 
> > > > > > > > > > >   usb: s3c-otg: Rename struct s3c_ep
> > > > > > > > > > >   usb: s3c-otg: Rename struct s3c_request
> > > > > > > > > > >   usb: s3c-otg: Staticize s3c_udc_ep_set_stall
> > > > > > > > > > >   usb: s3c-otg: Staticize functions in
> > > > > > > > > > > 
> > > > > > > > > > > s3c_udc_otg_xfer_dma.c usb: s3c-otg: Rename
> > > > > > > > > > > s3c_ep0_*() functions usb: s3c-otg: Rename
> > > > > > > > > > > s3c_ep_*() functions
> > > > > > > > > > > 
> > > > > > > > > > >   usb: s3c-otg: Rename s3c_udc_*() functions
> > > > > > > > > > >   usb: s3c-otg: Rename remaining local s3c_*()
> > > > > > > > > > > 
> > > > > > > > > > > functions usb: s3c-otg: Zap useless externs
> > > > > > > > > > > 
> > > > > > > > > > >   usb: s3c-otg: Change the driver name to dwc2-udc
> > > > > > > > > > >   usb: s3c-otg: Rename local headers to dwc2_*h
> > > > > > > > > > >   usb: s3c-otg: Rename sources to dwc2_*c
> > > > > > > > > > >   usb: s3c-otg: Rename remaining macros
> > > > > > > > > > >   usb: s3c-otg: Tweak the comments
> > > > > > > > > > >   usb: s3c-otg: Rename USB_GADGET_S3C_UDC_OTG* to
> > > > > > > > > > > 
> > > > > > > > > > > USB_GADGET_DWC2_OTG* usb: s3c-otg: Rename struct
> > > > > > > > > > > s3c_plat_otg_data
> > > > > > > > > > > 
> > > > > > > > > > >   usb: s3c-otg: Rename s3c_udc_probe() function
> > > > > > > > > > >   usb: s3c-otg: Rename usb/s3c_udc.h to
> > > > > > > > > > > 
> > > > > > > > > > > usb/dwc2_udc.h
> > > > > > > > > > > 
> > > > > > > > > > >  board/altera/arria5-socdk/socfpga.c
> > > > > > > > > > >  
> > > > > > > > > > > |   6
> > > > > > > > > > > 
> > > > > > > > > > > +-
> > > > > > > > > > > board/altera/cyclone5-socdk/socfpga.c
> > > > > > > > > > > 
> > > > > > > > > > > | 6 +- board/broadcom/bcm28155_ap/bcm28155_ap.c
> > > > > > > > > > > | 
> > > > > > > > > > > |   8 +-
> > > > > > > > > > > 
> > > > > > > > > > > board/denx/mcvevk/socfpga.c
> > > > > > > > > > > 
> > > > > > > > > > > |   6 +-
> > > > > > > > > > > 
> > > > > > > > > > > board/ebv/socrates/socfpga.c
> > > > > > > > > > > 
> > > > > > > > > > > | 6 +- board/samsung/goni/goni.c
> > > > > > > > > > > | 
> > > > > > > > > > > |   6 +-
> > > > > > > > > > > 
> > > > > > > > > > > board/samsung/odroid/odroid.c
> > > > > > > > > > > 
> > > > > > > > > > > |   6 +-
> > > > > > > > > > > 
> > > > > > > > > > > board/samsung/trats/trats.c
> > > > > > > > > > > 
> > > > > > > > > > > | 8 +- board/samsung/trats2/trats2.c
> > > > > > > > > > > | 
> > > > > > > > > > > |   6 +-
> > > > > > > > > > > 
> > > > > > > > > > > board/samsung/universal_c210/universal.c
> > > > > > > > > > > 
> > > > > > > > > > > |   6 +-
> > > > > > > > > > > 
> > > > > > > > > > > board/terasic/sockit/socfpga.c
> > > > > > > > > > > 
> > > > > > > > > > > | 6 +- drivers/usb/gadget/Makefile
> > > > > > > > > > > | 
> > > > > > > > > > > |   4 +-
> > > > > > > > > > > 
> > > > > > > > > > > drivers/usb/gadget/bcm_udc_otg_phy.c
> > > > > > > > > > > 
> > > > > > > > > > > |   6 +- .../usb/gadget/{s3c_udc_otg.c =>
> > > > > > > > > > > 
> > > > > > > > > > > dwc2_udc_otg.c}   | 205
> > > > > > > > > > > 
> > > > > > > > > > > +++-- .../{s3c_udc_otg_phy.c =>
> > > > > > > > > > > dwc2_udc_otg_phy.c}  |  21
> > > > > > > > > > > ++- .../usb/gadget/dwc2_udc_otg_priv.h
> > > > > > > > > > > 
> > > > > > > > > > > | 43 ++--- .../usb/gadget/{regs-otg.h =>
> > > > > > > > > > > 
> > > > > > > > > > > 

Re: [U-Boot] common: cli_hush: Fix up simple typo

[Tom Rini]

On Fri, Dec 04, 2015 at 01:02:11PM -0600, Nishanth Menon wrote:

> Correct the spelling for character..
> 
> Signed-off-by: Nishanth Menon 
> Reviewed-by: Simon Glass 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] spl: mmc: use block device number, not hard-coded 0

[Tom Rini]

On Sat, Dec 05, 2015 at 12:32:28PM -0700, Eric Nelson wrote:

> In order to support boot from multiple devices through board_boot_order,
> it's necessary to use the block number of a device.
> 
> The use of a hard-coded 0 for the device number also creates a need
> to re-order block devices for use in SPL like this:
>   
> http://git.denx.de/?p=u-boot.git;a=blob;f=board/freescale/mx6slevk/mx6slevk.c;hb=HEAD#l195
> 
> Signed-off-by: Eric Nelson 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH] armv7: omap-common: Rework SPL board_mmc_init()

[Tom Rini]

On Mon, Dec 14, 2015 at 11:49:09AM -0500, Tom Rini wrote:

> Since the changes in a1e56cf the way that we had board_mmc_init()
> structured for OMAP parts (so that we always report device 0) are no
> longer functional.  For now, make the case of booting from the second
> device initialize both devices (we have no devices that only have the
> second device as MMC).  A further rework and consolidation of the
> functions should be done at a later date.
> 
> Tested on Beaglebone Black (SD and eMMC boot).
> 
> Reported-by: Vagrant Cascadian 
> Signed-off-by: Tom Rini 

Applied to u-boot/master, thanks!

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Re: [U-Boot] part: fix "part list ... -bootable varname" to use hex

[Tom Rini]

On Wed, Dec 09, 2015 at 09:48:04AM -0700, Stephen Warren wrote:

> From: Stephen Warren 
> 
> Unfortunately U-Boot assumes that almost all numbers are in hex, including
> partition numbers passed to e.g. "load". So, the command "part list mmc 0
> -bootable devplist" should use hex when writing partition numbers into
> $devplist, so they'll be correctly interpreted.
> 
> Change-Id: I9a70b19749643876baadb45efbc3decaef8bfee2
> Fixes: 0798d6fd4191 ("part: Add support for list filtering on bootable 
> partitions")
> Cc: Sjoerd Simons 
> Signed-off-by: Stephen Warren 
> Reviewed-by: Sjoerd Simons 

Applied to u-boot/master, thanks!

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Re: [U-Boot] tools: env: include compiler.h

[Tom Rini]

On Wed, Dec 09, 2015 at 07:15:33AM +, Peter Robinson wrote:

> With gcc 5.2 and later we get a bunch of "error: unknown type name" for
> 'uint8_t', 'uint32_t' and friends.
> 
> Signed-off-by: Peter Robinson 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 3/3] serial: uartlite: Add uartlite to Kconfig

[Thomas Chou]

Hi Michal,

On 2015年12月15日 23:39, Michal Simek wrote:

On 15.12.2015 05:02, Thomas Chou wrote:

Hi Michal,

On 2015年12月14日 23:42, Michal Simek wrote:

On 14.12.2015 15:35, Thomas Chou wrote:

Hi Michal,

On 2015年12月11日 19:54, Michal Simek wrote:

- Move config option out of board file.
- Remove uartlite address from config file

Signed-off-by: Michal Simek 
---

board/xilinx/microblaze-generic/xparameters.h | 4 
configs/microblaze-generic_defconfig  | 1 +
drivers/serial/Kconfig| 7 +++
include/configs/microblaze-generic.h  | 7 +--
4 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/board/xilinx/microblaze-generic/xparameters.h
b/board/xilinx/microblaze-generic/xparameters.h
index 8ba146cb88db..11b3c9a4846e 100644
--- a/board/xilinx/microblaze-generic/xparameters.h
+++ b/board/xilinx/microblaze-generic/xparameters.h
@@ -28,10 +28,6 @@
#define XILINX_TIMER_BASEADDR0x41c0
#define XILINX_TIMER_IRQ0

-/* Uart pheriphery is RS232_Uart */
-#define XILINX_UARTLITE_BASEADDR0x4060
-#define XILINX_UARTLITE_BAUDRATE115200
-
/* IIC pheriphery is IIC_EEPROM */
#define XILINX_IIC_0_BASEADDR0x4080
#define XILINX_IIC_0_FREQ10
diff --git a/configs/microblaze-generic_defconfig
b/configs/microblaze-generic_defconfig
index 5df080b6a87c..9a7bb915466f 100644
--- a/configs/microblaze-generic_defconfig
+++ b/configs/microblaze-generic_defconfig
@@ -9,3 +9,4 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
+CONFIG_XILINX_UARTLITE=y
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index f1e221799b81..ddf49ba9cef3 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -230,4 +230,11 @@ config UNIPHIER_SERIAL
  If you have a UniPhier based board and want to use the on-chip
  serial ports, say Y to this option. If unsure, say N.

+config XILINX_UARTLITE
+bool "Xilinx Uarlite support"
+depends on DM_SERIAL && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
+help
+  If you have a Xilinx based board and want to use the uartlite
+  serial ports, say Y to this option. If unsure, say N.
+
endmenu


Kconfig should be with the driver 1/3. Others are boards related.


It can be. Adding Kconfig fragment can be separate patch out of move to
DM. There is no connection too.
My intention was to show all related changes which are done by this one
step.


Please also make sure the patch series are bisectable.


I am not aware about anything what would caused that this series is not
bisectable. Do you see something like that?


No. Sorry. I didn't find DM and DM_serial in the microblaze repo at 
first. Then I found them in the patches earlier.


Best regards,
Thomas
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