Re: [U-Boot] [PATCH] arm: re-implement proper ISB instruction for ARMv7-A

[Ziyuan Xu]

Hi Tom,


On 2016年07月29日 09:12, Tom Rini wrote:

On Fri, Jul 29, 2016 at 09:06:29AM +0800, Ziyuan Xu wrote:

Hi Tom,

On 2016年07月29日 08:34, Tom Rini wrote:

On Fri, Jul 29, 2016 at 07:34:09AM +0800, Ziyuan Xu wrote:

Hi Tom,

On 2016年07月29日 06:15, Tom Rini wrote:

On Thu, Jul 28, 2016 at 07:03:17PM +0800, Chen-Yu Tsai wrote:

Hi,

On Thu, Jul 28, 2016 at 6:13 PM, Ziyuan Xu  wrote:

For ARMv7-A architecture, the valid ISB instruction is asm volatile("isb").

This patch fixes the U-Boot was stuck in invalidate_dcache_all() before
booting linux kernel, which occurred on rk3288-base development board
such as evb-rk3288, rock2-rk3288. And something output via console like:

=> bootz 0x200
0x0200
ramdisk start = 0x, ramdisk end = 0x
Continuing to boot without FDT
Initial value for argc=3
Final value for argc=3
using: ATAGS

Starting kernel ...

Linux kernel exactly the same way(see arch/arm/include/asm/barrier.h).

Signed-off-by: Ziyuan Xu 
---

  arch/arm/include/asm/system.h | 6 --
  1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 2bdc0be..12d4ba0 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -227,13 +227,15 @@ void __noreturn psci_system_reset(bool smc);
   */
  void save_boot_params_ret(void);

-#define isb() __asm__ __volatile__ ("" : : : "memory")
-
  #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");

  #ifdef __ARM_ARCH_7A__
+#define isb() __asm__ __volatile__ ("isb" : : : "memory")
+
  #define wfi() __asm__ __volatile__ ("wfi" : : : "memory")
  #else
+#define isb() __asm__ __volatile__ ("" : : : "memory")
+
  #define wfi()
  #endif


arch/arm/include/asm/barriers.h already has a proper set of
ISB/DSB macros. Please consider using those instead.

Please fix arch/arm/include/asm/system.h to use the macros found in
barriers.h rather than have their own versions.  Thanks!

If I understand correctly, I can change into as bellow:
#define isb() ISB
How about it?

Well, I'd rather not have ISB and isb, just ISB, which means we might
have to fix other places too.  If that starts looking too huge, we can
do this in steps and just do what you suggested for now and for next
release move everything over.

As I mentioned before, arch/arm/include/asm/barriers.h defined ISB
macro.  If I only want to fix the issue which I hit on rk3288 board,
I just use ISB in arch/arm/include/asm/system.h::set_cr() instead of
isb(). But isb() had been invoked in some places.

I can't verify integrallty after all revision, it involve some
boards and feature. But this does fix for rk3288, if you agree with
me, could you apply it provisionally?:-)

I would really like to try and fix the other possibly latent issues that
we have by not calling a real ISB.  Please try moving towards all places
that need an isb calling the correct one from barriers.h and giving it a
spin on the hardware you have available.
I used ISB instead of isb(), everything works sane on my rockchip rk3288 
boards.:-)
Will you send a patch to fix it and other possibly latent issues? Or 
apply this temporarily?







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Re: [U-Boot] pull request: u-boot-coldfire/master

[Tom Rini]

On Sat, Jul 30, 2016 at 11:25:24PM +0200, Angelo Dureghello wrote:

> Hi Tom,
> 
> my first pull request, hope all is ok.
> If possible these updates are for v2016.09-rc1.
> 
> The following changes since commit 08887ed4505ec14ee94ab32c482dc4dec5ddc1e4
> 
>   ARM: am57xx_evm: Enable QSPI support (2016-07-20 14:22:30 +0530)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-coldfire.git master
> 
> for you to fetch changes up to 5c928d02044345b843202f23540c3765468c1d6f:
> 
> m68k: code reformatting for all start.S files (Sun May 22
> 00:14:29 2016 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] pull request: u-boot-coldfire/master

[Angelo Dureghello]

Hi Tom,

my first pull request, hope all is ok.
If possible these updates are for v2016.09-rc1.

The following changes since commit 08887ed4505ec14ee94ab32c482dc4dec5ddc1e4

  ARM: am57xx_evm: Enable QSPI support (2016-07-20 14:22:30 +0530)

are available in the git repository at:

  git://git.denx.de/u-boot-coldfire.git master

for you to fetch changes up to 5c928d02044345b843202f23540c3765468c1d6f:

m68k: code reformatting for all start.S files (Sun May 22 00:14:29 
2016 +0200)



Angelo Dureghello (1):
   m68k: code reformatting for all start.S files

arch/m68k/cpu/mcf5227x/start.S   | 153 
+++--
 arch/m68k/cpu/mcf523x/start.S| 130 
+---
 arch/m68k/cpu/mcf52x2/start.S| 163 
+
 arch/m68k/cpu/mcf530x/start.S|  73 
+---
 arch/m68k/cpu/mcf532x/start.S| 118 
+-
 arch/m68k/cpu/mcf5445x/start.S   | 185 
++
 arch/m68k/cpu/mcf547x_8x/start.S | 128 
+-

 7 files changed, 449 insertions(+), 501 deletions(-)


Regards,
Angelo
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[U-Boot] [PATCH v2] spi: zynq_spi: Fix infinite looping while xfer

[Lad Prabhakar]

From: "Lad, Prabhakar" 

During spi transfer, for example:
sspi 1:1.0 8 ff

the rx_len values will  be:
rx_len = 0
rx_len = 4294967295

This caused a busy looping during xfer, this patch fixes it
by adding a check while reading the rx fifo

Signed-off-by: Lad, Prabhakar 
Cc: Michal Simek 
Cc: Siva Durga Prasad Paladugu 
Cc: Jagan Teki 
---
 Changes for v2: None
 
 drivers/spi/zynq_spi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index 09ae1be..dd3de27 100644
--- a/drivers/spi/zynq_spi.c
+++ b/drivers/spi/zynq_spi.c
@@ -230,7 +230,7 @@ static int zynq_spi_xfer(struct udevice *dev, unsigned int 
bitlen,
 
/* Read the data from RX FIFO */
status = readl(>isr);
-   while (status & ZYNQ_SPI_IXR_RXNEMPTY_MASK) {
+   while ((status & ZYNQ_SPI_IXR_RXNEMPTY_MASK) && rx_len) {
buf = readl(>rxdr);
if (rx_buf)
*rx_buf++ = buf;
-- 
1.9.1

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[U-Boot] [PATCH v2] armv8: mmu: Detect page table overflow in emergency pt creation

[Alexander Graf]

We create 2 sets of page tables: One for normal operation, one for
emergency (used while modifying the former).

Because the page tables grow dynamically, we have code that checks
for overflow. Unfortunately we didn't adjust the available space
variable while creating the emergency tables, so potentially someone
might run into an overflow there (not seen in real world yet though!).

Fix it by properly adjusting the size as well as the base offset in
emergency page table creation.

Reported-by: York Sun 
Signed-off-by: Alexander Graf 
Reviewed-by: York Sun 

---

v1 -> v2:

  - Remove unnecessary paranthesis
---
 arch/arm/cpu/armv8/cache_v8.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index ac909a1..cd3f6c1 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -380,6 +380,7 @@ void setup_pgtables(void)
 static void setup_all_pgtables(void)
 {
u64 tlb_addr = gd->arch.tlb_addr;
+   u64 tlb_size = gd->arch.tlb_size;
 
/* Reset the fill ptr */
gd->arch.tlb_fillptr = tlb_addr;
@@ -388,10 +389,13 @@ static void setup_all_pgtables(void)
setup_pgtables();
 
/* Create emergency page tables */
+   gd->arch.tlb_size -= (uintptr_t)gd->arch.tlb_fillptr -
+(uintptr_t)gd->arch.tlb_addr;
gd->arch.tlb_addr = gd->arch.tlb_fillptr;
setup_pgtables();
gd->arch.tlb_emerg = gd->arch.tlb_addr;
gd->arch.tlb_addr = tlb_addr;
+   gd->arch.tlb_size = tlb_size;
 }
 
 /* to activate the MMU we need to set up virtual memory */
-- 
1.8.5.6

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Re: [U-Boot] [PATCH] armv8: ls2080a/ls1043a/ls1012a: enable support for booti

[Tom Rini]

On Fri, Jul 29, 2016 at 03:59:18PM -0500, Stuart Yoder wrote:

> The booti command allows booting kernels specifying dtb,
> kernel, and rootfs addresses individually (without needing
> an ITB file), providing more flexibility.
> 
> Signed-off-by: Stuart Yoder 

With v2 of https://patchwork.ozlabs.org/patch/652262/ we shouldn't need
this at all as BOOTI will be enabled by default on ARM64 boards.

-- 
Tom


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[U-Boot] [PATCH v3] sunxi: On newer SoCs use words 1-3 instead of just word 3 from the SID

[Hans de Goede]

It seems that bytes 13-14 of the SID / bytes 1-2 from word 3 of the SID
are always 0 on H3 making it a poor candidate to use as source for the
serialnr / mac-address, and the other non constant words (1 and 2) also
have quite a few bits which are the same for some boards,

This commits switches to using the crc32 of words 1 - 3 to get a
more unique value for the mac-address / serialnr.

Cc: Chen-Yu Tsai 
Cc: Corentin LABBE 
Cc: Amit Singh Tomar 
Signed-off-by: Hans de Goede 
---
Changes in v3:
-Use crc32 instead of ex-or-ing the bytes together
-Use new algorithm on all newer SoCs
-Only check for sid[0] != 0 to capture non initialized sid-s.
Changes in v2:
-ex-or all 3 words together instead of picking a different word
---
 board/sunxi/board.c | 20 +++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index ef3fe26..209fb1c 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -27,6 +27,7 @@
 #endif
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -622,7 +623,24 @@ static void setup_environment(const void *fdt)
int i, ret;
 
ret = sunxi_get_sid(sid);
-   if (ret == 0 && sid[0] != 0 && sid[3] != 0) {
+   if (ret == 0 && sid[0] != 0) {
+   /*
+* The single words 1 - 3 of the SID have quite a few bits
+* which are the same on many models, so we take a crc32
+* of all 3 words, to get a more unique value.
+*
+* Note we only do this on newer SoCs as we cannot change
+* the algorithm on older SoCs since those have been using
+* fixed mac-addresses based on only using word 3 for a
+* long time and changing a fixed mac-address with an
+* u-boot update is not good.
+*/
+#if !defined(CONFIG_MACH_SUN4I) && !defined(CONFIG_MACH_SUN5I) && \
+!defined(CONFIG_MACH_SUN6I) && !defined(CONFIG_MACH_SUN7I) && \
+!defined(CONFIG_MACH_SUN8I_A23) && !defined(CONFIG_MACH_SUN8I_A33)
+   sid[3] = crc32(0, (unsigned char *)[1], 12);
+#endif
+
/* Ensure the NIC specific bytes of the mac are not all 0 */
if ((sid[3] & 0xff) == 0)
sid[3] |= 0x80;
-- 
2.7.4

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Re: [U-Boot] [PATCH v2] sun8i: On H3 Use words 1-3 instead of just word 3 from the SID

[Hans de Goede]

Hi,

On 29-07-16 12:28, Ian Campbell wrote:

On Fri, 2016-07-29 at 11:49 +0200, Hans de Goede wrote:

It seems that bytes 13-14 of the SID / bytes 1-2 from word 3 of the
SID
are always 0 on H3 making it a poor candidate to use as source for
the
serialnr / mac-address, and the other non constant words (1 and 2)
also
have quite a few bits which are the same for some boards,

This commits switches to using words 1 - 3 ex-or-ed together to get a
more unique value for the mac-address / serialnr.

Cc: Chen-Yu Tsai 
Cc: Corentin LABBE 
Cc: Amit Singh Tomar 
Signed-off-by: Hans de Goede 
---
Changes in v2:
-ex-or all 3 words together instead of picking a different word
---
 board/sunxi/board.c | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index ef3fe26..e0734fb 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -623,6 +623,21 @@ static void setup_environment(const void *fdt)

ret = sunxi_get_sid(sid);
if (ret == 0 && sid[0] != 0 && sid[3] != 0) {


Could/should this check be removed now? Or should sid[1]/sid[2] be
included?


Good point, the check is there because some A10 / A20 boards have an
all 0 sid, now that we make sure that the NIC specific bytes of the
mac are not all 0, only checking for sid[0] != 0 should be enough
to capture non initialized sid-s.


+#ifdef CONFIG_MACH_SUN8I_H3

+   /*
+* The single words 1 - 3 of the SID have quite a few bits
+* which are the same on many models on the H3, so we ex-or
+* them together to get a bit more unique value.
+*
+* Note we only do this on the H3 as we cannot change the
+* algorithm on other SoCs since those have been using
+* fixed mac-addresses based on only using word 3 for a
+* a long time and changing a fixed mac-address with an

+* u-boot update is not good.


I wonder if we should invert this, i.e. make it not use this new method
on all existing models. That would mean that all future models will
automatically use this new (IMHO better) scheme instead of requiring it
to be manually added each time (which we are sure to forget to do).


Good point, I'll fix this and the above check for v3.

Regards,

Hans
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