[U-Boot] [PATCH v1] ARM: at91/dt: sama5d2: Fix the warning from dtc

2016-09-18 Thread Wenyou Yang
Fix the warning from dtc like,
---8<
Warning (unit_address_vs_reg): Node 
/ahb/apb/pmc@f0014000/periph64ck/sdmmc0_hclk has a reg or ranges property, but 
no unit name
--->8

Signed-off-by: Wenyou Yang 
---

 arch/arm/dts/sama5d2.dtsi | 140 +++---
 1 file changed, 70 insertions(+), 70 deletions(-)

diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index 19feb66..a881d9e 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -79,7 +79,7 @@
#clock-cells = <0>;
};
 
-   plla: pllack {
+   plla: pllack@0 {
compatible = "atmel,sama5d3-clk-pll";
#clock-cells = <0>;
clocks = <>;
@@ -146,17 +146,17 @@
interrupt-parent = <>;
clocks = <>, <>, <>, 
<>;
 
-   prog0: prog0 {
+   prog0: prog@0 {
#clock-cells = <0>;
reg = <0>;
};
 
-   prog1: prog1 {
+   prog1: prog@1 {
#clock-cells = <0>;
reg = <1>;
};
 
-   prog2: prog2 {
+   prog2: prog@2 {
#clock-cells = <0>;
reg = <2>;
};
@@ -167,49 +167,49 @@
#address-cells = <1>;
#size-cells = <0>;
 
-   ddrck: ddrck {
+   ddrck: ddrck@2 {
#clock-cells = <0>;
reg = <2>;
clocks = <>;
};
 
-   lcdck: lcdck {
+   lcdck: lcdck@3 {
#clock-cells = <0>;
reg = <3>;
clocks = <>;
};
 
-   uhpck: uhpck {
+   uhpck: uhpck@6 {
#clock-cells = <0>;
reg = <6>;
clocks = <>;
};
 
-   udpck: udpck {
+   udpck: udpck@7 {
#clock-cells = <0>;
reg = <7>;
clocks = <>;
};
 
-   pck0: pck0 {
+   pck0: pck0@8 {
#clock-cells = <0>;
reg = <8>;
clocks = <>;
};
 
-   pck1: pck1 {
+   pck1: pck1@9 {
#clock-cells = <0>;
reg = <9>;
clocks = <>;
};
 
-   pck2: pck2 {
+   pck2: pck2@10 {
#clock-cells = <0>;
reg = <10>;
clocks = <>;
};
 
-   iscck: iscck {
+   iscck: iscck@18 {
#clock-cells = <0>;
reg = <18>;
clocks = <>;
@@ -222,203 +222,203 @@
#size-cells = <0>;
clocks = <>;
 
-   macb0_clk: macb0_clk {
+

Re: [U-Boot] Building u-boot.imx and SPL simultaneously

2016-09-18 Thread Stefano Babic
Hi Peng,

On 18/09/2016 08:50, Peng Fan wrote:
> Hi,
> 
> On Sat, Sep 10, 2016 at 04:40:47PM -0700, Eric Nelson wrote:
>> Hi Tom,
>>
>> On 09/06/2016 07:15 AM, Tom Rini wrote:
>>> On Tue, Sep 06, 2016 at 07:00:56AM -0700, Eric Nelson wrote:
 On 09/06/2016 06:40 AM, Tom Rini wrote:
> On Fri, Sep 02, 2016 at 10:53:58PM +0200, Petr Kulhavy wrote:
>>
>> 
>>
>
> Would it be possible to implement having the next stage also be sent via
> imx_usb_loader?  ie there's examples today of doing u-boot.imx + kernel
> + initrd via imx_usb_loader, so what would be needed for SPL +
> u-boot.img (+ kenrel + initrd) via imx_usb_loader?  Thanks!
>

 SPL+u-boot.img could be bundled into a single image through the
 use of plugins which would require:

 - updates to mkimage to support plugins, and
 - Makefile updates to produce a third output (u-boot.imx?), and
 - an update to SPL startup on i.MX to check for the plugin flag
 and return to the boot ROM after startup (instead of loading
 U-Boot) if set.

>>
>> It appears that the mkimage support is present in a patch against v2015.04:
>>
>> http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/tools/mkimage.c?h=imx_v2015.04_4.1.15_1.0.0_ga=3d9e1681
>>
>> Peng, can you up-stream this?
> Hi Stefano,
> 
> I would like see your points on this. I tried to uptream plugin before, but 
> rejected,
> Since more people would like to see this in, do you agree to let plugin 
> supported
> in mainline?
> 

Yes - I see a general agreement to get in mainline, and thanks for the
effort to push it.

Best regards,
Stefano

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Re: [U-Boot] [PATCH v2 01/17] imx: iomux-v3: Fix build error with snvs base

2016-09-18 Thread Peng Fan
Hi Jagan,
On Sat, Sep 17, 2016 at 02:18:33AM +0530, Jagan Teki wrote:
>snvs base is added only for i.MX6ULL but the code is
>added for common, so firing build error while compiling
>other i.MX6 SOC's
>
>Issue observed with the below patch
>"imx: mx6ull: Update memory map address"
>(sha1: e8eac1b5b3a98a06426bc4867c03c38329841e5c)
>
>Build log:
>  CC  arch/arm/imx-common/iomux-v3.o
>arch/arm/imx-common/iomux-v3.c: In function 'imx_iomux_v3_setup_pad':
>arch/arm/imx-common/iomux-v3.c:56:19: error: 'IOMUXC_SNVS_BASE_ADDR' 
>undeclared (first use in this function)
>base = (void *)IOMUXC_SNVS_BASE_ADDR;

CONFIG_IOMUX_LPSR is only needed for i.MX7 and i.MX6ULL now.
CONFIG_IOMUX_LPSR is defined in your configuration?
I did not meet such build error.

Regards,
Peng.
>
>Cc: Stefano Babic 
>Cc: Peng Fan 
>Cc: Michael Trimarchi 
>Signed-off-by: Jagan Teki 
>---
> arch/arm/imx-common/iomux-v3.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c
>index 78f667e..efb884c 100644
>--- a/arch/arm/imx-common/iomux-v3.c
>+++ b/arch/arm/imx-common/iomux-v3.c
>@@ -50,7 +50,7 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
>   if (sel_input_ofs)
>   sel_input_ofs += IOMUX_LPSR_SEL_INPUT_OFS;
>   }
>-#else
>+#elif defined(CONFIG_MX6ULL)
>   if (is_mx6ull()) {
>   if (lpsr == IOMUX_CONFIG_LPSR) {
>   base = (void *)IOMUXC_SNVS_BASE_ADDR;
>-- 
>2.7.4
>
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[U-Boot] [PATCH v10] dm: at91: Add driver model support for the spi driver

2016-09-18 Thread Wenyou Yang
Add driver model support while retaining the existing legacy code.
This allows the driver to support boards that have converted to
driver model as well as those that have not.

Signed-off-by: Wenyou Yang 
Reviewed-by: Simon Glass 
Acked-by: Stephen Warren 
---

Changes in v10:
 - Add Acked-by tag.

Changes in v9:
 - Due to the peripheral clock driver improvement, remove the
   unneccessary clock calling.

Changes in v8:
 - Fix compile error for AVR32.

Changes in v7:
 - Move gpio_request_list_by_name() to _probe(), remove
   *_ofdata_to_platdata().

Changes in v6:
 - Remove the two flash related options.

Changes in v5:
 - Change clk_client.h -> clk.h to adapt to clk API conversion.

Changes in v4:
 - Collect Reviewed-by tag.
 - Update the clk API based on [PATCH] clk: convert API to match
   reset/mailbox fstyle (http://patchwork.ozlabs.org/patch/625342/).
 - Remove check on dev_get_parent() return.
 - Fixed the return value, -ENODEV->-EINVAL.
 - Retain #include  line.

Changes in v3:
 - Remove redundant log print.

Changes in v2:
 - Add clock support.

 drivers/spi/Kconfig |   7 ++
 drivers/spi/atmel_spi.c | 283 
 2 files changed, 290 insertions(+)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index aca385d..16ed231 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -32,6 +32,13 @@ config ATH79_SPI
  uses driver model and requires a device tree binding to operate.
  please refer to doc/device-tree-bindings/spi/spi-ath79.txt.
 
+config ATMEL_SPI
+   bool "Atmel SPI driver"
+   depends on ARCH_AT91
+   help
+ Enable the Atmel SPI driver. This driver can be used to access
+ the SPI Flash, such as AT25DF321.
+
 config CADENCE_QSPI
bool "Cadence QSPI driver"
help
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index ed6278b..190f58b 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -4,6 +4,9 @@
  * SPDX-License-Identifier:GPL-2.0+
  */
 #include 
+#include 
+#include 
+#include 
 #include 
 #include 
 
@@ -11,9 +14,19 @@
 
 #include 
 #include 
+#ifdef CONFIG_DM_SPI
+#include 
+#endif
+#ifdef CONFIG_DM_GPIO
+#include 
+#endif
 
 #include "atmel_spi.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifndef CONFIG_DM_SPI
+
 static int spi_has_wdrbt(struct atmel_spi_slave *slave)
 {
unsigned int ver;
@@ -209,3 +222,273 @@ out:
 
return 0;
 }
+
+#else
+
+#define MAX_CS_COUNT   4
+
+struct atmel_spi_platdata {
+   struct at91_spi *regs;
+};
+
+struct atmel_spi_priv {
+   unsigned int freq;  /* Default frequency */
+   unsigned int mode;
+   ulong bus_clk_rate;
+   struct gpio_desc cs_gpios[MAX_CS_COUNT];
+};
+
+static int atmel_spi_claim_bus(struct udevice *dev)
+{
+   struct udevice *bus = dev_get_parent(dev);
+   struct atmel_spi_platdata *bus_plat = dev_get_platdata(bus);
+   struct atmel_spi_priv *priv = dev_get_priv(bus);
+   struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
+   struct at91_spi *reg_base = bus_plat->regs;
+   u32 cs = slave_plat->cs;
+   u32 freq = priv->freq;
+   u32 scbr, csrx, mode;
+
+   scbr = (priv->bus_clk_rate + freq - 1) / freq;
+   if (scbr > ATMEL_SPI_CSRx_SCBR_MAX)
+   return -EINVAL;
+
+   if (scbr < 1)
+   scbr = 1;
+
+   csrx = ATMEL_SPI_CSRx_SCBR(scbr);
+   csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8);
+
+   if (!(priv->mode & SPI_CPHA))
+   csrx |= ATMEL_SPI_CSRx_NCPHA;
+   if (priv->mode & SPI_CPOL)
+   csrx |= ATMEL_SPI_CSRx_CPOL;
+
+   writel(csrx, _base->csr[cs]);
+
+   mode = ATMEL_SPI_MR_MSTR |
+  ATMEL_SPI_MR_MODFDIS |
+  ATMEL_SPI_MR_WDRBT |
+  ATMEL_SPI_MR_PCS(~(1 << cs));
+
+   writel(mode, _base->mr);
+
+   writel(ATMEL_SPI_CR_SPIEN, _base->cr);
+
+   return 0;
+}
+
+static int atmel_spi_release_bus(struct udevice *dev)
+{
+   struct udevice *bus = dev_get_parent(dev);
+   struct atmel_spi_platdata *bus_plat = dev_get_platdata(bus);
+
+   writel(ATMEL_SPI_CR_SPIDIS, _plat->regs->cr);
+
+   return 0;
+}
+
+static void atmel_spi_cs_activate(struct udevice *dev)
+{
+   struct udevice *bus = dev_get_parent(dev);
+   struct atmel_spi_priv *priv = dev_get_priv(bus);
+   struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
+   u32 cs = slave_plat->cs;
+
+   dm_gpio_set_value(>cs_gpios[cs], 0);
+}
+
+static void atmel_spi_cs_deactivate(struct udevice *dev)
+{
+   struct udevice *bus = dev_get_parent(dev);
+   struct atmel_spi_priv *priv = dev_get_priv(bus);
+   struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
+   u32 cs = slave_plat->cs;
+
+   dm_gpio_set_value(>cs_gpios[cs], 1);
+}
+
+static int atmel_spi_xfer(struct udevice 

Re: [U-Boot] [PATCH v1 2/7] clk: at91: Improve the clock implementation

2016-09-18 Thread Wenyou.Yang
Hi Stephen, 

Thank you for your review, and detailed comments.

The version 2 has been sent out, please give your advices.

> -Original Message-
> From: Stephen Warren [mailto:swar...@wwwdotorg.org]
> Sent: 2016年9月14日 3:34
> To: Wenyou Yang - A41535 
> Cc: U-Boot Mailing List ; Stephen Warren
> 
> Subject: Re: [U-Boot] [PATCH v1 2/7] clk: at91: Improve the clock 
> implementation
> 
> On 09/12/2016 07:54 PM, Wenyou Yang wrote:
> > For the peripheral clock, provide the clock ops for the clock
> > provider, such as spi0_clk. The .of_xlate is to get the clk->id, the
> > .enable is to enable the spi0 peripheral clock, the .get_rate is to
> > get the clock frequency.
> >
> > The driver for periph32ck node is responsible for recursively binding
> > its children as clk devices, not provide the clock ops.
> >
> > So do the generated clock and system clock.
> 
> > diff --git a/drivers/clk/at91/clk-generated.c
> > b/drivers/clk/at91/clk-generated.c
> 
> > +/**
> > + * generated_clk_bind() - for the generated clock driver
> > + * Recursively bind its children as clk devices.
> > + *
> > + * @return: 0 on success, or negative error code on failure  */
> > +static int generated_clk_bind(struct udevice *dev)
> ... (code to enumerate/instantiate all child DT nodes)
> > +}
> > +
> > +static const struct udevice_id generated_clk_match[] = {
> > +   { .compatible = "atmel,sama5d2-clk-generated" },
> > +   {}
> > +};
> > +
> > +U_BOOT_DRIVER(generated_clk) = {
> > +   .name = "generated-clk",
> > +   .id = UCLASS_CLK,
> > +   .of_match = generated_clk_match,
> > +   .bind = generated_clk_bind,
> > +};
> 
> This driver shouldn't be UCLASS_CLK, and can't be without any clock ops
> implemented. It appears to be for another DT node that solely exists to house
> various sub-nodes which are the actual clock providers. I believe you should
> make this UCLASS_MISC. I guess you need to keep the custom bind function,
> since all the child nodes that it enumerates explicitly don't have a 
> compatible value,
> so you can't rely on e.g. the default UCLASS_SIMPLE_BUS bind function to
> enumerate them.
> 
> BTW, while reading ./arch/arm/dts/sama5d2.dtsi, I noticed:
> 
> sdmmc0_gclk: sdmmc0_gclk {
>   #clock-cells = <0>;
>   reg = <31>;
> };
> 
> Doesn't dtc complain about that? The node has a reg property, yet there is no 
> unit
> address in the node name to match it. Instead, that node should be:

Yes, there are dtc complains like this,

"Warning (unit_address_vs_reg): Node 
/ahb/apb/pmc@f0014000/periph64ck/sdmmc0_hclk has a reg or ranges property, but 
no unit name"

I will send a patches to fix this warning.

Others are accepted too.

> 
> sdmmc0_gclk: sdmmc0_gclk@31 {
>   #clock-cells = <0>;
>   reg = <31>;
> };
> 
> > +static int generic_clk_of_xlate(struct clk *clk,
> > +  struct fdtdec_phandle_args *args)
> >  {
> > -   struct pmc_platdata *plat = dev_get_platdata(clk->dev);
> > +   int periph;
> 
> The following should likely be added here:
> 
>  if (args->args_count) {
>  debug("Invaild args_count: %d\n", args->args_count);
>  return -EINVAL;
>  }
> 
> > +   periph = fdtdec_get_uint(gd->fdt_blob, clk->dev->of_offset, "reg", -1);
> > +   if (periph < 0)
> > +   return -EINVAL;
> > +
> > +   clk->id = periph;
> 
> I guess that's OK. of_xlate is really intended to parse/process the clocks 
> property
> in the client DT node. However, I suppose parsing the referenced DT node is
> probably OK too. Has this Atmel clock binding, and a similar clock driver
> implementation (including custom of_xlate) been reviewed for inclusion in the
> Linux kernel? I'd be curious if the same technique was/wasn't allowed there.
> 
> > +static int generic_clk_probe(struct udevice *dev)
> ...
> > +   dev = dev_get_parent(dev);
> > +   dev = dev_get_parent(dev);
> 
> That line is duplicated.
> 
> > diff --git a/drivers/clk/at91/clk-peripheral.c
> > b/drivers/clk/at91/clk-peripheral.c
> 
> The same comments as above all apply to this file too.
> 
> > +static ulong periph_get_rate(struct clk *clk)
> >  {
> > +   struct udevice *dev;
> > +   struct clk clk_dev;
> > +   int ret;
> >
> > +   dev = dev_get_parent(clk->dev);
> > +   ret = clk_request(dev, _dev);
> 
> You haven't filled in clk_dev.id here. That needs to be filled in before 
> calling
> clk_request().
> 
> > +   if (ret)
> > +   return ret;
> > +
> > +   ret = clk_get_by_index(dev, 0, _dev);
> 
> This over-writes everything in clk_dev, thus making the call to
> clk_request() above pointless.
> 
> > +   if (ret)
> > +   return ret;
> > +
> > +   return clk_get_rate(_dev);
> 
> You need to call clk_free(_dev) before returning. This comment applies to
> generated_clk_get_rate()/generic_clk_get_rate() too (in the previous file),
> although that problem existed before this patch.
> 
> > +static int 

[U-Boot] [PATCH v2 7/7] mmc: atmel_sdhci: Remove unneccessary clock calling

2016-09-18 Thread Wenyou Yang
Due to the peripheral and generated clock driver improvement,
remove the unneccessary clock calling.

Signed-off-by: Wenyou Yang 
---

Changes in v2: None

 drivers/mmc/atmel_sdhci.c | 27 ++-
 1 file changed, 2 insertions(+), 25 deletions(-)

diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c
index dd6bd33..437a652 100644
--- a/drivers/mmc/atmel_sdhci.c
+++ b/drivers/mmc/atmel_sdhci.c
@@ -51,29 +51,6 @@ struct atmel_sdhci_plat {
struct mmc mmc;
 };
 
-static int atmel_sdhci_get_clk(struct udevice *dev, int index, struct clk *clk)
-{
-   struct udevice *dev_clk;
-   int periph, ret;
-
-   ret = clk_get_by_index(dev, index, clk);
-   if (ret)
-   return ret;
-
-   periph = fdtdec_get_uint(gd->fdt_blob, clk->dev->of_offset, "reg", -1);
-   if (periph < 0)
-   return -EINVAL;
-
-   dev_clk = dev_get_parent(clk->dev);
-   ret = clk_request(dev_clk, clk);
-   if (ret)
-   return ret;
-
-   clk->id = periph;
-
-   return 0;
-}
-
 static int atmel_sdhci_probe(struct udevice *dev)
 {
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
@@ -86,7 +63,7 @@ static int atmel_sdhci_probe(struct udevice *dev)
struct clk clk;
int ret;
 
-   ret = atmel_sdhci_get_clk(dev, 0, );
+   ret = clk_get_by_index(dev, 0, );
if (ret)
return ret;
 
@@ -107,7 +84,7 @@ static int atmel_sdhci_probe(struct udevice *dev)
clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >> SDHCI_CLOCK_MUL_SHIFT;
gck_rate = clk_base * 100 * (clk_mul + 1);
 
-   ret = atmel_sdhci_get_clk(dev, 1, );
+   ret = clk_get_by_index(dev, 1, );
if (ret)
return ret;
 
-- 
2.7.4

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[U-Boot] [PATCH v2 3/7] gpio: atmel_pio4: Remove unneccessary clock calling

2016-09-18 Thread Wenyou Yang
Due to the peripheral clock driver improvement, remove the
unneccessary clock calling.

Signed-off-by: Wenyou Yang 
Acked-by: Stephen Warren 
---

Changes in v2:
 - Add Acked-by tag for gpio/atmel_pio4.

 drivers/gpio/atmel_pio4.c | 12 
 1 file changed, 12 deletions(-)

diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c
index 7adea88..cb90b02 100644
--- a/drivers/gpio/atmel_pio4.c
+++ b/drivers/gpio/atmel_pio4.c
@@ -284,27 +284,15 @@ static int atmel_pio4_probe(struct udevice *dev)
struct atmel_pio4_platdata *plat = dev_get_platdata(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct atmel_pioctrl_data *pioctrl_data;
-   struct udevice *dev_clk;
struct clk clk;
fdt_addr_t addr_base;
u32 nbanks;
-   int periph;
int ret;
 
ret = clk_get_by_index(dev, 0, );
if (ret)
return ret;
 
-   periph = fdtdec_get_uint(gd->fdt_blob, clk.dev->of_offset, "reg", -1);
-   if (periph < 0)
-   return -EINVAL;
-
-   dev_clk = dev_get_parent(clk.dev);
-   ret = clk_request(dev_clk, );
-   if (ret)
-   return ret;
-
-   clk.id = periph;
ret = clk_enable();
if (ret)
return ret;
-- 
2.7.4

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[U-Boot] [PATCH v2 6/7] usb: ehci-atmel: Remove unneccessary clock calling

2016-09-18 Thread Wenyou Yang
Due to the peripheral clock driver improvement, remove the
unneccessary clock calling.

Signed-off-by: Wenyou Yang 
---

Changes in v2: None

 drivers/usb/host/ehci-atmel.c | 15 ---
 1 file changed, 15 deletions(-)

diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c
index d65bbe9..6cb5286 100644
--- a/drivers/usb/host/ehci-atmel.c
+++ b/drivers/usb/host/ehci-atmel.c
@@ -56,9 +56,7 @@ struct ehci_atmel_priv {
 
 static int ehci_atmel_enable_clk(struct udevice *dev)
 {
-   struct udevice *dev_clk;
struct clk clk;
-   int periph;
int ret;
 
ret = clk_get_by_index(dev, 0, );
@@ -73,19 +71,6 @@ static int ehci_atmel_enable_clk(struct udevice *dev)
if (ret)
return -EINVAL;
 
-   periph = fdtdec_get_uint(gd->fdt_blob, clk.dev->of_offset, "reg", -1);
-   if (periph < 0)
-   return -EINVAL;
-
-   dev_clk = dev_get_parent(clk.dev);
-   if (!dev_clk)
-   return -ENODEV;
-
-   ret = clk_request(dev_clk, );
-   if (ret)
-   return ret;
-
-   clk.id = periph;
ret = clk_enable();
if (ret)
return ret;
-- 
2.7.4

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[U-Boot] [PATCH v2 2/7] clk: at91: Improve the clock implementation

2016-09-18 Thread Wenyou Yang
For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.

The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.

So do the generated clock and system clock.

Signed-off-by: Wenyou Yang 
---

Changes in v2:
 - For the periph32ck, periph64ck, gck, systemck nodes, they aren't
   the clock providers, are to house various actual clock providers,
   use UCLASS_MISC, instead of UCLASS_CLK.
 - For *_of_xlate(), add argument check.
 - Fix the implementation of the *_get_rate().
 - Use documentation-wise variables for *_clk_probe().
 - Remove the duplicated code, use the common functions.

 drivers/clk/at91/Kconfig  |  1 +
 drivers/clk/at91/clk-generated.c  | 92 +--
 drivers/clk/at91/clk-peripheral.c | 83 ++-
 drivers/clk/at91/clk-system.c | 62 +-
 drivers/clk/at91/pmc.c| 62 +++---
 drivers/clk/at91/pmc.h|  5 ++-
 6 files changed, 222 insertions(+), 83 deletions(-)

diff --git a/drivers/clk/at91/Kconfig b/drivers/clk/at91/Kconfig
index 10050d8..904ed48 100644
--- a/drivers/clk/at91/Kconfig
+++ b/drivers/clk/at91/Kconfig
@@ -1,6 +1,7 @@
 config CLK_AT91
bool "AT91 clock drivers"
depends on CLK
+   select MISC
help
  This option is used to enable the AT91 clock driver.
  The driver supports the AT91 clock generator, including
diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c
index f6164cc..48d7222 100644
--- a/drivers/clk/at91/clk-generated.c
+++ b/drivers/clk/at91/clk-generated.c
@@ -17,15 +17,47 @@ DECLARE_GLOBAL_DATA_PTR;
 #define GENERATED_SOURCE_MAX   6
 #define GENERATED_MAX_DIV  255
 
-struct generated_clk_priv {
+/**
+ * generated_clk_bind() - for the generated clock driver
+ * Recursively bind its children as clk devices.
+ *
+ * @return: 0 on success, or negative error code on failure
+ */
+static int generated_clk_bind(struct udevice *dev)
+{
+   return at91_clk_sub_device_bind(dev, "generic-clk");
+}
+
+static const struct udevice_id generated_clk_match[] = {
+   { .compatible = "atmel,sama5d2-clk-generated" },
+   {}
+};
+
+U_BOOT_DRIVER(generated_clk) = {
+   .name = "generated-clk",
+   .id = UCLASS_MISC,
+   .of_match = generated_clk_match,
+   .bind = generated_clk_bind,
+};
+
+/*-*/
+
+struct generic_clk_priv {
u32 num_parents;
 };
 
-static ulong generated_clk_get_rate(struct clk *clk)
+static int generic_clk_of_xlate(struct clk *clk,
+  struct fdtdec_phandle_args *args)
+{
+   return at91_clk_of_xlate(clk, args);
+}
+
+static ulong generic_clk_get_rate(struct clk *clk)
 {
struct pmc_platdata *plat = dev_get_platdata(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
struct clk parent;
+   ulong clk_rate;
u32 tmp, gckdiv;
u8 parent_id;
int ret;
@@ -36,18 +68,22 @@ static ulong generated_clk_get_rate(struct clk *clk)
AT91_PMC_PCR_GCKCSS_MASK;
gckdiv = (tmp >> AT91_PMC_PCR_GCKDIV_OFFSET) & AT91_PMC_PCR_GCKDIV_MASK;
 
-   ret = clk_get_by_index(clk->dev, parent_id, );
+   ret = clk_get_by_index(dev_get_parent(clk->dev), parent_id, );
if (ret)
return 0;
 
-   return clk_get_rate() / (gckdiv + 1);
+   clk_rate = clk_get_rate() / (gckdiv + 1);
+
+   clk_free();
+
+   return clk_rate;
 }
 
-static ulong generated_clk_set_rate(struct clk *clk, ulong rate)
+static ulong generic_clk_set_rate(struct clk *clk, ulong rate)
 {
struct pmc_platdata *plat = dev_get_platdata(clk->dev);
struct at91_pmc *pmc = plat->reg_base;
-   struct generated_clk_priv *priv = dev_get_priv(clk->dev);
+   struct generic_clk_priv *priv = dev_get_priv(clk->dev);
struct clk parent, best_parent;
ulong tmp_rate, best_rate = rate, parent_rate;
int tmp_diff, best_diff = -1;
@@ -58,7 +94,7 @@ static ulong generated_clk_set_rate(struct clk *clk, ulong 
rate)
int ret;
 
for (i = 0; i < priv->num_parents; i++) {
-   ret = clk_get_by_index(clk->dev, i, );
+   ret = clk_get_by_index(dev_get_parent(clk->dev), i, );
if (ret)
return ret;
 
@@ -111,18 +147,20 @@ static ulong generated_clk_set_rate(struct clk *clk, 
ulong rate)
return 0;
 }
 
-static struct clk_ops generated_clk_ops = {
-   .get_rate = generated_clk_get_rate,
-   .set_rate = generated_clk_set_rate,
+static struct clk_ops generic_clk_ops = {
+   .of_xlate = generic_clk_of_xlate,
+   .get_rate = 

[U-Boot] [PATCH v2 5/7] i2c: at91_i2c: Change error return -ENODEV to -EINVAL

2016-09-18 Thread Wenyou Yang
Change the error return value -ENODEV from to -EINVAL for more
reasonable.

Signed-off-by: Wenyou Yang 
---

Changes in v2: None

 drivers/i2c/at91_i2c.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/at91_i2c.c b/drivers/i2c/at91_i2c.c
index 73f29e3..472420b 100644
--- a/drivers/i2c/at91_i2c.c
+++ b/drivers/i2c/at91_i2c.c
@@ -190,7 +190,7 @@ static int at91_i2c_enable_clk(struct udevice *dev)
 
clk_rate = clk_get_rate();
if (!clk_rate)
-   return -ENODEV;
+   return -EINVAL;
 
bus->bus_clk_rate = clk_rate;
 
-- 
2.7.4

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[U-Boot] [PATCH v2 4/7] i2c: at91_i2c: Remove unneccessary clock calling

2016-09-18 Thread Wenyou Yang
Due to the peripheral clock driver improvement, remove the
unneccessary clock calling.

Signed-off-by: Wenyou Yang 
---

Changes in v2: None

 drivers/i2c/at91_i2c.c | 16 
 1 file changed, 16 deletions(-)

diff --git a/drivers/i2c/at91_i2c.c b/drivers/i2c/at91_i2c.c
index 8e9c3ad..73f29e3 100644
--- a/drivers/i2c/at91_i2c.c
+++ b/drivers/i2c/at91_i2c.c
@@ -176,34 +176,18 @@ static void at91_calc_i2c_clock(struct udevice *dev, int 
i2c_clk)
 static int at91_i2c_enable_clk(struct udevice *dev)
 {
struct at91_i2c_bus *bus = dev_get_priv(dev);
-   struct udevice *dev_clk;
struct clk clk;
ulong clk_rate;
-   int periph;
int ret;
 
ret = clk_get_by_index(dev, 0, );
if (ret)
return -EINVAL;
 
-   periph = fdtdec_get_uint(gd->fdt_blob, clk.dev->of_offset, "reg", -1);
-   if (periph < 0)
-   return -EINVAL;
-
-   dev_clk = dev_get_parent(clk.dev);
-   ret = clk_request(dev_clk, );
-   if (ret)
-   return ret;
-
-   clk.id = periph;
ret = clk_enable();
if (ret)
return ret;
 
-   ret = clk_get_by_index(dev_clk, 0, );
-   if (ret)
-   return ret;
-
clk_rate = clk_get_rate();
if (!clk_rate)
return -ENODEV;
-- 
2.7.4

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[U-Boot] [PATCH v2 0/7] clk: at91: Improve the clock implementation

2016-09-18 Thread Wenyou Yang
Add the clock ops for such as spi0_clk, which is the real clock
provider, instead of periph32ck, which only recursively bind its
children as clk devices. Also update the clocks called in the
drivers.

Changes in v2:
 - Add Acked-by tag.
 - For the periph32ck, periph64ck, gck, systemck nodes, they aren't
   the clock providers, are to house various actual clock providers,
   use UCLASS_MISC, instead of UCLASS_CLK.
 - For *_of_xlate(), add argument check.
 - Fix the implementation of the *_get_rate().
 - Use documentation-wise variables for *_clk_probe().
 - Remove the duplicated code, use the common functions.
 - Add Acked-by tag for gpio/atmel_pio4.

Wenyou Yang (7):
  clk: clk-uclass: Assign clk->dev before call .of_xlate
  clk: at91: Improve the clock implementation
  gpio: atmel_pio4: Remove unneccessary clock calling
  i2c: at91_i2c: Remove unneccessary clock calling
  i2c: at91_i2c: Change error return -ENODEV to -EINVAL
  usb: ehci-atmel: Remove unneccessary clock calling
  mmc: atmel_sdhci: Remove unneccessary clock calling

 drivers/clk/at91/Kconfig  |  1 +
 drivers/clk/at91/clk-generated.c  | 92 +--
 drivers/clk/at91/clk-peripheral.c | 83 ++-
 drivers/clk/at91/clk-system.c | 62 +-
 drivers/clk/at91/pmc.c| 62 +++---
 drivers/clk/at91/pmc.h|  5 ++-
 drivers/clk/clk-uclass.c  |  3 ++
 drivers/gpio/atmel_pio4.c | 12 -
 drivers/i2c/at91_i2c.c| 18 +---
 drivers/mmc/atmel_sdhci.c | 27 +---
 drivers/usb/host/ehci-atmel.c | 15 ---
 11 files changed, 228 insertions(+), 152 deletions(-)

-- 
2.7.4

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[U-Boot] [PATCH v2 1/7] clk: clk-uclass: Assign clk->dev before call .of_xlate

2016-09-18 Thread Wenyou Yang
In order to make clk->dev available in ops->of_xlate() to get the
clock ID from the 'reg' property of the clock node, assign the
clk->dev before calling ops->of_xlate().

Signed-off-by: Wenyou Yang 
Acked-by: Stephen Warren 
---

Changes in v2:
 - Add Acked-by tag.

 drivers/clk/clk-uclass.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 4d78e3f..4a3248b 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -80,6 +80,9 @@ int clk_get_by_index(struct udevice *dev, int index, struct 
clk *clk)
  __func__, ret);
return ret;
}
+
+   clk->dev = dev_clk;
+
ops = clk_dev_ops(dev_clk);
 
if (ops->of_xlate)
-- 
2.7.4

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Re: [U-Boot] Building u-boot.imx and SPL simultaneously

2016-09-18 Thread Peng Fan
Hi,

On Sat, Sep 10, 2016 at 04:40:47PM -0700, Eric Nelson wrote:
>Hi Tom,
>
>On 09/06/2016 07:15 AM, Tom Rini wrote:
>> On Tue, Sep 06, 2016 at 07:00:56AM -0700, Eric Nelson wrote:
>>> On 09/06/2016 06:40 AM, Tom Rini wrote:
 On Fri, Sep 02, 2016 at 10:53:58PM +0200, Petr Kulhavy wrote:
>
>
>

 Would it be possible to implement having the next stage also be sent via
 imx_usb_loader?  ie there's examples today of doing u-boot.imx + kernel
 + initrd via imx_usb_loader, so what would be needed for SPL +
 u-boot.img (+ kenrel + initrd) via imx_usb_loader?  Thanks!

>>>
>>> SPL+u-boot.img could be bundled into a single image through the
>>> use of plugins which would require:
>>>
>>> - updates to mkimage to support plugins, and
>>> - Makefile updates to produce a third output (u-boot.imx?), and
>>> - an update to SPL startup on i.MX to check for the plugin flag
>>> and return to the boot ROM after startup (instead of loading
>>> U-Boot) if set.
>>>
>
>It appears that the mkimage support is present in a patch against v2015.04:
>
>http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/tools/mkimage.c?h=imx_v2015.04_4.1.15_1.0.0_ga=3d9e1681
>
>Peng, can you up-stream this?
Hi Stefano,

I would like see your points on this. I tried to uptream plugin before, but 
rejected,
Since more people would like to see this in, do you agree to let plugin 
supported
in mainline?

Thanks,
Peng.

>
>>> Troy implemented the key bits back in 2012, and I provided
>>> some links here:
>>>
>>> http://lists.denx.de/pipermail/u-boot/2016-June/258784.html
>> 
>> Ah yes, this.  I really would like to see this come in as I think it'll
>> be required to really drop the old style u-boot.imx binaries for cases
>> like factory programming.  As well as the use cases outlined before too
>> about supporting multiple boards more easily.
>> 
>
>I'd also like to see this get pulled into main-line, and I just ran across
>another reason for supporting plugins.
>
>The i.MX7 LPSR mode resumes from a "power-off" state by going through
>the boot ROM, and it's up to the code loaded by the boot ROM to recognize
>the condition, take DRAM out of self-refresh and jump back into IRAM:
>
>http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/board/freescale/mx7d_12x12_lpddr3_arm2/plugin.S?h=imx_v2015.04_4.1.15_1.0.0_ga=47f82f3978cda0c1fd637adcd9e8aa070f616493
>
>Some additional commentary is in this post on NXP community:
>
>https://community.nxp.com/thread/434057#comment-830672
>
>For this use case, SPL will be too heavyweight and plugin support is
>needed.
>
>Regards,
>
>
>Eric
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