Re: [U-Boot] [RFC PATCH 3/3] spl: add support to booting with ATF

2017-01-05 Thread Michal Simek
Hi,

On 6.1.2017 08:09, Kever Yang wrote:
> Hi Michal,
> 
> Thanks for your comments.
> 
> On 01/02/2017 11:05 PM, Michal Simek wrote:
>> On 29.12.2016 11:25, Kever Yang wrote:
>>> ATF(ARM Trust Firmware) is used by ARM arch64 SoCs, find more infomation
>>> about ATF at:
>>>
>>> SPL is consider as BL2 in ATF, it needs to load other part of ATF binary
>> SPL replaces BL2 in ATF
> 
> OK, will follow your comment in next patch.
>>
>>> like BL31, BL32, SCP-BL30, and BL33(U-Boot). And needs to prepare the
>>> parameter for BL31 which including entry and image information for all
>>> other images. Then the SPL handle PC to BL31 with the parameter, the
>>> BL31 will do the rest of work and at last get into U-Boot(BL33).
>> But the main question for this is how do load that images and in which
>> format. It means I would think that you will introduce fit format which
>> contain BL33(U-Boot), BL32(secure os) and BL31(ATF) and SPL will be able
>> to load all of them.
> 
> Yes, I use FIT format to contain BL33 and BL32 and SPL load all of them.

Do you have some logs? I didn't check the latest code but IIRC it was
possible to handle one image and dt not several images which has to be
supported. There is also loadables section in fit which can help with this.

>>
>> If you look at zynqmp I did a small trick where I consider case that
>> with ATF it is OS boot where kernel is ATF and dtb is full u-boot to get
>> it boot.
> 
> This is a good idea, and it look fine for support ATF in SPL in local
> source code,
> but it will be better if we have an official support for ATF, right?

Definitely having support just for ATF is much better solution than what
I use in ZynqMP.

> 
>>
>> If you adopt fit format then I expect SPL will be able to remember which
>> part is where and based on that fill structure for ATF.
>> Then SPL_ATF_TEXT_BASE address is not needed because it will be read
>> from fit format.
> 
> Yes, you are right, SPL_ATF_TEXT_BASE is not a must, we gen get it from
> fit.

ok.

> 
>>
>>
>>
>>> Signed-off-by: Kever Yang 
>>> ---
>>>
>>>   common/spl/Kconfig   |  14 +++
>>>   common/spl/Makefile  |   1 +
>>>   common/spl/spl.c |   4 +
>>>   common/spl/spl_atf.c |  91 
>>>   include/atf_common.h | 295
>>> +++
>>>   include/spl.h|   1 +
>>>   6 files changed, 406 insertions(+)
>>>   create mode 100644 common/spl/spl_atf.c
>>>   create mode 100644 include/atf_common.h
>>>
>>> diff --git a/common/spl/Kconfig b/common/spl/Kconfig
>>> index cba51f5..1bb4360 100644
>>> --- a/common/spl/Kconfig
>>> +++ b/common/spl/Kconfig
>>> @@ -577,6 +577,20 @@ config SPL_YMODEM_SUPPORT
>>> means of transmitting U-Boot over a serial line for using in
>>> SPL,
>>> with a checksum to ensure correctness.
>>>   +config SPL_ATF_SUPPORT
>>> +bool "Support ARM trust firmware"
>>> +depends on SPL
>>> +help
>>> +  ATF(ARM Trust Firmware) is component for ARM arch64 which need to
>>> +  load by SPL(consider as BL2 in ATF).
>>> +  More detail at:
>>> https://github.com/ARM-software/arm-trusted-firmware
>>> +
>>> +config SPL_ATF_TEXT_BASE
>>> +depends on SPL_ATF_SUPPORT
>>> +hex "ATF TEXT BASE addr"
>>> +help
>>> +  This is the base address in memory for ATF text and entry point.
>>> +
>>>   config TPL_ENV_SUPPORT
>>>   bool "Support an environment"
>>>   depends on TPL
>>> diff --git a/common/spl/Makefile b/common/spl/Makefile
>>> index ed02635..620ae90 100644
>>> --- a/common/spl/Makefile
>>> +++ b/common/spl/Makefile
>>> @@ -20,6 +20,7 @@ endif
>>>   obj-$(CONFIG_SPL_UBI) += spl_ubi.o
>>>   obj-$(CONFIG_SPL_NET_SUPPORT) += spl_net.o
>>>   obj-$(CONFIG_SPL_MMC_SUPPORT) += spl_mmc.o
>>> +obj-$(CONFIG_SPL_ATF_SUPPORT) += spl_atf.o
>>>   obj-$(CONFIG_SPL_USB_SUPPORT) += spl_usb.o
>>>   obj-$(CONFIG_SPL_FAT_SUPPORT) += spl_fat.o
>>>   obj-$(CONFIG_SPL_EXT_SUPPORT) += spl_ext.o
>>> diff --git a/common/spl/spl.c b/common/spl/spl.c
>>> index 1729034..7daf7bd 100644
>>> --- a/common/spl/spl.c
>>> +++ b/common/spl/spl.c
>>> @@ -390,6 +390,10 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
>>> gd->malloc_ptr / 1024);
>>>   #endif
>>>   +#ifdef CONFIG_SPL_ATF_SUPPORT
>>> +bl31_entry();
>>> +#endif
>>> +
>>>   debug("loaded - jumping to U-Boot...");
>>>   spl_board_prepare_for_boot();
>>>   jump_to_image_no_args(_image);
>>> diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
>>> new file mode 100644
>>> index 000..cf23b7a
>>> --- /dev/null
>>> +++ b/common/spl/spl_atf.c
>>> @@ -0,0 +1,91 @@
>>> +/*
>>> + * Copyright (C) 2016 Rockchip Electronic Co.,Ltd
>>> + * Written by Kever Yang 
>>> + *
>>> + * origin from arm-trust-firmware
>>> + * plat/arm/common/arm_bl2_setup.c
>>> + * SPDX-License-Identifier: GPL-2.0+
>> this is not based on gpl file that's why license should be different.
> 
> Sorry, I do not get what your 

Re: [U-Boot] [RFC PATCH 0/3] arm64: rk3399: enable SPL with ATF support

2017-01-05 Thread Kever Yang

Hi Michal,

On 01/02/2017 11:05 PM, Michal Simek wrote:

Hi,

separation of rk3399 SPL from ATF SPL would be worth.


Thanks for your comment, this may help my rk3399 SPL patches get accept 
faster.

I will do it after people get back from holiday and send me other comments.

Thanks,
- Kever


Thanks,
Michal

On 29.12.2016 11:25, Kever Yang wrote:

RK3399 SPL is not enable bacause of the lack of ATF support in SPL,
after port some source code from ATF, I manage to enable the support for
ATF in SPL. This patch set depends on some patch for SPL support multi
binary in FIT which is from Andre.

The patch of sdram controller is still not clean, because I want to get
comments from upstream.I port this driver from coreboot, and I don't
want to make much change on it. The rk3399 dram controller has many registers
to config, I want to make them directly used by driver instead of parse
and copy them one by one from dts.

Another part of comment is welcome for the implementation of spl_atf.c
and the entry in spl.c



Kever Yang (3):
   arm64: rk3399: add SPL support
   arm64: rk3399: add ddr controller driver
   spl: add support to booting with ATF

  arch/arm/Kconfig   |1 +
  arch/arm/dts/rk3399.dtsi   |   24 +
  arch/arm/include/asm/arch-rockchip/grf_rk3399.h|  118 ++
  arch/arm/include/asm/arch-rockchip/sdram_rk3399.h  |  188 +++
  arch/arm/mach-rockchip/Kconfig |2 +
  arch/arm/mach-rockchip/Makefile|1 +
  arch/arm/mach-rockchip/rk3399-board-spl.c  |  157 ++
  arch/arm/mach-rockchip/rk3399/Makefile |1 +
  arch/arm/mach-rockchip/rk3399/sdram-lpddr3-4GB.inc | 1565 
  arch/arm/mach-rockchip/rk3399/sdram_rk3399.c   | 1121 ++
  common/spl/Kconfig |   14 +
  common/spl/Makefile|1 +
  common/spl/spl.c   |4 +
  common/spl/spl_atf.c   |   91 ++
  configs/evb-rk3399_defconfig   |   17 +
  drivers/clk/rockchip/clk_rk3399.c  |   42 +-
  drivers/pinctrl/rockchip/pinctrl_rk3399.c  |  106 --
  include/atf_common.h   |  295 
  include/configs/rk3399_common.h|   11 +
  include/dt-bindings/clock/rk3399-cru.h |   16 +-
  include/spl.h  |1 +
  21 files changed, 3663 insertions(+), 113 deletions(-)
  create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
  create mode 100644 arch/arm/mach-rockchip/rk3399-board-spl.c
  create mode 100644 arch/arm/mach-rockchip/rk3399/sdram-lpddr3-4GB.inc
  create mode 100644 arch/arm/mach-rockchip/rk3399/sdram_rk3399.c
  create mode 100644 common/spl/spl_atf.c
  create mode 100644 include/atf_common.h








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Re: [U-Boot] [RFC PATCH 3/3] spl: add support to booting with ATF

2017-01-05 Thread Kever Yang

Hi Michal,

Thanks for your comments.

On 01/02/2017 11:05 PM, Michal Simek wrote:

On 29.12.2016 11:25, Kever Yang wrote:

ATF(ARM Trust Firmware) is used by ARM arch64 SoCs, find more infomation
about ATF at:

SPL is consider as BL2 in ATF, it needs to load other part of ATF binary

SPL replaces BL2 in ATF


OK, will follow your comment in next patch.



like BL31, BL32, SCP-BL30, and BL33(U-Boot). And needs to prepare the
parameter for BL31 which including entry and image information for all
other images. Then the SPL handle PC to BL31 with the parameter, the
BL31 will do the rest of work and at last get into U-Boot(BL33).

But the main question for this is how do load that images and in which
format. It means I would think that you will introduce fit format which
contain BL33(U-Boot), BL32(secure os) and BL31(ATF) and SPL will be able
to load all of them.


Yes, I use FIT format to contain BL33 and BL32 and SPL load all of them.


If you look at zynqmp I did a small trick where I consider case that
with ATF it is OS boot where kernel is ATF and dtb is full u-boot to get
it boot.


This is a good idea, and it look fine for support ATF in SPL in local 
source code,

but it will be better if we have an official support for ATF, right?



If you adopt fit format then I expect SPL will be able to remember which
part is where and based on that fill structure for ATF.
Then SPL_ATF_TEXT_BASE address is not needed because it will be read
from fit format.


Yes, you are right, SPL_ATF_TEXT_BASE is not a must, we gen get it from fit.






Signed-off-by: Kever Yang 
---

  common/spl/Kconfig   |  14 +++
  common/spl/Makefile  |   1 +
  common/spl/spl.c |   4 +
  common/spl/spl_atf.c |  91 
  include/atf_common.h | 295 +++
  include/spl.h|   1 +
  6 files changed, 406 insertions(+)
  create mode 100644 common/spl/spl_atf.c
  create mode 100644 include/atf_common.h

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index cba51f5..1bb4360 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -577,6 +577,20 @@ config SPL_YMODEM_SUPPORT
  means of transmitting U-Boot over a serial line for using in SPL,
  with a checksum to ensure correctness.
  
+config SPL_ATF_SUPPORT

+   bool "Support ARM trust firmware"
+   depends on SPL
+   help
+ ATF(ARM Trust Firmware) is component for ARM arch64 which need to
+ load by SPL(consider as BL2 in ATF).
+ More detail at: https://github.com/ARM-software/arm-trusted-firmware
+
+config SPL_ATF_TEXT_BASE
+   depends on SPL_ATF_SUPPORT
+   hex "ATF TEXT BASE addr"
+   help
+ This is the base address in memory for ATF text and entry point.
+
  config TPL_ENV_SUPPORT
bool "Support an environment"
depends on TPL
diff --git a/common/spl/Makefile b/common/spl/Makefile
index ed02635..620ae90 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -20,6 +20,7 @@ endif
  obj-$(CONFIG_SPL_UBI) += spl_ubi.o
  obj-$(CONFIG_SPL_NET_SUPPORT) += spl_net.o
  obj-$(CONFIG_SPL_MMC_SUPPORT) += spl_mmc.o
+obj-$(CONFIG_SPL_ATF_SUPPORT) += spl_atf.o
  obj-$(CONFIG_SPL_USB_SUPPORT) += spl_usb.o
  obj-$(CONFIG_SPL_FAT_SUPPORT) += spl_fat.o
  obj-$(CONFIG_SPL_EXT_SUPPORT) += spl_ext.o
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 1729034..7daf7bd 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -390,6 +390,10 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
  gd->malloc_ptr / 1024);
  #endif
  
+#ifdef CONFIG_SPL_ATF_SUPPORT

+   bl31_entry();
+#endif
+
debug("loaded - jumping to U-Boot...");
spl_board_prepare_for_boot();
jump_to_image_no_args(_image);
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
new file mode 100644
index 000..cf23b7a
--- /dev/null
+++ b/common/spl/spl_atf.c
@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2016 Rockchip Electronic Co.,Ltd
+ * Written by Kever Yang 
+ *
+ * origin from arm-trust-firmware
+ * plat/arm/common/arm_bl2_setup.c
+ * SPDX-License-Identifier: GPL-2.0+

this is not based on gpl file that's why license should be different.


Sorry, I do not get what your mean, I'm not good at license policy,
ARM ATF use its own license, what should I do for license when I use code
from ATF?





+ */
+
+#include 
+#include 
+#include 
+#include 
+
+static struct bl2_to_bl31_params_mem_t bl31_params_mem;
+static struct bl31_params_t *bl2_to_bl31_params;
+
+/***
+ * This function assigns a pointer to the memory that the platform has kept
+ * aside to pass platform specific and trusted firmware related information
+ * to BL31. This memory is allocated by allocating memory to
+ * bl2_to_bl31_params_mem_t structure which is a superset of all the
+ * structure whose information is passed to BL31
+ * NOTE: This 

[U-Boot] [PATCH v3 3/3] LS1046ARDB: Add QSPI Secure Boot target

2017-01-05 Thread Sumit Garg
Add QSPI Secure Boot target. Also enable sec init.

Signed-off-by: Vinitha Pillai 
Signed-off-by: Sumit Garg 
---

Changes in v3:
Changes in comment style.

Changes in v2:
Split patches logically from 2 to 3.

 board/freescale/ls1046ardb/MAINTAINERS|  4 
 board/freescale/ls1046ardb/ls1046ardb.c   | 19 ++
 configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 28 +++
 include/configs/ls1046ardb.h  |  2 ++
 4 files changed, 53 insertions(+)
 create mode 100644 configs/ls1046ardb_qspi_SECURE_BOOT_defconfig

diff --git a/board/freescale/ls1046ardb/MAINTAINERS 
b/board/freescale/ls1046ardb/MAINTAINERS
index ff42bef..758ff9d 100644
--- a/board/freescale/ls1046ardb/MAINTAINERS
+++ b/board/freescale/ls1046ardb/MAINTAINERS
@@ -7,3 +7,7 @@ F:  include/configs/ls1046ardb.h
 F: configs/ls1046ardb_qspi_defconfig
 F: configs/ls1046ardb_sdcard_defconfig
 F: configs/ls1046ardb_emmc_defconfig
+
+M: Sumit Garg 
+S: Maintained
+F: configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls1046ardb/ls1046ardb.c 
b/board/freescale/ls1046ardb/ls1046ardb.c
index 585c807..6fadea1 100644
--- a/board/freescale/ls1046ardb/ls1046ardb.c
+++ b/board/freescale/ls1046ardb/ls1046ardb.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include "cpld.h"
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -77,6 +78,24 @@ int board_init(void)
enable_layerscape_ns_access();
 #endif
 
+#ifdef CONFIG_SECURE_BOOT
+   /*
+* In case of Secure Boot, the IBR configures the SMMU
+* to allow only Secure transactions.
+* SMMU must be reset in bypass mode.
+* Set the ClientPD bit and Clear the USFCFG Bit
+*/
+   u32 val;
+   val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+   out_le32(SMMU_SCR0, val);
+   val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+   out_le32(SMMU_NSCR0, val);
+#endif
+
+#ifdef CONFIG_FSL_CAAM
+   sec_init();
+#endif
+
 #ifdef CONFIG_FSL_LS_PPA
ppa_init();
 #endif
diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig 
b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
new file mode 100644
index 000..a28c98b
--- /dev/null
+++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
@@ -0,0 +1,28 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1046ARDB=y
+CONFIG_QSPI_AHB_INIT=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_QSPI_BOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_SPI_FLASH=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_QSPI=y
+CONFIG_RSA=y
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 2fe8fc1..afa580e 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -234,4 +234,6 @@
"7e80.flash:16m(nand_uboot)," \
"48m(nand_kernel),448m(nand_free)"
 
+#include 
+
 #endif /* __LS1046ARDB_H__ */
-- 
1.8.1.4

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[U-Boot] [PATCH v3 0/3] LS1046A secure boot target addition

2017-01-05 Thread Sumit Garg
The patch-set does the following:

1. Add NOR secure boot target on ls1046aqds platform.
2. Add QSPI secure boot target on ls1046ardb platform.

Changes in v3:
Changes in comment style.

Changes in v2:
Split patches logically from 2 to 3.

Sumit Garg (3):
  SECURE_BOOT: Enable chain of trust on LS1046A platform
  LS1046AQDS: Add NOR Secure Boot Target
  LS1046ARDB: Add QSPI Secure Boot target

 arch/arm/include/asm/arch-fsl-layerscape/config.h |  2 +-
 arch/arm/include/asm/fsl_secure_boot.h| 20 
 board/freescale/ls1046aqds/MAINTAINERS|  4 
 board/freescale/ls1046aqds/ls1046aqds.c   | 19 +++
 board/freescale/ls1046ardb/MAINTAINERS|  4 
 board/freescale/ls1046ardb/ls1046ardb.c   | 19 +++
 configs/ls1046aqds_SECURE_BOOT_defconfig  | 29 +++
 configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 28 ++
 include/configs/ls1046ardb.h  |  2 ++
 9 files changed, 121 insertions(+), 6 deletions(-)
 create mode 100644 configs/ls1046aqds_SECURE_BOOT_defconfig
 create mode 100644 configs/ls1046ardb_qspi_SECURE_BOOT_defconfig

-- 
1.8.1.4

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[U-Boot] [PATCH v3 1/3] SECURE_BOOT: Enable chain of trust on LS1046A platform

2017-01-05 Thread Sumit Garg
Define bootscript and its header addresses for QSPI target. Also
define PPA header address to enable PPA validation.

Signed-off-by: Vinitha Pillai 
Signed-off-by: Sumit Garg 
---

Changes in v3:
Changes in comment style.

Changes in v2:
Split patches logically from 2 to 3.

 arch/arm/include/asm/arch-fsl-layerscape/config.h |  2 +-
 arch/arm/include/asm/fsl_secure_boot.h| 20 +++-
 2 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h 
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 6073d44..dd5ce9d 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -175,7 +175,7 @@
 
 #define CONFIG_SYS_FSL_IFC_BE
 #define CONFIG_SYS_FSL_SFP_VER_3_2
-#define CONFIG_SYS_FSL_SNVS_LE
+#define CONFIG_SYS_FSL_SEC_MON_BE
 #define CONFIG_SYS_FSL_SFP_BE
 #define CONFIG_SYS_FSL_SRK_LE
 #define CONFIG_KEY_REVOCATION
diff --git a/arch/arm/include/asm/fsl_secure_boot.h 
b/arch/arm/include/asm/fsl_secure_boot.h
index 4525287..b270c96 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -59,9 +59,10 @@
 
 #endif
 
-#if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A)
-/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit
- * Similiarly for LS2080
+#if defined(CONFIG_FSL_LAYERSCAPE)
+/*
+ * For fsl layerscape based platforms, ESBC image Address in Header
+ * is 64 bit.
  */
 #define CONFIG_ESBC_ADDR_64BIT
 #endif
@@ -103,12 +104,19 @@
 #define CONFIG_BS_ADDR_DEVICE  0x0840
 #define CONFIG_BS_HDR_SIZE 0x0010
 #define CONFIG_BS_SIZE 0x0008
-#else
+#elif defined(CONFIG_QSPI_BOOT)
+#ifdef CONFIG_ARCH_LS1046A
+#define CONFIG_BS_HDR_ADDR_DEVICE  0x4078
+#define CONFIG_BS_ADDR_DEVICE  0x4080
+#endif
+#define CONFIG_BS_HDR_SIZE 0x2000
+#define CONFIG_BS_SIZE 0x1000
+#else /* Default NOR Boot */
 #define CONFIG_BS_HDR_ADDR_DEVICE  0x600a
 #define CONFIG_BS_ADDR_DEVICE  0x6006
 #define CONFIG_BS_HDR_SIZE 0x2000
 #define CONFIG_BS_SIZE 0x1000
-#endif /* #ifdef CONFIG_SD_BOOT */
+#endif
 #define CONFIG_BS_HDR_ADDR_RAM 0x8100
 #define CONFIG_BS_ADDR_RAM 0x8102
 #endif
@@ -125,6 +133,8 @@
 #ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
 #ifdef CONFIG_LS1043A
 #define CONFIG_SYS_LS_PPA_ESBC_ADDR0x600c
+#elif defined(CONFIG_ARCH_LS1046A)
+#define CONFIG_SYS_LS_PPA_ESBC_ADDR 0x4074
 #endif
 #else
 #error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
-- 
1.8.1.4

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[U-Boot] [PATCH v3 2/3] LS1046AQDS: Add NOR Secure Boot Target

2017-01-05 Thread Sumit Garg
Add NOR secure boot target. Also enable sec init.

Signed-off-by: Vinitha Pillai 
Signed-off-by: Sumit Garg 
---

Changes in v3:
Changes in comment style.

Changes in v2:
Split patches logically from 2 to 3.

 board/freescale/ls1046aqds/MAINTAINERS   |  4 
 board/freescale/ls1046aqds/ls1046aqds.c  | 19 +++
 configs/ls1046aqds_SECURE_BOOT_defconfig | 29 +
 3 files changed, 52 insertions(+)
 create mode 100644 configs/ls1046aqds_SECURE_BOOT_defconfig

diff --git a/board/freescale/ls1046aqds/MAINTAINERS 
b/board/freescale/ls1046aqds/MAINTAINERS
index b4549ae..6737d55 100644
--- a/board/freescale/ls1046aqds/MAINTAINERS
+++ b/board/freescale/ls1046aqds/MAINTAINERS
@@ -8,3 +8,7 @@ F:  configs/ls1046aqds_nand_defconfig
 F: configs/ls1046aqds_sdcard_ifc_defconfig
 F: configs/ls1046aqds_sdcard_qspi_defconfig
 F: configs/ls1046aqds_qspi_defconfig
+
+M: Sumit Garg 
+S: Maintained
+F: configs/ls1046aqds_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c 
b/board/freescale/ls1046aqds/ls1046aqds.c
index 552365b..405b20a 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "../common/vid.h"
@@ -260,6 +261,24 @@ int board_init(void)
if (adjust_vdd(0))
printf("Warning: Adjusting core voltage failed.\n");
 
+#ifdef CONFIG_SECURE_BOOT
+   /*
+* In case of Secure Boot, the IBR configures the SMMU
+* to allow only Secure transactions.
+* SMMU must be reset in bypass mode.
+* Set the ClientPD bit and Clear the USFCFG Bit
+*/
+   u32 val;
+   val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+   out_le32(SMMU_SCR0, val);
+   val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
+   out_le32(SMMU_NSCR0, val);
+#endif
+
+#ifdef CONFIG_FSL_CAAM
+   sec_init();
+#endif
+
return 0;
 }
 
diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig 
b/configs/ls1046aqds_SECURE_BOOT_defconfig
new file mode 100644
index 000..9831f75
--- /dev/null
+++ b/configs/ls1046aqds_SECURE_BOOT_defconfig
@@ -0,0 +1,29 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1046AQDS=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_BOOTDELAY=10
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_SPI_FLASH=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_DSPI=y
+CONFIG_RSA=y
-- 
1.8.1.4

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Re: [U-Boot] usb start hangs

2017-01-05 Thread york sun
On 01/05/2017 06:19 PM, Marek Vasut wrote:
> On 01/06/2017 03:13 AM, Tony O'Brien wrote:
>> Hi -
>>
>>
>> We recently updated our U-Boot release to v2016.11 and now our USB devices 
>> don't work.  When usb start is executed with a device inserted it hangs at 
>> 'scanning bus 0 for devices...' and doesn't recover.  Our product uses an 
>> NXP T2081 and I can reproduce this issue on the T2080RDB development board 
>> using the tip of U-Boot.  For testing I am using both an EMTEC 16GB USB 
>> thumb drive and an Edimax Fast Ethernet adapter.  The code always hangs at 
>> drivers/usb/host/ehci-hcd.c:557 in ehci_submit_async, just before the call 
>> to handshake.
>>
>>
>> I have traced the issue to 'Commit cb1629f91a48 powerpc: Disable flush or 
>> invalidate dcache by range for some SoCs', which is prior to the v2016.07 
>> release.  Commit ac337168ad81 mentioned in this patch removes the original 
>> empty functions for the MPC85xx (and others), allowing the functions to be 
>> used, but I don't know how they would have worked before this.
>>
>>
>> Either reverting cb1629f91a48 or adding '|| defined(MPC85xx) ' to the #if 
>> statements makes usb work again.
>>
>>
>> diff --git a/arch/powerpc/lib/ppccache.S b/arch/powerpc/lib/ppccache.S
>> index 66cf02dbd0..ad28c7c369 100644
>> --- a/arch/powerpc/lib/ppccache.S
>> +++ b/arch/powerpc/lib/ppccache.S
>> @@ -65,7 +65,7 @@ ppcSync:
>>  * flush_dcache_range(unsigned long start, unsigned long stop)
>>  */
>> _GLOBAL(flush_dcache_range)
>> -#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
>> +#if defined(CONFIG_4xx) || defined(CONFIG_MPC85xx) || 
>> defined(CONFIG_MPC86xx)
>>li  r5,L1_CACHE_BYTES-1
>>andcr3,r3,r5
>>subfr4,r3,r4
>> @@ -89,7 +89,7 @@ _GLOBAL(flush_dcache_range)
>>  * invalidate_dcache_range(unsigned long start, unsigned long stop)
>>  */
>> _GLOBAL(invalidate_dcache_range)
>> -#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
>> +#if defined(CONFIG_4xx) || defined(CONFIG_MPC85xx) || 
>> defined(CONFIG_MPC86xx)
>>li  r5,L1_CACHE_BYTES-1
>>andcr3,r3,r5
>>subfr4,r3,r4
>>
>> Do you have any thoughts on this before I submit the patch?
>
> Seems like the right thing to do, but I'd like York to double-check this.
>

Tony,

I put in commit cb1629f91a48 for a very similar reason. Those flushing 
functions were no-op for 85xx. After commit ac337168a, the extra 
flushing made things worse. I don't quite remember which drivers broke 
but I had to exclude 85xx from those function. The code looks correct 
though. Without further information, I cannot reject your idea to enable 
these functions for 85xx. But I am afraid we will see something broken 
again.

York
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[U-Boot] [PATCH 3/4] ARM: at91: sama5: add SoC configs to Kconfig

2017-01-05 Thread Wenyou Yang
To remove the SoCs options such as SAMA5D2, SAMA5D3 and SAMA5D4
from CONFIG_SYS_EXTRA_OPTIONS which is deprecated. Add these SoC
configs to Kconfig.

Signed-off-by: Wenyou Yang 
---

 arch/arm/mach-at91/Kconfig | 28 
 1 file changed, 20 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 5cefeb429b..631566ec1b 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -3,6 +3,18 @@ if ARCH_AT91
 config AT91FAMILY
def_bool y
 
+config SAMA5D2
+   bool
+   select CPU_V7
+
+config SAMA5D3
+   bool
+   select CPU_V7
+
+config SAMA5D4
+   bool
+   select CPU_V7
+
 choice
prompt "Atmel AT91 board select"
optional
@@ -84,37 +96,37 @@ config TARGET_AT91SAM9X5EK
 
 config TARGET_SAMA5D2_PTC
bool "SAMA5D2 PTC board"
-   select CPU_V7
+   select SAMA5D2
select SUPPORT_SPL
 
 config TARGET_SAMA5D2_XPLAINED
bool "SAMA5D2 Xplained board"
-   select CPU_V7
+   select SAMA5D2
select SUPPORT_SPL
 
 config TARGET_SAMA5D3_XPLAINED
bool "SAMA5D3 Xplained board"
-   select CPU_V7
+   select SAMA5D3
select SUPPORT_SPL
 
 config TARGET_SAMA5D3XEK
bool "SAMA5D3X-EK board"
-   select CPU_V7
+   select SAMA5D3
select SUPPORT_SPL
 
 config TARGET_SAMA5D4_XPLAINED
bool "SAMA5D4 Xplained board"
-   select CPU_V7
+   select SAMA5D4
select SUPPORT_SPL
 
 config TARGET_SAMA5D4EK
bool "SAMA5D4 Evaluation Kit"
-   select CPU_V7
+   select SAMA5D4
select SUPPORT_SPL
 
 config TARGET_MA5D4EVK
bool "DENX MA5D4EVK Evaluation Kit"
-   select CPU_V7
+   select SAMA5D4
select SUPPORT_SPL
 
 config TARGET_MEESC
@@ -150,7 +162,7 @@ config TARGET_SMARTWEB
 
 config TARGET_VINCO
bool "Support VINCO"
-   select CPU_V7
+   select SAMA5D4
select SUPPORT_SPL
 
 endchoice
-- 
2.11.0

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[U-Boot] [PATCH 4/4] defconfig: sama5: remove SoCs from CONFIG_SYS_EXTRA_OPTIONS

2017-01-05 Thread Wenyou Yang
The CONFIG_SYS_EXTRA_OPTIONS is deprecated, and the SoC options
such as SAMA5D2, SAMA5D3 and SAMA5D4 are defined as config
in Kconfig, update the defconfig file, remove these options.

Signed-off-by: Wenyou Yang 
---

 configs/ma5d4evk_defconfig   |  1 -
 configs/sama5d2_ptc_nandflash_defconfig  |  2 +-
 configs/sama5d2_ptc_spiflash_defconfig   |  2 +-
 configs/sama5d2_xplained_mmc_defconfig   | 10 --
 configs/sama5d2_xplained_spiflash_defconfig  |  8 +++-
 configs/sama5d36ek_cmp_mmc_defconfig |  2 +-
 configs/sama5d36ek_cmp_nandflash_defconfig   |  2 +-
 configs/sama5d36ek_cmp_spiflash_defconfig|  2 +-
 configs/sama5d3_xplained_mmc_defconfig   |  2 +-
 configs/sama5d3_xplained_nandflash_defconfig |  2 +-
 configs/sama5d3xek_mmc_defconfig |  2 +-
 configs/sama5d3xek_nandflash_defconfig   |  2 +-
 configs/sama5d3xek_spiflash_defconfig|  2 +-
 configs/sama5d4_xplained_mmc_defconfig   |  2 +-
 configs/sama5d4_xplained_nandflash_defconfig |  2 +-
 configs/sama5d4_xplained_spiflash_defconfig  |  2 +-
 configs/sama5d4ek_mmc_defconfig  |  3 +--
 configs/sama5d4ek_nandflash_defconfig|  3 +--
 configs/sama5d4ek_spiflash_defconfig |  3 +--
 configs/vinco_defconfig  |  2 +-
 20 files changed, 24 insertions(+), 32 deletions(-)

diff --git a/configs/ma5d4evk_defconfig b/configs/ma5d4evk_defconfig
index e2a68fb160..cf2e87a247 100644
--- a/configs/ma5d4evk_defconfig
+++ b/configs/ma5d4evk_defconfig
@@ -8,7 +8,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4"
 CONFIG_BOOTDELAY=3
 CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/sama5d2_ptc_nandflash_defconfig 
b/configs/sama5d2_ptc_nandflash_defconfig
index 04bd12b3ad..4d4c71fbd5 100644
--- a/configs/sama5d2_ptc_nandflash_defconfig
+++ b/configs/sama5d2_ptc_nandflash_defconfig
@@ -6,7 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_NANDFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_USE_NANDFLASH"
 CONFIG_BOOTDELAY=3
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL=y
diff --git a/configs/sama5d2_ptc_spiflash_defconfig 
b/configs/sama5d2_ptc_spiflash_defconfig
index 1e8825e535..6e0f27165f 100644
--- a/configs/sama5d2_ptc_spiflash_defconfig
+++ b/configs/sama5d2_ptc_spiflash_defconfig
@@ -7,7 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_SERIALFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_USE_SERIALFLASH"
 CONFIG_BOOTDELAY=3
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL=y
diff --git a/configs/sama5d2_xplained_mmc_defconfig 
b/configs/sama5d2_xplained_mmc_defconfig
index 8a786f1a06..15429639e6 100644
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -8,11 +8,9 @@ CONFIG_SPL_FAT_SUPPORT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_DM_GPIO=y
-CONFIG_DM_SERIAL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
 CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_USE_MMC"
 CONFIG_BOOTDELAY=3
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL=y
@@ -34,24 +32,24 @@ CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_DM=y
 CONFIG_SPL_DM=y
-CONFIG_BLK=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_CLK_AT91=y
 CONFIG_AT91_UTMI=y
 CONFIG_AT91_H32MX=y
 CONFIG_AT91_GENERIC_CLK=y
+CONFIG_DM_GPIO=y
 CONFIG_ATMEL_PIO4=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_AT91=y
 CONFIG_DM_MMC=y
-CONFIG_DM_MMC_OPS=y
 CONFIG_ATMEL_SDHCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART=y
 CONFIG_DEBUG_UART_ATMEL=y
 CONFIG_DEBUG_UART_BASE=0xf802
@@ -62,8 +60,8 @@ CONFIG_ATMEL_USART=y
 CONFIG_DM_SPI=y
 CONFIG_ATMEL_SPI=y
 CONFIG_USB=y
-CONFIG_USB_STORAGE=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
diff --git a/configs/sama5d2_xplained_spiflash_defconfig 
b/configs/sama5d2_xplained_spiflash_defconfig
index 51594e71f7..d1367585fa 100644
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -7,11 +7,9 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DM_GPIO=y
-CONFIG_DM_SERIAL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
 CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_SERIALFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SYS_USE_SERIALFLASH"
 CONFIG_BOOTDELAY=3
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL=y
@@ -33,24 +31,24 @@ CONFIG_OF_CONTROL=y
 

[U-Boot] [PATCH 2/4] ARM: at91: sama5: remove hardware.h included in board config

2017-01-05 Thread Wenyou Yang
As said in READRE.kconfig, include/configs/*.h will be removed
after all options are switched to Kconfig.
As the first step, remove the follow line from
include/configs/at91-sama5_common.h.

 #include 

Signed-off-by: Wenyou Yang 
---

 arch/arm/mach-at91/atmel_sfr.c  |  1 +
 arch/arm/mach-at91/matrix.c |  1 +
 drivers/pinctrl/pinctrl-at91.c  |  1 +
 include/configs/at91-sama5_common.h |  2 --
 include/configs/ma5d4evk.h  |  9 ++---
 include/configs/sama5d2_ptc.h   | 11 +++
 include/configs/sama5d2_xplained.h  |  5 -
 include/configs/sama5d3_xplained.h  | 13 -
 include/configs/sama5d3xek.h| 11 +++
 include/configs/sama5d4_xplained.h  |  7 +--
 include/configs/sama5d4ek.h |  7 +--
 include/configs/vinco.h | 11 +++
 12 files changed, 52 insertions(+), 27 deletions(-)

diff --git a/arch/arm/mach-at91/atmel_sfr.c b/arch/arm/mach-at91/atmel_sfr.c
index adf44c6a94..d595ba8836 100644
--- a/arch/arm/mach-at91/atmel_sfr.c
+++ b/arch/arm/mach-at91/atmel_sfr.c
@@ -6,6 +6,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 
diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c
index 57d72700d3..08659c87d4 100644
--- a/arch/arm/mach-at91/matrix.c
+++ b/arch/arm/mach-at91/matrix.c
@@ -6,6 +6,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 904e1bdc68..4879edf528 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -8,6 +8,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/include/configs/at91-sama5_common.h 
b/include/configs/at91-sama5_common.h
index e7ecc3f2ca..36bf0bba2a 100644
--- a/include/configs/at91-sama5_common.h
+++ b/include/configs/at91-sama5_common.h
@@ -10,8 +10,6 @@
 #ifndef __AT91_SAMA5_COMMON_H
 #define __AT91_SAMA5_COMMON_H
 
-#include 
-
 #define CONFIG_SYS_TEXT_BASE   0x26f0
 
 /* ARM asynchronous clock */
diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h
index 91037d6cb5..4b72f9570f 100644
--- a/include/configs/ma5d4evk.h
+++ b/include/configs/ma5d4evk.h
@@ -22,11 +22,14 @@
 #define CONFIG_DOS_PARTITION
 #define CONFIG_FAT_WRITE
 
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER   0xfc06863c
+
 /*
  * Memory configurations
  */
 #define CONFIG_NR_DRAM_BANKS   1
-#define CONFIG_SYS_SDRAM_BASE   ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE  0x2000
 #define CONFIG_SYS_SDRAM_SIZE  0x1000
 
 #ifdef CONFIG_SPL_BUILD
@@ -55,8 +58,8 @@
  * Serial Driver
  */
 #define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE  ATMEL_BASE_USART0
-#define CONFIG_USART_IDATMEL_ID_USART0
+#define CONFIG_USART_BASE  0xf802c000
+#define CONFIG_USART_ID6
 
 /*
  * Ethernet
diff --git a/include/configs/sama5d2_ptc.h b/include/configs/sama5d2_ptc.h
index 7a049d4580..74badff97d 100644
--- a/include/configs/sama5d2_ptc.h
+++ b/include/configs/sama5d2_ptc.h
@@ -17,10 +17,13 @@
 
 /* serial console */
 #define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE  ATMEL_BASE_UART0
-#define CONFIG_USART_IDATMEL_ID_UART0
+#define CONFIG_USART_BASE  0xf801c000
+#define CONFIG_USART_ID24
 
-#define CONFIG_SYS_SDRAM_BASE   ATMEL_BASE_DDRCS
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER   0xf804803c
+
+#define CONFIG_SYS_SDRAM_BASE  0x2000
 #define CONFIG_SYS_SDRAM_SIZE  0x2000
 
 #ifdef CONFIG_SPL_BUILD
@@ -53,7 +56,7 @@
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE   ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE   0x8000
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE   (1 << 21)
 /* our CLE is AD22 */
diff --git a/include/configs/sama5d2_xplained.h 
b/include/configs/sama5d2_xplained.h
index 61e337617c..39d686ffee 100644
--- a/include/configs/sama5d2_xplained.h
+++ b/include/configs/sama5d2_xplained.h
@@ -19,9 +19,12 @@
 
 #define CONFIG_MISC_INIT_R
 
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER   0xf804803c
+
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS   1
-#define CONFIG_SYS_SDRAM_BASE   ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE   0x2000
 #define CONFIG_SYS_SDRAM_SIZE  0x2000
 
 #ifdef CONFIG_SPL_BUILD
diff --git a/include/configs/sama5d3_xplained.h 
b/include/configs/sama5d3_xplained.h
index 39c8883bad..eae60216bd 100644
--- a/include/configs/sama5d3_xplained.h
+++ b/include/configs/sama5d3_xplained.h
@@ -18,16 +18,19 @@
  * This needs to be defined for the OHCI code to work but it is defined as
  * ATMEL_ID_UHPHS in the CPU specific header files.
  */
-#define ATMEL_ID_UHP   ATMEL_ID_UHPHS
+#define ATMEL_ID_UHP   

[U-Boot] [PATCH 0/4] ARM: sama5: remove SoCs from CONFIG_SYS_EXTRA_OPTIONS

2017-01-05 Thread Wenyou Yang
The CONFIG_SYS_EXTRA_OPTIONS is deprecated, remove the SoC
options such as SAMA5D2, SAMA5D3 and SAMA5D4 from
CONFIG_SYS_EXTRA_OPTIONS.


Wenyou Yang (4):
  ARM: at91: move CONFIG_AT91FAMILY option to Kconfig
  ARM: at91: sama5: remove hardware.h included in board config
  ARM: at91: sama5: add SoC configs to Kconfig
  defconfig: sama5: remove SoCs from CONFIG_SYS_EXTRA_OPTIONS

 arch/arm/mach-at91/Kconfig| 31 ---
 arch/arm/mach-at91/atmel_sfr.c|  1 +
 arch/arm/mach-at91/include/mach/at91rm9200.h  |  1 -
 arch/arm/mach-at91/include/mach/at91sam9260.h |  5 -
 arch/arm/mach-at91/include/mach/at91sam9261.h |  5 -
 arch/arm/mach-at91/include/mach/at91sam9263.h |  5 -
 arch/arm/mach-at91/include/mach/at91sam9g45.h |  5 -
 arch/arm/mach-at91/include/mach/at91sam9rl.h  |  5 -
 arch/arm/mach-at91/include/mach/at91sam9x5.h  |  2 --
 arch/arm/mach-at91/include/mach/sama5d2.h |  5 -
 arch/arm/mach-at91/include/mach/sama5d3.h |  5 -
 arch/arm/mach-at91/include/mach/sama5d4.h |  5 -
 arch/arm/mach-at91/matrix.c   |  1 +
 configs/ma5d4evk_defconfig|  1 -
 configs/sama5d2_ptc_nandflash_defconfig   |  2 +-
 configs/sama5d2_ptc_spiflash_defconfig|  2 +-
 configs/sama5d2_xplained_mmc_defconfig| 10 -
 configs/sama5d2_xplained_spiflash_defconfig   |  8 +++
 configs/sama5d36ek_cmp_mmc_defconfig  |  2 +-
 configs/sama5d36ek_cmp_nandflash_defconfig|  2 +-
 configs/sama5d36ek_cmp_spiflash_defconfig |  2 +-
 configs/sama5d3_xplained_mmc_defconfig|  2 +-
 configs/sama5d3_xplained_nandflash_defconfig  |  2 +-
 configs/sama5d3xek_mmc_defconfig  |  2 +-
 configs/sama5d3xek_nandflash_defconfig|  2 +-
 configs/sama5d3xek_spiflash_defconfig |  2 +-
 configs/sama5d4_xplained_mmc_defconfig|  2 +-
 configs/sama5d4_xplained_nandflash_defconfig  |  2 +-
 configs/sama5d4_xplained_spiflash_defconfig   |  2 +-
 configs/sama5d4ek_mmc_defconfig   |  3 +--
 configs/sama5d4ek_nandflash_defconfig |  3 +--
 configs/sama5d4ek_spiflash_defconfig  |  3 +--
 configs/vinco_defconfig   |  2 +-
 drivers/pinctrl/pinctrl-at91.c|  1 +
 include/configs/at91-sama5_common.h   |  2 --
 include/configs/ma5d4evk.h|  9 +---
 include/configs/sama5d2_ptc.h | 11 ++
 include/configs/sama5d2_xplained.h|  5 -
 include/configs/sama5d3_xplained.h| 13 ++-
 include/configs/sama5d3xek.h  | 11 ++
 include/configs/sama5d4_xplained.h|  7 --
 include/configs/sama5d4ek.h   |  7 --
 include/configs/vinco.h   | 11 ++
 43 files changed, 99 insertions(+), 110 deletions(-)

-- 
2.11.0

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[U-Boot] [PATCH 1/4] ARM: at91: move CONFIG_AT91FAMILY option to Kconfig

2017-01-05 Thread Wenyou Yang
Move CONFIG_AT91FAMILY option from include/mach/.h to Kconfig.

Signed-off-by: Wenyou Yang 
---

 arch/arm/mach-at91/Kconfig| 3 +++
 arch/arm/mach-at91/include/mach/at91rm9200.h  | 1 -
 arch/arm/mach-at91/include/mach/at91sam9260.h | 5 -
 arch/arm/mach-at91/include/mach/at91sam9261.h | 5 -
 arch/arm/mach-at91/include/mach/at91sam9263.h | 5 -
 arch/arm/mach-at91/include/mach/at91sam9g45.h | 5 -
 arch/arm/mach-at91/include/mach/at91sam9rl.h  | 5 -
 arch/arm/mach-at91/include/mach/at91sam9x5.h  | 2 --
 arch/arm/mach-at91/include/mach/sama5d2.h | 5 -
 arch/arm/mach-at91/include/mach/sama5d3.h | 5 -
 arch/arm/mach-at91/include/mach/sama5d4.h | 5 -
 11 files changed, 3 insertions(+), 43 deletions(-)

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 13e19ba2fe..5cefeb429b 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -1,5 +1,8 @@
 if ARCH_AT91
 
+config AT91FAMILY
+   def_bool y
+
 choice
prompt "Atmel AT91 board select"
optional
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h 
b/arch/arm/mach-at91/include/mach/at91rm9200.h
index d177bdcae5..d15fb7a292 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -6,7 +6,6 @@
 #ifndef __AT91RM9200_H__
 #define __AT91RM9200_H__
 
-#define CONFIG_AT91FAMILY  /* it's a member of AT91 family */
 #define CONFIG_ARCH_CPU_INIT   /* we need arch_cpu_init() for hw timers */
 #define CONFIG_AT91_GPIO   /* and require always gpio features */
 
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h 
b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 1a4e84b050..24d5dbd68a 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -19,11 +19,6 @@
 #define AT91SAM9260_H
 
 /*
- * defines to be used in other places
- */
-#define CONFIG_AT91FAMILY  /* it's a member of AT91 */
-
-/*
  * Peripheral identifiers/interrupts.
  */
 #define ATMEL_ID_FIQ   0   /* Advanced Interrupt Controller (FIQ) */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h 
b/arch/arm/mach-at91/include/mach/at91sam9261.h
index 914a3b0460..06403ce225 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -19,11 +19,6 @@
 #define AT91SAM9261_H
 
 /*
- * defines to be used in other places
- */
-#define CONFIG_AT91FAMILY  /* it's a member of AT91 */
-
-/*
  * Peripheral identifiers/interrupts.
  */
 #define ATMEL_ID_FIQ   0   /* Advanced Interrupt Controller (FIQ) */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h 
b/arch/arm/mach-at91/include/mach/at91sam9263.h
index 71675abf82..be9a665db5 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -15,11 +15,6 @@
 #define AT91SAM9263_H
 
 /*
- * defines to be used in other places
- */
-#define CONFIG_AT91FAMILY  /* it's a member of AT91 */
-
-/*
  * Peripheral identifiers/interrupts.
  */
 #define ATMEL_ID_FIQ   0   /* Advanced Interrupt Controller (FIQ) */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h 
b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index 5c32e24ed0..96922c4e6b 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -13,11 +13,6 @@
 #define AT91SAM9G45_H
 
 /*
- * defines to be used in other places
- */
-#define CONFIG_AT91FAMILY  /* it's a member of AT91 */
-
-/*
  * Peripheral identifiers/interrupts.
  */
 #define ATMEL_ID_FIQ   0   /* Advanced Interrupt Controller (FIQ) */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h 
b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 70bbf4edaa..8f9155c9ea 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -15,11 +15,6 @@
 #define AT91SAM9RL_H
 
 /*
- * defines to be used in other places
- */
-#define CONFIG_AT91FAMILY  /* it's a member of AT91 */
-
-/*
  * Peripheral identifiers/interrupts.
  */
 #define ATMEL_ID_FIQ   0   /* Advanced Interrupt Controller (FIQ) */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h 
b/arch/arm/mach-at91/include/mach/at91sam9x5.h
index e7224e432d..f9710a172f 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9x5.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h
@@ -12,8 +12,6 @@
 #ifndef __AT91SAM9X5_H__
 #define __AT91SAM9X5_H__
 
-#define CONFIG_AT91FAMILY  /* it's a member of AT91 family */
-
 /*
  * Peripheral identifiers/interrupts.
  */
diff --git a/arch/arm/mach-at91/include/mach/sama5d2.h 
b/arch/arm/mach-at91/include/mach/sama5d2.h
index 25c85411e5..2ee3d68db3 100644
--- a/arch/arm/mach-at91/include/mach/sama5d2.h
+++ b/arch/arm/mach-at91/include/mach/sama5d2.h
@@ -11,11 +11,6 @@
 #define __SAMA5D2_H
 
 /*
- * definitions to be used in other places

[U-Boot] [PATCH] ARM: at91: move PIO_SCDR_DIV to mach/at91_pio.h

2017-01-05 Thread Wenyou Yang
To fix the build error when building for at91sam9261ek, move
PIO_SCDR_DIV definition to mach/at91_pio.h.
---8<---
error: 'PIO_SCDR_DIV' undeclared (first use in this function)
--->8---

Signed-off-by: Wenyou Yang 
---

 arch/arm/mach-at91/include/mach/at91_pio.h   | 2 ++
 arch/arm/mach-at91/include/mach/at91sam9x5.h | 1 -
 arch/arm/mach-at91/include/mach/sama5d3.h| 1 -
 arch/arm/mach-at91/include/mach/sama5d4.h| 1 -
 4 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-at91/include/mach/at91_pio.h 
b/arch/arm/mach-at91/include/mach/at91_pio.h
index f195a7d38e..4840a2b8f2 100644
--- a/arch/arm/mach-at91/include/mach/at91_pio.h
+++ b/arch/arm/mach-at91/include/mach/at91_pio.h
@@ -32,6 +32,8 @@
 #define AT91_ASM_PIOD_ASR  \
(ATMEL_BASE_PIO + AT91_PIO_PORTD * AT91_ASM_PIO_RANGE + 0x70)
 
+#define PIO_SCDR_DIV   0x3fff  /* Slow Clock Divider Selection for 
Debouncing Mask */
+
 #ifndef __ASSEMBLY__
 
 typedef struct at91_port {
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h 
b/arch/arm/mach-at91/include/mach/at91sam9x5.h
index eaec727253..e7224e432d 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9x5.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h
@@ -171,7 +171,6 @@
  * Other misc defines
  */
 #define ATMEL_PIO_PORTS 4
-#define PIO_SCDR_DIV(0x3fff <<  0)  /* Slow Clock Divider Mask */
 #define ATMEL_PMC_UHP  AT91SAM926x_PMC_UHP
 #define ATMEL_ID_UHP   ATMEL_ID_UHPHS
 
diff --git a/arch/arm/mach-at91/include/mach/sama5d3.h 
b/arch/arm/mach-at91/include/mach/sama5d3.h
index e4e97dc989..d558f95141 100644
--- a/arch/arm/mach-at91/include/mach/sama5d3.h
+++ b/arch/arm/mach-at91/include/mach/sama5d3.h
@@ -188,7 +188,6 @@
  * Other misc defines
  */
 #define ATMEL_PIO_PORTS5
-#define PIO_SCDR_DIV   0x3fff
 #define CPU_HAS_PCR
 
 /* Timer */
diff --git a/arch/arm/mach-at91/include/mach/sama5d4.h 
b/arch/arm/mach-at91/include/mach/sama5d4.h
index 9a6c974bf7..78cc2a7a0a 100644
--- a/arch/arm/mach-at91/include/mach/sama5d4.h
+++ b/arch/arm/mach-at91/include/mach/sama5d4.h
@@ -174,7 +174,6 @@
  * Other misc defines
  */
 #define ATMEL_PIO_PORTS5
-#define PIO_SCDR_DIV   0x3fff
 #define CPU_HAS_PCR
 #define CPU_HAS_H32MXDIV
 
-- 
2.11.0

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Re: [U-Boot] usb start hangs

2017-01-05 Thread york sun
+Prabhakar

Prabhakar,

Please include USB IP owner to take a look.

On 01/05/2017 08:27 PM, Marek Vasut wrote:
> On 01/06/2017 03:40 AM, york sun wrote:
>> On 01/05/2017 06:19 PM, Marek Vasut wrote:
>>> On 01/06/2017 03:13 AM, Tony O'Brien wrote:
 Hi -


 We recently updated our U-Boot release to v2016.11 and now our USB devices 
 don't work.  When usb start is executed with a device inserted it hangs at 
 'scanning bus 0 for devices...' and doesn't recover.  Our product uses an 
 NXP T2081 and I can reproduce this issue on the T2080RDB development board 
 using the tip of U-Boot.  For testing I am using both an EMTEC 16GB USB 
 thumb drive and an Edimax Fast Ethernet adapter.  The code always hangs at 
 drivers/usb/host/ehci-hcd.c:557 in ehci_submit_async, just before the call 
 to handshake.


 I have traced the issue to 'Commit cb1629f91a48 powerpc: Disable flush or 
 invalidate dcache by range for some SoCs', which is prior to the v2016.07 
 release.  Commit ac337168ad81 mentioned in this patch removes the original 
 empty functions for the MPC85xx (and others), allowing the functions to be 
 used, but I don't know how they would have worked before this.


 Either reverting cb1629f91a48 or adding '|| defined(MPC85xx) ' to the #if 
 statements makes usb work again.


 diff --git a/arch/powerpc/lib/ppccache.S b/arch/powerpc/lib/ppccache.S
 index 66cf02dbd0..ad28c7c369 100644
 --- a/arch/powerpc/lib/ppccache.S
 +++ b/arch/powerpc/lib/ppccache.S
 @@ -65,7 +65,7 @@ ppcSync:
  * flush_dcache_range(unsigned long start, unsigned long stop)
  */
 _GLOBAL(flush_dcache_range)
 -#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
 +#if defined(CONFIG_4xx) || defined(CONFIG_MPC85xx) || 
 defined(CONFIG_MPC86xx)
li  r5,L1_CACHE_BYTES-1
andcr3,r3,r5
subfr4,r3,r4
 @@ -89,7 +89,7 @@ _GLOBAL(flush_dcache_range)
  * invalidate_dcache_range(unsigned long start, unsigned long stop)
  */
 _GLOBAL(invalidate_dcache_range)
 -#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
 +#if defined(CONFIG_4xx) || defined(CONFIG_MPC85xx) || 
 defined(CONFIG_MPC86xx)
li  r5,L1_CACHE_BYTES-1
andcr3,r3,r5
subfr4,r3,r4

 Do you have any thoughts on this before I submit the patch?
>>>
>>> Seems like the right thing to do, but I'd like York to double-check this.
>>>
>>
>> Tony,
>>
>> I put in commit cb1629f91a48 for a very similar reason. Those flushing
>> functions were no-op for 85xx. After commit ac337168a, the extra
>> flushing made things worse. I don't quite remember which drivers broke
>> but I had to exclude 85xx from those function. The code looks correct
>> though. Without further information, I cannot reject your idea to enable
>> these functions for 85xx. But I am afraid we will see something broken
>> again.
>
> Maybe you can look into it some more ? It's NXP chip after all, so
> should be doable, no ? :)
>

Yes, our team will look into it. I am not the expert on USB.

York
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[U-Boot] [PATCH v2 2/2] LS2080A: Add validation of MC & DPC images.

2017-01-05 Thread Udit Agarwal
Add secure boot validation of MC, DPC images using
esbc_validate command.

Signed-off-by: Sumit Garg 
Signed-off-by: Udit Agarwal 
---

Changes for V2:
Use of #ifdef instead of #ifndef with CONFIG_SECURE_BOOT macro
and coresponding changes in mcinitcmd command.

 include/configs/ls2080aqds.h | 21 -
 include/configs/ls2080ardb.h | 30 --
 2 files changed, 48 insertions(+), 3 deletions(-)

diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 838568f..6d566e8 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -365,6 +365,7 @@ unsigned long get_board_ddr_clk(void);
 
 /* Initial environment variables */
 #undef CONFIG_EXTRA_ENV_SETTINGS
+#ifdef CONFIG_SECURE_BOOT
 #define CONFIG_EXTRA_ENV_SETTINGS  \
"hwconfig=fsl_ddr:bank_intlv=auto\0"\
"loadaddr=0x8010\0" \
@@ -376,8 +377,26 @@ unsigned long get_board_ddr_clk(void);
"kernel_start=0x58110\0"\
"kernel_load=0xa000\0"  \
"kernel_size=0x280\0"   \
-   "mcinitcmd=fsl_mc start mc 0x58030" \
+   "mcinitcmd=esbc_validate 0x580c8;"  \
+   "esbc_validate 0x580cc;"\
+   "fsl_mc start mc 0x58030"   \
" 0x58080 \0"
+#else
+#define CONFIG_EXTRA_ENV_SETTINGS  \
+   "hwconfig=fsl_ddr:bank_intlv=auto\0"\
+   "loadaddr=0x8010\0" \
+   "kernel_addr=0x10\0"\
+   "ramdisk_addr=0x80\0"   \
+   "ramdisk_size=0x200\0"  \
+   "fdt_high=0xa000\0" \
+   "initrd_high=0x\0"  \
+   "kernel_start=0x58110\0"\
+   "kernel_load=0xa000\0"  \
+   "kernel_size=0x280\0"   \
+   "mcinitcmd=fsl_mc start mc 0x58030" \
+   " 0x58080 \0"
+#endif /* CONFIG_SECURE_BOOT */
+
 
 #ifdef CONFIG_FSL_MC_ENET
 #define CONFIG_FSL_MEMAC
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 32fa0eb..ee99126 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -328,6 +328,7 @@ unsigned long get_board_sys_clk(void);
 
 /* Initial environment variables */
 #undef CONFIG_EXTRA_ENV_SETTINGS
+#ifdef CONFIG_SECURE_BOOT
 #define CONFIG_EXTRA_ENV_SETTINGS  \
"hwconfig=fsl_ddr:bank_intlv=auto\0"\
"scriptaddr=0x8080\0"   \
@@ -345,9 +346,34 @@ unsigned long get_board_sys_clk(void);
"kernel_load=0xa000\0"  \
"kernel_size=0x280\0"   \
"fdtfile=fsl-ls2080a-rdb.dtb\0" \
-   "mcinitcmd=fsl_mc start mc 0x58030" \
-   " 0x58080 \0"   \
+   "mcinitcmd=esbc_validate 0x580c8;"  \
+   "esbc_validate 0x580cc;"\
+   "fsl_mc start mc 0x58030"   \
+   " 0x58080 \0"   \
BOOTENV
+#else
+#define CONFIG_EXTRA_ENV_SETTINGS  \
+   "hwconfig=fsl_ddr:bank_intlv=auto\0"\
+   "scriptaddr=0x8080\0"   \
+   "kernel_addr_r=0x8100\0"\
+   "pxefile_addr_r=0x8100\0"   \
+   "fdt_addr_r=0x8800\0"   \
+   "ramdisk_addr_r=0x8900\0"   \
+   "loadaddr=0x8010\0" \
+   "kernel_addr=0x10\0"\
+   "ramdisk_addr=0x80\0"   \
+   "ramdisk_size=0x200\0"  \
+   "fdt_high=0xa000\0" \
+   "initrd_high=0x\0"  \
+   "kernel_start=0x58110\0"\
+   "kernel_load=0xa000\0"  \
+   "kernel_size=0x280\0"   \
+   "fdtfile=fsl-ls2080a-rdb.dtb\0" \
+   "mcinitcmd=fsl_mc start mc 0x58030" \
+   " 0x58080 \0"   \
+   BOOTENV
+#endif
+
 
 #undef CONFIG_BOOTARGS
 #define CONFIG_BOOTARGS"console=ttyS1,115200 root=/dev/ram0 " \
-- 
1.9.1

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[U-Boot] [PATCH v2 1/2] SECURE_BOOT: Update bootscript and its hdr addresses

2017-01-05 Thread Udit Agarwal
Update bootscript and its hdr addresses for Layerscape Chasis 3
based platforms instead of individual SoCs.

Signed-off-by: Sumit Garg 
Signed-off-by: Udit Agarwal 
---

Changes for V2:
Modified the subject

 arch/arm/include/asm/fsl_secure_boot.h | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/fsl_secure_boot.h 
b/arch/arm/include/asm/fsl_secure_boot.h
index 933e09c..f34ffc7 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -84,7 +84,7 @@
  * Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
  * Non-XIP Memory (Nand/SD)
  */
-#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_LS2080A) || \
+#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \
defined(CONFIG_SD_BOOT)
 #define CONFIG_BOOTSCRIPT_COPY_RAM
 #endif
@@ -92,11 +92,11 @@
  * The address needs to be modified according to NOR, NAND, SD and
  * DDR memory map
  */
-#ifdef CONFIG_LS2080A
-#define CONFIG_BS_HDR_ADDR_DEVICE  0x58392
-#define CONFIG_BS_ADDR_DEVICE  0x58390
-#define CONFIG_BS_HDR_ADDR_RAM 0xa392
-#define CONFIG_BS_ADDR_RAM 0xa390
+#ifdef CONFIG_FSL_LSCH3
+#define CONFIG_BS_HDR_ADDR_DEVICE  0x580d0
+#define CONFIG_BS_ADDR_DEVICE  0x580e0
+#define CONFIG_BS_HDR_ADDR_RAM 0xa0d0
+#define CONFIG_BS_ADDR_RAM 0xa0e0
 #define CONFIG_BS_HDR_SIZE 0x2000
 #define CONFIG_BS_SIZE 0x1000
 #else
-- 
1.9.1

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Re: [U-Boot] usb start hangs

2017-01-05 Thread Marek Vasut
On 01/06/2017 03:40 AM, york sun wrote:
> On 01/05/2017 06:19 PM, Marek Vasut wrote:
>> On 01/06/2017 03:13 AM, Tony O'Brien wrote:
>>> Hi -
>>>
>>>
>>> We recently updated our U-Boot release to v2016.11 and now our USB devices 
>>> don't work.  When usb start is executed with a device inserted it hangs at 
>>> 'scanning bus 0 for devices...' and doesn't recover.  Our product uses an 
>>> NXP T2081 and I can reproduce this issue on the T2080RDB development board 
>>> using the tip of U-Boot.  For testing I am using both an EMTEC 16GB USB 
>>> thumb drive and an Edimax Fast Ethernet adapter.  The code always hangs at 
>>> drivers/usb/host/ehci-hcd.c:557 in ehci_submit_async, just before the call 
>>> to handshake.
>>>
>>>
>>> I have traced the issue to 'Commit cb1629f91a48 powerpc: Disable flush or 
>>> invalidate dcache by range for some SoCs', which is prior to the v2016.07 
>>> release.  Commit ac337168ad81 mentioned in this patch removes the original 
>>> empty functions for the MPC85xx (and others), allowing the functions to be 
>>> used, but I don't know how they would have worked before this.
>>>
>>>
>>> Either reverting cb1629f91a48 or adding '|| defined(MPC85xx) ' to the #if 
>>> statements makes usb work again.
>>>
>>>
>>> diff --git a/arch/powerpc/lib/ppccache.S b/arch/powerpc/lib/ppccache.S
>>> index 66cf02dbd0..ad28c7c369 100644
>>> --- a/arch/powerpc/lib/ppccache.S
>>> +++ b/arch/powerpc/lib/ppccache.S
>>> @@ -65,7 +65,7 @@ ppcSync:
>>>  * flush_dcache_range(unsigned long start, unsigned long stop)
>>>  */
>>> _GLOBAL(flush_dcache_range)
>>> -#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
>>> +#if defined(CONFIG_4xx) || defined(CONFIG_MPC85xx) || 
>>> defined(CONFIG_MPC86xx)
>>>li  r5,L1_CACHE_BYTES-1
>>>andcr3,r3,r5
>>>subfr4,r3,r4
>>> @@ -89,7 +89,7 @@ _GLOBAL(flush_dcache_range)
>>>  * invalidate_dcache_range(unsigned long start, unsigned long stop)
>>>  */
>>> _GLOBAL(invalidate_dcache_range)
>>> -#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
>>> +#if defined(CONFIG_4xx) || defined(CONFIG_MPC85xx) || 
>>> defined(CONFIG_MPC86xx)
>>>li  r5,L1_CACHE_BYTES-1
>>>andcr3,r3,r5
>>>subfr4,r3,r4
>>>
>>> Do you have any thoughts on this before I submit the patch?
>>
>> Seems like the right thing to do, but I'd like York to double-check this.
>>
> 
> Tony,
> 
> I put in commit cb1629f91a48 for a very similar reason. Those flushing 
> functions were no-op for 85xx. After commit ac337168a, the extra 
> flushing made things worse. I don't quite remember which drivers broke 
> but I had to exclude 85xx from those function. The code looks correct 
> though. Without further information, I cannot reject your idea to enable 
> these functions for 85xx. But I am afraid we will see something broken 
> again.

Maybe you can look into it some more ? It's NXP chip after all, so
should be doable, no ? :)

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Re: [U-Boot] usb start hangs

2017-01-05 Thread Marek Vasut
On 01/06/2017 03:13 AM, Tony O'Brien wrote:
> Hi -
> 
> 
> We recently updated our U-Boot release to v2016.11 and now our USB devices 
> don't work.  When usb start is executed with a device inserted it hangs at 
> 'scanning bus 0 for devices...' and doesn't recover.  Our product uses an NXP 
> T2081 and I can reproduce this issue on the T2080RDB development board using 
> the tip of U-Boot.  For testing I am using both an EMTEC 16GB USB thumb drive 
> and an Edimax Fast Ethernet adapter.  The code always hangs at 
> drivers/usb/host/ehci-hcd.c:557 in ehci_submit_async, just before the call to 
> handshake.
> 
> 
> I have traced the issue to 'Commit cb1629f91a48 powerpc: Disable flush or 
> invalidate dcache by range for some SoCs', which is prior to the v2016.07 
> release.  Commit ac337168ad81 mentioned in this patch removes the original 
> empty functions for the MPC85xx (and others), allowing the functions to be 
> used, but I don't know how they would have worked before this.
> 
> 
> Either reverting cb1629f91a48 or adding '|| defined(MPC85xx) ' to the #if 
> statements makes usb work again.
> 
> 
> diff --git a/arch/powerpc/lib/ppccache.S b/arch/powerpc/lib/ppccache.S
> index 66cf02dbd0..ad28c7c369 100644
> --- a/arch/powerpc/lib/ppccache.S
> +++ b/arch/powerpc/lib/ppccache.S
> @@ -65,7 +65,7 @@ ppcSync:
>  * flush_dcache_range(unsigned long start, unsigned long stop)
>  */
> _GLOBAL(flush_dcache_range)
> -#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
> +#if defined(CONFIG_4xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
>li  r5,L1_CACHE_BYTES-1
>andcr3,r3,r5
>subfr4,r3,r4
> @@ -89,7 +89,7 @@ _GLOBAL(flush_dcache_range)
>  * invalidate_dcache_range(unsigned long start, unsigned long stop)
>  */
> _GLOBAL(invalidate_dcache_range)
> -#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
> +#if defined(CONFIG_4xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
>li  r5,L1_CACHE_BYTES-1
>andcr3,r3,r5
>subfr4,r3,r4
> 
> Do you have any thoughts on this before I submit the patch?

Seems like the right thing to do, but I'd like York to double-check this.

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Re: [U-Boot] [PATCH] mx6ullevk: Add missing MAINTAINERS for mx6ull_14x14_evk_plugin_defconfig

2017-01-05 Thread Peng Fan


> -Original Message-
> From: Jagan Teki [mailto:ja...@openedev.com]
> Sent: Thursday, January 05, 2017 10:33 PM
> To: tr...@konsulko.com
> Cc: u-boot@lists.denx.de; Jagan Teki ; Stefano Babic
> ; Peng Fan 
> Subject: [PATCH] mx6ullevk: Add missing MAINTAINERS for
> mx6ull_14x14_evk_plugin_defconfig
> 
> Add 'Peng Fan' as MAINTAINERS of
> configs/mx6ull_14x14_evk_plugin_defconfig
> which is missing in below commit
> "imx: mx6ull_14x14_evk: add plugin defconfig"
> (sha1: b90ebf49bb8f74afe68f696f59a0e24cc79f2031)
> 
> Cc: Stefano Babic 
> Cc: Peng Fan 
> Signed-off-by: Jagan Teki 

Reviewed-by: Peng Fan 

Thanks,
Peng.

> ---
>  board/freescale/mx6ullevk/MAINTAINERS | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/board/freescale/mx6ullevk/MAINTAINERS
> b/board/freescale/mx6ullevk/MAINTAINERS
> index 4137674..73031cd 100644
> --- a/board/freescale/mx6ullevk/MAINTAINERS
> +++ b/board/freescale/mx6ullevk/MAINTAINERS
> @@ -4,3 +4,4 @@ S:Maintained
>  F:   board/freescale/mx6ullevk/
>  F:   include/configs/mx6ullevk.h
>  F:   configs/mx6ull_14x14_evk_defconfig
> +F:   configs/mx6ull_14x14_evk_plugin_defconfig
> --
> 1.9.1

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Re: [U-Boot] [GIT PULL] Please pull u-boot-mmc master

2017-01-05 Thread Jaehoon Chung
On 01/05/2017 11:34 PM, Tom Rini wrote:
> On Tue, Jan 03, 2017 at 10:17:18AM +0900, Jaehoon Chung wrote:
> 
>> Dear Tom,
>>
>> Could you pull these patches on your master branch?
>> There is a patch relevant to PMIC for PR.
>> I considered to make the pmic branch, but just included this patch in this 
>> PR.
>> (If you want to split the PR, I will do it.)
>> If there is an issue, let me know, plz.
>>
>> The following changes since commit 87f5f5417fc897df0b05826b408f0f4b7d2ee388:
>>
>>   Prepare v2017.01-rc3 (2017-01-02 20:00:55 -0500)
>>
>> are available in the git repository at:
>>
>>   http://git.denx.de/u-boot-master master
>>
>> for you to fetch changes up to 4c73d121d86f431221d48ae215f17887f06abff2:
>>
>>   power: change from meaningless value to error number (2017-01-03 10:11:34 
>> +0900)
>>
>> 
>> Jaehoon Chung (12):
>>   mmc: sdhci: disable the 8bit mode when host doesn't support it
>>   mmc: sdhci: add the get_cd callback function in sdhci_ops
>>   mmc: sdhci: remove the unused code about testing Card detect
>>   mmc: pic32_sdhci: move the code to pic32_sdhci.c
>>   mmc: sdhci: remove the SDHCI_QUIRK_NO_CD
>>   mmc: change the set_ios return type from void to int
>>   mmc: s5p_sdhci: add the s5p_set_clock function
>>   mmc: sdhci: move the callback function into sdhci_ops
>>   mmc: sdhci: use the bitops APIs in sdhci.h
>>   mmc: sdhci: remove the SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
>>   mmc: sdhci: combine the Host controller v3.0 feature into one condition
>>   power: change from meaningless value to error number
>>
>> Masahiro Yamada (2):
>>   mmc: sdhci-cadence: add Cadence SD4HC support
>>   mmc: uniphier-sd: fix Kconfig dependency
> 
> Sorry for not replying sooner, but I had thought I had.  This is too
> much change I think for this late in the release cycle.  Sorry.

Ah, Ok. It's my fault for sending PR late.
then I will resend the PR at 2017.03-rc1 time.


Best Regards,
Jaehoon Chung

> 

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Re: [U-Boot] [PATCH v2 2/2] test/py: Create tests for ext4 and fat testing on sandbox

2017-01-05 Thread Stephen Warren

On 01/01/2017 02:48 PM, Stefan Bruens wrote:

On Montag, 12. Dezember 2016 11:04:34 CET you wrote:

On 12/04/2016 05:52 PM, Stefan Brüns wrote:

From: Stefan Brüns 

The following checks are currently implemented:
1. listing a directory
2. verifying size of a file
3. veryfying md5sum for a file region
4. reading the beginning of a file



2) Doesn't mounting/unmounting require root? Nothing else in test/py
does. It'd be useful to put a comment at the top of the file detailing
which command one might want to add to /etc/sudoers to avoid having to
run the whole thing as root, and use sudo within the test where necessary.


It already uses sudo, the run command is visible from the log. Currently, I
just run "sudo true" prior to executing the test, the password is cached for 5
minutes.


I don't see sudo used anywhere in test/py; can you point out where you 
see it using sudo at present?



+class FsImage:

...


+def mount(self, log):
+if not os.path.exists(self.mountpath):
+os.mkdir(self.mountpath)


Use os.makedirs(path) instead; you can avoid the if statement, and it'll
handle parent directories too.


exist_ok only exists in python >= 3.2.


There's no need to use exist_ok; do this (example from conftest.py):

try:
os.makedirs(path)
except OSError as exc:
if exc.errno == errno.EEXIST and os.path.isdir(path):
pass
else:
raise


+@pytest.fixture(scope='module', params=['fat', 'ext4'])
+def fsimage(prereq_commands, u_boot_config, u_boot_log, request):
+"""Filesystem image instance."""
+datadir = u_boot_config.result_dir + '/'


Wouldn't it be better to put this into
u_boot_config.persistent_data_dir, plus avoid creating the image file if
it already exists? See u_boot_utils.py's PersistentRandomFile() as an
example. I wonder if that could be expanded to create files not just of
size n, but with sparse layout specs like this test uses?


See above. I don't think PersistentRandomFile() does fit here, as the files
are created *inside* an image. Maybe it could be used after the image and
filesystem  is created and mounted ...


You missed my point. PersistentRandomFile() is existing code that 
creates a persistent data file. You can create a new function/... that 
uses the same techniques to create the data file, but make it create a 
filesystem image rather than random data.



+fstype = request.param
+imagepath = datadir + '3GB.' + fstype + '.img'
+mountpath = datadir + 'mnt_' + fstype
+
+with u_boot_log.section('Create image "{0}"'.format(imagepath)):
+fsimage = FsImage(fstype, imagepath, mountpath)
+fsimage.mkfs(u_boot_log)
+
+yield fsimage
+fsimage.unmount(u_boot_log)


Unmounting seems to happen in a lot of different places. Can we isolate
it to just one place?


The image is mounted/unmounted for two different reasons - creating/populating
the image, and when accessing it using the hostfs commands.


IIRC, there's more duplication than that, but I'll look again when this 
is reposted.



Also, what happens if the code throws an exception after obtaining an
fsimage from this generator; I'm not sure that any cleanup happens in
that case. Should there be "try: ... finally: unmount()" somewhere to
clean up even in the case of an error? Alternatively, perhaps class
FsImage should have a destructor that does the unmount (at least if it
hasn't happened already)?


Its a fixture and will be torn down by pytest.


How does that work? Once the fixture function has yielded the image, 
surely if an exception is thrown, it'll be "thrown through" the 
generator function and hence prevent the rest of the function body from 
running? Or is there some special magic that lets the generator 
complete, even if the yield effectively threw an exception?



+return output[1:3]


No error checking for output[0]? I suppose if u_boot_console_base.py's
bad_pattern_defs[] included error patterns that "readcmd" was expected
to emit, that'd be fine, but it doesn't currently. Maybe we expect that
the other command can't possibly succeed if the read doesn't. Similar
comment for run_sizecmd() below, and perhaps elsewhere.


filesize is only set if the read succeeds, and "env print filesize" matches
bad_pattern_defs in case of an error.


What pattern is printed that matches bad_pattern_defs? Nothing in 
bad_pattern_defs obviously would get printed if $filesize wasn't set.


Also, what if $filesize is still set from an earlier test (e.g. in a 
different Python file), and a later test fails, yet this isn't detected 
since that relies on $filesize not being set? I see this script doing 
"env set filesize" /after/ its own tests which should prevent this, but 
not /before/ the first test.

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Re: [U-Boot] [PATCH] rpi: Fix device tree path on ARM64

2017-01-05 Thread Stephen Warren

On 01/03/2017 03:39 AM, Tuomas Tynkkynen wrote:

The directory structure of device tree files produced by the kernel's
'make dtbs_install' is different on ARM64, the RPi3 device tree file is
in a 'broadcom' subdirectory there. Make the set_fdtfile function account
for this so that the distro boot scripts can locate the DTB file.


I'm not 100% sure there's an expectation/guarantee that "make 
dtbs_install" will be used to create the DTB layout that the bootloader 
uses, although I suppose this is a reasonable thing to do.



diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c



 static void set_fdtfile(void)



-   fdtfile = model->fdtfile;
+   if (IS_ENABLED(CONFIG_ARM64))
+   strcat(fdtfile, "broadcom/");
+   strcat(fdtfile, model->fdtfile);


Instead of writing code for this, and in particular code that doesn't 
check for buffer size/overflow/..., wouldn't it be better to simply edit 
the RPi 3 entry in rpi_models_new_scheme[] to contain "broadcom/" in the 
DTB filename string?


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[U-Boot] [PATCH] README: mxc_hab: Adapt the CONFIG_SECURE_BOOT text to Kconfig

2017-01-05 Thread Fabio Estevam
From: Fabio Estevam 

Commit 6e1f4d2652e79 ("arm: imx-common: add SECURE_BOOT option to
Kconfig") moved the CONFIG_SECURE_BOOT option to Kconfig, so update
the mxc_hab README file to reflect that.

Signed-off-by: Fabio Estevam 
---
 doc/README.mxc_hab | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/doc/README.mxc_hab b/doc/README.mxc_hab
index b688580..c1f8ded 100644
--- a/doc/README.mxc_hab
+++ b/doc/README.mxc_hab
@@ -2,10 +2,9 @@ High Assurance Boot (HAB) for i.MX6 CPUs
 
 To enable the authenticated or encrypted boot mode of U-Boot, it is
 required to set the proper configuration for the target board. This
-is done by adding the following configuration in in the proper config
-file (e.g. include/configs/mx6qarm2.h)
+is done by adding the following configuration in the defconfig file:
 
-#define CONFIG_SECURE_BOOT
+CONFIG_SECURE_BOOT=y
 
 In addition, the U-Boot image to be programmed into the
 boot media needs to be properly constructed, i.e. it must contain a
-- 
2.7.4

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Re: [U-Boot] [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers

2017-01-05 Thread Icenowy Zheng


06.01.2017, 06:16, "Maxime Ripard" :
> On Thu, Dec 29, 2016 at 02:50:48AM +0800, Icenowy Zheng wrote:
>>  Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like
>>  DesignWare DRAM controller, which do not have official free DRAM
>>  initialization code, but can use modified dram_sun8i_h3.c.
>>
>>  Add a invisible option for easier DRAM initialization code reuse.
>
> Since it's used on all the newer SoCs, do we need to keep the H3 name
> in the config option name?

Good question...

Name it "SUNXI_DW_DRAM"?

(Although I think at least A33 uses the same series of DRAM controller)

>
> Thanks,
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
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Re: [U-Boot] [linux-sunxi] Re: [RFC PATCH 4/4] sunxi: low memory footprint for V3s

2017-01-05 Thread Icenowy Zheng

2017年1月6日 06:39于 Maxime Ripard 写道:
>
> On Thu, Dec 29, 2016 at 03:01:01AM +0800, Icenowy Zheng wrote: 
> > V3s devices won't have enough memory to load U-Boot binary at 
> > 0x4a00, and they do not have enough memory to reserve 64MiB for 
> > malloc() (it has only 64MiB at all!) 
> > Change the text base to 0x4100, and cut down malloc() reserved area 
> > to 4MB, in order to fit into the small DRAM of V3s. 
> > 
> > Signed-off-by: Icenowy Zheng  
> > --- 
> >  include/configs/sunxi-common.h | 10 ++ 
> >  1 file changed, 10 insertions(+) 
> > 
> > diff --git a/include/configs/sunxi-common.h 
> > b/include/configs/sunxi-common.h 
> > index b0bfc0dfd7..15c672813f 100644 
> > --- a/include/configs/sunxi-common.h 
> > +++ b/include/configs/sunxi-common.h 
> > @@ -76,7 +76,12 @@ 
> >  #define SDRAM_OFFSET(x) 0x4##x 
> >  #define CONFIG_SYS_SDRAM_BASE 0x4000 
> >  #define CONFIG_SYS_LOAD_ADDR 0x4200 /* default load address */ 
> > +/* V3s do not have enough memory to place code at 0x4a00 */ 
> > +#ifndef CONFIG_MACH_SUN8I_V3S 
> >  #define CONFIG_SYS_TEXT_BASE 0x4a00 
> > +#else 
> > +#define CONFIG_SYS_TEXT_BASE 0x4100 
> > +#endif 
> >  /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 
> >   * since it needs to fit in with the other values. By also #defining it 
> >   * we get warnings if the Kconfig value mismatches. */ 
> > @@ -148,8 +153,13 @@ 
> >  #define CONFIG_SYS_MMC_MAX_DEVICE 4 
> >  #endif 
> >  
> > +#ifndef CONFIG_MACH_SUN8I_V3S 
> >  /* 64MB of malloc() pool */ 
> >  #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20)) 
> > +#else 
> > +/* 4MB of malloc() pool */ 
> > +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) 
> > +#endif 
>
> Can't this be used for all the SoCs? Allocating 64MB seems way to much 
> already :) 

This patch is obsolute now.

A newer version which enables booting a kernel is ready now, on my github.

And according to someone in linux-sunxi, some works, for example enable a 
UBIFS, eats a lot of heap.

>
> Maxime 
>
> -- 
> Maxime Ripard, Free Electrons 
> Embedded Linux and Kernel engineering 
> http://free-electrons.com 
>
> -- 
> You received this message because you are subscribed to the Google Groups 
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Re: [U-Boot] [linux-sunxi] Re: [RFC PATCH 1/4] sunxi: add DDR2 support to H3-like DRAM controller

2017-01-05 Thread Icenowy Zheng

2017年1月6日 06:37于 Maxime Ripard 写道:
>
> On Thu, Dec 29, 2016 at 03:00:58AM +0800, Icenowy Zheng wrote: 
> > H3-like DRAM controller needs some special code to operate a DDR2 DRAM 
> > chip. Add the logic to probe such a chip. 
> > 
> > As there's no commercial boards available now with H3 and DDR2 DRAM, the 
> > patch is developed and tested on a V3s chip, which has in-package DDR2 
> > DRAM. 
> > 
> > Signed-off-by: Icenowy Zheng  
>
> It would have been great if your previous patch renaming the H3 symbol 
> was part of that serie. 
>
> > --- 
> >  arch/arm/mach-sunxi/dram_sun8i_h3.c | 114 
> >++-- 
> >  board/sunxi/Kconfig |  11  
> >  2 files changed, 120 insertions(+), 5 deletions(-) 
> > 
> > diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c 
> > b/arch/arm/mach-sunxi/dram_sun8i_h3.c 
> > index 8e2527dee1..a48320e01c 100644 
> > --- a/arch/arm/mach-sunxi/dram_sun8i_h3.c 
> > +++ b/arch/arm/mach-sunxi/dram_sun8i_h3.c 
> > @@ -22,6 +22,9 @@ struct dram_para { 
> >  u8 bus_width; 
> >  u8 dual_rank; 
> >  u8 row_bits; 
> > +#ifdef CONFIG_SUNXI_H3_DRAM_DDR2 
> > + u8 bank_bits; 
> > +#endif 
> >  }; 
> >  
> >  static inline int ns_to_t(int nanoseconds) 
> > @@ -136,36 +139,77 @@ static void mctl_set_timing_params(struct dram_para 
> > *para) 
> >  struct sunxi_mctl_ctl_reg * const mctl_ctl = 
> >  (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; 
> >  
> > +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 
> >  u8 tccd = 2; 
> > +#else 
> > + u8 tccd = 1; 
> > +#endif 
> >  u8 tfaw = ns_to_t(50); 
> > +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 
> >  u8 trrd = max(ns_to_t(10), 4); 
> >  u8 trcd = ns_to_t(15); 
> >  u8 trc = ns_to_t(53); 
> >  u8 txp = max(ns_to_t(8), 3); 
> >  u8 twtr = max(ns_to_t(8), 4); 
> >  u8 trtp = max(ns_to_t(8), 4); 
> > +#else 
> > + u8 trrd = max(ns_to_t(10), 2); 
> > + u8 trcd = ns_to_t(20); 
> > + u8 trc = ns_to_t(65); 
> > + u8 txp = 2; 
> > + u8 twtr = max(ns_to_t(8), 2); 
> > + u8 trtp = max(ns_to_t(8), 2); 
> > +#endif 
> >  u8 twr = max(ns_to_t(15), 3); 
> >  u8 trp = ns_to_t(15); 
> > +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 
> >  u8 tras = ns_to_t(38); 
> > +#else 
> > + u8 tras = ns_to_t(45); 
> > +#endif 
> >  u16 trefi = ns_to_t(7800) / 32; 
> > +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 
> >  u16 trfc = ns_to_t(350); 
> > +#else 
> > + u16 trfc = ns_to_t(328); 
> > +#endif 
> >  
> >  u8 tmrw = 0; 
> > +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 
> >  u8 tmrd = 4; 
> > +#else 
> > + u8 tmrd = 2; 
> > +#endif 
> >  u8 tmod = 12; 
> >  u8 tcke = 3; 
> >  u8 tcksrx = 5; 
> >  u8 tcksre = 5; 
> >  u8 tckesr = 4; 
> > +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 
> >  u8 trasmax = 24; 
> > +#else 
> > + u8 trasmax = 27; 
> > +#endif 
>
> Can't that be moved into a structure that would have different 
> declaration, this is barely readable. 
>
> >  
> > +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 
> >  u8 tcl = 6; /* CL 12 */ 
> >  u8 tcwl = 4; /* CWL 8 */ 
> >  u8 t_rdata_en = 4; 
> >  u8 wr_latency = 2; 
> > - 
> > +#else 
> > + u8 tcl = 3; /* CL 12 */ 
> > + u8 tcwl = 3; /* CWL 8 */ 
>
> Aren't the comments supposed to change? 
>
> > + u8 t_rdata_en = 1; 
> > + u8 wr_latency = 1; 
> > +#endif 
> > + 
> > +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 
> >  u32 tdinit0 = (500 * CONFIG_DRAM_CLK) + 1; /* 500us */ 
> >  u32 tdinit1 = (360 * CONFIG_DRAM_CLK) / 1000 + 1; /* 360ns */ 
> > +#else 
> > + u32 tdinit0 = (400 * CONFIG_DRAM_CLK) + 1; /* 400us */ 
> > + u32 tdinit1 = (500 * CONFIG_DRAM_CLK) / 1000 + 1; /* 500ns */ 
> > +#endif 
> >  u32 tdinit2 = (200 * CONFIG_DRAM_CLK) + 1; /* 200us */ 
> >  u32 tdinit3 = (1 * CONFIG_DRAM_CLK) + 1; /* 1us */ 
> >  
> > @@ -174,9 +218,15 @@ static void mctl_set_timing_params(struct dram_para 
> > *para) 
> >  u8 trd2wr = tcl + 2 + 1 - tcwl; /* RL + BL / 2 + 2 - WL */ 
> >  
> >  /* set mode register */ 
> > +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 
> >  writel(0x1c70, _ctl->mr[0]); /* CL=11, WR=12 */ 
> >  writel(0x40, _ctl->mr[1]); 
> >  writel(0x18, _ctl->mr[2]); /* CWL=8 */ 
> > +#else 
> > + writel(0x263, _ctl->mr[0]); /* CL=11, WR=12 */ 
> > + writel(0x4, _ctl->mr[1]); 
> > + writel(0x0, _ctl->mr[2]); /* CWL=8 */ 
>
> Ditto 
>
> > +#endif 
> >  writel(0x0, _ctl->mr[3]); 
> >  
> >  /* set DRAM timing */ 
> > @@ -244,7 +294,12 @@ static void mctl_zq_calibration(struct dram_para 
> > *para) 
> >  
> >  writel(0x0a0a0a0a, _ctl->zqdr[2]); 
> >  
> > - for (i = 0; i < 6; i++) { 
> > +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2 
> > + for (i = 0; i < 6; i++) 
> > +#else 
> > + for (i = 0; i < 4; i++) 
> > +#endif 
> > + { 
>
> This should also be put into that structure or a define. 
>
> >  u8 zq = (CONFIG_DRAM_ZQ >> (i * 4)) & 0xf; 
> >  
> >  writel((zq << 20) | (zq << 16) | (zq << 12) | 
> > @@ -266,7 +321,9 @@ static void mctl_zq_calibration(struct dram_para *para) 
> >  
> >  writel((zq_val[1] << 16) | zq_val[0], _ctl->zqdr[0]); 
> >  writel((zq_val[3] << 16) | zq_val[2], _ctl->zqdr[1]); 
> > +#ifndef 

Re: [U-Boot] [linux-sunxi] Re: [PATCH 1/2] sunxi: power: add AXP803 support

2017-01-05 Thread Icenowy Zheng

2017年1月6日 05:59于 Maxime Ripard 写道:
>
> On Fri, Dec 23, 2016 at 04:31:32PM +0800, Icenowy Zheng wrote: 
> > The A64 uses the AXP803 as its PMIC. 
> > 
> > Signed-off-by: Icenowy Zheng  
> > --- 
> >  arch/arm/mach-sunxi/Makefile   |   3 + 
> >  arch/arm/mach-sunxi/pmic_bus.c |   6 +- 
> >  arch/arm/mach-sunxi/rsb.c  |   2 +- 
> >  board/sunxi/board.c    |  31 ++--- 
> >  drivers/power/Kconfig  |  87 -- 
> >  drivers/power/Makefile |   1 + 
> >  drivers/power/axp803.c | 255 
> >+ 
> >  drivers/power/axp818.c |   2 +- 
> >  include/axp803.h   |  73  
> >  include/axp_pmic.h |   3 + 
> >  10 files changed, 413 insertions(+), 50 deletions(-) 
> >  create mode 100644 drivers/power/axp803.c 
> >  create mode 100644 include/axp803.h 
> > 
> > diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile 
> > index 128091e4e6..dcf2b5245d 100644 
> > --- a/arch/arm/mach-sunxi/Makefile 
> > +++ b/arch/arm/mach-sunxi/Makefile 
> > @@ -19,9 +19,11 @@ endif 
> >  obj-$(CONFIG_MACH_SUN6I) += prcm.o 
> >  obj-$(CONFIG_MACH_SUN8I) += prcm.o 
> >  obj-$(CONFIG_MACH_SUN9I) += prcm.o 
> > +obj-$(CONFIG_MACH_SUN50I) += prcm.o 
>
> Introducing a PRCM config option that would be selected by the various 
> MACH_* seems like a better option. 
>
> >  obj-$(CONFIG_MACH_SUN6I) += p2wi.o 
> >  obj-$(CONFIG_MACH_SUN8I) += rsb.o 
> >  obj-$(CONFIG_MACH_SUN9I) += rsb.o 
> > +obj-$(CONFIG_MACH_SUN50I) += rsb.o 
>
> Ditto. 
>
> >  obj-$(CONFIG_MACH_SUN4I) += clock_sun4i.o 
> >  obj-$(CONFIG_MACH_SUN5I) += clock_sun4i.o 
> >  obj-$(CONFIG_MACH_SUN6I) += clock_sun6i.o 
> > @@ -37,6 +39,7 @@ obj-$(CONFIG_MACH_SUN9I) += clock_sun9i.o gtbus_sun9i.o 
> >  obj-$(CONFIG_AXP152_POWER) += pmic_bus.o 
> >  obj-$(CONFIG_AXP209_POWER) += pmic_bus.o 
> >  obj-$(CONFIG_AXP221_POWER) += pmic_bus.o 
> > +obj-$(CONFIG_AXP803_POWER) += pmic_bus.o 
> >  obj-$(CONFIG_AXP809_POWER) += pmic_bus.o 
> >  obj-$(CONFIG_AXP818_POWER) += pmic_bus.o 
> >  
> > diff --git a/arch/arm/mach-sunxi/pmic_bus.c 
> > b/arch/arm/mach-sunxi/pmic_bus.c 
> > index 7c57f02792..0ac64a97cf 100644 
> > --- a/arch/arm/mach-sunxi/pmic_bus.c 
> > +++ b/arch/arm/mach-sunxi/pmic_bus.c 
> > @@ -36,7 +36,7 @@ int pmic_bus_init(void) 
> >  if (!needs_init) 
> >  return 0; 
> >  
> > -#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined 
> > CONFIG_AXP818_POWER 
> > +#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || defined 
> > CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER 
>
> And you need to wrap your line here. 
>
> >  # ifdef CONFIG_MACH_SUN6I 
> >  p2wi_init(); 
> >  ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR, 
> > @@ -62,7 +62,7 @@ int pmic_bus_read(u8 reg, u8 *data) 
> >  return i2c_read(AXP152_I2C_ADDR, reg, 1, data, 1); 
> >  #elif defined CONFIG_AXP209_POWER 
> >  return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1); 
> > -#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || 
> > defined CONFIG_AXP818_POWER 
> > +#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || 
> > defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER 
>
> Ditto 
>
> >  # ifdef CONFIG_MACH_SUN6I 
> >  return p2wi_read(reg, data); 
> >  # else 
> > @@ -77,7 +77,7 @@ int pmic_bus_write(u8 reg, u8 data) 
> >  return i2c_write(AXP152_I2C_ADDR, reg, 1, , 1); 
> >  #elif defined CONFIG_AXP209_POWER 
> >  return i2c_write(AXP209_I2C_ADDR, reg, 1, , 1); 
> > -#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || 
> > defined CONFIG_AXP818_POWER 
> > +#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || 
> > defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER 
>
> Ditto 
>
> >  # ifdef CONFIG_MACH_SUN6I 
> >  return p2wi_write(reg, data); 
> >  # else 
> > diff --git a/arch/arm/mach-sunxi/rsb.c b/arch/arm/mach-sunxi/rsb.c 
> > index 6fd11f1529..28d05e962a 100644 
> > --- a/arch/arm/mach-sunxi/rsb.c 
> > +++ b/arch/arm/mach-sunxi/rsb.c 
> > @@ -20,7 +20,7 @@ static int rsb_set_device_mode(void); 
> >  
> >  static void rsb_cfg_io(void) 
> >  { 
> > -#ifdef CONFIG_MACH_SUN8I 
> > +#if defined CONFIG_MACH_SUN8I || defined CONFIG_MACH_SUN50I 
> >  sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL_R_RSB); 
> >  sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL_R_RSB); 
> >  sunxi_gpio_set_pull(SUNXI_GPL(0), 1); 
> > diff --git a/board/sunxi/board.c b/board/sunxi/board.c 
> > index 53656383d5..3435b80c14 100644 
> > --- a/board/sunxi/board.c 
> > +++ b/board/sunxi/board.c 
> > @@ -487,26 +487,27 @@ void sunxi_board_init(void) 
> >  #endif 
> >  
> >  #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ 
> > - defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \ 
> > - defined CONFIG_AXP818_POWER 
> > + defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || \ 
> > + defined 

Re: [U-Boot] [RFC PATCH 1/4] sunxi: add DDR2 support to H3-like DRAM controller

2017-01-05 Thread Maxime Ripard
On Thu, Dec 29, 2016 at 03:00:58AM +0800, Icenowy Zheng wrote:
> H3-like DRAM controller needs some special code to operate a DDR2 DRAM
> chip. Add the logic to probe such a chip.
> 
> As there's no commercial boards available now with H3 and DDR2 DRAM, the
> patch is developed and tested on a V3s chip, which has in-package DDR2
> DRAM.
> 
> Signed-off-by: Icenowy Zheng 

It would have been great if your previous patch renaming the H3 symbol
was part of that serie.

> ---
>  arch/arm/mach-sunxi/dram_sun8i_h3.c | 114 
> ++--
>  board/sunxi/Kconfig |  11 
>  2 files changed, 120 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c 
> b/arch/arm/mach-sunxi/dram_sun8i_h3.c
> index 8e2527dee1..a48320e01c 100644
> --- a/arch/arm/mach-sunxi/dram_sun8i_h3.c
> +++ b/arch/arm/mach-sunxi/dram_sun8i_h3.c
> @@ -22,6 +22,9 @@ struct dram_para {
>   u8 bus_width;
>   u8 dual_rank;
>   u8 row_bits;
> +#ifdef CONFIG_SUNXI_H3_DRAM_DDR2
> + u8 bank_bits;
> +#endif
>  };
>  
>  static inline int ns_to_t(int nanoseconds)
> @@ -136,36 +139,77 @@ static void mctl_set_timing_params(struct dram_para 
> *para)
>   struct sunxi_mctl_ctl_reg * const mctl_ctl =
>   (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE;
>  
> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2
>   u8 tccd = 2;
> +#else
> + u8 tccd = 1;
> +#endif
>   u8 tfaw = ns_to_t(50);
> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2
>   u8 trrd = max(ns_to_t(10), 4);
>   u8 trcd = ns_to_t(15);
>   u8 trc  = ns_to_t(53);
>   u8 txp  = max(ns_to_t(8), 3);
>   u8 twtr = max(ns_to_t(8), 4);
>   u8 trtp = max(ns_to_t(8), 4);
> +#else
> + u8 trrd = max(ns_to_t(10), 2);
> + u8 trcd = ns_to_t(20);
> + u8 trc  = ns_to_t(65);
> + u8 txp  = 2;
> + u8 twtr = max(ns_to_t(8), 2);
> + u8 trtp = max(ns_to_t(8), 2);
> +#endif
>   u8 twr  = max(ns_to_t(15), 3);
>   u8 trp  = ns_to_t(15);
> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2
>   u8 tras = ns_to_t(38);
> +#else
> + u8 tras = ns_to_t(45);
> +#endif
>   u16 trefi   = ns_to_t(7800) / 32;
> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2
>   u16 trfc= ns_to_t(350);
> +#else
> + u16 trfc= ns_to_t(328);
> +#endif
>  
>   u8 tmrw = 0;
> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2
>   u8 tmrd = 4;
> +#else
> + u8 tmrd = 2;
> +#endif
>   u8 tmod = 12;
>   u8 tcke = 3;
>   u8 tcksrx   = 5;
>   u8 tcksre   = 5;
>   u8 tckesr   = 4;
> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2
>   u8 trasmax  = 24;
> +#else
> + u8 trasmax  = 27;
> +#endif

Can't that be moved into a structure that would have different
declaration, this is barely readable.

>  
> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2
>   u8 tcl  = 6; /* CL 12 */
>   u8 tcwl = 4; /* CWL 8 */
>   u8 t_rdata_en   = 4;
>   u8 wr_latency   = 2;
> -
> +#else
> + u8 tcl  = 3; /* CL 12 */
> + u8 tcwl = 3; /* CWL 8 */

Aren't the comments supposed to change?

> + u8 t_rdata_en   = 1;
> + u8 wr_latency   = 1;
> +#endif
> +
> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2
>   u32 tdinit0 = (500 * CONFIG_DRAM_CLK) + 1;  /* 500us */
>   u32 tdinit1 = (360 * CONFIG_DRAM_CLK) / 1000 + 1;   /* 360ns */
> +#else
> + u32 tdinit0 = (400 * CONFIG_DRAM_CLK) + 1;  /* 400us */
> + u32 tdinit1 = (500 * CONFIG_DRAM_CLK) / 1000 + 1;   /* 500ns */
> +#endif
>   u32 tdinit2 = (200 * CONFIG_DRAM_CLK) + 1;  /* 200us */
>   u32 tdinit3 = (1 * CONFIG_DRAM_CLK) + 1;/* 1us */
>  
> @@ -174,9 +218,15 @@ static void mctl_set_timing_params(struct dram_para 
> *para)
>   u8 trd2wr   = tcl + 2 + 1 - tcwl;   /* RL + BL / 2 + 2 - WL */
>  
>   /* set mode register */
> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2
>   writel(0x1c70, _ctl->mr[0]);   /* CL=11, WR=12 */
>   writel(0x40, _ctl->mr[1]);
>   writel(0x18, _ctl->mr[2]); /* CWL=8 */
> +#else
> + writel(0x263, _ctl->mr[0]);/* CL=11, WR=12 */
> + writel(0x4, _ctl->mr[1]);
> + writel(0x0, _ctl->mr[2]);  /* CWL=8 */

Ditto

> +#endif
>   writel(0x0, _ctl->mr[3]);
>  
>   /* set DRAM timing */
> @@ -244,7 +294,12 @@ static void mctl_zq_calibration(struct dram_para *para)
>  
>   writel(0x0a0a0a0a, _ctl->zqdr[2]);
>  
> - for (i = 0; i < 6; i++) {
> +#ifndef CONFIG_SUNXI_H3_DRAM_DDR2
> + for (i = 0; i < 6; i++)
> +#else
> + for (i = 0; i < 4; i++)
> +#endif
> + {

This should also be put into that structure or a define.

>   u8 zq = (CONFIG_DRAM_ZQ >> (i * 4)) & 0xf;
>  
>

Re: [U-Boot] [PATCH 05/12] aspeed/ast2500: Device Tree and bindings for some of the clocks

2017-01-05 Thread Maxim Sloyko
On Wed, Jan 4, 2017 at 7:26 PM, Tom Rini  wrote:
> On Wed, Jan 04, 2017 at 05:18:42PM -0800, Maxim Sloyko wrote:
>> On Wed, Jan 4, 2017 at 12:58 PM, Tom Rini  wrote:
>> > On Wed, Jan 04, 2017 at 11:46:49AM -0800, Maxim Sloyko wrote:
>> >
>> >> Signed-off-by: Maxim Sloyko 
>> >> ---
>> >>
>> >>  arch/arm/dts/ast2500.dtsi   | 423 
>> >> 
>> >>  include/dt-bindings/clock/ast2500-scu.h |  29 +++
>> >>  2 files changed, 452 insertions(+)
>> >>  create mode 100644 arch/arm/dts/ast2500.dtsi
>> >>  create mode 100644 include/dt-bindings/clock/ast2500-scu.h
>> >>
>> >> diff --git a/arch/arm/dts/ast2500.dtsi b/arch/arm/dts/ast2500.dtsi
>> >> new file mode 100644
>> >> index 00..1a2a3f7ee3
>> >> --- /dev/null
>> >> +++ b/arch/arm/dts/ast2500.dtsi
>> >> @@ -0,0 +1,423 @@
>> >> +/* This device tree is copied from
>> >> + * 
>> >> https://github.com/openbmc/linux/blob/c5682cb/arch/arm/boot/dts/aspeed-g5.dtsi
>> >
>> > Is this also found in the Linux kernel or not yet?  Thanks!
>>
>> Yes, this is also in in main Linux kernel now, as I've found out, but
>> actually there is a number of differences, most notably there is no
>> pin configuration in this device tree, because there is no pinctrl
>> driver.

Actually, I take that back, I was looking at the wrong linux Linux
kernel tree still... Only basic version of device tree has made it to
mainline kernel, but it's enough at the moment, so I used that
instead.

>>
>> Should I remove this reference or modify it?
>
> Ideally, we will take the kernel dts files and then add what we need on
> top of that in one of CONFIG_SYS_CPU/CONFIG_SYS_SOC/CONFIG_SYS_VENDOR
> -u-boot.dtsi files, see for example arch/arm/dts/sunxi-u-boot.dtsi or
> arch/arm/dts/tegra124-nyan-big-u-boot.dtsi

OK, so I took the device tree from the Linux kernel, (ast2500.dtsi),
added modifications in ast2500-u-boot.dtsi and now include
ast2500-u-boot.dtsi in ast2500-evb.dts. Let me know if I misunderstood
you.

Thanks!

>
> --
> Tom



-- 
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Re: [U-Boot] [PATCH] sunxi: H3/A64: fix non-ODT setting

2017-01-05 Thread Maxime Ripard
On Thu, Dec 29, 2016 at 02:50:49AM +0800, Icenowy Zheng wrote:
> From: Andre Przywara 
> 
> According to Jens disabling the on-die-termination should set bit 5,
> not bit 1 in the respective register. Fix this.
> 
> Reported-by: Jens Kuske 
> Signed-off-by: Andre Przywara 

This has already been sent and merged (and it's missing your
Signed-off-by).

Maxime

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Re: [U-Boot] [PATCH 2/2] sunxi: enable DLDO4 and DC1SW for Pine64+

2017-01-05 Thread Maxime Ripard
On Fri, Dec 23, 2016 at 04:31:33PM +0800, Icenowy Zheng wrote:
> Pine64+ uses DLDO4 for wireless network, and DC1SW for wired network.
> 
> Enable these two regulators, in order to provide net support in U-Boot
> and Linux.
> 
> Signed-off-by: Icenowy Zheng 
> ---
>  configs/pine64_plus_defconfig | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig
> index a76f66a11c..b9bbb54ef0 100644
> --- a/configs/pine64_plus_defconfig
> +++ b/configs/pine64_plus_defconfig
> @@ -9,5 +9,7 @@ CONFIG_SPL=y
>  # CONFIG_CMD_IMLS is not set
>  # CONFIG_CMD_FLASH is not set
>  # CONFIG_CMD_FPGA is not set
> +CONFIG_AXP_DLDO4_VOLT=3300

If this is used for the wifi, is there any point in enabling it in
U-Boot? It won't need it.

Maxime

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Re: [U-Boot] [PATCH 1/2] sunxi: power: add AXP803 support

2017-01-05 Thread Maxime Ripard
On Fri, Dec 23, 2016 at 04:31:32PM +0800, Icenowy Zheng wrote:
> The A64 uses the AXP803 as its PMIC.
> 
> Signed-off-by: Icenowy Zheng 
> ---
>  arch/arm/mach-sunxi/Makefile   |   3 +
>  arch/arm/mach-sunxi/pmic_bus.c |   6 +-
>  arch/arm/mach-sunxi/rsb.c  |   2 +-
>  board/sunxi/board.c|  31 ++---
>  drivers/power/Kconfig  |  87 --
>  drivers/power/Makefile |   1 +
>  drivers/power/axp803.c | 255 
> +
>  drivers/power/axp818.c |   2 +-
>  include/axp803.h   |  73 
>  include/axp_pmic.h |   3 +
>  10 files changed, 413 insertions(+), 50 deletions(-)
>  create mode 100644 drivers/power/axp803.c
>  create mode 100644 include/axp803.h
> 
> diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile
> index 128091e4e6..dcf2b5245d 100644
> --- a/arch/arm/mach-sunxi/Makefile
> +++ b/arch/arm/mach-sunxi/Makefile
> @@ -19,9 +19,11 @@ endif
>  obj-$(CONFIG_MACH_SUN6I) += prcm.o
>  obj-$(CONFIG_MACH_SUN8I) += prcm.o
>  obj-$(CONFIG_MACH_SUN9I) += prcm.o
> +obj-$(CONFIG_MACH_SUN50I)+= prcm.o

Introducing a PRCM config option that would be selected by the various
MACH_* seems like a better option.

>  obj-$(CONFIG_MACH_SUN6I) += p2wi.o
>  obj-$(CONFIG_MACH_SUN8I) += rsb.o
>  obj-$(CONFIG_MACH_SUN9I) += rsb.o
> +obj-$(CONFIG_MACH_SUN50I)+= rsb.o

Ditto.

>  obj-$(CONFIG_MACH_SUN4I) += clock_sun4i.o
>  obj-$(CONFIG_MACH_SUN5I) += clock_sun4i.o
>  obj-$(CONFIG_MACH_SUN6I) += clock_sun6i.o
> @@ -37,6 +39,7 @@ obj-$(CONFIG_MACH_SUN9I)+= clock_sun9i.o gtbus_sun9i.o
>  obj-$(CONFIG_AXP152_POWER)   += pmic_bus.o
>  obj-$(CONFIG_AXP209_POWER)   += pmic_bus.o
>  obj-$(CONFIG_AXP221_POWER)   += pmic_bus.o
> +obj-$(CONFIG_AXP803_POWER)   += pmic_bus.o
>  obj-$(CONFIG_AXP809_POWER)   += pmic_bus.o
>  obj-$(CONFIG_AXP818_POWER)   += pmic_bus.o
>  
> diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c
> index 7c57f02792..0ac64a97cf 100644
> --- a/arch/arm/mach-sunxi/pmic_bus.c
> +++ b/arch/arm/mach-sunxi/pmic_bus.c
> @@ -36,7 +36,7 @@ int pmic_bus_init(void)
>   if (!needs_init)
>   return 0;
>  
> -#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined 
> CONFIG_AXP818_POWER
> +#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || defined 
> CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER

And you need to wrap your line here.

>  # ifdef CONFIG_MACH_SUN6I
>   p2wi_init();
>   ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR,
> @@ -62,7 +62,7 @@ int pmic_bus_read(u8 reg, u8 *data)
>   return i2c_read(AXP152_I2C_ADDR, reg, 1, data, 1);
>  #elif defined CONFIG_AXP209_POWER
>   return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1);
> -#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined 
> CONFIG_AXP818_POWER
> +#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || defined 
> CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER

Ditto

>  # ifdef CONFIG_MACH_SUN6I
>   return p2wi_read(reg, data);
>  # else
> @@ -77,7 +77,7 @@ int pmic_bus_write(u8 reg, u8 data)
>   return i2c_write(AXP152_I2C_ADDR, reg, 1, , 1);
>  #elif defined CONFIG_AXP209_POWER
>   return i2c_write(AXP209_I2C_ADDR, reg, 1, , 1);
> -#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined 
> CONFIG_AXP818_POWER
> +#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || defined 
> CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER

Ditto

>  # ifdef CONFIG_MACH_SUN6I
>   return p2wi_write(reg, data);
>  # else
> diff --git a/arch/arm/mach-sunxi/rsb.c b/arch/arm/mach-sunxi/rsb.c
> index 6fd11f1529..28d05e962a 100644
> --- a/arch/arm/mach-sunxi/rsb.c
> +++ b/arch/arm/mach-sunxi/rsb.c
> @@ -20,7 +20,7 @@ static int rsb_set_device_mode(void);
>  
>  static void rsb_cfg_io(void)
>  {
> -#ifdef CONFIG_MACH_SUN8I
> +#if defined CONFIG_MACH_SUN8I || defined CONFIG_MACH_SUN50I
>   sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL_R_RSB);
>   sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL_R_RSB);
>   sunxi_gpio_set_pull(SUNXI_GPL(0), 1);
> diff --git a/board/sunxi/board.c b/board/sunxi/board.c
> index 53656383d5..3435b80c14 100644
> --- a/board/sunxi/board.c
> +++ b/board/sunxi/board.c
> @@ -487,26 +487,27 @@ void sunxi_board_init(void)
>  #endif
>  
>  #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
> - defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \
> - defined CONFIG_AXP818_POWER
> + defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || \
> + defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
>   power_failed = axp_init();
>  
> -#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \
> - defined CONFIG_AXP818_POWER
> +#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || \

Re: [U-Boot] [PATCH] armv8: fsl-lsch3: enable snoopable sata read and write

2017-01-05 Thread york sun
On 01/04/2017 08:47 PM, Y.T. Tang wrote:
> Hi York,
>
> For chasis2 platforms, like ls1043a and ls1046a, similar patch has been 
> merged already.
>

Ah! I see them in a wider range. You have them under #elif 
defined(CONFIG_FSL_LSCH2). It isn't visible in this patch.

York
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Re: [U-Boot] [PATCH] arm: layerscape: Enable UUID & GPT partition for NXP's ARM SoC

2017-01-05 Thread Igor Grinberg
On 01/05/17 18:25, york sun wrote:
> On 01/05/2017 01:51 AM, Igor Grinberg wrote:
>> On 01/04/17 23:41, york sun wrote:
>>> On 12/25/2016 11:29 PM, Igor Grinberg wrote:
 Hi Prabhakar Kushwaha,

 On 12/26/16 08:45, Prabhakar Kushwaha wrote:
> Enable UUID and GPT partition support for NXP's ARM based SoCs
> i.e. LS1012A, LS1021A, LS1043A, LS1046A and LS2080A.
>
> Also enable DOS partition for LS1012AFRDM boards.
>
> Signed-off-by: Prabhakar Kushwaha 
> ---
>  include/configs/ls1012afrdm.h | 5 +
>  include/configs/ls1012aqds.h  | 4 
>  include/configs/ls1012ardb.h  | 4 
>  include/configs/ls1021aiot.h  | 3 +++
>  include/configs/ls1021aqds.h  | 3 +++
>  include/configs/ls1021atwr.h  | 3 +++
>  include/configs/ls1043aqds.h  | 4 
>  include/configs/ls1043ardb.h  | 4 
>  include/configs/ls1046aqds.h  | 4 
>  include/configs/ls1046ardb.h  | 4 
>  include/configs/ls2080aqds.h  | 3 +++
>  include/configs/ls2080ardb.h  | 3 +++

 I'm not sure this is the expected way today...

>  12 files changed, 44 insertions(+)
>
> diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h
> index f6f88e8..94f7460 100644
> --- a/include/configs/ls1012afrdm.h
> +++ b/include/configs/ls1012afrdm.h
> @@ -42,6 +42,11 @@
>  #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS  2
>  #endif
>
> +#define CONFIG_DOS_PARTITION
> +#define CONFIG_PARTITION_UUIDS
> +#define CONFIG_EFI_PARTITION
> +#define CONFIG_CMD_GPT
> +

 These are the common (not board specific) things and I think today we 
 expect
 it to come through the Kconfig instead of the old config files.
>>>
>>> Igor,
>>>
>>> They are not totally common. The board has to support the device. I
>>> would recommend to use Kconfig as well if such config is in Kconfig.
>>> However it is not the case here.
>>
>> Right. They are not in Kconfig yet...
>> We are making efforts to move stuff to Kconfig.
>> Care to land a hand and move these ones to Kconfig?
>>
> 
> Can't promise. I have been doing just that for powerpc. Still have many 
> left.

Yeah, great job on those patches! Thanks!
I think it is still worth waiting instead of applying and moving afterwards...

-- 
Regards,
Igor.
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Re: [U-Boot] [PATCH] arm: layerscape: Enable UUID & GPT partition for NXP's ARM SoC

2017-01-05 Thread york sun
On 01/05/2017 01:51 AM, Igor Grinberg wrote:
> On 01/04/17 23:41, york sun wrote:
>> On 12/25/2016 11:29 PM, Igor Grinberg wrote:
>>> Hi Prabhakar Kushwaha,
>>>
>>> On 12/26/16 08:45, Prabhakar Kushwaha wrote:
 Enable UUID and GPT partition support for NXP's ARM based SoCs
 i.e. LS1012A, LS1021A, LS1043A, LS1046A and LS2080A.

 Also enable DOS partition for LS1012AFRDM boards.

 Signed-off-by: Prabhakar Kushwaha 
 ---
  include/configs/ls1012afrdm.h | 5 +
  include/configs/ls1012aqds.h  | 4 
  include/configs/ls1012ardb.h  | 4 
  include/configs/ls1021aiot.h  | 3 +++
  include/configs/ls1021aqds.h  | 3 +++
  include/configs/ls1021atwr.h  | 3 +++
  include/configs/ls1043aqds.h  | 4 
  include/configs/ls1043ardb.h  | 4 
  include/configs/ls1046aqds.h  | 4 
  include/configs/ls1046ardb.h  | 4 
  include/configs/ls2080aqds.h  | 3 +++
  include/configs/ls2080ardb.h  | 3 +++
>>>
>>> I'm not sure this is the expected way today...
>>>
  12 files changed, 44 insertions(+)

 diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h
 index f6f88e8..94f7460 100644
 --- a/include/configs/ls1012afrdm.h
 +++ b/include/configs/ls1012afrdm.h
 @@ -42,6 +42,11 @@
  #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS  2
  #endif

 +#define CONFIG_DOS_PARTITION
 +#define CONFIG_PARTITION_UUIDS
 +#define CONFIG_EFI_PARTITION
 +#define CONFIG_CMD_GPT
 +
>>>
>>> These are the common (not board specific) things and I think today we expect
>>> it to come through the Kconfig instead of the old config files.
>>
>> Igor,
>>
>> They are not totally common. The board has to support the device. I
>> would recommend to use Kconfig as well if such config is in Kconfig.
>> However it is not the case here.
>
> Right. They are not in Kconfig yet...
> We are making efforts to move stuff to Kconfig.
> Care to land a hand and move these ones to Kconfig?
>

Can't promise. I have been doing just that for powerpc. Still have many 
left.

York

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Re: [U-Boot] [GIT PULL] Please pull u-boot-mmc master

2017-01-05 Thread Tom Rini
On Tue, Jan 03, 2017 at 10:17:18AM +0900, Jaehoon Chung wrote:

> Dear Tom,
> 
> Could you pull these patches on your master branch?
> There is a patch relevant to PMIC for PR.
> I considered to make the pmic branch, but just included this patch in this PR.
> (If you want to split the PR, I will do it.)
> If there is an issue, let me know, plz.
> 
> The following changes since commit 87f5f5417fc897df0b05826b408f0f4b7d2ee388:
> 
>   Prepare v2017.01-rc3 (2017-01-02 20:00:55 -0500)
> 
> are available in the git repository at:
> 
>   http://git.denx.de/u-boot-master master
> 
> for you to fetch changes up to 4c73d121d86f431221d48ae215f17887f06abff2:
> 
>   power: change from meaningless value to error number (2017-01-03 10:11:34 
> +0900)
> 
> 
> Jaehoon Chung (12):
>   mmc: sdhci: disable the 8bit mode when host doesn't support it
>   mmc: sdhci: add the get_cd callback function in sdhci_ops
>   mmc: sdhci: remove the unused code about testing Card detect
>   mmc: pic32_sdhci: move the code to pic32_sdhci.c
>   mmc: sdhci: remove the SDHCI_QUIRK_NO_CD
>   mmc: change the set_ios return type from void to int
>   mmc: s5p_sdhci: add the s5p_set_clock function
>   mmc: sdhci: move the callback function into sdhci_ops
>   mmc: sdhci: use the bitops APIs in sdhci.h
>   mmc: sdhci: remove the SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
>   mmc: sdhci: combine the Host controller v3.0 feature into one condition
>   power: change from meaningless value to error number
> 
> Masahiro Yamada (2):
>   mmc: sdhci-cadence: add Cadence SD4HC support
>   mmc: uniphier-sd: fix Kconfig dependency

Sorry for not replying sooner, but I had thought I had.  This is too
much change I think for this late in the release cycle.  Sorry.

-- 
Tom


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[U-Boot] [PATCH] mx6ullevk: Add missing MAINTAINERS for mx6ull_14x14_evk_plugin_defconfig

2017-01-05 Thread Jagan Teki
Add 'Peng Fan' as MAINTAINERS of configs/mx6ull_14x14_evk_plugin_defconfig
which is missing in below commit
"imx: mx6ull_14x14_evk: add plugin defconfig"
(sha1: b90ebf49bb8f74afe68f696f59a0e24cc79f2031)

Cc: Stefano Babic 
Cc: Peng Fan 
Signed-off-by: Jagan Teki 
---
 board/freescale/mx6ullevk/MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/board/freescale/mx6ullevk/MAINTAINERS 
b/board/freescale/mx6ullevk/MAINTAINERS
index 4137674..73031cd 100644
--- a/board/freescale/mx6ullevk/MAINTAINERS
+++ b/board/freescale/mx6ullevk/MAINTAINERS
@@ -4,3 +4,4 @@ S:  Maintained
 F: board/freescale/mx6ullevk/
 F: include/configs/mx6ullevk.h
 F: configs/mx6ull_14x14_evk_defconfig
+F: configs/mx6ull_14x14_evk_plugin_defconfig
-- 
1.9.1

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Re: [U-Boot] [PATCH v4] BOARD: MCCMON6: Provide support for iMX6q based mccmon6 board

2017-01-05 Thread Stefano Babic
Hi Lukasz,

On 02/01/2017 15:51, Lukasz Majewski wrote:
> This patch provides u-boot support for Liebherr (LWN) mccmon6 board.
> 
> Signed-off-by: Lukasz Majewski 
> ---
> Changes for v4:
> - Update board/liebherr/mccmon6/MAINTAINERS entry to quiet buildman warnings
> 
> Changes for v3:
> - Define CONFIG_SYS_UBOOT_START to load u-boot image from NOR to correct 
> address
>   (so the SPL: NOR: Add CONFIG_SPL_NOR_COPY_ENTIRE_IMAGE define to enable 
> whole image copy from NOR
>   can be dropped)
> - Update author information
> 
> Changes for v2:
> - Provide space after "quiet" console boot parameter to not pollute next
>   parameters
> ---
>  arch/arm/cpu/armv7/mx6/Kconfig   |   5 +
>  board/liebherr/mccmon6/Kconfig   |  12 +
>  board/liebherr/mccmon6/MAINTAINERS   |   7 +
>  board/liebherr/mccmon6/Makefile  |   8 +
>  board/liebherr/mccmon6/mccmon6.c | 490 
> +++
>  board/liebherr/mccmon6/mon6_imximage_nor.cfg |   9 +
>  board/liebherr/mccmon6/mon6_imximage_sd.cfg  |   9 +
>  board/liebherr/mccmon6/spl.c | 317 +
>  configs/mccmon6_nor_defconfig|  36 ++
>  configs/mccmon6_sd_defconfig |  37 ++
>  include/configs/mccmon6.h| 333 ++
>  11 files changed, 1263 insertions(+)
>  create mode 100644 board/liebherr/mccmon6/Kconfig
>  create mode 100644 board/liebherr/mccmon6/MAINTAINERS
>  create mode 100644 board/liebherr/mccmon6/Makefile
>  create mode 100644 board/liebherr/mccmon6/mccmon6.c
>  create mode 100644 board/liebherr/mccmon6/mon6_imximage_nor.cfg
>  create mode 100644 board/liebherr/mccmon6/mon6_imximage_sd.cfg
>  create mode 100644 board/liebherr/mccmon6/spl.c
>  create mode 100644 configs/mccmon6_nor_defconfig
>  create mode 100644 configs/mccmon6_sd_defconfig
>  create mode 100644 include/configs/mccmon6.h
> 
> diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
> index c646966..9eddd7e 100644
> --- a/arch/arm/cpu/armv7/mx6/Kconfig
> +++ b/arch/arm/cpu/armv7/mx6/Kconfig
> @@ -114,6 +114,10 @@ config TARGET_KOSAGI_NOVENA
>   bool "Kosagi Novena"
>   select SUPPORT_SPL
>  
> +config TARGET_MCCMON6
> + bool "mccmon6"
> + select SUPPORT_SPL
> +
>  config TARGET_MX6CUBOXI
>   bool "Solid-run mx6 boards"
>   select SUPPORT_SPL
> @@ -327,6 +331,7 @@ source "board/phytec/pcm058/Kconfig"
>  source "board/gateworks/gw_ventana/Kconfig"
>  source "board/kosagi/novena/Kconfig"
>  source "board/samtec/vining_2000/Kconfig"
> +source "board/liebherr/mccmon6/Kconfig"
>  source "board/seco/Kconfig"
>  source "board/solidrun/mx6cuboxi/Kconfig"
>  source "board/technexion/pico-imx6ul/Kconfig"
> diff --git a/board/liebherr/mccmon6/Kconfig b/board/liebherr/mccmon6/Kconfig
> new file mode 100644
> index 000..4cc7fc2
> --- /dev/null
> +++ b/board/liebherr/mccmon6/Kconfig
> @@ -0,0 +1,12 @@
> +if TARGET_MCCMON6
> +
> +config SYS_BOARD
> + default "mccmon6"
> +
> +config SYS_VENDOR
> + default "liebherr"
> +
> +config SYS_CONFIG_NAME
> + default "mccmon6"
> +
> +endif
> diff --git a/board/liebherr/mccmon6/MAINTAINERS 
> b/board/liebherr/mccmon6/MAINTAINERS
> new file mode 100644
> index 000..c9c7183
> --- /dev/null
> +++ b/board/liebherr/mccmon6/MAINTAINERS
> @@ -0,0 +1,7 @@
> +MCCMON6 BOARD
> +M:   Lukasz Majewski 
> +S:   Maintained
> +F:   board/liebherr/mccmon6/
> +F:   include/configs/mccmon6.h
> +F:   configs/mccmon6_nor_defconfig
> +F:   configs/mccmon6_sd_defconfig
> diff --git a/board/liebherr/mccmon6/Makefile b/board/liebherr/mccmon6/Makefile
> new file mode 100644
> index 000..e37baf8
> --- /dev/null
> +++ b/board/liebherr/mccmon6/Makefile
> @@ -0,0 +1,8 @@
> +#
> +# (C) Copyright 2016-2017
> +# Lukasz Majewski, DENX Software Engineering, lu...@denx.de
> +#
> +# SPDX-License-Identifier:   GPL-2.0+
> +#
> +
> +obj-y  := mccmon6.o spl.o
> diff --git a/board/liebherr/mccmon6/mccmon6.c 
> b/board/liebherr/mccmon6/mccmon6.c
> new file mode 100644
> index 000..eb5eae4
> --- /dev/null
> +++ b/board/liebherr/mccmon6/mccmon6.c
> @@ -0,0 +1,490 @@
> +/*
> + * Copyright (C) 2016-2017
> + * Lukasz Majewski, DENX Software Engineering, lu...@denx.de
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP |\
> + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
> + PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
> +
> +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
> + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
> + PAD_CTL_SRE_FAST  | PAD_CTL_HYS)

[U-Boot] am335x based board nand boot crashes to ubi0 error

2017-01-05 Thread matti kaasinen
Hi!
I would need help related to nand boot with am335x based board. Board boots
from mmc (sd card), but not from nand flash.
I have been using yocto/poky build system with meta-ti layer that brings up
u-boot-ti-staging. Current u-boot version is 2016.05 and
linux-ti-staging-rt-4.4.

I have used am335x_evm config (include/configs/am335x_evm.h) that I have
made minor modifications to suit it to my board. Most of the modifications
are made to board/ti/am335x/board.c and mux.c to adapt to different
memories and pin mappings and lack of card id eeprom.

This story is "follow up" to
http://lists.denx.de/pipermail/u-boot/2017-January/277168.html. So, I2C was
initialized somehow when booting from mmc, but not when booting from nand.

"Follow up" part:
Board did still not start booting kernel even though I2C init problem was
fixed.

The reason was that boot_targets variable has been assigned with
mmc0 legacy_mmc0 mmc1 legacy_mmc1 nand0 pxe dhcp
when main u-boot is brought up. These values are iterated when
distro_bootcmd is executed.
distro_bootcmd=for target in ${boot_targets}; do run bootcmd_${target}; done
I made minor modification to distro_bootcmd:
distro_bootcmd=for target in ${boot_targets}; do echo "=== ${target}
===" ; run bootcmd_${target}; done
Please find the distro_bootcmd running results below:
=> run distro_bootcmd
=== mmc0 ===
Card did not respond to voltage select!
=== legacy_mmc0 ===
Card did not respond to voltage select!
Card did not respond to voltage select!
=== mmc1 ===
data abort
pc : [<8ff70fa0>]  lr : [<8ff701e9>]
reloc pc : [<8081dfa0>]lr : [<8081d1e9>]
sp : 8ef286f0  ip : 8ff5891d fp : 0003
r10: 8ffb3b18  r9 : 8ef32ed8 r8 : 8ef41b10
r7 : 8ff584bd  r6 : 8ef39478 r5 : 8ef39500  r4 : 4781
r3 : 8ff70f91  r2 : 00014892 r1 :   r0 : 8ef39500
Flags: nZCv  IRQs off  FIQs on  Mode SVC_32
Resetting CPU ...

So, MMC1 was troublemaker this time.
I removed mmc1 from that command - I do not have mmc1 on my board.
=> setenv boot_targets ' mmc0 legacy_mmc0  nand0 '

Please find modified command results below:
=> run distro_bootcmd
=== mmc0 ===
Card did not respond to voltage select!
=== legacy_mmc0 ===
Card did not respond to voltage select!
Card did not respond to voltage select!
=== nand0 ===
## Error: "bootcmd_nand0" not defined

NOTE!! Is this a bug in u-boot-ti? There is no bootcmd_nand0 in u-boot
memory at this time. However, there is bootcmd_nand. So, I changed nand0 to
nand
=> setenv boot_targets ' mmc0 legacy_mmc0  nand'
=> run distro_bootcmd
=== mmc0 ===
Card did not respond to voltage select!
=== legacy_mmc0 ===
Card did not respond to voltage select!
Card did not respond to voltage select!
=== nand ===
Booting from nand ...

NAND read: device 0 offset 0x8, size 0x4
 262144 bytes read: OK

NAND read: device 0 offset 0x20, size 0x80
 8388608 bytes read: OK
Kernel image @ 0x8200 [ 0x00 - 0x2c4fd8 ]
## Flattened Device Tree blob at 8800
   Booting using the fdt blob at 0x8800
   Loading Device Tree to 8ef1b000, end 8ef27614 ... OK

Starting kernel ...

[0.00] Booting Linux on physical CPU 0x0
[0.00] Initializing cgroup subsys cpu

... lots of listing and then ..
[1.172458] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda
[1.179257] nand: Micron MT29F2G08ABAEAWP
[1.183469] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048,
OOB size: 64
[1.191491] nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme
[1.197164] 10 ofpart partitions found on MTD device 800.nand
[1.203607] Creating 10 MTD partitions on "800.nand":
[1.209285] 0x-0x0002 : "NAND.SPL"
[1.216261] 0x0002-0x0004 : "NAND.SPL.backup1"
[1.223834] 0x0004-0x0006 : "NAND.SPL.backup2"
[1.231275] 0x0006-0x0008 : "NAND.SPL.backup3"
[1.238794] 0x0008-0x000c : "NAND.u-boot-spl-os"
[1.246571] 0x000c-0x001c : "NAND.u-boot"
[1.254316] 0x001c-0x001e : "NAND.u-boot-env"
[1.261612] 0x001e-0x0020 : "NAND.u-boot-env.backup1"
[1.269653] 0x0020-0x00a0 : "NAND.kernel"
[1.283112] 0x00a0-0x1000 : "NAND.file-system"
[1.520856] tps65217 0-0024: TPS65217 ID 0xe version 1.2
[1.526486] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
[1.533461] omap_i2c 4802a000.i2c: bus 1 rev0.11 at 400 kHz
[1.539830] ubi0: attaching mtd9
[1.543810] ubi0 error: validate_ec_hdr: bad VID header offset 512,
expected 2048
[1.551672] ubi0 error: validate_ec_hdr: bad EC header
[1.557063] Erase counter header dump:
[1.560998]  magic  0x55424923
[1.564930]  version1
[1.568041]  ec 1
[1.571151]  vid_hdr_offset 512
[1.57]  data_offset2048
[1.577831]  image_seq  1630296601
[1.581762]  

Re: [U-Boot] [U-Boot, 22/24] powerpc: E6500: Move macro CONFIG_E6500 to Kconfig

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:48AM -0800, York Sun wrote:

> Use Kconfig option E6500 and clean up existing usage.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 24/24] powerpc: mpc85xx: Move macro CONFIG_SYS_PPC64 to Kconfig

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:50AM -0800, York Sun wrote:

> Use Kconfig option SYS_PPC64 instead.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 23/24] powerpc: mpc85xx: Move CONFIG_SYS_FSL_QORIQ_CHASSIS* to Kconfig

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:49AM -0800, York Sun wrote:

> Use Kconfig option to select chassis version.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 21/24] powerpc: mpc85xx: Remove unused ifdef in config header

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:47AM -0800, York Sun wrote:

> After most config options are moved to Kconfig, the unused ifdef
> or elif can be removed.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 20/24] ddr: fsl: Move CONFIG_SYS_FSL_DDR_VER to Kconfig

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:46AM -0800, York Sun wrote:

> Use Kconfig to select DDR version instead of using config header.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 17/24] powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:43AM -0800, York Sun wrote:

> Use Kconfig to select errata workaround.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 18/24] ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to Kconfig

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:44AM -0800, York Sun wrote:

> Use option NUM_DDR_CONTROLLERS in ddr Kconfig and clean up existing
> usage in ls102xa and fsl-layerscape. Remove all powerpc macros in
> config header and board header files.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 16/24] mmc: move CONFIG_SYS_FSL_ERRATUM_ESDHC* to Kconfig

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:42AM -0800, York Sun wrote:

> Add option SYS_FSL_ERRATUM_ESDHC111, SYS_FSL_ERRATUM_ESDHC13,
> SYS_FSL_ERRATUM_ESDHC135, SYS_FSL_ERRATUM_ESDHC_A001 to mmc Kconfig.
> Move existing macros to related Kconfig.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, 12/24] powerpc: T2081QDS: Remove macro T2081QDS

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:38AM -0800, York Sun wrote:

> Use TARGET_T2081QDS from Kconfig instead.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 15/24] arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:41AM -0800, York Sun wrote:

> Use Kconfig to select errata workaround.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, 14/24] fsl_ddr: Move DDR config options to driver Kconfig

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:40AM -0800, York Sun wrote:

> Create driver/ddr/fsl/Kconfig and move existing options. Clean up
> existing macros.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, 13/24] powerpc: T104xQDS: Remove macro CONFIG_T104xD4QDS

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:39AM -0800, York Sun wrote:

> Remove this macro. It was added by e622d9ed but actually wasn't used.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, 11/24] powerpc: T2080RDB: Remove macro CONFIG_T2080RDB

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:37AM -0800, York Sun wrote:

> Use TARGET_T2080RDB from Kconfig instead.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, 09/24] powerpc: T1040QDS: Remove macro CONFIG_T1040QDS

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:35AM -0800, York Sun wrote:

> Use TARGET_T1040QDS from Kconfig instead.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, 06/24] powerpc: mpc85xx: Remove variant SoCs T1020/T1022/T1013/T1014

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:32AM -0800, York Sun wrote:

> Remove these SoCs from Kconfig because they don't have individual
> configuration. Clean up existing macros.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, 05/24] crypto: Move CONFIG_SYS_FSL_SEC_LE and _BE to Kconfig

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:31AM -0800, York Sun wrote:

> Use Kconfig option to set little- or big-endian access to secure
> boot and trust architecture.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

-- 
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Re: [U-Boot] [U-Boot, 03/24] powerpc: mpc85xx: Move CONFIG_SYS_PPC_E500_DEBUG_TLB to Kconfig

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:29AM -0800, York Sun wrote:

> Use Kconfig SYS_PPC_E500_DEBUG_TLB and clean up existing macros.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 04/24] crypto: Move SYS_FSL_SEC_COMPAT into driver Kconfig

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:30AM -0800, York Sun wrote:

> Instead of define CONFIG_SYS_FSL_SEC_COMPAT in header files for PowerPC
> and ARM SoCs, move it to Kconfig under the driver.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [U-Boot, 02/24] powerpc: mpc85xx: Move CONFIG_SYS_NUM_TLBCAMS to Kconfig

2017-01-05 Thread Tom Rini
On Wed, Dec 28, 2016 at 08:43:28AM -0800, York Sun wrote:

> Use Kconfig option for SYS_NUM_TLBCAMS and clean up existing macros.
> 
> Signed-off-by: York Sun 

Applied to u-boot/master, thanks!

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Re: [U-Boot] Pull request, u-boot-tegra/master

2017-01-05 Thread Tom Rini
On Wed, Jan 04, 2017 at 10:05:55AM -0700, Tom Warren wrote:

> Tom,
> 
> Please pull u-boot-tegra/master into U-Boot/master. Thanks!
> 
> All Tegra builds are OK, and Stephen's automated test system reports that
> all tests pass.
> 
> The following changes since commit 87f5f5417fc897df0b05826b408f0f4b7d2ee388:
> 
>   Prepare v2017.01-rc3 (2017-01-02 20:00:55 -0500)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-tegra.git master
> 
> for you to fetch changes up to 7298b3052f74327748071f0a1f0ad9a0af254ca9:
> 
>   ARM: dts: tegra: Sync paz00 with Linux 4.8 (2017-01-03 10:34:13 -0700)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 1/4] mmc: fsl_esdhc: make GPIO support optional

2017-01-05 Thread Y.B. Lu
> -Original Message-
> From: Jaehoon Chung [mailto:jh80.ch...@samsung.com]
> Sent: Thursday, January 05, 2017 8:33 AM
> To: york sun; Y.B. Lu
> Cc: u-boot@lists.denx.de
> Subject: Re: [PATCH 1/4] mmc: fsl_esdhc: make GPIO support optional
> 
> Hi,
> 
> On 01/05/2017 04:52 AM, york sun wrote:
> > On 12/06/2016 08:08 PM, Yangbo Lu wrote:
> >> There would be compiling error as below when enable driver model for
> esdhc.
> >> undefined reference to `dm_gpio_get_value'
> >> undefined reference to `gpio_request_by_name_nodev'
> >> This patch is to make GPIO support optional with CONFIG_DM_GPIO.
> >> Because all boards of QorIQ platform don't need it and they just
> >> check register for CD/WP status, only some boards of i.MX platform
> require this.
> >>
> >> Signed-off-by: Yangbo Lu 
> >> ---
> >>  drivers/mmc/fsl_esdhc.c | 10 --
> >>  1 file changed, 8 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index
> >> 9796d39..da3a151 100644
> >> --- a/drivers/mmc/fsl_esdhc.c
> >> +++ b/drivers/mmc/fsl_esdhc.c
> >> @@ -104,8 +104,10 @@ struct fsl_esdhc_priv {
> >>struct udevice *dev;
> >>int non_removable;
> >>int wp_enable;
> >> +#ifdef CONFIG_DM_GPIO
> >>struct gpio_desc cd_gpio;
> >>struct gpio_desc wp_gpio;
> >> +#endif
> >>  };
> >>
> >>  /* Return the XFERTYP flags for a given command and data packet */
> >> @@ -687,10 +689,11 @@ static int esdhc_getcd(struct mmc *mmc)  #ifdef
> >> CONFIG_DM_MMC
> >>if (priv->non_removable)
> >>return 1;
> >> -
> >> +#ifdef CONFIG_DM_GPIO
> >>if (dm_gpio_is_valid(>cd_gpio))
> >>return dm_gpio_get_value(>cd_gpio);
> >>  #endif
> >> +#endif
> >>
> >>while (!(esdhc_read32(>prsstat) & PRSSTAT_CINS) && --timeout)
> >>udelay(1000);
> >> @@ -967,17 +970,20 @@ static int fsl_esdhc_probe(struct udevice *dev)
> >>priv->non_removable = 1;
> >> } else {
> >>priv->non_removable = 0;
> >> +#ifdef CONFIG_DM_GPIO
> >>gpio_request_by_name_nodev(fdt, node, "cd-gpios", 0,
> >>   >cd_gpio, GPIOD_IS_IN);
> >> +#endif
> >>}
> >>
> >>priv->wp_enable = 1;
> >>
> >> +#ifdef CONFIG_DM_GPIO
> >>ret = gpio_request_by_name_nodev(fdt, node, "wp-gpios", 0,
> >> >wp_gpio, GPIOD_IS_IN);
> >>if (ret)
> >>priv->wp_enable = 0;
> >> -
> >> +#endif
> >>/*
> >> * TODO:
> >> * Because lack of clk driver, if SDHC clk is not enabled,
> >>
> >
> > Jaehoon,
> >
> > This set looks OK to me. Please review and comment. I can merge it
> > with your ack.
> 
> Sorry for late. I missed this patch. It looks good to me.
> 
> Acked-by: Jaehoon Chung 

[Lu Yangbo-B47093] Thanks a lot for your reviewing, Jaehoon :)
> 
> Best Regards,
> Jaehoon Chung
> 
> >
> > Yangbo,
> >
> > For MMC or SD patches, please CC Jaehoon.
> >
> > York
> >
> >
> >

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[U-Boot] [PATCH v6 6/9] rockchip: Enable networking support on rock2 and firefly

2017-01-05 Thread Romain Perier
From: Sjoerd Simons 

Enable the various configuration option required to get the ethernet
interface up and running on Radxa Rock2 and Firefly.

Signed-off-by: Sjoerd Simons 
Signed-off-by: Romain Perier 
Reviewed-by: Simon Glass 
Acked-by: Joe Hershberger 
---

Changes in v6:
- Changed Acked-by to Signed-off-by for Romain
Changes in v5:
- Added Acked-by for Romain
- Replaced CONFIG_GMAC_RK3288 by CONFIG_GMAC_ROCKCHIP
Changes in v4: None
Changes in v3: None
Changes in v2: None

 configs/firefly-rk3288_defconfig | 4 
 configs/rock2_defconfig  | 4 
 2 files changed, 8 insertions(+)

diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 4910c80cd8..3431464a2f 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -44,6 +44,10 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_ROCKCHIP_DWMMC=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
index 1883f07320..a57b3de042 100644
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@@ -43,6 +43,10 @@ CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_ROCKCHIP_DWMMC=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
-- 
2.11.0

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[U-Boot] [PATCH v6 8/9] rockchip: Add PXE and DHCP to the default boot targets

2017-01-05 Thread Romain Perier
From: Sjoerd Simons 

Now that at least on the firefly board we have network support, enable
PXE and DHCP boot targets by default.

Signed-off-by: Sjoerd Simons 
Acked-by: Simon Glass 
Acked-by: Joe Hershberger 
---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 include/configs/rockchip-common.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/configs/rockchip-common.h 
b/include/configs/rockchip-common.h
index 9ec71c4baa..be53e659ee 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -14,7 +14,9 @@
 /* First try to boot from SD (index 0), then eMMC (index 1 */
 #define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
-   func(MMC, mmc, 1)
+   func(MMC, mmc, 1) \
+   func(PXE, pxe, na) \
+   func(DHCP, dchp, na)
 
  /* Enable gpt partition table */
 #define CONFIG_CMD_GPT
-- 
2.11.0

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[U-Boot] [PATCH v6 9/9] rockchip: Drop Ethernet from the TODO

2017-01-05 Thread Romain Perier
From: Sjoerd Simons 

Now that ethernet support works, it can be dropped from the rockchip
TODO

Signed-off-by: Sjoerd Simons 
Acked-by: Simon Glass 
Acked-by: Joe Hershberger 
Signed-off-by: Simon Glass 
---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- Add a few new patches
- Drop the 'net: designware: Add a fix_mac_speed hook' patch

 doc/README.rockchip | 1 -
 1 file changed, 1 deletion(-)

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 06ec80e523..43cafc7bd6 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -219,7 +219,6 @@ Immediate priorities are:
 - USB host
 - USB device
 - Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
-- Ethernet
 - NAND flash
 - Support for other Rockchip parts
 - Boot U-Boot proper over USB OTG (at present only SPL works)
-- 
2.11.0

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[U-Boot] [PATCH v6 4/9] net: designware: Export the operation functions

2017-01-05 Thread Romain Perier
From: Simon Glass 

Export all functions so that drivers can use them, or not, as the need
arises.

Signed-off-by: Simon Glass 
Signed-off-by: Romain Perier 
Acked-by: Joe Hershberger 
---

Changes in v6:
- Changed Acked-by to Signed-off-by for Romain
Changes in v5:
- Add Acked-by for Romain
Changes in v4: None
Changes in v3:
- Add new patch to export the operation functions

Changes in v2: None

 drivers/net/designware.c | 19 +--
 drivers/net/designware.h |  9 +
 2 files changed, 18 insertions(+), 10 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 0c596a7aea..f242fc6b3f 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -271,7 +271,7 @@ static void _dw_eth_halt(struct dw_eth_dev *priv)
phy_shutdown(priv->phydev);
 }
 
-static int _dw_eth_init(struct dw_eth_dev *priv, u8 *enetaddr)
+int designware_eth_init(struct dw_eth_dev *priv, u8 *enetaddr)
 {
struct eth_mac_regs *mac_p = priv->mac_regs_p;
struct eth_dma_regs *dma_p = priv->dma_regs_p;
@@ -330,7 +330,7 @@ static int _dw_eth_init(struct dw_eth_dev *priv, u8 
*enetaddr)
return 0;
 }
 
-static int designware_eth_enable(struct dw_eth_dev *priv)
+int designware_eth_enable(struct dw_eth_dev *priv)
 {
struct eth_mac_regs *mac_p = priv->mac_regs_p;
 
@@ -493,7 +493,7 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis)
 {
int ret;
 
-   ret = _dw_eth_init(dev->priv, dev->enetaddr);
+   ret = designware_eth_init(dev->priv, dev->enetaddr);
if (!ret)
ret = designware_eth_enable(dev->priv);
 
@@ -591,7 +591,7 @@ static int designware_eth_start(struct udevice *dev)
struct dw_eth_dev *priv = dev_get_priv(dev);
int ret;
 
-   ret = _dw_eth_init(priv, pdata->enetaddr);
+   ret = designware_eth_init(priv, pdata->enetaddr);
if (ret)
return ret;
ret = designware_eth_enable(priv);
@@ -601,36 +601,35 @@ static int designware_eth_start(struct udevice *dev)
return 0;
 }
 
-static int designware_eth_send(struct udevice *dev, void *packet, int length)
+int designware_eth_send(struct udevice *dev, void *packet, int length)
 {
struct dw_eth_dev *priv = dev_get_priv(dev);
 
return _dw_eth_send(priv, packet, length);
 }
 
-static int designware_eth_recv(struct udevice *dev, int flags, uchar **packetp)
+int designware_eth_recv(struct udevice *dev, int flags, uchar **packetp)
 {
struct dw_eth_dev *priv = dev_get_priv(dev);
 
return _dw_eth_recv(priv, packetp);
 }
 
-static int designware_eth_free_pkt(struct udevice *dev, uchar *packet,
-  int length)
+int designware_eth_free_pkt(struct udevice *dev, uchar *packet, int length)
 {
struct dw_eth_dev *priv = dev_get_priv(dev);
 
return _dw_free_pkt(priv);
 }
 
-static void designware_eth_stop(struct udevice *dev)
+void designware_eth_stop(struct udevice *dev)
 {
struct dw_eth_dev *priv = dev_get_priv(dev);
 
return _dw_eth_halt(priv);
 }
 
-static int designware_eth_write_hwaddr(struct udevice *dev)
+int designware_eth_write_hwaddr(struct udevice *dev)
 {
struct eth_pdata *pdata = dev_get_platdata(dev);
struct dw_eth_dev *priv = dev_get_priv(dev);
diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index 087ebef297..7992d0ebee 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -253,6 +253,15 @@ struct dw_eth_pdata {
struct eth_pdata eth_pdata;
u32 reset_delays[3];
 };
+
+int designware_eth_init(struct dw_eth_dev *priv, u8 *enetaddr);
+int designware_eth_enable(struct dw_eth_dev *priv);
+int designware_eth_send(struct udevice *dev, void *packet, int length);
+int designware_eth_recv(struct udevice *dev, int flags, uchar **packetp);
+int designware_eth_free_pkt(struct udevice *dev, uchar *packet,
+  int length);
+void designware_eth_stop(struct udevice *dev);
+int designware_eth_write_hwaddr(struct udevice *dev);
 #endif
 
 #endif
-- 
2.11.0

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[U-Boot] [PATCH v6 5/9] net: gmac_rockchip: Add Rockchip GMAC driver

2017-01-05 Thread Romain Perier
From: Sjoerd Simons 

Add a new driver for the GMAC ethernet interface present in Rockchip
RK3288 SOCs. This driver subclasses the generic design-ware driver to
add the glue needed specifically for Rockchip.

Signed-off-by: Sjoerd Simons 
Signed-off-by: Simon Glass 
Signed-off-by: Romain Perier 
Acked-by: Joe Hershberger 
---

Changes in v6:
- Changed Acked-by to Signed-off-by for Romain
Changes in v5:
- Rename the driver to gmac_rockchip as suggested by David Wu
- Rewrote commit message (gmac_rk3288 -> gmac_rockchip)
- Added Acked-by for Romain

Changes in v4: None
Changes in v3:
- Add comments for struct gmac_rk3288_platdata
- Adjust binding to use r/tx-delay instead of r/tx_delay
- Sort includes
- Use debug() instead of printf() for error
- Use function calls instead of fix_mac_speed() hook
- Use new clk interface

 drivers/net/Kconfig |   7 ++
 drivers/net/Makefile|   1 +
 drivers/net/gmac_rockchip.c | 154 
 3 files changed, 162 insertions(+)
 create mode 100644 drivers/net/gmac_rockchip.c

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index f25d3ffa9b..53837ed90a 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -215,4 +215,11 @@ config PIC32_ETH
  This driver implements 10/100 Mbps Ethernet and MAC layer for
  Microchip PIC32 microcontrollers.
 
+config GMAC_ROCKCHIP
+   bool "Rockchip Synopsys Designware Ethernet MAC"
+   depends on DM_ETH && ETH_DESIGNWARE
+   help
+ This driver provides Rockchip SoCs network support based on the
+ Synopsys Designware driver.
+
 endif # NETDEVICES
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 9a7bfc6d5b..2493a48b88 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_FTGMAC100) += ftgmac100.o
 obj-$(CONFIG_FTMAC110) += ftmac110.o
 obj-$(CONFIG_FTMAC100) += ftmac100.o
 obj-$(CONFIG_GRETH) += greth.o
+obj-$(CONFIG_GMAC_ROCKCHIP) += gmac_rockchip.o
 obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_net.o
 obj-$(CONFIG_KS8851_MLL) += ks8851_mll.o
 obj-$(CONFIG_LAN91C96) += lan91c96.o
diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
new file mode 100644
index 00..5f833fa711
--- /dev/null
+++ b/drivers/net/gmac_rockchip.c
@@ -0,0 +1,154 @@
+/*
+ * (C) Copyright 2015 Sjoerd Simons 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Rockchip GMAC ethernet IP driver for U-Boot
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "designware.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Platform data for the gmac
+ *
+ * dw_eth_pdata: Required platform data for designware driver (must be first)
+ */
+struct gmac_rockchip_platdata {
+   struct dw_eth_pdata dw_eth_pdata;
+   int tx_delay;
+   int rx_delay;
+};
+
+static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
+{
+   struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
+
+   pdata->tx_delay = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+"tx-delay", 0x30);
+   pdata->rx_delay = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+"rx-delay", 0x10);
+
+   return designware_eth_ofdata_to_platdata(dev);
+}
+
+static int gmac_rockchip_fix_mac_speed(struct dw_eth_dev *priv)
+{
+   struct rk3288_grf *grf;
+   int clk;
+
+   switch (priv->phydev->speed) {
+   case 10:
+   clk = GMAC_CLK_SEL_2_5M;
+   break;
+   case 100:
+   clk = GMAC_CLK_SEL_25M;
+   break;
+   case 1000:
+   clk = GMAC_CLK_SEL_125M;
+   break;
+   default:
+   debug("Unknown phy speed: %d\n", priv->phydev->speed);
+   return -EINVAL;
+   }
+
+   grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+   rk_clrsetreg(>soc_con1,
+GMAC_CLK_SEL_MASK << GMAC_CLK_SEL_SHIFT,
+clk << GMAC_CLK_SEL_SHIFT);
+
+   return 0;
+}
+
+static int gmac_rockchip_probe(struct udevice *dev)
+{
+   struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
+   struct rk3288_grf *grf;
+   struct clk clk;
+   int ret;
+
+   ret = clk_get_by_index(dev, 0, );
+   if (ret)
+   return ret;
+
+   /* Since mac_clk is fed by an external clock we can use 0 here */
+   ret = clk_set_rate(, 0);
+   if (ret)
+   return ret;
+
+   /* Set to RGMII mode */
+   grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+   rk_clrsetreg(>soc_con1,
+RMII_MODE_MASK << RMII_MODE_SHIFT |
+GMAC_PHY_INTF_SEL_MASK << GMAC_PHY_INTF_SEL_SHIFT,
+  

[U-Boot] [PATCH v6 3/9] net: designware: Split the link init into a separate function

2017-01-05 Thread Romain Perier
From: Simon Glass 

With rockchip we need to make adjustments after the link speed is set but
before enabling received/transmit. In preparation for this, split these
two pieces into separate functions.

Signed-off-by: Simon Glass 
Signed-off-by: Romain Perier 
Acked-by: Joe Hershberger 
---

Changes in v6:
- Changed Acked-by to Signed-off-by for Romain
Changes in v5:
- Added Acked-by for Romain
Changes in v4: None
Changes in v3:
- Add new patch to split the link init into a separate function

Changes in v2: None

 drivers/net/designware.c | 26 --
 1 file changed, 24 insertions(+), 2 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index ebcef8beaa..0c596a7aea 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -327,6 +327,13 @@ static int _dw_eth_init(struct dw_eth_dev *priv, u8 
*enetaddr)
if (ret)
return ret;
 
+   return 0;
+}
+
+static int designware_eth_enable(struct dw_eth_dev *priv)
+{
+   struct eth_mac_regs *mac_p = priv->mac_regs_p;
+
if (!priv->phydev->link)
return -EIO;
 
@@ -484,7 +491,13 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
 #ifndef CONFIG_DM_ETH
 static int dw_eth_init(struct eth_device *dev, bd_t *bis)
 {
-   return _dw_eth_init(dev->priv, dev->enetaddr);
+   int ret;
+
+   ret = _dw_eth_init(dev->priv, dev->enetaddr);
+   if (!ret)
+   ret = designware_eth_enable(dev->priv);
+
+   return ret;
 }
 
 static int dw_eth_send(struct eth_device *dev, void *packet, int length)
@@ -575,8 +588,17 @@ int designware_initialize(ulong base_addr, u32 interface)
 static int designware_eth_start(struct udevice *dev)
 {
struct eth_pdata *pdata = dev_get_platdata(dev);
+   struct dw_eth_dev *priv = dev_get_priv(dev);
+   int ret;
 
-   return _dw_eth_init(dev->priv, pdata->enetaddr);
+   ret = _dw_eth_init(priv, pdata->enetaddr);
+   if (ret)
+   return ret;
+   ret = designware_eth_enable(priv);
+   if (ret)
+   return ret;
+
+   return 0;
 }
 
 static int designware_eth_send(struct udevice *dev, void *packet, int length)
-- 
2.11.0

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[U-Boot] [PATCH v6 2/9] net: designware: Adjust dw_adjust_link() to return an error

2017-01-05 Thread Romain Perier
From: Simon Glass 

This function can fail, so return the error if there is one.

Signed-off-by: Simon Glass 
Signed-off-by: Romain Perier 
Acked-by: Joe Hershberger 
---

Changes in v6:
- Changed Acked-by to Signed-off-by for Romain
Changes in v5:
- Add Acked-by for Romain
Changes in v4: None
Changes in v3:
- Add new patch to adjust dw_adjust_link() to return an error

Changes in v2: None

 drivers/net/designware.c | 12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 6ef36bc8cb..ebcef8beaa 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -230,14 +230,14 @@ static int _dw_write_hwaddr(struct dw_eth_dev *priv, u8 
*mac_id)
return 0;
 }
 
-static void dw_adjust_link(struct eth_mac_regs *mac_p,
-  struct phy_device *phydev)
+static int dw_adjust_link(struct dw_eth_dev *priv, struct eth_mac_regs *mac_p,
+ struct phy_device *phydev)
 {
u32 conf = readl(_p->conf) | FRAMEBURSTENABLE | DISABLERXOWN;
 
if (!phydev->link) {
printf("%s: No link.\n", phydev->dev->name);
-   return;
+   return 0;
}
 
if (phydev->speed != 1000)
@@ -256,6 +256,8 @@ static void dw_adjust_link(struct eth_mac_regs *mac_p,
printf("Speed: %d, %s duplex%s\n", phydev->speed,
   (phydev->duplex) ? "full" : "half",
   (phydev->port == PORT_FIBRE) ? ", fiber mode" : "");
+
+   return 0;
 }
 
 static void _dw_eth_halt(struct dw_eth_dev *priv)
@@ -321,7 +323,9 @@ static int _dw_eth_init(struct dw_eth_dev *priv, u8 
*enetaddr)
return ret;
}
 
-   dw_adjust_link(mac_p, priv->phydev);
+   ret = dw_adjust_link(priv, mac_p, priv->phydev);
+   if (ret)
+   return ret;
 
if (!priv->phydev->link)
return -EIO;
-- 
2.11.0

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[U-Boot] [PATCH v6 0/9] rockchip: Add gmac Ethernet support

2017-01-05 Thread Romain Perier
>From Romain:
This is a resent of Simon's v4 series. I have changed what was suggested
by David Wu about the driver name (rename gmac_rk3288 to gmac_rockchip).
I have also tested the whole series on a rock2 square board, updated the
configuration files for rock2 and firefly boards and added some
Signed-off-by tags.

>From Simon:
This v3 patch is an update on Sjoerd's original v2 series from Feburary.
I have dealt with the changes requested at the time, and adjusted the way
that the speed change is handled.

Tested on firefly-rk3288, rock2.

Original cover letter:
To add support I've taken a slightly different approach then some of the
other boards with a designware IP block, by creating a new driver to
take care of the platfrom glue which subclasses the main designware driver
instead of adding the compatibility string the designware driver
directly and doing the SoC specific setup in the board files. This seems
quite a bit more elegant in a device model based world.

I've only tested this series on a Radxa Rock 2 board, it would be great
if someone could test this on other boards with the designware IP
especially for those with the reset GPIO in devicetree (e.g. some of the
Allwinner boards).

Compared to the first one round the pinctrl related bits were dropped as
RK3288 now has a full pinctrl driver. Furthermore the started hook in the
designware driver was renamed to fix_mac_speed in line with what linux
uses and moved to the dw_link_adjust function.

Changes in v6:
- Changed Acked-by to Signed-off-by for Romain in commits from
  [PATCH 01/09] to [PATCH 06/09]

Changes in v5:
- Changed the name of the driver gmac_rk3288 to gmac_rockchip, as
  suggested by David Wu. Also I rewrote the commit message
- Added my Acked-by to commits from [PATCH 01/09] to [PATCH 06/09]
- Updated configuration files for rock2 and firefly with the new
  Kconfig symbol

Changes in v4:
- Fix commit message to say 'rk3399'

Changes in v3:
- Add a few new patches
- Add comments for struct gmac_rk3288_platdata
- Add new patch to adjust dw_adjust_link() to return an error
- Add new patch to enable networking on evb-rk3399
- Add new patch to export the operation functions
- Add new patch to split the link init into a separate function
- Adjust binding to use r/tx-delay instead of r/tx_delay
- Drop the 'net: designware: Add a fix_mac_speed hook' patch
- Sort includes
- Use debug() instead of printf() for error
- Use function calls instead of fix_mac_speed() hook
- Use new clk interface

Changes in v2:
- Adjust to new hook name
- Fix various coding style nits

Simon Glass (4):
  net: designware: Adjust dw_adjust_link() to return an error
  net: designware: Split the link init into a separate function
  net: designware: Export the operation functions
  rockchip: evb-rk3339: Enable DHCP

Sjoerd Simons (5):
  net: designware: Export various functions/struct to allow subclassing
  net: gmac_rockchip: Add Rockchip GMAC driver
  rockchip: Enable networking support on rock2 and firefly
  rockchip: Add PXE and DHCP to the default boot targets
  rockchip: Drop Ethernet from the TODO

 configs/evb-rk3399_defconfig  |   3 +
 configs/firefly-rk3288_defconfig  |   4 +
 configs/rock2_defconfig   |   4 +
 doc/README.rockchip   |   1 -
 drivers/net/Kconfig   |   7 ++
 drivers/net/Makefile  |   1 +
 drivers/net/designware.c  |  57 ++
 drivers/net/designware.h  |  13 
 drivers/net/gmac_rockchip.c   | 154 ++
 include/configs/rockchip-common.h |   4 +-
 10 files changed, 230 insertions(+), 18 deletions(-)
 create mode 100644 drivers/net/gmac_rockchip.c

-- 
2.11.0

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[U-Boot] [PATCH v5 7/9] rockchip: evb-rk3339: Enable DHCP

2017-01-05 Thread Romain Perier
From: Simon Glass 

This is the only RK3399 device without DHCP. Enable it so that we
can use a common BOOT_TARGET_DEVICES setting. It is likely useful to be
able to use USB networking, at least. Full networking can be enabled when
a suitable platform needs it.

Signed-off-by: Simon Glass 
---

Changes in v5: None
Changes in v4:
- Fix commit message to say 'rk3399'

Changes in v3:
- Add new patch to enable networking on evb-rk3399

Changes in v2: None

 configs/evb-rk3399_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 40a8295417..be522fbd74 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -11,6 +11,9 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
-- 
2.11.0

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[U-Boot] [PATCH v5 0/9] rockchip: Add gmac Ethernet support

2017-01-05 Thread Romain Perier
>From Simon:
This v3 patch is an update on Sjoerd's original v2 series from Feburary.
I have dealt with the changes requested at the time, and adjusted the way
that the speed change is handled.

Tested on firefly-rk3288, rock2.

Original cover letter:
To add support I've taken a slightly different approach then some of the
other boards with a designware IP block, by creating a new driver to
take care of the platfrom glue which subclasses the main designware driver
instead of adding the compatibility string the designware driver
directly and doing the SoC specific setup in the board files. This seems
quite a bit more elegant in a device model based world.

I've only tested this series on a Radxa Rock 2 board, it would be great
if someone could test this on other boards with the designware IP
especially for those with the reset GPIO in devicetree (e.g. some of the
Allwinner boards).

Compared to the first one round the pinctrl related bits were dropped as
RK3288 now has a full pinctrl driver. Furthermore the started hook in the
designware driver was renamed to fix_mac_speed in line with what linux
uses and moved to the dw_link_adjust function.

Changes in v5:
- Changed the commit message for gmac
- Added my Acked-by to few commits

Changes in v4:
- Fix commit message to say 'rk3399'

Changes in v3:
- Add a few new patches
- Add comments for struct gmac_rk3288_platdata
- Add new patch to adjust dw_adjust_link() to return an error
- Add new patch to enable networking on evb-rk3399
- Add new patch to export the operation functions
- Add new patch to split the link init into a separate function
- Adjust binding to use r/tx-delay instead of r/tx_delay
- Drop the 'net: designware: Add a fix_mac_speed hook' patch
- Sort includes
- Use debug() instead of printf() for error
- Use function calls instead of fix_mac_speed() hook
- Use new clk interface

Changes in v2:
- Adjust to new hook name
- Fix various coding style nits

Simon Glass (4):
  net: designware: Adjust dw_adjust_link() to return an error
  net: designware: Split the link init into a separate function
  net: designware: Export the operation functions
  rockchip: evb-rk3339: Enable DHCP

Sjoerd Simons (5):
  net: designware: Export various functions/struct to allow subclassing
  net: gmac_rockchip: Add Rockchip GMAC driver
  rockchip: Enable networking support on rock2 and firefly
  rockchip: Add PXE and DHCP to the default boot targets
  rockchip: Drop Ethernet from the TODO

 configs/evb-rk3399_defconfig  |   3 +
 configs/firefly-rk3288_defconfig  |   4 +
 configs/rock2_defconfig   |   4 +
 doc/README.rockchip   |   1 -
 drivers/net/Kconfig   |   7 ++
 drivers/net/Makefile  |   1 +
 drivers/net/designware.c  |  57 ++
 drivers/net/designware.h  |  13 
 drivers/net/gmac_rockchip.c   | 154 ++
 include/configs/rockchip-common.h |   4 +-
 10 files changed, 230 insertions(+), 18 deletions(-)
 create mode 100644 drivers/net/gmac_rockchip.c

-- 
2.11.0

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[U-Boot] [PATCH v6 1/9] net: designware: Export various functions/struct to allow subclassing

2017-01-05 Thread Romain Perier
From: Sjoerd Simons 

To allow other DM drivers to subclass the designware driver various
functions and structures need to be exported. Export these.

Signed-off-by: Sjoerd Simons 
Signed-off-by: Romain Perier 
Reviewed-by: Bin Meng 
Acked-by: Simon Glass 
Acked-by: Joe Hershberger 
---

Changes in v6:
- Acked-by -> Signed-off-by for Romain

Changes in v5:
- Added Acked-by for Romain

Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/net/designware.c | 6 +++---
 drivers/net/designware.h | 4 
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 9e6d726184..6ef36bc8cb 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -628,7 +628,7 @@ static int designware_eth_bind(struct udevice *dev)
return 0;
 }
 
-static int designware_eth_probe(struct udevice *dev)
+int designware_eth_probe(struct udevice *dev)
 {
struct eth_pdata *pdata = dev_get_platdata(dev);
struct dw_eth_dev *priv = dev_get_priv(dev);
@@ -678,7 +678,7 @@ static int designware_eth_remove(struct udevice *dev)
return 0;
 }
 
-static const struct eth_ops designware_eth_ops = {
+const struct eth_ops designware_eth_ops = {
.start  = designware_eth_start,
.send   = designware_eth_send,
.recv   = designware_eth_recv,
@@ -687,7 +687,7 @@ static const struct eth_ops designware_eth_ops = {
.write_hwaddr   = designware_eth_write_hwaddr,
 };
 
-static int designware_eth_ofdata_to_platdata(struct udevice *dev)
+int designware_eth_ofdata_to_platdata(struct udevice *dev)
 {
struct dw_eth_pdata *dw_pdata = dev_get_platdata(dev);
 #ifdef CONFIG_DM_GPIO
diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index d345c5b0c3..087ebef297 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -245,6 +245,10 @@ struct dw_eth_dev {
 };
 
 #ifdef CONFIG_DM_ETH
+int designware_eth_ofdata_to_platdata(struct udevice *dev);
+int designware_eth_probe(struct udevice *dev);
+extern const struct eth_ops designware_eth_ops;
+
 struct dw_eth_pdata {
struct eth_pdata eth_pdata;
u32 reset_delays[3];
-- 
2.11.0

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[U-Boot] [PATCH v5 6/9] rockchip: Enable networking support on rock2 and firefly

2017-01-05 Thread Romain Perier
From: Sjoerd Simons 

Enable the various configuration option required to get the ethernet
interface up and running on Radxa Rock2 and Firefly.

Signed-off-by: Sjoerd Simons 
Reviewed-by: Simon Glass 
Acked-by: Joe Hershberger 
Acked-by: Romain Perier 
---

Changes in v5:
- Added Acked-by for Romain
Changes in v4: None
Changes in v3: None
Changes in v2: None

 configs/firefly-rk3288_defconfig | 4 
 configs/rock2_defconfig  | 4 
 2 files changed, 8 insertions(+)

diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 4910c80cd8..3431464a2f 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -44,6 +44,10 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_ROCKCHIP_DWMMC=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
index 1883f07320..a57b3de042 100644
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@@ -43,6 +43,10 @@ CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_ROCKCHIP_DWMMC=y
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
-- 
2.11.0

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[U-Boot] [PATCH v5 4/9] net: designware: Export the operation functions

2017-01-05 Thread Romain Perier
From: Simon Glass 

Export all functions so that drivers can use them, or not, as the need
arises.

Signed-off-by: Simon Glass 
Acked-by: Joe Hershberger 
Acked-by: Romain Perier 
---

Changes in v5:
- Add Acked-by for Romain
Changes in v4: None
Changes in v3:
- Add new patch to export the operation functions

Changes in v2: None

 drivers/net/designware.c | 19 +--
 drivers/net/designware.h |  9 +
 2 files changed, 18 insertions(+), 10 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 0c596a7aea..f242fc6b3f 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -271,7 +271,7 @@ static void _dw_eth_halt(struct dw_eth_dev *priv)
phy_shutdown(priv->phydev);
 }
 
-static int _dw_eth_init(struct dw_eth_dev *priv, u8 *enetaddr)
+int designware_eth_init(struct dw_eth_dev *priv, u8 *enetaddr)
 {
struct eth_mac_regs *mac_p = priv->mac_regs_p;
struct eth_dma_regs *dma_p = priv->dma_regs_p;
@@ -330,7 +330,7 @@ static int _dw_eth_init(struct dw_eth_dev *priv, u8 
*enetaddr)
return 0;
 }
 
-static int designware_eth_enable(struct dw_eth_dev *priv)
+int designware_eth_enable(struct dw_eth_dev *priv)
 {
struct eth_mac_regs *mac_p = priv->mac_regs_p;
 
@@ -493,7 +493,7 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis)
 {
int ret;
 
-   ret = _dw_eth_init(dev->priv, dev->enetaddr);
+   ret = designware_eth_init(dev->priv, dev->enetaddr);
if (!ret)
ret = designware_eth_enable(dev->priv);
 
@@ -591,7 +591,7 @@ static int designware_eth_start(struct udevice *dev)
struct dw_eth_dev *priv = dev_get_priv(dev);
int ret;
 
-   ret = _dw_eth_init(priv, pdata->enetaddr);
+   ret = designware_eth_init(priv, pdata->enetaddr);
if (ret)
return ret;
ret = designware_eth_enable(priv);
@@ -601,36 +601,35 @@ static int designware_eth_start(struct udevice *dev)
return 0;
 }
 
-static int designware_eth_send(struct udevice *dev, void *packet, int length)
+int designware_eth_send(struct udevice *dev, void *packet, int length)
 {
struct dw_eth_dev *priv = dev_get_priv(dev);
 
return _dw_eth_send(priv, packet, length);
 }
 
-static int designware_eth_recv(struct udevice *dev, int flags, uchar **packetp)
+int designware_eth_recv(struct udevice *dev, int flags, uchar **packetp)
 {
struct dw_eth_dev *priv = dev_get_priv(dev);
 
return _dw_eth_recv(priv, packetp);
 }
 
-static int designware_eth_free_pkt(struct udevice *dev, uchar *packet,
-  int length)
+int designware_eth_free_pkt(struct udevice *dev, uchar *packet, int length)
 {
struct dw_eth_dev *priv = dev_get_priv(dev);
 
return _dw_free_pkt(priv);
 }
 
-static void designware_eth_stop(struct udevice *dev)
+void designware_eth_stop(struct udevice *dev)
 {
struct dw_eth_dev *priv = dev_get_priv(dev);
 
return _dw_eth_halt(priv);
 }
 
-static int designware_eth_write_hwaddr(struct udevice *dev)
+int designware_eth_write_hwaddr(struct udevice *dev)
 {
struct eth_pdata *pdata = dev_get_platdata(dev);
struct dw_eth_dev *priv = dev_get_priv(dev);
diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index 087ebef297..7992d0ebee 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -253,6 +253,15 @@ struct dw_eth_pdata {
struct eth_pdata eth_pdata;
u32 reset_delays[3];
 };
+
+int designware_eth_init(struct dw_eth_dev *priv, u8 *enetaddr);
+int designware_eth_enable(struct dw_eth_dev *priv);
+int designware_eth_send(struct udevice *dev, void *packet, int length);
+int designware_eth_recv(struct udevice *dev, int flags, uchar **packetp);
+int designware_eth_free_pkt(struct udevice *dev, uchar *packet,
+  int length);
+void designware_eth_stop(struct udevice *dev);
+int designware_eth_write_hwaddr(struct udevice *dev);
 #endif
 
 #endif
-- 
2.11.0

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[U-Boot] [PATCH v5 9/9] rockchip: Drop Ethernet from the TODO

2017-01-05 Thread Romain Perier
From: Sjoerd Simons 

Now that ethernet support works, it can be dropped from the rockchip
TODO

Signed-off-by: Sjoerd Simons 
Acked-by: Simon Glass 
Acked-by: Joe Hershberger 
Signed-off-by: Simon Glass 
---

Changes in v5: None
Changes in v4: None
Changes in v3:
- Add a few new patches
- Drop the 'net: designware: Add a fix_mac_speed hook' patch

 doc/README.rockchip | 1 -
 1 file changed, 1 deletion(-)

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 06ec80e523..43cafc7bd6 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -219,7 +219,6 @@ Immediate priorities are:
 - USB host
 - USB device
 - Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
-- Ethernet
 - NAND flash
 - Support for other Rockchip parts
 - Boot U-Boot proper over USB OTG (at present only SPL works)
-- 
2.11.0

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Re: [U-Boot] [PATCH 1/4] mmc: fsl_esdhc: make GPIO support optional

2017-01-05 Thread Y.B. Lu
> -Original Message-
> From: york sun
> Sent: Thursday, January 05, 2017 3:52 AM
> To: Y.B. Lu
> Cc: u-boot@lists.denx.de; Jaehoon Chung
> Subject: Re: [PATCH 1/4] mmc: fsl_esdhc: make GPIO support optional
> 
> On 12/06/2016 08:08 PM, Yangbo Lu wrote:
> > There would be compiling error as below when enable driver model for
> esdhc.
> > undefined reference to `dm_gpio_get_value'
> > undefined reference to `gpio_request_by_name_nodev'
> > This patch is to make GPIO support optional with CONFIG_DM_GPIO.
> > Because all boards of QorIQ platform don't need it and they just check
> > register for CD/WP status, only some boards of i.MX platform require
> this.
> >
> > Signed-off-by: Yangbo Lu 
> > ---
> >  drivers/mmc/fsl_esdhc.c | 10 --
> >  1 file changed, 8 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index
> > 9796d39..da3a151 100644
> > --- a/drivers/mmc/fsl_esdhc.c
> > +++ b/drivers/mmc/fsl_esdhc.c
> > @@ -104,8 +104,10 @@ struct fsl_esdhc_priv {
> > struct udevice *dev;
> > int non_removable;
> > int wp_enable;
> > +#ifdef CONFIG_DM_GPIO
> > struct gpio_desc cd_gpio;
> > struct gpio_desc wp_gpio;
> > +#endif
> >  };
> >
> >  /* Return the XFERTYP flags for a given command and data packet */ @@
> > -687,10 +689,11 @@ static int esdhc_getcd(struct mmc *mmc)  #ifdef
> > CONFIG_DM_MMC
> > if (priv->non_removable)
> > return 1;
> > -
> > +#ifdef CONFIG_DM_GPIO
> > if (dm_gpio_is_valid(>cd_gpio))
> > return dm_gpio_get_value(>cd_gpio);
> >  #endif
> > +#endif
> >
> > while (!(esdhc_read32(>prsstat) & PRSSTAT_CINS) && --timeout)
> > udelay(1000);
> > @@ -967,17 +970,20 @@ static int fsl_esdhc_probe(struct udevice *dev)
> > priv->non_removable = 1;
> >  } else {
> > priv->non_removable = 0;
> > +#ifdef CONFIG_DM_GPIO
> > gpio_request_by_name_nodev(fdt, node, "cd-gpios", 0,
> >>cd_gpio, GPIOD_IS_IN);
> > +#endif
> > }
> >
> > priv->wp_enable = 1;
> >
> > +#ifdef CONFIG_DM_GPIO
> > ret = gpio_request_by_name_nodev(fdt, node, "wp-gpios", 0,
> >  >wp_gpio, GPIOD_IS_IN);
> > if (ret)
> > priv->wp_enable = 0;
> > -
> > +#endif
> > /*
> >  * TODO:
> >  * Because lack of clk driver, if SDHC clk is not enabled,
> >
> 
> Jaehoon,
> 
> This set looks OK to me. Please review and comment. I can merge it with
> your ack.
> 
> Yangbo,
> 
> For MMC or SD patches, please CC Jaehoon.

[Lu Yangbo-B47093] Ok, York. And sorry for that.

> 
> York
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[U-Boot] [PATCH 1/2] SECURE_BOOT: Update bootscript and its address for LS Chasis 3

2017-01-05 Thread Udit Agarwal
Update bootscript and its  addresses for Layerscape Chasis 3
based platforms instead of individual SoCs.

Signed-off-by: Sumit Garg 
Signed-off-by: Udit Agarwal 
---
 arch/arm/include/asm/fsl_secure_boot.h | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/fsl_secure_boot.h 
b/arch/arm/include/asm/fsl_secure_boot.h
index 933e09c..f34ffc7 100644
--- a/arch/arm/include/asm/fsl_secure_boot.h
+++ b/arch/arm/include/asm/fsl_secure_boot.h
@@ -84,7 +84,7 @@
  * Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
  * Non-XIP Memory (Nand/SD)
  */
-#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_LS2080A) || \
+#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \
defined(CONFIG_SD_BOOT)
 #define CONFIG_BOOTSCRIPT_COPY_RAM
 #endif
@@ -92,11 +92,11 @@
  * The address needs to be modified according to NOR, NAND, SD and
  * DDR memory map
  */
-#ifdef CONFIG_LS2080A
-#define CONFIG_BS_HDR_ADDR_DEVICE  0x58392
-#define CONFIG_BS_ADDR_DEVICE  0x58390
-#define CONFIG_BS_HDR_ADDR_RAM 0xa392
-#define CONFIG_BS_ADDR_RAM 0xa390
+#ifdef CONFIG_FSL_LSCH3
+#define CONFIG_BS_HDR_ADDR_DEVICE  0x580d0
+#define CONFIG_BS_ADDR_DEVICE  0x580e0
+#define CONFIG_BS_HDR_ADDR_RAM 0xa0d0
+#define CONFIG_BS_ADDR_RAM 0xa0e0
 #define CONFIG_BS_HDR_SIZE 0x2000
 #define CONFIG_BS_SIZE 0x1000
 #else
-- 
1.9.1

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Re: [U-Boot] [PATCH V2 0/7] dm: universal_c210: support the DM_PMIC

2017-01-05 Thread Jaehoon Chung
Hi guys,

discard this patches..there are some build issue.
I will resend the V3 within this week.
Sorry for spamming.

Best Regards,
Jaehoon Chung

On 01/05/2017 07:16 PM, Jaehoon Chung wrote:
> This patchset is for supporting pmic driver-mode on universal_c210 board.
> It's using i2c-s3c24x0.c file. (Fixes some complier error issue.)
> 
> Remove the soft_i2c codes in universal.c.
> It seems a deadcode because of no usage.
> 
> *dm tree
>  i2c [ + ]|-- i2c@138b
>  pmic[ + ]|   `-- max8998-pmic@66
> 
> *dm uclass
>   uclass 20: i2c
>   -   i2c@1386 @ 5ae652d8, seq -1, (req 0)
>   -   i2c@1387 @ 5ae65330, seq -1, (req 1)
>   -   i2c@1388 @ 5ae65388, seq -1, (req 2)
>   -   i2c@1389 @ 5ae653e0, seq -1, (req 3)
>   -   i2c@138a @ 5ae65438, seq -1, (req 4)
>   - * i2c@138b @ 5ae65490, seq 5, (req 5)
>   -   i2c@138c @ 5ae65570, seq -1, (req 6)
>   -   i2c@138d @ 5ae655c8, seq -1, (req 7)
>  i2c [ + ]|-- i2c@138b
>  pmic[ + ]|   `-- max8998-pmic@66
> 
> *After using pmic command.
> Universal # pmic list
> | Name| Parent name | Parent uclass @ seq
> | max8998-pmic@66 | i2c@138b| i2c @ 5
> 
> Changelog on V2:
> - Changes to "depends on ARCH_EXYNOS4" in Kconfig (fixes buildman error.)
> 
> Jaehoon Chung (7):
>   i2c: Kconfig: Add SYS_I2C_S3C24X0 entry
>   i2c: s3c24x0: fix the compiler error for exynos4
>   ARM: dts: exynos4: use the node's name for i2c
>   ARM: dts: exnyos4210-universl_c210: add i2c_5 and pmic nodes
>   configs: s5pc210_universal: enable the DM_PMIC and MAX8998
>   board: samsung: universal_210: use the driver model for max8998
>   board: samsung: universal_c210: remove the codes relevant to soft_i2c
> 
>  arch/arm/dts/exynos4.dtsi  |  27 +++--
>  arch/arm/dts/exynos4210-universal_c210.dts | 164 ++
>  board/samsung/universal_c210/universal.c   | 180 
> +++--
>  configs/s5pc210_universal_defconfig|   2 +
>  drivers/i2c/Kconfig|   6 +
>  drivers/i2c/s3c24x0_i2c.c  |   8 +-
>  6 files changed, 292 insertions(+), 95 deletions(-)
> 

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[U-Boot] [PATCH V2 1/7] config: s5pc210_universal: enable SYS_I2C_S3C24X0

2017-01-05 Thread Jaehoon Chung
Enable CONFIG_SYS_I2C_S3C24X0 for i2c

Signed-off-by: Jaehoon Chung 
---
 include/configs/s5pc210_universal.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/configs/s5pc210_universal.h 
b/include/configs/s5pc210_universal.h
index 1bfefe9..dd3bdc6 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -17,6 +17,9 @@
 /* Keep L2 Cache Disabled */
 #define CONFIG_SYS_L2CACHE_OFF 1
 
+/* I2C */
+#define CONFIG_SYS_I2C_S3C24X0
+
 /* Universal has 2 banks of DRAM */
 #define CONFIG_NR_DRAM_BANKS   2
 #define CONFIG_SYS_SDRAM_BASE  0x4000
-- 
2.10.2

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Re: [U-Boot] [PATCH V2 0/7] dm: universal_c210: support the DM_PMIC

2017-01-05 Thread Lukasz Majewski
Hi Jaehoon

> Remove the soft_i2c codes in universal.c.
> It seems a deadcode because of no usage.

The soft_i2c was needed to control the fuel gauge (not sure if on c210
you have it mounted), which at Trats was connected via simple gpios
(not the one muxed with HW I2C).


BTW: I do see that now you have more time for open source :-)


Best regards,

Lukasz Majewski

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DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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[U-Boot] [PATCH V2 3/7] ARM: dts: exynos4: use the node's name for i2c

2017-01-05 Thread Jaehoon Chung
Use the node's name for i2c.

Signed-off-by: Jaehoon Chung 
---
 arch/arm/dts/exynos4.dtsi | 27 +++
 1 file changed, 19 insertions(+), 8 deletions(-)

diff --git a/arch/arm/dts/exynos4.dtsi b/arch/arm/dts/exynos4.dtsi
index 7de227c..a5a00c8 100644
--- a/arch/arm/dts/exynos4.dtsi
+++ b/arch/arm/dts/exynos4.dtsi
@@ -10,6 +10,17 @@
 #include "skeleton.dtsi"
 
 / {
+   aliases {
+   i2c0 = _0;
+   i2c1 = _1;
+   i2c2 = _2;
+   i2c3 = _3;
+   i2c4 = _4;
+   i2c5 = _5;
+   i2c6 = _6;
+   i2c7 = _7;
+   };
+
combiner: interrupt-controller@1044 {
compatible = "samsung,exynos4210-combiner";
#interrupt-cells = <2>;
@@ -47,7 +58,7 @@
id = <4>;
};
 
-   i2c@1386 {
+   i2c_0: i2c@1386 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -55,7 +66,7 @@
interrupts = <0 56 0>;
};
 
-   i2c@1387 {
+   i2c_1: i2c@1387 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -63,7 +74,7 @@
interrupts = <1 57 0>;
};
 
-   i2c@1388 {
+   i2c_2: i2c@1388 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -71,7 +82,7 @@
interrupts = <2 58 0>;
};
 
-   i2c@1389 {
+   i2c_3: i2c@1389 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -79,7 +90,7 @@
interrupts = <3 59 0>;
};
 
-   i2c@138a {
+   i2c_4: i2c@138a {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -87,7 +98,7 @@
interrupts = <4 60 0>;
};
 
-   i2c@138b {
+   i2c_5: i2c@138b {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -95,7 +106,7 @@
interrupts = <5 61 0>;
};
 
-   i2c@138c {
+   i2c_6: i2c@138c {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -103,7 +114,7 @@
interrupts = <6 62 0>;
};
 
-   i2c@138d {
+   i2c_7: i2c@138d {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
-- 
2.10.2

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[U-Boot] [PATCH V2 5/7] configs: s5pc210_universal: enable the DM_PMIC and MAX8998

2017-01-05 Thread Jaehoon Chung
Enable the CONFIG_DM_PMIC and CONFIG_DM_PMIC_MAX8998.
s5pc210_universal board is using max8998 pmic.
To use the i2c/pmic driver model, enable these configurations.

Signed-off-by: Jaehoon Chung 
---
 configs/s5pc210_universal_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/s5pc210_universal_defconfig 
b/configs/s5pc210_universal_defconfig
index b6cefb1..97f4f7a 100644
--- a/configs/s5pc210_universal_defconfig
+++ b/configs/s5pc210_universal_defconfig
@@ -32,6 +32,8 @@ CONFIG_DFU_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_S5P=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_MAX8998=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_GADGET=y
-- 
2.10.2

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[U-Boot] [PATCH V2 4/7] ARM: dts: exnyos4210-universl_c210: add i2c_5 and pmic nodes

2017-01-05 Thread Jaehoon Chung
Add the i2c_5 node and pmic as its child node.

Signed-off-by: Jaehoon Chung 
---
 arch/arm/dts/exynos4210-universal_c210.dts | 164 +
 1 file changed, 164 insertions(+)

diff --git a/arch/arm/dts/exynos4210-universal_c210.dts 
b/arch/arm/dts/exynos4210-universal_c210.dts
index 8cac7dd..5763627 100644
--- a/arch/arm/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/dts/exynos4210-universal_c210.dts
@@ -94,3 +94,167 @@
samsung,rgb-mode = <0>;
};
 };
+
+_5 {
+   clock-frequency = <10>;
+   status = "okay";
+
+   max8998-pmic@66 {
+   compatible = "maxim,max8998";
+   reg = <0x66 0 0>;
+   voltage-regulators {
+   ldo2_reg: LDO2 {
+   regulator-name = "VALIVE_1.2V";
+   regulator-min-microvolt = <120>;
+   regulator-max-microvolt = <120>;
+   regulator-always-on;
+   };
+
+   ldo3_reg: LDO3 {
+   regulator-name = "VUSB+MIPI_1.1V";
+   regulator-min-microvolt = <110>;
+   regulator-max-microvolt = <110>;
+   regulator-always-on;
+   };
+
+   ldo4_reg: LDO4 {
+   regulator-name = "VADC_3.3V";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   };
+
+   ldo5_reg: LDO5 {
+   regulator-name = "VTF_2.8V";
+   regulator-min-microvolt = <280>;
+   regulator-max-microvolt = <280>;
+   };
+
+   ldo6_reg: LDO6 {
+   regulator-name = "LDO6";
+   regulator-min-microvolt = <200>;
+   regulator-max-microvolt = <200>;
+   };
+
+   ldo7_reg: LDO7 {
+   regulator-name = "VLCD+VMIPI_1.8V";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   };
+
+   ldo8_reg: LDO8 {
+   regulator-name = "VUSB+VDAC_3.3V";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-always-on;
+   };
+
+   ldo9_reg: LDO9 {
+   regulator-name = "VCC_2.8V";
+   regulator-min-microvolt = <280>;
+   regulator-max-microvolt = <280>;
+   regulator-always-on;
+   };
+
+   ldo10_reg: LDO10 {
+   regulator-name = "VPLL_1.1V";
+   regulator-min-microvolt = <110>;
+   regulator-max-microvolt = <110>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   ldo11_reg: LDO11 {
+   regulator-name = "CAM_AF_3.3V";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   };
+
+   ldo12_reg: LDO12 {
+   regulator-name = "PS_2.8V";
+   regulator-min-microvolt = <280>;
+   regulator-max-microvolt = <280>;
+   };
+
+   ldo13_reg: LDO13 {
+   regulator-name = "VHIC_1.2V";
+   regulator-min-microvolt = <120>;
+   regulator-max-microvolt = <120>;
+   };
+
+   ldo14_reg: LDO14 {
+   regulator-name = "CAM_I_HOST_1.8V";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   };
+
+   ldo15_reg: LDO15 {
+   regulator-name = "CAM_S_DIG+FM33_CORE_1.2V";
+   regulator-min-microvolt = <120>;
+   regulator-max-microvolt = <120>;
+   };
+
+   ldo16_reg: LDO16 {
+   regulator-name = "CAM_S_ANA_2.8V";
+   

[U-Boot] [PATCH V2 6/7] board: samsung: universal_210: use the driver model for max8998

2017-01-05 Thread Jaehoon Chung
Revmoe the "ifndef CONFIG_DM_I2C".
Intead, use the driver model for max8998.

Signed-off-by: Jaehoon Chung 
---
 board/samsung/universal_c210/universal.c | 169 +--
 1 file changed, 94 insertions(+), 75 deletions(-)

diff --git a/board/samsung/universal_c210/universal.c 
b/board/samsung/universal_c210/universal.c
index c3946ee..0645843 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -27,33 +27,21 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 unsigned int board_rev;
+static int init_pmic_lcd(void);
 
 u32 get_board_rev(void)
 {
return board_rev;
 }
 
-static int get_hwrev(void)
+int exynos_power_init(void)
 {
-   return board_rev & 0xFF;
+   return init_pmic_lcd();
 }
 
-int exynos_power_init(void)
+static int get_hwrev(void)
 {
-#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
-   int ret;
-
-   /*
-* For PMIC the I2C bus is named as I2C5, but it is connected
-* to logical I2C adapter 0
-*/
-   ret = pmic_init(I2C_0);
-   if (ret)
-   return ret;
-
-   init_pmic_lcd();
-#endif
-   return 0;
+   return board_rev & 0xFF;
 }
 
 static unsigned short get_adc_value(int channel)
@@ -83,23 +71,29 @@ static unsigned short get_adc_value(int channel)
 
 static int adc_power_control(int on)
 {
-#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
+   struct udevice *dev;
int ret;
-   struct pmic *p = pmic_get("MAX8998_PMIC");
-   if (!p)
-   return -ENODEV;
+   u8 reg;
 
-   if (pmic_probe(p))
-   return -1;
+   ret = pmic_get("max8998-pmic", );
+   if (ret) {
+   puts("Failed to get MAX8998!\n");
+   return ret;
+   }
 
-   ret = pmic_set_output(p,
- MAX8998_REG_ONOFF1,
- MAX8998_LDO4, !!on);
+   reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
+   if (on)
+   reg |= MAX8998_LDO4;
+   else
+   reg &= ~MAX8998_LDO4;
+
+   ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
+   if (ret) {
+   puts("MAX8998 LDO setting error\n");
+   return -EINVAL;
+   }
 
-   return ret;
-#else
return 0;
-#endif
 }
 
 static unsigned int get_hw_revision(void)
@@ -147,39 +141,50 @@ static void check_hw_revision(void)
 #ifdef CONFIG_USB_GADGET
 static int s5pc210_phy_control(int on)
 {
-#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
-   int ret = 0;
-   struct pmic *p = pmic_get("MAX8998_PMIC");
-   if (!p)
-   return -ENODEV;
+   struct udevice *dev;
+   int ret;
+   u8 reg;
 
-   if (pmic_probe(p))
-   return -1;
+   ret = pmic_get("max8998-pmic", );
+   if (ret) {
+   puts("Failed to get MAX8998!\n");
+   return ret;
+   }
 
if (on) {
-   ret |= pmic_set_output(p,
-  MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
-  MAX8998_SAFEOUT1, LDO_ON);
-   ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
- MAX8998_LDO3, LDO_ON);
-   ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
- MAX8998_LDO8, LDO_ON);
+   reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
+   reg |= MAX8998_SAFEOUT1;
+   ret |= pmic_reg_write(dev,
+   MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
+
+   reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
+   reg |= MAX8998_LDO3;
+   ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
+
+   reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
+   reg |= MAX8998_LDO8;
+   ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
 
} else {
-   ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
- MAX8998_LDO8, LDO_OFF);
-   ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
- MAX8998_LDO3, LDO_OFF);
-   ret |= pmic_set_output(p,
-  MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
-  MAX8998_SAFEOUT1, LDO_OFF);
+   reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
+   reg &= ~MAX8998_LDO8;
+   ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
+
+   reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
+   reg &= ~MAX8998_LDO3;
+   ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
+
+   reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
+   reg &= ~MAX8998_SAFEOUT1;
+   ret |= pmic_reg_write(dev,
+   

[U-Boot] [PATCH V2 2/7] i2c: s3c24x0: fix the compiler error for exynos4

2017-01-05 Thread Jaehoon Chung
If CONFIG_SYS_I2C_S3C24X0_SLAVE isn't defined, then complie error should
be occurred.
This patch is for preventing it.

Signed-off-by: Jaehoon Chung 
---
 drivers/i2c/s3c24x0_i2c.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 2ece9f4..7df14e9 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -24,6 +24,12 @@
 #include 
 #include "s3c24x0_i2c.h"
 
+#ifndef CONFIG_SYS_I2C_S3C24X0_SLAVE
+#define SYS_I2C_S3C24X0_SLAVE  0
+#else
+#define SYS_I2C_S3C24X0_SLAVE  CONFIG_SYS_I2C_S3C24X0_SLAVE
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -87,7 +93,7 @@ static int s3c24x0_i2c_set_bus_speed(struct udevice *dev, 
unsigned int speed)
i2c_bus->clock_frequency = speed;
 
i2c_ch_init(i2c_bus->regs, i2c_bus->clock_frequency,
-   CONFIG_SYS_I2C_S3C24X0_SLAVE);
+   SYS_I2C_S3C24X0_SLAVE);
 
return 0;
 }
-- 
2.10.2

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[U-Boot] [PATCH V2 1/7] i2c: Kconfig: Add SYS_I2C_S3C24X0 entry

2017-01-05 Thread Jaehoon Chung
Adding Kconfig for SYS_I2C_S3C24X0.

Signed-off-by: Jaehoon Chung 
---
 drivers/i2c/Kconfig | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 051f911..e191b75 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -155,6 +155,12 @@ config SYS_I2C_SANDBOX
};
};
 
+config SYS_I2C_S3C24X0
+   bool "Samsung I2C driver"
+   depends on ARCH_EXYNOS4 && DM_I2C
+   default y
+   help
+ Support for Samsung I2C controller as Samsung SoCs.
 
 config SYS_I2C_UNIPHIER
bool "UniPhier I2C driver"
-- 
2.10.2

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[U-Boot] [PATCH V2 0/7] dm: universal_c210: support the DM_PMIC

2017-01-05 Thread Jaehoon Chung
This patchset is for supporting pmic driver-mode on universal_c210 board.
It's using i2c-s3c24x0.c file. (Fixes some complier error issue.)

Remove the soft_i2c codes in universal.c.
It seems a deadcode because of no usage.

*dm tree
 i2c [ + ]|-- i2c@138b
 pmic[ + ]|   `-- max8998-pmic@66

*dm uclass
uclass 20: i2c
-   i2c@1386 @ 5ae652d8, seq -1, (req 0)
-   i2c@1387 @ 5ae65330, seq -1, (req 1)
-   i2c@1388 @ 5ae65388, seq -1, (req 2)
-   i2c@1389 @ 5ae653e0, seq -1, (req 3)
-   i2c@138a @ 5ae65438, seq -1, (req 4)
- * i2c@138b @ 5ae65490, seq 5, (req 5)
-   i2c@138c @ 5ae65570, seq -1, (req 6)
-   i2c@138d @ 5ae655c8, seq -1, (req 7)
 i2c [ + ]|-- i2c@138b
 pmic[ + ]|   `-- max8998-pmic@66

*After using pmic command.
Universal # pmic list
| Name| Parent name | Parent uclass @ seq
| max8998-pmic@66 | i2c@138b| i2c @ 5

Changelog on V2:
- Changes to "depends on ARCH_EXYNOS4" in Kconfig (fixes buildman error.)

Jaehoon Chung (7):
  i2c: Kconfig: Add SYS_I2C_S3C24X0 entry
  i2c: s3c24x0: fix the compiler error for exynos4
  ARM: dts: exynos4: use the node's name for i2c
  ARM: dts: exnyos4210-universl_c210: add i2c_5 and pmic nodes
  configs: s5pc210_universal: enable the DM_PMIC and MAX8998
  board: samsung: universal_210: use the driver model for max8998
  board: samsung: universal_c210: remove the codes relevant to soft_i2c

 arch/arm/dts/exynos4.dtsi  |  27 +++--
 arch/arm/dts/exynos4210-universal_c210.dts | 164 ++
 board/samsung/universal_c210/universal.c   | 180 +++--
 configs/s5pc210_universal_defconfig|   2 +
 drivers/i2c/Kconfig|   6 +
 drivers/i2c/s3c24x0_i2c.c  |   8 +-
 6 files changed, 292 insertions(+), 95 deletions(-)

-- 
2.10.2

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Re: [U-Boot] [PATCH 0/7] dm: universal_c210: support the DM_PMIC

2017-01-05 Thread Jaehoon Chung
+CC'd Simon.

To Simon,
Sorry i missed CC'd.
If you want to CC'd, i will resend the patches..
Let me know, plz.

Best Regards,
Jaehoon Chung

On 01/05/2017 05:16 PM, Jaehoon Chung wrote:
> This patchset is for supporting pmic driver-mode on universal_c210 board.
> It's using i2c-s3c24x0.c file. (Fixes some complier error issue.)
> 
> Remove the soft_i2c codes in universal.c.
> It seems a deadcode because of no usage.
> 
> *dm tree
>  i2c [ + ]|-- i2c@138b
>  pmic[ + ]|   `-- max8998-pmic@66
> 
> *dm uclass
>   uclass 20: i2c
>   -   i2c@1386 @ 5ae652d8, seq -1, (req 0)
>   -   i2c@1387 @ 5ae65330, seq -1, (req 1)
>   -   i2c@1388 @ 5ae65388, seq -1, (req 2)
>   -   i2c@1389 @ 5ae653e0, seq -1, (req 3)
>   -   i2c@138a @ 5ae65438, seq -1, (req 4)
>   - * i2c@138b @ 5ae65490, seq 5, (req 5)
>   -   i2c@138c @ 5ae65570, seq -1, (req 6)
>   -   i2c@138d @ 5ae655c8, seq -1, (req 7)
>  i2c [ + ]|-- i2c@138b
>  pmic[ + ]|   `-- max8998-pmic@66
> 
> *After using pmic command.
> Universal # pmic list
> | Name| Parent name | Parent uclass @ seq
> | max8998-pmic@66 | i2c@138b| i2c @ 5
> 
> Jaehoon Chung (7):
>   i2c: Kconfig: Add SYS_I2C_S3C24X0 entry
>   i2c: s3c24x0: fix the compiler error for exynos4
>   ARM: dts: exynos4: use the node's name for i2c
>   ARM: dts: exnyos4210-universl_c210: add i2c_5 and pmic nodes
>   configs: s5pc210_universal: enable the DM_PMIC and MAX8998
>   board: samsung: universal_210: use the driver model for max8998
>   board: samsung: universal_c210: remove the codes relevant to soft_i2c
> 
>  arch/arm/dts/exynos4.dtsi  |  27 +++--
>  arch/arm/dts/exynos4210-universal_c210.dts | 164 ++
>  board/samsung/universal_c210/universal.c   | 180 
> +++--
>  configs/s5pc210_universal_defconfig|   2 +
>  drivers/i2c/Kconfig|   6 +
>  drivers/i2c/s3c24x0_i2c.c  |   8 +-
>  6 files changed, 292 insertions(+), 95 deletions(-)
> 

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[U-Boot] [PATCH 6/7] board: samsung: universal_210: use the driver model for max8998

2017-01-05 Thread Jaehoon Chung
Revmoe the "ifndef CONFIG_DM_I2C".
Intead, use the driver model for max8998.

Signed-off-by: Jaehoon Chung 
---
 board/samsung/universal_c210/universal.c | 169 +--
 1 file changed, 94 insertions(+), 75 deletions(-)

diff --git a/board/samsung/universal_c210/universal.c 
b/board/samsung/universal_c210/universal.c
index c3946ee..0645843 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -27,33 +27,21 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 unsigned int board_rev;
+static int init_pmic_lcd(void);
 
 u32 get_board_rev(void)
 {
return board_rev;
 }
 
-static int get_hwrev(void)
+int exynos_power_init(void)
 {
-   return board_rev & 0xFF;
+   return init_pmic_lcd();
 }
 
-int exynos_power_init(void)
+static int get_hwrev(void)
 {
-#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
-   int ret;
-
-   /*
-* For PMIC the I2C bus is named as I2C5, but it is connected
-* to logical I2C adapter 0
-*/
-   ret = pmic_init(I2C_0);
-   if (ret)
-   return ret;
-
-   init_pmic_lcd();
-#endif
-   return 0;
+   return board_rev & 0xFF;
 }
 
 static unsigned short get_adc_value(int channel)
@@ -83,23 +71,29 @@ static unsigned short get_adc_value(int channel)
 
 static int adc_power_control(int on)
 {
-#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
+   struct udevice *dev;
int ret;
-   struct pmic *p = pmic_get("MAX8998_PMIC");
-   if (!p)
-   return -ENODEV;
+   u8 reg;
 
-   if (pmic_probe(p))
-   return -1;
+   ret = pmic_get("max8998-pmic", );
+   if (ret) {
+   puts("Failed to get MAX8998!\n");
+   return ret;
+   }
 
-   ret = pmic_set_output(p,
- MAX8998_REG_ONOFF1,
- MAX8998_LDO4, !!on);
+   reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
+   if (on)
+   reg |= MAX8998_LDO4;
+   else
+   reg &= ~MAX8998_LDO4;
+
+   ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
+   if (ret) {
+   puts("MAX8998 LDO setting error\n");
+   return -EINVAL;
+   }
 
-   return ret;
-#else
return 0;
-#endif
 }
 
 static unsigned int get_hw_revision(void)
@@ -147,39 +141,50 @@ static void check_hw_revision(void)
 #ifdef CONFIG_USB_GADGET
 static int s5pc210_phy_control(int on)
 {
-#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
-   int ret = 0;
-   struct pmic *p = pmic_get("MAX8998_PMIC");
-   if (!p)
-   return -ENODEV;
+   struct udevice *dev;
+   int ret;
+   u8 reg;
 
-   if (pmic_probe(p))
-   return -1;
+   ret = pmic_get("max8998-pmic", );
+   if (ret) {
+   puts("Failed to get MAX8998!\n");
+   return ret;
+   }
 
if (on) {
-   ret |= pmic_set_output(p,
-  MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
-  MAX8998_SAFEOUT1, LDO_ON);
-   ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
- MAX8998_LDO3, LDO_ON);
-   ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
- MAX8998_LDO8, LDO_ON);
+   reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
+   reg |= MAX8998_SAFEOUT1;
+   ret |= pmic_reg_write(dev,
+   MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
+
+   reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
+   reg |= MAX8998_LDO3;
+   ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
+
+   reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
+   reg |= MAX8998_LDO8;
+   ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
 
} else {
-   ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
- MAX8998_LDO8, LDO_OFF);
-   ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
- MAX8998_LDO3, LDO_OFF);
-   ret |= pmic_set_output(p,
-  MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
-  MAX8998_SAFEOUT1, LDO_OFF);
+   reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
+   reg &= ~MAX8998_LDO8;
+   ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
+
+   reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
+   reg &= ~MAX8998_LDO3;
+   ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
+
+   reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
+   reg &= ~MAX8998_SAFEOUT1;
+   ret |= pmic_reg_write(dev,
+   

[U-Boot] [PATCH 1/7] i2c: Kconfig: Add SYS_I2C_S3C24X0 entry

2017-01-05 Thread Jaehoon Chung
Adding Kconfig for SYS_I2C_S3C24X0.

Signed-off-by: Jaehoon Chung 
---
 drivers/i2c/Kconfig | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 051f911..a2d7a38 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -155,6 +155,12 @@ config SYS_I2C_SANDBOX
};
};
 
+config SYS_I2C_S3C24X0
+   bool "Samsung I2C driver"
+   depends on (ARCH_EXYNOS || ARCH_S5PC1XX) && DM_I2C
+   default y
+   help
+ Support for Samsung I2C controller as Samsung SoCs.
 
 config SYS_I2C_UNIPHIER
bool "UniPhier I2C driver"
-- 
2.10.2

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[U-Boot] [PATCH 3/7] ARM: dts: exynos4: use the node's name for i2c

2017-01-05 Thread Jaehoon Chung
Use the node's name for i2c.

Signed-off-by: Jaehoon Chung 
---
 arch/arm/dts/exynos4.dtsi | 27 +++
 1 file changed, 19 insertions(+), 8 deletions(-)

diff --git a/arch/arm/dts/exynos4.dtsi b/arch/arm/dts/exynos4.dtsi
index 7de227c..a5a00c8 100644
--- a/arch/arm/dts/exynos4.dtsi
+++ b/arch/arm/dts/exynos4.dtsi
@@ -10,6 +10,17 @@
 #include "skeleton.dtsi"
 
 / {
+   aliases {
+   i2c0 = _0;
+   i2c1 = _1;
+   i2c2 = _2;
+   i2c3 = _3;
+   i2c4 = _4;
+   i2c5 = _5;
+   i2c6 = _6;
+   i2c7 = _7;
+   };
+
combiner: interrupt-controller@1044 {
compatible = "samsung,exynos4210-combiner";
#interrupt-cells = <2>;
@@ -47,7 +58,7 @@
id = <4>;
};
 
-   i2c@1386 {
+   i2c_0: i2c@1386 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -55,7 +66,7 @@
interrupts = <0 56 0>;
};
 
-   i2c@1387 {
+   i2c_1: i2c@1387 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -63,7 +74,7 @@
interrupts = <1 57 0>;
};
 
-   i2c@1388 {
+   i2c_2: i2c@1388 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -71,7 +82,7 @@
interrupts = <2 58 0>;
};
 
-   i2c@1389 {
+   i2c_3: i2c@1389 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -79,7 +90,7 @@
interrupts = <3 59 0>;
};
 
-   i2c@138a {
+   i2c_4: i2c@138a {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -87,7 +98,7 @@
interrupts = <4 60 0>;
};
 
-   i2c@138b {
+   i2c_5: i2c@138b {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -95,7 +106,7 @@
interrupts = <5 61 0>;
};
 
-   i2c@138c {
+   i2c_6: i2c@138c {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -103,7 +114,7 @@
interrupts = <6 62 0>;
};
 
-   i2c@138d {
+   i2c_7: i2c@138d {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
-- 
2.10.2

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[U-Boot] [PATCH 0/7] dm: universal_c210: support the DM_PMIC

2017-01-05 Thread Jaehoon Chung
This patchset is for supporting pmic driver-mode on universal_c210 board.
It's using i2c-s3c24x0.c file. (Fixes some complier error issue.)

Remove the soft_i2c codes in universal.c.
It seems a deadcode because of no usage.

*dm tree
 i2c [ + ]|-- i2c@138b
 pmic[ + ]|   `-- max8998-pmic@66

*dm uclass
uclass 20: i2c
-   i2c@1386 @ 5ae652d8, seq -1, (req 0)
-   i2c@1387 @ 5ae65330, seq -1, (req 1)
-   i2c@1388 @ 5ae65388, seq -1, (req 2)
-   i2c@1389 @ 5ae653e0, seq -1, (req 3)
-   i2c@138a @ 5ae65438, seq -1, (req 4)
- * i2c@138b @ 5ae65490, seq 5, (req 5)
-   i2c@138c @ 5ae65570, seq -1, (req 6)
-   i2c@138d @ 5ae655c8, seq -1, (req 7)
 i2c [ + ]|-- i2c@138b
 pmic[ + ]|   `-- max8998-pmic@66

*After using pmic command.
Universal # pmic list
| Name| Parent name | Parent uclass @ seq
| max8998-pmic@66 | i2c@138b| i2c @ 5

Jaehoon Chung (7):
  i2c: Kconfig: Add SYS_I2C_S3C24X0 entry
  i2c: s3c24x0: fix the compiler error for exynos4
  ARM: dts: exynos4: use the node's name for i2c
  ARM: dts: exnyos4210-universl_c210: add i2c_5 and pmic nodes
  configs: s5pc210_universal: enable the DM_PMIC and MAX8998
  board: samsung: universal_210: use the driver model for max8998
  board: samsung: universal_c210: remove the codes relevant to soft_i2c

 arch/arm/dts/exynos4.dtsi  |  27 +++--
 arch/arm/dts/exynos4210-universal_c210.dts | 164 ++
 board/samsung/universal_c210/universal.c   | 180 +++--
 configs/s5pc210_universal_defconfig|   2 +
 drivers/i2c/Kconfig|   6 +
 drivers/i2c/s3c24x0_i2c.c  |   8 +-
 6 files changed, 292 insertions(+), 95 deletions(-)

-- 
2.10.2

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[U-Boot] [PATCH 5/7] configs: s5pc210_universal: enable the DM_PMIC and MAX8998

2017-01-05 Thread Jaehoon Chung
Enable the CONFIG_DM_PMIC and CONFIG_DM_PMIC_MAX8998.
s5pc210_universal board is using max8998 pmic.
To use the i2c/pmic driver model, enable these configurations.

Signed-off-by: Jaehoon Chung 
---
 configs/s5pc210_universal_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/s5pc210_universal_defconfig 
b/configs/s5pc210_universal_defconfig
index b6cefb1..97f4f7a 100644
--- a/configs/s5pc210_universal_defconfig
+++ b/configs/s5pc210_universal_defconfig
@@ -32,6 +32,8 @@ CONFIG_DFU_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_S5P=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_MAX8998=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_GADGET=y
-- 
2.10.2

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[U-Boot] [PATCH 2/7] i2c: s3c24x0: fix the compiler error for exynos4

2017-01-05 Thread Jaehoon Chung
If CONFIG_SYS_I2C_S3C24X0_SLAVE isn't defined, then complie error should
be occurred.
This patch is for preventing it.

Signed-off-by: Jaehoon Chung 
---
 drivers/i2c/s3c24x0_i2c.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 2ece9f4..7df14e9 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -24,6 +24,12 @@
 #include 
 #include "s3c24x0_i2c.h"
 
+#ifndef CONFIG_SYS_I2C_S3C24X0_SLAVE
+#define SYS_I2C_S3C24X0_SLAVE  0
+#else
+#define SYS_I2C_S3C24X0_SLAVE  CONFIG_SYS_I2C_S3C24X0_SLAVE
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
@@ -87,7 +93,7 @@ static int s3c24x0_i2c_set_bus_speed(struct udevice *dev, 
unsigned int speed)
i2c_bus->clock_frequency = speed;
 
i2c_ch_init(i2c_bus->regs, i2c_bus->clock_frequency,
-   CONFIG_SYS_I2C_S3C24X0_SLAVE);
+   SYS_I2C_S3C24X0_SLAVE);
 
return 0;
 }
-- 
2.10.2

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[U-Boot] [PATCH 7/7] board: samsung: universal_c210: remove the codes relevant to soft_i2c

2017-01-05 Thread Jaehoon Chung
Removes the codes of soft_i2c.
There is no usasge for universal_c210, also didn't define
CONFIG_SOFT_I2C_GPIO_SCL.
This code seems a dead code.

Signed-off-by: Jaehoon Chung 
---
 board/samsung/universal_c210/universal.c | 11 ---
 1 file changed, 11 deletions(-)

diff --git a/board/samsung/universal_c210/universal.c 
b/board/samsung/universal_c210/universal.c
index 0645843..feb8a34 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -355,9 +355,6 @@ void exynos_enable_ldo(unsigned int onoff)
 
 int exynos_init(void)
 {
-#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
-   char buf[16];
-#endif
gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
 
switch (get_hwrev()) {
@@ -382,14 +379,6 @@ int exynos_init(void)
break;
}
 
-#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
-   /* Request soft I2C gpios */
-   strcpy(buf, "soft_i2c_scl");
-   gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, buf);
-
-   strcpy(buf, "soft_i2c_sda");
-   gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, buf);
-#endif
check_hw_revision();
printf("HW Revision:\t0x%x\n", board_rev);
 
-- 
2.10.2

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Re: [U-Boot] [PATCH v2 2/2] lib: net_utils: enforce '.' as octet separator in string_to_ip

2017-01-05 Thread Chris Packham
On Wed, Jan 4, 2017 at 11:09 PM, Wolfgang Denk  wrote:
> Dear Chris Packham,
>
> In message <20170104003626.4211-2-judge.pack...@gmail.com> you wrote:
>> Ensure '.' is used to separate octets. If another character is seen
>> reject the string outright and return 0.0.0.0.
>
> What is this good for?
>
> The old code was forgiving and would accept 192,168,1,2 as well.

Technically you can't enter that. The env_flags.c code prevents that
from being added to environment variables that have been tagged as ip
addresses. These patches are pushing the logic down a bit further. The
code handling env_flags_vartype_ipaddr could be updated to use
string_to_ip instead.

> Do we need to be so strict here - at the cost of added code size?
>
> Also, at least crtitical parts of the network code (NFS, TFTP) do not
> check the return value of string_to_ip() - so what is the benefit of
> this change?
>

The reasoning behind this change is to prepare for parsing ipv6
addresses, which can contain ipv4 format addresses provided they are
at the end.

e.g. This is a valid ipv6 address ":::192.168.1.1" and so is
":::0192:0168:0001:0001" but the former triggers the ipv4 mapping
logic.
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