Re: [U-Boot] [PATCH 15/17] board_f: x86: Use checkcpu() for CPU init

[Stefan Roese]

On 28.03.2017 18:27, Simon Glass wrote:

At present we misuse print_cpuinfo() do so CPU init on x86. This is done
because it is the next available call after the console is enabled. But
several arches use checkcpu() instead. Despite the horrible name (which
we can fix), it seems a better choice.

Adjust the various x86 CPU implementations to move their init code into
checkcpu() and use print_cpuinfo() only for printing CPU info.

Signed-off-by: Simon Glass 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH 13/17] board_f: sandbox: Move sandbox_early_getopt_check() into misc_init_f()

[Stefan Roese]

On 28.03.2017 18:27, Simon Glass wrote:

We don't need a special hook for sandbox as one of the later ones will do
just as well. We can print error messages about bad options after we
print the banner. In fact, it seems better.

Signed-off-by: Simon Glass 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH 14/17] board_f: powerpc: Make prt_8260_rsr(), prt_8260_clks() private

[Stefan Roese]

On 28.03.2017 18:27, Simon Glass wrote:

Move these two function calls into checkcpu(), which is called on this
arch immediately after these two.

Signed-off-by: Simon Glass 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH 12/17] board_f: powerpc: Move prt_83xx_rsr() to private code

[Stefan Roese]

On 28.03.2017 18:27, Simon Glass wrote:

This function is called just before checkcpu() on MPX83xx. Move it to the
code for that arch.

Signed-off-by: Simon Glass 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH 11/17] powerpc: freescale: Unify the two get_clocks() calls

[Stefan Roese]

On 28.03.2017 18:27, Simon Glass wrote:

Combine the conditions so this appears in the init list only once.

Signed-off-by: Simon Glass 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH 10/17] board_f: Use timer_init() on all archs

[Stefan Roese]

On 28.03.2017 18:27, Simon Glass wrote:

More than half of the architectures use this function so let's make them
all use it.

For those which don't actually define it, we can rely on the weak function
in lib/time.c

Signed-off-by: Simon Glass 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH 09/17] board_f: powerpc: Use timer_init() instead of init_timebase()

[Stefan Roese]

On 28.03.2017 18:27, Simon Glass wrote:

There is no good reason to use a different name on PowerPC. Change it to
timer_init() like the others.

Signed-off-by: Simon Glass 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH 08/17] board_f: powerpc: Unified get_clocks() portion of init sequence

[Stefan Roese]

On 28.03.2017 18:27, Simon Glass wrote:

Now that both branches of the #if do the same thing, we can unify them.

Signed-off-by: Simon Glass 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH 07/17] board_f: Remove adjust_sdram_tbs_8xx() from the init sequence

[Stefan Roese]

On 28.03.2017 18:27, Simon Glass wrote:

We can just call this from the only place that needs it.

Signed-off-by: Simon Glass 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH 06/17] board_f: Remove sdram_adjust_866() from the init sequence

[Stefan Roese]

On 28.03.2017 18:27, Simon Glass wrote:

We can just call this from the only function that needs it.

Signed-off-by: Simon Glass 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH 05/17] board_f: powerpc: Rename get_clocks_866() to get_clocks()

[Stefan Roese]

On 28.03.2017 18:27, Simon Glass wrote:

We really don't need to have a name like this in the generic init
sequence. Use the generic get_clocks() name so that we can merge these
two at some point.

Signed-off-by: Simon Glass 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH 04/17] board_f: powerpc: Join the two CONFIG_8xx_CPUCLK_DEFAULT sections

[Stefan Roese]

On 28.03.2017 18:27, Simon Glass wrote:

We have two chunks of code which depend on this CONFIG options. There is
likely no need to keep them apart, so join them.

Signed-off-by: Simon Glass 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH 03/17] board_f: x86: Rename x86_fsp_init() to arch_fsp_init()

[Stefan Roese]

On 28.03.2017 18:27, Simon Glass wrote:

While x86 is the only user and this could in principle be moved to
arch_cpu_init() there is some justification for this being a separate
call. It provides a way to handle init which is not CPU-specific, but
must happen before the CPU can be set up.

Rename the function to be more generic.

Signed-off-by: Simon Glass 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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Re: [U-Boot] [PATCH 01/17] board_f: sandbox: Move setup_ram_buf() to private code

[Stefan Roese]

On 28.03.2017 18:27, Simon Glass wrote:

There is no need to have this call in the generic init sequence and no
other architecture has needed it in the time it has been there. Move it
into sandbox's private code.

Signed-off-by: Simon Glass 


Reviewed-by: Stefan Roese 

Thanks,
Stefan
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[U-Boot] [PATCH v3] ls1046ardb: SPL size reduction in case of non-xip boot

[Sumit Garg]

Using changes in this patch we were able to reduce approx 4k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1046ardb/Makefile to remove
   compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1046ardb/ls1046ardb.c to keep
   only ddr_init and board_early_init_f funcations in case of SPL
   build.
3. Changes in ls1046a_common.h & ls1046ardb.h to remove driver
   specific macros due to which static data was being compiled in
   case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
   build and NAND driver from bieng compiled in case of SPL MMC build.

Signed-off-by: Vinitha Pillai 
Signed-off-by: Sumit Garg 
---

Changes in v3:
Reorganised way to remove driver macros in ls1046a_common.h & ls1046ardb.h
files for easy maintainability.

Changes in v2:
Rebased and fixed compilation warning on ls1046aqds.

 board/freescale/ls1046aqds/Makefile |  2 ++
 board/freescale/ls1046ardb/Makefile |  4 +++-
 board/freescale/ls1046ardb/ls1046ardb.c | 16 +---
 include/configs/ls1046a_common.h| 23 +++
 include/configs/ls1046ardb.h| 25 -
 5 files changed, 61 insertions(+), 9 deletions(-)

diff --git a/board/freescale/ls1046aqds/Makefile 
b/board/freescale/ls1046aqds/Makefile
index df6e546..6267522 100644
--- a/board/freescale/ls1046aqds/Makefile
+++ b/board/freescale/ls1046aqds/Makefile
@@ -5,5 +5,7 @@
 #
 
 obj-y += ddr.o
+ifndef CONFIG_SPL_BUILD
 obj-y += eth.o
+endif
 obj-y += ls1046aqds.o
diff --git a/board/freescale/ls1046ardb/Makefile 
b/board/freescale/ls1046ardb/Makefile
index 348eb76..b92ed0b 100644
--- a/board/freescale/ls1046ardb/Makefile
+++ b/board/freescale/ls1046ardb/Makefile
@@ -4,7 +4,9 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y += cpld.o
 obj-y += ddr.o
 obj-y += ls1046ardb.o
+ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_SYS_DPAA_FMAN) += eth.o
+obj-y += cpld.o
+endif
diff --git a/board/freescale/ls1046ardb/ls1046ardb.c 
b/board/freescale/ls1046ardb/ls1046ardb.c
index 02b6c4c..0cc508b 100644
--- a/board/freescale/ls1046ardb/ls1046ardb.c
+++ b/board/freescale/ls1046ardb/ls1046ardb.c
@@ -24,6 +24,14 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int board_early_init_f(void)
+{
+   fsl_lsch2_early_init_f();
+
+   return 0;
+}
+
+#ifndef CONFIG_SPL_BUILD
 int checkboard(void)
 {
static const char *freq[2] = {"100.00MHZ", "156.25MHZ"};
@@ -56,13 +64,6 @@ int checkboard(void)
return 0;
 }
 
-int board_early_init_f(void)
-{
-   fsl_lsch2_early_init_f();
-
-   return 0;
-}
-
 int board_init(void)
 {
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
@@ -161,3 +162,4 @@ int ft_board_setup(void *blob, bd_t *bd)
 
return 0;
 }
+#endif
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 1ed7517..4c25433 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -7,6 +7,17 @@
 #ifndef __LS1046A_COMMON_H
 #define __LS1046A_COMMON_H
 
+/* SPL build */
+#ifndef CONFIG_SPL_BUILD
+#define QBMAN
+#define FMAN_UCODE
+#define CMD_ENV
+#define MISC
+#endif
+#if !(defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
+#define MMC
+#endif
+
 #define CONFIG_REMAKE_ELF
 #define CONFIG_FSL_LAYERSCAPE
 #define CONFIG_MP
@@ -109,20 +120,28 @@
 #define CONFIG_SYS_I2C_MXC_I2C4
 
 /* Command line configuration */
+#ifdef CMD_ENV
 #define CONFIG_CMD_ENV
+#endif
 
 /* MMC */
+#ifdef MMC
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 #endif
+#endif
 
+#ifdef QBMAN
 #define CONFIG_SYS_DPAA_QBMAN  /* Support Q/Bman */
+#endif
 
 /* FMan ucode */
+#ifdef FMAN_UCODE
 #define CONFIG_SYS_DPAA_FMAN
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_SYS_FM_MURAM_SIZE   0x6
+#endif
 
 #ifdef CONFIG_SD_BOOT
 /*
@@ -156,6 +175,7 @@
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE   128
 
+#ifdef MISC
 /* Initial environment variables */
 #define CONFIG_EXTRA_ENV_SETTINGS  \
"hwconfig=fsl_ddr:bank_intlv=auto\0"\
@@ -173,13 +193,16 @@
 #define CONFIG_BOOTARGS"console=ttyS0,115200 
root=/dev/ram0 " \
"earlycon=uart8250,mmio,0x21c0500 " \
MTDPARTS_DEFAULT
+#endif
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE  512 /* Console I/O Buffer Size */
 #define CONFIG_SYS_PBSIZE  (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
 #define CONFIG_SYS_BARGSIZECONFIG_SYS_CBSIZE /* Boot args buffer */
 #define CONFIG_SYS_LONGHELP
+#ifdef MISC
 #define CONFIG_CMDLINE_EDITING 1
+#endif
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_MAXARGS 64  /* max command args */
 
diff --git 

[U-Boot] [PATCH v3] ls1043ardb: SPL size reduction in case of non-xip boot

[Sumit Garg]

Using changes in this patch we were able to reduce approx 10k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1043ardb/Makefile to remove
   compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1043ardb/ls1043ardb.c to keep
   only ddr_init and board_early_init_f funcations in case of SPL
   build.
3. Changes in ls1043a_common.h & ls1043ardb.h to remove driver
   specific macros due to which static data was being compiled in
   case of SPL build.
4. Disable MMC driver from bieng compiled in case of SPL NAND
   build and NAND driver from bieng compiled in case of SPL MMC build.
5. Remove I2C driver support from SPL in case of LS1043ARDB.

Signed-off-by: Vinitha Pillai 
Signed-off-by: Sumit Garg 
---

Changes in v3:
Reorganised way to remove driver macros in ls1043a_common.h & ls1043ardb.h
files for easy maintainability.

Changes in v2:
Rebased and fixed compilation warning on ls1043aqds.

 board/freescale/ls1043aqds/Makefile |  2 ++
 board/freescale/ls1043ardb/Makefile |  4 +++-
 board/freescale/ls1043ardb/ls1043ardb.c | 18 +++---
 configs/ls1043ardb_sdcard_defconfig |  1 -
 include/configs/ls1043a_common.h| 29 +
 include/configs/ls1043ardb.h| 27 +++
 6 files changed, 72 insertions(+), 9 deletions(-)

diff --git a/board/freescale/ls1043aqds/Makefile 
b/board/freescale/ls1043aqds/Makefile
index f727bfd..49d8d7d 100644
--- a/board/freescale/ls1043aqds/Makefile
+++ b/board/freescale/ls1043aqds/Makefile
@@ -5,5 +5,7 @@
 #
 
 obj-y += ddr.o
+ifndef CONFIG_SPL_BUILD
 obj-y += eth.o
+endif
 obj-y += ls1043aqds.o
diff --git a/board/freescale/ls1043ardb/Makefile 
b/board/freescale/ls1043ardb/Makefile
index 5fe1cc9..2a4452e 100644
--- a/board/freescale/ls1043ardb/Makefile
+++ b/board/freescale/ls1043ardb/Makefile
@@ -4,7 +4,9 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y += cpld.o
 obj-y += ddr.o
 obj-y += ls1043ardb.o
+ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_SYS_DPAA_FMAN) += eth.o
+obj-y += cpld.o
+endif
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c 
b/board/freescale/ls1043ardb/ls1043ardb.c
index 2333843..6de7f9a 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -29,6 +29,15 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int board_early_init_f(void)
+{
+   fsl_lsch2_early_init_f();
+
+   return 0;
+}
+
+#ifndef CONFIG_SPL_BUILD
+
 int checkboard(void)
 {
static const char *freq[2] = {"100.00MHZ", "156.25MHZ"};
@@ -67,13 +76,6 @@ int checkboard(void)
return 0;
 }
 
-int board_early_init_f(void)
-{
-   fsl_lsch2_early_init_f();
-
-   return 0;
-}
-
 int board_init(void)
 {
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
@@ -215,3 +217,5 @@ u16 flash_read16(void *addr)
 
return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00);
 }
+
+#endif
diff --git a/configs/ls1043ardb_sdcard_defconfig 
b/configs/ls1043ardb_sdcard_defconfig
index e57c42b..6bebbd9 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -17,7 +17,6 @@ CONFIG_SPL=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
 CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GPT=y
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 5a5f951..19a808a 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -7,6 +7,21 @@
 #ifndef __LS1043A_COMMON_H
 #define __LS1043A_COMMON_H
 
+/* SPL build */
+#ifndef CONFIG_SPL_BUILD
+#define FMAN_UCODE
+#define DSPI
+#define PCIE
+#define CMD_ENV
+#define MISC
+#endif
+#if !(defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
+#define MMC
+#endif
+#if !(defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT))
+#define IFC
+#endif
+
 #define CONFIG_REMAKE_ELF
 #define CONFIG_FSL_LAYERSCAPE
 #define CONFIG_LS1043A
@@ -82,6 +97,7 @@
 #endif
 
 /* IFC */
+#ifdef IFC
 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_FSL_IFC
 /*
@@ -102,6 +118,7 @@
 #define CONFIG_FLASH_SHOW_PROGRESS 45  /* count down from 45/5: 9..1 */
 #endif
 #endif
+#endif
 
 /* I2C */
 #define CONFIG_SYS_I2C
@@ -112,6 +129,7 @@
 #define CONFIG_SYS_I2C_MXC_I2C4
 
 /* PCIe */
+#ifdef PCIE
 #define CONFIG_PCIE1   /* PCIE controller 1 */
 #define CONFIG_PCIE2   /* PCIE controller 2 */
 #define CONFIG_PCIE3   /* PCIE controller 3 */
@@ -121,17 +139,23 @@
 #define CONFIG_PCI_SCAN_SHOW
 #define CONFIG_CMD_PCI
 #endif
+#endif
 
 /* Command line configuration */
+#ifdef CMD_ENV
 #define CONFIG_CMD_ENV
+#endif
 
 /*  MMC  */
+#ifdef MMC
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33

[U-Boot] [PATCH] ARM: socfpga: boot0 hook: remove macro from boot0 header file

[tien . fong . chee]

From: "Chee, Tien Fong" 

Commit ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole
header file") miss out cleaning macro in this header file, and this
has broken implementation of a boot header capability in socfpga
SPL. Remove the macro in this file, and recovering it back
to proper functioning.

Fixes: ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole
header file")

Signed-off-by: Chee, Tien Fong 
---
 arch/arm/mach-socfpga/include/mach/boot0.h | 24 ++--
 1 file changed, 10 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h 
b/arch/arm/mach-socfpga/include/mach/boot0.h
index aaada31..22d9e7f 100644
--- a/arch/arm/mach-socfpga/include/mach/boot0.h
+++ b/arch/arm/mach-socfpga/include/mach/boot0.h
@@ -8,21 +8,17 @@
 #define __BOOT0_H
 
 #ifdef CONFIG_SPL_BUILD
-#define ARM_SOC_BOOT0_HOOK \
-   .balignl 64,0xf33db33f; \
-   \
-   .word   0x1337c0d3; /* SoCFPGA preloader validation word */ \
-   .word   0xc01df00d; /* Version, flags, length */\
-   .word   0xcafec0d3; /* Checksum, zero-pad */\
-   nop;\
-   \
-   b reset;/* SoCFPGA jumps here */\
-   nop;\
-   nop;\
+   .balignl 64,0xf33db33f;
+
+   .word   0x1337c0d3; /* SoCFPGA preloader validation word */
+   .word   0xc01df00d; /* Version, flags, length */
+   .word   0xcafec0d3; /* Checksum, zero-pad */
nop;
-#else
-#define ARM_SOC_BOOT0_HOOK
-#endif
 
+   b reset;/* SoCFPGA jumps here */
+   nop;
+   nop;
+   nop;
+#endif
 
 #endif /* __BOOT0_H */
-- 
2.7.4

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Re: [U-Boot] [PATCH] ARM: socfpga: boot0 hook: remove macro from boot0 header file

[Chee, Tien Fong]

On Rab, 2017-03-29 at 11:28 +0800, tien.fong.c...@intel.com wrote:
> From: "Chee, Tien Fong" 
> 
> Commit ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole
> header file") miss out cleaning macro in this header file, and this
> has broken implementation of a boot header capability in socfpga
> SPL. Remove the macro in this file, and recovering it back
> to proper functioning.
> 
Please ignore this patch, i will send out another patch. Thanks.
> Fixes: ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole
> header file")
> 
> Signed-off-by: Chee, Tien Fong 
> ---
>  arch/arm/mach-socfpga/include/mach/boot0.h | 4 
>  1 file changed, 4 deletions(-)
> 
> diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h
> b/arch/arm/mach-socfpga/include/mach/boot0.h
> index aaada31..40f9d32 100644
> --- a/arch/arm/mach-socfpga/include/mach/boot0.h
> +++ b/arch/arm/mach-socfpga/include/mach/boot0.h
> @@ -8,7 +8,6 @@
>  #define __BOOT0_H
>  
>  #ifdef CONFIG_SPL_BUILD
> -#define ARM_SOC_BOOT0_HOOK   
> \
>   .balignl 64,0xf33db33f; 
>   \
>   
> \
>   .word   0x1337c0d3; /* SoCFPGA preloader
> validation word */\
> @@ -20,9 +19,6 @@
>   nop;
> \
>   nop;
> \
>   nop;
> -#else
> -#define ARM_SOC_BOOT0_HOOK
>  #endif
>  
> -
>  #endif /* __BOOT0_H */
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[U-Boot] [PATCH] ARM: socfpga: boot0 hook: remove macro from boot0 header file

[tien . fong . chee]

From: "Chee, Tien Fong" 

Commit ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole
header file") miss out cleaning macro in this header file, and this
has broken implementation of a boot header capability in socfpga
SPL. Remove the macro in this file, and recovering it back
to proper functioning.

Fixes: ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole
header file")

Signed-off-by: Chee, Tien Fong 
---
 arch/arm/mach-socfpga/include/mach/boot0.h | 4 
 1 file changed, 4 deletions(-)

diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h 
b/arch/arm/mach-socfpga/include/mach/boot0.h
index aaada31..40f9d32 100644
--- a/arch/arm/mach-socfpga/include/mach/boot0.h
+++ b/arch/arm/mach-socfpga/include/mach/boot0.h
@@ -8,7 +8,6 @@
 #define __BOOT0_H
 
 #ifdef CONFIG_SPL_BUILD
-#define ARM_SOC_BOOT0_HOOK \
.balignl 64,0xf33db33f; \
\
.word   0x1337c0d3; /* SoCFPGA preloader validation word */ \
@@ -20,9 +19,6 @@
nop;\
nop;\
nop;
-#else
-#define ARM_SOC_BOOT0_HOOK
 #endif
 
-
 #endif /* __BOOT0_H */
-- 
2.7.4

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[U-Boot] Hash and crypto accelerator uclasses

[Rick Altherr]

I started looking into the Aspeed AST2400/2500 Hash and Crypto Engine
(HACE) because I'm annoyed by the slight delay during FIT hash
calculation.  HACE is a single device that does hashing, DES/AES, and
RSA in either immediate mode or via a single command queue.

I looked at drivers/crypto/fsl which supports their CAAM device and
has a very similar architecture.  There they register a UCLASS_MOD_EXP
driver for the RSA portion and have a separate legacy driver that
implements the hw_hash methods.  Does making a new uclass for hash
accelerators make sense or is it better to have a single crypto uclass
that handles both hashing and RSA?

From a device tree standpoint, having a single node for HACE is
cleaner and more accurately represents the hardware.  I could treat it
as a multi-function device and add child nodes for hash and rsa but
that is bleeding an implementation detail into the device tree.

Linux deals with this by having drivers register individual algorithms
with the crypto framework during probe.  I like this approach but it
feels oddly out of place in U-Boot's driver model where iterating over
the devices in a uclass is common.  Is this pattern being
intentionally avoided in U-Boot?

Rick
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Re: [U-Boot] [PATCH v2] rockchip: mmc: rk3399: work around DMA issue in SPL

[Kever Yang]

Hi Philipp,

So you got hang in SPL if the DWMMC is no in fifo mode, do you have

any clue for what's the root cause?

+ Ziyuan,

Hi Ziyuan,

Could you double check this issue? Does it also happen at rk3288 dwmmc?

Thanks,
- Kever
On 03/29/2017 01:14 AM, Philipp Tomsich wrote:

The RK3399 hangs during DMA of the Designware MMC controller, when
performing DMA-based transactions in SPL.  To work around this issue,
we disable DMA-based access modes in the SPL stage.

With this fix in place, we can now drop 'fifo-mode' in the DTS for the
RK3399-Q7 (Puma).

Signed-off-by: Philipp Tomsich 

---

Changes in v2:
- Fixes switching to fifo_mode (should have been 1) in SPL. I broke
   this at the 11th hour due to sloppy preparation of the patch.

  arch/arm/dts/rk3399-puma.dts  |  1 -
  drivers/mmc/rockchip_dw_mmc.c | 11 +++
  2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts
index 917df1e..71eb72d 100644
--- a/arch/arm/dts/rk3399-puma.dts
+++ b/arch/arm/dts/rk3399-puma.dts
@@ -91,7 +91,6 @@
   {
  u-boot,dm-pre-reloc;
bus-width = <4>;
-   fifo-mode; /* until we fix DMA in SPL */
status = "okay";
  };
  
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c

index c36eda0..5b4ed7a 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -76,6 +76,17 @@ static int rockchip_dwmmc_ofdata_to_platdata(struct udevice 
*dev)
return -EINVAL;
priv->fifo_mode = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
  "fifo-mode");
+
+#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
+   /*
+* For a RK3399 SPL build, force fifo_mode to on (i.e. disable
+* DMA) as the MMC transaction will otherwise hang. This issue
+* reproduces only for SPL (i.e. BL2 in the ATF terminology),
+* but doesn't occur with the full U-Boot stage.
+*/
+   priv->fifo_mode = 1;
+#endif
+
if (fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
 "clock-freq-min-max", priv->minmax, 2))
return -EINVAL;



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Re: [U-Boot] [PATCH] ARM: socfpga: Fix broken implementation and enhancing boot header

[Chee, Tien Fong]

On Sel, 2017-03-28 at 11:38 +0200, Marek Vasut wrote:
> On 03/28/2017 11:25 AM, tien.fong.c...@intel.com wrote:
> > 
> > From: "Chee, Tien Fong" 
> > 
> > Fixing the broken implementation caused by the patch
> > commit:ce62e57fc57177352a02b76dace0173bd13404b6, ARM: boot0 hook:
> See section 2) here [1] , in particular the part about referencing
> commits and the Fixes: tag .
> 
> [1] https://www.kernel.org/doc/html/latest/process/submitting-patches
> .html
> 
> > 
> > remove macro, include whole header file. This patch also enhances
> > boot header to contain more special data.
> This should be a separate patch then.
> 
okay. Thanks.
> > 
> > Signed-off-by: Chee, Tien Fong 
> > ---
> >  arch/arm/mach-socfpga/include/mach/boot0.h | 30 
> > --
> >  1 file changed, 16 insertions(+), 14 deletions(-)
> > 
> > diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h
> > b/arch/arm/mach-socfpga/include/mach/boot0.h
> > index aaada31..877866a 100644
> > --- a/arch/arm/mach-socfpga/include/mach/boot0.h
> > +++ b/arch/arm/mach-socfpga/include/mach/boot0.h
> > @@ -8,21 +8,23 @@
> >  #define __BOOT0_H
> >  
> >  #ifdef CONFIG_SPL_BUILD
> > -#define ARM_SOC_BOOT0_HOOK 
> > \
> > -   .balignl 64,0xf33db33f; 
> > \
> > -   
> > \
> > -   .word   0x1337c0d3; /* SoCFPGA preloader
> > validation word */  \
> > -   .word   0xc01df00d; /* Version, flags, length
> > */  \
> > -   .word   0xcafec0d3; /* Checksum, zero-pad */
> > \
> > -   nop;
> > \
> > -   
> > \
> > -   b reset;/* SoCFPGA jumps here */
> > \
> > -   nop;
> > \
> > -   nop;
> > \
> > -   nop;
> > -#else
> > -#define ARM_SOC_BOOT0_HOOK
> > +   .balignl 64,0xf33db33f;
> > +
> > +   /* Start of header offset */
> > +   .word   0x1337c0d3; /* SoCFPGA preloader validation
> > word(4B) */
> > +   .word   0xc01df00d; /* Header
> > length(2B),flags(1B),version(1B) */
> > +#ifndef CONFIG_TARGET_SOCFPGA_GEN5
> > +   .word   0xcafec0d3; /* Program length(4B) */
> > +   .word   0xf00dcafe; /* Program entry
> > offset(4B),relative to  */
> > +   /* the start of program header */
> >  #endif
> > +   .word   0xfeedface; /* Simple checksum(2B),spare
> > offset(2B) */
> > +   nop;
> >  
> > +   b reset;/* SoCFPGA jumps here */
> > +   nop;
> > +   nop;
> > +   nop;
> > +#endif
> >  
> >  #endif /* __BOOT0_H */
> > 
> 
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[U-Boot] Compile v2017.03 on a system where Python 3 is default

[Stefan Agner]

Hi,

When I try to compile U-Boot on my Arch Linux system I get the following
error:

LDFLAGS="" python ./lib/libfdt/setup.py \
"-Wall -Wstrict-prototypes -O2 -fomit-frame-pointer-include
./include/libfdt_env.h -idirafterinclude -idirafter./arch/arm/include
-I./lib/libfdt -I./tools -DUSE_HOSTCC -D__KERNEL_STRICT_NAMES
-D_GNU_SOURCE " lib/libfdt/fdt.c lib/libfdt/fdt_ro.c lib/libfdt/fdt_rw.c
lib/libfdt/fdt_strerror.c lib/libfdt/fdt_wip.c lib/libfdt/fdt_region.c
lib/libfdt/fdt_sw.c tools/libfdt_wrap.c
mv _libfdt.so tools/_libfdt.so
mv: cannot stat '_libfdt.so': No such file or directory
make[1]: *** [tools/Makefile:124: tools/_libfdt.so] Error 1
make: *** [Makefile:1229: tools] Error 2


As far as I can tell the issue is that python defaults on my system to
python 3:
$ python --version
Python 3.6.0

I can fix the issue by explicitly ask for python2, not sure if that is
the proper way to fix this though:

diff --git a/tools/Makefile b/tools/Makefile
index 1c840d7ae2..c5e422edf9 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -120,7 +120,7 @@ _libfdt.so-sharedobjs += $(LIBFDT_OBJS)
 libfdt:

 tools/_libfdt.so: $(patsubst %.o,%.c,$(LIBFDT_OBJS))
tools/libfdt_wrap.c
-   LDFLAGS="$(HOSTLDFLAGS)" python $(srctree)/lib/libfdt/setup.py \
+   LDFLAGS="$(HOSTLDFLAGS)" python2 $(srctree)/lib/libfdt/setup.py
\
"$(_hostc_flags)" $^
mv _libfdt.so $@


It works, but with warnings:
LDFLAGS="" python2 ./lib/libfdt/setup.py \
"-Wall -Wstrict-prototypes -O2 -fomit-frame-pointer-include
./include/libfdt_env.h -idirafterinclude -idirafter./arch/arm/include
-I./lib/libfdt -I./tools -DUSE_HOSTCC -D__KERNEL_STRICT_NAMES
-D_GNU_SOURCE " lib/libfdt/fdt.c lib/libfdt/fdt_ro.c lib/libfdt/fdt_rw.c
lib/libfdt/fdt_strerror.c lib/libfdt/fdt_wip.c lib/libfdt/fdt_region.c
lib/libfdt/fdt_sw.c tools/libfdt_wrap.c
In file included from /usr/include/python2.7/Python.h:8:0,
 from tools/libfdt_wrap.c:149:
/usr/include/python2.7/pyconfig.h:1190:0: warning: "_POSIX_C_SOURCE"
redefined
 #define _POSIX_C_SOURCE 200112L

In file included from /usr/include/stdint.h:25:0,
 from
/usr/lib/gcc/x86_64-pc-linux-gnu/6.3.1/include/stdint.h:9,
 from ././include/compiler.h:19,
 from ././include/libfdt_env.h:12,
 from :0:
/usr/include/features.h:225:0: note: this is the location of the
previous definition
 # define _POSIX_C_SOURCE 200809L

In file included from /usr/include/python2.7/Python.h:8:0,
 from tools/libfdt_wrap.c:149:
/usr/include/python2.7/pyconfig.h:1212:0: warning: "_XOPEN_SOURCE"
redefined
 #define _XOPEN_SOURCE 600

In file included from /usr/include/stdint.h:25:0,
 from
/usr/lib/gcc/x86_64-pc-linux-gnu/6.3.1/include/stdint.h:9,
 from ././include/compiler.h:19,
 from ././include/libfdt_env.h:12,
 from :0:
/usr/include/features.h:166:0: note: this is the location of the
previous definition
 # define _XOPEN_SOURCE 700

mv _libfdt.so tools/_libfdt.so
  HOSTCC  tools/proftool
...


--
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[U-Boot] [PATCH] video: Remove dependecy of I2C_EDID

[Jernej Skrabec]

I2C_EDID currently selects DM_I2C. However, it is not needed. I2C_EDID
is used for building edid.c, which doesn't even use I2C bus, and by I2C
command, which knows how to use DM and old style I2C interface, so it is
not directly affected by this removal.

Furthermore, this selection can generate warning if DM display driver
is used on platform which doesn't implement DM I2C driver (for example,
sunxi platform with upcoming DM video & display driver).

Patch was tested with rockchip and sunxi boards and successfully
compiled exynos and tegra targets. They are the only consumers of
CONFIG_DISPLAY option, which is the only one which selects I2C_EDID.

Signed-off-by: Jernej Skrabec 
---

 cmd/i2c.c | 10 ++
 drivers/video/Kconfig |  1 -
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/cmd/i2c.c b/cmd/i2c.c
index 473153fbd4..7b6306e525 100644
--- a/cmd/i2c.c
+++ b/cmd/i2c.c
@@ -1630,7 +1630,8 @@ static int do_sdram (cmd_tbl_t * cmdtp, int flag, int 
argc, char * const argv[])
  * Syntax:
  * i2c edid {i2c_chip}
  */
-#if defined(CONFIG_I2C_EDID)
+#if defined(CONFIG_I2C_EDID) && \
+   (defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C))
 int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 {
uint chip;
@@ -1665,7 +1666,7 @@ int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char 
*const argv[])
return 0;
 
 }
-#endif /* CONFIG_I2C_EDID */
+#endif
 
 #ifdef CONFIG_DM_I2C
 static void show_bus(struct udevice *bus)
@@ -1936,9 +1937,10 @@ static cmd_tbl_t cmd_i2c_sub[] = {
defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C)
U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
 #endif  /* CONFIG_I2C_MULTI_BUS */
-#if defined(CONFIG_I2C_EDID)
+#if defined(CONFIG_I2C_EDID) && \
+   (defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C))
U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""),
-#endif  /* CONFIG_I2C_EDID */
+#endif
U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""),
U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""),
U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""),
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 2069576958..2f340235ee 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -355,7 +355,6 @@ config VIDEO_MVEBU
 
 config I2C_EDID
bool "Enable EDID library"
-   depends on DM_I2C
default n
help
   This enables library for accessing EDID data from an LCD panel.
-- 
2.12.1

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Re: [U-Boot] [PATCH 11/17] powerpc: freescale: Unify the two get_clocks() calls

[york sun]

On 03/28/2017 09:27 AM, Simon Glass wrote:
> Combine the conditions so this appears in the init list only once.
>
> Signed-off-by: Simon Glass 
> ---
>
>  common/board_f.c | 5 +
>  1 file changed, 1 insertion(+), 4 deletions(-)
>

Reviewed-by: York Sun 

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Re: [U-Boot] [PATCH 10/17] board_f: Use timer_init() on all archs

[york sun]

On 03/28/2017 09:27 AM, Simon Glass wrote:
> More than half of the architectures use this function so let's make them
> all use it.
>
> For those which don't actually define it, we can rely on the weak function
> in lib/time.c
>
> Signed-off-by: Simon Glass 
> ---
>
>  common/board_f.c | 4 
>  1 file changed, 4 deletions(-)
>

Reviewed-by: York Sun 

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Re: [U-Boot] [PATCH 09/17] board_f: powerpc: Use timer_init() instead of init_timebase()

[york sun]

On 03/28/2017 09:27 AM, Simon Glass wrote:
> There is no good reason to use a different name on PowerPC. Change it to
> timer_init() like the others.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/powerpc/cpu/mpc5xx/cpu_init.c| 2 +-
>  arch/powerpc/lib/time.c   | 2 +-
>  board/freescale/mpc8313erdb/mpc8313erdb.c | 2 +-
>  board/freescale/mpc8315erdb/mpc8315erdb.c | 2 +-
>  common/board_f.c  | 4 +---
>  include/common.h  | 1 -
>  6 files changed, 5 insertions(+), 8 deletions(-)
>

Reviewed-by: York Sun 


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Re: [U-Boot] [PATCH 08/17] board_f: powerpc: Unified get_clocks() portion of init sequence

[york sun]

On 03/28/2017 09:27 AM, Simon Glass wrote:
> Now that both branches of the #if do the same thing, we can unify them.
>
> Signed-off-by: Simon Glass 
> ---
>
>  common/board_f.c | 8 ++--
>  1 file changed, 2 insertions(+), 6 deletions(-)
>

Reviewed-by: York Sun 

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Re: [U-Boot] [PATCH 05/17] board_f: powerpc: Rename get_clocks_866() to get_clocks()

[york sun]

On 03/28/2017 09:27 AM, Simon Glass wrote:
> We really don't need to have a name like this in the generic init
> sequence. Use the generic get_clocks() name so that we can merge these
> two at some point.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/powerpc/cpu/mpc8xx/speed.c | 2 +-
>  common/board_f.c| 2 +-
>  include/common.h| 1 -
>  3 files changed, 2 insertions(+), 3 deletions(-)
>

Reviewed-by: York Sun 

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[U-Boot] [PATCH 12/17] board_f: powerpc: Move prt_83xx_rsr() to private code

[Simon Glass]

This function is called just before checkcpu() on MPX83xx. Move it to the
code for that arch.

Signed-off-by: Simon Glass 
---

 arch/powerpc/cpu/mpc83xx/cpu.c   | 5 +
 arch/powerpc/cpu/mpc83xx/cpu_init.c  | 1 +
 arch/powerpc/include/asm/processor.h | 2 ++
 common/board_f.c | 3 ---
 include/common.h | 2 --
 5 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index c87f0fdd29..cb82621ec4 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -33,6 +33,7 @@ int checkcpu(void)
u32 pvr = get_pvr();
u32 spridr;
char buf[32];
+   int ret;
int i;
 
const struct cpu_type {
@@ -61,6 +62,10 @@ int checkcpu(void)
 
immr = (immap_t *)CONFIG_SYS_IMMR;
 
+   ret = prt_83xx_rsr();
+   if (ret)
+   return ret;
+
puts("CPU:   ");
 
switch (pvr & 0x) {
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c 
b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 3a0916bdbf..2a9db0c51b 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #ifdef CONFIG_USB_EHCI_FSL
 #include 
 #endif
diff --git a/arch/powerpc/include/asm/processor.h 
b/arch/powerpc/include/asm/processor.h
index 81bae6f008..c032726df1 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -1354,6 +1354,8 @@ void ll_puts(const char *);
 /* In misc.c */
 void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
 
+int prt_83xx_rsr(void);
+
 #endif /* ndef ASSEMBLY*/
 
 #ifdef CONFIG_MACH_SPECIFIC
diff --git a/common/board_f.c b/common/board_f.c
index cbd9f67709..74cdef0ddb 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -864,9 +864,6 @@ static const init_fnc_t init_sequence_f[] = {
prt_8260_rsr,
prt_8260_clks,
 #endif /* CONFIG_MPC8260 */
-#if defined(CONFIG_MPC83xx)
-   prt_83xx_rsr,
-#endif
 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH)
checkcpu,
 #endif
diff --git a/include/common.h b/include/common.h
index 684083510b..6f08110b74 100644
--- a/include/common.h
+++ b/include/common.h
@@ -715,8 +715,6 @@ ulong cpu_init_f(void);
 intcpu_init_r(void);
 #if defined(CONFIG_MPC8260)
 intprt_8260_rsr  (void);
-#elif defined(CONFIG_MPC83xx)
-intprt_83xx_rsr  (void);
 #endif
 
 /* $(CPU)/interrupts.c */
-- 
2.12.2.564.g063fe858b8-goog

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Re: [U-Boot] [PATCH v2] pcie-layerscape: Fixup iommu-map property of pci node

[york sun]

On 03/21/2017 11:45 PM, Bharat Bhushan wrote:
> This patch fixup iommu-map property on pci node to have
> a valid mapping of requester-id to stream-id.
> The requester-id to stream-id mapping is based on
> PCI-LUT table initialization.
>
> Signed-off-by: Bharat Bhushan 
> ---
> v1->v2
>  - Typo error in comment about phandle of MSI node rather than iommu
>

Reformatted commit message. Applied to fsl-qoriq master, awaiting 
upstream. Thanks.

York

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[U-Boot] Please pull u-boot-fsl-qoriq master

[york sun]

Tom,

The following changes since commit 5cf618ee60a752d058a767372ca1ecb8d9c09b16:

   Merge git://git.denx.de/u-boot-arc (2017-03-24 08:19:30 -0400)

are available in the git repository at:

   git://git.denx.de/u-boot-fsl-qoriq.git

for you to fetch changes up to 78be6222b01efa12d9267876ad1d1d0daf38dfa0:

   pcie-layerscape: Fixup iommu-map property of pci node (2017-03-28 
10:54:09 -0700)


Ashish kumar (1):
   armv8: fsl-lsch3: Conditionally apply workaround for erratum a0009203

Bharat Bhushan (7):
   armv8: fsl-lsch3: rename ls2080a_stream_id.h to stream_id_lsch3.h
   armv8: fsl-lsch3: Rewrite comment for stream IDs
   arvm8: pcie-layerscape: Define stream-ids for Layerscape Chassis-2
   armv8: fsl-lsch2: Use Chassis-2 streamid definition for ls1046a
   armv8: fsl-lsch2: Use Chassis-2 streamid definition for ls1012a
   pcie-layerscape: Initialize pci-lut for NXP chasis-2 socs
   pcie-layerscape: Fixup iommu-map property of pci node

Hou Zhiqiang (9):
   fsl-layerscape/ppa: cleanup ppa.h
   pci: layerscape: enable PCIe config ready
   pci: layerscape: add LS2088A series SoC pcie support
   pci: layerscape: Fixup device tree node for ls2088a
   mtd: nand: add initialization flag
   mtd: nand: remove nand size print from nand_init function
   fsl: PPA: add support PPA image loading from NAND and SD
   armv8: Kconfig: fsl-ppa: support load PPA from eMMC/SD and NAND Flash
   fsl-layerscape/ls104xardb: enable PPA support for eMMC/SD and 
NAND boot

Prabhakar Kushwaha (2):
   arm: fsl-layerscape: Move QSGMII wriop_init to SoC file
   armv8:fsl-layerscape: Avoid RCWSR28 register hard-coding

Priyanka Jain (1):
   armv8/fsl-layerscape: Update erratum A009635 implementation

Santan Kumar (2):
   armv8: ls2080ardb, ls2080aqds: Add mcmemsize in default env setting
   board: freescale: ls2080a/ls2088a: Enable PPA

Suresh Gupta (2):
   spi: fsl_qspi: Add support for single chip select
   armv8: dts: fsl-ls1012a: Change number of CS in SPI node

Udit Agarwal (3):
   armv8: lsch3: SECURE_BOOT: Define CONFIG_SYS_LS_PPA_ESBC_ADDR for 
LS2080A
   armv8: LS2080A: Move sec_init to board_init
   fsl: Secure Boot: Enable IE (Key extention) Feature

Wenbin Song (1):
   armv8: ls1043a/ls1046aqds: fix the offsets of MTD partitions on 
NOR flash

Yingxi Yu (1):
   armv8/fsl-layerscape: fdt: Skip checking USB clock on LS1012A

yuan linyu (1):
   tools: plbimage support generate rcw file

  arch/arm/cpu/armv8/fsl-layerscape/Kconfig  |  20 +++
  arch/arm/cpu/armv8/fsl-layerscape/cpu.c|  55 +++-
  arch/arm/cpu/armv8/fsl-layerscape/fdt.c|   3 +-
  .../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c|  53 
  arch/arm/cpu/armv8/fsl-layerscape/ppa.c| 143 
-
  arch/arm/cpu/armv8/fsl-layerscape/soc.c|   4 +
  arch/arm/dts/fsl-ls1012a.dtsi  |   2 +-
  .../include/asm/arch-fsl-layerscape/fsl_serdes.h   |   8 +-
  .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |   9 ++
  arch/arm/include/asm/arch-fsl-layerscape/ppa.h |   7 +-
  .../asm/arch-fsl-layerscape/stream_id_lsch2.h  |  63 +
  .../{ls2080a_stream_id.h => stream_id_lsch3.h} |  15 ++-
  arch/arm/include/asm/armv8/sec_firmware.h  |   4 -
  arch/arm/include/asm/fsl_secure_boot.h |   8 +-
  board/freescale/common/fsl_validate.c  |  88 ++---
  board/freescale/ls1043ardb/ls1043ardb.c|   2 -
  board/freescale/ls2080aqds/ls2080aqds.c|  13 +-
  board/freescale/ls2080ardb/ls2080ardb.c|  11 +-
  common/board_r.c   |   1 +
  configs/ls1043ardb_nand_defconfig  |   1 +
  configs/ls1043ardb_sdcard_defconfig|   1 +
  configs/ls1046ardb_emmc_defconfig  |   1 +
  configs/ls1046ardb_sdcard_defconfig|   1 +
  configs/ls2080aqds_defconfig   |   1 +
  configs/ls2080ardb_defconfig   |   1 +
  drivers/mtd/nand/nand.c|  17 ++-
  drivers/net/ldpaa_eth/ls2080a.c|  30 +
  drivers/pci/pcie_layerscape.c  |  42 ++
  drivers/pci/pcie_layerscape.h  |  10 ++
  drivers/pci/pcie_layerscape_fixup.c|  94 --
  drivers/spi/fsl_qspi.c |   5 +-
  include/configs/ls1012a_common.h   |   1 +
  include/configs/ls1043a_common.h   |  15 ++-
  include/configs/ls1046a_common.h   |   1 +
  include/configs/ls1046aqds.h   |  14 +-
  include/configs/ls2080a_common.h   |   2 +-
  include/configs/ls2080aqds.h   |   2 +
  include/configs/ls2080ardb.h  

Re: [U-Boot] [patch v3] armv8: ls1043a/ls1046aqds: fix the offsets of MTD partitions on Nor flash

[york sun]

On 03/24/2017 03:20 AM, Wenbin song wrote:
> Fix the offsets of MTD partitions on Nor flash on ls1043ardb, ls1043aqds
> and ls1046aqds boards.
> Delete the rcw, uboot env and fman partitions.
> Add user partitions for general usage.
>
> Signed-off-by: Wenbin Song 
> ---
> Changes for v1:
>   Delete the rcw, uboot env and fman partitions.
>   Add user partitions for general usage.


Minor adjustment to subject and commit message. Applied to fsl-qoriq 
master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH v2 3/6] pcie-layerscape: Define stream-ids for Layerscape Chassis-2

[york sun]

On 03/21/2017 11:39 PM, Bharat Bhushan wrote:
> Layerscape Chassis-2 have PCIe device, some platform devices and
> DPAA1 devices which will use stream-ids for iommu level isolation as
> they lies behind SMMU.
>
> This patch defines the stream-ids for Chassis-2 devices.
> stream-ids for DPAA1 are reserved for future use.
>
> Signed-off-by: Bharat Bhushan 
> ---

Reformat commit message. Applied to fsl-qoriq master, awaiting upstream. 
Thanks.

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Re: [U-Boot] [PATCH v2 4/6] fsl-lsch2: Use Chassis-2 streamid definition for ls1046a

[york sun]

On 03/21/2017 11:39 PM, Bharat Bhushan wrote:
> As ls1046a is Chassis-2 type SOC and shares same streamid
> definition, this patch adds using streamids for ls1046
>
> Signed-off-by: Bharat Bhushan 
> ---

Minor adjustment to commit message. Applied to fsl-qoriq master, 
awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH][v2]board: freescale: ls2080a/ls2088a: Enable PPA

[york sun]

On 03/06/2017 09:48 PM, Santan Kumar wrote:
> Enable PPA on LS2080A, LS2088A boards:
> -LS2080ARDB, LS2080AQDS
> -LS2088ARDB, LS2088AQDS
>
> Signed-off-by: Santan Kumar 
> Signed-off-by: Abhimanyu Saini 
> Signed-off-by: Priyanka Jain 
> ---
> Changes for v2:
>  Changed the subject
>  Made changes based on latest ppa config


Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCHv3 5/5] fsl-layerscape/ls104xardb: enable PPA support for eMMC/SD and NAND boot

[york sun]

On 03/17/2017 01:27 AM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang 
>
> Signed-off-by: Hou Zhiqiang 
> ---
> V3:
>  - no change
>

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCHv3 3/5] fsl PPA: add support PPA image loading from NAND and SD

[york sun]

On 03/17/2017 01:27 AM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang 
>
> Signed-off-by: Hou Zhiqiang 
> ---
> V3:
>  - Added checking for return value of mmc initialization.
>  - Added checking the fdt header before getting the size of PPA image.
>
>  arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 143 
> +++-
>  1 file changed, 142 insertions(+), 1 deletion(-)
>

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH] armv8/fsl-layerscape: fdt: On ls1012 don't check sysclk for USB

[york sun]

On 03/16/2017 12:32 AM, Yingxi Yu wrote:
> USB requires 100MHz clock. On ls1012, sysclk(125MHz) is not for USB.
> Another 100MHz clock is for USB. So For USB, check if sysclk is 100MHz
> is failed on ls1012, sysclk is not for USB. Don't check sysclk for
> USB on ls1012.
>
> Signed-off-by: Yingxi Yu 
> ---

Rewrote commit message. Applied to fsl-qoriq master, awaiting upstream. 
Thanks.

York

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Re: [U-Boot] [PATCHV2] tools: plbimage support generate rcw file

[york sun]

On 02/25/2017 04:38 PM, yuan linyu wrote:
> From: yuan linyu 
>
> some system will not generate pbl format u-boot, but require rcw.
>
> Signed-off-by: yuan linyu 
> ---

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCHv3 2/2] pci: layerscape: Add support ls2088a kernel DT node fixup

[york sun]

On 03/02/2017 08:49 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang 
>
> There isn't LS2088A DT file, actually it reuse LS2080A DT file
> under u-boot, while under kernel there are DT files for LS2080A
> and LS2088A respectively with different PCIe node compatible
> string.
>
> Signed-off-by: Hou Zhiqiang 
> ---
> V3:
>  - removed unused variable.

Reformat commit message. Applied to fsl-qoriq master, awaiting upstream. 
Thanks.

York

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Re: [U-Boot] [PATCHv3 1/5] mtd: nand: add initialization flag

[york sun]

On 03/17/2017 01:27 AM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang 
>
> Add initialization flag to avoid initializing NAND Flash multiple
> times, otherwise it will calculate a wrong total size.
>
> Signed-off-by: Hou Zhiqiang 
> ---
> V3:
>  - no change

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH v2 6/6] pcie-layerscape: Initialize pci-lut for NXP chasis-2 socs

[york sun]

On 03/21/2017 11:38 PM, Bharat Bhushan wrote:
> From: Bharat Bhushan 
>
> Layerscape Chasis-2 also uses same PCIe controller
> as used in Chasis-3 and have similar PCI-Lut.
>
> We need to initialize the pcie-lut for Chasis-2 also
> as in Chasis-3.
>
> Signed-off-by: Bharat Bhushan 
> ---

Minor adjustment in commit message. Applied to fsl-qoriq master, 
awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH v2] arm: fsl-layerscape: Move QSGMII wriop_init to SoC file

[york sun]

On 02/15/2017 07:03 AM, Ashish Kumar wrote:
> From: Prabhakar Kushwaha 
>
> MAC number used per QSGMII is not fixed. It may wary from SoC to SoC.
>
> So move QSGMII wriop_init_dpmac() to SoC file.
>
> Signed-off-by: Prabhakar Kushwaha 
> Signed-off-by: Ashish Kumar 
> ---
> v2:
> Incorporate York's Review comments
>

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH v2 5/6] fsl-lsch2: Use Chassis-2 streamid definition for ls1012a

[york sun]

On 03/21/2017 11:39 PM, Bharat Bhushan wrote:
> As ls1012a is Chassis-2 type SOC and shares same streamid
> definition, this patch adds using streamids for ls1012a
>
> Signed-off-by: Bharat Bhushan 
> ---

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH v2 1/6] fsl-lsch3: rename ls2080a_stream_id.h to stream_id_lsch3.h

[york sun]

On 03/21/2017 11:38 PM, Bharat Bhushan wrote:
> The stream ID allocation for Chasis3.0 devices,
> LS1088, LS2088 and LS2080, can be shared.
>
> This patch renames this accordingly.
>
> Signed-off-by: Bharat Bhushan 
> ---

Rewrote commit message. Applied to fsl-qoriq master, awaiting upstream. 
Thanks.

York

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Re: [U-Boot] [PATCH v2 2/6] fsl-lsch3: Rewording to support other Chassis-3 Socs

[york sun]

On 03/21/2017 11:38 PM, Bharat Bhushan wrote:
> LS2080a, LS1088a and LS2088a SOCs are based on Chassis-3
> and shared same stream-id partitioning. This patch
> rewords the definition to support all these SOCs.
>
> Also have changes in description about iommu-map property
> updates in PCI node.
>
> Signed-off-by: Bharat Bhushan 
> ---
>  .../arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h | 15 
> +--
>  1 file changed, 9 insertions(+), 6 deletions(-)

Reformat commit message. Applied to fsl-qoriq master, awaiting upstream. 
Thanks.

York

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Re: [U-Boot] [PATCH] ls2080ardb, ls2080aqds: Add mcmemsize in default env setting

[york sun]

On 02/06/2017 12:45 AM, Santan Kumar wrote:
> Initialize mcmemsize to 0x4000
>
> Signed-off-by: Santan Kumar 
> Signed-off-by: Priyanka Jain 
> ---


Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCHv3 4/5] Kconfig: fsl-ppa: support load PPA from eMMC/SD and NAND Flash

[york sun]

On 03/17/2017 01:27 AM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang 
>
> Signed-off-by: Hou Zhiqiang 
> ---
> V3:
>  - no change

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH v2] armv8:fsl-layerscape: Avoid RCWSR28 register hard-coding

[york sun]

On 02/15/2017 07:04 AM, Ashish Kumar wrote:
> From: Prabhakar Kushwaha 
>
> SerDes information is not necessary to be present in RCWSR29 register.
> It may vary from SoC to SoC.
>
> So Avoid RCWSR28 register hard-coding.
>
> Signed-off-by: Prabhakar Kushwaha 
> Signed-off-by: Ashish Kumar 
> ---
> v2:
> Incorporate York's Review comments
>

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCHv3 2/5] mtd: nand: remove nand size print from nand_init function

[york sun]

On 03/17/2017 01:27 AM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang 
>
> Add nand_size() function to move the nand size print into initr_nand().
> Remove nand size print from nand_init() to allow other function to call
> nand_init() without printing nand size.
>
> Signed-off-by: Hou Zhiqiang 
> ---
> V3:
>  - no change
>

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York
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Re: [U-Boot] [PATCHv3 1/2] pci: layerscape: add LS2088A series SoC pcie support

[york sun]

On 03/02/2017 08:49 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang 
>
> The LS2088A series SoCs has different physical memory map address and
> CCSR registers address against LS2080A series SoCs.
>
> Signed-off-by: Hou Zhiqiang 
> ---
> V3:
>  - no change
>

Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH v2] armv8: fsl-lsch3: Conditionally Remove errata a0009203 from lsch3 init

[york sun]

On 02/23/2017 02:27 AM, Ashish Kumar wrote:
>  This i2c errata is only valid for LS2080A and its variants,
>  namely LS2080A, LS2085A and LS2088A
>
> Signed-off-by: Ashish Kumar 
> ---
> v2:
>  Change Descristion to make it more specific about impacted SoC

Minor adjustment to subject and commit message. Applied to fsl-qoriq 
master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH] armv8/fsl-layerscape: Update erratum A009635 implementation

[york sun]

On 02/13/2017 09:04 PM, Priyanka Jain wrote:
> Erratum A009635 is valid only for LS2080A SoC and its
> personality.
> Add SoC svr check for execution
>
> Signed-off-by: Priyanka Jain 
> ---

Minor change to commit message. Applied to fsl-qoriq master, awaiting 
upstream. Thanks.

York

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Re: [U-Boot] [PATCH v2 1/1] Secure Boot: Enable IE (Key extention) Feature

[york sun]

On 02/09/2017 02:08 AM, Udit Agarwal wrote:
> For validating images from uboot (Such as Kernel Image), either keys
> from SoC fuses can be used or keys from a verified table of public keys
> can be used. The latter feature is called IE Key Extension Feature.
>
> For Layerscape Chasis 3 based platforms, IE table is validated by Bootrom
> and address of this table is written in scratch registers 13 and 14 via
> PBI commands.
>
> Following are the steps describing usage of this feature:
>
> 1) Verify IE Table in ISBC phase using keys stored in fuses.
> 2) Install IE table. (To be used across verification of multiple images
>stored in a static global structure.)
> 3) Use keys from IE table, to verify further images.
>
> Signed-off-by: Aneesh Bansal 
> Signed-off-by: Saksham Jain 
> Signed-off-by: Udit Agarwal 
> ---
>
> Changes for V2
> Adds more clarity in subject and description related to this feature.
> ---

Minor reformat commit message (some lines are too long). Applied to 
fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH v2 1/2] spi: fsl_qspi: Add support for one chip select

[york sun]

On 02/21/2017 12:55 AM, Suresh Gupta wrote:
> SOC’s like LS1012A has only one chip select signal
> out to connect with flash. So at one time only one
> flash is active and it is not possible to scan other
> flash at run time.
>
> Signed-off-by: Suresh Gupta 
> ---

Reformatted commit message. Applied to fsl-qoriq master, awaiting 
upstream. Thanks.

York

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Re: [U-Boot] [PATCH v2 2/2] armv8: dts: fsl-ls1012a: Change number of CS in SPI node

[york sun]

On 02/21/2017 12:55 AM, Suresh Gupta wrote:
> LS1012A has only one chip select signal out to
> connect with flash
>
> Signed-off-by: Suresh Gupta 
> ---

Minor adjustment to commit message. Applied to fsl-qoriq master, 
awaiting upstream.

York

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Re: [U-Boot] [PATCH] pci: layerscape: enable PCIe config ready

[york sun]

On 02/09/2017 11:55 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang 
>
> In EP mode, to enable accesses from the Root Complex, the
> CONFIG_READY bit must be set, otherwise any config attempts
> from the Root Complex will be returned with config retry
> status (CRS).
>
> Signed-off-by: Hou Zhiqiang 
> Signed-off-by: Minghuan Lian 
> ---


Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH 2/2] LS2080A: Move sec_init to board_init

[york sun]

On 02/03/2017 03:26 AM, Udit Agarwal wrote:
> Moves sec_init to board_init rather than in misc_init function beacuse
> PPA will be initialised in board_init function and for PPA validation
> sec_init has to be done prior to PPA init.
>
> Signed-off-by: Sumit Garg 
> Signed-off-by: Udit Agarwal 
> ---

Applied to fsl-qoriq master, awaiting upstream.

Thanks.

York


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Re: [U-Boot] [PATCH] fsl-layerscape/ppa: cleanup ppa.h

[york sun]

On 02/05/2017 07:41 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang 
>
> Moved the ifdef into ppa.h and removed the duplicated macros.
>
> Signed-off-by: Hou Zhiqiang 
> ---


Applied to fsl-qoriq master, awaiting upstream. Thanks.

York

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Re: [U-Boot] [PATCH 1/2] SECURE_BOOT: Define CONFIG_SYS_LS_PPA_ESBC_ADDR for LS2080A

[york sun]

On 02/03/2017 03:26 AM, Udit Agarwal wrote:
> Add header address for PPA to be validated during ESBC phase for LS2080A
> platform based on Layescape Chasis 3.
>
> Signed-off-by: Sumit Garg 
> Signed-off-by: Udit Agarwal 
> ---

Applied to fsl-qoriq master, awaiting upstream.

Thanks.

York

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Re: [U-Boot] [PATCH] Remove extra fdt_fixup_ethernet() call

[Joakim Tjernlund]

On Thu, 2017-03-23 at 18:02 +0100, Joakim Tjernlund wrote:
> ft_cpu_setup() already calls fdt_fixup_ethernet(), calling it
> in image_setup_libfdt() is both redundant and breaks any modifications
> done by ft_board_setup(). Restore the old behavior by removing
> the call in image_setup_libfdt()
> 
> Signed-off-by: Joakim Tjernlund 
> ---
>  common/image-fdt.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/common/image-fdt.c b/common/image-fdt.c
> index 80e3e63..b8f5654 100644
> --- a/common/image-fdt.c
> +++ b/common/image-fdt.c
> @@ -498,7 +498,6 @@ int image_setup_libfdt(bootm_headers_t *images, void 
> *blob,
>   goto err;
>   }
>   }
> - fdt_fixup_ethernet(blob);
>  
>   /* Delete the old LMB reservation */
>   lmb_free(lmb, (phys_addr_t)(u32)(uintptr_t)blob,

Ping ?

   Jocke
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[U-Boot] [PATCH v2] rockchip: mmc: rk3399: work around DMA issue in SPL

[Philipp Tomsich]

The RK3399 hangs during DMA of the Designware MMC controller, when
performing DMA-based transactions in SPL.  To work around this issue,
we disable DMA-based access modes in the SPL stage.

With this fix in place, we can now drop 'fifo-mode' in the DTS for the
RK3399-Q7 (Puma).

Signed-off-by: Philipp Tomsich 

---

Changes in v2:
- Fixes switching to fifo_mode (should have been 1) in SPL. I broke
  this at the 11th hour due to sloppy preparation of the patch.

 arch/arm/dts/rk3399-puma.dts  |  1 -
 drivers/mmc/rockchip_dw_mmc.c | 11 +++
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts
index 917df1e..71eb72d 100644
--- a/arch/arm/dts/rk3399-puma.dts
+++ b/arch/arm/dts/rk3399-puma.dts
@@ -91,7 +91,6 @@
  {
 u-boot,dm-pre-reloc;
bus-width = <4>;
-   fifo-mode; /* until we fix DMA in SPL */
status = "okay";
 };
 
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index c36eda0..5b4ed7a 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -76,6 +76,17 @@ static int rockchip_dwmmc_ofdata_to_platdata(struct udevice 
*dev)
return -EINVAL;
priv->fifo_mode = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
  "fifo-mode");
+
+#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
+   /*
+* For a RK3399 SPL build, force fifo_mode to on (i.e. disable
+* DMA) as the MMC transaction will otherwise hang. This issue
+* reproduces only for SPL (i.e. BL2 in the ATF terminology),
+* but doesn't occur with the full U-Boot stage.
+*/
+   priv->fifo_mode = 1;
+#endif
+
if (fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
 "clock-freq-min-max", priv->minmax, 2))
return -EINVAL;
-- 
1.9.1

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Re: [U-Boot] [PATCH 11/17] powerpc: freescale: Unify the two get_clocks() calls

[york sun]

On 03/28/2017 09:27 AM, Simon Glass wrote:
> Combine the conditions so this appears in the init list only once.
>
> Signed-off-by: Simon Glass 
> ---
>
>  common/board_f.c | 5 +
>  1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/common/board_f.c b/common/board_f.c
> index 9ba3163e0f..cbd9f67709 100644
> --- a/common/board_f.c
> +++ b/common/board_f.c
> @@ -843,7 +843,7 @@ static const init_fnc_t init_sequence_f[] = {
>  #if defined(CONFIG_BOARD_EARLY_INIT_F)
>   board_early_init_f,
>  #endif
> -#ifdef CONFIG_PPC
> +#if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || 
> defined(CONFIG_M68K)
>   /* get CPU and bus clocks according to the environment variable */
>   get_clocks, /* get CPU and bus clocks (etc.) */
>  #endif
> @@ -851,9 +851,6 @@ static const init_fnc_t init_sequence_f[] = {
>  #if defined(CONFIG_BOARD_POSTCLK_INIT)
>   board_postclk_init,
>  #endif
> -#if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
> - get_clocks,
> -#endif
>   env_init,   /* initialize environment */
>   init_baud_rate, /* initialze baudrate settings */
>   serial_init,/* serial communications setup */
>

The change looks OK. I will need some time to test this set on some 
boards to confirm.

York
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[U-Boot] [PATCH] rockchip: mmc: rk3399: work around DMA issue in SPL

[Philipp Tomsich]

The RK3399 hangs during DMA of the Designware MMC controller, when
performing DMA-based transctions in SPL.

To work around this issue, we disable DMA-based access modes in the
SPL stage. Note that this affects full OF_CONTROL (i.e. OF_PLATDATA
not being defined) only and aligns the behaviour with what happens
when OF_PLATDATA is defined, as fifo_mode gets overwritten to 0 in
that case.

With this fix in place, we can reenable 'fifo-mode' in the DTS for
the RK3399-Q7 (Puma).

Signed-off-by: Philipp Tomsich 

---

 arch/arm/dts/rk3399-puma.dts  |  1 -
 drivers/mmc/rockchip_dw_mmc.c | 11 +++
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts
index 917df1e..71eb72d 100644
--- a/arch/arm/dts/rk3399-puma.dts
+++ b/arch/arm/dts/rk3399-puma.dts
@@ -91,7 +91,6 @@
  {
 u-boot,dm-pre-reloc;
bus-width = <4>;
-   fifo-mode; /* until we fix DMA in SPL */
status = "okay";
 };
 
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index c36eda0..6bf4823 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -76,6 +76,17 @@ static int rockchip_dwmmc_ofdata_to_platdata(struct udevice 
*dev)
return -EINVAL;
priv->fifo_mode = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
  "fifo-mode");
+
+#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
+   /*
+* For a RK3399 SPL build, force fifo_mode to off as the MMC
+* transaction will otherwise hang.  This issue reproduces
+* only SPL (i.e. BL2 in ATF terminology), but doesn't occur
+* with the full U-Boot stage.
+*/
+   priv->fifo_mode = 0;
+#endif
+
if (fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
 "clock-freq-min-max", priv->minmax, 2))
return -EINVAL;
-- 
1.9.1

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[U-Boot] [PATCH v1 1/3] arm64: rockchip: rk3399-puma: add DDR3-1333 timings

[Philipp Tomsich]

For the initial validation of the RK3399-Q7 (Puma), the DDR3 has been
clocked at 666MHz (i.e. DDR3-1333) using the same (safe) settings as
used in Rockchip's MiniLoader.

Signed-off-by: Philipp Tomsich 
---

 arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi | 1537 ++
 1 file changed, 1537 insertions(+)
 create mode 100644 arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi

diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi 
b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
new file mode 100644
index 000..bed236d
--- /dev/null
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
@@ -0,0 +1,1537 @@
+/*
+ * (C) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+ {
+rockchip,sdram-params = <
+   0x1
+   0xa
+   0x3
+   0x2
+   0x1
+   0x0
+   0xf
+   0xf
+   1
+   0x80120e12
+   0x11030802
+   0x0002
+   0x6246
+   0x004c
+   0x
+   0x1
+   0xa
+   0x3
+   0x2
+   0x1
+   0x0
+   0xf
+   0xf
+   1
+   0x80120e12
+   0x11030802
+   0x0002
+   0x6246
+   0x004c
+   0x
+   666
+   3
+   2
+/* 13 */ 9
+   1
+   0x0600
+   0x
+   0x
+   0x
+   0x
+/* 0xaae60 */ 7
+   0x
+   0x
+   0x
+/* 0xaae60 */ 7
+   0x
+   0x
+   0x
+/* 0xaae60 */ 7
+   0x
+   0x
+   0x0100
+   0x
+   0x0101
+   0x00020100
+   0x000208d6
+   0x00051616
+   0x02000200
+   0x07140200
+   0x00071400
+   0x04000714
+   0x20040004
+   0x18090517
+   0x17200400
+   0x00180905
+   0x05172004
+   0x05001809
+   0x0c04
+   0x0400b6d0
+   0x0c040505
+   0x0400b6d0
+   0x0c040505
+   0x0400b6d0
+   0x02030005
+   0x090a0900
+   0x000a090a
+   0x14000a0a
+   0x0a0a
+   0x0001
+   0x03131313
+   0x00090909
+   0x
+   0x0301
+   0x144800ea
+   0x144800ea
+   0x144800ea
+   0x
+   0x00040004
+   0x0014
+   0x00100010
+   0x
+   0x
+   0x
+   0x
+   0x0200
+   0x02f0
+   0x02f0
+   0x00f0
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x0301
+   0x0001
+   0x
+   0x
+   0x0100
+   0x80104002
+   0x00040003
+   0x00040005
+   0x0003
+   0x00050004
+   0x0004
+   0x00040003
+   0x00040005
+   0x5120
+   0x2890
+   0x28905120
+   0x5120
+   0x2890
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x07070700
+   0x00070707
+   0x00030200
+   0x00040700
+   0x0302
+   0x02000407
+   0x0003
+   0x00030f04
+   0x00070004
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x0001
+   0x0001
+   0x20040020
+   0x00200400
+   0x01000400
+   0x0b80
+   0x
+   0x0001
+   0x0002
+   0x000e
+   0x
+   0x
+   0x
+   0x
+   0x
+   0x0086
+   0x00a70043
+   0x00a7
+   0x00430086
+   

[U-Boot] [PATCH v1 0/3] rockchip: rk3399: add RK3399-Q7 (Puma) SoM support

[Philipp Tomsich]

The RK3399-Q7 is a system-on-module featuring a Rockchip RK3399 SoC
in a Qseven-compatible form-factor.

This changeset adds basic support for the following features (validated
against the Hainan baseboard):
 * Gigabit Ethernet (incl. the KSZ9031 GbE PHY)
 * SPI on SPI1 (on-module) and SPI5 (edge-connector)
 * SPL loading the next stage from SPI, eMMC or SD card
 * Console on the external UART w/ configurable baudrate


Philipp Tomsich (3):
  arm64: rockchip: rk3399-puma: add DDR3-1333 timings
  dts: rk3399-puma: add DTS for RK3399-Q7 (Puma) SoM
  defconfig: puma-rk3399: add defconfig for the RK3399-Q7 (Puma)

 arch/arm/dts/Makefile|3 +-
 arch/arm/dts/rk3399-puma.dts |  189 
 arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi | 1537 ++
 configs/evb-rk3399_defconfig |3 +
 configs/puma-rk3399_defconfig|   73 ++
 include/configs/rk3399_common.h  |2 -
 6 files changed, 1804 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/dts/rk3399-puma.dts
 create mode 100644 arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
 create mode 100644 configs/puma-rk3399_defconfig

-- 
1.9.1

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[U-Boot] [PATCH v1 2/3] dts: rk3399-puma: add DTS for RK3399-Q7 (Puma) SoM

[Philipp Tomsich]

The RK3399-Q7 is a system-on-module featuring the Rockchip RK3399
in a Qseven-compatible form-factor.

These changes add a device-tree describing the board and its
interfaces for basic functionality (e.g. GbE, SPI, eMMC, SD-card).

This includes the following changes from the original development:

 * dts: rk3399-puma: include DTS for RK3399-Q7 SoM in the Makefile
 * dts: rk3399-puma: add gmac for the RK3399-Q7

This change enables the Gigabit Ethernet support on the RK3399-Q7.

 * dts: rk3399-puma: use serial0 for stdout
 * dts: rk3399-puma: prepare the sdmmc node for SPL booting
 * dts: rk3399-puma: enable spi1 and spi5, add /spi1/spiflash

The RK3399-Q7 (Puma) unsually (this is a build-time option for
customised boards) has an on-module SPI-flash connected to SPI1.
As of today, this is a Winbond W25Q32DW (32MBit) device.

The SPI5 controller is routed to the Q7 edge connector and provides
general-purpose SPI connectivity for customer base-boards.

With some minor improvements on integration into our outbound tree
 - explicitly modelled the SPI flash as 'spiflash' under spi0
   [dts: rk3399-puma: explicitly model spi-flash under spi1]
 - renamed the aliases to spi0 and spi1 to allow easier use of
   commands and legacy (SPL) infrastructure... i.e. the controllers
   will be 0 and 1 for 'sf probe', 'sspi', etc.
   [dts: rk3399-puma: rename aliases to number spi as 0 and 1 for commands]

 * dts: rk3399-puma: include SPI in the spl-boot-order property

Signed-off-by: Philipp Tomsich 
---

 arch/arm/dts/Makefile|   3 +-
 arch/arm/dts/rk3399-puma.dts | 189 +++
 2 files changed, 191 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/rk3399-puma.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0fbbb9b..a30b73d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -39,7 +39,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-tinker.dtb \
rk3288-popmetal.dtb \
rk3328-evb.dtb \
-   rk3399-evb.dtb
+   rk3399-evb.dtb \
+   rk3399-puma.dtb
 dtb-$(CONFIG_ARCH_MESON) += \
meson-gxbb-odroidc2.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts
new file mode 100644
index 000..917df1e
--- /dev/null
+++ b/arch/arm/dts/rk3399-puma.dts
@@ -0,0 +1,189 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+#include 
+#include "rk3399.dtsi"
+#include "rk3399-sdram-ddr3-1333.dtsi"
+
+/ {
+   model = "Theobroma Systems RK3399-Q7 SoM";
+   compatible = "tsd,puma", "rockchip,rk3399";
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   u-boot,spl-boot-order = , , 
+   };
+
+   aliases {
+   spi0 = 
+   spi1 = 
+   };
+
+   vdd_center: vdd-center {
+   compatible = "pwm-regulator";
+   pwms = < 0 25000 0>;
+   regulator-name = "vdd_center";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <140>;
+   regulator-init-microvolt = <95>;
+   regulator-always-on;
+   regulator-boot-on;
+   status = "okay";
+   };
+
+   vcc3v3_sys: vcc3v3-sys {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc3v3_sys";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   };
+
+   vcc_phy: vcc-phy-regulator {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc_phy";
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+   vcc5v0_host: vcc5v0-host-en {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc5v0_host";
+   gpio = < 25 GPIO_ACTIVE_HIGH>;
+   };
+
+   clkin_gmac: external-gmac-clock {
+   compatible = "fixed-clock";
+   clock-frequency = <12500>;
+   clock-output-names = "clkin_gmac";
+   #clock-cells = <0>;
+   };
+
+   vcc_phy: vcc-phy-regulator {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc_phy";
+   regulator-always-on;
+   regulator-boot-on;
+   };
+};
+
+_phy {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+u-boot,dm-pre-reloc;
+   bus-width = <4>;
+   fifo-mode; /* until we fix DMA in SPL */
+   status = "okay";
+};
+
+ {
+   bus-width = <8>;
+   mmc-hs400-1_8v;
+   mmc-hs400-enhanced-strobe;
+   non-removable;
+   status = "okay";
+};
+
+ {
+   

[U-Boot] [PATCH v1 3/3] defconfig: puma-rk3399: add defconfig for the RK3399-Q7 (Puma)

[Philipp Tomsich]

This commit adds the baseline defconfig for the RK3399-Q7 (Puma) SoM
(under the name 'puma-rk3399_defconfig') featuring the Rockchip RK3399
in a Qseven compatible module.

This subsumes the following changes:
 * defconfig: rk3399: migrate 
CONFIG_SPL_LIBCOMMON_SUPPORT/CONFIG_SPL_LIBGENERIC_SUPPORT
 * defconfig: rk3399-puma: add CONFIG_MMC_DW_ROCKCHIP
 * defconfig: rk3399-puma: disable CONFIG_SPL_OF_PLATDATA
 * defconfig: rk3399-puma: don't USE_TINY_PRINTF
 * defconfig: rk3399-puma: set up CONFIG_SYS_BOARD for the RK3399-Q7
 * defconfig: rk3399-puma: enable the multi-image loading via CONFIG_SPL_FIT
 * defconfig: rk3399-puma: SPL should be able to boot from MMC/SD card
 * defconfig: rk3399-puma: enable GMAC support
 * defconfig: rk3399-puma: enable support for SPI and Winbond SPI flash
 * defconfig: rk3399-puma: enable SPI as a boot-source in SPL
 * defconfig: rk3399-puma: disallow non-FIT images from being loaded
 * defconfig: rk3399-puma: rename to puma-rk3399
 * rockchip: config: rk3399: update defconfigs and rk3399_common

For the RK3399-Q7, we want a default boot-order of SPI -> MMC -> uSD.
This both follows how the BootROM probes devices and is a sane default
for customers in device-personalisation (e.g. it allows for quick and
easy factory programming of unpersonalised devices using an SD card)
and field usage (with customer devices expected to have their firmware
either in SPI or MMC).

However, when probing multiple interfaces (according to the result
from the board_boot_order function), we need to ensure that only valid
FIT images are considered and disable the fallback to assuming that a
raw (binary-only) U-Boot image is loaded (to avoid hangs/crashes from
jumping to random content loaded from devices that are probed, but
don't contain valid image content).

By disabling the SPL_RAW_IMAGE_SUPPORT and SPL_LEGACY_IMAGE_SUPPORT
options, we ensure that raw images (indistinguishable from random
data) are not considered for booting.

Signed-off-by: Philipp Tomsich 

---

 configs/evb-rk3399_defconfig|  3 ++
 configs/puma-rk3399_defconfig   | 73 +
 include/configs/rk3399_common.h |  2 --
 3 files changed, 76 insertions(+), 2 deletions(-)
 create mode 100644 configs/puma-rk3399_defconfig

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index bedc1fd..a13e1f7 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -12,6 +12,8 @@ CONFIG_SPL_ATF_TEXT_BASE=0x0001
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_ADDR=0x8
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -45,6 +47,7 @@ CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_BAUDRATE=150
 CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0xFF1A
 CONFIG_DEBUG_UART_CLOCK=2400
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
new file mode 100644
index 000..2c7b9b1
--- /dev/null
+++ b/configs/puma-rk3399_defconfig
@@ -0,0 +1,73 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x8
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma"
+CONFIG_FIT=y
+CONFIG_SPL_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3399/fit_spl_atf.its"
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ9031=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_ROCKCHIP_RK3399_PINCTRL=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=115200
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0xFF18
+CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y

Re: [U-Boot] i.MX6QP sd boot issue

[Jagan Teki]

On Tue, Mar 28, 2017 at 9:34 PM, Fabio Estevam  wrote:
> On Tue, Mar 28, 2017 at 1:02 PM, Jagan Teki  wrote:
>
>> I still not able to boot from SD with mx6qpsabreauto_defconfig, did
>> you able to boot from SD?
>
> Could you try bisect it?

Started with v2015.10-rc1 which is added this config, but not able to boot.

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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[U-Boot] [PATCH 15/17] board_f: x86: Use checkcpu() for CPU init

[Simon Glass]

At present we misuse print_cpuinfo() do so CPU init on x86. This is done
because it is the next available call after the console is enabled. But
several arches use checkcpu() instead. Despite the horrible name (which
we can fix), it seems a better choice.

Adjust the various x86 CPU implementations to move their init code into
checkcpu() and use print_cpuinfo() only for printing CPU info.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/broadwell/cpu.c | 12 +---
 arch/x86/cpu/coreboot/coreboot.c |  5 +
 arch/x86/cpu/efi/efi.c   |  5 +
 arch/x86/cpu/ivybridge/cpu.c | 14 ++
 arch/x86/cpu/qemu/qemu.c |  6 ++
 arch/x86/cpu/quark/quark.c   |  5 +
 arch/x86/cpu/x86_64/cpu.c|  5 +
 arch/x86/lib/efi/efi.c   |  5 +
 arch/x86/lib/fsp/fsp_common.c|  5 +
 common/board_f.c |  3 ++-
 10 files changed, 57 insertions(+), 8 deletions(-)

diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c
index 1b71d566c9..294dfa6643 100644
--- a/arch/x86/cpu/broadwell/cpu.c
+++ b/arch/x86/cpu/broadwell/cpu.c
@@ -131,10 +131,8 @@ int arch_cpu_init(void)
return x86_cpu_init_f();
 }
 
-int print_cpuinfo(void)
+int checkcpu(void)
 {
-   char processor_name[CPU_MAX_NAME_LEN];
-   const char *name;
int ret;
 
set_max_freq();
@@ -144,6 +142,14 @@ int print_cpuinfo(void)
return ret;
gd->arch.pei_boot_mode = PEI_BOOT_NONE;
 
+   return 0;
+}
+
+int print_cpuinfo(void)
+{
+   char processor_name[CPU_MAX_NAME_LEN];
+   const char *name;
+
/* Print processor name */
name = cpu_get_name(processor_name);
printf("CPU:   %s\n", name);
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 1b042037bb..658b900f0b 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -34,6 +34,11 @@ int board_early_init_f(void)
return 0;
 }
 
+int checkcpu(void)
+{
+   return 0;
+}
+
 int print_cpuinfo(void)
 {
return default_print_cpuinfo();
diff --git a/arch/x86/cpu/efi/efi.c b/arch/x86/cpu/efi/efi.c
index 993ab8dcde..741613f615 100644
--- a/arch/x86/cpu/efi/efi.c
+++ b/arch/x86/cpu/efi/efi.c
@@ -18,6 +18,11 @@ int board_early_init_f(void)
return 0;
 }
 
+int checkcpu(void)
+{
+   return 0;
+}
+
 int print_cpuinfo(void)
 {
return default_print_cpuinfo();
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
index c4aca08f0d..099cb94e5d 100644
--- a/arch/x86/cpu/ivybridge/cpu.c
+++ b/arch/x86/cpu/ivybridge/cpu.c
@@ -74,7 +74,7 @@ int arch_cpu_init_dm(void)
/*
 * We should do as little as possible before the serial console is
 * up. Perhaps this should move to later. Our next lot of init
-* happens in print_cpuinfo() when we have a console
+* happens in checkcpu() when we have a console
 */
ret = set_flex_ratio_to_tdp_nominal();
if (ret)
@@ -125,12 +125,10 @@ static void enable_usb_bar(struct udevice *bus)
pci_bus_write_config(bus, usb3, PCI_COMMAND, cmd, PCI_SIZE_32);
 }
 
-int print_cpuinfo(void)
+int checkcpu(void)
 {
enum pei_boot_mode_t boot_mode = PEI_BOOT_NONE;
-   char processor_name[CPU_MAX_NAME_LEN];
struct udevice *dev, *lpc;
-   const char *name;
uint32_t pm1_cnt;
uint16_t pm1_sts;
int ret;
@@ -182,6 +180,14 @@ int print_cpuinfo(void)
 
gd->arch.pei_boot_mode = boot_mode;
 
+   return 0;
+}
+
+int print_cpuinfo(void)
+{
+   char processor_name[CPU_MAX_NAME_LEN];
+   const char *name;
+
/* Print processor name */
name = cpu_get_name(processor_name);
printf("CPU:   %s\n", name);
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 7153eb21f5..35a146c66a 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -148,6 +148,12 @@ int arch_cpu_init(void)
 
 #if !CONFIG_IS_ENABLED(EFI_STUB) && \
!CONFIG_IS_ENABLED(SPL_X86_32BIT_INIT)
+
+int checkcpu(void)
+{
+   return 0;
+}
+
 int print_cpuinfo(void)
 {
post_code(POST_CPU_INFO);
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index bdd360a99f..0c2cea4ee9 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -264,6 +264,11 @@ int arch_cpu_init_dm(void)
return 0;
 }
 
+int checkcpu(void)
+{
+   return 0;
+}
+
 int print_cpuinfo(void)
 {
post_code(POST_CPU_INFO);
diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c
index db171f750d..cafae15af0 100644
--- a/arch/x86/cpu/x86_64/cpu.c
+++ b/arch/x86/cpu/x86_64/cpu.c
@@ -67,6 +67,11 @@ int misc_init_r(void)
return 0;
 }
 
+int checkcpu(void)
+{
+   return 0;
+}
+
 int print_cpuinfo(void)
 {
return 0;
diff --git a/arch/x86/lib/efi/efi.c b/arch/x86/lib/efi/efi.c
index ede5d5676b..533318bc36 100644
--- 

[U-Boot] [PATCH 07/17] board_f: Remove adjust_sdram_tbs_8xx() from the init sequence

[Simon Glass]

We can just call this from the only place that needs it.

Signed-off-by: Simon Glass 
---

 arch/powerpc/cpu/mpc8xx/speed.c | 63 +
 common/board_f.c|  4 ---
 include/common.h|  1 -
 3 files changed, 33 insertions(+), 35 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/speed.c b/arch/powerpc/cpu/mpc8xx/speed.c
index 7a532cca07..e2295d253f 100644
--- a/arch/powerpc/cpu/mpc8xx/speed.c
+++ b/arch/powerpc/cpu/mpc8xx/speed.c
@@ -252,6 +252,33 @@ static int sdram_adjust_866(void)
return 0;
 }
 
+/*
+ * Adjust sdram refresh rate to actual CPU clock
+ * and set timebase source according to actual CPU clock
+ */
+static int adjust_sdram_tbs_8xx(void)
+{
+#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) && \
+   !defined(CONFIG_TQM885D)
+   volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
+   long  mamr;
+   long  sccr;
+
+   mamr = immr->im_memctl.memc_mamr;
+   mamr &= ~MAMR_PTA_MSK;
+   mamr |= ((gd->cpu_clk / CONFIG_SYS_PTA_PER_CLK) << MAMR_PTA_SHIFT);
+   immr->im_memctl.memc_mamr = mamr;
+
+   if (gd->cpu_clk < 6700) {
+   sccr = immr->im_clkrst.car_sccr;
+   sccr |= SCCR_TBS;
+   immr->im_clkrst.car_sccr = sccr;
+   }
+#endif /* CONFIG_TQM8xxL/M, !TQM866M, !TQM885D */
+
+   return 0;
+}
+
 /* This function sets up PLL (init_pll_866() is called) and
  * fills gd->cpu_clk and gd->bus_clk according to the environment
  * variable 'cpuclk' or to CONFIG_8xx_CPUCLK_DEFAULT (if 'cpuclk'
@@ -264,6 +291,7 @@ int get_clocks(void)
char  tmp[64];
long  cpuclk = 0;
long  sccr_reg;
+   int ret;
 
if (getenv_f("cpuclk", tmp, sizeof (tmp)) > 0)
cpuclk = simple_strtoul (tmp, NULL, 10) * 100;
@@ -293,7 +321,11 @@ int get_clocks(void)
}
immr->im_clkrst.car_sccr = sccr_reg;
 
-   return sdram_adjust_866();
+   ret = sdram_adjust_866();
+   if (ret)
+   return ret;
+
+   return adjust_sdram_tbs_8xx();
 }
 
 /* Configure PLL for MPC866/859/885 CPU series
@@ -369,32 +401,3 @@ static long init_pll_866 (long clk)
 }
 
 #endif /* CONFIG_8xx_CPUCLK_DEFAULT */
-
-#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
-&& !defined(CONFIG_TQM885D)
-/*
- * Adjust sdram refresh rate to actual CPU clock
- * and set timebase source according to actual CPU clock
- */
-int adjust_sdram_tbs_8xx (void)
-{
-   volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
-   long  mamr;
-   long  sccr;
-
-   mamr = immr->im_memctl.memc_mamr;
-   mamr &= ~MAMR_PTA_MSK;
-   mamr |= ((gd->cpu_clk / CONFIG_SYS_PTA_PER_CLK) << MAMR_PTA_SHIFT);
-   immr->im_memctl.memc_mamr = mamr;
-
-   if (gd->cpu_clk < 6700) {
-   sccr = immr->im_clkrst.car_sccr;
-   sccr |= SCCR_TBS;
-   immr->im_clkrst.car_sccr = sccr;
-   }
-
-   return (0);
-}
-#endif /* CONFIG_TQM8xxL/M, !TQM866M, !TQM885D */
-
-/* - */
diff --git a/common/board_f.c b/common/board_f.c
index 14035b1805..7feffa4939 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -850,10 +850,6 @@ static const init_fnc_t init_sequence_f[] = {
init_timebase,
 #elif defined(CONFIG_PPC)
get_clocks, /* get CPU and bus clocks (etc.) */
-#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
-   && !defined(CONFIG_TQM885D)
-   adjust_sdram_tbs_8xx,
-#endif
/* TODO: can we rename this to timer_init()? */
init_timebase,
 #endif /* CONFIG_8xx_CPUCLK_DEFAULT */
diff --git a/include/common.h b/include/common.h
index ef12e44095..ce37e9fc59 100644
--- a/include/common.h
+++ b/include/common.h
@@ -640,7 +640,6 @@ int serial_stub_tstc(struct stdio_dev *sdev);
 
 /* $(CPU)/speed.c */
 intget_clocks (void);
-intadjust_sdram_tbs_8xx (void);
 #if defined(CONFIG_MPC8260)
 intprt_8260_clks (void);
 #elif defined(CONFIG_MPC5xxx)
-- 
2.12.2.564.g063fe858b8-goog

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[U-Boot] [PATCH 05/17] board_f: powerpc: Rename get_clocks_866() to get_clocks()

[Simon Glass]

We really don't need to have a name like this in the generic init
sequence. Use the generic get_clocks() name so that we can merge these
two at some point.

Signed-off-by: Simon Glass 
---

 arch/powerpc/cpu/mpc8xx/speed.c | 2 +-
 common/board_f.c| 2 +-
 include/common.h| 1 -
 3 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/speed.c b/arch/powerpc/cpu/mpc8xx/speed.c
index 42442b8c98..613209cc6d 100644
--- a/arch/powerpc/cpu/mpc8xx/speed.c
+++ b/arch/powerpc/cpu/mpc8xx/speed.c
@@ -243,7 +243,7 @@ static long init_pll_866 (long clk);
  * contains invalid value).
  * This functions requires an MPC866 or newer series CPU.
  */
-int get_clocks_866 (void)
+int get_clocks(void)
 {
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
char  tmp[64];
diff --git a/common/board_f.c b/common/board_f.c
index 57e26d08cb..05b2b137f7 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -846,7 +846,7 @@ static const init_fnc_t init_sequence_f[] = {
/* TODO: can any of this go into arch_cpu_init()? */
 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
/* get CPU and bus clocks according to the environment variable */
-   get_clocks_866,
+   get_clocks,
/* adjust sdram refresh rate according to the new clock */
sdram_adjust_866,
init_timebase,
diff --git a/include/common.h b/include/common.h
index 6170422359..cdaeec8e42 100644
--- a/include/common.h
+++ b/include/common.h
@@ -640,7 +640,6 @@ int serial_stub_tstc(struct stdio_dev *sdev);
 
 /* $(CPU)/speed.c */
 intget_clocks (void);
-intget_clocks_866 (void);
 intsdram_adjust_866 (void);
 intadjust_sdram_tbs_8xx (void);
 #if defined(CONFIG_MPC8260)
-- 
2.12.2.564.g063fe858b8-goog

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[U-Boot] [PATCH 13/17] board_f: sandbox: Move sandbox_early_getopt_check() into misc_init_f()

[Simon Glass]

We don't need a special hook for sandbox as one of the later ones will do
just as well. We can print error messages about bad options after we
print the banner. In fact, it seems better.

Signed-off-by: Simon Glass 
---

 arch/sandbox/cpu/start.c  | 5 +
 common/board_f.c  | 3 ---
 include/configs/sandbox.h | 2 ++
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
index dc58fef90c..f605d4d61e 100644
--- a/arch/sandbox/cpu/start.c
+++ b/arch/sandbox/cpu/start.c
@@ -66,6 +66,11 @@ int sandbox_early_getopt_check(void)
os_exit(0);
 }
 
+int misc_init_f(void)
+{
+   return sandbox_early_getopt_check();
+}
+
 static int sandbox_cmdline_cb_help(struct sandbox_state *state, const char 
*arg)
 {
/* just flag to sandbox_early_getopt_check to show usage */
diff --git a/common/board_f.c b/common/board_f.c
index 74cdef0ddb..9d17ae0100 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -855,9 +855,6 @@ static const init_fnc_t init_sequence_f[] = {
init_baud_rate, /* initialze baudrate settings */
serial_init,/* serial communications setup */
console_init_f, /* stage 1 init of console */
-#ifdef CONFIG_SANDBOX
-   sandbox_early_getopt_check,
-#endif
display_options,/* say that we are here */
display_text_info,  /* show debugging info if required */
 #if defined(CONFIG_MPC8260)
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index 6b3cd18046..7de8765dc8 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -199,4 +199,6 @@
 #define CONFIG_SYS_SYSTEMACE_WIDTH 16
 #define CONFIG_SYS_SYSTEMACE_BASE  0
 
+#define CONFIG_MISC_INIT_F
+
 #endif
-- 
2.12.2.564.g063fe858b8-goog

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[U-Boot] [PATCH 06/17] board_f: Remove sdram_adjust_866() from the init sequence

[Simon Glass]

We can just call this from the only function that needs it.

Signed-off-by: Simon Glass 
---

 arch/powerpc/cpu/mpc8xx/speed.c | 32 
 common/board_f.c|  2 --
 include/common.h|  1 -
 3 files changed, 16 insertions(+), 19 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/speed.c b/arch/powerpc/cpu/mpc8xx/speed.c
index 613209cc6d..7a532cca07 100644
--- a/arch/powerpc/cpu/mpc8xx/speed.c
+++ b/arch/powerpc/cpu/mpc8xx/speed.c
@@ -237,6 +237,21 @@ int get_clocks (void)
 
 static long init_pll_866 (long clk);
 
+/* Adjust sdram refresh rate to actual CPU clock.
+ */
+static int sdram_adjust_866(void)
+{
+   volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
+   long  mamr;
+
+   mamr = immr->im_memctl.memc_mamr;
+   mamr &= ~MAMR_PTA_MSK;
+   mamr |= ((gd->cpu_clk / CONFIG_SYS_PTA_PER_CLK) << MAMR_PTA_SHIFT);
+   immr->im_memctl.memc_mamr = mamr;
+
+   return 0;
+}
+
 /* This function sets up PLL (init_pll_866() is called) and
  * fills gd->cpu_clk and gd->bus_clk according to the environment
  * variable 'cpuclk' or to CONFIG_8xx_CPUCLK_DEFAULT (if 'cpuclk'
@@ -278,22 +293,7 @@ int get_clocks(void)
}
immr->im_clkrst.car_sccr = sccr_reg;
 
-   return (0);
-}
-
-/* Adjust sdram refresh rate to actual CPU clock.
- */
-int sdram_adjust_866 (void)
-{
-   volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
-   long  mamr;
-
-   mamr = immr->im_memctl.memc_mamr;
-   mamr &= ~MAMR_PTA_MSK;
-   mamr |= ((gd->cpu_clk / CONFIG_SYS_PTA_PER_CLK) << MAMR_PTA_SHIFT);
-   immr->im_memctl.memc_mamr = mamr;
-
-   return (0);
+   return sdram_adjust_866();
 }
 
 /* Configure PLL for MPC866/859/885 CPU series
diff --git a/common/board_f.c b/common/board_f.c
index 05b2b137f7..14035b1805 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -847,8 +847,6 @@ static const init_fnc_t init_sequence_f[] = {
 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
/* get CPU and bus clocks according to the environment variable */
get_clocks,
-   /* adjust sdram refresh rate according to the new clock */
-   sdram_adjust_866,
init_timebase,
 #elif defined(CONFIG_PPC)
get_clocks, /* get CPU and bus clocks (etc.) */
diff --git a/include/common.h b/include/common.h
index cdaeec8e42..ef12e44095 100644
--- a/include/common.h
+++ b/include/common.h
@@ -640,7 +640,6 @@ int serial_stub_tstc(struct stdio_dev *sdev);
 
 /* $(CPU)/speed.c */
 intget_clocks (void);
-intsdram_adjust_866 (void);
 intadjust_sdram_tbs_8xx (void);
 #if defined(CONFIG_MPC8260)
 intprt_8260_clks (void);
-- 
2.12.2.564.g063fe858b8-goog

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[U-Boot] [PATCH 17/17] i2c: Drop CONFIG_SOFT_I2C_MULTI_BUS

[Simon Glass]

This is not used by any board. Drop it.

Signed-off-by: Simon Glass 
Clean up board_f sequence a little
This series tries to remove #ifdefs from the board_f init sequence. It
gets as far as I2C and then we need to discuss whether we can start to
remove the old I2C framework.

I think that ideally each entry in the init sequence should be enabled by
at most one CONFIG, which is in Kconfig and is not arch-specific.
END

---

 board/samsung/common/Makefile|  1 -
 board/samsung/common/multi_i2c.c | 59 
 include/i2c.h|  7 -
 scripts/config_whitelist.txt |  1 -
 4 files changed, 68 deletions(-)
 delete mode 100644 board/samsung/common/multi_i2c.c

diff --git a/board/samsung/common/Makefile b/board/samsung/common/Makefile
index ef1a8f318f..fa85f7dcd2 100644
--- a/board/samsung/common/Makefile
+++ b/board/samsung/common/Makefile
@@ -5,7 +5,6 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-$(CONFIG_SOFT_I2C_MULTI_BUS) += multi_i2c.o
 obj-$(CONFIG_USB_GADGET_DOWNLOAD) += gadget.o
 obj-$(CONFIG_MISC_COMMON) += misc.o
 
diff --git a/board/samsung/common/multi_i2c.c b/board/samsung/common/multi_i2c.c
deleted file mode 100644
index 71c32c0b6e..00
--- a/board/samsung/common/multi_i2c.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- *  Copyright (C) 2012 Samsung Electronics
- *  Lukasz Majewski 
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include 
-#include 
-
-#ifndef CONFIG_SOFT_I2C_I2C10_SCL
-#define CONFIG_SOFT_I2C_I2C10_SCL 0
-#endif
-
-#ifndef CONFIG_SOFT_I2C_I2C10_SDA
-#define CONFIG_SOFT_I2C_I2C10_SDA 0
-#endif
-
-/* Handle multiple I2C buses instances */
-int get_multi_scl_pin(void)
-{
-   unsigned int bus = i2c_get_bus_num();
-
-   switch (bus) {
-   case I2C_0:
-   return CONFIG_SOFT_I2C_I2C5_SCL;
-   case I2C_1:
-   return CONFIG_SOFT_I2C_I2C9_SCL;
-   case I2C_2:
-   return CONFIG_SOFT_I2C_I2C10_SCL;
-   default:
-   printf("I2C_%d not supported!\n", bus);
-   };
-
-   return 0;
-}
-
-int get_multi_sda_pin(void)
-{
-   unsigned int bus = i2c_get_bus_num();
-
-   switch (bus) {
-   case I2C_0:
-   return CONFIG_SOFT_I2C_I2C5_SDA;
-   case I2C_1:
-   return CONFIG_SOFT_I2C_I2C9_SDA;
-   case I2C_2:
-   return CONFIG_SOFT_I2C_I2C10_SDA;
-   default:
-   printf("I2C_%d not supported!\n", bus);
-   };
-
-   return 0;
-}
-
-int multi_i2c_init(void)
-{
-   return 0;
-}
diff --git a/include/i2c.h b/include/i2c.h
index 4bbeecabf2..cd7f61e1c1 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -930,13 +930,6 @@ enum {
I2C_8, I2C_9, I2C_10,
 };
 
-/* Multi I2C busses handling */
-#ifdef CONFIG_SOFT_I2C_MULTI_BUS
-extern int get_multi_scl_pin(void);
-extern int get_multi_sda_pin(void);
-extern int multi_i2c_init(void);
-#endif
-
 /**
  * Get FDT values for i2c bus.
  *
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 668f238459..ba90758a29 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -2838,7 +2838,6 @@ CONFIG_SOFT_I2C_I2C5_SCL
 CONFIG_SOFT_I2C_I2C5_SDA
 CONFIG_SOFT_I2C_I2C9_SCL
 CONFIG_SOFT_I2C_I2C9_SDA
-CONFIG_SOFT_I2C_MULTI_BUS
 CONFIG_SOFT_I2C_READ_REPEATED_START
 CONFIG_SOFT_SPI
 CONFIG_SOFT_TWS
-- 
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[U-Boot] [PATCH 09/17] board_f: powerpc: Use timer_init() instead of init_timebase()

[Simon Glass]

There is no good reason to use a different name on PowerPC. Change it to
timer_init() like the others.

Signed-off-by: Simon Glass 
---

 arch/powerpc/cpu/mpc5xx/cpu_init.c| 2 +-
 arch/powerpc/lib/time.c   | 2 +-
 board/freescale/mpc8313erdb/mpc8313erdb.c | 2 +-
 board/freescale/mpc8315erdb/mpc8315erdb.c | 2 +-
 common/board_f.c  | 4 +---
 include/common.h  | 1 -
 6 files changed, 5 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/cpu/mpc5xx/cpu_init.c 
b/arch/powerpc/cpu/mpc5xx/cpu_init.c
index 0f62c13f86..5bae39f8c0 100644
--- a/arch/powerpc/cpu/mpc5xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc5xx/cpu_init.c
@@ -43,7 +43,7 @@ void cpu_init_f (volatile immap_t * immr)
immr->im_uimb.uimb_umcr = CONFIG_SYS_UMCR;
 
/* Time base and decrementer will be enables (TBE) */
-   /* in init_timebase() in time.c called from board_init_f(). */
+   /* in timer_init() in time.c called from board_init_f(). */
 
/* Initialize the PIT. Unlock PISCRK */
immr->im_sitk.sitk_piscrk = KAPWR_KEY;
diff --git a/arch/powerpc/lib/time.c b/arch/powerpc/lib/time.c
index 62b6c72f4e..de5f0be66d 100644
--- a/arch/powerpc/lib/time.c
+++ b/arch/powerpc/lib/time.c
@@ -60,7 +60,7 @@ unsigned long ticks2usec(unsigned long ticks)
 #endif
 /* - */
 
-int init_timebase (void)
+int timer_init(void)
 {
unsigned long temp;
 
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c 
b/board/freescale/mpc8313erdb/mpc8313erdb.c
index eac193e817..693dff651a 100644
--- a/board/freescale/mpc8313erdb/mpc8313erdb.c
+++ b/board/freescale/mpc8313erdb/mpc8313erdb.c
@@ -133,7 +133,7 @@ void board_init_f(ulong bootflag)
NS16550_init((NS16550_t)(CONFIG_SYS_IMMR + 0x4500),
 CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
puts("NAND boot... ");
-   init_timebase();
+   timer_init();
initdram(0);
relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, (gd_t *)gd,
  CONFIG_SYS_NAND_U_BOOT_RELOC);
diff --git a/board/freescale/mpc8315erdb/mpc8315erdb.c 
b/board/freescale/mpc8315erdb/mpc8315erdb.c
index 3cec09b586..1da6e2166d 100644
--- a/board/freescale/mpc8315erdb/mpc8315erdb.c
+++ b/board/freescale/mpc8315erdb/mpc8315erdb.c
@@ -221,7 +221,7 @@ void board_init_f(ulong bootflag)
NS16550_init((NS16550_t)(CONFIG_SYS_IMMR + 0x4500),
 CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
puts("NAND boot... ");
-   init_timebase();
+   timer_init();
initdram(0);
relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC + 0x1, (gd_t *)gd,
  CONFIG_SYS_NAND_U_BOOT_RELOC);
diff --git a/common/board_f.c b/common/board_f.c
index e387ca2233..dcbe72d91b 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -846,10 +846,8 @@ static const init_fnc_t init_sequence_f[] = {
 #ifdef CONFIG_PPC
/* get CPU and bus clocks according to the environment variable */
get_clocks, /* get CPU and bus clocks (etc.) */
-   /* TODO: can we rename this to timer_init()? */
-   init_timebase,
 #endif
-#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
+#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
defined(CONFIG_SH) || defined(CONFIG_SPARC)
timer_init, /* initialize timer */
diff --git a/include/common.h b/include/common.h
index ce37e9fc59..684083510b 100644
--- a/include/common.h
+++ b/include/common.h
@@ -783,7 +783,6 @@ voidwait_ticks(unsigned long);
 /* arch/$(ARCH)/lib/time.c */
 ulong  usec2ticks(unsigned long usec);
 ulong  ticks2usec(unsigned long ticks);
-intinit_timebase (void);
 
 /* lib/gunzip.c */
 int gunzip(void *, int, unsigned char *, unsigned long *);
-- 
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[U-Boot] [PATCH 08/17] board_f: powerpc: Unified get_clocks() portion of init sequence

[Simon Glass]

Now that both branches of the #if do the same thing, we can unify them.

Signed-off-by: Simon Glass 
---

 common/board_f.c | 8 ++--
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/common/board_f.c b/common/board_f.c
index 7feffa4939..e387ca2233 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -843,16 +843,12 @@ static const init_fnc_t init_sequence_f[] = {
 #if defined(CONFIG_BOARD_EARLY_INIT_F)
board_early_init_f,
 #endif
-   /* TODO: can any of this go into arch_cpu_init()? */
-#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
+#ifdef CONFIG_PPC
/* get CPU and bus clocks according to the environment variable */
-   get_clocks,
-   init_timebase,
-#elif defined(CONFIG_PPC)
get_clocks, /* get CPU and bus clocks (etc.) */
/* TODO: can we rename this to timer_init()? */
init_timebase,
-#endif /* CONFIG_8xx_CPUCLK_DEFAULT */
+#endif
 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
defined(CONFIG_SH) || defined(CONFIG_SPARC)
-- 
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[U-Boot] [PATCH 16/17] i2c: Drop unused i2c_soft...() functions

[Simon Glass]

These are not used in U-Boot. Manual relocation fixup is used by blackfin
but that is being removed.

Signed-off-by: Simon Glass 
---

 drivers/i2c/i2c_core.c | 44 
 include/i2c.h  | 15 ---
 2 files changed, 59 deletions(-)

diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c
index 16b1aba32a..19769dab67 100644
--- a/drivers/i2c/i2c_core.c
+++ b/drivers/i2c/i2c_core.c
@@ -39,50 +39,6 @@ struct i2c_bus_hose i2c_bus[CONFIG_SYS_NUM_I2C_BUSES] =
 
 DECLARE_GLOBAL_DATA_PTR;
 
-void i2c_reloc_fixup(void)
-{
-#if defined(CONFIG_NEEDS_MANUAL_RELOC)
-   struct i2c_adapter *i2c_adap_p = ll_entry_start(struct i2c_adapter,
-   i2c);
-   struct i2c_adapter *tmp = i2c_adap_p;
-   int max = ll_entry_count(struct i2c_adapter, i2c);
-   int i;
-   unsigned long   addr;
-
-   if (gd->reloc_off == 0)
-   return;
-
-   for (i = 0; i < max; i++) {
-   /* i2c_init() */
-   addr = (unsigned long)i2c_adap_p->init;
-   addr += gd->reloc_off;
-   i2c_adap_p->init = (void *)addr;
-   /* i2c_probe() */
-   addr = (unsigned long)i2c_adap_p->probe;
-   addr += gd->reloc_off;
-   i2c_adap_p->probe = (void *)addr;
-   /* i2c_read() */
-   addr = (unsigned long)i2c_adap_p->read;
-   addr += gd->reloc_off;
-   i2c_adap_p->read = (void *)addr;
-   /* i2c_write() */
-   addr = (unsigned long)i2c_adap_p->write;
-   addr += gd->reloc_off;
-   i2c_adap_p->write = (void *)addr;
-   /* i2c_set_bus_speed() */
-   addr = (unsigned long)i2c_adap_p->set_bus_speed;
-   addr += gd->reloc_off;
-   i2c_adap_p->set_bus_speed = (void *)addr;
-   /* name */
-   addr = (unsigned long)i2c_adap_p->name;
-   addr += gd->reloc_off;
-   i2c_adap_p->name = (char *)addr;
-   tmp++;
-   i2c_adap_p = tmp;
-   }
-#endif
-}
-
 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
 /*
  * i2c_mux_set()
diff --git a/include/i2c.h b/include/i2c.h
index d500445aaf..4bbeecabf2 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -791,21 +791,6 @@ unsigned int i2c_set_bus_speed(unsigned int speed);
 
 unsigned int i2c_get_bus_speed(void);
 
-/*
- * i2c_reloc_fixup:
- *
- * Adjusts I2C pointers after U-Boot is relocated to DRAM
- */
-void i2c_reloc_fixup(void);
-#if defined(CONFIG_SYS_I2C_SOFT)
-void i2c_soft_init(void);
-void i2c_soft_active(void);
-void i2c_soft_tristate(void);
-int i2c_soft_read(void);
-void i2c_soft_sda(int bit);
-void i2c_soft_scl(int bit);
-void i2c_soft_delay(void);
-#endif
 #else
 
 /*
-- 
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[U-Boot] [PATCH 10/17] board_f: Use timer_init() on all archs

[Simon Glass]

More than half of the architectures use this function so let's make them
all use it.

For those which don't actually define it, we can rely on the weak function
in lib/time.c

Signed-off-by: Simon Glass 
---

 common/board_f.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/common/board_f.c b/common/board_f.c
index dcbe72d91b..9ba3163e0f 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -847,11 +847,7 @@ static const init_fnc_t init_sequence_f[] = {
/* get CPU and bus clocks according to the environment variable */
get_clocks, /* get CPU and bus clocks (etc.) */
 #endif
-#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
-   defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
-   defined(CONFIG_SH) || defined(CONFIG_SPARC)
timer_init, /* initialize timer */
-#endif
 #if defined(CONFIG_BOARD_POSTCLK_INIT)
board_postclk_init,
 #endif
-- 
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[U-Boot] [PATCH 14/17] board_f: powerpc: Make prt_8260_rsr(), prt_8260_clks() private

[Simon Glass]

Move these two function calls into checkcpu(), which is called on this
arch immediately after these two.

Signed-off-by: Simon Glass 
---

 arch/powerpc/cpu/mpc8260/cpu.c   | 9 -
 arch/powerpc/include/asm/processor.h | 2 ++
 common/board_f.c | 4 
 include/common.h | 7 +--
 4 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8260/cpu.c b/arch/powerpc/cpu/mpc8260/cpu.c
index 9f2be3cb22..58d1c0261c 100644
--- a/arch/powerpc/cpu/mpc8260/cpu.c
+++ b/arch/powerpc/cpu/mpc8260/cpu.c
@@ -50,7 +50,14 @@ int checkcpu (void)
uint pvr = get_pvr ();
uint immr, rev, m, k;
char buf[32];
-
+   int ret;
+
+   ret = prt_8260_rsr();
+   if (ret)
+   return ret;
+   ret = prt_8260_clks();
+   if (ret)
+   return ret;
puts ("CPU:   ");
 
switch (pvr) {
diff --git a/arch/powerpc/include/asm/processor.h 
b/arch/powerpc/include/asm/processor.h
index c032726df1..fd38da9fe5 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -1355,6 +1355,8 @@ void ll_puts(const char *);
 void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
 
 int prt_83xx_rsr(void);
+int prt_8260_rsr(void);
+int prt_8260_clks(void);
 
 #endif /* ndef ASSEMBLY*/
 
diff --git a/common/board_f.c b/common/board_f.c
index 9d17ae0100..8f37662a57 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -857,10 +857,6 @@ static const init_fnc_t init_sequence_f[] = {
console_init_f, /* stage 1 init of console */
display_options,/* say that we are here */
display_text_info,  /* show debugging info if required */
-#if defined(CONFIG_MPC8260)
-   prt_8260_rsr,
-   prt_8260_clks,
-#endif /* CONFIG_MPC8260 */
 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH)
checkcpu,
 #endif
diff --git a/include/common.h b/include/common.h
index 6f08110b74..bc486489a2 100644
--- a/include/common.h
+++ b/include/common.h
@@ -640,9 +640,7 @@ int serial_stub_tstc(struct stdio_dev *sdev);
 
 /* $(CPU)/speed.c */
 intget_clocks (void);
-#if defined(CONFIG_MPC8260)
-intprt_8260_clks (void);
-#elif defined(CONFIG_MPC5xxx)
+#if defined(CONFIG_MPC5xxx)
 intprt_mpc5xxx_clks (void);
 #endif
 #ifdef CONFIG_4xx
@@ -713,9 +711,6 @@ ulong cpu_init_f(void);
 #endif
 
 intcpu_init_r(void);
-#if defined(CONFIG_MPC8260)
-intprt_8260_rsr  (void);
-#endif
 
 /* $(CPU)/interrupts.c */
 intinterrupt_init (void);
-- 
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[U-Boot] [PATCH 11/17] powerpc: freescale: Unify the two get_clocks() calls

[Simon Glass]

Combine the conditions so this appears in the init list only once.

Signed-off-by: Simon Glass 
---

 common/board_f.c | 5 +
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/common/board_f.c b/common/board_f.c
index 9ba3163e0f..cbd9f67709 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -843,7 +843,7 @@ static const init_fnc_t init_sequence_f[] = {
 #if defined(CONFIG_BOARD_EARLY_INIT_F)
board_early_init_f,
 #endif
-#ifdef CONFIG_PPC
+#if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
/* get CPU and bus clocks according to the environment variable */
get_clocks, /* get CPU and bus clocks (etc.) */
 #endif
@@ -851,9 +851,6 @@ static const init_fnc_t init_sequence_f[] = {
 #if defined(CONFIG_BOARD_POSTCLK_INIT)
board_postclk_init,
 #endif
-#if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
-   get_clocks,
-#endif
env_init,   /* initialize environment */
init_baud_rate, /* initialze baudrate settings */
serial_init,/* serial communications setup */
-- 
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[U-Boot] [PATCH 04/17] board_f: powerpc: Join the two CONFIG_8xx_CPUCLK_DEFAULT sections

[Simon Glass]

We have two chunks of code which depend on this CONFIG options. There is
likely no need to keep them apart, so join them.

Signed-off-by: Simon Glass 
---

 common/board_f.c | 17 -
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/common/board_f.c b/common/board_f.c
index 0454907590..57e26d08cb 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -844,7 +844,13 @@ static const init_fnc_t init_sequence_f[] = {
board_early_init_f,
 #endif
/* TODO: can any of this go into arch_cpu_init()? */
-#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
+#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
+   /* get CPU and bus clocks according to the environment variable */
+   get_clocks_866,
+   /* adjust sdram refresh rate according to the new clock */
+   sdram_adjust_866,
+   init_timebase,
+#elif defined(CONFIG_PPC)
get_clocks, /* get CPU and bus clocks (etc.) */
 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
&& !defined(CONFIG_TQM885D)
@@ -852,7 +858,7 @@ static const init_fnc_t init_sequence_f[] = {
 #endif
/* TODO: can we rename this to timer_init()? */
init_timebase,
-#endif
+#endif /* CONFIG_8xx_CPUCLK_DEFAULT */
 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
defined(CONFIG_SH) || defined(CONFIG_SPARC)
@@ -865,13 +871,6 @@ static const init_fnc_t init_sequence_f[] = {
get_clocks,
 #endif
env_init,   /* initialize environment */
-#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
-   /* get CPU and bus clocks according to the environment variable */
-   get_clocks_866,
-   /* adjust sdram refresh rate according to the new clock */
-   sdram_adjust_866,
-   init_timebase,
-#endif
init_baud_rate, /* initialze baudrate settings */
serial_init,/* serial communications setup */
console_init_f, /* stage 1 init of console */
-- 
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[U-Boot] [PATCH 03/17] board_f: x86: Rename x86_fsp_init() to arch_fsp_init()

[Simon Glass]

While x86 is the only user and this could in principle be moved to
arch_cpu_init() there is some justification for this being a separate
call. It provides a way to handle init which is not CPU-specific, but
must happen before the CPU can be set up.

Rename the function to be more generic.

Signed-off-by: Simon Glass 
---

 arch/x86/include/asm/u-boot-x86.h | 3 ---
 arch/x86/lib/fsp/fsp_common.c | 2 +-
 common/board_f.c  | 4 ++--
 include/common.h  | 9 +
 4 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/u-boot-x86.h 
b/arch/x86/include/asm/u-boot-x86.h
index 4f901f9392..cc7fc7370e 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -55,9 +55,6 @@ u32 isa_map_rom(u32 bus_addr, int size);
 /* arch/x86/lib/... */
 int video_bios_init(void);
 
-/* arch/x86/lib/fsp/... */
-int x86_fsp_init(void);
-
 void   board_init_f_r_trampoline(ulong) __attribute__ ((noreturn));
 void   board_init_f_r(void) __attribute__ ((noreturn));
 
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index 8479af1d7e..cebf85ee5b 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -70,7 +70,7 @@ static __maybe_unused void *fsp_prepare_mrc_cache(void)
return cache->data;
 }
 
-int x86_fsp_init(void)
+int arch_fsp_init(void)
 {
void *nvs;
 
diff --git a/common/board_f.c b/common/board_f.c
index 22829dfed0..0454907590 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -832,8 +832,8 @@ static const init_fnc_t init_sequence_f[] = {
 #endif
initf_malloc,
initf_console_record,
-#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
-   x86_fsp_init,
+#if defined(CONFIG_HAVE_FSP)
+   arch_fsp_init,
 #endif
arch_cpu_init,  /* basic arch cpu dependent setup */
mach_cpu_init,  /* SoC/machine dependent CPU setup */
diff --git a/include/common.h b/include/common.h
index 2cbbd5a60c..6170422359 100644
--- a/include/common.h
+++ b/include/common.h
@@ -289,6 +289,15 @@ int update_flash_size(int flash_size);
 int arch_early_init_r(void);
 
 /**
+ * arch_fsp_init() - perform firmware support package init
+ *
+ * Where U-Boot relies on binary blobs to handle part of the system init, this
+ * function can be used to set up the blobs. This is used on some Intel
+ * platforms.
+ */
+int arch_fsp_init(void);
+
+/**
  * arch_cpu_init_dm() - init CPU after driver model is available
  *
  * This is called immediately after driver model is available before
-- 
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[U-Boot] [PATCH 02/17] board_f: initcall: Add a header guard

[Simon Glass]

This file is missing the usual header guard. Add it.

Signed-off-by: Simon Glass 
---

 include/initcall.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/include/initcall.h b/include/initcall.h
index 65f67dca83..fe7e90388e 100644
--- a/include/initcall.h
+++ b/include/initcall.h
@@ -4,6 +4,11 @@
  * SPDX-License-Identifier:GPL-2.0+
  */
 
+#ifndef __INITCALL_H
+#define __INITCALL_H
+
 typedef int (*init_fnc_t)(void);
 
 int initcall_run_list(const init_fnc_t init_sequence[]);
+
+#endif
-- 
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[U-Boot] [PATCH 01/17] board_f: sandbox: Move setup_ram_buf() to private code

[Simon Glass]

There is no need to have this call in the generic init sequence and no
other architecture has needed it in the time it has been there. Move it
into sandbox's private code.

Signed-off-by: Simon Glass 
---

 arch/sandbox/cpu/start.c |  7 +++
 common/board_f.c | 18 --
 2 files changed, 7 insertions(+), 18 deletions(-)

diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
index 6e4ec017cc..dc58fef90c 100644
--- a/arch/sandbox/cpu/start.c
+++ b/arch/sandbox/cpu/start.c
@@ -275,6 +275,12 @@ int board_run_command(const char *cmdline)
return 1;
 }
 
+static void setup_ram_buf(struct sandbox_state *state)
+{
+   gd->arch.ram_buf = state->ram_buf;
+   gd->ram_size = state->ram_size;
+}
+
 int main(int argc, char *argv[])
 {
struct sandbox_state *state;
@@ -302,6 +308,7 @@ int main(int argc, char *argv[])
 #ifdef CONFIG_SYS_MALLOC_F_LEN
gd->malloc_base = CONFIG_MALLOC_F_ADDR;
 #endif
+   setup_ram_buf(state);
 
/* Do pre- and post-relocation init */
board_init_f(0);
diff --git a/common/board_f.c b/common/board_f.c
index bb24a633fb..22829dfed0 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -58,9 +58,6 @@
 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA)
 #include 
 #endif
-#ifdef CONFIG_SANDBOX
-#include 
-#endif
 #include 
 #include 
 
@@ -295,18 +292,6 @@ __weak int mach_cpu_init(void)
return 0;
 }
 
-#ifdef CONFIG_SANDBOX
-static int setup_ram_buf(void)
-{
-   struct sandbox_state *state = state_get_current();
-
-   gd->arch.ram_buf = state->ram_buf;
-   gd->ram_size = state->ram_size;
-
-   return 0;
-}
-#endif
-
 /* Get the top of usable RAM */
 __weak ulong board_get_usable_ram_top(ulong total_size)
 {
@@ -838,9 +823,6 @@ __weak int arch_cpu_init_dm(void)
 }
 
 static const init_fnc_t init_sequence_f[] = {
-#ifdef CONFIG_SANDBOX
-   setup_ram_buf,
-#endif
setup_mon_len,
 #ifdef CONFIG_OF_CONTROL
fdtdec_setup,
-- 
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[U-Boot] [PATCH 2/2] fdt: Add Python bindings

[Simon Glass]

An early version of this is available upstream. Bring it in as a starting
point.

Signed-off-by: Simon Glass 
---

 lib/libfdt/pylibfdt/libfdt.swig | 433 
 lib/libfdt/pylibfdt/setup.py|  33 +++
 2 files changed, 466 insertions(+)
 create mode 100644 lib/libfdt/pylibfdt/libfdt.swig
 create mode 100644 lib/libfdt/pylibfdt/setup.py

diff --git a/lib/libfdt/pylibfdt/libfdt.swig b/lib/libfdt/pylibfdt/libfdt.swig
new file mode 100644
index 00..cd1c6a9ac4
--- /dev/null
+++ b/lib/libfdt/pylibfdt/libfdt.swig
@@ -0,0 +1,433 @@
+/*
+ * pylibfdt - Flat Device Tree manipulation in Python
+ * Copyright (C) 2017 Google, Inc.
+ * Written by Simon Glass 
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this library; if not, write to the Free
+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer.
+ * 2. Redistributions in binary form must reproduce the above
+ *copyright notice, this list of conditions and the following
+ *disclaimer in the documentation and/or other materials
+ *provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+%module libfdt
+
+%{
+#define SWIG_FILE_WITH_INIT
+#include "libfdt.h"
+%}
+
+%pythoncode %{
+
+import struct
+
+# Error codes, corresponding to FDT_ERR_... in libfdt.h
+(NOTFOUND,
+EXISTS,
+NOSPACE,
+BADOFFSET,
+BADPATH,
+BADPHANDLE,
+BADSTATE,
+TRUNCATED,
+BADMAGIC,
+BADVERSION,
+BADSTRUCTURE,
+BADLAYOUT,
+INTERNAL,
+BADNCELLS,
+BADVALUE,
+BADOVERLAY,
+NOPHANDLES) = QUIET_ALL = range(1, 18)
+# QUIET_ALL can be passed as the 'quiet' parameter to avoid exceptions
+# altogether. All # functions passed this value will return an error instead
+# of raising an exception.
+
+# Pass this as the 'quiet' parameter to return -ENOTFOUND on NOTFOUND errors,
+# instead of raising an exception.
+QUIET_NOTFOUND = (NOTFOUND,)
+
+
+class FdtException(Exception):
+"""An exception caused by an error such as one of the codes above"""
+def __init__(self, err):
+self.err = err
+
+def __str__(self):
+return 'pylibfdt error %d: %s' % (self.err, fdt_strerror(self.err))
+
+def strerror(fdt_err):
+"""Get the string for an error number
+
+Args:
+fdt_err: Error number (-ve)
+
+Returns:
+String containing the associated error
+"""
+return fdt_strerror(fdt_err)
+
+def check_err(val, quiet=()):
+"""Raise an error if the return value is -ve
+
+This is used to check for errors returned by libfdt C functions.
+
+Args:
+val: Return value from a libfdt function
+quiet: Errors to ignore (empty to raise on all errors)
+
+Returns:
+val if val >= 0
+
+Raises
+FdtException if val < 0
+"""
+if val < 0:
+if -val not in quiet:
+raise FdtException(val)
+return val
+
+def check_err_null(val, quiet=()):
+"""Raise an error 

[U-Boot] [PATCH 1/2] fdt: Bring in changes from v1.4.4

[Simon Glass]

This a few minor changes down from upstream since the last sync.

Signed-off-by: Simon Glass 
---

 lib/libfdt/fdt_overlay.c  | 23 ---
 lib/libfdt/fdt_rw.c   |  3 ++-
 lib/libfdt/fdt_strerror.c |  3 +++
 3 files changed, 17 insertions(+), 12 deletions(-)

diff --git a/lib/libfdt/fdt_overlay.c b/lib/libfdt/fdt_overlay.c
index 56cb70ed44..ceb968786e 100644
--- a/lib/libfdt/fdt_overlay.c
+++ b/lib/libfdt/fdt_overlay.c
@@ -21,14 +21,14 @@
  */
 static uint32_t overlay_get_target_phandle(const void *fdto, int fragment)
 {
-   const uint32_t *val;
+   const fdt32_t *val;
int len;
 
val = fdt_getprop(fdto, fragment, "target", );
if (!val)
return 0;
 
-   if ((len != sizeof(*val)) || (*val == (uint32_t)-1))
+   if ((len != sizeof(*val)) || (fdt32_to_cpu(*val) == (uint32_t)-1))
return (uint32_t)-1;
 
return fdt32_to_cpu(*val);
@@ -99,7 +99,7 @@ static int overlay_get_target(const void *fdt, const void 
*fdto,
 static int overlay_phandle_add_offset(void *fdt, int node,
  const char *name, uint32_t delta)
 {
-   const uint32_t *val;
+   const fdt32_t *val;
uint32_t adj_val;
int len;
 
@@ -210,7 +210,7 @@ static int overlay_update_local_node_references(void *fdto,
int ret;
 
fdt_for_each_property_offset(fixup_prop, fdto, fixup_node) {
-   const uint32_t *fixup_val;
+   const fdt32_t *fixup_val;
const char *tree_val;
const char *name;
int fixup_len;
@@ -234,7 +234,8 @@ static int overlay_update_local_node_references(void *fdto,
}
 
for (i = 0; i < (fixup_len / sizeof(uint32_t)); i++) {
-   uint32_t adj_val, poffset;
+   fdt32_t adj_val;
+   uint32_t poffset;
 
poffset = fdt32_to_cpu(fixup_val[i]);
 
@@ -246,9 +247,7 @@ static int overlay_update_local_node_references(void *fdto,
 */
memcpy(_val, tree_val + poffset, sizeof(adj_val));
 
-   adj_val = fdt32_to_cpu(adj_val);
-   adj_val += delta;
-   adj_val = cpu_to_fdt32(adj_val);
+   adj_val = cpu_to_fdt32(fdt32_to_cpu(adj_val) + delta);
 
ret = fdt_setprop_inplace_namelen_partial(fdto,
  tree_node,
@@ -272,7 +271,7 @@ static int overlay_update_local_node_references(void *fdto,
 
tree_child = fdt_subnode_offset(fdto, tree_node,
fixup_child_name);
-   if (ret == -FDT_ERR_NOTFOUND)
+   if (tree_child == -FDT_ERR_NOTFOUND)
return -FDT_ERR_BADOVERLAY;
if (tree_child < 0)
return tree_child;
@@ -356,6 +355,7 @@ static int overlay_fixup_one_phandle(void *fdt, void *fdto,
 {
const char *symbol_path;
uint32_t phandle;
+   fdt32_t phandle_prop;
int symbol_off, fixup_off;
int prop_len;
 
@@ -381,10 +381,11 @@ static int overlay_fixup_one_phandle(void *fdt, void 
*fdto,
if (fixup_off < 0)
return fixup_off;
 
-   phandle = cpu_to_fdt32(phandle);
+   phandle_prop = cpu_to_fdt32(phandle);
return fdt_setprop_inplace_namelen_partial(fdto, fixup_off,
   name, name_len, poffset,
-  , sizeof(phandle));
+  _prop,
+  sizeof(phandle_prop));
 };
 
 /**
diff --git a/lib/libfdt/fdt_rw.c b/lib/libfdt/fdt_rw.c
index 87d4030fb1..80a3212141 100644
--- a/lib/libfdt/fdt_rw.c
+++ b/lib/libfdt/fdt_rw.c
@@ -242,7 +242,8 @@ int fdt_setprop(void *fdt, int nodeoffset, const char *name,
if (err)
return err;
 
-   memcpy(prop->data, val, len);
+   if (len)
+   memcpy(prop->data, val, len);
return 0;
 }
 
diff --git a/lib/libfdt/fdt_strerror.c b/lib/libfdt/fdt_strerror.c
index 7f8e02b1ee..f89004c609 100644
--- a/lib/libfdt/fdt_strerror.c
+++ b/lib/libfdt/fdt_strerror.c
@@ -36,6 +36,9 @@ static struct fdt_errtabent fdt_errtable[] = {
FDT_ERRTABENT(FDT_ERR_BADVERSION),
FDT_ERRTABENT(FDT_ERR_BADSTRUCTURE),
FDT_ERRTABENT(FDT_ERR_BADLAYOUT),
+   FDT_ERRTABENT(FDT_ERR_INTERNAL),
+   FDT_ERRTABENT(FDT_ERR_BADNCELLS),
+   FDT_ERRTABENT(FDT_ERR_BADVALUE),
FDT_ERRTABENT(FDT_ERR_BADOVERLAY),
FDT_ERRTABENT(FDT_ERR_NOPHANDLES),
 };
-- 
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[U-Boot] [PATCH v3 05/13] usb: phy: Add STi USB2 PHY

[patrice.chotard]

From: Patrice Chotard 

This is the generic phy driver for the picoPHY ports
used by USB2/1.1 controllers. It is found on STiH407 SoC
family from STMicroelectronics.

Signed-off-by: Patrice Chotard 
---

v3: _ convert driver to USB PHY uclass

v2: _ replace bitfield_replace() by clrsetbits_le32()

 doc/device-tree-bindings/phy/phy-stih407-usb.txt |  24 +++
 drivers/usb/phy/Kconfig  |   9 ++
 drivers/usb/phy/Makefile |   1 +
 drivers/usb/phy/sti_usb_phy.c| 181 +++
 4 files changed, 215 insertions(+)
 create mode 100644 doc/device-tree-bindings/phy/phy-stih407-usb.txt
 create mode 100644 drivers/usb/phy/sti_usb_phy.c

diff --git a/doc/device-tree-bindings/phy/phy-stih407-usb.txt 
b/doc/device-tree-bindings/phy/phy-stih407-usb.txt
new file mode 100644
index 000..de6a706
--- /dev/null
+++ b/doc/device-tree-bindings/phy/phy-stih407-usb.txt
@@ -0,0 +1,24 @@
+ST STiH407 USB PHY controller
+
+This file documents the dt bindings for the usb picoPHY driver which is the 
PHY for both USB2 and USB3
+host controllers (when controlling usb2/1.1 devices) available on STiH407 SoC 
family from STMicroelectronics.
+
+Required properties:
+- compatible   : should be "st,stih407-usb2-phy"
+- st,syscfg: phandle of sysconfig bank plus integer array 
containing phyparam and phyctrl register offsets
+- resets   : list of phandle and reset specifier pairs. There 
should be two entries, one
+ for the whole phy and one for the port
+- reset-names  : list of reset signal names. Should be "global" and 
"port"
+See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt
+See: Documentation/devicetree/bindings/reset/reset.txt
+
+Example:
+
+usb2_picophy0: usbpicophy@f8 {
+   compatible  = "st,stih407-usb2-phy";
+   #phy-cells  = <0>;
+   st,syscfg   = <_core 0x100 0xf4>;
+   resets  = < STIH407_PICOPHY_SOFTRESET>,
+ < STIH407_PICOPHY0_RESET>;
+   reset-names = "global", "port";
+};
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 0539401..98c1995 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -7,4 +7,13 @@ config USB_PHY
  Enable driver model for USB PHY access. It defines basic
  init and exit API.
 
+config STI_USB_PHY
+   bool "STMicroelectronics USB2 picoPHY driver for STiH407 family"
+   depends on USB_PHY
+   default y if ARCH_STI
+   help
+ This is the generic phy driver for the picoPHY ports
+ used by USB2 and USB3 Host controllers available on
+ STiH407 SoC families.
+
 endmenu
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 5314dcb..584cc96 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_USB_PHY) += usb_phy_uclass.o
 obj-$(CONFIG_TWL4030_USB) += twl4030.o
 obj-$(CONFIG_OMAP_USB_PHY) += omap_usb_phy.o
 obj-$(CONFIG_ROCKCHIP_USB2_PHY) += rockchip_usb2_phy.o
+obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o
diff --git a/drivers/usb/phy/sti_usb_phy.c b/drivers/usb/phy/sti_usb_phy.c
new file mode 100644
index 000..9058246
--- /dev/null
+++ b/drivers/usb/phy/sti_usb_phy.c
@@ -0,0 +1,181 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Default PHY_SEL and REFCLKSEL configuration */
+#define STIH407_USB_PICOPHY_CTRL_PORT_CONF 0x6
+
+/* ports parameters overriding */
+#define STIH407_USB_PICOPHY_PARAM_DEF  0x39a4dc
+
+#define PHYPARAM_REG   1
+#define PHYCTRL_REG2
+#define PHYPARAM_NB3
+
+struct sti_usb_phy {
+   struct regmap *regmap;
+   struct reset_ctl global_ctl;
+   struct reset_ctl port_ctl;
+   int param;
+   int ctrl;
+};
+
+static int sti_usb_phy_deassert(struct sti_usb_phy *phy)
+{
+   int ret;
+
+   ret = reset_deassert(>global_ctl);
+   if (ret < 0) {
+   error("PHY global deassert failed: %d", ret);
+   return ret;
+   }
+
+   ret = reset_deassert(>port_ctl);
+   if (ret < 0)
+   error("PHY port deassert failed: %d", ret);
+
+   return ret;
+}
+
+static int sti_usb_phy_init(struct usb_phy_desc *usb_phy_desc)
+{
+   struct udevice *dev = usb_phy_desc->dev;
+   struct sti_usb_phy *phy = dev_get_priv(dev);
+   void __iomem *reg;
+
+   /* set ctrl picophy value */
+   reg = (void __iomem *)phy->regmap->base + phy->ctrl;
+   /* CTRL_PORT mask is 0x1f */
+   clrsetbits_le32(reg, 0x1f, STIH407_USB_PICOPHY_CTRL_PORT_CONF);
+
+   /* set ports parameters overriding */
+   reg = (void 

[U-Boot] [PATCH v3 11/13] board: STiH410-B2260: add fastboot support

[patrice.chotard]

From: Patrice Chotard 

Add usb_gadget_handle_interrupts(), board_usb_init(),
board_usb_cleanup() and g_dnl_board_usb_cable_connected()
callbacks needed for FASTBOOT support

Signed-off-by: Patrice Chotard 
---
 board/st/stih410-b2260/board.c | 44 ++
 1 file changed, 44 insertions(+)

diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
index 0c06bca..3edfc7f 100644
--- a/board/st/stih410-b2260/board.c
+++ b/board/st/stih410-b2260/board.c
@@ -7,6 +7,9 @@
  */
 
 #include 
+#include 
+#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -26,3 +29,44 @@ int board_init(void)
 {
return 0;
 }
+
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device dwc3_device_data = {
+   .maximum_speed = USB_SPEED_HIGH,
+   .dr_mode = USB_DR_MODE_PERIPHERAL,
+   .index = 0,
+};
+
+int usb_gadget_handle_interrupts(int index)
+{
+   dwc3_uboot_handle_interrupt(index);
+   return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+   int node;
+   const void *blob = gd->fdt_blob;
+
+   /* find the snps,dwc3 node */
+   node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
+
+   dwc3_device_data.base = fdtdec_get_addr(blob, node, "reg");
+
+   /* init dwc3 glue with mode forced to PERIPHERAL */
+   sti_dwc3_init(USB_DR_MODE_PERIPHERAL);
+
+   return dwc3_uboot_init(_device_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+   dwc3_uboot_exit(index);
+   return 0;
+}
+
+int g_dnl_board_usb_cable_connected(void)
+{
+   return 1;
+}
+#endif
-- 
1.9.1

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[U-Boot] [PATCH v3 07/13] usb: ohci: Add STi ohci support

[patrice.chotard]

From: Patrice Chotard 

Add support for on-chip ohci controller available
on STMicrolectronics SoCs.
Ohci support will be then available on both type A
USB 2.0 connectors.

Signed-off-by: Patrice Chotard 
---

v3: _ update to use new USB PHY uclass

v2: _ put board specific defines in a separate patch

 drivers/usb/host/Kconfig|  9 +
 drivers/usb/host/Makefile   |  1 +
 drivers/usb/host/ohci-sti.c | 93 +
 3 files changed, 103 insertions(+)
 create mode 100644 drivers/usb/host/ohci-sti.c

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 7c29bf5..b259a05 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -169,6 +169,15 @@ config USB_OHCI_GENERIC
---help---
  Enables support for generic OHCI controller.
 
+config USB_OHCI_STI
+   bool "Support for STMicroelectronics OHCI USB controller"
+   depends on ARCH_STI
+   depends on OF_CONTROL
+   depends on DM_USB
+   select USB_HOST
+   ---help---
+ Enables support for the on-chip OHCI controller on STMicroelectronics 
SoCs.
+
 endif # USB_OHCI_HCD
 
 config USB_UHCI_HCD
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 303aa32..b78e632 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_USB_OHCI_EP93XX) += ohci-ep93xx.o
 obj-$(CONFIG_USB_OHCI_SUNXI) += ohci-sunxi.o
 obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o
 obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o
+obj-$(CONFIG_USB_OHCI_STI) += ohci-sti.o
 
 # echi
 obj-$(CONFIG_USB_EHCI) += ehci-hcd.o
diff --git a/drivers/usb/host/ohci-sti.c b/drivers/usb/host/ohci-sti.c
new file mode 100644
index 000..c221313
--- /dev/null
+++ b/drivers/usb/host/ohci-sti.c
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include "ohci.h"
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if !defined(CONFIG_USB_OHCI_NEW)
+# error "Generic OHCI driver requires CONFIG_USB_OHCI_NEW"
+#endif
+
+struct sti_ohci_priv {
+   ohci_t ohci;
+   struct reset_ctl power_ctl;
+   struct reset_ctl softreset_ctl;
+   struct usb_phy_desc usb_phy;
+};
+
+static int ohci_usb_probe(struct udevice *dev)
+{
+   struct sti_ohci_priv *priv = dev_get_priv(dev);
+   struct ohci_regs *regs;
+   int ret;
+
+   regs = (struct ohci_regs *)dev_get_addr(dev);
+   if (regs == (void *)FDT_ADDR_T_NONE)
+   return -EINVAL;
+
+   ret = reset_get_by_name(dev, "power", >power_ctl);
+   if (ret) {
+   error("can't get power reset for %s (%d)", dev->name, ret);
+   return ret;
+   }
+
+   ret = reset_get_by_name(dev, "softreset", >softreset_ctl);
+   if (ret) {
+   error("can't get USB PHY for %s (%d)", dev->name, ret);
+   return ret;
+   }
+
+   ret = usb_phy_get_by_name(dev, "usb", >usb_phy);
+   if (ret) {
+   error("can't get soft reset for %s (%d)", dev->name, ret);
+   return ret;
+   }
+
+   ret = reset_deassert(>power_ctl);
+   if (ret < 0) {
+   error("OHCI power reset deassert failed: %d", ret);
+   return ret;
+   }
+
+   ret = reset_deassert(>softreset_ctl);
+   if (ret < 0) {
+   error("OHCI soft reset deassert failed: %d", ret);
+   return ret;
+   }
+
+   ret = usb_phy_init(>usb_phy);
+   if (ret) {
+   error("Can't init USB PHY\n");
+   return ret;
+   }
+
+   return ohci_register(dev, regs);
+}
+
+static const struct udevice_id sti_usb_ids[] = {
+   { .compatible = "st,st-ohci-300x" },
+   { }
+};
+
+U_BOOT_DRIVER(ohci_sti) = {
+   .name = "ohci_sti",
+   .id = UCLASS_USB,
+   .of_match = sti_usb_ids,
+   .probe = ohci_usb_probe,
+   .remove = ohci_deregister,
+   .ops = _usb_ops,
+   .priv_auto_alloc_size = sizeof(struct sti_ohci_priv),
+   .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
-- 
1.9.1

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[U-Boot] [PATCH v3 08/13] usb: xhci: Add STi xhci support

[patrice.chotard]

From: Patrice Chotard 

Add support for on-chip DWC3 controller available
on STMicrolectronics STiH407 family SoCs.
On B2260 board, the type AB USB connector is managed
by a DWC3 IP. As USB3 signals are not wired, only USB2
is supported.

Signed-off-by: Patrice Chotard 
---

v3: _ update to use the new USB PHY uclass
_ previously, xhci-sti driver binded dwc3-sti (STi glue driver) which 
was not correct.
  Now we respect the device tree hierarchy, ie the STi dwc3 glue driver 
is first probed, 
  then bind the xhci-sti driver.

 drivers/usb/host/Kconfig|   8 
 drivers/usb/host/Makefile   |   1 +
 drivers/usb/host/xhci-sti.c | 114 
 3 files changed, 123 insertions(+)
 create mode 100644 drivers/usb/host/xhci-sti.c

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index b259a05..62dc5b6 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -38,6 +38,14 @@ config USB_XHCI_ROCKCHIP
help
  Enables support for the on-chip xHCI controller on Rockchip SoCs.
 
+config USB_XHCI_STI
+   bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB 
controller"
+   depends on ARCH_STI
+   default y
+   help
+ Enables support for the on-chip xHCI controller on STMicroelectronics
+ STiH407 family SoCs.
+
 config USB_XHCI_ZYNQMP
bool "Support for Xilinx ZynqMP on-chip xHCI USB controller"
depends on ARCH_ZYNQMP
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index b78e632..40ff830 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -66,6 +66,7 @@ obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
 obj-$(CONFIG_USB_XHCI_MVEBU) += xhci-mvebu.o
 obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
 obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
+obj-$(CONFIG_USB_XHCI_STI) += xhci-sti.o
 
 # designware
 obj-$(CONFIG_USB_DWC2) += dwc2.o
diff --git a/drivers/usb/host/xhci-sti.c b/drivers/usb/host/xhci-sti.c
new file mode 100644
index 000..c445dc5
--- /dev/null
+++ b/drivers/usb/host/xhci-sti.c
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "xhci.h"
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+__weak int __board_usb_init(int index, enum usb_init_type init)
+{
+   return 0;
+}
+/*int board_usb_init(int index, enum usb_init_type init)*/
+/*__attribute__((weak, alias("__board_usb_init")));*/
+
+struct sti_xhci_platdata {
+   struct usb_phy_desc usb_phy;
+   phys_addr_t dwc3_regs;
+};
+
+struct sti_xhci_priv {
+   struct xhci_ctrl ctrl;
+};
+
+static int sti_xhci_core_init(struct dwc3 *dwc3_reg)
+{
+   int ret;
+
+   ret = dwc3_core_init(dwc3_reg);
+   if (ret) {
+   debug("failed to initialize core\n");
+   return ret;
+   }
+
+   /* We are hard-coding DWC3 core to Host Mode */
+   dwc3_set_mode(dwc3_reg, DWC3_GCTL_PRTCAP_HOST);
+
+   return 0;
+}
+
+static int sti_xhci_ofdata_to_platdata(struct udevice *dev)
+{
+   struct sti_xhci_platdata *plat = dev_get_platdata(dev);
+   u32 reg[2];
+   int ret;
+
+   /* get the dwc3 register space base address */
+   if (fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev), "reg", reg,
+ARRAY_SIZE(reg))) {
+   debug("dwc3 node has bad/missing 'reg' property\n");
+   return -FDT_ERR_NOTFOUND;
+   }
+   plat->dwc3_regs = reg[0];
+
+   ret = usb_phy_get_by_name(dev, "usb2-phy", >usb_phy);
+   if (ret)
+   error("USB PHY DT node not found for %s\n", dev->name);
+
+   return 0;
+}
+
+static int sti_xhci_probe(struct udevice *dev)
+{
+   struct sti_xhci_platdata *plat = dev_get_platdata(dev);
+   struct xhci_hcor *hcor;
+   struct xhci_hccr *hccr;
+   struct dwc3 *dwc3_reg;
+   int ret;
+
+   hccr = (struct xhci_hccr *)plat->dwc3_regs;
+   hcor = (struct xhci_hcor *)((phys_addr_t)hccr +
+   HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
+
+   ret = usb_phy_init(>usb_phy);
+   if (ret) {
+   error("Can't init USB PHY for %s\n", dev->name);
+   return ret;
+   }
+
+   dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
+
+   sti_xhci_core_init(dwc3_reg);
+
+   return xhci_register(dev, hccr, hcor);
+}
+
+static const struct udevice_id sti_xhci_ids[] = {
+   { .compatible = "snps,dwc3" },
+   { }
+};
+
+U_BOOT_DRIVER(xhci_sti) = {
+   .name = "xhci_sti",
+   .id = UCLASS_USB,
+   .of_match = sti_xhci_ids,
+   .ofdata_to_platdata = sti_xhci_ofdata_to_platdata,
+   .probe = sti_xhci_probe,
+   .remove = xhci_deregister,
+   .ops = _usb_ops,
+   .priv_auto_alloc_size = 

[U-Boot] [PATCH v3 09/13] usb: dwc3: Add dwc3 glue driver support for STi

[patrice.chotard]

From: Patrice Chotard 

This patch adds the ST glue logic to manage the DWC3 HC
on STiH407 SoC family. It configures the internal glue
logic and syscfg registers.

Part of this code been extracted from kernel.org driver
(drivers/usb/dwc3/dwc3-st.c)

Signed-off-by: Patrice Chotard 
---
v3: _ rename dwc3-sti.c to dwc3-sti-glue.c
_ respect device tree hierarchy, this driver is now responsible 
  for xhci-sti binding (done in sti_dwc3_glue_bind())

v2: _ use setbits_le32() instead of read, modify, write sequence 
_ add missing parenthesis

 arch/arm/include/asm/arch-stih410/sys_proto.h |  11 +
 doc/device-tree-bindings/usb/dwc3-st.txt  |  60 ++
 drivers/usb/host/Makefile |   2 +-
 drivers/usb/host/dwc3-sti-glue.c  | 278 ++
 include/dwc3-sti-glue.h   |  43 
 5 files changed, 393 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-stih410/sys_proto.h
 create mode 100644 doc/device-tree-bindings/usb/dwc3-st.txt
 create mode 100644 drivers/usb/host/dwc3-sti-glue.c
 create mode 100644 include/dwc3-sti-glue.h

diff --git a/arch/arm/include/asm/arch-stih410/sys_proto.h 
b/arch/arm/include/asm/arch-stih410/sys_proto.h
new file mode 100644
index 000..5c40d3b
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sys_proto.h
@@ -0,0 +1,11 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_SYS_PROTO_H
+#define _ASM_ARCH_SYS_PROTO_H
+
+#endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/doc/device-tree-bindings/usb/dwc3-st.txt 
b/doc/device-tree-bindings/usb/dwc3-st.txt
new file mode 100644
index 000..a26a139
--- /dev/null
+++ b/doc/device-tree-bindings/usb/dwc3-st.txt
@@ -0,0 +1,60 @@
+ST DWC3 glue logic
+
+This file documents the parameters for the dwc3-st driver.
+This driver controls the glue logic used to configure the dwc3 core on
+STiH407 based platforms.
+
+Required properties:
+ - compatible  : must be "st,stih407-dwc3"
+ - reg : glue logic base address and USB syscfg ctrl register offset
+ - reg-names   : should be "reg-glue" and "syscfg-reg"
+ - st,syscon   : should be phandle to system configuration node which
+ encompasses the glue registers
+ - resets  : list of phandle and reset specifier pairs. There should be 
two entries, one
+ for the powerdown and softreset lines of the usb3 IP
+ - reset-names : list of reset signal names. Names should be "powerdown" and 
"softreset"
+
+ - #address-cells, #size-cells : should be '1' if the device has sub-nodes
+   with 'reg' property
+
+ - pinctl-names: A pinctrl state named "default" must be defined
+
+ - pinctrl-0   : Pin control group
+
+ - ranges  : allows valid 1:1 translation between child's address space and
+ parent's address space
+
+Sub-nodes:
+The dwc3 core should be added as subnode to ST DWC3 glue as shown in the
+example below.
+
+NB: The dr_mode property is NOT optional for this driver, as the default value
+is "otg", which isn't supported by this SoC. Valid dr_mode values for dwc3-st 
are
+either "host" or "device".
+
+Example:
+
+st_dwc3: dwc3@8f94000 {
+   status  = "disabled";
+   compatible  = "st,stih407-dwc3";
+   reg = <0x08f94000 0x1000>, <0x110 0x4>;
+   reg-names   = "reg-glue", "syscfg-reg";
+   st,syscfg   = <_core>;
+   resets  = < STIH407_USB3_POWERDOWN>,
+ < STIH407_MIPHY2_SOFTRESET>;
+   reset-names = "powerdown", "softreset";
+   #address-cells  = <1>;
+   #size-cells = <1>;
+   pinctrl-names   = "default";
+   pinctrl-0   = <_usb3>;
+   ranges;
+
+   dwc3: dwc3@990 {
+   compatible  = "snps,dwc3";
+   reg = <0x0990 0x10>;
+   interrupts  = ;
+   dr_mode = "host";
+   phy-names   = "usb2-phy", "usb3-phy";
+   phys= <_picophy2>, <_port2 PHY_TYPE_USB3>;
+   };
+};
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 40ff830..6be40b8 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -66,7 +66,7 @@ obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
 obj-$(CONFIG_USB_XHCI_MVEBU) += xhci-mvebu.o
 obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
 obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
-obj-$(CONFIG_USB_XHCI_STI) += xhci-sti.o
+obj-$(CONFIG_USB_XHCI_STI) += xhci-sti.o dwc3-sti-glue.o
 
 # designware
 obj-$(CONFIG_USB_DWC2) += dwc2.o
diff --git a/drivers/usb/host/dwc3-sti-glue.c b/drivers/usb/host/dwc3-sti-glue.c
new file mode 100644
index 000..368d7ef
--- /dev/null
+++ b/drivers/usb/host/dwc3-sti-glue.c
@@ -0,0 +1,278 @@
+/*
+ * STiH407 family DWC3 specific Glue layer
+ *
+ * Copyright (c) 2017
+ * 

Re: [U-Boot] i.MX6QP sd boot issue

[Fabio Estevam]

On Tue, Mar 28, 2017 at 1:02 PM, Jagan Teki  wrote:

> I still not able to boot from SD with mx6qpsabreauto_defconfig, did
> you able to boot from SD?

Could you try bisect it?
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[U-Boot] [PATCH v3 10/13] board: STiH410-B2260: add OHCI and XHCI related defines

[patrice.chotard]

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---

v3: _ squas patches 8 and 10

 include/configs/stih410-b2260.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
index 6f4070f..3df0e04 100644
--- a/include/configs/stih410-b2260.h
+++ b/include/configs/stih410-b2260.h
@@ -52,4 +52,8 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
+
 #endif /* __CONFIG_H */
-- 
1.9.1

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[U-Boot] [PATCH v3 03/13] mmc: sti_sdhci: Use reset framework

[patrice.chotard]

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
Reviewed-by: Jaehoon Chung 
---
 drivers/mmc/sti_sdhci.c | 31 ++-
 1 file changed, 22 insertions(+), 9 deletions(-)

diff --git a/drivers/mmc/sti_sdhci.c b/drivers/mmc/sti_sdhci.c
index d6c4d67..8b1b2c0 100644
--- a/drivers/mmc/sti_sdhci.c
+++ b/drivers/mmc/sti_sdhci.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -16,6 +17,7 @@ DECLARE_GLOBAL_DATA_PTR;
 struct sti_sdhci_plat {
struct mmc_config cfg;
struct mmc mmc;
+   struct reset_ctl reset;
int instance;
 };
 
@@ -37,17 +39,19 @@ struct sti_sdhci_plat {
  * W/o these settings the SDHCI could configure and use the embedded controller
  * with limited features.
  */
-static void sti_mmc_core_config(struct udevice *dev)
+static int sti_mmc_core_config(struct udevice *dev)
 {
struct sti_sdhci_plat *plat = dev_get_platdata(dev);
struct sdhci_host *host = dev_get_priv(dev);
-   unsigned long *sysconf;
+   int ret;
 
/* only MMC1 has a reset line */
if (plat->instance) {
-   sysconf = (unsigned long *)(STIH410_SYSCONF5_BASE +
- ST_MMC_CCONFIG_REG_5);
-   generic_set_bit(SYSCONF_MMC1_ENABLE_BIT, sysconf);
+   ret = reset_deassert(>reset);
+   if (ret < 0) {
+   error("MMC1 deassert failed: %d", ret);
+   return ret;
+   }
}
 
writel(STI_FLASHSS_MMC_CORE_CONFIG_1,
@@ -66,6 +70,8 @@ static void sti_mmc_core_config(struct udevice *dev)
}
writel(STI_FLASHSS_MMC_CORE_CONFIG4,
   host->ioaddr + FLASHSS_MMC_CORE_CONFIG_4);
+
+   return 0;
 }
 
 static int sti_sdhci_probe(struct udevice *dev)
@@ -80,13 +86,20 @@ static int sti_sdhci_probe(struct udevice *dev)
 * MMC0 is wired to the SD slot,
 * MMC1 is wired on the high speed connector
 */
-
-   if (fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "resets", NULL))
+   if (fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "resets", NULL)) {
plat->instance = 1;
-   else
+   ret = reset_get_by_name(dev, "softreset", >reset);
+   if (ret) {
+   error("can't get reset for %s (%d)", dev->name, ret);
+   return ret;
+   }
+   } else {
plat->instance = 0;
+   }
 
-   sti_mmc_core_config(dev);
+   ret = sti_mmc_core_config(dev);
+   if (ret)
+   return ret;
 
host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
   SDHCI_QUIRK_32BIT_DMA_ADDR |
-- 
1.9.1

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[U-Boot] [PATCH v3 12/13] STiH410-B2260: enable USB Host Networking

[patrice.chotard]

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---
 include/configs/stih410-b2260.h | 12 
 1 file changed, 12 insertions(+)

diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
index 3df0e04..6c84e9b 100644
--- a/include/configs/stih410-b2260.h
+++ b/include/configs/stih410-b2260.h
@@ -52,8 +52,20 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
+/* USB Configs */
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
 
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_MCS7830
+#define CONFIG_USB_ETHER_SMSC95XX
+
+/* NET Configs */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
 #endif /* __CONFIG_H */
-- 
1.9.1

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[U-Boot] [PATCH v3 06/13] usb: ehci: Add STi ehci support

[patrice.chotard]

From: Patrice Chotard 

Add support for on-chip ehci controller available
on STMicrolectronics SoCs.
ehci support will be then available on both type A
USB 2.0 connectors.

Signed-off-by: Patrice Chotard 
---

v3: _ update to use new USB PHY uclass

v2: _ update error messages
_ add remove callback to put core into reset

 drivers/usb/host/Kconfig|   9 
 drivers/usb/host/Makefile   |   1 +
 drivers/usb/host/ehci-sti.c | 116 
 3 files changed, 126 insertions(+)
 create mode 100644 drivers/usb/host/ehci-sti.c

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 0bf8274..7c29bf5 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -121,6 +121,15 @@ config USB_EHCI_MSM
  This driver supports combination of Chipidea USB controller
  and Synapsys USB PHY in host mode only.
 
+config USB_EHCI_STI
+   bool "Support for STMicroelectronics on-chip EHCI USB controller"
+   depends on ARCH_STI
+   select STI_PHY_USB
+   default y
+   ---help---
+ Enables support for the on-chip EHCI controller on
+ STMicroelectronics SoCs.
+
 config USB_EHCI_ZYNQ
bool "Support for Xilinx Zynq on-chip EHCI USB controller"
depends on ARCH_ZYNQ
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 58c0cf5..303aa32 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
 obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
 obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
 obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
+obj-$(CONFIG_USB_EHCI_STI) += ehci-sti.o
 obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
 obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
 obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
diff --git a/drivers/usb/host/ehci-sti.c b/drivers/usb/host/ehci-sti.c
new file mode 100644
index 000..b417170
--- /dev/null
+++ b/drivers/usb/host/ehci-sti.c
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include "ehci.h"
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sti_ehci_priv {
+   struct ehci_ctrl ctrl;
+   struct reset_ctl power_ctl;
+   struct reset_ctl softreset_ctl;
+   struct usb_phy_desc usb_phy;
+};
+
+static int sti_ehci_probe(struct udevice *dev)
+{
+   struct sti_ehci_priv *priv = dev_get_priv(dev);
+   struct ehci_hccr *hccr = priv->ctrl.hccr;
+   struct ehci_hcor *hcor;
+   int ret;
+
+   hccr = (struct ehci_hccr *)dev_get_addr(dev);
+
+   if (hccr == (void *)FDT_ADDR_T_NONE)
+   return -EINVAL;
+
+   ret = reset_get_by_name(dev, "power", >power_ctl);
+   if (ret) {
+   error("can't get power for %s: %d", dev->name, ret);
+   return ret;
+   }
+
+   ret = reset_get_by_name(dev, "softreset", >softreset_ctl);
+   if (ret) {
+   error("can't get soft reset for %s: %d", dev->name, ret);
+   return ret;
+   }
+
+   ret = usb_phy_get_by_name(dev, "usb", >usb_phy);
+   if (ret) {
+   error("USB PHY DT node not found for %s: %d", dev->name, ret);
+   return ret;
+   }
+
+   ret = reset_deassert(>softreset_ctl);
+   if (ret < 0) {
+   error("EHCI soft reset deassert failed: %d", ret);
+   return ret;
+   }
+
+   ret = reset_deassert(>power_ctl);
+   if (ret < 0) {
+   error("EHCI power deassert failed: %d", ret);
+   return ret;
+   }
+
+   ret = usb_phy_init(>usb_phy);
+   if (ret) {
+   error("Can't init USB PHY for %s: %d\n", dev->name, ret);
+   return ret;
+   }
+
+   hcor = (struct ehci_hcor *)((phys_addr_t)hccr +
+   HC_LENGTH(ehci_readl(&(hccr)->cr_capbase)));
+
+   return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
+}
+
+static int sti_ehci_remove(struct udevice *dev)
+{
+   struct sti_ehci_priv *priv = dev_get_priv(dev);
+   int ret;
+
+   ret = ehci_deregister(dev);
+   if (ret)
+   return ret;
+
+   ret = reset_assert(>power_ctl);
+   if (ret < 0) {
+   error("EHCI power assert failed: %d", ret);
+   return ret;
+   }
+
+   ret = reset_assert(>softreset_ctl);
+   if (ret < 0)
+   error("EHCI soft reset assert failed: %d", ret);
+
+   return ret;
+}
+
+static const struct udevice_id sti_usb_ids[] = {
+   { .compatible = "st,st-ehci-300x" },
+   { }
+};
+
+U_BOOT_DRIVER(ehci_sti) = {
+   .name = "ehci_sti",
+   .id = UCLASS_USB,
+   .of_match = sti_usb_ids,
+   .probe = sti_ehci_probe,
+   .remove = sti_ehci_remove,
+   .ops = _usb_ops,
+   

[U-Boot] [PATCH v3 13/13] STiH410-B2260: enable USB, fastboot, reset related flags

[patrice.chotard]

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---

v2 :_ squash patch 7,9,11,12,14,16,17,18,19,20 and 21

 configs/stih410-b2260_defconfig | 36 
 1 file changed, 32 insertions(+), 4 deletions(-)

diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
index 4e6942f..b8df85c 100644
--- a/configs/stih410-b2260_defconfig
+++ b/configs/stih410-b2260_defconfig
@@ -2,25 +2,53 @@ CONFIG_ARM=y
 CONFIG_ARCH_STI=y
 CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260"
 CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260"
+CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SYS_PROMPT="stih410-b2260 => "
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FASTBOOT_BUF_ADDR=0x4000
+CONFIG_FASTBOOT_BUF_SIZE=0x3DF0
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_EXT4_WRITE=y
+# CONFIG_ISO_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_MISC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_STI=y
 CONFIG_PINCTRL=y
+CONFIG_STI_RESET=y
 CONFIG_STI_ASC_SERIAL=y
 CONFIG_SYSRESET=y
 CONFIG_TIMER=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_STI=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="STMicroelectronics"
+CONFIG_G_DNL_VENDOR_NUM=0x483
+CONFIG_G_DNL_PRODUCT_NUM=0x7270
+CONFIG_USB_PHY=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_SPL_OF_LIBFDT=y
-- 
1.9.1

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[U-Boot] [PATCH v3 04/13] dm: usb: Add a uclass for USB PHY

[patrice.chotard]

From: Patrice Chotard 

This is a basic implementation of USB PHY which
define a standard API that link USB PHY client to
USB PHY driver controller.

Signed-off-by: Patrice Chotard 
---

v3: _ this patch intoduce new USB PHY uclass

 drivers/usb/Kconfig  |   4 ++
 drivers/usb/phy/Kconfig  |  10 
 drivers/usb/phy/Makefile |   1 +
 drivers/usb/phy/usb_phy_uclass.c |  90 +++
 include/dm/uclass-id.h   |   1 +
 include/usb_phy-uclass.h |  42 +++
 include/usb_phy.h| 112 +++
 7 files changed, 260 insertions(+)
 create mode 100644 drivers/usb/phy/Kconfig
 create mode 100644 drivers/usb/phy/usb_phy_uclass.c
 create mode 100644 include/usb_phy-uclass.h
 create mode 100644 include/usb_phy.h

diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index da3ec2f..e30c9d6 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -94,4 +94,8 @@ endif
 
 source "drivers/usb/gadget/Kconfig"
 
+comment "USB PHY"
+
+source "drivers/usb/phy/Kconfig"
+
 endif
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
new file mode 100644
index 000..0539401
--- /dev/null
+++ b/drivers/usb/phy/Kconfig
@@ -0,0 +1,10 @@
+menu "USB PHY drivers"
+
+config USB_PHY
+   bool "Enable driver model for USB PHY drivers"
+   depends on DM
+   help
+ Enable driver model for USB PHY access. It defines basic
+ init and exit API.
+
+endmenu
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 4e548c2..5314dcb 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -5,6 +5,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
+obj-$(CONFIG_USB_PHY) += usb_phy_uclass.o
 obj-$(CONFIG_TWL4030_USB) += twl4030.o
 obj-$(CONFIG_OMAP_USB_PHY) += omap_usb_phy.o
 obj-$(CONFIG_ROCKCHIP_USB2_PHY) += rockchip_usb2_phy.o
diff --git a/drivers/usb/phy/usb_phy_uclass.c b/drivers/usb/phy/usb_phy_uclass.c
new file mode 100644
index 000..11da635
--- /dev/null
+++ b/drivers/usb/phy/usb_phy_uclass.c
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static inline struct usb_phy_ops *usb_phy_dev_ops(struct udevice *dev)
+{
+   return (struct usb_phy_ops *)dev->driver->ops;
+}
+
+int usb_phy_get_by_index(struct udevice *dev, int index,
+struct usb_phy_desc *usb_phy_desc)
+{
+   struct fdtdec_phandle_args args;
+   int ret;
+   struct udevice *dev_usb_phy;
+
+   debug("%s(dev=%p, index=%d, usb_phy_desc=%p)\n", __func__, dev, index,
+ usb_phy_desc);
+
+   ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
+"phys", "#phy-cells", 0,
+index, );
+   if (ret) {
+   debug("%s: fdtdec_parse_phandle_with_args failed: %d\n",
+ __func__, ret);
+   return ret;
+   }
+
+   ret = uclass_get_device_by_of_offset(UCLASS_USB_PHY, args.node,
+_usb_phy);
+   if (ret) {
+   debug("%s: uclass_get_device_by_of_offset failed: %d\n",
+ __func__, ret);
+   return ret;
+   }
+
+   usb_phy_desc->dev = dev_usb_phy;
+
+   return 0;
+}
+
+int usb_phy_get_by_name(struct udevice *dev, const char *name,
+   struct usb_phy_desc *usb_phy_desc)
+{
+   int index;
+
+   debug("%s(dev=%p, name=%s, usb_phy_desc=%p)\n", __func__, dev, name,
+ usb_phy_desc);
+
+   index = fdt_stringlist_search(gd->fdt_blob, dev_of_offset(dev),
+ "phy-names", name);
+   if (index < 0) {
+   debug("fdt_stringlist_search() failed: %d\n", index);
+   return index;
+   }
+
+   return usb_phy_get_by_index(dev, index, usb_phy_desc);
+}
+
+int usb_phy_init(struct usb_phy_desc *usb_phy_desc)
+{
+   struct usb_phy_ops *ops = usb_phy_dev_ops(usb_phy_desc->dev);
+
+   debug("%s(usb_phy_desc=%p)\n", __func__, usb_phy_desc);
+
+   return ops->init(usb_phy_desc);
+}
+
+int usb_phy_exit(struct usb_phy_desc *usb_phy_desc)
+{
+   struct usb_phy_ops *ops = usb_phy_dev_ops(usb_phy_desc->dev);
+
+   debug("%s(usb_phy_desc=%p)\n", __func__, usb_phy_desc);
+
+   return ops->exit(usb_phy_desc);
+}
+
+UCLASS_DRIVER(usb_phy) = {
+   .id = UCLASS_USB_PHY,
+   .name   = "usb_phy",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 8c92d0b..feb6689 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -80,6 +80,7 @@ enum uclass_id {
UCLASS_USB, /* USB bus */
UCLASS_USB_DEV_GENERIC, /* USB generic device */