Re: [U-Boot] Support of device-tree for PowerPC platform: Query
Hi Bin, > -Original Message- > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Bin Meng > Sent: Tuesday, July 3, 2018 8:11 PM > To: Prabhakar Kushwaha > Cc: u-boot@lists.denx.de > Subject: Re: [U-Boot] Support of device-tree for PowerPC platform: Query > > Hi Prabhakar, > > On Mon, Jul 2, 2018 at 11:27 PM, Prabhakar Kushwaha > wrote: > > Dear Bin, > > > > Coming back to x86 example. > > > >> -Original Message- > >> From: Bin Meng [mailto:bmeng...@gmail.com] > >> Sent: Friday, June 29, 2018 7:03 AM > >> To: York Sun > >> Cc: Simon Glass ; Prabhakar Kushwaha > >> ; u-boot@lists.denx.de > >> Subject: Re: [U-Boot] Support of device-tree for PowerPC platform: > >> Query > >> > >> Hi York, > >> > >> On Thu, Jun 28, 2018 at 11:32 PM, York Sun wrote: > >> > On 06/27/2018 10:53 PM, Bin Meng wrote: > >> > > >> >> > >> >>> Can the DT perhaps go before U-Boot in the flash? We would need a > >> >>> way to find it though. > >> >>> > >> >> > >> >> I don't see any issue that DT go after U-Boot in the flash. x86 > >> >> does this way, and its reset vector is also the last address of flash. > >> >> > >> > > >> > Big issue. e500 runs from the last address of the flash. We cannot > >> > put DT after U-Boot. > >> > >> Looks you did not get it. I know e500 reset vector is the last 4 bytes > >> below > 4G. > >> This is similar to x86. DTB can be put after the u-boot image without > >> reset vector. You may check how x86 does this. > >> > > > > I tried to search thing for x86 but did not succeed ☹ > > > > You can test x86 build easily with QEMU. > > $ make qemu-x86_defconfig > $ make V=1 > > This way you can see how u-boot.rom image is built. > > > I request you to help me with sample code and boot flow. > > I will try to understand and see how it can help PowerPC. > > > > Please see the sample build flow below: > > 1. objcopy --gap-fill=0xff -O binary -R .start16 -R .resetvec u-boot u-boot- > nodtb.bin > > .start16 and .resetvec is the x86 boot vector. This is similar to PPC BookE's > reset > vector. These two sections are removed to generate a new u-boot-nodtb > binary. > > 2. cat arch/x86/dts/qemu-x86_i440fx.dtb > dts/dt.dtb > cat u-boot-nodtb.bin dts/dt.dtb > u-boot-dtb.bin > > Append dtb to the end of the u-boot-nodtb binary and get a new u-boot-dtb > binary. > > 3. cp dts/dt.dtb u-boot.dtb > objcopy --gap-fill=0xff -O binary -j .start16 -j .resetvec u-boot > u-boot-x86- > 16bit.bin > > Create a binary which contains the reset vector. > > 4. ./tools/binman/binman -d u-boot.dtb -O . -I . -I > ./board/emulation/qemu-x86 u-boot-x86-16bit.bin > > Use binman to assemble the final u-boot.rom image. Wouldn't it be similar to CONFIG_OF_EMBED as dtb is embedded in final binary(before start and resetvec sections)? Thanks, Jagdish ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 1/1] net: Store waiting packet in a different buffer when making ARP requests
U-Boot has 1 common buffer to send Ethernet frames, pointed to by
net_tx_packet. When sending to an IP address without knowing the MAC
address, U-Boot makes an ARP request (using the arp_tx_packet buffer) to
find out the MAC address of the IP addressr. When a matching ARP reply is
received, U-Boot continues sending the frame stored in the net_tx_packet
buffer.
However, in the mean time, if U-Boot needs to send out any network packets
(e.g. replying ping packets or ARP requests for its own IP address etc.),
it will use the net_tx_packet buffer to prepare the new packet. Thus this
buffer is no longer the original packet meant to be transmitted after the
ARP reply. The original packet will be lost.
U-Boot has another buffer, pointed to by arp_tx_packet which is used to
prepare ARP requests. ARP requests use this buffer instead of the normal
net_tx_packet in order to avoid modifying the waiting packet to be sent.
However, this approach does not prevent other parts of the codes from
modifying the waiting packet to be sent, as explained above. This patch
repurposes the arp_tx_packet buffer to be used to store the waiting packet
to be sent, and use the normal net_tx_packet buffer to send ARP request
instead.
Signed-off-by: Tran Tien Dat
---
Changes in v2:
- Provide more detailed description
net/arp.c | 18 ++
net/arp.h | 1 +
net/net.c | 3 +++
3 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/net/arp.c b/net/arp.c
index b8a71684cd..f5e2c0b0cf 100644
--- a/net/arp.c
+++ b/net/arp.c
@@ -35,8 +35,8 @@ int arp_wait_tx_packet_size;
ulong arp_wait_timer_start;
intarp_wait_try;
-static uchar *arp_tx_packet; /* THE ARP transmit packet */
-static uchar arp_tx_packet_buf[PKTSIZE_ALIGN + PKTALIGN];
+uchar *arp_wait_tx_packet; /* THE waiting transmit packet after ARP */
+static uchar arp_wait_tx_packet_buf[PKTSIZE_ALIGN + PKTALIGN];
void arp_init(void)
{
@@ -45,8 +45,8 @@ void arp_init(void)
net_arp_wait_packet_ip.s_addr = 0;
net_arp_wait_reply_ip.s_addr = 0;
arp_wait_tx_packet_size = 0;
- arp_tx_packet = _tx_packet_buf[0] + (PKTALIGN - 1);
- arp_tx_packet -= (ulong)arp_tx_packet % PKTALIGN;
+ arp_wait_tx_packet = _wait_tx_packet_buf[0] + (PKTALIGN - 1);
+ arp_wait_tx_packet -= (ulong)arp_wait_tx_packet % PKTALIGN;
}
void arp_raw_request(struct in_addr source_ip, const uchar *target_ethaddr,
@@ -58,7 +58,7 @@ void arp_raw_request(struct in_addr source_ip, const uchar
*target_ethaddr,
debug_cond(DEBUG_DEV_PKT, "ARP broadcast %d\n", arp_wait_try);
- pkt = arp_tx_packet;
+ pkt = net_tx_packet;
eth_hdr_size = net_set_ether(pkt, net_bcast_ethaddr, PROT_ARP);
pkt += eth_hdr_size;
@@ -76,7 +76,7 @@ void arp_raw_request(struct in_addr source_ip, const uchar
*target_ethaddr,
memcpy(>ar_tha, target_ethaddr, ARP_HLEN); /* target ET addr */
net_write_ip(>ar_tpa, target_ip); /* target IP addr */
- net_send_packet(arp_tx_packet, eth_hdr_size + ARP_HDR_SIZE);
+ net_send_packet(net_tx_packet, eth_hdr_size + ARP_HDR_SIZE);
}
void arp_request(void)
@@ -217,9 +217,11 @@ void arp_receive(struct ethernet_hdr *et, struct
ip_udp_hdr *ip, int len)
/* set the mac address in the waiting packet's header
and transmit it */
- memcpy(((struct ethernet_hdr *)net_tx_packet)->et_dest,
+ memcpy(((struct ethernet_hdr *)arp_wait_tx_packet)
+ ->et_dest,
>ar_sha, ARP_HLEN);
- net_send_packet(net_tx_packet, arp_wait_tx_packet_size);
+ net_send_packet(arp_wait_tx_packet,
+ arp_wait_tx_packet_size);
/* no arp request pending now */
net_arp_wait_packet_ip.s_addr = 0;
diff --git a/net/arp.h b/net/arp.h
index afb86958f3..65d73927a7 100644
--- a/net/arp.h
+++ b/net/arp.h
@@ -20,6 +20,7 @@ extern uchar *arp_wait_packet_ethaddr;
extern int arp_wait_tx_packet_size;
extern ulong arp_wait_timer_start;
extern int arp_wait_try;
+extern uchar *arp_wait_tx_packet;
void arp_init(void);
void arp_request(void);
diff --git a/net/net.c b/net/net.c
index f35695b4fc..6325ad3e1a 100644
--- a/net/net.c
+++ b/net/net.c
@@ -836,6 +836,9 @@ int net_send_udp_packet(uchar *ether, struct in_addr dest,
int dport, int sport,
/* size of the waiting packet */
arp_wait_tx_packet_size = pkt_hdr_size + payload_len;
+ /* copy current packet to ARP waiting packet buffer */
+ memcpy(arp_wait_tx_packet, net_tx_packet,
+ arp_wait_tx_packet_size);
/* and do the ARP request */
arp_wait_try = 1;
--
2.18.0
___
U-Boot
[U-Boot] [PATCH v2 0/1] net: Store waiting packet in a different buffer when making ARP requests
Currently, upon receiving an appropriate ARP reply, the packet in net_tx_packet is sent. However, this is a common buffer used by other protocol as well, so it may not be the original packet waiting to be sent after ARP. This patch repurposes another buffer, arp_tx_packet to store the waiting packet and use the net_tx_packet to prepare ARP request. Changes in v2: - Provide more detailed description Tran Tien Dat (1): net: Store waiting packet in a different buffer when making ARP requests net/arp.c | 18 ++ net/arp.h | 1 + net/net.c | 3 +++ 3 files changed, 14 insertions(+), 8 deletions(-) -- 2.18.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 4/7] usb: rockchip: implement K_FW_LBA_READ_10 command
Hi Alberto,
On 07/04/2018 03:02 AM, Alberto Panizzo wrote:
> It is now possible to read from block device al logic layer.
> Corresponding command on workstation is:
> rkdeveloptool rl
>
> Signed-off-by: Alberto Panizzo
> ---
> arch/arm/include/asm/arch-rockchip/f_rockusb.h | 2 +
> drivers/usb/gadget/f_rockusb.c | 102
> -
> 2 files changed, 103 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/arch-rockchip/f_rockusb.h
> b/arch/arm/include/asm/arch-rockchip/f_rockusb.h
> index f5cad8e..f04d401 100644
> --- a/arch/arm/include/asm/arch-rockchip/f_rockusb.h
> +++ b/arch/arm/include/asm/arch-rockchip/f_rockusb.h
> @@ -120,6 +120,8 @@ struct f_rockusb {
> unsigned int lba;
> unsigned int dl_size;
> unsigned int dl_bytes;
> + unsigned int ul_size;
> + unsigned int ul_bytes;
> struct blk_desc *desc;
> int reboot_flag;
> void *buf;
> diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
> index 7612871..dbf31cb 100644
> --- a/drivers/usb/gadget/f_rockusb.c
> +++ b/drivers/usb/gadget/f_rockusb.c
> @@ -340,6 +340,7 @@ static int rockusb_tx_write(const char *buffer, unsigned
> int buffer_size)
>
> memcpy(in_req->buf, buffer, buffer_size);
> in_req->length = buffer_size;
> + debug("Transferring 0x%x bytes\n", buffer_size);
> usb_ep_dequeue(rockusb_func->in_ep, in_req);
> ret = usb_ep_queue(rockusb_func->in_ep, in_req, 0);
> if (ret)
> @@ -434,6 +435,79 @@ static unsigned int rx_bytes_expected(struct usb_ep *ep)
> return rx_remain;
> }
>
> +/* usb_request complete call back to handle upload image */
> +static void tx_handler_ul_image(struct usb_ep *ep, struct usb_request *req)
Could you use another name like '_rl_' instead of '_ul_', and since
there is a prefix 'tx',
maybe we don't need this '_ul_'? Because there is a rockusb cmd 'UL' or
'ul' means
'upgrade loader'.
> +{
> +#define RBUFFER_SIZE 4096
You can use the same size for TX and RX buffer.
BTW: I don't like the design of the return value here, there should
always have return
value instead of void, many error cat may happen during the TX.
Thanks,
- Kever
> + ALLOC_CACHE_ALIGN_BUFFER(char, rbuffer, RBUFFER_SIZE);
> + struct f_rockusb *f_rkusb = get_rkusb();
> + struct usb_request *in_req = rockusb_func->in_req;
> + int ret;
> +
> + if (!f_rkusb->desc) {
> + char *type = f_rkusb->dev_type;
> + int index = f_rkusb->dev_index;
> +
> + f_rkusb->desc = blk_get_dev(type, index);
> + if (!f_rkusb->desc ||
> + f_rkusb->desc->type == DEV_TYPE_UNKNOWN) {
> + puts("invalid mmc device\n");
> + rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_FAIL,
> + USB_BULK_CS_WRAP_LEN);
> + return;
> + }
> + }
> +
> + /* Print error status of previous transfer */
> + if (req->status)
> + debug("status: %d ep '%s' trans: %d len %d\n", req->status,
> + ep->name, req->actual, req->length);
> +
> + /* On transfer complete reset in_req and feedback host with CSW_GOOD */
> + if (f_rkusb->ul_bytes >= f_rkusb->ul_size) {
> + in_req->length = 0;
> + in_req->complete = rockusb_complete;
> +
> + rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_GOOD,
> + USB_BULK_CS_WRAP_LEN);
> + return;
> + }
> +
> + /* Proceed with current chunk */
> + unsigned int transfer_size = f_rkusb->ul_size - f_rkusb->ul_bytes;
> +
> + if (transfer_size > RBUFFER_SIZE)
> + transfer_size = RBUFFER_SIZE;
> + /* Read at least one block */
> + unsigned int blkcount = (transfer_size + 511) / 512;
> +
> + debug("ul %x bytes, %x blks, read lba %x, ul_size:%x, ul_bytes:%x, ",
> + transfer_size, blkcount, f_rkusb->lba,
> + f_rkusb->ul_size, f_rkusb->ul_bytes);
> +
> + int blks = blk_dread(f_rkusb->desc, f_rkusb->lba, blkcount, rbuffer);
> +
> + if (blks != blkcount) {
> + printf("failed reading from device %s: %d\n",
> +f_rkusb->dev_type, f_rkusb->dev_index);
> + rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_FAIL,
> + USB_BULK_CS_WRAP_LEN);
> + return;
> + }
> + f_rkusb->lba += blkcount;
> + f_rkusb->ul_bytes += transfer_size;
> +
> + /* Proceed with USB request */
> + memcpy(in_req->buf, rbuffer, transfer_size);
> + in_req->length = transfer_size;
> + in_req->complete = tx_handler_ul_image;
> + printf("Uploading 0x%x bytes\n", transfer_size);
> + usb_ep_dequeue(rockusb_func->in_ep, in_req);
> + ret = usb_ep_queue(rockusb_func->in_ep, in_req, 0);
> + if (ret)
> + printf("Error %d on queue\n", ret);
> +}
> +
> /* usb_request complete
Re: [U-Boot] [PATCH 0/7] Improve rockusb support in U-Boot
Hi Alberto, Thanks for your patches, and I'm so glad for people using rockusb and try to improve it. You can reference to rockchip source code here: https://github.com/rockchip-linux/u-boot/blob/release/drivers/usb/gadget/f_rockusb.c We use msc as base framework instead of dfu because of the big performance improvement, and the cmd handling part will be the same. PS: Yes, rockusb is available for all Rockchip's SoCs. Thanks, - Kever On 07/04/2018 03:02 AM, Alberto Panizzo wrote: > rockusb protocol has been introduced by Eddie Cai in U-Boot mainline > allowing to write internal eMMC of RK3288 based boards (and potentially > all other Rockchip's CPUs). > > On workstation side the open source project rkdeveloptool do implement > the rockusb protocol. You can find it on GitHub here: > https://github.com/rockchip-linux/rkdeveloptool > > This patchset increase the supported functionalities on target side > allowing developers to: > - Read flash: rl command of rkdeveloptool > - Read chip version: rci command of rkdeveloptool > - Complete the write cycle implementing block erase > - Improve read/write speed > > Alberto Panizzo (7): > usb: rockchip: fix command failed on host side due to missing data > usb: rockchip: implement skeleton for K_FW_GET_CHIP_VER command > rockchip: rk3288: implement reading chip version from bootrom code > usb: rockchip: implement K_FW_LBA_READ_10 command > usb: rockchip: implement K_FW_LBA_ERASE_10 command > usb: rockchip: be quiet on serial port while transferring data > usb: rockchip: boost up write speed from 4MB/s to 15MB/s > > arch/arm/include/asm/arch-rockchip/f_rockusb.h | 6 +- > arch/arm/mach-rockchip/rk3288/Makefile | 1 + > arch/arm/mach-rockchip/rk3288/rockusb_rk3288.c | 30 > drivers/usb/gadget/f_rockusb.c | 225 > - > 4 files changed, 253 insertions(+), 9 deletions(-) > create mode 100644 arch/arm/mach-rockchip/rk3288/rockusb_rk3288.c > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2] sunxi: A64: OHCI: prevent turning off shared USB clock
On the A64 the clock for the first USB controller is actually the parent
of the clock for the second controller, so turning them off in that order
makes the system hang.
Fix this by only turning off *both* clocks when the *last* OHCI controller
is brought down. This covers the case when only one controller is used.
Signed-off-by: Andre Przywara
---
Hi,
as requested by Marek, a second version to address the problem of only
one controller instantiated. I tested all cases:
- only [EO]HCI1 enabled (current U-Boot master DT)
- both controllers enabled (mainline Linux DT)
- only [EO]HCI0 enabled (DT hack)
In all cases the system booted without hanging, plus I confirmed that
the USB clocks were disabled in all cases (early in the kernel).
Cheers,
Andre.
P.S. I found the MMC0, EMAC and USB-OTG AHB gates and resets still running,
but this is an unrelated issue and no regression. Just in case somebody
feels bored ...
drivers/usb/host/ohci-sunxi.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
index 0ddbdbe460..bb3c2475df 100644
--- a/drivers/usb/host/ohci-sunxi.c
+++ b/drivers/usb/host/ohci-sunxi.c
@@ -44,6 +44,8 @@ struct ohci_sunxi_priv {
const struct ohci_sunxi_cfg *cfg;
};
+static fdt_addr_t last_ohci_addr = 0;
+
static int ohci_usb_probe(struct udevice *dev)
{
struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
@@ -53,6 +55,9 @@ static int ohci_usb_probe(struct udevice *dev)
u8 reg_mask = 0;
int phys, ret;
+ if ((fdt_addr_t)regs > last_ohci_addr)
+ last_ohci_addr = (fdt_addr_t)regs;
+
priv->cfg = (const struct ohci_sunxi_cfg *)dev_get_driver_data(dev);
priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
if (IS_ERR(priv->ccm))
@@ -114,6 +119,7 @@ no_phy:
static int ohci_usb_remove(struct udevice *dev)
{
struct ohci_sunxi_priv *priv = dev_get_priv(dev);
+ fdt_addr_t base_addr = devfdt_get_addr(dev);
int ret;
if (generic_phy_valid(>phy)) {
@@ -130,7 +136,18 @@ static int ohci_usb_remove(struct udevice *dev)
if (priv->cfg->has_reset)
clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask);
- clrbits_le32(>ccm->usb_clk_cfg, priv->usb_gate_mask);
+ /*
+* On the A64 CLK_USB_OHCI0 is the parent of CLK_USB_OHCI1, so
+* we have to wait with bringing down any clock until the last
+* OHCI controller is removed.
+*/
+ if (!priv->cfg->extra_usb_gate_mask || base_addr == last_ohci_addr) {
+ u32 usb_gate_mask = priv->usb_gate_mask;
+
+ usb_gate_mask |= priv->cfg->extra_usb_gate_mask;
+ clrbits_le32(>ccm->usb_clk_cfg, usb_gate_mask);
+ }
+
clrbits_le32(>ccm->ahb_gate0, priv->ahb_gate_mask);
return 0;
--
2.14.4
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Re: [U-Boot] persistent logo on LCD on imx6ull
Hi otavio
On Wed., 4 Jul. 2018, 7:03 pm Michael Nazzareno Trimarchi, <
mich...@amarulasolutions.com> wrote:
> Hi
>
>
> On Wed, Jul 4, 2018 at 6:45 PM, Otavio Salvador
> wrote:
> > On Tue, Jul 3, 2018 at 6:20 AM, Michael Nazzareno Trimarchi
> > wrote:
> >> Ok I have fixed it :)
> >
> > Mind to share how?
>
I will change those patches soon to share memory up to the kernel. I have
already implement something there but not really happy.
Michael
>
> commit 9c066153a6876b1ae57117d99ad228a07873eb75
> Author: Michael Trimarchi
> Date: Wed Jul 4 15:50:41 2018 +0200
>
> spl: Make the spl_nand_load_image static
>
> Change-Id: I1c2f71e75fc052c54fc94b13d0942cb9e75ff1c6
> Signed-off-by: Michael Trimarchi
>
> diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
> index b96fce2..527cfc0 100644
> --- a/common/spl/spl_nand.c
> +++ b/common/spl/spl_nand.c
> @@ -12,7 +12,7 @@
> #include
>
> #if defined(CONFIG_SPL_NAND_RAW_ONLY)
> -int spl_nand_load_image(struct spl_image_info *spl_image,
> +static int spl_nand_load_image(struct spl_image_info *spl_image,
> struct spl_boot_device *bootdev)
> {
> nand_init();
> michael@panicking ~/work/amarula/w_and_h/dist/u-boot $ git show HEAD^^^
> commit 110e91ee5a837684d99778d72a3c9aec5953baf6
> Author: Michael Trimarchi
> Date: Wed Jul 4 13:03:23 2018 +0200
>
> video: mxsfb: Allocate a memory align to the page
>
> We want to allocate memory align at page size because we then
> need to reserve it to linux and simple frame buffer. The
> lcd should not be powerdown if simple frame buffer configuration
> is active
>
> Change-Id: I1d139364d91686b12cd607821dcc1b84b0dc0b69
> Signed-off-by: Michael Trimarchi
>
> diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
> index 4011066..0aaf9f0 100644
> --- a/drivers/video/cfb_console.c
> +++ b/drivers/video/cfb_console.c
> @@ -2107,6 +2107,12 @@ static int cfg_video_init(void)
> video_console_address = video_fb_address;
> #endif
>
> + env_set_hex("video_address", (unsigned long)VIDEO_FB_ADRS);
> + env_set_hex("video_memory_size", (unsigned long)
> roundup(VIDEO_SIZE, PAGE_SIZE));
> + env_set_hex("video_stride", (unsigned long) VIDEO_LINE_LEN);
> + env_set_hex("video_width", (unsigned long) VIDEO_COLS);
> + env_set_hex("video_height", (unsigned long) VIDEO_ROWS);
> +
> /* Initialize the console */
> console_col = 0;
> console_row = 0;
> diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
> index 4e3e3d7..254f230 100644
> --- a/drivers/video/mxsfb.c
> +++ b/drivers/video/mxsfb.c
> @@ -7,6 +7,7 @@
> #include
> #include
> #include
> +#include
>
> #include
> #include
> @@ -145,6 +146,7 @@ static void mxs_lcd_init(GraphicDevice *panel,
> writel(LCDIF_CTRL_RUN, >hw_lcdif_ctrl_set);
> }
>
> +#ifndef CONFIG_VIDEO_DT_SIMPLEFB
> void lcdif_power_down(void)
> {
> struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs
> *)MXS_LCDIF_BASE;
> @@ -164,6 +166,9 @@ void lcdif_power_down(void)
> }
> mxs_reset_block((struct mxs_register_32
> *)>hw_lcdif_ctrl_reg);
> }
> +#else
> +void lcdif_power_down(void) {};
> +#endif
>
> void *video_hw_init(void)
> {
> @@ -214,8 +219,8 @@ void *video_hw_init(void)
> panel.memSize = mode.xres * mode.yres * panel.gdfBytesPP;
>
> /* Allocate framebuffer */
> - fb = memalign(ARCH_DMA_MINALIGN,
> - roundup(panel.memSize, ARCH_DMA_MINALIGN));
> + fb = memalign(PAGE_SIZE,
> + roundup(panel.memSize, PAGE_SIZE));
> if (!fb) {
> printf("MXSFB: Error allocating framebuffer!\n");
> return NULL;
> (END)
> {
> struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs
> *)MXS_LCDIF_BASE;
> @@ -164,6 +166,9 @@ void lcdif_power_down(void)
> }
> mxs_reset_block((struct mxs_register_32
> *)>hw_lcdif_ctrl_reg);
> }
> +#else
> +void lcdif_power_down(void) {};
> +#endif
>
> void *video_hw_init(void)
> {
> @@ -214,8 +219,8 @@ void *video_hw_init(void)
> panel.memSize = mode.xres * mode.yres * panel.gdfBytesPP;
>
> /* Allocate framebuffer */
> - fb = memalign(ARCH_DMA_MINALIGN,
> - roundup(panel.memSize, ARCH_DMA_MINALIGN));
> + fb = memalign(PAGE_SIZE,
> + roundup(panel.memSize, PAGE_SIZE));
> if (!fb) {
> printf("MXSFB: Error allocating framebuffer!\n");
> return NULL;
>
> The I need to trick the dts ;)
>
> This should be more then enough ;).
>
> Michael
>
> >
> > --
> > Otavio Salvador O.S. Systems
> > http://www.ossystems.com.brhttp://code.ossystems.com.br
> > Mobile: +55 (53) 9 9981-7854 Mobile: +1 (347) 903-9750
>
>
>
> --
> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> | COO - Founder
Re: [U-Boot] [PATCH 3/5] efi_loader: complete implementation of GetTime()
On 04.07.18 21:26, Heinrich Schuchardt wrote:
> On 07/04/2018 05:46 PM, Alexander Graf wrote:
>> On 06/30/2018 04:52 AM, Heinrich Schuchardt wrote:
>>> Implement the missing parts of the GetTime() runtime service.
>>>
>>> Support CONFIG_DM_RTC=n.
>>> Fill seconds.
>>> Fill daylight saving time flag correctly.
>>> Provide dummy values for capabilities.
>>>
>>> Signed-off-by: Heinrich Schuchardt
>>> ---
>>> lib/efi_loader/efi_runtime.c | 101 +--
>>> 1 file changed, 86 insertions(+), 15 deletions(-)
>>>
>>> diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
>>> index 5ec17867fb..20eb3f373d 100644
>>> --- a/lib/efi_loader/efi_runtime.c
>>> +++ b/lib/efi_loader/efi_runtime.c
>>> @@ -10,6 +10,7 @@
>>> #include
>>> #include
>>> #include
>>> +#include
>>> #include
>>> /* For manual relocation support */
>>> @@ -117,24 +118,86 @@ static void EFIAPI efi_reset_system_boottime(
>>> while (1) { }
>>> }
>>> +int __weak rtc_get(struct rtc_time *tm)
>>> +{
>>> + return 1;
>>> +}
>>> +
>>> +#if defined(CONFIG_SYS_RTC_BUS_NUM) && !defined(CONFIG_DM_RTC)
>>> +/**
>>> + * efi_set_rtc_i2c_bus - select I2C bus for real time clock
>>> + *
>>> + * @bus: bus to select, -1 for default
>>> + * Return Value: previously selected bus
>>> + */
>>> +static int efi_set_rtc_i2c_bus(int bus)
>>> +{
>>> + int old_bus;
>>> +
>>> + if (bus < 0)
>>> + bus = CONFIG_SYS_RTC_BUS_NUM;
>>> +
>>> +#ifdef CONFIG_SYS_I2C
>>> + old_bus = i2c_get_bus_num();
>>> + i2c_set_bus_num(bus);
>>> +#else
>>> + old_bus = I2C_GET_BUS();
>>> + I2C_SET_BUS(bus);
>>> +#endif
>>> + return old_bus;
>>> +}
>>> +#endif /* CONFIG_SYS_RTC_BUS_NUM && !CONFIG_DM_RTC */
>>> +
>>> +/**
>>> + * efi_get_time_boottime - get current time
>>> + *
>>> + * This function implements the GetTime runtime service.
>>> + * See the Unified Extensible Firmware Interface (UEFI) specification
>>> + * for details.
>>> + *
>>> + * @time: pointer to structure to receive current time
>>> + * @capabilities: pointer to structure to receive RTC properties
>>> + * Return Value: status code
>>> + */
>>> static efi_status_t EFIAPI efi_get_time_boottime(
>>> struct efi_time *time,
>>> struct efi_time_cap *capabilities)
>>> {
>>> -#if defined(CONFIG_CMD_DATE) && defined(CONFIG_DM_RTC)
>>> - struct rtc_time tm;
>>> + efi_status_t ret = EFI_SUCCESS;
>>> int r;
>>> - struct udevice *dev;
>>> + struct rtc_time tm;
>>> EFI_ENTRY("%p %p", time, capabilities);
>>> - r = uclass_get_device(UCLASS_RTC, 0, );
>>> - if (r)
>>> - return EFI_EXIT(EFI_DEVICE_ERROR);
>>> + if (!time) {
>>> + ret = EFI_INVALID_PARAMETER;
>>> + goto out;
>>> + }
>>> - r = dm_rtc_get(dev, );
>>> - if (r)
>>> - return EFI_EXIT(EFI_DEVICE_ERROR);
>>> +#ifdef CONFIG_DM_RTC
>>> + {
>>> + struct udevice *dev;
>>> +
>>> + r = uclass_get_device(UCLASS_RTC, 0, );
>>> + if (!r)
>>> + r = dm_rtc_get(dev, );
>>> + }
>>> +#else
>>> + {
>>> +#ifdef CONFIG_SYS_RTC_BUS_NUM
>>> + int oldbus = efi_set_rtc_i2c_bus(-1);
>>
>> Please make up your mind whether you want an #ifdef in this code path or
>> not :). So IMHO you should either do the bus setting with ifdefs, but
>> then explicitly pass CONFIG_SYS_RTC_BUS_NUM as parameter or do it all
>> without ifdefs and just #ifdef out the body of efi_set_rtc_i2c_bus().
>
> The first thing to decide is if we want to support non-DM RTC at all.
> What is your oppinion? - I put in the support for non-DM because I did
> not see that QEMU was using a device tree. But now Takahiro has set up
> the QEMU RTC driver as DM driver.
I think the RTC is a leaf enough use case to make DM mandatory on it.
> If CONFIG_SYS_RTC_BUS_NUM is defined or not is independent of
> CONFIG_DM_RTC, so we cannot unconditionally pass CONFIG_SYS_RTC_BUS_NUM
> here.
Yes, what I was trying to say is that this should either be:
{
#ifdef CONFIG_SYS_RTC_BUS_NUM
int oldbus = efi_set_rtc_i2c_bus(CONFIG_SYS_RTC_BUS_NUM);
#endif
r = rtc_get();
#ifdef CONFIG_SYS_RTC_BUS_NUM
efi_set_rtc_i2c_bus(oldbus);
#endif
}
or
{
int oldbus = efi_set_rtc_i2c_bus(-1);
r = rtc_get();
efi_set_rtc_i2c_bus(oldbus);
}
but passing in -1 when you are already in an #ifdef path that only
exists when CONFIG_SYS_RTC_BUS_NUM is available feels ... weird.
> Yes I can move the ifdefs to the body efi_set_rtc_i2c_bus() at the
> expense of some superfluous code being generated in case the function is
> not needed.
It will get optimized away :).
> But please, answer the above question first.
I don't mind it being DM only, as indicated above.
Alex
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[U-Boot] [PATCH 5/5] rk3288: vyasa: Fixup indentation
Indent file using tabs
Signed-off-by: Alberto Panizzo
---
board/amarula/vyasa-rk3288/vyasa-rk3288.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/amarula/vyasa-rk3288/vyasa-rk3288.c
b/board/amarula/vyasa-rk3288/vyasa-rk3288.c
index 2b509f5..4367ed2 100644
--- a/board/amarula/vyasa-rk3288/vyasa-rk3288.c
+++ b/board/amarula/vyasa-rk3288/vyasa-rk3288.c
@@ -17,10 +17,10 @@ void board_boot_order(u32 *spl_boot_list)
int spl_start_uboot(void)
{
-/* break into full u-boot on 'c' */
-if (serial_tstc() && serial_getc() == 'c')
-return 1;
+ /* break into full u-boot on 'c' */
+ if (serial_tstc() && serial_getc() == 'c')
+ return 1;
-return 0;
+ return 0;
}
#endif
--
2.7.4
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[U-Boot] [PATCH 4/5] rk3288: vyasa: Allow booting from internal eMMC
Keeping SD-Card as priority for easy board recovery Signed-off-by: Alberto Panizzo --- include/configs/vyasa-rk3288.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h index 382fdac..4114bf0 100644 --- a/include/configs/vyasa-rk3288.h +++ b/include/configs/vyasa-rk3288.h @@ -15,6 +15,7 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ + func(MMC, mmc, 0) #define CONFIG_SYS_MMC_ENV_DEV 1 #undef CONFIG_CMD_USB_MASS_STORAGE -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 3/5] rockchip: rk3288-vyasa: increase heap space after relocation
Before relocation (TPL or early SPL) we are executing in internal SDRAM with limited space. As soon as SPL is relocated increase malloc size, big enough to manage loading kernel images from eMMC Signed-off-by: Alberto Panizzo --- configs/vyasa-rk3288_defconfig | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index e721d07..ed5b7c5 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -3,19 +3,21 @@ CONFIG_ARM=y # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x0010 -CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x4000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_VYASA_RK3288=y CONFIG_DEBUG_UART_BASE=0xff69 CONFIG_DEBUG_UART_CLOCK=2400 -CONFIG_SPL_STACK_R_ADDR=0x8 +CONFIG_SPL_STACK_R_ADDR=0x18 CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa" CONFIG_DEBUG_UART=y CONFIG_SILENT_CONSOLE=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/5] mmc: dw_mmc: increase cmd timeout to fix eMMC enumeration error
Errors are reported to happen running U-Boot after SPL kernel load failure. In this case mmc host is not clean, and card enumeration timeouts do happen frequently. Signed-off-by: Alberto Panizzo --- drivers/mmc/dw_mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 0126563..b6890d3 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -199,7 +199,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, (1 + (data ? DIV_ROUND_UP(data->blocks, 8) : 0))); int ret = 0, flags = 0, i; unsigned int timeout = 500; - u32 retry = 10; + u32 retry = 100; u32 mask, ctrl; ulong start = get_timer(0); struct bounce_buffer bbstate; -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/5] mmc: dw_mmc: prevent silent memory corruption when stack and heap are too small
ALLOC_CACHE_ALIGN_BUFFER was called here in a way to alloc in stack a
possible huge quantity of memory depending on data transer size.
Es: loading kernel 8MB from eMMC we have
Transfer size: 0x80
Block size: 0x200
Transfer blocks: 0x4000
struct size: 0x10
Stack allocation: ((0x200 / 8) + 1) * 0x10 = 0x8010 (~32KB)
Since this allocation is done on stack, there is no current way to get
an error on stack memory limit exceeded, overlapping heap space on
environments with very strict stack + heap limits like TPL or SPL (where
malloc size can be 16KB).
Results are silent corruptions of heap on mmc transfer and random errors
or CPU hang.
Using malloc_cache_aligned() we will alloc slightly bigger buffers
but we do have evidence about memory allocation failure allowing developer
to recognize the issue and take actions.
Signed-off-by: Alberto Panizzo
---
drivers/mmc/dw_mmc.c | 33 +
1 file changed, 25 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 13180fc..0126563 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -194,8 +194,9 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
{
#endif
struct dwmci_host *host = mmc->priv;
- ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac, cur_idmac,
-data ? DIV_ROUND_UP(data->blocks, 8) : 0);
+ struct dwmci_idmac *cur_idmac =
+ malloc_cache_aligned(sizeof(struct dwmci_idmac) *
+ (1 + (data ? DIV_ROUND_UP(data->blocks, 8) : 0)));
int ret = 0, flags = 0, i;
unsigned int timeout = 500;
u32 retry = 10;
@@ -203,10 +204,18 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
ulong start = get_timer(0);
struct bounce_buffer bbstate;
+ if (!cur_idmac) {
+ debug("%s: Cannot allocate 0x%x bytes\n", __func__,
+ sizeof(struct dwmci_idmac) *
+ (1 + (data ? DIV_ROUND_UP(data->blocks, 8) : 0)));
+ return -ENOMEM;
+ }
+
while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) {
if (get_timer(start) > timeout) {
debug("%s: Timeout on data busy\n", __func__);
- return -ETIMEDOUT;
+ ret = -ETIMEDOUT;
+ goto free_idmac;
}
}
@@ -238,8 +247,10 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
if (data)
flags = dwmci_set_transfer_mode(host, data);
- if ((cmd->resp_type & MMC_RSP_136) && (cmd->resp_type & MMC_RSP_BUSY))
- return -1;
+ if ((cmd->resp_type & MMC_RSP_136) && (cmd->resp_type & MMC_RSP_BUSY)) {
+ ret = -EIO;
+ goto free_idmac;
+ }
if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
flags |= DWMCI_CMD_ABORT_STOP;
@@ -272,7 +283,8 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
if (i == retry) {
debug("%s: Timeout.\n", __func__);
- return -ETIMEDOUT;
+ ret = -ETIMEDOUT;
+ goto free_idmac;
}
if (mask & DWMCI_INTMSK_RTO) {
@@ -285,10 +297,12 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
* CMD8, please keep that in mind.
*/
debug("%s: Response Timeout.\n", __func__);
- return -ETIMEDOUT;
+ ret = -ETIMEDOUT;
+ goto free_idmac;
} else if (mask & DWMCI_INTMSK_RE) {
debug("%s: Response Error.\n", __func__);
- return -EIO;
+ ret = -EIO;
+ goto free_idmac;
}
@@ -317,6 +331,9 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd
*cmd,
udelay(100);
+free_idmac:
+ free(cur_idmac);
+
return ret;
}
--
2.7.4
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[U-Boot] [PATCH 0/5] Fix Falcon Boot from internal eMMC on RK3288 Vyasa
This patchest fixes booting Linux Kernel in falcon mode for Vyasa board. What happen is that CPU hangs on SPL while loading kernel from internal eMMC. This issue has been already addressed here [1] but with a wrong approach: it is a clear case of memory corruption and first patch of this serie helps a lot in profiling the same issue in the future. [1]: https://patchwork.ozlabs.org/patch/833821/ Alberto Panizzo (5): mmc: dw_mmc: prevent silent memory corruption when stack and heap are too small mmc: dw_mmc: increase cmd timeout to fix eMMC enumeration error rockchip: rk3288-vyasa: increase heap space after relocation rk3288: vyasa: Allow booting from internal eMMC rk3288: vyasa: Fixup indentation board/amarula/vyasa-rk3288/vyasa-rk3288.c | 8 +++ configs/vyasa-rk3288_defconfig| 8 --- drivers/mmc/dw_mmc.c | 35 +++ include/configs/vyasa-rk3288.h| 1 + 4 files changed, 36 insertions(+), 16 deletions(-) -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 3/5] efi_loader: complete implementation of GetTime()
On 07/04/2018 05:46 PM, Alexander Graf wrote:
> On 06/30/2018 04:52 AM, Heinrich Schuchardt wrote:
>> Implement the missing parts of the GetTime() runtime service.
>>
>> Support CONFIG_DM_RTC=n.
>> Fill seconds.
>> Fill daylight saving time flag correctly.
>> Provide dummy values for capabilities.
>>
>> Signed-off-by: Heinrich Schuchardt
>> ---
>> lib/efi_loader/efi_runtime.c | 101 +--
>> 1 file changed, 86 insertions(+), 15 deletions(-)
>>
>> diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
>> index 5ec17867fb..20eb3f373d 100644
>> --- a/lib/efi_loader/efi_runtime.c
>> +++ b/lib/efi_loader/efi_runtime.c
>> @@ -10,6 +10,7 @@
>> #include
>> #include
>> #include
>> +#include
>> #include
>> /* For manual relocation support */
>> @@ -117,24 +118,86 @@ static void EFIAPI efi_reset_system_boottime(
>> while (1) { }
>> }
>> +int __weak rtc_get(struct rtc_time *tm)
>> +{
>> + return 1;
>> +}
>> +
>> +#if defined(CONFIG_SYS_RTC_BUS_NUM) && !defined(CONFIG_DM_RTC)
>> +/**
>> + * efi_set_rtc_i2c_bus - select I2C bus for real time clock
>> + *
>> + * @bus: bus to select, -1 for default
>> + * Return Value: previously selected bus
>> + */
>> +static int efi_set_rtc_i2c_bus(int bus)
>> +{
>> + int old_bus;
>> +
>> + if (bus < 0)
>> + bus = CONFIG_SYS_RTC_BUS_NUM;
>> +
>> +#ifdef CONFIG_SYS_I2C
>> + old_bus = i2c_get_bus_num();
>> + i2c_set_bus_num(bus);
>> +#else
>> + old_bus = I2C_GET_BUS();
>> + I2C_SET_BUS(bus);
>> +#endif
>> + return old_bus;
>> +}
>> +#endif /* CONFIG_SYS_RTC_BUS_NUM && !CONFIG_DM_RTC */
>> +
>> +/**
>> + * efi_get_time_boottime - get current time
>> + *
>> + * This function implements the GetTime runtime service.
>> + * See the Unified Extensible Firmware Interface (UEFI) specification
>> + * for details.
>> + *
>> + * @time: pointer to structure to receive current time
>> + * @capabilities: pointer to structure to receive RTC properties
>> + * Return Value: status code
>> + */
>> static efi_status_t EFIAPI efi_get_time_boottime(
>> struct efi_time *time,
>> struct efi_time_cap *capabilities)
>> {
>> -#if defined(CONFIG_CMD_DATE) && defined(CONFIG_DM_RTC)
>> - struct rtc_time tm;
>> + efi_status_t ret = EFI_SUCCESS;
>> int r;
>> - struct udevice *dev;
>> + struct rtc_time tm;
>> EFI_ENTRY("%p %p", time, capabilities);
>> - r = uclass_get_device(UCLASS_RTC, 0, );
>> - if (r)
>> - return EFI_EXIT(EFI_DEVICE_ERROR);
>> + if (!time) {
>> + ret = EFI_INVALID_PARAMETER;
>> + goto out;
>> + }
>> - r = dm_rtc_get(dev, );
>> - if (r)
>> - return EFI_EXIT(EFI_DEVICE_ERROR);
>> +#ifdef CONFIG_DM_RTC
>> + {
>> + struct udevice *dev;
>> +
>> + r = uclass_get_device(UCLASS_RTC, 0, );
>> + if (!r)
>> + r = dm_rtc_get(dev, );
>> + }
>> +#else
>> + {
>> +#ifdef CONFIG_SYS_RTC_BUS_NUM
>> + int oldbus = efi_set_rtc_i2c_bus(-1);
>
> Please make up your mind whether you want an #ifdef in this code path or
> not :). So IMHO you should either do the bus setting with ifdefs, but
> then explicitly pass CONFIG_SYS_RTC_BUS_NUM as parameter or do it all
> without ifdefs and just #ifdef out the body of efi_set_rtc_i2c_bus().
The first thing to decide is if we want to support non-DM RTC at all.
What is your oppinion? - I put in the support for non-DM because I did
not see that QEMU was using a device tree. But now Takahiro has set up
the QEMU RTC driver as DM driver.
If CONFIG_SYS_RTC_BUS_NUM is defined or not is independent of
CONFIG_DM_RTC, so we cannot unconditionally pass CONFIG_SYS_RTC_BUS_NUM
here.
Yes I can move the ifdefs to the body efi_set_rtc_i2c_bus() at the
expense of some superfluous code being generated in case the function is
not needed.
But please, answer the above question first.
Best regards
Heinrich
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Re: [U-Boot] [PATCH 2/5] efi_loader: remove unused efi_get_time_init()
On 07/04/2018 05:15 PM, Alexander Graf wrote: > On 06/30/2018 04:52 AM, Heinrich Schuchardt wrote: >> Remove unused function efi_get_time_init(). >> >> Initialization of the RTC has to be done in board bring up not in the EFI >> subsystem. >> >> Signed-off-by: Heinrich Schuchardt > > Are there no EFI objects for RTC devices? These would have to get > initialized from efi_init_obj_list(). I am not aware of any EFI object relating to real time clocks. The RTC is only accessed via the runtime services. See the UEFI spec. Best regards Heinrich ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 6/8] usb: rockchip: be quiet on serial port while transferring data
While downloading or uploading megabytes of data we had thousands of
printf in console like:
transfer 0x1 bytes done
OR
Uploading 0x1000 bytes
This because transfers are chunked and there is no way on target
side to know the overall transfer size (to print one string per
overall transfer).
All these prints on serial console do slow down significantly the
transfer and does not offer a significant information to the
developer: rkdeveloptool and Rockchip original tool do use small
chunks read/writes on big transfers. This allows on workstation
to print percentage of transfer complete and as well offers to
developer the information about: transfer is running OK.
On error, either the percentage will stop or an error will be shown
on workstation console.
Signed-off-by: Alberto Panizzo
---
drivers/usb/gadget/f_rockusb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 6d4b955..6f97646 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -487,7 +487,7 @@ static void tx_handler_ul_image(struct usb_ep *ep, struct
usb_request *req)
memcpy(in_req->buf, rbuffer, transfer_size);
in_req->length = transfer_size;
in_req->complete = tx_handler_ul_image;
- printf("Uploading 0x%x bytes\n", transfer_size);
+ debug("Uploading 0x%x bytes\n", transfer_size);
usb_ep_dequeue(rockusb_func->in_ep, in_req);
ret = usb_ep_queue(rockusb_func->in_ep, in_req, 0);
if (ret)
@@ -549,7 +549,7 @@ static void rx_handler_dl_image(struct usb_ep *ep, struct
usb_request *req)
req->complete = rx_handler_command;
req->length = EP_BUFFER_SIZE;
f_rkusb->buf = f_rkusb->buf_head;
- printf("transfer 0x%x bytes done\n", f_rkusb->dl_size);
+ debug("transfer 0x%x bytes done\n", f_rkusb->dl_size);
f_rkusb->dl_size = 0;
rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_GOOD,
USB_BULK_CS_WRAP_LEN);
--
2.7.4
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[U-Boot] [PATCH v2 8/8] usb: rockchip: fix printing csw debug info
Workstation tool was happy while console on device were printing random numbers.. Signed-off-by: Alberto Panizzo --- drivers/usb/gadget/f_rockusb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c index 6f97646..89e4516 100644 --- a/drivers/usb/gadget/f_rockusb.c +++ b/drivers/usb/gadget/f_rockusb.c @@ -384,7 +384,7 @@ static int rockusb_tx_write_csw(u32 tag, int residue, u8 status, int size) csw->residue = cpu_to_be32(residue); csw->status = status; #ifdef DEBUG - printcsw((char *)); + printcsw((char *)csw); #endif return rockusb_tx_write((char *)csw, size); } -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 5/8] usb: rockchip: implement K_FW_LBA_ERASE_10 command
This command is part of the write partition sequence performed by
rkdeveloptool: one partition is first completely erased and
than wrote.
Signed-off-by: Alberto Panizzo
---
arch/arm/include/asm/arch-rockchip/f_rockusb.h | 1 +
doc/README.rockusb | 1 +
drivers/usb/gadget/f_rockusb.c | 46 ++
3 files changed, 48 insertions(+)
diff --git a/arch/arm/include/asm/arch-rockchip/f_rockusb.h
b/arch/arm/include/asm/arch-rockchip/f_rockusb.h
index 3f2e763..9772321 100644
--- a/arch/arm/include/asm/arch-rockchip/f_rockusb.h
+++ b/arch/arm/include/asm/arch-rockchip/f_rockusb.h
@@ -63,6 +63,7 @@ K_FW_LOW_FORMAT = 0x1C,
K_FW_SET_RESET_FLAG = 0x1E,
K_FW_SPI_READ_10 = 0x21,
K_FW_SPI_WRITE_10 = 0x22,
+K_FW_LBA_ERASE_10 = 0x25,
K_FW_SESSION = 0X30,
K_FW_RESET = 0xff,
diff --git a/doc/README.rockusb b/doc/README.rockusb
index 7f58296..66437e1 100644
--- a/doc/README.rockusb
+++ b/doc/README.rockusb
@@ -49,6 +49,7 @@ Current set of rkdeveloptool commands supported:
- td : Test Device Ready
- rl : Read blocks using LBA
- wl : Write blocks using LBA
+- wlx: Write partition
To do
-
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 4a62e1b..6d4b955 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -689,6 +689,48 @@ static void cb_write_lba(struct usb_ep *ep, struct
usb_request *req)
}
}
+static void cb_erase_lba(struct usb_ep *ep, struct usb_request *req)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+sizeof(struct fsg_bulk_cb_wrap));
+ struct f_rockusb *f_rkusb = get_rkusb();
+ int sector_count, lba, blks;
+
+ memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+ sector_count = (int)get_unaligned_be16(>CDB[7]);
+ lba = get_unaligned_be32(>CDB[2]);
+ f_rkusb->tag = cbw->tag;
+ debug("require erase %x sectors from lba %x\n",
+ sector_count, lba);
+
+ if (!f_rkusb->desc) {
+ char *type = f_rkusb->dev_type;
+ int index = f_rkusb->dev_index;
+
+ f_rkusb->desc = blk_get_dev(type, index);
+ if (!f_rkusb->desc ||
+ f_rkusb->desc->type == DEV_TYPE_UNKNOWN) {
+ puts("invalid mmc device\n");
+ rockusb_tx_write_csw(f_rkusb->tag,
+ cbw->data_transfer_length, CSW_FAIL,
+ USB_BULK_CS_WRAP_LEN);
+ return;
+ }
+ }
+ blks = blk_derase(f_rkusb->desc, lba, sector_count);
+ if (blks != sector_count) {
+ printf("failed erasing device %s: %d\n", f_rkusb->dev_type,
+ f_rkusb->dev_index);
+ rockusb_tx_write_csw(f_rkusb->tag,
+ cbw->data_transfer_length, CSW_FAIL,
+ USB_BULK_CS_WRAP_LEN);
+ return;
+ }
+
+ rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD,
+USB_BULK_CS_WRAP_LEN);
+}
+
void __weak rkusb_set_reboot_flag(int flag)
{
struct f_rockusb *f_rkusb = get_rkusb();
@@ -821,6 +863,10 @@ static const struct cmd_dispatch_info cmd_dispatch_info[]
= {
.cb = cb_not_support,
},
{
+ .cmd = K_FW_LBA_ERASE_10,
+ .cb = cb_erase_lba,
+ },
+ {
.cmd = K_FW_SESSION,
.cb = cb_not_support,
},
--
2.7.4
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[U-Boot] [PATCH v2 3/8] rockchip: rk3288: implement reading chip version from bootrom code
This allows rockusb code to reply correctly to K_FW_GET_CHIP_VER
command.
On RK3288 chip version is at 0x4ff0 and on tested hardware it
corresponds at the string "320A20140813V200"
Signed-off-by: Alberto Panizzo
---
arch/arm/mach-rockchip/rk3288/Makefile | 1 +
arch/arm/mach-rockchip/rk3288/rockusb_rk3288.c | 30 ++
2 files changed, 31 insertions(+)
create mode 100644 arch/arm/mach-rockchip/rk3288/rockusb_rk3288.c
diff --git a/arch/arm/mach-rockchip/rk3288/Makefile
b/arch/arm/mach-rockchip/rk3288/Makefile
index a0033a0..da0eb4a 100644
--- a/arch/arm/mach-rockchip/rk3288/Makefile
+++ b/arch/arm/mach-rockchip/rk3288/Makefile
@@ -7,3 +7,4 @@
obj-y += clk_rk3288.o
obj-y += rk3288.o
obj-y += syscon_rk3288.o
+obj-$(CONFIG_USB_FUNCTION_ROCKUSB) += rockusb_rk3288.o
diff --git a/arch/arm/mach-rockchip/rk3288/rockusb_rk3288.c
b/arch/arm/mach-rockchip/rk3288/rockusb_rk3288.c
new file mode 100644
index 000..62057c1
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3288/rockusb_rk3288.c
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Amarula Solutions
+ * Written by Alberto Panizzo
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define ROM_PHYS 0x
+
+#define ROM_CHIP_VER_ADDR_ADDR (ROM_PHYS + 0x4FF0)
+#define ROM_CHIP_VER_ADDR_SIZE 16
+
+int rk_get_bootrom_chip_version(unsigned int *chip_info, int size)
+{
+ if (!chip_info)
+ return -1;
+ if (size < ROM_CHIP_VER_ADDR_SIZE / sizeof(int))
+ return -1;
+
+ memcpy((char *)chip_info, (char *)ROM_CHIP_VER_ADDR_ADDR,
+ ROM_CHIP_VER_ADDR_SIZE);
+
+ return 0;
+}
--
2.7.4
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[U-Boot] [PATCH v2 4/8] usb: rockchip: implement K_FW_LBA_READ_10 command
This patch implement reading blocks form selected device with
LBA addressing.
Corresponding command on workstation is:
rkdeveloptool rl
While we support reading more than one blocks per K_FW_LBA_READ_10
request, rkdeveloptool and original rockchip tool do perform
chunk reads limiting the maximum size per chunk far lower
than max int values.
Signed-off-by: Alberto Panizzo
---
arch/arm/include/asm/arch-rockchip/f_rockusb.h | 3 +
doc/README.rockusb | 1 +
drivers/usb/gadget/f_rockusb.c | 101 -
3 files changed, 104 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-rockchip/f_rockusb.h
b/arch/arm/include/asm/arch-rockchip/f_rockusb.h
index 0b62771..3f2e763 100644
--- a/arch/arm/include/asm/arch-rockchip/f_rockusb.h
+++ b/arch/arm/include/asm/arch-rockchip/f_rockusb.h
@@ -27,6 +27,7 @@
*/
#define RKUSB_BUF_SIZE EP_BUFFER_SIZE * 2
+#define RKBLOCK_BUF_SIZE 4096
#define RKUSB_STATUS_IDLE 0
#define RKUSB_STATUS_CMD 1
@@ -120,6 +121,8 @@ struct f_rockusb {
unsigned int lba;
unsigned int dl_size;
unsigned int dl_bytes;
+ unsigned int ul_size;
+ unsigned int ul_bytes;
struct blk_desc *desc;
int reboot_flag;
void *buf;
diff --git a/doc/README.rockusb b/doc/README.rockusb
index 3a93edc..7f58296 100644
--- a/doc/README.rockusb
+++ b/doc/README.rockusb
@@ -47,6 +47,7 @@ Current set of rkdeveloptool commands supported:
- rfi: Read Flash Id
- rd : Reset Device
- td : Test Device Ready
+- rl : Read blocks using LBA
- wl : Write blocks using LBA
To do
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 0314ff0..4a62e1b 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -328,6 +328,7 @@ static int rockusb_tx_write(const char *buffer, unsigned
int buffer_size)
memcpy(in_req->buf, buffer, buffer_size);
in_req->length = buffer_size;
+ debug("Transferring 0x%x bytes\n", buffer_size);
usb_ep_dequeue(rockusb_func->in_ep, in_req);
ret = usb_ep_queue(rockusb_func->in_ep, in_req, 0);
if (ret)
@@ -421,6 +422,78 @@ static unsigned int rx_bytes_expected(struct usb_ep *ep)
return rx_remain;
}
+/* usb_request complete call back to handle upload image */
+static void tx_handler_ul_image(struct usb_ep *ep, struct usb_request *req)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(char, rbuffer, RKBLOCK_BUF_SIZE);
+ struct f_rockusb *f_rkusb = get_rkusb();
+ struct usb_request *in_req = rockusb_func->in_req;
+ int ret;
+
+ if (!f_rkusb->desc) {
+ char *type = f_rkusb->dev_type;
+ int index = f_rkusb->dev_index;
+
+ f_rkusb->desc = blk_get_dev(type, index);
+ if (!f_rkusb->desc ||
+ f_rkusb->desc->type == DEV_TYPE_UNKNOWN) {
+ puts("invalid mmc device\n");
+ rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_FAIL,
+USB_BULK_CS_WRAP_LEN);
+ return;
+ }
+ }
+
+ /* Print error status of previous transfer */
+ if (req->status)
+ debug("status: %d ep '%s' trans: %d len %d\n", req->status,
+ ep->name, req->actual, req->length);
+
+ /* On transfer complete reset in_req and feedback host with CSW_GOOD */
+ if (f_rkusb->ul_bytes >= f_rkusb->ul_size) {
+ in_req->length = 0;
+ in_req->complete = rockusb_complete;
+
+ rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_GOOD,
+USB_BULK_CS_WRAP_LEN);
+ return;
+ }
+
+ /* Proceed with current chunk */
+ unsigned int transfer_size = f_rkusb->ul_size - f_rkusb->ul_bytes;
+
+ if (transfer_size > RKBLOCK_BUF_SIZE)
+ transfer_size = RKBLOCK_BUF_SIZE;
+ /* Read at least one block */
+ unsigned int blkcount = (transfer_size + 511) / 512;
+
+ debug("ul %x bytes, %x blks, read lba %x, ul_size:%x, ul_bytes:%x, ",
+ transfer_size, blkcount, f_rkusb->lba,
+ f_rkusb->ul_size, f_rkusb->ul_bytes);
+
+ int blks = blk_dread(f_rkusb->desc, f_rkusb->lba, blkcount, rbuffer);
+
+ if (blks != blkcount) {
+ printf("failed reading from device %s: %d\n",
+ f_rkusb->dev_type, f_rkusb->dev_index);
+ rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_FAIL,
+USB_BULK_CS_WRAP_LEN);
+ return;
+ }
+ f_rkusb->lba += blkcount;
+ f_rkusb->ul_bytes += transfer_size;
+
+ /* Proceed with USB request */
+ memcpy(in_req->buf, rbuffer, transfer_size);
+ in_req->length = transfer_size;
+ in_req->complete = tx_handler_ul_image;
+
[U-Boot] [PATCH v2 7/8] usb: rockchip: boost up write speed from 4MB/s to 15MB/s
Speedup transfers increasing the max chunk size. Buffers are allocated with memalign thus developer is noticed when heap is full and in current configuration a buffer allocation of 64K till now is safe. Signed-off-by: Alberto Panizzo --- arch/arm/include/asm/arch-rockchip/f_rockusb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-rockchip/f_rockusb.h b/arch/arm/include/asm/arch-rockchip/f_rockusb.h index 9772321..141aae6 100644 --- a/arch/arm/include/asm/arch-rockchip/f_rockusb.h +++ b/arch/arm/include/asm/arch-rockchip/f_rockusb.h @@ -19,7 +19,7 @@ #define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_1_1 0x0040 #define TX_ENDPOINT_MAXIMUM_PACKET_SIZE 0x0040 -#define EP_BUFFER_SIZE 4096 +#define EP_BUFFER_SIZE 65536 /* * EP_BUFFER_SIZE must always be an integral multiple of maxpacket size * (64 or 512 or 1024), else we break on certain controllers like DWC3 -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 2/8] usb: rockchip: implement skeleton for K_FW_GET_CHIP_VER command
Chip Version is a string saved in BOOTROM address space Little Endian.
Ex for rk3288: 0x33323041 0x32303134 0x30383133 0x56323030
which brings: 320A20140813V200
Note that memory version do invert MSB/LSB so printing the char
buffer would show: A02341023180002V
Signed-off-by: Alberto Panizzo
---
doc/README.rockusb | 9 ++---
drivers/usb/gadget/f_rockusb.c | 44 +-
2 files changed, 49 insertions(+), 4 deletions(-)
diff --git a/doc/README.rockusb b/doc/README.rockusb
index 5405dc4..3a93edc 100644
--- a/doc/README.rockusb
+++ b/doc/README.rockusb
@@ -42,9 +42,12 @@ see doc/README.rockchip for more detail about how to get
U-Boot binary.
sudo rkdeveloptool wl 64
-There are plenty of Rockusb command. but wl(write lba) and
-rd(reboot) command. These two command can let people flash
-image to device.
+Current set of rkdeveloptool commands supported:
+- rci: Read Chip Info
+- rfi: Read Flash Id
+- rd : Reset Device
+- td : Test Device Ready
+- wl : Write blocks using LBA
To do
-
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 58e483c..0314ff0 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -523,6 +523,48 @@ static void cb_read_storage_id(struct usb_ep *ep, struct
usb_request *req)
rockusb_tx_write_str(emmc_id);
}
+int __weak rk_get_bootrom_chip_version(unsigned int *chip_info, int size)
+{
+ return 0;
+}
+
+static void cb_get_chip_version(struct usb_ep *ep, struct usb_request *req)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+sizeof(struct fsg_bulk_cb_wrap));
+ struct f_rockusb *f_rkusb = get_rkusb();
+ unsigned int chip_info[4], i;
+
+ memset(chip_info, 0, sizeof(chip_info));
+ rk_get_bootrom_chip_version(chip_info, 4);
+
+ /*
+* Chip Version is a string saved in BOOTROM address space Little Endian
+*
+* Ex for rk3288: 0x33323041 0x32303134 0x30383133 0x56323030
+* which brings: 320A20140813V200
+*
+* Note that memory version do invert MSB/LSB so printing the char
+* buffer will show: A02341023180002V
+*/
+ printf("read chip version: ");
+ for (i = 0; i < 4; i++) {
+ printf("%c%c%c%c",
+ (chip_info[i] >> 24) & 0xFF,
+ (chip_info[i] >> 16) & 0xFF,
+ (chip_info[i] >> 8) & 0xFF,
+ (chip_info[i] >> 0) & 0xFF);
+ }
+ printf("\n");
+ memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+
+ /* Prepare for sending subsequent CSW_GOOD */
+ f_rkusb->tag = cbw->tag;
+ f_rkusb->in_req->complete = tx_handler_send_csw;
+
+ rockusb_tx_write((char *)chip_info, sizeof(chip_info));
+}
+
static void cb_write_lba(struct usb_ep *ep, struct usb_request *req)
{
ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
@@ -661,7 +703,7 @@ static const struct cmd_dispatch_info cmd_dispatch_info[] =
{
},
{
.cmd = K_FW_GET_CHIP_VER,
- .cb = cb_not_support,
+ .cb = cb_get_chip_version,
},
{
.cmd = K_FW_LOW_FORMAT,
--
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[U-Boot] [PATCH v2 1/8] usb: rockchip: fix command failed on host side due to missing data
Two consecutive rockusb_tx_write without waiting for request complete
do results in transfer reset of first request and thus no or incomplete
data transfer. This because rockusb_tx_write do use just one USB request
to keep serialization.
So calls like:
rockusb_tx_write_str(emmc_id);
rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD);
was succeeding only when DEBUG was defined because the time spent
printing debug info was enough for transfer to complete.
This patch fixes the issue adding a simple request complete handler
called rockusb_tx_write_csw to be set as complete handler of in_req
when sending back simple payload + CSW replies to commands.
This new handler will always send CSW_GOOD replies because in case
of error the command callback itself must send back an error CSW as
unique reply to command.
This patch fixes execution of:
$ rkdeveloptool rfi
when DEBUG is not defined.
Signed-off-by: Alberto Panizzo
---
drivers/usb/gadget/f_rockusb.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index b8833d0..58e483c 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -388,6 +388,20 @@ static int rockusb_tx_write_csw(u32 tag, int residue, u8
status, int size)
return rockusb_tx_write((char *)csw, size);
}
+static void tx_handler_send_csw(struct usb_ep *ep, struct usb_request *req)
+{
+ struct f_rockusb *f_rkusb = get_rkusb();
+ int status = req->status;
+
+ if (status)
+ debug("status: %d ep '%s' trans: %d\n",
+ status, ep->name, req->actual);
+
+ /* Return back to default in_req complete function after sending CSW */
+ req->complete = rockusb_complete;
+ rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_GOOD, USB_BULK_CS_WRAP_LEN);
+}
+
static unsigned int rx_bytes_expected(struct usb_ep *ep)
{
struct f_rockusb *f_rkusb = get_rkusb();
@@ -496,13 +510,17 @@ static void cb_read_storage_id(struct usb_ep *ep, struct
usb_request *req)
{
ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
sizeof(struct fsg_bulk_cb_wrap));
+ struct f_rockusb *f_rkusb = get_rkusb();
char emmc_id[] = "EMMC ";
printf("read storage id\n");
memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+
+ /* Prepare for sending subsequent CSW_GOOD */
+ f_rkusb->tag = cbw->tag;
+ f_rkusb->in_req->complete = tx_handler_send_csw;
+
rockusb_tx_write_str(emmc_id);
- rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD,
-USB_BULK_CS_WRAP_LEN);
}
static void cb_write_lba(struct usb_ep *ep, struct usb_request *req)
--
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[U-Boot] [PATCH v2 0/8] Improve rockusb support in U-Boot
rockusb protocol has been introduced by Eddie Cai in U-Boot mainline allowing to write internal eMMC of RK3288 based boards (and potentially all other Rockchip's CPUs). On workstation side the open source project rkdeveloptool do implement the rockusb protocol. You can find it on GitHub here: https://github.com/rockchip-linux/rkdeveloptool This patchset increase the supported functionalities on target side allowing developers to: - Read flash: rl command of rkdeveloptool - Read chip version: rci command of rkdeveloptool - Complete the write cycle implementing block erase - Improve read/write speed Changes in v2: - Reworked patch 1/8 to obtain simpler and more logical code - Rewrote some patch messages - Updated documentation in README.rockusb patch by patch - Added patch 8/8 to fix debug prints of original code Alberto Panizzo (8): usb: rockchip: fix command failed on host side due to missing data usb: rockchip: implement skeleton for K_FW_GET_CHIP_VER command rockchip: rk3288: implement reading chip version from bootrom code usb: rockchip: implement K_FW_LBA_READ_10 command usb: rockchip: implement K_FW_LBA_ERASE_10 command usb: rockchip: be quiet on serial port while transferring data usb: rockchip: boost up write speed from 4MB/s to 15MB/s usb: rockchip: fix printing csw debug info arch/arm/include/asm/arch-rockchip/f_rockusb.h | 6 +- arch/arm/mach-rockchip/rk3288/Makefile | 1 + arch/arm/mach-rockchip/rk3288/rockusb_rk3288.c | 30 doc/README.rockusb | 11 +- drivers/usb/gadget/f_rockusb.c | 217 - 5 files changed, 255 insertions(+), 10 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3288/rockusb_rk3288.c -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2] fs: btrfs: Fix wrong comparison in logical to physical mapping
The comparison logical > item->logical + item->length in btrfs_map_logical_to_physical is wrong and should be instead logical >= item->logical + item->length For example, if item->logical = 4096 item->length = 4096 and we are looking for logical = 8192, it is not part of item (item is [4096, 8191]). But the comparison is false and we think we have found the correct item, although we should be searing in the right subtree. This fixes some bugs I encountered. Signed-off-by: Marek Behun --- fs/btrfs/chunk-map.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fs/btrfs/chunk-map.c b/fs/btrfs/chunk-map.c index beb6a4bb92..0c9a659f8f 100644 --- a/fs/btrfs/chunk-map.c +++ b/fs/btrfs/chunk-map.c @@ -78,7 +78,7 @@ u64 btrfs_map_logical_to_physical(u64 logical) if (item->logical > logical) node = node->rb_left; - else if (logical > item->logical + item->length) + else if (logical >= item->logical + item->length) node = node->rb_right; else return item->physical + logical - item->logical; -- 2.16.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] fs: btrfs: Fix wrong comparison in logical to physical mapping
On Wed, 4 Jul 2018 17:48:30 + Joakim Tjernlund wrote: > maybe logical >= item->logical + item->length ? You're right, i did it correctly in the commit message but not in the code :) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] sunxi: A64: OHCI: prevent turning off shared USB clock
On Wed, Jul 4, 2018 at 9:41 PM, Andre Przywara wrote:
> Hi,
>
> On 04/07/18 16:51, Jagan Teki wrote:
>> On Wed, Jul 4, 2018 at 8:03 PM, Andre Przywara
>> wrote:
>>> Hi,
>>>
>>> On 04/07/18 12:10, Marek Vasut wrote:
On 07/04/2018 12:03 PM, Andre Przywara wrote:
> Hi,
>
> On 04/07/18 08:14, Marek Vasut wrote:
>> On 07/04/2018 02:05 AM, Andre Przywara wrote:
>>> On the A64 the clock for the first USB controller is actually the parent
>>> of the clock for the second controller, so turning them off in that
>>> order
>>> makes the system hang.
>>> Fix this by *not* turning off any clock for OHCI0, but both clocks when
>>> OHCI1 is brought down.
>>>
>>> Signed-off-by: Andre Przywara
>>> ---
>>> Hi,
>>>
>>> this is a new approach to fix the USB hang we see with mainline U-Boot.
>>> Compared to the previous patch it just deals with the USB clock (the AHB
>>> gate was a red herring), and it eventually turns both clocks off instead
>>> of leaving them running. Please have a test on A64 boards!
>>>
>>> Cheers,
>>> Andre.
>>>
>>> drivers/usb/host/ohci-sunxi.c | 13 -
>>> 1 file changed, 12 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/usb/host/ohci-sunxi.c
>>> b/drivers/usb/host/ohci-sunxi.c
>>> index 0ddbdbe460..8f108b48a8 100644
>>> --- a/drivers/usb/host/ohci-sunxi.c
>>> +++ b/drivers/usb/host/ohci-sunxi.c
>>> @@ -114,6 +114,7 @@ no_phy:
>>> static int ohci_usb_remove(struct udevice *dev)
>>> {
>>>struct ohci_sunxi_priv *priv = dev_get_priv(dev);
>>> + fdt_addr_t base_addr = devfdt_get_addr(dev);
>>>int ret;
>>>
>>>if (generic_phy_valid(>phy)) {
>>> @@ -130,7 +131,17 @@ static int ohci_usb_remove(struct udevice *dev)
>>>
>>>if (priv->cfg->has_reset)
>>>clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask);
>>> - clrbits_le32(>ccm->usb_clk_cfg, priv->usb_gate_mask);
>>> + /*
>>> + * On the A64 CLK_USB_OHCI0 is the parent of CLK_USB_OHCI1, so
>>> + * we have to bring down none for OHCI0, but both for OHCI1.
>>> + */
>>> + if (!priv->cfg->extra_usb_gate_mask || base_addr >= SUNXI_USB2_BASE)
>>> {
>>> + u32 usb_gate_mask = priv->usb_gate_mask;
>>> +
>>> + usb_gate_mask |= priv->cfg->extra_usb_gate_mask;
>>> + clrbits_le32(>ccm->usb_clk_cfg, usb_gate_mask);
>>> + }
>>> +
>>>clrbits_le32(>ccm->ahb_gate0, priv->ahb_gate_mask);
>>>
>>>return 0;
>>>
>>
>> What about boards which only enable OHCI0 and do not enable OHCI1 ?
>
> Ah, c'mon, thanks for spoiling my short patch ;-)
> The A64 has just two USB controllers, on dedicated pins, so mostly you
> want both of them. But I see your point, the clocks would stay on if
> only the first controller is ever dealt with. Maybe we can live with
> that, at least for the next release?
> Or do you have a clever idea how to deal with that? I think it's hard to
> determine how many USB controller we have enabled?
I'd prefer approach which works in all cases.
Can't you check if both controllers are enabled by traversing the DT ?
>>>
>>> Nah, that sound's awful. But I could count the number of controllers
>>> during initialisation and store this in a static variable. That might
>>> also help to avoid the ugly comparison against SUNXI_USB2_BASE.
>>
>> I have tried this by managing global static, one side effect is when
>> only OHCI1 is enabled it will disable OHCI0 clock as well along with
>> OHCI1 clock and it shouldn't effect much I suppose.
>
> Yes, that should just be 0 anyways. So you clear a cleared bit.
>
>> I have pasted code
>> snippet here just to review.
>>
>> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
>> index 0ddbdbe460..2c4501788f 100644
>> --- a/drivers/usb/host/ohci-sunxi.c
>> +++ b/drivers/usb/host/ohci-sunxi.c
>> @@ -44,6 +44,8 @@ struct ohci_sunxi_priv {
>> const struct ohci_sunxi_cfg *cfg;
>> };
>>
>> +static int nr_ctrl;
>> +
>> static int ohci_usb_probe(struct udevice *dev)
>> {
>> struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
>> @@ -99,6 +101,7 @@ no_phy:
>> priv->ahb_gate_mask <<= reg_mask * AHB_CLK_DIST;
>> extra_ahb_gate_mask <<= reg_mask * AHB_CLK_DIST;
>> priv->usb_gate_mask <<= reg_mask;
>> +nr_ctrl++;
>>
>> setbits_le32(>ccm->ahb_gate0,
>> priv->ahb_gate_mask | extra_ahb_gate_mask);
>> @@ -130,7 +133,18 @@ static int ohci_usb_remove(struct udevice *dev)
>>
>> if (priv->cfg->has_reset)
>> clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask);
>> -clrbits_le32(>ccm->usb_clk_cfg, priv->usb_gate_mask);
>> +
>> +if ((device_is_compatible(dev, "allwinner,sun50i-a64-ohci"))) {
>> +if (!--nr_ctrl) {
>> +u32 usb_gate_mask =
Re: [U-Boot] [PATCH] fs: btrfs: Fix wrong comparison in logical to physical mapping
On Wed, 2018-07-04 at 19:10 +0200, Marek Behún wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > The comparison > logical > item->logical + item->length > in btrfs_map_logical_to_physical is wrong and should be instead > logical >= item->logical + item->length > For example, if > item->logical = 4096 > item->length = 4096 > and we are looking for logical = 8192, it is not part of item (item is > [4096, 8191]). But the comparison is false and we think we have found > the correct item, although we should be searing in the right subtree. > > This fixes some bugs I encountered. > > Signed-off-by: Marek Behun > --- > fs/btrfs/chunk-map.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/fs/btrfs/chunk-map.c b/fs/btrfs/chunk-map.c > index beb6a4bb92..31619f6241 100644 > --- a/fs/btrfs/chunk-map.c > +++ b/fs/btrfs/chunk-map.c > @@ -78,7 +78,7 @@ u64 btrfs_map_logical_to_physical(u64 logical) > > if (item->logical > logical) > node = node->rb_left; > - else if (logical > item->logical + item->length) > + else if (logical > item->logical + item->length - 1) maybe logical >= item->logical + item->length ? > node = node->rb_right; ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] fs: btrfs: Fix wrong comparison in logical to physical mapping
The comparison logical > item->logical + item->length in btrfs_map_logical_to_physical is wrong and should be instead logical >= item->logical + item->length For example, if item->logical = 4096 item->length = 4096 and we are looking for logical = 8192, it is not part of item (item is [4096, 8191]). But the comparison is false and we think we have found the correct item, although we should be searing in the right subtree. This fixes some bugs I encountered. Signed-off-by: Marek Behun --- fs/btrfs/chunk-map.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fs/btrfs/chunk-map.c b/fs/btrfs/chunk-map.c index beb6a4bb92..31619f6241 100644 --- a/fs/btrfs/chunk-map.c +++ b/fs/btrfs/chunk-map.c @@ -78,7 +78,7 @@ u64 btrfs_map_logical_to_physical(u64 logical) if (item->logical > logical) node = node->rb_left; - else if (logical > item->logical + item->length) + else if (logical > item->logical + item->length - 1) node = node->rb_right; else return item->physical + logical - item->logical; -- 2.16.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] persistent logo on LCD on imx6ull
Hi
On Wed, Jul 4, 2018 at 6:45 PM, Otavio Salvador
wrote:
> On Tue, Jul 3, 2018 at 6:20 AM, Michael Nazzareno Trimarchi
> wrote:
>> Ok I have fixed it :)
>
> Mind to share how?
commit 9c066153a6876b1ae57117d99ad228a07873eb75
Author: Michael Trimarchi
Date: Wed Jul 4 15:50:41 2018 +0200
spl: Make the spl_nand_load_image static
Change-Id: I1c2f71e75fc052c54fc94b13d0942cb9e75ff1c6
Signed-off-by: Michael Trimarchi
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index b96fce2..527cfc0 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -12,7 +12,7 @@
#include
#if defined(CONFIG_SPL_NAND_RAW_ONLY)
-int spl_nand_load_image(struct spl_image_info *spl_image,
+static int spl_nand_load_image(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
nand_init();
michael@panicking ~/work/amarula/w_and_h/dist/u-boot $ git show HEAD^^^
commit 110e91ee5a837684d99778d72a3c9aec5953baf6
Author: Michael Trimarchi
Date: Wed Jul 4 13:03:23 2018 +0200
video: mxsfb: Allocate a memory align to the page
We want to allocate memory align at page size because we then
need to reserve it to linux and simple frame buffer. The
lcd should not be powerdown if simple frame buffer configuration
is active
Change-Id: I1d139364d91686b12cd607821dcc1b84b0dc0b69
Signed-off-by: Michael Trimarchi
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index 4011066..0aaf9f0 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -2107,6 +2107,12 @@ static int cfg_video_init(void)
video_console_address = video_fb_address;
#endif
+ env_set_hex("video_address", (unsigned long)VIDEO_FB_ADRS);
+ env_set_hex("video_memory_size", (unsigned long)
roundup(VIDEO_SIZE, PAGE_SIZE));
+ env_set_hex("video_stride", (unsigned long) VIDEO_LINE_LEN);
+ env_set_hex("video_width", (unsigned long) VIDEO_COLS);
+ env_set_hex("video_height", (unsigned long) VIDEO_ROWS);
+
/* Initialize the console */
console_col = 0;
console_row = 0;
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index 4e3e3d7..254f230 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -7,6 +7,7 @@
#include
#include
#include
+#include
#include
#include
@@ -145,6 +146,7 @@ static void mxs_lcd_init(GraphicDevice *panel,
writel(LCDIF_CTRL_RUN, >hw_lcdif_ctrl_set);
}
+#ifndef CONFIG_VIDEO_DT_SIMPLEFB
void lcdif_power_down(void)
{
struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE;
@@ -164,6 +166,9 @@ void lcdif_power_down(void)
}
mxs_reset_block((struct mxs_register_32 *)>hw_lcdif_ctrl_reg);
}
+#else
+void lcdif_power_down(void) {};
+#endif
void *video_hw_init(void)
{
@@ -214,8 +219,8 @@ void *video_hw_init(void)
panel.memSize = mode.xres * mode.yres * panel.gdfBytesPP;
/* Allocate framebuffer */
- fb = memalign(ARCH_DMA_MINALIGN,
- roundup(panel.memSize, ARCH_DMA_MINALIGN));
+ fb = memalign(PAGE_SIZE,
+ roundup(panel.memSize, PAGE_SIZE));
if (!fb) {
printf("MXSFB: Error allocating framebuffer!\n");
return NULL;
(END)
{
struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE;
@@ -164,6 +166,9 @@ void lcdif_power_down(void)
}
mxs_reset_block((struct mxs_register_32 *)>hw_lcdif_ctrl_reg);
}
+#else
+void lcdif_power_down(void) {};
+#endif
void *video_hw_init(void)
{
@@ -214,8 +219,8 @@ void *video_hw_init(void)
panel.memSize = mode.xres * mode.yres * panel.gdfBytesPP;
/* Allocate framebuffer */
- fb = memalign(ARCH_DMA_MINALIGN,
- roundup(panel.memSize, ARCH_DMA_MINALIGN));
+ fb = memalign(PAGE_SIZE,
+ roundup(panel.memSize, PAGE_SIZE));
if (!fb) {
printf("MXSFB: Error allocating framebuffer!\n");
return NULL;
The I need to trick the dts ;)
This should be more then enough ;).
Michael
>
> --
> Otavio Salvador O.S. Systems
> http://www.ossystems.com.brhttp://code.ossystems.com.br
> Mobile: +55 (53) 9 9981-7854 Mobile: +1 (347) 903-9750
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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Re: [U-Boot] persistent logo on LCD on imx6ull
On Tue, Jul 3, 2018 at 6:20 AM, Michael Nazzareno Trimarchi wrote: > Ok I have fixed it :) Mind to share how? -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9 9981-7854 Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-sunxi/master
On Tue, Jul 03, 2018 at 10:09:09PM +0530, Jagan Teki wrote: > Hi Tom, > > Please pull this PR. > > thanks, > Jagan. > > The following changes since commit f58e779513be36e30ce46838fb467e12ac6a5539: > > Merge tag 'arc-updates-for-2018.07-rc2' of git://git.denx.de/u-boot-arc > (2018-06-15 09:38:16 -0400) > > are available in the Git repository at: > > git://git.denx.de/u-boot-sunxi.git master > > for you to fetch changes up to be0d21795b2bd3ed071de9bb0c66d8cc80d9: > > arm: timer: sunxi: add Allwinner timer erratum workaround (2018-07-03 > 22:00:00 +0530) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] net: Store waiting packet in a different buffer when making ARP requests
On Wed, Jul 4, 2018 at 12:15 AM, Tran Tien Dat
wrote:
> Currently, upon receiving an appropriate ARP reply, the packet in
> net_tx_packet is sent. However, this is a common buffer used by other
> protocol as well, so it may not be the original packet waiting to be sent
> after ARP.
You'll need to be more detailed here. "used by other protocol as well"
doesn't say which one or what situation caused a problem. Please
include a clear description of what this is fixing.
>
> This patch repurposes another buffer, arp_tx_packet to store the waiting
> packet and use the net_tx_packet to prepare ARP request.
>
> Signed-off-by: Tran Tien Dat
> ---
>
> net/arp.c | 18 ++
> net/arp.h | 1 +
> net/net.c | 3 +++
> 3 files changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/net/arp.c b/net/arp.c
> index b8a71684cd..f5e2c0b0cf 100644
> --- a/net/arp.c
> +++ b/net/arp.c
> @@ -35,8 +35,8 @@ int arp_wait_tx_packet_size;
> ulong arp_wait_timer_start;
> intarp_wait_try;
>
> -static uchar *arp_tx_packet; /* THE ARP transmit packet */
> -static uchar arp_tx_packet_buf[PKTSIZE_ALIGN + PKTALIGN];
> +uchar *arp_wait_tx_packet; /* THE waiting transmit packet after ARP */
> +static uchar arp_wait_tx_packet_buf[PKTSIZE_ALIGN + PKTALIGN];
>
> void arp_init(void)
> {
> @@ -45,8 +45,8 @@ void arp_init(void)
> net_arp_wait_packet_ip.s_addr = 0;
> net_arp_wait_reply_ip.s_addr = 0;
> arp_wait_tx_packet_size = 0;
> - arp_tx_packet = _tx_packet_buf[0] + (PKTALIGN - 1);
> - arp_tx_packet -= (ulong)arp_tx_packet % PKTALIGN;
> + arp_wait_tx_packet = _wait_tx_packet_buf[0] + (PKTALIGN - 1);
> + arp_wait_tx_packet -= (ulong)arp_wait_tx_packet % PKTALIGN;
> }
>
> void arp_raw_request(struct in_addr source_ip, const uchar *target_ethaddr,
> @@ -58,7 +58,7 @@ void arp_raw_request(struct in_addr source_ip, const uchar
> *target_ethaddr,
>
> debug_cond(DEBUG_DEV_PKT, "ARP broadcast %d\n", arp_wait_try);
>
> - pkt = arp_tx_packet;
> + pkt = net_tx_packet;
>
> eth_hdr_size = net_set_ether(pkt, net_bcast_ethaddr, PROT_ARP);
> pkt += eth_hdr_size;
> @@ -76,7 +76,7 @@ void arp_raw_request(struct in_addr source_ip, const uchar
> *target_ethaddr,
> memcpy(>ar_tha, target_ethaddr, ARP_HLEN); /* target ET addr */
> net_write_ip(>ar_tpa, target_ip); /* target IP addr */
>
> - net_send_packet(arp_tx_packet, eth_hdr_size + ARP_HDR_SIZE);
> + net_send_packet(net_tx_packet, eth_hdr_size + ARP_HDR_SIZE);
> }
>
> void arp_request(void)
> @@ -217,9 +217,11 @@ void arp_receive(struct ethernet_hdr *et, struct
> ip_udp_hdr *ip, int len)
>
> /* set the mac address in the waiting packet's header
>and transmit it */
> - memcpy(((struct ethernet_hdr
> *)net_tx_packet)->et_dest,
> + memcpy(((struct ethernet_hdr *)arp_wait_tx_packet)
> + ->et_dest,
>>ar_sha, ARP_HLEN);
> - net_send_packet(net_tx_packet,
> arp_wait_tx_packet_size);
> + net_send_packet(arp_wait_tx_packet,
> + arp_wait_tx_packet_size);
>
> /* no arp request pending now */
> net_arp_wait_packet_ip.s_addr = 0;
> diff --git a/net/arp.h b/net/arp.h
> index afb86958f3..65d73927a7 100644
> --- a/net/arp.h
> +++ b/net/arp.h
> @@ -20,6 +20,7 @@ extern uchar *arp_wait_packet_ethaddr;
> extern int arp_wait_tx_packet_size;
> extern ulong arp_wait_timer_start;
> extern int arp_wait_try;
> +extern uchar *arp_wait_tx_packet;
>
> void arp_init(void);
> void arp_request(void);
> diff --git a/net/net.c b/net/net.c
> index f35695b4fc..6325ad3e1a 100644
> --- a/net/net.c
> +++ b/net/net.c
> @@ -836,6 +836,9 @@ int net_send_udp_packet(uchar *ether, struct in_addr
> dest, int dport, int sport,
>
> /* size of the waiting packet */
> arp_wait_tx_packet_size = pkt_hdr_size + payload_len;
> + /* copy current packet to ARP waiting packet buffer */
> + memcpy(arp_wait_tx_packet, net_tx_packet,
> + arp_wait_tx_packet_size);
>
> /* and do the ARP request */
> arp_wait_try = 1;
> --
> 2.18.0
>
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Re: [U-Boot] [PATCH 2/5] net: Re-check prerequisites when autoloading
On Wed, Jul 4, 2018 at 4:20 AM, Alexander Graf wrote:
> On 07/04/2018 02:36 AM, Joe Hershberger wrote:
>>
>> With net autoload, we check the prerequisites for the initial command,
>> but the greater prerequisites when autoloading are not checked.
>>
>> If we would attempt to autoload, check those prerequisites too.
>>
>> If we are not expecting a serverip from the server, then don't worry
>> about it not being set, but don't attempt to load if it isn't.
>>
>> Signed-off-by: Joe Hershberger
>> ---
>>
>> net/net.c | 20
>> 1 file changed, 20 insertions(+)
>>
>> diff --git a/net/net.c b/net/net.c
>> index bff3e9c5b5..42a50e60f8 100644
>> --- a/net/net.c
>> +++ b/net/net.c
>> @@ -332,6 +332,16 @@ void net_auto_load(void)
>> const char *s = env_get("autoload");
>> if (s != NULL && strcmp(s, "NFS") == 0) {
>> + if (net_check_prereq(NFS)) {
>> +/* We aren't expecting to get a serverip, so just accept the assigned IP
>> */
>> +#ifdef CONFIG_BOOTP_SERVERIP
>> + net_set_state(NETLOOP_SUCCESS);
>> +#else
>> + printf("Cannot autoload with NFS\n");
>> + net_set_state(NETLOOP_FAIL);
>> +#endif
>
>
> I don't understand the #ifdef. In the CONFIG_BOOTP_SERVERIP case, you should
> already have net_server_ip set from the variable setter, so when do you
> realistically get into the case where net_check_prereq() fails here? I can
My thinking here was that if the user is in control of the serverip
and chooses not to set it, then at least populate the dhcp variables
that were successful. If we return a fail from here, even though DHCP
was successful, the result will not be saved to the env for the user.
> only see that happening when serverip is not set (read: net_server_ip ==
> 0.0.0.0) in which case we should also error out in the CONFIG_BOOTP_SERVERIP
> case, no?
>
>
> Alex
>
>
>
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Re: [U-Boot] [PATCH 3/5] net: Make copy_filename() accept NULL src
On Wed, Jul 4, 2018 at 4:25 AM, Alexander Graf wrote: > On 07/04/2018 02:36 AM, Joe Hershberger wrote: >> >> Rather than crashing, check the src ptr and set dst to empty string. >> >> Signed-off-by: Joe Hershberger > > > Wouldn't it make more sense to check for the existence outside at the > caller's side? That way it's much easier to see what really is happening. It's much easier to allow NULL so that we can directly pass the return result of getenv(). > > Alex > > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] sunxi: A64: OHCI: prevent turning off shared USB clock
Hi,
On 04/07/18 16:51, Jagan Teki wrote:
> On Wed, Jul 4, 2018 at 8:03 PM, Andre Przywara wrote:
>> Hi,
>>
>> On 04/07/18 12:10, Marek Vasut wrote:
>>> On 07/04/2018 12:03 PM, Andre Przywara wrote:
Hi,
On 04/07/18 08:14, Marek Vasut wrote:
> On 07/04/2018 02:05 AM, Andre Przywara wrote:
>> On the A64 the clock for the first USB controller is actually the parent
>> of the clock for the second controller, so turning them off in that order
>> makes the system hang.
>> Fix this by *not* turning off any clock for OHCI0, but both clocks when
>> OHCI1 is brought down.
>>
>> Signed-off-by: Andre Przywara
>> ---
>> Hi,
>>
>> this is a new approach to fix the USB hang we see with mainline U-Boot.
>> Compared to the previous patch it just deals with the USB clock (the AHB
>> gate was a red herring), and it eventually turns both clocks off instead
>> of leaving them running. Please have a test on A64 boards!
>>
>> Cheers,
>> Andre.
>>
>> drivers/usb/host/ohci-sunxi.c | 13 -
>> 1 file changed, 12 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/usb/host/ohci-sunxi.c
>> b/drivers/usb/host/ohci-sunxi.c
>> index 0ddbdbe460..8f108b48a8 100644
>> --- a/drivers/usb/host/ohci-sunxi.c
>> +++ b/drivers/usb/host/ohci-sunxi.c
>> @@ -114,6 +114,7 @@ no_phy:
>> static int ohci_usb_remove(struct udevice *dev)
>> {
>>struct ohci_sunxi_priv *priv = dev_get_priv(dev);
>> + fdt_addr_t base_addr = devfdt_get_addr(dev);
>>int ret;
>>
>>if (generic_phy_valid(>phy)) {
>> @@ -130,7 +131,17 @@ static int ohci_usb_remove(struct udevice *dev)
>>
>>if (priv->cfg->has_reset)
>>clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask);
>> - clrbits_le32(>ccm->usb_clk_cfg, priv->usb_gate_mask);
>> + /*
>> + * On the A64 CLK_USB_OHCI0 is the parent of CLK_USB_OHCI1, so
>> + * we have to bring down none for OHCI0, but both for OHCI1.
>> + */
>> + if (!priv->cfg->extra_usb_gate_mask || base_addr >= SUNXI_USB2_BASE) {
>> + u32 usb_gate_mask = priv->usb_gate_mask;
>> +
>> + usb_gate_mask |= priv->cfg->extra_usb_gate_mask;
>> + clrbits_le32(>ccm->usb_clk_cfg, usb_gate_mask);
>> + }
>> +
>>clrbits_le32(>ccm->ahb_gate0, priv->ahb_gate_mask);
>>
>>return 0;
>>
>
> What about boards which only enable OHCI0 and do not enable OHCI1 ?
Ah, c'mon, thanks for spoiling my short patch ;-)
The A64 has just two USB controllers, on dedicated pins, so mostly you
want both of them. But I see your point, the clocks would stay on if
only the first controller is ever dealt with. Maybe we can live with
that, at least for the next release?
Or do you have a clever idea how to deal with that? I think it's hard to
determine how many USB controller we have enabled?
>>>
>>> I'd prefer approach which works in all cases.
>>>
>>> Can't you check if both controllers are enabled by traversing the DT ?
>>
>> Nah, that sound's awful. But I could count the number of controllers
>> during initialisation and store this in a static variable. That might
>> also help to avoid the ugly comparison against SUNXI_USB2_BASE.
>
> I have tried this by managing global static, one side effect is when
> only OHCI1 is enabled it will disable OHCI0 clock as well along with
> OHCI1 clock and it shouldn't effect much I suppose.
Yes, that should just be 0 anyways. So you clear a cleared bit.
> I have pasted code
> snippet here just to review.
>
> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
> index 0ddbdbe460..2c4501788f 100644
> --- a/drivers/usb/host/ohci-sunxi.c
> +++ b/drivers/usb/host/ohci-sunxi.c
> @@ -44,6 +44,8 @@ struct ohci_sunxi_priv {
> const struct ohci_sunxi_cfg *cfg;
> };
>
> +static int nr_ctrl;
> +
> static int ohci_usb_probe(struct udevice *dev)
> {
> struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
> @@ -99,6 +101,7 @@ no_phy:
> priv->ahb_gate_mask <<= reg_mask * AHB_CLK_DIST;
> extra_ahb_gate_mask <<= reg_mask * AHB_CLK_DIST;
> priv->usb_gate_mask <<= reg_mask;
> +nr_ctrl++;
>
> setbits_le32(>ccm->ahb_gate0,
> priv->ahb_gate_mask | extra_ahb_gate_mask);
> @@ -130,7 +133,18 @@ static int ohci_usb_remove(struct udevice *dev)
>
> if (priv->cfg->has_reset)
> clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask);
> -clrbits_le32(>ccm->usb_clk_cfg, priv->usb_gate_mask);
> +
> +if ((device_is_compatible(dev, "allwinner,sun50i-a64-ohci"))) {
> +if (!--nr_ctrl) {
> +u32 usb_gate_mask = priv->usb_gate_mask;
> +
> +usb_gate_mask |= priv->cfg->extra_usb_gate_mask;
> +clrbits_le32(>ccm->usb_clk_cfg, usb_gate_mask);
> +}
> +} else {
> +
Re: [U-Boot] [PATCH] sunxi: A64: OHCI: prevent turning off shared USB clock
On Wed, Jul 4, 2018 at 8:03 PM, Andre Przywara wrote:
> Hi,
>
> On 04/07/18 12:10, Marek Vasut wrote:
>> On 07/04/2018 12:03 PM, Andre Przywara wrote:
>>> Hi,
>>>
>>> On 04/07/18 08:14, Marek Vasut wrote:
On 07/04/2018 02:05 AM, Andre Przywara wrote:
> On the A64 the clock for the first USB controller is actually the parent
> of the clock for the second controller, so turning them off in that order
> makes the system hang.
> Fix this by *not* turning off any clock for OHCI0, but both clocks when
> OHCI1 is brought down.
>
> Signed-off-by: Andre Przywara
> ---
> Hi,
>
> this is a new approach to fix the USB hang we see with mainline U-Boot.
> Compared to the previous patch it just deals with the USB clock (the AHB
> gate was a red herring), and it eventually turns both clocks off instead
> of leaving them running. Please have a test on A64 boards!
>
> Cheers,
> Andre.
>
> drivers/usb/host/ohci-sunxi.c | 13 -
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
> index 0ddbdbe460..8f108b48a8 100644
> --- a/drivers/usb/host/ohci-sunxi.c
> +++ b/drivers/usb/host/ohci-sunxi.c
> @@ -114,6 +114,7 @@ no_phy:
> static int ohci_usb_remove(struct udevice *dev)
> {
>struct ohci_sunxi_priv *priv = dev_get_priv(dev);
> + fdt_addr_t base_addr = devfdt_get_addr(dev);
>int ret;
>
>if (generic_phy_valid(>phy)) {
> @@ -130,7 +131,17 @@ static int ohci_usb_remove(struct udevice *dev)
>
>if (priv->cfg->has_reset)
>clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask);
> - clrbits_le32(>ccm->usb_clk_cfg, priv->usb_gate_mask);
> + /*
> + * On the A64 CLK_USB_OHCI0 is the parent of CLK_USB_OHCI1, so
> + * we have to bring down none for OHCI0, but both for OHCI1.
> + */
> + if (!priv->cfg->extra_usb_gate_mask || base_addr >= SUNXI_USB2_BASE) {
> + u32 usb_gate_mask = priv->usb_gate_mask;
> +
> + usb_gate_mask |= priv->cfg->extra_usb_gate_mask;
> + clrbits_le32(>ccm->usb_clk_cfg, usb_gate_mask);
> + }
> +
>clrbits_le32(>ccm->ahb_gate0, priv->ahb_gate_mask);
>
>return 0;
>
What about boards which only enable OHCI0 and do not enable OHCI1 ?
>>>
>>> Ah, c'mon, thanks for spoiling my short patch ;-)
>>> The A64 has just two USB controllers, on dedicated pins, so mostly you
>>> want both of them. But I see your point, the clocks would stay on if
>>> only the first controller is ever dealt with. Maybe we can live with
>>> that, at least for the next release?
>>> Or do you have a clever idea how to deal with that? I think it's hard to
>>> determine how many USB controller we have enabled?
>>
>> I'd prefer approach which works in all cases.
>>
>> Can't you check if both controllers are enabled by traversing the DT ?
>
> Nah, that sound's awful. But I could count the number of controllers
> during initialisation and store this in a static variable. That might
> also help to avoid the ugly comparison against SUNXI_USB2_BASE.
I have tried this by managing global static, one side effect is when
only OHCI1 is enabled it will disable OHCI0 clock as well along with
OHCI1 clock and it shouldn't effect much I suppose. I have pasted code
snippet here just to review.
diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
index 0ddbdbe460..2c4501788f 100644
--- a/drivers/usb/host/ohci-sunxi.c
+++ b/drivers/usb/host/ohci-sunxi.c
@@ -44,6 +44,8 @@ struct ohci_sunxi_priv {
const struct ohci_sunxi_cfg *cfg;
};
+static int nr_ctrl;
+
static int ohci_usb_probe(struct udevice *dev)
{
struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
@@ -99,6 +101,7 @@ no_phy:
priv->ahb_gate_mask <<= reg_mask * AHB_CLK_DIST;
extra_ahb_gate_mask <<= reg_mask * AHB_CLK_DIST;
priv->usb_gate_mask <<= reg_mask;
+nr_ctrl++;
setbits_le32(>ccm->ahb_gate0,
priv->ahb_gate_mask | extra_ahb_gate_mask);
@@ -130,7 +133,18 @@ static int ohci_usb_remove(struct udevice *dev)
if (priv->cfg->has_reset)
clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask);
-clrbits_le32(>ccm->usb_clk_cfg, priv->usb_gate_mask);
+
+if ((device_is_compatible(dev, "allwinner,sun50i-a64-ohci"))) {
+if (!--nr_ctrl) {
+u32 usb_gate_mask = priv->usb_gate_mask;
+
+usb_gate_mask |= priv->cfg->extra_usb_gate_mask;
+clrbits_le32(>ccm->usb_clk_cfg, usb_gate_mask);
+}
+} else {
+clrbits_le32(>ccm->usb_clk_cfg, priv->usb_gate_mask);
+}
+
clrbits_le32(>ccm->ahb_gate0, priv->ahb_gate_mask);
return 0;
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Re: [U-Boot] [PATCH 3/5] efi_loader: complete implementation of GetTime()
On 06/30/2018 04:52 AM, Heinrich Schuchardt wrote:
Implement the missing parts of the GetTime() runtime service.
Support CONFIG_DM_RTC=n.
Fill seconds.
Fill daylight saving time flag correctly.
Provide dummy values for capabilities.
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/efi_runtime.c | 101 +--
1 file changed, 86 insertions(+), 15 deletions(-)
diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
index 5ec17867fb..20eb3f373d 100644
--- a/lib/efi_loader/efi_runtime.c
+++ b/lib/efi_loader/efi_runtime.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
/* For manual relocation support */
@@ -117,24 +118,86 @@ static void EFIAPI efi_reset_system_boottime(
while (1) { }
}
+int __weak rtc_get(struct rtc_time *tm)
+{
+ return 1;
+}
+
+#if defined(CONFIG_SYS_RTC_BUS_NUM) && !defined(CONFIG_DM_RTC)
+/**
+ * efi_set_rtc_i2c_bus - select I2C bus for real time clock
+ *
+ * @bus: bus to select, -1 for default
+ * Return Value: previously selected bus
+ */
+static int efi_set_rtc_i2c_bus(int bus)
+{
+ int old_bus;
+
+ if (bus < 0)
+ bus = CONFIG_SYS_RTC_BUS_NUM;
+
+#ifdef CONFIG_SYS_I2C
+ old_bus = i2c_get_bus_num();
+ i2c_set_bus_num(bus);
+#else
+ old_bus = I2C_GET_BUS();
+ I2C_SET_BUS(bus);
+#endif
+ return old_bus;
+}
+#endif /* CONFIG_SYS_RTC_BUS_NUM && !CONFIG_DM_RTC */
+
+/**
+ * efi_get_time_boottime - get current time
+ *
+ * This function implements the GetTime runtime service.
+ * See the Unified Extensible Firmware Interface (UEFI) specification
+ * for details.
+ *
+ * @time: pointer to structure to receive current time
+ * @capabilities: pointer to structure to receive RTC properties
+ * Return Value: status code
+ */
static efi_status_t EFIAPI efi_get_time_boottime(
struct efi_time *time,
struct efi_time_cap *capabilities)
{
-#if defined(CONFIG_CMD_DATE) && defined(CONFIG_DM_RTC)
- struct rtc_time tm;
+ efi_status_t ret = EFI_SUCCESS;
int r;
- struct udevice *dev;
+ struct rtc_time tm;
EFI_ENTRY("%p %p", time, capabilities);
- r = uclass_get_device(UCLASS_RTC, 0, );
- if (r)
- return EFI_EXIT(EFI_DEVICE_ERROR);
+ if (!time) {
+ ret = EFI_INVALID_PARAMETER;
+ goto out;
+ }
- r = dm_rtc_get(dev, );
- if (r)
- return EFI_EXIT(EFI_DEVICE_ERROR);
+#ifdef CONFIG_DM_RTC
+ {
+ struct udevice *dev;
+
+ r = uclass_get_device(UCLASS_RTC, 0, );
+ if (!r)
+ r = dm_rtc_get(dev, );
+ }
+#else
+ {
+#ifdef CONFIG_SYS_RTC_BUS_NUM
+ int oldbus = efi_set_rtc_i2c_bus(-1);
Please make up your mind whether you want an #ifdef in this code path or
not :). So IMHO you should either do the bus setting with ifdefs, but
then explicitly pass CONFIG_SYS_RTC_BUS_NUM as parameter or do it all
without ifdefs and just #ifdef out the body of efi_set_rtc_i2c_bus().
Alex
+
+#endif
+ r = rtc_get();
+#ifdef CONFIG_SYS_RTC_BUS_NUM
+ efi_set_rtc_i2c_bus(oldbus);
+#endif
+ }
+#endif
+ if (r) {
+ ret = EFI_DEVICE_ERROR;
+ goto out;
+ }
memset(time, 0, sizeof(*time));
time->year = tm.tm_year;
@@ -142,12 +205,20 @@ static efi_status_t EFIAPI efi_get_time_boottime(
time->day = tm.tm_mday;
time->hour = tm.tm_hour;
time->minute = tm.tm_min;
- time->daylight = tm.tm_isdst;
-
- return EFI_EXIT(EFI_SUCCESS);
-#else
- return EFI_DEVICE_ERROR;
-#endif
+ time->second = tm.tm_sec;
+ time->daylight = EFI_TIME_ADJUST_DAYLIGHT;
+ if (tm.tm_isdst > 0)
+ time->daylight |= EFI_TIME_IN_DAYLIGHT;
+ time->timezone = EFI_UNSPECIFIED_TIMEZONE;
+
+ if (capabilities) {
+ /* Set reasonable dummy values */
+ capabilities->resolution = 1;/* 1 Hz */
+ capabilities->accuracy = 1; /* 100 ppm */
+ capabilities->sets_to_zero = false;
+ }
+out:
+ return EFI_EXIT(ret);
}
/* Boards may override the helpers below to implement RTS functionality */
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Re: [U-Boot] [PATCH 2/5] efi_loader: remove unused efi_get_time_init()
On 06/30/2018 04:52 AM, Heinrich Schuchardt wrote: Remove unused function efi_get_time_init(). Initialization of the RTC has to be done in board bring up not in the EFI subsystem. Signed-off-by: Heinrich Schuchardt Are there no EFI objects for RTC devices? These would have to get initialized from efi_init_obj_list(). Alex ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] spl: Fix redundant image of uboot
Hi
On Wed, Jul 4, 2018 at 5:10 PM, Lothar Waßmann wrote:
> Michael Nazzareno Trimarchi wrote:
>
>> Hi
>>
>> On Wed, Jul 4, 2018 at 4:19 PM, Lothar Waßmann
>> wrote:
>> > Hi,
>> >
>> > On Wed, 4 Jul 2018 15:53:36 +0200 Michael Trimarchi wrote:
>> >> We need to address the redundat image case and undestand if the
>> >> image is corrupted or not and fallback to the copy. The function
>> >> used before was always return 0 without any evaluation of the
>> >> error. We try to make it work properly
>> >>
>> >> Change-Id: Id6fc221c5cc08934b7324dd5d319b93c56e2e678
>> >> Signed-off-by: Michael Trimarchi
>> >> ---
>> >> common/spl/spl_nand.c | 34 +-
>> >> 1 file changed, 25 insertions(+), 9 deletions(-)
>> >>
>> >> diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
>> >> index 9a52500..b96fce2 100644
>> >> --- a/common/spl/spl_nand.c
>> >> +++ b/common/spl/spl_nand.c
>> >> @@ -44,9 +44,7 @@ static int spl_nand_load_element(struct spl_image_info
>> >> *spl_image,
>> >> {
>> >> int err;
>> >>
>> >> - err = nand_spl_load_image(offset, sizeof(*header), (void *)header);
>> >> - if (err)
>> >> - return err;
>> >> + nand_spl_load_image(offset, sizeof(*header), (void *)header);
>> >>
>> >> if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
>> >> image_get_magic(header) == FDT_MAGIC) {
>> >> @@ -59,13 +57,31 @@ static int spl_nand_load_element(struct
>> >> spl_image_info *spl_image,
>> >> load.bl_len = 1;
>> >> load.read = spl_nand_fit_read;
>> >> return spl_load_simple_fit(spl_image, , offset,
>> >> header);
>> >> - } else {
>> >> - err = spl_parse_image_header(spl_image, header);
>> >> - if (err)
>> >> - return err;
>> >> - return nand_spl_load_image(offset, spl_image->size,
>> >> -(void
>> >> *)(ulong)spl_image->load_addr);
>> >> }
>> >> + err = spl_parse_image_header(spl_image, header);
>> >> + if (err)
>> >> + return err;
>> >> +
>> >> + nand_spl_load_image(offset, spl_image->size,
>> >> +(void *)(ulong)spl_image->load_addr);
>> >> +
>> >> + /*
>> >> + * Logic of the error is inverted for image_check* functions.
>> >> + * We want to verify that header is correct and the data are correct
>> >> + * for LEGACY image type
>> >> + */
>> >> + err = image_check_hcrc((const image_header_t
>> >> *)spl_image->load_addr);
>> >> + if (!err) {
>> >>
>> > Why not simply:
>> > if (!image_check_hcrc(...) {
>> >> + debug("Header checksum failed\n");
>> >> + return -EINVAL;
>> >> + }
>> >> + err = image_check_dcrc((const image_header_t
>> >> *)spl_image->load_addr);
>> >> + if (!err) {
>> >>
>> > dto.
>>
>> Just because I want to be in the style of this file ;)
>>
> In other places the 'err' variable is used as return value.
> If you don't need it for that, it's vain to assign a value to it.
>
Let me collect all the comments and I will follow your suggestion on next post
Michael
>
> Lothar Waßmann
> --
> ___
>
> Ka-Ro electronics GmbH | Pascalstraße 22 | D - 52076 Aachen
> Phone: +49 2408 1402-0 | Fax: +49 2408 1402-10
> Geschäftsführer: Matthias Kaussen
> Handelsregistereintrag: Amtsgericht Aachen, HRB 4996
>
> www.karo-electronics.de | i...@karo-electronics.de
> ___
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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Re: [U-Boot] [PATCH 1/2] spl: Fix redundant image of uboot
Michael Nazzareno Trimarchi wrote:
> Hi
>
> On Wed, Jul 4, 2018 at 4:19 PM, Lothar Waßmann
> wrote:
> > Hi,
> >
> > On Wed, 4 Jul 2018 15:53:36 +0200 Michael Trimarchi wrote:
> >> We need to address the redundat image case and undestand if the
> >> image is corrupted or not and fallback to the copy. The function
> >> used before was always return 0 without any evaluation of the
> >> error. We try to make it work properly
> >>
> >> Change-Id: Id6fc221c5cc08934b7324dd5d319b93c56e2e678
> >> Signed-off-by: Michael Trimarchi
> >> ---
> >> common/spl/spl_nand.c | 34 +-
> >> 1 file changed, 25 insertions(+), 9 deletions(-)
> >>
> >> diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
> >> index 9a52500..b96fce2 100644
> >> --- a/common/spl/spl_nand.c
> >> +++ b/common/spl/spl_nand.c
> >> @@ -44,9 +44,7 @@ static int spl_nand_load_element(struct spl_image_info
> >> *spl_image,
> >> {
> >> int err;
> >>
> >> - err = nand_spl_load_image(offset, sizeof(*header), (void *)header);
> >> - if (err)
> >> - return err;
> >> + nand_spl_load_image(offset, sizeof(*header), (void *)header);
> >>
> >> if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
> >> image_get_magic(header) == FDT_MAGIC) {
> >> @@ -59,13 +57,31 @@ static int spl_nand_load_element(struct spl_image_info
> >> *spl_image,
> >> load.bl_len = 1;
> >> load.read = spl_nand_fit_read;
> >> return spl_load_simple_fit(spl_image, , offset, header);
> >> - } else {
> >> - err = spl_parse_image_header(spl_image, header);
> >> - if (err)
> >> - return err;
> >> - return nand_spl_load_image(offset, spl_image->size,
> >> -(void
> >> *)(ulong)spl_image->load_addr);
> >> }
> >> + err = spl_parse_image_header(spl_image, header);
> >> + if (err)
> >> + return err;
> >> +
> >> + nand_spl_load_image(offset, spl_image->size,
> >> +(void *)(ulong)spl_image->load_addr);
> >> +
> >> + /*
> >> + * Logic of the error is inverted for image_check* functions.
> >> + * We want to verify that header is correct and the data are correct
> >> + * for LEGACY image type
> >> + */
> >> + err = image_check_hcrc((const image_header_t *)spl_image->load_addr);
> >> + if (!err) {
> >>
> > Why not simply:
> > if (!image_check_hcrc(...) {
> >> + debug("Header checksum failed\n");
> >> + return -EINVAL;
> >> + }
> >> + err = image_check_dcrc((const image_header_t *)spl_image->load_addr);
> >> + if (!err) {
> >>
> > dto.
>
> Just because I want to be in the style of this file ;)
>
In other places the 'err' variable is used as return value.
If you don't need it for that, it's vain to assign a value to it.
Lothar Waßmann
--
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Re: [U-Boot] [PATCH] sunxi: A64: OHCI: prevent turning off shared USB clock
Hi,
On 04/07/18 12:10, Marek Vasut wrote:
> On 07/04/2018 12:03 PM, Andre Przywara wrote:
>> Hi,
>>
>> On 04/07/18 08:14, Marek Vasut wrote:
>>> On 07/04/2018 02:05 AM, Andre Przywara wrote:
On the A64 the clock for the first USB controller is actually the parent
of the clock for the second controller, so turning them off in that order
makes the system hang.
Fix this by *not* turning off any clock for OHCI0, but both clocks when
OHCI1 is brought down.
Signed-off-by: Andre Przywara
---
Hi,
this is a new approach to fix the USB hang we see with mainline U-Boot.
Compared to the previous patch it just deals with the USB clock (the AHB
gate was a red herring), and it eventually turns both clocks off instead
of leaving them running. Please have a test on A64 boards!
Cheers,
Andre.
drivers/usb/host/ohci-sunxi.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
index 0ddbdbe460..8f108b48a8 100644
--- a/drivers/usb/host/ohci-sunxi.c
+++ b/drivers/usb/host/ohci-sunxi.c
@@ -114,6 +114,7 @@ no_phy:
static int ohci_usb_remove(struct udevice *dev)
{
struct ohci_sunxi_priv *priv = dev_get_priv(dev);
+ fdt_addr_t base_addr = devfdt_get_addr(dev);
int ret;
if (generic_phy_valid(>phy)) {
@@ -130,7 +131,17 @@ static int ohci_usb_remove(struct udevice *dev)
if (priv->cfg->has_reset)
clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask);
- clrbits_le32(>ccm->usb_clk_cfg, priv->usb_gate_mask);
+ /*
+ * On the A64 CLK_USB_OHCI0 is the parent of CLK_USB_OHCI1, so
+ * we have to bring down none for OHCI0, but both for OHCI1.
+ */
+ if (!priv->cfg->extra_usb_gate_mask || base_addr >= SUNXI_USB2_BASE) {
+ u32 usb_gate_mask = priv->usb_gate_mask;
+
+ usb_gate_mask |= priv->cfg->extra_usb_gate_mask;
+ clrbits_le32(>ccm->usb_clk_cfg, usb_gate_mask);
+ }
+
clrbits_le32(>ccm->ahb_gate0, priv->ahb_gate_mask);
return 0;
>>>
>>> What about boards which only enable OHCI0 and do not enable OHCI1 ?
>>
>> Ah, c'mon, thanks for spoiling my short patch ;-)
>> The A64 has just two USB controllers, on dedicated pins, so mostly you
>> want both of them. But I see your point, the clocks would stay on if
>> only the first controller is ever dealt with. Maybe we can live with
>> that, at least for the next release?
>> Or do you have a clever idea how to deal with that? I think it's hard to
>> determine how many USB controller we have enabled?
>
> I'd prefer approach which works in all cases.
>
> Can't you check if both controllers are enabled by traversing the DT ?
Nah, that sound's awful. But I could count the number of controllers
during initialisation and store this in a static variable. That might
also help to avoid the ugly comparison against SUNXI_USB2_BASE.
Cheers,
Andre.
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Re: [U-Boot] [PATCH 1/2] spl: Fix redundant image of uboot
Hi
On Wed, Jul 4, 2018 at 4:19 PM, Lothar Waßmann wrote:
> Hi,
>
> On Wed, 4 Jul 2018 15:53:36 +0200 Michael Trimarchi wrote:
>> We need to address the redundat image case and undestand if the
>> image is corrupted or not and fallback to the copy. The function
>> used before was always return 0 without any evaluation of the
>> error. We try to make it work properly
>>
>> Change-Id: Id6fc221c5cc08934b7324dd5d319b93c56e2e678
>> Signed-off-by: Michael Trimarchi
>> ---
>> common/spl/spl_nand.c | 34 +-
>> 1 file changed, 25 insertions(+), 9 deletions(-)
>>
>> diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
>> index 9a52500..b96fce2 100644
>> --- a/common/spl/spl_nand.c
>> +++ b/common/spl/spl_nand.c
>> @@ -44,9 +44,7 @@ static int spl_nand_load_element(struct spl_image_info
>> *spl_image,
>> {
>> int err;
>>
>> - err = nand_spl_load_image(offset, sizeof(*header), (void *)header);
>> - if (err)
>> - return err;
>> + nand_spl_load_image(offset, sizeof(*header), (void *)header);
>>
>> if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
>> image_get_magic(header) == FDT_MAGIC) {
>> @@ -59,13 +57,31 @@ static int spl_nand_load_element(struct spl_image_info
>> *spl_image,
>> load.bl_len = 1;
>> load.read = spl_nand_fit_read;
>> return spl_load_simple_fit(spl_image, , offset, header);
>> - } else {
>> - err = spl_parse_image_header(spl_image, header);
>> - if (err)
>> - return err;
>> - return nand_spl_load_image(offset, spl_image->size,
>> -(void
>> *)(ulong)spl_image->load_addr);
>> }
>> + err = spl_parse_image_header(spl_image, header);
>> + if (err)
>> + return err;
>> +
>> + nand_spl_load_image(offset, spl_image->size,
>> +(void *)(ulong)spl_image->load_addr);
>> +
>> + /*
>> + * Logic of the error is inverted for image_check* functions.
>> + * We want to verify that header is correct and the data are correct
>> + * for LEGACY image type
>> + */
>> + err = image_check_hcrc((const image_header_t *)spl_image->load_addr);
>> + if (!err) {
>>
> Why not simply:
> if (!image_check_hcrc(...) {
>> + debug("Header checksum failed\n");
>> + return -EINVAL;
>> + }
>> + err = image_check_dcrc((const image_header_t *)spl_image->load_addr);
>> + if (!err) {
>>
> dto.
Just because I want to be in the style of this file ;)
Michael
>
>> + debug("Image checksum failed\n");
>> + return -EINVAL;
>> + }
>> +
>> + return 0;
>> }
>>
>> static int spl_nand_load_image(struct spl_image_info *spl_image,
>
>
> Lothar Waßmann
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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Re: [U-Boot] [PATCH 1/2] spl: Fix redundant image of uboot
Hi,
On Wed, 4 Jul 2018 15:53:36 +0200 Michael Trimarchi wrote:
> We need to address the redundat image case and undestand if the
> image is corrupted or not and fallback to the copy. The function
> used before was always return 0 without any evaluation of the
> error. We try to make it work properly
>
> Change-Id: Id6fc221c5cc08934b7324dd5d319b93c56e2e678
> Signed-off-by: Michael Trimarchi
> ---
> common/spl/spl_nand.c | 34 +-
> 1 file changed, 25 insertions(+), 9 deletions(-)
>
> diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
> index 9a52500..b96fce2 100644
> --- a/common/spl/spl_nand.c
> +++ b/common/spl/spl_nand.c
> @@ -44,9 +44,7 @@ static int spl_nand_load_element(struct spl_image_info
> *spl_image,
> {
> int err;
>
> - err = nand_spl_load_image(offset, sizeof(*header), (void *)header);
> - if (err)
> - return err;
> + nand_spl_load_image(offset, sizeof(*header), (void *)header);
>
> if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
> image_get_magic(header) == FDT_MAGIC) {
> @@ -59,13 +57,31 @@ static int spl_nand_load_element(struct spl_image_info
> *spl_image,
> load.bl_len = 1;
> load.read = spl_nand_fit_read;
> return spl_load_simple_fit(spl_image, , offset, header);
> - } else {
> - err = spl_parse_image_header(spl_image, header);
> - if (err)
> - return err;
> - return nand_spl_load_image(offset, spl_image->size,
> -(void *)(ulong)spl_image->load_addr);
> }
> + err = spl_parse_image_header(spl_image, header);
> + if (err)
> + return err;
> +
> + nand_spl_load_image(offset, spl_image->size,
> +(void *)(ulong)spl_image->load_addr);
> +
> + /*
> + * Logic of the error is inverted for image_check* functions.
> + * We want to verify that header is correct and the data are correct
> + * for LEGACY image type
> + */
> + err = image_check_hcrc((const image_header_t *)spl_image->load_addr);
> + if (!err) {
>
Why not simply:
if (!image_check_hcrc(...) {
> + debug("Header checksum failed\n");
> + return -EINVAL;
> + }
> + err = image_check_dcrc((const image_header_t *)spl_image->load_addr);
> + if (!err) {
>
dto.
> + debug("Image checksum failed\n");
> + return -EINVAL;
> + }
> +
> + return 0;
> }
>
> static int spl_nand_load_image(struct spl_image_info *spl_image,
Lothar Waßmann
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[U-Boot] [PATCH v3 5/7] armv8: ls1046a: initial icid setup support
Add infrastructure for ICID setup and device tree
fixup on ARM platforms. This include basic ICID setup
for several devices.
Signed-off-by: Laurentiu Tudor
---
arch/arm/cpu/armv8/fsl-layerscape/Makefile| 1 +
arch/arm/cpu/armv8/fsl-layerscape/icid.c | 111 ++
.../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 29 +
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 3 +
.../asm/arch-fsl-layerscape/fsl_icid.h| 80 +
board/freescale/ls1046aqds/ls1046aqds.c | 2 +
board/freescale/ls1046ardb/ls1046ardb.c | 3 +
7 files changed, 229 insertions(+)
create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/icid.c
create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
index 1e9e4680fe..5d6f68aad6 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
@@ -37,6 +37,7 @@ endif
ifneq ($(CONFIG_ARCH_LS1046A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls1046a_serdes.o
+obj-y += icid.o ls1046_ids.o
endif
ifneq ($(CONFIG_ARCH_LS1088A),)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c
b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
new file mode 100644
index 00..8694bd6fa1
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ */
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+static void set_icid(struct icid_id_table *tbl, int size)
+{
+ int i;
+
+ for (i = 0; i < size; i++)
+ out_be32((u32 *)(tbl[i].reg_addr), tbl[i].reg);
+}
+
+void set_icids(void)
+{
+ /* setup general icid offsets */
+ set_icid(icid_tbl, icid_tbl_sz);
+}
+
+int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids)
+{
+ int i, ret;
+ u32 prop[8];
+
+ for (i = 0; i < num_ids; i++) {
+ prop[i * 2] = cpu_to_fdt32(smmu_ph);
+ prop[i * 2 + 1] = cpu_to_fdt32(ids[i]);
+ }
+ ret = fdt_setprop(blob, off, "iommus",
+ prop, sizeof(u32) * num_ids * 2);
+ if (ret > 0) {
+ printf("WARNING unable to set iommus: %s\n", fdt_strerror(off));
+ return off;
+ }
+ ret = fdt_setprop_empty(blob, off, "dma-coherent");
+ if (ret > 0) {
+ printf("WARNING unable to set dma-coherent: %s\n",
+ fdt_strerror(off));
+ return off;
+ }
+
+ return 0;
+}
+
+int fdt_fixup_icid_tbl(void *blob, int smmu_ph,
+ struct icid_id_table *tbl, int size)
+{
+ int i, err, off;
+
+ for (i = 0; i < size; i++) {
+ if (!tbl[i].compat)
+ continue;
+
+ off = fdt_node_offset_by_compat_reg(blob,
+ tbl[i].compat,
+ tbl[i].compat_addr);
+ if (off > 0) {
+ err = fdt_set_iommu_prop(blob, off, smmu_ph,
+[i].id, 1);
+ if (err)
+ return err;
+ } else {
+ printf("WARNING could not find node %s: %s.\n",
+ tbl[i].compat, fdt_strerror(off));
+ }
+ }
+
+ return 0;
+}
+
+int fdt_get_smmu_phandle(void *blob)
+{
+ int noff, smmu_ph;
+
+ noff = fdt_node_offset_by_compatible(blob, -1, "arm,mmu-500");
+ if (noff < 0) {
+ printf("WARNING failed to get smmu node: %s\n",
+ fdt_strerror(noff));
+ return noff;
+ }
+
+ smmu_ph = fdt_get_phandle(blob, noff);
+ if (!smmu_ph) {
+ smmu_ph = fdt_create_phandle(blob, noff);
+ if (!smmu_ph) {
+ printf("WARNING failed to get smmu phandle\n");
+ return -1;
+ }
+ }
+
+ return smmu_ph;
+}
+
+void fdt_fixup_icid(void *blob)
+{
+ int smmu_ph;
+
+ smmu_ph = fdt_get_smmu_phandle(blob);
+ if (smmu_ph < 0)
+ return;
+
+ fdt_fixup_icid_tbl(blob, smmu_ph, icid_tbl, icid_tbl_sz);
+}
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
new file mode 100644
index 00..1c528ab751
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ */
+
+#include
+#include
+#include
+
+struct icid_id_table icid_tbl[] = {
+#ifdef CONFIG_SYS_DPAA_QBMAN
+ SET_QMAN_ICID(FSL_DPAA1_STREAM_ID_START),
+ SET_BMAN_ICID(FSL_DPAA1_STREAM_ID_START + 1),
+#endif
+
+
[U-Boot] [PATCH v3 4/7] armv8: fsl-layerscape: add missing debug stream ID
Add a define with a value for the missing debug stream ID. Signed-off-by: Laurentiu Tudor --- arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h index 61c6e533c6..1b02d484d9 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h @@ -50,6 +50,7 @@ #define FSL_QDMA_STREAM_ID 7 #define FSL_EDMA_STREAM_ID 8 #define FSL_ETR_STREAM_ID 9 +#define FSL_DEBUG_STREAM_ID10 /* PCI - programmed in PEXn_LUT */ #define FSL_PEX_STREAM_ID_START11 -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 6/7] armv8: ls1046a: add icid setup for qman portals
Add support for ICID setting of qman portals and
the required device tree fixups.
Also fix an endiness issue in portal setup code.
Signed-off-by: Laurentiu Tudor
---
.../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 16 +++
.../asm/arch-fsl-layerscape/fsl_portals.h | 23 ++
drivers/misc/fsl_portals.c| 43 +++
3 files changed, 74 insertions(+), 8 deletions(-)
create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
index 1c528ab751..80e1ceadc0 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -6,6 +6,22 @@
#include
#include
#include
+#include
+
+#ifdef CONFIG_SYS_DPAA_QBMAN
+struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+};
+#endif
struct icid_id_table icid_tbl[] = {
#ifdef CONFIG_SYS_DPAA_QBMAN
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
b/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
new file mode 100644
index 00..bd8d3fb49a
--- /dev/null
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2018 NXP
+ */
+
+#ifndef _FSL_PORTALS_H_
+#define _FSL_PORTALS_H_
+
+struct qportal_info {
+ u16 dicid; /* DQRR ICID */
+ u16 ficid; /* frame data ICID */
+ u16 icid;
+ u8 sdest;
+};
+
+#define SET_QP_INFO(_icid, dest) \
+ { .dicid = _icid, .ficid = _icid, .icid = _icid, .sdest = dest }
+
+extern struct qportal_info qp_info[];
+void fdt_portal(void *blob, const char *compat, const char *container,
+ u64 addr, u32 size);
+
+#endif
diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
index 22faf16751..a524510707 100644
--- a/drivers/misc/fsl_portals.c
+++ b/drivers/misc/fsl_portals.c
@@ -13,6 +13,9 @@
#ifdef CONFIG_PPC
#include
#include
+#else
+#include
+#include
#endif
#include
@@ -45,6 +48,22 @@ void setup_qbman_portals(void)
/* set frame liodn */
out_be32(>qcsp[i].qcsp_io_cfg, (sdest << 16) | fliodn);
}
+#else
+#ifdef CONFIG_ARM
+ int i;
+
+ for (i = 0; i < CONFIG_SYS_QMAN_NUM_PORTALS; i++) {
+ u8 sdest = qp_info[i].sdest;
+ u16 ficid = qp_info[i].ficid;
+ u16 dicid = qp_info[i].dicid;
+ u16 icid = qp_info[i].icid;
+
+ out_be32(>qcsp[i].qcsp_lio_cfg, (icid << 16) |
+ dicid);
+ /* set frame icid */
+ out_be32(>qcsp[i].qcsp_io_cfg, (sdest << 16) | ficid);
+ }
+#endif
#endif
/* Change default state of BMan ISDR portals to all 1s */
@@ -178,6 +197,10 @@ void fdt_fixup_qportals(void *blob)
char compat[64];
int compat_len;
+#ifndef CONFIG_PPC
+ int smmu_ph = fdt_get_smmu_phandle(blob);
+#endif
+
maj = (rev_1 >> 8) & 0xff;
min = rev_1 & 0xff;
ip_cfg = rev_2 & 0xff;
@@ -188,7 +211,6 @@ void fdt_fixup_qportals(void *blob)
off = fdt_node_offset_by_compatible(blob, -1, "fsl,qman-portal");
while (off != -FDT_ERR_NOTFOUND) {
-#ifdef CONFIG_PPC
#ifdef CONFIG_FSL_CORENET
u32 liodns[2];
#endif
@@ -198,12 +220,7 @@ void fdt_fixup_qportals(void *blob)
if (!ci)
goto err;
- i = *ci;
-#ifdef CONFIG_SYS_DPAA_FMAN
- int j;
-#endif
-
-#endif /* CONFIG_PPC */
+ i = fdt32_to_cpu(*ci);
err = fdt_setprop(blob, off, "compatible", compat, compat_len);
if (err < 0)
goto err;
@@ -235,7 +252,7 @@ void fdt_fixup_qportals(void *blob)
#endif
#ifdef CONFIG_SYS_DPAA_FMAN
- for (j = 0; j < CONFIG_SYS_NUM_FMAN; j++) {
+ for (int j = 0; j < CONFIG_SYS_NUM_FMAN; j++) {
char name[] = "fman@0";
name[sizeof(name) - 2] = '0' + j;
@@ -251,6 +268,16 @@ void fdt_fixup_qportals(void *blob)
if (err < 0)
goto err;
#endif
+#else
+ if (smmu_ph >= 0) {
+ u32 icids[3];
+
+ icids[0] = qp_info[i].icid;
+ icids[1] = qp_info[i].dicid;
+ icids[2] = qp_info[i].ficid;
+
+
[U-Boot] [PATCH v3 7/7] armv8: ls1046a: setup fman ports ICIDs and device tree
Add support for ICID setting of fman ports and
the required device tree fixups.
Signed-off-by: Laurentiu Tudor
---
arch/arm/cpu/armv8/fsl-layerscape/icid.c | 82 +++
.../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 30 +++
.../asm/arch-fsl-layerscape/fsl_icid.h| 10 +++
3 files changed, 122 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c
b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
index 8694bd6fa1..9502f83ac8 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/icid.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
static void set_icid(struct icid_id_table *tbl, int size)
{
@@ -19,10 +20,27 @@ static void set_icid(struct icid_id_table *tbl, int size)
out_be32((u32 *)(tbl[i].reg_addr), tbl[i].reg);
}
+#ifdef CONFIG_SYS_FMAN_V3
+void set_fman_icids(struct fman_icid_id_table *tbl, int size)
+{
+ int i;
+ ccsr_fman_t *fm = (void *)CONFIG_SYS_FSL_FM1_ADDR;
+
+ for (i = 0; i < size; i++) {
+ out_be32(>fm_bmi_common.fmbm_ppid[tbl[i].port_id - 1],
+tbl[i].icid);
+ }
+}
+#endif
+
void set_icids(void)
{
/* setup general icid offsets */
set_icid(icid_tbl, icid_tbl_sz);
+
+#ifdef CONFIG_SYS_FMAN_V3
+ set_fman_icids(fman_icid_tbl, fman_icid_tbl_sz);
+#endif
}
int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids)
@@ -76,6 +94,66 @@ int fdt_fixup_icid_tbl(void *blob, int smmu_ph,
return 0;
}
+#ifdef CONFIG_SYS_FMAN_V3
+int get_fman_port_icid(int port_id, struct fman_icid_id_table *tbl,
+ const int size)
+{
+ int i;
+
+ for (i = 0; i < size; i++) {
+ if (tbl[i].port_id == port_id)
+ return tbl[i].icid;
+ }
+
+ return -1;
+}
+
+void fdt_fixup_fman_port_icid_by_compat(void *blob, int smmu_ph,
+ const char *compat)
+{
+ int noff, len, icid;
+ const u32 *prop;
+
+ noff = fdt_node_offset_by_compatible(blob, -1, compat);
+ while (noff > 0) {
+ prop = fdt_getprop(blob, noff, "cell-index", );
+ if (!prop) {
+ printf("WARNING missing cell-index for fman port\n");
+ continue;
+ }
+ if (len != 4) {
+ printf("WARNING bad cell-index size for fman port\n");
+ continue;
+ }
+
+ icid = get_fman_port_icid(fdt32_to_cpu(*prop),
+ fman_icid_tbl, fman_icid_tbl_sz);
+ if (icid < 0) {
+ printf("WARNING unknown ICID for fman port %d\n",
+ *prop);
+ continue;
+ }
+
+ fdt_set_iommu_prop(blob, noff, smmu_ph, (u32 *), 1);
+
+ noff = fdt_node_offset_by_compatible(blob, noff, compat);
+ }
+}
+
+void fdt_fixup_fman_icids(void *blob, int smmu_ph)
+{
+ static const char * const compats[] = {
+ "fsl,fman-v3-port-oh",
+ "fsl,fman-v3-port-rx",
+ "fsl,fman-v3-port-tx",
+ };
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(compats); i++)
+ fdt_fixup_fman_port_icid_by_compat(blob, smmu_ph, compats[i]);
+}
+#endif
+
int fdt_get_smmu_phandle(void *blob)
{
int noff, smmu_ph;
@@ -108,4 +186,8 @@ void fdt_fixup_icid(void *blob)
return;
fdt_fixup_icid_tbl(blob, smmu_ph, icid_tbl, icid_tbl_sz);
+
+#ifdef CONFIG_SYS_FMAN_V3
+ fdt_fixup_fman_icids(blob, smmu_ph);
+#endif
}
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
index 80e1ceadc0..30c7d8d28a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -43,3 +43,33 @@ struct icid_id_table icid_tbl[] = {
};
int icid_tbl_sz = ARRAY_SIZE(icid_tbl);
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+struct fman_icid_id_table fman_icid_tbl[] = {
+ /* port id, icid */
+ SET_FMAN_ICID_ENTRY(0x02, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x03, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x04, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x05, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x06, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x07, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x08, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x09, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x0a, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x0b, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x0c, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x0d, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x28, FSL_DPAA1_STREAM_ID_END),
+
[U-Boot] [PATCH v3 2/7] armv8: ls1046a: advertise QMan v3 in configuration
The QMan IP block in this SoC is version 3.2 so advertise this in the SoC configuration header. Signed-off-by: Laurentiu Tudor --- arch/arm/include/asm/arch-fsl-layerscape/config.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 23faffd9fc..8a05148136 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -257,6 +257,7 @@ #elif defined(CONFIG_ARCH_LS1046A) #define CONFIG_SYS_FMAN_V3 +#define CONFIG_SYS_FSL_QMAN_V3 #define CONFIG_SYS_NUM_FMAN1 #define CONFIG_SYS_NUM_FM1_DTSEC 8 #define CONFIG_SYS_NUM_FM1_10GEC 2 -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 1/7] armv8: fsl-layerscape: add missing register blocks base address defines
Add defines for the edma and qdma register block base addresses. Signed-off-by: Laurentiu Tudor --- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 5b4767e0fe..644a16dd30 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -88,8 +88,12 @@ #define LPUART_BASE(CONFIG_SYS_IMMR + 0x0195) +#define EDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x01c0) + #define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x0220) +#define QDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x0738) + #define CONFIG_SYS_PCIE1_PHYS_ADDR 0x40ULL #define CONFIG_SYS_PCIE2_PHYS_ADDR 0x48ULL #define CONFIG_SYS_PCIE3_PHYS_ADDR 0x50ULL -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 3/7] misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms
QMAN_BAR{E} register setup was disabled on ARM platforms, however the
register does need to be set. Enable the code also on ARMs and fix the
CONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the newly
enabled code works.
Signed-off-by: Laurentiu Tudor
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 3 +--
drivers/misc/fsl_portals.c | 2 --
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 644a16dd30..d22ec70aa5 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -57,8 +57,7 @@
#define CONFIG_SYS_BMAN_SWP_ISDR_REG0x3E80
#define CONFIG_SYS_QMAN_NUM_PORTALS10
#define CONFIG_SYS_QMAN_MEM_BASE 0x5
-#define CONFIG_SYS_QMAN_MEM_PHYS (0xfull + \
- CONFIG_SYS_QMAN_MEM_BASE)
+#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE
#define CONFIG_SYS_QMAN_MEM_SIZE 0x0800
#define CONFIG_SYS_QMAN_SP_CENA_SIZE0x1
#define CONFIG_SYS_QMAN_SP_CINH_SIZE0x1
diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
index 7c22b8d209..22faf16751 100644
--- a/drivers/misc/fsl_portals.c
+++ b/drivers/misc/fsl_portals.c
@@ -24,7 +24,6 @@ void setup_qbman_portals(void)
CONFIG_SYS_BMAN_SWP_ISDR_REG;
void __iomem *qpaddr = (void *)CONFIG_SYS_QMAN_CINH_BASE +
CONFIG_SYS_QMAN_SWP_ISDR_REG;
-#ifdef CONFIG_PPC
struct ccsr_qman *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR;
/* Set the Qman initiator BAR to match the LAW (for DQRR stashing) */
@@ -32,7 +31,6 @@ void setup_qbman_portals(void)
out_be32(>qcsp_bare, (u32)(CONFIG_SYS_QMAN_MEM_PHYS >> 32));
#endif
out_be32(>qcsp_bar, (u32)CONFIG_SYS_QMAN_MEM_PHYS);
-#endif
#ifdef CONFIG_FSL_CORENET
int i;
--
2.17.1
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[U-Boot] [PATCH v3 0/7] LS1046A SMMU enabling patches
This patch series adds the required devices setup and device tree
fixups for SMMU enablement on LS1046A chips. The approach taken tries
to mimic the implementation of PAMU LIODN setup on booke powerpc.
First 4 patches contain some fixes and add some missing bits & pieces.
Last 3 patches add the actual infrastructure for ICID setup, qman
portal and fman ICID configuration.
Changes in v3:
- cleaner QMAN_BAR setup
- moved SoC specific bits from generic ICID arch setup to board code
Changes in v2:
- drop CONFIG_SYS_ prefix from newly introduced defines in patch [1/7]
Laurentiu Tudor (7):
armv8: fsl-layerscape: add missing register blocks base address
defines
armv8: ls1046a: advertise QMan v3 in configuration
misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms
armv8: fsl-layerscape: add missing debug stream ID
armv8: ls1046a: initial icid setup support
armv8: ls1046a: add icid setup for qman portals
armv8: ls1046a: setup fman ports ICIDs and device tree
arch/arm/cpu/armv8/fsl-layerscape/Makefile| 1 +
arch/arm/cpu/armv8/fsl-layerscape/icid.c | 193 ++
.../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 75 +++
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 3 +
.../include/asm/arch-fsl-layerscape/config.h | 1 +
.../asm/arch-fsl-layerscape/fsl_icid.h| 90
.../asm/arch-fsl-layerscape/fsl_portals.h | 23 +++
.../asm/arch-fsl-layerscape/immap_lsch2.h | 7 +-
.../asm/arch-fsl-layerscape/stream_id_lsch2.h | 1 +
board/freescale/ls1046aqds/ls1046aqds.c | 2 +
board/freescale/ls1046ardb/ls1046ardb.c | 3 +
drivers/misc/fsl_portals.c| 45 +++-
12 files changed, 432 insertions(+), 12 deletions(-)
create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/icid.c
create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
--
2.17.1
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[U-Boot] [RFC PATCH 2/2] spl: Make the spl_nand_load_image static
Signed-off-by: Michael Trimarchi
---
common/spl/spl_nand.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index b96fce2..527cfc0 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -12,7 +12,7 @@
#include
#if defined(CONFIG_SPL_NAND_RAW_ONLY)
-int spl_nand_load_image(struct spl_image_info *spl_image,
+static int spl_nand_load_image(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
nand_init();
--
2.7.4
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[U-Boot] [RFC PATCH 1/2] spl: Fix redundant image of uboot
We need to address the redundat image case and undestand if the
image is corrupted or not and fallback to the copy. The function
used before was always return 0 without any evaluation of the
error. We try to make it work properly
Signed-off-by: Michael Trimarchi
---
common/spl/spl_nand.c | 34 +-
1 file changed, 25 insertions(+), 9 deletions(-)
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index 9a52500..b96fce2 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -44,9 +44,7 @@ static int spl_nand_load_element(struct spl_image_info
*spl_image,
{
int err;
- err = nand_spl_load_image(offset, sizeof(*header), (void *)header);
- if (err)
- return err;
+ nand_spl_load_image(offset, sizeof(*header), (void *)header);
if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
image_get_magic(header) == FDT_MAGIC) {
@@ -59,13 +57,31 @@ static int spl_nand_load_element(struct spl_image_info
*spl_image,
load.bl_len = 1;
load.read = spl_nand_fit_read;
return spl_load_simple_fit(spl_image, , offset, header);
- } else {
- err = spl_parse_image_header(spl_image, header);
- if (err)
- return err;
- return nand_spl_load_image(offset, spl_image->size,
- (void *)(ulong)spl_image->load_addr);
}
+ err = spl_parse_image_header(spl_image, header);
+ if (err)
+ return err;
+
+ nand_spl_load_image(offset, spl_image->size,
+ (void *)(ulong)spl_image->load_addr);
+
+ /*
+* Logic of the error is inverted for image_check* functions.
+* We want to verify that header is correct and the data are correct
+* for LEGACY image type
+*/
+ err = image_check_hcrc((const image_header_t *)spl_image->load_addr);
+ if (!err) {
+ debug("Header checksum failed\n");
+ return -EINVAL;
+ }
+ err = image_check_dcrc((const image_header_t *)spl_image->load_addr);
+ if (!err) {
+ debug("Image checksum failed\n");
+ return -EINVAL;
+ }
+
+ return 0;
}
static int spl_nand_load_image(struct spl_image_info *spl_image,
--
2.7.4
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[U-Boot] [PATCH 2/2] spl: Make the spl_nand_load_image static
Change-Id: I1c2f71e75fc052c54fc94b13d0942cb9e75ff1c6
Signed-off-by: Michael Trimarchi
---
common/spl/spl_nand.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index b96fce2..527cfc0 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -12,7 +12,7 @@
#include
#if defined(CONFIG_SPL_NAND_RAW_ONLY)
-int spl_nand_load_image(struct spl_image_info *spl_image,
+static int spl_nand_load_image(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
nand_init();
--
2.7.4
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[U-Boot] [PATCH 1/2] spl: Fix redundant image of uboot
We need to address the redundat image case and undestand if the
image is corrupted or not and fallback to the copy. The function
used before was always return 0 without any evaluation of the
error. We try to make it work properly
Change-Id: Id6fc221c5cc08934b7324dd5d319b93c56e2e678
Signed-off-by: Michael Trimarchi
---
common/spl/spl_nand.c | 34 +-
1 file changed, 25 insertions(+), 9 deletions(-)
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index 9a52500..b96fce2 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -44,9 +44,7 @@ static int spl_nand_load_element(struct spl_image_info
*spl_image,
{
int err;
- err = nand_spl_load_image(offset, sizeof(*header), (void *)header);
- if (err)
- return err;
+ nand_spl_load_image(offset, sizeof(*header), (void *)header);
if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
image_get_magic(header) == FDT_MAGIC) {
@@ -59,13 +57,31 @@ static int spl_nand_load_element(struct spl_image_info
*spl_image,
load.bl_len = 1;
load.read = spl_nand_fit_read;
return spl_load_simple_fit(spl_image, , offset, header);
- } else {
- err = spl_parse_image_header(spl_image, header);
- if (err)
- return err;
- return nand_spl_load_image(offset, spl_image->size,
- (void *)(ulong)spl_image->load_addr);
}
+ err = spl_parse_image_header(spl_image, header);
+ if (err)
+ return err;
+
+ nand_spl_load_image(offset, spl_image->size,
+ (void *)(ulong)spl_image->load_addr);
+
+ /*
+* Logic of the error is inverted for image_check* functions.
+* We want to verify that header is correct and the data are correct
+* for LEGACY image type
+*/
+ err = image_check_hcrc((const image_header_t *)spl_image->load_addr);
+ if (!err) {
+ debug("Header checksum failed\n");
+ return -EINVAL;
+ }
+ err = image_check_dcrc((const image_header_t *)spl_image->load_addr);
+ if (!err) {
+ debug("Image checksum failed\n");
+ return -EINVAL;
+ }
+
+ return 0;
}
static int spl_nand_load_image(struct spl_image_info *spl_image,
--
2.7.4
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Re: [U-Boot] [PATCH 6/7] usb: rockchip: be quiet on serial port while transferring data
Hi Lukasz
On Tue, Jul 03, 2018 at 11:49:16PM +0200, Lukasz Majewski wrote:
> Hi Alberto,
>
> > While downloading or uploading megabytes of data we had thousands of
> > dummy lines like:
> >
> > transfer 0x1 bytes done
> > OR
> > Uploading 0x1000 bytes
> >
> > even on non-debug builds. This because transfers are chunked and
> > code running on target does not have any clue about when the current
> > chunk is the last one.
>
> Is there any other indication to show if the board is still working?
>
> Something like '' present in fastboot?
>
No there is no other indication on board side, but workstation side
will print percentage of complete.
Since chunks are small and all chunks will feedback success or error,
on workstation you'll have clear view about board frozen or transfer
failed. On board side errors will be prompted.
Fastboot is different: workstation tool do just download data
which is buffered in memory and than flashed. Workstation than
obtain a result at the end of the process, so an indication about things
are proceeding is than really useful.
Best Regards,
Alberto Panizzo
--
Presidente CDA
Amarula Solutions SRL Via le Canevare 30 31100 Treviso Italy
CTO - Co-Founder
Amarula Solutions BV Cruquiuskade 47 Amsterdam 1018 AM The Netherlands
Phone. +31(0)851119171 Fax. +31(0)204106211 www.amarulasolutions.com
> >
> > Signed-off-by: Alberto Panizzo
> > ---
> > drivers/usb/gadget/f_rockusb.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/usb/gadget/f_rockusb.c
> > b/drivers/usb/gadget/f_rockusb.c index 230fbec..4fc8484 100644
> > --- a/drivers/usb/gadget/f_rockusb.c
> > +++ b/drivers/usb/gadget/f_rockusb.c
> > @@ -501,7 +501,7 @@ static void tx_handler_ul_image(struct usb_ep
> > *ep, struct usb_request *req) memcpy(in_req->buf, rbuffer,
> > transfer_size); in_req->length = transfer_size;
> > in_req->complete = tx_handler_ul_image;
> > - printf("Uploading 0x%x bytes\n", transfer_size);
> > + debug("Uploading 0x%x bytes\n", transfer_size);
> > usb_ep_dequeue(rockusb_func->in_ep, in_req);
> > ret = usb_ep_queue(rockusb_func->in_ep, in_req, 0);
> > if (ret)
> > @@ -563,7 +563,7 @@ static void rx_handler_dl_image(struct usb_ep
> > *ep, struct usb_request *req) req->complete = rx_handler_command;
> > req->length = EP_BUFFER_SIZE;
> > f_rkusb->buf = f_rkusb->buf_head;
> > - printf("transfer 0x%x bytes done\n",
> > f_rkusb->dl_size);
> > + debug("transfer 0x%x bytes done\n",
> > f_rkusb->dl_size); f_rkusb->dl_size = 0;
> > rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_GOOD,
> > USB_BULK_CS_WRAP_LEN);
>
>
>
>
> Best regards,
>
> Lukasz Majewski
>
> --
>
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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Re: [U-Boot] [PATCH 4/7] usb: rockchip: implement K_FW_LBA_READ_10 command
Hi Lukasz,
On Tue, Jul 03, 2018 at 11:42:11PM +0200, Lukasz Majewski wrote:
> Hi Alberto,
>
> > It is now possible to read from block device al logic layer.
> ^^^ - what do you
> mean by logic layer?
>
This does refer to rockusb nomenclature: where with rkdeveloptool
from workstation we use the "rl" command using LBA addresses.
I'll rephrase.
> I suppose this code is to read N blocks (512B) from eMMC device?
>
> NOTE:
>
> Please consider adding tests into test/py/tests/ as we already have
> such tests for test_ums.py and test_dfu.py
I'll try, it's on my TODO
>
> > Corresponding command on workstation is:
> > rkdeveloptool rl
> >
> > Signed-off-by: Alberto Panizzo
> > ---
> > arch/arm/include/asm/arch-rockchip/f_rockusb.h | 2 +
> > drivers/usb/gadget/f_rockusb.c | 102
> > - 2 files changed, 103 insertions(+), 1
> > deletion(-)
> >
> > diff --git a/arch/arm/include/asm/arch-rockchip/f_rockusb.h
> > b/arch/arm/include/asm/arch-rockchip/f_rockusb.h index
> > f5cad8e..f04d401 100644 ---
> > a/arch/arm/include/asm/arch-rockchip/f_rockusb.h +++
> > b/arch/arm/include/asm/arch-rockchip/f_rockusb.h @@ -120,6 +120,8 @@
> > struct f_rockusb { unsigned int lba;
> > unsigned int dl_size;
> > unsigned int dl_bytes;
> > + unsigned int ul_size;
> > + unsigned int ul_bytes;
>
> We had similar problem with Samsung's THOR. unsigned int may be too
> little in a while (we got int) ...
>
> > struct blk_desc *desc;
> > int reboot_flag;
> > void *buf;
> > diff --git a/drivers/usb/gadget/f_rockusb.c
> > b/drivers/usb/gadget/f_rockusb.c index 7612871..dbf31cb 100644
> > --- a/drivers/usb/gadget/f_rockusb.c
> > +++ b/drivers/usb/gadget/f_rockusb.c
> > @@ -340,6 +340,7 @@ static int rockusb_tx_write(const char *buffer,
> > unsigned int buffer_size)
> > memcpy(in_req->buf, buffer, buffer_size);
> > in_req->length = buffer_size;
> > + debug("Transferring 0x%x bytes\n", buffer_size);
> > usb_ep_dequeue(rockusb_func->in_ep, in_req);
> > ret = usb_ep_queue(rockusb_func->in_ep, in_req, 0);
> > if (ret)
> > @@ -434,6 +435,79 @@ static unsigned int rx_bytes_expected(struct
> > usb_ep *ep) return rx_remain;
> > }
> >
> > +/* usb_request complete call back to handle upload image */
> > +static void tx_handler_ul_image(struct usb_ep *ep, struct
> > usb_request *req) +{
> > +#define RBUFFER_SIZE 4096
>
> This can be moved to header file.
>
> > + ALLOC_CACHE_ALIGN_BUFFER(char, rbuffer, RBUFFER_SIZE);
> > + struct f_rockusb *f_rkusb = get_rkusb();
> > + struct usb_request *in_req = rockusb_func->in_req;
> > + int ret;
> > +
> > + if (!f_rkusb->desc) {
> > + char *type = f_rkusb->dev_type;
> > + int index = f_rkusb->dev_index;
> > +
> > + f_rkusb->desc = blk_get_dev(type, index);
> > + if (!f_rkusb->desc ||
> > + f_rkusb->desc->type == DEV_TYPE_UNKNOWN) {
> > + puts("invalid mmc device\n");
> > + rockusb_tx_write_csw(f_rkusb->tag, 0,
> > CSW_FAIL,
> > +USB_BULK_CS_WRAP_LEN);
> > + return;
> > + }
> > + }
> > +
> > + /* Print error status of previous transfer */
> > + if (req->status)
> > + debug("status: %d ep '%s' trans: %d len %d\n",
> > req->status,
> > + ep->name, req->actual, req->length);
> > +
> > + /* On transfer complete reset in_req and feedback host with
> > CSW_GOOD */
> > + if (f_rkusb->ul_bytes >= f_rkusb->ul_size) {
> > + in_req->length = 0;
> > + in_req->complete = rockusb_complete;
> > +
> > + rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_GOOD,
> > +USB_BULK_CS_WRAP_LEN);
> > + return;
> > + }
> > +
> > + /* Proceed with current chunk */
> > + unsigned int transfer_size = f_rkusb->ul_size -
> > f_rkusb->ul_bytes; +
> > + if (transfer_size > RBUFFER_SIZE)
> > + transfer_size = RBUFFER_SIZE;
> > + /* Read at least one block */
> > + unsigned int blkcount = (transfer_size + 511) / 512;
> > +
> > + debug("ul %x bytes, %x blks, read lba %x, ul_size:%x,
> > ul_bytes:%x, ",
> > + transfer_size, blkcount, f_rkusb->lba,
> > + f_rkusb->ul_size, f_rkusb->ul_bytes);
> > +
> > + int blks = blk_dread(f_rkusb->desc, f_rkusb->lba, blkcount,
> > rbuffer); +
> > + if (blks != blkcount) {
> > + printf("failed reading from device %s: %d\n",
> > + f_rkusb->dev_type, f_rkusb->dev_index);
> > + rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_FAIL,
> > +USB_BULK_CS_WRAP_LEN);
> > + return;
> > + }
> > + f_rkusb->lba += blkcount;
> > + f_rkusb->ul_bytes += transfer_size;
> > +
> > + /* Proceed with USB request */
> > + memcpy(in_req->buf, rbuffer,
Re: [U-Boot] [PATCH 2/7] usb: rockchip: implement skeleton for K_FW_GET_CHIP_VER command
On Tue, Jul 03, 2018 at 11:33:45PM +0200, Lukasz Majewski wrote:
> Hi Alberto,
>
> > Chip Version is a string saved in BOOTROM address space Little Endian.
> >
> > Ex for rk3288: 0x33323041 0x32303134 0x30383133 0x56323030
> > which brings: 320A20140813V200
> >
> > Note that memory version do invert MSB/LSB so printing the char
> > buffer will show: A02341023180002V
> >
> > Signed-off-by: Alberto Panizzo
> > ---
> > drivers/usb/gadget/f_rockusb.c | 38
> > +- 1 file changed, 37
> > insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/usb/gadget/f_rockusb.c
> > b/drivers/usb/gadget/f_rockusb.c index a39ad51..7612871 100644
> > --- a/drivers/usb/gadget/f_rockusb.c
> > +++ b/drivers/usb/gadget/f_rockusb.c
> > @@ -532,6 +532,42 @@ static void cb_read_storage_id(struct usb_ep
> > *ep, struct usb_request *req) CSW_GOOD);
> > }
> >
> > +int __weak rk_get_bootrom_chip_version(unsigned int *chip_info, int
> > size) +{
> > + return 0;
> > +}
> > +
> > +static void cb_get_chip_version(struct usb_ep *ep, struct
> > usb_request *req) +{
> > + ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
> > +sizeof(struct fsg_bulk_cb_wrap));
> > + unsigned int chip_info[4], i;
> > +
> > + memset(chip_info, 0, sizeof(chip_info));
> > + rk_get_bootrom_chip_version(chip_info, 4);
> > +
> > + /*
> > +* Chip Version is a string saved in BOOTROM address space
> > Little Endian
> > +*
> > +* Ex for rk3288: 0x33323041 0x32303134 0x30383133 0x56323030
> > +* which brings: 320A20140813V200
> > +*
> > +* Note that memory version do invert MSB/LSB so printing
> > the char
> > +* buffer will show: A02341023180002V
> > +*/
> > + printf("read chip version: ");
> > + for (i = 0; i < 16; i++) {
> > + int shift = (3 - (i % 4)) * 8;
> > +
> > + printf("%c", (char)((chip_info[i / 4] >> shift) &
> > 0xFF));
>
> A lot of magic numbers. Just to ask - isn't this the same type of
> conversion as we got with the network code?
>
> Cannot we have simple macro (or static inline) with byte swap called
> three times?
>
Will doublecheck but looks possible.
> > + }
> > + printf("\n");
> > + memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
> > + rockusb_tx_write((char *)chip_info, sizeof(chip_info));
> ^ [1]
>
> > + rockusb_tx_write_csw_on_complete(cbw->tag,
> ^-[2]
>
> > cbw->data_transfer_length,
> > +CSW_GOOD);
>
> Just to be sure if I understand the protocol -> you write the data in
> [1]
> And then immediately you prepare next block (structure) [2] to be
> written back after receiving reply data from host?
No, Host just waits for a second message as CSW.
What I did with first patch was to serialize sending of both USB
messages, so that sending the second would not voiding the first.
>
> Is this behaviour in sync with README in ./doc/README.rockusb ?
>
You are right, I completely missed to update doc/README.rockusb
Thanks,
Best Regards,
Alberto Panizzo
--
Presidente CDA
Amarula Solutions SRL Via le Canevare 30 31100 Treviso Italy
CTO - Co-Founder
Amarula Solutions BV Cruquiuskade 47 Amsterdam 1018 AM The Netherlands
Phone. +31(0)851119171 Fax. +31(0)204106211 www.amarulasolutions.com
> > +}
> > +
> > static void cb_write_lba(struct usb_ep *ep, struct usb_request *req)
> > {
> > ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
> > @@ -670,7 +706,7 @@ static const struct cmd_dispatch_info
> > cmd_dispatch_info[] = { },
> > {
> > .cmd = K_FW_GET_CHIP_VER,
> > - .cb = cb_not_support,
> > + .cb = cb_get_chip_version,
> > },
> > {
> > .cmd = K_FW_LOW_FORMAT,
>
>
>
>
> Best regards,
>
> Lukasz Majewski
>
> --
>
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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[U-Boot] [PATCH v7 5/6] sunxi: DT: H3: update board .dts files from Linux
Update the .dts file for the various boards with an Allwinner H3 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit 721afaa2aeb860067decdddadc84ed16f42f2048 (HEAD)
Merge: 7c00e8ae041b 87815dda5593
Author: Linus Torvalds
Date: Mon Jun 11 17:57:38 2018 -0700
Merge tag 'armsoc-dt' of
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
This also includes the OrangePi Zero .dts, which technically has an
Allwinner H2+ SoC.
Signed-off-by: Andre Przywara
Acked-by: Maxime Ripard
---
arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts | 51 +-
arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts| 90 +++--
arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts | 3 +-
arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts | 78 +++
arch/arm/dts/sun8i-h3-nanopi-m1.dts | 42
arch/arm/dts/sun8i-h3-nanopi-neo-air.dts | 26 -
arch/arm/dts/sun8i-h3-nanopi-neo.dts | 17
arch/arm/dts/sun8i-h3-nanopi.dtsi | 11 +-
arch/arm/dts/sun8i-h3-orangepi-2.dts | 88 +++-
arch/arm/dts/sun8i-h3-orangepi-lite.dts | 53 ++
arch/arm/dts/sun8i-h3-orangepi-one.dts| 114 +
arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts| 9 +-
arch/arm/dts/sun8i-h3-orangepi-pc.dts | 139 +-
arch/arm/dts/sun8i-h3-orangepi-plus.dts | 29 +++---
arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 15 +--
15 files changed, 604 insertions(+), 161 deletions(-)
diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
index 7c38264246..0bc031fe4c 100644
--- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -49,7 +49,6 @@
#include
#include
-#include
/ {
model = "Xunlong Orange Pi Zero";
@@ -58,6 +57,7 @@
aliases {
serial0 =
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+ ethernet0 =
ethernet1 =
};
@@ -92,9 +92,14 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <_pio 0 7 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
};
};
+ {
+ status = "okay";
+};
+
{
status = "okay";
};
@@ -109,8 +114,7 @@
{
vmmc-supply = <_vcc3v3>;
bus-width = <4>;
- cd-gpios = < 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
- cd-inverted;
+ cd-gpios = < 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
@@ -130,17 +134,56 @@
};
};
+ {
+ status = "okay";
+};
+
{
status = "okay";
};
+ {
+ /* Disable SPI NOR by default: it optional on Orange Pi Zero boards */
+ status = "disabled";
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "mxicy,mx25l1606e", "winbond,w25q128";
+ reg = <0>;
+ spi-max-frequency = <4000>;
+ };
+};
+
{
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
status = "okay";
};
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ status = "disabled";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ status = "disabled";
+};
+
+_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
{
- /* USB VBUS is always on */
+ /*
+* USB Type-A port VBUS is always on. However, MicroUSB VBUS can only
+* power up the board; when it's used as OTG port, this VBUS is
+* always off even if the board is powered via GPIO pins.
+*/
status = "okay";
+ usb0_id_det-gpios = < 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
};
diff --git a/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts
b/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts
index 124ec472d1..30540dc8e0 100644
--- a/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -46,13 +46,13 @@
#include
#include
-#include
/ {
model = "Banana Pi BPI-M2-Plus";
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
aliases {
+ ethernet0 =
serial0 =
serial1 =
};
@@ -61,10 +61,20 @@
stdout-path = "serial0:115200n8";
};
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
- pinctrl-0 = <_led_bpi_m2p>;
pwr_led {
label = "bananapi-m2-plus:red:pwr";
@@ -76,7 +86,6 @@
gpio_keys {
[U-Boot] [PATCH v7 6/6] sunxi: DT: A64: add proper SoPine baseboard device tree
When the defconfig for the SoPine baseboard was added, there wasn't any
proper DT for the board yet, so we used the Pine64 DT as a placeholder.
Copy the DT file(s) meanwhile added in Linux over to U-Boot, and use
them in our defconfig.
This is as of v4.18-rc3, exactly Linux commit:
commit 7d556bfc49adddf2beb0d16c91945c3b8b783282
Author: Jagan Teki
Date: Mon Dec 4 10:23:07 2017 +0530
arm64: allwinner: a64-sopine: Fix to use dcdc1 regulator instead of vcc3v3
Signed-off-by: Andre Przywara
Acked-by: Maxime Ripard
---
arch/arm/dts/Makefile| 3 +-
arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 150 +++
arch/arm/dts/sun50i-a64-sopine.dtsi | 142 +
configs/sopine_baseboard_defconfig | 2 +-
4 files changed, 295 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/dts/sun50i-a64-sopine-baseboard.dts
create mode 100644 arch/arm/dts/sun50i-a64-sopine.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 64f6d21c3c..3359ac725b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -390,7 +390,8 @@ dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-olinuxino.dtb \
sun50i-a64-orangepi-win.dtb \
sun50i-a64-pine64-plus.dtb \
- sun50i-a64-pine64.dtb
+ sun50i-a64-pine64.dtb \
+ sun50i-a64-sopine-baseboard.dtb
dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-optimus.dtb \
sun9i-a80-cubieboard4.dtb \
diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
new file mode 100644
index 00..abe179de35
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
@@ -0,0 +1,150 @@
+/*
+ * Copyright (c) 2017 Icenowy Zheng
+ *
+ * Based on sun50i-a64-pine64.dts, which is:
+ * Copyright (c) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-sopine.dtsi"
+
+/ {
+ model = "SoPine with baseboard";
+ compatible = "pine64,sopine-baseboard", "pine64,sopine",
+"allwinner,sun50i-a64";
+
+ aliases {
+ ethernet0 =
+ serial0 =
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ reg_vcc1v8: vcc1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc1v8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ };
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <_rgmii_phy>;
+ phy-supply = <_dc1sw>;
+ status = "okay";
+};
+
+ {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ vmmc-supply = <_dcdc1>;
+ vqmmc-supply = <_vcc1v8>;
+
[U-Boot] [PATCH v7 3/6] sunxi: DT: update device tree files for Allwinner H3 and H5 SoCs
Update the device tree files from the Linux tree as of v4.18-rc3,
exactly Linux commit:
commit 55c5ba5e49a0a124ed416880e8227b493474495e
Author: Chen-Yu Tsai
Date: Tue Apr 24 19:34:22 2018 +0800
arm64: dts: allwinner: h5: Add cpu0 label for first cpu
Since the H3 and H5 are very similar (aside from the actual ARM cores),
they share most the SoC .dtsi and thus have to be updated together.
One tiny change is the removal of the "arm/" prefix from the include
path in the sun50i-h5.dtsi, which is needed because we don't share the
same sophisticated DT directory layout of Linux.
Also we need to fix up the board .dts files already, since the .dtsi
removes some pins, so the .dts can't reference them anymore. This is to
maintain bisectability.
Signed-off-by: Andre Przywara
Acked-by: Maxime Ripard
---
arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts| 2 -
arch/arm/dts/sun50i-h5-nanopi-neo2.dts | 2 -
arch/arm/dts/sun50i-h5-orangepi-pc2.dts| 2 -
arch/arm/dts/sun50i-h5-orangepi-prime.dts | 2 -
arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts | 2 -
arch/arm/dts/sun50i-h5.dtsi| 38 +-
arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts | 4 -
arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts | 6 +-
arch/arm/dts/sun8i-h3-nanopi-neo-air.dts | 2 -
arch/arm/dts/sun8i-h3-nanopi.dtsi | 2 -
arch/arm/dts/sun8i-h3-orangepi-2.dts | 4 -
arch/arm/dts/sun8i-h3-orangepi-lite.dts| 4 -
arch/arm/dts/sun8i-h3-orangepi-one.dts | 2 -
arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts | 2 -
arch/arm/dts/sun8i-h3-orangepi-pc.dts | 2 -
arch/arm/dts/sun8i-h3.dtsi | 602 +++--
arch/arm/dts/sunxi-h3-h5.dtsi | 860 +
arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi| 2 -
include/dt-bindings/clock/sun8i-de2.h | 18 +
include/dt-bindings/reset/sun8i-de2.h | 14 +
20 files changed, 1018 insertions(+), 554 deletions(-)
create mode 100644 arch/arm/dts/sunxi-h3-h5.dtsi
create mode 100644 include/dt-bindings/clock/sun8i-de2.h
create mode 100644 include/dt-bindings/reset/sun8i-de2.h
diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
index f1406c224b..8b509c94c5 100644
--- a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
+++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
@@ -72,8 +72,6 @@
};
{
- pinctrl-names = "default";
- pinctrl-0 = <_pins_a>, <_cd_pin>;
vmmc-supply = <_vcc3v3>;
bus-width = <4>;
cd-gpios = < 5 6 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo2.dts
b/arch/arm/dts/sun50i-h5-nanopi-neo2.dts
index c08af7881b..5e4dad7316 100644
--- a/arch/arm/dts/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm/dts/sun50i-h5-nanopi-neo2.dts
@@ -71,8 +71,6 @@
compatible = "allwinner,sun50i-h5-mmc",
"allwinner,sun50i-a64-mmc",
"allwinner,sun5i-a13-mmc";
- pinctrl-names = "default";
- pinctrl-0 = <_pins_a>, <_cd_pin>;
vmmc-supply = <_vcc3v3>;
bus-width = <4>;
cd-gpios = < 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
index a65300d5aa..92079dbfe0 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
@@ -100,8 +100,6 @@
compatible = "allwinner,sun50i-h5-mmc",
"allwinner,sun50i-a64-mmc",
"allwinner,sun5i-a13-mmc";
- pinctrl-names = "default";
- pinctrl-0 = <_pins_a>, <_cd_pin>;
vmmc-supply = <_vcc3v3>;
bus-width = <4>;
cd-gpios = < 5 6 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts
b/arch/arm/dts/sun50i-h5-orangepi-prime.dts
index 131d8058c4..540e5c7d93 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts
@@ -84,8 +84,6 @@
compatible = "allwinner,sun50i-h5-mmc",
"allwinner,sun50i-a64-mmc",
"allwinner,sun5i-a13-mmc";
- pinctrl-names = "default";
- pinctrl-0 = <_pins_a>, <_cd_pin>;
vmmc-supply = <_vcc3v3>;
bus-width = <4>;
cd-gpios = < 5 6 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
index 3f4baba310..bc39abead0 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
@@ -71,8 +71,6 @@
compatible = "allwinner,sun50i-h5-mmc",
"allwinner,sun50i-a64-mmc",
"allwinner,sun5i-a13-mmc";
- pinctrl-names = "default";
- pinctrl-0 = <_pins_a>, <_cd_pin>;
vmmc-supply = <_vcc3v3>;
bus-width = <4>;
cd-gpios = < 5 6 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/dts/sun50i-h5.dtsi
[U-Boot] [PATCH v7 4/6] sunxi: DT: H5: update board .dts files from Linux
Update the .dts file for the various boards with an Allwinner H5 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit af5d05bdc99c211729cba0a3d5417bccfa308caf
Author: Neil Armstrong
Date: Tue Apr 24 13:47:14 2018 +0200
arm64: dts: allwinner: Add dts file for Libre Computer Board ALL-H3-CC H5
ver.
Signed-off-by: Andre Przywara
Acked-by: Maxime Ripard
---
arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts | 5 +-
arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts| 120 +++--
arch/arm/dts/sun50i-h5-nanopi-neo2.dts | 89 -
arch/arm/dts/sun50i-h5-orangepi-pc2.dts| 149 ++---
arch/arm/dts/sun50i-h5-orangepi-prime.dts | 174 ++---
arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts | 62 -
6 files changed, 536 insertions(+), 63 deletions(-)
diff --git a/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts
b/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts
index a7e53c5c26..a35f77de22 100644
--- a/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts
+++ b/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts
@@ -1,11 +1,12 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * Copyright (C) 2018 Chen-Yu Tsai
+ * Copyright (C) 2018 BayLibre, SAS
+ * Author: Neil Armstrong
*/
/dts-v1/;
#include "sun50i-h5.dtsi"
-#include "sunxi-libretech-all-h3-cc.dtsi"
+#include
/ {
model = "Libre Computer Board ALL-H3-CC H5";
diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
index 8b509c94c5..506e25ba02 100644
--- a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
+++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
@@ -1,18 +1,18 @@
/*
* Copyright (C) 2017 Antony Antony
- * Copyright (c) 2016 ARM Ltd.
+ * Copyright (C) 2016 ARM Ltd.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
- * a) This library is free software; you can redistribute it and/or
+ * a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
- * This library is distributed in the hope that it will be useful,
+ * This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
@@ -42,16 +42,18 @@
*/
/dts-v1/;
-
#include "sun50i-h5.dtsi"
#include
+#include
+#include
/ {
- model = "FriendlyARM NanoPi NEO Plus 2";
+ model = "FriendlyARM NanoPi NEO Plus2";
compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
aliases {
+ ethernet0 =
serial0 =
};
@@ -59,24 +61,114 @@
stdout-path = "serial0:115200n8";
};
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:green:pwr";
+ gpios = <_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status {
+ label = "nanopi:red:status";
+ gpios = < 0 20 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ startup-delay-us = <10>;
+ enable-active-high;
+ gpio = < 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
};
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <110>;
+ regulator-max-microvolt = <130>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <_pio 0 6 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <110 0x0
+ 130 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+
[U-Boot] [PATCH v7 2/6] sunxi: DT: A64: update board .dts files from Linux
Update the .dts files for the various boards with an Allwinner A64 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit 818668055c9d588c9a9d151e3b258ed1adacba0b
Author: Jagan Teki
Date: Mon Apr 23 12:02:39 2018 +0530
arm64: dts: allwinner: a64: bananapi-m64: add usb otg
It updates the existing DT files, adds the newly added axp803.dtsi and
removes our temporary kludge file to get Ethernet support in U-Boot.
I left the amarula-relic alone, as this DT has not reached mainline yet.
The changes are not critical anyway, and the next sync will fix this.
Signed-off-by: Andre Przywara
Acked-by: Maxime Ripard
---
arch/arm/dts/axp803.dtsi| 155 +++
arch/arm/dts/sun50i-a64-bananapi-m64.dts| 195 ++--
arch/arm/dts/sun50i-a64-nanopi-a64.dts | 111 --
arch/arm/dts/sun50i-a64-olinuxino.dts | 153 ++-
arch/arm/dts/sun50i-a64-orangepi-win.dts| 135 ++--
arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 20 ---
arch/arm/dts/sun50i-a64-pine64-plus.dts | 17 ++-
arch/arm/dts/sun50i-a64-pine64.dts | 186 --
8 files changed, 900 insertions(+), 72 deletions(-)
create mode 100644 arch/arm/dts/axp803.dtsi
delete mode 100644 arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
diff --git a/arch/arm/dts/axp803.dtsi b/arch/arm/dts/axp803.dtsi
new file mode 100644
index 00..e5eae8bafc
--- /dev/null
+++ b/arch/arm/dts/axp803.dtsi
@@ -0,0 +1,155 @@
+/*
+ * Copyright 2017 Icenowy Zheng
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * AXP803 Integrated Power Management Chip
+ * http://files.pine64.org/doc/datasheet/pine64/AXP803_Datasheet_V1.0.pdf
+ */
+
+ {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ regulators {
+ /* Default work frequency for buck regulators */
+ x-powers,dcdc-freq = <3000>;
+
+ reg_aldo1: aldo1 {
+ regulator-name = "aldo1";
+ };
+
+ reg_aldo2: aldo2 {
+ regulator-name = "aldo2";
+ };
+
+ reg_aldo3: aldo3 {
+ regulator-name = "aldo3";
+ };
+
+ reg_dc1sw: dc1sw {
+ regulator-name = "dc1sw";
+ };
+
+ reg_dcdc1: dcdc1 {
+ regulator-name = "dcdc1";
+ };
+
+ reg_dcdc2: dcdc2 {
+ regulator-name = "dcdc2";
+ };
+
+ reg_dcdc3: dcdc3 {
+ regulator-name = "dcdc3";
+ };
+
+ reg_dcdc4: dcdc4 {
+ regulator-name = "dcdc4";
+ };
+
+ reg_dcdc5: dcdc5 {
+ regulator-name = "dcdc5";
+ };
+
+ reg_dcdc6: dcdc6 {
+ regulator-name = "dcdc6";
+ };
+
+ reg_dldo1: dldo1 {
+
[U-Boot] [PATCH v7 1/6] sunxi: DT: A64: update device tree file for Allwinner A64 SoC
Updates the device tree file from the the Linux tree as of v4.18-rc3,
exactly Linux commit:
commit c1cff65f9b16b31e731e2e75bbe06638c86e1996
Author: Harald Geyer
Date: Thu Mar 15 16:25:08 2018 +
arm64: dts: allwinner: a64: add simplefb for A64 SoC
This also pulls in the newly required include files for the clock and
reset bindings, also removes the now redundant part from our
*-u-boot.dtsi overlay file.
I kept the PWM node from U-Boot, as we recently gained this explicitly
for U-Boot's own usage and I don't want to regress here. This node is in
the queue for mainline Linux already, so the next sync will make it all
equal again.
Signed-off-by: Andre Przywara
Acked-by: Maxime Ripard
---
arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 61 +
arch/arm/dts/sun50i-a64.dtsi| 305 +---
include/dt-bindings/clock/sun8i-r-ccu.h | 59 +
include/dt-bindings/reset/sun8i-r-ccu.h | 53
4 files changed, 399 insertions(+), 79 deletions(-)
create mode 100644 include/dt-bindings/clock/sun8i-r-ccu.h
create mode 100644 include/dt-bindings/reset/sun8i-r-ccu.h
diff --git a/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
b/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
index 32a263ce3d..1b8aa3d8dc 100644
--- a/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
+++ b/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
@@ -2,58 +2,19 @@
aliases {
ethernet0 =
};
-
- soc {
- syscon: syscon@1c0 {
- compatible = "allwinner,sun50i-a64-system-controller",
-"syscon";
- reg = <0x01c0 0x1000>;
- };
-
- emac: ethernet@1c3 {
- compatible = "allwinner,sun50i-a64-emac";
- syscon = <>;
- reg = <0x01c3 0x1>;
- interrupts = ;
- interrupt-names = "macirq";
- resets = < RST_BUS_EMAC>;
- reset-names = "stmmaceth";
- clocks = < CLK_BUS_EMAC>;
- clock-names = "stmmaceth";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <_pins>;
- phy-mode = "rgmii";
- phy-handle = <_rgmii_phy>;
- status = "okay";
-
- mdio: mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
- ext_rgmii_phy: ethernet-phy@1 {
- compatible =
"ethernet-phy-ieee802.3-c22";
- reg = <1>;
- };
- };
- };
- };
};
- {
- rmii_pins: rmii_pins {
- pins = "PD10", "PD11", "PD13", "PD14", "PD17",
- "PD18", "PD19", "PD20", "PD22", "PD23";
- function = "emac";
- drive-strength = <40>;
- };
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <_rgmii_phy>;
+ status = "okay";
+};
- rgmii_pins: rgmii_pins {
- pins = "PD8", "PD9", "PD10", "PD11", "PD12",
- "PD13", "PD15", "PD16", "PD17", "PD18",
- "PD19", "PD20", "PD21", "PD22", "PD23";
- function = "emac";
- drive-strength = <40>;
+ {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
};
};
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index a82a3d89af..7a083637c4 100644
--- a/arch/arm/dts/sun50i-a64.dtsi
+++ b/arch/arm/dts/sun50i-a64.dtsi
@@ -43,6 +43,7 @@
*/
#include
+#include
#include
#include
@@ -51,6 +52,26 @@
#address-cells = <1>;
#size-cells = <1>;
+ chosen {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+/*
+ * The pipeline mixer0-lcd0 depends on clock CLK_MIXER0 from DE2 CCU.
+ * However there is no support for this clock on A64 yet, so we depend
+ * on the upstream clocks here to keep them (and thus CLK_MIXER0) up.
+ */
+ simplefb_lcd: framebuffer-lcd {
+ compatible = "allwinner,simple-framebuffer",
+"simple-framebuffer";
+ allwinner,pipeline = "mixer0-lcd0";
+ clocks = < CLK_TCON0>,
+< CLK_DE>, < CLK_BUS_DE>;
+ status = "disabled";
+ };
+ };
+
cpus {
[U-Boot] [PATCH v7 0/6] sunxi: sync H3, H5, A64 DTs from mainline Linux
This is an updated version of the series which brings the exact mainline Linux device tree files for various Allwinner boards into U-Boot. Apart from using the usually more correct reference DT files, this offers the big benefit of being able to use U-Boot's DT copy for directly passing it to the kernel. This avoids to actually load a .dtb file from somewhere, and allows seamless and automatic UEFI booting, so distribution installer images should just work (TM). This covers the ARMv8 SoCs (H5, A64), but also all boards with the H3, as this is somewhat married to the H5 and can only be updated together. The H3 and H5 DT files have diverged quite a bit, but as U-Boot's own usage of the DT is (yet) quite limited, there should be no regressions. The patches are split to first update the SoC .dtsi file, then the board .dts files in a second patch. They are grouped to handle the A64 first, then the H5 and H3. I put the respective kernel commit IDs in the commit messages. Patch 6 brings in the mainline DT for the SoPine baseboard, for which we didn't have a separate .dts in U-Boot so far. This is based on origin/master, and requires the USB shutdown fix. Please let me know what I should it base it against, maybe closer to the time we actually want to merge this (to avoid playing cat and mouse here). Maxime, I kept you Acked-by: from the previous posts, as I literally just updated to the latest Linux master, which went through your review anyway. Hope that's OK for you. Cheers, Andre. Changelog v6 .. v7: - drop Pine64-LTS DT (will send it to Linux first) - update to Linux v4.18-rc3 Changelog v5 .. v6: - bring back DT update patches - update to Linux v4.17-rc5 Changelog v4 .. v5: - drop Linux DT update patches for now - fix minor checkpatch complaints Changelog v3 .. v4: - remove MMC environment for all Allwinner boards (including 32 bit ones) - keep MMC environment offset to the old values - drop DT adjustments to use fixed MMC regulator Changelog v2 .. v3: 01: added, was on the list before 02: drop redundant H5 line 03-08: unchanged 09-20: added Changelog v1 .. v2: 01, 02, 03: unchanged 04, 05, 06, 07: added Andre Przywara (6): sunxi: DT: A64: update device tree file for Allwinner A64 SoC sunxi: DT: A64: update board .dts files from Linux sunxi: DT: update device tree files for Allwinner H3 and H5 SoCs sunxi: DT: H5: update board .dts files from Linux sunxi: DT: H3: update board .dts files from Linux sunxi: DT: A64: add proper SoPine baseboard device tree arch/arm/dts/Makefile | 3 +- arch/arm/dts/axp803.dtsi| 155 + arch/arm/dts/sun50i-a64-bananapi-m64.dts| 195 +- arch/arm/dts/sun50i-a64-nanopi-a64.dts | 111 ++- arch/arm/dts/sun50i-a64-olinuxino.dts | 153 - arch/arm/dts/sun50i-a64-orangepi-win.dts| 135 +++- arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 59 -- arch/arm/dts/sun50i-a64-pine64-plus.dts | 17 +- arch/arm/dts/sun50i-a64-pine64.dts | 186 - arch/arm/dts/sun50i-a64-sopine-baseboard.dts| 150 + arch/arm/dts/sun50i-a64-sopine.dtsi | 142 arch/arm/dts/sun50i-a64.dtsi| 305 - arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts | 5 +- arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 122 +++- arch/arm/dts/sun50i-h5-nanopi-neo2.dts | 91 ++- arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 151 - arch/arm/dts/sun50i-h5-orangepi-prime.dts | 176 - arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts | 64 +- arch/arm/dts/sun50i-h5.dtsi | 38 +- arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts| 55 +- arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts | 96 ++- arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts | 3 +- arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts| 78 +++ arch/arm/dts/sun8i-h3-nanopi-m1.dts | 42 ++ arch/arm/dts/sun8i-h3-nanopi-neo-air.dts| 28 +- arch/arm/dts/sun8i-h3-nanopi-neo.dts| 17 + arch/arm/dts/sun8i-h3-nanopi.dtsi | 13 +- arch/arm/dts/sun8i-h3-orangepi-2.dts| 92 ++- arch/arm/dts/sun8i-h3-orangepi-lite.dts | 57 +- arch/arm/dts/sun8i-h3-orangepi-one.dts | 116 +++- arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts | 11 +- arch/arm/dts/sun8i-h3-orangepi-pc.dts | 141 +++- arch/arm/dts/sun8i-h3-orangepi-plus.dts | 29 +- arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 15 +- arch/arm/dts/sun8i-h3.dtsi | 602 +++-- arch/arm/dts/sunxi-h3-h5.dtsi | 860 arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi | 2 - configs/sopine_baseboard_defconfig | 2 +- include/dt-bindings/clock/sun8i-de2.h | 18 + include/dt-bindings/clock/sun8i-r-ccu.h | 59 ++ include/dt-bindings/reset/sun8i-de2.h | 14 +
Re: [U-Boot] [PATCH v3 3/7] uclass: Add dev_get_uclass_index() to get the uclass/index of a device
On 30/06/2018 06:19, Simon Glass wrote: Hi Jean-Jacques, On 22 June 2018 at 05:25, Jean-Jacques Hiblot wrote: This function is the reciprocal of uclass_find_device(). It will be used to print the index information in dm tree dump. Signed-off-by: Jean-Jacques Hiblot --- Changes in v3: - update commit log - fixed problem with the function name Changes in v2: None drivers/core/uclass.c| 21 + include/dm/uclass-internal.h | 11 +++ 2 files changed, 32 insertions(+) Reviewed-by: Simon Glass But this does need a sandbox test in test/dm/ofnode.c. I will not be able to add one before a few weeks. JJ ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] rpi: Set the default mmc max device to 2
On Wed, 4 Jul 2018 09:25:16 +0200 Alexander Graf wrote: > On 07/04/2018 09:08 AM, Emmanuel Vadot wrote: > > When running with special configuration (OF_BOARD and mmc overlay) > > RPI have the SD card as id 1. > > This make device enumeration fails when using the API. > > > > Signed-off-by: Emmanuel Vadot > > Could you please elaborate a bit? From the commit message I don't fully > understand which problem you're trying to solve. > > > Thanks, > > Alex Sure, When using the dtb from the rpi fundation and the mmc overlay (which switch back the sd card to use the SDHCI controller and not the SDHOST one) and using OF_BOARD so u-boot uses it/pass it to the OS the device id for the sd is 1 : U-Boot> mmc list mmc@7e30: 1 This cause the API (see api/api_storage.c) code to never expose this device to the consumer as the default value for CONFIG_SYS_MMC_MAX_DEVICE is 1. If it's more clear I'll send a v2 with those words. Cheers, > > --- > > include/configs/rpi.h | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/include/configs/rpi.h b/include/configs/rpi.h > > index a97550b732..26fc9b9d95 100644 > > --- a/include/configs/rpi.h > > +++ b/include/configs/rpi.h > > @@ -69,6 +69,8 @@ > > #define CONFIG_MISC_INIT_R > > #endif > > > > +#define CONFIG_SYS_MMC_MAX_DEVICE 2 > > + > > /* Console configuration */ > > #define CONFIG_SYS_CBSIZE 1024 > > -- Emmanuel Vadot ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/1] net: Store waiting packet in a different buffer when making ARP requests
Currently, upon receiving an appropriate ARP reply, the packet in
net_tx_packet is sent. However, this is a common buffer used by other
protocol as well, so it may not be the original packet waiting to be sent
after ARP.
This patch repurposes another buffer, arp_tx_packet to store the waiting
packet and use the net_tx_packet to prepare ARP request.
Signed-off-by: Tran Tien Dat
---
net/arp.c | 18 ++
net/arp.h | 1 +
net/net.c | 3 +++
3 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/net/arp.c b/net/arp.c
index b8a71684cd..f5e2c0b0cf 100644
--- a/net/arp.c
+++ b/net/arp.c
@@ -35,8 +35,8 @@ int arp_wait_tx_packet_size;
ulong arp_wait_timer_start;
intarp_wait_try;
-static uchar *arp_tx_packet; /* THE ARP transmit packet */
-static uchar arp_tx_packet_buf[PKTSIZE_ALIGN + PKTALIGN];
+uchar *arp_wait_tx_packet; /* THE waiting transmit packet after ARP */
+static uchar arp_wait_tx_packet_buf[PKTSIZE_ALIGN + PKTALIGN];
void arp_init(void)
{
@@ -45,8 +45,8 @@ void arp_init(void)
net_arp_wait_packet_ip.s_addr = 0;
net_arp_wait_reply_ip.s_addr = 0;
arp_wait_tx_packet_size = 0;
- arp_tx_packet = _tx_packet_buf[0] + (PKTALIGN - 1);
- arp_tx_packet -= (ulong)arp_tx_packet % PKTALIGN;
+ arp_wait_tx_packet = _wait_tx_packet_buf[0] + (PKTALIGN - 1);
+ arp_wait_tx_packet -= (ulong)arp_wait_tx_packet % PKTALIGN;
}
void arp_raw_request(struct in_addr source_ip, const uchar *target_ethaddr,
@@ -58,7 +58,7 @@ void arp_raw_request(struct in_addr source_ip, const uchar
*target_ethaddr,
debug_cond(DEBUG_DEV_PKT, "ARP broadcast %d\n", arp_wait_try);
- pkt = arp_tx_packet;
+ pkt = net_tx_packet;
eth_hdr_size = net_set_ether(pkt, net_bcast_ethaddr, PROT_ARP);
pkt += eth_hdr_size;
@@ -76,7 +76,7 @@ void arp_raw_request(struct in_addr source_ip, const uchar
*target_ethaddr,
memcpy(>ar_tha, target_ethaddr, ARP_HLEN); /* target ET addr */
net_write_ip(>ar_tpa, target_ip); /* target IP addr */
- net_send_packet(arp_tx_packet, eth_hdr_size + ARP_HDR_SIZE);
+ net_send_packet(net_tx_packet, eth_hdr_size + ARP_HDR_SIZE);
}
void arp_request(void)
@@ -217,9 +217,11 @@ void arp_receive(struct ethernet_hdr *et, struct
ip_udp_hdr *ip, int len)
/* set the mac address in the waiting packet's header
and transmit it */
- memcpy(((struct ethernet_hdr *)net_tx_packet)->et_dest,
+ memcpy(((struct ethernet_hdr *)arp_wait_tx_packet)
+ ->et_dest,
>ar_sha, ARP_HLEN);
- net_send_packet(net_tx_packet, arp_wait_tx_packet_size);
+ net_send_packet(arp_wait_tx_packet,
+ arp_wait_tx_packet_size);
/* no arp request pending now */
net_arp_wait_packet_ip.s_addr = 0;
diff --git a/net/arp.h b/net/arp.h
index afb86958f3..65d73927a7 100644
--- a/net/arp.h
+++ b/net/arp.h
@@ -20,6 +20,7 @@ extern uchar *arp_wait_packet_ethaddr;
extern int arp_wait_tx_packet_size;
extern ulong arp_wait_timer_start;
extern int arp_wait_try;
+extern uchar *arp_wait_tx_packet;
void arp_init(void);
void arp_request(void);
diff --git a/net/net.c b/net/net.c
index f35695b4fc..6325ad3e1a 100644
--- a/net/net.c
+++ b/net/net.c
@@ -836,6 +836,9 @@ int net_send_udp_packet(uchar *ether, struct in_addr dest,
int dport, int sport,
/* size of the waiting packet */
arp_wait_tx_packet_size = pkt_hdr_size + payload_len;
+ /* copy current packet to ARP waiting packet buffer */
+ memcpy(arp_wait_tx_packet, net_tx_packet,
+ arp_wait_tx_packet_size);
/* and do the ARP request */
arp_wait_try = 1;
--
2.18.0
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[U-Boot] [PATCH] video: kconfig: remove DM_I2C dependency of I2C_EDID
Drop the DM_I2C dependency, as the library only implements the parsing of EDID data and doesn't depend on any driver One user of this library, the i2c command, implements support for legacy and DM I2C drivers Tested on a Zynq board, whose I2C driver is not ported yet to DM Signed-off-by: Luis Araneda --- drivers/video/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 5ee9032dc9..a2d7e10938 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -410,7 +410,6 @@ config VIDEO_MVEBU config I2C_EDID bool "Enable EDID library" - depends on DM_I2C default n help This enables library for accessing EDID data from an LCD panel. -- 2.18.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 0/1] Store waiting packet in a different buffer when making ARP requests
Hi, This is my first email to U-Boot so please let me know if I am not doing it correctly. U-Boot has 1 buffer to send Ethernet frames, pointed to by net_tx_packet. When sending to an IP address without knowing the MAC address, U-Boot makes an ARP request to find out the MAC address of the IP address, and continue sending the frame in the net_tx_packet after receiving a matching ARP reply. However, in the mean time, if U-Boot needs to send out any network packets (e.g. replying ping packets, etc.), the content of net_tx_packet will be used to prepare the new packet. Thus it is no longer the packet that is meant to be transmitted after the ARP reply. U-Boot has another buffer, pointed to by arp_tx_packet which is used to prepare ARP requests. ARP requests use this buffer instead of the normal net_tx_packet in order to avoid modifying the waiting packet to be sent. However, this approach does not prevent other part of the codes from modifying the waiting packet to be sent, because net_tx_packet is a common buffer used by all network protocol. This patch repurposes the arp_tx_packet buffer to be used to store the waiting packet to be sent, and use the normal net_tx_packet buffer to send ARP request instead. Best Regards, Dat Tran Tien Dat (1): net: Store waiting packet in a different buffer when making ARP requests net/arp.c | 18 ++ net/arp.h | 1 + net/net.c | 3 +++ 3 files changed, 14 insertions(+), 8 deletions(-) -- 2.18.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v7 1/2] spi: zynqmp_gqspi: Add support for ZynqMP qspi driver
This patch adds qspi driver support for ZynqMP SoC. This driver is responsible for communicating with qspi flash devices. Signed-off-by: Siva Durga Prasad Paladugu --- Changes for v7: - Removed reading of mode, clock phase and polarity from ofdata_to_platdata as drivercan get from spi-uclass if required Changes for v6: - Removed spi_flash.h inclusion and other unused macros - Fixed coding style comments - Removed tx_rx_mode in plat and removed preprobe routine. - Used proper error codes Changed for v5: - Removed zynqm_gqspi.h file which was added by mistake. Changes for v4: - Moved macro definitions back to .c - Removed last_cmd and flash command checks in driver - Used macros and GENMASK as per comments - Removed debugs wherever commented. - Modified set_mode routine as per comment Changes for v3: - Renamed all macros, functions, files and configs as per comment - Used wait_for_bit wherever required - Removed unnecessary header inclusion Changes for v2: - Rebased on top of latest master - Moved macro definitions to .h file as per comment - Fixed magic values with macros as per comment --- drivers/spi/Kconfig| 7 + drivers/spi/Makefile | 1 + drivers/spi/zynqmp_gqspi.c | 734 + 3 files changed, 742 insertions(+) create mode 100644 drivers/spi/zynqmp_gqspi.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 3532c2a..c3c424e 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -223,6 +223,13 @@ config ZYNQ_QSPI Zynq QSPI IP core. This IP is used to connect the flash in 4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel. +config ZYNQMP_GQSPI + bool "Configure ZynqMP Generic QSPI" + depends on ARCH_ZYNQMP + help + This option is used to enable ZynqMP QSPI controller driver which + is used to communicate with qspi flash devices. + endif # if DM_SPI config SOFT_SPI diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 5a2c00e..2187633 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -51,3 +51,4 @@ obj-$(CONFIG_TI_QSPI) += ti_qspi.o obj-$(CONFIG_XILINX_SPI) += xilinx_spi.o obj-$(CONFIG_ZYNQ_SPI) += zynq_spi.o obj-$(CONFIG_ZYNQ_QSPI) += zynq_qspi.o +obj-$(CONFIG_ZYNQMP_GQSPI) += zynqmp_gqspi.o diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c new file mode 100644 index 000..665f98e --- /dev/null +++ b/drivers/spi/zynqmp_gqspi.c @@ -0,0 +1,734 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2018 Xilinx + * + * Xilinx ZynqMP Generic Quad-SPI(QSPI) controller driver(master mode only) + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define GQSPI_GFIFO_STRT_MODE_MASK BIT(29) +#define GQSPI_CONFIG_MODE_EN_MASK (3 << 30) +#define GQSPI_CONFIG_DMA_MODE (2 << 30) +#define GQSPI_CONFIG_CPHA_MASK BIT(2) +#define GQSPI_CONFIG_CPOL_MASK BIT(1) + +/* QSPI MIO's count for different connection topologies */ +#define GQSPI_MIO_NUM_QSPI06 +#define GQSPI_MIO_NUM_QSPI15 +#define GQSPI_MIO_NUM_QSPI1_CS 1 + +/* + * QSPI Interrupt Registers bit Masks + * + * All the four interrupt registers (Status/Mask/Enable/Disable) have the same + * bit definitions. + */ +#define GQSPI_IXR_TXNFULL_MASK 0x0004 /* QSPI TX FIFO Overflow */ +#define GQSPI_IXR_TXFULL_MASK 0x0008 /* QSPI TX FIFO is full */ +#define GQSPI_IXR_RXNEMTY_MASK 0x0010 /* QSPI RX FIFO Not Empty */ +#define GQSPI_IXR_GFEMTY_MASK 0x0080 /* QSPI Generic FIFO Empty */ +#define GQSPI_IXR_ALL_MASK (GQSPI_IXR_TXNFULL_MASK | \ +GQSPI_IXR_RXNEMTY_MASK) + +/* + * QSPI Enable Register bit Masks + * + * This register is used to enable or disable the QSPI controller + */ +#define GQSPI_ENABLE_ENABLE_MASK 0x0001 /* QSPI Enable Bit Mask */ + +#define GQSPI_GFIFO_LOW_BUSBIT(14) +#define GQSPI_GFIFO_CS_LOWER BIT(12) +#define GQSPI_GFIFO_UP_BUS BIT(15) +#define GQSPI_GFIFO_CS_UPPER BIT(13) +#define GQSPI_SPI_MODE_QSPI(3 << 10) +#define GQSPI_SPI_MODE_SPI BIT(10) +#define GQSPI_SPI_MODE_DUAL_SPI(2 << 10) +#define GQSPI_IMD_DATA_CS_ASSERT 5 +#define GQSPI_IMD_DATA_CS_DEASSERT 5 +#define GQSPI_GFIFO_TX BIT(16) +#define GQSPI_GFIFO_RX BIT(17) +#define GQSPI_GFIFO_STRIPE_MASKBIT(18) +#define GQSPI_GFIFO_IMD_MASK 0xFF +#define GQSPI_GFIFO_EXP_MASK BIT(9) +#define GQSPI_GFIFO_DATA_XFR_MASK BIT(8) +#define GQSPI_STRT_GEN_FIFOBIT(28) +#define GQSPI_GEN_FIFO_STRT_MODBIT(29) +#define GQSPI_GFIFO_WP_HOLDBIT(19) +#define GQSPI_BAUD_DIV_MASK(7 << 3) +#define GQSPI_DFLT_BAUD_RATE_DIV BIT(3)
[U-Boot] [PATCH v7 2/2] zynqmp: zcu102: Add qspi driver support for ZynqMP zcu102 boards
This patch adds qspi driver support for all ZynqMP ZCU102
boards.
Signed-off-by: Siva Durga Prasad Paladugu
Acked-by: Michal Simek
---
Changes for v7:
- Added "spi-flash" to compatible strings.
Changes for v6:
- None
Changes for v5:
- None
Changes for v4:
- None
Changes for v3:
- Changed as per latest changes in 1/2
Changes for v2:
- Rebased on top of latest master and enabled qspi for
all zcu102 boards.
---
arch/arm/dts/zynqmp-zcu102-revA.dts | 2 +-
configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 5 +
configs/xilinx_zynqmp_zcu102_revA_defconfig | 5 +
configs/xilinx_zynqmp_zcu102_revB_defconfig | 5 +
4 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts
b/arch/arm/dts/zynqmp-zcu102-revA.dts
index ddc3fba..ac7035f 100644
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -534,7 +534,7 @@
status = "okay";
is-dual = <1>;
flash@0 {
- compatible = "m25p80"; /* 32MB */
+ compatible = "m25p80", "spi-flash"; /* 32MB */
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
diff --git a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
index 49a14d8..da53aa4 100644
--- a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
@@ -36,6 +36,7 @@ CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SDRAM=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
@@ -69,6 +70,7 @@ CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
@@ -90,6 +92,9 @@ CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/xilinx_zynqmp_zcu102_revA_defconfig
b/configs/xilinx_zynqmp_zcu102_revA_defconfig
index 05dad41..60e1269 100644
--- a/configs/xilinx_zynqmp_zcu102_revA_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SDRAM=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
@@ -66,6 +67,7 @@ CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
@@ -87,6 +89,9 @@ CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig
b/configs/xilinx_zynqmp_zcu102_revB_defconfig
index b3711b4..fa2804d 100644
--- a/configs/xilinx_zynqmp_zcu102_revB_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SDRAM=y
+CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
@@ -66,6 +67,7 @@ CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
@@ -87,6 +89,9 @@ CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
--
2.7.4
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Re: [U-Boot] [PATCH v2 1/2] rtc: pl031: convert the driver to driver model
Hi Akashi,
Thank you for the DM conversion.
On 07/04/2018 10:36 AM, AKASHI Takahiro wrote:
<..snip..>
diff --git a/include/dm/platform_data/rtc_pl031.h
b/include/dm/platform_data/rtc_pl031.h
new file mode 100644
index 00..8e4ba1ce69
--- /dev/null
+++ b/include/dm/platform_data/rtc_pl031.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __rtc_pl031_h
+#define __rtc_pl031_h
+
+#include
+
+struct pl031_rtc_platdata {
+ phys_addr_t base;
+};
+
+#endif
I think this file won't be necessary, the structure can stay private to pl031.c.
PL031 is an ARM IP block and U-Boot on ARM uses the device tree to locate
devices.
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Re: [U-Boot] [PATCH v2 1/2] rtc: pl031: convert the driver to driver model
On 07/04/2018 11:53 AM, Alexander Graf wrote:
On 07/04/2018 09:36 AM, AKASHI Takahiro wrote:
This patch is missing a patch description. I'm not the maintainer of the rtc
code base so it's not my call, but I personally just reject all patches with
empty patch descriptions ;).
And thanks a lot for doing the conversion! I think it's a very good step
forward.
Signed-off-by: AKASHI Takahiro
---
...snip...
/*
- * Reset the RTC. We set the date back to 1970-01-01.
+ * Get the current time from the RTC
*/
-void rtc_reset(void)
+static int pl031_rtc_get(struct udevice *dev, struct rtc_time *tm)
{
- RTC_WRITE_REG(RTC_LR, 0x00);
- if(!pl031_initted)
- rtc_init();
+ struct pl031_rtc_platdata *pdata = dev_get_platdata(dev);
+ ulong tim;
+
+ if (!tm) {
+ puts("Error getting the date/time\n");
+ return -1;
+ }
+
+ if (!pl031_initted)
In theory with dm you can now have multiple instances of the device, right? So
we can no longer have a global variable that indicates if a device is
initialized. Instead, this needs to move into device private data.
I think the initialization code in rtc_init() should be move to the .probe
callback instead, so there's no need to keep the bool aroun.
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Re: [U-Boot] [PATCH] sunxi: A64: OHCI: prevent turning off shared USB clock
On 07/04/2018 12:03 PM, Andre Przywara wrote:
> Hi,
>
> On 04/07/18 08:14, Marek Vasut wrote:
>> On 07/04/2018 02:05 AM, Andre Przywara wrote:
>>> On the A64 the clock for the first USB controller is actually the parent
>>> of the clock for the second controller, so turning them off in that order
>>> makes the system hang.
>>> Fix this by *not* turning off any clock for OHCI0, but both clocks when
>>> OHCI1 is brought down.
>>>
>>> Signed-off-by: Andre Przywara
>>> ---
>>> Hi,
>>>
>>> this is a new approach to fix the USB hang we see with mainline U-Boot.
>>> Compared to the previous patch it just deals with the USB clock (the AHB
>>> gate was a red herring), and it eventually turns both clocks off instead
>>> of leaving them running. Please have a test on A64 boards!
>>>
>>> Cheers,
>>> Andre.
>>>
>>> drivers/usb/host/ohci-sunxi.c | 13 -
>>> 1 file changed, 12 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
>>> index 0ddbdbe460..8f108b48a8 100644
>>> --- a/drivers/usb/host/ohci-sunxi.c
>>> +++ b/drivers/usb/host/ohci-sunxi.c
>>> @@ -114,6 +114,7 @@ no_phy:
>>> static int ohci_usb_remove(struct udevice *dev)
>>> {
>>> struct ohci_sunxi_priv *priv = dev_get_priv(dev);
>>> + fdt_addr_t base_addr = devfdt_get_addr(dev);
>>> int ret;
>>>
>>> if (generic_phy_valid(>phy)) {
>>> @@ -130,7 +131,17 @@ static int ohci_usb_remove(struct udevice *dev)
>>>
>>> if (priv->cfg->has_reset)
>>> clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask);
>>> - clrbits_le32(>ccm->usb_clk_cfg, priv->usb_gate_mask);
>>> + /*
>>> +* On the A64 CLK_USB_OHCI0 is the parent of CLK_USB_OHCI1, so
>>> +* we have to bring down none for OHCI0, but both for OHCI1.
>>> +*/
>>> + if (!priv->cfg->extra_usb_gate_mask || base_addr >= SUNXI_USB2_BASE) {
>>> + u32 usb_gate_mask = priv->usb_gate_mask;
>>> +
>>> + usb_gate_mask |= priv->cfg->extra_usb_gate_mask;
>>> + clrbits_le32(>ccm->usb_clk_cfg, usb_gate_mask);
>>> + }
>>> +
>>> clrbits_le32(>ccm->ahb_gate0, priv->ahb_gate_mask);
>>>
>>> return 0;
>>>
>>
>> What about boards which only enable OHCI0 and do not enable OHCI1 ?
>
> Ah, c'mon, thanks for spoiling my short patch ;-)
> The A64 has just two USB controllers, on dedicated pins, so mostly you
> want both of them. But I see your point, the clocks would stay on if
> only the first controller is ever dealt with. Maybe we can live with
> that, at least for the next release?
> Or do you have a clever idea how to deal with that? I think it's hard to
> determine how many USB controller we have enabled?
I'd prefer approach which works in all cases.
Can't you check if both controllers are enabled by traversing the DT ?
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2 1/2] rtc: pl031: convert the driver to driver model
On 07/04/2018 09:36 AM, AKASHI Takahiro wrote:
> Signed-off-by: AKASHI Takahiro
> ---
> drivers/rtc/Kconfig | 6 ++
> drivers/rtc/pl031.c | 109 +--
> include/dm/platform_data/rtc_pl031.h | 12 +++
> 3 files changed, 87 insertions(+), 40 deletions(-)
> create mode 100644 include/dm/platform_data/rtc_pl031.h
>
> diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
> index a3f8c8aecc..96c4cce410 100644
> --- a/drivers/rtc/Kconfig
> +++ b/drivers/rtc/Kconfig
> @@ -55,6 +55,12 @@ config RTC_MV
> Enable Marvell RTC driver. This driver supports the rtc that is
> present
> on some Marvell SoCs.
>
> +config RTC_PL031
> + bool "Enable ARM PL031 driver"
> + depends on DM_RTC
> + help
> + Enable ARM PL031 driver.
> +
> config RTC_S35392A
> bool "Enable S35392A driver"
> select BITREVERSE
> diff --git a/drivers/rtc/pl031.c b/drivers/rtc/pl031.c
> index 8955805e3b..eecade8374 100644
> --- a/drivers/rtc/pl031.c
> +++ b/drivers/rtc/pl031.c
> @@ -8,14 +8,10 @@
>
> #include
> #include
> +#include
> +#include
> #include
>
> -#if defined(CONFIG_CMD_DATE)
> -
> -#ifndef CONFIG_SYS_RTC_PL031_BASE
> -#error CONFIG_SYS_RTC_PL031_BASE is not defined!
> -#endif
> -
> /*
> * Register definitions
> */
> @@ -30,78 +26,111 @@
>
> #define RTC_CR_START (1 << 0)
>
> -#define RTC_WRITE_REG(addr, val) \
> - (*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE +
> (addr)) = (val))
> -#define RTC_READ_REG(addr) \
> - (*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE +
> (addr)))
> +#define RTC_WRITE_REG(base, addr, val) \
> + (*(volatile unsigned int *)((base) + (addr)) = (val))
> +#define RTC_READ_REG(base, addr)\
> + (*(volatile unsigned int *)((base) + (addr)))
>
> static int pl031_initted = 0;
>
> /* Enable RTC Start in Control register*/
> -void rtc_init(void)
> +void pl031_rtc_init(struct pl031_rtc_platdata *pdata)
> {
> - RTC_WRITE_REG(RTC_CR, RTC_CR_START);
> + RTC_WRITE_REG(pdata->base, RTC_CR, RTC_CR_START);
>
> pl031_initted = 1;
> }
>
> /*
> - * Reset the RTC. We set the date back to 1970-01-01.
> + * Get the current time from the RTC
> */
> -void rtc_reset(void)
> +static int pl031_rtc_get(struct udevice *dev, struct rtc_time *tm)
> {
> - RTC_WRITE_REG(RTC_LR, 0x00);
> - if(!pl031_initted)
> - rtc_init();
> + struct pl031_rtc_platdata *pdata = dev_get_platdata(dev);
> + ulong tim;
> +
> + if (!tm) {
> + puts("Error getting the date/time\n");
> + return -1;
> + }
> +
> + if (!pl031_initted)
> + pl031_rtc_init(pdata);
> +
> + tim = RTC_READ_REG(pdata->base, RTC_DR);
> +
> + rtc_to_tm(tim, tm);
Please, check the return code. The RTC may contain invalid data.
> +
> + debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
> + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
> + tm->tm_hour, tm->tm_min, tm->tm_sec);
> +
> + return 0;
> }
>
> /*
> * Set the RTC
> -*/
> -int rtc_set(struct rtc_time *tmp)
> + */
> +static int pl031_rtc_set(struct udevice *dev, const struct rtc_time *tm)
> {
> + struct pl031_rtc_platdata *pdata = dev_get_platdata(dev);
> unsigned long tim;
Please, add a debug statement here, too.
>
> - if(!pl031_initted)
> - rtc_init();
> -
> - if (tmp == NULL) {
> + if (!tm) {
> puts("Error setting the date/time\n");
> return -1;
> }
>
> + if (!pl031_initted)
> + pl031_rtc_init(pdata);
> +
> /* Calculate number of seconds this incoming time represents */
> - tim = rtc_mktime(tmp);
> + tim = rtc_mktime(tm);
>
> - RTC_WRITE_REG(RTC_LR, tim);
> + RTC_WRITE_REG(pdata->base, RTC_LR, tim);
>
> return -1;
No error has occurred. Please, return 0.
> }
>
> /*
> - * Get the current time from the RTC
> + * Reset the RTC. We set the date back to 1970-01-01.
> */
> -int rtc_get(struct rtc_time *tmp)
> +static int pl031_rtc_reset(struct udevice *dev)
> {
> - ulong tim;
> + struct pl031_rtc_platdata *pdata = dev_get_platdata(dev);
>
> - if(!pl031_initted)
> - rtc_init();
> + RTC_WRITE_REG(pdata->base, RTC_LR, 0x00);
>
> - if (tmp == NULL) {
> - puts("Error getting the date/time\n");
> - return -1;
> - }
> + if (!pl031_initted)
nits:
There is no English word initted. I would prefer pl031_initialized.
Best regards
Heinrich
> + pl031_rtc_init(pdata);
>
> - tim = RTC_READ_REG(RTC_DR);
> + return 0;
> +}
> +
> +static const struct rtc_ops pl031_rtc_ops = {
> + .get = pl031_rtc_get,
> + .set = pl031_rtc_set,
> + .reset = pl031_rtc_reset,
> +};
>
> - rtc_to_tm(tim, tmp);
> +static
Re: [U-Boot] [PATCH v2 2/2] arm: qemu-arm: enable PL031 (RTC) in defconfig
On 07/04/2018 10:56 AM, Alexander Graf wrote: > On 07/04/2018 09:36 AM, AKASHI Takahiro wrote: >> Signed-off-by: AKASHI Takahiro >> --- >> configs/qemu_arm64_defconfig | 2 ++ >> configs/qemu_arm_defconfig | 2 ++ >> 2 files changed, 4 insertions(+) >> >> diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig >> index cdf5072fe4..f3e3963860 100644 >> --- a/configs/qemu_arm64_defconfig >> +++ b/configs/qemu_arm64_defconfig >> @@ -28,3 +28,5 @@ CONFIG_USB=y >> CONFIG_DM_USB=y >> CONFIG_USB_EHCI_HCD=y >> CONFIG_USB_EHCI_PCI=y >> +CONFIG_DM_RTC=y >> +CONFIG_RTC_PL031=y > > Is there any particular reason you don't just do select statements in > the ARCH_QEMU definition? Or maybe imply? 'select' makes it impossible to switch configuration options off. We should only use it if really needed. 'imply' is fine here. Configuration options should appear in *_defconfig files in the same sequence as in the generated .config file. CONFIG_RTC_PL031 precedes CONFIG_SCSI. Please, add a commit message to the next version of the patch. Best regards Heinrich > > > Alex > >> diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig >> index bbce6cd719..28dfba0283 100644 >> --- a/configs/qemu_arm_defconfig >> +++ b/configs/qemu_arm_defconfig >> @@ -28,3 +28,5 @@ CONFIG_USB=y >> CONFIG_DM_USB=y >> CONFIG_USB_EHCI_HCD=y >> CONFIG_USB_EHCI_PCI=y >> +CONFIG_DM_RTC=y >> +CONFIG_RTC_PL031=y > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/7] usb: rockchip: fix command failed on host side due to missing data
Hi Lukasz,
On Tue, Jul 03, 2018 at 11:24:34PM +0200, Lukasz Majewski wrote:
> Hi Alberto,
>
> > Two consecutive rockusb_tx_write without waiting for request complete
> > do results in transfer reset of first request and thus no or
> > incomplete data transfer. This because rockusb_tx_write do use just
> > une request to keep serialization.
> >
> > So calls like:
> > rockusb_tx_write_str(emmc_id);
> > rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD);
> >
> > was succeeding only when DEBUG was defined because the time spent
> > printing debug info was enough for request to complete.
>
> Serialization by printf.
>
> >
> > This patch add a way to postpone sending csw after first
> > rockusb_tx_write is completed (indeed inside rockusb_complete) fixing
> > execution of: $ rkdeveloptool rfi
> > when DEBUG is not defined.
> >
> > Signed-off-by: Alberto Panizzo
> > ---
> > arch/arm/include/asm/arch-rockchip/f_rockusb.h | 1 +
> > drivers/usb/gadget/f_rockusb.c | 37
> > ++ 2 files changed, 33 insertions(+), 5
> > deletions(-)
> >
> > diff --git a/arch/arm/include/asm/arch-rockchip/f_rockusb.h
> > b/arch/arm/include/asm/arch-rockchip/f_rockusb.h index
> > 0b62771..f5cad8e 100644 ---
> > a/arch/arm/include/asm/arch-rockchip/f_rockusb.h +++
> > b/arch/arm/include/asm/arch-rockchip/f_rockusb.h @@ -124,6 +124,7 @@
> > struct f_rockusb { int reboot_flag;
> > void *buf;
> > void *buf_head;
> > + struct bulk_cs_wrap *next_csw;
> > };
> >
> > /* init rockusb device, tell rockusb which device you want to
> > read/write*/ diff --git a/drivers/usb/gadget/f_rockusb.c
> > b/drivers/usb/gadget/f_rockusb.c index b8833d0..a39ad51 100644
> > --- a/drivers/usb/gadget/f_rockusb.c
> > +++ b/drivers/usb/gadget/f_rockusb.c
> > @@ -97,6 +97,7 @@ static struct usb_gadget_strings *rkusb_strings[] =
> > {
> > static struct f_rockusb *rockusb_func;
> > static void rx_handler_command(struct usb_ep *ep, struct usb_request
> > *req); +static int rockusb_tx_write(const char *buffer, unsigned int
> > buffer_size); static int rockusb_tx_write_csw(u32 tag, int residue,
> > u8 status, int size);
> > struct f_rockusb *get_rkusb(void)
> > @@ -136,11 +137,22 @@ struct usb_endpoint_descriptor *hs)
> >
> > static void rockusb_complete(struct usb_ep *ep, struct usb_request
> > *req) {
> > + struct f_rockusb *f_rkusb = get_rkusb();
> > int status = req->status;
> >
> > - if (!status)
> > - return;
> > - debug("status: %d ep '%s' trans: %d\n", status, ep->name,
> > req->actual);
> > + if (status)
> > + debug("status: %d ep '%s' trans: %d\n",
> > + status, ep->name, req->actual);
> > +
> > + /* Send Command Status on previous transfer complete */
> > + if (f_rkusb->next_csw) {
> - isn't this a bit misleading? We send
>the status for the previous transfer.
>
This is part of the rockusb protocol: every commands issued by the
workstation will have back an optional payload request + this CSW
control block.
Commands are serialized by workstation: on rockusb you do not have
a real parallel execution of multiple commands.
Thus the simple caching of next CSW block to send is enough to
bring back things working.
The other possibility is to have a different _complete function
to send back the CSW request as the write_lba is doing.
> > +#ifdef DEBUG
> > + printcsw((char *)f_rkusb->next_csw);
> > +#endif
> > + rockusb_tx_write((char *)f_rkusb->next_csw,
> > +USB_BULK_CS_WRAP_LEN);
> > + }
> > + f_rkusb->next_csw = NULL;
> > }
> >
> > /* config the rockusb device*/
> > @@ -388,6 +400,21 @@ static int rockusb_tx_write_csw(u32 tag, int
> > residue, u8 status, int size) return rockusb_tx_write((char *)csw,
> > size); }
> >
> > +struct bulk_cs_wrap g_next_csw;
>
> You have added the pointer to struct bulk_cs_wrap_g to struct
> f_rockusb, and here we do have global definition.
>
> Two issues with cache; alignment and padding.
>
> Maybe it would be better to allocate it and store pointer int struct
> f_rockusb ?
>
Well, not really because rockusb_tx_write will not use directly our
g_next_csw, but copy its data into rockusb_func->in_req->buf
which is indeed allocated aligned for DMA.
Style wide I agree to replace the global pointer with alloc/free sequences
> > +static void rockusb_tx_write_csw_on_complete(u32 tag, int residue,
> > u8 status) +{
> > + struct f_rockusb *f_rkusb = get_rkusb();
> > +
> > + g_next_csw.signature = cpu_to_le32(USB_BULK_CS_SIG);
> > + g_next_csw.tag = tag;
> > + g_next_csw.residue = cpu_to_be32(residue);
> > + g_next_csw.status = status;
> > +#ifdef DEBUG
> > + printcsw((char *)_next_csw);
> > +#endif
> > + f_rkusb->next_csw = _next_csw;
> > +}
> > +
> > static unsigned int rx_bytes_expected(struct usb_ep *ep)
> > {
> > struct f_rockusb *f_rkusb = get_rkusb();
> > @@
Re: [U-Boot] [PATCH] sunxi: A64: OHCI: prevent turning off shared USB clock
Hi,
On 04/07/18 08:14, Marek Vasut wrote:
> On 07/04/2018 02:05 AM, Andre Przywara wrote:
>> On the A64 the clock for the first USB controller is actually the parent
>> of the clock for the second controller, so turning them off in that order
>> makes the system hang.
>> Fix this by *not* turning off any clock for OHCI0, but both clocks when
>> OHCI1 is brought down.
>>
>> Signed-off-by: Andre Przywara
>> ---
>> Hi,
>>
>> this is a new approach to fix the USB hang we see with mainline U-Boot.
>> Compared to the previous patch it just deals with the USB clock (the AHB
>> gate was a red herring), and it eventually turns both clocks off instead
>> of leaving them running. Please have a test on A64 boards!
>>
>> Cheers,
>> Andre.
>>
>> drivers/usb/host/ohci-sunxi.c | 13 -
>> 1 file changed, 12 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
>> index 0ddbdbe460..8f108b48a8 100644
>> --- a/drivers/usb/host/ohci-sunxi.c
>> +++ b/drivers/usb/host/ohci-sunxi.c
>> @@ -114,6 +114,7 @@ no_phy:
>> static int ohci_usb_remove(struct udevice *dev)
>> {
>> struct ohci_sunxi_priv *priv = dev_get_priv(dev);
>> +fdt_addr_t base_addr = devfdt_get_addr(dev);
>> int ret;
>>
>> if (generic_phy_valid(>phy)) {
>> @@ -130,7 +131,17 @@ static int ohci_usb_remove(struct udevice *dev)
>>
>> if (priv->cfg->has_reset)
>> clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask);
>> -clrbits_le32(>ccm->usb_clk_cfg, priv->usb_gate_mask);
>> +/*
>> + * On the A64 CLK_USB_OHCI0 is the parent of CLK_USB_OHCI1, so
>> + * we have to bring down none for OHCI0, but both for OHCI1.
>> + */
>> +if (!priv->cfg->extra_usb_gate_mask || base_addr >= SUNXI_USB2_BASE) {
>> +u32 usb_gate_mask = priv->usb_gate_mask;
>> +
>> +usb_gate_mask |= priv->cfg->extra_usb_gate_mask;
>> +clrbits_le32(>ccm->usb_clk_cfg, usb_gate_mask);
>> +}
>> +
>> clrbits_le32(>ccm->ahb_gate0, priv->ahb_gate_mask);
>>
>> return 0;
>>
>
> What about boards which only enable OHCI0 and do not enable OHCI1 ?
Ah, c'mon, thanks for spoiling my short patch ;-)
The A64 has just two USB controllers, on dedicated pins, so mostly you
want both of them. But I see your point, the clocks would stay on if
only the first controller is ever dealt with. Maybe we can live with
that, at least for the next release?
Or do you have a clever idea how to deal with that? I think it's hard to
determine how many USB controller we have enabled?
Cheers,
Andre.
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Re: [U-Boot] [PATCH 3/5] net: Make copy_filename() accept NULL src
On 07/04/2018 02:36 AM, Joe Hershberger wrote: Rather than crashing, check the src ptr and set dst to empty string. Signed-off-by: Joe Hershberger Wouldn't it make more sense to check for the existence outside at the caller's side? That way it's much easier to see what really is happening. Alex ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/5] net: Re-check prerequisites when autoloading
On 07/04/2018 02:36 AM, Joe Hershberger wrote:
With net autoload, we check the prerequisites for the initial command,
but the greater prerequisites when autoloading are not checked.
If we would attempt to autoload, check those prerequisites too.
If we are not expecting a serverip from the server, then don't worry
about it not being set, but don't attempt to load if it isn't.
Signed-off-by: Joe Hershberger
---
net/net.c | 20
1 file changed, 20 insertions(+)
diff --git a/net/net.c b/net/net.c
index bff3e9c5b5..42a50e60f8 100644
--- a/net/net.c
+++ b/net/net.c
@@ -332,6 +332,16 @@ void net_auto_load(void)
const char *s = env_get("autoload");
if (s != NULL && strcmp(s, "NFS") == 0) {
+ if (net_check_prereq(NFS)) {
+/* We aren't expecting to get a serverip, so just accept the assigned IP */
+#ifdef CONFIG_BOOTP_SERVERIP
+ net_set_state(NETLOOP_SUCCESS);
+#else
+ printf("Cannot autoload with NFS\n");
+ net_set_state(NETLOOP_FAIL);
+#endif
I don't understand the #ifdef. In the CONFIG_BOOTP_SERVERIP case, you
should already have net_server_ip set from the variable setter, so when
do you realistically get into the case where net_check_prereq() fails
here? I can only see that happening when serverip is not set (read:
net_server_ip == 0.0.0.0) in which case we should also error out in the
CONFIG_BOOTP_SERVERIP case, no?
Alex
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Re: [U-Boot] [PATCH 1/5] net: When checking prerequisites, consider boot_file_name
On 07/04/2018 02:36 AM, Joe Hershberger wrote: For net_boot_common, we allow the serverip to be specified as part of the boot file name. For net commands that require serverip, include that source as a valid specification of serverip. Signed-off-by: Joe Hershberger Reviewed-by: Alexander Graf Alex ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/2] arm: qemu-arm: enable PL031 (RTC) in defconfig
On 07/04/2018 09:36 AM, AKASHI Takahiro wrote: Signed-off-by: AKASHI Takahiro --- configs/qemu_arm64_defconfig | 2 ++ configs/qemu_arm_defconfig | 2 ++ 2 files changed, 4 insertions(+) diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index cdf5072fe4..f3e3963860 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -28,3 +28,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_PCI=y +CONFIG_DM_RTC=y +CONFIG_RTC_PL031=y Is there any particular reason you don't just do select statements in the ARCH_QEMU definition? Or maybe imply? Alex diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index bbce6cd719..28dfba0283 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -28,3 +28,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_PCI=y +CONFIG_DM_RTC=y +CONFIG_RTC_PL031=y ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] rtc: pl031: convert the driver to driver model
On 07/04/2018 09:36 AM, AKASHI Takahiro wrote:
This patch is missing a patch description. I'm not the maintainer of the
rtc code base so it's not my call, but I personally just reject all
patches with empty patch descriptions ;).
And thanks a lot for doing the conversion! I think it's a very good step
forward.
Signed-off-by: AKASHI Takahiro
---
drivers/rtc/Kconfig | 6 ++
drivers/rtc/pl031.c | 109 +--
include/dm/platform_data/rtc_pl031.h | 12 +++
3 files changed, 87 insertions(+), 40 deletions(-)
create mode 100644 include/dm/platform_data/rtc_pl031.h
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index a3f8c8aecc..96c4cce410 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -55,6 +55,12 @@ config RTC_MV
Enable Marvell RTC driver. This driver supports the rtc that is
present
on some Marvell SoCs.
+config RTC_PL031
+ bool "Enable ARM PL031 driver"
+ depends on DM_RTC
+ help
+ Enable ARM PL031 driver.
+
config RTC_S35392A
bool "Enable S35392A driver"
select BITREVERSE
diff --git a/drivers/rtc/pl031.c b/drivers/rtc/pl031.c
index 8955805e3b..eecade8374 100644
--- a/drivers/rtc/pl031.c
+++ b/drivers/rtc/pl031.c
@@ -8,14 +8,10 @@
#include
#include
+#include
+#include
#include
-#if defined(CONFIG_CMD_DATE)
-
-#ifndef CONFIG_SYS_RTC_PL031_BASE
-#error CONFIG_SYS_RTC_PL031_BASE is not defined!
-#endif
-
/*
* Register definitions
*/
@@ -30,78 +26,111 @@
#define RTC_CR_START (1 << 0)
-#define RTC_WRITE_REG(addr, val) \
- (*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE +
(addr)) = (val))
-#defineRTC_READ_REG(addr) \
- (*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE +
(addr)))
+#defineRTC_WRITE_REG(base, addr, val) \
+ (*(volatile unsigned int *)((base) + (addr)) = (val))
Any particular reason you don't pass in pdata? While at it you could
then also convert the macros into inline functions. That would make the
code slightly more readable and result in pretty much the same binary
output.
Also, you don't want to have the explicit casts here as they may get
compiled into something that is not explicitly valid as MMIO access
opcode. Instead, please convert it to readl()/writel() while you're at it.
+#defineRTC_READ_REG(base, addr)\
+ (*(volatile unsigned int *)((base) + (addr)))
static int pl031_initted = 0;
/* Enable RTC Start in Control register*/
-void rtc_init(void)
+void pl031_rtc_init(struct pl031_rtc_platdata *pdata)
Does this have to be global still? I guess we can now make this function
static, no?
{
- RTC_WRITE_REG(RTC_CR, RTC_CR_START);
+ RTC_WRITE_REG(pdata->base, RTC_CR, RTC_CR_START);
pl031_initted = 1;
}
/*
- * Reset the RTC. We set the date back to 1970-01-01.
+ * Get the current time from the RTC
*/
-void rtc_reset(void)
+static int pl031_rtc_get(struct udevice *dev, struct rtc_time *tm)
{
- RTC_WRITE_REG(RTC_LR, 0x00);
- if(!pl031_initted)
- rtc_init();
+ struct pl031_rtc_platdata *pdata = dev_get_platdata(dev);
+ ulong tim;
+
+ if (!tm) {
+ puts("Error getting the date/time\n");
+ return -1;
+ }
+
+ if (!pl031_initted)
In theory with dm you can now have multiple instances of the device,
right? So we can no longer have a global variable that indicates if a
device is initialized. Instead, this needs to move into device private data.
+ pl031_rtc_init(pdata);
+
+ tim = RTC_READ_REG(pdata->base, RTC_DR);
+
+ rtc_to_tm(tim, tm);
+
+ debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
+ tm->tm_hour, tm->tm_min, tm->tm_sec);
+
+ return 0;
}
/*
* Set the RTC
-*/
-int rtc_set(struct rtc_time *tmp)
+ */
+static int pl031_rtc_set(struct udevice *dev, const struct rtc_time *tm)
{
+ struct pl031_rtc_platdata *pdata = dev_get_platdata(dev);
unsigned long tim;
- if(!pl031_initted)
- rtc_init();
-
- if (tmp == NULL) {
+ if (!tm) {
puts("Error setting the date/time\n");
return -1;
}
+ if (!pl031_initted)
+ pl031_rtc_init(pdata);
+
/* Calculate number of seconds this incoming time represents */
- tim = rtc_mktime(tmp);
+ tim = rtc_mktime(tm);
- RTC_WRITE_REG(RTC_LR, tim);
+ RTC_WRITE_REG(pdata->base, RTC_LR, tim);
return -1;
}
/*
- * Get the current time from the RTC
+ * Reset the RTC. We set the date back to 1970-01-01.
*/
-int rtc_get(struct rtc_time *tmp)
+static int pl031_rtc_reset(struct udevice *dev)
{
- ulong tim;
+
Re: [U-Boot] [PATCH] arm64: allwinner: a64: Disable ehci1 and ohci1 for bananapi, nanopi
Hi,
On 04/07/18 01:50, Vasily Khoruzhick wrote:
> On Tue, Jul 3, 2018 at 5:45 PM, André Przywara wrote:
>
>>>
>>> I tried enabling DM for MMC on A64 recently and unfortunately it results in
>>> SPL exceeding 32kb size limit.
>>
>> Mmh, worked for me with this preliminary branch:
>> [1] https://github.com/apritzel/u-boot/commits/sunxi-dm-WIP
>> (which I forgot to link in my original email).
>> Did you enable SPL_DM_MMC or SPL_DM as well? I think there is not much
>> benefit in doing so, especially given the code size issue.
>
> Yes, I did. We'll need it to handle all the controller quirks
> eventually (new clock mode, calibration, delays).
> Currently we have a number of ifdefs in the driver.
Yes, and they somewhat have to stay because of that, and we might have
to add some more, even. That's admittedly not pretty, and we were
discussing that already (the other thread that Jagan pointed you to).
But for the SPL specifically we just need some basic functionality to
load 600KB or so of data.
Or did you experience any problems with that? In general I think we can
get away with less performance for the sake of a simpler driver. For
instance I believe we will probably never need support for HS modes.
So yes: the usefulness of the DM_MMC conversion is somewhat questionable
because of this. As you have shown below ("overflowed by 10K") DM_MMC is
not really an option for the SPL, so we need to keep the old code
around. Or we follow the idea of having a much simpler, separate driver
just for the SPL.
>>> So I guess we'll have to find a workaround for this issue as well...
>>
>> I recently made a patch that shrinks the ARMv8 exception table code by
>> 250 bytes. Not much, but might help. How much did you overflow?
>> I think eventually we should generate the exception table and put it
>> somewhere else than in SRAM A1. That has the potential of freeing up
>> about 2KB or so. I started rewriting the vectors to make this easier,
>> but it's not very high on my TODO list.
>
> That won't be enough:
>
> aarch64-linux-gnu-ld.bfd: region `.sram' overflowed by 10584 bytes
Well, I don't see a way of achieving this, really. I think adding
SPL_DM_MMC would even overflow a 32-bit (Thumb2) SPL. And I am not sure
that adding a TPL is the right answer to this problem of using the
driver model. It's a boot loader, after all.
Cheers,
Andre.
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Re: [U-Boot] SoCFPGA PL330 DMA driver and ECC scrubbing
On 07/04/2018 01:45 AM, Jason Rush wrote: > On 7/3/2018 9:08 AM, Marek Vasut wrote: >> On 07/03/2018 03:58 PM, Jason Rush wrote: >>> On 6/29/2018 10:17 AM, Marek Vasut wrote: On 06/29/2018 05:06 PM, Jason Rush wrote: > On 6/29/2018 9:52 AM, Marek Vasut wrote: >> On 06/29/2018 04:44 PM, Jason Rush wrote: >>> On 6/29/2018 9:34 AM, Marek Vasut wrote: On 06/29/2018 04:31 PM, Jason Rush wrote: > Dinh, Hi, > A while ago, you posted the following patchset for SoCFPGA to add the > PL330 > DMA driver, and updated the SoCFPGA SDRAM init to write zeros to > SDRAM to > initialize the ECC bits if ECC was enabled: > > https://lists.denx.de/pipermail/u-boot/2016-October/269643.html > > I know it's been a long time, so I'll summarize some of the > conversation... > > At the time, you had a problem with the patchset causing the SPL to > fail to > find the MMC. You had tracked it down to an issue with the following > commit > "a78cd8613204 ARM: Rework and correct barrier definitions". You and > Marek > discussed it a bit, but I don't think there was a real conclusion. > You > submitted a second version of the patchset asking for advice on > debugging > the issue: > > https://lists.denx.de/pipermail/u-boot/2016-December/275822.html > > No real conversation came from the second patchset, and that was the > end of > the patch. > > I was hoping we could revisit adding your patchset again. I am > working on a > custom SoCFPGA board with a Cyclone V and ECC SDRAM. I rebased your > patchset > against v2018.05 and it is working on my custom board (although I > don't have > an MMC). I also tested it on a SoCKit booting from an MMC (I forced > it to > scrub the SDRAM on the SoCKit, because it doesn't have ECC RAM), and > the > SoCKit finds the MMC and boots. > > I don't have any suggestions on why it is working now on my board and > not > back when you first submitted the patchset. Maybe something else was > fixed > in the MMC? I was hoping you and Marek could test this patch again on > some > different SoCFPGA boards to see if you get the same results. Look at this patch http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=commit;h=9bb8a249b292d26f152c20e3641600b3d7b3924b You likely want similar approach, it's faster then the DMA and much simpler. >>> Thanks Marek. I'll give it a try. Would you be interested in a >>> similar patch for the Gen 5? >> I don't have any Gen5 board which uses ECC, do you ? >> If so, yes, prepare a patch, it should be very similar. >> >> Make sure to measure how long it takes to scrub the memory and how much >> memory you have, I'd be interested in the numbers. >> > Looking at the master branch, it doesn't look like that code is ever > being called? > The sdram_init_ecc_bits() function is called from the > ddr_calibration_sequence function(), > but I can't find where ddr_calibration_sequence is called(). git grep for it, it's called from somewhere in the arch/arm/mach-socfpga/ > Either way, I can test it. I have a custom Cyclone V board with ECC, and > the Intel Arria V SoC > Dev Kit I can test it on too which I think has ECC. Please do. >>> I implemented a similar memset approach for the gen 5 socfpga. It's >>> basically the same >>> code as in that patch; however, when I performed a single memset the >>> processor would >>> reset for some reason. I changed it to loop over calling memset with a >>> size of 32MB over >>> the entire address the address, and that worked as opposed to doing a >>> single memset on >>> the RAM. >> Can you do grep MEMSET .config in your U-Boot build dir ? The arch >> memset is implemented in assembler and doesn't trigger WDT , so if it >> takes too long, it could be that the WDT resets the platform. > > Both CONFIG_USE_ARCH_MEMSET and CONFIG_SPL_USE_ARCH_MEMSET > are set in my .config, so it must be the WDT triggering as you suspect. > >>> I started on a SoCKit because it was handy, I know it doesn't have ECC >> It doesn't by default. >> >>> , but I forced it to >>> initialize the RAM as a quick test. It seems much slower than the DMA >>> approach. It >>> should be noted, I didn't implement any code to time the scrubbing, but >>> rather just >>> roughly monitored the time to get a rough idea of how long it took. >>> >>> On the SoCKit, which has 1GB of RAM, the memset takes around 8 seconds to >>> complete, >>> and the DMA takes under 2 seconds. >> Did you enable i/d cache in
Re: [U-Boot] [PATCH] rpi: Set the default mmc max device to 2
On 07/04/2018 09:34 AM, Emmanuel Vadot wrote: On Wed, 4 Jul 2018 09:25:16 +0200 Alexander Graf wrote: On 07/04/2018 09:08 AM, Emmanuel Vadot wrote: When running with special configuration (OF_BOARD and mmc overlay) RPI have the SD card as id 1. This make device enumeration fails when using the API. Signed-off-by: Emmanuel Vadot Could you please elaborate a bit? From the commit message I don't fully understand which problem you're trying to solve. Thanks, Alex Sure, When using the dtb from the rpi fundation and the mmc overlay (which switch back the sd card to use the SDHCI controller and not the SDHOST one) and using OF_BOARD so u-boot uses it/pass it to the OS the device id for the sd is 1 : U-Boot> mmc list mmc@7e30: 1 This cause the API (see api/api_storage.c) code to never expose this device to the consumer as the default value for CONFIG_SYS_MMC_MAX_DEVICE is 1. Ouch, that whole file assumes that you know the number of devices present in your system. That's terrible. I think the real fix would be to convert api_storage.c to instead use dm native routines to loop through all available devices and not explicitly depend on any maximum number of possible devices. Simon, do you potentially have a patch lying around for that in a branch already? Alex ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 2/2] arm: qemu-arm: enable PL031 (RTC) in defconfig
Signed-off-by: AKASHI Takahiro --- configs/qemu_arm64_defconfig | 2 ++ configs/qemu_arm_defconfig | 2 ++ 2 files changed, 4 insertions(+) diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index cdf5072fe4..f3e3963860 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -28,3 +28,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_PCI=y +CONFIG_DM_RTC=y +CONFIG_RTC_PL031=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index bbce6cd719..28dfba0283 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -28,3 +28,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_PCI=y +CONFIG_DM_RTC=y +CONFIG_RTC_PL031=y -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 1/2] rtc: pl031: convert the driver to driver model
Signed-off-by: AKASHI Takahiro
---
drivers/rtc/Kconfig | 6 ++
drivers/rtc/pl031.c | 109 +--
include/dm/platform_data/rtc_pl031.h | 12 +++
3 files changed, 87 insertions(+), 40 deletions(-)
create mode 100644 include/dm/platform_data/rtc_pl031.h
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index a3f8c8aecc..96c4cce410 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -55,6 +55,12 @@ config RTC_MV
Enable Marvell RTC driver. This driver supports the rtc that is
present
on some Marvell SoCs.
+config RTC_PL031
+ bool "Enable ARM PL031 driver"
+ depends on DM_RTC
+ help
+ Enable ARM PL031 driver.
+
config RTC_S35392A
bool "Enable S35392A driver"
select BITREVERSE
diff --git a/drivers/rtc/pl031.c b/drivers/rtc/pl031.c
index 8955805e3b..eecade8374 100644
--- a/drivers/rtc/pl031.c
+++ b/drivers/rtc/pl031.c
@@ -8,14 +8,10 @@
#include
#include
+#include
+#include
#include
-#if defined(CONFIG_CMD_DATE)
-
-#ifndef CONFIG_SYS_RTC_PL031_BASE
-#error CONFIG_SYS_RTC_PL031_BASE is not defined!
-#endif
-
/*
* Register definitions
*/
@@ -30,78 +26,111 @@
#define RTC_CR_START (1 << 0)
-#defineRTC_WRITE_REG(addr, val) \
- (*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE +
(addr)) = (val))
-#defineRTC_READ_REG(addr) \
- (*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE +
(addr)))
+#defineRTC_WRITE_REG(base, addr, val) \
+ (*(volatile unsigned int *)((base) + (addr)) = (val))
+#defineRTC_READ_REG(base, addr)\
+ (*(volatile unsigned int *)((base) + (addr)))
static int pl031_initted = 0;
/* Enable RTC Start in Control register*/
-void rtc_init(void)
+void pl031_rtc_init(struct pl031_rtc_platdata *pdata)
{
- RTC_WRITE_REG(RTC_CR, RTC_CR_START);
+ RTC_WRITE_REG(pdata->base, RTC_CR, RTC_CR_START);
pl031_initted = 1;
}
/*
- * Reset the RTC. We set the date back to 1970-01-01.
+ * Get the current time from the RTC
*/
-void rtc_reset(void)
+static int pl031_rtc_get(struct udevice *dev, struct rtc_time *tm)
{
- RTC_WRITE_REG(RTC_LR, 0x00);
- if(!pl031_initted)
- rtc_init();
+ struct pl031_rtc_platdata *pdata = dev_get_platdata(dev);
+ ulong tim;
+
+ if (!tm) {
+ puts("Error getting the date/time\n");
+ return -1;
+ }
+
+ if (!pl031_initted)
+ pl031_rtc_init(pdata);
+
+ tim = RTC_READ_REG(pdata->base, RTC_DR);
+
+ rtc_to_tm(tim, tm);
+
+ debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
+ tm->tm_hour, tm->tm_min, tm->tm_sec);
+
+ return 0;
}
/*
* Set the RTC
-*/
-int rtc_set(struct rtc_time *tmp)
+ */
+static int pl031_rtc_set(struct udevice *dev, const struct rtc_time *tm)
{
+ struct pl031_rtc_platdata *pdata = dev_get_platdata(dev);
unsigned long tim;
- if(!pl031_initted)
- rtc_init();
-
- if (tmp == NULL) {
+ if (!tm) {
puts("Error setting the date/time\n");
return -1;
}
+ if (!pl031_initted)
+ pl031_rtc_init(pdata);
+
/* Calculate number of seconds this incoming time represents */
- tim = rtc_mktime(tmp);
+ tim = rtc_mktime(tm);
- RTC_WRITE_REG(RTC_LR, tim);
+ RTC_WRITE_REG(pdata->base, RTC_LR, tim);
return -1;
}
/*
- * Get the current time from the RTC
+ * Reset the RTC. We set the date back to 1970-01-01.
*/
-int rtc_get(struct rtc_time *tmp)
+static int pl031_rtc_reset(struct udevice *dev)
{
- ulong tim;
+ struct pl031_rtc_platdata *pdata = dev_get_platdata(dev);
- if(!pl031_initted)
- rtc_init();
+ RTC_WRITE_REG(pdata->base, RTC_LR, 0x00);
- if (tmp == NULL) {
- puts("Error getting the date/time\n");
- return -1;
- }
+ if (!pl031_initted)
+ pl031_rtc_init(pdata);
- tim = RTC_READ_REG(RTC_DR);
+ return 0;
+}
+
+static const struct rtc_ops pl031_rtc_ops = {
+ .get = pl031_rtc_get,
+ .set = pl031_rtc_set,
+ .reset = pl031_rtc_reset,
+};
- rtc_to_tm(tim, tmp);
+static const struct udevice_id pl031_rtc_ids[] = {
+ { .compatible = "arm,pl031" },
+ { }
+};
- debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
- tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
- tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+static int pl031_rtc_ofdata_to_platdata(struct udevice *dev)
+{
+ struct pl031_rtc_platdata *pdata = dev_get_platdata(dev);
+ pdata->base = devfdt_get_addr(dev);
return 0;
}
[U-Boot] [PATCH v2 0/2] arm: qemu-arm: enable PL031 (RTC)
This is a revised version of my proposal[1]. [1] https://lists.denx.de/pipermail/u-boot/2018-July/333534.html VMs provided by qemu for arm are equiped with PL031 device. In patch#1, pl031 driver is converted to driver model, and in patch#2, this driver is enabled in defconfig of qemu-arm. This patch set is motivated by running UEFI SCT(Self-Certification Test) and measuring time on u-boot on qemu-arm. Heinrich has already posted UEFI's GetTime() implementation. Changes in v2(July 4, 2018) * based on Heinrich's comments, * remove legacy mode interface * enable the driver in defconfig AKASHI Takahiro (2): rtc: pl031: convert the driver to driver model arm: qemu-arm: enable PL031 (RTC) in defconfig configs/qemu_arm64_defconfig | 2 + configs/qemu_arm_defconfig | 2 + drivers/rtc/Kconfig | 6 ++ drivers/rtc/pl031.c | 109 +-- include/dm/platform_data/rtc_pl031.h | 12 +++ 5 files changed, 91 insertions(+), 40 deletions(-) create mode 100644 include/dm/platform_data/rtc_pl031.h -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] rpi: Set the default mmc max device to 2
On 07/04/2018 09:08 AM, Emmanuel Vadot wrote: When running with special configuration (OF_BOARD and mmc overlay) RPI have the SD card as id 1. This make device enumeration fails when using the API. Signed-off-by: Emmanuel Vadot Could you please elaborate a bit? From the commit message I don't fully understand which problem you're trying to solve. Thanks, Alex --- include/configs/rpi.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/rpi.h b/include/configs/rpi.h index a97550b732..26fc9b9d95 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -69,6 +69,8 @@ #define CONFIG_MISC_INIT_R #endif +#define CONFIG_SYS_MMC_MAX_DEVICE 2 + /* Console configuration */ #define CONFIG_SYS_CBSIZE 1024 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] sunxi: A64: OHCI: prevent turning off shared USB clock
On 07/04/2018 02:05 AM, Andre Przywara wrote:
> On the A64 the clock for the first USB controller is actually the parent
> of the clock for the second controller, so turning them off in that order
> makes the system hang.
> Fix this by *not* turning off any clock for OHCI0, but both clocks when
> OHCI1 is brought down.
>
> Signed-off-by: Andre Przywara
> ---
> Hi,
>
> this is a new approach to fix the USB hang we see with mainline U-Boot.
> Compared to the previous patch it just deals with the USB clock (the AHB
> gate was a red herring), and it eventually turns both clocks off instead
> of leaving them running. Please have a test on A64 boards!
>
> Cheers,
> Andre.
>
> drivers/usb/host/ohci-sunxi.c | 13 -
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
> index 0ddbdbe460..8f108b48a8 100644
> --- a/drivers/usb/host/ohci-sunxi.c
> +++ b/drivers/usb/host/ohci-sunxi.c
> @@ -114,6 +114,7 @@ no_phy:
> static int ohci_usb_remove(struct udevice *dev)
> {
> struct ohci_sunxi_priv *priv = dev_get_priv(dev);
> + fdt_addr_t base_addr = devfdt_get_addr(dev);
> int ret;
>
> if (generic_phy_valid(>phy)) {
> @@ -130,7 +131,17 @@ static int ohci_usb_remove(struct udevice *dev)
>
> if (priv->cfg->has_reset)
> clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask);
> - clrbits_le32(>ccm->usb_clk_cfg, priv->usb_gate_mask);
> + /*
> + * On the A64 CLK_USB_OHCI0 is the parent of CLK_USB_OHCI1, so
> + * we have to bring down none for OHCI0, but both for OHCI1.
> + */
> + if (!priv->cfg->extra_usb_gate_mask || base_addr >= SUNXI_USB2_BASE) {
> + u32 usb_gate_mask = priv->usb_gate_mask;
> +
> + usb_gate_mask |= priv->cfg->extra_usb_gate_mask;
> + clrbits_le32(>ccm->usb_clk_cfg, usb_gate_mask);
> + }
> +
> clrbits_le32(>ccm->ahb_gate0, priv->ahb_gate_mask);
>
> return 0;
>
What about boards which only enable OHCI0 and do not enable OHCI1 ?
--
Best regards,
Marek Vasut
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[U-Boot] [PATCH] rpi: Set the default mmc max device to 2
When running with special configuration (OF_BOARD and mmc overlay) RPI have the SD card as id 1. This make device enumeration fails when using the API. Signed-off-by: Emmanuel Vadot --- include/configs/rpi.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/rpi.h b/include/configs/rpi.h index a97550b732..26fc9b9d95 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -69,6 +69,8 @@ #define CONFIG_MISC_INIT_R #endif +#define CONFIG_SYS_MMC_MAX_DEVICE 2 + /* Console configuration */ #define CONFIG_SYS_CBSIZE 1024 -- 2.17.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [linux-sunxi] Re: [PATCH v4 13/19] sunxi: DT: A64: update board .dts files from Linux
+ Vasily
On Tue, May 8, 2018 at 6:45 PM, Andre Przywara wrote:
> Hi,
>
> On 08/05/18 11:34, Jagan Teki wrote:
>> On Sun, Apr 1, 2018 at 8:11 AM, Chen-Yu Tsai wrote:
>>> On Sun, Apr 1, 2018 at 9:28 AM, André Przywara
>>> wrote:
On 30/03/18 05:25, Chen-Yu Tsai wrote:
>> OK. So meanwhile I have something almost(TM) working:
>> - drivers/clk/sunxi/clk-a64.c, which is a UCLASS_CLK implementation of
>> the clock IDs from allwinner,sun50i-a64-ccu that we need: CLK_BUS_UARTx,
>> CLK_BUS_MMCx, CLK_MMCx. Their implementation is fairly simple, actually
>> (I did it the U-Boot way, not pulling in any super-fancy Linux code).
>> Porting this over to H3/H5 and other SoCs should be trivial: copy/paste
>> for now. We can look at how to unify this later.
>> - drivers/mmc/sunxi_mmc.c extended to use UCLASS_CLK clocks. This is
>> also not too bad, but I seem to miss a bit in here, as it times out.
>> Will debug this tonight.
>> - Cowardly dodging a proper UCLASS_RESET driver for now, instead hacking
>> the single bit in :-(
>>
>> That looks tight to still get into this merge window, though, at least
>> if we follow the usual process.
>
> You could post an initial version during the merge window, and refine it
> in the following two weeks? AFAIK the rules allow for it to be merged for
> the coming release, instead of the next.
Is that so? I had the impression that this was tightened in the last few
releases, so no features would be allowed beyond the merge window
anymore. I will try to send something ASAP, but ...
> Curiously, U-boot repositories don't have -next branches. Is that a
> maintainer preference? Having one would help developers in a way as
> to not have to hunt down prerequisites and try to figure out whether
> they have passed review and will be merged or not, and also avoid
> conflicts with other to-be-queued patches. I know this takes extra
> effort from the maintainer to possibly rebase or manage conflicts
> after a new merge window has opened, as I personally manage sunxi-next
> for the Linux kernel to serve as sort of an integration branch for
> others. I'm asking is it possible to have -next, even just for sunxi.
>
>>
>> Keep you posted.
>
> I'm interested. IMHO we don't need full blown drivers like in Linux.
> We should be able to get away with selectively supporting only the
> resources needed for the peripherals supported / actively used in U-boot.
> This goes for clocks, resets, pinctrl, regulators, etc..
So I have something(TM) working now. This is a bit like a can of worms:
- As mentioned above, we need a UCLASS_CLK driver. This is pretty
straightforward, one driver per SoC, then something like:
int sunxi_clk_enable(clk)
{
switch (clk->id) {
case CLK_MMC0:
addr = priv->base + 0x88;
setbits_le32(clk_base, BIT(31));
(plus get_rate/set_rate)
As you guessed, we just list the clocks we need, in the moment this is
UART and MMC. Adding new clocks is easy, other SoCs can be copy
for now, we might find a clever way of code sharing later.
One nasty property is the marriage of RESET and CLK in the sunxi-ng
clock binding. So we also need a DM reset driver. I need to wrap my head
around how to instantiate those at the same time from only one compatible.
>>>
>>> We could look at how the DM gpio driver currently does it: The compatible
>>> matches the driver directly, and the DM bind function creates many child
>>> devices using platform data and binds it to the same driver. The device
>>> node is also assigned to the same one. AFAIK you have to figure out how
>>> to lookup a different driver by name for the child device, e.g. a reset
>>> driver to bind to the child device of the clk device.
>>>
>>> In addition, Philipp from Theobroma Systems posted a series some time ago
>>> for sunxi DM conversion, which included some patches that involved creating
>>> multiple uclass devices for the same device node.
>>>
- Also I realised two days ago that we need a DM pinctrl driver. As this
was on my list anyway, I just bit the bullet. Eventually this isn't as
bad as it sounds, as I resorted to the "pinmux" property to give me the
mux value, so don't need the huge table Linux uses.
But: a similar problem as above, as we need to marry this to the already
existing DM_GPIO driver, because they share a DT node.
>>>
>>> Same as the above I guess? And having the pinctrl driver as the base device
>>> might work out better. It looks like we won't have gpio/pinctrl exclusivity
>>> like we do in Linux, so people should try to avoid shooting themselves in
>>> the foot. We could try denying requests based on whether the pinmux value
>>> in the register is not the default GPIO /
Re: [U-Boot] [PATCH] sunxi: A64: OHCI: prevent turning off shared USB clock
On Wed, Jul 4, 2018 at 5:35 AM, Andre Przywara wrote:
> On the A64 the clock for the first USB controller is actually the parent
> of the clock for the second controller, so turning them off in that order
> makes the system hang.
> Fix this by *not* turning off any clock for OHCI0, but both clocks when
> OHCI1 is brought down.
>
> Signed-off-by: Andre Przywara
> ---
> Hi,
>
> this is a new approach to fix the USB hang we see with mainline U-Boot.
> Compared to the previous patch it just deals with the USB clock (the AHB
> gate was a red herring), and it eventually turns both clocks off instead
> of leaving them running. Please have a test on A64 boards!
>
> Cheers,
> Andre.
>
> drivers/usb/host/ohci-sunxi.c | 13 -
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
> index 0ddbdbe460..8f108b48a8 100644
> --- a/drivers/usb/host/ohci-sunxi.c
> +++ b/drivers/usb/host/ohci-sunxi.c
> @@ -114,6 +114,7 @@ no_phy:
> static int ohci_usb_remove(struct udevice *dev)
> {
> struct ohci_sunxi_priv *priv = dev_get_priv(dev);
> + fdt_addr_t base_addr = devfdt_get_addr(dev);
> int ret;
>
> if (generic_phy_valid(>phy)) {
> @@ -130,7 +131,17 @@ static int ohci_usb_remove(struct udevice *dev)
>
> if (priv->cfg->has_reset)
> clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask);
> - clrbits_le32(>ccm->usb_clk_cfg, priv->usb_gate_mask);
> + /*
> +* On the A64 CLK_USB_OHCI0 is the parent of CLK_USB_OHCI1, so
> +* we have to bring down none for OHCI0, but both for OHCI1.
> +*/
> + if (!priv->cfg->extra_usb_gate_mask || base_addr >= SUNXI_USB2_BASE) {
> + u32 usb_gate_mask = priv->usb_gate_mask;
> +
> + usb_gate_mask |= priv->cfg->extra_usb_gate_mask;
> + clrbits_le32(>ccm->usb_clk_cfg, usb_gate_mask);
> + }
> +
> clrbits_le32(>ccm->ahb_gate0, priv->ahb_gate_mask);
Reviewed-by: Jagan Teki
Tested on
- A64=> BPI-M64, Nanopi-A64
=> usb reset
resetting USB...
ohci_usb_remove: Input: mask = 0x1, usb_clk_cfg = 0x30303
ohci_usb_remove: Output: usb_clk_cfg = 0x30303
EHCI failed to shut down host controller.
ohci_usb_remove: Input: mask = 0x2, usb_clk_cfg = 0x30101
ohci_usb_remove: Input: mask updated = 0x3
ohci_usb_remove: Output: usb_clk_cfg = 0x101
USB0: USB EHCI 1.00
USB1: USB OHCI 1.0
USB2: USB EHCI 1.00
USB3: USB OHCI 1.0
scanning bus 0 for devices... 1 USB Device(s) found
scanning bus 2 for devices... 2 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
- H5=> Orangepi PC2
- H3=> BPI-M2+
=> usb reset
resetting USB...
ohci_usb_remove: Input: mask = 0x1, usb_clk_cfg = 0x70707
ohci_usb_remove: Input: mask updated = 0x1
ohci_usb_remove: Output: usb_clk_cfg = 0x60707
EHCI failed to shut down host controller.
ohci_usb_remove: Input: mask = 0x2, usb_clk_cfg = 0x60505
ohci_usb_remove: Input: mask updated = 0x2
ohci_usb_remove: Output: usb_clk_cfg = 0x40505
EHCI failed to shut down host controller.
ohci_usb_remove: Input: mask = 0x4, usb_clk_cfg = 0x40101
ohci_usb_remove: Input: mask updated = 0x4
ohci_usb_remove: Output: usb_clk_cfg = 0x101
USB0: USB EHCI 1.00
USB1: USB OHCI 1.0
USB2: USB EHCI 1.00
USB3: USB OHCI 1.0
USB4: USB EHCI 1.00
USB5: USB OHCI 1.0
scanning bus 0 for devices... 1 USB Device(s) found
scanning bus 2 for devices... 1 USB Device(s) found
scanning bus 4 for devices... 1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
All working fine, so
Tested-by: Jagan Teki
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