Re: [U-Boot] [PATCH v3 2/4] rockchip: rk3399: Add common Rock960 family from Vamrs

2018-10-03 Thread Manivannan Sadhasivam
On Wed, Oct 03, 2018 at 09:41:25PM +0200, Philipp Tomsich wrote:
> 
> 
> > On 03.10.2018, at 21:36, Ezequiel Garcia  wrote:
> > 
> > On Wed, 2018-10-03 at 21:34 +0200, Philipp Tomsich wrote:
> >>> On 02.10.2018, at 16:01, Manivannan Sadhasivam 
> >>>  wrote:
> >>> 
> >>> Hi Simon,
> >>> 
> >>> On Tue, Oct 02, 2018 at 04:21:38AM -0700, Simon Glass wrote:
>  On 27 September 2018 at 12:02, Manivannan Sadhasivam
>   wrote:
> > Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs.
> > It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition)
> > 96Boards.
> > 
> > Below are some of the key differences between both Rock960 and Ficus
> > boards:
> > 
> > 1. Different host enable GPIO for USB
> > 2. Different power and reset GPIO for PCI-E
> > 3. No Ethernet port on Rock960
> > 
> > The common board support will be utilized by both boards. The device
> > tree has been organized in such a way that only the properties which
> > differ between both boards are placed in the board specific dts and
> > the reset of the nodes are placed in common dtsi file.
> > 
> > Signed-off-by: Manivannan Sadhasivam 
> > [Added instructions for SD card boot]
> > Signed-off-by: Ezequiel Garcia 
> > ---
> > 
> > Changes in v3: Added instruction for copying prebuilt bl31.elf for SPL
> > 
> > Changes in v2: None
> > 
> > arch/arm/dts/rk3399-rock960.dtsi| 506 
> > arch/arm/mach-rockchip/rk3399/Kconfig   |  26 +
> > board/vamrs/rock960_rk3399/Kconfig  |  15 +
> > board/vamrs/rock960_rk3399/MAINTAINERS  |   6 +
> > board/vamrs/rock960_rk3399/Makefile |   6 +
> > board/vamrs/rock960_rk3399/README   | 152 ++
> > board/vamrs/rock960_rk3399/rock960-rk3399.c |  50 ++
> > include/configs/rock960_rk3399.h|  15 +
> > 8 files changed, 776 insertions(+)
> > create mode 100644 arch/arm/dts/rk3399-rock960.dtsi
> > create mode 100644 board/vamrs/rock960_rk3399/Kconfig
> > create mode 100644 board/vamrs/rock960_rk3399/MAINTAINERS
> > create mode 100644 board/vamrs/rock960_rk3399/Makefile
> > create mode 100644 board/vamrs/rock960_rk3399/README
> > create mode 100644 board/vamrs/rock960_rk3399/rock960-rk3399.c
> > create mode 100644 include/configs/rock960_rk3399.h
>  
>  Reviewed-by: Simon Glass 
>  
>  Could you also add a note to README.rockchip? Some of your docs seem
>  to duplicate what is there.
> >>> 
> >>> Thanks for your review!
> >>> 
> >>> You mean, I should skip the duplicate instructions and add a pointer to
> >>> relevant sections in Rockchip README?
> >> 
> >> I also had had a similar comment on an earlier series: we should avoid 
> >> just copying these
> >> instructions verbatim into every new board: if these are indeed identical 
> >> to Rockchip’s EVB
> >> (i.e. if the board-vendor completely relies on the chip-vendor's tools), 
> >> they should reference
> >> back to the EVB’s README instead of duplicating the content.
> >> 
> > 
> > Yes, I agree here. The instructions are almost 100% SoC-specific, not board 
> > specific.
> > Having a doc per SoC is the way to go, IMO.
> 
> That’s not entirely true: on the RK3399-Q7 we have very different 
> instructions, as we have
> our own tooling and maintain a number of components specifically for the 
> board.
> In other words: many boards will want to reference back to the EVB’s 
> instructions, but not
> all of them … and the instructions are not entirely SoC specific, but most 
> vendors choose
> to do things exactly the same as for the EVB.
>

Agree! Even we are working on customizing the instructions for Rock960
family boards. The current instructions in README is just an intial
reference to get the board up and running. But I admit that it is a dup
of EVB mostly. 

> > Philipp: do you think it's acceptable that this is done as follow-up 
> > patches?
> 
> Just rewrite the README to point it to the one in the EVB-directory and this 
> can go in with the
> next batch of patches...

Cool. Then I will modify the instructions and push out as an incremental
patchset once this series gets in.

Thanks,
Mani

> 
> > Thanks!
> > Eze
> 
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Re: [U-Boot] [PATCH 0/7] Exynos4412 SPL support

2018-10-03 Thread Minkyu Kang
Dear Simon Shields,

On 12/09/18 17:28, Simon Shields wrote:
> Hi,
> 
> This patch series adds support for using U-Boot's SPL as the second
> stage bootloader ("BL2") on Exynos4412 SoCs.
> 
> - Patch #1 adds support for the EMMC/SD OM pin configuration, which is used
>   by the boards I tested on.
> - Patch #2 configures the magic values used to indicate system suspend
>   state (which are identical to exynos5).
> - Patch #3 renames the existing exynos4 clock/dmc initialisation code
>   to reflect the fact that it only supports exynos4210.
> - Patches #4 and #5 add/fill in structs reflecting the PMU and TZASC
>   register layouts on exynos4412, respectively.
> - Patch #6 adds the exynos4412 DMC and clock initialisation code and
>   enables building the SPL on exynos4412 platforms.
> - Patch #7 enables building the "mkexynosspl" utility for exynos4 SoCs.
> 
> The majority of the logic in patch #6 comes from a vendor u-boot dump
> (2010.12!), however, small portions (mostly code used for 2GB RAM
> initialisation) were reverse engineered from the vendor
> bootloader found on a GT-N7100.
> 
> This patch series has been tested on a GT-I9300 (exynos4412, 1GB RAM)
> and a GT-N7100 (exynos4412 prime, 2GB RAM), with a few additional
> patchsets applied for board/HW support (which I intend to upstream in
> the future).
> 
> Cheers,
> Simon
> 
> Simon Shields (7):
>   ARM: exynos: spl: add EMMC/SD boot mode support
>   exynos4: configure power down magic values
>   ARM: exynos: rename exynos4 setup files to exynos4210
>   ARM: exynos: fill in exynos4412_power struct
>   ARM: exynos: add exynos4412 TZASC memory layout
>   ARM: exynos: SPL support for exynos 4412
>   tools: build mkexynosspl for exynos4 as well
> 
>  arch/arm/mach-exynos/Kconfig  |   6 +
>  arch/arm/mach-exynos/Makefile |   3 +-
>  ...init_exynos4.c => clock_init_exynos4210.c} |   2 +-
>  arch/arm/mach-exynos/clock_init_exynos4412.c  | 122 +
>  ...c_init_exynos4.c => dmc_init_exynos4210.c} |   2 +-
>  arch/arm/mach-exynos/dmc_init_exynos4412.c| 185 
>  .../{exynos4_setup.h => exynos4210_setup.h}   |   0
>  arch/arm/mach-exynos/exynos4412_setup.h   | 425 ++
>  arch/arm/mach-exynos/include/mach/cpu.h   |   2 +-
>  arch/arm/mach-exynos/include/mach/dmc.h   |  19 +
>  arch/arm/mach-exynos/include/mach/power.h | 290 +++-
>  arch/arm/mach-exynos/power.c  |  12 +
>  arch/arm/mach-exynos/spl_boot.c   |  22 +-
>  include/configs/exynos4-common.h  |   5 +
>  tools/Makefile|   1 +
>  15 files changed, 1084 insertions(+), 12 deletions(-)
>  rename arch/arm/mach-exynos/{clock_init_exynos4.c => 
> clock_init_exynos4210.c} (99%)
>  create mode 100644 arch/arm/mach-exynos/clock_init_exynos4412.c
>  rename arch/arm/mach-exynos/{dmc_init_exynos4.c => dmc_init_exynos4210.c} 
> (99%)
>  create mode 100644 arch/arm/mach-exynos/dmc_init_exynos4412.c
>  rename arch/arm/mach-exynos/{exynos4_setup.h => exynos4210_setup.h} (100%)
>  create mode 100644 arch/arm/mach-exynos/exynos4412_setup.h
> 

I've got warning/error.

arch/arm/mach-exynos/spl_boot.c: In function 'copy_uboot_to_ram':
arch/arm/mach-exynos/spl_boot.c:189:6: warning: unused variable 'ret' 
[-Wunused-variable]
  u32 ret;
  ^~~
  CC  spl/arch/arm/mach-exynos/lowlevel_init.o
  AS  spl/arch/arm/lib/crt0_arm_efi.o
  LD  spl/arch/arm/lib/built-in.o
  CC  spl/arch/arm/lib/reloc_arm_efi.o
  AR  spl/arch/arm/lib/lib.a
  LD  spl/arch/arm/mach-exynos/built-in.o
spl/arch/arm/mach-exynos/dmc_init_exynos4412.o: In function 
`board_num_mem_chips':
/home/share/Work/u-boot-samsung/arch/arm/mach-exynos/dmc_init_exynos4412.c:35: 
multiple definition of `mem_ctrl_init'
spl/arch/arm/mach-exynos/dmc_init_exynos4210.o:/home/share/Work/u-boot-samsung/arch/arm/mach-exynos/dmc_init_exynos4210.c:169:
 first defined here
spl/arch/arm/mach-exynos/clock_init_exynos4412.o: In function 
`system_clock_init':
/home/share/Work/u-boot-samsung/arch/arm/mach-exynos/clock_init_exynos4412.c:34:
 multiple definition of `system_clock_init'
spl/arch/arm/mach-exynos/clock_init_exynos4210.o:/home/share/Work/u-boot-samsung/arch/arm/mach-exynos/clock_init_exynos4210.c:40:
 first defined here
make[2]: *** [spl/arch/arm/mach-exynos/built-in.o] Error 1
make[1]: *** [spl/arch/arm/mach-exynos] Error 2
make: *** [spl/u-boot-spl] Error 2

Could you please check?

Thanks,
Minkyu Kang.
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Re: [U-Boot] [PATCH V5 00/32] i.MX: Add i.MX8QXP support

2018-10-03 Thread Peng Fan
Gentle ping..

Thanks,
Peng

> -Original Message-
> From: Peng Fan
> Sent: 2018年9月26日 21:52
> To: sba...@denx.de; ag...@denx.de
> Cc: u-boot@lists.denx.de; Peng Fan 
> Subject: [PATCH V5 00/32] i.MX: Add i.MX8QXP support
> 
> This patchset is to upstream i.MX8QXP and mek board support, with some
> drivers update to support i.MX8QXP. The information about the processor could
> be found
> https://www.nxp.com/products/processors-and-microcontrollers/applications-p
> rocessors/i.mx-applications-processors/i.mx-8-processors/i.mx-8x-family-arm-co
> rtex-a35-3d-graphics-4k-video-dsp-error-correcting-code-on-ddr:i.MX8X
> 
> The architecture of i.MX8QXP is different from i.MX6/7/8M, inside i.MX8QXP,
> there is a dedicated processor(SCU) used for power/clock/pin/ pad/resource
> management/thermal and etc.
> 
> 
> V5:
> Addressed Lothar Waßmann's comments for patch 24 and 32.
> Rebased on master.
> 
> V4:
> Add reviewed tag from Anatolij Gustschin Addressed comments from Anatolig
> for patch "misc: add i.MX8 misc driver"
> Addressed comments from Anatolig for patch "misc: imx8: add scfw api
> impementation"
>  Merged the files into one
>  Moved one error handle to patch 4
> Moved patch "arm: global_data: add scu_dev for i.MX8" to patch 7 For Fabio's
> comments to imx-mkimage, I'll start the porting work, but needs more time, it
> will be not be in this patchset.
> 
> V3:
> 
> patch 7: use CONFIG_IMX8
> patch 29: use CONFIG_IMX8
> patch 32: Added README with scfw_tcm.bin link added
> misc: remove sc_rpc_msg_t typedef, use struct sc_rpc_msg_s in patchset.
> 
> V2:
> In this V2 patchset, the SCFW API is replaced by uclass driver implementation,
> but the api name is not changed from scfw api.
> The related macro definitions are kept in different api.h file following SCFW 
> API
> file structure.
> 
> Impelemnted scu misc driver to handle the low level communication between
> Acore and SCU.
> Implemented rm/pm/pad/misc protocol code to invoke misc_call for different
> functionality.
> The dm clk/pinctrl/power and others will invokde the protocol api to
> communicate with SCU.
> 
> The arch/arm/mach-imx/imx8/clock.c currently is only a dummy file to avoid
> build break for mxc_get_clock.
> 
> The i2c patch and common power domain patches are removed from this
> patchset.
> 
> The imx8 name still kept, this is because NXP marketing requires to use this
> name for i.MX branding.
> 
> 
> Peng Fan (30):
>   dt-bindings: pinctrl: add i.MX8QXP pads definition
>   dt-bindings: clock: dt-bindings: pinctrl: add i.MX8QXP clocks
> definition
>   dt-bindings: soc: add i.MX8QXP pm and rsrc definition
>   imx8: add scfw macro definition
>   imx: add Kconfig entry for i.MX8QXP
>   arm: build mach-imx for i.MX8
>   arm: global_data: add scu_dev for i.MX8
>   misc: add i.MX8 misc driver
>   misc: imx8: add scfw api impementation
>   imx: boot_mode: Add FLEXSPI boot entry
>   imx8: add imx-regs header file
>   imx8: pins: include i.MX8QXP pin header when CONFIG_IMX8QXP defined
>   imx: add i.MX8 cpu type
>   armv8: add cpu core helper functions
>   imx8: add basic cpu support
>   imx8: add boot device detection
>   imx8: implement mmc_get_env_dev
>   imx8: add mmu and dram related functiions
>   imx8: add arch_cpu_init arch_cpu_init_dm
>   imx8: add iomux configuration api
>   imx8: add dummy clock
>   gpio: mxc_gpio: add support for i.MX8
>   pinctrl: Add pinctrl driver for i.MX8
>   power: Add power domain driver for i.MX8
>   clk: imx: add clk driver for i.MX8QXP
>   serial_lpuart: Update lpuart driver to support i.MX8
>   serial: lpuart: support uclass clk api
>   mmc: fsl_esdhc: add uclass clk support
>   arm: dts: introduce dtsi for i.MX8QXP
>   imx: add i.MX8QXP MEK board support
> 
> Ye Li (2):
>   serial: lpuart: Enable RX and TX FIFO
>   fsl_esdhc: Update usdhc driver to support i.MX8
> 
>  arch/arm/Kconfig  |   8 +
>  arch/arm/Makefile |   2 +-
>  arch/arm/dts/Makefile |   2 +
>  arch/arm/dts/fsl-imx8-ca35.dtsi   |  66 ++
>  arch/arm/dts/fsl-imx8dx.dtsi  | 452 +
>  arch/arm/dts/fsl-imx8dxp.dtsi |  11 +
>  arch/arm/dts/fsl-imx8qxp-mek.dts  | 136 
>  arch/arm/dts/fsl-imx8qxp.dtsi |  51 ++
>  arch/arm/include/asm/arch-imx/cpu.h   |   5 +
>  arch/arm/include/asm/arch-imx8/clock.h|  27 +
>  arch/arm/include/asm/arch-imx8/gpio.h |  21 +
>  arch/arm/include/asm/arch-imx8/imx-regs.h |  46 ++
>  arch/arm/include/asm/arch-imx8/imx8-pins.h|  15 +
>  arch/arm/include/asm/arch-imx8/iomux.h|  40 ++
>  arch/arm/include/asm/arch-imx8/power-domain.h |  15 +
>  arch/arm/include/asm/arch-imx8/sci/rpc.h  | 158 +
>  arch/arm/include/asm/arch-imx8/sci/sci.h  |  86 +++
>  arch/arm/include/asm/arch-imx8/sci/svc/misc/api.h |  30 +
> 

Re: [U-Boot] [RFC] efi: workaround for SCT (against unicode collation protocol)

2018-10-03 Thread Dong Wei
Copying UTWG

Sent from my iPhone

> On Oct 1, 2018, at 12:49 AM, Alexander Graf  wrote:
>
>
>
>> On 01.10.18 09:35, AKASHI Takahiro wrote:
>> UEFI SCT doesn't run on the latest u-boot (or Alex's efi-next).
>> Among other issues, there are two problems around language handling:
>> 1. SCT looks for efi_unicode_collation_protocol with an (old?) guid,
>>{0x1d85cd7f, 0xf43d, 0x11d2,
>> 0x9a, 0x0c, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d)
>> 2. SCT uses a hard-coded language name, "eng," in SctInializeLib()
>>
>> These assumptions conflict with Heinrich's current unicode implementation.
>>
>> While this patch fixes them in a quick way, it's more of an informative
>> one so that we will share and discuss them.
>
> FWIW the collation protocol v1 is considered deprecated pretty much
> since UEFI - and same goes for the "eng" name which is the v1
> representation of "English".
>
> I had a similar patch in my queue, but after consultation with Heinrich
> we agreed that we should be a clean UEFI implementation without too much
> legacy. What the goal instead should be is to help the UEFI people to
> fix SCT to no longer require deprecated protocols.
>
> I've thus added Vincent and Dong for input :).
>
>
> Thanks,
>
> Alex
>
>>
>> Signed-off-by: AKASHI Takahiro 
>> ---
>> include/efi_api.h  |  3 +++
>> include/efi_loader.h   |  3 +++
>> lib/efi_loader/efi_root_node.c |  2 ++
>> lib/efi_loader/efi_unicode_collation.c | 13 +
>> 4 files changed, 21 insertions(+)
>>
>> diff --git a/include/efi_api.h b/include/efi_api.h
>> index d78d72b0..841b680581c0 100644
>> --- a/include/efi_api.h
>> +++ b/include/efi_api.h
>> @@ -1262,6 +1262,9 @@ struct efi_driver_binding_protocol {
>>efi_handle_t driver_binding_handle;
>> };
>>
>> +#define EFI_UNICODE_COLLATION_PROTOCOL_GUID \
>> +EFI_GUID(0x1d85cd7f, 0xf43d, 0x11d2, \
>> + 0x9a, 0x0c, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d)
>> #define EFI_UNICODE_COLLATION_PROTOCOL2_GUID \
>>EFI_GUID(0xa4c751fc, 0x23ae, 0x4c3e, \
>> 0x92, 0xe9, 0x49, 0x64, 0xcf, 0x63, 0xf3, 0x49)
>> diff --git a/include/efi_loader.h b/include/efi_loader.h
>> index c8760bebd6bc..2d99eba15e32 100644
>> --- a/include/efi_loader.h
>> +++ b/include/efi_loader.h
>> @@ -104,6 +104,8 @@ extern const struct efi_device_path_to_text_protocol 
>> efi_device_path_to_text;
>> extern const struct efi_device_path_utilities_protocol
>>efi_device_path_utilities;
>> /* Implementation of the EFI_UNICODE_COLLATION_PROTOCOL */
>> +extern const struct efi_unicode_collation_protocol
>> +efi_unicode_collation_protocol_eng;
>> extern const struct efi_unicode_collation_protocol
>>efi_unicode_collation_protocol;
>> extern const struct efi_hii_config_routing_protocol efi_hii_config_routing;
>> @@ -142,6 +144,7 @@ extern const efi_guid_t efi_file_system_info_guid;
>> extern const efi_guid_t efi_guid_device_path_utilities_protocol;
>> /* GUID of the Unicode collation protocol */
>> extern const efi_guid_t efi_guid_unicode_collation_protocol;
>> +extern const efi_guid_t efi_guid_unicode_collation_protocol2;
>> extern const efi_guid_t efi_guid_hii_config_routing_protocol;
>> extern const efi_guid_t efi_guid_hii_database_protocol;
>> extern const efi_guid_t efi_guid_hii_string_protocol;
>> diff --git a/lib/efi_loader/efi_root_node.c b/lib/efi_loader/efi_root_node.c
>> index b056ba3ee880..aadb47aba1cd 100644
>> --- a/lib/efi_loader/efi_root_node.c
>> +++ b/lib/efi_loader/efi_root_node.c
>> @@ -70,6 +70,8 @@ efi_status_t efi_root_node_register(void)
>>
>>/* Install Unicode collation protocol */
>>ret = efi_add_protocol(root, _guid_unicode_collation_protocol,
>> +   (void *)_unicode_collation_protocol_eng);
>> +ret = efi_add_protocol(root, _guid_unicode_collation_protocol2,
>>   (void *)_unicode_collation_protocol);
>>if (ret != EFI_SUCCESS)
>>goto failure;
>> diff --git a/lib/efi_loader/efi_unicode_collation.c 
>> b/lib/efi_loader/efi_unicode_collation.c
>> index 7f3ea3c77e4e..932feb3a9984 100644
>> --- a/lib/efi_loader/efi_unicode_collation.c
>> +++ b/lib/efi_loader/efi_unicode_collation.c
>> @@ -28,6 +28,8 @@ static const u16 codepage[] = CP437;
>>
>> /* GUID of the EFI_UNICODE_COLLATION_PROTOCOL */
>> const efi_guid_t efi_guid_unicode_collation_protocol =
>> +EFI_UNICODE_COLLATION_PROTOCOL_GUID;
>> +const efi_guid_t efi_guid_unicode_collation_protocol2 =
>>EFI_UNICODE_COLLATION_PROTOCOL2_GUID;
>>
>> /**
>> @@ -318,6 +320,17 @@ static bool EFIAPI efi_str_to_fat(struct 
>> efi_unicode_collation_protocol *this,
>>return ret;
>> }
>>
>> +const
>> +struct efi_unicode_collation_protocol efi_unicode_collation_protocol_eng = {
>> +.stri_coll = efi_stri_coll,
>> +.metai_match = efi_metai_match,
>> +.str_lwr = efi_str_lwr,
>> +.str_upr = efi_str_upr,
>> +.fat_to_str = efi_fat_to_str,
>> +.str_to_fat = efi_str_to_fat,

Re: [U-Boot] [PATCH] fsl/usb: Workaround for USB erratum-A005275

2018-10-03 Thread Marek Vasut
On 10/03/2018 10:21 PM, Chris Packham wrote:
> Workaround makes FS as default mode on all affected socs.
> 
> Add support to check erratum-A005275 validity for an soc. This info is
> required to determine whether a given soc is affected by this erratum.
> Add quirk for this erratum "has_fsl_erratum_a005275" . This quirk is used
> to enable workaround for the errata
> 
> Force FS mode as default by:
> - making EPS as FS
> - setting PFSC bit to disable HS chirping
> 
> This workaround can be disabled by mentioning "no_erratum_a005275" in
> hwconfig string
> 
> Signed-off-by: Chris Packham 
[...]

> diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> index a04f6a31c8e4..71e4ded53100 100644
> --- a/drivers/usb/host/ehci-fsl.c
> +++ b/drivers/usb/host/ehci-fsl.c
> @@ -93,6 +93,7 @@ static int ehci_fsl_probe(struct udevice *dev)
>   struct usb_ehci *ehci = NULL;
>   struct ehci_hccr *hccr;
>   struct ehci_hcor *hcor;
> + struct ehci_ctrl *echi_ctrl = >echi;

Was this ever even compile-tested ? See echi_ctrl vs ehci_ctrl below ...

>   /*
>* Get the base address for EHCI controller from the device node
> @@ -107,6 +108,8 @@ static int ehci_fsl_probe(struct udevice *dev)
>   hcor = (struct ehci_hcor *)
>   ((void *)hccr + HC_LENGTH(ehci_readl(>cr_capbase)));
>  
> + ehci_ctrl->has_fsl_erratum_a005275 = has_erratum_a005275();

[...]

-- 
Best regards,
Marek Vasut
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[U-Boot] [PATCH v2 1/1, for v2018.11-rc2] efi_loader: execute efi_save_gd() first

2018-10-03 Thread Heinrich Schuchardt
If DEBUG is defined we may be calling EFI_CALL already during the
initialization of the EFI subsystem. We must make sure efi_save_gd() has
already been called at that moment.

Anyway it is better to have this call in one location instead of three.

This fixes an illegal memory access occurring since 4e6b5d6503ce
("efi_loader: create root node") with DEBUG = 1.

Fixes: 4e6b5d6503ce ("efi_loader: create root node")
Signed-off-by: Heinrich Schuchardt 
---
v2
rebase on current master
---
 cmd/bootefi.c | 24 +++-
 1 file changed, 7 insertions(+), 17 deletions(-)

diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 82d755ceb3..4d68d80748 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -40,6 +40,13 @@ efi_status_t efi_init_obj_list(void)
 {
efi_status_t ret = EFI_SUCCESS;
 
+   /*
+* On the ARM architecture gd is mapped to a fixed register (r9 or x18).
+* As this register may be overwritten by an EFI payload we save it here
+* and restore it on every callback entered.
+*/
+   efi_save_gd();
+
/* Initialize once only */
if (efi_obj_list_initialized != OBJ_LIST_NOT_INITIALIZED)
return efi_obj_list_initialized;
@@ -374,12 +381,6 @@ static efi_status_t do_bootefi_exec(void *efi,
if (ret != EFI_SUCCESS)
goto exit;
 
-   /*
-* gd lives in a fixed register which may get clobbered while we execute
-* the payload. So save it here and restore it on every callback entry
-*/
-   efi_save_gd();
-
/* Transfer environment variable bootargs as load options */
set_load_options(loaded_image_info, "bootargs");
/* Load the EFI payload */
@@ -460,12 +461,6 @@ static int do_bootefi_bootmgr_exec(void)
void *addr;
efi_status_t r;
 
-   /*
-* gd lives in a fixed register which may get clobbered while we execute
-* the payload. So save it here and restore it on every callback entry
-*/
-   efi_save_gd();
-
addr = efi_bootmgr_load(_path, _path);
if (!addr)
return 1;
@@ -547,11 +542,6 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int 
argc, char * const argv[])
if (r != EFI_SUCCESS)
return CMD_RET_FAILURE;
 
-   /*
-* gd lives in a fixed register which may get clobbered while we
-* execute the payload. So save it here and restore it on every
-* callback entry
-*/
efi_save_gd();
/* Transfer environment variable efi_selftest as load options */
set_load_options(loaded_image_info, "efi_selftest");
-- 
2.19.0

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[U-Boot] [PATCH 1/1, for v2018.11-rc2] efi_loader: execute efi_save_gd() first

2018-10-03 Thread Heinrich Schuchardt
If DEBUG is defined we may be calling EFI_CALL already during the
initialization of the EFI subsystem. We must make sure efi_save_gd() has
already been called at that moment.

Anyway it is better to have this call in one location instead of three.

This fixes an illegal memory access occurring since 4e6b5d6503ce
("efi_loader: create root node") with DEBUG = 1.

Fixes: 4e6b5d6503ce ("efi_loader: create root node")
Signed-off-by: Heinrich Schuchardt 
---
 cmd/bootefi.c | 26 --
 1 file changed, 8 insertions(+), 18 deletions(-)

diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 5fc054c9da..cc1b7d1285 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -40,6 +40,13 @@ efi_status_t efi_init_obj_list(void)
 {
efi_status_t ret = EFI_SUCCESS;
 
+   /*
+* On the ARM architecture gd is mapped to a fixed register (r9 or x18).
+* As this register may be overwritten by an EFI payload we save it here
+* and restore it on every callback entered.
+*/
+   efi_save_gd();
+
/* Initialize once only */
if (efi_obj_list_initialized != OBJ_LIST_NOT_INITIALIZED)
return efi_obj_list_initialized;
@@ -365,12 +372,6 @@ static efi_status_t do_bootefi_exec(void *efi,
efi_setup_loaded_image(_image_info, _image_info_obj,
   device_path, image_path);
 
-   /*
-* gd lives in a fixed register which may get clobbered while we execute
-* the payload. So save it here and restore it on every callback entry
-*/
-   efi_save_gd();
-
/* Transfer environment variable bootargs as load options */
set_load_options(_image_info, "bootargs");
/* Load the EFI payload */
@@ -450,12 +451,6 @@ static int do_bootefi_bootmgr_exec(void)
void *addr;
efi_status_t r;
 
-   /*
-* gd lives in a fixed register which may get clobbered while we execute
-* the payload. So save it here and restore it on every callback entry
-*/
-   efi_save_gd();
-
addr = efi_bootmgr_load(_path, _path);
if (!addr)
return 1;
@@ -534,12 +529,7 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int 
argc, char * const argv[])
efi_setup_loaded_image(_image_info,
   _image_info_obj,
   bootefi_device_path, bootefi_image_path);
-   /*
-* gd lives in a fixed register which may get clobbered while we
-* execute the payload. So save it here and restore it on every
-* callback entry
-*/
-   efi_save_gd();
+
/* Transfer environment variable efi_selftest as load options */
set_load_options(_image_info, "efi_selftest");
/* Execute the test */
-- 
2.19.0

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Re: [U-Boot] [U-Boot,1/1] efi_loader: create root node

2018-10-03 Thread Heinrich Schuchardt
On 09/23/2018 02:36 PM, Alexander Graf wrote:
>> Currently we assign a lot of protocols to loaded images though
>> these protocols are not related to them. Instead they should be
>> installed on a separate handle. Via the device path it is the
>> parent to the devices like the network adapter.
>>
>> Signed-off-by: Heinrich Schuchardt 
> 
> Thanks, applied to efi-next
> 
> Alex
> 
> 

Since this patch when inserting DEBUG=1 on the top of efi_boottime.c and
running qemu_arm_defconfig with CONFIG_EFI_SELFTEST I get an QEMU error:

U-Boot 2018.09-00353-g4e6b5d6503-dirty (Oct 03 2018 - 22:13:36 +0200)

DRAM:  128 MiB
WARNING: Caches not enabled
In:pl011@900
Out:   pl011@900
Err:   pl011@900
Net:   No ethernet found.
Hit any key to stop autoboot:  0
=> bootefi selftest
PFLASH: Possible BUG - Write block confirmmake: *** [Makefile:86: check]
Error 1

I have not yet found what is wrong.

Best regards

Heinrich
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[U-Boot] [PATCH] fsl/usb: Workaround for USB erratum-A005275

2018-10-03 Thread Chris Packham
Workaround makes FS as default mode on all affected socs.

Add support to check erratum-A005275 validity for an soc. This info is
required to determine whether a given soc is affected by this erratum.
Add quirk for this erratum "has_fsl_erratum_a005275" . This quirk is used
to enable workaround for the errata

Force FS mode as default by:
- making EPS as FS
- setting PFSC bit to disable HS chirping

This workaround can be disabled by mentioning "no_erratum_a005275" in
hwconfig string

Signed-off-by: Chris Packham 
---
This is based on a patch form Freescale's public git repo[1]. I'm not
sure why it never made it upstream but I have P2041RDB boards that are
affected as well as custom designs using the same SoC.

I've cleaned things up a bit to fit with the other errata.

[1] - 
http://git.freescale.com/git/cgit.cgi/ppc/sdk/u-boot.git/commit/?h=sdk-v1.4.x=f490f1e68af52c8fa68407d23a8ab77886b51106


 arch/powerpc/cpu/mpc85xx/Kconfig  |  8 
 arch/powerpc/cpu/mpc85xx/cmd_errata.c |  4 
 drivers/usb/common/fsl-errata.c   | 28 +++
 drivers/usb/host/ehci-fsl.c   |  7 +++
 drivers/usb/host/ehci-hcd.c   | 12 +++-
 drivers/usb/host/ehci.h   |  4 
 include/fsl_usb.h |  1 +
 7 files changed, 63 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 7d139fffa24a..309ca294601b 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -659,6 +659,7 @@ config ARCH_P1010
select SYS_FSL_ERRATUM_A004477
select SYS_FSL_ERRATUM_A004508
select SYS_FSL_ERRATUM_A005125
+   select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_A007075
select SYS_FSL_ERRATUM_ESDHC111
@@ -821,6 +822,7 @@ config ARCH_P2041
select FSL_LAW
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004849
+   select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_CPU_A003999
select SYS_FSL_ERRATUM_DDR_A003
@@ -845,6 +847,7 @@ config ARCH_P3041
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004849
+   select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A005812
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_CPU_A003999
@@ -910,6 +913,7 @@ config ARCH_P5020
select FSL_LAW
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
+   select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_DDR_A003
select SYS_FSL_ERRATUM_DDR_A003474
@@ -935,6 +939,7 @@ config ARCH_P5040
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004699
+   select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A005812
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_DDR_A003
@@ -1303,6 +1308,9 @@ config SYS_FSL_ERRATUM_A005812
 config SYS_FSL_ERRATUM_A005871
bool
 
+config SYS_FSL_ERRATUM_A005275
+   bool
+
 config SYS_FSL_ERRATUM_A006261
bool
 
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c 
b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index eda2e7e63d76..e455d8baf584 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -307,6 +307,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
(SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV))
puts("Work-around for Erratum I2C-A004447 enabled\n");
 #endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A005275
+   if (has_erratum_a005275())
+   puts("Work-around for Erratum A005275 enabled\n");
+#endif
 #ifdef CONFIG_SYS_FSL_ERRATUM_A006261
if (has_erratum_a006261())
puts("Work-around for Erratum A006261 enabled\n");
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
index 386130d7a1f6..9eb1d2306725 100644
--- a/drivers/usb/common/fsl-errata.c
+++ b/drivers/usb/common/fsl-errata.c
@@ -6,6 +6,7 @@
  */
 
 #include 
+#include 
 #include 
 #include
 #if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) || \
@@ -44,6 +45,33 @@ bool has_dual_phy(void)
return false;
 }
 
+bool has_erratum_a005275(void)
+{
+   u32 svr = get_svr();
+   u32 soc = SVR_SOC_VER(svr);
+
+   if (hwconfig("no_erratum_a005275"))
+   return false;
+
+   switch (soc) {
+#ifdef CONFIG_PPC
+   case SVR_P3041:
+   case SVR_P2041:
+   case SVR_P2040:
+   return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+   case SVR_P5010:
+   case SVR_P5020:
+   case SVR_P5021:
+   return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+   case SVR_P5040:
+   case SVR_P1010:
+   return 

Re: [U-Boot] [PATCH V2] spl: Weed out CONFIG_SYS_TEXT_BASE usage

2018-10-03 Thread Marek Vasut
On 10/03/2018 03:39 PM, Michal Simek wrote:
> Hi Marek,

Hi,

[...]

>> diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
>> index e594beaeaa..619b39a537 100644
>> --- a/common/spl/spl_ram.c
>> +++ b/common/spl/spl_ram.c
>> @@ -63,8 +63,9 @@ static int spl_ram_load_image(struct spl_image_info
>> *spl_image,
>>  * No binman support or no information. For now,
>> fix it
>>  * to the address pointed to by U-Boot.
>>  */
>> -   u_boot_pos = CONFIG_SYS_TEXT_BASE -
>> -   sizeof(struct image_header);
>> +   header = spl_get_load_buffer(-sizeof(*header),
>> +sizeof(*header));
>> +
>>
> 
> I am curious how you have tested this change.
> Because I see on my zc706 that this breaks my SPL boot flow.

Definitely not on every single board we support ...

> This should be assigned to u_boot_pos instead of header (which is done 2
> line below)
> and also here is additional empty line which shouldn't be there.
Patches welcome. And yes, it should be u_boot_pos .

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v3 2/4] rockchip: rk3399: Add common Rock960 family from Vamrs

2018-10-03 Thread Philipp Tomsich


> On 03.10.2018, at 21:36, Ezequiel Garcia  wrote:
> 
> On Wed, 2018-10-03 at 21:34 +0200, Philipp Tomsich wrote:
>>> On 02.10.2018, at 16:01, Manivannan Sadhasivam 
>>>  wrote:
>>> 
>>> Hi Simon,
>>> 
>>> On Tue, Oct 02, 2018 at 04:21:38AM -0700, Simon Glass wrote:
 On 27 September 2018 at 12:02, Manivannan Sadhasivam
  wrote:
> Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs.
> It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition)
> 96Boards.
> 
> Below are some of the key differences between both Rock960 and Ficus
> boards:
> 
> 1. Different host enable GPIO for USB
> 2. Different power and reset GPIO for PCI-E
> 3. No Ethernet port on Rock960
> 
> The common board support will be utilized by both boards. The device
> tree has been organized in such a way that only the properties which
> differ between both boards are placed in the board specific dts and
> the reset of the nodes are placed in common dtsi file.
> 
> Signed-off-by: Manivannan Sadhasivam 
> [Added instructions for SD card boot]
> Signed-off-by: Ezequiel Garcia 
> ---
> 
> Changes in v3: Added instruction for copying prebuilt bl31.elf for SPL
> 
> Changes in v2: None
> 
> arch/arm/dts/rk3399-rock960.dtsi| 506 
> arch/arm/mach-rockchip/rk3399/Kconfig   |  26 +
> board/vamrs/rock960_rk3399/Kconfig  |  15 +
> board/vamrs/rock960_rk3399/MAINTAINERS  |   6 +
> board/vamrs/rock960_rk3399/Makefile |   6 +
> board/vamrs/rock960_rk3399/README   | 152 ++
> board/vamrs/rock960_rk3399/rock960-rk3399.c |  50 ++
> include/configs/rock960_rk3399.h|  15 +
> 8 files changed, 776 insertions(+)
> create mode 100644 arch/arm/dts/rk3399-rock960.dtsi
> create mode 100644 board/vamrs/rock960_rk3399/Kconfig
> create mode 100644 board/vamrs/rock960_rk3399/MAINTAINERS
> create mode 100644 board/vamrs/rock960_rk3399/Makefile
> create mode 100644 board/vamrs/rock960_rk3399/README
> create mode 100644 board/vamrs/rock960_rk3399/rock960-rk3399.c
> create mode 100644 include/configs/rock960_rk3399.h
 
 Reviewed-by: Simon Glass 
 
 Could you also add a note to README.rockchip? Some of your docs seem
 to duplicate what is there.
>>> 
>>> Thanks for your review!
>>> 
>>> You mean, I should skip the duplicate instructions and add a pointer to
>>> relevant sections in Rockchip README?
>> 
>> I also had had a similar comment on an earlier series: we should avoid just 
>> copying these
>> instructions verbatim into every new board: if these are indeed identical to 
>> Rockchip’s EVB
>> (i.e. if the board-vendor completely relies on the chip-vendor's tools), 
>> they should reference
>> back to the EVB’s README instead of duplicating the content.
>> 
> 
> Yes, I agree here. The instructions are almost 100% SoC-specific, not board 
> specific.
> Having a doc per SoC is the way to go, IMO.

That’s not entirely true: on the RK3399-Q7 we have very different instructions, 
as we have
our own tooling and maintain a number of components specifically for the board.
In other words: many boards will want to reference back to the EVB’s 
instructions, but not
all of them … and the instructions are not entirely SoC specific, but most 
vendors choose
to do things exactly the same as for the EVB.

> Philipp: do you think it's acceptable that this is done as follow-up patches?

Just rewrite the README to point it to the one in the EVB-directory and this 
can go in with the
next batch of patches...

> Thanks!
> Eze

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Re: [U-Boot] [PATCH v3 2/4] rockchip: rk3399: Add common Rock960 family from Vamrs

2018-10-03 Thread Ezequiel Garcia
On Wed, 2018-10-03 at 21:34 +0200, Philipp Tomsich wrote:
> > On 02.10.2018, at 16:01, Manivannan Sadhasivam 
> >  wrote:
> > 
> > Hi Simon,
> > 
> > On Tue, Oct 02, 2018 at 04:21:38AM -0700, Simon Glass wrote:
> > > On 27 September 2018 at 12:02, Manivannan Sadhasivam
> > >  wrote:
> > > > Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs.
> > > > It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition)
> > > > 96Boards.
> > > > 
> > > > Below are some of the key differences between both Rock960 and Ficus
> > > > boards:
> > > > 
> > > > 1. Different host enable GPIO for USB
> > > > 2. Different power and reset GPIO for PCI-E
> > > > 3. No Ethernet port on Rock960
> > > > 
> > > > The common board support will be utilized by both boards. The device
> > > > tree has been organized in such a way that only the properties which
> > > > differ between both boards are placed in the board specific dts and
> > > > the reset of the nodes are placed in common dtsi file.
> > > > 
> > > > Signed-off-by: Manivannan Sadhasivam 
> > > > [Added instructions for SD card boot]
> > > > Signed-off-by: Ezequiel Garcia 
> > > > ---
> > > > 
> > > > Changes in v3: Added instruction for copying prebuilt bl31.elf for SPL
> > > > 
> > > > Changes in v2: None
> > > > 
> > > > arch/arm/dts/rk3399-rock960.dtsi| 506 
> > > > arch/arm/mach-rockchip/rk3399/Kconfig   |  26 +
> > > > board/vamrs/rock960_rk3399/Kconfig  |  15 +
> > > > board/vamrs/rock960_rk3399/MAINTAINERS  |   6 +
> > > > board/vamrs/rock960_rk3399/Makefile |   6 +
> > > > board/vamrs/rock960_rk3399/README   | 152 ++
> > > > board/vamrs/rock960_rk3399/rock960-rk3399.c |  50 ++
> > > > include/configs/rock960_rk3399.h|  15 +
> > > > 8 files changed, 776 insertions(+)
> > > > create mode 100644 arch/arm/dts/rk3399-rock960.dtsi
> > > > create mode 100644 board/vamrs/rock960_rk3399/Kconfig
> > > > create mode 100644 board/vamrs/rock960_rk3399/MAINTAINERS
> > > > create mode 100644 board/vamrs/rock960_rk3399/Makefile
> > > > create mode 100644 board/vamrs/rock960_rk3399/README
> > > > create mode 100644 board/vamrs/rock960_rk3399/rock960-rk3399.c
> > > > create mode 100644 include/configs/rock960_rk3399.h
> > > 
> > > Reviewed-by: Simon Glass 
> > > 
> > > Could you also add a note to README.rockchip? Some of your docs seem
> > > to duplicate what is there.
> > 
> > Thanks for your review!
> > 
> > You mean, I should skip the duplicate instructions and add a pointer to
> > relevant sections in Rockchip README?
> 
> I also had had a similar comment on an earlier series: we should avoid just 
> copying these
> instructions verbatim into every new board: if these are indeed identical to 
> Rockchip’s EVB
> (i.e. if the board-vendor completely relies on the chip-vendor's tools), they 
> should reference
> back to the EVB’s README instead of duplicating the content.
> 

Yes, I agree here. The instructions are almost 100% SoC-specific, not board 
specific.
Having a doc per SoC is the way to go, IMO.

Philipp: do you think it's acceptable that this is done as follow-up patches?

Thanks!
Eze
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Re: [U-Boot] [U-Boot, v3, 1/4] arm: dts: rockchip: add some common pin-settings to rk3399

2018-10-03 Thread Philipp Tomsich
> From: Randy Li 
> 
> Those pins would be used by many boards.
> 
> Commit grabbed from Linux:
> 
> commit b41023282d07b61a53e2c9b9508912b1e7ce7b4f
> Author: Randy Li 
> Date:   Thu Jun 21 21:32:10 2018 +0800
> 
> arm64: dts: rockchip: add some common pin-settings to rk3399
> 
> Those pins would be used by many boards.
> 
> Signed-off-by: Randy Li 
> Signed-off-by: Heiko Stuebner 
> 
> Acked-by: Philipp Tomsich 
> Signed-off-by: Randy Li 
> Signed-off-by: Heiko Stuebner 
> Signed-off-by: Ezequiel Garcia 
> Tested-by: Peter Robinson 
> ---
> 
> Changes in v3: None
> 
> Changes in v2: None
> 
>  arch/arm/dts/rk3399.dtsi | 55 +++-
>  1 file changed, 49 insertions(+), 6 deletions(-)
> 

Reviewed-by: Philipp Tomsich 
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Re: [U-Boot] [U-Boot, v3, 3/4] rockchip: rk3399: Add Rock960 CE board support

2018-10-03 Thread Philipp Tomsich
> Add board support for Rock960 CE board from Vamrs. This board utilizes
> common Rock960 family support.
> 
> Following peripherals are tested and known to work:
> * USB 2.0
> * MMC
> 
> This commit also adds DDR configuration for LPDDR3-2GiB-1600MHz which
> is being used on the board.
> 
> Signed-off-by: Manivannan Sadhasivam 
> Reviewed-by: Simon Glass 
> Tested-by: Peter Robinson 
> ---
> 
> Changes in v3:
> 
> * Add config options for USB to Ethernet and USB2 PHY
> 
> Changes in v2:
> 
> * Added missing config options for USB/uSD
> * Fixed the commit description for DDR speed
> 
>  arch/arm/dts/Makefile |1 +
>  arch/arm/dts/rk3399-rock960.dts   |   45 +
>  .../arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi | 1536 +
>  configs/rock960-rk3399_defconfig  |   69 +
>  4 files changed, 1651 insertions(+)
>  create mode 100644 arch/arm/dts/rk3399-rock960.dts
>  create mode 100644 arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi
>  create mode 100644 configs/rock960-rk3399_defconfig
> 

Reviewed-by: Philipp Tomsich 
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Re: [U-Boot] [U-Boot, v3, 4/4] rockchip: rk3399: Add Ficus EE board support

2018-10-03 Thread Philipp Tomsich
> Add board support for Ficus EE board from Vamrs. This board utilizes
> common Rock960 family support.
> 
> Following peripherals are tested and known to work:
> * Gigabit Ethernet
> * USB 2.0
> * MMC
> 
> Signed-off-by: Ezequiel Garcia 
> [Reworked based on common Rock960 family support]
> Signed-off-by: Manivannan Sadhasivam 
> Reviewed-by: Simon Glass 
> ---
> 
> Changes in v3: Modified the DRAM config header from LPDDR3 to DDR3
> 
> Changes in v2: None
> 
>  arch/arm/dts/Makefile  |  1 +
>  arch/arm/dts/rk3399-ficus.dts  | 78 ++
>  configs/ficus-rk3399_defconfig | 71 +++
>  3 files changed, 150 insertions(+)
>  create mode 100644 arch/arm/dts/rk3399-ficus.dts
>  create mode 100644 configs/ficus-rk3399_defconfig
> 

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Re: [U-Boot] [PATCH v3 2/4] rockchip: rk3399: Add common Rock960 family from Vamrs

2018-10-03 Thread Philipp Tomsich


> On 02.10.2018, at 16:01, Manivannan Sadhasivam 
>  wrote:
> 
> Hi Simon,
> 
> On Tue, Oct 02, 2018 at 04:21:38AM -0700, Simon Glass wrote:
>> On 27 September 2018 at 12:02, Manivannan Sadhasivam
>>  wrote:
>>> Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs.
>>> It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition)
>>> 96Boards.
>>> 
>>> Below are some of the key differences between both Rock960 and Ficus
>>> boards:
>>> 
>>> 1. Different host enable GPIO for USB
>>> 2. Different power and reset GPIO for PCI-E
>>> 3. No Ethernet port on Rock960
>>> 
>>> The common board support will be utilized by both boards. The device
>>> tree has been organized in such a way that only the properties which
>>> differ between both boards are placed in the board specific dts and
>>> the reset of the nodes are placed in common dtsi file.
>>> 
>>> Signed-off-by: Manivannan Sadhasivam 
>>> [Added instructions for SD card boot]
>>> Signed-off-by: Ezequiel Garcia 
>>> ---
>>> 
>>> Changes in v3: Added instruction for copying prebuilt bl31.elf for SPL
>>> 
>>> Changes in v2: None
>>> 
>>> arch/arm/dts/rk3399-rock960.dtsi| 506 
>>> arch/arm/mach-rockchip/rk3399/Kconfig   |  26 +
>>> board/vamrs/rock960_rk3399/Kconfig  |  15 +
>>> board/vamrs/rock960_rk3399/MAINTAINERS  |   6 +
>>> board/vamrs/rock960_rk3399/Makefile |   6 +
>>> board/vamrs/rock960_rk3399/README   | 152 ++
>>> board/vamrs/rock960_rk3399/rock960-rk3399.c |  50 ++
>>> include/configs/rock960_rk3399.h|  15 +
>>> 8 files changed, 776 insertions(+)
>>> create mode 100644 arch/arm/dts/rk3399-rock960.dtsi
>>> create mode 100644 board/vamrs/rock960_rk3399/Kconfig
>>> create mode 100644 board/vamrs/rock960_rk3399/MAINTAINERS
>>> create mode 100644 board/vamrs/rock960_rk3399/Makefile
>>> create mode 100644 board/vamrs/rock960_rk3399/README
>>> create mode 100644 board/vamrs/rock960_rk3399/rock960-rk3399.c
>>> create mode 100644 include/configs/rock960_rk3399.h
>> 
>> Reviewed-by: Simon Glass 
>> 
>> Could you also add a note to README.rockchip? Some of your docs seem
>> to duplicate what is there.
> 
> Thanks for your review!
> 
> You mean, I should skip the duplicate instructions and add a pointer to
> relevant sections in Rockchip README?

I also had had a similar comment on an earlier series: we should avoid just 
copying these
instructions verbatim into every new board: if these are indeed identical to 
Rockchip’s EVB
(i.e. if the board-vendor completely relies on the chip-vendor's tools), they 
should reference
back to the EVB’s README instead of duplicating the content.

> 
> Regards,
> Mani
> 

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Re: [U-Boot] rockchip: make_fit_atf.py depends on u-boot

2018-10-03 Thread Philipp Tomsich
> u-boot.itb depends on u-boot-nodtb.bin, which in turn depends on u-boot.
> u-boot.its from Rockchip make_fit_atf.py (used by {evb,firefly}-rk3399)
> wants to read u-boot but is lacking this dependency, so that u-boot.itb
> cannot be built in one go. Detect its use and add the missing dependency.
> 
> Reported-by: Yousaf Kaukab 
> Signed-off-by: Andreas Färber 
> ---
>  Makefile | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 

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Re: [U-Boot] [U-Boot, RESEND, 1/2] rockchip: make_fit_atf: use elf entry point

2018-10-03 Thread Philipp Tomsich
> make_fit_atf.py uses physical address of first segment as the
> entry point to bl31. It is incorrect and causes following abort
> when bl31_entry() is called:
> 
> U-Boot SPL board initTrying to boot from MMC1
> "Synchronous Abort" handler, esr 0x0200
> elr:  lr : ff8c7e8c
> x 0: ff8e x 1: 
> x 2:  x 3: ff8e0180
> x 4:  x 5: 
> x 6: 0030 x 7: ff8e0188
> x 8: 01e0 x 9: 
> x10: 0007fcdc x11: 002881b8
> x12: 01a2 x13: 0198
> x14: 0007fdcc x15: 002881b8
> x16: 003c0724 x17: 003c0718
> x18: 0007fe80 x19: ff8e
> x20: 0020 x21: ff8e
> x22:  x23: 0007fe30
> x24: ff8d1c3c x25: ff8d5000
> x26: deadbeef x27: 04a0
> x28: 009c x29: 0007fd90
> 
> Fix it by using the entry point from the elf header.
> 
> Signed-off-by: Mian Yousaf Kaukab 
> ---
>  arch/arm/mach-rockchip/make_fit_atf.py | 7 ---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 

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Re: [U-Boot] [U-Boot, RESEND, 2/2] rockchip: make_fit_atf: make python3 compatible

2018-10-03 Thread Philipp Tomsich
> Make script python3 compatible. No functional changes intended.
> 
> Signed-off-by: Mian Yousaf Kaukab 
> ---
>  arch/arm/mach-rockchip/make_fit_atf.py | 89 
> +-
>  1 file changed, 45 insertions(+), 44 deletions(-)
> 

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Re: [U-Boot] [PATCH v3 3/4] rockchip: rk3399: Add Rock960 CE board support

2018-10-03 Thread Peter Robinson
On Thu, Sep 27, 2018 at 8:03 PM Manivannan Sadhasivam
 wrote:
>
> Add board support for Rock960 CE board from Vamrs. This board utilizes
> common Rock960 family support.
>
> Following peripherals are tested and known to work:
> * USB 2.0
> * MMC
>
> This commit also adds DDR configuration for LPDDR3-2GiB-1600MHz which
> is being used on the board.
>
> Signed-off-by: Manivannan Sadhasivam 
Tested-by: Peter Robinson 

Tested on a Rock960

> ---
>
> Changes in v3:
>
> * Add config options for USB to Ethernet and USB2 PHY
>
> Changes in v2:
>
> * Added missing config options for USB/uSD
> * Fixed the commit description for DDR speed
>
>  arch/arm/dts/Makefile |1 +
>  arch/arm/dts/rk3399-rock960.dts   |   45 +
>  .../arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi | 1536 +
>  configs/rock960-rk3399_defconfig  |   69 +
>  4 files changed, 1651 insertions(+)
>  create mode 100644 arch/arm/dts/rk3399-rock960.dts
>  create mode 100644 arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi
>  create mode 100644 configs/rock960-rk3399_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index ebfa2272627..9b891826b73 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -51,6 +51,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
> rk3399-puma-ddr1333.dtb \
> rk3399-puma-ddr1600.dtb \
> rk3399-puma-ddr1866.dtb \
> +   rk3399-rock960.dtb \
> rv1108-evb.dtb
>  dtb-$(CONFIG_ARCH_MESON) += \
> meson-gxbb-nanopi-k2.dtb \
> diff --git a/arch/arm/dts/rk3399-rock960.dts b/arch/arm/dts/rk3399-rock960.dts
> new file mode 100644
> index 000..25c58b42611
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-rock960.dts
> @@ -0,0 +1,45 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2018 Manivannan Sadhasivam 
> 
> + */
> +
> +/dts-v1/;
> +#include "rk3399-rock960.dtsi"
> +#include "rk3399-sdram-lpddr3-2GB-1600.dtsi"
> +
> +/ {
> +   model = "96boards Rock960";
> +   compatible = "vamrs,rock960", "rockchip,rk3399";
> +
> +   chosen {
> +   stdout-path = "serial2:150n8";
> +   };
> +};
> +
> + {
> +   ep-gpios = < RK_PA2 GPIO_ACTIVE_HIGH>;
> +};
> +
> + {
> +   pcie {
> +   pcie_drv: pcie-drv {
> +   rockchip,pins =
> +   <2 RK_PA5 RK_FUNC_GPIO _pull_none>;
> +   };
> +   };
> +
> +   usb2 {
> +   host_vbus_drv: host-vbus-drv {
> +   rockchip,pins =
> +   <4 RK_PD1 RK_FUNC_GPIO _pull_none>;
> +   };
> +   };
> +};
> +
> +_pcie {
> +   gpio = < 5 GPIO_ACTIVE_HIGH>;
> +};
> +
> +_host {
> +   gpio = < 25 GPIO_ACTIVE_HIGH>;
> +};
> diff --git a/arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi 
> b/arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi
> new file mode 100644
> index 000..d14e833d228
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi
> @@ -0,0 +1,1536 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2016 Rockchip Electronics Co., Ltd
> + * (C) Copyright 2018 Manivannan Sadhasivam 
> 
> + */
> +
> + {
> +   rockchip,sdram-params = <
> +   0x1
> +   0xa
> +   0x3
> +   0x2
> +   0x2
> +   0x0
> +   0xf
> +   0xf
> +   1
> +   0x1d191519
> +   0x14040808
> +   0x0002
> +   0x6226
> +   0x0054
> +   0x
> +   0x1
> +   0xa
> +   0x3
> +   0x2
> +   0x2
> +   0x0
> +   0xf
> +   0xf
> +   1
> +   0x1d191519
> +   0x14040808
> +   0x0002
> +   0x6226
> +   0x0054
> +   0x
> +   800
> +   6
> +   2
> +   9
> +   1
> +   0x0700
> +   0x
> +   0x
> +   0x
> +   0x
> +   0x0050
> +   0x00027100
> +   0x0320
> +   0x1f40
> +   0x0050
> +   0x00027100
> +   0x0320
> +   0x1f40
> +   0x0050
> +   0x00027100
> +   0x0320
> +   0x01001f40
> +   0x
> +   0x0101
> +   0x00020100
> +   0x00a0
> +   0x0190
> +   0x
> +   0x0618
> +   0x00061800
> +   0x04000618
> +   0x33080004
> +   0x280f0622
> +   0x22330800
> +   0x00280f06
> +   

Re: [U-Boot] [PATCH v3 1/4] arm: dts: rockchip: add some common pin-settings to rk3399

2018-10-03 Thread Peter Robinson
On Thu, Sep 27, 2018 at 8:03 PM Manivannan Sadhasivam
 wrote:
>
> From: Randy Li 
>
> Those pins would be used by many boards.
>
> Commit grabbed from Linux:
>
> commit b41023282d07b61a53e2c9b9508912b1e7ce7b4f
> Author: Randy Li 
> Date:   Thu Jun 21 21:32:10 2018 +0800
>
> arm64: dts: rockchip: add some common pin-settings to rk3399
>
> Those pins would be used by many boards.
>
> Signed-off-by: Randy Li 
> Signed-off-by: Heiko Stuebner 
>
> Acked-by: Philipp Tomsich 
> Signed-off-by: Randy Li 
> Signed-off-by: Heiko Stuebner 
> Signed-off-by: Ezequiel Garcia 
Tested-by: Peter Robinson 

Tested on both a Rock960 and a Firefly3399

> ---
>
> Changes in v3: None
>
> Changes in v2: None
>
>  arch/arm/dts/rk3399.dtsi | 55 +++-
>  1 file changed, 49 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
> index 83c257b1228..8349451b03d 100644
> --- a/arch/arm/dts/rk3399.dtsi
> +++ b/arch/arm/dts/rk3399.dtsi
> @@ -1602,19 +1602,49 @@
> drive-strength = <12>;
> };
>
> +   pcfg_pull_none_13ma: pcfg-pull-none-13ma {
> +   bias-disable;
> +   drive-strength = <13>;
> +   };
> +
> +   pcfg_pull_none_18ma: pcfg-pull-none-18ma {
> +   bias-disable;
> +   drive-strength = <18>;
> +   };
> +
> +   pcfg_pull_none_20ma: pcfg-pull-none-20ma {
> +   bias-disable;
> +   drive-strength = <20>;
> +   };
> +
> +   pcfg_pull_up_2ma: pcfg-pull-up-2ma {
> +   bias-pull-up;
> +   drive-strength = <2>;
> +   };
> +
> pcfg_pull_up_8ma: pcfg-pull-up-8ma {
> bias-pull-up;
> drive-strength = <8>;
> };
>
> +   pcfg_pull_up_18ma: pcfg-pull-up-18ma {
> +   bias-pull-up;
> +   drive-strength = <18>;
> +   };
> +
> +   pcfg_pull_up_20ma: pcfg-pull-up-20ma {
> +   bias-pull-up;
> +   drive-strength = <20>;
> +   };
> +
> pcfg_pull_down_4ma: pcfg-pull-down-4ma {
> bias-pull-down;
> drive-strength = <4>;
> };
>
> -   pcfg_pull_up_2ma: pcfg-pull-up-2ma {
> -   bias-pull-up;
> -   drive-strength = <2>;
> +   pcfg_pull_down_8ma: pcfg-pull-down-8ma {
> +   bias-pull-down;
> +   drive-strength = <8>;
> };
>
> pcfg_pull_down_12ma: pcfg-pull-down-12ma {
> @@ -1622,9 +1652,22 @@
> drive-strength = <12>;
> };
>
> -   pcfg_pull_none_13ma: pcfg-pull-none-13ma {
> -   bias-disable;
> -   drive-strength = <13>;
> +   pcfg_pull_down_18ma: pcfg-pull-down-18ma {
> +   bias-pull-down;
> +   drive-strength = <18>;
> +   };
> +
> +   pcfg_pull_down_20ma: pcfg-pull-down-20ma {
> +   bias-pull-down;
> +   drive-strength = <20>;
> +   };
> +
> +   pcfg_output_high: pcfg-output-high {
> +   output-high;
> +   };
> +
> +   pcfg_output_low: pcfg-output-low {
> +   output-low;
> };
>
> clock {
> --
> 2.17.1
>
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Re: [U-Boot] [PATCH v3 2/4] rockchip: rk3399: Add common Rock960 family from Vamrs

2018-10-03 Thread Peter Robinson
On Thu, Sep 27, 2018 at 8:03 PM Manivannan Sadhasivam
 wrote:
>
> Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs.
> It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition)
> 96Boards.
>
> Below are some of the key differences between both Rock960 and Ficus
> boards:
>
> 1. Different host enable GPIO for USB
> 2. Different power and reset GPIO for PCI-E
> 3. No Ethernet port on Rock960
>
> The common board support will be utilized by both boards. The device
> tree has been organized in such a way that only the properties which
> differ between both boards are placed in the board specific dts and
> the reset of the nodes are placed in common dtsi file.
>
> Signed-off-by: Manivannan Sadhasivam 
> [Added instructions for SD card boot]
> Signed-off-by: Ezequiel Garcia 
Tested-by: Peter Robinson 

Tested on a Rock960.

> ---
>
> Changes in v3: Added instruction for copying prebuilt bl31.elf for SPL
>
> Changes in v2: None
>
>  arch/arm/dts/rk3399-rock960.dtsi| 506 
>  arch/arm/mach-rockchip/rk3399/Kconfig   |  26 +
>  board/vamrs/rock960_rk3399/Kconfig  |  15 +
>  board/vamrs/rock960_rk3399/MAINTAINERS  |   6 +
>  board/vamrs/rock960_rk3399/Makefile |   6 +
>  board/vamrs/rock960_rk3399/README   | 152 ++
>  board/vamrs/rock960_rk3399/rock960-rk3399.c |  50 ++
>  include/configs/rock960_rk3399.h|  15 +
>  8 files changed, 776 insertions(+)
>  create mode 100644 arch/arm/dts/rk3399-rock960.dtsi
>  create mode 100644 board/vamrs/rock960_rk3399/Kconfig
>  create mode 100644 board/vamrs/rock960_rk3399/MAINTAINERS
>  create mode 100644 board/vamrs/rock960_rk3399/Makefile
>  create mode 100644 board/vamrs/rock960_rk3399/README
>  create mode 100644 board/vamrs/rock960_rk3399/rock960-rk3399.c
>  create mode 100644 include/configs/rock960_rk3399.h
>
> diff --git a/arch/arm/dts/rk3399-rock960.dtsi 
> b/arch/arm/dts/rk3399-rock960.dtsi
> new file mode 100644
> index 000..51644d6d02d
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-rock960.dtsi
> @@ -0,0 +1,506 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2018 Linaro Ltd.
> + */
> +
> +#include 
> +#include 
> +#include "rk3399.dtsi"
> +
> +/ {
> +   vcc1v8_s0: vcc1v8-s0 {
> +   compatible = "regulator-fixed";
> +   regulator-name = "vcc1v8_s0";
> +   regulator-min-microvolt = <180>;
> +   regulator-max-microvolt = <180>;
> +   regulator-always-on;
> +   };
> +
> +   vcc_sys: vcc-sys {
> +   compatible = "regulator-fixed";
> +   regulator-name = "vcc_sys";
> +   regulator-min-microvolt = <500>;
> +   regulator-max-microvolt = <500>;
> +   regulator-always-on;
> +   };
> +
> +   vcc3v3_sys: vcc3v3-sys {
> +   compatible = "regulator-fixed";
> +   regulator-name = "vcc3v3_sys";
> +   regulator-min-microvolt = <330>;
> +   regulator-max-microvolt = <330>;
> +   regulator-always-on;
> +   vin-supply = <_sys>;
> +   };
> +
> +   vcc3v3_pcie: vcc3v3-pcie-regulator {
> +   compatible = "regulator-fixed";
> +   enable-active-high;
> +   pinctrl-names = "default";
> +   pinctrl-0 = <_drv>;
> +   regulator-boot-on;
> +   regulator-name = "vcc3v3_pcie";
> +   regulator-min-microvolt = <330>;
> +   regulator-max-microvolt = <330>;
> +   vin-supply = <_sys>;
> +   };
> +
> +   vcc5v0_host: vcc5v0-host-regulator {
> +   compatible = "regulator-fixed";
> +   enable-active-high;
> +   pinctrl-names = "default";
> +   pinctrl-0 = <_vbus_drv>;
> +   regulator-name = "vcc5v0_host";
> +   regulator-min-microvolt = <500>;
> +   regulator-max-microvolt = <500>;
> +   regulator-always-on;
> +   vin-supply = <_sys>;
> +   };
> +
> +   vdd_log: vdd-log {
> +   compatible = "pwm-regulator";
> +   pwms = < 0 25000 0>;
> +   regulator-name = "vdd_log";
> +   regulator-min-microvolt = <80>;
> +   regulator-max-microvolt = <140>;
> +   regulator-always-on;
> +   regulator-boot-on;
> +   vin-supply = <_sys>;
> +   };
> +
> +};
> +
> +_l0 {
> +   cpu-supply = <_cpu_l>;
> +};
> +
> +_l1 {
> +   cpu-supply = <_cpu_l>;
> +};
> +
> +_l2 {
> +   cpu-supply = <_cpu_l>;
> +};
> +
> +_l3 {
> +   cpu-supply = <_cpu_l>;
> +};
> +
> +_b0 {
> +   cpu-supply = <_cpu_b>;
> +};
> +
> +_b1 {
> +   cpu-supply = <_cpu_b>;
> +};
> +
> +_phy {
> +   status = "okay";
> +};
> +
> + {
> +   status = "okay";
> +};
> +
> + {
> +   clock-frequency = <40>;
> 

Re: [U-Boot] [PATCH RESEND 1/2] rockchip: make_fit_atf: use elf entry point

2018-10-03 Thread Peter Robinson
Philipp,

Can we get get a decision on this one, it fixes issues for me on
Rockchips devices. While I'm sure a rewrite in C to reduce
dependenciees is an option, this fix doesn't add any extra
dependencies and I think is still a candidate for 2018.11

Peter
On Fri, Jun 8, 2018 at 11:34 AM Mian Yousaf Kaukab
 wrote:
>
> make_fit_atf.py uses physical address of first segment as the
> entry point to bl31. It is incorrect and causes following abort
> when bl31_entry() is called:
>
> U-Boot SPL board initTrying to boot from MMC1
> "Synchronous Abort" handler, esr 0x0200
> elr:  lr : ff8c7e8c
> x 0: ff8e x 1: 
> x 2:  x 3: ff8e0180
> x 4:  x 5: 
> x 6: 0030 x 7: ff8e0188
> x 8: 01e0 x 9: 
> x10: 0007fcdc x11: 002881b8
> x12: 01a2 x13: 0198
> x14: 0007fdcc x15: 002881b8
> x16: 003c0724 x17: 003c0718
> x18: 0007fe80 x19: ff8e
> x20: 0020 x21: ff8e
> x22:  x23: 0007fe30
> x24: ff8d1c3c x25: ff8d5000
> x26: deadbeef x27: 04a0
> x28: 009c x29: 0007fd90
>
> Fix it by using the entry point from the elf header.
>
> Signed-off-by: Mian Yousaf Kaukab 
> ---
>  arch/arm/mach-rockchip/make_fit_atf.py | 7 ---
>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-rockchip/make_fit_atf.py 
> b/arch/arm/mach-rockchip/make_fit_atf.py
> index 6b3d9201c9..b88a5e1f16 100755
> --- a/arch/arm/mach-rockchip/make_fit_atf.py
> +++ b/arch/arm/mach-rockchip/make_fit_atf.py
> @@ -53,7 +53,7 @@ DT_END="""
>  };
>  """
>
> -def append_atf_node(file, atf_index, phy_addr):
> +def append_atf_node(file, atf_index, phy_addr, elf_entry):
>  """
>  Append ATF DT node to input FIT dts file.
>  """
> @@ -67,7 +67,7 @@ def append_atf_node(file, atf_index, phy_addr):
>  print >> file, '\t\t\tcompression = "none";'
>  print >> file, '\t\t\tload = <0x%08x>;' % phy_addr
>  if atf_index == 1:
> -print >> file, '\t\t\tentry = <0x%08x>;' % phy_addr
> +print >> file, '\t\t\tentry = <0x%08x>;' % elf_entry
>  print >> file, '\t\t};'
>  print >> file, ''
>
> @@ -141,12 +141,13 @@ def generate_atf_fit_dts(fit_file_name, bl31_file_name, 
> uboot_file_name, dtbs_fi
>
>  with open(bl31_file_name) as bl31_file:
>  bl31 = ELFFile(bl31_file)
> +elf_entry = bl31.header['e_entry']
>  for i in range(bl31.num_segments()):
>  seg = bl31.get_segment(i)
>  if ('PT_LOAD' == seg.__getitem__(ELF_SEG_P_TYPE)):
>  paddr = seg.__getitem__(ELF_SEG_P_PADDR)
>  p= seg.__getitem__(ELF_SEG_P_PADDR)
> -append_atf_node(fit_file, i+1, paddr)
> +append_atf_node(fit_file, i+1, paddr, elf_entry)
>  atf_cnt = i+1
>  append_fdt_node(fit_file, dtbs_file_name)
>  print >> fit_file, '%s' % DT_IMAGES_NODE_END
> --
> 2.11.0
>
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Re: [U-Boot] [RESENT PATCH] rockchip: make_fit_atf: fix warning unit_address_vs_reg

2018-10-03 Thread Philipp Tomsich


> On 23.08.2018, at 05:01, Kever Yang  wrote:
> 
> Patch fix warning:
> /builddir/BUILD/u-boot-2018.05-rc2/"arch/arm/mach-rockchip/make_fit_atf.py" \
> arch/arm/dts/rk3399-firefly.dtb > u-boot.its
>  ./tools/mkimage  -f u-boot.its -E u-boot.itb >/dev/null  && cat
> /dev/null
> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/uboot@1
> has a unit name, but no reg property
> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@1 has
> a unit name, but no reg property
> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@2 has
> a unit name, but no reg property
> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@3 has
> a unit name, but no reg property
> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/fdt@1 has
> a unit name, but no reg property
> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node
> /configurations/config@1 has a unit name, but no reg property
> make[1]: Leaving directory
> '/builddir/BUILD/u-boot-2018.05-rc2/builds/firefly-rk3399'
> 
> Reported-by: Peter Robinson 
> Signed-off-by: Kever Yang 

Reviewed-by: Philipp Tomsich 
Acked-by: Philipp Tomsich 

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Re: [U-Boot] [RESENT PATCH] rockchip: make_fit_atf: fix warning unit_address_vs_reg

2018-10-03 Thread Philipp Tomsich
Sure. This one fell through the cracks. No idea why I didn’t see it.

> On 03.10.2018, at 20:55, Peter Robinson  wrote:
> 
> Philipp,
> 
> Can we get this one applied to Rockchips too please?
> 
> Peter
> 
> On Thu, Aug 23, 2018 at 4:01 AM Kever Yang  wrote:
>> 
>> Patch fix warning:
>> /builddir/BUILD/u-boot-2018.05-rc2/"arch/arm/mach-rockchip/make_fit_atf.py" \
>> arch/arm/dts/rk3399-firefly.dtb > u-boot.its
>>  ./tools/mkimage  -f u-boot.its -E u-boot.itb >/dev/null  && cat
>> /dev/null
>> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/uboot@1
>> has a unit name, but no reg property
>> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@1 has
>> a unit name, but no reg property
>> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@2 has
>> a unit name, but no reg property
>> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@3 has
>> a unit name, but no reg property
>> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/fdt@1 has
>> a unit name, but no reg property
>> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node
>> /configurations/config@1 has a unit name, but no reg property
>> make[1]: Leaving directory
>> '/builddir/BUILD/u-boot-2018.05-rc2/builds/firefly-rk3399'
>> 
>> Reported-by: Peter Robinson 
>> Signed-off-by: Kever Yang 
>> ---
>> 
>> arch/arm/mach-rockchip/make_fit_atf.py | 18 +-
>> 1 file changed, 9 insertions(+), 9 deletions(-)
>> 
>> diff --git a/arch/arm/mach-rockchip/make_fit_atf.py 
>> b/arch/arm/mach-rockchip/make_fit_atf.py
>> index 6b3d9201c9..62b9caee34 100755
>> --- a/arch/arm/mach-rockchip/make_fit_atf.py
>> +++ b/arch/arm/mach-rockchip/make_fit_atf.py
>> @@ -34,7 +34,7 @@ DT_HEADER="""// SPDX-License-Identifier: GPL-2.0+ OR X11
>>#address-cells = <1>;
>> 
>>images {
>> -   uboot@1 {
>> +   uboot {
>>description = "U-Boot (64-bit)";
>>data = /incbin/("u-boot-nodtb.bin");
>>type = "standalone";
>> @@ -58,7 +58,7 @@ def append_atf_node(file, atf_index, phy_addr):
>> Append ATF DT node to input FIT dts file.
>> """
>> data = 'bl31_0x%08x.bin' % phy_addr
>> -print >> file, '\t\tatf@%d {' % atf_index
>> +print >> file, '\t\tatf_%d {' % atf_index
>> print >> file, '\t\t\tdescription = \"ARM Trusted Firmware\";'
>> print >> file, '\t\t\tdata = /incbin/("%s");' % data
>> print >> file, '\t\t\ttype = "firmware";'
>> @@ -78,7 +78,7 @@ def append_fdt_node(file, dtbs):
>> cnt = 1
>> for dtb in dtbs:
>> dtname = os.path.basename(dtb)
>> -print >> file, '\t\tfdt@%d {' % cnt
>> +print >> file, '\t\tfdt_%d {' % cnt
>> print >> file, '\t\t\tdescription = "%s";' % dtname
>> print >> file, '\t\t\tdata = /incbin/("%s");' % dtb
>> print >> file, '\t\t\ttype = "flat_dt";'
>> @@ -88,17 +88,17 @@ def append_fdt_node(file, dtbs):
>> cnt = cnt + 1
>> 
>> def append_conf_section(file, cnt, dtname, atf_cnt):
>> -print >> file, '\t\tconfig@%d {' % cnt
>> +print >> file, '\t\tconfig_%d {' % cnt
>> print >> file, '\t\t\tdescription = "%s";' % dtname
>> -print >> file, '\t\t\tfirmware = "atf@1";'
>> -print >> file, '\t\t\tloadables = "uboot@1",',
>> +print >> file, '\t\t\tfirmware = "atf_1";'
>> +print >> file, '\t\t\tloadables = "uboot",',
>> for i in range(1, atf_cnt):
>> -print >> file, '"atf@%d"' % (i+1),
>> +print >> file, '"atf_%d"' % (i+1),
>> if i != (atf_cnt - 1):
>> print >> file, ',',
>> else:
>> print >> file, ';'
>> -print >> file, '\t\t\tfdt = "fdt@1";'
>> +print >> file, '\t\t\tfdt = "fdt_1";'
>> print >> file, '\t\t};'
>> print >> file, ''
>> 
>> @@ -108,7 +108,7 @@ def append_conf_node(file, dtbs, atf_cnt):
>> """
>> cnt = 1
>> print >> file, '\tconfigurations {'
>> -print >> file, '\t\tdefault = "config@1";'
>> +print >> file, '\t\tdefault = "config_1";'
>> for dtb in dtbs:
>> dtname = os.path.basename(dtb)
>> append_conf_section(file, cnt, dtname, atf_cnt)
>> --
>> 2.18.0
>> 
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Re: [U-Boot] [RESENT PATCH] rockchip: make_fit_atf: fix warning unit_address_vs_reg

2018-10-03 Thread Peter Robinson
Philipp,

Can we get this one applied to Rockchips too please?

Peter

On Thu, Aug 23, 2018 at 4:01 AM Kever Yang  wrote:
>
> Patch fix warning:
> /builddir/BUILD/u-boot-2018.05-rc2/"arch/arm/mach-rockchip/make_fit_atf.py" \
> arch/arm/dts/rk3399-firefly.dtb > u-boot.its
>   ./tools/mkimage  -f u-boot.its -E u-boot.itb >/dev/null  && cat
> /dev/null
> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/uboot@1
> has a unit name, but no reg property
> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@1 has
> a unit name, but no reg property
> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@2 has
> a unit name, but no reg property
> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@3 has
> a unit name, but no reg property
> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/fdt@1 has
> a unit name, but no reg property
> u-boot.itb.tmp: Warning (unit_address_vs_reg): Node
> /configurations/config@1 has a unit name, but no reg property
> make[1]: Leaving directory
> '/builddir/BUILD/u-boot-2018.05-rc2/builds/firefly-rk3399'
>
> Reported-by: Peter Robinson 
> Signed-off-by: Kever Yang 
> ---
>
>  arch/arm/mach-rockchip/make_fit_atf.py | 18 +-
>  1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm/mach-rockchip/make_fit_atf.py 
> b/arch/arm/mach-rockchip/make_fit_atf.py
> index 6b3d9201c9..62b9caee34 100755
> --- a/arch/arm/mach-rockchip/make_fit_atf.py
> +++ b/arch/arm/mach-rockchip/make_fit_atf.py
> @@ -34,7 +34,7 @@ DT_HEADER="""// SPDX-License-Identifier: GPL-2.0+ OR X11
> #address-cells = <1>;
>
> images {
> -   uboot@1 {
> +   uboot {
> description = "U-Boot (64-bit)";
> data = /incbin/("u-boot-nodtb.bin");
> type = "standalone";
> @@ -58,7 +58,7 @@ def append_atf_node(file, atf_index, phy_addr):
>  Append ATF DT node to input FIT dts file.
>  """
>  data = 'bl31_0x%08x.bin' % phy_addr
> -print >> file, '\t\tatf@%d {' % atf_index
> +print >> file, '\t\tatf_%d {' % atf_index
>  print >> file, '\t\t\tdescription = \"ARM Trusted Firmware\";'
>  print >> file, '\t\t\tdata = /incbin/("%s");' % data
>  print >> file, '\t\t\ttype = "firmware";'
> @@ -78,7 +78,7 @@ def append_fdt_node(file, dtbs):
>  cnt = 1
>  for dtb in dtbs:
>  dtname = os.path.basename(dtb)
> -print >> file, '\t\tfdt@%d {' % cnt
> +print >> file, '\t\tfdt_%d {' % cnt
>  print >> file, '\t\t\tdescription = "%s";' % dtname
>  print >> file, '\t\t\tdata = /incbin/("%s");' % dtb
>  print >> file, '\t\t\ttype = "flat_dt";'
> @@ -88,17 +88,17 @@ def append_fdt_node(file, dtbs):
>  cnt = cnt + 1
>
>  def append_conf_section(file, cnt, dtname, atf_cnt):
> -print >> file, '\t\tconfig@%d {' % cnt
> +print >> file, '\t\tconfig_%d {' % cnt
>  print >> file, '\t\t\tdescription = "%s";' % dtname
> -print >> file, '\t\t\tfirmware = "atf@1";'
> -print >> file, '\t\t\tloadables = "uboot@1",',
> +print >> file, '\t\t\tfirmware = "atf_1";'
> +print >> file, '\t\t\tloadables = "uboot",',
>  for i in range(1, atf_cnt):
> -print >> file, '"atf@%d"' % (i+1),
> +print >> file, '"atf_%d"' % (i+1),
>  if i != (atf_cnt - 1):
>  print >> file, ',',
>  else:
>  print >> file, ';'
> -print >> file, '\t\t\tfdt = "fdt@1";'
> +print >> file, '\t\t\tfdt = "fdt_1";'
>  print >> file, '\t\t};'
>  print >> file, ''
>
> @@ -108,7 +108,7 @@ def append_conf_node(file, dtbs, atf_cnt):
>  """
>  cnt = 1
>  print >> file, '\tconfigurations {'
> -print >> file, '\t\tdefault = "config@1";'
> +print >> file, '\t\tdefault = "config_1";'
>  for dtb in dtbs:
>  dtname = os.path.basename(dtb)
>  append_conf_section(file, cnt, dtname, atf_cnt)
> --
> 2.18.0
>
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[U-Boot] [PATCH 1/1 for v2018.11-rc2] efi_loader: efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, ...)

2018-10-03 Thread Heinrich Schuchardt
The first parameter of efi_allocate_pool is a memory type. It cannot be
EFI_ALLOCATE_ANY_PAGES. Use EFI_BOOT_SERVICES_DATA instead.

Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/efi_boottime.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index 97eb19cd14..fddfeb1a1a 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -2023,7 +2023,7 @@ static efi_status_t EFIAPI efi_open_protocol_information(
 
/* Copy entries */
buffer_size = count * sizeof(struct efi_open_protocol_info_entry);
-   r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, buffer_size,
+   r = efi_allocate_pool(EFI_BOOT_SERVICES_DATA, buffer_size,
  (void **)entry_buffer);
if (r != EFI_SUCCESS)
goto out;
@@ -2080,7 +2080,7 @@ static efi_status_t EFIAPI efi_protocols_per_handle(
size_t j = 0;
 
buffer_size = sizeof(efi_guid_t *) * *protocol_buffer_count;
-   r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, buffer_size,
+   r = efi_allocate_pool(EFI_BOOT_SERVICES_DATA, buffer_size,
  (void **)protocol_buffer);
if (r != EFI_SUCCESS)
return EFI_EXIT(r);
@@ -2133,7 +2133,7 @@ static efi_status_t EFIAPI efi_locate_handle_buffer(
  *buffer);
if (r != EFI_BUFFER_TOO_SMALL)
goto out;
-   r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, buffer_size,
+   r = efi_allocate_pool(EFI_BOOT_SERVICES_DATA, buffer_size,
  (void **)buffer);
if (r != EFI_SUCCESS)
goto out;
-- 
2.19.0

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Re: [U-Boot] [PATCH v3 00/17] riscv: Add QEMU virt board support

2018-10-03 Thread Auer, Lukas
Hi Bin,

On Wed, 2018-09-26 at 06:55 -0700, Bin Meng wrote:
> This series adds QEMU RISC-V 'virt' board target support, with the
> hope of helping people easily test U-Boot on RISC-V.
> 
> Some existing RISC-V codes have been changed to make it easily to
> support new targets. Some spotted coding style issues are fixed.
> 
> This series is available at u-boot-x86/riscv-working for testing.
> 
> Changes in v3:
> - net patch to print the relocation address in cmd 'bdinfo'
> - new patch to imply DM support for some common drivers
> - reword the reset message a little, and call hang() in the end
> 
> Changes in v2:
> - Change Linux kernel entry parameters' type to support 32/64 bit
> - new patch to remove CSR read/write defines in encoding.h
> - new patch to pass mhartid CSR value to kernel
> - new patch to move do_reset() to a common place
> 

One more thing, I wanted to let you know about. I am already able to
boot Linux in QEMU with this patch series, and u-boot master now. I had
to make minor changes to the board config / environment to enable FIT
images, though jumping directly to bbl + Linux with 'go' should work as
well.
I did modify QEMU slightly so that it also loads binaries instead of
just ELF files. I am planning to start sending my patches to u-boot and
QEMU next week.

Thanks,
Lukas
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Re: [U-Boot] [PATCH 29/53] armv8: layerscape: add SMC calls for DDR size and bank info.

2018-10-03 Thread York Sun
On 10/03/2018 04:39 AM, Rajesh Bhagat wrote:
> From: Pankit Garg 
> 
> Adds SMC calls for getting DDR size and bank info for TFABOOT.

This patch should be put before enabling TFA boot flow.

I am going to stop here. Please fix and reorganize your patch set. Make
sure U-Boot still works after every single patch.

York
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Re: [U-Boot] [PATCH 26/53] armv8: layerscape: remove EL3 specific erratas for TFABOOT

2018-10-03 Thread York Sun
On 10/03/2018 04:39 AM, Rajesh Bhagat wrote:
> Removes EL3 specific erratas for TFABOOT, And now taken care in TFA.
> 
> ARM_ERRATA_855873, SYS_FSL_ERRATUM_A008850, SYS_FSL_ERRATUM_A008511,
> SYS_FSL_ERRATUM_A008336, SYS_FSL_ERRATUM_A009663, SYS_FSL_ERRATUM_A009803
> SYS_FSL_ERRATUM_A009942, SYS_FSL_ERRATUM_A010165
> 
> Signed-off-by: Rajesh Bhagat 
> ---
>  arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 24 +++
>  1 file changed, 12 insertions(+), 12 deletions(-)

This patch should be put before any patch enabling TFABOOT.

York
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Re: [U-Boot] [PATCH 20/53] armv8: ls1046a: define BOOTCOMMAND for TFABOOT

2018-10-03 Thread York Sun
On 10/03/2018 04:39 AM, Rajesh Bhagat wrote:
> Defines BOOTCOMMAND for TFABOOT configuration for
> supported boot sources.

Please keep the commit message format consistent, to wrap back at or
near 70th characters through the entire patch set.

> 
> Signed-off-by: Pankit Garg 
> Signed-off-by: Rajesh Bhagat 
> ---
>  include/configs/ls1046aqds.h | 9 +
>  include/configs/ls1046ardb.h | 7 +++
>  2 files changed, 16 insertions(+)
> 
> diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
> index 765a21e00f..2a30cef0e4 100644
> --- a/include/configs/ls1046aqds.h
> +++ b/include/configs/ls1046aqds.h
> @@ -432,6 +432,14 @@ unsigned long get_board_ddr_clk(void);
>  #define CONFIG_CMDLINE_TAG
>  
>  #undef CONFIG_BOOTCOMMAND
> +#ifdef CONFIG_TFABOOT
> +#define QSPI_NOR_BOOTCOMMAND "sf probe && sf read $kernel_load "\
> + "e f0 && bootm $kernel_load"
> +#define IFC_NOR_BOOTCOMMAND  "cp.b $kernel_start $kernel_load " \
> + "$kernel_size && bootm $kernel_load"
> +#define SD_BOOTCOMMAND   "mmc info; mmc read $kernel_load" \
> + "$kernel_addr_sd $kernel_size_sd && 
> bootm $kernel_load"
> +#else
>  #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
>  #define CONFIG_BOOTCOMMAND   "sf probe && sf read $kernel_load "\
>   "e f0 && bootm $kernel_load"
> @@ -439,6 +447,7 @@ unsigned long get_board_ddr_clk(void);
>  #define CONFIG_BOOTCOMMAND   "cp.b $kernel_start $kernel_load " \
>   "$kernel_size && bootm $kernel_load"
>  #endif
> +#endif
>  
>  #include 
>  
> diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
> index b8d9419b48..cc1f5f5f55 100644
> --- a/include/configs/ls1046ardb.h
> +++ b/include/configs/ls1046ardb.h
> @@ -216,6 +216,12 @@
>  
>  #ifndef SPL_NO_MISC
>  #undef CONFIG_BOOTCOMMAND
> +#ifdef CONFIG_TFABOOT
> +#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "
> \
> +"env exists secureboot && esbc_halt;;"
> +#define SD_BOOTCOMMAND "run distro_bootcmd;run sd_bootcmd; " \
> +"env exists secureboot && esbc_halt;"
> +#else
>  #if defined(CONFIG_QSPI_BOOT)
>  #define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "  \
>  "env exists secureboot && esbc_halt;;"
> @@ -224,6 +230,7 @@
>  "env exists secureboot && esbc_halt;"
>  #endif
>  #endif
> +#endif
>  
>  #include 
>  
> 

Shouldn't this patch be put before patch #19? Did you compile each patch
incrementally?

York
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Re: [U-Boot] [PATCH 19/53] armv8: fsl-layerscape: bootcmd identification for TFABOOT.

2018-10-03 Thread York Sun
First, remove the period in subject.

On 10/03/2018 04:39 AM, Rajesh Bhagat wrote:
> From: Pankit Garg 
> 
> Adds bootcmd identificaton on basis on boot source, valid
> in TFABOOT configuration.
> 
> Signed-off-by: Rajesh Bhagat 
> Signed-off-by: Pankit Garg 
> ---
>  arch/arm/cpu/armv8/fsl-layerscape/soc.c | 69 +
>  1 file changed, 69 insertions(+)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
> b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index 3f15cb08ff..1e701c58df 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -679,12 +679,81 @@ int qspi_ahb_init(void)
>  }
>  #endif
>  
> +#ifdef CONFIG_TFABOOT
> +#define MAX_BOOTCMD_SIZE 256
> +
> +int fsl_setenv_bootcmd(void)
> +{
> + int ret;
> + enum boot_src src = get_boot_src();
> + char bootcmd_str[MAX_BOOTCMD_SIZE];
> +
> + switch (src) {
> +#ifdef IFC_NOR_BOOTCOMMAND
> + case BOOT_SOURCE_IFC_NOR:
> + sprintf(bootcmd_str, IFC_NOR_BOOTCOMMAND);
> + break;
> +#endif
> +#ifdef QSPI_NOR_BOOTCOMMAND
> + case BOOT_SOURCE_QSPI_NOR:
> + sprintf(bootcmd_str, QSPI_NOR_BOOTCOMMAND);
> + break;
> +#endif
> +#ifdef XSPI_NOR_BOOTCOMMAND
> + case BOOT_SOURCE_XSPI_NOR:
> + sprintf(bootcmd_str, XSPI_NOR_BOOTCOMMAND);
> + break;
> +#endif
> +#ifdef IFC_NAND_BOOTCOMMAND
> + case BOOT_SOURCE_IFC_NAND:
> + sprintf(bootcmd_str, IFC_NAND_BOOTCOMMAND);
> + break;
> +#endif
> +#ifdef QSPI_NAND_BOOTCOMMAND
> + case BOOT_SOURCE_QSPI_NAND:
> + sprintf(bootcmd_str, QSPI_NAND_BOOTCOMMAND);
> + break;
> +#endif
> +#ifdef XSPI_NAND_BOOTCOMMAND
> + case BOOT_SOURCE_XSPI_NAND:
> + sprintf(bootcmd_str, XSPI_NAND_BOOTCOMMAND);
> + break;
> +#endif
> +#ifdef SD_BOOTCOMMAND
> + case BOOT_SOURCE_SD_MMC:
> + sprintf(bootcmd_str, SD_BOOTCOMMAND);
> + break;
> +#endif
> +#ifdef SD2_BOOTCOMMAND
> + case BOOT_SOURCE_SD_MMC2:
> + sprintf(bootcmd_str, SD2_BOOTCOMMAND);
> + break;
> +#endif
> + default:
> +#ifdef QSPI_NOR_BOOTCOMMAND
> + sprintf(bootcmd_str, QSPI_NOR_BOOTCOMMAND);
> +#endif
> + break;
> + }
> +
> + ret = env_set("bootcmd", bootcmd_str);
> + if (ret) {
> + printf("Failed to set bootcmd: ret = %d\n", ret);
> + return ret;
> + }
> + return 0;
> +}
> +#endif
> +
>  #ifdef CONFIG_BOARD_LATE_INIT
>  int board_late_init(void)
>  {
>  #ifdef CONFIG_CHAIN_OF_TRUST
>   fsl_setenv_chain_of_trust();
>  #endif
> +#ifdef CONFIG_TFABOOT
> + fsl_setenv_bootcmd();
> +#endif
>  #ifdef CONFIG_QSPI_AHB_INIT
>   qspi_ahb_init();
>  #endif
> 

Shouldn't you check if such variable is valid? I think you should not
overwrite this variable if user has already set it.

York
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Re: [U-Boot] [PATCH 18/53] armv8: ls1043a: make FMAN and QE address common

2018-10-03 Thread York Sun
On 10/03/2018 04:39 AM, Rajesh Bhagat wrote:
> CONFIG_SYS_FMAN_FW_ADDR and CONFIG_SYS_QE_FW_ADDR made common
> to support all boot sources.
> 

The subject implies you change something to make the macros common, but
actually you only add common macros for TFABOOT.

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Re: [U-Boot] [PATCH 16/53] drivers: qe: add TFABOOT support

2018-10-03 Thread York Sun
On 10/03/2018 04:39 AM, Rajesh Bhagat wrote:
> Adds TFABOOT support and allows to pick QE firmware
> on basis of boot source.
> 
> Signed-off-by: Pankit Garg 
> Signed-off-by: Rajesh Bhagat 
> ---
>  drivers/qe/qe.c | 81 +
>  1 file changed, 81 insertions(+)
> 
> diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
> index 7654df8008..d7e3a1b923 100644
> --- a/drivers/qe/qe.c
> +++ b/drivers/qe/qe.c
> @@ -17,9 +17,17 @@
>  #include 
>  #endif
>  
> +#ifdef CONFIG_TFABOOT
> +#include 
> +/* required to include IFC and QSPI base address */
> +#include 
> +#include 
> +#include 
> +#else

You have many of this ifdef. Please fix all if you don't have to use ifdef.

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Re: [U-Boot] [PATCH 15/53] net: fm: add TFABOOT support

2018-10-03 Thread York Sun
On 10/03/2018 04:39 AM, Rajesh Bhagat wrote:
> Adds TFABOOT support and allows to pick FMAN firmware
> on basis of boot source.
> 
> Signed-off-by: Pankit Garg 
> Signed-off-by: Rajesh Bhagat 
> ---
>  drivers/net/fm/fm.c | 104 
>  1 file changed, 104 insertions(+)
> 
> diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c
> index 3327073bf1..427ea1a627 100644
> --- a/drivers/net/fm/fm.c
> +++ b/drivers/net/fm/fm.c
> @@ -11,6 +11,15 @@
>  #include "fm.h"
>  #include   /* For struct qe_firmware */
>  
> +#ifdef CONFIG_TFABOOT

Same here. Do not use ifdef if you don't have to.

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Re: [U-Boot] [PATCH 13/53] armv8: ls1043aqds: define environment address for QSPI boot

2018-10-03 Thread York Sun
On 10/03/2018 04:38 AM, Rajesh Bhagat wrote:
> Defines environment address for QSPI boot
> 
> Signed-off-by: Rajesh Bhagat 
> ---
>  board/freescale/ls1043aqds/ls1043aqds.c | 10 ++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/board/freescale/ls1043aqds/ls1043aqds.c 
> b/board/freescale/ls1043aqds/ls1043aqds.c
> index 5247d9ac14..1f317a4574 100644
> --- a/board/freescale/ls1043aqds/ls1043aqds.c
> +++ b/board/freescale/ls1043aqds/ls1043aqds.c
> @@ -13,6 +13,9 @@
>  #include 
>  #include 
>  #include 
> +#ifdef CONFIG_TFABOOT

Do you have to use ifdef here?

> +#include 
> +#endif

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Re: [U-Boot] [PATCH 10/53] armv8: ls1043ardb: Add TFABOOT defconfig

2018-10-03 Thread York Sun
On 10/03/2018 04:38 AM, Rajesh Bhagat wrote:
> This defconfig is for TFABOOT, to be loaded by trusted firmware.
> 
> Signed-off-by: Pankit Garg 
> Signed-off-by: Rajesh Bhagat 
> ---
>  board/freescale/ls1043ardb/ddr.c|  6 ++-
>  board/freescale/ls1043ardb/ls1043ardb.c | 12 ++
>  configs/ls1043ardb_ram_defconfig| 49 +

In this and other patches, you said "add TFABOOT defconfig", but you use
"ram_defconfig" in the file name. If this boot method is only for TFA
boot, maybe you should consider to rename the file. If the ram boot can
work without TFA, you need to rewrite your commit subject and message.

York
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Re: [U-Boot] [PATCH 09/53] armv8: ls1046a: make environment address and size common

2018-10-03 Thread York Sun
On 10/03/2018 04:38 AM, Rajesh Bhagat wrote:
> CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE and CONFIG_ENV_SECT_SIZE made common
> to support all boot sources.

It is not clear how you made these macros common in your change below.

> 
> Signed-off-by: Pankit Garg 
> Signed-off-by: Rajesh Bhagat 
> ---
>  include/configs/ls1046aqds.h | 9 +
>  include/configs/ls1046ardb.h | 8 
>  2 files changed, 17 insertions(+)
> 
> diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
> index 07e21469c8..765a21e00f 100644
> --- a/include/configs/ls1046aqds.h
> +++ b/include/configs/ls1046aqds.h
> @@ -403,6 +403,14 @@ unsigned long get_board_ddr_clk(void);
>   */
>  #define CONFIG_ENV_OVERWRITE
>  
> +#ifdef CONFIG_TFABOOT
> +#define CONFIG_SYS_MMC_ENV_DEV   0
> +
> +#define CONFIG_ENV_SIZE  0x2000
> +#define CONFIG_ENV_OFFSET0x50/* 5MB */
> +#define CONFIG_ENV_ADDR  (CONFIG_SYS_FLASH_BASE + 
> 0x50)
> +#define CONFIG_ENV_SECT_SIZE 0x2
> +#else
>  #ifdef CONFIG_NAND_BOOT
>  #define CONFIG_ENV_SIZE  0x2000
>  #define CONFIG_ENV_OFFSET(12 * CONFIG_SYS_NAND_BLOCK_SIZE)
> @@ -419,6 +427,7 @@ unsigned long get_board_ddr_clk(void);
>  #define CONFIG_ENV_SECT_SIZE 0x2
>  #define CONFIG_ENV_SIZE  0x2
>  #endif
> +#endif
>  
>  #define CONFIG_CMDLINE_TAG
>  
> diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
> index ffca410b1a..b8d9419b48 100644
> --- a/include/configs/ls1046ardb.h
> +++ b/include/configs/ls1046ardb.h
> @@ -160,6 +160,13 @@
>  #define CONFIG_ENV_OVERWRITE
>  #endif
>  
> +#ifdef CONFIG_TFABOOT
> +#define CONFIG_SYS_MMC_ENV_DEV   0
> +
> +#define CONFIG_ENV_SIZE  0x2000  /* 8KB */
> +#define CONFIG_ENV_OFFSET0x50/* 5MB */
> +#define CONFIG_ENV_SECT_SIZE 0x4 /* 256KB */
> +#else
>  #if defined(CONFIG_SD_BOOT)
>  #define CONFIG_SYS_MMC_ENV_DEV   0
>  #define CONFIG_ENV_OFFSET(3 * 1024 * 1024)
> @@ -169,6 +176,7 @@
>  #define CONFIG_ENV_OFFSET0x30/* 3MB */
>  #define CONFIG_ENV_SECT_SIZE 0x4 /* 256KB */
>  #endif
> +#endif
>  
>  #define AQR105_IRQ_MASK  0x8000
>  /* FMan */
> 

You didn't add to common file, or move them out. How do you make them
common?

York
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Re: [U-Boot] [PATCH 07/53] armv8: ls1046ardb: Add TFABOOT defconfig

2018-10-03 Thread York Sun
On 10/03/2018 04:38 AM, Rajesh Bhagat wrote:
> This defconfig is for TFABOOT, to be loaded by trusted firmware.
> 
> Signed-off-by: York Sun 
> Signed-off-by: Pankit Garg 
> Signed-off-by: Rajesh Bhagat 
> ---
>  arch/arm/cpu/armv8/fsl-layerscape/cpu.c |  9 +++--

These changes are better moved into patch #5.

>  board/freescale/ls1046ardb/ddr.c|  3 +-
>  configs/ls1046ardb_ram_defconfig| 49 +
>  include/configs/ls1046a_common.h|  4 ++
>  4 files changed, 61 insertions(+), 4 deletions(-)
>  create mode 100644 configs/ls1046ardb_ram_defconfig

York
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[U-Boot] [PULL] u-boot-rockchip patch queue 2018-10-03

2018-10-03 Thread Philipp Tomsich
Tom,

Here’s the u-boot-rockchip patch queue for v2018.11 with the respective
Travis-CI run at https://travis-ci.org/ptomsich/u-boot-rockchip/builds/436047523

Thanks,
Philipp.


The following changes since commit 2ba8bf207481cfb319f54a1bef67f6f068831a58:

  Prepare v2018.11-rc1 (2018-10-01 20:32:03 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-rockchip.git tags/rockchip-for-v2018.11

for you to fetch changes up to e4d5fa3db0b9ad6551752f90b153d64706bbddef:

  rockchip: rk3188: explicitly set vcc_sd0 pin to gpio on rk3188-radxarock 
(2018-10-02 09:35:39 +0200)


Rockchip changes for 2018.11


Heiko Stuebner (4):
  mmc: dw_mmc: check fifo status with a timeout in fifo mode
  rockchip: dwmmc: add rk2928-dw-mshc compatible
  rockchip: rk3188: add u-boot-specific mmc properties
  rockchip: rk3188: explicitly set vcc_sd0 pin to gpio on rk3188-radxarock

 arch/arm/dts/rk3188-radxarock-u-boot.dtsi | 15 +++
 arch/arm/dts/rk3188-radxarock.dts |  8 
 drivers/mmc/dw_mmc.c  | 32 ++--
 drivers/mmc/rockchip_dw_mmc.c |  1 +
 include/dwmmc.h   |  2 ++
 5 files changed, 56 insertions(+), 2 deletions(-)


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Re: [U-Boot] Please pull from u-boot-i2c

2018-10-03 Thread Tom Rini
On Wed, Oct 03, 2018 at 01:09:59PM +0200, Heiko Schocher wrote:

> Hello Tom,
> 
> please pull from u-boot-i2c.git master
> 
> The following changes since commit 592cd5defd4f71d34ffcbd8dd3326bc10f662e20:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-spi (2018-10-02 17:01:46 
> -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-i2c.git master
> 
> for you to fetch changes up to 86c83e8400fd3d7f5393e569b2b9e164204a88fe:
> 
>   i2c: Add support for the Arm's Versatile Express I2C controller. 
> (2018-10-03 06:08:06 +0200)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] Uboot send pull request

2018-10-03 Thread Tom Rini
On Wed, Oct 03, 2018 at 06:16:21PM +0800, ub...@andestech.com wrote:

>  Hi Tom,
> 
>  Please pull the following patch from u-boot-riscv into your tree.
>  Thanks!
> 
> The following changes since commit 592cd5defd4f71d34ffcbd8dd3326bc10f662e20:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-spi (2018-10-02 17:01:46 
> -0400)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-riscv.git
> 
> for you to fetch changes up to 5845f6612372a63877b2175e058a841e1237ffd6:
> 
>   riscv: allow native compilation (2018-10-03 17:49:44 +0800)
> 

Applied to u-boot/master, thanks!


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Re: [U-Boot] [PATCH 2/2] arm: K3: am654: Add support for getting boot mode

2018-10-03 Thread Lokesh Vutla



On Wednesday 03 October 2018 08:33 PM, Andrew F. Davis wrote:

Read the boot mode register to find the boot mode. Only use eMMC boot0
mode when the mode is eMMC boot (called BOOT_DEVICE_MMC1 currently due
to current conflating of boot mode and boot device), and not iff the
boot device is MMC port 0.

Signed-off-by: Andrew F. Davis 



Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh
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Re: [U-Boot] [PATCH 1/2] arm: K3: am654: Choose MMC boot device based on boot port

2018-10-03 Thread Lokesh Vutla



On Wednesday 03 October 2018 08:33 PM, Andrew F. Davis wrote:

For most devices the boot mode maps directly to the boot
device. For MMC this is not the case as we have two MMC
boot modes and two MMC boot devices (ports). Check the
boot port to determine which MMC device was our boot
device. Make this change for both primary and secondary
boot modes.

Signed-off-by: Andrew F. Davis 


Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh

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Re: [U-Boot] [PATCH 2/2] arm: K3: am654: Add support for getting boot mode

2018-10-03 Thread Tom Rini
On Wed, Oct 03, 2018 at 10:03:23AM -0500, Andrew F. Davis wrote:

> Read the boot mode register to find the boot mode. Only use eMMC boot0
> mode when the mode is eMMC boot (called BOOT_DEVICE_MMC1 currently due
> to current conflating of boot mode and boot device), and not iff the
> boot device is MMC port 0.
> 
> Signed-off-by: Andrew F. Davis 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH 1/2] arm: K3: am654: Choose MMC boot device based on boot port

2018-10-03 Thread Tom Rini
On Wed, Oct 03, 2018 at 10:03:22AM -0500, Andrew F. Davis wrote:

> For most devices the boot mode maps directly to the boot
> device. For MMC this is not the case as we have two MMC
> boot modes and two MMC boot devices (ports). Check the
> boot port to determine which MMC device was our boot
> device. Make this change for both primary and secondary
> boot modes.
> 
> Signed-off-by: Andrew F. Davis 

Reviewed-by: Tom Rini 

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[U-Boot] [PATCH 1/2] arm: K3: am654: Choose MMC boot device based on boot port

2018-10-03 Thread Andrew F. Davis
For most devices the boot mode maps directly to the boot
device. For MMC this is not the case as we have two MMC
boot modes and two MMC boot devices (ports). Check the
boot port to determine which MMC device was our boot
device. Make this change for both primary and secondary
boot modes.

Signed-off-by: Andrew F. Davis 
---
 arch/arm/mach-k3/am6_init.c  | 21 +++-
 arch/arm/mach-k3/include/mach/am6_hardware.h |  6 ++
 2 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c
index 8a3a99f23a..b2388b98ec 100644
--- a/arch/arm/mach-k3/am6_init.c
+++ b/arch/arm/mach-k3/am6_init.c
@@ -85,7 +85,13 @@ static u32 __get_backup_bootmedia(u32 devstat)
case BACKUP_BOOT_DEVICE_ETHERNET:
return BOOT_DEVICE_ETHERNET;
case BACKUP_BOOT_DEVICE_MMC2:
+   {
+   u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_MASK) 
>>
+   CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT;
+   if (port == 0x0)
+   return BOOT_DEVICE_MMC1;
return BOOT_DEVICE_MMC2;
+   }
case BACKUP_BOOT_DEVICE_SPI:
return BOOT_DEVICE_SPI;
case BACKUP_BOOT_DEVICE_HYPERFLASH:
@@ -99,11 +105,24 @@ static u32 __get_backup_bootmedia(u32 devstat)
 
 static u32 __get_primary_bootmedia(u32 devstat)
 {
-   u32 bootmode = devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK;
+   u32 bootmode = (devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK) >>
+   CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT;
 
if (bootmode == BOOT_DEVICE_OSPI || bootmode == BOOT_DEVICE_QSPI)
bootmode = BOOT_DEVICE_SPI;
 
+   if (bootmode == BOOT_DEVICE_MMC2) {
+   u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_MMC_PORT_MASK) >>
+   CTRLMMR_MAIN_DEVSTAT_MMC_PORT_SHIFT;
+   if (port == 0x0)
+   bootmode = BOOT_DEVICE_MMC1;
+   } else if (bootmode == BOOT_DEVICE_MMC1) {
+   u32 port = (devstat & CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_MASK) >>
+   CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_SHIFT;
+   if (port == 0x1)
+   bootmode = BOOT_DEVICE_MMC2;
+   }
+
return bootmode;
 }
 
diff --git a/arch/arm/mach-k3/include/mach/am6_hardware.h 
b/arch/arm/mach-k3/include/mach/am6_hardware.h
index e4b78f8617..b5244609af 100644
--- a/arch/arm/mach-k3/include/mach/am6_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am6_hardware.h
@@ -16,6 +16,12 @@
 #define CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT0
 #define CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_MASKGENMASK(6, 4)
 #define CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT   4
+#define CTRLMMR_MAIN_DEVSTAT_MMC_PORT_MASK GENMASK(12, 12)
+#define CTRLMMR_MAIN_DEVSTAT_MMC_PORT_SHIFT12
+#define CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_MASKGENMASK(14, 14)
+#define CTRLMMR_MAIN_DEVSTAT_EMMC_PORT_SHIFT   14
+#define CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_MASKGENMASK(17, 17)
+#define CTRLMMR_MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT   12
 
 #define WKUP_CTRL_MMR0_BASE0x4300
 #define MCU_CTRL_MMR0_BASE 0x40f0
-- 
2.18.0

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[U-Boot] [PATCH 2/2] arm: K3: am654: Add support for getting boot mode

2018-10-03 Thread Andrew F. Davis
Read the boot mode register to find the boot mode. Only use eMMC boot0
mode when the mode is eMMC boot (called BOOT_DEVICE_MMC1 currently due
to current conflating of boot mode and boot device), and not iff the
boot device is MMC port 0.

Signed-off-by: Andrew F. Davis 
---
 arch/arm/mach-k3/am6_init.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c
index b2388b98ec..68f0b8c011 100644
--- a/arch/arm/mach-k3/am6_init.c
+++ b/arch/arm/mach-k3/am6_init.c
@@ -72,6 +72,29 @@ void board_init_f(ulong dummy)
preloader_console_init();
 }
 
+u32 spl_boot_mode(const u32 boot_device)
+{
+#if defined(CONFIG_SUPPORT_EMMC_BOOT)
+   u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
+   u32 bootindex = readl(K3_BOOT_PARAM_TABLE_INDEX_VAL);
+
+   u32 bootmode = (devstat & CTRLMMR_MAIN_DEVSTAT_BOOTMODE_MASK) >>
+   CTRLMMR_MAIN_DEVSTAT_BOOTMODE_SHIFT;
+
+   /* eMMC boot0 mode is only supported for primary boot */
+   if (bootindex == K3_PRIMARY_BOOTMODE &&
+   bootmode == BOOT_DEVICE_MMC1)
+   return MMCSD_MODE_EMMCBOOT;
+#endif
+
+   /* Everything else use filesystem if available */
+#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
+   return MMCSD_MODE_FS;
+#else
+   return MMCSD_MODE_RAW;
+#endif
+}
+
 static u32 __get_backup_bootmedia(u32 devstat)
 {
u32 bkup_boot = (devstat & CTRLMMR_MAIN_DEVSTAT_BKUP_BOOTMODE_MASK) >>
-- 
2.18.0

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Re: [U-Boot] Please pull u-boot-dm

2018-10-03 Thread Michal Simek
Hi Jens and Simon,

ne 30. 9. 2018 v 22:07 odesílatel Simon Glass  napsal:

> Hi Tom,
>
> Here are some binman and core driver-model enhancements.
>
> https://travis-ci.org/sglass68/u-boot/builds/435045761
>
> Re signed tags, I did read this link:
>
> http://web.mit.edu/git/www/howto/using-signed-tag-in-pull-request.html
>
> but I get:
>
> error: gpg failed to sign the data
> error: unable to sign the tag
> The tag message has been left in .git/TAG_EDITMSG
>
> I have tried for a while to get gpg going. I used to use it a long
> time again. Do you know any good instructions for that?
>
> Regards,
> Simon
>
>
> The following changes since commit
> bbef20d479441b01d62252cf127498c58078b2c3:
>
>   Merge tag 'xilinx-for-v2018.11' of
> git://git.denx.de/u-boot-microblaze (2018-09-27 08:29:10 -0400)
>
> are available in the Git repository at:
>
>   git://git.denx.de/u-boot-dm.git
>
> for you to fetch changes up to 31b8217e83a63d1c8c70edcdcdf5aff3b1791640:
>
>   dm: test: Add "/firmware" node scan test (2018-09-29 11:49:35 -0600)
>
> 
> Jens Wiklander (1):
>   fdt: fdtdec_setup_memory_banksize() use livetree
>
>

This patch is breaking SPL at least on zynq board. I didn't test zynqmp but
I think situation will be very similar.

I am ending in this while loop and never come out of that.

1205 while (ofnode_read_resource(mem, reg++, )) {
1206 reg = 0;
1207 mem = get_next_memory_node(mem);
1208 if (!ofnode_valid(mem)) {
1209 if (bank)
1210 return 0;
1211 goto missing_node;
1212 }
1213 }

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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[U-Boot] [RFC PATCH v2 3/3] tools: Add a tool to get an overview of the usage of CONFIG options

2018-10-03 Thread Jean-Jacques Hiblot
configs2csv.py is tool that allow to check how some options are used for a
particular subset of platforms.
The purpose is to identify the targets that are actually using one or more
options of interest.
For example, it can tell what targets are still using CONFIG_DM_I2_COMPAT.
It relies on the config database produced by tools/moveconfig.py.
If the database doesn't exist, it will build it for the restricted set of
the selected platforms. Once the database is built, it is much faster than
greping the configs directory and more accurate as it relies on the
information found in u-boot.cfg instead of defconfigs.
It possible to look for options in the u-boot, the SPL or the TPL
configurations. It can also perform diffs between those configurations.

usage: configs2csv.py [-h] [-X] [--u-boot] [--spl] [--tpl] [--diff]
  [--rebuild-db] [-j JOBS] [-o OUTPUT] [--no-header]
  [--discard-empty] [-i] [--soc SOC] [--vendor VENDOR]
  [--arch ARCH] [--cpu CPU] [--board BOARD]
  [--target TARGET]
  OPTION [OPTION ...]

all filtering parameters (OPTION, vendor, arch, ...) accept regexp.
ex: configs2csv.py .*DM_I2C.* --soc 'omap[2345]|k3' will match
CONFIG_DM_I2C and CONFIG_DM_I2C_COMPAT and look for it only for targets
using the omap2, omap3, omap4, omap5 or k3 SOCs.

Signed-off-by: Jean-Jacques Hiblot 

---

Changes in v2:
- basically rewrote the whole thing
- use tools/moveconfig.py to generate the database of configs
- use tools/find_defconfigs.py to get the list of defconfigs off interest
- removed diff with .config. tools/moveconfig.py does a better job

 tools/configs2csv.py | 387 +++
 1 file changed, 387 insertions(+)
 create mode 100755 tools/configs2csv.py

diff --git a/tools/configs2csv.py b/tools/configs2csv.py
new file mode 100755
index 000..70b6602
--- /dev/null
+++ b/tools/configs2csv.py
@@ -0,0 +1,387 @@
+#!/usr/bin/env python
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Author: JJ Hiblot 
+#
+
+"""
+scan the configuration of specified targets (ie defconfigs) and outputs a
+summary in a csv file.
+Useful tool to check what platform is using a particular set of options.
+
+
+How does it work?
+-
+
+This tools uses the config database produced by tools/moveconfig.py (called
+with option -B to get all the configs: SPl, TPL and u-boot). If the database
+is not present, it will build it. A rebuild can be forced with the option
+'--rebuild-db'.
+
+The list of the targets of interest can be specified by a set of filter (soc,
+vendor, defconfig name, ..). All those filters are actually regexp, allowing
+for complex selection. The selection process is done by
+tools/find_defconfigs.py
+ex: --soc omap[23] --vendor 'ti|compulab' will inspect the omap2 and omap3
+platforms from TI and compulab
+
+
+examples:
+-
+
+
+1) Get an overview of the usage of CONFIG_DM, CONFIG_SPL_DM, and DM/I2C related
+   options for platforms with omap5 or k3 SOC in u-boot and in SPL
+
+$ tools/configs2csv.py CONFIG_SPL_DM CONFIG_DM CONFIG_DM_I2C.* --vendor ti \
+   --soc 'omap5|k3' -X --u-boot --spl  -o dummy.csv
+
+vendor   socdefconfigtype CONFIG_DM  CONFIG_DM_I2C 
 CONFIG_DM_I2C_COMPAT  CONFIG_SPL_DM
+ti  omap5 am57xx_evm_defconfigSPL X
   X
+ti  omap5 am57xx_evm_defconfigu-boot  X X  
  XX
+ti  omap5 am57xx_hs_evm_defconfig SPL X
   X
+ti  omap5 am57xx_hs_evm_defconfig u-boot  X X  
  XX
+ti  k3am65x_evm_a53_defconfig SPL X
   X
+ti  k3am65x_evm_a53_defconfig u-boot  X
   X
+ti  omap5 dra7xx_evm_defconfigSPL X
   X
+ti  omap5 dra7xx_evm_defconfigu-boot  X X  
  XX
+ti  omap5 dra7xx_hs_evm_defconfig SPL X
   X
+ti  omap5 dra7xx_hs_evm_defconfig u-boot  X X  
  XX
+ti  omap5 omap5_uevm_defconfigSPL
+ti  omap5 omap5_uevm_defconfigu-boot
+
+
+This shows quickly that DM is not supported at all for omap5_uevm, that
+only am65x_evm_a53 in not using DM_I2C in u-boot, and finally that DM_I2C is
+not enabled in the SPL for any platform although SPL_DM is.
+Also all the other platforms that enabled DM_I2C, also enabled
+CONFIG_DM_I2C_COMPAT.
+
+
+2) Check differences in config between SPL, TPL and u-boot (--diff option)
+
+Some platforms may disable/enable stuff in the configuration header files if

[U-Boot] [RFC PATCH v2 2/3] tools: Add a tool to get a list of defconfigs based on filters

2018-10-03 Thread Jean-Jacques Hiblot
The possible filters are "arch", "vendor", "soc", "cpu" and "arch".

The list of all the defconfigs is read from boards.cfg. If this file
doesn't exist, then tools/genboardscfg.py is called to generate it.

Signed-off-by: Jean-Jacques Hiblot 
---

Changes in v2: None

 tools/find_defconfigs.py | 167 +++
 1 file changed, 167 insertions(+)
 create mode 100755 tools/find_defconfigs.py

diff --git a/tools/find_defconfigs.py b/tools/find_defconfigs.py
new file mode 100755
index 000..9d68cef
--- /dev/null
+++ b/tools/find_defconfigs.py
@@ -0,0 +1,167 @@
+#!/usr/bin/env python
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Author: JJ Hiblot 
+#
+
+"""
+Output a list of defconfig matching criteria.
+
+The possible criteria are soc, vendor, arch, cpu, board and defconfig name.
+The criteria are expressed as regexp, allowing for complex selection.
+
+How does it work?
+-
+
+This tools uses the boards.cfg file produced by tools/genboardscfg.py
+It reads the file to get a list of all the defconfigs and the information
+about the soc, vendor etc. for each of them.
+Then it walks this list and outputs the defconfigs for which the info match
+the regexp passed to the program.
+
+examples:
+-
+
+1) Get the list of defconfigs for boards built around omap5, omap4 and k3, not 
built by TI
+
+$ tools/find_defconfigs.py  --soc 'omap[45]|k3' --vendor '(?!ti)'
+kc1_defconfig
+duovero_defconfig
+cl-som-am57x_defconfig
+cm_t54_defconfig
+
+2) Same list but iwth more details on the items that were used as filters
+
+$  tools/find_defconfigs.py  --soc 'omap[45]|k3' --vendor '(?!ti)' 
--show-details
+kc1_defconfig | omap4 | amazon
+duovero_defconfig | omap4 | gumstix
+cl-som-am57x_defconfig | omap5 | compulab
+cm_t54_defconfig | omap5 | compulab
+
+
+"""
+
+import re
+import os
+import argparse
+
+
+class board:
+
+def __init__(self, status, arch, cpu, soc,
+ vendor, board, target, options, maintainer):
+self.status = status
+self.arch = arch
+self.cpu = cpu
+self.soc = soc
+self.vendor = vendor
+self.board = board
+self.target = target
+self.defconfig = "{}_defconfig".format(target)
+self.options = options
+self.maintainer = maintainer
+
+def show(self, sep=' | ', props=None):
+if not props:
+print(
+sep.join([self.defconfig,
+  self.vendor,
+  self.arch,
+  self.cpu,
+  self.soc,
+  self.board,
+  self.status,
+  self.maintainer]))
+else:
+print(sep.join([self.defconfig] + [getattr(self, prop) for prop in 
props]))
+
+def cleanup(self):
+""" remove the directory in which the cfg files have been built """
+shutil.rmtree(self.temp_dir)
+
+def match(self, rules):
+""" return True if the board match all the criteria """
+for prop, r in rules:
+val = getattr(self, prop)
+if not val or val == "-":
+return False
+if not r.match(val):
+return False
+return True
+
+
+def get_all_boards():
+""" extract a list of boards from 'boards.cfg' """
+result = []
+if not os.path.isfile("boards.cfg"):
+os.system('tools/genboardscfg.py')
+
+with open('boards.cfg', 'r') as f:
+for l in f.readlines():
+if not l or l[0] == "#":
+continue
+props = l.strip().split(None, 8)
+if not props:
+continue
+if len(props) < 9:
+props.extend(["-"] * (9 - len(props)))
+result.append(board(*props))
+return result
+
+
+def get_default_options():
+return ["board", "soc", "vendor", "arch", "cpu", "target"]
+
+
+def update_parser_with_default_options(parser):
+parser.add_argument('-i', '--ignore-case', action="store_true")
+parser.add_argument("--soc",
+help="regexp to filter on SoC. ex: 'omap[45]' to 
inspect omap5 and omap5 targets")
+parser.add_argument("--vendor", help="regexp to filter on Vendor.")
+parser.add_argument("--arch", help="regexp to filter on Arch")
+parser.add_argument("--cpu", help="regexp to filter on CPU")
+parser.add_argument("--board", help="regexp to filter on Board")
+parser.add_argument("--target",
+help="regexp to filter on Target (defconfig filename 
without the '_defconfig' suffix)")
+
+
+def get_matching_boards(args, fields=get_default_options()):
+# compile a list of regexp used to filter the targets
+boards = []
+rules = []
+for f in fields:
+arg = getattr(args, f)
+if arg:
+rules.append((f, re.compile("\\b{}\\b".format(arg),
+ re.IGNORECASE if 

[U-Boot] [RFC PATCH v2 1/3] tools: moveconfig: Add an option to build a fuller database of options

2018-10-03 Thread Jean-Jacques Hiblot
"moveconfig -b" will build a database of config options based on the
content of include/config/auto.conf that reflects the .config

Add a new option '-B' that does essentially the same, except that it uses
the content of u-boot.cfg, spl/u-boot.cfg and tpl/u-boot.cfg.
This allows to get the options from .config AND the headers for all the
possible binary types (u-boot, SPL and TPL)

Signed-off-by: Jean-Jacques Hiblot 
---

Changes in v2: None

 tools/moveconfig.py | 56 ++---
 1 file changed, 49 insertions(+), 7 deletions(-)

diff --git a/tools/moveconfig.py b/tools/moveconfig.py
index caa81ac..85c2b8b 100755
--- a/tools/moveconfig.py
+++ b/tools/moveconfig.py
@@ -1151,9 +1151,17 @@ class Slot:
self.ps.stderr.read())
 self.finish(False)
 
+def remove_cfg_files(self):
+for base in ['.', 'spl', 'tpl']:
+try:
+os.remove(os.path.join(self.build_dir, base, "u-boot.cfg"))
+except:
+pass
+
 def do_defconfig(self):
 """Run 'make _defconfig' to create the .config file."""
-
+# first remove old cfg files that may have been produced earlier
+self.remove_cfg_files()
 cmd = list(self.make_cmd)
 cmd.append(self.defconfig)
 self.ps = subprocess.Popen(cmd, stdout=self.devnull,
@@ -1182,15 +1190,43 @@ class Slot:
cwd=self.current_src_dir)
 self.state = STATE_AUTOCONF
 
+
 def do_build_db(self):
 """Add the board to the database"""
-configs = {}
-with open(os.path.join(self.build_dir, AUTO_CONF_PATH)) as fd:
-for line in fd.readlines():
+def conf_to_dic(filename):
+configs = {}
+if not os.path.isfile(filename):
+return None
+
+try:
+if filename.endswith("u-boot.cfg"):
+with tempfile.NamedTemporaryFile(delete = True) as fd:
+lines = subprocess.check_call("sed -n -f 
tools/scripts/define2mk.sed {}".format(filename).split(), stdout = fd)
+fd.seek(0)
+lines = fd.readlines()
+else:
+with open(filename, "r") as fd:
+lines = fd.readlines()
+except:
+return None
+
+for line in lines:
 if line.startswith('CONFIG'):
 config, value = line.split('=', 1)
 configs[config] = value.rstrip()
-self.db_queue.put([self.defconfig, configs])
+return configs
+
+list_of_conf = []
+if self.options.build_full_db:
+list_of_conf.append((self.defconfig,"u-boot.cfg"))
+list_of_conf.append(("{} 
SPL".format(self.defconfig),"spl/u-boot.cfg"))
+list_of_conf.append(("{} 
TPL".format(self.defconfig),"tpl/u-boot.cfg"))
+else:
+list_of_conf.append((self.defconfig,AUTO_CONF_PATH))
+for name,conf_file in list_of_conf:
+configs = conf_to_dic(os.path.join(self.build_dir, conf_file))
+if configs:
+self.db_queue.put([name, configs])
 self.finish(True)
 
 def do_savedefconfig(self):
@@ -1770,7 +1806,9 @@ def main():
   help="don't show options which are already marked as "
   'implying others')
 parser.add_option('-b', '--build-db', action='store_true', default=False,
-  help='build a CONFIG database')
+  help='build a CONFIG database based only on auto.conf')
+parser.add_option('-B', '--build-full-db', action='store_true', 
default=False,
+  help='build a CONFIG database based only on u-boot.cfg 
(and also for SPL and TPL)')
 parser.add_option('-c', '--color', action='store_true', default=False,
   help='display the log in color')
 parser.add_option('-C', '--commit', action='store_true', default=False,
@@ -1807,6 +1845,9 @@ def main():
 
 (options, configs) = parser.parse_args()
 
+if options.build_full_db:
+options.build_db = True
+
 if len(configs) == 0 and not any((options.force_sync, options.build_db,
   options.imply)):
 parser.print_usage()
@@ -1875,7 +1916,8 @@ def main():
 
 if options.build_db:
 with open(CONFIG_DATABASE, 'w') as fd:
-for defconfig, configs in config_db.iteritems():
+for defconfig in sorted(config_db.keys()):
+configs = config_db[defconfig]
 fd.write('%s\n' % defconfig)
 for config in sorted(configs.keys()):
 fd.write('   %s=%s\n' % (config, configs[config]))
-- 
2.7.4

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[U-Boot] [RFC PATCH v2 0/3] python tools to inspect configs

2018-10-03 Thread Jean-Jacques Hiblot

This series introduce 2 new python tools that helps getting an overview
of the configuration options.
First one is fairly simple and is used to locate deconfigs based on several
criteria: 'arch', 'soc', 'cpu', 'vendor', 'board', 'defconfig name',
'maintainer' and 'status'. All the parameters use regexp.
ex: Show all defconfigs of platforms built around imx25 or imx27 or imxs
$ tools/find_defconfigs.py --soc 'mx(25|27|s)'

The 2nd tool is used to produce a CSV file that summarizes the usage of
config options by a set of defconfigs. Useful to check what platforms might
need modifications when working on a particular option.
ex:
Get the TI platforms that enable CONFIG_DM_I2C_COMPAT either in u-boot or
the SPL
$ tools/configs2csv.py -X  CONFIG_DM_I2C_COMPAT --spl --u-boot --vendor ti \
  --discard-empty

limitations:
- must be executed at the root of the source tree
- the source tree must be clean (make mrproper)
- only supports CSV format. visualization in terminal sould be added.
  But LibreOffice calc is better suited with all its ordering/
  filtering capabilities.

Changes in v2:
- basically rewrote the whole thing
- use tools/moveconfig.py to generate the database of configs
- use tools/find_defconfigs.py to get the list of defconfigs off interest
- removed diff with .config. tools/moveconfig.py does a better job

Jean-Jacques Hiblot (3):
  tools: moveconfig: Add an option to build a fuller database of options
  tools: Add a tool to get a list of defconfigs based on filters
  tools: Add a tool to get an overview of the usage of CONFIG options

 tools/configs2csv.py | 387 +++
 tools/find_defconfigs.py | 167 
 tools/moveconfig.py  |  56 ++-
 3 files changed, 603 insertions(+), 7 deletions(-)
 create mode 100755 tools/configs2csv.py
 create mode 100755 tools/find_defconfigs.py

-- 
2.7.4

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Re: [U-Boot] [PATCH v13 5/7] cmd: mtd: add 'mtd' command

2018-10-03 Thread Adam Ford
On Wed, Oct 3, 2018 at 8:35 AM Miquel Raynal  wrote:
>
> Hi Adam,
>
> > >
> > > >
> > > > >
> > > > > I can use the nand read/write functions and mtdparts lists the
> > > > > partitions, so I know nand works.  My defconfig
> > > > > lists the partitions, so if we're not supposed to use mtdparts, where
> > > > > I do store the partition information?
> > > >
> > > > You are not supposed to use the mtdpart _command_, but the mtdparts
> > > > _variable_ must be used in order to declare the partitions.
> > >
> > > OK.  If I can get MTD working, I'll work to remove the other commands
> > > like NAND and MTDPARTS
> >
> > As of today, the process of migration is not entirely finished to DM
> > and you might still need to issue *first* a "nand probe" to register
> > the device operations.
>
> Mmmh there is no nand probe actually, for raw nands like the one you
> have it should work out of the box.

I have a few tasks to do today for work, but I'll try to do some
testing as you suggested this week and possibly later tonight.

adam
>
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Re: [U-Boot] [PATCH V2] spl: Weed out CONFIG_SYS_TEXT_BASE usage

2018-10-03 Thread Michal Simek
Hi Marek,

út 14. 8. 2018 v 11:27 odesílatel Marek Vasut  napsal:

> The SPL loaders assume that the CONFIG_SYS_TEXT_BASE memory location
> is available and can be corrupted by loading ie. uImage or fitImage
> headers there. Sometimes it could be beneficial to load the headers
> elsewhere, ie. if CONFIG_SYS_TEXT_BASE is not yet writable while we
> still want to parse the image headers in some local onchip memory to
> ie. extract firmware from that image.
>
> Add the possibility to override the location where the headers get
> loaded by introducing new function, spl_get_load_buffer() which takes
> two arguments -- offset from the CONFIG_SYS_TEXT_BASE and size of the
> data that are to be loaded there -- and returns a valid buffer address
> or hangs the system. The default behavior is the same as before, add
> the offset to CONFIG_SYS_TEXT_BASE and return that address. User can
> override the weak spl_get_load_buffer() function though.
>
> Signed-off-by: Marek Vasut 
> Cc: Tom Rini 
> ---
> V2: Fix build issues on multiple boards due to incorrect pointer casting
> ---
>  common/spl/spl.c | 5 +
>  common/spl/spl_ext.c | 3 +--
>  common/spl/spl_fat.c | 3 +--
>  common/spl/spl_fit.c | 6 +++---
>  common/spl/spl_mmc.c | 6 +++---
>  common/spl/spl_nand.c| 4 ++--
>  common/spl/spl_onenand.c | 3 +--
>  common/spl/spl_ram.c | 5 +++--
>  common/spl/spl_spi.c | 3 +--
>  common/spl/spl_ubi.c | 3 +--
>  include/spl.h| 9 +
>  11 files changed, 30 insertions(+), 20 deletions(-)
>
> diff --git a/common/spl/spl.c b/common/spl/spl.c
> index eda84d0c74..7c22d0f44d 100644
> --- a/common/spl/spl.c
> +++ b/common/spl/spl.c
> @@ -127,6 +127,11 @@ __weak void spl_board_prepare_for_boot(void)
> /* Nothing to do! */
>  }
>
> +__weak struct image_header *spl_get_load_buffer(ssize_t offset, size_t
> size)
> +{
> +   return (struct image_header *)(CONFIG_SYS_TEXT_BASE + offset);
> +}
> +
>  void spl_set_header_raw_uboot(struct spl_image_info *spl_image)
>  {
> ulong u_boot_pos = binman_sym(ulong, u_boot_any, image_pos);
> diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c
> index fd30a61f9a..fe05223605 100644
> --- a/common/spl/spl_ext.c
> +++ b/common/spl/spl_ext.c
> @@ -16,8 +16,7 @@ int spl_load_image_ext(struct spl_image_info *spl_image,
> loff_t filelen, actlen;
> disk_partition_t part_info = {};
>
> -   header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
> -   sizeof(struct
> image_header));
> +   header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
>
> if (part_get_info(block_dev, partition, _info)) {
> printf("spl: no partition table found\n");
> diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c
> index 0403016bb4..163e540622 100644
> --- a/common/spl/spl_fat.c
> +++ b/common/spl/spl_fat.c
> @@ -63,8 +63,7 @@ int spl_load_image_fat(struct spl_image_info *spl_image,
> if (err)
> goto end;
>
> -   header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
> -   sizeof(struct
> image_header));
> +   header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
>
> err = file_fat_read(filename, header, sizeof(struct image_header));
> if (err <= 0)
> diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
> index 9eabb1c105..f08e5018c3 100644
> --- a/common/spl/spl_fit.c
> +++ b/common/spl/spl_fit.c
> @@ -357,7 +357,7 @@ int spl_load_simple_fit(struct spl_image_info
> *spl_image,
> struct spl_image_info image_info;
> int node = -1;
> int images, ret;
> -   int base_offset, align_len = ARCH_DMA_MINALIGN - 1;
> +   int base_offset, hsize, align_len = ARCH_DMA_MINALIGN - 1;
> int index = 0;
>
> /*
> @@ -386,8 +386,8 @@ int spl_load_simple_fit(struct spl_image_info
> *spl_image,
>  * For FIT with data embedded, data is loaded as part of FIT image.
>  * For FIT with external data, data is not loaded in this step.
>  */
> -   fit = (void *)((CONFIG_SYS_TEXT_BASE - size - info->bl_len -
> -   align_len) & ~align_len);
> +   hsize = (size + info->bl_len + align_len) & ~align_len;
> +   fit = spl_get_load_buffer(-hsize, hsize);
> sectors = get_aligned_image_size(info, size, 0);
> count = info->read(info, sector, sectors, fit);
> debug("fit read sector %lx, sectors=%d, dst=%p, count=%lu\n",
> diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
> index 0b2f059570..75c41598e6 100644
> --- a/common/spl/spl_mmc.c
> +++ b/common/spl/spl_mmc.c
> @@ -55,13 +55,13 @@ int mmc_load_image_raw_sector(struct spl_image_info
> *spl_image,
>  {
> unsigned long count;
> struct image_header *header;
> +   struct blk_desc *bd = mmc_get_blk_desc(mmc);
> int ret = 0;
>
> -   header = (struct image_header 

Re: [U-Boot] [PATCH v13 5/7] cmd: mtd: add 'mtd' command

2018-10-03 Thread Miquel Raynal
Hi Adam,

> >   
> > >
> > > >
> > > > I can use the nand read/write functions and mtdparts lists the
> > > > partitions, so I know nand works.  My defconfig
> > > > lists the partitions, so if we're not supposed to use mtdparts, where
> > > > I do store the partition information?
> > >
> > > You are not supposed to use the mtdpart _command_, but the mtdparts
> > > _variable_ must be used in order to declare the partitions.
> > 
> > OK.  If I can get MTD working, I'll work to remove the other commands
> > like NAND and MTDPARTS  
> 
> As of today, the process of migration is not entirely finished to DM
> and you might still need to issue *first* a "nand probe" to register
> the device operations.

Mmmh there is no nand probe actually, for raw nands like the one you
have it should work out of the box.

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Re: [U-Boot] [PATCH v13 5/7] cmd: mtd: add 'mtd' command

2018-10-03 Thread Miquel Raynal
Hi Adam,

Adam Ford  wrote on Wed, 3 Oct 2018 07:47:25 -0500:

> On Wed, Oct 3, 2018 at 7:43 AM Miquel Raynal  
> wrote:
> >
> > Hi Adam,
> >
> > Adam Ford  wrote on Wed, 3 Oct 2018 07:35:15 -0500:
> >  
> > > On Mon, Oct 1, 2018 at 8:48 AM Miquel Raynal  
> > > wrote:  
> > > >
> > > > There should not be a 'nand' command, a 'sf' command and certainly not
> > > > a new 'spi-nand' command. Write a 'mtd' command instead to manage all
> > > > MTD devices/partitions at once. This should be the preferred way to
> > > > access any MTD device.  
> > >
> > > What is the expected behavior when I type 'mtd list' on my omap37
> > > board, it just hangs.  
> >
> > What do you mean "hangs", does U-Boot crashes? Or is it really hanging
> > with no more on the console? Can you Ctrl-C to cancel the command or is
> > it really stuck?  
> 
> It's really stuck
> 
>   U-Boot 2018.11-rc1-00636-g592cd5defd (Oct 03 2018 - 07:28:27 -0500)
> 
>   OMAP3630/3730-GP ES1.2, CPU-OPP2, L3-200MHz, Max CPU Clock 800 MHz
>   Model: LogicPD Zoom OMAP3 Development Kit
>   Logic DM37x/OMAP35x reference board + LPDDR/NAND
>   DRAM:  256 MiB
>   NAND:  512 MiB
>   MMC:   OMAP SD/MMC: 0
>   Loading Environment from NAND... OK
>   OMAP die ID: 15529ff80168301018021018
>   Board: DM37xx Torpedo
>   Net:   smc911x-0
>   Hit any key to stop autoboot:  0
>   OMAP Logic # mtd list
> 
> Control-C does nothing.
> 
> 
> >  
> > >
> > > I can use the nand read/write functions and mtdparts lists the
> > > partitions, so I know nand works.  My defconfig
> > > lists the partitions, so if we're not supposed to use mtdparts, where
> > > I do store the partition information?  
> >
> > You are not supposed to use the mtdpart _command_, but the mtdparts
> > _variable_ must be used in order to declare the partitions.  
> 
> OK.  If I can get MTD working, I'll work to remove the other commands
> like NAND and MTDPARTS

As of today, the process of migration is not entirely finished to DM
and you might still need to issue *first* a "nand probe" to register
the device operations.

For the hang, could you check the while (remaining_partitions) loop in
drivers/mtd/mtd_uboot.c:mtd_probe_devices()? Otherwise if you have some
time you may add more traces to track down where it hangs?


> 
> >  
> > >
> > > I intentionally removed it from the device tree a while ago, because
> > > U-Boot was passing the partition info to Linux.  
> >
> > Indeed, that's his primary role.  
> 
> OK, I just want to make sure I'm understanding it correctly.

Sure, no pb!

Thanks,
Miquèl
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Re: [U-Boot] [PATCH] ARM: dts: stm32mp1: Add usbotg_hs regulator for stm32mp157c-ev1

2018-10-03 Thread Patrice CHOTARD
Hi Tom

On 10/03/2018 02:06 PM, Tom Rini wrote:
> On Wed, Oct 03, 2018 at 09:38:38AM +0200, Patrice Chotard wrote:
> 
>> Add usbotg_hs regulator to allow to use the USB mass-storage
>> feature on OTG usb port.
>>
>> Signed-off-by: Patrice Chotard 
>> ---
>>
>>  arch/arm/dts/stm32mp157c-ed1.dts | 4 
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm/dts/stm32mp157c-ed1.dts 
>> b/arch/arm/dts/stm32mp157c-ed1.dts
>> index 898deaf41095..f8b770116711 100644
>> --- a/arch/arm/dts/stm32mp157c-ed1.dts
>> +++ b/arch/arm/dts/stm32mp157c-ed1.dts
>> @@ -361,6 +361,10 @@
>>  status = "okay";
>>  };
>>  
>> +_hs {
>> +usb33d-supply = <>;
>> +};
>> +
>>  _port0 {
>>  phy-supply = <_usb>;
>>  vdda1v1-supply = <>;
> 
> This is also being sent to Linux, right?  Thanks!

I'am not in charge of that, but yes it will be sent on Linux side.

Thanks

Patrice

> 
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Re: [U-Boot] [PATCH v13 5/7] cmd: mtd: add 'mtd' command

2018-10-03 Thread Adam Ford
On Wed, Oct 3, 2018 at 7:43 AM Miquel Raynal  wrote:
>
> Hi Adam,
>
> Adam Ford  wrote on Wed, 3 Oct 2018 07:35:15 -0500:
>
> > On Mon, Oct 1, 2018 at 8:48 AM Miquel Raynal  
> > wrote:
> > >
> > > There should not be a 'nand' command, a 'sf' command and certainly not
> > > a new 'spi-nand' command. Write a 'mtd' command instead to manage all
> > > MTD devices/partitions at once. This should be the preferred way to
> > > access any MTD device.
> >
> > What is the expected behavior when I type 'mtd list' on my omap37
> > board, it just hangs.
>
> What do you mean "hangs", does U-Boot crashes? Or is it really hanging
> with no more on the console? Can you Ctrl-C to cancel the command or is
> it really stuck?

It's really stuck

  U-Boot 2018.11-rc1-00636-g592cd5defd (Oct 03 2018 - 07:28:27 -0500)

  OMAP3630/3730-GP ES1.2, CPU-OPP2, L3-200MHz, Max CPU Clock 800 MHz
  Model: LogicPD Zoom OMAP3 Development Kit
  Logic DM37x/OMAP35x reference board + LPDDR/NAND
  DRAM:  256 MiB
  NAND:  512 MiB
  MMC:   OMAP SD/MMC: 0
  Loading Environment from NAND... OK
  OMAP die ID: 15529ff80168301018021018
  Board: DM37xx Torpedo
  Net:   smc911x-0
  Hit any key to stop autoboot:  0
  OMAP Logic # mtd list

Control-C does nothing.


>
> >
> > I can use the nand read/write functions and mtdparts lists the
> > partitions, so I know nand works.  My defconfig
> > lists the partitions, so if we're not supposed to use mtdparts, where
> > I do store the partition information?
>
> You are not supposed to use the mtdpart _command_, but the mtdparts
> _variable_ must be used in order to declare the partitions.

OK.  If I can get MTD working, I'll work to remove the other commands
like NAND and MTDPARTS

>
> >
> > I intentionally removed it from the device tree a while ago, because
> > U-Boot was passing the partition info to Linux.
>
> Indeed, that's his primary role.

OK, I just want to make sure I'm understanding it correctly.

thanks,

adam
>
> Thanks,
> Miquèl
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Re: [U-Boot] [PATCH v13 5/7] cmd: mtd: add 'mtd' command

2018-10-03 Thread Miquel Raynal
Hi Adam,

Adam Ford  wrote on Wed, 3 Oct 2018 07:35:15 -0500:

> On Mon, Oct 1, 2018 at 8:48 AM Miquel Raynal  
> wrote:
> >
> > There should not be a 'nand' command, a 'sf' command and certainly not
> > a new 'spi-nand' command. Write a 'mtd' command instead to manage all
> > MTD devices/partitions at once. This should be the preferred way to
> > access any MTD device.  
> 
> What is the expected behavior when I type 'mtd list' on my omap37
> board, it just hangs.

What do you mean "hangs", does U-Boot crashes? Or is it really hanging
with no more on the console? Can you Ctrl-C to cancel the command or is
it really stuck?

> 
> I can use the nand read/write functions and mtdparts lists the
> partitions, so I know nand works.  My defconfig
> lists the partitions, so if we're not supposed to use mtdparts, where
> I do store the partition information?

You are not supposed to use the mtdpart _command_, but the mtdparts
_variable_ must be used in order to declare the partitions.

> 
> I intentionally removed it from the device tree a while ago, because
> U-Boot was passing the partition info to Linux.

Indeed, that's his primary role.

Thanks,
Miquèl
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Re: [U-Boot] [PATCH v2 2/2] gpio: da8xx: Push generic defines of gpio.h out of mach-davinci

2018-10-03 Thread Tom Rini
On Wed, Oct 03, 2018 at 05:55:14PM +0530, Keerthy wrote:

> Push generic defines of gpio.h out of mach-davinci to drivers/gpio
> now that non-davinci architectures are beginning to use this IP.
> 
> Signed-off-by: Keerthy 

Reviewed-by: Tom Rini 

-- 
Tom


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Re: [U-Boot] [PATCH v13 5/7] cmd: mtd: add 'mtd' command

2018-10-03 Thread Adam Ford
On Mon, Oct 1, 2018 at 8:48 AM Miquel Raynal  wrote:
>
> There should not be a 'nand' command, a 'sf' command and certainly not
> a new 'spi-nand' command. Write a 'mtd' command instead to manage all
> MTD devices/partitions at once. This should be the preferred way to
> access any MTD device.

What is the expected behavior when I type 'mtd list' on my omap37
board, it just hangs.

I can use the nand read/write functions and mtdparts lists the
partitions, so I know nand works.  My defconfig
lists the partitions, so if we're not supposed to use mtdparts, where
I do store the partition information?

I intentionally removed it from the device tree a while ago, because
U-Boot was passing the partition info to Linux.

adam

>
> Signed-off-by: Miquel Raynal 
> Acked-by: Jagan Teki 
> Reviewed-by: Stefan Roese 
> Reviewed-by: Boris Brezillon 
> ---
>  cmd/Kconfig |  10 +-
>  cmd/Makefile|   1 +
>  cmd/mtd.c   | 473 
>  drivers/mtd/Makefile|   2 +-
>  drivers/mtd/mtd_uboot.c | 161 +-
>  include/mtd.h   |  16 ++
>  6 files changed, 659 insertions(+), 4 deletions(-)
>  create mode 100644 cmd/mtd.c
>
> diff --git a/cmd/Kconfig b/cmd/Kconfig
> index 13d4c991bf..c9be85989c 100644
> --- a/cmd/Kconfig
> +++ b/cmd/Kconfig
> @@ -864,6 +864,12 @@ config CMD_MMC_SWRITE
>   Enable support for the "mmc swrite" command to write Android sparse
>   images to eMMC.
>
> +config CMD_MTD
> +   bool "mtd"
> +   select MTD_PARTITIONS
> +   help
> + MTD commands support.
> +
>  config CMD_NAND
> bool "nand"
> default y if NAND_SUNXI
> @@ -1697,14 +1703,14 @@ config CMD_MTDPARTS
>
>  config MTDIDS_DEFAULT
> string "Default MTD IDs"
> -   depends on CMD_MTDPARTS || CMD_NAND || CMD_FLASH
> +   depends on CMD_MTD || CMD_MTDPARTS || CMD_NAND || CMD_FLASH
> help
>   Defines a default MTD IDs list for use with MTD partitions in the
>   Linux MTD command line partitions format.
>
>  config MTDPARTS_DEFAULT
> string "Default MTD partition scheme"
> -   depends on CMD_MTDPARTS || CMD_NAND || CMD_FLASH
> +   depends on CMD_MTD || CMD_MTDPARTS || CMD_NAND || CMD_FLASH
> help
>   Defines a default MTD partitioning scheme in the Linux MTD command
>   line partitions format
> diff --git a/cmd/Makefile b/cmd/Makefile
> index a61fab6583..3ba65d4d93 100644
> --- a/cmd/Makefile
> +++ b/cmd/Makefile
> @@ -92,6 +92,7 @@ obj-$(CONFIG_CMD_MISC) += misc.o
>  obj-$(CONFIG_CMD_MMC) += mmc.o
>  obj-$(CONFIG_CMD_MMC_SPI) += mmc_spi.o
>  obj-$(CONFIG_MP) += mp.o
> +obj-$(CONFIG_CMD_MTD) += mtd.o
>  obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o
>  obj-$(CONFIG_CMD_NAND) += nand.o
>  obj-$(CONFIG_CMD_NET) += net.o
> diff --git a/cmd/mtd.c b/cmd/mtd.c
> new file mode 100644
> index 00..6142223984
> --- /dev/null
> +++ b/cmd/mtd.c
> @@ -0,0 +1,473 @@
> +// SPDX-License-Identifier:  GPL-2.0+
> +/*
> + * mtd.c
> + *
> + * Generic command to handle basic operations on any memory device.
> + *
> + * Copyright: Bootlin, 2018
> + * Author: Miquèl Raynal 
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +static uint mtd_len_to_pages(struct mtd_info *mtd, u64 len)
> +{
> +   do_div(len, mtd->writesize);
> +
> +   return len;
> +}
> +
> +static bool mtd_is_aligned_with_min_io_size(struct mtd_info *mtd, u64 size)
> +{
> +   return !do_div(size, mtd->writesize);
> +}
> +
> +static bool mtd_is_aligned_with_block_size(struct mtd_info *mtd, u64 size)
> +{
> +   return !do_div(size, mtd->erasesize);
> +}
> +
> +static void mtd_dump_buf(const u8 *buf, uint len, uint offset)
> +{
> +   int i, j;
> +
> +   for (i = 0; i < len; ) {
> +   printf("0x%08x:\t", offset + i);
> +   for (j = 0; j < 8; j++)
> +   printf("%02x ", buf[i + j]);
> +   printf(" ");
> +   i += 8;
> +   for (j = 0; j < 8; j++)
> +   printf("%02x ", buf[i + j]);
> +   printf("\n");
> +   i += 8;
> +   }
> +}
> +
> +static void mtd_dump_device_buf(struct mtd_info *mtd, u64 start_off,
> +   const u8 *buf, u64 len, bool woob)
> +{
> +   bool has_pages = mtd->type == MTD_NANDFLASH ||
> +   mtd->type == MTD_MLCNANDFLASH;
> +   int npages = mtd_len_to_pages(mtd, len);
> +   uint page;
> +
> +   if (has_pages) {
> +   for (page = 0; page < npages; page++) {
> +   u64 data_off = page * mtd->writesize;
> +
> +   printf("\nDump %d data bytes from 0x%08llx:\n",
> +  mtd->writesize, start_off + data_off);
> +   mtd_dump_buf([data_off],
> +mtd->writesize, start_off + data_off);
> +
> +   if (woob) {

[U-Boot] [PATCH v2 2/2] gpio: da8xx: Push generic defines of gpio.h out of mach-davinci

2018-10-03 Thread Keerthy
Push generic defines of gpio.h out of mach-davinci to drivers/gpio
now that non-davinci architectures are beginning to use this IP.

Signed-off-by: Keerthy 
---

Changes in v2:

  * Corrected the SPDX format

 arch/arm/mach-davinci/include/mach/gpio.h | 32 
 drivers/gpio/da8xx_gpio.c |  7 --
 drivers/gpio/da8xx_gpio.h | 41 +++
 3 files changed, 46 insertions(+), 34 deletions(-)
 create mode 100644 drivers/gpio/da8xx_gpio.h

diff --git a/arch/arm/mach-davinci/include/mach/gpio.h 
b/arch/arm/mach-davinci/include/mach/gpio.h
index d4b25c3..3981978 100644
--- a/arch/arm/mach-davinci/include/mach/gpio.h
+++ b/arch/arm/mach-davinci/include/mach/gpio.h
@@ -21,27 +21,6 @@
 #define DAVINCI_GPIO_BANK8 0x01E260B0
 #endif /* CONFIG_SOC_DA8XX */
 
-struct davinci_gpio {
-   unsigned int dir;
-   unsigned int out_data;
-   unsigned int set_data;
-   unsigned int clr_data;
-   unsigned int in_data;
-   unsigned int set_rising;
-   unsigned int clr_rising;
-   unsigned int set_falling;
-   unsigned int clr_falling;
-   unsigned int intstat;
-};
-
-struct davinci_gpio_bank {
-   int num_gpio;
-   unsigned int irq_num;
-   unsigned int irq_mask;
-   unsigned long *in_use;
-   struct davinci_gpio *base;
-};
-
 #define davinci_gpio_bank01 ((struct davinci_gpio *)DAVINCI_GPIO_BANK01)
 #define davinci_gpio_bank23 ((struct davinci_gpio *)DAVINCI_GPIO_BANK23)
 #define davinci_gpio_bank45 ((struct davinci_gpio *)DAVINCI_GPIO_BANK45)
@@ -61,18 +40,7 @@ struct davinci_gpio_bank {
 #define MAX_NUM_GPIOS  144
 #endif
 #define GPIO_BANK(gp)  (davinci_gpio_bank01 + ((gp) >> 5))
-#define GPIO_BIT(gp)   ((gp) & 0x1F)
 
 void gpio_info(void);
 
-#ifdef CONFIG_DM_GPIO
-
-/* Information about a GPIO bank */
-struct davinci_gpio_platdata {
-   int bank_index;
-   ulong base; /* address of registers in physical memory */
-   const char *port_name;
-};
-#endif
-
 #endif
diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c
index 494fc5f..bd79448 100644
--- a/drivers/gpio/da8xx_gpio.c
+++ b/drivers/gpio/da8xx_gpio.c
@@ -11,11 +11,14 @@
 #include 
 #include 
 #include 
-#include 
-#include 
 #include 
 
+#include "da8xx_gpio.h"
+
 #ifndef CONFIG_DM_GPIO
+#include 
+#include 
+
 static struct gpio_registry {
int is_registered;
char name[GPIO_NAME_SIZE];
diff --git a/drivers/gpio/da8xx_gpio.h b/drivers/gpio/da8xx_gpio.h
new file mode 100644
index 000..b81e987
--- /dev/null
+++ b/drivers/gpio/da8xx_gpio.h
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#ifndef _GPIO_DA8XX_DEFS_H_
+#define _GPIO_DA8XX_DEFS_H_
+
+struct davinci_gpio {
+   unsigned int dir;
+   unsigned int out_data;
+   unsigned int set_data;
+   unsigned int clr_data;
+   unsigned int in_data;
+   unsigned int set_rising;
+   unsigned int clr_rising;
+   unsigned int set_falling;
+   unsigned int clr_falling;
+   unsigned int intstat;
+};
+
+struct davinci_gpio_bank {
+   int num_gpio;
+   unsigned int irq_num;
+   unsigned int irq_mask;
+   unsigned long *in_use;
+   struct davinci_gpio *base;
+};
+
+#define GPIO_NAME_SIZE 20
+#define MAX_NUM_GPIOS  144
+#define GPIO_BIT(gp)   ((gp) & 0x1F)
+
+#ifdef CONFIG_DM_GPIO
+
+/* Information about a GPIO bank */
+struct davinci_gpio_platdata {
+   int bank_index;
+   ulong base; /* address of registers in physical memory */
+   const char *port_name;
+};
+#endif
+
+#endif
-- 
1.9.1

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[U-Boot] [PATCH v2 1/2] gpio: da8xx: Add k2g compatible

2018-10-03 Thread Keerthy
Add k2g compatible so that k3 SoCs can be supported

Signed-off-by: Keerthy 
Reviewed-by: Tom Rini 
---
 drivers/gpio/da8xx_gpio.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c
index b0d49cb..494fc5f 100644
--- a/drivers/gpio/da8xx_gpio.c
+++ b/drivers/gpio/da8xx_gpio.c
@@ -530,6 +530,7 @@ static int davinci_gpio_probe(struct udevice *dev)
 
 static const struct udevice_id davinci_gpio_ids[] = {
{ .compatible = "ti,dm6441-gpio" },
+   { .compatible = "ti,k2g-gpio" },
{ }
 };
 
-- 
1.9.1

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Re: [U-Boot] [PATCH 1/2] gpio: da8xx: Add k2g compatible

2018-10-03 Thread Tom Rini
On Wed, Oct 03, 2018 at 04:09:30PM +0530, Keerthy wrote:

> Add k2g compatible so that k3 SoCs can be supported
> 
> Signed-off-by: Keerthy 

Reviewed-by: Tom Rini 

-- 
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Re: [U-Boot] [PATCH 2/2] gpio: da8xx: Push generic defines of gpio.h out of mach-davinci

2018-10-03 Thread Tom Rini
On Wed, Oct 03, 2018 at 04:09:31PM +0530, Keerthy wrote:

> Push generic defines of gpio.h out of mach-davinci to drivers/gpio
> now that non-davinci architectures are beginning to use this IP.
> 
> Signed-off-by: Keerthy 
[snip]
> diff --git a/drivers/gpio/da8xx_gpio.h b/drivers/gpio/da8xx_gpio.h
> new file mode 100644
> index 000..ffaa567
> --- /dev/null
> +++ b/drivers/gpio/da8xx_gpio.h
> @@ -0,0 +1,44 @@
> +/*
> + * Copyright (C) 2009 Texas Instruments Incorporated
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */

The tag should be the first line as:
// SPDX-License-Identifier: GPL-2.0+
just like in Linux, thanks!

-- 
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Re: [U-Boot] [PATCH 2/2] gpio: da8xx: Push generic defines of gpio.h out of mach-davinci

2018-10-03 Thread Keerthy


On Wednesday 03 October 2018 05:41 PM, Tom Rini wrote:
> On Wed, Oct 03, 2018 at 04:09:31PM +0530, Keerthy wrote:
> 
>> Push generic defines of gpio.h out of mach-davinci to drivers/gpio
>> now that non-davinci architectures are beginning to use this IP.
>>
>> Signed-off-by: Keerthy 
> [snip]
>> diff --git a/drivers/gpio/da8xx_gpio.h b/drivers/gpio/da8xx_gpio.h
>> new file mode 100644
>> index 000..ffaa567
>> --- /dev/null
>> +++ b/drivers/gpio/da8xx_gpio.h
>> @@ -0,0 +1,44 @@
>> +/*
>> + * Copyright (C) 2009 Texas Instruments Incorporated
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
> 
> The tag should be the first line as:
> // SPDX-License-Identifier: GPL-2.0+
> just like in Linux, thanks!

Oops will fix that. Thanks for catching it.

> 
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Re: [U-Boot] [PATCH] ARM: dts: stm32mp1: Add usbotg_hs regulator for stm32mp157c-ev1

2018-10-03 Thread Tom Rini
On Wed, Oct 03, 2018 at 09:38:38AM +0200, Patrice Chotard wrote:

> Add usbotg_hs regulator to allow to use the USB mass-storage
> feature on OTG usb port.
> 
> Signed-off-by: Patrice Chotard 
> ---
> 
>  arch/arm/dts/stm32mp157c-ed1.dts | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32mp157c-ed1.dts 
> b/arch/arm/dts/stm32mp157c-ed1.dts
> index 898deaf41095..f8b770116711 100644
> --- a/arch/arm/dts/stm32mp157c-ed1.dts
> +++ b/arch/arm/dts/stm32mp157c-ed1.dts
> @@ -361,6 +361,10 @@
>   status = "okay";
>  };
>  
> +_hs {
> + usb33d-supply = <>;
> +};
> +
>  _port0 {
>   phy-supply = <_usb>;
>   vdda1v1-supply = <>;

This is also being sent to Linux, right?  Thanks!

-- 
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[U-Boot] [PATCH 1/3] arm64: versal: Add support for new Xilinx Versal ACAPs

2018-10-03 Thread Michal Simek
Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine
Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent
Engines with leading-edge memory and interfacing technologies to deliver
powerful heterogeneous acceleration for any application. The Versal AI
Core series has five devices, offering 128 to 400 AI Engines. The series
includes dual-core Arm Cortex™-A72 application processors, dual-core Arm
Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more
than 1,900 DSP engines optimized for high-precision floating point with
low latency.

The patch is adding necessary infrastructure in place without enabling
platform which is done in separate patch.

Signed-off-by: Michal Simek 
---

 Kconfig   |  2 +-
 MAINTAINERS   |  6 ++
 arch/arm/Kconfig  | 10 +++
 arch/arm/Makefile |  1 +
 arch/arm/mach-versal/Kconfig  | 39 
 arch/arm/mach-versal/Makefile |  8 +++
 arch/arm/mach-versal/clk.c| 30 +
 arch/arm/mach-versal/cpu.c| 69 
 arch/arm/mach-versal/include/mach/gpio.h  |  6 ++
 arch/arm/mach-versal/include/mach/hardware.h  | 34 ++
 arch/arm/mach-versal/include/mach/sys_proto.h |  6 ++
 board/xilinx/versal/MAINTAINERS   |  7 +++
 board/xilinx/versal/Makefile  |  7 +++
 board/xilinx/versal/board.c   | 81 
 drivers/mmc/Kconfig   |  2 +-
 drivers/net/Kconfig   |  2 +-
 drivers/spi/Kconfig   |  4 +-
 env/Kconfig   |  4 +-
 include/configs/xilinx_versal.h   | 91 +++
 19 files changed, 402 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm/mach-versal/Kconfig
 create mode 100644 arch/arm/mach-versal/Makefile
 create mode 100644 arch/arm/mach-versal/clk.c
 create mode 100644 arch/arm/mach-versal/cpu.c
 create mode 100644 arch/arm/mach-versal/include/mach/gpio.h
 create mode 100644 arch/arm/mach-versal/include/mach/hardware.h
 create mode 100644 arch/arm/mach-versal/include/mach/sys_proto.h
 create mode 100644 board/xilinx/versal/MAINTAINERS
 create mode 100644 board/xilinx/versal/Makefile
 create mode 100644 board/xilinx/versal/board.c
 create mode 100644 include/configs/xilinx_versal.h

diff --git a/Kconfig b/Kconfig
index d96e3373c198..b967d104355c 100644
--- a/Kconfig
+++ b/Kconfig
@@ -144,7 +144,7 @@ config SYS_MALLOC_F_LEN
 
 config SYS_MALLOC_LEN
hex "Define memory for Dynamic allocation"
-   depends on ARCH_ZYNQ
+   depends on ARCH_ZYNQ || ARCH_VERSAL
help
  This defines memory to be allocated for Dynamic allocation
  TODO: Use for other architectures
diff --git a/MAINTAINERS b/MAINTAINERS
index 8f237128b241..d2645be8e0ac 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -284,6 +284,12 @@ F: arch/arm/mach-uniphier/
 F: configs/uniphier_*_defconfig
 N: uniphier
 
+ARM VERSAL
+M: Michal Simek 
+S: Maintained
+T: git git://git.denx.de/u-boot-microblaze.git
+F: arch/arm/mach-versal/
+
 ARM ZYNQ
 M: Michal Simek 
 S: Maintained
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8a23c76db846..0e5c4a385334 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -845,6 +845,14 @@ config ARCH_SUNXI
imply SPL_SERIAL_SUPPORT
imply USB_GADGET
 
+config ARCH_VERSAL
+   bool "Support Xilinx Versal Platform"
+   select ARM64
+   select CLK
+   select DM
+   select DM_SERIAL
+   select OF_CONTROL
+
 config ARCH_VF610
bool "Freescale Vybrid"
select CPU_V7A
@@ -1440,6 +1448,8 @@ source "arch/arm/cpu/armv7/vf610/Kconfig"
 
 source "arch/arm/mach-zynq/Kconfig"
 
+source "arch/arm/mach-versal/Kconfig"
+
 source "arch/arm/mach-zynqmp-r5/Kconfig"
 
 source "arch/arm/cpu/armv7/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index cac58bdc4dc7..dcde05f772db 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -79,6 +79,7 @@ machine-$(CONFIG_ARCH_STM32MP)+= stm32mp
 machine-$(CONFIG_TEGRA)+= tegra
 machine-$(CONFIG_ARCH_UNIPHIER)+= uniphier
 machine-$(CONFIG_ARCH_ZYNQ)+= zynq
+machine-$(CONFIG_ARCH_VERSAL)  += versal
 machine-$(CONFIG_ARCH_ZYNQMP_R5)   += zynqmp-r5
 
 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
diff --git a/arch/arm/mach-versal/Kconfig b/arch/arm/mach-versal/Kconfig
new file mode 100644
index ..04dbaea09c90
--- /dev/null
+++ b/arch/arm/mach-versal/Kconfig
@@ -0,0 +1,39 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+if ARCH_VERSAL
+
+config SYS_BOARD
+   string "Board name"
+   default "versal"
+
+config 

[U-Boot] [PATCH 44/53] drivers: ifc: add support for for TFABOOT

2018-10-03 Thread Rajesh Bhagat
From: Pankit Garg 

Adds support for TFABOOT in IFC driver, requires to implement
the mappings at run time.

Defines init_early_memctl_regs and init_final_memctl_regs with
dynamic mapping for nor and nand boot.

Signed-off-by: Pankit Garg 
Signed-off-by: Rajesh Bhagat 
---
 drivers/misc/fsl_ifc.c | 488 +
 include/fsl_ifc.h  |  17 ++
 2 files changed, 369 insertions(+), 136 deletions(-)

diff --git a/drivers/misc/fsl_ifc.c b/drivers/misc/fsl_ifc.c
index 7d66c3cf76..2e3b43356e 100644
--- a/drivers/misc/fsl_ifc.c
+++ b/drivers/misc/fsl_ifc.c
@@ -7,185 +7,401 @@
 #include 
 #include 
 
-void print_ifc_regs(void)
-{
-   int i, j;
-
-   printf("IFC Controller Registers\n");
-   for (i = 0; i < CONFIG_SYS_FSL_IFC_BANK_COUNT; i++) {
-   printf("CSPR%d:0x%08X\tAMASK%d:0x%08X\tCSOR%d:0x%08X\n",
-   i, get_ifc_cspr(i), i, get_ifc_amask(i),
-   i, get_ifc_csor(i));
-   for (j = 0; j < 4; j++)
-   printf("IFC_FTIM%d:0x%08X\n", j, get_ifc_ftim(i, j));
-   }
-}
-
-void init_early_memctl_regs(void)
-{
+struct ifc_regs ifc_cfg_default_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
+{
+   "cs0",
 #if defined(CONFIG_SYS_CSPR0) && defined(CONFIG_SYS_CSOR0)
-   set_ifc_ftim(IFC_CS0, IFC_FTIM0, CONFIG_SYS_CS0_FTIM0);
-   set_ifc_ftim(IFC_CS0, IFC_FTIM1, CONFIG_SYS_CS0_FTIM1);
-   set_ifc_ftim(IFC_CS0, IFC_FTIM2, CONFIG_SYS_CS0_FTIM2);
-   set_ifc_ftim(IFC_CS0, IFC_FTIM3, CONFIG_SYS_CS0_FTIM3);
-
-#ifndef CONFIG_A003399_NOR_WORKAROUND
+   CONFIG_SYS_CSPR0,
 #ifdef CONFIG_SYS_CSPR0_EXT
-   set_ifc_cspr_ext(IFC_CS0, CONFIG_SYS_CSPR0_EXT);
-#endif
+   CONFIG_SYS_CSPR0_EXT,
+#else
+   0,
+#endif
+#ifdef CONFIG_SYS_AMASK0
+   CONFIG_SYS_AMASK0,
+#else
+   0,
+#endif
+   CONFIG_SYS_CSOR0,
+   {
+   CONFIG_SYS_CS0_FTIM0,
+   CONFIG_SYS_CS0_FTIM1,
+   CONFIG_SYS_CS0_FTIM2,
+   CONFIG_SYS_CS0_FTIM3,
+   },
 #ifdef CONFIG_SYS_CSOR0_EXT
-   set_ifc_csor_ext(IFC_CS0, CONFIG_SYS_CSOR0_EXT);
+   CONFIG_SYS_CSOR0_EXT,
+#else
+   0,
+#endif
+#ifdef CONFIG_SYS_CSPR0_FINAL
+   CONFIG_SYS_CSPR0_FINAL,
+#else
+   0,
 #endif
-   set_ifc_cspr(IFC_CS0, CONFIG_SYS_CSPR0);
-   set_ifc_amask(IFC_CS0, CONFIG_SYS_AMASK0);
-   set_ifc_csor(IFC_CS0, CONFIG_SYS_CSOR0);
+#ifdef CONFIG_SYS_AMASK0_FINAL
+   CONFIG_SYS_AMASK0_FINAL,
+#else
+   0,
 #endif
 #endif
+   },
 
+#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 2
+   {
+   "cs1",
+#if defined(CONFIG_SYS_CSPR1) && defined(CONFIG_SYS_CSOR1)
+   CONFIG_SYS_CSPR1,
 #ifdef CONFIG_SYS_CSPR1_EXT
-   set_ifc_cspr_ext(IFC_CS1, CONFIG_SYS_CSPR1_EXT);
-#endif
+   CONFIG_SYS_CSPR1_EXT,
+#else
+   0,
+#endif
+#ifdef CONFIG_SYS_AMASK1
+   CONFIG_SYS_AMASK1,
+#else
+   0,
+#endif
+   CONFIG_SYS_CSOR1,
+   {
+   CONFIG_SYS_CS1_FTIM0,
+   CONFIG_SYS_CS1_FTIM1,
+   CONFIG_SYS_CS1_FTIM2,
+   CONFIG_SYS_CS1_FTIM3,
+   },
 #ifdef CONFIG_SYS_CSOR1_EXT
-   set_ifc_csor_ext(IFC_CS1, CONFIG_SYS_CSOR1_EXT);
+   CONFIG_SYS_CSOR1_EXT,
+#else
+   0,
 #endif
-#if defined(CONFIG_SYS_CSPR1) && defined(CONFIG_SYS_CSOR1)
-   set_ifc_ftim(IFC_CS1, IFC_FTIM0, CONFIG_SYS_CS1_FTIM0);
-   set_ifc_ftim(IFC_CS1, IFC_FTIM1, CONFIG_SYS_CS1_FTIM1);
-   set_ifc_ftim(IFC_CS1, IFC_FTIM2, CONFIG_SYS_CS1_FTIM2);
-   set_ifc_ftim(IFC_CS1, IFC_FTIM3, CONFIG_SYS_CS1_FTIM3);
-
-   set_ifc_csor(IFC_CS1, CONFIG_SYS_CSOR1);
-   set_ifc_amask(IFC_CS1, CONFIG_SYS_AMASK1);
-   set_ifc_cspr(IFC_CS1, CONFIG_SYS_CSPR1);
+#ifdef CONFIG_SYS_CSPR1_FINAL
+   CONFIG_SYS_CSPR1_FINAL,
+#else
+   0,
+#endif
+#ifdef CONFIG_SYS_AMASK1_FINAL
+   CONFIG_SYS_AMASK1_FINAL,
+#else
+   0,
+#endif
+#endif
+   },
 #endif
 
+#if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 3
+   {
+   "cs2",
+#if defined(CONFIG_SYS_CSPR2) && defined(CONFIG_SYS_CSOR2)
+   CONFIG_SYS_CSPR2,
 #ifdef CONFIG_SYS_CSPR2_EXT
-   set_ifc_cspr_ext(IFC_CS2, CONFIG_SYS_CSPR2_EXT);
-#endif
+   CONFIG_SYS_CSPR2_EXT,
+#else
+   0,
+#endif
+#ifdef CONFIG_SYS_AMASK2
+   CONFIG_SYS_AMASK2,
+#else
+   0,
+#endif
+   CONFIG_SYS_CSOR2,
+   {
+   CONFIG_SYS_CS2_FTIM0,
+   CONFIG_SYS_CS2_FTIM1,
+   CONFIG_SYS_CS2_FTIM2,
+   CONFIG_SYS_CS2_FTIM3,
+   },
 #ifdef CONFIG_SYS_CSOR2_EXT
-   set_ifc_csor_ext(IFC_CS2, 

[U-Boot] [PATCH 0/3] Add support for new Xilinx Versal ACAPs

2018-10-03 Thread Michal Simek
Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine
Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent
Engines with leading-edge memory and interfacing technologies to deliver
powerful heterogeneous acceleration for any application. The Versal AI
Core series has five devices, offering 128 to 400 AI Engines. The series
includes dual-core Arm Cortex™-A72 application processors, dual-core Arm
Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more
than 1,900 DSP engines optimized for high-precision floating point with
low latency.

For more information please look at
https://www.xilinx.com/products/silicon-devices/acap/versal.html

The patch series enables QEMU versal virt platform (xlnx-versal-virt)
where DTB is propagated from QEMU that's why CONFIG_OF_BOARD option is
used.

Thanks,
Michal


Michal Simek (3):
  arm64: versal: Add support for new Xilinx Versal ACAPs
  net: gem: Do not setup any clock for Xilinx SoC Versal
  arm64: versal: Add Xilinx Versal Virtual QEMU board

 Kconfig   |  2 +-
 MAINTAINERS   |  6 ++
 arch/arm/Kconfig  | 10 +++
 arch/arm/Makefile |  1 +
 arch/arm/mach-versal/Kconfig  | 44 +
 arch/arm/mach-versal/Makefile |  8 +++
 arch/arm/mach-versal/clk.c| 30 +
 arch/arm/mach-versal/cpu.c| 83 
 arch/arm/mach-versal/include/mach/gpio.h  |  6 ++
 arch/arm/mach-versal/include/mach/hardware.h  | 34 ++
 arch/arm/mach-versal/include/mach/sys_proto.h |  6 ++
 board/xilinx/versal/MAINTAINERS   |  7 +++
 board/xilinx/versal/Makefile  |  7 +++
 board/xilinx/versal/board.c   | 81 
 configs/xilinx_versal_virt_defconfig  | 68 
 drivers/mmc/Kconfig   |  2 +-
 drivers/net/Kconfig   |  2 +-
 drivers/net/zynq_gem.c|  2 +
 drivers/spi/Kconfig   |  4 +-
 env/Kconfig   |  4 +-
 include/configs/xilinx_versal.h   | 91 +++
 21 files changed, 491 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm/mach-versal/Kconfig
 create mode 100644 arch/arm/mach-versal/Makefile
 create mode 100644 arch/arm/mach-versal/clk.c
 create mode 100644 arch/arm/mach-versal/cpu.c
 create mode 100644 arch/arm/mach-versal/include/mach/gpio.h
 create mode 100644 arch/arm/mach-versal/include/mach/hardware.h
 create mode 100644 arch/arm/mach-versal/include/mach/sys_proto.h
 create mode 100644 board/xilinx/versal/MAINTAINERS
 create mode 100644 board/xilinx/versal/Makefile
 create mode 100644 board/xilinx/versal/board.c
 create mode 100644 configs/xilinx_versal_virt_defconfig
 create mode 100644 include/configs/xilinx_versal.h

-- 
1.9.1

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[U-Boot] [PATCH 51/53] armv8: ls1046aqds: add i2c QIXIS support for TFABOOT

2018-10-03 Thread Rajesh Bhagat
Adds i2c QIXIS support for TFABOOT, as IFC and QSPI
are muxed together.

Signed-off-by: Rajesh Bhagat 
---
 include/configs/ls1046aqds.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 1cb4ecfdb7..6f292a0af9 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -231,7 +231,8 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_NAND_U_BOOT_SIZE(768 << 10)
 #endif
 
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
+#if defined(CONFIG_TFABOOT) || \
+   defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_QIXIS_I2C_ACCESS
 #define CONFIG_SYS_I2C_EARLY_INIT
 #endif
-- 
2.17.1

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[U-Boot] [PATCH 41/53] armv8: ls1012afrwy: correct environment offset

2018-10-03 Thread Rajesh Bhagat
From: Pankit Garg 

Corrects the environment offset from 0x50 to 0x1D,
as per LS1012AFRWY flash layout.

Signed-off-by: Pankit Garg 
---
 include/configs/ls1012afrwy.h | 4 
 1 file changed, 4 deletions(-)

diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h
index 75ae329e11..dabb4904e1 100644
--- a/include/configs/ls1012afrwy.h
+++ b/include/configs/ls1012afrwy.h
@@ -31,11 +31,7 @@
 #endif
 
 #undef CONFIG_ENV_OFFSET
-#ifdef CONFIG_TFABOOT
-#define CONFIG_ENV_OFFSET  0x50
-#else
 #define CONFIG_ENV_OFFSET  0x1D
-#endif
 #undef FSL_QSPI_FLASH_SIZE
 #define FSL_QSPI_FLASH_SIZESZ_16M
 #undef CONFIG_ENV_SECT_SIZE
-- 
2.17.1

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[U-Boot] [PATCH 53/53] armv8: skip setenv if gd->env_addr is not default env.

2018-10-03 Thread Rajesh Bhagat
From: Pankit Garg 

Set mc and bootcmd env variables only when gd->env_addr is
default environment.

Signed-off-by: Rajesh Bhagat 
Signed-off-by: Pankit Garg 
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c | 15 +--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index cbf0f20332..b3063fa9a6 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -24,6 +24,11 @@
 #include 
 #endif
 #include 
+#ifdef CONFIG_TFABOOT
+#include 
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
 
 bool soc_has_dp_ddr(void)
 {
@@ -800,8 +805,14 @@ int board_late_init(void)
fsl_setenv_chain_of_trust();
 #endif
 #ifdef CONFIG_TFABOOT
-   fsl_setenv_bootcmd();
-   fsl_setenv_mcinitcmd();
+   /*
+* check if gd->env_addr is default_environment; then setenv bootcmd
+* and mcinitcmd
+*/
+   if (gd->env_addr + gd->reloc_off == (ulong)_environment[0]) {
+   fsl_setenv_bootcmd();
+   fsl_setenv_mcinitcmd();
+   }
 #endif
 #ifdef CONFIG_QSPI_AHB_INIT
qspi_ahb_init();
-- 
2.17.1

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[U-Boot] [PATCH 28/53] armv8: layerscape: secure boot support for environment selection

2018-10-03 Thread Rajesh Bhagat
Add secure boot support for environment selection.

Signed-off-by: Pankit Garg 
Signed-off-by: Rajesh Bhagat 
---
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 1ab4d93638..063a8fea55 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -33,6 +33,9 @@
 
 #ifdef CONFIG_TFABOOT
 #include 
+#ifdef CONFIG_CHAIN_OF_TRUST
+#include 
+#endif
 #endif
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -738,6 +741,14 @@ enum env_location env_get_location(enum env_operation op, 
int prio)
if (prio)
return ENVL_UNKNOWN;
 
+#ifdef CONFIG_CHAIN_OF_TRUST
+   /* Check Boot Mode
+* If Boot Mode is Secure, return ENVL_NOWHERE
+*/
+   if (fsl_check_boot_mode_secure() == 1)
+   goto done;
+#endif
+
switch (src) {
case BOOT_SOURCE_IFC_NOR:
env_loc = ENVL_FLASH;
@@ -765,6 +776,9 @@ enum env_location env_get_location(enum env_operation op, 
int prio)
break;
}
 
+#ifdef CONFIG_CHAIN_OF_TRUST
+done:
+#endif
 
return env_loc;
 }
-- 
2.17.1

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[U-Boot] xzwrite

2018-10-03 Thread Dell Green
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[U-Boot] [PATCH 31/53] armv8: ls1043ardb: Add TFABOOT defconfig for secure boot

2018-10-03 Thread Rajesh Bhagat
From: Vinitha V Pillai 

This defconfig is for Secure TFABOOT, to be loaded by trusted firmware

Signed-off-by: Vinitha V Pillai 
---
 configs/ls1043ardb_ram_SECURE_BOOT_defconfig | 51 
 1 file changed, 51 insertions(+)
 create mode 100644 configs/ls1043ardb_ram_SECURE_BOOT_defconfig

diff --git a/configs/ls1043ardb_ram_SECURE_BOOT_defconfig 
b/configs/ls1043ardb_ram_SECURE_BOOT_defconfig
new file mode 100644
index 00..71adda87f1
--- /dev/null
+++ b/configs/ls1043ardb_ram_SECURE_BOOT_defconfig
@@ -0,0 +1,51 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1043ARDB=y
+CONFIG_SYS_TEXT_BASE=0x8200
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
+CONFIG_SECURE_BOOT=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_TFABOOT=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 
mtdparts=6000.nor:2m@0x10(nor_bank0_uboot),40m@0x110(nor_bank0_fit),7m(nor_bank0_user),2m@0x410(nor_bank4_uboot),40m@0x510(nor_bank4_fit),-(nor_bank4_user);7e80.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+CONFIG_MISC_INIT_R=y
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
+CONFIG_MP=y
+CONFIG_MTDPARTS_DEFAULT="mtdparts=6000.nor:2m@0x10(nor_bank0_uboot),40m@0x110(nor_bank0_fit),7m(nor_bank0_user),2m@0x410(nor_bank4_uboot),40m@0x510(nor_bank4_fit),-(nor_bank4_user);7e80.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_FSL_ESDHC=y
+CONFIG_FSL_CAAM=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
+CONFIG_E1000=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_RSA_SOFTWARE_EXP=y
-- 
2.17.1

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[U-Boot] [PATCH 36/53] armv8: ls1012aqds: Add TFABOOT defconfig for secure boot

2018-10-03 Thread Rajesh Bhagat
From: Vinitha V Pillai 

This defconfig is for Secure TFABOOT, to be loaded by trusted firmware

Signed-off-by: Vinitha V Pillai 
---
 configs/ls1012aqds_ram_SECURE_BOOT_defconfig | 65 
 1 file changed, 65 insertions(+)
 create mode 100644 configs/ls1012aqds_ram_SECURE_BOOT_defconfig

diff --git a/configs/ls1012aqds_ram_SECURE_BOOT_defconfig 
b/configs/ls1012aqds_ram_SECURE_BOOT_defconfig
new file mode 100644
index 00..8087825bec
--- /dev/null
+++ b/configs/ls1012aqds_ram_SECURE_BOOT_defconfig
@@ -0,0 +1,65 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1012AQDS=y
+CONFIG_SECURE_BOOT=y
+CONFIG_SYS_TEXT_BASE=0x8200
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_QSPI_AHB_INIT=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_TFABOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 quiet lpj=25"
+# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_EEPROM=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_SCSI_AHCI=y
+# CONFIG_BLK is not set
+CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_FSL_PFE=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SCSI=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_DSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_RSA=y
+CONFIG_RSA_SOFTWARE_EXP=y
-- 
2.17.1

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[U-Boot] [PATCH 32/53] armv8: ls1043aqds: Add TFABOOT defconfig for secure boot

2018-10-03 Thread Rajesh Bhagat
From: Vinitha V Pillai 

This defconfig is for Secure TFABOOT, to be loaded by trusted firmware

Signed-off-by: Vinitha V Pillai 
---
 configs/ls1043aqds_ram_SECURE_BOOT_defconfig | 58 
 1 file changed, 58 insertions(+)
 create mode 100644 configs/ls1043aqds_ram_SECURE_BOOT_defconfig

diff --git a/configs/ls1043aqds_ram_SECURE_BOOT_defconfig 
b/configs/ls1043aqds_ram_SECURE_BOOT_defconfig
new file mode 100644
index 00..268be5df83
--- /dev/null
+++ b/configs/ls1043aqds_ram_SECURE_BOOT_defconfig
@@ -0,0 +1,58 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1043AQDS=y
+CONFIG_SYS_TEXT_BASE=0x8200
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_SECURE_BOOT=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_TFABOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 
mtdparts=6000.nor:2m@0x10(nor_bank0_uboot),40m@0x110(nor_bank0_fit),7m(nor_bank0_user),2m@0x410(nor_bank4_uboot),40m@0x510(nor_bank4_fit),-(nor_bank4_user);7e80.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
+CONFIG_MP=y
+CONFIG_MTDPARTS_DEFAULT="mtdparts=6000.nor:2m@0x10(nor_bank0_uboot),40m@0x110(nor_bank0_fit),7m(nor_bank0_user),2m@0x410(nor_bank4_uboot),40m@0x510(nor_bank4_fit),-(nor_bank4_user);7e80.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_DM=y
+CONFIG_FSL_ESDHC=y
+CONFIG_FSL_CAAM=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_SPI_FLASH=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_RSA_SOFTWARE_EXP=y
-- 
2.17.1

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[U-Boot] [PATCH 38/53] armv8: ls1012aqds: Make U-Boot EL2 safe

2018-10-03 Thread Rajesh Bhagat
When U-Boot boots from EL2, skip some lowlevel init code for CCI-400
requiring EL3.

These initialization tasks are carried out before U-Boot runs.

Signed-off-by: Rajesh Bhagat 
Signed-off-by: York Sun 
---
 board/freescale/ls1012aqds/ls1012aqds.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/board/freescale/ls1012aqds/ls1012aqds.c 
b/board/freescale/ls1012aqds/ls1012aqds.c
index 7582f5e430..1187bd130e 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -120,8 +120,9 @@ int board_init(void)
 
/* Set CCI-400 control override register to enable barrier
 * transaction */
-   out_le32(>ctrl_ord,
-CCI400_CTRLORD_EN_BARRIER);
+   if (current_el() == 3)
+   out_le32(>ctrl_ord,
+CCI400_CTRLORD_EN_BARRIER);
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_A010315
erratum_a010315();
-- 
2.17.1

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[U-Boot] [PATCH 18/53] armv8: ls1043a: make FMAN and QE address common

2018-10-03 Thread Rajesh Bhagat
CONFIG_SYS_FMAN_FW_ADDR and CONFIG_SYS_QE_FW_ADDR made common
to support all boot sources.

Signed-off-by: Pankit Garg 
Signed-off-by: Rajesh Bhagat 
---
 include/configs/ls1043a_common.h | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 80676487ae..e8b6657b83 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -190,6 +190,16 @@
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_SYS_FM_MURAM_SIZE   0x6
 
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_FMAN_FW_ADDR0x90
+#define CONFIG_SYS_QE_FW_ADDR  0x94
+
+#define CONFIG_ENV_SPI_BUS 0
+#define CONFIG_ENV_SPI_CS  0
+#define CONFIG_ENV_SPI_MAX_HZ  100
+#define CONFIG_ENV_SPI_MODE0x03
+
+#else
 #ifdef CONFIG_NAND_BOOT
 /* Store Fman ucode at offeset 0x90(72 blocks). */
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
@@ -216,6 +226,7 @@
 #define CONFIG_SYS_FMAN_FW_ADDR0x6090
 #define CONFIG_SYS_QE_FW_ADDR  0x6094
 #endif
+#endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x1
 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 #endif
-- 
2.17.1

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[U-Boot] [PATCH 40/53] armv8: fsl-layerscape: change tlb base from OCRAM to DDR in EL < 3

2018-10-03 Thread Rajesh Bhagat
From: Pankit Garg 

Change tlb base address from OCRAM to DDR when exception level is
less than 3.

Signed-off-by: Ruchika Gupta 
Signed-off-by: Pankit Garg 
---
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 024600c694..ca5329f25c 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -380,7 +380,10 @@ static inline void early_mmu_setup(void)
unsigned int el = current_el();
 
/* global data is already setup, no allocation yet */
-   gd->arch.tlb_addr = CONFIG_SYS_FSL_OCRAM_BASE;
+   if (el == 3)
+   gd->arch.tlb_addr = CONFIG_SYS_FSL_OCRAM_BASE;
+   else
+   gd->arch.tlb_addr = CONFIG_SYS_DDR_SDRAM_BASE;
gd->arch.tlb_fillptr = gd->arch.tlb_addr;
gd->arch.tlb_size = EARLY_PGTABLE_SIZE;
 
-- 
2.17.1

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[U-Boot] [PATCH 22/53] armv8: ls1012ardb: Add TFABOOT defconfig

2018-10-03 Thread Rajesh Bhagat
This defconfig is for TFABOOT, to be loaded by trusted firmware.

Signed-off-by: Rajesh Bhagat 
Signed-off-by: Pankit Garg 
---
 board/freescale/ls1012ardb/ls1012ardb.c | 11 +
 configs/ls1012ardb_ram_defconfig| 56 +
 include/configs/ls1012a_common.h|  6 ++-
 3 files changed, 72 insertions(+), 1 deletion(-)
 create mode 100644 configs/ls1012ardb_ram_defconfig

diff --git a/board/freescale/ls1012ardb/ls1012ardb.c 
b/board/freescale/ls1012ardb/ls1012ardb.c
index 888f8500d4..f59749b87c 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -87,8 +87,17 @@ int checkboard(void)
return 0;
 }
 
+#ifdef CONFIG_TFABOOT
 int dram_init(void)
 {
+   gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+
+   return 0;
+}
+#else
+int dram_init(void)
+{
+#ifndef CONFIG_TFABOOT
static const struct fsl_mmdc_info mparam = {
0x0518, /* mdctl */
0x00030035, /* mdpdc */
@@ -106,6 +115,7 @@ int dram_init(void)
};
 
mmdc_init();
+#endif
 
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
@@ -115,6 +125,7 @@ int dram_init(void)
 
return 0;
 }
+#endif
 
 
 int board_early_init_f(void)
diff --git a/configs/ls1012ardb_ram_defconfig b/configs/ls1012ardb_ram_defconfig
new file mode 100644
index 00..e594bd6b21
--- /dev/null
+++ b/configs/ls1012ardb_ram_defconfig
@@ -0,0 +1,56 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1012ARDB=y
+CONFIG_SYS_TEXT_BASE=0x8200
+CONFIG_QSPI_AHB_INIT=y
+CONFIG_TFABOOT=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 quiet lpj=25"
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+# CONFIG_BLK is not set
+CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_FSL_PFE=y
+CONFIG_DM_ETH=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_DSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 787adbc382..07998f7eee 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -16,7 +16,11 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_INIT_SP_ADDRCONFIG_SYS_TEXT_BASE
+#else
 #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_FSL_OCRAM_BASE + 
0xfff0)
+#endif
 #define CONFIG_SYS_LOAD_ADDR   (CONFIG_SYS_DDR_SDRAM_BASE + 0x1000)
 
 #define CONFIG_SYS_DDR_SDRAM_BASE  0x8000
@@ -34,7 +38,7 @@
 #define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + 128 * 1024)
 
 /*SPI device */
-#ifdef CONFIG_QSPI_BOOT
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_TFABOOT)
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
 #define CONFIG_SYS_FMAN_FW_ADDR0x400d
 #define CONFIG_ENV_SPI_BUS 0
-- 
2.17.1

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[U-Boot] [PATCH 29/53] armv8: layerscape: add SMC calls for DDR size and bank info.

2018-10-03 Thread Rajesh Bhagat
From: Pankit Garg 

Adds SMC calls for getting DDR size and bank info for TFABOOT.

Signed-off-by: Rajesh Bhagat 
Signed-off-by: Pankit Garg 
---
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   | 84 +++
 .../arm/include/asm/arch-fsl-layerscape/soc.h |  4 +
 board/freescale/ls1012aqds/ls1012aqds.c   |  4 +-
 board/freescale/ls1012ardb/ls1012ardb.c   |  4 +-
 board/freescale/ls1043aqds/ddr.c  | 14 +++-
 board/freescale/ls1043ardb/ddr.c  | 20 -
 board/freescale/ls1046aqds/ddr.c  | 14 +++-
 board/freescale/ls1046ardb/ddr.c  | 15 +++-
 8 files changed, 147 insertions(+), 12 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 063a8fea55..024600c694 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -1227,12 +1227,96 @@ phys_size_t get_effective_memsize(void)
return ea_size;
 }
 
+#ifdef CONFIG_TFABOOT
+phys_size_t tfa_get_dram_size(void)
+{
+   struct pt_regs regs;
+   phys_size_t dram_size = 0;
+
+   regs.regs[0] = SMC_DRAM_BANK_INFO;
+   regs.regs[1] = -1;
+
+   smc_call();
+   if (regs.regs[0])
+   return 0;
+
+   dram_size = regs.regs[1];
+   return dram_size;
+}
+
+static int tfa_dram_init_banksize(void)
+{
+   int i = 0, ret = 0;
+   struct pt_regs regs;
+   phys_size_t dram_size = tfa_get_dram_size();
+
+   debug("dram_size %llx\n", dram_size);
+
+   if (!dram_size)
+   return -EINVAL;
+
+   do {
+   regs.regs[0] = SMC_DRAM_BANK_INFO;
+   regs.regs[1] = i;
+
+   smc_call();
+   if (regs.regs[0]) {
+   ret = -EINVAL;
+   break;
+   }
+
+   debug("bank[%d]: start %lx, size %lx\n", i, regs.regs[1],
+ regs.regs[2]);
+   gd->bd->bi_dram[i].start = regs.regs[1];
+   gd->bd->bi_dram[i].size = regs.regs[2];
+
+   dram_size -= gd->bd->bi_dram[i].size;
+
+   i++;
+   } while (dram_size);
+
+   if (i > 0)
+   ret = 0;
+
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
+   /* Assign memory for MC */
+#ifdef CONFIG_SYS_DDR_BLOCK3_BASE
+   if (gd->bd->bi_dram[2].size >=
+   board_reserve_ram_top(gd->bd->bi_dram[2].size)) {
+   gd->arch.resv_ram = gd->bd->bi_dram[2].start +
+   gd->bd->bi_dram[2].size -
+   board_reserve_ram_top(gd->bd->bi_dram[2].size);
+   } else
+#endif
+   {
+   if (gd->bd->bi_dram[1].size >=
+   board_reserve_ram_top(gd->bd->bi_dram[1].size)) {
+   gd->arch.resv_ram = gd->bd->bi_dram[1].start +
+   gd->bd->bi_dram[1].size -
+   board_reserve_ram_top(gd->bd->bi_dram[1].size);
+   } else if (gd->bd->bi_dram[0].size >
+  board_reserve_ram_top(gd->bd->bi_dram[0].size)) {
+   gd->arch.resv_ram = gd->bd->bi_dram[0].start +
+   gd->bd->bi_dram[0].size -
+   board_reserve_ram_top(gd->bd->bi_dram[0].size);
+   }
+   }
+#endif /* CONFIG_FSL_MC_ENET */
+
+   return ret;
+}
+#endif
+
 int dram_init_banksize(void)
 {
 #ifdef CONFIG_SYS_DP_DDR_BASE_PHY
phys_size_t dp_ddr_size;
 #endif
 
+#ifdef CONFIG_TFABOOT
+   if (!tfa_dram_init_banksize())
+   return 0;
+#endif
/*
 * gd->ram_size has the total size of DDR memory, less reserved secure
 * memory. The DDR extends from low region to high region(s) presuming
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h 
b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index d327c7ba1f..ef228b6443 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -55,6 +55,10 @@ struct cpu_type {
{ .name = #n, .soc_ver = SVR_##v, .num_cores = (nc)}
 
 #ifdef CONFIG_TFABOOT
+#define SMC_DRAM_BANK_INFO (0xC200FF12)
+
+phys_size_t tfa_get_dram_size(void);
+
 enum boot_src {
BOOT_SOURCE_RESERVED = 0,
BOOT_SOURCE_IFC_NOR,
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c 
b/board/freescale/ls1012aqds/ls1012aqds.c
index f312200433..7582f5e430 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -58,7 +58,9 @@ int checkboard(void)
 #ifdef CONFIG_TFABOOT
 int dram_init(void)
 {
-   gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+   gd->ram_size = tfa_get_dram_size();
+   if (!gd->ram_size)
+   gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 
return 0;
 }
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c 
b/board/freescale/ls1012ardb/ls1012ardb.c
index f59749b87c..66554bcf6e 100644
--- 

[U-Boot] [PATCH 25/53] armv8: ls1012a: define BOOTCOMMAND for TFABOOT

2018-10-03 Thread Rajesh Bhagat
From: Pankit Garg 

Defines BOOTCOMMAND for TFABOOT configuration for
supported boot sources

Signed-off-by: Rajesh Bhagat 
Signed-off-by: Pankit Garg 
---
 include/configs/ls1012a2g5rdb.h  | 6 ++
 include/configs/ls1012a_common.h | 6 ++
 include/configs/ls1012afrdm.h| 5 +
 include/configs/ls1012afrwy.h| 6 ++
 include/configs/ls1012ardb.h | 6 ++
 5 files changed, 29 insertions(+)

diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h
index 71e4a8b427..cb329385d9 100644
--- a/include/configs/ls1012a2g5rdb.h
+++ b/include/configs/ls1012a2g5rdb.h
@@ -93,10 +93,16 @@
"bootm $load_addr#$board\0"
 
 #undef CONFIG_BOOTCOMMAND
+#ifdef CONFIG_TFABOOT
+#undef QSPI_NOR_BOOTCOMMAND
+#define QSPI_NOR_BOOTCOMMAND "pfe stop;run distro_bootcmd; run qspi_bootcmd; " 
\
+"env exists secureboot && esbc_halt;"
+#else
 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_BOOTCOMMAND "pfe stop;run distro_bootcmd; run qspi_bootcmd; " \
   "env exists secureboot && esbc_halt;"
 #endif
+#endif
 
 #define DEFAULT_PFE_MDIO_NAME "PFE_MDIO"
 #define DEFAULT_PFE_MDIO1_NAME "PFE_MDIO1"
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 8f1f63920e..324dba2b7e 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -114,9 +114,15 @@
"kernel_size=0x280\0"   \
 
 #undef CONFIG_BOOTCOMMAND
+#ifdef CONFIG_TFABOOT
+#define QSPI_NOR_BOOTCOMMAND   "pfe stop; sf probe 0:0; sf read $kernel_load "\
+   "$kernel_start $kernel_size && "\
+   "bootm $kernel_load"
+#else
 #define CONFIG_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\
"$kernel_start $kernel_size && "\
"bootm $kernel_load"
+#endif
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE  512 /* Console I/O Buffer Size */
diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h
index 7affabfdba..8c7d4e558d 100644
--- a/include/configs/ls1012afrdm.h
+++ b/include/configs/ls1012afrdm.h
@@ -65,7 +65,12 @@
"$kernel_addr $kernel_size && bootm $load_addr#$board\0"
 
 #undef CONFIG_BOOTCOMMAND
+#ifdef CONFIG_TFABOOT
+#undef QSPI_NOR_BOOTCOMMAND
+#define QSPI_NOR_BOOTCOMMAND "pfe stop;run distro_bootcmd;run qspi_bootcmd"
+#else
 #define CONFIG_BOOTCOMMAND "pfe stop;run distro_bootcmd;run qspi_bootcmd"
+#endif
 
 #define CONFIG_CMD_MEMINFO
 #define CONFIG_SYS_MEMTEST_START   0x8000
diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h
index ae85ec1e72..75ae329e11 100644
--- a/include/configs/ls1012afrwy.h
+++ b/include/configs/ls1012afrwy.h
@@ -123,8 +123,14 @@
"bootm $load_addr#$board\0"
 
 #undef CONFIG_BOOTCOMMAND
+#ifdef CONFIG_TFABOOT
+#undef QSPI_NOR_BOOTCOMMAND
+#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run sd_bootcmd; "\
+"env exists secureboot && esbc_halt;"
+#else
 #define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run sd_bootcmd; "\
   "env exists secureboot && esbc_halt;"
+#endif
 #define CONFIG_CMD_MEMINFO
 #define CONFIG_CMD_MEMTEST
 #define CONFIG_SYS_MEMTEST_START   0x8000
diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index 17554ea955..f149a604cf 100644
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -112,8 +112,14 @@
"bootm $load_addr#$board\0"
 
 #undef CONFIG_BOOTCOMMAND
+#ifdef CONFIG_TFABOOT
+#undef QSPI_NOR_BOOTCOMMAND
+#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; 
"\
+"env exists secureboot && esbc_halt;"
+#else
 #define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
   "env exists secureboot && esbc_halt;"
+#endif
 
 #include 
 
-- 
2.17.1

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[U-Boot] [PATCH 49/53] armv8: fsl-layerscape: Update parsing boot source

2018-10-03 Thread Rajesh Bhagat
From: York Sun 

Workaround of erratum A010539 clears the RCW source field in PORSR1
register, causing failure of detecting boot source using this method.
Use SMC call if U-Boot runs at EL2. If SMC is not implemented or
running at EL3, continue to read PORSR1 and presume QSPI as boot
source if erratum workaround A010539 is enabled and RCW source is
cleared.

Signed-off-by: York Sun 
---
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c   | 26 ---
 .../arm/include/asm/arch-fsl-layerscape/soc.h |  1 +
 2 files changed, 23 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index ca5329f25c..2e3494bee4 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -693,23 +693,41 @@ enum boot_src __get_boot_src(u32 porsr1)
}
}
 #endif
+
+   if (CONFIG_IS_ENABLED(SYS_FSL_ERRATUM_A010539) && !rcw_src)
+   src = BOOT_SOURCE_QSPI_NOR;
+
debug("%s: src 0x%x\n", __func__, src);
return src;
 }
 
 enum boot_src get_boot_src(void)
 {
-   u32 porsr1;
+   struct pt_regs regs;
+   u32 porsr1 = 0;
 
 #if defined(CONFIG_FSL_LSCH3)
u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
-
-   porsr1 = in_le32(dcfg_ccsr + DCFG_PORSR1 / 4);
 #elif defined(CONFIG_FSL_LSCH2)
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+#endif
+
+   if (current_el() == 2) {
+   regs.regs[0] = SIP_SVC_RCW;
 
-   porsr1 = in_be32(>porsr1);
+   smc_call();
+   if (!regs.regs[0])
+   porsr1 = regs.regs[1];
+   }
+
+   if (current_el() == 3 || !porsr1) {
+#ifdef CONFIG_FSL_LSCH3
+   porsr1 = in_le32(dcfg_ccsr + DCFG_PORSR1 / 4);
+#elif defined(CONFIG_FSL_LSCH2)
+   porsr1 = in_be32(>porsr1);
 #endif
+   }
+
debug("%s: porsr1 0x%x\n", __func__, porsr1);
 
return __get_boot_src(porsr1);
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h 
b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index ef228b6443..daa1c70b3a 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -56,6 +56,7 @@ struct cpu_type {
 
 #ifdef CONFIG_TFABOOT
 #define SMC_DRAM_BANK_INFO (0xC200FF12)
+#define SIP_SVC_RCW0xC200FF18
 
 phys_size_t tfa_get_dram_size(void);
 
-- 
2.17.1

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[U-Boot] [PATCH 52/53] armv8: fsl-layerscape: add support of MC framework for TFA.

2018-10-03 Thread Rajesh Bhagat
From: Pankit Garg 

Add support of MC framework for TFA
Make MC framework independent of boot source.

Signed-off-by: Rajesh Bhagat 
Signed-off-by: Pankit Garg 
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c | 49 +
 1 file changed, 49 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 1e701c58df..cbf0f20332 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -743,6 +743,54 @@ int fsl_setenv_bootcmd(void)
}
return 0;
 }
+
+int fsl_setenv_mcinitcmd(void)
+{
+   int ret = 0;
+   enum boot_src src = get_boot_src();
+
+   switch (src) {
+#ifdef IFC_MC_INIT_CMD
+   case BOOT_SOURCE_IFC_NAND:
+   case BOOT_SOURCE_IFC_NOR:
+   ret = env_set("mcinitcmd", IFC_MC_INIT_CMD);
+   break;
+#endif
+#ifdef QSPI_MC_INIT_CMD
+   case BOOT_SOURCE_QSPI_NAND:
+   case BOOT_SOURCE_QSPI_NOR:
+   ret = env_set("mcinitcmd", QSPI_MC_INIT_CMD);
+   break;
+#endif
+#ifdef XSPI_MC_INIT_CMD
+   case BOOT_SOURCE_XSPI_NAND:
+   case BOOT_SOURCE_XSPI_NOR:
+   ret = env_set("mcinitcmd", XSPI_MC_INIT_CMD);
+   break;
+#endif
+#ifdef SD_MC_INIT_CMD
+   case BOOT_SOURCE_SD_MMC:
+   ret = env_set("mcinitcmd", SD_MC_INIT_CMD);
+   break;
+#endif
+#ifdef SD2_MC_INIT_CMD
+   case BOOT_SOURCE_SD_MMC2:
+   ret = env_set("mcinitcmd", SD2_MC_INIT_CMD);
+   break;
+#endif
+   default:
+#ifdef QSPI_MC_INIT_CMD
+   ret = env_set("mcinitcmd", QSPI_MC_INIT_CMD);
+#endif
+   break;
+   }
+
+   if (ret) {
+   printf("Failed to set mcinitcmd: ret = %d\n", ret);
+   return ret;
+   }
+   return 0;
+}
 #endif
 
 #ifdef CONFIG_BOARD_LATE_INIT
@@ -753,6 +801,7 @@ int board_late_init(void)
 #endif
 #ifdef CONFIG_TFABOOT
fsl_setenv_bootcmd();
+   fsl_setenv_mcinitcmd();
 #endif
 #ifdef CONFIG_QSPI_AHB_INIT
qspi_ahb_init();
-- 
2.17.1

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[U-Boot] [PATCH 35/53] armv8: ls1012ardb: Add TFABOOT defconfig for secure boot

2018-10-03 Thread Rajesh Bhagat
From: Vinitha V Pillai 

This defconfig is for Secure TFABOOT, to be loaded by trusted firmware

Signed-off-by: Vinitha V Pillai 
---
 configs/ls1012ardb_ram_SECURE_BOOT_defconfig | 62 
 1 file changed, 62 insertions(+)
 create mode 100644 configs/ls1012ardb_ram_SECURE_BOOT_defconfig

diff --git a/configs/ls1012ardb_ram_SECURE_BOOT_defconfig 
b/configs/ls1012ardb_ram_SECURE_BOOT_defconfig
new file mode 100644
index 00..1161ae8d0f
--- /dev/null
+++ b/configs/ls1012ardb_ram_SECURE_BOOT_defconfig
@@ -0,0 +1,62 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1012ARDB=y
+CONFIG_SYS_TEXT_BASE=0x8200
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_SECURE_BOOT=y
+CONFIG_QSPI_AHB_INIT=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_TFABOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 quiet lpj=25"
+# CONFIG_USE_BOOTCOMMAND is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_SATA_CEVA=y
+# CONFIG_BLK is not set
+CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_SPI_FLASH=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_DM_ETH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_DM_SCSI=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_DSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_RSA=y
+CONFIG_RSA_SOFTWARE_EXP=y
-- 
2.17.1

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[U-Boot] [PATCH 43/53] driver/ifc: replace __ilog2 with LOG2 macro

2018-10-03 Thread Rajesh Bhagat
Replaces __ilog2 function call with LOG2 macro, required to
use macros in global variables.

Also, corrects the value passed in LOG2 for some PowerPC
platforms. Minimum value that can be configured is is 64K
for IFC IP.

Signed-off-by: Pankit Garg 
Signed-off-by: Rajesh Bhagat 
---
 include/configs/B4860QDS.h |  2 +-
 include/configs/T102xQDS.h |  2 +-
 include/configs/T1040QDS.h |  2 +-
 include/configs/T208xQDS.h |  2 +-
 include/configs/T4240QDS.h |  2 +-
 include/configs/T4240RDB.h |  2 +-
 include/fsl_ifc.h  | 10 +-
 7 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index c37864c139..be7ee8e433 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -286,7 +286,7 @@ unsigned long get_board_ddr_clk(void);
| CSPR_PORT_SIZE_8 \
| CSPR_MSEL_GPCM \
| CSPR_V)
-#define CONFIG_SYS_AMASK3  IFC_AMASK(4 * 1024)
+#define CONFIG_SYS_AMASK3  IFC_AMASK(64 * 1024)
 #define CONFIG_SYS_CSOR3   0x0
 /* QIXIS Timing parameters for IFC CS3 */
 #define CONFIG_SYS_CS3_FTIM0   (FTIM0_GPCM_TACSE(0x0e) | \
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 8a38c5e19c..e4a14792a2 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -299,7 +299,7 @@ unsigned long get_board_ddr_clk(void);
| CSPR_PORT_SIZE_8 \
| CSPR_MSEL_GPCM \
| CSPR_V)
-#define CONFIG_SYS_AMASK3  IFC_AMASK(4*1024)
+#define CONFIG_SYS_AMASK3  IFC_AMASK(64*1024)
 #define CONFIG_SYS_CSOR3   0x0
 /* QIXIS Timing parameters for IFC CS3 */
 #define CONFIG_SYS_CS3_FTIM0   (FTIM0_GPCM_TACSE(0x0e) | \
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index e890860b7e..0498d7891b 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -225,7 +225,7 @@ unsigned long get_board_ddr_clk(void);
| CSPR_PORT_SIZE_8 \
| CSPR_MSEL_GPCM \
| CSPR_V)
-#define CONFIG_SYS_AMASK3  IFC_AMASK(4*1024)
+#define CONFIG_SYS_AMASK3  IFC_AMASK(64*1024)
 #define CONFIG_SYS_CSOR3   0x0
 /* QIXIS Timing parameters for IFC CS3 */
 #define CONFIG_SYS_CS3_FTIM0   (FTIM0_GPCM_TACSE(0x0e) | \
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 7d9354b360..8d358c9285 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -275,7 +275,7 @@ unsigned long get_board_ddr_clk(void);
| CSPR_PORT_SIZE_8 \
| CSPR_MSEL_GPCM \
| CSPR_V)
-#define CONFIG_SYS_AMASK3  IFC_AMASK(4*1024)
+#define CONFIG_SYS_AMASK3  IFC_AMASK(64*1024)
 #define CONFIG_SYS_CSOR3   0x0
 /* QIXIS Timing parameters for IFC CS3 */
 #define CONFIG_SYS_CS3_FTIM0   (FTIM0_GPCM_TACSE(0x0e) | \
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index f85881fc3c..0b469b1477 100644
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -201,7 +201,7 @@ unsigned long get_board_ddr_clk(void);
| CSPR_PORT_SIZE_8 \
| CSPR_MSEL_GPCM \
| CSPR_V)
-#define CONFIG_SYS_AMASK3  IFC_AMASK(4*1024)
+#define CONFIG_SYS_AMASK3  IFC_AMASK(64*1024)
 #define CONFIG_SYS_CSOR3   0x0
 /* QIXIS Timing parameters for IFC CS3 */
 #define CONFIG_SYS_CS3_FTIM0   (FTIM0_GPCM_TACSE(0x0e) | \
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 9d8834a3be..27bd145b52 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -470,7 +470,7 @@ unsigned long get_board_ddr_clk(void);
| CSPR_MSEL_GPCM \
| CSPR_V)
 
-#define CONFIG_SYS_AMASK3  IFC_AMASK(4*1024)
+#define CONFIG_SYS_AMASK3  IFC_AMASK(64*1024)
 #define CONFIG_SYS_CSOR3   0x0
 
 /* CPLD Timing parameters for IFC CS3 */
diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h
index 8120ca0de8..17697c7341 100644
--- a/include/fsl_ifc.h
+++ b/include/fsl_ifc.h
@@ -70,7 +70,7 @@
 #define IFC_AMASK_MASK 0x
 #define IFC_AMASK_SHIFT16
 #define IFC_AMASK(n)   (IFC_AMASK_MASK << \
-   (__ilog2(n) - IFC_AMASK_SHIFT))
+   (LOG2(n) - IFC_AMASK_SHIFT))
 
 /*
  * Chip Select Option Register IFC_NAND Machine
@@ -111,7 +111,7 @@
 /* Pages Per Block */
 #define CSOR_NAND_PB_MASK  0x0700
 #define CSOR_NAND_PB_SHIFT 8
-#define CSOR_NAND_PB(n)((__ilog2(n) - 5) << CSOR_NAND_PB_SHIFT)
+#define CSOR_NAND_PB(n)

[U-Boot] [PATCH 46/53] armv8: ls1043ardb: make IFC params common and dynamic

2018-10-03 Thread Rajesh Bhagat
From: Pankit Garg 

Makes IFC paramteres common and dynamic for all boot source.

Signed-off-by: Pankit Garg 
Signed-off-by: Rajesh Bhagat 
---
 board/freescale/ls1043ardb/ls1043ardb.c | 98 +
 include/configs/ls1043ardb.h| 20 +
 2 files changed, 118 insertions(+)

diff --git a/board/freescale/ls1043ardb/ls1043ardb.c 
b/board/freescale/ls1043ardb/ls1043ardb.c
index aa266557ba..cbbf9a0ec0 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -26,6 +26,104 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_TFABOOT
+struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
+   {
+   "nor",
+   CONFIG_SYS_NOR_CSPR,
+   CONFIG_SYS_NOR_CSPR_EXT,
+   CONFIG_SYS_NOR_AMASK,
+   CONFIG_SYS_NOR_CSOR,
+   {
+   CONFIG_SYS_NOR_FTIM0,
+   CONFIG_SYS_NOR_FTIM1,
+   CONFIG_SYS_NOR_FTIM2,
+   CONFIG_SYS_NOR_FTIM3
+   },
+
+   },
+   {
+   "nand",
+   CONFIG_SYS_NAND_CSPR,
+   CONFIG_SYS_NAND_CSPR_EXT,
+   CONFIG_SYS_NAND_AMASK,
+   CONFIG_SYS_NAND_CSOR,
+   {
+   CONFIG_SYS_NAND_FTIM0,
+   CONFIG_SYS_NAND_FTIM1,
+   CONFIG_SYS_NAND_FTIM2,
+   CONFIG_SYS_NAND_FTIM3
+   },
+   },
+   {
+   "cpld",
+   CONFIG_SYS_CPLD_CSPR,
+   CONFIG_SYS_CPLD_CSPR_EXT,
+   CONFIG_SYS_CPLD_AMASK,
+   CONFIG_SYS_CPLD_CSOR,
+   {
+   CONFIG_SYS_CPLD_FTIM0,
+   CONFIG_SYS_CPLD_FTIM1,
+   CONFIG_SYS_CPLD_FTIM2,
+   CONFIG_SYS_CPLD_FTIM3
+   },
+   }
+};
+
+struct ifc_regs ifc_cfg_nand_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
+   {
+   "nand",
+   CONFIG_SYS_NAND_CSPR,
+   CONFIG_SYS_NAND_CSPR_EXT,
+   CONFIG_SYS_NAND_AMASK,
+   CONFIG_SYS_NAND_CSOR,
+   {
+   CONFIG_SYS_NAND_FTIM0,
+   CONFIG_SYS_NAND_FTIM1,
+   CONFIG_SYS_NAND_FTIM2,
+   CONFIG_SYS_NAND_FTIM3
+   },
+   },
+   {
+   "nor",
+   CONFIG_SYS_NOR_CSPR,
+   CONFIG_SYS_NOR_CSPR_EXT,
+   CONFIG_SYS_NOR_AMASK,
+   CONFIG_SYS_NOR_CSOR,
+   {
+   CONFIG_SYS_NOR_FTIM0,
+   CONFIG_SYS_NOR_FTIM1,
+   CONFIG_SYS_NOR_FTIM2,
+   CONFIG_SYS_NOR_FTIM3
+   },
+   },
+   {
+   "cpld",
+   CONFIG_SYS_CPLD_CSPR,
+   CONFIG_SYS_CPLD_CSPR_EXT,
+   CONFIG_SYS_CPLD_AMASK,
+   CONFIG_SYS_CPLD_CSOR,
+   {
+   CONFIG_SYS_CPLD_FTIM0,
+   CONFIG_SYS_CPLD_FTIM1,
+   CONFIG_SYS_CPLD_FTIM2,
+   CONFIG_SYS_CPLD_FTIM3
+   },
+   }
+};
+
+void ifc_cfg_boot_info(struct ifc_regs_info *regs_info)
+{
+   enum boot_src src = get_boot_src();
+
+   if (src == BOOT_SOURCE_IFC_NAND)
+   regs_info->regs = ifc_cfg_nand_boot;
+   else
+   regs_info->regs = ifc_cfg_nor_boot;
+   regs_info->cs_size = CONFIG_SYS_FSL_IFC_BANK_COUNT;
+}
+
+#endif
 int board_early_init_f(void)
 {
fsl_lsch2_early_init_f();
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index bd56cbd8aa..704ecd734a 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -162,6 +162,25 @@
 #define CONFIG_SYS_CPLD_FTIM3  0x0
 
 /* IFC Timing Params */
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_CSPR0_EXT   CONFIG_SYS_NOR_CSPR_EXT
+#define CONFIG_SYS_CSPR0   CONFIG_SYS_NOR_CSPR
+#define CONFIG_SYS_AMASK0  CONFIG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0   CONFIG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0   CONFIG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1   CONFIG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2   CONFIG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3   CONFIG_SYS_NOR_FTIM3
+
+#define CONFIG_SYS_CSPR1_EXT   CONFIG_SYS_NAND_CSPR_EXT
+#define CONFIG_SYS_CSPR1   CONFIG_SYS_NAND_CSPR
+#define CONFIG_SYS_AMASK1  CONFIG_SYS_NAND_AMASK
+#define CONFIG_SYS_CSOR1   CONFIG_SYS_NAND_CSOR
+#define CONFIG_SYS_CS1_FTIM0   CONFIG_SYS_NAND_FTIM0
+#define CONFIG_SYS_CS1_FTIM1   CONFIG_SYS_NAND_FTIM1
+#define CONFIG_SYS_CS1_FTIM2   CONFIG_SYS_NAND_FTIM2
+#define CONFIG_SYS_CS1_FTIM3   CONFIG_SYS_NAND_FTIM3
+#else
 #ifdef 

[U-Boot] [PATCH 50/53] armv8: ls1043aqds: add i2c QIXIS support for TFABOOT

2018-10-03 Thread Rajesh Bhagat
Adds i2c QIXIS support for TFABOOT, as IFC and QSPI
are muxed together.

Signed-off-by: Rajesh Bhagat 
---
 include/configs/ls1043aqds.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 41bd4fc35c..ed07d9f28e 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -196,7 +196,8 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_NAND_U_BOOT_SIZE(640 << 10)
 #endif
 
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
+#if defined(CONFIG_TFABOOT) || \
+   defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_QIXIS_I2C_ACCESS
 #define CONFIG_SYS_I2C_EARLY_INIT
 #endif
-- 
2.17.1

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[U-Boot] [PATCH 42/53] armv8: sec_firmware: change el2_to_aarch32 SMC ID

2018-10-03 Thread Rajesh Bhagat
Changes the el2_to_aarch32 SMC ID from 0xc000ff04 to 0xc200ff17,
it is applicable to both TFA and non-TFA boot.

Signed-off-by: Rajesh Bhagat 
---
 arch/arm/cpu/armv8/sec_firmware_asm.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/sec_firmware_asm.S 
b/arch/arm/cpu/armv8/sec_firmware_asm.S
index 1c0f963e18..af1b2da072 100644
--- a/arch/arm/cpu/armv8/sec_firmware_asm.S
+++ b/arch/arm/cpu/armv8/sec_firmware_asm.S
@@ -68,7 +68,7 @@ ENTRY(armv8_el2_to_aarch32)
mov x3, x2
mov x2, x1
mov x1, x4
-   ldr x0, =0xc000ff04
+   ldr x0, =0xc200ff17
smc #0
ret
 ENDPROC(armv8_el2_to_aarch32)
-- 
2.17.1

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[U-Boot] [PATCH 48/53] armv8: ls1012a: fix ls1012aqds secure boot compilation

2018-10-03 Thread Rajesh Bhagat
From: Vinitha V Pillai 

Includes environment.h file in ls1012aqds.c Also, enables
pfe validation in ls1012ardb.

Signed-off-by: Vinitha V Pillai 
---
 board/freescale/ls1012aqds/Kconfig   | 10 ++
 board/freescale/ls1012aqds/ls1012aqds.c  |  6 ++
 board/freescale/ls1012ardb/Kconfig   |  4 
 configs/ls1012ardb_ram_SECURE_BOOT_defconfig |  1 +
 include/configs/ls1012aqds.h |  1 +
 5 files changed, 22 insertions(+)

diff --git a/board/freescale/ls1012aqds/Kconfig 
b/board/freescale/ls1012aqds/Kconfig
index b702fb2740..8844557aae 100644
--- a/board/freescale/ls1012aqds/Kconfig
+++ b/board/freescale/ls1012aqds/Kconfig
@@ -16,6 +16,12 @@ config SYS_LS_PPA_FW_ADDR
 hex "PPA Firmware Addr"
 default 0x4040
 
+if CHAIN_OF_TRUST
+config SYS_LS_PPA_ESBC_ADDR
+   hex "PPA Firmware HDR Addr"
+   default 0x4068
+endif
+
 if FSL_PFE
 
 config BOARD_SPECIFIC_OPTIONS # dummy
@@ -33,6 +39,10 @@ config SYS_LS_PFE_FW_ADDR
hex "Flash address of PFE firmware"
default 0x40a0
 
+config SYS_LS_PFE_ESBC_ADDR
+   hex "PFE Firmware HDR Addr"
+   default 0x4070
+
 config DDR_PFE_PHYS_BASEADDR
hex "PFE DDR physical base address"
default 0x0380
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c 
b/board/freescale/ls1012aqds/ls1012aqds.c
index 1187bd130e..a862fe6a93 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -18,12 +18,14 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include "../common/qixis.h"
 #include "ls1012aqds_qixis.h"
 #include "ls1012aqds_pfe.h"
@@ -132,6 +134,10 @@ int board_init(void)
gd->env_addr = (ulong)_environment[0];
 #endif
 
+#ifdef CONFIG_FSL_CAAM
+   sec_init();
+#endif
+
 #ifdef CONFIG_FSL_LS_PPA
ppa_init();
 #endif
diff --git a/board/freescale/ls1012ardb/Kconfig 
b/board/freescale/ls1012ardb/Kconfig
index 4cd66bd548..51efd0fa37 100644
--- a/board/freescale/ls1012ardb/Kconfig
+++ b/board/freescale/ls1012ardb/Kconfig
@@ -33,6 +33,10 @@ config SYS_LS_PFE_FW_ADDR
hex "Flash address of PFE firmware"
default 0x40a0
 
+config SYS_LS_PFE_ESBC_ADDR
+   hex "PFE Firmware HDR Addr"
+   default 0x4070
+
 config DDR_PFE_PHYS_BASEADDR
hex "PFE DDR physical base address"
default 0x0380
diff --git a/configs/ls1012ardb_ram_SECURE_BOOT_defconfig 
b/configs/ls1012ardb_ram_SECURE_BOOT_defconfig
index 1161ae8d0f..3754931702 100644
--- a/configs/ls1012ardb_ram_SECURE_BOOT_defconfig
+++ b/configs/ls1012ardb_ram_SECURE_BOOT_defconfig
@@ -44,6 +44,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_DM_ETH=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
+CONFIG_FSL_PFE=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index c5bdea6798..c76bfdc8f8 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -117,4 +117,5 @@
 #define CONFIG_SYS_MEMTEST_START   0x8000
 #define CONFIG_SYS_MEMTEST_END 0x9fff
 
+#include 
 #endif /* __LS1012AQDS_H__ */
-- 
2.17.1

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[U-Boot] [PATCH 19/53] armv8: fsl-layerscape: bootcmd identification for TFABOOT.

2018-10-03 Thread Rajesh Bhagat
From: Pankit Garg 

Adds bootcmd identificaton on basis on boot source, valid
in TFABOOT configuration.

Signed-off-by: Rajesh Bhagat 
Signed-off-by: Pankit Garg 
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c | 69 +
 1 file changed, 69 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 3f15cb08ff..1e701c58df 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -679,12 +679,81 @@ int qspi_ahb_init(void)
 }
 #endif
 
+#ifdef CONFIG_TFABOOT
+#define MAX_BOOTCMD_SIZE   256
+
+int fsl_setenv_bootcmd(void)
+{
+   int ret;
+   enum boot_src src = get_boot_src();
+   char bootcmd_str[MAX_BOOTCMD_SIZE];
+
+   switch (src) {
+#ifdef IFC_NOR_BOOTCOMMAND
+   case BOOT_SOURCE_IFC_NOR:
+   sprintf(bootcmd_str, IFC_NOR_BOOTCOMMAND);
+   break;
+#endif
+#ifdef QSPI_NOR_BOOTCOMMAND
+   case BOOT_SOURCE_QSPI_NOR:
+   sprintf(bootcmd_str, QSPI_NOR_BOOTCOMMAND);
+   break;
+#endif
+#ifdef XSPI_NOR_BOOTCOMMAND
+   case BOOT_SOURCE_XSPI_NOR:
+   sprintf(bootcmd_str, XSPI_NOR_BOOTCOMMAND);
+   break;
+#endif
+#ifdef IFC_NAND_BOOTCOMMAND
+   case BOOT_SOURCE_IFC_NAND:
+   sprintf(bootcmd_str, IFC_NAND_BOOTCOMMAND);
+   break;
+#endif
+#ifdef QSPI_NAND_BOOTCOMMAND
+   case BOOT_SOURCE_QSPI_NAND:
+   sprintf(bootcmd_str, QSPI_NAND_BOOTCOMMAND);
+   break;
+#endif
+#ifdef XSPI_NAND_BOOTCOMMAND
+   case BOOT_SOURCE_XSPI_NAND:
+   sprintf(bootcmd_str, XSPI_NAND_BOOTCOMMAND);
+   break;
+#endif
+#ifdef SD_BOOTCOMMAND
+   case BOOT_SOURCE_SD_MMC:
+   sprintf(bootcmd_str, SD_BOOTCOMMAND);
+   break;
+#endif
+#ifdef SD2_BOOTCOMMAND
+   case BOOT_SOURCE_SD_MMC2:
+   sprintf(bootcmd_str, SD2_BOOTCOMMAND);
+   break;
+#endif
+   default:
+#ifdef QSPI_NOR_BOOTCOMMAND
+   sprintf(bootcmd_str, QSPI_NOR_BOOTCOMMAND);
+#endif
+   break;
+   }
+
+   ret = env_set("bootcmd", bootcmd_str);
+   if (ret) {
+   printf("Failed to set bootcmd: ret = %d\n", ret);
+   return ret;
+   }
+   return 0;
+}
+#endif
+
 #ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
 {
 #ifdef CONFIG_CHAIN_OF_TRUST
fsl_setenv_chain_of_trust();
 #endif
+#ifdef CONFIG_TFABOOT
+   fsl_setenv_bootcmd();
+#endif
 #ifdef CONFIG_QSPI_AHB_INIT
qspi_ahb_init();
 #endif
-- 
2.17.1

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[U-Boot] [PATCH 26/53] armv8: layerscape: remove EL3 specific erratas for TFABOOT

2018-10-03 Thread Rajesh Bhagat
Removes EL3 specific erratas for TFABOOT, And now taken care in TFA.

ARM_ERRATA_855873, SYS_FSL_ERRATUM_A008850, SYS_FSL_ERRATUM_A008511,
SYS_FSL_ERRATUM_A008336, SYS_FSL_ERRATUM_A009663, SYS_FSL_ERRATUM_A009803
SYS_FSL_ERRATUM_A009942, SYS_FSL_ERRATUM_A010165

Signed-off-by: Rajesh Bhagat 
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 24 +++
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 9092757d1f..1872c66dcd 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -1,7 +1,7 @@
 config ARCH_LS1012A
bool
select ARMV8_SET_SMPEN
-   select ARM_ERRATA_855873
+   select ARM_ERRATA_855873 if !TFABOOT
select FSL_LSCH2
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
@@ -22,22 +22,22 @@ config ARCH_LS1012A
 config ARCH_LS1043A
bool
select ARMV8_SET_SMPEN
-   select ARM_ERRATA_855873
+   select ARM_ERRATA_855873 if !TFABOOT
select FSL_LSCH2
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR
select SYS_FSL_DDR_BE
select SYS_FSL_DDR_VER_50
-   select SYS_FSL_ERRATUM_A008850
+   select SYS_FSL_ERRATUM_A008850 if !TFABOOT
select SYS_FSL_ERRATUM_A008997
select SYS_FSL_ERRATUM_A009007
select SYS_FSL_ERRATUM_A009008
-   select SYS_FSL_ERRATUM_A009660
-   select SYS_FSL_ERRATUM_A009663
+   select SYS_FSL_ERRATUM_A009660 if !TFABOOT
+   select SYS_FSL_ERRATUM_A009663 if !TFABOOT
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A009929
-   select SYS_FSL_ERRATUM_A009942
+   select SYS_FSL_ERRATUM_A009942 if !TFABOOT
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_ERRATUM_A010539
select SYS_FSL_HAS_DDR3
@@ -62,17 +62,17 @@ config ARCH_LS1046A
select SYS_FSL_DDR
select SYS_FSL_DDR_BE
select SYS_FSL_DDR_VER_50
-   select SYS_FSL_ERRATUM_A008336
-   select SYS_FSL_ERRATUM_A008511
-   select SYS_FSL_ERRATUM_A008850
+   select SYS_FSL_ERRATUM_A008336 if !TFABOOT
+   select SYS_FSL_ERRATUM_A008511 if !TFABOOT
+   select SYS_FSL_ERRATUM_A008850 if !TFABOOT
select SYS_FSL_ERRATUM_A008997
select SYS_FSL_ERRATUM_A009007
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A009801
-   select SYS_FSL_ERRATUM_A009803
-   select SYS_FSL_ERRATUM_A009942
-   select SYS_FSL_ERRATUM_A010165
+   select SYS_FSL_ERRATUM_A009803 if !TFABOOT
+   select SYS_FSL_ERRATUM_A009942 if !TFABOOT
+   select SYS_FSL_ERRATUM_A010165 if !TFABOOT
select SYS_FSL_ERRATUM_A010539
select SYS_FSL_HAS_DDR4
select SYS_FSL_SRDS_2
-- 
2.17.1

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[U-Boot] [PATCH 34/53] armv8: ls1046aqds: Add TFABOOT defconfig for secure boot

2018-10-03 Thread Rajesh Bhagat
From: Vinitha V Pillai 

This defconfig is for Secure TFABOOT, to be loaded by trusted firmware

Signed-off-by: Vinitha V Pillai 
---
 configs/ls1046aqds_ram_SECURE_BOOT_defconfig | 58 
 1 file changed, 58 insertions(+)
 create mode 100644 configs/ls1046aqds_ram_SECURE_BOOT_defconfig

diff --git a/configs/ls1046aqds_ram_SECURE_BOOT_defconfig 
b/configs/ls1046aqds_ram_SECURE_BOOT_defconfig
new file mode 100644
index 00..1a20d0becf
--- /dev/null
+++ b/configs/ls1046aqds_ram_SECURE_BOOT_defconfig
@@ -0,0 +1,58 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1046AQDS=y
+CONFIG_SYS_TEXT_BASE=0x8200
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_SECURE_BOOT=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_TFABOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 
mtdparts=6000.nor:2m@0x10(nor_bank0_uboot),40m@0x110(nor_bank0_fit),7m(nor_bank0_user),2m@0x410(nor_bank4_uboot),40m@0x510(nor_bank4_fit),-(nor_bank4_user);7e80.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
+# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
+CONFIG_MP=y
+CONFIG_MTDPARTS_DEFAULT="mtdparts=6000.nor:2m@0x10(nor_bank0_uboot),40m@0x110(nor_bank0_fit),7m(nor_bank0_user),2m@0x410(nor_bank4_uboot),40m@0x510(nor_bank4_fit),-(nor_bank4_user);7e80.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_DM=y
+CONFIG_FSL_ESDHC=y
+CONFIG_FSL_CAAM=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_DSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_RSA=y
-- 
2.17.1

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[U-Boot] [PATCH 33/53] armv8: ls1046ardb: Add TFABOOT defconfig for secure boot

2018-10-03 Thread Rajesh Bhagat
From: Vinitha V Pillai 

This defconfig is for Secure TFABOOT, to be loaded by trusted firmware

Signed-off-by: Vinitha V Pillai 
---
 configs/ls1046ardb_ram_SECURE_BOOT_defconfig | 52 
 1 file changed, 52 insertions(+)
 create mode 100644 configs/ls1046ardb_ram_SECURE_BOOT_defconfig

diff --git a/configs/ls1046ardb_ram_SECURE_BOOT_defconfig 
b/configs/ls1046ardb_ram_SECURE_BOOT_defconfig
new file mode 100644
index 00..8102d13d7d
--- /dev/null
+++ b/configs/ls1046ardb_ram_SECURE_BOOT_defconfig
@@ -0,0 +1,52 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1046ARDB=y
+CONFIG_SYS_TEXT_BASE=0x8200
+CONFIG_SECURE_BOOT=y
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_QSPI_AHB_INIT=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_TFABOOT=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 
mtdparts=155.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e80.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
+CONFIG_MISC_INIT_R=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
+CONFIG_MP=y
+CONFIG_MTDPARTS_DEFAULT="mtdparts=155.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e80.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_FSL_CAAM=y
+CONFIG_FSL_ESDHC=y
+CONFIG_SPI_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_USB=y
+CONFIG_FSL_QSPI=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
+CONFIG_RSA=y
-- 
2.17.1

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[U-Boot] [PATCH 45/53] armv8: ls1046aqds: make IFC params common and dynamic

2018-10-03 Thread Rajesh Bhagat
From: Pankit Garg 

Makes IFC paramteres common and dynamic for all boot source.

Signed-off-by: Pankit Garg 
Signed-off-by: Rajesh Bhagat 
---
 board/freescale/ls1046aqds/ls1046aqds.c | 125 
 include/configs/ls1046aqds.h|  35 +++
 2 files changed, 160 insertions(+)

diff --git a/board/freescale/ls1046aqds/ls1046aqds.c 
b/board/freescale/ls1046aqds/ls1046aqds.c
index ae401a38eb..a966316be6 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -35,6 +35,131 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_TFABOOT
+struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
+   {
+   "nor0",
+   CONFIG_SYS_NOR0_CSPR,
+   CONFIG_SYS_NOR0_CSPR_EXT,
+   CONFIG_SYS_NOR_AMASK,
+   CONFIG_SYS_NOR_CSOR,
+   {
+   CONFIG_SYS_NOR_FTIM0,
+   CONFIG_SYS_NOR_FTIM1,
+   CONFIG_SYS_NOR_FTIM2,
+   CONFIG_SYS_NOR_FTIM3
+   },
+
+   },
+   {
+   "nor1",
+   CONFIG_SYS_NOR1_CSPR,
+   CONFIG_SYS_NOR1_CSPR_EXT,
+   CONFIG_SYS_NOR_AMASK,
+   CONFIG_SYS_NOR_CSOR,
+   {
+   CONFIG_SYS_NOR_FTIM0,
+   CONFIG_SYS_NOR_FTIM1,
+   CONFIG_SYS_NOR_FTIM2,
+   CONFIG_SYS_NOR_FTIM3
+   },
+   },
+   {
+   "nand",
+   CONFIG_SYS_NAND_CSPR,
+   CONFIG_SYS_NAND_CSPR_EXT,
+   CONFIG_SYS_NAND_AMASK,
+   CONFIG_SYS_NAND_CSOR,
+   {
+   CONFIG_SYS_NAND_FTIM0,
+   CONFIG_SYS_NAND_FTIM1,
+   CONFIG_SYS_NAND_FTIM2,
+   CONFIG_SYS_NAND_FTIM3
+   },
+   },
+   {
+   "fpga",
+   CONFIG_SYS_FPGA_CSPR,
+   CONFIG_SYS_FPGA_CSPR_EXT,
+   CONFIG_SYS_FPGA_AMASK,
+   CONFIG_SYS_FPGA_CSOR,
+   {
+   CONFIG_SYS_FPGA_FTIM0,
+   CONFIG_SYS_FPGA_FTIM1,
+   CONFIG_SYS_FPGA_FTIM2,
+   CONFIG_SYS_FPGA_FTIM3
+   },
+   }
+};
+
+struct ifc_regs ifc_cfg_nand_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
+   {
+   "nand",
+   CONFIG_SYS_NAND_CSPR,
+   CONFIG_SYS_NAND_CSPR_EXT,
+   CONFIG_SYS_NAND_AMASK,
+   CONFIG_SYS_NAND_CSOR,
+   {
+   CONFIG_SYS_NAND_FTIM0,
+   CONFIG_SYS_NAND_FTIM1,
+   CONFIG_SYS_NAND_FTIM2,
+   CONFIG_SYS_NAND_FTIM3
+   },
+   },
+   {
+   "nor0",
+   CONFIG_SYS_NOR0_CSPR,
+   CONFIG_SYS_NOR0_CSPR_EXT,
+   CONFIG_SYS_NOR_AMASK,
+   CONFIG_SYS_NOR_CSOR,
+   {
+   CONFIG_SYS_NOR_FTIM0,
+   CONFIG_SYS_NOR_FTIM1,
+   CONFIG_SYS_NOR_FTIM2,
+   CONFIG_SYS_NOR_FTIM3
+   },
+   },
+   {
+   "nor1",
+   CONFIG_SYS_NOR1_CSPR,
+   CONFIG_SYS_NOR1_CSPR_EXT,
+   CONFIG_SYS_NOR_AMASK,
+   CONFIG_SYS_NOR_CSOR,
+   {
+   CONFIG_SYS_NOR_FTIM0,
+   CONFIG_SYS_NOR_FTIM1,
+   CONFIG_SYS_NOR_FTIM2,
+   CONFIG_SYS_NOR_FTIM3
+   },
+   },
+   {
+   "fpga",
+   CONFIG_SYS_FPGA_CSPR,
+   CONFIG_SYS_FPGA_CSPR_EXT,
+   CONFIG_SYS_FPGA_AMASK,
+   CONFIG_SYS_FPGA_CSOR,
+   {
+   CONFIG_SYS_FPGA_FTIM0,
+   CONFIG_SYS_FPGA_FTIM1,
+   CONFIG_SYS_FPGA_FTIM2,
+   CONFIG_SYS_FPGA_FTIM3
+   },
+   }
+};
+
+void ifc_cfg_boot_info(struct ifc_regs_info *regs_info)
+{
+   enum boot_src src = get_boot_src();
+
+   if (src == BOOT_SOURCE_IFC_NAND)
+   regs_info->regs = ifc_cfg_nand_boot;
+   else
+   regs_info->regs = ifc_cfg_nor_boot;
+   regs_info->cs_size = CONFIG_SYS_FSL_IFC_BANK_COUNT;
+}
+
+#endif
+
 enum {
MUX_TYPE_GPIO,
 };
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 2a30cef0e4..1cb4ecfdb7 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -286,6 +286,40 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_FPGA_FTIM3  0x0
 #endif
 
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_CSPR0_EXT   CONFIG_SYS_NOR0_CSPR_EXT
+#define CONFIG_SYS_CSPR0   CONFIG_SYS_NOR0_CSPR
+#define CONFIG_SYS_AMASK0  

[U-Boot] [PATCH 23/53] armv8: ls1012aqds: Add TFABOOT defconfig

2018-10-03 Thread Rajesh Bhagat
This defconfig is for TFABOOT, to be loaded by trusted firmware.

Signed-off-by: Rajesh Bhagat 
Signed-off-by: Pankit Garg 
---
 board/freescale/ls1012aqds/ls1012aqds.c | 10 +++-
 configs/ls1012aqds_ram_defconfig| 62 +
 2 files changed, 71 insertions(+), 1 deletion(-)
 create mode 100644 configs/ls1012aqds_ram_defconfig

diff --git a/board/freescale/ls1012aqds/ls1012aqds.c 
b/board/freescale/ls1012aqds/ls1012aqds.c
index 7102237756..f312200433 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -55,6 +55,14 @@ int checkboard(void)
return 0;
 }
 
+#ifdef CONFIG_TFABOOT
+int dram_init(void)
+{
+   gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+
+   return 0;
+}
+#else
 int dram_init(void)
 {
static const struct fsl_mmdc_info mparam = {
@@ -74,7 +82,6 @@ int dram_init(void)
};
 
mmdc_init();
-
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
/* This will break-before-make MMU for DDR */
@@ -83,6 +90,7 @@ int dram_init(void)
 
return 0;
 }
+#endif
 
 int board_early_init_f(void)
 {
diff --git a/configs/ls1012aqds_ram_defconfig b/configs/ls1012aqds_ram_defconfig
new file mode 100644
index 00..39805ccf9e
--- /dev/null
+++ b/configs/ls1012aqds_ram_defconfig
@@ -0,0 +1,62 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1012AQDS=y
+CONFIG_SYS_TEXT_BASE=0x8200
+CONFIG_QSPI_AHB_INIT=y
+CONFIG_TFABOOT=y
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=2
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 quiet lpj=25"
+# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_EEPROM=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_DATE=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_SCSI_AHCI=y
+# CONFIG_BLK is not set
+CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_FSL_PFE=y
+CONFIG_DM_ETH=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_SCSI=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_DSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
-- 
2.17.1

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[U-Boot] [PATCH 17/53] armv8: ls1046a: make FMAN address common

2018-10-03 Thread Rajesh Bhagat
CONFIG_SYS_FMAN_FW_ADDR made common to support all boot sources.

Signed-off-by: Pankit Garg 
Signed-off-by: Rajesh Bhagat 
---
 include/configs/ls1046a_common.h | 8 
 1 file changed, 8 insertions(+)

diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index b6ec5bdf66..6e36c9339b 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -169,6 +169,13 @@
 #define CONFIG_SYS_FM_MURAM_SIZE   0x6
 #endif
 
+#ifdef CONFIG_TFABOOT
+#define CONFIG_SYS_FMAN_FW_ADDR0x90
+#define CONFIG_ENV_SPI_BUS 0
+#define CONFIG_ENV_SPI_CS  0
+#define CONFIG_ENV_SPI_MAX_HZ  100
+#define CONFIG_ENV_SPI_MODE0x03
+#else
 #ifdef CONFIG_SD_BOOT
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image 
is
@@ -191,6 +198,7 @@
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
 #define CONFIG_SYS_FMAN_FW_ADDR0x6090
 #endif
+#endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x1
 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 #endif
-- 
2.17.1

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