Re: [U-Boot] [PATCH v2] rockchip: rk3288-evb: dts: remove 'vmmc' from emmc node
Hi Tom, On 12/07/2018 10:13 PM, Tom Rini wrote: > On Fri, Dec 07, 2018 at 02:24:22PM +0100, Philipp Tomsich wrote: >> Kever, >> >>> On 07.12.2018, at 02:39, Kever Yang wrote: >>> >>> Hi Philipp, >>> >>> On 12/06/2018 09:50 PM, Philipp Tomsich wrote: +Tom > On 05.12.2018, at 03:25, Kever Yang wrote: > > The U-Boot eMMC does not need to care about the power for Rockchip > SoC, because if the board is using eMMC, the power will default on > (for bootrom), and we do not do power management for it like kernel, > so the 'vmmc', 'vqmmc' is only useful for SD in U-Boot. > > This make U-Boot can boot into kernel even if the pmic driver is > broken. If the PMIC driver is broken, we should fix the PMIC driver. I would feel more comfortable w/o this statement. > The rk3288-evb dts may be used in many boards using rockchip reference > schematic but with little change, so we hope it can be more robust to > boot into next stage. Again, this is not how the DTS should be used. I believe that Heiko, Fabio and I had already highlighted this in comments to the earlier thread. >>> Not sure if you have read my previous mail for answer all your comments, >>> >>> I do agree DTS should represent the hardware, but please note that the DTS >>> is no kind of standard, and people always choose what they need and add >>> those part in there dts, but not always add all the property and >>> everyone use the same model. I would say there are many boards does not >>> have this >>> 'vmmc-supply’ in there emmc node. >> That is exactly the reason why I bumped the decision up the stairs (to Tom >> and/or >> Simon): what you are saying makes sense to me (viewed through your eyes and >> from your specific usecase), but it directly contradicts how the DTS usage >> is intended. >> >> In other words: Tom (as the top-level decision maker) or Simon (who owns the >> device-model and therefore will also have an opinion on DTS usage) should >> make >> the final call. > My answer is that I would strongly suspect that over in linux "we have N > different close-enough boards using this one DTS" isn't acceptable. You > make a dtsi and include it from the board and things that aren't common > don't go into the dtsi. And yes, when starting off everyone (myself > included) copies the reference platform dts and then changes it as > needed, and sometimes misses a thing or two. But no, I don't think we > want a wrong dts and I'm pretty sure the kernel really wouldn't want > wrong dts files and the general goal is that excluding the -u-boot.dtsi > files, ours are copies of the kernel. I don't think this is a "wrong dts" after my patch, these two nodes are not mark as required property in kernel, so many dts emmc node does not have it. I check the latest kernel dtsi in arch/arm/boot/dts/rk3288-evb.dtsi [1], the emmc node do not have 'vmmc' and 'vqmmc' while the SD node have, which just like description in my commit message. Well, I don't know why U-Boot project is so difficult to accept a reasonable patch now, I don't want to make you unhappy, but make 'every board must have its own dts' in U-Boot to make every developer to join U-Boot does not make sense to me. The kernel need different dts for different board because they need to use/control those different feature, but U-Boot is not the case, U-Boot should work if the storage driver works. Thanks, - Kever [1] https://github.com/torvalds/linux/blob/master/arch/arm/boot/dts/rk3288-evb.dtsi#L208 > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] boot.bin on SD Card for SAMA5D3 Xplained
On Thu, Dec 06, 2018 at 08:02:19AM +, eugen.hris...@microchip.com wrote: > > > On 05.12.2018 22:38, Robert Nelson wrote: > > On Wed, Dec 5, 2018 at 8:37 AM wrote: > >> > >> > >> > >> On 05.12.2018 02:15, Daniel Evans wrote: > >>> Trying to get uboot SPL boot.bin to run on an SD card for the sama5d3 > >>> xplained board. All I get is RomBOOT and no other messages. I have > >>> tried throwing in a couple test pins to toggle in board_early_init_f but > >>> still not getting any debug. I can get at91bootstrap to produce a > >>> boot.bin that works on the sama5d3 xplained so I am assuming I don’t have > >>> a bad board. My boot partition is FAT16. To compile I just run the > >>> following on Debian Buster : > >>> > >>> make mrproper > >>> make sama5d3_xplained_mmc_defconfig > >>> make > >>> > >>> Cross Compiler is gcc-linaro-6.4.1-2018.05-x86_64_arm-linux-gnueabihf > >>> > >>> When finished compiling I just copy the boot.bin to my BOOT partition. > >>> > >>> Has to be something obvious that I am missing. Any insight is > >>> appreciated… > >> > >> Hello, > >> > >> Check the datasheet for sama5d3 SoC section 11.4.3. - Valid code > >> detection (my datasheet is dated 2 Feb 2016 if it helps) > >> > >> Basically the vector 6 needs to have hardcoded the binary size. Are you > >> doing that ? Otherwise the RomBOOT code will consider your binary as > >> faulty. > >> > >> PS. make sure endianess is right, use a good hexeditor... > >> > >> Hope this helps, > >> Eugen > > > > Okay, just finished my git bisect, this turned out to be a miss-placed > > #endif when Wenyou did the "configs: at91: Remove > > CONFIG_SYS_EXTRA_OPTIONS assignment" patch: > > > > https://github.com/u-boot/u-boot/commit/5541543f686b43210fb92181003ff7175d4ab036#diff-651b6ffe22be4df459343a0d6d25154e > > Interesting find, is this wrongly done for all the boards in the commit > or just sama5d3_xplained ? > > Feel free to submit a patch if this fixes the issue, and we will review it. > > Thanks ! > Would this be an acceptable alternative? ---8<--- --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -166,10 +166,12 @@ ifeq ($(CONFIG_SYS_SOC),"at91") MKIMAGEFLAGS_boot.bin = -T atmelimage ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y) +ifneq ($(CONFIG_SD_BOOT),y) MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params) boot.bin: $(obj)/../tools/atmel_pmecc_params endif +endif boot.bin: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkimage) ---8<--- It guards the modification of 'boot.bin' at the build location. Also, as Kconfig items are cleaned-up, the guard will still hold. I can submit a proper patch, if this is reasonable. Derald > > > > > => RomBOOT > > > > U-Boot spl 2019.01-rc1-00021-g2e2a2a5d4f-dirty (Dec 05 2018 - 14:30:22 > > -0600) > > Trying to boot from MMC1 > > > > > > U-Boot 2019.01-rc1-00021-g2e2a2a5d4f-dirty (Dec 05 2018 - 14:30:22 -0600) > > > > > > > > diff --git a/include/configs/sama5d3_xplained.h > > b/include/configs/sama5d3_xplained.h > > index d0d8087ca3..f87713319d 100644 > > --- a/include/configs/sama5d3_xplained.h > > +++ b/include/configs/sama5d3_xplained.h > > @@ -80,7 +80,6 @@ > > #elif CONFIG_NAND_BOOT > > #define CONFIG_SPL_NAND_DRIVERS > > #define CONFIG_SPL_NAND_BASE > > -#endif > > #define CONFIG_SYS_NAND_U_BOOT_OFFS0x4 > > #define CONFIG_SYS_NAND_5_ADDR_CYCLE > > #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 > > @@ -91,3 +90,5 @@ > > #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > > > #endif > > + > > +#endif > > > > Before: > > #ifdef CONFIG_SYS_USE_MMC > > #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 > > #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" > > > > #elif CONFIG_SYS_USE_NANDFLASH > > #define CONFIG_SPL_NAND_DRIVERS > > #define CONFIG_SPL_NAND_BASE > > #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4 > > #define CONFIG_SYS_NAND_5_ADDR_CYCLE > > #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 > > #define CONFIG_SYS_NAND_PAGE_COUNT 64 > > #define CONFIG_SYS_NAND_OOBSIZE 64 > > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x2 > > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > > > #endif > > > > After: > > #ifdef CONFIG_SD_BOOT > > #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 > > #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" > > > > #elif CONFIG_NAND_BOOT > > #define CONFIG_SPL_NAND_DRIVERS > > #define CONFIG_SPL_NAND_BASE > > #endif > > <- WHY HERE > > #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4 > > #define CONFIG_SYS_NAND_5_ADDR_CYCLE > > #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 > > #define CONFIG_SYS_NAND_PAGE_COUNT 64 > > #define CONFIG_SYS_NAND_OOBSIZE 64 > > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x2 > > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > #define
[U-Boot] [PATCHv2 2/3] test: Only descend into test/ when CONFIG_UNIT_TEST is enabled
The contents of the test subdirectories only make sense when we have CONFIG_UNIT_TEST set. We will otherwise attempt to build code on for example sandbox that needs CONFIG_UNIT_TEST otherwise and rather than complicate the Makefiles simply leave them out when we can. Signed-off-by: Tom Rini --- Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 0d11ff97971a..02326bea5f64 100644 --- a/Makefile +++ b/Makefile @@ -725,8 +725,7 @@ libs-y += common/ libs-y += env/ libs-$(CONFIG_API) += api/ libs-$(CONFIG_HAS_POST) += post/ -libs-y += test/ -libs-y += test/dm/ +libs-$(CONFIG_UNIT_TEST) += test/ test/dm/ libs-$(CONFIG_UT_ENV) += test/env/ libs-$(CONFIG_UT_OVERLAY) += test/overlay/ -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCHv2 3/3] tools: add a generic config for native tools building
From: Otavio Salvador The motivation for this is to allow distributions to distribute all possible tools in a generic way, avoiding the need of specific tools building for each machine. Especially on OpenEmbedded / Yocto Project ecosystem, it is very common each BSP to end providing their specific tools when they need to generate images for some SoC (e.g MX23 / MX28 in meta-freescale case). Using this, we can package the tools doing: $: make tools-only_defconfig $: make tools-only Signed-off-by: Otavio Salvador [trini: Add MAINTAINERS entry for myself, add to .travis.yml, make U-Boot itself buildable to not trip up other frameworks] Signed-off-by: Tom Rini --- .travis.yml | 4 MAINTAINERS | 1 + configs/tools-only_defconfig | 24 tools/Makefile | 2 +- 4 files changed, 30 insertions(+), 1 deletion(-) create mode 100644 configs/tools-only_defconfig diff --git a/.travis.yml b/.travis.yml index ed07d817fa47..f43a272b3231 100644 --- a/.travis.yml +++ b/.travis.yml @@ -332,6 +332,10 @@ matrix: - name: "sloccount" script: - sloccount . +# Ensure host tools build +- name: "Build tools-only" + script: +- make tools-only_config tools-only -j$(nproc) # test/py - name: "test/py sandbox" diff --git a/MAINTAINERS b/MAINTAINERS index 0cec39c542db..0fb089807c57 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -719,5 +719,6 @@ L: u-boot@lists.denx.de Q: http://patchwork.ozlabs.org/project/uboot/list/ S: Maintained T: git git://git.denx.de/u-boot.git +F: configs/tools-only_defconfig F: * F: */ diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig new file mode 100644 index ..fb0607678541 --- /dev/null +++ b/configs/tools-only_defconfig @@ -0,0 +1,24 @@ +CONFIG_SYS_TEXT_BASE=0 +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_DATE is not set +CONFIG_OF_CONTROL=y +CONFIG_OF_HOSTFILE=y +CONFIG_DEFAULT_DEVICE_TREE="sandbox" +# CONFIG_UDP_FUNCTION_FASTBOOT is not set +CONFIG_SANDBOX_GPIO=y +CONFIG_DM_I2C_COMPAT=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_PCI_SANDBOX=y +CONFIG_DM_RTC=y +CONFIG_SOUND=y +CONFIG_SYSRESET=y +# CONFIG_VIRTIO_MMIO is not set +# CONFIG_VIRTIO_PCI is not set +# CONFIG_VIRTIO_SANDBOX is not set +# CONFIG_EFI_LOADER is not set diff --git a/tools/Makefile b/tools/Makefile index c93d17a42fdf..29ff6ed221b1 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -125,7 +125,7 @@ fit_info-objs := $(dumpimage-mkimage-objs) fit_info.o fit_check_sign-objs := $(dumpimage-mkimage-objs) fit_check_sign.o file2include-objs := file2include.o -ifneq ($(CONFIG_MX23)$(CONFIG_MX28),) +ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_FIT_SIGNATURE),) # Add CONFIG_MXS into host CFLAGS, so we can check whether or not register # the mxsimage support within tools/mxsimage.c . HOSTCFLAGS_mxsimage.o += -DCONFIG_MXS -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCHv2 1/3] cmd: Move the "dm" command from test/dm/ to cmd/
The "dm" command under CONFIG_CMD_DM should live under cmd/ rather than
test/dm/ so move it.
Signed-off-by: Tom Rini
---
cmd/Makefile | 1 +
cmd/dm.c | 88
test/dm/Makefile | 1 -
test/dm/cmd_dm.c | 88
4 files changed, 89 insertions(+), 89 deletions(-)
create mode 100644 cmd/dm.c
delete mode 100644 test/dm/cmd_dm.c
diff --git a/cmd/Makefile b/cmd/Makefile
index 49986437ba58..15ae4d250f50 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -40,6 +40,7 @@ obj-$(CONFIG_CMD_CPU) += cpu.o
obj-$(CONFIG_DATAFLASH_MMC_SELECT) += dataflash_mmc_mux.o
obj-$(CONFIG_CMD_DATE) += date.o
obj-$(CONFIG_CMD_DEMO) += demo.o
+obj-$(CONFIG_CMD_DM) += dm.o
obj-$(CONFIG_CMD_SOUND) += sound.o
ifdef CONFIG_POST
obj-$(CONFIG_CMD_DIAG) += diag.o
diff --git a/cmd/dm.c b/cmd/dm.c
new file mode 100644
index ..7b271db0bbe7
--- /dev/null
+++ b/cmd/dm.c
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2013 Google, Inc
+ *
+ * (C) Copyright 2012
+ * Marek Vasut
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static int do_dm_dump_all(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ dm_dump_all();
+
+ return 0;
+}
+
+static int do_dm_dump_uclass(cmd_tbl_t *cmdtp, int flag, int argc,
+char * const argv[])
+{
+ dm_dump_uclass();
+
+ return 0;
+}
+
+static int do_dm_dump_devres(cmd_tbl_t *cmdtp, int flag, int argc,
+char * const argv[])
+{
+ dm_dump_devres();
+
+ return 0;
+}
+
+static cmd_tbl_t test_commands[] = {
+ U_BOOT_CMD_MKENT(tree, 0, 1, do_dm_dump_all, "", ""),
+ U_BOOT_CMD_MKENT(uclass, 1, 1, do_dm_dump_uclass, "", ""),
+ U_BOOT_CMD_MKENT(devres, 1, 1, do_dm_dump_devres, "", ""),
+};
+
+static __maybe_unused void dm_reloc(void)
+{
+ static int relocated;
+
+ if (!relocated) {
+ fixup_cmdtable(test_commands, ARRAY_SIZE(test_commands));
+ relocated = 1;
+ }
+}
+
+static int do_dm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ cmd_tbl_t *test_cmd;
+ int ret;
+
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+ dm_reloc();
+#endif
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+ test_cmd = find_cmd_tbl(argv[1], test_commands,
+ ARRAY_SIZE(test_commands));
+ argc -= 2;
+ argv += 2;
+ if (!test_cmd || argc > test_cmd->maxargs)
+ return CMD_RET_USAGE;
+
+ ret = test_cmd->cmd(test_cmd, flag, argc, argv);
+
+ return cmd_process_error(test_cmd, ret);
+}
+
+U_BOOT_CMD(
+ dm, 3, 1, do_dm,
+ "Driver model low level access",
+ "tree Dump driver model tree ('*' = activated)\n"
+ "dm uclassDump list of instances for each uclass\n"
+ "dm devresDump list of device resources for each device"
+);
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 2c9081e4dd66..42f1d81a33d2 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -2,7 +2,6 @@
#
# Copyright (c) 2013 Google, Inc
-obj-$(CONFIG_CMD_DM) += cmd_dm.o
obj-$(CONFIG_UT_DM) += bus.o
obj-$(CONFIG_UT_DM) += test-driver.o
obj-$(CONFIG_UT_DM) += test-fdt.o
diff --git a/test/dm/cmd_dm.c b/test/dm/cmd_dm.c
deleted file mode 100644
index 7b271db0bbe7..
--- a/test/dm/cmd_dm.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2013 Google, Inc
- *
- * (C) Copyright 2012
- * Marek Vasut
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-static int do_dm_dump_all(cmd_tbl_t *cmdtp, int flag, int argc,
- char * const argv[])
-{
- dm_dump_all();
-
- return 0;
-}
-
-static int do_dm_dump_uclass(cmd_tbl_t *cmdtp, int flag, int argc,
-char * const argv[])
-{
- dm_dump_uclass();
-
- return 0;
-}
-
-static int do_dm_dump_devres(cmd_tbl_t *cmdtp, int flag, int argc,
-char * const argv[])
-{
- dm_dump_devres();
-
- return 0;
-}
-
-static cmd_tbl_t test_commands[] = {
- U_BOOT_CMD_MKENT(tree, 0, 1, do_dm_dump_all, "", ""),
- U_BOOT_CMD_MKENT(uclass, 1, 1, do_dm_dump_uclass, "", ""),
- U_BOOT_CMD_MKENT(devres, 1, 1, do_dm_dump_devres, "", ""),
-};
-
-static __maybe_unused void dm_reloc(void)
-{
- static int relocated;
-
- if (!relocated) {
- fixup_cmdtable(test_commands, ARRAY_SIZE(test_commands));
- relocated = 1;
- }
-}
-
-static int do_dm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- cmd_tbl_t *test_cmd;
- int ret;
-
-#ifdef CONFIG_NEEDS_MANUAL_RELOC
- dm_reloc();
-#endif
-
-
[U-Boot] [PATCH] ARM: omap3logic: Remove legacy USB code in favor of DM_USB
With the defconfig options enabling DM_USB, the legacy code
can be removed.
Signed-off-by: Adam Ford
diff --git a/board/logicpd/omap3som/omap3logic.c
b/board/logicpd/omap3som/omap3logic.c
index 691d38fdf2..144e6f68a4 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -164,61 +164,6 @@ void spl_board_prepare_for_linux(void)
}
#endif
-#if !CONFIG_IS_ENABLED(DM_USB)
-#ifdef CONFIG_USB_MUSB_OMAP2PLUS
-static struct musb_hdrc_config musb_config = {
- .multipoint = 1,
- .dyn_fifo = 1,
- .num_eps= 16,
- .ram_bits = 12,
-};
-
-static struct omap_musb_board_data musb_board_data = {
- .interface_type = MUSB_INTERFACE_ULPI,
-};
-
-static struct musb_hdrc_platform_data musb_plat = {
-#if defined(CONFIG_USB_MUSB_HOST)
- .mode = MUSB_HOST,
-#elif defined(CONFIG_USB_MUSB_GADGET)
- .mode = MUSB_PERIPHERAL,
-#else
-#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
-#endif
- .config = _config,
- .power = 100,
- .platform_ops = _ops,
- .board_data = _board_data,
-};
-#endif
-
-#if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD)
-/* Call usb_stop() before starting the kernel */
-void show_boot_progress(int val)
-{
- if (val == BOOTSTAGE_ID_RUN_OS)
- usb_stop();
-}
-
-static struct omap_usbhs_board_data usbhs_bdata = {
- .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
- .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
- .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
-};
-
-int ehci_hcd_init(int index, enum usb_init_type init,
- struct ehci_hccr **hccr, struct ehci_hcor **hcor)
-{
- return omap_ehci_hcd_init(index, _bdata, hccr, hcor);
-}
-
-int ehci_hcd_stop(int index)
-{
- return omap_ehci_hcd_stop();
-}
-
-#endif /* CONFIG_USB_EHCI_HCD */
-#endif /* !DM_USB*/
/*
* Routine: misc_init_r
* Description: Configure board specific parts
@@ -227,12 +172,6 @@ int misc_init_r(void)
{
twl4030_power_init();
omap_die_id_display();
-
-#if !CONFIG_IS_ENABLED(DM_USB)
-#ifdef CONFIG_USB_MUSB_OMAP2PLUS
- musb_register(_plat, _board_data, (void *)MUSB_BASE);
-#endif
-#endif
return 0;
}
--
2.17.1
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[U-Boot] [PATCH] imx: hab: Convert non-NULL IVT DCD pointer warning to an error
The following NXP application notes and manual recommend to ensure the
IVT DCD pointer is Null prior to calling HAB API authenticate_image()
function:
- AN12263: HABv4 RVT Guidelines and Recommendations
- AN4581: Secure Boot on i.MX50, i.MX53, i.MX 6 and i.MX7 Series using
HABv4
- CST docs: High Assurance Boot Version 4 Application Programming
Interface Reference Manual
Commit ca89df7dd46f ("imx: hab: Convert DCD non-NULL error to warning")
converted DCD non-NULL error to warning due to the lack of documentation
at the time of first patch submission. We have warned U-Boot users since
v2018.03, and it makes sense now to follow the NXP recommendation to
ensure the IVT DCD pointer is Null.
DCD commands should only be present in the initial boot image loaded by
the SoC ROM. Starting in HAB v4.3.7 the HAB code will generate an error
if a DCD pointer is present in an image being authenticated by calling the
HAB RVT API. Older versions of HAB will process and run DCD if it is
present, and this could lead to an incorrect authentication boot flow.
Signed-off-by: Breno Lima
---
arch/arm/mach-imx/hab.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c
index b88acd13da..e07076c726 100644
--- a/arch/arm/mach-imx/hab.c
+++ b/arch/arm/mach-imx/hab.c
@@ -560,8 +560,10 @@ int imx_hab_authenticate_image(uint32_t ddr_start,
uint32_t image_size,
}
/* Verify if IVT DCD pointer is NULL */
- if (ivt->dcd)
- puts("Warning: DCD pointer should be NULL\n");
+ if (ivt->dcd) {
+ puts("Error: DCD pointer must be NULL\n");
+ goto hab_authentication_exit;
+ }
start = ddr_start;
bytes = image_size;
--
2.17.1
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Re: [U-Boot] [PATCH v2] pcm058: fix NAND flash not using badblock table
Hello Stefano, On Fri, 2018-12-07 at 19:55 +0100, Stefano Babic wrote: > Hi Harald, > > On 07/12/18 13:18, Marek Vasut wrote: > > On 12/07/2018 01:15 PM, Harald Seiler wrote: > > > Hello Marek, > > > > Hi, > > > > > On Fri, 2018-12-07 at 12:48 +0100, Marek Vasut wrote: > > > > On 12/07/2018 10:19 AM, Harald Seiler wrote: > > > > > Currently, U-Boot ignores the BBT stored in the last 4 blocks of NAND > > > > > flash because the NAND_BBT_USE_FLASH flag is not set. This leads to > > > > > two issues: > > > > > > > > > > * U-Boot silently uses a memory-only BBT which is initialized with all > > > > > blocks marked as good. This means, actual bad blocks are marked > > > > > good > > > > > and U-Boot might try writing to or reading from them. > > > > > * The BBT in flash, which will be created once Linux boots up, is not > > > > > off limits for a driver ontop, like UBI. While it does not seem to > > > > > consistently produce an error, sometimes UBI will fail to attach > > > > > because the BBT blocks obviously don't contain valid UBI data. > > > > > > > > > > To fix this, this patch sets the CONFIG_SYS_NAND_USE_FLASH_BBT option, > > > > > which is used in ./drivers/mtd/nand/raw/mxs_nand.c to decide whether > > > > > a BBT in flash is used. > > > > > > > > > > Signed-off-by: Harald Seiler > > > > > > > > V2 Changelog is missing. > > > > > > > > > --- > > > > > include/configs/pcm058.h | 1 + > > > > > 1 file changed, 1 insertion(+) > > > > > > > > > > diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h > > > > > index 49048c163f..b9bc08b388 100644 > > > > > --- a/include/configs/pcm058.h > > > > > +++ b/include/configs/pcm058.h > > > > > @@ -55,6 +55,7 @@ > > > > > #define CONFIG_SYS_NAND_BASE 0x4000 > > > > > #define CONFIG_SYS_NAND_5_ADDR_CYCLE > > > > > #define CONFIG_SYS_NAND_ONFI_DETECTION > > > > > +#define CONFIG_SYS_NAND_USE_FLASH_BBT > > > > > > > > Shouldn't this be enabled on all boards with GPMI NAND ? > > > > > > > > > > I looked at other boards and they all defined this config, so I > > > assumed this was the way to go ... > > Let me understand. If Isearch for CONFIG_NAND_MXS, I get 27 boards using > this drivers, with different SOC (mx28, mx6[Dual|Quad|Solo], mx6sx, > mx6ull). But none of them is setting CONFIG_SYS_NAND_USE_FLASH_BBT. > > When does it happen the issue ? It should happen if we create a UBI > container and its volumes in U-Boot. If UBI is generated in linux, this > should not happen. Is it the case or does it happen in any condition ? Linux will write the badblock table to the last 4 blocks by default which U-Boot ignores at the moment. So the issue happens if you use the default kernel config (which you pointed out below). > I think the issue happens because there is a disalignment between kernel > and u-boot. Kernel mainline for this board (file > imx6qdl-phytec-phycore-som.dtsi) sets "nand-on-flash-bbt", while U-Boot > not. That mean that this can always happen if kernel and U-Boot does not > use the same setup for the driver. > > Maybe with previous kernel versions there was no problem because Linux > used the same setup as U-Boot. This is exactly what I think is going on ... > Anyway, this discourage setting CONFIG_SYS_NAND_USE_FLASH_BBT > unconditionally for all boards with GPMI driver. > I agree, it only makes sense in cases where Linux also does it this way. Although, not doing it this way means not having any persistent badblock table at all, which I feel is never a good idea ... > > But yes, as far as I understand, > > > it would make sense to have it enabled most of the time. Although > > > there is some code which makes this configuration from the > > > devicetree, which might be an even better solution. > > Device tree has already this option as I see in > drivers/mtd/nand/raw/nand_base.c. The driver enforces this if no DT (as > in this case) is used. What do you mean by enforce? If no devicetree is used, the code does not set any flags as far as I understand it, which also aligns with the results of my experimentation ... (Currently bbt_options is 0) > > Cool, if this can be fixed in a more general manner, that'd be awesome > > and would help others too. Better yet, it'd get rid of possibly > > hazardous duplication. Can you research it ? > > > > Best regards, > Stefano > -- Harald DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-62 Fax: +49-8142-66989-80 Email: h...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Pull request: u-boot-sunxi/master
Hi Tom, Please pull this PR. thanks, Jagan. The following changes since commit 57dbc151437b36cc1105857d222df28b095236d7: rockchip: rk3399: Add MAINTAINERS entry (2018-12-06 10:24:12 -0500) are available in the Git repository at: git://git.denx.de/u-boot-sunxi.git master for you to fetch changes up to 8a6121ea078347de017c833e131eb4a806cf0c51: sunxi: update README.sunxi64 (2018-12-07 22:30:19 +0530) Andre Przywara (1): sunxi: update README.sunxi64 Olliver Schinagl (8): sunxi: board: Print error after power initialization fails sunxi: pmic_bus: Decrease boot time by not writing duplicate data power: axp209: Use BIT() macro power: axp209: Define the chip version mask power: axp209: Reduce magic values by adding defines for LDO[234] power: axp209: Add support for voltage rate control on LDO3 power: axp209: Limit inrush current for broken boards arm: sunxi: Reduce inrush current on Olimex OLinuXino-A20-Lime2 Priit Laes (1): arm: sunxi: Reduce inrush current on Olimex OLinuXino-A20-Lime2-eMMC arch/arm/mach-sunxi/pmic_bus.c | 6 +++ board/sunxi/README.sunxi64 | 25 --- board/sunxi/board.c| 18 configs/A20-OLinuXino-Lime2-eMMC_defconfig | 2 + configs/A20-OLinuXino-Lime2_defconfig | 2 + drivers/power/Kconfig | 43 ++ drivers/power/axp209.c | 66 +++- include/axp209.h | 70 +++--- 8 files changed, 191 insertions(+), 41 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] ARM: omap3_logic/omap35_logic: Move to DM_USB
The existing config is setup as a gadget but it doesn't use DM_USB. This patch converts all boards to DM_USB, but as host. As host, it is able to mount USB drives and browse them. Signed-off-by: Adam Ford diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index 80219eeacf..82ddaa3a2b 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_OMAP3_LOGIC=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_ANDROID_BOOT_IMAGE=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y @@ -34,8 +35,6 @@ CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-35xx-devkit" # CONFIG_ENV_IS_IN_FAT is not set CONFIG_ENV_IS_IN_NAND=y CONFIG_SPL_DM=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x8200 CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y @@ -59,14 +58,10 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_OMAP3_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y +# CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y -CONFIG_USB_MUSB_GADGET=y +CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_OMAP2PLUS=y CONFIG_TWL4030_USB=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="TI" -CONFIG_USB_GADGET_VENDOR_NUM=0x0451 -CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 -CONFIG_USB_ETHER=y CONFIG_BCH=y -# CONFIG_SPL_OF_LIBFDT is not set diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 8a8c7147c3..94f86efe28 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_OMAP3_LOGIC=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_ANDROID_BOOT_IMAGE=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y @@ -34,8 +35,6 @@ CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-35xx-devkit" # CONFIG_ENV_IS_IN_FAT is not set CONFIG_ENV_IS_IN_NAND=y CONFIG_SPL_DM=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x8200 CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y @@ -65,14 +64,10 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_OMAP3_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y +# CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y -CONFIG_USB_MUSB_GADGET=y +CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_OMAP2PLUS=y CONFIG_TWL4030_USB=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="TI" -CONFIG_USB_GADGET_VENDOR_NUM=0x0451 -CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 -CONFIG_USB_ETHER=y CONFIG_BCH=y -# CONFIG_SPL_OF_LIBFDT is not set diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index 969387a37c..3d8d7d1c50 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_OMAP3_LOGIC=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_ANDROID_BOOT_IMAGE=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y @@ -34,8 +35,6 @@ CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-37xx-devkit" # CONFIG_ENV_IS_IN_FAT is not set CONFIG_ENV_IS_IN_NAND=y CONFIG_SPL_DM=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x8200 CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y @@ -60,14 +59,10 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_OMAP3_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y +# CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y -CONFIG_USB_MUSB_GADGET=y +CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_OMAP2PLUS=y CONFIG_TWL4030_USB=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="TI" -CONFIG_USB_GADGET_VENDOR_NUM=0x0451 -CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 -CONFIG_USB_ETHER=y CONFIG_BCH=y -# CONFIG_SPL_OF_LIBFDT is not set diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index 396543e56b..c30c43bbda 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_OMAP3_LOGIC=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_ANDROID_BOOT_IMAGE=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y @@ -33,8 +34,6 @@ CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-37xx-devkit" # CONFIG_ENV_IS_IN_FAT is not set CONFIG_ENV_IS_IN_NAND=y CONFIG_SPL_DM=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x8200 CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y @@ -65,14 +64,10 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_OMAP3_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y +# CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y -CONFIG_USB_MUSB_GADGET=y +CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_OMAP2PLUS=y CONFIG_TWL4030_USB=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="TI" -CONFIG_USB_GADGET_VENDOR_NUM=0x0451 -CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 -CONFIG_USB_ETHER=y CONFIG_BCH=y -# CONFIG_SPL_OF_LIBFDT is not set -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de
Re: [U-Boot] ARM: DTS: Resync am3517-evm.dts with Linux 4.20
On Mon, Dec 03, 2018 at 08:06:28AM -0600, Adam Ford wrote: > The DTS file for the AM3517 had the incorrect CD polarity. Resync with > the fixed DTS file from Linux. > > Signed-off-by: Adam Ford > > diff --git a/arch/arm/dts/am3517-evm-ui.dtsi b/arch/arm/dts/am3517-evm-ui.dtsi > new file mode 100644 > index 00..e841918c1c Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] travis: Bump ARC tools to arc-2018.09
On Mon, Dec 03, 2018 at 05:09:13PM +0300, Alexey Brodkin wrote: > Build tested in Travis, see: > https://travis-ci.org/abrodkin/u-boot/jobs/462808237 > > Signed-off-by: Alexey Brodkin Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] ARM: DTS: Resync LogicPD SOM-LV with Linux 4.20
On Mon, Dec 03, 2018 at 08:15:59AM -0600, Adam Ford wrote: > There have been a few fixes to the device trees, so this > re-syncs the dts/dtsi files with Linux > > Signed-off-by: Adam Ford > > diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts > b/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts > index 4cd72b5e61..32d0dc371f 100644 Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] ensure active menuitem is inside menu
On Mon, Dec 03, 2018 at 11:23:41AM +0100, Frank Wunderlich wrote: > Hi, > > setting active menuitem currently can be outside of menu which results in > invisible selection > > attached Patch fixes this > > regards Frank > > >From 1d9c4cb8b3e2dd9b0a7a6a2d4a21684d0a099dbf Mon Sep 17 00:00:00 2001 > From: Frank Wunderlich > Date: Sun, 2 Dec 2018 11:23:53 +0100 > Subject: [PATCH] ensure active menuitem is inside menu > > if active menuitem is defined via environment var it can be outside the menu > (>=menuitem-count) > > this patch resets this definition back to 0 > > Signed-off-by: Frank Wunderlich Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 3/5] gpio: stm32f7: Move STM32_GPIOS_PER_BANK into gpio.h
On Mon, Dec 03, 2018 at 10:52:52AM +0100, Patrice Chotard wrote: > To allow access to this define by other driver, move > it into gpio.h > > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] arm: dts: am33xx: Sync dts with Linux 4.20.0
On Wed, Dec 05, 2018 at 02:53:42PM +0100, Felix Brack wrote: > This patch synchronizes the am33xx SoC specific files with those from > Linux 4.20.0. Hence all board maintainers of am33xx based boards are > on the cc list. > The main purpose of this patch is to prevent further diverging of the > dts files from U-Boot and those from Linux. It aims to set the stage > for the synchronization of board specific dts files. Example: I'm the > maintainer of the PDU001 board: once this patch is applied successfully > I will make changes to the board specific dts file in Linux only and > then post a patch with a copy of this exact dts file to U-Boot. This > will make U-Boot and Linux remain in sync. > The stumbling block of https://patchwork.ozlabs.org/patch/943627 was > removed by the patch https://patchwork.ozlabs.org/patch/962428 from > Lokesh Vutla (many thanks!). This omap-serial driver allows using the > Linux am33xx.dtsi file in U-Boot. > Other changes to dts and dtsi files made by this patch are mainly to > prevent _new_ warnings during the build process. Especially the warning > at pinmux@800 stating 'unnecessary #address-cells/#size-cells without > "ranges" or child "reg"' was not removed. This warning is a good example > showing the benefit of the synchronization: if it needs to be fixed it > will be fixed in Linux and ported back to U-Boot. > Buildman reports all 46 am33xx SoC based boards to build fine, with > warnings of course. Nevertheless this patch should be tested thoroughly > on as many boards as possible to prevent any collateral damage. > > Signed-off-by: Felix Brack > Reviewed-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] arm: am335x-pdu001: Enable CONFIG_BLK and CONFIG_DM_MMC
On Fri, Nov 30, 2018 at 10:23:36AM +0100, Felix Brack wrote: > This patch enables CONFIG_BLK as well as CONFIG_DM_MMC for the PDU001 > board. It depends on Patrice Chotard's patch 'power: regulator: denied > disable on always-on regulator' which prevents power cycling the vmmc > supply. Without this patch the board will not boot as vmmc is > unfortunately used by other board components, not just eMMC and micro SD > card. Furthermore my patch 'dts: am335x-pdu001: Fix polarity of card > detection input' is required to boot from external micro SD card. Without > this patch no SD card will be detected and hence booting will fail. > > Signed-off-by: Felix Brack > Reviewed-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,RFC] spl/tpl: change banner into upper case
On Wed, Dec 05, 2018 at 11:29:54AM +0100, Heiko Schocher wrote:
> commit d6330064634a ("spl: Add a define for SPL_TPL_PROMPT")
>
> changes the SPL/TPL banner from upper case into lower
> case. As SPL and TPL are three-letter acronyms and they
> are written in upper case, change it back to upper case.
>
> Signed-off-by: Heiko Schocher
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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Re: [U-Boot] serial: omap: Add code for early debugging
On Mon, Dec 03, 2018 at 03:12:25PM +0100, Felix Brack wrote: > This patch adds code missing when CONFIG_DEBUG_UART_OMAP is enabled as > early debugging UART. The code is basically copied from the ns16550 > driver. > > Signed-off-by: Felix Brack Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 5/5] pinctrl: stm32: Update stm32_pinctrl_get_gpio_dev()
On Mon, Dec 03, 2018 at 10:52:54AM +0100, Patrice Chotard wrote: > Due to gpio holes management, stm32_pinctrl_get_gpio_dev() must > be updated. > > stm32_pinctrl_get_gpio_dev() returns from a given pin selectors > the corresponding bank gpio device and the gpio_offset inside this > gpio bank. > > Update also all functions which makes usage of stm32_pinctrl_get_gpio_dev. > > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 2/5] gpio: stm32f7: Add gpio bank holes management
On Mon, Dec 03, 2018 at 10:52:51AM +0100, Patrice Chotard wrote: > In some STM32 SoC packages, GPIO bank has not always 16 gpios. > Several cases can occur, gpio hole can be located at the beginning, > middle or end of the gpio bank or a combination of these 3 > configurations. > > For that, gpio bindings offer the gpio-ranges DT property which > described the gpio bank mapping. > > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 3/3] serial: bcm6858: remove driver and switch to bcm6345
On Sat, Dec 01, 2018 at 06:42:09PM +0100, Álvaro Fernández Rojas wrote: > Signed-off-by: Álvaro Fernández Rojas Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 3/3] ARM: DTS: da850-evm: Re-sync da850-evm.dts from Linux 4.20
On Mon, Dec 03, 2018 at 08:29:44AM -0600, Adam Ford wrote: > There has been some natural evolution of the device tree, so > resync with 4.20 > > Signed-off-by: Adam Ford > > diff --git a/arch/arm/dts/da850-evm.dts b/arch/arm/dts/da850-evm.dts > index 0e82bb988f..a3c9b34672 100644 Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] ARM: DTS: Resync LogicPD-Torpedo-37xx-devkit with Linux 4.20
On Mon, Dec 03, 2018 at 08:17:29AM -0600, Adam Ford wrote: > Migrate some small device tree fixes from Linux 4.20. > > Signed-off-by: Adam Ford > > diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts > b/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts > index 9d5d53fbe9..c39cf2ca54 100644 Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v5, 4/4] pinctrl: stm32: make pinctrl use hwspinlock
On Tue, Nov 27, 2018 at 01:49:53PM +0100, Benjamin Gaignard wrote: > Protect configuration registers with a hardware spinlock. > > If a hwspinlock is defined in the device-tree node used it > to be sure that none of the others processors on the SoC could > change the configuration at the same time. > > Signed-off-by: Benjamin Gaignard > Reviewed-by: Simon Glass > Reviewed-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v5, 2/4] clk: stm32: add hardware spinlock clock
On Tue, Nov 27, 2018 at 01:49:51PM +0100, Benjamin Gaignard wrote: > From: Benjamin Gaignard > > Add hardware spinlock in the list of the clocks. > > Signed-off-by: Benjamin Gaignard > Reviewed-by: Simon Glass > Reviewed-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,1/3] ARM: DTS: da850: Sync from Linux 4.20
On Mon, Dec 03, 2018 at 08:29:42AM -0600, Adam Ford wrote: > Re-sync with 4.20 due some some natural evolution. > > Signed-off-by: Adam Ford > > diff --git a/arch/arm/dts/da850.dtsi b/arch/arm/dts/da850.dtsi > index c66cf78953..47aa53ba6b 100644 Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] configs: am335x_hs_evm_uart: Add YMODEM SPL support for UART boot
On Wed, Nov 28, 2018 at 10:56:06AM -0600, Andrew F. Davis wrote: > UART booting requires YMODEM support. Add this here. > > Signed-off-by: Andrew F. Davis > Reviewed-by: Lokesh Vutla > Reviewed-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2] ARM: at91: lds: add test for SPL binary size and bss size
On Wed, Nov 28, 2018 at 09:33:43AM +, eugen.hris...@microchip.com wrote: > Add test for the SPL binary size and the bss section size. > This will throw an error at build time if the SPL sections > do not fit in the designated RAM area, thus avoiding oversizing the SPL. > > Based on original work by Wenyou Yang. > > Signed-off-by: Eugen Hristev Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 2/3] ARM: dts: da850-lcdk: Sync from Linux 4.20
On Mon, Dec 03, 2018 at 08:29:43AM -0600, Adam Ford wrote: > Re-synce the device tree files from Linux 4.20 > > Signed-off-by: Adam Ford > > diff --git a/arch/arm/dts/da850-lcdk.dts b/arch/arm/dts/da850-lcdk.dts > index a1f4d6d5a5..0177e3ed20 100644 Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,4/5] gpio: stm32f7: Remove CONFIG_CLK flag.
On Mon, Dec 03, 2018 at 10:52:53AM +0100, Patrice Chotard wrote: > As all STM32 SoCs supports CONFIG_CLK flag, > it becomes useless in this driver, remove it. > > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 2/3] arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}
On Sat, Dec 01, 2018 at 06:42:08PM +0100, Álvaro Fernández Rojas wrote: > Signed-off-by: Álvaro Fernández Rojas Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,v9,3/3] test: dma: add dma-uclass test
On Wed, Nov 28, 2018 at 07:17:51PM +0100, Álvaro Fernández Rojas wrote: > From: Grygorii Strashko > > Add a sandbox DMA driver implementation (provider) and corresponding DM > test. > > Reviewed-by: Tom Rini > Signed-off-by: Grygorii Strashko > Reviewed-by: Simon Glass > Acked-by: Álvaro Fernández Rojas Note that all of this was using add_recv and not prepare_rcv_buf and I've fixed that. Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 1/5] pinctrl: stm32: Move gpio_dev list filling outside probe()
On Mon, Dec 03, 2018 at 10:52:50AM +0100, Patrice Chotard wrote: > Move gpio_dev list filling outside probe() to speed-up U-boot > boot sequence execution. This list is populated only when needed. > > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,v9,2/3] dma: add channels support
On Wed, Nov 28, 2018 at 07:17:50PM +0100, Álvaro Fernández Rojas wrote: > This adds channels support for dma controllers that have multiple channels > which can transfer data to/from different devices (enet, usb...). > > DMA channle API: > dma_get_by_index() > dma_get_by_name() > dma_request() > dma_free() > dma_enable() > dma_disable() > dma_prepare_rcv_buf() > dma_receive() > dma_send() > > Reviewed-by: Tom Rini > Signed-off-by: Álvaro Fernández Rojas > [grygorii.stras...@ti.com: drop unused dma_get_by_index_platdata(), > add metadata to send/receive ops, add dma_prepare_rcv_buf(), > minor clean up] > Signed-off-by: Grygorii Strashko > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] dts: am335x-pdu001: Fix polarity of card detection input
On Thu, Nov 29, 2018 at 01:45:06PM +0100, Felix Brack wrote: > When a micro SD card is inserted in the PDU001 card cage, the card > detection switch is opened and the corresponding GPIO input is driven > by a pull-up. Hence change the active level of the card detection > input from low to high. > > Signed-off-by: Felix Brack Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 1/3] serial: bcm6345: switch to raw I/O functions
On Sat, Dec 01, 2018 at 06:42:07PM +0100, Álvaro Fernández Rojas wrote: > Signed-off-by: Álvaro Fernández Rojas Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,v5,1/4] dm: Add Hardware Spinlock class
On Tue, Nov 27, 2018 at 01:49:50PM +0100, Benjamin Gaignard wrote: > This is uclass for Hardware Spinlocks. > It implements two mandatory operations: lock and unlock > and one optional relax operation. > > Signed-off-by: Benjamin Gaignard > Reviewed-by: Simon Glass > Reviewed-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v5, 3/4] hwspinlock: add stm32 hardware spinlock support
On Tue, Nov 27, 2018 at 01:49:52PM +0100, Benjamin Gaignard wrote: > Implement hardware spinlock support for STM32MP1. > > Signed-off-by: Benjamin Gaignard > Reviewed-by: Simon Glass > Reviewed-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,v9,1/3] dma: move dma_ops to dma-uclass.h
On Wed, Nov 28, 2018 at 07:17:49PM +0100, Álvaro Fernández Rojas wrote: > Move dma_ops to a separate header file, following other uclass > implementations. While doing so, this patch also improves dma_ops > documentation. > > Reviewed-by: Tom Rini > Reviewed-by: Simon Glass > Signed-off-by: Álvaro Fernández Rojas > Signed-off-by: Grygorii Strashko Note that we had a comment about add_recv rather than prepare_rcv_buf that I've corrected. Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] clk: Allow clock defaults to be set during re-reloc state for SPL only
On Mon, Nov 26, 2018 at 08:20:19PM +0100, Philipp Tomsich wrote:
> In commit e5e06b65ad65 ("clk: Allow clock defaults to be set also
> during re-reloc state") the earlier guard against setting clock
> defaults in pre-reloc state was removed. While it is easy to filter
> 'assigned-clocks' properties for SPL using CONFIG_OF_SPL_REMOVE_PROPS,
> no such mechanism exists for the pre-reloc stage of the full U-Boot.
>
> With the default defconfig for the RK3399-Q7 (which filter the
> 'assigned-clocks' property for the DTS used by SPL anyway), this
> caused a pause during startup of the full U-Boot stage that lasted for
> almost 10s (due to the CPU not having been clocked up yet).
>
> This reintroduces the guard from commit f4fcba5c5baa ("clk: Allow
> clock defaults to be set also during re-reloc state") and extends it
> to only apply outside of a TPL/SPL build: i.e. clk_set_defaults will
> now run in pre-reloc state for SPL, but only after reloc for the full
> U-Boot.
>
> References: commit f4fcba5c5baa ("clk: implement clk_set_defaults()")
> References: commit e5e06b65ad65 ("clk: Allow clock defaults to be set
> also during re-reloc state")
> Signed-off-by: Philipp Tomsich
Applied to u-boot/master, thanks!
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Re: [U-Boot] board: ti: ks2_evm: Over ride spl_get_load_buffer function
On Tue, Nov 27, 2018 at 05:52:41PM +0530, Keerthy wrote: > Currently k2 spi boot is broken as the image header > is getting copied to an invalid memory location > > CONFIG_SYS_TEXT_BASE - sizeof (struct image_size) > which maps to 0xc00 - 0x40 = 0xbc0 being a reserved > location. > > We cannot change the CONFIG_SYS_TEXT_BASE address as the single > stage boots like UART boot will need the address to be 0xc00 > hence override the spl_get_load_buffer to have image_header > address as CONFIG_SYS_TEXT_BASE aka 0xc00 > > Signed-off-by: Keerthy Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] fs: fix FAT name extraction
On Mon, Nov 26, 2018 at 03:58:13PM +0100, Patrick Wildt wrote: > The long name apparently can be accumulated using multiple > 13-byte slots. Unfortunately we never checked how many we > can actually fit in the buffer we are reading to. > > Signed-off-by: Patrick Wildt Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] fs: check FAT cluster size
On Mon, Nov 26, 2018 at 03:56:57PM +0100, Patrick Wildt wrote: > The cluster size specifies how many sectors make up a cluster. A > cluster size of zero makes no sense, as it would mean that the > cluster is made up of no sectors. This will later lead into a > division by zero in sect_to_clust(), so better take care of that > early. > > The MAX_CLUSTSIZE define can reduced using a define to make some > room in low-memory system. Unfortunately if the code reads a > filesystem with a bigger cluster size it will overflow the buffer. > > Signed-off-by: Patrick Wildt Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] configs: stm32f746-disco: Fix stm32f746-disco boot
On Mon, Nov 26, 2018 at 01:42:32PM +0100, Patrice Chotard wrote:
> Since commit 8f651ca60ba1 ("pinctrl: stm32: Add get_pins_count() ops")
> stm32f746-disco can't boot.
>
> This is due to new memory allocation into STM32 pinctrl driver,
> increase SYS_MALLOC_F_LEN from 0xC00 to 0xE00.
>
> Signed-off-by: Patrice Chotard
Applied to u-boot/master, thanks!
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Re: [U-Boot] main: Drop more #ifdefs
On Sun, Nov 25, 2018 at 08:05:54PM -0700, Simon Glass wrote: > Now that many things are converted to Kconfig we can drop most of the > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] w1: fix occasional enumeration failure
On Fri, Nov 23, 2018 at 10:53:06AM +0100, Martin Fuzzey wrote: > Sometimes enumeration fails (about 1 in 50 times on my custom board). > > The underlying reason is probably electrical but Linux does not have > the problem. > > Comparing the Linux / u-boot implementations shows that Linux > retries the error case whereas u-boot aborts early. > > Removing the early abort in u-boot fixes the problem. > > Signed-off-by: Martin Fuzzey I saw the overall discussion and yes, OK, lets try this method. Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] Enable expression support for CONFIG_BOARD_SIZE_LIMIT
Dear Fabio, In message you wrote: > > I replaced it on the main Makefile and also in the imx one and it > works as expected now. Thanks. > When you send the v2, you can add: > > Tested-by: Fabio Estevam Done. Thanks for your patience. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de "Why should we subsidize intellectual curiosity?" - Ronald Reagan ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2] Enable expression support for CONFIG_BOARD_SIZE_LIMIT
So far, the use of CONFIG_BOARD_SIZE_LIMIT would only work with
plain numeric constants. Extend it to allow for expressions, so one
can for example use
#define CONFIG_BOARD_SIZE_LIMIT (768 << 10)
in the board configuration.
Signed-off-by: Wolfgang Denk
Tested-by: Fabio Estevam
Cc: Fabio Estevam
Cc: Stefano Babic
Cc: Vanessa Maegima
Cc: Otavio Salvador
Cc: John Weber
Cc: Stefan Roese
---
v2: replace bashism for evaluating expressions in CONFIG_BOARD_SIZE_LIMIT
by another call to awk.
Note 1: As gawk lacks an eval function and we don't want to rely on
bash being used as shell, we use another call to awk to evaluate the
expression. This has the disadvantage that we cannot use expressions
like "<<" which awk does not understand. OK, one could replace awk
by something better...
Note 2: This patch focusses on enabling this new feature. It does
not addres another issue that should be solved in a later
commit: the duplication of the same code in Makefile and
arch/arm/mach-imx/Makefile
---
Makefile | 17 -
arch/arm/mach-imx/Makefile | 17 -
2 files changed, 16 insertions(+), 18 deletions(-)
diff --git a/Makefile b/Makefile
index 0d11ff9797..87eb0fd2b1 100644
--- a/Makefile
+++ b/Makefile
@@ -774,15 +774,14 @@ LDPPFLAGS += \
ifneq ($(CONFIG_BOARD_SIZE_LIMIT),)
BOARD_SIZE_CHECK = \
- @actual=`wc -c $@ | awk '{print $$1}'`; \
- limit=`printf "%d" $(CONFIG_BOARD_SIZE_LIMIT)`; \
- if test $$actual -gt $$limit; then \
- echo "$@ exceeds file size limit:" >&2 ; \
- echo " limit: $$limit bytes" >&2 ; \
- echo " actual: $$actual bytes" >&2 ; \
- echo " excess: $$((actual - limit)) bytes" >&2; \
- exit 1; \
- fi
+ @(awk "END{print $$(echo $(CONFIG_BOARD_SIZE_LIMIT))}" /dev/null; wc -c
$@ ) | \
+ awk 'BEGIN { getline limit } \
+ { if ($$1 > limit) { \
+ printf "%s exceeds file size limit:\n", $$2; \
+ printf " limit: %d bytes\n", limit; \
+ printf " actual: %d bytes\n", $$1; \
+ printf " excess: %d bytes\n", $$1 - limit; \
+ exit 1; } }'
else
BOARD_SIZE_CHECK =
endif
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 53d9e5f42b..36d1ecc732 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -60,15 +60,14 @@ endif
ifneq ($(CONFIG_BOARD_SIZE_LIMIT),)
BOARD_SIZE_CHECK = \
-@actual=`wc -c $@ | awk '{print $$1}'`; \
-limit=`printf "%d" $(CONFIG_BOARD_SIZE_LIMIT)`; \
-if test $$actual -gt $$limit; then \
-echo "$@ exceeds file size limit:" >&2 ; \
-echo " limit: $$limit bytes" >&2 ; \
-echo " actual: $$actual bytes" >&2 ; \
-echo " excess: $$((actual - limit)) bytes" >&2; \
-exit 1; \
-fi
+ @(awk "END{print $$(echo $(CONFIG_BOARD_SIZE_LIMIT))}" /dev/null; wc -c
$@ ) | \
+ awk 'BEGIN { getline limit } \
+ { if ($$1 > limit) { \
+ printf "%s exceeds file size limit:\n", $$2; \
+ printf " limit: %d bytes\n", limit; \
+ printf " actual: %d bytes\n", $$1; \
+ printf " excess: %d bytes\n", $$1 - limit; \
+ exit 1; } }'
else
BOARD_SIZE_CHECK =
endif
--
2.19.2
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Re: [U-Boot] [PATCH v2] pcm058: fix NAND flash not using badblock table
Hi Harald, On 07/12/18 13:18, Marek Vasut wrote: > On 12/07/2018 01:15 PM, Harald Seiler wrote: >> Hello Marek, > > Hi, > >> On Fri, 2018-12-07 at 12:48 +0100, Marek Vasut wrote: >>> On 12/07/2018 10:19 AM, Harald Seiler wrote: Currently, U-Boot ignores the BBT stored in the last 4 blocks of NAND flash because the NAND_BBT_USE_FLASH flag is not set. This leads to two issues: * U-Boot silently uses a memory-only BBT which is initialized with all blocks marked as good. This means, actual bad blocks are marked good and U-Boot might try writing to or reading from them. * The BBT in flash, which will be created once Linux boots up, is not off limits for a driver ontop, like UBI. While it does not seem to consistently produce an error, sometimes UBI will fail to attach because the BBT blocks obviously don't contain valid UBI data. To fix this, this patch sets the CONFIG_SYS_NAND_USE_FLASH_BBT option, which is used in ./drivers/mtd/nand/raw/mxs_nand.c to decide whether a BBT in flash is used. Signed-off-by: Harald Seiler >>> >>> V2 Changelog is missing. >>> --- include/configs/pcm058.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index 49048c163f..b9bc08b388 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -55,6 +55,7 @@ #define CONFIG_SYS_NAND_BASE 0x4000 #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_SYS_NAND_USE_FLASH_BBT >>> >>> Shouldn't this be enabled on all boards with GPMI NAND ? >>> >> >> I looked at other boards and they all defined this config, so I >> assumed this was the way to go ... Let me understand. If Isearch for CONFIG_NAND_MXS, I get 27 boards using this drivers, with different SOC (mx28, mx6[Dual|Quad|Solo], mx6sx, mx6ull). But none of them is setting CONFIG_SYS_NAND_USE_FLASH_BBT. When does it happen the issue ? It should happen if we create a UBI container and its volumes in U-Boot. If UBI is generated in linux, this should not happen. Is it the case or does it happen in any condition ? I think the issue happens because there is a disalignment between kernel and u-boot. Kernel mainline for this board (file imx6qdl-phytec-phycore-som.dtsi) sets "nand-on-flash-bbt", while U-Boot not. That mean that this can always happen if kernel and U-Boot does not use the same setup for the driver. Maybe with previous kernel versions there was no problem because Linux used the same setup as U-Boot. Anyway, this discourage setting CONFIG_SYS_NAND_USE_FLASH_BBT unconditionally for all boards with GPMI driver. > But yes, as far as I understand, >> it would make sense to have it enabled most of the time. Although >> there is some code which makes this configuration from the >> devicetree, which might be an even better solution. Device tree has already this option as I see in drivers/mtd/nand/raw/nand_base.c. The driver enforces this if no DT (as in this case) is used. > > Cool, if this can be fixed in a more general manner, that'd be awesome > and would help others too. Better yet, it'd get rid of possibly > hazardous duplication. Can you research it ? > Best regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RFC PATCH v2 00/11] SF: Migrate to Linux SPI NOR framework
On Fri, Dec 7, 2018 at 6:58 AM Vignesh R wrote: > > On 07/12/18 12:47 AM, Simon Goldschmidt wrote: > > Am 06.12.2018 um 18:39 schrieb Vignesh R: > >> On 06/12/18 10:06 PM, Simon Goldschmidt wrote: > >>> Am 06.12.2018 um 14:54 schrieb Simon Goldschmidt: > On Thu, Dec 6, 2018 at 2:45 PM Vignesh R wrote: > > On 06/12/18 2:15 AM, Simon Goldschmidt wrote: > >> Am 05.12.2018 um 07:55 schrieb Simon Goldschmidt: > >>> On Wed, Dec 5, 2018 at 7:51 AM Vignesh R wrote: > > [...] > [...] > >>> Had a quick test with both standard and tiny in SPL and both configs now > >>> work on my board. I haven't tested SFDP as you said it does not works on > >>> Cadence QSPI. (I tested compiling it though, and that works now.) > >>> > > > > After enabling DEBUG in spi-mem.c, I see that we're changing to 4-byte > > mode (via b7h) instead of using 4-byte opcodes. Unfortunately, this > > conflicts with the boot rom using the default read opcose in 3-byte mode > > on warm reboot. > > > > Do you plan to change this or would this be fixed by parsing SFDP? > > > > Oh, I see n25q256a entry is missing SPI_NOR_4B_OPCODES flag in the > spi_nor_ids table. In non SFDP configuration adding SPI_NOR_4B_OPCODES > flag should avoid sending 0xb7 and use 4-byte opcodes directly. May be > you could give that a try? Yes, that did the trick. With SFDP disabled I now see 9Fh (read ID) followed directly by 0Ch (4-byte FAST READ). Just like it should be. With SFDP enabled, I get 9Fh, 5Ah, 5Ah and then 0Ch. Both configs do work fine for me, so: Tested-by: Simon Goldschmidt Regards, Simon > > >> > >> I used below hack to test SFDP with Cadence QSPI: > > > > Just by accident, I saw that enabling the SFDP config does not seem to > > break booting. But it still switches to 4-byte mode, so it probably just > > fails to parse and continues the non-SFDP way? > > > > For stateless 4-byte addressing mode with SFDP, we need to parse JEDEC > 4-byte Address Instruction Parameter Header and Table (part of JESD216B) > to get 4 byte addressing opcode. > We need to port this patch once accepted to Linux kernel: > https://lore.kernel.org/patchwork/patch/1022200/ > > >> > >> diff --git a/drivers/spi/cadence_qspi_apb.c > >> b/drivers/spi/cadence_qspi_apb.c > >> index a8af35203035..9dbf9aa7d20c 100644 > >> --- a/drivers/spi/cadence_qspi_apb.c > >> +++ b/drivers/spi/cadence_qspi_apb.c > >> @@ -559,7 +559,7 @@ int cadence_qspi_apb_indirect_read_setup(struct > >> cadence_spi_platdata *plat, > >> /* Configure the opcode */ > >> rd_reg = cmdbuf[0] << CQSPI_REG_RD_INSTR_OPCODE_LSB; > >> > >> - if (rx_width & SPI_RX_QUAD) > >> + if (rx_width & SPI_RX_QUAD && (cmdbuf[0] != 0x5a)) > > > > But this is Spansion-specific, right? > > > > Nope, SFDP command operates in 1-1-1 mode for all flash devices. But if > you don't have rx width set to 4 in DT, above hack is not needed and > SFDP parsing would work fine with Cadence QSPI. > > > -- > Regards > Vignesh ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] mpc85xx: Add support for -msingle-pic-base
On 12/6/18 8:20 AM, Joakim Tjernlund wrote: > -msingle-pic-base is a new gcc(from 4.6) option for ppc and > it reduces the size of my u-boot with about 4-5 KB. > While at it, add -fno-jump-tables too to save a > few more bytes. > > e5500 core: > size u-boot.bef >text data bss dec hex filename > 473043 23772 307104 803919 c444f u-boot.bef > size u-boot.aft >text data bss dec hex filename > 453195 23772 307104 784071 bf6c7 u-boot.aft > > e500 core: > size u-boot.bef >text data bss dec hex filename > 292998 17868 24968 335834 51fda u-boot.bef > size u-boot.aft >text data bss dec hex filename > 288002 17868 24968 330838 50c56 u-boot.aft > > Signed-off-by: Joakim Tjernlund > --- Tested on e500mc, e5500, e6500 platforms. Acked-by: York Sun ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] sunxi: update README.sunxi64
On Thu, Dec 6, 2018 at 2:11 PM Maxime Ripard wrote: > > On Thu, Dec 06, 2018 at 01:25:57AM +, Andre Przywara wrote: > > Now that the Allwinner port in the official mainline ARM Trusted > > Firmware repository has reached feature parity with the "legacy" ATF > > port, let's use the opportunity to update the Allwinner 64-bit build > > instructions. This changes: > > - Update ATF build instructions to use the mainline repo. > > - Add quick command lines for TL;DR people. > > - Mention Allwinner H6 build target. > > - Mention pre-built FEL binaries. > > > > Signed-off-by: Andre Przywara > > Acked-by: Maxime Ripard Applied to u-boot-sunxi/master ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [linux-sunxi] [PATCH v3 0/9] Stop AXP from crashing when enabling LDO3
On Wed, Nov 21, 2018 at 11:35 PM Priit Laes wrote: > > This is a resend/v2 of a "Stop AXP from crashing when enabling LDO3" series, > posted by Olliver Schinagl in March 2017. Unfortunately it never got past > initial discussion [1], but most Olimex Lime2 boards are still running > into this bug. > > When powering up an AXP209, the default value for LDO3 output is enabled. This > works fine. However if for whatever reason, LDO3 is disabled, for example by > OS > during reboot and u-boot enables LDO3 again, the PMIC shuts down (without > setting an interrupt) causing the board to hang. This behavior has been seen > from Linux as well, u-boot disables LDO3 as a default value, the kernel > enables > it per its DTS, the kernel hangs as the PMIC gets shut down. > > The root cause is that some boards have too high capacitance on the LDO3 > output > port causing inrush currents exceeding the maximum of the AXP209. > > The fix is to turn on the LDO3 at the lowest possible voltage and then set the > final voltage. > > If the capacitance is really big (due to a connected device for example) the > AXP209 also features VRC, or Voltage Rate Control, allowing voltage to ramp up > even slower. > > Similar changes need to be also implemented in the operating system driver > side when driver needs to toggle power for the ALDO3 regulator. > > This patch series implements the above with a few tiny cleanups. > > The initial discussion with some scope screenshots can be found in the > linux-sunxi mailing list [0]. > > And the initial series were posted to u-boot mailing list [1]. > > Signed-off-by: Olliver Schinagl > Signed-off-by: Priit Laes > > [0] https://groups.google.com/forum/m/#!topic/linux-sunxi/EDvEsbHHqQI > [1] https://lists.denx.de/pipermail/u-boot/2017-March/282789.html Applied to u-boot-sunxi/master ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] Enable expression support for CONFIG_BOARD_SIZE_LIMIT
Hi Wolfgang,
On Fri, Dec 7, 2018 at 1:21 PM Wolfgang Denk wrote:
> This should also work - replace the line
>
> @(echo $$(($(CONFIG_BOARD_SIZE_LIMIT))); wc -c $@ ) | \
>
> by
>
> @(awk "END { print $$(echo $(CONFIG_BOARD_SIZE_LIMIT)) }" /dev/null;
> wc -c $@ ) | \
>
>
> Can you please try this out?
I replaced it on the main Makefile and also in the imx one and it
works as expected now.
When you send the v2, you can add:
Tested-by: Fabio Estevam
Thanks
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Re: [U-Boot] [PATCH] Enable expression support for CONFIG_BOARD_SIZE_LIMIT
Dear Fabio,
In message
you wrote:
>
> > /bin/sh: 1: arithmetic expression: expecting primary: ""(1 * 1024)""
D*mn. I really thought I had tried this in a dash based
environment, too. Sorry for causing such confusion.
> SHELL = /bin/bash"
Yes, if this is really a bash only feature that would be an easy way
to fix it.
> And by forcing the SHELL variable to bash, then your patch works fine here:
Yes, this would work - but I'm not sure if everybody would appreciate
such a change?
This should also work - replace the line
@(echo $$(($(CONFIG_BOARD_SIZE_LIMIT))); wc -c $@ ) | \
by
@(awk "END { print $$(echo $(CONFIG_BOARD_SIZE_LIMIT)) }" /dev/null; wc
-c $@ ) | \
Can you please try this out?
Best regards,
Wolfgang Denk
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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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[U-Boot] [PATCH 3/3] ARM: rmobile: Fix to enable icache early in Gen3
From: Takeshi Kihara
This patch fixes the problem that u-boot will not start unless icache is
enabled early.
Signed-off-by: Takeshi Kihara
Signed-off-by: Hiroyuki Yokoyama
Signed-off-by: Marek Vasut
---
arch/arm/mach-rmobile/cpu_info.c| 4 ++--
arch/arm/mach-rmobile/memmap-gen3.c | 4 +++-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c
index 65a9ca8c01..aa5be52dfd 100644
--- a/arch/arm/mach-rmobile/cpu_info.c
+++ b/arch/arm/mach-rmobile/cpu_info.c
@@ -7,8 +7,6 @@
#include
#include
-/* R-Car Gen3 caches are enabled in memmap-gen3.c */
-#ifndef CONFIG_RCAR_GEN3
#ifdef CONFIG_ARCH_CPU_INIT
int arch_cpu_init(void)
{
@@ -17,6 +15,8 @@ int arch_cpu_init(void)
}
#endif
+/* R-Car Gen3 D-cache is enabled in memmap-gen3.c */
+#ifndef CONFIG_RCAR_GEN3
#ifndef CONFIG_SYS_DCACHE_OFF
void enable_caches(void)
{
diff --git a/arch/arm/mach-rmobile/memmap-gen3.c
b/arch/arm/mach-rmobile/memmap-gen3.c
index 3c0f3548cb..1a9eb72bb9 100644
--- a/arch/arm/mach-rmobile/memmap-gen3.c
+++ b/arch/arm/mach-rmobile/memmap-gen3.c
@@ -140,6 +140,8 @@ void enable_caches(void)
gen3_mem_map[i].attrs = 0;
}
- icache_enable();
+ if (!icache_status())
+ icache_enable();
+
dcache_enable();
}
--
2.18.0
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[U-Boot] [PATCH 2/3] ARM: rcar_gen3: fix protection area access error
From: Takeshi Kihara
This patch fixes the problem that "main memory domain AXI secure access
protection error" occurs. Exclude the area (0x43f0 to 0x47DF)
set by DBSC from the map area.
Signed-off-by: Takeshi Kihara
Signed-off-by: Hiroyuki Yokoyama
Signed-off-by: Marek Vasut
---
arch/arm/mach-rmobile/memmap-gen3.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-rmobile/memmap-gen3.c
b/arch/arm/mach-rmobile/memmap-gen3.c
index 0429a2ac51..3c0f3548cb 100644
--- a/arch/arm/mach-rmobile/memmap-gen3.c
+++ b/arch/arm/mach-rmobile/memmap-gen3.c
@@ -82,8 +82,16 @@ void enable_caches(void)
/* Mark memory reserved by ATF as cacheable too. */
if (start == 0x4800) {
- start = 0x4000ULL;
- size += 0x0800ULL;
+ /* Unmark protection area (0x43F0 to 0x47DF) */
+ gen3_mem_map[i].virt = 0x4000ULL;
+ gen3_mem_map[i].phys = 0x4000ULL;
+ gen3_mem_map[i].size = 0x03F0ULL;
+ gen3_mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE;
+ i++;
+
+ start = 0x47E0ULL;
+ size += 0x0020ULL;
}
gen3_mem_map[i].virt = start;
--
2.18.0
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[U-Boot] [PATCH 1/3] ARM: rcar_gen3: fix protection area access error at Cortex-A53
From: Hiroyuki Yokoyama
This patch fixes the problem that "main memory domain AXI secure
access protection error" occurs when booting Cortex-A53. Exclude
the area (0x43f0 to 0x47DF) set by DBSC from the map area.
Signed-off-by: Hiroyuki Yokoyama
Signed-off-by: Marek Vasut
---
arch/arm/mach-rmobile/memmap-gen3.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-rmobile/memmap-gen3.c
b/arch/arm/mach-rmobile/memmap-gen3.c
index 7e29ccc351..0429a2ac51 100644
--- a/arch/arm/mach-rmobile/memmap-gen3.c
+++ b/arch/arm/mach-rmobile/memmap-gen3.c
@@ -21,7 +21,13 @@ static struct mm_region gen3_mem_map[GEN3_NR_REGIONS] = {
}, {
.virt = 0x4000UL,
.phys = 0x4000UL,
- .size = 0x8000UL,
+ .size = 0x03F0UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+PTE_BLOCK_INNER_SHARE
+ }, {
+ .virt = 0x47E0UL,
+ .phys = 0x47E0UL,
+ .size = 0x7820UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
--
2.18.0
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Re: [U-Boot] [RESEND PATCH v3 00/19] DM_I2C_COMPAT removal for all ti platforms
On Fri, Dec 07, 2018 at 02:50:36PM +0100, Jean-Jacques Hiblot wrote: > This series remove the usage of the DM_I2C_COMPAT option for all the ti > platforms. It also takes this opportunity to not disable DM_I2C in the SPL. > > There are a couples of issues to fix: > - CMD_EEPROM does not support the DM API. Fixed by removing this option > when DM_I2C is used without DM_I2C_COMPAT > - i2c_get_chip_for_busnum() does not work when OF_CONTROL is not used > (as is the case with am33xx SPL). > - The I2C driver do not support DM_I2C without OF_CONTROL. > - Most of the PMIC drivers do not support the I2C DM API. > - Board detection is done prior DM initialization. Fixed by moving it after > DM is initialized. That move breaks the DRA7 platforms (The fixes for > that are at the last 5 patches this series) > > When all this is taken care of DM_I2C_COMPAT can be removed and DM_I2C > enabled in the SPL. > > This has been tested with the following boards: > - am437x SK > - am335x SK > - am335x beaglebone (both DM and non-DM config) > - dra76 evm > - am572 evm > - k2g evm > > The following targets may be impacted by the changes related to > SPL_OF_CONTROL and SPL_OF_PLATDATA: > - am3517_evm_defconfig > - omap3_logic_defconfig > - chromebit_mickey_defconfig > - chromebook_jerry_defconfig > - chromebook_minnie_defconfig > - evb-rk3399_defconfig > - rock_defconfig > > It would be nice it some of you could try to boot them. So I've just reviewed-by all of the TI parts. Heiko, do you want this via the I2C tree? Simon, do you want this via the DM tree? Do both of you just want me to grab it instead? The window on applying this for this release is closing quickly but this has been around for long enough that I'd like to see it go in. Thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] usb: musb-new: Add CONFIG_USB_MUSB_INIT_TIMEOUT
On 12/07/2018 01:59 PM, Alex Kiernan wrote:
> On Fri, Dec 7, 2018 at 12:30 PM Marek Vasut wrote:
>>
>> On 12/07/2018 01:29 PM, Alex Kiernan wrote:
>>> On Fri, Dec 7, 2018 at 11:54 AM Marek Vasut wrote:
On 12/07/2018 09:56 AM, Alex Kiernan wrote:
[...]
> +++ b/drivers/usb/musb-new/musb_uboot.c
> @@ -214,7 +214,7 @@ int musb_lowlevel_init(struct musb_host_data *host)
> {
> void *mbase;
> /* USB spec says it may take up to 1 second for a device to connect
> */
> - unsigned long timeout = get_timer(0) + 1000;
> + unsigned long timeout = get_timer(0) + CONFIG_USB_MUSB_INIT_TIMEOUT;
Isn't this the same as usb_pgood_delay ?
>>>
>>> Looks like it; I'll spin a v2 which uses that.
>>
>> I wonder if this code is needed at all, shouldn't the USB core deal with
>> this delay ?
>>
>
> Oh I see... certainly I can't just take that delay out, that just ends up at:
>
> USB0: scanning bus 0 for devices... USB device descriptor short read
> (expected 8, got 0)
> failed, error -5
>
> Certainly without that delay, there's clearly delays in the rest of
> the USB core, so I expect you're right, I just don't know where to put
> the poll for MUSB_DEVCTL_HM.
Can you research it a bit ? What does the _HM bit do ?
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Re: [U-Boot] [RESEND PATCH v3 14/19] am57xx: remove non-DM I2C code
On Fri, Dec 07, 2018 at 02:50:50PM +0100, Jean-Jacques Hiblot wrote: > am57xx configs uses DM_I2C both in SPL and u-boot. > Remove code for non-DM I2C support. > > Signed-off-by: Jean-Jacques Hiblot Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v3 13/19] ti: remove usage of DM_I2C_COMPAT and don't disable DM_I2C in SPL
On Fri, Dec 07, 2018 at 02:50:49PM +0100, Jean-Jacques Hiblot wrote: > DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C > API when DM_I2C is used. The goal is to eventually remove DM_I2C_COMPAT > when all I2C "clients" have been migrated to use the DM API. > This a step in that direction for the TI based platforms. > Build tested with buildman: > buildman -dle am33xx ti omap3 omap4 omap5 davinci keystone > > boot tested with: > am335x_evm, am335x_boneblack, am335x_boneblack_vboot (DM version), > am57xx_evm, dra7xx_evm, k2g_evm, am437x_evm > > Signed-off-by: Jean-Jacques Hiblot > Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v3 11/19] ti: common: board_detect: Allow DM I2C without CONFIG_DM_I2C_COMPAT
On Fri, Dec 07, 2018 at 02:50:47PM +0100, Jean-Jacques Hiblot wrote: > From: Andreas Dannenberg > > The EEPROM reading in the board detection code is done through legacy > I2C functions which on platforms using DM_I2C this functionality is > provided via the CONFIG_DM_I2C_COMPAT layer. To allow newer platforms > to use the board detection code without relying on CONFIG_DM_I2C_COMPAT > go ahead and add an I2C handling implementation that directly uses the > I2C DM functionality. > > Signed-off-by: Andreas Dannenberg > Signed-off-by: Jean-Jacques Hiblot Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v3 10/19] power: make most tps drivers and the twl4030 driver compatible with DM_I2C
On Fri, Dec 07, 2018 at 02:50:46PM +0100, Jean-Jacques Hiblot wrote: > Those driver are not DM drivers per se (not using the PMIC/regulator > framework) and are using the legacy I2C API. Make them compatible with > the DM_I2C API. > > This impacts the following drivers: > - palmas (used by am57xx/dra7xx evms) > - tps65218 (used by am43xx evms) > - tps65217 and tps65910 (used by am335x evms and am335x boneblack vboot) > - twl4030 (used by omap3_logicpd) > - tps65217 (used by brppt1) > - twl6030 > > Signed-off-by: Jean-Jacques Hiblot > Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v3 07/19] am335x: Register the I2C controllers if DM_I2C is used.
On Fri, Dec 07, 2018 at 02:50:43PM +0100, Jean-Jacques Hiblot wrote: > If DM_I2C is used , the I2C controllers must be registered as U_BOOT_DEVICE > because OF_CONTROL is not used in the SPL. > > Signed-off-by: Jean-Jacques Hiblot Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v3 09/19] omap: detect the board after DM is available
On Fri, Dec 07, 2018 at 02:50:45PM +0100, Jean-Jacques Hiblot wrote: > In order to use DM_I2C, we need to move the board detection after the > early SPL initialization. > > Signed-off-by: Jean-Jacques Hiblot Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v3 19/19] dra7: Allow selecting a new dtb after board detection.
On Fri, Dec 07, 2018 at 02:50:55PM +0100, Jean-Jacques Hiblot wrote: > The DRA7 platforms requires that the dtb used in the SPL really matches the > platform to have the best MMC performances. > To detect the board type/version an I2C EEPROM is read. This requires that > DM is initialized before the detection. As a consequence we must reset the > DM after the board detection is a new dtb would better match the platform. > > Signed-off-by: Jean-Jacques Hiblot > Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v3 17/19] drivers: core: Add the option SPL_DM_DEVICE_REMOVE to the Kconfig
On Fri, Dec 07, 2018 at 02:50:53PM +0100, Jean-Jacques Hiblot wrote: > It is currently not possible to include the support to remove devices in > the SPL. This is however needed by platforms that re-select their dtb after > DM is initialized; they need to remove all the previously bound devices > before triggering a scan of the new DT. > > Add a Kconfig option to be able to include the support for device removal > in the SPL. > > Signed-off-by: Jean-Jacques Hiblot > Reviewed-by: Simon Glass > > Seeries-changes:3 > - update commit message > Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v3 06/19] i2c: omap24xx_i2c: Use platdata to probe the device
On Fri, Dec 07, 2018 at 02:50:42PM +0100, Jean-Jacques Hiblot wrote: > This allows the driver to be used without OF_CONTROL. > AM335x support DM_SPL but does not use SPL_OF_CONTROL. Enabling DM_I2C in > SPL thus requires that the omap I2C can be passed platdata. > > Signed-off-by: Jean-Jacques Hiblot Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] sunxi: H6: DRAM: avoid memcpy() on MMIO registers
On 06/12/2018 07:42, Maxime Ripard wrote: Hi, > On Thu, Dec 06, 2018 at 12:02:20AM +, Andre Przywara wrote: >> Using memcpy() for MMIO operations is, however tempting, not a good >> idea: It depends on the specific implementation of memcpy, also >> lacks barriers. In this particular case the first registers were >> written using 64-bit writes, and the last register using four >> separate single-byte writes. Neither is what we actually want. >> We get away with it in this case because of the particular details of >> the bus implementation, the DRAM controller IP and the values that we >> actually write, but we should not leave a bad example around. >> >> Replace the memcpy with a proper loop using the writel() accessor. >> >> Signed-off-by: Andre Przywara >> --- >> arch/arm/mach-sunxi/dram_sun50i_h6.c | 6 -- >> 1 file changed, 4 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c >> b/arch/arm/mach-sunxi/dram_sun50i_h6.c index 5da90a2835..e2f141eb9b >> 100644 --- a/arch/arm/mach-sunxi/dram_sun50i_h6.c >> +++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c >> @@ -182,6 +182,7 @@ static void mctl_set_timing_lpddr3(struct >> dram_para *para) (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; >> struct sunxi_mctl_phy_reg * const mctl_phy = >> (struct sunxi_mctl_phy_reg >> *)SUNXI_DRAM_PHY0_BASE; >> +int i; >> >> u8 tccd = 2; >> u8 tfaw = max(ns_to_t(50), 4); >> @@ -237,8 +238,9 @@ static void mctl_set_timing_lpddr3(struct >> dram_para *para) u8 twr2rd = tcwl + 4 + 1 + twtr; >> u8 trd2wr = tcl + 4 + (tcksrea >> 1) - tcwl + 1; >> >> -/* set mode register */ >> -memcpy(mctl_phy->mr, mr_lpddr3, sizeof(mr_lpddr3)); >> +/* set mode registers */ >> +for (i = 0; i < ARRAY_SIZE(mr_lpddr3); i++) >> +writel(mr_lpddr3[i], _phy->mr[i]); > > memcpy_toio is meant to do just that. "meant to" is the right wording ;-), since it doesn't seem to do it: If I understand asm/io.h correctly (which apparently was just copied 20 years ago or so from Russell's Linux), it simply defines to memcpy - if we don't have __mempci defined - whatever that means in 2018's U-Boot ;-) Funny enough even the Linux implementation is somewhat dodgy, as it uses the raw_read accessors (which don't do much in U-Boot, I believe), but still uses 8-bit and 64-bit wide accesses, in the hope that this is handled by the device. So I'd rather stick with the explicit loop, as I saw funny effects with byte writes to DRAM registers. Cheers, Andre. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v3 15/19] configs: dra7xx-evm: increase the size of the malloc's pool before relocation
On Fri, Dec 07, 2018 at 02:50:51PM +0100, Jean-Jacques Hiblot wrote: > This is required to take advantage of MULTI_DTB_FIT before relocation. > If it is too low, DM will be initialized only after relocation has > taken place. That is too late for the DRA7 because I2C DM is used before > the relocation to setup the voltages required, among other things, to > properly initialize the DRAM. > > Signed-off-by: Jean-Jacques Hiblot Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v3 04/19] configs: am335x: am57x: dra7x: Enable CONFIG_SPL_DM_SEQ_ALIAS
On Fri, Dec 07, 2018 at 02:50:40PM +0100, Jean-Jacques Hiblot wrote: > Those platforms need CONFIG_SPL_DM_SEQ_ALIAS because they enable both > DM_I2C and SPL_DM. Without CONFIG_SPL_DM_SEQ_ALIAS, it is not possible to > get the I2C bus with i2c_get_chip_for_busnum(). > > Signed-off-by: Jean-Jacques Hiblot > Reviewed-by: Felix Brack > Tested-by: Felix Brack Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v3 08/19] dts: am43x: omap5: Add node for I2C in SPL
On Fri, Dec 07, 2018 at 02:50:44PM +0100, Jean-Jacques Hiblot wrote: > Signed-off-by: Jean-Jacques Hiblot > Reviewed-by: Simon Glass Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v3 01/19] cmd: Kconfig: Do not include EEPROM if DM_I2C is used without DM_I2C_COMPAT
On Fri, Dec 07, 2018 at 02:50:37PM +0100, Jean-Jacques Hiblot wrote: > The implementation of the EEPROM commands does not support the DM I2C API. > Prevent compilation breakage by not enabling it if the non-DM API is not > available (if DM_I2C is used without DM_I2C_COMPAT) > > Signed-off-by: Jean-Jacques Hiblot > Reviewed-by: Simon Glass > Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH v3 05/19] i2c: omap24xx_i2c: Move away from SoC specific headers for reg offset
On Fri, Dec 07, 2018 at 02:50:41PM +0100, Jean-Jacques Hiblot wrote: > From: Vignesh R > > Move away from SoC specific headers to handle different register layout. > Instead use driver data to get appropriate register layouts like in the > kernel. While at it, perform some mostly cosmetic alignment/cleanup in > the functions being updated. > > Signed-off-by: Vignesh R > Signed-off-by: Andreas Dannenberg > Signed-off-by: Jean-Jacques Hiblot Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 17/20] riscv: Move trap handler codes to mtrap.S
Currently the M-mode trap handler codes are in start.S. For future extension, move them to a separate file mtrap.S. Signed-off-by: Bin Meng Reviewed-by: Lukas Auer --- Changes in v2: None arch/riscv/cpu/Makefile | 2 +- arch/riscv/cpu/mtrap.S | 111 arch/riscv/cpu/start.S | 89 -- 3 files changed, 112 insertions(+), 90 deletions(-) create mode 100644 arch/riscv/cpu/mtrap.S diff --git a/arch/riscv/cpu/Makefile b/arch/riscv/cpu/Makefile index 2cc6757..6bf6f91 100644 --- a/arch/riscv/cpu/Makefile +++ b/arch/riscv/cpu/Makefile @@ -4,4 +4,4 @@ extra-y = start.o -obj-y += cpu.o +obj-y += cpu.o mtrap.o diff --git a/arch/riscv/cpu/mtrap.S b/arch/riscv/cpu/mtrap.S new file mode 100644 index 000..a5ad558 --- /dev/null +++ b/arch/riscv/cpu/mtrap.S @@ -0,0 +1,111 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * M-mode Trap Handler Code for RISC-V Core + * + * Copyright (c) 2017 Microsemi Corporation. + * Copyright (c) 2017 Padmarao Begari + * + * Copyright (C) 2017 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation + * + * Copyright (C) 2018, Bin Meng + */ + +#include +#include + +#ifdef CONFIG_32BIT +#define LREG lw +#define SREG sw +#define REGBYTES 4 +#else +#define LREG ld +#define SREG sd +#define REGBYTES 8 +#endif + + .text + + /* trap entry */ + .align 2 + .global trap_entry +trap_entry: + addi sp, sp, -32 * REGBYTES + SREG x1, 1 * REGBYTES(sp) + SREG x2, 2 * REGBYTES(sp) + SREG x3, 3 * REGBYTES(sp) + SREG x4, 4 * REGBYTES(sp) + SREG x5, 5 * REGBYTES(sp) + SREG x6, 6 * REGBYTES(sp) + SREG x7, 7 * REGBYTES(sp) + SREG x8, 8 * REGBYTES(sp) + SREG x9, 9 * REGBYTES(sp) + SREG x10, 10 * REGBYTES(sp) + SREG x11, 11 * REGBYTES(sp) + SREG x12, 12 * REGBYTES(sp) + SREG x13, 13 * REGBYTES(sp) + SREG x14, 14 * REGBYTES(sp) + SREG x15, 15 * REGBYTES(sp) + SREG x16, 16 * REGBYTES(sp) + SREG x17, 17 * REGBYTES(sp) + SREG x18, 18 * REGBYTES(sp) + SREG x19, 19 * REGBYTES(sp) + SREG x20, 20 * REGBYTES(sp) + SREG x21, 21 * REGBYTES(sp) + SREG x22, 22 * REGBYTES(sp) + SREG x23, 23 * REGBYTES(sp) + SREG x24, 24 * REGBYTES(sp) + SREG x25, 25 * REGBYTES(sp) + SREG x26, 26 * REGBYTES(sp) + SREG x27, 27 * REGBYTES(sp) + SREG x28, 28 * REGBYTES(sp) + SREG x29, 29 * REGBYTES(sp) + SREG x30, 30 * REGBYTES(sp) + SREG x31, 31 * REGBYTES(sp) + csrr a0, MODE_PREFIX(cause) + csrr a1, MODE_PREFIX(epc) + mv a2, sp + jal handle_trap + csrw MODE_PREFIX(epc), a0 + +#ifdef CONFIG_RISCV_SMODE + /* Remain in S-mode after sret */ + li t0, SSTATUS_SPP +#else + /* Remain in M-mode after mret */ + li t0, MSTATUS_MPP +#endif + csrs MODE_PREFIX(status), t0 + LREG x1, 1 * REGBYTES(sp) + LREG x2, 2 * REGBYTES(sp) + LREG x3, 3 * REGBYTES(sp) + LREG x4, 4 * REGBYTES(sp) + LREG x5, 5 * REGBYTES(sp) + LREG x6, 6 * REGBYTES(sp) + LREG x7, 7 * REGBYTES(sp) + LREG x8, 8 * REGBYTES(sp) + LREG x9, 9 * REGBYTES(sp) + LREG x10, 10 * REGBYTES(sp) + LREG x11, 11 * REGBYTES(sp) + LREG x12, 12 * REGBYTES(sp) + LREG x13, 13 * REGBYTES(sp) + LREG x14, 14 * REGBYTES(sp) + LREG x15, 15 * REGBYTES(sp) + LREG x16, 16 * REGBYTES(sp) + LREG x17, 17 * REGBYTES(sp) + LREG x18, 18 * REGBYTES(sp) + LREG x19, 19 * REGBYTES(sp) + LREG x20, 20 * REGBYTES(sp) + LREG x21, 21 * REGBYTES(sp) + LREG x22, 22 * REGBYTES(sp) + LREG x23, 23 * REGBYTES(sp) + LREG x24, 24 * REGBYTES(sp) + LREG x25, 25 * REGBYTES(sp) + LREG x26, 26 * REGBYTES(sp) + LREG x27, 27 * REGBYTES(sp) + LREG x28, 28 * REGBYTES(sp) + LREG x29, 29 * REGBYTES(sp) + LREG x30, 30 * REGBYTES(sp) + LREG x31, 31 * REGBYTES(sp) + addi sp, sp, 32 * REGBYTES + MODE_PREFIX(ret) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 64246a4..47c3bf0 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -198,92 +198,3 @@ call_board_init_r: * jump to it ... */ jr t4 /* jump to board_init_r() */ - -/* - * trap entry - */ -.align 2 -trap_entry: - addisp, sp, -32*REGBYTES - SREGx1, 1*REGBYTES(sp) - SREGx2, 2*REGBYTES(sp) - SREGx3, 3*REGBYTES(sp) - SREGx4, 4*REGBYTES(sp) - SREGx5, 5*REGBYTES(sp) - SREGx6, 6*REGBYTES(sp) - SREGx7, 7*REGBYTES(sp) - SREGx8, 8*REGBYTES(sp) - SREGx9, 9*REGBYTES(sp) - SREGx10, 10*REGBYTES(sp) - SREGx11, 11*REGBYTES(sp) - SREGx12,
[U-Boot] [PATCH v2 16/20] riscv: Do some basic architecture level cpu initialization
Implement arch_cpu_init() to do some basic architecture level cpu
initialization, like FPU enable, etc.
Signed-off-by: Bin Meng
---
Changes in v2:
- use csr_set() to set MSTATUS_FS
- only enabling the cycle, time, and instret counters
- change to use satp
arch/riscv/cpu/cpu.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 3858e51..194799c 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -7,6 +7,7 @@
#include
#include
#include
+#include
/*
* prior_stage_fdt_address must be stored in the data section since it is used
@@ -67,3 +68,21 @@ int arch_early_init_r(void)
return 0;
}
+
+int arch_cpu_init(void)
+{
+ /* Enable FPU */
+ if (supports_extension('d') || supports_extension('f')) {
+ csr_set(MODE_PREFIX(status), MSTATUS_FS);
+ csr_write(fcsr, 0);
+ }
+
+ /* Enable perf counters for cycle, time, and instret counters only */
+ csr_write(MODE_PREFIX(counteren), GENMASK(2, 0));
+
+ /* Disable paging */
+ if (supports_extension('s'))
+ csr_write(satp, 0);
+
+ return 0;
+}
--
2.7.4
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[U-Boot] [PATCH v2 14/20] riscv: Add exception codes for xcause register
This adds all exception codes in encoding.h. Signed-off-by: Bin Meng --- Changes in v2: None arch/riscv/include/asm/encoding.h | 15 +++ 1 file changed, 15 insertions(+) diff --git a/arch/riscv/include/asm/encoding.h b/arch/riscv/include/asm/encoding.h index c910d5c..e6d905a 100644 --- a/arch/riscv/include/asm/encoding.h +++ b/arch/riscv/include/asm/encoding.h @@ -85,6 +85,21 @@ #define IRQ_COP12 #define IRQ_HOST 13 +#define CAUSE_MISALIGNED_FETCH 0 +#define CAUSE_FETCH_ACCESS 1 +#define CAUSE_ILLEGAL_INSTRUCTION 2 +#define CAUSE_BREAKPOINT 3 +#define CAUSE_MISALIGNED_LOAD 4 +#define CAUSE_LOAD_ACCESS 5 +#define CAUSE_MISALIGNED_STORE 6 +#define CAUSE_STORE_ACCESS 7 +#define CAUSE_USER_ECALL 8 +#define CAUSE_SUPERVISOR_ECALL 9 +#define CAUSE_MACHINE_ECALL11 +#define CAUSE_FETCH_PAGE_FAULT 12 +#define CAUSE_LOAD_PAGE_FAULT 13 +#define CAUSE_STORE_PAGE_FAULT 15 + #define DEFAULT_RSTVEC 0x1000 #define DEFAULT_NMIVEC 0x1004 #define DEFAULT_MTVEC 0x1010 -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 10/20] riscv: qemu: Add platform-specific Kconfig options
Add the QEMU RISC-V platform-specific Kconfig options, to include CPU and timer drivers. Signed-off-by: Bin Meng Reviewed-by: Lukas Auer --- Changes in v2: - add CMD_CPU as well arch/riscv/Kconfig | 1 + arch/riscv/cpu/qemu/Kconfig| 11 +++ board/emulation/qemu-riscv/Kconfig | 1 + 3 files changed, 13 insertions(+) create mode 100644 arch/riscv/cpu/qemu/Kconfig diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 7dc6e3f..39ca2d8 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -22,6 +22,7 @@ source "board/emulation/qemu-riscv/Kconfig" # platform-specific options below source "arch/riscv/cpu/ax25/Kconfig" +source "arch/riscv/cpu/qemu/Kconfig" # architecture-specific options below diff --git a/arch/riscv/cpu/qemu/Kconfig b/arch/riscv/cpu/qemu/Kconfig new file mode 100644 index 000..2e953e1 --- /dev/null +++ b/arch/riscv/cpu/qemu/Kconfig @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2018, Bin Meng + +config QEMU_RISCV + bool + imply CPU + imply CPU_RISCV + imply RISCV_TIMER + imply SIFIVE_CLINT if RISCV_MMODE + imply CMD_CPU diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index 56bb533..ed005e5 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -18,6 +18,7 @@ config SYS_TEXT_BASE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y + select QEMU_RISCV imply SYS_NS16550 imply VIRTIO_MMIO imply VIRTIO_NET -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 19/20] riscv: Return to previous privilege level after trap handling
At present the trap handler returns to M-mode only. Change to returning to previous privilege level instead. Signed-off-by: Bin Meng Reviewed-by: Lukas Auer --- Changes in v2: None arch/riscv/cpu/mtrap.S | 8 1 file changed, 8 deletions(-) diff --git a/arch/riscv/cpu/mtrap.S b/arch/riscv/cpu/mtrap.S index da307e4..407ecfa 100644 --- a/arch/riscv/cpu/mtrap.S +++ b/arch/riscv/cpu/mtrap.S @@ -68,14 +68,6 @@ trap_entry: jal handle_trap csrw MODE_PREFIX(epc), a0 -#ifdef CONFIG_RISCV_SMODE - /* Remain in S-mode after sret */ - li t0, SSTATUS_SPP -#else - /* Remain in M-mode after mret */ - li t0, MSTATUS_MPP -#endif - csrs MODE_PREFIX(status), t0 LREG x1, 1 * REGBYTES(sp) LREG x3, 3 * REGBYTES(sp) LREG x4, 4 * REGBYTES(sp) -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 11/20] riscv: Enlarge the default SYS_MALLOC_F_LEN
Increase the heap size for the pre-relocation stage, so that CPU driver can be loaded. Signed-off-by: Bin Meng Reviewed-by: Lukas Auer --- Changes in v2: None arch/riscv/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 39ca2d8..c45e4d7 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -113,4 +113,7 @@ config RISCV_RDTIME standard rdtime instruction. This is the case for S-mode U-Boot, and is useful for processors that support rdtime in M-mode too. +config SYS_MALLOC_F_LEN + default 0x1000 + endmenu -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 06/20] riscv: ax25: Hide the ax25-specific Kconfig option
There is no need to expose RISCV_NDS to the Kconfig menu as it is an ax25-specific option. Signed-off-by: Bin Meng --- Changes in v2: None arch/riscv/cpu/ax25/Kconfig | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/riscv/cpu/ax25/Kconfig b/arch/riscv/cpu/ax25/Kconfig index 6c7022f..5ff9e5c 100644 --- a/arch/riscv/cpu/ax25/Kconfig +++ b/arch/riscv/cpu/ax25/Kconfig @@ -1,7 +1,5 @@ config RISCV_NDS - bool "AndeStar V5 ISA support" - default n + bool help - Say Y here if you plan to run U-Boot on AndeStar v5 - platforms and use some specific features which are - provided by Andes Technology AndeStar V5 Families. + Run U-Boot on AndeStar v5 platforms and use some specific features + which are provided by Andes Technology AndeStar V5 Families. -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 05/20] timer: Add generic driver for RISC-V privileged architecture defined timer
RISC-V privileged architecture v1.10 defines a real-time counter,
exposed as a memory-mapped machine-mode register - mtime. mtime must
run at constant frequency, and the platform must provide a mechanism
for determining the timebase of mtime. The mtime register has a
64-bit precision on all RV32, RV64, and RV128 systems.
Different platform may have different implementation of the mtime
block hence an API riscv_get_time() is required by this driver for
platform codes to hide such implementation details. For example,
on some platforms mtime is provided by the CLINT module, while on
some other platforms a simple 'rdtime' can be used to get the timer
counter.
With this timer driver the U-Boot timer functionalities like delay
works correctly now.
Signed-off-by: Bin Meng
---
Changes in v2:
- remove the probe to syscon driver in the timer probe, to make the
driver generic, and rely on platform codes to provide the API
riscv_get_time().
drivers/timer/Kconfig | 8 +++
drivers/timer/Makefile | 1 +
drivers/timer/riscv_timer.c | 57 +
3 files changed, 66 insertions(+)
create mode 100644 drivers/timer/riscv_timer.c
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index b0e6f32..8995979 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -126,6 +126,14 @@ config OMAP_TIMER
help
Select this to enable an timer for Omap devices.
+config RISCV_TIMER
+ bool "RISC-V timer support"
+ depends on RISCV && TIMER
+ select RISCV_CLINT
+ help
+ Select this to enable support for the timer as defined
+ by the RISC-V privileged architecture spec v1.10.
+
config ROCKCHIP_TIMER
bool "Rockchip timer support"
depends on TIMER
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index c4fbab2..d0bf218 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence-ttc.o
obj-$(CONFIG_DESIGNWARE_APB_TIMER) += dw-apb-timer.o
obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o
obj-$(CONFIG_OMAP_TIMER) += omap-timer.o
+obj-$(CONFIG_RISCV_TIMER) += riscv_timer.o
obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o
obj-$(CONFIG_SANDBOX_TIMER)+= sandbox_timer.o
obj-$(CONFIG_STI_TIMER)+= sti-timer.o
diff --git a/drivers/timer/riscv_timer.c b/drivers/timer/riscv_timer.c
new file mode 100644
index 000..ef3bedc
--- /dev/null
+++ b/drivers/timer/riscv_timer.c
@@ -0,0 +1,57 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018, Bin Meng
+ *
+ * RISC-V privileged architecture defined generic timer driver
+ *
+ * This driver relies on RISC-V platform codes to provide the essential API
+ * riscv_get_time() which is supposed to return the timer counter as defined
+ * by the RISC-V privileged architecture spec v1.10.
+ *
+ * This driver can be used by both M-mode and S-mode.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+/**
+ * riscv_get_time() - get the timer counter
+ *
+ * Platform codes should provide this API in order to make this driver
function.
+ *
+ * @return:64-bit timer counter as defined by the RISC-V privileged
+ * architecture spec v1.10.
+ */
+extern u64 riscv_get_time(void);
+
+static int riscv_timer_get_count(struct udevice *dev, u64 *count)
+{
+ *count = riscv_get_time();
+
+ return 0;
+}
+
+static int riscv_timer_probe(struct udevice *dev)
+{
+ struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+ /* clock frequency was passed from the cpu driver as driver data */
+ uc_priv->clock_rate = dev->driver_data;
+
+ return 0;
+}
+
+static const struct timer_ops riscv_timer_ops = {
+ .get_count = riscv_timer_get_count,
+};
+
+U_BOOT_DRIVER(riscv_timer) = {
+ .name = "riscv_timer",
+ .id = UCLASS_TIMER,
+ .probe = riscv_timer_probe,
+ .ops = _timer_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
--
2.7.4
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[U-Boot] [PATCH v2 09/20] riscv: Implement riscv_get_time() API using rdtime instruction
From: Anup Patel
This adds an implementation of riscv_get_time() API that is using
rdtime instruction.
This is the case for S-mode U-Boot, and is useful for processors
that support rdtime in M-mode too.
Signed-off-by: Anup Patel
Signed-off-by: Bin Meng
---
Changes in v2:
- incorporated and reworked Anup's S-mode timer patch
@ http://patchwork.ozlabs.org/patch/1006663/
arch/riscv/Kconfig | 8
arch/riscv/lib/Makefile | 1 +
arch/riscv/lib/rdtime.c | 36
3 files changed, 45 insertions(+)
create mode 100644 arch/riscv/lib/rdtime.c
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index f513f52..7dc6e3f 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -104,4 +104,12 @@ config SIFIVE_CLINT
The SiFive CLINT block holds memory-mapped control and status
registers
associated with software and timer interrupts.
+config RISCV_RDTIME
+ bool
+ default y if RISCV_SMODE
+ help
+ The provides the riscv_get_time() API that is implemented using the
+ standard rdtime instruction. This is the case for S-mode U-Boot, and
+ is useful for processors that support rdtime in M-mode too.
+
endmenu
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index b13c876..edfa616 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -9,6 +9,7 @@
obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-$(CONFIG_CMD_GO) += boot.o
obj-y += cache.o
+obj-$(CONFIG_RISCV_RDTIME) += rdtime.o
obj-$(CONFIG_SIFIVE_CLINT) += sifive_clint.o
obj-y += interrupts.o
obj-y += reset.o
diff --git a/arch/riscv/lib/rdtime.c b/arch/riscv/lib/rdtime.c
new file mode 100644
index 000..b16680f
--- /dev/null
+++ b/arch/riscv/lib/rdtime.c
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018, Anup Patel
+ * Copyright (C) 2018, Bin Meng
+ *
+ * The riscv_get_time() API implementation that is using the
+ * standard rdtime instruction.
+ */
+
+#include
+
+/* Implement the API required by RISC-V timer driver */
+u64 riscv_get_time(void)
+{
+#ifdef CONFIG_64BIT
+ u64 n;
+
+ __asm__ __volatile__ (
+ "rdtime %0"
+ : "=r" (n));
+
+ return n;
+#else
+ u32 lo, hi, tmp;
+
+ __asm__ __volatile__ (
+ "1:\n"
+ "rdtimeh %0\n"
+ "rdtime %1\n"
+ "rdtimeh %2\n"
+ "bne %0, %2, 1b"
+ : "=" (hi), "=" (lo), "=" (tmp));
+
+ return ((u64)hi << 32) | lo;
+#endif
+}
--
2.7.4
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Re: [U-Boot] [PATCH v2] rockchip: rk3288-evb: dts: remove 'vmmc' from emmc node
On Fri, Dec 07, 2018 at 02:24:22PM +0100, Philipp Tomsich wrote: > Kever, > > > On 07.12.2018, at 02:39, Kever Yang wrote: > > > > Hi Philipp, > > > > On 12/06/2018 09:50 PM, Philipp Tomsich wrote: > >> +Tom > >> > >>> On 05.12.2018, at 03:25, Kever Yang wrote: > >>> > >>> The U-Boot eMMC does not need to care about the power for Rockchip > >>> SoC, because if the board is using eMMC, the power will default on > >>> (for bootrom), and we do not do power management for it like kernel, > >>> so the 'vmmc', 'vqmmc' is only useful for SD in U-Boot. > >>> > >>> This make U-Boot can boot into kernel even if the pmic driver is > >>> broken. > >> If the PMIC driver is broken, we should fix the PMIC driver. > >> I would feel more comfortable w/o this statement. > >> > >>> The rk3288-evb dts may be used in many boards using rockchip reference > >>> schematic but with little change, so we hope it can be more robust to > >>> boot into next stage. > >> Again, this is not how the DTS should be used. I believe that Heiko, > >> Fabio and > >> I had already highlighted this in comments to the earlier thread. > > > > Not sure if you have read my previous mail for answer all your comments, > > > > I do agree DTS should represent the hardware, but please note that the DTS > > is no kind of standard, and people always choose what they need and add > > those part in there dts, but not always add all the property and > > everyone use the same model. I would say there are many boards does not > > have this > > 'vmmc-supply’ in there emmc node. > > That is exactly the reason why I bumped the decision up the stairs (to Tom > and/or > Simon): what you are saying makes sense to me (viewed through your eyes and > from your specific usecase), but it directly contradicts how the DTS usage is > intended. > > In other words: Tom (as the top-level decision maker) or Simon (who owns the > device-model and therefore will also have an opinion on DTS usage) should make > the final call. My answer is that I would strongly suspect that over in linux "we have N different close-enough boards using this one DTS" isn't acceptable. You make a dtsi and include it from the board and things that aren't common don't go into the dtsi. And yes, when starting off everyone (myself included) copies the reference platform dts and then changes it as needed, and sometimes misses a thing or two. But no, I don't think we want a wrong dts and I'm pretty sure the kernel really wouldn't want wrong dts files and the general goal is that excluding the -u-boot.dtsi files, ours are copies of the kernel. -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 20/20] riscv: Adjust the _exit_trap() position to come before handle_trap()
With this change, we can avoid a forward declaration.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v2:
- rebase on u-boot/master
- drop the patch "riscv: Pass correct exception code to _exit_trap()"
- drop the patch "riscv: Refactor handle_trap() a little for future extension"
- drop the patch "riscv: Allow U-Boot to run on hart 0 only", and
leave the SMP support to Lukas's future patch series
arch/riscv/lib/interrupts.c | 62 ++---
1 file changed, 30 insertions(+), 32 deletions(-)
diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c
index 3aff006..e185933 100644
--- a/arch/riscv/lib/interrupts.c
+++ b/arch/riscv/lib/interrupts.c
@@ -12,7 +12,36 @@
#include
#include
-static void _exit_trap(ulong code, ulong epc, struct pt_regs *regs);
+static void _exit_trap(ulong code, ulong epc, struct pt_regs *regs)
+{
+ static const char * const exception_code[] = {
+ "Instruction address misaligned",
+ "Instruction access fault",
+ "Illegal instruction",
+ "Breakpoint",
+ "Load address misaligned",
+ "Load access fault",
+ "Store/AMO address misaligned",
+ "Store/AMO access fault",
+ "Environment call from U-mode",
+ "Environment call from S-mode",
+ "Reserved",
+ "Environment call from M-mode",
+ "Instruction page fault",
+ "Load page fault",
+ "Reserved",
+ "Store/AMO page fault",
+ };
+
+ if (code < ARRAY_SIZE(exception_code)) {
+ printf("exception code: %ld , %s , epc %lx , ra %lx\n",
+ code, exception_code[code], epc, regs->ra);
+ } else {
+ printf("Reserved\n");
+ }
+
+ hang();
+}
int interrupt_init(void)
{
@@ -72,34 +101,3 @@ __attribute__((weak)) void external_interrupt(struct
pt_regs *regs)
__attribute__((weak)) void timer_interrupt(struct pt_regs *regs)
{
}
-
-static void _exit_trap(ulong code, ulong epc, struct pt_regs *regs)
-{
- static const char * const exception_code[] = {
- "Instruction address misaligned",
- "Instruction access fault",
- "Illegal instruction",
- "Breakpoint",
- "Load address misaligned",
- "Load access fault",
- "Store/AMO address misaligned",
- "Store/AMO access fault",
- "Environment call from U-mode",
- "Environment call from S-mode",
- "Reserved",
- "Environment call from M-mode",
- "Instruction page fault",
- "Load page fault",
- "Reserved",
- "Store/AMO page fault",
- };
-
- if (code < ARRAY_SIZE(exception_code)) {
- printf("exception code: %ld , %s , epc %lx , ra %lx\n",
- code, exception_code[code], epc, regs->ra);
- } else {
- printf("Reserved\n");
- }
-
- hang();
-}
--
2.7.4
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[U-Boot] [PATCH v2 13/20] riscv: Add CSR numbers
The standard RISC-V ISA sets aside a 12-bit encoding space for up to 4096 CSRs. This adds all known CSR numbers as defined in the RISC-V Privileged Architecture Version 1.10. Signed-off-by: Bin Meng --- Changes in v2: None arch/riscv/include/asm/encoding.h | 219 ++ 1 file changed, 219 insertions(+) diff --git a/arch/riscv/include/asm/encoding.h b/arch/riscv/include/asm/encoding.h index 97cf906..c910d5c 100644 --- a/arch/riscv/include/asm/encoding.h +++ b/arch/riscv/include/asm/encoding.h @@ -152,6 +152,225 @@ #define RISCV_PGSHIFT 12 #define RISCV_PGSIZE BIT(RISCV_PGSHIFT) +/* CSR numbers */ +#define CSR_FFLAGS 0x1 +#define CSR_FRM0x2 +#define CSR_FCSR 0x3 + +#define CSR_SSTATUS0x100 +#define CSR_SIE0x104 +#define CSR_STVEC 0x105 +#define CSR_SCOUNTEREN 0x106 +#define CSR_SSCRATCH 0x140 +#define CSR_SEPC 0x141 +#define CSR_SCAUSE 0x142 +#define CSR_STVAL 0x143 +#define CSR_SIP0x144 +#define CSR_SATP 0x180 + +#define CSR_MSTATUS0x300 +#define CSR_MISA 0x301 +#define CSR_MEDELEG0x302 +#define CSR_MIDELEG0x303 +#define CSR_MIE0x304 +#define CSR_MTVEC 0x305 +#define CSR_MCOUNTEREN 0x306 +#define CSR_MHPMEVENT3 0x323 +#define CSR_MHPMEVENT4 0x324 +#define CSR_MHPMEVENT5 0x325 +#define CSR_MHPMEVENT6 0x326 +#define CSR_MHPMEVENT7 0x327 +#define CSR_MHPMEVENT8 0x328 +#define CSR_MHPMEVENT9 0x329 +#define CSR_MHPMEVENT100x32a +#define CSR_MHPMEVENT110x32b +#define CSR_MHPMEVENT120x32c +#define CSR_MHPMEVENT130x32d +#define CSR_MHPMEVENT140x32e +#define CSR_MHPMEVENT150x32f +#define CSR_MHPMEVENT160x330 +#define CSR_MHPMEVENT170x331 +#define CSR_MHPMEVENT180x332 +#define CSR_MHPMEVENT190x333 +#define CSR_MHPMEVENT200x334 +#define CSR_MHPMEVENT210x335 +#define CSR_MHPMEVENT220x336 +#define CSR_MHPMEVENT230x337 +#define CSR_MHPMEVENT240x338 +#define CSR_MHPMEVENT250x339 +#define CSR_MHPMEVENT260x33a +#define CSR_MHPMEVENT270x33b +#define CSR_MHPMEVENT280x33c +#define CSR_MHPMEVENT290x33d +#define CSR_MHPMEVENT300x33e +#define CSR_MHPMEVENT310x33f +#define CSR_MSCRATCH 0x340 +#define CSR_MEPC 0x341 +#define CSR_MCAUSE 0x342 +#define CSR_MTVAL 0x343 +#define CSR_MIP0x344 +#define CSR_PMPCFG00x3a0 +#define CSR_PMPCFG10x3a1 +#define CSR_PMPCFG20x3a2 +#define CSR_PMPCFG30x3a3 +#define CSR_PMPADDR0 0x3b0 +#define CSR_PMPADDR1 0x3b1 +#define CSR_PMPADDR2 0x3b2 +#define CSR_PMPADDR3 0x3b3 +#define CSR_PMPADDR4 0x3b4 +#define CSR_PMPADDR5 0x3b5 +#define CSR_PMPADDR6 0x3b6 +#define CSR_PMPADDR7 0x3b7 +#define CSR_PMPADDR8 0x3b8 +#define CSR_PMPADDR9 0x3b9 +#define CSR_PMPADDR10 0x3ba +#define CSR_PMPADDR11 0x3bb +#define CSR_PMPADDR12 0x3bc +#define CSR_PMPADDR13 0x3bd +#define CSR_PMPADDR14 0x3be +#define CSR_PMPADDR15 0x3bf + +#define CSR_TSELECT0x7a0 +#define CSR_TDATA1 0x7a1 +#define CSR_TDATA2 0x7a2 +#define CSR_TDATA3 0x7a3 +#define CSR_DCSR 0x7b0 +#define CSR_DPC0x7b1 +#define CSR_DSCRATCH 0x7b2 + +#define CSR_MCYCLE 0xb00 +#define CSR_MINSTRET 0xb02 +#define CSR_MHPMCOUNTER3 0xb03 +#define CSR_MHPMCOUNTER4 0xb04 +#define CSR_MHPMCOUNTER5 0xb05 +#define CSR_MHPMCOUNTER6 0xb06 +#define CSR_MHPMCOUNTER7 0xb07 +#define CSR_MHPMCOUNTER8 0xb08 +#define CSR_MHPMCOUNTER9 0xb09 +#define CSR_MHPMCOUNTER10 0xb0a +#define CSR_MHPMCOUNTER11 0xb0b +#define CSR_MHPMCOUNTER12 0xb0c +#define CSR_MHPMCOUNTER13 0xb0d +#define CSR_MHPMCOUNTER14 0xb0e +#define CSR_MHPMCOUNTER15 0xb0f +#define CSR_MHPMCOUNTER16 0xb10 +#define CSR_MHPMCOUNTER17 0xb11 +#define CSR_MHPMCOUNTER18 0xb12 +#define CSR_MHPMCOUNTER19 0xb13 +#define CSR_MHPMCOUNTER20 0xb14 +#define CSR_MHPMCOUNTER21 0xb15 +#define CSR_MHPMCOUNTER22 0xb16 +#define CSR_MHPMCOUNTER23 0xb17 +#define CSR_MHPMCOUNTER24 0xb18 +#define CSR_MHPMCOUNTER25 0xb19 +#define CSR_MHPMCOUNTER26 0xb1a +#define CSR_MHPMCOUNTER27 0xb1b +#define
[U-Boot] [PATCH v2 08/20] riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
This adds U-Boot syscon driver for SiFive's Core Local Interruptor
(CLINT). The CLINT block holds memory-mapped control and status
registers associated with software and timer interrupts.
This driver implements the riscv_get_time() API as required by
the generic RISC-V timer driver, as well as some other APIs that
are needed for handling IPI.
Signed-off-by: Bin Meng
---
Changes in v2:
- rename the driver name to sifive_clint
- save the clint base address to arch specific global data to support
pre-relocation stage
- remove the probe routine
- add riscv_clear_ipi() API
arch/riscv/Kconfig | 9 +
arch/riscv/include/asm/global_data.h | 3 ++
arch/riscv/include/asm/syscon.h | 19 ++
arch/riscv/lib/Makefile | 1 +
arch/riscv/lib/sifive_clint.c| 68
5 files changed, 100 insertions(+)
create mode 100644 arch/riscv/include/asm/syscon.h
create mode 100644 arch/riscv/lib/sifive_clint.c
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 55c60e4..f513f52 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -95,4 +95,13 @@ config 32BIT
config 64BIT
bool
+config SIFIVE_CLINT
+ bool
+ depends on RISCV_MMODE
+ select REGMAP
+ select SYSCON
+ help
+ The SiFive CLINT block holds memory-mapped control and status
registers
+ associated with software and timer interrupts.
+
endmenu
diff --git a/arch/riscv/include/asm/global_data.h
b/arch/riscv/include/asm/global_data.h
index 4d5d623..46fcfab 100644
--- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -12,6 +12,9 @@
/* Architecture-specific global data */
struct arch_global_data {
+#ifdef CONFIG_SIFIVE_CLINT
+ void __iomem *clint;/* clint base address */
+#endif
};
#include
diff --git a/arch/riscv/include/asm/syscon.h b/arch/riscv/include/asm/syscon.h
new file mode 100644
index 000..d311ee6
--- /dev/null
+++ b/arch/riscv/include/asm/syscon.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018, Bin Meng
+ */
+
+#ifndef _ASM_SYSCON_H
+#define _ASM_SYSCON_H
+
+/*
+ * System controllers in a RISC-V system
+ *
+ * So far only SiFive's Core Local Interruptor (CLINT) is defined.
+ */
+enum {
+ RISCV_NONE,
+ RISCV_SYSCON_CLINT, /* Core Local Interruptor (CLINT) */
+};
+
+#endif /* _ASM_SYSCON_H */
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index b58db89..b13c876 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -9,6 +9,7 @@
obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-$(CONFIG_CMD_GO) += boot.o
obj-y += cache.o
+obj-$(CONFIG_SIFIVE_CLINT) += sifive_clint.o
obj-y += interrupts.o
obj-y += reset.o
obj-y += setjmp.o
diff --git a/arch/riscv/lib/sifive_clint.c b/arch/riscv/lib/sifive_clint.c
new file mode 100644
index 000..2d4bfac
--- /dev/null
+++ b/arch/riscv/lib/sifive_clint.c
@@ -0,0 +1,68 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018, Bin Meng
+ *
+ * U-Boot syscon driver for SiFive's Core Local Interruptor (CLINT).
+ * The CLINT block holds memory-mapped control and status registers
+ * associated with software and timer interrupts.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* MSIP registers */
+#define MSIP_REG(base, hart) ((ulong)(base) + (hart) * 4)
+/* mtime compare register */
+#define MTIMECMP_REG(base, hart) ((ulong)(base) + 0x4000 + (hart) * 8)
+/* mtime register */
+#define MTIME_REG(base)((ulong)(base) + 0xbff8)
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u64 riscv_get_time(void)
+{
+ if (!gd->arch.clint)
+ gd->arch.clint = syscon_get_first_range(RISCV_SYSCON_CLINT);
+
+ return readq((void __iomem *)MTIME_REG(gd->arch.clint));
+}
+
+void riscv_set_timecmp(int hart, u64 cmp)
+{
+ if (!gd->arch.clint)
+ gd->arch.clint = syscon_get_first_range(RISCV_SYSCON_CLINT);
+
+ writeq(cmp, (void __iomem *)MTIMECMP_REG(gd->arch.clint, hart));
+}
+
+void riscv_send_ipi(int hart)
+{
+ if (!gd->arch.clint)
+ gd->arch.clint = syscon_get_first_range(RISCV_SYSCON_CLINT);
+
+ writel(1, (void __iomem *)MSIP_REG(gd->arch.clint, hart));
+}
+
+void riscv_clear_ipi(int hart)
+{
+ if (!gd->arch.clint)
+ gd->arch.clint = syscon_get_first_range(RISCV_SYSCON_CLINT);
+
+ writel(0, (void __iomem *)MSIP_REG(gd->arch.clint, hart));
+}
+
+static const struct udevice_id sifive_clint_ids[] = {
+ { .compatible = "riscv,clint0", .data = RISCV_SYSCON_CLINT },
+ { }
+};
+
+U_BOOT_DRIVER(sifive_clint) = {
+ .name = "sifive_clint",
+ .id = UCLASS_SYSCON,
+ .of_match = sifive_clint_ids,
+ .flags = DM_FLAG_PRE_RELOC,
+};
--
2.7.4
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[U-Boot] [PATCH v2 01/20] riscv: add Kconfig entries for the code model
From: Lukas Auer RISC-V has two code models, medium low (medlow) and medium any (medany). Medlow limits addressable memory to a single 2 GiB range between the absolute addresses -2 GiB and +2 GiB. Medany limits addressable memory to any single 2 GiB address range. By default, medlow is selected for U-Boot on both 32-bit and 64-bit systems. The -mcmodel compiler flag is selected according to the Kconfig configuration. Signed-off-by: Lukas Auer [bmeng: adjust to make medlow the default code model for U-Boot] Signed-off-by: Bin Meng --- Changes in v2: None arch/riscv/Kconfig | 18 ++ arch/riscv/Makefile | 9 - 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 732a357..6d85ac9 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -44,6 +44,24 @@ config ARCH_RV64I endchoice +choice + prompt "Code Model" + default CMODEL_MEDLOW + +config CMODEL_MEDLOW + bool "medium low code model" + help + U-Boot and its statically defined symbols must lie within a single 2 GiB + address range and must lie between absolute addresses -2 GiB and +2 GiB. + +config CMODEL_MEDANY + bool "medium any code model" + help + U-Boot and its statically defined symbols must be within any single 2 GiB + address range. + +endchoice + config RISCV_ISA_C bool "Emit compressed instructions" default y diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 55d7c65..0b80eb8 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -17,8 +17,15 @@ endif ifeq ($(CONFIG_RISCV_ISA_C),y) ARCH_C = c endif +ifeq ($(CONFIG_CMODEL_MEDLOW),y) + CMODEL = medlow +endif +ifeq ($(CONFIG_CMODEL_MEDANY),y) + CMODEL = medany +endif -ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) +ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \ +-mcmodel=$(CMODEL) PLATFORM_CPPFLAGS += $(ARCH_FLAGS) CFLAGS_EFI += $(ARCH_FLAGS) -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 18/20] riscv: Fix context restore before returning from trap handler
sp cannot be loaded before restoring other registers. Signed-off-by: Bin Meng Reviewed-by: Lukas Auer --- Changes in v2: None arch/riscv/cpu/mtrap.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/cpu/mtrap.S b/arch/riscv/cpu/mtrap.S index a5ad558..da307e4 100644 --- a/arch/riscv/cpu/mtrap.S +++ b/arch/riscv/cpu/mtrap.S @@ -77,7 +77,6 @@ trap_entry: #endif csrs MODE_PREFIX(status), t0 LREG x1, 1 * REGBYTES(sp) - LREG x2, 2 * REGBYTES(sp) LREG x3, 3 * REGBYTES(sp) LREG x4, 4 * REGBYTES(sp) LREG x5, 5 * REGBYTES(sp) @@ -107,5 +106,6 @@ trap_entry: LREG x29, 29 * REGBYTES(sp) LREG x30, 30 * REGBYTES(sp) LREG x31, 31 * REGBYTES(sp) + LREG x2, 2 * REGBYTES(sp) addi sp, sp, 32 * REGBYTES MODE_PREFIX(ret) -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 07/20] riscv: Introduce a Kconfig option for machine mode
From: Anup Patel So far we have a Kconfig option for supervisor mode. This adds an option for the machine mode. Signed-off-by: Anup Patel Signed-off-by: Bin Meng --- Changes in v2: - incorporated and reworked Anup's S-mode timer patch @ http://patchwork.ozlabs.org/patch/1006663/ arch/riscv/Kconfig | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 6d85ac9..55c60e4 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -62,6 +62,22 @@ config CMODEL_MEDANY endchoice +choice + prompt "Run Mode" + default RISCV_MMODE + +config RISCV_MMODE + bool "Machine" + help + Choose this option to build U-Boot for RISC-V M-Mode. + +config RISCV_SMODE + bool "Supervisor" + help + Choose this option to build U-Boot for RISC-V S-Mode. + +endchoice + config RISCV_ISA_C bool "Emit compressed instructions" default y @@ -73,11 +89,6 @@ config RISCV_ISA_C config RISCV_ISA_A def_bool y -config RISCV_SMODE - bool "Run in S-Mode" - help - Enable this option to build U-Boot for RISC-V S-Mode - config 32BIT bool -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 15/20] riscv: Add indirect stringification to csr_xxx ops
With current csr_xxx ops, we cannot pass a macro to parameter
'csr', hence we need add another level to allow the parameter
to be a macro itself, aka indirect stringification.
Signed-off-by: Bin Meng
---
Changes in v2:
- new patch to add indirect stringification to csr_xxx ops
arch/riscv/include/asm/csr.h | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index 29624fd..86136f5 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -61,10 +61,12 @@
#ifndef __ASSEMBLY__
+#define xcsr(csr) #csr
+
#define csr_swap(csr, val) \
({ \
unsigned long __v = (unsigned long)(val); \
- __asm__ __volatile__ ("csrrw %0, " #csr ", %1" \
+ __asm__ __volatile__ ("csrrw %0, " xcsr(csr) ", %1" \
: "=r" (__v) : "rK" (__v) \
: "memory"); \
__v;\
@@ -73,7 +75,7 @@
#define csr_read(csr) \
({ \
register unsigned long __v; \
- __asm__ __volatile__ ("csrr %0, " #csr \
+ __asm__ __volatile__ ("csrr %0, " xcsr(csr) \
: "=r" (__v) :\
: "memory"); \
__v;\
@@ -82,7 +84,7 @@
#define csr_write(csr, val)\
({ \
unsigned long __v = (unsigned long)(val); \
- __asm__ __volatile__ ("csrw " #csr ", %0" \
+ __asm__ __volatile__ ("csrw " xcsr(csr) ", %0" \
: : "rK" (__v)\
: "memory"); \
})
@@ -90,7 +92,7 @@
#define csr_read_set(csr, val) \
({ \
unsigned long __v = (unsigned long)(val); \
- __asm__ __volatile__ ("csrrs %0, " #csr ", %1" \
+ __asm__ __volatile__ ("csrrs %0, " xcsr(csr) ", %1" \
: "=r" (__v) : "rK" (__v) \
: "memory"); \
__v;\
@@ -99,7 +101,7 @@
#define csr_set(csr, val) \
({ \
unsigned long __v = (unsigned long)(val); \
- __asm__ __volatile__ ("csrs " #csr ", %0" \
+ __asm__ __volatile__ ("csrs " xcsr(csr) ", %0" \
: : "rK" (__v)\
: "memory"); \
})
@@ -107,7 +109,7 @@
#define csr_read_clear(csr, val) \
({ \
unsigned long __v = (unsigned long)(val); \
- __asm__ __volatile__ ("csrrc %0, " #csr ", %1" \
+ __asm__ __volatile__ ("csrrc %0, " xcsr(csr) ", %1" \
: "=r" (__v) : "rK" (__v) \
: "memory"); \
__v;\
@@ -116,7 +118,7 @@
#define csr_clear(csr, val)\
({ \
unsigned long __v = (unsigned long)(val); \
- __asm__ __volatile__ ("csrc " #csr ", %0" \
+ __asm__ __volatile__ ("csrc " xcsr(csr) ", %0" \
: : "rK" (__v)\
: "memory"); \
})
--
2.7.4
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[U-Boot] [PATCH v2 12/20] riscv: Probe cpus during boot
This calls cpu_probe_all() to probe all available cpus.
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v2:
- move to arch/riscv/cpu/cpu.c
arch/riscv/cpu/cpu.c| 14 ++
arch/riscv/cpu/qemu/Kconfig | 1 +
2 files changed, 15 insertions(+)
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index d9f820c..3858e51 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -4,6 +4,8 @@
*/
#include
+#include
+#include
#include
/*
@@ -53,3 +55,15 @@ int print_cpuinfo(void)
return 0;
}
+
+int arch_early_init_r(void)
+{
+ int ret;
+
+ /* probe cpus so that RISC-V timer can be bound */
+ ret = cpu_probe_all();
+ if (ret)
+ return log_msg_ret("RISC-V cpus probe failed\n", ret);
+
+ return 0;
+}
diff --git a/arch/riscv/cpu/qemu/Kconfig b/arch/riscv/cpu/qemu/Kconfig
index 2e953e1..f48751e 100644
--- a/arch/riscv/cpu/qemu/Kconfig
+++ b/arch/riscv/cpu/qemu/Kconfig
@@ -4,6 +4,7 @@
config QEMU_RISCV
bool
+ select ARCH_EARLY_INIT_R
imply CPU
imply CPU_RISCV
imply RISCV_TIMER
--
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[U-Boot] [PATCH v2 04/20] cpu: Add a RISC-V CPU driver
This adds a driver for RISC-V CPU. Note the driver will bind
a RISC-V timer driver if "timebase-frequency" property is
present in the device tree.
Signed-off-by: Bin Meng
---
Changes in v2:
- pass NULL as the timer device to device_bind_with_driver_data()
drivers/cpu/Kconfig | 6 +++
drivers/cpu/Makefile| 1 +
drivers/cpu/riscv_cpu.c | 116
3 files changed, 123 insertions(+)
create mode 100644 drivers/cpu/riscv_cpu.c
diff --git a/drivers/cpu/Kconfig b/drivers/cpu/Kconfig
index d405200..3d5729f 100644
--- a/drivers/cpu/Kconfig
+++ b/drivers/cpu/Kconfig
@@ -13,3 +13,9 @@ config CPU_MPC83XX
select CLK_MPC83XX
help
Support CPU cores for SoCs of the MPC83xx series.
+
+config CPU_RISCV
+ bool "Enable RISC-V CPU driver"
+ depends on CPU && RISCV
+ help
+ Support CPU cores for RISC-V architecture.
diff --git a/drivers/cpu/Makefile b/drivers/cpu/Makefile
index 858b037..be0300c 100644
--- a/drivers/cpu/Makefile
+++ b/drivers/cpu/Makefile
@@ -8,4 +8,5 @@ obj-$(CONFIG_CPU) += cpu-uclass.o
obj-$(CONFIG_ARCH_BMIPS) += bmips_cpu.o
obj-$(CONFIG_CPU_MPC83XX) += mpc83xx_cpu.o
+obj-$(CONFIG_CPU_RISCV) += riscv_cpu.o
obj-$(CONFIG_SANDBOX) += cpu_sandbox.o
diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
new file mode 100644
index 000..5e15df5
--- /dev/null
+++ b/drivers/cpu/riscv_cpu.c
@@ -0,0 +1,116 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018, Bin Meng
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+static int riscv_cpu_get_desc(struct udevice *dev, char *buf, int size)
+{
+ const char *isa;
+
+ isa = dev_read_string(dev, "riscv,isa");
+ if (size < (strlen(isa) + 1))
+ return -ENOSPC;
+
+ strcpy(buf, isa);
+
+ return 0;
+}
+
+static int riscv_cpu_get_info(struct udevice *dev, struct cpu_info *info)
+{
+ const char *mmu;
+
+ dev_read_u32(dev, "clock-frequency", (u32 *)>cpu_freq);
+
+ mmu = dev_read_string(dev, "mmu-type");
+ if (!mmu)
+ info->features |= BIT(CPU_FEAT_MMU);
+
+ return 0;
+}
+
+static int riscv_cpu_get_count(struct udevice *dev)
+{
+ ofnode node;
+ int num = 0;
+
+ ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
+ const char *device_type;
+
+ device_type = ofnode_read_string(node, "device_type");
+ if (!device_type)
+ continue;
+ if (strcmp(device_type, "cpu") == 0)
+ num++;
+ }
+
+ return num;
+}
+
+static int riscv_cpu_bind(struct udevice *dev)
+{
+ struct cpu_platdata *plat = dev_get_parent_platdata(dev);
+ struct driver *drv;
+ int ret;
+
+ /* save the hart id */
+ plat->cpu_id = dev_read_addr(dev);
+
+ /* first examine the property in current cpu node */
+ ret = dev_read_u32(dev, "timebase-frequency", >timebase_freq);
+ /* if not found, then look at the parent /cpus node */
+ if (ret)
+ dev_read_u32(dev->parent, "timebase-frequency",
+>timebase_freq);
+
+ /*
+* Bind riscv-timer driver on hart 0
+*
+* We only instantiate one timer device which is enough for U-Boot.
+* Pass the "timebase-frequency" value as the driver data for the
+* timer device.
+*
+* Return value is not checked since it's possible that the timer
+* driver is not included.
+*/
+ if (!plat->cpu_id && plat->timebase_freq) {
+ drv = lists_driver_lookup_name("riscv_timer");
+ if (!drv) {
+ debug("Cannot find the timer driver, not included?\n");
+ return 0;
+ }
+
+ device_bind_with_driver_data(dev, drv, "riscv_timer",
+plat->timebase_freq, ofnode_null(),
+NULL);
+ }
+
+ return 0;
+}
+
+static const struct cpu_ops riscv_cpu_ops = {
+ .get_desc = riscv_cpu_get_desc,
+ .get_info = riscv_cpu_get_info,
+ .get_count = riscv_cpu_get_count,
+};
+
+static const struct udevice_id riscv_cpu_ids[] = {
+ { .compatible = "riscv" },
+ { }
+};
+
+U_BOOT_DRIVER(riscv_cpu) = {
+ .name = "riscv_cpu",
+ .id = UCLASS_CPU,
+ .of_match = riscv_cpu_ids,
+ .bind = riscv_cpu_bind,
+ .ops = _cpu_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
--
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[U-Boot] [PATCH v2 02/20] dm: cpu: Add timebase frequency to the platdata
This adds a timebase_freq member to the 'struct cpu_platdata', to
hold the "timebase-frequency" value in the cpu or /cpus node.
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
Reviewed-by: Lukas Auer
---
Changes in v2:
- Use 'Hz' instead of 'HZ'
include/cpu.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/cpu.h b/include/cpu.h
index 367c5f4..28dd48f 100644
--- a/include/cpu.h
+++ b/include/cpu.h
@@ -14,6 +14,8 @@
* @device_id: Driver-defined device identifier
* @family:DMTF CPU Family identifier
* @id:DMTF CPU Processor identifier
+ * @timebase_freq: the current frequency at which the cpu timer timebase
+ *registers are updated (in Hz)
*
* This can be accessed with dev_get_parent_platdata() for any UCLASS_CPU
* device.
@@ -24,6 +26,7 @@ struct cpu_platdata {
ulong device_id;
u16 family;
u32 id[2];
+ u32 timebase_freq;
};
/* CPU features - mostly just a placeholder for now */
--
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[U-Boot] [PATCH v2 03/20] riscv: qemu: Create a simple-bus driver for the soc node
To enumerate devices on the /soc/ node, create a "simple-bus"
driver to match "riscv-virtio-soc".
Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
---
Changes in v2:
- add DM_FLAG_PRE_RELOC flag to the simple-bus driver
arch/riscv/cpu/qemu/cpu.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/riscv/cpu/qemu/cpu.c b/arch/riscv/cpu/qemu/cpu.c
index 25d97d0..ad2950c 100644
--- a/arch/riscv/cpu/qemu/cpu.c
+++ b/arch/riscv/cpu/qemu/cpu.c
@@ -4,6 +4,7 @@
*/
#include
+#include
/*
* cleanup_before_linux() is called just before we call linux
@@ -19,3 +20,16 @@ int cleanup_before_linux(void)
return 0;
}
+
+/* To enumerate devices on the /soc/ node, create a "simple-bus" driver */
+static const struct udevice_id riscv_virtio_soc_ids[] = {
+ { .compatible = "riscv-virtio-soc" },
+ { }
+};
+
+U_BOOT_DRIVER(riscv_virtio_soc) = {
+ .name = "riscv_virtio_soc",
+ .id = UCLASS_SIMPLE_BUS,
+ .of_match = riscv_virtio_soc_ids,
+ .flags = DM_FLAG_PRE_RELOC,
+};
--
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[U-Boot] [PATCH v2 00/20] riscv: Adding RISC-V CPU and timer driver
This adds DM drivers to support RISC-V CPU and timer, plus some bug fixes. This series is available at u-boot-x86/riscv-working for testing. Changes in v2: - Use 'Hz' instead of 'HZ' - add DM_FLAG_PRE_RELOC flag to the simple-bus driver - pass NULL as the timer device to device_bind_with_driver_data() - remove the probe to syscon driver in the timer probe, to make the driver generic, and rely on platform codes to provide the API riscv_get_time(). - incorporated and reworked Anup's S-mode timer patch @ http://patchwork.ozlabs.org/patch/1006663/ - rename the driver name to sifive_clint - save the clint base address to arch specific global data to support pre-relocation stage - remove the probe routine - add riscv_clear_ipi() API - incorporated and reworked Anup's S-mode timer patch @ http://patchwork.ozlabs.org/patch/1006663/ - add CMD_CPU as well - move to arch/riscv/cpu/cpu.c - new patch to add indirect stringification to csr_xxx ops - use csr_set() to set MSTATUS_FS - only enabling the cycle, time, and instret counters - change to use satp - rebase on u-boot/master - drop the patch "riscv: Pass correct exception code to _exit_trap()" - drop the patch "riscv: Refactor handle_trap() a little for future extension" - drop the patch "riscv: Allow U-Boot to run on hart 0 only", and leave the SMP support to Lukas's future patch series Anup Patel (2): riscv: Introduce a Kconfig option for machine mode riscv: Implement riscv_get_time() API using rdtime instruction Bin Meng (17): dm: cpu: Add timebase frequency to the platdata riscv: qemu: Create a simple-bus driver for the soc node cpu: Add a RISC-V CPU driver timer: Add generic driver for RISC-V privileged architecture defined timer riscv: ax25: Hide the ax25-specific Kconfig option riscv: Add a SYSCON driver for SiFive's Core Local Interruptor riscv: qemu: Add platform-specific Kconfig options riscv: Enlarge the default SYS_MALLOC_F_LEN riscv: Probe cpus during boot riscv: Add CSR numbers riscv: Add exception codes for xcause register riscv: Add indirect stringification to csr_xxx ops riscv: Do some basic architecture level cpu initialization riscv: Move trap handler codes to mtrap.S riscv: Fix context restore before returning from trap handler riscv: Return to previous privilege level after trap handling riscv: Adjust the _exit_trap() position to come before handle_trap() Lukas Auer (1): riscv: add Kconfig entries for the code model arch/riscv/Kconfig | 60 - arch/riscv/Makefile | 9 +- arch/riscv/cpu/Makefile | 2 +- arch/riscv/cpu/ax25/Kconfig | 8 +- arch/riscv/cpu/cpu.c | 33 + arch/riscv/cpu/mtrap.S | 103 +++ arch/riscv/cpu/qemu/Kconfig | 12 ++ arch/riscv/cpu/qemu/cpu.c| 14 +++ arch/riscv/cpu/start.S | 89 - arch/riscv/include/asm/csr.h | 16 +-- arch/riscv/include/asm/encoding.h| 234 +++ arch/riscv/include/asm/global_data.h | 3 + arch/riscv/include/asm/syscon.h | 19 +++ arch/riscv/lib/Makefile | 2 + arch/riscv/lib/interrupts.c | 62 +- arch/riscv/lib/rdtime.c | 36 ++ arch/riscv/lib/sifive_clint.c| 68 ++ board/emulation/qemu-riscv/Kconfig | 1 + drivers/cpu/Kconfig | 6 + drivers/cpu/Makefile | 1 + drivers/cpu/riscv_cpu.c | 116 + drivers/timer/Kconfig| 8 ++ drivers/timer/Makefile | 1 + drivers/timer/riscv_timer.c | 57 + include/cpu.h| 3 + 25 files changed, 823 insertions(+), 140 deletions(-) create mode 100644 arch/riscv/cpu/mtrap.S create mode 100644 arch/riscv/cpu/qemu/Kconfig create mode 100644 arch/riscv/include/asm/syscon.h create mode 100644 arch/riscv/lib/rdtime.c create mode 100644 arch/riscv/lib/sifive_clint.c create mode 100644 drivers/cpu/riscv_cpu.c create mode 100644 drivers/timer/riscv_timer.c -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 13/28] mtd: ensure MTD is compiled when ENV_IS_IN_FLASH is selected
On Fri, Dec 07, 2018 at 12:09:33PM +0100, Miquel Raynal wrote: > Hi Tom, Wolfgang, [snip] > So what's our next move? I think Wolfgang had two points: > * NOR (and everything related to NOR) should not depend on MTD. > * Same for NAND. > > For NAND this is already too late, NAND code already relies on MTD so > I am just cleaning Makefiles/Kconfig/defconfigs to avoid the "xxx: > missing symbol" error. Now, what about NOR? We know that the overhead, > today, is null, so do you allow me to make NOR depend on MTD or are you > still opposed to that? I think U-Boot maintenance and future > changes would be really eased. Right, so moving forward, I think the plan is: - For SPL, we acknowledge and continue to allow for one-off drivers that don't depend on MTD for NOR/NAND for read-only case. - For full U-Boot, we continue with the path you're talking about that gives us the most long term benefits and where yes, NOR and NAND depend on MTD. We will do this in a way that doesn't grow the binary size needlessly but by the same token we aren't going to restrict NOR/NAND drivers more harshly than we do the entire rest of the project. -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] arm: am335x-pdu001: Move from embedded to separate DTB
There is no need for an embedded device tree for this board so let the build process generate a separate u-boot.dtb file instead. Signed-off-by: Felix Brack --- arch/arm/mach-omap2/am33xx/Kconfig | 1 + configs/am335x_pdu001_defconfig| 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index 3529607479..57284c4ae1 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -206,6 +206,7 @@ config TARGET_PDU001 bool "Support PDU001" select DM select DM_SERIAL + imply SPL_SEPARATE_BSS imply CMD_DM help Support for PDU001 platform developed by EETS GmbH. diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig index 3cb38aff6e..a78ac4dc27 100644 --- a/configs/am335x_pdu001_defconfig +++ b/configs/am335x_pdu001_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_EMBED=y +CONFIG_OF_SEPARATE=y CONFIG_DEFAULT_DEVICE_TREE="am335x-pdu001" # CONFIG_NET is not set CONFIG_SPL_DM=y -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
