[U-Boot] [PATCH 2/2] imx8mq_evk/README: remove ARCH environment variable
There is no need to set the ARCH variable when building U-Boot. In fact, the ARCH name in U-Boot is 'arm'. Signed-off-by: Baruch Siach --- board/freescale/imx8mq_evk/README | 1 - 1 file changed, 1 deletion(-) diff --git a/board/freescale/imx8mq_evk/README b/board/freescale/imx8mq_evk/README index 07dbfb01fed8..1da6eaf24277 100644 --- a/board/freescale/imx8mq_evk/README +++ b/board/freescale/imx8mq_evk/README @@ -23,7 +23,6 @@ $ cp firmware-imx-7.9/firmware-imx-7.9/firmware/ddr/synopsys/lpddr4*.bin $(srcte Build U-Boot -$ export ARCH=arm64 $ export CROSS_COMPILE=aarch64-poky-linux- $ make imx8mq_evk_defconfig $ make flash.bin -- 2.19.2 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/2] tools/imx8m_image.sh: remove bashism
Use a single '=' to test string equality for compatibility with non-bash
shells. Otherwise, if /bin/sh is dash, build fails:
./tools/imx8m_image.sh: 15: [: signed_hdmi_imx8m.bin: unexpected operator
./tools/imx8m_image.sh: 15: [: signed_hdmi_imx8m.bin: unexpected operator
./tools/imx8m_image.sh: 15: [: spl/u-boot-spl-ddr.bin: unexpected operator
./tools/imx8m_image.sh: 15: [: spl/u-boot-spl-ddr.bin: unexpected operator
WARNING './spl/u-boot-spl-ddr.bin' not found, resulting binary is not-functional
Signed-off-by: Baruch Siach
---
tools/imx8m_image.sh | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/imx8m_image.sh b/tools/imx8m_image.sh
index 6346fb64d8c5..ec0881a12812 100755
--- a/tools/imx8m_image.sh
+++ b/tools/imx8m_image.sh
@@ -12,7 +12,7 @@ blobs=`awk '/^SIGNED_HDMI/ {print $2} /^LOADER/ {print $2}
/^SECOND_LOADER/ {pri
for f in $blobs; do
tmp=$srctree/$f
- if [ $f == "spl/u-boot-spl-ddr.bin" ] || [ $f == "u-boot.itb" ]; then
+ if [ $f = "spl/u-boot-spl-ddr.bin" ] || [ $f = "u-boot.itb" ]; then
continue
fi
@@ -28,7 +28,7 @@ for f in $blobs; do
sed -in "s;$f;$tmp;" $file
done
-if [ $post_process == 1 ]; then
+if [ $post_process = 1 ]; then
if [ -f $srctree/lpddr4_pmu_train_1d_imem.bin ]; then
objcopy -I binary -O binary --pad-to 0x8000 --gap-fill=0x0
$srctree/lpddr4_pmu_train_1d_imem.bin lpddr4_pmu_train_1d_imem_pad.bin
objcopy -I binary -O binary --pad-to 0x4000 --gap-fill=0x0
$srctree/lpddr4_pmu_train_1d_dmem.bin lpddr4_pmu_train_1d_dmem_pad.bin
--
2.19.2
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Re: [U-Boot] [PATCH 2/6] riscv: remove invalid dcache flush implementation
Hi Lukas
> > From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de]
> > Sent: Monday, December 31, 2018 2:28 AM
> > To: u-boot@lists.denx.de
> > Cc: Anup Patel; Lukas Auer; Rick Jian-Zhi Chen(陳建志); Bin Meng; Greentime Hu
> > Subject: [PATCH 2/6] riscv: remove invalid dcache flush implementation
> >
> > The fence instruction is used to enforce device I/O and memory ordering
> > constraints in RISC-V. It does not directly affect the data cache and
> > particular
> > cannot be used to flush or invalidate it. RISC-V does not have instructions
> > for
> > explicit cache control. Remove the flush_dcache_all implementation and its
> > use
> > in all dcache-specific functions in lib/cache.c.
> >
The privileged mention that fence is for the purposes of ordering, but
does not say
it can not be used to flush or invalidate.
Andes's ax25 have no coherence agent. So it need fence instruction to manipulate
cache flush or invalidate. Or there will be some data synchronization error
occurs on ae350 platform.
Thanks
Rick
> > This also adds a missing new line between flush_dcache_all and
> > flush_dcache_range in lib/cache.c.
> >
> > Signed-off-by: Lukas Auer
> > ---
> > This patch only removes the implementation itself and its use in
> > dcache-specific
> > functions in lib/cache.c. There are more uses of it in arch/riscv/, which
> > this patch
> > does not remove.
> >
> > arch/riscv/lib/cache.c | 4 +---
> > 1 file changed, 1 insertion(+), 3 deletions(-)
> >
> > diff --git a/arch/riscv/lib/cache.c b/arch/riscv/lib/cache.c index
> > ae5c60716f..203e287612 100644
> > --- a/arch/riscv/lib/cache.c
> > +++ b/arch/riscv/lib/cache.c
> > @@ -13,11 +13,10 @@ void invalidate_icache_all(void)
> >
> > void flush_dcache_all(void)
> > {
> > - asm volatile ("fence" :::"memory");
> > }
> > +
> > void flush_dcache_range(unsigned long start, unsigned long end) {
> > - flush_dcache_all();
> > }
> >
> > void invalidate_icache_range(unsigned long start, unsigned long end) @@
> > -31,7
> > +30,6 @@ void invalidate_icache_range(unsigned long start, unsigned long
> > end)
> >
> > void invalidate_dcache_range(unsigned long start, unsigned long end) {
> > - flush_dcache_all();
> > }
> >
> > void cache_flush(void)
> > --
> > 2.20.1
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Re: [U-Boot] [PATCH v1 08/14] DTS: imx: Add "u-boot, dm-pre-reloc" property to relevant imx6qdl nodes
On 1/2/19 12:37 AM, Lukasz Majewski wrote:
> This patch is a preparation for the imx6q to use DTS in the SPL for very
> early configuration, as 'u-boot,dm-pre-reloc;' is necessary to initialize
> uart and SD/eMMC controllers in SPL.
>
> Signed-off-by: Lukasz Majewski
Should be in U-Boot specific DTSI to allow easy resync of DTSIs with Linux.
> ---
>
> arch/arm/dts/imx6qdl.dtsi | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi
> index 476cf93445..61cb59cc94 100644
> --- a/arch/arm/dts/imx6qdl.dtsi
> +++ b/arch/arm/dts/imx6qdl.dtsi
> @@ -72,6 +72,7 @@
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "simple-bus";
> + u-boot,dm-pre-reloc;
> interrupt-parent = <>;
> ranges;
>
> @@ -218,6 +219,7 @@
>
> aips-bus@0200 { /* AIPS1 */
> compatible = "fsl,aips-bus", "simple-bus";
> + u-boot,dm-pre-reloc;
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0200 0x10>;
> @@ -225,6 +227,7 @@
>
> spba-bus@0200 {
> compatible = "fsl,spba-bus", "simple-bus";
> + u-boot,dm-pre-reloc;
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0200 0x4>;
> @@ -801,6 +804,7 @@
>
> iomuxc: iomuxc@020e {
> compatible = "fsl,imx6dl-iomuxc",
> "fsl,imx6q-iomuxc";
> + u-boot,dm-pre-reloc;
> reg = <0x020e 0x4000>;
> };
>
> @@ -882,6 +886,7 @@
>
> aips-bus@0210 { /* AIPS2 */
> compatible = "fsl,aips-bus", "simple-bus";
> + u-boot,dm-pre-reloc;
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0210 0x10>;
>
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v1 11/14] DM: net: imx: Provide weak function to initialize fec clocks
On 1/2/19 12:37 AM, Lukasz Majewski wrote:
> This patch is necessary to initialize some board/soc specific clocks -
> like anatop, which is used to clock PHY and FEC block itself.
>
> The initialization is performed with device tree by introducing two new
> properties - namely;
> 'fsl,enet-loopback-clk' and 'fsl,enet-freq' which specify the need to
> select proper enet clock and the clock value itself.
>
> Previously this setup was done in the board_etc_init() function, which
> has been removed after switching to DM/DTS.
>
> Signed-off-by: Lukasz Majewski
> ---
>
> drivers/net/fec_mxc.c | 25 +
> drivers/net/fec_mxc.h | 2 ++
> 2 files changed, 27 insertions(+)
>
> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
> index 99c5c649a0..728d6c9456 100644
> --- a/drivers/net/fec_mxc.c
> +++ b/drivers/net/fec_mxc.c
> @@ -1297,6 +1297,23 @@ static void fec_gpio_reset(struct fec_priv *priv)
> }
> }
> #endif
> +/*
> + * This function is mostly intended for some soc/board specific
> + * clock initialization (like anatop clock on iMX6) done
> + * previously in board_eth_init()
> + */
> +__weak int set_fec_clock(int fec_id, enum enet_freq freq);
> +
> +static int fec_clk_init(struct udevice *dev)
> +{
> + struct fec_priv *priv = dev_get_priv(dev);
> + int ret = 0;
> +
> + if (priv->enet_loopback_clk)
> + ret = set_fec_clock(dev->seq, priv->freq);
> +
> + return ret;
> +}
>
> static int fecmxc_probe(struct udevice *dev)
> {
> @@ -1321,6 +1338,10 @@ static int fecmxc_probe(struct udevice *dev)
> priv->clk_rate = clk_get_rate(>ipg_clk);
> }
>
> + ret = fec_clk_init(dev);
> + if (ret)
> + return ret;
> +
> ret = fec_alloc_descs(priv);
> if (ret)
> return ret;
> @@ -1455,6 +1476,10 @@ static int fecmxc_ofdata_to_platdata(struct udevice
> *dev)
> }
> #endif
>
> + priv->enet_loopback_clk = dev_read_bool(dev, "fsl,enet-loopback-clk");
> + if (priv->enet_loopback_clk)
> + dev_read_u32(dev, "fsl,enet-freq", >freq);
dev_read_u32() returns error value, so what happens if this fails ?
> +
> return 0;
> }
>
> diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h
> index e9a661f0a1..666b34304c 100644
> --- a/drivers/net/fec_mxc.h
> +++ b/drivers/net/fec_mxc.h
> @@ -261,6 +261,8 @@ struct fec_priv {
> #endif
> #ifdef CONFIG_DM_ETH
> u32 interface;
> + bool enet_loopback_clk; /* anatop reference clk via PAD loopback */
> + enum enet_freq freq;
> #endif
> struct clk ipg_clk;
> u32 clk_rate;
>
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v1 10/14] imx: clock: Introduce set_fec_clock() to configure ETH clock (imx6)
On 1/2/19 12:37 AM, Lukasz Majewski wrote:
> This patch provides a generic way to setup ENET (ETH) clocks for imx6(q)
> based boards. Previously this was performed per board in the
> board_eth_init() function.
>
> Signed-off-by: Lukasz Majewski
> ---
>
> arch/arm/include/asm/arch-mx6/clock.h | 1 +
> arch/arm/mach-imx/mx6/clock.c | 17 +
> 2 files changed, 18 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-mx6/clock.h
> b/arch/arm/include/asm/arch-mx6/clock.h
> index a9481a5fea..9a217349f5 100644
> --- a/arch/arm/include/asm/arch-mx6/clock.h
> +++ b/arch/arm/include/asm/arch-mx6/clock.h
> @@ -72,6 +72,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
> int enable_spi_clk(unsigned char enable, unsigned spi_num);
> void enable_ipu_clock(void);
> int enable_fec_anatop_clock(int fec_id, enum enet_freq freq);
> +int set_fec_clock(int fec_id, enum enet_freq freq);
> void enable_enet_clk(unsigned char enable);
> int enable_lcdif_clock(u32 base_addr, bool enable);
> void enable_qspi_clk(int qspi_num);
> diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c
> index 366a4e3c6b..8a4fb23090 100644
> --- a/arch/arm/mach-imx/mx6/clock.c
> +++ b/arch/arm/mach-imx/mx6/clock.c
> @@ -902,6 +902,17 @@ void enable_qspi_clk(int qspi_num)
> #endif
>
> #ifdef CONFIG_FEC_MXC
> +static void select_fec_clock_source(int fec_id)
How is the fec_id() used in here ? Shouldn't this be part of
enable_fec_anatop_clock() ?
> +{
> + struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
> +
> + if (is_mx6dq()) {
> + /* set gpr1[21] to select anatop clock */
> + setbits_le32(_regs->gpr[1],
> + IOMUXC_GPR1_ENET_CLK_SEL_MASK);
> + }
> +}
> +
> int enable_fec_anatop_clock(int fec_id, enum enet_freq freq)
> {
> u32 reg = 0;
> @@ -976,6 +987,12 @@ int enable_fec_anatop_clock(int fec_id, enum enet_freq
> freq)
> #endif
> return 0;
> }
> +
> +int set_fec_clock(int fec_id, enum enet_freq freq)
> +{
> + select_fec_clock_source(fec_id);
> + return enable_fec_anatop_clock(fec_id, freq);
> +}
> #endif
>
> static u32 get_usdhc_clk(u32 port)
>
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v1 09/14] imx: serial: dm: Enable DM_FLAG_PRE_RELOC in the IMX uart driver
On 1/2/19 12:37 AM, Lukasz Majewski wrote:
> The DM_FLAG_PRE_RELOC shall be enabled as this driver is going to be
> re-used in the i.MX based SoCs.
>
> It is crucial to have running the serial console before relocation.
But the patch doesn't do what the subject/commit message claims is does.
If I understand it correctly, it sets the PRE_RELOC flag unconditionally.
> Signed-off-by: Lukasz Majewski
> ---
>
> drivers/serial/serial_mxc.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c
> index 7e4e6d36b8..e586c18cf0 100644
> --- a/drivers/serial/serial_mxc.c
> +++ b/drivers/serial/serial_mxc.c
> @@ -354,9 +354,7 @@ U_BOOT_DRIVER(serial_mxc) = {
> #endif
> .probe = mxc_serial_probe,
> .ops= _serial_ops,
> -#if !CONFIG_IS_ENABLED(OF_CONTROL)
> .flags = DM_FLAG_PRE_RELOC,
> -#endif
> };
> #endif
>
>
--
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Re: [U-Boot] [PATCH v1 13/14] DTS: imx: tpc70: Add TPC70 board (imx6q based) device tree description
On 1/2/19 12:37 AM, Lukasz Majewski wrote: > This commit defines the TPC70 imx6q board with device tree description. > > Signed-off-by: Lukasz Majewski Is this pulled from Linux ? -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v1 12/14] imx: mmc: Use 'fsl, usdhc-index' property to provide esdhc controller number
On 1/2/19 12:37 AM, Lukasz Majewski wrote:
> With the current code, it is not possible to assign different than default
> numbers for mmc controllers.
>
> Several in-tree boards depend on the pre-dm setup, corresponding to
> following aliases:
>
> mmc0 = --> fsl,usdhc-index = <1>
> mmc1 = --> fsl,usdhc-index = <3>
>
> Without this patch we are either forced to use default aliasing - like:
>
> mmc0 =
> mmc1 =
> mmc2 =
> mmc3 =
>
> to have the proper clocks setup for the controller. However, such setup
> is not acceptable for some legacy scripts / code.
>
> With this patch - by introducing 'fsl,usdhc-index' - one can configure
> (get) clock rate corresponding to used controller.
>
> Moreover, as this code is used in the SPL before relocation (and to save
> space we strip the SPL DTS from clocks and its names) adding separate
> properties seems to be the best approach here. One also avoids adding
> clocks DM code to SPL.
>
> Signed-off-by: Lukasz Majewski
> ---
>
> drivers/mmc/fsl_esdhc.c | 17 -
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index 3cdfa7f5a6..49a6834a98 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -1401,6 +1401,7 @@ static int fsl_esdhc_probe(struct udevice *dev)
> fdt_addr_t addr;
> unsigned int val;
> struct mmc *mmc;
> + int usdhc_idx;
> int ret;
>
> addr = dev_read_addr(dev);
> @@ -1513,7 +1514,21 @@ static int fsl_esdhc_probe(struct udevice *dev)
>
> priv->sdhc_clk = clk_get_rate(>per_clk);
> } else {
> - priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev->seq);
> + /*
> + * Check for 'fsl,index' DTS property - as one may want to have
> + * following mmc setup:
NAK, DT is a hardware description. This is encoding a policy, which
should not be in DT.
This looks like some reimplementation of SEQ_ALIAS stuff.
> + * mmc0 = --> fsl,index = <1>
> + * mmc1 = --> fsl,index = <3>
> + *
> + * So we do have dev->seq = {0, 1}, which in the below code
> + * doesn't correspond to correct USDHC clocks.
> + *
> + * For that reason a new "fsl,index" property has been
> + * introduced.
> + */
> + usdhc_idx = dev_read_u32_default(dev, "fsl,usdhc-index",
> + dev->seq);
> + priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + usdhc_idx);
> if (priv->sdhc_clk <= 0) {
> dev_err(dev, "Unable to get clk for %s\n", dev->name);
> return -EINVAL;
>
--
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Re: [U-Boot] [PATCH v1 07/14] pinctrl: imx: Replace static soc info definitions with run time allocations
On 1/2/19 12:37 AM, Lukasz Majewski wrote:
> This commit is necessary to be able to re-use the pinctrl code in early
> SPL to properly configure pins.
>
> The problem is that those "static" structures are placed in the SDRAM
> area, which corresponds to u-boot proper (not even SPL). Hence, when
> one wants to configure pins before relocation via DTS/DM, the board
> hangs (imx6q SoC powered one) as only OCRAM area is available (0x009x).
>
> It is also safe to use calloc in this case, as the early SPL code provides
> it - either full or trimmed version. The allocated memory is also correct
> in respect to the memory area in which the SoC is currently running (OCRAM
> vs. SDRAM).
You should be able to access static data in early environment, many
other drivers have no problem with it. I believe there is some more
fundamental problem that needs to be fixed, hacking around it like this
is just hiding the real issue.
> Signed-off-by: Lukasz Majewski
> ---
>
> drivers/pinctrl/nxp/pinctrl-imx6.c | 39
> +++---
> 1 file changed, 19 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/pinctrl/nxp/pinctrl-imx6.c
> b/drivers/pinctrl/nxp/pinctrl-imx6.c
> index d7c95bb738..876049b39b 100644
> --- a/drivers/pinctrl/nxp/pinctrl-imx6.c
> +++ b/drivers/pinctrl/nxp/pinctrl-imx6.c
> @@ -10,34 +10,33 @@
>
> #include "pinctrl-imx.h"
>
> -static struct imx_pinctrl_soc_info imx6_pinctrl_soc_info;
> -
> -/* FIXME Before reloaction, BSS is overlapped with DT area */
> -static struct imx_pinctrl_soc_info imx6ul_pinctrl_soc_info = {
> - .flags = ZERO_OFFSET_VALID,
> -};
> -
> -static struct imx_pinctrl_soc_info imx6_snvs_pinctrl_soc_info = {
> - .flags = ZERO_OFFSET_VALID,
> -};
> -
> static int imx6_pinctrl_probe(struct udevice *dev)
> {
> struct imx_pinctrl_soc_info *info =
> - (struct imx_pinctrl_soc_info *)dev_get_driver_data(dev);
> + calloc(1, sizeof(struct imx_pinctrl_soc_info));
> +
> + if (!info) {
> + printf("%s: Not enough memory!\n", __func__);
> + return -ENOMEM;
> + }
> +
> + if (device_is_compatible(dev, "fsl,imx6sll-iomuxc-snvs") ||
> + device_is_compatible(dev, "fsl,imx6ull-iomuxc-snvs") ||
> + device_is_compatible(dev, "fsl,imx6ul-iomuxc"))
> + info->flags = ZERO_OFFSET_VALID;
>
> return imx_pinctrl_probe(dev, info);
> }
>
> static const struct udevice_id imx6_pinctrl_match[] = {
> - { .compatible = "fsl,imx6q-iomuxc", .data =
> (ulong)_pinctrl_soc_info },
> - { .compatible = "fsl,imx6dl-iomuxc", .data =
> (ulong)_pinctrl_soc_info },
> - { .compatible = "fsl,imx6sl-iomuxc", .data =
> (ulong)_pinctrl_soc_info },
> - { .compatible = "fsl,imx6sll-iomuxc-snvs", .data =
> (ulong)_snvs_pinctrl_soc_info },
> - { .compatible = "fsl,imx6sll-iomuxc", .data =
> (ulong)_pinctrl_soc_info },
> - { .compatible = "fsl,imx6sx-iomuxc", .data =
> (ulong)_pinctrl_soc_info },
> - { .compatible = "fsl,imx6ul-iomuxc", .data =
> (ulong)_pinctrl_soc_info },
> - { .compatible = "fsl,imx6ull-iomuxc-snvs", .data =
> (ulong)_snvs_pinctrl_soc_info },
> + { .compatible = "fsl,imx6q-iomuxc" },
> + { .compatible = "fsl,imx6dl-iomuxc" },
> + { .compatible = "fsl,imx6sl-iomuxc" },
> + { .compatible = "fsl,imx6sll-iomuxc-snvs" },
> + { .compatible = "fsl,imx6sll-iomuxc" },
> + { .compatible = "fsl,imx6sx-iomuxc" },
> + { .compatible = "fsl,imx6ul-iomuxc" },
> + { .compatible = "fsl,imx6ull-iomuxc-snvs" },
> { /* sentinel */ }
> };
>
>
--
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Re: [U-Boot] [PATCH v1 05/14] board: cosmetic: Use define to set ENET clock selection mask on TPC70
On 1/2/19 12:37 AM, Lukasz Majewski wrote: > This is a cosmetic change, just to use proper define. > > Signed-off-by: Lukasz Majewski The subject tags are wrong, fix globally. > --- > > board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c > b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c > index ace986fa05..bcc22b1aa8 100644 > --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c > +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c > @@ -118,7 +118,8 @@ static int setup_fec_clock(void) > struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; > > /* set gpr1[21] to select anatop clock */ > - clrsetbits_le32(_regs->gpr[1], 0x1 << 21, 0x1 << 21); > + clrsetbits_le32(_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK, > + IOMUXC_GPR1_ENET_CLK_SEL_MASK); > > return enable_fec_anatop_clock(0, ENET_50MHZ); > } > -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v1 04/14] DTS: imx: Remove not needed '#address-cells' and '#size-cells' properties
On 1/2/19 12:37 AM, Lukasz Majewski wrote:
> This commit fixes warnings produced by newest in u-boot DTC compiler:
> 'unnecessary #address-cells/#size-cells without "ranges" or child "reg"
> property'
>
> Signed-off-by: Lukasz Majewski
I presume the DTSIs are taken from Linux, is this a backport from Linux
then ?
> ---
>
> arch/arm/dts/imx6q.dtsi | 4
> arch/arm/dts/imx6qdl.dtsi | 9 -
> 2 files changed, 13 deletions(-)
>
> diff --git a/arch/arm/dts/imx6q.dtsi b/arch/arm/dts/imx6q.dtsi
> index c30c8368ca..7f5d91d7f0 100644
> --- a/arch/arm/dts/imx6q.dtsi
> +++ b/arch/arm/dts/imx6q.dtsi
> @@ -150,8 +150,6 @@
> };
>
> ipu2_di0: port@2 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> reg = <2>;
>
> ipu2_di0_disp0: disp0-endpoint {
> @@ -175,8 +173,6 @@
> };
>
> ipu2_di1: port@3 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> reg = <3>;
>
> ipu2_di1_hdmi: hdmi-endpoint {
> diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi
> index b13b0b2db8..476cf93445 100644
> --- a/arch/arm/dts/imx6qdl.dtsi
> +++ b/arch/arm/dts/imx6qdl.dtsi
> @@ -49,9 +49,6 @@
> };
>
> clocks {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> ckil {
> compatible = "fsl,imx-ckil", "fixed-clock";
> #clock-cells = <0>;
> @@ -1125,8 +1122,6 @@
> };
>
> mipi_dsi: mipi@021e {
> - #address-cells = <1>;
> - #size-cells = <0>;
> reg = <0x021e 0x4000>;
> status = "disabled";
>
> @@ -1228,8 +1223,6 @@
> };
>
> ipu1_di0: port@2 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> reg = <2>;
>
> ipu1_di0_disp0: disp0-endpoint {
> @@ -1253,8 +1246,6 @@
> };
>
> ipu1_di1: port@3 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> reg = <3>;
>
> ipu1_di1_disp1: disp1-endpoint {
>
--
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Re: [U-Boot] [PATCH v1 02/14] tpc70: config: Update TPC70 config to support eMMC's boot0 SPL update
On 1/2/19 12:37 AM, Lukasz Majewski wrote:
> The TPC70 can boot from eMMC's boot0. This patch allows it to update
> this HW partition's SPL.
>
> Signed-off-by: Lukasz Majewski
> ---
>
> include/configs/kp_imx6q_tpc.h | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h
> index ee9c56bc21..f26b18442b 100644
> --- a/include/configs/kp_imx6q_tpc.h
> +++ b/include/configs/kp_imx6q_tpc.h
> @@ -49,6 +49,7 @@
> #define CONFIG_SYS_FSL_ESDHC_ADDR0
> #define CONFIG_SYS_FSL_USDHC_NUM 2
> #define CONFIG_SYS_MMC_ENV_DEV 1 /* 0 = SDHC2, 1 = SDHC4
> (eMMC) */
> +#define CONFIG_SUPPORT_EMMC_BOOT
>
> /* UART */
> #define CONFIG_MXC_UART
> @@ -109,6 +110,10 @@
> "setexpr blkc ${blkc} + 1;" \
> "mmc write ${loadaddr} 0x2 ${blkc};" \
> "fi;\0" \
> + "upd_SPL_mmc=mmc dev 1; mmc partconf 1 0 1 1; run upd_SPL_sd\0" \
If mmc dev 1 fails, this will randomly rewrite or even damage some
SD/MMC card that was selected before. Use && ...
> + "upd_uboot_mmc=mmc dev 1; mmc partconf 1 0 1 1; run upd_uboot_sd\0" \
Deduplicate these repeated commands.
> + "up_mmc=run upd_SPL_mmc; run upd_uboot_mmc\0" \
> + "up_sd=run upd_SPL_sd; run upd_uboot_sd\0" \
> "upd_wic=" \
> "if tftp ${loadaddr} ${wic_file}; then " \
> "setexpr blkc ${filesize} / 0x200;" \
>
--
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Re: [U-Boot] [PATCH v1 01/14] tpc70: config: Add script commands to update u-boot and OE's wic
On 1/2/19 12:37 AM, Lukasz Majewski wrote:
> Signed-off-by: Lukasz Majewski
The tags should be ARM: imx: ...
The commit message is missing.
> ---
>
> include/configs/kp_imx6q_tpc.h | 21 +
> 1 file changed, 21 insertions(+)
>
> diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h
> index b6b27ee1d5..ee9c56bc21 100644
> --- a/include/configs/kp_imx6q_tpc.h
> +++ b/include/configs/kp_imx6q_tpc.h
> @@ -89,11 +89,32 @@
> "rdinit=/sbin/init\0" \
> "addinitrd=setenv bootargs ${bootargs} rdinit=${rdinit} ${debug} \0" \
> "fit_config=mx6q_tpc70_conf\0" \
> + "uboot_file=u-boot.img\0" \
> + "SPL_file=SPL\0" \
> + "wic_file=kp-image-kpimx6qtpc.wic\0" \
Why don't you just generate a fitImage and use the fitupd for this ?
> "upd_image=st.4k\0" \
> "updargs=setenv bootargs console=${console} ${smp}"\
> "rdinit=${rdinit} ${debug} ${displayargs}\0" \
> "loadusb=usb start; " \
> "fatload usb 0 ${loadaddr} ${upd_image}\0" \
> + "upd_uboot_sd=" \
> + "if tftp ${loadaddr} ${uboot_file}; then " \
> +"setexpr blkc ${filesize} / 0x200;" \
> +"setexpr blkc ${blkc} + 1;" \
> +"mmc write ${loadaddr} 0x8A ${blkc};" \
> + "fi;\0" \
> + "upd_SPL_sd=" \
> + "if tftp ${loadaddr} ${SPL_file}; then " \
> +"setexpr blkc ${filesize} / 0x200;" \
> +"setexpr blkc ${blkc} + 1;" \
> +"mmc write ${loadaddr} 0x2 ${blkc};" \
> + "fi;\0" \
> + "upd_wic=" \
> + "if tftp ${loadaddr} ${wic_file}; then " \
> +"setexpr blkc ${filesize} / 0x200;" \
> +"setexpr blkc ${blkc} + 1;" \
> +"mmc write ${loadaddr} 0x0 ${blkc};" \
> + "fi;\0" \
> "usbupd=echo Booting update from usb ...; " \
> "setenv bootargs; " \
> "run updargs; " \
>
--
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Re: [U-Boot] Pull request: u-boot-sunxi/master
On Wed, Jan 02, 2019 at 12:52:05AM +0530, Jagan Teki wrote: > Hi Tom, > > Please pull this as part of v2019.01 release. > > thanks, > Jagan. > > The following changes since commit bea3d826203f90507ff32ed24bd0a3c53479e55c: > > Merge tag 'signed-efi-2019.01' of git://github.com/agraf/u-boot (2018-12-27 > 12:59:01 -0500) > > are available in the Git repository at: > > git://git.denx.de/u-boot-sunxi.git master > > for you to fetch changes up to 44c214dc2738da979d277d8d45fe50997b62b5f8: > > Revert "sunxi: board: Print error after power initialization fails" > (2018-12-30 00:57:17 +0530) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Pull request: u-boot-imx u -boot-imx-20190101
On Tue, Jan 01, 2019 at 02:51:53PM +0100, Stefano Babic wrote: > Hi Tom, > > I dropped for the moment the following patches from Denis: > > bootcount: i2c: Add bus switching to the I2C bootcount driver > bootcount: Configure length limit for I2C bootcount > board: ge: Store bootcount in EEPROM on PPD and Bx50v3 > > I used the same hack and PowerPC boards are built successfully on > travis. Please pull from u-boot-imx, thanks ! > > The following changes since commit d117d8f19b0625f88309e47a8a32c2faa384dddc: > > Merge branch 'master' of git://git.denx.de/u-boot-i2c (2018-12-13 > 09:36:55 -0500) > > are available in the Git repository at: > > git://www.denx.de/git/u-boot-imx.git tags/u-boot-imx-20190101 > > for you to fetch changes up to 57d2beb91d705bccdfee5e9e5fd267f5e363a100: > > pico-imx7d: Increase the CONFIG_ENV_OFFSET size (2019-01-01 14:12:18 > +0100) > tl;dr: Applied to u-boot/master, thanks! Slightly longer. I'm both not happy about taking something still this large so close to the end of the release and also at fault for it being so late. I started my holidays a week early so I didn't bisect the build failure until it was too late. That said, it's also a strong reminder of why everyone is encouraged to put their PR through travis. This PR includes a bunch of renaming that is important to get right ASAP. It also has some small and important bug-fixes. So I'm applying it. -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v1 08/14] DTS: imx: Add "u-boot, dm-pre-reloc" property to relevant imx6qdl nodes
This patch is a preparation for the imx6q to use DTS in the SPL for very
early configuration, as 'u-boot,dm-pre-reloc;' is necessary to initialize
uart and SD/eMMC controllers in SPL.
Signed-off-by: Lukasz Majewski
---
arch/arm/dts/imx6qdl.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi
index 476cf93445..61cb59cc94 100644
--- a/arch/arm/dts/imx6qdl.dtsi
+++ b/arch/arm/dts/imx6qdl.dtsi
@@ -72,6 +72,7 @@
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
+ u-boot,dm-pre-reloc;
interrupt-parent = <>;
ranges;
@@ -218,6 +219,7 @@
aips-bus@0200 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus";
+ u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0200 0x10>;
@@ -225,6 +227,7 @@
spba-bus@0200 {
compatible = "fsl,spba-bus", "simple-bus";
+ u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0200 0x4>;
@@ -801,6 +804,7 @@
iomuxc: iomuxc@020e {
compatible = "fsl,imx6dl-iomuxc",
"fsl,imx6q-iomuxc";
+ u-boot,dm-pre-reloc;
reg = <0x020e 0x4000>;
};
@@ -882,6 +886,7 @@
aips-bus@0210 { /* AIPS2 */
compatible = "fsl,aips-bus", "simple-bus";
+ u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0210 0x10>;
--
2.11.0
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[U-Boot] [PATCH v1 11/14] DM: net: imx: Provide weak function to initialize fec clocks
This patch is necessary to initialize some board/soc specific clocks -
like anatop, which is used to clock PHY and FEC block itself.
The initialization is performed with device tree by introducing two new
properties - namely;
'fsl,enet-loopback-clk' and 'fsl,enet-freq' which specify the need to
select proper enet clock and the clock value itself.
Previously this setup was done in the board_etc_init() function, which
has been removed after switching to DM/DTS.
Signed-off-by: Lukasz Majewski
---
drivers/net/fec_mxc.c | 25 +
drivers/net/fec_mxc.h | 2 ++
2 files changed, 27 insertions(+)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 99c5c649a0..728d6c9456 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -1297,6 +1297,23 @@ static void fec_gpio_reset(struct fec_priv *priv)
}
}
#endif
+/*
+ * This function is mostly intended for some soc/board specific
+ * clock initialization (like anatop clock on iMX6) done
+ * previously in board_eth_init()
+ */
+__weak int set_fec_clock(int fec_id, enum enet_freq freq);
+
+static int fec_clk_init(struct udevice *dev)
+{
+ struct fec_priv *priv = dev_get_priv(dev);
+ int ret = 0;
+
+ if (priv->enet_loopback_clk)
+ ret = set_fec_clock(dev->seq, priv->freq);
+
+ return ret;
+}
static int fecmxc_probe(struct udevice *dev)
{
@@ -1321,6 +1338,10 @@ static int fecmxc_probe(struct udevice *dev)
priv->clk_rate = clk_get_rate(>ipg_clk);
}
+ ret = fec_clk_init(dev);
+ if (ret)
+ return ret;
+
ret = fec_alloc_descs(priv);
if (ret)
return ret;
@@ -1455,6 +1476,10 @@ static int fecmxc_ofdata_to_platdata(struct udevice *dev)
}
#endif
+ priv->enet_loopback_clk = dev_read_bool(dev, "fsl,enet-loopback-clk");
+ if (priv->enet_loopback_clk)
+ dev_read_u32(dev, "fsl,enet-freq", >freq);
+
return 0;
}
diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h
index e9a661f0a1..666b34304c 100644
--- a/drivers/net/fec_mxc.h
+++ b/drivers/net/fec_mxc.h
@@ -261,6 +261,8 @@ struct fec_priv {
#endif
#ifdef CONFIG_DM_ETH
u32 interface;
+ bool enet_loopback_clk; /* anatop reference clk via PAD loopback */
+ enum enet_freq freq;
#endif
struct clk ipg_clk;
u32 clk_rate;
--
2.11.0
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[U-Boot] [PATCH v1 09/14] imx: serial: dm: Enable DM_FLAG_PRE_RELOC in the IMX uart driver
The DM_FLAG_PRE_RELOC shall be enabled as this driver is going to be
re-used in the i.MX based SoCs.
It is crucial to have running the serial console before relocation.
Signed-off-by: Lukasz Majewski
---
drivers/serial/serial_mxc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c
index 7e4e6d36b8..e586c18cf0 100644
--- a/drivers/serial/serial_mxc.c
+++ b/drivers/serial/serial_mxc.c
@@ -354,9 +354,7 @@ U_BOOT_DRIVER(serial_mxc) = {
#endif
.probe = mxc_serial_probe,
.ops= _serial_ops,
-#if !CONFIG_IS_ENABLED(OF_CONTROL)
.flags = DM_FLAG_PRE_RELOC,
-#endif
};
#endif
--
2.11.0
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[U-Boot] [PATCH v1 13/14] DTS: imx: tpc70: Add TPC70 board (imx6q based) device tree description
This commit defines the TPC70 imx6q board with device tree description.
Signed-off-by: Lukasz Majewski
---
arch/arm/dts/imx6q-kp.dts | 227 ++
1 file changed, 227 insertions(+)
create mode 100644 arch/arm/dts/imx6q-kp.dts
diff --git a/arch/arm/dts/imx6q-kp.dts b/arch/arm/dts/imx6q-kp.dts
new file mode 100644
index 00..1be8e2e9d5
--- /dev/null
+++ b/arch/arm/dts/imx6q-kp.dts
@@ -0,0 +1,227 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018
+ * Lukasz Majewski, DENX Software Engineering, lu...@denx.de
+ *
+ * SPDX-License-Identifier: GPL-2.0+ or X11
+ */
+
+/dts-v1/;
+#include
+#include "imx6q.dtsi"
+
+/ {
+ model = "K+P iMX6Q";
+ compatible = "kp,imx6-kp", "fsl,imx6";
+
+ aliases {
+ mmc0 =
+ mmc1 =
+ usb1 =
+ };
+
+ chosen {
+ stdout-path =
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_leds>;
+
+ green {
+ label = "green";
+ gpios = < 23 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "gpio";
+ default-state = "off";
+ };
+
+ red {
+ label = "red";
+ gpios = < 16 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "gpio";
+ default-state = "off";
+ };
+ };
+
+ memory@1000 {
+ reg = <0x1000 0x4000>;
+ };
+
+ reg_usb_h1_vbus: regulator-usb_h1_vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ gpio = < 31 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_enet>;
+ phy-reset-gpios = < 25 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <10>;
+ phy-mode = "rgmii";
+ fsl,magic-packet;
+ fsl,enet-loopback-clk; /* anatop reference clk via PAD loopback */
+ fsl,enet-freq = <1>; /* ENET_25MHZ = 0, ENET_50MHZ = 1 */
+/* ENET_100MHZ = 2, ENET_125MHZ = 3 */
+ status = "okay";
+};
+
+ {
+ clock-frequency = <40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c1>;
+ status = "okay";
+};
+
+ {
+ clock-frequency = <40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c2>;
+ status = "okay";
+};
+
+ {
+ pinctrl_enet: enetgrp {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK0x1b0b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
+ MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
+ >;
+ };
+
+ pinctrl_leds: gpioledsgrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x4001b0b0
+ MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b0b0
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
+ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+>;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
+ >;
+ u-boot,dm-pre-reloc;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+
[U-Boot] [PATCH v1 14/14] imx: tpc70: Convert TPC70 (imx6q based) board to use DM/DTS in SPL and u-boot
This commit moves the TPC70 to use device model and device tree description
in both SPL and u-boot proper.
Signed-off-by: Lukasz Majewski
---
arch/arm/mach-imx/mx6/Kconfig | 10 ++
board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 174 --
board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 133 +--
configs/kp_imx6q_tpc_defconfig| 31 +-
include/configs/kp_imx6q_tpc.h| 21
5 files changed, 39 insertions(+), 330 deletions(-)
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 06c25bae36..b9915e2197 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -446,9 +446,19 @@ config TARGET_KP_IMX6Q_TPC
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
select DM
+ select SPL_DM if SPL
select DM_THERMAL
+ select DM_MMC
+ select DM_ETH
+ select DM_REGULATOR
+ select SPL_DM_REGULATOR if SPL
+ select DM_SERIAL
+ select DM_I2C
+ select DM_GPIO
+ select DM_USB
select MX6QDL
select SUPPORT_SPL
+ select SPL_SEPARATE_BSS if SPL
imply CMD_DM
imply CMD_SPL
diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
index f0c97ba368..5344ddd560 100644
--- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
+++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
@@ -9,64 +9,17 @@
#include
#include
#include
-#include
#include
#include
-#include
-#include
#include
-#include
-#include
#include
-#include
-#include
-#include
#include
-#include
-#include
-#include
#include
#include
#include
DECLARE_GLOBAL_DATA_PTR;
-#define ENET_PAD_CTRL \
- (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
-PAD_CTL_HYS)
-
-#define I2C_PAD_CTRL \
- (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
- PAD_CTL_HYS | PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-
-static struct i2c_pads_info kp_imx6q_tpc_i2c_pad_info0 = {
- .scl = {
- .i2c_mode = MX6Q_PAD_CSI0_DAT9__I2C1_SCL | PC,
- .gpio_mode = MX6Q_PAD_CSI0_DAT9__GPIO5_IO27 | PC,
- .gp = IMX_GPIO_NR(5, 27)
- },
- .sda = {
-.i2c_mode = MX6Q_PAD_CSI0_DAT8__I2C1_SDA | PC,
-.gpio_mode = MX6Q_PAD_CSI0_DAT8__GPIO5_IO26 | PC,
-.gp = IMX_GPIO_NR(5, 26)
- }
-};
-
-static struct i2c_pads_info kp_imx6q_tpc_i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
- .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC,
- .gp = IMX_GPIO_NR(4, 12)
- },
- .sda = {
-.i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
-.gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC,
-.gp = IMX_GPIO_NR(4, 13)
- }
-};
-
int dram_init(void)
{
gd->ram_size = imx_ddr_size();
@@ -82,58 +35,6 @@ int overwrite_console(void)
return 1;
}
-#ifdef CONFIG_FEC_MXC
-static iomux_v3_cfg_t const enet_pads[] = {
- IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL |
- MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL |
- MUX_PAD_CTRL(ENET_PAD_CTRL)),
- /* AR8031 PHY Reset */
- IOMUX_PADS(PAD_ENET_CRS_DV__GPIO1_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-static void eth_phy_reset(void)
-{
- /* Reset AR8031 PHY */
- gpio_direction_output(IMX_GPIO_NR(1, 25), 0);
- mdelay(10);
- gpio_set_value(IMX_GPIO_NR(1, 25), 1);
- udelay(100);
-}
-
-static int setup_fec_clock(void)
-{
- struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
- /* set gpr1[21]
[U-Boot] [PATCH v1 10/14] imx: clock: Introduce set_fec_clock() to configure ETH clock (imx6)
This patch provides a generic way to setup ENET (ETH) clocks for imx6(q)
based boards. Previously this was performed per board in the
board_eth_init() function.
Signed-off-by: Lukasz Majewski
---
arch/arm/include/asm/arch-mx6/clock.h | 1 +
arch/arm/mach-imx/mx6/clock.c | 17 +
2 files changed, 18 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/clock.h
b/arch/arm/include/asm/arch-mx6/clock.h
index a9481a5fea..9a217349f5 100644
--- a/arch/arm/include/asm/arch-mx6/clock.h
+++ b/arch/arm/include/asm/arch-mx6/clock.h
@@ -72,6 +72,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
int enable_spi_clk(unsigned char enable, unsigned spi_num);
void enable_ipu_clock(void);
int enable_fec_anatop_clock(int fec_id, enum enet_freq freq);
+int set_fec_clock(int fec_id, enum enet_freq freq);
void enable_enet_clk(unsigned char enable);
int enable_lcdif_clock(u32 base_addr, bool enable);
void enable_qspi_clk(int qspi_num);
diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c
index 366a4e3c6b..8a4fb23090 100644
--- a/arch/arm/mach-imx/mx6/clock.c
+++ b/arch/arm/mach-imx/mx6/clock.c
@@ -902,6 +902,17 @@ void enable_qspi_clk(int qspi_num)
#endif
#ifdef CONFIG_FEC_MXC
+static void select_fec_clock_source(int fec_id)
+{
+ struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
+
+ if (is_mx6dq()) {
+ /* set gpr1[21] to select anatop clock */
+ setbits_le32(_regs->gpr[1],
+IOMUXC_GPR1_ENET_CLK_SEL_MASK);
+ }
+}
+
int enable_fec_anatop_clock(int fec_id, enum enet_freq freq)
{
u32 reg = 0;
@@ -976,6 +987,12 @@ int enable_fec_anatop_clock(int fec_id, enum enet_freq
freq)
#endif
return 0;
}
+
+int set_fec_clock(int fec_id, enum enet_freq freq)
+{
+ select_fec_clock_source(fec_id);
+ return enable_fec_anatop_clock(fec_id, freq);
+}
#endif
static u32 get_usdhc_clk(u32 port)
--
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[U-Boot] [PATCH v1 04/14] DTS: imx: Remove not needed '#address-cells' and '#size-cells' properties
This commit fixes warnings produced by newest in u-boot DTC compiler:
'unnecessary #address-cells/#size-cells without "ranges" or child "reg"
property'
Signed-off-by: Lukasz Majewski
---
arch/arm/dts/imx6q.dtsi | 4
arch/arm/dts/imx6qdl.dtsi | 9 -
2 files changed, 13 deletions(-)
diff --git a/arch/arm/dts/imx6q.dtsi b/arch/arm/dts/imx6q.dtsi
index c30c8368ca..7f5d91d7f0 100644
--- a/arch/arm/dts/imx6q.dtsi
+++ b/arch/arm/dts/imx6q.dtsi
@@ -150,8 +150,6 @@
};
ipu2_di0: port@2 {
- #address-cells = <1>;
- #size-cells = <0>;
reg = <2>;
ipu2_di0_disp0: disp0-endpoint {
@@ -175,8 +173,6 @@
};
ipu2_di1: port@3 {
- #address-cells = <1>;
- #size-cells = <0>;
reg = <3>;
ipu2_di1_hdmi: hdmi-endpoint {
diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi
index b13b0b2db8..476cf93445 100644
--- a/arch/arm/dts/imx6qdl.dtsi
+++ b/arch/arm/dts/imx6qdl.dtsi
@@ -49,9 +49,6 @@
};
clocks {
- #address-cells = <1>;
- #size-cells = <0>;
-
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
#clock-cells = <0>;
@@ -1125,8 +1122,6 @@
};
mipi_dsi: mipi@021e {
- #address-cells = <1>;
- #size-cells = <0>;
reg = <0x021e 0x4000>;
status = "disabled";
@@ -1228,8 +1223,6 @@
};
ipu1_di0: port@2 {
- #address-cells = <1>;
- #size-cells = <0>;
reg = <2>;
ipu1_di0_disp0: disp0-endpoint {
@@ -1253,8 +1246,6 @@
};
ipu1_di1: port@3 {
- #address-cells = <1>;
- #size-cells = <0>;
reg = <3>;
ipu1_di1_disp1: disp1-endpoint {
--
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[U-Boot] [PATCH v1 05/14] board: cosmetic: Use define to set ENET clock selection mask on TPC70
This is a cosmetic change, just to use proper define. Signed-off-by: Lukasz Majewski --- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c index ace986fa05..bcc22b1aa8 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c @@ -118,7 +118,8 @@ static int setup_fec_clock(void) struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; /* set gpr1[21] to select anatop clock */ - clrsetbits_le32(_regs->gpr[1], 0x1 << 21, 0x1 << 21); + clrsetbits_le32(_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK, + IOMUXC_GPR1_ENET_CLK_SEL_MASK); return enable_fec_anatop_clock(0, ENET_50MHZ); } -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v1 12/14] imx: mmc: Use 'fsl, usdhc-index' property to provide esdhc controller number
With the current code, it is not possible to assign different than default
numbers for mmc controllers.
Several in-tree boards depend on the pre-dm setup, corresponding to
following aliases:
mmc0 = --> fsl,usdhc-index = <1>
mmc1 = --> fsl,usdhc-index = <3>
Without this patch we are either forced to use default aliasing - like:
mmc0 =
mmc1 =
mmc2 =
mmc3 =
to have the proper clocks setup for the controller. However, such setup
is not acceptable for some legacy scripts / code.
With this patch - by introducing 'fsl,usdhc-index' - one can configure
(get) clock rate corresponding to used controller.
Moreover, as this code is used in the SPL before relocation (and to save
space we strip the SPL DTS from clocks and its names) adding separate
properties seems to be the best approach here. One also avoids adding
clocks DM code to SPL.
Signed-off-by: Lukasz Majewski
---
drivers/mmc/fsl_esdhc.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 3cdfa7f5a6..49a6834a98 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -1401,6 +1401,7 @@ static int fsl_esdhc_probe(struct udevice *dev)
fdt_addr_t addr;
unsigned int val;
struct mmc *mmc;
+ int usdhc_idx;
int ret;
addr = dev_read_addr(dev);
@@ -1513,7 +1514,21 @@ static int fsl_esdhc_probe(struct udevice *dev)
priv->sdhc_clk = clk_get_rate(>per_clk);
} else {
- priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev->seq);
+ /*
+* Check for 'fsl,index' DTS property - as one may want to have
+* following mmc setup:
+* mmc0 = --> fsl,index = <1>
+* mmc1 = --> fsl,index = <3>
+*
+* So we do have dev->seq = {0, 1}, which in the below code
+* doesn't correspond to correct USDHC clocks.
+*
+* For that reason a new "fsl,index" property has been
+* introduced.
+*/
+ usdhc_idx = dev_read_u32_default(dev, "fsl,usdhc-index",
+dev->seq);
+ priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + usdhc_idx);
if (priv->sdhc_clk <= 0) {
dev_err(dev, "Unable to get clk for %s\n", dev->name);
return -EINVAL;
--
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[U-Boot] [PATCH v1 06/14] DM: tpc70: led: Enable LED default state
Signed-off-by: Lukasz Majewski
---
board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 4
1 file changed, 4 insertions(+)
diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
index bcc22b1aa8..f0c97ba368 100644
--- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
+++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
@@ -27,6 +27,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -290,6 +291,9 @@ int board_late_init(void)
add_board_boot_modes(board_boot_modes);
#endif
+ if (IS_ENABLED(CONFIG_LED))
+ led_default_state();
+
env_set("boardname", "kp-tpc");
env_set("boardsoc", "imx6q");
return 0;
--
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[U-Boot] [PATCH v1 00/14] dm: Convert TPC70 to use DM and DTS in SPL and u-boot proper
This patch series converts imx6q based tpc70 board to use driver model and device tree description in SPL and u-boot proper. All the non-DM parts of the code has been removed. This patch series also has several early DM issues fixed for imx6q - for example the pinctrl static definitions. Also, the anatop clock is now setup in a generic imx6q clock code. Lukasz Majewski (14): tpc70: config: Add script commands to update u-boot and OE's wic tpc70: config: Update TPC70 config to support eMMC's boot0 SPL update tpc70: Provide board_boot_order() function to distinct between eMMC and SD boot DTS: imx: Remove not needed '#address-cells' and '#size-cells' properties board: cosmetic: Use define to set ENET clock selection mask on TPC70 DM: tpc70: led: Enable LED default state pinctrl: imx: Replace static soc info definitions with run time allocations DTS: imx: Add "u-boot,dm-pre-reloc" property to relevant imx6qdl nodes imx: serial: dm: Enable DM_FLAG_PRE_RELOC in the IMX uart driver imx: clock: Introduce set_fec_clock() to configure ETH clock (imx6) DM: net: imx: Provide weak function to initialize fec clocks imx: mmc: Use 'fsl,usdhc-index' property to provide esdhc controller number DTS: imx: tpc70: Add TPC70 board (imx6q based) device tree description imx: tpc70: Convert TPC70 (imx6q based) board to use DM/DTS in SPL and u-boot arch/arm/dts/imx6q-kp.dts | 227 ++ arch/arm/dts/imx6q.dtsi | 4 - arch/arm/dts/imx6qdl.dtsi | 14 +- arch/arm/include/asm/arch-mx6/clock.h | 1 + arch/arm/mach-imx/mx6/Kconfig | 10 ++ arch/arm/mach-imx/mx6/clock.c | 17 +++ board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 177 +-- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 137 ++ configs/kp_imx6q_tpc_defconfig| 31 +++- drivers/mmc/fsl_esdhc.c | 17 ++- drivers/net/fec_mxc.c | 25 drivers/net/fec_mxc.h | 2 + drivers/pinctrl/nxp/pinctrl-imx6.c| 39 +++-- drivers/serial/serial_mxc.c | 2 - include/configs/kp_imx6q_tpc.h| 47 --- 15 files changed, 393 insertions(+), 357 deletions(-) create mode 100644 arch/arm/dts/imx6q-kp.dts -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v1 07/14] pinctrl: imx: Replace static soc info definitions with run time allocations
This commit is necessary to be able to re-use the pinctrl code in early
SPL to properly configure pins.
The problem is that those "static" structures are placed in the SDRAM
area, which corresponds to u-boot proper (not even SPL). Hence, when
one wants to configure pins before relocation via DTS/DM, the board
hangs (imx6q SoC powered one) as only OCRAM area is available (0x009x).
It is also safe to use calloc in this case, as the early SPL code provides
it - either full or trimmed version. The allocated memory is also correct
in respect to the memory area in which the SoC is currently running (OCRAM
vs. SDRAM).
Signed-off-by: Lukasz Majewski
---
drivers/pinctrl/nxp/pinctrl-imx6.c | 39 +++---
1 file changed, 19 insertions(+), 20 deletions(-)
diff --git a/drivers/pinctrl/nxp/pinctrl-imx6.c
b/drivers/pinctrl/nxp/pinctrl-imx6.c
index d7c95bb738..876049b39b 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx6.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx6.c
@@ -10,34 +10,33 @@
#include "pinctrl-imx.h"
-static struct imx_pinctrl_soc_info imx6_pinctrl_soc_info;
-
-/* FIXME Before reloaction, BSS is overlapped with DT area */
-static struct imx_pinctrl_soc_info imx6ul_pinctrl_soc_info = {
- .flags = ZERO_OFFSET_VALID,
-};
-
-static struct imx_pinctrl_soc_info imx6_snvs_pinctrl_soc_info = {
- .flags = ZERO_OFFSET_VALID,
-};
-
static int imx6_pinctrl_probe(struct udevice *dev)
{
struct imx_pinctrl_soc_info *info =
- (struct imx_pinctrl_soc_info *)dev_get_driver_data(dev);
+ calloc(1, sizeof(struct imx_pinctrl_soc_info));
+
+ if (!info) {
+ printf("%s: Not enough memory!\n", __func__);
+ return -ENOMEM;
+ }
+
+ if (device_is_compatible(dev, "fsl,imx6sll-iomuxc-snvs") ||
+ device_is_compatible(dev, "fsl,imx6ull-iomuxc-snvs") ||
+ device_is_compatible(dev, "fsl,imx6ul-iomuxc"))
+ info->flags = ZERO_OFFSET_VALID;
return imx_pinctrl_probe(dev, info);
}
static const struct udevice_id imx6_pinctrl_match[] = {
- { .compatible = "fsl,imx6q-iomuxc", .data =
(ulong)_pinctrl_soc_info },
- { .compatible = "fsl,imx6dl-iomuxc", .data =
(ulong)_pinctrl_soc_info },
- { .compatible = "fsl,imx6sl-iomuxc", .data =
(ulong)_pinctrl_soc_info },
- { .compatible = "fsl,imx6sll-iomuxc-snvs", .data =
(ulong)_snvs_pinctrl_soc_info },
- { .compatible = "fsl,imx6sll-iomuxc", .data =
(ulong)_pinctrl_soc_info },
- { .compatible = "fsl,imx6sx-iomuxc", .data =
(ulong)_pinctrl_soc_info },
- { .compatible = "fsl,imx6ul-iomuxc", .data =
(ulong)_pinctrl_soc_info },
- { .compatible = "fsl,imx6ull-iomuxc-snvs", .data =
(ulong)_snvs_pinctrl_soc_info },
+ { .compatible = "fsl,imx6q-iomuxc" },
+ { .compatible = "fsl,imx6dl-iomuxc" },
+ { .compatible = "fsl,imx6sl-iomuxc" },
+ { .compatible = "fsl,imx6sll-iomuxc-snvs" },
+ { .compatible = "fsl,imx6sll-iomuxc" },
+ { .compatible = "fsl,imx6sx-iomuxc" },
+ { .compatible = "fsl,imx6ul-iomuxc" },
+ { .compatible = "fsl,imx6ull-iomuxc-snvs" },
{ /* sentinel */ }
};
--
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[U-Boot] [PATCH v1 03/14] tpc70: Provide board_boot_order() function to distinct between eMMC and SD boot
The TPC70 can boot from SD card (debug/development) and eMMC (production).
The board_boot_order() function provides a run time check for the device
from which one wants to boot (it is selected by GPIO pins setup).
Moreover, a fallback to SD card is provided if the detection is not
possible or working properly.
Signed-off-by: Lukasz Majewski
---
board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 20
1 file changed, 20 insertions(+)
diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c
b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c
index d89e1120a5..07414431f3 100644
--- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c
+++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c
@@ -308,6 +308,26 @@ int board_mmc_init(bd_t *bd)
return fsl_esdhc_initialize(bd, _cfg[0]);
}
+void board_boot_order(u32 *spl_boot_list)
+{
+ u32 boot_device = spl_boot_device();
+ u32 reg = imx6_src_get_boot_mode();
+
+ reg = (reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT;
+
+ debug("%s: boot device: 0x%x (0x4 SD, 0x6 eMMC)\n", __func__, reg);
+ if (boot_device == BOOT_DEVICE_MMC1)
+ if (reg == IMX6_BMODE_MMC || reg == IMX6_BMODE_EMMC)
+ boot_device = BOOT_DEVICE_MMC2;
+
+ spl_boot_list[0] = boot_device;
+ /*
+* Below boot device is a 'fallback' - it shall always be possible to
+* boot from SD card
+*/
+ spl_boot_list[1] = BOOT_DEVICE_MMC1;
+}
+
void board_init_f(ulong dummy)
{
/* setup AIPS and disable watchdog */
--
2.11.0
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[U-Boot] [PATCH v1 02/14] tpc70: config: Update TPC70 config to support eMMC's boot0 SPL update
The TPC70 can boot from eMMC's boot0. This patch allows it to update
this HW partition's SPL.
Signed-off-by: Lukasz Majewski
---
include/configs/kp_imx6q_tpc.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h
index ee9c56bc21..f26b18442b 100644
--- a/include/configs/kp_imx6q_tpc.h
+++ b/include/configs/kp_imx6q_tpc.h
@@ -49,6 +49,7 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_MMC_ENV_DEV 1 /* 0 = SDHC2, 1 = SDHC4 (eMMC) */
+#define CONFIG_SUPPORT_EMMC_BOOT
/* UART */
#define CONFIG_MXC_UART
@@ -109,6 +110,10 @@
"setexpr blkc ${blkc} + 1;" \
"mmc write ${loadaddr} 0x2 ${blkc};" \
"fi;\0" \
+ "upd_SPL_mmc=mmc dev 1; mmc partconf 1 0 1 1; run upd_SPL_sd\0" \
+ "upd_uboot_mmc=mmc dev 1; mmc partconf 1 0 1 1; run upd_uboot_sd\0" \
+ "up_mmc=run upd_SPL_mmc; run upd_uboot_mmc\0" \
+ "up_sd=run upd_SPL_sd; run upd_uboot_sd\0" \
"upd_wic=" \
"if tftp ${loadaddr} ${wic_file}; then " \
"setexpr blkc ${filesize} / 0x200;" \
--
2.11.0
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[U-Boot] [PATCH v1 01/14] tpc70: config: Add script commands to update u-boot and OE's wic
Signed-off-by: Lukasz Majewski
---
include/configs/kp_imx6q_tpc.h | 21 +
1 file changed, 21 insertions(+)
diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h
index b6b27ee1d5..ee9c56bc21 100644
--- a/include/configs/kp_imx6q_tpc.h
+++ b/include/configs/kp_imx6q_tpc.h
@@ -89,11 +89,32 @@
"rdinit=/sbin/init\0" \
"addinitrd=setenv bootargs ${bootargs} rdinit=${rdinit} ${debug} \0" \
"fit_config=mx6q_tpc70_conf\0" \
+ "uboot_file=u-boot.img\0" \
+ "SPL_file=SPL\0" \
+ "wic_file=kp-image-kpimx6qtpc.wic\0" \
"upd_image=st.4k\0" \
"updargs=setenv bootargs console=${console} ${smp}"\
"rdinit=${rdinit} ${debug} ${displayargs}\0" \
"loadusb=usb start; " \
"fatload usb 0 ${loadaddr} ${upd_image}\0" \
+ "upd_uboot_sd=" \
+ "if tftp ${loadaddr} ${uboot_file}; then " \
+ "setexpr blkc ${filesize} / 0x200;" \
+ "setexpr blkc ${blkc} + 1;" \
+ "mmc write ${loadaddr} 0x8A ${blkc};" \
+ "fi;\0" \
+ "upd_SPL_sd=" \
+ "if tftp ${loadaddr} ${SPL_file}; then " \
+ "setexpr blkc ${filesize} / 0x200;" \
+ "setexpr blkc ${blkc} + 1;" \
+ "mmc write ${loadaddr} 0x2 ${blkc};" \
+ "fi;\0" \
+ "upd_wic=" \
+ "if tftp ${loadaddr} ${wic_file}; then " \
+ "setexpr blkc ${filesize} / 0x200;" \
+ "setexpr blkc ${blkc} + 1;" \
+ "mmc write ${loadaddr} 0x0 ${blkc};" \
+ "fi;\0" \
"usbupd=echo Booting update from usb ...; " \
"setenv bootargs; " \
"run updargs; " \
--
2.11.0
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Re: [U-Boot] [PATCH 0/6] Add support for loading FPGA bitstream
On 1/1/19 3:52 AM, Chee, Tien Fong wrote: > On Sun, 2018-12-30 at 16:44 +0100, Marek Vasut wrote: >> On 12/30/18 9:13 AM, tien.fong.c...@intel.com wrote: >>> >>> From: Tien Fong Chee >>> >>> These series of patches enable peripheral bitstream being >>> programmed into FPGA >>> to get the DDR up running. This's also called early IO release, >>> because the >>> peripheral bitstream is only initializing FPGA IOs, PLL, IO48 and >>> DDR. >>> >>> Once DDR is up running, core bitstream from MMC which contains user >>> FPGA >>> design would be loaded into DDR location. socfpga loadfs would be >>> called to >>> program core bitstream into FPGA and entering user mode. >>> >>> Lastly, u-boot-dtb.img from MMC FAT partition would be loaded to >>> DDR, and up >>> running from there. >>> >>> For this whole mechanism to work, the SDMMC flash layout would be >>> designed as >>> shown in below: >>> >>> RAW partition: >>> 1. spl_w_dtb-mkpimage.bin >>> mkpimage -hv 1 -o spl/spl_w_dtb-mkpimage.bin spl/u-boot-spl-dtb.bin >>> spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin spl/u-boot-spl- >>> dtb.bin >>> >>> FAT partition contains: >>> Bitstreams >>> -- >>> Early IO release method is recommended for the sake of performance, >>> improve >>> up to 86% compare to full RBF. >>> >>> 1. ghrd_10as066n2.periph.rbf.mkimage >>> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" >>> -d >>> ghrd_10as066n2.periph.rbf ghrd_10as066n2.periph.rbf.mkimage >>> >>> 2. ghrd_10as066n2.core.rbf.mkimage >>> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" >>> -d >>> ghrd_10as066n2.core.rbf ghrd_10as066n2.core.rbf.mkimage >>> >>> OR >>> >>> 1. ghrd_10as066n2.rbf.mkimage (full RBF) >>> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" >>> -d >>> ghrd_10as066n2.rbf ghrd_10as066n2.rbf.mkimage >>> >>> U-Boot image >>> >>> 3. u-boot-dtb.img >>> >>> For the testing purpose, these two patches are required to apply >>> 1st before >>> applying this series of patches. >>> 1. [U-Boot] [PATCH] misc: fs_loader: Switching private data >>> allocation to DM >>> auto allocation >>> https://www.mail-archive.com/u-boot@lists.denx.de/msg308954.html >>> Reviewed-by: Simon Glass >>> >>> 2. [U-Boot] [PATCH v2] Add support for initializing MMC >>> https://www.mail-archive.com/u-boot@lists.denx.de/msg310532.html >>> Version 2 under review. >> The above should be made into documentation, since cover letters are >> dropped. > Happy new year Marek. Happy New Year to you too. > Yeah, the document would be sent out once the implementation is > finalized. Hence, we need your mercy and help to get this done :-P, > just kidding. I hope you can wrap this into V7 . -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 5/6] spl : socfpga: Implement fpga bitstream loading with socfpga loadfs
On 1/1/19 4:39 AM, Chee, Tien Fong wrote:
> On Sun, 2018-12-30 at 16:51 +0100, Marek Vasut wrote:
>> On 12/30/18 9:13 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Add support for loading FPGA bitstream to get DDR up running before
>>> U-Boot is loaded into DDR. Boot device initialization, generic
>>> firmware
>>> loader and SPL FAT support are required for this whole mechanism to
>>> work.
>>>
>>> Signed-off-by: Tien Fong Chee
>>> ---
>>> arch/arm/mach-socfpga/spl_a10.c | 46
>>> ++-
>>> 1 files changed, 45 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-
>>> socfpga/spl_a10.c
>>> index 3ea64f7..93f5f46 100644
>>> --- a/arch/arm/mach-socfpga/spl_a10.c
>>> +++ b/arch/arm/mach-socfpga/spl_a10.c
>>> @@ -1,6 +1,6 @@
>>> // SPDX-License-Identifier: GPL-2.0+
>>> /*
>>> - * Copyright (C) 2012 Altera Corporation
>>> + * Copyright (C) 2012-2018 Altera Corporation
>>> */
>>>
>>> #include
>>> @@ -23,9 +23,14 @@
>>> #include
>>> #include
>>> #include
>>> +#include
>>> +#include
>>>
>>> DECLARE_GLOBAL_DATA_PTR;
>>>
>>> +#define FPGA_SOCFGA_A10_RBF_CORE_LOAD_DDR (1 * 1024)
>>> +#define FPGA_SOCFGA_A10_RBF_CORE_BUFFER_SIZE (40 * 1024 *
>>> 1024)
>>> +
>>> static const struct socfpga_system_manager *sysmgr_regs =
>>> (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
>>>
>>> @@ -73,6 +78,45 @@ void spl_board_init(void)
>>> WATCHDOG_RESET();
>>>
>>> arch_early_init_r();
>>> +
>>> + /* If the full FPGA is already loaded, ie.from EPCQ,
>>> config fpga pins */
>>> + if (is_fpgamgr_user_mode()) {
>>> + config_pins(gd->fdt_blob, "shared");
>>> + config_pins(gd->fdt_blob, "fpga");
>> What happens if config_pins() fails ? The function returns some
>> return
>> value.
> There is return value for config_pins, i can add the debug print out
> for the return value.
And if the function fails, for whatever reason, what does that mean for
the system ? Does the system fail ? I think so, right ?
>>> + } else if (!is_fpgamgr_early_user_mode()) {
>>> + /* Program IOSSM(early IO release) or full FPGA */
>>> + fpga_fs_info fpga_fsinfo;
>>> + int len;
>>> + char buf[16 * 1024] __aligned(ARCH_DMA_MINALIGN);
>>> +
>>> + fpga_fsinfo.filename = (char *)get_fpga_filename(
>> Is the cast needed ?
> there is a warning
> arch/arm/mach-socfpga/spl_a10.c:109:24: warning: assignment discards
> 'const' qualifier from pointer target type [-Wdiscarded-qualifiers]
> fpga_fsinfo.filename = get_fpga_filename(
Which tells you that you're forcibly turning a string which the compiler
assumes to be constant into one which is not. You're missing const
somewhere or you need to remove it from somewhere.
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 3/6] ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK
On 1/1/19 4:32 AM, Chee, Tien Fong wrote: > On Sun, 2018-12-30 at 16:47 +0100, Marek Vasut wrote: >> On 12/30/18 9:13 AM, tien.fong.c...@intel.com wrote: >>> >>> From: Tien Fong Chee >>> >>> Update the default configuration file to enable the necessary >>> functionality >>> to get the SoCFPGA loadfs driver support. This would enable the >>> implementation of programming bitstream into FPGA from MMC. >>> >>> Signed-off-by: Tien Fong Chee >>> --- >>> configs/socfpga_arria10_defconfig |8 >>> 1 files changed, 8 insertions(+), 0 deletions(-) >>> >>> diff --git a/configs/socfpga_arria10_defconfig >>> b/configs/socfpga_arria10_defconfig >>> index 6ebda81..8158dbb 100644 >>> --- a/configs/socfpga_arria10_defconfig >>> +++ b/configs/socfpga_arria10_defconfig >>> @@ -27,8 +27,16 @@ CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0" >>> # CONFIG_EFI_PARTITION is not set >>> CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc" >>> CONFIG_ENV_IS_IN_MMC=y >>> +CONFIG_SPL_ENV_SUPPORT=y >>> CONFIG_SPL_DM=y >>> CONFIG_SPL_DM_SEQ_ALIAS=y >>> +CONFIG_SPL_DM_MMC=y >>> +CONFIG_SPL_MMC_SUPPORT=y >>> +CONFIG_SPL_EXT_SUPPORT=y >>> +CONFIG_SPL_FAT_SUPPORT=y >>> +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y >>> +CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 >> This breaks systems with large FAT clusters. Why is this needed for >> programming the FPGA from MMC ? > This is final tuning in term of getting balance between performance and > SPL image size for the socdk devkit. User can change that if they need > large FAT cluster in their design, right? I think it'd rather make sense to fix the FAT driver to avoid statically allocating those massive buffers for big clusters. I think that can be done by allocating those on stack instead ... or mallocating them. -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 6/6] ARM: socfpga: Synchronize the configuration for A10 SoCDK
On 1/1/19 4:51 AM, Chee, Tien Fong wrote: > On Sun, 2018-12-30 at 16:54 +0100, Marek Vasut wrote: >> On 12/30/18 9:13 AM, tien.fong.c...@intel.com wrote: >>> >>> From: Marek Vasut >>> >>> Update the default configuration file to enable the necessary >>> functionality >>> the get the kit working. That includes SPL SD/MMC support, USB, and >>> I2C. >>> >>> Signed-off-by: Marek Vasut >>> Signed-off-by: Tien Fong Chee >> Is this patch needed ? Why ? This enables a whole lot of stuff > These settings are mostly syn up from gen5 and our own downstream A10. > These settings are mostly required to boot U-Boot and supporting A10 > golden system reference design. Hmmm, mind you, all the MTD and SPI stuff is not needed for the SDMMC configuration of the kit, which this patch would imply is the target. You want to split this into smaller config changes which enable logical blocks, not everything at once, and document why is each thing needed. >>> >>> --- >>> configs/socfpga_arria10_defconfig | 38 >>> +++- >>> 1 files changed, 32 insertions(+), 6 deletions(-) >>> >>> diff --git a/configs/socfpga_arria10_defconfig >>> b/configs/socfpga_arria10_defconfig >>> index 8158dbb..4b93321 100644 >>> --- a/configs/socfpga_arria10_defconfig >>> +++ b/configs/socfpga_arria10_defconfig >>> @@ -1,7 +1,7 @@ >>> CONFIG_ARM=y >>> CONFIG_ARCH_SOCFPGA=y >>> CONFIG_SYS_TEXT_BASE=0x0140 >>> -CONFIG_SYS_MALLOC_F_LEN=0x2000 >>> +CONFIG_SYS_MALLOC_F_LEN=0x8000 Why is this increase in malloc area needed ? >>> CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y >>> CONFIG_SPL=y >>> CONFIG_IDENT_STRING="socfpga_arria10" >>> @@ -10,26 +10,35 @@ CONFIG_NR_DRAM_BANKS=1 >>> CONFIG_USE_BOOTARGS=y >>> CONFIG_BOOTARGS="console=ttyS0,115200" >>> # CONFIG_USE_BOOTCOMMAND is not set >>> +CONFIG_SYS_CONSOLE_IS_IN_ENV=y >>> +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y >>> +CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y >>> CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb" >>> +CONFIG_VERSION_VARIABLE=y >>> CONFIG_DISPLAY_BOARDINFO_LATE=y >>> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 >>> CONFIG_SPL_FPGA_SUPPORT=y >>> -CONFIG_SPL_SPI_LOAD=y >>> CONFIG_CMD_ASKENV=y >>> CONFIG_CMD_GREPENV=y >>> +CONFIG_CMD_DFU=y >>> # CONFIG_CMD_FLASH is not set >>> CONFIG_CMD_GPIO=y >>> +CONFIG_CMD_I2C=y >>> CONFIG_CMD_MMC=y >>> +CONFIG_CMD_SF=y >>> +CONFIG_CMD_SPI=y >>> +CONFIG_CMD_USB=y >>> +CONFIG_CMD_USB_MASS_STORAGE=y >>> CONFIG_CMD_CACHE=y >>> CONFIG_CMD_EXT4_WRITE=y >>> CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0" >>> -# CONFIG_SPL_DOS_PARTITION is not set >>> -# CONFIG_ISO_PARTITION is not set >>> -# CONFIG_EFI_PARTITION is not set >>> +CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma- >>> names" >>> CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc" >>> CONFIG_ENV_IS_IN_MMC=y >>> CONFIG_SPL_ENV_SUPPORT=y >>> CONFIG_SPL_DM=y >>> CONFIG_SPL_DM_SEQ_ALIAS=y >>> +CONFIG_DFU_MMC=y >>> CONFIG_SPL_DM_MMC=y >>> CONFIG_SPL_MMC_SUPPORT=y >>> CONFIG_SPL_EXT_SUPPORT=y >>> @@ -40,13 +49,30 @@ CONFIG_FS_LOADER=y >>> CONFIG_FPGA_SOCFPGA=y >>> CONFIG_DM_GPIO=y >>> CONFIG_DWAPB_GPIO=y >>> +CONFIG_SYS_I2C_DW=y >>> CONFIG_DM_MMC=y >>> CONFIG_MTD_DEVICE=y >>> +CONFIG_MTD_PARTITIONS=y >>> +CONFIG_MMC_DW=y >>> +CONFIG_SPI_FLASH=y >>> +CONFIG_SPI_FLASH_BAR=y >>> +CONFIG_SPI_FLASH_SPANSION=y >>> +CONFIG_SPI_FLASH_STMICRO=y >>> +CONFIG_PHY_MICREL=y >>> +CONFIG_PHY_MICREL_KSZ90X1=y >>> CONFIG_DM_ETH=y >>> CONFIG_ETH_DESIGNWARE=y >>> CONFIG_MII=y >>> +CONFIG_SYS_NS16550=y >>> CONFIG_SPI=y >>> CONFIG_TIMER=y >>> CONFIG_SPL_TIMER=y >>> CONFIG_DESIGNWARE_APB_TIMER=y >>> -CONFIG_USE_TINY_PRINTF=y >>> +CONFIG_DESIGNWARE_SPI=y >>> +CONFIG_USB=y >>> +CONFIG_DM_USB=y >>> +CONFIG_USB_DWC2=y >>> +CONFIG_USB_STORAGE=y >>> +CONFIG_USB_GADGET=y >>> +CONFIG_USB_GADGET_DWC2_OTG=y >>> +CONFIG_USB_GADGET_DOWNLOAD=y USB and DFU could be enabled separately. -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/6] ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10
On 1/1/19 4:10 AM, Chee, Tien Fong wrote:
> On Sun, 2018-12-30 at 16:46 +0100, Marek Vasut wrote:
>> On 12/30/18 9:13 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> This patch adds description on properties about file name used for
>>> both
>>> peripheral bitstream and core bitstream.
>>>
>>> Signed-off-by: Tien Fong Chee
>>> ---
>>> .../fpga/altera-socfpga-a10-fpga-mgr.txt | 21
>>>
>>> 1 files changed, 21 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-
>>> mgr.txt b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-
>>> mgr.txt
>>> index 2fd8e7a..4552edc 100644
>>> --- a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
>>> +++ b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
>>> @@ -7,13 +7,34 @@ Required properties:
>>> - The second index is for writing FPGA
>>> configuration data.
>>> - resets : Phandle and reset specifier for the device's reset.
>>> - clocks : Clocks used by the device.
>>> +- altr,bitstream : File name for FPGA peripheral raw binary which
>>> is used
>>> + to initialize FPGA IOs, PLL, IO48 and DDR.
>>> + or
>>> + File name for full RBF, consist of periph RBF
>>> and core RBF
>>> +- altr,bitstream-core : File name for core RBF which contains FPGA
>>> design
>>> + which is used to program FPGA CRAM and
>>> ERAM.
>>>
>>> Example:
>>>
>>> +- Examples for booting with early IO release, enter early user
>>> mode(periph RBF):
>>> +
>>> + fpga_mgr: fpga-mgr@ffd03000 {
>>> + compatible = "altr,socfpga-a10-fpga-mgr";
>>> + reg = <0xffd03000 0x100
>>> + 0xffcfe400 0x20>;
>>> + clocks = <_mp_clk>;
>>> + resets = < FPGAMGR_RESET>;
>>> + altr,bitstream =
>>> "ghrd_10as066n2.periph.rbf.mkimage";
>>> + altr,bitstream-core =
>>> "ghrd_10as066n2.core.rbf.mkimage";
>> What is this .mkimage format about ? Is that uImage ? Since it's two
>> files, it could probably be bundled into fitImage instead ?
>>
> What is this .mkimage format about ? Is that uImage ?
> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" -d
> ghrd_10as066n2.periph.rbf ghrd_10as066n2.periph.rbf.mkimage.
> Yeah, this is uImage. The reason of using it for appending the header
> contains file size and CRC checksum to the ghrd_10as066n2.periph.rbf.
> These both file size and CRC checksum are required in socfpga loadfs
> driver.
CRC32 is real weak. fitImage supports all kinds of more fitting checksum
algorithms and more.
> Since it's two> files, it could probably be bundled into fitImage
> instead ?
> I assume you are saying the series fitImage implementation patches as i
> had previously submitted which contains U-Boot, and FPGA core bitstream
> in fitImage.
No, just bundle the bitstream in a fitImage if it's multiple files and
if it makes sense.
> core bitstream can be bundled into fitImage, with the file
> name as ghrd_10as066n2.core.rbf, without mkimage, so this bitstream
> would be loadded into DDR with function fpga load instead of fpga
> loadfs. ghrd_10as066n2.periph.rbf.mkimage is separate file required for
> getting DDR up 1st before loading fitImage.
Does that mean you only need to load one of the files (you can do that
with fitImage too) ? But then, what's the point of specifying both in
the DT if only one is needed ?
--
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Marek Vasut
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Re: [U-Boot] [PATCH 2/6] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
On 1/1/19 4:28 AM, Chee, Tien Fong wrote: > On Sun, 2018-12-30 at 16:45 +0100, Marek Vasut wrote: >> On 12/30/18 9:13 AM, tien.fong.c...@intel.com wrote: >>> >>> From: Tien Fong Chee >>> >>> Add FPGA driver to support program FPGA with FPGA bitstream loading >>> from >>> filesystem. The driver are designed based on generic firmware >>> loader >>> framework. The driver can handle FPGA program operation from >>> loading FPGA >>> bitstream in flash to memory and then to program FPGA. >>> >>> Signed-off-by: Tien Fong Chee >> What changed from V5 in each of those patches ? >> > I assume you are saying the v5 i had submmited in 2017. > > The major changes i have made are: > 1. Stripping of the "fpga loadfs" command support layer on U-Boot > console because the DDR would be corrupted if FPGA is reprogrammed. > 2. Minor restructure and codes clean up such as understandable name for > functions. > 3. Using finalized generic firmware loader interface in this driver. This should be in the changelog. -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] bmips: fix config warnings from 2019.01
On 1/1/19 7:45 PM, Álvaro Fernández Rojas wrote: > - Fixes CONFIG_OF_EMBED warning. > - Fixes missing CONFIG_BLK warning for CONFIG_USB. More details on those warnings that are supposedly fixed would be appreciated. It's really unclear what this patch does. -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] a8011eb84d not working on V40 (Banana Pi M2 Berry)
On Tue, Jan 1, 2019 at 10:40 AM Justus Roßmeier wrote: > > Hello, > > I just updated my u-boot and found that it won't work on my banana pi m2 > berry anymore, failing with the following message: > > U-Boot SPL 2019.01-rc2-00116-g9735326fff (Dec 31 2018 - 12:46:51 +0100) > DRAM: 0 MiB > ### ERROR ### Please RESET the board ### > > The error was introduced in commit > a8011eb84dfac5187cebf00ed8bc981bdb5c1fa1"sunxi: board: Print error after > power initialization fails". reverted version of this change will be in for this release. does it boot with this revert? ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] Add Hynix H27UBG8T2BTR id
On Sun, Dec 30, 2018 at 1:25 AM Nikolai Zhubr wrote: > > 29.12.2018 21:51, Jagan Teki: > > On Wed, Dec 26, 2018 at 4:20 PM Nikolai Zhubr wrote: > >> > >> Add Hynix H27UBG8T2BTR nand chip identification. > >> These chips are sometimes present in e.g. older A20-olinuxino-micro boards. > > > > So the older boards were broken these releases? > > Those with H27UBG8T2BTR chip -- yes: > > ECC init failed: -22 > failed to init nand chips OK. Patch was not created properly, failed to apply. I have fixed it and added proper commit message. Please fix it for next time, since it's release time I did it. Applied to u-boot-spi/master ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Pull request: u-boot-sunxi/master
Hi Tom, Please pull this as part of v2019.01 release. thanks, Jagan. The following changes since commit bea3d826203f90507ff32ed24bd0a3c53479e55c: Merge tag 'signed-efi-2019.01' of git://github.com/agraf/u-boot (2018-12-27 12:59:01 -0500) are available in the Git repository at: git://git.denx.de/u-boot-sunxi.git master for you to fetch changes up to 44c214dc2738da979d277d8d45fe50997b62b5f8: Revert "sunxi: board: Print error after power initialization fails" (2018-12-30 00:57:17 +0530) From: Karl Palsson (1): Revert "sunxi: board: Print error after power initialization fails" board/sunxi/board.c | 18 -- 1 file changed, 8 insertions(+), 10 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] bmips: fix config warnings from 2019.01
On Tue, Jan 01, 2019 at 07:45:03PM +0100, Álvaro Fernández Rojas wrote: > - Fixes CONFIG_OF_EMBED warning. > - Fixes missing CONFIG_BLK warning for CONFIG_USB. > > Signed-off-by: Álvaro Fernández Rojas To be clear, some number of these have been boot tested too, right? Thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 2/2] dm: MIGRATION: Update migration plan for DM_SPI_FLASH
Migration plan for DM_SPI_FLASH is v2019.07 since it depends on DM_SPI migration. Signed-off-by: Jagan Teki --- Changes for v2: - none Makefile | 10 ++ 1 file changed, 10 insertions(+) diff --git a/Makefile b/Makefile index c4d827f259..3e926d839f 100644 --- a/Makefile +++ b/Makefile @@ -964,6 +964,16 @@ ifneq ($(CONFIG_DM_SPI)$(CONFIG_OF_CONTROL),yy) @echo >&2 "See doc/driver-model/MIGRATION.txt for more info." @echo >&2 "" endif +endif +ifeq ($(CONFIG_SPI_FLASH),y) +ifneq ($(CONFIG_DM_SPI_FLASH)$(CONFIG_OF_CONTROL),yy) + @echo >&2 "= WARNING ==" + @echo >&2 "This board does not use CONFIG_DM_SPI_FLASH. Please update" + @echo >&2 "the board to use CONFIG_SPI_FLASH before the v2019.07 release." + @echo >&2 "Failure to update by the deadline may result in board removal." + @echo >&2 "See doc/driver-model/MIGRATION.txt for more info." + @echo >&2 "" +endif endif @# Check that this build does not use CONFIG options that we do not @# know about unless they are in Kconfig. All the existing CONFIG -- 2.18.0.321.gffc6fa0e3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 1/2] dm: MIGRATION: Update migration plan for SPI
- v2019.04 for no dm conversion drivers - v2019.07 for partially converted drivers. Note: there were many updates on this deadline, so better not update this again. Signed-off-by: Jagan Teki --- Changes for v2: - %s/convertion/conversion - split SPI_FLASH warning in separate patch Makefile | 11 +++ doc/driver-model/MIGRATION.txt | 10 +++--- 2 files changed, 18 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index a8461dd611..c4d827f259 100644 --- a/Makefile +++ b/Makefile @@ -953,6 +953,17 @@ ifeq ($(CONFIG_OF_EMBED),y) @echo >&2 "CONFIG_OF_SEPARATE for boards in mainline." @echo >&2 "See doc/README.fdt-control for more info." @echo >&2 "" +endif +ifeq ($(CONFIG_SPI),y) +ifneq ($(CONFIG_DM_SPI)$(CONFIG_OF_CONTROL),yy) + @echo >&2 "= WARNING ==" + @echo >&2 "This board does not use CONFIG_DM_SPI. Please update" + @echo >&2 "the board before v2019.04 for no dm conversion" + @echo >&2 "and v2019.07 for partially dm converted drivers." + @echo >&2 "Failure to update can lead to driver/board removal" + @echo >&2 "See doc/driver-model/MIGRATION.txt for more info." + @echo >&2 "" +endif endif @# Check that this build does not use CONFIG options that we do not @# know about unless they are in Kconfig. All the existing CONFIG diff --git a/doc/driver-model/MIGRATION.txt b/doc/driver-model/MIGRATION.txt index dce4aa3e1d..183d7f5293 100644 --- a/doc/driver-model/MIGRATION.txt +++ b/doc/driver-model/MIGRATION.txt @@ -55,9 +55,6 @@ CONFIG_DM_SPI_FLASH Board Maintainers should submit the patches for enabling DM_SPI and DM_SPI_FLASH to move the migration with in the deadline. -Status: In progress -Deadline: 2018.09 - No dm conversion yet: drivers/spi/cf_spi.c drivers/spi/fsl_espi.c @@ -69,6 +66,9 @@ No dm conversion yet: drivers/spi/sh_spi.c drivers/spi/soft_spi_legacy.c + Status: In progress + Deadline: 2019.04 + Partially converted: drivers/spi/atcspi200_spi.c drivers/spi/davinci_spi.c @@ -79,6 +79,10 @@ Partially converted: drivers/spi/omap3_spi.c drivers/spi/ti_qspi.c + Status: In progress + Deadline: 2019.07 + -- Jagan Teki +12/24/2018 03/14/2018 -- 2.18.0.321.gffc6fa0e3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] bmips: fix config warnings from 2019.01
- Fixes CONFIG_OF_EMBED warning. - Fixes missing CONFIG_BLK warning for CONFIG_USB. Signed-off-by: Álvaro Fernández Rojas --- configs/comtrend_ar5315u_ram_defconfig | 2 +- configs/comtrend_ar5387un_ram_defconfig | 2 +- configs/comtrend_ct5361_ram_defconfig| 2 +- configs/comtrend_vr3032u_ram_defconfig | 2 +- configs/comtrend_wap5813n_ram_defconfig | 2 +- configs/huawei_hg556a_ram_defconfig | 2 +- configs/netgear_cg3100d_ram_defconfig| 1 - configs/netgear_dgnd3700v2_ram_defconfig | 2 +- configs/sagem_f@st1704_ram_defconfig | 1 - configs/sfr_nb4-ser_ram_defconfig| 2 +- 10 files changed, 8 insertions(+), 10 deletions(-) diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig index 1b8e4e43c4..948bd5206a 100644 --- a/configs/comtrend_ar5315u_ram_defconfig +++ b/configs/comtrend_ar5315u_ram_defconfig @@ -31,10 +31,10 @@ CONFIG_CMD_USB=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_CMD_MISC is not set -CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u" CONFIG_NET_RANDOM_ETHADDR=y # CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_BLK=y CONFIG_BCM6348_IUDMA=y CONFIG_DM_GPIO=y CONFIG_LED=y diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig index 5ba401a441..845adafae2 100644 --- a/configs/comtrend_ar5387un_ram_defconfig +++ b/configs/comtrend_ar5387un_ram_defconfig @@ -31,10 +31,10 @@ CONFIG_CMD_USB=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_CMD_MISC is not set -CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5387un" CONFIG_NET_RANDOM_ETHADDR=y # CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_BLK=y CONFIG_BCM6348_IUDMA=y CONFIG_DM_GPIO=y CONFIG_LED=y diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index 6297e78fd9..280323e345 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -28,10 +28,10 @@ CONFIG_CMD_USB=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_CMD_MISC is not set -CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,ct-5361" CONFIG_NET_RANDOM_ETHADDR=y # CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_BLK=y CONFIG_BCM6348_IUDMA=y CONFIG_DM_GPIO=y CONFIG_BCM6345_GPIO=y diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 47f53998e1..be9177d741 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -29,10 +29,10 @@ CONFIG_CMD_USB=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_CMD_MISC is not set -CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,vr-3032u" CONFIG_NET_RANDOM_ETHADDR=y # CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_BLK=y CONFIG_BCM6348_IUDMA=y CONFIG_DM_GPIO=y CONFIG_LED=y diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index fd5107bb7d..68199afb36 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -28,10 +28,10 @@ CONFIG_CMD_USB=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_CMD_MISC is not set -CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n" CONFIG_NET_RANDOM_ETHADDR=y # CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_BLK=y CONFIG_BCM6348_IUDMA=y CONFIG_DM_GPIO=y CONFIG_BCM6345_GPIO=y diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index d4e6144319..14205142a6 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -28,10 +28,10 @@ CONFIG_CMD_USB=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_CMD_MISC is not set -CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="huawei,hg556a" CONFIG_NET_RANDOM_ETHADDR=y # CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_BLK=y CONFIG_BCM6348_IUDMA=y CONFIG_DM_GPIO=y CONFIG_BCM6345_GPIO=y diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig index 83e82247ab..5fada57c80 100644 --- a/configs/netgear_cg3100d_ram_defconfig +++ b/configs/netgear_cg3100d_ram_defconfig @@ -27,7 +27,6 @@ CONFIG_CMD_MEMINFO=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y # CONFIG_CMD_MISC is not set -CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="netgear,cg3100d" # CONFIG_NET is not set # CONFIG_DM_DEVICE_REMOVE is not set diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig index 0f3914fe7e..cef0f673b4 100644 --- a/configs/netgear_dgnd3700v2_ram_defconfig +++ b/configs/netgear_dgnd3700v2_ram_defconfig @@ -30,10 +30,10 @@ CONFIG_CMD_USB=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_CMD_MISC is not set -CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="netgear,dgnd3700v2" CONFIG_NET_RANDOM_ETHADDR=y # CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_BLK=y CONFIG_BCM6348_IUDMA=y CONFIG_DM_GPIO=y CONFIG_BCM6345_GPIO=y diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig index 8c36f5dbf8..da19b613d5 100644 ---
[U-Boot] [PATCH] net: bcm6368: fix restart flow issues
Correctly enable/disable bcm6368-net controller to avoid flow issues.
Signed-off-by: Álvaro Fernández Rojas
---
drivers/net/bcm6368-eth.c | 109 ++
1 file changed, 62 insertions(+), 47 deletions(-)
diff --git a/drivers/net/bcm6368-eth.c b/drivers/net/bcm6368-eth.c
index a31efba9d1..110985ed1d 100644
--- a/drivers/net/bcm6368-eth.c
+++ b/drivers/net/bcm6368-eth.c
@@ -309,6 +309,43 @@ static int bcm6368_eth_start(struct udevice *dev)
struct bcm6368_eth_priv *priv = dev_get_priv(dev);
uint8_t i;
+ /* disable all ports */
+ for (i = 0; i < priv->num_ports; i++) {
+ setbits_8(priv->base + ETH_PORTOV_REG(i),
+ ETH_PORTOV_ENABLE_MASK);
+ setbits_8(priv->base + ETH_PTCTRL_REG(i),
+ ETH_PTCTRL_RXDIS_MASK | ETH_PTCTRL_TXDIS_MASK);
+ priv->sw_port_link[i] = 0;
+ }
+
+ /* enable external ports */
+ for (i = ETH_RGMII_PORT0; i < priv->num_ports; i++) {
+ u8 rgmii_ctrl = ETH_RGMII_CTRL_GMII_CLK_EN;
+
+ if (!priv->used_ports[i].used)
+ continue;
+
+ if (priv->rgmii_override)
+ rgmii_ctrl |= ETH_RGMII_CTRL_MII_OVERRIDE_EN;
+ if (priv->rgmii_timing)
+ rgmii_ctrl |= ETH_RGMII_CTRL_TIMING_SEL_EN;
+
+ setbits_8(priv->base + ETH_RGMII_CTRL_REG(i), rgmii_ctrl);
+ }
+
+ /* reset mib */
+ setbits_8(priv->base + ETH_GMCR_REG, ETH_GMCR_RST_MIB_MASK);
+ mdelay(1);
+ clrbits_8(priv->base + ETH_GMCR_REG, ETH_GMCR_RST_MIB_MASK);
+ mdelay(1);
+
+ /* force CPU port state */
+ setbits_8(priv->base + ETH_IMPOV_REG,
+ ETH_IMPOV_FORCE_MASK | ETH_IMPOV_LINKUP_MASK);
+
+ /* enable switch forward engine */
+ setbits_8(priv->base + ETH_SWMODE_REG, ETH_SWMODE_FWD_EN_MASK);
+
/* prepare rx dma buffers */
for (i = 0; i < ETH_RX_DESC; i++) {
int ret = dma_prepare_rcv_buf(>rx_dma, net_rx_packets[i],
@@ -368,6 +405,31 @@ static int bcm6368_eth_start(struct udevice *dev)
static void bcm6368_eth_stop(struct udevice *dev)
{
struct bcm6368_eth_priv *priv = dev_get_priv(dev);
+ uint8_t i;
+
+ /* disable all ports */
+ for (i = 0; i < priv->num_ports; i++) {
+ setbits_8(priv->base + ETH_PORTOV_REG(i),
+ ETH_PORTOV_ENABLE_MASK);
+ setbits_8(priv->base + ETH_PTCTRL_REG(i),
+ ETH_PTCTRL_RXDIS_MASK | ETH_PTCTRL_TXDIS_MASK);
+ }
+
+ /* disable external ports */
+ for (i = ETH_RGMII_PORT0; i < priv->num_ports; i++) {
+ if (!priv->used_ports[i].used)
+ continue;
+
+ clrbits_8(priv->base + ETH_RGMII_CTRL_REG(i),
+ ETH_RGMII_CTRL_GMII_CLK_EN);
+ }
+
+ /* disable CPU port */
+ clrbits_8(priv->base + ETH_IMPOV_REG,
+ ETH_IMPOV_FORCE_MASK | ETH_IMPOV_LINKUP_MASK);
+
+ /* disable switch forward engine */
+ clrbits_8(priv->base + ETH_SWMODE_REG, ETH_SWMODE_FWD_EN_MASK);
/* disable dma rx channel */
dma_disable(>rx_dma);
@@ -444,7 +506,6 @@ static int bcm6368_eth_probe(struct udevice *dev)
struct eth_pdata *pdata = dev_get_platdata(dev);
struct bcm6368_eth_priv *priv = dev_get_priv(dev);
int num_ports, ret, i;
- uint32_t val;
ofnode node;
/* get base address */
@@ -561,52 +622,6 @@ static int bcm6368_eth_probe(struct udevice *dev)
if (ret)
return ret;
- /* disable all ports */
- for (i = 0; i < priv->num_ports; i++) {
- writeb_be(ETH_PORTOV_ENABLE_MASK,
- priv->base + ETH_PORTOV_REG(i));
- writeb_be(ETH_PTCTRL_RXDIS_MASK |
- ETH_PTCTRL_TXDIS_MASK,
- priv->base + ETH_PTCTRL_REG(i));
-
- priv->sw_port_link[i] = 0;
- }
-
- /* enable external ports */
- for (i = ETH_RGMII_PORT0; i < priv->num_ports; i++) {
- u8 rgmii_ctrl;
-
- if (!priv->used_ports[i].used)
- continue;
-
- rgmii_ctrl = readb_be(priv->base + ETH_RGMII_CTRL_REG(i));
- rgmii_ctrl |= ETH_RGMII_CTRL_GMII_CLK_EN;
- if (priv->rgmii_override)
- rgmii_ctrl |= ETH_RGMII_CTRL_MII_OVERRIDE_EN;
- if (priv->rgmii_timing)
- rgmii_ctrl |= ETH_RGMII_CTRL_TIMING_SEL_EN;
- writeb_be(rgmii_ctrl, priv->base + ETH_RGMII_CTRL_REG(i));
- }
-
- /* reset mib */
- val = readb_be(priv->base + ETH_GMCR_REG);
- val |= ETH_GMCR_RST_MIB_MASK;
- writeb_be(val, priv->base + ETH_GMCR_REG);
- mdelay(1);
- val &= ~ETH_GMCR_RST_MIB_MASK;
-
[U-Boot] [GIT PULL] Pull request: u-boot-imx u -boot-imx-20190101
Hi Tom,
I dropped for the moment the following patches from Denis:
bootcount: i2c: Add bus switching to the I2C bootcount driver
bootcount: Configure length limit for I2C bootcount
board: ge: Store bootcount in EEPROM on PPD and Bx50v3
I used the same hack and PowerPC boards are built successfully on
travis. Please pull from u-boot-imx, thanks !
The following changes since commit d117d8f19b0625f88309e47a8a32c2faa384dddc:
Merge branch 'master' of git://git.denx.de/u-boot-i2c (2018-12-13
09:36:55 -0500)
are available in the Git repository at:
git://www.denx.de/git/u-boot-imx.git tags/u-boot-imx-20190101
for you to fetch changes up to 57d2beb91d705bccdfee5e9e5fd267f5e363a100:
pico-imx7d: Increase the CONFIG_ENV_OFFSET size (2019-01-01 14:12:18
+0100)
imx for 2019.01
- introduce support for i.MX8M
- fix size limit for Vhybrid / pico boards
- several board fixes
- w1 driver for MX2x / MX5x
Denis Zalevskiy (3):
board: ge: Remove EEPROM bus param from read_vpd()
board: ge: Move VPD EEPROM configuration to the defconfig
board: ge: Move VPD reading to the vpd_reader
Fabien Lahoudere (1):
embestmx6boards: Add SPL support
Fabio Estevam (1):
pico-imx7d: Increase the CONFIG_ENV_OFFSET size
Gary Bisson (2):
imx: mx8m: add memory mapping for CAAM and TCM
imx: bootaux: fix stack and pc assignment on 64-bit platforms
Harald Seiler (1):
pcm058: fix NAND flash not using badblock table
Lukasz Majewski (6):
ARM: vybrid: Provide pinctrl driver for Vybrid (vf610)
ARM: DTS: Add iomux node to vf.dtsi for Vybrid devices
ARM: DTS: Provide pinfunc definitions for vybrid vf610 from Linux
kernel
nand: vybrid: Use calloc() instead of malloc() to allocate struct nfc
Kconfig: Add entry for VF610 NAND NFC device tree aware driver
nand: vybrid: Extend the vf610 NFC NAND driver to support device
tree (and DM)
Martin Fuzzey (1):
w1: Add driver for i.MX bus master controller
Martin Husemann (1):
tools: improve portability of imx_cntr_image.sh
Michael Heimpold (4):
configs: mx23_olinuxino_defconfig: fix status led definition
configs: mx23_olinuxino_defconfig: disable bootefi command
doc: imx: fix typo in imximage.txt
doc: imx: fix typos in mxsimage.txt
Parthiban Nallathambi (1):
imx: hab: extend hab_auth_img to calculate ivt_offset
Peng Fan (19):
imx: imx8qxp_mek: imximage: remove config.h
spl: introduce function prototypes
tools: add i.MX8M image support
arm: imx8qxp: build u-boot-dtb.cfgout before checking files
Introduce CONFIG_FIT_EXTERNAL_OFFSET
imx: cpu: add CHIP_REV_2_1 macro
imx: introduce is_imx8mq helper
imx: rename mx8m,MX8M to imx8m,IMX8M
imx: spl: add MMC BOOT Device for i.MX8M
imx: imx8m: clock refactor dram pll part
imx: imx8m: introduce script to generate fit image
imx: imx8m: introduce imximage cfg file
imx: imx8mq: build flash.bin
imx: imx8m: not build bootaux when building SPL
imx: imx8m: add lpddr4 header file
drivers: ddr: introduce DDR driver for i.MX8M
imx: add i.MX8MQ EVK support
imx8m: ddr: removed unused macros
imx: mx53ppd: fix build error
Pierre-Jean Texier (1):
warp7: configs: add CONFIG_FIT option
Xiaoliang Yang (2):
watchdog: driver support for fsl-lsch2
watchdog: imx: add config to disable wdog reset
Yaniv Levinsky (1):
arm: imx7d: cl-som-imx7: migration to CONFIG_BLK
Ye Li (2):
SPL: Add HAB image authentication to FIT
imx8m: Enable CONFIG_SPL_FIT_IMAGE_TINY for iMX8M
Kconfig
| 10 +
Makefile
|7 +-
arch/arm/Kconfig
|4 +-
arch/arm/Makefile
|4 +-
arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch2
| 11 +
arch/arm/dts/Makefile
|2 +
arch/arm/dts/fsl-imx8mq-evk.dts
| 414 ++
arch/arm/dts/vf.dtsi
|6 +
arch/arm/dts/vf610-pinfunc.h
| 810 ++
arch/arm/include/asm/arch-imx/cpu.h
|5 +-
arch/arm/include/asm/{arch-mx8m => arch-imx8m}/clock.h
| 22 +
arch/arm/include/asm/{arch-mx8m => arch-imx8m}/crm_regs.h
|4 +-
arch/arm/include/asm/arch-imx8m/ddr.h
| 740
arch/arm/include/asm/{arch-mx8m => arch-imx8m}/gpio.h
|4 +-
arch/arm/include/asm/{arch-mx8m => arch-imx8m}/imx-regs.h
|4 +-
arch/arm/include/asm/{arch-mx8m/mx8mq_pins.h =>
arch-imx8m/imx8mq_pins.h} |4 +-
arch/arm/include/asm/arch-imx8m/lpddr4_define.h
| 97
arch/arm/include/asm/{arch-mx8m => arch-imx8m}/sys_proto.h
|4 +-
arch/arm/include/asm/arch-mx8m/ddr.h
| 355
arch/arm/include/asm/mach-imx/iomux-v3.h
|2 +-
arch/arm/include/asm/mach-imx/regs-lcdif.h
|6 +-
arch/arm/include/asm/mach-imx/sys
Re: [U-Boot] [PULL] Please pull u-boot-imx: u-boot-imx-20181217
On 27/12/18 20:16, Fabio Estevam wrote:
> Hi Tom,
>
> On Wed, Dec 26, 2018 at 9:27 PM Tom Rini wrote:
>
>> There's the list of boards that it might be. Doing a for B in ...;do
>> make O=/tmp/$B ${B}_defconfig oldconfig and I see that yup, ids8313
>> trips on the new symbols without having a value. So those two bootcount
>> patches from Denis need a slight rework (the second depends on the
>> first) or to be dropped for now.
>
> As we are getting closer to the 2019.01 release, I think we should
> drop Denis' patches for now.
>
Agree, I drop Denis' patches and I reporst the PR.
Thanks,
Stefano
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Re: [U-Boot] [U-Boot,3/3] riscv: bootm: Support booting VxWorks
On Fri, Dec 21, 2018 at 07:13:41AM -0800, Bin Meng wrote: > Register the 'bootm' function for booting VxWorks kernel for > RISC-V architecture. > > Signed-off-by: Bin Meng Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 2/3] bootm: vxworks: Make do_bootm_vxworks() non-static
On Fri, Dec 21, 2018 at 07:13:40AM -0800, Bin Meng wrote: > For future extension to other architectures, make do_bootm_vxworks() > a non-static function. > > Signed-off-by: Bin Meng Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 1/3] bootm: vxworks: Make do_bootvx_fdt() static
On Fri, Dec 21, 2018 at 07:13:39AM -0800, Bin Meng wrote: > Change the scope of do_bootvx_fdt() to static since it is only > used in common/bootm_os.c. > > Signed-off-by: Bin Meng Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-x86
On Mon, Dec 31, 2018 at 12:53:19PM +0800, Bin Meng wrote: > Hi Tom, > > This includes x86 edison defconfig file clean up, and coreboot file > system (cbfs) fixes. > > The following changes since commit bea3d826203f90507ff32ed24bd0a3c53479e55c: > > Merge tag 'signed-efi-2019.01' of git://github.com/agraf/u-boot > (2018-12-27 12:59:01 -0500) > > are available in the git repository at: > > git://git.denx.de/u-boot-x86.git > > for you to fetch changes up to 881bb9ab398419c33c9021ee8b2bbd8412882230: > > fs: cbfs: Add missing standard CBFS component types (2018-12-31 > 09:42:41 +0800) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
