[U-Boot] [PATCH] travis: split 32bit sun8i job

2019-11-15 Thread Heiko Schocher
sun8i 32bit job needs to long, so split this job into
2 jobs. One which build all orangepi sun8i boards and
the other job catches all other sun8i 32bit boards.

Signed-off-by: Heiko Schocher 
---
travis build:
https://travis-ci.org/hsdenx/u-boot-test/builds/612281027

 .travis.yml | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/.travis.yml b/.travis.yml
index 141f161346..65f562ca34 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -240,9 +240,12 @@ matrix:
 - name: "buildman 64bit sun8i"
   env:
 - BUILDMAN="sun8i"
-- name: "buildman 32bit sun8i"
+- name: "buildman 32bit sun8i orangepi"
   env:
-- BUILDMAN="sun8i"
+- BUILDMAN="sun8i"
+- name: "buildman 32bit sun8i catch-all"
+  env:
+- BUILDMAN="sun8i -x orangepi"
 - name: "buildman sun9i"
   env:
 - BUILDMAN="sun9i"
-- 
2.21.0

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[U-Boot] [PATCH] travis: split NXP ARM32 job

2019-11-15 Thread Heiko Schocher
as time for job exceeds split this job into two
jobs. One which builds all "ls10" boards and
one which catch all the rest.

Signed-off-by: Heiko Schocher 
---
travis build:
https://travis-ci.org/hsdenx/u-boot-test/builds/612281027

 .travis.yml | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/.travis.yml b/.travis.yml
index f6aec96770..141f161346 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -183,9 +183,12 @@ matrix:
 - name: "buildman ARM bcm"
   env:
 - BUILDMAN="bcm -x mips"
-- name: "buildman NXP ARM32"
+- name: "buildman NXP ARM32 ls10"
   env:
-- BUILDMAN="freescale -x powerpc,m68k,aarch64"
+- BUILDMAN="freescale -x powerpc,m68k,aarch64"
+- name: "buildman NXP ARM32 catch-all"
+  env:
+- BUILDMAN="freescale -x powerpc,m68k,aarch64,ls10"
 - name: "buildman NXP AArch64 LS101x"
   env:
 - BUILDMAN="freescale"
-- 
2.21.0

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[U-Boot] [RESEND PATCH] net: tftp: Fix tftp store address check in store_block()

2019-11-15 Thread Bin Meng
During testing of qemu-riscv32 with a 2GiB memory configuration,
tftp always fails with a error message:

  Load address: 0x8400
  Loading: #
  TFTP error: trying to overwrite reserved memory...

It turns out the result of 'tftp_load_addr + tftp_load_size' just
overflows (0x1) and the test logic in store_block() fails.
Fix this by adjusting the end address to ULONG_MAX when overflow
is detected.

Fixes: a156c47e39ad ("tftp: prevent overwriting reserved memory")
Signed-off-by: Bin Meng 

---

 net/tftp.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/net/tftp.c b/net/tftp.c
index 5a69bca..1e3c18a 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -171,8 +171,13 @@ static inline int store_block(int block, uchar *src, 
unsigned int len)
void *ptr;
 
 #ifdef CONFIG_LMB
+   ulong end_addr = tftp_load_addr + tftp_load_size;
+
+   if (!end_addr)
+   end_addr = ULONG_MAX;
+
if (store_addr < tftp_load_addr ||
-   store_addr + len > tftp_load_addr + tftp_load_size) {
+   store_addr + len > end_addr) {
puts("\nTFTP error: ");
puts("trying to overwrite reserved memory...\n");
return -1;
-- 
2.7.4

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Re: [U-Boot] [PATCH] net: tftp: Fix tftp store address check in store_block()

2019-11-15 Thread Bin Meng
On Sat, Nov 16, 2019 at 2:17 PM Bin Meng  wrote:
>
> During testing of qemu-riscv32 with a 2GiB memory configuration,
> tftp always fails with a error message:
>
>   Load address: 0x8400
>   Loading: #
>   TFTP error: trying to overwrite reserved memory...
>
> It turns out the result of 'tftp_load_addr + tftp_load_size' just
> overflows (0x1) and the test logic in store_block() fails.
> Fix this by adjusting the end address to ULONG_MAX when overflow
> is detected.
>
> Fixes: a156c47e39ad ("tftp: prevent overwriting reserved memory")
> Signe-off-by: Bin Meng 

Oops, not sure how this was messed up. Will resend.

> Signed-off-by: Bin Meng 
> ---
>
>  net/tftp.c | 7 ++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
>

Regards,
Bin
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[U-Boot] [PATCH] net: tftp: Fix tftp store address check in store_block()

2019-11-15 Thread Bin Meng
During testing of qemu-riscv32 with a 2GiB memory configuration,
tftp always fails with a error message:

  Load address: 0x8400
  Loading: #
  TFTP error: trying to overwrite reserved memory...

It turns out the result of 'tftp_load_addr + tftp_load_size' just
overflows (0x1) and the test logic in store_block() fails.
Fix this by adjusting the end address to ULONG_MAX when overflow
is detected.

Fixes: a156c47e39ad ("tftp: prevent overwriting reserved memory")
Signe-off-by: Bin Meng 
Signed-off-by: Bin Meng 
---

 net/tftp.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/net/tftp.c b/net/tftp.c
index 5a69bca..1e3c18a 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -171,8 +171,13 @@ static inline int store_block(int block, uchar *src, 
unsigned int len)
void *ptr;
 
 #ifdef CONFIG_LMB
+   ulong end_addr = tftp_load_addr + tftp_load_size;
+
+   if (!end_addr)
+   end_addr = ULONG_MAX;
+
if (store_addr < tftp_load_addr ||
-   store_addr + len > tftp_load_addr + tftp_load_size) {
+   store_addr + len > end_addr) {
puts("\nTFTP error: ");
puts("trying to overwrite reserved memory...\n");
return -1;
-- 
2.7.4

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Re: [U-Boot] RK3399 boards (rockpi4 and rockpro64) kernel SError using upstream U-boot

2019-11-15 Thread Qu Wenruo


On 2019/11/16 下午1:16, Qu Wenruo wrote:
> 
> 
> On 2019/11/15 下午10:59, Anand Moon wrote:
>> Hi Qu Wenruo,
>>
>> On Fri, 15 Nov 2019 at 17:27, Qu Wenruo  wrote:
>>>
>>>
>>>
>>> On 2019/11/15 下午6:37, Qu Wenruo wrote:
 A small update to this bug.

 I'm using mem=3584M kernel cmdline, to sacrifice 512M memory.

 And then surprise, memtest 3G works. (Originally it's 4G physical ram
 and 3584M memtest.

 Hopes this could provide some clue.
>>>
>>> Oh no, with 3187M, it still crashes with SError.
>>>
>>> So still no luck.
>>>
>>> Thanks,
>>> Qu
>>
>> Please this following series of patches for fix this error.
>> It fixed issue of SError on my board.
> 
> Would you mind to share which commit it is based?
> 
> For v2019.10 tag, it fails at the 13th patch.
> The same happened for current master.

Well, manually solved the conflicts.

If anyone is interested in using that, I have uploaded it to github,
which is based on v2019.10 tag:

https://github.com/adam900710/u-boot/tree/serror_fixes

Unfortunately, still crashed for memtester 3584M.

Thanks,
Qu

> 
> Thanks,
> Qu
>>
>> [0] https://patchwork.ozlabs.org/cover/1195284/
>>
>> Best Regards
>> -Anand
>>
> 
> 
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Re: [U-Boot] RK3399 boards (rockpi4 and rockpro64) kernel SError using upstream U-boot

2019-11-15 Thread Qu Wenruo


On 2019/11/15 下午10:59, Anand Moon wrote:
> Hi Qu Wenruo,
> 
> On Fri, 15 Nov 2019 at 17:27, Qu Wenruo  wrote:
>>
>>
>>
>> On 2019/11/15 下午6:37, Qu Wenruo wrote:
>>> A small update to this bug.
>>>
>>> I'm using mem=3584M kernel cmdline, to sacrifice 512M memory.
>>>
>>> And then surprise, memtest 3G works. (Originally it's 4G physical ram
>>> and 3584M memtest.
>>>
>>> Hopes this could provide some clue.
>>
>> Oh no, with 3187M, it still crashes with SError.
>>
>> So still no luck.
>>
>> Thanks,
>> Qu
> 
> Please this following series of patches for fix this error.
> It fixed issue of SError on my board.

Would you mind to share which commit it is based?

For v2019.10 tag, it fails at the 13th patch.
The same happened for current master.

Thanks,
Qu
> 
> [0] https://patchwork.ozlabs.org/cover/1195284/
> 
> Best Regards
> -Anand
> 



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Re: [U-Boot] RK3399 boards (rockpi4 and rockpro64) kernel SError using upstream U-boot

2019-11-15 Thread Qu Wenruo


On 2019/11/15 下午10:07, Soeren Moch wrote:
> 
>> On 2019/11/15 下午6:37, Qu Wenruo wrote:
>>> A small update to this bug.
>>>
>>> I'm using mem=3584M kernel cmdline, to sacrifice 512M memory.
>>>
>>> And then surprise, memtest 3G works. (Originally it's 4G physical ram
>>> and 3584M memtest.
>>>
>>> Hopes this could provide some clue.
>> Oh no, with 3187M, it still crashes with SError.
>>
>> So still no luck.
> For me this patch [1] solved this kind of problems on my RockPro64. Can
> you please test this patch?
> 
> Thanks,
> Soeren
> 
> [1] https://patchwork.ozlabs.org/patch/1191078/

Applied and tested on v2019.10 tag.

Unfortunately, no help. Still SError crash.

Thanks,
Qu

>> Thanks,
>> Qu
>>> Thanks,
>>> Qu
>>>
>>> On 2019/11/9 下午9:45, Jagan Teki wrote:
 On Sat, Nov 9, 2019 at 6:48 PM Qu Wenruo  wrote:
> On 2019/11/9 下午8:25, Jagan Teki wrote:
>> On Sat, Nov 9, 2019 at 12:08 PM Qu Wenruo  wrote:
>>> Hi,
>>>
>>> Although recent U-boot upstream has merged the rk3399 ram patchset to
>>> initial DDR4 properly, but strangely I can still trigger SError for
>>> RockPi4 and RockPro64 boards using upstream U-boot with upstream kernel
>>> (v5.4-rc). The dmesg is attached at the end.
>>>
>>> This is pretty easy to trigger if using "memtester 3584M" (both boards
>>> are 4G RAM variants).
>>> The strange part is, if using the vendor uboot (like Armbian does), then
>>> the kernel SError just goes away, so it looks like a bug in Uboot.
>> Can you check u-boot memtest, past me the result.
> Looks like rockpi4 (maybe the whole rk3399 family) doesn't define
> CONFIG_SYS_MEMTEST_START/END, thus enabling CONFIG_CMD_MEMTEST will
> easily break the compile.
>
> Or any magic number for me to try?
 Better try START with ddr base, and END some 256M set for basic test.

>>> The U-boot I built follows the README.rockchip, using the SD card and
>>> boot option 1 (miniloader + Uboot + rkbin).
>>> The script build script (arch PKGBUILD) can be found here:
>>>
>>> https://github.com/adam900710/PKGBUILDs/blob/rockpi4/alarm/uboot-rockpi4/PKGBUILD
>>>
>>> Any clue for the problem?
>> Would you check this series [1]
>>
>> [1] https://patchwork.ozlabs.org/cover/1183700/
>>
> Any git repo? I hate to apply large patchset especially when there are
> conflicts...
 Hmm.. I didn't find the repo on the cover-letter. Did you check the
 u-boot-kerveryang github, may be Kever would place these on that repo
 I think.




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[U-Boot] [PATCH 9/9] drivers: mcfmii: add dm support

2019-11-15 Thread Angelo Dureghello
From: Angelo Durgehello 

Add specific dm code, but maintaining this driver as is, so more in the
shape of a mii library. Can be moved to dm in a further step.

Signed-off-by: Angelo Durgehello 
---
 drivers/net/mcfmii.c | 48 +++-
 1 file changed, 25 insertions(+), 23 deletions(-)

diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c
index 961618b410..27b7c5149f 100644
--- a/drivers/net/mcfmii.c
+++ b/drivers/net/mcfmii.c
@@ -40,14 +40,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #  define CONFIG_SYS_UNSPEC_STRID  0
 #endif
 
-#ifdef CONFIG_MCF547x_8x
-typedef struct fec_info_dma FEC_INFO_T;
-#define FEC_T fecdma_t
-#else
-typedef struct fec_info_s FEC_INFO_T;
-#define FEC_T fec_t
-#endif
-
 typedef struct phy_info_struct {
u32 phyid;
char *strid;
@@ -77,7 +69,7 @@ phy_info_t phyinfo[] = {
  * mii_init -- Initialize the MII for MII command without ethernet
  * This function is a subset of eth_init
  */
-void mii_reset(FEC_INFO_T *info)
+void mii_reset(fec_info_t *info)
 {
volatile FEC_T *fecp = (FEC_T *) (info->miibase);
int i;
@@ -94,9 +86,13 @@ void mii_reset(FEC_INFO_T *info)
 /* send command to phy using mii, wait for result */
 uint mii_send(uint mii_cmd)
 {
-   FEC_INFO_T *info;
-   volatile FEC_T *ep;
+#ifdef CONFIG_DM_ETH
+   struct udevice *dev;
+#else
struct eth_device *dev;
+#endif
+   fec_info_t *info;
+   volatile FEC_T *ep;
uint mii_reply;
int j = 0;
 
@@ -109,11 +105,11 @@ uint mii_send(uint mii_cmd)
ep->mmfr = mii_cmd; /* command to phy */
 
/* wait for mii complete */
-   while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
+   while (!(ep->eir & FEC_EIR_MII) && (j < info->to_loop)) {
udelay(1);
j++;
}
-   if (j >= MCFFEC_TOUT_LOOP) {
+   if (j >= info->to_loop) {
printf("MII not complete\n");
return -1;
}
@@ -130,10 +126,9 @@ uint mii_send(uint mii_cmd)
 #endif /* CONFIG_SYS_DISCOVER_PHY || (CONFIG_MII) */
 
 #if defined(CONFIG_SYS_DISCOVER_PHY)
-int mii_discover_phy(struct eth_device *dev)
+int mii_discover_phy(fec_info_t *info)
 {
 #define MAX_PHY_PASSES 11
-   FEC_INFO_T *info = dev->priv;
int phyaddr, pass;
uint phyno, phytype;
int i, found = 0;
@@ -156,7 +151,7 @@ int mii_discover_phy(struct eth_device *dev)
 
phytype = mii_send(mk_mii_read(phyno, MII_PHYSID1));
 #ifdef ET_DEBUG
-   printf("PHY type 0x%x pass %d type\n", phytype, pass);
+   printf("PHY type 0x%x pass %d\n", phytype, pass);
 #endif
if (phytype == 0x)
continue;
@@ -206,9 +201,13 @@ void mii_init(void) 
__attribute__((weak,alias("__mii_init")));
 
 void __mii_init(void)
 {
-   FEC_INFO_T *info;
-   volatile FEC_T *fecp;
+#ifdef CONFIG_DM_ETH
+   struct udevice *dev;
+#else
struct eth_device *dev;
+#endif
+   fec_info_t *info;
+   volatile FEC_T *fecp;
int miispd = 0, i = 0;
u16 status = 0;
u16 linkgood = 0;
@@ -219,7 +218,7 @@ void __mii_init(void)
 
fecp = (FEC_T *) info->miibase;
 
-   fecpin_setclear(dev, 1);
+   fecpin_setclear(info, 1);
 
mii_reset(info);
 
@@ -233,9 +232,13 @@ void __mii_init(void)
miispd = (gd->bus_clk / 100) / 5;
fecp->mscr = miispd << 1;
 
-   info->phy_addr = mii_discover_phy(dev);
+#ifdef CONFIG_SYS_DISCOVER_PHY
+   info->phy_addr = mii_discover_phy(info);
+#endif
+   if (info->phy_addr == -1)
+   return;
 
-   while (i < MCFFEC_TOUT_LOOP) {
+   while (i < info->to_loop) {
status = 0;
i++;
/* Read PHY control register */
@@ -256,9 +259,8 @@ void __mii_init(void)
 
udelay(1);
}
-   if (i >= MCFFEC_TOUT_LOOP) {
+   if (i >= info->to_loop)
printf("Link UP timeout\n");
-   }
 
/* adapt to the duplex and speed settings of the phy */
info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
-- 
2.24.0

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[U-Boot] [PATCH] drivers: optee: rpmb: fix returning CID to TEE

2019-11-15 Thread Jorge Ramirez-Ortiz
The MMC CID value is one of the input parameters to unequivocally
provision the the RPMB key.

Before this patch, the value returned by the mmc driver in the Linux
kernel differs from the one returned by uboot to optee.

This means that if Linux provisions the RPMB key, uboot wont be able
to access it (and the other way around).

Fix it so both uboot and linux can access the RPMB partition
independently of who provisions the key.

Signed-off-by: Jorge Ramirez-Ortiz 
---
 drivers/tee/optee/rpmb.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/tee/optee/rpmb.c b/drivers/tee/optee/rpmb.c
index 955155b3f8..5dbb1eae4a 100644
--- a/drivers/tee/optee/rpmb.c
+++ b/drivers/tee/optee/rpmb.c
@@ -98,6 +98,7 @@ static struct mmc *get_mmc(struct optee_private *priv, int 
dev_id)
 static u32 rpmb_get_dev_info(u16 dev_id, struct rpmb_dev_info *info)
 {
struct mmc *mmc = find_mmc_device(dev_id);
+   int i;
 
if (!mmc)
return TEE_ERROR_ITEM_NOT_FOUND;
@@ -105,7 +106,9 @@ static u32 rpmb_get_dev_info(u16 dev_id, struct 
rpmb_dev_info *info)
if (!mmc->ext_csd)
return TEE_ERROR_GENERIC;
 
-   memcpy(info->cid, mmc->cid, sizeof(info->cid));
+   for (i = 0; i < ARRAY_SIZE(mmc->cid); i++)
+   ((u32 *) info->cid)[i] = be32_to_cpu(mmc->cid[i]);
+
info->rel_wr_sec_c = mmc->ext_csd[222];
info->rpmb_size_mult = mmc->ext_csd[168];
info->ret_code = RPMB_CMD_GET_DEV_INFO_RET_OK;
-- 
2.23.0

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[U-Boot] [PATCH 8/9] drivers: fsl_mcdmafec: conversion to dm

2019-11-15 Thread Angelo Dureghello
From: Angelo Durgehello 

Full conversion to dm for all boards, legacy code removed.

Signed-off-by: Angelo Durgehello 
---
 .../net/fsl,mcf-dma-fec.txt   |  35 +
 drivers/net/fsl_mcdmafec.c| 691 +-
 2 files changed, 389 insertions(+), 337 deletions(-)
 create mode 100644 doc/device-tree-bindings/net/fsl,mcf-dma-fec.txt

diff --git a/doc/device-tree-bindings/net/fsl,mcf-dma-fec.txt 
b/doc/device-tree-bindings/net/fsl,mcf-dma-fec.txt
new file mode 100644
index 00..e237825bac
--- /dev/null
+++ b/doc/device-tree-bindings/net/fsl,mcf-dma-fec.txt
@@ -0,0 +1,35 @@
+* Freescale ColdFire DMA-FEC ethernet controller
+
+Required properties:
+- compatible: should be "fsl,mcf-dma-fec"
+- reg: address and length of the register set for the device.
+- rx-task: dma channel
+- tx-task: dma channel
+- rx-priority: dma channel
+- tx-priority: dma channel
+- rx-init: dma channel
+- tx-init: dma channel
+
+Optional properties:
+- mii-base: index of FEC reg area, 0 for FEC0, 1 for FEC1
+- max-speed: max speedm Mbits/sec
+- phy-addr: phy address
+- timeout-loop: integer value for driver loops time out
+
+
+Example:
+
+fec0: ethernet@9000 {
+   compatible = "fsl,mcf-dma-fec";
+   reg = <0x9000 0x800>;
+   mii-base = <0>;
+   phy-addr = <0>;
+   timeout-loop = <5000>;
+   rx-task = <0>;
+   tx-task = <1>;
+   rx-piority = <6>;
+   tx-piority = <7>;
+   rx-init = <16>;
+   tx-init = <17>;
+   status = "disabled";
+};
diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c
index e66fb16de8..82a1bb4a2a 100644
--- a/drivers/net/fsl_mcdmafec.c
+++ b/drivers/net/fsl_mcdmafec.c
@@ -5,6 +5,9 @@
  *
  * (C) Copyright 2007 Freescale Semiconductor, Inc.
  * TsiChung Liew (tsi-chung.l...@freescale.com)
+ *
+ * Conversion to DM
+ * (C) 2019 Angelo Dureghello 
  */
 
 #include 
@@ -14,6 +17,10 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+
+#include "MCD_dma.h"
 
 #undef ET_DEBUG
 #undef MII_DEBUG
@@ -21,93 +28,94 @@
 /* Ethernet Transmit and Receive Buffers */
 #define DBUF_LENGTH1520
 #define PKT_MAXBUF_SIZE1518
-#define PKT_MINBUF_SIZE64
-#define PKT_MAXBLR_SIZE1536
-#define LAST_PKTBUFSRX PKTBUFSRX - 1
-#define BD_ENET_RX_W_E (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY)
-#define BD_ENET_TX_RDY_LST (BD_ENET_TX_READY | BD_ENET_TX_LAST)
 #define FIFO_ERRSTAT   (FIFO_STAT_RXW | FIFO_STAT_UF | FIFO_STAT_OF)
 
 /* RxBD bits definitions */
 #define BD_ENET_RX_ERR (BD_ENET_RX_LG | BD_ENET_RX_NO | BD_ENET_RX_CR | \
 BD_ENET_RX_OV | BD_ENET_RX_TR)
 
-#include 
-#include 
+DECLARE_GLOBAL_DATA_PTR;
 
-#include "MCD_dma.h"
+static void init_eth_info(struct fec_info_dma *info)
+{
+   /* setup Receive and Transmit buffer descriptor */
+#ifdef CONFIG_SYS_FEC_BUF_USE_SRAM
+   static u32 tmp;
 
-struct fec_info_dma fec_info[] = {
-#ifdef CONFIG_SYS_FEC0_IOBASE
-   {
-0, /* index */
-CONFIG_SYS_FEC0_IOBASE,/* io base */
-CONFIG_SYS_FEC0_PINMUX,/* gpio pin muxing */
-CONFIG_SYS_FEC0_MIIBASE,   /* mii base */
--1,/* phy_addr */
-0, /* duplex and speed */
-0, /* phy name */
-0, /* phyname init */
-0, /* RX BD */
-0, /* TX BD */
-0, /* rx Index */
-0, /* tx Index */
-0, /* tx buffer */
-0, /* initialized flag */
-(struct fec_info_dma *)-1, /* next */
-FEC0_RX_TASK,  /* rxTask */
-FEC0_TX_TASK,  /* txTask */
-FEC0_RX_PRIORITY,  /* rxPri */
-FEC0_TX_PRIORITY,  /* txPri */
-FEC0_RX_INIT,  /* rxInit */
-FEC0_TX_INIT,  /* txInit */
-0, /* usedTbdIndex */
-0, /* cleanTbdNum */
-},
-#endif
-#ifdef CONFIG_SYS_FEC1_IOBASE
-   {
-1, /* index */
-CONFIG_SYS_FEC1_IOBASE,/* io base */
-CONFIG_SYS_FEC1_PINMUX,/* gpio pin muxing */
-CONFIG_SYS_FEC1_MIIBASE,   /* mii base */
--1,/* phy_addr */
-0, /* duplex and speed */
-0, /* phy name */
-0, /* phy name init */
-#ifdef CONFIG_SYS_DMA_USE_INTSRAM
-(cbd_t *)DBUF_LENGTH,  /* RX BD */
+   if (info->index == 0)
+   tmp = CONFIG_SYS_INIT_RAM_ADDR + 0x1000;
+   else
+   info->rxbd = (cbd_t *)DBUF_LENGTH;
+
+   info->rxbd = (cbd_t *)((u32)info->rxbd + tmp);
+   tmp = (u32)info->rxbd;
+   info->txbd =
+   (cbd_t *)((u32)info->txbd + tmp +
+ 

[U-Boot] [PATCH 7/9] drivers: mcffec: conversion to dm

2019-11-15 Thread Angelo Dureghello
From: Angelo Durgehello 

Full conversion to dm for all boards, legacy code removed.

Signed-off-by: Angelo Durgehello 
---
 doc/device-tree-bindings/net/fsl,mcf-fec.txt |  22 +
 drivers/net/mcffec.c | 587 +--
 2 files changed, 315 insertions(+), 294 deletions(-)
 create mode 100644 doc/device-tree-bindings/net/fsl,mcf-fec.txt

diff --git a/doc/device-tree-bindings/net/fsl,mcf-fec.txt 
b/doc/device-tree-bindings/net/fsl,mcf-fec.txt
new file mode 100644
index 00..39bbaa52f3
--- /dev/null
+++ b/doc/device-tree-bindings/net/fsl,mcf-fec.txt
@@ -0,0 +1,22 @@
+* Freescale ColdFire FEC ethernet controller
+
+Required properties:
+- compatible: should be "fsl,mcf-fec"
+- reg: address and length of the register set for the device.
+
+Optional properties:
+- mii-base: index of FEC reg area, 0 for FEC0, 1 for FEC1
+- max-speed: max speedm Mbits/sec
+- phy-addr: phy address
+- timeout-loop: integer value for driver loops time out
+
+
+Example:
+
+fec0: ethernet@fc03 {
+   compatible = "fsl,mcf-fec";
+   reg = <0xfc03 0x400>;
+   mii-base = <0>;
+   phy-addr = <0>;
+   timeout-loop = <5000>;
+};
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c
index fb93041256..6c8123a6bb 100644
--- a/drivers/net/mcffec.c
+++ b/drivers/net/mcffec.c
@@ -5,17 +5,17 @@
  *
  * (C) Copyright 2007 Freescale Semiconductor, Inc.
  * TsiChung Liew (tsi-chung.l...@freescale.com)
+ *
+ * Conversion to DM
+ * (C) 2019 Angelo Dureghello 
  */
 
 #include 
 #include 
 #include 
-
 #include 
 #include 
-#include 
 #include 
-
 #include 
 #include 
 
@@ -26,64 +26,68 @@
 #define DBUF_LENGTH1520
 #define TX_BUF_CNT 2
 #define PKT_MAXBUF_SIZE1518
-#define PKT_MINBUF_SIZE64
 #define PKT_MAXBLR_SIZE1520
 #define LAST_PKTBUFSRX PKTBUFSRX - 1
 #define BD_ENET_RX_W_E (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY)
 #define BD_ENET_TX_RDY_LST (BD_ENET_TX_READY | BD_ENET_TX_LAST)
 
-struct fec_info_s fec_info[] = {
-#ifdef CONFIG_SYS_FEC0_IOBASE
-   {
-0, /* index */
-CONFIG_SYS_FEC0_IOBASE,/* io base */
-CONFIG_SYS_FEC0_PINMUX,/* gpio pin muxing */
-CONFIG_SYS_FEC0_MIIBASE,   /* mii base */
--1,/* phy_addr */
-0, /* duplex and speed */
-0, /* phy name */
-0, /* phyname init */
-0, /* RX BD */
-0, /* TX BD */
-0, /* rx Index */
-0, /* tx Index */
-0, /* tx buffer */
-0, /* initialized flag */
-(struct fec_info_s *)-1,
-},
-#endif
-#ifdef CONFIG_SYS_FEC1_IOBASE
-   {
-1, /* index */
-CONFIG_SYS_FEC1_IOBASE,/* io base */
-CONFIG_SYS_FEC1_PINMUX,/* gpio pin muxing */
-CONFIG_SYS_FEC1_MIIBASE,   /* mii base */
--1,/* phy_addr */
-0, /* duplex and speed */
-0, /* phy name */
-0, /* phy name init */
+DECLARE_GLOBAL_DATA_PTR;
+
+static void init_eth_info(struct fec_info_s *info)
+{
 #ifdef CONFIG_SYS_FEC_BUF_USE_SRAM
-(cbd_t *)DBUF_LENGTH,  /* RX BD */
+   static u32 tmp;
+
+   if (info->index == 0)
+   tmp = CONFIG_SYS_INIT_RAM_ADDR + 0x1000;
+   else
+   info->rxbd = (cbd_t *)DBUF_LENGTH;
+
+   /* setup Receive and Transmit buffer descriptor */
+   info->rxbd = (cbd_t *)((u32)info->rxbd + tmp);
+   tmp = (u32)info->rxbd;
+   info->txbd =
+   (cbd_t *)((u32)info->txbd + tmp +
+   (PKTBUFSRX * sizeof(cbd_t)));
+   tmp = (u32)info->txbd;
+   info->txbuf =
+   (char *)((u32)info->txbuf + tmp +
+   (CONFIG_SYS_TX_ETH_BUFFER * sizeof(cbd_t)));
+   tmp = (u32)info->txbuf;
 #else
-0, /* RX BD */
+   info->rxbd =
+   (cbd_t *)memalign(CONFIG_SYS_CACHELINE_SIZE,
+  (PKTBUFSRX * sizeof(cbd_t)));
+   info->txbd =
+   (cbd_t *)memalign(CONFIG_SYS_CACHELINE_SIZE,
+  (TX_BUF_CNT * sizeof(cbd_t)));
+   info->txbuf =
+   (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, DBUF_LENGTH);
 #endif
-0, /* TX BD */
-0, /* rx Index */
-0, /* tx Index */
-0, /* tx buffer */
-0, /* initialized flag */
-(struct fec_info_s *)-1,
-}
+
+#ifdef ET_DEBUG
+   printf("rxbd %x txbd %x\n", (int)info->rxbd, (int)info->txbd);
 #endif
-};
+   info->phy_name = (char *)memalign(CONFIG_SYS_CACHELINE_SIZE, 32);
+}
+

[U-Boot] [PATCH 6/9] drivers: net: add mcf fec dm Kconfig support

2019-11-15 Thread Angelo Dureghello
From: Angelo Durgehello 

Add ColdFire fec to Kconfig.

Signed-off-by: Angelo Durgehello 
---
 drivers/net/Kconfig | 16 
 1 file changed, 16 insertions(+)

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 4182897d89..4efed81617 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -278,6 +278,22 @@ config FTGMAC100
  applications.
 
 
+config MCFFEC
+   bool "ColdFire Ethernet Support"
+   depends on DM_ETH
+   select PHYLIB
+   help
+ This driver supports the network interface units in the
+ ColdFire family.
+
+config FSLDMAFEC
+bool "ColdFire DMA Ethernet Support"
+   depends on DM_ETH
+   select PHYLIB
+   help
+ This driver supports the network interface units in the
+ ColdFire family.
+
 config MVGBE
bool "Marvell Orion5x/Kirkwood network interface support"
depends on KIRKWOOD || ORION5X
-- 
2.24.0

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[U-Boot] [PATCH 4/9] configs: purge unneeded fec defines

2019-11-15 Thread Angelo Dureghello
From: Angelo Durgehello 

Remove unneeded fec-related defines after fec moved as dm.

Signed-off-by: Angelo Durgehello 
---
 include/configs/M5208EVBE.h  |  5 -
 include/configs/M5235EVB.h   |  5 -
 include/configs/M5272C3.h|  6 --
 include/configs/M5275EVB.h   |  6 --
 include/configs/M5282EVB.h   |  6 --
 include/configs/M53017EVB.h  |  7 ---
 include/configs/M5329EVB.h   |  5 -
 include/configs/M5373EVB.h   |  5 -
 include/configs/M54418TWR.h  |  9 -
 include/configs/M54451EVB.h  |  6 --
 include/configs/M54455EVB.h  |  8 
 include/configs/M5475EVB.h   | 10 --
 include/configs/M5485EVB.h   | 10 --
 include/configs/cobra5272.h  | 10 --
 include/configs/eb_cpu5282.h |  8 ++--
 include/configs/stmark2.h| 15 +++
 16 files changed, 17 insertions(+), 104 deletions(-)

diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h
index 0a356f483e..7515a5c55f 100644
--- a/include/configs/M5208EVBE.h
+++ b/include/configs/M5208EVBE.h
@@ -19,17 +19,12 @@
 #undef CONFIG_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT5000
 
-#define CONFIG_MCFFEC
 #ifdef CONFIG_MCFFEC
 #  define CONFIG_MII_INIT  1
 #  define CONFIG_SYS_DISCOVER_PHY
 #  define CONFIG_SYS_RX_ETH_BUFFER 8
 #  define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 #  define CONFIG_HAS_ETH1
-
-#  define CONFIG_SYS_FEC0_PINMUX   0
-#  define CONFIG_SYS_FEC0_MIIBASE  CONFIG_SYS_FEC0_IOBASE
-#  define MCFFEC_TOUT_LOOP 5
 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
 #  ifndef CONFIG_SYS_DISCOVER_PHY
 #  define FECDUPLEXFULL
diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
index a197c3a853..6d20b0572a 100644
--- a/include/configs/M5235EVB.h
+++ b/include/configs/M5235EVB.h
@@ -29,16 +29,11 @@
  */
 #define CONFIG_BOOTP_BOOTFILESIZE
 
-#define CONFIG_MCFFEC
 #ifdef CONFIG_MCFFEC
 #  define CONFIG_MII_INIT  1
 #  define CONFIG_SYS_DISCOVER_PHY
 #  define CONFIG_SYS_RX_ETH_BUFFER 8
 #  define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-
-#  define CONFIG_SYS_FEC0_PINMUX   0
-#  define CONFIG_SYS_FEC0_MIIBASE  CONFIG_SYS_FEC0_IOBASE
-#  define MCFFEC_TOUT_LOOP 5
 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
 #  ifndef CONFIG_SYS_DISCOVER_PHY
 #  define FECDUPLEXFULL
diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index 9d3bf42974..4ddc9d426c 100644
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -49,17 +49,11 @@
 /*
  * Command line configuration.
  */
-
-#define CONFIG_MCFFEC
 #ifdef CONFIG_MCFFEC
 #  define CONFIG_MII_INIT  1
 #  define CONFIG_SYS_DISCOVER_PHY
 #  define CONFIG_SYS_RX_ETH_BUFFER 8
 #  define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-
-#  define CONFIG_SYS_FEC0_PINMUX   0
-#  define CONFIG_SYS_FEC0_MIIBASE  CONFIG_SYS_FEC0_IOBASE
-#  define MCFFEC_TOUT_LOOP 5
 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
 #  ifndef CONFIG_SYS_DISCOVER_PHY
 #  define FECDUPLEXFULL
diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index 682e2e3979..7717c774b9 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -48,17 +48,11 @@
 
 /* Available command configuration */
 
-#define CONFIG_MCFFEC
 #ifdef CONFIG_MCFFEC
 #define CONFIG_MII_INIT1
 #define CONFIG_SYS_DISCOVER_PHY
 #define CONFIG_SYS_RX_ETH_BUFFER   8
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-#define CONFIG_SYS_FEC0_PINMUX 0
-#define CONFIG_SYS_FEC0_MIIBASECONFIG_SYS_FEC0_IOBASE
-#define CONFIG_SYS_FEC1_PINMUX 0
-#define CONFIG_SYS_FEC1_MIIBASECONFIG_SYS_FEC1_IOBASE
-#define MCFFEC_TOUT_LOOP   5
 #define CONFIG_HAS_ETH1
 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
 #ifndef CONFIG_SYS_DISCOVER_PHY
diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index a068726681..667e81f8e0 100644
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -41,17 +41,11 @@
 /*
  * Command line configuration.
  */
-
-#define CONFIG_MCFFEC
 #ifdef CONFIG_MCFFEC
 #  define CONFIG_MII_INIT  1
 #  define CONFIG_SYS_DISCOVER_PHY
 #  define CONFIG_SYS_RX_ETH_BUFFER 8
 #  define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-
-#  define CONFIG_SYS_FEC0_PINMUX   0
-#  define CONFIG_SYS_FEC0_MIIBASE  CONFIG_SYS_FEC0_IOBASE
-#  define MCFFEC_TOUT_LOOP 5
 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
 #  ifndef CONFIG_SYS_DISCOVER_PHY
 #  define FECDUPLEXFULL
diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index 39e2748373..b31866b3fe 100644
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -26,7 +26,6 @@
 
 #define 

[U-Boot] [PATCH 5/9] m68k: add dm fec support

2019-11-15 Thread Angelo Dureghello
From: Angelo Durgehello 

Add architecture-related code for dm fec support.

Signed-off-by: Angelo Durgehello 
---
 arch/m68k/cpu/mcf523x/cpu_init.c |  2 +-
 arch/m68k/cpu/mcf52x2/cpu_init.c | 19 ---
 arch/m68k/cpu/mcf532x/cpu.c  |  1 -
 arch/m68k/cpu/mcf532x/cpu_init.c | 21 +---
 arch/m68k/cpu/mcf5445x/cpu_init.c| 16 +++---
 arch/m68k/cpu/mcf547x_8x/cpu_init.c  | 12 +++--
 arch/m68k/include/asm/fec.h  | 21 ++--
 arch/m68k/include/asm/fsl_mcdmafec.h | 23 
 arch/m68k/lib/Makefile   |  1 +
 arch/m68k/lib/fec.c  | 79 
 10 files changed, 151 insertions(+), 44 deletions(-)
 create mode 100644 arch/m68k/lib/fec.c

diff --git a/arch/m68k/cpu/mcf523x/cpu_init.c b/arch/m68k/cpu/mcf523x/cpu_init.c
index 339fbeb429..a6eff09bf8 100644
--- a/arch/m68k/cpu/mcf523x/cpu_init.c
+++ b/arch/m68k/cpu/mcf523x/cpu_init.c
@@ -156,7 +156,7 @@ void uart_port_conf(int port)
 }
 
 #if defined(CONFIG_CMD_NET)
-int fecpin_setclear(struct eth_device *dev, int setclear)
+int fecpin_setclear(fec_info_t *info, int setclear)
 {
gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 
diff --git a/arch/m68k/cpu/mcf52x2/cpu_init.c b/arch/m68k/cpu/mcf52x2/cpu_init.c
index f4a3872667..2aac29d162 100644
--- a/arch/m68k/cpu/mcf52x2/cpu_init.c
+++ b/arch/m68k/cpu/mcf52x2/cpu_init.c
@@ -157,7 +157,7 @@ void uart_port_conf(int port)
 }
 
 #if defined(CONFIG_CMD_NET)
-int fecpin_setclear(struct eth_device *dev, int setclear)
+int fecpin_setclear(fec_info_t *info, int setclear)
 {
gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 
@@ -304,7 +304,7 @@ void uart_port_conf(int port)
 }
 
 #if defined(CONFIG_CMD_NET)
-int fecpin_setclear(struct eth_device *dev, int setclear)
+int fecpin_setclear(fec_info_t *info, int setclear)
 {
if (setclear) {
/* Enable Ethernet pins */
@@ -425,7 +425,7 @@ void uart_port_conf(int port)
 }
 
 #if defined(CONFIG_CMD_NET)
-int fecpin_setclear(struct eth_device *dev, int setclear)
+int fecpin_setclear(fec_info_t *info, int setclear)
 {
gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 
@@ -508,14 +508,17 @@ void uart_port_conf(int port)
 }
 
 #if defined(CONFIG_CMD_NET)
-int fecpin_setclear(struct eth_device *dev, int setclear)
+int fecpin_setclear(fec_info_t *info, int setclear)
 {
-   struct fec_info_s *info = (struct fec_info_s *) dev->priv;
gpio_t *gpio = (gpio_t *)MMAP_GPIO;
+   u32 fec0_base;
+
+   if (fec_get_base_addr(0, _base))
+   return -1;
 
if (setclear) {
/* Enable Ethernet pins */
-   if (info->iobase == CONFIG_SYS_FEC0_IOBASE) {
+   if (info->iobase == fec0_base) {
setbits_be16(>par_feci2c, 0x0f00);
setbits_8(>par_fec0hl, 0xc0);
} else {
@@ -523,7 +526,7 @@ int fecpin_setclear(struct eth_device *dev, int setclear)
setbits_8(>par_fec1hl, 0xc0);
}
} else {
-   if (info->iobase == CONFIG_SYS_FEC0_IOBASE) {
+   if (info->iobase == fec0_base) {
clrbits_be16(>par_feci2c, 0x0f00);
clrbits_8(>par_fec0hl, 0xc0);
} else {
@@ -643,7 +646,7 @@ void uart_port_conf(int port)
 }
 
 #if defined(CONFIG_CMD_NET)
-int fecpin_setclear(struct eth_device *dev, int setclear)
+int fecpin_setclear(fec_info_t *info, int setclear)
 {
if (setclear) {
MCFGPIO_PASPAR |= 0x0F00;
diff --git a/arch/m68k/cpu/mcf532x/cpu.c b/arch/m68k/cpu/mcf532x/cpu.c
index a01b5e65a7..fdc34dd16f 100644
--- a/arch/m68k/cpu/mcf532x/cpu.c
+++ b/arch/m68k/cpu/mcf532x/cpu.c
@@ -145,7 +145,6 @@ int watchdog_init(void)
  * create a board-specific function called:
  * int board_eth_init(bd_t *bis)
  */
-
 int cpu_eth_init(bd_t *bis)
 {
return mcffec_initialize(bis);
diff --git a/arch/m68k/cpu/mcf532x/cpu_init.c b/arch/m68k/cpu/mcf532x/cpu_init.c
index cbf840f76e..65882bc9d1 100644
--- a/arch/m68k/cpu/mcf532x/cpu_init.c
+++ b/arch/m68k/cpu/mcf532x/cpu_init.c
@@ -13,7 +13,7 @@
 #include 
 #include 
 
-#if defined(CONFIG_CMD_NET)
+#if defined(CONFIG_MCFFEC)
 #include 
 #include 
 #include 
@@ -93,6 +93,7 @@ void cpu_init_f(void)
 int cpu_init_r(void)
 {
 #ifdef CONFIG_MCFFEC
+   u32 fec_mii_base0, fec_mii_base1;
ccm_t *ccm = (ccm_t *) MMAP_CCM;
 #endif
 #ifdef CONFIG_MCFRTC
@@ -104,7 +105,10 @@ int cpu_init_r(void)
 
 #endif
 #ifdef CONFIG_MCFFEC
-   if (CONFIG_SYS_FEC0_MIIBASE != CONFIG_SYS_FEC1_MIIBASE)
+   fec_get_mii_base(0, _mii_base0);
+   fec_get_mii_base(1, _mii_base1);
+
+   if (fec_mii_base0 != fec_mii_base1)
setbits_be16(>misccr, CCM_MISCCR_FECM);
else
clrbits_be16(>misccr, CCM_MISCCR_FECM);
@@ -167,13 +171,16 @@ void uart_port_conf(int port)
 }
 
 #if defined(CONFIG_CMD_NET)
-int fecpin_setclear(struct eth_device *dev, int setclear)
+int fecpin_setclear(fec_info_t 

[U-Boot] [PATCH 3/9] configs: add eth dm support for all ColdFire boards

2019-11-15 Thread Angelo Dureghello
From: Angelo Durgehello 

Add dm eth config options for all involved ColdFire-based boards.

Signed-off-by: Angelo Durgehello 
---
 configs/M5208EVBE_defconfig   |  2 ++
 configs/M5235EVB_Flash32_defconfig|  2 ++
 configs/M5235EVB_defconfig|  2 ++
 configs/M5272C3_defconfig |  2 ++
 configs/M5275EVB_defconfig|  2 ++
 configs/M5282EVB_defconfig|  2 ++
 configs/M53017EVB_defconfig   |  2 ++
 configs/M5329AFEE_defconfig   |  2 ++
 configs/M5329BFEE_defconfig   |  2 ++
 configs/M5373EVB_defconfig|  2 ++
 configs/M54418TWR_defconfig   |  2 ++
 configs/M54418TWR_nand_mii_defconfig  |  2 ++
 configs/M54418TWR_nand_rmii_defconfig |  2 ++
 configs/M54418TWR_nand_rmii_lowfreq_defconfig |  2 ++
 configs/M54418TWR_serial_mii_defconfig|  2 ++
 configs/M54418TWR_serial_rmii_defconfig   |  2 ++
 configs/M54451EVB_defconfig   |  2 ++
 configs/M54451EVB_stmicro_defconfig   |  2 ++
 configs/M54455EVB_a66_defconfig   |  2 ++
 configs/M54455EVB_defconfig   |  2 ++
 configs/M54455EVB_i66_defconfig   |  2 ++
 configs/M54455EVB_intel_defconfig |  2 ++
 configs/M54455EVB_stm33_defconfig |  2 ++
 configs/M5475AFE_defconfig|  3 +++
 configs/M5475BFE_defconfig|  3 +++
 configs/M5475CFE_defconfig|  3 +++
 configs/M5475DFE_defconfig|  3 +++
 configs/M5475EFE_defconfig|  3 +++
 configs/M5475FFE_defconfig|  3 +++
 configs/M5475GFE_defconfig|  3 +++
 configs/M5485AFE_defconfig|  3 +++
 configs/M5485BFE_defconfig|  3 +++
 configs/M5485CFE_defconfig|  3 +++
 configs/M5485DFE_defconfig|  3 +++
 configs/M5485EFE_defconfig|  3 +++
 configs/M5485FFE_defconfig|  3 +++
 configs/M5485GFE_defconfig|  3 +++
 configs/M5485HFE_defconfig|  3 +++
 configs/cobra5272_defconfig   |  2 ++
 configs/eb_cpu5282_defconfig  |  2 ++
 configs/eb_cpu5282_internal_defconfig |  2 ++
 configs/stmark2_defconfig | 14 --
 42 files changed, 105 insertions(+), 6 deletions(-)

diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig
index 9b5d35cd55..30091f3653 100644
--- a/configs/M5208EVBE_defconfig
+++ b/configs/M5208EVBE_defconfig
@@ -17,4 +17,6 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_ETH=y
+CONFIG_MCFFEC=y
 CONFIG_MII=y
diff --git a/configs/M5235EVB_Flash32_defconfig 
b/configs/M5235EVB_Flash32_defconfig
index 2e40b21d76..8aa7c9d456 100644
--- a/configs/M5235EVB_Flash32_defconfig
+++ b/configs/M5235EVB_Flash32_defconfig
@@ -22,4 +22,6 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_ETH=y
+CONFIG_MCFFEC=y
 CONFIG_MII=y
diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig
index fd5dd984be..bc8f13ad07 100644
--- a/configs/M5235EVB_defconfig
+++ b/configs/M5235EVB_defconfig
@@ -22,4 +22,6 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_ETH=y
+CONFIG_MCFFEC=y
 CONFIG_MII=y
diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig
index c39876d89c..b87676588b 100644
--- a/configs/M5272C3_defconfig
+++ b/configs/M5272C3_defconfig
@@ -18,4 +18,6 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_ETH=y
+CONFIG_MCFFEC=y
 CONFIG_MII=y
diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig
index ecb3e32070..7f0f00928b 100644
--- a/configs/M5275EVB_defconfig
+++ b/configs/M5275EVB_defconfig
@@ -19,4 +19,6 @@ CONFIG_DEFAULT_DEVICE_TREE="M5275EVB"
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_ETH=y
+CONFIG_MCFFEC=y
 CONFIG_MII=y
diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig
index 731fb1ec68..2dff7d957f 100644
--- a/configs/M5282EVB_defconfig
+++ b/configs/M5282EVB_defconfig
@@ -18,4 +18,6 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_ETH=y
+CONFIG_MCFFEC=y
 CONFIG_MII=y
diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig
index 92dfd0256d..69253a097f 100644
--- a/configs/M53017EVB_defconfig
+++ b/configs/M53017EVB_defconfig
@@ -21,4 +21,6 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_DM_ETH=y
+CONFIG_MCFFEC=y
 CONFIG_MII=y
diff --git 

[U-Boot] [PATCH 2/9] m68k: add fec fdt overrides to all boards

2019-11-15 Thread Angelo Dureghello
From: Angelo Durgehello 

Add ethernet controller overrides for all involved boards.

Signed-off-by: Angelo Durgehello 
---
 arch/m68k/dts/M5208EVBE.dts   | 3 +++
 arch/m68k/dts/M5235EVB.dts| 3 +++
 arch/m68k/dts/M5235EVB_Flash32.dts| 3 +++
 arch/m68k/dts/M5272C3.dts | 3 +++
 arch/m68k/dts/M5275EVB.dts| 7 +++
 arch/m68k/dts/M5282EVB.dts| 3 +++
 arch/m68k/dts/M53017EVB.dts   | 7 +++
 arch/m68k/dts/M5329AFEE.dts   | 3 +++
 arch/m68k/dts/M5329BFEE.dts   | 3 +++
 arch/m68k/dts/M5373EVB.dts| 3 +++
 arch/m68k/dts/M54418TWR.dts   | 9 +
 arch/m68k/dts/M54418TWR_nand_mii.dts  | 9 +
 arch/m68k/dts/M54418TWR_nand_rmii.dts | 9 +
 arch/m68k/dts/M54418TWR_nand_rmii_lowfreq.dts | 9 +
 arch/m68k/dts/M54418TWR_serial_mii.dts| 9 +
 arch/m68k/dts/M54418TWR_serial_rmii.dts   | 9 +
 arch/m68k/dts/M54451EVB.dts   | 8 
 arch/m68k/dts/M54451EVB_stmicro.dts   | 8 
 arch/m68k/dts/M54455EVB.dts   | 9 +
 arch/m68k/dts/M54455EVB_a66.dts   | 9 +
 arch/m68k/dts/M54455EVB_i66.dts   | 9 +
 arch/m68k/dts/M54455EVB_intel.dts | 8 
 arch/m68k/dts/M54455EVB_stm33.dts | 9 +
 arch/m68k/dts/M5475AFE.dts| 8 
 arch/m68k/dts/M5475BFE.dts| 8 
 arch/m68k/dts/M5475CFE.dts| 8 
 arch/m68k/dts/M5475DFE.dts| 8 
 arch/m68k/dts/M5475EFE.dts| 8 
 arch/m68k/dts/M5475FFE.dts| 8 
 arch/m68k/dts/M5475GFE.dts| 8 
 arch/m68k/dts/M5485AFE.dts| 8 
 arch/m68k/dts/M5485BFE.dts| 8 
 arch/m68k/dts/M5485CFE.dts| 8 
 arch/m68k/dts/M5485DFE.dts| 8 
 arch/m68k/dts/M5485EFE.dts| 8 
 arch/m68k/dts/M5485FFE.dts| 8 
 arch/m68k/dts/M5485GFE.dts| 8 
 arch/m68k/dts/M5485HFE.dts| 8 
 arch/m68k/dts/cobra5272.dts   | 3 +++
 arch/m68k/dts/eb_cpu5282.dts  | 3 +++
 arch/m68k/dts/eb_cpu5282_internal.dts | 3 +++
 arch/m68k/dts/stmark2.dts | 9 +
 42 files changed, 290 insertions(+)

diff --git a/arch/m68k/dts/M5208EVBE.dts b/arch/m68k/dts/M5208EVBE.dts
index e78513f3b8..3e5a698861 100644
--- a/arch/m68k/dts/M5208EVBE.dts
+++ b/arch/m68k/dts/M5208EVBE.dts
@@ -20,3 +20,6 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
diff --git a/arch/m68k/dts/M5235EVB.dts b/arch/m68k/dts/M5235EVB.dts
index 1a32539323..b170b7bd03 100644
--- a/arch/m68k/dts/M5235EVB.dts
+++ b/arch/m68k/dts/M5235EVB.dts
@@ -20,3 +20,6 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
diff --git a/arch/m68k/dts/M5235EVB_Flash32.dts 
b/arch/m68k/dts/M5235EVB_Flash32.dts
index fcbffb23f5..497d824541 100644
--- a/arch/m68k/dts/M5235EVB_Flash32.dts
+++ b/arch/m68k/dts/M5235EVB_Flash32.dts
@@ -20,3 +20,6 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
diff --git a/arch/m68k/dts/M5272C3.dts b/arch/m68k/dts/M5272C3.dts
index 6efb8a4cc5..0ecf1e7429 100644
--- a/arch/m68k/dts/M5272C3.dts
+++ b/arch/m68k/dts/M5272C3.dts
@@ -20,3 +20,6 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
diff --git a/arch/m68k/dts/M5275EVB.dts b/arch/m68k/dts/M5275EVB.dts
index cd9eb7d145..f0f573c08c 100644
--- a/arch/m68k/dts/M5275EVB.dts
+++ b/arch/m68k/dts/M5275EVB.dts
@@ -20,3 +20,10 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
diff --git a/arch/m68k/dts/M5282EVB.dts b/arch/m68k/dts/M5282EVB.dts
index 9527caafc2..9b506635b9 100644
--- a/arch/m68k/dts/M5282EVB.dts
+++ b/arch/m68k/dts/M5282EVB.dts
@@ -20,3 +20,6 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
diff --git a/arch/m68k/dts/M53017EVB.dts b/arch/m68k/dts/M53017EVB.dts
index b267488e0f..401318ddf9 100644
--- a/arch/m68k/dts/M53017EVB.dts
+++ b/arch/m68k/dts/M53017EVB.dts
@@ -20,3 +20,10 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
diff --git a/arch/m68k/dts/M5329AFEE.dts b/arch/m68k/dts/M5329AFEE.dts
index 7d121d68e7..ab009c5605 100644
--- a/arch/m68k/dts/M5329AFEE.dts
+++ b/arch/m68k/dts/M5329AFEE.dts
@@ -20,3 +20,6 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
diff --git a/arch/m68k/dts/M5329BFEE.dts b/arch/m68k/dts/M5329BFEE.dts
index cd087b6ea6..7e73ab9c66 100644
--- a/arch/m68k/dts/M5329BFEE.dts
+++ b/arch/m68k/dts/M5329BFEE.dts
@@ -20,3 +20,6 @@
status = "okay";
 };
 
+ 

[U-Boot] [PATCH 1/9] m68k: add fec base node to devicetrees

2019-11-15 Thread Angelo Dureghello
From: Angelo Durgehello 

Add basic ethernet controller devicetree nodes for all ColdFire
families.

Signed-off-by: Angelo Durgehello 
---
 arch/m68k/dts/mcf5208.dtsi  | 10 ++
 arch/m68k/dts/mcf523x.dtsi  | 12 
 arch/m68k/dts/mcf5271.dtsi  | 10 ++
 arch/m68k/dts/mcf5272.dtsi  | 10 ++
 arch/m68k/dts/mcf5275.dtsi  | 22 +-
 arch/m68k/dts/mcf5282.dtsi  | 10 ++
 arch/m68k/dts/mcf5301x.dtsi | 21 +
 arch/m68k/dts/mcf5329.dtsi  | 10 ++
 arch/m68k/dts/mcf537x.dtsi  | 10 ++
 arch/m68k/dts/mcf5441x.dtsi | 20 
 arch/m68k/dts/mcf5445x.dtsi | 20 
 arch/m68k/dts/mcf54xx.dtsi  | 32 
 12 files changed, 186 insertions(+), 1 deletion(-)

diff --git a/arch/m68k/dts/mcf5208.dtsi b/arch/m68k/dts/mcf5208.dtsi
index 558d8bf41a..4802dd3074 100644
--- a/arch/m68k/dts/mcf5208.dtsi
+++ b/arch/m68k/dts/mcf5208.dtsi
@@ -8,6 +8,7 @@
 
aliases {
serial0 = 
+   fec0 = 
};
 
soc {
@@ -32,5 +33,14 @@
reg = <0xfc068000 0x40>;
status = "disabled";
};
+
+   fec0: ethernet@fc03 {
+   compatible = "fsl,mcf-fec";
+   reg = <0xfc03 0x400>;
+   mii-base = <0>;
+   max-speed = <100>;
+   timeout-loop = <5>;
+   status = "disabled";
+   };
};
 };
diff --git a/arch/m68k/dts/mcf523x.dtsi b/arch/m68k/dts/mcf523x.dtsi
index 9e79d472ec..550e824cb1 100644
--- a/arch/m68k/dts/mcf523x.dtsi
+++ b/arch/m68k/dts/mcf523x.dtsi
@@ -8,6 +8,7 @@
 
aliases {
serial0 = 
+   fec0 = 
};
 
soc {
@@ -39,6 +40,17 @@
reg = <0x280 0x40>;
status = "disabled";
};
+
+   fec0: ethernet@1000 {
+   compatible = "fsl,mcf-fec";
+   #address-cells=<2>;
+   #size-cells=<1>;
+   reg = <0x1000 0x400>;
+   mii-base = <0>;
+   max-speed = <100>;
+   timeout-loop = <5>;
+   status = "disabled";
+   };
};
};
 };
diff --git a/arch/m68k/dts/mcf5271.dtsi b/arch/m68k/dts/mcf5271.dtsi
index 29355528d0..b3484c2c84 100644
--- a/arch/m68k/dts/mcf5271.dtsi
+++ b/arch/m68k/dts/mcf5271.dtsi
@@ -8,6 +8,7 @@
 
aliases {
serial0 = 
+   fec0 = 
};
 
soc {
@@ -39,6 +40,15 @@
reg = <0x280 0x40>;
status = "disabled";
};
+
+   fec0: ethernet@1000 {
+   compatible = "fsl,mcf-fec";
+   reg = <0x1000 0x400>;
+   mii-base = <0>;
+   max-speed = <100>;
+   timeout-loop = <5>;
+   status = "disabled";
+   };
};
};
 };
diff --git a/arch/m68k/dts/mcf5272.dtsi b/arch/m68k/dts/mcf5272.dtsi
index a56117728b..173baaba3f 100644
--- a/arch/m68k/dts/mcf5272.dtsi
+++ b/arch/m68k/dts/mcf5272.dtsi
@@ -8,6 +8,7 @@
 
aliases {
serial0 = 
+   fec0 = 
};
 
soc {
@@ -33,6 +34,15 @@
reg = <0x140 0x40>;
status = "disabled";
};
+
+   fec0: ethernet@840 {
+   compatible = "fsl,mcf-fec";
+   reg = <0x840 0x400>;
+   mii-base = <0>;
+   max-speed = <100>;
+   timeout-loop = <5>;
+   status = "disabled";
+   };
};
};
 };
diff --git a/arch/m68k/dts/mcf5275.dtsi b/arch/m68k/dts/mcf5275.dtsi
index b375609d4a..99dd7d3924 100644
--- a/arch/m68k/dts/mcf5275.dtsi
+++ b/arch/m68k/dts/mcf5275.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (C) 2018 Angelo Dureghello 
+ * Copyright (C) 2019 Angelo Dureghello 
  */
 
 / {
@@ -8,6 +8,8 @@
 
aliases {
serial0 = 
+   fec0 = 
+   fec1 = 
};
 
soc {
@@ -39,6 +41,24 @@
reg = <0x280 0x40>;
status = "disabled";
};
+
+   fec0: ethernet@1000 {
+   compatible = "fsl,mcf-fec";
+

[U-Boot] [PATCH V4 2/2] rockchip: dts: tinker: Add tinker-s board support

2019-11-15 Thread Michael Trimarchi
Support tinker-s board. The board is equivalent of tinker board
except of emmc.

TODO:
- support of usb current burst when the board is powered from pc

Signed-off-by: Michael Trimarchi 
---
Changes:
v3->v4: Add mantainer and boot from to save the enviroment
v2->v3: drop dmc section
v1->v2: Add boot configuration for emmc
---
 arch/arm/dts/Makefile|  1 +
 arch/arm/dts/rk3288-tinker-s-u-boot.dtsi | 34 +++
 arch/arm/dts/rk3288-tinker-s.dts | 29 ++
 board/rockchip/tinker_rk3288/MAINTAINERS |  7 ++
 board/rockchip/tinker_rk3288/tinker-rk3288.c | 12 +++
 configs/tinker-s-rk3288_defconfig| 99 
 include/configs/tinker_rk3288.h  |  1 +
 7 files changed, 183 insertions(+)
 create mode 100644 arch/arm/dts/rk3288-tinker-s-u-boot.dtsi
 create mode 100644 arch/arm/dts/rk3288-tinker-s.dts
 create mode 100644 configs/tinker-s-rk3288_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 85ef00a2bd..dfaeea4a25 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -87,6 +87,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3288) += \
rk3288-popmetal.dtb \
rk3288-rock2-square.dtb \
rk3288-tinker.dtb \
+   rk3288-tinker-s.dtb \
rk3288-veyron-jerry.dtb \
rk3288-veyron-mickey.dtb \
rk3288-veyron-minnie.dtb \
diff --git a/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi 
b/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi
new file mode 100644
index 00..a177fca73a
--- /dev/null
+++ b/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Amarula Solutions SRO
+ */
+
+#include "rk3288-u-boot.dtsi"
+#include "rk3288-tinker-u-boot.dtsi"
+
+/ {
+   chosen {
+   u-boot,spl-boot-order = \
+   "same-as-spl", , 
+   };
+};
+
+ {
+   u-boot,dm-spl;
+};
+
+_clk {
+   u-boot,dm-spl;
+};
+
+_cmd {
+   u-boot,dm-spl;
+};
+
+_pwr {
+   u-boot,dm-spl;
+};
+
+_bus8 {
+   u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/rk3288-tinker-s.dts b/arch/arm/dts/rk3288-tinker-s.dts
new file mode 100644
index 00..cc7ac5f881
--- /dev/null
+++ b/arch/arm/dts/rk3288-tinker-s.dts
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rk3288-tinker.dtsi"
+
+/ {
+   model = "Rockchip RK3288 Asus Tinker Board S";
+   compatible = "asus,rk3288-tinker-s", "rockchip,rk3288";
+
+   chosen {
+   stdout-path = 
+   };
+};
+
+ {
+   bus-width = <8>;
+   cap-mmc-highspeed;
+   non-removable;
+   pinctrl-names = "default";
+   pinctrl-0 = <_clk _cmd _pwr _bus8>;
+   max-frequency = <15000>;
+   mmc-hs200-1_8v;
+   mmc-ddr-1_8v;
+   status = "okay";
+};
diff --git a/board/rockchip/tinker_rk3288/MAINTAINERS 
b/board/rockchip/tinker_rk3288/MAINTAINERS
index cddceafb6e..ed5de682c9 100644
--- a/board/rockchip/tinker_rk3288/MAINTAINERS
+++ b/board/rockchip/tinker_rk3288/MAINTAINERS
@@ -4,3 +4,10 @@ S: Maintained
 F: board/rockchip/tinker_rk3288
 F: include/configs/tinker_rk3288.h
 F: configs/tinker-rk3288_defconfig
+
+TINKER-S-RK3288
+M: Michael Trimarchi 
+S: Maintained
+F: board/rockchip/tinker_rk3288
+F: include/configs/tinker_rk3288.h
+F: configs/tinker-s-rk3288_defconfig
diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c 
b/board/rockchip/tinker_rk3288/tinker-rk3288.c
index 6c76c3c25c..7a0c3c997d 100644
--- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
+++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
@@ -8,6 +8,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 static int get_ethaddr_from_eeprom(u8 *addr)
 {
@@ -33,3 +35,13 @@ int rk3288_board_late_init(void)
 
return 0;
 }
+
+int mmc_get_env_dev(void)
+{
+   u32 bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
+
+   if (bootdevice_brom_id == BROM_BOOTSOURCE_EMMC)
+   return 0;
+
+   return 1;
+}
diff --git a/configs/tinker-s-rk3288_defconfig 
b/configs/tinker-s-rk3288_defconfig
new file mode 100644
index 00..c851a93f31
--- /dev/null
+++ b/configs/tinker-s-rk3288_defconfig
@@ -0,0 +1,99 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x0100
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_ROCKCHIP_RK3288=y
+CONFIG_TARGET_TINKER_RK3288=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL_SIZE_LIMIT=307200
+CONFIG_SPL_STACK_R_ADDR=0x80
+CONFIG_DEBUG_UART_BASE=0xff69
+CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_USE_PREBOOT=y
+CONFIG_SILENT_CONSOLE=y
+CONFIG_CONSOLE_MUX=y
+CONFIG_DEFAULT_FDT_FILE="rk3288-tinker-s.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y

[U-Boot] [PATCH V4 1/2] rockchip: dts: tinker: Move u-boot dmc initialization to specific section

2019-11-15 Thread Michael Trimarchi
dmc is used to initialize the memory controller. It's needed by
u-boot. Move it in the specific section

Signed-off-by: Michael Trimarchi 
---
Changes:
nothing
---
 arch/arm/dts/rk3288-tinker-u-boot.dtsi | 12 
 arch/arm/dts/rk3288-tinker.dts | 12 
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/arm/dts/rk3288-tinker-u-boot.dtsi 
b/arch/arm/dts/rk3288-tinker-u-boot.dtsi
index f7f9d6dc72..732aa4f91f 100644
--- a/arch/arm/dts/rk3288-tinker-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-tinker-u-boot.dtsi
@@ -5,6 +5,18 @@
 
 #include "rk3288-u-boot.dtsi"
 
+ {
+   u-boot,dm-pre-reloc;
+   rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
+   0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
+   0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
+   0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
+   0x8 0x1f4>;
+   rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
+   0x0 0xc3 0x6 0x2>;
+   rockchip,sdram-params = <0x20d266a4 0x5b6 2 53300 6 9 0>;
+};
+
  {
u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3288-tinker.dts b/arch/arm/dts/rk3288-tinker.dts
index 94c3afe860..4b8405fd82 100644
--- a/arch/arm/dts/rk3288-tinker.dts
+++ b/arch/arm/dts/rk3288-tinker.dts
@@ -15,18 +15,6 @@
};
 };
 
- {
-   rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
-   0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
-   0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
-   0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
-   0x8 0x1f4>;
-   rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
-   0x0 0xc3 0x6 0x2>;
-   rockchip,sdram-params = <0x20d266a4 0x5b6 2 53300 6 9 0>;
-};
-
-
  {
usb {
host_vbus_drv: host-vbus-drv {
-- 
2.17.1

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[U-Boot] [PATCH v1] arm: socfpga: Enable Stratix10 SMMU access

2019-11-15 Thread thor . thayer
From: Thor Thayer 

Enable TCU access through the Stratix10 CCU so that the
SMMU can access the SDRAM.

Signed-off-by: Thor Thayer 
---

 arch/arm/mach-socfpga/include/mach/firewall_s10.h |  7 +++
 drivers/ddr/altera/sdram_s10.c| 14 ++
 2 files changed, 21 insertions(+)

diff --git a/arch/arm/mach-socfpga/include/mach/firewall_s10.h 
b/arch/arm/mach-socfpga/include/mach/firewall_s10.h
index b96f779f1487..d698e4b9e2a1 100644
--- a/arch/arm/mach-socfpga/include/mach/firewall_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/firewall_s10.h
@@ -95,6 +95,13 @@ struct socfpga_firwall_l4_sys {
 
 #define CCU_IOM_MPRT_ADMASK_MEM_RAM0   0x18628
 
+#define CCU_TCU_MPRT_ADBASE_MEMSPACE0  0x2c520
+#define CCU_TCU_MPRT_ADBASE_MEMSPACE1A 0x2c540
+#define CCU_TCU_MPRT_ADBASE_MEMSPACE1B 0x2c560
+#define CCU_TCU_MPRT_ADBASE_MEMSPACE1C 0x2c580
+#define CCU_TCU_MPRT_ADBASE_MEMSPACE1D 0x2c5a0
+#define CCU_TCU_MPRT_ADBASE_MEMSPACE1E 0x2c5c0
+
 #define CCU_ADMASK_P_MASK  BIT(0)
 #define CCU_ADMASK_NS_MASK BIT(1)
 
diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c
index 56cbbac9fe1f..bc027c478452 100644
--- a/drivers/ddr/altera/sdram_s10.c
+++ b/drivers/ddr/altera/sdram_s10.c
@@ -323,6 +323,20 @@ static int sdram_mmr_init_full(struct udevice *dev)
clrbits_le32(CCU_REG_ADDR(CCU_IOM_MPRT_ADBASE_MEMSPACE1E),
 CCU_ADBASE_DI_MASK);
 
+   /* Enable access to DDR from TCU */
+   clrbits_le32(CCU_REG_ADDR(CCU_TCU_MPRT_ADBASE_MEMSPACE0),
+CCU_ADBASE_DI_MASK);
+   clrbits_le32(CCU_REG_ADDR(CCU_TCU_MPRT_ADBASE_MEMSPACE1A),
+CCU_ADBASE_DI_MASK);
+   clrbits_le32(CCU_REG_ADDR(CCU_TCU_MPRT_ADBASE_MEMSPACE1B),
+CCU_ADBASE_DI_MASK);
+   clrbits_le32(CCU_REG_ADDR(CCU_TCU_MPRT_ADBASE_MEMSPACE1C),
+CCU_ADBASE_DI_MASK);
+   clrbits_le32(CCU_REG_ADDR(CCU_TCU_MPRT_ADBASE_MEMSPACE1D),
+CCU_ADBASE_DI_MASK);
+   clrbits_le32(CCU_REG_ADDR(CCU_TCU_MPRT_ADBASE_MEMSPACE1E),
+CCU_ADBASE_DI_MASK);
+
/* this enables nonsecure access to DDR */
/* mpuregion0addr_limit */
FW_MPU_DDR_SCR_WRITEL(0x, FW_MPU_DDR_SCR_MPUREGION0ADDR_LIMIT);
-- 
2.7.4

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[U-Boot] [PATCH V3 5/5] aes: add test unit for aes196 and aes256

2019-11-15 Thread Philippe Reynes
This commit add test unit for aes196 and aes256.

Signed-off-by: Philippe Reynes 
---
 test/lib/test_aes.c | 4 
 1 file changed, 4 insertions(+)

Changelog:
v3:
- new patch in this serie (in the previous version, the test to
  aes was added to pytest, now, we add test unit for aes as proposed by Simon)

diff --git a/test/lib/test_aes.c b/test/lib/test_aes.c
index bddeabe..3d4fada 100644
--- a/test/lib/test_aes.c
+++ b/test/lib/test_aes.c
@@ -26,6 +26,10 @@ struct test_aes_s {
 static struct test_aes_s test_aes[] = {
{ AES128_KEY_LENGTH, AES128_EXPAND_KEY_LENGTH, TEST_AES_ONE_BLOCK,  1 },
{ AES128_KEY_LENGTH, AES128_EXPAND_KEY_LENGTH, TEST_AES_CBC_CHAIN, 16 },
+   { AES192_KEY_LENGTH, AES192_EXPAND_KEY_LENGTH, TEST_AES_ONE_BLOCK,  1 },
+   { AES192_KEY_LENGTH, AES192_EXPAND_KEY_LENGTH, TEST_AES_CBC_CHAIN, 16 },
+   { AES256_KEY_LENGTH, AES256_EXPAND_KEY_LENGTH, TEST_AES_ONE_BLOCK,  1 },
+   { AES256_KEY_LENGTH, AES256_EXPAND_KEY_LENGTH, TEST_AES_CBC_CHAIN, 16 },
 };
 
 static void rand_buf(u8 *buf, int size)
-- 
2.7.4

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[U-Boot] [PATCH V3 2/5] aes: add support of aes192 and aes256

2019-11-15 Thread Philippe Reynes
Until now, we only support aes128. This commit add the support
of aes192 and aes256.

Signed-off-by: Philippe Reynes 
---
 cmd/aes.c   | 38 +-
 include/uboot_aes.h | 34 +++
 lib/aes.c   | 77 +
 3 files changed, 103 insertions(+), 46 deletions(-)

Changelog:
v3:
- no change
v2:
- fix the help for the aes command

diff --git a/cmd/aes.c b/cmd/aes.c
index 24b0256..8c5b42f 100644
--- a/cmd/aes.c
+++ b/cmd/aes.c
@@ -2,7 +2,7 @@
 /*
  * Copyright (C) 2014 Marek Vasut 
  *
- * Command for en/de-crypting block of memory with AES-128-CBC cipher.
+ * Command for en/de-crypting block of memory with AES-[128/192/256]-CBC 
cipher.
  */
 
 #include 
@@ -13,6 +13,18 @@
 #include 
 #include 
 
+u32 aes_get_key_len(char *command)
+{
+   u32 key_len = AES128_KEY_LENGTH;
+
+   if (!strcmp(command, "aes.192"))
+   key_len = AES192_KEY_LENGTH;
+   else if (!strcmp(command, "aes.256"))
+   key_len = AES256_KEY_LENGTH;
+
+   return key_len;
+}
+
 /**
  * do_aes() - Handle the "aes" command-line command
  * @cmdtp: Command data struct pointer
@@ -27,13 +39,15 @@ static int do_aes(cmd_tbl_t *cmdtp, int flag, int argc, 
char *const argv[])
 {
uint32_t key_addr, iv_addr, src_addr, dst_addr, len;
uint8_t *key_ptr, *iv_ptr, *src_ptr, *dst_ptr;
-   uint8_t key_exp[AES_EXPAND_KEY_LENGTH];
-   uint32_t aes_blocks;
+   u8 key_exp[AES256_EXPAND_KEY_LENGTH];
+   u32 aes_blocks, key_len;
int enc;
 
if (argc != 7)
return CMD_RET_USAGE;
 
+   key_len = aes_get_key_len(argv[0]);
+
if (!strncmp(argv[1], "enc", 3))
enc = 1;
else if (!strncmp(argv[1], "dec", 3))
@@ -47,23 +61,23 @@ static int do_aes(cmd_tbl_t *cmdtp, int flag, int argc, 
char *const argv[])
dst_addr = simple_strtoul(argv[5], NULL, 16);
len = simple_strtoul(argv[6], NULL, 16);
 
-   key_ptr = (uint8_t *)map_sysmem(key_addr, 128 / 8);
+   key_ptr = (uint8_t *)map_sysmem(key_addr, key_len);
iv_ptr = (uint8_t *)map_sysmem(iv_addr, 128 / 8);
src_ptr = (uint8_t *)map_sysmem(src_addr, len);
dst_ptr = (uint8_t *)map_sysmem(dst_addr, len);
 
/* First we expand the key. */
-   aes_expand_key(key_ptr, key_exp);
+   aes_expand_key(key_ptr, key_len, key_exp);
 
/* Calculate the number of AES blocks to encrypt. */
aes_blocks = DIV_ROUND_UP(len, AES_BLOCK_LENGTH);
 
if (enc)
-   aes_cbc_encrypt_blocks(key_exp, iv_ptr, src_ptr, dst_ptr,
-  aes_blocks);
+   aes_cbc_encrypt_blocks(key_len, key_exp, iv_ptr, src_ptr,
+  dst_ptr, aes_blocks);
else
-   aes_cbc_decrypt_blocks(key_exp, iv_ptr, src_ptr, dst_ptr,
-  aes_blocks);
+   aes_cbc_decrypt_blocks(key_len, key_exp, iv_ptr, src_ptr,
+  dst_ptr, aes_blocks);
 
unmap_sysmem(key_ptr);
unmap_sysmem(iv_ptr);
@@ -76,13 +90,13 @@ static int do_aes(cmd_tbl_t *cmdtp, int flag, int argc, 
char *const argv[])
 /***/
 #ifdef CONFIG_SYS_LONGHELP
 static char aes_help_text[] =
-   "enc key iv src dst len - Encrypt block of data $len bytes long\n"
+   "[.128,.192,.256] enc key iv src dst len - Encrypt block of data $len 
bytes long\n"
" at address $src using a key at address\n"
" $key with initialization vector at 
address\n"
" $iv. Store the result at address $dst.\n"
" The $len size must be multiple of 16 
bytes.\n"
" The $key and $iv must be 16 bytes long.\n"
-   "aes dec key iv src dst len - Decrypt block of data $len bytes long\n"
+   "aes [.128,.192,.256] dec key iv src dst len - Decrypt block of data 
$len bytes long\n"
" at address $src using a key at address\n"
" $key with initialization vector at 
address\n"
" $iv. Store the result at address $dst.\n"
@@ -92,6 +106,6 @@ static char aes_help_text[] =
 
 U_BOOT_CMD(
aes, 7, 1, do_aes,
-   "AES 128 CBC encryption",
+   "AES 128/192/256 CBC encryption",
aes_help_text
 );
diff --git a/include/uboot_aes.h b/include/uboot_aes.h
index 1ae3ac9..d2583be 100644
--- a/include/uboot_aes.h
+++ b/include/uboot_aes.h
@@ -23,11 +23,18 @@ typedef unsigned int u32;
 
 enum {
AES_STATECOLS   = 4,/* columns in the state & expanded key */
-   AES_KEYCOLS = 4,/* columns in a key */
-   AES_ROUNDS  = 10,   /* rounds in encryption */
-
-   AES_KEY_LENGTH  = 128 / 8,
-   

[U-Boot] [PATCH V3 4/5] aes: add test unit for aes128

2019-11-15 Thread Philippe Reynes
This commit add test unit for aes128.

Signed-off-by: Philippe Reynes 
---
 test/lib/Makefile   |   1 +
 test/lib/test_aes.c | 162 
 2 files changed, 163 insertions(+)
 create mode 100644 test/lib/test_aes.c

Changelog:
v3:
- new patch in this serie (in the previous version, the test to
  aes was added to pytest, now, we add test unit for aes as proposed by Simon)

diff --git a/test/lib/Makefile b/test/lib/Makefile
index b13aaca..53c896a 100644
--- a/test/lib/Makefile
+++ b/test/lib/Makefile
@@ -7,3 +7,4 @@ obj-y += hexdump.o
 obj-y += lmb.o
 obj-y += string.o
 obj-$(CONFIG_ERRNO_STR) += test_errno_str.o
+obj-$(CONFIG_AES) += test_aes.o
diff --git a/test/lib/test_aes.c b/test/lib/test_aes.c
new file mode 100644
index 000..bddeabe
--- /dev/null
+++ b/test/lib/test_aes.c
@@ -0,0 +1,162 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2019 Philippe Reynes 
+ *
+ * Unit tests for aes functions
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define TEST_AES_ONE_BLOCK 0
+#define TEST_AES_CBC_CHAIN 1
+
+struct test_aes_s {
+   int key_len;
+   int key_exp_len;
+   int type;
+   int num_block;
+};
+
+static struct test_aes_s test_aes[] = {
+   { AES128_KEY_LENGTH, AES128_EXPAND_KEY_LENGTH, TEST_AES_ONE_BLOCK,  1 },
+   { AES128_KEY_LENGTH, AES128_EXPAND_KEY_LENGTH, TEST_AES_CBC_CHAIN, 16 },
+};
+
+static void rand_buf(u8 *buf, int size)
+{
+   int i;
+
+   for (i = 0; i < size; i++)
+   buf[i] = rand() & 0xff;
+}
+
+static int lib_test_aes_one_block(struct unit_test_state *uts, int key_len,
+ u8 *key_exp, u8 *iv, int num_block,
+ u8 *nocipher, u8 *ciphered, u8 *uncipher)
+{
+   aes_encrypt(key_len, nocipher, key_exp, ciphered);
+   aes_decrypt(key_len, ciphered, key_exp, uncipher);
+
+   ut_asserteq_mem(nocipher, uncipher, AES_BLOCK_LENGTH);
+
+   /* corrupt the expanded key */
+   key_exp[0]++;
+   aes_decrypt(key_len, ciphered, key_exp, uncipher);
+   ut_assertf(memcmp(nocipher, uncipher, AES_BLOCK_LENGTH),
+  "nocipher and uncipher should be different\n");
+
+   return 0;
+}
+
+static int lib_test_aes_cbc_chain(struct unit_test_state *uts, int key_len,
+ u8 *key_exp, u8 *iv, int num_block,
+ u8 *nocipher, u8 *ciphered, u8 *uncipher)
+{
+   aes_cbc_encrypt_blocks(key_len, key_exp, iv,
+  nocipher, ciphered, num_block);
+   aes_cbc_decrypt_blocks(key_len, key_exp, iv,
+  ciphered, uncipher, num_block);
+
+   ut_asserteq_mem(nocipher, uncipher, num_block * AES_BLOCK_LENGTH);
+
+   /* corrupt the expanded key */
+   key_exp[0]++;
+   aes_cbc_decrypt_blocks(key_len, key_exp, iv,
+  ciphered, uncipher, num_block);
+   ut_assertf(memcmp(nocipher, uncipher, num_block * AES_BLOCK_LENGTH),
+  "nocipher and uncipher should be different\n");
+
+   return 0;
+}
+
+static int _lib_test_aes_run(struct unit_test_state *uts, int key_len,
+int key_exp_len, int type, int num_block)
+{
+   u8 *key, *key_exp, *iv;
+   u8 *nocipher, *ciphered, *uncipher;
+   int ret;
+
+   /* Allocate all the buffer */
+   key = malloc(key_len);
+   ut_assertnonnull(key);
+   key_exp = malloc(key_exp_len);
+   ut_assertnonnull(key_exp);
+   iv = malloc(AES_BLOCK_LENGTH);
+   ut_assertnonnull(iv);
+   nocipher = malloc(num_block * AES_BLOCK_LENGTH);
+   ut_assertnonnull(nocipher);
+   ciphered = malloc((num_block + 1) * AES_BLOCK_LENGTH);
+   ut_assertnonnull(ciphered);
+   uncipher = malloc((num_block + 1) * AES_BLOCK_LENGTH);
+   ut_assertnonnull(uncipher);
+
+   /* Initialize all buffer */
+   rand_buf(key, key_len);
+   rand_buf(iv, AES_BLOCK_LENGTH);
+   rand_buf(nocipher, num_block * AES_BLOCK_LENGTH);
+   memset(ciphered, 0, (num_block + 1) * AES_BLOCK_LENGTH);
+   memset(uncipher, 0, (num_block + 1) * AES_BLOCK_LENGTH);
+
+   /* Expand the key */
+   aes_expand_key(key, key_len, key_exp);
+
+   /* Encrypt and decrypt */
+   switch (type) {
+   case TEST_AES_ONE_BLOCK:
+   ret = lib_test_aes_one_block(uts, key_len, key_exp, iv,
+num_block, nocipher,
+ciphered, uncipher);
+   break;
+   case TEST_AES_CBC_CHAIN:
+   ret = lib_test_aes_cbc_chain(uts, key_len, key_exp, iv,
+num_block, nocipher,
+ciphered, uncipher);
+   break;
+   default:
+   printf("%s: unknown type (type=%d)\n", __func__, 

[U-Boot] [PATCH V3 1/5] aes: add a define for the size of a block

2019-11-15 Thread Philippe Reynes
In the code, we use the size of the key for the
size of the block. It's true when the key is 128 bits,
but it become false for key of 192 bits and 256 bits.
So to prepare the support of aes192  and 256,
we introduce a constant for the iaes block size.

Signed-off-by: Philippe Reynes 
---
 cmd/aes.c   |  2 +-
 include/uboot_aes.h |  5 +++--
 lib/aes.c   | 34 +-
 3 files changed, 21 insertions(+), 20 deletions(-)

Changelog:
v3:
- no change
v2:
- no change

diff --git a/cmd/aes.c b/cmd/aes.c
index 8c61cee..24b0256 100644
--- a/cmd/aes.c
+++ b/cmd/aes.c
@@ -56,7 +56,7 @@ static int do_aes(cmd_tbl_t *cmdtp, int flag, int argc, char 
*const argv[])
aes_expand_key(key_ptr, key_exp);
 
/* Calculate the number of AES blocks to encrypt. */
-   aes_blocks = DIV_ROUND_UP(len, AES_KEY_LENGTH);
+   aes_blocks = DIV_ROUND_UP(len, AES_BLOCK_LENGTH);
 
if (enc)
aes_cbc_encrypt_blocks(key_exp, iv_ptr, src_ptr, dst_ptr,
diff --git a/include/uboot_aes.h b/include/uboot_aes.h
index 2fda384..1ae3ac9 100644
--- a/include/uboot_aes.h
+++ b/include/uboot_aes.h
@@ -18,7 +18,7 @@ typedef unsigned int u32;
  * AES encryption library, with small code size, supporting only 128-bit AES
  *
  * AES is a stream cipher which works a block at a time, with each block
- * in this case being AES_KEY_LENGTH bytes.
+ * in this case being AES_BLOCK_LENGTH bytes.
  */
 
 enum {
@@ -28,6 +28,7 @@ enum {
 
AES_KEY_LENGTH  = 128 / 8,
AES_EXPAND_KEY_LENGTH   = 4 * AES_STATECOLS * (AES_ROUNDS + 1),
+   AES_BLOCK_LENGTH= 128 / 8,
 };
 
 /**
@@ -62,7 +63,7 @@ void aes_decrypt(u8 *in, u8 *expkey, u8 *out);
 /**
  * Apply chain data to the destination using EOR
  *
- * Each array is of length AES_KEY_LENGTH.
+ * Each array is of length AES_BLOCK_LENGTH.
  *
  * @cbc_chain_data Chain data
  * @srcSource data
diff --git a/lib/aes.c b/lib/aes.c
index a12a192..cfa57b6 100644
--- a/lib/aes.c
+++ b/lib/aes.c
@@ -596,62 +596,62 @@ void aes_apply_cbc_chain_data(u8 *cbc_chain_data, u8 
*src, u8 *dst)
 {
int i;
 
-   for (i = 0; i < AES_KEY_LENGTH; i++)
+   for (i = 0; i < AES_BLOCK_LENGTH; i++)
*dst++ = *src++ ^ *cbc_chain_data++;
 }
 
 void aes_cbc_encrypt_blocks(u8 *key_exp, u8 *iv, u8 *src, u8 *dst,
u32 num_aes_blocks)
 {
-   u8 tmp_data[AES_KEY_LENGTH];
+   u8 tmp_data[AES_BLOCK_LENGTH];
u8 *cbc_chain_data = iv;
u32 i;
 
for (i = 0; i < num_aes_blocks; i++) {
debug("encrypt_object: block %d of %d\n", i, num_aes_blocks);
-   debug_print_vector("AES Src", AES_KEY_LENGTH, src);
+   debug_print_vector("AES Src", AES_BLOCK_LENGTH, src);
 
/* Apply the chain data */
aes_apply_cbc_chain_data(cbc_chain_data, src, tmp_data);
-   debug_print_vector("AES Xor", AES_KEY_LENGTH, tmp_data);
+   debug_print_vector("AES Xor", AES_BLOCK_LENGTH, tmp_data);
 
/* Encrypt the AES block */
aes_encrypt(tmp_data, key_exp, dst);
-   debug_print_vector("AES Dst", AES_KEY_LENGTH, dst);
+   debug_print_vector("AES Dst", AES_BLOCK_LENGTH, dst);
 
/* Update pointers for next loop. */
cbc_chain_data = dst;
-   src += AES_KEY_LENGTH;
-   dst += AES_KEY_LENGTH;
+   src += AES_BLOCK_LENGTH;
+   dst += AES_BLOCK_LENGTH;
}
 }
 
 void aes_cbc_decrypt_blocks(u8 *key_exp, u8 *iv, u8 *src, u8 *dst,
u32 num_aes_blocks)
 {
-   u8 tmp_data[AES_KEY_LENGTH], tmp_block[AES_KEY_LENGTH];
+   u8 tmp_data[AES_BLOCK_LENGTH], tmp_block[AES_BLOCK_LENGTH];
/* Convenient array of 0's for IV */
-   u8 cbc_chain_data[AES_KEY_LENGTH];
+   u8 cbc_chain_data[AES_BLOCK_LENGTH];
u32 i;
 
-   memcpy(cbc_chain_data, iv, AES_KEY_LENGTH);
+   memcpy(cbc_chain_data, iv, AES_BLOCK_LENGTH);
for (i = 0; i < num_aes_blocks; i++) {
debug("encrypt_object: block %d of %d\n", i, num_aes_blocks);
-   debug_print_vector("AES Src", AES_KEY_LENGTH, src);
+   debug_print_vector("AES Src", AES_BLOCK_LENGTH, src);
 
-   memcpy(tmp_block, src, AES_KEY_LENGTH);
+   memcpy(tmp_block, src, AES_BLOCK_LENGTH);
 
/* Decrypt the AES block */
aes_decrypt(src, key_exp, tmp_data);
-   debug_print_vector("AES Xor", AES_KEY_LENGTH, tmp_data);
+   debug_print_vector("AES Xor", AES_BLOCK_LENGTH, tmp_data);
 
/* Apply the chain data */
aes_apply_cbc_chain_data(cbc_chain_data, tmp_data, dst);
-   debug_print_vector("AES Dst", AES_KEY_LENGTH, dst);
+   debug_print_vector("AES Dst", AES_BLOCK_LENGTH, dst);
 
/* Update 

[U-Boot] [PATCH V3 3/5] tegra20: crypto: update code to use new aes api

2019-11-15 Thread Philippe Reynes
This commit update tge driver crypto for tegra20
to use the new aes api.

Signed-off-by: Philippe Reynes 
---
 arch/arm/mach-tegra/tegra20/crypto.c | 41 +++-
 1 file changed, 22 insertions(+), 19 deletions(-)

Changelog:
v3:
- no change
v2:
- add a really simple commit text

diff --git a/arch/arm/mach-tegra/tegra20/crypto.c 
b/arch/arm/mach-tegra/tegra20/crypto.c
index 66fbc3b..b91191e 100644
--- a/arch/arm/mach-tegra/tegra20/crypto.c
+++ b/arch/arm/mach-tegra/tegra20/crypto.c
@@ -39,34 +39,35 @@ static void left_shift_vector(u8 *in, u8 *out, int size)
 /**
  * Sign a block of data, putting the result into dst.
  *
- * \param key  Input AES key, length AES_KEY_LENGTH
+ * \param key  Input AES key, length AES128_KEY_LENGTH
  * \param key_schedule Expanded key to use
  * \param src  Source data of length 'num_aes_blocks' blocks
- * \param dst  Destination buffer, length AES_KEY_LENGTH
+ * \param dst  Destination buffer, length AES128_KEY_LENGTH
  * \param num_aes_blocks   Number of AES blocks to encrypt
  */
 static void sign_object(u8 *key, u8 *key_schedule, u8 *src, u8 *dst,
u32 num_aes_blocks)
 {
-   u8 tmp_data[AES_KEY_LENGTH];
-   u8 iv[AES_KEY_LENGTH] = {0};
-   u8 left[AES_KEY_LENGTH];
-   u8 k1[AES_KEY_LENGTH];
+   u8 tmp_data[AES128_KEY_LENGTH];
+   u8 iv[AES128_KEY_LENGTH] = {0};
+   u8 left[AES128_KEY_LENGTH];
+   u8 k1[AES128_KEY_LENGTH];
u8 *cbc_chain_data;
unsigned i;
 
cbc_chain_data = zero_key;  /* Convenient array of 0's for IV */
 
/* compute K1 constant needed by AES-CMAC calculation */
-   for (i = 0; i < AES_KEY_LENGTH; i++)
+   for (i = 0; i < AES128_KEY_LENGTH; i++)
tmp_data[i] = 0;
 
-   aes_cbc_encrypt_blocks(key_schedule, iv, tmp_data, left, 1);
+   aes_cbc_encrypt_blocks(AES128_KEY_LENGTH, key_schedule, iv,
+  tmp_data, left, 1);
 
left_shift_vector(left, k1, sizeof(left));
 
if ((left[0] >> 7) != 0) /* get MSB of L */
-   k1[AES_KEY_LENGTH-1] ^= AES_CMAC_CONST_RB;
+   k1[AES128_KEY_LENGTH - 1] ^= AES_CMAC_CONST_RB;
 
/* compute the AES-CMAC value */
for (i = 0; i < num_aes_blocks; i++) {
@@ -78,31 +79,32 @@ static void sign_object(u8 *key, u8 *key_schedule, u8 *src, 
u8 *dst,
aes_apply_cbc_chain_data(tmp_data, k1, tmp_data);
 
/* encrypt the AES block */
-   aes_encrypt(tmp_data, key_schedule, dst);
+   aes_encrypt(AES128_KEY_LENGTH, tmp_data,
+   key_schedule, dst);
 
debug("sign_obj: block %d of %d\n", i, num_aes_blocks);
 
/* Update pointers for next loop. */
cbc_chain_data = dst;
-   src += AES_KEY_LENGTH;
+   src += AES128_KEY_LENGTH;
}
 }
 
 /**
  * Encrypt and sign a block of data (depending on security mode).
  *
- * \param key  Input AES key, length AES_KEY_LENGTH
+ * \param key  Input AES key, length AES128_KEY_LENGTH
  * \param oper Security operations mask to perform (enum security_op)
  * \param src  Source data
  * \param length   Size of source data
- * \param sig_dst  Destination address for signature, AES_KEY_LENGTH bytes
+ * \param sig_dst  Destination address for signature, AES128_KEY_LENGTH 
bytes
  */
 static int encrypt_and_sign(u8 *key, enum security_op oper, u8 *src,
u32 length, u8 *sig_dst)
 {
u32 num_aes_blocks;
-   u8 key_schedule[AES_EXPAND_KEY_LENGTH];
-   u8 iv[AES_KEY_LENGTH] = {0};
+   u8 key_schedule[AES128_EXPAND_KEY_LENGTH];
+   u8 iv[AES128_KEY_LENGTH] = {0};
 
debug("encrypt_and_sign: length = %d\n", length);
 
@@ -110,15 +112,16 @@ static int encrypt_and_sign(u8 *key, enum security_op 
oper, u8 *src,
 * The only need for a key is for signing/checksum purposes, so
 * if not encrypting, expand a key of 0s.
 */
-   aes_expand_key(oper & SECURITY_ENCRYPT ? key : zero_key, key_schedule);
+   aes_expand_key(oper & SECURITY_ENCRYPT ? key : zero_key,
+  AES128_KEY_LENGTH, key_schedule);
 
-   num_aes_blocks = (length + AES_KEY_LENGTH - 1) / AES_KEY_LENGTH;
+   num_aes_blocks = (length + AES128_KEY_LENGTH - 1) / AES128_KEY_LENGTH;
 
if (oper & SECURITY_ENCRYPT) {
/* Perform this in place, resulting in src being encrypted. */
debug("encrypt_and_sign: begin encryption\n");
-   aes_cbc_encrypt_blocks(key_schedule, iv, src, src,
-  num_aes_blocks);
+   aes_cbc_encrypt_blocks(AES128_KEY_LENGTH, key_schedule, iv, src,
+  src, num_aes_blocks);

[U-Boot] [PATCH V3 0/5] aes: add support for aes192 and aes256

2019-11-15 Thread Philippe Reynes
This serie add the support of aes192 and aes256.
This first commit clean a bit the code, and introduce
a constant for the block (instead of using the key size).
The second commit add the support of aes192 and aes256
to the lib and the cmd. The third update the code of
crypto for tegra20. The forth add a test unit for aes128,
and the sixth  add a test unit for aes 196 and aes256.

Philippe Reynes (5):
  aes: add a define for the size of a block
  aes: add support of aes192 and aes256
  tegra20: crypto: update code to use new aes api
  aes: add test unit for aes128
  aes: add test unit for aes196 and aes256

 arch/arm/mach-tegra/tegra20/crypto.c |  41 +
 cmd/aes.c|  40 ++---
 include/uboot_aes.h  |  39 +---
 lib/aes.c| 111 ++-
 test/lib/Makefile|   1 +
 test/lib/test_aes.c  | 166 +++
 6 files changed, 313 insertions(+), 85 deletions(-)
 create mode 100644 test/lib/test_aes.c

-- 
2.7.4

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[U-Boot] [PATCH] gpio: at91_gpio: Add bank names

2019-11-15 Thread James Byrne
Make the at91_gpio driver set sensible GPIO bank names in the platform
data. This makes the 'gpio status' command a lot more useful.

Signed-off-by: James Byrne 

---

 drivers/gpio/at91_gpio.c | 29 ++---
 1 file changed, 26 insertions(+), 3 deletions(-)

diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c
index 965becf77a..94b2b63a04 100644
--- a/drivers/gpio/at91_gpio.c
+++ b/drivers/gpio/at91_gpio.c
@@ -19,6 +19,28 @@
 
 #define GPIO_PER_BANK  32
 
+static const char *at91_get_bank_name(uint32_t base_addr)
+{
+   switch (base_addr) {
+   case ATMEL_BASE_PIOA:
+   return "PIOA";
+   case ATMEL_BASE_PIOB:
+   return "PIOB";
+   case ATMEL_BASE_PIOC:
+   return "PIOC";
+#if (ATMEL_PIO_PORTS > 3)
+   case ATMEL_BASE_PIOD:
+   return "PIOD";
+#if (ATMEL_PIO_PORTS > 4)
+   case ATMEL_BASE_PIOE:
+   return "PIOE";
+#endif
+#endif
+   }
+
+   return "";
+}
+
 static struct at91_port *at91_pio_get_port(unsigned port)
 {
switch (port) {
@@ -582,14 +604,15 @@ static int at91_gpio_probe(struct udevice *dev)
 
clk_free();
 
-   uc_priv->bank_name = plat->bank_name;
-   uc_priv->gpio_count = GPIO_PER_BANK;
-
 #if CONFIG_IS_ENABLED(OF_CONTROL)
plat->base_addr = (uint32_t)devfdt_get_addr_ptr(dev);
 #endif
+   plat->bank_name = at91_get_bank_name(plat->base_addr);
port->regs = (struct at91_port *)plat->base_addr;
 
+   uc_priv->bank_name = plat->bank_name;
+   uc_priv->gpio_count = GPIO_PER_BANK;
+
return 0;
 }
 
-- 
2.24.0

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Re: [U-Boot] [RFC PATCH v3 0/3] Felix Eth switch driver and questions on DSA switches

2019-11-15 Thread Alexandru Marginean

Hi Bin,

On 11/15/2019 3:32 PM, Bin Meng wrote:

Hi Alex,

On Fri, Nov 15, 2019 at 8:57 PM Alex Marginean
 wrote:


The driver sets up the switch during probe making external and internal ports
available to use.  It does not support direct I/O through these switch ports
in this version, instead ENETC ethernet interfaces that are internally linked to
the switch can be used after the switch is set up.



Thanks for the efforts!


This is where the RFC part comes in.  Both the switch as a device and its ports
are probed as ethernet devices.  That's handy as accessors to connect to the PHY
can be used on switch ports, but otherwise they are useless as the user can't
ping to these interfaces directly.  We're not running STP in U-Boot either, so
turning on the switch is a problem if there are loops in the network.
The Linux driver for this piece of HW is now moving under DSA and this leads to
my question.  Does anyone here think that DSA support is something useful in
U-Boot?

DSA is described here:
https://www.kernel.org/doc/Documentation/networking/dsa/dsa.txt

 From the doc:

 Summarized, this is basically how DSA looks like from a network device
 perspective:


 |---
 | CPU network device (eth0)|
 
 |  |
 ||
 | Switch driver  |
 ||
 |||| ||
 |---|  |---|  |---|
 | sw0p0 |  | sw0p1 |  | sw0p2 |
 |---|  |---|  |---|


If we do DSA in U-Boot we would use the same bindings as in Linux.  The switch


 From the perspective of reusing the same bindings as Linux, yes, I
would like to see the same DSA support in U-Boot :)


Even without DSA and depending on the driver the Linux DT could work for
U-Boot as well.  It's just that that DSA specific properties would be
ignored and the behavior in U-Boot could be different than the one in
Linux, depending on what exactly the driver does.  The behavior part is
more likely to be a problem for users, not the binding itself.

In this driver we enable hardware switching which is fine in most cases
and allows tftp on any port, but can cause problems with network loops
since we don't run STP.  Another U-Boot switch driver I looked at
doesn't have the network loop problem, but only works on port 0.
I think I'll give it a shot at prototyping some basic DSA support for
U-Boot, some of these differences in behavior can be quite annoying and
sooner or later they could cause problems.

Thanks!
Alex




would be associated with a master network device which is a regular ethernet,
this is part of the DSA binding in Linux.
Whenever the user pings through swp0pN in background that would _start swp0pN,
the switch port connected to the master network device and the master network
device (eth0 in the picture above).  Any frames sent through a switch port would
have the DSA tag inserted and then actually sent though the mater network
device.  Similarly for Rx, polling swp0pN would in fact poll on the master
network device and for any frame received the DSA code would check and remove
the DSA tag.
Switching between switch ports would be by default disabled.
This kind of switch drivers should go under a new class, DSA or ETH_DSA, or
something along those lines.

I'd like to get some feedback from networking people on this list, if adding DSA
support in U-Boot is something that could be useful, or the existing support is
good enough.  Currently U-Boot does support a few switches either as PHYs or
as ETH devices with various limitations.  Feel free to share any thoughts on
this topic.

With these patches applied the switch on LS1028A looks like this:

=> dm tree
  Class Index  Probed  DriverName
---

  pci  2  [ + ]   pci_generic_ecam  |-- pcie@1f000
  eth  1  [ + ]   enetc_eth |   |-- enetc-0
  eth  2  [ + ]   enetc_eth |   |-- enetc-1
  eth  3  [ + ]   enetc_eth |   |-- enetc-2
  mdio 5  [ + ]   enetc_mdio|   |-- emdio-3
  pci_generi   0  [   ]   pci_generic_drv   |   |-- pci_3:0.4
  eth  4  [ + ]   felix_ethsw   |   |-- felix_ethsw
  eth  6  [ + ]   felix-port|   |   |-- port@0
  eth  7  [ + ]   felix-port|   |   |-- port@1
  eth  8  [ + ]   felix-port|   |   |-- port@2
  eth  9  [ + ]   felix-port|   |   |-- port@3
  eth 10  [ + ]   felix-port|   |   |-- port@4
  eth 11  [ + ]   felix-port|   |   `-- port@5
  eth  5  [ + ]   enetc_eth |   |-- 

[U-Boot] [PATCH] board: Remove unnecessary inclusion of micrel.h from boards

2019-11-15 Thread James Byrne
Several boards still unnecessarily included micrel.h but no longer
require it since the switch to Device Tree configuration.

Signed-off-by: James Byrne 

---

 board/atmel/sama5d3xek/sama5d3xek.c   | 2 --
 board/kosagi/novena/novena.c  | 2 --
 board/seco/mx6quq7/mx6quq7.c  | 1 -
 board/toradex/colibri_imx6/colibri_imx6.c | 1 -
 board/tqc/tqma6/tqma6_wru4.c  | 1 -
 5 files changed, 7 deletions(-)

diff --git a/board/atmel/sama5d3xek/sama5d3xek.c 
b/board/atmel/sama5d3xek/sama5d3xek.c
index acf61486d2..331d31cfc7 100644
--- a/board/atmel/sama5d3xek/sama5d3xek.c
+++ b/board/atmel/sama5d3xek/sama5d3xek.c
@@ -14,8 +14,6 @@
 #include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c
index b7b747d196..45c8e798b6 100644
--- a/board/kosagi/novena/novena.c
+++ b/board/kosagi/novena/novena.c
@@ -32,8 +32,6 @@
 #include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/seco/mx6quq7/mx6quq7.c b/board/seco/mx6quq7/mx6quq7.c
index c1e36b652e..c0a93175fb 100644
--- a/board/seco/mx6quq7/mx6quq7.c
+++ b/board/seco/mx6quq7/mx6quq7.c
@@ -26,7 +26,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 
diff --git a/board/toradex/colibri_imx6/colibri_imx6.c 
b/board/toradex/colibri_imx6/colibri_imx6.c
index ad40b589c1..39718b567d 100644
--- a/board/toradex/colibri_imx6/colibri_imx6.c
+++ b/board/toradex/colibri_imx6/colibri_imx6.c
@@ -27,7 +27,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/tqc/tqma6/tqma6_wru4.c b/board/tqc/tqma6/tqma6_wru4.c
index 99196ad685..6095bf3926 100644
--- a/board/tqc/tqma6/tqma6_wru4.c
+++ b/board/tqc/tqma6/tqma6_wru4.c
@@ -25,7 +25,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
-- 
2.24.0

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[U-Boot] [PATCH v2 2/3] rockchip: allow DRAM init in SPL

2019-11-15 Thread Thomas Hebb
b7abef2ecbcc ("rockchip: rk3399: Migrate to use common spl board file")
removed SoC-specific code for RK3399's SPL and in the process caused
the previously-unconditional DRAM initialization in board_init_f() to
only happen when compiling a configuration that does not support TPL,
meaning DRAM never gets initialized if TPL is supported but disabled.

Fix this by omitting the DRAM init in SPL only when we are configured to
also build a TPL. This fixes custom configurations that have disabled
TPL, and it should also unbreak the "ficus-rk3399", "rock960-rk3399",
and "chromebook_bob" defconfigs, although since I don't have any of
those devices I can't confirm they're broken now.

Signed-off-by: Thomas Hebb 
---
 arch/arm/mach-rockchip/spl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 5570bb1339..089f0a5258 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -103,7 +103,7 @@ __weak int arch_cpu_init(void)
 void board_init_f(ulong dummy)
 {
int ret;
-#if !defined(CONFIG_SUPPORT_TPL) || defined(CONFIG_SPL_OS_BOOT)
+#if !defined(CONFIG_TPL) || defined(CONFIG_SPL_OS_BOOT)
struct udevice *dev;
 #endif
 
@@ -135,7 +135,7 @@ void board_init_f(ulong dummy)
/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
timer_init();
 #endif
-#if !defined(CONFIG_SUPPORT_TPL) || defined(CONFIG_SPL_OS_BOOT)
+#if !defined(CONFIG_TPL) || defined(CONFIG_SPL_OS_BOOT)
debug("\nspl:init dram\n");
ret = uclass_get_device(UCLASS_RAM, 0, );
if (ret) {
-- 
2.23.0

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[U-Boot] [PATCH v2 3/3] rockchip: imply instead of selecting SPL_SYS_MALLOC_SIMPLE

2019-11-15 Thread Thomas Hebb
We shouldn't force which allocator the SPL uses, since there's no
platform requirement for one over the other: in fact, we currently allow
selection of the TPL allocator but not the SPL one!

Signed-off-by: Thomas Hebb 
---
 arch/arm/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7b80630aa1..f96841c777 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1604,7 +1604,6 @@ config ARCH_ROCKCHIP
select OF_CONTROL
select SPI
select SPL_DM if SPL
-   select SPL_SYS_MALLOC_SIMPLE if SPL
select SYS_MALLOC_F
select SYS_THUMB_BUILD if !ARM64
imply ADC
@@ -1614,6 +1613,7 @@ config ARCH_ROCKCHIP
imply FAT_WRITE
imply SARADC_ROCKCHIP
imply SPL_SYSRESET
+   imply SPL_SYS_MALLOC_SIMPLE
imply SYS_NS16550
imply TPL_SYSRESET
imply USB_FUNCTION_FASTBOOT
-- 
2.23.0

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[U-Boot] [PATCH v2 1/3] rockchip: fix ordering of DRAM init

2019-11-15 Thread Thomas Hebb
b7abef2ecbcc ("rockchip: rk3399: Migrate to use common spl board file")
removed SoC-specific code for RK3399's SPL and in the process reordered
the DRAM initialization before rockchip_stimer_init(), which as far as I
can tell causes the RK3399 to lock up completely.

Fix this issue in the common code by putting the DRAM init back after
timer init. I have only tested this on the RK3399, but it wouldn't make
any sense for the timer init to require DRAM be set up on any system.

Signed-off-by: Thomas Hebb 
---
 arch/arm/mach-rockchip/spl.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 92102b39e7..5570bb1339 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -128,6 +128,13 @@ void board_init_f(ulong dummy)
hang();
}
arch_cpu_init();
+#if !defined(CONFIG_ROCKCHIP_RK3188)
+   rockchip_stimer_init();
+#endif
+#ifdef CONFIG_SYS_ARCH_TIMER
+   /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
+   timer_init();
+#endif
 #if !defined(CONFIG_SUPPORT_TPL) || defined(CONFIG_SPL_OS_BOOT)
debug("\nspl:init dram\n");
ret = uclass_get_device(UCLASS_RAM, 0, );
@@ -135,13 +142,6 @@ void board_init_f(ulong dummy)
printf("DRAM init failed: %d\n", ret);
return;
}
-#endif
-#if !defined(CONFIG_ROCKCHIP_RK3188)
-   rockchip_stimer_init();
-#endif
-#ifdef CONFIG_SYS_ARCH_TIMER
-   /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
-   timer_init();
 #endif
preloader_console_init();
 }
-- 
2.23.0

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Re: [U-Boot] [PATCH v4 31/42] common: Move ARM cache operations out of common.h

2019-11-15 Thread Simon Glass
Hi Daniel,

inOn Fri, 15 Nov 2019 at 05:48, Daniel Schwierzeck
 wrote:
>
[..]

> > diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c 
> > b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
> > index 7eb632d3b1..e9e18568c1 100644
> > --- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
> > +++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
> > @@ -17,6 +17,9 @@
> >   * Lukasz Majewski 
> >   */
> >
> > +#include 
> > +#include 
> > +
>
> is this intended if both files haven't been required before?

Well common.h should always be included. The second is needed since
flush_dcache_range() is called. This file would cause a error if it
were compiled. It seems to be excluded from the build.

>
> >  static u8 clear_feature_num;
> >  int clear_feature_flag;
> >

Regards,
Simon
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Re: [U-Boot] RK3399 boards (rockpi4 and rockpro64) kernel SError using upstream U-boot

2019-11-15 Thread Anand Moon
Hi Qu Wenruo,

On Fri, 15 Nov 2019 at 17:27, Qu Wenruo  wrote:
>
>
>
> On 2019/11/15 下午6:37, Qu Wenruo wrote:
> > A small update to this bug.
> >
> > I'm using mem=3584M kernel cmdline, to sacrifice 512M memory.
> >
> > And then surprise, memtest 3G works. (Originally it's 4G physical ram
> > and 3584M memtest.
> >
> > Hopes this could provide some clue.
>
> Oh no, with 3187M, it still crashes with SError.
>
> So still no luck.
>
> Thanks,
> Qu

Please this following series of patches for fix this error.
It fixed issue of SError on my board.

[0] https://patchwork.ozlabs.org/cover/1195284/

Best Regards
-Anand
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Re: [U-Boot] [RFC PATCH v3 0/3] Felix Eth switch driver and questions on DSA switches

2019-11-15 Thread Bin Meng
Hi Alex,

On Fri, Nov 15, 2019 at 8:57 PM Alex Marginean
 wrote:
>
> The driver sets up the switch during probe making external and internal ports
> available to use.  It does not support direct I/O through these switch ports
> in this version, instead ENETC ethernet interfaces that are internally linked 
> to
> the switch can be used after the switch is set up.
>

Thanks for the efforts!

> This is where the RFC part comes in.  Both the switch as a device and its 
> ports
> are probed as ethernet devices.  That's handy as accessors to connect to the 
> PHY
> can be used on switch ports, but otherwise they are useless as the user can't
> ping to these interfaces directly.  We're not running STP in U-Boot either, so
> turning on the switch is a problem if there are loops in the network.
> The Linux driver for this piece of HW is now moving under DSA and this leads 
> to
> my question.  Does anyone here think that DSA support is something useful in
> U-Boot?
>
> DSA is described here:
> https://www.kernel.org/doc/Documentation/networking/dsa/dsa.txt
>
> From the doc:
>
> Summarized, this is basically how DSA looks like from a network device
> perspective:
>
>
> |---
> | CPU network device (eth0)|
> 
> |  |  |
> |  |
> |tag added by CPU> |
> ||
> | Switch driver  |
> ||
> |||| ||
> |---|  |---|  |---|
> | sw0p0 |  | sw0p1 |  | sw0p2 |
> |---|  |---|  |---|
>
>
> If we do DSA in U-Boot we would use the same bindings as in Linux.  The switch

From the perspective of reusing the same bindings as Linux, yes, I
would like to see the same DSA support in U-Boot :)

> would be associated with a master network device which is a regular ethernet,
> this is part of the DSA binding in Linux.
> Whenever the user pings through swp0pN in background that would _start swp0pN,
> the switch port connected to the master network device and the master network
> device (eth0 in the picture above).  Any frames sent through a switch port 
> would
> have the DSA tag inserted and then actually sent though the mater network
> device.  Similarly for Rx, polling swp0pN would in fact poll on the master
> network device and for any frame received the DSA code would check and remove
> the DSA tag.
> Switching between switch ports would be by default disabled.
> This kind of switch drivers should go under a new class, DSA or ETH_DSA, or
> something along those lines.
>
> I'd like to get some feedback from networking people on this list, if adding 
> DSA
> support in U-Boot is something that could be useful, or the existing support 
> is
> good enough.  Currently U-Boot does support a few switches either as PHYs or
> as ETH devices with various limitations.  Feel free to share any thoughts on
> this topic.
>
> With these patches applied the switch on LS1028A looks like this:
>
> => dm tree
>  Class Index  Probed  DriverName
> ---
> 
>  pci  2  [ + ]   pci_generic_ecam  |-- pcie@1f000
>  eth  1  [ + ]   enetc_eth |   |-- enetc-0
>  eth  2  [ + ]   enetc_eth |   |-- enetc-1
>  eth  3  [ + ]   enetc_eth |   |-- enetc-2
>  mdio 5  [ + ]   enetc_mdio|   |-- emdio-3
>  pci_generi   0  [   ]   pci_generic_drv   |   |-- pci_3:0.4
>  eth  4  [ + ]   felix_ethsw   |   |-- felix_ethsw
>  eth  6  [ + ]   felix-port|   |   |-- port@0
>  eth  7  [ + ]   felix-port|   |   |-- port@1
>  eth  8  [ + ]   felix-port|   |   |-- port@2
>  eth  9  [ + ]   felix-port|   |   |-- port@3
>  eth 10  [ + ]   felix-port|   |   |-- port@4
>  eth 11  [ + ]   felix-port|   |   `-- port@5
>  eth  5  [ + ]   enetc_eth |   |-- enetc-6
>  pci_generi   1  [   ]   pci_generic_drv   |   `-- pci_3:1f.0
>
> => mdio list
> felix_ethsw:
> emdio-3:
> mdio@50:
> 0 - Aquantia AQR412 <--> port@0
> 1 - Aquantia AQR412 <--> port@1
> 2 - Aquantia AQR412 <--> port@2
> 3 - Aquantia AQR412 <--> port@3
> mdio@00:
> 5 - AR8035 <--> enetc-1
> mdio@40:
> 2 - Aquantia AQR112 <--> enetc-0
> mdio@60:
> mdio@70:
>
> Any feedback is welcome, of course
>
>
> This patch set replaces this v2 series:
> https://patchwork.ozlabs.org/project/uboot/list/?series=126977=*
> and depends on:
> 

Re: [U-Boot] RK3399 boards (rockpi4 and rockpro64) kernel SError using upstream U-boot

2019-11-15 Thread Soeren Moch

> On 2019/11/15 下午6:37, Qu Wenruo wrote:
>> A small update to this bug.
>>
>> I'm using mem=3584M kernel cmdline, to sacrifice 512M memory.
>>
>> And then surprise, memtest 3G works. (Originally it's 4G physical ram
>> and 3584M memtest.
>>
>> Hopes this could provide some clue.
> Oh no, with 3187M, it still crashes with SError.
>
> So still no luck.
For me this patch [1] solved this kind of problems on my RockPro64. Can
you please test this patch?

Thanks,
Soeren

[1] https://patchwork.ozlabs.org/patch/1191078/
> Thanks,
> Qu
>> Thanks,
>> Qu
>>
>> On 2019/11/9 下午9:45, Jagan Teki wrote:
>>> On Sat, Nov 9, 2019 at 6:48 PM Qu Wenruo  wrote:
 On 2019/11/9 下午8:25, Jagan Teki wrote:
> On Sat, Nov 9, 2019 at 12:08 PM Qu Wenruo  wrote:
>> Hi,
>>
>> Although recent U-boot upstream has merged the rk3399 ram patchset to
>> initial DDR4 properly, but strangely I can still trigger SError for
>> RockPi4 and RockPro64 boards using upstream U-boot with upstream kernel
>> (v5.4-rc). The dmesg is attached at the end.
>>
>> This is pretty easy to trigger if using "memtester 3584M" (both boards
>> are 4G RAM variants).
>> The strange part is, if using the vendor uboot (like Armbian does), then
>> the kernel SError just goes away, so it looks like a bug in Uboot.
> Can you check u-boot memtest, past me the result.
 Looks like rockpi4 (maybe the whole rk3399 family) doesn't define
 CONFIG_SYS_MEMTEST_START/END, thus enabling CONFIG_CMD_MEMTEST will
 easily break the compile.

 Or any magic number for me to try?
>>> Better try START with ddr base, and END some 256M set for basic test.
>>>
>> The U-boot I built follows the README.rockchip, using the SD card and
>> boot option 1 (miniloader + Uboot + rkbin).
>> The script build script (arch PKGBUILD) can be found here:
>>
>> https://github.com/adam900710/PKGBUILDs/blob/rockpi4/alarm/uboot-rockpi4/PKGBUILD
>>
>> Any clue for the problem?
> Would you check this series [1]
>
> [1] https://patchwork.ozlabs.org/cover/1183700/
>
 Any git repo? I hate to apply large patchset especially when there are
 conflicts...
>>> Hmm.. I didn't find the repo on the cover-letter. Did you check the
>>> u-boot-kerveryang github, may be Kever would place these on that repo
>>> I think.
>>>
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[U-Boot] [PATCH v3 6/6] config: enable DFU over USB on Raspberry Pi4 boards

2019-11-15 Thread Marek Szyprowski
Enable support for DFU over USB. This requires to enable USB gadget,
DWC2 UDC OTG driver and DFU command. DFU entities are defined for the
following firmware objects: u-boot.bin, uboot.env, config.txt and
zImage/Image.

Signed-off-by: Marek Szyprowski 
Reviewed-by: Lukasz Majewski 
---
Changelog:
v3:
- fixed non-RPi4 builds (missing #else ENV_DFU_SETTINGS def)
- removed config.txt entity (not needed in uboot-based boot)
- switched arm64 kernel filename to 'Image'
---
 configs/rpi_4_32b_defconfig | 11 +++
 configs/rpi_4_defconfig | 11 +++
 include/configs/rpi.h   | 20 
 3 files changed, 42 insertions(+)

diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
index dc696906fd..a0ba8782bc 100644
--- a/configs/rpi_4_32b_defconfig
+++ b/configs/rpi_4_32b_defconfig
@@ -11,6 +11,7 @@ CONFIG_MISC_INIT_R=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SYS_PROMPT="U-Boot> "
+CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
@@ -19,6 +20,7 @@ CONFIG_OF_BOARD=y
 CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DFU_MMC=y
 CONFIG_DM_KEYBOARD=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
@@ -26,6 +28,15 @@ CONFIG_MMC_SDHCI_BCM2835=y
 CONFIG_PINCTRL=y
 # CONFIG_PINCTRL_GENERIC is not set
 # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_CONSOLE_SCROLL_LINES=10
diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
index 2954e17ac3..2fcd56ebf3 100644
--- a/configs/rpi_4_defconfig
+++ b/configs/rpi_4_defconfig
@@ -11,6 +11,7 @@ CONFIG_MISC_INIT_R=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SYS_PROMPT="U-Boot> "
+CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
@@ -19,6 +20,7 @@ CONFIG_OF_BOARD=y
 CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_DFU_MMC=y
 CONFIG_DM_KEYBOARD=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
@@ -26,6 +28,15 @@ CONFIG_MMC_SDHCI_BCM2835=y
 CONFIG_PINCTRL=y
 # CONFIG_PINCTRL_GENERIC is not set
 # CONFIG_REQUIRE_SERIAL_CONSOLE is not set
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_CONSOLE_SCROLL_LINES=10
diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index 77d2d5458a..6723c7cc92 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -70,6 +70,25 @@
 #define CONFIG_TFTP_TSIZE
 #endif
 
+/* DFU over USB/UDC */
+#ifdef CONFIG_CMD_DFU
+#define CONFIG_SYS_DFU_DATA_BUF_SIZE   SZ_1M
+#define CONFIG_SYS_DFU_MAX_FILE_SIZE   SZ_2M
+
+#ifdef CONFIG_ARM64
+#define KERNEL_FILENAME"Image"
+#else
+#define KERNEL_FILENAME"zImage"
+#endif
+
+#define ENV_DFU_SETTINGS \
+   "dfu_alt_info=u-boot.bin fat 0 1;uboot.env fat 0 1;" \
+ "config.txt fat 0 1;" \
+ KERNEL_FILENAME " fat 0 1\0"
+#else
+#define ENV_DFU_SETTINGS ""
+#endif
+
 /* Console configuration */
 #define CONFIG_SYS_CBSIZE  1024
 
@@ -185,6 +204,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
"dhcpuboot=usb start; dhcp u-boot.uimg; bootm\0" \
ENV_DEVICE_SETTINGS \
+   ENV_DFU_SETTINGS \
ENV_MEM_LAYOUT_SETTINGS \
BOOTENV
 
-- 
2.17.1

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Re: [U-Boot] [PATCH 4/5] T1042RDB_PI_NAND_SECURE_BOOT: SECURE_BOOT means environment is nowhere

2019-11-15 Thread Tom Rini
On Fri, Nov 15, 2019 at 12:43:48PM +, Priyanka Jain wrote:
> 
> 
> >-Original Message-
> >From: U-Boot  On Behalf Of Tom Rini
> >Sent: Thursday, November 14, 2019 8:24 PM
> >To: u-boot@lists.denx.de
> >Subject: [U-Boot] [PATCH 4/5] T1042RDB_PI_NAND_SECURE_BOOT:
> >SECURE_BOOT means environment is nowhere
> >
> >Signed-off-by: Tom Rini 
> >---
> > board/freescale/t104xrdb/spl.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> >diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c
> >index 7b0eb8edf51d..76b5160cf903 100644
> >--- a/board/freescale/t104xrdb/spl.c
> >+++ b/board/freescale/t104xrdb/spl.c
> >@@ -106,6 +106,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)  #endif
> >
> > /* relocate environment function pointers etc. */
> >+#ifndef CONFIG_NXP_ESBC
> Can we use some ENV related config instead of this?

We could but I think that's more fragile / complex:

> > #ifdef CONFIG_SPL_NAND_BOOT
> > nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
> > (uchar *)CONFIG_ENV_ADDR);
> >@@ -120,6 +121,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)  #endif
> > gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
> > gd->env_valid = ENV_VALID;
> >+#endif

The endif goes here since we have cases on NAND / MMC / SPI loading the
environment and then we say it's now valid (and where it is).  We could
do:
#if defined(CONFIG_ENV_IS_IN_NAND) || defined(CONFIG_ENV_IS_IN_MMC) || \
defined(CONFIG_ENV_IS_IN__SPI_FLASH)

if you prefer instead of CONFIG_NXP_ESBC

-- 
Tom


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Re: [U-Boot] [PATCH 1/4] arm64: dts: rk3399-rock960: add vdd_log and its init value

2019-11-15 Thread Peter Robinson
On Wed, Nov 13, 2019 at 3:14 AM Kever Yang  wrote:
>
> Add vdd_log node according to rock960 schematic V13.
> This patch affect two boards:
> - Rock960 Model A
> - Ficus
>
> Signed-off-by: Kever Yang 

Is there a reason this is getting added to the -u-boot.dtsi vs the
base .dtsi? I did see a patch for the Linux dtsi to do similar so
presumably once there's a v2 of that to fix the minor issue there it
would basically be the same patch for U-Boot or a sync of the Linux
dts to U-Boot.

Peter

> ---
>
>  arch/arm/dts/rk3399-rock960-u-boot.dtsi | 13 +
>  1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi 
> b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
> index 4850debdf0..82f2c311af 100644
> --- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
> +++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
> @@ -10,4 +10,17 @@
> chosen {
> u-boot,spl-boot-order = , 
> };
> +
> +   vdd_log: vdd-log {
> +   compatible = "pwm-regulator";
> +   pwms = < 0 25000 1>;
> +   regulator-name = "vdd_log";
> +   regulator-always-on;
> +   regulator-boot-on;
> +   regulator-min-microvolt = <80>;
> +   regulator-max-microvolt = <140>;
> +   regulator-init-microvolt = <95>;
> +   vin-supply = <_sys>;
> +   };
> +
>  };
> --
> 2.17.1
>
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Re: [U-Boot] [PATCH v4 40/42] common: Move trap_init() out of common.h

2019-11-15 Thread Daniel Schwierzeck


Am 14.11.19 um 20:57 schrieb Simon Glass:
> Move this function into the init.h header file.
> 
> Signed-off-by: Simon Glass 
> Reviewed-by: Tom Rini 
> ---
> 
> Changes in v4: None
> Changes in v3:
> - Add init.h header
> 
> Changes in v2:
> - Move trap_init() into init.h instead; update commit message
> 
>  arch/m68k/lib/traps.c | 1 +
>  arch/mips/lib/traps.c | 1 +
>  include/common.h  | 1 -
>  include/init.h| 2 ++
>  4 files changed, 4 insertions(+), 1 deletion(-)
> 

Reviewed-by: Daniel Schwierzeck 

-- 
- Daniel
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[U-Boot] [RFC PATCH v3 2/3] arm: dts: ls1028a: add node for the integrated Ethernet switch

2019-11-15 Thread Alex Marginean
Adds a device tree node to ls1028a dtsi that describes the Ethernet switch
integrated in LS1028A SoC.

Signed-off-by: Alex Marginean 
---
 arch/arm/dts/fsl-ls1028a-rdb.dts | 36 
 arch/arm/dts/fsl-ls1028a.dtsi| 31 +++
 2 files changed, 67 insertions(+)

diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts
index 3d5e8ade21..e1e8e135e2 100644
--- a/arch/arm/dts/fsl-ls1028a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1028a-rdb.dts
@@ -114,9 +114,45 @@
phy-handle = <_phy0>;
 };
 
+ {
+   port@0 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <_phy0>;
+   };
+   port@1 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <_phy1>;
+   };
+   port@2 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <_phy2>;
+   };
+   port@3 {
+   status = "okay";
+   phy-mode = "qsgmii";
+   phy-handle = <_phy3>;
+   };
+};
+
  {
status = "okay";
rdb_phy0: phy@2 {
reg = <2>;
};
+
+   sw_phy0: phy@10 {
+   reg = <0x10>;
+   };
+   sw_phy1: phy@11 {
+   reg = <0x11>;
+   };
+   sw_phy2: phy@12 {
+   reg = <0x12>;
+   };
+   sw_phy3: phy@13 {
+   reg = <0x13>;
+   };
 };
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 43a154e8e7..21595713df 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -136,6 +136,37 @@
reg = <0x000300 0 0 0 0>;
status = "disabled";
};
+   ethsw: pci@0,5 {
+   #address-cells=<0>;
+   #size-cells=<1>;
+   reg = <0x000500 0 0 0 0>;
+   port@0 {
+   reg = <0>;
+   status = "disabled";
+   };
+   port@1 {
+   reg = <1>;
+   status = "disabled";
+   };
+   port@2 {
+   reg = <2>;
+   status = "disabled";
+   };
+   port@3 {
+   reg = <3>;
+   status = "disabled";
+   };
+   port@4 {
+   reg = <4>;
+   phy-mode = "internal";
+   status = "okay";
+   };
+   port@5 {
+   reg = <5>;
+   phy-mode = "internal";
+   status = "okay";
+   };
+   };
enetc6: pci@0,6 {
reg = <0x000600 0 0 0 0>;
status = "okay";
-- 
2.17.1

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[U-Boot] [RFC PATCH v3 1/3] drivers: net: Add a driver for the Felix Ethernet switch on NXP LS1028A

2019-11-15 Thread Alex Marginean
The driver sets up the switch at probe allowing traffic though.  Both the
switch as a whole and the ports are registered as network devices in
U-Boot, although neither supports direct I/O in this version.  Traffic can
originate from SoC though one of the internally linked ENETC interfaces,
external ports can also be used in basic switching mode too.

Signed-off-by: Alex Marginean 
---
 drivers/net/Kconfig |   7 +
 drivers/net/Makefile|   1 +
 drivers/net/fsl_enetc.h |   5 +
 drivers/net/fsl_felix.c | 421 
 4 files changed, 434 insertions(+)
 create mode 100644 drivers/net/fsl_felix.c

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 4182897d89..7bbad24f85 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -615,4 +615,11 @@ config MVMDIO
 
  This driver is used by the MVPP2 and MVNETA drivers.
 
+config FSL_FELIX
+   bool "LS1028 Felix Ethernet switch"
+   depends on DM_PCI && DM_ETH && DM_MDIO
+   help
+ This driver supports the Ethernet switch integrated in LS1028A NXP
+ SoC.
+
 endif # NETDEVICES
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 30991834ec..886f77d745 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -82,3 +82,4 @@ obj-y += mscc_eswitch/
 obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
 obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
 obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
+obj-$(CONFIG_FSL_FELIX) += fsl_felix.o
diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h
index 9a36cdad80..29e7781b5e 100644
--- a/drivers/net/fsl_enetc.h
+++ b/drivers/net/fsl_enetc.h
@@ -200,6 +200,11 @@ struct enetc_priv {
 /* PCS replicator block for USXGMII */
 #define ENETC_PCS_DEVAD_REPL   0x1f
 
+#define ENETC_PCS_REPL_LINK_TIMER_10x12
+#define  ENETC_PCS_REPL_LINK_TIMER_1_DEF   0x0003
+#define ENETC_PCS_REPL_LINK_TIMER_20x13
+#define  ENETC_PCS_REPL_LINK_TIMER_2_DEF   0x06a0
+
 /* ENETC external MDIO registers */
 #define ENETC_MDIO_BASE0x1c00
 #define ENETC_MDIO_CFG 0x00
diff --git a/drivers/net/fsl_felix.c b/drivers/net/fsl_felix.c
new file mode 100644
index 00..ebb84ef55f
--- /dev/null
+++ b/drivers/net/fsl_felix.c
@@ -0,0 +1,421 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Felix ethernet switch driver
+ * Copyright 2018-2019 NXP
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* defines especially around PCS are reused from enetc */
+#include "fsl_enetc.h"
+
+#define FELIX_PORT_DRV_NAME"felix-port"
+
+#define PCI_DEVICE_ID_FELIX_ETHSW  0xEEF0
+#define FELIX_PM_IMDIO_BASE0x8030
+
+/* Max port count, including any internal ports */
+#define FELIX_PORT_COUNT   6
+
+/* Register map for BAR4 */
+#define FELIX_SYS  0x01
+#define FELIX_ES0  0x04
+#define FELIX_IS1  0x05
+#define FELIX_IS2  0x06
+#define FELIX_GMII(port)   (0x10 + (port) * 0x1)
+#define FELIX_QSYS 0x20
+
+#define FELIX_SYS_SYSTEM   (FELIX_SYS + 0x0E00)
+#define  FELIX_SYS_SYSTEM_EN   BIT(0)
+#define FELIX_SYS_RAM_CTRL (FELIX_SYS + 0x0F24)
+#define  FELIX_SYS_RAM_CTRL_INIT   BIT(1)
+
+#define FELIX_ES0_TCAM_CTRL(FELIX_ES0 + 0x03C0)
+#define  FELIX_ES0_TCAM_CTRL_ENBIT(0)
+#define FELIX_IS1_TCAM_CTRL(FELIX_IS1 + 0x03C0)
+#define  FELIX_IS1_TCAM_CTRL_ENBIT(0)
+#define FELIX_IS2_TCAM_CTRL(FELIX_IS2 + 0x03C0)
+#define  FELIX_IS2_TCAM_CTRL_ENBIT(0)
+
+#define FELIX_GMII_CLOCK_CFG(port) (FELIX_GMII(port) + 0x)
+#define  FELIX_GMII_CLOCK_CFG_LINK_1G  1
+#define  FELIX_GMII_CLOCK_CFG_LINK_100M2
+#define  FELIX_GMII_CLOCK_CFG_LINK_10M 3
+#define FELIX_GMII_MAC_ENA_CFG(port)   (FELIX_GMII(port) + 0x001C)
+#define  FELIX_GMII_MAX_ENA_CFG_TX BIT(0)
+#define  FELIX_GMII_MAX_ENA_CFG_RX BIT(4)
+#define FELIX_GMII_MAC_IFG_CFG(port)   (FELIX_GMII(port) + 0x001C + 0x14)
+#define  FELIX_GMII_MAC_IFG_CFG_DEF0x515
+
+#define FELIX_QSYS_SYSTEM  (FELIX_QSYS + 0xF460)
+#define FELIX_QSYS_SYSTEM_SW_PORT_MODE(port)   \
+   (FELIX_QSYS_SYSTEM + 0x20 + (port) * 4)
+#define  FELIX_QSYS_SYSTEM_SW_PORT_ENA BIT(14)
+#define  FELIX_QSYS_SYSTEM_SW_PORT_LOSSY   BIT(9)
+#define  FELIX_QSYS_SYSTEM_SW_PORT_SCH(a)  (((a) & 0x3800) << 11)
+
+/* internal MDIO in BAR0 */
+#define FELIX_PM_IMDIO_BASE0x8030
+
+/* Serdes block on LS1028A */
+#define FELIX_SERDES_BASE  0x1eaL
+#define FELIX_SERDES_LNATECR0(lane)(FELIX_SERDES_BASE + 0x818 + \
+(lane) * 0x40)
+#define  FELIX_SERDES_LNATECR0_ADPT_EQ 0x3000
+#define 

[U-Boot] [RFC PATCH v3 3/3] configs: ls1028a: enable FSL_FELIX switch driver

2019-11-15 Thread Alex Marginean
Enable by default the driver for the Ethernet switch integrated in the SoC.

Signed-off-by: Alex Marginean 
---
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028aqds_tfa_defconfig | 1 +
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 +
 configs/ls1028ardb_tfa_defconfig | 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 713a088e42..f70b451ed6 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -51,6 +51,7 @@ CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FSL_ENETC=y
+CONFIG_FSL_FELIX=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index b5eb872148..2c200ab31d 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -54,6 +54,7 @@ CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FSL_ENETC=y
+CONFIG_FSL_FELIX=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig 
b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index dc07a0a4d7..43dba1fba5 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -51,6 +51,7 @@ CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FSL_ENETC=y
+CONFIG_FSL_FELIX=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 644c5ac6bb..460e107e05 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -55,6 +55,7 @@ CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FSL_ENETC=y
+CONFIG_FSL_FELIX=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
-- 
2.17.1

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[U-Boot] [RFC PATCH v3 0/3] Felix Eth switch driver and questions on DSA switches

2019-11-15 Thread Alex Marginean
The driver sets up the switch during probe making external and internal ports
available to use.  It does not support direct I/O through these switch ports
in this version, instead ENETC ethernet interfaces that are internally linked to
the switch can be used after the switch is set up.

This is where the RFC part comes in.  Both the switch as a device and its ports
are probed as ethernet devices.  That's handy as accessors to connect to the PHY
can be used on switch ports, but otherwise they are useless as the user can't
ping to these interfaces directly.  We're not running STP in U-Boot either, so
turning on the switch is a problem if there are loops in the network.
The Linux driver for this piece of HW is now moving under DSA and this leads to
my question.  Does anyone here think that DSA support is something useful in
U-Boot?

DSA is described here:
https://www.kernel.org/doc/Documentation/networking/dsa/dsa.txt

From the doc:

Summarized, this is basically how DSA looks like from a network device
perspective:


|---
| CPU network device (eth0)|

|  |
||
| Switch driver  |
||
|||| ||
|---|  |---|  |---|
| sw0p0 |  | sw0p1 |  | sw0p2 |
|---|  |---|  |---|


If we do DSA in U-Boot we would use the same bindings as in Linux.  The switch
would be associated with a master network device which is a regular ethernet,
this is part of the DSA binding in Linux.
Whenever the user pings through swp0pN in background that would _start swp0pN,
the switch port connected to the master network device and the master network
device (eth0 in the picture above).  Any frames sent through a switch port would
have the DSA tag inserted and then actually sent though the mater network
device.  Similarly for Rx, polling swp0pN would in fact poll on the master
network device and for any frame received the DSA code would check and remove
the DSA tag.
Switching between switch ports would be by default disabled.
This kind of switch drivers should go under a new class, DSA or ETH_DSA, or
something along those lines.

I'd like to get some feedback from networking people on this list, if adding DSA
support in U-Boot is something that could be useful, or the existing support is
good enough.  Currently U-Boot does support a few switches either as PHYs or
as ETH devices with various limitations.  Feel free to share any thoughts on
this topic. 

With these patches applied the switch on LS1028A looks like this:

=> dm tree
 Class Index  Probed  DriverName
---

 pci  2  [ + ]   pci_generic_ecam  |-- pcie@1f000
 eth  1  [ + ]   enetc_eth |   |-- enetc-0
 eth  2  [ + ]   enetc_eth |   |-- enetc-1
 eth  3  [ + ]   enetc_eth |   |-- enetc-2
 mdio 5  [ + ]   enetc_mdio|   |-- emdio-3
 pci_generi   0  [   ]   pci_generic_drv   |   |-- pci_3:0.4
 eth  4  [ + ]   felix_ethsw   |   |-- felix_ethsw
 eth  6  [ + ]   felix-port|   |   |-- port@0
 eth  7  [ + ]   felix-port|   |   |-- port@1
 eth  8  [ + ]   felix-port|   |   |-- port@2
 eth  9  [ + ]   felix-port|   |   |-- port@3
 eth 10  [ + ]   felix-port|   |   |-- port@4
 eth 11  [ + ]   felix-port|   |   `-- port@5
 eth  5  [ + ]   enetc_eth |   |-- enetc-6
 pci_generi   1  [   ]   pci_generic_drv   |   `-- pci_3:1f.0

=> mdio list
felix_ethsw:
emdio-3:
mdio@50:
0 - Aquantia AQR412 <--> port@0
1 - Aquantia AQR412 <--> port@1
2 - Aquantia AQR412 <--> port@2
3 - Aquantia AQR412 <--> port@3
mdio@00:
5 - AR8035 <--> enetc-1
mdio@40:
2 - Aquantia AQR112 <--> enetc-0
mdio@60:
mdio@70:

Any feedback is welcome, of course 


This patch set replaces this v2 series:
https://patchwork.ozlabs.org/project/uboot/list/?series=126977=*
and depends on:
https://patchwork.ozlabs.org/project/uboot/list/?series=142858
https://patchwork.ozlabs.org/project/uboot/list/?series=142879

Thank you!


Alex Marginean (3):
  drivers: net: Add a driver for the Felix Ethernet switch on NXP
LS1028A
  arm: dts: ls1028a: add node for the integrated Ethernet switch
  configs: ls1028a: enable FSL_FELIX switch driver

 arch/arm/dts/fsl-ls1028a-rdb.dts |  36 ++
 arch/arm/dts/fsl-ls1028a.dtsi|  31 ++
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig |   1 +
 configs/ls1028aqds_tfa_defconfig |   1 +
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig |   

Re: [U-Boot] [PATCH v4 31/42] common: Move ARM cache operations out of common.h

2019-11-15 Thread Daniel Schwierzeck


Am 14.11.19 um 20:57 schrieb Simon Glass:
> These functions are CPU-related and do not use driver model. Move them to
> cpu_func.h
> 
> Signed-off-by: Simon Glass 
> ---
> 
> Changes in v4:
> - Use cpu_func.h instead of cpu_legacy.h
> - Use irq_func.h instead of irq_legacy.h
> 
> Changes in v3: None
> Changes in v2: None
> 
>  arch/arm/cpu/arm926ejs/lpc32xx/cpu.c   |  1 +
>  arch/arm/cpu/armv7/cache_v7.c  |  1 +
>  arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c  |  1 +
>  arch/arm/cpu/armv8/sec_firmware.c  |  1 +
>  arch/arm/cpu/pxa/cache.c   |  1 +
>  arch/arm/lib/cache.c   |  1 +
>  arch/arm/mach-bcm283x/mbox.c   |  1 +
>  arch/arm/mach-imx/mx7/psci-mx7.c   |  1 +
>  arch/arm/mach-omap2/sec-common.c   |  1 +
>  arch/arm/mach-tegra/ivc.c  |  1 +
>  arch/microblaze/lib/bootm.c|  1 +
>  arch/mips/lib/reloc.c  |  1 +
>  arch/mips/lib/traps.c  |  1 +
>  arch/mips/mach-jz47xx/jz4780/jz4780.c  |  1 +
>  arch/mips/mach-mtmips/ddr_calibrate.c  |  1 +
>  arch/nds32/cpu/n1213/ae3xx/cpu.c   |  1 +
>  arch/nios2/cpu/cpu.c   |  1 +
>  arch/nios2/lib/bootm.c |  1 +
>  arch/powerpc/lib/bootm.c   |  1 +
>  arch/powerpc/lib/cache.c   |  1 +
>  arch/riscv/cpu/ax25/cpu.c  |  1 +
>  arch/riscv/lib/smp.c   |  1 +
>  arch/riscv/lib/spl.c   |  1 +
>  arch/sandbox/cpu/cpu.c |  1 +
>  arch/x86/cpu/quark/dram.c  |  1 +
>  arch/xtensa/lib/bootm.c|  1 +
>  board/Arcturus/ucp1020/cmd_arc.c   |  1 +
>  board/beckhoff/mx53cx9020/mx53cx9020.c |  1 +
>  board/broadcom/bcmstb/bcmstb.c |  1 +
>  board/cirrus/edb93xx/edb93xx.c |  1 +
>  board/phytec/pfla02/pfla02.c   |  1 +
>  board/sandbox/sandbox.c|  1 +
>  cmd/disk.c |  1 +
>  cmd/load.c |  1 +
>  cmd/ximg.c |  1 +
>  common/avb_verify.c|  1 +
>  common/board_r.c   |  1 +
>  common/bootm.c |  1 +
>  common/bouncebuf.c |  1 +
>  common/image.c |  1 +
>  common/lcd.c   |  1 +
>  common/spl/spl_opensbi.c   |  1 +
>  common/update.c|  1 +
>  drivers/ata/ahci.c |  1 +
>  drivers/ata/dwc_ahsata.c   |  1 +
>  drivers/ata/fsl_ahci.c |  1 +
>  drivers/ata/fsl_sata.c |  1 +
>  drivers/ata/sata_mv.c  |  1 +
>  drivers/ata/sata_sil.c |  1 +
>  drivers/bootcount/bootcount.c  |  1 +
>  drivers/bootcount/bootcount_ram.c  |  1 +
>  drivers/core/device.c  |  1 +
>  drivers/crypto/fsl/fsl_blob.c  |  1 +
>  drivers/crypto/fsl/fsl_hash.c  |  1 +
>  drivers/crypto/fsl/jobdesc.c   |  1 +
>  drivers/crypto/fsl/jr.c|  1 +
>  drivers/dma/apbh_dma.c |  1 +
>  drivers/dma/bcm6348-iudma.c|  1 +
>  drivers/dma/dma-uclass.c   |  1 +
>  drivers/dma/ti/k3-udma.c   |  1 +
>  drivers/fpga/versalpl.c|  1 +
>  drivers/fpga/zynqmppl.c|  1 +
>  drivers/mmc/dw_mmc.c   |  1 +
>  drivers/mmc/fsl_esdhc.c|  1 +
>  drivers/mmc/fsl_esdhc_imx.c|  1 +
>  drivers/mmc/fsl_esdhc_spl.c|  1 +
>  drivers/mmc/meson_gx_mmc.c |  1 +
>  drivers/mmc/omap_hsmmc.c   |  1 +
>  drivers/mmc/sdhci.c|  1 +
>  drivers/mmc/stm32_sdmmc2.c |  1 +
>  drivers/mmc/tmio-common.c  |  1 +
>  drivers/mtd/nand/raw/denali.c  |  1 +
>  drivers/mtd/nand/raw/fsl_elbc_spl.c|  1 +
>  drivers/mtd/nand/raw/fsl_ifc_spl.c |  1 +
>  drivers/mtd/nand/raw/mxs_nand.c|  1 +
>  drivers/mtd/pic32_flash.c  |  1 +
>  drivers/mtd/spi/fsl_espi_spl.c |  1 +
>  drivers/net/ag7xxx.c   |  1 +
>  drivers/net/altera_tse.c   |  1 +
>  drivers/net/bcm-sf2-eth-gmac.c |  1 +
>  drivers/net/designware.c   |  1 +
>  drivers/net/dwc_eth_qos.c  |  1 +
>  drivers/net/e1000.c|  1 +
>  drivers/net/ethoc.c|  1 +
>  drivers/net/fec_mxc.c  |  1 +
>  drivers/net/fsl-mc/mc.c|  1 +
>  drivers/net/ftgmac100.c|  1 +
>  drivers/net/ftmac100.c |  1 +
>  

Re: [U-Boot] [PATCH] configs: ls1028a: enable OF_LIBFDT_OVERLAY

2019-11-15 Thread Priyanka Jain


>-Original Message-
>From: Alex Marginean 
>Sent: Thursday, November 14, 2019 7:10 PM
>To: u-boot@lists.denx.de
>Cc: Priyanka Jain ; Sudhanshu Gupta
>; Harninder Rai ;
>Rajesh Bhagat ; Claudiu Manoil
>; Madalin Bucur ;
>Alexandru Marginean 
>Subject: [PATCH] configs: ls1028a: enable OF_LIBFDT_OVERLAY
>
>LS1028A QDS board supports multiple combinations of SerDes protocols and
>multiple add-on cards with Ethernet PHYs.  Some of them require specific
>configuration in Linux DT, and the plan is to use DT overlays for them.
>
>Signed-off-by: Alex Marginean 
>---
> configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
> configs/ls1028aqds_tfa_defconfig | 1 +
> configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 +
> configs/ls1028ardb_tfa_defconfig | 1 +
> 4 files changed, 4 insertions(+)
>
>diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
>b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
>index fadb13d469..713a088e42 100644
>--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
>+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
>@@ -71,4 +71,5 @@ CONFIG_USB_XHCI_DWC3=y  CONFIG_WDT=y
>CONFIG_WDT_SP805=y  CONFIG_RSA=y
>+CONFIG_OF_LIBFDT_OVERLAY=y
> CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
>diff --git a/configs/ls1028aqds_tfa_defconfig
>b/configs/ls1028aqds_tfa_defconfig
>index b690e24c7f..b5eb872148 100644
>--- a/configs/ls1028aqds_tfa_defconfig
>+++ b/configs/ls1028aqds_tfa_defconfig
>@@ -73,4 +73,5 @@ CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
> CONFIG_WDT=y
> CONFIG_WDT_SP805=y
>+CONFIG_OF_LIBFDT_OVERLAY=y
> CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
>diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
>b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
>index cbbe649485..dc07a0a4d7 100644
>--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
>+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
>@@ -71,4 +71,5 @@ CONFIG_USB_XHCI_DWC3=y  CONFIG_WDT=y
>CONFIG_WDT_SP805=y  CONFIG_RSA=y
>+CONFIG_OF_LIBFDT_OVERLAY=y
> CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
>diff --git a/configs/ls1028ardb_tfa_defconfig
>b/configs/ls1028ardb_tfa_defconfig
>index 35c46d4dd7..644c5ac6bb 100644
>--- a/configs/ls1028ardb_tfa_defconfig
>+++ b/configs/ls1028ardb_tfa_defconfig
>@@ -74,4 +74,5 @@ CONFIG_USB_XHCI_HCD=y
> CONFIG_USB_XHCI_DWC3=y
> CONFIG_WDT=y
> CONFIG_WDT_SP805=y
>+CONFIG_OF_LIBFDT_OVERLAY=y
> CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
>--
>2.17.1
Reviewed-by: Priyanka Jain 
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Re: [U-Boot] [PATCH 4/5] T1042RDB_PI_NAND_SECURE_BOOT: SECURE_BOOT means environment is nowhere

2019-11-15 Thread Priyanka Jain


>-Original Message-
>From: U-Boot  On Behalf Of Tom Rini
>Sent: Thursday, November 14, 2019 8:24 PM
>To: u-boot@lists.denx.de
>Subject: [U-Boot] [PATCH 4/5] T1042RDB_PI_NAND_SECURE_BOOT:
>SECURE_BOOT means environment is nowhere
>
>Signed-off-by: Tom Rini 
>---
> board/freescale/t104xrdb/spl.c | 2 ++
> 1 file changed, 2 insertions(+)
>
>diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c
>index 7b0eb8edf51d..76b5160cf903 100644
>--- a/board/freescale/t104xrdb/spl.c
>+++ b/board/freescale/t104xrdb/spl.c
>@@ -106,6 +106,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)  #endif
>
>   /* relocate environment function pointers etc. */
>+#ifndef CONFIG_NXP_ESBC
Can we use some ENV related config instead of this?
> #ifdef CONFIG_SPL_NAND_BOOT
>   nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
>   (uchar *)CONFIG_ENV_ADDR);
>@@ -120,6 +121,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)  #endif
>   gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
>   gd->env_valid = ENV_VALID;
>+#endif
>
>   i2c_init_all();
>
>--
>2.17.1

-priyankajain
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Re: [U-Boot] [PATCH 08/42] board: freescale: ls1012aqds: support dm_i2c_* API

2019-11-15 Thread Priyanka Jain


>-Original Message-
>From: Biwen Li 
>Sent: Thursday, November 14, 2019 4:06 PM
>To: Jagdish Gediya ; Priyanka Jain
>; h...@denx.de; ja...@amarulasolutions.com;
>aford...@gmail.com; Alison Wang ;
>bhaskar.upadh...@nxp.com; feng.l...@nxp.com; jh80.ch...@samsung.com;
>Pramod Kumar ; Rajesh Bhagat
>; Ruchika Gupta ;
>olte...@gmail.com
>Cc: Xiaobo Xie ; Jiafei Pan ; u-
>b...@lists.denx.de; Biwen Li 
>Subject: [PATCH 08/42] board: freescale: ls1012aqds: support dm_i2c_* API
>
>This supports dm_i2c_* API to
>fix compilation error when
>enabled CONFIG_DM_I2C as follows:
>   - board/freescale/ls1012aqds/built-in.o: In function `misc_init_r:
> board/freescale/ls1012aqds/ls1012aqds.c:111: undefined reference
>to
> `i2c_set_bus_num'
> board/freescale/ls1012aqds/ls1012aqds.c:113: undefined reference
>to
> `i2c_write'
>
If this compilation error is introduced by one of your patch, merge with that.
>Signed-off-by: Biwen Li 
>---

-priyankajain
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Re: [U-Boot] [PATCH 2/5] fsl: layerscape: guard *env_sf_get_env_addr() on CONFIG_ENV_IS_IN_SPI_FLASH

2019-11-15 Thread Priyanka Jain


>-Original Message-
>From: U-Boot  On Behalf Of Tom Rini
>Sent: Thursday, November 14, 2019 8:24 PM
>To: u-boot@lists.denx.de
>Subject: [U-Boot] [PATCH 2/5] fsl: layerscape: guard *env_sf_get_env_addr()
>on CONFIG_ENV_IS_IN_SPI_FLASH
>
>Signed-off-by: Tom Rini 
>---
> board/freescale/ls1043aqds/ls1043aqds.c | 2 +-
>board/freescale/ls1046aqds/ls1046aqds.c | 2 +-
> board/freescale/ls1088a/ls1088a.c   | 2 ++
> 3 files changed, 4 insertions(+), 2 deletions(-)
>
>diff --git a/board/freescale/ls1043aqds/ls1043aqds.c
>b/board/freescale/ls1043aqds/ls1043aqds.c
>index 45f006dab720..8c96b962b788 100644
>--- a/board/freescale/ls1043aqds/ls1043aqds.c
>+++ b/board/freescale/ls1043aqds/ls1043aqds.c
>@@ -525,7 +525,7 @@ u16 flash_read16(void *addr)
>   return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00);  }
>
>-#ifdef CONFIG_TFABOOT
>+#if defined(CONFIG_TFABOOT) && defined(CONFIG_ENV_IS_IN_SPI_FLASH)
> void *env_sf_get_env_addr(void)
> {
>   return (void *)(CONFIG_SYS_FSL_QSPI_BASE + CONFIG_ENV_OFFSET);
>diff --git a/board/freescale/ls1046aqds/ls1046aqds.c
>b/board/freescale/ls1046aqds/ls1046aqds.c
>index 6a51dcd64913..aac5d9aa848f 100644
>--- a/board/freescale/ls1046aqds/ls1046aqds.c
>+++ b/board/freescale/ls1046aqds/ls1046aqds.c
>@@ -482,7 +482,7 @@ u16 flash_read16(void *addr)
>   return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00);  }
>
>-#ifdef CONFIG_TFABOOT
>+#if defined(CONFIG_TFABOOT) && defined(CONFIG_ENV_IS_IN_SPI_FLASH)
> void *env_sf_get_env_addr(void)
> {
>   return (void *)(CONFIG_SYS_FSL_QSPI_BASE + CONFIG_ENV_OFFSET);
>diff --git a/board/freescale/ls1088a/ls1088a.c
>b/board/freescale/ls1088a/ls1088a.c
>index f1592982a348..4ecf6dce6855 100644
>--- a/board/freescale/ls1088a/ls1088a.c
>+++ b/board/freescale/ls1088a/ls1088a.c
>@@ -1008,8 +1008,10 @@ int is_flash_available(void)  }  #endif
>
>+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
> void *env_sf_get_env_addr(void)
> {
>   return (void *)(CONFIG_SYS_FSL_QSPI_BASE + CONFIG_ENV_OFFSET);  }
>#endif
>+#endif
>--
>2.17.1
>
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Reviewed-by: Priyanka Jain 
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Re: [U-Boot] [PATCH 06/42] gpio: do not include for ARCH_LS1012A

2019-11-15 Thread Priyanka Jain


>-Original Message-
>From: Biwen Li 
>Sent: Thursday, November 14, 2019 4:06 PM
>To: Jagdish Gediya ; Priyanka Jain
>; h...@denx.de; ja...@amarulasolutions.com;
>aford...@gmail.com; Alison Wang ;
>bhaskar.upadh...@nxp.com; feng.l...@nxp.com; jh80.ch...@samsung.com;
>Pramod Kumar ; Rajesh Bhagat
>; Ruchika Gupta ;
>olte...@gmail.com
>Cc: Xiaobo Xie ; Jiafei Pan ; u-
>b...@lists.denx.de; Biwen Li 
>Subject: [PATCH 06/42] gpio: do not include  for
>ARCH_LS1012A
>
>As no gpio.h is defined for this architecture, to avoid compilation failure, do
>not include  for SoC LS1012A. Compilation error as follows:
>   - In file included from drivers/gpio/gpio-uclass.c:15:0:
> ./arch/arm/include/asm/gpio.h:7:10: fatal error: asm/arch/gpio.h: No
>such file or directory
> #include 
>  ^
> compilation terminated.
> scripts/Makefile.build:278: recipe for target drivers/gpio/gpio-
>uclass.o failed
> make[1]: *** [drivers/gpio/gpio-uclass.o] Error 1
> Makefile:1629: recipe for target drivers/gpio failed
> make: *** [drivers/gpio] Error 2
> make: *** Waiting for unfinished jobs
>   LD  board/freescale/common/built-in.o
>   In file included from drivers/i2c/i2c-uclass.c:15:0:
>   ./arch/arm/include/asm/gpio.h:7:10: fatal error: asm/arch/gpio.h:
>No such file or directory
>   #include 
>^
>   compilation terminated.
>
If this compilation error is introduced by one of your patch, merge with that.
>Signed-off-by: Biwen Li 
>---


-priyankajain
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Re: [U-Boot] [PATCH 09/42] include/configs: ls1012a_common: define default i2c bus

2019-11-15 Thread Priyanka Jain


>-Original Message-
>From: Biwen Li 
>Sent: Thursday, November 14, 2019 4:06 PM
>To: Jagdish Gediya ; Priyanka Jain
>; h...@denx.de; ja...@amarulasolutions.com;
>aford...@gmail.com; Alison Wang ;
>bhaskar.upadh...@nxp.com; feng.l...@nxp.com; jh80.ch...@samsung.com;
>Pramod Kumar ; Rajesh Bhagat
>; Ruchika Gupta ;
>olte...@gmail.com
>Cc: Xiaobo Xie ; Jiafei Pan ; u-
>b...@lists.denx.de; Biwen Li 
>Subject: [PATCH 09/42] include/configs: ls1012a_common: define default i2c
>bus
>
>This defines default i2c bus with
>macro CONFIG_I2C_SET_DEFAULT_BUS_NUM
>and CONFIG_I2C_DEFAULT_BUS_NUMBER for ls1012a
>
>Signed-off-by: Biwen Li 
>---
> include/configs/ls1012a_common.h | 3 +++
> 1 file changed, 3 insertions(+)
>
>diff --git a/include/configs/ls1012a_common.h
>b/include/configs/ls1012a_common.h
>index c5be1d33cc..b3a12094c1 100644
>--- a/include/configs/ls1012a_common.h
>+++ b/include/configs/ls1012a_common.h
>@@ -76,6 +76,9 @@
> /* I2C */
> #ifndef CONFIG_DM_I2C
> #define CONFIG_SYS_I2C
>+#else
>+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
>+#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
> #endif
>
> #define CONFIG_SYS_NS16550_SERIAL
>--
>2.17.1
Please reorder patches so that dependency patches are earlier and final 
enablement in configs file is in later patches.

-priyankajain
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Re: [U-Boot] [PATCH 07/42] configs: ls1012a: enable CONFIG_DM_RTC

2019-11-15 Thread Priyanka Jain


>-Original Message-
>From: Biwen Li 
>Sent: Thursday, November 14, 2019 4:06 PM
>To: Jagdish Gediya ; Priyanka Jain
>; h...@denx.de; ja...@amarulasolutions.com;
>aford...@gmail.com; Alison Wang ;
>bhaskar.upadh...@nxp.com; feng.l...@nxp.com; jh80.ch...@samsung.com;
>Pramod Kumar ; Rajesh Bhagat
>; Ruchika Gupta ;
>olte...@gmail.com
>Cc: Xiaobo Xie ; Jiafei Pan ; u-
>b...@lists.denx.de; Biwen Li 
>Subject: [PATCH 07/42] configs: ls1012a: enable CONFIG_DM_RTC
>
>This enables CONFIG_DM_RTC for SoC LS1012A to fix compilation error when
>enabled CONFIG_DM_I2C and CONFIG_CMD_DATE as follows:
>   - cmd/date.c: In function ‘do_date’:
> cmd/date.c:51:12: warning: implicit declaration of function
>‘I2C_GET_BUS’; did you mean ‘IDE_BUS’? [-Wimplicit-function-declaration]
> old_bus = I2C_GET_BUS();
>   ^~~
>   IDE_BUS
> cmd/date.c:52:2: warning: implicit declaration of function
>‘I2C_SET_BUS’; did you mean ‘IDE_BUS’? [-Wimplicit-function-declaration]
> I2C_SET_BUS(CONFIG_SYS_RTC_BUS_NUM);
> ^~~
> IDE_BUS
> LD  drivers/pci/built-in.o
> cmd/date.c:52:14: error: ‘CONFIG_SYS_RTC_BUS_NUM’ undeclared
>(first use in this function); did you mean ‘CONFIG_SYS_EEPROM_BUS_NUM’?
> I2C_SET_BUS(CONFIG_SYS_RTC_BUS_NUM);
> ^~
> CONFIG_SYS_EEPROM_BUS_NUM
> cmd/date.c:52:14: note: each undeclared identifier is reported only
>once for each function it appears in
> scripts/Makefile.build:278: recipe for target cmd/date.o failed
> make[1]: *** [cmd/date.o] Error 1
> make[1]: *** Waiting for unfinished jobs
>
If this compilation error is introduced by one of your patch, merge with that.
>Signed-off-by: Biwen Li 

-priyankajain
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Re: [U-Boot] [PATCH 02/42] include/configs: arm: ls1012a: fix compilation error

2019-11-15 Thread Priyanka Jain


>-Original Message-
>From: Biwen Li 
>Sent: Thursday, November 14, 2019 4:06 PM
>To: Jagdish Gediya ; Priyanka Jain
>; h...@denx.de; ja...@amarulasolutions.com;
>aford...@gmail.com; Alison Wang ;
>bhaskar.upadh...@nxp.com; feng.l...@nxp.com; jh80.ch...@samsung.com;
>Pramod Kumar ; Rajesh Bhagat
>; Ruchika Gupta ;
>olte...@gmail.com
>Cc: Xiaobo Xie ; Jiafei Pan ; u-
>b...@lists.denx.de; Biwen Li 
>Subject: [PATCH 02/42] include/configs: arm: ls1012a: fix compilation error
>
>This fixes a compilation error as follow:
>   - In file included from include/config.h:9:0,
> from ./include/common.h:23:
> include/config_fallbacks.h:51:4: error: #error "Cannot define
>CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
> #  error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is
>used"
>   ^
> In file included from include/config.h:9:0,
>from ./include/common.h:23:
> include/config_fallbacks.h:51:4: error: #error "Cannot define
>CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
> #  error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is
>used"
>   ^
> scripts/Makefile.autoconf:48: recipe for target
>include/autoconf.mk.dep failed
> make[1]: *** [include/autoconf.mk.dep] Error 1
> make[1]: *** Waiting for unfinished jobs
> scripts/Makefile.autoconf:77: recipe for target u-boot.cfg failed
> make[1]: *** [u-boot.cfg] Error 1
> make: *** No rule to make target include/config/auto.conf, needed
>by include/config/uboot.release.  Stop.
>
>Signed-off-by: Biwen Li 
>---
> include/configs/ls1012a_common.h | 2 ++
> 1 file changed, 2 insertions(+)
>
>diff --git a/include/configs/ls1012a_common.h
>b/include/configs/ls1012a_common.h
>index dd2a679b79..c5be1d33cc 100644
>--- a/include/configs/ls1012a_common.h
>+++ b/include/configs/ls1012a_common.h
>@@ -74,7 +74,9 @@
>   CONFIG_SYS_SCSI_MAX_LUN)
>
> /* I2C */
>+#ifndef CONFIG_DM_I2C
> #define CONFIG_SYS_I2C
>+#endif
>
> #define CONFIG_SYS_NS16550_SERIAL
> #define CONFIG_SYS_NS16550_REG_SIZE 1
>--
>2.17.1
This error seems to appear because of "configs: ls1012a: enable CONFIG_DM_I2C" 
patch,
Please merge this with first patch.
Note that all patches should independently compile and should not break builds.

-priyankajain
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Re: [U-Boot] [PATCH 05/42] configs: ls1012a: enable CONFIG_DM_GPIO to fix compilation error

2019-11-15 Thread Priyanka Jain


>-Original Message-
>From: Biwen Li 
>Sent: Thursday, November 14, 2019 4:06 PM
>To: Jagdish Gediya ; Priyanka Jain
>; h...@denx.de; ja...@amarulasolutions.com;
>aford...@gmail.com; Alison Wang ;
>bhaskar.upadh...@nxp.com; feng.l...@nxp.com; jh80.ch...@samsung.com;
>Pramod Kumar ; Rajesh Bhagat
>; Ruchika Gupta ;
>olte...@gmail.com
>Cc: Xiaobo Xie ; Jiafei Pan ; u-
>b...@lists.denx.de; Biwen Li 
>Subject: [PATCH 05/42] configs: ls1012a: enable CONFIG_DM_GPIO to fix
>compilation error
>
>This enables CONFIG_DM_GPIO to fix
>a compilation error as follows:
>   - drivers/i2c/built-in.o: In function `mxc_i2c_probe:
> drivers/i2c/mxc_i2c.c:924: undefined reference to
> `gpio_request_by_name_nodev'
> drivers/i2c/mxc_i2c.c:927: undefined reference to
> `gpio_request_by_name_nodev'
>
If this error is introduced by one of your patch. Merge this change with that.
>Signed-off-by: Biwen Li 

-priyankajain
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Re: [U-Boot] [PATCH 1/4] asm: dma-mapping.h: Fix dma mapping functions

2019-11-15 Thread Masahiro Yamada
On Fri, Nov 15, 2019 at 8:55 PM Vignesh Raghavendra  wrote:
>
> Subsystems such as USB expect dma_map_single() and dma_unmap_single() to
> do dcache flush/invalidate operations as required. For example, see
> drivers/usb/gadget/udc/udc-core.c::usb_gadget_map_request().
> Currently drivers do this locally, (see drivers/usb/dwc3/ep0.c,
> drivers/mtd/nand/raw/denali.c etc..)
> Update arch specific dma_map_single() and dma_unmap_single() APIs to do
> cache flush/invalidate  operations, so that drivers need not implement
> them locally.
>
> Signed-off-by: Vignesh Raghavendra 


Reviewed-by: Masahiro Yamada 


> ---
>  arch/arm/include/asm/dma-mapping.h   | 22 --
>  arch/nds32/include/asm/dma-mapping.h | 22 --
>  arch/riscv/include/asm/dma-mapping.h | 22 --
>  arch/x86/include/asm/dma-mapping.h   | 22 --
>  4 files changed, 80 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/include/asm/dma-mapping.h 
> b/arch/arm/include/asm/dma-mapping.h
> index fc5b8f634d54..4b02320dfbd3 100644
> --- a/arch/arm/include/asm/dma-mapping.h
> +++ b/arch/arm/include/asm/dma-mapping.h
> @@ -7,7 +7,10 @@
>  #ifndef __ASM_ARM_DMA_MAPPING_H
>  #define __ASM_ARM_DMA_MAPPING_H
>
> +#include 
> +#include 
>  #include 
> +#include 
>
>  #definedma_mapping_error(x, y) 0
>
> @@ -25,12 +28,27 @@ static inline void dma_free_coherent(void *addr)
>  static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
>enum dma_data_direction dir)
>  {
> -   return (unsigned long)vaddr;
> +   unsigned long addr = (unsigned long)vaddr;
> +
> +   len = ALIGN(len, ARCH_DMA_MINALIGN);
> +
> +   if (dir == DMA_FROM_DEVICE)
> +   invalidate_dcache_range(addr, addr + len);
> +   else
> +   flush_dcache_range(addr, addr + len);
> +
> +   return addr;
>  }
>
>  static inline void dma_unmap_single(volatile void *vaddr, size_t len,
> -   unsigned long paddr)
> +   enum dma_data_direction dir)
>  {
> +   unsigned long addr = (unsigned long)vaddr;
> +
> +   len = ALIGN(len, ARCH_DMA_MINALIGN);
> +
> +   if (dir != DMA_TO_DEVICE)
> +   invalidate_dcache_range(addr, addr + len);
>  }
>
>  #endif /* __ASM_ARM_DMA_MAPPING_H */
> diff --git a/arch/nds32/include/asm/dma-mapping.h 
> b/arch/nds32/include/asm/dma-mapping.h
> index e6808dc84089..33c4582f4614 100644
> --- a/arch/nds32/include/asm/dma-mapping.h
> +++ b/arch/nds32/include/asm/dma-mapping.h
> @@ -6,7 +6,10 @@
>  #ifndef __ASM_NDS_DMA_MAPPING_H
>  #define __ASM_NDS_DMA_MAPPING_H
>
> +#include 
> +#include 
>  #include 
> +#include 
>
>  static void *dma_alloc_coherent(size_t len, unsigned long *handle)
>  {
> @@ -17,12 +20,27 @@ static void *dma_alloc_coherent(size_t len, unsigned long 
> *handle)
>  static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
>enum dma_data_direction dir)
>  {
> -   return (unsigned long)vaddr;
> +   unsigned long addr = (unsigned long)vaddr;
> +
> +   len = ALIGN(len, ARCH_DMA_MINALIGN);
> +
> +   if (dir == DMA_FROM_DEVICE)
> +   invalidate_dcache_range(addr, addr + len);
> +   else
> +   flush_dcache_range(addr, addr + len);
> +
> +   return addr;
>  }
>
>  static inline void dma_unmap_single(volatile void *vaddr, size_t len,
> -   unsigned long paddr)
> +   enum dma_data_direction dir)
>  {
> +   unsigned long addr = (unsigned long)vaddr;
> +
> +   len = ALIGN(len, ARCH_DMA_MINALIGN);
> +
> +   if (dir != DMA_TO_DEVICE)
> +   invalidate_dcache_range(addr, addr + len);
>  }
>
>  #endif /* __ASM_NDS_DMA_MAPPING_H */
> diff --git a/arch/riscv/include/asm/dma-mapping.h 
> b/arch/riscv/include/asm/dma-mapping.h
> index 3d930c90eceb..01f8a9219a38 100644
> --- a/arch/riscv/include/asm/dma-mapping.h
> +++ b/arch/riscv/include/asm/dma-mapping.h
> @@ -9,7 +9,10 @@
>  #ifndef __ASM_RISCV_DMA_MAPPING_H
>  #define __ASM_RISCV_DMA_MAPPING_H
>
> +#include 
> +#include 
>  #include 
> +#include 
>
>  #define dma_mapping_error(x, y)0
>
> @@ -27,12 +30,27 @@ static inline void dma_free_coherent(void *addr)
>  static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
>enum dma_data_direction dir)
>  {
> -   return (unsigned long)vaddr;
> +   unsigned long addr = (unsigned long)vaddr;
> +
> +   len = ALIGN(len, ARCH_DMA_MINALIGN);
> +
> +   if (dir == DMA_FROM_DEVICE)
> +   invalidate_dcache_range(addr, addr + len);
> +   else
> +   flush_dcache_range(addr, addr + len);
> +
> +   return addr;
>  }
>
>  static inline void dma_unmap_single(volatile void *vaddr, size_t len,
> -  

Re: [U-Boot] [PATCH 3/4] mtd: denali: Drop custom dma mapping functions

2019-11-15 Thread Masahiro Yamada
On Fri, Nov 15, 2019 at 8:56 PM Vignesh Raghavendra  wrote:
>
> Drop local dma_map_single() and dma_unmap_single() and use arch specific
> common implementation
>
> Signed-off-by: Vignesh Raghavendra 
> ---


Acked-by: Masahiro Yamada 

>  drivers/mtd/nand/raw/denali.c | 34 +++---
>  1 file changed, 3 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
> index e0eb1339ecd2..8537c609fb62 100644
> --- a/drivers/mtd/nand/raw/denali.c
> +++ b/drivers/mtd/nand/raw/denali.c
> @@ -5,6 +5,7 @@
>   * Copyright (C) 2009-2010, Intel Corporation and its suppliers.
>   */
>
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -16,35 +17,6 @@
>
>  #include "denali.h"
>
> -static dma_addr_t dma_map_single(void *dev, void *ptr, size_t size,
> -enum dma_data_direction dir)
> -{
> -   unsigned long addr = (unsigned long)ptr;
> -
> -   size = ALIGN(size, ARCH_DMA_MINALIGN);
> -
> -   if (dir == DMA_FROM_DEVICE)
> -   invalidate_dcache_range(addr, addr + size);
> -   else
> -   flush_dcache_range(addr, addr + size);
> -
> -   return addr;
> -}
> -
> -static void dma_unmap_single(void *dev, dma_addr_t addr, size_t size,
> -enum dma_data_direction dir)
> -{
> -   size = ALIGN(size, ARCH_DMA_MINALIGN);
> -
> -   if (dir != DMA_TO_DEVICE)
> -   invalidate_dcache_range(addr, addr + size);
> -}
> -
> -static int dma_mapping_error(void *dev, dma_addr_t addr)
> -{
> -   return 0;
> -}
> -
>  #define DENALI_NAND_NAME"denali-nand"
>
>  /* for Indexed Addressing */
> @@ -564,7 +536,7 @@ static int denali_dma_xfer(struct denali_nand_info 
> *denali, void *buf,
> enum dma_data_direction dir = write ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
> int ret = 0;
>
> -   dma_addr = dma_map_single(denali->dev, buf, size, dir);
> +   dma_addr = dma_map_single(buf, size, dir);
> if (dma_mapping_error(denali->dev, dma_addr)) {
> dev_dbg(denali->dev, "Failed to DMA-map buffer. Trying 
> PIO.\n");
> return denali_pio_xfer(denali, buf, size, page, raw, write);
> @@ -605,7 +577,7 @@ static int denali_dma_xfer(struct denali_nand_info 
> *denali, void *buf,
>
> iowrite32(0, denali->reg + DMA_ENABLE);
>
> -   dma_unmap_single(denali->dev, dma_addr, size, dir);
> +   dma_unmap_single(buf, size, dir);
>
> if (irq_status & INTR__ERASED_PAGE)
> memset(buf, 0xff, size);
> --
> 2.24.0
>
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-- 
Best Regards
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Re: [U-Boot] [PATCH 2/4] mmc: tmio-common: Drop custom dma mapping functions

2019-11-15 Thread Masahiro Yamada
On Fri, Nov 15, 2019 at 8:56 PM Vignesh Raghavendra  wrote:
>
> Drop local dma_map_single() and dma_unmap_single() and use arch specific
> common implementation
>
> Signed-off-by: Vignesh Raghavendra 
> ---

Acked-by: Masahiro Yamada 


>  drivers/mmc/tmio-common.c | 25 +++--
>  1 file changed, 3 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c
> index 812205a21f6a..37c2b8555150 100644
> --- a/drivers/mmc/tmio-common.c
> +++ b/drivers/mmc/tmio-common.c
> @@ -4,6 +4,7 @@
>   *   Author: Masahiro Yamada 
>   */
>
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -75,26 +76,6 @@ void tmio_sd_writel(struct tmio_sd_priv *priv,
> writel(val, priv->regbase + reg);
>  }
>
> -static dma_addr_t __dma_map_single(void *ptr, size_t size,
> -  enum dma_data_direction dir)
> -{
> -   unsigned long addr = (unsigned long)ptr;
> -
> -   if (dir == DMA_FROM_DEVICE)
> -   invalidate_dcache_range(addr, addr + size);
> -   else
> -   flush_dcache_range(addr, addr + size);
> -
> -   return addr;
> -}
> -
> -static void __dma_unmap_single(dma_addr_t addr, size_t size,
> -  enum dma_data_direction dir)
> -{
> -   if (dir != DMA_TO_DEVICE)
> -   invalidate_dcache_range(addr, addr + size);
> -}
> -
>  static int tmio_sd_check_error(struct udevice *dev, struct mmc_cmd *cmd)
>  {
> struct tmio_sd_priv *priv = dev_get_priv(dev);
> @@ -361,7 +342,7 @@ static int tmio_sd_dma_xfer(struct udevice *dev, struct 
> mmc_data *data)
>
> tmio_sd_writel(priv, tmp, TMIO_SD_DMA_MODE);
>
> -   dma_addr = __dma_map_single(buf, len, dir);
> +   dma_addr = dma_map_single(buf, len, dir);
>
> tmio_sd_dma_start(priv, dma_addr);
>
> @@ -370,7 +351,7 @@ static int tmio_sd_dma_xfer(struct udevice *dev, struct 
> mmc_data *data)
> if (poll_flag == TMIO_SD_DMA_INFO1_END_RD)
> udelay(1);
>
> -   __dma_unmap_single(dma_addr, len, dir);
> +   dma_unmap_single(buf, len, dir);
>
> return ret;
>  }
> --
> 2.24.0
>
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-- 
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Re: [U-Boot] RK3399 boards (rockpi4 and rockpro64) kernel SError using upstream U-boot

2019-11-15 Thread Qu Wenruo


On 2019/11/15 下午6:37, Qu Wenruo wrote:
> A small update to this bug.
> 
> I'm using mem=3584M kernel cmdline, to sacrifice 512M memory.
> 
> And then surprise, memtest 3G works. (Originally it's 4G physical ram
> and 3584M memtest.
> 
> Hopes this could provide some clue.

Oh no, with 3187M, it still crashes with SError.

So still no luck.

Thanks,
Qu
> 
> Thanks,
> Qu
> 
> On 2019/11/9 下午9:45, Jagan Teki wrote:
>> On Sat, Nov 9, 2019 at 6:48 PM Qu Wenruo  wrote:
>>>
>>>
>>>
>>> On 2019/11/9 下午8:25, Jagan Teki wrote:
 On Sat, Nov 9, 2019 at 12:08 PM Qu Wenruo  wrote:
>
> Hi,
>
> Although recent U-boot upstream has merged the rk3399 ram patchset to
> initial DDR4 properly, but strangely I can still trigger SError for
> RockPi4 and RockPro64 boards using upstream U-boot with upstream kernel
> (v5.4-rc). The dmesg is attached at the end.
>
> This is pretty easy to trigger if using "memtester 3584M" (both boards
> are 4G RAM variants).
> The strange part is, if using the vendor uboot (like Armbian does), then
> the kernel SError just goes away, so it looks like a bug in Uboot.

 Can you check u-boot memtest, past me the result.
>>>
>>> Looks like rockpi4 (maybe the whole rk3399 family) doesn't define
>>> CONFIG_SYS_MEMTEST_START/END, thus enabling CONFIG_CMD_MEMTEST will
>>> easily break the compile.
>>>
>>> Or any magic number for me to try?
>>
>> Better try START with ddr base, and END some 256M set for basic test.
>>
>>>

>
> The U-boot I built follows the README.rockchip, using the SD card and
> boot option 1 (miniloader + Uboot + rkbin).
> The script build script (arch PKGBUILD) can be found here:
>
> https://github.com/adam900710/PKGBUILDs/blob/rockpi4/alarm/uboot-rockpi4/PKGBUILD
>
> Any clue for the problem?

 Would you check this series [1]

 [1] https://patchwork.ozlabs.org/cover/1183700/

>>> Any git repo? I hate to apply large patchset especially when there are
>>> conflicts...
>>
>> Hmm.. I didn't find the repo on the cover-letter. Did you check the
>> u-boot-kerveryang github, may be Kever would place these on that repo
>> I think.
>>
> 
> 
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> 



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[U-Boot] [PATCH 4/4] net: macb: Drop local cache flush

2019-11-15 Thread Vignesh Raghavendra
Now that arch specific dma mapping APIs take care of cache
flush/invalidate, drop local cache flush operation.

Signed-off-by: Vignesh Raghavendra 
---
 drivers/net/macb.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index 1a532b0e5a4f..1ded76b6d7b6 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -331,8 +331,6 @@ static int _macb_send(struct macb_device *macb, const char 
*name, void *packet,
macb->tx_ring[tx_head].addr = paddr;
barrier();
macb_flush_ring_desc(macb, TX);
-   /* Do we need check paddr and length is dcache line aligned? */
-   flush_dcache_range(paddr, paddr + ALIGN(length, ARCH_DMA_MINALIGN));
macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE) | MACB_BIT(TSTART));
 
/*
@@ -348,7 +346,7 @@ static int _macb_send(struct macb_device *macb, const char 
*name, void *packet,
udelay(1);
}
 
-   dma_unmap_single(packet, length, paddr);
+   dma_unmap_single(packet, length, DMA_TO_DEVICE);
 
if (i <= MACB_TX_TIMEOUT) {
if (ctrl & MACB_BIT(TX_UNDERRUN))
-- 
2.24.0

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[U-Boot] [PATCH 3/4] mtd: denali: Drop custom dma mapping functions

2019-11-15 Thread Vignesh Raghavendra
Drop local dma_map_single() and dma_unmap_single() and use arch specific
common implementation

Signed-off-by: Vignesh Raghavendra 
---
 drivers/mtd/nand/raw/denali.c | 34 +++---
 1 file changed, 3 insertions(+), 31 deletions(-)

diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index e0eb1339ecd2..8537c609fb62 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -5,6 +5,7 @@
  * Copyright (C) 2009-2010, Intel Corporation and its suppliers.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -16,35 +17,6 @@
 
 #include "denali.h"
 
-static dma_addr_t dma_map_single(void *dev, void *ptr, size_t size,
-enum dma_data_direction dir)
-{
-   unsigned long addr = (unsigned long)ptr;
-
-   size = ALIGN(size, ARCH_DMA_MINALIGN);
-
-   if (dir == DMA_FROM_DEVICE)
-   invalidate_dcache_range(addr, addr + size);
-   else
-   flush_dcache_range(addr, addr + size);
-
-   return addr;
-}
-
-static void dma_unmap_single(void *dev, dma_addr_t addr, size_t size,
-enum dma_data_direction dir)
-{
-   size = ALIGN(size, ARCH_DMA_MINALIGN);
-
-   if (dir != DMA_TO_DEVICE)
-   invalidate_dcache_range(addr, addr + size);
-}
-
-static int dma_mapping_error(void *dev, dma_addr_t addr)
-{
-   return 0;
-}
-
 #define DENALI_NAND_NAME"denali-nand"
 
 /* for Indexed Addressing */
@@ -564,7 +536,7 @@ static int denali_dma_xfer(struct denali_nand_info *denali, 
void *buf,
enum dma_data_direction dir = write ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
int ret = 0;
 
-   dma_addr = dma_map_single(denali->dev, buf, size, dir);
+   dma_addr = dma_map_single(buf, size, dir);
if (dma_mapping_error(denali->dev, dma_addr)) {
dev_dbg(denali->dev, "Failed to DMA-map buffer. Trying PIO.\n");
return denali_pio_xfer(denali, buf, size, page, raw, write);
@@ -605,7 +577,7 @@ static int denali_dma_xfer(struct denali_nand_info *denali, 
void *buf,
 
iowrite32(0, denali->reg + DMA_ENABLE);
 
-   dma_unmap_single(denali->dev, dma_addr, size, dir);
+   dma_unmap_single(buf, size, dir);
 
if (irq_status & INTR__ERASED_PAGE)
memset(buf, 0xff, size);
-- 
2.24.0

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[U-Boot] [PATCH 2/4] mmc: tmio-common: Drop custom dma mapping functions

2019-11-15 Thread Vignesh Raghavendra
Drop local dma_map_single() and dma_unmap_single() and use arch specific
common implementation

Signed-off-by: Vignesh Raghavendra 
---
 drivers/mmc/tmio-common.c | 25 +++--
 1 file changed, 3 insertions(+), 22 deletions(-)

diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c
index 812205a21f6a..37c2b8555150 100644
--- a/drivers/mmc/tmio-common.c
+++ b/drivers/mmc/tmio-common.c
@@ -4,6 +4,7 @@
  *   Author: Masahiro Yamada 
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -75,26 +76,6 @@ void tmio_sd_writel(struct tmio_sd_priv *priv,
writel(val, priv->regbase + reg);
 }
 
-static dma_addr_t __dma_map_single(void *ptr, size_t size,
-  enum dma_data_direction dir)
-{
-   unsigned long addr = (unsigned long)ptr;
-
-   if (dir == DMA_FROM_DEVICE)
-   invalidate_dcache_range(addr, addr + size);
-   else
-   flush_dcache_range(addr, addr + size);
-
-   return addr;
-}
-
-static void __dma_unmap_single(dma_addr_t addr, size_t size,
-  enum dma_data_direction dir)
-{
-   if (dir != DMA_TO_DEVICE)
-   invalidate_dcache_range(addr, addr + size);
-}
-
 static int tmio_sd_check_error(struct udevice *dev, struct mmc_cmd *cmd)
 {
struct tmio_sd_priv *priv = dev_get_priv(dev);
@@ -361,7 +342,7 @@ static int tmio_sd_dma_xfer(struct udevice *dev, struct 
mmc_data *data)
 
tmio_sd_writel(priv, tmp, TMIO_SD_DMA_MODE);
 
-   dma_addr = __dma_map_single(buf, len, dir);
+   dma_addr = dma_map_single(buf, len, dir);
 
tmio_sd_dma_start(priv, dma_addr);
 
@@ -370,7 +351,7 @@ static int tmio_sd_dma_xfer(struct udevice *dev, struct 
mmc_data *data)
if (poll_flag == TMIO_SD_DMA_INFO1_END_RD)
udelay(1);
 
-   __dma_unmap_single(dma_addr, len, dir);
+   dma_unmap_single(buf, len, dir);
 
return ret;
 }
-- 
2.24.0

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[U-Boot] [PATCH 1/4] asm: dma-mapping.h: Fix dma mapping functions

2019-11-15 Thread Vignesh Raghavendra
Subsystems such as USB expect dma_map_single() and dma_unmap_single() to
do dcache flush/invalidate operations as required. For example, see
drivers/usb/gadget/udc/udc-core.c::usb_gadget_map_request().
Currently drivers do this locally, (see drivers/usb/dwc3/ep0.c,
drivers/mtd/nand/raw/denali.c etc..)
Update arch specific dma_map_single() and dma_unmap_single() APIs to do
cache flush/invalidate  operations, so that drivers need not implement
them locally.

Signed-off-by: Vignesh Raghavendra 
---
 arch/arm/include/asm/dma-mapping.h   | 22 --
 arch/nds32/include/asm/dma-mapping.h | 22 --
 arch/riscv/include/asm/dma-mapping.h | 22 --
 arch/x86/include/asm/dma-mapping.h   | 22 --
 4 files changed, 80 insertions(+), 8 deletions(-)

diff --git a/arch/arm/include/asm/dma-mapping.h 
b/arch/arm/include/asm/dma-mapping.h
index fc5b8f634d54..4b02320dfbd3 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -7,7 +7,10 @@
 #ifndef __ASM_ARM_DMA_MAPPING_H
 #define __ASM_ARM_DMA_MAPPING_H
 
+#include 
+#include 
 #include 
+#include 
 
 #definedma_mapping_error(x, y) 0
 
@@ -25,12 +28,27 @@ static inline void dma_free_coherent(void *addr)
 static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
   enum dma_data_direction dir)
 {
-   return (unsigned long)vaddr;
+   unsigned long addr = (unsigned long)vaddr;
+
+   len = ALIGN(len, ARCH_DMA_MINALIGN);
+
+   if (dir == DMA_FROM_DEVICE)
+   invalidate_dcache_range(addr, addr + len);
+   else
+   flush_dcache_range(addr, addr + len);
+
+   return addr;
 }
 
 static inline void dma_unmap_single(volatile void *vaddr, size_t len,
-   unsigned long paddr)
+   enum dma_data_direction dir)
 {
+   unsigned long addr = (unsigned long)vaddr;
+
+   len = ALIGN(len, ARCH_DMA_MINALIGN);
+
+   if (dir != DMA_TO_DEVICE)
+   invalidate_dcache_range(addr, addr + len);
 }
 
 #endif /* __ASM_ARM_DMA_MAPPING_H */
diff --git a/arch/nds32/include/asm/dma-mapping.h 
b/arch/nds32/include/asm/dma-mapping.h
index e6808dc84089..33c4582f4614 100644
--- a/arch/nds32/include/asm/dma-mapping.h
+++ b/arch/nds32/include/asm/dma-mapping.h
@@ -6,7 +6,10 @@
 #ifndef __ASM_NDS_DMA_MAPPING_H
 #define __ASM_NDS_DMA_MAPPING_H
 
+#include 
+#include 
 #include 
+#include 
 
 static void *dma_alloc_coherent(size_t len, unsigned long *handle)
 {
@@ -17,12 +20,27 @@ static void *dma_alloc_coherent(size_t len, unsigned long 
*handle)
 static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
   enum dma_data_direction dir)
 {
-   return (unsigned long)vaddr;
+   unsigned long addr = (unsigned long)vaddr;
+
+   len = ALIGN(len, ARCH_DMA_MINALIGN);
+
+   if (dir == DMA_FROM_DEVICE)
+   invalidate_dcache_range(addr, addr + len);
+   else
+   flush_dcache_range(addr, addr + len);
+
+   return addr;
 }
 
 static inline void dma_unmap_single(volatile void *vaddr, size_t len,
-   unsigned long paddr)
+   enum dma_data_direction dir)
 {
+   unsigned long addr = (unsigned long)vaddr;
+
+   len = ALIGN(len, ARCH_DMA_MINALIGN);
+
+   if (dir != DMA_TO_DEVICE)
+   invalidate_dcache_range(addr, addr + len);
 }
 
 #endif /* __ASM_NDS_DMA_MAPPING_H */
diff --git a/arch/riscv/include/asm/dma-mapping.h 
b/arch/riscv/include/asm/dma-mapping.h
index 3d930c90eceb..01f8a9219a38 100644
--- a/arch/riscv/include/asm/dma-mapping.h
+++ b/arch/riscv/include/asm/dma-mapping.h
@@ -9,7 +9,10 @@
 #ifndef __ASM_RISCV_DMA_MAPPING_H
 #define __ASM_RISCV_DMA_MAPPING_H
 
+#include 
+#include 
 #include 
+#include 
 
 #define dma_mapping_error(x, y)0
 
@@ -27,12 +30,27 @@ static inline void dma_free_coherent(void *addr)
 static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
   enum dma_data_direction dir)
 {
-   return (unsigned long)vaddr;
+   unsigned long addr = (unsigned long)vaddr;
+
+   len = ALIGN(len, ARCH_DMA_MINALIGN);
+
+   if (dir == DMA_FROM_DEVICE)
+   invalidate_dcache_range(addr, addr + len);
+   else
+   flush_dcache_range(addr, addr + len);
+
+   return addr;
 }
 
 static inline void dma_unmap_single(volatile void *vaddr, size_t len,
-   unsigned long paddr)
+   enum dma_data_direction dir)
 {
+   unsigned long addr = (unsigned long)vaddr;
+
+   len = ALIGN(len, ARCH_DMA_MINALIGN);
+
+   if (dir != DMA_TO_DEVICE)
+   invalidate_dcache_range(addr, addr + len);
 }
 
 #endif /* __ASM_RISCV_DMA_MAPPING_H */
diff --git 

[U-Boot] [PATCH 0/4] dma-mapping: Add cache flush/invalidation to dma_{un}map_single

2019-11-15 Thread Vignesh Raghavendra
Drivers (especially frameworks ported from Linux such as USB) expect
dma_{un}map_single() APIs to take care of cache maintenance. But this is
not the case in U-Boot and few drivers take care of flushing caches
locally. Instead add flush/invalidate calls to DMA APIs in arch specific
dma-mapping.h file so that per driver implementation of these APIs can
be avoided.

I don't have all the affected hardwares. Would greatly appreciate if
these patches work fine on the affected platforms.

Vignesh Raghavendra (4):
  asm: dma-mapping.h: Fix dma mapping functions
  mmc: tmio-common: Drop custom dma mapping functions
  mtd: denali: Drop custom dma mapping functions
  net: macb: Drop local cache flush

 arch/arm/include/asm/dma-mapping.h   | 22 --
 arch/nds32/include/asm/dma-mapping.h | 22 --
 arch/riscv/include/asm/dma-mapping.h | 22 --
 arch/x86/include/asm/dma-mapping.h   | 22 --
 drivers/mmc/tmio-common.c| 25 +++-
 drivers/mtd/nand/raw/denali.c| 34 +++-
 drivers/net/macb.c   |  4 +---
 7 files changed, 87 insertions(+), 64 deletions(-)

-- 
2.24.0

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[U-Boot] [PATCH 2/2] dma: Add stub of dma_memcpy and dma_get_device

2019-11-15 Thread Vignesh Raghavendra
Add stub for dma_memcpy() and dma_get_device when CONFIG_DMA is
disabled. This avoids ifdefs in driver code using DMA APIs

Signed-off-by: Vignesh Raghavendra 
---
 include/dma.h | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/include/dma.h b/include/dma.h
index d1c3d0df7d91..32885571f7d4 100644
--- a/include/dma.h
+++ b/include/dma.h
@@ -292,6 +292,7 @@ int dma_receive(struct dma *dma, void **dst, void 
*metadata);
 int dma_send(struct dma *dma, void *src, size_t len, void *metadata);
 #endif /* CONFIG_DMA_CHANNELS */
 
+#if CONFIG_IS_ENABLED(DMA)
 /*
  * dma_get_device - get a DMA device which supports transfer
  * type of transfer_type
@@ -315,5 +316,15 @@ int dma_get_device(u32 transfer_type, struct udevice 
**devp);
 transferred and on failure return error code.
  */
 int dma_memcpy(void *dst, void *src, size_t len);
+#else
+static inline int dma_get_device(u32 transfer_type, struct udevice **devp)
+{
+   return -ENOSYS;
+}
 
+static inline int dma_memcpy(void *dst, void *src, size_t len)
+{
+   return -ENOSYS;
+}
+#endif /* CONFIG_DMA */
 #endif /* _DMA_H_ */
-- 
2.24.0

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[U-Boot] [PATCH 1/2] Kconfig: Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA

2019-11-15 Thread Vignesh Raghavendra
Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA. This allows to use
macros such as CONFIG_IS_ENABLED() that allow conditional compilation of
code for SPL and U-Boot.

Signed-off-by: Vignesh Raghavendra 
---
 common/spl/Kconfig   | 2 +-
 configs/am57xx_evm_defconfig | 2 +-
 configs/am57xx_hs_evm_defconfig  | 2 +-
 configs/am57xx_hs_evm_usb_defconfig  | 2 +-
 configs/apalis_imx6_defconfig| 2 +-
 configs/colibri_imx6_defconfig   | 2 +-
 configs/display5_defconfig   | 2 +-
 configs/display5_factory_defconfig   | 2 +-
 configs/dra7xx_evm_defconfig | 2 +-
 configs/dra7xx_hs_evm_defconfig  | 2 +-
 configs/dra7xx_hs_evm_usb_defconfig  | 2 +-
 configs/gwventana_emmc_defconfig | 2 +-
 configs/gwventana_gw5904_defconfig   | 2 +-
 configs/gwventana_nand_defconfig | 2 +-
 configs/imx6dl_icore_nand_defconfig  | 2 +-
 configs/imx6q_icore_nand_defconfig   | 2 +-
 configs/imx6q_logic_defconfig| 2 +-
 configs/imx6qdl_icore_nand_defconfig | 2 +-
 configs/imx6ul_geam_nand_defconfig   | 2 +-
 configs/imx6ul_isiot_nand_defconfig  | 2 +-
 configs/pcm058_defconfig | 2 +-
 configs/pfla02_defconfig | 2 +-
 configs/platinum_picon_defconfig | 2 +-
 configs/platinum_titanium_defconfig  | 2 +-
 doc/README.SPL   | 2 +-
 drivers/Makefile | 2 +-
 26 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 8f0ba8ef831e..717eb1c36ecd 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -477,7 +477,7 @@ config TPL_HASH_SUPPORT
  this option to build system-specific drivers for hash acceleration
  as part of an SPL build.
 
-config SPL_DMA_SUPPORT
+config SPL_DMA
bool "Support DMA drivers"
help
  Enable DMA (direct-memory-access) drivers in SPL. These drivers
diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index 588e58947d35..256c02194306 100644
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -23,7 +23,7 @@ CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_DMA=y
 # CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_SPI_LOAD=y
diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index a09a1e0603d7..7c1850c1b5a7 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -28,7 +28,7 @@ CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_DMA=y
 # CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x4
diff --git a/configs/am57xx_hs_evm_usb_defconfig 
b/configs/am57xx_hs_evm_usb_defconfig
index c9e008350893..1e5d284aa000 100644
--- a/configs/am57xx_hs_evm_usb_defconfig
+++ b/configs/am57xx_hs_evm_usb_defconfig
@@ -29,7 +29,7 @@ CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_DMA=y
 # CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index 797bbb0ed083..5e71f1edca54 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -24,7 +24,7 @@ CONFIG_VERSION_VARIABLE=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_BOUNCE_BUFFER=y
 CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_DMA=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_USB_HOST_SUPPORT=y
 CONFIG_SPL_USB_GADGET=y
diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig
index 4f7ca7b91dc8..53c95370d4f1 100644
--- a/configs/colibri_imx6_defconfig
+++ b/configs/colibri_imx6_defconfig
@@ -23,7 +23,7 @@ CONFIG_VERSION_VARIABLE=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_BOUNCE_BUFFER=y
 CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_DMA=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_USB_HOST_SUPPORT=y
 CONFIG_SPL_USB_GADGET=y
diff --git a/configs/display5_defconfig b/configs/display5_defconfig
index cd96272e5f19..ba29b930ca9a 100644
--- a/configs/display5_defconfig
+++ b/configs/display5_defconfig
@@ -26,7 +26,7 @@ CONFIG_MISC_INIT_R=y
 CONFIG_BOUNCE_BUFFER=y
 CONFIG_SPL_BOOTCOUNT_LIMIT=y
 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
-CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_DMA=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_SAVEENV=y
 CONFIG_SPL_I2C_SUPPORT=y
diff --git a/configs/display5_factory_defconfig 
b/configs/display5_factory_defconfig
index d4e738eb2f40..633cfce6c1ab 100644
--- a/configs/display5_factory_defconfig
+++ b/configs/display5_factory_defconfig
@@ -26,7 +26,7 @@ CONFIG_SUPPORT_RAW_INITRD=y
 CONFIG_MISC_INIT_R=y
 CONFIG_BOUNCE_BUFFER=y
 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
-CONFIG_SPL_DMA_SUPPORT=y

Re: [U-Boot] Sense of soc bus? (was: [PATCH] base: soc: Export soc_device_to_device() helper)

2019-11-15 Thread Andreas Färber
Am 14.11.19 um 23:09 schrieb Rob Herring:
> On Tue, Nov 12, 2019 at 4:47 AM Andreas Färber  wrote:
>> On the other hand, one might argue that such information should just be
>> parsed by EBBR-conformant bootloaders and be passed to the kernel via
>> standard UEFI interfaces and DMI tables. But I'm not aware of Barebox
>> having implemented any of that yet, and even for U-Boot (e.g., Realtek
>> based consumer devices...) not everyone has the GPL sources or tools to
>> update their bootloader. So, having the kernel we control gather
>> information relevant to kernel developers does make some sense to me.
> 
> UEFI and DMI are orthogonal, right. You can't expect DMI on a UEFI+DT system.

Not sure, that's why I CC'ed the EBBR folks for input. If it's not
mandatory today, the next revision of EBBR could just require it - if
that's the unified way between SBBR and EBBR. Little point in doing it
only for EBBR.

On my UEFI+DT based Raspberry Pi 3 Model B I do see it, note the
non-filled Processor Information delivered by U-Boot:

raspi3:~ # dmidecode
# dmidecode 3.2
Getting SMBIOS data from sysfs.
SMBIOS 3.0 present.
7 structures occupying 253 bytes.
Table at 0x3CB3E020.

Handle 0x, DMI type 0, 24 bytes
BIOS Information
Vendor: U-Boot
Version: 2019.10
Release Date: 10/26/2019
ROM Size: 64 kB
Characteristics:
PCI is supported
BIOS is upgradeable
Selectable boot is supported
I2O boot is supported
Targeted content distribution is supported

Handle 0x0001, DMI type 1, 27 bytes
System Information
Manufacturer: raspberrypi
Product Name: rpi
Version: Not Specified
Serial Number: 
UUID: 30303030-3030-3030-6437-62346133
Wake-up Type: Reserved
SKU Number: Not Specified
Family: Not Specified

Handle 0x0002, DMI type 2, 14 bytes
Base Board Information
Manufacturer: raspberrypi
Product Name: rpi
Version: Not Specified
Serial Number: Not Specified
Asset Tag: Not Specified
Features:
Board is a hosting board
Location In Chassis: Not Specified
Chassis Handle: 0x
Type: Motherboard

Handle 0x0003, DMI type 3, 21 bytes
Chassis Information
Manufacturer: raspberrypi
Type: Desktop
Lock: Not Present
Version: Not Specified
Serial Number: Not Specified
Asset Tag: Not Specified
Boot-up State: Safe
Power Supply State: Safe
Thermal State: Safe
Security Status: None
OEM Information: 0x
Height: Unspecified
Number Of Power Cords: Unspecified
Contained Elements: 0

Handle 0x0004, DMI type 4, 48 bytes
Processor Information
Socket Designation: Not Specified
Type: Central Processor
Family: Unknown
Manufacturer: Unknown
ID: 00 00 00 00 00 00 00 00
Version: Unknown
Voltage: Unknown
External Clock: Unknown
Max Speed: Unknown
Current Speed: Unknown
Status: Unpopulated
Upgrade: None
L1 Cache Handle: Not Provided
L2 Cache Handle: Not Provided
L3 Cache Handle: Not Provided
Serial Number: Not Specified
Asset Tag: Not Specified
Part Number: Not Specified
Characteristics: None

Handle 0x0005, DMI type 32, 11 bytes
System Boot Information
Status: No errors detected

Handle 0x0006, DMI type 127, 4 bytes
End Of Table


Regards,
Andreas

-- 
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer
HRB 36809 (AG Nürnberg)
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[U-Boot] [PATCH] configs: stih410-b2260: Enable DM_ETH flag

2019-11-15 Thread Patrice Chotard
This patch allows to fix the following compilation warning:

= WARNING ==
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.


Signed-off-by: Patrice Chotard 
---

 configs/stih410-b2260_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
index aeebeeca04..63eac131f9 100644
--- a/configs/stih410-b2260_defconfig
+++ b/configs/stih410-b2260_defconfig
@@ -31,6 +31,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_MISC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_STI=y
+CONFIG_DM_ETH=y
 CONFIG_PHY=y
 CONFIG_STI_USB_PHY=y
 CONFIG_PINCTRL=y
-- 
2.17.1

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Re: [U-Boot] Most appropriate and scriptable way of creating partition image files

2019-11-15 Thread Alexander Dahl
Hei hei,

Am Donnerstag, 14. November 2019, 20:54:15 CET schrieb Arji Cot:
> I'm new at this, my problem is that I have the kernel, busybox and u-boot
> already build for my target platform, I'm not sure what is the most
> appropriate way of creating the final ".img" file out of the files that I
> already have .

ptxdist [1] uses genimage [2]. It's available for buildroot [3], too, however 
I don't know if they actually use it.

> I need to create 2 partitions, 1 vfat/fat32 for the boot and 1 partition
> for the rootfs, the resulting 2 .img files will be burned on an eMMC using
> the software provided by the vendor, so burning it's not the issue here .

Sounds like a usual usecase for genimage.

> I would like to have a more "scriptable" alternative to using dd, mounting,
> writing and sync and then unmount the partition each time I need to create
> an img file .

Well genimage works with config files, but that should work for you.

> I'm using a linux 64 bit box .

Who doesn't? ;-)

Greets
Alex

[1] https://www.ptxdist.org/
[2] https://github.com/pengutronix/genimage
[3] https://buildroot.org/

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Re: [U-Boot] RK3399 boards (rockpi4 and rockpro64) kernel SError using upstream U-boot

2019-11-15 Thread Qu Wenruo
A small update to this bug.

I'm using mem=3584M kernel cmdline, to sacrifice 512M memory.

And then surprise, memtest 3G works. (Originally it's 4G physical ram
and 3584M memtest.

Hopes this could provide some clue.

Thanks,
Qu

On 2019/11/9 下午9:45, Jagan Teki wrote:
> On Sat, Nov 9, 2019 at 6:48 PM Qu Wenruo  wrote:
>>
>>
>>
>> On 2019/11/9 下午8:25, Jagan Teki wrote:
>>> On Sat, Nov 9, 2019 at 12:08 PM Qu Wenruo  wrote:

 Hi,

 Although recent U-boot upstream has merged the rk3399 ram patchset to
 initial DDR4 properly, but strangely I can still trigger SError for
 RockPi4 and RockPro64 boards using upstream U-boot with upstream kernel
 (v5.4-rc). The dmesg is attached at the end.

 This is pretty easy to trigger if using "memtester 3584M" (both boards
 are 4G RAM variants).
 The strange part is, if using the vendor uboot (like Armbian does), then
 the kernel SError just goes away, so it looks like a bug in Uboot.
>>>
>>> Can you check u-boot memtest, past me the result.
>>
>> Looks like rockpi4 (maybe the whole rk3399 family) doesn't define
>> CONFIG_SYS_MEMTEST_START/END, thus enabling CONFIG_CMD_MEMTEST will
>> easily break the compile.
>>
>> Or any magic number for me to try?
> 
> Better try START with ddr base, and END some 256M set for basic test.
> 
>>
>>>

 The U-boot I built follows the README.rockchip, using the SD card and
 boot option 1 (miniloader + Uboot + rkbin).
 The script build script (arch PKGBUILD) can be found here:

 https://github.com/adam900710/PKGBUILDs/blob/rockpi4/alarm/uboot-rockpi4/PKGBUILD

 Any clue for the problem?
>>>
>>> Would you check this series [1]
>>>
>>> [1] https://patchwork.ozlabs.org/cover/1183700/
>>>
>> Any git repo? I hate to apply large patchset especially when there are
>> conflicts...
> 
> Hmm.. I didn't find the repo on the cover-letter. Did you check the
> u-boot-kerveryang github, may be Kever would place these on that repo
> I think.
> 



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Re: [U-Boot] [PULL] u-boot-socfpga/master

2019-11-15 Thread Marek Vasut
On 11/15/19 10:44 AM, Simon Goldschmidt wrote:
> On Fri, Nov 15, 2019 at 10:35 AM Marek Vasut wrote:
>>
>> The following changes since commit 3ff1ff3ff76c15efe0451309af084ee6c096c583:
>>
>>   Merge branch '2019-11-12-migrate-SYS_REDUNDAND_ENVIRONMENT'
>> (2019-11-12 13:40:58 -0500)
>>
>> are available in the Git repository at:
>>
>>   git://git.denx.de/u-boot-socfpga.git master
>>
>> for you to fetch changes up to 155bf0a09b9b9538f3ef8dc244094e1a45e9e281:
>>
>>   spi: cadence_qspi: support DM_CLK (2019-11-13 15:47:08 +0100)
>>
>> 
>> Ley Foon Tan (2):
>>   arm: dts: Stratix10: Fix memory node address and size cells
>>   configs: Stratix10: Disable CONFIG_SPL_USE_TINY_PRINTF
>>
>> Simon Goldschmidt (4):
>>   ddr: socfpga: gen5: constify altera_gen5_sdram_ops
>>   socfpga: fix include guard in misc.h (arch vs. global)
>>   timer: dw-apb: add reset handling
>>   spi: cadence_qspi: support DM_CLK
> 
> Sorry to interfere here, but Vignesh had a comment on this one and I sent v3
> (what you have is v1 or v2- sorrry I wasn't aware of that).
> 
> Since Vignesh claims v3 does still not compile for k2g_evm_defconfig (although
> I cannot reproduce that error) , we should probably defer this patch
> until I have
> checked that Travis builds it correctly.

The one in u-boot-socfpga compiled fine, but OK, dropped.
Tom, ignore this PR.
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Re: [U-Boot] [PULL] u-boot-socfpga/master

2019-11-15 Thread Simon Goldschmidt
On Fri, Nov 15, 2019 at 10:35 AM Marek Vasut  wrote:
>
> The following changes since commit 3ff1ff3ff76c15efe0451309af084ee6c096c583:
>
>   Merge branch '2019-11-12-migrate-SYS_REDUNDAND_ENVIRONMENT'
> (2019-11-12 13:40:58 -0500)
>
> are available in the Git repository at:
>
>   git://git.denx.de/u-boot-socfpga.git master
>
> for you to fetch changes up to 155bf0a09b9b9538f3ef8dc244094e1a45e9e281:
>
>   spi: cadence_qspi: support DM_CLK (2019-11-13 15:47:08 +0100)
>
> 
> Ley Foon Tan (2):
>   arm: dts: Stratix10: Fix memory node address and size cells
>   configs: Stratix10: Disable CONFIG_SPL_USE_TINY_PRINTF
>
> Simon Goldschmidt (4):
>   ddr: socfpga: gen5: constify altera_gen5_sdram_ops
>   socfpga: fix include guard in misc.h (arch vs. global)
>   timer: dw-apb: add reset handling
>   spi: cadence_qspi: support DM_CLK

Sorry to interfere here, but Vignesh had a comment on this one and I sent v3
(what you have is v1 or v2- sorrry I wasn't aware of that).

Since Vignesh claims v3 does still not compile for k2g_evm_defconfig (although
I cannot reproduce that error) , we should probably defer this patch
until I have
checked that Travis builds it correctly.

Regards,
Simon

>
>  arch/arm/dts/socfpga_stratix10_socdk.dts  |  2 ++
>  arch/arm/mach-socfpga/include/mach/misc.h |  6 +++---
>  configs/socfpga_stratix10_defconfig   |  1 +
>  drivers/ddr/altera/sdram_gen5.c   |  2 +-
>  drivers/spi/cadence_qspi.c| 22 --
>  drivers/timer/dw-apb-timer.c  | 18 +-
>  6 files changed, 44 insertions(+), 7 deletions(-)
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[U-Boot] [PULL] u-boot-socfpga/master

2019-11-15 Thread Marek Vasut
The following changes since commit 3ff1ff3ff76c15efe0451309af084ee6c096c583:

  Merge branch '2019-11-12-migrate-SYS_REDUNDAND_ENVIRONMENT'
(2019-11-12 13:40:58 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 155bf0a09b9b9538f3ef8dc244094e1a45e9e281:

  spi: cadence_qspi: support DM_CLK (2019-11-13 15:47:08 +0100)


Ley Foon Tan (2):
  arm: dts: Stratix10: Fix memory node address and size cells
  configs: Stratix10: Disable CONFIG_SPL_USE_TINY_PRINTF

Simon Goldschmidt (4):
  ddr: socfpga: gen5: constify altera_gen5_sdram_ops
  socfpga: fix include guard in misc.h (arch vs. global)
  timer: dw-apb: add reset handling
  spi: cadence_qspi: support DM_CLK

 arch/arm/dts/socfpga_stratix10_socdk.dts  |  2 ++
 arch/arm/mach-socfpga/include/mach/misc.h |  6 +++---
 configs/socfpga_stratix10_defconfig   |  1 +
 drivers/ddr/altera/sdram_gen5.c   |  2 +-
 drivers/spi/cadence_qspi.c| 22 --
 drivers/timer/dw-apb-timer.c  | 18 +-
 6 files changed, 44 insertions(+), 7 deletions(-)
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[U-Boot] [PATCH v3 3/9] pci: layerscape: Suffix API names with _ls

2019-11-15 Thread Wasim Khan
Suffix layerscape fixup API names with _ls.
This is required to organize device tree fixup in common,
layerscape and layerscape_gen4 specific code.

Signed-off-by: Wasim Khan 
---
Changes in v3:None

Changes in v2:
 Updated patch subject and description based on Priyanka Jain
 review comments
 Updated NXP copyright

 drivers/pci/pcie_layerscape_fixup.c | 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/pci/pcie_layerscape_fixup.c 
b/drivers/pci/pcie_layerscape_fixup.c
index 089e031..3d23840 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2017 NXP
+ * Copyright 2017-2019 NXP
  * Copyright 2014-2015 Freescale Semiconductor, Inc.
  * Layerscape PCIe driver
  */
@@ -69,8 +69,8 @@ static void ls_pcie_lut_set_mapping(struct ls_pcie *pcie, int 
index, u32 devid,
  *  msi-map = <[devid] [phandle-to-msi-ctrl] [stream-id] [count]
  * [devid] [phandle-to-msi-ctrl] [stream-id] [count]>;
  */
-static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie,
-  u32 devid, u32 streamid)
+static void fdt_pcie_set_msi_map_entry_ls(void *blob, struct ls_pcie *pcie,
+ u32 devid, u32 streamid)
 {
u32 *prop;
u32 phandle;
@@ -122,8 +122,8 @@ static void fdt_pcie_set_msi_map_entry(void *blob, struct 
ls_pcie *pcie,
  *  iommu-map = <[devid] [phandle-to-iommu-ctrl] [stream-id] [count]
  * [devid] [phandle-to-iommu-ctrl] [stream-id] [count]>;
  */
-static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie *pcie,
-  u32 devid, u32 streamid)
+static void fdt_pcie_set_iommu_map_entry_ls(void *blob, struct ls_pcie *pcie,
+   u32 devid, u32 streamid)
 {
u32 *prop;
u32 iommu_map[4];
@@ -175,7 +175,7 @@ static void fdt_pcie_set_iommu_map_entry(void *blob, struct 
ls_pcie *pcie,
}
 }
 
-static void fdt_fixup_pcie(void *blob)
+static void fdt_fixup_pcie_ls(void *blob)
 {
struct udevice *dev, *bus;
struct ls_pcie *pcie;
@@ -209,11 +209,11 @@ static void fdt_fixup_pcie(void *blob)
ls_pcie_lut_set_mapping(pcie, index, bdf >> 8,
streamid);
/* update msi-map in device tree */
-   fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8,
-  streamid);
+   fdt_pcie_set_msi_map_entry_ls(blob, pcie, bdf >> 8,
+ streamid);
/* update iommu-map in device tree */
-   fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8,
-streamid);
+   fdt_pcie_set_iommu_map_entry_ls(blob, pcie, bdf >> 8,
+   streamid);
}
 }
 #endif
@@ -279,7 +279,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
ft_pcie_ls_setup(blob, pcie);
 
 #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
-   fdt_fixup_pcie(blob);
+   fdt_fixup_pcie_ls(blob);
 #endif
 }
 
-- 
2.7.4

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[U-Boot] [PATCH v3 8/9] pci: layerscape: device tree fixup based on SoC and Version

2019-11-15 Thread Wasim Khan
lx2160a rev1 requires layerscape_gen4 device tree fixup and
lx2160a rev2 requires layerscape device tree fixup.
Add device tree fixup for lx2160a based on SoC and Version.

Signed-off-by: Wasim Khan 
---
Changes in v3:
 Updated patch subject and description based on Priyanka Jain
 review comments

Changes in v2:
 Updated patch description based on Priyanka Jain
 review comments

 drivers/pci/pcie_layerscape_fixup.c|  1 +
 drivers/pci/pcie_layerscape_fixup_common.c | 76 ++
 drivers/pci/pcie_layerscape_fixup_common.h |  1 +
 3 files changed, 78 insertions(+)

diff --git a/drivers/pci/pcie_layerscape_fixup.c 
b/drivers/pci/pcie_layerscape_fixup.c
index b1d2470..df76048 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -208,6 +208,7 @@ static void fdt_fixup_pcie_ls(void *blob)
fdt_pcie_set_iommu_map_entry_ls(blob, pcie, bdf >> 8,
streamid);
}
+   pcie_board_fix_fdt(blob);
 }
 #endif
 
diff --git a/drivers/pci/pcie_layerscape_fixup_common.c 
b/drivers/pci/pcie_layerscape_fixup_common.c
index 3458ae8..ff8cd1f 100644
--- a/drivers/pci/pcie_layerscape_fixup_common.c
+++ b/drivers/pci/pcie_layerscape_fixup_common.c
@@ -29,6 +29,82 @@ void ft_pci_setup(void *blob, bd_t *bd)
 }
 
 #if defined(CONFIG_FSL_LAYERSCAPE)
+int lx2_board_fix_fdt(void *fdt)
+{
+   char *reg_name, *old_str, *new_str;
+   const char *reg_names;
+   int names_len, old_str_len, new_str_len, remaining_str_len;
+   struct str_map {
+   char *old_str;
+   char *new_str;
+   } reg_names_map[] = {
+   { "csr_axi_slave", "regs" },
+   { "config_axi_slave", "config" }
+   };
+   int off = -1, i;
+   u32 val;
+
+   off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie");
+   while (off != -FDT_ERR_NOTFOUND) {
+   fdt_setprop(fdt, off, "compatible", "fsl,ls2088a-pcie",
+   strlen("fsl,ls2088a-pcie") + 1);
+
+   reg_names = fdt_getprop(fdt, off, "reg-names", _len);
+   if (!reg_names)
+   continue;
+   reg_name = (char *)reg_names;
+   remaining_str_len = names_len - (reg_name - reg_names);
+   i = 0;
+   while ((i < ARRAY_SIZE(reg_names_map)) && remaining_str_len) {
+   old_str = reg_names_map[i].old_str;
+   new_str = reg_names_map[i].new_str;
+   old_str_len = strlen(old_str);
+   new_str_len = strlen(new_str);
+   if (memcmp(reg_name, old_str, old_str_len) == 0) {
+   /* first only leave required bytes for new_str
+* and copy rest of the string after it
+*/
+   memcpy(reg_name + new_str_len,
+  reg_name + old_str_len,
+  remaining_str_len - old_str_len);
+
+   /* Now copy new_str */
+   memcpy(reg_name, new_str, new_str_len);
+   names_len -= old_str_len;
+   names_len += new_str_len;
+   i++;
+   }
+
+   reg_name = memchr(reg_name, '\0', remaining_str_len);
+   if (!reg_name)
+   break;
+   reg_name += 1;
+
+   remaining_str_len = names_len - (reg_name - reg_names);
+   }
+   fdt_setprop(fdt, off, "reg-names", reg_names, names_len);
+   fdt_delprop(fdt, off, "apio-wins");
+   fdt_delprop(fdt, off, "ppio-wins");
+   val = cpu_to_fdt32(0x4);
+   fdt_setprop(fdt, off, "num-lanes", , sizeof(val));
+   off = fdt_node_offset_by_compatible(fdt, off,
+   "fsl,lx2160a-pcie");
+   }
+   return 0;
+}
+
+int pcie_board_fix_fdt(void *fdt)
+{
+   uint svr;
+
+   svr = SVR_SOC_VER(get_svr());
+
+   if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 2, 0))
+   return lx2_board_fix_fdt(fdt);
+
+   return 0;
+}
+
 #ifdef CONFIG_ARCH_LX2160A
 /* returns the next available streamid for pcie, -errno if failed */
 int pcie_next_streamid(int currentid, int idx)
diff --git a/drivers/pci/pcie_layerscape_fixup_common.h 
b/drivers/pci/pcie_layerscape_fixup_common.h
index e747396..8d95690 100644
--- a/drivers/pci/pcie_layerscape_fixup_common.h
+++ b/drivers/pci/pcie_layerscape_fixup_common.h
@@ -23,5 +23,6 @@ static void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
 #endif
 #endif /* CONFIG_FSL_LAYERSCAPE */
 int pcie_next_streamid(int currentid, int id);
+int pcie_board_fix_fdt(void *fdt);
 
 

[U-Boot] [PATCH v3 9/9] configs: lx2160a: enable CONFIG_OF_BOARD_FIXUP for SECURE_BOOT defconfig

2019-11-15 Thread Wasim Khan
lx2160a rev1 and rev2 SoC has different pcie controller.
The pcie controller device tree node fields "compatible"
and registers names needs to be updated accordingly.

Enable CONFIG_OF_BOARD_FIXUP to apply board_fix_fdt
which updates the "compatible" and registers names.

Signed-off-by: Wasim Khan 
---
Changes in v3:
 Enabled CONFIG_OF_BOARD_FIXUP for lx2160aqds_tfa_SECURE_BOOT_defconfig
 and lx2160ardb_tfa_SECURE_BOOT_defconfig

 configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 +
 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 +
 2 files changed, 2 insertions(+)

diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig 
b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index 2496ef0..89392e4 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -25,6 +25,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_OF_CONTROL=y
+CONFIG_OF_BOARD_FIXUP=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig 
b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 45ec19a..836afe1 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_OF_CONTROL=y
+CONFIG_OF_BOARD_FIXUP=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
-- 
2.7.4

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[U-Boot] [PATCH v3 7/9] pci: layerscape: Move streamId allocation to common device tree fixup

2019-11-15 Thread Wasim Khan
Move streamId allocation to layerscape common device tree fixup.
Calculate streamId based on SoC variant.

Signed-off-by: Wasim Khan 
---
Changes in v3:None

Changes in v2:None

 drivers/pci/pcie_layerscape_fixup.c| 16 
 drivers/pci/pcie_layerscape_fixup_common.c | 24 
 drivers/pci/pcie_layerscape_fixup_common.h |  1 +
 drivers/pci/pcie_layerscape_gen4_fixup.c   | 18 --
 4 files changed, 33 insertions(+), 26 deletions(-)

diff --git a/drivers/pci/pcie_layerscape_fixup.c 
b/drivers/pci/pcie_layerscape_fixup.c
index 7635df7..b1d2470 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -31,17 +31,6 @@ static int ls_pcie_next_lut_index(struct ls_pcie *pcie)
return -ENOSPC;  /* LUT is full */
 }
 
-/* returns the next available streamid for pcie, -errno if failed */
-static int ls_pcie_next_streamid(void)
-{
-   static int next_stream_id = FSL_PEX_STREAM_ID_START;
-
-   if (next_stream_id > FSL_PEX_STREAM_ID_END)
-   return -EINVAL;
-
-   return next_stream_id++;
-}
-
 static void lut_writel(struct ls_pcie *pcie, unsigned int value,
   unsigned int offset)
 {
@@ -192,10 +181,13 @@ static void fdt_fixup_pcie_ls(void *blob)
bus = bus->parent;
pcie = dev_get_priv(bus);
 
-   streamid = ls_pcie_next_streamid();
+   streamid = pcie_next_streamid(pcie->stream_id_cur, pcie->idx);
+
if (streamid < 0) {
debug("ERROR: no stream ids free\n");
continue;
+   } else {
+   pcie->stream_id_cur++;
}
 
index = ls_pcie_next_lut_index(pcie);
diff --git a/drivers/pci/pcie_layerscape_fixup_common.c 
b/drivers/pci/pcie_layerscape_fixup_common.c
index b953952..3458ae8 100644
--- a/drivers/pci/pcie_layerscape_fixup_common.c
+++ b/drivers/pci/pcie_layerscape_fixup_common.c
@@ -27,3 +27,27 @@ void ft_pci_setup(void *blob, bd_t *bd)
ft_pci_setup_ls(blob, bd);
 #endif /* CONFIG_FSL_LAYERSCAPE */
 }
+
+#if defined(CONFIG_FSL_LAYERSCAPE)
+#ifdef CONFIG_ARCH_LX2160A
+/* returns the next available streamid for pcie, -errno if failed */
+int pcie_next_streamid(int currentid, int idx)
+{
+   if (currentid > FSL_PEX_STREAM_ID_END)
+   return -EINVAL;
+
+   return currentid | ((idx + 1) << 11);
+}
+#else
+/* returns the next available streamid for pcie, -errno if failed */
+int pcie_next_streamid(int currentid, int idx)
+{
+   static int next_stream_id = FSL_PEX_STREAM_ID_START;
+
+   if (next_stream_id > FSL_PEX_STREAM_ID_END)
+   return -EINVAL;
+
+   return next_stream_id++;
+}
+#endif
+#endif /* CONFIG_FSL_LAYERSCAPE */
diff --git a/drivers/pci/pcie_layerscape_fixup_common.h 
b/drivers/pci/pcie_layerscape_fixup_common.h
index 5640406..e747396 100644
--- a/drivers/pci/pcie_layerscape_fixup_common.h
+++ b/drivers/pci/pcie_layerscape_fixup_common.h
@@ -22,5 +22,6 @@ static void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
 }
 #endif
 #endif /* CONFIG_FSL_LAYERSCAPE */
+int pcie_next_streamid(int currentid, int id);
 
 #endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_
diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c 
b/drivers/pci/pcie_layerscape_gen4_fixup.c
index 480d242..28cfc9a 100644
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -33,19 +33,6 @@ static int ls_pcie_g4_next_lut_index(struct ls_pcie_g4 *pcie)
return -ENOSPC;  /* LUT is full */
 }
 
-/* returns the next available streamid for pcie, -errno if failed */
-static int ls_pcie_g4_next_streamid(struct ls_pcie_g4 *pcie)
-{
-   int stream_id = pcie->stream_id_cur;
-
-   if (stream_id > FSL_PEX_STREAM_ID_END)
-   return -EINVAL;
-
-   pcie->stream_id_cur++;
-
-   return stream_id | ((pcie->idx + 1) << 11);
-}
-
 /*
  * Program a single LUT entry
  */
@@ -162,10 +149,13 @@ static void fdt_fixup_pcie_ls_gen4(void *blob)
bus = bus->parent;
pcie = dev_get_priv(bus);
 
-   streamid = ls_pcie_g4_next_streamid(pcie);
+   streamid = pcie_next_streamid(pcie->stream_id_cur, pcie->idx);
+
if (streamid < 0) {
debug("ERROR: no stream ids free\n");
continue;
+   } else {
+   pcie->stream_id_cur++;
}
 
index = ls_pcie_g4_next_lut_index(pcie);
-- 
2.7.4

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[U-Boot] [PATCH v3 4/9] pci: layerscape_gen4: Suffix API names with _ls_gen4

2019-11-15 Thread Wasim Khan
Update API names for layerscape gen4 fixup.
Suffix layerscape_gen4 fixup API names with _ls_gen4.
This is required to organize device tree fixup in common, layerscape
and layerscape_gen4 specific code.

Signed-off-by: Wasim Khan 
---
Changes in v3:None

Changes in v2:
 Updated patch subject and description based on Priyanka Jain
 review comments
---
 drivers/pci/pcie_layerscape_gen4_fixup.c | 20 
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c 
b/drivers/pci/pcie_layerscape_gen4_fixup.c
index 1c9e575..fe478db 100644
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -64,8 +64,9 @@ static void ls_pcie_g4_lut_set_mapping(struct ls_pcie_g4 
*pcie, int index,
  *  msi-map = <[devid] [phandle-to-msi-ctrl] [stream-id] [count]
  * [devid] [phandle-to-msi-ctrl] [stream-id] [count]>;
  */
-static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie_g4 *pcie,
-  u32 devid, u32 streamid)
+static void fdt_pcie_set_msi_map_entry_ls_gen4(void *blob,
+  struct ls_pcie_g4 *pcie,
+  u32 devid, u32 streamid)
 {
u32 *prop;
u32 phandle;
@@ -106,8 +107,9 @@ static void fdt_pcie_set_msi_map_entry(void *blob, struct 
ls_pcie_g4 *pcie,
  *  iommu-map = <[devid] [phandle-to-iommu-ctrl] [stream-id] [count]
  * [devid] [phandle-to-iommu-ctrl] [stream-id] [count]>;
  */
-static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie_g4 *pcie,
-u32 devid, u32 streamid)
+static void fdt_pcie_set_iommu_map_entry_ls_gen4(void *blob,
+struct ls_pcie_g4 *pcie,
+u32 devid, u32 streamid)
 {
u32 *prop;
u32 iommu_map[4];
@@ -145,7 +147,7 @@ static void fdt_pcie_set_iommu_map_entry(void *blob, struct 
ls_pcie_g4 *pcie,
fdt_appendprop(blob, nodeoff, "iommu-map", iommu_map, 16);
 }
 
-static void fdt_fixup_pcie(void *blob)
+static void fdt_fixup_pcie_ls_gen4(void *blob)
 {
struct udevice *dev, *bus;
struct ls_pcie_g4 *pcie;
@@ -176,9 +178,11 @@ static void fdt_fixup_pcie(void *blob)
/* map PCI b.d.f to streamID in LUT */
ls_pcie_g4_lut_set_mapping(pcie, index, bdf >> 8, streamid);
/* update msi-map in device tree */
-   fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8, streamid);
+   fdt_pcie_set_msi_map_entry_ls_gen4(blob, pcie, bdf >> 8,
+  streamid);
/* update iommu-map in device tree */
-   fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8, streamid);
+   fdt_pcie_set_iommu_map_entry_ls_gen4(blob, pcie, bdf >> 8,
+streamid);
}
 }
 #endif
@@ -238,7 +242,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
ft_pcie_layerscape_gen4_setup(blob, pcie);
 
 #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
-   fdt_fixup_pcie(blob);
+   fdt_fixup_pcie_ls_gen4(blob);
 #endif
 }
 
-- 
2.7.4

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[U-Boot] [PATCH v3 6/9] pci: layerscape: Common device tree fixup for NXP SoCs

2019-11-15 Thread Wasim Khan
Add Common device tree fixup for NXP SoCs. Based on
SoC and revision call pcie_layerscape or pcie_layerscape_gen4
fixup.

Signed-off-by: Wasim Khan 
---
Changes in v3:
 fix compilation errors with lx2160aqds_tfa_SECURE_BOOT_defconfig
 and lx2160ardb_tfa_SECURE_BOOT_defconfig

Changes in v2
 Ported changes to latest codebase

 configs/lx2160aqds_tfa_SECURE_BOOT_defconfig |  1 +
 configs/lx2160aqds_tfa_defconfig |  1 +
 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig |  1 +
 configs/lx2160ardb_tfa_defconfig |  1 +
 drivers/pci/Makefile |  5 +++--
 drivers/pci/pcie_layerscape_fixup.c  |  5 +++--
 drivers/pci/pcie_layerscape_fixup_common.c   | 29 
 drivers/pci/pcie_layerscape_fixup_common.h   | 26 +
 drivers/pci/pcie_layerscape_gen4_fixup.c |  5 +++--
 9 files changed, 68 insertions(+), 6 deletions(-)
 create mode 100644 drivers/pci/pcie_layerscape_fixup_common.c
 create mode 100644 drivers/pci/pcie_layerscape_fixup_common.h

diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig 
b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index 3d4506b..2496ef0 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -54,6 +54,7 @@ CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE_GEN4=y
+CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_DM_SCSI=y
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index ef774af..9d761d4 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -55,6 +55,7 @@ CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE_GEN4=y
+CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_DM_SCSI=y
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig 
b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index ede4e0f..45ec19a 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -50,6 +50,7 @@ CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE_GEN4=y
+CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_DM_SCSI=y
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index 1ad4ad7..0cf1f07 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -54,6 +54,7 @@ CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_LAYERSCAPE_GEN4=y
+CONFIG_PCIE_LAYERSCAPE=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_PCF2127=y
 CONFIG_DM_SCSI=y
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index d6a9b8c..c044704 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -33,9 +33,10 @@ obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o
 obj-$(CONFIG_PCIE_DW_MVEBU) += pcie_dw_mvebu.o
 obj-$(CONFIG_PCIE_FSL) += pcie_fsl.o pcie_fsl_fixup.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o
-obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o
+obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o 
pcie_layerscape_fixup_common.o
 obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie_layerscape_gen4.o \
-   pcie_layerscape_gen4_fixup.o pcie_layerscape.o
+   pcie_layerscape_gen4_fixup.o \
+   pcie_layerscape_fixup_common.o
 obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
 obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
 obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o
diff --git a/drivers/pci/pcie_layerscape_fixup.c 
b/drivers/pci/pcie_layerscape_fixup.c
index 3d23840..7635df7 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -17,6 +17,7 @@
 #include 
 #endif
 #include "pcie_layerscape.h"
+#include "pcie_layerscape_fixup_common.h"
 
 #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
 /*
@@ -271,7 +272,7 @@ static void ft_pcie_ls_setup(void *blob, struct ls_pcie 
*pcie)
 }
 
 /* Fixup Kernel DT for PCIe */
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup_ls(void *blob, bd_t *bd)
 {
struct ls_pcie *pcie;
 
@@ -284,7 +285,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
 }
 
 #else /* !CONFIG_OF_BOARD_SETUP */
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup_ls(void *blob, bd_t *bd)
 {
 }
 #endif
diff --git a/drivers/pci/pcie_layerscape_fixup_common.c 
b/drivers/pci/pcie_layerscape_fixup_common.c
new file mode 100644
index 000..b953952
--- /dev/null
+++ b/drivers/pci/pcie_layerscape_fixup_common.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ *
+ * PCIe DT fixup for NXP Layerscape SoCs
+ * Author: Wasim Khan 
+ *
+ */
+
+#include 
+#include 
+#include 
+#include "pcie_layerscape_fixup_common.h"
+
+void ft_pci_setup(void *blob, bd_t *bd)
+{
+#if defined(CONFIG_FSL_LAYERSCAPE)
+   uint svr;
+
+   svr = SVR_SOC_VER(get_svr());
+
+   if (svr == SVR_LX2160A 

[U-Boot] [PATCH v3 5/9] armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160A

2019-11-15 Thread Wasim Khan
Add FSL_PEX_STREAM_ID_END and remove FSL_PEX_STREAM_ID_NUM
for lx2160a.

Signed-off-by: Wasim Khan 
---
Changes in v3:None

Changes in v2:
 Revomed user of FSL_PEX_STREAM_ID_NUM macro

 arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h | 8 +++-
 drivers/pci/pcie_layerscape_gen4_fixup.c   | 2 +-
 2 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h 
b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
index 93bdcc4..e518fa2 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2015-2018 NXP
+ * Copyright 2015-2019 NXP
  * Copyright 2014 Freescale Semiconductor, Inc.
  *
  */
@@ -83,14 +83,12 @@
 /* PCI - programmed in PEXn_LUT */
 #define FSL_PEX_STREAM_ID_START7
 
-#ifdef CONFIG_ARCH_LX2160A
-#define FSL_PEX_STREAM_ID_NUM  (0x100)
-#endif
-
 #if defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1028A)
 #define FSL_PEX_STREAM_ID_END  22
 #elif defined(CONFIG_ARCH_LS1088A)
 #define FSL_PEX_STREAM_ID_END  18
+#elif defined(CONFIG_ARCH_LX2160A)
+#define FSL_PEX_STREAM_ID_END  (0x100)
 #endif
 
 
diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c 
b/drivers/pci/pcie_layerscape_gen4_fixup.c
index fe478db..b58ddd5 100644
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -37,7 +37,7 @@ static int ls_pcie_g4_next_streamid(struct ls_pcie_g4 *pcie)
 {
int stream_id = pcie->stream_id_cur;
 
-   if (stream_id > FSL_PEX_STREAM_ID_NUM)
+   if (stream_id > FSL_PEX_STREAM_ID_END)
return -EINVAL;
 
pcie->stream_id_cur++;
-- 
2.7.4

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[U-Boot] [PATCH v3 2/9] pci: layerscape: Add stream_id_cur field to ls_pcie structure

2019-11-15 Thread Wasim Khan
Add stream_id_cur field to ls_pcie structure and initialize
it with 0 for all pcie controllers. This field will be used
for streamId calculation.

Signed-off-by: Wasim Khan 
---
Changes in v3:None

Changes in v2:
 Updated copyright

 drivers/pci/pcie_layerscape.c | 3 ++-
 drivers/pci/pcie_layerscape.h | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c
index db1375a..232479d 100644
--- a/drivers/pci/pcie_layerscape.c
+++ b/drivers/pci/pcie_layerscape.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2017 NXP
+ * Copyright 2017-2019 NXP
  * Copyright 2014-2015 Freescale Semiconductor, Inc.
  * Layerscape PCIe driver
  */
@@ -339,6 +339,7 @@ static void ls_pcie_setup_ctrl(struct ls_pcie *pcie)
dbi_writel(pcie, 0, PCIE_DBI_RO_WR_EN);
 
ls_pcie_disable_bars(pcie);
+   pcie->stream_id_cur = 0;
 }
 
 static void ls_pcie_ep_setup_atu(struct ls_pcie *pcie)
diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h
index ddfbba6..95454bc 100644
--- a/drivers/pci/pcie_layerscape.h
+++ b/drivers/pci/pcie_layerscape.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2017 NXP
+ * Copyright 2017-2019 NXP
  * Copyright 2014-2015 Freescale Semiconductor, Inc.
  * Layerscape PCIe driver
  */
@@ -144,6 +144,7 @@ struct ls_pcie {
bool big_endian;
bool enabled;
int next_lut_index;
+   int stream_id_cur;
int mode;
 };
 
-- 
2.7.4

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[U-Boot] [PATCH v3 1/9] drivers/pci : enable pcie_layerscape code for lx2160a rev2

2019-11-15 Thread Wasim Khan
lx2160a rev1 uses pcie_layerscape_gen4 driver and lx2160a rev2 uses
pcie_layerscape driver.
Enable pcie_layerscape code for CONFIG_PCIE_LAYERSCAPE_GEN4.
Based on SoC and revision pcie controller probe will be invoked.

Signed-off-by: Wasim Khan 
---
Changes in v3:
 Updated patch subject and description based on Priyanka Jain
 review comments

Changes in v2:
 Updated patch subject and description based on Priyanka Jain
 review comments

 drivers/pci/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index b1d3dc8..d6a9b8c 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -35,7 +35,7 @@ obj-$(CONFIG_PCIE_FSL) += pcie_fsl.o pcie_fsl_fixup.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o
 obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o
 obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie_layerscape_gen4.o \
-   pcie_layerscape_gen4_fixup.o
+   pcie_layerscape_gen4_fixup.o pcie_layerscape.o
 obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o
 obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
 obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o
-- 
2.7.4

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[U-Boot] [PATCH v3 0/9] Enablement of PCIe controller for lx2160a rev2

2019-11-15 Thread Wasim Khan
lx2160a rev1 PCIe controller uses pcie_layerscape_gen4 driver and 
lx2160a rev2 PCIe controller uses pcie_layerscape driver.

This patch set enables support for lx2160a rev2 and uses pcie_layerscape
or pcie_layerscape_gen4 driver based on SoC.
Also organize the device tree fixup in common, layerscape
and layerscape_gen4 specific code.

Changes in v3:
 1-Updated patch subject and description based on Priyanka Jain
 review comments
 2-fix compilation errors with lx2160aqds_tfa_SECURE_BOOT_defconfig
 and lx2160ardb_tfa_SECURE_BOOT_defconfig
 3-Enabled CONFIG_OF_BOARD_FIXUP for lx2160aqds_tfa_SECURE_BOOT_defconfig
 and lx2160ardb_tfa_SECURE_BOOT_defconfig

Changes in v2:
 Updated patch subject and description based on Priyanka Jain
 review comments

Wasim Khan (9):
  drivers/pci : enable pcie_layerscape code for lx2160a rev2
  pci: layerscape: Add stream_id_cur field to ls_pcie structure
  pci: layerscape: Suffix API names with _ls
  pci: layerscape_gen4: Suffix API names with _ls_gen4
  armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160A
  pci: layerscape: Common device tree fixup for NXP SoCs
  pci: layerscape: Move streamId allocation to common device tree fixup
  pci: layerscape: device tree fixup based on SoC and Version
  configs: lx2160a: enable CONFIG_OF_BOARD_FIXUP for SECURE_BOOT
defconfig

 .../asm/arch-fsl-layerscape/stream_id_lsch3.h  |   8 +-
 configs/lx2160aqds_tfa_SECURE_BOOT_defconfig   |   2 +
 configs/lx2160aqds_tfa_defconfig   |   1 +
 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig   |   2 +
 configs/lx2160ardb_tfa_defconfig   |   1 +
 drivers/pci/Makefile   |   5 +-
 drivers/pci/pcie_layerscape.c  |   3 +-
 drivers/pci/pcie_layerscape.h  |   3 +-
 drivers/pci/pcie_layerscape_fixup.c|  44 +++
 drivers/pci/pcie_layerscape_fixup_common.c | 129 +
 drivers/pci/pcie_layerscape_fixup_common.h |  28 +
 drivers/pci/pcie_layerscape_gen4_fixup.c   |  43 +++
 12 files changed, 211 insertions(+), 58 deletions(-)
 create mode 100644 drivers/pci/pcie_layerscape_fixup_common.c
 create mode 100644 drivers/pci/pcie_layerscape_fixup_common.h

-- 
2.7.4

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[U-Boot] [PATCH] zynq: Add jtag distro boot support

2019-11-15 Thread Michal Simek
From: T Karthik Reddy 

This patch adds new jtag distro boot command to look for bootscript
file in DDR and execute it first incase of jtag bootmode.

Signed-off-by: T Karthik Reddy 
Signed-off-by: Michal Simek 
---

 board/xilinx/zynq/board.c | 2 +-
 include/configs/zynq-common.h | 9 +
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 8a216ed619bf..e0970ac30b3d 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -49,7 +49,7 @@ int board_late_init(void)
env_set("modeboot", "sdboot");
break;
case ZYNQ_BM_JTAG:
-   mode = "pxe dhcp";
+   mode = "jtag pxe dhcp";
env_set("modeboot", "jtagboot");
break;
default:
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 23093bd7ca70..7006ccb83963 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -176,7 +176,16 @@
 #define BOOTENV_DEV_NAME_NOR(devtypeu, devtypel, instance) \
"nor "
 
+#define BOOT_TARGET_DEVICES_JTAG(func)  func(JTAG, jtag, na)
+
+#define BOOTENV_DEV_JTAG(devtypeu, devtypel, instance) \
+   "bootcmd_jtag=source $scriptaddr; echo SCRIPT FAILED: continuing...;\0"
+
+#define BOOTENV_DEV_NAME_JTAG(devtypeu, devtypel, instance) \
+   "jtag "
+
 #define BOOT_TARGET_DEVICES(func) \
+   BOOT_TARGET_DEVICES_JTAG(func) \
BOOT_TARGET_DEVICES_MMC(func) \
BOOT_TARGET_DEVICES_QSPI(func) \
BOOT_TARGET_DEVICES_NAND(func) \
-- 
2.17.1

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[U-Boot] [PATCH] drivers: pci: layerscape: Add EP compatible as CONFIG

2019-11-15 Thread Pankaj Bansal
The ep node device tree name is governed by these bindings:
https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/pci/layerscape-pci.txt#L24

As per above the ep compatible node contains platform name.
Therefore, define the ep node compatible as CONFIG of type string
with default value independent of SOC name.
This CONFIG can be asssigned correct value platform defconfig file.

Signed-off-by: Pankaj Bansal 
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 9 +
 drivers/pci/pcie_layerscape_fixup.c   | 4 ++--
 drivers/pci/pcie_layerscape_gen4_fixup.c  | 2 +-
 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index f1578b10bc..7a182263d1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -266,6 +266,15 @@ config FSL_PCIE_COMPAT
  This compatible is used to find pci controller node in Kernel DT
  to complete fixup.
 
+config FSL_PCIE_EP_COMPAT
+   string "PCIe EP compatible of Kernel DT"
+   depends on PCIE_LAYERSCAPE || PCIE_LAYERSCAPE_GEN4
+   default "fsl,lx2160a-pcie-ep" if ARCH_LX2160A
+   default "fsl,ls-pcie-ep"
+   help
+ This compatible is used to find pci controller ep node in Kernel DT
+ to complete fixup.
+
 config HAS_FEATURE_GIC64K_ALIGN
bool
default y if ARCH_LS1043A
diff --git a/drivers/pci/pcie_layerscape_fixup.c 
b/drivers/pci/pcie_layerscape_fixup.c
index 089e031724..194010f310 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2017 NXP
+ * Copyright 2017-2019 NXP
  * Copyright 2014-2015 Freescale Semiconductor, Inc.
  * Layerscape PCIe driver
  */
@@ -253,7 +253,7 @@ static void ft_pcie_ep_fix(void *blob, struct ls_pcie *pcie)
 {
int off;
 
-   off = fdt_node_offset_by_compat_reg(blob, "fsl,ls-pcie-ep",
+   off = fdt_node_offset_by_compat_reg(blob, CONFIG_FSL_PCIE_EP_COMPAT,
pcie->dbi_res.start);
if (off < 0)
return;
diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c 
b/drivers/pci/pcie_layerscape_gen4_fixup.c
index 1c9e5750bd..91e68eb84c 100644
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -187,7 +187,7 @@ static void ft_pcie_ep_layerscape_gen4_fix(void *blob, 
struct ls_pcie_g4 *pcie)
 {
int off;
 
-   off = fdt_node_offset_by_compat_reg(blob, "fsl,lx2160a-pcie-ep",
+   off = fdt_node_offset_by_compat_reg(blob, CONFIG_FSL_PCIE_EP_COMPAT,
pcie->ccsr_res.start);
 
if (off < 0) {
-- 
2.17.1

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[U-Boot] [PATCH] bootm: vxworks: Support Linux compatible standard DTB for ARM and PPC

2019-11-15 Thread Bin Meng
From: Lihua Zhao 

Enhance do_bootm_vxworks() to support Linux compatible standard DTB
for ARM and PPC, when the least significant bit of flags in VxWorks
bootargs is set. Otherwise it falls back to the existing bootm flow
which is now legacy.

Signed-off-by: Lihua Zhao 
Signed-off-by: Bin Meng 
Reviewed-by: Bin Meng 
---

 common/bootm_os.c  | 39 +--
 doc/README.vxworks | 13 +
 include/vxworks.h  |  3 +++
 3 files changed, 53 insertions(+), 2 deletions(-)

diff --git a/common/bootm_os.c b/common/bootm_os.c
index 6fb7d65..6c2d4e2 100644
--- a/common/bootm_os.c
+++ b/common/bootm_os.c
@@ -318,8 +318,8 @@ static void do_bootvx_fdt(bootm_headers_t *images)
puts("## vxWorks terminated\n");
 }
 
-int do_bootm_vxworks(int flag, int argc, char * const argv[],
-bootm_headers_t *images)
+static int do_bootm_vxworks_legacy(int flag, int argc, char * const argv[],
+  bootm_headers_t *images)
 {
if (flag != BOOTM_STATE_OS_GO)
return 0;
@@ -335,6 +335,41 @@ int do_bootm_vxworks(int flag, int argc, char * const 
argv[],
 
return 1;
 }
+
+int do_bootm_vxworks(int flag, int argc, char * const argv[],
+bootm_headers_t *images)
+{
+   char *bootargs;
+   int pos;
+   unsigned long vxflags;
+   bool std_dtb = false;
+
+   /* get bootargs env */
+   bootargs = env_get("bootargs");
+
+   if (bootargs != NULL) {
+   for (pos = 0; pos < strlen(bootargs); pos++) {
+   /* find f=0xnumber flag */
+   if ((bootargs[pos] == '=') && (pos >= 1) &&
+   (bootargs[pos - 1] == 'f')) {
+   vxflags = simple_strtoul([pos + 1],
+NULL, 16);
+   if (vxflags & VXWORKS_SYSFLG_STD_DTB)
+   std_dtb = true;
+   }
+   }
+   }
+
+   if (std_dtb) {
+   if (flag & BOOTM_STATE_OS_PREP)
+   printf("   Using standard DTB\n");
+   return do_bootm_linux(flag, argc, argv, images);
+   } else {
+   if (flag & BOOTM_STATE_OS_PREP)
+   printf("   !!! WARNING !!! Using legacy DTB\n");
+   return do_bootm_vxworks_legacy(flag, argc, argv, images);
+   }
+}
 #endif
 
 #if defined(CONFIG_CMD_ELF)
diff --git a/doc/README.vxworks b/doc/README.vxworks
index 3e08711..12a0d74 100644
--- a/doc/README.vxworks
+++ b/doc/README.vxworks
@@ -2,6 +2,7 @@
 #
 # Copyright (C) 2013, Miao Yan 
 # Copyright (C) 2015-2018, Bin Meng 
+# Copyright (C) 2019, Lihua Zhao 
 
 VxWorks Support
 ===
@@ -24,6 +25,15 @@ From VxWorks 7, VxWorks starts adopting device tree as its 
hardware description
 mechanism (for PowerPC and ARM), thus requiring boot interface changes.
 This section will describe the new interface.
 
+Since VxWorks 7 SR0640 release, VxWorks starts using Linux compatible standard
+DTB for some boards. With that, the exact same bootm flow as used by Linux is
+used, which includes board-specific DTB fix up. To keep backward compatibility,
+only when the least significant bit of flags in bootargs is set, the standard
+DTB will be used. Otherwise it falls back to the legacy bootm flow.
+
+For legacy bootm flow, make sure the least significant bit of flags in bootargs
+is cleared. The calling convention is described below:
+
 For PowerPC, the calling convention of the new VxWorks entry point conforms to
 the ePAPR standard, which is shown below (see ePAPR for more details):
 
@@ -33,6 +43,9 @@ For ARM, the calling convention is shown below:
 
 void (*kernel_entry)(void *fdt_addr)
 
+When using the Linux compatible standard DTB, the calling convention of VxWorks
+entry point is exactly the same as the Linux kernel.
+
 When booting a VxWorks 7 kernel (uImage format), the parameters passed to bootm
 is like below:
 
diff --git a/include/vxworks.h b/include/vxworks.h
index 1a29509..d90d862 100644
--- a/include/vxworks.h
+++ b/include/vxworks.h
@@ -9,6 +9,9 @@
 
 #include 
 
+/* Use Linux compatible standard DTB */
+#define VXWORKS_SYSFLG_STD_DTB 0x1
+
 /*
  * Physical address of memory base for VxWorks x86
  * This is LOCAL_MEM_LOCAL_ADRS in the VxWorks kernel configuration.
-- 
2.7.4

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