Re: [U-Boot] [PATCH v3 060/108] x86: fsp: Allow remembering the location of FSP-S
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote: > > FSP-S is used by the notify call after it has been used for silicon init. > To avoid having to load it again, add a field to store the location. > > Signed-off-by: Simon Glass > --- > > Changes in v3: None > Changes in v2: None > > arch/x86/include/asm/global_data.h | 3 +++ > 1 file changed, 3 insertions(+) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 058/108] x86: fsp: Set up an MTRR for the graphics frame buffer
Hi Simon, On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote: > > The FSP-S may do this but at least for coral it does not. Set this up so This is confusing. Is this bug of the FSP-S on ApolloLake, or the FSP v2 spec does not say anything about it? Guess we need some clarification :) > that graphics is not deathly slow. > > Signed-off-by: Simon Glass > --- > > Changes in v3: None > Changes in v2: None > > arch/x86/lib/fsp/fsp_graphics.c | 4 > 1 file changed, 4 insertions(+) > Reviewed-by: Bin Meng Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 059/108] x86: fsp: Add a new arch_fsp_init_r() hook
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote: > > With FSP2 we need to run silicon init early after relocation. Add a new > hook for this. > > Signed-off-by: Simon Glass > --- > > Changes in v3: None > Changes in v2: None > > common/board_r.c | 3 +++ > include/init.h | 11 +++ > 2 files changed, 14 insertions(+) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 057/108] x86: fsp: Add FSP2 base support
Hi Simon, On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote: > > Add support for some important configuration options and FSP memory init. > The memory init uses swizzle tables from the device tree. > > Support for the FSP_S binary is also included. > > Bootstage timing is used for both FSP_M and FSP_M and memory-mapped SPI FSP_T and FSP_M ? > reads. > > Signed-off-by: Simon Glass > --- > > Changes in v3: > - Add a proper implementation of fsp_notify > - Add an fsp: tag > - Add bootstage timing for memory-mapped reads > - Add fsp_locate_fsp to locate an fsp component > - Add fspm_done() hook > - Add support for FSP-S component and VBT > - Simplify types for fsp_locate_fsp() > - Switch mmap to use SPI instead of SPI flash > > Changes in v2: None > > arch/x86/Kconfig | 61 - > arch/x86/include/asm/fsp2/fsp_api.h | 60 + > arch/x86/include/asm/fsp2/fsp_internal.h | 97 ++ > arch/x86/lib/fsp2/Makefile | 10 ++ > arch/x86/lib/fsp2/fsp_common.c | 13 ++ > arch/x86/lib/fsp2/fsp_dram.c | 77 +++ > arch/x86/lib/fsp2/fsp_init.c | 157 +++ > arch/x86/lib/fsp2/fsp_meminit.c | 97 ++ > arch/x86/lib/fsp2/fsp_silicon_init.c | 52 > arch/x86/lib/fsp2/fsp_support.c | 129 +++ > include/bootstage.h | 3 + > 11 files changed, 754 insertions(+), 2 deletions(-) > create mode 100644 arch/x86/include/asm/fsp2/fsp_api.h > create mode 100644 arch/x86/include/asm/fsp2/fsp_internal.h > create mode 100644 arch/x86/lib/fsp2/Makefile > create mode 100644 arch/x86/lib/fsp2/fsp_common.c > create mode 100644 arch/x86/lib/fsp2/fsp_dram.c > create mode 100644 arch/x86/lib/fsp2/fsp_init.c > create mode 100644 arch/x86/lib/fsp2/fsp_meminit.c > create mode 100644 arch/x86/lib/fsp2/fsp_silicon_init.c > create mode 100644 arch/x86/lib/fsp2/fsp_support.c > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > index 17a6fe6d3d9..cbd3fc4f581 100644 > --- a/arch/x86/Kconfig > +++ b/arch/x86/Kconfig > @@ -326,7 +326,7 @@ config X86_RAMTEST > > config FLASH_DESCRIPTOR_FILE > string "Flash descriptor binary filename" > - depends on HAVE_INTEL_ME > + depends on HAVE_INTEL_ME || FSP_VERSION2 > default "descriptor.bin" > help > The filename of the file to use as flash descriptor in the > @@ -411,6 +411,63 @@ config FSP_ADDR > The default base address of 0xfffc indicates that the binary > must > be located at offset 0xc from the beginning of a 1MB flash > device. > > +if FSP_VERSION2 > + > +config FSP_FILE_T > + string "Firmware-Support-Package binary filename (Temp RAM)" > + default "fsp_t.bin" > + help > + The filename of the file to use for the temporary-RAM init phase > from > + the Firmware-Support-Package binary. Put this in the board > directory. > + It is used to set up an initial area of RAM which can be used for > the > + stack and other purposes, while bringing up the main system DRAM. > + > +config FSP_ADDR_T > + hex "Firmware-Support-Package binary location (Temp RAM)" > + default 0x8000 > + help > + FSP is not Position-Independent Code (PIC) and FSP components have > to > + be rebased if placed at a location which is different from the > + perferred base address specified during the FSP build. Use Intel's > + Binary Configuration Tool (BCT) to do the rebase. > + > +config FSP_FILE_M > + string "Firmware-Support-Package binary filename (Memory Init)" > + default "fsp_m.bin" > + help > + The filename of the file to use for the RAM init phase from the > + Firmware Support Package binary. Put this in the board directory. > + It is used to set up the main system DRAM and runs in SPL, once > + temporary RAM (CAR) is working. > + > +config FSP_FILE_S > + string "Firmware-Support-Package binary filename (Silicon Init)" > + default "fsp_s.bin" > + help > + The filename of the file to use for the Silicon init phase from the > + Firmware Support Package binary. Put this in the board directory. > + It is used to set up the silicon to work correctly and must be > + executed after DRAM is running. > + > +config FSP_FILE_VBT There is already a VBT_FILE config option for this. > + string "Firmware-Support-Package Video BIOS Table (VBT)" > + default "vbt.bin" > + help > + The filename of the file to use for the video data needd by the > + Silicon init phase from the Firmware Support Package binary. Put > this > + in the board directory. It is used to set up the video parameters so > + that the display can be used. > + > +config IFWI_INPUT_FILE > + string "Filename containing FIT
Re: [U-Boot] [PATCH v3 056/108] x86: fsp: Correct wrong header inlude in fsp_support.c
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote: > > This generic FSP file should include the generic FSP support header, not > the FSP1 version. Fix it. > > Signed-off-by: Simon Glass > --- > > Changes in v3: None > Changes in v2: None > > arch/x86/lib/fsp/fsp_support.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] rockchip: tinker: Add automatic board discovery
Hi Kever
On Tue, Nov 19, 2019 at 1:40 AM Kever Yang wrote:
>
>
> On 2019/11/17 下午6:17, Michael Trimarchi wrote:
> > Add a way to detect board id and pcb id.
>
>
> Is there a document for this from vendor? Are they also use these two ids?
>
> If we can detect tinker vs tinker-s, then we don't need two board
> config/dts, right?
>
I'm working to test on some tinker board. I was having only tinker-s.
I prefer to have
both board support and then clean-up after I'm sure
> >
> > Signed-off-by: Michael Trimarchi
> > ---
> > arch/arm/dts/rk3288-tinker.dtsi | 33
> > board/rockchip/tinker_rk3288/tinker-rk3288.c | 83
> > 2 files changed, 116 insertions(+)
> >
> > diff --git a/arch/arm/dts/rk3288-tinker.dtsi
> > b/arch/arm/dts/rk3288-tinker.dtsi
> > index 2f816af47f..67a0374050 100644
> > --- a/arch/arm/dts/rk3288-tinker.dtsi
> > +++ b/arch/arm/dts/rk3288-tinker.dtsi
> > @@ -53,6 +53,21 @@
> > #clock-cells = <0>;
> > };
> >
> > + board_info: board-info {
> > + tinker,pcbid0 = < 8 GPIO_ACTIVE_HIGH>;
> > + tinker,pcbid1 = < 9 GPIO_ACTIVE_HIGH>;
> > + tinker,pcbid2 = < 10 GPIO_ACTIVE_HIGH>;
> > + tinker,pid0 = < 1 GPIO_ACTIVE_HIGH>;
> > + tinker,pid1 = < 2 GPIO_ACTIVE_HIGH>;
> > + tinker,pid2 = < 3 GPIO_ACTIVE_HIGH>;
> > + };
> > +
> > + board_control: board-control {
> > + tinker,sdp = < 5 GPIO_ACTIVE_HIGH>;
> > + tinker,usblimit = < 6 GPIO_ACTIVE_HIGH>;
> > + tinker,maskemmc = < 7 GPIO_ACTIVE_HIGH>;
>
> These three pin looks like not related to board detect?
>
I take from debian_uboot. I'm going to manage those pins and drop from
this patch
Michael
>
> Thanks,
>
> - Kever
>
> > + };
> > +
> > gpio-keys {
> > compatible = "gpio-keys";
> > autorepeat;
> > @@ -461,6 +476,10 @@
> > };
> >
> >{
> > + /* Pins that are not explicitely used by any devices */
> > + pinctrl-names = "default";
> > + pinctrl-0 = <_pin_hog>;
> > +
> > pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
> > drive-strength = <8>;
> > };
> > @@ -482,6 +501,20 @@
> > };
> > };
> >
> > + hog {
> > + tinker_pin_hog: tinker-pin-hog {
> > + rockchip,pins = <2 RK_PA1 RK_FUNC_GPIO
> > _pull_up>, /* project id 0 */
> > + <2 RK_PA2 RK_FUNC_GPIO
> > _pull_up>, /* project id 1 */
> > + <2 RK_PA3 RK_FUNC_GPIO
> > _pull_up>, /* project id 2 */
> > + <2 RK_PB0 RK_FUNC_GPIO
> > _pull_none>, /* pcb id 0 */
> > + <2 RK_PB1 RK_FUNC_GPIO
> > _pull_none>, /* pcb id 1 */
> > + <2 RK_PB2 RK_FUNC_GPIO
> > _pull_none>, /* pcb id 2 */
> > + <6 RK_PA5 RK_FUNC_GPIO
> > _pull_none>, /* sdp detect */
> > + <6 RK_PA6 RK_FUNC_GPIO
> > _pull_up>, /* current limit */
> > + <6 RK_PA7 RK_FUNC_GPIO
> > _pull_none>; /* emmc mask */
> > + };
> > + };
> > +
> > eth_phy {
> > eth_phy_pwr: eth-phy-pwr {
> > rockchip,pins = <0 6 RK_FUNC_GPIO _pull_none>;
> > diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c
> > b/board/rockchip/tinker_rk3288/tinker-rk3288.c
> > index 7a0c3c997d..7c65521f55 100644
> > --- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
> > +++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
> > @@ -5,12 +5,26 @@
> >
> > #include
> > #include
> > +#include
> > +#include
> > +#include
> > #include
> > #include
> > #include
> > #include
> > #include
> >
> > +enum project_id {
> > + tinker_board_s = 0,
> > + tinker_board = 7,
> > +};
> > +
> > +enum pcb_id {
> > + SR,
> > + ER,
> > + PR,
> > +};
> > +
> > static int get_ethaddr_from_eeprom(u8 *addr)
> > {
> > int ret;
> > @@ -23,10 +37,14 @@ static int get_ethaddr_from_eeprom(u8 *addr)
> > return i2c_eeprom_read(dev, 0, addr, 6);
> > }
> >
> > +int detect_board_init(void);
> > +
> > int rk3288_board_late_init(void)
> > {
> > u8 ethaddr[6];
> >
> > + detect_board_init();
> > +
> > if (get_ethaddr_from_eeprom(ethaddr))
> > return 0;
> >
> > @@ -45,3 +63,68 @@ int mmc_get_env_dev(void)
> >
> > return 1;
> > }
> > +
> > +int detect_board_init(void)
> > +{
> > + int ret = 0, i;
> > + ofnode node;
> > + struct udevice *gpio_dev2 = NULL;
> > + struct udevice *gpio_dev6 = NULL;
> > + struct gpio_desc pcbid[3];
> > + struct gpio_desc pid[3];
> > + enum project_id prjid;
> > + char gpio_name[64];
> > + enum pcb_id pcbversion;
> > +
> > + debug("%s: detect boad\n", __func__);
> > +
> > + if
Re: [U-Boot] [v4] armv8: ls1028a: disable multimedia feature when not supported
>-Original Message- >From: U-Boot On Behalf Of Wen He >Sent: Tuesday, November 19, 2019 8:07 AM >To: u-boot@lists.denx.de >Cc: Andy Tang >Subject: [U-Boot] [v4] armv8: ls1028a: disable multimedia feature when not >supported > >From: Yuantian Tang > >Ls1028a has 4 personalities: Ls1028a, Ls1027a, Ls1017a and Ls1018a. >Both Ls1027a and Ls1017a personalities are lower functionality version which >doesn't support the multimedia subsystems, like LCD, GPU. > >To disable multimedia feature on non-multimedia version, set the status >property to disabled in dts nodes. > >Signed-off-by: Tang Yuantian >Signed-off-by: Wen He >--- Please incorporate review comments posted on v2 version of this patch. -priyankajain ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] mpc83xx: remove unused clock.h
>-Original Message-
>From: Yangbo Lu
>Sent: Tuesday, November 12, 2019 4:59 PM
>To: u-boot@lists.denx.de
>Cc: Peng Fan ; Feng Li ; Alison Wang
>; Sumit Garg ; Priyanka Jain
>; Mario Six ; Y.b. Lu
>
>Subject: [PATCH 4/4] mpc83xx: remove unused clock.h
>
>The clock.h was to define mxc_get_clock() providing clock value to fsl_esdhc
>driver. Since fsl_esdhc driver is using global data
>gd->arch.sdhc_clk directly now, we can remove this file.
>
>Signed-off-by: Yangbo Lu
>---
> arch/powerpc/include/asm/arch-mpc83xx/clock.h | 22 --
> 1 file changed, 22 deletions(-)
> delete mode 100644 arch/powerpc/include/asm/arch-mpc83xx/clock.h
>
>diff --git a/arch/powerpc/include/asm/arch-mpc83xx/clock.h
>b/arch/powerpc/include/asm/arch-mpc83xx/clock.h
>deleted file mode 100644
>index d57e93c..000
>--- a/arch/powerpc/include/asm/arch-mpc83xx/clock.h
>+++ /dev/null
>@@ -1,22 +0,0 @@
>-/*
>- * (C) Copyright 2018
>- * Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
>- *
>- * SPDX-License-Identifier: GPL-2.0+
>- */
>-
>-#ifndef __ASM_POWERPC_CLOCK_H
>-#define __ASM_POWERPC_CLOCK_H
>-
>-/* Make fsl_esdhc driver happy */
>-enum mxc_clock {
>- MXC_ESDHC_CLK,
>-};
>-
>-DECLARE_GLOBAL_DATA_PTR;
>-
>-uint mxc_get_clock(int clk)
>-{
>- return gd->arch.sdhc_clk;
>-}
>-#endif /* __ASM_POWERPC_CLOCK_H */
>--
>2.7.4
Reviewed-by: Priyanka Jain
___
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Re: [U-Boot] [V3 1/2] ata: fsl_sata: Add DM support for Freescale PowerPC SATA driver
>-Original Message-
>From: Peng Ma
>Sent: 2019年11月19日 14:18
>To: Prabhakar X ; w...@denx.de
>Cc: ja...@openedev.com; s...@chromium.org; andre.przyw...@arm.com;
>s...@denx.de; sm...@web.de; u-boot@lists.denx.de; Peng Ma
>
>Subject: [V3 1/2] ata: fsl_sata: Add DM support for Freescale PowerPC SATA
>driver
>
>Add DM support for Freescale PowerPC sata driver used for PowerPC T series
>SoCs,
>
>CONFIG_BLK needs to be enabled on these platforms. It adds the SATA
>controller as AHCI device, which is strictly speaking not correct, as the
>controller is not AHCI compatible, But the U-Boot AHCI uclass interface enables
>the usage of this DM driver,
>
>Also fix below warning while PowerPC T series boards compilation,
>
>= WARNING =="
>This board does use CONFIG_LIBATA but has CONFIG_AHCI not"
>enabled. Please update the storage controller driver to use"
>CONFIG_AHCI before the v2019.07 release."
>Failure to update by the deadline may result in board removal."
>See doc/driver-model/MIGRATION.txt for more info."
>"
>
>Signed-off-by: Peng Ma
>---
>Changed for v3:
> - Limitd the title for maximum 75 chars per line
>
> arch/powerpc/cpu/mpc85xx/cpu_init.c | 10 --
> drivers/ata/Kconfig | 1 +
> drivers/ata/fsl_sata.c | 307
>++--
> drivers/ata/fsl_sata.h | 13 +-
> 4 files changed, 233 insertions(+), 98 deletions(-)
>
>diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
>b/arch/powerpc/cpu/mpc85xx/cpu_init.c
>index cac9280..9c12c87 100644
>--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
>+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
>@@ -1023,16 +1023,6 @@ void arch_preboot_os(void)
> mtmsr(msr);
> }
>
>-#if defined(CONFIG_SATA) && defined(CONFIG_FSL_SATA) -int
>sata_initialize(void) -{
>- if (is_serdes_configured(SATA1) || is_serdes_configured(SATA2))
>- return __sata_initialize();
>-
>- return 1;
>-}
>-#endif
>-
> void cpu_secondary_init_r(void)
> {
> #ifdef CONFIG_U_QE
>diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 87636ae..57121f6
>100644
>--- a/drivers/ata/Kconfig
>+++ b/drivers/ata/Kconfig
>@@ -87,6 +87,7 @@ config DWC_AHSATA_AHCI config FSL_SATA
> bool "Enable Freescale SATA controller driver support"
> select LIBATA
>+ select AHCI if BLK
> help
> Enable this driver to support the SATA controller found in
> some Freescale PowerPC SoCs.
>diff --git a/drivers/ata/fsl_sata.c b/drivers/ata/fsl_sata.c index
>e70a515..3261c10 100644
>--- a/drivers/ata/fsl_sata.c
>+++ b/drivers/ata/fsl_sata.c
>@@ -1,7 +1,8 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
> * Copyright (C) 2008,2010 Freescale Semiconductor, Inc.
>- *Dave Liu
>+ * Copyright 2019 NXP
>+ * Author: Dave Liu
> */
>
> #include
>@@ -16,6 +17,11 @@
> #include
> #include "fsl_sata.h"
>
>+#if CONFIG_IS_ENABLED(BLK)
>+#include
>+#include
>+#include
>+#else
> #ifndef CONFIG_SYS_SATA1_FLAGS
> #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
> #endif
>@@ -35,6 +41,7 @@ static struct fsl_sata_info fsl_sata_info[] = {
> {0, 0},
> #endif
> };
>+#endif
>
> static inline void sdelay(unsigned long sec) { @@ -74,7 +81,11 @@ static int
>ata_wait_register(unsigned __iomem *addr, u32 mask,
> return (i < timeout_msec) ? 0 : -1;
> }
>
>+#if !CONFIG_IS_ENABLED(BLK)
> int init_sata(int dev)
>+#else
>+static int init_sata(struct fsl_ata_priv *priv, int dev) #endif
> {
> u32 length, align;
> cmd_hdr_tbl_t *cmd_hdr;
>@@ -110,13 +121,18 @@ int init_sata(int dev)
> /* Zero all of the device driver struct */
> memset((void *)sata, 0, sizeof(fsl_sata_t));
>
>- /* Save the private struct to block device struct */
>- sata_dev_desc[dev].priv = (void *)sata;
>-
>- snprintf(sata->name, 12, "SATA%d", dev);
>+ snprintf(sata->name, 12, "SATA%d:\n", dev);
>
> /* Set the controller register base address to device struct */
>+#if !CONFIG_IS_ENABLED(BLK)
>+ sata_dev_desc[dev].priv = (void *)sata;
> reg = (fsl_sata_reg_t *)(fsl_sata_info[dev].sata_reg_base);
>+ sata->dma_flag = fsl_sata_info[dev].flags; #else
>+ reg = (fsl_sata_reg_t *)(priv->base + priv->offset * dev);
>+ sata->dma_flag = priv->flag;
>+ priv->fsl_sata = sata;
>+#endif
> sata->reg_base = reg;
>
> /* Allocate the command header table, 4 bytes aligned */ @@ -479,34
>+495,16 @@ static int fsl_sata_exec_cmd(struct fsl_sata *sata, struct
>sata_fis_h2d *cfis,
> return -1;
> }
>
>-static void fsl_sata_identify(int dev, u16 *id) -{
>- fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
>- struct sata_fis_h2d h2d, *cfis =
>-
>- memset(cfis, 0, sizeof(struct sata_fis_h2d));
>-
>- cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
>- cfis->pm_port_c = 0x80; /* is command */
>- cfis->command = ATA_CMD_ID_ATA;
>-
>-
Re: [U-Boot] [V3 2/2] ata: sata_sil: Add DM support for Silicon sata driver
>-Original Message-
>From: Peng Ma
>Sent: 2019年11月19日 14:18
>To: Prabhakar X ; w...@denx.de
>Cc: ja...@openedev.com; s...@chromium.org; andre.przyw...@arm.com;
>s...@denx.de; sm...@web.de; u-boot@lists.denx.de; Peng Ma
>
>Subject: [V3 2/2] ata: sata_sil: Add DM support for Silicon sata driver
>
>Add DM support for Silicon(SIL3131 / SIL3132 / SIL3124) sata driver as few of
>the PowerPC platforms such as P series based boards need to use SATA_SIL
>with DM,
>
>Also fix below warning while PowerPC P series boards compilation,
>
>= WARNING =="
>This board does use CONFIG_LIBATA but has CONFIG_AHCI not"
>enabled. Please update the storage controller driver to use"
>CONFIG_AHCI before the v2019.07 release."
>Failure to update by the deadline may result in board removal."
>See doc/driver-model/MIGRATION.txt for more info."
>"
>
>Signed-off-by: Peng Ma
>---
>Changed for v3:
> - Remove the typedef
>
> drivers/ata/Kconfig| 1 +
> drivers/ata/sata_sil.c | 535
>+++--
> drivers/ata/sata_sil.h | 10 +
> 3 files changed, 353 insertions(+), 193 deletions(-)
>
>diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 57121f6..fe589d3
>100644
>--- a/drivers/ata/Kconfig
>+++ b/drivers/ata/Kconfig
>@@ -110,6 +110,7 @@ config SATA_MV
> config SATA_SIL
> bool "Enable Silicon Image SIL3131 / SIL3132 / SIL3124 SATA driver
>support"
> select LIBATA
>+ select AHCI if BLK
> help
> Enable this driver to support the SIL3131, SIL3132 and SIL3124
> SATA controllers.
>diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c index
>a8598d9..d06d7a0 100644
>--- a/drivers/ata/sata_sil.c
>+++ b/drivers/ata/sata_sil.c
>@@ -1,6 +1,7 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
> * Copyright (C) 2011 Freescale Semiconductor, Inc.
>+ * Copyright 2019 NXP
> * Author: Tang Yuantian
> */
>
>@@ -14,18 +15,29 @@
> #include
> #include
> #include
>+
>+#if CONFIG_IS_ENABLED(BLK)
>+#include
>+#include
>+#endif
>+
> #include "sata_sil.h"
>
>-/* Convert sectorsize to wordsize */
>-#define ATA_SECTOR_WORDS (ATA_SECT_SIZE/2)
> #define virt_to_bus(devno, v) pci_virt_to_mem(devno, (void *) (v))
>
>+/* just compatible ahci_ops */
>+struct sil_ops {
>+ int *rev0;
>+ int *rev1;
>+ int (*scan)(struct udevice *dev);
>+};
>+
> static struct sata_info sata_info;
>
> static struct pci_device_id supported[] = {
>- {PCI_VENDOR_ID_SILICONIMAGE, PCI_DEVICE_ID_SIL3131},
>- {PCI_VENDOR_ID_SILICONIMAGE, PCI_DEVICE_ID_SIL3132},
>- {PCI_VENDOR_ID_SILICONIMAGE, PCI_DEVICE_ID_SIL3124},
>+ { PCI_DEVICE(PCI_VENDOR_ID_SILICONIMAGE,
>PCI_DEVICE_ID_SIL3131) },
>+ { PCI_DEVICE(PCI_VENDOR_ID_SILICONIMAGE,
>PCI_DEVICE_ID_SIL3132) },
>+ { PCI_DEVICE(PCI_VENDOR_ID_SILICONIMAGE,
>PCI_DEVICE_ID_SIL3124) },
> {}
> };
>
>@@ -113,9 +125,9 @@ static int sil_init_port(void *port)
> return 0;
> }
>
>-static void sil_read_fis(int dev, int tag, struct sata_fis_d2h *fis)
>+static void sil_read_fis(struct sil_sata *sata, int tag,
>+ struct sata_fis_d2h *fis)
> {
>- struct sil_sata *sata = sata_dev_desc[dev].priv;
> void *port = sata->port;
> struct sil_prb *prb;
> int i;
>@@ -128,9 +140,9 @@ static void sil_read_fis(int dev, int tag, struct
>sata_fis_d2h *fis)
> *dst++ = readl(src++);
> }
>
>-static int sil_exec_cmd(int dev, struct sil_cmd_block *pcmd, int tag)
>+static int sil_exec_cmd(struct sil_sata *sata, struct sil_cmd_block *pcmd,
>+ int tag)
> {
>- struct sil_sata *sata = sata_dev_desc[dev].priv;
> void *port = sata->port;
> u64 paddr = virt_to_bus(sata->devno, pcmd);
> u32 irq_mask, irq_stat;
>@@ -164,9 +176,8 @@ static int sil_exec_cmd(int dev, struct sil_cmd_block
>*pcmd, int tag)
> return rc;
> }
>
>-static int sil_cmd_set_feature(int dev)
>+static int sil_cmd_set_feature(struct sil_sata *sata)
> {
>- struct sil_sata *sata = sata_dev_desc[dev].priv;
> struct sil_cmd_block cmdb, *pcmd =
> struct sata_fis_d2h fis;
> u8 udma_cap;
>@@ -191,9 +202,9 @@ static int sil_cmd_set_feature(int dev)
> if (udma_cap == ATA_UDMA3)
> pcmd->prb.fis.sector_count = XFER_UDMA_3;
>
>- ret = sil_exec_cmd(dev, pcmd, 0);
>+ ret = sil_exec_cmd(sata, pcmd, 0);
> if (ret) {
>- sil_read_fis(dev, 0, );
>+ sil_read_fis(sata, 0, );
> printf("Err: exe cmd(0x%x).\n",
> readl(sata->port + PORT_SERROR));
> sil_sata_dump_fis();
>@@ -203,9 +214,34 @@ static int sil_cmd_set_feature(int dev)
> return 0;
> }
>
>-static int sil_cmd_identify_device(int dev, u16 *id)
>+static void sil_sata_init_wcache(struct sil_sata *sata, u16 *id) {
>+ if (ata_id_has_wcache(id) && ata_id_wcache_enabled(id))
>+
[U-Boot] [V3 2/2] ata: sata_sil: Add DM support for Silicon sata driver
Add DM support for Silicon(SIL3131 / SIL3132 / SIL3124) sata driver as
few of the PowerPC platforms such as P series based boards need to
use SATA_SIL with DM,
Also fix below warning while PowerPC P series boards compilation,
= WARNING =="
This board does use CONFIG_LIBATA but has CONFIG_AHCI not"
enabled. Please update the storage controller driver to use"
CONFIG_AHCI before the v2019.07 release."
Failure to update by the deadline may result in board removal."
See doc/driver-model/MIGRATION.txt for more info."
"
Signed-off-by: Peng Ma
---
Changed for v3:
- Remove the typedef
drivers/ata/Kconfig| 1 +
drivers/ata/sata_sil.c | 535 +++--
drivers/ata/sata_sil.h | 10 +
3 files changed, 353 insertions(+), 193 deletions(-)
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 57121f6..fe589d3 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -110,6 +110,7 @@ config SATA_MV
config SATA_SIL
bool "Enable Silicon Image SIL3131 / SIL3132 / SIL3124 SATA driver
support"
select LIBATA
+ select AHCI if BLK
help
Enable this driver to support the SIL3131, SIL3132 and SIL3124
SATA controllers.
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index a8598d9..d06d7a0 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2011 Freescale Semiconductor, Inc.
+ * Copyright 2019 NXP
* Author: Tang Yuantian
*/
@@ -14,18 +15,29 @@
#include
#include
#include
+
+#if CONFIG_IS_ENABLED(BLK)
+#include
+#include
+#endif
+
#include "sata_sil.h"
-/* Convert sectorsize to wordsize */
-#define ATA_SECTOR_WORDS (ATA_SECT_SIZE/2)
#define virt_to_bus(devno, v) pci_virt_to_mem(devno, (void *) (v))
+/* just compatible ahci_ops */
+struct sil_ops {
+ int *rev0;
+ int *rev1;
+ int (*scan)(struct udevice *dev);
+};
+
static struct sata_info sata_info;
static struct pci_device_id supported[] = {
- {PCI_VENDOR_ID_SILICONIMAGE, PCI_DEVICE_ID_SIL3131},
- {PCI_VENDOR_ID_SILICONIMAGE, PCI_DEVICE_ID_SIL3132},
- {PCI_VENDOR_ID_SILICONIMAGE, PCI_DEVICE_ID_SIL3124},
+ { PCI_DEVICE(PCI_VENDOR_ID_SILICONIMAGE, PCI_DEVICE_ID_SIL3131) },
+ { PCI_DEVICE(PCI_VENDOR_ID_SILICONIMAGE, PCI_DEVICE_ID_SIL3132) },
+ { PCI_DEVICE(PCI_VENDOR_ID_SILICONIMAGE, PCI_DEVICE_ID_SIL3124) },
{}
};
@@ -113,9 +125,9 @@ static int sil_init_port(void *port)
return 0;
}
-static void sil_read_fis(int dev, int tag, struct sata_fis_d2h *fis)
+static void sil_read_fis(struct sil_sata *sata, int tag,
+struct sata_fis_d2h *fis)
{
- struct sil_sata *sata = sata_dev_desc[dev].priv;
void *port = sata->port;
struct sil_prb *prb;
int i;
@@ -128,9 +140,9 @@ static void sil_read_fis(int dev, int tag, struct
sata_fis_d2h *fis)
*dst++ = readl(src++);
}
-static int sil_exec_cmd(int dev, struct sil_cmd_block *pcmd, int tag)
+static int sil_exec_cmd(struct sil_sata *sata, struct sil_cmd_block *pcmd,
+ int tag)
{
- struct sil_sata *sata = sata_dev_desc[dev].priv;
void *port = sata->port;
u64 paddr = virt_to_bus(sata->devno, pcmd);
u32 irq_mask, irq_stat;
@@ -164,9 +176,8 @@ static int sil_exec_cmd(int dev, struct sil_cmd_block
*pcmd, int tag)
return rc;
}
-static int sil_cmd_set_feature(int dev)
+static int sil_cmd_set_feature(struct sil_sata *sata)
{
- struct sil_sata *sata = sata_dev_desc[dev].priv;
struct sil_cmd_block cmdb, *pcmd =
struct sata_fis_d2h fis;
u8 udma_cap;
@@ -191,9 +202,9 @@ static int sil_cmd_set_feature(int dev)
if (udma_cap == ATA_UDMA3)
pcmd->prb.fis.sector_count = XFER_UDMA_3;
- ret = sil_exec_cmd(dev, pcmd, 0);
+ ret = sil_exec_cmd(sata, pcmd, 0);
if (ret) {
- sil_read_fis(dev, 0, );
+ sil_read_fis(sata, 0, );
printf("Err: exe cmd(0x%x).\n",
readl(sata->port + PORT_SERROR));
sil_sata_dump_fis();
@@ -203,9 +214,34 @@ static int sil_cmd_set_feature(int dev)
return 0;
}
-static int sil_cmd_identify_device(int dev, u16 *id)
+static void sil_sata_init_wcache(struct sil_sata *sata, u16 *id)
+{
+ if (ata_id_has_wcache(id) && ata_id_wcache_enabled(id))
+ sata->wcache = 1;
+ if (ata_id_has_flush(id))
+ sata->flush = 1;
+ if (ata_id_has_flush_ext(id))
+ sata->flush_ext = 1;
+}
+
+static void sil_sata_set_feature_by_id(struct sil_sata *sata, u16 *id)
+{
+#ifdef CONFIG_LBA48
+ /* Check if support LBA48 */
+ if (ata_id_has_lba48(id)) {
+ sata->lba48 = 1;
+
[U-Boot] [V3 1/2] ata: fsl_sata: Add DM support for Freescale PowerPC SATA driver
Add DM support for Freescale PowerPC sata driver used for PowerPC T series
SoCs,
CONFIG_BLK needs to be enabled on these platforms. It adds the SATA
controller as AHCI device, which is strictly speaking not correct,
as the controller is not AHCI compatible, But the U-Boot AHCI uclass
interface enables the usage of this DM driver,
Also fix below warning while PowerPC T series boards compilation,
= WARNING =="
This board does use CONFIG_LIBATA but has CONFIG_AHCI not"
enabled. Please update the storage controller driver to use"
CONFIG_AHCI before the v2019.07 release."
Failure to update by the deadline may result in board removal."
See doc/driver-model/MIGRATION.txt for more info."
"
Signed-off-by: Peng Ma
---
Changed for v3:
- Limitd the title for maximum 75 chars per line
arch/powerpc/cpu/mpc85xx/cpu_init.c | 10 --
drivers/ata/Kconfig | 1 +
drivers/ata/fsl_sata.c | 307 ++--
drivers/ata/fsl_sata.h | 13 +-
4 files changed, 233 insertions(+), 98 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index cac9280..9c12c87 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -1023,16 +1023,6 @@ void arch_preboot_os(void)
mtmsr(msr);
}
-#if defined(CONFIG_SATA) && defined(CONFIG_FSL_SATA)
-int sata_initialize(void)
-{
- if (is_serdes_configured(SATA1) || is_serdes_configured(SATA2))
- return __sata_initialize();
-
- return 1;
-}
-#endif
-
void cpu_secondary_init_r(void)
{
#ifdef CONFIG_U_QE
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 87636ae..57121f6 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -87,6 +87,7 @@ config DWC_AHSATA_AHCI
config FSL_SATA
bool "Enable Freescale SATA controller driver support"
select LIBATA
+ select AHCI if BLK
help
Enable this driver to support the SATA controller found in
some Freescale PowerPC SoCs.
diff --git a/drivers/ata/fsl_sata.c b/drivers/ata/fsl_sata.c
index e70a515..3261c10 100644
--- a/drivers/ata/fsl_sata.c
+++ b/drivers/ata/fsl_sata.c
@@ -1,7 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2008,2010 Freescale Semiconductor, Inc.
- * Dave Liu
+ * Copyright 2019 NXP
+ * Author: Dave Liu
*/
#include
@@ -16,6 +17,11 @@
#include
#include "fsl_sata.h"
+#if CONFIG_IS_ENABLED(BLK)
+#include
+#include
+#include
+#else
#ifndef CONFIG_SYS_SATA1_FLAGS
#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
#endif
@@ -35,6 +41,7 @@ static struct fsl_sata_info fsl_sata_info[] = {
{0, 0},
#endif
};
+#endif
static inline void sdelay(unsigned long sec)
{
@@ -74,7 +81,11 @@ static int ata_wait_register(unsigned __iomem *addr, u32
mask,
return (i < timeout_msec) ? 0 : -1;
}
+#if !CONFIG_IS_ENABLED(BLK)
int init_sata(int dev)
+#else
+static int init_sata(struct fsl_ata_priv *priv, int dev)
+#endif
{
u32 length, align;
cmd_hdr_tbl_t *cmd_hdr;
@@ -110,13 +121,18 @@ int init_sata(int dev)
/* Zero all of the device driver struct */
memset((void *)sata, 0, sizeof(fsl_sata_t));
- /* Save the private struct to block device struct */
- sata_dev_desc[dev].priv = (void *)sata;
-
- snprintf(sata->name, 12, "SATA%d", dev);
+ snprintf(sata->name, 12, "SATA%d:\n", dev);
/* Set the controller register base address to device struct */
+#if !CONFIG_IS_ENABLED(BLK)
+ sata_dev_desc[dev].priv = (void *)sata;
reg = (fsl_sata_reg_t *)(fsl_sata_info[dev].sata_reg_base);
+ sata->dma_flag = fsl_sata_info[dev].flags;
+#else
+ reg = (fsl_sata_reg_t *)(priv->base + priv->offset * dev);
+ sata->dma_flag = priv->flag;
+ priv->fsl_sata = sata;
+#endif
sata->reg_base = reg;
/* Allocate the command header table, 4 bytes aligned */
@@ -479,34 +495,16 @@ static int fsl_sata_exec_cmd(struct fsl_sata *sata,
struct sata_fis_h2d *cfis,
return -1;
}
-static void fsl_sata_identify(int dev, u16 *id)
-{
- fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
- struct sata_fis_h2d h2d, *cfis =
-
- memset(cfis, 0, sizeof(struct sata_fis_h2d));
-
- cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
- cfis->pm_port_c = 0x80; /* is command */
- cfis->command = ATA_CMD_ID_ATA;
-
- fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, (u8 *)id, ATA_ID_WORDS * 2);
- ata_swap_buf_le16(id, ATA_ID_WORDS);
-}
-
-static void fsl_sata_xfer_mode(int dev, u16 *id)
+static void fsl_sata_xfer_mode(fsl_sata_t *sata, u16 *id)
{
- fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
-
sata->pio = id[ATA_ID_PIO_MODES];
sata->mwdma = id[ATA_ID_MWDMA_MODES];
sata->udma =
Re: [U-Boot] [PATCHv2 1/5] smart-gateway-mt7688: Rework build time check for overwriting factory data
On 19.11.19 02:02, Tom Rini wrote: The board file has a build time check to ensure that we do not have the redundant environment overwriting the factory data. However, using the symbol CONFIG_ENV_SIZE_REDUND isn't strictly needed as that is always the same as CONFIG_ENV_SIZE. Use CONFIG_ENV_SIZE instead so that we can later drop CONFIG_ENV_SIZE_REDUND. Cc: Stefan Roese Signed-off-by: Tom Rini --- Changes in v2: - As pointed out by Stefan's review, I should address the usage of ENV_SIZE_REDUND here first and remove it second. --- board/gardena/smart-gateway-mt7688/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/gardena/smart-gateway-mt7688/board.c b/board/gardena/smart-gateway-mt7688/board.c index bd494c84fc80..e9ffd42a8a68 100644 --- a/board/gardena/smart-gateway-mt7688/board.c +++ b/board/gardena/smart-gateway-mt7688/board.c @@ -18,7 +18,7 @@ #define FACTORY_DATA_OFFS 0xc #define FACTORY_DATA_SECT_SIZE0x1 -#if ((CONFIG_ENV_OFFSET_REDUND + CONFIG_ENV_SIZE_REDUND) > FACTORY_DATA_OFFS) +#if ((CONFIG_ENV_OFFSET_REDUND + CONFIG_ENV_SIZE) > FACTORY_DATA_OFFS) #error "U-Boot image with environment too big (overlapping with factory-data)!" #endif #define FACTORY_DATA_USER_OFFS0x140 Reviewed-by: Stefan Roese Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] arm: drop eSDHC clock getting in mxc_get_clock() for layerscape
>-Original Message-
>From: Yangbo Lu
>Sent: Tuesday, November 12, 2019 4:59 PM
>To: u-boot@lists.denx.de
>Cc: Peng Fan ; Feng Li ; Alison
>Wang ; Sumit Garg ; Priyanka
>Jain ; Mario Six ; Y.b. Lu
>
>Subject: [PATCH 3/4] arm: drop eSDHC clock getting in mxc_get_clock() for
>layerscape
>
>Although layerscape platforms reuse mxc_get_clock() of i.MX platforms,
>eSDHC clock getting do not have to use it. It uses global data
>gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more
>than one eSDHC controllers on SoC, they use same reference clock.
>
>Signed-off-by: Yangbo Lu
>---
> arch/arm/cpu/armv7/ls102xa/clock.c | 2 --
> arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 15 ---
>arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | 15 ---
> arch/arm/include/asm/arch-fsl-layerscape/clock.h| 2 --
> arch/arm/include/asm/arch-ls102xa/clock.h | 1 -
> 5 files changed, 35 deletions(-)
>
>diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c
>b/arch/arm/cpu/armv7/ls102xa/clock.c
>index 30c7b37..7a1053c 100644
>--- a/arch/arm/cpu/armv7/ls102xa/clock.c
>+++ b/arch/arm/cpu/armv7/ls102xa/clock.c
>@@ -109,8 +109,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
> switch (clk) {
> case MXC_I2C_CLK:
> return get_bus_freq(0) / 2;
>- case MXC_ESDHC_CLK:
>- return get_bus_freq(0);
> case MXC_DSPI_CLK:
> return get_bus_freq(0) / 2;
> case MXC_UART_CLK:
>diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
>b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
>index df4df9a..6d82cfe 100644
>--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
>+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
>@@ -227,16 +227,6 @@ ulong get_ddr_freq(ulong dummy)
> return gd->mem_clk;
> }
>
>-#ifdef CONFIG_FSL_ESDHC
>-int get_sdhc_freq(ulong dummy)
>-{
>- if (!gd->arch.sdhc_clk)
>- get_clocks();
>-
>- return gd->arch.sdhc_clk;
>-}
>-#endif
>-
> int get_serial_clock(void)
> {
> return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV; @@ -
>264,11 +254,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
> switch (clk) {
> case MXC_I2C_CLK:
> return get_i2c_freq(0);
>-#if defined(CONFIG_FSL_ESDHC)
>- case MXC_ESDHC_CLK:
>- case MXC_ESDHC2_CLK:
>- return get_sdhc_freq(0);
>-#endif
> case MXC_DSPI_CLK:
> return get_dspi_freq(0);
> #ifdef CONFIG_FSL_LPUART
>diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
>b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
>index b3e6732..1f8289d 100644
>--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
>+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
>@@ -236,16 +236,6 @@ int get_dspi_freq(ulong dummy)
> return get_bus_freq(0) / CONFIG_SYS_FSL_DSPI_CLK_DIV; }
>
>-#ifdef CONFIG_FSL_ESDHC
>-int get_sdhc_freq(ulong dummy)
>-{
>- if (!gd->arch.sdhc_clk)
>- get_clocks();
>-
>- return gd->arch.sdhc_clk;
>-}
>-#endif
>-
> int get_serial_clock(void)
> {
> return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV; @@ -
>256,11 +246,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
> switch (clk) {
> case MXC_I2C_CLK:
> return get_i2c_freq(0);
>-#if defined(CONFIG_FSL_ESDHC)
>- case MXC_ESDHC_CLK:
>- case MXC_ESDHC2_CLK:
>- return get_sdhc_freq(0);
>-#endif
> case MXC_DSPI_CLK:
> return get_dspi_freq(0);
> default:
>diff --git a/arch/arm/include/asm/arch-fsl-layerscape/clock.h
>b/arch/arm/include/asm/arch-fsl-layerscape/clock.h
>index b37a08d..95d6156 100644
>--- a/arch/arm/include/asm/arch-fsl-layerscape/clock.h
>+++ b/arch/arm/include/asm/arch-fsl-layerscape/clock.h
>@@ -14,8 +14,6 @@ enum mxc_clock {
> MXC_ARM_CLK = 0,
> MXC_BUS_CLK,
> MXC_UART_CLK,
>- MXC_ESDHC_CLK,
>- MXC_ESDHC2_CLK,
> MXC_I2C_CLK,
> MXC_DSPI_CLK,
> };
>diff --git a/arch/arm/include/asm/arch-ls102xa/clock.h
>b/arch/arm/include/asm/arch-ls102xa/clock.h
>index bf67df5..e66e57f 100644
>--- a/arch/arm/include/asm/arch-ls102xa/clock.h
>+++ b/arch/arm/include/asm/arch-ls102xa/clock.h
>@@ -12,7 +12,6 @@
> enum mxc_clock {
> MXC_ARM_CLK = 0,
> MXC_UART_CLK,
>- MXC_ESDHC_CLK,
> MXC_I2C_CLK,
> MXC_DSPI_CLK,
> };
>--
>2.7.4
Reviewed-by: Priyanka Jain
___
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U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/4] arm: ls1021a: drop redundant board_mmc_init()
>-Original Message-
>From: Yangbo Lu
>Sent: Tuesday, November 12, 2019 4:59 PM
>To: u-boot@lists.denx.de
>Cc: Peng Fan ; Feng Li ; Alison Wang
>; Sumit Garg ; Priyanka Jain
>; Mario Six ; Y.b. Lu
>
>Subject: [PATCH 2/4] arm: ls1021a: drop redundant board_mmc_init()
>
>The board_mmc_init() defined in board files is actually doing same thing with
>the cpu_mmc_init() defined in arch/arm/cpu/armv7/ls102xa/cpu.c. So drop it.
>
>Signed-off-by: Yangbo Lu
>---
> board/freescale/ls1021aiot/ls1021aiot.c | 15 ---
>board/freescale/ls1021aqds/ls1021aqds.c | 14 --
>board/freescale/ls1021atwr/ls1021atwr.c | 14 --
> 3 files changed, 43 deletions(-)
>
>diff --git a/board/freescale/ls1021aiot/ls1021aiot.c
>b/board/freescale/ls1021aiot/ls1021aiot.c
>index 70992a5..621a3db 100644
>--- a/board/freescale/ls1021aiot/ls1021aiot.c
>+++ b/board/freescale/ls1021aiot/ls1021aiot.c
>@@ -12,7 +12,6 @@
> #include
> #include
> #include
>-#include
> #include
> #include
> #include
>@@ -103,20 +102,6 @@ int dram_init(void)
> return 0;
> }
>
>-#ifdef CONFIG_FSL_ESDHC
>-struct fsl_esdhc_cfg esdhc_cfg[1] = {
>- {CONFIG_SYS_FSL_ESDHC_ADDR},
>-};
>-
>-int board_mmc_init(bd_t *bis)
>-{
>- esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
>-
>- return fsl_esdhc_initialize(bis, _cfg[0]);
>-}
>-
>-#endif
>-
> #ifdef CONFIG_TSEC_ENET
> int board_eth_init(bd_t *bis)
> {
>diff --git a/board/freescale/ls1021aqds/ls1021aqds.c
>b/board/freescale/ls1021aqds/ls1021aqds.c
>index 2ca2bd9..4034b7d 100644
>--- a/board/freescale/ls1021aqds/ls1021aqds.c
>+++ b/board/freescale/ls1021aqds/ls1021aqds.c
>@@ -14,7 +14,6 @@
> #include
> #include
> #include
>-#include
> #include
> #include
> #include
>@@ -161,19 +160,6 @@ int dram_init(void)
> return fsl_initdram();
> }
>
>-#ifdef CONFIG_FSL_ESDHC
>-struct fsl_esdhc_cfg esdhc_cfg[1] = {
>- {CONFIG_SYS_FSL_ESDHC_ADDR},
>-};
>-
>-int board_mmc_init(bd_t *bis)
>-{
>- esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
>-
>- return fsl_esdhc_initialize(bis, _cfg[0]);
>-}
>-#endif
>-
> int board_early_init_f(void)
> {
> struct ccsr_scfg *scfg = (struct ccsr_scfg
>*)CONFIG_SYS_FSL_SCFG_ADDR; diff --git
>a/board/freescale/ls1021atwr/ls1021atwr.c
>b/board/freescale/ls1021atwr/ls1021atwr.c
>index fcf2ec9..1a412ee 100644
>--- a/board/freescale/ls1021atwr/ls1021atwr.c
>+++ b/board/freescale/ls1021atwr/ls1021atwr.c
>@@ -14,7 +14,6 @@
> #include
> #include
> #include
>-#include
> #include
> #include
> #include
>@@ -233,19 +232,6 @@ int dram_init(void)
> return 0;
> }
>
>-#ifdef CONFIG_FSL_ESDHC
>-struct fsl_esdhc_cfg esdhc_cfg[1] = {
>- {CONFIG_SYS_FSL_ESDHC_ADDR},
>-};
>-
>-int board_mmc_init(bd_t *bis)
>-{
>- esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
>-
>- return fsl_esdhc_initialize(bis, _cfg[0]);
>-}
>-#endif
>-
> int board_eth_init(bd_t *bis)
> {
> return pci_eth_init(bis);
>--
>2.7.4
Reviewed-by: Priyanka Jain
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Re: [U-Boot] [PATCH 1/4] mmc: fsl_esdhc: get clock directly from global data
>-Original Message-
>From: Yangbo Lu
>Sent: Tuesday, November 12, 2019 4:59 PM
>To: u-boot@lists.denx.de
>Cc: Peng Fan ; Feng Li ; Alison Wang
>; Sumit Garg ; Priyanka Jain
>; Mario Six ; Y.b. Lu
>
>Subject: [PATCH 1/4] mmc: fsl_esdhc: get clock directly from global data
>
>This patch is to get clock directly from global data.
>
>- Remove uclass clk api method. This was what i.MX platforms were
> using, while QorIQ platforms weren't.
>- Get clock only from global data, dropping mxc_get_clock().
> QorIQ eSDHC controllers on one silicon use same reference clock.
>
>Signed-off-by: Yangbo Lu
>---
> drivers/mmc/fsl_esdhc.c | 34 --
> 1 file changed, 4 insertions(+), 30 deletions(-)
>
>diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index
>8ff84aa..09cb773 100644
>--- a/drivers/mmc/fsl_esdhc.c
>+++ b/drivers/mmc/fsl_esdhc.c
>@@ -12,7 +12,6 @@
> #include
> #include
> #include
>-#include
> #include
> #include
> #include
>@@ -81,7 +80,6 @@ struct fsl_esdhc_plat { struct fsl_esdhc_priv {
> struct fsl_esdhc *esdhc_regs;
> unsigned int sdhc_clk;
>- struct clk per_clk;
> unsigned int clock;
> #if !CONFIG_IS_ENABLED(DM_MMC)
> struct mmc *mmc;
>@@ -831,9 +829,6 @@ int fsl_esdhc_mmc_init(bd_t *bis)
> return fsl_esdhc_initialize(bis, cfg); } #else /* DM_MMC */ -#ifndef
>CONFIG_PPC -#include -#endif static int
>fsl_esdhc_probe(struct udevice *dev) {
> struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); @@ -841,7
>+836,6 @@ static int fsl_esdhc_probe(struct udevice *dev)
> struct fsl_esdhc_priv *priv = dev_get_priv(dev);
> fdt_addr_t addr;
> struct mmc *mmc;
>- int ret;
>
> addr = dev_read_addr(dev);
> if (addr == FDT_ADDR_T_NONE)
>@@ -853,30 +847,10 @@ static int fsl_esdhc_probe(struct udevice *dev) #endif
> priv->dev = dev;
>
>- if (IS_ENABLED(CONFIG_CLK)) {
>- /* Assigned clock already set clock */
>- ret = clk_get_by_name(dev, "per", >per_clk);
>- if (ret) {
>- printf("Failed to get per_clk\n");
>- return ret;
>- }
>- ret = clk_enable(>per_clk);
>- if (ret) {
>- printf("Failed to enable per_clk\n");
>- return ret;
>- }
>-
>- priv->sdhc_clk = clk_get_rate(>per_clk);
>- } else {
>-#ifndef CONFIG_PPC
>- priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev->seq);
>-#else
>- priv->sdhc_clk = gd->arch.sdhc_clk;
>-#endif
>- if (priv->sdhc_clk <= 0) {
>- dev_err(dev, "Unable to get clk for %s\n", dev->name);
>- return -EINVAL;
>- }
>+ priv->sdhc_clk = gd->arch.sdhc_clk;
>+ if (priv->sdhc_clk <= 0) {
>+ dev_err(dev, "Unable to get clk for %s\n", dev->name);
>+ return -EINVAL;
> }
>
> fsl_esdhc_get_cfg_common(priv, >cfg);
>--
>2.7.4
Reviewed-by: Priyanka Jain
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Re: [U-Boot] [PATCHv2 4/5] T1042RDB_PI_NAND_SECURE_BOOT: Guard t104xrdb SPL env code
>-Original Message- >From: Tom Rini >Sent: Tuesday, November 19, 2019 6:32 AM >To: u-boot@lists.denx.de >Cc: Priyanka Jain >Subject: [PATCHv2 4/5] T1042RDB_PI_NAND_SECURE_BOOT: Guard t104xrdb >SPL env code > >We can only configure and set the environment in SPL when we have a >particular environment location set that is not "nowhere" like it is in >SECURE_BOOT designs. Update the code to reflect that. > >Cc: Priyanka Jain >Signed-off-by: Tom Rini >--- >Changes in v2: >- Rework the guard to be if env is nand/mmc/spi, redo commit message. >--- > board/freescale/t104xrdb/spl.c | 3 +++ > 1 file changed, 3 insertions(+) > >diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c >index 7b0eb8edf51d..7df371df4df5 100644 >--- a/board/freescale/t104xrdb/spl.c >+++ b/board/freescale/t104xrdb/spl.c >@@ -106,6 +106,8 @@ void board_init_r(gd_t *gd, ulong dest_addr) #endif > > /* relocate environment function pointers etc. */ >+#if defined(CONFIG_ENV_IS_IN_NAND) || defined(CONFIG_ENV_IS_IN_MMC) >|| \ >+ defined(CONFIG_ENV_IS_IN_SPI_FLASH) > #ifdef CONFIG_SPL_NAND_BOOT > nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, > (uchar *)CONFIG_ENV_ADDR); >@@ -120,6 +122,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) #endif > gd->env_addr = (ulong)(CONFIG_ENV_ADDR); > gd->env_valid = ENV_VALID; >+#endif > > i2c_init_all(); > >-- >2.17.1 Reviewed-by: Priyanka Jain ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] usb: cdns3: Fix include file path
Hi Marek, On 18/11/19 7:42 PM, Marek Vasut wrote: > On 11/18/19 2:46 PM, Vignesh Raghavendra wrote: >> xhci.h has now been moved to include/usb/ folder. Therefore, update the > > s/folder/directory/ ; I can update it while applying. Agree, Thanks! > >> path in the Cadence USB drivers. > > [...] > -- Regards Vignesh ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 05/16] efi_loader: add signature verification functions
On Mon, Nov 18, 2019 at 05:31:52PM +0900, AKASHI Takahiro wrote:
> > >+static const unsigned char WinIndirectSha256[] = {
> >
> > We don't use camel case.
>
> Okay, this one is a local variable. Fix it.
>
> > >+ 0x30, 0x33, 0x06, 0x0a, 0x2b, 0x06, 0x01, 0x04, 0x01, 0x82, 0x37, 0x02,
> > >+ 0x01, 0x0f, 0x30, 0x25, 0x03, 0x01, 0x00, 0xa0, 0x20, 0xa2, 0x1e, 0x80,
> > >+ 0x1c, 0x00, 0x3c, 0x00, 0x3c, 0x00, 0x3c, 0x00, 0x4f, 0x00, 0x62, 0x00,
> > >+ 0x73, 0x00, 0x6f, 0x00, 0x6c, 0x00, 0x65, 0x00, 0x74, 0x00, 0x65, 0x00,
> > >+ 0x3e, 0x00, 0x3e, 0x00, 0x3e, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60,
> > >+ 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20
> > >+};
> >
> > What secret sauce is this? - Please, add comments where applicable. Add
> > references where needed for verification of correctness.
>
> A similar technique is also used in EDK2.
> I will add "decoded" version of data in a comment.
I found that this header is already embedded in signature's contentInfo.
So I will rework the code and remove this variable.
See some information about Windows authenticode's contentInfo:
http://download.microsoft.com/download/9/c/5/9c5b2167-8017-4bae-9fde-d599bac8184a/authenticode_pe.docx
and
https://github.com/rhboot/pesign/blob/master/src/content_info.c
Thanks,
-Takahiro Akashi
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Re: [U-Boot] [PATCH 02/11] dma: ti: k3-udma: Query DMA channels allocated from Resource Manager
On 19/11/19 12:57 AM, Grygorii Strashko wrote:
>
>
> On 14/11/2019 11:14, Vignesh Raghavendra wrote:
>> On K3 SoCs, DMA channels are shared across multiple entities, therefore
>> U-Boot DMA driver needs to query resource range from centralised
>> resource management controller i.e SystemFirmware and use DMA channels
>> allocated for A72 host. Add support for the same.
>>
>> Signed-off-by: Vignesh Raghavendra
>> ---
>> drivers/dma/ti/k3-udma-hwdef.h | 19
>> drivers/dma/ti/k3-udma.c | 179 -
>> 2 files changed, 171 insertions(+), 27 deletions(-)
>>
>> diff --git a/drivers/dma/ti/k3-udma-hwdef.h
>> b/drivers/dma/ti/k3-udma-hwdef.h
>> index c88399a815ea..228a44cb73cf 100644
>> --- a/drivers/dma/ti/k3-udma-hwdef.h
>> +++ b/drivers/dma/ti/k3-udma-hwdef.h
>> @@ -181,4 +181,23 @@
>> #define PDMA_STATIC_TR_Z(x) \
>> (((x) << PDMA_STATIC_TR_Z_SHIFT) & PDMA_STATIC_TR_Z_MASK)
>> +enum udma_rm_range {
>> + RM_RANGE_TCHAN = 0,
>> + RM_RANGE_RCHAN,
>> + RM_RANGE_RFLOW,
>> + RM_RANGE_LAST,
>> +};
>> +
>> +struct udma_tisci_rm {
>> + const struct ti_sci_handle *tisci;
>> + const struct ti_sci_rm_udmap_ops *tisci_udmap_ops;
>> + u32 tisci_dev_id;
>> +
>> + /* tisci information for PSI-L thread pairing/unpairing */
>> + const struct ti_sci_rm_psil_ops *tisci_psil_ops;
>> + u32 tisci_navss_dev_id;
>> +
>> + struct ti_sci_resource *rm_ranges[RM_RANGE_LAST];
>
> it looks like TBD. only rm_ranges field is used.
>
Oops, we have duplicates in udma_dev struct. I will drop those and make
use of above fields to be consistent with Linux UDMA driver code
>> +};
>> +
>> #endif /* K3_NAVSS_UDMA_HWDEF_H_ */
>> diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
>> index a5fc7809bc41..2380780879f5 100644
>> --- a/drivers/dma/ti/k3-udma.c
>> +++ b/drivers/dma/ti/k3-udma.c
>> @@ -11,12 +11,14 @@
>> #include
>> #include
>> #include
>> +#include
>> #include
>> #include
>> #include
>> #include
>> #include
>> #include
>> +#include
>> #include
>> #include
>> #include
>> @@ -30,6 +32,8 @@
>> #define RINGACC_RING_USE_PROXY (1)
>> #endif
>> +#define K3_UDMA_MAX_RFLOWS 1024
>> +
>> struct udma_chan;
>> enum udma_mmr {
>> @@ -64,9 +68,10 @@ struct udma_rflow {
>> };
>> struct udma_dev {
>> - struct device *dev;
>> + struct udevice *dev;
>> void __iomem *mmrs[MMR_LAST];
>> + struct udma_tisci_rm tisci_rm;
>> struct k3_nav_ringacc *ringacc;
>> u32 features;
>> @@ -78,6 +83,7 @@ struct udma_dev {
>> unsigned long *tchan_map;
>> unsigned long *rchan_map;
>> unsigned long *rflow_map;
>> + unsigned long *rflow_map_reserved;
>> struct udma_tchan *tchans;
>> struct udma_rchan *rchans;
>> @@ -535,6 +541,28 @@ static void udma_poll_completion(struct udma_chan
>> *uc, dma_addr_t *paddr)
>> }
>> }
>> +static struct udma_rflow *__udma_reserve_rflow(struct udma_dev *ud,
>> int id)
>> +{
>> + DECLARE_BITMAP(tmp, K3_UDMA_MAX_RFLOWS);
>> +
>> + if (id >= 0) {
>> + if (test_bit(id, ud->rflow_map)) {
>> + dev_err(ud->dev, "rflow%d is in use\n", id);
>> + return ERR_PTR(-ENOENT);
>> + }
>> + } else {
>> + bitmap_or(tmp, ud->rflow_map, ud->rflow_map_reserved,
>> + ud->rflow_cnt);
>> +
>> + id = find_next_zero_bit(tmp, ud->rflow_cnt, ud->rchan_cnt);
>> + if (id >= ud->rflow_cnt)
>> + return ERR_PTR(-ENOENT);
>> + }
>> +
>> + __set_bit(id, ud->rflow_map);
>> + return >rflows[id];
>> +}
>> +
>> #define UDMA_RESERVE_RESOURCE(res) \
>> static struct udma_##res *__udma_reserve_##res(struct udma_dev
>> *ud, \
>> int id) \
>> @@ -557,7 +585,6 @@ static struct udma_##res
>> *__udma_reserve_##res(struct udma_dev *ud, \
>> UDMA_RESERVE_RESOURCE(tchan);
>> UDMA_RESERVE_RESOURCE(rchan);
>> -UDMA_RESERVE_RESOURCE(rflow);
>> static int udma_get_tchan(struct udma_chan *uc)
>> {
>> @@ -1103,14 +1130,129 @@ static int udma_get_mmrs(struct udevice *dev)
>> return 0;
>> }
>> -#define UDMA_MAX_CHANNELS 192
>> +static int udma_setup_resources(struct udma_dev *ud)
>> +{
>> + struct udevice *dev = ud->dev;
>> + int ch_count, i;
>> + u32 cap2, cap3;
>> + struct ti_sci_resource_desc *rm_desc;
>> + struct ti_sci_resource *rm_res;
>> + struct udma_tisci_rm *tisci_rm = >tisci_rm;
>> + static const char * const range_names[] = { "ti,sci-rm-range-tchan",
>> + "ti,sci-rm-range-rchan",
>> + "ti,sci-rm-range-rflow" };
>> +
>> + cap2 = udma_read(ud->mmrs[MMR_GCFG], 0x28);
>> + cap3 = udma_read(ud->mmrs[MMR_GCFG], 0x2c);
>> +
>> + ud->rflow_cnt = cap3 & 0x3fff;
>> + ud->tchan_cnt = cap2 & 0x1ff;
>> + ud->echan_cnt = (cap2 >> 9) & 0x1ff;
>> + ud->rchan_cnt = (cap2 >> 18) &
[U-Boot] [PATCH 1/2] arm: arm11: allow unaligned memory access
The UEFI spec mandates that unaligned memory access should be enabled if supported by the CPU architecture. This patch implements the function unaligned_access() to set the enable unaligned data support flag and to clear the aligned flag in the system control register (SCTLR). It is called when UEFI related commands like bootefi are invoked. Reported-by: Cristian Ciocaltea Signed-off-by: Heinrich Schuchardt --- arch/arm/cpu/arm11/Makefile | 4 arch/arm/cpu/arm11/sctlr.S | 25 + 2 files changed, 29 insertions(+) create mode 100644 arch/arm/cpu/arm11/sctlr.S diff --git a/arch/arm/cpu/arm11/Makefile b/arch/arm/cpu/arm11/Makefile index 5d721fce12..5dfa01ae8d 100644 --- a/arch/arm/cpu/arm11/Makefile +++ b/arch/arm/cpu/arm11/Makefile @@ -4,3 +4,7 @@ # Wolfgang Denk, DENX Software Engineering, w...@denx.de. obj-y = cpu.o + +ifneq ($(CONFIG_SPL_BUILD),y) +obj-$(CONFIG_EFI_LOADER) += sctlr.o +endif diff --git a/arch/arm/cpu/arm11/sctlr.S b/arch/arm/cpu/arm11/sctlr.S new file mode 100644 index 00..74a7fc4a25 --- /dev/null +++ b/arch/arm/cpu/arm11/sctlr.S @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier:GPL-2.0+ */ +/* + * Routines to access the system control register + * + * Copyright (c) 2019 Heinrich Schuchardt + */ + +#include + +/* + * void allow_unaligned(void) - allow unaligned access + * + * This routine sets the enable unaligned data support flag and clears the + * aligned flag in the system control register. + * After calling this routine unaligned access does no longer leads to a + * data abort or undefined behavior but is handled by the CPU. + * For details see the "ARM Architecture Reference Manual" for ARMv6. + */ +ENTRY(allow_unaligned) + mrc p15, 0, r0, c1, c0, 0 @ load system control register + orr r0, r0, #1 << 22@ set unaligned data support flag + bic r0, r0, #2 @ clear aligned flag + mcr p15, 0, r0, c1, c0, 0 @ write system control register + bx lr @ return +ENDPROC(allow_unaligned) -- 2.24.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/2] efi_loader: enable EFI_LOADER on arm1136 and arm1176
With an implementation for allow_unaligned() available for arm1136 and arm1176 UEFI can be supported on these architectures. Signed-off-by: Heinrich Schuchardt --- lib/efi_loader/Kconfig | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index 2f40e485ef..7984d6f42d 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -1,8 +1,10 @@ config EFI_LOADER bool "Support running UEFI applications" depends on OF_LIBFDT && ( \ - ARM && (SYS_CPU = armv7 || \ - SYS_CPU = armv8) || \ + ARM && (SYS_CPU = arm1136 || \ + SYS_CPU = arm1176 || \ + SYS_CPU = armv7 || \ + SYS_CPU = armv8) || \ X86 || RISCV || SANDBOX) # We need EFI_STUB_64BIT to be set on x86_64 with EFI_STUB depends on !EFI_STUB || !X86_64 || EFI_STUB_64BIT -- 2.24.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 0/2] efi_loader: enable unaligned access on arm11
The UEFI specification mandates that unaligned access must be enabled on systems supporting it. Function unaligned access is implemented for arm1136 and arm1176. EFI_LOADER is enabled for these architectures. Heinrich Schuchardt (2): arm: arm11: allow unaligned memory access efi_loader: enable EFI_LOADER on arm1136 and arm1176 arch/arm/cpu/arm11/Makefile | 4 arch/arm/cpu/arm11/sctlr.S | 25 + lib/efi_loader/Kconfig | 6 -- 3 files changed, 33 insertions(+), 2 deletions(-) create mode 100644 arch/arm/cpu/arm11/sctlr.S -- 2.24.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 17/19] arm: dts: agilex: Add base dtsi and devkit dts
On Thu, Nov 14, 2019 at 3:46 AM Simon Goldschmidt
wrote:
>
> Am 08.11.2019 um 05:11 schrieb Ley Foon Tan:
> > Add device tree files for Agilex SoC platform.
> >
> > Based on Linux Commit ID 4b36daf9ada30.
>
> Based on? Why is this not a copy of the Linux devicetree files? The
> single difference should be in *-u-boot.dtsi. Being like this, I don't
> know what good it is to add the Linux commit ID if the files are
> obviously different... :-(
Some dts properties are missing in Linux dts. E.g:
- The clock dts information is not upstreamed in Linux yet.
- CCU node is not in Linux dts (Linux doesn't need to initialize CCU)
- Compatible string for rstmgr is different in Linux and Uboot.
So, there are some differences in Linux vs Uboot dts/dtsi.
I can remove Linux commit ID in commit message if it is confusing.
Regards
Ley Foon
>
> >
> > Signed-off-by: Ley Foon Tan
> >
> > ---
> > v6:
> > - Use new macro names from agilex-clock.h.
> >
> > v5:
> > - Add CCU DT node.
> >
> > v4:
> > - Add u-boot,dm-pre-reloc to sysmgr node.
> >
> > v3:
> > - Fixed bank 1 memory alias base address to 0x28000.
> > - Rename STRATIX10_*_CLK to SOCFPGA_SOC64_*_CLK.
> > - Include socfpga-soc64-clock.h
> > - Change to "intel,sdr-ctl-agilex" for SDRAM node.
> >
> > v2:
> > - Add clock property to device node.
> > - Change memory size to 8GB
> > - Enable i2c1
> >
> > Signed-off-by: Ley Foon Tan
> > ---
> > arch/arm/dts/Makefile | 1 +
> > arch/arm/dts/socfpga_agilex.dtsi | 500 ++
> > arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 79 +++
> > arch/arm/dts/socfpga_agilex_socdk.dts | 138 +
> > 4 files changed, 718 insertions(+)
> > create mode 100644 arch/arm/dts/socfpga_agilex.dtsi
> > create mode 100644 arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi
> > create mode 100644 arch/arm/dts/socfpga_agilex_socdk.dts
> >
> > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > index 47978e7685..d90ad835a4 100644
> > --- a/arch/arm/dts/Makefile
> > +++ b/arch/arm/dts/Makefile
> > @@ -319,6 +319,7 @@ dtb-$(CONFIG_TI816X) += dm8168-evm.dtb
> > dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb
> >
> > dtb-$(CONFIG_ARCH_SOCFPGA) += \
> > + socfpga_agilex_socdk.dtb\
> > socfpga_arria5_socdk.dtb\
> > socfpga_arria10_socdk_sdmmc.dtb \
> > socfpga_cyclone5_mcvevk.dtb \
> > diff --git a/arch/arm/dts/socfpga_agilex.dtsi
> > b/arch/arm/dts/socfpga_agilex.dtsi
> > new file mode 100644
> > index 00..9e578a0108
> > --- /dev/null
> > +++ b/arch/arm/dts/socfpga_agilex.dtsi
> > @@ -0,0 +1,500 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2019 Intel Corporation
> > + */
> > +
> > +/dts-v1/;
> > +#include
> > +#include
> > +#include
> > +
> > +/ {
> > + compatible = "intel,socfpga-agilex";
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu0: cpu@0 {
> > + compatible = "arm,cortex-a53";
> > + device_type = "cpu";
> > + enable-method = "psci";
> > + reg = <0x0>;
> > + };
> > +
> > + cpu1: cpu@1 {
> > + compatible = "arm,cortex-a53";
> > + device_type = "cpu";
> > + enable-method = "psci";
> > + reg = <0x1>;
> > + };
> > +
> > + cpu2: cpu@2 {
> > + compatible = "arm,cortex-a53";
> > + device_type = "cpu";
> > + enable-method = "psci";
> > + reg = <0x2>;
> > + };
> > +
> > + cpu3: cpu@3 {
> > + compatible = "arm,cortex-a53";
> > + device_type = "cpu";
> > + enable-method = "psci";
> > + reg = <0x3>;
> > + };
> > + };
> > +
> > + pmu {
> > + compatible = "arm,armv8-pmuv3";
> > + interrupts = <0 120 8>,
> > + <0 121 8>,
> > + <0 122 8>,
> > + <0 123 8>;
> > + interrupt-affinity = <>,
> > + <>,
> > + <>,
> > + <>;
> > + interrupt-parent = <>;
> > + };
> > +
> > + psci {
> > + compatible = "arm,psci-0.2";
> > + method = "smc";
> > + };
> > +
> > + intc: intc@fffc1000 {
> > + compatible = "arm,gic-400", "arm,cortex-a15-gic";
> > + #interrupt-cells = <3>;
> > + interrupt-controller;
> > + reg = <0x0 0xfffc1000 0x0 0x1000>,
> > + <0x0
Re: [U-Boot] [EXT] Re: [PATCHv2 1/2] PCI: layerscape: Add Support for ls2088 PCIe EP mode
> -Original Message- > From: Xiaowei Bao > Sent: 2019年5月22日 18:19 > To: Bin Meng ; Ramon Fried > ; Simon Glass > Cc: M.h. Lian ; Z.q. Hou ; > Mingkai Hu ; Hongbo Wang > ; York Sun ; > u-boot@lists.denx.de; Jiafei Pan > Subject: RE: [EXT] Re: [U-Boot] [PATCHv2 1/2] PCI: layerscape: Add Support > for ls2088 PCIe EP mode > > Hi Bin, > > -Original Message- > From: Bin Meng > Sent: 2019年5月17日 10:31 > To: Xiaowei Bao ; Ramon Fried > ; Simon Glass > Cc: M.h. Lian ; Z.q. Hou ; > Mingkai Hu ; Hongbo Wang > ; York Sun ; > u-boot@lists.denx.de; Jiafei Pan > Subject: Re: [EXT] Re: [U-Boot] [PATCHv2 1/2] PCI: layerscape: Add Support > for ls2088 PCIe EP mode > > Caution: EXT Email > > Hi Xiaowei, > > On Fri, May 17, 2019 at 10:23 AM Xiaowei Bao > wrote: > > > > > > > > -Original Message- > > From: Bin Meng > > Sent: 2019年5月16日 19:58 > > To: Xiaowei Bao > > Cc: M.h. Lian ; Z.q. Hou > > ; Mingkai Hu ; Hongbo > Wang > > ; York Sun ; > > u-boot@lists.denx.de; Jiafei Pan > > Subject: [EXT] Re: [U-Boot] [PATCHv2 1/2] PCI: layerscape: Add Support > > for ls2088 PCIe EP mode > > > > Caution: EXT Email > > > > Hi, > > > > On Thu, May 16, 2019 at 7:02 PM Xiaowei Bao > wrote: > > > > > > From: Xiaowei Bao > > > > > > Signed-off-by: hongbo.wang > > > Signed-off-by: Minghuan Lian > > > Signed-off-by: Xiaowei Bao > > > --- > > > v2: > > > - Add the NXP copyright and make the function readability. > > > > > > drivers/pci/pcie_layerscape.c | 117 > +++-- > > > drivers/pci/pcie_layerscape.h | 19 +-- > > > 2 files changed, 91 insertions(+), 45 deletions(-) > > > > > > > Could you please support the PCIe EP mode using driver model? > > [Xiaowei Bao] do you mean that add a EP driver model to separate the RC > and EP with their respective drivers? > > That's correct. > > > The purpose of adding EP support under u-boot is to configure the size of > > the > BAR when the PCIE controller is used as an EP device, and to ensure that the > configuration space of the EP can be accessed, so that when the RC scans the > bus, the EP device can be scanned, and we also can do simple MEM read and > write verification through the md command in u-boot shell. > > When entering the kernel, the kernel has its own PCIE EP framework, which > will reinitialize the EP device, contain of the inbound and outbound window > configure, MSI configuration and so no. > > > > It's not kernel PCIe EP framework. Ramon Fried recently added PCIe EP uclass > support to U-Boot and you should add NXP layerscape PCIe EP driver using the > new EP uclass. > [Xiaowei Bao] OK, thanks, I will add NXP layerscape PCIe EP driver using the > new EP uclass. Hi Bin and Ramon, Do you know how to test the EP device when use Ramon Fried EP framework patch, I don't know how to use it in u-boot, take our board as an example, we use the RCW to configure the PCIe controller work as EP or RC, never use the DTS, another issue, when our PCIe controller work in EP mode, we must set this controller is ready before RC scan the bus, our main purpose is that set the BAR size and make it ready in u-boot, ensure that the EP controller is ready when enter the kernel or other RC can scan the bus which the EP link, I am not sure whether should separate the EP and RC driver. Do you have any advice? Thanks Xiaowei > > See > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatchw > ork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D104952da > ta=02%7C01%7Cxiaowei.bao%40nxp.com%7Ca1e3da7d57a54520bd3008d6d > a6fbc4d%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C63693657 > 0769296107sdata=5CnEujEtYGbeiBEyv4iY5dXAapdQ65wCh1vs0quSVT > Y%3Dreserved=0 > > Regards, > Bin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCHv2 2/5] env: Remove useless CONFIG_ENV_SIZE_REDUND and fix ENV_IS_REDUND check
On Mon, Nov 18, 2019 at 7:10 PM Tom Rini wrote: > > We have CONFIG_ENV_SIZE_IS_REDUND but don't really use it. We have one > board where we can simply multiple CONFIG_ENV_SIZE by two for the same > result. The other place where we could but were not previously using > this is for where env_internal.h checks for if we should set > ENV_IS_EMBEDDED. This seems like the most likely use, historically, of > the variable, but it was not used. Add logic to check for this now. > > Cc: Wolfgang Denk > Cc: Joe Hershberger > Signed-off-by: Tom Rini Acked-by: Joe Hershberger ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [v4] armv8: ls1028a: disable multimedia feature when not supported
From: Yuantian Tang
Ls1028a has 4 personalities: Ls1028a, Ls1027a, Ls1017a and Ls1018a.
Both Ls1027a and Ls1017a personalities are lower functionality version
which doesn't support the multimedia subsystems, like LCD, GPU.
To disable multimedia feature on non-multimedia version, set the status
property to disabled in dts nodes.
Signed-off-by: Tang Yuantian
Signed-off-by: Wen He
---
arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 19917b207a..1de84b9260 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -401,6 +401,26 @@ void fdt_fixup_remove_jr(void *blob)
}
#endif
+#ifdef CONFIG_ARCH_LS1028A
+static void fdt_disable_multimedia(void *blob, unsigned int svr)
+{
+ int off;
+
+ if (!((svr >> 10) & 0x1))
+ return;
+
+ /* Disable eDP/LCD node */
+ off = fdt_node_offset_by_compatible(blob, -1, "arm,mali-dp500");
+ if (off != -FDT_ERR_NOTFOUND)
+ fdt_status_disabled(blob, off);
+
+ /* Disable GPU node */
+ off = fdt_node_offset_by_compatible(blob, -1, "fsl,ls1028a-gpu");
+ if (off != -FDT_ERR_NOTFOUND)
+ fdt_status_disabled(blob, off);
+}
+#endif
+
void ft_cpu_setup(void *blob, bd_t *bd)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
@@ -462,4 +482,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
#ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
fdt_fixup_msi(blob);
#endif
+#ifdef CONFIG_ARCH_LS1028A
+ fdt_disable_multimedia(blob, svr);
+#endif
}
--
2.17.1
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[U-Boot] [ANN] U-Boot v2020.01-rc3 released
Hey all, It's release day and here is v2020.01-rc3. I've continued to try and fix all of the issues that pop up as I get the MTD clean-up series ready to go. Still not done, but closer now. I think I've posted all of the patches for issues that series exposes and am working through the functional regressions there now. Once again, for a changelog, git log --merges v2020.01-rc2..v2020.01-rc3 and as always, I ask for more details in the PRs people send me so I can put them in the merge commit. I'm planning on doing -rc4 on December 9th and -rc5 on December 23rd with the release scheduled on January 6th. Thanks all! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 055/108] x86: fsp: Make graphics support common to FSP1/2
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>
> Both versions of FSP can use the same graphics support, so move it into
> the common directory.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/x86/lib/fsp/Makefile | 3 +++
> arch/x86/lib/{fsp1 => fsp}/fsp_graphics.c | 2 +-
> arch/x86/lib/fsp1/Makefile| 1 -
> 3 files changed, 4 insertions(+), 2 deletions(-)
> rename arch/x86/lib/{fsp1 => fsp}/fsp_graphics.c (98%)
>
Reviewed-by: Bin Meng
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Re: [U-Boot] [PATCH v3 052/108] x86: Don't imply libfdt or SPI flash in TPL
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote: > > We don't want to pull in libfdt if of-platdata is being used, since it > reduces the available code-size saves. Also, SPI flash is seldom needed > in TPL. > > Drop these options. > > Signed-off-by: Simon Glass > --- > > Changes in v3: > - Don't imply SPI flash either > - Rewrite commit message > > Changes in v2: None > > arch/Kconfig | 3 --- > 1 file changed, 3 deletions(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 051/108] x86: Set up the MTRR for SDRAM
On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote: > > Set up MTRRs for the FST SDRAM regions to improve performance. typo: FST -> FSP > > Signed-off-by: Simon Glass > --- > > Changes in v3: > - Move mtrr_add_request() call into this patch > > Changes in v2: None > > arch/x86/lib/fsp/fsp_dram.c | 5 + > 1 file changed, 5 insertions(+) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 0/4] Drop redundant code for eSDHC clock getting
Any comments? Thanks. > -Original Message- > From: Yangbo Lu > Sent: Tuesday, November 12, 2019 7:29 PM > To: u-boot@lists.denx.de > Cc: Peng Fan ; Feng Li ; Alison > Wang ; Sumit Garg ; Priyanka > Jain ; Mario Six ; Y.b. Lu > > Subject: [PATCH 0/4] Drop redundant code for eSDHC clock getting > > This patch-set is to drop redundant code for eSDHC clock getting. > The fsl_esdhc driver is able to simply get clock from gd->arch.sdhc_clk. > > The CI build link: > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Ftravis-ci > .org%2Fyangbolu1991%2Fu-boot-test%2Fbuilds%2F610688748data=02 > %7C01%7Cyangbo.lu%40nxp.com%7C631a406c77594a0d737808d767637ae2 > %7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637091549269378 > 396sdata=7FT0Vn3oB0dMB5K1csOnNF5O9o61QxHheVtOeBJjDJw%3D > reserved=0 > > Yangbo Lu (4): > mmc: fsl_esdhc: get clock directly from global data > arm: ls1021a: drop redundant board_mmc_init() > arm: drop eSDHC clock getting in mxc_get_clock() for layerscape > mpc83xx: remove unused clock.h > > arch/arm/cpu/armv7/ls102xa/clock.c | 2 -- > .../arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 15 > -- .../arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | 15 -- > arch/arm/include/asm/arch-fsl-layerscape/clock.h | 2 -- > arch/arm/include/asm/arch-ls102xa/clock.h | 1 - > arch/powerpc/include/asm/arch-mpc83xx/clock.h | 22 -- > board/freescale/ls1021aiot/ls1021aiot.c| 15 -- > board/freescale/ls1021aqds/ls1021aqds.c| 14 - > board/freescale/ls1021atwr/ls1021atwr.c| 14 - > drivers/mmc/fsl_esdhc.c| 34 > +++--- > 10 files changed, 4 insertions(+), 130 deletions(-) delete mode 100644 > arch/powerpc/include/asm/arch-mpc83xx/clock.h > > -- > 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 19/19] arm: socfpga: agilex: Enable Agilex SoC build
On Thu, Nov 14, 2019 at 3:49 AM Simon Goldschmidt wrote: > > Am 08.11.2019 um 05:11 schrieb Ley Foon Tan: > > Add build support for Agilex SoC. > > > > Signed-off-by: Ley Foon Tan > > Reviewed-by: Simon Goldschmidt > > > > --- > > v6: > > - Include socfpga_soc64_common.h. > > > > v5: > > - Enable NCORE_CACHE > > > > v3: > > - Disable CONFIG_USE_TINY_PRINTF > > > > v2: > > - Remove IC_CLK define, use clock DM method to get i2c clock > > - Change CONFIG_ENV_SIZE to 4KB since CONFIG_SPI_FLASH_USE_4K_SECTORS is > > enabled. > > --- > > arch/arm/Kconfig | 4 +- > > arch/arm/mach-socfpga/Kconfig | 16 +++ > > arch/arm/mach-socfpga/Makefile | 9 > > configs/socfpga_agilex_defconfig | 58 ++ > > include/configs/socfpga_agilex_socdk.h | 15 +++ > > 5 files changed, 100 insertions(+), 2 deletions(-) > > create mode 100644 configs/socfpga_agilex_defconfig > > create mode 100644 include/configs/socfpga_agilex_socdk.h > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > > index 629c5e8c2d..723bd5c619 100644 > > --- a/arch/arm/Kconfig > > +++ b/arch/arm/Kconfig > > @@ -905,7 +905,7 @@ config ARCH_SOCFPGA > > bool "Altera SOCFPGA family" > > select ARCH_EARLY_INIT_R > > select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10 > > - select ARM64 if TARGET_SOCFPGA_STRATIX10 > > + select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX > > select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 > > select DM > > select DM_SERIAL > > @@ -917,7 +917,7 @@ config ARCH_SOCFPGA > > select SPL_LIBGENERIC_SUPPORT > > select SPL_NAND_SUPPORT if SPL_NAND_DENALI > > select SPL_OF_CONTROL > > - select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 > > + select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || > > TARGET_SOCFPGA_AGILEX > > select SPL_SERIAL_SUPPORT > > select SPL_SYSRESET > > select SPL_WATCHDOG_SUPPORT > > diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig > > index fc0a54214f..922442a31f 100644 > > --- a/arch/arm/mach-socfpga/Kconfig > > +++ b/arch/arm/mach-socfpga/Kconfig > > @@ -26,6 +26,15 @@ config SYS_TEXT_BASE > > default 0x0140 if TARGET_SOCFPGA_ARRIA10 > > default 0x0140 if TARGET_SOCFPGA_GEN5 > > > > +config TARGET_SOCFPGA_AGILEX > > + bool > > + select ARMV8_MULTIENTRY > > + select ARMV8_SET_SMPEN > > + select ARMV8_SPIN_TABLE > > + select CLK > > + select NCORE_CACHE > > + select SPL_CLK if SPL > > + > > config TARGET_SOCFPGA_ARRIA5 > > bool > > select TARGET_SOCFPGA_GEN5 > > @@ -72,6 +81,10 @@ choice > > prompt "Altera SOCFPGA board select" > > optional > > > > +config TARGET_SOCFPGA_AGILEX_SOCDK > > + bool "Intel SOCFPGA SoCDK (Agilex)" > > + select TARGET_SOCFPGA_AGILEX > > + > > config TARGET_SOCFPGA_ARIES_MCVEVK > > bool "Aries MCVEVK (Cyclone V)" > > select TARGET_SOCFPGA_CYCLONE5 > > @@ -132,6 +145,7 @@ config TARGET_SOCFPGA_TERASIC_SOCKIT > > endchoice > > > > config SYS_BOARD > > + default "agilex-socdk" if TARGET_SOCFPGA_AGILEX_SOCDK > > default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK > > default "arria10-socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK > > default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK > > @@ -148,6 +162,7 @@ config SYS_BOARD > > default "vining_fpga" if TARGET_SOCFPGA_SOFTING_VINING_FPGA > > > > config SYS_VENDOR > > + default "intel" if TARGET_SOCFPGA_AGILEX_SOCDK > > default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK > > default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK > > default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK > > @@ -165,6 +180,7 @@ config SYS_SOC > > default "socfpga" > > > > config SYS_CONFIG_NAME > > + default "socfpga_agilex_socdk" if TARGET_SOCFPGA_AGILEX_SOCDK > > default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK > > default "socfpga_arria10_socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK > > default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK > > diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile > > index 81b6ffc675..418f543b20 100644 > > --- a/arch/arm/mach-socfpga/Makefile > > +++ b/arch/arm/mach-socfpga/Makefile > > @@ -41,6 +41,14 @@ endif > > > > ifdef CONFIG_TARGET_SOCFPGA_AGILEX > > obj-y += clock_manager_agilex.o > > +obj-y+= mailbox_s10.o > > +obj-y+= misc_s10.o > > +obj-y+= mmu-arm64_s10.o > > +obj-y+= reset_manager_s10.o > > +obj-y+= system_manager_s10.o > > +obj-y+= timer_s10.o > > +obj-y+= wrap_pinmux_config_s10.o > > +obj-y+= wrap_pll_config_s10.o > > endif > > > > ifdef CONFIG_SPL_BUILD > > @@ -59,6 +67,7 @@ obj-y += firewall.o > > obj-y += spl_s10.o > > endif > > ifdef CONFIG_TARGET_SOCFPGA_AGILEX > >
Re: [U-Boot] test: Coverage error tools/binman/etype/cbfs.py 97% on i686
Hi Heinrich, On Thu, 7 Nov 2019 at 23:27, Heinrich Schuchardt wrote: > > Hello Simon, > > make tests produces an error on i686 > > NameStmts Miss Cover > > tools/binman/etype/cbfs.py 90 397% > > TOTAL2639 1199% > > Type 'python3-coverage html' to get a report in htmlcov/index.html Can you try running that? I am not sure what is actually wrong here. > Coverage error: 99%, but should be 100% > ValueError: Test coverage failure > dtoc code coverage: > 100% > fdt code coverage: > 100% > Tests FAILED > make: *** [Makefile:2043: tests] Error 1 Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCHv2 2/5] env: Remove useless CONFIG_ENV_SIZE_REDUND and fix ENV_IS_REDUND check
On Mon, 18 Nov 2019 at 17:07, Tom Rini wrote: > > We have CONFIG_ENV_SIZE_IS_REDUND but don't really use it. We have one > board where we can simply multiple CONFIG_ENV_SIZE by two for the same > result. The other place where we could but were not previously using > this is for where env_internal.h checks for if we should set > ENV_IS_EMBEDDED. This seems like the most likely use, historically, of > the variable, but it was not used. Add logic to check for this now. > > Cc: Wolfgang Denk > Cc: Joe Hershberger > Signed-off-by: Tom Rini > --- > env/Kconfig| 7 --- > env/flash.c| 5 - > env/mmc.c | 5 - > env/nand.c | 5 - > env/sata.c | 2 +- > include/configs/MPC8308RDB.h | 1 - > include/configs/MPC8313ERDB_NAND.h | 1 - > include/configs/MPC8349EMDS.h | 1 - > include/configs/MPC8349EMDS_SDRAM.h| 1 - > include/configs/MigoR.h| 1 - > include/configs/TQM834x.h | 1 - > include/configs/UCP1020.h | 2 -- > include/configs/am335x_shc.h | 1 - > include/configs/apf27.h| 1 - > include/configs/apx4devkit.h | 1 - > include/configs/armadillo-800eva.h | 1 - > include/configs/bk4r1.h| 1 - > include/configs/blanche.h | 1 - > include/configs/caddy2.h | 1 - > include/configs/condor.h | 1 - > include/configs/dh_imx6.h | 1 - > include/configs/display5.h | 1 - > include/configs/draco.h| 1 - > include/configs/eagle.h| 1 - > include/configs/edb93xx.h | 1 - > include/configs/etamin.h | 1 - > include/configs/flea3.h| 1 - > include/configs/gardena-smart-gateway-mt7688.h | 1 - > include/configs/gazerbeam.h| 1 - > include/configs/gw_ventana.h | 1 - > include/configs/hrcon.h| 1 - > include/configs/ids8313.h | 1 - > include/configs/imx27lite-common.h | 1 - > include/configs/km/km-mpc83xx.h| 1 - > include/configs/km/km_arm.h| 1 - > include/configs/kp_imx53.h | 1 - > include/configs/m53menlo.h | 1 - > include/configs/mccmon6.h | 1 - > include/configs/mpc8308_p1m.h | 1 - > include/configs/mx28evk.h | 1 - > include/configs/mx35pdk.h | 1 - > include/configs/novena.h | 1 - > include/configs/pcm052.h | 1 - > include/configs/pcm058.h | 1 - > include/configs/pfla02.h | 1 - > include/configs/platinum.h | 1 - > include/configs/rastaban.h | 1 - > include/configs/rcar-gen2-common.h | 1 - > include/configs/rcar-gen3-common.h | 1 - > include/configs/sbc8349.h | 1 - > include/configs/sh7752evb.h| 1 - > include/configs/sh7753evb.h| 1 - > include/configs/sh7757lcr.h| 1 - > include/configs/sh7763rdp.h| 1 - > include/configs/sksimx6.h | 1 - > include/configs/socfpga_vining_fpga.h | 1 - > include/configs/socrates.h | 1 - > include/configs/strider.h | 1 - > include/configs/tam3517-common.h | 1 - > include/configs/thuban.h | 1 - > include/configs/titanium.h | 1 - > include/configs/vcoreiii.h | 1 - > include/configs/vct.h | 1 - > include/configs/ve8313.h | 1 - > include/configs/vining_2000.h | 1 - > include/configs/vme8349.h | 1 - > include/configs/woodburn_common.h | 1 - > include/configs/x600.h | 1 - > include/env_internal.h | 7 +-- > scripts/config_whitelist.txt | 1 - > tools/envcrc.c | 3 --- > 71 files changed, 6 insertions(+), 93 deletions(-) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] flashing and testing u-boot on chromebook_bob
Hi Sahaj, On Mon, 18 Nov 2019 at 00:09, Sahaj Sarup wrote: > > see in-line... > > On Mon, 18 Nov 2019 at 11:16, Simon Glass wrote: > > > > Hi Sahaj, > > > > On Sun, 17 Nov 2019 at 21:33, Sahaj Sarup wrote: > > > > > > Hi All, > > > > > > I was wondering if you could answer a few questions regarding u-boot > > > on Asus CP101 gru/bob ? > > > > > > - To test the u-boot image following README.chromium-chainload, > > > should I expect output on the display or do I need > > > CDD/SuzyQable Cable for serial? > > > > The display should work OK. I don't think that device supports CCD. > > Well since the display is blank and the uboot.bin and uboot.fit have > a correct 0x100 offset, I'll need to wait for my CCD cable to arrive. > Bob in fact supports ccd: > https://www.chromium.org/chromium-os/developer-information-for-chrome-os-devices > Although, i am confused as well since edp is supported, at least in > the dts files. Then I suspect it is broken. > > > > > > > > > - The CONFIG_SYS_TEXT_BASE is currently 0x0020 but > > > shouldn't it be CONFIG_SYS_TEXT_BASE=0x2100 > > > since its supposed to match CONFIG_KERNEL_START > > > from /chromiumos/platform/depthcharge/board/gru/defconfig > > > > Yes it is a bit annoying because the in-house bootloader doesn't > > support FIT properly. As I recall you have to set it to the exact > > address that it appears in the FIT. > > > > > > > > - In order to flash to spi, what's the procedure? > > > > The chain load option doesn't use SPI flash. You actually sign the > > image and put it into the kernel partition. > > > > I know... > > > Not much help for you, but there is a new feature on more recent > > Chromebooks called 'altfw' (alternative firmware) and if enabled, it > > lets you press 1 to boot U-Boot (only in dev mode). It only works on > > x86 devices so far and even then the device support is pretty basic if > > it boots at all. But the good thing is that you can put things into > > the altfw partition in SPI flash and they will boot without affecting > > the device. > > > > hmm.. but what about the whole remove the secure screw procedure and > enable flash writes? Not needed if you are chain loading, nor with altfw. You can use it if you build a raw U-Boot, but need a way of recovering it! > I know vaguely about it. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v1 1/1] cmd: adding malloc, math, and strcmp commands to u-boot
Hi Vladimir,
On Mon, 18 Nov 2019 at 16:27, Vladimir Olovyannikov
wrote:
>
> cmd: adding malloc, math, and strcmp u-boot commands.
U-Boot
> - malloc supports allocation of heap memory and free allocated memory
> via u-boot command line.
U-Boot (please fix globally)
> - mathprovides math commands such as "add", "sub", "mul", "div",
> "shift", ability to convert dec->hex.
> - strcmp provides string compare command feature for a script.
>
> All these commands are introduced to be used in u-boot scripts.
>
> Signed-off-by: Suji Velupiallai
> Signed-off-by: Vladimir Olovyannikov
> ---
> cmd/Kconfig | 21 ++
> cmd/Makefile | 4 +++
> cmd/malloc.c | 54
> cmd/math.c | 78
> cmd/strcmp.c | 28 +++
> 5 files changed, 185 insertions(+)
> create mode 100644 cmd/malloc.c
> create mode 100644 cmd/math.c
> create mode 100644 cmd/strcmp.c
>
> diff --git a/cmd/Kconfig b/cmd/Kconfig
> index cf982ff65e..f11903fe3d 100644
> --- a/cmd/Kconfig
> +++ b/cmd/Kconfig
> @@ -1286,6 +1286,20 @@ config CMD_ITEST
> help
> Return true/false on integer compare.
>
> +config CMD_MALLOC
> + bool "malloc"
> + default y
> + help
> + Supports allocation of heap memory and free allocated memory
> commands.
> + These commands are used by u-boot scripts.
> +
> +config CMD_MATH
> + bool "math"
> + default y
> + help
> + Provides math commands such as add, sub, mul, div, shift,
> + convert decimal to hex functionalities to be available in the
> script.
> +
> config CMD_SOURCE
> bool "source"
> default y
> @@ -1301,6 +1315,13 @@ config CMD_SETEXPR
> Also supports loading the value at a memory location into a
> variable.
> If CONFIG_REGEX is enabled, setexpr also supports a gsub function.
I think this would be better as three patches.
>
> +config CMD_STRCMP
> + bool "strcmp"
> + default y
> + help
> + Provides string compare command feature to u-boot scripts.
U-Boot
> +
> +
> endmenu
>
> menu "Android support commands"
> diff --git a/cmd/Makefile b/cmd/Makefile
> index 2d723ea0f0..942d60a0a2 100644
> --- a/cmd/Makefile
> +++ b/cmd/Makefile
> @@ -164,6 +164,10 @@ obj-$(CONFIG_CMD_GPT) += gpt.o
> obj-$(CONFIG_CMD_ETHSW) += ethsw.o
> obj-$(CONFIG_CMD_AXI) += axi.o
>
> +obj-$(CONFIG_CMD_MALLOC) += malloc.o
> +obj-$(CONFIG_CMD_MATH) += math.o
> +obj-$(CONFIG_CMD_STRCMP) += strcmp.o
> +
> # Power
> obj-$(CONFIG_CMD_PMIC) += pmic.o
> obj-$(CONFIG_CMD_REGULATOR) += regulator.o
> diff --git a/cmd/malloc.c b/cmd/malloc.c
> new file mode 100644
> index 00..e11e030a59
> --- /dev/null
> +++ b/cmd/malloc.c
> @@ -0,0 +1,54 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2019 Broadcom
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +static unsigned long get_value(const char *val)
Needs a comment
> +{
> + char *env = env_get((char *)val);
> +
> + if (env)
> + return simple_strtoul(env, NULL, 16);
> + else
> + return simple_strtoul(val, NULL, 16);
> +}
> +
> +static int do_malloc(cmd_tbl_t *cmdtp, int flag, int argc, char *const
> argv[])
> +{
> + char numberbuf[32];
> + void *mem;
const?
> +
> + if (argc < 3)
> + return cmd_usage(cmdtp);
> +
> + mem = memalign(ARCH_DMA_MINALIGN, get_value(argv[2]));
> + if (mem) {
> + sprintf(numberbuf, "%08x", (unsigned int)mem);
I think (ulong) would be better
> + env_set(argv[1], numberbuf);
blank line before return (please fix globally)
> + return 0;
> + }
> + return -EINVAL;
You can't return errors from command functions. Try printing an error
and return CMD_RET_FAILURE instead.
> +}
> +
> +static int do_free(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
> +{
> + if (argc < 2)
> + return cmd_usage(cmdtp);
> +
> + free((void *)get_value(argv[1]));
> + env_set(argv[1], "");
> + return 0;
> +}
> +
> +U_BOOT_CMD(malloc, 3, 0, do_malloc,
> + "Allocate memory from u-boot heap and store pointer in environment
> variable.",
> + "target size\n");
Needs better help - e.g. list arguments
> +
> +U_BOOT_CMD(free, 2, 0, do_free,
> + "Release memory from u-boot heap at target.", "target\n");
I wonder if it would be better to have a 'mem' command, then have 'mem
alloc', 'mem free', etc.?
> diff --git a/cmd/math.c b/cmd/math.c
> new file mode 100644
> index 00..17de5ef70b
> --- /dev/null
> +++ b/cmd/math.c
> @@ -0,0 +1,78 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2010-2017 Broadcom
> + */
> +
> +#include
> +#include
> +#include
> +
> +unsigned long long simple_strtoull(const char *cp, char **endp,
> +
Re: [U-Boot] [PATCH v1 1/1] cmd: pxe: Fix bootm argument count
On Mon, 18 Nov 2019 at 16:42, Vladimir Olovyannikov wrote: > > From: Abhishek Shah > > pxe command parses the init ramfs address(through initrd lable in > pxe config file), but is not passing it to bootm command as argument > as bootm_argc count is not increased. > > Signed-off-by: Abhishek Shah > Signed-off-by: Vladimir Olovyannikov > --- > cmd/pxe.c | 1 + > 1 file changed, 1 insertion(+) > Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Best way to use UCLASS_GPIO board id
On Mon, 18 Nov 2019 at 13:11, Michael Nazzareno Trimarchi wrote: > > Hi > > draft very quick from another one, draft below > Yes that looks more like it. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [RFC PATCH] spl: nand: use nand pagesize to fix loading FIT images
The nand read functions are page-aligned to the writesize of the NAND
device. This fixes loading non-page-aligned elements.
I ran into this issue while trying to convert the IMX6 Gateworks Ventana
board support to DM which requires NAND based FIT images to handle multiple
DTB's. I'm not sure how anyone could be using NAND based FIT images without
some sort of page size alignment other than the 1 byte in the current code.
Note that the RAW NAND drivers deal with byte offsets/counts instead of
sector offsets/counts like the blk devices but we are able to handle
the conversion within spl_nand.c.
Sending this as an RFC as I'm looking for the correct way to handle getting
the mtd_info to find the page size. Certainly using get_nand_dev_by_index(0)
is not the way to go as its not even implemented by many of the nand drivers.
Signed-off-by: Tim Harvey
---
common/spl/spl_nand.c | 14 +-
drivers/mtd/nand/raw/mxs_nand_spl.c | 4
2 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index 5f8a111..280ee3b 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -36,14 +36,16 @@ static int spl_nand_load_image(struct spl_image_info
*spl_image,
}
#else
-static ulong spl_nand_fit_read(struct spl_load_info *load, ulong offs,
- ulong size, void *dst)
+static ulong spl_nand_fit_read(struct spl_load_info *load, ulong page,
+ ulong pages, void *dst)
{
int ret;
+ ulong offs = page * load->bl_len;
+ ulong size = pages * load->bl_len;
ret = nand_spl_load_image(offs, size, dst);
if (!ret)
- return size;
+ return pages;
else
return 0;
}
@@ -51,6 +53,7 @@ static ulong spl_nand_fit_read(struct spl_load_info *load,
ulong offs,
static int spl_nand_load_element(struct spl_image_info *spl_image,
int offset, struct image_header *header)
{
+ struct mtd_info *mtd = get_nand_dev_by_index(0);
int err;
err = nand_spl_load_image(offset, sizeof(*header), (void *)header);
@@ -65,9 +68,10 @@ static int spl_nand_load_element(struct spl_image_info
*spl_image,
load.dev = NULL;
load.priv = NULL;
load.filename = NULL;
- load.bl_len = 1;
+ load.bl_len = mtd->writesize;
load.read = spl_nand_fit_read;
- return spl_load_simple_fit(spl_image, , offset, header);
+ return spl_load_simple_fit(spl_image, ,
+ offset / load.bl_len, header);
} else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER)) {
struct spl_load_info load;
diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c
b/drivers/mtd/nand/raw/mxs_nand_spl.c
index 975a91a..222fa5c 100644
--- a/drivers/mtd/nand/raw/mxs_nand_spl.c
+++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
@@ -11,6 +11,10 @@
static struct mtd_info *mtd;
static struct nand_chip nand_chip;
+struct mtd_info *get_nand_dev_by_index(int dev) {
+ return mtd;
+}
+
static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
int column, int page_addr)
{
--
2.7.4
___
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[U-Boot] [PATCH 2/2] common: Add DDR error logging (ELOG) support for Broadcom boards
From: Sheetal Tigadoli
Allow ELOG to use DDR for logging.
Signed-off-by: Sheetal Tigadoli
Signed-off-by: Vladimir Olovyannikov
---
common/Kconfig | 8
common/Makefile| 1 +
common/bcm_elog.c | 49 ++
common/console.c | 22 +
include/bcm_elog.h | 37 ++
5 files changed, 117 insertions(+)
create mode 100644 common/bcm_elog.c
create mode 100644 include/bcm_elog.h
diff --git a/common/Kconfig b/common/Kconfig
index d9ecf79e0a..f78296ec63 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -632,6 +632,14 @@ config SYS_STDIO_DEREGISTER
removed (for example a USB keyboard) then this option can be
enabled to ensure this is handled correctly.
+config BCM_ELOG
+ bool "Broadcom error logging support"
+ default n
+ help
+ Enables broadcom error logging support to be used with brcm
+ platforms, say Y to this option to enable the logging support.
+ If unsure, say N.
+
endmenu
menu "Logging"
diff --git a/common/Makefile b/common/Makefile
index 302d8beaf3..5f1338f281 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -95,6 +95,7 @@ else
obj-$(CONFIG_SPL_SERIAL_SUPPORT) += console.o
endif
else
+obj-$(CONFIG_BCM_ELOG) += bcm_elog.o
obj-y += console.o
endif # CONFIG_SPL_BUILD
diff --git a/common/bcm_elog.c b/common/bcm_elog.c
new file mode 100644
index 00..9f51636b24
--- /dev/null
+++ b/common/bcm_elog.c
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Broadcom
+ */
+
+#include
+
+/* Log one character */
+int log2ddr(const char ch)
+{
+ u32 offset, len;
+ uintptr_t base = BCM_ELOG_UBOOT_BASE;
+
+ offset = readl(base + BCM_ELOG_OFF_OFFSET);
+ len = readl(base + BCM_ELOG_LEN_OFFSET);
+ writeb(ch, base + offset);
+ offset++;
+
+ /* log buffer is now full and need to wrap around */
+ if (offset >= BCM_ELOG_UBOOT_SIZE)
+ offset = BCM_ELOG_HEADER_LEN;
+
+ /* only increment length when log buffer is not full */
+ if (len < BCM_ELOG_UBOOT_SIZE - BCM_ELOG_HEADER_LEN)
+ len++;
+
+ writel(offset, base + BCM_ELOG_OFF_OFFSET);
+ writel(len, base + BCM_ELOG_LEN_OFFSET);
+
+ return 0;
+}
+
+/* Routine to initialize error logging */
+void bcm_elog_init(uintptr_t base, u32 size)
+{
+ u32 val;
+
+ /*
+* If a valid signature is found, it means logging is already
+* initialize. In this case, we should not re-initialize the entry
+* header in the designated memory
+*/
+ val = readl(base + BCM_ELOG_SIG_OFFSET);
+ if (val != BCM_ELOG_SIG_VAL) {
+ writel(base + BCM_ELOG_SIG_OFFSET, BCM_ELOG_SIG_VAL);
+ writel(base + BCM_ELOG_OFF_OFFSET, BCM_ELOG_HEADER_LEN);
+ writel(base + BCM_ELOG_LEN_OFFSET, 0);
+ }
+}
diff --git a/common/console.c b/common/console.c
index 168ba60d0d..25ebd6e431 100644
--- a/common/console.c
+++ b/common/console.c
@@ -20,6 +20,10 @@
#include
#include
+#ifdef CONFIG_BCM_ELOG
+#include
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
static int on_console(const char *name, const char *value, enum env_op op,
@@ -536,6 +540,9 @@ void putc(const char c)
if (!gd->have_console)
return pre_console_putc(c);
+#ifdef CONFIG_BCM_ELOG
+ log2ddr(c);
+#endif
if (gd->flags & GD_FLG_DEVINIT) {
/* Send to the standard output */
fputc(stdout, c);
@@ -587,6 +594,17 @@ void puts(const char *s)
if (!gd->have_console)
return pre_console_puts(s);
+#ifdef CONFIG_BCM_ELOG
+ {
+ const char *tmp = s;
+
+ while (*tmp) {
+ int c = *tmp++;
+
+ log2ddr(c);
+ }
+ }
+#endif
if (gd->flags & GD_FLG_DEVINIT) {
/* Send to the standard output */
fputs(stdout, s);
@@ -776,6 +794,10 @@ int console_init_f(void)
print_pre_console_buffer(PRE_CONSOLE_FLUSHPOINT1_SERIAL);
+#ifdef CONFIG_BCM_ELOG
+ bcm_elog_init(BCM_ELOG_UBOOT_BASE, BCM_ELOG_UBOOT_SIZE);
+#endif
+
return 0;
}
diff --git a/include/bcm_elog.h b/include/bcm_elog.h
new file mode 100644
index 00..62352bf5a3
--- /dev/null
+++ b/include/bcm_elog.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Broadcom
+ *
+ */
+
+#ifndef __BCM_ELOG_H__
+#define __BCM_ELOG_H__
+
+#include
+#include
+
+/* Default AP error logging base address */
+#ifndef ELOG_AP_UART_LOG_BASE
+#define ELOG_AP_UART_LOG_BASE 0x8f11
+#endif
+
+/* Reserve 16K to store error logs */
+#define BCM_ELOG_UBOOT_BASEELOG_AP_UART_LOG_BASE
+#define BCM_ELOG_UBOOT_SIZE0x4000
+
+/* error logging signature */
+#define BCM_ELOG_SIG_OFFSET0x
+#define BCM_ELOG_SIG_VAL 0x75767971
+
+/*
[U-Boot] [PATCH 1/2] cmd: bcm: logsetup: Add Broadcom error log setup command
Some Broadcom platforms have ability to record event logs
by SCP.
Add a logsetup command which is used to perform initial
configuration of this log and move the command to
bcm/ directory to be used for Broadcom-specific
U-boot commands.
Signed-off-by: Vladimir Olovyannikov
---
cmd/Kconfig| 2 +
cmd/Makefile | 2 +
cmd/bcm/Kconfig| 12 ++
cmd/bcm/Makefile | 4 +
cmd/bcm/elog.h | 64 +++
cmd/bcm/logsetup.c | 433 +
6 files changed, 517 insertions(+)
create mode 100644 cmd/bcm/Kconfig
create mode 100644 cmd/bcm/Makefile
create mode 100644 cmd/bcm/elog.h
create mode 100644 cmd/bcm/logsetup.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index cf982ff65e..c13998887f 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -2119,4 +2119,6 @@ config CMD_UBIFS
help
UBIFS is a file system for flash devices which works on top of UBI.
+source cmd/bcm/Kconfig
+
endmenu
diff --git a/cmd/Makefile b/cmd/Makefile
index 2d723ea0f0..ae38bea901 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -183,6 +183,8 @@ endif # !CONFIG_SPL_BUILD
# core command
obj-y += nvedit.o
+obj-$(CONFIG_CMD_BCM_EXT_UTILS) += bcm/
+
obj-$(CONFIG_TI_COMMON_CMD_OPTIONS) += ti/
filechk_data_gz = (echo "static const char data_gz[] ="; cat $< |
scripts/bin2c; echo ";")
diff --git a/cmd/bcm/Kconfig b/cmd/bcm/Kconfig
new file mode 100644
index 00..189a45004e
--- /dev/null
+++ b/cmd/bcm/Kconfig
@@ -0,0 +1,12 @@
+menu "Broadcom Extended Utilities"
+
+config CMD_BCM_LOGSETUP
+ bool "Command to setup logging on Broadcom boards"
+ depends on TARGET_BCMNS3
+ default n
+ help
+ Support specific log setup on Broadcom SoCs. This command
+ allows checking if logging support is present, and update
+ log sections.
+
+endmenu
diff --git a/cmd/bcm/Makefile b/cmd/bcm/Makefile
new file mode 100644
index 00..c5ae924ea0
--- /dev/null
+++ b/cmd/bcm/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2019 Broadcom
+
+obj-$(CONFIG_CMD_BCM_LOGSETUP) += logsetup.o
diff --git a/cmd/bcm/elog.h b/cmd/bcm/elog.h
new file mode 100644
index 00..51317ac578
--- /dev/null
+++ b/cmd/bcm/elog.h
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2019 Broadcom
+ */
+
+#ifndef __ELOG_H__
+#define __ELOG_H__
+
+#define GLOBAL_META_HDR_SIG0x45524c47
+#define MAX_REC_COUNT 13
+#define MAX_REC_FORMAT 1
+#define MAX_SRC_TYPE 3
+#define MAX_NVM_TYPE 3
+/* A special type. Use defaults specified in CRMU config */
+#define NVM_DEFAULT0xff
+
+/* Max. number of cmd parameters per elog spec */
+#define PARAM_COUNT3
+
+#define REC_DESC_LENGTH8
+
+enum {
+ LOG_SETUP_CMD_VALIDATE_META,
+ LOG_SETUP_CMD_WRITE_META,
+ LOG_SETUP_CMD_ERASE,
+ LOG_SETUP_CMD_READ,
+ LOG_SETUP_CMD_CHECK
+};
+
+#pragma pack(push, 1)
+
+struct meta_record {
+ u8 record_type;
+ u8 record_format;
+ u8 src_mem_type;
+ u8 alt_src_mem_type;
+ u8 nvm_type;
+ char rec_desc[REC_DESC_LENGTH];
+ u64 src_mem_addr;
+ u64 alt_src_mem_addr;
+ u64 rec_addr;
+ u32 rec_size;
+ u32 sector_size;
+ u8 padding[3];
+};
+
+struct global_header {
+ u32 signature;
+ u32 sector_size;
+ u8 revision;
+ u8 rec_count;
+ u16 padding;
+};
+
+struct log_setup {
+ u32 cmd;
+ u32 params[PARAM_COUNT];
+ u32 result;
+ u32 ret_code;
+};
+
+#pragma pack(pop)
+
+#endif
diff --git a/cmd/bcm/logsetup.c b/cmd/bcm/logsetup.c
new file mode 100644
index 00..220518f884
--- /dev/null
+++ b/cmd/bcm/logsetup.c
@@ -0,0 +1,433 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 Broadcom
+ */
+
+/*
+ * Create a binary file ready to be flashed
+ * as a global meta for logging, from a source file.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "elog.h"
+
+#define FILE_LINE_BUF_SIZE 1024
+#define GLOBAL_PARAM_COUNT 3
+#define REC_PARAM_COUNT11
+
+#define GLOBAL_NAME"GLOBAL"
+#define RECORD_NAME"RECORD"
+
+#define MCU_IPC_MCU_CMD_ELOG_SETUP 0x84
+/* SPI write operations can be slow */
+#define DEFAULT_TIMEOUT_MS 1
+
+#define MCU_IPC_CMD_DONE_MASK 0x8000
+#define MCU_IPC_CMD_REPLY_MASK 0x3fff
+#define MCU_IPC_CMD_REPLY_SHIFT16
+
+#define MIN_ARGS_COUNT 3
+#define MAX_ARGS_COUNT 5
+#define SEP_STR","
+#define SUPPORTED_CMD "-s"
+#define CHK_HDR_CMD"-c"
+
+enum {
+ PARAM_GLOBAL,
+ PARAM_REC
+};
+
+static uintptr_t crmu_mbox0_address;
+
+/*
+ * Send a logging command to MCU patch for execution.
+ *
+ * Parameters:
+ * cmd: an IPC command code
+ * param: a pointer to parameters structure for IPC
+ * is_real_cmd:
[U-Boot] [PATCH INTERNAL v1 0/2] Add error logging support for Broadcom boards
Some Broadcom platforms have ability to record event/error logs (ELOGs) by SCP. This patch series adds such support: 1. logsetup command which is used to perform initial setup of ELOG. 2. Add support to use DDR as a runtime ELOG storage Sheetal Tigadoli (1): common: Add DDR error logging (ELOG) support for Broadcom boards Vladimir Olovyannikov (1): cmd: bcm: logsetup: Add Broadcom error log setup command cmd/Kconfig| 2 + cmd/Makefile | 2 + cmd/bcm/Kconfig| 12 ++ cmd/bcm/Makefile | 4 + cmd/bcm/elog.h | 64 +++ cmd/bcm/logsetup.c | 433 + common/Kconfig | 8 + common/Makefile| 1 + common/bcm_elog.c | 49 + common/console.c | 22 +++ include/bcm_elog.h | 37 11 files changed, 634 insertions(+) create mode 100644 cmd/bcm/Kconfig create mode 100644 cmd/bcm/Makefile create mode 100644 cmd/bcm/elog.h create mode 100644 cmd/bcm/logsetup.c create mode 100644 common/bcm_elog.c create mode 100644 include/bcm_elog.h -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v1 1/1] cmd: pxe: Fix bootm argument count
From: Abhishek Shah
pxe command parses the init ramfs address(through initrd lable in
pxe config file), but is not passing it to bootm command as argument
as bootm_argc count is not increased.
Signed-off-by: Abhishek Shah
Signed-off-by: Vladimir Olovyannikov
---
cmd/pxe.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/cmd/pxe.c b/cmd/pxe.c
index 2059975446..768e50aba6 100644
--- a/cmd/pxe.c
+++ b/cmd/pxe.c
@@ -663,6 +663,7 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label
*label)
strncpy(bootm_argv[2], env_get("ramdisk_addr_r"), 18);
strcat(bootm_argv[2], ":");
strncat(bootm_argv[2], env_get("filesize"), 9);
+ bootm_argc = 3;
}
if (get_relfile_envaddr(cmdtp, label->kernel, "kernel_addr_r") < 0) {
--
2.17.1
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[U-Boot] [PATCH v1 1/1] cmd: adding malloc, math, and strcmp commands to u-boot
cmd: adding malloc, math, and strcmp u-boot commands.
- malloc supports allocation of heap memory and free allocated memory
via u-boot command line.
- mathprovides math commands such as "add", "sub", "mul", "div",
"shift", ability to convert dec->hex.
- strcmp provides string compare command feature for a script.
All these commands are introduced to be used in u-boot scripts.
Signed-off-by: Suji Velupiallai
Signed-off-by: Vladimir Olovyannikov
---
cmd/Kconfig | 21 ++
cmd/Makefile | 4 +++
cmd/malloc.c | 54
cmd/math.c | 78
cmd/strcmp.c | 28 +++
5 files changed, 185 insertions(+)
create mode 100644 cmd/malloc.c
create mode 100644 cmd/math.c
create mode 100644 cmd/strcmp.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index cf982ff65e..f11903fe3d 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1286,6 +1286,20 @@ config CMD_ITEST
help
Return true/false on integer compare.
+config CMD_MALLOC
+ bool "malloc"
+ default y
+ help
+ Supports allocation of heap memory and free allocated memory commands.
+ These commands are used by u-boot scripts.
+
+config CMD_MATH
+ bool "math"
+ default y
+ help
+ Provides math commands such as add, sub, mul, div, shift,
+ convert decimal to hex functionalities to be available in the script.
+
config CMD_SOURCE
bool "source"
default y
@@ -1301,6 +1315,13 @@ config CMD_SETEXPR
Also supports loading the value at a memory location into a variable.
If CONFIG_REGEX is enabled, setexpr also supports a gsub function.
+config CMD_STRCMP
+ bool "strcmp"
+ default y
+ help
+ Provides string compare command feature to u-boot scripts.
+
+
endmenu
menu "Android support commands"
diff --git a/cmd/Makefile b/cmd/Makefile
index 2d723ea0f0..942d60a0a2 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -164,6 +164,10 @@ obj-$(CONFIG_CMD_GPT) += gpt.o
obj-$(CONFIG_CMD_ETHSW) += ethsw.o
obj-$(CONFIG_CMD_AXI) += axi.o
+obj-$(CONFIG_CMD_MALLOC) += malloc.o
+obj-$(CONFIG_CMD_MATH) += math.o
+obj-$(CONFIG_CMD_STRCMP) += strcmp.o
+
# Power
obj-$(CONFIG_CMD_PMIC) += pmic.o
obj-$(CONFIG_CMD_REGULATOR) += regulator.o
diff --git a/cmd/malloc.c b/cmd/malloc.c
new file mode 100644
index 00..e11e030a59
--- /dev/null
+++ b/cmd/malloc.c
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 Broadcom
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+static unsigned long get_value(const char *val)
+{
+ char *env = env_get((char *)val);
+
+ if (env)
+ return simple_strtoul(env, NULL, 16);
+ else
+ return simple_strtoul(val, NULL, 16);
+}
+
+static int do_malloc(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+ char numberbuf[32];
+ void *mem;
+
+ if (argc < 3)
+ return cmd_usage(cmdtp);
+
+ mem = memalign(ARCH_DMA_MINALIGN, get_value(argv[2]));
+ if (mem) {
+ sprintf(numberbuf, "%08x", (unsigned int)mem);
+ env_set(argv[1], numberbuf);
+ return 0;
+ }
+ return -EINVAL;
+}
+
+static int do_free(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+ if (argc < 2)
+ return cmd_usage(cmdtp);
+
+ free((void *)get_value(argv[1]));
+ env_set(argv[1], "");
+ return 0;
+}
+
+U_BOOT_CMD(malloc, 3, 0, do_malloc,
+ "Allocate memory from u-boot heap and store pointer in environment
variable.",
+ "target size\n");
+
+U_BOOT_CMD(free, 2, 0, do_free,
+ "Release memory from u-boot heap at target.", "target\n");
diff --git a/cmd/math.c b/cmd/math.c
new file mode 100644
index 00..17de5ef70b
--- /dev/null
+++ b/cmd/math.c
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2010-2017 Broadcom
+ */
+
+#include
+#include
+#include
+
+unsigned long long simple_strtoull(const char *cp, char **endp,
+ unsigned int base);
+
+static unsigned long long get_value(const char *val)
+{
+ char *env = env_get((char *)val);
+
+ if (env)
+ return simple_strtoull(env, NULL, 16);
+ else
+ return simple_strtoull(val, NULL, 16);
+}
+
+static unsigned long long get_value_base10(const char *val)
+{
+ char *env = env_get((char *)val);
+
+ if (env)
+ return simple_strtoull(env, NULL, 10);
+ else
+ return simple_strtoull(val, NULL, 10);
+}
+
+/*
+ * Top level addenv command
+ */
+#define IS_MATH_CMD(cmd, args) ((strcmp(argv[1], cmd) == 0) && \
+ (argc == (args)))
+
+static int do_math(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ char numberbuf[32];
+ unsigned long
[U-Boot] [PATCHv2 4/5] T1042RDB_PI_NAND_SECURE_BOOT: Guard t104xrdb SPL env code
We can only configure and set the environment in SPL when we have a particular environment location set that is not "nowhere" like it is in SECURE_BOOT designs. Update the code to reflect that. Cc: Priyanka Jain Signed-off-by: Tom Rini --- Changes in v2: - Rework the guard to be if env is nand/mmc/spi, redo commit message. --- board/freescale/t104xrdb/spl.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c index 7b0eb8edf51d..7df371df4df5 100644 --- a/board/freescale/t104xrdb/spl.c +++ b/board/freescale/t104xrdb/spl.c @@ -106,6 +106,8 @@ void board_init_r(gd_t *gd, ulong dest_addr) #endif /* relocate environment function pointers etc. */ +#if defined(CONFIG_ENV_IS_IN_NAND) || defined(CONFIG_ENV_IS_IN_MMC) || \ + defined(CONFIG_ENV_IS_IN_SPI_FLASH) #ifdef CONFIG_SPL_NAND_BOOT nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, (uchar *)CONFIG_ENV_ADDR); @@ -120,6 +122,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) #endif gd->env_addr = (ulong)(CONFIG_ENV_ADDR); gd->env_valid = ENV_VALID; +#endif i2c_init_all(); -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCHv2 3/5] fsl: layerscape: guard *env_sf_get_env_addr() on CONFIG_ENV_IS_IN_SPI_FLASH
These functions can only be built and used when we have
ENV_IS_IN_SPI_FLASH, use that as a guard.
Reviewed-by: Priyanka Jain
Signed-off-by: Tom Rini
---
Changes in v2:
- Update commit message, add reviewed-by
---
board/freescale/ls1043aqds/ls1043aqds.c | 2 +-
board/freescale/ls1046aqds/ls1046aqds.c | 2 +-
board/freescale/ls1088a/ls1088a.c | 2 ++
3 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c
b/board/freescale/ls1043aqds/ls1043aqds.c
index 45f006dab720..8c96b962b788 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -525,7 +525,7 @@ u16 flash_read16(void *addr)
return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00);
}
-#ifdef CONFIG_TFABOOT
+#if defined(CONFIG_TFABOOT) && defined(CONFIG_ENV_IS_IN_SPI_FLASH)
void *env_sf_get_env_addr(void)
{
return (void *)(CONFIG_SYS_FSL_QSPI_BASE + CONFIG_ENV_OFFSET);
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c
b/board/freescale/ls1046aqds/ls1046aqds.c
index 6a51dcd64913..aac5d9aa848f 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -482,7 +482,7 @@ u16 flash_read16(void *addr)
return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00);
}
-#ifdef CONFIG_TFABOOT
+#if defined(CONFIG_TFABOOT) && defined(CONFIG_ENV_IS_IN_SPI_FLASH)
void *env_sf_get_env_addr(void)
{
return (void *)(CONFIG_SYS_FSL_QSPI_BASE + CONFIG_ENV_OFFSET);
diff --git a/board/freescale/ls1088a/ls1088a.c
b/board/freescale/ls1088a/ls1088a.c
index f1592982a348..4ecf6dce6855 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -1008,8 +1008,10 @@ int is_flash_available(void)
}
#endif
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
void *env_sf_get_env_addr(void)
{
return (void *)(CONFIG_SYS_FSL_QSPI_BASE + CONFIG_ENV_OFFSET);
}
#endif
+#endif
--
2.17.1
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[U-Boot] [PATCHv2 2/5] env: Remove useless CONFIG_ENV_SIZE_REDUND and fix ENV_IS_REDUND check
We have CONFIG_ENV_SIZE_IS_REDUND but don't really use it. We have one board where we can simply multiple CONFIG_ENV_SIZE by two for the same result. The other place where we could but were not previously using this is for where env_internal.h checks for if we should set ENV_IS_EMBEDDED. This seems like the most likely use, historically, of the variable, but it was not used. Add logic to check for this now. Cc: Wolfgang Denk Cc: Joe Hershberger Signed-off-by: Tom Rini --- env/Kconfig| 7 --- env/flash.c| 5 - env/mmc.c | 5 - env/nand.c | 5 - env/sata.c | 2 +- include/configs/MPC8308RDB.h | 1 - include/configs/MPC8313ERDB_NAND.h | 1 - include/configs/MPC8349EMDS.h | 1 - include/configs/MPC8349EMDS_SDRAM.h| 1 - include/configs/MigoR.h| 1 - include/configs/TQM834x.h | 1 - include/configs/UCP1020.h | 2 -- include/configs/am335x_shc.h | 1 - include/configs/apf27.h| 1 - include/configs/apx4devkit.h | 1 - include/configs/armadillo-800eva.h | 1 - include/configs/bk4r1.h| 1 - include/configs/blanche.h | 1 - include/configs/caddy2.h | 1 - include/configs/condor.h | 1 - include/configs/dh_imx6.h | 1 - include/configs/display5.h | 1 - include/configs/draco.h| 1 - include/configs/eagle.h| 1 - include/configs/edb93xx.h | 1 - include/configs/etamin.h | 1 - include/configs/flea3.h| 1 - include/configs/gardena-smart-gateway-mt7688.h | 1 - include/configs/gazerbeam.h| 1 - include/configs/gw_ventana.h | 1 - include/configs/hrcon.h| 1 - include/configs/ids8313.h | 1 - include/configs/imx27lite-common.h | 1 - include/configs/km/km-mpc83xx.h| 1 - include/configs/km/km_arm.h| 1 - include/configs/kp_imx53.h | 1 - include/configs/m53menlo.h | 1 - include/configs/mccmon6.h | 1 - include/configs/mpc8308_p1m.h | 1 - include/configs/mx28evk.h | 1 - include/configs/mx35pdk.h | 1 - include/configs/novena.h | 1 - include/configs/pcm052.h | 1 - include/configs/pcm058.h | 1 - include/configs/pfla02.h | 1 - include/configs/platinum.h | 1 - include/configs/rastaban.h | 1 - include/configs/rcar-gen2-common.h | 1 - include/configs/rcar-gen3-common.h | 1 - include/configs/sbc8349.h | 1 - include/configs/sh7752evb.h| 1 - include/configs/sh7753evb.h| 1 - include/configs/sh7757lcr.h| 1 - include/configs/sh7763rdp.h| 1 - include/configs/sksimx6.h | 1 - include/configs/socfpga_vining_fpga.h | 1 - include/configs/socrates.h | 1 - include/configs/strider.h | 1 - include/configs/tam3517-common.h | 1 - include/configs/thuban.h | 1 - include/configs/titanium.h | 1 - include/configs/vcoreiii.h | 1 - include/configs/vct.h | 1 - include/configs/ve8313.h | 1 - include/configs/vining_2000.h | 1 - include/configs/vme8349.h | 1 - include/configs/woodburn_common.h | 1 - include/configs/x600.h | 1 - include/env_internal.h | 7 +-- scripts/config_whitelist.txt | 1 - tools/envcrc.c | 3 --- 71 files changed, 6 insertions(+), 93 deletions(-) diff --git a/env/Kconfig b/env/Kconfig index 337787051df8..0b97af42b1c8 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -132,7 +132,6 @@ config ENV_IS_IN_FLASH RAM, your target system will be dead. CONFIG_ENV_ADDR_REDUND - CONFIG_ENV_SIZE_REDUND These settings describe a second storage area used to hold a redundant copy of the environment data, so that there is @@ -195,12 +194,6 @@ config ENV_IS_IN_MMC This value is also in units of bytes, but must also be aligned to an MMC sector boundary. -
[U-Boot] [PATCHv2 1/5] smart-gateway-mt7688: Rework build time check for overwriting factory data
The board file has a build time check to ensure that we do not have the redundant environment overwriting the factory data. However, using the symbol CONFIG_ENV_SIZE_REDUND isn't strictly needed as that is always the same as CONFIG_ENV_SIZE. Use CONFIG_ENV_SIZE instead so that we can later drop CONFIG_ENV_SIZE_REDUND. Cc: Stefan Roese Signed-off-by: Tom Rini --- Changes in v2: - As pointed out by Stefan's review, I should address the usage of ENV_SIZE_REDUND here first and remove it second. --- board/gardena/smart-gateway-mt7688/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/gardena/smart-gateway-mt7688/board.c b/board/gardena/smart-gateway-mt7688/board.c index bd494c84fc80..e9ffd42a8a68 100644 --- a/board/gardena/smart-gateway-mt7688/board.c +++ b/board/gardena/smart-gateway-mt7688/board.c @@ -18,7 +18,7 @@ #define FACTORY_DATA_OFFS 0xc #define FACTORY_DATA_SECT_SIZE 0x1 -#if ((CONFIG_ENV_OFFSET_REDUND + CONFIG_ENV_SIZE_REDUND) > FACTORY_DATA_OFFS) +#if ((CONFIG_ENV_OFFSET_REDUND + CONFIG_ENV_SIZE) > FACTORY_DATA_OFFS) #error "U-Boot image with environment too big (overlapping with factory-data)!" #endif #define FACTORY_DATA_USER_OFFS 0x140 -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] asm: dma-mapping.h: Fix dma mapping functions
> From: Vignesh Raghavendra [mailto:vigne...@ti.com]
> Sent: Friday, November 15, 2019 7:55 PM
> To: Rick Jian-Zhi Chen(陳建志); Simon Glass; Bin Meng; Peng Fan; Joe Hershberger
> Cc: Vignesh Raghavendra; Ye Li; Anup Patel; Alexander Graf; Lukas Auer;
> Masahiro Yamada; u-boot@lists.denx.de; Lokesh Vutla; Tom Rini
> Subject: [PATCH 1/4] asm: dma-mapping.h: Fix dma mapping functions
>
> Subsystems such as USB expect dma_map_single() and dma_unmap_single() to do
> dcache flush/invalidate operations as required. For example, see
> drivers/usb/gadget/udc/udc-core.c::usb_gadget_map_request().
> Currently drivers do this locally, (see drivers/usb/dwc3/ep0.c,
> drivers/mtd/nand/raw/denali.c etc..) Update arch specific dma_map_single()
> and dma_unmap_single() APIs to do cache flush/invalidate operations, so that
> drivers need not implement them locally.
>
> Signed-off-by: Vignesh Raghavendra
Reviewed-by: Rick Chen
> ---
> arch/arm/include/asm/dma-mapping.h | 22 --
> arch/nds32/include/asm/dma-mapping.h | 22 --
> arch/riscv/include/asm/dma-mapping.h | 22 --
> arch/x86/include/asm/dma-mapping.h | 22 --
> 4 files changed, 80 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/include/asm/dma-mapping.h
> b/arch/arm/include/asm/dma-mapping.h
> index fc5b8f634d54..4b02320dfbd3 100644
> --- a/arch/arm/include/asm/dma-mapping.h
> +++ b/arch/arm/include/asm/dma-mapping.h
> @@ -7,7 +7,10 @@
> #ifndef __ASM_ARM_DMA_MAPPING_H
> #define __ASM_ARM_DMA_MAPPING_H
>
> +#include
> +#include
> #include
> +#include
>
> #definedma_mapping_error(x, y) 0
>
> @@ -25,12 +28,27 @@ static inline void dma_free_coherent(void *addr) static
> inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
>enum dma_data_direction dir)
> {
> - return (unsigned long)vaddr;
> + unsigned long addr = (unsigned long)vaddr;
> +
> + len = ALIGN(len, ARCH_DMA_MINALIGN);
> +
> + if (dir == DMA_FROM_DEVICE)
> + invalidate_dcache_range(addr, addr + len);
> + else
> + flush_dcache_range(addr, addr + len);
> +
> + return addr;
> }
>
> static inline void dma_unmap_single(volatile void *vaddr, size_t len,
> - unsigned long paddr)
> + enum dma_data_direction dir)
> {
> + unsigned long addr = (unsigned long)vaddr;
> +
> + len = ALIGN(len, ARCH_DMA_MINALIGN);
> +
> + if (dir != DMA_TO_DEVICE)
> + invalidate_dcache_range(addr, addr + len);
> }
>
> #endif /* __ASM_ARM_DMA_MAPPING_H */
> diff --git a/arch/nds32/include/asm/dma-mapping.h
> b/arch/nds32/include/asm/dma-mapping.h
> index e6808dc84089..33c4582f4614 100644
> --- a/arch/nds32/include/asm/dma-mapping.h
> +++ b/arch/nds32/include/asm/dma-mapping.h
> @@ -6,7 +6,10 @@
> #ifndef __ASM_NDS_DMA_MAPPING_H
> #define __ASM_NDS_DMA_MAPPING_H
>
> +#include
> +#include
> #include
> +#include
>
> static void *dma_alloc_coherent(size_t len, unsigned long *handle) { @@
> -17,12 +20,27 @@ static void *dma_alloc_coherent(size_t len, unsigned long
> *handle) static inline unsigned long dma_map_single(volatile void *vaddr,
> size_t len,
>enum dma_data_direction dir)
> {
> - return (unsigned long)vaddr;
> + unsigned long addr = (unsigned long)vaddr;
> +
> + len = ALIGN(len, ARCH_DMA_MINALIGN);
> +
> + if (dir == DMA_FROM_DEVICE)
> + invalidate_dcache_range(addr, addr + len);
> + else
> + flush_dcache_range(addr, addr + len);
> +
> + return addr;
> }
>
> static inline void dma_unmap_single(volatile void *vaddr, size_t len,
> - unsigned long paddr)
> + enum dma_data_direction dir)
> {
> + unsigned long addr = (unsigned long)vaddr;
> +
> + len = ALIGN(len, ARCH_DMA_MINALIGN);
> +
> + if (dir != DMA_TO_DEVICE)
> + invalidate_dcache_range(addr, addr + len);
> }
>
> #endif /* __ASM_NDS_DMA_MAPPING_H */
> diff --git a/arch/riscv/include/asm/dma-mapping.h
> b/arch/riscv/include/asm/dma-mapping.h
> index 3d930c90eceb..01f8a9219a38 100644
> --- a/arch/riscv/include/asm/dma-mapping.h
> +++ b/arch/riscv/include/asm/dma-mapping.h
> @@ -9,7 +9,10 @@
> #ifndef __ASM_RISCV_DMA_MAPPING_H
> #define __ASM_RISCV_DMA_MAPPING_H
>
> +#include
> +#include
> #include
> +#include
>
> #define dma_mapping_error(x, y)0
>
> @@ -27,12 +30,27 @@ static inline void dma_free_coherent(void *addr) static
> inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
>enum dma_data_direction dir)
> {
> - return (unsigned long)vaddr;
> + unsigned long addr = (unsigned long)vaddr;
> +
> + len = ALIGN(len,
Re: [U-Boot] [RFC PATCH] rockchip: tinker: Add automatic board discovery
On 2019/11/17 下午6:17, Michael Trimarchi wrote:
Add a way to detect board id and pcb id.
Is there a document for this from vendor? Are they also use these two ids?
If we can detect tinker vs tinker-s, then we don't need two board
config/dts, right?
Signed-off-by: Michael Trimarchi
---
arch/arm/dts/rk3288-tinker.dtsi | 33
board/rockchip/tinker_rk3288/tinker-rk3288.c | 83
2 files changed, 116 insertions(+)
diff --git a/arch/arm/dts/rk3288-tinker.dtsi b/arch/arm/dts/rk3288-tinker.dtsi
index 2f816af47f..67a0374050 100644
--- a/arch/arm/dts/rk3288-tinker.dtsi
+++ b/arch/arm/dts/rk3288-tinker.dtsi
@@ -53,6 +53,21 @@
#clock-cells = <0>;
};
+ board_info: board-info {
+ tinker,pcbid0 = < 8 GPIO_ACTIVE_HIGH>;
+ tinker,pcbid1 = < 9 GPIO_ACTIVE_HIGH>;
+ tinker,pcbid2 = < 10 GPIO_ACTIVE_HIGH>;
+ tinker,pid0 = < 1 GPIO_ACTIVE_HIGH>;
+ tinker,pid1 = < 2 GPIO_ACTIVE_HIGH>;
+ tinker,pid2 = < 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ board_control: board-control {
+ tinker,sdp = < 5 GPIO_ACTIVE_HIGH>;
+ tinker,usblimit = < 6 GPIO_ACTIVE_HIGH>;
+ tinker,maskemmc = < 7 GPIO_ACTIVE_HIGH>;
These three pin looks like not related to board detect?
Thanks,
- Kever
+ };
+
gpio-keys {
compatible = "gpio-keys";
autorepeat;
@@ -461,6 +476,10 @@
};
{
+ /* Pins that are not explicitely used by any devices */
+ pinctrl-names = "default";
+ pinctrl-0 = <_pin_hog>;
+
pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
drive-strength = <8>;
};
@@ -482,6 +501,20 @@
};
};
+ hog {
+ tinker_pin_hog: tinker-pin-hog {
+ rockchip,pins = <2 RK_PA1 RK_FUNC_GPIO _pull_up>,
/* project id 0 */
+ <2 RK_PA2 RK_FUNC_GPIO _pull_up>,
/* project id 1 */
+ <2 RK_PA3 RK_FUNC_GPIO _pull_up>,
/* project id 2 */
+ <2 RK_PB0 RK_FUNC_GPIO
_pull_none>, /* pcb id 0 */
+ <2 RK_PB1 RK_FUNC_GPIO
_pull_none>, /* pcb id 1 */
+ <2 RK_PB2 RK_FUNC_GPIO
_pull_none>, /* pcb id 2 */
+ <6 RK_PA5 RK_FUNC_GPIO
_pull_none>, /* sdp detect */
+ <6 RK_PA6 RK_FUNC_GPIO _pull_up>,
/* current limit */
+ <6 RK_PA7 RK_FUNC_GPIO
_pull_none>; /* emmc mask */
+ };
+ };
+
eth_phy {
eth_phy_pwr: eth-phy-pwr {
rockchip,pins = <0 6 RK_FUNC_GPIO _pull_none>;
diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c
b/board/rockchip/tinker_rk3288/tinker-rk3288.c
index 7a0c3c997d..7c65521f55 100644
--- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
+++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
@@ -5,12 +5,26 @@
#include
#include
+#include
+#include
+#include
#include
#include
#include
#include
#include
+enum project_id {
+ tinker_board_s = 0,
+ tinker_board = 7,
+};
+
+enum pcb_id {
+ SR,
+ ER,
+ PR,
+};
+
static int get_ethaddr_from_eeprom(u8 *addr)
{
int ret;
@@ -23,10 +37,14 @@ static int get_ethaddr_from_eeprom(u8 *addr)
return i2c_eeprom_read(dev, 0, addr, 6);
}
+int detect_board_init(void);
+
int rk3288_board_late_init(void)
{
u8 ethaddr[6];
+ detect_board_init();
+
if (get_ethaddr_from_eeprom(ethaddr))
return 0;
@@ -45,3 +63,68 @@ int mmc_get_env_dev(void)
return 1;
}
+
+int detect_board_init(void)
+{
+ int ret = 0, i;
+ ofnode node;
+ struct udevice *gpio_dev2 = NULL;
+ struct udevice *gpio_dev6 = NULL;
+ struct gpio_desc pcbid[3];
+ struct gpio_desc pid[3];
+ enum project_id prjid;
+ char gpio_name[64];
+ enum pcb_id pcbversion;
+
+ debug("%s: detect boad\n", __func__);
+
+ if (uclass_get_device_by_name(UCLASS_GPIO, "gpio2@ff79",
_dev2) ||
+ uclass_get_device_by_name(UCLASS_GPIO, "gpio6@ff7d",
_dev6)) {
+ printf("Could not get GPIO device.\n");
+ return -EINVAL;
+ }
+
+ ret = device_probe(gpio_dev2);
+ if (ret)
+ pr_err("%s - probe failed: %d\n", gpio_dev2->name, ret);
+
+ ret = device_probe(gpio_dev6);
+ if (ret)
+ pr_err("%s - probe failed: %d\n", gpio_dev6->name, ret);
+
+ node = ofnode_path("/board-info");
+ if (!ofnode_valid(node)) {
+ pr_err("%s: no /board-info node?\n", __func__);
+ return -EINVAL;
+ }
+
+ for (i = 0; i < 3; i++) {
+
Re: [U-Boot] [PATCH v4 4/5] doc: bindings: add mdio-handle property to ethernet nodes
On 11/18/2019 8:11 PM, Grygorii Strashko wrote: On 14/11/2019 17:04, Alex Marginean wrote: Adds an optional mdio-handle property which identifies a MDIO bus which can be scanned to find the relevant PHY. The property is ignored if phy-handle is also present. Signed-off-by: Alex Marginean --- doc/device-tree-bindings/net/ethernet.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/doc/device-tree-bindings/net/ethernet.txt b/doc/device-tree-bindings/net/ethernet.txt index 3fc360523b..9f9629f8d6 100644 --- a/doc/device-tree-bindings/net/ethernet.txt +++ b/doc/device-tree-bindings/net/ethernet.txt @@ -9,6 +9,8 @@ The following properties are common to the Ethernet controllers: - max-speed: number, specifies maximum speed in Mbit/s supported by the device; - max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than the maximum frame size (there's contradiction in ePAPR). +- mdio-handle: phandle, specifies a reference to a MDIO bus to be scanned to + find the PHY device. Ignored if phy-handle is also present. Sry, but it looks redundant. The Ethernet-controller bindings expects to use phy-handle which, in turn, allows to get MDIO node. The problem I'm trying to solve is not that I don't want to get the parent MDIO bus of a PHY referenced though phy-handle, but rather that I want to avoid having a specific U-Boot DT for each PHY plug-in card that could be used in our systems. I'll explain that in more detail. We have these QDS systems which support plug-in cards with PHYs on them. The way it works is that a given ethernet interface is associated with one of the QDS slots that should contain a plug-in card. Each of the slots has a MDIO bus associated with it, this bus is accessed through a MDIO MUX on the QDS board. The slot may be populated with one of several types of cards, which are different designs, have different types of PHYs and more importantly use different PHY addresses on the MDIO bus. So now the summary is that an Ethernet interface is associated with a MDIO bus that could be scanned to find the relevant PHY, while using the existing phy-handle binding requires that U-Boot DT is edited whenever a different card is plugged in, which is not practical and avoidable. So, if your platform is DT based and can use DT then it's reasonable to follow standard binding, which, in addition, allows to specify Ethernet PHY properties. Sure, and we do that on boards and for PHYs which are at fixed addresses on MDIO bus, but that is impractical with the swappable cards. More over, your series does not provide user for this new property. That's true, I was planning to send the QDS DT after this was merged, but if it helps I can add it to this patch set. Alex Personally I do not see even reasons to have doc/device-tree-bindings/net/ethernet.txt in u-boot and think we should follow [1] - phy-mode: string, operation mode of the PHY interface; supported values are "mii", "gmii", "sgmii", "qsgmii", "tbi", "rev-mii", "rmii", "rgmii", "rgmii-id", "rgmii-rxid", "rgmii-txid", "rtbi", "smii", "xgmii"; this is now a de-facto [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-controller.yaml ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] rockchip: tinker: Add automatic board discovery
Hi
On Mon, Nov 18, 2019 at 04:55:02PM +0530, Jagan Teki wrote:
> On Sun, Nov 17, 2019 at 3:47 PM Michael Trimarchi
> wrote:
> >
> > Add a way to detect board id and pcb id.
> >
> > Signed-off-by: Michael Trimarchi
> > ---
> > arch/arm/dts/rk3288-tinker.dtsi | 33
> > board/rockchip/tinker_rk3288/tinker-rk3288.c | 83
> > 2 files changed, 116 insertions(+)
> >
> > diff --git a/arch/arm/dts/rk3288-tinker.dtsi
> > b/arch/arm/dts/rk3288-tinker.dtsi
This is a way better
From 86cb476c82b0c5506ddd9fe2b9ec7126f3801e5c Mon Sep 17 00:00:00 2001
From: Michael Trimarchi
Date: Sun, 17 Nov 2019 11:11:59 +0100
Subject: [PATCH] rockchip: tinker: Add automatic board discovery
Add a way to detect board id and pcb id.
Signed-off-by: Michael Trimarchi
---
arch/arm/dts/rk3288-tinker.dtsi | 32 ++
arch/arm/mach-rockchip/rk3288/Kconfig | 4 +-
drivers/board/Kconfig | 5 +
drivers/board/Makefile| 1 +
drivers/board/tinker.c| 148 ++
drivers/board/tinker.h| 16 +++
6 files changed, 205 insertions(+), 1 deletion(-)
create mode 100644 drivers/board/tinker.c
create mode 100644 drivers/board/tinker.h
diff --git a/arch/arm/dts/rk3288-tinker.dtsi b/arch/arm/dts/rk3288-tinker.dtsi
index 2f816af47f..2704b18243 100644
--- a/arch/arm/dts/rk3288-tinker.dtsi
+++ b/arch/arm/dts/rk3288-tinker.dtsi
@@ -53,6 +53,26 @@
#clock-cells = <0>;
};
+ board_info: board-info {
+ compatible = "asus,board_tinker";
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+
+ ver-gpios = < 8 GPIO_ACTIVE_HIGH
+ 9 GPIO_ACTIVE_HIGH
+ 10 GPIO_ACTIVE_HIGH>;
+
+ board-gpios = < 1 GPIO_ACTIVE_HIGH
+ 2 GPIO_ACTIVE_HIGH
+ 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ board_control: board-control {
+ tinker,sdp = < 5 GPIO_ACTIVE_HIGH>;
+ tinker,usblimit = < 6 GPIO_ACTIVE_HIGH>;
+ tinker,maskemmc = < 7 GPIO_ACTIVE_HIGH>;
+ };
+
gpio-keys {
compatible = "gpio-keys";
autorepeat;
@@ -461,6 +481,7 @@
};
{
+
pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
drive-strength = <8>;
};
@@ -482,6 +503,17 @@
};
};
+ board {
+ board_pins: board_pins {
+ rockchip,pins = <2 RK_PA1 RK_FUNC_GPIO _pull_up>,
/* project id 0 */
+ <2 RK_PA2 RK_FUNC_GPIO _pull_up>,
/* project id 1 */
+ <2 RK_PA3 RK_FUNC_GPIO _pull_up>,
/* project id 2 */
+ <2 RK_PB0 RK_FUNC_GPIO
_pull_none>, /* pcb id 0 */
+ <2 RK_PB1 RK_FUNC_GPIO
_pull_none>, /* pcb id 1 */
+ <2 RK_PB2 RK_FUNC_GPIO
_pull_none>; /* pcb id 2 */
+ };
+ };
+
eth_phy {
eth_phy_pwr: eth-phy-pwr {
rockchip,pins = <0 6 RK_FUNC_GPIO _pull_none>;
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig
b/arch/arm/mach-rockchip/rk3288/Kconfig
index afb62fca78..a08cffd74f 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -123,7 +123,9 @@ config TARGET_ROCK2
config TARGET_TINKER_RK3288
bool "Tinker-RK3288"
-select BOARD_LATE_INIT
+ select BOARD_LATE_INIT
+ select BOARD
+ select BOARD_TINKER
select TPL
help
Tinker is a RK3288-based development board with 2 USB ports, HDMI,
diff --git a/drivers/board/Kconfig b/drivers/board/Kconfig
index 2a3fc9c049..5ab60c3f00 100644
--- a/drivers/board/Kconfig
+++ b/drivers/board/Kconfig
@@ -19,4 +19,9 @@ config BOARD_SANDBOX
help
Support querying device information for the Sandbox boards.
+config BOARD_TINKER
+ bool "Enable board driver for Tinker board"
+ help
+ Support querying device information for the Tinker boards.
+
endif
diff --git a/drivers/board/Makefile b/drivers/board/Makefile
index c8dab4fa0b..20378e4186 100644
--- a/drivers/board/Makefile
+++ b/drivers/board/Makefile
@@ -5,3 +5,4 @@
obj-$(CONFIG_BOARD) += board-uclass.o
obj-$(CONFIG_BOARD_GAZERBEAM) += gazerbeam.o
obj-$(CONFIG_BOARD_SANDBOX) += sandbox.o
+obj-$(CONFIG_BOARD_TINKER) += tinker.o
diff --git a/drivers/board/tinker.c b/drivers/board/tinker.c
new file mode 100644
index 00..129835e3ce
--- /dev/null
+++ b/drivers/board/tinker.c
@@ -0,0 +1,148 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2019
+ * Michael Trimarchi, Amarula Solutions Sro , mich...@amarulasolutions.com
+ *
+ */
+#include
+#include
+#include
+#include
+
+#include "tinker.h"
+
+/**
+ * struct
Re: [U-Boot] [PATCH v4 13/42] common: Move env_get_ip() to net.h
On Thu, Nov 14, 2019 at 2:05 PM Simon Glass wrote:
>
> This function relates to networking, so move it out of the common.h
> header file.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Tom Rini
Nit below, but...
Acked-by: Joe Hershberger
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
> include/common.h | 4
> include/net.h| 21 -
> 2 files changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/include/common.h b/include/common.h
> index f993e4bef3..4fda40cc1d 100644
> --- a/include/common.h
> +++ b/include/common.h
> @@ -319,10 +319,6 @@ intserial_printf (const char *fmt, ...)
>
> /* lib/net_utils.c */
> #include
> -static inline struct in_addr env_get_ip(char *var)
> -{
> - return string_to_ip(env_get(var));
> -}
>
> #include
>
> diff --git a/include/net.h b/include/net.h
> index d8d187d8af..11eca1bc6c 100644
> --- a/include/net.h
> +++ b/include/net.h
> @@ -829,7 +829,13 @@ static inline void net_random_ethaddr(uchar *addr)
> /* Convert an IP address to a string */
> void ip_to_string(struct in_addr x, char *s);
>
> -/* Convert a string to ip address */
> +/**
> + * string_to_ip() - Convert a string to ip address
> + *
> + * @s: String to conver, in the format format a.b.c.d, where each value is a
> + * decimal number from 0 to 255
> + * @return IP address, or 0 if invalid
> + */
Please drop this unrelated documentation update... it conflicts with [1]
[1] - https://patchwork.ozlabs.org/patch/1162279/
> struct in_addr string_to_ip(const char *s);
>
> /* Convert a VLAN id to a string */
> @@ -887,4 +893,17 @@ int update_tftp(ulong addr, char *interface, char
> *devstring);
> */
> void eth_parse_enetaddr(const char *addr, uint8_t *enetaddr);
>
> +/**
> + * env_get_ip() - Convert an environment value to to an ip address
> + *
> + * @var: Environment variable to convert. The value of this variable must be
> + * in the format format a.b.c.d, where each value is a decimal number
> from
> + * 0 to 255
> + * @return IP address, or 0 if invalid
> + */
> +static inline struct in_addr env_get_ip(char *var)
> +{
> + return string_to_ip(env_get(var));
> +}
> +
> #endif /* __NET_H__ */
> --
> 2.24.0.rc1.363.gb1bccd3e3d-goog
>
> ___
> U-Boot mailing list
> U-Boot@lists.denx.de
> https://lists.denx.de/listinfo/u-boot
___
U-Boot mailing list
U-Boot@lists.denx.de
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Re: [U-Boot] [PATCH v4 2/2] cmd: Add dtimg command
Hello Igor, hello Sam, We still have high hopes getting your response to https://patchwork.ozlabs.org/patch/958594/#2302310 If not given, we will proceed with implementing the proposal from https://patchwork.ozlabs.org/patch/958594/#2303657 -- Best Regards, Eugeniu ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] U-Boot for the Socfpga Arria10 board
Am 18.11.2019 um 19:08 schrieb Wolfgang Grandegger: Hello, I'm trying to understand what is necessary to get mainline U-Boot booting from the eMMC of an Arria10 board, which is significantly different to the Cyclone 5. Unfortunately, my playground here is limited to Cyclone 5, but from the U-Boot side and from what I know, booting an Arria 10 should be very similar to Cyclone5 (given that Stratix 10 and Agilex have a very much different boot flow). Do you have vendor U-Boot running? If not, I suggest to first get that running. The step to mainline U-Boot should then hopefully not be too hard. I'm playing with U-Boot v2019.10! I find some related documentation at [1]. Section "Arria 10 SoC - Boot from SD Card " seems to apply to the mainline U-Boot as well, at a first glance. Is there some similar doc for mainline U-Boot? What are the differences in mainline? Is it working or is something missing? So I need at least three partitions on the eMMC: 1. VFAT partition with u-boot.img and fit_spl_fpga.itb 2. A2 partition with 4x u-boot-spl.sfp (or u-boot-with-spl.sfp) 3. Linux partition Where do I specify the physical number of the partition 1.? In the config (or via menuconfig), set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION to y and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION contains the partition number Is it still possible to load the secondary bootloader (u-boot.img) from offset 0x800 of the A2 partition? It seems that "SPL_FS_FAT" breaks it. Yes, and no. Enable the above and enable CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR as well then CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR controls the offset in this partition. However, this uses CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION, which is not necessarily the same as the boot-ROM-detected A2 partition. Hope that helps. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Best way to use UCLASS_GPIO board id
Hi
draft very quick from another one, draft below
On Mon, Nov 18, 2019 at 5:39 PM Simon Glass wrote:
>
> Hi Michael,
>
> On Sun, 10 Nov 2019 at 02:08, Michael Nazzareno Trimarchi
> wrote:
> >
> > Hi Simon
> >
> > + project_id: project-id {
> > + pid0: bid0 {
> > + rockchip,pins = <2 RK_PA1 RK_FUNC_GPIO
> > _pull_up>;
> > + };
> > +
> > + pid1: pid1 {
> > + rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO
> > _pull_up>;
> > + };
> > +
> > + pid2: pid2 {
> > + rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO
> > _pull_up>;
> > + };
> > + };
> > +
> > + pcb_id: pcb-id {
> > + pcbid0: pcbid0 {
> > + rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO
> > _pull_none>;
> > + };
> > +
> > + pcbid1: pcbid1 {
> > + rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO
> > _pull_none>;
> > + };
> > +
> > + pcbid2: pcbid2 {
> > + rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO
> > _pull_none>;
> > + };
> > + };
> >
> >
> > I have defined the pins needed for tinker board and understand what
> > board revision is. Now I would like to use them from spl_board_init
> > and I have
> > them in dtb
> >
> > + {
> > + u-boot,dm-spl;
> > +};
> > +
> > + {
> > + u-boot,dm-spl;
> > +};
> > +
> > + {
> > + u-boot,dm-spl;
> > +};
> > +
> > + {
> > + u-boot,dm-spl;
> > +};
> > +
> > + {
> > + u-boot,dm-spl;
> > +};
> > +
> > + {
> > + u-boot,dm-spl;
> > +};
> > +
> > + {
> > + u-boot,dm-spl;
> > +};
> > +
> > + {
> > + u-boot,dm-spl;
> > +};
> >
> > Now is there a way to reference them easily after probe the UCLASS_GPIO?
> >
> > +int spl_board_init(void)
> > +{
> > + int ret;
> > + struct udevice *gpio_dev2 = NULL;
> > + struct udevice *gpio_dev6 = NULL;
> > +
> > + if (uclass_get_device_by_name(UCLASS_GPIO, "gpio2@ff79",
> > _dev2) ||
> > + uclass_get_device_by_name(UCLASS_GPIO, "gpio6@ff7d",
> > _dev6)) {
> > + printf("Could not get GPIO device.\n");
> > + return -EINVAL;
> > + }
> > +
> > + ret = device_probe(gpio_dev2);
> > + if (ret)
> > + pr_err("%s - probe failed: %d\n", gpio_dev2->name, ret);
> > +
> > + ret = device_probe(gpio_dev6);
> > + if (ret)
> > + pr_err("%s - probe failed: %d\n", gpio_dev6->name, ret);
> >
> >
> > Michael
>
> This seems pretty painful and doesn't really use pinctrl to best advantage.
>
> My suggestion would be to create a driver in UCLASS_BOARD and put the
> GPIOs into property, like:
>
> your-board {
>compatible = "...";
>board-id-gpios = < 5 GPIO_ACTIVE_HIGH
> 3 GPIO_ACTIVE_HIGH
> ...>;
>pinctrl=0 = <_id>;
>
> Then you can use gpio_request_list_by_name() to get the GPIOs and
> dm_gpio_get_values_as_int() to convert them to an int.
>
> For pinctrl, put it all in one node in pinctrl, like the others, e.g.
> ids {
>board_id: board-id {
>rockchip,pins = <0 5 RK_FUNC_GPIO _pull_up
>2 3 RK_FUNC_GPIO _pull_up
> ...>;
> };
> };
>
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2019
* Michael Trimarchi, Amarula Solutions Sro , mich...@amarulasolutions.com
*
*/
#include
#include
#include
#include
#include "tinker.h"
/**
* struct board_tinker_priv - Private data structure for the tinker board
* driver.
* @pcbid_gpios:GPIOs for the board's hardware variant GPIOs
* @projectid_gpios:GPIOs for the board's hardware version GPIOs
* @board_id:Container for the board's hardware variant
* @hwversion:Container for the board's hardware version
*/
struct board_tinker_priv {
struct gpio_desc ver_gpios[3];
struct gpio_desc board_gpios[3];
int board_id;
int hwversion;
};
/**
* _read_hwversion() - Read the hardware version from the board.
* @dev: The board device for which to read the hardware version.
*
* The hardware version read from the board (from hard-wired GPIOs) is stored
* in the private data structure of the driver to be used by other driver
* methods.
*
* Return: 0 if OK, -ve on error.
*/
static int _read_hwversion(struct udevice *dev)
{
struct board_tinker_priv *priv = dev_get_priv(dev);
int res;
res = gpio_request_list_by_name(dev, "ver-gpios", priv->ver_gpios,
ARRAY_SIZE(priv->ver_gpios),
GPIOD_IS_IN);
if (res < 0) {
debug("%s: Error getting GPIO list 'ver-gpios' (err = %d)\n",
dev->name, res);
return -ENODEV;
}
res = dm_gpio_get_values_as_int(priv->ver_gpios,
ARRAY_SIZE(priv->ver_gpios));
if (res < 0) {
debug("%s: Error reading HW version from expander (err = %d)\n",
[U-Boot] [PATCH 8/8] arm: dts: k3-am654-base-board-u-boot: change cpsw2g interface mode to rgmii-rxid
The AM654 SoC doesn't allow to disabling RGMII TX internal delay in CPSW2G
MAC. Hence, change CPSW2G interface mode to "rgmii-rxid" - RGMII with
internal RX delay provided by the PHY, the MAC will add an TX delay in this
case.
Signed-off-by: Grygorii Strashko
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 8589f76d23..bea80c5d00 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -336,13 +336,12 @@
reg = <0>;
/* TODO: phy reset:
TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */
ti,rx-internal-delay = ;
- ti,tx-internal-delay = ;
ti,fifo-depth = ;
};
};
_port1 {
- phy-mode = "rgmii-id";
+ phy-mode = "rgmii-rxid";
phy-handle = <>;
};
--
2.17.1
___
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[U-Boot] [PATCH 7/8] net: phy: dp83867: refactor rgmii configuration
Refactor SGMII configuration to group all settings together and reduce
number of MDIO transactions.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/dp83867.c | 75 +++
1 file changed, 36 insertions(+), 39 deletions(-)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index f9bb925646..a43793cd42 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -62,9 +62,9 @@
/* PHY CTRL bits */
#define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14
+#define DP83867_PHYCR_FIFO_DEPTH_MASK GENMASK(15, 14)
#define DP83867_PHYCR_RESERVED_MASKBIT(11)
#define DP83867_MDI_CROSSOVER 5
-#define DP83867_MDI_CROSSOVER_AUTO 2
#define DP83867_MDI_CROSSOVER_MDIX 2
#define DP83867_PHYCTRL_SGMIIEN0x0800
#define DP83867_PHYCTRL_RXFIFO_SHIFT 12
@@ -277,11 +277,11 @@ static int dp83867_config(struct phy_device *phydev)
}
if (phy_interface_is_rgmii(phydev)) {
- ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL,
- (DP83867_MDI_CROSSOVER_AUTO << DP83867_MDI_CROSSOVER) |
- (dp83867->fifo_depth <<
DP83867_PHYCR_FIFO_DEPTH_SHIFT));
- if (ret)
+ val = phy_read(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL);
+ if (val < 0)
goto err_out;
+ val &= ~DP83867_PHYCR_FIFO_DEPTH_MASK;
+ val |= (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT);
/* The code below checks if "port mirroring" N/A MODE4 has been
* enabled during power on bootstrap.
@@ -293,16 +293,39 @@ static int dp83867_config(struct phy_device *phydev)
* register's bit 11 (marked as RESERVED).
*/
- bs = phy_read_mmd(phydev, DP83867_DEVADDR,
- DP83867_STRAP_STS1);
- val = phy_read(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL);
- if (bs & DP83867_STRAP_STS1_RESERVED) {
+ bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS1);
+ if (bs & DP83867_STRAP_STS1_RESERVED)
val &= ~DP83867_PHYCR_RESERVED_MASK;
- phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL,
- val);
- }
- } else if (phy_interface_is_sgmii(phydev)) {
+ ret = phy_write(phydev, MDIO_DEVAD_NONE,
+ MII_DP83867_PHYCTRL, val);
+
+ val = phy_read_mmd(phydev, DP83867_DEVADDR,
+ DP83867_RGMIICTL);
+
+ val &= ~(DP83867_RGMII_TX_CLK_DELAY_EN |
+DP83867_RGMII_RX_CLK_DELAY_EN);
+ if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
+ val |= (DP83867_RGMII_TX_CLK_DELAY_EN |
+ DP83867_RGMII_RX_CLK_DELAY_EN);
+
+ if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
+ val |= DP83867_RGMII_TX_CLK_DELAY_EN;
+
+ if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
+ val |= DP83867_RGMII_RX_CLK_DELAY_EN;
+
+ phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL, val);
+
+ delay = (dp83867->rx_id_delay |
+ (dp83867->tx_id_delay <<
+ DP83867_RGMII_TX_CLK_DELAY_SHIFT));
+
+ phy_write_mmd(phydev, DP83867_DEVADDR,
+ DP83867_RGMIIDCTL, delay);
+ }
+
+ if (phy_interface_is_sgmii(phydev)) {
phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR,
(BMCR_ANENABLE | BMCR_FULLDPLX | BMCR_SPEED1000));
@@ -327,32 +350,6 @@ static int dp83867_config(struct phy_device *phydev)
phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_BISCR, 0x0);
}
- if (phy_interface_is_rgmii(phydev)) {
- val = phy_read_mmd(phydev, DP83867_DEVADDR,
- DP83867_RGMIICTL);
-
- val &= ~(DP83867_RGMII_TX_CLK_DELAY_EN |
-DP83867_RGMII_RX_CLK_DELAY_EN);
- if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
- val |= (DP83867_RGMII_TX_CLK_DELAY_EN |
- DP83867_RGMII_RX_CLK_DELAY_EN);
-
- if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
- val |= DP83867_RGMII_TX_CLK_DELAY_EN;
-
- if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
- val |= DP83867_RGMII_RX_CLK_DELAY_EN;
-
- phy_write_mmd(phydev, DP83867_DEVADDR,
- DP83867_RGMIICTL, val);
-
- delay = (dp83867->rx_id_delay |
-(dp83867->tx_id_delay <<
DP83867_RGMII_TX_CLK_DELAY_SHIFT));
[U-Boot] [PATCH 6/8] net: phy: dp83867: io impedance is not dependent on RGMII delay
Based on commit 27708eb5481b ("net: phy: dp83867: IO impedance is not
dependent on RGMII delay") of mainline linux kernel.
The driver would only set the IO impedance value when RGMII internal delays
were enabled. There is no reason for this. Move the IO impedance block
out of the RGMII delay block.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/dp83867.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 1721f6892b..f9bb925646 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -351,17 +351,17 @@ static int dp83867_config(struct phy_device *phydev)
phy_write_mmd(phydev, DP83867_DEVADDR,
DP83867_RGMIIDCTL, delay);
+ }
- if (dp83867->io_impedance >= 0) {
- val = phy_read_mmd(phydev,
- DP83867_DEVADDR,
- DP83867_IO_MUX_CFG);
- val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
- val |= dp83867->io_impedance &
- DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
- phy_write_mmd(phydev, DP83867_DEVADDR,
- DP83867_IO_MUX_CFG, val);
- }
+ if (dp83867->io_impedance >= 0) {
+ val = phy_read_mmd(phydev,
+ DP83867_DEVADDR,
+ DP83867_IO_MUX_CFG);
+ val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
+ val |= dp83867->io_impedance &
+ DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
+ phy_write_mmd(phydev, DP83867_DEVADDR,
+ DP83867_IO_MUX_CFG, val);
}
if (dp83867->port_mirroring != DP83867_PORT_MIRRORING_KEEP)
--
2.17.1
___
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[U-Boot] [PATCH 5/8] net: phy: dp83867: rework delay rgmii delay handling
Based on commit c11669a2757e ("net: phy: dp83867: Rework delay rgmii delay
handling") of mainline linux kernel.
The current code is assuming the reset default of the delay control
register was to have delay disabled. This is what the datasheet shows as
the register's initial value. However, that's not actually true: the
default is controlled by the PHY's pin strapping.
This patch:
- insures the other direction's delay is disabled If the interface mode is
selected as RX or TX delay only
- validates the delay values and fail if they are not in range
- checks if the board is strapped to have a delay and is configured to use
"rgmii" mode and warning is generated that "rgmii-id" should have been
used.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/dp83867.c | 76 ---
1 file changed, 64 insertions(+), 12 deletions(-)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index cd3c1c596a..1721f6892b 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -25,6 +25,7 @@
#define DP83867_CFG4 0x0031
#define DP83867_RGMIICTL 0x0032
#define DP83867_STRAP_STS1 0x006E
+#define DP83867_STRAP_STS2 0x006f
#define DP83867_RGMIIDCTL 0x0086
#define DP83867_IO_MUX_CFG 0x0170
@@ -52,6 +53,13 @@
/* STRAP_STS1 bits */
#define DP83867_STRAP_STS1_RESERVEDBIT(11)
+/* STRAP_STS2 bits */
+#define DP83867_STRAP_STS2_CLK_SKEW_TX_MASKGENMASK(6, 4)
+#define DP83867_STRAP_STS2_CLK_SKEW_TX_SHIFT 4
+#define DP83867_STRAP_STS2_CLK_SKEW_RX_MASKGENMASK(2, 0)
+#define DP83867_STRAP_STS2_CLK_SKEW_RX_SHIFT 0
+#define DP83867_STRAP_STS2_CLK_SKEW_NONE BIT(2)
+
/* PHY CTRL bits */
#define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14
#define DP83867_PHYCR_RESERVED_MASKBIT(11)
@@ -63,7 +71,9 @@
#define DP83867_PHYCTRL_TXFIFO_SHIFT 14
/* RGMIIDCTL bits */
+#define DP83867_RGMII_TX_CLK_DELAY_MAX 0xf
#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4
+#define DP83867_RGMII_RX_CLK_DELAY_MAX 0xf
/* CFG2 bits */
#define MII_DP83867_CFG2_SPEEDOPT_10EN 0x0040
@@ -74,8 +84,6 @@
#define MII_DP83867_CFG2_MASK 0x003F
/* User setting - can be taken from DTS */
-#define DEFAULT_RX_ID_DELAYDP83867_RGMIIDCTL_2_25_NS
-#define DEFAULT_TX_ID_DELAYDP83867_RGMIIDCTL_2_75_NS
#define DEFAULT_FIFO_DEPTH DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
/* IO_MUX_CFG bits */
@@ -98,8 +106,8 @@ enum {
};
struct dp83867_private {
- int rx_id_delay;
- int tx_id_delay;
+ u32 rx_id_delay;
+ u32 tx_id_delay;
int fifo_depth;
int io_impedance;
bool rxctrl_strap_quirk;
@@ -168,13 +176,55 @@ static int dp83867_of_init(struct phy_device *phydev)
if (ofnode_read_bool(node, "ti,dp83867-rxctrl-strap-quirk"))
dp83867->rxctrl_strap_quirk = true;
- dp83867->rx_id_delay = ofnode_read_u32_default(node,
- "ti,rx-internal-delay",
- DEFAULT_RX_ID_DELAY);
- dp83867->tx_id_delay = ofnode_read_u32_default(node,
- "ti,tx-internal-delay",
- DEFAULT_TX_ID_DELAY);
+ /* Existing behavior was to use default pin strapping delay in rgmii
+* mode, but rgmii should have meant no delay. Warn existing users.
+*/
+ if (phydev->interface == PHY_INTERFACE_MODE_RGMII) {
+ u16 val = phy_read_mmd(phydev, DP83867_DEVADDR,
+ DP83867_STRAP_STS2);
+ u16 txskew = (val & DP83867_STRAP_STS2_CLK_SKEW_TX_MASK) >>
+DP83867_STRAP_STS2_CLK_SKEW_TX_SHIFT;
+ u16 rxskew = (val & DP83867_STRAP_STS2_CLK_SKEW_RX_MASK) >>
+DP83867_STRAP_STS2_CLK_SKEW_RX_SHIFT;
+
+ if (txskew != DP83867_STRAP_STS2_CLK_SKEW_NONE ||
+ rxskew != DP83867_STRAP_STS2_CLK_SKEW_NONE)
+ pr_warn("PHY has delays via pin strapping, but phy-mode
= 'rgmii'\n"
+ "Should be 'rgmii-id' to use internal
delays\n");
+ }
+
+ /* RX delay *must* be specified if internal delay of RX is used. */
+ if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
+ phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
+ ret = ofnode_read_u32(node, "ti,rx-internal-delay",
+ >rx_id_delay);
+ if (ret) {
+ pr_debug("ti,rx-internal-delay must be specified\n");
+ return ret;
+ }
+ if (dp83867->rx_id_delay > DP83867_RGMII_RX_CLK_DELAY_MAX) {
+ pr_debug("ti,rx-internal-delay value of %u out of
range\n",
+dp83867->rx_id_delay);
+
[U-Boot] [PATCH 4/8] net: phy: dp83867: Add ability to disable output clock
Based on commit 13c83cf8af0d ("net: phy: dp83867: Add ability to disable
output clock") of mainline linux kernel.
Generally, the output clock pin is only used for testing and only serves as
a source of RF noise after this. It could be used to daisy-chain PHYs, but
this is uncommon. Since the PHY can disable the output, make doing so an
option. I do this by adding another enumeration to the allowed values of
ti,clk-output-sel.
The code was not using the value DP83867_CLK_O_SEL_REF_CLK as one might
expect: to select the REF_CLK as the output. Rather it meant "keep clock
output setting as is", which, depending on PHY strapping, might not be
outputting REF_CLK.
Change this so DP83867_CLK_O_SEL_REF_CLK means enable REF_CLK output.
Omitting the property will leave the setting as is (which was the previous
behavior in this case).
Out of range values were silently converted into DP83867_CLK_O_SEL_REF_CLK.
Change this so they generate an error.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/dp83867.c | 53 ++-
1 file changed, 36 insertions(+), 17 deletions(-)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 8dc2163342..cd3c1c596a 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -83,6 +83,7 @@
#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX0x0
#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN0x1f
+#define DP83867_IO_MUX_CFG_CLK_O_DISABLE BIT(6)
#define DP83867_IO_MUX_CFG_CLK_O_SEL_SHIFT 8
#define DP83867_IO_MUX_CFG_CLK_O_SEL_MASK \
GENMASK(0x1f, DP83867_IO_MUX_CFG_CLK_O_SEL_SHIFT)
@@ -103,6 +104,7 @@ struct dp83867_private {
int io_impedance;
bool rxctrl_strap_quirk;
int port_mirroring;
+ bool set_clk_output;
unsigned int clk_output_sel;
};
@@ -134,16 +136,28 @@ static int dp83867_of_init(struct phy_device *phydev)
{
struct dp83867_private *dp83867 = phydev->priv;
ofnode node;
- u16 val;
+ int ret;
node = phy_get_ofnode(phydev);
if (!ofnode_valid(node))
return -EINVAL;
- /* Keep the default value if ti,clk-output-sel is not set */
- dp83867->clk_output_sel =
- ofnode_read_u32_default(node, "ti,clk-output-sel",
- DP83867_CLK_O_SEL_REF_CLK);
+ /* Optional configuration */
+ ret = ofnode_read_u32(node, "ti,clk-output-sel",
+ >clk_output_sel);
+ /* If not set, keep default */
+ if (!ret) {
+ dp83867->set_clk_output = true;
+ /* Valid values are 0 to DP83867_CLK_O_SEL_REF_CLK or
+* DP83867_CLK_O_SEL_OFF.
+*/
+ if (dp83867->clk_output_sel > DP83867_CLK_O_SEL_REF_CLK &&
+ dp83867->clk_output_sel != DP83867_CLK_O_SEL_OFF) {
+ pr_debug("ti,clk-output-sel value %u out of range\n",
+dp83867->clk_output_sel);
+ return -EINVAL;
+ }
+ }
if (ofnode_read_bool(node, "ti,max-output-impedance"))
dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX;
@@ -170,18 +184,6 @@ static int dp83867_of_init(struct phy_device *phydev)
if (ofnode_read_bool(node, "enet-phy-lane-no-swap"))
dp83867->port_mirroring = DP83867_PORT_MIRRORING_DIS;
-
- /* Clock output selection if muxing property is set */
- if (dp83867->clk_output_sel != DP83867_CLK_O_SEL_REF_CLK) {
- val = phy_read_mmd(phydev, DP83867_DEVADDR,
- DP83867_IO_MUX_CFG);
- val &= ~DP83867_IO_MUX_CFG_CLK_O_SEL_MASK;
- val |= (dp83867->clk_output_sel <<
- DP83867_IO_MUX_CFG_CLK_O_SEL_SHIFT);
- phy_write_mmd(phydev, DP83867_DEVADDR,
- DP83867_IO_MUX_CFG, val);
- }
-
return 0;
}
#else
@@ -313,6 +315,23 @@ static int dp83867_config(struct phy_device *phydev)
if (dp83867->port_mirroring != DP83867_PORT_MIRRORING_KEEP)
dp83867_config_port_mirroring(phydev);
+ /* Clock output selection if muxing property is set */
+ if (dp83867->set_clk_output) {
+ val = phy_read_mmd(phydev, DP83867_DEVADDR,
+ DP83867_IO_MUX_CFG);
+
+ if (dp83867->clk_output_sel == DP83867_CLK_O_SEL_OFF) {
+ val |= DP83867_IO_MUX_CFG_CLK_O_DISABLE;
+ } else {
+ val &= ~(DP83867_IO_MUX_CFG_CLK_O_SEL_MASK |
+DP83867_IO_MUX_CFG_CLK_O_DISABLE);
+ val |= dp83867->clk_output_sel <<
+ DP83867_IO_MUX_CFG_CLK_O_SEL_SHIFT;
+ }
+ phy_write_mmd(phydev, DP83867_DEVADDR,
+ DP83867_IO_MUX_CFG,
[U-Boot] [PATCH 3/8] dt-bindings: phy: dp83867: Add documentation for disabling clock output
Based on commit 980066e6d964 ("dt-bindings: phy: dp83867: Add documentation
for disabling clock output") of mainline linux kernel.
The clock output is generally only used for testing and development and not
used to daisy-chain PHYs. It's just a source of RF noise afterward.
Add a mux value for "off". I've added it as another enumeration to the
output property. In the actual PHY, the mux and the output enable are
independently controllable. However, it doesn't seem useful to be able
to describe the mux setting when the output is disabled.
Document that PHY's default setting will be left as is if the property
is omitted.
Signed-off-by: Grygorii Strashko
---
doc/device-tree-bindings/net/ti,dp83867.txt | 6 --
include/dt-bindings/net/ti-dp83867.h| 3 ++-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt
b/doc/device-tree-bindings/net/ti,dp83867.txt
index 034146f5f8..268220964a 100644
--- a/doc/device-tree-bindings/net/ti,dp83867.txt
+++ b/doc/device-tree-bindings/net/ti,dp83867.txt
@@ -12,8 +12,10 @@ Required properties:
compensate for the board being designed with the lanes swapped.
- enet-phy-no-lane-swap - Indicates that PHY will disable swap of the
TX/RX lanes.
- - ti,clk-output-sel - Clock output select - see
dt-bindings/net/ti-dp83867.h
- for applicable values
+ - ti,clk-output-sel - Muxing option for CLK_OUT pin. See
dt-bindings/net/ti-dp83867.h
+ for applicable values. The CLK_OUT pin can also
+ be disabled by this property. When omitted, the
+ PHY's default will be left as is.
Default child nodes are standard Ethernet PHY device
nodes as described in doc/devicetree/bindings/net/ethernet.txt
diff --git a/include/dt-bindings/net/ti-dp83867.h
b/include/dt-bindings/net/ti-dp83867.h
index 85d08f6974..cde5aa7e27 100644
--- a/include/dt-bindings/net/ti-dp83867.h
+++ b/include/dt-bindings/net/ti-dp83867.h
@@ -45,5 +45,6 @@
#define DP83867_CLK_O_SEL_CHN_C_TCLK 0xA
#define DP83867_CLK_O_SEL_CHN_D_TCLK 0xB
#define DP83867_CLK_O_SEL_REF_CLK 0xC
-
+/* Special flag to indicate clock should be off */
+#define DP83867_CLK_O_SEL_OFF 0x
#endif
--
2.17.1
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[U-Boot] [PATCH 1/8] net: phy: ti: rename ti.c to dp83867.c
The driver ti.c is actually driver for TI DP83867x PHYs, so rename it
accordingly.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/Makefile| 2 +-
drivers/net/phy/{ti.c => dp83867.c} | 0
2 files changed, 1 insertion(+), 1 deletion(-)
rename drivers/net/phy/{ti.c => dp83867.c} (100%)
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 76b6197009..78955c57a8 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -25,7 +25,7 @@ obj-$(CONFIG_PHY_NATSEMI) += natsemi.o
obj-$(CONFIG_PHY_REALTEK) += realtek.o
obj-$(CONFIG_PHY_SMSC) += smsc.o
obj-$(CONFIG_PHY_TERANETICS) += teranetics.o
-obj-$(CONFIG_PHY_TI) += ti.o
+obj-$(CONFIG_PHY_TI) += dp83867.o
obj-$(CONFIG_PHY_XILINX) += xilinx_phy.o
obj-$(CONFIG_PHY_XILINX_GMII2RGMII) += xilinx_gmii2rgmii.o
obj-$(CONFIG_PHY_VITESSE) += vitesse.o
diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/dp83867.c
similarity index 100%
rename from drivers/net/phy/ti.c
rename to drivers/net/phy/dp83867.c
--
2.17.1
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[U-Boot] [PATCH 2/8] net: phy: dp83867: move static initialization to .probe()
Move static, one-time initialization to .probe() callback.
Signed-off-by: Grygorii Strashko
---
drivers/net/phy/dp83867.c | 29 +
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 7509936465..8dc2163342 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -204,18 +204,11 @@ static int dp83867_config(struct phy_device *phydev)
unsigned int val, delay, cfg2;
int ret, bs;
- if (!phydev->priv) {
- dp83867 = kzalloc(sizeof(*dp83867), GFP_KERNEL);
- if (!dp83867)
- return -ENOMEM;
+ dp83867 = (struct dp83867_private *)phydev->priv;
- phydev->priv = dp83867;
- ret = dp83867_of_init(phydev);
- if (ret)
- goto err_out;
- } else {
- dp83867 = (struct dp83867_private *)phydev->priv;
- }
+ ret = dp83867_of_init(phydev);
+ if (ret)
+ return ret;
/* Restart the PHY. */
val = phy_read(phydev, MDIO_DEVAD_NONE, DP83867_CTRL);
@@ -324,15 +317,27 @@ static int dp83867_config(struct phy_device *phydev)
return 0;
err_out:
- kfree(dp83867);
return ret;
}
+static int dp83867_probe(struct phy_device *phydev)
+{
+ struct dp83867_private *dp83867;
+
+ dp83867 = kzalloc(sizeof(*dp83867), GFP_KERNEL);
+ if (!dp83867)
+ return -ENOMEM;
+
+ phydev->priv = dp83867;
+ return 0;
+}
+
static struct phy_driver DP83867_driver = {
.name = "TI DP83867",
.uid = 0x2000a231,
.mask = 0xfff0,
.features = PHY_GBIT_FEATURES,
+ .probe = dp83867_probe,
.config = _config,
.startup = _startup,
.shutdown = _shutdown,
--
2.17.1
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[U-Boot] [PATCH 0/8] net: phy: dp83867: ti: sync with linux kernel and
hi
The intention of this series is to sync TI DP83867 driver with mainline Linux
kernel and ensure that proper PHY configuration in "rgmii-rxid" mode, which
is done in the Patch 8.
It also some code refactoring and optimization: patches 2,7.
Grygorii Strashko (8):
net: phy: ti: rename ti.c to dp83867.c
net: phy: dp83867: move static initialization to .probe()
dt-bindings: phy: dp83867: Add documentation for disabling clock
output
net: phy: dp83867: Add ability to disable output clock
net: phy: dp83867: rework delay rgmii delay handling
net: phy: dp83867: io impedance is not dependent on RGMII delay
net: phy: dp83867: refactor rgmii configuration
arm: dts: k3-am654-base-board-u-boot: change cpsw2g interface mode to
rgmii-rxid
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 3 +-
doc/device-tree-bindings/net/ti,dp83867.txt | 6 +-
drivers/net/phy/Makefile | 2 +-
drivers/net/phy/{ti.c => dp83867.c} | 243 ---
include/dt-bindings/net/ti-dp83867.h | 3 +-
5 files changed, 166 insertions(+), 91 deletions(-)
rename drivers/net/phy/{ti.c => dp83867.c} (63%)
--
2.17.1
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Re: [U-Boot] Please pull u-boot-video
On Mon, Nov 18, 2019 at 11:39:39AM +0100, Anatolij Gustschin wrote: > Hi Tom, > > Please pull video fixes for v2020.01. > > gitlab CI: > https://gitlab.denx.de/u-boot/custodians/u-boot-video/pipelines/1338 > Travis-CI: https://travis-ci.org/vdsao/u-boot-video/builds/613381403 > > Thanks, > Anatolij > > The following changes since commit a965a8b904093c9e6790d0460d18a144cefa5e42: > > Prepare v2020.01-rc2 (2019-11-11 21:01:10 -0500) > > are available in the Git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-video.git > tags/video-for-v2020.01-rc2 > > for you to fetch changes up to 754815b854258abf08f50e757599e8d15c9a85bd: > > video: stm32: remove the compatible "synopsys, dw-mipi-dsi" support > (2019-11-12 16:15:53 +0100) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 02/11] dma: ti: k3-udma: Query DMA channels allocated from Resource Manager
On 14/11/2019 11:14, Vignesh Raghavendra wrote:
On K3 SoCs, DMA channels are shared across multiple entities, therefore
U-Boot DMA driver needs to query resource range from centralised
resource management controller i.e SystemFirmware and use DMA channels
allocated for A72 host. Add support for the same.
Signed-off-by: Vignesh Raghavendra
---
drivers/dma/ti/k3-udma-hwdef.h | 19
drivers/dma/ti/k3-udma.c | 179 -
2 files changed, 171 insertions(+), 27 deletions(-)
diff --git a/drivers/dma/ti/k3-udma-hwdef.h b/drivers/dma/ti/k3-udma-hwdef.h
index c88399a815ea..228a44cb73cf 100644
--- a/drivers/dma/ti/k3-udma-hwdef.h
+++ b/drivers/dma/ti/k3-udma-hwdef.h
@@ -181,4 +181,23 @@
#define PDMA_STATIC_TR_Z(x) \
(((x) << PDMA_STATIC_TR_Z_SHIFT) & PDMA_STATIC_TR_Z_MASK)
+enum udma_rm_range {
+ RM_RANGE_TCHAN = 0,
+ RM_RANGE_RCHAN,
+ RM_RANGE_RFLOW,
+ RM_RANGE_LAST,
+};
+
+struct udma_tisci_rm {
+ const struct ti_sci_handle *tisci;
+ const struct ti_sci_rm_udmap_ops *tisci_udmap_ops;
+ u32 tisci_dev_id;
+
+ /* tisci information for PSI-L thread pairing/unpairing */
+ const struct ti_sci_rm_psil_ops *tisci_psil_ops;
+ u32 tisci_navss_dev_id;
+
+ struct ti_sci_resource *rm_ranges[RM_RANGE_LAST];
it looks like TBD. only rm_ranges field is used.
+};
+
#endif /* K3_NAVSS_UDMA_HWDEF_H_ */
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index a5fc7809bc41..2380780879f5 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -11,12 +11,14 @@
#include
#include
#include
+#include
#include
#include
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -30,6 +32,8 @@
#define RINGACC_RING_USE_PROXY(1)
#endif
+#define K3_UDMA_MAX_RFLOWS 1024
+
struct udma_chan;
enum udma_mmr {
@@ -64,9 +68,10 @@ struct udma_rflow {
};
struct udma_dev {
- struct device *dev;
+ struct udevice *dev;
void __iomem *mmrs[MMR_LAST];
+ struct udma_tisci_rm tisci_rm;
struct k3_nav_ringacc *ringacc;
u32 features;
@@ -78,6 +83,7 @@ struct udma_dev {
unsigned long *tchan_map;
unsigned long *rchan_map;
unsigned long *rflow_map;
+ unsigned long *rflow_map_reserved;
struct udma_tchan *tchans;
struct udma_rchan *rchans;
@@ -535,6 +541,28 @@ static void udma_poll_completion(struct udma_chan *uc,
dma_addr_t *paddr)
}
}
+static struct udma_rflow *__udma_reserve_rflow(struct udma_dev *ud, int id)
+{
+ DECLARE_BITMAP(tmp, K3_UDMA_MAX_RFLOWS);
+
+ if (id >= 0) {
+ if (test_bit(id, ud->rflow_map)) {
+ dev_err(ud->dev, "rflow%d is in use\n", id);
+ return ERR_PTR(-ENOENT);
+ }
+ } else {
+ bitmap_or(tmp, ud->rflow_map, ud->rflow_map_reserved,
+ ud->rflow_cnt);
+
+ id = find_next_zero_bit(tmp, ud->rflow_cnt, ud->rchan_cnt);
+ if (id >= ud->rflow_cnt)
+ return ERR_PTR(-ENOENT);
+ }
+
+ __set_bit(id, ud->rflow_map);
+ return >rflows[id];
+}
+
#define UDMA_RESERVE_RESOURCE(res)\
static struct udma_##res *__udma_reserve_##res(struct udma_dev *ud, \
int id) \
@@ -557,7 +585,6 @@ static struct udma_##res *__udma_reserve_##res(struct
udma_dev *ud, \
UDMA_RESERVE_RESOURCE(tchan);
UDMA_RESERVE_RESOURCE(rchan);
-UDMA_RESERVE_RESOURCE(rflow);
static int udma_get_tchan(struct udma_chan *uc)
{
@@ -1103,14 +1130,129 @@ static int udma_get_mmrs(struct udevice *dev)
return 0;
}
-#define UDMA_MAX_CHANNELS 192
+static int udma_setup_resources(struct udma_dev *ud)
+{
+ struct udevice *dev = ud->dev;
+ int ch_count, i;
+ u32 cap2, cap3;
+ struct ti_sci_resource_desc *rm_desc;
+ struct ti_sci_resource *rm_res;
+ struct udma_tisci_rm *tisci_rm = >tisci_rm;
+ static const char * const range_names[] = { "ti,sci-rm-range-tchan",
+ "ti,sci-rm-range-rchan",
+ "ti,sci-rm-range-rflow" };
+
+ cap2 = udma_read(ud->mmrs[MMR_GCFG], 0x28);
+ cap3 = udma_read(ud->mmrs[MMR_GCFG], 0x2c);
+
+ ud->rflow_cnt = cap3 & 0x3fff;
+ ud->tchan_cnt = cap2 & 0x1ff;
+ ud->echan_cnt = (cap2 >> 9) & 0x1ff;
+ ud->rchan_cnt = (cap2 >> 18) & 0x1ff;
+ ch_count = ud->tchan_cnt + ud->rchan_cnt;
+
+ ud->tchan_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->tchan_cnt),
+ sizeof(unsigned long), GFP_KERNEL);
+ ud->tchans = devm_kcalloc(dev, ud->tchan_cnt, sizeof(*ud->tchans),
+
Re: [U-Boot] [PATCH v4 4/5] doc: bindings: add mdio-handle property to ethernet nodes
On 14/11/2019 17:04, Alex Marginean wrote: Adds an optional mdio-handle property which identifies a MDIO bus which can be scanned to find the relevant PHY. The property is ignored if phy-handle is also present. Signed-off-by: Alex Marginean --- doc/device-tree-bindings/net/ethernet.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/doc/device-tree-bindings/net/ethernet.txt b/doc/device-tree-bindings/net/ethernet.txt index 3fc360523b..9f9629f8d6 100644 --- a/doc/device-tree-bindings/net/ethernet.txt +++ b/doc/device-tree-bindings/net/ethernet.txt @@ -9,6 +9,8 @@ The following properties are common to the Ethernet controllers: - max-speed: number, specifies maximum speed in Mbit/s supported by the device; - max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than the maximum frame size (there's contradiction in ePAPR). +- mdio-handle: phandle, specifies a reference to a MDIO bus to be scanned to + find the PHY device. Ignored if phy-handle is also present. Sry, but it looks redundant. The Ethernet-controller bindings expects to use phy-handle which, in turn, allows to get MDIO node. So, if your platform is DT based and can use DT then it's reasonable to follow standard binding, which, in addition, allows to specify Ethernet PHY properties. More over, your series does not provide user for this new property. Personally I do not see even reasons to have doc/device-tree-bindings/net/ethernet.txt in u-boot and think we should follow [1] - phy-mode: string, operation mode of the PHY interface; supported values are "mii", "gmii", "sgmii", "qsgmii", "tbi", "rev-mii", "rmii", "rgmii", "rgmii-id", "rgmii-rxid", "rgmii-txid", "rtbi", "smii", "xgmii"; this is now a de-facto [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-controller.yaml -- Best regards, grygorii ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v1] arm: socfpga: Enable Stratix10 SMMU access
On 11/18/19 7:14 PM, Thor Thayer wrote: > On 11/18/19 1:27 AM, Marek Vasut wrote: >> On 11/18/19 3:46 AM, Tan, Ley Foon wrote: >> [...] >> On 11/15/19 6:20 PM, Thor Thayer wrote: > > Enable TCU access through the Stratix10 CCU so that the SMMU can > access the SDRAM. > [...] Looks good to me. Ley, can you take a look? Thanks! >>> Looks good to me too. >>> But, if this patch plan to apply after Agilex patch series, then need >>> to rebase on top of it. >> >> Is this a fix or a feature ? >> > This is a feature. > > I didn't realize there was a refactoring. I will coordinate with Ley > Foon. Thanks. OK, sounds good, thanks. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v1] arm: socfpga: Enable Stratix10 SMMU access
On 11/18/19 1:27 AM, Marek Vasut wrote: On 11/18/19 3:46 AM, Tan, Ley Foon wrote: [...] On 11/15/19 6:20 PM, Thor Thayer wrote: Enable TCU access through the Stratix10 CCU so that the SMMU can access the SDRAM. [...] Looks good to me. Ley, can you take a look? Thanks! Looks good to me too. But, if this patch plan to apply after Agilex patch series, then need to rebase on top of it. Is this a fix or a feature ? This is a feature. I didn't realize there was a refactoring. I will coordinate with Ley Foon. Thanks. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] U-Boot for the Socfpga Arria10 board
Hello, I'm trying to understand what is necessary to get mainline U-Boot booting from the eMMC of an Arria10 board, which is significantly different to the Cyclone 5. I'm playing with U-Boot v2019.10! I find some related documentation at [1]. Section "Arria 10 SoC - Boot from SD Card " seems to apply to the mainline U-Boot as well, at a first glance. Is there some similar doc for mainline U-Boot? What are the differences in mainline? Is it working or is something missing? So I need at least three partitions on the eMMC: 1. VFAT partition with u-boot.img and fit_spl_fpga.itb 2. A2 partition with 4x u-boot-spl.sfp (or u-boot-with-spl.sfp) 3. Linux partition Where do I specify the physical number of the partition 1.? Is it still possible to load the secondary bootloader (u-boot.img) from offset 0x800 of the A2 partition? It seems that "SPL_FS_FAT" breaks it. [1] https://rocketboards.org/foswiki/Documentation/BuildingBootloader TIA, Wolfgang ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] uboot environment in ubi on qspi flash
Hello! I want to store the uboot environment in the ubi partition in the qspi flash on xilinx zynqmp. There is an error message during the start: Loading Environment from UBI... Could not find a valid device for spi0.0 Partition ubi not found! ** Cannot find mtd partition "ubi" After running 'sf probe' manually I can save the environment to the ubi volume. I wonder how to make the uboot probe the qspi flash before trying to attach the ubi partition? Here is my configuration: defconfig: CONFIG_ENV_IS_IN_UBI=y CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:0x8(uboot-spl),0x20(uboot),-(ubi)" include/configs/spb4.h: #define CONFIG_ENV_UBI_PART "ubi" #define CONFIG_ENV_UBI_VOLUME "uboot-env" #define CONFIG_ENV_SIZE 0x2 Kind regards Alexander ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] ppc/km: enable DM driver support in all defconfigs
This is the first step to use DM support for the KM powerpc boards. Signed-off-by: Holger Brunck CC: Mario Six CC: Wolfgang Denk CC: Valentin Longchamp --- Changes for v2: - fix typo in e-mail address configs/kmcoge4_defconfig | 2 ++ configs/kmcoge5ne_defconfig | 2 ++ configs/kmeter1_defconfig | 2 ++ configs/kmopti2_defconfig | 2 ++ configs/kmsupx5_defconfig | 2 ++ configs/kmtegr1_defconfig | 2 ++ configs/kmtepr2_defconfig | 2 ++ configs/suvd3_defconfig | 2 ++ configs/tuge1_defconfig | 2 ++ configs/tuxx1_defconfig | 2 ++ 10 files changed, 20 insertions(+) diff --git a/configs/kmcoge4_defconfig b/configs/kmcoge4_defconfig index 3b7ee334ab..595804245c 100644 --- a/configs/kmcoge4_defconfig +++ b/configs/kmcoge4_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xfff4 CONFIG_SYS_BOOTCOUNT_ADDR=0xFB20 CONFIG_MPC85xx=y CONFIG_TARGET_KMP204X=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -37,6 +38,7 @@ CONFIG_CMD_UBI=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index edd9af9adb..971fa9b349 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -152,6 +152,7 @@ CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_DBYP_PLL_BYPASSED=y CONFIG_LCRR_EADC_2=y CONFIG_LCRR_CLKDIV_4=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_MISC_INIT_R=y @@ -178,6 +179,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index eb598b8ccc..21f0c4dd6e 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -116,6 +116,7 @@ CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_DBYP_PLL_BYPASSED=y CONFIG_LCRR_EADC_2=y CONFIG_LCRR_CLKDIV_4=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_MISC_INIT_R=y @@ -141,6 +142,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index c33b256608..c04f798d5b 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -136,6 +136,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_MISC_INIT_R=y @@ -161,6 +162,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 2f7cca5952..3da0949963 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -116,6 +116,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_MISC_INIT_R=y @@ -141,6 +142,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index d8a84658dc..7bda28c29d 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -114,6 +114,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="KMTEGR1" @@ -142,6 +143,7 @@ CONFIG_CMD_DIAG=y CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index 8e838eac09..97bdc19dc8 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -136,6 +136,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y
[U-Boot] [PATCH] ppc/km: enable DM driver support in all defconfigs
This is the first step to use DM support for the KM powerpc boards. Signed-off-by: Holger Brunck CC: Mario Six CC: Wolfgang Denk CC: Valentin Longchamp --- configs/kmcoge4_defconfig | 2 ++ configs/kmcoge5ne_defconfig | 2 ++ configs/kmeter1_defconfig | 2 ++ configs/kmopti2_defconfig | 2 ++ configs/kmsupx5_defconfig | 2 ++ configs/kmtegr1_defconfig | 2 ++ configs/kmtepr2_defconfig | 2 ++ configs/suvd3_defconfig | 2 ++ configs/tuge1_defconfig | 2 ++ configs/tuxx1_defconfig | 2 ++ 10 files changed, 20 insertions(+) diff --git a/configs/kmcoge4_defconfig b/configs/kmcoge4_defconfig index 3b7ee334ab..595804245c 100644 --- a/configs/kmcoge4_defconfig +++ b/configs/kmcoge4_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xfff4 CONFIG_SYS_BOOTCOUNT_ADDR=0xFB20 CONFIG_MPC85xx=y CONFIG_TARGET_KMP204X=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -37,6 +38,7 @@ CONFIG_CMD_UBI=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index edd9af9adb..971fa9b349 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -152,6 +152,7 @@ CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_DBYP_PLL_BYPASSED=y CONFIG_LCRR_EADC_2=y CONFIG_LCRR_CLKDIV_4=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_MISC_INIT_R=y @@ -178,6 +179,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index eb598b8ccc..21f0c4dd6e 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -116,6 +116,7 @@ CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_DBYP_PLL_BYPASSED=y CONFIG_LCRR_EADC_2=y CONFIG_LCRR_CLKDIV_4=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_MISC_INIT_R=y @@ -141,6 +142,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index c33b256608..c04f798d5b 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -136,6 +136,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_MISC_INIT_R=y @@ -161,6 +162,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 2f7cca5952..3da0949963 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -116,6 +116,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_MISC_INIT_R=y @@ -141,6 +142,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index d8a84658dc..7bda28c29d 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -114,6 +114,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="KMTEGR1" @@ -142,6 +143,7 @@ CONFIG_CMD_DIAG=y CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index 8e838eac09..97bdc19dc8 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -136,6 +136,7 @@ CONFIG_ACR_APARK_MASTER=y CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_MISC_INIT_R=y @@ -161,6 +162,7 @@
Re: [U-Boot] rockchip: rk3399: TPL: rockpro64: Wrong memory size detected【请注意，邮件由lists.intric...@gmail.com代发】
Hi Kever, On Mon, 2019-11-18 at 11:05 +0800, Kever Yang wrote: > Hi Kurt, > > On 2019/11/14 上午2:44, Kurt Miller wrote: > > > > On Tue, 2019-09-17 at 12:02 -0400, Kurt Miller wrote: > > > > > > On Tue, 2019-09-17 at 10:57 +0800, Kever Yang wrote: > > > > > > > > Hi Kurt, > > > > > > > > Could you try with below update: > > > > > > > > > > > > diff --git a/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi > > > > b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi > > > > index 4a4414a960..dc9db047cb 100644 > > > > --- a/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi > > > > +++ b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi > > > > @@ -13,8 +13,8 @@ > > > > 0x2 > > > > 0x1 > > > > 0x0 > > > > - 0xf > > > > - 0xf > > > > + 0x10 > > > > + 0x10 > > > > 1 > > > > 0x80241d22 > > > > 0x15050f08 > > > > @@ -28,8 +28,8 @@ > > > > 0x2 > > > > 0x1 > > > > 0x0 > > > > - 0xf > > > > - 0xf > > > > + 0x10 > > > > + 0x10 > > > > 1 > > > > 0x80241d22 > > > > 0x15050f08 > > > > > > > > Thanks, > > > > - Kever > > > Hi Kever, > > > > > > Yes, that diff does correct the memory size detection > > > for my board: > > > > > > U-Boot TPL 2019.10-rc3-00332-ga314ec1bfd-dirty (Sep 17 2019 - 11:55:26) > > > con reg > > > cru , cic , grf , sgrf , pmucru , pmu > > > Starting SDRAM initialization... > > > sdram_init: data trained for rank 1, ch 0 > > > sdram_init: data trained for rank 1, ch 1 > > > Channel 0: LPDDR4, 50MHz > > > BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB > > > Channel 1: LPDDR4, 50MHz > > > BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB > > > 256B stride > > > lpddr4_set_ctl: channel 0 training pass > > > lpddr4_set_ctl: channel 1 training pass > > > lpddr4_set_rate: change freq to 400 mhz 0, 1 > > > lpddr4_set_ctl: channel 0 training pass > > > lpddr4_set_ctl: channel 1 training pass > > > lpddr4_set_rate: change freq to 800 mhz 1, 0 > > > Finish SDRAM initialization... > > > Trying to boot from BOOTROM > > > Returning to boot ROM... > > Hi Kever, > > > > Following up on this issue. I retested 2020.01-rc2 to see if > > memory size detection has been fixed yet. Without your diff above > > applied, 2020.01-rc2 still detects 2G memory instead of 4G: > > Could you try with latest u-boot-rockchip? > > https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip.git > The latest u-boot-rockchip does detect the correct memory size. I'll keep an eye out for the next rockchip pull to master occurs. Thank you, -Kurt U-Boot TPL 2020.01-rc2-04834-g59b01eb7a1-dirty (Nov 18 2019 - 10:34:14) con reg ffa8 ffa80800 ffa82000 ffa84000 ffa88000 ffa88800 ffa8a000 ffa8c000 cru ff76, cic ff62, grf ff32, sgrf ff33, pmucru ff75, pmu ff31 Starting SDRAM initialization... sdram_init: data trained for rank 1, ch 0 sdram_init: data trained for rank 1, ch 1 Channel 0: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB Channel 1: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB 256B stride 256B stride lpddr4_set_ctl: channel 0 training pass lpddr4_set_ctl: channel 1 training pass lpddr4_set_rate: change freq to 4 mhz 0, 1 lpddr4_set_ctl: channel 0 training pass lpddr4_set_ctl: channel 1 training pass lpddr4_set_rate: change freq to 8 mhz 1, 0 Finish SDRAM initialization... Trying to boot from BOOTROM Returning to boot ROM... U-Boot SPL 2020.01-rc2-04834-g59b01eb7a1-dirty (Nov 18 2019 - 10:34:14 -0500) Trying to boot from MMC1 NOTICE: BL31: v2.2(debug):2.2 NOTICE: BL31: Built : 10:33:33, Nov 18 2019 INFO:GICv3 with legacy support detected. ARM GICv3 driver initialized in EL3 INFO:plat_rockchip_pmu_init(1605): pd status 3e INFO:BL31: Initializing runtime services INFO:BL31: cortex_a53: CPU workaround for 855873 was applied INFO:BL31: Preparing for EL3 exit to normal world INFO:Entry point address = 0x20 INFO:SPSR = 0x3c9 U-Boot 2020.01-rc2-04834-g59b01eb7a1-dirty (Nov 18 2019 - 10:34:14 -0500) Model: Pine64 RockPro64 DRAM: rk3399_dmc_probe: pmugrf = ff32 3.9 GiB PMIC: RK808 MMC: dwmmc@fe32: 1, sdhci@fe33: 0 Loading Environment from MMC... Card did not respond to voltage select! *** Warning - No block device, using default environment In:serial@ff1a Out: serial@ff1a Err: serial@ff1a Model: Pine64 RockPro64 rockchip_dnl_key_pressed: adc_channel_single_shot fail! Net: eth0: ethernet@fe30 Hit any key to stop autoboot: 0 Card did not respond to voltage select! switch to partitions #0, OK mmc1 is current device Scanning mmc 1:1... Found EFI removable media binary efi/boot/bootaa64.efi libfdt fdt_check_header(): FDT_ERR_BADMAGIC Scanning
Re: [U-Boot] [PATCH v2 1/2] rockchip: make_fit_atf.py: allow inclusion of a tee binary
Hi Heiko, On Mon, 4 Nov 2019 at 04:23, Heiko Stübner wrote: > > Hi Simon, > > Am Mittwoch, 30. Oktober 2019, 02:49:46 CET schrieb Simon Glass: > > On Tue, 22 Oct 2019 at 03:45, Kever Yang wrote: > > > On 2019/10/22 上午7:46, Simon Glass wrote: > > > > On Mon, 14 Oct 2019 at 03:07, Kever Yang > > > > wrote: > > > >> > > > >> On 2019/10/7 上午2:10, Heiko Stuebner wrote: > > > >>> A trusted execution environment should also get loaded as loadable > > > >>> from > > > >>> a fit image, so add the possibility to present a tee.elf to > > > >>> make_fit_atf.py > > > >>> that then gets included as additional loadable into the generated its. > > > >>> > > > >>> For ease of integration the additional loadable is created as > > > >>> atf_(x+1) > > > >>> after all others to re-use core generation loops. > > > >>> > > > >>> Tested against the combinations of 1-part-atf and multi-part-atf each > > > >>> time with and without a tee binary present. > > > >>> > > > >>> Signed-off-by: Heiko Stuebner > > > >> Reviewed-by: Kever Yang > > > >> > > > >> > > > >> Thanks, > > > >> - Kever > > > >>> --- > > > >>> changes in v2: none > > > >>> > > > >>>arch/arm/mach-rockchip/make_fit_atf.py | 52 > > > >>> +++--- > > > >>>1 file changed, 46 insertions(+), 6 deletions(-) > > > > I see there is an effort to move this to binman. To me that is a much > > > > more productive approach! > > > > > > > > > Do you mean the patch set from Jagan for rockchip platform to using > > > binman? > > > > > > That patch is actually using the output of the u-boot.itb which is based > > > on this script. > > > > > > > > > > > Is there a feature or example missing in binman that you need to get > > > > this over the hump? > > > > > > > > > I think Heiko and you has a discussion about this in previous version > > > thread. > > > The U-Boot project build output is: tpl.bin, spl.bin, u-boot.bin > > > For rockchip platform, package needs: > > > - pack tpl.bin+spl.bin with mkimage -rksd/rkspi into idbloader.img > > > - get ATF binaries from bl31.bin/optee.bin with a script > > > - generate u-boot.its to describe the u-boot.itb > > > - pack u-boot.bin and ATF/OPTEE binaries into u-boot.itb with mkimage -f > > > u-boot.its > > > > > > Does the binman mainly target for pack the idbloader.img+u-boot.itb? > > > > I actually think binman could handle all of that. > > > > Is there something I could do that would help with that? > > I think the main sparse element is time here and maybe a voluteer with > enough of time available to lay the groundwork. > > Like on my personal side, I really don't see me finding the time to > actually look at binman and finding out how everything should > translate from the current state to binman - soonish. > > Hooking up new small things into an existing infrastructure is somehow > alway easier ;-) . Yes that's true - I suppose it is called 'getting over the hump'. I have a few irons in the fire at the moment, but if no one gets to it I might try. Jagan seems to be making good progress so far. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Best way to use UCLASS_GPIO board id
Hi Michael,
On Sun, 10 Nov 2019 at 02:08, Michael Nazzareno Trimarchi
wrote:
>
> Hi Simon
>
> + project_id: project-id {
> + pid0: bid0 {
> + rockchip,pins = <2 RK_PA1 RK_FUNC_GPIO _pull_up>;
> + };
> +
> + pid1: pid1 {
> + rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO _pull_up>;
> + };
> +
> + pid2: pid2 {
> + rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO _pull_up>;
> + };
> + };
> +
> + pcb_id: pcb-id {
> + pcbid0: pcbid0 {
> + rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO
> _pull_none>;
> + };
> +
> + pcbid1: pcbid1 {
> + rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO
> _pull_none>;
> + };
> +
> + pcbid2: pcbid2 {
> + rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO
> _pull_none>;
> + };
> + };
>
>
> I have defined the pins needed for tinker board and understand what
> board revision is. Now I would like to use them from spl_board_init
> and I have
> them in dtb
>
> + {
> + u-boot,dm-spl;
> +};
> +
> + {
> + u-boot,dm-spl;
> +};
> +
> + {
> + u-boot,dm-spl;
> +};
> +
> + {
> + u-boot,dm-spl;
> +};
> +
> + {
> + u-boot,dm-spl;
> +};
> +
> + {
> + u-boot,dm-spl;
> +};
> +
> + {
> + u-boot,dm-spl;
> +};
> +
> + {
> + u-boot,dm-spl;
> +};
>
> Now is there a way to reference them easily after probe the UCLASS_GPIO?
>
> +int spl_board_init(void)
> +{
> + int ret;
> + struct udevice *gpio_dev2 = NULL;
> + struct udevice *gpio_dev6 = NULL;
> +
> + if (uclass_get_device_by_name(UCLASS_GPIO, "gpio2@ff79",
> _dev2) ||
> + uclass_get_device_by_name(UCLASS_GPIO, "gpio6@ff7d",
> _dev6)) {
> + printf("Could not get GPIO device.\n");
> + return -EINVAL;
> + }
> +
> + ret = device_probe(gpio_dev2);
> + if (ret)
> + pr_err("%s - probe failed: %d\n", gpio_dev2->name, ret);
> +
> + ret = device_probe(gpio_dev6);
> + if (ret)
> + pr_err("%s - probe failed: %d\n", gpio_dev6->name, ret);
>
>
> Michael
This seems pretty painful and doesn't really use pinctrl to best advantage.
My suggestion would be to create a driver in UCLASS_BOARD and put the
GPIOs into property, like:
your-board {
compatible = "...";
board-id-gpios = < 5 GPIO_ACTIVE_HIGH
3 GPIO_ACTIVE_HIGH
...>;
pinctrl=0 = <_id>;
Then you can use gpio_request_list_by_name() to get the GPIOs and
dm_gpio_get_values_as_int() to convert them to an int.
For pinctrl, put it all in one node in pinctrl, like the others, e.g.
ids {
board_id: board-id {
rockchip,pins = <0 5 RK_FUNC_GPIO _pull_up
2 3 RK_FUNC_GPIO _pull_up
...>;
};
};
Good luck!
Regards,
Simon
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Re: [U-Boot] [PATCH] dm: serial: Handle "stdout-path" with ":options" correctly
Hi Bin,
On Mon, 18 Nov 2019 at 09:12, Bin Meng wrote:
>
> With commit f0921f5098d8 ("fdt: Sync up to the latest libfdt"),
> SiFive Unleashed board does not boot any more. This was due to
> the U-Boot local changes commit 77d7fff8cec2 ("fdt: Fix handling
> of paths with options in them") to libfdt/fdt_ro.c was dropped
> during the libfdt upgrade.
>
> From the history [1] it was mentioned that the U-Boot changes
> commit 77d7fff8cec2 ("fdt: Fix handling of paths with options in
> them") was rejected by libfdt upstream, hence we need find another
> way to fix the things.
>
> This commit uses another method, by updating serial_check_stdout()
> directly to handle the situation of "stdout-path" with ":options".
> A simpler way is to change the logic in fdtdec_get_chosen_node()
> to do similar thing, but I feel that not every property in chosen
> node may have the option in them, hence it would make more sense
> to do the special handling in serial_check_stdout() directly.
>
> [1]: http://patchwork.ozlabs.org/patch/462756/
>
> Signed-off-by: Bin Meng
>
> ---
>
> drivers/serial/serial-uclass.c | 36
> 1 file changed, 20 insertions(+), 16 deletions(-)
Reviewed-by: Simon Glass
Would it be possible to export serial_check_stdout() so we can add
tests? Or perhaps we should have tests for all of
serial_find_console_or_panic() since it is getting more and more
complicated and is not documented well.
Regards,
Simon
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[U-Boot] [PATCH] dm: serial: Handle "stdout-path" with ":options" correctly
With commit f0921f5098d8 ("fdt: Sync up to the latest libfdt"),
SiFive Unleashed board does not boot any more. This was due to
the U-Boot local changes commit 77d7fff8cec2 ("fdt: Fix handling
of paths with options in them") to libfdt/fdt_ro.c was dropped
during the libfdt upgrade.
From the history [1] it was mentioned that the U-Boot changes
commit 77d7fff8cec2 ("fdt: Fix handling of paths with options in
them") was rejected by libfdt upstream, hence we need find another
way to fix the things.
This commit uses another method, by updating serial_check_stdout()
directly to handle the situation of "stdout-path" with ":options".
A simpler way is to change the logic in fdtdec_get_chosen_node()
to do similar thing, but I feel that not every property in chosen
node may have the option in them, hence it would make more sense
to do the special handling in serial_check_stdout() directly.
[1]: http://patchwork.ozlabs.org/patch/462756/
Signed-off-by: Bin Meng
---
drivers/serial/serial-uclass.c | 36
1 file changed, 20 insertions(+), 16 deletions(-)
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index dcdaede..391f4a1 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -30,28 +30,32 @@ static const unsigned long baudrate_table[] =
CONFIG_SYS_BAUDRATE_TABLE;
static int serial_check_stdout(const void *blob, struct udevice **devp)
{
int node;
+ const char *str, *p, *name;
+ int namelen;
/* Check for a chosen console */
- node = fdtdec_get_chosen_node(blob, "stdout-path");
- if (node < 0) {
- const char *str, *p, *name;
-
- /*
-* Deal with things like
-* stdout-path = "serial0:115200n8";
-*
-* We need to look up the alias and then follow it to the
-* correct node.
-*/
- str = fdtdec_get_chosen_prop(blob, "stdout-path");
- if (str) {
- p = strchr(str, ':');
- name = fdt_get_alias_namelen(blob, str,
- p ? p - str : strlen(str));
+ str = fdtdec_get_chosen_prop(blob, "stdout-path");
+ if (str) {
+ p = strchr(str, ':');
+ namelen = p ? p - str : strlen(str);
+ node = fdt_path_offset_namelen(blob, str, namelen);
+
+ if (node < 0) {
+ /*
+* Deal with things like
+* stdout-path = "serial0:115200n8";
+*
+* We need to look up the alias and then follow it to
+* the correct node.
+*/
+ name = fdt_get_alias_namelen(blob, str, namelen);
if (name)
node = fdt_path_offset(blob, name);
}
+ } else {
+ node = -1;
}
+
if (node < 0)
node = fdt_path_offset(blob, "console");
if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node, devp))
--
2.7.4
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Re: [U-Boot] Pull request: u-boot-rockchip-20191026
On Mon, Nov 18, 2019 at 08:48:46AM +0800, Kever Yang wrote: > Hi Tom, > > Please pull the rockchip update: > - Add support for rockchip SoC: PX30, RK3308 > - Add and migrate to use common dram driver: PX30, RK3328, RK3399 > - Add rk3399 board Tinker-s support > - Board config update for Rock960, Rockpro64 > > These patches are send during merge window, and reviewed for weeks before > they are ready, most of the feature update for Rockchip has been merged in > this PR. > > Travis: > https://travis-ci.org/keveryang/u-boot/builds/613058035 > > Thanks, > - Kever > > The following changes since commit 3ff1ff3ff76c15efe0451309af084ee6c096c583: > > Merge branch '2019-11-12-migrate-SYS_REDUNDAND_ENVIRONMENT' (2019-11-12 > 13:40:58 -0500) > > are available in the Git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip.git > tags/u-boot-rockchip-20191118 > > for you to fetch changes up to 59b01eb7a17a7c0915fd8aff8f818699b4624137: > > rockchip: dts: tinker: Add tinker-s board support (2019-11-17 18:51:25 > +0800) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-dm
On Thu, Nov 14, 2019 at 08:08:09PM -0700, Simon Glass wrote: > Hi Tom, > > Passing run here: > > https://gitlab.denx.de/u-boot/custodians/u-boot-dm/pipelines/1306 > > > The following changes since commit 3ff1ff3ff76c15efe0451309af084ee6c096c583: > > Merge branch '2019-11-12-migrate-SYS_REDUNDAND_ENVIRONMENT' > (2019-11-12 13:40:58 -0500) > > are available in the Git repository at: > > git://git.denx.de/u-boot-dm.git tags/dm-pull-14nov19 > > for you to fetch changes up to 677dac23d8ebfc0342f903aeee2a75e737fd4d7e: > > patman: fix coverletter cc list with nulls (2019-11-14 07:09:34 -0600) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] usb: cdns3: Fix include file path
On 11/18/19 2:46 PM, Vignesh Raghavendra wrote: > xhci.h has now been moved to include/usb/ folder. Therefore, update the s/folder/directory/ ; I can update it while applying. > path in the Cadence USB drivers. [...] ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 4/4] configs: j721e_evm_a72_defconfig: Enable USB related configs
Enable USB host and device related configs. Signed-off-by: Vignesh Raghavendra --- configs/j721e_evm_a72_defconfig | 28 1 file changed, 28 insertions(+) diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 748179e82317..0abbfc02e614 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -29,6 +29,8 @@ CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_SPI_LOAD=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPT=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x28 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_ASKENV=y @@ -37,6 +39,8 @@ CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_UFS=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y @@ -60,8 +64,17 @@ CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_CLK_TI_SCI=y +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y CONFIG_DMA_CHANNELS=y CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x8200 +CONFIG_FASTBOOT_BUF_SIZE=0x2F00 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_TI_SCI_PROTOCOL=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y @@ -91,6 +104,7 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_RAM=y CONFIG_REMOTEPROC_TI_K3_DSP=y CONFIG_REMOTEPROC_TI_K3_R5F=y CONFIG_DM_RESET=y @@ -105,7 +119,21 @@ CONFIG_CADENCE_QSPI=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_TI_SCI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_USB_CDNS3_HOST=y +CONFIG_SPL_USB_CDNS3_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6163 CONFIG_UFS=y CONFIG_CADENCE_UFS=y CONFIG_TI_J721E_UFS=y +CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT_OVERLAY=y -- 2.24.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/4] environment: ti: Add DFU environment variables k3_dfu.h
Setup env variables for updating firmwares on eMMC/OSPI/MMC via DFU Signed-off-by: Vignesh Raghavendra --- include/configs/j721e_evm.h | 10 +++ include/environment/ti/k3_dfu.h | 46 + 2 files changed, 56 insertions(+) create mode 100644 include/environment/ti/k3_dfu.h diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 639d87a4e578..b21eabc873f7 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -14,6 +14,7 @@ #include #include #include +#include #define CONFIG_ENV_SIZE(128 << 10) @@ -102,12 +103,21 @@ "7 /lib/firmware/j7-c66_1-fw " \ "8 /lib/firmware/j7-c71_0-fw " +/* set default dfu_bufsiz to 128KB (sector size of OSPI) */ +#define EXTRA_ENV_DFUARGS \ + "dfu_bufsiz=0x2\0" \ + DFU_ALT_INFO_MMC \ + DFU_ALT_INFO_EMMC \ + DFU_ALT_INFO_RAM \ + DFU_ALT_INFO_OSPI + /* Incorporate settings into the U-Boot environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_MMC_TI_ARGS \ EXTRA_ENV_J721E_BOARD_SETTINGS \ EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \ EXTRA_ENV_RPROC_SETTINGS\ + EXTRA_ENV_DFUARGS \ DEFAULT_UFS_TI_ARGS /* Now for the remaining common defines */ diff --git a/include/environment/ti/k3_dfu.h b/include/environment/ti/k3_dfu.h new file mode 100644 index ..2f503b8de880 --- /dev/null +++ b/include/environment/ti/k3_dfu.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com + * + * Environment variable definitions for DFU on TI K3 SoCs. + * + */ + +#ifndef __TI_DFU_H +#define __TI_DFU_H + +#define DFU_ALT_INFO_MMC \ + "dfu_alt_info_mmc=" \ + "boot part 1 1;" \ + "rootfs part 1 2;" \ + "tiboot3.bin fat 1 1;" \ + "tispl.bin fat 1 1;" \ + "u-boot.img fat 1 1;" \ + "uEnv.txt fat 1 1;" \ + "sysfw.itb fat 1 1\0" + +#define DFU_ALT_INFO_EMMC \ + "dfu_alt_info_emmc=" \ + "rawemmc raw 0 0x80 mmcpart 1;" \ + "rootfs part 0 1 mmcpart 0;" \ + "tiboot3.bin.raw raw 0x0 0x400 mmcpart 1;" \ + "tispl.bin.raw raw 0x400 0x1000 mmcpart 1;" \ + "u-boot.img.raw raw 0x1400 0x2000 mmcpart 1;" \ + "u-env.raw raw 0x3400 0x100 mmcpart 1;" \ + "sysfw.itb.raw raw 0x3600 0x800 mmcpart 1\0" + +#define DFU_ALT_INFO_OSPI \ + "dfu_alt_info_ospi=" \ + "tiboot3.bin raw 0x0 0x08;" \ + "tispl.bin raw 0x08 0x20;" \ + "u-boot.img raw 0x28 0x40;" \ + "u-boot-env raw 0x68 0x02;" \ + "sysfw.itb raw 0x6c 0x10;" \ + "rootfs raw 0x80 0x380\0" + +#define DFU_ALT_INFO_RAM \ + "dfu_alt_info_ram=" \ + "tispl.bin ram 0x8008 0x10;" \ + "u-boot.img ram 0x8100 0x10\0" \ + +#endif /* __TI_DFU_H */ -- 2.24.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 3/4] arm: dts: k3-j721e: Add DT nodes for USB
J721e has two instances of Cadence USB3 controller. Add DT nodes for the
same. USB0 is configured to device mode and USB1 is configured to host
mode. For now only high speed mode is supported.
Signed-off-by: Vignesh Raghavendra
---
.../k3-j721e-common-proc-board-u-boot.dtsi| 14
arch/arm/dts/k3-j721e-common-proc-board.dts | 37 ++
arch/arm/dts/k3-j721e-main.dtsi | 70 +++
.../arm/dts/k3-j721e-r5-common-proc-board.dts | 7 ++
4 files changed, 128 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index c4f2dd6b4fb2..c66e029b88ad 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -311,6 +311,20 @@
u-boot,dm-spl;
};
+_usbss0_pins_default {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+ ti,usb2-only;
+};
+
+ {
+ dr_mode = "peripheral";
+ u-boot,dm-spl;
+};
+
_cpsw {
pinctrl-names = "default";
pinctrl-0 = <_cpsw_pins_default _mdio_pins_default>;
diff --git a/arch/arm/dts/k3-j721e-common-proc-board.dts
b/arch/arm/dts/k3-j721e-common-proc-board.dts
index c978cabd1335..137da7e425a1 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-common-proc-board.dts
@@ -77,3 +77,40 @@
voltage-ranges = <1800 1800 3300 3300>;
ti,driver-strength-ohm = <50>;
};
+
+_pmx0 {
+ main_usbss0_pins_default: main_usbss0_pins_default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS
*/
+ J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3)
MCAN1_RX.GPIO1_3 */
+ >;
+ };
+
+ main_usbss1_pins_default: main_usbss1_pins_default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4)
MCAN1_TX.USB1_DRVVBUS */
+ >;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_usbss0_pins_default>;
+ ti,vbus-divider;
+};
+
+ {
+ dr_mode = "otg";
+ maximum-speed = "super-speed";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_usbss1_pins_default>;
+ ti,usb2-only;
+};
+
+ {
+ dr_mode = "host";
+ maximum-speed = "high-speed";
+};
diff --git a/arch/arm/dts/k3-j721e-main.dtsi b/arch/arm/dts/k3-j721e-main.dtsi
index 3a0763209fc2..5083a0c3aef0 100644
--- a/arch/arm/dts/k3-j721e-main.dtsi
+++ b/arch/arm/dts/k3-j721e-main.dtsi
@@ -340,6 +340,76 @@
resets = <_reset 15 1>;
};
+ usbss0: cdns_usb@4104000 {
+ compatible = "ti,j721e-usb";
+ reg = <0x00 0x4104000 0x00 0x100>;
+ dma-coherent;
+ power-domains = <_pds 288 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <_clks 288 15>, <_clks 288 3>;
+ clock-names = "usb2_refclk", "lpm_clk";
+ assigned-clocks = <_clks 288 15>;/* USB2_REFCLK */
+ assigned-clock-parents = <_clks 288 16>; /* HFOSC0 */
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ phy@4108000 {
+ compatible = "ti,j721e-usb2-phy";
+ reg = <0x00 0x4108000 0x00 0x400>;
+ };
+
+ usb0: usb@600 {
+ compatible = "cdns,usb3";
+ reg = <0x00 0x600 0x00 0x1>,
+ <0x00 0x601 0x00 0x1>,
+ <0x00 0x602 0x00 0x1>;
+ reg-names = "otg", "xhci", "dev";
+ interrupts = , /*
irq.0 */
+, /*
irq.6 */
+; /*
otgirq.0 */
+ interrupt-names = "host",
+ "peripheral",
+ "otg";
+ maximum-speed = "super-speed";
+ dr_mode = "otg";
+ };
+ };
+
+ usbss1: cdns_usb@4114000 {
+ compatible = "ti,j721e-usb";
+ reg = <0x00 0x4114000 0x00 0x100>;
+ dma-coherent;
+ power-domains = <_pds 289 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <_clks 289 15>, <_clks 289 3>;
+ clock-names = "usb2_refclk", "lpm_clk";
+ assigned-clocks = <_clks 289 15>;/* USB2_REFCLK */
+ assigned-clock-parents = <_clks 289 16>; /* HFOSC0 */
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ phy@4118000 {
+ compatible = "ti,j721e-usb2-phy";
+ reg = <0x00 0x4118000 0x00 0x400>;
+ };
+
+ usb1: usb@640 {
+ compatible =
[U-Boot] [PATCH 1/4] usb: cdns3: Fix include file path
xhci.h has now been moved to include/usb/ folder. Therefore, update the path in the Cadence USB drivers. Signed-off-by: Vignesh Raghavendra --- drivers/usb/cdns3/core.c | 2 +- drivers/usb/cdns3/host.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c index f1e4bb627815..8c8e02169e81 100644 --- a/drivers/usb/cdns3/core.c +++ b/drivers/usb/cdns3/core.c @@ -18,7 +18,7 @@ #include #include #include -#include "../host/xhci.h" +#include #include "core.h" #include "host-export.h" diff --git a/drivers/usb/cdns3/host.c b/drivers/usb/cdns3/host.c index 79be63001d44..425d9d053ddb 100644 --- a/drivers/usb/cdns3/host.c +++ b/drivers/usb/cdns3/host.c @@ -11,7 +11,7 @@ #include #include #include -#include "../host/xhci.h" +#include #include "core.h" #include "drd.h" -- 2.24.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 0/4] J721e: Add USB support
Add USB support for J721e SoC. First patch fixes a compile issue with Cadence USB driver. Rest of the patches add env, DT and configs related to USB. Vignesh Raghavendra (4): usb: cdns3: Fix include file path environment: ti: Add DFU environment variables k3_dfu.h arm: dts: k3-j721e: Add DT nodes for USB configs: j721e_evm_a72_defconfig: Enable USB related configs .../k3-j721e-common-proc-board-u-boot.dtsi| 14 arch/arm/dts/k3-j721e-common-proc-board.dts | 37 ++ arch/arm/dts/k3-j721e-main.dtsi | 70 +++ .../arm/dts/k3-j721e-r5-common-proc-board.dts | 7 ++ configs/j721e_evm_a72_defconfig | 28 drivers/usb/cdns3/core.c | 2 +- drivers/usb/cdns3/host.c | 2 +- include/configs/j721e_evm.h | 10 +++ include/environment/ti/k3_dfu.h | 46 9 files changed, 214 insertions(+), 2 deletions(-) create mode 100644 include/environment/ti/k3_dfu.h -- 2.24.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 7/9] gadget: rockchip: Add rk3399 USB_GADGET_PRODUCT_NUM
On Tue, Oct 29, 2019 at 3:10 PM wrote: > > Jagan Teki writes: > > > Add 0x330a for rk3399 gadget product number. > > > > Signed-off-by: Jagan Teki > > --- > > drivers/usb/gadget/Kconfig | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig > > index 2da8b40e05..b0e61f3fcd 100644 > > --- a/drivers/usb/gadget/Kconfig > > +++ b/drivers/usb/gadget/Kconfig > > @@ -61,7 +61,7 @@ config USB_GADGET_PRODUCT_NUM > > default 0x310a if ROCKCHIP_RK3036 > > default 0x310c if ROCKCHIP_RK3128 > > default 0x320a if ROCKCHIP_RK3229 || ROCKCHIP_RK3288 > > - default 0x330a if ROCKCHIP_RK3328 > > + default 0x330a if ROCKCHIP_RK3328 || ROCKCHIP_RK3399 > > default 0x0 > > help > > Product ID of the USB device emulated, reported to the host device. > > With 0x330a, the device shown in `lsusb` is: > > Bus 002 Device 024: ID 2207:330a Fuzhou Rockchip Electronics Company > RK3368 in Mask ROM mode > While using 0x330c, the device shown in `lsusb` is: > > Bus 002 Device 025: ID 2207:330c Fuzhou Rockchip Electronics Company > RK3399 in Mask ROM mode > > Therefore, this should be modified to use 0x330c: > > + default 0x330c if ROCKCHIP_RK3399 Can you link the host driver for the rockchip gadget, I didn't see the name using lsusb. My output on ubuntu host is Bus 001 Device 009: ID 2207:330a ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers: optee: rpmb: fix returning CID to TEE
On 11/18/19 1:42 PM, Jens Wiklander wrote:
> [+ Igor and Sam]
>
> On Mon, Nov 18, 2019 at 12:18:27PM +0100, Jorge Ramirez-Ortiz wrote:
>> On 11/18/19 10:36 AM, Jens Wiklander wrote:
>>> Hi Jorge,
>>
>>
>> hey!
>>
>>>
>>> On Fri, Nov 15, 2019 at 10:37 PM Jorge Ramirez-Ortiz
>>> wrote:
The MMC CID value is one of the input parameters to unequivocally
provision the the RPMB key.
Before this patch, the value returned by the mmc driver in the Linux
kernel differs from the one returned by uboot to optee.
This means that if Linux provisions the RPMB key, uboot wont be able
to access it (and the other way around).
Fix it so both uboot and linux can access the RPMB partition
independently of who provisions the key.
Signed-off-by: Jorge Ramirez-Ortiz
---
drivers/tee/optee/rpmb.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/tee/optee/rpmb.c b/drivers/tee/optee/rpmb.c
index 955155b3f8..5dbb1eae4a 100644
--- a/drivers/tee/optee/rpmb.c
+++ b/drivers/tee/optee/rpmb.c
@@ -98,6 +98,7 @@ static struct mmc *get_mmc(struct optee_private *priv,
int dev_id)
static u32 rpmb_get_dev_info(u16 dev_id, struct rpmb_dev_info *info)
{
struct mmc *mmc = find_mmc_device(dev_id);
+ int i;
if (!mmc)
return TEE_ERROR_ITEM_NOT_FOUND;
@@ -105,7 +106,9 @@ static u32 rpmb_get_dev_info(u16 dev_id, struct
rpmb_dev_info *info)
if (!mmc->ext_csd)
return TEE_ERROR_GENERIC;
- memcpy(info->cid, mmc->cid, sizeof(info->cid));
+ for (i = 0; i < ARRAY_SIZE(mmc->cid); i++)
+ ((u32 *) info->cid)[i] = be32_to_cpu(mmc->cid[i]);
+
>>> So it seems to be a byte order issue. I can't find the place in the
>>> Linux kernel (or in tee-supplicant) where the corresponding byte
>>> swapping is done. Have you been able to find it or you just tried to
>>> swap the bytes and it seemed to work?
>>
>>
>> I compared against the full CID output from Linux and noticed that in
>> order to match that exact same output this swap seemed to be required. I
>> didnt dig any deeper since a similar swap operation is done on other
>> -different - values returned from U-boot to OP-TEE.
>
> So we don't know if the byte swap is always needed, only on little
> endian machines or perhaps only with certain devices.
right, I dont know.
>
> By the way, where are the other byte swaps you're mentioning? I did a
> quick grep under drivers/tee/ and didn't find anything.
um my bad...let me clarify: when I was hacking around the issues I had
with the rpmb uboot driver, I was merging/testing some of the code from
the emulation mode in the linux tee-supplicant (rpbm values are
converted to network byte order); doing so allowed me to moved through
the response validation stage in optee so I figured that CID probably
was missing some sort of conversion as well.
>
>>
>>
>>>
>>> I'm not yet convinced that be32_to_cpu() is the correct function here.
>>> OP-TEE masks out a few fields from the CID when deriving the key:
>>
>>
>> sure but isnt that a different matter?
>
> No, it's important that OP-TEE masks out the correct fields. That's why
> we must make sure to understand the problem so we don't just push the
> problem around.
ok.
if there is anything you'd like me to test or validate please let me know
>
>>
>> AFAICS U-boot should be providing the same CID than Linux does, and
>> whatever OP-TEE might be masking out on the receiving end is orthogonal
>> to such value, isnt it? maybe I am not understanding your point?
>
> I agree that something must be done so it works with Linux. However, I'm
> a bit surprised that we haven't seen this earlier.
could be that accessing rpmb has never been done from both linux and
u-boot?
in fact when I was trying to access rpmb values from uboot via AVB I
also noticed that the current code (at least in my imx7 platform)
wouldnt work due to cache alignment issues...so needed an additional
patch (which I still need to send to this ML) to use aligned buffers on
the stack in the read/write rpmb functions.
>
> If there's an error in how it's done in Linux we may need to implement
> some workaround in tee-supplicant or perhaps in secure world. If we wait
> with that until after we have some workarounds in U-Boot too, stuff will
> become even more messy.
>
> Cheers,
> Jens
>
>>
>>
>>>
>>> CID is a uint8_t[16] here
>>> /*
>>> * PRV/CRC would be changed when doing eMMC FFU
>>> * The following fields should be masked off when deriving RPMB key
>>> *
>>> * CID [55: 48]: PRV (Product revision)
>>> * CID [07: 01]: CRC (CRC7 checksum)
>>> * CID [00]: not used
>>> */
>>>
>>> Will this work as expected on a big endian machine?
>>>
>>> Cheers,
>>> Jens
>>>
Re: [U-Boot] [PATCH] drivers: optee: rpmb: fix returning CID to TEE
[+ Igor and Sam]
On Mon, Nov 18, 2019 at 12:18:27PM +0100, Jorge Ramirez-Ortiz wrote:
> On 11/18/19 10:36 AM, Jens Wiklander wrote:
> > Hi Jorge,
>
>
> hey!
>
> >
> > On Fri, Nov 15, 2019 at 10:37 PM Jorge Ramirez-Ortiz
> > wrote:
> >> The MMC CID value is one of the input parameters to unequivocally
> >> provision the the RPMB key.
> >>
> >> Before this patch, the value returned by the mmc driver in the Linux
> >> kernel differs from the one returned by uboot to optee.
> >>
> >> This means that if Linux provisions the RPMB key, uboot wont be able
> >> to access it (and the other way around).
> >>
> >> Fix it so both uboot and linux can access the RPMB partition
> >> independently of who provisions the key.
> >>
> >> Signed-off-by: Jorge Ramirez-Ortiz
> >> ---
> >> drivers/tee/optee/rpmb.c | 5 -
> >> 1 file changed, 4 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/tee/optee/rpmb.c b/drivers/tee/optee/rpmb.c
> >> index 955155b3f8..5dbb1eae4a 100644
> >> --- a/drivers/tee/optee/rpmb.c
> >> +++ b/drivers/tee/optee/rpmb.c
> >> @@ -98,6 +98,7 @@ static struct mmc *get_mmc(struct optee_private *priv,
> >> int dev_id)
> >> static u32 rpmb_get_dev_info(u16 dev_id, struct rpmb_dev_info *info)
> >> {
> >> struct mmc *mmc = find_mmc_device(dev_id);
> >> + int i;
> >>
> >> if (!mmc)
> >> return TEE_ERROR_ITEM_NOT_FOUND;
> >> @@ -105,7 +106,9 @@ static u32 rpmb_get_dev_info(u16 dev_id, struct
> >> rpmb_dev_info *info)
> >> if (!mmc->ext_csd)
> >> return TEE_ERROR_GENERIC;
> >>
> >> - memcpy(info->cid, mmc->cid, sizeof(info->cid));
> >> + for (i = 0; i < ARRAY_SIZE(mmc->cid); i++)
> >> + ((u32 *) info->cid)[i] = be32_to_cpu(mmc->cid[i]);
> >> +
> > So it seems to be a byte order issue. I can't find the place in the
> > Linux kernel (or in tee-supplicant) where the corresponding byte
> > swapping is done. Have you been able to find it or you just tried to
> > swap the bytes and it seemed to work?
>
>
> I compared against the full CID output from Linux and noticed that in
> order to match that exact same output this swap seemed to be required. I
> didnt dig any deeper since a similar swap operation is done on other
> -different - values returned from U-boot to OP-TEE.
So we don't know if the byte swap is always needed, only on little
endian machines or perhaps only with certain devices.
By the way, where are the other byte swaps you're mentioning? I did a
quick grep under drivers/tee/ and didn't find anything.
>
>
> >
> > I'm not yet convinced that be32_to_cpu() is the correct function here.
> > OP-TEE masks out a few fields from the CID when deriving the key:
>
>
> sure but isnt that a different matter?
No, it's important that OP-TEE masks out the correct fields. That's why
we must make sure to understand the problem so we don't just push the
problem around.
>
> AFAICS U-boot should be providing the same CID than Linux does, and
> whatever OP-TEE might be masking out on the receiving end is orthogonal
> to such value, isnt it? maybe I am not understanding your point?
I agree that something must be done so it works with Linux. However, I'm
a bit surprised that we haven't seen this earlier.
If there's an error in how it's done in Linux we may need to implement
some workaround in tee-supplicant or perhaps in secure world. If we wait
with that until after we have some workarounds in U-Boot too, stuff will
become even more messy.
Cheers,
Jens
>
>
> >
> > CID is a uint8_t[16] here
> > /*
> > * PRV/CRC would be changed when doing eMMC FFU
> > * The following fields should be masked off when deriving RPMB key
> > *
> > * CID [55: 48]: PRV (Product revision)
> > * CID [07: 01]: CRC (CRC7 checksum)
> > * CID [00]: not used
> > */
> >
> > Will this work as expected on a big endian machine?
> >
> > Cheers,
> > Jens
> >
> >> info->rel_wr_sec_c = mmc->ext_csd[222];
> >> info->rpmb_size_mult = mmc->ext_csd[168];
> >> info->ret_code = RPMB_CMD_GET_DEV_INFO_RET_OK;
> >> --
> >> 2.23.0
> >>
>
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Re: [U-Boot] [PATCH v4 2/2] sifive: fu540: Enable OF_SEPARATE
> -Original Message- > From: U-Boot On Behalf Of Bin Meng > Sent: Monday, November 18, 2019 5:52 PM > To: Jagan Teki > Cc: U-Boot Mailing List > Subject: Re: [U-Boot] [PATCH v4 2/2] sifive: fu540: Enable OF_SEPARATE > > On Mon, Nov 18, 2019 at 7:30 PM Jagan Teki > wrote: > > > > Use dts support from U-Boot via OF_SEPARATE instead of depending from > > opensbi. > > > > This would help to make the necessary changes in drivers and device > > trees in U-Boot tree itself. This feature would also be helpful to not > > pass dtb during opensbi builds. > > > > Signed-off-by: Jagan Teki > > --- > > Changes for v4: > > - Drop abosolete text > > > > configs/sifive_fu540_defconfig | 3 ++- > > doc/board/sifive/fu540.rst | 5 + > > 2 files changed, 3 insertions(+), 5 deletions(-) > > > > Reviewed-by: Bin Meng LGTM. Reviewed-by: Anup Patel It would be great if this patches are merged for U-Boot-2020.01. Can you also update documentation for OpenSBI SiFive FU540 platform support ? Regards, Anup ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 1/2] riscv: dts: Add hifive-unleashed-a00 dts from Linux
> -Original Message-
> From: U-Boot On Behalf Of Bin Meng
> Sent: Monday, November 18, 2019 5:52 PM
> To: Jagan Teki
> Cc: U-Boot Mailing List
> Subject: Re: [U-Boot] [PATCH v4 1/2] riscv: dts: Add hifive-unleashed-a00 dts
> from Linux
>
> On Mon, Nov 18, 2019 at 7:30 PM Jagan Teki
> wrote:
> >
> > Sync the hifive-unleashed-a00 dts from Linux with below commit
> > details:
> >
> > commit <2993c9b04e616df0848b655d7202a707a70fc876> ("riscv: dts: HiFive
> > Unleashed: add default chosen/stdout-path")
> >
> > Idea is to periodically sync the dts from Linux instead of tweaking
> > internal changes one after another, so better not add any intermediate
> > changes in between. This would help to maintain the dts files easy and
> > meaningful since we are reusing device tree files from Linux.
> >
> > Signed-off-by: Jagan Teki
> > ---
> > Changes for v4:
> > - none
> >
> > arch/riscv/dts/Makefile | 1 +
> > arch/riscv/dts/fu540-c000.dtsi | 251
> > arch/riscv/dts/hifive-unleashed-a00.dts | 96 +
> > 3 files changed, 348 insertions(+)
> > create mode 100644 arch/riscv/dts/fu540-c000.dtsi create mode 100644
> > arch/riscv/dts/hifive-unleashed-a00.dts
> >
>
> Reviewed-by: Bin Meng
LGTM.
Reviewed-by: Anup Patel
Regards,
Anup
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Re: [U-Boot] [PATCH 12/16] cmd: env: use appropriate guid for authenticated UEFI variable
On Mon, Nov 18, 2019 at 03:34:46PM +0900, AKASHI Takahiro wrote: > Heinrich, > > On Sat, Nov 16, 2019 at 09:10:35PM +0100, Heinrich Schuchardt wrote: > > On 11/13/19 1:53 AM, AKASHI Takahiro wrote: > > >A signature database variable is associated with a specific guid. > > >For convenience, if user doesn't supply any guid info, "env set|print -e" > > >should complement it. > > > > If secure boot is enforced, users should not be able to change any > > security relevant variables. > > I disagree. In fact, UEFI specification allows users to modify > security database variables if their signatures are verified. > For example, "db" must be signed by one of certificates in PK or KEK, > and updating its value will should be authenticated in SetVariable API. > That is what my patch#7 exactly does. > > Thanks, > -Takahiro Akashi I agree. It must be possible for any user of the EFI subsystem to be able to update db/KEK/PK *if* he provides a valid signatures. The thing is that keys are replaced and rerolled, not only because keys were com- promised, but also because some policies say it's useful to replace the keys regularly so that attempts to crack the key have less time to be successfull. There are more use-cases then that, but what is important is that it's possible to change them, if properly signed. Thanks, Patrick ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers: optee: rpmb: fix returning CID to TEE
On 11/18/19 10:36 AM, Jens Wiklander wrote:
> Hi Jorge,
hey!
>
> On Fri, Nov 15, 2019 at 10:37 PM Jorge Ramirez-Ortiz
> wrote:
>> The MMC CID value is one of the input parameters to unequivocally
>> provision the the RPMB key.
>>
>> Before this patch, the value returned by the mmc driver in the Linux
>> kernel differs from the one returned by uboot to optee.
>>
>> This means that if Linux provisions the RPMB key, uboot wont be able
>> to access it (and the other way around).
>>
>> Fix it so both uboot and linux can access the RPMB partition
>> independently of who provisions the key.
>>
>> Signed-off-by: Jorge Ramirez-Ortiz
>> ---
>> drivers/tee/optee/rpmb.c | 5 -
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/tee/optee/rpmb.c b/drivers/tee/optee/rpmb.c
>> index 955155b3f8..5dbb1eae4a 100644
>> --- a/drivers/tee/optee/rpmb.c
>> +++ b/drivers/tee/optee/rpmb.c
>> @@ -98,6 +98,7 @@ static struct mmc *get_mmc(struct optee_private *priv, int
>> dev_id)
>> static u32 rpmb_get_dev_info(u16 dev_id, struct rpmb_dev_info *info)
>> {
>> struct mmc *mmc = find_mmc_device(dev_id);
>> + int i;
>>
>> if (!mmc)
>> return TEE_ERROR_ITEM_NOT_FOUND;
>> @@ -105,7 +106,9 @@ static u32 rpmb_get_dev_info(u16 dev_id, struct
>> rpmb_dev_info *info)
>> if (!mmc->ext_csd)
>> return TEE_ERROR_GENERIC;
>>
>> - memcpy(info->cid, mmc->cid, sizeof(info->cid));
>> + for (i = 0; i < ARRAY_SIZE(mmc->cid); i++)
>> + ((u32 *) info->cid)[i] = be32_to_cpu(mmc->cid[i]);
>> +
> So it seems to be a byte order issue. I can't find the place in the
> Linux kernel (or in tee-supplicant) where the corresponding byte
> swapping is done. Have you been able to find it or you just tried to
> swap the bytes and it seemed to work?
I compared against the full CID output from Linux and noticed that in
order to match that exact same output this swap seemed to be required. I
didnt dig any deeper since a similar swap operation is done on other
-different - values returned from U-boot to OP-TEE.
>
> I'm not yet convinced that be32_to_cpu() is the correct function here.
> OP-TEE masks out a few fields from the CID when deriving the key:
sure but isnt that a different matter?
AFAICS U-boot should be providing the same CID than Linux does, and
whatever OP-TEE might be masking out on the receiving end is orthogonal
to such value, isnt it? maybe I am not understanding your point?
>
> CID is a uint8_t[16] here
> /*
> * PRV/CRC would be changed when doing eMMC FFU
> * The following fields should be masked off when deriving RPMB key
> *
> * CID [55: 48]: PRV (Product revision)
> * CID [07: 01]: CRC (CRC7 checksum)
> * CID [00]: not used
> */
>
> Will this work as expected on a big endian machine?
>
> Cheers,
> Jens
>
>> info->rel_wr_sec_c = mmc->ext_csd[222];
>> info->rpmb_size_mult = mmc->ext_csd[168];
>> info->ret_code = RPMB_CMD_GET_DEV_INFO_RET_OK;
>> --
>> 2.23.0
>>
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[U-Boot] flashing and testing u-boot on chromebook_bob
Hi All, I was wondering if you could answer a few questions regarding u-boot on Asus CP101 gru/bob ? - To test the u-boot image following README.chromium-chainload, should I expect output on the display or do I need CDD/SuzyQable Cable for serial? - The CONFIG_SYS_TEXT_BASE is currently 0x0020 but shouldn't it be CONFIG_SYS_TEXT_BASE=0x2100 since its supposed to match CONFIG_KERNEL_START from /chromiumos/platform/depthcharge/board/gru/defconfig - In order to flash to spi, what's the procedure? -- Best Regards Sahaj Sarup ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] How to convert imximage.cfg so it can be used in mkimage?
Hi all, I am trying to create a bootstrap image for iMX6 and the command mkimage fails like below: $ mkimage -n imximage.cfg -T imximage -e 0x1700 -d overlay_img bootstrap_img.bin Error: imximage.cfg[1] - Invalid command(/*) Further investigation shows that the error is caused by that there is c-type comments (/*...*/) in imximage.cfg file. When I remove all the c-type comments in the file, it works fine. u-boot document does say that imximage.cfg accept comment line starting with '#' in the file. However, that file, which is coming together with u-boot source has c-type comments. I am thinking the file is involved in some u-boot compiling. How to convert that file to remove all the c-type comments automatically so it can be used in mkimage command? Thanks, Yan ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] cmd: Add command to display or save Linux PStore dumps
This patch adds a new pstore command allowing to display or save ramoops
logs (oops, panic, console, ftrace and user) generated by a previous
kernel crash.
PStore parameters can be set in U-Boot configuration file, or at run-time
using "pstore set" command. Records size should be the same as the ones
used by kernel, and should be a power of 2.
This command allows:
- to display uncompressed logs
- to save compressed or uncompressed logs, compressed logs are saved as a
compressed stream, it may need some work to be able to decompress it,
e.g. adding a fake header:
"printf "\x1f\x8b\x08\x00\x00\x00\x00\x00\x00\x00" |
cat - dmesg-ramoops-0.enc.z | gzip -dc"
- ECC part is not used to check memory corruption
- only 1st FTrace log is displayed or saved
Signed-off-by: Frédéric Danis
---
cmd/Kconfig | 63
cmd/Makefile | 1 +
cmd/pstore.c | 417 +++
3 files changed, 481 insertions(+)
create mode 100644 cmd/pstore.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index cf982ff65e..7e28100b98 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1675,6 +1675,69 @@ config CMD_QFW
feature is to allow easy loading of files passed to qemu-system
via -kernel / -initrd
+config CMD_PSTORE
+ bool "pstore"
+ help
+ This provides access to Linux PStore. The main feature is to allow to
+ display or save PStore records.
+
+config CMD_PSTORE_ADDR
+ hex "Mem Address"
+ depends on CMD_PSTORE
+ default "0x0"
+ help
+ Base addr used for PStore ramoops memory, should be identical to
+ ramoops.mem_address parameter used by kernel
+
+config CMD_PSTORE_SIZE
+ hex "Mem size"
+ depends on CMD_PSTORE
+ default "0x0"
+ help
+ Size of PStore ramoops memory, should be identical to ramoops.mem_size
+ parameter used by kernel
+
+config CMD_PSTORE_RECORD_SIZE
+ hex "Dump record size"
+ depends on CMD_PSTORE
+ default "0x1000"
+ help
+ Size of each dump done on oops/panic, should be identical to
+ ramoops.record_size parameter used by kernel
+
+config CMD_PSTORE_CONSOLE_SIZE
+ hex "Kernel console log size"
+ depends on CMD_PSTORE
+ default "0x1000"
+ help
+ Size of kernel console log, should be identical to
+ ramoops.console_size parameter used by kernel
+
+config CMD_PSTORE_FTRACE_SIZE
+ hex "FTrace log size"
+ depends on CMD_PSTORE
+ default "0x1000"
+ help
+ Size of ftrace log, should be identical to ramoops.ftrace_size
+ parameter used by kernel
+
+config CMD_PSTORE_PMSG_SIZE
+ hex "User space message log size"
+ depends on CMD_PSTORE
+ default "0x1000"
+ help
+ Size of user space message log, should be identical to
+ ramoops.pmsg_size parameter used by kernel
+
+config CMD_PSTORE_ECC_SIZE
+ int "ECC size"
+ depends on CMD_PSTORE
+ default "0"
+ help
+ if non-zero, the option enables ECC support and specifies ECC buffer
+ size in bytes (1 is a special value, means 16 bytes ECC), should be
+ identical to ramoops.ramoops_ecc parameter used by kernel
+
source "cmd/mvebu/Kconfig"
config CMD_TERMINAL
diff --git a/cmd/Makefile b/cmd/Makefile
index 2d723ea0f0..0f3196b3d6 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -108,6 +108,7 @@ ifdef CONFIG_PCI
obj-$(CONFIG_CMD_PCI) += pci.o
endif
obj-$(CONFIG_CMD_PINMUX) += pinmux.o
+obj-$(CONFIG_CMD_PSTORE) += pstore.o
obj-$(CONFIG_CMD_PXE) += pxe.o
obj-$(CONFIG_CMD_WOL) += wol.o
obj-$(CONFIG_CMD_QFW) += qfw.o
diff --git a/cmd/pstore.c b/cmd/pstore.c
new file mode 100644
index 00..60266a3027
--- /dev/null
+++ b/cmd/pstore.c
@@ -0,0 +1,417 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright © 2019 Collabora Ltd
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct persistent_ram_buffer {
+ u32sig;
+ u32start;
+ u32size;
+ u8 data[0];
+};
+
+#define PERSISTENT_RAM_SIG (0x43474244) /* DBGC */
+#define RAMOOPS_KERNMSG_HDR ""
+
+#define PSTORE_TYPE_DMESG 0
+#define PSTORE_TYPE_CONSOLE 2
+#define PSTORE_TYPE_FTRACE 3
+#define PSTORE_TYPE_PMSG 7
+#define PSTORE_TYPE_ALL 255
+
+static char *pstore_addr = (char *)CONFIG_CMD_PSTORE_ADDR;
+static ulong pstore_length = CONFIG_CMD_PSTORE_SIZE;
+static unsigned int pstore_record_size = CONFIG_CMD_PSTORE_RECORD_SIZE;
+static unsigned int pstore_console_size = CONFIG_CMD_PSTORE_CONSOLE_SIZE;
+static unsigned int pstore_ftrace_size = CONFIG_CMD_PSTORE_FTRACE_SIZE;
+static unsigned int pstore_pmsg_size = CONFIG_CMD_PSTORE_PMSG_SIZE;
+static unsigned int pstore_ecc_size = CONFIG_CMD_PSTORE_ECC_SIZE;
+static unsigned int buffer_size;
+
+/* Check kernel header and get compression flag if available.
+ * Kernel header: .[-]\n
+ * compression: C if record is compressed, else D
+ * Returns length
Re: [U-Boot] Issues when saving environment in RK399 RockPI 4
Hi Matthias, Fabio: Thanks for the reply. On Fri, 8 Nov 2019 at 13:45, Matthias Brugger wrote: > > Hi Ezequiel, > > On 07/11/2019 20:27, Fabio Estevam wrote: > > Hi Ezequiel, > > > > On Thu, Nov 7, 2019 at 3:45 PM Ezequiel Garcia > > wrote: > >> > >> I decided to test latest U-Boot, following instructions in > >> doc/README.rockchip. The instructions seemed > >> clear and I could build this easily. > >> > >> However, there seems to be an issue when I save the environment. Any ideas? > >> > >> => saveenv > >> Saving Environment to MMC... Writing to MMC(0)... OK > >> => reset > >> resetting ... > >> U-Boot TPL 2020.01-rc1-00213-g0f282c1876af-dirty (Nov 07 2019 - 15:21:44) > >> Trying to boot from BOOTROM > >> Returning to boot ROM... > >> > >> U-Boot SPL 2020.01-rc1-00213-g0f282c1876af-dirty (Nov 07 2019 - 15:21:44 > >> -0300) > >> Trying to boot from MMC2 > >> > >> > >> U-Boot 2020.01-rc1-00213-g0f282c1876af-dirty (Nov 07 2019 - 15:21:44 -0300) > >> > >> Model: Radxa ROCK Pi 4 > >> DRAM: 2 GiB > >> Cannot find regulator pwm init_voltage > >> MMC: dwmmc@fe32: 1, sdhci@fe33: 0 > >> Loading Environment from MMC... OK > >> In:serial@ff1a > >> Out: serial@ff1a > >> Err: serial@ff1a > >> Model: Radxa ROCK Pi 4 > >> ## Error: Can't overwrite "serial#" > >> ## Error inserting "serial#" variable, errno=1 > >> initcall sequence 7ffc10b8 failed at call 00202a20 (err=-1) > >> ### ERROR ### Please RESET the board ### > > > > I have observed issues like this with i.MX when U-Boot size grew and > > overlapped the environment variable region. > > > > Here is one commit that fixed the issue for mx53loco board: > > https://gitlab.denx.de/u-boot/u-boot/commit/033f6ea5fa5fce63d52c8c2b63d8284144415b88 > > > > Try to investigate if this could be cause of the issue you are seeing. > > > > You could also try the first two patches from this series: > https://patchwork.ozlabs.org/user/todo/uboot/?series=132338 > > Maybe you are hit by the over-writing discontiguous files bug in the FAT code. > It's probably something along those lines. OTOH, it seems RK3399 is under going some more work, judging by some patches recently sent. I decided to go back to some vendor bootloader until upstream settles a bit on the stable side. Will be getting back to this sooner or later. Thanks again, Ezequiel ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/2] sifive: fu540: Enable OF_SEPARATE
On Mon, Nov 18, 2019 at 7:30 PM Jagan Teki wrote: > > Use dts support from U-Boot via OF_SEPARATE instead of depending from > opensbi. > > This would help to make the necessary changes in drivers and device trees > in U-Boot tree itself. This feature would also be helpful to not pass > dtb during opensbi builds. > > Signed-off-by: Jagan Teki > --- > Changes for v4: > - Drop abosolete text > > configs/sifive_fu540_defconfig | 3 ++- > doc/board/sifive/fu540.rst | 5 + > 2 files changed, 3 insertions(+), 5 deletions(-) > Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
