[PATCH v3 5/5] test/py: Create a test for launching UEFI binaries from FIT images
This test verifies the implementation of the 'bootm' extension that
handles UEFI binaries inside FIT images (enabled via CONFIG_BOOTM_EFI).
Signed-off-by: Cristian Ciocaltea
---
test/py/tests/test_efi_fit.py | 233 ++
1 file changed, 233 insertions(+)
create mode 100644 test/py/tests/test_efi_fit.py
diff --git a/test/py/tests/test_efi_fit.py b/test/py/tests/test_efi_fit.py
new file mode 100644
index 00..52b415b198
--- /dev/null
+++ b/test/py/tests/test_efi_fit.py
@@ -0,0 +1,233 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (c) 2019, Cristian Ciocaltea
+
+# Test launching UEFI binaries from FIT images.
+
+import os
+import pytest
+import u_boot_utils as util
+
+# Define the parametrized ITS data to be used for FIT image generation.
+its_data = '''
+/dts-v1/;
+
+/ {
+description = "EFI image with FDT blob";
+#address-cells = <1>;
+
+images {
+efi {
+description = "Sandbox EFI";
+data = /incbin/("%(efi-bin)s");
+type = "%(kernel-type)s";
+arch = "sandbox";
+os = "efi";
+compression = "%(efi-comp)s";
+load = <0x0>;
+entry = <0x0>;
+};
+fdt {
+description = "Sandbox FDT";
+data = /incbin/("%(fdt-bin)s");
+type = "flat_dt";
+arch = "sandbox";
+compression = "%(fdt-comp)s";
+};
+};
+
+configurations {
+default = "config-efi-fdt";
+config-efi-fdt {
+description = "EFI FIT w/ FDT";
+kernel = "efi";
+fdt = "fdt";
+};
+config-efi-nofdt {
+description = "EFI FIT w/o FDT";
+kernel = "efi";
+};
+};
+};
+'''
+
+# Define the parametrized FDT data.
+fdt_data = '''
+/dts-v1/;
+
+/ {
+model = "Sandbox %(fdt_type) EFI FIT Boot Test ";
+compatible = "sandbox";
+
+reset@0 {
+compatible = "sandbox,reset";
+};
+};
+'''
+
+@pytest.mark.boardspec('sandbox')
+@pytest.mark.buildconfigspec('bootm_efi')
+@pytest.mark.buildconfigspec('cmd_bootefi_hello_compile')
+@pytest.mark.requiredtool('dtc')
+def test_efi_fit(u_boot_console):
+"""Test handling of UEFI binaries inside FIT images.
+
+The tests are trying to launch U-Boot's helloworld.efi embedded into
+FIT images, in uncompressed or gzip compressed format.
+
+Additionally, a sample FDT blob is created and embedded into the above
+mentioned FIT images, in uncompressed or gzip compressed format.
+
+The following test cases are currently defined and enabled:
+- Launch uncompressed FIT EFI & FIT FDT
+- Launch compressed FIT EFI & FIT FDT
+- Launch uncompressed FIT EFI & internal FDT
+- Launch compressed FIT EFI & internal FDT
+"""
+
+def make_fpath(fname):
+"""Compute the path of a given (temporary) file.
+
+Args:
+fname: The name of a file within U-Boot build dir.
+Return:
+The computed file path.
+"""
+return os.path.join(u_boot_console.config.build_dir, fname)
+
+def make_efi(fname, comp):
+"""Create an UEFI binary.
+
+This simply copies lib/efi_loader/helloworld.efi into U-Boot
+build dir and, optionally, compresses the file using gzip.
+
+Args:
+fname: The target file name within U-Boot build dir.
+comp: Flag to enable gzip compression.
+Return:
+The path of the created file.
+"""
+bin_path = make_fpath(fname)
+os.system('cp %s %s' % (make_fpath('lib/efi_loader/helloworld.efi'),
bin_path))
+if comp:
+util.run_and_log(u_boot_console, ['gzip', '-f', bin_path])
+bin_path += '.gz'
+return bin_path
+
+def make_dtb(fdt_type, comp):
+"""Create a sample DTB file.
+
+Creates a DTS file and compiles it to a DTB.
+
+Args:
+fdt_type: The type of the FDT, i.e. internal, user.
+comp: Flag to enable gzip compression.
+Returns:
+The path of the created file.
+"""
+dts = make_fpath('test-efi-fit-sandbox-%s.dts' % fdt_type)
+dtb = make_fpath('test-efi-fit-sandbox-%s.dtb' % fdt_type)
+with open(dts, 'w') as fd:
+fd.write(fdt_data)
+util.run_and_log(u_boot_console, ['dtc', dts, '-O', 'dtb', '-o', dtb])
+if comp:
+util.run_and_log(u_boot_console, ['gzip', '-f', dtb])
+dtb += '.gz'
+return dtb
+
+def make_fit(efi_comp, fdt_comp):
+"""Create a sample FIT image.
+
+Runs 'mkimage' to create a FIT image within U-Boot build dir.
+Args:
+efi_comp: Enable gzip compression for the EFI binary.
+fdt_comp: Enable gzip compression for the FDT blob.
+Return:
+The path of the created file.
+"""
+# Generate resources referenced by ITS.
+
Re: [BUG] POWER: undefined reference to `_restgpr_25_x'
On 12/16/19 2:10 PM, Wolfgang Denk wrote: Dear Heinrich, In message you wrote: with powerpc64-linux-gnu-gcc, version 9.2.1, big endian I see the errors below when compiling P2041RDB_defconfig. I'm not sure if it's a good idea (and supposed to work) to use a 64 bit compiler for a 32 bit application. It might be missing some of the needed gcc libraries. Thanks for the hint. The reported problem does not occur with export CROSS_COMPILE=powerpc-linux-gnu- Best regards Heinrich
[PATCH v3 4/5] doc: uefi.rst: Document launching UEFI binaries from FIT images
This patch adds a new section "Launching a UEFI binary from a FIT image"
documenting the usage of the CONFIG_BOOTM_EFI extension to bootm command
that offers a verified boot alternative for UEFI binaries such as GRUB2.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Heinrich Schuchardt
---
doc/uefi/uefi.rst | 34 ++
1 file changed, 34 insertions(+)
diff --git a/doc/uefi/uefi.rst b/doc/uefi/uefi.rst
index db942df694..a8fd886d6b 100644
--- a/doc/uefi/uefi.rst
+++ b/doc/uefi/uefi.rst
@@ -63,6 +63,40 @@ The environment variable 'bootargs' is passed as load
options in the UEFI system
table. The Linux kernel EFI stub uses the load options as command line
arguments.
+Launching a UEFI binary from a FIT image
+
+
+A signed FIT image can be used to securely boot a UEFI image via the
+bootm command. This feature is available if U-Boot is configured with::
+
+CONFIG_BOOTM_EFI=y
+
+A sample configuration is provided as file doc/uImage.FIT/uefi.its.
+
+Below you find the output of an example session starting GRUB::
+
+=> load mmc 0:1 ${kernel_addr_r} image.fit
+4620426 bytes read in 83 ms (53.1 MiB/s)
+=> bootm ${kernel_addr_r}#config-grub-nofdt
+## Loading kernel from FIT Image at 4040 ...
+ Using 'config-grub-nofdt' configuration
+ Verifying Hash Integrity ... sha256,rsa2048:dev+ OK
+ Trying 'efi-grub' kernel subimage
+ Description: GRUB EFI Firmware
+ Created: 2019-11-20 8:18:16 UTC
+ Type: Kernel Image (no loading done)
+ Compression: uncompressed
+ Data Start: 0x404000d0
+ Data Size:450560 Bytes = 440 KiB
+ Hash algo:sha256
+ Hash value:
4dbee00021112df618f58b3f7cf5e1595533d543094064b9ce991e8b054a9eec
+ Verifying Hash Integrity ... sha256+ OK
+ XIP Kernel Image (no loading done)
+## Transferring control to EFI (at address 404000d0) ...
+Welcome to GRUB!
+
+See doc/uImage.FIT/howto.txt for an introduction to FIT images.
+
Executing the boot manager
~~
--
2.17.1
[PATCH v3 0/5] Add support for booting EFI FIT images
Currently the only way to run an EFI binary like GRUB2 is via the
'bootefi' command, which cannot be used in a verified boot scenario.
The obvious solution to this limitation is to add support for
booting FIT images containing those EFI binaries.
The implementation relies on a new image type - IH_OS_EFI - which
can be created by using 'os = "efi"' inside an ITS file:
/ {
#address-cells = <1>;
images {
efi-grub {
description = "GRUB EFI";
data = /incbin/("bootarm.efi");
type = "kernel_noload";
arch = "arm";
os = "efi";
compression = "none";
load = <0x0>;
entry = <0x0>;
hash-1 {
algo = "sha256";
};
};
};
configurations {
default = "config-grub";
config-grub {
kernel = "efi-grub";
signature-1 {
algo = "sha256,rsa2048";
sign-images = "kernel";
};
};
};
};
The bootm command has been extended to handle the IH_OS_EFI images.
To enable this feature, a new configuration option has been added:
BOOTM_EFI
I tested the solution using the 'qemu_arm' board:
=> load scsi 0:1 ${kernel_addr_r} efi-image.fit
=> bootm ${kernel_addr_r}#config-grub
Changes in v3:
* Rebase patches on Heinrich Schuchardt's patch series v3:
efi_loader: prepare for FIT images
https://lists.denx.de/pipermail/u-boot/2019-December/393677.html
This fixes implicitly the sandbox issue 'phys_to_virt: Cannot map
sandbox address' since efi_install_fdt() is now expecting a pointer
to addressable memory instead of a physical address.
* Get rid of 'EFI/BOOT/' prefix used in ITS samples
* Add a python test to verify the implementation in sandbox environment
Changes in v2:
* Rebase patches on Heinrich Schuchardt's patch series:
efi_loader: prepare for FIT images
https://lists.denx.de/pipermail/u-boot/2019-December/393192.html
* Add sample configuration: doc/uImage.FIT/uefi.its
* Update uefi documentation: doc/uefi/uefi.rst
Cristian Ciocaltea (5):
image: Add IH_OS_EFI for EFI chain-load boot
bootm: Add a bootm command for type IH_OS_EFI
doc: Add sample uefi.its image description file
doc: uefi.rst: Document launching UEFI binaries from FIT images
test/py: Create a test for launching UEFI binaries from FIT images
cmd/Kconfig | 7 +
common/bootm_os.c | 56
common/image-fit.c| 3 +-
common/image.c| 1 +
doc/uImage.FIT/uefi.its | 67 ++
doc/uefi/uefi.rst | 34 +
include/image.h | 1 +
test/py/tests/test_efi_fit.py | 233 ++
8 files changed, 401 insertions(+), 1 deletion(-)
create mode 100644 doc/uImage.FIT/uefi.its
create mode 100644 test/py/tests/test_efi_fit.py
--
2.17.1
[PATCH v3 1/5] image: Add IH_OS_EFI for EFI chain-load boot
Add a new OS type to be used for chain-loading an EFI compatible
firmware or boot loader like GRUB2, possibly in a verified boot
scenario.
Bellow is sample ITS file that generates a FIT image supporting
secure boot. Please note the presence of 'os = "efi";' line, which
identifies the currently introduced OS type:
/ {
#address-cells = <1>;
images {
efi-grub {
description = "GRUB EFI";
data = /incbin/("bootarm.efi");
type = "kernel_noload";
arch = "arm";
os = "efi";
compression = "none";
load = <0x0>;
entry = <0x0>;
hash-1 {
algo = "sha256";
};
};
};
configurations {
default = "config-grub";
config-grub {
kernel = "efi-grub";
signature-1 {
algo = "sha256,rsa2048";
sign-images = "kernel";
};
};
};
};
Signed-off-by: Cristian Ciocaltea
---
common/image-fit.c | 3 ++-
common/image.c | 1 +
include/image.h| 1 +
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/common/image-fit.c b/common/image-fit.c
index 5c63c769de..19e313bf41 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1925,7 +1925,8 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
image_type == IH_TYPE_FPGA ||
fit_image_check_os(fit, noffset, IH_OS_LINUX) ||
fit_image_check_os(fit, noffset, IH_OS_U_BOOT) ||
- fit_image_check_os(fit, noffset, IH_OS_OPENRTOS);
+ fit_image_check_os(fit, noffset, IH_OS_OPENRTOS) ||
+ fit_image_check_os(fit, noffset, IH_OS_EFI);
/*
* If either of the checks fail, we should report an error, but
diff --git a/common/image.c b/common/image.c
index f17fa40c49..2e0e2b0e7f 100644
--- a/common/image.c
+++ b/common/image.c
@@ -134,6 +134,7 @@ static const table_entry_t uimage_os[] = {
{ IH_OS_OPENRTOS, "openrtos", "OpenRTOS", },
#endif
{ IH_OS_OPENSBI, "opensbi", "RISC-V OpenSBI", },
+ { IH_OS_EFI, "efi", "EFI Firmware" },
{ -1, "", "", },
};
diff --git a/include/image.h b/include/image.h
index f4d2aaf53e..4a280b78e7 100644
--- a/include/image.h
+++ b/include/image.h
@@ -157,6 +157,7 @@ enum {
IH_OS_ARM_TRUSTED_FIRMWARE, /* ARM Trusted Firmware */
IH_OS_TEE, /* Trusted Execution Environment */
IH_OS_OPENSBI, /* RISC-V OpenSBI */
+ IH_OS_EFI, /* EFI Firmware (e.g. GRUB2) */
IH_OS_COUNT,
};
--
2.17.1
[PATCH v3 3/5] doc: Add sample uefi.its image description file
This patch adds an example FIT image description file demonstrating
the usage of bootm command to securely launch UEFI binaries.
Signed-off-by: Cristian Ciocaltea
Reviewed-by: Heinrich Schuchardt
---
doc/uImage.FIT/uefi.its | 67 +
1 file changed, 67 insertions(+)
create mode 100644 doc/uImage.FIT/uefi.its
diff --git a/doc/uImage.FIT/uefi.its b/doc/uImage.FIT/uefi.its
new file mode 100644
index 00..378ca4ed8d
--- /dev/null
+++ b/doc/uImage.FIT/uefi.its
@@ -0,0 +1,67 @@
+/*
+ * Example FIT image description file demonstrating the usage of the
+ * bootm command to launch UEFI binaries.
+ *
+ * Two boot configurations are available to enable booting GRUB2 on QEMU,
+ * the former uses a FDT blob contained in the FIT image, while the later
+ * relies on the FDT provided by the board emulator.
+ */
+
+/dts-v1/;
+
+/ {
+ description = "GRUB2 EFI and QEMU FDT blob";
+ #address-cells = <1>;
+
+ images {
+ efi-grub {
+ description = "GRUB EFI Firmware";
+ data = /incbin/("bootarm.efi");
+ type = "kernel_noload";
+ arch = "arm";
+ os = "efi";
+ compression = "none";
+ load = <0x0>;
+ entry = <0x0>;
+ hash-1 {
+ algo = "sha256";
+ };
+ };
+
+ fdt-qemu {
+ description = "QEMU DTB";
+ data = /incbin/("qemu-arm.dtb");
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ hash-1 {
+ algo = "sha256";
+ };
+ };
+ };
+
+ configurations {
+ default = "config-grub-fdt";
+
+ config-grub-fdt {
+ description = "GRUB EFI Boot w/ FDT";
+ kernel = "efi-grub";
+ fdt = "fdt-qemu";
+ signature-1 {
+ algo = "sha256,rsa2048";
+ key-name-hint = "dev";
+ sign-images = "kernel", "fdt";
+ };
+ };
+
+ config-grub-nofdt {
+ description = "GRUB EFI Boot w/o FDT";
+ kernel = "efi-grub";
+ signature-1 {
+ algo = "sha256,rsa2048";
+ key-name-hint = "dev";
+ sign-images = "kernel";
+ };
+ };
+ };
+};
--
2.17.1
[PATCH v3 2/5] bootm: Add a bootm command for type IH_OS_EFI
Add support for booting EFI binaries contained in FIT images.
A typical usage scenario is chain-loading GRUB2 in a verified
boot environment.
Signed-off-by: Cristian Ciocaltea
---
cmd/Kconfig | 7 ++
common/bootm_os.c | 56 +++
2 files changed, 63 insertions(+)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index cf982ff65e..39fa87082d 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -263,6 +263,13 @@ config CMD_BOOTI
help
Boot an AArch64 Linux Kernel image from memory.
+config BOOTM_EFI
+ bool "Support booting EFI OS images"
+ depends on CMD_BOOTEFI
+ default y
+ help
+ Support booting EFI images via the bootm command.
+
config BOOTM_LINUX
bool "Support booting Linux OS images"
depends on CMD_BOOTM || CMD_BOOTZ || CMD_BOOTI
diff --git a/common/bootm_os.c b/common/bootm_os.c
index 6fb7d658da..96792430da 100644
--- a/common/bootm_os.c
+++ b/common/bootm_os.c
@@ -6,10 +6,12 @@
#include
#include
+#include
#include
#include
#include
#include
+#include
#include
#include
@@ -462,6 +464,57 @@ static int do_bootm_tee(int flag, int argc, char * const
argv[],
}
#endif
+#ifdef CONFIG_BOOTM_EFI
+static int do_bootm_efi(int flag, int argc, char * const argv[],
+ bootm_headers_t *images)
+{
+ int ret;
+ efi_status_t efi_ret;
+ void *image_buf;
+
+ if (flag != BOOTM_STATE_OS_GO)
+ return 0;
+
+ /* Locate FDT, if provided */
+ ret = bootm_find_images(flag, argc, argv);
+ if (ret)
+ return ret;
+
+ /* Initialize EFI drivers */
+ efi_ret = efi_init_obj_list();
+ if (efi_ret != EFI_SUCCESS) {
+ printf("## Failed to initialize UEFI sub-system: r = %lu\n",
+ efi_ret & ~EFI_ERROR_MASK);
+ return 1;
+ }
+
+ /* Install device tree */
+ efi_ret = efi_install_fdt(images->ft_len
+ ? images->ft_addr : EFI_FDT_USE_INTERNAL);
+ if (efi_ret != EFI_SUCCESS) {
+ printf("## Failed to install device tree: r = %lu\n",
+ efi_ret & ~EFI_ERROR_MASK);
+ return 1;
+ }
+
+ /* Run EFI image */
+ printf("## Transferring control to EFI (at address %08lx) ...\n",
+ images->ep);
+ bootstage_mark(BOOTSTAGE_ID_RUN_OS);
+
+ image_buf = map_sysmem(images->ep, images->os.image_len);
+
+ efi_ret = efi_run_image(image_buf, images->os.image_len);
+ if (efi_ret != EFI_SUCCESS) {
+ printf("## Failed to run EFI image: r = %lu\n",
+ efi_ret & ~EFI_ERROR_MASK);
+ return 1;
+ }
+
+ return 0;
+}
+#endif
+
static boot_os_fn *boot_os[] = {
[IH_OS_U_BOOT] = do_bootm_standalone,
#ifdef CONFIG_BOOTM_LINUX
@@ -498,6 +551,9 @@ static boot_os_fn *boot_os[] = {
#ifdef CONFIG_BOOTM_OPTEE
[IH_OS_TEE] = do_bootm_tee,
#endif
+#ifdef CONFIG_BOOTM_EFI
+ [IH_OS_EFI] = do_bootm_efi,
+#endif
};
/* Allow for arch specific config before we boot */
--
2.17.1
Re: [U-Boot] [PATCH] net/phy: Fix phy_connect() for phy addr 0
On 11/7/19 9:04 PM, Joe Hershberger wrote: > On Thu, Nov 7, 2019 at 1:16 PM Tom Rini wrote: >> >> On Tue, Nov 05, 2019 at 04:05:11AM +, Priyanka Jain wrote: >> >>> Fix 'mask' calculation in phy_connect() for phy addr '0'. >>> 'mask' is getting set to '0x' for phy addr '0' >>> in phy_connect() whereas expected value is '0'. >>> >>> >>> Signed-off-by: Priyanka Jain >> >> Reported-by: tetsu-aoki via github > > Acked-by: Joe Hershberger Sadly, this breaks systems where a PHY is at address 0. I have such an STM32MP1 system with LAN8720 PHY and since this patch, I cannot use ethernet. Please revert. -- Best regards, Marek Vasut
Re: [PATCH v3 4/6] drivers: net: add Felix DSA switch driver
On 12/15/2019 3:16 PM, Vladimir Oltean wrote:
On Sun, 15 Dec 2019 at 14:53, Vladimir Oltean wrote:
Hi Alex,
On Tue, 3 Dec 2019 at 18:18, Alex Marginean wrote:
+static int felix_port_enable(struct udevice *dev, int port,
+struct phy_device *phy)
+{
+ struct felix_priv *priv = dev_get_priv(dev);
+ void *base = priv->regs_base;
+
+ out_le32(base + FELIX_GMII_MAC_ENA_CFG(port),
+FELIX_GMII_MAX_ENA_CFG_TX | FELIX_GMII_MAX_ENA_CFG_RX);
+
+ out_le32(base + FELIX_QSYS_SYSTEM_SW_PORT_MODE(port),
+FELIX_QSYS_SYSTEM_SW_PORT_ENA |
+FELIX_QSYS_SYSTEM_SW_PORT_LOSSY |
+FELIX_QSYS_SYSTEM_SW_PORT_SCH(1));
+
+ if (phy)
+ phy_startup(phy);
+ return 0;
+}
+
+static void felix_port_disable(struct udevice *dev, int port,
+ struct phy_device *phy)
+{
+ struct felix_priv *priv = dev_get_priv(dev);
+ void *base = priv->regs_base;
+
+ out_le32(base + FELIX_GMII_MAC_ENA_CFG(port), 0);
+
+ out_le32(base + FELIX_QSYS_SYSTEM_SW_PORT_MODE(port),
+FELIX_QSYS_SYSTEM_SW_PORT_LOSSY |
+FELIX_QSYS_SYSTEM_SW_PORT_SCH(1));
+
+ /*
+* we don't call phy_shutdown here to avoind waiting next time we use
+* the port, but the downside is that remote side will think we're
+* actively processing traffic although we are not.
+*/
+}
--
2.17.1
What is the correct general procedure here, is it to call phy_startup
so late (felix_port_enable)? I'm trying to take this driver as an
example for sja1105, which has RGMII so PCS and no autonomous in-band
AN like felix does. On this switch, it is too late to do phy_startup
now. Instead, I would need to look at phy->speed which should have
been settled by now, and reprogram my MAC with it.
My question is: don't you think phy_startup() and phy_shutdown()
belong in the DSA uclass code?
My bad, phy_startup() is synchronous and waits for PHY AN to complete.
So this is fine.
Thanks,
-Vladimir
OK, thanks :)
Alex
Re: [PATCH v3 4/6] drivers: net: add Felix DSA switch driver
On 12/15/2019 1:53 PM, Vladimir Oltean wrote:
Hi Alex,
On Tue, 3 Dec 2019 at 18:18, Alex Marginean wrote:
+static int felix_port_enable(struct udevice *dev, int port,
+struct phy_device *phy)
+{
+ struct felix_priv *priv = dev_get_priv(dev);
+ void *base = priv->regs_base;
+
+ out_le32(base + FELIX_GMII_MAC_ENA_CFG(port),
+FELIX_GMII_MAX_ENA_CFG_TX | FELIX_GMII_MAX_ENA_CFG_RX);
+
+ out_le32(base + FELIX_QSYS_SYSTEM_SW_PORT_MODE(port),
+FELIX_QSYS_SYSTEM_SW_PORT_ENA |
+FELIX_QSYS_SYSTEM_SW_PORT_LOSSY |
+FELIX_QSYS_SYSTEM_SW_PORT_SCH(1));
+
+ if (phy)
+ phy_startup(phy);
+ return 0;
+}
+
+static void felix_port_disable(struct udevice *dev, int port,
+ struct phy_device *phy)
+{
+ struct felix_priv *priv = dev_get_priv(dev);
+ void *base = priv->regs_base;
+
+ out_le32(base + FELIX_GMII_MAC_ENA_CFG(port), 0);
+
+ out_le32(base + FELIX_QSYS_SYSTEM_SW_PORT_MODE(port),
+FELIX_QSYS_SYSTEM_SW_PORT_LOSSY |
+FELIX_QSYS_SYSTEM_SW_PORT_SCH(1));
+
+ /*
+* we don't call phy_shutdown here to avoind waiting next time we use
+* the port, but the downside is that remote side will think we're
+* actively processing traffic although we are not.
+*/
+}
--
2.17.1
What is the correct general procedure here, is it to call phy_startup
so late (felix_port_enable)? I'm trying to take this driver as an
example for sja1105, which has RGMII so PCS and no autonomous in-band
AN like felix does. On this switch, it is too late to do phy_startup
now.
Why is it too late? Is it a functional problem, or you're looking to
reduce the waiting time?
Instead, I would need to look at phy->speed which should have
been settled by now, and reprogram my MAC with it.
My question is: don't you think phy_startup() and phy_shutdown()
belong in the DSA uclass code?
Thanks,
-Vladimir
The API is similar to the one in Linux, plus I didn't want to force a
specific PHY related behavior to drivers. Sometimes it's fine to start
up the PHYs at probe and then just send/receive as needed, but that
behavior is not always acceptable. Assume there is some other host
connected to one of the front panel ports, if it sees link up it may
start doing DHCP, IPv6 discovery. I think it's generally better to keep
links down unless the port is actually in use for the benefit of the
remote end. I didn't want to force this by moving the PHY calls to
uclass code. This approach is also similar to eth uclass, it doesn't
handle phy calls for the driver either.
Alex
Re: [PATCH v3 1/6] net: introduce DSA class for Ethernet switches
On 12/15/2019 2:08 PM, Vladimir Oltean wrote:
On Tue, 3 Dec 2019 at 17:32, Alex Marginean wrote:
+/**
+ * This function deals with additional devices around the switch as these
should
+ * have been bound to drivers by now.
+ * TODO: pick up references to other switch devices here, if we're cascaded.
+ */
+static int dm_dsa_pre_probe(struct udevice *dev)
+{
+ struct dsa_perdev_platdata *platdata = dev_get_platdata(dev);
+ int i;
+
+ if (!platdata)
+ return -EINVAL;
+
+ if (ofnode_valid(platdata->master_node))
+ uclass_find_device_by_ofnode(UCLASS_ETH, platdata->master_node,
+>master_dev);
+
+ for (i = 0; i < platdata->num_ports; i++) {
+ struct dsa_port_platdata *port = >port[i];
+
+ if (port->dev) {
+ port->dev->priv = port;
+ port->phy = dm_eth_phy_connect(port->dev);
Fixed-link interfaces don't work with DM_MDIO. That is somewhat
natural as there is no MDIO bus for a fixed-link. However the legacy
phy_connect function can be made rather easily to work with
fixed-link, since it has the necessary code for dealing with it
already. I am not, however, sure how it ever worked in the absence of
an MDIO bus.
commit 1b7e23cc7e6d0dc3fe7ae9c55390b40717ff3c3a
Author: Vladimir Oltean
Date: Sat Dec 14 23:25:40 2019 +0200
phy: make phy_connect_fixed work with a null mdio bus
It is utterly pointless to require an MDIO bus pointer for a fixed PHY
device. The fixed.c implementation does not require it, only
phy_device_create. Fix that.
Signed-off-by: Vladimir Oltean
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 80a7664e4978..8ea5c9005291 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -658,7 +658,7 @@ static struct phy_device *phy_device_create(struct
mii_dev *bus, int addr,
dev = malloc(sizeof(*dev));
if (!dev) {
printf("Failed to allocate PHY device for %s:%d\n",
- bus->name, addr);
+ bus ? bus->name : "(null bus)", addr);
return NULL;
}
@@ -686,7 +686,7 @@ static struct phy_device *phy_device_create(struct
mii_dev *bus, int addr,
return NULL;
}
- if (addr >= 0 && addr < PHY_MAX_ADDR)
+ if (addr >= 0 && addr < PHY_MAX_ADDR && phy_id != PHY_FIXED_ID)
bus->phymap[addr] = dev;
return dev;
With the patch above in place, fixed-link can also be made to work
with some logic similar to what can be seen below:
if (ofnode_valid(ofnode_find_subnode(port->dev->node, "fixed-link")))
port->phy = phy_connect(NULL, 0, port->dev, phy_mode); //
phy_mode needs to be pre-parsed somewhere else as well
else
port->phy = dm_eth_phy_connect(port->dev);
How would you see fixed-link interfaces being treated? My question so
far is in the context of front-panel ports but I am interested in your
view of the CPU port situation as well.
I was thinking turning dm_eth_phy_connect into a more generic helper
that also deals with fixed links, which it does not yet. That would
move the "fixed-link" if out of the driver code. Ideally the driver
should be able to call a single helper and, if the device has a DT node,
it would get back a PHY handle to either a proper PHY or to a fixed link
(from phy_connect_fixed).
Alex
+ }
+ }
+
+ return 0;
+}
Thanks,
-Vladimir
Re: [PATCH v3 1/6] net: introduce DSA class for Ethernet switches
Hi Vladimir,
On 12/15/2019 1:44 PM, Vladimir Oltean wrote:
Hi Alex,
On Tue, 3 Dec 2019 at 17:32, Alex Marginean wrote:
DSA stands for Distributed Switch Architecture and it covers switches that
are connected to the CPU through an Ethernet link and generally use frame
tags to pass information about the source/destination ports to/from CPU.
Front panel ports are presented as regular ethernet devices in U-Boot and
they are expected to support the typical networking commands.
DSA switches may be cascaded, DSA class code does not currently support
this.
Signed-off-by: Alex Marginean
---
drivers/net/Kconfig| 13 ++
include/dm/uclass-id.h | 1 +
include/net/dsa.h | 141
net/Makefile | 1 +
net/dsa-uclass.c | 369 +
5 files changed, 525 insertions(+)
create mode 100644 include/net/dsa.h
create mode 100644 net/dsa-uclass.c
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 4182897d89..a4157cb122 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -37,6 +37,19 @@ config DM_MDIO_MUX
This is currently implemented in net/mdio-mux-uclass.c
Look in include/miiphy.h for details.
+config DM_DSA
+ bool "Enable Driver Model for DSA switches"
+ depends on DM_ETH && DM_MDIO
+ help
+ Enable Driver Model for DSA switches
+
+ Adds UCLASS_DSA class supporting switches that follow the Distributed
+ Switch Architecture (DSA). These switches rely on the presence of a
+ management switch port connected to an Ethernet controller capable of
+ receiving frames from the switch. This host Ethernet controller is
+ called "master" and "cpu" in DSA terminology.
+ This is currently implemented in net/dsa-uclass.c
+
config MDIO_SANDBOX
depends on DM_MDIO && SANDBOX
default y
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 0c563d898b..8f37a91488 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -42,6 +42,7 @@ enum uclass_id {
UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */
UCLASS_DSI_HOST,/* Display Serial Interface host */
UCLASS_DMA, /* Direct Memory Access */
+ UCLASS_DSA, /* Distributed (Ethernet) Switch Architecture */
UCLASS_EFI, /* EFI managed devices */
UCLASS_ETH, /* Ethernet device */
UCLASS_FIRMWARE,/* Firmware */
diff --git a/include/net/dsa.h b/include/net/dsa.h
new file mode 100644
index 00..2387419b9d
--- /dev/null
+++ b/include/net/dsa.h
@@ -0,0 +1,141 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2019 NXP
+ */
+
+#ifndef __DSA_H__
+#define __DSA_H__
+
+#include
+#include
+#include
+
+/**
+ * DSA stands for Distributed Switch Architecture and it is infrastructure
+ * intended to support drivers for Switches that rely on an intermediary
+ * Ethernet device for I/O. These switches may support cascading allowing
+ * them to be arranged as a tree.
+ * DSA is documented in detail in the Linux kernel documentation under
+ * Documentation/networking/dsa/dsa.txt
+ * The network layout of such a switch is shown below:
+ *
+ * |---
+ * | CPU network device (eth0)|
+ *
+ * | |
+ * ||
+ * | Switch driver |
+ * ||
+ * |||| ||
+ * |---| |---| |---|
+ * | sw0p0 | | sw0p1 | | sw0p2 |
+ * |---| |---| |---|
+ *
+ * In U-Boot the intent is to allow access to front panel ports (shown at the
+ * bottom of the picture) though the master Ethernet port (eth0 in the
picture).
+ * Front panel ports are presented as regular Ethernet devices in U-Boot and
+ * they are expected to support the typical networking commands.
+ * In general DSA switches require the use of tags, extra headers added both by
+ * software on Tx and by the switch on Rx. These tags carry at a minimum port
+ * information and switch information for cascaded set-ups.
+ * In U-Boot these tags are inserted and parsed by the DSA switch driver, the
+ * class code helps with headroom/tailroom for the extra headers.
+ *
+ * TODO:
+ * - handle switch cascading, for now U-Boot only supports stand-alone
switches.
+ * - propagate the master Eth MAC address to switch ports, this is used in
+ * Linux to avoid using additional MAC addresses on master Eth.
Any idea how this would be done?
The DSA master port needs to have the MAC address of the switch eth
device in its RX filter (eth_get_ops(dev)->write_hwaddr), or otherwise
be in promiscuous mode to receive packets destined to its MAC address.
Either that, or the switch eth devices need to inherit the MAC address
of the
RE: [U-Boot] [PATCH v2 1/2] spi: nxp_fspi: new driver for the FlexSPI controller
>-Original Message- >From: Michael Walle >Sent: Monday, December 16, 2019 6:50 PM >To: Priyanka Jain ; Jagan Teki >; Vignesh R >Cc: u-boot@lists.denx.de >Subject: Re: [U-Boot] [PATCH v2 1/2] spi: nxp_fspi: new driver for the FlexSPI >controller > >Hi Priyanka, Hi Jagan, Hi Vingesh, > >Am 2019-11-29 08:49, schrieb Michael Walle: >> Am 2019-11-29 06:03, schrieb Priyanka Jain: -Original Message- From: U-Boot On Behalf Of Michael Walle Sent: Saturday, November 2, 2019 11:56 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v2 1/2] spi: nxp_fspi: new driver for the FlexSPI controller This is a port of the kernel's spi-nxp-fspi driver. It uses the new spi-mem interface and does not expose the more generic spi-xfer interface. The source was taken from the v5.3-rc3 tag. The port was straightforward: - remove the interrupt handling and the completion by busy polling the controller - remove locks - move the setup of the memory windows into claim_bus() - move the setup of the speed into set_speed() - port the device tree bindings from the original fspi_probe() to ofdata_to_platdata() There were only some style change fixes, no change in any logic. For example, there are busy loops where the return code is not handled correctly, eg. only prints a warning with WARN_ON(). This port intentionally left most functions unchanged to ease future bugfixes. This was tested on a custom LS1028A board. Because the LS1028A doesn't have proper clock framework support, changing the clock speed was not tested. This also means that it is not possible to change the SPI speed on LS1028A for now (neither is it possible in the linux driver). Signed-off-by: Michael Walle Reviewed-by: Jagan Teki --- changes since v1: - fixed typo, thanks Jagan drivers/spi/Kconfig| 7 + drivers/spi/Makefile | 1 + drivers/spi/nxp_fspi.c | 997 + 3 files changed, 1005 insertions(+) create mode 100644 drivers/spi/nxp_fspi.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 7be867d5b6..ad20309df8 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -192,6 +192,13 @@ config MVEBU_A3700_SPI used to access the SPI NOR flash on platforms embedding this Marvell IP core. +config NXP_FSPI + bool "NXP FlexSPI driver" + depends on SPI_MEM + help +Enable the NXP FlexSPI (FSPI) driver. This driver can be used to +access the SPI NOR flash on platforms embedding this NXP IP core. + config PIC32_SPI bool "Microchip PIC32 SPI driver" depends on MACH_PIC32 diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index ae4f2958f8..52462e19a3 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -43,6 +43,7 @@ obj-$(CONFIG_MSCC_BB_SPI) += mscc_bb_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o obj-$(CONFIG_MXC_SPI) += mxc_spi.o obj-$(CONFIG_MXS_SPI) += mxs_spi.o +obj-$(CONFIG_NXP_FSPI) += nxp_fspi.o obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_PIC32_SPI) += pic32_spi.o diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c new file mode 100644 index 00..b808418eb6 --- /dev/null +++ b/drivers/spi/nxp_fspi.c @@ -0,0 +1,997 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * NXP FlexSPI(FSPI) controller driver. + * + * Copyright (c) 2019 Michael Walle >>> The file is ported from Linux. >>> Any particular reason of adding copyright? >> >> so what? the "original" copyright is mentioned. It is certainly not >> the case that there wasn't any changes. I get the feeling that you >> just want to have "your" NXP copyright here. If any, there should be >> the copyright of the original spi-nxp-qspi.c driver, which is not NXP. >> But instead NXP - lets say borrowed - much of its code for "their" >> spi-nxp-fspi.c and _dropped_ all former copyrights. >> >> >>> Can you change this to Author/Ported-by? >> Nope. > I am not asking you to drop copyright. It's a query to understand what value you are adding to the existing Linux driver. The process that I follow for all copyright additions in case things are not very explicit. >ping. there was already tested-by's and reviewd-by's. > >> >> -michael >> + * + * This driver was originally ported from the linux kernel +v5.4-rc3, which had + * the following notes: + * >>> > >btw the original copyright is here after the snip. FWIW i can move that one >also >to the top. but I certainly won't drop mine. Please pull in original copyright to the top as well. > >-michael -Priyanka
RE: [Patch v2 1/7] spi: Transform the FSL QuadSPI driver to use the SPI MEM API
>-Original Message- >From: Kuldeep Singh >Sent: Monday, December 16, 2019 5:19 PM >To: u-boot@lists.denx.de >Cc: ja...@amarulasolutions.com; Priyanka Jain ; >s...@denx.de; Ashish Kumar ; >frieder.schre...@kontron.de; Kuldeep Singh ; Ashish >Kumar >Subject: [Patch v2 1/7] spi: Transform the FSL QuadSPI driver to use the SPI >MEM >API > >To support the SPI MEM API, instead of modifying the existing U-Boot >driver, this patch adds a port of the existing Linux driver. >This also has the advantage that porting changes and fixes from Linux >will be easier. >Porting of driver left most of the functions unchanged while few of the >changes are: >-Remove lock(mutexes) and irq handler as uboot is a single core execution. >-Remove clock support as the changing spi speed is not supported in >uboot and nor in linux. > >Currently tested on LS1088ARDB, LS1012ARDB, LS1046ARDB, LS1046AFRWY, >LS1043AQDS, LS1021ATWR, LS2080ARDB > >Signed-off-by: Frieder Schrempf >Signed-off-by: Ashish Kumar >Signed-off-by: Kuldeep Singh >--- > drivers/spi/fsl_qspi.c | 1562 +++- > drivers/spi/fsl_qspi.h | 145 > 2 files changed, 593 insertions(+), 1114 deletions(-) > delete mode 100644 drivers/spi/fsl_qspi.h > >diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c >index 8e2a09df36..96178c06bc 100644 >--- a/drivers/spi/fsl_qspi.c >+++ b/drivers/spi/fsl_qspi.c >@@ -1,1142 +1,766 @@ > // SPDX-License-Identifier: GPL-2.0+ >+ > /* >- * Copyright 2013-2015 Freescale Semiconductor, Inc. >+ * Freescale QuadSPI driver. >+ * >+ * Copyright (C) 2013 Freescale Semiconductor, Inc. >+ * Copyright (C) 2018 Bootlin >+ * Copyright (C) 2018 exceet electronics GmbH >+ * Copyright (C) 2018 Kontron Electronics GmbH >+ * Copyright (C) 2019-2020 NXP Please check copyright format It seems the changes have been brought from Linux driver. If yes, it would be good to mention that in File header > * >- * Freescale Quad Serial Peripheral Interface (QSPI) driver >+ * Based on the original fsl-quadspi.c spi-nor driver. >+ * Transition to spi-mem in spi-fsl-qspi.c > */ > > #include >-#include >-#include > #include >-#include >-#include > #include >-#include >-#include >-#include >-#include "fsl_qspi.h" >+#include >+#include >+#include >+#include > > DECLARE_GLOBAL_DATA_PTR; > >-#define OFFSET_BITS_MASK GENMASK(23, 0) >- >-#define FLASH_STATUS_WEL 0x02 >- >-/* SEQID */ >-#define SEQID_WREN1 >-#define SEQID_FAST_READ 2 >-#define SEQID_RDSR3 >-#define SEQID_SE 4 >-#define SEQID_CHIP_ERASE 5 >-#define SEQID_PP 6 >-#define SEQID_RDID7 >-#define SEQID_BE_4K 8 >-#ifdef CONFIG_SPI_FLASH_BAR >-#define SEQID_BRRD9 >-#define SEQID_BRWR10 >-#define SEQID_RDEAR 11 >-#define SEQID_WREAR 12 >-#endif >-#define SEQID_WRAR13 >-#define SEQID_RDAR14 >- >-/* QSPI CMD */ >-#define QSPI_CMD_PP 0x02/* Page program (up to 256 bytes) */ >-#define QSPI_CMD_RDSR 0x05/* Read status register */ >-#define QSPI_CMD_WREN 0x06/* Write enable */ >-#define QSPI_CMD_FAST_READ0x0b/* Read data bytes (high >frequency) */ >-#define QSPI_CMD_BE_4K0x20/* 4K erase */ >-#define QSPI_CMD_CHIP_ERASE 0xc7/* Erase whole flash chip */ >-#define QSPI_CMD_SE 0xd8/* Sector erase (usually 64KiB) */ >-#define QSPI_CMD_RDID 0x9f/* Read JEDEC ID */ >- >-/* Used for Micron, winbond and Macronix flashes */ >-#define QSPI_CMD_WREAR 0xc5/* EAR register write */ >-#define QSPI_CMD_RDEAR 0xc8/* EAR reigster read */ >- >-/* Used for Spansion flashes only. */ >-#define QSPI_CMD_BRRD 0x16/* Bank register read >*/ >-#define QSPI_CMD_BRWR 0x17/* Bank register write >*/ >- >-/* Used for Spansion S25FS-S family flash only. */ >-#define QSPI_CMD_RDAR 0x65/* Read any device register */ >-#define QSPI_CMD_WRAR 0x71/* Write any device register */ >- >-/* 4-byte address QSPI CMD - used on Spansion and some Macronix flashes */ >-#define QSPI_CMD_FAST_READ_4B 0x0c/* Read data bytes (high >frequency) */ >-#define QSPI_CMD_PP_4B0x12/* Page program (up to 256 >bytes) */ >-#define QSPI_CMD_SE_4B0xdc/* Sector erase (usually 64KiB) >*/ >- >-/* fsl_qspi_platdata flags */ >-#define QSPI_FLAG_REGMAP_ENDIAN_BIG BIT(0) >- >-/* default SCK frequency, unit: HZ */ >-#define FSL_QSPI_DEFAULT_SCK_FREQ 5000 >- >-/* QSPI max chipselect signals number */ >-#define FSL_QSPI_MAX_CHIPSELECT_NUM 4 >- >-/* Controller needs driver to swap endian */ >+/* >+ * The driver only uses one single LUT entry, that is updated on >+ * each call of exec_op(). Index 0 is preset at boot with a basic >+ * read operation, so let's use the last entry (15). >+ */ >+#define SEQID_LUT
RE: [Patch v2 2/7] treewide: Remove unused FSL QSPI config options
>-Original Message- >From: Kuldeep Singh >Sent: Monday, December 16, 2019 5:19 PM >To: u-boot@lists.denx.de >Cc: ja...@amarulasolutions.com; Priyanka Jain ; >s...@denx.de; Ashish Kumar ; >frieder.schre...@kontron.de; Kuldeep Singh ; >Ashish Kumar >Subject: [Patch v2 2/7] treewide: Remove unused FSL QSPI config options > >Some of these options are not used by the driver anymore and some of them >are obsolete as the information is gathered from the dt. >Also consolidating defines in common headers. > >Signed-off-by: Frieder Schrempf >Signed-off-by: Ashish Kumar >Signed-off-by: Kuldeep Singh >--- > .../include/asm/arch-fsl-layerscape/config.h | 1 - > arch/arm/include/asm/arch-ls102xa/config.h | 1 - > include/configs/ls1012a_common.h | 17 + > include/configs/ls1012afrwy.h | 3 --- > include/configs/ls1012ardb.h | 3 --- > include/configs/ls1021aiot.h | 6 -- > include/configs/ls1021aqds.h | 11 --- > include/configs/ls1021atwr.h | 10 -- > include/configs/ls1043aqds.h | 2 -- > include/configs/ls1046afrwy.h | 9 - > include/configs/ls1046aqds.h | 11 --- > include/configs/ls1046ardb.h | 13 - > include/configs/ls1088a_common.h | 6 -- > include/configs/ls1088aqds.h | 8 > include/configs/ls1088ardb.h | 18 -- > include/configs/ls2080aqds.h | 2 -- > include/configs/ls2080ardb.h | 8 ++-- > include/configs/mx6sxsabreauto.h | 6 -- > include/configs/mx6sxsabresd.h | 11 --- > include/configs/mx6ul_14x14_evk.h | 6 -- > include/configs/mx6ullevk.h| 6 -- > include/configs/mx7dsabresd.h | 8 > include/configs/pcm052.h | 7 --- > include/configs/vf610twr.h | 8 > scripts/config_whitelist.txt | 5 - > 25 files changed, 3 insertions(+), 183 deletions(-) > >diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h >b/arch/arm/include/asm/arch-fsl-layerscape/config.h >index a83c70ece2..913f7b179f 100644 >--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h >+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h >@@ -304,7 +304,6 @@ > #define CONFIG_SYS_FSL_ESDHC_BE > #define CONFIG_SYS_FSL_WDOG_BE > #define CONFIG_SYS_FSL_DSPI_BE >-#define CONFIG_SYS_FSL_QSPI_BE > #define CONFIG_SYS_FSL_CCSR_GUR_BE > #define CONFIG_SYS_FSL_PEX_LUT_BE > >diff --git a/arch/arm/include/asm/arch-ls102xa/config.h >b/arch/arm/include/asm/arch-ls102xa/config.h >index 970537870d..3884948a2c 100644 >--- a/arch/arm/include/asm/arch-ls102xa/config.h >+++ b/arch/arm/include/asm/arch-ls102xa/config.h >@@ -94,7 +94,6 @@ > #define CONFIG_SYS_FSL_ESDHC_BE > #define CONFIG_SYS_FSL_WDOG_BE > #define CONFIG_SYS_FSL_DSPI_BE >-#define CONFIG_SYS_FSL_QSPI_BE > #define CONFIG_SYS_FSL_DCU_BE > #define CONFIG_SYS_FSL_SEC_MON_LE > #define CONFIG_SYS_FSL_SFP_VER_3_2 >diff --git a/include/configs/ls1012a_common.h >b/include/configs/ls1012a_common.h >index 2579e2fb37..efd0ee41b6 100644 >--- a/include/configs/ls1012a_common.h >+++ b/include/configs/ls1012a_common.h >@@ -37,23 +37,8 @@ > #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * >1024) > > /*SPI device */ >-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_TFABOOT) > #define CONFIG_SYS_FMAN_FW_ADDR 0x400d >-#define CONFIG_SPI_FLASH_SPANSION Please check order of patches. We are just removing configs in these patches, but adding the same in subsequent patches. Wont it break the system in between the series? -Priyanka
RE: [U-Boot] [PATCH V3 2/2] core: device: use dev_power_domain_on
> Subject: Re: [U-Boot] [PATCH V3 2/2] core: device: use > dev_power_domain_on > > Hi Igor, > > On Mon, Dec 16, 2019 at 12:29 PM Igor Opaniuk > wrote: > > > I do face the same boot issues on colibri-imx8qxp_defconfig , In my > > case using imx_4.19.35_1.0.0 TF-A(ATF) doesn't help too. > > > > Bi-secting also points to this commit. > > As we are close to the release, I think we should do a revert. > > Could you please send a revert patch to fix the regression? No, the previous method not check return value of power domain on, so even if fails, it still continue. However this patch will check the return value, if power fails, if will return failure. I think this is the issue, you need check which power domain fails in your side. Revert this patch is not good. Thanks, Peng. > > Thanks
RE: [PATCH] imx8mm_evk: Adjust the environment for booting a mainline kernel
> Subject: [PATCH] imx8mm_evk: Adjust the environment for booting a mainline > kernel > > Adjust the environment for booting a mainline kernel by default. > > Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan > --- > configs/imx8mm_evk_defconfig | 1 - > include/configs/imx8mm_evk.h | 8 > 2 files changed, 4 insertions(+), 5 deletions(-) > > diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig > index 87560ef989..e007766e84 100644 > --- a/configs/imx8mm_evk_defconfig > +++ b/configs/imx8mm_evk_defconfig > @@ -21,7 +21,6 @@ CONFIG_SPL_LOAD_FIT=y > CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" > CONFIG_OF_SYSTEM_SETUP=y > > CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/i > mximage-8mm-lpddr4.cfg" > -CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-evk.dtb" > CONFIG_BOARD_LATE_INIT=y > CONFIG_SPL_BOARD_INIT=y > CONFIG_SPL_SEPARATE_BSS=y > diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h > index acbab05ae9..b134351c8c 100644 > --- a/include/configs/imx8mm_evk.h > +++ b/include/configs/imx8mm_evk.h > @@ -38,12 +38,12 @@ > /* Initial environment variables */ > #define CONFIG_EXTRA_ENV_SETTINGS\ > "script=boot.scr\0" \ > - "image=Image.itb\0" \ > + "image=Image\0" \ > "console=ttymxc1,115200 earlycon=ec_imx6q,0x3089,115200\0" \ > "fdt_addr=0x4300\0" \ > "fdt_high=0x\0" \ > - "boot_fit=try\0" \ > - "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ > + "boot_fit=no\0" \ > + "fdt_file=imx8mm-evk.dtb\0" \ > "initrd_addr=0x4380\0" \ > "initrd_high=0x\0" \ > "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ @@ -113,7 > +113,7 @@ > (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) > > #define CONFIG_ENV_OVERWRITE > -#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ > +#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ > #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 > */ > > /* Size of malloc() pool */ > -- > 2.17.1
Re: [U-Boot] [PATCH V3 2/2] core: device: use dev_power_domain_on
Hi Igor, On Mon, Dec 16, 2019 at 6:16 PM Igor Opaniuk wrote: > Sure, will do tomorrow morning asap.Btw, there is also a regression in MMC > subsystem (currently AFK, will look into it and provide more details also > tomorrow), probably the same as explained in the "i.MX8MM-EVK Boot failure" > thread. What is the MMC error you see? It seems we need an equivalent of kernelci.org in U-Boot. We are seeing lots of regression and we are close to the release.
Re: [U-Boot] [PATCH V3 2/2] core: device: use dev_power_domain_on
Hi Fabio, On Mon, Dec 16, 2019, 18:24 Fabio Estevam wrote: > Hi Igor, > > On Mon, Dec 16, 2019 at 12:29 PM Igor Opaniuk > wrote: > > > I do face the same boot issues on colibri-imx8qxp_defconfig , > > In my case using imx_4.19.35_1.0.0 TF-A(ATF) doesn't help too. > > > > Bi-secting also points to this commit. > > As we are close to the release, I think we should do a revert. > > Could you please send a revert patch to fix the regression? > Sure, will do tomorrow morning asap.Btw, there is also a regression in MMC subsystem (currently AFK, will look into it and provide more details also tomorrow), probably the same as explained in the "i.MX8MM-EVK Boot failure" thread. Thanks > Thanks >
Re: [U-Boot] [PATCH 0/6] J721e HS device support
Hi Tom, I see you have a -next again, if you don't want to take this for the v2020.01 perhaps this could be a good candidate for the next? Andrew On 11/20/19 10:59 PM, Lokesh Vutla wrote: > > > On 20/11/19 11:10 PM, Andrew F. Davis wrote: >> Hello all, >> >> This series brings up High-Security (HS) device support on the J721e >> platform. Support for this K3 HS device is much like the existing >> AM65x HS and this series leverages much of that support. >> >> There are also a couple tangentially related fixups that I noticed while >> adding this support and testing. Although not strictly needed they >> do allow J721e HS to just work out-of-box by the time the last patch >> adds the defconfigs. > > For the entire series: > > Reviewed-by: Lokesh Vutla > > Thank and regards, > Lokesh > >> >> Thanks, >> Andrew >> >> Andrew F. Davis (6): >> configs: j721e_evm.h: Sync J721e environment configuration with AM65x >> configs: ti: Factor out call to 'args_mmc' into MMC common environment >> arm: K3: Fix header comment match AM6 specific file function >> arm: K3: Disable ROM configured firewalls >> arm: K3: Increase default SYSFW image size allocation >> configs: Add configs for J721e High Security EVM >> >> arch/arm/mach-k3/Kconfig | 2 +- >> arch/arm/mach-k3/am6_init.c| 28 +++- >> arch/arm/mach-k3/common.c | 30 >> arch/arm/mach-k3/common.h | 7 ++ >> arch/arm/mach-k3/j721e_init.c | 52 ++ >> configs/j721e_hs_evm_a72_defconfig | 106 + >> configs/j721e_hs_evm_r5_defconfig | 102 +++ >> include/configs/j721e_evm.h| 16 - >> include/configs/ti_armv7_common.h | 1 - >> include/environment/ti/mmc.h | 5 +- >> 10 files changed, 341 insertions(+), 8 deletions(-) >> create mode 100644 configs/j721e_hs_evm_a72_defconfig >> create mode 100644 configs/j721e_hs_evm_r5_defconfig >>
Re: i.MX8MM-EVK Boot failure
Hi Ricardo, On Thu, Dec 12, 2019 at 6:20 PM Ricardo Salveti wrote: > Can you also confirm if mmc is working correctly on imx8mm evk? > > I currently building with atf imx_4.19.35_1.1.0 and firmware-imx 8.5 > (tried multiple versions, no difference) and I'm unable to get u-boot > to find the mmc device. The funny thing is that SPL itself seems to be > fine, the problem is really just u-boot: > > U-Boot SPL 2020.01-rc4-00245-g7ab49b8c8a (Dec 12 2019 - 18:15:31 -0300) > DDRINFO: start DRAM init > DDRINFO:ddrphy calibration done > DDRINFO: ddrmix config done > Normal Boot > Trying to boot from MMC1 > NOTICE: Configuring TZASC380 > NOTICE: RDC off > NOTICE: BL31: v2.0(release):rel_imx_4.19.35_1.1.0-0-g70fa7bcc1-dirty > NOTICE: BL31: Built : 18:09:39, Dec 12 2019 > NOTICE: sip svc init > > U-Boot 2020.01-rc4-00245-g7ab49b8c8a (Dec 12 2019 - 18:15:31 -0300) > > CPU: Freescale i.MX8MMQ rev1.0 at 1200 MHz > Reset cause: POR > Model: FSL i.MX8MM EVK board > DRAM: 2 GiB > MMC: FSL_SDHC: 1, FSL_SDHC: 2 > Loading Environment from MMC... *** Warning - bad CRC, using default > environment > > In:serial > Out: serial > Err: serial > Net: > Warning: ethernet@30be using MAC address from ROM > eth0: ethernet@30be > Hit any key to stop autoboot: 0 > MMC Device 0 not found > no mmc device at slot 0 > MMC Device 0 not found > no mmc device at slot 0 Yes, I noticed that as well. We need to use mmcdev=1 I have sent a patch that fixes it. Regards, Fabio Estevam
Re: [ANN] U-Boot v2020.01-rc5 released
Hi Andy, On Tue, Dec 17, 2019 at 12:21 AM Andy Shevchenko wrote: > > On Mon, Dec 16, 2019 at 2:41 PM Tom Rini wrote: > > > > Hey all, > > > > It's release day and here is v2020.01-rc5. At this point, we should be > > just seeing regression fixes, and preferably to ones introduced this > > cycle rather than older regressions too. > > > > Once again, for a changelog, > > git log --merges v2020.01-rc4..v2020.01-rc5 > > and as always, I ask for more details in the PRs people send me so I can > > put them in the merge commit. > > > > I've also had my first PR in a while for the -next branch. If people > > have other stuff they think is otherwise ready, please put together a PR > > for -next and I'll adjust my tooling more to make it even easier on my > > end to test that. > > > > At this point I'm looking to do the release on January 6th. Thanks all! > > Sorry to answering here (I already removed rc4 announce). > > The commit 6b7ebff00190649d2136b34f6feebc0dbe85bfdc > Author: Jagan Teki > Date: Tue Nov 19 13:56:20 2019 +0530 > >usb: dwc3: Add phy interface for dwc3_uboot > > broke DFU on Intel Edison. Revert helps. (symptoms dfu-util stops > seeing device completely). > Please fix before release, or revert! Thanks for the notice, will come back for the fix or comments.
[PATCH] imx8mm_evk: Adjust the environment for booting a mainline kernel
Adjust the environment for booting a mainline kernel by default. Signed-off-by: Fabio Estevam --- configs/imx8mm_evk_defconfig | 1 - include/configs/imx8mm_evk.h | 8 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 87560ef989..e007766e84 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -21,7 +21,6 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" -CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-evk.dtb" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SEPARATE_BSS=y diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index acbab05ae9..b134351c8c 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -38,12 +38,12 @@ /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ - "image=Image.itb\0" \ + "image=Image\0" \ "console=ttymxc1,115200 earlycon=ec_imx6q,0x3089,115200\0" \ "fdt_addr=0x4300\0" \ "fdt_high=0x\0" \ - "boot_fit=try\0" \ - "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "boot_fit=no\0" \ + "fdt_file=imx8mm-evk.dtb\0" \ "initrd_addr=0x4380\0" \ "initrd_high=0x\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ @@ -113,7 +113,7 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_ENV_OVERWRITE -#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ +#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ /* Size of malloc() pool */ -- 2.17.1
Re: [PATCH v3 7/8] test: rng: Add basic test for random number generator(rng) uclass
hi Patrick,
On Mon, 16 Dec 2019 at 18:12, Patrick DELAUNAY
wrote:
> Hi,
>
> > -Original Message-
> > From: U-Boot On Behalf Of Sughosh Ganu
> > Sent: vendredi 13 décembre 2019 08:14
> > To: u-boot@lists.denx.de
> > Subject: [PATCH v3 7/8] test: rng: Add basic test for random number
> > generator(rng) uclass
> >
> > Add a unit test for testing the rng uclass functionality using the
> sandbox rng
> > driver.
> >
> > Signed-off-by: Sughosh Ganu
> > Reviewed-by: Patrice Chotard
> > ---
> > test/dm/Makefile | 1 +
> > test/dm/rng.c| 26 ++
> > 2 files changed, 27 insertions(+)
> > create mode 100644 test/dm/rng.c
>
> >
> > diff --git a/test/dm/Makefile b/test/dm/Makefile index 0c2fd5c..f61bf65
> 100644
> > --- a/test/dm/Makefile
> > +++ b/test/dm/Makefile
> > @@ -65,4 +65,5 @@ obj-$(CONFIG_VIRTIO_SANDBOX) += virtio.o
> > obj-$(CONFIG_DMA) += dma.o
> > obj-$(CONFIG_DM_MDIO) += mdio.o
> > obj-$(CONFIG_DM_MDIO_MUX) += mdio_mux.o
> > +obj-$(CONFIG_DM_RNG) += rng.o
> > endif
> > diff --git a/test/dm/rng.c b/test/dm/rng.c new file mode 100644 index
> > 000..879e80a
> > --- /dev/null
> > +++ b/test/dm/rng.c
> > @@ -0,0 +1,26 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +/*
> > + * Copyright (c) 2019, Linaro Limited
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +/* Basic test of the rng uclass */
> > +static int dm_test_rng_read(struct unit_test_state *uts) {
> > + unsigned long val1 = 0, val2 = 0;
> > + struct udevice *dev;
> > +
> > + ut_assertok(uclass_get_device(UCLASS_RNG, 0, ));
> > + ut_assertnonnull(dev);
> > + dm_rng_read(dev, , sizeof(val1));
> > + dm_rng_read(dev, , sizeof(val2));
>
> Test return:
>
> ut_assertok(dm_rng_read(dev, , sizeof(val1)));
> ut_assertok(dm_rng_read(dev, , sizeof(val2)))
>
Ok. Will add.
>
> > + ut_assert(val1 != val2);
>
> You can also check the values as the sandbox driver use only the 2 next
> values :
>
> ut_asserteq(0x21524110, val1);
> ut_asserteq(0xDEADBEEF, val2);
>
Ok. Will add.
-sughosh
Re: [PATCH v3 5/8] sandbox: rng: Add a random number generator(rng) driver
hi Patrick,
On Mon, 16 Dec 2019 at 18:00, Patrick DELAUNAY
wrote:
> Hi,
>
> > From: U-Boot On Behalf Of Sughosh Ganu
> > Sent: vendredi 13 décembre 2019 08:14
> >
> > Add a sandbox driver for random number generation. Mostly aimed at
> providing a
> > unit test for rng uclass.
> >
> > Signed-off-by: Sughosh Ganu
> > Reviewed-by: Patrice Chotard
> > ---
> > arch/sandbox/dts/test.dts | 4
> > drivers/rng/Kconfig | 7 +++
> > drivers/rng/Makefile | 1 +
> > drivers/rng/sandbox_rng.c | 36
> > 4 files changed, 48 insertions(+)
> > create mode 100644 drivers/rng/sandbox_rng.c
>
>
> > a/drivers/rng/sandbox_rng.c b/drivers/rng/sandbox_rng.c new file mode
> 100644
> > index 000..c5be552
> > --- /dev/null
> > +++ b/drivers/rng/sandbox_rng.c
> > @@ -0,0 +1,36 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +/*
> > + * Copyright (c) 2019, Linaro Limited
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +
> > +static unsigned long random = 0xdeadbeef;
> > +
> > +static int sandbox_rng_read(struct udevice *dev, void *data, size_t
> > +len) {
>
> Add protection on length I think:
> If (len != sizeof(random))
> retrun - EINVAL;
>
Ok. Will add this check.
>
> or treat the case len > 4 with loop ?
>
> > + random ^= ~0UL;
> > + *(unsigned long *)data = random;
> > +
> > + return sizeof(random);
>
> Read is OK, so I think the correct return value is 0:
>
Ok. Will change.
>
> return 0;
>
> NB: result (int) can be not enough to return the value read (size_t)
>
> PS: it not really a random generator here but simple sequence
>0xdeadbeef -> 0x21524110 -> 0xdeadbeef
>
> It is enough for unitary test, but is is enough for sandbox ?
> we could reused PRNG code from lib/rand.c ?
>
I actually wrote this solely from the point of view of adding a unit test
for the rng uclass. For which i think the simple sequence above should
suffice. Do you have a strong opinion on this. If so, i can change the
logic.
-sughosh
>
>
Re: [PATCH v3 1/8] dm: rng: Add random number generator(rng) uclass
hi Patrick,
On Mon, 16 Dec 2019 at 17:43, Patrick DELAUNAY
wrote:
> Hi,
>
> > From: U-Boot On Behalf Of Sughosh Ganu
> > Sent: vendredi 13 décembre 2019 08:14
> >
> > Add a uclass for reading a random number seed from a random number
> generator
> > device.
> >
> > Signed-off-by: Sughosh Ganu
> > Reviewed-by: Patrice Chotard
> > ---
> > drivers/Kconfig | 2 ++
> > drivers/Makefile | 1 +
> > drivers/rng/Kconfig | 7 +++
> > drivers/rng/Makefile | 6 ++
> > drivers/rng/rng-uclass.c | 23 +++
> > include/dm/uclass-id.h | 1 +
> > include/rng.h| 30 ++
> > 7 files changed, 70 insertions(+)
> > create mode 100644 drivers/rng/Kconfig
> > create mode 100644 drivers/rng/Makefile create mode 100644
> drivers/rng/rng-
> > uclass.c create mode 100644 include/rng.h
>
> > diff --git a/include/rng.h b/include/rng.h new file mode 100644 index
> > 000..61d5da9
> > --- /dev/null
> > +++ b/include/rng.h
> > @@ -0,0 +1,30 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (c) 2019, Linaro Limited
> > + */
> > +
> > +#if !defined _RNG_H_
> > +#define _RNG_H_
> > +
> > +#include
> > +
> > +/**
> > + * dm_rng_read() - read a random number seed from the rng device
> > + * @buffer: input buffer to put the read random seed into
> > + * @size:number of bytes of random seed read
>
> Missing return value here, I propose:
>
> @return zero on success, or -ve error code.
>
Ok. Will add.
>
> > + *
> > + */
> > +int dm_rng_read(struct udevice *dev, void *buffer, size_t size);
> > +
> > +/* struct dm_rng_ops - Operations for the hwrng uclass */ struct
> > +dm_rng_ops {
> > + /**
> > + * @read() - read a random number seed
> > + *
> > + * @data: input buffer to read the random seed
> > + * @max:total number of bytes to read
>
> Missing return value here, I propose:
>
> @return zero on success, or -ve error code.
>
Ok. Will add.
-sughosh
Re: [ANN] U-Boot v2020.01-rc5 released
On Mon, Dec 16, 2019 at 2:41 PM Tom Rini wrote: > > Hey all, > > It's release day and here is v2020.01-rc5. At this point, we should be > just seeing regression fixes, and preferably to ones introduced this > cycle rather than older regressions too. > > Once again, for a changelog, > git log --merges v2020.01-rc4..v2020.01-rc5 > and as always, I ask for more details in the PRs people send me so I can > put them in the merge commit. > > I've also had my first PR in a while for the -next branch. If people > have other stuff they think is otherwise ready, please put together a PR > for -next and I'll adjust my tooling more to make it even easier on my > end to test that. > > At this point I'm looking to do the release on January 6th. Thanks all! Sorry to answering here (I already removed rc4 announce). The commit 6b7ebff00190649d2136b34f6feebc0dbe85bfdc Author: Jagan Teki Date: Tue Nov 19 13:56:20 2019 +0530 usb: dwc3: Add phy interface for dwc3_uboot broke DFU on Intel Edison. Revert helps. (symptoms dfu-util stops seeing device completely). Please fix before release, or revert! -- With Best Regards, Andy Shevchenko
[PATCH v2 1/1] arch: arm: Program GIC LPI configuration table
From: Bharat Kumar Reddy Gooty Programs the following: 1. Redistributor PROCBASER configuration table (which is common for all redistributors) 2. Redistributor pending table (PENDBASER), for all the available redistributors. Signed-off-by: Bharat Kumar Reddy Gooty Signed-off-by: Vladimir Olovyannikov --- arch/arm/Kconfig | 10 +++ arch/arm/include/asm/gic-v3.h | 134 ++ arch/arm/lib/Makefile | 1 + arch/arm/lib/gic-v3-its.c | 100 + 4 files changed, 245 insertions(+) create mode 100644 arch/arm/include/asm/gic-v3.h create mode 100644 arch/arm/lib/gic-v3-its.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f96841c777..c0b45df9d0 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -61,6 +61,16 @@ config LNX_KRNL_IMG_TEXT_OFFSET_BASE endif endif +config GIC_V3_ITS + bool "ARM GICV3 ITS" + help + ARM GICV3 Interrupt translation service (ITS). + Basic support for programming locality specific peripheral + interrupts (LPI) configuration tables and enable LPI tables. + LPI configuration table can be used by u-boot or Linux. + ARM GICV3 has limitation, once the LPI table is enabled, LPI + configuration table can not be re-programmed, unless GICV3 reset. + config STATIC_RELA bool default y if ARM64 && !POSITION_INDEPENDENT diff --git a/arch/arm/include/asm/gic-v3.h b/arch/arm/include/asm/gic-v3.h new file mode 100644 index 00..ac6c9e7013 --- /dev/null +++ b/arch/arm/include/asm/gic-v3.h @@ -0,0 +1,134 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 Broadcom. + */ + +#ifndef __GIC_V3_H__ +#define __GIC_V3_H__ + +#define GICR_CTLR_ENABLE_LPIS BIT(0) +#define GICR_CTLR_RWP BIT(3) + +#define GICR_TYPER_CPU_NUMBER(r) (((r) >> 8) & 0x) + +#define GICR_WAKER_PROCESSORSLEEP BIT(1) +#define GICR_WAKER_CHILDRENASLEEP BIT(2) + +#define GIC_BASER_CACHE_NCNB 0ULL +#define GIC_BASER_CACHE_SAMEASINNER0ULL +#define GIC_BASER_CACHE_NC 1ULL +#define GIC_BASER_CACHE_RAWT 2ULL +#define GIC_BASER_CACHE_RAWB 3ULL +#define GIC_BASER_CACHE_WAWT 4ULL +#define GIC_BASER_CACHE_WAWB 5ULL +#define GIC_BASER_CACHE_RAWAWT 6ULL +#define GIC_BASER_CACHE_RAWAWB 7ULL +#define GIC_BASER_CACHE_MASK 7ULL +#define GIC_BASER_NONSHAREABLE 0ULL +#define GIC_BASER_INNERSHAREABLE 1ULL +#define GIC_BASER_OUTERSHAREABLE 2ULL +#define GIC_BASER_SHAREABILITY_MASK3ULL + +#define GIC_BASER_CACHEABILITY(reg, inner_outer, type) \ + (GIC_BASER_CACHE_##type << reg##_##inner_outer##_CACHEABILITY_SHIFT) + +#define GIC_BASER_SHAREABILITY(reg, type) \ + (GIC_BASER_##type << reg##_SHAREABILITY_SHIFT) + +/* encode a size field of width @w containing @n - 1 units */ +#define GIC_ENCODE_SZ(n, w) (((unsigned long)(n) - 1) &\ +GENMASK_ULL(((w) - 1), 0)) + +#define GICR_PROPBASER_SHAREABILITY_SHIFT (10) +#define GICR_PROPBASER_INNER_CACHEABILITY_SHIFT(7) +#define GICR_PROPBASER_OUTER_CACHEABILITY_SHIFT(56) +#define GICR_PROPBASER_SHAREABILITY_MASK \ + GIC_BASER_SHAREABILITY(GICR_PROPBASER, SHAREABILITY_MASK) +#define GICR_PROPBASER_INNER_CACHEABILITY_MASK \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK) +#define GICR_PROPBASER_OUTER_CACHEABILITY_MASK \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK) +#define GICR_PROPBASER_CACHEABILITY_MASK GICR_PROPBASER_INNER_CACHEABILITY_MASK + +#define GICR_PROPBASER_INNERSHAREABLE \ + GIC_BASER_SHAREABILITY(GICR_PROPBASER, INNERSHAREABLE) + +#define GICR_PROPBASER_NCNB\ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, NCNB) +#define GICR_PROPBASER_NC \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, NC) +#define GICR_PROPBASER_RAWT\ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWT) +#define GICR_PROPBASER_RAWB\ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWB) +#define GICR_PROPBASER_WAWT\ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WAWT) +#define GICR_PROPBASER_WAWB\ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WAWB) +#define GICR_PROPBASER_RAWAWT \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWAWT) +#define GICR_PROPBASER_RAWAWB \ + GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWAWB) + +#define GICR_PROPBASER_IDBITS_MASK (0x1f) +#define GICR_PROPBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 12)) +#define GICR_PENDBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 16)) + +#define GICR_PENDBASER_SHAREABILITY_SHIFT (10) +#define GICR_PENDBASER_INNER_CACHEABILITY_SHIFT(7) +#define GICR_PENDBASER_OUTER_CACHEABILITY_SHIFT(56) +#define GICR_PENDBASER_SHAREABILITY_MASK \ +
Re: [U-Boot] [PATCH V3 2/2] core: device: use dev_power_domain_on
Hi Igor, On Mon, Dec 16, 2019 at 12:29 PM Igor Opaniuk wrote: > I do face the same boot issues on colibri-imx8qxp_defconfig , > In my case using imx_4.19.35_1.0.0 TF-A(ATF) doesn't help too. > > Bi-secting also points to this commit. As we are close to the release, I think we should do a revert. Could you please send a revert patch to fix the regression? Thanks
Re: [U-Boot] [PATCH V3 2/2] core: device: use dev_power_domain_on
Hi Oliver, Fabio, Peng, On Thu, Dec 12, 2019 at 9:20 AM Oliver Graute wrote: > > On 11/12/19, Fabio Estevam wrote: > > Hi Oliver, > > > > On Tue, Dec 10, 2019 at 11:50 PM Peng Fan wrote: > > > > > Update your scfw/atf and they try again. > > > > Does it boot if you use the imx_4.19.35_1.0.0 ATF branch? > > Unfortunately, not. I checked out imx-atf in that branch. Build it with: > > make PLAT=imx8qm bl31 > > copied the resulting bl31.bin into my u-boot folder and rebuild that. > > But the imx8qm board is not booting with the resulting u-boot. > > do I need a new scfw from my vendor? > > Best Regards, > > Oliver FYI, I do face the same boot issues on colibri-imx8qxp_defconfig , In my case using imx_4.19.35_1.0.0 TF-A(ATF) doesn't help too. Bi-secting also points to this commit. -- Best regards - Freundliche Grüsse - Meilleures salutations Igor Opaniuk mailto: igor.opan...@gmail.com skype: igor.opanyuk +380 (93) 836 40 67 http://ua.linkedin.com/in/iopaniuk
[PATCH] dfu: Add option to skip empty pages when flashing UBI images to NAND
Add a new option to enable the DROP_FFS flag when flashing UBI images to
NAND in order to drop trailing all-0xff pages.
This is similar to the existing FASTBOOT_FLASH_NAND_TRIMFFS option.
Signed-off-by: Guillermo Rodriguez
Cc: Lukasz Majewski
---
drivers/dfu/Kconfig| 7 +++
drivers/dfu/dfu_nand.c | 7 ++-
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/dfu/Kconfig b/drivers/dfu/Kconfig
index 75fe0a12c6..5573f5e9cc 100644
--- a/drivers/dfu/Kconfig
+++ b/drivers/dfu/Kconfig
@@ -36,6 +36,13 @@ config DFU_NAND
This option enables using DFU to read and write to NAND based
storage.
+config DFU_NAND_TRIMFFS
+ bool "Skip empty pages when flashing UBI images to NAND"
+ depends on DFU_NAND
+ help
+ When flashing UBI images to NAND, enable the DROP_FFS flag to drop
+ trailing all-0xff pages.
+
config DFU_RAM
bool "RAM back end for DFU"
help
diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c
index b812a3dfb1..58b94348c9 100644
--- a/drivers/dfu/dfu_nand.c
+++ b/drivers/dfu/dfu_nand.c
@@ -50,6 +50,7 @@ static int nand_block_op(enum dfu_op op, struct dfu_entity
*dfu,
lim, buf);
} else {
nand_erase_options_t opts;
+ int write_flags = WITH_WR_VERIFY;
memset(, 0, sizeof(opts));
opts.offset = start;
@@ -62,8 +63,12 @@ static int nand_block_op(enum dfu_op op, struct dfu_entity
*dfu,
if (ret)
return ret;
/* then write */
+#ifdef CONFIG_DFU_NAND_TRIMFFS
+ if (dfu->data.nand.ubi)
+ write_flags |= WITH_DROP_FFS;
+#endif
ret = nand_write_skip_bad(mtd, start, , ,
- lim, buf, WITH_WR_VERIFY);
+ lim, buf, write_flags);
}
if (ret != 0) {
--
2.21.0
Re: [BUG] POWER: undefined reference to `_restgpr_25_x'
Hi Heinrich, On Mon, Dec 16, 2019 at 6:06 PM Heinrich Schuchardt wrote: > > Hello Wolfgang, > > with powerpc64-linux-gnu-gcc, version 9.2.1, big endian I see the errors > below when compiling P2041RDB_defconfig. > > post/drivers/memory.c:268: undefined reference to `_restgpr_25_x' > powerpc64-linux-gnu-ld.bfd: post/built-in.o: in function > `memory_post_test_lines': > post/drivers/memory.c:408: undefined reference to `_restgpr_31_x' > powerpc64-linux-gnu-ld.bfd: post/built-in.o: in function > `memory_post_test_patterns': > post/drivers/memory.c:436: undefined reference to `_restgpr_29_x' > powerpc64-linux-gnu-ld.bfd: post/built-in.o: in function > `memory_post_test_regions': > post/drivers/memory.c:453: undefined reference to `_restgpr_29_x' > powerpc64-linux-gnu-ld.bfd: post/built-in.o: in function `memory_post_test': > post/drivers/memory.c:540: undefined reference to `_restgpr_26_x' > make: *** [Makefile:1671: u-boot] Error > > On Debian Buster I issued the following commands: > > make P2041RDB_defconfig > sudo apt-get install gcc-powerpc64-linux-gnu > export CROSS_COMPILE=powerpc64-linux-gnu- > make Could you please paste the output of "powerpc64-linux-gnu-gcc -v .c" Regards, Bin
Re: [RFC PATCH 2/2] net: Add Support for GENET Ethernet controller
On Mon, 16 Dec 2019 18:15:01 +0530
Amit Tomer wrote:
Hi,
> Thanks for having the look.
thanks for the reply and the comments.
[ ... ]
> > > +#define TDMA_RING_REG_BASE(QUEUE_NUMBER) (GENET_TDMA_REG_OFF \
> > > ++ (DMA_RING_SIZE * (QUEUE_NUMBER)))
> >
> > So it seems like we are *always* using the default queue number. For
> > improved readability we could drop this parameter and hardcode this here,
> > so that users just need to use TDMA_RING_REG_BASE.
>
> Yeah, this can be done, only thing if in future we would like to work
> on some specific queue , keeping that in my mind I put it.
As I mentioned for Florian earlier, there is absolutely no reason for U-Boot to
ever support multiple queues. So we can very safely just ignore everything
other than the default queue.
[ ... ]
> > > +static void bcmgenet_umac_reset(struct bcmgenet_eth_priv *priv)
> > > +{
> > > + u32 reg;
> > > +
> > > + reg = readl(priv->mac_reg + SYS_RBUF_FLUSH_CTRL);
> > > + reg |= BIT(1);
> > > + writel(reg, (priv->mac_reg + SYS_RBUF_FLUSH_CTRL));
> >
> > Please use setbits_le32() and friends for those manipulations. This is much
> > easier to read and less error-prone. This applies to all other bit
> > manipulations below as well.
>
> Sure.
>
> > > + udelay(10);
> > > +
> > > + reg &= ~BIT(1);
> > > + writel(reg, (priv->mac_reg + SYS_RBUF_FLUSH_CTRL));
> > > + udelay(10);
> > > +}
> > > +
> > > +static void reset_umac(struct bcmgenet_eth_priv *priv)
> >
> > What is the difference to the function above? The name is confusingly
> > similar.
> I think only function is needed, this is something I took my older
> version of Linux driver and is leftover
> which is not needed.
So what I figured is this: Each of those three functions (reset_umac(),
bcmgenet_umac_reset(), init_umac()) has exactly one caller:
bcmgenet_eth_init() calls:
bcmgenet_umac_reset(priv);
init_umac(priv);
(which calls:)
reset_umac(priv);
...
So that means we can unify those into one function, which will be called from
eth_init().
> Will check this again.
> > > +{
> > > + writel(0, (priv->mac_reg + SYS_RBUF_FLUSH_CTRL));
> > > + udelay(10);
> > > +
> > > + writel(0, priv->mac_reg + UMAC_CMD);
> > > +
> > > + writel(CMD_SW_RESET | CMD_LCL_LOOP_EN, priv->mac_reg + UMAC_CMD);
> > > + udelay(2);
> > > + writel(0, priv->mac_reg + UMAC_CMD);
> > > +}
> > > +
> > > +static void init_umac(struct bcmgenet_eth_priv *priv)
> > > +{
> > > + u32 reg;
> > > +
> > > + reset_umac(priv);
> > > +
> > > + /* clear tx/rx counter */
> > > + writel(MIB_RESET_RX | MIB_RESET_TX | MIB_RESET_RUNT,
> > > +priv->mac_reg + UMAC_MIB_CTRL);
> > > + writel(0, priv->mac_reg + UMAC_MIB_CTRL);
> > > +
> > > + writel(ENET_MAX_MTU_SIZE, priv->mac_reg + UMAC_MAX_FRAME_LEN);
> > > +
> > > + /* init rx registers, enable ip header optimization */
> > > + reg = readl(priv->mac_reg + RBUF_CTRL);
> > > + reg |= RBUF_ALIGN_2B;
> > > + writel(reg, (priv->mac_reg + RBUF_CTRL));
> > > +
> > > + writel(1, (priv->mac_reg + RBUF_TBUF_SIZE_CTRL));
> > > +}
> > > +
> > > +static int _bcmgenet_write_hwaddr(struct bcmgenet_eth_priv *priv,
> > > + unsigned char *addr)
> > > +{
> > > + writel_relaxed(((addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8)
> > > +| addr[3]), priv->mac_reg + UMAC_MAC0);
> > > + writel_relaxed((addr[4] << 8) | addr[5], priv->mac_reg + UMAC_MAC1);
> > > +
> > > + return 0;
> > > +}
> >
> > Why this function? Can't you just use the one below and put the actual code
> > in there?
>
> Actually , we are calling it after reset as well and is trigger from two
> places.
Yes, but in all cases we pass the very same platdata->enetaddr value in, so you
can call the ops function directly.
> I would place it in single function and test it.
[ ... ]
> > > +static int _bcmgenet_gmac_eth_recv(struct bcmgenet_eth_priv *priv, uchar
> > > **packetp)
> > > +{
> > > + u32 len_stat;
> > > + u32 len;
> > > + u32 addr;
> > > + u32 length = 0;
> > > + void *desc_base = (priv->rx_desc_base + (priv->rx_index *
> > > DMA_DESC_SIZE));
> > > +
> > > + len_stat = readl(desc_base + DMA_DESC_LENGTH_STATUS);
> > > +
> > > + if (!(len_stat & DMA_OWN)) {
> >
> > I think it would be cleaner to negate this and just bail out early.
> > But also: Is this bit safe to use? Does the MAC update this?
> >
> > > + len = readl(desc_base + DMA_DESC_LENGTH_STATUS);
> > > + addr = readl(desc_base + DMA_DESC_ADDRESS_LO);
> > > +
> > > + length = (len >> DMA_BUFLENGTH_SHIFT) & DMA_BUFLENGTH_MASK;
> > > +
> > > + invalidate_dcache_range((uintptr_t)addr,
> > > + (addr + RX_TOTAL_BUFSIZE));
> >
> > There is no need to
Re: [BUG] common/usb.c: taking address of packed member of ‘struct usb_device_descriptor’ may result in an unaligned pointer value
On 12/16/19 10:44 AM, Heinrich Schuchardt wrote: > Hello Marek, Hi, > with powerpc64-linux-gnu-gcc, version 9.2.1, big endian I see the errors > below. Are you building this with some additional extra flags ? > struct usb_device_descriptor is naturally packed. Why do we need the > packed attribute in include/linux/usb/ch9.h? Did you check git log ? Maybe there is some hint. [...]
Re: [U-Boot] [PATCH v2 1/2] spi: nxp_fspi: new driver for the FlexSPI controller
Hi Priyanka, Hi Jagan, Hi Vingesh, Am 2019-11-29 08:49, schrieb Michael Walle: Am 2019-11-29 06:03, schrieb Priyanka Jain: -Original Message- From: U-Boot On Behalf Of Michael Walle Sent: Saturday, November 2, 2019 11:56 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v2 1/2] spi: nxp_fspi: new driver for the FlexSPI controller This is a port of the kernel's spi-nxp-fspi driver. It uses the new spi-mem interface and does not expose the more generic spi-xfer interface. The source was taken from the v5.3-rc3 tag. The port was straightforward: - remove the interrupt handling and the completion by busy polling the controller - remove locks - move the setup of the memory windows into claim_bus() - move the setup of the speed into set_speed() - port the device tree bindings from the original fspi_probe() to ofdata_to_platdata() There were only some style change fixes, no change in any logic. For example, there are busy loops where the return code is not handled correctly, eg. only prints a warning with WARN_ON(). This port intentionally left most functions unchanged to ease future bugfixes. This was tested on a custom LS1028A board. Because the LS1028A doesn't have proper clock framework support, changing the clock speed was not tested. This also means that it is not possible to change the SPI speed on LS1028A for now (neither is it possible in the linux driver). Signed-off-by: Michael Walle Reviewed-by: Jagan Teki --- changes since v1: - fixed typo, thanks Jagan drivers/spi/Kconfig| 7 + drivers/spi/Makefile | 1 + drivers/spi/nxp_fspi.c | 997 + 3 files changed, 1005 insertions(+) create mode 100644 drivers/spi/nxp_fspi.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 7be867d5b6..ad20309df8 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -192,6 +192,13 @@ config MVEBU_A3700_SPI used to access the SPI NOR flash on platforms embedding this Marvell IP core. +config NXP_FSPI + bool "NXP FlexSPI driver" + depends on SPI_MEM + help + Enable the NXP FlexSPI (FSPI) driver. This driver can be used to + access the SPI NOR flash on platforms embedding this NXP IP core. + config PIC32_SPI bool "Microchip PIC32 SPI driver" depends on MACH_PIC32 diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index ae4f2958f8..52462e19a3 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -43,6 +43,7 @@ obj-$(CONFIG_MSCC_BB_SPI) += mscc_bb_spi.o obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o obj-$(CONFIG_MXC_SPI) += mxc_spi.o obj-$(CONFIG_MXS_SPI) += mxs_spi.o +obj-$(CONFIG_NXP_FSPI) += nxp_fspi.o obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_PIC32_SPI) += pic32_spi.o diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c new file mode 100644 index 00..b808418eb6 --- /dev/null +++ b/drivers/spi/nxp_fspi.c @@ -0,0 +1,997 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * NXP FlexSPI(FSPI) controller driver. + * + * Copyright (c) 2019 Michael Walle The file is ported from Linux. Any particular reason of adding copyright? so what? the "original" copyright is mentioned. It is certainly not the case that there wasn't any changes. I get the feeling that you just want to have "your" NXP copyright here. If any, there should be the copyright of the original spi-nxp-qspi.c driver, which is not NXP. But instead NXP - lets say borrowed - much of its code for "their" spi-nxp-fspi.c and _dropped_ all former copyrights. Can you change this to Author/Ported-by? Nope. ping. there was already tested-by's and reviewd-by's. -michael + * + * This driver was originally ported from the linux kernel v5.4-rc3, +which had + * the following notes: + * btw the original copyright is here after the snip. FWIW i can move that one also to the top. but I certainly won't drop mine. -michael
Re: [BUG] POWER: undefined reference to `_restgpr_25_x'
Dear Heinrich, In message you wrote: > > with powerpc64-linux-gnu-gcc, version 9.2.1, big endian I see the errors > below when compiling P2041RDB_defconfig. I'm not sure if it's a good idea (and supposed to work) to use a 64 bit compiler for a 32 bit application. It might be missing some of the needed gcc libraries. > I needed the following changes to be able to compile at all: > > diff --git a/Makefile b/Makefile > index 0766f78dcb..71f98a2615 100644 > --- a/Makefile > +++ b/Makefile > @@ -412,7 +412,7 @@ CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ > -Dunix -D__unix__ \ > > KBUILD_CPPFLAGS := -D__KERNEL__ -D__UBOOT__ > > -KBUILD_CFLAGS := -Wall -Wstrict-prototypes \ > +KBUILD_CFLAGS := -Wall -Wstrict-prototypes > -Wno-error=address-of-packed-member \ > -Wno-format-security \ > -fno-builtin -ffreestanding $(CSTD_FLAG) > KBUILD_CFLAGS += -fshort-wchar -fno-strict-aliasing This patch is linewrapped, right? I can't see how adding -Wno-error=address-of-packed-member would be related to fixing undefined reference to `_restgpr_31_x' errors. > diff --git a/examples/Makefile b/examples/Makefile > index d440bc5655..825954c185 100644 > --- a/examples/Makefile > +++ b/examples/Makefile > @@ -6,6 +6,6 @@ ifdef FTRACE > subdir-ccflags-y += -finstrument-functions -DFTRACE > endif > > -subdir-y += standalone > +#subdir-y += standalone This is apparently unrelated, too ? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de PUBLIC NOTICE AS REQUIRED BY LAW: Any Use of This Product, in Any Manner Whatsoever, Will Increase the Amount of Disorder in the Universe. Although No Liability Is Implied Herein, the Consumer Is Warned That This Process Will Ultimately Lead to the Heat Death of the Universe.
Re: Boot from different partitions based on some condition
Dear Mats, In message <1024408647.20191212164...@tele2.se> you wrote: > > I want to set up for an upgrade of our embedded system, using a > special kernel for the upgrade. The standard will be to load the > system from mtd3 (kernel), mtd4 (devicetree) and mtd5 (rootfs). > > When an update is to take place I want to run the upgrade system from > mtd0. > > So basically I need to have some sort of telling U-boot that it should > launch the upgrade system instead of the standard system. > > Any ideas how I set this up? > How to tell u-boot? > How to get u-boot to boot from another partition based on a condition > like that? In addition to Harald's advice you might also want to consider not reinventing the wheel yet agaib, but instead look into [1] where all these issues have already been solved (and tested, with many projects and a zillion devices in the field). [1] https://sbabic.github.io/swupdate/ Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Never underestimate the bandwidth of a station wagon full of tapes. -- Dr. Warren Jackson, Director, UTCS
Re: gtlab slow?
Hi all, In message Claudius Heine wrote: > > Strato apparently took our gitlab instance at about 23:52 to 01:04 CET > offline last night and the load now seems more stable. Hopefully they > resolved this issue now. *knocking on wood* All the statistics we can see says that sind this downtime in the night from Dec 10 to 11, performance shuld have been find. It would be great if you some of you external users can also confirm that the earlier issues have been solved. If you still experience any bad performance, please let me know with both the exact time when this happens, and which exact command you have been trying to run. Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de To know how another being, another creature feels - that is impos- sible. - Terry Pratchett, _The Dark Side of the Sun_
Re: [RFC PATCH 2/2] net: Add Support for GENET Ethernet controller
Hi, Thanks for having the look. > > I am afraid that needs to be more elaborate. You could mention Broadcom, also > that it's only for v5 of it. And that it's based on reverse engineering the > Linux driver. > Text in the cover letter will not make it into the repo, so you should > mention this here again. Ok, would take care of it next version. > > Signed-off-by: Amit Singh Tomar > > --- > > configs/rpi_4_defconfig | 2 + > > drivers/net/Kconfig | 7 + > > drivers/net/Makefile| 1 + > > drivers/net/bcmgenet.c | 770 > > > > 4 files changed, 780 insertions(+) > > create mode 100644 drivers/net/bcmgenet.c > > > > diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig > > index 8cf1bb8..b0f9cf1 100644 > > --- a/configs/rpi_4_defconfig > > +++ b/configs/rpi_4_defconfig > > @@ -24,6 +24,8 @@ CONFIG_DM_KEYBOARD=y > > CONFIG_DM_MMC=y > > CONFIG_MMC_SDHCI=y > > CONFIG_MMC_SDHCI_BCM2835=y > > +CONFIG_DM_ETH=y > > I am not sure that belongs into the individual defconfig file, I guess it > should be in some Kconfig instead? > Ok, Would check it. > > > + > > config DWC_ETH_QOS > > bool "Synopsys DWC Ethernet QOS device support" > > depends on DM_ETH > > diff --git a/drivers/net/Makefile b/drivers/net/Makefile > > index 3099183..6e0a688 100644 > > --- a/drivers/net/Makefile > > +++ b/drivers/net/Makefile > > @@ -8,6 +8,7 @@ obj-$(CONFIG_AG7XXX) += ag7xxx.o > > obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o > Broadcom GENETv5. > > And you could tell a bit about the history here, that it's based on the Linux > driver, but limited to support v5 and do away with all the priority queues, > etc. Ok. > > + * > > + */ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +/* Register definitions derived from Linux source */ > > +#define SYS_REV_CTRL 0x00 > > + > > +#define SYS_PORT_CTRL 0x04 > > +#define PORT_MODE_EXT_GPHY3 > > + > > +#define GENET_SYS_OFF 0x > > +#define SYS_RBUF_FLUSH_CTRL (GENET_SYS_OFF + 0x08) > > +#define SYS_TBUF_FLUSH_CTRL (GENET_SYS_OFF + 0x0C) > > + > > +#define GENET_EXT_OFF 0x0080 > > +#define EXT_RGMII_OOB_CTRL (GENET_EXT_OFF + 0x0C) > > +#define RGMII_MODE_EN_V123 BIT(0) > > +#define RGMII_LINK BIT(4) > > +#define OOB_DISABLE BIT(5) > > +#define RGMII_MODE_ENBIT(6) > > +#define ID_MODE_DIS BIT(16) > > + > > +#define GENET_RBUF_OFF0x0300 > > +#define RBUF_FLUSH_CTRL_V1(GENET_RBUF_OFF + 0x04) > > +#define RBUF_TBUF_SIZE_CTRL (GENET_RBUF_OFF + 0xb4) > > +#define RBUF_CTRL(GENET_RBUF_OFF + 0x00) > > +#define RBUF_64B_EN BIT(0) > > +#define RBUF_ALIGN_2BBIT(1) > > +#define RBUF_BAD_DIS BIT(2) > > Thanks for aligning this - I guess it would be in an editor ;-) > But please try to use tabs consistently for indenting this. > > > + > > +#define GENET_UMAC_OFF0x0800 > > +#define UMAC_MIB_CTRL (GENET_UMAC_OFF + 0x580) > > +#define UMAC_MAX_FRAME_LEN(GENET_UMAC_OFF + 0x014) > > +#define UMAC_MAC0 (GENET_UMAC_OFF + 0x00C) > > +#define UMAC_MAC1 (GENET_UMAC_OFF + 0x010) > > +#define UMAC_CMD (GENET_UMAC_OFF + 0x008) > > +#define MDIO_CMD (GENET_UMAC_OFF + 0x614) > > +#define UMAC_TX_FLUSH (GENET_UMAC_OFF + 0x334) > > +#define MDIO_START_BUSY BIT(29) > > +#define MDIO_READ_FAIL BIT(28) > > +#define MDIO_RD (2 << 26) > > +#define MDIO_WR BIT(26) > > +#define MDIO_PMD_SHIFT 21 > > +#define MDIO_PMD_MASK0x1F > > +#define MDIO_REG_SHIFT 16 > > +#define MDIO_REG_MASK0x1F > > + > > +#define CMD_TX_EN BIT(0) > > +#define CMD_RX_EN BIT(1) > > +#define UMAC_SPEED_10 0 > > +#define UMAC_SPEED_1001 > > +#define UMAC_SPEED_1000 2 > > +#define UMAC_SPEED_2500 3 > > +#define CMD_SPEED_SHIFT 2 > > +#define CMD_SPEED_MASK3 > > +#define CMD_SW_RESET BIT(13) > > +#define CMD_LCL_LOOP_EN BIT(15) > > +#define CMD_TX_EN BIT(0) > > +#define CMD_RX_EN BIT(1) > > + > > +#define MIB_RESET_RX BIT(0) > >
RE: [PATCH v3 7/8] test: rng: Add basic test for random number generator(rng) uclass
Hi,
> -Original Message-
> From: U-Boot On Behalf Of Sughosh Ganu
> Sent: vendredi 13 décembre 2019 08:14
> To: u-boot@lists.denx.de
> Subject: [PATCH v3 7/8] test: rng: Add basic test for random number
> generator(rng) uclass
>
> Add a unit test for testing the rng uclass functionality using the sandbox rng
> driver.
>
> Signed-off-by: Sughosh Ganu
> Reviewed-by: Patrice Chotard
> ---
> test/dm/Makefile | 1 +
> test/dm/rng.c| 26 ++
> 2 files changed, 27 insertions(+)
> create mode 100644 test/dm/rng.c
>
> diff --git a/test/dm/Makefile b/test/dm/Makefile index 0c2fd5c..f61bf65 100644
> --- a/test/dm/Makefile
> +++ b/test/dm/Makefile
> @@ -65,4 +65,5 @@ obj-$(CONFIG_VIRTIO_SANDBOX) += virtio.o
> obj-$(CONFIG_DMA) += dma.o
> obj-$(CONFIG_DM_MDIO) += mdio.o
> obj-$(CONFIG_DM_MDIO_MUX) += mdio_mux.o
> +obj-$(CONFIG_DM_RNG) += rng.o
> endif
> diff --git a/test/dm/rng.c b/test/dm/rng.c new file mode 100644 index
> 000..879e80a
> --- /dev/null
> +++ b/test/dm/rng.c
> @@ -0,0 +1,26 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (c) 2019, Linaro Limited
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +/* Basic test of the rng uclass */
> +static int dm_test_rng_read(struct unit_test_state *uts) {
> + unsigned long val1 = 0, val2 = 0;
> + struct udevice *dev;
> +
> + ut_assertok(uclass_get_device(UCLASS_RNG, 0, ));
> + ut_assertnonnull(dev);
> + dm_rng_read(dev, , sizeof(val1));
> + dm_rng_read(dev, , sizeof(val2));
Test return:
ut_assertok(dm_rng_read(dev, , sizeof(val1)));
ut_assertok(dm_rng_read(dev, , sizeof(val2)))
> + ut_assert(val1 != val2);
You can also check the values as the sandbox driver use only the 2 next values :
ut_asserteq(0x21524110, val1);
ut_asserteq(0xDEADBEEF, val2);
> + return 0;
> +}
> +DM_TEST(dm_test_rng_read, DM_TESTF_SCAN_PDATA |
> DM_TESTF_SCAN_FDT);
> --
> 2.7.4
Regards
Patrick
[ANN] U-Boot v2020.01-rc5 released
Hey all, It's release day and here is v2020.01-rc5. At this point, we should be just seeing regression fixes, and preferably to ones introduced this cycle rather than older regressions too. Once again, for a changelog, git log --merges v2020.01-rc4..v2020.01-rc5 and as always, I ask for more details in the PRs people send me so I can put them in the merge commit. I've also had my first PR in a while for the -next branch. If people have other stuff they think is otherwise ready, please put together a PR for -next and I'll adjust my tooling more to make it even easier on my end to test that. At this point I'm looking to do the release on January 6th. Thanks all! -- Tom signature.asc Description: PGP signature
RE: [PATCH v3 5/8] sandbox: rng: Add a random number generator(rng) driver
Hi,
> From: U-Boot On Behalf Of Sughosh Ganu
> Sent: vendredi 13 décembre 2019 08:14
>
> Add a sandbox driver for random number generation. Mostly aimed at providing a
> unit test for rng uclass.
>
> Signed-off-by: Sughosh Ganu
> Reviewed-by: Patrice Chotard
> ---
> arch/sandbox/dts/test.dts | 4
> drivers/rng/Kconfig | 7 +++
> drivers/rng/Makefile | 1 +
> drivers/rng/sandbox_rng.c | 36
> 4 files changed, 48 insertions(+)
> create mode 100644 drivers/rng/sandbox_rng.c
>
> diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index
> fdb08f2..2c85540 100644
> --- a/arch/sandbox/dts/test.dts
> +++ b/arch/sandbox/dts/test.dts
> @@ -599,6 +599,10 @@
> reset-names = "other", "test";
> };
>
> + rng@0 {
> + compatible = "sandbox,sandbox-rng";
> + };
> +
> rproc_1: rproc@1 {
> compatible = "sandbox,test-processor";
> remoteproc-name = "remoteproc-test-dev1"; diff --git
> a/drivers/rng/Kconfig b/drivers/rng/Kconfig index 5fc11db..3a1d3f0 100644
> --- a/drivers/rng/Kconfig
> +++ b/drivers/rng/Kconfig
> @@ -6,6 +6,13 @@ config DM_RNG
> This interface is used to initialise the rng device and to
> read the random seed from the device.
>
> +config RNG_SANDBOX
> + bool "Sandbox random number generator"
> + depends on SANDBOX && DM_RNG
> + help
> + Enable random number generator for sandbox. This is an
> + emulation of a rng device.
> +
> config RNG_STM32MP1
> bool "Enable random number generator for STM32MP1"
> depends on ARCH_STM32MP && DM_RNG diff --git a/drivers/rng/Makefile
> b/drivers/rng/Makefile index 699beb3..3517005 100644
> --- a/drivers/rng/Makefile
> +++ b/drivers/rng/Makefile
> @@ -4,4 +4,5 @@
> #
>
> obj-$(CONFIG_DM_RNG) += rng-uclass.o
> +obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o
> obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o diff --git
> a/drivers/rng/sandbox_rng.c b/drivers/rng/sandbox_rng.c new file mode 100644
> index 000..c5be552
> --- /dev/null
> +++ b/drivers/rng/sandbox_rng.c
> @@ -0,0 +1,36 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (c) 2019, Linaro Limited
> + */
> +
> +#include
> +#include
> +#include
> +
> +static unsigned long random = 0xdeadbeef;
> +
> +static int sandbox_rng_read(struct udevice *dev, void *data, size_t
> +len) {
Add protection on length I think:
If (len != sizeof(random))
retrun - EINVAL;
or treat the case len > 4 with loop ?
> + random ^= ~0UL;
> + *(unsigned long *)data = random;
> +
> + return sizeof(random);
Read is OK, so I think the correct return value is 0:
return 0;
NB: result (int) can be not enough to return the value read (size_t)
PS: it not really a random generator here but simple sequence
0xdeadbeef -> 0x21524110 -> 0xdeadbeef
It is enough for unitary test, but is is enough for sandbox ?
we could reused PRNG code from lib/rand.c ?
> +}
> +
> +static const struct dm_rng_ops sandbox_rng_ops = {
> + .read = sandbox_rng_read,
> +};
> +
> +static const struct udevice_id sandbox_rng_match[] = {
> + {
> + .compatible = "sandbox,sandbox-rng",
> + },
> + {},
> +};
> +
> +U_BOOT_DRIVER(sandbox_rng) = {
> + .name = "sandbox-rng",
> + .id = UCLASS_RNG,
> + .of_match = sandbox_rng_match,
> + .ops = _rng_ops,
> +};
> --
> 2.7.4
RE: [PATCH v3 1/8] dm: rng: Add random number generator(rng) uclass
Hi,
> From: U-Boot On Behalf Of Sughosh Ganu
> Sent: vendredi 13 décembre 2019 08:14
>
> Add a uclass for reading a random number seed from a random number generator
> device.
>
> Signed-off-by: Sughosh Ganu
> Reviewed-by: Patrice Chotard
> ---
> drivers/Kconfig | 2 ++
> drivers/Makefile | 1 +
> drivers/rng/Kconfig | 7 +++
> drivers/rng/Makefile | 6 ++
> drivers/rng/rng-uclass.c | 23 +++
> include/dm/uclass-id.h | 1 +
> include/rng.h| 30 ++
> 7 files changed, 70 insertions(+)
> create mode 100644 drivers/rng/Kconfig
> create mode 100644 drivers/rng/Makefile create mode 100644 drivers/rng/rng-
> uclass.c create mode 100644 include/rng.h
>
> diff --git a/drivers/Kconfig b/drivers/Kconfig index 9d99ce0..e34a227 100644
> --- a/drivers/Kconfig
> +++ b/drivers/Kconfig
> @@ -90,6 +90,8 @@ source "drivers/remoteproc/Kconfig"
>
> source "drivers/reset/Kconfig"
>
> +source "drivers/rng/Kconfig"
> +
> source "drivers/rtc/Kconfig"
>
> source "drivers/scsi/Kconfig"
> diff --git a/drivers/Makefile b/drivers/Makefile index e977f19..6c619b1 100644
> --- a/drivers/Makefile
> +++ b/drivers/Makefile
> @@ -115,4 +115,5 @@ obj-$(CONFIG_W1_EEPROM) += w1-eeprom/
>
> obj-$(CONFIG_MACH_PIC32) += ddr/microchip/
> obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock/
> +obj-$(CONFIG_DM_RNG) += rng/
> endif
> diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig new file mode 100644
> index
> 000..dd44cc0
> --- /dev/null
> +++ b/drivers/rng/Kconfig
> @@ -0,0 +1,7 @@
> +config DM_RNG
> + bool "Driver support for Random Number Generator devices"
> + depends on DM
> + help
> + Enable driver model for random number generator(rng) devices.
> + This interface is used to initialise the rng device and to
> + read the random seed from the device.
> diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile new file mode 100644
> index
> 000..311705b
> --- /dev/null
> +++ b/drivers/rng/Makefile
> @@ -0,0 +1,6 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (c) 2019, Linaro Limited
> +#
> +
> +obj-$(CONFIG_DM_RNG) += rng-uclass.o
> diff --git a/drivers/rng/rng-uclass.c b/drivers/rng/rng-uclass.c new file mode
> 100644 index 000..b6af3b8
> --- /dev/null
> +++ b/drivers/rng/rng-uclass.c
> @@ -0,0 +1,23 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2019, Linaro Limited
> + */
> +
> +#include
> +#include
> +#include
> +
> +int dm_rng_read(struct udevice *dev, void *buffer, size_t size) {
> + const struct dm_rng_ops *ops = device_get_ops(dev);
> +
> + if (!ops->read)
> + return -ENOSYS;
> +
> + return ops->read(dev, buffer, size);
> +}
> +
> +UCLASS_DRIVER(rng) = {
> + .name = "rng",
> + .id = UCLASS_RNG,
> +};
> diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index
> 0c563d8..192202d 100644
> --- a/include/dm/uclass-id.h
> +++ b/include/dm/uclass-id.h
> @@ -86,6 +86,7 @@ enum uclass_id {
> UCLASS_REGULATOR, /* Regulator device */
> UCLASS_REMOTEPROC, /* Remote Processor device */
> UCLASS_RESET, /* Reset controller device */
> + UCLASS_RNG, /* Random Number Generator */
> UCLASS_RTC, /* Real time clock device */
> UCLASS_SCSI,/* SCSI device */
> UCLASS_SERIAL, /* Serial UART */
> diff --git a/include/rng.h b/include/rng.h new file mode 100644 index
> 000..61d5da9
> --- /dev/null
> +++ b/include/rng.h
> @@ -0,0 +1,30 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2019, Linaro Limited
> + */
> +
> +#if !defined _RNG_H_
> +#define _RNG_H_
> +
> +#include
> +
> +/**
> + * dm_rng_read() - read a random number seed from the rng device
> + * @buffer: input buffer to put the read random seed into
> + * @size:number of bytes of random seed read
Missing return value here, I propose:
@return zero on success, or -ve error code.
> + *
> + */
> +int dm_rng_read(struct udevice *dev, void *buffer, size_t size);
> +
> +/* struct dm_rng_ops - Operations for the hwrng uclass */ struct
> +dm_rng_ops {
> + /**
> + * @read() - read a random number seed
> + *
> + * @data: input buffer to read the random seed
> + * @max:total number of bytes to read
Missing return value here, I propose:
@return zero on success, or -ve error code.
> + */
> + int (*read)(struct udevice *dev, void *data, size_t max); };
> +
> +#endif /* _RNG_H_ */
> --
> 2.7.4
Patrick
RE: [PATCH v3 6/8] configs: sandbox: Enable random number generator(rng) device
Hi, > From: U-Boot On Behalf Of Sughosh Ganu > Sent: vendredi 13 décembre 2019 08:14 > > Enable support for random number generator on sandbox configs. This is aimed > primarily at adding unit test support for rng uclass. > > Signed-off-by: Sughosh Ganu > Reviewed-by: Patrice Chotard Reviewed-by: Patrick Delaunay Thanks > --- > configs/sandbox64_defconfig | 2 ++ > configs/sandbox_defconfig | 2 ++ > 2 files changed, 4 insertions(+) > > diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index > cc536ff..a21d832 100644 > --- a/configs/sandbox64_defconfig > +++ b/configs/sandbox64_defconfig > @@ -158,6 +158,8 @@ CONFIG_REGULATOR_RK8XX=y > CONFIG_REGULATOR_S5M8767=y CONFIG_DM_REGULATOR_SANDBOX=y > CONFIG_REGULATOR_TPS65090=y > +CONFIG_DM_RNG=y > +CONFIG_RNG_SANDBOX=y > CONFIG_DM_PWM=y > CONFIG_PWM_SANDBOX=y > CONFIG_RAM=y > diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index > 64245f7..9bdc0f5 100644 > --- a/configs/sandbox_defconfig > +++ b/configs/sandbox_defconfig > @@ -179,6 +179,8 @@ CONFIG_REGULATOR_RK8XX=y > CONFIG_REGULATOR_S5M8767=y CONFIG_DM_REGULATOR_SANDBOX=y > CONFIG_REGULATOR_TPS65090=y > +CONFIG_DM_RNG=y > +CONFIG_RNG_SANDBOX=y > CONFIG_DM_PWM=y > CONFIG_PWM_SANDBOX=y > CONFIG_RAM=y > -- > 2.7.4
[PATCH v1] mach-imx: nandbcb: improve cmd help
From: Igor Opaniuk Add info about supported i.MX7, improve details the usage of bcbonly subcommand. Signed-off-by: Igor Opaniuk --- arch/arm/mach-imx/cmd_nandbcb.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index 9d3ed1aac3..334cc0766e 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -590,11 +590,14 @@ static char nandbcb_help_text[] = "update addr off|partition len - update 'len' bytes starting at\n" " 'off|part' to memory address 'addr', skipping bad blocks\n" "bcbonly fw-size fw1-off [fw2-off] - write only BCB (FCB and DBBT)\n" - " where `fw-size` is fw sizes in bytes, `fw1-off` and\n" - " and `fw2-off` - firmware offsets"; + " where `fw-size` is fw sizes in bytes, `fw1-off`\n" + " and `fw2-off` - firmware offsets\n" + " FIY, BCB isn't erased automatically, so mtd erase should\n" + " be called in advance before writing new BCB:\n" + " > mtd erase mx7-bcb"; #endif U_BOOT_CMD(nandbcb, 5, 1, do_nandbcb, - "i.MX6 Nand BCB", + "i.MX6/i.MX7 NAND Boot Control Blocks write", nandbcb_help_text ); -- 2.17.1
RE: [PATCH v3 4/8] configs: stm32mp15: Enable random number generator(rng) device
Hi, > Sent: vendredi 13 décembre 2019 08:14 > > Enable support for the rng device on the stm32mp15 configs. > > Signed-off-by: Sughosh Ganu > Reviewed-by: Patrice Chotard Acked-by: Patrick Delaunay Thanks. > --- > configs/stm32mp15_basic_defconfig | 2 ++ > configs/stm32mp15_optee_defconfig | 2 ++ > configs/stm32mp15_trusted_defconfig | 2 ++ > 3 files changed, 6 insertions(+) > > diff --git a/configs/stm32mp15_basic_defconfig > b/configs/stm32mp15_basic_defconfig > index 358c2cd..5ca40e0 100644 > --- a/configs/stm32mp15_basic_defconfig > +++ b/configs/stm32mp15_basic_defconfig > @@ -143,3 +143,5 @@ CONFIG_VIDEO_STM32_DSI=y > CONFIG_VIDEO_STM32_MAX_XRES=1280 > CONFIG_VIDEO_STM32_MAX_YRES=800 > CONFIG_FDT_FIXUP_PARTITIONS=y > +CONFIG_DM_RNG=y > +CONFIG_RNG_STM32MP1=y > diff --git a/configs/stm32mp15_optee_defconfig > b/configs/stm32mp15_optee_defconfig > index a065d3e..b161cd1 100644 > --- a/configs/stm32mp15_optee_defconfig > +++ b/configs/stm32mp15_optee_defconfig > @@ -127,3 +127,5 @@ CONFIG_VIDEO_STM32_DSI=y > CONFIG_VIDEO_STM32_MAX_XRES=1280 > CONFIG_VIDEO_STM32_MAX_YRES=800 > CONFIG_FDT_FIXUP_PARTITIONS=y > +CONFIG_DM_RNG=y > +CONFIG_RNG_STM32MP1=y > diff --git a/configs/stm32mp15_trusted_defconfig > b/configs/stm32mp15_trusted_defconfig > index 632f11f..ddf244d 100644 > --- a/configs/stm32mp15_trusted_defconfig > +++ b/configs/stm32mp15_trusted_defconfig > @@ -126,3 +126,5 @@ CONFIG_VIDEO_STM32_DSI=y > CONFIG_VIDEO_STM32_MAX_XRES=1280 > CONFIG_VIDEO_STM32_MAX_YRES=800 > CONFIG_FDT_FIXUP_PARTITIONS=y > +CONFIG_DM_RNG=y > +CONFIG_RNG_STM32MP1=y > -- > 2.7.4
RE: [PATCH v3 1/8] dm: rng: Add random number generator(rng) uclass
Hi,
> From: U-Boot On Behalf Of Sughosh Ganu
> Sent: vendredi 13 décembre 2019 08:14
>
> Add a uclass for reading a random number seed from a random number generator
> device.
>
> Signed-off-by: Sughosh Ganu
> Reviewed-by: Patrice Chotard
Reviewed-by: Patrick Delaunay
Thanks.
> ---
> drivers/Kconfig | 2 ++
> drivers/Makefile | 1 +
> drivers/rng/Kconfig | 7 +++
> drivers/rng/Makefile | 6 ++
> drivers/rng/rng-uclass.c | 23 +++
> include/dm/uclass-id.h | 1 +
> include/rng.h| 30 ++
> 7 files changed, 70 insertions(+)
> create mode 100644 drivers/rng/Kconfig
> create mode 100644 drivers/rng/Makefile create mode 100644 drivers/rng/rng-
> uclass.c create mode 100644 include/rng.h
>
> diff --git a/drivers/Kconfig b/drivers/Kconfig index 9d99ce0..e34a227 100644
> --- a/drivers/Kconfig
> +++ b/drivers/Kconfig
> @@ -90,6 +90,8 @@ source "drivers/remoteproc/Kconfig"
>
> source "drivers/reset/Kconfig"
>
> +source "drivers/rng/Kconfig"
> +
> source "drivers/rtc/Kconfig"
>
> source "drivers/scsi/Kconfig"
> diff --git a/drivers/Makefile b/drivers/Makefile index e977f19..6c619b1 100644
> --- a/drivers/Makefile
> +++ b/drivers/Makefile
> @@ -115,4 +115,5 @@ obj-$(CONFIG_W1_EEPROM) += w1-eeprom/
>
> obj-$(CONFIG_MACH_PIC32) += ddr/microchip/
> obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock/
> +obj-$(CONFIG_DM_RNG) += rng/
> endif
> diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig new file mode 100644
> index
> 000..dd44cc0
> --- /dev/null
> +++ b/drivers/rng/Kconfig
> @@ -0,0 +1,7 @@
> +config DM_RNG
> + bool "Driver support for Random Number Generator devices"
> + depends on DM
> + help
> + Enable driver model for random number generator(rng) devices.
> + This interface is used to initialise the rng device and to
> + read the random seed from the device.
> diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile new file mode 100644
> index
> 000..311705b
> --- /dev/null
> +++ b/drivers/rng/Makefile
> @@ -0,0 +1,6 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (c) 2019, Linaro Limited
> +#
> +
> +obj-$(CONFIG_DM_RNG) += rng-uclass.o
> diff --git a/drivers/rng/rng-uclass.c b/drivers/rng/rng-uclass.c new file mode
> 100644 index 000..b6af3b8
> --- /dev/null
> +++ b/drivers/rng/rng-uclass.c
> @@ -0,0 +1,23 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2019, Linaro Limited
> + */
> +
> +#include
> +#include
> +#include
> +
> +int dm_rng_read(struct udevice *dev, void *buffer, size_t size) {
> + const struct dm_rng_ops *ops = device_get_ops(dev);
> +
> + if (!ops->read)
> + return -ENOSYS;
> +
> + return ops->read(dev, buffer, size);
> +}
> +
> +UCLASS_DRIVER(rng) = {
> + .name = "rng",
> + .id = UCLASS_RNG,
> +};
> diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index
> 0c563d8..192202d 100644
> --- a/include/dm/uclass-id.h
> +++ b/include/dm/uclass-id.h
> @@ -86,6 +86,7 @@ enum uclass_id {
> UCLASS_REGULATOR, /* Regulator device */
> UCLASS_REMOTEPROC, /* Remote Processor device */
> UCLASS_RESET, /* Reset controller device */
> + UCLASS_RNG, /* Random Number Generator */
> UCLASS_RTC, /* Real time clock device */
> UCLASS_SCSI,/* SCSI device */
> UCLASS_SERIAL, /* Serial UART */
> diff --git a/include/rng.h b/include/rng.h new file mode 100644 index
> 000..61d5da9
> --- /dev/null
> +++ b/include/rng.h
> @@ -0,0 +1,30 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2019, Linaro Limited
> + */
> +
> +#if !defined _RNG_H_
> +#define _RNG_H_
> +
> +#include
> +
> +/**
> + * dm_rng_read() - read a random number seed from the rng device
> + * @buffer: input buffer to put the read random seed into
> + * @size:number of bytes of random seed read
> + *
> + */
> +int dm_rng_read(struct udevice *dev, void *buffer, size_t size);
> +
> +/* struct dm_rng_ops - Operations for the hwrng uclass */ struct
> +dm_rng_ops {
> + /**
> + * @read() - read a random number seed
> + *
> + * @data: input buffer to read the random seed
> + * @max:total number of bytes to read
> + */
> + int (*read)(struct udevice *dev, void *data, size_t max); };
> +
> +#endif /* _RNG_H_ */
> --
> 2.7.4
RE: [PATCH v3 3/8] stm32mp1: rng: Add a driver for random number generator(rng) device
Hi Sugosh,
> From: U-Boot On Behalf Of Sughosh Ganu
> Sent: vendredi 13 décembre 2019 08:14
>
> Add a driver for the rng device found on stm32mp1 platforms. The driver
> provides
> a routine for reading the random number seed from the hardware device.
>
> Signed-off-by: Sughosh Ganu
> Reviewed-by: Patrice Chotard
Acked-by: Patrick Delaunay
Thanks.
> ---
> drivers/rng/Kconfig| 7 ++
> drivers/rng/Makefile | 1 +
> drivers/rng/stm32mp1_rng.c | 158
> +
> 3 files changed, 166 insertions(+)
> create mode 100644 drivers/rng/stm32mp1_rng.c
>
> diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig index dd44cc0..5fc11db
> 100644
> --- a/drivers/rng/Kconfig
> +++ b/drivers/rng/Kconfig
> @@ -5,3 +5,10 @@ config DM_RNG
> Enable driver model for random number generator(rng) devices.
> This interface is used to initialise the rng device and to
> read the random seed from the device.
> +
> +config RNG_STM32MP1
> + bool "Enable random number generator for STM32MP1"
> + depends on ARCH_STM32MP && DM_RNG
> + default n
> + help
> + Enable STM32MP1 rng driver.
> diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile index
> 311705b..699beb3
> 100644
> --- a/drivers/rng/Makefile
> +++ b/drivers/rng/Makefile
> @@ -4,3 +4,4 @@
> #
>
> obj-$(CONFIG_DM_RNG) += rng-uclass.o
> +obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o
> diff --git a/drivers/rng/stm32mp1_rng.c b/drivers/rng/stm32mp1_rng.c new file
> mode 100644 index 000..5cd736d
> --- /dev/null
> +++ b/drivers/rng/stm32mp1_rng.c
> @@ -0,0 +1,158 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (c) 2019, Linaro Limited
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +#include
> +#include
> +
> +#define RNG_CR 0x00
> +#define RNG_CR_RNGEN BIT(2)
> +#define RNG_CR_CED BIT(5)
> +
> +#define RNG_SR 0x04
> +#define RNG_SR_SEIS BIT(6)
> +#define RNG_SR_CEIS BIT(5)
> +#define RNG_SR_SECS BIT(2)
> +#define RNG_SR_DRDY BIT(0)
> +
> +#define RNG_DR 0x08
> +
> +struct stm32_rng_platdata {
> + fdt_addr_t base;
> + struct clk clk;
> + struct reset_ctl rst;
> +};
> +
> +static int stm32_rng_read(struct udevice *dev, void *data, size_t len)
> +{
> + int retval = 0, i;
> + u32 sr, count, reg;
> + size_t increment;
> + struct stm32_rng_platdata *pdata = dev_get_platdata(dev);
> +
> + while (len > 0) {
> + retval = readl_poll_timeout(pdata->base + RNG_SR, sr,
> + sr & RNG_SR_DRDY, 1);
> + if (retval)
> + return retval;
> +
> + if (sr & (RNG_SR_SEIS | RNG_SR_SECS)) {
> + /* As per SoC TRM */
> + clrbits_le32(pdata->base + RNG_SR, RNG_SR_SEIS);
> + for (i = 0; i < 12; i++)
> + readl(pdata->base + RNG_DR);
> + if (readl(pdata->base + RNG_SR) & RNG_SR_SEIS) {
> + printf("RNG Noise");
> + return -EIO;
> + }
> + /* start again */
> + continue;
> + }
> +
> + count = 4;
> + while (len && count) {
> + reg = readl(pdata->base + RNG_DR);
> + memcpy(data, , min(len, sizeof(u32)));
> + increment = min(len, sizeof(u32));
> + data += increment;
> + retval += increment;
> + len -= increment;
> + count--;
> + }
> + }
> +
> + return retval;
> +}
> +
> +static int stm32_rng_init(struct stm32_rng_platdata *pdata) {
> + int err;
> +
> + err = clk_enable(>clk);
> + if (err)
> + return err;
> +
> + /* Disable CED */
> + writel(RNG_CR_RNGEN | RNG_CR_CED, pdata->base + RNG_CR);
> +
> + /* clear error indicators */
> + writel(0, pdata->base + RNG_SR);
> +
> + return 0;
> +}
> +
> +static int stm32_rng_cleanup(struct stm32_rng_platdata *pdata) {
> +
> + writel(0, pdata->base + RNG_CR);
> +
> + return clk_disable(>clk);
> +}
> +
> +static int stm32_rng_probe(struct udevice *dev) {
> + struct stm32_rng_platdata *pdata = dev_get_platdata(dev);
> +
> + reset_assert(>rst);
> + udelay(20);
> + reset_deassert(>rst);
> +
> + return stm32_rng_init(pdata);
> +}
> +
> +static int stm32_rng_remove(struct udevice *dev) {
> + struct stm32_rng_platdata *pdata = dev_get_platdata(dev);
> +
> + return stm32_rng_cleanup(pdata);
> +}
> +
> +static int stm32_rng_ofdata_to_platdata(struct udevice *dev) {
> + struct stm32_rng_platdata *pdata = dev_get_platdata(dev);
> + int err;
> +
> + pdata->base = dev_read_addr(dev);
> + if (!pdata->base)
> + return -ENOMEM;
> +
> + err =
RE: [PATCH v3] board_f.c: Insure gd->new_bootstage alignment
Hi Tom,
> From: Patrice CHOTARD
> Sent: mercredi 27 novembre 2019 10:12
>
> In reserve_bootstage(), in case size is odd, gd->new_bootstage is not
> aligned. In
> bootstage_relocate(), the platform hangs when getting access to data-
> >record[i].name.
> To avoid this issue, make gd->new_bootstage 16 byte aligned.
>
> To insure that new_bootstage is 16 byte aligned (at least needed for
> x86_64 and ARMv8) and new_bootstage starts down to get enough space,
> ALIGN_DOWN macro is used.
>
> Fixes: ac9cd4805c8b ("bootstage: Correct relocation algorithm")
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Vikas MANOCHA
> Reviewed-by: Patrick Delaunay
> Tested-by: Patrick Delaunay
>
Do you plan to merge this fixe for the next rc for v2020.01 ?
Or do you expect some change / review.
This patch is mandatory for stm32mp1 (ARM plaform with bootstage feature
activated).
Without this patch, the boot failed (at least for v2020.01-rc3 : crash has
struct pointer new_bootstage is not aligned).
Or I will deactivate the BOOTSTAGE feature...
Thanks
Patrick
> ---
>
> Changes in v3:
> - Add Patrick Reviewed-by and Tested-by.
>
> Changes in v2:
> - Update comment to explain the ALIGN_DOWN() usage.
>
> common/board_f.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/common/board_f.c b/common/board_f.c index e3591cbaeb..d367f6b044
> 100644
> --- a/common/board_f.c
> +++ b/common/board_f.c
> @@ -559,6 +559,11 @@ static int reserve_bootstage(void)
> int size = bootstage_get_size();
>
> gd->start_addr_sp -= size;
> + /*
> + * Insure that start_addr_sp is aligned down to reserve enough
> + * space for new_bootstage
> + */
> + gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp, 16);
> gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
> debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
> gd->start_addr_sp);
> --
> 2.17.1
[Patch v2 7/7] treewide: Update fsl qspi node dt properties as per spi-mem driver
According to new qspi driver, some properties like "bus-num, num-cs,
big-endian" are no longer used. Device endiannes can be determined from
device-type data in driver.
Now use board specific compatibles, generic node names and specific
labels to align with linux device-tree properties.
Also consolidate spi-max-frequency to 50Mhz treewide.
Signed-off-by: Kuldeep Singh
---
arch/arm/dts/fsl-ls1012a-2g5rdb.dts | 5 ++---
arch/arm/dts/fsl-ls1012a-frdm.dtsi| 5 ++---
arch/arm/dts/fsl-ls1012a-qds.dtsi | 5 ++---
arch/arm/dts/fsl-ls1012a-rdb.dtsi | 5 ++---
arch/arm/dts/fsl-ls1012a.dtsi | 4 +---
arch/arm/dts/fsl-ls1043a-qds.dtsi | 5 ++---
arch/arm/dts/fsl-ls1043a.dtsi | 6 ++
arch/arm/dts/fsl-ls1046a-frwy.dts | 5 ++---
arch/arm/dts/fsl-ls1046a-qds.dtsi | 5 ++---
arch/arm/dts/fsl-ls1046a-rdb.dts | 5 ++---
arch/arm/dts/fsl-ls1046a.dtsi | 4 +---
arch/arm/dts/fsl-ls1088a-qds.dts | 5 ++---
arch/arm/dts/fsl-ls1088a-rdb.dts | 5 ++---
arch/arm/dts/fsl-ls1088a.dtsi | 2 +-
arch/arm/dts/fsl-ls2080a-qds.dts | 5 ++---
arch/arm/dts/fsl-ls2080a.dtsi | 4 ++--
arch/arm/dts/fsl-ls2088a-rdb-qspi.dts | 5 ++---
arch/arm/dts/ls1021a-twr.dtsi | 5 ++---
arch/arm/dts/ls1021a.dtsi | 6 ++
19 files changed, 35 insertions(+), 56 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts
b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts
index fecef88e08..09c3239e1a 100644
--- a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts
+++ b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts
@@ -21,14 +21,13 @@
};
{
- bus-num = <0>;
status = "okay";
- qflash0: s25fl128s@0 {
+ s25fl128s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- spi-max-frequency = <2000>;
+ spi-max-frequency = <5000>;
reg = <0>;
};
};
diff --git a/arch/arm/dts/fsl-ls1012a-frdm.dtsi
b/arch/arm/dts/fsl-ls1012a-frdm.dtsi
index a357793bfa..88aa24a6d2 100644
--- a/arch/arm/dts/fsl-ls1012a-frdm.dtsi
+++ b/arch/arm/dts/fsl-ls1012a-frdm.dtsi
@@ -15,14 +15,13 @@
};
{
- bus-num = <0>;
status = "okay";
- qflash0: s25fl128s@0 {
+ s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- spi-max-frequency = <2000>;
+ spi-max-frequency = <5000>;
reg = <0>;
};
};
diff --git a/arch/arm/dts/fsl-ls1012a-qds.dtsi
b/arch/arm/dts/fsl-ls1012a-qds.dtsi
index a330597b6c..910d2a5c77 100644
--- a/arch/arm/dts/fsl-ls1012a-qds.dtsi
+++ b/arch/arm/dts/fsl-ls1012a-qds.dtsi
@@ -43,14 +43,13 @@
};
{
- bus-num = <0>;
status = "okay";
- qflash0: s25fl128s@0 {
+ s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- spi-max-frequency = <2000>;
+ spi-max-frequency = <5000>;
reg = <0>;
};
};
diff --git a/arch/arm/dts/fsl-ls1012a-rdb.dtsi
b/arch/arm/dts/fsl-ls1012a-rdb.dtsi
index 55155fd321..3757051b78 100644
--- a/arch/arm/dts/fsl-ls1012a-rdb.dtsi
+++ b/arch/arm/dts/fsl-ls1012a-rdb.dtsi
@@ -19,14 +19,13 @@
};
{
- bus-num = <0>;
status = "okay";
- qflash0: s25fl128s@0 {
+ s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- spi-max-frequency = <2000>;
+ spi-max-frequency = <5000>;
reg = <0>;
};
};
diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi
index 1125e5753b..2d70c82a72 100644
--- a/arch/arm/dts/fsl-ls1012a.dtsi
+++ b/arch/arm/dts/fsl-ls1012a.dtsi
@@ -107,14 +107,12 @@
};
qspi: quadspi@155 {
- compatible = "fsl,vf610-qspi";
+ compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x155 0x0 0x1>,
<0x0 0x4000 0x0 0x400>;
reg-names = "QuadSPI", "QuadSPI-memory";
- num-cs = <1>;
- big-endian;
status = "disabled";
};
diff --git a/arch/arm/dts/fsl-ls1043a-qds.dtsi
b/arch/arm/dts/fsl-ls1043a-qds.dtsi
index 70e1a6a53f..884bdad196 100644
--- a/arch/arm/dts/fsl-ls1043a-qds.dtsi
+++ b/arch/arm/dts/fsl-ls1043a-qds.dtsi
@@ -53,14 +53,13 @@
};
{
- bus-num = <0>;
status = "okay";
- qflash0: s25fl128s@0 {
+ s25fl128s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
[Patch v2 6/7] configs: ls1046a: Move SPI_FLASH_SPANSION to defconfig
Enable CONFIG_SPI_FLASH_SPANSION in defconfigs of LS1046ARDB and LS1046AQDS which have two spansion flases i.e s25fs512s each of size 64M. Signed-off-by: Kuldeep Singh --- configs/ls1046aqds_qspi_defconfig | 1 + configs/ls1046aqds_sdcard_qspi_defconfig | 1 + configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046aqds_tfa_defconfig | 1 + configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_qspi_defconfig | 1 + configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_tfa_defconfig | 1 + include/configs/ls1046aqds.h | 8 include/configs/ls1046ardb.h | 7 --- 10 files changed, 8 insertions(+), 15 deletions(-) diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index 7339aba903..b2098c82dc 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -38,6 +38,7 @@ CONFIG_FSL_CAAM=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_E1000=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 88ed9b2aff..e1b4260139 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -53,6 +53,7 @@ CONFIG_FSL_CAAM=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_E1000=y diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index e173747923..0edbac39e4 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index 83e94ec7db..5cb973e813 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -53,6 +53,7 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_SF_DEFAULT_BUS=1 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index 469ef7670a..ef82b398f8 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -34,6 +34,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index 934f04a92e..9418128bb0 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -37,6 +37,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index 9aeb33138b..d98021297d 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -34,6 +34,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index 2772fa5f93..21b6041c4e 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -39,6 +39,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 437b6ac5e3..8d74f32c06 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -41,14 +41,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SPI_FLASH_EON /* cs2 */ #endif -/* QSPI */ -#if defined(CONFIG_TFABOOT) || \ - defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#ifdef CONFIG_FSL_QSPI -#define CONFIG_SPI_FLASH_SPANSION -#endif -#endif - #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_PHY_VITESSE #define CONFIG_PHY_REALTEK diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 61a4a40d60..6db48f78ef 100644 --- a/include/configs/ls1046ardb.h +++
[Patch v2 0/7] Transition of fsl qspi driver to spi-mem framework
This entire patch series migrate freescale qspi driver to spi-mem framework. v2 version of series includes changes in qspi driver to have 1k size instead of complete flash size so as to make driver independent of flash size. This also makes it align with linux version of driver. Also added support for imx platforms to set TDH bits correctly. There are other minor changes in commit messages. Dependency on patches[1][2]. These patches are required to resolve booting crash observed in LS1012ARDB. One crash was related to pfe driver as it was accessing flash memory directly and other was based on environment. [1] https://patchwork.ozlabs.org/patch/1207610/ [2] https://patchwork.ozlabs.org/patch/1208299/ Patch 1 in series adds new qspi driver incorporating spi-mem framework and also removal of old driver which was based on spi-nor. The driver is a ported version of linux qspi driver. Initial port was done by Frieder. Now, no more direct memory access to spi-nor memory is possible i.e accessing flash memory using absolute address is not possible. Patch 2 removes unused qspi config options. Patch 3 moves FSL_QSPI to defconfig instead of defining it in header files. Patch 4 removes unused num-cs property from imx platforms. Patch 5 enables SPI_FLASH_SPANSION in ls1012a defconfig as FSL_QSPI is already enabled. Patch 6 enables SPI_FLASH_SPANSION in defconfigs of LS1046a boards instead of defining in header files. Patch 7 updates the device-tree properties treewide for layerscape boards by aligning with linux device-tree properties. Frieder Schrempf (1): imx: imx6sx: Remove unused 'num-cs' property Kuldeep Singh (6): spi: Transform the FSL QuadSPI driver to use the SPI MEM API treewide: Remove unused FSL QSPI config options configs: ls1043a: Move CONFIG_FSL_QSPI to defconfig configs: ls1012a: Enable CONFIG_SPI_FLASH_SPANSION configs: ls1046a: Move SPI_FLASH_SPANSION to defconfig treewide: Update fsl qspi node dt properties as per spi-mem driver arch/arm/dts/fsl-ls1012a-2g5rdb.dts |5 +- arch/arm/dts/fsl-ls1012a-frdm.dtsi|5 +- arch/arm/dts/fsl-ls1012a-qds.dtsi |5 +- arch/arm/dts/fsl-ls1012a-rdb.dtsi |5 +- arch/arm/dts/fsl-ls1012a.dtsi |4 +- arch/arm/dts/fsl-ls1043a-qds.dtsi |5 +- arch/arm/dts/fsl-ls1043a.dtsi |6 +- arch/arm/dts/fsl-ls1046a-frwy.dts |5 +- arch/arm/dts/fsl-ls1046a-qds.dtsi |5 +- arch/arm/dts/fsl-ls1046a-rdb.dts |5 +- arch/arm/dts/fsl-ls1046a.dtsi |4 +- arch/arm/dts/fsl-ls1088a-qds.dts |5 +- arch/arm/dts/fsl-ls1088a-rdb.dts |5 +- arch/arm/dts/fsl-ls1088a.dtsi |2 +- arch/arm/dts/fsl-ls2080a-qds.dts |5 +- arch/arm/dts/fsl-ls2080a.dtsi |4 +- arch/arm/dts/fsl-ls2088a-rdb-qspi.dts |5 +- arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi |2 - arch/arm/dts/imx6sx-sdb-u-boot.dtsi |2 - arch/arm/dts/ls1021a-twr.dtsi |5 +- arch/arm/dts/ls1021a.dtsi |6 +- .../include/asm/arch-fsl-layerscape/config.h |1 - arch/arm/include/asm/arch-ls102xa/config.h|1 - configs/ls1012a2g5rdb_qspi_defconfig |1 + configs/ls1012a2g5rdb_tfa_defconfig |1 + configs/ls1012afrdm_qspi_defconfig|1 + configs/ls1012afrdm_tfa_defconfig |1 + configs/ls1012aqds_qspi_defconfig |1 + configs/ls1012aqds_tfa_SECURE_BOOT_defconfig |1 + configs/ls1012aqds_tfa_defconfig |1 + configs/ls1012ardb_qspi_SECURE_BOOT_defconfig |1 + configs/ls1012ardb_qspi_defconfig |1 + configs/ls1012ardb_tfa_SECURE_BOOT_defconfig |1 + configs/ls1012ardb_tfa_defconfig |1 + configs/ls1043aqds_qspi_defconfig |1 + configs/ls1043aqds_sdcard_qspi_defconfig |1 + configs/ls1043aqds_tfa_SECURE_BOOT_defconfig |2 + configs/ls1043aqds_tfa_defconfig |1 + configs/ls1046aqds_qspi_defconfig |1 + configs/ls1046aqds_sdcard_qspi_defconfig |1 + configs/ls1046aqds_tfa_SECURE_BOOT_defconfig |1 + configs/ls1046aqds_tfa_defconfig |1 + configs/ls1046ardb_qspi_SECURE_BOOT_defconfig |1 + configs/ls1046ardb_qspi_defconfig |1 + configs/ls1046ardb_tfa_SECURE_BOOT_defconfig |1 + configs/ls1046ardb_tfa_defconfig |1 + drivers/spi/fsl_qspi.c| 1562 +++-- drivers/spi/fsl_qspi.h| 145 -- include/configs/ls1012a_common.h | 17 +- include/configs/ls1012afrwy.h |3 - include/configs/ls1012ardb.h |3 - include/configs/ls1021aiot.h |6 - include/configs/ls1021aqds.h | 11
[Patch v2 5/7] configs: ls1012a: Enable CONFIG_SPI_FLASH_SPANSION
Since CONFIG_FSL_QSPI is already enabled for LS1012A in defconfigs. Also enable the CONFIG_SPI_FLASH_SPANSION for LS1012A boards having spansion flashes. Signed-off-by: Ashish Kumar Signed-off-by: Kuldeep Singh --- configs/ls1012a2g5rdb_qspi_defconfig | 1 + configs/ls1012a2g5rdb_tfa_defconfig | 1 + configs/ls1012afrdm_qspi_defconfig| 1 + configs/ls1012afrdm_tfa_defconfig | 1 + configs/ls1012aqds_qspi_defconfig | 1 + configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012aqds_tfa_defconfig | 1 + configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_qspi_defconfig | 1 + configs/ls1012ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012ardb_tfa_defconfig | 1 + 11 files changed, 11 insertions(+) diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index 3c99a43ded..c98974e48d 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -40,6 +40,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig index 0865ac2fdf..8647223a2b 100644 --- a/configs/ls1012a2g5rdb_tfa_defconfig +++ b/configs/ls1012a2g5rdb_tfa_defconfig @@ -40,6 +40,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index 7ff0955f1d..3db5181623 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -36,6 +36,7 @@ CONFIG_DM=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig index 8e8ddd73ed..ffbf79f91c 100644 --- a/configs/ls1012afrdm_tfa_defconfig +++ b/configs/ls1012afrdm_tfa_defconfig @@ -36,6 +36,7 @@ CONFIG_DM=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index 0a719c30c5..559db02130 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -57,6 +57,7 @@ CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index 25d06d2919..f012c34c12 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -47,6 +47,7 @@ CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index bde53a420c..37693a0cb4 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -57,6 +57,7 @@ CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 9989f7b3e9..5129ec53c9 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -39,6 +39,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 80ca9bd577..e4f3272558 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -41,6 +41,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_FSL_PFE=y CONFIG_DM_ETH=y diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index 8eb71fcf63..3dc7e5ad84 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++
[Patch v2 4/7] imx: imx6sx: Remove unused 'num-cs' property
From: Frieder Schrempf
This property is not used by the driver anymore so let's remove it.
Other dts still have 'num-cs' set, but they need a resync with the
Linux kernel anyway, so let's only do the U-Boot-specific files for
now.
Signed-off-by: Frieder Schrempf
Signed-off-by: Kuldeep Singh
---
arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi | 2 --
arch/arm/dts/imx6sx-sdb-u-boot.dtsi | 2 --
2 files changed, 4 deletions(-)
diff --git a/arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi
b/arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi
index 549461df71..5200448a9d 100644
--- a/arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi
+++ b/arch/arm/dts/imx6sx-sabreauto-u-boot.dtsi
@@ -4,8 +4,6 @@
*/
{
- num-cs = <2>;
-
flash0: n25q256a@0 {
compatible = "jedec,spi-nor";
};
diff --git a/arch/arm/dts/imx6sx-sdb-u-boot.dtsi
b/arch/arm/dts/imx6sx-sdb-u-boot.dtsi
index 8f9236da0f..3c0fd874c1 100644
--- a/arch/arm/dts/imx6sx-sdb-u-boot.dtsi
+++ b/arch/arm/dts/imx6sx-sdb-u-boot.dtsi
@@ -4,8 +4,6 @@
*/
{
- num-cs = <2>;
-
flash0: n25q256a@0 {
compatible = "jedec,spi-nor";
};
--
2.17.1
[Patch v2 2/7] treewide: Remove unused FSL QSPI config options
Some of these options are not used by the driver anymore and some of them are obsolete as the information is gathered from the dt. Also consolidating defines in common headers. Signed-off-by: Frieder Schrempf Signed-off-by: Ashish Kumar Signed-off-by: Kuldeep Singh --- .../include/asm/arch-fsl-layerscape/config.h | 1 - arch/arm/include/asm/arch-ls102xa/config.h | 1 - include/configs/ls1012a_common.h | 17 + include/configs/ls1012afrwy.h | 3 --- include/configs/ls1012ardb.h | 3 --- include/configs/ls1021aiot.h | 6 -- include/configs/ls1021aqds.h | 11 --- include/configs/ls1021atwr.h | 10 -- include/configs/ls1043aqds.h | 2 -- include/configs/ls1046afrwy.h | 9 - include/configs/ls1046aqds.h | 11 --- include/configs/ls1046ardb.h | 13 - include/configs/ls1088a_common.h | 6 -- include/configs/ls1088aqds.h | 8 include/configs/ls1088ardb.h | 18 -- include/configs/ls2080aqds.h | 2 -- include/configs/ls2080ardb.h | 8 ++-- include/configs/mx6sxsabreauto.h | 6 -- include/configs/mx6sxsabresd.h | 11 --- include/configs/mx6ul_14x14_evk.h | 6 -- include/configs/mx6ullevk.h| 6 -- include/configs/mx7dsabresd.h | 8 include/configs/pcm052.h | 7 --- include/configs/vf610twr.h | 8 scripts/config_whitelist.txt | 5 - 25 files changed, 3 insertions(+), 183 deletions(-) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index a83c70ece2..913f7b179f 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -304,7 +304,6 @@ #define CONFIG_SYS_FSL_ESDHC_BE #define CONFIG_SYS_FSL_WDOG_BE #define CONFIG_SYS_FSL_DSPI_BE -#define CONFIG_SYS_FSL_QSPI_BE #define CONFIG_SYS_FSL_CCSR_GUR_BE #define CONFIG_SYS_FSL_PEX_LUT_BE diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 970537870d..3884948a2c 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -94,7 +94,6 @@ #define CONFIG_SYS_FSL_ESDHC_BE #define CONFIG_SYS_FSL_WDOG_BE #define CONFIG_SYS_FSL_DSPI_BE -#define CONFIG_SYS_FSL_QSPI_BE #define CONFIG_SYS_FSL_DCU_BE #define CONFIG_SYS_FSL_SEC_MON_LE #define CONFIG_SYS_FSL_SFP_VER_3_2 diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 2579e2fb37..efd0ee41b6 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -37,23 +37,8 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) /*SPI device */ -#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_TFABOOT) #define CONFIG_SYS_FMAN_FW_ADDR0x400d -#define CONFIG_SPI_FLASH_SPANSION -#define CONFIG_FSL_SPI_INTERFACE -#define CONFIG_SF_DATAFLASH - -#define QSPI0_AMBA_BASE0x4000 -#define CONFIG_SPI_FLASH_SPANSION - -#define FSL_QSPI_FLASH_SIZESZ_64M -#define FSL_QSPI_FLASH_NUM 2 - -/* - * Environment - */ -#define CONFIG_ENV_OVERWRITE -#endif +#define CONFIG_SYS_FSL_QSPI_BASE 0x4000 /* SATA */ #define CONFIG_SCSI_AHCI_PLAT diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index c0519e3c11..0496b516d3 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -33,9 +33,6 @@ func(USB, usb, 0) #endif -#undef FSL_QSPI_FLASH_SIZE -#define FSL_QSPI_FLASH_SIZESZ_16M - /* MMC */ #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 0341495dfb..9ca28592eb 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -16,9 +16,6 @@ #define CONFIG_SYS_MEMTEST_START 0x8000 #define CONFIG_SYS_MEMTEST_END 0x9fff - -/* ENV */ -#define CONFIG_SYS_FSL_QSPI_BASE 0x4000 /* * I2C IO expander */ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 0b2d331b9b..236a8d5f7c 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -131,12 +131,6 @@ /* SPI */ #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_SPI_FLASH_SPANSION - -/* QSPI */ -#define QSPI0_AMBA_BASE0x4000 -#define FSL_QSPI_FLASH_SIZE(1 << 24) -#define FSL_QSPI_FLASH_NUM 2 -#define CONFIG_SPI_FLASH_SPANSION #endif
[Patch v2 3/7] configs: ls1043a: Move CONFIG_FSL_QSPI to defconfig
Move CONFIG_FSL_QSPI to the boards defconfigs and while at it also move CONFIG_SPI_FLASH_SPANSION. Signed-off-by: Frieder Schrempf Signed-off-by: Kuldeep Singh --- configs/ls1043aqds_qspi_defconfig| 1 + configs/ls1043aqds_sdcard_qspi_defconfig | 1 + configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 2 ++ configs/ls1043aqds_tfa_defconfig | 1 + include/configs/ls1043aqds.h | 8 5 files changed, 5 insertions(+), 8 deletions(-) diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 36e6f4cce4..6cdd1341ed 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -40,6 +40,7 @@ CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 3ee00a87eb..d5b9b21e0a 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -53,6 +53,7 @@ CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index 0ece698350..507543601b 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -44,6 +44,7 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_E1000=y CONFIG_FMAN_ENET=y @@ -55,6 +56,7 @@ CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index 4c757e28db..a6709638c2 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -54,6 +54,7 @@ CONFIG_MTD_RAW_NAND=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 # CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 063e724b7c..fef5a2eb96 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -379,14 +379,6 @@ unsigned long get_board_ddr_clk(void); #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 -/* QSPI device */ -#if defined(CONFIG_TFABOOT) || \ - (defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)) -#ifdef CONFIG_FSL_QSPI -#define CONFIG_SPI_FLASH_SPANSION -#endif -#endif - /* * Miscellaneous configurable options */ -- 2.17.1
[Patch v2 1/7] spi: Transform the FSL QuadSPI driver to use the SPI MEM API
To support the SPI MEM API, instead of modifying the existing U-Boot driver, this patch adds a port of the existing Linux driver. This also has the advantage that porting changes and fixes from Linux will be easier. Porting of driver left most of the functions unchanged while few of the changes are: -Remove lock(mutexes) and irq handler as uboot is a single core execution. -Remove clock support as the changing spi speed is not supported in uboot and nor in linux. Currently tested on LS1088ARDB, LS1012ARDB, LS1046ARDB, LS1046AFRWY, LS1043AQDS, LS1021ATWR, LS2080ARDB Signed-off-by: Frieder Schrempf Signed-off-by: Ashish Kumar Signed-off-by: Kuldeep Singh --- drivers/spi/fsl_qspi.c | 1562 +++- drivers/spi/fsl_qspi.h | 145 2 files changed, 593 insertions(+), 1114 deletions(-) delete mode 100644 drivers/spi/fsl_qspi.h diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index 8e2a09df36..96178c06bc 100644 --- a/drivers/spi/fsl_qspi.c +++ b/drivers/spi/fsl_qspi.c @@ -1,1142 +1,766 @@ // SPDX-License-Identifier: GPL-2.0+ + /* - * Copyright 2013-2015 Freescale Semiconductor, Inc. + * Freescale QuadSPI driver. + * + * Copyright (C) 2013 Freescale Semiconductor, Inc. + * Copyright (C) 2018 Bootlin + * Copyright (C) 2018 exceet electronics GmbH + * Copyright (C) 2018 Kontron Electronics GmbH + * Copyright (C) 2019-2020 NXP * - * Freescale Quad Serial Peripheral Interface (QSPI) driver + * Based on the original fsl-quadspi.c spi-nor driver. + * Transition to spi-mem in spi-fsl-qspi.c */ #include -#include -#include #include -#include -#include #include -#include -#include -#include -#include "fsl_qspi.h" +#include +#include +#include +#include DECLARE_GLOBAL_DATA_PTR; -#define OFFSET_BITS_MASK GENMASK(23, 0) - -#define FLASH_STATUS_WEL 0x02 - -/* SEQID */ -#define SEQID_WREN 1 -#define SEQID_FAST_READ2 -#define SEQID_RDSR 3 -#define SEQID_SE 4 -#define SEQID_CHIP_ERASE 5 -#define SEQID_PP 6 -#define SEQID_RDID 7 -#define SEQID_BE_4K8 -#ifdef CONFIG_SPI_FLASH_BAR -#define SEQID_BRRD 9 -#define SEQID_BRWR 10 -#define SEQID_RDEAR11 -#define SEQID_WREAR12 -#endif -#define SEQID_WRAR 13 -#define SEQID_RDAR 14 - -/* QSPI CMD */ -#define QSPI_CMD_PP0x02/* Page program (up to 256 bytes) */ -#define QSPI_CMD_RDSR 0x05/* Read status register */ -#define QSPI_CMD_WREN 0x06/* Write enable */ -#define QSPI_CMD_FAST_READ 0x0b/* Read data bytes (high frequency) */ -#define QSPI_CMD_BE_4K 0x20/* 4K erase */ -#define QSPI_CMD_CHIP_ERASE0xc7/* Erase whole flash chip */ -#define QSPI_CMD_SE0xd8/* Sector erase (usually 64KiB) */ -#define QSPI_CMD_RDID 0x9f/* Read JEDEC ID */ - -/* Used for Micron, winbond and Macronix flashes */ -#defineQSPI_CMD_WREAR 0xc5/* EAR register write */ -#defineQSPI_CMD_RDEAR 0xc8/* EAR reigster read */ - -/* Used for Spansion flashes only. */ -#defineQSPI_CMD_BRRD 0x16/* Bank register read */ -#defineQSPI_CMD_BRWR 0x17/* Bank register write */ - -/* Used for Spansion S25FS-S family flash only. */ -#define QSPI_CMD_RDAR 0x65/* Read any device register */ -#define QSPI_CMD_WRAR 0x71/* Write any device register */ - -/* 4-byte address QSPI CMD - used on Spansion and some Macronix flashes */ -#define QSPI_CMD_FAST_READ_4B 0x0c/* Read data bytes (high frequency) */ -#define QSPI_CMD_PP_4B 0x12/* Page program (up to 256 bytes) */ -#define QSPI_CMD_SE_4B 0xdc/* Sector erase (usually 64KiB) */ - -/* fsl_qspi_platdata flags */ -#define QSPI_FLAG_REGMAP_ENDIAN_BIGBIT(0) - -/* default SCK frequency, unit: HZ */ -#define FSL_QSPI_DEFAULT_SCK_FREQ 5000 - -/* QSPI max chipselect signals number */ -#define FSL_QSPI_MAX_CHIPSELECT_NUM 4 - -/* Controller needs driver to swap endian */ +/* + * The driver only uses one single LUT entry, that is updated on + * each call of exec_op(). Index 0 is preset at boot with a basic + * read operation, so let's use the last entry (15). + */ +#defineSEQID_LUT 15 + +/* Registers used by the driver */ +#define QUADSPI_MCR0x00 +#define QUADSPI_MCR_RESERVED_MASK GENMASK(19, 16) +#define QUADSPI_MCR_MDIS_MASK BIT(14) +#define QUADSPI_MCR_CLR_TXF_MASK BIT(11) +#define QUADSPI_MCR_CLR_RXF_MASK BIT(10) +#define QUADSPI_MCR_DDR_EN_MASKBIT(7) +#define QUADSPI_MCR_END_CFG_MASK GENMASK(3, 2) +#define QUADSPI_MCR_SWRSTHD_MASK BIT(1) +#define QUADSPI_MCR_SWRSTSD_MASK BIT(0) + +#define QUADSPI_IPCR 0x08 +#define QUADSPI_IPCR_SEQID(x) ((x) << 24)
[PATCH 1/1] efi_loader: git ignore helloworld_efi.S
Add *.S to .gitignore. Signed-off-by: Heinrich Schuchardt --- lib/efi_loader/.gitignore | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/efi_loader/.gitignore b/lib/efi_loader/.gitignore index 634a600f84..f2d7c14447 100644 --- a/lib/efi_loader/.gitignore +++ b/lib/efi_loader/.gitignore @@ -1,2 +1,3 @@ *.efi *.so +*.S -- 2.24.0
[PATCH v2 1/1] efi_selftest: Update .gitignore
From: Sughosh Ganu Add the following file to .gitignore efi_miniapp_file_image_exception.h Signed-off-by: Sughosh Ganu Use efi_miniapp_*.h instead of file enumeration. Signed-off-by: Heinrich Schuchardt --- v2 Use efi_miniapp_*.h instead of file enumeration. --- lib/efi_selftest/.gitignore | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/lib/efi_selftest/.gitignore b/lib/efi_selftest/.gitignore index 293a17b818..5b25169e6e 100644 --- a/lib/efi_selftest/.gitignore +++ b/lib/efi_selftest/.gitignore @@ -1,4 +1,3 @@ -efi_miniapp_file_image_exit.h -efi_miniapp_file_image_return.h +efi_miniapp_*.h *.efi *.so -- 2.24.0
Re: [PATCH] mtd: spi-nor: ids: Add GigaDevice gd25q128
On 14/11/19 5:31 am, Peter Robinson wrote:
> Add gd25q128 128Mbit chip to spi-nor id table.
>
> Tested on Pinebook Pro
>
> Signed-off-by: Peter Robinson
> ---
Acked-by: Vignesh Raghavendra
> drivers/mtd/spi/spi-nor-ids.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> index d3b84574ac..973b6f86c9 100644
> --- a/drivers/mtd/spi/spi-nor-ids.c
> +++ b/drivers/mtd/spi/spi-nor-ids.c
> @@ -107,6 +107,11 @@ const struct flash_info spi_nor_ids[] = {
> SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> },
> + {
> + INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256,
> + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> + },
> {
> INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
> SECT_4K | SPI_NOR_DUAL_READ |
>
--
Regards
Vignesh
Re: [RFC PATCH 2/2] net: Add Support for GENET Ethernet controller
On Fri, 13 Dec 2019 15:53:24 -0800
Florian Fainelli wrote:
Hi Florian,
many thanks for your reply!
> On 12/13/2019 8:50 AM, Andre Przywara wrote:
> >> +/* total number of Buffer Descriptors, same for Rx/Tx */
> >> +#define TOTAL_DESC 256
> >> +
> >> +#define DEFAULT_Q0x10
> >
> > I think that deserves a comment.
> > Maybe Florian can comment on what this odd "queue 16" is really about? It
> > seems weird to support *17* queues and make the last one the default.
>
> In the mode we operate (descriptor mode) this is the background/default
> queue, I have no other explanation to provide than that, sorry if this
> is a bit "compact".
No worries, I just found that odd. I can live with queue 16 ;-)
> You could bring up the other priority queues, but
> that seems pointless in u-boot.
Exactly. Actually sending in U-Boot is completely synchronous: send() is only
supposed to return when the packet has been sent. So for the TX side we would
just need one descriptor, and priority support would be totally pointless. For
RX not even Linux seems to use the priority queues, I guess that would require
to program filters in the MAC for assigning packets to queues?
[ ... ]
> >> +static void reset_umac(struct bcmgenet_eth_priv *priv)
> >
> > What is the difference to the function above? The name is confusingly
> > similar.
>
> And so is the version in the kernel arguably. Note that Doug recently
> made a fair amount of changes to how GENET is reset, you have some of
> those changes with the loopback enabling, but please check you have the
> latest programming sequence since this is a source of hard to debug
> problems with the UniMAC receiver stuck/replicating packets incorrectly
> if not properly reset.
Ah, thanks for the heads up, we will have a look.
> >> +static int _bcmgenet_gmac_eth_send(struct bcmgenet_eth_priv *priv, void
> >> *packet,
> >> + int len)
> >> +{
> >> + u32 size, len_stat, prod_index, cons;
> >> + u32 tries = 100;
> >> +
> >> + void *desc_base = (priv->tx_desc_base + (priv->tx_index *
> >> DMA_DESC_SIZE));
> >> +
> >> + len_stat = (len << DMA_BUFLENGTH_SHIFT) | (0x3F << DMA_TX_QTAG_SHIFT);
> >> + len_stat |= (DMA_TX_APPEND_CRC | DMA_SOP | DMA_EOP);
> >> +
> >> + prod_index = readl(priv->mac_reg + TDMA_RING_REG_BASE(DEFAULT_Q) +
> >> TDMA_PROD_INDEX);
> >> +
> >> + size = roundup(len, ARCH_DMA_MINALIGN);
> >
> > I think more important than aligning the size is aligning the base.
> > Not that it really matters architecturally ...
>
> Agreed, and if your flush_dcache_range() is not able to figure out
> whether it needs to span adjacent cachelines, it is mildy broken at that
> point.
It actually does - at least for arm64. But this whole cache maintenance
handling in U-Boot is a bit of a mystery to me still, I think that stems from
different implementations by various architectures and revisions.
> >> + flush_dcache_range((ulong)packet, (ulong)packet + size);
> >> +
> >> + /* Set-up packet for transmission */
> >> + writel(lower_32_bits((ulong)packet), (desc_base + DMA_DESC_ADDRESS_LO));
> >> + writel(upper_32_bits((ulong)packet), (desc_base + DMA_DESC_ADDRESS_HI));
> >> + writel(len_stat, (desc_base + DMA_DESC_LENGTH_STATUS));
> >> +
> >> + /* Increment index and wrap-up */
> >> + priv->tx_index++;
> >> + if (!(priv->tx_index % TOTAL_DESC)) {
> >> + priv->tx_index = 0;
> >
> > This looks weird to read. I guess you just want to wrap around?
> > Maybe:
> > if (++priv->tx_index >= TOTAL_DESC)
> >
> >
> >> + }
> >> +
> >> + prod_index++;
> >> +
> >> + /* Start Transmisson */
> >> + writel(prod_index, (priv->mac_reg + TDMA_RING_REG_BASE(DEFAULT_Q) +
> >> TDMA_PROD_INDEX));
> >> +
> >> + do {
> >> + cons = readl(priv->mac_reg + TDMA_RING_REG_BASE(DEFAULT_Q) +
> >> TDMA_CONS_INDEX);
> >> + } while ((cons & 0x) < prod_index && --tries);
>
> Could add an equivalent of cpu_relax() from Linux and/or a timeout to
> make sure you don't wait forever on a misconfigured platform.
Well, U-Boot is single-threaded and synchronous anyway, so the send() function
is supposed to wait until the packet has been sent out, then return. So any
yielding would be pointless. And for the timeout there is "tries" variable,
which should prevent an endless loop?
>
> >> + if (!tries)
> >> + return -ETIMEDOUT;
> >> +
> >> + return 0;
> >> +}
> >> +
> >> +static int _bcmgenet_gmac_eth_recv(struct bcmgenet_eth_priv *priv, uchar
> >> **packetp)
> >> +{
> >> + u32 len_stat;
> >> + u32 len;
> >> + u32 addr;
> >> + u32 length = 0;
> >> + void *desc_base = (priv->rx_desc_base + (priv->rx_index *
> >> DMA_DESC_SIZE));
> >> +
> >> + len_stat = readl(desc_base + DMA_DESC_LENGTH_STATUS);
> >> +
> >> + if (!(len_stat & DMA_OWN)) {
> >
> > I think it would be cleaner to negate this and just bail out early.
> > But also: Is this bit safe to
Re: [PATCH v2 2/4] regmap: Allow providing read/write callbacks through struct regmap_config
Hi Simon,
On 10/12/2019 16:18, Simon Glass wrote:
Hi Jean-Jacques,
On Tue, 5 Nov 2019 at 04:47, Jean-Jacques Hiblot wrote:
Some linux drivers provide their own read/write functions to access data
from/of the regmap. Adding support for it.
Signed-off-by: Jean-Jacques Hiblot
---
Changes in v2:
- Only use custom accessors if {,SPL,TPL}_REGMAP_ACCESSORS is enabled
drivers/core/Kconfig | 25 +
drivers/core/regmap.c | 22 --
include/regmap.h | 28 +---
3 files changed, 70 insertions(+), 5 deletions(-)
Coming back to the discussion on driver model
How do you specify the fields? I would expect that this would be done
in the driver tree? Perhaps in a subnode of the device?
Just to state what I see as the advantages of using a separate device
for access:
- Remove the #ifdef in the regmap struct
- Easy to specify the behaviour in a device-tree node
- Easy to extend as the child device can do what it likes with respect to access
That sure is a better abstraction. However the goal of this patch is
only to use the same API as linux. It allows porting the drivers as-is
and thus reduce the burden of maintenance.
JJ
Disadvantage is that it takes a bit more space.
Regards,
Simon
[BUG] POWER: undefined reference to `_restgpr_25_x'
Hello Wolfgang, with powerpc64-linux-gnu-gcc, version 9.2.1, big endian I see the errors below when compiling P2041RDB_defconfig. post/drivers/memory.c:268: undefined reference to `_restgpr_25_x' powerpc64-linux-gnu-ld.bfd: post/built-in.o: in function `memory_post_test_lines': post/drivers/memory.c:408: undefined reference to `_restgpr_31_x' powerpc64-linux-gnu-ld.bfd: post/built-in.o: in function `memory_post_test_patterns': post/drivers/memory.c:436: undefined reference to `_restgpr_29_x' powerpc64-linux-gnu-ld.bfd: post/built-in.o: in function `memory_post_test_regions': post/drivers/memory.c:453: undefined reference to `_restgpr_29_x' powerpc64-linux-gnu-ld.bfd: post/built-in.o: in function `memory_post_test': post/drivers/memory.c:540: undefined reference to `_restgpr_26_x' make: *** [Makefile:1671: u-boot] Error On Debian Buster I issued the following commands: make P2041RDB_defconfig sudo apt-get install gcc-powerpc64-linux-gnu export CROSS_COMPILE=powerpc64-linux-gnu- make I needed the following changes to be able to compile at all: diff --git a/Makefile b/Makefile index 0766f78dcb..71f98a2615 100644 --- a/Makefile +++ b/Makefile @@ -412,7 +412,7 @@ CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \ KBUILD_CPPFLAGS := -D__KERNEL__ -D__UBOOT__ -KBUILD_CFLAGS := -Wall -Wstrict-prototypes \ +KBUILD_CFLAGS := -Wall -Wstrict-prototypes -Wno-error=address-of-packed-member \ -Wno-format-security \ -fno-builtin -ffreestanding $(CSTD_FLAG) KBUILD_CFLAGS += -fshort-wchar -fno-strict-aliasing diff --git a/examples/Makefile b/examples/Makefile index d440bc5655..825954c185 100644 --- a/examples/Makefile +++ b/examples/Makefile @@ -6,6 +6,6 @@ ifdef FTRACE subdir-ccflags-y += -finstrument-functions -DFTRACE endif -subdir-y += standalone +#subdir-y += standalone subdir-$(CONFIG_API) += api endif Best regards Heinrich
[BUG] common/usb.c: taking address of packed member of ‘struct usb_device_descriptor’ may result in an unaligned pointer value
Hello Marek, with powerpc64-linux-gnu-gcc, version 9.2.1, big endian I see the errors below. struct usb_device_descriptor is naturally packed. Why do we need the packed attribute in include/linux/usb/ch9.h? If it is needed, we should replace le16_to_cpus() by an alignment friendly implementation in common/usb.c, e.g. using u8* pointers. CC common/usb.o In file included from ./arch/powerpc/include/asm/byteorder.h:82, from ./arch/powerpc/include/asm/bitops.h:8, from include/linux/bitops.h:136, from include/common.h:26, from common/usb.c:28: common/usb.c: In function ‘usb_select_config’: common/usb.c:1081:15: error: taking address of packed member of ‘struct usb_device_descriptor’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 1081 | le16_to_cpus(>descriptor.bcdUSB); include/linux/byteorder/big_endian.h:98:38: note: in definition of macro ‘__le16_to_cpus’ 98 | #define __le16_to_cpus(x) __swab16s((x)) | ^ common/usb.c:1081:2: note: in expansion of macro ‘le16_to_cpus’ 1081 | le16_to_cpus(>descriptor.bcdUSB); | ^~~~ common/usb.c:1082:15: error: taking address of packed member of ‘struct usb_device_descriptor’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 1082 | le16_to_cpus(>descriptor.idVendor); include/linux/byteorder/big_endian.h:98:38: note: in definition of macro ‘__le16_to_cpus’ 98 | #define __le16_to_cpus(x) __swab16s((x)) | ^ common/usb.c:1082:2: note: in expansion of macro ‘le16_to_cpus’ 1082 | le16_to_cpus(>descriptor.idVendor); | ^~~~ common/usb.c:1083:15: error: taking address of packed member of ‘struct usb_device_descriptor’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 1083 | le16_to_cpus(>descriptor.idProduct); include/linux/byteorder/big_endian.h:98:38: note: in definition of macro ‘__le16_to_cpus’ 98 | #define __le16_to_cpus(x) __swab16s((x)) | ^ common/usb.c:1083:2: note: in expansion of macro ‘le16_to_cpus’ 1083 | le16_to_cpus(>descriptor.idProduct); | ^~~~ common/usb.c:1084:15: error: taking address of packed member of ‘struct usb_device_descriptor’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 1084 | le16_to_cpus(>descriptor.bcdDevice); include/linux/byteorder/big_endian.h:98:38: note: in definition of macro ‘__le16_to_cpus’ 98 | #define __le16_to_cpus(x) __swab16s((x)) | ^ common/usb.c:1084:2: note: in expansion of macro ‘le16_to_cpus’ 1084 | le16_to_cpus(>descriptor.bcdDevice); | ^~~~ Best regards Heinrich
Re: [RFC] new board VoCore2
On 12/16/19 8:20 AM, Stefan Roese wrote: > Hi Mauro, > > On 15.12.19 11:20, Mauro Condarelli wrote: >> I am trying to extend support to a new board "VoCore2" whose specs can >> be found here: https://vocore.io/v2.html > > Nice. Thanks for working on this. > >> Port is concerning the "ultimate" board which has all connectors in >> place for SD, USB and Ethernet. >> This board comes with a paleolithic (1.3.0) version of u-boot and I'm >> trying to upgrade to a recent one >> also because I need to implement "automatic upgrade" (possibly using >> RAUC, but that is another story). >> >> Port is working and able to boot Linuz, but it is not ready for >> inclusion for several reasons >> and I would like to have expert advice on how to tackle shortcomings, as >> advised by stefanro on IRC: >>> 6:49:14 AM - stefanro: mcon: Please submit the patches directly to the >>> list, with me (and other MIPS / MT7628/88 experts - Daniel etc) on Cc. >>> If you feel the patches are not ready for integration, then you can >>> mark them as "RFC" in the subject. >> >> Problematic areas I see (side from possible code style issues) are: >> 1) I added support for a new SPI NOR Flash and that should, probably, be >> a separate patch. > > Yes, please. Done. >> 2) I added support for SPI NOR partitioning and I'm unsure if that >> should be in the "board definition". >> 3) SPI NOR partitioning is actually duplicated in ENV var (mtdparts) and >> in Device Tree; I didn't find how to read it directly from DT. > > When you pass the MTD partitioning via kernel cmdline "mtdparts=...", > which can be generated by U-Boot, then there is no need for the DT > partitioning. If I understand You correctly this means to completely remove DT partitioning information and purely rely on "mtdparts" information. I was unaware of this possibility. I'll cross check. Thanks. >> 4) Board also has SD, handled via MTK_SD driver, but I've been unable to >> make it work. > Then I suggest to exclude it for now. I strongly suspect the failure is due to complete inability of VoCore2 to handle MMC/SD power (SD-VCC is hardwired to +3.3V, no way to hard reset SD card other than complete power-down) and clock. I had to patch kernel (5.3.0) mtk_sd.c to disable clock gating (msdc_gate_clock(), msdc_ungate_clock() and msdc_drv_probe(); a rather ugly patch I won't try to send upstream; unfortunately u-boot mtk_sd.c looks very different I think I'll need some help there...) and to add a "regulator-fixed" to DT, but I'm unsure if and how it is supported by u-boot. I will exclude all this from current patch-set (but it is vital for my project as I will need to save Environment to MMC to enable boot-counters without burning the SPI NOR). >> 5) Current binary is rather big and I would like to shrink it a bit, if >> possible. >> >> Any hint/criticism/advice would be VERY welcome. > > The most important comment I have is, please post the patch inline, so > that > we can easily comment on it. Please also take a look at this page for > hints > about patch submission: > > http://www.denx.de/wiki/view/U-Boot/Patches Reading it now. I will reformat patches using a different branch and condensing them into logically coherent lumps. It will take some time. > Thanks, > Stefan > Regards Mauro
Re: [Patch] Add support for GD25Q128C SPI NOR chip
On Mon, Dec 16, 2019 at 9:06 AM Mauro Condarelli wrote:
>
> Trivial patch to add Support for GigaDevice GD25Q128C:
This looks like the same as I submitted a while back [1]
[1] http://patchwork.ozlabs.org/patch/1194523/
>
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> index d3b84574ac..fbb7dca30c 100644
> --- a/drivers/mtd/spi/spi-nor-ids.c
> +++ b/drivers/mtd/spi/spi-nor-ids.c
> @@ -107,6 +107,11 @@ const struct flash_info spi_nor_ids[] = {
> SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> },
> + {
> + INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256,
> + SECT_4K | SPI_NOR_DUAL_READ |
> + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> + },
> {
> INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
> SECT_4K | SPI_NOR_DUAL_READ |
>
>
> Regards
> Mauro Condarelli
[Patch] Add support for GD25Q128C SPI NOR chip
Trivial patch to add Support for GigaDevice GD25Q128C:
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index d3b84574ac..fbb7dca30c 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -107,6 +107,11 @@ const struct flash_info spi_nor_ids[] = {
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
},
+ {
+ INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256,
+ SECT_4K | SPI_NOR_DUAL_READ |
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+ },
{
INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
SECT_4K | SPI_NOR_DUAL_READ |
Regards
Mauro Condarelli
RE: [PATCH v3 2/8] clk: stm32mp1: Add a clock entry for RNG1 device
Hi, > From: U-Boot On Behalf Of Sughosh Ganu > Sent: vendredi 13 décembre 2019 08:14 > > Add an entry for allowing clock enablement for the random number generator > peripheral, RNG1. > > Signed-off-by: Sughosh Ganu > Reviewed-by: Patrice Chotard Acked-by: Patrick Delaunay Thanks.
Re: [PATCH v1] T1024RDB: USB: Add a 10808 us delay in usb_scan_port
On 12/16/19 4:17 AM, Bin Meng wrote: > +Marek, > > On Mon, Dec 16, 2019 at 11:13 AM Yinbo Zhu wrote: >> >> T1024RDB usb controller doesn't detect usb device at first usb start >> Add a delay that is greater than 10808 us can fix that issue, which >> delay if is less than 10808 us, issue is probabilistic occurrence >> >> => usb start >> starting USB... >> USB0: USB EHCI 1.00 >> USB1: USB EHCI 1.00 >> scanning bus 0 for devices... 1 USB Device(s) found >> scanning bus 1 for devices... 1 USB Device(s) found >>scanning usb for storage devices... 0 Storage Device(s) found >> => usb stop >> stopping USB.. >> => usb start >> starting USB... >> USB0: USB EHCI 1.00 >> USB1: USB EHCI 1.00 >> scanning bus 0 for devices... 2 USB Device(s) found >> scanning bus 1 for devices... 1 USB Device(s) found >>scanning usb for storage devices... 1 Storage Device(s) found >> => >> >> Signed-off-by: Yinbo Zhu >> --- >> common/usb_hub.c | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/common/usb_hub.c b/common/usb_hub.c >> index 33aaeb8e44..6dd06696b2 100644 >> --- a/common/usb_hub.c >> +++ b/common/usb_hub.c >> @@ -486,6 +486,9 @@ static int usb_scan_port(struct usb_device_scan >> *usb_scan) >> return 0; >> } >> >> +#ifdef CONFIG_TARGET_T1024RDB >> + udelay(10808); >> +#endif > > This looks like a workaround. Is this a silicon errata? Does setting usb_pgood_delay to e.g. 2000 help ?
