RE: [EXT] Re: [Patch v3 1/7] spi: Transform the FSL QuadSPI driver to use the SPI MEM API
> -Original Message- > From: Schrempf Frieder > Sent: Tuesday, January 7, 2020 4:39 PM > To: Kuldeep Singh ; u-boot@lists.denx.de; > ja...@amarulasolutions.com; Vignesh R ; Jagan Teki > > Cc: Priyanka Jain ; Ashish Kumar > ; Stefan Roese > Subject: [EXT] Re: [Patch v3 1/7] spi: Transform the FSL QuadSPI driver to use > the SPI MEM API > > Caution: EXT Email > > Hi Kuldeep, > > On 06.01.20 11:56, Kuldeep Singh wrote: > > Hi Jagan and Vignesh, > > > > Could you please review this driver. Actually, I don't want to miss this > > merge > window. > > Moreover, Frieder's suggestions are already incorporated and this version > of driver is almost identical to linux version apart from the changes already > mentioned in commit message. > > You may also take a look at Linux driver[1] as well. > > As the v3 is close to my original version and the Linux version, I'm ok > with it. I can't review my own patch but from my point of once the two > dependencies are merged, this could be merged too. > > As for the other (cleanup) patches in this series, have you tested them > with buildman to make sure the config changes are ok? Thanks for pointing it out Frieder. I have checked with buildman and found one board failing in cleaning up patches. I will correct it and post next version. Thanks Kuldeep > Thanks, > Frieder > > > > > P.S: Jagan, I was not sure which email you use frequently. So, I tagged both > of them. > > > > Thanks > > Kuldeep > > > > [1] > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Felixir. > bootlin.com%2Flinux%2Flatest%2Fsource%2Fdrivers%2Fspi%2Fspi-fsl- > qspi.cdata=02%7C01%7Ckuldeep.singh%40nxp.com%7C51143fbfadc54 > 366357f08d793621657%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0 > %7C637139921811229018sdata=EZY5AKZVYZl%2ByrovsgGS9FJBGuxryI > aCwRLX4UHSZFU%3Dreserved=0
Re: [GITLAB CI RUNNER PATCH] Dockerfile: Use latest QEMU v4.2.0 version
On Mon, Jan 06, 2020 at 09:55:13AM +0100, Michal Simek wrote: > Use the latest QEMU v4.2 version which contain some fixes for Xilinx Versal > platform. > > Signed-off-by: Michal Simek Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] gitlab/azure: Update to latest container
On Fri, Jan 10, 2020 at 08:59:14PM -0500, Tom Rini wrote: > - Updated base snapshot > - QEMU v4.2.0 > > Signed-off-by: Tom Rini This has been tested on both GitLab and Azure: https://gitlab.denx.de/u-boot/u-boot/pipelines/1833 https://dev.azure.com/u-boot/u-boot/_build/results?buildId=184=results Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
[PATCH] gitlab/azure: Update to latest container
- Updated base snapshot - QEMU v4.2.0 Signed-off-by: Tom Rini --- .azure-pipelines.yml | 2 +- .gitlab-ci.yml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index cad8eea87bc4..3b7744ce3c38 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -1,7 +1,7 @@ variables: windows_vm: vs2015-win2012r2 ubuntu_vm: ubuntu-18.04 - ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20191010-20Oct2019 + ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20191202-10Jan2020 # Add '-u 0' options for Azure pipelines, otherwise we get "permission # denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer", # since our $(ci_runner_image) user is not root. diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 0f5271dcd308..d799cc30a8b9 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -2,7 +2,7 @@ # Grab our configured image. The source for this is found at: # https://gitlab.denx.de/u-boot/gitlab-ci-runner -image: trini/u-boot-gitlab-ci-runner:bionic-20191010-20Oct2019 +image: trini/u-boot-gitlab-ci-runner:bionic-20191202-10Jan2020 # We run some tests in different order, to catch some failures quicker. stages: -- 2.17.1
Re: [PATCH 3/3] cmd: adtimg: Refactor usage style
Hi Tom, On Fri, Jan 10, 2020 at 04:50:52PM -0500, Tom Rini wrote: > On Tue, Dec 24, 2019 at 05:51:08PM +0100, Eugeniu Rosca wrote: > > Signed-off-by: Eugeniu Rosca > > Reviewed-by: Sam Protsenko > > Applied to u-boot/master, thanks! Thanks for merging! -- Best Regards, Eugeniu
[PATCH v4 0/5] FSL/Layerscape gen 3: export serdes cfg to env
Exports the serdes configuration as an environment variable for LS gen 3 SoCs, so it can be used in u-boot command line. It should particularly be useful for applying Linux DT overlays for the given serdes configuration. First 4 patches free up arch_misc_init, which is now implemented in arch/arm/cpu/armv8/fsl-layerscape/cpu.c. For LS1028A and LX2 the board_mux_init code is now under misc_init_r. MISC_INIT_R is now enabled for the relavant boards. Changes in v4: - Fix a variable unused warning, I missed it in v3. Changes in v3: - Only revert serdes number for SoCs that encode the protocol on each lane (LS1028 and LS1088). For the others (LS2, LX2) leave the number unchanged. In previous versions for instance LX2 serdes read 9000 instead of 9. Changes in v2: - s/emtpy/empty/ in description of two of the patches This set replaces v2: https://patchwork.ozlabs.org/project/uboot/list/?series=146468 and v3: https://patchwork.ozlabs.org/project/uboot/list/?series=152569 Alex Marginean (5): board: fsl: lx2160a: free up arch_misc_init board: fsl: ls2080a/ls2081a: remove empty arch_misc_init board: fsl: ls1088a: remove empty arch_misc_init board: fsl: ls1028a: free up arch_misc_init arch: armv8: fsl-layerscape: export serdes config to environment arch/arm/Kconfig | 10 - arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 +++ .../armv8/fsl-layerscape/fsl_lsch3_serdes.c | 42 +++ board/freescale/ls1028a/ls1028a.c | 4 +- board/freescale/ls1088a/ls1088a.c | 7 board/freescale/ls2080a/ls2080a.c | 7 board/freescale/ls2080aqds/ls2080aqds.c | 7 board/freescale/ls2080ardb/ls2080ardb.c | 7 board/freescale/lx2160a/lx2160a.c | 4 +- configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1028aqds_tfa_defconfig | 1 + configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_defconfig | 1 + 16 files changed, 67 insertions(+), 42 deletions(-) -- 2.17.1
[PATCH v4 1/5] board: fsl: lx2160a: free up arch_misc_init
Currently LX2 board code uses arch_misc_init to set up the board mux on
RDB and QDS. Move this code to misc_init_r. This is consistent with LS
gen 2 and T series SoCs/boards.
Signed-off-by: Alex Marginean
---
arch/arm/Kconfig | 2 --
board/freescale/lx2160a/lx2160a.c| 4 ++--
configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 +
configs/lx2160aqds_tfa_defconfig | 1 +
configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 +
configs/lx2160ardb_tfa_defconfig | 1 +
6 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 76365ef313..45498180c1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1192,7 +1192,6 @@ config TARGET_LS2081ARDB
config TARGET_LX2160ARDB
bool "Support lx2160ardb"
select ARCH_LX2160A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1206,7 +1205,6 @@ config TARGET_LX2160ARDB
config TARGET_LX2160AQDS
bool "Support lx2160aqds"
select ARCH_LX2160A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
diff --git a/board/freescale/lx2160a/lx2160a.c
b/board/freescale/lx2160a/lx2160a.c
index e5b7fec9a4..084ee162f0 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -579,8 +579,8 @@ void detail_board_ddr_info(void)
print_ddr_info(0);
}
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
{
config_board_mux();
diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index 4858f666da..2b45132103 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -16,6 +16,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index 167c517050..0ea22a912d 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 87459dd383..379763c28e 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -17,6 +17,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index f6cf1aca8e..cf9678e7e1 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
--
2.17.1
[PATCH v4 5/5] arch: armv8: fsl-layerscape: export serdes config to environment
Exports the serdes configuration as an environment variable for LS gen 3
SoCs, so it can be used in u-boot command line. It should particularly
be useful for applying Linux DT overlays for the given serdes
configuration.
This code is called from arch_misc_init and not from the existing
serdes_init function because it depends on U-Boot environment being set
up.
Signed-off-by: Alex Marginean
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 +
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 +
.../armv8/fsl-layerscape/fsl_lsch3_serdes.c | 59 +++
.../include/asm/arch-fsl-layerscape/config.h | 2 +
4 files changed, 76 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index ed478ddd48..e2b92f0eab 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -242,6 +242,7 @@ config FSL_LSCH2
select SYS_FSL_SEC_BE
config FSL_LSCH3
+ select ARCH_MISC_INIT
bool
config NXP_LSCH3_2
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 639f531649..58fe36f3f1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -1630,3 +1630,17 @@ __weak int dram_init(void)
return 0;
}
+
+#ifdef CONFIG_ARCH_MISC_INIT
+__weak int serdes_misc_init(void)
+{
+ return 0;
+}
+
+int arch_misc_init(void)
+{
+ serdes_misc_init();
+
+ return 0;
+}
+#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index 1a747a9e3d..d143864af1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -600,3 +600,62 @@ void fsl_serdes_init(void)
serdes3_prtcl_map);
#endif
}
+
+int serdes_set_env(int sd, int rcwsr, int sd_prctl_mask, int sd_prctl_shift)
+{
+ struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+ char scfg[16], snum[16];
+ int cfgr = 0;
+ u32 cfg;
+
+ cfg = gur_in32(>rcwsr[rcwsr - 1]) & sd_prctl_mask;
+ cfg >>= sd_prctl_shift;
+ cfg = serdes_get_number(sd, cfg);
+
+#if defined(SRDS_BITS_PER_LANE)
+ /*
+* reverse lanes, lane 0 should be printed first so it must be moved to
+* high order bits.
+* For example bb58 should read 85bb, lane 0 being protocol 8.
+* This only applies to SoCs that define SRDS_BITS_PER_LANE and have
+* independent per-lane protocol configuration, at this time LS1028A and
+* LS1088A. LS2 and LX2 SoCs encode the full protocol mix across all
+* lanes as a single value.
+*/
+ for (int i = 0; i < SRDS_MAX_LANES; i++) {
+ int tmp;
+
+ tmp = cfg >> (i * SRDS_BITS_PER_LANE);
+ tmp &= GENMASK(SRDS_BITS_PER_LANE - 1, 0);
+ tmp <<= (SRDS_MAX_LANES - i - 1) * SRDS_BITS_PER_LANE;
+ cfgr |= tmp;
+ }
+#endif /* SRDS_BITS_PER_LANE */
+
+ snprintf(snum, 16, "serdes%d", sd);
+ snprintf(scfg, 16, "%x", cfgr);
+ env_set(snum, scfg);
+
+ return 0;
+}
+
+int serdes_misc_init(void)
+{
+#ifdef CONFIG_SYS_FSL_SRDS_1
+ serdes_set_env(FSL_SRDS_1, FSL_CHASSIS3_SRDS1_REGSR,
+ FSL_CHASSIS3_SRDS1_PRTCL_MASK,
+ FSL_CHASSIS3_SRDS1_PRTCL_SHIFT);
+#endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+ serdes_set_env(FSL_SRDS_2, FSL_CHASSIS3_SRDS2_REGSR,
+ FSL_CHASSIS3_SRDS2_PRTCL_MASK,
+ FSL_CHASSIS3_SRDS2_PRTCL_SHIFT);
+#endif
+#ifdef CONFIG_SYS_NXP_SRDS_3
+ serdes_set_env(NXP_SRDS_3, FSL_CHASSIS3_SRDS3_REGSR,
+ FSL_CHASSIS3_SRDS3_PRTCL_MASK,
+ FSL_CHASSIS3_SRDS3_PRTCL_SHIFT);
+#endif
+
+ return 0;
+}
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index a83c70ece2..ddd9390df4 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -123,6 +123,7 @@
#define CONFIG_SYS_PAGE_SIZE 0x1
#defineSRDS_MAX_LANES 4
+#defineSRDS_BITS_PER_LANE 4
/* TZ Protection Controller Definitions */
#define TZPC_BASE 0x0220
@@ -252,6 +253,7 @@
#define TZPCDECPROT_2_CLR_BASE (TZPC_BASE + 0x820)
#defineSRDS_MAX_LANES 4
+#defineSRDS_BITS_PER_LANE 4
#define CONFIG_SYS_FSL_OCRAM_BASE 0x1800 /* initial RAM */
#define SYS_FSL_OCRAM_SPACE_SIZE 0x0020 /* 2M */
--
2.17.1
[PATCH v4 4/5] board: fsl: ls1028a: free up arch_misc_init
Currently LS1028A board code uses arch_misc_init to set up the board mux
on QDS. Move this code to misc_init_r. This is consistent with LS gen 2
and T series SoCs/boards.
Signed-off-by: Alex Marginean
---
arch/arm/Kconfig | 1 -
board/freescale/ls1028a/ls1028a.c| 4 ++--
configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
configs/ls1028aqds_tfa_defconfig | 1 +
4 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 82bef4fa15..8c850d729d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1321,7 +1321,6 @@ config TARGET_LS1028AQDS
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
select BOARD_LATE_INIT
- select ARCH_MISC_INIT
help
Support for Freescale LS1028AQDS platform
The LS1028A Development System (QDS) is a high-performance
diff --git a/board/freescale/ls1028a/ls1028a.c
b/board/freescale/ls1028a/ls1028a.c
index 1151e77531..7e55c25192 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -108,8 +108,8 @@ int board_eth_init(bd_t *bis)
return pci_eth_init(bis);
}
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
{
config_board_mux();
diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 31e3b5a9b6..2da6bbf5b0 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -17,6 +17,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPT=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 72922120e9..f3cc9c460b 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -18,6 +18,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPT=y
--
2.17.1
[PATCH v4 3/5] board: fsl: ls1088a: remove empty arch_misc_init
The arch_misc_init function is empty on LS108x SoCs/boards, remove it.
Signed-off-by: Alex Marginean
---
arch/arm/Kconfig | 2 --
board/freescale/ls1088a/ls1088a.c | 7 ---
2 files changed, 9 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 38bf420feb..82bef4fa15 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1122,7 +1122,6 @@ config TARGET_LS2080A_SIMU
config TARGET_LS1088AQDS
bool "Support ls1088aqds"
select ARCH_LS1088A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1344,7 +1343,6 @@ config TARGET_LS1028ARDB
config TARGET_LS1088ARDB
bool "Support ls1088ardb"
select ARCH_LS1088A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
diff --git a/board/freescale/ls1088a/ls1088a.c
b/board/freescale/ls1088a/ls1088a.c
index 4ecf6dce68..0bd397a0be 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -811,13 +811,6 @@ void detail_board_ddr_info(void)
print_ddr_info(0);
}
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
- return 0;
-}
-#endif
-
#ifdef CONFIG_FSL_MC_ENET
void board_quiesce_devices(void)
{
--
2.17.1
[PATCH v4 2/5] board: fsl: ls2080a/ls2081a: remove empty arch_misc_init
The arch_misc_init function is empty on LS2 SoCs/boards, remove it.
Signed-off-by: Alex Marginean
---
arch/arm/Kconfig| 5 -
board/freescale/ls2080a/ls2080a.c | 7 ---
board/freescale/ls2080aqds/ls2080aqds.c | 7 ---
board/freescale/ls2080ardb/ls2080ardb.c | 7 ---
4 files changed, 26 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 45498180c1..38bf420feb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1098,7 +1098,6 @@ config TARGET_VEXPRESS64_JUNO
config TARGET_LS2080A_EMU
bool "Support ls2080a_emu"
select ARCH_LS2080A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select FSL_DDR_SYNC_REFRESH
@@ -,7 +1110,6 @@ config TARGET_LS2080A_EMU
config TARGET_LS2080A_SIMU
bool "Support ls2080a_simu"
select ARCH_LS2080A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
@@ -1140,7 +1138,6 @@ config TARGET_LS1088AQDS
config TARGET_LS2080AQDS
bool "Support ls2080aqds"
select ARCH_LS2080A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1159,7 +1156,6 @@ config TARGET_LS2080AQDS
config TARGET_LS2080ARDB
bool "Support ls2080ardb"
select ARCH_LS2080A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1178,7 +1174,6 @@ config TARGET_LS2080ARDB
config TARGET_LS2081ARDB
bool "Support ls2081ardb"
select ARCH_LS2080A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
diff --git a/board/freescale/ls2080a/ls2080a.c
b/board/freescale/ls2080a/ls2080a.c
index 413a698511..bc68f99625 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -48,13 +48,6 @@ void detail_board_ddr_info(void)
#endif
}
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
- return 0;
-}
-#endif
-
int board_eth_init(bd_t *bis)
{
int error = 0;
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c
b/board/freescale/ls2080aqds/ls2080aqds.c
index 5792a564bc..4034bdee28 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -289,13 +289,6 @@ void detail_board_ddr_info(void)
#endif
}
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
- return 0;
-}
-#endif
-
#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
void fdt_fixup_board_enet(void *fdt)
{
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
b/board/freescale/ls2080ardb/ls2080ardb.c
index 6a1b8e3f53..282aaf47fb 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -318,13 +318,6 @@ void detail_board_ddr_info(void)
#endif
}
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
- return 0;
-}
-#endif
-
#ifdef CONFIG_FSL_MC_ENET
void fdt_fixup_board_enet(void *fdt)
{
--
2.17.1
[PATCH v3 5/5] arch: armv8: fsl-layerscape: export serdes config to environment
Exports the serdes configuration as an environment variable for LS gen 3
SoCs, so it can be used in u-boot command line. It should particularly
be useful for applying Linux DT overlays for the given serdes
configuration.
This code is called from arch_misc_init and not from the existing
serdes_init function because it depends on U-Boot environment being set
up.
Signed-off-by: Alex Marginean
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 +
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 +
.../armv8/fsl-layerscape/fsl_lsch3_serdes.c | 57 +++
.../include/asm/arch-fsl-layerscape/config.h | 2 +
4 files changed, 74 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index ed478ddd48..e2b92f0eab 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -242,6 +242,7 @@ config FSL_LSCH2
select SYS_FSL_SEC_BE
config FSL_LSCH3
+ select ARCH_MISC_INIT
bool
config NXP_LSCH3_2
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 639f531649..58fe36f3f1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -1630,3 +1630,17 @@ __weak int dram_init(void)
return 0;
}
+
+#ifdef CONFIG_ARCH_MISC_INIT
+__weak int serdes_misc_init(void)
+{
+ return 0;
+}
+
+int arch_misc_init(void)
+{
+ serdes_misc_init();
+
+ return 0;
+}
+#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index 1a747a9e3d..b5ce83b77c 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -600,3 +600,60 @@ void fsl_serdes_init(void)
serdes3_prtcl_map);
#endif
}
+
+int serdes_set_env(int sd, int rcwsr, int sd_prctl_mask, int sd_prctl_shift)
+{
+ struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+ char scfg[16], snum[16];
+ int i, cfgr = 0, tmp;
+ u32 cfg;
+
+ cfg = gur_in32(>rcwsr[rcwsr - 1]) & sd_prctl_mask;
+ cfg >>= sd_prctl_shift;
+ cfg = serdes_get_number(sd, cfg);
+
+#if defined(SRDS_BITS_PER_LANE)
+ /*
+* reverse lanes, lane 0 should be printed first so it must be moved to
+* high order bits.
+* For example bb58 should read 85bb, lane 0 being protocol 8.
+* This only applies to SoCs that define SRDS_BITS_PER_LANE and have
+* independent per-lane protocol configuration, at this time LS1028A and
+* LS1088A. LS2 and LX2 SoCs encode the full protocol mix across all
+* lanes as a single value.
+*/
+ for (i = 0; i < SRDS_MAX_LANES; i++) {
+ tmp = cfg >> (i * SRDS_BITS_PER_LANE);
+ tmp &= GENMASK(SRDS_BITS_PER_LANE - 1, 0);
+ tmp <<= (SRDS_MAX_LANES - i - 1) * SRDS_BITS_PER_LANE;
+ cfgr |= tmp;
+ }
+#endif /* SRDS_BITS_PER_LANE */
+
+ snprintf(snum, 16, "serdes%d", sd);
+ snprintf(scfg, 16, "%x", cfgr);
+ env_set(snum, scfg);
+
+ return 0;
+}
+
+int serdes_misc_init(void)
+{
+#ifdef CONFIG_SYS_FSL_SRDS_1
+ serdes_set_env(FSL_SRDS_1, FSL_CHASSIS3_SRDS1_REGSR,
+ FSL_CHASSIS3_SRDS1_PRTCL_MASK,
+ FSL_CHASSIS3_SRDS1_PRTCL_SHIFT);
+#endif
+#ifdef CONFIG_SYS_FSL_SRDS_2
+ serdes_set_env(FSL_SRDS_2, FSL_CHASSIS3_SRDS2_REGSR,
+ FSL_CHASSIS3_SRDS2_PRTCL_MASK,
+ FSL_CHASSIS3_SRDS2_PRTCL_SHIFT);
+#endif
+#ifdef CONFIG_SYS_NXP_SRDS_3
+ serdes_set_env(NXP_SRDS_3, FSL_CHASSIS3_SRDS3_REGSR,
+ FSL_CHASSIS3_SRDS3_PRTCL_MASK,
+ FSL_CHASSIS3_SRDS3_PRTCL_SHIFT);
+#endif
+
+ return 0;
+}
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index a83c70ece2..ddd9390df4 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -123,6 +123,7 @@
#define CONFIG_SYS_PAGE_SIZE 0x1
#defineSRDS_MAX_LANES 4
+#defineSRDS_BITS_PER_LANE 4
/* TZ Protection Controller Definitions */
#define TZPC_BASE 0x0220
@@ -252,6 +253,7 @@
#define TZPCDECPROT_2_CLR_BASE (TZPC_BASE + 0x820)
#defineSRDS_MAX_LANES 4
+#defineSRDS_BITS_PER_LANE 4
#define CONFIG_SYS_FSL_OCRAM_BASE 0x1800 /* initial RAM */
#define SYS_FSL_OCRAM_SPACE_SIZE 0x0020 /* 2M */
--
2.17.1
[PATCH v3 4/5] board: fsl: ls1028a: free up arch_misc_init
Currently LS1028A board code uses arch_misc_init to set up the board mux
on QDS. Move this code to misc_init_r. This is consistent with LS gen 2
and T series SoCs/boards.
Signed-off-by: Alex Marginean
---
arch/arm/Kconfig | 1 -
board/freescale/ls1028a/ls1028a.c| 4 ++--
configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
configs/ls1028aqds_tfa_defconfig | 1 +
4 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 82bef4fa15..8c850d729d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1321,7 +1321,6 @@ config TARGET_LS1028AQDS
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
select BOARD_LATE_INIT
- select ARCH_MISC_INIT
help
Support for Freescale LS1028AQDS platform
The LS1028A Development System (QDS) is a high-performance
diff --git a/board/freescale/ls1028a/ls1028a.c
b/board/freescale/ls1028a/ls1028a.c
index 1151e77531..7e55c25192 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -108,8 +108,8 @@ int board_eth_init(bd_t *bis)
return pci_eth_init(bis);
}
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
{
config_board_mux();
diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 31e3b5a9b6..2da6bbf5b0 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -17,6 +17,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPT=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 72922120e9..f3cc9c460b 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -18,6 +18,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0
earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x200 default_hugepagesz=2m
hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPT=y
--
2.17.1
[PATCH v3 2/5] board: fsl: ls2080a/ls2081a: remove empty arch_misc_init
The arch_misc_init function is empty on LS2 SoCs/boards, remove it.
Signed-off-by: Alex Marginean
---
arch/arm/Kconfig| 5 -
board/freescale/ls2080a/ls2080a.c | 7 ---
board/freescale/ls2080aqds/ls2080aqds.c | 7 ---
board/freescale/ls2080ardb/ls2080ardb.c | 7 ---
4 files changed, 26 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 45498180c1..38bf420feb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1098,7 +1098,6 @@ config TARGET_VEXPRESS64_JUNO
config TARGET_LS2080A_EMU
bool "Support ls2080a_emu"
select ARCH_LS2080A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select FSL_DDR_SYNC_REFRESH
@@ -,7 +1110,6 @@ config TARGET_LS2080A_EMU
config TARGET_LS2080A_SIMU
bool "Support ls2080a_simu"
select ARCH_LS2080A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
@@ -1140,7 +1138,6 @@ config TARGET_LS1088AQDS
config TARGET_LS2080AQDS
bool "Support ls2080aqds"
select ARCH_LS2080A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1159,7 +1156,6 @@ config TARGET_LS2080AQDS
config TARGET_LS2080ARDB
bool "Support ls2080ardb"
select ARCH_LS2080A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1178,7 +1174,6 @@ config TARGET_LS2080ARDB
config TARGET_LS2081ARDB
bool "Support ls2081ardb"
select ARCH_LS2080A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
diff --git a/board/freescale/ls2080a/ls2080a.c
b/board/freescale/ls2080a/ls2080a.c
index 413a698511..bc68f99625 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -48,13 +48,6 @@ void detail_board_ddr_info(void)
#endif
}
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
- return 0;
-}
-#endif
-
int board_eth_init(bd_t *bis)
{
int error = 0;
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c
b/board/freescale/ls2080aqds/ls2080aqds.c
index 5792a564bc..4034bdee28 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -289,13 +289,6 @@ void detail_board_ddr_info(void)
#endif
}
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
- return 0;
-}
-#endif
-
#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
void fdt_fixup_board_enet(void *fdt)
{
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
b/board/freescale/ls2080ardb/ls2080ardb.c
index 6a1b8e3f53..282aaf47fb 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -318,13 +318,6 @@ void detail_board_ddr_info(void)
#endif
}
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
- return 0;
-}
-#endif
-
#ifdef CONFIG_FSL_MC_ENET
void fdt_fixup_board_enet(void *fdt)
{
--
2.17.1
[PATCH v3 3/5] board: fsl: ls1088a: remove empty arch_misc_init
The arch_misc_init function is empty on LS108x SoCs/boards, remove it.
Signed-off-by: Alex Marginean
---
arch/arm/Kconfig | 2 --
board/freescale/ls1088a/ls1088a.c | 7 ---
2 files changed, 9 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 38bf420feb..82bef4fa15 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1122,7 +1122,6 @@ config TARGET_LS2080A_SIMU
config TARGET_LS1088AQDS
bool "Support ls1088aqds"
select ARCH_LS1088A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1344,7 +1343,6 @@ config TARGET_LS1028ARDB
config TARGET_LS1088ARDB
bool "Support ls1088ardb"
select ARCH_LS1088A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
diff --git a/board/freescale/ls1088a/ls1088a.c
b/board/freescale/ls1088a/ls1088a.c
index 4ecf6dce68..0bd397a0be 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -811,13 +811,6 @@ void detail_board_ddr_info(void)
print_ddr_info(0);
}
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
-{
- return 0;
-}
-#endif
-
#ifdef CONFIG_FSL_MC_ENET
void board_quiesce_devices(void)
{
--
2.17.1
[PATCH v3 1/5] board: fsl: lx2160a: free up arch_misc_init
Currently LX2 board code uses arch_misc_init to set up the board mux on
RDB and QDS. Move this code to misc_init_r. This is consistent with LS
gen 2 and T series SoCs/boards.
Signed-off-by: Alex Marginean
---
arch/arm/Kconfig | 2 --
board/freescale/lx2160a/lx2160a.c| 4 ++--
configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 +
configs/lx2160aqds_tfa_defconfig | 1 +
configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 +
configs/lx2160ardb_tfa_defconfig | 1 +
6 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 76365ef313..45498180c1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1192,7 +1192,6 @@ config TARGET_LS2081ARDB
config TARGET_LX2160ARDB
bool "Support lx2160ardb"
select ARCH_LX2160A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
@@ -1206,7 +1205,6 @@ config TARGET_LX2160ARDB
config TARGET_LX2160AQDS
bool "Support lx2160aqds"
select ARCH_LX2160A
- select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
diff --git a/board/freescale/lx2160a/lx2160a.c
b/board/freescale/lx2160a/lx2160a.c
index e5b7fec9a4..084ee162f0 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -579,8 +579,8 @@ void detail_board_ddr_info(void)
print_ddr_info(0);
}
-#if defined(CONFIG_ARCH_MISC_INIT)
-int arch_misc_init(void)
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
{
config_board_mux();
diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index 4858f666da..2b45132103 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -16,6 +16,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index 167c517050..0ea22a912d 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 87459dd383..379763c28e 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -17,6 +17,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index f6cf1aca8e..cf9678e7e1 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0
earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m
hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPT=y
--
2.17.1
[PATCH v3 0/5] FSL/Layerscape gen 3: export serdes cfg to env
Exports the serdes configuration as an environment variable for LS gen 3 SoCs, so it can be used in u-boot command line. It should particularly be useful for applying Linux DT overlays for the given serdes configuration. First 4 patches free up arch_misc_init, which is now implemented in arch/arm/cpu/armv8/fsl-layerscape/cpu.c. For LS1028A and LX2 the board_mux_init code is now under misc_init_r. MISC_INIT_R is now enabled for the relavant boards. Changes in v2: - s/emtpy/empty/ in description of two of the patches Changes in v3: - Only revert serdes number for SoCs that encode the protocol on each lane (LS1028 and LS1088). For the others (LS2, LX2) leave the number unchanged. In previous versions for instance LX2 serdes read 9000 instead of 9. This set replaces v2: https://patchwork.ozlabs.org/project/uboot/list/?series=146468 Alex Marginean (5): board: fsl: lx2160a: free up arch_misc_init board: fsl: ls2080a/ls2081a: remove empty arch_misc_init board: fsl: ls1088a: remove empty arch_misc_init board: fsl: ls1028a: free up arch_misc_init arch: armv8: fsl-layerscape: export serdes config to environment arch/arm/Kconfig | 10 - arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 +++ .../armv8/fsl-layerscape/fsl_lsch3_serdes.c | 42 +++ board/freescale/ls1028a/ls1028a.c | 4 +- board/freescale/ls1088a/ls1088a.c | 7 board/freescale/ls2080a/ls2080a.c | 7 board/freescale/ls2080aqds/ls2080aqds.c | 7 board/freescale/ls2080ardb/ls2080ardb.c | 7 board/freescale/lx2160a/lx2160a.c | 4 +- configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1028aqds_tfa_defconfig | 1 + configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_defconfig | 1 + 16 files changed, 67 insertions(+), 42 deletions(-) -- 2.17.1
Re: [U-Boot] [PATCH 2/9] m68k: add fec fdt overrides to all boards
On Fri, Nov 15, 2019 at 11:54:13PM +0100, Angelo Dureghello wrote: > From: Angelo Durgehello > > Add ethernet controller overrides for all involved boards. > > Signed-off-by: Angelo Durgehello Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
[PATCH v2] armv8: ls1028a_serdes: add a few missing serdes protocols to supported list
These protocols are supported and functional but they trigger a warning
in U-Boot console at boot because they are not on this list.
Signed-off-by: Alex Marginean
---
Changes in v2:
- added one more, 65bb
- changed subject
This patch replaces v1:
https://patchwork.ozlabs.org/patch/1220248/
arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
index 313f3f1e8a..80d2910f67 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
@@ -35,6 +35,10 @@ static struct serdes_config serdes1_cfg_tbl[] = {
{0xEB58, {SGMII_T1, QSGMII_B, PCIE2, SATA1} },
{0xEB8B, {PCIE1, SGMII_T1, PCIE2, SATA1} },
{0xE8CC, {PCIE1, PCIE1, SGMII_T1, SATA1} },
+ {0x, {SGMII1, SGMII2, SGMII3, SGMII4} },
+ {0x, {SGMII1, SGMII2, SGMII3, SGMII4} },
+ {0xb998, {SGMII_T1, SGMII2, SGMII3, PCIE1} },
+ {0xbb56, {SGMII_T1, QSGMII_B, PCIE2, PCIE1} },
{}
};
--
2.17.1
Re: [U-Boot] [PATCH] spl: fix entry_point equal to load_addr
On Fri, Jan 10, 2020 at 03:57:47PM +0100, Giulio Benetti wrote: > Hi All, > > On 12/7/19 10:28 PM, Simon Goldschmidt wrote: > > Hi Tom, > > > > On Fri, Dec 6, 2019 at 3:55 PM Tom Rini wrote: > > > > > > On Fri, Dec 06, 2019 at 03:05:55PM +0100, Simon Goldschmidt wrote: > > > > On Fri, Dec 6, 2019 at 2:49 PM Giulio Benetti > > > > wrote: > > > > > > > > > > Hello Tom, all, > > > > > > > > > > On 12/6/19 2:34 PM, Tom Rini wrote: > > > > > > On Fri, Dec 06, 2019 at 01:58:46PM +0100, Simon Goldschmidt wrote: > > > > > > > On Fri, Dec 6, 2019 at 1:46 PM Patrice CHOTARD > > > > > > > wrote: > > > > > > > > > > > > > > > > Hi > > > > > > > > > > > > > > > > This patch is breaking the STM32MP15 basic boot (spl => u-boot). > > > > > > > > > > > > > > Looking at socfpga gen5 u-boot.img, this is probably broken as > > > > > > > well. > > > > > > > > > > > > > > And I don't even see any RB or TB tags here :-( > > > > > > > > > > > > Ugh, what the heck? I applied this because I looked over the > > > > > > changes > > > > > > and they seemed correct. I'm quite willing to just revert this but > > > > > > I > > > > > > would like to know how it's breaking. Sorry all! > > > > > > > > > > > > > > > > IMHO this is due to wrong images creation with mkinage, especially > > > > > when > > > > > passing parameters with -a and -e flags. > > > > > > > > > > In my case I need them to be: > > > > > -a 0x80002000 (load address) => CONFIG_SYS_TEXT_BASE > > > > > -e 0x800023FD (entry point where SPL jumps to) => > > > > > CONFIG_SYS_UBOOT_START > > > > > > > > Well, CONFIG_SYS_UBOOT_START is only set in 15 files in > > > > include/configs, so I > > > > guess a lot more boards might be broken... > > > > > > > > > > > > > > So *maybe* on STM32MP1 and other broken boards -e > > > > > (CONFIG_SYS_UBOOT_START) is not equal to -a (CONFIG_SYS_TEXT_BASE) as > > > > > was assumed before(but wrong). > > > > > > > > > > Indeed CONFIG_SYS_UBOOT_START is set to 0 if not specified in > > > > > u-boot/Makefile: > > > > > ` > > > > > # U-Boot entry point, needed for booting of full-blown U-Boot > > > > > # from the SPL U-Boot version. > > > > > # > > > > > ifndef CONFIG_SYS_UBOOT_START > > > > > CONFIG_SYS_UBOOT_START := 0 > > > > > endif > > > > > ` > > > > > > > > > > So probably broken boards try to jump to absolute 0. > > > > > A solving patch would be: > > > > > ifndef CONFIG_SYS_UBOOT_START > > > > > CONFIG_SYS_UBOOT_START := CONFIG_SYS_TEXT_BASE > > > > > endif > > > > > > > > That might work, but I wonder if this is the correct time in the > > > > release to do > > > > so. > > > > > > Yes, at this point in the cycle the best option is to revert the > > > original commit and for the next release bring it back after applying > > > Patrice's series to fix the bogus default to CONFIG_SYS_UBOOT_START and > > > cleaning up defconfigs. Sorry again for all the troubles! > > > > I just wanted to confirm socfpga_gen5 doesn't boot with this patch > > but it's ok again now you reverted it. > > Now that patches: > https://patchwork.ozlabs.org/patch/1205064/ > https://patchwork.ozlabs.org/patch/1205063/ > > and 2020.01 has been released, can you please commit this patch? > > I've re-submitted also on patchset to Add i.MXRT family since it's needed to > boot Linux: > https://patchwork.ozlabs.org/project/uboot/list/?series=152468 Yes, this is on my list of things to get back to as I clear out parts of my queue, thanks for the reminder. -- Tom signature.asc Description: PGP signature
Re: [PATCH] test/cmd_ut.c: fix cmd_ut_category
On Thu, Jan 09, 2020 at 05:34:02PM +0100, Philippe Reynes wrote:
> In the function cmd_ut_category, the prefix is used with
> the function strncmp to know if the prefix should be
> removed from the test name, even if the prefix is NULL.
>
> To avoid this issue, we consider that a prefix NULL
> mean no prefix. So we only try to remove the prefix
> from the test_name if the prefix is not NULL, then
> we avoid to call the function strncmp with a NULL
> prefix.
>
> Reported-by: Coverity CID 281110
> Fixes: 4ad4edfe ("cmd_ut: add a parameter prefix to the function
> cmd_ut_category")
> Signed-off-by: Philippe Reynes
Applied to u-boot/master, thanks!
--
Tom
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Re: [PATCH 1/1] virtio: fix typo devicd
On Tue, Dec 24, 2019 at 12:21:09PM +0100, Heinrich Schuchardt wrote: > %s/devicd/device > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Bin Meng Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 1/1] arch: arm: Program GIC LPI configuration table
On Mon, Dec 16, 2019 at 09:09:43AM -0800, Vladimir Olovyannikov wrote: > From: Bharat Kumar Reddy Gooty > > Programs the following: > 1. Redistributor PROCBASER configuration table (which > is common for all redistributors) > 2. Redistributor pending table (PENDBASER), for all the > available redistributors. > > Signed-off-by: Bharat Kumar Reddy Gooty > Signed-off-by: Vladimir Olovyannikov Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/3] dtimg/am57xx_evm_defconfig: Rename dtimg to adtimg
On Tue, Dec 24, 2019 at 05:51:06PM +0100, Eugeniu Rosca wrote: > Rename the existing 'dtimg' command to 'adtimg', in order to: > - Suggest the Android origins and scope > - Be consistent with the upcoming 'abootimg' command (naming >suggested by Simon [*]) > > The change in _not_ backward compatible, but its benefits outweigh its > downsides, given that we don't expect active users of 'dtimg' today. > > Perform the rename in several steps: > 1. Rename *.c file and Kconfig symbol. This should allow > 'git log --follow' to properly track the history of 'adtimg.c' > 2. 's/dtimg/adtimg/g' in the internal namespace of 'adtimg.c' > > ELF comparison [**] before and after shows no functional change. > > [*] https://patchwork.ozlabs.org/patch/1182212/#2291600 > [**] diff -u <(objdump -d cmd/dtimg.o) <(objdump -d cmd/adtimg.o) > > Cc: Tom Rini > Signed-off-by: Eugeniu Rosca > Reviewed-by: Simon Glass > Reviewed-by: Sam Protsenko Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/3] cmd: adtimg: Refactor usage style
On Tue, Dec 24, 2019 at 05:51:08PM +0100, Eugeniu Rosca wrote:
> Trying to extend 'adtimg' functionality [1], we've been severely hit
> by a major limitation in the command's usage scheme. Specifically, the
> command's user interface appears to be too centric to getting the
> DTB/DTBO entry [3] based on the index of the desired DT in the image,
> which makes it really difficult retrieving the DT entry based on
> alternative criteria (e.g. filtering by id/rev fields), the
> latter being demanded by real life customer use-cases [1].
>
> This went to the point of receiving below feedback from Sam [2]:
>
> -- snip --
> As for 'dtimg' command: after giving it some thought, I think not much
> people using it yet. So in this particular case I don't have some
> strong preference, and if you think the 'dtimg' interface is ugly, and
> it overcomes "don't break interfaces" rule, maybe now is a good time
> to rework it (before it gets widely used).
> -- snip --
>
> Given the above, rework the usage pattern from [4] to [5], in order to
> allow an intuitive enablement of "by id|rev" DT search [6].
>
> [1] https://patchwork.ozlabs.org/cover/1202575/
> ("cmd: dtimg: Enhance with --id and --rev options (take #1)")
> [2] https://patchwork.ozlabs.org/patch/1182207/#2317020
> [3] https://source.android.com/devices/architecture/dto/partitions
> [4] Old usage
> adtimg dump - Print image contents
> adtimg start- Get DT address by index
> adtimg size - Get DT size by index
>
> [5] New usage
> adtimg addr - Set image location to
> adtimg dump - Print out image contents
> adtimg get dt --index= [avar [svar]] - Get DT address and size by index
>
> [6] Soon-to-be-provided "by id|rev" add-on functionality
> adtimg get dt --id= --rev= [avar [svar [ivar]]]
> - Get DT address/size/index by id|rev fields
>
> Signed-off-by: Eugeniu Rosca
> Reviewed-by: Sam Protsenko
Applied to u-boot/master, thanks!
--
Tom
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Re: [PATCH 2/3] cmd: adtimg: Rename internal symbols
On Tue, Dec 24, 2019 at 05:51:07PM +0100, Eugeniu Rosca wrote: > With 'dtimg.c' renamed to 'adtimg.c', now ensure the naming > consistency in the internal implementation of 'adtimg.c'. > > No functional change intended. > > Signed-off-by: Eugeniu Rosca > Reviewed-by: Sam Protsenko > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] cmd/eeprom.c: prepend 0x to hex numbers in output message format
On Wed, Dec 11, 2019 at 11:18:29AM +, Rasmus Villemoes wrote: > From: "Klaus H. Sorensen" > > If the numbers do not happen to contain any digits from [a-f], it's > not clear that they are base 16. > > Signed-off-by: Klaus H. Sorensen > Signed-off-by: Rasmus Villemoes > Reviewed-by: Lukasz Majewski > Reviewed-by: Heiko Schocher Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH 3/4] arm/km: remove board KMCOGE3UN
On Mon, Nov 25, 2019 at 05:24:15PM +0100, Holger Brunck wrote: > This target is out of maintenance and can be removed. > > Signed-off-by: Holger Brunck > CC: Stefan Roese > CC: Valentin Longchamp > Reviewed-by: Stefan Roese Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH 2/4] km/boards: add MAC address offset as argument to ivm_populate_env
On Mon, Nov 25, 2019 at 05:24:14PM +0100, Holger Brunck wrote: > For upcoming SECU board we have different MAC address offsets depending > on which functional unit we are running. In this case we need to pass > this value to the ivm_populate_env function instead of using the hard > coded config option there. > > Signed-off-by: Holger Brunck > CC: Stefan Roese > CC: Valentin Longchamp > CC: Marek Vasut > Reviewed-by: Stefan Roese Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH v1] gcc-9: silence 'address-of-packed-member' warning
On Fri, Nov 29, 2019 at 07:47:59PM +0200, Andy Shevchenko wrote: > GCC 9.x starts complaining about potential misalignment of the pointer to > the array (in this case alignment=2) in the packed (alignment=1) structures. > > Repeating Linus' Torvalds commit 6f303d60534c in the Linux kernel. > > Original commit message: > > We already did this for clang, but now gcc has that warning too. > Yes, yes, the address may be unaligned. And that's kind of the point. > > This in particular hides the warnings like > > drivers/usb/gadget/composite.c:545:23: warning: taking address of packed > member of ‘struct usb_string_descriptor’ may result in an unaligned pointer > value [-Waddress-of-packed-member] > 545 |collect_langs(sp, s->wData); > > drivers/usb/gadget/composite.c:550:24: warning: taking address of packed > member of ‘struct usb_string_descriptor’ may result in an unaligned pointer > value [-Waddress-of-packed-member] > 550 | collect_langs(sp, s->wData); > > drivers/usb/gadget/composite.c:555:25: warning: taking address of packed > member of ‘struct usb_string_descriptor’ may result in an unaligned pointer > value [-Waddress-of-packed-member] > 555 | collect_langs(sp, s->wData); > > Signed-off-by: Andy Shevchenko Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/1] mkimage: simplify fit_check_params()
On Wed, Dec 11, 2019 at 01:51:38PM +0100, Heinrich Schuchardt wrote: > fit_check_params() wants at least two of dflag, fflag, and lflag set. > > Simplify the logical constraint checking this. > > Signed-off-by: Heinrich Schuchardt Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH 4/4] boards/km_arm: enable support for Macronix SPI NOR flash
On Mon, Nov 25, 2019 at 05:24:16PM +0100, Holger Brunck wrote: > The M25P80 and M25P32 SPI flashes from Numonix/Micron > will be replaced by Marconix MX25L80 and MX25L32 flashes. > > Signed-off-by: Holger Brunck > CC: Stefan Roese > CC: Valentin Longchamp > Reviewed-by: Stefan Roese Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH 9/9] drivers: mcfmii: add dm support
On Fri, Nov 15, 2019 at 11:54:20PM +0100, Angelo Dureghello wrote: > From: Angelo Durgehello > > Add specific dm code, but maintaining this driver as is, so more in the > shape of a mii library. Can be moved to dm in a further step. > > Signed-off-by: Angelo Durgehello Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH 1/4] km/boards: fix typo for MAC address offset config option
On Mon, Nov 25, 2019 at 05:24:13PM +0100, Holger Brunck wrote: > This patch only fixes a typo. > > Signed-off-by: Holger Brunck > CC: Stefan Roese > CC: Valentin Longchamp > Reviewed-by: Stefan Roese Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH] poweroff: add poweroff for mt6323 pmic
On Fri, Nov 22, 2019 at 03:32:24PM +0100, Frank Wunderlich wrote: > this adds poweroff to bananapi r2 / mt7623 / mt6323 pmic > > Signed-off-by: Frank Wunderlich Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH 1/1] arm: cpu: armv8: add support for arm psci reset2.
On Fri, Nov 22, 2019 at 02:50:01PM -0800, Vladimir Olovyannikov wrote: > From: Rajesh Ravi > > Current U-Boot has only support for psci reset. > Adding support for arm psci reset2 allows passing of reset level > and other platform sepcific parameters like strap settings > to lowlevel psci implementation. > > Signed-off-by: Rajesh Ravi > Signed-off-by: Vladimir Olovyannikov Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH 8/9] drivers: fsl_mcdmafec: conversion to dm
On Fri, Nov 15, 2019 at 11:54:19PM +0100, Angelo Dureghello wrote: > From: Angelo Durgehello > > Full conversion to dm for all boards, legacy code removed. > > Signed-off-by: Angelo Durgehello Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH 6/9] drivers: net: add mcf fec dm Kconfig support
On Fri, Nov 15, 2019 at 11:54:17PM +0100, Angelo Dureghello wrote: > From: Angelo Durgehello > > Add ColdFire fec to Kconfig. > > Signed-off-by: Angelo Durgehello Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH 4/9] configs: purge unneeded fec defines
On Fri, Nov 15, 2019 at 11:54:15PM +0100, Angelo Dureghello wrote: > From: Angelo Durgehello > > Remove unneeded fec-related defines after fec moved as dm. > > Signed-off-by: Angelo Durgehello Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH 5/9] m68k: add dm fec support
On Fri, Nov 15, 2019 at 11:54:16PM +0100, Angelo Dureghello wrote: > From: Angelo Durgehello > > Add architecture-related code for dm fec support. > > Signed-off-by: Angelo Durgehello Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH 7/9] drivers: mcffec: conversion to dm
On Fri, Nov 15, 2019 at 11:54:18PM +0100, Angelo Dureghello wrote: > From: Angelo Durgehello > > Full conversion to dm for all boards, legacy code removed. > > Signed-off-by: Angelo Durgehello Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH] spl: fix stack usage check if gd is not initialized
On Mon, Nov 11, 2019 at 10:30:46PM +0100, Simon Goldschmidt wrote:
> Most platforms do not set up gd->start_addr_sp in SPL. Since this is
> required for CONFIG_SPL_SYS_REPORT_SACK_F_USAGE to work correctly, set
> up gd->start_addr_sp in SPL to the value passed to
> board_init_f_init_reserve if it is not set yet.
>
> Fixes: d8c0332031 ("spl: implement stack usage check")
> Signed-off-by: Simon Goldschmidt
Applied to u-boot/master, thanks!
--
Tom
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Re: [U-Boot] [PATCH 3/9] configs: add eth dm support for all ColdFire boards
On Fri, Nov 15, 2019 at 11:54:14PM +0100, Angelo Dureghello wrote: > From: Angelo Durgehello > > Add dm eth config options for all involved ColdFire-based boards. > > Signed-off-by: Angelo Durgehello Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH] m68k: Drop CONFIG_MCFPIT support
On Mon, Nov 11, 2019 at 09:39:11AM -0500, Tom Rini wrote: > All platforms currently use the "MCFTMR" DMA timer rather than the PIT > timer, so drop the MCFPIT code. > > Cc: Huan Wang > Cc: Angelo Dureghello > Cc: TsiChung Liew > Cc: Wolfgang Wegner > Signed-off-by: Tom Rini > Reviewed-by: Angelo Dureghello Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH 1/9] m68k: add fec base node to devicetrees
On Fri, Nov 15, 2019 at 11:54:12PM +0100, Angelo Dureghello wrote: > From: Angelo Durgehello > > Add basic ethernet controller devicetree nodes for all ColdFire > families. > > Signed-off-by: Angelo Durgehello Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH] rtc: add support for DS3232 device
On Tue, Nov 12, 2019 at 08:39:38AM +, Han Nandor wrote: > DS3232 is an i2c RTC with 236 bytes of battery-backed SRAM. > > Add an RTC driver for DS3232 device, which provides time and > date support. Also read and write functions are provided, > which can be used to access the SRAM memory. > > Signed-off-by: Nandor Han Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH] bootcount: add a DM i2c eeprom backing store for bootcount
On Mon, Oct 28, 2019 at 06:44:06PM +, Robert Beckett wrote: > This driver allows the use of i2c eeprom device or partition as backing > store for boot counter values with DM enabled. > > Signed-off-by: Robert Beckett Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] [PATCH] ARM: reset: use do_reset in SPL/TPL if SYSRESET was not enabled for them
On Thu, Nov 28, 2019 at 09:56:47AM +0100, Claudius Heine wrote: > In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available > anywere, even if SYSRESET is disabled for SPL/TPL. > > 'do_reset' is called from SPL for instance from the panic handler and > PANIC_HANG is not set > > Signed-off-by: Claudius Heine > Reviewed-by: Marek Vasut > Reviewed-by: Simon Goldschmidt > --- > arch/arm/lib/Makefile | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile > index 9de9a9acee..7bf2c077ba 100644 > --- a/arch/arm/lib/Makefile > +++ b/arch/arm/lib/Makefile > @@ -56,7 +56,7 @@ obj-y += interrupts_64.o > else > obj-y+= interrupts.o > endif > -ifndef CONFIG_SYSRESET > +ifndef CONFIG_$(SPL_TPL_)SYSRESET > obj-y+= reset.o > endif This needs to be updated and something reworked as it breaks imx8mp_evk imx8mn_ddr4_evk imx8mm_evk platforms that have since been added: board/freescale/imx8mm_evk/built-in.o: In function `do_reset': build/../board/freescale/imx8mm_evk/spl.c:164: multiple definition of `do_reset' and similar failures. -- Tom signature.asc Description: PGP signature
[PATCH] drivers: net: fsl_enetc: fix SXGMII MAC configuration
Separate MAC and serdes configuration, MAC configuration must be applied
at each enetc_start() as FLR clears it.
This restores traffic for ENETC interfaces in USXGMII mode.
Signed-off-by: Alex Marginean
---
drivers/net/fsl_enetc.c | 36 +---
1 file changed, 25 insertions(+), 11 deletions(-)
diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index 02c1ee70d9..a6ed0f3b3c 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -122,16 +122,34 @@ static int enetc_init_rgmii(struct udevice *dev)
return 0;
}
-/* set up MAC and serdes for SXGMII */
-static int enetc_init_sxgmii(struct udevice *dev)
+/* set up MAC configuration for the given interface type */
+static void enetc_setup_mac_iface(struct udevice *dev)
{
struct enetc_priv *priv = dev_get_priv(dev);
u32 if_mode;
- /* set ifmode to (US)XGMII */
- if_mode = enetc_read_port(priv, ENETC_PM_IF_MODE);
- if_mode &= ~ENETC_PM_IF_IFMODE_MASK;
- enetc_write_port(priv, ENETC_PM_IF_MODE, if_mode);
+ switch (priv->if_type) {
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ enetc_init_rgmii(dev);
+ break;
+ case PHY_INTERFACE_MODE_XGMII:
+ case PHY_INTERFACE_MODE_USXGMII:
+ case PHY_INTERFACE_MODE_XFI:
+ /* set ifmode to (US)XGMII */
+ if_mode = enetc_read_port(priv, ENETC_PM_IF_MODE);
+ if_mode &= ~ENETC_PM_IF_IFMODE_MASK;
+ enetc_write_port(priv, ENETC_PM_IF_MODE, if_mode);
+ break;
+ };
+}
+
+/* set up serdes for SXGMII */
+static int enetc_init_sxgmii(struct udevice *dev)
+{
+ struct enetc_priv *priv = dev_get_priv(dev);
if (!enetc_has_imdio(dev))
return 0;
@@ -425,11 +443,7 @@ static int enetc_start(struct udevice *dev)
enetc_setup_tx_bdr(dev);
enetc_setup_rx_bdr(dev);
- if (priv->if_type == PHY_INTERFACE_MODE_RGMII ||
- priv->if_type == PHY_INTERFACE_MODE_RGMII_ID ||
- priv->if_type == PHY_INTERFACE_MODE_RGMII_RXID ||
- priv->if_type == PHY_INTERFACE_MODE_RGMII_TXID)
- enetc_init_rgmii(dev);
+ enetc_setup_mac_iface(dev);
if (priv->phy)
phy_startup(priv->phy);
--
2.17.1
[PATCH 1/1] efi_loader: describe returning of control
Provide a sober description of how control can be returned by a UEFI binary. Signed-off-by: Heinrich Schuchardt --- lib/efi_loader/efi_boottime.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c index fad2bdc400..80daa21347 100644 --- a/lib/efi_loader/efi_boottime.c +++ b/lib/efi_loader/efi_boottime.c @@ -2933,10 +2933,10 @@ efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle, ret = EFI_CALL(image_obj->entry(image_handle, )); /* -* Usually UEFI applications call Exit() instead of returning. -* But because the world doesn't consist of ponies and unicorns, -* we're happy to emulate that behavior on behalf of a payload -* that forgot. +* Control is returned from a started UEFI image either by calling +* Exit() (where exit data can be provided) or by simply returning from +* the entry point. In the latter case call Exit() on behalf of the +* image. */ return EFI_CALL(systab.boottime->exit(image_handle, ret, 0, NULL)); } -- 2.24.1
Re: [PATCH 1/2] dts: add property removal option CONFIG_OF_REMOVE_PROPS
On Sat, Jan 11, 2020 at 04:13:02AM +0900, Masahiro Yamada wrote: > Hi Tom, > > On Sat, Jan 11, 2020 at 1:39 AM Tom Rini wrote: > > > > quiet_cmd_shipped = SHIPPED $@ > > > -cmd_shipped = cat $< > $@ > > > +cmd_shipped = cat $< | $(objtree)/tools/fdtgrep -r -O dtb - -o $@\ > > > + $(addprefix -P ,$(subst $\",,$(CONFIG_OF_REMOVE_PROPS))) > > > > > > $(obj)/%: $(src)/%_shipped > > > $(call cmd,shipped) > > > > On further thinking, this will make it harder in the case of passing the > > DTB directly to the kernel. We should guard this option by something > > else first. > > Please let me ask a question about this. > In my understanding, U-Boot DTB is a different instance > from the DTB passed to the kernel. > Was it changed, or is the change planned? For a long time now I believe we've had some platforms that wanted to be passed, and pass on again, a single DTB. There's also been boards that have wanted to (or have been) passing what we have on. We also have the case of platforms that more constrained and so stripping information out of the DTB for U-Boot, and continuing to load the kernel DTB from somewhere else, is what they need and want. -- Tom signature.asc Description: PGP signature
Re: [PATCH v5] reset: socfpga: Poll for reset status after deassert reset
On 1/10/20 6:48 AM, Ley Foon Tan wrote: > In Cyclone 5 SoC platform, the first USB probing is failed but second > probing is success. DWC2 USB driver read gsnpsid register right after > de-assert reset, but controller is not ready yet and it returns gsnpsid 0. > Polling reset status after de-assert reset to solve the issue. > > Retry with this fix more than 10 times without issue. > > Signed-off-by: Ley Foon Tan Applied, thanks.
[U-Boot] [PATCH v2 6/6] configs: Add configs for J721e High Security EVM
Add new defconfig files for the J721e High Security EVM.
These defconfigs are the same as for the non-secure part, except for:
CONFIG_TI_SECURE_DEVICE option set to 'y'
CONFIG_FIT_IMAGE_POST_PROCESS option set to 'y'
CONFIG_SPL_FIT_IMAGE_POST_PROCESS option set to 'y'
CONFIG_BOOTCOMMAND uses FIT images for booting
Signed-off-by: Andrew F. Davis
Reviewed-by: Lokesh Vutla
---
configs/j721e_hs_evm_a72_defconfig | 116 +
configs/j721e_hs_evm_r5_defconfig | 105 ++
2 files changed, 221 insertions(+)
create mode 100644 configs/j721e_hs_evm_a72_defconfig
create mode 100644 configs/j721e_hs_evm_r5_defconfig
diff --git a/configs/j721e_hs_evm_a72_defconfig
b/configs/j721e_hs_evm_a72_defconfig
new file mode 100644
index 00..23405c2cdd
--- /dev/null
+++ b/configs/j721e_hs_evm_a72_defconfig
@@ -0,0 +1,116 @@
+CONFIG_ARM=y
+CONFIG_ARCH_K3=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SOC_K3_J721E=y
+CONFIG_TARGET_J721E_A72_EVM=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_ENV_SIZE=0x2
+CONFIG_SPL_STACK_R_ADDR=0x8200
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+# CONFIG_PSCI_RESET is not set
+CONFIG_SPL_TEXT_BASE=0x8008
+CONFIG_DISTRO_DEFAULTS=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run
boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit"
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_DM_MAILBOX=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER_DOMAIN=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x28
+CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_REMOTEPROC=y
+CONFIG_CMD_UFS=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_MTDIDS_DEFAULT="nor0=4704.spi.0,nor0=47034000.hyperbus"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),1m(hbmc.sysfw),-@8m(hbmc.rootfs)"
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board"
+CONFIG_SPL_MULTI_DTB_FIT=y
+CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_TI_SCI=y
+CONFIG_DMA_CHANNELS=y
+CONFIG_TI_K3_NAVSS_UDMA=y
+CONFIG_TI_SCI_PROTOCOL=y
+CONFIG_DM_MAILBOX=y
+CONFIG_K3_SEC_PROXY=y
+CONFIG_MISC=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_AM654=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_CFI_FLASH=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_FLASH_CFI_MTD=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_HBMC_AM654=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_TI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_TI_AM65_CPSW_NUSS=y
+CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_GENERIC is not set
+CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_GENERIC is not set
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_TI_SCI_POWER_DOMAIN=y
+CONFIG_REMOTEPROC_TI_K3_DSP=y
+CONFIG_REMOTEPROC_TI_K3_R5F=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_TI_SCI=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_DM_SERIAL=y
+CONFIG_SOC_TI=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_CADENCE_QSPI=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_TI_SCI=y
+CONFIG_UFS=y
+CONFIG_CADENCE_UFS=y
+CONFIG_TI_J721E_UFS=y
+CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/j721e_hs_evm_r5_defconfig
b/configs/j721e_hs_evm_r5_defconfig
new file mode 100644
index 00..dc46d94a42
--- /dev/null
+++ b/configs/j721e_hs_evm_r5_defconfig
@@ -0,0 +1,105 @@
+CONFIG_ARM=y
+CONFIG_ARCH_K3=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x55000
+CONFIG_SOC_K3_J721E=y
+CONFIG_TARGET_J721E_R5_EVM=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_ENV_SIZE=0x2
+CONFIG_SPL_STACK_R_ADDR=0x8200
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0x41c0
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_USE_BOOTCOMMAND=y
+# CONFIG_DISPLAY_CPUINFO
[U-Boot] [PATCH v2 5/6] arm: K3: Increase default SYSFW image size allocation
The memory allocated to store the FIT image containing SYSFW and board configuration data is statically defined to the largest size expected. This was 276000 bytes but now needs to be grown to 277000 to make room for the slightly larger SYSFW image used on J721e High-Security devices. Signed-off-by: Andrew F. Davis Reviewed-by: Lokesh Vutla --- arch/arm/mach-k3/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index 5583241943..2e111bbf27 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -119,7 +119,7 @@ config K3_SYSFW_IMAGE_MMCSD_RAW_MODE_PART config K3_SYSFW_IMAGE_SIZE_MAX int "Amount of memory dynamically allocated for loading SYSFW blob" depends on K3_LOAD_SYSFW - default 276000 + default 277000 help Amount of memory (in bytes) reserved through dynamic allocation at runtime for loading the combined System Firmware and configuration image -- 2.17.1
[U-Boot] [PATCH v2 4/6] arm: K3: Disable ROM configured firewalls
ROM configures certain firewalls based on its usage, which includes
the one in front of boot peripherals. In specific case of boot
peripherals, ROM does not open up the full address space corresponding
to the peripherals. Like in OSPI, ROM only configures the firewall region
for 32 bit address space and mark 64bit address space flash regions
as in-accessible.
When security-cfg is initialized by sysfw, all the non-configured
firewalls are kept in bypass state using a global setting. Since ROM
configured firewalls for certain peripherals, these will not be touched.
So when bootloader touches any of the address space that ROM marked as
in-accessible, system raises a firewall exception causing boot hang.
It would have been ideal if sysfw cleans up the ROM configured boot
peripheral firewalls. Given the memory overhead to store this
information provided by ROM and the boot time increase in re configuring
the firewalls, it is concluded to clean this up in bootloaders.
So disable all the firewalls that ROM doesn't open up the full address
space.
Signed-off-by: Andrew F. Davis
Signed-off-by: Venkateswara Rao Mandela
Signed-off-by: Lokesh Vutla
---
arch/arm/mach-k3/am6_init.c | 26 ++
arch/arm/mach-k3/common.c | 30
arch/arm/mach-k3/common.h | 7 +
arch/arm/mach-k3/j721e_init.c | 52 +++
4 files changed, 115 insertions(+)
diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c
index c5da965bd8..8d107b870b 100644
--- a/arch/arm/mach-k3/am6_init.c
+++ b/arch/arm/mach-k3/am6_init.c
@@ -19,6 +19,26 @@
#include
#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_K3_LOAD_SYSFW
+#ifdef CONFIG_TI_SECURE_DEVICE
+struct fwl_data main_cbass_fwls[] = {
+ { "MMCSD1_CFG", 2057, 1 },
+ { "MMCSD0_CFG", 2058, 1 },
+ { "USB3SS0_SLV0", 2176, 2 },
+ { "PCIE0_SLV", 2336, 8 },
+ { "PCIE1_SLV", 2337, 8 },
+ { "PCIE0_CFG", 2688, 1 },
+ { "PCIE1_CFG", 2689, 1 },
+}, mcu_cbass_fwls[] = {
+ { "MCU_ARMSS0_CORE0_SLV", 1024, 1 },
+ { "MCU_ARMSS0_CORE1_SLV", 1028, 1 },
+ { "MCU_FSS0_S1", 1033, 8 },
+ { "MCU_FSS0_S0", 1036, 8 },
+ { "MCU_CPSW0", 1220, 1 },
+};
+#endif
+#endif
+
static void mmr_unlock(u32 base, u32 partition)
{
/* Translate the base address */
@@ -109,6 +129,12 @@ void board_init_f(ulong dummy)
* output.
*/
k3_sysfw_loader(preloader_console_init);
+
+ /* Disable ROM configured firewalls right after loading sysfw */
+#ifdef CONFIG_TI_SECURE_DEVICE
+ remove_fwl_configs(main_cbass_fwls, ARRAY_SIZE(main_cbass_fwls));
+ remove_fwl_configs(mcu_cbass_fwls, ARRAY_SIZE(mcu_cbass_fwls));
+#endif
#else
/* Prepare console output */
preloader_console_init();
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index 50f5b81dfe..3c1887c0bf 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -269,3 +269,33 @@ void disable_linefill_optimization(void)
asm("mcr p15, 0, %0, c1, c0, 1" : : "r" (actlr));
}
#endif
+
+void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size)
+{
+ struct ti_sci_msg_fwl_region region;
+ struct ti_sci_fwl_ops *fwl_ops;
+ struct ti_sci_handle *ti_sci;
+ size_t i, j;
+
+ ti_sci = get_ti_sci_handle();
+ fwl_ops = _sci->ops.fwl_ops;
+ for (i = 0; i < fwl_data_size; i++) {
+ for (j = 0; j < fwl_data[i].regions; j++) {
+ region.fwl_id = fwl_data[i].fwl_id;
+ region.region = j;
+ region.n_permission_regs = 3;
+
+ fwl_ops->get_fwl_region(ti_sci, );
+
+ if (region.control != 0) {
+ pr_debug("Attempting to disable firewall %5d
(%25s)\n",
+region.fwl_id, fwl_data[i].name);
+ region.control = 0;
+
+ if (fwl_ops->set_fwl_region(ti_sci, ))
+ pr_err("Could not disable firewall %5d
(%25s)\n",
+ region.fwl_id, fwl_data[i].name);
+ }
+ }
+ }
+}
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index 35d1609cdc..d8b34fe060 100644
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -14,6 +14,13 @@
#define REV_PG1_0 0
#define REV_PG2_0 1
+struct fwl_data {
+ const char *name;
+ u16 fwl_id;
+ u16 regions;
+};
+
void setup_k3_mpu_regions(void);
int early_console_init(void);
void disable_linefill_optimization(void);
+void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size);
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index 4758739266..2a4f3e9ed2 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++
[U-Boot] [PATCH v2 3/6] arm: K3: Fix header comment match AM6 specific file function
This file used to be the common location for K3 init when AM6 was the only device, but common code was moved to common.c and this file became AM6 specific, correct this header text. Signed-off-by: Andrew F. Davis Reviewed-by: Lokesh Vutla --- arch/arm/mach-k3/am6_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c index a78ffbb674..c5da965bd8 100644 --- a/arch/arm/mach-k3/am6_init.c +++ b/arch/arm/mach-k3/am6_init.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * K3: Architecture initialization + * AM6: SoC specific initialization * * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/ * Lokesh Vutla -- 2.17.1
[U-Boot] [PATCH v2 2/6] configs: ti: Factor out call to 'args_mmc' into MMC common environment
Both 'loadfit' and 'mmcloados' start with a call to 'args_mmc' so this
can be factored out to before eithers only call site. This also allows us
to remove that call from 'loadfit', which should not have been calling it
anyway as that command should not be MMC specific. Without the call to
'args_mmc' the command 'loadfit' becomes just a call to 'run_fit' so
remove the indirection and call 'run_fit' directly, this removes the need
for 'loadfit' command (which was misnamed anyway). Drop it.
Signed-off-by: Andrew F. Davis
Reviewed-by: Lokesh Vutla
---
include/configs/ti_armv7_common.h | 1 -
include/environment/ti/mmc.h | 5 +++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/configs/ti_armv7_common.h
b/include/configs/ti_armv7_common.h
index adc7861539..a1a053e675 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -61,7 +61,6 @@
"setenv overlaystring ${overlaystring}'#'${overlay};" \
"done;\0" \
"run_fit=bootm ${addr_fit}#${fdtfile}${overlaystring}\0" \
- "loadfit=run args_mmc; run run_fit;\0" \
/*
* DDR information. If the CONFIG_NR_DRAM_BANKS is not defined,
diff --git a/include/environment/ti/mmc.h b/include/environment/ti/mmc.h
index bb4af0a3d5..1c8e49a8b3 100644
--- a/include/environment/ti/mmc.h
+++ b/include/environment/ti/mmc.h
@@ -41,7 +41,7 @@
"fi;" \
"fi;" \
"fi;\0" \
- "mmcloados=run args_mmc; " \
+ "mmcloados=" \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if run loadfdt; then " \
"bootz ${loadaddr} - ${fdtaddr}; " \
@@ -61,8 +61,9 @@
"if mmc rescan; then " \
"echo SD/MMC found on device ${mmcdev};" \
"if run loadimage; then " \
+ "run args_mmc; " \
"if test ${boot_fit} -eq 1; then " \
- "run loadfit; " \
+ "run run_fit; " \
"else " \
"run mmcloados;" \
"fi;" \
--
2.17.1
[U-Boot] [PATCH v2 0/6] J721e HS device support
Hello all, This series brings up High-Security (HS) device support on the J721e platform. Support for this K3 HS device is much like the existing AM65x HS and this series leverages much of that support. There are also a couple tangentially related fixups that I noticed while adding this support and testing. Although not strictly needed they do allow J721e HS to just work out-of-box by the time the last patch adds the defconfigs. Thanks, Andrew Changes from v1: - Rebase on master and re-sync defconfigs Andrew F. Davis (6): configs: j721e_evm.h: Sync J721e environment configuration with AM65x configs: ti: Factor out call to 'args_mmc' into MMC common environment arm: K3: Fix header comment match AM6 specific file function arm: K3: Disable ROM configured firewalls arm: K3: Increase default SYSFW image size allocation configs: Add configs for J721e High Security EVM arch/arm/mach-k3/Kconfig | 2 +- arch/arm/mach-k3/am6_init.c| 28 ++- arch/arm/mach-k3/common.c | 30 arch/arm/mach-k3/common.h | 7 ++ arch/arm/mach-k3/j721e_init.c | 52 + configs/j721e_hs_evm_a72_defconfig | 116 + configs/j721e_hs_evm_r5_defconfig | 105 ++ include/configs/j721e_evm.h| 16 +++- include/configs/ti_armv7_common.h | 1 - include/environment/ti/mmc.h | 5 +- 10 files changed, 354 insertions(+), 8 deletions(-) create mode 100644 configs/j721e_hs_evm_a72_defconfig create mode 100644 configs/j721e_hs_evm_r5_defconfig -- 2.17.1
[U-Boot] [PATCH v2 1/6] configs: j721e_evm.h: Sync J721e environment configuration with AM65x
Some of the environment configuration in AM65x is not available in
J721e due to additions on one but not the other. These two platforms
are similar enough these common definitions should be factored out
to a common area, prepare for this by synchronizing them.
Signed-off-by: Andrew F. Davis
Reviewed-by: Lokesh Vutla
---
include/configs/j721e_evm.h | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index 84518786c7..17bab4ef3e 100644
--- a/include/configs/j721e_evm.h
+++ b/include/configs/j721e_evm.h
@@ -58,10 +58,16 @@
/* HyperFlash related configuration */
#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
+#define PARTS_DEFAULT \
+ /* Linux partitions */ \
+ "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
+
/* U-Boot general configuration */
#define EXTRA_ENV_J721E_BOARD_SETTINGS \
"default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
- "findfdt=setenv fdtfile ${default_device_tree}\0" \
+ "findfdt=" \
+ "setenv name_fdt ${default_device_tree};" \
+ "setenv fdtfile ${name_fdt}\0" \
"loadaddr=0x8008\0" \
"fdtaddr=0x8200\0" \
"overlayaddr=0x8300\0" \
@@ -78,7 +84,7 @@
"bootdir=/boot\0" \
"rd_spec=-\0" \
"init_mmc=run args_all args_mmc\0" \
- "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
+ "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
"get_overlay_mmc=" \
"fdt address ${fdtaddr};" \
"fdt resize 0x10;" \
@@ -88,7 +94,10 @@
"fdt apply ${overlayaddr};" \
"done;\0" \
"get_kern_mmc=load mmc ${bootpart} ${loadaddr} "\
- "${bootdir}/${name_kern}\0"
+ "${bootdir}/${name_kern}\0" \
+ "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \
+ "${bootdir}/${name_fit}\0" \
+ "partitions=" PARTS_DEFAULT
#ifdef DEFAULT_RPROCS
#undef DEFAULT_RPROCS
@@ -103,6 +112,7 @@
/* Incorporate settings into the U-Boot environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_MMC_TI_ARGS \
+ DEFAULT_FIT_TI_ARGS \
EXTRA_ENV_J721E_BOARD_SETTINGS \
EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \
EXTRA_ENV_RPROC_SETTINGS\
--
2.17.1
Re: [U-Boot] [PATCH 0/6] J721e HS device support
On 1/10/20 1:38 PM, Andrew F. Davis wrote: > Hi Tom, > > Looks like -next wasn't used for this, ping on getting this into master now? > Looks like a minor merge conflict now in master for this, I'll post a v2 to help with that. Andrew > Thanks, > Andrew > > On 12/16/19 3:50 PM, Andrew F. Davis wrote: >> Hi Tom, >> >> I see you have a -next again, if you don't want to take this for the >> v2020.01 perhaps this could be a good candidate for the next? >> >> Andrew >> >> On 11/20/19 10:59 PM, Lokesh Vutla wrote: >>> >>> >>> On 20/11/19 11:10 PM, Andrew F. Davis wrote: Hello all, This series brings up High-Security (HS) device support on the J721e platform. Support for this K3 HS device is much like the existing AM65x HS and this series leverages much of that support. There are also a couple tangentially related fixups that I noticed while adding this support and testing. Although not strictly needed they do allow J721e HS to just work out-of-box by the time the last patch adds the defconfigs. >>> >>> For the entire series: >>> >>> Reviewed-by: Lokesh Vutla >>> >>> Thank and regards, >>> Lokesh >>> Thanks, Andrew Andrew F. Davis (6): configs: j721e_evm.h: Sync J721e environment configuration with AM65x configs: ti: Factor out call to 'args_mmc' into MMC common environment arm: K3: Fix header comment match AM6 specific file function arm: K3: Disable ROM configured firewalls arm: K3: Increase default SYSFW image size allocation configs: Add configs for J721e High Security EVM arch/arm/mach-k3/Kconfig | 2 +- arch/arm/mach-k3/am6_init.c| 28 +++- arch/arm/mach-k3/common.c | 30 arch/arm/mach-k3/common.h | 7 ++ arch/arm/mach-k3/j721e_init.c | 52 ++ configs/j721e_hs_evm_a72_defconfig | 106 + configs/j721e_hs_evm_r5_defconfig | 102 +++ include/configs/j721e_evm.h| 16 - include/configs/ti_armv7_common.h | 1 - include/environment/ti/mmc.h | 5 +- 10 files changed, 341 insertions(+), 8 deletions(-) create mode 100644 configs/j721e_hs_evm_a72_defconfig create mode 100644 configs/j721e_hs_evm_r5_defconfig
Re: [PATCH 1/2] dts: add property removal option CONFIG_OF_REMOVE_PROPS
Hi Tom, On Sat, Jan 11, 2020 at 1:39 AM Tom Rini wrote: > > quiet_cmd_shipped = SHIPPED $@ > > -cmd_shipped = cat $< > $@ > > +cmd_shipped = cat $< | $(objtree)/tools/fdtgrep -r -O dtb - -o $@\ > > + $(addprefix -P ,$(subst $\",,$(CONFIG_OF_REMOVE_PROPS))) > > > > $(obj)/%: $(src)/%_shipped > > $(call cmd,shipped) > > On further thinking, this will make it harder in the case of passing the > DTB directly to the kernel. We should guard this option by something > else first. Please let me ask a question about this. In my understanding, U-Boot DTB is a different instance from the DTB passed to the kernel. Was it changed, or is the change planned? -- Best Regards Masahiro Yamada
Re: [U-Boot] [PATCH 0/6] J721e HS device support
Hi Tom, Looks like -next wasn't used for this, ping on getting this into master now? Thanks, Andrew On 12/16/19 3:50 PM, Andrew F. Davis wrote: > Hi Tom, > > I see you have a -next again, if you don't want to take this for the > v2020.01 perhaps this could be a good candidate for the next? > > Andrew > > On 11/20/19 10:59 PM, Lokesh Vutla wrote: >> >> >> On 20/11/19 11:10 PM, Andrew F. Davis wrote: >>> Hello all, >>> >>> This series brings up High-Security (HS) device support on the J721e >>> platform. Support for this K3 HS device is much like the existing >>> AM65x HS and this series leverages much of that support. >>> >>> There are also a couple tangentially related fixups that I noticed while >>> adding this support and testing. Although not strictly needed they >>> do allow J721e HS to just work out-of-box by the time the last patch >>> adds the defconfigs. >> >> For the entire series: >> >> Reviewed-by: Lokesh Vutla >> >> Thank and regards, >> Lokesh >> >>> >>> Thanks, >>> Andrew >>> >>> Andrew F. Davis (6): >>> configs: j721e_evm.h: Sync J721e environment configuration with AM65x >>> configs: ti: Factor out call to 'args_mmc' into MMC common environment >>> arm: K3: Fix header comment match AM6 specific file function >>> arm: K3: Disable ROM configured firewalls >>> arm: K3: Increase default SYSFW image size allocation >>> configs: Add configs for J721e High Security EVM >>> >>> arch/arm/mach-k3/Kconfig | 2 +- >>> arch/arm/mach-k3/am6_init.c| 28 +++- >>> arch/arm/mach-k3/common.c | 30 >>> arch/arm/mach-k3/common.h | 7 ++ >>> arch/arm/mach-k3/j721e_init.c | 52 ++ >>> configs/j721e_hs_evm_a72_defconfig | 106 + >>> configs/j721e_hs_evm_r5_defconfig | 102 +++ >>> include/configs/j721e_evm.h| 16 - >>> include/configs/ti_armv7_common.h | 1 - >>> include/environment/ti/mmc.h | 5 +- >>> 10 files changed, 341 insertions(+), 8 deletions(-) >>> create mode 100644 configs/j721e_hs_evm_a72_defconfig >>> create mode 100644 configs/j721e_hs_evm_r5_defconfig >>>
Re: regression with sunxi: psci: avoid error address-of-packed-member
On 1/10/20 4:30 PM, Nuno Gonçalves wrote: After [1] on a Orange Pi Zero I hang on Starting kernel. While this commit changed the order of clamp_set fixing it did not solve the problem for me. Do you mean that both with and without the patch your system does not start? Best regards Heinrich It appears that the problem is simply that a memcpy to sunxi_prcm_reg.cpu_pwroff does not have the same behaviour as writing a single bit. Thanks, Nuno [1] https://github.com/u-boot/u-boot/commit/9bd34a69a453d409792e08c00953ce8862145e65
[PATCH 1/1] efi_driver: debug output efi_uc_start, efi_uc_stop
Use the correct printf codes for the debug output in efi_uc_start() and
efi_uc_stop().
Signed-off-by: Heinrich Schuchardt
---
lib/efi_driver/efi_uclass.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/efi_driver/efi_uclass.c b/lib/efi_driver/efi_uclass.c
index 40269b00dc..25b27ece6d 100644
--- a/lib/efi_driver/efi_uclass.c
+++ b/lib/efi_driver/efi_uclass.c
@@ -112,7 +112,7 @@ static efi_status_t EFIAPI efi_uc_start(
struct efi_driver_binding_extended_protocol *bp =
(struct efi_driver_binding_extended_protocol *)this;
- EFI_ENTRY("%p, %pUl, %ls", this, controller_handle,
+ EFI_ENTRY("%p, %p, %ls", this, controller_handle,
efi_dp_str(remaining_device_path));
/* Attach driver to controller */
@@ -200,7 +200,7 @@ static efi_status_t EFIAPI efi_uc_stop(
struct efi_driver_binding_extended_protocol *bp =
(struct efi_driver_binding_extended_protocol *)this;
- EFI_ENTRY("%p, %pUl, %zu, %p", this, controller_handle,
+ EFI_ENTRY("%p, %p, %zu, %p", this, controller_handle,
number_of_children, child_handle_buffer);
/* Destroy provided child controllers */
--
2.20.1
[PATCH v2] cli: Make the sandbox board_run_command the default
If CONFIG_CMDLINE=n, common/cli.c calls board_run_command. This fails to
link on most architectures. However, the sandbox architecture has an
implementation which we can use.
Signed-off-by: Sean Anderson
---
Changes for v2:
- Sent without any word wrap afaik
- Rebased onto v2020.01
arch/sandbox/cpu/start.c | 7 ---
common/cli.c | 7 +++
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
index fff9cbdd79..5b7d54869d 100644
--- a/arch/sandbox/cpu/start.c
+++ b/arch/sandbox/cpu/start.c
@@ -319,13 +319,6 @@ static int sandbox_cmdline_cb_show_of_platdata(struct
sandbox_state *state,
}
SANDBOX_CMDLINE_OPT(show_of_platdata, 0, "Show of-platdata in SPL");
-int board_run_command(const char *cmdline)
-{
- printf("## Commands are disabled. Please enable CONFIG_CMDLINE.\n");
-
- return 1;
-}
-
static void setup_ram_buf(struct sandbox_state *state)
{
/* Zero the RAM buffer if we didn't read it, to keep valgrind happy */
diff --git a/common/cli.c b/common/cli.c
index 67ceb635a6..59551ef40b 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -70,6 +70,13 @@ int run_command_repeatable(const char *cmd, int flag)
return 0;
#endif
}
+#else
+__weak int board_run_command(const char *cmdline)
+{
+ printf("## Commands are disabled. Please enable CONFIG_CMDLINE.\n");
+
+ return 1;
+}
#endif /* CONFIG_CMDLINE */
int run_command_list(const char *cmd, int len, int flag)
--
2.24.1
Re: [PATCH] Make the sandbox board_run_command the default
> Somehow this patch is showing as corrupted. Did you create it with patman? I created it with git format-patch. Perhaps it got mangled by my email client.
Re: [PATCH 1/2] dts: add property removal option CONFIG_OF_REMOVE_PROPS
On Sat, Jan 11, 2020 at 1:39 AM Tom Rini wrote: > > On Wed, Jan 08, 2020 at 10:38:32PM +0100, Anatolij Gustschin wrote: > > > This can be used for device tree size reduction similar as > > CONFIG_OF_SPL_REMOVE_PROPS option. For tbs2910 board this > > shrinks the image size: all -2304.0 bss -16.0 text -2288.0 > > > > Signed-off-by: Anatolij Gustschin > > --- > > dts/Kconfig | 8 > > scripts/Makefile.lib | 3 ++- > > 2 files changed, 10 insertions(+), 1 deletion(-) > > > > diff --git a/dts/Kconfig b/dts/Kconfig > > index 64c98dd723..49224bee93 100644 > > --- a/dts/Kconfig > > +++ b/dts/Kconfig > > @@ -311,6 +311,14 @@ config OF_SPL_REMOVE_PROPS > > can be discarded. This option defines the list of properties to > > discard. > > > > +config OF_REMOVE_PROPS > > + string "List of device tree properties to drop" > > + depends on OF_CONTROL > > + default "interrupt-parent interrupts" if PINCTRL > > + help > > + Some properties are not used by U-Boot and can be discarded. > > + This option defines the list of properties to discard. > > + > > config SPL_OF_PLATDATA > > bool "Generate platform data for use in SPL" > > depends on SPL_OF_CONTROL > > diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib > > index 4ea898a421..3b124369ad 100644 > > --- a/scripts/Makefile.lib > > +++ b/scripts/Makefile.lib > > @@ -235,7 +235,8 @@ $(obj)/%.tab.h: $(src)/%.y FORCE > > # > > === > > > > quiet_cmd_shipped = SHIPPED $@ > > -cmd_shipped = cat $< > $@ > > +cmd_shipped = cat $< | $(objtree)/tools/fdtgrep -r -O dtb - -o $@\ > > + $(addprefix -P ,$(subst $\",,$(CONFIG_OF_REMOVE_PROPS))) > > > > $(obj)/%: $(src)/%_shipped > > $(call cmd,shipped) > > On further thinking, this will make it harder in the case of passing the > DTB directly to the kernel. We should guard this option by something > else first. > > -- > Tom More importantly, this patch breaks targets that compile pylibfdt, for example, qemu-x86_defconfig. $ make qemu-x86_defconfig HOSTCC scripts/basic/fixdep HOSTCC scripts/kconfig/conf.o YACCscripts/kconfig/zconf.tab.c LEX scripts/kconfig/zconf.lex.c HOSTCC scripts/kconfig/zconf.tab.o HOSTLD scripts/kconfig/conf # # configuration written to .config # masahiro@grover:~/ref/u-boot$ make scripts/kconfig/conf --syncconfig Kconfig CHK include/config.h UPD include/config.h CFG u-boot.cfg GEN include/autoconf.mk GEN include/autoconf.mk.dep CHK include/config/uboot.release UPD include/config/uboot.release CHK include/generated/version_autogenerated.h UPD include/generated/version_autogenerated.h CHK include/generated/timestamp_autogenerated.h UPD include/generated/timestamp_autogenerated.h CC lib/asm-offsets.s CHK include/generated/generic-asm-offsets.h UPD include/generated/generic-asm-offsets.h CC arch/x86/lib/asm-offsets.s CHK include/generated/asm-offsets.h UPD include/generated/asm-offsets.h SHIPPED scripts/dtc/pylibfdt/libfdt.i /bin/sh: 1: ./tools/fdtgrep: not found make[3]: *** [scripts/Makefile.lib:242: scripts/dtc/pylibfdt/libfdt.i] Error 127 make[2]: *** [scripts/Makefile.build:432: scripts/dtc/pylibfdt] Error 2 make[1]: *** [scripts/Makefile.build:432: scripts/dtc] Error 2 make: *** [Makefile:551: scripts] Error 2 Please do not touch cmd_shipped. If this feature is desired, please implement it in dts/Makefile. -- Best Regards Masahiro Yamada
Re: [PATCH 1/2] dts: add property removal option CONFIG_OF_REMOVE_PROPS
On Wed, Jan 08, 2020 at 10:38:32PM +0100, Anatolij Gustschin wrote: > This can be used for device tree size reduction similar as > CONFIG_OF_SPL_REMOVE_PROPS option. For tbs2910 board this > shrinks the image size: all -2304.0 bss -16.0 text -2288.0 > > Signed-off-by: Anatolij Gustschin > --- > dts/Kconfig | 8 > scripts/Makefile.lib | 3 ++- > 2 files changed, 10 insertions(+), 1 deletion(-) > > diff --git a/dts/Kconfig b/dts/Kconfig > index 64c98dd723..49224bee93 100644 > --- a/dts/Kconfig > +++ b/dts/Kconfig > @@ -311,6 +311,14 @@ config OF_SPL_REMOVE_PROPS > can be discarded. This option defines the list of properties to > discard. > > +config OF_REMOVE_PROPS > + string "List of device tree properties to drop" > + depends on OF_CONTROL > + default "interrupt-parent interrupts" if PINCTRL > + help > + Some properties are not used by U-Boot and can be discarded. > + This option defines the list of properties to discard. > + > config SPL_OF_PLATDATA > bool "Generate platform data for use in SPL" > depends on SPL_OF_CONTROL > diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib > index 4ea898a421..3b124369ad 100644 > --- a/scripts/Makefile.lib > +++ b/scripts/Makefile.lib > @@ -235,7 +235,8 @@ $(obj)/%.tab.h: $(src)/%.y FORCE > # === > > quiet_cmd_shipped = SHIPPED $@ > -cmd_shipped = cat $< > $@ > +cmd_shipped = cat $< | $(objtree)/tools/fdtgrep -r -O dtb - -o $@\ > + $(addprefix -P ,$(subst $\",,$(CONFIG_OF_REMOVE_PROPS))) > > $(obj)/%: $(src)/%_shipped > $(call cmd,shipped) On further thinking, this will make it harder in the case of passing the DTB directly to the kernel. We should guard this option by something else first. -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/8] arm64: dts: Remove inconsistent use of 'arm, armv8' compatible string
On Thu, Jan 9, 2020 at 11:19 PM Michal Simek wrote:
>
> From: Rob Herring
>
> The 'arm,armv8' compatible string is only for software models. It adds
> little value otherwise and is inconsistently used as a fallback on some
> platforms. Remove it from those platforms.
>
> This fixes warnings generated by the DT schema.
>
> Reported-by: Michal Simek
> Cc: Mark Rutland
> Cc: Will Deacon
> Acked-by: Antoine Tenart
> Acked-by: Nishanth Menon
> Acked-by: Maxime Ripard
> Acked-by: Manivannan Sadhasivam
> Acked-by: Chanho Min
> Acked-by: Krzysztof Kozlowski
> Acked-by: Masahiro Yamada
> Acked-by: Gregory CLEMENT
> Acked-by: Thierry Reding
> Acked-by: Heiko Stuebner
> Acked-by: Simon Horman
> Acked-by: Tero Kristo
> Acked-by: Wei Xu
> Acked-by: Liviu Dudau
> Acked-by: Matthias Brugger
> Acked-by: Michal Simek
> Acked-by: Scott Branden
> Acked-by: Kevin Hilman
> Acked-by: Chunyan Zhang
> Acked-by: Robert Richter
> Acked-by: Jisheng Zhang
> Acked-by: Dinh Nguyen
I know you are importing this commit from Linux,
but these Ack lines look weird to me...
> Signed-off-by: Rob Herring
> Signed-off-by: Arnd Bergmann
> Signed-off-by: Michal Simek
> ---
>
> arch/arm/dts/zynqmp.dtsi | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
> index b453941baf05..8646c4c3a340 100644
> --- a/arch/arm/dts/zynqmp.dtsi
> +++ b/arch/arm/dts/zynqmp.dtsi
> @@ -25,7 +25,7 @@
> #size-cells = <0>;
>
> cpu0: cpu@0 {
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> device_type = "cpu";
> enable-method = "psci";
> operating-points-v2 = <_opp_table>;
> @@ -34,7 +34,7 @@
> };
>
> cpu1: cpu@1 {
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> device_type = "cpu";
> enable-method = "psci";
> reg = <0x1>;
> @@ -43,7 +43,7 @@
> };
>
> cpu2: cpu@2 {
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> device_type = "cpu";
> enable-method = "psci";
> reg = <0x2>;
> @@ -52,7 +52,7 @@
> };
>
> cpu3: cpu@3 {
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> device_type = "cpu";
> enable-method = "psci";
> reg = <0x3>;
> --
> 2.24.0
>
--
Best Regards
Masahiro Yamada
Re: [PATCH v3 1/9] image: android: Add functions for handling dtb field
Hi Simon,
On Wed, Jan 8, 2020 at 7:39 PM Simon Glass wrote:
>
> Hi Sam,
>
> On Tue, 24 Dec 2019 at 12:55, Sam Protsenko
> wrote:
> >
> > Android Boot Image v2 adds "DTB" payload (and corresponding field in the
> > image header). Provide functions for its handling:
> >
> > - android_image_get_dtb_by_index(): Obtain DTB blob from "DTB" part of
> > boot image, by blob's index
> > - android_image_print_dtb_contents(): Iterate over all DTB blobs in
> > "DTB" part of boot image and print those blobs info
> >
> > "DTB" payload might be in one of the following formats:
> > 1. concatenated DTB blobs
> > 2. Android DTBO format
> >
> > The latter requires "android-image-dt.c" functionality, so this commit
> > selects that file for building for CONFIG_ANDROID_BOOT_IMAGE option.
> >
> > Right now this new functionality isn't used, but it can be used further.
> > As it's required to apply some specific dtbo blob(s) from "dtbo"
> > partition, we can't automate this process inside of "bootm" command. But
> > we can do next:
> > - come up with some new command like "abootimg" to extract dtb blob
> > from boot image (using functions from this patch)
> > - extract desired dtbo blobs from "dtbo" partition using "adtimg"
> > command
> > - merge dtbo blobs into dtb blob using "fdt apply" command
> > - pass resulting dtb blob into bootm command in order to boot the
> > Android kernel with Android ramdisk from boot image
> >
> > Signed-off-by: Sam Protsenko
> > ---
> > common/Makefile| 2 +-
> > common/image-android.c | 214 +
> > include/image.h| 5 +
> > 3 files changed, 220 insertions(+), 1 deletion(-)
> >
> > diff --git a/common/Makefile b/common/Makefile
> > index 029cc0f2ce..1ffddc2f94 100644
> > --- a/common/Makefile
> > +++ b/common/Makefile
> > @@ -108,7 +108,7 @@ endif
> >
> > obj-y += image.o
> > obj-$(CONFIG_ANDROID_AB) += android_ab.o
> > -obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o
> > +obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o image-android-dt.o
> > obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
> > obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
> > obj-$(CONFIG_$(SPL_)MULTI_DTB_FIT) += boot_fit.o common_fit.o
> > diff --git a/common/image-android.c b/common/image-android.c
> > index 3564a64221..1ccad6c556 100644
> > --- a/common/image-android.c
> > +++ b/common/image-android.c
> > @@ -6,10 +6,12 @@
> > #include
> > #include
> > #include
> > +#include
>
> Prefer underscores if possible.
>
It's existing header file, related to another feature. So it can be
renamed in some separate patch outside of this patch series. Btw, is
there any background on why we should stick to underscore in file
names?
> > #include
> > #include
> > #include
> > #include
> > +#include
> >
> > #define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR 0x10008000
> >
> > @@ -195,6 +197,121 @@ int android_image_get_second(const struct
> > andr_img_hdr *hdr,
> > return 0;
> > }
> >
> > +/**
> > + * android_image_get_dtb_img_addr() - Get the address of DTB area in boot
> > image.
> > + * @hdr_addr: Boot image header address
> > + * @addr: Will contain the address of DTB area in boot image
> > + *
> > + * Return: true on success or false on fail.
> > + */
> > +static bool android_image_get_dtb_img_addr(ulong hdr_addr, ulong *addr)
> > +{
> > + const struct andr_img_hdr *hdr;
> > + ulong dtb_img_addr;
> > + bool res = true;
>
> Perhaps this isn't universal but at least with DM we use 'ret' for
> return code instead of 'res' for result.
>
I think it's just a matter of taste. Not a major one, right?
> > +
> > + hdr = map_sysmem(hdr_addr, sizeof(*hdr));
> > + if (android_image_check_header(hdr)) {
> > + printf("Error: Boot Image header is incorrect\n");
> > + res = false;
>
> Could this function return an error code?
>
Frankly, don't see much value in error code in this particular case.
All we can do to handle any error in this function further is just to
print corresponding error message, which I do in this function already
(sticking to principle to print error messages where we actually know
what happened). So I'd stick to just bool, if you don't mind, to not
over-complicate this without actual reason.
> > + goto exit;
> > + }
> > +
> > + if (hdr->header_version < 2) {
> > + printf("Error: header_version must be >= 2 to get dtb\n");
> > + res = false;
> > + goto exit;
> > + }
> > +
> > + if (hdr->dtb_size == 0) {
>
> if (!hdr...)
>
Actually I really wanted to emphasize here that we test if size is 0,
so I'd keep that as is, if you don't mind.
> > + printf("Error: dtb_size is 0\n");
> > + res = false;
> > + goto exit;
> > + }
> > +
> > + /* Calculate the address of DTB area in boot image */
> > +
Re: [U-Boot] [PATCH] spl: fix entry_point equal to load_addr
Hi All, On 12/7/19 10:28 PM, Simon Goldschmidt wrote: Hi Tom, On Fri, Dec 6, 2019 at 3:55 PM Tom Rini wrote: On Fri, Dec 06, 2019 at 03:05:55PM +0100, Simon Goldschmidt wrote: On Fri, Dec 6, 2019 at 2:49 PM Giulio Benetti wrote: Hello Tom, all, On 12/6/19 2:34 PM, Tom Rini wrote: On Fri, Dec 06, 2019 at 01:58:46PM +0100, Simon Goldschmidt wrote: On Fri, Dec 6, 2019 at 1:46 PM Patrice CHOTARD wrote: Hi This patch is breaking the STM32MP15 basic boot (spl => u-boot). Looking at socfpga gen5 u-boot.img, this is probably broken as well. And I don't even see any RB or TB tags here :-( Ugh, what the heck? I applied this because I looked over the changes and they seemed correct. I'm quite willing to just revert this but I would like to know how it's breaking. Sorry all! IMHO this is due to wrong images creation with mkinage, especially when passing parameters with -a and -e flags. In my case I need them to be: -a 0x80002000 (load address) => CONFIG_SYS_TEXT_BASE -e 0x800023FD (entry point where SPL jumps to) => CONFIG_SYS_UBOOT_START Well, CONFIG_SYS_UBOOT_START is only set in 15 files in include/configs, so I guess a lot more boards might be broken... So *maybe* on STM32MP1 and other broken boards -e (CONFIG_SYS_UBOOT_START) is not equal to -a (CONFIG_SYS_TEXT_BASE) as was assumed before(but wrong). Indeed CONFIG_SYS_UBOOT_START is set to 0 if not specified in u-boot/Makefile: ` # U-Boot entry point, needed for booting of full-blown U-Boot # from the SPL U-Boot version. # ifndef CONFIG_SYS_UBOOT_START CONFIG_SYS_UBOOT_START := 0 endif ` So probably broken boards try to jump to absolute 0. A solving patch would be: ifndef CONFIG_SYS_UBOOT_START CONFIG_SYS_UBOOT_START := CONFIG_SYS_TEXT_BASE endif That might work, but I wonder if this is the correct time in the release to do so. Yes, at this point in the cycle the best option is to revert the original commit and for the next release bring it back after applying Patrice's series to fix the bogus default to CONFIG_SYS_UBOOT_START and cleaning up defconfigs. Sorry again for all the troubles! I just wanted to confirm socfpga_gen5 doesn't boot with this patch but it's ok again now you reverted it. Now that patches: https://patchwork.ozlabs.org/patch/1205064/ https://patchwork.ozlabs.org/patch/1205063/ and 2020.01 has been released, can you please commit this patch? I've re-submitted also on patchset to Add i.MXRT family since it's needed to boot Linux: https://patchwork.ozlabs.org/project/uboot/list/?series=152468 Kind regards -- Giulio Benetti Benetti Engineering sas
[PATCH v2 19/21] mmc: fsl_esdhc: add compatible for fsl, imxrt-usdhc
Add compatible "fsl,imxrt-usdhc" to make mmc working on i.MXRT platforms
with CONFIG_DM_MMC=y.
Signed-off-by: Giulio Benetti
---
drivers/mmc/Kconfig | 2 +-
drivers/mmc/fsl_esdhc_imx.c | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 85fd1906bd..2bc19dd56b 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -732,7 +732,7 @@ config FSL_ESDHC_IMX
config FSL_USDHC
bool "Freescale/NXP i.MX uSDHC controller support"
- depends on MX6 || MX7 ||ARCH_MX7ULP || IMX8 || IMX8M ||
TARGET_S32V234EVB
+ depends on MX6 || MX7 ||ARCH_MX7ULP || IMX8 || IMX8M || IMXRT ||
TARGET_S32V234EVB
select FSL_ESDHC_IMX
help
This enables the Ultra Secured Digital Host Controller enhancements
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index e015eb9661..551233dd2a 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -78,7 +78,7 @@ struct fsl_esdhc {
uintvendorspec;
uintmmcboot;
uintvendorspec2;
- uinttuning_ctrl;/* on i.MX6/7/8 */
+ uinttuning_ctrl;/* on i.MX6/7/8/RT */
charreserved5[44];
uinthostver;/* Host controller version register */
charreserved6[4]; /* reserved */
@@ -1652,6 +1652,7 @@ static const struct udevice_id fsl_esdhc_ids[] = {
{ .compatible = "fsl,imx8mm-usdhc", .data = (ulong)_imx8qm_data,},
{ .compatible = "fsl,imx8mn-usdhc", .data = (ulong)_imx8qm_data,},
{ .compatible = "fsl,imx8mq-usdhc", .data = (ulong)_imx8qm_data,},
+ { .compatible = "fsl,imxrt-usdhc", },
{ .compatible = "fsl,esdhc", },
{ /* sentinel */ }
};
--
2.20.1
[PATCH v2 18/21] mmc: fsl_esdhc: make if(CONFIG_IS_ENABLED(CLK)) an #if statement
Not all architectures(i.e. i.MXRT) support mxc_get_clock() and use DM_CLK
instead. So building could result in failure due to missing
mxc_get_clock().
Make if(CONFIG_IS_ENABLED(CLK)) an #if statement.
Signed-off-by: Giulio Benetti
---
drivers/mmc/fsl_esdhc_imx.c | 38 ++---
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index f7b754bd9d..e015eb9661 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -1515,27 +1515,27 @@ static int fsl_esdhc_probe(struct udevice *dev)
init_clk_usdhc(dev->seq);
- if (CONFIG_IS_ENABLED(CLK)) {
- /* Assigned clock already set clock */
- ret = clk_get_by_name(dev, "per", >per_clk);
- if (ret) {
- printf("Failed to get per_clk\n");
- return ret;
- }
- ret = clk_enable(>per_clk);
- if (ret) {
- printf("Failed to enable per_clk\n");
- return ret;
- }
+#if CONFIG_IS_ENABLED(CLK)
+ /* Assigned clock already set clock */
+ ret = clk_get_by_name(dev, "per", >per_clk);
+ if (ret) {
+ printf("Failed to get per_clk\n");
+ return ret;
+ }
+ ret = clk_enable(>per_clk);
+ if (ret) {
+ printf("Failed to enable per_clk\n");
+ return ret;
+ }
- priv->sdhc_clk = clk_get_rate(>per_clk);
- } else {
- priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev->seq);
- if (priv->sdhc_clk <= 0) {
- dev_err(dev, "Unable to get clk for %s\n", dev->name);
- return -EINVAL;
- }
+ priv->sdhc_clk = clk_get_rate(>per_clk);
+#else
+ priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev->seq);
+ if (priv->sdhc_clk <= 0) {
+ dev_err(dev, "Unable to get clk for %s\n", dev->name);
+ return -EINVAL;
}
+#endif
ret = fsl_esdhc_init(priv, plat);
if (ret) {
--
2.20.1
[PATCH v2 20/21] imx: Add basic support for the NXP IMXRT10xx SoC family
Add i.IMXRT family basic support.
Signed-off-by: Giulio Benetti
---
V1->V2:
* introduced CONFIG_IMXRT
---
arch/arm/Kconfig| 10 ++
arch/arm/Makefile | 4 +--
arch/arm/include/asm/arch-imxrt/clock.h | 10 ++
arch/arm/include/asm/arch-imxrt/gpio.h | 19 +++
arch/arm/include/asm/arch-imxrt/imx-regs.h | 20
arch/arm/include/asm/arch-imxrt/imxrt.h | 11 +++
arch/arm/include/asm/arch-imxrt/sys_proto.h | 11 +++
arch/arm/mach-imx/Makefile | 3 +-
arch/arm/mach-imx/imxrt/Kconfig | 13
arch/arm/mach-imx/imxrt/Makefile| 7 +
arch/arm/mach-imx/imxrt/soc.c | 35 +
11 files changed, 140 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/include/asm/arch-imxrt/clock.h
create mode 100644 arch/arm/include/asm/arch-imxrt/gpio.h
create mode 100644 arch/arm/include/asm/arch-imxrt/imx-regs.h
create mode 100644 arch/arm/include/asm/arch-imxrt/imxrt.h
create mode 100644 arch/arm/include/asm/arch-imxrt/sys_proto.h
create mode 100644 arch/arm/mach-imx/imxrt/Kconfig
create mode 100644 arch/arm/mach-imx/imxrt/Makefile
create mode 100644 arch/arm/mach-imx/imxrt/soc.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 76365ef313..4c7d04400a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -797,6 +797,14 @@ config ARCH_IMX8M
select SUPPORT_SPL
imply CMD_DM
+config ARCH_IMXRT
+ bool "NXP i.MXRT platform"
+ select CPU_V7M
+ select DM
+ select DM_SERIAL
+ select SUPPORT_SPL
+ imply CMD_DM
+
config ARCH_MX23
bool "NXP i.MX23 family"
select CPU_ARM926EJS
@@ -1722,6 +1730,8 @@ source "arch/arm/mach-imx/imx8/Kconfig"
source "arch/arm/mach-imx/imx8m/Kconfig"
+source "arch/arm/mach-imx/imxrt/Kconfig"
+
source "arch/arm/mach-imx/mxs/Kconfig"
source "arch/arm/mach-omap2/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 856f2d8608..1e60a9fdd4 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -104,11 +104,11 @@ libs-y += arch/arm/cpu/
libs-y += arch/arm/lib/
ifeq ($(CONFIG_SPL_BUILD),y)
-ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx5
mx6 mx7 mx35 imx8m imx8))
+ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx5
mx6 mx7 mx35 imx8m imx8 imxrt))
libs-y += arch/arm/mach-imx/
endif
else
-ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx7ulp mx31 mx35 mxs imx8m imx8
vf610))
+ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx7ulp mx31 mx35 mxs imx8m imx8
imxrt vf610))
libs-y += arch/arm/mach-imx/
endif
endif
diff --git a/arch/arm/include/asm/arch-imxrt/clock.h
b/arch/arm/include/asm/arch-imxrt/clock.h
new file mode 100644
index 00..7409028b9a
--- /dev/null
+++ b/arch/arm/include/asm/arch-imxrt/clock.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti
+ */
+
+#ifndef __ASM_ARCH_CLOCK_H
+#define __ASM_ARCH_CLOCK_H
+
+#endif /* __ASM_ARCH_CLOCK_H */
diff --git a/arch/arm/include/asm/arch-imxrt/gpio.h
b/arch/arm/include/asm/arch-imxrt/gpio.h
new file mode 100644
index 00..da31a7438a
--- /dev/null
+++ b/arch/arm/include/asm/arch-imxrt/gpio.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti
+ */
+
+#ifndef __ASM_ARCH_GPIO_H__
+#define __ASM_ARCH_GPIO_H__
+
+#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+/* GPIO registers */
+struct gpio_regs {
+ u32 gpio_dr;/* data */
+ u32 gpio_dir; /* direction */
+ u32 gpio_psr; /* pad satus */
+};
+#endif
+
+#endif /* __ASM_ARCH_GPIO_H__ */
diff --git a/arch/arm/include/asm/arch-imxrt/imx-regs.h
b/arch/arm/include/asm/arch-imxrt/imx-regs.h
new file mode 100644
index 00..4f1d439f6f
--- /dev/null
+++ b/arch/arm/include/asm/arch-imxrt/imx-regs.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright(C) 2019
+ * Author(s): Giulio Benetti
+ */
+
+#ifndef __ASM_ARCH_IMX_REGS_H__
+#define __ASM_ARCH_IMX_REGS_H__
+
+#define ARCH_MXC
+
+#define GPIO1_BASE_ADDR0x401B8000
+#define GPIO2_BASE_ADDR0x401BC000
+#define GPIO3_BASE_ADDR0x401C
+#define GPIO4_BASE_ADDR0x401C4000
+#define GPIO5_BASE_ADDR0x400C
+
+#define ANATOP_BASE_ADDR 0x400d8000
+
+#endif /* __ASM_ARCH_IMX_REGS_H__ */
diff --git a/arch/arm/include/asm/arch-imxrt/imxrt.h
b/arch/arm/include/asm/arch-imxrt/imxrt.h
new file mode 100644
index 00..1cb2c57d31
--- /dev/null
+++ b/arch/arm/include/asm/arch-imxrt/imxrt.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti
+ */
+
+#ifndef _ASM_ARCH_IMXRT_H
+#define _ASM_ARCH_IMXRT_H
+
+#endif /* _ASM_ARCH_IMXRT_H */
+
diff --git
[PATCH v2 17/21] ram: add SDRAM driver for i.MXRT SoCs
Add SDRAM driver for i.MXRT SoCs.
Signed-off-by: Giulio Benetti
---
drivers/ram/Kconfig | 8 +
drivers/ram/Makefile | 2 +
drivers/ram/imxrt_sdram.c| 439 +++
include/dt-bindings/memory/imxrt-sdram.h | 100 ++
4 files changed, 549 insertions(+)
create mode 100644 drivers/ram/imxrt_sdram.c
create mode 100644 include/dt-bindings/memory/imxrt-sdram.h
diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index b454ceb599..56fea7c94c 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -65,5 +65,13 @@ config K3_J721E_DDRSS
Enabling this config adds support for the DDR memory controller
on J721E family of SoCs.
+config IMXRT_SDRAM
+ bool "Enable i.MXRT SDRAM support"
+ depends on RAM
+ help
+ i.MXRT family devices support smart external memory controller(SEMC)
+ to support external memories like sdram, psram & nand.
+ This driver is for the sdram memory interface with the SEMC.
+
source "drivers/ram/rockchip/Kconfig"
source "drivers/ram/stm32mp1/Kconfig"
diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile
index 4b77969b39..5c897410c6 100644
--- a/drivers/ram/Makefile
+++ b/drivers/ram/Makefile
@@ -15,3 +15,5 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
obj-$(CONFIG_K3_AM654_DDRSS) += k3-am654-ddrss.o
obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
obj-$(CONFIG_K3_J721E_DDRSS) += k3-j721e/
+
+obj-$(CONFIG_IMXRT_SDRAM) += imxrt_sdram.o
diff --git a/drivers/ram/imxrt_sdram.c b/drivers/ram/imxrt_sdram.c
new file mode 100644
index 00..af7400be82
--- /dev/null
+++ b/drivers/ram/imxrt_sdram.c
@@ -0,0 +1,439 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+/* SDRAM Command Code */
+#define SD_CC_ARD 0x0 /* Master Bus (AXI) command - Read */
+#define SD_CC_AWR 0x1 /* Master Bus (AXI) command - Write */
+#define SD_CC_IRD 0x8 /* IP command - Read */
+#define SD_CC_IWR 0x9 /* IP command - Write */
+#define SD_CC_IMS 0xA /* IP command - Set Mode Register */
+#define SD_CC_IACT 0xB /* IP command - ACTIVE */
+#define SD_CC_IAF 0xC /* IP command - Auto Refresh */
+#define SD_CC_ISF 0xD /* IP Command - Self Refresh */
+#define SD_CC_IPRE 0xE /* IP command - Precharge */
+#define SD_CC_IPREA0xF /* IP command - Precharge ALL */
+
+#define SEMC_MCR_MDIS BIT(1)
+#define SEMC_MCR_DQSMD BIT(2)
+
+#define SEMC_INTR_IPCMDERR BIT(1)
+#define SEMC_INTR_IPCMDDONEBIT(0)
+
+#define SEMC_IPCMD_KEY 0xA55A
+
+struct imxrt_semc_regs {
+ /* 0x0 */
+ u32 mcr;
+ u32 iocr;
+ u32 bmcr0;
+ u32 bmcr1;
+ u32 br[9];
+
+ /* 0x34 */
+ u32 res1;
+ u32 inten;
+ u32 intr;
+ /* 0x40 */
+ u32 sdramcr0;
+ u32 sdramcr1;
+ u32 sdramcr2;
+ u32 sdramcr3;
+ /* 0x50 */
+ u32 nandcr0;
+ u32 nandcr1;
+ u32 nandcr2;
+ u32 nandcr3;
+ /* 0x60 */
+ u32 norcr0;
+ u32 norcr1;
+ u32 norcr2;
+ u32 norcr3;
+ /* 0x70 */
+ u32 sramcr0;
+ u32 sramcr1;
+ u32 sramcr2;
+ u32 sramcr3;
+ /* 0x80 */
+ u32 dbicr0;
+ u32 dbicr1;
+ u32 res2[2];
+ /* 0x90 */
+ u32 ipcr0;
+ u32 ipcr1;
+ u32 ipcr2;
+ u32 ipcmd;
+ /* 0xA0 */
+ u32 iptxdat;
+ u32 res3[3];
+ /* 0xB0 */
+ u32 iprxdat;
+ u32 res4[3];
+ /* 0xC0 */
+ u32 sts[16];
+};
+
+#define SEMC_IOCR_MUX_A8_SHIFT 0
+#define SEMC_IOCR_MUX_CSX0_SHIFT 3
+#define SEMC_IOCR_MUX_CSX1_SHIFT 6
+#define SEMC_IOCR_MUX_CSX2_SHIFT 9
+#define SEMC_IOCR_MUX_CSX3_SHIFT 12
+#define SEMC_IOCR_MUX_RDY_SHIFT15
+
+struct imxrt_sdram_mux {
+ u8 a8;
+ u8 csx0;
+ u8 csx1;
+ u8 csx2;
+ u8 csx3;
+ u8 rdy;
+};
+
+#define SEMC_SDRAMCR0_PS_SHIFT 0
+#define SEMC_SDRAMCR0_BL_SHIFT 4
+#define SEMC_SDRAMCR0_COL_SHIFT8
+#define SEMC_SDRAMCR0_CL_SHIFT 10
+
+struct imxrt_sdram_control {
+ u8 memory_width;
+ u8 burst_len;
+ u8 no_columns;
+ u8 cas_latency;
+};
+
+#define SEMC_SDRAMCR1_PRE2ACT_SHIFT0
+#define SEMC_SDRAMCR1_ACT2RW_SHIFT 4
+#define SEMC_SDRAMCR1_RFRC_SHIFT 8
+#define SEMC_SDRAMCR1_WRC_SHIFT13
+#define SEMC_SDRAMCR1_CKEOFF_SHIFT 16
+#define SEMC_SDRAMCR1_ACT2PRE_SHIFT20
+
+#define SEMC_SDRAMCR2_SRRC_SHIFT 0
+#define SEMC_SDRAMCR2_REF2REF_SHIFT8
+#define SEMC_SDRAMCR2_ACT2ACT_SHIFT16
+#define SEMC_SDRAMCR2_ITO_SHIFT24
+
+#define SEMC_SDRAMCR3_REN BIT(0)
+#define
[PATCH v2 21/21] imx: imxrt1050-evk: Add support for the NXP i.MXRT1050-EVK
This commit adds board support for i.MXRT1050-EVK from NXP. This board
is an evaluation kit provided by NXP for i.MXRT105x processor family.
More information about this board can be found here:
https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK
The initial supported/tested devices include:
- Debug serial
- SD
Signed-off-by: Giulio Benetti
---
V1->V2:
* introduced CONFIG_IMXRT1050
* added imxrt1050-evk-u-boot.dtsi for imxrt1050-evk.dts
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/imxrt1050-evk-u-boot.dtsi| 44
arch/arm/dts/imxrt1050-evk.dts| 200 ++
arch/arm/mach-imx/imxrt/Kconfig | 12 ++
board/freescale/imxrt1050-evk/Kconfig | 22 ++
board/freescale/imxrt1050-evk/MAINTAINERS | 6 +
board/freescale/imxrt1050-evk/Makefile| 6 +
board/freescale/imxrt1050-evk/README | 31 +++
board/freescale/imxrt1050-evk/imximage.cfg| 36
board/freescale/imxrt1050-evk/imxrt1050-evk.c | 81 +++
configs/imxrt1050-evk_defconfig | 69 ++
include/configs/imxrt1050-evk.h | 46
12 files changed, 555 insertions(+)
create mode 100644 arch/arm/dts/imxrt1050-evk-u-boot.dtsi
create mode 100644 arch/arm/dts/imxrt1050-evk.dts
create mode 100644 board/freescale/imxrt1050-evk/Kconfig
create mode 100644 board/freescale/imxrt1050-evk/MAINTAINERS
create mode 100644 board/freescale/imxrt1050-evk/Makefile
create mode 100644 board/freescale/imxrt1050-evk/README
create mode 100644 board/freescale/imxrt1050-evk/imximage.cfg
create mode 100644 board/freescale/imxrt1050-evk/imxrt1050-evk.c
create mode 100644 configs/imxrt1050-evk_defconfig
create mode 100644 include/configs/imxrt1050-evk.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 983e235f44..0864460751 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -707,6 +707,8 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-evk.dtb \
imx8mp-evk.dtb
+dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb
+
dtb-$(CONFIG_RCAR_GEN2) += \
r8a7790-lager-u-boot.dtb \
r8a7790-stout-u-boot.dtb \
diff --git a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi
b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi
new file mode 100644
index 00..fb4f7f6f9d
--- /dev/null
+++ b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti
+ */
+
+/ {
+ chosen {
+ u-boot,dm-spl;
+ };
+};
+
+ { /* console */
+ u-boot,dm-spl;
+};
+
+ {
+ bank1: bank@0 {
+ u-boot,dm-spl;
+ };
+};
+
+ {
+ u-boot,dm-spl;
+
+ imxrt1050-evk {
+ u-boot,dm-spl;
+ pinctrl_lpuart1: lpuart1grp {
+ u-boot,dm-spl;
+ };
+
+ pinctrl_semc: semcgrp {
+ u-boot,dm-spl;
+ };
+
+ pinctrl_usdhc0: usdhc0grp {
+ u-boot,dm-spl;
+ };
+ };
+};
+
+ {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imxrt1050-evk.dts b/arch/arm/dts/imxrt1050-evk.dts
new file mode 100644
index 00..56b75986e2
--- /dev/null
+++ b/arch/arm/dts/imxrt1050-evk.dts
@@ -0,0 +1,200 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti
+ */
+
+/dts-v1/;
+#include "imxrt1050.dtsi"
+#include "imxrt1050-evk-u-boot.dtsi"
+#include
+
+/ {
+ model = "NXP IMXRT1050-evk board";
+ compatible = "fsl,imxrt1050-evk", "fsl,imxrt1050";
+
+ chosen {
+ bootargs = "root=/dev/ram";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0x8000 0x200>;
+ };
+};
+
+ { /* console */
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart1>;
+ status = "okay";
+};
+
+ {
+ /*
+* Memory configuration from sdram datasheet IS42S16160J-6BLI
+*/
+ fsl,sdram-mux = /bits/ 8 ;
+ fsl,sdram-control = /bits/ 8 ;
+ fsl,sdram-timing = /bits/ 8 <0x2
+0x2
+0x9
+0x1
+0x5
+0x6
+
+0x20
+0x09
+0x01
+0x00
+
+0x04
+0x0A
+0x21
+0x50>;
+
+ bank1: bank@0 {
+ fsl,base-address = <0x8000>;
+ fsl,memory-size = ;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 =
[PATCH v2 16/21] serial_lpuart: add support for i.MXRT
Add i.MXRT compatible string and cpu type support to lpuart driver,
to use little endian 32 bits configurations.
Also according to RM, the Receive RX FIFO Enable (RXFE) field in LPUART
FIFO register is bit 3, so this definition should change to 0x08 as done
for i.MX8. It needs also to set baudrate the same way as i.MX8 does.
Signed-off-by: Giulio Benetti
---
drivers/serial/serial_lpuart.c | 15 +++
include/fsl_lpuart.h | 3 ++-
2 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index b2ec56172e..ccb3ce6701 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -49,7 +49,7 @@
#define FIFO_RXSIZE_MASK 0x7
#define FIFO_RXSIZE_OFF0
#define FIFO_TXFE 0x80
-#ifdef CONFIG_ARCH_IMX8
+#if defined(CONFIG_ARCH_IMX8) || defined(CONFIG_ARCH_IMXRT)
#define FIFO_RXFE 0x08
#else
#define FIFO_RXFE 0x40
@@ -67,7 +67,8 @@ enum lpuart_devtype {
DEV_VF610 = 1,
DEV_LS1021A,
DEV_MX7ULP,
- DEV_IMX8
+ DEV_IMX8,
+ DEV_IMXRT,
};
struct lpuart_serial_platdata {
@@ -409,7 +410,8 @@ static int _lpuart32_serial_init(struct udevice *dev)
lpuart_write32(plat->flags, >match, 0);
- if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8) {
+ if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8 ||
+ plat->devtype == DEV_IMXRT) {
_lpuart32_serial_setbrg_7ulp(dev, gd->baudrate);
} else {
/* provide data bits, parity, stop bit, etc */
@@ -426,7 +428,8 @@ static int lpuart_serial_setbrg(struct udevice *dev, int
baudrate)
struct lpuart_serial_platdata *plat = dev_get_platdata(dev);
if (is_lpuart32(dev)) {
- if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8)
+ if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8 ||
+ plat->devtype == DEV_IMXRT)
_lpuart32_serial_setbrg_7ulp(dev, baudrate);
else
_lpuart32_serial_setbrg(dev, baudrate);
@@ -530,6 +533,8 @@ static int lpuart_serial_ofdata_to_platdata(struct udevice
*dev)
plat->devtype = DEV_VF610;
else if (!fdt_node_check_compatible(blob, node, "fsl,imx8qm-lpuart"))
plat->devtype = DEV_IMX8;
+ else if (!fdt_node_check_compatible(blob, node, "fsl,imxrt-lpuart"))
+ plat->devtype = DEV_IMXRT;
return 0;
}
@@ -549,6 +554,8 @@ static const struct udevice_id lpuart_serial_ids[] = {
{ .compatible = "fsl,vf610-lpuart"},
{ .compatible = "fsl,imx8qm-lpuart",
.data = LPUART_FLAG_REGMAP_32BIT_REG },
+ { .compatible = "fsl,imxrt-lpuart",
+ .data = LPUART_FLAG_REGMAP_32BIT_REG },
{ }
};
diff --git a/include/fsl_lpuart.h b/include/fsl_lpuart.h
index fc517d4b7f..511fb84367 100644
--- a/include/fsl_lpuart.h
+++ b/include/fsl_lpuart.h
@@ -4,7 +4,8 @@
*
*/
-#if defined(CONFIG_ARCH_MX7ULP) || defined(CONFIG_ARCH_IMX8)
+#if defined(CONFIG_ARCH_MX7ULP) || defined(CONFIG_ARCH_IMX8) || \
+ defined(CONFIG_ARCH_IMXRT)
struct lpuart_fsl_reg32 {
u32 verid;
u32 param;
--
2.20.1
[PATCH v2 15/21] serial_lpuart: add clock enable if CONFIG_CLK is defined
This driver assumes that lpuart clock is already enabled before probing
but using DM only lpuart won't be automatically enabled so add
clk_enable() when probing if CONFIG_CLK is defined. If clock is not
found, because DM is not used, let's emit a warning and proceed, because
serial clock could also be already enabled by non DM code. If clock is
found but cna't be enabled then return with error.
Signed-off-by: Giulio Benetti
---
V1->V2:
* moved error as warning if clk not found
---
drivers/serial/serial_lpuart.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index 4b0a964d1b..b2ec56172e 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -483,6 +483,22 @@ static int lpuart_serial_pending(struct udevice *dev, bool
input)
static int lpuart_serial_probe(struct udevice *dev)
{
+#if CONFIG_IS_ENABLED(CLK)
+ struct clk per_clk;
+ int ret;
+
+ ret = clk_get_by_name(dev, "per", _clk);
+ if (!ret) {
+ ret = clk_enable(_clk);
+ if (ret) {
+ dev_err(dev, "Failed to get per clk: %d\n", ret);
+ return ret;
+ }
+ } else {
+ dev_warn(dev, "Failed to get per clk: %d\n", ret);
+ }
+#endif
+
if (is_lpuart32(dev))
return _lpuart32_serial_init(dev);
else
--
2.20.1
[PATCH v2 10/21] clk: imx: pfd: add set_rate()
Implement set_rate() for pfd.
Signed-off-by: Giulio Benetti
Reviewed-by: Lukasz Majewski
---
drivers/clk/imx/clk-pfd.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/clk/imx/clk-pfd.c b/drivers/clk/imx/clk-pfd.c
index 188b2b3b90..4ae55f5a07 100644
--- a/drivers/clk/imx/clk-pfd.c
+++ b/drivers/clk/imx/clk-pfd.c
@@ -52,8 +52,30 @@ static unsigned long clk_pfd_recalc_rate(struct clk *clk)
return tmp;
}
+static unsigned long clk_pfd_set_rate(struct clk *clk, unsigned long rate)
+{
+ struct clk_pfd *pfd = to_clk_pfd(clk);
+ unsigned long parent_rate = clk_get_parent_rate(clk);
+ u64 tmp = parent_rate;
+ u8 frac;
+
+ tmp = tmp * 18 + rate / 2;
+ do_div(tmp, rate);
+ frac = tmp;
+ if (frac < 12)
+ frac = 12;
+ else if (frac > 35)
+ frac = 35;
+
+ writel(0x3f << (pfd->idx * 8), pfd->reg + CLR);
+ writel(frac << (pfd->idx * 8), pfd->reg + SET);
+
+ return 0;
+}
+
static const struct clk_ops clk_pfd_ops = {
.get_rate = clk_pfd_recalc_rate,
+ .set_rate = clk_pfd_set_rate,
};
struct clk *imx_clk_pfd(const char *name, const char *parent_name,
--
2.20.1
[PATCH v2 13/21] gpio: mxc_gpio: add support for i.MXRT1050
Add i.MXRT1050 support, there are 5 GPIO banks.
Signed-off-by: Giulio Benetti
---
V1->V2:
* introduced this patch
---
drivers/gpio/mxc_gpio.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index 6592d141d3..c924e52f07 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -41,14 +41,15 @@ static unsigned long gpio_ports[] = {
#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX51) || \
defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
defined(CONFIG_MX7) || defined(CONFIG_IMX8M) || \
- defined(CONFIG_ARCH_IMX8)
+ defined(CONFIG_ARCH_IMX8) || defined(CONFIG_IMXRT1050)
[3] = GPIO4_BASE_ADDR,
#endif
#if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
defined(CONFIG_MX7) || defined(CONFIG_IMX8M) || \
- defined(CONFIG_ARCH_IMX8)
+ defined(CONFIG_ARCH_IMX8) || defined(CONFIG_IMXRT1050)
[4] = GPIO5_BASE_ADDR,
-#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || defined(CONFIG_IMX8M))
+#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
+ defined(CONFIG_IMX8M) || defined(CONFIG_IMXRT1050))
[5] = GPIO6_BASE_ADDR,
#endif
#endif
--
2.20.1
[PATCH v2 14/21] ARM: dts: imxrt1050: add dtsi file
Add dtsi file for i.MXRT1050.
Signed-off-by: Giulio Benetti
---
arch/arm/dts/imxrt1050.dtsi | 146 +++
include/dt-bindings/pinctrl/pins-imxrt1050.h | 993 +++
2 files changed, 1139 insertions(+)
create mode 100644 arch/arm/dts/imxrt1050.dtsi
create mode 100644 include/dt-bindings/pinctrl/pins-imxrt1050.h
diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi
new file mode 100644
index 00..b1d98e6feb
--- /dev/null
+++ b/arch/arm/dts/imxrt1050.dtsi
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti
+ */
+
+#include "skeleton.dtsi"
+#include "armv7-m.dtsi"
+#include
+#include
+#include
+#include
+
+/ {
+ aliases {
+ gpio0 =
+ gpio1 =
+ gpio2 =
+ gpio3 =
+ gpio4 =
+ mmc0 =
+ serial0 =
+ };
+
+ clocks {
+ u-boot,dm-spl;
+
+ osc {
+ u-boot,dm-spl;
+ compatible = "fsl,imx-osc", "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2400>;
+ };
+ };
+
+ soc {
+ u-boot,dm-spl;
+
+ semc: semc@402f {
+ u-boot,dm-spl;
+ compatible = "fsl,imxrt-semc";
+ reg = <0x402f 0x4000>;
+ clocks = < IMXRT1050_CLK_SEMC>;
+ pinctrl-0 = <_semc>;
+ pinctrl-names = "default";
+ status = "okay";
+ };
+
+ lpuart1: serial@40184000 {
+ compatible = "fsl,imxrt-lpuart";
+ reg = <0x40184000 0x4000>;
+ interrupts = ;
+ clocks = < IMXRT1050_CLK_LPUART1>;
+ clock-names = "per";
+ status = "disabled";
+ };
+
+ iomuxc: iomuxc@401f8000 {
+ compatible = "fsl,imxrt-iomuxc";
+ reg = <0x401f8000 0x4000>;
+ fsl,mux_mask = <0x7>;
+ };
+
+ clks: ccm@400fc000 {
+ u-boot,dm-spl;
+ compatible = "fsl,imxrt1050-ccm";
+ reg = <0x400fc000 0x4000>;
+ interrupts = ,
+;
+ #clock-cells = <1>;
+ };
+
+ usdhc1: usdhc@402c {
+ u-boot,dm-spl;
+ compatible = "fsl,imxrt-usdhc";
+ reg = <0x402c 0x1>;
+ interrupts = ;
+ clocks = < IMXRT1050_CLK_USDHC1>;
+ clock-names = "per";
+ bus-width = <4>;
+ fsl,tuning-start-tap = <20>;
+ fsl,tuning-step= <2>;
+ status = "disabled";
+ };
+
+ gpio1: gpio@401b8000 {
+ u-boot,dm-spl;
+ compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+ reg = <0x401b8000 0x4000>;
+ interrupts = ,
+;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio2: gpio@401bc000 {
+ u-boot,dm-spl;
+ compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+ reg = <0x401bc000 0x4000>;
+ interrupts = ,
+ ;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio3: gpio@401c {
+ u-boot,dm-spl;
+ compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+ reg = <0x401c 0x4000>;
+ interrupts = ,
+ ;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio4: gpio@401c4000 {
+ u-boot,dm-spl;
+ compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+ reg = <0x401c4000 0x4000>;
+ interrupts = ,
+ ;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+
[PATCH v2 11/21] clk: imx: add i.IMXRT1050 clk driver
Add i.MXRT1050 clk driver support.
Signed-off-by: Giulio Benetti
---
drivers/clk/imx/Kconfig | 16 ++
drivers/clk/imx/Makefile| 2 +
drivers/clk/imx/clk-imxrt1050.c | 292
include/dt-bindings/clock/imxrt1050-clock.h | 65 +
4 files changed, 375 insertions(+)
create mode 100644 drivers/clk/imx/clk-imxrt1050.c
create mode 100644 include/dt-bindings/clock/imxrt1050-clock.h
diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig
index 2f149ff6f8..059bc2fbb9 100644
--- a/drivers/clk/imx/Kconfig
+++ b/drivers/clk/imx/Kconfig
@@ -68,3 +68,19 @@ config CLK_IMX8MP
select CLK_CCF
help
This enables support clock driver for i.MX8MP platforms.
+
+config SPL_CLK_IMXRT1050
+ bool "SPL clock support for i.MXRT1050"
+ depends on ARCH_IMXRT && SPL
+ select SPL_CLK
+ select SPL_CLK_CCF
+ help
+ This enables SPL DM/DTS support for clock driver in i.MXRT1050
+
+config CLK_IMXRT1050
+ bool "Clock support for i.MXRT1050"
+ depends on ARCH_IMXRT
+ select CLK
+ select CLK_CCF
+ help
+ This enables support clock driver for i.MXRT1050 platforms.
diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
index 255a87b18e..1e8a49d0f3 100644
--- a/drivers/clk/imx/Makefile
+++ b/drivers/clk/imx/Makefile
@@ -16,3 +16,5 @@ obj-$(CONFIG_$(SPL_TPL_)CLK_IMX8MN) += clk-imx8mn.o
clk-pll14xx.o \
clk-composite-8m.o
obj-$(CONFIG_$(SPL_TPL_)CLK_IMX8MP) += clk-imx8mp.o clk-pll14xx.o \
clk-composite-8m.o
+
+obj-$(CONFIG_$(SPL_TPL_)CLK_IMXRT1050) += clk-imxrt1050.o
diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
new file mode 100644
index 00..44ca52c013
--- /dev/null
+++ b/drivers/clk/imx/clk-imxrt1050.c
@@ -0,0 +1,292 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright(C) 2019
+ * Author(s): Giulio Benetti
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "clk.h"
+
+static ulong imxrt1050_clk_get_rate(struct clk *clk)
+{
+ struct clk *c;
+ int ret;
+
+ debug("%s(#%lu)\n", __func__, clk->id);
+
+ ret = clk_get_by_id(clk->id, );
+ if (ret)
+ return ret;
+
+ return clk_get_rate(c);
+}
+
+static ulong imxrt1050_clk_set_rate(struct clk *clk, ulong rate)
+{
+ struct clk *c;
+ int ret;
+
+ debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
+
+ ret = clk_get_by_id(clk->id, );
+ if (ret)
+ return ret;
+
+ return clk_set_rate(c, rate);
+}
+
+static int __imxrt1050_clk_enable(struct clk *clk, bool enable)
+{
+ struct clk *c;
+ int ret;
+
+ debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
+
+ ret = clk_get_by_id(clk->id, );
+ if (ret)
+ return ret;
+
+ if (enable)
+ ret = clk_enable(c);
+ else
+ ret = clk_disable(c);
+
+ return ret;
+}
+
+static int imxrt1050_clk_disable(struct clk *clk)
+{
+ return __imxrt1050_clk_enable(clk, 0);
+}
+
+static int imxrt1050_clk_enable(struct clk *clk)
+{
+ return __imxrt1050_clk_enable(clk, 1);
+}
+
+static struct clk_ops imxrt1050_clk_ops = {
+ .set_rate = imxrt1050_clk_set_rate,
+ .get_rate = imxrt1050_clk_get_rate,
+ .enable = imxrt1050_clk_enable,
+ .disable = imxrt1050_clk_disable,
+};
+
+static const char * const pll_ref_sels[] = {"osc", "dummy", };
+static const char * const pll1_bypass_sels[] = {"pll1_arm",
"pll1_arm_ref_sel", };
+static const char * const pll2_bypass_sels[] = {"pll2_sys",
"pll2_sys_ref_sel", };
+static const char * const pll3_bypass_sels[] = {"pll3_usb_otg",
"pll3_usb_otg_ref_sel", };
+static const char * const pll5_bypass_sels[] = {"pll5_video",
"pll5_video_ref_sel", };
+
+static const char *const pre_periph_sels[] = { "pll2_sys", "pll2_pfd2_396m",
"pll2_pfd0_352m", "arm_podf", };
+static const char *const periph_sels[] = { "pre_periph_sel", "todo", };
+static const char *const usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m",
};
+static const char *const lpuart_sels[] = { "pll3_80m", "osc", };
+static const char *const semc_alt_sels[] = { "pll2_pfd2_396m",
"pll3_pfd1_664_62m", };
+static const char *const semc_sels[] = { "periph_sel", "semc_alt_sel", };
+static const char *const lcdif_sels[] = { "pll2_sys", "pll3_pfd3_454_74m",
"pll5_video:", "pll2_pfd0_352m", "pll2_pfd1_594m", "pll3_pfd1_664_62m"};
+
+static int imxrt1050_clk_probe(struct udevice *dev)
+{
+ void *base;
+
+ /* Anatop clocks */
+ base = (void *)ANATOP_BASE_ADDR;
+
+ clk_dm(IMXRT1050_CLK_PLL1_REF_SEL,
+ imx_clk_mux("pll1_arm_ref_sel", base + 0x0, 14, 2,
+ pll_ref_sels, ARRAY_SIZE(pll_ref_sels)));
+ clk_dm(IMXRT1050_CLK_PLL2_REF_SEL,
+
[PATCH v2 12/21] pinctrl: add i.MXRT driver
Add i.MXRT pinctrl driver.
Signed-off-by: Giulio Benetti
---
drivers/pinctrl/nxp/Kconfig | 14 ++
drivers/pinctrl/nxp/Makefile| 1 +
drivers/pinctrl/nxp/pinctrl-imxrt.c | 40 +
3 files changed, 55 insertions(+)
create mode 100644 drivers/pinctrl/nxp/pinctrl-imxrt.c
diff --git a/drivers/pinctrl/nxp/Kconfig b/drivers/pinctrl/nxp/Kconfig
index f2e67ca231..ec55351e61 100644
--- a/drivers/pinctrl/nxp/Kconfig
+++ b/drivers/pinctrl/nxp/Kconfig
@@ -99,6 +99,20 @@ config PINCTRL_MXS
familiy, e.g. i.MX28. This feature depends on device tree
configuration.
+config PINCTRL_IMXRT
+ bool "IMXRT pinctrl driver"
+ depends on ARCH_IMXRT && PINCTRL_FULL
+ select DEVRES
+ select PINCTRL_IMX
+ help
+ Say Y here to enable the imxrt pinctrl driver
+
+ This provides a simple pinctrl driver for i.MXRT SoC familiy.
+ This feature depends on device tree configuration. This driver
+ is different from the linux one, this is a simple implementation,
+ only parses the 'fsl,pins' property and configure related
+ registers.
+
config PINCTRL_VYBRID
bool "Vybrid (vf610) pinctrl driver"
depends on ARCH_VF610 && PINCTRL_FULL
diff --git a/drivers/pinctrl/nxp/Makefile b/drivers/pinctrl/nxp/Makefile
index b86448aac9..066ca75b65 100644
--- a/drivers/pinctrl/nxp/Makefile
+++ b/drivers/pinctrl/nxp/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_PINCTRL_IMX8) += pinctrl-imx8.o
obj-$(CONFIG_PINCTRL_IMX8M)+= pinctrl-imx8m.o
obj-$(CONFIG_PINCTRL_MXS) += pinctrl-mxs.o
obj-$(CONFIG_PINCTRL_VYBRID) += pinctrl-vf610.o
+obj-$(CONFIG_PINCTRL_IMXRT)+= pinctrl-imxrt.o
diff --git a/drivers/pinctrl/nxp/pinctrl-imxrt.c
b/drivers/pinctrl/nxp/pinctrl-imxrt.c
new file mode 100644
index 00..4a93941927
--- /dev/null
+++ b/drivers/pinctrl/nxp/pinctrl-imxrt.c
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti
+ */
+
+#include
+#include
+#include
+
+#include "pinctrl-imx.h"
+
+static struct imx_pinctrl_soc_info imxrt_pinctrl_soc_info = {
+ .flags = ZERO_OFFSET_VALID,
+};
+
+static int imxrt_pinctrl_probe(struct udevice *dev)
+{
+ struct imx_pinctrl_soc_info *info =
+ (struct imx_pinctrl_soc_info *)dev_get_driver_data(dev);
+
+ return imx_pinctrl_probe(dev, info);
+}
+
+static const struct udevice_id imxrt_pinctrl_match[] = {
+ { .compatible = "fsl,imxrt-iomuxc",
+ .data = (ulong)_pinctrl_soc_info },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(imxrt_pinctrl) = {
+ .name = "imxrt-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = of_match_ptr(imxrt_pinctrl_match),
+ .probe = imxrt_pinctrl_probe,
+ .remove = imx_pinctrl_remove,
+ .priv_auto_alloc_size = sizeof(struct imx_pinctrl_priv),
+ .ops = _pinctrl_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
--
2.20.1
[PATCH v2 07/21] clk: imx: pllv3: add set_rate() support
Add generic set_rate() support.
Signed-off-by: Giulio Benetti
Reviewed-by: Lukasz Majewski
---
drivers/clk/imx/clk-pllv3.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index 9b37cd9cd9..a721dbee94 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -17,6 +17,7 @@
#define UBOOT_DM_CLK_IMX_PLLV3_USB "imx_clk_pllv3_usb"
#define BM_PLL_POWER (0x1 << 12)
+#define BM_PLL_LOCK(0x1 << 31)
struct clk_pllv3 {
struct clk clk;
@@ -39,6 +40,31 @@ static ulong clk_pllv3_generic_get_rate(struct clk *clk)
return (div == 1) ? parent_rate * 22 : parent_rate * 20;
}
+static ulong clk_pllv3_generic_set_rate(struct clk *clk, ulong rate)
+{
+ struct clk_pllv3 *pll = to_clk_pllv3(clk);
+ unsigned long parent_rate = clk_get_parent_rate(clk);
+ u32 val, div;
+
+ if (rate == parent_rate * 22)
+ div = 1;
+ else if (rate == parent_rate * 20)
+ div = 0;
+ else
+ return -EINVAL;
+
+ val = readl(pll->base);
+ val &= ~(pll->div_mask << pll->div_shift);
+ val |= (div << pll->div_shift);
+ writel(val, pll->base);
+
+ /* Wait for PLL to lock */
+ while (!(readl(pll->base) & BM_PLL_LOCK))
+ ;
+
+ return 0;
+}
+
static int clk_pllv3_generic_enable(struct clk *clk)
{
struct clk_pllv3 *pll = to_clk_pllv3(clk);
@@ -73,6 +99,7 @@ static const struct clk_ops clk_pllv3_generic_ops = {
.get_rate = clk_pllv3_generic_get_rate,
.enable = clk_pllv3_generic_enable,
.disable= clk_pllv3_generic_disable,
+ .set_rate = clk_pllv3_generic_set_rate,
};
struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
--
2.20.1
[PATCH v2 09/21] clk: imx: pllv3: add support for PLLV3_AV type
Add support for PLLV3 AV type.
Signed-off-by: Giulio Benetti
---
drivers/clk/imx/clk-pllv3.c | 76 +
1 file changed, 76 insertions(+)
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index d5087a104e..fc16416d5f 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -6,6 +6,7 @@
#include
#include
+#include
#include
#include
#include
@@ -16,6 +17,10 @@
#define UBOOT_DM_CLK_IMX_PLLV3_GENERIC "imx_clk_pllv3_generic"
#define UBOOT_DM_CLK_IMX_PLLV3_SYS "imx_clk_pllv3_sys"
#define UBOOT_DM_CLK_IMX_PLLV3_USB "imx_clk_pllv3_usb"
+#define UBOOT_DM_CLK_IMX_PLLV3_AV "imx_clk_pllv3_av"
+
+#define PLL_NUM_OFFSET 0x10
+#define PLL_DENOM_OFFSET 0x20
#define BM_PLL_POWER (0x1 << 12)
#define BM_PLL_LOCK(0x1 << 31)
@@ -143,6 +148,65 @@ static const struct clk_ops clk_pllv3_sys_ops = {
.set_rate = clk_pllv3_sys_set_rate,
};
+static ulong clk_pllv3_av_get_rate(struct clk *clk)
+{
+ struct clk_pllv3 *pll = to_clk_pllv3(clk);
+ unsigned long parent_rate = clk_get_parent_rate(clk);
+ u32 mfn = readl(pll->base + PLL_NUM_OFFSET);
+ u32 mfd = readl(pll->base + PLL_DENOM_OFFSET);
+ u32 div = readl(pll->base) & pll->div_mask;
+ u64 temp64 = (u64)parent_rate;
+
+ temp64 *= mfn;
+ do_div(temp64, mfd);
+
+ return parent_rate * div + (unsigned long)temp64;
+}
+
+static ulong clk_pllv3_av_set_rate(struct clk *clk, ulong rate)
+{
+ struct clk_pllv3 *pll = to_clk_pllv3(clk);
+ unsigned long parent_rate = clk_get_parent_rate(clk);
+ unsigned long min_rate = parent_rate * 27;
+ unsigned long max_rate = parent_rate * 54;
+ u32 val, div;
+ u32 mfn, mfd = 100;
+ u32 max_mfd = 0x3FFF;
+ u64 temp64;
+
+ if (rate < min_rate || rate > max_rate)
+ return -EINVAL;
+
+ if (parent_rate <= max_mfd)
+ mfd = parent_rate;
+
+ div = rate / parent_rate;
+ temp64 = (u64)(rate - div * parent_rate);
+ temp64 *= mfd;
+ do_div(temp64, parent_rate);
+ mfn = temp64;
+
+ val = readl(pll->base);
+ val &= ~pll->div_mask;
+ val |= div;
+ writel(val, pll->base);
+ writel(mfn, pll->base + PLL_NUM_OFFSET);
+ writel(mfd, pll->base + PLL_DENOM_OFFSET);
+
+ /* Wait for PLL to lock */
+ while (!(readl(pll->base) & BM_PLL_LOCK))
+ ;
+
+ return 0;
+}
+
+static const struct clk_ops clk_pllv3_av_ops = {
+ .enable = clk_pllv3_generic_enable,
+ .disable= clk_pllv3_generic_disable,
+ .get_rate = clk_pllv3_av_get_rate,
+ .set_rate = clk_pllv3_av_set_rate,
+};
+
struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
const char *parent_name, void __iomem *base,
u32 div_mask)
@@ -174,6 +238,11 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const
char *name,
pll->div_shift = 1;
pll->powerup_set = true;
break;
+ case IMX_PLLV3_AV:
+ drv_name = UBOOT_DM_CLK_IMX_PLLV3_AV;
+ pll->div_shift = 0;
+ pll->powerup_set = false;
+ break;
default:
kfree(pll);
return ERR_PTR(-ENOTSUPP);
@@ -212,3 +281,10 @@ U_BOOT_DRIVER(clk_pllv3_usb) = {
.ops= _pllv3_generic_ops,
.flags = DM_FLAG_PRE_RELOC,
};
+
+U_BOOT_DRIVER(clk_pllv3_av) = {
+ .name = UBOOT_DM_CLK_IMX_PLLV3_AV,
+ .id = UCLASS_CLK,
+ .ops= _pllv3_av_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
--
2.20.1
[PATCH v2 04/21] clk: imx: pllv3: set div_mask differently if PLLV3 is GENERIC or USB
div_mask is different for GENERIC and USB pll, so set it according.
Signed-off-by: Giulio Benetti
Reviewed-by: Lukasz Majewski
---
drivers/clk/imx/clk-pllv3.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index d1e4c3fe30..02c75c37ea 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -55,9 +55,11 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const
char *name,
switch (type) {
case IMX_PLLV3_GENERIC:
drv_name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC;
+ pll->div_shift = 0;
break;
case IMX_PLLV3_USB:
drv_name = UBOOT_DM_CLK_IMX_PLLV3_USB;
+ pll->div_shift = 1;
break;
default:
kfree(pll);
--
2.20.1
[PATCH v2 08/21] clk: imx: pllv3: add PLLV3_SYS support
Add PLLV3_SYS support by adding set/get_rate() for PLLV3_SYS but keeping
generic enable()/disable(). Add a different driver because ops are
different respect to GENERIC/USB.
Signed-off-by: Giulio Benetti
Reviewed-by: Lukasz Majewski
---
drivers/clk/imx/clk-pllv3.c | 53 +
1 file changed, 53 insertions(+)
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index a721dbee94..d5087a104e 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -14,6 +14,7 @@
#include "clk.h"
#define UBOOT_DM_CLK_IMX_PLLV3_GENERIC "imx_clk_pllv3_generic"
+#define UBOOT_DM_CLK_IMX_PLLV3_SYS "imx_clk_pllv3_sys"
#define UBOOT_DM_CLK_IMX_PLLV3_USB "imx_clk_pllv3_usb"
#define BM_PLL_POWER (0x1 << 12)
@@ -102,6 +103,46 @@ static const struct clk_ops clk_pllv3_generic_ops = {
.set_rate = clk_pllv3_generic_set_rate,
};
+static ulong clk_pllv3_sys_get_rate(struct clk *clk)
+{
+ struct clk_pllv3 *pll = to_clk_pllv3(clk);
+ unsigned long parent_rate = clk_get_parent_rate(clk);
+ u32 div = readl(pll->base) & pll->div_mask;
+
+ return parent_rate * div / 2;
+}
+
+static ulong clk_pllv3_sys_set_rate(struct clk *clk, ulong rate)
+{
+ struct clk_pllv3 *pll = to_clk_pllv3(clk);
+ unsigned long parent_rate = clk_get_parent_rate(clk);
+ unsigned long min_rate = parent_rate * 54 / 2;
+ unsigned long max_rate = parent_rate * 108 / 2;
+ u32 val, div;
+
+ if (rate < min_rate || rate > max_rate)
+ return -EINVAL;
+
+ div = rate * 2 / parent_rate;
+ val = readl(pll->base);
+ val &= ~pll->div_mask;
+ val |= div;
+ writel(val, pll->base);
+
+ /* Wait for PLL to lock */
+ while (!(readl(pll->base) & BM_PLL_LOCK))
+ ;
+
+ return 0;
+}
+
+static const struct clk_ops clk_pllv3_sys_ops = {
+ .enable = clk_pllv3_generic_enable,
+ .disable= clk_pllv3_generic_disable,
+ .get_rate = clk_pllv3_sys_get_rate,
+ .set_rate = clk_pllv3_sys_set_rate,
+};
+
struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
const char *parent_name, void __iomem *base,
u32 div_mask)
@@ -123,6 +164,11 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const
char *name,
pll->div_shift = 0;
pll->powerup_set = false;
break;
+ case IMX_PLLV3_SYS:
+ drv_name = UBOOT_DM_CLK_IMX_PLLV3_SYS;
+ pll->div_shift = 0;
+ pll->powerup_set = false;
+ break;
case IMX_PLLV3_USB:
drv_name = UBOOT_DM_CLK_IMX_PLLV3_USB;
pll->div_shift = 1;
@@ -153,6 +199,13 @@ U_BOOT_DRIVER(clk_pllv3_generic) = {
.flags = DM_FLAG_PRE_RELOC,
};
+U_BOOT_DRIVER(clk_pllv3_sys) = {
+ .name = UBOOT_DM_CLK_IMX_PLLV3_SYS,
+ .id = UCLASS_CLK,
+ .ops= _pllv3_sys_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
+
U_BOOT_DRIVER(clk_pllv3_usb) = {
.name = UBOOT_DM_CLK_IMX_PLLV3_USB,
.id = UCLASS_CLK,
--
2.20.1
[PATCH v2 05/21] clk: imx: pllv3: add enable() support
Before set_rate() pllv3 needs enable() to power the pll up.
Add enable() taking into account different power_bit and
different powerup_set, because some pll needs its power_bit to be
set or reset to be powered on.
Signed-off-by: Giulio Benetti
---
drivers/clk/imx/clk-pllv3.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index 02c75c37ea..d8cbe3dd4e 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -16,9 +16,13 @@
#define UBOOT_DM_CLK_IMX_PLLV3_GENERIC "imx_clk_pllv3_generic"
#define UBOOT_DM_CLK_IMX_PLLV3_USB "imx_clk_pllv3_usb"
+#define BM_PLL_POWER (0x1 << 12)
+
struct clk_pllv3 {
struct clk clk;
void __iomem*base;
+ u32 power_bit;
+ boolpowerup_set;
u32 div_mask;
u32 div_shift;
};
@@ -35,8 +39,24 @@ static ulong clk_pllv3_generic_get_rate(struct clk *clk)
return (div == 1) ? parent_rate * 22 : parent_rate * 20;
}
+static int clk_pllv3_generic_enable(struct clk *clk)
+{
+ struct clk_pllv3 *pll = to_clk_pllv3(clk);
+ u32 val;
+
+ val = readl(pll->base);
+ if (pll->powerup_set)
+ val |= pll->power_bit;
+ else
+ val &= ~pll->power_bit;
+ writel(val, pll->base);
+
+ return 0;
+}
+
static const struct clk_ops clk_pllv3_generic_ops = {
.get_rate = clk_pllv3_generic_get_rate,
+ .enable = clk_pllv3_generic_enable,
};
struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
@@ -52,14 +72,18 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const
char *name,
if (!pll)
return ERR_PTR(-ENOMEM);
+ pll->power_bit = BM_PLL_POWER;
+
switch (type) {
case IMX_PLLV3_GENERIC:
drv_name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC;
pll->div_shift = 0;
+ pll->powerup_set = false;
break;
case IMX_PLLV3_USB:
drv_name = UBOOT_DM_CLK_IMX_PLLV3_USB;
pll->div_shift = 1;
+ pll->powerup_set = true;
break;
default:
kfree(pll);
--
2.20.1
[PATCH v2 06/21] clk: imx: pllv3: add disable() support
Add disable() support.
Signed-off-by: Giulio Benetti
Reviewed-by: Lukasz Majewski
---
drivers/clk/imx/clk-pllv3.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index d8cbe3dd4e..9b37cd9cd9 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -54,9 +54,25 @@ static int clk_pllv3_generic_enable(struct clk *clk)
return 0;
}
+static int clk_pllv3_generic_disable(struct clk *clk)
+{
+ struct clk_pllv3 *pll = to_clk_pllv3(clk);
+ u32 val;
+
+ val = readl(pll->base);
+ if (pll->powerup_set)
+ val &= ~pll->power_bit;
+ else
+ val |= pll->power_bit;
+ writel(val, pll->base);
+
+ return 0;
+}
+
static const struct clk_ops clk_pllv3_generic_ops = {
.get_rate = clk_pllv3_generic_get_rate,
.enable = clk_pllv3_generic_enable,
+ .disable= clk_pllv3_generic_disable,
};
struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
--
2.20.1
[PATCH v2 02/21] armv7m: cache: add mmu_set_region_dcache_behaviour() stub for compatibility
Since some driver requires this function add it as an empty stub
when DCACHE is OFF.
Signed-off-by: Giulio Benetti
---
arch/arm/cpu/armv7m/cache.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c
index f4ba3ad50e..7353698557 100644
--- a/arch/arm/cpu/armv7m/cache.c
+++ b/arch/arm/cpu/armv7m/cache.c
@@ -291,6 +291,12 @@ void flush_dcache_all(void)
void invalidate_dcache_all(void)
{
}
+
+void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
+enum dcache_option option)
+{
+}
+
#endif
#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
--
2.20.1
[PATCH v2 03/21] clk: imx: pllv3: register PLLV3 GENERIC and USB as 2 different clocks
Better to register the 2 clock as 2 different drivers because they work
slightly differently depending on power_bit and powerup_set bits coming
on next patches.
Signed-off-by: Giulio Benetti
Reviewed-by: Lukasz Majewski
---
drivers/clk/imx/clk-pllv3.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index fbb7b24d5e..d1e4c3fe30 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -13,7 +13,8 @@
#include
#include "clk.h"
-#define UBOOT_DM_CLK_IMX_PLLV3 "imx_clk_pllv3"
+#define UBOOT_DM_CLK_IMX_PLLV3_GENERIC "imx_clk_pllv3_generic"
+#define UBOOT_DM_CLK_IMX_PLLV3_USB "imx_clk_pllv3_usb"
struct clk_pllv3 {
struct clk clk;
@@ -24,7 +25,7 @@ struct clk_pllv3 {
#define to_clk_pllv3(_clk) container_of(_clk, struct clk_pllv3, clk)
-static ulong clk_pllv3_get_rate(struct clk *clk)
+static ulong clk_pllv3_generic_get_rate(struct clk *clk)
{
struct clk_pllv3 *pll = to_clk_pllv3(dev_get_clk_ptr(clk->dev));
unsigned long parent_rate = clk_get_parent_rate(clk);
@@ -35,7 +36,7 @@ static ulong clk_pllv3_get_rate(struct clk *clk)
}
static const struct clk_ops clk_pllv3_generic_ops = {
- .get_rate = clk_pllv3_get_rate,
+ .get_rate = clk_pllv3_generic_get_rate,
};
struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
@@ -53,8 +54,10 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const
char *name,
switch (type) {
case IMX_PLLV3_GENERIC:
+ drv_name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC;
+ break;
case IMX_PLLV3_USB:
- drv_name = UBOOT_DM_CLK_IMX_PLLV3;
+ drv_name = UBOOT_DM_CLK_IMX_PLLV3_USB;
break;
default:
kfree(pll);
@@ -75,7 +78,14 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const
char *name,
}
U_BOOT_DRIVER(clk_pllv3_generic) = {
- .name = UBOOT_DM_CLK_IMX_PLLV3,
+ .name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC,
+ .id = UCLASS_CLK,
+ .ops= _pllv3_generic_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
+
+U_BOOT_DRIVER(clk_pllv3_usb) = {
+ .name = UBOOT_DM_CLK_IMX_PLLV3_USB,
.id = UCLASS_CLK,
.ops= _pllv3_generic_ops,
.flags = DM_FLAG_PRE_RELOC,
--
2.20.1
[PATCH v2 01/21] spl: fix entry_point equal to load_addr
At the moment entry_point is set to image_get_load(header) that sets it
to "load address" instead of "entry point", assuming entry_point is
equal to load_addr, but it's not true. Then load_addr is set to
"entry_point - header_size", but this is wrong too since load_addr is
not an entry point.
So use image_get_ep() for entry_point assignment and image_get_load()
for load_addr assignment.
Signed-off-by: Giulio Benetti
---
common/spl/spl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/spl/spl.c b/common/spl/spl.c
index c1fce62b91..19085ad270 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -284,9 +284,9 @@ int spl_parse_image_header(struct spl_image_info *spl_image,
spl_image->entry_point = image_get_ep(header);
spl_image->size = image_get_data_size(header);
} else {
- spl_image->entry_point = image_get_load(header);
+ spl_image->entry_point = image_get_ep(header);
/* Load including the header */
- spl_image->load_addr = spl_image->entry_point -
+ spl_image->load_addr = image_get_load(header) -
header_size;
spl_image->size = image_get_data_size(header) +
header_size;
--
2.20.1
[PATCH v2 00/21] Add i.MXRT family support
This patchset add support for i.MXRT family starting from i.MXRT1050 SoC. It provides: - i.MXRT1050 SoC entry - i.MXRT pinctrl driver - i.MXRT serial driver tweaking - i.MXRT sdram controller driver - i.MXRT usdhc driver tweaking - i.MXRT1050-evk initial support It uses all DM clocks all around and it loads correctly a basic Linux zImage. Changes: V1->V2: * added gpio driver adaption * fixed potential failure on lpuart get_clock() if DM is not used * introduced CONFIG_IMXRT and CONFIG_IMXRT1050 to prevent using ARCH_IMXRT * removed lcd enabling from defconfig(it's still not available) * added -u-boot.dtsi for imxrt1050-evk.dts board * re-grouped some patch separating support for board and support for i.MXRT family Giulio Benetti (21): spl: fix entry_point equal to load_addr armv7m: cache: add mmu_set_region_dcache_behaviour() stub for compatibility clk: imx: pllv3: register PLLV3 GENERIC and USB as 2 different clocks clk: imx: pllv3: set div_mask differently if PLLV3 is GENERIC or USB clk: imx: pllv3: add enable() support clk: imx: pllv3: add disable() support clk: imx: pllv3: add set_rate() support clk: imx: pllv3: add PLLV3_SYS support clk: imx: pllv3: add support for PLLV3_AV type clk: imx: pfd: add set_rate() clk: imx: add i.IMXRT1050 clk driver pinctrl: add i.MXRT driver gpio: mxc_gpio: add support for i.MXRT1050 ARM: dts: imxrt1050: add dtsi file serial_lpuart: add clock enable if CONFIG_CLK is defined serial_lpuart: add support for i.MXRT ram: add SDRAM driver for i.MXRT SoCs mmc: fsl_esdhc: make if(CONFIG_IS_ENABLED(CLK)) an #if statement mmc: fsl_esdhc: add compatible for fsl, imxrt-usdhc imx: Add basic support for the NXP IMXRT10xx SoC family imx: imxrt1050-evk: Add support for the NXP i.MXRT1050-EVK arch/arm/Kconfig | 10 + arch/arm/Makefile | 4 +- arch/arm/cpu/armv7m/cache.c | 6 + arch/arm/dts/Makefile | 2 + arch/arm/dts/imxrt1050-evk-u-boot.dtsi| 44 + arch/arm/dts/imxrt1050-evk.dts| 200 arch/arm/dts/imxrt1050.dtsi | 146 +++ arch/arm/include/asm/arch-imxrt/clock.h | 10 + arch/arm/include/asm/arch-imxrt/gpio.h| 19 + arch/arm/include/asm/arch-imxrt/imx-regs.h| 20 + arch/arm/include/asm/arch-imxrt/imxrt.h | 11 + arch/arm/include/asm/arch-imxrt/sys_proto.h | 11 + arch/arm/mach-imx/Makefile| 3 +- arch/arm/mach-imx/imxrt/Kconfig | 25 + arch/arm/mach-imx/imxrt/Makefile | 7 + arch/arm/mach-imx/imxrt/soc.c | 35 + board/freescale/imxrt1050-evk/Kconfig | 22 + board/freescale/imxrt1050-evk/MAINTAINERS | 6 + board/freescale/imxrt1050-evk/Makefile| 6 + board/freescale/imxrt1050-evk/README | 31 + board/freescale/imxrt1050-evk/imximage.cfg| 36 + board/freescale/imxrt1050-evk/imxrt1050-evk.c | 81 ++ common/spl/spl.c | 4 +- configs/imxrt1050-evk_defconfig | 69 ++ drivers/clk/imx/Kconfig | 16 + drivers/clk/imx/Makefile | 2 + drivers/clk/imx/clk-imxrt1050.c | 292 + drivers/clk/imx/clk-pfd.c | 22 + drivers/clk/imx/clk-pllv3.c | 218 +++- drivers/gpio/mxc_gpio.c | 7 +- drivers/mmc/Kconfig | 2 +- drivers/mmc/fsl_esdhc_imx.c | 41 +- drivers/pinctrl/nxp/Kconfig | 14 + drivers/pinctrl/nxp/Makefile | 1 + drivers/pinctrl/nxp/pinctrl-imxrt.c | 40 + drivers/ram/Kconfig | 8 + drivers/ram/Makefile | 2 + drivers/ram/imxrt_sdram.c | 439 drivers/serial/serial_lpuart.c| 31 +- include/configs/imxrt1050-evk.h | 46 + include/dt-bindings/clock/imxrt1050-clock.h | 65 ++ include/dt-bindings/memory/imxrt-sdram.h | 100 ++ include/dt-bindings/pinctrl/pins-imxrt1050.h | 993 ++ include/fsl_lpuart.h | 3 +- 44 files changed, 3111 insertions(+), 39 deletions(-) create mode 100644 arch/arm/dts/imxrt1050-evk-u-boot.dtsi create mode 100644 arch/arm/dts/imxrt1050-evk.dts create mode 100644 arch/arm/dts/imxrt1050.dtsi create mode 100644 arch/arm/include/asm/arch-imxrt/clock.h create mode 100644 arch/arm/include/asm/arch-imxrt/gpio.h create mode 100644 arch/arm/include/asm/arch-imxrt/imx-regs.h create mode 100644 arch/arm/include/asm/arch-imxrt/imxrt.h create mode 100644 arch/arm/include/asm/arch-imxrt/sys_proto.h create mode 100644 arch/arm/mach-imx/imxrt/Kconfig create mode 100644 arch/arm/mach-imx/imxrt/Makefile create mode 100644 arch/arm/mach-imx/imxrt/soc.c create mode 100644 board/freescale/imxrt1050-evk/Kconfig create
Re: [PATCH 16/16] mips: mtmips: add support for mt7628-rfb
On 08.01.20 04:02, Weijie Gao wrote:
This patch adds support for mt7628 reference board
Signed-off-by: Weijie Gao
---
arch/mips/dts/Makefile| 1 +
arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi | 24 +
arch/mips/dts/mediatek,mt7628-rfb.dts | 67
arch/mips/mach-mtmips/Kconfig | 9 ++
board/mediatek/mt7628/Kconfig | 12 +++
board/mediatek/mt7628/MAINTAINERS | 8 ++
board/mediatek/mt7628/Makefile| 4 +
board/mediatek/mt7628/board.c | 25 +
board/mediatek/mt7628/spl_load.c | 102 ++
configs/mt7628_rfb_defconfig | 47
include/configs/mt7628.h | 57 ++
11 files changed, 356 insertions(+)
create mode 100644 arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi
create mode 100644 arch/mips/dts/mediatek,mt7628-rfb.dts
create mode 100644 board/mediatek/mt7628/Kconfig
create mode 100644 board/mediatek/mt7628/MAINTAINERS
create mode 100644 board/mediatek/mt7628/Makefile
create mode 100644 board/mediatek/mt7628/board.c
create mode 100644 board/mediatek/mt7628/spl_load.c
create mode 100644 configs/mt7628_rfb_defconfig
create mode 100644 include/configs/mt7628.h
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index c9d75596f2..cbd0c8bc8b 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -17,6 +17,7 @@ dtb-$(CONFIG_BOARD_COMTREND_CT5361) += comtrend,ct-5361.dtb
dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += comtrend,wap-5813n.dtb
dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
+dtb-$(CONFIG_BOARD_MT7628_RFB) += mediatek,mt7628-rfb.dtb
dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb
dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f...@st1704.dtb
diff --git a/arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi
b/arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi
new file mode 100644
index 00..213959105f
--- /dev/null
+++ b/arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ *
+ * Author: Weijie Gao
+ */
+
+/ {
+ binman {
+ filename = "u-boot-mtmips.bin";
+ pad-byte = <0xff>;
+
+#ifdef CONFIG_SPL
+ u-boot-spl {
+ };
+
+ u-boot-lzma-img {
+ };
+#else
+ u-boot {
+ };
+#endif
+ };
+};
diff --git a/arch/mips/dts/mediatek,mt7628-rfb.dts
b/arch/mips/dts/mediatek,mt7628-rfb.dts
new file mode 100644
index 00..a0cca4f5ba
--- /dev/null
+++ b/arch/mips/dts/mediatek,mt7628-rfb.dts
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ *
+ * Author: Weijie Gao
+ */
+
+/dts-v1/;
+
+#include "mt7628.dtsi"
+
+/ {
+ compatible = "mediatek,mt7628-rfb", "ralink,mt7628a-soc";
+ model = "MediaTek MT7628 RFB";
+
+ aliases {
+ serial0 =
+ spi0 =
+ };
+
+ chosen {
+ stdout-path =
+ };
+};
+
+ {
+ state_default: pin_state {
+ pleds {
+ groups = "p0led", "p1led", "p2led", "p3led", "p4led";
+ function = "led";
+ };
+ };
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+ num-cs = <2>;
+
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <2500>;
+ reg = <0>;
+ };
+};
+
+ {
+ mediatek,wan-port = <0>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_router_mode>;
+};
+
+ {
+ bus-width = <4>;
+ cap-sd-highspeed;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_router_mode>;
+
+ status = "okay";
+};
diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
index 7c674ecb2b..a9fec619b9 100644
--- a/arch/mips/mach-mtmips/Kconfig
+++ b/arch/mips/mach-mtmips/Kconfig
@@ -47,6 +47,14 @@ endchoice
choice
prompt "Board select"
+config BOARD_MT7628_RFB
+ bool "MediaTek MT7628 RFB"
+ depends on SOC_MT7628
+ help
+ The reference design of MT7628. The board has 128 MiB DDR2, 8 MiB
+ SPI-NOR flash, 1 built-in switch with 5 ports, 1 UART, 1 USB host,
+ 1 SDXC, 1 PCIe socket and JTAG pins.
+
config BOARD_GARDENA_SMART_GATEWAY_MT7688
bool "GARDENA smart Gateway"
depends on SOC_MT7628
@@ -69,5 +77,6 @@ endchoice
source "board/gardena/smart-gateway-mt7688/Kconfig"
source "board/seeed/linkit-smart-7688/Kconfig"
+source "board/mediatek/mt7628/Kconfig"
Please keep the list alphabetically sorted.
endmenu
diff
Re: [PATCH] env: another attempt at fixing SPL build failures
On Fri, Jan 10, 2020 at 02:28:54PM +, Rasmus Villemoes wrote:
> On 15/12/2019 23.29, Rasmus Villemoes wrote:
> > I'm also seeing the build failure that commit
> >
> > 7d4776545b env: solve compilation error in SPL
> >
> > tried to fix, namely that the reference to env_flags_validate from
> > env_htab cannot be satisfied when flags.o is not built in. However,
> > that commit got reverted by
> >
> > d90fc9c3de Revert "env: solve compilation error in SPL"
> >
> > Necessary, but not sufficient conditions to see this are
> >
> > CONFIG_SPL=y (obviously)
> > CONFIG_SPL_ENV_SUPPORT=n (so flags.o does not get compiled)
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y (so env/built-in.o is part of the SPL link)
> >
> > Now, these are satisfied for e.g. imx6q_logic_defconfig. But that
> > builds just fine, and spl/u-boot-spl.map lists .data.env_htab among
> > the discarded (garbage collected) sections. Yet, on our
> > mpc8309-derived board, we do see the build failure, so perhaps the
> > linker works a bit differently on ppc than on ARM, or there's yet some
> > other configuration option needed to observe the break.
>
> Yeah, I think this is a difference in how the linker works on ppc vs
> arm. Doing
>
> git grep --files-with-matches SPL=y -- configs/ | xargs grep
> --files-with-matches SPL_LIBCOMMON_SUPPORT=y | xargs grep
> --files-without-match SPL_ENV_SUPPORT | xargs head -n1
>
> shows that all the in-tree defconfigs with the above combination are ARM
> boards (except for microblaze_defconfig, but I don't have such a
> toolchain), and they most likely all build just fine. But taking some
> random PPC config (say T2080QDS_NAND_defconfig) with the first and third
> point, and then manually disabling SPL_ENV_SUPPORT, immediately shows
> the break.
>
> For reference, I have
>
> $ ${CROSS_COMPILE}ld --version
> GNU ld (GNU Binutils for Ubuntu) 2.30
Which SPL are you using on PowerPC? There's the one based
CONFIG_SPL_FRAMEWORK and the one that's not. I suspect it's a framework
vs not problem here rather than linker exactly.
--
Tom
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Re: [PATCH] env: another attempt at fixing SPL build failures
On 15/12/2019 23.29, Rasmus Villemoes wrote:
> I'm also seeing the build failure that commit
>
> 7d4776545b env: solve compilation error in SPL
>
> tried to fix, namely that the reference to env_flags_validate from
> env_htab cannot be satisfied when flags.o is not built in. However,
> that commit got reverted by
>
> d90fc9c3de Revert "env: solve compilation error in SPL"
>
> Necessary, but not sufficient conditions to see this are
>
> CONFIG_SPL=y (obviously)
> CONFIG_SPL_ENV_SUPPORT=n (so flags.o does not get compiled)
> CONFIG_SPL_LIBCOMMON_SUPPORT=y (so env/built-in.o is part of the SPL link)
>
> Now, these are satisfied for e.g. imx6q_logic_defconfig. But that
> builds just fine, and spl/u-boot-spl.map lists .data.env_htab among
> the discarded (garbage collected) sections. Yet, on our
> mpc8309-derived board, we do see the build failure, so perhaps the
> linker works a bit differently on ppc than on ARM, or there's yet some
> other configuration option needed to observe the break.
Yeah, I think this is a difference in how the linker works on ppc vs
arm. Doing
git grep --files-with-matches SPL=y -- configs/ | xargs grep
--files-with-matches SPL_LIBCOMMON_SUPPORT=y | xargs grep
--files-without-match SPL_ENV_SUPPORT | xargs head -n1
shows that all the in-tree defconfigs with the above combination are ARM
boards (except for microblaze_defconfig, but I don't have such a
toolchain), and they most likely all build just fine. But taking some
random PPC config (say T2080QDS_NAND_defconfig) with the first and third
point, and then manually disabling SPL_ENV_SUPPORT, immediately shows
the break.
For reference, I have
$ ${CROSS_COMPILE}ld --version
GNU ld (GNU Binutils for Ubuntu) 2.30
> This is another attempt at solving it, which also cleans up
> env/Makefile a bit: Introduce a def_bool y symbol CONFIG_ENV_SUPPORT
> which complements CONFIG_(SPL/TPL)_SUPPORT. Then use
> CONFIG_$(SPL_TPL_)ENV_SUPPORT to decide whether to include the five
> basic env/*.o files. For attr.o, flags.o and callback.o, this
> shouldn't change anything. Also, common.o and env.o still get
> unconditionally built for U-boot proper. But for TPL/SPL, those two
> are only included if CONFIG_(SPL/TPL)_SUPPORT is set.
Any comments on this approach, apart from the spellos (I'm missing ENV_
in front of SUPPORT in two places)?
Rasmus
Re: U-Boot: wandboard ethernet problem with newest mainline
Hi Heiko, On Thu, Jan 9, 2020 at 8:33 AM Heiko Schocher wrote: > If you have time, may I can ask, if you can test my patches, if they > do not break other board revisions? I haven't had a chance to look at your patches yet, but could you please submit the whole series to the list? I will try to review and test them next week. Thanks
Re: [PATCH 15/16] mips: mtmips: enable SPL for all boards
On 08.01.20 04:02, Weijie Gao wrote:
This patch enables SPL for all mtmips boards. And also remove defconfig
files which are intend to build ram bootable u-boot files.
Signed-off-by: Weijie Gao
---
arch/mips/mach-mtmips/Kconfig | 26 ---
board/gardena/smart-gateway-mt7688/board.c| 2 +
...gardena-smart-gateway-mt7688-ram_defconfig | 75 ---
.../gardena-smart-gateway-mt7688_defconfig| 7 +-
configs/linkit-smart-7688-ram_defconfig | 65
configs/linkit-smart-7688_defconfig | 7 +-
.../configs/gardena-smart-gateway-mt7688.h| 18 -
include/configs/linkit-smart-7688.h | 18 -
8 files changed, 46 insertions(+), 172 deletions(-)
delete mode 100644 configs/gardena-smart-gateway-mt7688-ram_defconfig
delete mode 100644 configs/linkit-smart-7688-ram_defconfig
diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
index 4556e7f4f6..7c674ecb2b 100644
--- a/arch/mips/mach-mtmips/Kconfig
+++ b/arch/mips/mach-mtmips/Kconfig
@@ -51,7 +51,6 @@ config BOARD_GARDENA_SMART_GATEWAY_MT7688
bool "GARDENA smart Gateway"
depends on SOC_MT7628
select BOARD_LATE_INIT
- select SUPPORTS_BOOT_RAM
help
GARDENA smart Gateway boards have a MT7688 SoC with 128 MiB of RAM
and 8 MiB of flash (SPI NOR) and additional SPI NAND storage.
@@ -59,7 +58,6 @@ config BOARD_GARDENA_SMART_GATEWAY_MT7688
config BOARD_LINKIT_SMART_7688
bool "LinkIt Smart 7688"
depends on SOC_MT7628
- select SUPPORTS_BOOT_RAM
help
Seeed LinkIt Smart 7688 boards have a MT7688 SoC with 128 MiB of RAM
and 32 MiB of flash (SPI).
@@ -69,30 +67,6 @@ config BOARD_LINKIT_SMART_7688
endchoice
-choice
- prompt "Boot mode"
-
-config BOOT_RAM
- bool "RAM boot"
- depends on SUPPORTS_BOOT_RAM
- help
- This builds an image that is linked to a RAM address. It can be used
- for booting from CFE via TFTP using an ELF image, but it can also be
- booted from RAM by other bootloaders using a BIN image.
-
-config BOOT_ROM
- bool "ROM boot"
- depends on SUPPORTS_BOOT_RAM
- help
- This builds an image that is linked to a ROM address. It can be
- used as main bootloader image which is programmed onto the onboard
- flash storage (SPI NOR).
-
-endchoice
-
-config SUPPORTS_BOOT_RAM
- bool
-
source "board/gardena/smart-gateway-mt7688/Kconfig"
source "board/seeed/linkit-smart-7688/Kconfig"
diff --git a/board/gardena/smart-gateway-mt7688/board.c b/board/gardena/smart-gateway-mt7688/board.c
index ae03f0a434..80f9f1ae65 100644
--- a/board/gardena/smart-gateway-mt7688/board.c
+++ b/board/gardena/smart-gateway-mt7688/board.c
@@ -294,8 +294,10 @@ err_free:
return ret;
}
+#ifndef CONFIG_SPL_BUILD
U_BOOT_CMD(
fd_write, 1, 0, do_fd_write,
"Write test factory-data values to SPI NOR",
"\n"
);
+#endif
Perhaps it would be better to drop compiling this file (board.c) for
SPL complete by changin the Makefile instead?
diff --git a/configs/gardena-smart-gateway-mt7688-ram_defconfig
b/configs/gardena-smart-gateway-mt7688-ram_defconfig
deleted file mode 100644
index 41e52a92cc..00
--- a/configs/gardena-smart-gateway-mt7688-ram_defconfig
+++ /dev/null
@@ -1,75 +0,0 @@
-CONFIG_MIPS=y
-CONFIG_SYS_TEXT_BASE=0x8001
-CONFIG_ENV_SIZE=0x1
-CONFIG_ENV_OFFSET=0xA
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
-CONFIG_SYS_BOOTCOUNT_ADDR=0xb06c
-CONFIG_ENV_SECT_SIZE=0x1
-CONFIG_ARCH_MTMIPS=y
-CONFIG_BOARD_GARDENA_SMART_GATEWAY_MT7688=y
-CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
-# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
-CONFIG_MIPS_BOOT_FDT=y
-CONFIG_ENV_VARS_UBOOT_CONFIG=y
-CONFIG_FIT=y
-CONFIG_FIT_SIGNATURE=y
-CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="cp.b 8300 8400 1 && dhcp uEnv.txt && env import -t
${fileaddr} ${filesize} && run do_u_boot_init; reset"
-CONFIG_USE_PREBOOT=y
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_LICENSE=y
-# CONFIG_CMD_ELF is not set
-# CONFIG_CMD_XIMG is not set
-CONFIG_CMD_MEMINFO=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-# CONFIG_CMD_LOADS is not set
-CONFIG_CMD_MTD=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_WDT=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_BOOTCOUNT=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_UUID=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="spi-nand0=spi0.1,nor0=spi0.0"
-CONFIG_MTDPARTS_DEFAULT="spi0.0:640k(uboot),64k(uboot_env0),64k(uboot_env1),64k(factory),-(unused);spi0.1:-(nand)"
-CONFIG_CMD_UBI=y
-CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-mt7688"
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_ENV_OFFSET_REDUND=0xB
Re: [PATCH 14/16] mips: mtmips: add SPL support
On 08.01.20 04:02, Weijie Gao wrote:
This patch adds SPL support for mtmips platform. The lowlevel architecture
is split into SPL and the rest parts are built into a memory loadable
u-boot image.
The increment of size is very small (< 10 KiB) and the memory bootable
u-boot (u-boot.img) is generated automatically so there is not need to add
a separate config for it.
Signed-off-by: Weijie Gao
---
Makefile | 9 +
arch/mips/Kconfig| 2 ++
arch/mips/dts/mt7628-u-boot.dtsi | 25 +
arch/mips/mach-mtmips/Kconfig| 4
arch/mips/mach-mtmips/Makefile | 1 +
arch/mips/mach-mtmips/spl.c | 23 +++
6 files changed, 64 insertions(+)
create mode 100644 arch/mips/dts/mt7628-u-boot.dtsi
create mode 100644 arch/mips/mach-mtmips/spl.c
diff --git a/Makefile b/Makefile
index 37bfc0e711..8f429eac54 100644
--- a/Makefile
+++ b/Makefile
@@ -894,6 +894,7 @@ ALL-$(CONFIG_OF_SEPARATE) += u-boot-dtb-tegra.bin
endif
ALL-$(CONFIG_ARCH_MEDIATEK) += u-boot-mtk.bin
+ALL-$(CONFIG_ARCH_MTMIPS) += u-boot-mtmips.bin
# Add optional build target if defined in board/cpu/soc headers
ifneq ($(CONFIG_BUILD_TARGET),)
@@ -1662,6 +1663,14 @@ u-boot-mtk.bin: u-boot.bin FORCE
$(call if_changed,mkimage)
endif
+ifeq ($(CONFIG_SPL),y)
+u-boot-mtmips.bin: u-boot.dtb u-boot-lzma.img spl/u-boot-spl.bin FORCE
+ $(call if_changed,binman)
+else
+u-boot-mtmips.bin: u-boot.bin FORCE
+ $(call if_changed,copy)
+endif
+
ARCH_POSTLINK := $(wildcard $(srctree)/arch/$(ARCH)/Makefile.postlink)
# Rule to link u-boot
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 015a7f6358..20bd422b4f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -98,6 +98,8 @@ config ARCH_MTMIPS
select SUPPORTS_CPU_MIPS32_R2
select SUPPORTS_LITTLE_ENDIAN
select SYSRESET
+ select SUPPORT_SPL
+ select BINMAN
config ARCH_JZ47XX
bool "Support Ingenic JZ47xx"
diff --git a/arch/mips/dts/mt7628-u-boot.dtsi b/arch/mips/dts/mt7628-u-boot.dtsi
new file mode 100644
index 00..e9abe6eb9f
--- /dev/null
+++ b/arch/mips/dts/mt7628-u-boot.dtsi
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ *
+ * Author: Weijie Gao
+ */
+
+/ {
+ binman {
+ filename = "u-boot-mtmips.bin";
+ pad-byte = <0xff>;
+
+#ifdef CONFIG_SPL
+ u-boot-spl {
+ align-end = <0x4000>;
+ };
+
+ u-boot-img {
+ };
+#else
+ u-boot {
+ };
+#endif
+ };
+};
diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
index e0076b613f..4556e7f4f6 100644
--- a/arch/mips/mach-mtmips/Kconfig
+++ b/arch/mips/mach-mtmips/Kconfig
@@ -20,6 +20,10 @@ config SYS_ICACHE_LINE_SIZE
default 32
config SYS_TEXT_BASE
+ default 0x9c00 if !SPL
+ default 0x8020 if SPL
+
+config SPL_TEXT_BASE
default 0x9c00
choice
diff --git a/arch/mips/mach-mtmips/Makefile b/arch/mips/mach-mtmips/Makefile
index 72f0369030..a7e6a66304 100644
--- a/arch/mips/mach-mtmips/Makefile
+++ b/arch/mips/mach-mtmips/Makefile
@@ -3,5 +3,6 @@
obj-y += cpu.o
obj-y += ddr_init.o
obj-y += ddr_cal.o
+obj-$(CONFIG_SPL_BUILD) += spl.o
obj-$(CONFIG_SOC_MT7628) += mt7628/
diff --git a/arch/mips/mach-mtmips/spl.c b/arch/mips/mach-mtmips/spl.c
new file mode 100644
index 00..37172abadf
--- /dev/null
+++ b/arch/mips/mach-mtmips/spl.c
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
+ *
+ * Author: Weijie Gao
+ */
+
+#include
+#include
+
+void __noreturn board_init_f(ulong dummy)
+{
+#ifdef CONFIG_SPL_SERIAL_SUPPORT
+ preloader_console_init();
+#endif
+
+ board_init_r(NULL, 0);
+}
+
+void board_boot_order(u32 *spl_boot_list)
+{
+ spl_boot_list[0] = BOOT_DEVICE_NOR;
+}
Please add the UART2 pin mux code here as suggested in my previous mail
(or a similar, preferred version).
Other than that:
Reviewed-by: Stefan Roese
Thanks,
Stefan
Re: [PATCH 14/35] common: Drop CONFIG_HAS_POST
On Fri, Dec 27, 2019 at 09:42:04AM -0700, Simon Glass wrote: > Hi Tom, > > On Thu, 12 Dec 2019 at 06:59, Tom Rini wrote: > > > > On Wed, Dec 11, 2019 at 05:47:33PM -0700, Simon Glass wrote: > > > This only exists to control whether the post/ directory is build. It is > > > just as easy to check this in the Makefile. Remove CONFIG_HAS_POST and use > > > an ifdef in the Makefile instead. > > > > > > Signed-off-by: Simon Glass > > > --- > > > > > > Makefile | 4 +++- > > > include/common.h | 4 > > > 2 files changed, 3 insertions(+), 5 deletions(-) > > > > > > diff --git a/Makefile b/Makefile > > > index 0766f78dcb..6b7d80139e 100644 > > > --- a/Makefile > > > +++ b/Makefile > > > @@ -762,7 +762,9 @@ libs-y += cmd/ > > > libs-y += common/ > > > libs-y += env/ > > > libs-$(CONFIG_API) += api/ > > > -libs-$(CONFIG_HAS_POST) += post/ > > > +ifdef CONFIG_POST > > > +libs-y += post/ > > > +endif > > > > Why isn't this just libs-$(CONFIG_POST) += post/ ? > > Unfortunately this is not a boolean CONFIG, and doesn't even use > Kconfig. See for example xpedite517x.h: > > #define CONFIG_POST (CONFIG_SYS_POST_MEMORY |\ > CONFIG_SYS_POST_I2C) OK, so lets fix that then please, POST stuff needs to be migrated to Kconfig at some point anyhow. Thanks! -- Tom signature.asc Description: PGP signature
