Re: [PATCH 4/4] ram: sifive: Avoid using hardcoded ram base and size
Hi Bin,
This whole patch set looks pretty good to me.
Just out of curiosity and as being rather new to the u-boot community,
would the following fix be more direct and avoid modifying general code?
On Wed, Jul 15, 2020 at 08:23:03PM -0700, Bin Meng wrote:
> From: Bin Meng
>
> At present the SiFive FU540 RAM driver uses hard-coded memory base
> address and size to initialize the DDR controller. This may not be
> true when this driver is used on another board based on FU540.
>
> Update the driver to read the memory information from DT and use
> that during the initialization.
>
> Signed-off-by: Bin Meng
> ---
>
> drivers/ram/sifive/fu540_ddr.c | 28 +---
> 1 file changed, 13 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/ram/sifive/fu540_ddr.c b/drivers/ram/sifive/fu540_ddr.c
> index f8f8ca9..2f38023 100644
> --- a/drivers/ram/sifive/fu540_ddr.c
> +++ b/drivers/ram/sifive/fu540_ddr.c
> @@ -8,6 +8,7 @@
>
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -39,9 +40,6 @@
> #define DENALI_PHY_1152 1152
> #define DENALI_PHY_1214 1214
>
> -#define PAYLOAD_DEST 0x8000
> -#define DDR_MEM_SIZE (8UL * 1024UL * 1024UL * 1024UL)
> -
> #define DRAM_CLASS_OFFSET8
> #define DRAM_CLASS_DDR4 0xA
> #define OPTIMAL_RMODW_EN_OFFSET 0
> @@ -65,6 +63,8 @@
> #define PHY_RX_CAL_DQ0_0_OFFSET 0
> #define PHY_RX_CAL_DQ1_0_OFFSET 16
>
> +DECLARE_GLOBAL_DATA_PTR;
> +
> struct fu540_ddrctl {
> volatile u32 denali_ctl[265];
> };
> @@ -235,8 +235,8 @@ static int fu540_ddr_setup(struct udevice *dev)
> struct fu540_ddr_params *params = >ddr_params;
> volatile u32 *denali_ctl = priv->ctl->denali_ctl;
> volatile u32 *denali_phy = priv->phy->denali_phy;
> - const u64 ddr_size = DDR_MEM_SIZE;
> - const u64 ddr_end = PAYLOAD_DEST + ddr_size;
> + const u64 ddr_size = priv->info.size;
> + const u64 ddr_end = priv->info.base + ddr_size;
> int ret, i;
> u32 physet;
>
> @@ -302,7 +302,7 @@ static int fu540_ddr_setup(struct udevice *dev)
>| (1 << MULTIPLE_OUT_OF_RANGE_OFFSET));
>
> /* set up range protection */
> - fu540_ddr_setup_range_protection(denali_ctl, DDR_MEM_SIZE);
> + fu540_ddr_setup_range_protection(denali_ctl, priv->info.size);
>
> /* Mask off port command error interrupt DENALI_CTL_136 */
> setbits_le32(DENALI_CTL_136 + denali_ctl,
> @@ -314,14 +314,14 @@ static int fu540_ddr_setup(struct udevice *dev)
>
> /* check size */
> priv->info.size = get_ram_size((long *)priv->info.base,
> -DDR_MEM_SIZE);
> +ddr_size);
>
> debug("%s : %lx\n", __func__, priv->info.size);
>
> /* check memory access for all memory */
> - if (priv->info.size != DDR_MEM_SIZE) {
> + if (priv->info.size != ddr_size) {
> printf("DDR invalid size : 0x%lx, expected 0x%lx\n",
> -priv->info.size, DDR_MEM_SIZE);
> +priv->info.size, (uintptr_t)ddr_size);
> return -EINVAL;
> }
>
> @@ -333,6 +333,9 @@ static int fu540_ddr_probe(struct udevice *dev)
> {
> struct fu540_ddr_info *priv = dev_get_priv(dev);
>
> + fdtdec_get_mem_size_base(gd->fdt_blob, (phys_size_t *)>info.size,
> + (unsigned long *)>info.base);
> +
Instead of introducing new API,
could we do something as such with the existing API?
fdtdec_setup_mem_size_base(gd->blob);
priv->info.base = gd->ram_base;
priv->info.size = gd->ram_size;
> #if defined(CONFIG_SPL_BUILD)
> struct regmap *map;
> int ret;
> @@ -368,14 +371,9 @@ static int fu540_ddr_probe(struct udevice *dev)
> priv->phy = regmap_get_range(map, 1);
> priv->physical_filter_ctrl = regmap_get_range(map, 2);
>
> - priv->info.base = CONFIG_SYS_SDRAM_BASE;
> -
> - priv->info.size = 0;
> return fu540_ddr_setup(dev);
> -#else
> - priv->info.base = CONFIG_SYS_SDRAM_BASE;
> - priv->info.size = DDR_MEM_SIZE;
> #endif
> +
> return 0;
> }
>
> --
> 2.7.4
>
Best regards,
Leo
Re: [PATCH v1 4/4] usb: xhci: Add virt_to_phys() to support mapped platforms
Hi Stefan,
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
>
> Some platforms, like MIPS Octeon, use mapped addresses (virtual address
> != physical address). On these platforms we need to make sure, that the
> local virtual addresses are converted to physical (DMA) addresses for
> the xHCI controller. This patch adds the missing virt_to_phys() calls,
> so that the correct addresses are used.
>
> Signed-off-by: Stefan Roese
> Cc: Bin Meng
> Cc: Marek Vasut
>
> ---
>
> drivers/usb/host/xhci-mem.c | 19 +--
> drivers/usb/host/xhci-ring.c | 8
> drivers/usb/host/xhci.c | 3 +--
> 3 files changed, 14 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
> index 3b805ecb9e..874caf4761 100644
> --- a/drivers/usb/host/xhci-mem.c
> +++ b/drivers/usb/host/xhci-mem.c
> @@ -224,7 +224,7 @@ static void xhci_link_segments(struct xhci_segment *prev,
> return;
> prev->next = next;
> if (link_trbs) {
> - val_64 = (uintptr_t)next->trbs;
> + val_64 = virt_to_phys(next->trbs);
> prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr =
> cpu_to_le64(val_64);
>
> @@ -484,7 +484,7 @@ int xhci_alloc_virt_device(struct xhci_ctrl *ctrl,
> unsigned int slot_id)
> /* Allocate endpoint 0 ring */
> virt_dev->eps[0].ring = xhci_ring_alloc(1, true);
>
> - byte_64 = (uintptr_t)(virt_dev->out_ctx->bytes);
> + byte_64 = virt_to_phys(virt_dev->out_ctx->bytes);
>
> /* Point to output device context in dcbaa. */
> ctrl->dcbaa->dev_context_ptrs[slot_id] = cpu_to_le64(byte_64);
> @@ -509,7 +509,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct
> xhci_hccr *hccr,
> uint64_t val_64;
> uint64_t trb_64;
> uint32_t val;
> - unsigned long deq;
> + uint64_t deq;
This change seems unnecessary?
> int i;
> struct xhci_segment *seg;
>
> @@ -521,7 +521,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct
> xhci_hccr *hccr,
> return -ENOMEM;
> }
>
> - val_64 = (uintptr_t)ctrl->dcbaa;
> + val_64 = virt_to_phys(ctrl->dcbaa);
> /* Set the pointer in DCBAA register */
> xhci_writeq(>or_dcbaap, val_64);
>
> @@ -529,7 +529,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct
> xhci_hccr *hccr,
> ctrl->cmd_ring = xhci_ring_alloc(1, true);
>
> /* Set the address in the Command Ring Control register */
> - trb_64 = (uintptr_t)ctrl->cmd_ring->first_seg->trbs;
> + trb_64 = virt_to_phys(ctrl->cmd_ring->first_seg->trbs);
> val_64 = xhci_readq(>or_crcr);
> val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
> (trb_64 & (u64) ~CMD_RING_RSVD_BITS) |
> @@ -559,8 +559,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct
> xhci_hccr *hccr,
> for (val = 0, seg = ctrl->event_ring->first_seg;
> val < ERST_NUM_SEGS;
> val++) {
> - trb_64 = 0;
> - trb_64 = (uintptr_t)seg->trbs;
> + trb_64 = virt_to_phys(seg->trbs);
> struct xhci_erst_entry *entry = >erst.entries[val];
> entry->seg_addr = cpu_to_le64(trb_64);
> entry->seg_size = cpu_to_le32(TRBS_PER_SEGMENT);
> @@ -570,7 +569,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct
> xhci_hccr *hccr,
> xhci_flush_cache((uintptr_t)ctrl->erst.entries,
> ERST_NUM_SEGS * sizeof(struct xhci_erst_entry));
>
> - deq = (unsigned long)ctrl->event_ring->dequeue;
> + deq = virt_to_phys(ctrl->event_ring->dequeue);
>
> /* Update HC event ring dequeue pointer */
> xhci_writeq(>ir_set->erst_dequeue,
> @@ -585,7 +584,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct
> xhci_hccr *hccr,
> /* this is the event ring segment table pointer */
> val_64 = xhci_readq(>ir_set->erst_base);
> val_64 &= ERST_PTR_MASK;
> - val_64 |= ((uintptr_t)(ctrl->erst.entries) & ~ERST_PTR_MASK);
> + val_64 |= virt_to_phys(ctrl->erst.entries) & ~ERST_PTR_MASK;
>
> xhci_writeq(>ir_set->erst_base, val_64);
>
> @@ -853,7 +852,7 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl
> *ctrl,
> cpu_to_le32(((0 & MAX_BURST_MASK) << MAX_BURST_SHIFT)
> |
> ((3 & ERROR_COUNT_MASK) << ERROR_COUNT_SHIFT));
>
> - trb_64 = (uintptr_t)virt_dev->eps[0].ring->first_seg->trbs;
> + trb_64 = virt_to_phys(virt_dev->eps[0].ring->first_seg->trbs);
> ep0_ctx->deq = cpu_to_le64(trb_64 |
> virt_dev->eps[0].ring->cycle_state);
>
> /*
> diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
> index 86aeaab412..092ed6eaf1 100644
> --- a/drivers/usb/host/xhci-ring.c
> +++ b/drivers/usb/host/xhci-ring.c
> @@ -275,7 +275,7 @@ void xhci_queue_command(struct
Re: [PATCH] test/py: efi_secboot: fix Test Case 6c
Heinrich,
On Fri, Jul 17, 2020 at 07:55:03AM +0200, Heinrich Schuchardt wrote:
> On 10.07.20 02:27, AKASHI Takahiro wrote:
> > As the commit cb7116030aff ("efi_loader: time based authentication")
> > fixed the timestamp handling, Test Case 6c has no longer worked as
> > expected.
> > So adjust the timestamp of "dbx" variable.
> >
> > Signed-off-by: AKASHI Takahiro
> > ---
> > test/py/tests/test_efi_secboot/conftest.py| 4 +++-
> > test/py/tests/test_efi_secboot/test_signed.py | 2 --
> > 2 files changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/test/py/tests/test_efi_secboot/conftest.py
> > b/test/py/tests/test_efi_secboot/conftest.py
> > index 94c50f6cf7ca..b74640240318 100644
> > --- a/test/py/tests/test_efi_secboot/conftest.py
> > +++ b/test/py/tests/test_efi_secboot/conftest.py
> > @@ -141,7 +141,9 @@ def efi_boot_env(request, u_boot_config):
> > check_call('cd %s; %shash-to-efi-sig-list helloworld.efi.signed
> > db_hello_signed.hash; %ssign-efi-sig-list -c KEK.crt -k KEK.key db
> > db_hello_signed.hash db_hello_signed.auth'
> > % (mnt_point, EFITOOLS_PATH, EFITOOLS_PATH),
> > shell=True)
> > -check_call('cd %s; %ssign-efi-sig-list -c KEK.crt -k KEK.key dbx
> > db_hello_signed.hash dbx_hello_signed.auth'
> > +# 'sleep 2' here because timestamp should be newer than dbx_db.auth
> > +# See Test Case 6c
> > +check_call('cd %s; sleep 2; %ssign-efi-sig-list -c KEK.crt -k
> > KEK.key dbx db_hello_signed.hash dbx_hello_signed.auth'
>
I will drop this patch, and
> We should not use sleep in tests except when testing time related
> routines. sign-efi-sig-list has a -t parameter for time stamps.
I have already fixed this issue in other tests as well.
Let's discuss locally.
-Takahiro Akashi
>
> See patch bc246c69aecea1
> test: correct time stamps for UEFI authentication
>
> Best regards
>
> Heinrich
>
> > % (mnt_point, EFITOOLS_PATH),
> > shell=True)
> >
> > diff --git a/test/py/tests/test_efi_secboot/test_signed.py
> > b/test/py/tests/test_efi_secboot/test_signed.py
> > index 7531bbac6a5f..8b1e132c756c 100644
> > --- a/test/py/tests/test_efi_secboot/test_signed.py
> > +++ b/test/py/tests/test_efi_secboot/test_signed.py
> > @@ -237,8 +237,6 @@ class TestEfiSignedImage(object):
> > with u_boot_console.log.section('Test Case 6c'):
> > # Test Case 6c, rejected by image's digest in dbx
> > output = u_boot_console.run_command_list([
> > -'fatload host 0:1 400 db.auth',
> > -'setenv -e -nv -bs -rt -at -i 400,$filesize db',
> > 'fatload host 0:1 400 dbx_hello_signed.auth',
> > 'setenv -e -nv -bs -rt -at -i 400,$filesize dbx'])
> > assert 'Failed to set EFI variable' not in ''.join(output)
> >
>
Re: [PATCH] test/py: efi_secboot: fix Test Case 6c
On 10.07.20 02:27, AKASHI Takahiro wrote:
> As the commit cb7116030aff ("efi_loader: time based authentication")
> fixed the timestamp handling, Test Case 6c has no longer worked as
> expected.
> So adjust the timestamp of "dbx" variable.
>
> Signed-off-by: AKASHI Takahiro
> ---
> test/py/tests/test_efi_secboot/conftest.py| 4 +++-
> test/py/tests/test_efi_secboot/test_signed.py | 2 --
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/test/py/tests/test_efi_secboot/conftest.py
> b/test/py/tests/test_efi_secboot/conftest.py
> index 94c50f6cf7ca..b74640240318 100644
> --- a/test/py/tests/test_efi_secboot/conftest.py
> +++ b/test/py/tests/test_efi_secboot/conftest.py
> @@ -141,7 +141,9 @@ def efi_boot_env(request, u_boot_config):
> check_call('cd %s; %shash-to-efi-sig-list helloworld.efi.signed
> db_hello_signed.hash; %ssign-efi-sig-list -c KEK.crt -k KEK.key db
> db_hello_signed.hash db_hello_signed.auth'
> % (mnt_point, EFITOOLS_PATH, EFITOOLS_PATH),
> shell=True)
> -check_call('cd %s; %ssign-efi-sig-list -c KEK.crt -k KEK.key dbx
> db_hello_signed.hash dbx_hello_signed.auth'
> +# 'sleep 2' here because timestamp should be newer than dbx_db.auth
> +# See Test Case 6c
> +check_call('cd %s; sleep 2; %ssign-efi-sig-list -c KEK.crt -k
> KEK.key dbx db_hello_signed.hash dbx_hello_signed.auth'
We should not use sleep in tests except when testing time related
routines. sign-efi-sig-list has a -t parameter for time stamps.
See patch bc246c69aecea1
test: correct time stamps for UEFI authentication
Best regards
Heinrich
> % (mnt_point, EFITOOLS_PATH),
> shell=True)
>
> diff --git a/test/py/tests/test_efi_secboot/test_signed.py
> b/test/py/tests/test_efi_secboot/test_signed.py
> index 7531bbac6a5f..8b1e132c756c 100644
> --- a/test/py/tests/test_efi_secboot/test_signed.py
> +++ b/test/py/tests/test_efi_secboot/test_signed.py
> @@ -237,8 +237,6 @@ class TestEfiSignedImage(object):
> with u_boot_console.log.section('Test Case 6c'):
> # Test Case 6c, rejected by image's digest in dbx
> output = u_boot_console.run_command_list([
> -'fatload host 0:1 400 db.auth',
> -'setenv -e -nv -bs -rt -at -i 400,$filesize db',
> 'fatload host 0:1 400 dbx_hello_signed.auth',
> 'setenv -e -nv -bs -rt -at -i 400,$filesize dbx'])
> assert 'Failed to set EFI variable' not in ''.join(output)
>
[PATCH 1/3] treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()
Use the _ptr suffixed variant instead of casting. Also, convert it to
dev_read_addr_ptr(), which is safe to CONFIG_OF_LIVE.
One curious part is an error check like follows in
drivers/watchdog/omap_wdt.c:
priv->regs = (struct wd_timer *)devfdt_get_addr(dev);
if (!priv->regs)
return -EINVAL;
devfdt_get_addr() returns FDT_ADDR_T_NONE (i.e. -1) on error.
So, this code does not catch any error in DT parsing.
dev_read_addr_ptr() returns NULL on error, so this error check
will work.
I generated this commit by the following command:
$ find . -name .git -prune -o -name '*.[ch]' -type f -print | \
xargs sed -i -e 's/([^*)]*\*)devfdt_get_addr(/dev_read_addr_ptr(/'
I manually fixed drivers/usb/host/ehci-mx6.c
Signed-off-by: Masahiro Yamada
---
drivers/adc/exynos-adc.c| 2 +-
drivers/clk/renesas/clk-rcar-gen2.c | 2 +-
drivers/clk/renesas/clk-rcar-gen3.c | 2 +-
drivers/gpio/gpio-rcar.c| 2 +-
drivers/gpio/mvebu_gpio.c | 2 +-
drivers/gpio/s5p_gpio.c | 2 +-
drivers/gpio/sunxi_gpio.c | 2 +-
drivers/i2c/at91_i2c.c | 2 +-
drivers/i2c/davinci_i2c.c | 2 +-
drivers/i2c/exynos_hs_i2c.c | 2 +-
drivers/i2c/s3c24x0_i2c.c | 2 +-
drivers/input/tegra-kbc.c | 2 +-
drivers/mmc/aspeed_sdhci.c | 2 +-
drivers/mmc/atmel_sdhci.c | 2 +-
drivers/mmc/ftsdc010_mci.c | 2 +-
drivers/mmc/hi6220_dw_mmc.c | 2 +-
drivers/mmc/iproc_sdhci.c | 2 +-
drivers/mmc/msm_sdhci.c | 2 +-
drivers/mmc/mv_sdhci.c | 2 +-
drivers/mmc/socfpga_dw_mmc.c| 2 +-
drivers/mmc/sti_sdhci.c | 2 +-
drivers/mmc/xenon_sdhci.c | 2 +-
drivers/pci_endpoint/pcie-cadence-ep.c | 2 +-
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 2 +-
drivers/pwm/exynos_pwm.c| 2 +-
drivers/pwm/pwm-imx.c | 2 +-
drivers/pwm/pwm-mtk.c | 2 +-
drivers/pwm/sunxi_pwm.c | 2 +-
drivers/serial/serial_arc.c | 2 +-
drivers/serial/serial_xuartlite.c | 2 +-
drivers/spi/atmel_spi.c | 2 +-
drivers/spi/designware_spi.c| 2 +-
drivers/spi/exynos_spi.c| 2 +-
drivers/spi/kirkwood_spi.c | 2 +-
drivers/spi/mtk_snfi_spi.c | 2 +-
drivers/spi/mvebu_a3700_spi.c | 2 +-
drivers/spi/zynq_spi.c | 2 +-
drivers/usb/host/ehci-mx5.c | 2 +-
drivers/usb/host/ehci-mx6.c | 4 ++--
drivers/usb/host/ehci-omap.c| 2 +-
drivers/usb/host/ehci-vf.c | 2 +-
drivers/usb/host/ohci-da8xx.c | 2 +-
drivers/usb/host/ohci-generic.c | 2 +-
drivers/video/atmel_hlcdfb.c| 2 +-
drivers/video/tegra.c | 2 +-
drivers/watchdog/omap_wdt.c | 2 +-
46 files changed, 47 insertions(+), 47 deletions(-)
diff --git a/drivers/adc/exynos-adc.c b/drivers/adc/exynos-adc.c
index 12c49fc8ce..b459b57050 100644
--- a/drivers/adc/exynos-adc.c
+++ b/drivers/adc/exynos-adc.c
@@ -106,7 +106,7 @@ int exynos_adc_ofdata_to_platdata(struct udevice *dev)
struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
struct exynos_adc_priv *priv = dev_get_priv(dev);
- priv->regs = (struct exynos_adc_v2 *)devfdt_get_addr(dev);
+ priv->regs = dev_read_addr_ptr(dev);
if (priv->regs == (struct exynos_adc_v2 *)FDT_ADDR_T_NONE) {
pr_err("Dev: %s - can't get address!", dev->name);
return -ENODATA;
diff --git a/drivers/clk/renesas/clk-rcar-gen2.c
b/drivers/clk/renesas/clk-rcar-gen2.c
index 3ed0aa92cb..16da10c8dd 100644
--- a/drivers/clk/renesas/clk-rcar-gen2.c
+++ b/drivers/clk/renesas/clk-rcar-gen2.c
@@ -283,7 +283,7 @@ int gen2_clk_probe(struct udevice *dev)
u32 cpg_mode;
int ret;
- priv->base = (struct gen2_base *)devfdt_get_addr(dev);
+ priv->base = dev_read_addr_ptr(dev);
if (!priv->base)
return -EINVAL;
diff --git a/drivers/clk/renesas/clk-rcar-gen3.c
b/drivers/clk/renesas/clk-rcar-gen3.c
index 15e3833756..30a101fe86 100644
--- a/drivers/clk/renesas/clk-rcar-gen3.c
+++ b/drivers/clk/renesas/clk-rcar-gen3.c
@@ -359,7 +359,7 @@ int gen3_clk_probe(struct udevice *dev)
u32 cpg_mode;
int ret;
- priv->base = (struct gen3_base *)devfdt_get_addr(dev);
+ priv->base = dev_read_addr_ptr(dev);
if (!priv->base)
return -EINVAL;
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index c49a041059..a993fd4d70 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@
[PATCH 2/3] treewide: remove (phys_addr_t) casts from devfdt_get_addr()
This cast is unneeded. Signed-off-by: Masahiro Yamada --- drivers/net/fec_mxc.c | 2 +- drivers/net/fsl_mcdmafec.c| 2 +- drivers/net/mcffec.c | 2 +- drivers/net/xilinx_axi_emac.c | 2 +- drivers/net/xilinx_emaclite.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 992180df86..3244b15c1d 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1533,7 +1533,7 @@ static int fecmxc_ofdata_to_platdata(struct udevice *dev) struct fec_priv *priv = dev_get_priv(dev); const char *phy_mode; - pdata->iobase = (phys_addr_t)devfdt_get_addr(dev); + pdata->iobase = devfdt_get_addr(dev); priv->eth = (struct ethernet_regs *)pdata->iobase; pdata->phy_interface = -1; diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c index 73e92b7a0d..712071cc2b 100644 --- a/drivers/net/fsl_mcdmafec.c +++ b/drivers/net/fsl_mcdmafec.c @@ -570,7 +570,7 @@ static int mcdmafec_ofdata_to_platdata(struct udevice *dev) struct eth_pdata *pdata = dev_get_platdata(dev); const u32 *val; - pdata->iobase = (phys_addr_t)devfdt_get_addr(dev); + pdata->iobase = devfdt_get_addr(dev); /* Default to 10Mbit/s */ pdata->max_speed = 10; diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c index 697549301f..aef3c09b2c 100644 --- a/drivers/net/mcffec.c +++ b/drivers/net/mcffec.c @@ -589,7 +589,7 @@ static int mcffec_ofdata_to_platdata(struct udevice *dev) struct eth_pdata *pdata = dev_get_platdata(dev); const u32 *val; - pdata->iobase = (phys_addr_t)devfdt_get_addr(dev); + pdata->iobase = devfdt_get_addr(dev); /* Default to 10Mbit/s */ pdata->max_speed = 10; diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c index 2cd5596768..35176c545e 100644 --- a/drivers/net/xilinx_axi_emac.c +++ b/drivers/net/xilinx_axi_emac.c @@ -722,7 +722,7 @@ static int axi_emac_ofdata_to_platdata(struct udevice *dev) int offset = 0; const char *phy_mode; - pdata->iobase = (phys_addr_t)devfdt_get_addr(dev); + pdata->iobase = devfdt_get_addr(dev); priv->iobase = (struct axi_regs *)pdata->iobase; offset = fdtdec_lookup_phandle(gd->fdt_blob, node, diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index 9bdb6798b6..e7f7e6ad1d 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -599,7 +599,7 @@ static int emaclite_ofdata_to_platdata(struct udevice *dev) struct xemaclite *emaclite = dev_get_priv(dev); int offset = 0; - pdata->iobase = (phys_addr_t)devfdt_get_addr(dev); + pdata->iobase = devfdt_get_addr(dev); emaclite->regs = (struct emaclite_regs *)ioremap_nocache(pdata->iobase, 0x1); -- 2.25.1
[PATCH 3/3] treewide: convert devfdt_get_addr() to dev_read_addr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) Signed-off-by: Masahiro Yamada --- arch/arm/mach-snapdragon/clock-snapdragon.c | 2 +- arch/arm/mach-snapdragon/pinctrl-snapdragon.c| 2 +- drivers/ata/dwc_ahci.c | 2 +- drivers/clk/altera/clk-agilex.c | 2 +- drivers/clk/altera/clk-arria10.c | 2 +- drivers/clk/exynos/clk-exynos7420.c | 4 ++-- drivers/clk/uniphier/clk-uniphier-core.c | 2 +- drivers/dma/ti-edma3.c | 2 +- drivers/gpio/altera_pio.c| 2 +- drivers/gpio/atmel_pio4.c| 2 +- drivers/gpio/bcm2835_gpio.c | 2 +- drivers/gpio/da8xx_gpio.c| 2 +- drivers/gpio/gpio-rza1.c | 2 +- drivers/gpio/gpio-uniphier.c | 2 +- drivers/gpio/msm_gpio.c | 2 +- drivers/gpio/mxc_gpio.c | 2 +- drivers/gpio/mxs_gpio.c | 2 +- drivers/gpio/omap_gpio.c | 4 ++-- drivers/gpio/pm8916_gpio.c | 2 +- drivers/gpio/s5p_gpio.c | 2 +- drivers/gpio/sifive-gpio.c | 2 +- drivers/gpio/vybrid_gpio.c | 2 +- drivers/i2c/i2c-uniphier-f.c | 2 +- drivers/i2c/i2c-uniphier.c | 2 +- drivers/i2c/imx_lpi2c.c | 2 +- drivers/i2c/iproc_i2c.c | 2 +- drivers/i2c/mxc_i2c.c| 2 +- drivers/i2c/omap24xx_i2c.c | 2 +- drivers/mailbox/tegra-hsp.c | 2 +- drivers/misc/altera_sysid.c | 2 +- drivers/misc/imx8/scu.c | 2 +- drivers/misc/microchip_flexcom.c | 2 +- drivers/mmc/bcm2835_sdhci.c | 2 +- drivers/mmc/bcm2835_sdhost.c | 2 +- drivers/mmc/bcmstb_sdhci.c | 2 +- drivers/mmc/jz_mmc.c | 2 +- drivers/mmc/meson_gx_mmc.c | 2 +- drivers/mmc/omap_hsmmc.c | 4 ++-- drivers/mmc/sdhci-cadence.c | 2 +- drivers/mmc/sh_mmcif.c | 2 +- drivers/mmc/sh_sdhi.c| 2 +- drivers/mmc/tangier_sdhci.c | 2 +- drivers/mmc/tmio-common.c| 2 +- drivers/net/ag7xxx.c | 2 +- drivers/net/dwc_eth_qos.c| 2 +- drivers/net/ethoc.c | 2 +- drivers/net/fec_mxc.c| 2 +- drivers/net/fsl_mcdmafec.c | 2 +- drivers/net/ftgmac100.c | 2 +- drivers/net/ftmac100.c | 2 +- drivers/net/ks8851_mll.c | 2 +- drivers/net/mcffec.c | 2 +- drivers/net/mtk_eth.c| 2 +- drivers/net/mvgbe.c | 2 +- drivers/net/mvneta.c | 2 +- drivers/net/ravb.c | 2 +- drivers/net/sh_eth.c | 2 +- drivers/net/sni_ave.c| 2 +- drivers/net/sun8i_emac.c | 2 +- drivers/net/sunxi_emac.c | 2 +- drivers/net/ti/keystone_net.c| 2 +- drivers/net/xilinx_axi_emac.c| 2 +- drivers/net/xilinx_emaclite.c| 2 +- drivers/pinctrl/ath79/pinctrl_ar933x.c | 2 +- drivers/pinctrl/ath79/pinctrl_qca953x.c | 2 +- drivers/pinctrl/exynos/pinctrl-exynos.c | 2 +- drivers/pinctrl/pinctrl-at91-pio4.c | 2 +- drivers/pinctrl/renesas/pfc-r7s72100.c | 2 +- drivers/pinctrl/renesas/pfc.c| 2 +- drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 2 +- drivers/reset/reset-uniphier.c | 2 +- drivers/rtc/mvrtc.c | 2 +- drivers/serial/altera_jtag_uart.c| 2 +- drivers/serial/altera_uart.c | 2 +- drivers/serial/atmel_usart.c | 2 +- drivers/serial/serial_ar933x.c | 2 +- drivers/serial/serial_bcm283x_mu.c | 2 +- drivers/serial/serial_lpuart.c | 2 +- drivers/serial/serial_mcf.c | 2 +- drivers/serial/serial_meson.c| 2 +- drivers/serial/serial_msm.c | 2 +- drivers/serial/serial_mxc.c
Re: [PATCH v1 3/4] usb: usb-uclass.c: Drop le16_to_cpu() as values are already swapped
Hi Stefan,
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote:
>
> These values are already swapped to CPU endianess, so swapping them
Can you please add more details as to when these values are swapped? I
assume this is inside usb_select_config() which is called before this
function is called?
But I wonder how this code ever worked on ARM/x86?
> again is a bug. Let's remove the swap here instead.
>
> Signed-off-by: Stefan Roese
> Cc: Bin Meng
> Cc: Marek Vasut
> ---
>
> drivers/usb/host/usb-uclass.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
> index cb79dfbbd5..aa08d4ffc6 100644
> --- a/drivers/usb/host/usb-uclass.c
> +++ b/drivers/usb/host/usb-uclass.c
> @@ -416,21 +416,21 @@ static int usb_match_device(const struct
> usb_device_descriptor *desc,
> const struct usb_device_id *id)
> {
> if ((id->match_flags & USB_DEVICE_ID_MATCH_VENDOR) &&
> - id->idVendor != le16_to_cpu(desc->idVendor))
> + id->idVendor != desc->idVendor)
> return 0;
>
> if ((id->match_flags & USB_DEVICE_ID_MATCH_PRODUCT) &&
> - id->idProduct != le16_to_cpu(desc->idProduct))
> + id->idProduct != desc->idProduct)
> return 0;
>
> /* No need to test id->bcdDevice_lo != 0, since 0 is never
>greater than any unsigned number. */
> if ((id->match_flags & USB_DEVICE_ID_MATCH_DEV_LO) &&
> - (id->bcdDevice_lo > le16_to_cpu(desc->bcdDevice)))
> + (id->bcdDevice_lo > desc->bcdDevice))
> return 0;
>
> if ((id->match_flags & USB_DEVICE_ID_MATCH_DEV_HI) &&
> - (id->bcdDevice_hi < le16_to_cpu(desc->bcdDevice)))
> + (id->bcdDevice_hi < desc->bcdDevice))
> return 0;
>
> if ((id->match_flags & USB_DEVICE_ID_MATCH_DEV_CLASS) &&
Reviewed-by: Bin Meng
Regards,
Bin
Re: [PATCH v1 2/4] usb: xhci: xhci_mem_init: Use cpu_to_le64() and not xhci_writeq()
Hi Stefan, On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote: > > xhci_writeq() makes the CPU->LE swapping only when addressing registers > in the xHCI controller address range and not in the local memory (RAM). Is the above behavior exposed by the MIPS platform's writel()? > We need to use cpu_to_le64() here to ensure that the conversion is done > correctly. > > Signed-off-by: Stefan Roese > Cc: Bin Meng > Cc: Marek Vasut > --- > > drivers/usb/host/xhci-mem.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c > index bd959b4093..3b805ecb9e 100644 > --- a/drivers/usb/host/xhci-mem.c > +++ b/drivers/usb/host/xhci-mem.c > @@ -562,7 +562,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct > xhci_hccr *hccr, > trb_64 = 0; > trb_64 = (uintptr_t)seg->trbs; > struct xhci_erst_entry *entry = >erst.entries[val]; > - xhci_writeq(>seg_addr, trb_64); > + entry->seg_addr = cpu_to_le64(trb_64); > entry->seg_size = cpu_to_le32(TRBS_PER_SEGMENT); > entry->rsvd = 0; > seg = seg->next; Reviewed-by: Bin Meng Regards, Bin
Re: [PATCH v1 1/4] usb: xhci: Add missing endian conversions (cpu_to_leXX / leXX_to_cpu)
On Thu, Jul 2, 2020 at 4:47 PM Stefan Roese wrote: > > While trying to use the U-Boot xHCI driver on the MIPS Octeon platform, > which is big endian, I noticed that the driver is missing a few endian > conversion calls. This patch adds these missing endian conversion > calls. > > Signed-off-by: Stefan Roese > Cc: Bin Meng > Cc: Marek Vasut > --- > > drivers/usb/host/xhci-mem.c | 9 + > 1 file changed, 5 insertions(+), 4 deletions(-) > Good catch! It's hard to detect these problems if we only validate xHCI on ARM/x86 which are little-endian. Apparently there is no xHCI on PPC, so MIPS becomes the first big endian platform using xHCI. Reviewed-by: Bin Meng
[PATCH v2] efi_loader: Rename and correct values for ARM_SMC_MM_*
Instead of adding the definition for the specific MM SVC used in
StandAloneMM we added the one used in the standard SMC calls.
So change the value from -4 to -5 to match the correct one defined in
EDK2 and rename them to avoid future confusion
Fixes 23a397d2e2fb: ("efi_loader: Add headers for EDK2 StandAloneMM
communication")
Signed-off-by: Ilias Apalodimas
---
Changes since v1:
- v1 was efi_loader: Correct value for ARM_SMC_MM_RET_NO_MEMORY
- Renamed all the definitions according to EDK2
include/mm_communication.h| 16
lib/efi_loader/efi_variable_tee.c | 8
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/include/mm_communication.h b/include/mm_communication.h
index f9c05bb7f104..e464cbb48e22 100644
--- a/include/mm_communication.h
+++ b/include/mm_communication.h
@@ -52,14 +52,14 @@ struct efi_mm_communicate_header {
#define MM_COMMUNICATE_HEADER_SIZE \
(sizeof(struct efi_mm_communicate_header))
-/* Defined in EDK2 ArmPkg/Include/IndustryStandard/ArmStdSmc.h */
-
-/* MM return error codes */
-#define ARM_SMC_MM_RET_SUCCESS 0
-#define ARM_SMC_MM_RET_NOT_SUPPORTED -1
-#define ARM_SMC_MM_RET_INVALID_PARAMS -2
-#define ARM_SMC_MM_RET_DENIED -3
-#define ARM_SMC_MM_RET_NO_MEMORY -4
+/* Defined in EDK2 ArmPkg/Include/IndustryStandard/ArmMmSvc.h */
+
+/* SPM return error codes */
+#define ARM_SVC_SPM_RET_SUCCESS 0
+#define ARM_SVC_SPM_RET_NOT_SUPPORTED-1
+#define ARM_SVC_SPM_RET_INVALID_PARAMS -2
+#define ARM_SVC_SPM_RET_DENIED -3
+#define ARM_SVC_SPM_RET_NO_MEMORY-5
/* Defined in EDK2 MdeModulePkg/Include/Guid/SmmVariableCommon.h */
diff --git a/lib/efi_loader/efi_variable_tee.c
b/lib/efi_loader/efi_variable_tee.c
index c0423489388a..5f4aae60bf23 100644
--- a/lib/efi_loader/efi_variable_tee.c
+++ b/lib/efi_loader/efi_variable_tee.c
@@ -106,19 +106,19 @@ static efi_status_t optee_mm_communicate(void *comm_buf,
ulong dsize)
tee_close_session(conn.tee, conn.session);
switch (param[1].u.value.a) {
- case ARM_SMC_MM_RET_SUCCESS:
+ case ARM_SVC_SPM_RET_SUCCESS:
ret = EFI_SUCCESS;
break;
- case ARM_SMC_MM_RET_INVALID_PARAMS:
+ case ARM_SVC_SPM_RET_INVALID_PARAMS:
ret = EFI_INVALID_PARAMETER;
break;
- case ARM_SMC_MM_RET_DENIED:
+ case ARM_SVC_SPM_RET_DENIED:
ret = EFI_ACCESS_DENIED;
break;
- case ARM_SMC_MM_RET_NO_MEMORY:
+ case ARM_SVC_SPM_RET_NO_MEMORY:
ret = EFI_OUT_OF_RESOURCES;
break;
--
2.28.0.rc0
Re: [PATCH v4 00/25] x86: Enhance MTRR functionality to support multiple CPUs
Hi Simon, On Fri, Jul 17, 2020 at 11:24 AM Simon Glass wrote: > > Hi Bin, > > On Tue, 7 Jul 2020 at 19:36, Simon Glass wrote: > > > > At present MTRRs are mirrored to the secondary CPUs only once, as those > > CPUs are started up. But U-Boot may add more MTRRs later, e.g. if it > > decides that a video console must be set up. > > > > This series enhances the x86 multi-processor support to allow MTRRs to > > be updated at any time. It also updates the 'mtrr' command to support > > setting the MTRRs on CPUs other than the boot CPU. > > > > Changes in v4: > > - Update get_bsp() to return zero when SMP is not inited > > - Add a Kconfig to control this feature, enabled only on APL > > - Only enable this feature of CONFIG_SMP_AP_WORK is enabled > > - Allow running on the BSP if SMP is not enabled > > - Update mp_next_cpu() to stop if CONFIG_SMP_AP_WORK is not enabled > > Is anything else needed with this series? This series needs to be rebased on top of u-boot-x86/master. Currently it does not apply. Regards, Bin
Re: [PATCH] mtd: mtdpart: use uint64_t instead of int for cur_off
Hello Martin, Am 13.07.2020 um 14:40 schrieb Martin Kaistra: The types of "offset" and "size" of "struct mtd_partition" are uint64_t, while mtd_parse_partitions() uses int to work with these values. When the offset reaches 2GB, it is interpreted as a negative value, which leads to error messages like mtd: partition "" is out of reach -- disabled eg. when using the "ubi part" command. Fix this by using uint64_t for cur_off and cur_sz. Signed-off-by: Martin Kaistra Reviewed-by: Kurt Kanzenbach --- drivers/mtd/mtdpart.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Heiko Schocher bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
[PATCH] sandbox: enable FIT cipher support in defconfig
From: Patrick Oppenlander Linux distributions generally use the "make defconfig && make tools-all" recipe to generate a uboot-tools (or similar) package. This patch enables FIT cipher support in the default mkimage build. Signed-off-by: Patrick Oppenlander --- configs/sandbox_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 9b74e404bb..002e4c7d66 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -7,6 +7,7 @@ CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_CIPHER=y CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTSTAGE=y -- 2.27.0
Re: [PATCH] mmc: msm_sdhci: Use mmc_of_parse for setting host_caps
I tested the patch using, https://snapshots.linaro.org/96boards/dragonboard410c/linaro/uboot/28/ And now the mmc devices appears. On Thu, 16 Jul 2020 at 04:07, Manivannan Sadhasivam < manivannan.sadhasi...@linaro.org> wrote: > Since the introduction of 'get_cd' callback in sdhci core, > dragonboard410c's MMC interface is broken. It turns out that 'get_cd' > callback checks for the host_caps for validating the chip select. And > since the msm_sdhci driver is not parsing the host_caps from DT, not > all of the cababilities are parsed properly. This results in the MMC > interfaces to be broken. > > Hence, fix this by adding a call to 'mmc_of_parse' during driver probe. > > Signed-off-by: Manivannan Sadhasivam > Tested-by: Aníbal Limón > --- > drivers/mmc/msm_sdhci.c | 4 > 1 file changed, 4 insertions(+) > > diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c > index da3ae2ec35..23e2e0fbc3 100644 > --- a/drivers/mmc/msm_sdhci.c > +++ b/drivers/mmc/msm_sdhci.c > @@ -142,6 +142,10 @@ static int msm_sdc_probe(struct udevice *dev) > writel(caps, host->ioaddr + > SDHCI_VENDOR_SPEC_CAPABILITIES0); > } > > + ret = mmc_of_parse(dev, >cfg); > + if (ret) > + return ret; > + > host->mmc = >mmc; > host->mmc->dev = dev; > ret = sdhci_setup_cfg(>cfg, host, 0, 0); > -- > 2.17.1 > >
[PATCH v3 10/10] acpi: Enable ACPI table generation by default on x86
This should ideally be used by all x86 boards in U-Boot. Enable it by default. If some boards don't use it, the cost is small. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Changes in v3: - Rebase to x86/master Changes in v2: - Don't enable this for qemu arch/Kconfig | 1 + drivers/core/Kconfig | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/Kconfig b/arch/Kconfig index a11f872938..9be02d1319 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -190,6 +190,7 @@ config X86 imply PCH imply RTC_MC146818 imply IRQ + imply ACPIGEN if !QEMU # Thing to enable for when SPL/TPL are enabled: SPL imply SPL_DM diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index a594899f37..00d1d80dc3 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -270,7 +270,7 @@ config DM_DEV_READ_INLINE config ACPIGEN bool "Support ACPI table generation in driver model" - default y if SANDBOX || GENERATE_ACPI_TABLE + default y if SANDBOX || (GENERATE_ACPI_TABLE && !QEMU) help This option enables generation of ACPI tables using driver-model devices. It adds a new operation struct to each driver, to support -- 2.28.0.rc0.105.gf9edc3c819-goog
[PATCH v3 09/10] x86: Rename board_final_cleanup() to board_final_init()
This function sounds like something that is called when U-Boot is about to
jump to Linux. In fact it is an init function.
Rename it to reduce confusion.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/cpu/coreboot/coreboot.c | 4 ++--
arch/x86/cpu/cpu.c | 8
arch/x86/cpu/efi/app.c | 2 +-
arch/x86/cpu/quark/quark.c | 2 +-
arch/x86/lib/fsp/fsp_common.c| 2 +-
5 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index d44db1347b..22a93254a9 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -42,7 +42,7 @@ int print_cpuinfo(void)
return default_print_cpuinfo();
}
-static void board_final_cleanup(void)
+static void board_final_init(void)
{
/*
* Un-cache the ROM so the kernel has one
@@ -80,7 +80,7 @@ int last_stage_init(void)
if (CONFIG_IS_ENABLED(USB_KEYBOARD))
usb_init();
- board_final_cleanup();
+ board_final_init();
return 0;
}
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 9ef797b41b..98ed66e67d 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -179,10 +179,10 @@ void show_boot_progress(int val)
#if !defined(CONFIG_SYS_COREBOOT) && !defined(CONFIG_EFI_STUB)
/*
- * Implement a weak default function for boards that optionally
- * need to clean up the system before jumping to the kernel.
+ * Implement a weak default function for boards that need to do some final init
+ * before the system is ready.
*/
-__weak void board_final_cleanup(void)
+__weak void board_final_init(void)
{
}
@@ -190,7 +190,7 @@ int last_stage_init(void)
{
struct acpi_fadt __maybe_unused *fadt;
- board_final_cleanup();
+ board_final_init();
if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
fadt = acpi_find_fadt();
diff --git a/arch/x86/cpu/efi/app.c b/arch/x86/cpu/efi/app.c
index 10677ecbc2..f754489784 100644
--- a/arch/x86/cpu/efi/app.c
+++ b/arch/x86/cpu/efi/app.c
@@ -24,7 +24,7 @@ int print_cpuinfo(void)
return default_print_cpuinfo();
}
-void board_final_cleanup(void)
+void board_final_init(void)
{
}
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index ddad02e375..30b4711b9a 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -363,7 +363,7 @@ int arch_misc_init(void)
return 0;
}
-void board_final_cleanup(void)
+void board_final_init(void)
{
struct quark_rcba *rcba;
u32 base, val;
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index 8e3082d4c8..ea52954725 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -47,7 +47,7 @@ int fsp_init_phase_pci(void)
return status ? -EPERM : 0;
}
-void board_final_cleanup(void)
+void board_final_init(void)
{
u32 status;
--
2.28.0.rc0.105.gf9edc3c819-goog
[PATCH v3 08/10] x86: acpi: Correct the version of the MADT
Currently U-Boot implements version 2 but reports version 4. Correct it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Reviewed-by: Wolfgang Wallner --- (no changes since v2) Changes in v2: - Use ACPI_MADT_REV_ACPI_3_0 instead of the open-coded value arch/x86/lib/acpi_table.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index d2bc3386eb..3a93fedfc3 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -155,7 +155,7 @@ static void acpi_create_madt(struct acpi_madt *madt) /* Fill out header fields */ acpi_fill_header(header, "APIC"); header->length = sizeof(struct acpi_madt); - header->revision = 4; + header->revision = ACPI_MADT_REV_ACPI_3_0; madt->lapic_addr = LAPIC_DEFAULT_BASE; madt->flags = ACPI_MADT_PCAT_COMPAT; -- 2.28.0.rc0.105.gf9edc3c819-goog
Re: [PATCH v4 00/25] x86: Enhance MTRR functionality to support multiple CPUs
Hi Bin, On Tue, 7 Jul 2020 at 19:36, Simon Glass wrote: > > At present MTRRs are mirrored to the secondary CPUs only once, as those > CPUs are started up. But U-Boot may add more MTRRs later, e.g. if it > decides that a video console must be set up. > > This series enhances the x86 multi-processor support to allow MTRRs to > be updated at any time. It also updates the 'mtrr' command to support > setting the MTRRs on CPUs other than the boot CPU. > > Changes in v4: > - Update get_bsp() to return zero when SMP is not inited > - Add a Kconfig to control this feature, enabled only on APL > - Only enable this feature of CONFIG_SMP_AP_WORK is enabled > - Allow running on the BSP if SMP is not enabled > - Update mp_next_cpu() to stop if CONFIG_SMP_AP_WORK is not enabled Is anything else needed with this series? Regards, Simon
[PATCH v3 07/10] x86: Drop setup_pcat_compatibility()
This function does not exist anymore. Drop it from the header file.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
(no changes since v2)
Changes in v2:
- Remove the function from zimage.c also
arch/x86/include/asm/u-boot-x86.h | 2 --
arch/x86/lib/zimage.c | 10 --
2 files changed, 12 deletions(-)
diff --git a/arch/x86/include/asm/u-boot-x86.h
b/arch/x86/include/asm/u-boot-x86.h
index bd3f44014c..d732661f6d 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -83,8 +83,6 @@ int default_print_cpuinfo(void);
/* Set up a UART which can be used with printch(), printhex8(), etc. */
int setup_internal_uart(int enable);
-void setup_pcat_compatibility(void);
-
void isa_unmap_rom(u32 addr);
u32 isa_map_rom(u32 bus_addr, int size);
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index 64d14e8911..d2b6002008 100644
--- a/arch/x86/lib/zimage.c
+++ b/arch/x86/lib/zimage.c
@@ -304,13 +304,6 @@ int setup_zimage(struct boot_params *setup_base, char
*cmd_line, int auto_boot,
return 0;
}
-void setup_pcat_compatibility(void)
- __attribute__((weak, alias("__setup_pcat_compatibility")));
-
-void __setup_pcat_compatibility(void)
-{
-}
-
int do_zboot(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
struct boot_params *base_ptr;
@@ -323,9 +316,6 @@ int do_zboot(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
disable_interrupts();
- /* Setup board for maximum PC/AT Compatibility */
- setup_pcat_compatibility();
-
if (argc >= 2) {
/* argv[1] holds the address of the bzImage */
s = argv[1];
--
2.28.0.rc0.105.gf9edc3c819-goog
[PATCH v3 02/10] x86: Add debugging to table writing
Writing tables is currently pretty opaque. Add a bit of debugging to the
process so we can see what tables are written and where they start/end in
memory.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/lib/tables.c | 38 --
1 file changed, 28 insertions(+), 10 deletions(-)
diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index 574d331d76..7bad5dd303 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -4,6 +4,7 @@
*/
#include
+#include
#include
#include
#include
@@ -20,21 +21,32 @@
*/
typedef ulong (*table_write)(ulong addr);
-static table_write table_write_funcs[] = {
+/**
+ * struct table_info - Information about each table to write
+ *
+ * @name: Name of table (for debugging)
+ * @write: Function to call to write this table
+ */
+struct table_info {
+ const char *name;
+ table_write write;
+};
+
+static struct table_info table_list[] = {
#ifdef CONFIG_GENERATE_PIRQ_TABLE
- write_pirq_routing_table,
+ { "pirq", write_pirq_routing_table },
#endif
#ifdef CONFIG_GENERATE_SFI_TABLE
- write_sfi_table,
+ { "sfi", write_sfi_table, },
#endif
#ifdef CONFIG_GENERATE_MP_TABLE
- write_mp_table,
+ { "mp", write_mp_table, },
#endif
#ifdef CONFIG_GENERATE_ACPI_TABLE
- write_acpi_tables,
+ { "acpi", write_acpi_tables, },
#endif
#ifdef CONFIG_GENERATE_SMBIOS_TABLE
- write_smbios_table,
+ { "smbios", write_smbios_table, },
#endif
};
@@ -58,19 +70,22 @@ void write_tables(void)
u32 rom_table_end;
#ifdef CONFIG_SEABIOS
u32 high_table, table_size;
- struct memory_area cfg_tables[ARRAY_SIZE(table_write_funcs) + 1];
+ struct memory_area cfg_tables[ARRAY_SIZE(table_list) + 1];
#endif
int i;
- for (i = 0; i < ARRAY_SIZE(table_write_funcs); i++) {
- rom_table_end = table_write_funcs[i](rom_table_start);
+ debug("Writing tables to %x:\n", rom_table_start);
+ for (i = 0; i < ARRAY_SIZE(table_list); i++) {
+ const struct table_info *table = _list[i];
+
+ rom_table_end = table->write(rom_table_start);
rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
#ifdef CONFIG_SEABIOS
table_size = rom_table_end - rom_table_start;
high_table = (u32)high_table_malloc(table_size);
if (high_table) {
- table_write_funcs[i](high_table);
+ table->write(high_table);
cfg_tables[i].start = high_table;
cfg_tables[i].size = table_size;
@@ -79,6 +94,8 @@ void write_tables(void)
}
#endif
+ debug("- wrote '%s' to %x, end %x\n", table->name,
+ rom_table_start, rom_table_end);
rom_table_start = rom_table_end;
}
@@ -87,4 +104,5 @@ void write_tables(void)
cfg_tables[i].size = 0;
write_coreboot_table(CB_TABLE_ADDR, cfg_tables);
#endif
+ debug("- done writing tables\n");
}
--
2.28.0.rc0.105.gf9edc3c819-goog
[PATCH v3 03/10] x86: apl: Set the correct boot mode in the FSP-M code
If there is MRC information we should run FSP-M with a different
boot_mode flag since it is supposed to do a 'fast path' through the
memory init. Fix this.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
Reviewed-by: Bin Meng
---
(no changes since v2)
Changes in v2:
- Add a new commit to handle the boot_mode fix
arch/x86/cpu/apollolake/fsp_m.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/cpu/apollolake/fsp_m.c b/arch/x86/cpu/apollolake/fsp_m.c
index 65461d85b8..e19a2b0826 100644
--- a/arch/x86/cpu/apollolake/fsp_m.c
+++ b/arch/x86/cpu/apollolake/fsp_m.c
@@ -26,7 +26,8 @@ int fspm_update_config(struct udevice *dev, struct fspm_upd
*upd)
return log_msg_ret("mrc", cache_ret);
arch->stack_base = (void *)0xfef96000;
arch->boot_loader_tolum_size = 0;
- arch->boot_mode = FSP_BOOT_WITH_FULL_CONFIGURATION;
+ arch->boot_mode = cache_ret ? FSP_BOOT_WITH_FULL_CONFIGURATION :
+ FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES;
node = dev_ofnode(dev);
if (!ofnode_valid(node))
--
2.28.0.rc0.105.gf9edc3c819-goog
[PATCH v3 06/10] x86: Update the comment about booting for FSP2
The comment here applies only to FSP1, so update it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Reviewed-by: Wolfgang Wallner --- (no changes since v1) arch/x86/cpu/start.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index 01524635e9..4ad515ce08 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -124,6 +124,7 @@ car_init_ret: #endif #else /* +* Instructions for FSP1, but not FSP2: * U-Boot enters here twice. For the first time it comes from * car_init_done() with esp points to a temporary stack and esi * set to zero. For the second time it comes from fsp_init_done() -- 2.28.0.rc0.105.gf9edc3c819-goog
[PATCH v3 04/10] x86: apl: Adjust FSP-M code to avoid hard-coded address
Update this code to calculate the address to use, rather than hard-coding
it. Obtain the requested stack size from the FSP.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
Reviewed-by: Bin Meng
---
(no changes since v2)
Changes in v2:
- Split out the boot_mode change into a separate patch
arch/x86/cpu/apollolake/fsp_m.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/cpu/apollolake/fsp_m.c b/arch/x86/cpu/apollolake/fsp_m.c
index e19a2b0826..cef937573b 100644
--- a/arch/x86/cpu/apollolake/fsp_m.c
+++ b/arch/x86/cpu/apollolake/fsp_m.c
@@ -24,7 +24,8 @@ int fspm_update_config(struct udevice *dev, struct fspm_upd
*upd)
cache_ret = prepare_mrc_cache(upd);
if (cache_ret && cache_ret != -ENOENT)
return log_msg_ret("mrc", cache_ret);
- arch->stack_base = (void *)0xfef96000;
+ arch->stack_base = (void *)(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE -
+arch->stack_size);
arch->boot_loader_tolum_size = 0;
arch->boot_mode = cache_ret ? FSP_BOOT_WITH_FULL_CONFIGURATION :
FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES;
--
2.28.0.rc0.105.gf9edc3c819-goog
[PATCH v3 05/10] x86: Store the coreboot table address in global_data
At present this information is used to locate and parse the tables but is
not stored. Store it so that we can display it to the user, e.g. with the
'bdinfo' command.
Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(),
so it is always set when booting from coreboot.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
Changes in v3:
- Update the commit message with an explanation of GD_FLG_SKIP_LL_INIT
arch/x86/cpu/coreboot/tables.c | 8 +++-
arch/x86/cpu/i386/cpu.c| 7 ++-
arch/x86/include/asm/global_data.h | 1 +
3 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/x86/cpu/coreboot/tables.c b/arch/x86/cpu/coreboot/tables.c
index a5d31d1dea..1594b4a8b2 100644
--- a/arch/x86/cpu/coreboot/tables.c
+++ b/arch/x86/cpu/coreboot/tables.c
@@ -10,6 +10,8 @@
#include
#include
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* This needs to be in the .data section so that it's copied over during
* relocation. By default it's put in the .bss section which is simply filled
@@ -243,6 +245,10 @@ int get_coreboot_info(struct sysinfo_t *info)
if (addr < 0)
return addr;
ret = cb_parse_header((void *)addr, 0x1000, info);
+ if (!ret)
+ return -ENOENT;
+ gd->arch.coreboot_table = addr;
+ gd->flags |= GD_FLG_SKIP_LL_INIT;
- return ret == 1 ? 0 : -ENOENT;
+ return 0;
}
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
index d27324cb4e..a6a6afec8c 100644
--- a/arch/x86/cpu/i386/cpu.c
+++ b/arch/x86/cpu/i386/cpu.c
@@ -455,10 +455,15 @@ int x86_cpu_init_f(void)
int x86_cpu_reinit_f(void)
{
+ long addr;
+
setup_identity();
setup_pci_ram_top();
- if (locate_coreboot_table() >= 0)
+ addr = locate_coreboot_table();
+ if (addr >= 0) {
+ gd->arch.coreboot_table = addr;
gd->flags |= GD_FLG_SKIP_LL_INIT;
+ }
return 0;
}
diff --git a/arch/x86/include/asm/global_data.h
b/arch/x86/include/asm/global_data.h
index 5bc251c0dd..3e4044593c 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -123,6 +123,7 @@ struct arch_global_data {
#endif
void *itss_priv;/* Private ITSS data pointer */
ulong acpi_start; /* Start address of ACPI tables */
+ ulong coreboot_table; /* Address of coreboot table */
};
#endif
--
2.28.0.rc0.105.gf9edc3c819-goog
[PATCH v3 01/10] x86: apl: Fix save/restore of ITSS priorities
The FSP-S changes the ITSS priorities. The code that tries to save it
before running FSP-S and restore it afterwards does not work as U-Boot
relocates in between the save and restore. This means that the driver
data saved before relocation is lost and the new driver just sees zeroes.
Fix this by allocating space in the relocated memory for the ITSS data.
Save it there and access it from the driver after relocation.
This fixes interrupt handling on coral.
Also drop the log_msg_ret() in irq_first_device_type() since this function
can be called speculatively in places where we are not sure if there is
an interrupt controller of that type. The resulting log errors are
confusing when there is no error.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v2)
Changes in v2:
- Add mention of why log_msg_ret() is dropped
arch/x86/cpu/apollolake/fsp_s.c| 11 +--
arch/x86/cpu/cpu.c | 18 +++---
arch/x86/cpu/intel_common/itss.c | 25 +++--
arch/x86/include/asm/global_data.h | 1 +
arch/x86/include/asm/itss.h| 2 +-
drivers/misc/irq-uclass.c | 2 +-
6 files changed, 46 insertions(+), 13 deletions(-)
diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c
index 3a54297a28..e54b0ac104 100644
--- a/arch/x86/cpu/apollolake/fsp_s.c
+++ b/arch/x86/cpu/apollolake/fsp_s.c
@@ -160,11 +160,6 @@ int arch_fsps_preinit(void)
ret = irq_first_device_type(X86_IRQT_ITSS, );
if (ret)
return log_msg_ret("no itss", ret);
- /*
-* Snapshot the current GPIO IRQ polarities. FSP is setting a default
-* policy that doesn't honour boards' requirements
-*/
- irq_snapshot_polarities(itss);
/*
* Clear the GPI interrupt status and enable registers. These
@@ -203,7 +198,11 @@ int arch_fsp_init_r(void)
ret = irq_first_device_type(X86_IRQT_ITSS, );
if (ret)
return log_msg_ret("no itss", ret);
- /* Restore GPIO IRQ polarities back to previous settings */
+
+ /*
+* Restore GPIO IRQ polarities back to previous settings. This was
+* stored in reserve_arch() - see X86_IRQT_ITSS
+*/
irq_restore_polarities(itss);
/* soc_init() */
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 23a4d633d2..9ef797b41b 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -269,9 +270,11 @@ int cpu_init_r(void)
#ifndef CONFIG_EFI_STUB
int reserve_arch(void)
{
-#ifdef CONFIG_ENABLE_MRC_CACHE
- mrccache_reserve();
-#endif
+ struct udevice *itss;
+ int ret;
+
+ if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE))
+ mrccache_reserve();
#ifdef CONFIG_SEABIOS
high_table_reserve();
@@ -288,6 +291,15 @@ int reserve_arch(void)
fsp_save_s3_stack();
}
}
+ ret = irq_first_device_type(X86_IRQT_ITSS, );
+ if (!ret) {
+ /*
+* Snapshot the current GPIO IRQ polarities. FSP-S is about to
+* run and will set a default policy that doesn't honour boards'
+* requirements
+*/
+ irq_snapshot_polarities(itss);
+ }
return 0;
}
diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c
index 963afa8f5b..fe84ebe29f 100644
--- a/arch/x86/cpu/intel_common/itss.c
+++ b/arch/x86/cpu/intel_common/itss.c
@@ -65,14 +65,23 @@ static int snapshot_polarities(struct udevice *dev)
int i;
reg_start = start / IRQS_PER_IPC;
- reg_end = (end + IRQS_PER_IPC - 1) / IRQS_PER_IPC;
+ reg_end = DIV_ROUND_UP(end, IRQS_PER_IPC);
+ log_info("ITSS IRQ Polarities snapshot %p\n", priv->irq_snapshot);
for (i = reg_start; i < reg_end; i++) {
uint reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * i;
priv->irq_snapshot[i] = pcr_read32(dev, reg);
+ log_debug(" - %d, reg %x: irq_snapshot[i] %x\n", i, reg,
+ priv->irq_snapshot[i]);
}
+ /* Save the snapshot for use after relocation */
+ gd->start_addr_sp -= sizeof(*priv);
+ gd->start_addr_sp &= ~0xf;
+ gd->arch.itss_priv = (void *)gd->start_addr_sp;
+ memcpy(gd->arch.itss_priv, priv, sizeof(*priv));
+
return 0;
}
@@ -91,16 +100,26 @@ static void show_polarities(struct udevice *dev, const
char *msg)
static int restore_polarities(struct udevice *dev)
{
struct itss_priv *priv = dev_get_priv(dev);
+ struct itss_priv *old_priv;
const int start = GPIO_IRQ_START;
const int end = GPIO_IRQ_END;
int reg_start;
int reg_end;
int i;
+ /* Get the snapshot which was stored by the pre-reloc device */
+
[PATCH v3 00/10] x86: Programmatic generation of ACPI tables (Part C)
This series is split off from the original ACPI series and renumbered to version 1. It includes functions for generating more ACPI constructs as well as I2C, GPIO and sound support. There are also quite a few patches related to getting coral to work correctly with ACPI. Changes in v3: - Update the commit message with an explanation of GD_FLG_SKIP_LL_INIT - Rebase to x86/master Changes in v2: - Add mention of why log_msg_ret() is dropped - Add a new commit to handle the boot_mode fix - Split out the boot_mode change into a separate patch - Remove the function from zimage.c also - Use ACPI_MADT_REV_ACPI_3_0 instead of the open-coded value - Don't enable this for qemu Simon Glass (10): x86: apl: Fix save/restore of ITSS priorities x86: Add debugging to table writing x86: apl: Set the correct boot mode in the FSP-M code x86: apl: Adjust FSP-M code to avoid hard-coded address x86: Store the coreboot table address in global_data x86: Update the comment about booting for FSP2 x86: Drop setup_pcat_compatibility() x86: acpi: Correct the version of the MADT x86: Rename board_final_cleanup() to board_final_init() acpi: Enable ACPI table generation by default on x86 arch/Kconfig | 1 + arch/x86/cpu/apollolake/fsp_m.c| 6 +++-- arch/x86/cpu/apollolake/fsp_s.c| 11 - arch/x86/cpu/coreboot/coreboot.c | 4 ++-- arch/x86/cpu/coreboot/tables.c | 8 ++- arch/x86/cpu/cpu.c | 26 ++-- arch/x86/cpu/efi/app.c | 2 +- arch/x86/cpu/i386/cpu.c| 7 +- arch/x86/cpu/intel_common/itss.c | 25 ++-- arch/x86/cpu/quark/quark.c | 2 +- arch/x86/cpu/start.S | 1 + arch/x86/include/asm/global_data.h | 2 ++ arch/x86/include/asm/itss.h| 2 +- arch/x86/include/asm/u-boot-x86.h | 2 -- arch/x86/lib/acpi_table.c | 2 +- arch/x86/lib/fsp/fsp_common.c | 2 +- arch/x86/lib/tables.c | 38 ++ arch/x86/lib/zimage.c | 10 drivers/core/Kconfig | 2 +- drivers/misc/irq-uclass.c | 2 +- 20 files changed, 105 insertions(+), 50 deletions(-) -- 2.28.0.rc0.105.gf9edc3c819-goog
Re: [PATCH] bcmgenet: fix DMA buffer management
On 7/16/20 11:02 AM, Jason Wessel wrote:
>
>
> On 7/16/20 7:02 AM, Jason Wessel wrote:
>> On 7/9/20 3:11 AM, etienne.du...@gmail.com wrote:
>>> From: Etienne Dublé
>>>
>>> This commit fixes a serious issue occuring when several network
>>> commands are run on a raspberry pi 4 board: for instance a "dhcp"
>>> command and then one or several "tftp" commands. In this case,
>>> packet recv callbacks were called several times on the same packets,
>>> and send function was failing most of the time.
>>>
>>> note: if the boot procedure is made of a single network
>>> command, the issue is not visible.
>>>
>>> The issue is related to management of the packet ring buffers
>>> (producer / consumer) and DMA.
>>> Each time a packet is received, the ethernet device stores it
>>> in the buffer and increments an index called RDMA_PROD_INDEX.
>>> Each time the driver outputs a received packet, it increments
>>> another index called RDMA_CONS_INDEX.
>>>
>>> Between each pair of network commands, as part of the driver
>>> 'start' function, previous code tried to reset both RDMA_CONS_INDEX
>>> and RDMA_PROD_INDEX to 0. But RDMA_PROD_INDEX cannot be written from
>>> driver side, thus its value was actually not updated, and only
>>> RDMA_CONS_INDEX was reset to 0. This was resulting in a major
>>> synchronization issue between the driver and the device. Most
>>> visible bahavior was that the driver seemed to receive again the
>>> packets from the previous commands (e.g. DHCP response packets
>>> "received" again when performing the first TFTP command).
>>>
>>> This fix consists in setting RDMA_CONS_INDEX to the same
>>> value as RDMA_PROD_INDEX, when resetting the driver.
>>>
>>> The same kind of fix was needed on the TX side, and a few variables
>>> had to be reset accordingly (c_index, tx_index, rx_index).
>>
>>
>> While there is some kind of problem with the driver, because I too
>> have observed a problem with multiple requests timing out or failing,
>> this patch makes the problem much worse. I was only able to complete
>> a single tftp request.
>>
>> In my case I am using a static IP address and serverip.
>>
>> Also your patch was missing the sign-off line. Please consider
>> running your patches through scripts/checkpatch.pl.
>>
>> Cheers,
>> Jason.
>>
>>> ---
>>> drivers/net/bcmgenet.c | 15 +++
>>> 1 file changed, 7 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/drivers/net/bcmgenet.c b/drivers/net/bcmgenet.c
>>> index 11b6148ab6..a4facfd63f 100644
>>> --- a/drivers/net/bcmgenet.c
>>> +++ b/drivers/net/bcmgenet.c
>>> @@ -378,8 +378,6 @@ static void rx_descs_init(struct bcmgenet_eth_priv
>>> *priv)
>>> u32 len_stat, i;
>>> void *desc_base = priv->rx_desc_base;
>>>
>>> - priv->c_index = 0;
>>> -
>>> len_stat = (RX_BUF_LENGTH << DMA_BUFLENGTH_SHIFT) | DMA_OWN;
>>>
>>> for (i = 0; i < RX_DESCS; i++) {
>>> @@ -403,8 +401,10 @@ static void rx_ring_init(struct bcmgenet_eth_priv
>>> *priv)
>>> writel(RX_DESCS * DMA_DESC_SIZE / 4 - 1,
>>>priv->mac_reg + RDMA_RING_REG_BASE + DMA_END_ADDR);
>>>
>>> - writel(0x0, priv->mac_reg + RDMA_PROD_INDEX);
>>> - writel(0x0, priv->mac_reg + RDMA_CONS_INDEX);
>>> + /* cannot init RDMA_PROD_INDEX to 0, so align RDMA_CONS_INDEX on it
>>> instead */
>>> + priv->c_index = readl(priv->mac_reg + RDMA_PROD_INDEX);
>>> + writel(priv->c_index, priv->mac_reg + RDMA_CONS_INDEX);
>>> + priv->rx_index = priv->c_index;
>
>
> printf("before RX_IDX: 0x%x\n", priv->rx_index);
>
> I added a printf() like above for the RX and TX to see what is going on when
> I try and transfer a kernel Image file the second time.
>
>
> U-Boot> tftp ${loadaddr} bootfs/Image
> before RX_IDX: 0x0
> before TX_IDX: 0x0
> Using ethernet@7d58 device
> Filename 'bootfs/Image'.
> Load address: 0x8
> Loading: ## Warning: gatewayip needed but not set
> ## 16.8 MiB
> 6.1 MiB/s
> done
> Bytes transferred = 17615360 (10cca00 hex)
> U-Boot> tftp ${loadaddr} bootfs/Image
> before RX_IDX: 0xe4
> before TX_IDX: 0x2ee3
> Using ethernet@7d58 device
> Filename 'bootfs/Image'.
> Load address: 0x8
> Loading: ## Warning: gatewayip needed but not set
>
>
>
> The TX_IDX is now 0x2ee3 which is definitely not going to work.
>
> According to the driver file there are only 256 (0xFF) slots,
> which is why it hangs, with your change.
>
diff --git a/drivers/net/bcmgenet.c b/drivers/net/bcmgenet.c
index a4facfd63f..1b7e7ba2bf 100644
--- a/drivers/net/bcmgenet.c
+++ b/drivers/net/bcmgenet.c
@@ -405,6 +405,7 @@ static void rx_ring_init(struct bcmgenet_eth_priv *priv)
priv->c_index = readl(priv->mac_reg + RDMA_PROD_INDEX);
writel(priv->c_index, priv->mac_reg + RDMA_CONS_INDEX);
priv->rx_index = priv->c_index;
+ priv->rx_index &= 0xFF;
writel((RX_DESCS << DMA_RING_SIZE_SHIFT) | RX_BUF_LENGTH,
priv->mac_reg + RDMA_RING_REG_BASE +
Re: [PATCH v3 7/8] efi_loader: signature: rework for intermediate
On Thu, Jul 16, 2020 at 11:39:36AM +, REITHER Robert - Contractor wrote:
> Hi,
>
> I think I have found a bug in
> lib/efi_loader/efi_signature.c
>
> efi_verify_certificate()
>
> + cert =
> x509_cert_parse(sig_data->data, sig_data->size);
> + if (!cert) {
> +
> EFI_PRINT("Cannot parse x509 certificate\n");
> +continue;
> + }
>
>
> x509_cert_parse() not only returns a pointer, but also embed a linux
> error_code, so if an error happens there, the (!cert) check will fail!
>
> I suggest using:
>
> - if (!cert) {
> +if (IS_ERR(cert)) {
That's correct.
Can you post a fix patch, please?
# There was the same problem with pkcs7_parse_message(),
# and I have fixed it before.
Thanks,
-Takahiro Akashi
>
> Regards
> Robert
Re: [PATCH v2 1/9] doc: Add new doc for soc ID driver model
On Wed, 15 Jul 2020 at 22:40, Dave Gerlach wrote: > > Add a new documentation file for UCLASS_SOC and its usage to describe > the SoC Device ID framework that allows SoC identification and device > data matching. > > Signed-off-by: Dave Gerlach > --- > doc/driver-model/index.rst | 1 + > doc/driver-model/soc-framework.rst | 68 ++ > 2 files changed, 69 insertions(+) > create mode 100644 doc/driver-model/soc-framework.rst Reviewed-by: Simon Glass
[PATCH v2 2/2] fdt_support: skip MTD node with "disabled" in fdt_fixup_mtdparts()
Currently, fdt_fixup_mtdparts() only checks the compatible property.
It is pointless to fix up the disabled node.
Skip the node if it has the property:
status = "disabled"
Signed-off-by: Masahiro Yamada
Reviewed-by: Simon Glass
---
(no changes since v1)
common/fdt_support.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index cf09c3c5fb..1ddcc53556 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -955,9 +955,16 @@ void fdt_fixup_mtdparts(void *blob, const struct node_info
*node_info,
for (i = 0; i < node_info_size; i++) {
idx = 0;
- noff = fdt_node_offset_by_compatible(blob, -1,
-node_info[i].compat);
- while (noff != -FDT_ERR_NOTFOUND) {
+ noff = -1;
+
+ while ((noff = fdt_node_offset_by_compatible(blob, noff,
+ node_info[i].compat)) >= 0) {
+ const char *prop;
+
+ prop = fdt_getprop(blob, noff, "status", NULL);
+ if (prop && !strcmp(prop, "disabled"))
+ continue;
+
debug("%s: %s, mtd dev type %d\n",
fdt_get_name(blob, noff, 0),
node_info[i].compat, node_info[i].type);
@@ -973,10 +980,6 @@ void fdt_fixup_mtdparts(void *blob, const struct node_info
*node_info,
if (fdt_node_set_part_info(blob, noff, dev))
return; /* return on error */
}
-
- /* Jump to next flash node */
- noff = fdt_node_offset_by_compatible(blob, noff,
-
node_info[i].compat);
}
}
}
--
2.25.1
[PATCH v2 1/2] fdt_support: call mtdparts_init() after finding MTD node to fix up
Platform code can call fdt_fixup_mtdparts() in order to hand U-Boot's
MTD partitions over to the Linux device tree.
Currently, fdt_fixup_mtdparts() calls mtdparts_init() in its entry.
If no target MTD device is found, an error message like follows is
displayed:
Device nand0 not found!
This occurs when the same code (e.g. arch/arm/mach-uniphier/fdt-fixup.c)
is shared among several boards, but not all of them support an MTD device.
Parse the DT first, then call mtdparts_init() only when the target MTD
node is found.
Yet, you still need to call mtdparts_init() before device_find().
Signed-off-by: Masahiro Yamada
Reviewed-by: Simon Glass
---
Changes in v2:
- rename 'initialized' to 'inited'
common/fdt_support.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 3778de5368..cf09c3c5fb 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -951,9 +951,7 @@ void fdt_fixup_mtdparts(void *blob, const struct node_info
*node_info,
struct mtd_device *dev;
int i, idx;
int noff;
-
- if (mtdparts_init() != 0)
- return;
+ bool inited = false;
for (i = 0; i < node_info_size; i++) {
idx = 0;
@@ -963,6 +961,13 @@ void fdt_fixup_mtdparts(void *blob, const struct node_info
*node_info,
debug("%s: %s, mtd dev type %d\n",
fdt_get_name(blob, noff, 0),
node_info[i].compat, node_info[i].type);
+
+ if (!inited) {
+ if (mtdparts_init() != 0)
+ return;
+ inited = true;
+ }
+
dev = device_find(node_info[i].type, idx++);
if (dev) {
if (fdt_node_set_part_info(blob, noff, dev))
--
2.25.1
Re: [PATCH 2/2] fdt_support: skip MTD node with "disabled" in fdt_fixup_mtdparts()
On Fri, Jul 17, 2020 at 12:44 AM Simon Glass wrote: > > On Wed, 15 Jul 2020 at 04:57, Masahiro Yamada > wrote: > > > > Currently, fdt_fixup_mtdparts() only checks the compatible property. > > It is pointless to fix up the disabled node. > > > > Skip the node if it has the property: > > > > status = "disabled" > > > > Signed-off-by: Masahiro Yamada > > --- > > > > common/fdt_support.c | 17 ++--- > > 1 file changed, 10 insertions(+), 7 deletions(-) > > Reviewed-by: Simon Glass > > Are there any tests for this code? No test code. It makes more effort since testing this would need to probe an MTD device as well as parsing DT. > I am thinking we should migrate fdt_support to use livetree... One important thing we should notice is we have two different DT instances: [1] DT blob for U-Boot - used for U-Boot driver model [2] DT blob for Linux- passed when booting Linux In my understanding, the livetree is supposed to unflatten [1]. fdt_fixup_mtdparts() is obviously fixing [2]. I do not know how livetree would work for this function. -- Best Regards Masahiro Yamada
Re: [PATCH] mmc: msm_sdhci: Use mmc_of_parse for setting host_caps
On 7/16/20 6:07 PM, Manivannan Sadhasivam wrote: > Since the introduction of 'get_cd' callback in sdhci core, > dragonboard410c's MMC interface is broken. It turns out that 'get_cd' > callback checks for the host_caps for validating the chip select. And > since the msm_sdhci driver is not parsing the host_caps from DT, not > all of the cababilities are parsed properly. This results in the MMC > interfaces to be broken. > > Hence, fix this by adding a call to 'mmc_of_parse' during driver probe. > > Signed-off-by: Manivannan Sadhasivam Reviewed-by: Jaehoon Chung Best Regards, Jaehoon Chung > --- > drivers/mmc/msm_sdhci.c | 4 > 1 file changed, 4 insertions(+) > > diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c > index da3ae2ec35..23e2e0fbc3 100644 > --- a/drivers/mmc/msm_sdhci.c > +++ b/drivers/mmc/msm_sdhci.c > @@ -142,6 +142,10 @@ static int msm_sdc_probe(struct udevice *dev) > writel(caps, host->ioaddr + SDHCI_VENDOR_SPEC_CAPABILITIES0); > } > > + ret = mmc_of_parse(dev, >cfg); > + if (ret) > + return ret; > + > host->mmc = >mmc; > host->mmc->dev = dev; > ret = sdhci_setup_cfg(>cfg, host, 0, 0); >
Re: [PATCH 0/9] mmc: fsl_esdhc: support eMMC HS200/HS400 modes
Hi Yangbo, On 7/16/20 11:29 AM, Yangbo Lu wrote: > This patch-set is to support eMMC HS200 and HS400 speed modes for > eSDHC, and enable them on LX2160ARDB board. Is there any result about performance? Best Regards, Jaehoon Chung > > CI build link > https://travis-ci.org/github/yangbolu1991/u-boot-test/builds/708215558 > > Yangbo Lu (9): > mmc: add a reinit() API > mmc: fsl_esdhc: add a reinit() callback > mmc: fsl_esdhc: support tuning for eMMC HS200 > mmc: fsl_esdhc: clean TBCTL[TB_EN] manually during init > mmc: add a hs400_tuning flag > mmc: add a mmc_hs400_prepare_ddr() interface > mmc: fsl_esdhc: support eMMC HS400 mode > arm: dts: lx2160ardb: support eMMC HS400 mode > configs: lx2160ardb: enable eMMC HS400 mode support > > arch/arm/dts/fsl-lx2160a-rdb.dts | 2 + > configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + > configs/lx2160ardb_tfa_defconfig | 1 + > configs/lx2160ardb_tfa_stmm_defconfig| 1 + > drivers/mmc/fsl_esdhc.c | 148 > ++- > drivers/mmc/mmc-uclass.c | 30 ++ > drivers/mmc/mmc.c| 12 ++- > include/fsl_esdhc.h | 29 +- > include/mmc.h| 26 - > 9 files changed, 240 insertions(+), 10 deletions(-) >
Re: uboot-test-hooks: dfu-util
On 7/15/20 12:14 PM, Heinrich Schuchardt wrote: > On 15.07.20 19:38, Heinrich Schuchardt wrote: >> On 15.07.20 17:57, Stephen Warren wrote: >>> On 7/15/20 4:34 AM, Heinrich Schuchardt wrote: Hello Stephen, I have just looked into dfu testing. Do we still need a custom dfu-util? At least the dfu-util provided by Ubuntu bionic/universe in our Docker image provides the -p parameter. >>> >>> Yes, it looks like the -p option is supported by the dfu-util in Xenial >>> too (I need to run Xenial due to other dependencies...) >>> >>> However, this binary has one more patch in it which I need locally at least: https://github.com/swarren/dfu-util/commit/23561bd0ca4f5f62488451826d4a03683ad70e8a > > You are not alone with your problem: > > https://github.com/motive-ai/dfu-util/commit/c7e3c3c0cae977b6c4638b3af44968f50ec1447a > > I saw this explanation in > https://github.com/zephyrproject-rtos/zephyr/issues/8734: > > "As I explained in the pull request, the problem is not that the timeout > in dfu-util is too small (the device should always respond immediately > to the DFU request USB transaction) but that the device is not correctly > implementing the DFU standard and the bwPollTimeout in the DFU_GETSTATUS > response." Cf. > https://github.com/zephyrproject-rtos/zephyr/pull/15330/commits > > Could it be that we have a similar problem with our U-Boot > implementation (drivers/usb/gadget/f_dfu.c)? > > The value of DFU_MANIFEST_POLL_TIMEOUT and DFU_MANIFEST_POLL_TIMEOUT > varies a lot between the boards: > > include/dfu.h:111: > #ifndef DFU_MANIFEST_POLL_TIMEOUT > #define DFU_MANIFEST_POLL_TIMEOUT DFU_DEFAULT_POLL_TIMEOUT > #endif > > include/configs/odroid_xu3.h > #define DFU_DEFAULT_POLL_TIMEOUT300 > > include/configs/corvus.h > #define DFU_MANIFEST_POLL_TIMEOUT 25000 > > Does increasing this value in include/configs/jetson-tk1.h help with > your Jetson TK1 board? I took a look at this and discovered a few things! 1) I can't repro the original timeout issuing I was having, with any of v2016.03, v2016.05, or v2016.07 (i.e. the current upstream versions around when I first checked in the custom dfu-util with the timeout patch). The commit comments indicate it may have been an issue with one of our downstream branches at the time. So, I removed that change and re-ran testing on all the branches that I *currently* test (upstream and downstream) and didn't see any issue. Hopefully it won't show up intermittently. 2) Even though Ubuntu 16.04's dfu-util binary indicates that it supports the -p command-line option, its implementation is missing since the required library wasn't present when Ubuntu built the package. Trying to use the -p feature simply results in dfu-util printing an error message. So, I personally will still need to use a custom binary of dfu-util because of this, but perhaps people on newer OSs won't. I've moved this dfu-util binary into a different git repo so only I'll end up using it. So, in summary it doesn't look like there is an issue in the current U-Boot DFU code, or at least not one I can detect.
Re: [PATCH] efi_loader: Correct value for ARM_SMC_MM_RET_NO_MEMORY
On 7/16/20 10:27 PM, Ilias Apalodimas wrote:
> Instead of adding the definition for the specific MM SVC used in
> StandAloneMM we added the one used in the standard SMC calls.
> So change the value from -4 to -5 to match the correct one defined in
> EDK2
Please, rename all your MM return code constants to avoid further confusion:
/* MM SVC return error codes */
#define ARM_SVC_SPM_RET_SUCCESS 0
#define ARM_SVC_SPM_RET_NOT_SUPPORTED-1
#define ARM_SVC_SPM_RET_INVALID_PARAMS -2
#define ARM_SVC_SPM_RET_DENIED -3
#define ARM_SVC_SPM_RET_NO_MEMORY-5
Best regards
Heinrich
>
> Fixes 23a397d2e2fb: ("efi_loader: Add headers for EDK2 StandAloneMM
> communication")
> Signed-off-by: Ilias Apalodimas
> ---
> include/mm_communication.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/mm_communication.h b/include/mm_communication.h
> index 193c4d157874..5aa60160ac63 100644
> --- a/include/mm_communication.h
> +++ b/include/mm_communication.h
> @@ -52,14 +52,14 @@ struct efi_mm_communicate_header {
> #define MM_COMMUNICATE_HEADER_SIZE \
> (sizeof(struct efi_mm_communicate_header))
>
> -/* Defined in EDK2 ArmPkg/Include/IndustryStandard/ArmStdSmc.h */
> +/* Defined in EDK2 ArmPkg/Include/IndustryStandard/ArmMmSvc.h */
>
> /* MM return error codes */
> #define ARM_SMC_MM_RET_SUCCESS 0
> #define ARM_SMC_MM_RET_NOT_SUPPORTED -1
> #define ARM_SMC_MM_RET_INVALID_PARAMS -2
> #define ARM_SMC_MM_RET_DENIED -3
> -#define ARM_SMC_MM_RET_NO_MEMORY -4
> +#define ARM_SMC_MM_RET_NO_MEMORY -5
>
> /* Defined in EDK2 MdeModulePkg/Include/Guid/SmmVariableCommon.h */
>
>
[PATCH 1/1] test/dm: check if devices exist
Running 'ut dm' on the sandbox without -D or -d results in segmentation
faults due to NULL pointer dereferences.
Check that device pointers are non-NULL before using them.
Use ut_assertnonnull() for pointers instead of ut_assert().
Signed-off-by: Heinrich Schuchardt
---
test/dm/acpi.c | 3 +++
test/dm/core.c | 10 +-
test/dm/devres.c | 1 +
test/dm/test-fdt.c | 2 ++
test/dm/virtio.c | 7 +++
5 files changed, 18 insertions(+), 5 deletions(-)
diff --git a/test/dm/acpi.c b/test/dm/acpi.c
index 4c46dd83a6..ece7993cf3 100644
--- a/test/dm/acpi.c
+++ b/test/dm/acpi.c
@@ -96,7 +96,10 @@ DM_TEST(dm_test_acpi_get_table_revision,
static int dm_test_acpi_create_dmar(struct unit_test_state *uts)
{
struct acpi_dmar dmar;
+ struct udevice *cpu;
+ ut_assertok(uclass_first_device(UCLASS_CPU, ));
+ ut_assertnonnull(cpu);
ut_assertok(acpi_create_dmar(, DMAR_INTR_REMAP));
ut_asserteq(DMAR_INTR_REMAP, dmar.flags);
ut_asserteq(32 - 1, dmar.host_address_width);
diff --git a/test/dm/core.c b/test/dm/core.c
index 6a930ae31a..d20c48443f 100644
--- a/test/dm/core.c
+++ b/test/dm/core.c
@@ -158,7 +158,7 @@ static int dm_test_autobind_uclass_pdata_alloc(struct
unit_test_state *uts)
for (uclass_find_first_device(UCLASS_TEST, );
dev;
uclass_find_next_device()) {
- ut_assert(dev);
+ ut_assertnonnull(dev);
uc_pdata = dev_get_uclass_platdata(dev);
ut_assert(uc_pdata);
@@ -181,7 +181,7 @@ static int dm_test_autobind_uclass_pdata_valid(struct
unit_test_state *uts)
for (uclass_find_first_device(UCLASS_TEST, );
dev;
uclass_find_next_device()) {
- ut_assert(dev);
+ ut_assertnonnull(dev);
uc_pdata = dev_get_uclass_platdata(dev);
ut_assert(uc_pdata);
@@ -747,11 +747,11 @@ static int dm_test_uclass_devices_find(struct
unit_test_state *uts)
dev;
ret = uclass_find_next_device()) {
ut_assert(!ret);
- ut_assert(dev);
+ ut_assertnonnull(dev);
}
ut_assertok(uclass_find_first_device(UCLASS_TEST_DUMMY, ));
- ut_assert(!dev);
+ ut_assertnull(dev);
return 0;
}
@@ -778,7 +778,7 @@ static int dm_test_uclass_devices_find_by_name(struct
unit_test_state *uts)
testdev;
ret = uclass_find_next_device()) {
ut_assertok(ret);
- ut_assert(testdev);
+ ut_assertnonnull(testdev);
findret = uclass_find_device_by_name(UCLASS_TEST_FDT,
testdev->name,
diff --git a/test/dm/devres.c b/test/dm/devres.c
index b5de0cb191..550787495d 100644
--- a/test/dm/devres.c
+++ b/test/dm/devres.c
@@ -153,6 +153,7 @@ static int dm_test_devres_phase(struct unit_test_state *uts)
* allocation created in the bind() method.
*/
ut_assertok(uclass_find_first_device(UCLASS_TEST_DEVRES, ));
+ ut_assertnonnull(dev);
devres_get_stats(dev, );
ut_asserteq(1, stats.allocs);
ut_asserteq(TEST_DEVRES_SIZE, stats.total_size);
diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
index 51f2547409..8ef7c7a88e 100644
--- a/test/dm/test-fdt.c
+++ b/test/dm/test-fdt.c
@@ -832,10 +832,12 @@ static int dm_test_fdt_phandle(struct unit_test_state
*uts)
struct udevice *back, *dev, *dev2;
ut_assertok(uclass_find_first_device(UCLASS_PANEL_BACKLIGHT, ));
+ ut_assertnonnull(back);
ut_asserteq(-ENOENT, uclass_find_device_by_phandle(UCLASS_REGULATOR,
back, "missing", ));
ut_assertok(uclass_find_device_by_phandle(UCLASS_REGULATOR, back,
"power-supply", ));
+ ut_assertnonnull(dev);
ut_asserteq(0, device_active(dev));
ut_asserteq_str("ldo1", dev->name);
ut_assertok(uclass_get_device_by_phandle(UCLASS_REGULATOR, back,
diff --git a/test/dm/virtio.c b/test/dm/virtio.c
index 4b317d2ec3..4a0c0b23b8 100644
--- a/test/dm/virtio.c
+++ b/test/dm/virtio.c
@@ -22,9 +22,11 @@ static int dm_test_virtio_base(struct unit_test_state *uts)
/* check probe success */
ut_assertok(uclass_first_device(UCLASS_VIRTIO, ));
+ ut_assertnonnull(bus);
/* check the child virtio-blk device is bound */
ut_assertok(device_find_first_child(bus, ));
+ ut_assertnonnull(dev);
ut_assertok(strcmp(dev->name, "virtio-blk#0"));
/* check driver status */
@@ -49,15 +51,18 @@ static int dm_test_virtio_all_ops(struct unit_test_state
*uts)
/* check probe success */
ut_assertok(uclass_first_device(UCLASS_VIRTIO, ));
+ ut_assertnonnull(bus);
/* check the child virtio-blk device is bound */
Re: Pull request for UEFI sub-system for efi-2020-10-rc1 (4)
On Thu, Jul 16, 2020 at 05:55:55PM +0200, Heinrich Schuchardt wrote: > The following changes since commit 47b0a493247b38c1557062e108cc4868e211a73e: > > Merge branch '2020-07-15-ci-updates' (2020-07-15 15:48:05 -0400) > > are available in the Git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git > tags/efi-2020-10-rc1-4 > > for you to fetch changes up to c70f44817d466848c421ed7159bc9aba428e69ad: > > efi_loader: simplify 'printenv -e' (2020-07-16 12:37:03 +0200) > > Gitlab and Travis showed no problems: > > https://gitlab.denx.de/u-boot/custodians/u-boot-efi/pipelines/4071 > https://travis-ci.org/github/xypron2/u-boot/builds/708688078 > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] memsize: Make get_ram_size() work with arbitary RAM size
On 7/14/20 6:09 PM, Wolfgang Denk wrote:
> Dear Heinrich,
>
> In message <53dad1c7-7684-f975-1567-6ec5e03fa...@gmx.de> you wrote:
>>
>> If we want a fast algorithm to determine the last supported address even
>> if the start or size is not a power of two:
>
> Are you sure? How is this supposed to work?
>
> Running it with start = 0 and size = 0xC000 it will test the
> memory locations
>
> 0x8000
> 0xA000
> 0xB000
> 0xB800
> 0xBC00
> 0xBE00
> 0xBF00
> 0xBF80
> 0xBFC0
> 0xBFE0
> 0xBFF0
> 0xBFF8
> 0xBFFC
> 0xBFFE
> 0xBFFF
> 0xBFFF8000
> 0xBFFFC000
> 0xBFFFE000
> 0xB000
> 0xB800
> 0xBC00
> 0xBE00
> 0xBF00
> 0xBF80
> 0xBFC0
> 0xBFE0
> 0xBFF0
> 0xBFF8
> 0xBFFC
> 0xBFFE
> 0xBFFF
The last accessible byte is at 0xBFFF which matches (start + size -
1) in your example.
The difference to the current logic is that it does not require start or
size to be power of two.
If the size input is larger than the actually accessible memory size,
you will get the actual memory size, e.g. lets assume that the last
accessible address is 0x:
int test(unsigned long addr)
{
int ret = addr < 0x;
printf("0x%lx - %s\n", addr, ret ? "success": "failed");
return ret;
}
unsigned long start = 0x555UL;
unsigned long size = 0xC013L;
The series of test locations will be:
0x800 - failed
0x400 - failed
0x200 - failed
0x100 - failed
0x80 - failed
0x40 - failed
0x20 - failed
0x10 - failed
0x8 - failed
0x4 - failed
0x2 - failed
0x1 - failed
0x8000 - failed
0x4000 - failed
0x2000 - success
0x3000 - success
0x3800 - failed
0x3400 - failed
0x3200 - success
0x3300 - success
0x3380 - failed
0x3340 - failed
0x3320 - success
0x3330 - success
0x3338 - failed
0x3334 - failed
0x3332 - success
0x - failed
Now the algorithm returns that the last accessible memory location is
0x3332.
With unsigned long start = 0x555UL;
unsigned long size = 0x800L;
0x800 - success
0xc00 - success
0xd00 - success
0xd40 - success
0xd50 - success
0xd54 - success
The last accessible memory location is 0xd54 (0x555 + 0x800 - 0x1).
The algorithm runs in O(log(UINT_MAX)) which is the same time complexity
as for the current algorithm.
Best regards
Heinrich
>
> What do you intend with such a sequence?
>
> Best regards,
>
> Wolfgang Denk
>
[PATCH 2/2] dtoc: remove compatible string aliases support
After latest improvements in dtoc, compatible strings are checked
against driver and driver alias list to get a valid driver name. With
this new feature the list of compatible string aliases seems not
useful any more.
Signed-off-by: Walter Lozano
---
tools/dtoc/dtb_platdata.py | 13
tools/dtoc/test_dtoc.py| 43 --
2 files changed, 56 deletions(-)
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index b1b082e508..c28768f4a2 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -139,9 +139,6 @@ class DtbPlatdata(object):
_outfile: The current output file (sys.stdout or a real file)
_warning_disabled: true to disable warnings about driver names not
found
_lines: Stashed list of output lines for outputting in the future
-_aliases: Dict that hold aliases for compatible strings
-key: First compatible string declared in a node
-value: List of additional compatible strings declared in a node
_drivers: List of valid driver names found in drivers/
_driver_aliases: Dict that holds aliases for driver names
key: Driver alias declared with
@@ -157,7 +154,6 @@ class DtbPlatdata(object):
self._outfile = None
self._warning_disabled = warning_disabled
self._lines = []
-self._aliases = {}
self._drivers = []
self._driver_aliases = {}
self._links = []
@@ -483,10 +479,6 @@ class DtbPlatdata(object):
prop.Widen(struct[name])
upto += 1
-struct_name, aliases = self.get_normalized_compat_name(node)
-for alias in aliases:
-self._aliases[alias] = struct_name
-
return structs
def scan_phandles(self):
@@ -549,11 +541,6 @@ class DtbPlatdata(object):
self.out(';\n')
self.out('};\n')
-for alias, struct_name in self._aliases.items():
-if alias not in sorted(structs):
-self.out('#define %s%s %s%s\n'% (STRUCT_PREFIX, alias,
- STRUCT_PREFIX, struct_name))
-
def output_node(self, node):
"""Output the C code for a node
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index edb3912e94..169ecd6e6e 100755
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -290,7 +290,6 @@ struct dtd_sandbox_gpio {
\tbool\t\tgpio_controller;
\tfdt32_t\t\tsandbox_gpio_count;
};
-#define dtd_sandbox_gpio_alias dtd_sandbox_gpio
''', data)
self.run_test(['platdata'], dtb_file, output)
@@ -555,48 +554,6 @@ void dm_populate_phandle_data(void) {
self.assertIn("Node 'phandle-target' has no cells property",
str(e.exception))
-def test_aliases(self):
-"""Test output from a node with multiple compatible strings"""
-dtb_file = get_dtb_file('dtoc_test_aliases.dts')
-output = tools.GetOutputFilename('output')
-self.run_test(['struct'], dtb_file, output)
-with open(output) as infile:
-data = infile.read()
-self._CheckStrings(HEADER + '''
-struct dtd_compat1 {
-\tfdt32_t\t\tintval;
-};
-struct dtd_simple_bus {
-\tfdt32_t\t\tintval;
-};
-#define dtd_compat2_1_fred dtd_compat1
-#define dtd_compat3 dtd_compat1
-''', data)
-
-self.run_test(['platdata'], dtb_file, output)
-with open(output) as infile:
-data = infile.read()
-self._CheckStrings(C_HEADER + '''
-static struct dtd_compat1 dtv_spl_test = {
-\t.intval\t\t\t= 0x1,
-};
-U_BOOT_DEVICE(spl_test) = {
-\t.name\t\t= "compat1",
-\t.platdata\t= _spl_test,
-\t.platdata_size\t= sizeof(dtv_spl_test),
-};
-
-static struct dtd_simple_bus dtv_spl_test2 = {
-\t.intval\t\t\t= 0x1,
-};
-U_BOOT_DEVICE(spl_test2) = {
-\t.name\t\t= "simple_bus",
-\t.platdata\t= _spl_test2,
-\t.platdata_size\t= sizeof(dtv_spl_test2),
-};
-
-''' + C_EMPTY_POPULATE_PHANDLE_DATA, data)
-
def test_addresses64(self):
"""Test output from a node with a 'reg' property with na=2, ns=2"""
dtb_file = get_dtb_file('dtoc_test_addr64.dts')
--
2.20.1
[PATCH 0/2] dtoc: improve compatible string aliases support
This series adds additional improvements to dtoc, which are focused in compatible string aliases. First, enhance dtoc to use not only the first but all the compatible strings in a dtb node in order to find a valid driver name. Second, remove compatible string aliases from dtoc which were used to generate mappings between struct names. This is not longer needed since now a valid driver name is used. Walter Lozano (2): dtoc: look for compatible string aliases in driver list dtoc: remove compatible string aliases support tools/dtoc/dtb_platdata.py | 58 +--- tools/dtoc/dtoc_test_aliases.dts | 5 +++ tools/dtoc/test_dtoc.py | 39 +++-- 3 files changed, 32 insertions(+), 70 deletions(-) -- 2.20.1
[PATCH 1/2] dtoc: look for compatible string aliases in driver list
Currently dtoc checks if the first compatible string in a dtb node
matches either a driver o driver alias name, without taking into account
any other compatible string in the list. In the case that no driver matches
the first compatible string a warning is printed and the U_BOOT_DEVICE is
not being declared correctly.
This patch adds dtoc's support for try all the compatible strings in the
dtb node, in an effort to find the correct driver.
Signed-off-by: Walter Lozano
---
tools/dtoc/dtb_platdata.py | 45
tools/dtoc/dtoc_test_aliases.dts | 5
tools/dtoc/test_dtoc.py | 20 +++---
3 files changed, 44 insertions(+), 26 deletions(-)
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index c148c49625..b1b082e508 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -111,21 +111,17 @@ def get_value(ftype, value):
return '%#x' % value
def get_compat_name(node):
-"""Get a node's first compatible string as a C identifier
+"""Get the node's list of compatible string as a C identifiers
Args:
node: Node object to check
Return:
-Tuple:
-C identifier for the first compatible string
-List of C identifiers for all the other compatible strings
-(possibly empty)
+List of C identifiers for all the compatible strings
"""
compat = node.props['compatible'].value
-aliases = []
-if isinstance(compat, list):
-compat, aliases = compat[0], compat[1:]
-return conv_name_to_c(compat), [conv_name_to_c(a) for a in aliases]
+if not isinstance(compat, list):
+compat = [compat]
+return [conv_name_to_c(c) for c in compat]
class DtbPlatdata(object):
@@ -169,7 +165,7 @@ class DtbPlatdata(object):
def get_normalized_compat_name(self, node):
"""Get a node's normalized compat name
-Returns a valid driver name by retrieving node's first compatible
+Returns a valid driver name by retrieving node's list of compatible
string as a C identifier and performing a check against _drivers
and a lookup in driver_aliases printing a warning in case of failure.
@@ -183,19 +179,24 @@ class DtbPlatdata(object):
In case of no match found, the return will be the same as
get_compat_name()
"""
-compat_c, aliases_c = get_compat_name(node)
-if compat_c not in self._drivers:
-compat_c_old = compat_c
-compat_c = self._driver_aliases.get(compat_c)
-if not compat_c:
-if not self._warning_disabled:
-print('WARNING: the driver %s was not found in the driver
list'
- % (compat_c_old))
-compat_c = compat_c_old
-else:
-aliases_c = [compat_c_old] + aliases_c
+compat_list_c = get_compat_name(node)
+
+for compat_c in compat_list_c:
+if not compat_c in self._drivers:
+compat_c = self._driver_aliases.get(compat_c)
+if not compat_c:
+continue
+
+aliases_c = compat_list_c
+if compat_c in aliases_c:
+aliases_c.remove(compat_c)
+return compat_c, aliases_c
+
+if not self._warning_disabled:
+print('WARNING: the driver %s was not found in the driver list'
+ % (compat_list_c[0]))
-return compat_c, aliases_c
+return compat_list_c[0], compat_list_c[1:]
def setup_output(self, fname):
"""Set up the output destination
diff --git a/tools/dtoc/dtoc_test_aliases.dts b/tools/dtoc/dtoc_test_aliases.dts
index e545816f4e..ae33716863 100644
--- a/tools/dtoc/dtoc_test_aliases.dts
+++ b/tools/dtoc/dtoc_test_aliases.dts
@@ -14,4 +14,9 @@
intval = <1>;
};
+ spl-test2 {
+ u-boot,dm-pre-reloc;
+ compatible = "compat1", "simple_bus";
+ intval = <1>;
+ };
};
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 3c8e343b1f..edb3912e94 100755
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -144,18 +144,18 @@ class TestDtoc(unittest.TestCase):
prop = Prop(['rockchip,rk3399-sdhci-5.1', 'arasan,sdhci-5.1'])
node = Node({'compatible': prop})
-self.assertEqual(('rockchip_rk3399_sdhci_5_1', ['arasan_sdhci_5_1']),
+self.assertEqual((['rockchip_rk3399_sdhci_5_1', 'arasan_sdhci_5_1']),
get_compat_name(node))
prop = Prop(['rockchip,rk3399-sdhci-5.1'])
node = Node({'compatible': prop})
-self.assertEqual(('rockchip_rk3399_sdhci_5_1', []),
+self.assertEqual((['rockchip_rk3399_sdhci_5_1']),
get_compat_name(node))
prop = Prop(['rockchip,rk3399-sdhci-5.1', 'arasan,sdhci-5.1', 'third'])
[PATCH] efi_loader: Correct value for ARM_SMC_MM_RET_NO_MEMORY
Instead of adding the definition for the specific MM SVC used in
StandAloneMM we added the one used in the standard SMC calls.
So change the value from -4 to -5 to match the correct one defined in
EDK2
Fixes 23a397d2e2fb: ("efi_loader: Add headers for EDK2 StandAloneMM
communication")
Signed-off-by: Ilias Apalodimas
---
include/mm_communication.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/mm_communication.h b/include/mm_communication.h
index 193c4d157874..5aa60160ac63 100644
--- a/include/mm_communication.h
+++ b/include/mm_communication.h
@@ -52,14 +52,14 @@ struct efi_mm_communicate_header {
#define MM_COMMUNICATE_HEADER_SIZE \
(sizeof(struct efi_mm_communicate_header))
-/* Defined in EDK2 ArmPkg/Include/IndustryStandard/ArmStdSmc.h */
+/* Defined in EDK2 ArmPkg/Include/IndustryStandard/ArmMmSvc.h */
/* MM return error codes */
#define ARM_SMC_MM_RET_SUCCESS 0
#define ARM_SMC_MM_RET_NOT_SUPPORTED -1
#define ARM_SMC_MM_RET_INVALID_PARAMS -2
#define ARM_SMC_MM_RET_DENIED -3
-#define ARM_SMC_MM_RET_NO_MEMORY -4
+#define ARM_SMC_MM_RET_NO_MEMORY -5
/* Defined in EDK2 MdeModulePkg/Include/Guid/SmmVariableCommon.h */
--
2.28.0.rc0
[GIT PULL] Pull request: u-boot-imx u-boot-imx-20200716
Hi Tom, please pull from u-boot-imx, thanks ! The following changes since commit 497c7598c4e713eb9ad88fd7963e57b21b8b35e1: Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi (2020-07-11 17:40:00 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git tags/u-boot-imx-20200716 for you to fetch changes up to ab8b4e818cbc3846672c13b12f1d75daccfac519: mx6memcal: fix build (2020-07-16 15:11:18 +0200) i.MX for 2020.10 - i.MX DDR driver fix/update for i.MX8M - i.MX pinctrl driver fix. - Use arm_smccc_smc to remove imx sip function - i.MX8M clk update - support booting aarch32 kernel on aarch64 hardware - fused part support for i.MX8MP - imx6: pcm058 to DM Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/708734785 Fabio Estevam (2): pico-imx6ul: Fix Quick Start Guide URL imx6: Remove unneeded CONFIG_DM_MDIO Heiko Schocher (1): imx6: aristainetos: sync defconfig with 2020.10 Heinrich Schuchardt (1): ARM: mx6: make CAAM usable on the i.MX6 boards Ilko Iliev (1): arm: dts: imx7: Fix error in coresight TPIU graph connection Jacky Bai (2): driver: ddr: imx: skip ddr_ss_gpr config on imx8mn driver: ddr: imx: correct the pwrctl setting of selfref_en on imx8m Jian Li (3): imx8mp: enable rd_port_urgent imx8mp: DDR performance tunning imx8mp: Disables use of MR4 TUF flag (MR4[7]) bit Lukasz Majewski (1): arm: Add extra boot device (UART) to run Ymodem u-boot.img boot on XEA (imx28) Mo, Yuezhang (1): watchdog: imx: Support set timeout by wdt command Niel Fourie (4): dts-bindings: regulator: Add dlg,da9063-regulator arm: dts: imx6q: Add Linux dts files for Phytec Mira arm: imx6q: pcm058: change MAINTAINER arm: imx6q: pcm058: Convert pcm058 to use DM with DTs Oliver Chen (1): drivers: ddr: imx Workaround for i.MX8M DDRPHY rank to rank issue Peng Fan (22): pinctrl: imx7: move soc info to data section pinctrl: imx8m: move soc info to data section pinctrl: imx5: move soc info to data section imx8: misc: use arm_smccc_smc imx8m: soc: use arm_smccc_smc imx: bootaux: use arm_smccc_smc imx8: fuse: use arm_smccc_smc imx: power-domain: use arm_smccc_smc imx: remove imx sip file clk: imx8mm: fix clk set parent clk: imx8mm: Add qspi clock imx8m: configure arm clk sources from PLL imx8m: configure NoC clk imx8m: add sdhc/nand/ecspi clk api imx8m: add eqos clk imx8m: workaround ROM serror imx8m: power down fused cores imx8m: disable nodes before kernel/mfgtool boot for fused part clk: imx8m: drop clk settings imx8m: Refactor the OPTEE memory removal imx8m: implement armv8_el2_to_aarch32 imx8mm_evk: enlarge CONFIG_SYS_BOOTM_LEN Sherry Sun (1): drivers: ddr: imx8mp: Add inline ECC feature support Stefano Babic (1): mx6memcal: fix build Sébastien Szymanski (1): power: pmic_pca9450: fix PCA9450A I2C address Ye Li (9): clk: clk-imx8mn: Update clock tree and support set parent clk: imx8mm/8mn: Add USB clocks clk: imx8mp: Update imx8mp ccf clock driver imx8mp: Add fused parts support imx8mn/imx8mp: override env_get_offset and env_get_location spi: fsl_qspi: Add support for i.MX7ULP spi: fsl_qspi: Support to use full AHB space on i.MX misc: scu_api: Add SCFW API to get the index of boot container set gpio: mxc_gpio: Improve to use ofdata_to_platdata arch/arm/Kconfig | 2 +- arch/arm/dts/Makefile| 1 + arch/arm/dts/imx6q-phytec-mira-rdk-nand-u-boot.dtsi | 42 + arch/arm/dts/imx6q-phytec-mira-rdk-nand.dts | 72 ++ arch/arm/dts/imx6qdl-phytec-mira.dtsi| 390 +++ arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 287 + arch/arm/dts/imx7s.dtsi | 2 +- arch/arm/include/asm/arch-imx/cpu.h | 5 ++ arch/arm/include/asm/arch-imx8/sci/rpc.h | 1 + arch/arm/include/asm/arch-imx8/sci/sci.h | 1 + arch/arm/include/asm/arch-imx8m/ddr.h| 10 +++ arch/arm/include/asm/arch-imx8m/imx-regs.h | 158 +++ arch/arm/include/asm/mach-imx/sys_proto.h| 9 ++- arch/arm/mach-imx/Makefile | 2 +- arch/arm/mach-imx/cpu.c | 12 +++- arch/arm/mach-imx/imx8/misc.c
Re: [PATCH v4 4/4] mips: octeon: Add minimal Octeon 3 EBB7304 EVK support
> This patch adds very basic minimal support for the Marvell Octeon 3 > CN73xx based EBB7304 EVK. Please note that the basic Octeon port does > not support DDR3/4 initialization yet. To still use U-Boot on with this > port, the L2 cache (4MiB) is used as RAM. This way, U-Boot can boot > to the prompt on this board. > > Supported devices: > - UART > - reset > - CFI parallel NOR flash > > Signed-off-by: Stefan Roese > > --- > > Changes in v4: > - Remove CONFIG_BOARD_SIZE_LIMIT > > Changes in v3: > - Remove inclusion of "common.h" > - Slightly change some copyright messages (adjust year) > > Changes in v2: > - Removed CONFIG_SYS_MIPS_TIMER_FREQ > > arch/mips/dts/Makefile | 1 + > arch/mips/dts/mrvl,octeon-ebb7304.dts| 96 > arch/mips/mach-octeon/Kconfig| 14 > board/Marvell/octeon_ebb7304/Kconfig | 19 + > board/Marvell/octeon_ebb7304/MAINTAINERS | 7 ++ > board/Marvell/octeon_ebb7304/Makefile| 8 ++ > board/Marvell/octeon_ebb7304/board.c | 9 +++ > configs/octeon_ebb7304_defconfig | 37 + > include/configs/octeon_common.h | 19 + > include/configs/octeon_ebb7304.h | 20 + > 10 files changed, 230 insertions(+) > create mode 100644 arch/mips/dts/mrvl,octeon-ebb7304.dts > create mode 100644 board/Marvell/octeon_ebb7304/Kconfig > create mode 100644 board/Marvell/octeon_ebb7304/MAINTAINERS > create mode 100644 board/Marvell/octeon_ebb7304/Makefile > create mode 100644 board/Marvell/octeon_ebb7304/board.c > create mode 100644 configs/octeon_ebb7304_defconfig > create mode 100644 include/configs/octeon_common.h > create mode 100644 include/configs/octeon_ebb7304.h > both Octeon base support series are applied to u-boot-mips/next. I reordered and squashed some patches to get a cleaner history. Also configs/octeon_ebb7304_defconfig needed a little refresh. The GPIO driver needs another update and the SPI driver some more review and ack. For the DDR4 init stuff I couldn't spare enough time for review yet. Could you check if everything still works so that I can prepare the pull-request? Thanks. -- - Daniel
Re: [PATCH v2] gpio: octeon_gpio: Add GPIO controller driver for Octeon
> From: Suneel Garapati
>
> Add support for GPIO controllers found on Octeon II/III and Octeon TX
> TX2 SoC platforms.
>
> Signed-off-by: Aaron Williams
> Signed-off-by: Suneel Garapati
> Signed-off-by: Stefan Roese
> Cc: Simon Glass
> Cc: Daniel Schwierzeck
> Cc: Aaron Williams
> Cc: Chandrakala Chavva
> ---
> v2 (Stefan):
> - Removed #ifdef's for Octeon vs OcteonTX/TX2 completely
> The differentiation is now made via driver data / compatible
> string
>
> RFC -> v1 (Stefan)
> - Separated this patch from the OcteonTX/TX2 RFC patch series into a
> single patch. This is useful, as the upcoming MIPS Octeon support will
> use this GPIO driver.
> - Added MIPS Octeon II/III support (big endian). Rename driver and its
> function names from "octeontx" to "octeon" to better match all Octeon
> platforms.
> - Moved from union to defines / bitmasks. This makes the driver usage
> on little- and big-endian platforms much easier.
> - Used clrbits_64() instead of clrbits_le64() and friends to support
> usage on little- and big-endian systems
> - Removed dev->req_seq assignment
> - Enhanced Kconfig text
> - Rewrote GPIO_BIT macro
> - Dropped many macros to calculate the registers offsets and implemented
> simple functions for this (easier to read)
> - Used GENMASK_ULL and FIELD_GET helpers
> - Minor cosmetic changes (dropped brackets etc)
> - Reword commit text and subject
>
> drivers/gpio/Kconfig | 10 ++
> drivers/gpio/Makefile | 1 +
> drivers/gpio/octeon_gpio.c | 253 +
> 3 files changed, 264 insertions(+)
> create mode 100644 drivers/gpio/octeon_gpio.c
>
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index d87f6cc105..451896f400 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -316,6 +316,16 @@ config PIC32_GPIO
> help
> Say yes here to support Microchip PIC32 GPIOs.
>
> +config OCTEON_GPIO
> + bool "Octeon II/III/TX/TX2 GPIO driver"
> + depends on DM_GPIO && (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2)
> + default y
> + help
> + Add support for the Marvell Octeon GPIO driver. This is used with
> + various Octeon parts such as Octeon II/III and OcteonTX/TX2.
> + Octeon II/III has 32 GPIOs (count defined via DT) and OcteonTX/TX2
> + has 64 GPIOs (count defined via internal register).
> +
> config STM32_GPIO
> bool "ST STM32 GPIO driver"
> depends on DM_GPIO && (ARCH_STM32 || ARCH_STM32MP)
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index 7638259007..eb6364adb4 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -58,6 +58,7 @@ obj-$(CONFIG_HIKEY_GPIO)+= hi6220_gpio.o
> obj-$(CONFIG_HSDK_CREG_GPIO) += hsdk-creg-gpio.o
> obj-$(CONFIG_IMX_RGPIO2P)+= imx_rgpio2p.o
> obj-$(CONFIG_PIC32_GPIO) += pic32_gpio.o
> +obj-$(CONFIG_OCTEON_GPIO)+= octeon_gpio.o
> obj-$(CONFIG_MVEBU_GPIO) += mvebu_gpio.o
> obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
> obj-$(CONFIG_$(SPL_)PCF8575_GPIO)+= pcf8575_gpio.o
> diff --git a/drivers/gpio/octeon_gpio.c b/drivers/gpio/octeon_gpio.c
> new file mode 100644
> index 00..d7ac9a1910
> --- /dev/null
> +++ b/drivers/gpio/octeon_gpio.c
> @@ -0,0 +1,253 @@
> +// SPDX-License-Identifier:GPL-2.0
> +/*
> + * Copyright (C) 2018 Marvell International Ltd.
> + *
> + * (C) Copyright 2011
> + * eInfochips Ltd.
> + * Written-by: Ajay Bhargav
> + *
> + * (C) Copyright 2010
> + * Marvell Semiconductor
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +/* Returns the bit value to write or read based on the offset */
> +#define GPIO_BIT(x) BIT_ULL((x) & 0x3f)
> +
> +#define GPIO_RX_DAT 0x00
> +#define GPIO_TX_SET 0x08
> +#define GPIO_TX_CLR 0x10
> +#define GPIO_CONST 0x90/* OcteonTX only */
> +
> +/* Offset to register-set for 2nd GPIOs (> 63), OcteonTX only */
> +#define GPIO1_OFFSET 0x1400
> +
> +/* GPIO_CONST register bits */
> +#define GPIO_CONST_GPIOS_MASKGENMASK_ULL(7, 0)
> +
> +/* GPIO_BIT_CFG register bits */
> +#define GPIO_BIT_CFG_TX_OE BIT_ULL(0)
> +#define GPIO_BIT_CFG_PIN_XOR BIT_ULL(1)
> +#define GPIO_BIT_CFG_INT_EN BIT_ULL(2)
> +#define GPIO_BIT_CFG_PIN_SEL_MASK GENMASK_ULL(26, 16)
> +
> +enum {
> + PROBE_PCI = 0, /* PCI based probing */
> + PROBE_DT, /* DT based probing */
> +};
> +
> +struct octeon_gpio_data {
> + int probe;
> + u32 reg_offs;
> + u32 gpio_bit_cfg_offs;
> +};
> +
> +struct octeon_gpio {
> + void __iomem *base;
> + const struct octeon_gpio_data *data;
> +};
> +
> +/* Returns the offset to the output register based on the offset and value */
> +static u32 gpio_tx_reg(int offset, int value)
> +{
> + u32 ret;
> +
> + ret = value ? GPIO_TX_SET : GPIO_TX_CLR;
> + if (offset >
[PATCH] arm: dts: imx7: Fix error in coresight TPIU graph connection
> OF graph endpoint connections must be bidirectional and dtc warn if they > are not. i.MX7 based DTs have an error and generate > warnings: > arch/arm/dts/imx7d-sdb.dtb: Warning (graph_endpoint): > /replicator/ports/port@0/endpoint: graph connection to node > '/soc/tpiu@30087000/port/endpoint' is not bidirectional > arch/arm/dts/imx7d-sdb.dtb: Warning (graph_endpoint): > /soc/tpiu@30087000/port/endpoint: graph connection to node > '/replicator/ports/port@1/endpoint' is not bidirectional > Signed-off-by: Ilko Iliev Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 1/1] ARM: mx6: make CAAM usable on the i.MX6 boards
> Even if the HAB fuse is not set we want to be able to use the Cryptographic > Accelerator and Assurance Module (CAAM) for generating random numbers. So > SYS_FSL_HAS_SEC should be selected even if IMX_HAB is not set. > arch_misc_init() has to be called to initialize the CAAM. > Signed-off-by: Heinrich Schuchardt Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] watchdog: imx: Support set timeout by wdt command
> After "4b969deac0 watchdog: imx: Add DM support", the imx watchdog > can be started by wdt command. But the imx watchdog driver only > support start with the default timeout. > This commit adds the support for setting the timeout which pass from > the wdt command into the imx watchdog. If the timeout out of the > valid range(0.5~128s), start the watchdog with a timeout within the > valid range and the timeout is the one which closest to the passed > timeout. > Signed-off-by: Yuezhang.Mo > Reviewed-by: Andy.Wu > Reviewed-by: stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 1/3] misc: scu_api: Add SCFW API to get the index of boot container set
> Add SCFW API sc_misc_get_boot_container to get current boot container > set index. > The index value returns 1 for primary container set, 2 for secondary > container set. > Signed-off-by: Ye Li > Reviewed-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2 1/1] power: pmic_pca9450: fix PCA9450A I2C address
> Quoting Ye Li from NXP: > "We have confirmed with PMIC team, 0x35 is used only on early chips > and not used any more. 0x25 is the final address." > Fix it by merging power_pca9450a_init and power_pca9450b_init into one > function power_pca9450_init. > Signed-off-by: Sébastien Szymanski > Reviewed-by: Fabio Estevam > Reviewed-by: Ye Li Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] imx6: aristainetos: sync defconfig with 2020.10
> as patch > gpio: search for gpio label if gpio is not found through bank name > is now in mainline, but functionality is disabled, we > need to enable > CONFIG_DM_GPIO_LOOKUP_LABEL > for the aristainetos boards. > Signed-off-by: Heiko Schocher Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] gpio: mxc_gpio: Improve to use ofdata_to_platdata
> Current mxc_gpio DM driver allocates the platdata in bind function to > handle both OF_CONTROL enabled case and disabled case. This implementation > puts the devfdt_get_addr in bind, which introduces much overhead especially > in board_f phase. > Change the driver to a common way for handling the cases by using > ofdata_to_platdata and using DM framework to allocate platdata. > Signed-off-by: Ye Li > Reviewed-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] arm: Add extra boot device (UART) to run Ymodem u-boot.img boot on XEA (imx28)
> This commit enables imx28 based XEA board's u-boot.sb (SPL) to download > u-boot proper (u-boot.img) via Ymodem protocol. > This is extremely useful in the recovery scenario where u-boot.sb is > downloaded via uuu utility to SDRAM [*], and then one can upload u-boot > proper via serial console to fully debrick the device. > Note - debricking procedure of imx28 devices: > - NXP's original USB based tools (like mxsldr or uuu) expect single > u-boot.sb which is a relic of the old U-Boot (~2013) without SPL and > U-Boot proper distinction. > [*] On Host: > > cat << EOF > imx28_xea.lst > uuu_version 1.3.0 > SDPS: boot -f /srv/tftp/xea/u-boot.sb > SDPU: done > EOF > Please start picocom: > sudo picocom -b 115200 -s "sz -vv" /dev/ttyUSB1 > sudo ./uuu/uuu -V imx28_xea.lst > On the U-boot console one shall see: > Trying to boot from UART > CCC > Then please press CTRL+A, S > and type u-boot.img > Signed-off-by: Lukasz Majewski > Acked-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] pico-imx6ul: Fix Quick Start Guide URL
> The current URL for the pico imx6ul board is not valid anymore. Change > to a different URL that works. > Signed-off-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 1/2] spi: fsl_qspi: Add support for i.MX7ULP
> Add compatible string and driver data for i.MX7ULP. > Meanwhile, the address set to SFA1AD/SFA2AD/SFB1AD/SFB2AD should > align with 1KB, because the lowest 10 bits are reserved by the > registers definition. > For i.MX7ULP which has only 128Bytes AHB buffer, must align it > when setting the registers and selecting cs. > Signed-off-by: Ye Li > Reviewed-by: Ashish Kumar > Reviewed-by: Kuldeep Singh Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 2/2] spi: fsl_qspi: Support to use full AHB space on i.MX
> i.MX platforms provide large AHB mapped space for QSPI, each > controller has 256MB. However, current driver only maps small > size (AHB buffer size) of AHB space, this implementation > causes i.MX failed to boot M4 with QSPI XIP image. > Add config CONFIG_FSL_QSPI_AHB_FULL_MAP (default enabled for i.MX) > to address above problem. > When the config is set: > 1. Full AHB space is divided to each CS. > 2. A dedicated LUT entry is used for AHB read only. > 3. The MODE instruction in LUT is replaced to standard ADDR instruction > 4. The address in spi_mem_op is used to SFAR and AHB read > Signed-off-by: Ye Li > Reviewed-by: Ashish Kumar > Reviewed-by: Kuldeep Singh Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] imx6: Remove unneeded CONFIG_DM_MDIO
> As explained in the CONFIG_DM_MDIO text inside drivers/net/Kconfig: > "Useful in particular for systems that support > DM_ETH and have a stand-alone MDIO hardware block shared by multiple > Ethernet interfaces." > > i.MX6 has a single FEC instance, so there is no need to select > CONFIG_DM_MDIO. > Remove it from the i.MX6 defconfig files. > Signed-off-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
Re: [PATCH] mmc: msm_sdhci: Use mmc_of_parse for setting host_caps
On Thu, Jul 16, 2020 at 4:50 PM Anibal Limon wrote: > > I tested the patch using, > > https://snapshots.linaro.org/96boards/dragonboard410c/linaro/uboot/28/ > > And now the mmc devices appears. > > On Thu, 16 Jul 2020 at 04:07, Manivannan Sadhasivam > wrote: >> >> Since the introduction of 'get_cd' callback in sdhci core, >> dragonboard410c's MMC interface is broken. It turns out that 'get_cd' >> callback checks for the host_caps for validating the chip select. And >> since the msm_sdhci driver is not parsing the host_caps from DT, not >> all of the cababilities are parsed properly. This results in the MMC >> interfaces to be broken. >> >> Hence, fix this by adding a call to 'mmc_of_parse' during driver probe. >> >> Signed-off-by: Manivannan Sadhasivam > > Tested-by: Aníbal Limón >> >> --- >> drivers/mmc/msm_sdhci.c | 4 >> 1 file changed, 4 insertions(+) >> >> diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c >> index da3ae2ec35..23e2e0fbc3 100644 >> --- a/drivers/mmc/msm_sdhci.c >> +++ b/drivers/mmc/msm_sdhci.c >> @@ -142,6 +142,10 @@ static int msm_sdc_probe(struct udevice *dev) >> writel(caps, host->ioaddr + SDHCI_VENDOR_SPEC_CAPABILITIES0); >> } >> >> + ret = mmc_of_parse(dev, >cfg); >> + if (ret) >> + return ret; >> + >> host->mmc = >mmc; >> host->mmc->dev = dev; >> ret = sdhci_setup_cfg(>cfg, host, 0, 0); >> -- >> 2.17.1 >> Reviewed-By: Ramon Fried
Re: [PATCH] bcmgenet: fix DMA buffer management
On 7/16/20 7:02 AM, Jason Wessel wrote:
> On 7/9/20 3:11 AM, etienne.du...@gmail.com wrote:
>> From: Etienne Dublé
>>
>> This commit fixes a serious issue occuring when several network
>> commands are run on a raspberry pi 4 board: for instance a "dhcp"
>> command and then one or several "tftp" commands. In this case,
>> packet recv callbacks were called several times on the same packets,
>> and send function was failing most of the time.
>>
>> note: if the boot procedure is made of a single network
>> command, the issue is not visible.
>>
>> The issue is related to management of the packet ring buffers
>> (producer / consumer) and DMA.
>> Each time a packet is received, the ethernet device stores it
>> in the buffer and increments an index called RDMA_PROD_INDEX.
>> Each time the driver outputs a received packet, it increments
>> another index called RDMA_CONS_INDEX.
>>
>> Between each pair of network commands, as part of the driver
>> 'start' function, previous code tried to reset both RDMA_CONS_INDEX
>> and RDMA_PROD_INDEX to 0. But RDMA_PROD_INDEX cannot be written from
>> driver side, thus its value was actually not updated, and only
>> RDMA_CONS_INDEX was reset to 0. This was resulting in a major
>> synchronization issue between the driver and the device. Most
>> visible bahavior was that the driver seemed to receive again the
>> packets from the previous commands (e.g. DHCP response packets
>> "received" again when performing the first TFTP command).
>>
>> This fix consists in setting RDMA_CONS_INDEX to the same
>> value as RDMA_PROD_INDEX, when resetting the driver.
>>
>> The same kind of fix was needed on the TX side, and a few variables
>> had to be reset accordingly (c_index, tx_index, rx_index).
>
>
> While there is some kind of problem with the driver, because I too
> have observed a problem with multiple requests timing out or failing,
> this patch makes the problem much worse. I was only able to complete
> a single tftp request.
>
> In my case I am using a static IP address and serverip.
>
> Also your patch was missing the sign-off line. Please consider
> running your patches through scripts/checkpatch.pl.
>
> Cheers,
> Jason.
>
>> ---
>> drivers/net/bcmgenet.c | 15 +++
>> 1 file changed, 7 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/net/bcmgenet.c b/drivers/net/bcmgenet.c
>> index 11b6148ab6..a4facfd63f 100644
>> --- a/drivers/net/bcmgenet.c
>> +++ b/drivers/net/bcmgenet.c
>> @@ -378,8 +378,6 @@ static void rx_descs_init(struct bcmgenet_eth_priv *priv)
>> u32 len_stat, i;
>> void *desc_base = priv->rx_desc_base;
>>
>> -priv->c_index = 0;
>> -
>> len_stat = (RX_BUF_LENGTH << DMA_BUFLENGTH_SHIFT) | DMA_OWN;
>>
>> for (i = 0; i < RX_DESCS; i++) {
>> @@ -403,8 +401,10 @@ static void rx_ring_init(struct bcmgenet_eth_priv *priv)
>> writel(RX_DESCS * DMA_DESC_SIZE / 4 - 1,
>> priv->mac_reg + RDMA_RING_REG_BASE + DMA_END_ADDR);
>>
>> -writel(0x0, priv->mac_reg + RDMA_PROD_INDEX);
>> -writel(0x0, priv->mac_reg + RDMA_CONS_INDEX);
>> +/* cannot init RDMA_PROD_INDEX to 0, so align RDMA_CONS_INDEX on it
>> instead */
>> +priv->c_index = readl(priv->mac_reg + RDMA_PROD_INDEX);
>> +writel(priv->c_index, priv->mac_reg + RDMA_CONS_INDEX);
>> +priv->rx_index = priv->c_index;
printf("before RX_IDX: 0x%x\n", priv->rx_index);
I added a printf() like above for the RX and TX to see what is going on when
I try and transfer a kernel Image file the second time.
U-Boot> tftp ${loadaddr} bootfs/Image
before RX_IDX: 0x0
before TX_IDX: 0x0
Using ethernet@7d58 device
Filename 'bootfs/Image'.
Load address: 0x8
Loading: ## Warning: gatewayip needed but not set
## 16.8 MiB
6.1 MiB/s
done
Bytes transferred = 17615360 (10cca00 hex)
U-Boot> tftp ${loadaddr} bootfs/Image
before RX_IDX: 0xe4
before TX_IDX: 0x2ee3
Using ethernet@7d58 device
Filename 'bootfs/Image'.
Load address: 0x8
Loading: ## Warning: gatewayip needed but not set
The TX_IDX is now 0x2ee3 which is definitely not going to work.
According to the driver file there are only 256 (0xFF) slots,
which is why it hangs, with your change.
Jason.
>> writel((RX_DESCS << DMA_RING_SIZE_SHIFT) | RX_BUF_LENGTH,
>> priv->mac_reg + RDMA_RING_REG_BASE + DMA_RING_BUF_SIZE);
>> writel(DMA_FC_THRESH_VALUE, priv->mac_reg + RDMA_XON_XOFF_THRESH);
>> @@ -421,8 +421,9 @@ static void tx_ring_init(struct bcmgenet_eth_priv *priv)
>> writel(0x0, priv->mac_reg + TDMA_WRITE_PTR);
>> writel(TX_DESCS * DMA_DESC_SIZE / 4 - 1,
>> priv->mac_reg + TDMA_RING_REG_BASE + DMA_END_ADDR);
>> -writel(0x0, priv->mac_reg + TDMA_PROD_INDEX);
>> -writel(0x0, priv->mac_reg + TDMA_CONS_INDEX);
>> +/* cannot init TDMA_CONS_INDEX to 0, so align TDMA_PROD_INDEX on it
>> instead */
>> +priv->tx_index = readl(priv->mac_reg + TDMA_CONS_INDEX);
>> +
Pull request for UEFI sub-system for efi-2020-10-rc1 (4)
The following changes since commit 47b0a493247b38c1557062e108cc4868e211a73e: Merge branch '2020-07-15-ci-updates' (2020-07-15 15:48:05 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git tags/efi-2020-10-rc1-4 for you to fetch changes up to c70f44817d466848c421ed7159bc9aba428e69ad: efi_loader: simplify 'printenv -e' (2020-07-16 12:37:03 +0200) Gitlab and Travis showed no problems: https://gitlab.denx.de/u-boot/custodians/u-boot-efi/pipelines/4071 https://travis-ci.org/github/xypron2/u-boot/builds/708688078 Pull request for UEFI sub-system for efi-2020-10-rc1 (4) Improvements for the UEFI subsystem include: * support for read-only TEE-backed variables * allow to compile PK, KEK, db, dbx fixed values into U-Boot * bug fixes Python testing related changes comprise: * enable 'bootefi hello' for better test coverage * remove SKIP messages in UEFI Python tests The fitupd command is dropped. Build errors for the lsblk command are fixed. Heinrich Schuchardt (12): cmd: drop fitupd command cmd: fix lsblk command efi_selftest: enable 'bootefi hello' efi_loader: skip warnings for network configuration efi_loader: restructure code for TEE variables efi_loader: update secure state doc: provide links to Microsoft UEFI certificates efi_loader: configuration of variables store efi_loader: identify PK, KEK, db, dbx correctly efi_loader: pre-seed UEFI variables efi_loader: describe EFI_VAR_FILE_MAGIC efi_loader: simplify 'printenv -e' Ilias Apalodimas (1): efi_loader: display RO attribute with TEE-backed variables cmd/Kconfig | 8 +- cmd/Makefile | 1 - cmd/fitupd.c | 30 -- cmd/lsblk.c | 2 + cmd/nvedit.c | 7 +- cmd/nvedit_efi.c | 106 configs/sandbox_defconfig | 1 + doc/README.dfutftp| 2 - doc/README.update | 5 - doc/uefi/uefi.rst | 9 ++ include/asm-generic/sections.h| 2 + include/efi_variable.h| 40 +++- include/mm_communication.h| 43 lib/efi_loader/Kconfig| 53 +++--- lib/efi_loader/Makefile | 6 +- lib/efi_loader/efi_var_common.c | 182 ++ lib/efi_loader/efi_var_file.c | 8 +- lib/efi_loader/efi_var_seed.S | 17 lib/efi_loader/efi_variable.c | 203 ++ lib/efi_loader/efi_variable_tee.c | 150 +++- test/py/tests/test_efi_loader.py | 16 ++- 21 files changed, 552 insertions(+), 339 deletions(-) delete mode 100644 cmd/fitupd.c create mode 100644 lib/efi_loader/efi_var_seed.S
Re: [PATCH 1/1] cmd: fix lsblk command
On Mon, 13 Jul 2020 at 14:25, Heinrich Schuchardt wrote: > > Add missing includes. > Add CMD_LSBLK to sandbox_defconfig. > > Signed-off-by: Heinrich Schuchardt > --- > cmd/lsblk.c | 2 ++ > configs/sandbox_defconfig | 1 + > 2 files changed, 3 insertions(+) Reviewed-by: Simon Glass
Re: [PATCH v3 29/49] rockchip: Enable building a SPI ROM image on bob
Hi Jagan,
On Wed, 15 Jul 2020 at 13:14, Jagan Teki wrote:
>
> Hi Simon,
>
> On Thu, Jul 16, 2020 at 12:10 AM Simon Glass wrote:
> >
> > Hi Jagan,
> >
> > On Mon, 13 Jul 2020 at 09:36, Jagan Teki wrote:
> > >
> > > On Fri, Jul 10, 2020 at 6:11 AM Simon Glass wrote:
> > > >
> > > > Add a simple binman config and enable CONFIG_HAS_ROM so that U-Boot
> > > > produces a ROM for bob.
> > > >
> > > > Signed-off-by: Simon Glass
> > > > ---
> > > >
> > > > (no changes since v1)
> > > >
> > > > arch/arm/dts/rk3399-gru-u-boot.dtsi | 4
> > > > arch/arm/dts/rk3399-gru.dtsi | 2 +-
> > > > arch/arm/dts/rk3399-u-boot.dtsi | 27 +++
> > > > arch/arm/mach-rockchip/rk3399/Kconfig | 1 +
> > > > 4 files changed, 33 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi
> > > > b/arch/arm/dts/rk3399-gru-u-boot.dtsi
> > > > index 7bddc3acdb..390ac2bb5a 100644
> > > > --- a/arch/arm/dts/rk3399-gru-u-boot.dtsi
> > > > +++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi
> > > > @@ -4,3 +4,7 @@
> > > > */
> > > >
> > > > #include "rk3399-u-boot.dtsi"
> > > > +
> > > > +_flash {
> > > > + u-boot,dm-pre-reloc;
> > > > +};
> > > > diff --git a/arch/arm/dts/rk3399-gru.dtsi b/arch/arm/dts/rk3399-gru.dtsi
> > > > index 7ac88392f2..f9c5bb607b 100644
> > > > --- a/arch/arm/dts/rk3399-gru.dtsi
> > > > +++ b/arch/arm/dts/rk3399-gru.dtsi
> > > > @@ -537,7 +537,7 @@ ap_i2c_audio: {
> > > > pinctrl-names = "default", "sleep";
> > > > pinctrl-1 = <_sleep>;
> > > >
> > > > - spiflash@0 {
> > > > + spi_flash: spiflash@0 {
> > > > compatible = "jedec,spi-nor";
> > > > reg = <0>;
> > > >
> > > > diff --git a/arch/arm/dts/rk3399-u-boot.dtsi
> > > > b/arch/arm/dts/rk3399-u-boot.dtsi
> > > > index 8237782408..a76bbea730 100644
> > > > --- a/arch/arm/dts/rk3399-u-boot.dtsi
> > > > +++ b/arch/arm/dts/rk3399-u-boot.dtsi
> > > > @@ -4,11 +4,14 @@
> > > > */
> > > > #define USB_CLASS_HUB 9
> > > >
> > > > +#include "rockchip-u-boot.dtsi"
> > > > +
> > > > / {
> > > > aliases {
> > > > mmc0 =
> > > > mmc1 =
> > > > pci0 =
> > > > + spi1 =
> > > > };
> > > >
> > > > cic: syscon@ff62 {
> > > > @@ -57,6 +60,30 @@
> > > >
> > > > };
> > > >
> > > > +#ifdef CONFIG_HAS_ROM
> > > > + {
> > > > + rom {
> > > > + filename = "u-boot.rom";
> > > > + size = <0x40>;
> > > > + pad-byte = <0xff>;
> > > > +
> > > > + mkimage {
> > > > + args = "-n rk3399 -T rkspi";
> > > > + u-boot-spl {
> > > > + };
> > > > + };
> > >
> > > How could attach u-boot-spl for TPL builds where TPL has to args with
> > > ROM header. right now we are doing in a monolithic way.
> > >
> > > ./tools/mkimage -n rk3399 -T rkspi -d
> > > tpl/u-boot-tpl.bin:spl/u-boot-spl.bin idbloader.img
> >
> > I don't really follow this question and I have read it many times over
> > the past few days,
>
> Sorry for the confusion. What I'm trying to ask here is about binman
> node syntax for TPL based images?
OK, that would be:
mkimage {
args = "-n rk3399 -T rkspi";
u-boot-tpl {
};
};
Regards,
Simon
Re: [PATCH 2/2] fdt_support: skip MTD node with "disabled" in fdt_fixup_mtdparts()
On Wed, 15 Jul 2020 at 04:57, Masahiro Yamada wrote: > > Currently, fdt_fixup_mtdparts() only checks the compatible property. > It is pointless to fix up the disabled node. > > Skip the node if it has the property: > > status = "disabled" > > Signed-off-by: Masahiro Yamada > --- > > common/fdt_support.c | 17 ++--- > 1 file changed, 10 insertions(+), 7 deletions(-) Reviewed-by: Simon Glass Are there any tests for this code? I am thinking we should migrate fdt_support to use livetree...
Re: [PATCH v2 06/14] board_f: m68k: Factor out m68k-specific bdinfo setup
Hi Ovidiu,
On Wed, 15 Jul 2020 at 08:07, Ovidiu Panait wrote:
>
> Hi Simon,
>
> On 15.07.2020 04:05, Simon Glass wrote:
> > On Fri, 10 Jul 2020 at 04:25, Ovidiu Panait
> > wrote:
> >> Factor out m68k-specific bdinfo setup to arch_setup_bdinfo in
> >> arch/m68k/lib/bdinfo.c. Also, use if(IS_ENABLED()) instead of #ifdef where
> >> possible.
> >>
> >> Signed-off-by: Ovidiu Panait
> >> ---
> >> v2 updates:
> >> - use "if (IS_ENABLED(CONFIG_SYS_HAS_SRAM))" instead of
> >>"#ifdef CONFIG_SYS_SRAM_BASE"
> >>
> >> arch/m68k/lib/bdinfo.c | 32
> >> common/board_f.c | 14 --
> >> 2 files changed, 36 insertions(+), 10 deletions(-)
> > Reviewed-by: Simon Glass
> >
> > See below
> >
> >> diff --git a/arch/m68k/lib/bdinfo.c b/arch/m68k/lib/bdinfo.c
> >> index 971c47c306..3257195add 100644
> >> --- a/arch/m68k/lib/bdinfo.c
> >> +++ b/arch/m68k/lib/bdinfo.c
> >> @@ -11,6 +11,38 @@
> >>
> >> DECLARE_GLOBAL_DATA_PTR;
> >>
> >> +int arch_setup_bdinfo(void)
> >> +{
> >> + bd_t *bd = gd->bd;
> >> +
> >> + /*
> >> +* Save local variables to board info struct
> >> +*/
> >> + bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;/* start of memory
> >> */
> >> + bd->bi_memsize = gd->ram_size; /* size in bytes */
> >> +
> >> + if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
> >> + bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM
> >> */
> >> + bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM
> >> */
> >> + }
> > I wonder if we can do better - can't we move the SDRAM code back to
> > the generic bdinfo.c ?
>
> I am not sure that I understand, could you please explain it further?
>
> When talking about the generic bdinfo.c, you are referring to
> cmd/bdinfo.c? I see that cmd/bdinfo.c currently only takes care of
> printing various bd->bi_* fields, not assigning them.
>
> Where exactly should I move the "if (IS_ENABLED(CONFIG_SYS_HAS_SRAM))
> {...}" block?
>
>
> Do you mean to create a generic setup_bdinfo that populates generic
> bd->bi_* fields and at the end calls the arch-specific variant
> arch_setup_bdinfo?
Er yes, that's what I meant! You will go far with your psychic abilities.
Regards,
Simon
Re: [PATCH 1/2] fdt_support: call mtdparts_init() after finding MTD node to fix up
On Wed, 15 Jul 2020 at 04:57, Masahiro Yamada
wrote:
>
> Platform code can call fdt_fixup_mtdparts() in order to hand U-Boot's
> MTD partitions over to the Linux device tree.
>
> Currently, fdt_fixup_mtdparts() calls mtdparts_init() in its entry.
> If no target MTD device is found, an error message like follows is
> displayed:
>
> Device nand0 not found!
>
> This occurs when the same code (e.g. arch/arm/mach-uniphier/fdt-fixup.c)
> is shared among several boards, but not all boards support an MTD device.
>
> Parse the DT first, then call mtdparts_init() only when the target MTD
> node is found.
>
> Yet, you still need to call mtdparts_init() before device_find().
>
> Signed-off-by: Masahiro Yamada
> ---
>
> common/fdt_support.c | 11 ---
> 1 file changed, 8 insertions(+), 3 deletions(-)
Reviewed-by: Simon Glass
>
> diff --git a/common/fdt_support.c b/common/fdt_support.c
> index b010d0b552ad..717b2b6354c0 100644
> --- a/common/fdt_support.c
> +++ b/common/fdt_support.c
> @@ -951,9 +951,7 @@ void fdt_fixup_mtdparts(void *blob, const struct
> node_info *node_info,
> struct mtd_device *dev;
> int i, idx;
> int noff;
> -
> - if (mtdparts_init() != 0)
> - return;
> + bool initialized = false;
How about inited as it is shorter?
>
> for (i = 0; i < node_info_size; i++) {
> idx = 0;
> @@ -963,6 +961,13 @@ void fdt_fixup_mtdparts(void *blob, const struct
> node_info *node_info,
> debug("%s: %s, mtd dev type %d\n",
> fdt_get_name(blob, noff, 0),
> node_info[i].compat, node_info[i].type);
> +
> + if (!initialized) {
> + if (mtdparts_init() != 0)
> + return;
> + initialized = true;
> + }
> +
> dev = device_find(node_info[i].type, idx++);
> if (dev) {
> if (fdt_node_set_part_info(blob, noff, dev))
> --
> 2.17.1
>
Re: [PATCH] fdt_support: add static to fdt_node_set_part_info()
On Wed, 15 Jul 2020 at 04:36, Masahiro Yamada wrote: > > This function is only called from fdt_fixup_mtdpart() in the same file. > > Signed-off-by: Masahiro Yamada > --- > > common/fdt_support.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Simon Glass
Re: [PATCHv5 02/18] configs: enable DM_MDIO for LS1021A-TWR and LS1021A-TSN
On Thu, Jul 16, 2020 at 06:09:09PM +0800, Zhiqiang Hou wrote:
> From: Vladimir Oltean
>
> The tsec driver now requires DM_MDIO when DM_ETH is enabled. To avoid
> build errors, enable DM_MDIO in these boards' configs before we actually
> add DM_MDIO support to tsec.
>
> Signed-off-by: Vladimir Oltean
> Signed-off-by: Hou Zhiqiang
> ---
The series doesn't build at this patch for ls1021a family, and is broken
until 05/18 "net: tsec: convert to use DM_MDIO when DM_ETH enabled". The
reason is that fsl_pq_mdio_init is defined in drivers/net/fsl_mdio.c
only when CONFIG_DM_MDIO=n.
arm-none-linux-gnueabihf-ld.bfd: drivers/net/built-in.o: in function
`tsec_probe':
drivers/net/tsec.c:870: undefined reference to `fsl_pq_mdio_init'
make: *** [Makefile:1762: u-boot] Error 1
The build is finally fixed in 05/18 when you delete fsl_pq_mdio_init()
from tsec.c which is not really needed.
I don't think it's a good idea to break the build in between patches, it
destroys bisectability. I think you would need to add one more patch,
right before this one, that adds a dummy definition for this function.
You can then remove it in the "net: tsec: convert to use DM_MDIO when
DM_ETH enabled".
Like this:
diff --git a/drivers/net/fsl_mdio.c b/drivers/net/fsl_mdio.c
index 43040d4c3f89..4128b30f7412 100644
--- a/drivers/net/fsl_mdio.c
+++ b/drivers/net/fsl_mdio.c
@@ -149,6 +149,12 @@ int fsl_pq_mdio_init(bd_t *bis, struct fsl_pq_mdio_info
*info)
return mdio_register(bus);
}
#else /* CONFIG_DM_MDIO */
+
+int fsl_pq_mdio_init(bd_t *bis, struct fsl_pq_mdio_info *info)
+{
+ return 0;
+}
+
#if defined(CONFIG_PHYLIB)
static int tsec_mdio_read(struct udevice *dev, int addr, int devad, int reg)
{
This is really fixing an issue of commit 2932c5a802a9 ("net: tsec:
fsl_mdio: add DM MDIO support"), maybe you could even add a Fixes: tag
for that.
> V5:
> - Pick from
> https://patchwork.ozlabs.org/project/uboot/patch/20200503185227.28731-3-olte...@gmail.com/.
>
> configs/ls1021atsn_qspi_defconfig | 1 +
> configs/ls1021atsn_sdcard_defconfig | 1 +
> configs/ls1021atwr_nor_SECURE_BOOT_defconfig| 1 +
> configs/ls1021atwr_nor_defconfig| 1 +
> configs/ls1021atwr_nor_lpuart_defconfig | 1 +
> configs/ls1021atwr_qspi_defconfig | 1 +
> configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 1 +
> configs/ls1021atwr_sdcard_ifc_defconfig | 1 +
> configs/ls1021atwr_sdcard_qspi_defconfig| 1 +
> 9 files changed, 9 insertions(+)
>
> diff --git a/configs/ls1021atsn_qspi_defconfig
> b/configs/ls1021atsn_qspi_defconfig
> index a62e04e92a..9a659c5512 100644
> --- a/configs/ls1021atsn_qspi_defconfig
> +++ b/configs/ls1021atsn_qspi_defconfig
> @@ -43,6 +43,7 @@ CONFIG_PHY_ATHEROS=y
> CONFIG_PHY_BROADCOM=y
> CONFIG_PHY_FIXED=y
> CONFIG_DM_ETH=y
> +CONFIG_DM_MDIO=y
> CONFIG_PHY_GIGE=y
> CONFIG_MII=y
> CONFIG_TSEC_ENET=y
> diff --git a/configs/ls1021atsn_sdcard_defconfig
> b/configs/ls1021atsn_sdcard_defconfig
> index db4f0ab796..235265bd74 100644
> --- a/configs/ls1021atsn_sdcard_defconfig
> +++ b/configs/ls1021atsn_sdcard_defconfig
> @@ -54,6 +54,7 @@ CONFIG_PHY_ATHEROS=y
> CONFIG_PHY_BROADCOM=y
> CONFIG_PHY_FIXED=y
> CONFIG_DM_ETH=y
> +CONFIG_DM_MDIO=y
> CONFIG_PHY_GIGE=y
> CONFIG_MII=y
> CONFIG_TSEC_ENET=y
> diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
> b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
> index 0bf4aad102..8946bc1a70 100644
> --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
> +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
> @@ -45,6 +45,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
> CONFIG_SYS_FLASH_CFI=y
> CONFIG_PHY_ATHEROS=y
> CONFIG_DM_ETH=y
> +CONFIG_DM_MDIO=y
> CONFIG_PHY_GIGE=y
> CONFIG_E1000=y
> CONFIG_MII=y
> diff --git a/configs/ls1021atwr_nor_defconfig
> b/configs/ls1021atwr_nor_defconfig
> index 5507dbe3c1..12b39703d4 100644
> --- a/configs/ls1021atwr_nor_defconfig
> +++ b/configs/ls1021atwr_nor_defconfig
> @@ -47,6 +47,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
> CONFIG_SYS_FLASH_CFI=y
> CONFIG_PHY_ATHEROS=y
> CONFIG_DM_ETH=y
> +CONFIG_DM_MDIO=y
> CONFIG_PHY_GIGE=y
> CONFIG_E1000=y
> CONFIG_MII=y
> diff --git a/configs/ls1021atwr_nor_lpuart_defconfig
> b/configs/ls1021atwr_nor_lpuart_defconfig
> index cdf81957a8..84b724930f 100644
> --- a/configs/ls1021atwr_nor_lpuart_defconfig
> +++ b/configs/ls1021atwr_nor_lpuart_defconfig
> @@ -49,6 +49,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
> CONFIG_SYS_FLASH_CFI=y
> CONFIG_PHY_ATHEROS=y
> CONFIG_DM_ETH=y
> +CONFIG_DM_MDIO=y
> CONFIG_PHY_GIGE=y
> CONFIG_E1000=y
> CONFIG_MII=y
> diff --git a/configs/ls1021atwr_qspi_defconfig
> b/configs/ls1021atwr_qspi_defconfig
> index 4c82d66899..52a4c5106b 100644
> --- a/configs/ls1021atwr_qspi_defconfig
> +++ b/configs/ls1021atwr_qspi_defconfig
> @@ -50,6 +50,7 @@ CONFIG_SPI_FLASH_ATMEL=y
> CONFIG_SPI_FLASH_STMICRO=y
> CONFIG_PHY_ATHEROS=y
> CONFIG_DM_ETH=y
>
Re: [PATCH v2 0/9] Introduce UCLASS_SOC
On 16/07/2020 07:39, Dave Gerlach wrote: Hi, This is v2 of the series to introduce UCLASS_SOC to be used for SOC identification and attribute matching based on SoC ID info. The first version of this series can be found at [1]. Biggest change is the addition of a patch to add documentation for the SOC ID framework as requested by several folks. Otherwise, several comments were addressed in the patch to introduce the UCLASS_SOC implementation: * Renamed soc_device_attribute to soc_attr. * Added inline docs for same struct. * Moved ifdef for CONFIG_SOC_DEVICE to only include functions * Documented NULL return possiblity for soc_device_match. And a change to SOC Revision macro naming in the soc_ti_k3 driver to use SR consistently instead of PG. Regards, Dave [1] https://lists.denx.de/pipermail/u-boot/2020-June/418109.html Dave Gerlach (9): doc: Add new doc for soc ID driver model dm: soc: Introduce UCLASS_SOC for SOC ID and attribute matching test: Add tests for SOC uclass dm: soc: Introduce soc_ti_k3 driver for TI K3 SoCs arm: dts: k3-am65-wakeup: Introduce chipid node arm: dts: k3-j721e-mcu-wakeup: Introduce chipid node configs: am65x_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 configs: j721e_evm: Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 arm: mach-k3: Use SOC driver for device identification arch/arm/dts/k3-am65-wakeup.dtsi | 5 + arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 4 + .../k3-j721e-common-proc-board-u-boot.dtsi| 4 + arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 5 + arch/arm/mach-k3/common.c | 48 +++--- arch/arm/mach-k3/common.h | 6 - arch/arm/mach-k3/include/mach/hardware.h | 1 - arch/sandbox/dts/test.dts | 4 + configs/am65x_evm_a53_defconfig | 2 + configs/am65x_evm_r5_defconfig| 2 + configs/am65x_hs_evm_a53_defconfig| 2 + configs/am65x_hs_evm_r5_defconfig | 2 + configs/j721e_evm_a72_defconfig | 2 + configs/j721e_evm_r5_defconfig| 2 + configs/j721e_hs_evm_a72_defconfig| 2 + configs/j721e_hs_evm_r5_defconfig | 2 + configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + configs/sandbox_flattree_defconfig| 1 + configs/sandbox_spl_defconfig | 1 + doc/driver-model/index.rst| 1 + doc/driver-model/soc-framework.rst| 68 drivers/soc/Kconfig | 16 ++ drivers/soc/Makefile | 3 + drivers/soc/soc-uclass.c | 102 drivers/soc/soc_sandbox.c | 56 +++ drivers/soc/soc_ti_k3.c | 124 +++ include/dm/uclass-id.h| 1 + include/soc.h | 145 ++ test/dm/Makefile | 1 + test/dm/soc.c | 120 +++ 31 files changed, 698 insertions(+), 36 deletions(-) create mode 100644 doc/driver-model/soc-framework.rst create mode 100644 drivers/soc/soc-uclass.c create mode 100644 drivers/soc/soc_sandbox.c create mode 100644 drivers/soc/soc_ti_k3.c create mode 100644 include/soc.h create mode 100644 test/dm/soc.c Thank you. Reviewed-by: Grygorii Strashko -- Best regards, grygorii
Re: [PATCH 05/17] xen: Port Xen hypervizor related code from mini-os
Hello Julien,
On Wed, 2020-07-01 at 18:46 +0100, Julien Grall wrote:
> Title: s/hypervizor/hypervisor/
>
> On 01/07/2020 17:29, Anastasiia Lukianenko wrote:
> > From: Oleksandr Andrushchenko
> >
> > Port hypervizor related code from mini-os. Update essential
>
> Ditto.
>
> But I would be quite cautious to import code from mini-OS in order
> to
> support Arm. The port has always been broken and from a look below
> needs
> to be refined for Arm.
>
> > arch code to support required bit operations, memory barriers etc.
> >
> > Copyright for the bits ported belong to at least the following
> > authors,
> > please see related files for details:
> >
> > Copyright (c) 2002-2003, K A Fraser
> > Copyright (c) 2005, Grzegorz Milos, gm...@cam.ac.uk,Intel Research
> > Cambridge
> > Copyright (c) 2014, Karim Allah Ahmed
> >
> > Signed-off-by: Oleksandr Andrushchenko <
> > oleksandr_andrushche...@epam.com>
> > Signed-off-by: Anastasiia Lukianenko <
> > anastasiia_lukiane...@epam.com>
> > ---
> > arch/arm/include/asm/xen/system.h | 96 +++
> > common/board_r.c | 11 ++
> > drivers/Makefile | 1 +
> > drivers/xen/Makefile | 5 +
> > drivers/xen/hypervisor.c | 277
> > ++
> > include/xen.h | 11 ++
> > include/xen/hvm.h | 30
> > 7 files changed, 431 insertions(+)
> > create mode 100644 arch/arm/include/asm/xen/system.h
> > create mode 100644 drivers/xen/Makefile
> > create mode 100644 drivers/xen/hypervisor.c
> > create mode 100644 include/xen.h
> > create mode 100644 include/xen/hvm.h
> >
> > diff --git a/arch/arm/include/asm/xen/system.h
> > b/arch/arm/include/asm/xen/system.h
> > new file mode 100644
> > index 00..81ab90160e
> > --- /dev/null
> > +++ b/arch/arm/include/asm/xen/system.h
> > @@ -0,0 +1,96 @@
> > +/*
> > + * SPDX-License-Identifier: GPL-2.0
> > + *
> > + * (C) 2014 Karim Allah Ahmed
> > + * (C) 2020, EPAM Systems Inc.
> > + */
> > +#ifndef _ASM_ARM_XEN_SYSTEM_H
> > +#define _ASM_ARM_XEN_SYSTEM_H
> > +
> > +#include
> > +#include
> > +
> > +/* If *ptr == old, then store new there (and return new).
> > + * Otherwise, return the old value.
> > + * Atomic.
> > + */
> > +#define synch_cmpxchg(ptr, old, new) \
> > +({ __typeof__(*ptr) stored = old; \
> > + __atomic_compare_exchange_n(ptr, , new, 0,
> > __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST) ? new : old; \
> > +})
> > +
> > +/* As test_and_clear_bit, but using __ATOMIC_SEQ_CST */
> > +static inline int synch_test_and_clear_bit(int nr, volatile void
> > *addr)
> > +{
> > + u8 *byte = ((u8 *)addr) + (nr >> 3);
> > + u8 bit = 1 << (nr & 7);
> > + u8 orig;
> > +
> > + orig = __atomic_fetch_and(byte, ~bit, __ATOMIC_SEQ_CST);
> > +
> > + return (orig & bit) != 0;
> > +}
> > +
> > +/* As test_and_set_bit, but using __ATOMIC_SEQ_CST */
> > +static inline int synch_test_and_set_bit(int nr, volatile void
> > *base)
> > +{
> > + u8 *byte = ((u8 *)base) + (nr >> 3);
> > + u8 bit = 1 << (nr & 7);
> > + u8 orig;
> > +
> > + orig = __atomic_fetch_or(byte, bit, __ATOMIC_SEQ_CST);
> > +
> > + return (orig & bit) != 0;
> > +}
> > +
> > +/* As set_bit, but using __ATOMIC_SEQ_CST */
> > +static inline void synch_set_bit(int nr, volatile void *addr)
> > +{
> > + synch_test_and_set_bit(nr, addr);
> > +}
> > +
> > +/* As clear_bit, but using __ATOMIC_SEQ_CST */
> > +static inline void synch_clear_bit(int nr, volatile void *addr)
> > +{
> > + synch_test_and_clear_bit(nr, addr);
> > +}
> > +
> > +/* As test_bit, but with a following memory barrier. */
> > +//static inline int synch_test_bit(int nr, volatile void *addr)
> > +static inline int synch_test_bit(int nr, const void *addr)
> > +{
> > + int result;
> > +
> > + result = test_bit(nr, addr);
> > + barrier();
> > + return result;
> > +}
>
> I can understand why we implement sync_* helpers as AFAICT the
> generic
> helpers are not SMP safe. However...
>
> > +
> > +#define xchg(ptr, v) __atomic_exchange_n(ptr, v,
> > __ATOMIC_SEQ_CST)
> > +#define xchg(ptr, v) __atomic_exchange_n(ptr, v,
> > __ATOMIC_SEQ_CST)
> > +
> > +#define mb() dsb()
> > +#define rmb() dsb()
> > +#define wmb() dsb()
> > +#define __iormb() dmb()
> > +#define __iowmb() dmb()
>
> Why do you need to re-implement the barriers?
>
> > +#define xen_mb() mb()
> > +#define xen_rmb() rmb()
> > +#define xen_wmb() wmb()
> > +
> > +#define smp_processor_id() 0
>
> Shouldn't this be common?
>
> > +
> > +#define to_phys(x) ((unsigned long)(x))
> > +#define to_virt(x) ((void *)(x))
> > +
> > +#define PFN_UP(x) (unsigned long)(((x) + PAGE_SIZE - 1)
> > >> PAGE_SHIFT)
> > +#define PFN_DOWN(x)(unsigned long)((x) >>
> > PAGE_SHIFT)
> > +#define PFN_PHYS(x)((unsigned long)(x) <<
> > PAGE_SHIFT)
> > +#define PHYS_PFN(x)(unsigned long)((x)
[PATCH] mx6memcal: fix build
Commit 4503299 has a side effect on this board, and build is broken. Adjust mx6memcal_defconfig to build it again. Signed-off-by: Stefano Babic --- configs/mx6memcal_defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index 57e44a14ba..01a0fff6e0 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_MEMTEST_END=0x2000 CONFIG_CMD_CACHE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set +CONFIG_DM=y # CONFIG_MMC is not set CONFIG_FSL_USDHC=y CONFIG_USB=y @@ -47,4 +48,5 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y -CONFIG_REGEX=y +CONFIG_OF_LIBFDT=y +# CONFIG_EFI_LOADER is not set -- 2.25.1
Re: [PATCH] imx6: Remove unneeded CONFIG_DM_MDIO
On 16.07.20 15:03, Fabio Estevam wrote: > Hi Stefano, > > On Thu, Jul 16, 2020 at 9:26 AM Stefano Babic wrote: > >> Right - it looks like that CONFIG_DM is removed at all from mx6memcal, >> removing an implicit OF_LIBFDT. >> >> https://travis-ci.org/github/sbabic/u-boot-imx/jobs/708667322 > > I think your proposed patch makes sense. > > I have compared the .config file generated from mx6memcal_defconfig > before and after my patch and they are identical. I do not think the issue is caused by your patch - it is like a side effect and implicitely some CONFIG_ are turned off for memcal. I send a formal patch. Regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
Re: [PATCH] imx6: Remove unneeded CONFIG_DM_MDIO
Hi Stefano, On Thu, Jul 16, 2020 at 9:26 AM Stefano Babic wrote: > Right - it looks like that CONFIG_DM is removed at all from mx6memcal, > removing an implicit OF_LIBFDT. > > https://travis-ci.org/github/sbabic/u-boot-imx/jobs/708667322 I think your proposed patch makes sense. I have compared the .config file generated from mx6memcal_defconfig before and after my patch and they are identical. Thanks
Re: [GIT PULL] please pull mmc-7-24-2020
On Tue, Jul 14, 2020 at 08:00:56AM +, Peng Fan wrote: > Hi Tom, > > Please pull mmc-7-24-2020 > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] imx6: Remove unneeded CONFIG_DM_MDIO
On 16.07.20 14:18, Fabio Estevam wrote: > Hi Stefano, > > On Thu, Jul 16, 2020 at 9:05 AM Stefano Babic wrote: > >> This has a side-effect because it breaks mx6memcal. I propose to let >> this in and to fix mx6memcal as follows: > > I was not able to reproduce the build break on mx6memcal_defconfig here. > > Just applied the patch against U-Boot master and mx6memcal_defconfig built > fine. > > Could you please share the build error log? > > This patch does not touch mx6memcal, so not sure how it breaks it. Right - it looks like that CONFIG_DM is removed at all from mx6memcal, removing an implicit OF_LIBFDT. https://travis-ci.org/github/sbabic/u-boot-imx/jobs/708667322 Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
Re: [PATCH] imx6: Remove unneeded CONFIG_DM_MDIO
Hi Stefano, On Thu, Jul 16, 2020 at 9:05 AM Stefano Babic wrote: > This has a side-effect because it breaks mx6memcal. I propose to let > this in and to fix mx6memcal as follows: I was not able to reproduce the build break on mx6memcal_defconfig here. Just applied the patch against U-Boot master and mx6memcal_defconfig built fine. Could you please share the build error log? This patch does not touch mx6memcal, so not sure how it breaks it. Thanks
Re: [PATCH] imx6: Remove unneeded CONFIG_DM_MDIO
Hi Fabio, On 13.07.20 16:59, Fabio Estevam wrote: > As explained in the CONFIG_DM_MDIO text inside drivers/net/Kconfig: > > "Useful in particular for systems that support > DM_ETH and have a stand-alone MDIO hardware block shared by multiple > Ethernet interfaces." > > i.MX6 has a single FEC instance, so there is no need to select > CONFIG_DM_MDIO. > > Remove it from the i.MX6 defconfig files. > This has a side-effect because it breaks mx6memcal. I propose to let this in and to fix mx6memcal as follows: diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index 57e44a14ba..01a0fff6e0 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_MEMTEST_END=0x2000 CONFIG_CMD_CACHE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set +CONFIG_DM=y # CONFIG_MMC is not set CONFIG_FSL_USDHC=y CONFIG_USB=y @@ -47,4 +48,5 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y -CONFIG_REGEX=y +CONFIG_OF_LIBFDT=y +# CONFIG_EFI_LOADER is not set (I will send afterwards a proper patch). What do you think ? Stefano > Signed-off-by: Fabio Estevam > --- > configs/apalis_imx6_defconfig | 1 - > configs/colibri_imx6_defconfig | 1 - > configs/dh_imx6_defconfig | 1 - > configs/mx6sabreauto_defconfig | 1 - > configs/mx6sabresd_defconfig | 1 - > 5 files changed, 5 deletions(-) > > diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig > index 34d939a0e9..e162f0a5e8 100644 > --- a/configs/apalis_imx6_defconfig > +++ b/configs/apalis_imx6_defconfig > @@ -74,7 +74,6 @@ CONFIG_PHYLIB=y > CONFIG_PHY_MICREL=y > CONFIG_PHY_MICREL_KSZ90X1=y > CONFIG_DM_ETH=y > -CONFIG_DM_MDIO=y > CONFIG_FEC_MXC=y > CONFIG_MII=y > CONFIG_PINCTRL=y > diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig > index 11cd1da26e..ffa773b581 100644 > --- a/configs/colibri_imx6_defconfig > +++ b/configs/colibri_imx6_defconfig > @@ -73,7 +73,6 @@ CONFIG_PHYLIB=y > CONFIG_PHY_MICREL=y > CONFIG_PHY_MICREL_KSZ8XXX=y > CONFIG_DM_ETH=y > -CONFIG_DM_MDIO=y > CONFIG_FEC_MXC=y > CONFIG_MII=y > CONFIG_PINCTRL=y > diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig > index d91ff77a4a..e643ade2e6 100644 > --- a/configs/dh_imx6_defconfig > +++ b/configs/dh_imx6_defconfig > @@ -77,7 +77,6 @@ CONFIG_PHYLIB=y > CONFIG_PHY_MICREL=y > CONFIG_PHY_MICREL_KSZ90X1=y > CONFIG_DM_ETH=y > -CONFIG_DM_MDIO=y > CONFIG_FEC_MXC=y > CONFIG_MII=y > CONFIG_PINCTRL=y > diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig > index 56fe307e63..106c967652 100644 > --- a/configs/mx6sabreauto_defconfig > +++ b/configs/mx6sabreauto_defconfig > @@ -76,7 +76,6 @@ CONFIG_SPI_FLASH_STMICRO=y > CONFIG_PHYLIB=y > CONFIG_PHY_ATHEROS=y > CONFIG_DM_ETH=y > -CONFIG_DM_MDIO=y > CONFIG_FEC_MXC=y > CONFIG_RGMII=y > CONFIG_MII=y > diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig > index 24bc8630f1..f88c629fbf 100644 > --- a/configs/mx6sabresd_defconfig > +++ b/configs/mx6sabresd_defconfig > @@ -83,7 +83,6 @@ CONFIG_SPI_FLASH_STMICRO=y > CONFIG_PHYLIB=y > CONFIG_PHY_ATHEROS=y > CONFIG_DM_ETH=y > -CONFIG_DM_MDIO=y > CONFIG_FEC_MXC=y > CONFIG_RGMII=y > CONFIG_MII=y > -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
Re: [PATCH] bcmgenet: fix DMA buffer management
On 7/9/20 3:11 AM, etienne.du...@gmail.com wrote:
> From: Etienne Dublé
>
> This commit fixes a serious issue occuring when several network
> commands are run on a raspberry pi 4 board: for instance a "dhcp"
> command and then one or several "tftp" commands. In this case,
> packet recv callbacks were called several times on the same packets,
> and send function was failing most of the time.
>
> note: if the boot procedure is made of a single network
> command, the issue is not visible.
>
> The issue is related to management of the packet ring buffers
> (producer / consumer) and DMA.
> Each time a packet is received, the ethernet device stores it
> in the buffer and increments an index called RDMA_PROD_INDEX.
> Each time the driver outputs a received packet, it increments
> another index called RDMA_CONS_INDEX.
>
> Between each pair of network commands, as part of the driver
> 'start' function, previous code tried to reset both RDMA_CONS_INDEX
> and RDMA_PROD_INDEX to 0. But RDMA_PROD_INDEX cannot be written from
> driver side, thus its value was actually not updated, and only
> RDMA_CONS_INDEX was reset to 0. This was resulting in a major
> synchronization issue between the driver and the device. Most
> visible bahavior was that the driver seemed to receive again the
> packets from the previous commands (e.g. DHCP response packets
> "received" again when performing the first TFTP command).
>
> This fix consists in setting RDMA_CONS_INDEX to the same
> value as RDMA_PROD_INDEX, when resetting the driver.
>
> The same kind of fix was needed on the TX side, and a few variables
> had to be reset accordingly (c_index, tx_index, rx_index).
While there is some kind of problem with the driver, because I too
have observed a problem with multiple requests timing out or failing,
this patch makes the problem much worse. I was only able to complete
a single tftp request.
In my case I am using a static IP address and serverip.
Also your patch was missing the sign-off line. Please consider
running your patches through scripts/checkpatch.pl.
Cheers,
Jason.
> ---
> drivers/net/bcmgenet.c | 15 +++
> 1 file changed, 7 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/net/bcmgenet.c b/drivers/net/bcmgenet.c
> index 11b6148ab6..a4facfd63f 100644
> --- a/drivers/net/bcmgenet.c
> +++ b/drivers/net/bcmgenet.c
> @@ -378,8 +378,6 @@ static void rx_descs_init(struct bcmgenet_eth_priv *priv)
> u32 len_stat, i;
> void *desc_base = priv->rx_desc_base;
>
> - priv->c_index = 0;
> -
> len_stat = (RX_BUF_LENGTH << DMA_BUFLENGTH_SHIFT) | DMA_OWN;
>
> for (i = 0; i < RX_DESCS; i++) {
> @@ -403,8 +401,10 @@ static void rx_ring_init(struct bcmgenet_eth_priv *priv)
> writel(RX_DESCS * DMA_DESC_SIZE / 4 - 1,
> priv->mac_reg + RDMA_RING_REG_BASE + DMA_END_ADDR);
>
> - writel(0x0, priv->mac_reg + RDMA_PROD_INDEX);
> - writel(0x0, priv->mac_reg + RDMA_CONS_INDEX);
> + /* cannot init RDMA_PROD_INDEX to 0, so align RDMA_CONS_INDEX on it
> instead */
> + priv->c_index = readl(priv->mac_reg + RDMA_PROD_INDEX);
> + writel(priv->c_index, priv->mac_reg + RDMA_CONS_INDEX);
> + priv->rx_index = priv->c_index;
> writel((RX_DESCS << DMA_RING_SIZE_SHIFT) | RX_BUF_LENGTH,
> priv->mac_reg + RDMA_RING_REG_BASE + DMA_RING_BUF_SIZE);
> writel(DMA_FC_THRESH_VALUE, priv->mac_reg + RDMA_XON_XOFF_THRESH);
> @@ -421,8 +421,9 @@ static void tx_ring_init(struct bcmgenet_eth_priv *priv)
> writel(0x0, priv->mac_reg + TDMA_WRITE_PTR);
> writel(TX_DESCS * DMA_DESC_SIZE / 4 - 1,
> priv->mac_reg + TDMA_RING_REG_BASE + DMA_END_ADDR);
> - writel(0x0, priv->mac_reg + TDMA_PROD_INDEX);
> - writel(0x0, priv->mac_reg + TDMA_CONS_INDEX);
> + /* cannot init TDMA_CONS_INDEX to 0, so align TDMA_PROD_INDEX on it
> instead */
> + priv->tx_index = readl(priv->mac_reg + TDMA_CONS_INDEX);
> + writel(priv->tx_index, priv->mac_reg + TDMA_PROD_INDEX);
> writel(0x1, priv->mac_reg + TDMA_RING_REG_BASE + DMA_MBUF_DONE_THRESH);
> writel(0x0, priv->mac_reg + TDMA_FLOW_PERIOD);
> writel((TX_DESCS << DMA_RING_SIZE_SHIFT) | RX_BUF_LENGTH,
> @@ -469,8 +470,6 @@ static int bcmgenet_gmac_eth_start(struct udevice *dev)
>
> priv->tx_desc_base = priv->mac_reg + GENET_TX_OFF;
> priv->rx_desc_base = priv->mac_reg + GENET_RX_OFF;
> - priv->tx_index = 0x0;
> - priv->rx_index = 0x0;
>
> bcmgenet_umac_reset(priv);
>
>
Re: [PATCH v3 7/8] efi_loader: signature: rework for intermediate
Hi,
I think I have found a bug in
lib/efi_loader/efi_signature.c
efi_verify_certificate()
+ cert =
x509_cert_parse(sig_data->data, sig_data->size);
+ if (!cert) {
+EFI_PRINT("Cannot
parse x509 certificate\n");
+continue;
+ }
x509_cert_parse() not only returns a pointer, but also embed a linux
error_code, so if an error happens there, the (!cert) check will fail!
I suggest using:
- if (!cert) {
+if (IS_ERR(cert)) {
Regards
Robert
[PATCHv5 11/18] dts: powerpc: p1020rdb: Add eTSEC DT nodes
From: Hou Zhiqiang
P1020RDB implements 3 enhanced three-speed Ethernet controllers,
and the connection is shown below:
eTSEC1: Connected to RGMII switch VSC7385
eTSEC2: Connected to SGMII PHY VSC8221
eTSEC3: Connected to SGMII PHY AR8021
Signed-off-by: Hou Zhiqiang
Reviewed-by: Vladimir Oltean
---
V5:
- No change.
arch/powerpc/dts/p1020-post.dtsi| 20 -
arch/powerpc/dts/p1020rdb-pc.dts| 1 +
arch/powerpc/dts/p1020rdb-pc.dtsi | 55 +
arch/powerpc/dts/p1020rdb-pc_36b.dts| 1 +
arch/powerpc/dts/p1020rdb-pd.dts| 45
arch/powerpc/dts/pq3-etsec2-0.dtsi | 35
arch/powerpc/dts/pq3-etsec2-1.dtsi | 35
arch/powerpc/dts/pq3-etsec2-2.dtsi | 35
arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi | 16 +++
arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi | 16 +++
arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi | 16 +++
11 files changed, 273 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/dts/p1020rdb-pc.dtsi
create mode 100644 arch/powerpc/dts/pq3-etsec2-0.dtsi
create mode 100644 arch/powerpc/dts/pq3-etsec2-1.dtsi
create mode 100644 arch/powerpc/dts/pq3-etsec2-2.dtsi
create mode 100644 arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi
create mode 100644 arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi
create mode 100644 arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi
diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020-post.dtsi
index 1dce8e86e9..c73539ad5c 100644
--- a/arch/powerpc/dts/p1020-post.dtsi
+++ b/arch/powerpc/dts/p1020-post.dtsi
@@ -44,10 +44,26 @@
clock-frequency = <0>;
};
- /include/ "pq3-i2c-0.dtsi"
- /include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+
+/include/ "pq3-etsec2-0.dtsi"
+ enet0: enet0_grp2: ethernet@b {
+ };
+
+/include/ "pq3-etsec2-1.dtsi"
+ enet1: enet1_grp2: ethernet@b1000 {
+ };
+
+/include/ "pq3-etsec2-2.dtsi"
+ enet2: enet2_grp2: ethernet@b2000 {
+ };
};
+/include/ "pq3-etsec2-grp2-0.dtsi"
+/include/ "pq3-etsec2-grp2-1.dtsi"
+/include/ "pq3-etsec2-grp2-2.dtsi"
+
/* PCIe controller base address 0x9000 */
{
compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq";
diff --git a/arch/powerpc/dts/p1020rdb-pc.dts b/arch/powerpc/dts/p1020rdb-pc.dts
index 7ebaa619df..715330dc50 100644
--- a/arch/powerpc/dts/p1020rdb-pc.dts
+++ b/arch/powerpc/dts/p1020rdb-pc.dts
@@ -32,4 +32,5 @@
};
};
+/include/ "p1020rdb-pc.dtsi"
/include/ "p1020-post.dtsi"
diff --git a/arch/powerpc/dts/p1020rdb-pc.dtsi
b/arch/powerpc/dts/p1020rdb-pc.dtsi
new file mode 100644
index 00..6bf424fd3f
--- /dev/null
+++ b/arch/powerpc/dts/p1020rdb-pc.dtsi
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1020 RDB-PC Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ */
+
+ {
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <>;
+ interrupts = <3 1 0 0>;
+ reg = <0x0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <>;
+ interrupts = <2 1 0 0>;
+ reg = <0x1>;
+ };
+
+ tbi0: tbi-phy@11 {
+ device_type = "tbi-phy";
+ reg = <0x11>;
+ };
+ };
+
+ mdio@25000 {
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet0: ethernet@b {
+ phy-connection-type = "rgmii-id";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+
+ };
+
+ enet1: ethernet@b1000 {
+ phy-handle = <>;
+ tbi-handle = <>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet2: ethernet@b2000 {
+ phy-handle = <>;
+ phy-connection-type = "rgmii-id";
+ };
+};
diff --git a/arch/powerpc/dts/p1020rdb-pc_36b.dts
b/arch/powerpc/dts/p1020rdb-pc_36b.dts
index c0e5ef4cf4..7680b7c7e1 100644
--- a/arch/powerpc/dts/p1020rdb-pc_36b.dts
+++ b/arch/powerpc/dts/p1020rdb-pc_36b.dts
@@ -32,4 +32,5 @@
};
};
+/include/ "p1020rdb-pc.dtsi"
/include/ "p1020-post.dtsi"
diff --git a/arch/powerpc/dts/p1020rdb-pd.dts b/arch/powerpc/dts/p1020rdb-pd.dts
index 21174a09be..e0e8993dab 100644
--- a/arch/powerpc/dts/p1020rdb-pd.dts
+++ b/arch/powerpc/dts/p1020rdb-pd.dts
@@ -17,6 +17,51 @@
soc: soc@ffe0 {
ranges = <0x0 0x0 0xffe0 0x10>;
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupts = <3 1 0
[PATCHv5 18/18] configs: P2020RDB: Enable DM_ETH config
From: Hou Zhiqiang Enable the DM_ETH and DM_MDIO config. On P2020RDB, the eTSEC1 is connecting with a switch VSC7385, so also enable the fixed PHY support. Signed-off-by: Hou Zhiqiang Reviewed-by: Vladimir Oltean --- V5: - No change. configs/P2020RDB-PC_36BIT_NAND_defconfig | 3 +++ configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 3 +++ configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 3 +++ configs/P2020RDB-PC_36BIT_defconfig | 3 +++ configs/P2020RDB-PC_NAND_defconfig | 3 +++ configs/P2020RDB-PC_SDCARD_defconfig | 3 +++ configs/P2020RDB-PC_SPIFLASH_defconfig | 3 +++ configs/P2020RDB-PC_defconfig| 3 +++ 8 files changed, 24 insertions(+) diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 3e6ea64ee3..4cd689f55d 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -66,6 +66,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -77,8 +78,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 187cbee0d6..f46463a297 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -61,6 +61,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -72,8 +73,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 88c9224001..73d1be1013 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -63,6 +63,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -74,8 +75,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 88e24c30ba..21a0e85f98 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -50,6 +50,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -61,8 +62,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index dda34dd43e..800c728ed3 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -65,6 +65,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -76,8 +77,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index c2b6ad5f32..81cbac2fe8 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -60,6 +60,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -71,8 +72,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 3ec208ee00..89308a503b 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -62,6 +62,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000
[PATCHv5 17/18] dts: powerpc: p2020rdb: Add eTSEC DT nodes
From: Hou Zhiqiang
P2020RDB implements 3 enhanced three-speed Ethernet controllers,
and the connection is shown below:
eTSEC1: Connected to RGMII switch VSC7385
eTSEC2: Connected to SGMII PHY VSC8221
eTSEC3: Connected to SGMII PHY AR8021
Signed-off-by: Hou Zhiqiang
---
V5:
- No change.
arch/powerpc/dts/p2020-post.dtsi | 8 +++--
arch/powerpc/dts/p2020rdb-pc.dts | 1 +
arch/powerpc/dts/p2020rdb-pc.dtsi| 50
arch/powerpc/dts/p2020rdb-pc_36b.dts | 1 +
arch/powerpc/dts/pq3-etsec1-0.dtsi | 28
arch/powerpc/dts/pq3-etsec1-1.dtsi | 28
arch/powerpc/dts/pq3-etsec1-2.dtsi | 28
arch/powerpc/dts/pq3-etsec1-3.dtsi | 28
8 files changed, 170 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/dts/p2020rdb-pc.dtsi
create mode 100644 arch/powerpc/dts/pq3-etsec1-0.dtsi
create mode 100644 arch/powerpc/dts/pq3-etsec1-1.dtsi
create mode 100644 arch/powerpc/dts/pq3-etsec1-2.dtsi
create mode 100644 arch/powerpc/dts/pq3-etsec1-3.dtsi
diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi
index 4ed093dad4..11945295d1 100644
--- a/arch/powerpc/dts/p2020-post.dtsi
+++ b/arch/powerpc/dts/p2020-post.dtsi
@@ -38,8 +38,12 @@
clock-frequency = <0>;
};
- /include/ "pq3-i2c-0.dtsi"
- /include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+
+/include/ "pq3-etsec1-0.dtsi"
+/include/ "pq3-etsec1-1.dtsi"
+/include/ "pq3-etsec1-2.dtsi"
};
/* PCIe controller base address 0x8000 */
diff --git a/arch/powerpc/dts/p2020rdb-pc.dts b/arch/powerpc/dts/p2020rdb-pc.dts
index 08befd4c59..f3f6be1080 100644
--- a/arch/powerpc/dts/p2020rdb-pc.dts
+++ b/arch/powerpc/dts/p2020rdb-pc.dts
@@ -37,4 +37,5 @@
};
};
+/include/ "p2020rdb-pc.dtsi"
/include/ "p2020-post.dtsi"
diff --git a/arch/powerpc/dts/p2020rdb-pc.dtsi
b/arch/powerpc/dts/p2020rdb-pc.dtsi
new file mode 100644
index 00..0d2acc746e
--- /dev/null
+++ b/arch/powerpc/dts/p2020rdb-pc.dtsi
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P2020 RDB-PC Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ */
+
+ {
+ mdio@24520 {
+ phy0: ethernet-phy@0 {
+ interrupts = <3 1 0 0>;
+ reg = <0x0>;
+ };
+ phy1: ethernet-phy@1 {
+ interrupts = <2 1 0 0>;
+ reg = <0x1>;
+ };
+ };
+
+ mdio@25520 {
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ mdio@26520 {
+ status = "disabled";
+ };
+
+ enet0: ethernet@24000 {
+ phy-connection-type = "rgmii-id";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ enet1: ethernet@25000 {
+ tbi-handle = <>;
+ phy-handle = <>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet2: ethernet@26000 {
+ phy-handle = <>;
+ phy-connection-type = "rgmii-id";
+ };
+};
diff --git a/arch/powerpc/dts/p2020rdb-pc_36b.dts
b/arch/powerpc/dts/p2020rdb-pc_36b.dts
index 04b2519e1a..6d983b7d71 100644
--- a/arch/powerpc/dts/p2020rdb-pc_36b.dts
+++ b/arch/powerpc/dts/p2020rdb-pc_36b.dts
@@ -37,4 +37,5 @@
};
};
+/include/ "p2020rdb-pc.dtsi"
/include/ "p2020-post.dtsi"
diff --git a/arch/powerpc/dts/pq3-etsec1-0.dtsi
b/arch/powerpc/dts/pq3-etsec1-0.dtsi
new file mode 100644
index 00..8800243f34
--- /dev/null
+++ b/arch/powerpc/dts/pq3-etsec1-0.dtsi
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * PQ3 eTSEC device tree stub [ @ offsets 0x24000 ]
+ *
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ */
+
+ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ ranges = <0x0 0x24000 0x1000>;
+ fsl,magic-packet;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
+};
+
+mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+};
diff --git a/arch/powerpc/dts/pq3-etsec1-1.dtsi
b/arch/powerpc/dts/pq3-etsec1-1.dtsi
new file mode 100644
index 00..2bc62d1a57
--- /dev/null
+++ b/arch/powerpc/dts/pq3-etsec1-1.dtsi
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * PQ3 eTSEC device tree stub [ @ offsets 0x25000 ]
+ *
+ * Copyright 2011-2012
[PATCHv5 09/18] fsl: p1_p2_rdb: Move vsc7835 firmware uploading to board_early_init_r()
From: Hou Zhiqiang
Move vsc7835 firmware uploading to board_early_init_r(), so that
the switch also can work in DM eTSEC driver.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Vladimir Oltean
---
V5:
- No change.
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 35 +++--
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 1353debc0e..3dd6178708 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -316,6 +316,10 @@ int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
int flash_esel = find_tlb_idx((void *)flashbase, 1);
+#ifdef CONFIG_VSC7385_ENET
+ unsigned int vscfw_addr;
+ char *tmp;
+#endif
/*
* Remap Boot flash region to caching-inhibited
@@ -338,6 +342,20 @@ int board_early_init_r(void)
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,/* perms, wimge */
0, flash_esel, BOOKE_PAGESZ_64M, 1);/* ts, esel, tsize, iprot */
+
+#ifdef CONFIG_VSC7385_ENET
+ /* If a VSC7385 microcode image is present, then upload it. */
+ tmp = env_get("vscfw_addr");
+ if (tmp) {
+ vscfw_addr = simple_strtoul(tmp, NULL, 16);
+ printf("uploading VSC7385 microcode from %x\n", vscfw_addr);
+ if (vsc7385_upload_firmware((void *)vscfw_addr,
+ CONFIG_VSC7385_IMAGE_SIZE))
+ puts("Failure uploading VSC7385 microcode.\n");
+ } else {
+ puts("No address specified for VSC7385 microcode.\n");
+ }
+#endif
return 0;
}
@@ -348,10 +366,6 @@ int board_eth_init(bd_t *bis)
ccsr_gur_t *gur __attribute__((unused)) =
(void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
int num = 0;
-#ifdef CONFIG_VSC7385_ENET
- char *tmp;
- unsigned int vscfw_addr;
-#endif
#ifdef CONFIG_TSEC1
SET_STD_TSEC_INFO(tsec_info[num], 1);
@@ -375,19 +389,6 @@ int board_eth_init(bd_t *bis)
return 0;
}
-#ifdef CONFIG_VSC7385_ENET
- /* If a VSC7385 microcode image is present, then upload it. */
- tmp = env_get("vscfw_addr");
- if (tmp) {
- vscfw_addr = simple_strtoul(tmp, NULL, 16);
- printf("uploading VSC7385 microcode from %x\n", vscfw_addr);
- if (vsc7385_upload_firmware((void *) vscfw_addr,
- CONFIG_VSC7385_IMAGE_SIZE))
- puts("Failure uploading VSC7385 microcode.\n");
- } else
- puts("No address specified for VSC7385 microcode.\n");
-#endif
-
mdio_info.regs = TSEC_GET_MDIO_REGS_BASE(1);
mdio_info.name = DEFAULT_MII_NAME;
--
2.25.1
[PATCHv5 15/18] powerpc: p1010rdb: Compile legacy ethernet init function when no DM_ETH
From: Hou Zhiqiang
The board_eth_init() is only used by legacy ethernet driver framework,
so do not compile it when DM_ETH config has been selected.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Vladimir Oltean
---
V5:
- No change.
board/freescale/p1010rdb/p1010rdb.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/freescale/p1010rdb/p1010rdb.c
b/board/freescale/p1010rdb/p1010rdb.c
index 66ccc0bd1e..309f4daa88 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -484,6 +484,7 @@ int checkboard(void)
return 0;
}
+#ifndef CONFIG_DM_ETH
int board_eth_init(bd_t *bis)
{
#ifdef CONFIG_TSEC_ENET
@@ -524,6 +525,7 @@ int board_eth_init(bd_t *bis)
return pci_eth_init(bis);
}
+#endif
#if defined(CONFIG_OF_BOARD_SETUP)
void fdt_del_flexcan(void *blob)
--
2.25.1
[PATCHv5 16/18] configs: P1010RDB: Enable DM_ETH config
From: Hou Zhiqiang Enable the DM_ETH and DM_MDIO config. Signed-off-by: Hou Zhiqiang --- V5: - No change. configs/P1010RDB-PA_36BIT_NAND_defconfig | 2 ++ configs/P1010RDB-PA_36BIT_NOR_defconfig | 2 ++ configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 2 ++ configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 2 ++ configs/P1010RDB-PA_NAND_defconfig | 2 ++ configs/P1010RDB-PA_NOR_defconfig| 2 ++ configs/P1010RDB-PA_SDCARD_defconfig | 2 ++ configs/P1010RDB-PA_SPIFLASH_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_NAND_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_NOR_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 2 ++ configs/P1010RDB-PB_NAND_defconfig | 2 ++ configs/P1010RDB-PB_NOR_defconfig| 2 ++ configs/P1010RDB-PB_SDCARD_defconfig | 2 ++ configs/P1010RDB-PB_SPIFLASH_defconfig | 2 ++ 16 files changed, 32 insertions(+) diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index da04cab014..bd31e7c8fa 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -72,8 +72,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index e6edd395e7..f5c5f0ead5 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -54,8 +54,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index dcd606b0c2..229365a1eb 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -66,8 +66,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index c0800c8d7d..147198fb88 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -68,8 +68,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 29ba692ca1..1f2472a338 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -71,8 +71,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index d8f87b5dac..35232a87fc 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -53,8 +53,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 9711082529..6a46e3a253 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -65,8 +65,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index de2ac2235f..6c7c12efc1 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -67,8 +67,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 9f4876dd13..832f7ce431 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -72,8 +72,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y
[PATCHv5 14/18] dts: powerpc: p1010rdb: Add eTSEC DT nodes
From: Hou Zhiqiang
P1010RDB implements 3 enhanced three-speed Ethernet controllers,
and the connection is shown below:
eTSEC1: Connected to RGMII PHY AR8033
eTSEC2: Connected to SGMII PHY AR8033
eTSEC3: Connected to SGMII PHY AR8033
Signed-off-by: Hou Zhiqiang
---
V5:
- No change.
arch/powerpc/dts/p1010rdb-pa.dts | 1 +
arch/powerpc/dts/p1010rdb-pa_36b.dts | 1 +
arch/powerpc/dts/p1010rdb.dtsi | 50
arch/powerpc/dts/p1010si-post.dtsi | 25 ++
4 files changed, 77 insertions(+)
diff --git a/arch/powerpc/dts/p1010rdb-pa.dts b/arch/powerpc/dts/p1010rdb-pa.dts
index c66c4923ac..360d254d91 100644
--- a/arch/powerpc/dts/p1010rdb-pa.dts
+++ b/arch/powerpc/dts/p1010rdb-pa.dts
@@ -15,3 +15,4 @@
};
/include/ "p1010si-post.dtsi"
+/include/ "p1010rdb.dtsi"
diff --git a/arch/powerpc/dts/p1010rdb-pa_36b.dts
b/arch/powerpc/dts/p1010rdb-pa_36b.dts
index b943de7cbb..062086a8c0 100644
--- a/arch/powerpc/dts/p1010rdb-pa_36b.dts
+++ b/arch/powerpc/dts/p1010rdb-pa_36b.dts
@@ -15,3 +15,4 @@
};
/include/ "p1010si-post.dtsi"
+/include/ "p1010rdb.dtsi"
diff --git a/arch/powerpc/dts/p1010rdb.dtsi b/arch/powerpc/dts/p1010rdb.dtsi
index 4f58ee2446..5964270878 100644
--- a/arch/powerpc/dts/p1010rdb.dtsi
+++ b/arch/powerpc/dts/p1010rdb.dtsi
@@ -5,6 +5,56 @@
* Copyright 2020 NXP
*/
{
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ reg = <0x1>;
+ };
+
+ phy1: ethernet-phy@1 {
+ reg = <0x0>;
+ };
+
+ phy2: ethernet-phy@2 {
+ reg = <0x2>;
+ };
+
+ tbi-phy@3 {
+ device_type = "tbi-phy";
+ reg = <0x3>;
+ };
+ };
+
+ mdio@25000 {
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ mdio@26000 {
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet0: ethernet@b {
+ phy-handle = <>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ enet1: ethernet@b1000 {
+ phy-handle = <>;
+ tbi-handle = <>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet2: ethernet@b2000 {
+ phy-handle = <>;
+ tbi-handle = <>;
+ phy-connection-type = "sgmii";
+ };
+
i2c@3000 {
rtc@68 {
compatible = "pericom,pt7c4338";
diff --git a/arch/powerpc/dts/p1010si-post.dtsi
b/arch/powerpc/dts/p1010si-post.dtsi
index 0289441381..f825208056 100644
--- a/arch/powerpc/dts/p1010si-post.dtsi
+++ b/arch/powerpc/dts/p1010si-post.dtsi
@@ -25,6 +25,31 @@
};
/include/ "pq3-i2c-0.dtsi"
/include/ "pq3-i2c-1.dtsi"
+
+/include/ "pq3-etsec2-0.dtsi"
+ enet0: ethernet@b {
+ queue-group@b {
+ fsl,rx-bit-map = <0xff>;
+ fsl,tx-bit-map = <0xff>;
+ };
+ };
+
+/include/ "pq3-etsec2-1.dtsi"
+ enet1: ethernet@b1000 {
+ queue-group@b1000 {
+ fsl,rx-bit-map = <0xff>;
+ fsl,tx-bit-map = <0xff>;
+ };
+ };
+
+/include/ "pq3-etsec2-2.dtsi"
+ enet2: ethernet@b2000 {
+ queue-group@b2000 {
+ fsl,rx-bit-map = <0xff>;
+ fsl,tx-bit-map = <0xff>;
+ };
+
+ };
};
/* controller at 0x9000 */
--
2.25.1
[PATCHv5 10/18] configs: p1_p2_rdb: Add the default address of vsc7385 firmware
From: Hou Zhiqiang Add the environment 'vscfw_addr' to assign a default address for vsc7385 firmware uploading. Signed-off-by: Hou Zhiqiang --- V5: - No change. include/configs/p1_p2_rdb_pc.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 219e5d216b..6e00491cd8 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -460,6 +460,7 @@ /* Vsc7385 switch */ #ifdef CONFIG_VSC7385_ENET +#define __VSCFW_ADDR "vscfw_addr=ef00" #define CONFIG_SYS_VSC7385_BASE0xffb0 #ifdef CONFIG_PHYS_64BIT @@ -819,6 +820,7 @@ i2c mw 18 3 __SW_BOOT_MASK 1; reset "ramdisk_size=12\0"\ "map_lowernorbank=i2c dev 1; i2c mw 18 1 02 1; i2c mw 18 3 fd 1\0" \ "map_uppernorbank=i2c dev 1; i2c mw 18 1 00 1; i2c mw 18 3 fd 1\0" \ +__stringify(__VSCFW_ADDR)"\0" \ __stringify(__NOR_RST_CMD)"\0" \ __stringify(__SPI_RST_CMD)"\0" \ __stringify(__SD_RST_CMD)"\0" \ -- 2.25.1
[PATCHv5 13/18] configs: P1020RDB: Enable DM_ETH config
From: Hou Zhiqiang Enable the DM_ETH and DM_MDIO config. On P1020RDB, the eTSEC1 is connecting with a switch VSC7385, so also enable the fixed PHY support. Signed-off-by: Hou Zhiqiang --- V5: - No change. configs/P1020RDB-PC_36BIT_NAND_defconfig | 3 +++ configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 3 +++ configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 3 +++ configs/P1020RDB-PC_36BIT_defconfig | 3 +++ configs/P1020RDB-PC_NAND_defconfig | 3 +++ configs/P1020RDB-PC_SDCARD_defconfig | 3 +++ configs/P1020RDB-PC_SPIFLASH_defconfig | 3 +++ configs/P1020RDB-PC_defconfig| 3 +++ configs/P1020RDB-PD_NAND_defconfig | 3 +++ configs/P1020RDB-PD_SDCARD_defconfig | 3 +++ configs/P1020RDB-PD_SPIFLASH_defconfig | 3 +++ configs/P1020RDB-PD_defconfig| 3 +++ 12 files changed, 36 insertions(+) diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 6ee52fe5e7..139a0be37e 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -61,6 +61,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -72,8 +73,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 489b91d8e7..f533225f26 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -56,6 +56,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -67,8 +68,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 4a8e4e3726..f3e87f0669 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -58,6 +58,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -69,8 +70,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index f9a4b735ca..04c355585d 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -45,6 +45,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -56,8 +57,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 5c8231cba2..ee663c5861 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -60,6 +60,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -71,8 +72,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index ad2bb90a49..cabd6c6022 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -55,6 +55,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=1000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -66,8 +67,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index b8055e49b0..28a097b0ed 100644 ---
[PATCHv5 12/18] powerpc: p1_p2_rdb: Don't compile board_eth_init() when DM_ETH enabled
From: Hou Zhiqiang
The board_eth_init() is only used by legacy ethernet driver framework,
so do not compile it when DM_ETH config has been selected.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Vladimir Oltean
---
V5:
- No change.
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 3dd6178708..41585cf342 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -359,6 +359,7 @@ int board_early_init_r(void)
return 0;
}
+#ifndef CONFIG_DM_ETH
int board_eth_init(bd_t *bis)
{
struct fsl_pq_mdio_info mdio_info;
@@ -406,6 +407,7 @@ int board_eth_init(bd_t *bis)
return pci_eth_init(bis);
}
+#endif
#if defined(CONFIG_QE) && \
(defined(CONFIG_TARGET_P1025RDB) || defined(CONFIG_TARGET_P1021RDB))
--
2.25.1
[PATCHv5 06/18] net: tsec: Add fixed-link PHY support
From: Hou Zhiqiang The info of fixed-link PHY is described in DT node instead of getting from MII, so detect the fixed-link PHY DT node first, if it doesn't exist then probe the MII. Signed-off-by: Vladimir Oltean Signed-off-by: Hou Zhiqiang --- V5: - No change. drivers/net/tsec.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index babe44691e..cb3e56d439 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -683,7 +683,10 @@ static int init_phy(struct tsec_private *priv) tsec_configure_serdes(priv); #ifdef CONFIG_DM_ETH - phydev = dm_eth_phy_connect(priv->dev); + if (ofnode_valid(ofnode_find_subnode(priv->dev->node, "fixed-link"))) + phydev = phy_connect(NULL, 0, priv->dev, priv->interface); + else + phydev = dm_eth_phy_connect(priv->dev); #else phydev = phy_connect(priv->bus, priv->phyaddr, priv->dev, priv->interface); -- 2.25.1
[PATCHv5 05/18] net: tsec: convert to use DM_MDIO when DM_ETH enabled
From: Hou Zhiqiang
For the platforms on which the eTSEC driver uses DM_ETH, convert its
MDIO controller code to also use DM_MDIO.
Note that for handling the TBI PHY (the MAC PCS for SGMII), we still
don't register a udevice for it, since we can drive it locally and there
is no point in doing otherwise.
Signed-off-by: Vladimir Oltean
Signed-off-by: Hou Zhiqiang
---
V5:
- No change.
drivers/net/tsec.c | 43 ++-
1 file changed, 10 insertions(+), 33 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 3d75acb6b4..babe44691e 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -18,6 +18,7 @@
#include
#include
#include
+#include
#include
#include
@@ -681,8 +682,12 @@ static int init_phy(struct tsec_private *priv)
if (priv->interface == PHY_INTERFACE_MODE_SGMII)
tsec_configure_serdes(priv);
+#ifdef CONFIG_DM_ETH
+ phydev = dm_eth_phy_connect(priv->dev);
+#else
phydev = phy_connect(priv->bus, priv->phyaddr, priv->dev,
priv->interface);
+#endif
if (!phydev)
return 0;
@@ -787,14 +792,17 @@ int tsec_standard_init(bd_t *bis)
return tsec_eth_init(bis, tsec_info, ARRAY_SIZE(tsec_info));
}
#else /* CONFIG_DM_ETH */
+
+#ifndef CONFIG_DM_MDIO
+#error "TSEC with DM_ETH also requires DM_MDIO"
+#endif
+
int tsec_probe(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_platdata(dev);
struct tsec_private *priv = dev_get_priv(dev);
- struct tsec_mii_mng __iomem *ext_phyregs_mii;
struct ofnode_phandle_args phandle_args;
u32 tbiaddr = CONFIG_SYS_TBIPA_VALUE;
- struct fsl_pq_mdio_info mdio_info;
const char *phy_mode;
fdt_addr_t reg;
ofnode parent;
@@ -803,31 +811,6 @@ int tsec_probe(struct udevice *dev)
pdata->iobase = (phys_addr_t)dev_read_addr(dev);
priv->regs = dev_remap_addr(dev);
- if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
- _args)) {
- printf("phy-handle does not exist under tsec %s\n", dev->name);
- return -ENOENT;
- } else {
- int reg = ofnode_read_u32_default(phandle_args.node, "reg", 0);
-
- priv->phyaddr = reg;
- }
-
- parent = ofnode_get_parent(phandle_args.node);
- if (!ofnode_valid(parent)) {
- printf("No parent node for PHY?\n");
- return -ENOENT;
- }
-
- reg = ofnode_get_addr_index(parent, 0);
- if (reg == FDT_ADDR_T_NONE) {
- printf("No 'reg' property of MII for external PHY\n");
- return -ENOENT;
- }
-
- ext_phyregs_mii = map_physmem(reg + TSEC_MDIO_REGS_OFFSET, 0,
- MAP_NOCACHE);
-
ret = dev_read_phandle_with_args(dev, "tbi-handle", NULL, 0, 0,
_args);
if (ret == 0) {
@@ -865,12 +848,6 @@ int tsec_probe(struct udevice *dev)
if (priv->interface == PHY_INTERFACE_MODE_SGMII)
priv->flags |= TSEC_SGMII;
- mdio_info.regs = ext_phyregs_mii;
- mdio_info.name = (char *)dev->name;
- ret = fsl_pq_mdio_init(NULL, _info);
- if (ret)
- return ret;
-
/* Reset the MAC */
setbits_be32(>regs->maccfg1, MACCFG1_SOFT_RESET);
udelay(2); /* Soft Reset must be asserted for 3 TX clocks */
--
2.25.1
[PATCHv5 07/18] net: tsec: Add the compatible string "gianfar" support
From: Hou Zhiqiang
Add compatible string "gianfar" support and update the
device-tree-bindings doc.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Vladimir Oltean
---
V5:
- No change.
doc/device-tree-bindings/net/fsl-tsec-phy.txt | 2 +-
drivers/net/tsec.c| 16 ++--
include/tsec.h| 4
3 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/doc/device-tree-bindings/net/fsl-tsec-phy.txt
b/doc/device-tree-bindings/net/fsl-tsec-phy.txt
index 8e8574bc97..a44c5fd9d9 100644
--- a/doc/device-tree-bindings/net/fsl-tsec-phy.txt
+++ b/doc/device-tree-bindings/net/fsl-tsec-phy.txt
@@ -2,7 +2,7 @@
Properties:
- - compatible : Should be "fsl,etsec2"
+ - compatible : Should be "fsl,etsec2" or "gianfar"
- reg : Offset and length of the register set for the device
- phy-handle : See ethernet.txt file in the same directory.
- phy-connection-type : See ethernet.txt file in the same directory. This
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index cb3e56d439..22658506b2 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -806,11 +806,14 @@ int tsec_probe(struct udevice *dev)
struct tsec_private *priv = dev_get_priv(dev);
struct ofnode_phandle_args phandle_args;
u32 tbiaddr = CONFIG_SYS_TBIPA_VALUE;
+ struct tsec_data *data;
const char *phy_mode;
fdt_addr_t reg;
ofnode parent;
int ret;
+ data = (struct tsec_data *)dev_get_driver_data(dev);
+
pdata->iobase = (phys_addr_t)dev_read_addr(dev);
priv->regs = dev_remap_addr(dev);
@@ -831,7 +834,7 @@ int tsec_probe(struct udevice *dev)
return -ENOENT;
}
- priv->phyregs_sgmii = map_physmem(reg + TSEC_MDIO_REGS_OFFSET,
+ priv->phyregs_sgmii = map_physmem(reg + data->mdio_regs_off,
0, MAP_NOCACHE);
}
@@ -883,8 +886,17 @@ static const struct eth_ops tsec_ops = {
.mcast = tsec_mcast_addr,
};
+static struct tsec_data etsec2_data = {
+ .mdio_regs_off = TSEC_MDIO_REGS_OFFSET,
+};
+
+static struct tsec_data gianfar_data = {
+ .mdio_regs_off = 0x0,
+};
+
static const struct udevice_id tsec_ids[] = {
- { .compatible = "fsl,etsec2" },
+ { .compatible = "fsl,etsec2", .data = (ulong)_data },
+ { .compatible = "gianfar", .data = (ulong)_data },
{ }
};
diff --git a/include/tsec.h b/include/tsec.h
index b17fa957df..047dd3c373 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -394,6 +394,10 @@ struct tsec {
#define TX_BUF_CNT 2
+struct tsec_data {
+ u32 mdio_regs_off;
+};
+
struct tsec_private {
struct txbd8 __iomem txbd[TX_BUF_CNT];
struct rxbd8 __iomem rxbd[PKTBUFSRX];
--
2.25.1
[PATCHv5 08/18] powerpc: mpc8xxx: Don't compile cpu_eth_init() when DM_ETH enabled
From: Hou Zhiqiang
The cpu_eth_init() is only used by the legacy ethernet driver framework.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Vladimir Oltean
---
V5:
- No change.
arch/powerpc/cpu/mpc8xxx/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index da0a80e6fc..b904943b0e 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -347,6 +347,7 @@ int fixup_cpu(void)
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
+#ifndef CONFIG_DM_ETH
int cpu_eth_init(bd_t *bis)
{
#if defined(CONFIG_ETHER_ON_FCC)
@@ -370,3 +371,4 @@ int cpu_eth_init(bd_t *bis)
#endif
return 0;
}
+#endif
--
2.25.1
[PATCHv5 02/18] configs: enable DM_MDIO for LS1021A-TWR and LS1021A-TSN
From: Vladimir Oltean The tsec driver now requires DM_MDIO when DM_ETH is enabled. To avoid build errors, enable DM_MDIO in these boards' configs before we actually add DM_MDIO support to tsec. Signed-off-by: Vladimir Oltean Signed-off-by: Hou Zhiqiang --- V5: - Pick from https://patchwork.ozlabs.org/project/uboot/patch/20200503185227.28731-3-olte...@gmail.com/. configs/ls1021atsn_qspi_defconfig | 1 + configs/ls1021atsn_sdcard_defconfig | 1 + configs/ls1021atwr_nor_SECURE_BOOT_defconfig| 1 + configs/ls1021atwr_nor_defconfig| 1 + configs/ls1021atwr_nor_lpuart_defconfig | 1 + configs/ls1021atwr_qspi_defconfig | 1 + configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_sdcard_ifc_defconfig | 1 + configs/ls1021atwr_sdcard_qspi_defconfig| 1 + 9 files changed, 9 insertions(+) diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig index a62e04e92a..9a659c5512 100644 --- a/configs/ls1021atsn_qspi_defconfig +++ b/configs/ls1021atsn_qspi_defconfig @@ -43,6 +43,7 @@ CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index db4f0ab796..235265bd74 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -54,6 +54,7 @@ CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_MII=y CONFIG_TSEC_ENET=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 0bf4aad102..8946bc1a70 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -45,6 +45,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index 5507dbe3c1..12b39703d4 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -47,6 +47,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index cdf81957a8..84b724930f 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -49,6 +49,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 4c82d66899..52a4c5106b 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -50,6 +50,7 @@ CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 9039ccc8f2..f6db8850c4 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -60,6 +60,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 478d3df1b8..f011b9ef50 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -62,6 +62,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index de783a8d3d..524ea054aa 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -61,6 +61,7 @@ CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y -- 2.25.1
[PATCHv5 01/18] phy: make phy_connect_fixed work with a null mdio bus
From: Vladimir Oltean
It is utterly pointless to require an MDIO bus pointer for a fixed PHY
device. The fixed.c implementation does not require it, only
phy_device_create. Fix that.
Signed-off-by: Vladimir Oltean
Reviewed-by: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
V5:
- Pick from
https://patchwork.ozlabs.org/project/uboot/patch/20200503185227.28731-2-olte...@gmail.com/.
drivers/net/phy/phy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index cce09c47f9..a2dd86dba2 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -664,7 +664,7 @@ static struct phy_device *phy_device_create(struct mii_dev
*bus, int addr,
dev = malloc(sizeof(*dev));
if (!dev) {
printf("Failed to allocate PHY device for %s:%d\n",
- bus->name, addr);
+ bus ? bus->name : "(null bus)", addr);
return NULL;
}
@@ -692,7 +692,7 @@ static struct phy_device *phy_device_create(struct mii_dev
*bus, int addr,
return NULL;
}
- if (addr >= 0 && addr < PHY_MAX_ADDR)
+ if (addr >= 0 && addr < PHY_MAX_ADDR && phy_id != PHY_FIXED_ID)
bus->phymap[addr] = dev;
return dev;
--
2.25.1
[PATCHv5 03/18] net: fsl_mdio: Change to use virtual address
From: Hou Zhiqiang
Use virtual address to access the MII block registers instead
of physical address.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Vladimir Oltean
---
V5:
- No change.
drivers/net/fsl_mdio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/fsl_mdio.c b/drivers/net/fsl_mdio.c
index 43040d4c3f..e52daa214d 100644
--- a/drivers/net/fsl_mdio.c
+++ b/drivers/net/fsl_mdio.c
@@ -213,7 +213,7 @@ static int tsec_mdio_probe(struct udevice *dev)
printf("dev_get_priv(dev %p) = NULL\n", dev);
return -1;
}
- priv->regs = (void *)(uintptr_t)dev_read_addr(dev);
+ priv->regs = dev_remap_addr(dev);
debug("%s priv %p @ regs %p, pdata %p\n", __func__,
priv, priv->regs, pdata);
--
2.25.1
[PATCHv5 04/18] net: fsl_mdio: Correct the MII management register block address
From: Hou Zhiqiang
The MII management register block offset is different between
gianfar and etsec2 compatible devices, this patch is to fix
this issue by adding driver data for different compatible
string.
Fixes: 2932c5a802a9 ("net: tsec: fsl_mdio: add DM MDIO support")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Vladimir Oltean
---
V5:
- No change.
drivers/net/fsl_mdio.c | 28 ++--
include/fsl_mdio.h | 4
2 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/drivers/net/fsl_mdio.c b/drivers/net/fsl_mdio.c
index e52daa214d..5b615d50f6 100644
--- a/drivers/net/fsl_mdio.c
+++ b/drivers/net/fsl_mdio.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#ifdef CONFIG_DM_MDIO
struct tsec_mdio_priv {
@@ -190,17 +191,30 @@ static const struct mdio_ops tsec_mdio_ops = {
.reset = tsec_mdio_reset,
};
+static struct fsl_pq_mdio_data etsec2_data = {
+ .mdio_regs_off = TSEC_MDIO_REGS_OFFSET,
+};
+
+static struct fsl_pq_mdio_data gianfar_data = {
+ .mdio_regs_off = 0x0,
+};
+
+static struct fsl_pq_mdio_data fman_data = {
+ .mdio_regs_off = 0x0,
+};
+
static const struct udevice_id tsec_mdio_ids[] = {
- { .compatible = "fsl,gianfar-tbi" },
- { .compatible = "fsl,gianfar-mdio" },
- { .compatible = "fsl,etsec2-tbi" },
- { .compatible = "fsl,etsec2-mdio" },
- { .compatible = "fsl,fman-mdio" },
+ { .compatible = "fsl,gianfar-tbi", .data = (ulong)_data },
+ { .compatible = "fsl,gianfar-mdio", .data = (ulong)_data },
+ { .compatible = "fsl,etsec2-tbi", .data = (ulong)_data },
+ { .compatible = "fsl,etsec2-mdio", .data = (ulong)_data },
+ { .compatible = "fsl,fman-mdio", .data = (ulong)_data },
{}
};
static int tsec_mdio_probe(struct udevice *dev)
{
+ struct fsl_pq_mdio_data *data;
struct tsec_mdio_priv *priv = (dev) ? dev_get_priv(dev) : NULL;
struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) :
NULL;
@@ -213,7 +227,9 @@ static int tsec_mdio_probe(struct udevice *dev)
printf("dev_get_priv(dev %p) = NULL\n", dev);
return -1;
}
- priv->regs = dev_remap_addr(dev);
+
+ data = (struct fsl_pq_mdio_data *)dev_get_driver_data(dev);
+ priv->regs = dev_remap_addr(dev) + data->mdio_regs_off;
debug("%s priv %p @ regs %p, pdata %p\n", __func__,
priv, priv->regs, pdata);
diff --git a/include/fsl_mdio.h b/include/fsl_mdio.h
index 8857d50910..cd612c0954 100644
--- a/include/fsl_mdio.h
+++ b/include/fsl_mdio.h
@@ -55,6 +55,10 @@ int memac_mdio_read(struct mii_dev *bus, int port_addr, int
dev_addr,
int regnum);
int memac_mdio_reset(struct mii_dev *bus);
+struct fsl_pq_mdio_data {
+ u32 mdio_regs_off;
+};
+
struct fsl_pq_mdio_info {
struct tsec_mii_mng __iomem *regs;
char *name;
--
2.25.1
[PATCHv5 00/18] powerpc: convert p1010, p1020 and p2020 RDB boards to DM_ETH
From: Hou Zhiqiang This patchset is to convert P1010, P1020 and P2020 RDB boards to DM_ETH. V5: Merged the following thread: https://patchwork.ozlabs.org/project/uboot/list/?series=174343=both=* Hou Zhiqiang (16): net: fsl_mdio: Change to use virtual address net: fsl_mdio: Correct the MII management register block address net: tsec: convert to use DM_MDIO when DM_ETH enabled net: tsec: Add fixed-link PHY support net: tsec: Add the compatible string "gianfar" support powerpc: mpc8xxx: Don't compile cpu_eth_init() when DM_ETH enabled fsl: p1_p2_rdb: Move vsc7835 firmware uploading to board_early_init_r() configs: p1_p2_rdb: Add the default address of vsc7385 firmware dts: powerpc: p1020rdb: Add eTSEC DT nodes powerpc: p1_p2_rdb: Don't compile board_eth_init() when DM_ETH enabled configs: P1020RDB: Enable DM_ETH config dts: powerpc: p1010rdb: Add eTSEC DT nodes powerpc: p1010rdb: Compile legacy ethernet init function when no DM_ETH configs: P1010RDB: Enable DM_ETH config dts: powerpc: p2020rdb: Add eTSEC DT nodes configs: P2020RDB: Enable DM_ETH config Vladimir Oltean (2): phy: make phy_connect_fixed work with a null mdio bus configs: enable DM_MDIO for LS1021A-TWR and LS1021A-TSN arch/powerpc/cpu/mpc8xxx/cpu.c| 2 + arch/powerpc/dts/p1010rdb-pa.dts | 1 + arch/powerpc/dts/p1010rdb-pa_36b.dts | 1 + arch/powerpc/dts/p1010rdb.dtsi| 50 +++ arch/powerpc/dts/p1010si-post.dtsi| 25 arch/powerpc/dts/p1020-post.dtsi | 20 +- arch/powerpc/dts/p1020rdb-pc.dts | 1 + arch/powerpc/dts/p1020rdb-pc.dtsi | 55 arch/powerpc/dts/p1020rdb-pc_36b.dts | 1 + arch/powerpc/dts/p1020rdb-pd.dts | 45 ++ arch/powerpc/dts/p2020-post.dtsi | 8 ++- arch/powerpc/dts/p2020rdb-pc.dts | 1 + arch/powerpc/dts/p2020rdb-pc.dtsi | 50 +++ arch/powerpc/dts/p2020rdb-pc_36b.dts | 1 + arch/powerpc/dts/pq3-etsec1-0.dtsi| 28 + arch/powerpc/dts/pq3-etsec1-1.dtsi| 28 + arch/powerpc/dts/pq3-etsec1-2.dtsi| 28 + arch/powerpc/dts/pq3-etsec1-3.dtsi| 28 + arch/powerpc/dts/pq3-etsec2-0.dtsi| 35 +++ arch/powerpc/dts/pq3-etsec2-1.dtsi| 35 +++ arch/powerpc/dts/pq3-etsec2-2.dtsi| 35 +++ arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi | 16 + arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi | 16 + arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi | 16 + board/freescale/p1010rdb/p1010rdb.c | 2 + board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 37 ++- configs/P1010RDB-PA_36BIT_NAND_defconfig | 2 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 2 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig| 2 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 2 + configs/P1010RDB-PA_NAND_defconfig| 2 + configs/P1010RDB-PA_NOR_defconfig | 2 + configs/P1010RDB-PA_SDCARD_defconfig | 2 + configs/P1010RDB-PA_SPIFLASH_defconfig| 2 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 2 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 2 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig| 2 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 2 + configs/P1010RDB-PB_NAND_defconfig| 2 + configs/P1010RDB-PB_NOR_defconfig | 2 + configs/P1010RDB-PB_SDCARD_defconfig | 2 + configs/P1010RDB-PB_SPIFLASH_defconfig| 2 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 3 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig| 3 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 3 + configs/P1020RDB-PC_36BIT_defconfig | 3 + configs/P1020RDB-PC_NAND_defconfig| 3 + configs/P1020RDB-PC_SDCARD_defconfig | 3 + configs/P1020RDB-PC_SPIFLASH_defconfig| 3 + configs/P1020RDB-PC_defconfig | 3 + configs/P1020RDB-PD_NAND_defconfig| 3 + configs/P1020RDB-PD_SDCARD_defconfig | 3 + configs/P1020RDB-PD_SPIFLASH_defconfig| 3 + configs/P1020RDB-PD_defconfig | 3 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 3 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig| 3 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 3 + configs/P2020RDB-PC_36BIT_defconfig | 3 + configs/P2020RDB-PC_NAND_defconfig| 3 + configs/P2020RDB-PC_SDCARD_defconfig | 3 + configs/P2020RDB-PC_SPIFLASH_defconfig| 3 + configs/P2020RDB-PC_defconfig | 3 + configs/ls1021atsn_qspi_defconfig | 1 + configs/ls1021atsn_sdcard_defconfig | 1 + configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021atwr_nor_defconfig | 1 +
[PATCH] arm64: zynqmp: Reduce malloc memory for mini QSPI configuration
From: Ashok Reddy Soma Mini U-boot runs on lower foot print of 256KB OCM. Hence 8K memory for malloc may not be required. Reduce it by 1.5K. Signed-off-by: Ashok Reddy Soma Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp_mini_qspi.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/xilinx_zynqmp_mini_qspi.h b/include/configs/xilinx_zynqmp_mini_qspi.h index 129af6e93294..205ddb4ae097 100644 --- a/include/configs/xilinx_zynqmp_mini_qspi.h +++ b/include/configs/xilinx_zynqmp_mini_qspi.h @@ -13,6 +13,6 @@ #include #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_TEXT_BASE + 0x2) -#define CONFIG_SYS_MALLOC_LEN 0x2000 +#define CONFIG_SYS_MALLOC_LEN 0x1a00 #endif /* __CONFIG_ZYNQMP_MINI_QSPI_H */ -- 2.27.0
