Re: [PATCH] mx6: peripheral clock from oscillator
On 22/10/20, Fabio Estevam wrote: > On Thu, Oct 22, 2020 at 6:24 PM Jorge Ramirez-Ortiz, Foundries > wrote: > > > um, weird, I just googled "imx Rev 2, 10/2019, ERR007805" and it showed > > the document and a link to the errata. > > The errata document is specific for a SoC. perfect. now you understand my point and why I was being generic. > > It does not help to add "Rev 2, 10/2019, ERR007805" in the commit log > as we cannot know which SoC it refers to. um, weirdthe patch indicates imx6 in the name. this should be enough no? > > Just mention the SoC errata document. For example: IMX6SLCE Rev. 5, 02/2019 so you need the names and versions of the errata document for each SoC being affected? that being the case, should it be a patch per family or a patch per SoC?
Re: [PATCH] samsung: common: remove the duplicated stdio print message
Dear Jaehoon,
On Thu, 22 Oct 2020 at 15:57, Jaehoon Chung wrote:
> Remove duplicated stdio print message.
> It's already displayed in common/console.c.
>
> Loading Environment from MMC... OK
> In:serial
> Out: serial
> Err: serial
> Model: Odroid XU3/XU4/HC1/HC2 based on Exynos5422
> Type: xu3
> In:serial
> Out: serial
> Err: serial
>
> Signed-off-by: Jaehoon Chung
> ---
> board/samsung/common/board.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
> index 752d84ec05c1..470531fdbb28 100644
> --- a/board/samsung/common/board.c
> +++ b/board/samsung/common/board.c
> @@ -304,7 +304,6 @@ int board_late_init(void)
> int mmcbootdev = get_boot_mmc_dev();
> char mmcbootdev_str[16];
>
> - stdio_print_current_devices();
> ret = uclass_first_device_err(UCLASS_CROS_EC, &dev);
> if (ret && ret != -ENODEV) {
> /* Force console on */
> --
> 2.28.0
>
>
applied to u-boot-samsung.
--
Thanks,
Minkyu Kang.
RE: [PATCH] arm: fsl: common: Improve NXP VID driver PMBus support
>-Original Message-
>From: U-Boot On Behalf Of Stephen Carlson
>Sent: Wednesday, August 19, 2020 12:00 AM
>To: U-Boot Mailing List
>Cc: Prabhakar Kushwaha ; Priyanka Jain
>; Sudhanshu Gupta
>Subject: [PATCH] arm: fsl: common: Improve NXP VID driver PMBus support
>
>[Resending as mailer dropped the Cc recipients]
>
>This patch adds support for more PMBus compatible devices to the NXP drivers
>for its QorIQ family devices. At runtime, the voltage regulator is queried over
>I2C, and the required voltage multiplier determined. This change supports the
>DIRECT and LINEAR PMBus voltage reporting modes.
>
>Previously, the driver only supported a few specific devices such as the
>IR36021 and LTC3882, so this change allows the QorIQ series to be used with a
>much larger variety of core voltage regulator devices.
>
>checkpatch warning "Use if (IS_DEFINED (...))" was ignored to maintain
>consistency with the existing code.
>
>Signed-off-by: Stephen Carlson
>---
> board/freescale/common/Kconfig| 27 +-
> board/freescale/common/vid.c | 784 --
> board/freescale/common/vid.h | 14 +-
> board/freescale/ls1028a/ls1028a.c | 42 ++
> board/freescale/ls1088a/ls1088a.c | 40 ++
> board/freescale/ls2080a/ls2080a.c | 49 ++
> board/freescale/lx2160a/lx2160a.c | 42 ++
> include/configs/ls1088aqds.h | 6 -
> include/configs/ls1088ardb.h | 8 +-
> 9 files changed, 521 insertions(+), 491 deletions(-)
>
>diff --git a/board/freescale/common/Kconfig
>b/board/freescale/common/Kconfig index 1b1fd69cb2..17db755951 100644
>--- a/board/freescale/common/Kconfig
>+++ b/board/freescale/common/Kconfig
>@@ -21,18 +21,37 @@ config CMD_ESBC_VALIDATE
> esbc_validate - validate signature using RSA verification
> esbc_halt - put the core in spin loop (Secure Boot Only)
>
>+config VID
>+ depends on DM_I2C
>+ bool "Enable Freescale VID"
>+ help
>+ This option enables setting core voltage based on individual
>+ values saved in SoC fuses.
>+
> config VOL_MONITOR_LTC3882_READ
> depends on VID
> bool "Enable the LTC3882 voltage monitor read"
>- default n
> help
>This option enables LTC3882 voltage monitor read
>- functionality. It is used by common VID driver.
>+ functionality. It is used by the common VID driver.
>
> config VOL_MONITOR_LTC3882_SET
> depends on VID
> bool "Enable the LTC3882 voltage monitor set"
>- default n
> help
>This option enables LTC3882 voltage monitor set
>- functionality. It is used by common VID driver.
>+ functionality. It is used by the common VID driver.
>+
>+config VOL_MONITOR_ISL68233_READ
>+ depends on VID
>+ bool "Enable the ISL68233 voltage monitor read"
>+ help
>+ This option enables ISL68233 voltage monitor read
>+ functionality. It is used by the common VID driver.
>+
>+config VOL_MONITOR_ISL68233_SET
>+ depends on VID
>+ bool "Enable the ISL68233 voltage monitor set"
>+ help
>+ This option enables ISL68233 voltage monitor set
>+ functionality. It is used by the common VID driver.
>diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
>index ed0d9b471c..24f4d7c7b1 100644
>--- a/board/freescale/common/vid.c
>+++ b/board/freescale/common/vid.c
>@@ -1,6 +1,8 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
> * Copyright 2014 Freescale Semiconductor, Inc.
>+ *
>+ * Copyright 2020 Stephen Carlson
> */
>
> #include
>@@ -20,14 +22,22 @@
> #include
> #include "vid.h"
>
>+/* Voltages are generally handled in mV to keep them as integers */
>+#define MV_PER_V 1000
>+
>+/*
>+ * Select the channel on the I2C mux (on some NXP boards) that contains
>+ * the voltage regulator to use for VID. Return 0 for success or
>+nonzero
>+ * for failure.
>+ */
> int __weak i2c_multiplexer_select_vid_channel(u8 channel)
> {
> return 0;
> }
>
> /*
>- * Compensate for a board specific voltage drop between regulator and SoC
>- * return a value in mV
>+ * Compensate for a board specific voltage drop between regulator and SoC.
>+ * Returns the voltage offset in mV.
> */
> int __weak board_vdd_drop_compensation(void)
> {
>@@ -35,13 +45,90 @@ int __weak board_vdd_drop_compensation(void)
> }
>
> /*
>- * Board specific settings for specific voltage value
>+ * Performs any board specific adjustments after the VID voltage has
>+ been
>+ * set. Return 0 for success or nonzero for failure.
> */
> int __weak board_adjust_vdd(int vdd)
> {
> return 0;
> }
>
>+/*
>+ * Processor specific method of converting the fuse value read from VID
>+ * registers into the core voltage to supply. Return the voltage in mV.
>+ */
>+u16 __weak soc_get_fuse_vid(int vid_index) {
>+ /* Default VDD for Layerscape Chassis 1 devices */
>+ static const u16 vdd[32] = {
>+ 0, /* unused */
>+ 9875, /* 0.9875V */
>+ 9750
[PATCH] microblaze: Enable i2c DM by default
Microblaze has been converted fully to DM that's why enabled DM for I2C too. Signed-off-by: Michal Simek --- configs/microblaze-generic_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index df79206ac274..7cf736954b4c 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -43,6 +43,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SPL_DM=y CONFIG_XILINX_GPIO=y +CONFIG_DM_I2C=y CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MTD=y -- 2.28.0
Re: [PATCH 10/10] arm64: versal: Set initrd_high to as high as possible
On 22. 10. 20 19:45, Tom Rini wrote:
> On Thu, Oct 22, 2020 at 12:32:22PM +0200, Michal Simek wrote:
>
>> From: Siva Durga Prasad Paladugu
>>
>>
>> This patch is setting up the initrd_high to as high as possible
>> by leaving max stack size for u-boot so that bigger rootfs can
>> also be loaded by u-boot for booting kernel.
>>
>> Signed-off-by: Siva Durga Prasad Paladugu
>> Signed-off-by: Michal Simek
>> ---
>>
>> board/xilinx/versal/board.c | 4 1 file changed, 4
>> insertions(+)
>>
>> diff --git a/board/xilinx/versal/board.c
>> b/board/xilinx/versal/board.c index 912c1143a8ad..09229e0a75a4
>> 100644 --- a/board/xilinx/versal/board.c +++
>> b/board/xilinx/versal/board.c @@ -217,6 +217,10 @@ int
>> board_late_init(void)
>>
>> env_set("boot_targets", new_targets);
>>
>> +initrd_hi = gd->start_addr_sp - CONFIG_STACK_SIZE; +initrd_hi
>> = round_down(initrd_hi, SZ_16M); + env_set_addr("initrd_high",
>> (void *)initrd_hi); + return board_late_init_xilinx(); }
>
> My concern here (and also microblaze-generic, after some grepping)
> is that wouldn't it be best to set bootm_size and let fdt and
> initrd be relocated as needed?
You are right and I have already done it in this way but forget to
remove this patch from my queue. Will drop this patch.
Thanks,
Michal
RE: [PATCH 1/2] board/freescale/vid: rework of VID support
>-Original Message-
>From: Wasim Khan
>Sent: Thursday, August 13, 2020 2:12 AM
>To: Priyanka Jain ; Varun Sethi
>Cc: u-boot@lists.denx.de; Wasim Khan ; Dan Nica
>; Heinz Wrobel
>Subject: [PATCH 1/2] board/freescale/vid: rework of VID support
>
>The VID code does not properly set the voltages on all chips.
>It does not properly reports voltage changes.
>For IR, the read accuracy was incorrect and for the LTC the step width was too
>wide.
>
>This patchset fix above problems and also make LTC channel use configurable
>to deal properly with single and dual channel setups.
>
I understand the patch is trying to address some problems.
But the patch description should talked more about code changes.
How you are addressing the problems?
And if the description is too much, please add a README.
I see too many changes in this patch.(adding LTC code, generalizing code,..)
I tried to review and provided some comments for the half of the patch, but the
patch is too difficult to review.
Please split the patch
>Signed-off-by: Dan Nica
>Signed-off-by: Heinz Wrobel
>Signed-off-by: Wasim Khan
>---
> .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 19 +-
> board/freescale/common/vid.c | 662 +++--
> board/freescale/common/vid.h | 42 +-
> 3 files changed, 403 insertions(+), 320 deletions(-)
>
>diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
>b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
>index baa9fa8..6147fad 100644
>--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
>+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
>@@ -2,7 +2,7 @@
> /*
> * LayerScape Internal Memory Map
> *
>- * Copyright 2017-2019 NXP
>+ * Copyright 2017-2020 NXP
> * Copyright 2014 Freescale Semiconductor, Inc.
> */
>
>@@ -324,15 +324,14 @@ struct ccsr_gur {
> u32 gpporcr3;
> u32 gpporcr4;
> u8 res_030[0x60-0x30];
>-#define FSL_CHASSIS3_DCFG_FUSESR_VID_MASK 0x1F
>-#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK 0x1F
>-#if defined(CONFIG_ARCH_LS1088A)
>-#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT25
>-#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT 20
>-#else
>-#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT2
>-#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT 7
>-#endif
>+#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT 25
>+#define FSL_CHASSIS3_DCFG_FUSESR_VID_MASK 0x1F
>+#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT 20
>+#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK 0x1F
>+#define FSL_CHASSIS3_DCFG_FUSESR_LOW_VID_SHIFT 2
>+#define FSL_CHASSIS3_DCFG_FUSESR_LOW_VID_MASK 0x1F
>+#define FSL_CHASSIS3_DCFG_FUSESR_LOW_ALTVID_SHIFT 7
>+#define FSL_CHASSIS3_DCFG_FUSESR_LOW_ALTVID_MASK 0x1F
Please add inline-comments : what does ...LOW.. stands for?
> u32 dcfg_fusesr;/* Fuse status register */
> u8 res_064[0x70-0x64];
> u32 devdisr;/* Device disable control 1 */
>diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
>index ed0d9b4..0ba672d 100644
>--- a/board/freescale/common/vid.c
>+++ b/board/freescale/common/vid.c
>@@ -1,6 +1,7 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
> * Copyright 2014 Freescale Semiconductor, Inc.
>+ * Copyright 2020 NXP
> */
>
> #include
>@@ -20,6 +21,8 @@
> #include
> #include "vid.h"
>
>+DECLARE_GLOBAL_DATA_PTR;
>+
> int __weak i2c_multiplexer_select_vid_channel(u8 channel) {
> return 0;
>@@ -42,10 +45,8 @@ int __weak board_adjust_vdd(int vdd)
> return 0;
> }
>
>-#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
>- defined(CONFIG_VOL_MONITOR_IR36021_READ)
> /*
>- * Get the i2c address configuration for the IR regulator chip
>+ * Get the i2c address configuration for the regulator chip
> *
> * There are some variance in the RDB HW regarding the I2C address
>configuration
> * for the IR regulator chip, which is likely a problem of external resistor
> @@ -
>56,9 +57,14 @@ int __weak board_adjust_vdd(int vdd)
> * 0x08 (Verified on T1040RDB-PA,T4240RDB-PB,X-T4240RDB-16GPA)
> * 0x09 (Verified on T1040RDB-PA)
> * 0x38 (Verified on T2080QDS, T2081QDS, T4240RDB)
>+ *
>+ * For other types of regulator chips, we check the IDs before we
>+ * return the address to avoid making damaging mistakes
> */
>-static int find_ir_chip_on_i2c(void)
>+static int find_vid_chip_on_i2c(void)
> {
>+#if defined(CONFIG_VOL_MONITOR_IR36021_READ) || \
>+ defined(CONFIG_VOL_MONITOR_IR36021_SET)
> int i2caddress;
> int ret;
> u8 byte;
>@@ -81,33 +87,75 @@ static int find_ir_chip_on_i2c(void)
> ret = dm_i2c_read(dev, IR36021_MFR_ID_OFFSET,
> (void *)&byte, sizeof(byte));
> #endif
>- if ((ret >= 0) && (byte == IR36021_MFR_ID))
>+ if (!ret && byte == IR36021_MFR_ID)
>+ return i2caddress;
>+ }
>+#endif
>+#if defined(CONFIG_VOL_MONITOR_LTC3882_READ) || \
>+
RE: [PATCH] configs: ls1043aqds: Configure QSPI related configs
>-Original Message- >From: U-Boot On Behalf Of Kuldeep Singh >Sent: Thursday, July 23, 2020 11:02 AM >To: Priyanka Jain (OSS) ; u-boot@lists.denx.de >Subject: RE: [PATCH] configs: ls1043aqds: Configure QSPI related configs > >[...] >> Please confirm that all boot-sources will work fine with this change. > >Please hold both the patches for a moment. I will test other boot sources and >will let you know the results. Any update? Regards Priyanka
Re: [PATCH] lib: zlib: Use post-increment only in inffast.c
On Fri, Oct 23, 2020 at 01:59:29AM +, Tan, Ley Foon wrote: > > > > -Original Message- > > From: Tom Rini > > Sent: Friday, October 23, 2020 9:52 AM > > To: Tan, Ley Foon > > Cc: Ley Foon Tan ; ZY - u-boot > b...@lists.denx.de>; See, Chin Liang > > Subject: Re: [PATCH] lib: zlib: Use post-increment only in inffast.c > > > > On Fri, Oct 23, 2020 at 01:41:57AM +, Tan, Ley Foon wrote: > > > > > > > > > > -Original Message- > > > > From: Tom Rini > > > > Sent: Thursday, October 22, 2020 9:24 PM > > > > To: Tan, Ley Foon > > > > Cc: Ley Foon Tan ; ZY - u-boot > > > b...@lists.denx.de>; See, Chin Liang > > > > Subject: Re: [PATCH] lib: zlib: Use post-increment only in inffast.c > > > > > > > > On Wed, Oct 21, 2020 at 03:42:10AM +, Tan, Ley Foon wrote: > > > > > > > > > > > > > > > > -Original Message- > > > > > > From: Tom Rini > > > > > > Sent: Friday, October 16, 2020 8:37 PM > > > > > > To: Ley Foon Tan > > > > > > Cc: Tan, Ley Foon ; ZY - u-boot > > > > > b...@lists.denx.de>; See, Chin Liang > > > > > > Subject: Re: [PATCH] lib: zlib: Use post-increment only in > > > > > > inffast.c > > > > > > > > > > > > On Fri, Oct 16, 2020 at 04:40:00AM +0800, Ley Foon Tan wrote: > > > > > > > On Fri, Jul 17, 2020 at 9:29 PM Tom Rini > > wrote: > > > > > > > > > > > > > > > > On Wed, Jun 24, 2020 at 04:34:03PM +0800, Ley Foon Tan wrote: > > > > > > > > > > > > > > > > > From: Chin Liang See > > > > > > > > > > > > > > > > > > This fixes CVE-2016-9841. Changes integrated from [1], > > > > > > > > > with changes make for Uboot code base. > > > > > > > > > > > > > > > > > > An old inffast.c optimization turns out to not be optimal > > > > > > > > > anymore with modern compilers, and furthermore was not > > > > > > > > > compliant with the C standard, for which decrementing a > > > > > > > > > pointer before its allocated memory is undefined. Per the > > > > > > > > > recommendation of a security audit of the zlib code by > > > > > > > > > Trail of Bits and TrustInSoft, in support of the Mozilla > > > > > > > > > Foundation, this "optimization" was removed, in order to > > > > > > > > > avoid the possibility of > > > > undefined behavior. > > > > > > > > > > > > > > > > > > [1]: > > > > > > > > > > > > > > > > > > > > > https://github.com/madler/zlib/commit/9aaec95e82117c1cb0f9624264c3 > > > > > > > > > 618fc380cecb > > > > > > > > > > > > > > > > > > Signed-off-by: Mark Adler > > > > > > > > > Signed-off-by: Chin Liang See > > > > > > > > > Signed-off-by: Ley Foon Tan > > > > > > > > > > > > > > > > This breaks the following tests on sandbox: > > > > > > > > FAILED test/py/tests/test_efi_fit.py::test_efi_fit_launch - > > > > > > > > u_boot_spawn.Timeout FAILED > > > > > > > > test/py/tests/test_fit.py::test_fit > > > > > > > > - > > > > > > > > OSError: [Errno 5] Input/output error > > > > > > > > > > > > > > > Hi Tom > > > > > > > > > > > > > > I have tried to run the sandtest, but it failed in different > > > > > > > test cases. I am run this command "./test/py/test.py --bd sandbox > > > > > > > -- > > build". > > > > > > > Error log at bottom of email. > > > > > > > > > > > > > > Found that > > > > > > > https://gitlab.denx.de/u-boot/u-boot/-/blob/master/lib/zlib/zl > > > > > > > ib.h always "#undef POSTINC", it is mean that U-boot can only > > > > > > > support pre-increment? I have tried changing "#undef POSTINC" > > > > > > > to "define POSTINC" and without this patch, the test failed at > > > > > > > the same location. > > > > > > > So, the failure is not caused by this patch. > > > > > > > Note, this patch mainly changes to support post-increment only. > > > > > > > > > > > > > > Any suggestion to fix this? > > > > > > > > > > > > I'm not sure why the tests fail for you to start with. They all > > > > > > pass inn the CI environment as well as locally. I would start > > > > > > by seeing how your environment differs from those. > > > > > > > > > > Hi Tom > > > > > > > > > > My test is running on Ubuntu 20.04 Linux. > > > > > > > > > > Can you try change "#undef POSTINC" to "#define POSTINC" in > > > > lib/zlib/zlib.h if you can see the error? > > > > > > > > I see: > > > > FAILED test/py/tests/test_efi_fit.py::test_efi_fit_launch - assert > > > > 'Hello, world' in "## Loa... > > > > FAILED test/py/tests/test_fit.py::test_fit - OSError: [Errno 5] > > > > Input/output error > > > > > > > > as new problems with that change. > > > Just to confirm, this error is with this patch or change to "#define > > > POSTINC"? > > > > > > Yours errors are different from my run. > > > > > > My run failed in these 2 testcases: > > > test/py/tests/test_fs/test_squashfs/test_sqfs_load.py F > > > test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py F > > > > The squashfs tests can fail if they ran before, sometimes and I think that > > means we need a clean-up action in them. Delete the .bm-work directory > > and re-run. I see the errors I reported when I changed the define, as
RE: [PATCH] lib: zlib: Use post-increment only in inffast.c
> -Original Message- > From: Tom Rini > Sent: Friday, October 23, 2020 9:52 AM > To: Tan, Ley Foon > Cc: Ley Foon Tan ; ZY - u-boot b...@lists.denx.de>; See, Chin Liang > Subject: Re: [PATCH] lib: zlib: Use post-increment only in inffast.c > > On Fri, Oct 23, 2020 at 01:41:57AM +, Tan, Ley Foon wrote: > > > > > > > -Original Message- > > > From: Tom Rini > > > Sent: Thursday, October 22, 2020 9:24 PM > > > To: Tan, Ley Foon > > > Cc: Ley Foon Tan ; ZY - u-boot > > b...@lists.denx.de>; See, Chin Liang > > > Subject: Re: [PATCH] lib: zlib: Use post-increment only in inffast.c > > > > > > On Wed, Oct 21, 2020 at 03:42:10AM +, Tan, Ley Foon wrote: > > > > > > > > > > > > > -Original Message- > > > > > From: Tom Rini > > > > > Sent: Friday, October 16, 2020 8:37 PM > > > > > To: Ley Foon Tan > > > > > Cc: Tan, Ley Foon ; ZY - u-boot > > > > b...@lists.denx.de>; See, Chin Liang > > > > > Subject: Re: [PATCH] lib: zlib: Use post-increment only in > > > > > inffast.c > > > > > > > > > > On Fri, Oct 16, 2020 at 04:40:00AM +0800, Ley Foon Tan wrote: > > > > > > On Fri, Jul 17, 2020 at 9:29 PM Tom Rini > wrote: > > > > > > > > > > > > > > On Wed, Jun 24, 2020 at 04:34:03PM +0800, Ley Foon Tan wrote: > > > > > > > > > > > > > > > From: Chin Liang See > > > > > > > > > > > > > > > > This fixes CVE-2016-9841. Changes integrated from [1], > > > > > > > > with changes make for Uboot code base. > > > > > > > > > > > > > > > > An old inffast.c optimization turns out to not be optimal > > > > > > > > anymore with modern compilers, and furthermore was not > > > > > > > > compliant with the C standard, for which decrementing a > > > > > > > > pointer before its allocated memory is undefined. Per the > > > > > > > > recommendation of a security audit of the zlib code by > > > > > > > > Trail of Bits and TrustInSoft, in support of the Mozilla > > > > > > > > Foundation, this "optimization" was removed, in order to > > > > > > > > avoid the possibility of > > > undefined behavior. > > > > > > > > > > > > > > > > [1]: > > > > > > > > > > > > > > > > > https://github.com/madler/zlib/commit/9aaec95e82117c1cb0f9624264c3 > > > > > > > > 618fc380cecb > > > > > > > > > > > > > > > > Signed-off-by: Mark Adler > > > > > > > > Signed-off-by: Chin Liang See > > > > > > > > Signed-off-by: Ley Foon Tan > > > > > > > > > > > > > > This breaks the following tests on sandbox: > > > > > > > FAILED test/py/tests/test_efi_fit.py::test_efi_fit_launch - > > > > > > > u_boot_spawn.Timeout FAILED > > > > > > > test/py/tests/test_fit.py::test_fit > > > > > > > - > > > > > > > OSError: [Errno 5] Input/output error > > > > > > > > > > > > > Hi Tom > > > > > > > > > > > > I have tried to run the sandtest, but it failed in different > > > > > > test cases. I am run this command "./test/py/test.py --bd sandbox -- > build". > > > > > > Error log at bottom of email. > > > > > > > > > > > > Found that > > > > > > https://gitlab.denx.de/u-boot/u-boot/-/blob/master/lib/zlib/zl > > > > > > ib.h always "#undef POSTINC", it is mean that U-boot can only > > > > > > support pre-increment? I have tried changing "#undef POSTINC" > > > > > > to "define POSTINC" and without this patch, the test failed at > > > > > > the same location. > > > > > > So, the failure is not caused by this patch. > > > > > > Note, this patch mainly changes to support post-increment only. > > > > > > > > > > > > Any suggestion to fix this? > > > > > > > > > > I'm not sure why the tests fail for you to start with. They all > > > > > pass inn the CI environment as well as locally. I would start > > > > > by seeing how your environment differs from those. > > > > > > > > Hi Tom > > > > > > > > My test is running on Ubuntu 20.04 Linux. > > > > > > > > Can you try change "#undef POSTINC" to "#define POSTINC" in > > > lib/zlib/zlib.h if you can see the error? > > > > > > I see: > > > FAILED test/py/tests/test_efi_fit.py::test_efi_fit_launch - assert > > > 'Hello, world' in "## Loa... > > > FAILED test/py/tests/test_fit.py::test_fit - OSError: [Errno 5] > > > Input/output error > > > > > > as new problems with that change. > > Just to confirm, this error is with this patch or change to "#define > > POSTINC"? > > > > Yours errors are different from my run. > > > > My run failed in these 2 testcases: > > test/py/tests/test_fs/test_squashfs/test_sqfs_load.py F > > test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py F > > The squashfs tests can fail if they ran before, sometimes and I think that > means we need a clean-up action in them. Delete the .bm-work directory > and re-run. I see the errors I reported when I changed the define, as you > asked. Originally, I saw the errors I reported in the CI systems, with the > patch in question. Yes, I also found delete .bm-work directory can solve squashfs test error. But, enable POSTINC still can see error even clean the -work directory. So, this can confirm the test error not caused by this patch.
Re: [PATCH] lib: zlib: Use post-increment only in inffast.c
On Fri, Oct 23, 2020 at 01:41:57AM +, Tan, Ley Foon wrote: > > > > -Original Message- > > From: Tom Rini > > Sent: Thursday, October 22, 2020 9:24 PM > > To: Tan, Ley Foon > > Cc: Ley Foon Tan ; ZY - u-boot > b...@lists.denx.de>; See, Chin Liang > > Subject: Re: [PATCH] lib: zlib: Use post-increment only in inffast.c > > > > On Wed, Oct 21, 2020 at 03:42:10AM +, Tan, Ley Foon wrote: > > > > > > > > > > -Original Message- > > > > From: Tom Rini > > > > Sent: Friday, October 16, 2020 8:37 PM > > > > To: Ley Foon Tan > > > > Cc: Tan, Ley Foon ; ZY - u-boot > > > b...@lists.denx.de>; See, Chin Liang > > > > Subject: Re: [PATCH] lib: zlib: Use post-increment only in inffast.c > > > > > > > > On Fri, Oct 16, 2020 at 04:40:00AM +0800, Ley Foon Tan wrote: > > > > > On Fri, Jul 17, 2020 at 9:29 PM Tom Rini wrote: > > > > > > > > > > > > On Wed, Jun 24, 2020 at 04:34:03PM +0800, Ley Foon Tan wrote: > > > > > > > > > > > > > From: Chin Liang See > > > > > > > > > > > > > > This fixes CVE-2016-9841. Changes integrated from [1], with > > > > > > > changes make for Uboot code base. > > > > > > > > > > > > > > An old inffast.c optimization turns out to not be optimal > > > > > > > anymore with modern compilers, and furthermore was not > > > > > > > compliant with the C standard, for which decrementing a > > > > > > > pointer before its allocated memory is undefined. Per the > > > > > > > recommendation of a security audit of the zlib code by Trail > > > > > > > of Bits and TrustInSoft, in support of the Mozilla Foundation, > > > > > > > this "optimization" was removed, in order to avoid the > > > > > > > possibility of > > undefined behavior. > > > > > > > > > > > > > > [1]: > > > > > > > > > > > > > https://github.com/madler/zlib/commit/9aaec95e82117c1cb0f9624264c3 > > > > > > > 618fc380cecb > > > > > > > > > > > > > > Signed-off-by: Mark Adler > > > > > > > Signed-off-by: Chin Liang See > > > > > > > Signed-off-by: Ley Foon Tan > > > > > > > > > > > > This breaks the following tests on sandbox: > > > > > > FAILED test/py/tests/test_efi_fit.py::test_efi_fit_launch - > > > > > > u_boot_spawn.Timeout FAILED test/py/tests/test_fit.py::test_fit > > > > > > - > > > > > > OSError: [Errno 5] Input/output error > > > > > > > > > > > Hi Tom > > > > > > > > > > I have tried to run the sandtest, but it failed in different test > > > > > cases. I am run this command "./test/py/test.py --bd sandbox --build". > > > > > Error log at bottom of email. > > > > > > > > > > Found that > > > > > https://gitlab.denx.de/u-boot/u-boot/-/blob/master/lib/zlib/zlib.h > > > > > always "#undef POSTINC", it is mean that U-boot can only support > > > > > pre-increment? I have tried changing "#undef POSTINC" to "define > > > > > POSTINC" and without this patch, the test failed at the same location. > > > > > So, the failure is not caused by this patch. > > > > > Note, this patch mainly changes to support post-increment only. > > > > > > > > > > Any suggestion to fix this? > > > > > > > > I'm not sure why the tests fail for you to start with. They all > > > > pass inn the CI environment as well as locally. I would start by > > > > seeing how your environment differs from those. > > > > > > Hi Tom > > > > > > My test is running on Ubuntu 20.04 Linux. > > > > > > Can you try change "#undef POSTINC" to "#define POSTINC" in > > lib/zlib/zlib.h if you can see the error? > > > > I see: > > FAILED test/py/tests/test_efi_fit.py::test_efi_fit_launch - assert 'Hello, > > world' in "## Loa... > > FAILED test/py/tests/test_fit.py::test_fit - OSError: [Errno 5] Input/output > > error > > > > as new problems with that change. > Just to confirm, this error is with this patch or change to "#define POSTINC"? > > Yours errors are different from my run. > > My run failed in these 2 testcases: > test/py/tests/test_fs/test_squashfs/test_sqfs_load.py F > test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py F The squashfs tests can fail if they ran before, sometimes and I think that means we need a clean-up action in them. Delete the .bm-work directory and re-run. I see the errors I reported when I changed the define, as you asked. Originally, I saw the errors I reported in the CI systems, with the patch in question. -- Tom signature.asc Description: PGP signature
RE: [PATCH] lib: zlib: Use post-increment only in inffast.c
> -Original Message- > From: Tom Rini > Sent: Thursday, October 22, 2020 9:24 PM > To: Tan, Ley Foon > Cc: Ley Foon Tan ; ZY - u-boot b...@lists.denx.de>; See, Chin Liang > Subject: Re: [PATCH] lib: zlib: Use post-increment only in inffast.c > > On Wed, Oct 21, 2020 at 03:42:10AM +, Tan, Ley Foon wrote: > > > > > > > -Original Message- > > > From: Tom Rini > > > Sent: Friday, October 16, 2020 8:37 PM > > > To: Ley Foon Tan > > > Cc: Tan, Ley Foon ; ZY - u-boot > > b...@lists.denx.de>; See, Chin Liang > > > Subject: Re: [PATCH] lib: zlib: Use post-increment only in inffast.c > > > > > > On Fri, Oct 16, 2020 at 04:40:00AM +0800, Ley Foon Tan wrote: > > > > On Fri, Jul 17, 2020 at 9:29 PM Tom Rini wrote: > > > > > > > > > > On Wed, Jun 24, 2020 at 04:34:03PM +0800, Ley Foon Tan wrote: > > > > > > > > > > > From: Chin Liang See > > > > > > > > > > > > This fixes CVE-2016-9841. Changes integrated from [1], with > > > > > > changes make for Uboot code base. > > > > > > > > > > > > An old inffast.c optimization turns out to not be optimal > > > > > > anymore with modern compilers, and furthermore was not > > > > > > compliant with the C standard, for which decrementing a > > > > > > pointer before its allocated memory is undefined. Per the > > > > > > recommendation of a security audit of the zlib code by Trail > > > > > > of Bits and TrustInSoft, in support of the Mozilla Foundation, > > > > > > this "optimization" was removed, in order to avoid the possibility > > > > > > of > undefined behavior. > > > > > > > > > > > > [1]: > > > > > > > > > > https://github.com/madler/zlib/commit/9aaec95e82117c1cb0f9624264c3 > > > > > > 618fc380cecb > > > > > > > > > > > > Signed-off-by: Mark Adler > > > > > > Signed-off-by: Chin Liang See > > > > > > Signed-off-by: Ley Foon Tan > > > > > > > > > > This breaks the following tests on sandbox: > > > > > FAILED test/py/tests/test_efi_fit.py::test_efi_fit_launch - > > > > > u_boot_spawn.Timeout FAILED test/py/tests/test_fit.py::test_fit > > > > > - > > > > > OSError: [Errno 5] Input/output error > > > > > > > > > Hi Tom > > > > > > > > I have tried to run the sandtest, but it failed in different test > > > > cases. I am run this command "./test/py/test.py --bd sandbox --build". > > > > Error log at bottom of email. > > > > > > > > Found that > > > > https://gitlab.denx.de/u-boot/u-boot/-/blob/master/lib/zlib/zlib.h > > > > always "#undef POSTINC", it is mean that U-boot can only support > > > > pre-increment? I have tried changing "#undef POSTINC" to "define > > > > POSTINC" and without this patch, the test failed at the same location. > > > > So, the failure is not caused by this patch. > > > > Note, this patch mainly changes to support post-increment only. > > > > > > > > Any suggestion to fix this? > > > > > > I'm not sure why the tests fail for you to start with. They all > > > pass inn the CI environment as well as locally. I would start by > > > seeing how your environment differs from those. > > > > Hi Tom > > > > My test is running on Ubuntu 20.04 Linux. > > > > Can you try change "#undef POSTINC" to "#define POSTINC" in > lib/zlib/zlib.h if you can see the error? > > I see: > FAILED test/py/tests/test_efi_fit.py::test_efi_fit_launch - assert 'Hello, > world' in "## Loa... > FAILED test/py/tests/test_fit.py::test_fit - OSError: [Errno 5] Input/output > error > > as new problems with that change. Just to confirm, this error is with this patch or change to "#define POSTINC"? Yours errors are different from my run. My run failed in these 2 testcases: test/py/tests/test_fs/test_squashfs/test_sqfs_load.py F test/py/tests/test_fs/test_squashfs/test_sqfs_ls.py F Regards Ley Foon
[PATCH 1/1] rtc: provide an emulated RTC
For testing purposes like running the UEFI SCT an RTC may be required.
Provide an emulated RTC if we do not have a hardware one.
Signed-off-by: Heinrich Schuchardt
---
MAINTAINERS| 1 +
drivers/rtc/Kconfig| 6
drivers/rtc/Makefile | 1 +
drivers/rtc/emul_rtc.c | 79 ++
4 files changed, 87 insertions(+)
create mode 100644 drivers/rtc/emul_rtc.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 196d635bdd..2465b51136 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -675,6 +675,7 @@ S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git
F: doc/api/efi.rst
F: doc/uefi/*
+F: drivers/rtc/emul_rtc.c
F: include/capitalization.h
F: include/charset.h
F: include/cp1250.h
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 59e2fc44ba..5c22d70ca9 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -63,6 +63,12 @@ config RTC_DS3232
Support for Dallas Semiconductor (now Maxim) DS3232 compatible
Real Time Clock devices.
+config RTC_EMULATION
+ bool "Enable emulated RTC"
+ depends on DM_RTC
+ help
+ Provide an emulated real time clock for testing purposes.
+
config RTC_ISL1208
bool "Enable ISL1208 driver"
depends on DM_RTC
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 12eb449583..ef66dc4bf0 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_RTC_DS164x) += ds164x.o
obj-$(CONFIG_RTC_DS174x) += ds174x.o
obj-$(CONFIG_RTC_DS3231) += ds3231.o
obj-$(CONFIG_RTC_DS3232) += ds3232.o
+obj-$(CONFIG_RTC_EMULATION) += emul_rtc.o
obj-$(CONFIG_RTC_FTRTC010) += ftrtc010.o
obj-$(CONFIG_SANDBOX) += i2c_rtc_emul.o
obj-$(CONFIG_RTC_IMXDI) += imxdi.o
diff --git a/drivers/rtc/emul_rtc.c b/drivers/rtc/emul_rtc.c
new file mode 100644
index 00..f291d19ab5
--- /dev/null
+++ b/drivers/rtc/emul_rtc.c
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020, Heinrich Schuchardt
+ *
+ * This driver emulates a real time clock based on timer ticks.
+ */
+
+#include
+#include
+#include
+#include
+
+/**
+ * struct emul_rtc - private data for emulated RTC driver
+ */
+struct emul_rtc {
+ /**
+* @offset_us: microseconds from 1970-01-01 to timer_get_us() base
+*/
+ u64 offset_us;
+ /**
+* @isdst: daylight saving time
+*/
+ int isdst;
+};
+
+static int emul_rtc_get(struct udevice *dev, struct rtc_time *time)
+{
+ struct emul_rtc *priv = dev_get_priv(dev);
+ u64 now;
+
+ if (!priv->offset_us) {
+ /* Assume it is 2021-01-11T00:00:00Z */
+ priv->offset_us = 16103232ULL - timer_get_us();
+ priv->isdst = -1;
+ }
+
+ now = timer_get_us() + priv->offset_us;
+ do_div(now, 100);
+ rtc_to_tm(now, time);
+ time->tm_isdst = priv->isdst;
+
+ return 0;
+}
+
+static int emul_rtc_set(struct udevice *dev, const struct rtc_time *time)
+{
+ struct emul_rtc *priv = dev_get_priv(dev);
+
+ if (time->tm_year < 1970)
+ return -EINVAL;
+
+ priv->offset_us = rtc_mktime(time) * 100ULL - timer_get_us();
+
+ if (time->tm_isdst > 0)
+ priv->isdst = 1;
+ else if (time->tm_isdst < 0)
+ priv->isdst = -1;
+ else
+ priv->isdst = 0;
+
+ return 0;
+}
+
+static const struct rtc_ops emul_rtc_ops = {
+ .get = emul_rtc_get,
+ .set = emul_rtc_set,
+};
+
+U_BOOT_DRIVER(rtc_emul) = {
+ .name = "emulated RTC",
+ .id = UCLASS_RTC,
+ .ops= &emul_rtc_ops,
+ .priv_auto_alloc_size = sizeof(struct emul_rtc),
+};
+
+U_BOOT_DEVICE(rtc_emul) = {
+ .name = "emulated RTC",
+};
--
2.28.0
Re: [PATCH] rtc: move pcf8563 to Kconfig
On Fri, Oct 16, 2020 at 10:41:46AM +0200, Heiko Schocher wrote: > add Kconfig option for pcf8563 driver and > run tools/moveconfig.py > > Signed-off-by: Heiko Schocher > Reviewed-by: Stefan Roese Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 4/4] serial: serial_xen: add DEBUG_UART support
On Thu, Oct 15, 2020 at 01:25:16PM +0900, AKASHI Takahiro wrote: > By using a hypervisor call, we can implement DEBUG_UART on xen. > This will allow us to see messages even earlier than serial_init(). > > Signed-off-by: AKASHI Takahiro Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/4] serial: serial_xen: print U-Boot banner and others
On Thu, Oct 15, 2020 at 01:25:13PM +0900, AKASHI Takahiro wrote: > At present, DM_FLAG_PRE_RELOC is set only if !OF_CONTROL. > It doesn't make sense for this para-virtualized driver. > > With this patch applied, you will be able to see early boot messages: > > U-Boot 2020.10-1-ge442e71a6c52-dirty (Oct 15 2020 - 11:02:25 +0900) > xenguest > > Xen virtual CPU > Model: XENVM-4.15 > DRAM: 128 MiB > PVBLOCK: > (XEN) gnttab_mark_dirty not implemented yet > pvblock: 0 > In:hypervisor > Out: hypervisor > Err: hypervisor > xenguest# > > Signed-off-by: AKASHI Takahiro > Reviewed-by: Peng Fan Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] mmc: mtk-sd: change some dev_err into dev_dbg
On Thu, Oct 15, 2020 at 06:38:18PM +0200, Fabien Parent wrote: > dev_err has been used for debugging and a few dev_err message are > printed for normal code execution. Make them dev_dbg instead. > > Signed-off-by: Fabien Parent > Reviewed-by: Peng Fan Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [v3 2/2] cosmetic: reset: ast2500: Rename driver and configs
On Thu, Oct 15, 2020 at 10:25:14AM +0800, Chia-Wei, Wang wrote: > 1. Rename AST2500 reset driver from ast2500-reset.c >to reset-ast2500.c > 2. Rename AST2500 reset kconfig option from AST2500_RESET >to RESET_AST2500 > > Signed-off-by: Chia-Wei, Wang > Reviewed-by: Ryan Chen Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/4] arch: arm/xen: add putc() for debugging
On Thu, Oct 15, 2020 at 01:25:14PM +0900, AKASHI Takahiro wrote: > This new function, xen_debug_putc(), is intended to be used to > enable CONFIG_DEBUG_UART on xen guest. > > Please note that the underlying functionality in Xen is available > only when Xen is configured with !NDEBUG but is much simpler than > a generic HYPERVISOR_console_io(). > > Signed-off-by: AKASHI Takahiro > Reviewed-by: Peng Fan Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/4] xen: add definitions for console_io
On Thu, Oct 15, 2020 at 01:25:15PM +0900, AKASHI Takahiro wrote: > Those definitions added are used with HYPERVISOR_console_io(). > > Signed-off-by: AKASHI Takahiro > Reviewed-by: Peng Fan Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] log: Tidy up documentation
On Tue, Oct 13, 2020 at 07:55:07PM -0600, Simon Glass wrote:
> Fix up the documentation which was lost in a merge conflict in the
> conversion to RST.
>
> Fixes: 52d3df7fefe ("log: Allow LOG_DEBUG to always enable log output")
>
> Signed-off-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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Re: [v3 1/2] reset: ast2500: Use SCU for reset control
On Thu, Oct 15, 2020 at 10:25:13AM +0800, Chia-Wei, Wang wrote: > The System Control Unit (SCU) controller of Aspeed > SoCs provides the reset control for each peripheral. > > This patch refactors the reset method to leverage > the SCU reset control. Thus the driver dependency > on watchdog including dedicated WDT API and reset > flag encoding can be eliminated. > > The Kconfig description is also updated accordingly. > > Signed-off-by: Chia-Wei, Wang > Reviewed-by: Ryan Chen Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2] clk: ccf: replace the get_rate helper
On Wed, Oct 14, 2020 at 11:42:17PM +0200, Dario Binacchi wrote: > The 12d152620d commit fixed the get_rate helper because the set_parent > one did not re-parent the clock device to the new parent. The 4d139f3838 > commit allows you to remove this workaround by calling the > clk_get_parent_rate routine. > > Signed-off-by: Dario Binacchi Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] usb: musb-new: Fix typo in caution message
On Mon, Oct 12, 2020 at 06:35:42PM +0900, Naoki Hayama wrote: > %s/Occured/Occurred/ > > Signed-off-by: Naoki Hayama Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] log: Tidy up documentation
On Tue, Oct 13, 2020 at 07:55:07PM -0600, Simon Glass wrote:
> Fix up the documentation which was lost in a merge conflict in the
> conversion to RST.
>
> Fixes: 52d3df7fefe ("log: Allow LOG_DEBUG to always enable log output")
>
> Signed-off-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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Description: PGP signature
Re: [PATCH] ARM: mvebu: a38x: Fix comment typo
On Mon, Oct 12, 2020 at 06:35:55PM +0900, Naoki Hayama wrote: > %s/occured/occurred/ > > Signed-off-by: Naoki Hayama > Reviewed-by: Stefan Roese Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] doc: dfu: fix typo in README.dfu
On Wed, Oct 14, 2020 at 11:47:33AM +0800, Chance.Yang wrote: > Fix "ram" typos for serial flash > > Signed-off-by: Chance.Yang Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] Remove default value of CONFIG_PREBOOT for CONFIG_USB_STORAGE
On Mon, Oct 12, 2020 at 09:47:50AM +0200, Patrick Delaunay wrote:
> Remove the default value "usb start" for CONFIG_USB_STORAGE as the USB
> storage boot initialization is correctly managed by distro boot command
> ('usb_boot' defined in include/config_distro_bootcmd.h already include
> the command 'usb start').
>
> Fixes: 324d77998ed6 ("Define default CONFIG_PREBOOT with right config option")
> Signed-off-by: Patrick Delaunay
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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Re: [PATCH 1/2] dm: core: improve uclass_get_device_by_phandle_id() description
On Sun, Oct 11, 2020 at 02:25:46PM +0200, Dario Binacchi wrote: > Complete the devp parameter description. > > Signed-off-by: Dario Binacchi > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/2] gpio: fix gpio_request_by_name() description
On Sun, Oct 11, 2020 at 02:25:47PM +0200, Dario Binacchi wrote: > Replace 'dev->dev' with '@desc->dev' in the gpio_request_by_name function > desc parameter description. > > Signed-off-by: Dario Binacchi > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 2/2] km/common: change ubicopy variable
On Fri, Oct 09, 2020 at 05:21:33PM +0200, Holger Brunck wrote: > Instead having a hard coded value for "cramfsaddr" after compile time, > we change it to take the variable "cramfsaddr" for the ubicopy variable. > This makes sure that ubicopy uses the right address, even when > the value for "cramfsaddr" has changed. > > CC: Valentin Longchamp > CC: Heiko Schocher > CC: Tom Rini > Signed-off-by: Holger Brunck > Reviewed-by: Heiko Schocher Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 1/2] km: adapt defines and variables for new memory layout
On Fri, Oct 09, 2020 at 05:21:32PM +0200, Holger Brunck wrote: > Due to increasing kernel image sizes we get problems when decompressing > the kernel image. To fix this we need to change the addresses where we > load and where we extract the kernel. Also we need to adapt the address > where to load the CRAMFS image and where to load the DTB file. > While at it also harmonize all boards for PPC and ARM to have the > same values. Also we add a new variable "env_version", so that the > userspace is able to detect if this is a u-boot binary with updated > values or not. > > CC: Valentin Longchamp > CC: Heiko Schocher > CC: Tom Rini > Signed-off-by: Holger Brunck > Reviewed-by: Heiko Schocher Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] fs: btrfs: Fix typo in error message
On Mon, Oct 12, 2020 at 06:35:33PM +0900, Naoki Hayama wrote: > %s/occured/occurred/ > > Signed-off-by: Naoki Hayama > Reviewed-by: Marek Behún > Reviewed-by: Qu Wenruo Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] mmc: Fix comment typo
On Mon, Oct 12, 2020 at 06:35:22PM +0900, Naoki Hayama wrote: > %s/occured/occurred/ > > Signed-off-by: Naoki Hayama Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 5/6] rng: Add Qualcomm MSM PRNG driver
On Thu, Oct 08, 2020 at 10:05:13PM +0200, Robert Marko wrote: > Add support for the hardware pseudo random number generator found in Qualcomm > SoC-s. > > Signed-off-by: Robert Marko > Cc: Luka Perkov Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 4/6] IPQ40xx: Add support for MDIO
On Thu, Oct 08, 2020 at 10:05:12PM +0200, Robert Marko wrote: > Lets add the necessary DTS node and pinctrl properties for newly added MDIO > driver. > > Signed-off-by: Robert Marko > Cc: Luka Perkov Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 6/6] IPQ40xx: Add PRNG support
On Thu, Oct 08, 2020 at 10:05:14PM +0200, Robert Marko wrote: > Since we now have the driver for Qualcomm PRNG HW, lets use it and add the > necessary clocks and nodes. > > Signed-off-by: Robert Marko > Cc: Luka Perkov Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/2] lib: print_freq() should output kHz not KHz
On Thu, Oct 08, 2020 at 10:23:23PM +0200, Heinrich Schuchardt wrote: > In the International System of Units (SI) the prefix kilo is abbreviated as > 'k' not 'K'. 'K' is the symbol for Kelvin. > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Stefan Roese Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/6] net: Add IPQ40xx MDIO driver
On Thu, Oct 08, 2020 at 10:05:11PM +0200, Robert Marko wrote: > This adds the driver for the IPQ40xx built-in MDIO. > This will be needed to support future PHY driver. > > Signed-off-by: Robert Marko > Cc: Luka Perkov Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] tools: image-host.c: use correct output format
On Thu, Oct 08, 2020 at 08:51:24PM +0200, Heinrich Schuchardt wrote:
> When building on a 32bit host the following warning occurs:
>
> tools/image-host.c: In function ‘fit_image_read_data’:
> tools/image-host.c:296:56: warning: format ‘%ld’ expects argument of
> type ‘long int’, but argument 3 has type ‘__off64_t’
> {aka ‘long long int’} [-Wformat=]
>printf("File %s don't have the expected size (size=%ld, expected=%d)\n",
> ~~^
> %lld
> filename, sbuf.st_size, expected_size);
>
> tools/image-host.c:311:62: warning: format ‘%ld’ expects argument of
> type ‘long int’, but argument 4 has type ‘__off64_t’
> {aka ‘long long int’} [-Wformat=]
>printf("Can't read all file %s (read %zd bytes, expexted %ld)\n",
> ~~^
> %lld
> filename, n, sbuf.st_size);
>
>
> Fix the format strings.
>
> Signed-off-by: Heinrich Schuchardt
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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Re: [PATCH 1/6] spi: Add Qualcomm QUP SPI controller driver
On Thu, Oct 08, 2020 at 10:05:09PM +0200, Robert Marko wrote: > This patch adds support for the Qualcomm QUP SPI controller that is commonly > found in most of Qualcomm SoC-s. > > Driver currently supports v1.1.1, v2.1.1 and v2.2.1 HW. > FIFO and Block modes are supported, no support for DMA mode is planned. > > Signed-off-by: Robert Marko > Signed-off-by: Luka Kovacic > Cc: Luka Perkov Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/6] IPQ40xx: Add SPI support
On Thu, Oct 08, 2020 at 10:05:10PM +0200, Robert Marko wrote: > Since we have SPI driver for IPQ40xx QUP SPI controller, lets add the > necessary nodes, pinctrl and clocks. > > Signed-off-by: Robert Marko > Cc: Luka Perkov Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 5/6] README: vxworks: Fix typo overwride
On Thu, Oct 08, 2020 at 01:17:08PM +0900, Naoki Hayama wrote: > %s/overwride/override/ > > Signed-off-by: Naoki Hayama Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/6] README: Update directory hierarchy
On Thu, Oct 08, 2020 at 01:16:38PM +0900, Naoki Hayama wrote: > Removed: > - /arch/openrisc > > Added: > - /arch/xtensa > - /env > > Signed-off-by: Naoki Hayama Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 4/6] README: sandbox: Change reference to sandbox details
On Thu, Oct 08, 2020 at 01:16:58PM +0900, Naoki Hayama wrote: > doc/arch/index.rst is a list of links to each architecture. > As for the sandbox details, doc/arch/sandbox.rst looks better. > > Signed-off-by: Naoki Hayama > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2] km: fix license string and compatible strings
On Thu, Oct 08, 2020 at 12:27:22PM +0200, Holger Brunck wrote: > As the ownership is now Hitachi Power Grids, change the license string > and adapt the compatible string in DTS files. For kmeter1.dts we > change it to "keymile,KMETER1" for now, as this is then compliant with > what is submitted to the linux kernel. All other boards don't have > a upstreamed version in linux mainline. > > Signed-off-by: Holger Brunck > CC: Valentin Longchamp > CC: Heiko Schocher > CC: Marek Vasut > CC: Tom Rini > Reviewed-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 6/6] README: Convert HTTP links to HTTPS
On Thu, Oct 08, 2020 at 01:17:16PM +0900, Naoki Hayama wrote: > Convert all the other http:// links to https:// . > www.denx.de/twiki/ seems to move to www.denx.de/wiki/ , > so change it. > > I checked all links in this patch are valid. > > Signed-off-by: Naoki Hayama Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/6] README: Update links to mailing list archives
On Thu, Oct 08, 2020 at 01:16:18PM +0900, Naoki Hayama wrote: > This patch includes these updates > > - Change http://lists.denx.de/pipermail/u-boot > to https://lists.denx.de/pipermail/u-boot > - http://dir.gmane.org/gmane.comp.boot-loaders.u-boot > is broken, so remove it > - Another archive https://marc.info/?l=u-boot > is available, so add it > > Additional information: > dir.gmane.org has moved to news.gmane.io, but it only allows > access to the archive via NNTP. > > - Server: news.gmane.io > - Group : gmane.comp.boot-loaders.u-boot > > I don't include this information in this patch because > it's not very useful without web interfaces. > > Signed-off-by: Naoki Hayama Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/6] README: Update source code location
On Thu, Oct 08, 2020 at 01:16:25PM +0900, Naoki Hayama wrote: > This patch include these updates > > - Git repository has moved to GitLab > - HTTPS access to the file server is allowed > - pre-built images are no longer available > > Signed-off-by: Naoki Hayama Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 2/2] timer: Return count from timer_ops.get_count
On Wed, Oct 07, 2020 at 02:37:44PM -0400, Sean Anderson wrote: > No timer drivers return an error from get_count. Instead of possibly > returning an error, just return the count directly. > > Signed-off-by: Sean Anderson > Reviewed-by: Claudiu Beznea > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 1/2] doc: Document timer API
On Wed, Oct 07, 2020 at 02:37:43PM -0400, Sean Anderson wrote: > This adds kerneldocs for . > > I don't know who should maintain doc/api/timer.rst, since the timer > subsystem seems to be maintained by SoC maintainers. MAINTAINERS is left > un-updated for the moment. > > Signed-off-by: Sean Anderson > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/3] cosmetic: image: Fix comments and the order of definitions
On Wed, Oct 07, 2020 at 11:22:24AM +0900, Naoki Hayama wrote: > Fix some comments about functions. > Move genimg_get_comp_name() above genimg_get_short_name() because > genimg_get_comp_name() is related to get_table_entry_name(). > > Signed-off-by: Naoki Hayama > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] common, autoboot: sync functionality with Kconfig description
On Wed, Oct 07, 2020 at 08:06:54AM +0200, Heiko Schocher wrote: > add back again special case: -2 > autoboot with no delay and no check for abort > > as described in Kconfig option, see common/Kconfig > help text for option BOOTDELAY. > > Signed-off-by: Heiko Schocher > Reviewed-by: Tom Rini > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/1] common: rename getc() to getchar()
On Wed, Oct 07, 2020 at 06:11:48PM +0200, Heinrich Schuchardt wrote: > The sandbox is built with the SDL2 library with invokes the X11 library > which in turn calls getc(). But getc() in glibc is defined as > > int getc(FILE *) > > This does not match our definition. > > int getc(void) > > The sandbox crashes when called with parameter -l. > > Rename our library symbol getc() to getchar(). > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Tom Rini > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] cli_hush.c: remove broken sanity check
On Wed, Oct 07, 2020 at 09:36:03AM +0200, Rasmus Villemoes wrote: > This code is intended do prevent one from setting a shell variable abc > by doing > > abc=123 > > if an environment variable named abc already exists. However, the > check is broken, since the env_get is done before the split on =, so > we look up whether an environment variable "abc=123" exists, which is > obviously never the case. > > One could move the code to below the split on =, but instead, just > remove it, saving a little .text: The check has never worked as > intended (it goes all the way back to the initial git commit), and it > would anyway not guard against one first setting the shell variable, > then doing 'env set abc xyz'. > > Signed-off-by: Rasmus Villemoes Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/3] image: Add a function to modify category information
On Wed, Oct 07, 2020 at 11:21:25AM +0900, Naoki Hayama wrote: > Add a generic function which can check whether a category has an > entry ID. > > Signed-off-by: Naoki Hayama > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/3] mkimage: Skip adding non-existent IDs to a list
On Wed, Oct 07, 2020 at 11:21:55AM +0900, Naoki Hayama wrote: > In show_valid_options(), this patch introduces checking whether > a category has an entry ID. If not, adding it to a list for output > is skipped before calling qsort(). > This patch will affect all kinds of image header categories > (-A, -C, -O and -T flags). > > Signed-off-by: Naoki Hayama > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 10/12] board: Show memory for frame buffers
On Sun, Sep 27, 2020 at 06:46:22PM -0600, Simon Glass wrote: > When debugging is enabled, show the memory allocated to video frame > buffers. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 11/12] i2c: designware: Use log_debug() for debugging
On Sun, Sep 27, 2020 at 06:46:23PM -0600, Simon Glass wrote: > We don't want the debug output to be visible in a normal boot. Silence it. > > Signed-off-by: Simon Glass > Reviewed-by: Heiko Schocher Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 12/12] tpm: cr50: Correct logging statements
On Sun, Sep 27, 2020 at 06:46:24PM -0600, Simon Glass wrote: > Fix up some logging statements in this file. Most of them should use > log_debug(), apart from one error. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 05/12] syscon: Drop the logging in syscon_get_by_driver_data()
On Sun, Sep 27, 2020 at 06:46:17PM -0600, Simon Glass wrote: > This function can be called when it is not known whether it will find > anything. This results in confusing log messages if the device is not > found. It is better for the caller to log the failure, if necessary. > > Drop the logging from this function. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 06/12] bloblist: Place on a 4KB boundary
On Sun, Sep 27, 2020 at 06:46:18PM -0600, Simon Glass wrote: > It is much easier to read the bloblist addresses if it starts on a 4KB > boundary. Update it to align it accordingly. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 01/12] log: Add missing category names
On Sun, Sep 27, 2020 at 06:46:13PM -0600, Simon Glass wrote: > Add some category names that were missed in recent changes. Update the > comment as a reminder. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] Kconfig: Use hex values for CONFIG_{SPL,TPL}_SIZE_LIMIT
On Fri, Sep 25, 2020 at 09:12:56PM +0300, Ovidiu Panait wrote:
> CONFIG_{SPL,TPL}_SIZE_LIMIT are defined as hex (SPL_SIZE_LIMIT was
> converted in b51882d0 ("spl: Convert CONFIG_SPL_SIZE_LIMIT to hex"), but
> there are still places that reference integer values. Change those to hex
> as well. Also, update the Makefile to check for 0x0 instead of 0.
>
> This also fixes the following build error when CONFIG_SPL_SIZE_LIMIT
> is set by menuconfig to 0x0:
> ...
> spl/u-boot-spl.bin exceeds file size limit:
> limit: 0 bytes
> actual: 0x80f0 bytes
> excess: 0x80f0 bytes
>
> Signed-off-by: Ovidiu Panait
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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Description: PGP signature
Re: [PATCH] mx6: peripheral clock from oscillator
On Thu, Oct 22, 2020 at 6:24 PM Jorge Ramirez-Ortiz, Foundries wrote: > um, weird, I just googled "imx Rev 2, 10/2019, ERR007805" and it showed > the document and a link to the errata. The errata document is specific for a SoC. It does not help to add "Rev 2, 10/2019, ERR007805" in the commit log as we cannot know which SoC it refers to. Just mention the SoC errata document. For example: IMX6SLCE Rev. 5, 02/2019
Re: [PATCH] mx6: peripheral clock from oscillator
On 22/10/20, Fabio Estevam wrote: > On Mon, Oct 19, 2020 at 11:23 AM Jorge Ramirez-Ortiz > wrote: > > > > In order to be able to run the I2C bus at 400Khz, the chip errata[1] > > recommends that the peripheral clock runs out of the 24MHz oscillator. > > I would suggest adding the optee related motivation that you explained > earlier here in the commit log too. sure, will do. > > > [1] Rev 2, 10/2019, ERR007805 > > Not clear what document this refers to. um, weird, I just googled "imx Rev 2, 10/2019, ERR007805" and it showed the document and a link to the errata. how do you tipically do this otherwise? I didnt want to depend on links that migh break in the future. > > > /* Set perclk to source from OSC 24MHz */ > > - if (is_mx6sl()) > > + if (is_mx6sl() || ERRATA_ERR007805) > > This gives the impression that imx6sl is not affected by the erratum, > but in fact it is: > https://www.nxp.com/docs/en/errata/IMX6SLCE.pdf > > You could define it like this: > > #define has_err007805() (is_mx6sl() || is_mx6dl() || is_mx6solo() || > is_mx6ull()) sounds good. will do (I didnt know the reason for the mx6sl configuring the clock was that same errata)
Re: [PATCH] mx6: peripheral clock from oscillator
On Mon, Oct 19, 2020 at 11:23 AM Jorge Ramirez-Ortiz wrote: > > In order to be able to run the I2C bus at 400Khz, the chip errata[1] > recommends that the peripheral clock runs out of the 24MHz oscillator. I would suggest adding the optee related motivation that you explained earlier here in the commit log too. > [1] Rev 2, 10/2019, ERR007805 Not clear what document this refers to. > /* Set perclk to source from OSC 24MHz */ > - if (is_mx6sl()) > + if (is_mx6sl() || ERRATA_ERR007805) This gives the impression that imx6sl is not affected by the erratum, but in fact it is: https://www.nxp.com/docs/en/errata/IMX6SLCE.pdf You could define it like this: #define has_err007805() (is_mx6sl() || is_mx6dl() || is_mx6solo() || is_mx6ull())
[PATCH v3 2/2] pwm: Add a driver for Chrome OS EC PWM
This PWM is used in rk3399-gru-bob and rk3399-gru-kevin to control
the display brightness. We can only change the duty cycle, so on
set_config() we just try to match the duty cycle that dividing duty_ns
by period_ns gives us. To disable, we set the duty cycle to zero while
keeping the old value for when we want to re-enable it.
The cros_ec_set_pwm_duty() function is taken from Depthcharge's
cros_ec_set_bl_pwm_duty() but modified to use the generic pwm type.
The driver itself is very loosely based on rk_pwm.c for the general pwm
driver structure.
The devicetree binding file is from Linux, before it was converted to
YAML at 5df5a577a6b4 ("dt-bindings: pwm: Convert google,cros-ec-pwm.txt
to YAML format") in their repo.
Signed-off-by: Alper Nebi Yasak
Reviewed-by: Simon Glass
---
I'm testing on a rk3399-gru-kevin with a lot of other patches to get it
and it's screen working. The actual tree I'm testing is available here:
https://github.com/alpernebbi/u-boot/tree/rk3399-gru-kevin/wip
(currently at commit 1c016682bf84b82488311d59adc81691de2a664f)
Changes in v3:
- Add tag: "Reviewed-by: Simon Glass "
v2:
https://patchwork.ozlabs.org/project/uboot/patch/20200926200851.4388-2-alpernebiya...@gmail.com/
Changes in v2:
- Add device-tree-binding/pwm/cros-ec-pwm.txt adapted from Linux
- Return ec_command() errors correctly in cros_ec_set_pwm_duty()
- Add newlines before last returns in cros_ec_pwm.c
v1:
https://patchwork.ozlabs.org/project/uboot/patch/20200923165231.18188-2-alpernebiya...@gmail.com/
doc/device-tree-bindings/pwm/cros-ec-pwm.txt | 23 ++
drivers/misc/cros_ec.c | 17
drivers/pwm/Kconfig | 9 +++
drivers/pwm/Makefile | 1 +
drivers/pwm/cros_ec_pwm.c| 84
include/cros_ec.h| 13 +++
6 files changed, 147 insertions(+)
create mode 100644 doc/device-tree-bindings/pwm/cros-ec-pwm.txt
create mode 100644 drivers/pwm/cros_ec_pwm.c
diff --git a/doc/device-tree-bindings/pwm/cros-ec-pwm.txt
b/doc/device-tree-bindings/pwm/cros-ec-pwm.txt
new file mode 100644
index ..f198d088917b
--- /dev/null
+++ b/doc/device-tree-bindings/pwm/cros-ec-pwm.txt
@@ -0,0 +1,23 @@
+PWM controlled by ChromeOS EC
+
+Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller
+(EC) and controlled via a host-command interface.
+
+An EC PWM node should be only found as a sub-node of the EC node (see
+doc/device-tree-bindings/misc/cros-ec.txt).
+
+Required properties:
+- compatible: Must contain "google,cros-ec-pwm"
+- #pwm-cells: Should be 1. The cell specifies the PWM index.
+
+Example:
+ cros-ec@0 {
+ compatible = "google,cros-ec-spi";
+
+ ...
+
+ cros_ec_pwm: ec-pwm {
+ compatible = "google,cros-ec-pwm";
+ #pwm-cells = <1>;
+ };
+ };
diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c
index a5534b16673b..3be2dd6f14ac 100644
--- a/drivers/misc/cros_ec.c
+++ b/drivers/misc/cros_ec.c
@@ -1110,6 +1110,23 @@ int cros_ec_battery_cutoff(struct udevice *dev, uint8_t
flags)
return 0;
}
+int cros_ec_set_pwm_duty(struct udevice *dev, uint8_t index, uint16_t duty)
+{
+ struct ec_params_pwm_set_duty p;
+ int ret;
+
+ p.duty = duty;
+ p.pwm_type = EC_PWM_TYPE_GENERIC;
+ p.index = index;
+
+ ret = ec_command(dev, EC_CMD_PWM_SET_DUTY, 0, &p, sizeof(p),
+NULL, 0);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
int cros_ec_set_ldo(struct udevice *dev, uint8_t index, uint8_t state)
{
struct ec_params_ldo_set params;
diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index b3bd5c6bb7ae..ef17330387bc 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -9,6 +9,15 @@ config DM_PWM
frequency/period can be controlled along with the proportion of that
time that the signal is high.
+config PWM_CROS_EC
+ bool "Enable support for the Chrome OS EC PWM"
+ depends on DM_PWM
+ help
+ This PWM is found on several Chrome OS devices and controlled by
+ the Chrome OS embedded controller. It may be used to control the
+ screen brightness and/or the keyboard backlight depending on the
+ device.
+
config PWM_EXYNOS
bool "Enable support for the Exynos PWM"
depends on DM_PWM
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
index f21ae7d76eeb..d7458e33a9a8 100644
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
@@ -10,6 +10,7 @@
obj-$(CONFIG_DM_PWM) += pwm-uclass.o
+obj-$(CONFIG_PWM_CROS_EC) += cros_ec_pwm.o
obj-$(CONFIG_PWM_EXYNOS) += exynos_pwm.o
obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o
obj-$(CONFIG_PWM_MESON)+= pwm-meson.o
diff --git a/drivers/pwm/cros_ec_pwm.c b/drivers/pwm/cros
[PATCH v3 1/2] video: backlight: Support PWMs without a known period_ns
The PWM device provided by Chrome OS EC doesn't really support anything
other than setting a relative duty cycle. To support it as a backlight,
this patch makes the PWM period optional in the device tree and pretends
the valid brightness range is its period_ns.
Also adds a sandbox test for a PWM channel that has a fixed period,
checking that the resulting duty_cycle matches on a set_config() even if
the requested period_ns can't be set.
Signed-off-by: Alper Nebi Yasak
Reviewed-by: Simon Glass
---
Changes in v3:
- Add tag: "Reviewed-by: Simon Glass "
- Adjust to match recently merged duty cycle calculation fix.
v2:
https://patchwork.ozlabs.org/project/uboot/patch/20200926200851.4388-1-alpernebiya...@gmail.com/
Changes in v2:
- Add sandbox test to pwm.c (using sandbox_pwm's channel 2)
- Add comments to pwm_set_config() and pwm_ops->set_config()
v1:
https://patchwork.ozlabs.org/project/uboot/patch/20200923165231.18188-1-alpernebiya...@gmail.com/
drivers/pwm/sandbox_pwm.c | 11 +--
drivers/video/pwm_backlight.c | 20 ++--
include/pwm.h | 8
test/dm/pwm.c | 11 +++
4 files changed, 42 insertions(+), 8 deletions(-)
diff --git a/drivers/pwm/sandbox_pwm.c b/drivers/pwm/sandbox_pwm.c
index 28988187e039..3fd2e78c909d 100644
--- a/drivers/pwm/sandbox_pwm.c
+++ b/drivers/pwm/sandbox_pwm.c
@@ -59,8 +59,15 @@ static int sandbox_pwm_set_config(struct udevice *dev, uint
channel,
if (channel >= NUM_CHANNELS)
return -ENOSPC;
chan = &priv->chan[channel];
- chan->period_ns = period_ns;
- chan->duty_ns = duty_ns;
+
+ if (channel == 2) {
+ /* Pretend to have some fixed period */
+ chan->period_ns = 4096;
+ chan->duty_ns = duty_ns * 4096 / period_ns;
+ } else {
+ chan->period_ns = period_ns;
+ chan->duty_ns = duty_ns;
+ }
return 0;
}
diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c
index 9519180ceb39..18b7a00b033c 100644
--- a/drivers/video/pwm_backlight.c
+++ b/drivers/video/pwm_backlight.c
@@ -62,10 +62,17 @@ static int set_pwm(struct pwm_backlight_priv *priv)
uint duty_cycle;
int ret;
- duty_cycle = priv->period_ns * (priv->cur_level - priv->min_level) /
- (priv->max_level - priv->min_level);
- ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns,
-duty_cycle);
+ if (priv->period_ns) {
+ duty_cycle = priv->period_ns * (priv->cur_level -
priv->min_level) /
+ (priv->max_level - priv->min_level);
+ ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns,
+duty_cycle);
+ } else {
+ /* PWM driver will internally scale these like the above. */
+ ret = pwm_set_config(priv->pwm, priv->channel,
+priv->max_level - priv->min_level,
+priv->cur_level - priv->min_level);
+ }
if (ret)
return log_ret(ret);
@@ -213,10 +220,11 @@ static int pwm_backlight_ofdata_to_platdata(struct
udevice *dev)
log_debug("Cannot get PWM: ret=%d\n", ret);
return log_ret(ret);
}
- if (args.args_count < 2)
+ if (args.args_count < 1)
return log_msg_ret("Not enough arguments to pwm\n", -EINVAL);
priv->channel = args.args[0];
- priv->period_ns = args.args[1];
+ if (args.args_count > 1)
+ priv->period_ns = args.args[1];
if (args.args_count > 2)
priv->polarity = args.args[2];
diff --git a/include/pwm.h b/include/pwm.h
index 54ae3e64c310..97bda0856e6c 100644
--- a/include/pwm.h
+++ b/include/pwm.h
@@ -15,6 +15,10 @@ struct pwm_ops {
/**
* set_config() - Set the PWM configuration
*
+* Change both the PWM device's period and it's duty period if
+* possible. Otherwise, set an appropriate duty period that best
+* matches the given period_ns / duty_ns ratio for the device.
+*
* @dev:PWM device to update
* @channel:PWM channel to update
* @period_ns: PWM period in nanoseconds
@@ -49,6 +53,10 @@ struct pwm_ops {
/**
* pwm_set_config() - Set the PWM configuration
*
+ * Change both the PWM device's period and it's duty period if
+ * possible. Otherwise, set an appropriate duty period that best
+ * matches the given period_ns / duty_ns ratio for the device.
+ *
* @dev: PWM device to update
* @channel: PWM channel to update
* @period_ns: PWM period in nanoseconds
diff --git a/test/dm/pwm.c b/test/dm/pwm.c
index 0de6dba1ba64..b624cf3d6558 100644
--- a/test/dm/pwm.c
+++ b/test/dm/pwm.c
@@ -6,6 +6,7 @@
#include
#include
#include
+#include
#include
#include
#in
[PATCH 2/2] rockchip: gru: Allow setting up clocks in U-Boot proper
Commit fe974716326c ("rockchip: rk3288: Allow setting up clocks in
U-Boot proper") fixes some clock issues when chainloading U-Boot on
rk3288 chromebooks. Part of that change is still available in veyron's
board_early_init_r() function. Since chain-loading U-Boot proper from
vendor firmware is possible on gru boards as well, do the same thing for
them too.
Signed-off-by: Alper Nebi Yasak
---
board/google/gru/gru.c | 23 +++
configs/chromebook_bob_defconfig | 1 +
2 files changed, 24 insertions(+)
diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c
index 7dfbc3ac8676..441a1a376a9a 100644
--- a/board/google/gru/gru.c
+++ b/board/google/gru/gru.c
@@ -4,6 +4,7 @@
*/
#include
+#include
#include
#ifdef CONFIG_SPL_BUILD
@@ -31,3 +32,25 @@ int board_early_init_f(void)
return 0;
}
#endif
+
+#ifndef CONFIG_SPL_BUILD
+int board_early_init_r(void)
+{
+ struct udevice *clk;
+ int ret;
+
+ /*
+* This init is done in SPL, but when chain-loading U-Boot SPL will
+* have been skipped. Allow the clock driver to check if it needs
+* setting up.
+*/
+ ret = uclass_get_device_by_driver(UCLASS_CLK,
+ DM_GET_DRIVER(clk_rk3399), &clk);
+ if (ret) {
+ debug("%s: CLK init failed: %d\n", __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+#endif
diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig
index 4608892fb567..23b5a1a904e1 100644
--- a/configs/chromebook_bob_defconfig
+++ b/configs/chromebook_bob_defconfig
@@ -19,6 +19,7 @@ CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
--
2.28.0
[PATCH 1/2] rockchip: rk3399: Re-init clocks in U-Boot proper
It's possible to chainload U-Boot proper from the vendor firmware in
rk3399 chromebooks, but the way the vendor firmware sets up clocks is
somehow different than what U-Boot expects. This causes the display to
stay devoid of content even though vidconsole claims to work (with
patches in process of being upstreamed).
This is meant to be a rk3399 version of commit d3cb46aa8c41 ("rockchip:
Init clocks again when chain-loading") which can detect the discrepancy,
but this patch can not so it always re-inits.
Signed-off-by: Alper Nebi Yasak
---
The rk3288 version has rockchip_vop_set_clk in #ifndef CONFIG_BUILD_SPL,
and checks if that setup is already done before that's called. I think I
can do the #ifndef to avoid unnecessary re-inits for rk3399 as well, but
the vop clocks are set differently for each chip so I don't know how
correct that'd be.
The pmucru setup is #ifndef CONFIG_BUILD_SPL on rk3399, so I think I can
also check for that, but that's technically in a different driver and I
don't know how best to do that.
drivers/clk/rockchip/clk_rk3399.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/clk/rockchip/clk_rk3399.c
b/drivers/clk/rockchip/clk_rk3399.c
index 1ea41f3c5b2e..dd629c26b8f0 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -50,10 +50,9 @@ struct pll_div {
.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
-#if defined(CONFIG_SPL_BUILD)
static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2, 2);
-#else
+#if !defined(CONFIG_SPL_BUILD)
static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
#endif
@@ -1274,7 +1273,6 @@ static struct clk_ops rk3399_clk_ops = {
.disable = rk3399_clk_disable,
};
-#ifdef CONFIG_SPL_BUILD
static void rkclk_init(struct rockchip_cru *cru)
{
u32 aclk_div;
@@ -1352,11 +1350,9 @@ static void rkclk_init(struct rockchip_cru *cru)
hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
}
-#endif
static int rk3399_clk_probe(struct udevice *dev)
{
-#ifdef CONFIG_SPL_BUILD
struct rk3399_clk_priv *priv = dev_get_priv(dev);
#if CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -1365,7 +1361,6 @@ static int rk3399_clk_probe(struct udevice *dev)
priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
#endif
rkclk_init(priv->cru);
-#endif
return 0;
}
--
2.28.0
[PATCH 2/2] test: unit tests for print_freq(), print_size()
Provide unit tests for functions print_freq() and print_size().
Signed-off-by: Heinrich Schuchardt
---
v2:
add missing add missing test/lib/test_print.c
---
test/lib/Makefile | 1 +
test/lib/test_print.c | 71 +++
2 files changed, 72 insertions(+)
create mode 100644 test/lib/test_print.c
diff --git a/test/lib/Makefile b/test/lib/Makefile
index 22236f8587..15cd512506 100644
--- a/test/lib/Makefile
+++ b/test/lib/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_EFI_LOADER) += efi_device_path.o
obj-$(CONFIG_EFI_SECURE_BOOT) += efi_image_region.o
obj-y += hexdump.o
obj-y += lmb.o
+obj-y += test_print.o
obj-$(CONFIG_SSCANF) += sscanf.o
obj-y += string.o
obj-$(CONFIG_ERRNO_STR) += test_errno_str.o
diff --git a/test/lib/test_print.c b/test/lib/test_print.c
new file mode 100644
index 00..1d497d0041
--- /dev/null
+++ b/test/lib/test_print.c
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Tests for print functions
+ *
+ * Copyright 2020, Heinrich Schuchadt
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int test_print_freq(struct unit_test_state *uts,
+ uint64_t freq, char *expected)
+{
+ console_record_reset_enable();
+ print_freq(freq, ";\n");
+ gd->flags &= ~GD_FLG_RECORD;
+ console_record_readline(uts->actual_str, sizeof(uts->actual_str));
+ ut_asserteq_str(expected, uts->actual_str);
+ ut_assertok(ut_check_console_end(uts));
+ return 0;
+}
+
+static int lib_test_print_freq(struct unit_test_state *uts)
+{
+ ut_assertok(test_print_freq(uts, 321, "321 Hz;"));
+ ut_assertok(test_print_freq(uts, 4321, "4.32 kHz;"));
+ ut_assertok(test_print_freq(uts, 54321, "54.32 kHz;"));
+ ut_assertok(test_print_freq(uts, 654321, "654.32 kHz;"));
+ ut_assertok(test_print_freq(uts, 7654321, "7.66 MHz;"));
+ ut_assertok(test_print_freq(uts, 87654321, "87.66 MHz;"));
+ ut_assertok(test_print_freq(uts, 987654321, "987.66 MHz;"));
+ ut_assertok(test_print_freq(uts, 1987654321, "1.99 GHz;"));
+ ut_assertok(test_print_freq(uts, 54321987654321, "54321.99 GHz;"));
+ return 0;
+}
+
+LIB_TEST(lib_test_print_freq, 0);
+
+static int test_print_size(struct unit_test_state *uts,
+ uint64_t freq, char *expected)
+{
+ console_record_reset_enable();
+ print_size(freq, ";\n");
+ gd->flags &= ~GD_FLG_RECORD;
+ console_record_readline(uts->actual_str, sizeof(uts->actual_str));
+ ut_asserteq_str(expected, uts->actual_str);
+ ut_assertok(ut_check_console_end(uts));
+ return 0;
+}
+
+static int lib_test_print_size(struct unit_test_state *uts)
+{
+ ut_assertok(test_print_size(uts, 321, "321 Bytes;"));
+ ut_assertok(test_print_size(uts, 4321, "4.2 KiB;"));
+ ut_assertok(test_print_size(uts, 54321, "53 KiB;"));
+ ut_assertok(test_print_size(uts, 654321, "639 KiB;"));
+ ut_assertok(test_print_size(uts, 7654321, "7.3 MiB;"));
+ ut_assertok(test_print_size(uts, 87654321, "83.6 MiB;"));
+ ut_assertok(test_print_size(uts, 987654321, "941.9 MiB;"));
+ ut_assertok(test_print_size(uts, 1987654321, "1.9 GiB;"));
+ ut_assertok(test_print_size(uts, 54321987654321, "49.4 TiB;"));
+ return 0;
+}
+
+LIB_TEST(lib_test_print_size, 0);
--
2.28.0
[PATCH 0/2] lib: print_freq() should output kHz not KHz
Correct print_freq() for output of kHz. Provide unit tests for print_freq() and print_size(). v2: add missing test/lib/test_print.c Heinrich Schuchardt (2): lib: print_freq() should output kHz not KHz test: unit tests for print_freq(), print_size() include/display_options.h | 2 +- lib/display_options.c | 2 +- test/lib/Makefile | 1 + test/lib/test_print.c | 71 +++ 4 files changed, 74 insertions(+), 2 deletions(-) create mode 100644 test/lib/test_print.c -- 2.28.0
[PATCH 1/2] lib: print_freq() should output kHz not KHz
In the International System of Units (SI) the prefix kilo is abbreviated as
'k' not 'K'. 'K' is the symbol for Kelvin.
Signed-off-by: Heinrich Schuchardt
Reviewed-by: Stefan Roese
---
v2:
no change
---
include/display_options.h | 2 +-
lib/display_options.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/display_options.h b/include/display_options.h
index a0dabca2b8..049688e39e 100644
--- a/include/display_options.h
+++ b/include/display_options.h
@@ -24,7 +24,7 @@ void print_size(uint64_t size, const char *suffix);
/**
* print_freq() - Print a frequency with a suffix
*
- * Print frequencies as "x.xx GHz", "xxx KHz", etc as needed; allow for
+ * Print frequencies as "x.xx GHz", "xxx kHz", etc as needed; allow for
* optional trailing string (like "\n")
*
* @freq: Frequency to print in Hz
diff --git a/lib/display_options.c b/lib/display_options.c
index ea9977cc18..b2025eeb5c 100644
--- a/lib/display_options.c
+++ b/lib/display_options.c
@@ -54,7 +54,7 @@ void print_freq(uint64_t freq, const char *s)
{
unsigned long m = 0;
uint32_t f;
- static const char names[] = {'G', 'M', 'K'};
+ static const char names[] = {'G', 'M', 'k'};
unsigned long d = 1e9;
char c = 0;
unsigned int i;
--
2.28.0
[PATCH] video: rockchip: Restrict EDP, VOP, MIPI files to GPL-2.0
These files have a lot of code in common with their counterparts in coreboot, especially in their earlier revisions: U-Boot | coreboot --| drivers/video/rockchip/: | src/soc/rockchip/: - rk_edp.c (GPL-2.0+)| - common/edp.c (GPL-2.0-only) " | - rk3288/display.c (GPL-2.0-only) " | - rk3399/display.c (GPL-2.0-only) - rk_hdmi.h (GPL-2.0+)| (none) - rk_hdmi.c (GPL-2.0+)| - rk3288/hdmi.c (GPL-2.0-or-later) - rk3288_hdmi.c (GPL-2.0+)| - rk3288/hdmi.c (GPL-2.0-or-later) - rk3399_hdmi.c (GPL-2.0+)| (none) - rk_mipi.h (GPL-2.0+)| (none) - rk_mipi.c (GPL-2.0+)| - rk3399/mipi.c (GPL-2.0-only) - rk3288_mipi.c (GPL-2.0+)| - rk3399/mipi.c (GPL-2.0-only) - rk3399_mipi.c (GPL-2.0+)| - rk3399/mipi.c (GPL-2.0-only) - rk_lvds.c (GPL-2.0+)| (none) - rk_vop.h (GPL-2.0+)| (none) - rk_vop.c (GPL-2.0+)| - common/vop.c (GPL-2.0-only) - rk3288_vop.c (GPL-2.0+)| - common/vop.c (GPL-2.0-only) - rk3399_vop.c (GPL-2.0+)| (none) | arch/arm/include/asm/arch-rockchip/: | src/soc/rockchip/*/include/soc/*: - edp_rk3288.h (GPL-2.0+)| - common/.../edp.h (GPL-2.0-only) " | - rk3288/.../display.h (GPL-2.0-only) " | - rk3399/.../display.h (GPL-2.0-only) - vop_rk3288.h (GPL-2.0+)| - common/.../vop.h (GPL-2.0-only) Restrict the licenses to match coreboot's so that changes from coreboot can be imported to U-Boot as necessary. HDMI files are already 2.0+ there and rk_lvds.c has no counterpart, so keep them as is. Cc: Simon Glass Cc: Philipp Tomsich Cc: Eric Gao Cc: Jacob Chen Signed-off-by: Alper Nebi Yasak --- See Tom Rini's comment [1] and the preceding discussion for more context. [1] https://patchwork.ozlabs.org/comment/2554434/ arch/arm/include/asm/arch-rockchip/edp_rk3288.h | 2 +- arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 2 +- drivers/video/rockchip/rk3288_mipi.c| 2 +- drivers/video/rockchip/rk3288_vop.c | 2 +- drivers/video/rockchip/rk3399_mipi.c| 2 +- drivers/video/rockchip/rk3399_vop.c | 2 +- drivers/video/rockchip/rk_edp.c | 2 +- drivers/video/rockchip/rk_mipi.c| 2 +- drivers/video/rockchip/rk_mipi.h| 2 +- drivers/video/rockchip/rk_vop.c | 2 +- drivers/video/rockchip/rk_vop.h | 2 +- 11 files changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h index 105a335dabac..94e5bb674f2d 100644 --- a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h +++ b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2015 Google, Inc * Copyright 2014 Rockchip Inc. diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h index 872a158b714b..52446e97c691 100644 --- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h +++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2015 Google, Inc * Copyright 2014 Rockchip Inc. diff --git a/drivers/video/rockchip/rk3288_mipi.c b/drivers/video/rockchip/rk3288_mipi.c index b232ff0b76b2..8ac0125b502e 100644 --- a/drivers/video/rockchip/rk3288_mipi.c +++ b/drivers/video/rockchip/rk3288_mipi.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd * Author: Eric Gao diff --git a/drivers/video/rockchip/rk3288_vop.c b/drivers/video/rockchip/rk3288_vop.c index 68d1507cda46..9ec33e6e511b 100644 --- a/drivers/video/rockchip/rk3288_vop.c +++ b/drivers/video/rockchip/rk3288_vop.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH * Copyright (c) 2015 Google, Inc diff --git a/drivers/video/rockchip/rk3399_mipi.c b/drivers/video/rockchip/rk3399_mipi.c index 113708d97e5a..e5534c36e6ef 100644 --- a/drivers/video/rockchip/rk3399_mipi.c +++ b/drivers/video/rockchip/rk3399_mipi.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-Lic
Pull request: u-boot-sunxi/master
Hi Tom, Please pull this PR. Summary: - sun8i emac changes (Andre) - SCP firmware (Samuel) Travis-CI: https://travis-ci.org/github/openedev/u-boot/builds/738083734 The following changes since commit 7ec87e4192215815b658c3f8b34e4be010103149: Merge tag 'u-boot-atmel-2021.01-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel (2020-10-19 09:29:05 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi master for you to fetch changes up to 194923246c199bc6a4baa2ffcda1e08677b6f07c: sun50i: a64: A64-Teres-I board detect builtin keyboard (2020-10-22 12:03:34 +0530) Andre Przywara (15): net: sun8i-emac: Bail out on PHY error net: sun8i_emac: Don't hand out TX descriptor too early net: sun8i_emac: Simplify mdio_read/mdio_write functions net: sun8i_emac: Remove pointless wrapper functions net: sun8i_emac: Name magic bits and simplify read-modify-write calls net: sun8i_emac: Improve cache maintenance on RX descriptor init net: sun8i_emac: Reduce cache maintenance on TX descriptor init net: sun8i_emac: Drop unneeded cache invalidation before sending net: sun8i_emac: Wrap and simplify cache maintenance operations net: sun8i_emac: Fix overlong lines net: sun8i_emac: Fix MAC soft reset net: sun8i_emac: Simplify and fix error handling for RX net: sun8i-emac: Make internal PHY handling more robust net: sun8i-emac: Lower MDIO frequency sunxi: Pine-H64: Explicitly enable PHY regulator Heinrich Schuchardt (1): arm: sunxi: increase SYS_MALLOC_F_LEN Icenowy Zheng (1): sunxi: make V3s DRAM initialization more proper Jonas Smedegaard (3): git-mailrc: Update email address of Maxime Ripard sunxi: Enable ethernet on newer Olimex OLinuXino-A20-Lime2-eMMC sun50i: a64: A64-Teres-I board detect builtin keyboard Samuel Holland (9): Makefile: Only define u-boot.itb rule when applicable binman: Only write FDT once per node sunxi: binman: Fix spacing between nodes sunxi: binman: Provide a default BL31 filename sunxi: binman: Use a macro for the BL31 load address spl: fit: Minimally parse OS properties with FIT_IMAGE_TINY sunxi: binman: Update FIT component descriptions binman: Add support for SCP firmware sunxi: binman: Add support for including SCP firmware Kconfig| 2 +- Makefile | 3 + arch/arm/dts/sunxi-u-boot.dtsi | 43 ++- arch/arm/include/asm/arch-sunxi/cpu.h | 1 + arch/arm/mach-sunxi/dram_sunxi_dw.c| 91 +- board/sunxi/README.sunxi64 | 47 ++- common/spl/Kconfig | 4 +- common/spl/spl_fit.c | 17 +- configs/A20-OLinuXino-Lime2-eMMC_defconfig | 2 + configs/pine_h64_defconfig | 1 + configs/teres_i_defconfig | 1 + doc/git-mailrc | 2 +- drivers/net/sun8i_emac.c | 457 + tools/binman/README.entries| 4 +- tools/binman/etype/fit.py | 12 +- tools/binman/etype/scp.py | 19 ++ tools/binman/ftest.py | 7 + tools/binman/missing-blob-help | 4 + tools/binman/test/172_scp.dts | 16 + 19 files changed, 446 insertions(+), 287 deletions(-) create mode 100644 tools/binman/etype/scp.py create mode 100644 tools/binman/test/172_scp.dts
Re: [patch 4/8] RFC: drivers/video/rockchip/rk_edp.c: Change clock rate
On 25/09/2020 21:36, Arnaud Patard (Rtp) wrote:
> The current code is setting the clock rate to 19200, but
> due to the current device-tree configuration and linux code,
> it should rather be 1.
>
This looks like it's ACLK_VOP to me. FYI, coreboot sets it to 192 MHz
for rk3288 and 200 MHz for rk3399. But from what I can understand the
U-Boot rk3399 clock driver just ignores this call and sets it to 198 MHz
anyway while setting DCLK_VOP...
> Signed-off-by: Arnaud Patard
> Index: u-boot/drivers/video/rockchip/rk_edp.c
> ===
> --- u-boot.orig/drivers/video/rockchip/rk_edp.c
> +++ u-boot/drivers/video/rockchip/rk_edp.c
> @@ -1075,7 +1078,7 @@ static int rk_edp_probe(struct udevice *
> }
> ret = clk_get_by_index(uc_plat->src_dev, 0, &clk);
> if (ret >= 0) {
> - ret = clk_set_rate(&clk, 19200);
> + ret = clk_set_rate(&clk, 1);
> clk_free(&clk);
> }
> if (ret < 0) {
>
>
Re: [PATCH] ARM: dts: stm32: Reinstate card detect behavior on DHSOM
On 10/22/20 7:17 PM, Patrick DELAUNAY wrote:
> Hi Marek,
Hi,
>> From: Marek Vasut
>> Sent: lundi 19 octobre 2020 23:38
>>
>> The cd-gpios with (GPIO_ACTIVE_LOW | GPIO_PULL_UP) gpio is thus far
>> unsupported, reinstate the old cd-gpios behavior until this handling is fully
>> implemented. This permits the DHSOM to boot from SD again, without this patch
>> the card detect fails.
>
> It is strange if it is not working... I will check why the configuration is
> not managed
> correctly in stm32 gpio/pincontrol driver.
>
>> Signed-off-by: Marek Vasut
>> Cc: Patrick Delaunay
>> Cc: Patrice Chotard
>> ---
>> arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
>> b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
>> index 92345b7ba3..73bb5f1c6d 100644
>> --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
>> +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
>> @@ -265,6 +265,9 @@
>>
>> &sdmmc1 {
>> u-boot,dm-spl;
>> +broken-cd;
>> +/delete-property/ cd-gpios;
>> +/delete-property/ disable-wp;
>> };
>>
>> &sdmmc1_b4_pins_a {
>> --
>> 2.28.0
>
> Reviewed-by: Patrick Delaunay
>
> But I will be try to fix the issue before to accept this patch.
>
> I will merge it only if I can't found the root cause for v2020.01-rc2
Do you not see the same behavior on EV/DK ?
btw it is bugged in SPL.
Re: [PATCH 10/10] arm64: versal: Set initrd_high to as high as possible
On Thu, Oct 22, 2020 at 12:32:22PM +0200, Michal Simek wrote:
> From: Siva Durga Prasad Paladugu
>
> This patch is setting up the initrd_high to as high as possible by leaving
> max stack size for u-boot so that bigger rootfs can also be loaded by
> u-boot for booting kernel.
>
> Signed-off-by: Siva Durga Prasad Paladugu
> Signed-off-by: Michal Simek
> ---
>
> board/xilinx/versal/board.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
> index 912c1143a8ad..09229e0a75a4 100644
> --- a/board/xilinx/versal/board.c
> +++ b/board/xilinx/versal/board.c
> @@ -217,6 +217,10 @@ int board_late_init(void)
>
> env_set("boot_targets", new_targets);
>
> + initrd_hi = gd->start_addr_sp - CONFIG_STACK_SIZE;
> + initrd_hi = round_down(initrd_hi, SZ_16M);
> + env_set_addr("initrd_high", (void *)initrd_hi);
> +
> return board_late_init_xilinx();
> }
My concern here (and also microblaze-generic, after some grepping) is
that wouldn't it be best to set bootm_size and let fdt and initrd be
relocated as needed?
--
Tom
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Re: [PATCH] ARM: am335x: Add phyBOARD REGOR support
On Thu, Oct 22, 2020 at 04:51:57PM +0200, Parthiban Nallathambi wrote:
> phyBOARD-REGOR is based on phyCORE AM335x R2 SoM (PCL060).
>
> CPU : AM335X-GP rev 2.1
> Model: Phytec AM335x phyBOARD-REGOR
> DRAM: 512 MiB
> NAND: 512 MiB
> MMC: OMAP SD/MMC: 0
> eth0: ethernet@4a10
>
> Working:
> - Eth0
> - i2C
> - MMC/SD
> - NAND
> - UART
> - USB (host)
>
> Device trees were taken from Linux mainline:
> commit c4d6fe731176 ("Linux 5.9.0")
>
> Signed-off-by: Parthiban Nallathambi
> ---
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/am335x-regor-rdk-u-boot.dtsi | 31 +
> arch/arm/dts/am335x-regor-rdk.dts | 24
> arch/arm/dts/am335x-regor.dtsi| 202
> ++
> configs/phycore-am335x-r2-regor_defconfig | 88 +
You need to update the relevant for TARGET_PHYCORE_AM335X_R2 MAINTAINERS
file to list this new config entry, thanks!
--
Tom
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RE: [PATCH] ARM: dts: stm32: Reinstate card detect behavior on DHSOM
Hi Marek,
> From: Marek Vasut
> Sent: lundi 19 octobre 2020 23:38
>
> The cd-gpios with (GPIO_ACTIVE_LOW | GPIO_PULL_UP) gpio is thus far
> unsupported, reinstate the old cd-gpios behavior until this handling is fully
> implemented. This permits the DHSOM to boot from SD again, without this patch
> the card detect fails.
It is strange if it is not working... I will check why the configuration is not
managed
correctly in stm32 gpio/pincontrol driver.
> Signed-off-by: Marek Vasut
> Cc: Patrick Delaunay
> Cc: Patrice Chotard
> ---
> arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
> b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
> index 92345b7ba3..73bb5f1c6d 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
> @@ -265,6 +265,9 @@
>
> &sdmmc1 {
> u-boot,dm-spl;
> + broken-cd;
> + /delete-property/ cd-gpios;
> + /delete-property/ disable-wp;
> };
>
> &sdmmc1_b4_pins_a {
> --
> 2.28.0
Reviewed-by: Patrick Delaunay
But I will be try to fix the issue before to accept this patch.
I will merge it only if I can't found the root cause for v2020.01-rc2
Thanks
Patrick
[PATCH] ARM: am335x: Add phyBOARD REGOR support
phyBOARD-REGOR is based on phyCORE AM335x R2 SoM (PCL060).
CPU : AM335X-GP rev 2.1
Model: Phytec AM335x phyBOARD-REGOR
DRAM: 512 MiB
NAND: 512 MiB
MMC: OMAP SD/MMC: 0
eth0: ethernet@4a10
Working:
- Eth0
- i2C
- MMC/SD
- NAND
- UART
- USB (host)
Device trees were taken from Linux mainline:
commit c4d6fe731176 ("Linux 5.9.0")
Signed-off-by: Parthiban Nallathambi
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/am335x-regor-rdk-u-boot.dtsi | 31 +
arch/arm/dts/am335x-regor-rdk.dts | 24
arch/arm/dts/am335x-regor.dtsi| 202 ++
configs/phycore-am335x-r2-regor_defconfig | 88 +
5 files changed, 347 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/am335x-regor-rdk-u-boot.dtsi
create mode 100644 arch/arm/dts/am335x-regor-rdk.dts
create mode 100644 arch/arm/dts/am335x-regor.dtsi
create mode 100644 configs/phycore-am335x-r2-regor_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b195723f16..4f67108e7f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -347,7 +347,8 @@ dtb-$(CONFIG_AM33XX) += \
am335x-sl50.dtb \
am335x-base0033.dtb \
am335x-guardian.dtb \
- am335x-wega-rdk.dtb
+ am335x-wega-rdk.dtb \
+ am335x-regor-rdk.dtb
dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb\
am43x-epos-evm.dtb \
am437x-idk-evm.dtb \
diff --git a/arch/arm/dts/am335x-regor-rdk-u-boot.dtsi
b/arch/arm/dts/am335x-regor-rdk-u-boot.dtsi
new file mode 100644
index 00..1ddd715875
--- /dev/null
+++ b/arch/arm/dts/am335x-regor-rdk-u-boot.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Linumiz
+ */
+
+/ {
+ chosen {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ bootargs = "console=ttyO0,115200 earlyprintk";
+ stdout-path = &uart0;
+ };
+
+ ocp {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&i2c0 {
+ u-boot,dm-pre-reloc;
+};
+
+&uart0 {
+ u-boot,dm-pre-reloc;
+};
+
+&mmc1 {
+ u-boot,dm-pre-reloc;
+ cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+};
diff --git a/arch/arm/dts/am335x-regor-rdk.dts
b/arch/arm/dts/am335x-regor-rdk.dts
new file mode 100644
index 00..66a1360b83
--- /dev/null
+++ b/arch/arm/dts/am335x-regor-rdk.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Phytec Messtechnik GmbH
+ * Author: Teresa Remmet
+ *
+ */
+
+/dts-v1/;
+
+#include "am335x-phycore-som.dtsi"
+#include "am335x-regor.dtsi"
+
+/* SoM */
+&gpmc {
+ status = "okay";
+};
+
+&i2c_eeprom {
+ status = "okay";
+};
+
+&serial_flash {
+ status = "okay";
+};
diff --git a/arch/arm/dts/am335x-regor.dtsi b/arch/arm/dts/am335x-regor.dtsi
new file mode 100644
index 00..86b3f07429
--- /dev/null
+++ b/arch/arm/dts/am335x-regor.dtsi
@@ -0,0 +1,202 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Phytec Messtechnik GmbH
+ * Author: Teresa Remmet
+ *
+ */
+
+/ {
+ model = "Phytec AM335x phyBOARD-REGOR";
+ compatible = "phytec,am335x-regor", "phytec,am335x-phycore-som",
"ti,am33xx";
+
+ vcc3v3: fixedregulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ };
+
+ /* User IO */
+ user_leds: user_leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&user_leds_pins>;
+
+ run_stop-led {
+ gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "gpio";
+ default-state = "off";
+ };
+
+ error-led {
+ gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "gpio";
+ default-state = "off";
+ };
+ };
+};
+
+/* User Leds */
+&am33xx_pinmux {
+ user_leds_pins: pinmux_user_leds {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8E0, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
/* lcd_hsync.gpio2_22 */
+ AM33XX_IOPAD(0x994, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
/* mcasp0_fsx.gpio3_15 */
+ >;
+ };
+};
+
+/* CAN Busses */
+&am33xx_pinmux {
+ dcan1_pins: pinmux_dcan1 {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x968, PIN_OUTPUT_PULLUP | MUX_MODE2)
/* uart0_ctsn.d_can1_tx */
+ AM33XX_IOPAD(0x96C, PIN_INPUT_PULLUP | MUX_MODE2)
/* uart0_rtsn.d_can1_rx */
+ >;
+ };
+};
+
+&dcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&dcan1_pins>;
+ status = "okay";
+
Re: [PATCH 4/8] sunxi: board: Add PinePhone DT selection logic
On Wed, Oct 21, 2020 at 08:38:21PM -0500, Samuel Holland wrote: > On 10/21/20 1:56 PM, Jagan Teki wrote: > > On Thu, Sep 3, 2020 at 10:37 AM Samuel Holland wrote: > >> > >> There are two different publicly-released revisions of the PinePhone > >> hardware, versions 1.1 and 1.2; and they need different device trees. > >> Since some GPIO pins were rerouted, we can use that to distinguish > >> between them. > >> > >> Signed-off-by: Samuel Holland > >> --- > >> arch/arm/mach-sunxi/Kconfig | 7 +++ > >> board/sunxi/board.c | 21 + > >> 2 files changed, 28 insertions(+) > >> > >> diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig > >> index be0822bfb7d..8421f3b6854 100644 > >> --- a/arch/arm/mach-sunxi/Kconfig > >> +++ b/arch/arm/mach-sunxi/Kconfig > >> @@ -1010,4 +1010,11 @@ config PINE64_DT_SELECTION > >> option, the device tree selection code specific to Pine64 which > >> utilizes the DRAM size will be enabled. > >> > >> +config PINEPHONE_DT_SELECTION > >> + bool "Enable PinePhone device tree selection code" > >> + depends on MACH_SUN50I > >> + help > >> + Enable this option to automatically select the device tree for > >> the > >> + correct PinePhone hardware revision during boot. > >> + > >> endif > >> diff --git a/board/sunxi/board.c b/board/sunxi/board.c > >> index fb0d5bf4743..3d64ed18664 100644 > >> --- a/board/sunxi/board.c > >> +++ b/board/sunxi/board.c > >> @@ -27,6 +27,7 @@ > >> #include > >> #include > >> #include > >> +#include > >> #include > >> #include > >> #include > >> @@ -920,6 +921,26 @@ int board_fit_config_name_match(const char *name) > >> best_dt_name = "sun50i-a64-pine64"; > >> } > >> #endif > >> +#ifdef CONFIG_PINEPHONE_DT_SELECTION > > > > Look like these board detection CONFIG items are keep on increasing. > > Better to have something like CONFIG_SUNXI_DT_SELECTION for all dt > > selection code. > > Are you sure? This is in SPL, where we are always running out of space. And a > single SPL binary cannot work on both Pine A64 and PinePhone anyway, since > they > have different DRAM types. I think the space savings is worth the cost of the > extra config symbol (especially if more boards need special handling in the > future). I agree, it will save some space and it's not like it's unmaintainable at the moment. Maxime signature.asc Description: PGP signature
Re: [PULL] Pull request for u-boot master = u-boot-stm32-20201021
On Thu, Oct 22, 2020 at 07:32:44AM +, Patrick DELAUNAY wrote: > Hi Tom, > > Please pull the STM32 related patches for u-boot/master, v2021.01: > u-boot-stm32-20201021 > > - Activate CMD_EXPORTENV/CMD_IMPORTENV/CMD_ELF for STM32MP15 defconfig > - Fix stm32prog command: parsing of FlashLayout without partition > - Update MAINTAINERS for ARM STM STM32MP > - Manage eth1addr on dh board with KS8851 > - Limit size of cacheable DDR in pre-reloc stage in stm32mp1 > - Use mmc_of_parse() to read host capabilities in mmc:sdmmc2 driver > > CI status: > https://gitlab.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/5066 > > Thanks, > Patrick > > git request-pull origin/mastert > https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git u-boot-stm32-20201021 > > The following changes since commit 7ec87e4192215815b658c3f8b34e4be010103149: > > Merge tag 'u-boot-atmel-2021.01-b' of > https://gitlab.denx.de/u-boot/custodians/u-boot-atmel (2020-10-19 09:29:05 > -0400) > > are available in the Git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git > tags/u-boot-stm32-20201021 > > for you to fetch changes up to 53de79fecc53338b544b4d2c2d88daba9d82b007: > > stm32mp: stm32prog: accept device without partition (2020-10-21 18:12:20 > +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [GIT PULL] SoCFPGA fix for v2021.01
On Thu, Oct 22, 2020 at 03:13:05AM +, Tan, Ley Foon wrote: > Hi Tom > > Please pull one fix for 2021.01. > > Travis CI build: https://travis-ci.org/github/lftan/u-boot/builds/737650124 > > Regards > Ley Foon > > The following changes since commit 7ec87e4192215815b658c3f8b34e4be010103149: > > Merge tag 'u-boot-atmel-2021.01-b' of > https://gitlab.denx.de/u-boot/custodians/u-boot-atmel (2020-10-19 09:29:05 > -0400) > > are available in the Git repository at: > > https://github.com/lftan/u-boot.git 2021.01-rc > > for you to fetch changes up to b0b08ce0b7b13520412f1768a0d3290d3c5f50fb: > > arm: socfpga: fix Gen5 enable of EMAC via FPGA (2020-10-21 11:45:54 +0800) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] mx6: peripheral clock from oscillator
On 19/10/20, Jorge Ramirez-Ortiz wrote:
> In order to be able to run the I2C bus at 400Khz, the chip errata[1]
> recommends that the peripheral clock runs out of the 24MHz oscillator.
>
> [1] Rev 2, 10/2019, ERR007805
>
> Signed-off-by: Jorge Ramirez-Ortiz
> ---
> arch/arm/mach-imx/mx6/soc.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
> index e129286065..f498c93b00 100644
> --- a/arch/arm/mach-imx/mx6/soc.c
> +++ b/arch/arm/mach-imx/mx6/soc.c
> @@ -26,6 +26,8 @@
> #include
> #include
>
> +#define ERRATA_ERR007805 (is_mx6dl() || is_mx6solo() || is_mx6ull())
> +
> struct scu_regs {
> u32 ctrl;
> u32 config;
> @@ -469,7 +471,7 @@ int arch_cpu_init(void)
> }
>
> /* Set perclk to source from OSC 24MHz */
> - if (is_mx6sl())
> + if (is_mx6sl() || ERRATA_ERR007805)
> setbits_le32(&ccm->cscmr1, MXC_CCM_CSCMR1_PER_CLK_SEL_MASK);
>
> imx_wdog_disable_powerdown(); /* Disable PDE bit of WMCR register */
> --
all ok with this ?
> 2.17.1
>
[PATCH v4 12/13] x86: galileo: Use devicetree for SMBIOS settings
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/dts/galileo.dts| 18 ++
board/intel/galileo/Kconfig | 11 ---
2 files changed, 18 insertions(+), 11 deletions(-)
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index 5de4568679a..18d6cf625e9 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -164,4 +164,22 @@
};
};
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ product = "GalileoGen2";
+ };
+
+ baseboard {
+ product = "GalileoGen2";
+ };
+
+ chassis {
+ product = "GalileoGen2";
+ };
+ };
+ };
+
};
diff --git a/board/intel/galileo/Kconfig b/board/intel/galileo/Kconfig
index 1416c891e86..fb8d94fb5b1 100644
--- a/board/intel/galileo/Kconfig
+++ b/board/intel/galileo/Kconfig
@@ -22,15 +22,4 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select BOARD_ROMSIZE_KB_1024
select SPI_FLASH_WINBOND
-config SMBIOS_PRODUCT_NAME
- default "GalileoGen2"
- help
- Override the default product name U-Boot reports in the SMBIOS
- table, to be compatible with the Intel provided UEFI BIOS, as
- Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and
- drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of
- it to do different board level configuration.
-
- This can be "Galileo" for GEN1 Galileo board.
-
endif
--
2.29.0.rc1.297.gfa9743e501-goog
[PATCH v4 13/13] smbios: Drop the unused Kconfig options
Now that we can use devicetree to specify this information, drop the old CONFIG options. Signed-off-by: Simon Glass --- (no changes since v3) Changes in v3: - Add onto the sysinfo binding configs/clearfog_gt_8k_defconfig| 2 -- configs/mt7622_rfb_defconfig| 1 - configs/mvebu_db_armada8k_defconfig | 2 -- configs/r8a774a1_beacon_defconfig | 2 -- configs/r8a77970_eagle_defconfig| 2 -- configs/r8a77980_condor_defconfig | 2 -- configs/r8a77990_ebisu_defconfig| 2 -- configs/r8a77995_draak_defconfig| 2 -- configs/rcar3_salvator-x_defconfig | 2 -- configs/rcar3_ulcb_defconfig| 2 -- lib/Kconfig | 16 - lib/smbios.c| 35 - 12 files changed, 14 insertions(+), 56 deletions(-) diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index 552df3a8b80..9bb1f212a70 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -12,7 +12,6 @@ CONFIG_DM_GPIO=y CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=2 CONFIG_DEFAULT_DEVICE_TREE="armada-8040-clearfog-gt-8k" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y @@ -78,4 +77,3 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig index a6089d6cf6a..ccf926e1040 100644 --- a/configs/mt7622_rfb_defconfig +++ b/configs/mt7622_rfb_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_TEXT_BASE=0x41e0 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEFAULT_DEVICE_TREE="mt7622-rfb" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="mt7622-rfb" CONFIG_LOGLEVEL=7 diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index a88d5cc98bd..5d8a1b655cd 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -11,7 +11,6 @@ CONFIG_ENV_SECT_SIZE=0x1 CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=2 CONFIG_DEFAULT_DEVICE_TREE="armada-8040-db" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y @@ -72,4 +71,3 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a774a1_beacon_defconfig b/configs/r8a774a1_beacon_defconfig index 5d564d82c2f..2f45edd92ec 100644 --- a/configs/r8a774a1_beacon_defconfig +++ b/configs/r8a774a1_beacon_defconfig @@ -8,7 +8,6 @@ CONFIG_RCAR_GEN3=y CONFIG_TARGET_BEACON_RZG2M=y # CONFIG_SPL is not set CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-beacon-rzg2m-kit" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set @@ -64,4 +63,3 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index a7774842353..9dbe0e1d5b4 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_EAGLE=y CONFIG_DEFAULT_DEVICE_TREE="r8a77970-eagle-u-boot" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y @@ -74,4 +73,3 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index 4e457234ed0..dbe2912779c 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_CONDOR=y CONFIG_DEFAULT_DEVICE_TREE="r8a77980-condor-u-boot" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y @@ -75,4 +74,3 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 4667284bb37..cb75b5c3a60 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -10,7 +10,6 @@ CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_EBISU=y CONFIG_DEFAULT_DEVICE_TREE="r8a77990-ebisu-u-boot" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y @@ -84,4 +83,3 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index 5cc0f608da2..46a7314fa90 100644 --- a/configs/
[PATCH v4 11/13] arm64: mvebu: Use devicetree for SMBIOS settings on uDPU
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/arm/dts/armada-3720-uDPU-u-boot.dtsi | 20
configs/uDPU_defconfig| 3 ++-
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi
b/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi
index ef178bdc86e..fdad90ad123 100644
--- a/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi
+++ b/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi
@@ -1,5 +1,25 @@
// SPDX-License-Identifier: GPL-2.0+
+/ {
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ product = "uDPU";
+ };
+
+ baseboard {
+ product = "uDPU";
+ };
+
+ chassis {
+ product = "uDPU";
+ };
+ };
+ };
+};
+
&spi0 {
u-boot,dm-pre-reloc;
diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig
index dfab2b306bb..ec97489523d 100644
--- a/configs/uDPU_defconfig
+++ b/configs/uDPU_defconfig
@@ -11,7 +11,6 @@ CONFIG_DM_GPIO=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=25804800
CONFIG_DEFAULT_DEVICE_TREE="armada-3720-uDPU"
-CONFIG_SMBIOS_PRODUCT_NAME="uDPU"
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
@@ -97,3 +96,5 @@ CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_LZO=y
CONFIG_SPL_LZO=y
+CONFIG_SYSINFO=y
+CONFIG_SYSINFO_SMBIOS=y
--
2.29.0.rc1.297.gfa9743e501-goog
[PATCH v4 10/13] odroid-c2: Use devicetree for SMBIOS settings
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi | 23
configs/odroid-c2_defconfig | 4 ++--
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
b/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
index 484b40504dc..90087b00dba 100644
--- a/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
+++ b/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
@@ -6,6 +6,29 @@
#include "meson-gx-u-boot.dtsi"
+/ {
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ manufacturer = "Hardkernel Co., Ltd.";
+ product = "ODROID-C2";
+ };
+
+ baseboard {
+ manufacturer = "Hardkernel Co., Ltd.";
+ product = "ODROID-C2";
+ };
+
+ chassis {
+ manufacturer = "Hardkernel Co., Ltd.";
+ product = "ODROID-C2";
+ };
+ };
+ };
+};
+
&usb0 {
status = "disabled";
};
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index 5fdce3b4638..f2c9fa72778 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -8,7 +8,6 @@ CONFIG_DEBUG_UART_BASE=0xc81004c0
CONFIG_DEBUG_UART_CLOCK=2400
CONFIG_IDENT_STRING=" odroid-c2"
CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2"
-CONFIG_SMBIOS_PRODUCT_NAME="ODROID-C2"
CONFIG_DEBUG_UART=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
@@ -64,4 +63,5 @@ CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
CONFIG_OF_LIBFDT_OVERLAY=y
-CONFIG_SMBIOS_MANUFACTURER="Hardkernel Co., Ltd."
+CONFIG_SYSINFO=y
+CONFIG_SYSINFO_SMBIOS=y
--
2.29.0.rc1.297.gfa9743e501-goog
[PATCH v4 08/13] rockchip: Use devicetree for SMBIOS settings
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/arm/dts/rk3328-roc-cc-u-boot.dtsi| 21 +
arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 23 +++
arch/arm/dts/rk3328-rock64-u-boot.dtsi| 21 +
arch/arm/dts/rk3368-lion-u-boot.dtsi | 20
configs/lion-rk3368_defconfig | 4 ++--
configs/roc-cc-rk3328_defconfig | 4 ++--
configs/rock-pi-e-rk3328_defconfig| 4 ++--
configs/rock64-rk3328_defconfig | 4 ++--
8 files changed, 93 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
index e929d86e306..08806dfc0f9 100644
--- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
@@ -9,6 +9,27 @@
chosen {
u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
};
+
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ manufacturer = "firefly";
+ product = "roc-rk3328-cc";
+ };
+
+ baseboard {
+ manufacturer = "firefly";
+ product = "roc-rk3328-cc";
+ };
+
+ chassis {
+ manufacturer = "firefly";
+ product = "roc-rk3328-cc";
+ };
+ };
+ };
};
&gpio0 {
diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
index bf5b1f3adcb..4fc055eacb7 100644
--- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
@@ -6,6 +6,29 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-ddr3-666.dtsi"
+/ {
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ manufacturer = "radxa";
+ product = "rock-pi-e_rk3328";
+ };
+
+ baseboard {
+ manufacturer = "radxa";
+ product = "rock-pi-e_rk3328";
+ };
+
+ chassis {
+ manufacturer = "radxa";
+ product = "rock-pi-e_rk3328";
+ };
+ };
+ };
+};
+
&gpio0 {
u-boot,dm-spl;
};
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 7340ef95f1d..2af32aea05a 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -9,6 +9,27 @@
chosen {
u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
};
+
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ manufacturer = "pine64";
+ product = "rock64_rk3328";
+ };
+
+ baseboard {
+ manufacturer = "pine64";
+ product = "rock64_rk3328";
+ };
+
+ chassis {
+ manufacturer = "pine64";
+ product = "rock64_rk3328";
+ };
+ };
+ };
};
&gpio0 {
diff --git a/arch/arm/dts/rk3368-lion-u-boot.dtsi
b/arch/arm/dts/rk3368-lion-u-boot.dtsi
index edc93e438f9..6d54214de9c 100644
--- a/arch/arm/dts/rk3368-lion-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-lion-u-boot.dtsi
@@ -14,6 +14,26 @@
u-boot,spl-boot-order = &emmc, &sdmmc;
};
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ manufacturer = "rockchip";
+ product = "sheep_rk3368";
+ };
+
+ baseboard {
+ manufacturer = "rockchip";
+ product = "sheep_rk3368";
+ };
+
+ chassis {
+ manufacturer = "rockchip";
+ product = "sheep_rk3368";
+ };
+ };
+ };
};
&pinctrl {
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index b5b7a0b2daa..3287bd1c05e 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -16,7 +16,6 @@ CONFIG_DEBUG_UART_CLOCK=24
[PATCH v4 01/13] board: Rename uclass to sysinfo
This uclass is intended to provide a way to obtain information about a
U-Boot board. But the concept of a U-Boot 'board' is the whole system,
not just one circuit board, meaning that 'board' is something of a
misnomer for this uclass.
In addition, the name 'board' is a bit overused in U-Boot and we want to
use the same uclass to provide SMBIOS information.
The obvious name is 'system' but that is so vague as to be meaningless.
Use 'sysinfo' instead, since this uclass is aimed at providing information
on the system.
Rename everything accordingly.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi | 2 +-
arch/sandbox/dts/test.dts | 8 +-
board/gdsys/common/cmd_ioloop.c | 12 +--
board/gdsys/mpc8308/gazerbeam.c | 47 ++-
board/google/chromebook_coral/coral.c | 2 +-
common/spl/spl_fit.c | 15 ++--
configs/chromebook_coral_defconfig| 2 +-
configs/gazerbeam_defconfig | 4 +-
configs/sandbox64_defconfig | 8 +-
configs/sandbox_defconfig | 8 +-
configs/sandbox_flattree_defconfig| 4 +-
configs/sandbox_spl_defconfig | 4 +-
.../gdsys,sysinfo_gazerbeam.txt} | 8 +-
drivers/Kconfig | 4 +-
drivers/Makefile | 2 +-
drivers/board/board-uclass.c | 71
drivers/{board => sysinfo}/Kconfig| 16 ++--
drivers/{board => sysinfo}/Makefile | 6 +-
drivers/{board => sysinfo}/gazerbeam.c| 74 -
drivers/{board => sysinfo}/gazerbeam.h| 0
drivers/{board => sysinfo}/sandbox.c | 50 ++--
drivers/{board => sysinfo}/sandbox.h | 0
drivers/sysinfo/sysinfo-uclass.c | 71
drivers/timer/mpc83xx_timer.c | 10 +--
include/dm/uclass-id.h| 2 +-
include/{board.h => sysinfo.h}| 80 +--
test/dm/Makefile | 2 +-
test/dm/board.c | 59 --
test/dm/sysinfo.c | 59 ++
29 files changed, 318 insertions(+), 312 deletions(-)
rename doc/device-tree-bindings/{board/gdsys,board_gazerbeam.txt =>
sysinfo/gdsys,sysinfo_gazerbeam.txt} (90%)
delete mode 100644 drivers/board/board-uclass.c
rename drivers/{board => sysinfo}/Kconfig (65%)
rename drivers/{board => sysinfo}/Makefile (50%)
rename drivers/{board => sysinfo}/gazerbeam.c (69%)
rename drivers/{board => sysinfo}/gazerbeam.h (100%)
rename drivers/{board => sysinfo}/sandbox.c (50%)
rename drivers/{board => sysinfo}/sandbox.h (100%)
create mode 100644 drivers/sysinfo/sysinfo-uclass.c
rename include/{board.h => sysinfo.h} (65%)
delete mode 100644 test/dm/board.c
create mode 100644 test/dm/sysinfo.c
diff --git a/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi
b/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi
index 1c4977f20f3..3439737fa3f 100644
--- a/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi
+++ b/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi
@@ -32,7 +32,7 @@
};
board {
- compatible = "gdsys,board_gazerbeam";
+ compatible = "gdsys,sysinfo-gazerbeam";
csb = <&board_soc>;
serdes = <&SERDES>;
rxaui0 = <&RXAUI0_0>;
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index fa84b2c10f3..0f0d69da50e 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1070,10 +1070,6 @@
compatible = "sandbox,sandbox_osd";
};
- board {
- compatible = "sandbox,board_sandbox";
- };
-
sandbox_tee {
compatible = "sandbox,tee";
};
@@ -1209,6 +1205,10 @@
reset-names = "valid", "no_mask", "out_of_range";
};
+ sysinfo {
+ compatible = "sandbox,sysinfo-sandbox";
+ };
+
some_regmapped-bus {
#address-cells = <0x1>;
#size-cells = <0x1>;
diff --git a/board/gdsys/common/cmd_ioloop.c b/board/gdsys/common/cmd_ioloop.c
index 3ea2bec8ebd..658756d9842 100644
--- a/board/gdsys/common/cmd_ioloop.c
+++ b/board/gdsys/common/cmd_ioloop.c
@@ -16,7 +16,7 @@
#include
#include
#include
-#include
+#include
#include "../../../drivers/misc/gdsys_soc.h"
#include "../../../drivers/misc/gdsys_ioep.h"
@@ -506,11 +506,11 @@ int do_ioloop(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
int do_iodev(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
struct udevice *ioep = NULL;
- struct udevice *board;
+ struct udevice *sysinfo;
char name[8];
int ret;
- if (board_get(&board))
+ if (sysinfo_get(&sysinfo))
retu
[PATCH v4 09/13] imx: Use devicetree for SMBIOS settings on MYiR MYS-6ULX
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass
---
(no changes since v1)
.../dts/imx6ull-myir-mys-6ulx-eval-u-boot.dts | 25 +++
configs/myir_mys_6ulx_defconfig | 3 ++-
2 files changed, 27 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/imx6ull-myir-mys-6ulx-eval-u-boot.dts
diff --git a/arch/arm/dts/imx6ull-myir-mys-6ulx-eval-u-boot.dts
b/arch/arm/dts/imx6ull-myir-mys-6ulx-eval-u-boot.dts
new file mode 100644
index 000..378e4fa58dc
--- /dev/null
+++ b/arch/arm/dts/imx6ull-myir-mys-6ulx-eval-u-boot.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Linumiz
+ * Author: Parthiban Nallathambi
+ */
+
+/ {
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ manufacturer = "MYiR";
+ };
+
+ baseboard {
+ manufacturer = "MYiR";
+ };
+
+ chassis {
+ manufacturer = "MYiR";
+ };
+ };
+ };
+};
diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig
index 02b2060874a..4ba817ab1e9 100644
--- a/configs/myir_mys_6ulx_defconfig
+++ b/configs/myir_mys_6ulx_defconfig
@@ -67,4 +67,5 @@ CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
-CONFIG_SMBIOS_MANUFACTURER="MYiR"
+CONFIG_SYSINFO=y
+CONFIG_SYSINFO_SMBIOS=y
--
2.29.0.rc1.297.gfa9743e501-goog
[PATCH v4 06/13] smbios: Add documentation and devicetree binding
Add information about how to set SMBIOS properties using the devicetree.
Signed-off-by: Simon Glass
---
(no changes since v1)
doc/arch/x86.rst| 8 +++
doc/device-tree-bindings/sysinfo/smbios.txt | 77 +
2 files changed, 85 insertions(+)
create mode 100644 doc/device-tree-bindings/sysinfo/smbios.txt
diff --git a/doc/arch/x86.rst b/doc/arch/x86.rst
index c6b70ce61a3..cc307aa8d5e 100644
--- a/doc/arch/x86.rst
+++ b/doc/arch/x86.rst
@@ -740,6 +740,14 @@ Note that this is a development feature only. It is not
intended for use in
production environments. Also it is not currently part of the automated tests
so may break in the future.
+SMBIOS tables
+-
+
+To generate SMBIOS tables in U-Boot, for use by the OS, enable the
+CONFIG_GENERATE_SMBIOS_TABLE option. The easiest way to provide the values to
+use is via the device tree. For details see
+device-tree-bindings/sysinfo/smbios.txt
+
TODO List
-
- Audio
diff --git a/doc/device-tree-bindings/sysinfo/smbios.txt
b/doc/device-tree-bindings/sysinfo/smbios.txt
new file mode 100644
index 000..b5223228025
--- /dev/null
+++ b/doc/device-tree-bindings/sysinfo/smbios.txt
@@ -0,0 +1,77 @@
+SMBIOS sysinfo information
+==
+
+This binding allows the values for the SMBIOS tables to be specified in the
+devicetree, as below.
+
+Required properties:
+
+ - compatible: "u-boot,smbios" or any other string depending on your board
+
+This driver allows providing board-specific features such as power control
+GPIOs. In addition, the SMBIOS values can be specified in the device tree,
+as below:
+
+An optional 'smbios' subnode can be used to provide these properties. Within
+that, the properties are broken down by table type, as in the System Management
+BIOS (Basic Input/Output System) Specification.
+
+Available subnodes for each table type are:
+
+ - 1 : system
+ - 2 : baseboard
+ - 3 : chassis
+
+Within each subnode the following tables are recognised:
+
+"system" subnode optional properties:
+
+ - manufacturer: Product manufacturer for system
+ - product: Product name
+ - version: Product version string
+ - serial: Serial number for system (note that this can be overridden by
+ the serial# environment variable)
+ - sku: Product SKU (Stock-Keeping Unit)
+ - family: Product family
+
+"baseboard" subnode optional properties:
+
+ - manufacturer: Product manufacturer for baseboard
+ - product: Product name
+ - asset-tag:Asset tag for the motherboard, sometimes used in
organisations
+ to track devices
+
+"chassis" subnode optional properties:
+
+ - manufacturer: Product manufacturer for chassis
+
+
+Example:
+
+sysinfo {
+ compatible = "sandbox,sysinfo-sandbox";
+
+ smbios {
+ /* Type 1 table */
+ system {
+ manufacturer = "Google";
+ product = "Coral";
+ version = "rev2";
+ serial = "123456789";
+ sku = "sku3";
+ family = "Google_Coral";
+ };
+
+ /* Type 2 table */
+ baseboard {
+ manufacturer = "Google";
+ product = "Coral";
+ asset-tag = "ABC123";
+ };
+
+ /* Type 3 table */
+ chassis {
+ manufacturer = "Google";
+ };
+ };
+};
--
2.29.0.rc1.297.gfa9743e501-goog
[PATCH v4 07/13] sysinfo: Provide a default driver to set SMBIOS values
Some boards want to specify the manuafacture or product name but do not
need to have their own sysinfo driver.
Add a default driver which provides a way to specify this SMBIOS
information in the devicetree, without needing any board-specific
functionality.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/sysinfo/Kconfig | 8
drivers/sysinfo/Makefile | 1 +
drivers/sysinfo/smbios.c | 24
lib/Kconfig | 3 +++
4 files changed, 36 insertions(+)
create mode 100644 drivers/sysinfo/smbios.c
diff --git a/drivers/sysinfo/Kconfig b/drivers/sysinfo/Kconfig
index 39141500a05..ee55b6206f4 100644
--- a/drivers/sysinfo/Kconfig
+++ b/drivers/sysinfo/Kconfig
@@ -22,4 +22,12 @@ config SYSINFO_SANDBOX
help
Support querying device information for the Sandbox boards.
+config SYSINFO_SMBIOS
+ bool "Provide a default sysinfo driver for SMBIOS information"
+ help
+ Some boards want to specify the manuafacture or product name but do
+ not need to have their own sysinfo driver. This includes a default
+ one which provides a way to specify this SMBIOS information in the
+ devicetree, without needing any board-specific functionality.
+
endif
diff --git a/drivers/sysinfo/Makefile b/drivers/sysinfo/Makefile
index aecf0b0d47c..6d04fcba1d1 100644
--- a/drivers/sysinfo/Makefile
+++ b/drivers/sysinfo/Makefile
@@ -5,3 +5,4 @@
obj-y += sysinfo-uclass.o
obj-$(CONFIG_SYSINFO_GAZERBEAM) += gazerbeam.o
obj-$(CONFIG_SYSINFO_SANDBOX) += sandbox.o
+obj-$(CONFIG_SYSINFO_SMBIOS) += smbios.o
diff --git a/drivers/sysinfo/smbios.c b/drivers/sysinfo/smbios.c
new file mode 100644
index 000..80ebd1921d8
--- /dev/null
+++ b/drivers/sysinfo/smbios.c
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Google LLC
+ * Written by Simon Glass
+ */
+
+#include
+#include
+#include
+
+static const struct udevice_id sysinfo_smbios_ids[] = {
+ { .compatible = "u-boot,sysinfo-smbios" },
+ { /* sentinel */ }
+};
+
+static const struct sysinfo_ops sysinfo_smbios_ops = {
+};
+
+U_BOOT_DRIVER(sysinfo_smbios) = {
+ .name = "sysinfo_smbios",
+ .id = UCLASS_SYSINFO,
+ .of_match = sysinfo_smbios_ids,
+ .ops= &sysinfo_smbios_ops,
+};
diff --git a/lib/Kconfig b/lib/Kconfig
index 37aae73a266..ab2fa3cc706 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -644,6 +644,9 @@ config GENERATE_SMBIOS_TABLE
Check http://www.dmtf.org/standards/smbios for details.
+ See also SMBIOS_SYSINFO which allows SMBIOS values to be provided in
+ the devicetree.
+
config SMBIOS_MANUFACTURER
string "SMBIOS Manufacturer"
depends on GENERATE_SMBIOS_TABLE
--
2.29.0.rc1.297.gfa9743e501-goog
[PATCH v4 04/13] smbios: Allow properties to come from the device tree
Support a way to put SMBIOS properties in the device tree. These can be
placed in a 'board' device in an 'smbios' subnode.
Signed-off-by: Simon Glass
---
Changes in v4:
- Fix build error with vexpress_ca9x4
Changes in v3:
- Use a different binding with subnodes for each table type
lib/smbios.c | 98 +++-
1 file changed, 81 insertions(+), 17 deletions(-)
diff --git a/lib/smbios.c b/lib/smbios.c
index b0f5e936044..be72a98c49d 100644
--- a/lib/smbios.c
+++ b/lib/smbios.c
@@ -17,6 +17,18 @@
#include
#endif
+/**
+ * struct smbios_write_method - Informaiton about a table-writing function
+ *
+ * @write: Function to call
+ * @subnode_name: Name of subnode which has the information for this function,
+ * NULL if none
+ */
+struct smbios_write_method {
+ smbios_write_type write;
+ const char *subnode_name;
+};
+
/**
* smbios_add_string() - add a string to the string area
*
@@ -52,6 +64,43 @@ static int smbios_add_string(char *start, const char *str)
}
}
+/**
+ * smbios_add_prop_default() - Add a property from the device tree or default
+ *
+ * @start: string area start address
+ * @node: node containing the information to write (ofnode_null() if none)
+ * @prop: property to write
+ * @def: default string if the node has no such property
+ * @return 0 if not found, else SMBIOS string number (1 or more)
+ */
+static int smbios_add_prop_default(char *start, ofnode node, const char *prop,
+ const char *def)
+{
+ const char *str = NULL;
+
+ if (IS_ENABLED(CONFIG_OF_CONTROL))
+ str = ofnode_read_string(node, prop);
+ if (str)
+ return smbios_add_string(start, str);
+ else if (def)
+ return smbios_add_string(start, def);
+
+ return 0;
+}
+
+/**
+ * smbios_add_prop() - Add a property from the device tree
+ *
+ * @start: string area start address
+ * @node: node containing the information to write (ofnode_null() if none)
+ * @prop: property to write
+ * @return 0 if not found, else SMBIOS string number (1 or more)
+ */
+static int smbios_add_prop(char *start, ofnode node, const char *prop)
+{
+ return smbios_add_prop_default(start, node, prop, NULL);
+}
+
/**
* smbios_string_table_len() - compute the string area size
*
@@ -120,11 +169,15 @@ static int smbios_write_type1(ulong *current, int handle,
ofnode node)
t = map_sysmem(*current, len);
memset(t, 0, sizeof(struct smbios_type1));
fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle);
- t->manufacturer = smbios_add_string(t->eos, CONFIG_SMBIOS_MANUFACTURER);
- t->product_name = smbios_add_string(t->eos, CONFIG_SMBIOS_PRODUCT_NAME);
+ t->manufacturer = smbios_add_prop_default(t->eos, node, "manufactuer",
+ CONFIG_SMBIOS_MANUFACTURER);
+ t->product_name = smbios_add_prop_default(t->eos, node, "product",
+ CONFIG_SMBIOS_PRODUCT_NAME);
if (serial_str) {
- strncpy((char *)t->uuid, serial_str, sizeof(t->uuid));
t->serial_number = smbios_add_string(t->eos, serial_str);
+ strncpy((char *)t->uuid, serial_str, sizeof(t->uuid));
+ } else {
+ t->serial_number = smbios_add_prop(t->eos, node, "serial");
}
len = t->length + smbios_string_table_len(t->eos);
@@ -142,8 +195,10 @@ static int smbios_write_type2(ulong *current, int handle,
ofnode node)
t = map_sysmem(*current, len);
memset(t, 0, sizeof(struct smbios_type2));
fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle);
- t->manufacturer = smbios_add_string(t->eos, CONFIG_SMBIOS_MANUFACTURER);
- t->product_name = smbios_add_string(t->eos, CONFIG_SMBIOS_PRODUCT_NAME);
+ t->manufacturer = smbios_add_prop_default(t->eos, node, "manufactuer",
+ CONFIG_SMBIOS_MANUFACTURER);
+ t->product_name = smbios_add_prop_default(t->eos, node, "product",
+ CONFIG_SMBIOS_PRODUCT_NAME);
t->feature_flags = SMBIOS_BOARD_FEATURE_HOSTING;
t->board_type = SMBIOS_BOARD_MOTHERBOARD;
@@ -162,7 +217,8 @@ static int smbios_write_type3(ulong *current, int handle,
ofnode node)
t = map_sysmem(*current, len);
memset(t, 0, sizeof(struct smbios_type3));
fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle);
- t->manufacturer = smbios_add_string(t->eos, CONFIG_SMBIOS_MANUFACTURER);
+ t->manufacturer = smbios_add_prop_default(t->eos, node, "manufactuer",
+ CONFIG_SMBIOS_MANUFACTURER);
t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP;
t->bootup_state = SMBIOS_STATE_SAFE;
t->power_supply_state = SMBIOS_STATE_SAFE;
@@ -262,1
[PATCH v4 03/13] x86: Pass an ofnode into each SMBIOS function
As a first step to obtaining SMBIOS information from the devicetree, add
an ofnode parameter to the writing functions.
Signed-off-by: Simon Glass
---
(no changes since v2)
Changes in v2:
- Move dm.h header file to avoid build error on qemu-arm
- Deal with boards that don't use of-control
include/smbios.h | 5 -
lib/smbios.c | 44 ++--
2 files changed, 30 insertions(+), 19 deletions(-)
diff --git a/include/smbios.h b/include/smbios.h
index 97b9ddce237..c19afbe16c7 100644
--- a/include/smbios.h
+++ b/include/smbios.h
@@ -8,6 +8,8 @@
#ifndef _SMBIOS_H_
#define _SMBIOS_H_
+#include
+
/* SMBIOS spec version implemented */
#define SMBIOS_MAJOR_VER 3
#define SMBIOS_MINOR_VER 0
@@ -222,9 +224,10 @@ static inline void fill_smbios_header(void *table, int
type,
*
* @addr: start address to write the structure
* @handle:the structure's handle, a unique 16-bit number
+ * @node: node containing the information to write (ofnode_null() if none)
* @return:size of the structure
*/
-typedef int (*smbios_write_type)(ulong *addr, int handle);
+typedef int (*smbios_write_type)(ulong *addr, int handle, ofnode node);
/**
* write_smbios_table() - Write SMBIOS table
diff --git a/lib/smbios.c b/lib/smbios.c
index 11790443e1a..b0f5e936044 100644
--- a/lib/smbios.c
+++ b/lib/smbios.c
@@ -6,6 +6,7 @@
*/
#include
+#include
#include
#include
#include
@@ -13,7 +14,6 @@
#include
#ifdef CONFIG_CPU
#include
-#include
#include
#endif
@@ -25,7 +25,7 @@
*
* @start: string area start address
* @str: string to add
- * @return:string number in the string area
+ * @return:string number in the string area (1 or more)
*/
static int smbios_add_string(char *start, const char *str)
{
@@ -74,7 +74,7 @@ static int smbios_string_table_len(char *start)
return len + 1;
}
-static int smbios_write_type0(ulong *current, int handle)
+static int smbios_write_type0(ulong *current, int handle, ofnode node)
{
struct smbios_type0 *t;
int len = sizeof(struct smbios_type0);
@@ -111,7 +111,7 @@ static int smbios_write_type0(ulong *current, int handle)
return len;
}
-static int smbios_write_type1(ulong *current, int handle)
+static int smbios_write_type1(ulong *current, int handle, ofnode node)
{
struct smbios_type1 *t;
int len = sizeof(struct smbios_type1);
@@ -134,7 +134,7 @@ static int smbios_write_type1(ulong *current, int handle)
return len;
}
-static int smbios_write_type2(ulong *current, int handle)
+static int smbios_write_type2(ulong *current, int handle, ofnode node)
{
struct smbios_type2 *t;
int len = sizeof(struct smbios_type2);
@@ -154,7 +154,7 @@ static int smbios_write_type2(ulong *current, int handle)
return len;
}
-static int smbios_write_type3(ulong *current, int handle)
+static int smbios_write_type3(ulong *current, int handle, ofnode node)
{
struct smbios_type3 *t;
int len = sizeof(struct smbios_type3);
@@ -176,7 +176,7 @@ static int smbios_write_type3(ulong *current, int handle)
return len;
}
-static void smbios_write_type4_dm(struct smbios_type4 *t)
+static void smbios_write_type4_dm(struct smbios_type4 *t, ofnode node)
{
u16 processor_family = SMBIOS_PROCESSOR_FAMILY_UNKNOWN;
const char *vendor = "Unknown";
@@ -185,20 +185,20 @@ static void smbios_write_type4_dm(struct smbios_type4 *t)
#ifdef CONFIG_CPU
char processor_name[49];
char vendor_name[49];
- struct udevice *dev = NULL;
+ struct udevice *cpu = NULL;
- uclass_find_first_device(UCLASS_CPU, &dev);
- if (dev) {
- struct cpu_platdata *plat = dev_get_parent_platdata(dev);
+ uclass_find_first_device(UCLASS_CPU, &cpu);
+ if (cpu) {
+ struct cpu_platdata *plat = dev_get_parent_platdata(cpu);
if (plat->family)
processor_family = plat->family;
t->processor_id[0] = plat->id[0];
t->processor_id[1] = plat->id[1];
- if (!cpu_get_vendor(dev, vendor_name, sizeof(vendor_name)))
+ if (!cpu_get_vendor(cpu, vendor_name, sizeof(vendor_name)))
vendor = vendor_name;
- if (!cpu_get_desc(dev, processor_name, sizeof(processor_name)))
+ if (!cpu_get_desc(cpu, processor_name, sizeof(processor_name)))
name = processor_name;
}
#endif
@@ -208,7 +208,7 @@ static void smbios_write_type4_dm(struct smbios_type4 *t)
t->processor_version = smbios_add_string(t->eos, name);
}
-static int smbios_write_type4(ulong *current, int handle)
+static int smbios_write_type4(ulong *current, int handle, ofnode node)
{
struct smbios_type4 *t;
int len = sizeof(struct smbios_type4);
@@ -217,7 +217,7 @@ static int smbios_write_type4(ulong *current, int ha
[PATCH v4 05/13] smbios: Add more properties
The current tables only support a subset of the available fields defined
by the SMBIOS spec. Add a few more.
Signed-off-by: Simon Glass
---
(no changes since v1)
lib/smbios.c | 4
1 file changed, 4 insertions(+)
diff --git a/lib/smbios.c b/lib/smbios.c
index be72a98c49d..87dd4be415d 100644
--- a/lib/smbios.c
+++ b/lib/smbios.c
@@ -173,12 +173,15 @@ static int smbios_write_type1(ulong *current, int handle,
ofnode node)
CONFIG_SMBIOS_MANUFACTURER);
t->product_name = smbios_add_prop_default(t->eos, node, "product",
CONFIG_SMBIOS_PRODUCT_NAME);
+ t->version = smbios_add_prop(t->eos, node, "version");
if (serial_str) {
t->serial_number = smbios_add_string(t->eos, serial_str);
strncpy((char *)t->uuid, serial_str, sizeof(t->uuid));
} else {
t->serial_number = smbios_add_prop(t->eos, node, "serial");
}
+ t->sku_number = smbios_add_prop(t->eos, node, "sku");
+ t->family = smbios_add_prop(t->eos, node, "family");
len = t->length + smbios_string_table_len(t->eos);
*current += len;
@@ -199,6 +202,7 @@ static int smbios_write_type2(ulong *current, int handle,
ofnode node)
CONFIG_SMBIOS_MANUFACTURER);
t->product_name = smbios_add_prop_default(t->eos, node, "product",
CONFIG_SMBIOS_PRODUCT_NAME);
+ t->asset_tag_number = smbios_add_prop(t->eos, node, "asset-tag");
t->feature_flags = SMBIOS_BOARD_FEATURE_HOSTING;
t->board_type = SMBIOS_BOARD_MOTHERBOARD;
--
2.29.0.rc1.297.gfa9743e501-goog
[PATCH v4 02/13] doc: Add a binding for sysinfo
Add a simple binding file for this, so that it is clear what this binding
directory is for.
Signed-off-by: Simon Glass
---
(no changes since v1)
doc/device-tree-bindings/sysinfo/sysinfo.txt | 18 ++
1 file changed, 18 insertions(+)
create mode 100644 doc/device-tree-bindings/sysinfo/sysinfo.txt
diff --git a/doc/device-tree-bindings/sysinfo/sysinfo.txt
b/doc/device-tree-bindings/sysinfo/sysinfo.txt
new file mode 100644
index 000..ed8830b8284
--- /dev/null
+++ b/doc/device-tree-bindings/sysinfo/sysinfo.txt
@@ -0,0 +1,18 @@
+Sysinfo
+===
+
+This provides capabilities to access information about a board/system, for
+use by drivers.
+
+Required properties:
+
+ - compatible: any suitable string where the driver is in the UCLASS_SYSINFO
+ class
+
+See also smbios.txt
+
+
+Example
+
+sysinfo {
+ compatible = "sandbox,sysinfo";
--
2.29.0.rc1.297.gfa9743e501-goog
[PATCH v4 00/13] x86: Updates to SMBIOS
At present there are a few Kconfig options which allow SMBIOS fields to
be specified at build time.
Not all fields are supported. Also, defining these at build-time is
limiting since a factory system cannot insert values for particular boards
or models without rebuilding U-Boot.
This series adds a way to set SMBIOS properties using the devicetree.
With this approach, more fields are supported and it is easy to update
values in the devicetree in the factory.
It also updates existing boards to use devicetree and drops the CONFIG
options, using a new default sysinfo driver.
Changes in v4:
- Fix build error with vexpress_ca9x4
Changes in v3:
- Use a different binding with subnodes for each table type
- Add onto the sysinfo binding
Changes in v2:
- Move dm.h header file to avoid build error on qemu-arm
- Deal with boards that don't use of-control
Simon Glass (13):
board: Rename uclass to sysinfo
doc: Add a binding for sysinfo
x86: Pass an ofnode into each SMBIOS function
smbios: Allow properties to come from the device tree
smbios: Add more properties
smbios: Add documentation and devicetree binding
sysinfo: Provide a default driver to set SMBIOS values
rockchip: Use devicetree for SMBIOS settings
imx: Use devicetree for SMBIOS settings on MYiR MYS-6ULX
odroid-c2: Use devicetree for SMBIOS settings
arm64: mvebu: Use devicetree for SMBIOS settings on uDPU
x86: galileo: Use devicetree for SMBIOS settings
smbios: Drop the unused Kconfig options
arch/arm/dts/armada-3720-uDPU-u-boot.dtsi | 20 +++
.../dts/imx6ull-myir-mys-6ulx-eval-u-boot.dts | 25
arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi | 23 +++
arch/arm/dts/rk3328-roc-cc-u-boot.dtsi| 21 +++
arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 23 +++
arch/arm/dts/rk3328-rock64-u-boot.dtsi| 21 +++
arch/arm/dts/rk3368-lion-u-boot.dtsi | 20 +++
arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi | 2 +-
arch/sandbox/dts/test.dts | 8 +-
arch/x86/dts/galileo.dts | 18 +++
board/gdsys/common/cmd_ioloop.c | 12 +-
board/gdsys/mpc8308/gazerbeam.c | 47 ---
board/google/chromebook_coral/coral.c | 2 +-
board/intel/galileo/Kconfig | 11 --
common/spl/spl_fit.c | 15 +-
configs/chromebook_coral_defconfig| 2 +-
configs/clearfog_gt_8k_defconfig | 2 -
configs/gazerbeam_defconfig | 4 +-
configs/lion-rk3368_defconfig | 4 +-
configs/mt7622_rfb_defconfig | 1 -
configs/mvebu_db_armada8k_defconfig | 2 -
configs/myir_mys_6ulx_defconfig | 3 +-
configs/odroid-c2_defconfig | 4 +-
configs/r8a774a1_beacon_defconfig | 2 -
configs/r8a77970_eagle_defconfig | 2 -
configs/r8a77980_condor_defconfig | 2 -
configs/r8a77990_ebisu_defconfig | 2 -
configs/r8a77995_draak_defconfig | 2 -
configs/rcar3_salvator-x_defconfig| 2 -
configs/rcar3_ulcb_defconfig | 2 -
configs/roc-cc-rk3328_defconfig | 4 +-
configs/rock-pi-e-rk3328_defconfig| 4 +-
configs/rock64-rk3328_defconfig | 4 +-
configs/sandbox64_defconfig | 8 +-
configs/sandbox_defconfig | 8 +-
configs/sandbox_flattree_defconfig| 4 +-
configs/sandbox_spl_defconfig | 4 +-
configs/uDPU_defconfig| 3 +-
doc/arch/x86.rst | 8 ++
.../gdsys,sysinfo_gazerbeam.txt} | 8 +-
doc/device-tree-bindings/sysinfo/smbios.txt | 77 ++
doc/device-tree-bindings/sysinfo/sysinfo.txt | 18 +++
drivers/Kconfig | 4 +-
drivers/Makefile | 2 +-
drivers/board/Kconfig | 25
drivers/board/Makefile| 7 -
drivers/board/board-uclass.c | 71 --
drivers/sysinfo/Kconfig | 33 +
drivers/sysinfo/Makefile | 8 ++
drivers/{board => sysinfo}/gazerbeam.c| 74 +-
drivers/{board => sysinfo}/gazerbeam.h| 0
drivers/{board => sysinfo}/sandbox.c | 50 +++
drivers/{board => sysinfo}/sandbox.h | 0
drivers/sysinfo/smbios.c | 24
drivers/sysinfo/sysinfo-uclass.c | 71 ++
drivers/timer/mpc83xx_timer.c | 10 +-
include/dm/uclass-id.h| 2 +-
include/smbios.h | 5 +-
include/{board.h => sysinfo.h}| 80 +--
lib/Kconfig | 17 +--
lib/smbios.c | 133 +-
test/dm/Makefile
Re: [PATCH 2/2] test: unit tests for print_freq(), print_size()
On Thu, Oct 08, 2020 at 10:23:24PM +0200, Heinrich Schuchardt wrote: > Provide unit tests for functions print_freq() and print_size(). > > Signed-off-by: Heinrich Schuchardt > --- > test/lib/Makefile | 1 + > 1 file changed, 1 insertion(+) > > -- > 2.28.0 > > diff --git a/test/lib/Makefile b/test/lib/Makefile > index 22236f8587..15cd512506 100644 > --- a/test/lib/Makefile > +++ b/test/lib/Makefile > @@ -7,6 +7,7 @@ obj-$(CONFIG_EFI_LOADER) += efi_device_path.o > obj-$(CONFIG_EFI_SECURE_BOOT) += efi_image_region.o > obj-y += hexdump.o > obj-y += lmb.o > +obj-y += test_print.o > obj-$(CONFIG_SSCANF) += sscanf.o > obj-y += string.o > obj-$(CONFIG_ERRNO_STR) += test_errno_str.o New test file missing. -- Tom signature.asc Description: PGP signature
