Re: [PATCH] rk3399: Add basic support for helios64
On Fri, Feb 26, 2021 at 12:57 AM Uwe Kleine-König wrote: > > Hi Dennis, > > thanks for your feedback. > > On 2/26/21 12:23 AM, Dennis Gilmore wrote: > > Thanks for submitting, I have been meaning to do so myself, I have > > been meaning to go through and try get the dts files in a decent > > shape. I think that most of what is in > > arch/arm/dts/rk3399-kobol-helios64-u-boot.dtsi belongs in > > arch/arm/dts/rk3399-kobol-helios64.dts > > I understood that the intention of the separation into two files is that > the one should track the Linux dts. Is that wrong? That is not wrong, however the only things that should be in the -u-boot.dtsi files are the things that are u-boot specific and needed to make u-boot work. everything else should go into Linux also > > > I also wonder if we shouldn't > > default to building an image for use in the SPI flash since the system > > has it available. > > I didn't test that but expected that I can write the resulting image to > the spi flash and it works just fine. If you want something else here I > need some direction about what to change. at the least the env should be in spi. there may be some things I am missing Dennis > > Best regards > Uwe >
[PATCH] arm64: rk3399: Add support NanoPi R4s
From: Xiaobo Tian
NanoPi R4s is SBC base on Rockchip RK3399 hexa-core processor with
dual-Core Cortex-A72 and Mali-T864 GPU with 4GiB(LPDDR4) of RAM, SD card
support,
including 2 gigabit ethernet(RTL8211E 1Gbps - RTL8111H 1Gbps) and 2 USB 3.0
port.
port.It also has two GPIO headers which allows further peripherals to be used.
The devicetree file is taken of the rk3399 nanopi4 Linux kernel [1].
[1]
https://github.com/torvalds/linux/commit/e7a095908227fb3ccc86d001d9e13c9ae2bef8e6
Signed-off-by: xiaobo
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi | 16 +++
arch/arm/dts/rk3399-nanopi-r4s.dts | 138 +
board/rockchip/evb_rk3399/MAINTAINERS | 6 +
configs/nanopi-r4s-rk3399_defconfig| 62 +
5 files changed, 223 insertions(+)
create mode 100644 arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3399-nanopi-r4s.dts
create mode 100644 configs/nanopi-r4s-rk3399_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 33e483f4fb..008dfc0de0 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -132,6 +132,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-nanopi-m4.dtb \
rk3399-nanopi-m4-2gb.dtb \
rk3399-nanopi-neo4.dtb \
+ rk3399-nanopi-r4s.dtb \
rk3399-orangepi.dtb \
rk3399-pinebook-pro.dtb \
rk3399-puma-haikou.dtb \
diff --git a/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
new file mode 100644
index 00..cd1642527b
--- /dev/null
+++ b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * RK3399-based FriendlyElec boards device tree source
+ *
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2018 Collabora Ltd.
+ * Copyright (c) 2019 Arm Ltd.
+ * Copyright (C) 2020 Xiaobo
+ */
+
+#include "rk3399-nanopi4-u-boot.dtsi"
+#include "rk3399-sdram-lpddr4-100.dtsi"
diff --git a/arch/arm/dts/rk3399-nanopi-r4s.dts
b/arch/arm/dts/rk3399-nanopi-r4s.dts
new file mode 100644
index 00..6f2cf17bf1
--- /dev/null
+++ b/arch/arm/dts/rk3399-nanopi-r4s.dts
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2018 Collabora Ltd.
+ * Copyright (c) 2019 Arm Ltd.
+ * Copyright (C) 2020 Xiaobo
+ */
+
+/dts-v1/;
+#include "rk3399-nanopi4.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi R4S";
+ compatible = "friendlyarm,nanopi-r4s", "rockchip,rk3399";
+
+ aliases {
+ ethernet1 =
+ };
+
+ vdd_5v: vdd-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_5v";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ fan: pwm-fan {
+ compatible = "pwm-fan";
+ cooling-levels = <0 12 18 255>;
+ #cooling-cells = <2>;
+ fan-supply = <_5v>;
+ pwms = < 0 5 0>;
+ };
+};
+
+_thermal {
+ trips {
+ cpu_warm: cpu_warm {
+ temperature = <55000>;
+ hysteresis = <2000>;
+ type = "active";
+ };
+
+ cpu_hot: cpu_hot {
+ temperature = <65000>;
+ hysteresis = <2000>;
+ type = "active";
+ };
+ };
+
+ cooling-maps {
+ map2 {
+ trip = <_warm>;
+ cooling-device = < THERMAL_NO_LIMIT 1>;
+ };
+
+ map3 {
+ trip = <_hot>;
+ cooling-device = < 2 THERMAL_NO_LIMIT>;
+ };
+ };
+};
+
+_phy {
+ status = "disabled";
+};
+
+ {
+ status = "disabled";
+};
+
+ {
+ lan_led: led-1 {
+ gpios = < RK_PA1 GPIO_ACTIVE_HIGH>;
+ label = "nanopi-r4s:green:lan";
+ };
+
+ wan_led: led-2 {
+ gpios = < RK_PA0 GPIO_ACTIVE_HIGH>;
+ label = "nanopi-r4s:green:wan";
+ };
+};
+
+_gpio {
+ rockchip,pins =
+ <0 RK_PB5 RK_FUNC_GPIO _pull_none>,
+ <1 RK_PA0 RK_FUNC_GPIO _pull_none>,
+ <1 RK_PA1 RK_FUNC_GPIO _pull_none>;
+};
+
+ {
+ max-link-speed = <1>;
+ num-lanes = <1>;
+ vpcie3v3-supply = <_sys>;
+
+ pcie@0 {
+ reg = <0x 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ r8169: pcie@0,0 {
+ reg = <0x00 0 0 0 0>;
+ local-mac-address
Re: [PATCH] ARM: imx: Do not hard-code MX8M MMU table DRAM entry offset
Hi Marek, On Sat, Feb 27, 2021 at 10:59 AM Marek Vasut wrote: > > Instead of hard-coding the offset of DRAM entries in MMU table all over > the code, auto-detect the offset. This removes error-prone code which > would break e.g. in case the MMU table is modified. > > Signed-off-by: Marek Vasut > Cc: Fabio Estevam > Cc: Peng Fan > Cc: Stefano Babic > Cc: Ye Li This is a much better solution indeed, thanks: Reviewed-by: Fabio Estevam
[PATCH] ARM: imx: Do not hard-code MX8M MMU table DRAM entry offset
Instead of hard-coding the offset of DRAM entries in MMU table all over
the code, auto-detect the offset. This removes error-prone code which
would break e.g. in case the MMU table is modified.
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
Cc: Ye Li
---
arch/arm/mach-imx/imx8m/soc.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 225e4e12500..988355f147c 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -161,6 +161,17 @@ static struct mm_region imx8m_mem_map[] = {
struct mm_region *mem_map = imx8m_mem_map;
+static unsigned int imx8m_find_dram_entry_in_mem_map(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(imx8m_mem_map); i++)
+ if (imx8m_mem_map[i].phys == CONFIG_SYS_SDRAM_BASE)
+ return i;
+
+ hang(); /* Entry not found, this must never happen. */
+}
+
void enable_caches(void)
{
/* If OPTEE runs, remove OPTEE memory from MMU table to avoid
speculative prefetch */
@@ -174,10 +185,11 @@ void enable_caches(void)
* please make sure that entry initial value matches
* imx8m_mem_map for DRAM1
*/
- int entry = 5;
+ int entry = imx8m_find_dram_entry_in_mem_map();
u64 attrs = imx8m_mem_map[entry].attrs;
- while (i < CONFIG_NR_DRAM_BANKS && entry < 8) {
+ while (i < CONFIG_NR_DRAM_BANKS &&
+ entry < ARRAY_SIZE(imx8m_mem_map)) {
if (gd->bd->bi_dram[i].start == 0)
break;
imx8m_mem_map[entry].phys = gd->bd->bi_dram[i].start;
@@ -205,6 +217,7 @@ __weak int board_phys_sdram_size(phys_size_t *size)
int dram_init(void)
{
+ unsigned int entry = imx8m_find_dram_entry_in_mem_map();
phys_size_t sdram_size;
int ret;
@@ -219,7 +232,7 @@ int dram_init(void)
gd->ram_size = sdram_size;
/* also update the SDRAM size in the mem_map used externally */
- imx8m_mem_map[5].size = sdram_size;
+ imx8m_mem_map[entry].size = sdram_size;
#ifdef PHYS_SDRAM_2_SIZE
gd->ram_size += PHYS_SDRAM_2_SIZE;
--
2.30.0
[PATCH] Revert "mmc: fsl_esdhc_imx: remove the 1ms delay before sending command"
Removing the 1ms delay before sending command causes a regression
on imx8mq-evk where the SD card cannot be accessed.
Since this 1ms delay has been present since the driver introduction
in 2008, keep it to avoid regressions.
This reverts commit 9098682200e6cca4b776638a51200dafa16f50fb.
Reported-by: Ye Li
Signed-off-by: Fabio Estevam
---
drivers/mmc/fsl_esdhc_imx.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index e0e132698e30..a0a5c8960563 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -463,6 +463,13 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv
*priv, struct mmc *mmc,
while (esdhc_read32(>prsstat) & PRSSTAT_DLA)
;
+ /* Wait at least 8 SD clock cycles before the next command */
+ /*
+* Note: This is way more than 8 cycles, but 1ms seems to
+* resolve timing issues with some cards
+*/
+ udelay(1000);
+
/* Set up for a data transfer if we have one */
if (data) {
err = esdhc_setup_data(priv, mmc, data);
--
2.25.1
Re: [EXT] Re: [PATCH 4/4] imx8mq_evk: Enable the USB3.0 host port
Hi Ye Li,
On Sat, Feb 27, 2021 at 3:04 AM Ye Li wrote:
> My debug shows the issue is triggered by below commit:
Thanks for investigating this issue. Appreciate it.
> commit 9098682200e6cca4b776638a51200dafa16f50fb
> Author: Haibo Chen
> Date: Tue Sep 22 18:11:43 2020 +0800
>
> mmc: fsl_esdhc_imx: remove the 1ms delay before sending command
>
> This 1ms delay before sending command already exist from the
> beginning
> of the fsl_esdhc driver added in year 2008. Now this driver has
> been
> split for two files: fsl_esdhc.c and fsl_esdhc_imx.c.
> fsl_esdhc_imx.c
> only for i.MX series. i.MX series esdhc/usdhc do not need this 1ms
> delay
> before sending any command. So remove this 1ms, this will save a
> lot
> time if handling a large mmc data.
>
> Signed-off-by: Haibo Chen
>
>
> The first "go idle" command in mmc_get_op_cond seems not put SD card to
> idle status, but if adding a delay before it (like 1ms delay), then
> everything works. This commit removed 1ms delay in sending command, so
> the issue is triggered. The root cause might be "startup-delay-us"
> needed for this regulator to reach a threshold voltage for SD working.
> Below change also can fix the issue.
>
> --- a/arch/arm/dts/imx8mq-evk-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi
> @@ -1,6 +1,7 @@
> // SPDX-License-Identifier: (GPL-2.0 OR MIT)
>
> _usdhc2_vmmc {
> + startup-delay-us = <1000>;
> u-boot,off-on-delay-us = <2>;
> };
>
>
> @Haibo, Could you help looking into the issue. What's your opinion to
> add the startup-delay-us or revert your commit?
As the 1ms delay in the driver has been present since 2008, I prefer
to go with the revert for the following reasons:
1) We would need to fix all the esdhc users in devicetree.
2) By adding startup-delay-us only to the U-Boot dts we are deviating
from the Linux devicetree once again, which we should avoid.
Thanks,
Fabio Estevam
Re: [PATCH v2 3/3] arm: mvebu: Initial ESPRESSOBin-Ultra board support
In Linux the DTS for espressobin-ultra includes armada-3720-espressobin.dtsi and just adds changes. If possible, please do this as is done in Linux. In fact we want to slowly move in the direction to have the dts files just copied from Linux. Marek
[PATCH 5/6] video: use int for character in putc_xy()
The truetype console expects the character to be a Unicode code point. This
value cannot be passed as char. Use int instead.
Signed-off-by: Heinrich Schuchardt
---
drivers/video/console_normal.c| 2 +-
drivers/video/console_rotate.c| 6 +++---
drivers/video/console_truetype.c | 2 +-
drivers/video/vidconsole-uclass.c | 9 +
include/video_console.h | 2 +-
5 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c
index 04f022491e..9cfd11ae41 100644
--- a/drivers/video/console_normal.c
+++ b/drivers/video/console_normal.c
@@ -80,7 +80,7 @@ static int console_normal_move_rows(struct udevice *dev, uint
rowdst,
}
static int console_normal_putc_xy(struct udevice *dev, uint x_frac, uint y,
- char ch)
+ int ch)
{
struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
struct udevice *vid = dev->parent;
diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c
index 36c8d0609d..78ca36431f 100644
--- a/drivers/video/console_rotate.c
+++ b/drivers/video/console_rotate.c
@@ -86,7 +86,7 @@ static int console_move_rows_1(struct udevice *dev, uint
rowdst, uint rowsrc,
return 0;
}
-static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, char ch)
+static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, int ch)
{
struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
struct udevice *vid = dev->parent;
@@ -221,7 +221,7 @@ static int console_move_rows_2(struct udevice *dev, uint
rowdst, uint rowsrc,
return 0;
}
-static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char ch)
+static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int ch)
{
struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
struct udevice *vid = dev->parent;
@@ -362,7 +362,7 @@ static int console_move_rows_3(struct udevice *dev, uint
rowdst, uint rowsrc,
return 0;
}
-static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, char ch)
+static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int ch)
{
struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
struct udevice *vid = dev->parent;
diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c
index fa11b3bbef..293b3a5ef4 100644
--- a/drivers/video/console_truetype.c
+++ b/drivers/video/console_truetype.c
@@ -198,7 +198,7 @@ static int console_truetype_move_rows(struct udevice *dev,
uint rowdst,
}
static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y,
- char ch)
+ int ch)
{
struct vidconsole_priv *vc_priv = dev_get_uclass_priv(dev);
struct udevice *vid = dev->parent;
diff --git a/drivers/video/vidconsole-uclass.c
b/drivers/video/vidconsole-uclass.c
index 81b65f5aae..a355328851 100644
--- a/drivers/video/vidconsole-uclass.c
+++ b/drivers/video/vidconsole-uclass.c
@@ -8,6 +8,7 @@
*/
#include
+#include
#include
#include
#include
@@ -509,6 +510,14 @@ int vidconsole_put_char(struct udevice *dev, char ch)
struct vidconsole_priv *priv = dev_get_uclass_priv(dev);
int ret;
+ if (IS_ENABLED(CONFIG_EFI_LOADER)) {
+ static char buffer[5];
+
+ ch = utf8_to_cp437_stream(ch, buffer);
+ if (!ch)
+ return 0;
+ }
+
if (priv->escape) {
vidconsole_escape_char(dev, ch);
return 0;
diff --git a/include/video_console.h b/include/video_console.h
index 06b798ef10..5e6eb3cc81 100644
--- a/include/video_console.h
+++ b/include/video_console.h
@@ -106,7 +106,7 @@ struct vidconsole_ops {
* if all is OK, -EAGAIN if we ran out of space on this line, other -ve
* on error
*/
- int (*putc_xy)(struct udevice *dev, uint x_frac, uint y, char ch);
+ int (*putc_xy)(struct udevice *dev, uint x_frac, uint y, int ch);
/**
* move_rows() - Move text rows from one place to another
--
2.30.0
[PATCH 6/6] video: support Unicode in video console
UEFI programs use Unicode for console output, e.g. GRUB uses characters
from the 0x2500 code block to draw a box around the menu.
The TrueType console supports UTF-32. The normal console supports code page
437. We have to convert the UTF-8 stream passed to putc() accordingly.
Signed-off-by: Heinrich Schuchardt
---
drivers/video/vidconsole-uclass.c | 22 +-
include/video_console.h | 2 +-
2 files changed, 18 insertions(+), 6 deletions(-)
diff --git a/drivers/video/vidconsole-uclass.c
b/drivers/video/vidconsole-uclass.c
index a355328851..d5095f69e0 100644
--- a/drivers/video/vidconsole-uclass.c
+++ b/drivers/video/vidconsole-uclass.c
@@ -32,7 +32,7 @@ struct vid_rgb {
#define CONFIG_CONSOLE_SCROLL_LINES 1
#endif
-int vidconsole_putc_xy(struct udevice *dev, uint x, uint y, char ch)
+int vidconsole_putc_xy(struct udevice *dev, uint x, uint y, int ch)
{
struct vidconsole_ops *ops = vidconsole_get_ops(dev);
@@ -479,8 +479,14 @@ error:
priv->escape = 0;
}
-/* Put that actual character on the screen (using the CP437 code page). */
-static int vidconsole_output_glyph(struct udevice *dev, char ch)
+/*
+ * vidconsole_output_glyph() - put the actual character on the screen
+ *
+ * @dev: video device
+ * @ch:character: Unicode for Truetype, codepage 437 otherwise
+ * Return: 0 for success
+ */
+static int vidconsole_output_glyph(struct udevice *dev, int ch)
{
struct vidconsole_priv *priv = dev_get_uclass_priv(dev);
int ret;
@@ -505,17 +511,23 @@ static int vidconsole_output_glyph(struct udevice *dev,
char ch)
return 0;
}
-int vidconsole_put_char(struct udevice *dev, char ch)
+int vidconsole_put_char(struct udevice *dev, char c)
{
struct vidconsole_priv *priv = dev_get_uclass_priv(dev);
+ int ch;
int ret;
if (IS_ENABLED(CONFIG_EFI_LOADER)) {
static char buffer[5];
- ch = utf8_to_cp437_stream(ch, buffer);
+ if (IS_ENABLED(CONFIG_CONSOLE_TRUETYPE))
+ ch = utf8_to_utf32_stream(c, buffer);
+ else
+ ch = utf8_to_cp437_stream(c, buffer);
if (!ch)
return 0;
+ } else {
+ ch = c;
}
if (priv->escape) {
diff --git a/include/video_console.h b/include/video_console.h
index 5e6eb3cc81..8747299d61 100644
--- a/include/video_console.h
+++ b/include/video_console.h
@@ -174,7 +174,7 @@ struct vidconsole_ops {
* if all is OK, -EAGAIN if we ran out of space on this line, other -ve
* on error
*/
-int vidconsole_putc_xy(struct udevice *dev, uint x, uint y, char ch);
+int vidconsole_putc_xy(struct udevice *dev, uint x, uint y, int ch);
/**
* vidconsole_move_rows() - Move text rows from one place to another
--
2.30.0
[PATCH 4/6] lib/charset: UTF-8 stream conversion
Provide functions to convert an UTF-8 stream to code page 437 or UTF-32.
Add unit tests.
Signed-off-by: Heinrich Schuchardt
---
include/charset.h | 18 +++
lib/charset.c | 55 +++--
test/unicode_ut.c | 78 +++
3 files changed, 142 insertions(+), 9 deletions(-)
diff --git a/include/charset.h b/include/charset.h
index 52e7d1474e..a911160f19 100644
--- a/include/charset.h
+++ b/include/charset.h
@@ -286,4 +286,22 @@ uint8_t *utf16_to_utf8(uint8_t *dest, const uint16_t *src,
size_t size);
*/
int utf_to_cp(s32 *c, const u16 *codepage);
+/**
+ * utf8_to_cp437_stream() - convert UTF-8 stream to codepage 437
+ *
+ * @c: next UTF-8 character to convert
+ * @buffer:buffer, at least 5 characters
+ * Return: next codepage 437 character or 0
+ */
+int utf8_to_cp437_stream(u8 c, char *buffer);
+
+/**
+ * utf8_to_utf32_stream() - convert UTF-8 stream to UTF-32
+ *
+ * @c: next UTF-8 character to convert
+ * @buffer:buffer, at least 5 characters
+ * Return: next codepage 437 character or 0
+ */
+int utf8_to_utf32_stream(u8 c, char *buffer);
+
#endif /* __CHARSET_H_ */
diff --git a/lib/charset.c b/lib/charset.c
index 946d5ee23e..f44c58d9d8 100644
--- a/lib/charset.c
+++ b/lib/charset.c
@@ -481,15 +481,6 @@ uint8_t *utf16_to_utf8(uint8_t *dest, const uint16_t *src,
size_t size)
return dest;
}
-/**
- * utf_to_cp() - translate Unicode code point to 8bit codepage
- *
- * Codepoints that do not exist in the codepage are rendered as question mark.
- *
- * @c: pointer to Unicode code point to be translated
- * @codepage: Unicode to codepage translation table
- * Return: 0 on success, -ENOENT if codepoint cannot be translated
- */
int utf_to_cp(s32 *c, const u16 *codepage)
{
if (*c >= 0x80) {
@@ -507,3 +498,49 @@ int utf_to_cp(s32 *c, const u16 *codepage)
}
return 0;
}
+
+int utf8_to_cp437_stream(u8 c, char *buffer)
+{
+ char *end;
+ const char *pos;
+ s32 s;
+ int ret;
+
+ for (;;) {
+ pos = buffer;
+ end = buffer + strlen(buffer);
+ *end++ = c;
+ *end = 0;
+ s = utf8_get();
+ if (s > 0) {
+ *buffer = 0;
+ ret = utf_to_cp(, codepage_437);
+ return s;
+ }
+ if (pos == end)
+ return 0;
+ *buffer = 0;
+ }
+}
+
+int utf8_to_utf32_stream(u8 c, char *buffer)
+{
+ char *end;
+ const char *pos;
+ s32 s;
+
+ for (;;) {
+ pos = buffer;
+ end = buffer + strlen(buffer);
+ *end++ = c;
+ *end = 0;
+ s = utf8_get();
+ if (s > 0) {
+ *buffer = 0;
+ return s;
+ }
+ if (pos == end)
+ return 0;
+ *buffer = 0;
+ }
+}
diff --git a/test/unicode_ut.c b/test/unicode_ut.c
index 154361aea7..6f6aea5f60 100644
--- a/test/unicode_ut.c
+++ b/test/unicode_ut.c
@@ -47,6 +47,9 @@ static const char d3[] = {0xe6, 0xbd, 0x9c, 0xe6, 0xb0, 0xb4,
0xe8, 0x89,
/* Three letters translating to two utf-16 word each */
static const char d4[] = {0xf0, 0x90, 0x92, 0x8d, 0xf0, 0x90, 0x92, 0x96,
0xf0, 0x90, 0x92, 0x87, 0x00};
+/* Letter not in code page 437 */
+static const char d5[] = {0xCE, 0x92, 0x20, 0x69, 0x73, 0x20, 0x6E, 0x6F,
+ 0x74, 0x20, 0x42, 0x00};
/* Illegal utf-8 strings */
static const char j1[] = {0x6a, 0x31, 0xa1, 0x6c, 0x00};
@@ -631,6 +634,81 @@ static int unicode_test_utf_to_cp(struct unit_test_state
*uts)
}
UNICODE_TEST(unicode_test_utf_to_cp);
+static void utf8_to_cp437_stream_helper(const char *in, char *out)
+{
+ char buffer[5];
+ int ret;
+
+ *buffer = 0;
+ for (; *in; ++in) {
+ ret = utf8_to_cp437_stream(*in, buffer);
+ if (ret)
+ *out++ = ret;
+ }
+ *out = 0;
+}
+
+static int unicode_test_utf8_to_cp437_stream(struct unit_test_state *uts)
+{
+ char buf[16];
+
+ utf8_to_cp437_stream_helper(d1, buf);
+ ut_asserteq_str("U-Boot", buf);
+ utf8_to_cp437_stream_helper(d2, buf);
+ ut_asserteq_str("kafb\xa0tur", buf);
+ utf8_to_cp437_stream_helper(d5, buf);
+ ut_asserteq_str("? is not B", buf);
+ utf8_to_cp437_stream_helper(j2, buf);
+ ut_asserteq_str("j2l", buf);
+
+ return 0;
+}
+UNICODE_TEST(unicode_test_utf8_to_cp437_stream);
+
+static void utf8_to_utf32_stream_helper(const char *in, s32 *out)
+{
+ char buffer[5];
+ int ret;
+
+ *buffer = 0;
+ for (; *in; ++in) {
+ ret = utf8_to_utf32_stream(*in, buffer);
+ if (ret)
+ *out++ = ret;
+
[PATCH 2/6] efi_loader: carve out utf_to_cp()
Carve out a function to translate a Unicode code point to an 8bit codepage.
Provide a unit test for the new function.
Signed-off-by: Heinrich Schuchardt
---
include/charset.h | 11 ++
lib/charset.c | 28 +
lib/efi_loader/efi_unicode_collation.c | 19 +++--
test/unicode_ut.c | 29 ++
4 files changed, 71 insertions(+), 16 deletions(-)
diff --git a/include/charset.h b/include/charset.h
index 64ba91f791..52e7d1474e 100644
--- a/include/charset.h
+++ b/include/charset.h
@@ -275,4 +275,15 @@ u16 *u16_strdup(const void *src);
*/
uint8_t *utf16_to_utf8(uint8_t *dest, const uint16_t *src, size_t size);
+/**
+ * utf_to_cp() - translate Unicode code point to 8bit codepage
+ *
+ * Codepoints that do not exist in the codepage are rendered as question mark.
+ *
+ * @c: pointer to Unicode code point to be translated
+ * @codepage: Unicode to codepage translation table
+ * Return: 0 on success, -ENOENT if codepoint cannot be translated
+ */
+int utf_to_cp(s32 *c, const u16 *codepage);
+
#endif /* __CHARSET_H_ */
diff --git a/lib/charset.c b/lib/charset.c
index 814847d165..1345c8f9f0 100644
--- a/lib/charset.c
+++ b/lib/charset.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
/**
@@ -472,3 +473,30 @@ uint8_t *utf16_to_utf8(uint8_t *dest, const uint16_t *src,
size_t size)
return dest;
}
+
+/**
+ * utf_to_cp() - translate Unicode code point to 8bit codepage
+ *
+ * Codepoints that do not exist in the codepage are rendered as question mark.
+ *
+ * @c: pointer to Unicode code point to be translated
+ * @codepage: Unicode to codepage translation table
+ * Return: 0 on success, -ENOENT if codepoint cannot be translated
+ */
+int utf_to_cp(s32 *c, const u16 *codepage)
+{
+ if (*c >= 0x80) {
+ int j;
+
+ /* Look up codepage translation */
+ for (j = 0; j < 0x80; ++j) {
+ if (*c == codepage[j]) {
+ *c = j + 0x80;
+ return 0;
+ }
+ }
+ *c = '?';
+ return -ENOENT;
+ }
+ return 0;
+}
diff --git a/lib/efi_loader/efi_unicode_collation.c
b/lib/efi_loader/efi_unicode_collation.c
index bf5314c4ff..36be798f64 100644
--- a/lib/efi_loader/efi_unicode_collation.c
+++ b/lib/efi_loader/efi_unicode_collation.c
@@ -300,23 +300,10 @@ static bool EFIAPI efi_str_to_fat(struct
efi_unicode_collation_protocol *this,
break;
}
c = utf_to_upper(c);
- if (c >= 0x80) {
- int j;
-
- /* Look for codepage translation */
- for (j = 0; j < 0x80; ++j) {
- if (c == codepage[j]) {
- c = j + 0x80;
- break;
- }
- }
- if (j >= 0x80) {
- c = '_';
- ret = true;
- }
- } else if (c && (c < 0x20 || strchr(illegal, c))) {
- c = '_';
+ if (utf_to_cp(, codepage) ||
+ (c && (c < 0x20 || strchr(illegal, c {
ret = true;
+ c = '_';
}
fat[i] = c;
diff --git a/test/unicode_ut.c b/test/unicode_ut.c
index 6130ef0b54..2cc6b5feff 100644
--- a/test/unicode_ut.c
+++ b/test/unicode_ut.c
@@ -595,6 +595,35 @@ static int unicode_test_u16_strsize(struct unit_test_state
*uts)
}
UNICODE_TEST(unicode_test_u16_strsize);
+static int unicode_test_utf_to_cp(struct unit_test_state *uts)
+{
+ int ret;
+ s32 c;
+
+ c = '\n';
+ ret = utf_to_cp(, codepage_437);
+ ut_asserteq(0, ret);
+ ut_asserteq('\n', c);
+
+ c = 'a';
+ ret = utf_to_cp(, codepage_437);
+ ut_asserteq(0, ret);
+ ut_asserteq('a', c);
+
+ c = 0x03c4; /* Greek small letter tau */
+ ret = utf_to_cp(, codepage_437);
+ ut_asserteq(0, ret);
+ ut_asserteq(0xe7, c);
+
+ c = 0x03a4; /* Greek capital letter tau */
+ ret = utf_to_cp(, codepage_437);
+ ut_asserteq(-ENOENT, ret);
+ ut_asserteq('?', c);
+
+ return 0;
+}
+UNICODE_TEST(unicode_test_utf_to_cp);
+
#ifdef CONFIG_EFI_LOADER
static int unicode_test_efi_create_indexed_name(struct unit_test_state *uts)
{
--
2.30.0
[PATCH 3/6] lib/charset: utf8_get() should return error
utf8_get() should return an error if hitting an illegal UTF-8 sequence and
not silently convert the input to a question mark.
Correct utf_8() and the its unit test.
console_read_unicode() now will ignore illegal UTF-8 sequences.
Signed-off-by: Heinrich Schuchardt
---
lib/charset.c | 25 -
test/unicode_ut.c | 7 +++
2 files changed, 23 insertions(+), 9 deletions(-)
diff --git a/lib/charset.c b/lib/charset.c
index 1345c8f9f0..946d5ee23e 100644
--- a/lib/charset.c
+++ b/lib/charset.c
@@ -32,7 +32,7 @@ static struct capitalization_table capitalization_table[] =
*
* @read_u8: - stream reader
* @src: - string buffer passed to stream reader, optional
- * Return: - Unicode code point
+ * Return: - Unicode code point, or -1
*/
static int get_code(u8 (*read_u8)(void *data), void *data)
{
@@ -78,7 +78,7 @@ static int get_code(u8 (*read_u8)(void *data), void *data)
}
return ch;
error:
- return '?';
+ return -1;
}
/**
@@ -120,14 +120,21 @@ static u8 read_console(void *data)
int console_read_unicode(s32 *code)
{
- if (!tstc()) {
- /* No input available */
- return 1;
- }
+ for (;;) {
+ s32 c;
- /* Read Unicode code */
- *code = get_code(read_console, NULL);
- return 0;
+ if (!tstc()) {
+ /* No input available */
+ return 1;
+ }
+
+ /* Read Unicode code */
+ c = get_code(read_console, NULL);
+ if (c > 0) {
+ *code = c;
+ return 0;
+ }
+ }
}
s32 utf8_get(const char **src)
diff --git a/test/unicode_ut.c b/test/unicode_ut.c
index 2cc6b5feff..154361aea7 100644
--- a/test/unicode_ut.c
+++ b/test/unicode_ut.c
@@ -52,6 +52,7 @@ static const char d4[] = {0xf0, 0x90, 0x92, 0x8d, 0xf0, 0x90,
0x92, 0x96,
static const char j1[] = {0x6a, 0x31, 0xa1, 0x6c, 0x00};
static const char j2[] = {0x6a, 0x32, 0xc3, 0xc3, 0x6c, 0x00};
static const char j3[] = {0x6a, 0x33, 0xf0, 0x90, 0xf0, 0x00};
+static const char j4[] = {0xa1, 0x00};
static int unicode_test_u16_strlen(struct unit_test_state *uts)
{
@@ -165,6 +166,12 @@ static int unicode_test_utf8_get(struct unit_test_state
*uts)
ut_asserteq(0x0001048d, code);
ut_asserteq_ptr(s, d4 + 4);
+ /* Check illegal character */
+ s = j4;
+ code = utf8_get((const char **));
+ ut_asserteq(-1, code);
+ ut_asserteq_ptr(j4 + 1, s);
+
return 0;
}
UNICODE_TEST(unicode_test_utf8_get);
--
2.30.0
[PATCH 1/6] efi_loader: move codepage 437 table
Move the Unicode to codepage 437 table to charset.c Signed-off-by: Heinrich Schuchardt --- include/charset.h | 5 + lib/charset.c | 6 ++ lib/efi_loader/efi_unicode_collation.c | 2 +- 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/include/charset.h b/include/charset.h index cc650a2ce7..64ba91f791 100644 --- a/include/charset.h +++ b/include/charset.h @@ -13,6 +13,11 @@ #define MAX_UTF8_PER_UTF16 3 +/** + * codepage_437 - Unicode to codepage 437 translation table + */ +extern const u16 codepage_437[128]; + /** * console_read_unicode() - read Unicode code point from console * diff --git a/lib/charset.c b/lib/charset.c index 2177014ee1..814847d165 100644 --- a/lib/charset.c +++ b/lib/charset.c @@ -8,9 +8,15 @@ #include #include #include +#include #include #include +/** + * codepage_437 - Unicode to codepage 437 translation table + */ +const u16 codepage_437[128] = CP437; + static struct capitalization_table capitalization_table[] = #ifdef CONFIG_EFI_UNICODE_CAPITALIZATION UNICODE_CAPITALIZATION_TABLE; diff --git a/lib/efi_loader/efi_unicode_collation.c b/lib/efi_loader/efi_unicode_collation.c index f6c875bc33..bf5314c4ff 100644 --- a/lib/efi_loader/efi_unicode_collation.c +++ b/lib/efi_loader/efi_unicode_collation.c @@ -23,7 +23,7 @@ static const char illegal[] = "+,<=>:;\"/\\|?*[]\x7f"; static const u16 codepage[] = CP1250; #else /* Unicode code points for code page 437 characters 0x80 - 0xff */ -static const u16 codepage[] = CP437; +static const u16 *codepage = codepage_437; #endif /* GUID of the EFI_UNICODE_COLLATION_PROTOCOL2 */ -- 2.30.0
[PATCH 0/6] efi_loader: Unicode output in UEFI applications
UEFI programs use Unicode for console output, e.g. GRUB uses characters from the 0x2500 code block to draw a box around the menu. The video console does not understand the UTF-8 codes and renders each byte individually. The series adds the necessary conversions both for the TrueType as well as for the normal and rotated consoles which only support code page 437. Signed-off-by: Heinrich Schuchardt Heinrich Schuchardt (6): efi_loader: move codepage 437 table efi_loader: carve out utf_to_cp() lib/charset: utf8_get() should return error lib/charset: UTF-8 stream conversion video: use int for character in putc_xy() video: support Unicode in video console drivers/video/console_normal.c | 2 +- drivers/video/console_rotate.c | 6 +- drivers/video/console_truetype.c | 2 +- drivers/video/vidconsole-uclass.c | 29 ++- include/charset.h | 34 include/video_console.h| 4 +- lib/charset.c | 96 +++-- lib/efi_loader/efi_unicode_collation.c | 21 + test/unicode_ut.c | 114 + 9 files changed, 271 insertions(+), 37 deletions(-) -- 2.30.0
Re: [PATCH v2 1/3] cmd: mvebu: Implement the Marvell hw_info command
Luka, Tom, I am very against this. there already is `mac` command in cmd/mac.c with following help display and program the system ID and MAC addresses in EEPROM [read|save|id|num|errata|date|ports|port_number] mac read - read EEPROM content into memory data structure mac save - save memory data structure to the EEPROM mac id - program system id per hard coded value mac num string - program system serial number to value string mac errata string - program errata data to value string mac date YYMMDDhhmmss - program date to string value YYMMDDhhmmss mac ports N - program the number of network ports to integer N mac X string - program MAC addr for port X [X=0,1..] to colon separated string" Why introducing new, vendor specific commands, when we have a global API for such a thing? Marek
Re: [EXT] [PATCH] ARM: imx: Add OCRAM_S into iMX8M MMU tables
On 2/27/21 7:26 AM, Ye Li wrote:
Hi Marek,
Hi,
[...]
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-
imx/imx8m/soc.c
index 5456c10fb17..225e4e12500 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -104,6 +104,13 @@ static struct mm_region imx8m_mem_map[] = {
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* OCRAM_S */
+ .virt = 0x18UL,
+ .phys = 0x18UL,
+ .size = 0x8000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+PTE_BLOCK_OUTER_SHARE
}, {
/* TCM */
.virt = 0x7CUL,
--
2.30.0
OCRAM_S is used by ATF and SPL to pass DDR CSR data.
Where is this implemented ?
See below definition in drivers/ddr/imx/imx8m/Kconfig
config SAVED_DRAM_TIMING_BASE
hex "Define the base address for saved dram timing"
help
after DRAM is trained, need to save the dram related timming
info into memory for low power use. OCRAM_S is used for this
purpose on i.MX8MM.
default 0x18
So, this just defines some sort of value. Note that some boards do
override this value to NOT point into OCRAM_S .
I think what you wanted to point me to is drivers/ddr/imx/imx8m/ddr_init.c:
248 dram_config_save(dram_timing, CONFIG_SAVED_DRAM_TIMING_BASE);
which writes regular memory. And that regular memory can very well be
cacheable.
It is better not
use it in u-boot to avoid any DDR issue.
The MMU table entry does not trigger any IO to the OCRAM_S , it
merely
makes it cacheable .
That's fine to add a map, just remind to use it carefully since it
already used by ATF.
Not necessarily, use git grep SAVED_DRAM_TIMING_BASE configs/ and see
how some boards change the default in configs/ .
And this imx8m_mem_map will be modified at runtime to get rid of
optee
memory. When OCRAM_S is added, the index used in enable_caches and
dram_init need update as well.
I'm not sure I understand this. What kind of modification are you
talking about ? The DRAM entry offset should be determined
automatically, so there shouldn't be any need to hand-tune ad-hoc
offsets.
You also need below change, the index for DRAM1 is used in codes to
help remove the OPTEE space from MMU table.
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -167,10 +167,10 @@ void enable_caches(void)
* please make sure that entry initial value matches
* imx8m_mem_map for DRAM1
*/
- int entry = 5;
+ int entry = 6;
OK, then this hard-coding of random offset is nasty and should be fixed.
For example iterate over imx8m_mem_map[] and detect entry which has PA
>= 0x4000 , that's your DRAM.
u64 attrs = imx8m_mem_map[entry].attrs;
- while (i < CONFIG_NR_DRAM_BANKS && entry < 8) {
+ while (i < CONFIG_NR_DRAM_BANKS && entry < 9) {
if (gd->bd->bi_dram[i].start == 0)
break;
imx8m_mem_map[entry].phys = gd->bd-
bi_dram[i].start;
@@ -212,7 +212,7 @@ int dram_init(void)
gd->ram_size = sdram_size;
/* also update the SDRAM size in the mem_map used externally */
- imx8m_mem_map[5].size = sdram_size;
+ imx8m_mem_map[6].size = sdram_size;
#ifdef PHYS_SDRAM_2_SIZE
gd->ram_size += PHYS_SDRAM_2_SIZE;
[...]
Re: [PATCH] ARM: imx: imx8mn-ddr4-evk: Add ethernet support
On 2/27/21 8:54 AM, Jagan Teki wrote: Hi Marek, On Sat, Feb 27, 2021 at 3:44 AM Marek Vasut wrote: Add support for ethernet on the imx8mn-ddr4-evk. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Peng Fan Cc: Stefano Babic --- arch/arm/dts/imx8mn-evk.dtsi| 1 + board/freescale/imx8mn_evk/imx8mn_evk.c | 41 +++-- configs/imx8mn_ddr4_evk_defconfig | 8 + 3 files changed, 47 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/imx8mn-evk.dtsi b/arch/arm/dts/imx8mn-evk.dtsi index 76d042a4cf0..416fadb22b1 100644 --- a/arch/arm/dts/imx8mn-evk.dtsi +++ b/arch/arm/dts/imx8mn-evk.dtsi @@ -53,6 +53,7 @@ pinctrl-0 = <_fec1>; phy-mode = "rgmii-id"; phy-handle = <>; + phy-reset-gpios = < 22 GPIO_ACTIVE_LOW>; I believe this is phy reset-gpio to be part of mdio child node. any idea why it added in fec1 node? Try $ git grep phy-reset drivers/net/ , that should clarify it all. In short, FEC in U-Boot still uses legacy bindings.
[PATCH 1/1] video: add DejaVu Mono font
A TrueType font for U-Boot should fulfill the following requirements:
* mono spaced
* support full code page 437
* easily readable
Unfortunately none of the fonts provided with U-Boot fulfills all of these
requirements.
Let's add the DejaVu Mono font. To reduce the code size the characters are
limited to code page 437.
Signed-off-by: Heinrich Schuchardt
---
Licenses/dejavu_font_license.txt| 187
drivers/video/console_truetype.c| 4 +
drivers/video/fonts/Kconfig | 10 +-
drivers/video/fonts/Makefile| 1 +
drivers/video/fonts/dejavu_mono.ttf | Bin 0 -> 41056 bytes
5 files changed, 201 insertions(+), 1 deletion(-)
create mode 100644 Licenses/dejavu_font_license.txt
create mode 100644 drivers/video/fonts/dejavu_mono.ttf
diff --git a/Licenses/dejavu_font_license.txt b/Licenses/dejavu_font_license.txt
new file mode 100644
index 00..df52c1709b
--- /dev/null
+++ b/Licenses/dejavu_font_license.txt
@@ -0,0 +1,187 @@
+Fonts are (c) Bitstream (see below). DejaVu changes are in public domain.
+Glyphs imported from Arev fonts are (c) Tavmjong Bah (see below)
+
+
+Bitstream Vera Fonts Copyright
+--
+
+Copyright (c) 2003 by Bitstream, Inc. All Rights Reserved. Bitstream Vera is
+a trademark of Bitstream, Inc.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of the fonts accompanying this license ("Fonts") and associated
+documentation files (the "Font Software"), to reproduce and distribute the
+Font Software, including without limitation the rights to use, copy, merge,
+publish, distribute, and/or sell copies of the Font Software, and to permit
+persons to whom the Font Software is furnished to do so, subject to the
+following conditions:
+
+The above copyright and trademark notices and this permission notice shall
+be included in all copies of one or more of the Font Software typefaces.
+
+The Font Software may be modified, altered, or added to, and in particular
+the designs of glyphs or characters in the Fonts may be modified and
+additional glyphs or characters may be added to the Fonts, only if the fonts
+are renamed to names not containing either the words "Bitstream" or the word
+"Vera".
+
+This License becomes null and void to the extent applicable to Fonts or Font
+Software that has been modified and is distributed under the "Bitstream
+Vera" names.
+
+The Font Software may be sold as part of a larger software package but no
+copy of one or more of the Font Software typefaces may be sold by itself.
+
+THE FONT SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+OR IMPLIED, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF COPYRIGHT, PATENT,
+TRADEMARK, OR OTHER RIGHT. IN NO EVENT SHALL BITSTREAM OR THE GNOME
+FOUNDATION BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, INCLUDING
+ANY GENERAL, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES,
+WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+THE USE OR INABILITY TO USE THE FONT SOFTWARE OR FROM OTHER DEALINGS IN THE
+FONT SOFTWARE.
+
+Except as contained in this notice, the names of Gnome, the Gnome
+Foundation, and Bitstream Inc., shall not be used in advertising or
+otherwise to promote the sale, use or other dealings in this Font Software
+without prior written authorization from the Gnome Foundation or Bitstream
+Inc., respectively. For further information, contact: fonts at gnome dot
+org.
+
+Arev Fonts Copyright
+--
+
+Copyright (c) 2006 by Tavmjong Bah. All Rights Reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining
+a copy of the fonts accompanying this license ("Fonts") and
+associated documentation files (the "Font Software"), to reproduce
+and distribute the modifications to the Bitstream Vera Font Software,
+including without limitation the rights to use, copy, merge, publish,
+distribute, and/or sell copies of the Font Software, and to permit
+persons to whom the Font Software is furnished to do so, subject to
+the following conditions:
+
+The above copyright and trademark notices and this permission notice
+shall be included in all copies of one or more of the Font Software
+typefaces.
+
+The Font Software may be modified, altered, or added to, and in
+particular the designs of glyphs or characters in the Fonts may be
+modified and additional glyphs or characters may be added to the
+Fonts, only if the fonts are renamed to names not containing either
+the words "Tavmjong Bah" or the word "Arev".
+
+This License becomes null and void to the extent applicable to Fonts
+or Font Software that has been modified and is distributed under the
+"Tavmjong Bah Arev" names.
+
+The Font Software may be sold as part of a larger software package but
+no copy of one or more of the Font Software typefaces may be sold by
+itself.
+
+THE FONT SOFTWARE IS
[PATCH 4/5] board: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
i.Core MX8M Mini needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.
Add support for it.
Signed-off-by: Jagan Teki
---
arch/arm/dts/Makefile |1 +
.../imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi | 31 +
arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2.dts | 97 +
arch/arm/dts/imx8mm-icore-mx8mm-u-boot.dtsi | 27 +
arch/arm/mach-imx/imx8m/Kconfig | 14 +
board/engicam/imx8mm/Kconfig | 14 +
board/engicam/imx8mm/MAINTAINERS |7 +
board/engicam/imx8mm/Makefile | 12 +
board/engicam/imx8mm/icore_mx8mm.c| 21 +
board/engicam/imx8mm/lpddr4_timing.c | 1847 +
board/engicam/imx8mm/spl.c| 101 +
configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 84 +
include/configs/imx8mm_icore_mx8mm.h | 58 +
13 files changed, 2314 insertions(+)
create mode 100644 arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi
create mode 100644 arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2.dts
create mode 100644 arch/arm/dts/imx8mm-icore-mx8mm-u-boot.dtsi
create mode 100644 board/engicam/imx8mm/Kconfig
create mode 100644 board/engicam/imx8mm/MAINTAINERS
create mode 100644 board/engicam/imx8mm/Makefile
create mode 100644 board/engicam/imx8mm/icore_mx8mm.c
create mode 100644 board/engicam/imx8mm/lpddr4_timing.c
create mode 100644 board/engicam/imx8mm/spl.c
create mode 100644 configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
create mode 100644 include/configs/imx8mm_icore_mx8mm.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 33e483f4fb..accf96bfc3 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -782,6 +782,7 @@ dtb-$(CONFIG_ARCH_IMX8) += \
imx8-giedi.dtb
dtb-$(CONFIG_ARCH_IMX8M) += \
+ imx8mm-icore-mx8mm-edimm2.2.dtb \
imx8mm-evk.dtb \
imx8mm-verdin.dtb \
phycore-imx8mm.dtb \
diff --git a/arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi
b/arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi
new file mode 100644
index 00..8b67bcff7d
--- /dev/null
+++ b/arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+#include "imx8mm-icore-mx8mm-u-boot.dtsi"
+
+ {
+ u-boot,dm-spl;
+};
+
+_uart2 {
+ u-boot,dm-spl;
+};
+
+_usdhc1_gpio {
+ u-boot,dm-spl;
+};
+
+_usdhc1 {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2.dts
b/arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2.dts
new file mode 100644
index 00..a4a2ada148
--- /dev/null
+++ b/arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2.dts
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 NXP
+ * Copyright (c) 2019 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "imx8mm.dtsi"
+#include "imx8mm-icore-mx8mm.dtsi"
+
+/ {
+ model = "Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit";
+ compatible = "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm",
+"fsl,imx8mm";
+
+ chosen {
+ stdout-path =
+ };
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ clock-frequency = <40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c2>;
+ status = "okay";
+};
+
+ {
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c4>;
+ status = "okay";
+};
+
+ {
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x41c3
+ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x41c3
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x41c3
+ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x41c3
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
+ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
+ >;
+ };
+
+ pinctrl_usdhc1_gpio: usdhc1gpiogrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x41
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+
[PATCH 5/5] board: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.
Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
i.Core MX8M Mini needs to mount on top of this Carrier board for
creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
Add support for it.
Signed-off-by: Jagan Teki
---
arch/arm/dts/Makefile | 1 +
.../imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi| 31 ++
arch/arm/dts/imx8mm-icore-mx8mm-ctouch2.dts | 97 +++
arch/arm/mach-imx/imx8m/Kconfig | 5 +
board/engicam/imx8mm/MAINTAINERS | 6 ++
configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 84
6 files changed, 224 insertions(+)
create mode 100644 arch/arm/dts/imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi
create mode 100644 arch/arm/dts/imx8mm-icore-mx8mm-ctouch2.dts
create mode 100644 configs/imx8mm-icore-mx8mm-ctouch2_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index accf96bfc3..f478f6f18f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -782,6 +782,7 @@ dtb-$(CONFIG_ARCH_IMX8) += \
imx8-giedi.dtb
dtb-$(CONFIG_ARCH_IMX8M) += \
+ imx8mm-icore-mx8mm-ctouch2.dtb \
imx8mm-icore-mx8mm-edimm2.2.dtb \
imx8mm-evk.dtb \
imx8mm-verdin.dtb \
diff --git a/arch/arm/dts/imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi
b/arch/arm/dts/imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi
new file mode 100644
index 00..8b67bcff7d
--- /dev/null
+++ b/arch/arm/dts/imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+#include "imx8mm-icore-mx8mm-u-boot.dtsi"
+
+ {
+ u-boot,dm-spl;
+};
+
+_uart2 {
+ u-boot,dm-spl;
+};
+
+_usdhc1_gpio {
+ u-boot,dm-spl;
+};
+
+_usdhc1 {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx8mm-icore-mx8mm-ctouch2.dts
b/arch/arm/dts/imx8mm-icore-mx8mm-ctouch2.dts
new file mode 100644
index 00..5389d6f2be
--- /dev/null
+++ b/arch/arm/dts/imx8mm-icore-mx8mm-ctouch2.dts
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 NXP
+ * Copyright (c) 2019 Engicam srl
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include "imx8mm.dtsi"
+#include "imx8mm-icore-mx8mm.dtsi"
+
+/ {
+ model = "Engicam i.Core MX8M Mini C.TOUCH 2.0";
+ compatible = "engicam,icore-mx8mm-ctouch2", "engicam,icore-mx8mm",
+"fsl,imx8mm";
+
+ chosen {
+ stdout-path =
+ };
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ clock-frequency = <40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c2>;
+ status = "okay";
+};
+
+ {
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c4>;
+ status = "okay";
+};
+
+ {
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x41c3
+ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x41c3
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x41c3
+ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x41c3
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
+ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
+ >;
+ };
+
+ pinctrl_usdhc1_gpio: usdhc1gpiogrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x41
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
+ MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
+ MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
+ MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
+ MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
+ MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
+ >;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_uart2>;
+ status = "okay";
+};
+
+/* SD */
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_usdhc1>, <_usdhc1_gpio>;
+ cd-gpios = < 6 GPIO_ACTIVE_LOW>;
+ max-frequency = <5000>;
+ bus-width = <4>;
+ no-1-8-v;
+ pm-ignore-notify;
+ keep-power-in-suspend;
+ status = "okay";
+};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig
[PATCH 3/5] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini
from Engicam.
General features:
- NXP i.MX8M Mini
- Up to 2GB LDDR4
- 8/16GB eMMC
- Gigabit Ethernet
- USB 2.0 Host/OTG
- PCIe Gen2 interface
- I2S
- MIPI DSI to LVDS
- rest of i.MX8M Mini features
i.Core MX8M Mini needs to mount on top of Engicam baseboards
for creating complete platform solutions.
Add support for it.
Signed-off-by: Matteo Lisi
Signed-off-by: Jagan Teki
---
arch/arm/dts/imx8mm-icore-mx8mm.dtsi | 232 +++
1 file changed, 232 insertions(+)
create mode 100644 arch/arm/dts/imx8mm-icore-mx8mm.dtsi
diff --git a/arch/arm/dts/imx8mm-icore-mx8mm.dtsi
b/arch/arm/dts/imx8mm-icore-mx8mm.dtsi
new file mode 100644
index 00..b40148d728
--- /dev/null
+++ b/arch/arm/dts/imx8mm-icore-mx8mm.dtsi
@@ -0,0 +1,232 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 NXP
+ * Copyright (c) 2019 Engicam srl
+ * Copyright (c) 2020 Amarula Solutons(India)
+ */
+
+/ {
+ compatible = "engicam,icore-mx8mm", "fsl,imx8mm";
+};
+
+_0 {
+ cpu-supply = <_buck4>;
+};
+
+_1 {
+ cpu-supply = <_buck4>;
+};
+
+_2 {
+ cpu-supply = <_buck4>;
+};
+
+_3 {
+ cpu-supply = <_buck4>;
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_fec1>;
+ phy-mode = "rgmii-id";
+ phy-handle = <>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy: ethernet-phy@3 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <3>;
+ reset-gpios = < 7 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <1>;
+ };
+ };
+};
+
+ {
+ clock-frequency = <40>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c1>;
+ status = "okay";
+
+ pmic@8 {
+ compatible = "nxp,pf8121a";
+ reg = <0x08>;
+
+ regulators {
+ reg_ldo1: ldo1 {
+ regulator-min-microvolt = <150>;
+ regulator-max-microvolt = <500>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_ldo2: ldo2 {
+ regulator-min-microvolt = <150>;
+ regulator-max-microvolt = <500>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_ldo3: ldo3 {
+ regulator-min-microvolt = <150>;
+ regulator-max-microvolt = <500>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_ldo4: ldo4 {
+ regulator-min-microvolt = <150>;
+ regulator-max-microvolt = <500>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_buck1: buck1 {
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_buck2: buck2 {
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_buck3: buck3 {
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_buck4: buck4 {
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_buck5: buck5 {
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_buck6: buck6 {
+ regulator-min-microvolt = <40>;
+ regulator-max-microvolt = <180>;
+
[PATCH 2/5] configs: Add imx8mm-common header
Move the redundant config item like SPL, memory-related across all imx8mm config files in the common config header, imx8mm-common.h Verified the built files, seems almost the same as before. Cc: Adam Ford Cc: Peng Fan Cc: Teresa Remmet Cc: Igor Opaniuk Signed-off-by: Jagan Teki --- include/configs/imx8mm-common.h | 48 include/configs/imx8mm_beacon.h | 48 include/configs/imx8mm_evk.h | 45 ++ include/configs/phycore_imx8mm.h | 43 ++-- include/configs/verdin-imx8mm.h | 42 +++- 5 files changed, 63 insertions(+), 163 deletions(-) create mode 100644 include/configs/imx8mm-common.h diff --git a/include/configs/imx8mm-common.h b/include/configs/imx8mm-common.h new file mode 100644 index 00..f1afa5c5a9 --- /dev/null +++ b/include/configs/imx8mm-common.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2019 NXP + * Copyright (c) 2020 Amarula Solutions(India) + */ + +#ifndef __IMX8MM_COMMON_H +#define __IMX8MM_COMMON_H + +#include +#include + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_MAX_SIZE(148 * 1024) +#define CONFIG_SPL_STACK 0x92 +#define CONFIG_SPL_BSS_START_ADDR 0x91 +#define CONFIG_SPL_BSS_MAX_SIZESZ_8K +#define CONFIG_SYS_SPL_MALLOC_START0x4220 +#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K + +/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ +#define CONFIG_MALLOC_F_ADDR 0x93 +/* For RAW image gives a error info not panic */ +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE +#endif /* CONFIG_SPL_BUILD */ + +#define CONFIG_SYS_MONITOR_LEN SZ_512K +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR0x300 +#define CONFIG_SYS_UBOOT_BASE \ + (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) + +#define CONFIG_SYS_INIT_RAM_ADDR0x4000 +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN SZ_32M + +#define CONFIG_SYS_SDRAM_BASE 0x4000 +#define PHYS_SDRAM 0x4000 + +#define CONFIG_LOADADDR0x4048 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#endif /* __IMX8MM_COMMON_H */ diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 94f4a1232f..65a44a9ed9 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -6,29 +6,13 @@ #ifndef __IMX8MM_BEACON_H #define __IMX8MM_BEACON_H -#include -#include +#define CONFIG_SYS_INIT_RAM_SIZE 0x20 +#define PHYS_SDRAM_SIZE0x8000 /* 2GB DDR */ -#define CONFIG_SPL_MAX_SIZE(148 * 1024) -#define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR0x300 -#define CONFIG_SYS_UBOOT_BASE \ - (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) +#include "imx8mm-common.h" -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x92 -#define CONFIG_SPL_BSS_START_ADDR 0x91 -#define CONFIG_SPL_BSS_MAX_SIZESZ_8K /* 8 KB */ -#define CONFIG_SYS_SPL_MALLOC_START0x4220 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ - -/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x93 -/* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE - -#endif +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -92,28 +76,6 @@ "fi; " \ "fi;" -/* Link Definitions */ -#define CONFIG_LOADADDR0x4048 - -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - -#define CONFIG_SYS_INIT_RAM_ADDR0x4000 -#define CONFIG_SYS_INIT_RAM_SIZE0x20 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN SZ_32M - -#define CONFIG_SYS_SDRAM_BASE 0x4000 -#define PHYS_SDRAM 0x4000 -#define PHYS_SDRAM_SIZE0x8000 /* 2GB DDR */ - -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) - #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
[PATCH 1/5] arm64: dts: imx8mm: Add common -u-boot.dtsi
/soc@0
aips1
aips2
aips3
clk
iomuxc
osc_24m
are common node enablements across imx8mm platform for
dm-spi, dm-pre-reloc stages.
Move them into common dtsi, imx8mm-u-boot.dtsi
Cc: Adam Ford
Cc: Peng Fan
Cc: Teresa Remmet
Cc: Igor Opaniuk
Signed-off-by: Jagan Teki
---
arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi | 37 ++--
arch/arm/dts/imx8mm-evk-u-boot.dtsi| 37 ++--
arch/arm/dts/imx8mm-u-boot.dtsi| 39 ++
arch/arm/dts/imx8mm-verdin-u-boot.dtsi | 38 ++---
arch/arm/dts/phycore-imx8mm-u-boot.dtsi| 37 ++--
5 files changed, 48 insertions(+), 140 deletions(-)
create mode 100644 arch/arm/dts/imx8mm-u-boot.dtsi
diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
index 6d80a529ae..73ddfdade6 100644
--- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright 2020 Compass Electronics Group, LLC
*/
+#include "imx8mm-u-boot.dtsi"
+
/ {
wdt-reboot {
compatible = "wdt-reboot";
@@ -11,32 +13,6 @@
};
};
-&{/soc@0} {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- /delete-property/ assigned-clock-rates;
-};
-
_usdhc2_vmmc {
u-boot,off-on-delay-us = <2>;
};
@@ -65,15 +41,6 @@
u-boot,dm-spl;
};
- {
- u-boot,dm-spl;
-};
-
-_24m {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
_0 {
compatible = "ti,tca6416";
};
diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi
b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
index e843a5648e..79dffe7ccd 100644
--- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright 2019 NXP
*/
+#include "imx8mm-u-boot.dtsi"
+
/ {
wdt-reboot {
compatible = "wdt-reboot";
@@ -11,41 +13,6 @@
};
};
-&{/soc@0} {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- /delete-property/ assigned-clock-rates;
-};
-
-_24m {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
_usdhc2_vmmc {
u-boot,off-on-delay-us = <2>;
};
diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
new file mode 100644
index 00..f833d9df59
--- /dev/null
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Jagan Teki
+ */
+
+&{/soc@0} {
+ u-boot,dm-pre-reloc;
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ /delete-property/ assigned-clock-rates;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+_24m {
+ u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/imx8mm-verdin-u-boot.dtsi
b/arch/arm/dts/imx8mm-verdin-u-boot.dtsi
index 249b0f8f66..67c31c49b6 100644
--- a/arch/arm/dts/imx8mm-verdin-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-verdin-u-boot.dtsi
@@ -2,6 +2,9 @@
/*
* Copyright 2020 Toradex
*/
+
+#include "imx8mm-u-boot.dtsi"
+
/ {
wdt-reboot {
compatible = "wdt-reboot";
@@ -10,27 +13,6 @@
};
};
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- /delete-property/ assigned-clock-rates;
-};
-
{
u-boot,dm-spl;
};
@@ -55,15 +37,6 @@
u-boot,dm-spl;
};
- {
- u-boot,dm-spl;
-};
-
-_24m {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
_i2c1 {
u-boot,dm-spl;
};
@@ -84,11 +57,6 @@
u-boot,dm-spl;
};
-&{/soc@0} {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
-
&{/soc@0/bus@3080/i2c@30a2/pmic} {
u-boot,dm-spl;
};
diff --git a/arch/arm/dts/phycore-imx8mm-u-boot.dtsi
b/arch/arm/dts/phycore-imx8mm-u-boot.dtsi
index fc0fa22d1b..91515b8df9 100644
--- a/arch/arm/dts/phycore-imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/phycore-imx8mm-u-boot.dtsi
@@ -4,6 +4,8 @@
* Author: Teresa Remmet
*/
[PATCH 0/5] board: imx8mm: Add Engicam i.Core MX8M Mini SoM
Patch series for Engicam i.Core MX8M Mini SOM and it's associated carrier board dts(i) support. dts(i) patches are part of Linux mainling-list. patch 1-2: exiting imx8mm dts, header improvement code patch 3: Engicam i.Core MX8M Mini SoM dts patch 4-5: EDIMM2.2, C.TOUCH 2.0 Carrier boards Any inputs? Jagan. Jagan Teki (5): arm64: dts: imx8mm: Add common -u-boot.dtsi configs: Add imx8mm-common header arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM board: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit board: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0 arch/arm/dts/Makefile |2 + arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi| 37 +- arch/arm/dts/imx8mm-evk-u-boot.dtsi | 37 +- .../imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi| 31 + arch/arm/dts/imx8mm-icore-mx8mm-ctouch2.dts | 97 + .../imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi | 31 + arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2.dts | 97 + arch/arm/dts/imx8mm-icore-mx8mm-u-boot.dtsi | 27 + arch/arm/dts/imx8mm-icore-mx8mm.dtsi | 232 +++ arch/arm/dts/imx8mm-u-boot.dtsi | 39 + arch/arm/dts/imx8mm-verdin-u-boot.dtsi| 38 +- arch/arm/dts/phycore-imx8mm-u-boot.dtsi | 37 +- arch/arm/mach-imx/imx8m/Kconfig | 19 + board/engicam/imx8mm/Kconfig | 14 + board/engicam/imx8mm/MAINTAINERS | 13 + board/engicam/imx8mm/Makefile | 12 + board/engicam/imx8mm/icore_mx8mm.c| 21 + board/engicam/imx8mm/lpddr4_timing.c | 1847 + board/engicam/imx8mm/spl.c| 101 + configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 84 + configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 84 + include/configs/imx8mm-common.h | 48 + include/configs/imx8mm_beacon.h | 48 +- include/configs/imx8mm_evk.h | 45 +- include/configs/imx8mm_icore_mx8mm.h | 58 + include/configs/phycore_imx8mm.h | 43 +- include/configs/verdin-imx8mm.h | 42 +- 27 files changed, 2881 insertions(+), 303 deletions(-) create mode 100644 arch/arm/dts/imx8mm-icore-mx8mm-ctouch2-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mm-icore-mx8mm-ctouch2.dts create mode 100644 arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mm-icore-mx8mm-edimm2.2.dts create mode 100644 arch/arm/dts/imx8mm-icore-mx8mm-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mm-icore-mx8mm.dtsi create mode 100644 arch/arm/dts/imx8mm-u-boot.dtsi create mode 100644 board/engicam/imx8mm/Kconfig create mode 100644 board/engicam/imx8mm/MAINTAINERS create mode 100644 board/engicam/imx8mm/Makefile create mode 100644 board/engicam/imx8mm/icore_mx8mm.c create mode 100644 board/engicam/imx8mm/lpddr4_timing.c create mode 100644 board/engicam/imx8mm/spl.c create mode 100644 configs/imx8mm-icore-mx8mm-ctouch2_defconfig create mode 100644 configs/imx8mm-icore-mx8mm-edimm2.2_defconfig create mode 100644 include/configs/imx8mm-common.h create mode 100644 include/configs/imx8mm_icore_mx8mm.h -- 2.25.1
