Re: [PATCH] riscv: sifive: Fix OF_BOARD boot failure

[Ilias Apalodimas]

Hi Bin,

On Wed, 5 Jan 2022 at 03:08, Bin Meng  wrote:
>
> When using QEMU to have a quick test of booting U-Boot S-mode payload
> directly without the needs of preparing the SPI flash or SD card images
> for SiFive Unleashed board, as per the instructions [1], it currently
> does not boot any more.
>
> This was caused by the OF_PRIOR_STAGE removal, as gd->fdt_blob no longer
> points to a valid DTB. OF_BOARD is supposed to replace OF_PRIOR_STAGE,
> hence we need to add the OF_BOARD logic in board_fdt_blob_setup().

Looking at the patch history I found these It seems that I had
something similar on [1] but forgot to add it under the Kconfig after
all.

[1] https://lore.kernel.org/u-boot/yvq9mbtzjpp9+...@apalos.home/

I'd prefer if someone with a RISC-V board checked this as well but FWIW

Reviewed-by: Ilias Apalodimas 
>
> [1] 
> https://qemu.readthedocs.io/en/latest/system/riscv/sifive_u.html#running-u-boot
>
> Fixes: 2e8d2f88439d ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards")
> Fixes: d6f8ab30a2af ("treewide: Remove OF_PRIOR_STAGE")
> Signed-off-by: Bin Meng 
> ---
>
>  board/sifive/unleashed/unleashed.c | 2 +-
>  board/sifive/unmatched/unmatched.c | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/board/sifive/unleashed/unleashed.c 
> b/board/sifive/unleashed/unleashed.c
> index 3c3e0e1d0d..f8aad862c6 100644
> --- a/board/sifive/unleashed/unleashed.c
> +++ b/board/sifive/unleashed/unleashed.c
> @@ -117,7 +117,7 @@ int misc_init_r(void)
>  void *board_fdt_blob_setup(int *err)
>  {
> *err = 0;
> -   if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
> +   if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
> if (gd->arch.firmware_fdt_addr)
> return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr;
> }
> diff --git a/board/sifive/unmatched/unmatched.c 
> b/board/sifive/unmatched/unmatched.c
> index 4895909f8d..6295deeae2 100644
> --- a/board/sifive/unmatched/unmatched.c
> +++ b/board/sifive/unmatched/unmatched.c
> @@ -14,7 +14,7 @@
>  void *board_fdt_blob_setup(int *err)
>  {
> *err = 0;
> -   if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
> +   if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
> if (gd->arch.firmware_fdt_addr)
> return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr;
> }
> --
> 2.25.1
>

[PATCH v2] rockchip: timer: add OF_PLATDATA support for dw-apb-timer

[Johan Jonker]

The Rockchip rk3066 SoC has 3 dw-apb-timer nodes.
U-boot is compiled with OF_PLATDATA TPL/SPL options,
so add OF_PLATDATA support for the dw-apb-timer.
Also change driver name to be able to compile with
U-boot scripts. No reset OF_PLATDATA support was added,
because the rk3066 nodes don't need/have them.

Signed-off-by: Johan Jonker 
---

Changed V2:
  replace if (IS_ENABLED(OF_REAL)) by #if CONFIG_IS_ENABLED(OF_REAL)
---
 drivers/timer/dw-apb-timer.c | 30 +-
 1 file changed, 25 insertions(+), 5 deletions(-)

diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c
index 9aed5dd2..9ba8695f 100644
--- a/drivers/timer/dw-apb-timer.c
+++ b/drivers/timer/dw-apb-timer.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -25,6 +26,12 @@ struct dw_apb_timer_priv {
struct reset_ctl_bulk resets;
 };
 
+struct dw_apb_timer_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+   struct dtd_snps_dw_apb_timer dtplat;
+#endif
+};
+
 static u64 dw_apb_timer_get_count(struct udevice *dev)
 {
struct dw_apb_timer_priv *priv = dev_get_priv(dev);
@@ -43,7 +50,18 @@ static int dw_apb_timer_probe(struct udevice *dev)
struct dw_apb_timer_priv *priv = dev_get_priv(dev);
struct clk clk;
int ret;
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+   struct dw_apb_timer_plat *plat = dev_get_plat(dev);
+   struct dtd_snps_dw_apb_timer *dtplat = >dtplat;
 
+   priv->regs = dtplat->reg[0];
+
+   ret = clk_get_by_phandle(dev, >clocks[0], );
+   if (ret < 0)
+   return ret;
+
+   uc_priv->clock_rate = dtplat->clock_frequency;
+#else
ret = reset_get_bulk(dev, >resets);
if (ret)
dev_warn(dev, "Can't get reset: %d\n", ret);
@@ -57,7 +75,7 @@ static int dw_apb_timer_probe(struct udevice *dev)
uc_priv->clock_rate = clk_get_rate();
 
clk_free();
-
+#endif
/* init timer */
writel(0x, priv->regs + DW_APB_LOAD_VAL);
writel(0x, priv->regs + DW_APB_CURR_VAL);
@@ -68,10 +86,11 @@ static int dw_apb_timer_probe(struct udevice *dev)
 
 static int dw_apb_timer_of_to_plat(struct udevice *dev)
 {
+#if CONFIG_IS_ENABLED(OF_REAL)
struct dw_apb_timer_priv *priv = dev_get_priv(dev);
 
priv->regs = dev_read_addr(dev);
-
+#endif
return 0;
 }
 
@@ -91,13 +110,14 @@ static const struct udevice_id dw_apb_timer_ids[] = {
{}
 };
 
-U_BOOT_DRIVER(dw_apb_timer) = {
-   .name   = "dw_apb_timer",
+U_BOOT_DRIVER(snps_dw_apb_timer) = {
+   .name   = "snps_dw_apb_timer",
.id = UCLASS_TIMER,
.ops= _apb_timer_ops,
.probe  = dw_apb_timer_probe,
.of_match   = dw_apb_timer_ids,
-   .of_to_plat = dw_apb_timer_of_to_plat,
+   .of_to_plat = dw_apb_timer_of_to_plat,
.remove = dw_apb_timer_remove,
.priv_auto  = sizeof(struct dw_apb_timer_priv),
+   .plat_auto  = sizeof(struct dw_apb_timer_plat),
 };
-- 
2.20.1

Re: [PATCH] usb: xhci: reset endpoint on USB stall

[Bin Meng]

Hi Stefan,

On Wed, Jan 5, 2022 at 3:48 AM Stefan Agner  wrote:
>
> Bin Meng,
>
> On 2021-09-27 17:14, Marek Vasut wrote:
> > On 9/27/21 2:42 PM, Stefan Agner wrote:
> >> There are devices which cause a USB stall when trying to read strings.
> >> Specifically Arduino Mega R3 stalls when trying to read the product
> >> string.
> >>
> >> The stall currently remains unhandled, and subsequent retries submit new
> >> transfers on a stopped endpoint which ultimately cause a crash in
> >> abort_td():
> >> WARN halted endpoint, queueing URB anyway.
> >> XHCI control transfer timed out, aborting...
> >> Unexpected XHCI event TRB, skipping... (3affe040  1300 
> >> 02008401)
> >> BUG at drivers/usb/host/xhci-ring.c:505/abort_td()!
> >> BUG!
> >> resetting ...
> >>
> >> Linux seems to be able to recover from the stall by issuing a
> >> TRB_RESET_EP command.
> >>
> >> Introduce reset_ep() which issues a TRB_RESET_EP followed by setting the
> >> transfer ring dequeue pointer via TRB_SET_DEQ. This allows to properly
> >> recover from a USB stall error and continue communicating with the USB
> >> device.
> >>
> >> Signed-off-by: Stefan Agner 
> >
> > I hope to get AB/RB from Bin here, then it can go into this release I think.
>
> Any chance you could have a look at this to get it into this release :)
>

Sorry I missed this. I suspect it's too late for 2022.01 to include
such big changes :(

Regards,
Bin

[PATCH] riscv: sifive: Fix OF_BOARD boot failure

[Bin Meng]

When using QEMU to have a quick test of booting U-Boot S-mode payload
directly without the needs of preparing the SPI flash or SD card images
for SiFive Unleashed board, as per the instructions [1], it currently
does not boot any more.

This was caused by the OF_PRIOR_STAGE removal, as gd->fdt_blob no longer
points to a valid DTB. OF_BOARD is supposed to replace OF_PRIOR_STAGE,
hence we need to add the OF_BOARD logic in board_fdt_blob_setup().

[1] 
https://qemu.readthedocs.io/en/latest/system/riscv/sifive_u.html#running-u-boot

Fixes: 2e8d2f88439d ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards")
Fixes: d6f8ab30a2af ("treewide: Remove OF_PRIOR_STAGE")
Signed-off-by: Bin Meng 
---

 board/sifive/unleashed/unleashed.c | 2 +-
 board/sifive/unmatched/unmatched.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/sifive/unleashed/unleashed.c 
b/board/sifive/unleashed/unleashed.c
index 3c3e0e1d0d..f8aad862c6 100644
--- a/board/sifive/unleashed/unleashed.c
+++ b/board/sifive/unleashed/unleashed.c
@@ -117,7 +117,7 @@ int misc_init_r(void)
 void *board_fdt_blob_setup(int *err)
 {
*err = 0;
-   if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
+   if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
if (gd->arch.firmware_fdt_addr)
return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr;
}
diff --git a/board/sifive/unmatched/unmatched.c 
b/board/sifive/unmatched/unmatched.c
index 4895909f8d..6295deeae2 100644
--- a/board/sifive/unmatched/unmatched.c
+++ b/board/sifive/unmatched/unmatched.c
@@ -14,7 +14,7 @@
 void *board_fdt_blob_setup(int *err)
 {
*err = 0;
-   if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
+   if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
if (gd->arch.firmware_fdt_addr)
return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr;
}
-- 
2.25.1

[PATCH 11/11] configs: sunxi: Add support for Lichee Pi Nano

[Jesse Taube]

From: Icenowy Zheng 

The Lichee Pi Nano is a board based on the F1C100s.
Add defconfigs for it.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Jesse Taube 
---
 configs/licheepi_nano_defconfig  | 13 
 configs/licheepi_nano_spiflash_defconfig | 25 
 2 files changed, 38 insertions(+)
 create mode 100644 configs/licheepi_nano_defconfig
 create mode 100644 configs/licheepi_nano_spiflash_defconfig

diff --git a/configs/licheepi_nano_defconfig b/configs/licheepi_nano_defconfig
new file mode 100644
index 00..3a24870aaf
--- /dev/null
+++ b/configs/licheepi_nano_defconfig
@@ -0,0 +1,13 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUNIV=y
+CONFIG_SYS_TEXT_BASE=0x8170
+CONFIG_SYS_LOAD_ADDR=0x8100
+CONFIG_SYS_MALLOC_LEN=0x12
+CONFIG_DRAM_CLK=156
+CONFIG_SYS_DCACHE_OFF=y
+CONFIG_DRAM_ZQ=0
+# CONFIG_VIDEO_SUNXI is not set
+CONFIG_DEFAULT_DEVICE_TREE="suniv-f1c100s-licheepi-nano"
+CONFIG_SPL=y
+# CONFIG_SPL_DM_SERIAL is not set
diff --git a/configs/licheepi_nano_spiflash_defconfig 
b/configs/licheepi_nano_spiflash_defconfig
new file mode 100644
index 00..07b6a27dbe
--- /dev/null
+++ b/configs/licheepi_nano_spiflash_defconfig
@@ -0,0 +1,25 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_ENV_SIZE=0x8000
+CONFIG_ENV_OFFSET=0xf8000
+CONFIG_MACH_SUNIV=y
+CONFIG_DRAM_CLK=156
+CONFIG_DRAM_ZQ=0
+# CONFIG_VIDEO_SUNXI is not set
+CONFIG_DEFAULT_DEVICE_TREE="suniv-f1c100s-licheepi-nano"
+CONFIG_SPL=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPL_SPI_SUNXI=y
+# CONFIG_SPL_DM_SERIAL is not set
+CONFIG_DM_SPI=y
+CONFIG_SUN6I_SPI=y
-- 
2.34.1

[PATCH 10/11] ARM: dts: suniv: Add device tree files for F1C100s

[Jesse Taube]

From: Icenowy Zheng 

Add device tree files for suniv and
Lichee Pi Nano it is a board based on F1C100s.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Jesse Taube 
---
 arch/arm/dts/Makefile|   2 +
 arch/arm/dts/suniv-f1c100s-licheepi-nano.dts |  64 ++
 arch/arm/dts/suniv-f1c100s.dtsi  |   6 +
 arch/arm/dts/suniv.dtsi  | 224 +++
 4 files changed, 296 insertions(+)
 create mode 100644 arch/arm/dts/suniv-f1c100s-licheepi-nano.dts
 create mode 100644 arch/arm/dts/suniv-f1c100s.dtsi
 create mode 100644 arch/arm/dts/suniv.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 453e2fd1a9..07030deeca 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -497,6 +497,8 @@ dtb-$(CONFIG_STM32H7) += stm32h743i-disco.dtb \
stm32h743i-eval.dtb \
stm32h750i-art-pi.dtb
 
+dtb-$(CONFIG_MACH_SUNIV) += \
+   suniv-f1c100s-licheepi-nano.dtb
 dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-a1000.dtb \
sun4i-a10-ba10-tvbox.dtb \
diff --git a/arch/arm/dts/suniv-f1c100s-licheepi-nano.dts 
b/arch/arm/dts/suniv-f1c100s-licheepi-nano.dts
new file mode 100644
index 00..919fc01b0e
--- /dev/null
+++ b/arch/arm/dts/suniv-f1c100s-licheepi-nano.dts
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR X11)
+/*
+ * Copyright 2018 Icenowy Zheng 
+ */
+
+/dts-v1/;
+#include "suniv-f1c100s.dtsi"
+
+#include 
+
+/ {
+   model = "Lichee Pi Nano";
+   compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s",
+"allwinner,suniv";
+
+   aliases {
+   serial0 = 
+   spi0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
+
+_sram {
+   status = "okay";
+};
+
+ {
+   bus-width = <4>;
+   cd-gpios = < 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
+   status = "okay";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+   status = "okay";
+
+   flash@0 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "winbond,w25q128", "jedec,spi-nor";
+   reg = <0>;
+   spi-max-frequency = <4000>;
+   };
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+   status = "okay";
+};
+
+_otg {
+   dr_mode = "otg";
+   status = "okay";
+};
+
+ {
+   usb0_id_det-gpio = < 4 2 GPIO_ACTIVE_HIGH>; /* PE2 */
+   status = "okay";
+};
diff --git a/arch/arm/dts/suniv-f1c100s.dtsi b/arch/arm/dts/suniv-f1c100s.dtsi
new file mode 100644
index 00..f084bc8dd1
--- /dev/null
+++ b/arch/arm/dts/suniv-f1c100s.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR X11)
+/*
+ * Copyright 2018 Icenowy Zheng 
+ */
+
+#include "suniv.dtsi"
diff --git a/arch/arm/dts/suniv.dtsi b/arch/arm/dts/suniv.dtsi
new file mode 100644
index 00..a4e933505d
--- /dev/null
+++ b/arch/arm/dts/suniv.dtsi
@@ -0,0 +1,224 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR X11)
+/*
+ * Copyright 2018 Icenowy Zheng 
+ */
+
+#include 
+#include 
+
+/ {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   interrupt-parent = <>;
+
+   clocks {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   osc24M: clk-24M {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-frequency = <2400>;
+   clock-output-names = "osc24M";
+   };
+
+   osc32k: clk-32k {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-frequency = <32768>;
+   clock-output-names = "osc32k";
+   };
+
+   fake100M: clk-100M {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-frequency = <1>;
+   clock-output-names = "fake-100M";
+   };
+   };
+
+   cpus {
+   #address-cells = <0>;
+   #size-cells = <0>;
+
+   cpu {
+   compatible = "arm,arm926ej-s";
+   device_type = "cpu";
+   };
+   };
+
+   soc {
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   sram-controller@1c0 {
+   compatible = "allwinner,sun4i-a10-sram-controller";
+   reg = <0x01c0 0x30>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   sram_d: sram@1 {
+   compatible = "mmio-sram";
+   reg = <0x0001 0x1000>;
+  

[PATCH 09/11] sunxi: Add support for SUNIV architecture

[Jesse Taube]

From: Icenowy Zheng 

Add support for the suniv architecture, which is newer ARM9 SoCs by
Allwinner. The design of it seems to be a mixture of sun3i, sun4i and
sun6i.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Jesse Taube 
---
 arch/arm/mach-sunxi/Kconfig   | 16 +--
 arch/arm/mach-sunxi/board.c   | 31 +++--
 arch/arm/mach-sunxi/clock.c   |  3 +-
 arch/arm/mach-sunxi/clock_sun6i.c | 46 ++-
 arch/arm/mach-sunxi/cpu_info.c|  2 ++
 5 files changed, 91 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 2c18cf02d1..9bb7717731 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -1,7 +1,8 @@
 if ARCH_SUNXI
 
 config SPL_LDSCRIPT
-   default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64
+   default "arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds" if MACH_SUNIV
+   default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64 && 
!MACH_SUNIV
 
 config IDENT_STRING
default " Allwinner Technology"
@@ -183,6 +184,12 @@ choice
prompt "Sunxi SoC Variant"
optional
 
+config MACH_SUNIV
+   bool "suniv (Allwinner F1C100s/F1C200s/F1C600/R6)"
+   select CPU_ARM926EJS
+   select SUNXI_GEN_SUN6I
+   select SUPPORT_SPL
+
 config MACH_SUN4I
bool "sun4i (Allwinner A10)"
select CPU_V7A
@@ -587,6 +594,7 @@ config DRAM_ODT_CORRECTION
 endif
 
 config SYS_CLK_FREQ
+   default 40800 if MACH_SUNIV
default 100800 if MACH_SUN4I
default 100800 if MACH_SUN5I
default 100800 if MACH_SUN6I
@@ -598,6 +606,7 @@ config SYS_CLK_FREQ
default 100800 if MACH_SUN50I_H616
 
 config SYS_CONFIG_NAME
+   default "suniv" if MACH_SUNIV
default "sun4i" if MACH_SUN4I
default "sun5i" if MACH_SUN5I
default "sun6i" if MACH_SUN6I
@@ -805,7 +814,7 @@ config VIDEO_SUNXI
 
 config VIDEO_HDMI
bool "HDMI output support"
-   depends on VIDEO_SUNXI && !MACH_SUN8I
+   depends on VIDEO_SUNXI && !MACH_SUN8I && !MACH_SUNIV
default y
---help---
Say Y here to add support for outputting video over HDMI.
@@ -1005,6 +1014,7 @@ config GMAC_TX_DELAY
Set the GMAC Transmit Clock Delay Chain value.
 
 config SPL_STACK_R_ADDR
+   default 0x81e0 if MACH_SUNIV
default 0x4fe0 if MACH_SUN4I
default 0x4fe0 if MACH_SUN5I
default 0x4fe0 if MACH_SUN6I
@@ -1016,7 +1026,7 @@ config SPL_STACK_R_ADDR
 
 config SPL_SPI_SUNXI
bool "Support for SPI Flash on Allwinner SoCs in SPL"
-   depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 
|| MACH_SUN50I || MACH_SUN8I_R40 || MACH_SUN50I_H6
+   depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 
|| MACH_SUN50I || MACH_SUN8I_R40 || MACH_SUN50I_H6 || MACH_SUNIV
help
  Enable support for SPI Flash. This option allows SPL to read from
  sunxi SPI Flash. It uses the same method as the boot ROM, so does
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 3ef179742c..2fee86b49b 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -86,7 +86,8 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUNXI_GPIO_INPUT);
sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUNXI_GPIO_INPUT);
 #endif
-#if defined(CONFIG_MACH_SUN8I) && !defined(CONFIG_MACH_SUN8I_R40)
+#if (defined(CONFIG_MACH_SUN8I) && !defined(CONFIG_MACH_SUN8I_R40)) || \
+defined(CONFIG_MACH_SUNIV)
sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUN8I_GPF_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUN8I_GPF_UART0);
 #else
@@ -94,6 +95,10 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUNXI_GPF_UART0);
 #endif
sunxi_gpio_set_pull(SUNXI_GPF(4), 1);
+#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUNIV)
+   sunxi_gpio_set_cfgpin(SUNXI_GPE(0), SUNIV_GPE_UART0);
+   sunxi_gpio_set_cfgpin(SUNXI_GPE(1), SUNIV_GPE_UART0);
+   sunxi_gpio_set_pull(SUNXI_GPE(1), SUNXI_GPIO_PULL_UP);
 #elif CONFIG_CONS_INDEX == 1 && (defined(CONFIG_MACH_SUN4I) || \
 defined(CONFIG_MACH_SUN7I) || \
 defined(CONFIG_MACH_SUN8I_R40))
@@ -219,7 +224,8 @@ void s_init(void)
/* No H3 BSP, boot0 seems to not modify SUNXI_SRAMC_BASE + 0x44 */
 #endif
 
-#if !defined(CONFIG_ARM_CORTEX_CPU_IS_UP) && !defined(CONFIG_ARM64)
+#if !defined(CONFIG_ARM_CORTEX_CPU_IS_UP) && !defined(CONFIG_ARM64) && \
+   !defined(CONFIG_MACH_SUNIV)
/* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */
asm volatile(
"mrc p15, 0, r0, c1, c0, 1\n"
@@ -328,10 +334,31 @@ unsigned long spl_mmc_get_uboot_raw_sector(struct mmc 
*mmc,
return sector;
 }
 
+#ifndef CONFIG_MACH_SUNIV
 u32 spl_boot_device(void)
 {
return sunxi_get_boot_device();
 }

[PATCH 08/11] configs: sunxi: Add common SUNIV header

[Jesse Taube]

From: Icenowy Zheng 

Adds support for SUNIV and the F1C100s.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Jesse Taube 
---
 include/configs/suniv.h| 14 +++
 include/configs/sunxi-common.h | 67 --
 2 files changed, 62 insertions(+), 19 deletions(-)
 create mode 100644 include/configs/suniv.h

diff --git a/include/configs/suniv.h b/include/configs/suniv.h
new file mode 100644
index 00..6118cd5e1a
--- /dev/null
+++ b/include/configs/suniv.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Configuration settings for new Allwinner F-series (suniv) CPU
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * Include common sunxi configuration where most the settings are
+ */
+#include 
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 7260eb72a4..62004a09c1 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -22,7 +22,12 @@
 /* Serial & console */
 #define CONFIG_SYS_NS16550_SERIAL
 /* ns16550 reg in the low bits of cpu reg */
+#ifndef CONFIG_MACH_SUNIV
 #define CONFIG_SYS_NS16550_CLK 2400
+#else
+/* suniv doesn't have apb2 and uart is connected to apb1 */
+#define CONFIG_SYS_NS16550_CLK 1
+#endif
 #ifndef CONFIG_DM_SERIAL
 # define CONFIG_SYS_NS16550_REG_SIZE   -4
 # define CONFIG_SYS_NS16550_COM1   SUNXI_UART0_BASE
@@ -49,6 +54,16 @@
  * since it needs to fit in with the other values. By also #defining it
  * we get warnings if the Kconfig value mismatches. */
 #define CONFIG_SPL_BSS_START_ADDR  0x2ff8
+#elif defined(CONFIG_MACH_SUNIV)
+#define SDRAM_OFFSET(x) 0x8##x
+#define CONFIG_SYS_SDRAM_BASE  0x8000
+#define CONFIG_SYS_LOAD_ADDR   0x8100 /* default load address */
+/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
+ * since it needs to fit in with the other values. By also #defining it
+ * we get warnings if the Kconfig value mismatches.
+ */
+#define CONFIG_SPL_STACK_R_ADDR0x81e0
+#define CONFIG_SPL_BSS_START_ADDR  0x81f8
 #else
 #define SDRAM_OFFSET(x) 0x4##x
 #define CONFIG_SYS_SDRAM_BASE  0x4000
@@ -109,6 +124,8 @@
 #endif
 
 #define CONFIG_SYS_MMC_MAX_DEVICE  4
+#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
+#define CONFIG_ENV_SECT_SIZE 0x1000
 #endif
 
 /*
@@ -187,32 +204,44 @@
 #define RAMDISK_ADDR_R__stringify(SDRAM_OFFSET(FF0))
 
 #else
-/*
- * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
- * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
- * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
- */
-#ifndef CONFIG_MACH_SUN8I_V3S
-#define BOOTM_SIZE__stringify(0xa00)
-#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(200))
-#define FDT_ADDR_R__stringify(SDRAM_OFFSET(300))
-#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(310))
-#define PXEFILE_ADDR_R__stringify(SDRAM_OFFSET(320))
-#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(330))
-#define RAMDISK_ADDR_R__stringify(SDRAM_OFFSET(340))
-#else
+#if defined(CONFIG_MACH_SUN8I_V3S)
 /*
  * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
  * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
  * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
  */
-#define BOOTM_SIZE__stringify(0x2e0)
-#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(100))
-#define FDT_ADDR_R__stringify(SDRAM_OFFSET(180))
-#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(190))
-#define PXEFILE_ADDR_R__stringify(SDRAM_OFFSET(1A0))
+#define BOOTM_SIZE __stringify(0x2e0)
+#define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(100))
+#define FDT_ADDR_R __stringify(SDRAM_OFFSET(180))
+#define SCRIPT_ADDR_R  __stringify(SDRAM_OFFSET(190))
 #define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B0))
 #define RAMDISK_ADDR_R__stringify(SDRAM_OFFSET(1C0))
+#elif defined(CONFIG_MACH_SUNIV)
+/*
+ * 32M RAM minus 1MB heap + 8MB for u-boot, stack, fb, etc.
+ * 8M uncompressed kernel, 4M compressed kernel, 512K fdt,
+ * 512K script, 512K pxe and the ramdisk at the end.
+ */
+#define BOOTM_SIZE __stringify(0x170)
+#define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(050))
+#define FDT_ADDR_R __stringify(SDRAM_OFFSET(0C0))
+#define SCRIPT_ADDR_R  __stringify(SDRAM_OFFSET(0C5))
+#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(0D0))
+#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(0D5))
+#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(0D6))
+#else
+/*
+ * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
+ * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
+ * 1M script, 1M pxe and the ramdisk at the end.
+ */
+#define BOOTM_SIZE __stringify(0xa00)
+#define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(200))
+#define FDT_ADDR_R 

[PATCH 06/11] sunxi: Add F1C100s DRAM initial support

[Jesse Taube]

From: Icenowy Zheng 

Add support for F1C100s internal dram controller.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Jesse Taube 
---
 arch/arm/include/asm/arch-sunxi/dram.h   |   2 +
 arch/arm/include/asm/arch-sunxi/dram_suniv.h |  46 ++
 arch/arm/mach-sunxi/Makefile |   2 +
 arch/arm/mach-sunxi/dram_helpers.c   |   4 +
 arch/arm/mach-sunxi/dram_suniv.c | 420 +++
 5 files changed, 474 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-sunxi/dram_suniv.h
 create mode 100644 arch/arm/mach-sunxi/dram_suniv.c

diff --git a/arch/arm/include/asm/arch-sunxi/dram.h 
b/arch/arm/include/asm/arch-sunxi/dram.h
index c3b3e1f512..682daae6b1 100644
--- a/arch/arm/include/asm/arch-sunxi/dram.h
+++ b/arch/arm/include/asm/arch-sunxi/dram.h
@@ -31,6 +31,8 @@
 #include 
 #elif defined(CONFIG_MACH_SUN50I_H616)
 #include 
+#elif defined(CONFIG_MACH_SUNIV)
+#include 
 #else
 #include 
 #endif
diff --git a/arch/arm/include/asm/arch-sunxi/dram_suniv.h 
b/arch/arm/include/asm/arch-sunxi/dram_suniv.h
new file mode 100644
index 00..6f4c0512d6
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/dram_suniv.h
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * suniv DRAM controller register definition
+ *
+ * Copyright (C) 2018 Icenowy Zheng 
+ *
+ * Based on xboot's arch/arm32/mach-f1c100s/sys-dram.c, which is:
+ *
+ * Copyright(c) 2007-2018 Jianjun Jiang <8192...@qq.com>
+ */
+
+#define PIO_SDRAM_DRV  (0x2c0)
+#define PIO_SDRAM_PULL (0x2c4)
+
+#define DRAM_SCONR (0x00)
+#define DRAM_STMG0R(0x04)
+#define DRAM_STMG1R(0x08)
+#define DRAM_SCTLR (0x0c)
+#define DRAM_SREFR (0x10)
+#define DRAM_SEXTMR(0x14)
+#define DRAM_DDLYR (0x24)
+#define DRAM_DADRR (0x28)
+#define DRAM_DVALR (0x2c)
+#define DRAM_DRPTR0(0x30)
+#define DRAM_DRPTR1(0x34)
+#define DRAM_DRPTR2(0x38)
+#define DRAM_DRPTR3(0x3c)
+#define DRAM_SEFR  (0x40)
+#define DRAM_MAE   (0x44)
+#define DRAM_ASPR  (0x48)
+#define DRAM_SDLY0 (0x4C)
+#define DRAM_SDLY1 (0x50)
+#define DRAM_SDLY2 (0x54)
+#define DRAM_MCR0  (0x100)
+#define DRAM_MCR1  (0x104)
+#define DRAM_MCR2  (0x108)
+#define DRAM_MCR3  (0x10c)
+#define DRAM_MCR4  (0x110)
+#define DRAM_MCR5  (0x114)
+#define DRAM_MCR6  (0x118)
+#define DRAM_MCR7  (0x11c)
+#define DRAM_MCR8  (0x120)
+#define DRAM_MCR9  (0x124)
+#define DRAM_MCR10 (0x128)
+#define DRAM_MCR11 (0x12c)
+#define DRAM_BWCR  (0x140)
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile
index 5d3fd70f74..42e76d4328 100644
--- a/arch/arm/mach-sunxi/Makefile
+++ b/arch/arm/mach-sunxi/Makefile
@@ -13,6 +13,7 @@ obj-y += dram_helpers.o
 obj-y  += pinmux.o
 obj-$(CONFIG_SUN6I_PRCM)   += prcm.o
 obj-$(CONFIG_AXP_PMIC_BUS) += pmic_bus.o
+obj-$(CONFIG_MACH_SUNIV)   += clock_sun6i.o
 obj-$(CONFIG_MACH_SUN4I)   += clock_sun4i.o
 obj-$(CONFIG_MACH_SUN5I)   += clock_sun4i.o
 obj-$(CONFIG_MACH_SUN6I)   += clock_sun6i.o
@@ -27,6 +28,7 @@ obj-$(CONFIG_MACH_SUN9I)  += clock_sun9i.o gtbus_sun9i.o
 obj-$(CONFIG_SUN50I_GEN_H6)+= clock_sun50i_h6.o
 
 ifdef CONFIG_SPL_BUILD
+obj-$(CONFIG_MACH_SUNIV)   += dram_suniv.o
 obj-$(CONFIG_DRAM_SUN4I)   += dram_sun4i.o
 obj-$(CONFIG_DRAM_SUN6I)   += dram_sun6i.o
 obj-$(CONFIG_DRAM_SUN8I_A23)   += dram_sun8i_a23.o
diff --git a/arch/arm/mach-sunxi/dram_helpers.c 
b/arch/arm/mach-sunxi/dram_helpers.c
index 520b597fcc..2c873192e6 100644
--- a/arch/arm/mach-sunxi/dram_helpers.c
+++ b/arch/arm/mach-sunxi/dram_helpers.c
@@ -26,7 +26,10 @@ void mctl_await_completion(u32 *reg, u32 mask, u32 val)
 
 /*
  * Test if memory at offset offset matches memory at begin of DRAM
+ *
+ * Note: dsb() is not available on ARMv5 in Thumb mode
  */
+#ifndef CONFIG_MACH_SUNIV
 bool mctl_mem_matches(u32 offset)
 {
/* Try to write different values to RAM at two addresses */
@@ -37,3 +40,4 @@ bool mctl_mem_matches(u32 offset)
return readl(CONFIG_SYS_SDRAM_BASE) ==
   readl((ulong)CONFIG_SYS_SDRAM_BASE + offset);
 }
+#endif
diff --git a/arch/arm/mach-sunxi/dram_suniv.c b/arch/arm/mach-sunxi/dram_suniv.c
new file mode 100644
index 00..56c2d557ff
--- /dev/null
+++ b/arch/arm/mach-sunxi/dram_suniv.c
@@ -0,0 +1,420 @@
+// SPDX-License-Identifier: (GPL-2.0+)
+/*
+ * suniv DRAM initialization
+ *
+ * Copyright (C) 2018 Icenowy Zheng 
+ *

[PATCH 07/11] sunxi: board: Add support for SUNIV

[Jesse Taube]

From: Icenowy Zheng 

Generic Timer Extension is not available on SUNIV.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Jesse Taube 
---
 board/sunxi/board.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 2790a0f9e8..59eb195c26 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -197,7 +197,7 @@ int board_init(void)
 
gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100);
 
-#ifndef CONFIG_ARM64
+#if !defined(CONFIG_ARM64) && !defined(CONFIG_MACH_SUNIV)
asm volatile("mrc p15, 0, %0, c0, c1, 1" : "=r"(id_pfr1));
debug("id_pfr1: 0x%08x\n", id_pfr1);
/* Generic Timer Extension available? */
@@ -224,7 +224,7 @@ int board_init(void)
 #endif
}
}
-#endif /* !CONFIG_ARM64 */
+#endif /* !CONFIG_ARM64 && !CONFIG_MACH_SUNIV */
 
ret = axp_gpio_init();
if (ret)
-- 
2.34.1

[PATCH 05/11] ARM: sunxi: Add support for F1C100s

[Jesse Taube]

From: Icenowy Zheng 

This patch aims to add header files for the F1C100s.
The header files included add support for gpio, dram and clocks.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Jesse Taube 
---
 arch/arm/include/asm/arch-sunxi/clock.h   |  2 +-
 arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 25 +++
 arch/arm/include/asm/arch-sunxi/cpu_sun4i.h   |  8 ++
 arch/arm/include/asm/arch-sunxi/gpio.h|  1 +
 4 files changed, 35 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-sunxi/clock.h 
b/arch/arm/include/asm/arch-sunxi/clock.h
index cbbe5c7a1e..2cfd540742 100644
--- a/arch/arm/include/asm/arch-sunxi/clock.h
+++ b/arch/arm/include/asm/arch-sunxi/clock.h
@@ -19,7 +19,7 @@
 #elif defined(CONFIG_SUN50I_GEN_H6)
 #include 
 #elif defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN8I) || \
-  defined(CONFIG_MACH_SUN50I)
+  defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUNIV)
 #include 
 #elif defined(CONFIG_MACH_SUN9I)
 #include 
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h 
b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index ee387127f3..5ecdf58bd5 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -168,6 +168,14 @@ struct sunxi_ccm_reg {
u32 pll_lock_ctrl;  /* 0x320 PLL lock control, R40 only */
 };
 
+/* apb1 bit field */
+#ifdef CONFIG_MACH_SUNIV
+#define APB1_GATE_UART_SHIFT   (20)
+#define APB1_GATE_UART_MASK(0x7 << APB1_GATE_UART_SHIFT)
+#define APB1_GATE_TWI_SHIFT(16)
+#define APB1_GATE_TWI_MASK (0x7 << APB1_GATE_TWI_SHIFT)
+#endif
+
 /* apb2 bit field */
 #define APB2_CLK_SRC_LOSC  (0x0 << 24)
 #define APB2_CLK_SRC_OSC24M(0x1 << 24)
@@ -226,7 +234,12 @@ struct sunxi_ccm_reg {
 #define CCM_PLL5_CTRL_SIGMA_DELTA_EN   (0x1 << 24)
 #define CCM_PLL5_CTRL_EN   (0x1 << 31)
 
+#if !defined(CONFIG_MACH_SUNIV)
 #define PLL6_CFG_DEFAULT   0x90041811 /* 600 MHz */
+#else
+/* suniv pll6 doesn't have postdiv 2, so k is set to 0 */
+#define PLL6_CFG_DEFAULT   0x90041800
+#endif
 
 #define CCM_PLL6_CTRL_N_SHIFT  8
 #define CCM_PLL6_CTRL_N_MASK   (0x1f << CCM_PLL6_CTRL_N_SHIFT)
@@ -310,6 +323,8 @@ struct sunxi_ccm_reg {
 #define AHB_GATE_OFFSET_USB0   25
 #define AHB_GATE_OFFSET_SATA   24
 #endif
+#define AHB_GATE_OFFSET_SPI1   21
+#define AHB_GATE_OFFSET_SPI0   20
 #define AHB_GATE_OFFSET_MCTL   14
 #define AHB_GATE_OFFSET_GMAC   17
 #define AHB_GATE_OFFSET_NAND0  13
@@ -458,6 +473,8 @@ struct sunxi_ccm_reg {
 #ifdef CONFIG_MACH_SUN8I_R40
 #define AHB_RESET_OFFSET_SATA  24
 #endif
+#define AHB_RESET_OFFSET_SPI1  21
+#define AHB_RESET_OFFSET_SPI0  20
 #define AHB_RESET_OFFSET_GMAC  17
 #define AHB_RESET_OFFSET_MCTL  14
 #define AHB_RESET_OFFSET_MMC3  11
@@ -488,6 +505,14 @@ struct sunxi_ccm_reg {
 #define AHB_RESET_OFFSET_EPHY  2
 #define AHB_RESET_OFFSET_LVDS  0
 
+/* apb1 reset */
+#ifdef CONFIG_MACH_SUNIV
+#define APB1_RESET_UART_SHIFT  (20)
+#define APB1_RESET_UART_MASK   (0x7 << APB1_RESET_UART_SHIFT)
+#define APB1_RESET_TWI_SHIFT   (16)
+#define APB1_RESET_TWI_MASK(0x7 << APB1_RESET_TWI_SHIFT)
+#endif
+
 /* apb2 reset */
 #define APB2_RESET_UART_SHIFT  (16)
 #define APB2_RESET_UART_MASK   (0xff << APB2_RESET_UART_SHIFT)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h 
b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index d4c795d89c..83178dd5c8 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -122,6 +122,12 @@ defined(CONFIG_MACH_SUN50I)
 
 #define SUNXI_SJTAG_BASE   0x01c23c00
 
+#ifdef CONFIG_MACH_SUNIV
+#define SUNXI_UART0_BASE   0x01c25000
+#define SUNXI_UART1_BASE   0x01c25400
+#define SUNXI_UART2_BASE   0x01c25800
+#endif
+
 #define SUNXI_TP_BASE  0x01c25000
 #define SUNXI_PMU_BASE 0x01c25400
 
@@ -129,9 +135,11 @@ defined(CONFIG_MACH_SUN50I)
 #define SUNXI_CPUCFG_BASE  0x01c25c00
 #endif
 
+#ifndef CONFIG_MACH_SUNIV
 #define SUNXI_UART0_BASE   0x01c28000
 #define SUNXI_UART1_BASE   0x01c28400
 #define SUNXI_UART2_BASE   0x01c28800
+#endif
 #define SUNXI_UART3_BASE   0x01c28c00
 #define SUNXI_UART4_BASE   0x01c29000
 #define SUNXI_UART5_BASE   0x01c29400
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h 
b/arch/arm/include/asm/arch-sunxi/gpio.h
index f3ab1aea0e..ced69f7dd4 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -165,6 +165,7 @@ enum sunxi_gpio_number {
 #define SUNXI_GPD_LVDS03
 #define SUNXI_GPD_PWM  2
 
+#define SUNIV_GPE_UART05
 #define SUN8I_GPE_TWI2 3
 

[PATCH 04/11] dt-bindings: reset: Add initial suniv headers

[Jesse Taube]

From: Icenowy Zheng 

This commit introduces suniv dt-bindings headers
needed for device tree files.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Jesse Taube 
---
 include/dt-bindings/reset/suniv-ccu.h | 36 +++
 1 file changed, 36 insertions(+)
 create mode 100644 include/dt-bindings/reset/suniv-ccu.h

diff --git a/include/dt-bindings/reset/suniv-ccu.h 
b/include/dt-bindings/reset/suniv-ccu.h
new file mode 100644
index 00..d556a8dba0
--- /dev/null
+++ b/include/dt-bindings/reset/suniv-ccu.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+/*
+ * Copyright (C) 2018 Icenowy Zheng 
+ */
+
+#ifndef _DT_BINDINGS_RST_SUNIV_H_
+#define _DT_BINDINGS_RST_SUNIV_H_
+
+#define RST_USB_PHY0   0
+#define RST_BUS_MMC0   1
+#define RST_BUS_MMC1   2
+#define RST_BUS_DRAM   3
+#define RST_BUS_SPI0   4
+#define RST_BUS_SPI1   5
+#define RST_BUS_OTG6
+#define RST_BUS_VE 7
+#define RST_BUS_LCD8
+#define RST_BUS_DEINTERLACE9
+#define RST_BUS_CSI10
+#define RST_BUS_TVD11
+#define RST_BUS_TVE12
+#define RST_BUS_DE_BE  13
+#define RST_BUS_DE_FE  14
+#define RST_BUS_CODEC  15
+#define RST_BUS_SPDIF  16
+#define RST_BUS_IR 17
+#define RST_BUS_RSB18
+#define RST_BUS_I2S0   19
+#define RST_BUS_I2C0   20
+#define RST_BUS_I2C1   21
+#define RST_BUS_I2C2   22
+#define RST_BUS_UART0  23
+#define RST_BUS_UART1  24
+#define RST_BUS_UART2  25
+
+#endif /* _DT_BINDINGS_RST_SUNIV_H_ */
-- 
2.34.1

[PATCH 03/11] dt-bindings: clock: Add initial suniv headers

[Jesse Taube]

From: Icenowy Zheng 

This commit introduces suniv dt-bindings headers needed for
device tree files.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Jesse Taube 
---
 include/dt-bindings/clock/suniv-ccu.h | 68 +++
 1 file changed, 68 insertions(+)
 create mode 100644 include/dt-bindings/clock/suniv-ccu.h

diff --git a/include/dt-bindings/clock/suniv-ccu.h 
b/include/dt-bindings/clock/suniv-ccu.h
new file mode 100644
index 00..83d3c18ac0
--- /dev/null
+++ b/include/dt-bindings/clock/suniv-ccu.h
@@ -0,0 +1,68 @@
+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+/*
+ * Copyright (c) 2018 Icenowy Zheng 
+ */
+
+#ifndef _DT_BINDINGS_CLK_SUNIV_H_
+#define _DT_BINDINGS_CLK_SUNIV_H_
+
+#define CLK_CPU11
+
+#define CLK_BUS_MMC0   14
+#define CLK_BUS_MMC1   15
+#define CLK_BUS_DRAM   16
+#define CLK_BUS_SPI0   17
+#define CLK_BUS_SPI1   18
+#define CLK_BUS_OTG19
+#define CLK_BUS_VE 20
+#define CLK_BUS_LCD21
+#define CLK_BUS_DEINTERLACE22
+#define CLK_BUS_CSI23
+#define CLK_BUS_TVD24
+#define CLK_BUS_TVE25
+#define CLK_BUS_DE_BE  26
+#define CLK_BUS_DE_FE  27
+#define CLK_BUS_CODEC  28
+#define CLK_BUS_SPDIF  29
+#define CLK_BUS_IR 30
+#define CLK_BUS_RSB31
+#define CLK_BUS_I2S0   32
+#define CLK_BUS_I2C0   33
+#define CLK_BUS_I2C1   34
+#define CLK_BUS_I2C2   35
+#define CLK_BUS_PIO36
+#define CLK_BUS_UART0  37
+#define CLK_BUS_UART1  38
+#define CLK_BUS_UART2  39
+
+#define CLK_MMC0   40
+#define CLK_MMC0_SAMPLE41
+#define CLK_MMC0_OUTPUT42
+#define CLK_MMC1   43
+#define CLK_MMC1_SAMPLE44
+#define CLK_MMC1_OUTPUT45
+#define CLK_I2S46
+#define CLK_SPDIF  47
+
+#define CLK_USB_PHY0   48
+
+#define CLK_DRAM_VE49
+#define CLK_DRAM_CSI   50
+#define CLK_DRAM_DEINTERLACE   51
+#define CLK_DRAM_TVD   52
+#define CLK_DRAM_DE_FE 53
+#define CLK_DRAM_DE_BE 54
+
+#define CLK_DE_BE  55
+#define CLK_DE_FE  56
+#define CLK_TCON   57
+#define CLK_DEINTERLACE58
+#define CLK_TVE2_CLK   59
+#define CLK_TVE1_CLK   60
+#define CLK_TVD61
+#define CLK_CSI62
+#define CLK_VE 63
+#define CLK_CODEC  64
+#define CLK_AVS65
+
+#endif
-- 
2.34.1

[PATCH 02/11] arm: arm926ej-s: add sunxi code

[Jesse Taube]

From: Icenowy Zheng 

Some Allwinner SoCs use ARM926EJ-S core.

Add Allwinner/sunXi specific code to ARM926EJ-S CPU dircetory.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Jesse Taube 
---
 arch/arm/cpu/arm926ejs/Makefile  |   1 +
 arch/arm/cpu/arm926ejs/sunxi/Makefile|  15 +++
 arch/arm/cpu/arm926ejs/sunxi/config.mk   |   6 +
 arch/arm/cpu/arm926ejs/sunxi/fel_utils.S |  37 ++
 arch/arm/cpu/arm926ejs/sunxi/lowlevel_init.S |  67 +++
 arch/arm/cpu/arm926ejs/sunxi/start.c |   1 +
 arch/arm/cpu/arm926ejs/sunxi/timer.c | 114 +++
 arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds  |  62 ++
 8 files changed, 303 insertions(+)
 create mode 100644 arch/arm/cpu/arm926ejs/sunxi/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/sunxi/config.mk
 create mode 100644 arch/arm/cpu/arm926ejs/sunxi/fel_utils.S
 create mode 100644 arch/arm/cpu/arm926ejs/sunxi/lowlevel_init.S
 create mode 100644 arch/arm/cpu/arm926ejs/sunxi/start.c
 create mode 100644 arch/arm/cpu/arm926ejs/sunxi/timer.c
 create mode 100644 arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds

diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile
index b901b7c5c9..7f1436d76e 100644
--- a/arch/arm/cpu/arm926ejs/Makefile
+++ b/arch/arm/cpu/arm926ejs/Makefile
@@ -15,6 +15,7 @@ endif
 obj-$(CONFIG_MX27) += mx27/
 obj-$(if $(filter mxs,$(SOC)),y) += mxs/
 obj-$(if $(filter spear,$(SOC)),y) += spear/
+obj-$(CONFIG_ARCH_SUNXI) += sunxi/
 
 # some files can only build in ARM or THUMB2, not THUMB1
 
diff --git a/arch/arm/cpu/arm926ejs/sunxi/Makefile 
b/arch/arm/cpu/arm926ejs/sunxi/Makefile
new file mode 100644
index 00..894c461c50
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/sunxi/Makefile
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2012 Henrik Nordstrom 
+#
+# Based on some other Makefile
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+
+obj-y  += timer.o
+obj-y  += lowlevel_init.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y  += fel_utils.o
+CFLAGS_fel_utils.o := -marm
+endif
diff --git a/arch/arm/cpu/arm926ejs/sunxi/config.mk 
b/arch/arm/cpu/arm926ejs/sunxi/config.mk
new file mode 100644
index 00..76ffec9df6
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/sunxi/config.mk
@@ -0,0 +1,6 @@
+# Build a combined spl + u-boot image
+ifdef CONFIG_SPL
+ifndef CONFIG_SPL_BUILD
+ALL-y += u-boot-sunxi-with-spl.bin
+endif
+endif
diff --git a/arch/arm/cpu/arm926ejs/sunxi/fel_utils.S 
b/arch/arm/cpu/arm926ejs/sunxi/fel_utils.S
new file mode 100644
index 00..0997a2dc65
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/sunxi/fel_utils.S
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Utility functions for FEL mode.
+ *
+ * Copyright (c) 2015 Google, Inc
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+ENTRY(save_boot_params)
+   ldr r0, =fel_stash
+   str sp, [r0, #0]
+   str lr, [r0, #4]
+   mrs lr, cpsr@ Read CPSR
+   str lr, [r0, #8]
+   mrc p15, 0, lr, c1, c0, 0   @ Read CP15 SCTLR Register
+   str lr, [r0, #12]
+   mrc p15, 0, lr, c1, c0, 0   @ Read CP15 Control Register
+   str lr, [r0, #16]
+   b   save_boot_params_ret
+ENDPROC(save_boot_params)
+
+ENTRY(return_to_fel)
+   mov sp, r0
+   mov lr, r1
+   ldr r0, =fel_stash
+   ldr r1, [r0, #16]
+   mcr p15, 0, r1, c1, c0, 0   @ Write CP15 Control Register
+   ldr r1, [r0, #12]
+   mcr p15, 0, r1, c1, c0, 0   @ Write CP15 SCTLR Register
+   ldr r1, [r0, #8]
+   msr cpsr, r1@ Write CPSR
+   bx  lr
+ENDPROC(return_to_fel)
diff --git a/arch/arm/cpu/arm926ejs/sunxi/lowlevel_init.S 
b/arch/arm/cpu/arm926ejs/sunxi/lowlevel_init.S
new file mode 100644
index 00..db09bcc4d0
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/sunxi/lowlevel_init.S
@@ -0,0 +1,67 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * A lowlevel_init function that sets up the stack to call a C function to
+ * perform further init.
+ *
+ * Based on lowlevel_init.S in armv7 directory, which is:
+ *   (C) Copyright 2010 Texas Instruments, 
+ */
+
+#include 
+#include 
+#include 
+
+.pushsection .text.s_init, "ax"
+WEAK(s_init)
+   bx  lr
+ENDPROC(s_init)
+.popsection
+
+.pushsection .text.lowlevel_init, "ax"
+WEAK(lowlevel_init)
+   /*
+* Setup a temporary stack. Global data is not available yet.
+*/
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
+   ldr sp, =CONFIG_SPL_STACK
+#else
+   ldr sp, =CONFIG_SYS_INIT_SP_ADDR
+#endif
+   bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
+#ifdef CONFIG_SPL_DM
+   mov r9, #0
+#else
+   /*
+* Set up global data for boards that still need it. This will be
+* removed soon.
+*/
+#ifdef CONFIG_SPL_BUILD
+   ldr r9, =gdata
+#else
+   sub 

[PATCH 01/11] arm: arm926ej-s: start.S: port save_boot_params support from armv7 code

[Jesse Taube]

From: Icenowy Zheng 

The ARMv7 start code has support for saving some boot params at the
entry point, which is used by some SoCs to return to BROM.

Port this to ARM926EJ-S start code.

Signed-off-by: Icenowy Zheng 
Signed-off-by: Jesse Taube 
---
 arch/arm/cpu/arm926ejs/start.S | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 0afcc47aad..aca7793c57 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /*
  *
@@ -32,8 +33,13 @@
  */
 
.globl  reset
+   .globl  save_boot_params_ret
+   .type   save_boot_params_ret,%function
 
 reset:
+   /* Allow the board to save important registers */
+   b   save_boot_params
+save_boot_params_ret:
/*
 * set the cpu to SVC32 mode
 */
@@ -110,3 +116,16 @@ flush_dcache:
 #endif
mov pc, lr  /* back to my caller */
 #endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */
+
+/*
+ *
+ * void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
+ * __attribute__((weak));
+ *
+ * Stack pointer is not yet initialized at this moment
+ * Don't save anything to stack even if compiled with -O0
+ *
+ */
+WEAK(save_boot_params)
+   b   save_boot_params_ret/* back to my caller */
+ENDPROC(save_boot_params)
-- 
2.34.1

[PATCH 00/11] Add support for SUNIV and F1C100s.

[Jesse Taube]

This patch set aims to add suport for the SUNIV and F1C100s.
Suport has been in linux for a while now, but not in u-boot.

This patchset contains:
- CPU specific initialization code
- SUNIV dram driver
- SUNIV clock driver adaption
- SUNIV gpio driver adaption
- SUNIV uart driver adaption
- F1C100s basic support

I am hoping to get Icenowy's patches in as it seems she hasnt submitted
in a while. The only edits I made to her code is rebasing it against ML
and changing some formating. I also re-grouped her commits.

I am wondering if the dram driver should be moved into device drivers
rather than in mach-sunxi.
I am also wondering if it is okay to submit some one elses code,
and if so how should I do so.

Icenowy Zheng (11):
  arm: arm926ej-s: start.S: port save_boot_params support from armv7
code
  arm: arm926ej-s: add sunxi code
  dt-bindings: clock: Add initial suniv headers
  dt-bindings: reset: Add initial suniv headers
  ARM: sunxi: Add support for F1C100s
  sunxi: Add F1C100s DRAM initial support
  sunxi: board: Add support for SUNIV
  configs: sunxi: Add common SUNIV header
  sunxi: Add support for SUNIV architecture
  ARM: dts: suniv: Add device tree files for F1C100s
  configs: sunxi: Add support for Lichee Pi Nano

 arch/arm/cpu/arm926ejs/Makefile   |   1 +
 arch/arm/cpu/arm926ejs/start.S|  19 +
 arch/arm/cpu/arm926ejs/sunxi/Makefile |  15 +
 arch/arm/cpu/arm926ejs/sunxi/config.mk|   6 +
 arch/arm/cpu/arm926ejs/sunxi/fel_utils.S  |  37 ++
 arch/arm/cpu/arm926ejs/sunxi/lowlevel_init.S  |  67 +++
 arch/arm/cpu/arm926ejs/sunxi/start.c  |   1 +
 arch/arm/cpu/arm926ejs/sunxi/timer.c  | 114 +
 arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds   |  62 +++
 arch/arm/dts/Makefile |   2 +
 arch/arm/dts/suniv-f1c100s-licheepi-nano.dts  |  64 +++
 arch/arm/dts/suniv-f1c100s.dtsi   |   6 +
 arch/arm/dts/suniv.dtsi   | 224 ++
 arch/arm/include/asm/arch-sunxi/clock.h   |   2 +-
 arch/arm/include/asm/arch-sunxi/clock_sun6i.h |  25 ++
 arch/arm/include/asm/arch-sunxi/cpu_sun4i.h   |   8 +
 arch/arm/include/asm/arch-sunxi/dram.h|   2 +
 arch/arm/include/asm/arch-sunxi/dram_suniv.h  |  46 ++
 arch/arm/include/asm/arch-sunxi/gpio.h|   1 +
 arch/arm/mach-sunxi/Kconfig   |  16 +-
 arch/arm/mach-sunxi/Makefile  |   2 +
 arch/arm/mach-sunxi/board.c   |  31 +-
 arch/arm/mach-sunxi/clock.c   |   3 +-
 arch/arm/mach-sunxi/clock_sun6i.c |  46 +-
 arch/arm/mach-sunxi/cpu_info.c|   2 +
 arch/arm/mach-sunxi/dram_helpers.c|   4 +
 arch/arm/mach-sunxi/dram_suniv.c  | 420 ++
 board/sunxi/board.c   |   4 +-
 configs/licheepi_nano_defconfig   |  13 +
 configs/licheepi_nano_spiflash_defconfig  |  25 ++
 include/configs/suniv.h   |  14 +
 include/configs/sunxi-common.h|  67 ++-
 include/dt-bindings/clock/suniv-ccu.h |  68 +++
 include/dt-bindings/reset/suniv-ccu.h |  36 ++
 34 files changed, 1424 insertions(+), 29 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/sunxi/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/sunxi/config.mk
 create mode 100644 arch/arm/cpu/arm926ejs/sunxi/fel_utils.S
 create mode 100644 arch/arm/cpu/arm926ejs/sunxi/lowlevel_init.S
 create mode 100644 arch/arm/cpu/arm926ejs/sunxi/start.c
 create mode 100644 arch/arm/cpu/arm926ejs/sunxi/timer.c
 create mode 100644 arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds
 create mode 100644 arch/arm/dts/suniv-f1c100s-licheepi-nano.dts
 create mode 100644 arch/arm/dts/suniv-f1c100s.dtsi
 create mode 100644 arch/arm/dts/suniv.dtsi
 create mode 100644 arch/arm/include/asm/arch-sunxi/dram_suniv.h
 create mode 100644 arch/arm/mach-sunxi/dram_suniv.c
 create mode 100644 configs/licheepi_nano_defconfig
 create mode 100644 configs/licheepi_nano_spiflash_defconfig
 create mode 100644 include/configs/suniv.h
 create mode 100644 include/dt-bindings/clock/suniv-ccu.h
 create mode 100644 include/dt-bindings/reset/suniv-ccu.h

-- 
2.34.1

Re: mkimage_fit_atf.sh: not found

[Fabio Estevam]

HI Tim,

On Tue, Jan 4, 2022 at 7:48 PM Tim Harvey  wrote:
>
> Stefano and Fabio,
>
> I'm seeing the imx8mm_venice_defconfig target failing to build on
> master due to mkimage_fit_atf.sh not found:
> ./"arch/arm/mach-imx/mkimage_fit_atf.sh" \
> arch/arm/dts/imx8mm-venice-gw71xx-0x.dtb
> arch/arm/dts/imx8mm-venice-gw72xx-0x.dtb
> arch/arm/dts/imx8mm-venice-gw73xx-0x.dtb
> arch/arm/dts/imx8mm-venice-gw7901.dtb
> arch/arm/dts/imx8mm-venice-gw7902.dtb > u-boot.its
> /bin/sh: 1: ./arch/arm/mach-imx/mkimage_fit_atf.sh: not found
>
> As far as I can tell the other boards that are still using
> SPL_FIT_GENERATOR also fail due to this (ie imx8mm_beacon_defconfig,
> imx8mq_evk_defconfig, imx8mm-icore-mx8mm-edimm2.2_defconfig, etc).
>
> What is the state of the binman conversion? I submitted a series to
> convert my boards to binman and it has just been sitting without any
> response for months now [1].
>
> I'm not sure when the above breakage occurred but the conversion to
> binman resolves it and other things.
>
> Please let me know what you expect me to do to resolve this as there
> is a release pending.
>
> Best regards,
>
> Tim
> [1] 
> https://patchwork.ozlabs.org/project/uboot/patch/20211006201700.3018-1-thar...@gateworks.com/

Stefano is on vacation. Tom, would you mind picking Tim's series?

Thanks

mkimage_fit_atf.sh: not found

[Tim Harvey]

Stefano and Fabio,

I'm seeing the imx8mm_venice_defconfig target failing to build on
master due to mkimage_fit_atf.sh not found:
./"arch/arm/mach-imx/mkimage_fit_atf.sh" \
arch/arm/dts/imx8mm-venice-gw71xx-0x.dtb
arch/arm/dts/imx8mm-venice-gw72xx-0x.dtb
arch/arm/dts/imx8mm-venice-gw73xx-0x.dtb
arch/arm/dts/imx8mm-venice-gw7901.dtb
arch/arm/dts/imx8mm-venice-gw7902.dtb > u-boot.its
/bin/sh: 1: ./arch/arm/mach-imx/mkimage_fit_atf.sh: not found

As far as I can tell the other boards that are still using
SPL_FIT_GENERATOR also fail due to this (ie imx8mm_beacon_defconfig,
imx8mq_evk_defconfig, imx8mm-icore-mx8mm-edimm2.2_defconfig, etc).

What is the state of the binman conversion? I submitted a series to
convert my boards to binman and it has just been sitting without any
response for months now [1].

I'm not sure when the above breakage occurred but the conversion to
binman resolves it and other things.

Please let me know what you expect me to do to resolve this as there
is a release pending.

Best regards,

Tim
[1] 
https://patchwork.ozlabs.org/project/uboot/patch/20211006201700.3018-1-thar...@gateworks.com/

Re: [PATCH u-boot-marvell] ddr: marvell: a38x: Fix Synchronous vs Asynchronous mode determination

[Chris Packham]

On Wed, Jan 5, 2022 at 3:57 AM Marek Behún  wrote:
>
> From: Marek Behún 
>
> Before commit 4c289425752f ("mv_ddr: a38x: add support for ddr async
> mode"), Asynchornous Mode was only used when the CPU Subsystem Clock
> Options[4:0] field in the SAR1 register was set to value 0x13: CPU at
> 2 GHz and DDR at 933 MHz.
>
> Then commit 4c289425752f ("mv_ddr: a38x: add support for ddr async
> mode") added support for Asynchornous Modes with frequencies other than
> 933 MHz (but at least 467 MHz), but the code it added to check for
> whether Asynchornous Mode should be used is wrong: it checks whether the
> frequency setting in board DDR topology map is set to value other than
> MV_DDR_FREQ_SAR.
>
> Thus boards which define a specific value, greater than 400 MHz, for DDR
> frequency in their board topology (e.g. Turris Omnia defines
> MV_DDR_FREQ_800), are incorrectly put into Asynchornous Mode after that
> commit.
>
> The A38x Functional Specification, section 10.12 DRAM Clocking, says:
>   In Synchornous mode, the DRAM and CPU clocks are edge aligned and run
>   in 1:2 or 1:3 CPU to DRAM frequency ratios.
>
> Change the check for whether Asynchornous Mode should be used according
> to this explanation in Functional Specification.
>
> Signed-off-by: Marek Behún 

Tested-by: Chris Packham 

> ---
> A PR was also created for mv-ddr-marvell:
>   https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/35
>
> Please test this. It is possible this commit will fix DDR training
> issues, since commit 4c289425752f in mv-ddr-marvell started using
> Asynchronous Mode where Synchronous Mode was used previously.
> ---
>  drivers/ddr/marvell/a38x/mv_ddr_plat.c | 19 ---
>  1 file changed, 8 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/ddr/marvell/a38x/mv_ddr_plat.c 
> b/drivers/ddr/marvell/a38x/mv_ddr_plat.c
> index faafc86ea2..7c7bce73a3 100644
> --- a/drivers/ddr/marvell/a38x/mv_ddr_plat.c
> +++ b/drivers/ddr/marvell/a38x/mv_ddr_plat.c
> @@ -167,8 +167,6 @@ static u16 a38x_vco_freq_per_sar_ref_clk_40_mhz[] = {
>  };
>
>
> -static u32 async_mode_at_tf;
> -
>  static u32 dq_bit_map_2_phy_pin[] = {
> 1, 0, 2, 6, 9, 8, 3, 7, /* 0 */
> 8, 9, 1, 7, 2, 6, 3, 0, /* 1 */
> @@ -734,7 +732,8 @@ static int ddr3_tip_a38x_set_divider(u8 dev_num, u32 
> if_id,
> u32 divider = 0;
> u32 sar_val, ref_clk_satr;
> u32 async_val;
> -   u32 freq = mv_ddr_freq_get(frequency);
> +   u32 cpu_freq;
> +   u32 ddr_freq = mv_ddr_freq_get(frequency);
>
> if (if_id != 0) {
> DEBUG_TRAINING_ACCESS(DEBUG_LEVEL_ERROR,
> @@ -751,11 +750,14 @@ static int ddr3_tip_a38x_set_divider(u8 dev_num, u32 
> if_id,
> ref_clk_satr = reg_read(DEVICE_SAMPLE_AT_RESET2_REG);
> if (((ref_clk_satr >> DEVICE_SAMPLE_AT_RESET2_REG_REFCLK_OFFSET) & 
> 0x1) ==
> DEVICE_SAMPLE_AT_RESET2_REG_REFCLK_25MHZ)
> -   divider = a38x_vco_freq_per_sar_ref_clk_25_mhz[sar_val] / 
> freq;
> +   cpu_freq = a38x_vco_freq_per_sar_ref_clk_25_mhz[sar_val];
> else
> -   divider = a38x_vco_freq_per_sar_ref_clk_40_mhz[sar_val] / 
> freq;
> +   cpu_freq = a38x_vco_freq_per_sar_ref_clk_40_mhz[sar_val];
> +
> +   divider = cpu_freq / ddr_freq;
>
> -   if ((async_mode_at_tf == 1) && (freq > 400)) {
> +   if (((cpu_freq % ddr_freq != 0) || (divider != 2 && divider != 3)) &&
> +   (ddr_freq > 400)) {
> /* Set async mode */
> dunit_write(0x20220, 0x1000, 0x1000);
> dunit_write(0xe42f4, 0x200, 0x200);
> @@ -869,8 +871,6 @@ int ddr3_tip_ext_write(u32 dev_num, u32 if_id, u32 
> reg_addr,
>
>  int mv_ddr_early_init(void)
>  {
> -   struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get();
> -
> /* FIXME: change this configuration per ddr type
>  * configure a380 and a390 to work with receiver odt timing
>  * the odt_config is defined:
> @@ -882,9 +882,6 @@ int mv_ddr_early_init(void)
>
> mv_ddr_sw_db_init(0, 0);
>
> -   if (tm->interface_params[0].memory_freq != MV_DDR_FREQ_SAR)
> -   async_mode_at_tf = 1;
> -
> return MV_OK;
>  }
>
> --
> 2.34.1
>

Re: [PATCH u-boot-marvell] PLEASE TEST ddr: marvell: a38x: fix SPLIT_OUT_MIX state decision

[Chris Packham]

Hi Marek,

On Wed, Jan 5, 2022 at 9:28 AM Marek Behún  wrote:
>
> From: Marek Behún 
>
> Hello,
>
> continuing my  last discussion with Chris [1] about this, could you
> please test this change? (For Chris, mainly on your x530, since last
> time you said it hanged your board in SPL.)

I still get a hang after "Returning to BootROM (return address
0x05c4)... " (after the DDR training).

>
> It should fix DDR3 training issues.
>
> [1] https://lore.kernel.org/u-boot/20210208191225.14645-1-marek.be...@nic.cz/
>
> Signed-off-by: Marek Behún 
> ---
>  .../a38x/ddr3_training_centralization.c   | 27 +++
>  1 file changed, 27 insertions(+)
>
> diff --git a/drivers/ddr/marvell/a38x/ddr3_training_centralization.c 
> b/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
> index 648b37ef6f..ed799757b9 100644
> --- a/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
> +++ b/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
> @@ -55,6 +55,7 @@ static int ddr3_tip_centralization(u32 dev_num, u32 mode)
> enum hws_training_ip_stat training_result[MAX_INTERFACE_NUM];
> u32 if_id, pattern_id, bit_id;
> u8 bus_id;
> +   u8 current_byte_status;
> u8 cur_start_win[BUS_WIDTH_IN_BITS];
> u8 centralization_result[MAX_INTERFACE_NUM][BUS_WIDTH_IN_BITS];
> u8 cur_end_win[BUS_WIDTH_IN_BITS];
> @@ -166,6 +167,10 @@ static int ddr3_tip_centralization(u32 dev_num, u32 mode)
>   result[search_dir_id][7]));
> }
>
> +   current_byte_status =
> +   
> mv_ddr_tip_sub_phy_byte_status_get(if_id,
> +  
> bus_id);
> +
> for (bit_id = 0; bit_id < BUS_WIDTH_IN_BITS;
>  bit_id++) {
> /* check if this code is valid for 2 
> edge, probably not :( */
> @@ -174,11 +179,33 @@ static int ddr3_tip_centralization(u32 dev_num, u32 
> mode)
>[HWS_LOW2HIGH]
>[bit_id],
>EDGE_1);
> +   if (current_byte_status &
> +   (BYTE_SPLIT_OUT_MIX |
> +BYTE_HOMOGENEOUS_SPLIT_OUT)) {
> +   if (cur_start_win[bit_id] >= 
> 64)
> +   cur_start_win[bit_id] 
> -= 64;
> +   else
> +   cur_start_win[bit_id] 
> = 0;
> +   DEBUG_CENTRALIZATION_ENGINE
> +   (DEBUG_LEVEL_INFO,
> +("pattern %d IF %d 
> pup %d bit %d subtract 64 adll from start\n",
> + pattern_id, if_id, 
> bus_id, bit_id));
> +   }
> cur_end_win[bit_id] =
> GET_TAP_RESULT(result
>[HWS_HIGH2LOW]
>[bit_id],
>EDGE_1);
> +   if (cur_end_win[bit_id] >= 64 &&
> +   (current_byte_status &
> +BYTE_SPLIT_OUT_MIX)) {
> +   cur_end_win[bit_id] -= 64;
> +   DEBUG_CENTRALIZATION_ENGINE
> +   (DEBUG_LEVEL_INFO,
> +("pattern %d IF %d 
> pup %d bit %d subtract 64 adll from end\n",
> + pattern_id, if_id, 
> bus_id, bit_id));
> +   }
> +
> /* window length */
> current_window[bit_id] =
> cur_end_win[bit_id] -
> --
> 2.34.1
>

Re: [PATCH u-boot-marvell 0/9] mvebu: Move PCIe code from serdes to PCIe driver

[Pali Rohár]

Mario: Could you please look at this patch series? It touches gdsys
board and for future gdsys board should be converted to use u-boot
driver model API...

On Tuesday 21 December 2021 12:20:10 Pali Rohár wrote:
> This patch series removes gdsys's board_pex_config() function by
> converting it to spl_board_init(), adds a new mvebu-reset driver for
> enabling / disabling PCIe ports and finally moves PCIe code from serdes
> driver to pci_mvebu.c driver.
> 
> After all these changes, PCIe link is not initialized in serdes code
> anymore, but in pci_mvebu.c driver with help of mvebu-reset driver.
> 
> I'm not sure if change for gdsys board is correct, so if somebody has
> this board, please test it.
> 
> I tested this change on A385 board Turris Omnia and I verified that PCIe
> links are really enabled by pci_mvebu.c driver and not before.
> 
> This patch series is based on u-boot-marvell/next branch.
> 
> Pali Rohár (9):
>   arm: mvebu: Convert board_pex_config() to CONFIG_SPL_BOARD_INIT
>   board: gdsys: a38x: Enable PCIe link 2 in spl_board_init()
>   pci: pci_mvebu: Fix PCIe MEM and IO resources assignment and mbus
> mapping
>   pci: pci_mvebu: Inline mvebu_pcie_port_parse_dt() function
>   pci: pci_mvebu: Remove dependency on SOC_REGS_PHY_BASE macro
>   pci: pci_mvebu: Split initialization of PCIe ports into 3 phases
>   pci: pci_mvebu: Wait 100ms for Link Up in mvebu_pcie_probe()
>   arm: mvebu: Implement simple mvebu-reset driver for enabling/disabling
> PCIe ports
>   arm: mvebu: a38x: serdes: Move non-serdes PCIe code to pci_mvebu.c
> 
>  arch/arm/dts/armada-375.dtsi  |   5 +-
>  arch/arm/dts/armada-380.dtsi  |   3 +
>  arch/arm/dts/armada-385.dtsi  |   4 +
>  arch/arm/dts/armada-38x.dtsi  |   1 +
>  arch/arm/dts/armada-xp-98dx3236.dtsi  |   2 +
>  arch/arm/dts/armada-xp-mv78230.dtsi   |   5 +
>  arch/arm/dts/armada-xp-mv78260.dtsi   |   9 +
>  arch/arm/dts/armada-xp-mv78460.dtsi   |  10 +
>  arch/arm/dts/armada-xp-synology-ds414.dts |   1 +
>  arch/arm/dts/armada-xp-theadorable.dts|   1 +
>  arch/arm/dts/armada-xp.dtsi   |   1 +
>  arch/arm/mach-mvebu/Makefile  |   1 +
>  arch/arm/mach-mvebu/include/mach/cpu.h|   5 +-
>  arch/arm/mach-mvebu/serdes/a38x/Makefile  |   1 -
>  arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c|  64 
>  arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h|  28 --
>  .../serdes/a38x/high_speed_env_spec.c |  19 --
>  arch/arm/mach-mvebu/system-controller.c   | 105 +++
>  board/gdsys/a38x/controlcenterdc.c|   6 +-
>  configs/controlcenterdc_defconfig |   1 +
>  drivers/pci/Kconfig   |   1 +
>  drivers/pci/pci_mvebu.c   | 275 ++
>  22 files changed, 371 insertions(+), 177 deletions(-)
>  delete mode 100644 arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
>  delete mode 100644 arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h
>  create mode 100644 arch/arm/mach-mvebu/system-controller.c
> 
> -- 
> 2.20.1
> 

[PATCH u-boot-marvell] PLEASE TEST ddr: marvell: a38x: fix SPLIT_OUT_MIX state decision

[Marek Behún]

From: Marek Behún 

Hello,

continuing my  last discussion with Chris [1] about this, could you
please test this change? (For Chris, mainly on your x530, since last
time you said it hanged your board in SPL.)

It should fix DDR3 training issues.

[1] https://lore.kernel.org/u-boot/20210208191225.14645-1-marek.be...@nic.cz/

Signed-off-by: Marek Behún 
---
 .../a38x/ddr3_training_centralization.c   | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/drivers/ddr/marvell/a38x/ddr3_training_centralization.c 
b/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
index 648b37ef6f..ed799757b9 100644
--- a/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
@@ -55,6 +55,7 @@ static int ddr3_tip_centralization(u32 dev_num, u32 mode)
enum hws_training_ip_stat training_result[MAX_INTERFACE_NUM];
u32 if_id, pattern_id, bit_id;
u8 bus_id;
+   u8 current_byte_status;
u8 cur_start_win[BUS_WIDTH_IN_BITS];
u8 centralization_result[MAX_INTERFACE_NUM][BUS_WIDTH_IN_BITS];
u8 cur_end_win[BUS_WIDTH_IN_BITS];
@@ -166,6 +167,10 @@ static int ddr3_tip_centralization(u32 dev_num, u32 mode)
  result[search_dir_id][7]));
}
 
+   current_byte_status =
+   
mv_ddr_tip_sub_phy_byte_status_get(if_id,
+  
bus_id);
+
for (bit_id = 0; bit_id < BUS_WIDTH_IN_BITS;
 bit_id++) {
/* check if this code is valid for 2 
edge, probably not :( */
@@ -174,11 +179,33 @@ static int ddr3_tip_centralization(u32 dev_num, u32 mode)
   [HWS_LOW2HIGH]
   [bit_id],
   EDGE_1);
+   if (current_byte_status &
+   (BYTE_SPLIT_OUT_MIX |
+BYTE_HOMOGENEOUS_SPLIT_OUT)) {
+   if (cur_start_win[bit_id] >= 64)
+   cur_start_win[bit_id] 
-= 64;
+   else
+   cur_start_win[bit_id] = 
0;
+   DEBUG_CENTRALIZATION_ENGINE
+   (DEBUG_LEVEL_INFO,
+("pattern %d IF %d pup 
%d bit %d subtract 64 adll from start\n",
+ pattern_id, if_id, 
bus_id, bit_id));
+   }
cur_end_win[bit_id] =
GET_TAP_RESULT(result
   [HWS_HIGH2LOW]
   [bit_id],
   EDGE_1);
+   if (cur_end_win[bit_id] >= 64 &&
+   (current_byte_status &
+BYTE_SPLIT_OUT_MIX)) {
+   cur_end_win[bit_id] -= 64;
+   DEBUG_CENTRALIZATION_ENGINE
+   (DEBUG_LEVEL_INFO,
+("pattern %d IF %d pup 
%d bit %d subtract 64 adll from end\n",
+ pattern_id, if_id, 
bus_id, bit_id));
+   }
+
/* window length */
current_window[bit_id] =
cur_end_win[bit_id] -
-- 
2.34.1

Re: [PATCH] usb: xhci: reset endpoint on USB stall

[Stefan Agner]

Bin Meng,

On 2021-09-27 17:14, Marek Vasut wrote:
> On 9/27/21 2:42 PM, Stefan Agner wrote:
>> There are devices which cause a USB stall when trying to read strings.
>> Specifically Arduino Mega R3 stalls when trying to read the product
>> string.
>>
>> The stall currently remains unhandled, and subsequent retries submit new
>> transfers on a stopped endpoint which ultimately cause a crash in
>> abort_td():
>> WARN halted endpoint, queueing URB anyway.
>> XHCI control transfer timed out, aborting...
>> Unexpected XHCI event TRB, skipping... (3affe040  1300 02008401)
>> BUG at drivers/usb/host/xhci-ring.c:505/abort_td()!
>> BUG!
>> resetting ...
>>
>> Linux seems to be able to recover from the stall by issuing a
>> TRB_RESET_EP command.
>>
>> Introduce reset_ep() which issues a TRB_RESET_EP followed by setting the
>> transfer ring dequeue pointer via TRB_SET_DEQ. This allows to properly
>> recover from a USB stall error and continue communicating with the USB
>> device.
>>
>> Signed-off-by: Stefan Agner 
> 
> I hope to get AB/RB from Bin here, then it can go into this release I think.

Any chance you could have a look at this to get it into this release :)

--
Stefan

[PATCH] patman: expand user home when looking for the alias file

[Otavio Salvador]

This allows the use of git aliases files relative to the user home,
without using the full path to the file.

Signed-off-by: Otavio Salvador 
---

 tools/patman/gitutil.py | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py
index 5e4c1128dcb..172de4aae59 100644
--- a/tools/patman/gitutil.py
+++ b/tools/patman/gitutil.py
@@ -616,8 +616,13 @@ def GetAliasFile():
 """
 fname = command.OutputOneLine('git', 'config', 'sendemail.aliasesfile',
 raise_on_error=False)
+
 if fname:
-fname = os.path.join(GetTopLevel(), fname.strip())
+fname = fname.strip()
+if fname.startswith("~/"):
+fname = fname.replace("~", os.path.expanduser('~'), 1)
+fname = os.path.join(GetTopLevel(), fname)
+
 return fname
 
 def GetDefaultUserName():
-- 
2.34.1

Re: [PATCH v2 1/1] fastboot: fb_getvar: Add getvar_logical_blocksize for NXP mfgtool

[Sean Anderson]

On 1/3/22 8:27 AM, Angus Ainslie wrote:

Hi Sean,

On 2021-12-30 08:21, Sean Anderson wrote:

On 12/29/21 8:35 AM, Angus Ainslie wrote:

Hi Sean,

On 2021-12-28 08:59, Sean Anderson wrote:

Hi Angus,


NXP's mfgtool queies the mmc blocksize and splits a sparse image into
blocksize size pieces for the upload.


It's still not clear to me why this is necessary. fastboot (for example)
transfers in blocks of max-download-size. Using the actual block size
seems like it would result in unnecessary overhead.



The version of uuu that we are using requires the block-size for the sparse 
upload

https://source.puri.sm/Librem5/mfgtools/-/blob/pureos/amber/libuuu/fastboot.cpp#L501

It looks like the upstream version will default to 4096 if the block-size is 
not provided

https://github.com/NXPmicro/mfgtools/blob/5397913ad97db422c1d70f314dedff4cb7d976b9/libuuu/fastboot.cpp#L642

Instead of making assumptions about the block size wouldn't it be better to 
provide one if requested ?


The block size is for the sparse image. This determines the granularity
of the sections of the image. For example, if the block size is 1K, then
all sizes will be multiples of 1K. So if you have a block with 1 byte of
data and 1023 bytes of 0 then the whole block will be transferred
instead of being replaced with a fill block.



Thanks for the explanation on how it works.


However, the sparse file block size size completely orthogonal to
the block size of the device being written to. The only thing it affects
is the efficiency of the sparse image. For example, I generate my sparse
files with a block size of 1M, because it is a nice convenient number.



Ok so the way the NXP's uuu uses the blocksize is not correct. However the tool 
is already out there in the wild.

Can we add the block-size response to support that tool or will it be required 
that uuu needs to be upgraded to work with mainline u-boot ?


IMO this should be fixed in uuu. And as I understand it, this is only an
issue when you transfer a raw image with uuu. Perhaps you can generate
a fastboot sparse image (with img2simg) and transfer that instead.

--Sean

[RESEND PATCH v3 01/12] mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMC

[Sean Anderson]

[ fsl_esdhc commit 41dec2fe99512e941261594f522b2e7d485c314b ]

U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already
support it, so let's force to use it.

- Drop non-BLK support for DM_MMC introduced by below patch.
  66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled

- Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC).

- Use DM_MMC instead of BLK for conditional compile.

Signed-off-by: Yangbo Lu 
Signed-off-by: Sean Anderson 
---

Changes in v3:
- Drop Kconfig BLK dependency

 drivers/mmc/fsl_esdhc_imx.c | 33 +
 1 file changed, 1 insertion(+), 32 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 4c06361bee..85cd72a796 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -39,10 +39,6 @@
 #include 
 #include 
 -#if !CONFIG_IS_ENABLED(BLK)
-#include "mmc_private.h"
-#endif
-
 #ifndef ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE
 #ifdef CONFIG_FSL_USDHC
 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE  1
@@ -58,7 +54,6 @@ DECLARE_GLOBAL_DATA_PTR;
IRQSTATEN_DEBE | IRQSTATEN_BRR | IRQSTATEN_BWR 
| \
IRQSTATEN_DINT)
 #define MAX_TUNING_LOOP 40
-#define ESDHC_DRIVER_STAGE_VALUE 0x
  struct fsl_esdhc {
uintdsaddr; /* SDMA system address register */
@@ -157,7 +152,7 @@ struct fsl_esdhc_priv {
unsigned int clock;
unsigned int mode;
unsigned int bus_width;
-#if !CONFIG_IS_ENABLED(BLK)
+#if !CONFIG_IS_ENABLED(DM_MMC)
struct mmc *mmc;
 #endif
struct udevice *dev;
@@ -1510,9 +1505,6 @@ static int fsl_esdhc_probe(struct udevice *dev)
struct esdhc_soc_data *data =
(struct esdhc_soc_data *)dev_get_driver_data(dev);
struct mmc *mmc;
-#if !CONFIG_IS_ENABLED(BLK)
-   struct blk_desc *bdesc;
-#endif
int ret;
  #if CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -1611,25 +1603,6 @@ static int fsl_esdhc_probe(struct udevice *dev)
mmc = >mmc;
mmc->cfg = >cfg;
mmc->dev = dev;
-#if !CONFIG_IS_ENABLED(BLK)
-   mmc->priv = priv;
-
-   /* Setup dsr related values */
-   mmc->dsr_imp = 0;
-   mmc->dsr = ESDHC_DRIVER_STAGE_VALUE;
-   /* Setup the universal parts of the block interface just once */
-   bdesc = mmc_get_blk_desc(mmc);
-   bdesc->if_type = IF_TYPE_MMC;
-   bdesc->removable = 1;
-   bdesc->devnum = mmc_get_next_devnum();
-   bdesc->block_read = mmc_bread;
-   bdesc->block_write = mmc_bwrite;
-   bdesc->block_erase = mmc_berase;
-
-   /* setup initial part type */
-   bdesc->part_type = mmc->cfg->part_type;
-   mmc_list_add(mmc);
-#endif
upriv->mmc = mmc;
 @@ -1740,14 +1713,12 @@ static const struct udevice_id fsl_esdhc_ids[] = {
{ /* sentinel */ }
 };
 -#if CONFIG_IS_ENABLED(BLK)
 static int fsl_esdhc_bind(struct udevice *dev)
 {
struct fsl_esdhc_plat *plat = dev_get_plat(dev);
return mmc_bind(dev, >mmc, >cfg);
 }
-#endif
  U_BOOT_DRIVER(fsl_esdhc) = {
.name   = "fsl_esdhc",
@@ -1755,9 +1726,7 @@ U_BOOT_DRIVER(fsl_esdhc) = {
.of_match = fsl_esdhc_ids,
.of_to_plat = fsl_esdhc_of_to_plat,
.ops= _esdhc_ops,
-#if CONFIG_IS_ENABLED(BLK)
.bind   = fsl_esdhc_bind,
-#endif
.probe  = fsl_esdhc_probe,
.plat_auto  = sizeof(struct fsl_esdhc_plat),
.priv_auto  = sizeof(struct fsl_esdhc_priv),
--
2.25.1

[PATCH v2] net: fsl_mdio: Fix busy flag polling register

[Markus Koch]

NXP's mEMAC reference manual, Chapter 6.5.5 "MDIO Ethernet Management
Interface usage", specifies to poll the BSY (0) bit in the CFG/STAT
register to wait until a transaction has finished, not bit 31 in the
data register.

In the Linux kernel, this has already been fixed in commit 26eee0210ad7
("net/fsl: fix a bug in xgmac_mdio").

Signed-off-by: Markus Koch 
---

Changed to use the mdio_stat register. Thanks, Ioana!

 drivers/net/fm/memac_phy.c | 2 +-
 include/fsl_memac.h| 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c
index 72b500a6d1..3ddae97e09 100644
--- a/drivers/net/fm/memac_phy.c
+++ b/drivers/net/fm/memac_phy.c
@@ -64,7 +64,7 @@ static int memac_wait_until_done(struct memac_mdio_controller 
*regs)
 {
unsigned int timeout = MAX_NUM_RETRIES;
 
-   while ((memac_in_32(>mdio_data) & MDIO_DATA_BSY) && timeout--)
+   while ((memac_in_32(>mdio_stat) & MDIO_STAT_BSY) && timeout--)
;
 
if (!timeout) {
diff --git a/include/fsl_memac.h b/include/fsl_memac.h
index d067f1511c..6ac1e558b9 100644
--- a/include/fsl_memac.h
+++ b/include/fsl_memac.h
@@ -254,7 +254,6 @@ struct memac_mdio_controller {
 #define MDIO_CTL_READ  (1 << 15)
 
 #define MDIO_DATA(x)   (x & 0x)
-#define MDIO_DATA_BSY  (1 << 31)
 
 struct fsl_enet_mac;
 
-- 
2.34.1

Re: [PATCH u-boot-marvell] ddr: marvell: a38x: Fix Synchronous vs Asynchronous mode determination

[Marek Behún]

On Tue,  4 Jan 2022 15:57:49 +0100
Marek Behún  wrote:

> From: Marek Behún 
> 
> Before commit 4c289425752f ("mv_ddr: a38x: add support for ddr async
> mode"), Asynchornous Mode was only used when the CPU Subsystem Clock
> Options[4:0] field in the SAR1 register was set to value 0x13: CPU at
> 2 GHz and DDR at 933 MHz.
> 
> Then commit 4c289425752f ("mv_ddr: a38x: add support for ddr async
> mode") added support for Asynchornous Modes with frequencies other than
> 933 MHz (but at least 467 MHz), but the code it added to check for
> whether Asynchornous Mode should be used is wrong: it checks whether the
> frequency setting in board DDR topology map is set to value other than
> MV_DDR_FREQ_SAR.
> 
> Thus boards which define a specific value, greater than 400 MHz, for DDR
> frequency in their board topology (e.g. Turris Omnia defines
> MV_DDR_FREQ_800), are incorrectly put into Asynchornous Mode after that
> commit.
> 
> The A38x Functional Specification, section 10.12 DRAM Clocking, says:
>   In Synchornous mode, the DRAM and CPU clocks are edge aligned and run
>   in 1:2 or 1:3 CPU to DRAM frequency ratios.
> 
> Change the check for whether Asynchornous Mode should be used according
> to this explanation in Functional Specification.
> 
> Signed-off-by: Marek Behún 

I forgot to mention that we discovered this on Turris Omnia by comparing
DDR speed with the
  time mtest 1000 1010 0 1
command.

In Asynchornous Mode this takes ~27 seconds, in Synchronous mode ~22
seconds.

Marek

[PATCH u-boot-marvell] board: gdsys: Drop Dirk Eibach from MAINTAINERS

[Marek Behún]

From: Marek Behún 

I got an

: host mxlb.ispgateway.de[80.67.18.126] said:
  554 Sorry, no mailbox here by that name. (in reply to RCPT TO command)

when sending e-mail to dirk.eib...@gdsys.cc.

Drop Dirk Eibach from MAINTAINERS of board/gdsys/a38x and
board/gdsys/mpc8308. The latter would be left maintainerless, add
Mario Six  (he is also maintainer of the former
board).

Signed-off-by: Marek Behún 
---
 board/gdsys/a38x/MAINTAINERS| 1 -
 board/gdsys/mpc8308/MAINTAINERS | 2 +-
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/board/gdsys/a38x/MAINTAINERS b/board/gdsys/a38x/MAINTAINERS
index d31e675ddc..6492e79541 100644
--- a/board/gdsys/a38x/MAINTAINERS
+++ b/board/gdsys/a38x/MAINTAINERS
@@ -1,5 +1,4 @@
 A38X BOARD
-M: Dirk Eibach 
 M: Mario Six 
 S: Maintained
 F: board/gdsys/a38x/
diff --git a/board/gdsys/mpc8308/MAINTAINERS b/board/gdsys/mpc8308/MAINTAINERS
index dc0b389f73..57faba4695 100644
--- a/board/gdsys/mpc8308/MAINTAINERS
+++ b/board/gdsys/mpc8308/MAINTAINERS
@@ -1,5 +1,5 @@
 MPC8308 BOARD
-M: Dirk Eibach 
+M: Mario Six 
 S: Maintained
 F: board/gdsys/mpc8308/
 F: include/configs/gazerbeam.h
-- 
2.34.1

[PATCH u-boot-marvell] ddr: marvell: a38x: Fix Synchronous vs Asynchronous mode determination

[Marek Behún]

From: Marek Behún 

Before commit 4c289425752f ("mv_ddr: a38x: add support for ddr async
mode"), Asynchornous Mode was only used when the CPU Subsystem Clock
Options[4:0] field in the SAR1 register was set to value 0x13: CPU at
2 GHz and DDR at 933 MHz.

Then commit 4c289425752f ("mv_ddr: a38x: add support for ddr async
mode") added support for Asynchornous Modes with frequencies other than
933 MHz (but at least 467 MHz), but the code it added to check for
whether Asynchornous Mode should be used is wrong: it checks whether the
frequency setting in board DDR topology map is set to value other than
MV_DDR_FREQ_SAR.

Thus boards which define a specific value, greater than 400 MHz, for DDR
frequency in their board topology (e.g. Turris Omnia defines
MV_DDR_FREQ_800), are incorrectly put into Asynchornous Mode after that
commit.

The A38x Functional Specification, section 10.12 DRAM Clocking, says:
  In Synchornous mode, the DRAM and CPU clocks are edge aligned and run
  in 1:2 or 1:3 CPU to DRAM frequency ratios.

Change the check for whether Asynchornous Mode should be used according
to this explanation in Functional Specification.

Signed-off-by: Marek Behún 
---
A PR was also created for mv-ddr-marvell:
  https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/35

Please test this. It is possible this commit will fix DDR training
issues, since commit 4c289425752f in mv-ddr-marvell started using
Asynchronous Mode where Synchronous Mode was used previously.
---
 drivers/ddr/marvell/a38x/mv_ddr_plat.c | 19 ---
 1 file changed, 8 insertions(+), 11 deletions(-)

diff --git a/drivers/ddr/marvell/a38x/mv_ddr_plat.c 
b/drivers/ddr/marvell/a38x/mv_ddr_plat.c
index faafc86ea2..7c7bce73a3 100644
--- a/drivers/ddr/marvell/a38x/mv_ddr_plat.c
+++ b/drivers/ddr/marvell/a38x/mv_ddr_plat.c
@@ -167,8 +167,6 @@ static u16 a38x_vco_freq_per_sar_ref_clk_40_mhz[] = {
 };
 
 
-static u32 async_mode_at_tf;
-
 static u32 dq_bit_map_2_phy_pin[] = {
1, 0, 2, 6, 9, 8, 3, 7, /* 0 */
8, 9, 1, 7, 2, 6, 3, 0, /* 1 */
@@ -734,7 +732,8 @@ static int ddr3_tip_a38x_set_divider(u8 dev_num, u32 if_id,
u32 divider = 0;
u32 sar_val, ref_clk_satr;
u32 async_val;
-   u32 freq = mv_ddr_freq_get(frequency);
+   u32 cpu_freq;
+   u32 ddr_freq = mv_ddr_freq_get(frequency);
 
if (if_id != 0) {
DEBUG_TRAINING_ACCESS(DEBUG_LEVEL_ERROR,
@@ -751,11 +750,14 @@ static int ddr3_tip_a38x_set_divider(u8 dev_num, u32 
if_id,
ref_clk_satr = reg_read(DEVICE_SAMPLE_AT_RESET2_REG);
if (((ref_clk_satr >> DEVICE_SAMPLE_AT_RESET2_REG_REFCLK_OFFSET) & 0x1) 
==
DEVICE_SAMPLE_AT_RESET2_REG_REFCLK_25MHZ)
-   divider = a38x_vco_freq_per_sar_ref_clk_25_mhz[sar_val] / freq;
+   cpu_freq = a38x_vco_freq_per_sar_ref_clk_25_mhz[sar_val];
else
-   divider = a38x_vco_freq_per_sar_ref_clk_40_mhz[sar_val] / freq;
+   cpu_freq = a38x_vco_freq_per_sar_ref_clk_40_mhz[sar_val];
+
+   divider = cpu_freq / ddr_freq;
 
-   if ((async_mode_at_tf == 1) && (freq > 400)) {
+   if (((cpu_freq % ddr_freq != 0) || (divider != 2 && divider != 3)) &&
+   (ddr_freq > 400)) {
/* Set async mode */
dunit_write(0x20220, 0x1000, 0x1000);
dunit_write(0xe42f4, 0x200, 0x200);
@@ -869,8 +871,6 @@ int ddr3_tip_ext_write(u32 dev_num, u32 if_id, u32 reg_addr,
 
 int mv_ddr_early_init(void)
 {
-   struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get();
-
/* FIXME: change this configuration per ddr type
 * configure a380 and a390 to work with receiver odt timing
 * the odt_config is defined:
@@ -882,9 +882,6 @@ int mv_ddr_early_init(void)
 
mv_ddr_sw_db_init(0, 0);
 
-   if (tm->interface_params[0].memory_freq != MV_DDR_FREQ_SAR)
-   async_mode_at_tf = 1;
-
return MV_OK;
 }
 
-- 
2.34.1

Re: [PATCH] net: fsl_mdio: Fix busy flag polling register

[Ioana Ciornei]

On Sun, Jan 02, 2022 at 06:34:18PM +0100, Markus Koch wrote:
> NXP's mEMAC reference manual, Chapter 6.5.5 "MDIO Ethernet Management
> Interface usage", specifies to poll the BSY (0) bit in the CFG (we call
> it CTL) register to wait until a transaction has finished, not bit 31 in
> the data register.

First of all, the CFG (Configuration) and CTL (Control) are two
different registers so the '(we call it CTL)' part of your statement is
false.

Indeed, the BSY bit is located in the MDIO_CFG register but that is not
accessed through the mdio_ctl field as you used it in your changes.
It's instead accessed through the mdio_stat field (the MDIO_CFG is
called in some RMs as the Configuration and Status register).

> 
> In the Linux kernel, this has already been fixed in commit 26eee0210ad7
> ("net/fsl: fix a bug in xgmac_mdio").
> 

Even the commit that you referenced is using the mdio_stat field.

--- a/drivers/net/ethernet/freescale/xgmac_mdio.c
+++ b/drivers/net/ethernet/freescale/xgmac_mdio.c
@@ -79,7 +79,7 @@ static int xgmac_wait_until_done(struct device *dev,
 
/* Wait till the MDIO write is complete */
timeout = TIMEOUT;
-   while ((ioread32be(>mdio_data) & MDIO_DATA_BSY) && timeout) {
+   while ((ioread32be(>mdio_stat) & MDIO_STAT_BSY) && timeout) {
cpu_relax();
timeout--;
}

Please fix this up in a v2.

Thanks,
Ioana

Re: [RFC Patch v2] binman: add support for creating dummy files for external blobs

[Heiko Thiery]

Hi Simon,


Am So., 2. Jan. 2022 um 18:15 Uhr schrieb Simon Glass :
>
> Hi Heiko,
>
> On Thu, 2 Dec 2021 at 19:53, Simon Glass  wrote:
> >
> > Hi Heiko,
> >
> > On Mon, 29 Nov 2021 at 02:48, Heiko Thiery  wrote:
> > >
> > > While converting to binman for an imx8mq board, it has been found that
> > > building in the u-boot CI fails. This is because an imx8mq requires an
> > > external binary (signed_hdmi_imx8m.bin). If this file cannot be found
> > > mkimage fails.
> > > To be able to build this board in the u-boot CI a binman option
> > > (--fake-ext-blobs) is introduced that can be switched on via the u-boot
> > > makefile option BINMAN_FAKE_EXT_BLOBS. With that the needed dummy files 
> > > are
> > > created.
> > >
> > > Signed-off-by: Heiko Thiery 
> > > ---
> > > v2:
> > >  - pass allow_fake_blobs to ProcessImage()
> > >  - set AllowAllowFakeBlob() to images/entries
> > >  - create fake blob in Entry_blot.ObtainContents() when file is missing 
> > > and
> > >creation is allowed
> > >
> > >  still missing:
> > >   - unittest
> > >   - option to set BINMAN_FAKE_EXT_BLOBS in Makefile via environment
> > > variable. With that we could simply set this env variable in the 
> > > CI
> > > (gitlab-ci.yml) with adding support to buildman.
> > >
> > >  Makefile   |  1 +
> > >  tools/binman/cmdline.py|  2 ++
> > >  tools/binman/control.py|  9 +++--
> > >  tools/binman/entry.py  | 11 +++
> > >  tools/binman/etype/blob.py |  7 +++
> > >  tools/binman/etype/blob_ext.py |  8 
> > >  tools/binman/etype/mkimage.py  |  9 +
> > >  tools/binman/etype/section.py  |  9 +
> > >  8 files changed, 54 insertions(+), 2 deletions(-)
> >
> > This looks good to me! The only thing is that instead of the warning
> > you should just print a single line at the end saying which blobs were
> > faked. See missing_list in ProcessImage() for how that could work. You
> > can set self.fake_blob in your blob.ObtainContents() and then have a
> > similar thing to CheckMissing() to actually collect the list of
> > entries which were faked.
> >
> > Also, for the real version can you please add a test (so 'binman test
> > -T' stays at 100% test coverage) and some docs in binman.rst ? You can
> > use testMissingBlob() as a template.
>
> Any word on this? I'd like to get this feature in and take a look at
> missing vendor tools, too.

I have a new version available with your comments included. But the
tests are still missing. In the past days I had no motivation to work
on that. I will try to do this in the next days.

> Also I think your feature should be on by default.


-- 
Heiko

Re: [PATCH v2 2/7] common: remove bedbug debugger support

[Simon Glass]

On Sat, 1 Jan 2022 at 10:14, Ovidiu Panait  wrote:
>
> Commit 98f705c9cefd ("powerpc: remove 4xx support") removed (in 2017) the
> last code that made use of bedbug debugger support. Since there aren't
> any boards left that define either CONFIG_CMD_BEDBUG or a real
> bedbug_init(), drop this feature from u-boot.
>
> Signed-off-by: Ovidiu Panait 
> ---
>
> Changes in v2:
> - new patch
>
>  arch/powerpc/cpu/mpc83xx/traps.c |7 -
>  arch/powerpc/cpu/mpc85xx/traps.c |7 -
>  cmd/Kconfig  |7 -
>  cmd/Makefile |1 -
>  cmd/bedbug.c |  410 --
>  common/Makefile  |1 -
>  common/bedbug.c  | 1254 --
>  common/board_r.c |9 +-
>  doc/README.bedbug|   56 --
>  include/bedbug/bedbug.h  |   40 -
>  include/bedbug/ppc.h |  408 --
>  include/bedbug/regs.h|  400 --
>  include/bedbug/tables.h  |  601 --
>  include/bedbug/type.h|   29 -
>  post/lib_powerpc/string.c|1 -
>  15 files changed, 1 insertion(+), 3230 deletions(-)
>  delete mode 100644 cmd/bedbug.c
>  delete mode 100644 common/bedbug.c
>  delete mode 100644 doc/README.bedbug
>  delete mode 100644 include/bedbug/bedbug.h
>  delete mode 100644 include/bedbug/ppc.h
>  delete mode 100644 include/bedbug/regs.h
>  delete mode 100644 include/bedbug/tables.h
>  delete mode 100644 include/bedbug/type.h

Reviewed-by: Simon Glass 

Re: [PATCH v6 0/1] imx8mn_var_som: Add support for Variscite VAR-SOM-MX8M-NANO board

[Ariel D'Alessandro]

Hi Tom,

On 1/4/22 10:56, Tom Rini wrote:

On Mon, Jan 03, 2022 at 05:55:21PM -0300, Ariel D'Alessandro wrote:


Gentle ping. Can we get this merged?


Does this need to be in for the v2022.01 release or can it wait for
v2022.04?  Thanks.


No, there's no real rush for this to be in v2022.01. Just wanted to know 
if there was any pending changes and get it approved. Thanks.






On 11/23/21 13:33, Ariel D'Alessandro wrote:

Changes in v6:
* Fixed typo in documentation.
* Removed downstream config option IMX8M_BOARD_INIT_DRAM.

Changes in v5:
* Fixed documentation.

Changes in v4:
* Added board documentation.
* Cleaned up board config.

Changes in v3:
* Picked device tree from kernel.
* Properly added MAINTAINERS entry.
* Removed CONFIG_SPL_BUILD anti-pattern in board config.

Changes in v2:
* Reordered dt properties alphabetically.
* Removed downstream stuff in bootargs.
* Fixed binman configuration.
* Several code styling fixes.

Ariel D'Alessandro (1):
imx8mn_var_som: Add support for Variscite VAR-SOM-MX8M-NANO board

   arch/arm/dts/Makefile |   1 +
   .../dts/imx8mn-var-som-symphony-u-boot.dtsi   | 256 
   arch/arm/dts/imx8mn-var-som-symphony.dts  | 240 
   arch/arm/dts/imx8mn-var-som.dtsi  | 547 ++
   arch/arm/mach-imx/imx8m/Kconfig   |   8 +
   board/variscite/imx8mn_var_som/Kconfig|  17 +
   board/variscite/imx8mn_var_som/MAINTAINERS|   7 +
   board/variscite/imx8mn_var_som/Makefile   |  12 +
   board/variscite/imx8mn_var_som/ddr4_timing.c  | 528 +
   .../variscite/imx8mn_var_som/imx8mn_var_som.c |  30 +
   .../imx8mn_var_som/imximage-8mn-ddr4.cfg  |  10 +
   board/variscite/imx8mn_var_som/spl.c  |  93 +++
   configs/imx8mn_var_som_defconfig  |  98 
   doc/board/index.rst   |   1 +
   doc/board/variscite/imx8mn_var_som.rst|  56 ++
   doc/board/variscite/index.rst |   9 +
   include/configs/imx8mn_var_som.h  |  90 +++
   17 files changed, 2003 insertions(+)
   create mode 100644 arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
   create mode 100644 arch/arm/dts/imx8mn-var-som-symphony.dts
   create mode 100644 arch/arm/dts/imx8mn-var-som.dtsi
   create mode 100644 board/variscite/imx8mn_var_som/Kconfig
   create mode 100644 board/variscite/imx8mn_var_som/MAINTAINERS
   create mode 100644 board/variscite/imx8mn_var_som/Makefile
   create mode 100644 board/variscite/imx8mn_var_som/ddr4_timing.c
   create mode 100644 board/variscite/imx8mn_var_som/imx8mn_var_som.c
   create mode 100644 board/variscite/imx8mn_var_som/imximage-8mn-ddr4.cfg
   create mode 100644 board/variscite/imx8mn_var_som/spl.c
   create mode 100644 configs/imx8mn_var_som_defconfig
   create mode 100644 doc/board/variscite/imx8mn_var_som.rst
   create mode 100644 doc/board/variscite/index.rst
   create mode 100644 include/configs/imx8mn_var_som.h

Re: [PATCH v6 0/1] imx8mn_var_som: Add support for Variscite VAR-SOM-MX8M-NANO board

[Tom Rini]

On Mon, Jan 03, 2022 at 05:55:21PM -0300, Ariel D'Alessandro wrote:

> Gentle ping. Can we get this merged?

Does this need to be in for the v2022.01 release or can it wait for
v2022.04?  Thanks.

> 
> On 11/23/21 13:33, Ariel D'Alessandro wrote:
> > Changes in v6:
> > * Fixed typo in documentation.
> > * Removed downstream config option IMX8M_BOARD_INIT_DRAM.
> > 
> > Changes in v5:
> > * Fixed documentation.
> > 
> > Changes in v4:
> > * Added board documentation.
> > * Cleaned up board config.
> > 
> > Changes in v3:
> > * Picked device tree from kernel.
> > * Properly added MAINTAINERS entry.
> > * Removed CONFIG_SPL_BUILD anti-pattern in board config.
> > 
> > Changes in v2:
> > * Reordered dt properties alphabetically.
> > * Removed downstream stuff in bootargs.
> > * Fixed binman configuration.
> > * Several code styling fixes.
> > 
> > Ariel D'Alessandro (1):
> >imx8mn_var_som: Add support for Variscite VAR-SOM-MX8M-NANO board
> > 
> >   arch/arm/dts/Makefile |   1 +
> >   .../dts/imx8mn-var-som-symphony-u-boot.dtsi   | 256 
> >   arch/arm/dts/imx8mn-var-som-symphony.dts  | 240 
> >   arch/arm/dts/imx8mn-var-som.dtsi  | 547 ++
> >   arch/arm/mach-imx/imx8m/Kconfig   |   8 +
> >   board/variscite/imx8mn_var_som/Kconfig|  17 +
> >   board/variscite/imx8mn_var_som/MAINTAINERS|   7 +
> >   board/variscite/imx8mn_var_som/Makefile   |  12 +
> >   board/variscite/imx8mn_var_som/ddr4_timing.c  | 528 +
> >   .../variscite/imx8mn_var_som/imx8mn_var_som.c |  30 +
> >   .../imx8mn_var_som/imximage-8mn-ddr4.cfg  |  10 +
> >   board/variscite/imx8mn_var_som/spl.c  |  93 +++
> >   configs/imx8mn_var_som_defconfig  |  98 
> >   doc/board/index.rst   |   1 +
> >   doc/board/variscite/imx8mn_var_som.rst|  56 ++
> >   doc/board/variscite/index.rst |   9 +
> >   include/configs/imx8mn_var_som.h  |  90 +++
> >   17 files changed, 2003 insertions(+)
> >   create mode 100644 arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
> >   create mode 100644 arch/arm/dts/imx8mn-var-som-symphony.dts
> >   create mode 100644 arch/arm/dts/imx8mn-var-som.dtsi
> >   create mode 100644 board/variscite/imx8mn_var_som/Kconfig
> >   create mode 100644 board/variscite/imx8mn_var_som/MAINTAINERS
> >   create mode 100644 board/variscite/imx8mn_var_som/Makefile
> >   create mode 100644 board/variscite/imx8mn_var_som/ddr4_timing.c
> >   create mode 100644 board/variscite/imx8mn_var_som/imx8mn_var_som.c
> >   create mode 100644 board/variscite/imx8mn_var_som/imximage-8mn-ddr4.cfg
> >   create mode 100644 board/variscite/imx8mn_var_som/spl.c
> >   create mode 100644 configs/imx8mn_var_som_defconfig
> >   create mode 100644 doc/board/variscite/imx8mn_var_som.rst
> >   create mode 100644 doc/board/variscite/index.rst
> >   create mode 100644 include/configs/imx8mn_var_som.h
> > 

-- 
Tom


signature.asc
Description: PGP signature

[PATCH v1 4/5] configs: Migrate CONFIG_SYS_MAX_FLASH_BANKS to Kconfig

[Patrick Delaunay]

Use moveconfig.py script to convert define CONFIG_SYS_MAX_FLASH_BANKS
and CONFIG_SYS_MAX_FLASH_BANKS_DETECT to Kconfig and move these entries
to defconfigs.

Signed-off-by: Patrick Delaunay 
Reviewed-by: Simon Glass 
---

 README   |  3 ---
 configs/3c120_defconfig  |  1 +
 configs/M5253DEMO_defconfig  |  1 +
 configs/MPC8548CDS_36BIT_defconfig   |  1 +
 configs/MPC8548CDS_defconfig |  1 +
 configs/MPC8548CDS_legacy_defconfig  |  1 +
 configs/P3041DS_NAND_defconfig   |  1 +
 configs/P3041DS_SDCARD_defconfig |  1 +
 configs/P3041DS_SPIFLASH_defconfig   |  1 +
 configs/P3041DS_defconfig|  1 +
 configs/P4080DS_SDCARD_defconfig |  1 +
 configs/P4080DS_SPIFLASH_defconfig   |  1 +
 configs/P4080DS_defconfig|  1 +
 configs/P5040DS_NAND_defconfig   |  1 +
 configs/P5040DS_SDCARD_defconfig |  1 +
 configs/P5040DS_SPIFLASH_defconfig   |  1 +
 configs/P5040DS_defconfig|  1 +
 configs/T1042D4RDB_NAND_defconfig|  1 +
 configs/T1042D4RDB_SDCARD_defconfig  |  1 +
 configs/T1042D4RDB_SPIFLASH_defconfig|  1 +
 configs/T1042D4RDB_defconfig |  1 +
 configs/T2080QDS_NAND_defconfig  |  1 +
 configs/T2080QDS_SDCARD_defconfig|  1 +
 configs/T2080QDS_SECURE_BOOT_defconfig   |  1 +
 configs/T2080QDS_SPIFLASH_defconfig  |  1 +
 configs/T2080QDS_defconfig   |  1 +
 configs/T4240RDB_SDCARD_defconfig|  1 +
 configs/T4240RDB_defconfig   |  1 +
 configs/boston32r2_defconfig |  1 +
 configs/boston32r2el_defconfig   |  1 +
 configs/boston32r6_defconfig |  1 +
 configs/boston32r6el_defconfig   |  1 +
 configs/boston64r2_defconfig |  1 +
 configs/boston64r2el_defconfig   |  1 +
 configs/boston64r6_defconfig |  1 +
 configs/boston64r6el_defconfig   |  1 +
 configs/cobra5272_defconfig  |  1 +
 configs/comtrend_ct5361_ram_defconfig|  1 +
 configs/comtrend_wap5813n_ram_defconfig  |  1 +
 configs/ethernut5_defconfig  |  1 +
 configs/huawei_hg556a_ram_defconfig  |  1 +
 configs/j7200_evm_a72_defconfig  |  1 +
 configs/j7200_evm_r5_defconfig   |  1 +
 configs/j721e_evm_a72_defconfig  |  1 +
 configs/j721e_hs_evm_a72_defconfig   |  1 +
 configs/ls1021aqds_ddr4_nor_defconfig|  1 +
 configs/ls1021aqds_ddr4_nor_lpuart_defconfig |  1 +
 configs/ls1021aqds_nand_defconfig|  1 +
 configs/ls1021aqds_nor_SECURE_BOOT_defconfig |  1 +
 configs/ls1021aqds_nor_defconfig |  1 +
 configs/ls1021aqds_nor_lpuart_defconfig  |  1 +
 configs/ls1021aqds_sdcard_ifc_defconfig  |  1 +
 configs/ls1046aqds_SECURE_BOOT_defconfig |  1 +
 configs/ls1046aqds_defconfig |  1 +
 configs/ls1046aqds_lpuart_defconfig  |  1 +
 configs/ls1046aqds_nand_defconfig|  1 +
 configs/ls1046aqds_sdcard_ifc_defconfig  |  1 +
 configs/ls1046aqds_tfa_SECURE_BOOT_defconfig |  1 +
 configs/ls1046aqds_tfa_defconfig |  1 +
 configs/ls1088aqds_defconfig |  1 +
 configs/ls1088aqds_sdcard_ifc_defconfig  |  1 +
 configs/ls1088aqds_tfa_defconfig |  1 +
 configs/ls2080aqds_SECURE_BOOT_defconfig |  1 +
 configs/ls2080aqds_defconfig |  1 +
 configs/ls2088aqds_tfa_defconfig |  1 +
 configs/qemu_arm64_defconfig |  2 ++
 configs/qemu_arm_defconfig   |  2 ++
 configs/r8a77990_ebisu_defconfig |  1 +
 configs/r8a77995_draak_defconfig |  1 +
 configs/rcar3_salvator-x_defconfig   |  1 +
 configs/rcar3_ulcb_defconfig |  1 +
 configs/sfr_nb4-ser_ram_defconfig|  1 +
 configs/socrates_defconfig   |  1 +
 drivers/mtd/Kconfig  | 27 
 include/configs/10m50_devboard.h |  1 -
 include/configs/3c120_devboard.h |  2 --
 include/configs/M5208EVBE.h  |  1 -
 include/configs/M5235EVB.h   |  1 -
 include/configs/M5249EVB.h   |  1 -
 include/configs/M5253DEMO.h  |  1 -
 include/configs/M5272C3.h|  1 -
 include/configs/M5275EVB.h   |  1 -
 include/configs/M5282EVB.h   |  1 -
 include/configs/M53017EVB.h  |  1 -
 include/configs/M5329EVB.h   |  1 -
 include/configs/M5373EVB.h   |  1 -
 include/configs/MCR3000.h|  1 -
 include/configs/MPC837XERDB.h|  1 -
 include/configs/MPC8540ADS.h |  1 -
 include/configs/MPC8548CDS.h   

[PATCH v1 0/5] configs: Migrate CONFIG_SYS_MAX_FLASH_BANKS to Kconfig

[Patrick Delaunay]

Proposal after Marek comment in [1], move CONFIG_SYS_MAX_FLASH_BANKS
and CONFIG_SYS_MAX_FLASH_BANKS_DETECT in Kconfig.

Series based on the previous RFC [2], rebased on top of the next
branch and added reviewed-by.

I wasn't not sure of the solution when I introduced the
CFI_FLASH_BANKS to simplify the support of all the options in
include/mtd/cfi_flash.h

No compilation issue after rebase but not tested =
https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/10431

[1] [v3,1/2] mtd: cfi_flash: use cfi_flash_num_flash_banks only when supported
http: 
//patchwork.ozlabs.org/project/uboot/patch/20210916155040.v3.1.I81b4f1edfe925b001299e3b7ba0cf602d9268d59@changeid/#2754501

[2] [RFC] configs: Migrate CONFIG_SYS_MAX_FLASH_BANKS to Kconfig
http: //patchwork.ozlabs.org/project/uboot/list/?series=276760=*

Changes in v1:
- update drivers/mtd/spi/spi-nor-core.c for cfi_mtd_nb
  needed after RFC rebase
- solve issue in cfi_flash.h, with
  CFI_FLASH_BANKS=CONFIG_SYS_MAX_FLASH_BANKS_DETECT

Patrick Delaunay (5):
  cmd: Fix up warnings in flash.c
  mtd: cfi: introduce CFI_FLASH_BANKS
  mtd: cfi: change CONFIG_SYS_MAX_FLASH_BANKS_DETECT as boolean
  configs: Migrate CONFIG_SYS_MAX_FLASH_BANKS to Kconfig
  Convert CONFIG_AT91_EFLASH to Kconfig

 README   |   3 -
 arch/arm/mach-at91/Kconfig   |   8 +
 cmd/bootm.c  |   2 +-
 cmd/flash.c  | 247 +--
 common/flash.c   |   2 +-
 common/update.c  |   4 +-
 configs/3c120_defconfig  |   1 +
 configs/M5253DEMO_defconfig  |   1 +
 configs/MPC8548CDS_36BIT_defconfig   |   1 +
 configs/MPC8548CDS_defconfig |   1 +
 configs/MPC8548CDS_legacy_defconfig  |   1 +
 configs/P3041DS_NAND_defconfig   |   1 +
 configs/P3041DS_SDCARD_defconfig |   1 +
 configs/P3041DS_SPIFLASH_defconfig   |   1 +
 configs/P3041DS_defconfig|   1 +
 configs/P4080DS_SDCARD_defconfig |   1 +
 configs/P4080DS_SPIFLASH_defconfig   |   1 +
 configs/P4080DS_defconfig|   1 +
 configs/P5040DS_NAND_defconfig   |   1 +
 configs/P5040DS_SDCARD_defconfig |   1 +
 configs/P5040DS_SPIFLASH_defconfig   |   1 +
 configs/P5040DS_defconfig|   1 +
 configs/T1042D4RDB_NAND_defconfig|   1 +
 configs/T1042D4RDB_SDCARD_defconfig  |   1 +
 configs/T1042D4RDB_SPIFLASH_defconfig|   1 +
 configs/T1042D4RDB_defconfig |   1 +
 configs/T2080QDS_NAND_defconfig  |   1 +
 configs/T2080QDS_SDCARD_defconfig|   1 +
 configs/T2080QDS_SECURE_BOOT_defconfig   |   1 +
 configs/T2080QDS_SPIFLASH_defconfig  |   1 +
 configs/T2080QDS_defconfig   |   1 +
 configs/T4240RDB_SDCARD_defconfig|   1 +
 configs/T4240RDB_defconfig   |   1 +
 configs/boston32r2_defconfig |   1 +
 configs/boston32r2el_defconfig   |   1 +
 configs/boston32r6_defconfig |   1 +
 configs/boston32r6el_defconfig   |   1 +
 configs/boston64r2_defconfig |   1 +
 configs/boston64r2el_defconfig   |   1 +
 configs/boston64r6_defconfig |   1 +
 configs/boston64r6el_defconfig   |   1 +
 configs/cobra5272_defconfig  |   1 +
 configs/comtrend_ct5361_ram_defconfig|   1 +
 configs/comtrend_wap5813n_ram_defconfig  |   1 +
 configs/ethernut5_defconfig  |   1 +
 configs/huawei_hg556a_ram_defconfig  |   1 +
 configs/j7200_evm_a72_defconfig  |   1 +
 configs/j7200_evm_r5_defconfig   |   1 +
 configs/j721e_evm_a72_defconfig  |   1 +
 configs/j721e_hs_evm_a72_defconfig   |   1 +
 configs/ls1021aqds_ddr4_nor_defconfig|   1 +
 configs/ls1021aqds_ddr4_nor_lpuart_defconfig |   1 +
 configs/ls1021aqds_nand_defconfig|   1 +
 configs/ls1021aqds_nor_SECURE_BOOT_defconfig |   1 +
 configs/ls1021aqds_nor_defconfig |   1 +
 configs/ls1021aqds_nor_lpuart_defconfig  |   1 +
 configs/ls1021aqds_sdcard_ifc_defconfig  |   1 +
 configs/ls1046aqds_SECURE_BOOT_defconfig |   1 +
 configs/ls1046aqds_defconfig |   1 +
 configs/ls1046aqds_lpuart_defconfig  |   1 +
 configs/ls1046aqds_nand_defconfig|   1 +
 configs/ls1046aqds_sdcard_ifc_defconfig  |   1 +
 configs/ls1046aqds_tfa_SECURE_BOOT_defconfig |   1 +
 configs/ls1046aqds_tfa_defconfig |   1 +
 configs/ls1088aqds_defconfig |   1 +
 configs/ls1088aqds_sdcard_ifc_defconfig  |   1 +
 configs/ls1088aqds_tfa_defconfig |   1 +
 configs/ls2080aqds_SECURE_BOOT_defconfig |   1 +
 configs/ls2080aqds_defconfig 

[PATCH v2] arm: dts: Aspeed: add Bletchley dts

[Potin Lai]

Initial introduction of Bletchley equipped with
Aspeed 2600 BMC SoC.

Signed-off-by: Potin Lai 

---

Change since v1:
- Disable mdio0, mdio1, mdio2
- Remove mac0, mac1, mac3 (keep disabled)
- Enable mac2, and set to fixed-link
---
 arch/arm/dts/Makefile  |   3 +-
 arch/arm/dts/ast2600-bletchley.dts | 285 +
 2 files changed, 287 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/ast2600-bletchley.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index df844065cd..a172a9f8c6 100755
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -685,7 +685,8 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
ast2600-rainier.dtb \
ast2600-slt.dtb \
ast2600-tacoma.dtb \
-   ast2600-intel.dtb
+   ast2600-intel.dtb \
+   ast2600-bletchley.dtb
 
 dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
 
diff --git a/arch/arm/dts/ast2600-bletchley.dts 
b/arch/arm/dts/ast2600-bletchley.dts
new file mode 100644
index 00..ec14898400
--- /dev/null
+++ b/arch/arm/dts/ast2600-bletchley.dts
@@ -0,0 +1,285 @@
+/dts-v1/;
+
+#include "ast2600-u-boot.dtsi"
+
+/ {
+model = "AST2600 EVB";
+compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x4000>;
+   };
+
+   chosen {
+   stdout-path = 
+   };
+
+   aliases {
+   mmc0 = _slot0;
+   mmc1 = _slot0;
+   mmc2 = _slot1;
+   spi0 = 
+   spi1 = 
+   spi2 = 
+   ethernet0 = 
+   ethernet1 = 
+   ethernet2 = 
+   ethernet3 = 
+   };
+
+   cpus {
+   cpu@0 {
+   clock-frequency = <8>;
+   };
+   cpu@1 {
+   clock-frequency = <8>;
+   };
+   };
+};
+
+ {
+   u-boot,dm-pre-reloc;
+   status = "okay";
+};
+
+ {
+   clock-frequency = <4>;
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+   pinctrl-names = "default";
+   pinctrl-0 = <_mdio4_default>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+};
+
+ {
+   status = "okay";
+   phy-mode = "rgmii";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii3_default _mac3link_default>;
+   fixed-link {
+   speed = <1000>;
+   full-duplex;
+   };
+};
+
+ {
+   status = "okay";
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_fmcquad_default>;
+
+   flash@0 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <2>;
+   spi-rx-bus-width = <2>;
+   };
+
+   flash@1 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <2>;
+   spi-rx-bus-width = <2>;
+   };
+
+   flash@2 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <2>;
+   spi-rx-bus-width = <2>;
+   };
+};
+
+ {
+   status = "okay";
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_spi1_default _spi1abr_default
+   _spi1cs1_default _spi1wp_default
+   _spi1wp_default _spi1quad_default>;
+
+   flash@0 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <4>;
+   spi-rx-bus-width = <4>;
+   };
+
+   flash@1 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <4>;
+   spi-rx-bus-width = <4>;
+   };
+};
+
+ {
+   status = "okay";
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_spi2_default _spi2cs1_default
+   _spi2cs2_default _spi2quad_default>;
+
+   flash@0 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <4>;
+   spi-rx-bus-width = <4>;
+   };
+
+   flash@1 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <4>;
+   spi-rx-bus-width = <4>;
+   };
+
+   flash@2 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   

Re: [PATCH] LynxOS is no longer supported

[Thomas Huth]

On 13/11/2021 18.13, Thomas Huth wrote:

LynxOS needed the do_bootm_lynxkdi() function that got removed in
7e713067ee ("Remove LYNX KDI remainders") - and that function needed
a lynxkdi_boot() function, where the last implementation had been
removed in 98f705c9ce ("powerpc: remove 4xx support") already. Looks
like this OS is definitely not supported anymore, so remove it from
the corresponding lists.

Signed-off-by: Thomas Huth 
---
  README   | 3 +--
  boot/image.c | 3 ---
  2 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/README b/README
index 9606a8b3ac..064e781d45 100644
--- a/README
+++ b/README
@@ -3359,8 +3359,7 @@ details; basically, the header defines the following 
image properties:
  * Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
-  Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS,
-  INTEGRITY).
+  Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, INTEGRITY).
  * Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
Currently supported: ARM, Intel x86, MIPS, NDS32, Nios II, PowerPC).
diff --git a/boot/image.c b/boot/image.c
index 992e72991d..6ab827b2d4 100644
--- a/boot/image.c
+++ b/boot/image.c
@@ -106,9 +106,6 @@ static const table_entry_t uimage_os[] = {
{   IH_OS_INVALID,  "invalid","Invalid OS", },
{   IH_OS_ARM_TRUSTED_FIRMWARE, "arm-trusted-firmware", "ARM Trusted 
Firmware"  },
{   IH_OS_LINUX,"linux",  "Linux",  },
-#if defined(USE_HOSTCC)
-   {   IH_OS_LYNXOS,   "lynxos", "LynxOS", },
-#endif
{   IH_OS_NETBSD,   "netbsd", "NetBSD", },
{   IH_OS_OSE,  "ose","Enea OSE",   },
{   IH_OS_PLAN9,"plan9",  "Plan 9", },


Friendly ping!

Could someone pick this patch up? Thanks!

Happy new year,
  Thomas

Re: [PATCH v2 2/7] common: remove bedbug debugger support

[Thomas Huth]

On 01/01/2022 18.13, Ovidiu Panait wrote:

Commit 98f705c9cefd ("powerpc: remove 4xx support") removed (in 2017) the
last code that made use of bedbug debugger support. Since there aren't
any boards left that define either CONFIG_CMD_BEDBUG or a real
bedbug_init(), drop this feature from u-boot.

Signed-off-by: Ovidiu Panait 
---

Changes in v2:
- new patch

  arch/powerpc/cpu/mpc83xx/traps.c |7 -
  arch/powerpc/cpu/mpc85xx/traps.c |7 -
  cmd/Kconfig  |7 -
  cmd/Makefile |1 -
  cmd/bedbug.c |  410 --
  common/Makefile  |1 -
  common/bedbug.c  | 1254 --
  common/board_r.c |9 +-
  doc/README.bedbug|   56 --
  include/bedbug/bedbug.h  |   40 -
  include/bedbug/ppc.h |  408 --
  include/bedbug/regs.h|  400 --
  include/bedbug/tables.h  |  601 --
  include/bedbug/type.h|   29 -
  post/lib_powerpc/string.c|1 -
  15 files changed, 1 insertion(+), 3230 deletions(-)
  delete mode 100644 cmd/bedbug.c
  delete mode 100644 common/bedbug.c
  delete mode 100644 doc/README.bedbug
  delete mode 100644 include/bedbug/bedbug.h
  delete mode 100644 include/bedbug/ppc.h
  delete mode 100644 include/bedbug/regs.h
  delete mode 100644 include/bedbug/tables.h
  delete mode 100644 include/bedbug/type.h


Reviewed-by: Thomas Huth 

[PATCH v1 3/5] mtd: cfi: change CONFIG_SYS_MAX_FLASH_BANKS_DETECT as boolean

[Patrick Delaunay]

Prepare migration to Kconfig.

CONFIG_SYS_MAX_FLASH_BANKS_DETECT becomes boolean and
CONFIG_SYS_MAX_FLASH_BANKS define the MAX size, also used
for detection when CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
(CFI_MAX_FLASH_BANKS = CONFIG_SYS_MAX_FLASH_BANKS).

CONFIG_SYS_MAX_FLASH_BANKS become mandatory when
CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated.

Signed-off-by: Patrick Delaunay 
---

Changes in v1:
- solve issue in cfi_flash.h, with
  CFI_FLASH_BANKS=CONFIG_SYS_MAX_FLASH_BANKS_DETECT

 drivers/mtd/cfi_flash.c  |  2 +-
 include/configs/3c120_devboard.h |  3 ++-
 include/configs/adp-ae3xx.h  |  4 +---
 include/configs/adp-ag101p.h |  2 --
 include/configs/ax25-ae350.h |  4 +---
 include/configs/bmips_bcm6338.h  |  3 ++-
 include/configs/bmips_bcm6348.h  |  3 ++-
 include/configs/bmips_bcm6358.h  |  3 ++-
 include/configs/bmips_bcm6368.h  |  3 ++-
 include/configs/boston.h |  4 +++-
 include/configs/draak.h  |  3 ++-
 include/configs/ebisu.h  |  3 ++-
 include/configs/j721e_evm.h  |  3 ++-
 include/configs/mccmon6.h|  3 ++-
 include/configs/qemu-arm.h   |  3 ++-
 include/configs/salvator-x.h |  3 ++-
 include/configs/ulcb.h   |  3 ++-
 include/mtd/cfi_flash.h  | 10 +-
 18 files changed, 35 insertions(+), 27 deletions(-)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 71cefc125f..aae3ea0d1b 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -96,7 +96,7 @@ static u16 cfi_flash_config_reg(int i)
 }
 
 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
-int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
+int cfi_flash_num_flash_banks = CFI_MAX_FLASH_BANKS;
 #else
 int cfi_flash_num_flash_banks;
 #endif
diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h
index f7ad7efb0d..e52fedcf39 100644
--- a/include/configs/3c120_devboard.h
+++ b/include/configs/3c120_devboard.h
@@ -20,7 +20,8 @@
  * CFI Flash
  */
 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix amd flash issue */
-#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT  1
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT
 #define CONFIG_SYS_MAX_FLASH_SECT  512
 
 /*
diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h
index 58e8526048..11eff3852d 100644
--- a/include/configs/adp-ae3xx.h
+++ b/include/configs/adp-ae3xx.h
@@ -156,7 +156,7 @@
 
 /* support JEDEC */
 #ifdef CONFIG_CFI_FLASH
-#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT  1
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT
 #endif
 
 /* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */
@@ -173,9 +173,7 @@
  * There are 4 banks supported for this Controller,
  * but we have only 1 bank connected to flash on board
  */
-#ifndef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
 #define CONFIG_SYS_MAX_FLASH_BANKS 1
-#endif
 #define CONFIG_SYS_FLASH_BANKS_SIZES {0x400}
 
 /* max number of sectors on one chip */
diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h
index 1022764985..31ef30adc6 100644
--- a/include/configs/adp-ag101p.h
+++ b/include/configs/adp-ag101p.h
@@ -286,9 +286,7 @@
  * There are 4 banks supported for this Controller,
  * but we have only 1 bank connected to flash on board
  */
-#ifndef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
 #define CONFIG_SYS_MAX_FLASH_BANKS 1
-#endif
 #define CONFIG_SYS_FLASH_BANKS_SIZES {0x400}
 
 /* max number of sectors on one chip */
diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h
index 1c3f957d32..2ad0d1589c 100644
--- a/include/configs/ax25-ae350.h
+++ b/include/configs/ax25-ae350.h
@@ -80,7 +80,7 @@
 
 /* support JEDEC */
 #ifdef CONFIG_CFI_FLASH
-#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT  1
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT
 #endif/* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */
 #define PHYS_FLASH_1   0x8800  /* BANK 0 */
 #define CONFIG_SYS_FLASH_BASE  PHYS_FLASH_1
@@ -95,9 +95,7 @@
  * There are 4 banks supported for this Controller,
  * but we have only 1 bank connected to flash on board
 */
-#ifndef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
 #define CONFIG_SYS_MAX_FLASH_BANKS 1
-#endif
 #define CONFIG_SYS_FLASH_BANKS_SIZES {0x400}
 
 /* max number of sectors on one chip */
diff --git a/include/configs/bmips_bcm6338.h b/include/configs/bmips_bcm6338.h
index 6eaca1c31b..b7de3f4058 100644
--- a/include/configs/bmips_bcm6338.h
+++ b/include/configs/bmips_bcm6338.h
@@ -22,6 +22,7 @@
 
 #define CONFIG_SYS_FLASH_BASE  0xbfc0
 #define CONFIG_SYS_FLASH_EMPTY_INFO
-#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT  1
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT
 
 #endif /* __CONFIG_BMIPS_BCM6338_H */
diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h
index 5bfbcb779b..5ed0eebce4 100644
--- a/include/configs/bmips_bcm6348.h
+++ 

[PATCH v1 2/5] mtd: cfi: introduce CFI_FLASH_BANKS

[Patrick Delaunay]

Replace CONFIG_SYS_MAX_FLASH_BANKS by CFI_FLASH_BANKS to prepare
Kconfig migration and avoid to redefine CONFIG_SYS_MAX_FLASH_BANKS
in cfi_flash.h.

After this patch CONFIG_SYS_MAX_FLASH_BANKS should be never used in
the cfi code: use CFI_MAX_FLASH_BANKS for struct size or CFI_FLASH_BANKS
for number of CFI banks which can be dynamic.

This patch modify all the files which include mtd/cfi_flash.h.

Signed-off-by: Patrick Delaunay 
---

Changes in v1:
- update drivers/mtd/spi/spi-nor-core.c for cfi_mtd_nb
  needed after RFC rebase

 cmd/bootm.c|  2 +-
 cmd/flash.c| 34 +-
 common/flash.c |  2 +-
 common/update.c|  4 ++--
 drivers/mtd/cfi_flash.c|  4 ++--
 drivers/mtd/cfi_mtd.c  |  4 ++--
 drivers/mtd/spi/spi-nor-core.c |  5 ++---
 include/mtd/cfi_flash.h|  9 ++---
 8 files changed, 33 insertions(+), 31 deletions(-)

diff --git a/cmd/bootm.c b/cmd/bootm.c
index b82a872a86..e8b7066888 100644
--- a/cmd/bootm.c
+++ b/cmd/bootm.c
@@ -338,7 +338,7 @@ static int do_imls_nor(void)
void *hdr;
 
for (i = 0, info = _info[0];
-   i < CONFIG_SYS_MAX_FLASH_BANKS; ++i, ++info) {
+   i < CFI_FLASH_BANKS; ++i, ++info) {
 
if (info->flash_id == FLASH_UNKNOWN)
goto next_bank;
diff --git a/cmd/flash.c b/cmd/flash.c
index 594e2caa59..db4bb2529c 100644
--- a/cmd/flash.c
+++ b/cmd/flash.c
@@ -60,7 +60,7 @@ abbrev_spec(char *str, flash_info_t **pinfo, int *psf, int 
*psl)
 
bank = dectoul(str, );
if (ep == str || *ep != '\0' ||
-   bank < 1 || bank > CONFIG_SYS_MAX_FLASH_BANKS)
+   bank < 1 || bank > CFI_FLASH_BANKS)
return -1;
 
fp = _info[bank - 1];
@@ -104,7 +104,7 @@ int flash_sect_roundb(ulong *addr)
 
/* find the end addr of the sector where the *addr is */
found = 0;
-   for (bank = 0; bank < CONFIG_SYS_MAX_FLASH_BANKS && !found; ++bank) {
+   for (bank = 0; bank < CFI_FLASH_BANKS && !found; ++bank) {
info = _info[bank];
for (i = 0; i < info->sector_count && !found; ++i) {
/* get the end address of the sector */
@@ -201,13 +201,13 @@ flash_fill_sect_ranges(ulong addr_first, ulong addr_last,
 
*s_count = 0;
 
-   for (bank = 0; bank < CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
+   for (bank = 0; bank < CFI_FLASH_BANKS; ++bank) {
s_first[bank] = -1; /* first sector to erase*/
s_last[bank] = -1;  /* last  sector to erase*/
}
 
for (bank = 0, info = _info[0];
-(bank < CONFIG_SYS_MAX_FLASH_BANKS) && (addr_first <= addr_last);
+(bank < CFI_FLASH_BANKS) && (addr_first <= addr_last);
 ++bank, ++info) {
ulong b_end;
int sect;
@@ -278,7 +278,7 @@ static int do_flinfo(struct cmd_tbl *cmdtp, int flag, int 
argc,
 
 #ifdef CONFIG_MTD_NOR_FLASH
if (argc == 1) {/* print info for all FLASH banks */
-   for (bank = 0; bank < CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
+   for (bank = 0; bank < CFI_FLASH_BANKS; ++bank) {
printf("\nBank # %ld: ", bank + 1);
 
flash_print_info(_info[bank]);
@@ -287,9 +287,9 @@ static int do_flinfo(struct cmd_tbl *cmdtp, int flag, int 
argc,
}
 
bank = hextoul(argv[1], NULL);
-   if (bank < 1 || bank > CONFIG_SYS_MAX_FLASH_BANKS) {
+   if (bank < 1 || bank > CFI_FLASH_BANKS) {
printf("Only FLASH Banks # 1 ... # %d supported\n",
-  CONFIG_SYS_MAX_FLASH_BANKS);
+  CFI_FLASH_BANKS);
return 1;
}
printf("\nBank # %ld: ", bank);
@@ -316,7 +316,7 @@ static int do_flerase(struct cmd_tbl *cmdtp, int flag, int 
argc,
return CMD_RET_USAGE;
 
if (strcmp(argv[1], "all") == 0) {
-   for (bank = 1; bank <= CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
+   for (bank = 1; bank <= CFI_FLASH_BANKS; ++bank) {
printf("Erase Flash Bank # %ld ", bank);
info = _info[bank - 1];
rcode = flash_erase(info, 0, info->sector_count - 1);
@@ -366,9 +366,9 @@ static int do_flerase(struct cmd_tbl *cmdtp, int flag, int 
argc,
 
if (strcmp(argv[1], "bank") == 0) {
bank = hextoul(argv[2], NULL);
-   if (bank < 1 || bank > CONFIG_SYS_MAX_FLASH_BANKS) {
+   if (bank < 1 || bank > CFI_FLASH_BANKS) {
printf("Only FLASH Banks # 1 ... # %d supported\n",
-  CONFIG_SYS_MAX_FLASH_BANKS);
+  CFI_FLASH_BANKS);
return 1;
}
printf("Erase Flash Bank # %ld ", bank);
@@ -397,7 +397,7 @@ int 

[PATCH v1 5/5] Convert CONFIG_AT91_EFLASH to Kconfig

[Patrick Delaunay]

This converts the following to Kconfig:
   CONFIG_AT91_EFLASH

Signed-off-by: Patrick Delaunay 
Reviewed-by: Simon Glass 
---

 arch/arm/mach-at91/Kconfig   | 8 
 configs/ethernut5_defconfig  | 2 +-
 include/configs/ethernut5.h  | 1 -
 scripts/config_whitelist.txt | 1 -
 4 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 4448ca1592..00f31045d6 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -302,6 +302,14 @@ config ATMEL_SFR
 config SYS_SOC
default "at91"
 
+config AT91_EFLASH
+   bool "Support AT91 flash driver"
+   depends on AT91SAM9XE
+   select USE_SYS_MAX_FLASH_BANKS
+   help
+ Enable the driver for the embedded flash used in the Atmel
+ AT91SAM9XE devices.
+
 source "board/atmel/at91sam9260ek/Kconfig"
 source "board/atmel/at91sam9261ek/Kconfig"
 source "board/atmel/at91sam9263ek/Kconfig"
diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index 5d98318aab..7a701db0e1 100644
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -4,6 +4,7 @@ CONFIG_ARCH_CPU_INIT=y
 CONFIG_ARCH_AT91=y
 CONFIG_SYS_TEXT_BASE=0x2700
 CONFIG_SYS_MALLOC_LEN=0x121000
+CONFIG_AT91_EFLASH=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_ETHERNUT5=y
 CONFIG_NR_DRAM_BANKS=1
@@ -66,7 +67,6 @@ CONFIG_SYS_I2C_SOFT_SLAVE=0
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
-CONFIG_USE_SYS_MAX_FLASH_BANKS=y
 CONFIG_MTD_RAW_NAND=y
 # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
 CONFIG_NAND_ATMEL=y
diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index d72f704636..d88c14ac44 100644
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -33,7 +33,6 @@
 
 /* 512kB on-chip NOR flash */
 # define CONFIG_SYS_FLASH_BASE 0x0020 /* AT91SAM9XE_FLASH_BASE */
-# define CONFIG_AT91_EFLASH
 # define CONFIG_SYS_MAX_FLASH_SECT 32
 # define CONFIG_EFLASH_PROTSECTORS 1
 
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 7726243f22..3a923abf7e 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -18,7 +18,6 @@ CONFIG_AT91SAM9G20EK
 CONFIG_AT91SAM9G20EK_2MMC
 CONFIG_AT91SAM9G45_LCD_BASE
 CONFIG_AT91SAM9M10G45EK
-CONFIG_AT91_EFLASH
 CONFIG_AT91_GPIO_PULLUP
 CONFIG_AT91_LED
 CONFIG_AT91_WANTS_COMMON_PHY
-- 
2.25.1

[PATCH v1 1/5] cmd: Fix up warnings in flash.c

[Patrick Delaunay]

Tidy up the warnings reported by checkpatch.pl to prepare next patches

Signed-off-by: Patrick Delaunay 
Reviewed-by: Simon Glass 
---

 cmd/flash.c | 239 +---
 1 file changed, 117 insertions(+), 122 deletions(-)

diff --git a/cmd/flash.c b/cmd/flash.c
index 819febc10e..594e2caa59 100644
--- a/cmd/flash.c
+++ b/cmd/flash.c
@@ -19,7 +19,7 @@
 int mtdparts_init(void);
 int mtd_id_parse(const char *id, const char **ret_id, u8 *dev_type, u8 
*dev_num);
 int find_dev_and_part(const char *id, struct mtd_device **dev,
-   u8 *part_num, struct part_info **part);
+ u8 *part_num, struct part_info **part);
 #endif
 
 #ifdef CONFIG_MTD_NOR_FLASH
@@ -47,34 +47,39 @@ extern flash_info_t flash_info[];   /* info for FLASH chips 
*/
  *   or an invalid flash bank.
  */
 static int
-abbrev_spec (char *str, flash_info_t ** pinfo, int *psf, int *psl)
+abbrev_spec(char *str, flash_info_t **pinfo, int *psf, int *psl)
 {
flash_info_t *fp;
int bank, first, last;
char *p, *ep;
 
-   if ((p = strchr (str, ':')) == NULL)
+   p = strchr(str, ':');
+   if (!p)
return 0;
*p++ = '\0';
 
bank = dectoul(str, );
if (ep == str || *ep != '\0' ||
-   bank < 1 || bank > CONFIG_SYS_MAX_FLASH_BANKS ||
-   (fp = _info[bank - 1])->flash_id == FLASH_UNKNOWN)
+   bank < 1 || bank > CONFIG_SYS_MAX_FLASH_BANKS)
+   return -1;
+
+   fp = _info[bank - 1];
+   if (fp->flash_id == FLASH_UNKNOWN)
return -1;
 
str = p;
-   if ((p = strchr (str, '-')) != NULL)
+   p = strchr(str, '-');
+   if (p)
*p++ = '\0';
 
first = dectoul(str, );
if (ep == str || *ep != '\0' || first >= fp->sector_count)
return -1;
 
-   if (p != NULL) {
+   if (p) {
last = dectoul(p, );
if (ep == p || *ep != '\0' ||
-   last < first || last >= fp->sector_count)
+   last < first || last >= fp->sector_count)
return -1;
} else {
last = first;
@@ -107,11 +112,10 @@ int flash_sect_roundb(ulong *addr)
sector_end_addr = info->start[0] +
info->size - 1;
} else {
-   sector_end_addr = info->start[i+1] - 1;
+   sector_end_addr = info->start[i + 1] - 1;
}
 
-   if (*addr <= sector_end_addr &&
-   *addr >= info->start[i]) {
+   if (*addr <= sector_end_addr && *addr >= 
info->start[i]) {
found = 1;
/* adjust *addr if necessary */
if (*addr < sector_end_addr)
@@ -144,7 +148,7 @@ int flash_sect_roundb(ulong *addr)
  * Return:
  *1: success
  *   -1: failure (bad format, bad address).
-*/
+ */
 static int
 addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong *addr_last)
 {
@@ -156,7 +160,7 @@ addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong 
*addr_last)
return -1;
 
len_used = 0;
-   if (arg2 && *arg2 == '+'){
+   if (arg2 && *arg2 == '+') {
len_used = 1;
++arg2;
}
@@ -165,7 +169,7 @@ addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong 
*addr_last)
if (ep == arg2 || *ep != '\0')
return -1;
 
-   if (len_used){
+   if (len_used) {
/*
 * *addr_last has the length, compute correct *addr_last
 * XXX watch out for the integer overflow! Right now it is
@@ -187,9 +191,9 @@ addr_spec(char *arg1, char *arg2, ulong *addr_first, ulong 
*addr_last)
 }
 
 static int
-flash_fill_sect_ranges (ulong addr_first, ulong addr_last,
-   int *s_first, int *s_last,
-   int *s_count )
+flash_fill_sect_ranges(ulong addr_first, ulong addr_last,
+  int *s_first, int *s_last,
+  int *s_count)
 {
flash_info_t *info;
ulong bank;
@@ -197,27 +201,25 @@ flash_fill_sect_ranges (ulong addr_first, ulong addr_last,
 
*s_count = 0;
 
-   for (bank=0; bank < CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
+   for (bank = 0; bank < CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
s_first[bank] = -1; /* first sector to erase*/
-   s_last [bank] = -1; /* last  sector to erase*/
+   s_last[bank] = -1;  /* last  sector to erase*/
}
 
-   for (bank=0,info = _info[0];
+   for (bank = 0, info = _info[0];
 (bank < CONFIG_SYS_MAX_FLASH_BANKS) && (addr_first <= addr_last);
  

Re: [RFC PATCH v3 1/5] imx8m: drop env_get_location for imx8mn and imx8mp

[Teresa Remmet]

Hello Michael,

Am Dienstag, dem 04.01.2022 um 12:06 +0100 schrieb Michael Nazzareno
Trimarchi:
> Hi Teresa
> 
> On Tue, Jan 4, 2022 at 12:04 PM Teresa Remmet 
> wrote:
> > Hello Tommaso,
> > 
> > Am Samstag, dem 25.12.2021 um 21:25 +0100 schrieb Tommaso Merciai:
> > > This function defined for two architecture is not really generic
> > > and can generate problem when people add a new board.
> > > 
> > > Signed-off-by: Tommaso Merciai 
> > > ---
> > >  arch/arm/mach-imx/imx8m/soc.c | 39 ---
> > > 
> > > 
> > >  1 file changed, 39 deletions(-)
> > > 
> > > diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-
> > > imx/imx8m/soc.c
> > > index 863508776d..f0030a557a 100644
> > > --- a/arch/arm/mach-imx/imx8m/soc.c
> > > +++ b/arch/arm/mach-imx/imx8m/soc.c
> > > @@ -1313,45 +1313,6 @@ void do_error(struct pt_regs *pt_regs,
> > > unsigned int esr)
> > >  #endif
> > > 
> > >  #if defined(CONFIG_IMX8MN) || defined(CONFIG_IMX8MP)
> > > -enum env_location env_get_location(enum env_operation op, int
> > > prio)
> > > -{
> > > - enum boot_device dev = get_boot_device();
> > > - enum env_location env_loc = ENVL_UNKNOWN;
> > > -
> > > - if (prio)
> > > - return env_loc;
> > > -
> > > - switch (dev) {
> > > -#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
> > > - case QSPI_BOOT:
> > > - env_loc = ENVL_SPI_FLASH;
> > > - break;
> > > -#endif
> > > -#ifdef CONFIG_ENV_IS_IN_NAND
> > > - case NAND_BOOT:
> > > - env_loc = ENVL_NAND;
> > > - break;
> > > -#endif
> > > -#ifdef CONFIG_ENV_IS_IN_MMC
> > > - case SD1_BOOT:
> > > - case SD2_BOOT:
> > > - case SD3_BOOT:
> > > - case MMC1_BOOT:
> > > - case MMC2_BOOT:
> > > - case MMC3_BOOT:
> > > - env_loc =  ENVL_MMC;
> > > - break;
> > > -#endif
> > > - default:
> > > -#if defined(CONFIG_ENV_IS_NOWHERE)
> > > - env_loc = ENVL_NOWHERE;
> > > -#endif
> > > - break;
> > > - }
> > > -
> > > - return env_loc;
> > > -}
> > > -
> > >  #ifndef ENV_IS_EMBEDDED
> > >  long long env_get_offset(long long defautl_offset)
> > 
> > would it not make sense to move also env_get_offset() to board
> > level?
> > 
> 
> Drop it in another patch. This is not reference in uboot

Ah thanks!

Teresa

> 
> Michael
> 
> > Regards,
> > Teresa
> > 
> > 
> > >  {
> > --
> > PHYTEC Messtechnik GmbH | Robert-Koch-Str. 39 | 55129 Mainz,
> > Germany
> > 
> > Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber
> > |
> > Handelsregister Mainz HRB 4656 | Finanzamt Mainz | St.Nr.
> > 266500608, DE
> > 149059855
> 
> 
-- 
PHYTEC Messtechnik GmbH | Robert-Koch-Str. 39 | 55129 Mainz, Germany

Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber |
Handelsregister Mainz HRB 4656 | Finanzamt Mainz | St.Nr. 266500608, DE
149059855

Re: [RFC PATCH v3 1/5] imx8m: drop env_get_location for imx8mn and imx8mp

[Michael Nazzareno Trimarchi]

Hi Teresa

On Tue, Jan 4, 2022 at 12:04 PM Teresa Remmet  wrote:
>
> Hello Tommaso,
>
> Am Samstag, dem 25.12.2021 um 21:25 +0100 schrieb Tommaso Merciai:
> > This function defined for two architecture is not really generic
> > and can generate problem when people add a new board.
> >
> > Signed-off-by: Tommaso Merciai 
> > ---
> >  arch/arm/mach-imx/imx8m/soc.c | 39 ---
> > 
> >  1 file changed, 39 deletions(-)
> >
> > diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-
> > imx/imx8m/soc.c
> > index 863508776d..f0030a557a 100644
> > --- a/arch/arm/mach-imx/imx8m/soc.c
> > +++ b/arch/arm/mach-imx/imx8m/soc.c
> > @@ -1313,45 +1313,6 @@ void do_error(struct pt_regs *pt_regs,
> > unsigned int esr)
> >  #endif
> >
> >  #if defined(CONFIG_IMX8MN) || defined(CONFIG_IMX8MP)
> > -enum env_location env_get_location(enum env_operation op, int prio)
> > -{
> > - enum boot_device dev = get_boot_device();
> > - enum env_location env_loc = ENVL_UNKNOWN;
> > -
> > - if (prio)
> > - return env_loc;
> > -
> > - switch (dev) {
> > -#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
> > - case QSPI_BOOT:
> > - env_loc = ENVL_SPI_FLASH;
> > - break;
> > -#endif
> > -#ifdef CONFIG_ENV_IS_IN_NAND
> > - case NAND_BOOT:
> > - env_loc = ENVL_NAND;
> > - break;
> > -#endif
> > -#ifdef CONFIG_ENV_IS_IN_MMC
> > - case SD1_BOOT:
> > - case SD2_BOOT:
> > - case SD3_BOOT:
> > - case MMC1_BOOT:
> > - case MMC2_BOOT:
> > - case MMC3_BOOT:
> > - env_loc =  ENVL_MMC;
> > - break;
> > -#endif
> > - default:
> > -#if defined(CONFIG_ENV_IS_NOWHERE)
> > - env_loc = ENVL_NOWHERE;
> > -#endif
> > - break;
> > - }
> > -
> > - return env_loc;
> > -}
> > -
> >  #ifndef ENV_IS_EMBEDDED
> >  long long env_get_offset(long long defautl_offset)
>
> would it not make sense to move also env_get_offset() to board level?
>

Drop it in another patch. This is not reference in uboot

Michael

> Regards,
> Teresa
>
>
> >  {
> --
> PHYTEC Messtechnik GmbH | Robert-Koch-Str. 39 | 55129 Mainz, Germany
>
> Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber |
> Handelsregister Mainz HRB 4656 | Finanzamt Mainz | St.Nr. 266500608, DE
> 149059855



-- 
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
__

Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
i...@amarulasolutions.com
www.amarulasolutions.com

Re: [RFC PATCH v3 1/5] imx8m: drop env_get_location for imx8mn and imx8mp

[Teresa Remmet]

Hello Tommaso,

Am Samstag, dem 25.12.2021 um 21:25 +0100 schrieb Tommaso Merciai:
> This function defined for two architecture is not really generic
> and can generate problem when people add a new board.
> 
> Signed-off-by: Tommaso Merciai 
> ---
>  arch/arm/mach-imx/imx8m/soc.c | 39 ---
> 
>  1 file changed, 39 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-
> imx/imx8m/soc.c
> index 863508776d..f0030a557a 100644
> --- a/arch/arm/mach-imx/imx8m/soc.c
> +++ b/arch/arm/mach-imx/imx8m/soc.c
> @@ -1313,45 +1313,6 @@ void do_error(struct pt_regs *pt_regs,
> unsigned int esr)
>  #endif
>  
>  #if defined(CONFIG_IMX8MN) || defined(CONFIG_IMX8MP)
> -enum env_location env_get_location(enum env_operation op, int prio)
> -{
> - enum boot_device dev = get_boot_device();
> - enum env_location env_loc = ENVL_UNKNOWN;
> -
> - if (prio)
> - return env_loc;
> -
> - switch (dev) {
> -#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
> - case QSPI_BOOT:
> - env_loc = ENVL_SPI_FLASH;
> - break;
> -#endif
> -#ifdef CONFIG_ENV_IS_IN_NAND
> - case NAND_BOOT:
> - env_loc = ENVL_NAND;
> - break;
> -#endif
> -#ifdef CONFIG_ENV_IS_IN_MMC
> - case SD1_BOOT:
> - case SD2_BOOT:
> - case SD3_BOOT:
> - case MMC1_BOOT:
> - case MMC2_BOOT:
> - case MMC3_BOOT:
> - env_loc =  ENVL_MMC;
> - break;
> -#endif
> - default:
> -#if defined(CONFIG_ENV_IS_NOWHERE)
> - env_loc = ENVL_NOWHERE;
> -#endif
> - break;
> - }
> -
> - return env_loc;
> -}
> -
>  #ifndef ENV_IS_EMBEDDED
>  long long env_get_offset(long long defautl_offset)

would it not make sense to move also env_get_offset() to board level?

Regards,
Teresa


>  {
-- 
PHYTEC Messtechnik GmbH | Robert-Koch-Str. 39 | 55129 Mainz, Germany

Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber |
Handelsregister Mainz HRB 4656 | Finanzamt Mainz | St.Nr. 266500608, DE
149059855

Re: [RFC PATCH v3 5/5] phytec: phycore_imx8mp: override env_get_location in phycore-imx8mp.c

[Teresa Remmet]

Hello Tommaso,

thank you for working on this.

Am Samstag, dem 25.12.2021 um 21:25 +0100 schrieb Tommaso Merciai:
> Override env_get_location function at board level, previously dropped
> down from arch/arm/mach-imx/imx8m/soc.c
> 
> References:
>  - commit 37d3e3bb95d7532e2503f115dd6c6762fd3b0262
> 
> Signed-off-by: Tommaso Merciai 
> ---
>  board/phytec/phycore_imx8mp/phycore-imx8mp.c | 33
> 
>  1 file changed, 33 insertions(+)
> 
> diff --git a/board/phytec/phycore_imx8mp/phycore-imx8mp.c
> b/board/phytec/phycore_imx8mp/phycore-imx8mp.c
> index a8f0821437..05926eefa3 100644
> --- a/board/phytec/phycore_imx8mp/phycore-imx8mp.c
> +++ b/board/phytec/phycore_imx8mp/phycore-imx8mp.c
> @@ -11,9 +11,42 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> +enum env_location env_get_location(enum env_operation op, int prio)
> +{
> + enum boot_device dev = get_boot_device();
> + enum env_location env_loc = ENVL_UNKNOWN;
> +
> + if (prio)
> + return env_loc;
> +
> + if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH) && dev == QSPI_BOOT)
> {
> + env_loc = ENVL_SPI_FLASH;
> + } else if (IS_ENABLED(CONFIG_ENV_IS_IN_NAND) && dev ==
> NAND_BOOT) {
> + env_loc = ENVL_NAND;

For phyCORE-i.MX8MP board code you could just remove the NAND part. As
there is no NAND flash available on the hardware.

Thanks,
Teresa


> + } else if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC)) {
> + switch (dev) {
> + case SD1_BOOT:
> + case SD2_BOOT:
> + case SD3_BOOT:
> + case MMC1_BOOT:
> + case MMC2_BOOT:
> + case MMC3_BOOT:
> + env_loc = ENVL_MMC;
> + break;
> + default:
> + break;
> + }
> + } else if (IS_ENABLED(CONFIG_ENV_IS_NOWHERE)) {
> + env_loc = ENVL_MMC;
> + }
> +
> + return env_loc;
> +}
> +
>  static int setup_fec(void)
>  {
>   struct iomuxc_gpr_base_regs *gpr =
-- 
PHYTEC Messtechnik GmbH | Robert-Koch-Str. 39 | 55129 Mainz, Germany

Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber |
Handelsregister Mainz HRB 4656 | Finanzamt Mainz | St.Nr. 266500608, DE
149059855

Re: [PATCH v8 16/25] efi: Allow easy selection of serial-only operation

[Simon Glass]

Hi Heinrich,

On Thu, 30 Dec 2021 at 23:18, Heinrich Schuchardt  wrote:
>
> On 12/29/21 19:57, Simon Glass wrote:
> > Add info about how to select vidconsole or serial.
> >
> > Also set up a demo boot command.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> > (no changes since v2)
> >
> > Changes in v2:
> > - Add a better boot command too
> >
> >   include/configs/efi-x86_app.h | 25 +
> >   1 file changed, 25 insertions(+)
> >
> > diff --git a/include/configs/efi-x86_app.h b/include/configs/efi-x86_app.h
> > index 6061a6db0a4..33afb7ca0f9 100644
> > --- a/include/configs/efi-x86_app.h
> > +++ b/include/configs/efi-x86_app.h
> > @@ -10,8 +10,33 @@
> >
> >   #undef CONFIG_TPM_TIS_BASE_ADDRESS
> >
> > +/*
> > + * Select the output device: Put an 'x' prefix before one of these to 
> > disable it
> > + */
> > +
> > +/*
> > + * Video output - can normally continue after exit_boot_services has been
> > + * called, since output to the display does not require EFI services at 
> > that
> > + * point. U-Boot sets up the console memory and does its own drawing.
> > + */
> >   #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \
> >   "stdout=vidconsole\0" \
> >   "stderr=vidconsole\0"
> >
> > +/*
> > + * Serial output with no console. Run qemu with:
> > + *
> > + *-display none -serial mon:stdio
> > + *
> > + * This will hang or fail to output on the console after 
> > exit_boot_services is
> > + * called.
>
> In lib/efi/efi_stub.c, efi_main() you set use_uart=true. Couldn't you do
> a similar thing in the app?

Well use_uart is a bit of a hack - just using a hard-coded x86 UART.
See putc() in efi_stub.c - it is just for debugging. There seem to be
importants periods in EFI where debug output is not supported.

>
> Instead of hard coding a specific UART it would be preferable both for
> the EFI stub as well as for the app to use the debug console defined by
> CONFIG_DEBUG_UART.

Well the app uses the con_out thing, so doesn't use a specific UART.

The stub uses the same thing while EFI is available, but uses the hack
when it is not. The console used by DEBUG_UART should be the same
driver as the 'serial' one selected here, so I think it is already
what you want.

I suspect we can make the serial and video enable/disable at runtime
but that seems like a separate problem.

Regards,
Simon

Re: [PATCH v8 19/25] x86: efi: Show the system-table revision

[Simon Glass]

Hi Heinrich,

On Thu, 30 Dec 2021 at 23:46, Heinrich Schuchardt  wrote:
>
> On 12/29/21 19:57, Simon Glass wrote:
> > Show the revision of this table as it can be important.
> >
> > Also update the 'efi table' entry to show the actual address of the EFI
> > table rather than our table that points to it. This saves a step and the
> > intermediate table has nothing else in it.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> > (no changes since v6)
> >
> > Changes in v6:
> > - Fix Alo typo in commit message
> >
> > Changes in v5:
> > - Fix grammar in commit message
> >
> > Changes in v3:
> > - Add new patch to show the system-table revision
> >
> >   arch/x86/cpu/efi/payload.c | 9 -
> >   1 file changed, 8 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c
> > index d2aa889a2b9..b7778565b19 100644
> > --- a/arch/x86/cpu/efi/payload.c
> > +++ b/arch/x86/cpu/efi/payload.c
> > @@ -7,6 +7,7 @@
> >   #include 
> >   #include 
> >   #include 
> > +#include 
> >   #include 
> >   #include 
> >   #include 
> > @@ -296,8 +297,14 @@ void setup_efi_info(struct efi_info *efi_info)
> >   void efi_show_bdinfo(void)
> >   {
> >   struct efi_entry_systable *table = NULL;
> > + struct efi_system_table *sys_table;
> >   int size, ret;
> >
> >   ret = efi_info_get(EFIET_SYS_TABLE, (void **), );
> > - bdinfo_print_num_l("efi_table", (ulong)table);
> > + if (!ret) {
> > + bdinfo_print_num_l("efi_table", table->sys_table);
> > + sys_table = (struct efi_system_table *)(uintptr_t)
> > + table->sys_table;
> > + bdinfo_print_num_l(" revision", sys_table->fw_revision);
>
> This will print "0x025A" for UEFI version 2.9.
> Should we print "2.9" instead?
>
> Reviewed-by: Heinrich Schuchardt 

We coud...

The spec says (in it's strange hyphen-free style):

FirmwareRevision A firmware vendor specific value that identifies the
revision of the
system firmware for the platform.

How do you know the format of the value? For the OVMF version I see 0x0001

Regards,
Simon

Re: [PATCH v8 12/25] efi: Move exit_boot_services into a function

[Simon Glass]

Hi Heinrich,

On Thu, 30 Dec 2021 at 22:41, Heinrich Schuchardt  wrote:
>
> On 12/29/21 19:57, Simon Glass wrote:
> > At present this code is inline in the app and stub. But they do the same
> > thing. The difference is that the stub does it immediately and the app
> > doesn't want to do it until the end (when it boots a kernel) or not at
> > all, if returning to UEFI.
> >
> > Move it into a function so it can be called as needed.
> >
> > Also store the memory map so that it can be accessed within the app if
> > needed.
>
> The memory map is *not* a static object. It may change with any API call
> that you make. You must read the memory map immediately before calling
> ExitBootServices(). The valid value of MapKey typically will change with
> any change of the memory map. Calling ExitBootServices() with the wrong
> value of MapKey will lead to a failure. Storing these values except for
> immediate use makes no sense.
>
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> > (no changes since v6)
> >
> > Changes in v6:
> > - Fix typo in function comment
> >
> > Changes in v2:
> > - Add a sentence about what the patch does
> >
> >   include/efi.h  | 32 ++
> >   lib/efi/efi.c  | 68 ++
> >   lib/efi/efi_app.c  |  3 ++
> >   lib/efi/efi_stub.c | 66 
> >   4 files changed, 114 insertions(+), 55 deletions(-)
> >
> > diff --git a/include/efi.h b/include/efi.h
> > index d4785478585..2a84223d235 100644
> > --- a/include/efi.h
> > +++ b/include/efi.h
> > @@ -407,6 +407,12 @@ static inline struct efi_mem_desc 
> > *efi_get_next_mem_desc(
> >* @sys_table: Pointer to system table
> >* @boot: Pointer to boot-services table
> >* @run: Pointer to runtime-services table
> > + * @memmap_key: Key returned from get_memory_map()
> > + * @memmap_desc: List of memory-map records
> > + * @memmap_alloc: Amount of memory allocated for memory map list
> > + * @memmap_size Size of memory-map list in bytes
> > + * @memmap_desc_size: Size of an individual memory-map record, in bytes
> > + * @memmap_version: Memory-map version
> >*
> >* @use_pool_for_malloc: true if all allocation should go through the EFI 
> > 'pool'
> >*  methods allocate_pool() and free_pool(); false to use 'pages' methods
> > @@ -424,6 +430,12 @@ struct efi_priv {
> >   struct efi_system_table *sys_table;
> >   struct efi_boot_services *boot;
> >   struct efi_runtime_services *run;
> > + efi_uintn_t memmap_key;
> > + struct efi_mem_desc *memmap_desc;
> > + efi_uintn_t memmap_alloc;
> > + efi_uintn_t memmap_size;
> > + efi_uintn_t memmap_desc_size;
> > + u32 memmap_version;
> >
> >   /* app: */
> >   bool use_pool_for_malloc;
> > @@ -574,4 +586,24 @@ void efi_putc(struct efi_priv *priv, const char ch);
> >*/
> >   int efi_info_get(enum efi_entry_t type, void **datap, int *sizep);
> >
> > +/**
> > + * efi_store_memory_map() - Collect the memory-map info from EFI
> > + *
> > + * Collect the memory info and store it for later use, e.g. in calling
> > + * exit_boot_services()
> > + *
> > + * @priv:Pointer to private EFI structure
> > + * @return 0 if OK, non-zero on error
> > + */
> > +int efi_store_memory_map(struct efi_priv *priv);
> > +
> > +/**
> > + * efi_call_exit_boot_services() - Handle the exit-boot-service procedure
> > + *
> > + * Tell EFI we don't want their boot services anymore
> > + *
> > + * Return: 0 if OK, non-zero on error
> > + */
> > +int efi_call_exit_boot_services(void);
> > +
> >   #endif /* _LINUX_EFI_H */
> > diff --git a/lib/efi/efi.c b/lib/efi/efi.c
> > index cd6bf47b180..20da88c9151 100644
> > --- a/lib/efi/efi.c
> > +++ b/lib/efi/efi.c
> > @@ -135,3 +135,71 @@ void efi_free(struct efi_priv *priv, void *ptr)
> >
> >   boot->free_pool(ptr);
> >   }
> > +
> > +int efi_store_memory_map(struct efi_priv *priv)
> > +{
> > + struct efi_boot_services *boot = priv->sys_table->boottime;
> > + efi_uintn_t size, desc_size;
> > + efi_status_t ret;
> > +
> > + /* Get the memory map so we can switch off EFI */
> > + size = 0;
> > + ret = boot->get_memory_map(, NULL, >memmap_key,
> > +>memmap_desc_size,
> > +>memmap_version);
> > + if (ret != EFI_BUFFER_TOO_SMALL) {
> > + printhex2(EFI_BITS_PER_LONG);
> > + putc(' ');
> > + printhex2(ret);
> > + puts(" No memory map\n");
> > + return ret;
> > + }
> > + /*
> > +  * Since doing a malloc() may change the memory map and also we want 
> > to
> > +  * be able to read the memory map in efi_call_exit_boot_services()
> > +  * below, after more changes have happened
> > +  */
> > + priv->memmap_alloc = size + 1024;
>
> GetMemoryMap() must be called immediately before calling ExitBootServices().

Yes that's right. I remember reading that in the spec.

>

[PATCH v9 9/9] efi: Tidy up some comments in efi header

[Simon Glass]

Document the return value in efi_init(). Fix up @sizep in efi_info_get().
Use Return: instead of @return

Signed-off-by: Simon Glass 
---

(no changes since v8)

Changes in v8:
- Add new patch to tidy up header comments

 include/efi.h | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/include/efi.h b/include/efi.h
index 9b7ba0d54d3..6159f34ad2b 100644
--- a/include/efi.h
+++ b/include/efi.h
@@ -510,14 +510,14 @@ void efi_set_priv(struct efi_priv *priv);
 /**
  * efi_get_sys_table() - Get access to the main EFI system table
  *
- * @return pointer to EFI system table
+ * Returns: pointer to EFI system table
  */
 struct efi_system_table *efi_get_sys_table(void);
 
 /**
  * efi_get_boot() - Get access to the EFI boot services table
  *
- * @return pointer to EFI boot services table
+ * Returns: pointer to EFI boot services table
  */
 struct efi_boot_services *efi_get_boot(void);
 
@@ -526,7 +526,7 @@ struct efi_boot_services *efi_get_boot(void);
  *
  * This is used when U-Boot is built as an EFI application.
  *
- * @return the base of RAM as known to U-Boot
+ * Returns: the base of RAM as known to U-Boot
  */
 unsigned long efi_get_ram_base(void);
 
@@ -537,6 +537,7 @@ unsigned long efi_get_ram_base(void);
  * @banner:Banner to display when starting
  * @image: The image handle passed to efi_main()
  * @sys_table: The EFI system table pointer passed to efi_main()
+ * Return: 0 on succcess, EFI error code on failure
  */
 int efi_init(struct efi_priv *priv, const char *banner, efi_handle_t image,
 struct efi_system_table *sys_table);
@@ -547,7 +548,7 @@ int efi_init(struct efi_priv *priv, const char *banner, 
efi_handle_t image,
  * @priv:  Pointer to private EFI structure
  * @size:  Number of bytes to allocate
  * @retp:  Return EFI status result
- * @return pointer to memory allocated, or NULL on error
+ * Returns: pointer to memory allocated, or NULL on error
  */
 void *efi_malloc(struct efi_priv *priv, int size, efi_status_t *retp);
 
@@ -584,8 +585,8 @@ void efi_putc(struct efi_priv *priv, const char ch);
  *
  * @type:  Entry type to search for
  * @datap: Returns pointer to entry data
- * @sizep: Returns pointer to entry size
- * @return 0 if OK, -ENODATA if there is no table, -ENOENT if there is no entry
+ * @sizep: Returns entry size
+ * Return: 0 if OK, -ENODATA if there is no table, -ENOENT if there is no entry
  * of the requested type, -EPROTONOSUPPORT if the table has the wrong version
  */
 int efi_info_get(enum efi_entry_t type, void **datap, int *sizep);
@@ -597,7 +598,7 @@ int efi_info_get(enum efi_entry_t type, void **datap, int 
*sizep);
  * exit_boot_services()
  *
  * @priv:  Pointer to private EFI structure
- * @return 0 if OK, non-zero on error
+ * Returns: 0 if OK, non-zero on error
  */
 int efi_store_memory_map(struct efi_priv *priv);
 
@@ -620,7 +621,7 @@ int efi_call_exit_boot_services(void);
  * @keyp:  Returns memory-map key
  * @desc_sizep:Returns size of each @desc_base record
  * @versionp:  Returns version number of memory map
- * @return 0 on success, -ve on error
+ * Returns: 0 on success, -ve on error
  */
 int efi_get_mmap(struct efi_mem_desc **descp, int *sizep, uint *keyp,
 int *desc_sizep, uint *versionp);
-- 
2.34.1.448.ga2b2bfdf31-goog

[PATCH v9 8/9] efi: Build the 64-bit app properly

[Simon Glass]

Now that the linker crash is resolved, build the 64-bit EFI app, including
all the required code.

Signed-off-by: Simon Glass 
---

Changes in v9:
- Drop changes previously applied

Changes in v7:
- Rebase on -master instead of -next

Changes in v5:
- Add new patch to build the 64-bit app properly
- Add various patches to fix up the 64-bit app so that it boots

Changes in v2:
- Add new patch to support the efi command in the app

 Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 074ba7349f2..1ba168aeb2d 100644
--- a/Makefile
+++ b/Makefile
@@ -1776,9 +1776,9 @@ else
 quiet_cmd_u-boot__ ?= LD  $@
   cmd_u-boot__ ?= $(LD) $(KBUILD_LDFLAGS) $(LDFLAGS_u-boot) -o $@  
\
-T u-boot.lds $(u-boot-init)
\
-   $(if $(CONFIG_EFI_APP_64BIT),,--whole-archive)  
\
+   --whole-archive 
\
$(u-boot-main)  
\
-   $(if $(CONFIG_EFI_APP_64BIT),,--no-whole-archive)   
\
+   --no-whole-archive  
\
$(PLATFORM_LIBS) -Map u-boot.map;   
\
$(if $(ARCH_POSTLINK), $(MAKE) -f $(ARCH_POSTLINK) $@, true)
 endif
-- 
2.34.1.448.ga2b2bfdf31-goog

[PATCH v9 7/9] x86: efi: Set the correct link flags for the 64-bit EFI app

[Simon Glass]

At present some 32-bit settings are used with the 64-bit app. Fix this by
separating out the two cases.

Be careful not to break the 64-bit payload, which needs to build a 64-bit
EFI stub with a 32-bit U-Boot.

Signed-off-by: Christian Melki 
Signed-off-by: Simon Glass 
---

(no changes since v5)

Changes in v5:
- Add new patch to set the correct link flags for the 64-bit EFI app

 arch/x86/config.mk | 15 ---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/arch/x86/config.mk b/arch/x86/config.mk
index 589f2aed2bc..889497b6bd7 100644
--- a/arch/x86/config.mk
+++ b/arch/x86/config.mk
@@ -20,6 +20,11 @@ IS_32BIT := y
 endif
 endif
 
+EFI_IS_32BIT := $(IS_32BIT)
+ifdef CONFIG_EFI_STUB_64BIT
+EFI_IS_32BIT :=
+endif
+
 ifeq ($(IS_32BIT),y)
 PLATFORM_CPPFLAGS += -march=i386 -m32
 else
@@ -44,8 +49,14 @@ CFLAGS_EFI := -fpic -fshort-wchar
 # Compiler flags to be removed when building UEFI applications
 CFLAGS_NON_EFI := -mregparm=3 -fstack-protector-strong
 
-ifeq ($(CONFIG_EFI_STUB_64BIT),)
+ifeq ($(IS_32BIT),y)
+EFIPAYLOAD_BFDARCH = i386
+else
 CFLAGS_EFI += $(call cc-option, -mno-red-zone)
+EFIPAYLOAD_BFDARCH = x86_64
+endif
+
+ifeq ($(EFI_IS_32BIT),y)
 EFIARCH = ia32
 EFIPAYLOAD_BFDTARGET = elf32-i386
 else
@@ -53,8 +64,6 @@ EFIARCH = x86_64
 EFIPAYLOAD_BFDTARGET = elf64-x86-64
 endif
 
-EFIPAYLOAD_BFDARCH = i386
-
 LDSCRIPT_EFI := $(srctree)/arch/x86/lib/elf_$(EFIARCH)_efi.lds
 EFISTUB := crt0_$(EFIARCH)_efi.o reloc_$(EFIARCH)_efi.o
 OBJCOPYFLAGS_EFI += --target=efi-app-$(EFIARCH)
-- 
2.34.1.448.ga2b2bfdf31-goog

[PATCH v9 6/9] x86: efi: Don't use the 64-bit link script for the EFI app

[Simon Glass]

That script is not intended for use with EFI, so update the logic to avoid
using it.

Signed-off-by: Simon Glass 
Signed-off-by: Christian Melki 
---

(no changes since v5)

Changes in v5:
- Add new patch to avoid using the 64-bit link script for the EFI app

 arch/x86/cpu/config.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/cpu/config.mk b/arch/x86/cpu/config.mk
index d3033b41603..87e242a2065 100644
--- a/arch/x86/cpu/config.mk
+++ b/arch/x86/cpu/config.mk
@@ -9,7 +9,7 @@ LDPPFLAGS += -DRESET_VEC_LOC=$(CONFIG_RESET_VEC_LOC)
 LDPPFLAGS += -DSTART_16=$(CONFIG_SYS_X86_START16)
 
 ifdef CONFIG_X86_64
-ifndef CONFIG_SPL_BUILD
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_EFI_APP),)
 LDSCRIPT = $(srctree)/arch/x86/cpu/u-boot-64.lds
 endif
 endif
-- 
2.34.1.448.ga2b2bfdf31-goog

[PATCH v9 5/9] x86: efi: Round out the link script for 64-bit EFI

[Simon Glass]

Make sure the linker lists are in the right place and drop the eh_frame
section, which is not needed.

Signed-off-by: Simon Glass 
---

(no changes since v5)

Changes in v5:
- Add new patch to round out the link script for 64-bit EFI

 arch/x86/lib/elf_x86_64_efi.lds | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/x86/lib/elf_x86_64_efi.lds b/arch/x86/lib/elf_x86_64_efi.lds
index b436429b33e..75727400aa4 100644
--- a/arch/x86/lib/elf_x86_64_efi.lds
+++ b/arch/x86/lib/elf_x86_64_efi.lds
@@ -63,6 +63,7 @@ SECTIONS
*(.rela.data*)
*(.rela.got)
*(.rela.stab)
+*(.rela.u_boot_list*)
}
 
. = ALIGN(4096);
@@ -70,9 +71,11 @@ SECTIONS
. = ALIGN(4096);
.dynstr : { *(.dynstr) }
. = ALIGN(4096);
+
+/DISCARD/ : { *(.eh_frame) }
+
.ignored.reloc : {
*(.rela.reloc)
-   *(.eh_frame)
*(.note.GNU-stack)
}
 
-- 
2.34.1.448.ga2b2bfdf31-goog

[PATCH v9 3/9] efi: Support the efi command in the app

[Simon Glass]

At present the 'efi' command only works in the EFI payload. Update it to
work in the app too, so the memory map can be examined.

Signed-off-by: Simon Glass 
---

(no changes since v1)

 cmd/Makefile  |  2 +-
 cmd/efi.c | 48 ---
 include/efi.h | 15 +++
 lib/efi/efi_app.c | 33 
 4 files changed, 82 insertions(+), 16 deletions(-)

diff --git a/cmd/Makefile b/cmd/Makefile
index 891819ae0f6..df50625bde7 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -58,7 +58,7 @@ obj-$(CONFIG_CMD_EXTENSION) += extension_board.o
 obj-$(CONFIG_CMD_ECHO) += echo.o
 obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
 obj-$(CONFIG_CMD_EEPROM) += eeprom.o
-obj-$(CONFIG_EFI_STUB) += efi.o
+obj-$(CONFIG_EFI) += efi.o
 obj-$(CONFIG_CMD_EFIDEBUG) += efidebug.o
 obj-$(CONFIG_CMD_ELF) += elf.o
 obj-$(CONFIG_HUSH_PARSER) += exit.o
diff --git a/cmd/efi.c b/cmd/efi.c
index d2400acbbba..c0384e0db28 100644
--- a/cmd/efi.c
+++ b/cmd/efi.c
@@ -13,6 +13,8 @@
 #include 
 #include 
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static const char *const type_name[] = {
"reserved",
"loader_code",
@@ -217,37 +219,53 @@ static void efi_print_mem_table(struct efi_mem_desc 
*desc, int desc_size,
 static int do_efi_mem(struct cmd_tbl *cmdtp, int flag, int argc,
  char *const argv[])
 {
-   struct efi_mem_desc *desc;
-   struct efi_entry_memmap *map;
+   struct efi_mem_desc *orig, *desc;
+   uint version, key;
+   int desc_size;
int size, ret;
bool skip_bs;
 
skip_bs = !argc || *argv[0] != 'a';
-   ret = efi_info_get(EFIET_MEMORY_MAP, (void **), );
-   switch (ret) {
-   case -ENOENT:
-   printf("No EFI table available\n");
-   goto done;
-   case -EPROTONOSUPPORT:
-   printf("Incorrect EFI table version\n");
-   goto done;
+   if (IS_ENABLED(CONFIG_EFI_APP)) {
+   ret = efi_get_mmap(, , , _size, );
+   if (ret) {
+   printf("Cannot read memory map (err=%d)\n", ret);
+   return CMD_RET_FAILURE;
+   }
+   } else {
+   struct efi_entry_memmap *map;
+
+   ret = efi_info_get(EFIET_MEMORY_MAP, (void **), );
+   switch (ret) {
+   case -ENOENT:
+   printf("No EFI table available\n");
+   goto done;
+   case -EPROTONOSUPPORT:
+   printf("Incorrect EFI table version\n");
+   goto done;
+   }
+   orig = map->desc;
+   desc_size = map->desc_size;
+   version = map->version;
}
-   printf("EFI table at %lx, memory map %p, size %x, version %x, descr. 
size %#x\n",
-  gd->arch.table, map, size, map->version, map->desc_size);
-   if (map->version != EFI_MEM_DESC_VERSION) {
+   printf("EFI table at %lx, memory map %p, size %x, key %x, version %x, 
descr. size %#x\n",
+  gd->arch.table, orig, size, key, version, desc_size);
+   if (version != EFI_MEM_DESC_VERSION) {
printf("Incorrect memory map version\n");
ret = -EPROTONOSUPPORT;
goto done;
}
 
-   desc = efi_build_mem_table(map->desc, size, map->desc_size, skip_bs);
+   desc = efi_build_mem_table(orig, size, desc_size, skip_bs);
if (!desc) {
ret = -ENOMEM;
goto done;
}
 
-   efi_print_mem_table(desc, map->desc_size, skip_bs);
+   efi_print_mem_table(desc, desc_size, skip_bs);
free(desc);
+   if (IS_ENABLED(CONFIG_EFI_APP))
+   free(orig);
 done:
if (ret)
printf("Error: %d\n", ret);
diff --git a/include/efi.h b/include/efi.h
index 3508ff8f639..9b7ba0d54d3 100644
--- a/include/efi.h
+++ b/include/efi.h
@@ -610,4 +610,19 @@ int efi_store_memory_map(struct efi_priv *priv);
  */
 int efi_call_exit_boot_services(void);
 
+/**
+ * efi_get_mmap() - Get the memory map from EFI
+ *
+ * This is used in the app. The caller must free *@descp when done
+ *
+ * @descp: Returns allocated pointer to EFI memory map table
+ * @sizep: Returns size of table in bytes
+ * @keyp:  Returns memory-map key
+ * @desc_sizep:Returns size of each @desc_base record
+ * @versionp:  Returns version number of memory map
+ * @return 0 on success, -ve on error
+ */
+int efi_get_mmap(struct efi_mem_desc **descp, int *sizep, uint *keyp,
+int *desc_sizep, uint *versionp);
+
 #endif /* _LINUX_EFI_H */
diff --git a/lib/efi/efi_app.c b/lib/efi/efi_app.c
index 5c2593bc4d9..6980933d7ea 100644
--- a/lib/efi/efi_app.c
+++ b/lib/efi/efi_app.c
@@ -32,6 +32,39 @@ int efi_info_get(enum efi_entry_t type, void **datap, int 
*sizep)
return -ENOSYS;
 }
 
+int efi_get_mmap(struct efi_mem_desc **descp, int *sizep, uint *keyp,
+  

[PATCH v9 4/9] x86: efi: Tweak the code used for the 64-bit EFI app

[Simon Glass]

Add an empty CPU init function to avoid fiddling with low-level CPU
features in the app. Set up the C runtime correctly for 64-bit use
and avoid clearing BSS, since this is done by EFI when U-Boot is loaded.

Signed-off-by: Simon Glass 
---

(no changes since v5)

Changes in v5:
- Add new patch to tweak the code used for the 64-bit EFI app

 arch/x86/cpu/x86_64/cpu.c | 5 +
 arch/x86/lib/Makefile | 5 ++---
 arch/x86/lib/relocate.c   | 2 ++
 3 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c
index a3674e8e29a..6a387612916 100644
--- a/arch/x86/cpu/x86_64/cpu.c
+++ b/arch/x86/cpu/x86_64/cpu.c
@@ -45,3 +45,8 @@ int cpu_phys_address_size(void)
 {
return CONFIG_CPU_ADDR_BITS;
 }
+
+int x86_cpu_init_f(void)
+{
+   return 0;
+}
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 18757b29aa9..e5235b7c4f4 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -65,9 +65,8 @@ endif
 
 lib-$(CONFIG_USE_PRIVATE_LIBGCC) += div64.o
 
-ifeq ($(CONFIG_$(SPL_)X86_64),)
-obj-$(CONFIG_EFI_APP) += crt0_ia32_efi.o reloc_ia32_efi.o
-endif
+obj-$(CONFIG_EFI_APP_32BIT) += crt0_ia32_efi.o reloc_ia32_efi.o
+obj-$(CONFIG_EFI_APP_64BIT) += crt0_x86_64_efi.o reloc_x86_64_efi.o
 
 ifneq ($(CONFIG_EFI_STUB),)
 
diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c
index 6fe51516477..9060d19d46a 100644
--- a/arch/x86/lib/relocate.c
+++ b/arch/x86/lib/relocate.c
@@ -35,6 +35,7 @@ int copy_uboot_to_ram(void)
return 0;
 }
 
+#ifndef CONFIG_EFI_APP
 int clear_bss(void)
 {
ulong dst_addr = (ulong)&__bss_start + gd->reloc_off;
@@ -46,6 +47,7 @@ int clear_bss(void)
 
return 0;
 }
+#endif
 
 #if CONFIG_IS_ENABLED(X86_64)
 static void do_elf_reloc_fixups64(unsigned int text_base, uintptr_t size,
-- 
2.34.1.448.ga2b2bfdf31-goog

[PATCH v9 2/9] x86: efi: Update efi_get_next_mem_desc() to avoid needing a map

[Simon Glass]

At present this function requires a pointer to struct efi_entry_memmap
but the only field used in there is the desc_size. We want to be able
to use it from the app, so update it to use desc_size directly.

Signed-off-by: Simon Glass 
---

(no changes since v1)

 arch/x86/cpu/efi/payload.c |  8 
 cmd/efi.c  | 34 ++
 include/efi.h  |  4 ++--
 3 files changed, 24 insertions(+), 22 deletions(-)

diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c
index 04ce1880b4d..b7778565b19 100644
--- a/arch/x86/cpu/efi/payload.c
+++ b/arch/x86/cpu/efi/payload.c
@@ -51,7 +51,7 @@ ulong board_get_usable_ram_top(ulong total_size)
 
end = (struct efi_mem_desc *)((ulong)map + size);
desc = map->desc;
-   for (; desc < end; desc = efi_get_next_mem_desc(map, desc)) {
+   for (; desc < end; desc = efi_get_next_mem_desc(desc, map->desc_size)) {
if (desc->type != EFI_CONVENTIONAL_MEMORY ||
desc->physical_start >= 1ULL << 32)
continue;
@@ -89,7 +89,7 @@ int dram_init(void)
end = (struct efi_mem_desc *)((ulong)map + size);
gd->ram_size = 0;
desc = map->desc;
-   for (; desc < end; desc = efi_get_next_mem_desc(map, desc)) {
+   for (; desc < end; desc = efi_get_next_mem_desc(desc, map->desc_size)) {
if (desc->type < EFI_MMAP_IO)
gd->ram_size += desc->num_pages << EFI_PAGE_SHIFT;
}
@@ -114,7 +114,7 @@ int dram_init_banksize(void)
desc = map->desc;
for (num_banks = 0;
 desc < end && num_banks < CONFIG_NR_DRAM_BANKS;
-desc = efi_get_next_mem_desc(map, desc)) {
+desc = efi_get_next_mem_desc(desc, map->desc_size)) {
/*
 * We only use conventional memory and ignore
 * anything less than 1MB.
@@ -197,7 +197,7 @@ unsigned int install_e820_map(unsigned int max_entries,
 
end = (struct efi_mem_desc *)((ulong)map + size);
for (desc = map->desc; desc < end;
-desc = efi_get_next_mem_desc(map, desc)) {
+desc = efi_get_next_mem_desc(desc, map->desc_size)) {
if (desc->num_pages == 0)
continue;
 
diff --git a/cmd/efi.c b/cmd/efi.c
index f2ed26bd4b2..d2400acbbba 100644
--- a/cmd/efi.c
+++ b/cmd/efi.c
@@ -75,16 +75,17 @@ static int h_cmp_entry(const void *v1, const void *v2)
 /**
  * efi_build_mem_table() - make a sorted copy of the memory table
  *
- * @map:   Pointer to EFI memory map table
+ * @desc_base: Pointer to EFI memory map table
  * @size:  Size of table in bytes
+ * @desc_size: Size of each @desc_base record
  * @skip_bs:   True to skip boot-time memory and merge it with conventional
  * memory. This will significantly reduce the number of table
  * entries.
  * Return: pointer to the new table. It should be freed with free() by the
  * caller.
  */
-static void *efi_build_mem_table(struct efi_entry_memmap *map, int size,
-bool skip_bs)
+static void *efi_build_mem_table(struct efi_mem_desc *desc_base, int size,
+int desc_size, bool skip_bs)
 {
struct efi_mem_desc *desc, *end, *base, *dest, *prev;
int count;
@@ -95,15 +96,16 @@ static void *efi_build_mem_table(struct efi_entry_memmap 
*map, int size,
debug("%s: Cannot allocate %#x bytes\n", __func__, size);
return NULL;
}
-   end = (struct efi_mem_desc *)((ulong)map + size);
-   count = ((ulong)end - (ulong)map->desc) / map->desc_size;
-   memcpy(base, map->desc, (ulong)end - (ulong)map->desc);
-   qsort(base, count, map->desc_size, h_cmp_entry);
+   end = (void *)desc_base + size;
+   count = ((ulong)end - (ulong)desc_base) / desc_size;
+   memcpy(base, desc_base, (ulong)end - (ulong)desc_base);
+   qsort(base, count, desc_size, h_cmp_entry);
prev = NULL;
addr = 0;
dest = base;
-   end = (struct efi_mem_desc *)((ulong)base + count * map->desc_size);
-   for (desc = base; desc < end; desc = efi_get_next_mem_desc(map, desc)) {
+   end = (struct efi_mem_desc *)((ulong)base + count * desc_size);
+   for (desc = base; desc < end;
+desc = efi_get_next_mem_desc(desc, desc_size)) {
bool merge = true;
u32 type = desc->type;
 
@@ -116,7 +118,7 @@ static void *efi_build_mem_table(struct efi_entry_memmap 
*map, int size,
if (skip_bs && is_boot_services(desc->type))
type = EFI_CONVENTIONAL_MEMORY;
 
-   memcpy(dest, desc, map->desc_size);
+   memcpy(dest, desc, desc_size);
dest->type = type;
if (!skip_bs || !prev)
merge = false;
@@ -131,7 +133,7 @@ static void *efi_build_mem_table(struct 

[PATCH v9 1/9] efi: Move exit_boot_services into a function

[Simon Glass]

At present this code is inline in the app and stub. But they do the same
thing. The difference is that the stub does it immediately and the app
doesn't want to do it until the end (when it boots a kernel) or not at
all, if returning to UEFI.

Move it into a function so it can be called as needed.

Add a comment showing how to store the memory map so that it can be
accessed within the app if needed, for debugging purposes only. The map
can change without notice.

Signed-off-by: Simon Glass 
---

Changes in v9:
- Add a comment as to why printf() cannot be used
- Comment out storing the EFI memory map in the app and update commit message

Changes in v6:
- Fix typo in function comment

Changes in v2:
- Add a sentence about what the patch does

 include/efi.h  | 32 +
 lib/efi/efi.c  | 72 ++
 lib/efi/efi_app.c  |  9 ++
 lib/efi/efi_stub.c | 66 +++---
 4 files changed, 124 insertions(+), 55 deletions(-)

diff --git a/include/efi.h b/include/efi.h
index 877a2e5a8d3..dc9907fa16e 100644
--- a/include/efi.h
+++ b/include/efi.h
@@ -407,6 +407,12 @@ static inline struct efi_mem_desc *efi_get_next_mem_desc(
  * @sys_table: Pointer to system table
  * @boot: Pointer to boot-services table
  * @run: Pointer to runtime-services table
+ * @memmap_key: Key returned from get_memory_map()
+ * @memmap_desc: List of memory-map records
+ * @memmap_alloc: Amount of memory allocated for memory map list
+ * @memmap_size Size of memory-map list in bytes
+ * @memmap_desc_size: Size of an individual memory-map record, in bytes
+ * @memmap_version: Memory-map version
  *
  * @use_pool_for_malloc: true if all allocation should go through the EFI 
'pool'
  * methods allocate_pool() and free_pool(); false to use 'pages' methods
@@ -424,6 +430,12 @@ struct efi_priv {
struct efi_system_table *sys_table;
struct efi_boot_services *boot;
struct efi_runtime_services *run;
+   efi_uintn_t memmap_key;
+   struct efi_mem_desc *memmap_desc;
+   efi_uintn_t memmap_alloc;
+   efi_uintn_t memmap_size;
+   efi_uintn_t memmap_desc_size;
+   u32 memmap_version;
 
/* app: */
bool use_pool_for_malloc;
@@ -578,4 +590,24 @@ void efi_putc(struct efi_priv *priv, const char ch);
  */
 int efi_info_get(enum efi_entry_t type, void **datap, int *sizep);
 
+/**
+ * efi_store_memory_map() - Collect the memory-map info from EFI
+ *
+ * Collect the memory info and store it for later use, e.g. in calling
+ * exit_boot_services()
+ *
+ * @priv:  Pointer to private EFI structure
+ * @return 0 if OK, non-zero on error
+ */
+int efi_store_memory_map(struct efi_priv *priv);
+
+/**
+ * efi_call_exit_boot_services() - Handle the exit-boot-service procedure
+ *
+ * Tell EFI we don't want their boot services anymore
+ *
+ * Return: 0 if OK, non-zero on error
+ */
+int efi_call_exit_boot_services(void);
+
 #endif /* _LINUX_EFI_H */
diff --git a/lib/efi/efi.c b/lib/efi/efi.c
index cd6bf47b180..aa42f1842f3 100644
--- a/lib/efi/efi.c
+++ b/lib/efi/efi.c
@@ -135,3 +135,75 @@ void efi_free(struct efi_priv *priv, void *ptr)
 
boot->free_pool(ptr);
 }
+
+int efi_store_memory_map(struct efi_priv *priv)
+{
+   struct efi_boot_services *boot = priv->sys_table->boottime;
+   efi_uintn_t size, desc_size;
+   efi_status_t ret;
+
+   /* Get the memory map so we can switch off EFI */
+   size = 0;
+   ret = boot->get_memory_map(, NULL, >memmap_key,
+  >memmap_desc_size,
+  >memmap_version);
+   if (ret != EFI_BUFFER_TOO_SMALL) {
+   /*
+* Note this function avoids using printf() since it is not
+* available in the stub
+*/
+   printhex2(EFI_BITS_PER_LONG);
+   putc(' ');
+   printhex2(ret);
+   puts(" No memory map\n");
+   return ret;
+   }
+   /*
+* Since doing a malloc() may change the memory map and also we want to
+* be able to read the memory map in efi_call_exit_boot_services()
+* below, after more changes have happened
+*/
+   priv->memmap_alloc = size + 1024;
+   priv->memmap_size = priv->memmap_alloc;
+   priv->memmap_desc = efi_malloc(priv, size, );
+   if (!priv->memmap_desc) {
+   printhex2(ret);
+   puts(" No memory for memory descriptor\n");
+   return ret;
+   }
+
+   ret = boot->get_memory_map(>memmap_size, priv->memmap_desc,
+  >memmap_key, _size,
+  >memmap_version);
+   if (ret) {
+   printhex2(ret);
+   puts(" Can't get memory map\n");
+   return ret;
+   }
+
+   return 0;
+}
+
+int efi_call_exit_boot_services(void)
+{
+   struct efi_priv *priv = efi_get_priv();
+  

[PATCH v9 0/9] efi: Improvements to U-Boot running on top of UEFI

[Simon Glass]

At present U-Boot can be built as an EFI app, but it is really just for
testing, with very few features. Instead, the payload build is used for
booting on top of UEFI, where U-Boot takes over the machine immediately
and supplies its own drivers.

But the app could be made more useful.

This series provides access to EFI block devices and the video console
within U-Boot. It also restructures the app to make it possible to boot
a kernel, although further work is needed to implement this.

This can be thought of as making U-Boot perform a little like 'grub', in
that it runs purely based on UEFI-provided services.

Of course a lot more work is required, but this is a start.

Note: It would be very useful to include qemu tests of the app and stub
in CI.

This is available at u-boot-dm/efi-working

Changes in v9:
- Add a comment as to why printf() cannot be used
- Comment out storing the EFI memory map in the app and update commit message
- Drop changes previously applied

Changes in v8:
- Add new patch to tidy up header comments

Changes in v7:
- Rebase on -master instead of -next

Changes in v6:
- Fix typo in function comment

Changes in v5:
- Add new patch to avoid using the 64-bit link script for the EFI app
- Add new patch to build the 64-bit app properly
- Add new patch to round out the link script for 64-bit EFI
- Add new patch to set the correct link flags for the 64-bit EFI app
- Add new patch to tweak the code used for the 64-bit EFI app
- Add various patches to fix up the 64-bit app so that it boots

Changes in v2:
- Add a sentence about what the patch does
- Add new patch to support the efi command in the app

Simon Glass (9):
  efi: Move exit_boot_services into a function
  x86: efi: Update efi_get_next_mem_desc() to avoid needing a map
  efi: Support the efi command in the app
  x86: efi: Tweak the code used for the 64-bit EFI app
  x86: efi: Round out the link script for 64-bit EFI
  x86: efi: Don't use the 64-bit link script for the EFI app
  x86: efi: Set the correct link flags for the 64-bit EFI app
  efi: Build the 64-bit app properly
  efi: Tidy up some comments in efi header

 Makefile|  4 +-
 arch/x86/config.mk  | 15 +--
 arch/x86/cpu/config.mk  |  2 +-
 arch/x86/cpu/efi/payload.c  |  8 ++--
 arch/x86/cpu/x86_64/cpu.c   |  5 +++
 arch/x86/lib/Makefile   |  5 +--
 arch/x86/lib/elf_x86_64_efi.lds |  5 ++-
 arch/x86/lib/relocate.c |  2 +
 cmd/Makefile|  2 +-
 cmd/efi.c   | 78 +
 include/efi.h   | 64 +++
 lib/efi/efi.c   | 72 ++
 lib/efi/efi_app.c   | 42 ++
 lib/efi/efi_stub.c  | 66 +---
 14 files changed, 263 insertions(+), 107 deletions(-)

-- 
2.34.1.448.ga2b2bfdf31-goog

Re: [PATCH V2] usb: ehci-mx6: Enable OTG detection on imx8mm and imx8mn

[Michael Walle]

Hi,

> The imx8mm and imx8mn appear compatible with imx7d-usb
> flags in the OTG driver.  If the dr_mode is defined as
> host or peripheral, the device appears to operate correctly,
> however the auto host/peripheral detection results in an error.
> 
> The solution isn't just adding checks for imx8mm and imx8mn to
> the check for imx7, because the USB clock needs to be running
> to read from the USBNC_PHY_STATUS_OFFSET register or it will hang.
> 
> The init_type in both priv and plat data are the same, so it doesn't
> make sense to configure the data in the plat data and copy the
> data to priv when priv can be configured directly.  Instead, rename
> ehci_usb_of_to_plat to ehci_usb_dr_mode and call it from the
> probe functions after the clocks are enabled, but before the data
> is required.
> 
> With that added, the additional checks for imx8mm and imx8mn will
> allow reading the register to automatically determine the state
> (host or device) of the OTG controller.
> 
> Signed-off-by: Adam Ford 
> ---
> V2:  Rename ehci_usb_of_to_plat to ehci_usb_dr_mode and call it
>  from the probe after the clocks are enabled, but before
>  the data is needed.
> 
> diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
> index 1bd6147c76..f2a34b7f06 100644
> --- a/drivers/usb/host/ehci-mx6.c
> +++ b/drivers/usb/host/ehci-mx6.c

..

> @@ -639,10 +639,8 @@ static int mx6_parse_dt_addrs(struct udevice *dev)
>  
>  static int ehci_usb_probe(struct udevice *dev)
>  {
> - struct usb_plat *plat = dev_get_plat(dev);
>   struct usb_ehci *ehci = dev_read_addr_ptr(dev);
>   struct ehci_mx6_priv_data *priv = dev_get_priv(dev);
> - enum usb_init_type type = plat->init_type;
>   struct ehci_hccr *hccr;
>   struct ehci_hcor *hcor;
>   int ret;
> @@ -660,8 +658,6 @@ static int ehci_usb_probe(struct udevice *dev)
>   return ret;
>  
>   priv->ehci = ehci;
> - priv->init_type = type;

I'm not sure this is correct. There is also this:
https://elixir.bootlin.com/u-boot/v2022.01-rc4/source/drivers/usb/host/usb-uclass.c#L407

Which won't work anymore. usb_setup_ehci_gadget() is called from
usb_gadget_register_driver() in ci_udc.c. The latter is the one used
on the imx, right? But I might be wrong. I'm still trying to figure
out how this all works together, because I also try to get OTG
running on the dwc3 driver. It looks like the ci_udc.c is special
here, and I wonder how a transition to UCLASS_USB_GADGET_GENERIC
might look like for this driver.

-michael