Re: [PATCH v2] fs/squashfs: sqfs_read: Prevent arbitrary code execution
It works well.
Tested-by: Jincheng Wang
Miquel Raynal 于2022年6月9日周四 22:02写道：
> Following Jincheng's report, an out-of-band write leading to arbitrary
> code execution is possible because on one side the squashfs logic
> accepts directory names up to 65535 bytes (u16), while U-Boot fs logic
> accepts directory names up to 255 bytes long.
>
> Prevent such an exploit from happening by capping directory name sizes
> to 255. Use a define for this purpose so that developers can link the
> limitation to its source and eventually kill it some day by dynamically
> allocating this array (if ever desired).
>
> Link:
> https://lore.kernel.org/all/CALO=dhfb+yboxxvr5kcsk0ifdg+e7ywko4-e+72kjbcs8jb...@mail.gmail.com
> Reported-by: Jincheng Wang
> Signed-off-by: Miquel Raynal
> ---
>
> Changes in v2:
> * Jincheng reported in private that there was a problem with small name
> sizes, the last byte was lost. The reason is, dirs->entry->name_size
> contains the length of the string minus one (and excluding the
> trailing '\0'). The previous implementation had this handled correctly
> but my initial fix did not kept the "+ 1" in place because it felt
> wrong but is actually necessary. This information is actually
> available in a comment a bit above in this file.
>
>
> fs/squashfs/sqfs.c | 8 +---
> include/fs.h | 4 +++-
> 2 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
> index b4484fa17f5..3f1030057c4 100644
> --- a/fs/squashfs/sqfs.c
> +++ b/fs/squashfs/sqfs.c
> @@ -976,6 +976,7 @@ int sqfs_readdir(struct fs_dir_stream *fs_dirs, struct
> fs_dirent **dentp)
> int i_number, offset = 0, ret;
> struct fs_dirent *dent;
> unsigned char *ipos;
> + u16 name_size;
>
> dirs = (struct squashfs_dir_stream *)fs_dirs;
> if (!dirs->size) {
> @@ -1058,9 +1059,10 @@ int sqfs_readdir(struct fs_dir_stream *fs_dirs,
> struct fs_dirent **dentp)
> return -SQFS_STOP_READDIR;
> }
>
> - /* Set entry name */
> - strncpy(dent->name, dirs->entry->name, dirs->entry->name_size + 1);
> - dent->name[dirs->entry->name_size + 1] = '\0';
> + /* Set entry name (capped at FS_DIRENT_NAME_LEN which is a U-Boot
> limitation) */
> + name_size = min_t(u16, dirs->entry->name_size + 1,
> FS_DIRENT_NAME_LEN - 1);
> + strncpy(dent->name, dirs->entry->name, name_size);
> + dent->name[name_size] = '\0';
>
> offset = dirs->entry->name_size + 1 + SQFS_ENTRY_BASE_LENGTH;
> dirs->entry_count--;
> diff --git a/include/fs.h b/include/fs.h
> index b43f16a692f..2195dc172ec 100644
> --- a/include/fs.h
> +++ b/include/fs.h
> @@ -174,6 +174,8 @@ int fs_write(const char *filename, ulong addr, loff_t
> offset, loff_t len,
> #define FS_DT_REG 8 /* regular file */
> #define FS_DT_LNK 10/* symbolic link */
>
> +#define FS_DIRENT_NAME_LEN 256
> +
> /**
> * struct fs_dirent - directory entry
> *
> @@ -194,7 +196,7 @@ struct fs_dirent {
> /** change_time:time of last modification */
> struct rtc_time change_time;
> /** name: file name */
> - char name[256];
> + char name[FS_DIRENT_NAME_LEN];
> };
>
> /* Note: fs_dir_stream should be treated as opaque to the user of fs
> layer */
> --
> 2.34.1
>
>
[PATCH v2 7/7] video: Use VIDEO_DAMAGE for VIDEO_COPY
CONFIG_VIDEO_COPY implemented a range based copying mechanism: If we print a single character, it will always copy the full range of bytes from the top left corner of the character to the lower right onto the uncached frame buffer. This includes pretty much the full line contents of the printed character. Since we now have proper damage tracking, let's make use of that to reduce the amount of data we need to copy. With this patch applied, we will only copy the tiny rectangle surrounding characters when we print them, speeding up the video console. As a bonus, we remove a lot of code. Signed-off-by: Alexander Graf --- configs/chromebook_coral_defconfig | 1 + configs/chromebook_link_defconfig| 1 + configs/chromebook_samus_defconfig | 1 + configs/minnowmax_defconfig | 1 + configs/sandbox_defconfig| 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + drivers/video/Kconfig| 8 ++- drivers/video/console_normal.c | 14 + drivers/video/console_rotate.c | 37 ++- drivers/video/console_truetype.c | 17 +- drivers/video/vidconsole-uclass.c| 16 - drivers/video/video-uclass.c | 91 drivers/video/video_bmp.c| 7 --- include/video.h | 37 --- include/video_console.h | 49 --- 15 files changed, 44 insertions(+), 238 deletions(-) diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 8269254207..21fb493236 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -113,6 +113,7 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_VIDEO_COPY=y +CONFIG_VIDEO_DAMAGE=y CONFIG_FS_CBFS=y CONFIG_SPL_FS_CBFS=y CONFIG_FAT_WRITE=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 9186621f8d..27578a04c8 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -71,6 +71,7 @@ CONFIG_TPM_TIS_LPC=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_VIDEO_COPY=y +CONFIG_VIDEO_DAMAGE=y CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_FRAMEBUFFER_VESA_MODE_11A=y CONFIG_VIDEO_IVYBRIDGE_IGD=y diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index 93f1d403fa..e913931996 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -75,6 +75,7 @@ CONFIG_TPM_TIS_LPC=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_VIDEO_COPY=y +CONFIG_VIDEO_DAMAGE=y CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_FRAMEBUFFER_VESA_MODE_11A=y CONFIG_TPM=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index c051e00a6a..6a11944d91 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -66,6 +66,7 @@ CONFIG_SPI=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_VIDEO_COPY=y +CONFIG_VIDEO_DAMAGE=y CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_GENERATE_ACPI_TABLE=y # CONFIG_GZIP is not set diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index c509a924e6..a104e9c9b8 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -292,6 +292,7 @@ CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y CONFIG_DM_VIDEO=y CONFIG_VIDEO_COPY=y +CONFIG_VIDEO_DAMAGE=y CONFIG_CONSOLE_ROTATION=y CONFIG_CONSOLE_TRUETYPE=y CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 35894076c5..978e9ca40e 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -200,6 +200,7 @@ CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y CONFIG_DM_VIDEO=y CONFIG_VIDEO_COPY=y +CONFIG_VIDEO_DAMAGE=y CONFIG_DISPLAY=y CONFIG_VIDEO_SEPS525=y CONFIG_LCD=y diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 9e1c409b37..ebcb4f2707 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -54,12 +54,14 @@ config VIDEO_PCI_DEFAULT_FB_SIZE config VIDEO_COPY bool "Enable copying the frame buffer to a hardware copy" - depends on DM_VIDEO + depends on DM_VIDEO && VIDEO_DAMAGE help On some machines (e.g. x86), reading from the frame buffer is very slow because it is uncached. To improve performance, this feature allows the frame buffer to be kept in cached memory (allocated by U-Boot) and then copied to the hardware frame-buffer as needed. + It uses the VIDEO_DAMAGE feature to keep track of regions to copy + and will only copy actually touched regions. To use this, your video driver must set @copy_base in struct video_uc_plat. @@ -74,11 +76,13 @@ config VIDEO_DAMAGE have to flush frame buffer contents from CPU caches into RAM which can be a slow operation. - This patch adds damage tracking to collect information about regions + This
[PATCH v2 5/7] efi_loader: GOP: Add damage notification on BLT
Now that we have a damage tracking API, let's populate damage done by
UEFI payloads when they BLT data onto the screen.
Signed-off-by: Alexander Graf
Reported-by: Da Xue
---
v1 -> v2:
- Remove ifdefs from gop
---
lib/efi_loader/efi_gop.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c
index 2c81859807..ff08e97d93 100644
--- a/lib/efi_loader/efi_gop.c
+++ b/lib/efi_loader/efi_gop.c
@@ -33,6 +33,7 @@ struct efi_gop_obj {
struct efi_gop ops;
struct efi_gop_mode_info info;
struct efi_gop_mode mode;
+ struct udevice *vdev;
/* Fields we only have access to during init */
u32 bpix;
void *fb;
@@ -244,6 +245,9 @@ static __always_inline efi_status_t gop_blt_int(struct
efi_gop *this,
dlineoff += dwidth;
}
+ if (IS_ENABLED(CONFIG_DM_VIDEO))
+ video_damage(gopobj->vdev, dx, dy, width, height);
+
return EFI_SUCCESS;
}
@@ -481,9 +485,9 @@ efi_status_t efi_gop_register(void)
u64 fb_base, fb_size;
void *fb;
efi_status_t ret;
+ struct udevice *vdev = NULL;
#ifdef CONFIG_DM_VIDEO
- struct udevice *vdev;
struct video_priv *priv;
/* We only support a single video output device for now */
@@ -582,6 +586,7 @@ efi_status_t efi_gop_register(void)
gopobj->info.pixels_per_scanline = col;
gopobj->bpix = bpix;
gopobj->fb = fb;
+ gopobj->vdev = vdev;
return EFI_SUCCESS;
}
--
2.32.1 (Apple Git-133)
[PATCH v2 6/7] video: Only dcache flush damaged lines
Now that we have a damage area tells us which parts of the frame buffer
actually need updating, let's only dcache flush those on video_sync()
calls. With this optimization in place, frame buffer updates - especially
on large screen such as 4k displays - speed up significantly.
Signed-off-by: Alexander Graf
Reported-by: Da Xue
---
v1 -> v2:
- Fix dcache range; we were flushing too much before
- Remove ifdefs
---
drivers/video/video-uclass.c | 51 ++--
1 file changed, 43 insertions(+), 8 deletions(-)
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index 66df4c97ef..95126b9bdb 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -223,9 +223,45 @@ int video_damage(struct udevice *vid, int x, int y, int
width, int height)
return 0;
}
+#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
+static void video_flush_dcache(struct udevice *vid)
+{
+ struct video_priv *priv = dev_get_uclass_priv(vid);
+
+ if (!priv->flush_dcache)
+ return;
+
+ if (!CONFIG_IS_ENABLED(VIDEO_DAMAGE)) {
+ flush_dcache_range((ulong)priv->fb,
+ ALIGN((ulong)priv->fb + priv->fb_size,
+CONFIG_SYS_CACHELINE_SIZE));
+
+ return;
+ }
+
+ if (priv->damage.endx && priv->damage.endy) {
+ int lstart = priv->damage.x * VNBYTES(priv->bpix);
+ int lend = priv->damage.endx * VNBYTES(priv->bpix);
+ int y;
+
+ for (y = priv->damage.y; y < priv->damage.endy; y++) {
+ ulong fb = (ulong)priv->fb;
+ ulong start = fb + (y * priv->line_length) + lstart;
+ ulong end = start + lend - lstart;
+
+ start = ALIGN_DOWN(start, CONFIG_SYS_CACHELINE_SIZE);
+ end = ALIGN(end, CONFIG_SYS_CACHELINE_SIZE);
+
+ flush_dcache_range(start, end);
+ }
+ }
+}
+#endif
+
/* Flush video activity to the caches */
int video_sync(struct udevice *vid, bool force)
{
+ struct video_priv *priv = dev_get_uclass_priv(vid);
struct video_ops *ops = video_get_ops(vid);
int ret;
@@ -241,15 +277,8 @@ int video_sync(struct udevice *vid, bool force)
* out whether it exists? For now, ARM is safe.
*/
#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
- struct video_priv *priv = dev_get_uclass_priv(vid);
-
- if (priv->flush_dcache) {
- flush_dcache_range((ulong)priv->fb,
- ALIGN((ulong)priv->fb + priv->fb_size,
-CONFIG_SYS_CACHELINE_SIZE));
- }
+ video_flush_dcache(vid);
#elif defined(CONFIG_VIDEO_SANDBOX_SDL)
- struct video_priv *priv = dev_get_uclass_priv(vid);
static ulong last_sync;
if (force || get_timer(last_sync) > 100) {
@@ -257,6 +286,12 @@ int video_sync(struct udevice *vid, bool force)
last_sync = get_timer(0);
}
#endif
+
+ if (CONFIG_IS_ENABLED(VIDEO_DAMAGE)) {
+ priv->damage.endx = 0;
+ priv->damage.endy = 0;
+ }
+
return 0;
}
--
2.32.1 (Apple Git-133)
[PATCH v2 3/7] vidconsole: Add damage notifications to all vidconsole drivers
Now that we have a damage tracking API, let's populate damage done by vidconsole drivers. We try to declare as little memory as damaged as possible, with the exception of rotated screens that I couldn't get my head wrapped around. On those, we revert to the old behavior and mark the full screen as damaged on every update. Signed-off-by: Alexander Graf Reported-by: Da Xue --- v1 -> v2: - Fix ranges in truetype target - Limit rotate to necessary damange --- drivers/video/console_normal.c | 10 ++ drivers/video/console_rotate.c | 54 drivers/video/console_truetype.c | 15 + 3 files changed, 79 insertions(+) diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c index 04f022491e..5b5586fd3e 100644 --- a/drivers/video/console_normal.c +++ b/drivers/video/console_normal.c @@ -57,6 +57,9 @@ static int console_normal_set_row(struct udevice *dev, uint row, int clr) if (ret) return ret; + video_damage(dev->parent, 0, VIDEO_FONT_HEIGHT * row, vid_priv->xsize, +VIDEO_FONT_HEIGHT); + return 0; } @@ -76,6 +79,9 @@ static int console_normal_move_rows(struct udevice *dev, uint rowdst, if (ret) return ret; + video_damage(dev->parent, 0, VIDEO_FONT_HEIGHT * rowdst, vid_priv->xsize, +VIDEO_FONT_HEIGHT * count); + return 0; } @@ -143,6 +149,10 @@ static int console_normal_putc_xy(struct udevice *dev, uint x_frac, uint y, } line += vid_priv->line_length; } + + video_damage(dev->parent, VID_TO_PIXEL(x_frac), y, VIDEO_FONT_WIDTH, +VIDEO_FONT_HEIGHT); + ret = vidconsole_sync_copy(dev, start, line); if (ret) return ret; diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c index 36c8d0609d..56e20bb4f3 100644 --- a/drivers/video/console_rotate.c +++ b/drivers/video/console_rotate.c @@ -57,6 +57,12 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) if (ret) return ret; + video_damage(dev->parent, +vid_priv->xsize - ((row + 1) * VIDEO_FONT_HEIGHT), +0, +VIDEO_FONT_HEIGHT, +vid_priv->ysize); + return 0; } @@ -83,6 +89,12 @@ static int console_move_rows_1(struct udevice *dev, uint rowdst, uint rowsrc, dst += vid_priv->line_length; } + video_damage(dev->parent, +vid_priv->xsize - ((rowdst + count) * VIDEO_FONT_HEIGHT), +0, +count * VIDEO_FONT_HEIGHT, +vid_priv->ysize); + return 0; } @@ -150,6 +162,12 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, char ch) if (ret) return ret; + video_damage(dev->parent, +vid_priv->xsize - y - VIDEO_FONT_HEIGHT - 1, +linenum - 1, +VIDEO_FONT_HEIGHT, +VIDEO_FONT_WIDTH); + return VID_TO_POS(VIDEO_FONT_WIDTH); } @@ -199,6 +217,12 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) if (ret) return ret; + video_damage(dev->parent, +0, +vid_priv->ysize - (row + 1) * VIDEO_FONT_HEIGHT, +vid_priv->xsize, +VIDEO_FONT_HEIGHT); + return 0; } @@ -218,6 +242,12 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, vidconsole_memmove(dev, dst, src, VIDEO_FONT_HEIGHT * vid_priv->line_length * count); + video_damage(dev->parent, +0, +vid_priv->ysize - (rowdst + count) * VIDEO_FONT_HEIGHT, +vid_priv->xsize, +count * VIDEO_FONT_HEIGHT); + return 0; } @@ -288,6 +318,12 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char ch) if (ret) return ret; + video_damage(dev->parent, +x - VIDEO_FONT_WIDTH, +linenum - VIDEO_FONT_HEIGHT + 1, +VIDEO_FONT_WIDTH, +VIDEO_FONT_HEIGHT); + return VID_TO_POS(VIDEO_FONT_WIDTH); } @@ -335,6 +371,12 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) if (ret) return ret; + video_damage(dev->parent, +row * VIDEO_FONT_HEIGHT, +0, +VIDEO_FONT_HEIGHT, +vid_priv->ysize); + return 0; } @@ -359,6 +401,12 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, dst += vid_priv->line_length; } + video_damage(dev->parent,
[PATCH v2 4/7] video: Add damage notification on bmp display
Let's report the video damage when we draw a bitmap on the screen. This way we can later lazily flush only relevant regions to hardware. Signed-off-by: Alexander Graf Reported-by: Da Xue --- drivers/video/video_bmp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c index 4d2d961696..da8a7b3701 100644 --- a/drivers/video/video_bmp.c +++ b/drivers/video/video_bmp.c @@ -416,6 +416,8 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, break; }; + video_damage(dev, x, y, width, height); + /* Find the position of the top left of the image in the framebuffer */ fb = (uchar *)(priv->fb + y * priv->line_length + x * bpix / 8); ret = video_sync_copy(dev, start, fb); -- 2.32.1 (Apple Git-133)
[PATCH v2 1/7] dm: video: Add damage tracking API
We are going to introduce image damage tracking to fasten up screen
refresh on large displays. This patch adds damage tracking for up to
one rectangle of the screen which is typically enough to hold blt or
text print updates. Callers into this API and a reduced dcache flush
code path will follow in later patches.
Signed-off-by: Alexander Graf
Reported-by: Da Xue
---
v1 -> v2:
- Remove ifdefs
---
drivers/video/Kconfig| 15 +
drivers/video/video-uclass.c | 41
include/video.h | 29 +++--
3 files changed, 83 insertions(+), 2 deletions(-)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 965b587927..9e1c409b37 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -64,6 +64,21 @@ config VIDEO_COPY
To use this, your video driver must set @copy_base in
struct video_uc_plat.
+config VIDEO_DAMAGE
+ bool "Enable damage tracking of frame buffer regions"
+ depends on DM_VIDEO
+ default y if ARM && !SYS_DCACHE_OFF
+ help
+ On some machines (most ARM), the display frame buffer resides in
+ RAM. To make the display controller pick up screen updates, we
+ have to flush frame buffer contents from CPU caches into RAM which
+ can be a slow operation.
+
+ This patch adds damage tracking to collect information about regions
+ that received updates. When we want to sync, we then only flush
+ regions of the frame buffer that were modified before, speeding up
+ screen refreshes significantly.
+
config BACKLIGHT_PWM
bool "Generic PWM based Backlight Driver"
depends on BACKLIGHT && DM_PWM
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index 01e8af5ac6..17793490d1 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -21,6 +21,8 @@
#include
#include
#include
+#include
+#include
#ifdef CONFIG_SANDBOX
#include
#endif
@@ -180,6 +182,45 @@ void video_set_default_colors(struct udevice *dev, bool
invert)
priv->colour_bg = vid_console_color(priv, back);
}
+/* Notify about changes in the frame buffer */
+int video_damage(struct udevice *vid, int x, int y, int width, int height)
+{
+ struct video_priv *priv = dev_get_uclass_priv(vid);
+ int endx = x + width;
+ int endy = y + height;
+
+ if (!CONFIG_IS_ENABLED(VIDEO_DAMAGE))
+ return 0;
+
+ if (x > priv->xsize)
+ return 0;
+
+ if (y > priv->ysize)
+ return 0;
+
+ if (endx > priv->xsize)
+ endx = priv->xsize;
+
+ if (endy > priv->ysize)
+ endy = priv->ysize;
+
+ if (priv->damage.endx && priv->damage.endy) {
+ /* Span a rectangle across all old and new damage */
+ priv->damage.x = min(x, priv->damage.x);
+ priv->damage.y = min(y, priv->damage.y);
+ priv->damage.endx = max(endx, priv->damage.endx);
+ priv->damage.endy = max(endy, priv->damage.endy);
+ } else {
+ /* First damage, setting the rectangle to span it */
+ priv->damage.x = x;
+ priv->damage.y = y;
+ priv->damage.endx = endx;
+ priv->damage.endy = endy;
+ }
+
+ return 0;
+}
+
/* Flush video activity to the caches */
int video_sync(struct udevice *vid, bool force)
{
diff --git a/include/video.h b/include/video.h
index 43e2c89977..acb65d70a2 100644
--- a/include/video.h
+++ b/include/video.h
@@ -109,6 +109,12 @@ struct video_priv {
void *fb;
int fb_size;
void *copy_fb;
+ struct {
+ int x;
+ int y;
+ int endx;
+ int endy;
+ } damage;
int line_length;
u32 colour_fg;
u32 colour_bg;
@@ -167,8 +173,9 @@ int video_clear(struct udevice *dev);
* @return: 0 on success, error code otherwise
*
* Some frame buffers are cached or have a secondary frame buffer. This
- * function syncs these up so that the current contents of the U-Boot frame
- * buffer are displayed to the user.
+ * function syncs the damaged parts of them up so that the current contents
+ * of the U-Boot frame buffer are displayed to the user. It clears the damage
+ * buffer.
*/
int video_sync(struct udevice *vid, bool force);
@@ -268,6 +275,24 @@ static inline int video_sync_copy_all(struct udevice *dev)
#endif
+/**
+ * video_damage() - Notify the video subsystem about screen updates.
+ *
+ * @vid: Device to sync
+ * @x: Upper left X coordinate of the damaged rectangle
+ * @y: Upper left Y coordinate of the damaged rectangle
+ * @width: Width of the damaged rectangle
+ * @height:Height of the damaged rectangle
+ *
+ * @return: 0
+ *
+ * Some frame buffers are cached or have a secondary frame buffer. This
+ * function
[PATCH v2 2/7] dm: video: Add damage notification on display clear
Let's report the video damage when we clear the screen. This way we can later lazily flush only relevant regions to hardware. Signed-off-by: Alexander Graf Reported-by: Da Xue --- drivers/video/video-uclass.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index 17793490d1..66df4c97ef 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -153,6 +153,8 @@ int video_clear(struct udevice *dev) if (ret) return ret; + video_damage(dev, 0, 0, priv->xsize, priv->ysize); + return video_sync(dev, false); } -- 2.32.1 (Apple Git-133)
[PATCH v2 0/7] Add video damage tracking
This patch set speeds up graphics output on ARM by a factor of 60x. On most ARM SBCs, we keep the frame buffer in DRAM and map it as cached, but need it accessible by the display controller which reads directly from a later point of consistency. Hence, we flush the frame buffer to DRAM on every change. The full frame buffer. Unfortunately, with the advent of 4k displays, we are seeing frame buffers that can take a while to flush out. This was reported by Da Xue with grub, which happily print 1000s of spaces on the screen to draw a menu. Every printed space triggers a cache flush. This patch set implements the easiest mitigation against this problem: Damage tracking. We remember the lowest common denominator region that was touched since the last video_sync() call and only flush that. The most typical writer to the frame buffer is the video console, which always writes rectangles of characters on the screen and syncs afterwards. With this patch set applied, we reduce drawing a large grub menu (with serial console attached for size information) on an RK3399-ROC system at 1440p from 55 seconds to less than 1 second. Version 2 also implements VIDEO_COPY using this mechanism, reducing its overhead compared to before as well. So even x86 systems should be faster with this now :). Alternatives considered: 1) Lazy sync - Sandbox does this. It only calls video_sync(true) ever so often. We are missing timers to do this generically. 2) Double buffering - We could try to identify whether anything changed at all and only draw to the FB if it did. That would require maintaining a second buffer that we need to scan. 3) Text buffer - Maintain a buffer of all text printed on the screen with respective location. Don't write if the old and new character are identical. This would limit applicability to text only and is an optimization on top of this patch set. 4) Hash screen lines - Create a hash (sha256?) over every line when it changes. Only flush when it does. I'm not sure if this would waste more time, memory and cache than the current approach. It would make full screen updates much more expensive. v1 -> v2: - new patch: video: Use VIDEO_DAMAGE for VIDEO_COPY - Remove ifdefs - Fix dcache range; we were flushing too much before - Fix ranges in truetype target - Limit rotate to necessary damange Alexander Graf (7): dm: video: Add damage tracking API dm: video: Add damage notification on display clear vidconsole: Add damage notifications to all vidconsole drivers video: Add damage notification on bmp display efi_loader: GOP: Add damage notification on BLT video: Only dcache flush damaged lines video: Use VIDEO_DAMAGE for VIDEO_COPY configs/chromebook_coral_defconfig | 1 + configs/chromebook_link_defconfig| 1 + configs/chromebook_samus_defconfig | 1 + configs/minnowmax_defconfig | 1 + configs/sandbox_defconfig| 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + drivers/video/Kconfig| 21 ++- drivers/video/console_normal.c | 22 ++-- drivers/video/console_rotate.c | 87 - drivers/video/console_truetype.c | 30 +++-- drivers/video/vidconsole-uclass.c| 16 --- drivers/video/video-uclass.c | 185 --- drivers/video/video_bmp.c| 7 +- include/video.h | 54 +++- include/video_console.h | 49 --- lib/efi_loader/efi_gop.c | 7 +- 16 files changed, 247 insertions(+), 237 deletions(-) -- 2.32.1 (Apple Git-133)
Re: [PATCH v2 2/2] ARM: imx: imx8mn-evk: use one common u-boot.dtsi for the evk boards
Hi Tim, Hi Simon,
[SNIP]
>
> Heiko,
>
> You can add multi-dtb support to this so that it's usable by the other
> imx8mn boards with the following:
> diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi
> index 7b591085a0be..af6697b1efbc 100644
> --- a/arch/arm/dts/imx8mn-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mn-u-boot.dtsi
> @@ -38,6 +38,7 @@
>
> fit {
> description = "Configuration to load ATF before
> U-Boot";
> + fit,fdt-list = "of-list";
> #address-cells = <1>;
> fit,external-offset = ;
>
> @@ -67,7 +68,7 @@
> };
> };
>
> - fdt {
> + @fdt-SEQ {
> description = "NAME";
> type = "flat_dt";
> compression = "none";
> @@ -79,13 +80,13 @@
> };
>
> configurations {
> - default = "conf";
> + default = "@config-DEFAULT-SEQ";
>
> - conf {
> + binman_configuration: @config-SEQ {
> description = "NAME";
> firmware = "uboot";
> loadables = "atf";
> - fdt = "fdt";
> + fdt = "fdt-SEQ";
> };
> };
> };
>
> I don't mind sending this as a follow-up to your patch here.
Since this patch moves the parts from the 2 imx8mn-evk boards to one
"common" file it would be better to do more changes on that in a
separate patch.
> It looks like there are only the following boards in mainline that
> would benefit from using this shared include:
> imx8mn-beacon-kit-u-boot.dtsi
> imx8mn-var-som-symphony-u-boot.dtsi
> imx8mn-venice-u-boot.dtsi
>
> Have you compared the binman portions of imx8m{m,n,p}-u-boot.dtsi?
No not yet.
> There are a lot of differences due to different property ordering and
> label/node naming conventions. I would like to see these normalized
> but i'm not clear which is the best example to normalize to.
> Specifically I don't know:
> 1. what is the convention for property ordering in dt... is it simply
> alphabetical order?
> 2. have we settled on a convention for the blob naming, if so what is
> the best example?
I am not aware that there is a conventional here. But maybe simon can
give some hints here.
--
Heiko
--
Heiko
Re: [PATCH v2 2/2] ARM: imx: imx8mn-evk: use one common u-boot.dtsi for the evk boards
On Thu, Jun 9, 2022 at 1:50 PM Heiko Thiery wrote:
>
> To have only one place to describe the binman images us the
> imx8mn-u-boot.dtsi. To have support for different DDR firmwares this
> nodes are included dependent on the used DDR config option.
>
> Signed-off-by: Heiko Thiery
> Reviewed-by: Fabio Estevam
> ---
> v2: sync with current master and fix merge conflict
>
> arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 125 +-
> arch/arm/dts/imx8mn-evk-u-boot.dtsi | 120 +
> arch/arm/dts/imx8mn-u-boot.dtsi | 156 +++
> 3 files changed, 159 insertions(+), 242 deletions(-)
> create mode 100644 arch/arm/dts/imx8mn-u-boot.dtsi
>
> diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> index 4d0ecb07d4..3d0e817313 100644
> --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> @@ -3,11 +3,9 @@
> * Copyright 2019, 2021 NXP
> */
>
> -/ {
> - binman: binman {
> - multiple-images;
> - };
> +#include "imx8mn-u-boot.dtsi"
>
> +/ {
> wdt-reboot {
> compatible = "wdt-reboot";
> wdt = <>;
> @@ -143,122 +141,3 @@
> {
> u-boot,dm-spl;
> };
> -
> - {
> -u-boot-spl-ddr {
> - filename = "u-boot-spl-ddr.bin";
> - pad-byte = <0xff>;
> - align-size = <4>;
> - align = <4>;
> -
> - u-boot-spl {
> - align-end = <4>;
> - };
> -
> - blob_1: blob-ext@1 {
> - filename = "ddr4_imem_1d_201810.bin";
> - size = <0x8000>;
> - };
> -
> - blob_2: blob-ext@2 {
> - filename = "ddr4_dmem_1d_201810.bin";
> - size = <0x4000>;
> - };
> -
> - blob_3: blob-ext@3 {
> - filename = "ddr4_imem_2d_201810.bin";
> - size = <0x8000>;
> - };
> -
> - blob_4: blob-ext@4 {
> - filename = "ddr4_dmem_2d_201810.bin";
> - size = <0x4000>;
> - };
> - };
> -
> -
> - spl {
> - filename = "spl.bin";
> -
> - mkimage {
> - args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
> 0x912000";
> -
> - blob {
> - filename = "u-boot-spl-ddr.bin";
> - };
> - };
> - };
> -
> - itb {
> - filename = "u-boot.itb";
> -
> - fit {
> - description = "Configuration to load ATF before
> U-Boot";
> - #address-cells = <1>;
> - fit,external-offset = ;
> -
> - images {
> - uboot {
> - description = "U-Boot (64-bit)";
> - type = "standalone";
> - arch = "arm64";
> - compression = "none";
> - load = ;
> -
> - uboot_blob: blob-ext {
> - filename = "u-boot-nodtb.bin";
> - };
> - };
> -
> - atf {
> - description = "ARM Trusted Firmware";
> - type = "firmware";
> - arch = "arm64";
> - compression = "none";
> - load = <0x96>;
> - entry = <0x96>;
> -
> - atf_blob: blob-ext {
> - filename = "bl31.bin";
> - };
> - };
> -
> - fdt {
> - description = "NAME";
> - type = "flat_dt";
> - compression = "none";
> -
> - uboot_fdt_blob: blob-ext {
> - filename = "u-boot.dtb";
> - };
> - };
> - };
> -
> - configurations {
> - default = "conf";
> -
> - conf {
> - description = "NAME";
> - firmware = "uboot";
> - loadables = "atf";
> -
Re: [PATCH 0/6] Add video damage tracking
On 09.06.22 22:32, Heinrich Schuchardt wrote: Am 9. Juni 2022 21:04:37 MESZ schrieb Alexander Graf : On 07.06.22 10:28, Heinrich Schuchardt wrote: On 6/7/22 01:43, Alexander Graf wrote: This patch set speeds up graphics output on ARM by a factor of 60x. On most ARM SBCs, we keep the frame buffer in DRAM and map it as cached, but need it accessible by the display controller which reads directly from a later point of consistency. Hence, we flush the frame buffer to DRAM on every change. The full frame buffer. Isn't a similar problem already solved by CONFIG_VIDEO_COPY? Leaving the frame buffer uncached would convert the ARM problem into the X86 case? It solves a similar problem, yes. However, it requires us to allocate the frame buffer size twice, and we would need to dynamically toggle the MMU mappings of the frame buffer to WC instead of cached. That's code we don't have today. VIDEO_COPY is also terribly inefficient in the most common case: Drawing one or multiple characters. It basically copies every line that contains the character, for every character printed. The damage code in this patch set only flushes the relevant rectangles after a string is fully printed. I think overall, damage tracking with cached memory is simple enough that it gives us the best of all worlds. Unfortunately, with the advent of 4k displays, we are seeing frame buffers that can take a while to flush out. This was reported by Da Xue with grub, which happily print 1000s of spaces on the screen to draw a menu. Every printed space triggers a cache flush. This patch set implements the easiest mitigation against this problem: Damage tracking. We remember the lowest common denominator region that was touched since the last video_sync() call and only flush that. If by "lowest common denominator region" you should mean a rectangle, drawing a point in the upper left corner and another in the lower right corner would require a full flush. So nothing gained in this case. Glad you asked! :) While theoretically possible, this is a case that just never happens in U-Boot's code flow. All code that draws to the screen is either blt based (like gop, character drawing or logo display) or moves large portions of the screen (scrolling). The largest granularity we have between syncs is when printing strings. So the worst case you'll have today is a wrap around where you'd end up flushing full lines. With this patch set applied, we reduce drawing a large grub menu (with serial console attached for size information) on an RK3399-ROC system at 1440p from 55 seconds to less than 1 second. Alternatives considered: 1) Lazy sync - Sandbox does this. It only calls video_sync(true) ever so often. We are missing timers to do this generically. 2) Double buffering - We could try to identify whether anything changed at all and only draw to the FB if it did. That would require maintaining a second buffer that we need to scan. 3) Text buffer - Maintain a buffer of all text printed on the screen with respective location. Don't write if the old and new character are identical. This would limit applicability to text only and is an optimization on top of this patch set. 4) Hash screen lines - Create a hash (sha256?) over every line when it changes. Only flush when it does. I'm not sure if this would waste more time, memory and cache than the current approach. It would make full screen updates much more expensive. Alexander Graf (6): dm: video: Add damage tracking API dm: video: Add damage notification on display clear vidconsole: Add damage notifications to all vidconsole drivers video: Add damage notification on bmp display efi_loader: GOP: Add damage notification on BLT video: Only dcache flush damaged lines We need documentation describing the difference between CONFIG_VIDEO_COPY and CONFIG_VIDEO_DAMAGE. Hm, maybe we should implement CONFIG_VIDEO_COPY as a flush mechanism behind CONFIG_VIDEO_DAMAGE? That way we only have a single code path for producers left and in addition also optimize drawing individual characters. It would also make the feature useful beyond ARM dcache flushing. Please, consider that RISC-V has no instruction for flushing the data cache. So CONFIG_VIDEO_DAMAGE is not applicable. I think we'll have to see what SoCs people come up with. My hope would be that anything that shares DRAM between the display IP block and the CPU speaks on a fully cache coherent bus. Then you don't need any of this trickery. Alex
[PATCH v2 2/2] ARM: imx: imx8mn-evk: use one common u-boot.dtsi for the evk boards
To have only one place to describe the binman images us the
imx8mn-u-boot.dtsi. To have support for different DDR firmwares this
nodes are included dependent on the used DDR config option.
Signed-off-by: Heiko Thiery
Reviewed-by: Fabio Estevam
---
v2: sync with current master and fix merge conflict
arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 125 +-
arch/arm/dts/imx8mn-evk-u-boot.dtsi | 120 +
arch/arm/dts/imx8mn-u-boot.dtsi | 156 +++
3 files changed, 159 insertions(+), 242 deletions(-)
create mode 100644 arch/arm/dts/imx8mn-u-boot.dtsi
diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
index 4d0ecb07d4..3d0e817313 100644
--- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
@@ -3,11 +3,9 @@
* Copyright 2019, 2021 NXP
*/
-/ {
- binman: binman {
- multiple-images;
- };
+#include "imx8mn-u-boot.dtsi"
+/ {
wdt-reboot {
compatible = "wdt-reboot";
wdt = <>;
@@ -143,122 +141,3 @@
{
u-boot,dm-spl;
};
-
- {
-u-boot-spl-ddr {
- filename = "u-boot-spl-ddr.bin";
- pad-byte = <0xff>;
- align-size = <4>;
- align = <4>;
-
- u-boot-spl {
- align-end = <4>;
- };
-
- blob_1: blob-ext@1 {
- filename = "ddr4_imem_1d_201810.bin";
- size = <0x8000>;
- };
-
- blob_2: blob-ext@2 {
- filename = "ddr4_dmem_1d_201810.bin";
- size = <0x4000>;
- };
-
- blob_3: blob-ext@3 {
- filename = "ddr4_imem_2d_201810.bin";
- size = <0x8000>;
- };
-
- blob_4: blob-ext@4 {
- filename = "ddr4_dmem_2d_201810.bin";
- size = <0x4000>;
- };
- };
-
-
- spl {
- filename = "spl.bin";
-
- mkimage {
- args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
0x912000";
-
- blob {
- filename = "u-boot-spl-ddr.bin";
- };
- };
- };
-
- itb {
- filename = "u-boot.itb";
-
- fit {
- description = "Configuration to load ATF before U-Boot";
- #address-cells = <1>;
- fit,external-offset = ;
-
- images {
- uboot {
- description = "U-Boot (64-bit)";
- type = "standalone";
- arch = "arm64";
- compression = "none";
- load = ;
-
- uboot_blob: blob-ext {
- filename = "u-boot-nodtb.bin";
- };
- };
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- load = <0x96>;
- entry = <0x96>;
-
- atf_blob: blob-ext {
- filename = "bl31.bin";
- };
- };
-
- fdt {
- description = "NAME";
- type = "flat_dt";
- compression = "none";
-
- uboot_fdt_blob: blob-ext {
- filename = "u-boot.dtb";
- };
- };
- };
-
- configurations {
- default = "conf";
-
- conf {
- description = "NAME";
- firmware = "uboot";
- loadables = "atf";
- fdt = "fdt";
- };
- };
- };
- };
-
- imx-boot {
- filename = "flash.bin";
- pad-byte = <0x00>;
-
- spl: blob-ext@1 {
- offset = <0x0>;
-
[PATCH v2 1/2] ARM: imx: imx8mn-evk: generate a single bootable flash.bin
To have a flash.bin file that also contains the U-Boot and TF-A/ATF
create this like already done for other imx8 boards.
Signed-off-by: Heiko Thiery
Reviewed-by: Fabio Estevam
Reviewed-by: Peng Fan
---
v2: sync with current master and fix merge conflict
arch/arm/dts/imx8mn-evk-u-boot.dtsi | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
index 3db46d4cbc..d1427941eb 100644
--- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
@@ -58,7 +58,9 @@
};
- flash {
+ spl {
+ filename = "spl.bin";
+
mkimage {
args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
0x912000";
@@ -125,4 +127,19 @@
};
};
};
+
+ imx-boot {
+ filename = "flash.bin";
+ pad-byte = <0x00>;
+
+ spl: blob-ext@1 {
+ offset = <0x0>;
+ filename = "spl.bin";
+ };
+
+ uboot: blob-ext@2 {
+ offset = <0x58000>;
+ filename = "u-boot.itb";
+ };
+ };
};
--
2.20.1
Re: [PATCH 0/6] Add video damage tracking
Am 9. Juni 2022 21:04:37 MESZ schrieb Alexander Graf : > >On 07.06.22 10:28, Heinrich Schuchardt wrote: >> On 6/7/22 01:43, Alexander Graf wrote: >>> This patch set speeds up graphics output on ARM by a factor of 60x. >>> >>> On most ARM SBCs, we keep the frame buffer in DRAM and map it as cached, >>> but need it accessible by the display controller which reads directly >>> from a later point of consistency. Hence, we flush the frame buffer to >>> DRAM on every change. The full frame buffer. >> >> Isn't a similar problem already solved by CONFIG_VIDEO_COPY? >> >> Leaving the frame buffer uncached would convert the ARM problem into the >> X86 case? > > >It solves a similar problem, yes. However, it requires us to allocate the >frame buffer size twice, and we would need to dynamically toggle the MMU >mappings of the frame buffer to WC instead of cached. That's code we don't >have today. > >VIDEO_COPY is also terribly inefficient in the most common case: Drawing one >or multiple characters. It basically copies every line that contains the >character, for every character printed. The damage code in this patch set only >flushes the relevant rectangles after a string is fully printed. > >I think overall, damage tracking with cached memory is simple enough that it >gives us the best of all worlds. > > >> >>> >>> Unfortunately, with the advent of 4k displays, we are seeing frame buffers >>> that can take a while to flush out. This was reported by Da Xue with grub, >>> which happily print 1000s of spaces on the screen to draw a menu. Every >>> printed space triggers a cache flush. >>> >>> This patch set implements the easiest mitigation against this problem: >>> Damage tracking. We remember the lowest common denominator region that was >>> touched since the last video_sync() call and only flush that. >> >> If by "lowest common denominator region" you should mean a rectangle, >> drawing a point in the upper left corner and another in the lower right >> corner would require a full flush. So nothing gained in this case. > > >Glad you asked! :) > >While theoretically possible, this is a case that just never happens in >U-Boot's code flow. All code that draws to the screen is either blt based >(like gop, character drawing or logo display) or moves large portions of the >screen (scrolling). The largest granularity we have between syncs is when >printing strings. So the worst case you'll have today is a wrap around where >you'd end up flushing full lines. > > >> >>> >>> With this patch set applied, we reduce drawing a large grub menu (with >>> serial console attached for size information) on an RK3399-ROC system >>> at 1440p from 55 seconds to less than 1 second. >>> >>> >>> Alternatives considered: >>> >>> 1) Lazy sync - Sandbox does this. It only calls video_sync(true) ever >>> so often. We are missing timers to do this generically. >>> >>> 2) Double buffering - We could try to identify whether anything changed >>> at all and only draw to the FB if it did. That would require >>> maintaining a second buffer that we need to scan. >>> >>> 3) Text buffer - Maintain a buffer of all text printed on the screen with >>> respective location. Don't write if the old and new character are >>> identical. This would limit applicability to text only and is an >>> optimization on top of this patch set. >>> >>> 4) Hash screen lines - Create a hash (sha256?) over every line when it >>> changes. Only flush when it does. I'm not sure if this would waste >>> more time, memory and cache than the current approach. It would make >>> full screen updates much more expensive. >>> >>> Alexander Graf (6): >>> dm: video: Add damage tracking API >>> dm: video: Add damage notification on display clear >>> vidconsole: Add damage notifications to all vidconsole drivers >>> video: Add damage notification on bmp display >>> efi_loader: GOP: Add damage notification on BLT >>> video: Only dcache flush damaged lines >> >> We need documentation describing the difference between >> CONFIG_VIDEO_COPY and CONFIG_VIDEO_DAMAGE. > > >Hm, maybe we should implement CONFIG_VIDEO_COPY as a flush mechanism behind >CONFIG_VIDEO_DAMAGE? That way we only have a single code path for producers >left and in addition also optimize drawing individual characters. It would >also make the feature useful beyond ARM dcache flushing. Please, consider that RISC-V has no instruction for flushing the data cache. So CONFIG_VIDEO_DAMAGE is not applicable. Best regards Heinrich > > >Alex > >
Re: [PATCH v2] cmd: cat: add new command
On Wednesday, June 8th, 2022 at 15:59, Tom Rini wrote: > On Sat, Jun 04, 2022 at 11:19:15AM +, Roger Knecht wrote: > > > Add cat command to print file content to standard out > > > > Signed-off-by: Roger Knecht rkne...@pm.me > > --- > > v2: > > - Moved cat from boot to shell commands > > - Added MAINTAINERS entry > > - Added comments > > - Improved variable naming > > > > MAINTAINERS | 5 + > > cmd/Kconfig | 6 ++ > > cmd/Makefile | 1 + > > cmd/cat.c | 58 > > 4 files changed, 70 insertions(+) > > create mode 100644 cmd/cat.c > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > index 56be0bfad0..7c5cd178d9 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -729,6 +729,11 @@ M: Simon Glass s...@chromium.org > > S: Maintained > > F: tools/buildman/ > > > > +CAT > > +M: Roger Knecht rkne...@pm.me > > +S: Maintained > > +F: cmd/cat.c > > + > > CFI FLASH > > M: Stefan Roese s...@denx.de > > S: Maintained > > diff --git a/cmd/Kconfig b/cmd/Kconfig > > index 69c1814d24..8b531c7ebe 100644 > > --- a/cmd/Kconfig > > +++ b/cmd/Kconfig > > @@ -1492,6 +1492,12 @@ endmenu > > > > menu "Shell scripting commands" > > > > +config CMD_CAT > > + bool "cat" > > + default y > > > New commands shouldn't be default enabled. I also don't see a test. > Please add a test, and enable the command in sandbox so the test is run. > Thanks! Thanks for the review. Will be fixed in the next version. Roger
[PATCH v2] kontron-sl-mx8mm: Add CAAM support
Add CAAM support, which is required when enabling HAB secure boot.
Select CONFIG_SPL_DRIVERS_MISC so that CONFIG_IMX_HAB could
build successfully, if selected.
Signed-off-by: Fabio Estevam
---
Changes since v1:
- Do not disable sec_jr0 node in -u-boot.dtsi. This will get disabled
by the imx8mm.dtsi. Sent a patch upstream doing this. (Andrey)
arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi | 16
arch/arm/mach-imx/imx8m/Kconfig | 3 +++
board/kontron/sl-mx8mm/spl.c | 9 +
configs/kontron-sl-mx8mm_defconfig| 1 +
4 files changed, 29 insertions(+)
diff --git a/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi
b/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi
index 22d18e6f1c..65ff3988d9 100644
--- a/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-kontron-n801x-u-boot.dtsi
@@ -25,6 +25,22 @@
};
};
+ {
+ u-boot,dm-spl;
+};
+
+_jr0 {
+ u-boot,dm-spl;
+};
+
+_jr1 {
+ u-boot,dm-spl;
+};
+
+_jr2 {
+ u-boot,dm-spl;
+};
+
{
phy-mode = "rgmii-rxid";
};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 61397bf88d..5c59422ecb 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -106,6 +106,9 @@ config TARGET_KONTRON_MX8MM
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
+ select FSL_CAAM
+ select ARCH_MISC_INIT
+ select SPL_CRYPTO if SPL
config TARGET_IMX8MN_BSH_SMM_S2
bool "imx8mn-bsh-smm-s2"
diff --git a/board/kontron/sl-mx8mm/spl.c b/board/kontron/sl-mx8mm/spl.c
index 4ef03c8c17..5a513722c5 100644
--- a/board/kontron/sl-mx8mm/spl.c
+++ b/board/kontron/sl-mx8mm/spl.c
@@ -13,6 +13,9 @@
#include
#include
#include
+#include
+#include
+#include
#include
#include
#include
@@ -213,6 +216,12 @@ void spl_board_init(void)
struct udevice *dev;
int ret;
+ if (IS_ENABLED(CONFIG_FSL_CAAM)) {
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(caam_jr), );
+ if (ret)
+ printf("Failed to initialize %s: %d\n", dev->name, ret);
+ }
+
puts("Normal Boot\n");
ret = uclass_get_device_by_name(UCLASS_CLK,
diff --git a/configs/kontron-sl-mx8mm_defconfig
b/configs/kontron-sl-mx8mm_defconfig
index 2e9d52522b..eae9ac0dbe 100644
--- a/configs/kontron-sl-mx8mm_defconfig
+++ b/configs/kontron-sl-mx8mm_defconfig
@@ -16,6 +16,7 @@ CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_KONTRON_MX8MM=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x4200
--
2.25.1
Re: [EXT] RE: [PATCH] i.MX8M: crypto: disable JR0 in SPL, U-Boot
Hi Gaurav, On Thu, Jun 9, 2022 at 10:12 AM Gaurav Jain wrote: > > I suggest that this is submitted into Kernel, and then picked up during the > > next > > DTB re-sync. > > Ok. Fabio has already submitted a patch for this. Yes, if you have a chance please send your Tested-by or Reviewed-by to that patch. Thanks
Re: [PATCH] kontron-sl-mx8mm: Add CAAM support
Hi Andrey,
On Wed, Jun 8, 2022 at 6:43 PM ZHIZHIKIN Andrey
wrote:
> > +_jr0 {
> > + u-boot,dm-spl;
> > + status = "disabled";
>
> If this board is supported by upstream Kernel, then perhaps this
> reservation shall be included there before, and then sync'd back
> into U-Boot?
Yes, this board is supported by the upstream kernel.
I can remove the status = "disabled" line from this patch and send a v2.
BTW, if you have a chance please send your Tested-by or Reviewed-by
patch to my imx8m kernel patch
that disables sec_jr0.
Thanks
> This is similar to what EVKs from NXP are undergoing now, with your
> help of up-steaming Kernel DTB changes in front of U-Boot DTB ones.
>
> > +};
> > +
> > +_jr1 {
> > + u-boot,dm-spl;
> > +};
> > +
> > +_jr2 {
> > + u-boot,dm-spl;
> > +};
> > +
> > {
> > phy-mode = "rgmii-rxid";
> > };
> > diff --git a/arch/arm/mach-imx/imx8m/Kconfig
> > b/arch/arm/mach-imx/imx8m/Kconfig
> > index 61397bf88d13..5c59422ecb79 100644
> > --- a/arch/arm/mach-imx/imx8m/Kconfig
> > +++ b/arch/arm/mach-imx/imx8m/Kconfig
> > @@ -106,6 +106,9 @@ config TARGET_KONTRON_MX8MM
> > select IMX8MM
> > select SUPPORT_SPL
> > select IMX8M_LPDDR4
> > + select FSL_CAAM
> > + select ARCH_MISC_INIT
> > + select SPL_CRYPTO if SPL
> >
> > config TARGET_IMX8MN_BSH_SMM_S2
> > bool "imx8mn-bsh-smm-s2"
> > diff --git a/board/kontron/sl-mx8mm/spl.c b/board/kontron/sl-mx8mm/spl.c
> > index 4ef03c8c172f..5a513722c5d5 100644
> > --- a/board/kontron/sl-mx8mm/spl.c
> > +++ b/board/kontron/sl-mx8mm/spl.c
> > @@ -13,6 +13,9 @@
> > #include
> > #include
> > #include
> > +#include
> > +#include
> > +#include
> > #include
> > #include
> > #include
> > @@ -213,6 +216,12 @@ void spl_board_init(void)
> > struct udevice *dev;
> > int ret;
> >
> > + if (IS_ENABLED(CONFIG_FSL_CAAM)) {
> > + ret = uclass_get_device_by_driver(UCLASS_MISC,
> > DM_DRIVER_GET(caam_jr), );
> > + if (ret)
> > + printf("Failed to initialize %s: %d\n", dev->name,
> > ret);
> > + }
> > +
> > puts("Normal Boot\n");
> >
> > ret = uclass_get_device_by_name(UCLASS_CLK,
> > diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-
> > mx8mm_defconfig
> > index 2e9d52522b21..eae9ac0dbebf 100644
> > --- a/configs/kontron-sl-mx8mm_defconfig
> > +++ b/configs/kontron-sl-mx8mm_defconfig
> > @@ -16,6 +16,7 @@ CONFIG_SPL_TEXT_BASE=0x7E1000
> > CONFIG_TARGET_KONTRON_MX8MM=y
> > CONFIG_SPL_MMC=y
> > CONFIG_SPL_SERIAL=y
> > +CONFIG_SPL_DRIVERS_MISC=y
> > CONFIG_BOOTCOUNT_BOOTLIMIT=3
> > CONFIG_SPL=y
> > CONFIG_SYS_LOAD_ADDR=0x4200
> > --
> > 2.25.1
>
> Regards,
> Andrey
>
Re: [PATCH 0/6] Add video damage tracking
> Date: Thu, 9 Jun 2022 21:04:37 +0200 > From: Alexander Graf > > On 07.06.22 10:28, Heinrich Schuchardt wrote: > > On 6/7/22 01:43, Alexander Graf wrote: > >> This patch set speeds up graphics output on ARM by a factor of 60x. > >> > >> On most ARM SBCs, we keep the frame buffer in DRAM and map it as cached, > >> but need it accessible by the display controller which reads directly > >> from a later point of consistency. Hence, we flush the frame buffer to > >> DRAM on every change. The full frame buffer. > > > > Isn't a similar problem already solved by CONFIG_VIDEO_COPY? > > > > Leaving the frame buffer uncached would convert the ARM problem into the > > X86 case? > > > It solves a similar problem, yes. However, it requires us to allocate > the frame buffer size twice, and we would need to dynamically toggle the > MMU mappings of the frame buffer to WC instead of cached. That's code we > don't have today. For the Apple M1 the framebuffer is covered by the "memory map" and maps it as Normal-NC, but that is because the framebuffer is already set up at the point where u-boot takes control.
Re: [PATCH v4 01/16] sandbox: net: Add aliases for ethernet devices
On Thu, May 05, 2022 at 01:11:30PM -0400, Sean Anderson wrote:
> Commit f3dd213e15 ("net: introduce helpers to get PHY ofnode from MAC")
> changed the ethernet sequence assignment from
>
> uclass 36: ethernet
> 0 * eth@10002000 @ 05813460, seq 0
> 1 * eth@10003000 @ 05813550, seq 5
> 2 * sbe5 @ 05813640, seq 3
> 3 * eth@10004000 @ 05813730, seq 6
> 4 * dsa-test-eth @ 05813820, seq 4
> 5 * lan0 @ 05813a30, seq 2
> 6 * lan1 @ 05813b50, seq 7
>
> to
>
> uclass 36: ethernet
> 0 * eth@10002000 @ 03813630, seq 0
> 1 * eth@10003000 @ 03813720, seq 5
> 2 * sbe5 @ 03813810, seq 3
> 3 * eth@10004000 @ 03813900, seq 6
> 4 phy-test-eth @ 038139f0, seq 7
> 5 * dsa-test-eth @ 03813ae0, seq 4
> 6 * lan0 @ 03813cf0, seq 2
> 7 * lan1 @ 03813e10, seq 8
>
> This caused the mac address assignment to switch around. Avoid this in
> the future by assigning aliases for all ethernet devices. This reverts
> the sequence to what it was before the aformentioned commit (with
> phy-test-eth as seq 8). There is no ethernet1 for whatever reason.
>
> Signed-off-by: Sean Anderson
For the series and patches 1-15, applied to u-boot/next, thanks!
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH 07/18] Convert CONFIG_USB_XHCI_EXYNOS et al to Kconfig
On Thu, Jun 09, 2022 at 10:12:20AM +0900, Minkyu Kang wrote: > Hi, > > 2022년 6월 8일 (수) 21:26, Tom Rini 님이 작성: > > > This converts the following to Kconfig: > >CONFIG_USB_XHCI_EXYNOS > >CONFIG_USB_EHCI_EXYNOS > > > > Signed-off-by: Tom Rini > > --- > > drivers/usb/host/Kconfig| 16 > > include/configs/exynos5250-common.h | 5 - > > include/configs/exynos5420-common.h | 2 -- > > include/configs/odroid.h| 3 --- > > include/configs/odroid_xu3.h| 3 --- > > include/configs/smdk5420.h | 1 - > > 6 files changed, 16 insertions(+), 14 deletions(-) > > > > diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig > > index 5d0855ffcc79..413bec0f4a1a 100644 > > --- a/drivers/usb/host/Kconfig > > +++ b/drivers/usb/host/Kconfig > > @@ -32,6 +32,14 @@ config USB_XHCI_DWC3_OF_SIMPLE > > Support USB2/3 functionality in simple SoC integrations with > > USB controller based on the DesignWare USB3 IP Core. > > > > +config USB_XHCI_EXYNOS > > + bool "Support for Samsung Exynos5 family on-chip xHCI USB > > controller" > > + depends on ARCH_EXYNOS5 > > + default y > > + help > > + Enables support for he on-chip xHCI controller on Samsung Exynos5 > > + SoCs. > > + > > config USB_XHCI_MTK > > bool "Support for MediaTek on-chip xHCI USB controller" > > depends on ARCH_MEDIATEK > > @@ -157,6 +165,14 @@ config USB_EHCI_ATMEL > > ---help--- > > Enables support for the on-chip EHCI controller on Atmel chips. > > > > +config USB_EHCI_EXYNOS > > + bool "Support for Samsung Exynos EHCI USB controller" > > + depends on ARCH_EXYNOS > > + default y > > + ---help--- > > + Enables support for the on-chip EHCI controller on Samsung Exynos > > + SoCs. > > + > > config USB_EHCI_MARVELL > > bool "Support for Marvell on-chip EHCI USB controller" > > depends on ARCH_MVEBU || ARCH_KIRKWOOD || ARCH_ORION5X > > diff --git a/include/configs/exynos5250-common.h > > b/include/configs/exynos5250-common.h > > index 82cb8aff7b52..8d91a7de5cde 100644 > > --- a/include/configs/exynos5250-common.h > > +++ b/include/configs/exynos5250-common.h > > @@ -13,11 +13,6 @@ > > > > #define CONFIG_SYS_SDRAM_BASE 0x4000 > > > > -/* USB */ > > -#define CONFIG_USB_EHCI_EXYNOS > > - > > -#define CONFIG_USB_XHCI_EXYNOS > > - > > /* DRAM Memory Banks */ > > #define SDRAM_BANK_SIZE(256UL << 20UL) /* 256 MB */ > > > > diff --git a/include/configs/exynos5420-common.h > > b/include/configs/exynos5420-common.h > > index 5e1aba7692e0..35bf3c2fb4a7 100644 > > --- a/include/configs/exynos5420-common.h > > +++ b/include/configs/exynos5420-common.h > > @@ -27,6 +27,4 @@ > > #define CONFIG_LOWPOWER_FLAG 0x02020028 > > #define CONFIG_LOWPOWER_ADDR 0x0202002C > > > > -#define CONFIG_USB_XHCI_EXYNOS > > - > > #endif /* __CONFIG_EXYNOS5420_H */ > > diff --git a/include/configs/odroid.h b/include/configs/odroid.h > > index dec658dd13a3..11a4a409dbaf 100644 > > --- a/include/configs/odroid.h > > +++ b/include/configs/odroid.h > > @@ -149,9 +149,6 @@ > > /* Security subsystem - enable hw_rand() */ > > #define CONFIG_EXYNOS_ACE_SHA > > > > -/* USB */ > > -#define CONFIG_USB_EHCI_EXYNOS > > - > > /* > > * Supported Odroid boards: X3, U3 > > * TODO: Add Odroid X support > > diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h > > index 8d24a03b722d..476bde53572d 100644 > > --- a/include/configs/odroid_xu3.h > > +++ b/include/configs/odroid_xu3.h > > @@ -16,9 +16,6 @@ > > > > #define SDRAM_BANK_SIZE(256UL << 20UL) /* 256 MB > > */ > > > > -/* USB */ > > -#define CONFIG_USB_EHCI_EXYNOS > > - > > /* DFU */ > > #define DFU_DEFAULT_POLL_TIMEOUT 300 > > #define DFU_MANIFEST_POLL_TIMEOUT 25000 > > diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h > > index f8d2fafd2788..48f6e27006f0 100644 > > --- a/include/configs/smdk5420.h > > +++ b/include/configs/smdk5420.h > > @@ -20,7 +20,6 @@ > > #define CONFIG_SYS_SDRAM_BASE 0x2000 > > > > /* USB */ > > > Why don't you delete this line too? Missed that one, thanks. -- Tom signature.asc Description: PGP signature
Re: [PATCH 0/6] Add video damage tracking
On 07.06.22 10:28, Heinrich Schuchardt wrote: On 6/7/22 01:43, Alexander Graf wrote: This patch set speeds up graphics output on ARM by a factor of 60x. On most ARM SBCs, we keep the frame buffer in DRAM and map it as cached, but need it accessible by the display controller which reads directly from a later point of consistency. Hence, we flush the frame buffer to DRAM on every change. The full frame buffer. Isn't a similar problem already solved by CONFIG_VIDEO_COPY? Leaving the frame buffer uncached would convert the ARM problem into the X86 case? It solves a similar problem, yes. However, it requires us to allocate the frame buffer size twice, and we would need to dynamically toggle the MMU mappings of the frame buffer to WC instead of cached. That's code we don't have today. VIDEO_COPY is also terribly inefficient in the most common case: Drawing one or multiple characters. It basically copies every line that contains the character, for every character printed. The damage code in this patch set only flushes the relevant rectangles after a string is fully printed. I think overall, damage tracking with cached memory is simple enough that it gives us the best of all worlds. Unfortunately, with the advent of 4k displays, we are seeing frame buffers that can take a while to flush out. This was reported by Da Xue with grub, which happily print 1000s of spaces on the screen to draw a menu. Every printed space triggers a cache flush. This patch set implements the easiest mitigation against this problem: Damage tracking. We remember the lowest common denominator region that was touched since the last video_sync() call and only flush that. If by "lowest common denominator region" you should mean a rectangle, drawing a point in the upper left corner and another in the lower right corner would require a full flush. So nothing gained in this case. Glad you asked! :) While theoretically possible, this is a case that just never happens in U-Boot's code flow. All code that draws to the screen is either blt based (like gop, character drawing or logo display) or moves large portions of the screen (scrolling). The largest granularity we have between syncs is when printing strings. So the worst case you'll have today is a wrap around where you'd end up flushing full lines. With this patch set applied, we reduce drawing a large grub menu (with serial console attached for size information) on an RK3399-ROC system at 1440p from 55 seconds to less than 1 second. Alternatives considered: 1) Lazy sync - Sandbox does this. It only calls video_sync(true) ever so often. We are missing timers to do this generically. 2) Double buffering - We could try to identify whether anything changed at all and only draw to the FB if it did. That would require maintaining a second buffer that we need to scan. 3) Text buffer - Maintain a buffer of all text printed on the screen with respective location. Don't write if the old and new character are identical. This would limit applicability to text only and is an optimization on top of this patch set. 4) Hash screen lines - Create a hash (sha256?) over every line when it changes. Only flush when it does. I'm not sure if this would waste more time, memory and cache than the current approach. It would make full screen updates much more expensive. Alexander Graf (6): dm: video: Add damage tracking API dm: video: Add damage notification on display clear vidconsole: Add damage notifications to all vidconsole drivers video: Add damage notification on bmp display efi_loader: GOP: Add damage notification on BLT video: Only dcache flush damaged lines We need documentation describing the difference between CONFIG_VIDEO_COPY and CONFIG_VIDEO_DAMAGE. Hm, maybe we should implement CONFIG_VIDEO_COPY as a flush mechanism behind CONFIG_VIDEO_DAMAGE? That way we only have a single code path for producers left and in addition also optimize drawing individual characters. It would also make the feature useful beyond ARM dcache flushing. Alex
RE: [EXT] RE: [PATCH] i.MX8M: crypto: disable JR0 in SPL, U-Boot
Hello Gaurav,
> -Original Message-
> From: U-Boot On Behalf Of Gaurav Jain
> Sent: Thursday, June 9, 2022 3:13 PM
> To: ZHIZHIKIN Andrey ; u-
> b...@lists.denx.de; Stefano Babic ; Fabio Estevam
> ; Tommaso Merciai ;
> Michael Trimarchi ; Marek Vasut ;
> Simon Glass ; Patrick Delaunay
> ;
> Stefan Roese ; Horia Geanta ; Pankaj Gupta
> ; Varun Sethi ; Ye Li ;
> Michael Walle
> Cc: dl-uboot-imx
> Subject: RE: [EXT] RE: [PATCH] i.MX8M: crypto: disable JR0 in SPL, U-Boot
>
> Hello Andrey
>
> > -Original Message-
> > From: ZHIZHIKIN Andrey
> > Sent: Wednesday, June 8, 2022 8:31 PM
> > To: Gaurav Jain ; u-boot@lists.denx.de; Stefano Babic
> > ; Fabio Estevam ; Tommaso Merciai
> > ; Michael Trimarchi
> > ; Marek Vasut ; Simon
> > Glass ; Patrick Delaunay ;
> > Stefan Roese ; Horia Geanta ; Pankaj
> > Gupta ; Varun Sethi ; Ye Li
> > ; Michael Walle
> > Cc: dl-uboot-imx
> > Subject: [EXT] RE: [PATCH] i.MX8M: crypto: disable JR0 in SPL, U-Boot
> >
> > Caution: EXT Email
> >
> > Hello Gaurav,
> >
> > Cc: Michael Walle here.
> >
> > I guess this is a re-incarnation of the previous discussions we had
> > regarding
> the
> > JR reservation, see [1].
> >
> > > -Original Message-
> > > From: Gaurav Jain
> > > Sent: Wednesday, June 8, 2022 3:34 PM
> > > To: u-boot@lists.denx.de; Stefano Babic ; Fabio
> > > Estevam ; Tommaso Merciai
> > > ;
> > > ZHIZHIKIN Andrey ; Michael
> > > Trimarchi ; Marek Vasut ;
> > > Simon Glass ; Patrick Delaunay
> > > ; Stefan Roese ; Horia
> > > Geanta ; Pankaj Gupta ;
> > > Varun Sethi ; Ye Li
> > > Cc: NXP i . MX U-Boot Team ; Gaurav Jain
> > >
> > > Subject: [PATCH] i.MX8M: crypto: disable JR0 in SPL, U-Boot
> > >
> > > disabled use of JR0 in SPL and uboot, as JR0 is reserved for HAB in
> > > TF-A.
> > >
> > > Signed-off-by: Gaurav Jain
> > > ---
> > > arch/arm/dts/imx8mm-evk-u-boot.dtsi| 1 +
> > > arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 1 +
> > > arch/arm/dts/imx8mp-evk-u-boot.dtsi| 1 +
> > > arch/arm/dts/imx8mq-evk-u-boot.dtsi| 4
> >
> > Shall those DTB changes be sync'd with Kernel?
> >
> > Now that the JR0 reservation is done in both upstream and downstream TF-A -
> > Kernel would fail to initialize the JR0.
> >
> > This is what Fabio just noted and posted as a comment. :-)
> >
> > I suggest that this is submitted into Kernel, and then picked up during the
> next
> > DTB re-sync.
>
> Ok. Fabio has already submitted a patch for this.
Great! Then I think DTB part will not be required in this patch.
> >
> > > arch/arm/include/asm/arch-imx8m/imx-regs.h | 1 +
> > > drivers/crypto/fsl/jr.c| 14 +++---
> > > scripts/config_whitelist.txt | 1 +
> > > 7 files changed, 20 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi
> > > b/arch/arm/dts/imx8mm-evk-u- boot.dtsi index e9fbf7b802..8cd37b5205
> > > 100644
> > > --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi
> > > +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
> > > @@ -74,6 +74,7 @@
> > >
> > > _jr0 {
> > > u-boot,dm-spl;
> > > + status = "disabled";
> > > };
> > >
> > > _jr1 {
> > > diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> > > b/arch/arm/dts/imx8mn-ddr4- evk-u-boot.dtsi index
> > > 4d0ecb07d4..0c31f2737a 100644
> > > --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> > > +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> > > @@ -114,6 +114,7 @@
> > >
> > > _jr0 {
> > > u-boot,dm-spl;
> > > + status = "disabled";
> > > };
> > >
> > > _jr1 {
> > > diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
> > > b/arch/arm/dts/imx8mp-evk-u- boot.dtsi index f43eb6238d..28dce55fb9
> > > 100644
> > > --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
> > > +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
> > > @@ -77,6 +77,7 @@
> > >
> > > _jr0 {
> > > u-boot,dm-spl;
> > > + status = "disabled";
> > > };
> > >
> > > _jr1 {
> > > diff --git a/arch/arm/dts/imx8mq-evk-u-boot.dtsi
> > > b/arch/arm/dts/imx8mq-evk-u- boot.dtsi index 67da69a2eb..37364eb6b4
> > > 100644
> > > --- a/arch/arm/dts/imx8mq-evk-u-boot.dtsi
> > > +++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi
> > > @@ -18,3 +18,7 @@
> > > {
> > > u-boot,dm-spl;
> > > };
> > > +
> > > +_jr0 {
> > > + status = "disabled";
> > > +};
> > > diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h
> > > b/arch/arm/include/asm/arch-imx8m/imx-regs.h
> > > index 1da75528d4..e6e2974df3 100644
> > > --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
> > > +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
> > > @@ -89,6 +89,7 @@
> > > #define CONFIG_SYS_FSL_SEC_ADDR (CAAM_IPS_BASE_ADDR + \
> > > CONFIG_SYS_FSL_SEC_OFFSET)
> > > #define CONFIG_SYS_FSL_JR0_OFFSET (0x1000)
> > > +#define CONFIG_SYS_FSL_JR1_OFFSET (0x2000)
This shall be converted to config option, as each SoC family defines this
now differently.
Ideally, only JR ID shall be provided
Re: [PATCH v5 11/23] mkeficapsule: Add support for generating empty capsules
On 6/9/22 14:29, Sughosh Ganu wrote:
The Dependable Boot specification[1] describes the structure of the
firmware accept and revert capsules. These are empty capsules which
are used for signalling the acceptance or rejection of the updated
firmware by the OS. Add support for generating these empty capsules.
[1] -
https://git.codelinaro.org/linaro/dependable-boot/mbfw/uploads/6f7ddfe3be24e18d4319e108a758d02e/mbfw.pdf
Signed-off-by: Sughosh Ganu
---
doc/mkeficapsule.1 | 29 ++---
tools/eficapsule.h | 8 +++
tools/mkeficapsule.c | 139 +--
3 files changed, 151 insertions(+), 25 deletions(-)
diff --git a/doc/mkeficapsule.1 b/doc/mkeficapsule.1
index 09bdc24295..77ca061efd 100644
--- a/doc/mkeficapsule.1
+++ b/doc/mkeficapsule.1
@@ -8,7 +8,7 @@ mkeficapsule \- Generate EFI capsule file for U-Boot
.SH SYNOPSIS
.B mkeficapsule
-.RI [ options "] " image-blob " " capsule-file
+.RI [ options ] " " [ image-blob ] " " capsule-file
.SH "DESCRIPTION"
.B mkeficapsule
@@ -23,8 +23,13 @@ Optionally, a capsule file can be signed with a given
private key.
In this case, the update will be authenticated by verifying the signature
before applying.
+Additionally, an empty capsule file can be generated for acceptance or
+rejection of firmware images by a governing component like an Operating
+System. The empty capsules do not require an image-blob input file.
+
+
.B mkeficapsule
-takes any type of image files, including:
+takes any type of image files when generating non empty capsules, including:
.TP
.I raw image
format is a single binary blob of any type of firmware.
@@ -36,18 +41,16 @@ multiple binary blobs in a single capsule file.
This type of image file can be generated by
.BR mkimage .
-.PP
-If you want to use other types than above two, you should explicitly
-specify a guid for the FMP driver.
-
.SH "OPTIONS"
+
.TP
.BI "-g\fR,\fB --guid " guid-string
Specify guid for image blob type. The format is:
----
The first three elements are in little endian, while the rest
-is in big endian.
+is in big endian. The option must be specified for all non empty and
+image acceptance capsules
.TP
.BI "-i\fR,\fB --index " index
@@ -57,6 +60,18 @@ Specify an image index
.BI "-I\fR,\fB --instance " instance
Specify a hardware instance
+.PP
+For generation of firmware accept empty capsule
+.BR --guid
+is mandatory
+.TP
+.BI "-A\fR,\fB --fw-accept "
+Generate a firmware acceptance empty capsule
+
+.TP
+.BI "-R\fR,\fB --fw-revert "
+Generate a firmware revert empty capsule
+
.TP
.BR -h ", " --help
Print a help message
diff --git a/tools/eficapsule.h b/tools/eficapsule.h
index d63b831443..072a4b5598 100644
--- a/tools/eficapsule.h
+++ b/tools/eficapsule.h
@@ -41,6 +41,14 @@ typedef struct {
EFI_GUID(0x4aafd29d, 0x68df, 0x49ee, 0x8a, 0xa9, \
0x34, 0x7d, 0x37, 0x56, 0x65, 0xa7)
+#define FW_ACCEPT_OS_GUID \
+ EFI_GUID(0x0c996046, 0xbcc0, 0x4d04, 0x85, 0xec, \
+0xe1, 0xfc, 0xed, 0xf1, 0xc6, 0xf8)
+
+#define FW_REVERT_OS_GUID \
+ EFI_GUID(0xacd58b4b, 0xc0e8, 0x475f, 0x99, 0xb5, \
+0x6b, 0x3f, 0x7e, 0x07, 0xaa, 0xf0)
+
/* flags */
#define CAPSULE_FLAGS_PERSIST_ACROSS_RESET 0x0001
diff --git a/tools/mkeficapsule.c b/tools/mkeficapsule.c
index 5f74d23b9e..e8eb6b070d 100644
--- a/tools/mkeficapsule.c
+++ b/tools/mkeficapsule.c
@@ -29,7 +29,16 @@ static const char *tool_name = "mkeficapsule";
efi_guid_t efi_guid_fm_capsule = EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID;
efi_guid_t efi_guid_cert_type_pkcs7 = EFI_CERT_TYPE_PKCS7_GUID;
-static const char *opts_short = "g:i:I:v:p:c:m:dh";
+static const char *opts_short = "g:i:I:v:p:c:m:dhAR";
+
+static bool empty_capsule;
+static unsigned char capsule;
+
+enum {
+ CAPSULE_NORMAL_BLOB = 0,
+ CAPSULE_ACCEPT,
+ CAPSULE_REVERT,
+} capsule_type;
static struct option options[] = {
{"guid", required_argument, NULL, 'g'},
@@ -39,24 +48,47 @@ static struct option options[] = {
{"certificate", required_argument, NULL, 'c'},
{"monotonic-count", required_argument, NULL, 'm'},
{"dump-sig", no_argument, NULL, 'd'},
+ {"fw-accept", no_argument, NULL, 'A'},
+ {"fw-revert", no_argument, NULL, 'R'},
{"help", no_argument, NULL, 'h'},
{NULL, 0, NULL, 0},
};
static void print_usage(void)
{
- fprintf(stderr, "Usage: %s [options] \n"
- "Options:\n"
-
- "\t-g, --guid guid for image blob type\n"
- "\t-i, --index update image index\n"
- "\t-I, --instanceupdate hardware instance\n"
- "\t-p, --private-key private key file\n"
- "\t-c, --certificate signer's certificate
file\n"
- "\t-m, --monotonic-count monotonic count\n"
- "\t-d, --dump_sig dump
Reproducibility issue due to use of uname
It looks like u-boot 2022.07-rc1 introduced a reproducibility issue that is dependent on the running kernel. I believe the commit that triggered this issue is: f7691a6d736bec7915c227ac14076f9993a27367 sandbox: allow cross-compiling sandbox While the use of uname in the Makefile goes back well before this commit, previously it had no apparent effect on the builds... When building natively (e.g. CROSS_COMPILE is not set) with a 32-bit userland toolchain, but running a 64-bit kernel, 32-bit arm targets end up with BOOTAA64.EFI embedded in the binaries: https://tests.reproducible-builds.org/debian/rb-pkg/experimental/armhf/diffoscope-results/u-boot.html /EFI/BOOT/BOOTARM.EFI vs. /EFI/BOOT/BOOTAA64.EFI live well, vagrant signature.asc Description: PGP signature
[PATCH] rockchip: make_fit_atf: generate signed conf when FIT_SIGN_KEY is set
Introduce the environment variable FIT_SIGN_KEY which when set is the name
of the key that should be used to sign the binaries and configuration in
the FIT image. Usage example (tested on RockPi4B):
mkdir keys
openssl genpkey -algorithm RSA -out keys/dev.key \
-pkeyopt rsa_keygen_bits:2048 -pkeyopt rsa_keygen_pubexp:65537
openssl req -batch -new -x509 -key keys/dev.key -out keys/dev.crt
FIT_SIGN_KEY=dev TEE=.../tee.bin BL31=.../bl31.elf \
../../git/arch/arm/mach-rockchip/make_fit_atf.py \
arch/arm/dts/rk3399-rock-pi-4b.dtb > u-boot.its
cp spl/dts/dt-spl.dtb spl/u-boot-spl.dtb
./tools/mkimage -E -B 0x8 -p 0x0 -f u-boot.its -k keys \
-r -K spl/u-boot-spl.dtb u-boot.itb
cat tpl/u-boot-tpl-rockchip.bin spl/u-boot-spl-nodtb.bin \
spl/u-boot-spl.dtb > idbloader.img
Signed-off-by: Jerome Forissier
---
arch/arm/mach-rockchip/make_fit_atf.py | 49 ++
1 file changed, 34 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-rockchip/make_fit_atf.py
b/arch/arm/mach-rockchip/make_fit_atf.py
index f3224d2555..e587760ccf 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.py
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
@@ -28,19 +28,6 @@ DT_HEADER = """
images {
"""
-DT_UBOOT = """
- uboot {
- description = "U-Boot (64-bit)";
- data = /incbin/("u-boot-nodtb.bin");
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <0x%08x>;
- };
-
-"""
-
DT_IMAGES_NODE_END = """ };
"""
@@ -60,6 +47,7 @@ def append_bl31_node(file, atf_index, phy_addr, elf_entry):
file.write('\t\t\tload = <0x%08x>;\n' % phy_addr)
if atf_index == 1:
file.write('\t\t\tentry = <0x%08x>;\n' % elf_entry)
+append_hash_sig_nodes(file)
file.write('\t\t};\n')
file.write('\n')
@@ -75,6 +63,7 @@ def append_tee_node(file, atf_index, phy_addr, elf_entry):
file.write('\t\t\tcompression = "none";\n')
file.write('\t\t\tload = <0x%08x>;\n' % phy_addr)
file.write('\t\t\tentry = <0x%08x>;\n' % elf_entry)
+append_hash_sig_nodes(file)
file.write('\t\t};\n')
file.write('\n')
@@ -88,6 +77,7 @@ def append_fdt_node(file, dtbs):
file.write('\t\t\tdata = /incbin/("%s");\n' % dtb)
file.write('\t\t\ttype = "flat_dt";\n')
file.write('\t\t\tcompression = "none";\n')
+append_hash_sig_nodes(file)
file.write('\t\t};\n')
file.write('\n')
cnt = cnt + 1
@@ -108,6 +98,13 @@ def append_conf_section(file, cnt, dtname, segments):
if segments <= 1:
file.write(';\n')
file.write('\t\t\tfdt = "fdt_%d";\n' % cnt)
+key_name = os.getenv('FIT_SIGN_KEY')
+if key_name:
+file.write('\t\t\tsignature {\n')
+file.write('\t\t\t\tsign-images = "firmware","loadables","fdt";\n')
+file.write('\t\t\t\talgo = "sha1,rsa2048";\n')
+file.write('\t\t\t\tkey-name-hint = "dev";\n')
+file.write('\t\t\t};\n')
file.write('\t\t};\n')
file.write('\n')
@@ -123,12 +120,34 @@ def append_conf_node(file, dtbs, segments):
file.write('\t};\n')
file.write('\n')
-def generate_atf_fit_dts_uboot(fit_file, uboot_file_name):
+def generate_atf_fit_dts_uboot(file, uboot_file_name):
segments = unpack_elf(uboot_file_name)
if len(segments) != 1:
raise ValueError("Invalid u-boot ELF image '%s'" % uboot_file_name)
index, entry, p_paddr, data = segments[0]
-fit_file.write(DT_UBOOT % p_paddr)
+file.write('\n')
+file.write('\t\tuboot {\n')
+file.write('\t\t\tdescription = "U-Boot (64-bit)";\n')
+file.write('\t\t\tdata = /incbin/("u-boot-nodtb.bin");\n')
+file.write('\t\t\ttype = "standalone";\n')
+file.write('\t\t\tos = "U-Boot";\n')
+file.write('\t\t\tarch = "arm64";\n')
+file.write('\t\t\tcompression = "none";\n')
+file.write('\t\t\tload = <0x%08x>;\n' % p_paddr)
+append_hash_sig_nodes(file)
+file.write('\t\t};\n')
+file.write('\n')
+
+def append_hash_sig_nodes(file):
+key_name = os.getenv("FIT_SIGN_KEY")
+if key_name:
+file.write('\t\t\thash-1 {\n')
+file.write('\t\t\t\talgo = "sha1";\n')
+file.write('\t\t\t};\n')
+file.write('\t\t\tsignature-1 {\n')
+file.write('\t\t\t\talgo = "sha1,rsa2048";\n')
+file.write('\t\t\t\tkey-name-hint = "%s";\n' % key_name)
+file.write('\t\t\t};\n')
def generate_atf_fit_dts_bl31(fit_file, bl31_file_name, tee_file_name,
dtbs_file_name):
segments = unpack_elf(bl31_file_name)
--
2.34.1
[PATCH 1/2] spl: fit: add config option for temporary buffer when loading image
When the load address of a FIT image isn't properly aligned,
spl_load_fit_image() may write past the end of the destination buffer. It
is not an issue in many cases because the memory happens to be writeable
and nothing important is present in the overflow. On RockPi4 however there
is a configuration where a TF-A image (bl31_0xff3b.bin) has to be
loaded into a 8K range of SRAM memory, between 0xff3b and 0xff3b2000.
The end address is a hard limit, because due to the way the hardware is
wired, the addresses wrap and any overflow gets written back to 0xff3b
thus overwriting previous data.
To address this problem, introduce a helper function which loads data using
a temporary buffer allocated on the stack. The size of the buffer is
defined by SPL_LOAD_FIT_IMAGE_BUFFER_SIZE (default 0x0 or disabled).
Co-developed-by: Xavier Drudis Ferran
Signed-off-by: Xavier Drudis Ferran
Signed-off-by: Jerome Forissier
---
common/spl/Kconfig | 45 +
common/spl/spl_fit.c | 79
2 files changed, 118 insertions(+), 6 deletions(-)
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 50ff113cab..d95141a6f6 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -1339,6 +1339,51 @@ config SPL_OPENSBI_LOAD_ADDR
help
Load address of the OpenSBI binary.
+config SPL_LOAD_FIT_IMAGE_BUFFER_SIZE
+ hex "Read unaligned external FIT images to a temporary buffer in SPL"
+ default 0x0
+ depends on SPL_LOAD_FIT
+ help
+ An aligned FIT image is such that it starts at the beginning
+ of a block in media and has a load_addr in its FIT header
+ that is DMA aligned in RAM. These aligned images can be read
+ directly from media to RAM. Unaligned external FIT images
+ are those that need reading some extra data before and/or after
+ the image because they don't occupy fully the blocks they're
+ in in media, or their destination is not DMA aligned and must
+ be read somewhere aligned before copying them to load_addr.
+
+ With this option set to 0x0 full blocks will just be read in
+ the closest DMA aligned address, and the unaligned image
+ inside those read blocks will later be copied to
+ load_addr. Meanwhile memory outside [load_addr,
+ load_addr+length) will have been written. That's no problem
+ when the block length, image size and load_addr have been
+ taken into account when laying out memory.
+
+ But in some cases not all memory is writable, or undesired
+ effects arise when writing outside [load_addr,
+ load_addr+length). For instance, in RK3399, one of the
+ images is ATF2, of size 8KiB which should be loaded into
+ INTMEM1, at address 0xff3b. This address is DMA aligned
+ but tight. It maps to a 8KiB SRAM area. If the image on
+ media is not block aligned some extra bytes get read before
+ and after, and everything extra written in
+ 0xff3b2000-0xff3b corrupts SRAM at
+ 0xff3b-0xff3b1fff before the image is memcpyied in place.
+
+ With this option set to a nonzero value a DMA aligned buffer
+ will be allocated on the stack and the image will be read
+ in chuncks of blocks to this buffer, with each chunk being
+ memcpyied to [load_addr,load_addr+length), so never writing
+ outside the destination area.
+
+ The advantage of enabling this option is safety, and the
+ disadvantage is more stack use and slower image load (one read
+ per chunk instead of just one).
+
+ The default is 0x0 to replicate previous behaviour.
+
config TPL
bool
depends on SUPPORT_TPL
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 1bbf824684..56775fd744 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -218,6 +219,64 @@ static int get_aligned_image_size(struct spl_load_info
*info, int data_size,
return (data_size + info->bl_len - 1) / info->bl_len;
}
+#if (CONFIG_SPL_LOAD_FIT_IMAGE_BUFFER_SIZE != 0x0)
+static int load_with_tmpbuf(struct spl_load_info *info, ulong load_addr,
+ ulong sector, int offs, size_t len)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(u8, buf,
+CONFIG_SPL_LOAD_FIT_IMAGE_BUFFER_SIZE);
+ void *dst = (void *)load_addr;
+ int nsect = (len + offs + info->bl_len - 1) / info->bl_len;
+ int bufsect = (CONFIG_SPL_LOAD_FIT_IMAGE_BUFFER_SIZE) / info->bl_len;
+ size_t sz, tail = 0;
+
+ if (offs) {
+ sz = info->bl_len - offs;
+ if (sz > len)
+ sz = len;
+ if (info->read(info, sector, 1, buf) != 1)
+ return -EIO;
+
[PATCH 2/2] rockchip: rk3399: enable spl-fifo-mode for sdmmc only when needed
Commit 5c606ca35c42 ("rockchip: rk3399: enable spl-fifo-mode for sdmmc")
mentions that the RK3399 SoC can't do DMA between SDMMC and SRAM.
According to the TRM "7.3.2 Embedded SRAM access path" [1], only the
8KB SRAM at 0xff3b (INTMEM1) is in this situation. The 192KB SRAM
can be accessed by both DMA controllers.
Assuming the only use case for writing from MMC to INTMEM1 is loading
a FIT image, and with the introduction of a temporary buffer for that
purpose (CONFIG_SPL_LOAD_FIT_IMAGE_BUFFER_SIZE, which is required
anyways to ensure the destination boundaries are enforced), then
spl-fifo-mode is not needed anymore and DMA can be enabled safely.
Link: [1] https://www.rockchip.fr/Rockchip%20RK3399%20TRM%20V1.4%20Part1.pdf
CC: Deepak Das
Signed-off-by: Jerome Forissier
---
arch/arm/dts/rk3399-u-boot.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 716b9a433a..a1b6d6f007 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -124,8 +124,10 @@
{
u-boot,dm-pre-reloc;
+#ifndef CONFIG_SPL_LOAD_FIT_IMAGE_BUFFER_SIZE
/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
u-boot,spl-fifo-mode;
+#endif
};
{
--
2.34.1
[PATCH 0/2] spl, rk3399: fix FIT image loadingg out-of-range
The patches in this series address an issue I met when trying to enable FIT signature verification by SPL on a RockPi4B board. - The first patch avoids a buffer overflow when writing to INTMEM1 SRAM - The second one addresses reliability issues I had with back-to-back MMC reads from the microSD card. By allowing DMA operation, the issue is gone and generally speaking DMA is preferred over FIFO mode anyways. Jerome Forissier (2): spl: fit: add config option for temporary buffer when loading image rockchip: rk3399: enable spl-fifo-mode for sdmmc only when needed arch/arm/dts/rk3399-u-boot.dtsi | 2 + common/spl/Kconfig | 45 +++ common/spl/spl_fit.c| 79 ++--- 3 files changed, 120 insertions(+), 6 deletions(-) -- 2.34.1
Re: [PATCH 6/6] video: Only dcache flush damaged lines
On 07.06.22 10:00, Heinrich Schuchardt wrote: On 6/7/22 01:43, Alexander Graf wrote: Now that we have a damage area tells us which parts of the frame buffer actually need updating, let's only dcache flush those on video_sync() calls. With this optimization in place, frame buffer updates - especially on large screen such as 4k displays - speed up significantly. Signed-off-by: Alexander Graf Reported-by: Da Xue --- drivers/video/video-uclass.c | 49 ++-- 1 file changed, 42 insertions(+), 7 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index 9ac1974670..5661beea38 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -222,6 +222,39 @@ int video_damage(struct udevice *vid, int x, int y, int width, int height) } #endif +#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) Why should this be ARM specific? I don't believe it should - and that's what the existing comment also says. But currently it is because the dcache API isn't available on all platforms; I'm merely preserving the existing logic :). Thanks, Alex
[PATCH v3 6/7] board: freescale: Add entry for imx8mm_evk_fspi_defconfig
Add entry for imx8mm_evk_fspi_defconfig in board/freescale/imx8mm_evk/MAINTAINERS Signed-off-by: Mamta Shukla Signed-off-by: Thomas Haemmerle --- v2: -No changes v3: -No changes board/freescale/imx8mm_evk/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/imx8mm_evk/MAINTAINERS b/board/freescale/imx8mm_evk/MAINTAINERS index b031bb0674..875adf58ee 100644 --- a/board/freescale/imx8mm_evk/MAINTAINERS +++ b/board/freescale/imx8mm_evk/MAINTAINERS @@ -4,3 +4,4 @@ S: Maintained F: board/freescale/imx8mm_evk/ F: include/configs/imx8mm_evk.h F: configs/imx8mm_evk_defconfig +F: configs/imx8mm_evk_fspi_defconfig -- 2.25.1
[PATCH v3 7/7] doc: board: nxp: Add instructions to boot from QSPI
Add instructions to build and boot from QSPI Flash.
Signed-off-by: Mamta Shukla
Signed-off-by: Thomas Haemmerle
---
v2:
-No changes
v3:
-Fix Checkpatch Error for trailing whitespace
doc/board/nxp/imx8mm_evk.rst | 37 ++--
1 file changed, 35 insertions(+), 2 deletions(-)
diff --git a/doc/board/nxp/imx8mm_evk.rst b/doc/board/nxp/imx8mm_evk.rst
index b9e67b954f..64f7febdfb 100644
--- a/doc/board/nxp/imx8mm_evk.rst
+++ b/doc/board/nxp/imx8mm_evk.rst
@@ -35,8 +35,8 @@ Get the ddr firmware
$ ./firmware-imx-8.9
$ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin $(builddir)
-Build U-Boot
-
+Build U-Boot for sd card
+--
.. code-block:: bash
@@ -53,3 +53,36 @@ Burn the flash.bin to MicroSD card offset 33KB:
Boot
Set Boot switch to SD boot
+
+Build U-Boot for qspi flash card
+
+
+.. code-block:: bash
+
+ $ export CROSS_COMPILE=aarch64-poky-linux-
+ $ make imx8mm_evk_fspi_defconfig
+ $ make
+
+Currently, there is no direct support to write to QSPI Flash.
+Copy flash.bin to ${loadaddr} either from sd card or over network and then
copy to
+qspi flash
+
+From sd card to memory
+
+.. code-block:: bash
+$mmc dev 1
+$mmc read ${loadaddr} 0x00
+
+.. code-block:: bash
+
+ $ sf probe
+ $ sf erase 0
+ $ sf write $loadaddr 0x00
+
+Boot from QSPI Flash
+---
+Set Boot Switch to QSPI Flash
+
+Pin configuration for imx8mm_revC evk to boot from qspi flash
+SW1101: 0110xx
+SW1102: 00100x0010
--
2.25.1
[PATCH v3 4/7] board: freescale: Add QSPI Boot support in spl for i.MX8m
Add QSPI Boot option in u-boot-spl for i.MX8m EVK. Signed-off-by: Mamta Shukla Signed-off-by: Thomas Haemmerle --- v2: -No changes v3: -No changes board/freescale/imx8mm_evk/spl.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c index 4d96324685..e2eb1426c8 100644 --- a/board/freescale/imx8mm_evk/spl.c +++ b/board/freescale/imx8mm_evk/spl.c @@ -39,6 +39,8 @@ int spl_board_boot_device(enum boot_device boot_dev_spl) case SD3_BOOT: case MMC3_BOOT: return BOOT_DEVICE_MMC2; + case QSPI_BOOT: + return BOOT_DEVICE_NOR; default: return BOOT_DEVICE_NONE; } -- 2.25.1
[PATCH v3 5/7] configs: imx8mm: Define CONFIG_SYS_UBOOT_BASE for i.MX8m
The macro `CONFIG_SYS_UBOOT_BASE` is used by SPL loaders `"NOR"` and `"XIP"` to determine the base address of u-boot. For `"NOR"` on i.MX8MM it is the base address of QSPI0 plus the offset of the flattened image tree blob. Although `QSPI0_AMBA_BASE` is used to define CONFIG_SYS_UBOOT_BASE in multiple board header files for i.MX8MM, it is not specified. Specify offset of flattened image tree blob (needs to be set to same value as specified in 'binman' node), base address of QSPI0 and size of FlexSPI configuration block. Signed-off-by: Mamta Shukla Signed-off-by: Thomas Haemmerle --- v2: -No changes v3: -No changes include/configs/imx8mm_evk.h | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 5e8f19c43f..1b8d6e6b9f 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -13,8 +13,13 @@ #define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) #define CONFIG_SPL_MAX_SIZE(148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K +#define UBOOT_ITB_OFFSET 0x57C00 +#define QSPI0_AMBA_BASE0x0800 +#define FSPI_CONF_BLOCK_SIZE 0x1000 +#define UBOOT_ITB_OFFSET_FSPI \ + (UBOOT_ITB_OFFSET + FSPI_CONF_BLOCK_SIZE) #define CONFIG_SYS_UBOOT_BASE \ - (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) + (QSPI0_AMBA_BASE + UBOOT_ITB_OFFSET_FSPI) #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x92 -- 2.25.1
[PATCH v3 2/7] dts: imx8mm-uboot: Add support to pack FlexSPI Header using binman
Add definition for FSPI configuration block and subsequently new offsets for
u-boot-spl and u-boot-itb for CONFIG_FSPI_HEADER option.
Signed-off-by: Mamta Shukla
Signed-off-by: Thomas Haemmerle
---
v2:
-No changes
v3:
-Fix Checkpatch ERROR: code indent should use tabs where possible
arch/arm/dts/imx8mm-u-boot.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 9f66cdb65a..69363435b4 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -150,6 +150,25 @@
filename = "flash.bin";
pad-byte = <0x00>;
+#ifdef CONFIG_FSPI_CONF_HEADER
+ fspi_conf_block {
+ filename = CONFIG_FSPI_CONF_FILE;
+ type = "blob-ext";
+ size = <0x1000>;
+ };
+
+ spl {
+ filename = "spl.bin";
+ offset = <0x1000>;
+ type = "blob-ext";
+ };
+
+ binman_uboot: uboot {
+ filename = "u-boot.itb";
+ offset = <0x58C00>;
+ type = "blob-ext";
+ };
+#else
spl {
filename = "spl.bin";
offset = <0x0>;
@@ -161,6 +180,7 @@
offset = <0x57c00>;
type = "blob-ext";
};
+#endif
};
};
--
2.25.1
[PATCH v3 1/7] tools: mkimage: Add support to generate FlexSPI Header for i.MX8m
Add struct with Flex SPI Configuration Block and enable generating
fspi header using mkimage.
Refer i.MX 8M Mini Application Processor Reference Manual for
detailed information about parameters for FlexSPI Configuration block.
Signed-off-by: Mamta Shukla
Signed-off-by: Thomas Haemmerle
---
v2:
-Add check for error in case open() for fspi_fd in imx8mkimage.c fails
v3:
-No changes
include/imximage.h | 38 ++
tools/Kconfig | 59 +
tools/imx8mimage.c | 81 +++---
3 files changed, 174 insertions(+), 4 deletions(-)
diff --git a/include/imximage.h b/include/imximage.h
index 5a812f5a10..c1ecc0b7cb 100644
--- a/include/imximage.h
+++ b/include/imximage.h
@@ -201,6 +201,44 @@ struct imx_header {
} header;
};
+typedef struct {
+ uint8_t tag[4];
+ uint8_t version[4];
+ uint8_t reserved_1[4];
+ uint8_t read_sample;
+ uint8_t datahold;
+ uint8_t datasetup;
+ uint8_t coladdrwidth;
+ uint8_t devcfgenable;
+ uint8_t reserved_2[3];
+ uint8_t devmodeseq[4];
+ uint8_t devmodearg[4];
+ uint8_t cmd_enable;
+ uint8_t reserved_3[3];
+ uint8_t cmd_seq[16] ;
+ uint8_t cmd_arg[16];
+ uint8_t controllermisc[4];
+ uint8_t dev_type;
+ uint8_t sflash_pad;
+ uint8_t serial_clk;
+ uint8_t lut_custom ;
+ uint8_t reserved_4[8];
+ uint8_t sflashA1[4];
+ uint8_t sflashA2[4];
+ uint8_t sflashB1[4];
+ uint8_t sflashB2[4];
+ uint8_t cspadover[4];
+ uint8_t sclkpadover[4];
+ uint8_t datapadover[4];
+ uint8_t dqspadover[4];
+ uint8_t timeout[4];
+ uint8_t commandInt[4];
+ uint8_t datavalid[4];
+ uint8_t busyoffset[2];
+ uint8_t busybitpolarity[2];
+ uint8_t lut[256];
+} __attribute__((packed)) fspi_conf;
+
typedef void (*set_dcd_val_t)(struct imx_header *imxhdr,
char *name, int lineno,
int fld, uint32_t value,
diff --git a/tools/Kconfig b/tools/Kconfig
index 117c921da3..539708f277 100644
--- a/tools/Kconfig
+++ b/tools/Kconfig
@@ -98,4 +98,63 @@ config TOOLS_MKEFICAPSULE
optionally sign that file. If you want to enable UEFI capsule
update feature on your target, you certainly need this.
+menuconfig FSPI_CONF_HEADER
+ bool "FlexSPI Header Configuration"
+ help
+ FSPI Header Configuration
+
+config FSPI_CONF_FILE
+ string "FlexSPI Header File"
+ depends on FSPI_CONF_HEADER
+ help
+ FlexSPI Header File name
+
+config READ_CLK_SOURCE
+ hex "Sampling Clock Source"
+ default 0x00
+ depends on FSPI_CONF_HEADER
+ help
+ Sample Clock source for Flash, default is internal loopback clock
+
+config DEVICE_TYPE
+ hex "Flash Type"
+ default 0x01
+ depends on FSPI_CONF_HEADER
+ help
+ Flash type: Serial NOR (0X01) and Serial NAND (0x02)
+
+config FLASH_PAD_TYPE
+ hex "Flash Pad Type"
+ default 0x01
+ depends on FSPI_CONF_HEADER
+ help
+ Flash Pad type :
+ Single Pad 0x01
+ Dual Pads 0x02
+ Quad Pad 0x04
+ Octal Pad 0x08
+
+config SERIAL_CLK_FREQUENCY
+ hex "Serial Clock Frequency"
+ default 0x02
+ depends on FSPI_CONF_HEADER
+ help
+ Chip specific frequency: other value 30MHz
+ 1-30MHz 2-50MHz 3-60MHz 4-75MHz 5-80MHz 6-100MHz 7-133MHz 8-166MHz
+
+config LUT_CUSTOM_SEQUENCE
+ hex "Enable Custom Look Up Table(LUT) Sequence"
+ default 0x00
+ depends on FSPI_CONF_HEADER
+ help
+ 0 - Use predefined LUT Sequence
+ 1 - Use LUT Sequence provided
+
+config LUT_SEQUENCE
+ string "Look Up Table Sequence"
+ default "0x0b, 0x04, 0x18, 0x08, 0x08, 0x30, 0x04, 0x24"
+ depends on FSPI_CONF_HEADER
+ help
+ Look Up Table Sequence
+
endmenu
diff --git a/tools/imx8mimage.c b/tools/imx8mimage.c
index 4eed683396..facf8887a1 100644
--- a/tools/imx8mimage.c
+++ b/tools/imx8mimage.c
@@ -12,7 +12,7 @@
#include "compiler.h"
static uint32_t ap_start_addr, sld_start_addr, sld_src_off;
-static char *ap_img, *sld_img, *signed_hdmi;
+static char *ap_img, *sld_img, *signed_hdmi, *fspi;
static imx_header_v3_t imx_header[2]; /* At most there are 3 IVT headers */
static uint32_t rom_image_offset;
static uint32_t sector_size = 0x200;
@@ -120,7 +120,6 @@ static void parse_cfg_cmd(int32_t cmd, char *token, char
*name, int lineno)
rom_version = ROM_V1;
}
break;
-
}
}
@@ -412,10 +411,70 @@ static void dump_header_v2(imx_header_v3_t *imx_header,
int index)
imx_header[index].boot_data.plugin);
}
+#ifdef CONFIG_FSPI_CONF_HEADER
+static int generate_fspi_header (int ifd)
+{
+ int ret, i = 0;
+
[PATCH v3 3/7] configs: Add config for enabling FSPI boot option for i.MX8m
Add imx8mm_evk_fspi_defconfig to build QSPI boot image. This config is based on imx8mm_evk_defconfig with addtional config options for FSPI Header,SPL offset and imx-image config to boot from FSPI. Signed-off-by: Mamta Shukla Signed-off-by: Thomas Haemmerle --- v2: -Remove extra line in commit message -Remove extra line in imx8mm_evk_fspi_defconfig -New patch in series to add an entry for imx8mm_evk_fspi_defconfig in board/freescale/imx8mm_evk/MAINTAINERS v3: -No changes .../imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg | 9 ++ configs/imx8mm_evk_fspi_defconfig | 115 ++ 2 files changed, 124 insertions(+) create mode 100644 board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg create mode 100644 configs/imx8mm_evk_fspi_defconfig diff --git a/board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg b/board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg new file mode 100644 index 00..ddcbd11eea --- /dev/null +++ b/board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2021 NXP + */ + +#define __ASSEMBLY__ + +BOOT_FROM fspi +LOADER u-boot-spl-ddr.bin 0x7E2000 diff --git a/configs/imx8mm_evk_fspi_defconfig b/configs/imx8mm_evk_fspi_defconfig new file mode 100644 index 00..50f6e4779b --- /dev/null +++ b/configs/imx8mm_evk_fspi_defconfig @@ -0,0 +1,115 @@ +CONFIG_ARM=y +CONFIG_ARCH_IMX8M=y +CONFIG_SYS_TEXT_BASE=0x4020 +CONFIG_SYS_MALLOC_LEN=0x200 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x40 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-evk" +CONFIG_SPL_TEXT_BASE=0x7E2000 +CONFIG_TARGET_IMX8MM_EVK=y +CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg" +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL=y +CONFIG_SYS_LOAD_ADDR=0x4048 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_SPL_LOAD_FIT=y +# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOARD_EARLY_INIT=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 +CONFIG_SPL_I2C=y +CONFIG_SPL_POWER=y +CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_PROMPT="u-boot=> " +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_CLK=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" +CONFIG_SPL_DM=y +CONFIG_SPL_CLK_COMPOSITE_CCF=y +CONFIG_CLK_COMPOSITE_CCF=y +CONFIG_SPL_CLK_IMX8MM=y +CONFIG_CLK_IMX8MM=y +CONFIG_MXC_GPIO=y +CONFIG_DM_I2C=y +CONFIG_DM_MMC=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX8M=y +CONFIG_DM_PMIC=y +CONFIG_SPL_DM_PMIC_PCA9450=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_PWM=y +CONFIG_DM_SERIAL=y +CONFIG_PWM_IMX=y +CONFIG_MXC_UART=y +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_DM_THERMAL=y +CONFIG_IMX_WATCHDOG=y +CONFIG_NXP_FSPI=y +CONFIG_SPI=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SF_DEFAULT_BUS=0 +CONFIG_SF_DEFAULT_CS=0 +CONFIG_SF_DEFAULT_SPEED=4000 +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_FSPI_CONF_HEADER=y +CONFIG_FSPI_CONF_FILE="fspi_header.bin" +CONFIG_READ_CLK_SOURCE=0x00 +CONFIG_DEVICE_TYPE=0x01 +CONFIG_FLASH_PAD_TYPE=0x01 +CONFIG_SERIAL_CLK_FREQUENCY=0x02 +CONFIG_LUT_CUSTOM_SEQUENCE=0x00 +CONFIG_LUT_SEQUENCE="0x0b, 0x04, 0x18, 0x08, 0x08, 0x30, 0x04, 0x24" -- 2.25.1
[PATCH v3 0/7] Add support for FlexSPI Boot for i.MX8m
This series of patch adds support for generating FlexSPI Header file and booting from QSPI on i.MX8m. Changes in v2: -Add check for error in case open() for fspi_fd in imx8mkimage.c fails -Remove extra line in commit message -Remove extra line in imx8mm_evk_fspi_defconfig -New patch in series to add an entry for imx8mm_evk_fspi_defconfig in board/freescale/imx8mm_evk/MAINTAINERS -New patch in series to add instructions to build and boot from QSPI Flash Changes in v3: -Fix Checkpatch ERROR: code indent should use tabs where possible -Fix Checkpatch ERROR for trailing spaces Mamta Shukla (7): tools: mkimage: Add support to generate FlexSPI Header for i.MX8m dts: imx8mm-uboot: Add support to pack FlexSPI Header using binman configs: Add config for enabling FSPI boot option for i.MX8m board: freescale: Add QSPI Boot support in spl for i.MX8m configs: imx8mm: Define CONFIG_SYS_UBOOT_BASE for i.MX8m board: freescale: Add entry for imx8mm_evk_fspi_defconfig doc: board: nxp: Add instructions to boot from QSPI arch/arm/dts/imx8mm-u-boot.dtsi | 20 +++ board/freescale/imx8mm_evk/MAINTAINERS| 1 + .../imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg | 9 ++ board/freescale/imx8mm_evk/spl.c | 2 + configs/imx8mm_evk_fspi_defconfig | 115 ++ doc/board/nxp/imx8mm_evk.rst | 37 +- include/configs/imx8mm_evk.h | 7 +- include/imximage.h| 38 ++ tools/Kconfig | 59 + tools/imx8mimage.c| 81 +++- 10 files changed, 362 insertions(+), 7 deletions(-) create mode 100644 board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg create mode 100644 configs/imx8mm_evk_fspi_defconfig -- 2.25.1
Re: [PATCH 5/6] efi_loader: GOP: Add damage notification on BLT
Hey Heinrich,
On 07.06.22 09:12, Heinrich Schuchardt wrote:
On 6/7/22 01:43, Alexander Graf wrote:
Now that we have a damage tracking API, let's populate damage done by
UEFI payloads when they BLT data onto the screen.
Signed-off-by: Alexander Graf
Reported-by: Da Xue
---
lib/efi_loader/efi_gop.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c
index 2c81859807..67286c9a60 100644
--- a/lib/efi_loader/efi_gop.c
+++ b/lib/efi_loader/efi_gop.c
@@ -33,6 +33,9 @@ struct efi_gop_obj {
struct efi_gop ops;
struct efi_gop_mode_info info;
struct efi_gop_mode mode;
+#ifdef CONFIG_DM_VIDEO
Please, heed the warnings provided by scripts/checkpatch.pl:
WARNING: Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef'
where possible
#174: FILE: lib/efi_loader/efi_gop.c:36:
+#ifdef CONFIG_DM_VIDEO
I was mostly afraid of adding a dependency on struct udevice here. But
since we already include video.h, I believe we're good. Happy to change
it to only runtime checks.
Alex
[PATCH v2] fs/squashfs: sqfs_read: Prevent arbitrary code execution
Following Jincheng's report, an out-of-band write leading to arbitrary
code execution is possible because on one side the squashfs logic
accepts directory names up to 65535 bytes (u16), while U-Boot fs logic
accepts directory names up to 255 bytes long.
Prevent such an exploit from happening by capping directory name sizes
to 255. Use a define for this purpose so that developers can link the
limitation to its source and eventually kill it some day by dynamically
allocating this array (if ever desired).
Link:
https://lore.kernel.org/all/CALO=dhfb+yboxxvr5kcsk0ifdg+e7ywko4-e+72kjbcs8jb...@mail.gmail.com
Reported-by: Jincheng Wang
Signed-off-by: Miquel Raynal
---
Changes in v2:
* Jincheng reported in private that there was a problem with small name
sizes, the last byte was lost. The reason is, dirs->entry->name_size
contains the length of the string minus one (and excluding the
trailing '\0'). The previous implementation had this handled correctly
but my initial fix did not kept the "+ 1" in place because it felt
wrong but is actually necessary. This information is actually
available in a comment a bit above in this file.
fs/squashfs/sqfs.c | 8 +---
include/fs.h | 4 +++-
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c
index b4484fa17f5..3f1030057c4 100644
--- a/fs/squashfs/sqfs.c
+++ b/fs/squashfs/sqfs.c
@@ -976,6 +976,7 @@ int sqfs_readdir(struct fs_dir_stream *fs_dirs, struct
fs_dirent **dentp)
int i_number, offset = 0, ret;
struct fs_dirent *dent;
unsigned char *ipos;
+ u16 name_size;
dirs = (struct squashfs_dir_stream *)fs_dirs;
if (!dirs->size) {
@@ -1058,9 +1059,10 @@ int sqfs_readdir(struct fs_dir_stream *fs_dirs, struct
fs_dirent **dentp)
return -SQFS_STOP_READDIR;
}
- /* Set entry name */
- strncpy(dent->name, dirs->entry->name, dirs->entry->name_size + 1);
- dent->name[dirs->entry->name_size + 1] = '\0';
+ /* Set entry name (capped at FS_DIRENT_NAME_LEN which is a U-Boot
limitation) */
+ name_size = min_t(u16, dirs->entry->name_size + 1, FS_DIRENT_NAME_LEN -
1);
+ strncpy(dent->name, dirs->entry->name, name_size);
+ dent->name[name_size] = '\0';
offset = dirs->entry->name_size + 1 + SQFS_ENTRY_BASE_LENGTH;
dirs->entry_count--;
diff --git a/include/fs.h b/include/fs.h
index b43f16a692f..2195dc172ec 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -174,6 +174,8 @@ int fs_write(const char *filename, ulong addr, loff_t
offset, loff_t len,
#define FS_DT_REG 8 /* regular file */
#define FS_DT_LNK 10/* symbolic link */
+#define FS_DIRENT_NAME_LEN 256
+
/**
* struct fs_dirent - directory entry
*
@@ -194,7 +196,7 @@ struct fs_dirent {
/** change_time:time of last modification */
struct rtc_time change_time;
/** name: file name */
- char name[256];
+ char name[FS_DIRENT_NAME_LEN];
};
/* Note: fs_dir_stream should be treated as opaque to the user of fs layer */
--
2.34.1
RE: [EXT] RE: [PATCH] i.MX8M: crypto: disable JR0 in SPL, U-Boot
Hello Andrey
> -Original Message-
> From: ZHIZHIKIN Andrey
> Sent: Wednesday, June 8, 2022 8:31 PM
> To: Gaurav Jain ; u-boot@lists.denx.de; Stefano Babic
> ; Fabio Estevam ; Tommaso Merciai
> ; Michael Trimarchi
> ; Marek Vasut ; Simon
> Glass ; Patrick Delaunay ;
> Stefan Roese ; Horia Geanta ; Pankaj
> Gupta ; Varun Sethi ; Ye Li
> ; Michael Walle
> Cc: dl-uboot-imx
> Subject: [EXT] RE: [PATCH] i.MX8M: crypto: disable JR0 in SPL, U-Boot
>
> Caution: EXT Email
>
> Hello Gaurav,
>
> Cc: Michael Walle here.
>
> I guess this is a re-incarnation of the previous discussions we had regarding
> the
> JR reservation, see [1].
>
> > -Original Message-
> > From: Gaurav Jain
> > Sent: Wednesday, June 8, 2022 3:34 PM
> > To: u-boot@lists.denx.de; Stefano Babic ; Fabio
> > Estevam ; Tommaso Merciai
> > ;
> > ZHIZHIKIN Andrey ; Michael
> > Trimarchi ; Marek Vasut ;
> > Simon Glass ; Patrick Delaunay
> > ; Stefan Roese ; Horia
> > Geanta ; Pankaj Gupta ;
> > Varun Sethi ; Ye Li
> > Cc: NXP i . MX U-Boot Team ; Gaurav Jain
> >
> > Subject: [PATCH] i.MX8M: crypto: disable JR0 in SPL, U-Boot
> >
> > disabled use of JR0 in SPL and uboot, as JR0 is reserved for HAB in
> > TF-A.
> >
> > Signed-off-by: Gaurav Jain
> > ---
> > arch/arm/dts/imx8mm-evk-u-boot.dtsi| 1 +
> > arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 1 +
> > arch/arm/dts/imx8mp-evk-u-boot.dtsi| 1 +
> > arch/arm/dts/imx8mq-evk-u-boot.dtsi| 4
>
> Shall those DTB changes be sync'd with Kernel?
>
> Now that the JR0 reservation is done in both upstream and downstream TF-A -
> Kernel would fail to initialize the JR0.
>
> This is what Fabio just noted and posted as a comment. :-)
>
> I suggest that this is submitted into Kernel, and then picked up during the
> next
> DTB re-sync.
Ok. Fabio has already submitted a patch for this.
>
> > arch/arm/include/asm/arch-imx8m/imx-regs.h | 1 +
> > drivers/crypto/fsl/jr.c| 14 +++---
> > scripts/config_whitelist.txt | 1 +
> > 7 files changed, 20 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi
> > b/arch/arm/dts/imx8mm-evk-u- boot.dtsi index e9fbf7b802..8cd37b5205
> > 100644
> > --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi
> > +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
> > @@ -74,6 +74,7 @@
> >
> > _jr0 {
> > u-boot,dm-spl;
> > + status = "disabled";
> > };
> >
> > _jr1 {
> > diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> > b/arch/arm/dts/imx8mn-ddr4- evk-u-boot.dtsi index
> > 4d0ecb07d4..0c31f2737a 100644
> > --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> > +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> > @@ -114,6 +114,7 @@
> >
> > _jr0 {
> > u-boot,dm-spl;
> > + status = "disabled";
> > };
> >
> > _jr1 {
> > diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
> > b/arch/arm/dts/imx8mp-evk-u- boot.dtsi index f43eb6238d..28dce55fb9
> > 100644
> > --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
> > +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
> > @@ -77,6 +77,7 @@
> >
> > _jr0 {
> > u-boot,dm-spl;
> > + status = "disabled";
> > };
> >
> > _jr1 {
> > diff --git a/arch/arm/dts/imx8mq-evk-u-boot.dtsi
> > b/arch/arm/dts/imx8mq-evk-u- boot.dtsi index 67da69a2eb..37364eb6b4
> > 100644
> > --- a/arch/arm/dts/imx8mq-evk-u-boot.dtsi
> > +++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi
> > @@ -18,3 +18,7 @@
> > {
> > u-boot,dm-spl;
> > };
> > +
> > +_jr0 {
> > + status = "disabled";
> > +};
> > diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h
> > b/arch/arm/include/asm/arch-imx8m/imx-regs.h
> > index 1da75528d4..e6e2974df3 100644
> > --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
> > +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
> > @@ -89,6 +89,7 @@
> > #define CONFIG_SYS_FSL_SEC_ADDR (CAAM_IPS_BASE_ADDR + \
> > CONFIG_SYS_FSL_SEC_OFFSET)
> > #define CONFIG_SYS_FSL_JR0_OFFSET (0x1000)
> > +#define CONFIG_SYS_FSL_JR1_OFFSET (0x2000)
> > #define CONFIG_SYS_FSL_JR0_ADDR (CONFIG_SYS_FSL_SEC_ADDR + \
> > CONFIG_SYS_FSL_JR0_OFFSET)
> > #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
> > diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index
> > acd29924f7..66dd9cf365 100644
> > --- a/drivers/crypto/fsl/jr.c
> > +++ b/drivers/crypto/fsl/jr.c
> > @@ -44,9 +44,17 @@ struct udevice *caam_dev; #define SEC_ADDR(idx) \
> > (ulong)((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx]))
> >
> > -#define SEC_JR0_ADDR(idx) \
> > +#ifndef CONFIG_IMX8M
> > +#define SEC_JR_ADDR(idx) \
> > (ulong)(SEC_ADDR(idx) + \
> > (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET))
> > +#define JR_ID 0
> > +#else
> > +#define SEC_JR_ADDR(idx) \
> > + (ulong)(SEC_ADDR(idx) + \
> > + (CONFIG_SYS_FSL_JR1_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET))
> > +#define JR_ID 1 #endif
>
> I
[PATCH] arm64: zynqmp: Enable DP for kv260-revA board
DP is enabled for revB and should be enabled for kv260-revA too. Changes in
other boards were done by commit 8b82a3a7feb0 ("arm64: zynqmp: Enable DP
driver for SOMs").
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
index 85994bef7cc0..8250a493c8a0 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
@@ -112,7 +112,7 @@
};
_dpsub {
- status = "disabled";
+ status = "okay";
phy-names = "dp-phy0", "dp-phy1";
phys = < 1 PHY_TYPE_DP 0 0>, < 0 PHY_TYPE_DP 1 0>;
assigned-clock-rates = <2700>, <2500>, <3>;
--
2.36.1
[PATCH v2] crypto/fsl: fsl_hash: Fix crash in flush dcache
wrong end address passed to flush_dcache_range.
modified the flush_dache logic for scatter list elements.
Fixes: 1919f58a8f (crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish)
Signed-off-by: Gaurav Jain
---
drivers/crypto/fsl/fsl_hash.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c
index 9e6829b7ad..c957f097f6 100644
--- a/drivers/crypto/fsl/fsl_hash.c
+++ b/drivers/crypto/fsl/fsl_hash.c
@@ -131,25 +131,31 @@ static int caam_hash_update(void *hash_ctx, const void
*buf,
static int caam_hash_finish(void *hash_ctx, void *dest_buf,
int size, enum caam_hash_algos caam_algo)
{
- uint32_t len = 0;
+ uint32_t len = 0, sg_entry_len;
struct sha_ctx *ctx = hash_ctx;
int i = 0, ret = 0;
+ ulong addr;
if (size < driver_hash[caam_algo].digestsize) {
return -EINVAL;
}
- for (i = 0; i < ctx->sg_num; i++)
- len += (sec_in32(>sg_tbl[i].len_flag) &
- SG_ENTRY_LENGTH_MASK);
-
+ flush_dcache_range((ulong)ctx->sg_tbl,
+ (ulong)(ctx->sg_tbl) + (ctx->sg_num * sizeof(struct
sg_entry)));
+ for (i = 0; i < ctx->sg_num; i++) {
+ sg_entry_len = (sec_in32(>sg_tbl[i].len_flag) &
+ SG_ENTRY_LENGTH_MASK);
+ len += sg_entry_len;
+ addr = sec_in32(>sg_tbl[i].addr_hi);
+ addr = (addr << 32) | sec_in32(>sg_tbl[i].addr_lo);
+ flush_dcache_range((ulong)addr, (ulong)addr + sg_entry_len);
+ }
inline_cnstr_jobdesc_hash(ctx->sha_desc, (uint8_t *)ctx->sg_tbl, len,
ctx->hash,
driver_hash[caam_algo].alg_type,
driver_hash[caam_algo].digestsize,
1);
- flush_dcache_range((ulong)ctx->sg_tbl, (ulong)(ctx->sg_tbl) + len);
flush_dcache_range((ulong)ctx->sha_desc,
(ulong)(ctx->sha_desc) + (sizeof(uint32_t) *
MAX_CAAM_DESCSIZE));
flush_dcache_range((ulong)ctx->hash,
--
2.25.1
imx6sabresd: Board hangs when CONFIG_IMX_HAB=y
Hi, Enabling IMX_HAB in mx6sabresd_defconfig: --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -122,3 +122,5 @@ CONFIG_VIDEO_IPUV3=y CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y CONFIG_BMP_16BPP=y +CONFIG_IMX_HAB=y +CONFIG_SPL_DRIVERS_MISC=y causes the following hang in SPL: U-Boot SPL 2022.07-rc3-00096-g5ff62f64ae (Jun 09 2022 - 08:48:45 -0300) Trying to boot from MMC1 hab fuse not enabled Authenticate image from DDR location 0x177fcd40... bad magic magic=0x10 length=0xe825 version=0xb2 bad length magic=0x10 length=0xe825 version=0xb2 bad version magic=0x10 length=0xe825 version=0xb2 Error: Invalid IVT structure Does anyone have any suggestions on how to fix the SPL hang? Thanks, Fabio Estevam
[PATCH v5 23/23] sandbox: fwu: Add support for testing FWU feature on sandbox
Add a python test script for testing the FWU Multi Bank Update
functionality on the sandbox platform. The script has test cases for
updation of the u-boot binary and the u-boot environment image to the
non active bank.
The FWU metadata is being stored on the SPI NOR flash, along with the
updatable images, and the FWU metadata driver for MTD devices is being
used for accessing the metadata. Certain FWU boottime checks are
bypassed due to the unavailability of the EFI variable access very
early in the boot on the sandbox platform -- the variable access is
only available once the block disk image has been bound through the
host interface.
The FWU Multi Bank feature being enabled on the sandbox64 platform is
enabling the RAW Firmware Management Protocol(FMP) instance, therefore
the FIT FMP instance is being removed -- the FIT FMP is already being
tested on the sandbox flattree variant.
Signed-off-by: Sughosh Ganu
---
arch/sandbox/Kconfig | 6 +
arch/sandbox/dts/test.dts | 45 ++-
board/sandbox/sandbox.c | 49 +++
configs/sandbox64_defconfig | 12 +-
include/fwu.h | 2 +
lib/fwu_updates/Kconfig | 2 +-
lib/fwu_updates/fwu.c | 18 +-
lib/fwu_updates/fwu_mtd.c | 10 +-
.../test_capsule_firmware_fit.py | 1 -
.../py/tests/test_fwu_updates/capsule_defs.py | 10 +
test/py/tests/test_fwu_updates/conftest.py| 78
.../test_fwu_updates/test_fwu_updates.py | 367 ++
12 files changed, 587 insertions(+), 13 deletions(-)
create mode 100644 test/py/tests/test_fwu_updates/capsule_defs.py
create mode 100644 test/py/tests/test_fwu_updates/conftest.py
create mode 100644 test/py/tests/test_fwu_updates/test_fwu_updates.py
diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig
index 5f55c7f28e..2985572083 100644
--- a/arch/sandbox/Kconfig
+++ b/arch/sandbox/Kconfig
@@ -84,3 +84,9 @@ config SYS_FDT_LOAD_ADDR
See `doc/arch/sandbox.rst` for more information.
endmenu
+
+config FWU_NUM_BANKS
+ default 2
+
+config FWU_NUM_IMAGES_PER_BANK
+ default 2
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 8f93775ff4..f11fa8733f 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1145,11 +1145,48 @@
pinctrl-names = "default";
pinctrl-0 = <_spi0_pins>;
- spi.bin@0 {
+ spi0: spi.bin@0 {
reg = <0>;
compatible = "spansion,m25p16", "jedec,spi-nor";
spi-max-frequency = <4000>;
sandbox,filename = "spi.bin";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ uuid = "af9e8c96-bec5-48be-9dab-3491c04b1366";
+
+ partition@0 {
+ label = "Metadata";
+ reg = <0x0 0x2>;
+ };
+
+ /* FWU Multi bank update partitions */
+ partition@10 {
+ label = "U-Boot-Bank0";
+ reg = <0x10 0x1>;
+ uuid =
"a8f61787-5d68-4c9d-9e4a-37bb0df99da7";
+ };
+
+ partition@12 {
+ label = "U-Boot-ENV-Bank0";
+ reg = <0x12 0x1>;
+ uuid =
"ea9d59af-e0e8-4ef5-9b16-4c80ff67524c";
+ };
+
+ partition@14 {
+ label = "U-Boot-Bank1";
+ reg = <0x14 0x1>;
+ uuid =
"52377abf-c4e4-4d0b-aafd-ba081a500847";
+ };
+
+ partition@16 {
+ label = "U-Boot-ENV-Bank1";
+ reg = <0x16 0x1>;
+ uuid =
"4e01d1fa-eebb-437e-9cfe-e7dfbcd04bb3";
+ };
+ };
};
spi.bin@1 {
reg = <1>;
@@ -1633,6 +1670,12 @@
compatible = "sandbox,regmap_test";
};
};
+
+ fwu-mdata {
+ compatible = "u-boot,fwu-mdata-mtd";
+ fwu-mdata-store = <>;
+ mdata-offsets = <0x0 0x1>;
+ };
};
#include
[PATCH v5 22/23] [TEMP]configs: synquacer: Add FWU support for DeveloperBox
From: Masami Hiramatsu Enable FWU Multi-Bank support for DeveloperBox SynQuacer platform. This also enables fwu_metadata_read command and "reboot soon after update" option. Signed-off-by: Masami Hiramatsu --- Changes in v3: - Use CONFIG_FWU_MDATA_MTD. - Remove unused CONFIG_FWU_INIT_BROKEN_METADATA and add CONFIG_TOOLS_MKFWUMDATA. Signed-off-by: Sughosh Ganu --- configs/synquacer_developerbox_defconfig | 5 + 1 file changed, 5 insertions(+) diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig index 29b1e11401..f2c8c3cc4e 100644 --- a/configs/synquacer_developerbox_defconfig +++ b/configs/synquacer_developerbox_defconfig @@ -94,3 +94,8 @@ CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y CONFIG_EFI_IGNORE_OSINDICATIONS=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y +CONFIG_EFI_SECURE_BOOT=y +CONFIG_FWU_MULTI_BANK_UPDATE=y +CONFIG_FWU_MDATA_MTD=y +CONFIG_CMD_FWU_METADATA=y +CONFIG_TOOLS_MKFWUMDATA=y -- 2.25.1
[PATCH v5 21/23] doc: synquacer: Add how to enable FWU Multi Bank Update
From: Masami Hiramatsu
Add a section for the instruction of building the FWU Multi Bank
Update supported U-Boot and installation.
Signed-off-by: Masami Hiramatsu
Signed-off-by: Sughosh Ganu
---
doc/board/socionext/developerbox.rst | 110 +++
1 file changed, 110 insertions(+)
diff --git a/doc/board/socionext/developerbox.rst
b/doc/board/socionext/developerbox.rst
index 2d943c23be..d9f38a3897 100644
--- a/doc/board/socionext/developerbox.rst
+++ b/doc/board/socionext/developerbox.rst
@@ -85,3 +85,113 @@ Once the flasher tool is running we are ready flash the
UEFI image::
After transferring the SPI_NOR_UBOOT.fd, turn off the DSW2-7 and reset the
board.
+
+Enable FWU Multi Bank Update
+
+
+DeveloperBox supports the FWU Multi Bank Update. You *MUST* update both *SCP
firmware* and *TF-A* for this feature. This will change the layout and the boot
process but you can switch back to the normal one by changing the DSW 1-4 off.
+
+Configure U-Boot
+
+
+To enable the FWU Multi Bank Update on the DeveloperBox, you need to add
following configurations to configs/synquacer_developerbox_defconfig ::
+
+ CONFIG_FWU_MULTI_BANK_UPDATE=y
+ CONFIG_FWU_MDATA_MTD=y
+ CONFIG_CMD_FWU_METADATA=y
+ CONFIG_TOOLS_MKFWUMDATA=y
+
+And build it::
+
+ cd u-boot/
+ export ARCH=arm64
+ export CROSS_COMPILE=aarch64-linux-gnu-
+ make synqucer_developerbox_defconfig
+ make -j `noproc`
+ cd ../
+
+By default, the CONFIG_FWU_NUM_BANKS and COFNIG_FWU_NUM_IMAGES_PER_BANKS are
set to 2 and 1 respectively. This uses FIP (Firmware Image Package) type image
which contains TF-A, U-Boot and OP-TEE (the OP-TEE is optional.)
+You can use fiptool to compose the FIP image from those firmware images.
+
+Rebuild SCP firmware
+
+
+Rebuild SCP firmware which supports FWU Multi Bank Update as below::
+
+ cd SCP-firmware/
+ OUT=./build/product/synquacer
+ ROMFW_FILE=$OUT/scp_romfw/$SCP_BUILD_MODE/bin/scp_romfw.bin
+ RAMFW_FILE=$OUT/scp_ramfw/$SCP_BUILD_MODE/bin/scp_ramfw.bin
+ ROMRAMFW_FILE=scp_romramfw_release.bin
+
+ make CC=$ARM_EMB_GCC PRODUCT=synquacer MODE=release
+ tr "\000" "\377" < /dev/zero | dd of=${ROMRAMFW_FILE} bs=1 count=196608
+ dd if=${ROMFW_FILE} of=${ROMRAMFW_FILE} bs=1 conv=notrunc seek=0
+ dd if=${RAMFW_FILE} of=${ROMRAMFW_FILE} bs=1 seek=65536
+ cd ../
+
+And you can get the `scp_romramfw_release.bin` file
+
+Rebuild TF-A and FIP
+
+
+Rebuild TF-A which supports FWU Multi Bank Update as below::
+
+ cd arm-trusted-firmware/
+ make CROSS_COMPILE=aarch64-linux-gnu- -j`nproc` PLAT=synquacer \
+ SPD=opteed SQ_RESET_TO_BL2=1 GENERATE_COT=1 MBEDTLS_DIR=../mbedtls \
+ BL33=../u-boot/u-boot.bin all fip fiptool
+
+And make a FIP image.::
+
+ cp build/synquacer/release/fip.bin SPI_NOR_NEWFIP.fd
+ tools/fiptool/fiptool update --tb-fw build/synquacer/release/bl2.bin
SPI_NOR_NEWFIP.fd
+
+
+UUIDs for the FWU Multi Bank Update
+---
+
+FWU multi-bank update requires some UUIDs. The DeveloperBox platform uses
following UUIDs.
+
+ - Location UUID for the FIP image: 17e86d77-41f9-4fd7-87ec-a55df9842de5
+ - Image type UUID for the FIP image: 10c36d7d-ca52-b843-b7b9-f9d6c501d108
+ - Image UUID for Bank0 : 5a66a702-99fd-4fef-a392-c26e261a2828
+ - Image UUID for Bank1 : a8f868a1-6e5c-4757-878d-ce63375ef2c0
+
+These UUIDs are used for making a FWU metadata image.
+
+Generate FWU metadata image
+---
+
+Before installation, you need to generate a FWU metadata image file by
mkfwumdata command as below::
+
+ tools/mkfwumdata -i 1 -b 2
"17e86d77-41f9-4fd7-87ec-a55df9842de5,10c36d7d-ca52-b843-b7b9-f9d6c501d108,5a66a702-99fd-4fef-a392-c26e261a2828,a8f868a1-6e5c-4757-878d-ce63375ef2c0"
fwu-mdata.img
+
+Then, you can get the `fwu-mdata.img` image file.
+
+Install via flash writer
+
+
+As explained in above section, the new FIP image and the FWU metadata image
can be installed via NOR flash writer. Note that the installation offsets for
the FWU multi bank update supported firmware.
+
+Once the flasher tool is running we are ready flash the images. At first,
please install FWU metadata at 0x50 (primary) and 0x53 (secondary).::
+
+ flash rawwrite 50 60
+ >> Send fwu-mdata.img via XMODEM (Control-A S in minicom) <<
+
+ flash rawwrite 53 60
+ >> Send fwu-mdata.img via XMODEM (Control-A S in minicom) <<
+
+And write the FIP image to the 0x60 offset.::
+
+ flash rawwrite 60 18
+ >> Send SPI_NOR_NEWFIP.fd via XMODEM (Control-A S in minicom) <<
+
+And write the new SCP firmware.::
+
+ flash write cm3
+ >> Send scp_romramfw_release.bin via XMODEM (Control-A S in minicom) <<
+
+At last, turn on the DSW 3-4 on the board, and reboot.
+Note that if DSW 3-4 is turned off, the DeveloperBox will boot from
+the original EDK2 firmware (or non-FWU U-Boot if you already installed.)
--
2.25.1
[PATCH v5 20/23] FWU: synquacer: Generate dfu_alt_info from devicetree partition
From: Masami Hiramatsu
Generate dfu_alt_info from the partition uuid information in the
devicetree, and record the mapping of partition uuid and the
index of dfu_alt_num.
This could be a reference implementation of the automatic DFU
generation for FWU multi-bank update for non GPT firmware
platforms.
Signed-off-by: Masami Hiramatsu
Signed-off-by: Sughosh Ganu
---
.../synquacer-sc2a11-developerbox-u-boot.dtsi | 3 +
board/socionext/developerbox/Kconfig | 1 +
board/socionext/developerbox/fwu_plat.c | 79
include/configs/synquacer.h | 6 +-
include/fwu.h | 6 +
lib/fwu_updates/Makefile | 1 +
lib/fwu_updates/fwu_mtd.c | 173 ++
7 files changed, 221 insertions(+), 48 deletions(-)
create mode 100644 lib/fwu_updates/fwu_mtd.c
diff --git a/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
b/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
index ab4e3d1c2b..c7ec8a0321 100644
--- a/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
+++ b/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
@@ -36,6 +36,7 @@
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
+ uuid = "17e86d77-41f9-4fd7-87ec-a55df9842de5";
partition@0 {
label = "BootStrap-BL1";
@@ -88,10 +89,12 @@
partition@60 {
label = "FIP-Bank0";
reg = <0x60 0x40>;
+ uuid =
"5a66a702-99fd-4fef-a392-c26e261a2828";
};
partition@a0 {
label = "FIP-Bank1";
reg = <0xa0 0x40>;
+ uuid =
"a8f868a1-6e5c-4757-878d-ce63375ef2c0";
};
};
};
diff --git a/board/socionext/developerbox/Kconfig
b/board/socionext/developerbox/Kconfig
index 7df6750baf..ad2a284f13 100644
--- a/board/socionext/developerbox/Kconfig
+++ b/board/socionext/developerbox/Kconfig
@@ -38,6 +38,7 @@ config FWU_MULTI_BANK_UPDATE
select DM_SPI_FLASH
select DM_FWU_MDATA
select BOARD_LATE_INIT
+ select SET_DFU_ALT_INFO
config FWU_NUM_BANKS
default 2
diff --git a/board/socionext/developerbox/fwu_plat.c
b/board/socionext/developerbox/fwu_plat.c
index fd6d0e3659..ff06eade7d 100644
--- a/board/socionext/developerbox/fwu_plat.c
+++ b/board/socionext/developerbox/fwu_plat.c
@@ -10,8 +10,10 @@
#include
#include
#include
+#include
#include
#include
+#include
#include
#include
@@ -94,6 +96,36 @@ static int sf_save_data(u32 offs, u32 size, void *data)
return ret;
}
+#define DFU_ALT_BUF_LEN 256
+#define DFU_ALT_NUM_MAX (CONFIG_FWU_NUM_IMAGES_PER_BANK * CONFIG_FWU_NUM_BANKS)
+
+/* Generate dfu_alt_info from partitions */
+void set_dfu_alt_info(char *interface, char *devstr)
+{
+ int ret;
+ struct mtd_info *mtd;
+ static char *buf = NULL;
+
+ if (!buf) {
+ buf = malloc_cache_aligned(DFU_ALT_BUF_LEN);
+ memset(buf, 0, DFU_ALT_BUF_LEN);
+
+ mtd_probe_devices();
+
+ mtd = get_mtd_device_nm("nor1");
+ if (IS_ERR_OR_NULL(mtd))
+ return;
+
+ ret = fwu_gen_alt_info_from_mtd(buf, DFU_ALT_BUF_LEN, mtd);
+ if (ret < 0) {
+ log_err("Error: Failed to generate dfu_alt_info.
(%d)\n", ret);
+ return;
+ }
+ log_debug("Make dfu_alt_info: '%s'\n", buf);
+ }
+ env_set("dfu_alt_info", buf);
+}
+
#define PLAT_METADATA_OFFSET 0x51
#define PLAT_METADATA_SIZE (sizeof(struct devbox_metadata))
@@ -105,49 +137,7 @@ struct __packed devbox_metadata {
int fwu_plat_get_alt_num(struct udevice __always_unused *dev,
efi_guid_t *image_id, int *alt_num)
{
- struct fwu_image_bank_info *bank;
- struct fwu_mdata *mdata;
- int i, ret;
-
- ret = fwu_get_mdata();
- if (ret < 0)
- return ret;
-
- /*
-* DeveloperBox FWU expects Bank:Image = 1:1, and the dfu_alt_info
-* only has the entries for banks. Thus the alt_no should be equal
-* to the bank index number.
-*/
- ret = -ENOENT;
- for (i = 0; i < CONFIG_FWU_NUM_BANKS; i++) {
- bank = >img_entry[0].img_bank_info[i];
- if (guidcmp(image_id, >image_uuid) == 0) {
- *alt_num = i;
- ret = 0;
-
[PATCH v5 19/23] FWU: synquacer: Add FWU Multi bank update support for DeveloperBox
From: Masami Hiramatsu
The DeveloperBox platform can support the FWU Multi bank
update. SCP firmware will switch the boot mode by DSW3-4
and load the Multi bank update supported TF-A BL2 from
0x60 offset on the SPI flash. Thus it can co-exist
with the legacy boot mode (legacy U-Boot or EDK2).
Signed-off-by: Masami Hiramatsu
---
Changes in v3:
- Change devicetree to add partitions.
- Update fwu_plat_get_alt_num() to find the alt number from the bank index.
- Use only 2 partitions for AB update.
- Clear platform-mdata's boot_count to finish platform trial boot.
Signed-off-by: Sughosh Ganu
---
.../synquacer-sc2a11-developerbox-u-boot.dtsi | 15 +-
board/socionext/developerbox/Kconfig | 13 ++
board/socionext/developerbox/Makefile | 1 +
board/socionext/developerbox/fwu_plat.c | 207 ++
include/configs/synquacer.h | 8 +
5 files changed, 241 insertions(+), 3 deletions(-)
create mode 100644 board/socionext/developerbox/fwu_plat.c
diff --git a/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
b/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
index 095727e03c..ab4e3d1c2b 100644
--- a/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
+++ b/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
@@ -23,7 +23,7 @@
active_clk_edges;
chipselect_num = <1>;
- spi-flash@0 {
+ spi_flash: spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -84,11 +84,15 @@
label = "UBoot-Env";
reg = <0x58 0x8>;
};
-
+ /* FWU Multi bank update partitions */
partition@60 {
- label = "FIP";
+ label = "FIP-Bank0";
reg = <0x60 0x40>;
};
+ partition@a0 {
+ label = "FIP-Bank1";
+ reg = <0xa0 0x40>;
+ };
};
};
};
@@ -114,6 +118,11 @@
optee {
status = "okay";
};
+ fwu-mdata {
+ compatible = "u-boot,fwu-mdata-mtd";
+ fwu-mdata-store = <_flash>;
+ mdata-offsets = <0x50 0x53>;
+ };
};
};
diff --git a/board/socionext/developerbox/Kconfig
b/board/socionext/developerbox/Kconfig
index c181d26a44..7df6750baf 100644
--- a/board/socionext/developerbox/Kconfig
+++ b/board/socionext/developerbox/Kconfig
@@ -32,4 +32,17 @@ config SYS_CONFIG_NAME
default "synquacer"
endif
+
+config FWU_MULTI_BANK_UPDATE
+ select FWU_MDATA_MTD
+ select DM_SPI_FLASH
+ select DM_FWU_MDATA
+ select BOARD_LATE_INIT
+
+config FWU_NUM_BANKS
+ default 2
+
+config FWU_NUM_IMAGES_PER_BANK
+ default 1
+
endif
diff --git a/board/socionext/developerbox/Makefile
b/board/socionext/developerbox/Makefile
index 4a46de995a..9b80ee38e7 100644
--- a/board/socionext/developerbox/Makefile
+++ b/board/socionext/developerbox/Makefile
@@ -7,3 +7,4 @@
#
obj-y := developerbox.o
+obj-$(CONFIG_FWU_MULTI_BANK_UPDATE) += fwu_plat.o
diff --git a/board/socionext/developerbox/fwu_plat.c
b/board/socionext/developerbox/fwu_plat.c
new file mode 100644
index 00..fd6d0e3659
--- /dev/null
+++ b/board/socionext/developerbox/fwu_plat.c
@@ -0,0 +1,207 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021, Linaro Limited
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+/* SPI Flash accessors */
+static struct spi_flash *plat_spi_flash;
+
+static int __plat_sf_get_flash(void)
+{
+ /* TODO: define platform spi-flash somewhere. */
+ plat_spi_flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
+CONFIG_SF_DEFAULT_CS,
+CONFIG_SF_DEFAULT_SPEED,
+CONFIG_SF_DEFAULT_MODE);
+
+ return 0;
+}
+
+static int plat_sf_get_flash(struct spi_flash **flash)
+{
+ int ret = 0;
+
+ if (!plat_spi_flash)
+ ret = __plat_sf_get_flash();
+
+ *flash = plat_spi_flash;
+
+ return ret;
+}
+
+static int sf_load_data(u32 offs, u32 size, void **data)
+{
+ struct spi_flash *flash;
+ int ret;
+
+ ret = plat_sf_get_flash();
+ if (ret < 0)
+ return ret;
+
+ *data = memalign(ARCH_DMA_MINALIGN, size);
+ if (!*data)
+
[PATCH v5 18/23] developerbox: synquacer: Use FIP as the updatable image
From: Jassi Brar
The Synquacer board is migrating to using the FIP as the only
updatable image on the platform with the u-boot and op-tee images
packaged as part of the FIP image. Make changes to the structures used
for capsule updates to reflect this change.
Signed-off-by: Jassi Brar
Signed-off-by: Sughosh Ganu
---
board/socionext/developerbox/developerbox.c | 17 +++--
include/configs/synquacer.h | 13 ++---
2 files changed, 5 insertions(+), 25 deletions(-)
diff --git a/board/socionext/developerbox/developerbox.c
b/board/socionext/developerbox/developerbox.c
index f5a5fe0121..b946428ddb 100644
--- a/board/socionext/developerbox/developerbox.c
+++ b/board/socionext/developerbox/developerbox.c
@@ -20,27 +20,16 @@
#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
struct efi_fw_image fw_images[] = {
- {
- .image_type_id = DEVELOPERBOX_UBOOT_IMAGE_GUID,
- .fw_name = u"DEVELOPERBOX-UBOOT",
- .image_index = 1,
- },
{
.image_type_id = DEVELOPERBOX_FIP_IMAGE_GUID,
.fw_name = u"DEVELOPERBOX-FIP",
- .image_index = 2,
- },
- {
- .image_type_id = DEVELOPERBOX_OPTEE_IMAGE_GUID,
- .fw_name = u"DEVELOPERBOX-OPTEE",
- .image_index = 3,
+ .image_index = 1,
},
};
struct efi_capsule_update_info update_info = {
- .dfu_string = "mtd nor1=u-boot.bin raw 20 10;"
- "fip.bin raw 18 78000;"
- "optee.bin raw 50 10",
+ .dfu_string = "mtd nor1=bank0 raw 60 40;"
+ "bank1 raw a0 40;",
.images = fw_images,
};
diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h
index 572f0a42ac..eafcc69e12 100644
--- a/include/configs/synquacer.h
+++ b/include/configs/synquacer.h
@@ -50,18 +50,9 @@
"mtd nor1=fip.bin raw 60 40\0"
/* GUIDs for capsule updatable firmware images */
-#define DEVELOPERBOX_UBOOT_IMAGE_GUID \
- EFI_GUID(0x53a92e83, 0x4ef4, 0x473a, 0x8b, 0x0d, \
-0xb5, 0xd8, 0xc7, 0xb2, 0xd6, 0x00)
-
#define DEVELOPERBOX_FIP_IMAGE_GUID \
- EFI_GUID(0x880866e9, 0x84ba, 0x4793, 0xa9, 0x08, \
-0x33, 0xe0, 0xb9, 0x16, 0xf3, 0x98)
-
-#define DEVELOPERBOX_OPTEE_IMAGE_GUID \
- EFI_GUID(0xc1b629f1, 0xce0e, 0x4894, 0x82, 0xbf, \
-0xf0, 0xa3, 0x83, 0x87, 0xe6, 0x30)
-
+ EFI_GUID(0x7d6dc310, 0x52ca, 0x43b8, 0xb7, 0xb9, \
+0xf9, 0xd6, 0xc5, 0x01, 0xd1, 0x08)
/* Distro boot settings */
#ifndef CONFIG_SPL_BUILD
#ifdef CONFIG_CMD_USB
--
2.25.1
[PATCH v5 16/23] FWU: doc: Update documentation for the FWU non-GPT MTD
From: Masami Hiramatsu Update documentation for the FWU non-GPT MTD device and mkfwumdata command. Signed-off-by: Masami Hiramatsu Signed-off-by: Sughosh Ganu --- doc/develop/uefi/fwu_updates.rst | 82 +++- 1 file changed, 70 insertions(+), 12 deletions(-) diff --git a/doc/develop/uefi/fwu_updates.rst b/doc/develop/uefi/fwu_updates.rst index 1c34beb7d5..1ea54328d1 100644 --- a/doc/develop/uefi/fwu_updates.rst +++ b/doc/develop/uefi/fwu_updates.rst @@ -15,10 +15,11 @@ boot. The UEFI capsule-on-disk update feature is used for performing the actual updates of the updatable firmware images. The bookkeeping of the updatable images is done through a structure -called metadata. Currently, the FWU metadata supports identification +called FWU metadata. Currently, the FWU metadata supports identification of images based on image GUIDs stored on a GPT partitioned storage -media. There are plans to extend the metadata structure for non GPT -partitioned devices as well. +media. If the firmware images are stored on the flash device which +has no GPT, the platform driver can provide the image identification +feature. Accessing the FWU metadata is done through generic API's which are defined in a driver which complies with the u-boot's driver model. A @@ -43,21 +44,31 @@ The feature can be enabled by specifying the following configs:: CONFIG_FWU_MULTI_BANK_UPDATE=y CONFIG_CMD_FWU_METADATA=y CONFIG_DM_FWU_MDATA=y -CONFIG_FWU_MDATA_GPT_BLK=y CONFIG_FWU_NUM_BANKS= CONFIG_FWU_NUM_IMAGES_PER_BANK= +CONFIG_TOOLS_MKFWUMDATA=y + +CONFIG_FWU_MDATA_GPT_BLK=y +CONFIG_FWU_MDATA_SF=y -in the .config file +in the .config file. The first group of configs enable the UEFI capsule-on-disk update functionality. The second group of configs enable the FWU Multi Bank -Update functionality. Please refer to the section -:ref:`uefi_capsule_update_ref` for more details on generation of the -UEFI capsule. +Update functionality. And the third group of configs are FWU Metadata +drivers. You can enable either one of ``CONFIG_FWU_MDATA_GPT_BLK`` and +``CONFIG_FWU_MDATA_SF`` or both of them, according to the platform +support. Anyway, a correct driver will be probed by devicetree node. + +Please refer to the section :ref:`uefi_capsule_update_ref` for +more details on generation of the UEFI capsule. Setting up the device for GPT partitioned storage - +If your platform stores the firmware on GPT partitioned storage +device (e.g. eMMC/SD), please follow this section. + Before enabling the functionality in U-Boot, certain changes are required to be done on the storage device. Assuming a GPT partitioned storage device, the storage media needs to be partitioned with the @@ -74,7 +85,14 @@ media can have additional partitions of non-updatable images, like the EFI System Partition(ESP), a partition for the root file system etc. When generating the partitions, a few aspects need to be taken care -of. Each GPT partition entry in the GPT header has two GUIDs:: +of. The GPT itself has one GUID:: + +*DiskGUID* + +This DiskGUID value should correspond to the *location_uuid* field +of the FWU metadata. + +And each GPT partition entry in the GPT header has two GUIDs:: *PartitionTypeGUID* *UniquePartitionGUID* @@ -93,9 +111,49 @@ Similarly, the FWU specifications defines the GUID value to be used for the metadata partitions. This would be the PartitionTypeGUID for the metadata partitions. -When generating the metadata, the *image_type_uuid* and the -*image_uuid* values should match the *PartitionTypeGUID* and the -*UniquePartitionGUID* values respectively. +Setting up the device for non-GPT partitioned MTD device + + +If your platform stores the firmware on non-GPT partitioned MTD +device, please follow this section. + +Before enabling the functionality in U-Boot, please confirm that +your platform correctly define (or generate) `dfu_alt_info`, which +has to have all *banks* as the dfu entries. Also, the devicetree's +`fwu_mdata` node must be "u-boot,fwu-mdata-mtd" compatible node +and has FWU metadata offsets on `mdata-offsets` property. +Please refer to U-Boot +`doc `__ for +the device tree bindings. + +Similar to the GPT, you can also define the DiskGUID, and the +UniquePartitionGUID in the devicetree as additional properties of +the "fixed-partitions" compatible partition nodes, and the platform +code can generate the `dfu_alt_info` from that. In this case, +*image_type_uuid* field of the FWU mdata is used instead of the +PartitionTypeGUID. + +Generate the FWU metadata image +--- + +To generate the FWU metadata raw image, you can use `tools/mkfwumdata` +command. + + tools/mkfwumdata -i <#images> -b <#banks> \ +\ + [location_uuid1,image_type_uuid1,image_uuid1_0,image_uuid1_1,...] \ + + +Or, if you know
[PATCH v5 17/23] synquacer: Update for TBBR (BL2) based new FIP layout
From: Masami Hiramatsu
This changes SPI NOR flash partition layout for TBBR and
also make the U-Boot as position independent executable
again because BL33 is loaded on the memory.
With enabling TBBR, TF-A BL2 loads all BL3x images from
FIP image, and the U-Boot image is added to the FIP image
as BL33, and loaded to memory when boot instead of XIP
on SPI NOR flash. To avoid mixing up with the legacy images,
this new FIP image is stored on unused area (0x60-) and
the U-Boot env vars are also stored at 0x58 so that
it will not break existing EDK2 area.
NOTE: This introduces an incombatible change to the
synquacer_developerbox_defconfig. If you want to build
U-Boot for booting from legacy FIP image, you need to
specify previous configuration.
Signed-off-by: Masami Hiramatsu
Signed-off-by: Sughosh Ganu
---
.../synquacer-sc2a11-developerbox-u-boot.dtsi | 26 +--
configs/synquacer_developerbox_defconfig | 5 ++--
include/configs/synquacer.h | 4 +--
3 files changed, 22 insertions(+), 13 deletions(-)
diff --git a/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
b/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
index 7a56116d6f..095727e03c 100644
--- a/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
+++ b/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
@@ -56,7 +56,7 @@
};
partition@18 {
- label = "FIP-TFA";
+ label = "LegacyFIP";
reg = <0x18 0x78000>;
};
@@ -66,18 +66,28 @@
};
partition@20 {
- label = "U-Boot";
- reg = <0x20 0x10>;
+ label = "EDK2";
+ reg = <0x20 0x20>;
};
- partition@30 {
- label = "UBoot-Env";
- reg = <0x30 0x10>;
+ partition@40 {
+ label = "EDK2-Env";
+ reg = <0x40 0x10>;
};
partition@50 {
- label = "Ex-OPTEE";
- reg = <0x50 0x20>;
+ label = "Metadata";
+ reg = <0x50 0x8>;
+ };
+
+ partition@58 {
+ label = "UBoot-Env";
+ reg = <0x58 0x8>;
+ };
+
+ partition@60 {
+ label = "FIP";
+ reg = <0x60 0x40>;
};
};
};
diff --git a/configs/synquacer_developerbox_defconfig
b/configs/synquacer_developerbox_defconfig
index add6041e27..29b1e11401 100644
--- a/configs/synquacer_developerbox_defconfig
+++ b/configs/synquacer_developerbox_defconfig
@@ -1,10 +1,11 @@
CONFIG_ARM=y
CONFIG_ARCH_SYNQUACER=y
-CONFIG_SYS_TEXT_BASE=0x0820
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_SYS_TEXT_BASE=0
CONFIG_SYS_MALLOC_LEN=0x100
CONFIG_SYS_MALLOC_F_LEN=0x400
CONFIG_ENV_SIZE=0x3
-CONFIG_ENV_OFFSET=0x30
+CONFIG_ENV_OFFSET=0x58
CONFIG_ENV_SECT_SIZE=0x1
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="synquacer-sc2a11-developerbox"
diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h
index 5686a5b910..572f0a42ac 100644
--- a/include/configs/synquacer.h
+++ b/include/configs/synquacer.h
@@ -47,9 +47,7 @@
/* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */
#define DEFAULT_DFU_ALT_INFO "dfu_alt_info=" \
- "mtd nor1=u-boot.bin raw 20 10;"\
- "fip.bin raw 18 78000;" \
- "optee.bin raw 50 10\0"
+ "mtd nor1=fip.bin raw 60 40\0"
/* GUIDs for capsule updatable firmware images */
#define DEVELOPERBOX_UBOOT_IMAGE_GUID \
--
2.25.1
[PATCH v5 15/23] tools: Add mkfwumdata tool for FWU metadata image
From: Masami Hiramatsu
Add 'mkfwumdata' tool which can generate an image of the FWU metadata
which is required for initializing the platform.
Usage:
mkfwumdata -i NR_IMAGES -b NR_BANKS [--guid] \
LOCATION_UUID0,IMAGE_TYPE_UUID0,BANK0_IMAGE_UUID[,BANK1_IMAGE_UUID[,...]] \
LOCATION_UUID1,... \
IMAGE_FILE
'-i' takes the number of images and '-b' takes the number of
banks. This takes lists of uuids for the images on arguments,
and the last argument must be the output image file name.
'--guid' (or '-g' in short) allows user to specify the location UUID
and image IDs in GUID instead of UUID. This option is useful if the
platform uses GPT partiotion. In this case, the UUID list
(for an image) becomes;
DiskGUID,ParitionTypeGUID,UniquePartitionGUID,...
Signed-off-by: Masami Hiramatsu
Signed-off-by: Sughosh Ganu
---
tools/Kconfig | 9 ++
tools/Makefile | 4 +
tools/mkfwumdata.c | 298 +
3 files changed, 311 insertions(+)
create mode 100644 tools/mkfwumdata.c
diff --git a/tools/Kconfig b/tools/Kconfig
index 117c921da3..3484be99d0 100644
--- a/tools/Kconfig
+++ b/tools/Kconfig
@@ -98,4 +98,13 @@ config TOOLS_MKEFICAPSULE
optionally sign that file. If you want to enable UEFI capsule
update feature on your target, you certainly need this.
+config TOOLS_MKFWUMDATA
+ bool "Build mkfwumdata command"
+ default y if FWU_MULTI_BANK_UPDATE
+ help
+ This command allows users to create a raw image of the FWU
+ metadata for initial installation of the FWU multi bank
+ update on the board. The installation method depends on
+ the platform.
+
endmenu
diff --git a/tools/Makefile b/tools/Makefile
index 9f2339666a..cd39e5ff6f 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -245,6 +245,10 @@ HOSTCFLAGS_asn1_compiler.o = -idirafter $(srctree)/include
HOSTLDLIBS_mkeficapsule += -lgnutls -luuid
hostprogs-$(CONFIG_TOOLS_MKEFICAPSULE) += mkeficapsule
+mkfwumdata-objs := mkfwumdata.o lib/crc32.o
+HOSTLDLIBS_mkfwumdata += -luuid
+hostprogs-$(CONFIG_TOOLS_MKFWUMDATA) += mkfwumdata
+
# We build some files with extra pedantic flags to try to minimize things
# that won't build on some weird host compiler -- though there are lots of
# exceptions for files that aren't complaint.
diff --git a/tools/mkfwumdata.c b/tools/mkfwumdata.c
new file mode 100644
index 00..4eb304cae3
--- /dev/null
+++ b/tools/mkfwumdata.c
@@ -0,0 +1,298 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* This will dynamically allocate the fwu_mdata */
+#define CONFIG_FWU_NUM_BANKS 0
+#define CONFIG_FWU_NUM_IMAGES_PER_BANK 0
+
+/* Since we can not include fwu.h, redefine version here. */
+#define FWU_MDATA_VERSION 1
+
+typedef uint8_t u8;
+typedef int16_t s16;
+typedef uint16_t u16;
+typedef uint32_t u32;
+typedef uint64_t u64;
+
+#include
+
+/* TODO: Endianess conversion may be required for some arch. */
+
+static const char *opts_short = "b:i:a:gh";
+
+static struct option options[] = {
+ {"banks", required_argument, NULL, 'b'},
+ {"images", required_argument, NULL, 'i'},
+ {"guid", required_argument, NULL, 'g'},
+ {"active-bank", required_argument, NULL, 'a'},
+ {"help", no_argument, NULL, 'h'},
+ {NULL, 0, NULL, 0},
+};
+
+static void print_usage(void)
+{
+ fprintf(stderr, "Usage: mkfwumdata [options] [...] \n");
+ fprintf(stderr, "Options:\n"
+ "\t-i, --images Number of images\n"
+ "\t-b, --banksNumber of banks\n"
+ "\t-a, --active-bank Active bank\n"
+ "\t-g, --guid Use GUID instead of UUID\n"
+ "\t-h, --help print a help message\n"
+ );
+ fprintf(stderr, "UUIDs list syntax:\n"
+ "\t,,[,]\n"
+ "\n\tYou must specify # of banks of image-uuid and # of images
of the lists.\n"
+ "\tIf the location uuid and image uuid are '0', those are
filled with null uuid.\n"
+ );
+}
+
+static bool __use_guid;
+static u32 active_bank;
+
+struct fwu_mdata_object {
+ size_t images;
+ size_t banks;
+ size_t size;
+ struct fwu_mdata *mdata;
+};
+
+struct fwu_mdata_object *fwu_alloc_mdata(size_t images, size_t banks)
+{
+ struct fwu_mdata_object *mobj;
+
+ mobj = malloc(sizeof(*mobj));
+ if (!mobj)
+ return NULL;
+ mobj->size = sizeof(struct fwu_mdata) +
+ (sizeof(struct fwu_image_entry) +
+sizeof(struct fwu_image_bank_info) * banks) * images;
+ mobj->images = images;
+ mobj->banks = banks;
+ mobj->mdata = malloc(mobj->size);
+ if (!mobj->mdata) {
+ free(mobj);
+ return NULL;
+ }
+
[PATCH v5 13/23] FWU: Add FWU metadata access driver for non-GPT MTD devices
From: Masami Hiramatsu
For the platform which doesn't have GPT partitions for the firmware
but on MTD devices, the FWU metadata is stored on MTD device as raw
image at specific offset. This driver gives the access methods
for the FWU metadata information on such MTD devices.
Signed-off-by: Masami Hiramatsu
Signed-off-by: Sughosh Ganu
---
drivers/fwu-mdata/Kconfig | 8 +
drivers/fwu-mdata/Makefile| 1 +
drivers/fwu-mdata/fwu_mdata_mtd.c | 308 ++
3 files changed, 317 insertions(+)
create mode 100644 drivers/fwu-mdata/fwu_mdata_mtd.c
diff --git a/drivers/fwu-mdata/Kconfig b/drivers/fwu-mdata/Kconfig
index d5edef19d6..a8fa9ad783 100644
--- a/drivers/fwu-mdata/Kconfig
+++ b/drivers/fwu-mdata/Kconfig
@@ -14,3 +14,11 @@ config FWU_MDATA_GPT_BLK
help
Enable support for accessing FWU Metadata on GPT partitioned
block devices.
+
+config FWU_MDATA_MTD
+ bool "FWU Metadata access for non-GPT MTD devices"
+ depends on DM_FWU_MDATA && MTD
+ help
+ Enable support for accessing FWU Metadata on non-partitioned
+ (or non-GPT partitioned, e.g. partition nodes in devicetree)
+ MTD devices.
diff --git a/drivers/fwu-mdata/Makefile b/drivers/fwu-mdata/Makefile
index 12a5b4fe04..c574c59be2 100644
--- a/drivers/fwu-mdata/Makefile
+++ b/drivers/fwu-mdata/Makefile
@@ -5,3 +5,4 @@
obj-$(CONFIG_DM_FWU_MDATA) += fwu-mdata-uclass.o
obj-$(CONFIG_FWU_MDATA_GPT_BLK) += fwu_mdata_gpt_blk.o
+obj-$(CONFIG_FWU_MDATA_MTD) += fwu_mdata_mtd.o
diff --git a/drivers/fwu-mdata/fwu_mdata_mtd.c
b/drivers/fwu-mdata/fwu_mdata_mtd.c
new file mode 100644
index 00..9eb471e73e
--- /dev/null
+++ b/drivers/fwu-mdata/fwu_mdata_mtd.c
@@ -0,0 +1,308 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2022, Linaro Limited
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+struct fwu_mdata_mtd_priv {
+ struct mtd_info *mtd;
+ u32 pri_offset;
+ u32 sec_offset;
+};
+
+enum fwu_mtd_op {
+ FWU_MTD_READ,
+ FWU_MTD_WRITE,
+};
+
+static bool mtd_is_aligned_with_block_size(struct mtd_info *mtd, u64 size)
+{
+ return !do_div(size, mtd->erasesize);
+}
+
+static int mtd_io_data(struct mtd_info *mtd, u32 offs, u32 size, void *data,
+ enum fwu_mtd_op op)
+{
+ struct mtd_oob_ops io_op ={};
+ u64 lock_offs, lock_len;
+ size_t len;
+ void *buf;
+ int ret;
+
+ if (!mtd_is_aligned_with_block_size(mtd, offs))
+ return -EINVAL;
+ lock_offs = offs;
+ lock_len = round_up(size, mtd->erasesize);
+
+ ret = mtd_unlock(mtd, lock_offs, lock_len);
+ if (ret && ret != -EOPNOTSUPP)
+ return ret;
+
+ if (op == FWU_MTD_WRITE) {
+ struct erase_info erase_op = {};
+
+ /* This will expand erase size to align with the block size */
+ erase_op.mtd = mtd;
+ erase_op.addr = lock_offs;
+ erase_op.len = lock_len;
+ erase_op.scrub = 0;
+
+ ret = mtd_erase(mtd, _op);
+ if (ret)
+ goto lock_out;
+ }
+
+ /* Also, expand the write size to align with the write size */
+ len = round_up(size, mtd->writesize);
+
+ buf = memalign(ARCH_DMA_MINALIGN, len);
+ if (!buf) {
+ ret = -ENOMEM;
+ goto lock_out;
+ }
+ io_op.mode = MTD_OPS_AUTO_OOB;
+ io_op.len = len;
+ io_op.ooblen = 0;
+ io_op.datbuf = buf;
+ io_op.oobbuf = NULL;
+
+ if (op == FWU_MTD_WRITE) {
+ memcpy(buf, data, size);
+ ret = mtd_write_oob(mtd, offs, _op);
+ } else {
+ ret = mtd_read_oob(mtd, offs, _op);
+ if (!ret)
+ memcpy(data, buf, size);
+ }
+ free(buf);
+
+lock_out:
+ mtd_lock(mtd, lock_offs, lock_len);
+
+ return ret;
+}
+
+static int fwu_mtd_load_mdata(struct mtd_info *mtd, struct fwu_mdata **mdata,
+ u32 offs, bool primary)
+{
+ size_t size = sizeof(struct fwu_mdata);
+ int ret;
+
+ *mdata = malloc(size);
+ if (!*mdata)
+ return -ENOMEM;
+
+ ret = mtd_io_data(mtd, offs, size, (void *)*mdata, FWU_MTD_READ);
+ if (ret >= 0) {
+ ret = fwu_verify_mdata(*mdata, primary);
+ if (ret < 0) {
+ free(*mdata);
+ *mdata = NULL;
+ }
+ }
+
+ return ret;
+}
+
+static int fwu_mtd_load_primary_mdata(struct fwu_mdata_mtd_priv *mtd_priv,
+struct fwu_mdata **mdata)
+{
+ return fwu_mtd_load_mdata(mtd_priv->mtd, mdata, mtd_priv->pri_offset,
true);
+}
+
+static int fwu_mtd_load_secondary_mdata(struct fwu_mdata_mtd_priv *mtd_priv,
+
[PATCH v5 14/23] dt/bindings: firmware: Add FWU metadata on MTD devices binding
From: Masami Hiramatsu
Add a devicetree-binding YAML file for the FWU metadata on MTD
devices without GPT.
Signed-off-by: Masami Hiramatsu
Signed-off-by: Sughosh Ganu
---
.../firmware/uboot,fwu-mdata-mtd.yaml | 38 +++
1 file changed, 38 insertions(+)
create mode 100644 doc/device-tree-bindings/firmware/uboot,fwu-mdata-mtd.yaml
diff --git a/doc/device-tree-bindings/firmware/uboot,fwu-mdata-mtd.yaml
b/doc/device-tree-bindings/firmware/uboot,fwu-mdata-mtd.yaml
new file mode 100644
index 00..4f5404f999
--- /dev/null
+++ b/doc/device-tree-bindings/firmware/uboot,fwu-mdata-mtd.yaml
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/firmware/u-boot,fwu-mdata-sf.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: FWU metadata on MTD device without GPT
+
+maintainers:
+ - Masami Hiramatsu
+
+properties:
+ compatible:
+items:
+ - const: u-boot,fwu-mdata-mtd
+
+ fwu-mdata-store:
+maxItems: 1
+description: Phandle of the MTD device which contains the FWU medatata.
+
+ mdata-offsets:
+minItems: 2
+description: Offsets of the primary and secondary FWU metadata in the NOR
flash.
+
+required:
+ - compatible
+ - fwu-mdata-store
+ - mdata-offsets
+
+additionalProperties: false
+
+examples:
+ - |
+fwu-mdata {
+compatible = "u-boot,fwu-mdata-mtd";
+fwu-mdata-store = <>;
+mdata-offsets = <0x50 0x53>;
+};
--
2.25.1
[PATCH v5 11/23] mkeficapsule: Add support for generating empty capsules
The Dependable Boot specification[1] describes the structure of the
firmware accept and revert capsules. These are empty capsules which
are used for signalling the acceptance or rejection of the updated
firmware by the OS. Add support for generating these empty capsules.
[1] -
https://git.codelinaro.org/linaro/dependable-boot/mbfw/uploads/6f7ddfe3be24e18d4319e108a758d02e/mbfw.pdf
Signed-off-by: Sughosh Ganu
---
doc/mkeficapsule.1 | 29 ++---
tools/eficapsule.h | 8 +++
tools/mkeficapsule.c | 139 +--
3 files changed, 151 insertions(+), 25 deletions(-)
diff --git a/doc/mkeficapsule.1 b/doc/mkeficapsule.1
index 09bdc24295..77ca061efd 100644
--- a/doc/mkeficapsule.1
+++ b/doc/mkeficapsule.1
@@ -8,7 +8,7 @@ mkeficapsule \- Generate EFI capsule file for U-Boot
.SH SYNOPSIS
.B mkeficapsule
-.RI [ options "] " image-blob " " capsule-file
+.RI [ options ] " " [ image-blob ] " " capsule-file
.SH "DESCRIPTION"
.B mkeficapsule
@@ -23,8 +23,13 @@ Optionally, a capsule file can be signed with a given
private key.
In this case, the update will be authenticated by verifying the signature
before applying.
+Additionally, an empty capsule file can be generated for acceptance or
+rejection of firmware images by a governing component like an Operating
+System. The empty capsules do not require an image-blob input file.
+
+
.B mkeficapsule
-takes any type of image files, including:
+takes any type of image files when generating non empty capsules, including:
.TP
.I raw image
format is a single binary blob of any type of firmware.
@@ -36,18 +41,16 @@ multiple binary blobs in a single capsule file.
This type of image file can be generated by
.BR mkimage .
-.PP
-If you want to use other types than above two, you should explicitly
-specify a guid for the FMP driver.
-
.SH "OPTIONS"
+
.TP
.BI "-g\fR,\fB --guid " guid-string
Specify guid for image blob type. The format is:
----
The first three elements are in little endian, while the rest
-is in big endian.
+is in big endian. The option must be specified for all non empty and
+image acceptance capsules
.TP
.BI "-i\fR,\fB --index " index
@@ -57,6 +60,18 @@ Specify an image index
.BI "-I\fR,\fB --instance " instance
Specify a hardware instance
+.PP
+For generation of firmware accept empty capsule
+.BR --guid
+is mandatory
+.TP
+.BI "-A\fR,\fB --fw-accept "
+Generate a firmware acceptance empty capsule
+
+.TP
+.BI "-R\fR,\fB --fw-revert "
+Generate a firmware revert empty capsule
+
.TP
.BR -h ", " --help
Print a help message
diff --git a/tools/eficapsule.h b/tools/eficapsule.h
index d63b831443..072a4b5598 100644
--- a/tools/eficapsule.h
+++ b/tools/eficapsule.h
@@ -41,6 +41,14 @@ typedef struct {
EFI_GUID(0x4aafd29d, 0x68df, 0x49ee, 0x8a, 0xa9, \
0x34, 0x7d, 0x37, 0x56, 0x65, 0xa7)
+#define FW_ACCEPT_OS_GUID \
+ EFI_GUID(0x0c996046, 0xbcc0, 0x4d04, 0x85, 0xec, \
+0xe1, 0xfc, 0xed, 0xf1, 0xc6, 0xf8)
+
+#define FW_REVERT_OS_GUID \
+ EFI_GUID(0xacd58b4b, 0xc0e8, 0x475f, 0x99, 0xb5, \
+0x6b, 0x3f, 0x7e, 0x07, 0xaa, 0xf0)
+
/* flags */
#define CAPSULE_FLAGS_PERSIST_ACROSS_RESET 0x0001
diff --git a/tools/mkeficapsule.c b/tools/mkeficapsule.c
index 5f74d23b9e..e8eb6b070d 100644
--- a/tools/mkeficapsule.c
+++ b/tools/mkeficapsule.c
@@ -29,7 +29,16 @@ static const char *tool_name = "mkeficapsule";
efi_guid_t efi_guid_fm_capsule = EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID;
efi_guid_t efi_guid_cert_type_pkcs7 = EFI_CERT_TYPE_PKCS7_GUID;
-static const char *opts_short = "g:i:I:v:p:c:m:dh";
+static const char *opts_short = "g:i:I:v:p:c:m:dhAR";
+
+static bool empty_capsule;
+static unsigned char capsule;
+
+enum {
+ CAPSULE_NORMAL_BLOB = 0,
+ CAPSULE_ACCEPT,
+ CAPSULE_REVERT,
+} capsule_type;
static struct option options[] = {
{"guid", required_argument, NULL, 'g'},
@@ -39,24 +48,47 @@ static struct option options[] = {
{"certificate", required_argument, NULL, 'c'},
{"monotonic-count", required_argument, NULL, 'm'},
{"dump-sig", no_argument, NULL, 'd'},
+ {"fw-accept", no_argument, NULL, 'A'},
+ {"fw-revert", no_argument, NULL, 'R'},
{"help", no_argument, NULL, 'h'},
{NULL, 0, NULL, 0},
};
static void print_usage(void)
{
- fprintf(stderr, "Usage: %s [options] \n"
- "Options:\n"
-
- "\t-g, --guid guid for image blob type\n"
- "\t-i, --index update image index\n"
- "\t-I, --instanceupdate hardware instance\n"
- "\t-p, --private-key private key file\n"
- "\t-c, --certificate signer's certificate
file\n"
- "\t-m, --monotonic-count monotonic count\n"
- "\t-d, --dump_sig dump signature (*.p7)\n"
- "\t-h, --help
[PATCH v5 12/23] FWU: doc: Add documentation for the FWU feature
Add documentattion for the FWU Multi Bank Update feature. The document describes the steps needed for setting up the platform for the feature, as well as steps for enabling the feature on the platform. Signed-off-by: Sughosh Ganu --- doc/develop/uefi/fwu_updates.rst | 142 +++ doc/develop/uefi/index.rst | 1 + doc/develop/uefi/uefi.rst| 2 + 3 files changed, 145 insertions(+) create mode 100644 doc/develop/uefi/fwu_updates.rst diff --git a/doc/develop/uefi/fwu_updates.rst b/doc/develop/uefi/fwu_updates.rst new file mode 100644 index 00..1c34beb7d5 --- /dev/null +++ b/doc/develop/uefi/fwu_updates.rst @@ -0,0 +1,142 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright (c) 2022 Linaro Limited + +FWU Multi Bank Updates in U-Boot + + +The FWU Multi Bank Update feature implements the firmware update +mechanism described in the PSA Firmware Update for A-profile Arm +Architecture specification[1]. Certain aspects of the Dependable +Boot specification[2] are also implemented. The feature provides a +mechanism to have multiple banks of updatable firmware images and for +updating the firmware images on the non-booted bank. On a successful +update, the platform boots from the updated bank on subsequent +boot. The UEFI capsule-on-disk update feature is used for performing +the actual updates of the updatable firmware images. + +The bookkeeping of the updatable images is done through a structure +called metadata. Currently, the FWU metadata supports identification +of images based on image GUIDs stored on a GPT partitioned storage +media. There are plans to extend the metadata structure for non GPT +partitioned devices as well. + +Accessing the FWU metadata is done through generic API's which are +defined in a driver which complies with the u-boot's driver model. A +new uclass UCLASS_FWU_MDATA has been added for accessing the FWU +metadata. Individual drivers can be added based on the type of storage +media, and it's partitioning method. Details of the storage device +containing the FWU metadata partitions are specified through a U-Boot +specific device tree property `fwu-mdata-store`. Please refer to +U-Boot `doc `__ for +the device tree bindings. + +Enabling the FWU Multi Bank Update feature +-- + +The feature can be enabled by specifying the following configs:: + +CONFIG_EFI_CAPSULE_ON_DISK=y +CONFIG_EFI_CAPSULE_FIRMWARE_MANAGEMENT=y +CONFIG_EFI_CAPSULE_FIRMWARE=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y + +CONFIG_FWU_MULTI_BANK_UPDATE=y +CONFIG_CMD_FWU_METADATA=y +CONFIG_DM_FWU_MDATA=y +CONFIG_FWU_MDATA_GPT_BLK=y +CONFIG_FWU_NUM_BANKS= +CONFIG_FWU_NUM_IMAGES_PER_BANK= + +in the .config file + +The first group of configs enable the UEFI capsule-on-disk update +functionality. The second group of configs enable the FWU Multi Bank +Update functionality. Please refer to the section +:ref:`uefi_capsule_update_ref` for more details on generation of the +UEFI capsule. + +Setting up the device for GPT partitioned storage +- + +Before enabling the functionality in U-Boot, certain changes are +required to be done on the storage device. Assuming a GPT partitioned +storage device, the storage media needs to be partitioned with the +correct number of partitions, given the number of banks and number of +images per bank that the platform is going to support. Each updatable +firmware image will be stored on an separate partition. In addition, +the two copies of the FWU metadata will be stored on two separate +partitions. + +As an example, a platform supporting two banks with each bank +containing three images would need to have 2 * 3 = 6 parititions plus +the two metadata partitions, or 8 partitions. In addition the storage +media can have additional partitions of non-updatable images, like the +EFI System Partition(ESP), a partition for the root file system etc. + +When generating the partitions, a few aspects need to be taken care +of. Each GPT partition entry in the GPT header has two GUIDs:: + +*PartitionTypeGUID* +*UniquePartitionGUID* + +The PartitionTypeGUID value should correspond to the *image_type_uuid* +field of the FWU metadata. This field is used to identify a given type +of updatable firmware image, e.g. u-boot, op-tee, FIP etc. This GUID +should also be used for specifying the `--guid` parameter when +generating the capsule. + +The UniquePartitionGUID value should correspond to the *image_uuid* +field in the FWU metadata. This GUID is used to identify images of a +given image type in different banks. + +Similarly, the FWU specifications defines the GUID value to be used +for the metadata partitions. This would be the PartitionTypeGUID for +the metadata partitions. + +When generating the metadata, the *image_type_uuid* and the +*image_uuid* values should match the *PartitionTypeGUID* and the
[PATCH v5 09/23] FWU: Add support for the FWU Multi Bank Update feature
The FWU Multi Bank Update feature supports updation of firmware images
to one of multiple sets(also called banks) of images. The firmware
images are clubbed together in banks, with the system booting images
from the active bank. Information on the images such as which bank
they belong to is stored as part of the metadata structure, which is
stored on the same storage media as the firmware images on a dedicated
partition.
At the time of update, the metadata is read to identify the bank to
which the images need to be flashed(update bank). On a successful
update, the metadata is modified to set the updated bank as active
bank to subsequently boot from.
Signed-off-by: Sughosh Ganu
---
include/fwu.h| 12 +-
lib/Kconfig | 6 +
lib/Makefile | 1 +
lib/efi_loader/efi_capsule.c | 231 ++-
lib/efi_loader/efi_setup.c | 3 +-
lib/fwu_updates/Kconfig | 31 +
lib/fwu_updates/Makefile | 6 +
lib/fwu_updates/fwu.c| 26
8 files changed, 309 insertions(+), 7 deletions(-)
create mode 100644 lib/fwu_updates/Kconfig
create mode 100644 lib/fwu_updates/Makefile
diff --git a/include/fwu.h b/include/fwu.h
index 8fbd91b463..9c8012407b 100644
--- a/include/fwu.h
+++ b/include/fwu.h
@@ -28,13 +28,23 @@ struct fwu_mdata_ops {
};
#define FWU_MDATA_VERSION 0x1
+#define FWU_IMAGE_ACCEPTED 0x1
#define FWU_MDATA_GUID \
EFI_GUID(0x8a7a84a0, 0x8387, 0x40f6, 0xab, 0x41, \
0xa8, 0xb9, 0xa5, 0xa6, 0x0d, 0x23)
-int fwu_boottime_checks(void);
+#define FWU_OS_REQUEST_FW_REVERT_GUID \
+ EFI_GUID(0xacd58b4b, 0xc0e8, 0x475f, 0x99, 0xb5, \
+0x6b, 0x3f, 0x7e, 0x07, 0xaa, 0xf0)
+
+#define FWU_OS_REQUEST_FW_ACCEPT_GUID \
+ EFI_GUID(0x0c996046, 0xbcc0, 0x4d04, 0x85, 0xec, \
+0xe1, 0xfc, 0xed, 0xf1, 0xc6, 0xf8)
+
u8 fwu_update_checks_pass(void);
+int fwu_boottime_checks(void);
+int fwu_trial_state_ctr_start(void);
int fwu_get_mdata(struct fwu_mdata **mdata);
int fwu_update_mdata(struct fwu_mdata *mdata);
diff --git a/lib/Kconfig b/lib/Kconfig
index acc0ac081a..4ca6ea226b 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -966,3 +966,9 @@ config PHANDLE_CHECK_SEQ
phandles in fdtdec_get_alias_seq() function.
endmenu
+
+menu "FWU Multi Bank Updates"
+
+source lib/fwu_updates/Kconfig
+
+endmenu
diff --git a/lib/Makefile b/lib/Makefile
index d9b1811f75..0cf8527c2d 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_EFI) += efi/
obj-$(CONFIG_EFI_LOADER) += efi_driver/
obj-$(CONFIG_EFI_LOADER) += efi_loader/
obj-$(CONFIG_CMD_BOOTEFI_SELFTEST) += efi_selftest/
+obj-$(CONFIG_FWU_MULTI_BANK_UPDATE) += fwu_updates/
obj-$(CONFIG_LZMA) += lzma/
obj-$(CONFIG_BZIP2) += bzip2/
obj-$(CONFIG_TIZEN) += tizen/
diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
index c76a5f3570..8ca041e6a2 100644
--- a/lib/efi_loader/efi_capsule.c
+++ b/lib/efi_loader/efi_capsule.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -32,6 +33,17 @@ static const efi_guid_t
efi_guid_firmware_management_capsule_id =
EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID;
const efi_guid_t efi_guid_firmware_management_protocol =
EFI_FIRMWARE_MANAGEMENT_PROTOCOL_GUID;
+const efi_guid_t fwu_guid_os_request_fw_revert =
+ FWU_OS_REQUEST_FW_REVERT_GUID;
+const efi_guid_t fwu_guid_os_request_fw_accept =
+ FWU_OS_REQUEST_FW_ACCEPT_GUID;
+
+#define FW_ACCEPT_OS (u32)0x8000
+
+__maybe_unused static u32 update_index;
+__maybe_unused static bool capsule_update;
+__maybe_unused static bool fw_accept_os;
+static bool image_index_check = true;
#ifdef CONFIG_EFI_CAPSULE_ON_DISK
/* for file system access */
@@ -205,7 +217,8 @@ efi_fmp_find(efi_guid_t *image_type, u8 image_index, u64
instance,
log_debug("+++ desc[%d] index: %d, name: %ls\n",
j, desc->image_index, desc->image_id_name);
if (!guidcmp(>image_type_id, image_type) &&
- (desc->image_index == image_index) &&
+ (!image_index_check ||
+desc->image_index == image_index) &&
(!instance ||
!desc->hardware_instance ||
desc->hardware_instance == instance))
@@ -388,6 +401,87 @@ efi_status_t efi_capsule_authenticate(const void *capsule,
efi_uintn_t capsule_s
}
#endif /* CONFIG_EFI_CAPSULE_AUTHENTICATE */
+static bool fwu_empty_capsule(struct efi_capsule_header *capsule)
+{
+ return !guidcmp(>capsule_guid,
+ _guid_os_request_fw_revert) ||
+ !guidcmp(>capsule_guid,
+_guid_os_request_fw_accept);
+}
+
+static efi_status_t fwu_empty_capsule_process(
+ struct efi_capsule_header
[PATCH v5 10/23] FWU: cmd: Add a command to read FWU metadata
Add a command to read the metadata as specified in the FWU
specification and print the fields of the metadata.
Signed-off-by: Sughosh Ganu
---
cmd/Kconfig | 7 +
cmd/Makefile| 1 +
cmd/fwu_mdata.c | 74 +
3 files changed, 82 insertions(+)
create mode 100644 cmd/fwu_mdata.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 09193b61b9..275becd837 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -144,6 +144,13 @@ config CMD_CPU
internal name) and clock frequency. Other information may be
available depending on the CPU driver.
+config CMD_FWU_METADATA
+ bool "fwu metadata read"
+ depends on FWU_MULTI_BANK_UPDATE
+ default y if FWU_MULTI_BANK_UPDATE
+ help
+ Command to read the metadata and dump it's contents
+
config CMD_LICENSE
bool "license"
select BUILD_BIN2C
diff --git a/cmd/Makefile b/cmd/Makefile
index 5e43a1e022..259a93bc65 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -76,6 +76,7 @@ obj-$(CONFIG_CMD_FPGA) += fpga.o
obj-$(CONFIG_CMD_FPGAD) += fpgad.o
obj-$(CONFIG_CMD_FS_GENERIC) += fs.o
obj-$(CONFIG_CMD_FUSE) += fuse.o
+obj-$(CONFIG_CMD_FWU_METADATA) += fwu_mdata.o
obj-$(CONFIG_CMD_GETTIME) += gettime.o
obj-$(CONFIG_CMD_GPIO) += gpio.o
obj-$(CONFIG_CMD_HVC) += smccc.o
diff --git a/cmd/fwu_mdata.c b/cmd/fwu_mdata.c
new file mode 100644
index 00..bc20ca26a3
--- /dev/null
+++ b/cmd/fwu_mdata.c
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2022, Linaro Limited
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+static void print_mdata(struct fwu_mdata *mdata)
+{
+ int i, j;
+ struct fwu_image_entry *img_entry;
+ struct fwu_image_bank_info *img_info;
+ u32 nimages, nbanks;
+
+ printf("\tFWU Metadata\n");
+ printf("crc32: %#x\n", mdata->crc32);
+ printf("version: %#x\n", mdata->version);
+ printf("active_index: %#x\n", mdata->active_index);
+ printf("previous_active_index: %#x\n", mdata->previous_active_index);
+
+ nimages = CONFIG_FWU_NUM_IMAGES_PER_BANK;
+ nbanks = CONFIG_FWU_NUM_BANKS;
+ printf("\tImage Info\n");
+ for (i = 0; i < nimages; i++) {
+ img_entry = >img_entry[i];
+ printf("\nImage Type Guid: %pUL\n",
_entry->image_type_uuid);
+ printf("Location Guid: %pUL\n", _entry->location_uuid);
+ for (j = 0; j < nbanks; j++) {
+ img_info = _entry->img_bank_info[j];
+ printf("Image Guid: %pUL\n", _info->image_uuid);
+ printf("Image Acceptance: %#x\n", img_info->accepted);
+ }
+ }
+}
+
+int do_fwu_mdata_read(struct cmd_tbl *cmdtp, int flag,
+int argc, char * const argv[])
+{
+ struct udevice *dev;
+ int ret = CMD_RET_SUCCESS;
+ struct fwu_mdata *mdata = NULL;
+
+ if (uclass_get_device(UCLASS_FWU_MDATA, 0, ) || !dev) {
+ log_err("Unable to get FWU metadata device\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = fwu_get_mdata();
+ if (ret < 0) {
+ log_err("Unable to get valid FWU metadata\n");
+ ret = CMD_RET_FAILURE;
+ goto out;
+ }
+
+ print_mdata(mdata);
+
+out:
+ free(mdata);
+ return ret;
+}
+
+U_BOOT_CMD(
+ fwu_mdata_read, 1, 1, do_fwu_mdata_read,
+ "Read and print FWU metadata",
+ ""
+);
--
2.25.1
[PATCH v5 08/23] FWU: Add boot time checks as highlighted by the FWU specification
The FWU Multi Bank Update specification requires the Update Agent to
carry out certain checks at the time of platform boot. The Update
Agent is the component which is responsible for updating the firmware
components and maintaining and keeping the metadata in sync.
The spec requires that the Update Agent perform the following checks
at the time of boot
* Sanity check of both the metadata copies maintained by the platform.
* Get the boot index passed to U-Boot by the prior stage bootloader
and use this value for metadata bookkeeping.
* Check if the system is booting in Trial State. If the system boots
in the Trial State for more than a specified number of boot counts,
change the Active Bank to be booting the platform from.
Add these checks in the board initialisation sequence, invoked after
relocation.
Signed-off-by: Sughosh Ganu
---
common/board_r.c | 5 ++
include/fwu.h | 3 +
lib/fwu_updates/fwu.c | 170 ++
3 files changed, 178 insertions(+)
create mode 100644 lib/fwu_updates/fwu.c
diff --git a/common/board_r.c b/common/board_r.c
index 6f4aca2077..33a600715d 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -797,6 +798,10 @@ static init_fnc_t init_sequence_r[] = {
#if defined(CONFIG_PRAM)
initr_mem,
#endif
+
+#ifdef CONFIG_FWU_MULTI_BANK_UPDATE
+ fwu_boottime_checks,
+#endif
run_main_loop,
};
diff --git a/include/fwu.h b/include/fwu.h
index 41774ff9e2..8fbd91b463 100644
--- a/include/fwu.h
+++ b/include/fwu.h
@@ -33,6 +33,9 @@ struct fwu_mdata_ops {
EFI_GUID(0x8a7a84a0, 0x8387, 0x40f6, 0xab, 0x41, \
0xa8, 0xb9, 0xa5, 0xa6, 0x0d, 0x23)
+int fwu_boottime_checks(void);
+u8 fwu_update_checks_pass(void);
+
int fwu_get_mdata(struct fwu_mdata **mdata);
int fwu_update_mdata(struct fwu_mdata *mdata);
int fwu_get_active_index(u32 *active_idx);
diff --git a/lib/fwu_updates/fwu.c b/lib/fwu_updates/fwu.c
new file mode 100644
index 00..af884439fb
--- /dev/null
+++ b/lib/fwu_updates/fwu.c
@@ -0,0 +1,170 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2022, Linaro Limited
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+static u8 trial_state;
+static u8 boottime_check;
+
+static int fwu_trial_state_check(void)
+{
+ int ret, i;
+ efi_status_t status;
+ efi_uintn_t var_size;
+ u16 trial_state_ctr;
+ u32 nimages, active_bank, var_attributes, active_idx;
+ struct fwu_mdata *mdata = NULL;
+ struct fwu_image_entry *img_entry;
+ struct fwu_image_bank_info *img_bank_info;
+
+ ret = fwu_get_mdata();
+ if (ret)
+ return ret;
+
+ ret = 0;
+ nimages = CONFIG_FWU_NUM_IMAGES_PER_BANK;
+ active_bank = mdata->active_index;
+ img_entry = >img_entry[0];
+ for (i = 0; i < nimages; i++) {
+ img_bank_info = _entry[i].img_bank_info[active_bank];
+ if (!img_bank_info->accepted) {
+ trial_state = 1;
+ break;
+ }
+ }
+
+ if (trial_state) {
+ var_size = (efi_uintn_t)sizeof(trial_state_ctr);
+ log_info("System booting in Trial State\n");
+ var_attributes = EFI_VARIABLE_NON_VOLATILE |
+ EFI_VARIABLE_BOOTSERVICE_ACCESS;
+ status = efi_get_variable_int(L"TrialStateCtr",
+ _global_variable_guid,
+ _attributes,
+ _size, _state_ctr,
+ NULL);
+ if (status != EFI_SUCCESS) {
+ log_err("Unable to read TrialStateCtr variable\n");
+ ret = -1;
+ goto out;
+ }
+
+ ++trial_state_ctr;
+ if (trial_state_ctr > CONFIG_FWU_TRIAL_STATE_CNT) {
+ log_info("Trial State count exceeded. Revert back to
previous_active_index\n");
+ active_idx = mdata->active_index;
+ ret = fwu_revert_boot_index();
+ if (ret) {
+ log_err("Unable to revert active_index\n");
+ goto out;
+ }
+
+ trial_state_ctr = 0;
+ status = efi_set_variable_int(L"TrialStateCtr",
+ _global_variable_guid,
+ var_attributes,
+ 0,
+ _state_ctr, false);
+ if (status != EFI_SUCCESS) {
+
[PATCH v5 07/23] FWU: STM32MP1: Add support to read boot index from backup register
The FWU Multi Bank Update feature allows the platform to boot the
firmware images from one of the partitions(banks). The first stage
bootloader(fsbl) passes the value of the boot index, i.e. the bank
from which the firmware images were booted from to U-Boot. On the
STM32MP157C-DK2 board, this value is passed through one of the SoC's
backup register. Add a function to read the boot index value from the
backup register.
Signed-off-by: Sughosh Ganu
---
arch/arm/mach-stm32mp/include/mach/stm32.h | 4
board/st/stm32mp1/stm32mp1.c | 7 +++
include/fwu.h | 2 +-
3 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h
b/arch/arm/mach-stm32mp/include/mach/stm32.h
index 47e88fc3dc..40995ee142 100644
--- a/arch/arm/mach-stm32mp/include/mach/stm32.h
+++ b/arch/arm/mach-stm32mp/include/mach/stm32.h
@@ -100,6 +100,7 @@ enum boot_device {
#define TAMP_BACKUP_REGISTER(x)(STM32_TAMP_BASE + 0x100 + 4 *
x)
#define TAMP_BACKUP_MAGIC_NUMBER TAMP_BACKUP_REGISTER(4)
#define TAMP_BACKUP_BRANCH_ADDRESS TAMP_BACKUP_REGISTER(5)
+#define TAMP_FWU_BOOT_INFO_REG TAMP_BACKUP_REGISTER(10)
#define TAMP_COPRO_RSC_TBL_ADDRESS TAMP_BACKUP_REGISTER(17)
#define TAMP_COPRO_STATE TAMP_BACKUP_REGISTER(18)
#define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(20)
@@ -118,6 +119,9 @@ enum boot_device {
#define TAMP_BOOT_INSTANCE_MASKGENMASK(3, 0)
#define TAMP_BOOT_FORCED_MASK GENMASK(7, 0)
#define TAMP_BOOT_DEBUG_ON BIT(16)
+#define TAMP_FWU_BOOT_IDX_MASK GENMASK(3, 0)
+
+#define TAMP_FWU_BOOT_IDX_OFFSET 0
enum forced_boot_mode {
BOOT_NORMAL = 0x00,
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index e68bf09955..dff41ed6f6 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -1081,4 +1081,11 @@ int fwu_plat_get_update_index(u32 *update_idx)
return ret;
}
+void fwu_plat_get_bootidx(void *boot_idx)
+{
+ u32 *bootidx = boot_idx;
+
+ *bootidx = (readl(TAMP_FWU_BOOT_INFO_REG) >>
+ TAMP_FWU_BOOT_IDX_OFFSET) & TAMP_FWU_BOOT_IDX_MASK;
+}
#endif /* CONFIG_FWU_MULTI_BANK_UPDATE */
diff --git a/include/fwu.h b/include/fwu.h
index 36e58afa29..41774ff9e2 100644
--- a/include/fwu.h
+++ b/include/fwu.h
@@ -46,7 +46,7 @@ int fwu_revert_boot_index(void);
int fwu_accept_image(efi_guid_t *img_type_id, u32 bank);
int fwu_clear_accept_image(efi_guid_t *img_type_id, u32 bank);
-
+void fwu_plat_get_bootidx(void *boot_idx);
int fwu_plat_get_alt_num(struct udevice *dev, efi_guid_t *image_guid,
int *alt_num);
int fwu_plat_get_update_index(u32 *update_idx);
--
2.25.1
[PATCH v5 06/23] FWU: stm32mp1: Add helper functions for accessing FWU metadata
Add helper functions needed for accessing the FWU metadata which
contains information on the updatable images. These functions have
been added for the STM32MP157C-DK2 board which has the updatable
images on the uSD card, formatted as GPT partitions.
Signed-off-by: Sughosh Ganu
---
board/st/stm32mp1/stm32mp1.c | 115 +++
include/fwu.h| 2 +
2 files changed, 117 insertions(+)
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 62d98ad776..e68bf09955 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -7,9 +7,11 @@
#include
#include
+#include
#include
#include
#include
+#include
#include
#include
#include
@@ -25,9 +27,11 @@
#include
#include
#include
+#include
#include
#include
#include
+#include
#include
#include
#include
@@ -967,3 +971,114 @@ static void board_copro_image_process(ulong fw_image,
size_t fw_size)
}
U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);
+
+#if defined(CONFIG_FWU_MULTI_BANK_UPDATE)
+#include
+#include
+
+static int get_gpt_dfu_identifier(struct blk_desc *desc, efi_guid_t
*image_guid)
+{
+ int i;
+ struct disk_partition info;
+ efi_guid_t unique_part_guid;
+
+ for (i = 1; i < MAX_SEARCH_PARTITIONS; i++) {
+ if (part_get_info(desc, i, ))
+ continue;
+ uuid_str_to_bin(info.uuid, unique_part_guid.b,
+ UUID_STR_FORMAT_GUID);
+
+ if (!guidcmp(_part_guid, image_guid))
+ return i;
+ }
+
+ log_err("No partition found with image_guid %pUs\n", image_guid);
+ return -ENOENT;
+}
+
+static int gpt_plat_get_alt_num(struct blk_desc *desc, efi_guid_t *image_guid,
+ int *alt_num)
+{
+ int ret = -1;
+ int i, part, dev_num;
+ int nalt;
+ struct dfu_entity *dfu;
+
+ dev_num = desc->devnum;
+ part = get_gpt_dfu_identifier(desc, image_guid);
+ if (part < 0)
+ return -ENOENT;
+
+ dfu_init_env_entities(NULL, NULL);
+
+ nalt = 0;
+ list_for_each_entry(dfu, _list, list) {
+ nalt++;
+ }
+
+ if (!nalt) {
+ log_warning("No entities in dfu_alt_info\n");
+ dfu_free_entities();
+ return -ENOENT;
+ }
+
+
+ for (i = 0; i < nalt; i++) {
+ dfu = dfu_get_entity(i);
+
+ if (!dfu)
+ continue;
+
+ /*
+* Currently, Multi Bank update
+* feature is being supported
+* only on GPT partitioned
+* MMC/SD devices.
+*/
+ if (dfu->dev_type != DFU_DEV_MMC)
+ continue;
+
+ if (dfu->layout == DFU_RAW_ADDR &&
+ dfu->data.mmc.dev_num == dev_num &&
+ dfu->data.mmc.part == part) {
+ *alt_num = dfu->alt;
+ ret = 0;
+ break;
+ }
+ }
+
+ dfu_free_entities();
+
+ return ret;
+}
+
+int fwu_plat_get_alt_num(struct udevice *dev, efi_guid_t *image_guid,
+int *alt_num)
+{
+ struct blk_desc *desc;
+
+ desc = dev_get_uclass_plat(dev);
+ if (!desc) {
+ log_err("Block device not found\n");
+ return -ENODEV;
+ }
+
+ return gpt_plat_get_alt_num(desc, image_guid, alt_num);
+}
+
+int fwu_plat_get_update_index(u32 *update_idx)
+{
+ int ret;
+ u32 active_idx;
+
+ ret = fwu_get_active_index(_idx);
+
+ if (ret < 0)
+ return -1;
+
+ *update_idx = active_idx ^= 0x1;
+
+ return ret;
+}
+
+#endif /* CONFIG_FWU_MULTI_BANK_UPDATE */
diff --git a/include/fwu.h b/include/fwu.h
index 3b1ee4e83e..36e58afa29 100644
--- a/include/fwu.h
+++ b/include/fwu.h
@@ -46,6 +46,8 @@ int fwu_revert_boot_index(void);
int fwu_accept_image(efi_guid_t *img_type_id, u32 bank);
int fwu_clear_accept_image(efi_guid_t *img_type_id, u32 bank);
+
int fwu_plat_get_alt_num(struct udevice *dev, efi_guid_t *image_guid,
int *alt_num);
+int fwu_plat_get_update_index(u32 *update_idx);
#endif /* _FWU_H_ */
--
2.25.1
[PATCH v5 03/23] FWU: Add FWU metadata access driver for GPT partitioned block devices
In the FWU Multi Bank Update feature, the information about the
updatable images is stored as part of the metadata, on a separate
partition. Add a driver for reading from and writing to the metadata
when the updatable images and the metadata are stored on a block
device which is formated with GPT based partition scheme.
Signed-off-by: Sughosh Ganu
---
drivers/fwu-mdata/Kconfig | 9 +
drivers/fwu-mdata/Makefile| 1 +
drivers/fwu-mdata/fwu_mdata_gpt_blk.c | 404 ++
include/fwu.h | 2 +
4 files changed, 416 insertions(+)
create mode 100644 drivers/fwu-mdata/fwu_mdata_gpt_blk.c
diff --git a/drivers/fwu-mdata/Kconfig b/drivers/fwu-mdata/Kconfig
index d6a21c8e19..d5edef19d6 100644
--- a/drivers/fwu-mdata/Kconfig
+++ b/drivers/fwu-mdata/Kconfig
@@ -5,3 +5,12 @@ config DM_FWU_MDATA
Enable support for accessing FWU Metadata partitions. The
FWU Metadata partitions reside on the same storage device
which contains the other FWU updatable firmware images.
+
+config FWU_MDATA_GPT_BLK
+ bool "FWU Metadata access for GPT partitioned Block devices"
+ select PARTITION_TYPE_GUID
+ select PARTITION_UUIDS
+ depends on DM && HAVE_BLOCK_DEVICE && EFI_PARTITION
+ help
+ Enable support for accessing FWU Metadata on GPT partitioned
+ block devices.
diff --git a/drivers/fwu-mdata/Makefile b/drivers/fwu-mdata/Makefile
index 7fec7171f4..12a5b4fe04 100644
--- a/drivers/fwu-mdata/Makefile
+++ b/drivers/fwu-mdata/Makefile
@@ -4,3 +4,4 @@
#
obj-$(CONFIG_DM_FWU_MDATA) += fwu-mdata-uclass.o
+obj-$(CONFIG_FWU_MDATA_GPT_BLK) += fwu_mdata_gpt_blk.o
diff --git a/drivers/fwu-mdata/fwu_mdata_gpt_blk.c
b/drivers/fwu-mdata/fwu_mdata_gpt_blk.c
new file mode 100644
index 00..329bd3779b
--- /dev/null
+++ b/drivers/fwu-mdata/fwu_mdata_gpt_blk.c
@@ -0,0 +1,404 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2022, Linaro Limited
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#define PRIMARY_PART BIT(0)
+#define SECONDARY_PART BIT(1)
+#define BOTH_PARTS (PRIMARY_PART | SECONDARY_PART)
+
+#define MDATA_READ BIT(0)
+#define MDATA_WRITEBIT(1)
+
+static int gpt_get_mdata_partitions(struct blk_desc *desc,
+ u16 *primary_mpart,
+ u16 *secondary_mpart)
+{
+ int i, ret;
+ u32 mdata_parts;
+ efi_guid_t part_type_guid;
+ struct disk_partition info;
+ const efi_guid_t fwu_mdata_guid = FWU_MDATA_GUID;
+
+ mdata_parts = 0;
+ for (i = 1; i < MAX_SEARCH_PARTITIONS; i++) {
+ if (part_get_info(desc, i, ))
+ continue;
+ uuid_str_to_bin(info.type_guid, part_type_guid.b,
+ UUID_STR_FORMAT_GUID);
+
+ if (!guidcmp(_mdata_guid, _type_guid)) {
+ ++mdata_parts;
+ if (!*primary_mpart)
+ *primary_mpart = i;
+ else
+ *secondary_mpart = i;
+ }
+ }
+
+ if (mdata_parts != 2) {
+ log_err("Expect two copies of the FWU metadata instead of %d\n",
+ mdata_parts);
+ ret = -EINVAL;
+ } else {
+ ret = 0;
+ }
+
+ return ret;
+}
+
+static int gpt_get_mdata_disk_part(struct blk_desc *desc,
+ struct disk_partition *info,
+ u32 part_num)
+{
+ int ret;
+ char *mdata_guid_str = "8a7a84a0-8387-40f6-ab41-a8b9a5a60d23";
+
+ ret = part_get_info(desc, part_num, info);
+ if (ret < 0) {
+ log_err("Unable to get the partition info for the FWU metadata
part %d",
+ part_num);
+ return -1;
+ }
+
+ /* Check that it is indeed the FWU metadata partition */
+ if (!strncmp(info->type_guid, mdata_guid_str, UUID_STR_LEN)) {
+ /* Found the FWU metadata partition */
+ return 0;
+ }
+
+ return -1;
+}
+
+static int gpt_read_write_mdata(struct blk_desc *desc,
+ struct fwu_mdata *mdata,
+ u8 access, u32 part_num)
+{
+ int ret;
+ u32 len, blk_start, blkcnt;
+ struct disk_partition info;
+
+ ALLOC_CACHE_ALIGN_BUFFER_PAD(struct fwu_mdata, mdata_aligned, 1,
+desc->blksz);
+
+ ret = gpt_get_mdata_disk_part(desc, , part_num);
+ if (ret < 0) {
+ printf("Unable to get the FWU metadata partition\n");
+ return -ENODEV;
+ }
+
+ len = sizeof(*mdata);
+ blkcnt = BLOCK_CNT(len, desc);
[PATCH v5 05/23] stm32mp1: dk2: Add image information for capsule updates
Enabling capsule update functionality on the platform requires
populating information on the images that are to be updated using the
functionality. Do so for the DK2 board.
Signed-off-by: Sughosh Ganu
---
board/st/stm32mp1/stm32mp1.c | 19 +++
include/configs/stm32mp15_common.h | 4
2 files changed, 23 insertions(+)
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 07b1a63db7..62d98ad776 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -92,6 +93,16 @@ DECLARE_GLOBAL_DATA_PTR;
#define USB_START_LOW_THRESHOLD_UV 123
#define USB_START_HIGH_THRESHOLD_UV215
+#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+struct efi_fw_image fw_images[1];
+
+struct efi_capsule_update_info update_info = {
+ .images = fw_images,
+};
+
+u8 num_image_type_guids = ARRAY_SIZE(fw_images);
+#endif /* EFI_HAVE_CAPSULE_SUPPORT */
+
int board_early_init_f(void)
{
/* nothing to do, only used in SPL */
@@ -675,6 +686,14 @@ int board_init(void)
setup_led(LEDST_ON);
+#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
+ if (board_is_dk2()) {
+ efi_guid_t image_type_guid = STM32MP1_DK2_FIP_IMAGE_GUID;
+ guidcpy(_images[0].image_type_id, _type_guid);
+ fw_images[0].fw_name = u"STM32MP1-DK2-FIP";
+ fw_images[0].image_index = 5;
+ }
+#endif
return 0;
}
diff --git a/include/configs/stm32mp15_common.h
b/include/configs/stm32mp15_common.h
index 6b40cdb017..6a1ae9788d 100644
--- a/include/configs/stm32mp15_common.h
+++ b/include/configs/stm32mp15_common.h
@@ -54,6 +54,10 @@
#define CONFIG_SYS_AUTOLOAD"no"
#endif
+#define STM32MP1_DK2_FIP_IMAGE_GUID \
+ EFI_GUID(0x19d5df83, 0x11b0, 0x457b, 0xbe, 0x2c, \
+0x75, 0x59, 0xc1, 0x31, 0x42, 0xa5)
+
/*/
#ifdef CONFIG_DISTRO_DEFAULTS
/*/
--
2.25.1
[PATCH v5 02/23] FWU: Add FWU metadata structure and driver for accessing metadata
In the FWU Multi Bank Update feature, the information about the
updatable images is stored as part of the metadata, which is stored on
a dedicated partition. Add the metadata structure, and a driver model
uclass which provides functions to access the metadata. These are
generic API's, and implementations can be added based on parameters
like how the metadata partition is accessed and what type of storage
device houses the metadata.
Signed-off-by: Sughosh Ganu
---
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/fwu-mdata/Kconfig| 7 +
drivers/fwu-mdata/Makefile | 6 +
drivers/fwu-mdata/fwu-mdata-uclass.c | 459 +++
include/dm/uclass-id.h | 1 +
include/fwu.h| 49 +++
include/fwu_mdata.h | 67
8 files changed, 592 insertions(+)
create mode 100644 drivers/fwu-mdata/Kconfig
create mode 100644 drivers/fwu-mdata/Makefile
create mode 100644 drivers/fwu-mdata/fwu-mdata-uclass.c
create mode 100644 include/fwu.h
create mode 100644 include/fwu_mdata.h
diff --git a/drivers/Kconfig b/drivers/Kconfig
index b26ca8cf70..adc6079ecf 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -42,6 +42,8 @@ source "drivers/firmware/Kconfig"
source "drivers/fpga/Kconfig"
+source "drivers/fwu-mdata/Kconfig"
+
source "drivers/gpio/Kconfig"
source "drivers/hwspinlock/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 67c8af7442..901150bb35 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -83,6 +83,7 @@ obj-y += cache/
obj-$(CONFIG_CPU) += cpu/
obj-y += crypto/
obj-$(CONFIG_FASTBOOT) += fastboot/
+obj-$(CONFIG_DM_FWU_MDATA) += fwu-mdata/
obj-y += misc/
obj-$(CONFIG_MMC) += mmc/
obj-$(CONFIG_NVME) += nvme/
diff --git a/drivers/fwu-mdata/Kconfig b/drivers/fwu-mdata/Kconfig
new file mode 100644
index 00..d6a21c8e19
--- /dev/null
+++ b/drivers/fwu-mdata/Kconfig
@@ -0,0 +1,7 @@
+config DM_FWU_MDATA
+ bool "Driver support for accessing FWU Metadata"
+ depends on DM
+ help
+ Enable support for accessing FWU Metadata partitions. The
+ FWU Metadata partitions reside on the same storage device
+ which contains the other FWU updatable firmware images.
diff --git a/drivers/fwu-mdata/Makefile b/drivers/fwu-mdata/Makefile
new file mode 100644
index 00..7fec7171f4
--- /dev/null
+++ b/drivers/fwu-mdata/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2022, Linaro Limited
+#
+
+obj-$(CONFIG_DM_FWU_MDATA) += fwu-mdata-uclass.o
diff --git a/drivers/fwu-mdata/fwu-mdata-uclass.c
b/drivers/fwu-mdata/fwu-mdata-uclass.c
new file mode 100644
index 00..1530ceb01d
--- /dev/null
+++ b/drivers/fwu-mdata/fwu-mdata-uclass.c
@@ -0,0 +1,459 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2022, Linaro Limited
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#define IMAGE_ACCEPT_SET BIT(0)
+#define IMAGE_ACCEPT_CLEAR BIT(1)
+
+static int fwu_get_dev_ops(struct udevice **dev,
+ const struct fwu_mdata_ops **ops)
+{
+ int ret;
+
+ ret = uclass_get_device(UCLASS_FWU_MDATA, 0, dev);
+ if (ret) {
+ log_debug("Cannot find fwu device\n");
+ return ret;
+ }
+
+ if ((*ops = device_get_ops(*dev)) == NULL) {
+ log_debug("Cannot get fwu device ops\n");
+ return -ENOSYS;
+ }
+
+ return 0;
+}
+
+/**
+ * fwu_verify_mdata() - Verify the FWU metadata
+ * @mdata: FWU metadata structure
+ * @pri_part: FWU metadata partition is primary or secondary
+ *
+ * Verify the FWU metadata by computing the CRC32 for the metadata
+ * structure and comparing it against the CRC32 value stored as part
+ * of the structure.
+ *
+ * Return: 0 if OK, -ve on error
+ *
+ */
+int fwu_verify_mdata(struct fwu_mdata *mdata, bool pri_part)
+{
+ u32 calc_crc32;
+ void *buf;
+
+ buf = >version;
+ calc_crc32 = crc32(0, buf, sizeof(*mdata) - sizeof(u32));
+
+ if (calc_crc32 != mdata->crc32) {
+ log_err("crc32 check failed for %s FWU metadata partition\n",
+ pri_part ? "primary" : "secondary");
+ return -1;
+ }
+
+ return 0;
+}
+
+/**
+ * fwu_get_active_index() - Get active_index from the FWU metadata
+ * @active_idx: active_index value to be read
+ *
+ * Read the active_index field from the FWU metadata and place it in
+ * the variable pointed to be the function argument.
+ *
+ * Return: 0 if OK, -ve on error
+ *
+ */
+int fwu_get_active_index(u32 *active_idx)
+{
+ int ret;
+ struct fwu_mdata *mdata = NULL;
+
+ ret = fwu_get_mdata();
+ if (ret < 0) {
+ log_err("Unable to get valid FWU metadata\n");
+ goto out;
+ }
+
+ /*
+* Found the
[PATCH v5 04/23] stm32mp1: dk2: Add a node for the FWU metadata device
The FWU metadata structure is accessed through the driver model
interface. On the stm32mp157c-dk2 board, the FWU metadata is stored on
the uSD card. Add the fwu-mdata node on the u-boot specifc dtsi file
for accessing the metadata structure.
Signed-off-by: Sughosh Ganu
---
arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi
b/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi
index 06ef3a4095..24f86209db 100644
--- a/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi
@@ -4,3 +4,10 @@
*/
#include "stm32mp157a-dk1-u-boot.dtsi"
+
+/ {
+ fwu-mdata {
+ compatible = "u-boot,fwu-mdata-gpt";
+ fwu-mdata-store = <>;
+ };
+};
--
2.25.1
[PATCH v5 01/23] dt/bindings: Add bindings for FWU Metadata storage device
Add bindings needed for accessing the FWU metadata partitions. These
include the compatible string which point to the access method and the
actual device which stores the FWU metadata.
The current patch adds basic bindings needed for accessing the
metadata structure on GPT partitioned block devices.
Signed-off-by: Sughosh Ganu
---
.../firmware/fwu-mdata.txt | 18 ++
1 file changed, 18 insertions(+)
create mode 100644 doc/device-tree-bindings/firmware/fwu-mdata.txt
diff --git a/doc/device-tree-bindings/firmware/fwu-mdata.txt
b/doc/device-tree-bindings/firmware/fwu-mdata.txt
new file mode 100644
index 00..2d8ed056a5
--- /dev/null
+++ b/doc/device-tree-bindings/firmware/fwu-mdata.txt
@@ -0,0 +1,18 @@
+FWU Metadata Access Devicetree Binding
+
+The FWU Multi Bank Update feature uses a metadata structure, stored on
+a separate partition for keeping information on the set of updatable
+images. The device tree node provides information on the storage
+device that contains the FWU metadata.
+
+Required properties :
+
+- compatible : "u-boot,fwu-mdata-gpt";
+- fwu-mdata-store : should point to the storage device which contains
+ the FWU metadata partition.
+
+Example :
+ fwu-mdata {
+ compatible = "u-boot,fwu-mdata-gpt";
+ fwu-mdata-store = <>;
+ };
--
2.25.1
[PATCH v5 00/23] FWU: Add FWU Multi Bank Update feature support
The patchset adds support for the FWU Multi Bank Update[1] feature. Certain aspects of the Dependable Boot[2] specification have also been implemented. The FWU multi bank update feature is used for supporting multiple sets(also called banks) of firmware image(s), allowing the platform to boot from a different bank, in case it fails to boot from the active bank. This functionality is supported by keeping the relevant information in a structure called metadata, which provides information on the images. Among other parameters, the metadata structure contains information on the currect active bank that is being used to boot image(s). Functionality is being added to work with the UEFI capsule driver in u-boot. The metadata is read to gather information on the update bank, which is the bank to which the firmware images would be flashed to. On a successful completion of the update of all components, the active bank field in the metadata is updated, to reflect the bank from which the platform will boot on the subsequent boots. Currently, the feature is being enabled on the STM32MP157C-DK2 and Synquacer boards. The DK2 board boots a FIP image from a uSD card partitioned with the GPT partioning scheme, while the Synquacer board boots a FIP image from a MTD partitioned SPI NOR flash device. This feature also requires changes in a previous stage of bootloader, which parses the metadata and selects the bank to boot the image(s) from. Support has being added in tf-a(BL2 stage) for the STM32MP157C-DK2 board to boot the active bank images. These changes have been merged to the upstream tf-a repository. Earlier, two separate patchsets were being sent. The patchset sent by me was adding support for the feature, and enabling the feature on the ST board. The other set of patches were being sent by Masami Hiramatsu, which were enabling the feature on the Synquacer platform. This patchset contains both set of patches, along with the associated documentation and the python test script for testing the feature. The upstreaming effort for this feature had been put on a temporary hold to address the fixing of some issues in the capsule update code, primarily using a per platform image GUID for the updatable images. Now that the series has been merged, upstreaming effort for the FWU update feature is being resumed. Hence, this version does not have any review comments being addressed. [1] - https://developer.arm.com/documentation/den0118/a [2] - https://git.codelinaro.org/linaro/dependable-boot/mbfw/uploads/6f7ddfe3be24e18d4319e108a758d02e/mbfw.pdf Jassi Brar (1): developerbox: synquacer: Use FIP as the updatable image Masami Hiramatsu (9): FWU: Add FWU metadata access driver for non-GPT MTD devices dt/bindings: firmware: Add FWU metadata on MTD devices binding tools: Add mkfwumdata tool for FWU metadata image FWU: doc: Update documentation for the FWU non-GPT MTD synquacer: Update for TBBR (BL2) based new FIP layout FWU: synquacer: Add FWU Multi bank update support for DeveloperBox FWU: synquacer: Generate dfu_alt_info from devicetree partition doc: synquacer: Add how to enable FWU Multi Bank Update [TEMP]configs: synquacer: Add FWU support for DeveloperBox Sughosh Ganu (13): dt/bindings: Add bindings for FWU Metadata storage device FWU: Add FWU metadata structure and driver for accessing metadata FWU: Add FWU metadata access driver for GPT partitioned block devices stm32mp1: dk2: Add a node for the FWU metadata device stm32mp1: dk2: Add image information for capsule updates FWU: stm32mp1: Add helper functions for accessing FWU metadata FWU: STM32MP1: Add support to read boot index from backup register FWU: Add boot time checks as highlighted by the FWU specification FWU: Add support for the FWU Multi Bank Update feature FWU: cmd: Add a command to read FWU metadata mkeficapsule: Add support for generating empty capsules FWU: doc: Add documentation for the FWU feature sandbox: fwu: Add support for testing FWU feature on sandbox arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi | 7 + .../synquacer-sc2a11-developerbox-u-boot.dtsi | 40 +- arch/arm/mach-stm32mp/include/mach/stm32.h| 4 + arch/sandbox/Kconfig | 6 + arch/sandbox/dts/test.dts | 45 +- board/sandbox/sandbox.c | 49 ++ board/socionext/developerbox/Kconfig | 14 + board/socionext/developerbox/Makefile | 1 + board/socionext/developerbox/developerbox.c | 17 +- board/socionext/developerbox/fwu_plat.c | 200 board/st/stm32mp1/stm32mp1.c | 141 ++ cmd/Kconfig | 7 + cmd/Makefile | 1 + cmd/fwu_mdata.c | 74 +++ common/board_r.c | 5 + configs/sandbox64_defconfig | 12 +- configs/synquacer_developerbox_defconfig | 10 +-
Re: [PATCH] secure boot: enable ARCH_MISC_INIT config.
Hi Gaurav, On Thu, Jun 9, 2022 at 8:02 AM Gaurav Jain wrote: > > add ARCH_MISC_INIT to initilaize caam jr driver. "Add" "initialize" Reviewed-by: Fabio Estevam
[PATCH v2 7/7] doc: board: nxp: Add instructions to boot from QSPI
Add instructions to build and boot from QSPI Flash.
Signed-off-by: Mamta Shukla
Signed-off-by: Thomas Haemmerle
---
doc/board/nxp/imx8mm_evk.rst | 38 ++--
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/doc/board/nxp/imx8mm_evk.rst b/doc/board/nxp/imx8mm_evk.rst
index b9e67b954f..ea7153a69b 100644
--- a/doc/board/nxp/imx8mm_evk.rst
+++ b/doc/board/nxp/imx8mm_evk.rst
@@ -35,8 +35,8 @@ Get the ddr firmware
$ ./firmware-imx-8.9
$ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin $(builddir)
-Build U-Boot
-
+Build U-Boot for sd card
+--
.. code-block:: bash
@@ -53,3 +53,37 @@ Burn the flash.bin to MicroSD card offset 33KB:
Boot
Set Boot switch to SD boot
+
+Build U-Boot for qspi flash card
+
+
+.. code-block:: bash
+
+ $ export CROSS_COMPILE=aarch64-poky-linux-
+ $ make imx8mm_evk_fspi_defconfig
+ $ make
+
+Currently, there is no direct support to write to QSPI Flash.
+Copy flash.bin to ${loadaddr} either from sd card or over network and then
copy to
+qspi flash
+
+From sd card to memory
+
+.. code-block:: bash
+
+$mmc dev 1
+$mmc read ${loadaddr} 0x00
+
+.. code-block:: bash
+
+ $ sf probe
+ $ sf erase 0
+ $ sf write $loadaddr 0x00
+
+Boot from QSPI Flash
+---
+Set Boot Switch to QSPI Flash
+
+Pin configuration for imx8mm_revC evk to boot from qspi flash
+SW1101: 0110xx
+SW1102: 00100x0010
--
2.25.1
[PATCH v2 6/7] board: freescale: Add entry for imx8mm_evk_fspi_defconfig
Add entry for imx8mm_evk_fspi_defconfig in board/freescale/imx8mm_evk/MAINTAINERS Signed-off-by: Mamta Shukla Signed-off-by: Thomas Haemmerle --- board/freescale/imx8mm_evk/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/imx8mm_evk/MAINTAINERS b/board/freescale/imx8mm_evk/MAINTAINERS index b031bb0674..875adf58ee 100644 --- a/board/freescale/imx8mm_evk/MAINTAINERS +++ b/board/freescale/imx8mm_evk/MAINTAINERS @@ -4,3 +4,4 @@ S: Maintained F: board/freescale/imx8mm_evk/ F: include/configs/imx8mm_evk.h F: configs/imx8mm_evk_defconfig +F: configs/imx8mm_evk_fspi_defconfig -- 2.25.1
[PATCH v2 5/7] configs: imx8mm: Define CONFIG_SYS_UBOOT_BASE for i.MX8m
The macro `CONFIG_SYS_UBOOT_BASE` is used by SPL loaders `"NOR"` and `"XIP"` to determine the base address of u-boot. For `"NOR"` on i.MX8MM it is the base address of QSPI0 plus the offset of the flattened image tree blob. Although `QSPI0_AMBA_BASE` is used to define CONFIG_SYS_UBOOT_BASE in multiple board header files for i.MX8MM, it is not specified. Specify offset of flattened image tree blob (needs to be set to same value as specified in 'binman' node), base address of QSPI0 and size of FlexSPI configuration block. Signed-off-by: Mamta Shukla Signed-off-by: Thomas Haemmerle --- (no changes since v1) include/configs/imx8mm_evk.h | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 5e8f19c43f..1b8d6e6b9f 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -13,8 +13,13 @@ #define CONFIG_SYS_BOOTM_LEN (64 * SZ_1M) #define CONFIG_SPL_MAX_SIZE(148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K +#define UBOOT_ITB_OFFSET 0x57C00 +#define QSPI0_AMBA_BASE0x0800 +#define FSPI_CONF_BLOCK_SIZE 0x1000 +#define UBOOT_ITB_OFFSET_FSPI \ + (UBOOT_ITB_OFFSET + FSPI_CONF_BLOCK_SIZE) #define CONFIG_SYS_UBOOT_BASE \ - (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) + (QSPI0_AMBA_BASE + UBOOT_ITB_OFFSET_FSPI) #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x92 -- 2.25.1
[PATCH v2 4/7] board: freescale: Add QSPI Boot support in spl for i.MX8m
Add QSPI Boot option in u-boot-spl for i.MX8m EVK. Signed-off-by: Mamta Shukla Signed-off-by: Thomas Haemmerle --- (no changes since v1) board/freescale/imx8mm_evk/spl.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c index 4d96324685..e2eb1426c8 100644 --- a/board/freescale/imx8mm_evk/spl.c +++ b/board/freescale/imx8mm_evk/spl.c @@ -39,6 +39,8 @@ int spl_board_boot_device(enum boot_device boot_dev_spl) case SD3_BOOT: case MMC3_BOOT: return BOOT_DEVICE_MMC2; + case QSPI_BOOT: + return BOOT_DEVICE_NOR; default: return BOOT_DEVICE_NONE; } -- 2.25.1
[PATCH v2 3/7] configs: Add config for enabling FSPI boot option for i.MX8m
Add imx8mm_evk_fspi_defconfig to build QSPI boot image. This config is based on imx8mm_evk_defconfig with addtional config options for FSPI Header,SPL offset and imx-image config to boot from FSPI. Signed-off-by: Mamta Shukla Signed-off-by: Thomas Haemmerle --- v2: -Remove extra line in commit message -Remove extra line in imx8mm_evk_fspi_defconfig -New patch in series to add an entry for imx8mm_evk_fspi_defconfig in board/freescale/imx8mm_evk/MAINTAINERS .../imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg | 9 ++ configs/imx8mm_evk_fspi_defconfig | 115 ++ 2 files changed, 124 insertions(+) create mode 100644 board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg create mode 100644 configs/imx8mm_evk_fspi_defconfig diff --git a/board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg b/board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg new file mode 100644 index 00..ddcbd11eea --- /dev/null +++ b/board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2021 NXP + */ + +#define __ASSEMBLY__ + +BOOT_FROM fspi +LOADER u-boot-spl-ddr.bin 0x7E2000 diff --git a/configs/imx8mm_evk_fspi_defconfig b/configs/imx8mm_evk_fspi_defconfig new file mode 100644 index 00..50f6e4779b --- /dev/null +++ b/configs/imx8mm_evk_fspi_defconfig @@ -0,0 +1,115 @@ +CONFIG_ARM=y +CONFIG_ARCH_IMX8M=y +CONFIG_SYS_TEXT_BASE=0x4020 +CONFIG_SYS_MALLOC_LEN=0x200 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x40 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-evk" +CONFIG_SPL_TEXT_BASE=0x7E2000 +CONFIG_TARGET_IMX8MM_EVK=y +CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg" +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL=y +CONFIG_SYS_LOAD_ADDR=0x4048 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_SPL_LOAD_FIT=y +# CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOARD_EARLY_INIT=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 +CONFIG_SPL_I2C=y +CONFIG_SPL_POWER=y +CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_PROMPT="u-boot=> " +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_CLK=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" +CONFIG_SPL_DM=y +CONFIG_SPL_CLK_COMPOSITE_CCF=y +CONFIG_CLK_COMPOSITE_CCF=y +CONFIG_SPL_CLK_IMX8MM=y +CONFIG_CLK_IMX8MM=y +CONFIG_MXC_GPIO=y +CONFIG_DM_I2C=y +CONFIG_DM_MMC=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX8M=y +CONFIG_DM_PMIC=y +CONFIG_SPL_DM_PMIC_PCA9450=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_PWM=y +CONFIG_DM_SERIAL=y +CONFIG_PWM_IMX=y +CONFIG_MXC_UART=y +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_DM_THERMAL=y +CONFIG_IMX_WATCHDOG=y +CONFIG_NXP_FSPI=y +CONFIG_SPI=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SF_DEFAULT_BUS=0 +CONFIG_SF_DEFAULT_CS=0 +CONFIG_SF_DEFAULT_SPEED=4000 +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_FSPI_CONF_HEADER=y +CONFIG_FSPI_CONF_FILE="fspi_header.bin" +CONFIG_READ_CLK_SOURCE=0x00 +CONFIG_DEVICE_TYPE=0x01 +CONFIG_FLASH_PAD_TYPE=0x01 +CONFIG_SERIAL_CLK_FREQUENCY=0x02 +CONFIG_LUT_CUSTOM_SEQUENCE=0x00 +CONFIG_LUT_SEQUENCE="0x0b, 0x04, 0x18, 0x08, 0x08, 0x30, 0x04, 0x24" -- 2.25.1
[PATCH v2 2/7] dts: imx8mm-uboot: Add support to pack FlexSPI Header using binman
Add definition for FSPI configuration block and subsequently new offsets for
u-boot-spl and u-boot-itb for CONFIG_FSPI_HEADER option.
Signed-off-by: Mamta Shukla
Signed-off-by: Thomas Haemmerle
---
(no changes since v1)
arch/arm/dts/imx8mm-u-boot.dtsi | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 9f66cdb65a..178f974f70 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -150,7 +150,26 @@
filename = "flash.bin";
pad-byte = <0x00>;
- spl {
+#ifdef CONFIG_FSPI_CONF_HEADER
+fspi_conf_block {
+filename = CONFIG_FSPI_CONF_FILE;
+type = "blob-ext";
+size = <0x1000>;
+};
+
+spl {
+filename = "spl.bin";
+offset = <0x1000>;
+type = "blob-ext";
+};
+
+binman_uboot: uboot {
+filename = "u-boot.itb";
+offset = <0x58C00>;
+type = "blob-ext";
+};
+#else
+spl {
filename = "spl.bin";
offset = <0x0>;
type = "blob-ext";
@@ -161,6 +180,7 @@
offset = <0x57c00>;
type = "blob-ext";
};
+#endif
};
};
--
2.25.1
[PATCH v2 1/7] tools: mkimage: Add support to generate FlexSPI Header for i.MX8m
Add struct with Flex SPI Configuration Block and enable generating
fspi header using mkimage.
Refer i.MX 8M Mini Application Processor Reference Manual for
detailed information about parameters for FlexSPI Configuration block.
Signed-off-by: Mamta Shukla
Signed-off-by: Thomas Haemmerle
---
v2:
-Add check for error in case open() for fspi_fd in imx8mkimage.c fails
include/imximage.h | 38 ++
tools/Kconfig | 59 +
tools/imx8mimage.c | 81 +++---
3 files changed, 174 insertions(+), 4 deletions(-)
diff --git a/include/imximage.h b/include/imximage.h
index 5a812f5a10..c1ecc0b7cb 100644
--- a/include/imximage.h
+++ b/include/imximage.h
@@ -201,6 +201,44 @@ struct imx_header {
} header;
};
+typedef struct {
+ uint8_t tag[4];
+ uint8_t version[4];
+ uint8_t reserved_1[4];
+ uint8_t read_sample;
+ uint8_t datahold;
+ uint8_t datasetup;
+ uint8_t coladdrwidth;
+ uint8_t devcfgenable;
+ uint8_t reserved_2[3];
+ uint8_t devmodeseq[4];
+ uint8_t devmodearg[4];
+ uint8_t cmd_enable;
+ uint8_t reserved_3[3];
+ uint8_t cmd_seq[16] ;
+ uint8_t cmd_arg[16];
+ uint8_t controllermisc[4];
+ uint8_t dev_type;
+ uint8_t sflash_pad;
+ uint8_t serial_clk;
+ uint8_t lut_custom ;
+ uint8_t reserved_4[8];
+ uint8_t sflashA1[4];
+ uint8_t sflashA2[4];
+ uint8_t sflashB1[4];
+ uint8_t sflashB2[4];
+ uint8_t cspadover[4];
+ uint8_t sclkpadover[4];
+ uint8_t datapadover[4];
+ uint8_t dqspadover[4];
+ uint8_t timeout[4];
+ uint8_t commandInt[4];
+ uint8_t datavalid[4];
+ uint8_t busyoffset[2];
+ uint8_t busybitpolarity[2];
+ uint8_t lut[256];
+} __attribute__((packed)) fspi_conf;
+
typedef void (*set_dcd_val_t)(struct imx_header *imxhdr,
char *name, int lineno,
int fld, uint32_t value,
diff --git a/tools/Kconfig b/tools/Kconfig
index 117c921da3..539708f277 100644
--- a/tools/Kconfig
+++ b/tools/Kconfig
@@ -98,4 +98,63 @@ config TOOLS_MKEFICAPSULE
optionally sign that file. If you want to enable UEFI capsule
update feature on your target, you certainly need this.
+menuconfig FSPI_CONF_HEADER
+ bool "FlexSPI Header Configuration"
+ help
+ FSPI Header Configuration
+
+config FSPI_CONF_FILE
+ string "FlexSPI Header File"
+ depends on FSPI_CONF_HEADER
+ help
+ FlexSPI Header File name
+
+config READ_CLK_SOURCE
+ hex "Sampling Clock Source"
+ default 0x00
+ depends on FSPI_CONF_HEADER
+ help
+ Sample Clock source for Flash, default is internal loopback clock
+
+config DEVICE_TYPE
+ hex "Flash Type"
+ default 0x01
+ depends on FSPI_CONF_HEADER
+ help
+ Flash type: Serial NOR (0X01) and Serial NAND (0x02)
+
+config FLASH_PAD_TYPE
+ hex "Flash Pad Type"
+ default 0x01
+ depends on FSPI_CONF_HEADER
+ help
+ Flash Pad type :
+ Single Pad 0x01
+ Dual Pads 0x02
+ Quad Pad 0x04
+ Octal Pad 0x08
+
+config SERIAL_CLK_FREQUENCY
+ hex "Serial Clock Frequency"
+ default 0x02
+ depends on FSPI_CONF_HEADER
+ help
+ Chip specific frequency: other value 30MHz
+ 1-30MHz 2-50MHz 3-60MHz 4-75MHz 5-80MHz 6-100MHz 7-133MHz 8-166MHz
+
+config LUT_CUSTOM_SEQUENCE
+ hex "Enable Custom Look Up Table(LUT) Sequence"
+ default 0x00
+ depends on FSPI_CONF_HEADER
+ help
+ 0 - Use predefined LUT Sequence
+ 1 - Use LUT Sequence provided
+
+config LUT_SEQUENCE
+ string "Look Up Table Sequence"
+ default "0x0b, 0x04, 0x18, 0x08, 0x08, 0x30, 0x04, 0x24"
+ depends on FSPI_CONF_HEADER
+ help
+ Look Up Table Sequence
+
endmenu
diff --git a/tools/imx8mimage.c b/tools/imx8mimage.c
index 4eed683396..facf8887a1 100644
--- a/tools/imx8mimage.c
+++ b/tools/imx8mimage.c
@@ -12,7 +12,7 @@
#include "compiler.h"
static uint32_t ap_start_addr, sld_start_addr, sld_src_off;
-static char *ap_img, *sld_img, *signed_hdmi;
+static char *ap_img, *sld_img, *signed_hdmi, *fspi;
static imx_header_v3_t imx_header[2]; /* At most there are 3 IVT headers */
static uint32_t rom_image_offset;
static uint32_t sector_size = 0x200;
@@ -120,7 +120,6 @@ static void parse_cfg_cmd(int32_t cmd, char *token, char
*name, int lineno)
rom_version = ROM_V1;
}
break;
-
}
}
@@ -412,10 +411,70 @@ static void dump_header_v2(imx_header_v3_t *imx_header,
int index)
imx_header[index].boot_data.plugin);
}
+#ifdef CONFIG_FSPI_CONF_HEADER
+static int generate_fspi_header (int ifd)
+{
+ int ret, i = 0;
+ char *val;
+
[PATCH v2 0/7] Add support for FLexSPI Boot for i.MX8m
This series of patch adds support for generating FlexSPI Header file and booting from QSPI on i.MX8m. Changes in v2: -Add check for error in case open() for fspi_fd in imx8mkimage.c fails -Remove extra line in commit message -Remove extra line in imx8mm_evk_fspi_defconfig -New patch in series to add an entry for imx8mm_evk_fspi_defconfig in board/freescale/imx8mm_evk/MAINTAINERS -New patch in series to add instructions to build and boot from QSPI Flash Mamta Shukla (7): tools: mkimage: Add support to generate FlexSPI Header for i.MX8m dts: imx8mm-uboot: Add support to pack FlexSPI Header using binman configs: Add config for enabling FSPI boot option for i.MX8m board: freescale: Add QSPI Boot support in spl for i.MX8m configs: imx8mm: Define CONFIG_SYS_UBOOT_BASE for i.MX8m board: freescale: Add entry for imx8mm_evk_fspi_defconfig doc: board: nxp: Add instructions to boot from QSPI arch/arm/dts/imx8mm-u-boot.dtsi | 22 +++- board/freescale/imx8mm_evk/MAINTAINERS| 1 + .../imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg | 9 ++ board/freescale/imx8mm_evk/spl.c | 2 + configs/imx8mm_evk_fspi_defconfig | 115 ++ doc/board/nxp/imx8mm_evk.rst | 38 +- include/configs/imx8mm_evk.h | 7 +- include/imximage.h| 38 ++ tools/Kconfig | 59 + tools/imx8mimage.c| 81 +++- 10 files changed, 364 insertions(+), 8 deletions(-) create mode 100644 board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg create mode 100644 configs/imx8mm_evk_fspi_defconfig -- 2.25.1
[PATCH] secure boot: enable ARCH_MISC_INIT config.
add ARCH_MISC_INIT to initilaize caam jr driver. Signed-off-by: Gaurav Jain --- board/freescale/common/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig index 6553bf63bf..b0e6e43f4f 100644 --- a/board/freescale/common/Kconfig +++ b/board/freescale/common/Kconfig @@ -3,6 +3,7 @@ config CHAIN_OF_TRUST imply CMD_BLOB imply CMD_HASH if ARM select FSL_CAAM + select ARCH_MISC_INIT select SPL_BOARD_INIT if (ARM && SPL) select SPL_HASH if (ARM && SPL) select SHA_HW_ACCEL -- 2.25.1
[PATCH] secure boot: enable ARCH_MISC_INIT config.
add ARCH_MISC_INIT to initilaize caam jr driver. Signed-off-by: Gaurav Jain --- board/freescale/common/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig index 6553bf63bf..b0e6e43f4f 100644 --- a/board/freescale/common/Kconfig +++ b/board/freescale/common/Kconfig @@ -3,6 +3,7 @@ config CHAIN_OF_TRUST imply CMD_BLOB imply CMD_HASH if ARM select FSL_CAAM + select ARCH_MISC_INIT select SPL_BOARD_INIT if (ARM && SPL) select SPL_HASH if (ARM && SPL) select SHA_HW_ACCEL -- 2.25.1
[PATCH v1] drivers: spi: sunxi: Fix spi speed settting
From: qianfan Zhao
dm_spi_claim_bus run spi_set_speed_mode first and then ops->claim_bus,
but spi clock is enabled when sun4i_spi_claim_bus, that will make
sun4i_spi_set_speed doesn't work.
Fix it.
Signed-off-by: qianfan Zhao
---
drivers/spi/spi-sunxi.c | 78 -
1 file changed, 30 insertions(+), 48 deletions(-)
diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c
index b6cd7ddafa..1043cde976 100644
--- a/drivers/spi/spi-sunxi.c
+++ b/drivers/spi/spi-sunxi.c
@@ -224,6 +224,7 @@ err_ahb:
static int sun4i_spi_claim_bus(struct udevice *dev)
{
struct sun4i_spi_priv *priv = dev_get_priv(dev->parent);
+ u32 div, reg;
int ret;
ret = sun4i_spi_set_clock(dev->parent, true);
@@ -233,12 +234,38 @@ static int sun4i_spi_claim_bus(struct udevice *dev)
setbits_le32(SPI_REG(priv, SPI_GCR), SUN4I_CTL_ENABLE |
SUN4I_CTL_MASTER | SPI_BIT(priv, SPI_GCR_TP));
+ /* Setup clock divider */
+ div = SUN4I_SPI_MAX_RATE / (2 * priv->freq);
+ reg = readl(SPI_REG(priv, SPI_CCR));
+
+ if (div <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) {
+ if (div > 0)
+ div--;
+
+ reg &= ~(SUN4I_CLK_CTL_CDR2_MASK | SUN4I_CLK_CTL_DRS);
+ reg |= SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS;
+ } else {
+ div = __ilog2(SUN4I_SPI_MAX_RATE) - __ilog2(priv->freq);
+ reg &= ~((SUN4I_CLK_CTL_CDR1_MASK << 8) | SUN4I_CLK_CTL_DRS);
+ reg |= SUN4I_CLK_CTL_CDR1(div);
+ }
+
+ writel(reg, SPI_REG(priv, SPI_CCR));
+
if (priv->variant->has_soft_reset)
setbits_le32(SPI_REG(priv, SPI_GCR),
SPI_BIT(priv, SPI_GCR_SRST));
- setbits_le32(SPI_REG(priv, SPI_TCR), SPI_BIT(priv, SPI_TCR_CS_MANUAL) |
-SPI_BIT(priv, SPI_TCR_CS_ACTIVE_LOW));
+ /* Setup the transfer control register */
+ reg = SPI_BIT(priv, SPI_TCR_CS_MANUAL) |
+ SPI_BIT(priv, SPI_TCR_CS_ACTIVE_LOW);
+
+ if (priv->mode & SPI_CPOL)
+ reg |= SPI_BIT(priv, SPI_TCR_CPOL);
+ if (priv->mode & SPI_CPHA)
+ reg |= SPI_BIT(priv, SPI_TCR_CPHA);
+
+ writel(reg, SPI_REG(priv, SPI_TCR));
return 0;
}
@@ -329,67 +356,22 @@ static int sun4i_spi_set_speed(struct udevice *dev, uint
speed)
{
struct sun4i_spi_plat *plat = dev_get_plat(dev);
struct sun4i_spi_priv *priv = dev_get_priv(dev);
- unsigned int div;
- u32 reg;
if (speed > plat->max_hz)
speed = plat->max_hz;
if (speed < SUN4I_SPI_MIN_RATE)
speed = SUN4I_SPI_MIN_RATE;
- /*
-* Setup clock divider.
-*
-* We have two choices there. Either we can use the clock
-* divide rate 1, which is calculated thanks to this formula:
-* SPI_CLK = MOD_CLK / (2 ^ (cdr + 1))
-* Or we can use CDR2, which is calculated with the formula:
-* SPI_CLK = MOD_CLK / (2 * (cdr + 1))
-* Whether we use the former or the latter is set through the
-* DRS bit.
-*
-* First try CDR2, and if we can't reach the expected
-* frequency, fall back to CDR1.
-*/
-
- div = SUN4I_SPI_MAX_RATE / (2 * speed);
- reg = readl(SPI_REG(priv, SPI_CCR));
-
- if (div <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) {
- if (div > 0)
- div--;
-
- reg &= ~(SUN4I_CLK_CTL_CDR2_MASK | SUN4I_CLK_CTL_DRS);
- reg |= SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS;
- } else {
- div = __ilog2(SUN4I_SPI_MAX_RATE) - __ilog2(speed);
- reg &= ~((SUN4I_CLK_CTL_CDR1_MASK << 8) | SUN4I_CLK_CTL_DRS);
- reg |= SUN4I_CLK_CTL_CDR1(div);
- }
priv->freq = speed;
- writel(reg, SPI_REG(priv, SPI_CCR));
-
return 0;
}
static int sun4i_spi_set_mode(struct udevice *dev, uint mode)
{
struct sun4i_spi_priv *priv = dev_get_priv(dev);
- u32 reg;
-
- reg = readl(SPI_REG(priv, SPI_TCR));
- reg &= ~(SPI_BIT(priv, SPI_TCR_CPOL) | SPI_BIT(priv, SPI_TCR_CPHA));
-
- if (mode & SPI_CPOL)
- reg |= SPI_BIT(priv, SPI_TCR_CPOL);
-
- if (mode & SPI_CPHA)
- reg |= SPI_BIT(priv, SPI_TCR_CPHA);
priv->mode = mode;
- writel(reg, SPI_REG(priv, SPI_TCR));
-
return 0;
}
@@ -441,7 +423,7 @@ static int sun4i_spi_of_to_plat(struct udevice *bus)
plat->variant = (struct sun4i_spi_variant *)dev_get_driver_data(bus);
plat->max_hz = fdtdec_get_int(gd->fdt_blob, node,
"spi-max-frequency",
- SUN4I_SPI_DEFAULT_RATE);
+ SUN4I_SPI_MAX_RATE);
if (plat->max_hz > SUN4I_SPI_MAX_RATE)
plat->max_hz = SUN4I_SPI_MAX_RATE;
--
