RE: [RFC] Create arch/Kconfig.nxp
Tom, I agree to use Kconfig.nxp. thanks for the work. Thanks, Peng. From: Tom Rini Sent: 2022年6月16日 2:00 To: u-boot@lists.denx.de; Priyanka Jain ; Peng Fan ; Stefano Babic Subject: [RFC] Create arch/Kconfig.nxp Hey all, As I migrate assorted CONFIG options over to Kconfig, a common problem I run in to is that between m68k, PowerPC and ARM (both Layerscape and sometimes i.MX) there are options that fit under more than one architecture but also don't have a good place to go. For example, I just ran in to CONFIG_SYS_FSL_NUM_CC_PLLS which started as PowerPC specific, but is used still in Layerscape and more of a SoC detail (but wouldn't make sense in drivers/soc/Kconfig). I was thinking that perhaps arch/Kconfig.nxp would be a good starting place to put these options, but I'm quite open to other suggestions. Thanks! -- Tom
Re: [PATCH 08/13] Convert CONFIG_SAMSUNG_ONENAND to Kconfig
On 6/16/22 01:03, Tom Rini wrote: > This converts the following to Kconfig: >CONFIG_SAMSUNG_ONENAND > > Signed-off-by: Tom Rini Reviewed-by: Jaehoon Chung Best Regards, Jaehoon Chung > --- > configs/s5p_goni_defconfig | 1 + > configs/s5pc210_universal_defconfig | 1 + > configs/smdkc100_defconfig | 1 + > drivers/mtd/Kconfig | 3 +++ > include/configs/s5p_goni.h | 1 - > include/configs/s5pc210_universal.h | 1 - > include/configs/smdkc100.h | 1 - > 7 files changed, 6 insertions(+), 3 deletions(-) > > diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig > index 4d4005de1a48..b5f3ae26b673 100644 > --- a/configs/s5p_goni_defconfig > +++ b/configs/s5p_goni_defconfig > @@ -50,6 +50,7 @@ CONFIG_DM_I2C_GPIO=y > CONFIG_MMC_SDHCI=y > CONFIG_MMC_SDHCI_S5P=y > CONFIG_MTD=y > +CONFIG_SAMSUNG_ONENAND=y > CONFIG_DM_PMIC=y > CONFIG_DM_PMIC_MAX8998=y > CONFIG_PWM_S5P=y > diff --git a/configs/s5pc210_universal_defconfig > b/configs/s5pc210_universal_defconfig > index af7fef58a601..a66ae7dec9b6 100644 > --- a/configs/s5pc210_universal_defconfig > +++ b/configs/s5pc210_universal_defconfig > @@ -49,6 +49,7 @@ CONFIG_MMC_SDHCI=y > CONFIG_MMC_SDHCI_SDMA=y > CONFIG_MMC_SDHCI_S5P=y > CONFIG_MTD=y > +CONFIG_SAMSUNG_ONENAND=y > CONFIG_DM_PMIC=y > CONFIG_DM_PMIC_MAX8998=y > CONFIG_SOFT_SPI=y > diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig > index 8c89c39c9e2f..5f2ab44d4042 100644 > --- a/configs/smdkc100_defconfig > +++ b/configs/smdkc100_defconfig > @@ -36,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y > CONFIG_ENV_IS_IN_ONENAND=y > # CONFIG_MMC is not set > CONFIG_MTD=y > +CONFIG_SAMSUNG_ONENAND=y > CONFIG_SMC911X=y > CONFIG_SMC911X_BASE=0x98800300 > CONFIG_PWM_S5P=y > diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig > index d0ab7c18c649..3d1f6e43fd52 100644 > --- a/drivers/mtd/Kconfig > +++ b/drivers/mtd/Kconfig > @@ -168,6 +168,9 @@ config STM32_FLASH >This is the driver of embedded flash for some STMicroelectronics >STM32 MCU. > > +config SAMSUNG_ONENAND > + bool "Samsung OneNAND driver support" > + > config USE_SYS_MAX_FLASH_BANKS > bool "Enable Max number of Flash memory banks" > help > diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h > index d9eeec48a0dd..ed4f55a4323d 100644 > --- a/include/configs/s5p_goni.h > +++ b/include/configs/s5p_goni.h > @@ -127,7 +127,6 @@ > #define CONFIG_MMC_DEFAULT_DEV 0 > > #define CONFIG_USE_ONENAND_BOARD_INIT > -#define CONFIG_SAMSUNG_ONENAND 1 > #define CONFIG_SYS_ONENAND_BASE 0xB000 > > #define CONFIG_USB_GADGET_DWC2_OTG_PHY > diff --git a/include/configs/s5pc210_universal.h > b/include/configs/s5pc210_universal.h > index ab4fe6b46024..cbc941afb9dd 100644 > --- a/include/configs/s5pc210_universal.h > +++ b/include/configs/s5pc210_universal.h > @@ -88,7 +88,6 @@ > "opts=always_resume=1" > > #define CONFIG_USE_ONENAND_BOARD_INIT > -#define CONFIG_SAMSUNG_ONENAND > #define CONFIG_SYS_ONENAND_BASE 0x0C00 > > #define CONFIG_USB_GADGET_DWC2_OTG_PHY > diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h > index 995623e9a6fe..4199f2bc8e61 100644 > --- a/include/configs/smdkc100.h > +++ b/include/configs/smdkc100.h > @@ -91,7 +91,6 @@ > */ > > #define CONFIG_USE_ONENAND_BOARD_INIT > -#define CONFIG_SAMSUNG_ONENAND 1 > #define CONFIG_SYS_ONENAND_BASE 0xE710 > > /*
Re: [PATCH v5 11/23] mkeficapsule: Add support for generating empty capsules
Sughosh,
On Wed, Jun 15, 2022 at 04:19:56PM +0530, Sughosh Ganu wrote:
> On Wed, 15 Jun 2022 at 10:41, Takahiro Akashi
> wrote:
> >
> > On Thu, Jun 09, 2022 at 05:59:58PM +0530, Sughosh Ganu wrote:
> > > The Dependable Boot specification[1] describes the structure of the
> > > firmware accept and revert capsules. These are empty capsules which
> > > are used for signalling the acceptance or rejection of the updated
> > > firmware by the OS. Add support for generating these empty capsules.
> > >
> > > [1] -
> > > https://git.codelinaro.org/linaro/dependable-boot/mbfw/uploads/6f7ddfe3be24e18d4319e108a758d02e/mbfw.pdf
> > >
> > > Signed-off-by: Sughosh Ganu
> > > ---
> > > doc/mkeficapsule.1 | 29 ++---
> > > tools/eficapsule.h | 8 +++
> > > tools/mkeficapsule.c | 139 +--
> > > 3 files changed, 151 insertions(+), 25 deletions(-)
> > >
> > > diff --git a/doc/mkeficapsule.1 b/doc/mkeficapsule.1
> > > index 09bdc24295..77ca061efd 100644
> > > --- a/doc/mkeficapsule.1
> > > +++ b/doc/mkeficapsule.1
> > > @@ -8,7 +8,7 @@ mkeficapsule \- Generate EFI capsule file for U-Boot
> > >
> > > .SH SYNOPSIS
> > > .B mkeficapsule
> > > -.RI [ options "] " image-blob " " capsule-file
> > > +.RI [ options ] " " [ image-blob ] " " capsule-file
> > >
> > > .SH "DESCRIPTION"
> > > .B mkeficapsule
> > > @@ -23,8 +23,13 @@ Optionally, a capsule file can be signed with a given
> > > private key.
> > > In this case, the update will be authenticated by verifying the signature
> > > before applying.
> > >
> > > +Additionally, an empty capsule file can be generated for acceptance or
> > > +rejection of firmware images by a governing component like an Operating
> > > +System. The empty capsules do not require an image-blob input file.
> > > +
> > > +
> > > .B mkeficapsule
> > > -takes any type of image files, including:
> > > +takes any type of image files when generating non empty capsules,
> > > including:
> > > .TP
> > > .I raw image
> > > format is a single binary blob of any type of firmware.
> > > @@ -36,18 +41,16 @@ multiple binary blobs in a single capsule file.
> > > This type of image file can be generated by
> > > .BR mkimage .
> > >
> > > -.PP
> > > -If you want to use other types than above two, you should explicitly
> > > -specify a guid for the FMP driver.
> > > -
> > > .SH "OPTIONS"
> > > +
> > > .TP
> > > .BI "-g\fR,\fB --guid " guid-string
> > > Specify guid for image blob type. The format is:
> > > ----
> > >
> > > The first three elements are in little endian, while the rest
> > > -is in big endian.
> > > +is in big endian. The option must be specified for all non empty and
> > > +image acceptance capsules
> >
> > "image acceptance" -> "firmware acceptance"
>
> Okay
>
> >
> > I don't still understand why we need a guid for acceptance
> > while revert doesn't require it.
> > I believe that firmware update is "all or nothing", isn't it?
>
> I believe this gives more flexibility in that different components
> might be required to accept the various firmware images. So, one
> component might accept the optee_os, while another might be
> responsible for accepting u-boot. In any case, we do check that all
> the components have their accepted bit set, and only if so, does the
> bank boot in the regular state.
Probably I don't understand the behavior.
Let's assume that we have firmware A and firmware B and then
update both.
When the firmware A is accepted and B is not (not yet issuing
acceptance capsule) and I try to reboot the system, what happens?
>From which bank does the system boot, old one or new one?
> In case of a firmware revert, it would
> not matter which firmware component is being reverted -- the platform
> would simply need to boot from the other bank. Do you see any issue
> with the current method that we have?
>
> >
> > If there is a good reason, please describe a possible/expected
> > scenario.
>
> Where do you want me to explain this, in the feature documentation? Or
> do you think this can be elaborated in greater detail in the spec.
I prefer some explanation in U-Boot doc.
> >
> > > .TP
> > > .BI "-i\fR,\fB --index " index
> > > @@ -57,6 +60,18 @@ Specify an image index
> > > .BI "-I\fR,\fB --instance " instance
> > > Specify a hardware instance
> > >
> > > +.PP
> > > +For generation of firmware accept empty capsule
> > > +.BR --guid
> > > +is mandatory
> > > +.TP
> > > +.BI "-A\fR,\fB --fw-accept "
> > > +Generate a firmware acceptance empty capsule
> > > +
> > > +.TP
> > > +.BI "-R\fR,\fB --fw-revert "
> > > +Generate a firmware revert empty capsule
> > > +
> > > .TP
> > > .BR -h ", " --help
> > > Print a help message
> > > diff --git a/tools/eficapsule.h b/tools/eficapsule.h
> > > index d63b831443..072a4b5598 100644
> > > --- a/tools/eficapsule.h
> > > +++ b/tools/eficapsule.h
> > > @@ -41,6 +41,14 @@ typedef struct {
> > > EFI_GUID(0x4aafd29d, 0x68df, 0x49ee, 0x8a,
Re: [PATCH 1/1] efi_loader: initialize console size late
On Wed, Jun 15, 2022 at 04:02:54PM +0200, Heinrich Schuchardt wrote:
> On 6/15/22 08:34, AKASHI Takahiro wrote:
> > On Wed, Jun 15, 2022 at 08:27:26AM +0200, Heinrich Schuchardt wrote:
> > >
> > >
> > > On 6/15/22 08:16, AKASHI Takahiro wrote:
> > > > On Tue, Jun 14, 2022 at 08:02:03AM +0200, Heinrich Schuchardt wrote:
> > > > > From: Heinrich Schuchardt
> > > > >
> > > > > If CONFIG_VIDEO_DM=n we query the display size from the serial
> > > > > console.
> > > > > Especially when using a remote console the response can be so late
> > > > > that
> > > > > it interferes with autoboot.
> > > > >
> > > > > Only query the console size when running an EFI binary.
> > > > >
> > > > > Add debug output showing the determined console size.
> > > > >
> > > > > Reported-by: Fabio Estevam
> > > > > Fixes: a9bf024b2933 ("efi_loader: disk: a helper function to create
> > > > > efi_disk objects from udevice")
> > >
> > > Said patch made CONFIG_EFI_SETUP_EARLY=y the default.
> >
> > I don't think so.
> > Any config with this option enabled could cause the issue.
>
> We could additionally blame your patches that created this config option.
That is what I said.
> >
> > > >
> > > > If the key part of this patch is to move query_console_size() from
> > > > efi_init_early() to efi_init_obj_list(), the to-be-fixed patch is not
> > > > the one above but
> > > > commit a57ad20d07e8 ("efi_loader: split efi_init_obj_list()
> > > > into two stages")
> > > >
> > > > Moreover, this is just a warning but once Sughosh's patch,
> > > > https://lists.denx.de/pipermail/u-boot/2022-June/485977.html
> > > > is merged and FWU_MULTI_BANK_UPDATE is enabled, the said phenomenon can
> > > > be triggered again because efi_init_obj_list(), hence
> > > > query_console_size(),
> > > > will be called in board_init_r() before showing the U-Boot prompt.
> > >
> > > Then we should not merge it as is.
> >
> > I think that your patch is a tentative workaround.
>
> What makes you think so?
> Any better proposal that we can get in in time for v2022.07?
I said that it was a "warning" against a foreseeable issue.
-Takahiro Akashi
>
> Best regards
>
> Heinrich
>
> >
> > -Takahiro Akashi
> >
> >
> > > Best regards
> > >
> > > Heinrich
> > >
> > > >
> > > > -Takahiro Akashi
> > > >
> > > > > Signed-off-by: Heinrich Schuchardt
> > > > > ---
> > > > >include/efi_loader.h | 2 ++
> > > > >lib/efi_loader/efi_console.c | 20 +---
> > > > >lib/efi_loader/efi_setup.c | 4
> > > > >3 files changed, 19 insertions(+), 7 deletions(-)
> > > > >
> > > > > diff --git a/include/efi_loader.h b/include/efi_loader.h
> > > > > index f6651e2c60..c1e00ebac3 100644
> > > > > --- a/include/efi_loader.h
> > > > > +++ b/include/efi_loader.h
> > > > > @@ -499,6 +499,8 @@ extern struct list_head
> > > > > efi_register_notify_events;
> > > > >int efi_init_early(void);
> > > > >/* Initialize efi execution environment */
> > > > >efi_status_t efi_init_obj_list(void);
> > > > > +/* Set up console modes */
> > > > > +void efi_setup_console_size(void);
> > > > >/* Install device tree */
> > > > >efi_status_t efi_install_fdt(void *fdt);
> > > > >/* Run loaded UEFI image */
> > > > > diff --git a/lib/efi_loader/efi_console.c
> > > > > b/lib/efi_loader/efi_console.c
> > > > > index 60a3fc85ac..3164fd484e 100644
> > > > > --- a/lib/efi_loader/efi_console.c
> > > > > +++ b/lib/efi_loader/efi_console.c
> > > > > @@ -5,6 +5,8 @@
> > > > > * Copyright (c) 2016 Alexander Graf
> > > > > */
> > > > > +#define LOG_CATEGORY LOGC_EFI
> > > > > +
> > > > >#include
> > > > >#include
> > > > >#include
> > > > > @@ -12,6 +14,7 @@
> > > > >#include
> > > > >#include
> > > > >#include
> > > > > +#include
> > > > >#include
> > > > >#include
> > > > >#include
> > > > > @@ -58,7 +61,12 @@ const efi_guid_t efi_guid_text_output_protocol =
> > > > >#define cESC '\x1b'
> > > > >#define ESC "\x1b"
> > > > > -/* Default to mode 0 */
> > > > > +/*
> > > > > + * efi_con_mode - mode information of the Simple Text Output Protocol
> > > > > + *
> > > > > + * Use safe settings before efi_setup_console_size() is called.
> > > > > + * By default enable only the 80x25 mode which must always exist.
> > > > > + */
> > > > >static struct simple_text_output_mode efi_con_mode = {
> > > > > .max_mode = 1,
> > > > > .mode = 0,
> > > > > @@ -333,13 +341,13 @@ static int __maybe_unused query_vidconsole(int
> > > > > *rows, int *cols)
> > > > >}
> > > > >/**
> > > > > - * query_console_size() - update the mode table.
> > > > > + * efi_setup_console_size() - update the mode table.
> > > > > *
> > > > > * By default the only mode available is 80x25. If the console has
> > > > > at least 50
> > > > > * lines, enable mode 80x50. If we can query the console size and
> > > > > it is neither
> > > > > * 80x25 nor
Re: [PATCH v2 0/5] Add ARMv8 CE sha1/sha256 support
Hi Folks, Any comments on this series? Anyone else to CC? Thanks, Loic On Wed, 1 Jun 2022 at 20:26, Loic Poulain wrote: > > This series adds support for the SHA-1 and SHA-256 Secure Hash Algorithm > for CPUs that have support of the ARM v8 Crypto Extensions. It Improves > speed of integrity & signature checking procedures. > > V2: >- Add cover letter & sha256 support. >- Kconfig default 'y' only if SHA1 and SHA256 selected > > Loic Poulain (5): > lib: sha1: Add support for hardware specific sha1_process > sha1: Fix digest state size/type > armv8 SHA-1 using ARMv8 Crypto Extensions: > lib: sha256: Add support for hardware specific sha256_process > armv8 SHA-256 using ARMv8 Crypto Extensions > > arch/arm/cpu/armv8/Kconfig | 15 > arch/arm/cpu/armv8/Makefile | 2 + > arch/arm/cpu/armv8/sha1_ce_core.S | 132 +++ > arch/arm/cpu/armv8/sha1_ce_glue.c | 21 ++ > arch/arm/cpu/armv8/sha256_ce_core.S | 134 > > arch/arm/cpu/armv8/sha256_ce_glue.c | 21 ++ > include/u-boot/sha1.h | 2 +- > lib/sha1.c | 26 +-- > lib/sha256.c| 26 +-- > 9 files changed, 364 insertions(+), 15 deletions(-) > create mode 100644 arch/arm/cpu/armv8/sha1_ce_core.S > create mode 100644 arch/arm/cpu/armv8/sha1_ce_glue.c > create mode 100644 arch/arm/cpu/armv8/sha256_ce_core.S > create mode 100644 arch/arm/cpu/armv8/sha256_ce_glue.c > > -- > 2.7.4 >
Re: [PATCH 07/13] Rename CONFIG_PWM to CONFIG_PWM_S5P and move to Kconfig
On 6/16/22 01:03, Tom Rini wrote: > We rename the S5P specific "CONFIG_PWM" to CONFIG_PWM_S5P and move it to > Kconfig. Given the usage of CONFIG_PWM_NX, we have that select this new > symbol. > > Cc: Jaehoon Chung > Cc: Minkyu Kang > Signed-off-by: Tom Rini Reviewed-by: Jaehoon Chung Best Regards, Jaehoon Chung > --- > arch/arm/cpu/armv7/s5p-common/Makefile | 3 +-- > board/friendlyarm/Kconfig | 1 + > configs/s5p_goni_defconfig | 1 + > configs/smdkc100_defconfig | 1 + > drivers/pwm/Kconfig| 5 + > include/configs/exynos-common.h| 3 --- > include/configs/s5p_goni.h | 3 --- > include/configs/smdkc100.h | 3 --- > 8 files changed, 9 insertions(+), 11 deletions(-) > > diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile > b/arch/arm/cpu/armv7/s5p-common/Makefile > index bfe02389cd94..0985420fe5c8 100644 > --- a/arch/arm/cpu/armv7/s5p-common/Makefile > +++ b/arch/arm/cpu/armv7/s5p-common/Makefile > @@ -3,14 +3,13 @@ > # Copyright (C) 2009 Samsung Electronics > # Minkyu Kang > > +obj-$(CONFIG_PWM_S5P) += pwm.o > ifdef CONFIG_ARCH_NEXELL > -obj-$(CONFIG_PWM_NX) += pwm.o > obj-$(CONFIG_S5P4418_ONEWIRE) += pwm.o > else > obj-y += cpu_info.o > ifndef CONFIG_SPL_BUILD > obj-y += timer.o > obj-y += sromc.o > -obj-$(CONFIG_PWM) += pwm.o > endif > endif > diff --git a/board/friendlyarm/Kconfig b/board/friendlyarm/Kconfig > index f8f9cfd879a8..fa04727a6a2b 100644 > --- a/board/friendlyarm/Kconfig > +++ b/board/friendlyarm/Kconfig > @@ -11,6 +11,7 @@ config S5P4418_ONEWIRE > > config PWM_NX > bool "PWM" > + select PWM_S5P > help > This enables LCD-Backlight control via PWM. > endchoice > diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig > index a0104044a85f..4d4005de1a48 100644 > --- a/configs/s5p_goni_defconfig > +++ b/configs/s5p_goni_defconfig > @@ -52,6 +52,7 @@ CONFIG_MMC_SDHCI_S5P=y > CONFIG_MTD=y > CONFIG_DM_PMIC=y > CONFIG_DM_PMIC_MAX8998=y > +CONFIG_PWM_S5P=y > CONFIG_USB=y > CONFIG_USB_GADGET=y > CONFIG_USB_GADGET_MANUFACTURER="Samsung" > diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig > index 2c8bd1c8ee27..8c89c39c9e2f 100644 > --- a/configs/smdkc100_defconfig > +++ b/configs/smdkc100_defconfig > @@ -38,3 +38,4 @@ CONFIG_ENV_IS_IN_ONENAND=y > CONFIG_MTD=y > CONFIG_SMC911X=y > CONFIG_SMC911X_BASE=0x98800300 > +CONFIG_PWM_S5P=y > diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig > index cb54e67faebf..8fd5a2e20519 100644 > --- a/drivers/pwm/Kconfig > +++ b/drivers/pwm/Kconfig > @@ -84,6 +84,11 @@ config PWM_SANDBOX > useful. The PWM can be enabled but is not connected to any outputs > so this is not very useful. > > +config PWM_S5P > + bool "Enable non-DM support for S5P PWM" > + depends on (S5P || ARCH_NEXELL) > + default y > + > config PWM_SIFIVE > bool "Enable support for SiFive PWM" > depends on DM_PWM > diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h > index 79860212f403..246aa9b7ab99 100644 > --- a/include/configs/exynos-common.h > +++ b/include/configs/exynos-common.h > @@ -18,9 +18,6 @@ > > /* select serial console configuration */ > > -/* PWM */ > -#define CONFIG_PWM > - > /* Miscellaneous configurable options */ > > #endif /* __CONFIG_H */ > diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h > index 8b7e2e5dc9e9..d9eeec48a0dd 100644 > --- a/include/configs/s5p_goni.h > +++ b/include/configs/s5p_goni.h > @@ -21,9 +21,6 @@ > /* MMC */ > #define SDHCI_MAX_HOSTS 4 > > -/* PWM */ > -#define CONFIG_PWM 1 > - > /* USB Composite download gadget - g_dnl */ > #define DFU_DEFAULT_POLL_TIMEOUT 300 > > diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h > index 5edf6f607270..995623e9a6fe 100644 > --- a/include/configs/smdkc100.h > +++ b/include/configs/smdkc100.h > @@ -24,9 +24,6 @@ > * select serial console configuration > */ > > -/* PWM */ > -#define CONFIG_PWM 1 > - > #define COMMON_BOOT "console=ttySAC0,115200n8" \ > " mem=128M " \ > " " CONFIG_MTDPARTS_DEFAULT
[GIT PULL] Please pull u-boot-pmic master
Dear Tom, Please pull u-boot-pmic master into u-boot master branch. If there is a problem, let me know, plz Best Regards, Jaehoon Chung CI: https://source.denx.de/u-boot/custodians/u-boot-pmic/-/pipelines/12303 The following changes since commit 92a8bc6b419f548230f10a924db2b3ef10a5edad: Merge tag 'efi-2022-07-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi (2022-06-13 09:33:37 -0400) are available in the Git repository at: g...@source.denx.de:u-boot/custodians/u-boot-pmic.git master for you to fetch changes up to 752bea3ca4d095e4da948c643fc6d6ea7427c773: pmic: pca9450: add DM_I2C dependencies in Kconfig (2022-06-14 11:20:50 +0900) Rasmus Villemoes (1): pmic: pca9450: add DM_I2C dependencies in Kconfig drivers/power/pmic/Kconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
[GIT PULL] Please pull u-boot-mmc master
Dear Tom, Please pull u-boot-mmc master into u-boot master branch. If there is any problem, let me know, plz. Sorry for late. Best Regards, Jaehoon Chung CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/12319 The following changes since commit c18e5fb055ab789f58434e3cb432582adee0134c: dtoc: Update test_src_scan.py for new tegra compatibles (2022-06-14 13:59:23 -0400) are available in the Git repository at: g...@source.denx.de:u-boot/custodians/u-boot-mmc.git master for you to fetch changes up to 12a29d3b851029212ca3b3e0f233fc7b62aa0a39: mmc: fsl_esdhc_imx: Implement wait_dat0 mmc ops (2022-06-15 15:39:59 +0900) Loic Poulain (2): mmc: Add support for wait_dat0 callback mmc: fsl_esdhc_imx: Implement wait_dat0 mmc ops Patrick Delaunay (2): mmc: fix error message for unaligned erase request env: mmc : align erase address and size on erase_grp_size drivers/mmc/fsl_esdhc_imx.c | 50 ++--- drivers/mmc/mmc.c | 3 +++ drivers/mmc/mmc_write.c | 2 +- env/mmc.c | 10 ++--- include/mmc.h | 1 + 5 files changed, 45 insertions(+), 21 deletions(-)
[PATCH V4 2/2] nvmem: add driver handling U-Boot environment variables
From: Rafał Miłecki
U-Boot stores its setup as environment variables. It's a list of
key-value pairs stored on flash device with a custom header.
This commit adds an NVMEM driver that:
1. Provides NVMEM access to environment vars binary data
2. Extracts variables as NVMEM cells
Current Linux's NVMEM sysfs API allows reading whole NVMEM data block.
It can be used by user-space tools for reading U-Boot env vars block
without the hassle of finding its location. Parsing will still need to
be re-done there.
Kernel-parsed NVMEM cells can be read however by Linux drivers. This may
be useful for Ethernet drivers for reading device MAC address which is
often stored as U-Boot env variable.
Signed-off-by: Rafał Miłecki
---
V3: Use of_get_mtd_device_by_node() (thanks Ahmad) & update description
V2: Drop ARCH_BCM4908 dependency as there are plenty architectures using
U-Boot bootloader. Thanks Srinivas.
V4: Mention MTD in Kconfig help
Use correct MTD device (instead of parent) - simplifies code a lot
Use flexible arrays syntax ([])
Use of_device_get_match_data() helper
Use dev_err_probe()
As noticed by Ahmad a missing NVMEM subsystem feature is user-space
access to parsed NVMEM cells. That is something I started working on
some time ago and I'm planning to get back to at some point, please
check:
[PATCH 2/2] nvmem: expose NVMEM cells in sysfs
https://lore.kernel.org/lkml/20211220064730.28806-2-zaj...@gmail.com/
---
MAINTAINERS| 1 +
drivers/nvmem/Kconfig | 13 +++
drivers/nvmem/Makefile | 2 +
drivers/nvmem/u-boot-env.c | 218 +
4 files changed, 234 insertions(+)
create mode 100644 drivers/nvmem/u-boot-env.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 475e28365385..43b427fa76b0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20411,6 +20411,7 @@ U-BOOT ENVIRONMENT VARIABLES
M: Rafał Miłecki
S: Maintained
F: Documentation/devicetree/bindings/nvmem/u-boot,env.yaml
+F: drivers/nvmem/u-boot-env.c
UACCE ACCELERATOR FRAMEWORK
M: Zhangfei Gao
diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
index d72d879a6d34..bab8a29c9861 100644
--- a/drivers/nvmem/Kconfig
+++ b/drivers/nvmem/Kconfig
@@ -344,4 +344,17 @@ config NVMEM_APPLE_EFUSES
This driver can also be built as a module. If so, the module will
be called nvmem-apple-efuses.
+config NVMEM_U_BOOT_ENV
+ tristate "U-Boot environment variables support"
+ depends on OF && MTD
+ select CRC32
+ help
+ U-Boot stores its setup as environment variables. This driver adds
+ support for verifying & exporting such data. It also exposes variables
+ as NVMEM cells so they can be referenced by other drivers.
+
+ Currently this drivers works only with env variables on top of MTD.
+
+ If compiled as module it will be called nvmem_u-boot-env.
+
endif
diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
index c710b64f9fe4..399f9972d45b 100644
--- a/drivers/nvmem/Makefile
+++ b/drivers/nvmem/Makefile
@@ -69,3 +69,5 @@ obj-$(CONFIG_NVMEM_APPLE_EFUSES) += nvmem-apple-efuses.o
nvmem-apple-efuses-y := apple-efuses.o
obj-$(CONFIG_MICROCHIP_OTPC) += nvmem-microchip-otpc.o
nvmem-microchip-otpc-y := microchip-otpc.o
+obj-$(CONFIG_NVMEM_U_BOOT_ENV) += nvmem_u-boot-env.o
+nvmem_u-boot-env-y := u-boot-env.o
diff --git a/drivers/nvmem/u-boot-env.c b/drivers/nvmem/u-boot-env.c
new file mode 100644
index ..9b9abfb8f187
--- /dev/null
+++ b/drivers/nvmem/u-boot-env.c
@@ -0,0 +1,218 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2022 Rafał Miłecki
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+enum u_boot_env_format {
+ U_BOOT_FORMAT_SINGLE,
+ U_BOOT_FORMAT_REDUNDANT,
+};
+
+struct u_boot_env {
+ struct device *dev;
+ enum u_boot_env_format format;
+
+ struct mtd_info *mtd;
+
+ /* Cells */
+ struct nvmem_cell_info *cells;
+ int ncells;
+};
+
+struct u_boot_env_image_single {
+ __le32 crc32;
+ uint8_t data[];
+} __packed;
+
+struct u_boot_env_image_redundant {
+ __le32 crc32;
+ u8 mark;
+ uint8_t data[];
+} __packed;
+
+static int u_boot_env_read(void *context, unsigned int offset, void *val,
+ size_t bytes)
+{
+ struct u_boot_env *priv = context;
+ struct device *dev = priv->dev;
+ size_t bytes_read;
+ int err;
+
+ err = mtd_read(priv->mtd, offset, bytes, _read, val);
+ if (err && !mtd_is_bitflip(err)) {
+ dev_err(dev, "Failed to read from mtd: %d\n", err);
+ return err;
+ }
+
+ if (bytes_read != bytes) {
+ dev_err(dev, "Failed to read %zu bytes\n", bytes);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int u_boot_env_add_cells(struct
[PATCH V4 1/2] mtd: allow getting MTD device associated with a specific DT node
From: Rafał Miłecki
MTD subsystem API allows interacting with MTD devices (e.g. reading,
writing, handling bad blocks). So far a random driver could get MTD
device only by its name (get_mtd_device_nm()). This change allows
getting them also by a DT node.
This API is required for drivers handling DT defined MTD partitions in a
specific way (e.g. U-Boot (sub)partition with environment variables).
Signed-off-by: Rafał Miłecki
Acked-by: Miquel Raynal
---
V3: First introduction of of_get_mtd_device_by_node()
V4: Use EPROBE_DEFER
Srinivas: in V3 Miquel said it's OK to push this patch through NVMEM
---
drivers/mtd/mtdcore.c | 28
include/linux/mtd/mtd.h | 1 +
2 files changed, 29 insertions(+)
diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index 9eb0680db312..3613cc142f25 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1154,6 +1154,34 @@ int __get_mtd_device(struct mtd_info *mtd)
}
EXPORT_SYMBOL_GPL(__get_mtd_device);
+/**
+ * of_get_mtd_device_by_node - obtain an MTD device associated with a given
node
+ *
+ * @np: device tree node
+ */
+struct mtd_info *of_get_mtd_device_by_node(struct device_node *np)
+{
+ struct mtd_info *mtd = NULL;
+ struct mtd_info *tmp;
+ int err;
+
+ mutex_lock(_table_mutex);
+
+ err = -EPROBE_DEFER;
+ mtd_for_each_device(tmp) {
+ if (mtd_get_of_node(tmp) == np) {
+ mtd = tmp;
+ err = __get_mtd_device(mtd);
+ break;
+ }
+ }
+
+ mutex_unlock(_table_mutex);
+
+ return err ? ERR_PTR(err) : mtd;
+}
+EXPORT_SYMBOL_GPL(of_get_mtd_device_by_node);
+
/**
* get_mtd_device_nm - obtain a validated handle for an MTD device by
* device name
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 955aee14b0f7..6fc841ceef31 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -677,6 +677,7 @@ extern int mtd_device_unregister(struct mtd_info *master);
extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num);
extern int __get_mtd_device(struct mtd_info *mtd);
extern void __put_mtd_device(struct mtd_info *mtd);
+extern struct mtd_info *of_get_mtd_device_by_node(struct device_node *np);
extern struct mtd_info *get_mtd_device_nm(const char *name);
extern void put_mtd_device(struct mtd_info *mtd);
--
2.34.1
Re: [PATCH V3 2/2] nvmem: add driver handling U-Boot environment variables
On 14.06.2022 08:45, Ahmad Fatoum wrote:
+ if (err && !mtd_is_bitflip(err)) {
+ dev_err(dev, "Failed to read from mtd: %d\n", err);
Nitpick: %pe
My "err" variable in int, not a pointer (I don't use PTR_ERR()).
+static int u_boot_env_add_cells(struct u_boot_env *priv, uint8_t *buf,
+ size_t data_offset, size_t data_len)
+{
+ struct device *dev = priv->dev;
+ char *data = buf + data_offset;
+ char *var, *value, *eq;
+ int idx;
+
+ priv->ncells = 0;
+ for (var = data; var < data + data_len && *var; var += strlen(var) + 1)
+ priv->ncells++;
+
+ priv->cells = devm_kcalloc(dev, priv->ncells, sizeof(*priv->cells),
GFP_KERNEL);
+ if (!priv->cells)
+ return -ENOMEM;
+
+ for (var = data, idx = 0;
+var < data + data_len && *var;
+var = value + strlen(value) + 1, idx++) {
+ eq = strchr(var, '=');
+ if (!eq)
+ break;
+ *eq = '\0';
+ value = eq + 1;
+
+ priv->cells[idx].name = devm_kstrdup(dev, var, GFP_KERNEL);
+ if (!priv->cells[idx].name)
+ return -ENOMEM;
+ priv->cells[idx].offset = data_offset + value - data;
+ priv->cells[idx].bytes = strlen(value);
U-Boot environment can't hold binary values?
I believe it can't. In any case \0 is a always a separator.
+ }
+
+ if (WARN_ON(idx != priv->ncells))
+ priv->ncells = idx;
+
+ return 0;
+}
[RFC] Create arch/Kconfig.nxp
Hey all, As I migrate assorted CONFIG options over to Kconfig, a common problem I run in to is that between m68k, PowerPC and ARM (both Layerscape and sometimes i.MX) there are options that fit under more than one architecture but also don't have a good place to go. For example, I just ran in to CONFIG_SYS_FSL_NUM_CC_PLLS which started as PowerPC specific, but is used still in Layerscape and more of a SoC detail (but wouldn't make sense in drivers/soc/Kconfig). I was thinking that perhaps arch/Kconfig.nxp would be a good starting place to put these options, but I'm quite open to other suggestions. Thanks! -- Tom signature.asc Description: PGP signature
[PATCH v2] configs: stm32mp: cleanup the stm32mp15 file
Remove STM32_SYSRAM_END and clean the comments in stm32mp15_common.h file after moving some CONFIG to Kconfig: CONFIG_SYS_CBSIZE, CONFIG_SPL_MAX_FOOTPRINT, CONFIG_SYS_SPL_MALLOC_START and CONFIG_SYS_SPL_MALLOC_SIZE. Signed-off-by: Patrick Delaunay --- Changes in v2: - remove the define STM32_SYSRAM_END, no more used include/configs/stm32mp15_common.h | 11 --- 1 file changed, 11 deletions(-) diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 08a72483bf..fc636beb3f 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -15,10 +15,6 @@ */ #define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE -/* - * Console I/O buffer size - */ - /* * For booting Linux, use the first 256 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. @@ -28,13 +24,6 @@ /* Extend size of kernel image for uncompression */ #define CONFIG_SYS_BOOTM_LEN SZ_32M -/* SPL support */ -#ifdef CONFIG_SPL -/* SPL use DDR */ - -/* Restrict SPL to fit within SYSRAM */ -#define STM32_SYSRAM_END (STM32_SYSRAM_BASE + STM32_SYSRAM_SIZE) -#endif /* #ifdef CONFIG_SPL */ /*MMC SD*/ #define CONFIG_SYS_MMC_MAX_DEVICE 3 -- 2.25.1
Re: [PATCH] configs: stm32mp: cleanup the stm32mp15 file
Hi, On 6/15/22 17:48, Patrick Delaunay wrote: Clean the comments in stm32mp15_common.h file after move CONFIG_ to Kconfig: - CONFIG_SYS_CBSIZE - CONFIG_SYS_SPL_MALLOC_START and CONFIG_SYS_SPL_MALLOC_SIZE Signed-off-by: Patrick Delaunay --- include/configs/stm32mp15_common.h | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 08a72483bf..c7b200d4b1 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -15,10 +15,6 @@ */ #define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE -/* - * Console I/O buffer size - */ - /* * For booting Linux, use the first 256 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. @@ -30,11 +26,10 @@ /* SPL support */ #ifdef CONFIG_SPL -/* SPL use DDR */ - /* Restrict SPL to fit within SYSRAM */ #define STM32_SYSRAM_END (STM32_SYSRAM_BASE + STM32_SYSRAM_SIZE) #endif /* #ifdef CONFIG_SPL */ + after check the define STM32_SYSRAM_END is no more used => to remove i was only used in a define removed in config file after migration to Kconfig #define CONFIG_SPL_MAX_FOOTPRINT (STM32_SYSRAM_END - CONFIG_SPL_TEXT_BASE) /*MMC SD*/ #define CONFIG_SYS_MMC_MAX_DEVICE 3 Regards Patrick
Re: [PATCH v3 0/9] spl: Use common function for loading/parsing images
On Thu, May 05, 2022 at 04:16:46PM -0400, Sean Anderson wrote: > This series adds support for loading all image types (Legacy, FIT (with > and without LOAD_FIT_FULL), and i.MX) to the MMC, SPI, NOR, NET, FAT, > and EXT load methods. It does this by introducing a helper function > which handles the minutiae of invoking the proper parsing function, and > reading the rest of the image. > > Hopefully, this will make it easier for load methods to support all > image types that U-Boot supports, without having undocumented > unsupported image types. I applied this to several loaders which were > invoking spl_load_simple_fit and/or spl_parse_image_header, but I did > not use it with others (e.g. DFU/RAM) which had complications in the > mix. This needs to be re-based, sorry. I manually updated 6/9 but now my mx6cuboxi fails to MMC boot and it's more likely a merge error than a new problem, since we iterated over this before I think. Thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/2] rockchip: rk3399: enable spl-fifo-mode for sdmmc only when needed
El Tue, Jun 14, 2022 at 11:16:42AM -0700, Jerome Forissier deia:
> Oops, that should rather be:
>
> +#if (CONFIG_SPL_LOAD_FIT_IMAGE_BUFFER_SIZE == 0)
>
I tested with this change, not that my opinion counts much, but
anyway:
Reviewed-by: Xavier Drudis Ferran
Tested-by: Xavier Drudis Ferran
This changes reduce some 0.2 s the boot time of my Rock Pi 4B.
Before this series, just with u-boot/master from today
c18e5fb055 dtoc: Update test_src_scan.py for new tegra compatibles
plus the patches I sent to this list (I can't boot from MMC without
them)
https://lists.denx.de/pipermail/u-boot/2022-June/485497.html
and bootstage configured, I get :
Timer summary in microseconds (10 records):
MarkElapsed Stage
1,903,436 1,903,436 board_init_f
1,903,436 0 board_init_f
2,900,331996,895 board_init_r
4,091,657 1,191,326 id=64
4,930,650838,993 id=65
4,930,827177 main_loop
7,946,715 3,015,888 bootm_start
9,010,637 1,063,922 id=15
9,010,639 2 start_kernel
Accumulated time:
22,700 dm_r
479,397 dm_f
With that plus 1/2 in this series and
CONFIG_SPL_LOAD_FIT_IMAGE_BUFFER_SIZE=0x3000
I get something similar (slightly slower because of >=3 correct reads
instead of 1 overwriting read per image):
Timer summary in microseconds (10 records):
MarkElapsed Stage
1,979,414 1,979,414 board_init_f
1,979,414 0 board_init_f
2,976,429997,015 board_init_r
4,166,623 1,190,194 id=64
5,005,623839,000 id=65
5,005,800177 main_loop
8,020,791 3,014,991 bootm_start
9,084,116 1,063,325 id=15
9,084,118 2 start_kernel
Accumulated time:
22,699 dm_r
479,480 dm_f
With that plus this 2/2 it's faster (while safer) than initially.
Timer summary in microseconds (10 records):
MarkElapsed Stage
1,709,384 1,709,384 board_init_f
1,709,384 0 board_init_f
2,706,192996,808 board_init_r
3,895,269 1,189,077 id=64
4,733,786838,517 id=65
4,733,963177 main_loop
7,751,063 3,017,100 bootm_start
8,814,449 1,063,386 id=15
8,814,451 2 start_kernel
Accumulated time:
22,703 dm_r
479,520 dm_f
With this change your 2/2 patch becomes
---
From: Jerome Forissier
Date: Thu, 9 Jun 2022 17:23:22 +0200
Subject: [PATCH] rockchip: rk3399: enable spl-fifo-mode for sdmmc only when
needed
Commit 5c606ca35c42 ("rockchip: rk3399: enable spl-fifo-mode for sdmmc")
mentions that the RK3399 SoC can't do DMA between SDMMC and SRAM.
According to the TRM "7.3.2 Embedded SRAM access path" [1], only the
8KB SRAM at 0xff3b (INTMEM1) is in this situation. The 192KB SRAM
can be accessed by both DMA controllers.
Assuming the only use case for writing from MMC to INTMEM1 is loading
a FIT image, and with the introduction of a temporary buffer for that
purpose (CONFIG_SPL_LOAD_FIT_IMAGE_BUFFER_SIZE, which is required
anyways to ensure the destination boundaries are enforced), then
spl-fifo-mode is not needed anymore and DMA can be enabled safely.
Link: [1] https://www.rockchip.fr/Rockchip%20RK3399%20TRM%20V1.4%20Part1.pdf
CC: Deepak Das
Signed-off-by: Jerome Forissier
---
arch/arm/dts/rk3399-u-boot.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 716b9a433a..e0bb230022 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -124,9 +124,10 @@
{
u-boot,dm-pre-reloc;
+#if (CONFIG_SPL_LOAD_FIT_IMAGE_BUFFER_SIZE == 0)
/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
u-boot,spl-fifo-mode;
+#endif
};
{
--
2.20.1
Re: [PATCH 6/6] ARM: dts: stm32: Add DHCOR based DRC Compact board
Hi, On 6/13/22 11:55, Marek Vasut wrote: Add DT for DH DRC Compact unit, which is a universal controller device. The system has two ethernet ports, one CAN, RS485 and RS232, USB, uSD card slot, eMMC and SDIO Wi-Fi. Signed-off-by: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay --- arch/arm/dts/Makefile | 3 +- .../arm/dts/stm32mp153c-dhcor-drc-compact.dts | 30 ++ .../stm32mp15xx-dhcor-drc-compact-u-boot.dtsi | 120 +++ .../arm/dts/stm32mp15xx-dhcor-drc-compact.dts | 16 + .../dts/stm32mp15xx-dhcor-drc-compact.dtsi| 326 ++ .../dh_stm32mp1/u-boot-dhcor.its | 15 + configs/stm32mp15_dhcor_basic_defconfig | 1 + 7 files changed, 510 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/stm32mp153c-dhcor-drc-compact.dts create mode 100644 arch/arm/dts/stm32mp15xx-dhcor-drc-compact-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dts create mode 100644 arch/arm/dts/stm32mp15xx-dhcor-drc-compact.dtsi Reviewed-by: Patrick Delaunay Thanks Patrick
Re: [PATCH 5/6] ARM: dts: stm32: Add alternate pinmux for SPI2 pins
Hi, On 6/13/22 11:55, Marek Vasut wrote: Add another mux option for SPI2 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay --- arch/arm/dts/stm32mp15-pinctrl.dtsi | 15 +++ 1 file changed, 15 insertions(+) Reviewed-by: Patrick Delaunay Thanks Patrick
Re: [PATCH 4/6] ARM: dts: stm32: Add alternate pinmux for CAN1 pins
Hi, On 6/13/22 11:55, Marek Vasut wrote: Add another mux option for CAN1 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay --- arch/arm/dts/stm32mp15-pinctrl.dtsi | 20 1 file changed, 20 insertions(+) Reviewed-by: Patrick Delaunay Thanks Patrick
Re: [PATCH 3/6] ARM: dts: stm32: Add alternate pinmux for UART5 pins
Hi, On 6/13/22 11:55, Marek Vasut wrote: Add another mux option for UART5 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay --- arch/arm/dts/stm32mp15-pinctrl.dtsi | 13 + 1 file changed, 13 insertions(+) Reviewed-by: Patrick Delaunay Thanks Patrick
Re: [PATCH 2/6] ARM: dts: stm32: Add alternate pinmux for UART4 pins
Hi, On 6/13/22 11:55, Marek Vasut wrote: Add another mux option for UART4 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay --- arch/arm/dts/stm32mp15-pinctrl.dtsi | 30 + 1 file changed, 30 insertions(+) Reviewed-by: Patrick Delaunay Thanks Patrick
Re: [PATCH 1/6] ARM: dts: stm32: Add alternate pinmux for UART3 pins
Hi, On 6/13/22 11:55, Marek Vasut wrote: Add another mux option for UART3 pins, this is used on DRC Compact board. Signed-off-by: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay --- arch/arm/dts/stm32mp15-pinctrl.dtsi | 41 + 1 file changed, 41 insertions(+) Reviewed-by: Patrick Delaunay Thanks Patrick
[PATCH 13/13] Convert CONFIG_SYS_DDR_RAW_TIMING to Kconfig
This converts the following to Kconfig: CONFIG_SYS_DDR_RAW_TIMING Signed-off-by: Tom Rini --- README | 6 -- configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_NOR_defconfig| 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_NOR_defconfig| 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig| 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig| 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig| 1 + configs/ls1021aqds_nand_defconfig| 1 + configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021aqds_nor_defconfig | 1 + configs/ls1021aqds_nor_lpuart_defconfig | 1 + configs/ls1021aqds_qspi_defconfig| 1 + configs/ls1021aqds_sdcard_ifc_defconfig | 1 + configs/ls1021aqds_sdcard_qspi_defconfig | 1 + configs/ls1043ardb_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_defconfig | 1 + configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_tfa_defconfig | 1 + drivers/ddr/fsl/Kconfig | 7 +++ include/configs/P1010RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/ls1021aqds.h | 4 include/configs/ls1043ardb.h | 1 - include/configs/ls2080a_common.h | 4 include/configs/p1_p2_rdb_pc.h | 1 - 55 files changed, 54 insertions(+), 18 deletions(-) diff --git a/README b/README index 50a326a12426..a8d43f63b7e3 100644 --- a/README +++ b/README @@ -2079,12 +2079,6 @@ Low Level (hardware related) configuration options: one, specify here. Note that the value must resolve to something your driver can deal with. -- CONFIG_SYS_DDR_RAW_TIMING - Get DDR timing information from other than SPD. Common with - soldered DDR chips onboard without SPD. DDR raw timing - parameters are extracted from datasheet and hard-coded into - header files or board specific files. - - CONFIG_FSL_DDR_INTERACTIVE Enable interactive DDR debugging. See doc/README.fsl-ddr. diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index c8f7e405d45e..607278434c4c 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -83,6 +83,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ= CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 8d999b6375d2..81bfd7ae518c 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -50,6 +50,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ= CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index d9bf749bc505..1ebfdec719e8 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -72,6 +72,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ= CONFIG_SYS_SPD_BUS_NUM=1
[PATCH 12/13] Convert CONFIG_SYS_SPD_BUS_NUM to Kconfig
This converts the following to Kconfig: CONFIG_SYS_SPD_BUS_NUM Signed-off-by: Tom Rini --- README | 5 - configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_NOR_defconfig| 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_NOR_defconfig| 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig| 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig| 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig| 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig| 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig| 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig| 1 + drivers/ddr/Kconfig | 5 + include/configs/MPC8548CDS.h | 2 -- include/configs/P1010RDB.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/km/pg-wcom-ls102xa.h | 1 - include/configs/kmcent2.h| 1 - include/configs/ls1021aqds.h | 1 - include/configs/ls1043aqds.h | 1 - include/configs/ls1043ardb.h | 2 -- include/configs/ls1046aqds.h | 1 - include/configs/ls1046ardb.h | 1 - include/configs/ls1088aqds.h | 1 - include/configs/ls1088ardb.h | 1 - include/configs/ls2080aqds.h | 1 - include/configs/ls2080ardb.h | 1 - include/configs/lx2160a_common.h | 1 - include/configs/novena.h | 1 - include/configs/p1_p2_rdb_pc.h | 3 --- include/configs/socrates.h | 2 -- include/configs/vf610twr.h | 1 - include/i2c.h| 3 --- 75 files changed, 52 insertions(+), 38 deletions(-) diff --git a/README b/README index 017dc2c61da0..50a326a12426 100644 --- a/README +++ b/README @@ -1302,11 +1302,6 @@ The following options need to be configured: will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1 - CONFIG_SYS_SPD_BUS_NUM - - If defined, then this indicates the I2C bus number for DDR SPD. - If not defined, then U-Boot assumes that SPD is on I2C bus 0. - CONFIG_SYS_RTC_BUS_NUM If defined, then this indicates the I2C bus number for the RTC. diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 3d25bb18e461..c8f7e405d45e 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -81,6 +81,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=
[PATCH 07/13] Rename CONFIG_PWM to CONFIG_PWM_S5P and move to Kconfig
We rename the S5P specific "CONFIG_PWM" to CONFIG_PWM_S5P and move it to Kconfig. Given the usage of CONFIG_PWM_NX, we have that select this new symbol. Cc: Jaehoon Chung Cc: Minkyu Kang Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/s5p-common/Makefile | 3 +-- board/friendlyarm/Kconfig | 1 + configs/s5p_goni_defconfig | 1 + configs/smdkc100_defconfig | 1 + drivers/pwm/Kconfig| 5 + include/configs/exynos-common.h| 3 --- include/configs/s5p_goni.h | 3 --- include/configs/smdkc100.h | 3 --- 8 files changed, 9 insertions(+), 11 deletions(-) diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile b/arch/arm/cpu/armv7/s5p-common/Makefile index bfe02389cd94..0985420fe5c8 100644 --- a/arch/arm/cpu/armv7/s5p-common/Makefile +++ b/arch/arm/cpu/armv7/s5p-common/Makefile @@ -3,14 +3,13 @@ # Copyright (C) 2009 Samsung Electronics # Minkyu Kang +obj-$(CONFIG_PWM_S5P) += pwm.o ifdef CONFIG_ARCH_NEXELL -obj-$(CONFIG_PWM_NX) += pwm.o obj-$(CONFIG_S5P4418_ONEWIRE) += pwm.o else obj-y += cpu_info.o ifndef CONFIG_SPL_BUILD obj-y += timer.o obj-y += sromc.o -obj-$(CONFIG_PWM) += pwm.o endif endif diff --git a/board/friendlyarm/Kconfig b/board/friendlyarm/Kconfig index f8f9cfd879a8..fa04727a6a2b 100644 --- a/board/friendlyarm/Kconfig +++ b/board/friendlyarm/Kconfig @@ -11,6 +11,7 @@ config S5P4418_ONEWIRE config PWM_NX bool "PWM" + select PWM_S5P help This enables LCD-Backlight control via PWM. endchoice diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index a0104044a85f..4d4005de1a48 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -52,6 +52,7 @@ CONFIG_MMC_SDHCI_S5P=y CONFIG_MTD=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y +CONFIG_PWM_S5P=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Samsung" diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 2c8bd1c8ee27..8c89c39c9e2f 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -38,3 +38,4 @@ CONFIG_ENV_IS_IN_ONENAND=y CONFIG_MTD=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x98800300 +CONFIG_PWM_S5P=y diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index cb54e67faebf..8fd5a2e20519 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -84,6 +84,11 @@ config PWM_SANDBOX useful. The PWM can be enabled but is not connected to any outputs so this is not very useful. +config PWM_S5P + bool "Enable non-DM support for S5P PWM" + depends on (S5P || ARCH_NEXELL) + default y + config PWM_SIFIVE bool "Enable support for SiFive PWM" depends on DM_PWM diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 79860212f403..246aa9b7ab99 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -18,9 +18,6 @@ /* select serial console configuration */ -/* PWM */ -#define CONFIG_PWM - /* Miscellaneous configurable options */ #endif /* __CONFIG_H */ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 8b7e2e5dc9e9..d9eeec48a0dd 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -21,9 +21,6 @@ /* MMC */ #define SDHCI_MAX_HOSTS4 -/* PWM */ -#define CONFIG_PWM 1 - /* USB Composite download gadget - g_dnl */ #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 5edf6f607270..995623e9a6fe 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -24,9 +24,6 @@ * select serial console configuration */ -/* PWM */ -#define CONFIG_PWM 1 - #define COMMON_BOOT"console=ttySAC0,115200n8" \ " mem=128M " \ " " CONFIG_MTDPARTS_DEFAULT -- 2.25.1
[PATCH 11/13] Convert CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR to Kconfig
This converts the following to Kconfig: CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR Signed-off-by: Tom Rini --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 5 + include/configs/ls2080aqds.h | 3 --- include/configs/ls2080ardb.h | 3 --- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 5a809b46118c..3ea023d36f9b 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -511,6 +511,11 @@ config DP_DDR_CTRL depends on SYS_FSL_HAS_DP_DDR default 2 if ARCH_LS2080A +config DP_DDR_DIMM_SLOTS_PER_CTLR + int + depends on SYS_FSL_HAS_DP_DDR + default 1 if ARCH_LS2080A + config DP_DDR_NUM_CTRLS int depends on SYS_FSL_HAS_DP_DDR diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 21ca4afa51ce..96da4ab2ec08 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -25,9 +25,6 @@ #define SPD_EEPROM_ADDRESS60x56/* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ -#ifdef CONFIG_SYS_FSL_HAS_DP_DDR -#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 -#endif #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 43bcc5a9b11c..835fff4bc60b 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -30,9 +30,6 @@ #define SPD_EEPROM_ADDRESS60x56/* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ -#ifdef CONFIG_SYS_FSL_HAS_DP_DDR -#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 -#endif #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT) -- 2.25.1
[PATCH 10/13] Convert CONFIG_USB_GADGET_DWC2_OTG_PHY to Kconfig
This converts the following to Kconfig:
CONFIG_USB_GADGET_DWC2_OTG_PHY
Signed-off-by: Tom Rini
---
configs/odroid_defconfig| 1 +
configs/origen_defconfig| 1 +
configs/s5p_goni_defconfig | 1 +
configs/s5pc210_universal_defconfig | 1 +
configs/trats2_defconfig| 1 +
configs/trats_defconfig | 1 +
drivers/usb/gadget/Kconfig | 5 +
include/configs/exynos4-common.h| 2 --
include/configs/s5p_goni.h | 2 --
include/configs/s5pc210_universal.h | 2 --
include/configs/smdkv310.h | 2 --
11 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig
index 8beb6a006e5e..9f4543c1ba84 100644
--- a/configs/odroid_defconfig
+++ b/configs/odroid_defconfig
@@ -72,6 +72,7 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung"
CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
CONFIG_USB_GADGET_PRODUCT_NUM=0x6601
CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
CONFIG_LIB_HW_RAND=y
diff --git a/configs/origen_defconfig b/configs/origen_defconfig
index 0a36472d3312..9a429a8704a0 100644
--- a/configs/origen_defconfig
+++ b/configs/origen_defconfig
@@ -54,5 +54,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung"
CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
CONFIG_USB_GADGET_PRODUCT_NUM=0x6601
CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig
index 17bd8424da24..c13602d3bb7b 100644
--- a/configs/s5p_goni_defconfig
+++ b/configs/s5p_goni_defconfig
@@ -61,5 +61,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung"
CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
CONFIG_USB_GADGET_PRODUCT_NUM=0x6601
CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
diff --git a/configs/s5pc210_universal_defconfig
b/configs/s5pc210_universal_defconfig
index a66ae7dec9b6..cab0ac8e845b 100644
--- a/configs/s5pc210_universal_defconfig
+++ b/configs/s5pc210_universal_defconfig
@@ -59,5 +59,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung"
CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
CONFIG_USB_GADGET_PRODUCT_NUM=0x6601
CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig
index 5c47a22d1e06..b48ed9c4242d 100644
--- a/configs/trats2_defconfig
+++ b/configs/trats2_defconfig
@@ -62,6 +62,7 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung"
CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
CONFIG_USB_GADGET_PRODUCT_NUM=0x6601
CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
CONFIG_LIB_HW_RAND=y
diff --git a/configs/trats_defconfig b/configs/trats_defconfig
index 008a8ff4b30e..3e0fdfe83483 100644
--- a/configs/trats_defconfig
+++ b/configs/trats_defconfig
@@ -59,6 +59,7 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung"
CONFIG_USB_GADGET_VENDOR_NUM=0x04e8
CONFIG_USB_GADGET_PRODUCT_NUM=0x6601
CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
CONFIG_LIB_HW_RAND=y
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index d81a9c5a100d..350036f2083c 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -92,6 +92,11 @@ config USB_GADGET_DWC2_OTG
if USB_GADGET_DWC2_OTG
+config USB_GADGET_DWC2_OTG_PHY
+ bool "DesignWare USB2.0 HS OTG PHY"
+ help
+ Enable the DesignWare USB2.0 HS OTG physical device interface.
+
config USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
bool "DesignWare USB2.0 HS OTG controller 8-bit PHY bus width"
help
diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h
index 625a2d8dc185..054cb5309e70 100644
--- a/include/configs/exynos4-common.h
+++ b/include/configs/exynos4-common.h
@@ -23,8 +23,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
-#define CONFIG_USB_GADGET_DWC2_OTG_PHY
-
/* Common environment variables */
#define ENV_ITB \
"loadkernel=load mmc ${mmcbootdev}:${mmcbootpart} ${kerneladdr} " \
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 8208f14e09e0..712a47a49569 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -128,6 +128,4 @@
#define CONFIG_SYS_ONENAND_BASE0xB000
-#define CONFIG_USB_GADGET_DWC2_OTG_PHY
-
#endif /* __CONFIG_H */
diff --git a/include/configs/s5pc210_universal.h
b/include/configs/s5pc210_universal.h
index c51ff5718cf2..137537d65f65 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -89,8 +89,6 @@
#define CONFIG_SYS_ONENAND_BASE0x0C00
-#define CONFIG_USB_GADGET_DWC2_OTG_PHY
-
#ifndef__ASSEMBLY__
[PATCH 09/13] Convert CONFIG_USE_ONENAND_BOARD_INIT to Kconfig
This converts the following to Kconfig: CONFIG_USE_ONENAND_BOARD_INIT Signed-off-by: Tom Rini --- cmd/Kconfig | 4 configs/igep00x0_defconfig | 1 + configs/s5p_goni_defconfig | 1 + configs/smdkc100_defconfig | 1 + include/configs/omap3_igep00x0.h| 1 - include/configs/s5p_goni.h | 1 - include/configs/s5pc210_universal.h | 1 - include/configs/smdkc100.h | 1 - 8 files changed, 7 insertions(+), 4 deletions(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index 44d7b62e4fb5..20c84a3c81d9 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1293,6 +1293,10 @@ config CMD_ONENAND and erasing blocks. It allso provides a way to show and change bad blocks, and test the device. +config USE_ONENAND_BOARD_INIT + bool "Call onenand_board_init() in the onenand command" + depends on CMD_ONENAND + config CMD_OSD bool "osd" help diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 00f0a670c2b4..17c97ac27f79 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -52,6 +52,7 @@ CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_ONENAND=y +CONFIG_USE_ONENAND_BOARD_INIT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index b5f3ae26b673..17bd8424da24 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_ONENAND=y +CONFIG_USE_ONENAND_BOARD_INIT=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 5f2ab44d4042..1ed3a8cd3a00 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=384 # CONFIG_CMD_FLASH is not set CONFIG_CMD_ONENAND=y +CONFIG_USE_ONENAND_BOARD_INIT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_FAT=y diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 6be214753f1b..97f47ea5b710 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -66,7 +66,6 @@ BOOTENV /* OneNAND config */ -#define CONFIG_USE_ONENAND_BOARD_INIT #define CONFIG_SYS_ONENAND_BASEONENAND_MAP #define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024) diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index ed4f55a4323d..8208f14e09e0 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -126,7 +126,6 @@ /* FLASH and environment organization */ #define CONFIG_MMC_DEFAULT_DEV 0 -#define CONFIG_USE_ONENAND_BOARD_INIT #define CONFIG_SYS_ONENAND_BASE0xB000 #define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index cbc941afb9dd..c51ff5718cf2 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -87,7 +87,6 @@ "mmcrootpart=3\0" \ "opts=always_resume=1" -#define CONFIG_USE_ONENAND_BOARD_INIT #define CONFIG_SYS_ONENAND_BASE0x0C00 #define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 4199f2bc8e61..1395b8dfe38b 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -90,7 +90,6 @@ * Boot configuration */ -#define CONFIG_USE_ONENAND_BOARD_INIT #define CONFIG_SYS_ONENAND_BASE0xE710 /* -- 2.25.1
[PATCH 08/13] Convert CONFIG_SAMSUNG_ONENAND to Kconfig
This converts the following to Kconfig: CONFIG_SAMSUNG_ONENAND Signed-off-by: Tom Rini --- configs/s5p_goni_defconfig | 1 + configs/s5pc210_universal_defconfig | 1 + configs/smdkc100_defconfig | 1 + drivers/mtd/Kconfig | 3 +++ include/configs/s5p_goni.h | 1 - include/configs/s5pc210_universal.h | 1 - include/configs/smdkc100.h | 1 - 7 files changed, 6 insertions(+), 3 deletions(-) diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index 4d4005de1a48..b5f3ae26b673 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -50,6 +50,7 @@ CONFIG_DM_I2C_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_S5P=y CONFIG_MTD=y +CONFIG_SAMSUNG_ONENAND=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y CONFIG_PWM_S5P=y diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index af7fef58a601..a66ae7dec9b6 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -49,6 +49,7 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_S5P=y CONFIG_MTD=y +CONFIG_SAMSUNG_ONENAND=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y CONFIG_SOFT_SPI=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 8c89c39c9e2f..5f2ab44d4042 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -36,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_ONENAND=y # CONFIG_MMC is not set CONFIG_MTD=y +CONFIG_SAMSUNG_ONENAND=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x98800300 CONFIG_PWM_S5P=y diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index d0ab7c18c649..3d1f6e43fd52 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -168,6 +168,9 @@ config STM32_FLASH This is the driver of embedded flash for some STMicroelectronics STM32 MCU. +config SAMSUNG_ONENAND + bool "Samsung OneNAND driver support" + config USE_SYS_MAX_FLASH_BANKS bool "Enable Max number of Flash memory banks" help diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index d9eeec48a0dd..ed4f55a4323d 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -127,7 +127,6 @@ #define CONFIG_MMC_DEFAULT_DEV 0 #define CONFIG_USE_ONENAND_BOARD_INIT -#define CONFIG_SAMSUNG_ONENAND 1 #define CONFIG_SYS_ONENAND_BASE0xB000 #define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index ab4fe6b46024..cbc941afb9dd 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -88,7 +88,6 @@ "opts=always_resume=1" #define CONFIG_USE_ONENAND_BOARD_INIT -#define CONFIG_SAMSUNG_ONENAND #define CONFIG_SYS_ONENAND_BASE0x0C00 #define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 995623e9a6fe..4199f2bc8e61 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -91,7 +91,6 @@ */ #define CONFIG_USE_ONENAND_BOARD_INIT -#define CONFIG_SAMSUNG_ONENAND 1 #define CONFIG_SYS_ONENAND_BASE0xE710 /* -- 2.25.1
[PATCH 03/13] Convert CONFIG_ENABLE_36BIT_PHYS to Kconfig
This converts the following to Kconfig: CONFIG_ENABLE_36BIT_PHYS Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc85xx/Kconfig | 3 +++ configs/MPC8548CDS_36BIT_defconfig | 1 + configs/MPC8548CDS_defconfig | 1 + configs/MPC8548CDS_legacy_defconfig | 1 + configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_NOR_defconfig| 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_NOR_defconfig| 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig| 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig| 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig| 1 + configs/P2041RDB_NAND_defconfig | 1 + configs/P2041RDB_SDCARD_defconfig| 1 + configs/P2041RDB_SPIFLASH_defconfig | 1 + configs/P2041RDB_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig| 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig| 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig| 1 + configs/T1024RDB_NAND_defconfig | 1 + configs/T1024RDB_SDCARD_defconfig| 1 + configs/T1024RDB_SPIFLASH_defconfig | 1 + configs/T1024RDB_defconfig | 1 + configs/T1042D4RDB_NAND_defconfig| 1 + configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig| 1 + configs/T1042D4RDB_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig| 1 + configs/T2080QDS_SECURE_BOOT_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080QDS_SRIO_PCIE_BOOT_defconfig| 1 + configs/T2080QDS_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig| 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig| 1 + configs/T4240RDB_defconfig | 1 + configs/kmcent2_defconfig| 1 + configs/qemu-ppce500_defconfig | 1 + configs/socrates_defconfig | 1 + include/configs/MPC8548CDS.h | 1 - include/configs/P1010RDB.h | 3 --- include/configs/P2041RDB.h | 2 -- include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 2 -- include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 2 -- include/configs/corenet_ds.h | 2 -- include/configs/kmcent2.h| 2 -- include/configs/p1_p2_rdb_pc.h | 2 -- include/configs/qemu-ppce500.h | 2 --
[PATCH 06/13] smdkc100: Remove some unused options
There are a few options we test and set and then never reference, remove them. Signed-off-by: Tom Rini --- include/configs/smdkc100.h | 10 -- 1 file changed, 10 deletions(-) diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index a7b0ce9f975a..5edf6f607270 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -89,16 +89,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ -#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc000) -#define CONFIG_ENABLE_MMU -#endif - -#ifdef CONFIG_ENABLE_MMU -#define CONFIG_SYS_MAPPED_RAM_BASE 0xc000 -#else -#define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE -#endif - /*--- * Boot configuration */ -- 2.25.1
[PATCH 04/13] watchdog: designware: Make this depend on WDT
As this driver can dynamically determine the values set in
CONFIG_DW_WDT_BASE when using WDT, so make this depend on WDT rather
than migrate CONFIG_DW_WDT_BASE to Kconfig.
Cc: Chee Tien Fong
Cc: Chin-Liang See
Cc: Dinh Nguyen
Cc: Holger Brunck
Cc: Ley Foon Tan
Cc: Marek Vasut
Cc: Siew Chin Lim
Cc: Stefan Roese
Cc: hee Hong Ang
Signed-off-by: Tom Rini
---
drivers/watchdog/Kconfig | 4 ++--
drivers/watchdog/designware_wdt.c | 21 -
include/configs/socfpga_common.h | 1 -
include/configs/socfpga_soc64_common.h | 1 -
4 files changed, 2 insertions(+), 25 deletions(-)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index c3eb8a8aec1b..532ada89c1b2 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -64,8 +64,8 @@ config ULP_WATCHDOG
config DESIGNWARE_WATCHDOG
bool "Designware watchdog timer support"
- select HW_WATCHDOG if !WDT
- default y if WDT && ROCKCHIP_RK3399
+ depends on WDT
+ default y if ROCKCHIP_RK3399
help
Enable this to support Designware Watchdog Timer IP, present e.g.
on Altera SoCFPGA SoCs.
diff --git a/drivers/watchdog/designware_wdt.c
b/drivers/watchdog/designware_wdt.c
index cfec29bd158c..cad756aeaf20 100644
--- a/drivers/watchdog/designware_wdt.c
+++ b/drivers/watchdog/designware_wdt.c
@@ -60,26 +60,6 @@ static void designware_wdt_reset_common(void __iomem *base)
writel(DW_WDT_CRR_RESTART_VAL, base + DW_WDT_CRR);
}
-#if !CONFIG_IS_ENABLED(WDT)
-void hw_watchdog_reset(void)
-{
- designware_wdt_reset_common((void __iomem *)CONFIG_DW_WDT_BASE);
-}
-
-void hw_watchdog_init(void)
-{
- /* reset to disable the watchdog */
- hw_watchdog_reset();
- /* set timer in miliseconds */
- designware_wdt_settimeout((void __iomem *)CONFIG_DW_WDT_BASE,
- CONFIG_DW_WDT_CLOCK_KHZ,
- CONFIG_WATCHDOG_TIMEOUT_MSECS);
- /* enable the watchdog */
- designware_wdt_enable((void __iomem *)CONFIG_DW_WDT_BASE);
- /* reset the watchdog */
- hw_watchdog_reset();
-}
-#else
static int designware_wdt_reset(struct udevice *dev)
{
struct designware_wdt_priv *priv = dev_get_priv(dev);
@@ -195,4 +175,3 @@ U_BOOT_DRIVER(designware_wdt) = {
.ops = _wdt_ops,
.flags = DM_FLAG_PRE_RELOC,
};
-#endif
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index d1efba29fc40..4a7da76e51e6 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -66,7 +66,6 @@
/*
* L4 Watchdog
*/
-#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
#define CONFIG_DW_WDT_CLOCK_KHZ25000
/*
diff --git a/include/configs/socfpga_soc64_common.h
b/include/configs/socfpga_soc64_common.h
index c1037ab595fa..a3e8d5492919 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -92,7 +92,6 @@
/*
* L4 Watchdog
*/
-#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
#ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
#ifndef __ASSEMBLY__
unsigned int cm_get_l4_sys_free_clk_hz(void);
--
2.25.1
[PATCH 05/13] nxp: Cleanup some emulator related options.
- Drop the emulator CONFIG test from include/configs/ls1088ardb.h - Migrate CONFIG_SYS_FSL_DDR_EMU to a select'able option in drivers/ddr/fsl/Kconfig Signed-off-by: Tom Rini --- README | 4 drivers/ddr/fsl/Kconfig | 6 ++ include/configs/ls1088ardb.h | 4 3 files changed, 6 insertions(+), 8 deletions(-) diff --git a/README b/README index 6a4db9dc5617..017dc2c61da0 100644 --- a/README +++ b/README @@ -388,10 +388,6 @@ The following options need to be configured: CONFIG_SYS_FSL_DDR_ADDR Freescale DDR memory-mapped register base. - CONFIG_SYS_FSL_DDR_EMU - Specify emulator support for DDR. Some DDR features such as - deskew training are not available. - CONFIG_SYS_FSL_DDRC_GEN1 Freescale DDR1 controller. diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig index fe69bef3d3ae..6a29b23bab7e 100644 --- a/drivers/ddr/fsl/Kconfig +++ b/drivers/ddr/fsl/Kconfig @@ -10,6 +10,12 @@ config SYS_FSL_MMDC help Select Freescale Multi Mode DDR controller (MMDC). +config SYS_FSL_DDR_EMU + bool + help + Specify emulator support for DDR. Some DDR features such as deskew + training are not available. + if SYS_FSL_DDR || SYS_FSL_MMDC config SYS_FSL_DDR_BE diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index c69003018bfc..aeadf534bc32 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -15,11 +15,7 @@ #define COUNTER_FREQUENCY_REAL 2500/* 25MHz */ -#ifdef CONFIG_EMU -#define CONFIG_SYS_FSL_DDR_EMU -#else #define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ -- 2.25.1
[PATCH 02/13] net: designware: Rename CONFIG_DW_GMAC_DEFAULT_DMA_PBL to GMAC_DEFAULT_DMA_PBL
This value is always used at the default, rename it for now. This
likely should come from the device tree if non-default, moving forward.
Signed-off-by: Tom Rini
---
drivers/net/designware.h | 8 +++-
include/configs/stm32f746-disco.h | 2 --
2 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index a82afb99cabd..281c14f03ffb 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -85,10 +85,8 @@ struct eth_dma_regs {
#define DW_DMA_BASE_OFFSET (0x1000)
-/* Default DMA Burst length */
-#ifndef CONFIG_DW_GMAC_DEFAULT_DMA_PBL
-#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL 8
-#endif
+/* DMA Burst length */
+#define GMAC_DEFAULT_DMA_PBL 8
/* Bus mode register definitions */
#define FIXEDBURST (1 << 16)
@@ -96,7 +94,7 @@ struct eth_dma_regs {
#define PRIORXTX_31(2 << 14)
#define PRIORXTX_21(1 << 14)
#define PRIORXTX_11(0 << 14)
-#define DMA_PBL(CONFIG_DW_GMAC_DEFAULT_DMA_PBL<<8)
+#define DMA_PBL(GMAC_DEFAULT_DMA_PBL << 8)
#define RXHIGHPRIO (1 << 1)
#define DMAMAC_SRST(1 << 0)
diff --git a/include/configs/stm32f746-disco.h
b/include/configs/stm32f746-disco.h
index 73376f16b4d6..df05ee4892a5 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -20,8 +20,6 @@
#define CONFIG_SYS_MAX_FLASH_SECT 8
-#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
-
#define CONFIG_SYS_HZ_CLOCK100 /* Timer is clocked at 1MHz */
#define BOOT_TARGET_DEVICES(func) \
--
2.25.1
[PATCH 01/13] Convert CONFIG_DW_ALTDESCRIPTOR to Kconfig
This converts the following to Kconfig: CONFIG_DW_ALTDESCRIPTOR Signed-off-by: Tom Rini --- configs/galileo_defconfig | 1 + configs/stm32746g-eval_defconfig | 1 + configs/stm32746g-eval_spl_defconfig | 1 + configs/stm32f746-disco_defconfig | 1 + configs/stm32f746-disco_spl_defconfig | 1 + configs/stm32f769-disco_defconfig | 1 + configs/stm32f769-disco_spl_defconfig | 1 + configs/stv0991_defconfig | 1 + drivers/net/Kconfig| 5 + include/configs/galileo.h | 3 --- include/configs/socfpga_common.h | 7 --- include/configs/socfpga_soc64_common.h | 5 - include/configs/stm32f746-disco.h | 1 - include/configs/stv0991.h | 4 14 files changed, 13 insertions(+), 20 deletions(-) diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index 104532bd05f3..5ae13d5a1e2b 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -49,6 +49,7 @@ CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CPU=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_SPI=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/stm32746g-eval_defconfig b/configs/stm32746g-eval_defconfig index 8ca8929f2a4f..64610658c7bd 100644 --- a/configs/stm32746g-eval_defconfig +++ b/configs/stm32746g-eval_defconfig @@ -48,6 +48,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPI=y diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index 55e44f863c1c..753a4b80cbbc 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -69,6 +69,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPL_PINCTRL=y diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index 22274f99b185..e3f80ab8e206 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -48,6 +48,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPI=y diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index c174984b939d..927d28dd9733 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -69,6 +69,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPL_PINCTRL=y diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 9845eb0a10b2..b7e9ee92a7e1 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -47,6 +47,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPI=y diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index a5dc89c80273..bae28b4ec132 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -68,6 +68,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPL_PINCTRL=y diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index d03d984871ab..2c143068b79e 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -37,6 +37,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_PHY_RESET_DELAY=1 CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y CONFIG_CADENCE_QSPI=y CONFIG_HAS_CQSPI_REF_CLK=y diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 56f9416a48db..40b5c8274e9e 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -312,6 +312,7 @@ config ETH_DESIGNWARE_MESON8B config ETH_DESIGNWARE_SOCFPGA select REGMAP select SYSCON + select DW_ALTDESCRIPTOR bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC" depends on DM_ETH && ETH_DESIGNWARE help @@ -326,6 +327,10 @@ config ETH_DESIGNWARE_S700 This provides glue layer to use Synopsys Designware Ethernet MAC present on Actions S700 SoC. +config DW_ALTDESCRIPTOR + bool "Designware Ethernet MAC uses alternate (enhanced) descriptors" + depends on ETH_DESIGNWARE + config ETHOC bool "OpenCores 10/100 Mbps Ethernet MAC" help diff --git a/include/configs/galileo.h b/include/configs/galileo.h index c50ecf27e44c..49f57dda58fb 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -21,9 +21,6
[PATCH] configs: stm32mp: cleanup the stm32mp15 file
Clean the comments in stm32mp15_common.h file after move CONFIG_ to Kconfig: - CONFIG_SYS_CBSIZE - CONFIG_SYS_SPL_MALLOC_START and CONFIG_SYS_SPL_MALLOC_SIZE Signed-off-by: Patrick Delaunay --- include/configs/stm32mp15_common.h | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 08a72483bf..c7b200d4b1 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -15,10 +15,6 @@ */ #define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE -/* - * Console I/O buffer size - */ - /* * For booting Linux, use the first 256 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. @@ -30,11 +26,10 @@ /* SPL support */ #ifdef CONFIG_SPL -/* SPL use DDR */ - /* Restrict SPL to fit within SYSRAM */ #define STM32_SYSRAM_END (STM32_SYSRAM_BASE + STM32_SYSRAM_SIZE) #endif /* #ifdef CONFIG_SPL */ + /*MMC SD*/ #define CONFIG_SYS_MMC_MAX_DEVICE 3 -- 2.25.1
Re: [PATCH RFC v3 03/11] ti: etype: sysfw: Add entry type for sysfw
On 6/15/22 1:47 AM, Neha Malcom Francis wrote:
For K3 devices that require a sysfw image, add entry for SYSFW. It can
contain system firmware image that can be packaged into sysfw.itb by
binman.
HS devices do this very differently, even an RFC without HS support
doesn't make much sense, this all has to change when you add HS.
Please start with that.
Andrew
Signed-off-by: Tarun Sahu
[n-fran...@ti.com: added tests for addition of etype]
Signed-off-by: Neha Malcom Francis
---
Makefile | 1 +
tools/binman/entries.rst | 11 +++
tools/binman/etype/ti_sysfw.py | 28
tools/binman/ftest.py | 7 +++
tools/binman/test/232_ti_sysfw.dts | 13 +
5 files changed, 60 insertions(+)
create mode 100644 tools/binman/etype/ti_sysfw.py
create mode 100644 tools/binman/test/232_ti_sysfw.dts
diff --git a/Makefile b/Makefile
index 61927f8918..d20d264c53 100644
--- a/Makefile
+++ b/Makefile
@@ -1345,6 +1345,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if
$(BINMAN_DEBUG),-D) \
-a opensbi-path=${OPENSBI} \
-a default-dt=$(default_dt) \
-a scp-path=$(SCP) \
+ -a ti-sysfw-path=$(SYSFW) \
-a spl-bss-pad=$(if $(CONFIG_SPL_SEPARATE_BSS),,1) \
-a tpl-bss-pad=$(if $(CONFIG_TPL_SEPARATE_BSS),,1) \
-a spl-dtb=$(CONFIG_SPL_OF_REAL) \
diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index ae4305c99e..9fc5c48c35 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -1203,6 +1203,17 @@ This entry holds firmware for an external
platform-specific coprocessor.
+Entry: ti-sysfw: Texas Instruments System Firmware (SYSFW) blob
+
+
+Properties / Entry arguments:
+- ti-sysfw-path: Filename of file to read into the entry, typically
sysfw.bin
+
+This entry contains system firmware necessary for booting of K3 architecture
+devices.
+
+
+
Entry: section: Entry that contains other entries
-
diff --git a/tools/binman/etype/ti_sysfw.py b/tools/binman/etype/ti_sysfw.py
new file mode 100644
index 00..5b5b307030
--- /dev/null
+++ b/tools/binman/etype/ti_sysfw.py
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Entry type module for TI SYSFW binary blob
+#
+
+import os
+import struct
+import sys
+import zlib
+
+from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg
+from dtoc import fdt_util
+from patman import tools
+
+
+class Entry_ti_sysfw(Entry_blob_named_by_arg):
+"""Entry containing Texas Instruments System Firmware (SYSFW) blob
+
+Properties / Entry arguments:
+- ti-sysfw-path: Filename of file to read into the entry, typically
sysfw.bin
+
+This entry contains system firmware necessary for booting of K3
architecture devices.
+"""
+
+def __init__(self, section, etype, node):
+super().__init__(section, etype, node, 'ti-sysfw')
+self.external = True
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index b5cf549703..671d083c54 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -87,6 +87,7 @@ ATF_BL31_DATA = b'bl31'
TEE_OS_DATA = b'this is some tee OS data'
ATF_BL2U_DATA = b'bl2u'
OPENSBI_DATA = b'opensbi'
+TI_SYSFW_DATA = b'sysfw'
SCP_DATA = b'scp'
TEST_FDT1_DATA= b'fdt1'
TEST_FDT2_DATA= b'test-fdt2'
@@ -195,6 +196,7 @@ class TestFunctional(unittest.TestCase):
TestFunctional._MakeInputFile('tee-pager.bin', TEE_OS_DATA)
TestFunctional._MakeInputFile('bl2u.bin', ATF_BL2U_DATA)
TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA)
+TestFunctional._MakeInputFile('sysfw.bin', TI_SYSFW_DATA)
TestFunctional._MakeInputFile('scp.bin', SCP_DATA)
# Add a few .dtb files for testing
@@ -5529,6 +5531,11 @@ fdt fdtmapExtract the devicetree
blob from the fdtmap
"""Test an image with a pre-load header with an invalid key"""
with self.assertRaises(ValueError) as e:
data = self._DoReadFile('231_pre_load_invalid_key.dts')
+
+def testPackTiSysfw(self):
+"""Test that an image with a SYSFW binary can be created"""
+data = self._DoReadFile('232_ti_sysfw.dts')
+self.assertEqual(TI_SYSFW_DATA, data[:len(TI_SYSFW_DATA)])
def _CheckSafeUniqueNames(self, *images):
"""Check all entries of given images for unsafe unique names"""
diff --git a/tools/binman/test/232_ti_sysfw.dts
b/tools/binman/test/232_ti_sysfw.dts
new file mode 100644
index 00..9e66cbe77b
--- /dev/null
+++ b/tools/binman/test/232_ti_sysfw.dts
@@ -0,0 +1,13 @@
+//
Re: [PATCH u-boot 0/3] renesas: Fix RPC-IF enablement
On Tue, Mar 29, 2022 at 2:19 PM Geert Uytterhoeven
wrote:
> On Renesas R-Car Gen3 platforms, the SPI Multi I/O Bus Controllers
> (RPC-IF) provide access to HyperFlash or QSPI storage. On production
> systems, they are typically locked by the TF-A firmware, unless TF-A is
> built with RCAR_RPC_HYPERFLASH_LOCKED=0. When unlocked, TF-A
> communicates this to subsequent software by passing a DT fragment that
> sets the "status" property of the RPC-IF device node to "okay".
>
> Unfortunately there are several issues preventing this from working all
> the way to Linux:
> 1. TF-A (and U-Boot on the receiving side) uses a device node name
> that does not conform to the DT specification nor the DT bindings
> for RPC-IF,
> 2. While U-Boot receives the RPC-IF enablement from TF-A, it does not
> propagate it to Linux yet,
> 3. The DTS files that are part of Linux do not have RPC HyperFlash
> support yet.
>
> The first issue in TF-A is handled by [1].
>
> This patch series takes care of the first and second issue in U-Boot, by
> renaming the RPC-IF device node, and by propagating the enablement from
> TF-A, if present, to Linux. The third patch updates the RPC-IF
> compatible values to match the actual DT bindings, but this is not
> critical for operation, and can be postponed (e.g. by syncing DTS with
> Linux v5.19).
>
> Patches to enable RPC-IF support in Linux are available at [2].
The patches to enable RPC HyperFlash support in Linux are now in
v5.19-rc1. What needs to be done to accept the U-Boot counterpart?
Thanks!
>
> Thanks for your comments!
>
> [1] "[PATCH TF-A] fix(plat/rcar3): Fix RPC-IF device node name"
>
> https://lore.kernel.org/r/3685623bed84674039adb61e723288d359ab0a50.1648544199.git.geert+rene...@glider.be
> [2] "[PATCH 0/5] arm64: dts: renesas: rcar-gen3: Enable HyperFlash support"
> https://lore.kernel.org/r/cover.1648548339.git.geert+rene...@glider.be
>
> Geert Uytterhoeven (3):
> ARM: dts: rmobile: Fix RPC-IF device node names
> ARM: renesas: Propagate RPC-IF enablement to subsequent software
> [RFC] renesas: Fix RPC-IF compatible values
>
> arch/arm/dts/r7s72100-gr-peach-u-boot.dts | 4 +-
> arch/arm/dts/r8a774c0-u-boot.dtsi | 4 +-
> arch/arm/dts/r8a77950-u-boot.dtsi | 4 +-
> arch/arm/dts/r8a77960-u-boot.dtsi | 4 +-
> arch/arm/dts/r8a77965-u-boot.dtsi | 4 +-
> arch/arm/dts/r8a77970-u-boot.dtsi | 4 +-
> arch/arm/dts/r8a77980-u-boot.dtsi | 4 +-
> arch/arm/dts/r8a77990-u-boot.dtsi | 4 +-
> arch/arm/dts/r8a77995-u-boot.dtsi | 4 +-
> arch/arm/dts/r8a779a0-u-boot.dtsi | 2 +-
> board/renesas/rcar-common/common.c| 46 ++-
> drivers/mtd/renesas_rpc_hf.c | 3 +-
> drivers/spi/renesas_rpc_spi.c | 9 +
> 13 files changed, 67 insertions(+), 29 deletions(-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH RFC v3 10/11] ti: dtsi: j721e: Use binman to package tispl.bin
On 15/06/2022 09:48, Neha Malcom Francis wrote:
> tispl.bin must be packaged (with ATF, OPTEE, DM and A72 SPL) for J721E.
> Binman picks up and packages entries according to the
> description given in the device tree.
>
> k3-j721e-a72-binman.dtsi has been introduced for A72 specific binman
> node. It is included by k3-j721e-common-proc-board-u-boot.dtsi
>
> Signed-off-by: Neha Malcom Francis
> ---
> arch/arm/dts/k3-j721e-a72-binman.dtsi | 86 +++
> .../k3-j721e-common-proc-board-u-boot.dtsi| 1 +
> board/ti/j721e/Kconfig| 1 +
> 3 files changed, 88 insertions(+)
> create mode 100644 arch/arm/dts/k3-j721e-a72-binman.dtsi
>
> diff --git a/arch/arm/dts/k3-j721e-a72-binman.dtsi
> b/arch/arm/dts/k3-j721e-a72-binman.dtsi
> new file mode 100644
> index 00..beb3424bb9
> --- /dev/null
> +++ b/arch/arm/dts/k3-j721e-a72-binman.dtsi
> @@ -0,0 +1,86 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +// Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
> +
> +#include
> +
> +#ifdef CONFIG_ARM64
> +/ {
> + binman: binman {
> + multiple-images;
> + };
> +};
> +
> + {
> + tispl {
> + filename = "tispl.bin";
> + fit {
> + description = "FIT IMAGE";
> + #address-cells = <1>;
> + images {
> + atf {
> + description = "ARM Trusted Firmware";
> + type = "firmware";
> + arch = "arm64";
> + compression = "none";
> + os = "arm-trusted-firmware";
> + load = ;
> + entry = ;
> + atf-bl31 {
> + };
> + };
> + tee {
> + description = "OPTEE";
> + type = "tee";
> + arch = "arm64";
> + compression = "none";
> + os = "tee";
> + load = <0x9e80>;
> + entry = <0x9e80>;
> + tee-os {
> + };
> + };
> + dm {
> + description = "DM binary";
> + type = "firmware";
> + arch = "arm32";
> + compression = "none";
> + os = "DM";
> + load = <0x8900>;
> + entry = <0x8900>;
> + ti-dm {
> + };
> + };
> + spl {
> + description = "SPL (64-bit)";
> + type = "standalone";
> + os = "U-Boot";
> + arch = "arm64";
> + compression = "none";
> + load = ;
> + entry = ;
> + u-boot-spl-nodtb {
> + };
> + };
> + k3-j721e-common-proc-board.dtb {
how about fdt-1 for node name?
> + description =
> "k3-j721e-common-proc-board";
> + type = "flat_dt";
> + arch = "arm";
> + compression = "none";
> + blob-ext {
> + filename =
> "spl/dts/k3-j721e-common-proc-board.dtb";
> + };
> + };
> + };
> + configurations {
> + default = "conf";
> + conf {
> + description =
> "k3-j721e-common-proc-board";
> + firmware = "atf";
> + loadables = "tee", "dm", "spl";
> + fdt = "k3-j721e-common-proc-board.dtb";
> + };
> + };
> + };
> + };
> +};
> +#endif
> diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> index
Re: [PATCH RFC v3 10/11] ti: dtsi: j721e: Use binman to package tispl.bin
Neha,
On 15/06/2022 09:48, Neha Malcom Francis wrote:
> tispl.bin must be packaged (with ATF, OPTEE, DM and A72 SPL) for J721E.
> Binman picks up and packages entries according to the
> description given in the device tree.
>
> k3-j721e-a72-binman.dtsi has been introduced for A72 specific binman
> node. It is included by k3-j721e-common-proc-board-u-boot.dtsi
>
> Signed-off-by: Neha Malcom Francis
> ---
> arch/arm/dts/k3-j721e-a72-binman.dtsi | 86 +++
> .../k3-j721e-common-proc-board-u-boot.dtsi| 1 +
> board/ti/j721e/Kconfig| 1 +
> 3 files changed, 88 insertions(+)
> create mode 100644 arch/arm/dts/k3-j721e-a72-binman.dtsi
>
> diff --git a/arch/arm/dts/k3-j721e-a72-binman.dtsi
> b/arch/arm/dts/k3-j721e-a72-binman.dtsi
> new file mode 100644
> index 00..beb3424bb9
> --- /dev/null
> +++ b/arch/arm/dts/k3-j721e-a72-binman.dtsi
Will this file be used for all j721e-a72 boards or only common processor board?
It should be named accordingly.
You might as well combine the separate r5 and a72 binman files into one file.
You can use CONFIG_TARGET_J721E_R5_EVM and CONFIG_TARGET_J721E_A72_EVM
to selectively enable the required entries.
So, k3-j721e-common-proc-board-binman.dtsi?
> @@ -0,0 +1,86 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +// Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
> +
> +#include
> +
> +#ifdef CONFIG_ARM64
> +/ {
> + binman: binman {
> + multiple-images;
> + };
> +};
> +
#ifdef CONFIG_TARGET_J721E_A72_EVM
> + {
> + tispl {
> + filename = "tispl.bin";
> + fit {
> + description = "FIT IMAGE";
This used to be "Configuration to load ATF and SPL", let's retain the
description.
> + #address-cells = <1>;
> + images {
> + atf {
> + description = "ARM Trusted Firmware";
> + type = "firmware";
> + arch = "arm64";
> + compression = "none";
> + os = "arm-trusted-firmware";
> + load = ;
> + entry = ;
> + atf-bl31 {
> + };
> + };
> + tee {
> + description = "OPTEE";
> + type = "tee";
> + arch = "arm64";
> + compression = "none";
> + os = "tee";
> + load = <0x9e80>;
> + entry = <0x9e80>;
> + tee-os {
> + };
> + };
> + dm {
> + description = "DM binary";
> + type = "firmware";
> + arch = "arm32";
> + compression = "none";
> + os = "DM";
> + load = <0x8900>;
> + entry = <0x8900>;
> + ti-dm {
> + };
> + };
> + spl {
> + description = "SPL (64-bit)";
> + type = "standalone";
> + os = "U-Boot";
> + arch = "arm64";
> + compression = "none";
> + load = ;
> + entry = ;
> + u-boot-spl-nodtb {
> + };
> + };
> + k3-j721e-common-proc-board.dtb {
> + description =
> "k3-j721e-common-proc-board";
> + type = "flat_dt";
> + arch = "arm";
> + compression = "none";
> + blob-ext {
> + filename =
> "spl/dts/k3-j721e-common-proc-board.dtb";
> + };
> + };
> + };
> + configurations {
> + default = "conf";
"conf-1"?
more confs can be added later
> + conf {
> + description =
>
Re: [PATCH 1/1] efi_loader: initialize console size late
On 6/15/22 08:34, AKASHI Takahiro wrote:
On Wed, Jun 15, 2022 at 08:27:26AM +0200, Heinrich Schuchardt wrote:
On 6/15/22 08:16, AKASHI Takahiro wrote:
On Tue, Jun 14, 2022 at 08:02:03AM +0200, Heinrich Schuchardt wrote:
From: Heinrich Schuchardt
If CONFIG_VIDEO_DM=n we query the display size from the serial console.
Especially when using a remote console the response can be so late that
it interferes with autoboot.
Only query the console size when running an EFI binary.
Add debug output showing the determined console size.
Reported-by: Fabio Estevam
Fixes: a9bf024b2933 ("efi_loader: disk: a helper function to create efi_disk objects
from udevice")
Said patch made CONFIG_EFI_SETUP_EARLY=y the default.
I don't think so.
Any config with this option enabled could cause the issue.
We could additionally blame your patches that created this config option.
If the key part of this patch is to move query_console_size() from
efi_init_early() to efi_init_obj_list(), the to-be-fixed patch is not
the one above but
commit a57ad20d07e8 ("efi_loader: split efi_init_obj_list() into two
stages")
Moreover, this is just a warning but once Sughosh's patch,
https://lists.denx.de/pipermail/u-boot/2022-June/485977.html
is merged and FWU_MULTI_BANK_UPDATE is enabled, the said phenomenon can
be triggered again because efi_init_obj_list(), hence query_console_size(),
will be called in board_init_r() before showing the U-Boot prompt.
Then we should not merge it as is.
I think that your patch is a tentative workaround.
What makes you think so?
Any better proposal that we can get in in time for v2022.07?
Best regards
Heinrich
-Takahiro Akashi
Best regards
Heinrich
-Takahiro Akashi
Signed-off-by: Heinrich Schuchardt
---
include/efi_loader.h | 2 ++
lib/efi_loader/efi_console.c | 20 +---
lib/efi_loader/efi_setup.c | 4
3 files changed, 19 insertions(+), 7 deletions(-)
diff --git a/include/efi_loader.h b/include/efi_loader.h
index f6651e2c60..c1e00ebac3 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -499,6 +499,8 @@ extern struct list_head efi_register_notify_events;
int efi_init_early(void);
/* Initialize efi execution environment */
efi_status_t efi_init_obj_list(void);
+/* Set up console modes */
+void efi_setup_console_size(void);
/* Install device tree */
efi_status_t efi_install_fdt(void *fdt);
/* Run loaded UEFI image */
diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c
index 60a3fc85ac..3164fd484e 100644
--- a/lib/efi_loader/efi_console.c
+++ b/lib/efi_loader/efi_console.c
@@ -5,6 +5,8 @@
* Copyright (c) 2016 Alexander Graf
*/
+#define LOG_CATEGORY LOGC_EFI
+
#include
#include
#include
@@ -12,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -58,7 +61,12 @@ const efi_guid_t efi_guid_text_output_protocol =
#define cESC '\x1b'
#define ESC "\x1b"
-/* Default to mode 0 */
+/*
+ * efi_con_mode - mode information of the Simple Text Output Protocol
+ *
+ * Use safe settings before efi_setup_console_size() is called.
+ * By default enable only the 80x25 mode which must always exist.
+ */
static struct simple_text_output_mode efi_con_mode = {
.max_mode = 1,
.mode = 0,
@@ -333,13 +341,13 @@ static int __maybe_unused query_vidconsole(int *rows, int
*cols)
}
/**
- * query_console_size() - update the mode table.
+ * efi_setup_console_size() - update the mode table.
*
* By default the only mode available is 80x25. If the console has at least
50
* lines, enable mode 80x50. If we can query the console size and it is
neither
* 80x25 nor 80x50, set it as an additional mode.
*/
-static void query_console_size(void)
+void efi_setup_console_size(void)
{
int rows = 25, cols = 80;
int ret = -ENODEV;
@@ -351,6 +359,8 @@ static void query_console_size(void)
if (ret)
return;
+ log_debug("Console size %dx%d\n", rows, cols);
+
/* Test if we can have Mode 1 */
if (cols >= 80 && rows >= 50) {
efi_cout_modes[1].present = 1;
@@ -371,7 +381,6 @@ static void query_console_size(void)
}
}
-
/**
* efi_cout_query_mode() - get terminal size for a text mode
*
@@ -1262,9 +1271,6 @@ efi_status_t efi_console_register(void)
efi_status_t r;
struct efi_device_path *dp;
- /* Set up mode information */
- query_console_size();
-
/* Install protocols on root node */
r = EFI_CALL(efi_install_multiple_protocol_interfaces
(_root,
diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
index 250eeb2fcd..492ecf4cb1 100644
--- a/lib/efi_loader/efi_setup.c
+++ b/lib/efi_loader/efi_setup.c
@@ -243,6 +243,10 @@ efi_status_t efi_init_obj_list(void)
goto out;
}
+ /* Set up console
[PATCH] firmware: ti_sci_static_data: Make file board agnostic
Static DMA channel data for R5 SPL is mostly board agnostic so use SOC
configs instead of EVM specific config to ease adding new board support.
Drop J7200 EVM specific settings as its same as J721e
Signed-off-by: Vignesh Raghavendra
---
drivers/firmware/ti_sci_static_data.h | 42 +++
1 file changed, 4 insertions(+), 38 deletions(-)
diff --git a/drivers/firmware/ti_sci_static_data.h
b/drivers/firmware/ti_sci_static_data.h
index 8529ef2900..5ae0556a9a 100644
--- a/drivers/firmware/ti_sci_static_data.h
+++ b/drivers/firmware/ti_sci_static_data.h
@@ -16,7 +16,7 @@ struct ti_sci_resource_static_data {
#if IS_ENABLED(CONFIG_K3_DM_FW)
-#if IS_ENABLED(CONFIG_TARGET_J721E_R5_EVM)
+#if IS_ENABLED(CONFIG_SOC_K3_J721E)
static struct ti_sci_resource_static_data rm_static_data[] = {
/* Free rings */
{
@@ -48,43 +48,9 @@ static struct ti_sci_resource_static_data rm_static_data[] =
{
},
{ },
};
-#endif /* CONFIG_TARGET_J721E_R5_EVM */
+#endif /* CONFIG_SOC_K3_J721E */
-#if IS_ENABLED(CONFIG_TARGET_J7200_R5_EVM)
-static struct ti_sci_resource_static_data rm_static_data[] = {
- /* Free rings */
- {
- .dev_id = 235,
- .subtype = 1,
- .range_start = 124,
- .range_num = 32,
- },
- /* TX channels */
- {
- .dev_id = 236,
- .subtype = 13,
- .range_start = 6,
- .range_num = 2,
- },
- /* RX channels */
- {
- .dev_id = 236,
- .subtype = 10,
- .range_start = 6,
- .range_num = 2,
- },
- /* RX Free flows */
- {
- .dev_id = 236,
- .subtype = 0,
- .range_start = 60,
- .range_num = 8,
- },
- { },
-};
-#endif /* CONFIG_TARGET_J7200_R5_EVM */
-
-#if IS_ENABLED(CONFIG_TARGET_J721S2_R5_EVM)
+#if IS_ENABLED(CONFIG_SOC_K3_J721S2)
static struct ti_sci_resource_static_data rm_static_data[] = {
/* Free rings */
{
@@ -116,7 +82,7 @@ static struct ti_sci_resource_static_data rm_static_data[] =
{
},
{ },
};
-#endif /* CONFIG_TARGET_J721S2_R5_EVM */
+#endif /* CONFIG_SOC_K3_J721S2 */
#if IS_ENABLED(CONFIG_SOC_K3_AM625)
static struct ti_sci_resource_static_data rm_static_data[] = {
--
2.36.1
Re: [PATCH 1/1] efi_loader: initialize console size late
Hi Akashi-san, On Wed, Jun 15, 2022 at 3:35 AM AKASHI Takahiro wrote: > I think that your patch is a tentative workaround. Could Heinrich's patch be applied to 2022.07 to fix the regression? Any suggestions? Thanks, Fabio Estevam
Re: [PATCH RFC v3 08/11] ti: j721e: Exclude makefile tispl.bin target for J721E
Hi Neha, On 15/06/2022 09:48, Neha Malcom Francis wrote: > tispl.bin is to be packaged (with ATF, OPTEE, DM and A72 SPL) using > binman. The tispl.bin target from the makefile is no longer needed for > J721E. > > Signed-off-by: Neha Malcom Francis > --- > arch/arm/mach-k3/config.mk | 5 + > scripts/Makefile.spl | 2 ++ > 2 files changed, 7 insertions(+) > > diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk > index d706d17788..dd5e42d9df 100644 > --- a/arch/arm/mach-k3/config.mk > +++ b/arch/arm/mach-k3/config.mk > @@ -74,6 +74,7 @@ ifeq ($(CONFIG_SOC_K3_J721E),) > export DM := /dev/null > endif > > +ifndef CONFIG_TARGET_J721E_A72_EVM How about using #ifndef CONFIG_BINMAN instead? Any platform enabling that doesn't want to use the old way. You are still breaking HS functionality with this series correct? That will have to be fixed. One proposal was discussed here https://lore.kernel.org/all/76474ded-a782-f491-eac6-ece3c5f4a...@gmail.com/ We should be able to produce tispl.bin_HS and u-boot.img_HS via binman. You have already covered most of the x509 stuff image in ti-x509-cert etype. Please refer to below script [1] to know what is required to get _HS images. [1] https://git.ti.com/cgit/security-development-tools/core-secdev-k3/tree/scripts/secure-binary-image.sh > ifeq ($(CONFIG_TI_SECURE_DEVICE),y) > SPL_ITS := u-boot-spl-k3_HS.its > $(SPL_ITS): export IS_HS=1 > @@ -98,9 +99,11 @@ cmd_k3_mkits = \ > $(SPL_ITS): FORCE > $(call cmd,k3_mkits) > endif > +endif > > else > > +ifndef CONFIG_TARGET_J721E_A72_EVM > ifeq ($(CONFIG_TI_SECURE_DEVICE),y) > INPUTS-y += u-boot.img_HS > else > @@ -108,4 +111,6 @@ INPUTS-y += u-boot.img > endif > endif > > +endif > + You will have to enclose below line in #ifndef CONFIG_BINMAN as well. > include $(srctree)/arch/arm/mach-k3/config_secure.mk > diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl > index f047d4e094..6104cb8587 100644 > --- a/scripts/Makefile.spl > +++ b/scripts/Makefile.spl > @@ -591,6 +591,8 @@ $(obj)/$(SPL_BIN).multidtb.fit.lzo: > $(obj)/$(SPL_BIN).multidtb.fit > @lzop -f9 $< > $@ > > ifdef CONFIG_ARCH_K3 > +ifndef CONFIG_TARGET_J721E_A72_EVM Is this still being called in-spite of the changes to config.mk? Please use CONFIG_BINMAN instead of CONFIG_TARGET_J721E_A72_EVM > tispl.bin: $(obj)/u-boot-spl-nodtb.bin $(SHRUNK_ARCH_DTB) $(SPL_ITS) FORCE > $(call if_changed,mkfitimage) > endif > +endif cheers, -roger
[PATCH v4 23/23] microblaze: Add support for run time relocation
Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing issues with function pointer arrays which need to be updated manually after relocation. Building code with -fPIC and linking with -pic will remove this limitation and there is no longer need to run manual update. By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC code will be compiled for full relocation. The patch does couple of things which are connected to each other. - Define STATIC_RELA dependency to call relocate-rela to fill sections. - REMAKE_ELF was already enabled but u-boot file can't be used because sections are empty. relocate-rela will fill them and output file is u-boot.elf which should be used. - Add support for full relocation (u-boot.elf) - Add support for early relocation when u-boot.bin is loaded to different address then CONFIG_SYS_TEXT_BASE - Add rela.dyn and dynsym sections Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original size (550kB to 608kB). Signed-off-by: Michal Simek --- Changes in v4: - Aligned NEEDS_MANUAL_RELOC for m68k arch/Kconfig | 4 -- arch/m68k/Kconfig | 3 + arch/microblaze/Kconfig| 14 + arch/microblaze/config.mk | 5 ++ arch/microblaze/cpu/Makefile | 1 + arch/microblaze/cpu/relocate.c | 111 + arch/microblaze/cpu/start.S| 66 arch/microblaze/cpu/u-boot.lds | 14 + common/board_f.c | 2 + 9 files changed, 216 insertions(+), 4 deletions(-) create mode 100644 arch/microblaze/cpu/relocate.c diff --git a/arch/Kconfig b/arch/Kconfig index 02de32f9c77f..d91475d24747 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -8,9 +8,6 @@ config CREATE_ARCH_SYMLINK config HAVE_ARCH_IOREMAP bool -config NEEDS_MANUAL_RELOC - bool - config SYS_CACHE_SHIFT_4 bool @@ -76,7 +73,6 @@ config M68K config MICROBLAZE bool "MicroBlaze architecture" - select NEEDS_MANUAL_RELOC select SUPPORT_OF_CONTROL imply CMD_IRQ diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 7f6e4310f1f4..d501c4c97990 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -4,6 +4,9 @@ menu "M68000 architecture" config SYS_ARCH default "m68k" +config NEEDS_MANUAL_RELOC + def_bool y + # processor family config MCF520x select OF_CONTROL diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index d7d1b219704e..6f45d19330a1 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -4,6 +4,20 @@ menu "MicroBlaze architecture" config SYS_ARCH default "microblaze" +config NEEDS_MANUAL_RELOC + bool "Disable position-independent pre-relocation code" + default y + help + U-Boot expects to be linked to a specific hard-coded address, and to + be loaded to and run from that address. This option lifts that + restriction, thus allowing the code to be loaded to and executed from + almost any 4K aligned address. This logic relies on the relocation + information that is embedded in the binary to support U-Boot + relocating itself to the top-of-RAM later during execution. + +config STATIC_RELA + def_bool y if !NEEDS_MANUAL_RELOC + choice prompt "Target select" optional diff --git a/arch/microblaze/config.mk b/arch/microblaze/config.mk index 3e84a832fc12..d35b4f6db7a1 100644 --- a/arch/microblaze/config.mk +++ b/arch/microblaze/config.mk @@ -17,6 +17,11 @@ ifeq ($(CONFIG_SPL_BUILD),) PLATFORM_CPPFLAGS += -fPIC endif +ifeq ($(CONFIG_STATIC_RELA),y) +PLATFORM_CPPFLAGS += -fPIC +LDFLAGS_u-boot += -pic +endif + ifeq ($(CONFIG_SYS_LITTLE_ENDIAN),y) PLATFORM_ELFFLAGS += -B microblaze $(OBJCOPYFLAGS) -O elf32-microblazeel else diff --git a/arch/microblaze/cpu/Makefile b/arch/microblaze/cpu/Makefile index f7a83d07b6f6..1feffc6a97c0 100644 --- a/arch/microblaze/cpu/Makefile +++ b/arch/microblaze/cpu/Makefile @@ -6,4 +6,5 @@ extra-y= start.o obj-y = irq.o obj-y += interrupts.o cache.o exception.o timer.o +obj-$(CONFIG_STATIC_RELA) += relocate.o obj-$(CONFIG_SPL_BUILD)+= spl.o diff --git a/arch/microblaze/cpu/relocate.c b/arch/microblaze/cpu/relocate.c new file mode 100644 index ..b00d02b1dfcc --- /dev/null +++ b/arch/microblaze/cpu/relocate.c @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2022 Advanced Micro Devices, Inc + * Michal Simek + */ + +#include +#include + +#define R_MICROBLAZE_NONE 0 +#define R_MICROBLAZE_321 +#define R_MICROBLAZE_REL 16 +#define R_MICROBLAZE_GLOB_DAT 18 + +/** + * mb_fix_rela - update relocation to new address + * @reloc_addr: new relocation address + * @verbose: enable version messages + * @rela_start: rela section start + * @rela_end: rela section end + * @dyn_start: dynamic section start + * @origin_addr: address where u-boot
[PATCH v4 22/23] tools: relocate-rela: Add support for 32bit Microblaze relocation
Microblaze is 32bit that's why it is using elf32 format. Relocation code
requires to get information about rela and dynsym senctions and also text
base which was used for compilation.
Code build with -fPIC and linked with -pic generates 4 relocation types.
R_MICROBLAZE_NONE is the easiest one which doesn't require any action.
R_MICROBLAZE_REL only requires write addend to r_offset address.
R_MICROBLAZE_32/R_MICROBLAZE_GLOB_DAT are the most complicated. There is a
need to find out symbol value with adding symbol value and write it to
address pointed by r_offset. Calculation with addend is also added but
only 0 addend values are generated now.
Signed-off-by: Michal Simek
---
(no changes since v1)
tools/relocate-rela.c | 166 ++
1 file changed, 166 insertions(+)
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c
index 7c2a441a8e91..090fb1acb20c 100644
--- a/tools/relocate-rela.c
+++ b/tools/relocate-rela.c
@@ -420,6 +420,170 @@ static int rela_elf64(char **argv, FILE *f)
return 0;
}
+static bool supported_rela32(Elf32_Rela *rela, uint32_t *type)
+{
+ uint32_t mask = 0xffULL; /* would be different on 32-bit */
+ *type = rela->r_info & mask;
+
+ debug("Type:\t");
+
+ switch (*type) {
+ case R_MICROBLAZE_32:
+ debug("R_MICROBLAZE_32\n");
+ return true;
+ case R_MICROBLAZE_GLOB_DAT:
+ debug("R_MICROBLAZE_GLOB_DAT\n");
+ return true;
+ case R_MICROBLAZE_NONE:
+ debug("R_MICROBLAZE_NONE - ignoring - do nothing\n");
+ return false;
+ case R_MICROBLAZE_REL:
+ debug("R_MICROBLAZE_REL\n");
+ return true;
+ default:
+ fprintf(stderr, "warning: unsupported relocation type %"
+ PRIu32 " at %" PRIx32 "\n", *type, rela->r_offset);
+
+ return false;
+ }
+}
+
+static int rela_elf32(char **argv, FILE *f)
+{
+ int i, num, index;
+ uint32_t value, type;
+
+ if ((rela_end - rela_start) % sizeof(Elf32_Rela)) {
+ fprintf(stderr, "%s: rela size isn't a multiple of
Elf32_Rela\n", argv[0]);
+ return 3;
+ }
+
+ num = (rela_end - rela_start) / sizeof(Elf32_Rela);
+
+ debug("Number of entries: %u\n", num);
+
+ for (i = 0; i < num; i++) {
+ Elf32_Rela rela, swrela;
+ Elf32_Sym symbols;
+ uint32_t pos = rela_start + sizeof(Elf32_Rela) * i;
+ uint32_t addr, pos_dyn;
+
+ debug("\nPossition:\t%d/0x%x\n", i, pos);
+
+ if (fseek(f, pos, SEEK_SET) < 0) {
+ fprintf(stderr, "%s: %s: seek to %" PRIx32
+ " failed: %s\n",
+ argv[0], argv[1], pos, strerror(errno));
+ }
+
+ if (fread(, sizeof(rela), 1, f) != 1) {
+ fprintf(stderr, "%s: %s: read rela failed at %"
+ PRIx32 "\n",
+ argv[0], argv[1], pos);
+ return 4;
+ }
+
+ debug("Rela:\toffset:\t%" PRIx32 " r_info:\t%"
+ PRIu32 " r_addend:\t%" PRIx32 "\n",
+ rela.r_offset, rela.r_info, rela.r_addend);
+
+ swrela.r_offset = cpu_to_le32(rela.r_offset);
+ swrela.r_info = cpu_to_le32(rela.r_info);
+ swrela.r_addend = cpu_to_le32(rela.r_addend);
+
+ debug("SWRela:\toffset:\t%" PRIx32 " r_info:\t%"
+ PRIu32 " r_addend:\t%" PRIx32 "\n",
+ swrela.r_offset, swrela.r_info, swrela.r_addend);
+
+ if (!supported_rela32(, ))
+ continue;
+
+ if (swrela.r_offset < text_base) {
+ fprintf(stderr, "%s: %s: bad rela at %" PRIx32 "\n",
+ argv[0], argv[1], pos);
+ return 4;
+ }
+
+ addr = swrela.r_offset - text_base;
+
+ debug("Addr:\t0x%" PRIx32 "\n", addr);
+
+ switch (type) {
+ case R_MICROBLAZE_REL:
+ if (fseek(f, addr, SEEK_SET) < 0) {
+ fprintf(stderr, "%s: %s: seek to %"
+ PRIx32 " failed: %s\n",
+ argv[0], argv[1], addr,
strerror(errno));
+ return 5;
+ }
+
+ debug("Write addend\n");
+
+ if (fwrite(_addend, sizeof(rela.r_addend), 1, f)
!= 1) {
+ fprintf(stderr, "%s: %s: write failed at %"
PRIx32 "\n",
+ argv[0], argv[1], addr);
+ return 4;
+ }
+
[PATCH v4 21/23] tools: relocate-rela: Add support for elf32 decoding
Add support for 32bit ELF format which is used by Microblaze. Also check
that code runs only for Microblaze.
Function finds information about rela.dyn and dynsym which will be used
later for relocation.
Signed-off-by: Michal Simek
---
(no changes since v1)
tools/relocate-rela.c | 141 +-
1 file changed, 139 insertions(+), 2 deletions(-)
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c
index 2f7f1796a0ef..7c2a441a8e91 100644
--- a/tools/relocate-rela.c
+++ b/tools/relocate-rela.c
@@ -22,7 +22,7 @@
static int ei_class;
-static uint64_t rela_start, rela_end, text_base;
+static uint64_t rela_start, rela_end, text_base, dyn_start;
static const bool debug_en;
@@ -184,6 +184,142 @@ static int decode_elf64(FILE *felf, char **argv)
return 0;
}
+static int decode_elf32(FILE *felf, char **argv)
+{
+ size_t size;
+ Elf32_Ehdr header;
+ uint64_t section_header_base, section_header_size, sh_offset, sh_size;
+ Elf32_Shdr *sh_table; /* Elf symbol table */
+ int ret, i, machine;
+ char *sh_str;
+
+ debug("32bit version\n");
+
+ /* Make sure we are at start */
+ rewind(felf);
+
+ size = fread(, 1, sizeof(header), felf);
+ if (size != sizeof(header)) {
+ fclose(felf);
+ return 25;
+ }
+
+ machine = header.e_machine;
+ debug("Machine %d\n", machine);
+
+ if (machine != EM_MICROBLAZE) {
+ fprintf(stderr, "%s: Not supported machine type\n", argv[0]);
+ return 30;
+ }
+
+ text_base = header.e_entry;
+ section_header_base = header.e_shoff;
+
+ debug("Section header base %x\n", section_header_base);
+
+ section_header_size = header.e_shentsize * header.e_shnum;
+
+ debug("Section header size %d\n", section_header_size);
+
+ sh_table = malloc(section_header_size);
+ if (!sh_table) {
+ fprintf(stderr, "%s: Cannot allocate space for section
header\n",
+ argv[0]);
+ fclose(felf);
+ return 26;
+ }
+
+ ret = fseek(felf, section_header_base, SEEK_SET);
+ if (ret) {
+ fprintf(stderr, "%s: Can't set pointer to section header:
%x/%lx\n",
+ argv[0], ret, section_header_base);
+ free(sh_table);
+ fclose(felf);
+ return 26;
+ }
+
+ size = fread(sh_table, 1, section_header_size, felf);
+ if (size != section_header_size) {
+ fprintf(stderr, "%s: Can't read section header: %lx/%lx\n",
+ argv[0], size, section_header_size);
+ free(sh_table);
+ fclose(felf);
+ return 27;
+ }
+
+ sh_size = sh_table[header.e_shstrndx].sh_size;
+ debug("e_shstrndx %x, sh_size %lx\n", header.e_shstrndx, sh_size);
+
+ sh_str = malloc(sh_size);
+ if (!sh_str) {
+ fprintf(stderr, "malloc failed\n");
+ free(sh_table);
+ fclose(felf);
+ return 28;
+ }
+
+ /*
+* Specifies the byte offset from the beginning of the file
+* to the first byte in the section.
+*/
+ sh_offset = sh_table[header.e_shstrndx].sh_offset;
+
+ debug("sh_offset %x\n", header.e_shnum);
+
+ ret = fseek(felf, sh_offset, SEEK_SET);
+ if (ret) {
+ fprintf(stderr, "Setting up sh_offset failed\n");
+ free(sh_str);
+ free(sh_table);
+ fclose(felf);
+ return 29;
+ }
+
+ size = fread(sh_str, 1, sh_size, felf);
+ if (size != sh_size) {
+ fprintf(stderr, "%s: Can't read section: %lx/%lx\n",
+ argv[0], size, sh_size);
+ free(sh_str);
+ free(sh_table);
+ fclose(felf);
+ return 30;
+ }
+
+ for (i = 0; i < header.e_shnum; i++) {
+ debug("%s\n", sh_str + sh_table[i].sh_name);
+ if (!strcmp(".rela.dyn", (sh_str + sh_table[i].sh_name))) {
+ debug("Found section\t\".rela_dyn\"\n");
+ debug(" at addr\t0x%08x\n", (unsigned
int)sh_table[i].sh_addr);
+ debug(" at offset\t0x%08x\n", (unsigned
int)sh_table[i].sh_offset);
+ debug(" of size\t0x%08x\n", (unsigned
int)sh_table[i].sh_size);
+ rela_start = sh_table[i].sh_addr;
+ rela_end = rela_start + sh_table[i].sh_size;
+ }
+ if (!strcmp(".dynsym", (sh_str + sh_table[i].sh_name))) {
+ debug("Found section\t\".dynsym\"\n");
+ debug(" at addr\t0x%08x\n", (unsigned
int)sh_table[i].sh_addr);
+ debug(" at offset\t0x%08x\n", (unsigned
int)sh_table[i].sh_offset);
+
[PATCH v4 20/23] tools: relocate-rela: Check that relocation works only for EM_AARCH64
Relocation support is only for EM_AARCH64 that's why check machine type to
make sure that the code will never run on any unsupported one.
Signed-off-by: Michal Simek
---
(no changes since v1)
tools/relocate-rela.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c
index e62247d51e2a..2f7f1796a0ef 100644
--- a/tools/relocate-rela.c
+++ b/tools/relocate-rela.c
@@ -79,6 +79,11 @@ static int decode_elf64(FILE *felf, char **argv)
machine = header.e_machine;
debug("Machine\t%d\n", machine);
+ if (machine != EM_AARCH64) {
+ fprintf(stderr, "%s: Not supported machine type\n", argv[0]);
+ return 30;
+ }
+
text_base = header.e_entry;
section_header_base = header.e_shoff;
section_header_size = header.e_shentsize * header.e_shnum;
--
2.36.1
[PATCH v4 19/23] tools: relocate-rela: Extract elf64 reloc to special function
Adding support for new type requires to change code layout that's why move
elf64 code to own function for easier maintenance.
It also solves the problem with not calling fclose in case of error.
Return value from rela_elf64 is saved to variable that's why fclose() is
called all the time.
Signed-off-by: Michal Simek
---
(no changes since v1)
tools/relocate-rela.c | 96 ---
1 file changed, 53 insertions(+), 43 deletions(-)
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c
index 36065edb3f01..e62247d51e2a 100644
--- a/tools/relocate-rela.c
+++ b/tools/relocate-rela.c
@@ -216,49 +216,9 @@ static int decode_elf(char **argv)
return 1;
}
-int main(int argc, char **argv)
+static int rela_elf64(char **argv, FILE *f)
{
- FILE *f;
- int i, num, ret;
- uint64_t file_size;
-
- if (argc != 3) {
- fprintf(stderr, "Statically apply ELF rela relocations\n");
- fprintf(stderr, "Usage: %s \n",
- argv[0]);
- return 1;
- }
-
- ret = decode_elf(argv);
- if (ret) {
- fprintf(stderr, "ELF decoding failed\n");
- return ret;
- }
-
- if (rela_start > rela_end || rela_start < text_base) {
- fprintf(stderr, "%s: bad rela bounds\n", argv[0]);
- return 3;
- }
-
- rela_start -= text_base;
- rela_end -= text_base;
-
- f = fopen(argv[1], "r+b");
- if (!f) {
- fprintf(stderr, "%s: Cannot open %s: %s\n",
- argv[0], argv[1], strerror(errno));
- return 2;
- }
-
- fseek(f, 0, SEEK_END);
- file_size = ftell(f);
- rewind(f);
-
- if (rela_end > file_size) {
- // Most likely compiler inserted some section that didn't get
- // objcopy-ed into the final binary
- rela_end = file_size;
- }
+ int i, num;
if ((rela_end - rela_start) % sizeof(Elf64_Rela)) {
fprintf(stderr, "%s: rela size isn't a multiple of
Elf64_Rela\n", argv[0]);
@@ -316,11 +276,61 @@ int main(int argc, char **argv)
}
}
+ return 0;
+}
+
+int main(int argc, char **argv)
+{
+ FILE *f;
+ int ret;
+ uint64_t file_size;
+
+ if (argc != 3) {
+ fprintf(stderr, "Statically apply ELF rela relocations\n");
+ fprintf(stderr, "Usage: %s \n",
+ argv[0]);
+ return 1;
+ }
+
+ ret = decode_elf(argv);
+ if (ret) {
+ fprintf(stderr, "ELF decoding failed\n");
+ return ret;
+ }
+
+ if (rela_start > rela_end || rela_start < text_base) {
+ fprintf(stderr, "%s: bad rela bounds\n", argv[0]);
+ return 3;
+ }
+
+ rela_start -= text_base;
+ rela_end -= text_base;
+
+ f = fopen(argv[1], "r+b");
+ if (!f) {
+ fprintf(stderr, "%s: Cannot open %s: %s\n",
+ argv[0], argv[1], strerror(errno));
+ return 2;
+ }
+
+ fseek(f, 0, SEEK_END);
+ file_size = ftell(f);
+ rewind(f);
+
+ if (rela_end > file_size) {
+ // Most likely compiler inserted some section that didn't get
+ // objcopy-ed into the final binary
+ rela_end = file_size;
+ }
+
+ if (ei_class == 2)
+ ret = rela_elf64(argv, f);
+
if (fclose(f) < 0) {
fprintf(stderr, "%s: %s: close failed: %s\n",
argv[0], argv[1], strerror(errno));
return 4;
}
- return 0;
+ return ret;
}
--
2.36.1
[PATCH v4 18/23] microblaze: Create SYM_ADDR macro to deal with symbols
Symbol handling depends on compilation flags. Right now manual relocation is used that's why symbols can be referenced just by name and there is no need to find them out. But when position independent code (PIC) is used symbols need to be described differently. That's why having one macro change is easier than changing the whole code. Signed-off-by: Michal Simek --- (no changes since v1) arch/microblaze/cpu/start.S | 23 +-- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 9aa5fd099361..72b0f3354731 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -10,6 +10,9 @@ #include #include +#define SYM_ADDR(reg, reg_add, symbol) \ + addireg, reg_add, symbol + .text .global _start _start: @@ -66,8 +69,8 @@ _start: clear_bss: /* clear BSS segments */ - addir5, r0, __bss_start - addir4, r0, __bss_end + SYM_ADDR(r5, r0, __bss_start) + SYM_ADDR(r4, r0, __bss_end) cmp r6, r5, r4 beqir6, 3f 2: @@ -143,7 +146,7 @@ __setup_exceptions: swi r2, r4, 0x0 /* reset address - imm opcode */ swi r3, r4, 0x4 /* reset address - brai opcode */ - addik r6, r0, _start + SYM_ADDR(r6, r0, _start) /* Intentionally keep reset vector back to origin u-boot location */ sw r6, r1, r0 lhu r7, r1, r10 @@ -157,7 +160,7 @@ __setup_exceptions: swi r2, r4, 0x8 /* user vector exception - imm opcode */ swi r3, r4, 0xC /* user vector exception - brai opcode */ - addik r6, r5, _exception_handler + SYM_ADDR(r6, r5, _exception_handler) sw r6, r1, r0 /* * BIG ENDIAN memory map for user exception @@ -190,7 +193,7 @@ __setup_exceptions: swi r2, r4, 0x10/* interrupt - imm opcode */ swi r3, r4, 0x14/* interrupt - brai opcode */ - addik r6, r5, _interrupt_handler + SYM_ADDR(r6, r5, _interrupt_handler) sw r6, r1, r0 lhu r7, r1, r10 rsubi r8, r10, 0x12 @@ -202,7 +205,7 @@ __setup_exceptions: swi r2, r4, 0x20/* hardware exception - imm opcode */ swi r3, r4, 0x24/* hardware exception - brai opcode */ - addik r6, r5, _hw_exception_handler + SYM_ADDR(r6, r5, _hw_exception_handler) sw r6, r1, r0 lhu r7, r1, r10 rsubi r8, r10, 0x22 @@ -274,8 +277,8 @@ relocate_code: addir31, r6, 0 /* Start to use new GD */ /* Relocate text and data - r12 temp value */ - addir21, r0, _start - addir22, r0, _end /* Include BSS too */ + SYM_ADDR(r21, r0, _start) + SYM_ADDR(r22, r0, _end) /* Include BSS too */ addir22, r22, -4 rsubr6, r21, r22 @@ -319,8 +322,8 @@ relocate_code: nop 2: addir5, r31, 0 /* gd is initialized in board_r.c */ - addir6, r0, _start - addir12, r23, board_init_r + SYM_ADDR(r6, r0, _start) + SYM_ADDR(r12, r23, board_init_r) bra r12 /* Jump to relocated code */ .endrelocate_code -- 2.36.1
[PATCH v4 17/23] microblaze: Add comment about reset location
Better to add comment to explain why reset vector points all the time to origin U-Boot location. If reset happens U-Boot should start from it's origin location. Signed-off-by: Michal Simek --- (no changes since v1) arch/microblaze/cpu/start.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index db3998f54505..9aa5fd099361 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -144,6 +144,7 @@ __setup_exceptions: swi r3, r4, 0x4 /* reset address - brai opcode */ addik r6, r0, _start + /* Intentionally keep reset vector back to origin u-boot location */ sw r6, r1, r0 lhu r7, r1, r10 rsubi r8, r10, 0x2 -- 2.36.1
[PATCH v4 16/23] microblaze: Remove _start symbol handling at U-Boot start
Right now U-Boot runs all the time from the same address where it is loaded but going to full relocation code starting address doesn't need to be fixed and can be simply discovered from reading PC register. That's why use r20 to get PC address and subtract offset from the beginning to get starting address. Signed-off-by: Michal Simek --- (no changes since v1) arch/microblaze/cpu/start.S | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index c3d925c1d151..db3998f54505 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -14,15 +14,16 @@ .global _start _start: mts rmsr, r0/* disable cache */ + mfs r20, rpc + addir20, r20, -4 mts rslr, r0 - addir8, r0, _start - mts rshr, r8 + mts rshr, r20 #if defined(CONFIG_SPL_BUILD) addir1, r0, CONFIG_SPL_STACK_ADDR #else - add r1, r0, r8 + add r1, r0, r20 #endif addir1, r1, -4 /* Decrement SP to top of memory */ -- 2.36.1
[PATCH v4 15/23] microblaze: Remove code around r20 in relocate_code()
r20 is not used that's why remove logic around it. Signed-off-by: Michal Simek --- (no changes since v1) arch/microblaze/cpu/start.S | 5 - 1 file changed, 5 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index f2d6d12deb73..c3d925c1d151 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -310,11 +310,6 @@ relocate_code: bneid r12, 3b addik r21. r21, 4 - /* Update pointer to GOT */ - mfs r20, rpc - addik r20, r20, _GLOBAL_OFFSET_TABLE_ + 8 - addkr20, r20, r23 - /* Flush caches to ensure consistency */ addik r5, r0, 0 addik r6, r0, XILINX_DCACHE_BYTE_SIZE -- 2.36.1
[PATCH v4 14/23] microblaze: Optimize register usage in relocate_code
There are additional operations which can be done simpler that's why improve logic around relocation address r7 handling and _start symbol. Signed-off-by: Michal Simek --- (no changes since v1) arch/microblaze/cpu/start.S | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 2aae4a0b7ccb..f2d6d12deb73 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -271,7 +271,6 @@ relocate_code: mts rshr, r1 addir31, r6, 0 /* Start to use new GD */ - add r23, r0, r7 /* Move reloc addr to r23 */ /* Relocate text and data - r12 temp value */ addir21, r0, _start addir22, r0, _end /* Include BSS too */ @@ -280,15 +279,13 @@ relocate_code: rsubr6, r21, r22 or r5, r0, r0 1: lw r12, r21, r5 /* Load u-boot data */ - sw r12, r23, r5 /* Write zero to loc */ + sw r12, r7, r5 /* Write zero to loc */ cmp r12, r5, r6 /* Check if we have reach the end */ bneid r12, 1b addir5, r5, 4 /* Increment to next loc - relocate code */ /* R23 points to the base address. */ - add r23, r0, r7 /* Move reloc addr to r23 */ - addir24, r0, _start /* Get reloc offset */ - rsubr23, r24, r23 /* keep - this is already here gd->reloc_off */ + rsubr23, r21, r7 /* keep - this is already here gd->reloc_off */ /* Setup vectors with post-relocation symbols */ add r5, r0, r23 /* load gd->reloc_off to r5 */ -- 2.36.1
[PATCH v4 13/23] microblaze: Change stack protection address to new stack address
SLR low address is still setup to 0 that's why only high limit should be updated. STACK_SIZE macro is present and could be possible used for low address alignment but it is not done by this patch. Signed-off-by: Michal Simek --- (no changes since v1) arch/microblaze/cpu/start.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index a35d8d8ea29a..2aae4a0b7ccb 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -268,6 +268,7 @@ relocate_code: * r7 - reloc_addr */ addir1, r5, 0 /* Start to use new SP */ + mts rshr, r1 addir31, r6, 0 /* Start to use new GD */ add r23, r0, r7 /* Move reloc addr to r23 */ -- 2.36.1
[PATCH v4 12/23] microblaze: Separate code end substraction
Follow up patch will convert symbol handling that's why it is necessary to separate logic around symbols to special instruction. It adds 4B for new instruction but it is worth to do it to have code ready for for full relocation. Signed-off-by: Michal Simek --- (no changes since v1) arch/microblaze/cpu/start.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 205d5f384c38..a35d8d8ea29a 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -273,7 +273,8 @@ relocate_code: add r23, r0, r7 /* Move reloc addr to r23 */ /* Relocate text and data - r12 temp value */ addir21, r0, _start - addir22, r0, _end - 4 /* Include BSS too */ + addir22, r0, _end /* Include BSS too */ + addir22, r22, -4 rsubr6, r21, r22 or r5, r0, r0 -- 2.36.1
[PATCH v4 11/23] microblaze: Enable REMAKE_ELF
Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul relocation. Enable option for big endian configuration but it is not used too much that's why it is completely untested. By supporting this system there is a need to define LITTLE/BIG endian Kconfig options to pass -EL/-EB flags. Full command line for u-boot.elf recreation looks like this: microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \ -O elf32-microblazeel u-boot.bin u-boot-elf.o Signed-off-by: Michal Simek --- (no changes since v2) Changes in v2: - Fix endian selection arch/Kconfig | 6 +++--- arch/microblaze/config.mk| 6 ++ configs/microblaze-generic_defconfig | 1 + 3 files changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 4851300e9bbe..02de32f9c77f 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -448,7 +448,7 @@ source "arch/riscv/Kconfig" source "board/keymile/Kconfig" -if MIPS +if MIPS || MICROBLAZE choice prompt "Endianness selection" @@ -460,11 +460,11 @@ choice config SYS_BIG_ENDIAN bool "Big endian" - depends on SUPPORTS_BIG_ENDIAN + depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE config SYS_LITTLE_ENDIAN bool "Little endian" - depends on SUPPORTS_LITTLE_ENDIAN + depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE endchoice diff --git a/arch/microblaze/config.mk b/arch/microblaze/config.mk index de5b97e719cc..3e84a832fc12 100644 --- a/arch/microblaze/config.mk +++ b/arch/microblaze/config.mk @@ -16,3 +16,9 @@ LDFLAGS_FINAL += --gc-sections ifeq ($(CONFIG_SPL_BUILD),) PLATFORM_CPPFLAGS += -fPIC endif + +ifeq ($(CONFIG_SYS_LITTLE_ENDIAN),y) +PLATFORM_ELFFLAGS += -B microblaze $(OBJCOPYFLAGS) -O elf32-microblazeel +else +PLATFORM_ELFFLAGS += -B microblaze $(OBJCOPYFLAGS) -O elf32-microblaze +endif diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 7994110b28a7..35e32466bdff 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -14,6 +14,7 @@ CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 CONFIG_XILINX_MICROBLAZE0_USE_DIV=1 CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 CONFIG_DISTRO_DEFAULTS=y +CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=-1 -- 2.36.1
[PATCH v4 10/23] mips: Move endianness selection to arch/Kconfig
This option will be used by Microblaze that's why move it to generic location to be able to use it. Signed-off-by: Michal Simek --- Changes in v4: - Revert incorrect m68k merge - wrong patch Changes in v3: - Move NEEDS_MANUAL_RELOC to m68k Kconfig to avoid Kconfig issues Changes in v2: - new patch in series to solve Kconfig warning arch/Kconfig | 22 ++ arch/mips/Kconfig | 18 -- 2 files changed, 22 insertions(+), 18 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 12de8a11650d..4851300e9bbe 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -447,3 +447,25 @@ source "arch/xtensa/Kconfig" source "arch/riscv/Kconfig" source "board/keymile/Kconfig" + +if MIPS + +choice + prompt "Endianness selection" + help + Some MIPS boards can be configured for either little or big endian + byte order. These modes require different U-Boot images. In general there + is one preferred byteorder for a particular system but some systems are + just as commonly used in the one or the other endianness. + +config SYS_BIG_ENDIAN + bool "Big endian" + depends on SUPPORTS_BIG_ENDIAN + +config SYS_LITTLE_ENDIAN + bool "Little endian" + depends on SUPPORTS_LITTLE_ENDIAN + +endchoice + +endif diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 9b62764f4fe6..2e0793a7a7b8 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -180,24 +180,6 @@ source "arch/mips/mach-octeon/Kconfig" if MIPS -choice - prompt "Endianness selection" - help - Some MIPS boards can be configured for either little or big endian - byte order. These modes require different U-Boot images. In general there - is one preferred byteorder for a particular system but some systems are - just as commonly used in the one or the other endianness. - -config SYS_BIG_ENDIAN - bool "Big endian" - depends on SUPPORTS_BIG_ENDIAN - -config SYS_LITTLE_ENDIAN - bool "Little endian" - depends on SUPPORTS_LITTLE_ENDIAN - -endchoice - choice prompt "CPU selection" default CPU_MIPS32_R2 -- 2.36.1
[PATCH v4 09/23] microblaze: Fix typo in exception.c
Trivial fix.
Signed-off-by: Michal Simek
---
(no changes since v1)
arch/microblaze/cpu/exception.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/microblaze/cpu/exception.c b/arch/microblaze/cpu/exception.c
index d3640d3903b8..9414776afa7f 100644
--- a/arch/microblaze/cpu/exception.c
+++ b/arch/microblaze/cpu/exception.c
@@ -16,7 +16,7 @@ void _hw_exception_handler (void)
/* loading address of exception EAR */
MFS(address, rear);
- /* loading excetpion state register ESR */
+ /* loading exception state register ESR */
MFS(state, resr);
printf("Hardware exception at 0x%x address\n", address);
R17(address);
--
2.36.1
[PATCH v4 08/23] microblaze: Remove CONFIG_TEXT_BASE from code
Use symbol instead macro to find where U-Boot starts. Signed-off-by: Michal Simek --- (no changes since v1) arch/microblaze/cpu/start.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 1acac5faf428..205d5f384c38 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -142,7 +142,7 @@ __setup_exceptions: swi r2, r4, 0x0 /* reset address - imm opcode */ swi r3, r4, 0x4 /* reset address - brai opcode */ - addik r6, r0, CONFIG_SYS_TEXT_BASE + addik r6, r0, _start sw r6, r1, r0 lhu r7, r1, r10 rsubi r8, r10, 0x2 @@ -285,7 +285,7 @@ relocate_code: /* R23 points to the base address. */ add r23, r0, r7 /* Move reloc addr to r23 */ - addir24, r0, CONFIG_SYS_TEXT_BASE /* Get reloc offset */ + addir24, r0, _start /* Get reloc offset */ rsubr23, r24, r23 /* keep - this is already here gd->reloc_off */ /* Setup vectors with post-relocation symbols */ @@ -323,7 +323,7 @@ relocate_code: nop 2: addir5, r31, 0 /* gd is initialized in board_r.c */ - addir6, r0, CONFIG_SYS_TEXT_BASE + addir6, r0, _start addir12, r23, board_init_r bra r12 /* Jump to relocated code */ -- 2.36.1
[PATCH v4 07/23] microblaze: Fix early stack allocation
CONFIG_SYS_INIT_SP_OFFSET macro place stack to TEXT_BASE - SYS_MALLOC_F_LEN
but there is no reason to do it now because board_init_f_alloc_reserve()
returns exact location where stack should be. That's why stack location is
calculated at run time and there is no need to hardcode it via macro. This
change will help with placing U-Boot to any address.
Signed-off-by: Michal Simek
---
(no changes since v1)
arch/microblaze/cpu/start.S | 2 +-
include/configs/microblaze-generic.h | 4
2 files changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 715ef37b39d9..1acac5faf428 100644
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -22,7 +22,7 @@ _start:
#if defined(CONFIG_SPL_BUILD)
addir1, r0, CONFIG_SPL_STACK_ADDR
#else
- addir1, r0, CONFIG_SYS_INIT_SP_OFFSET
+ add r1, r0, r8
#endif
addir1, r1, -4 /* Decrement SP to top of memory */
diff --git a/include/configs/microblaze-generic.h
b/include/configs/microblaze-generic.h
index 663837f33dc4..60ceb2c817e9 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -18,10 +18,6 @@
# define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
-/* Stack location before relocation */
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \
-CONFIG_SYS_MALLOC_F_LEN)
-
#ifdef CONFIG_CFI_FLASH
/* ?empty sector */
# define CONFIG_SYS_FLASH_EMPTY_INFO 1
--
2.36.1
[PATCH v4 06/23] microblaze: Fix stack protection behavior
When U-Boot starts stack protection can be already enabled that's why setup the lowest possible SLR value which is address 0. And the highest possible stack in front of U-Boot. That's why you should never load U-Boot to the beginning of DDR. There must be some space reserved. Code is using this location for early malloc space, early global data and stack. Signed-off-by: Michal Simek --- (no changes since v1) arch/microblaze/cpu/start.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 9e00eef1f4b6..715ef37b39d9 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -15,8 +15,9 @@ _start: mts rmsr, r0/* disable cache */ - addir8, r0, _end - mts rslr, r8 + mts rslr, r0 + addir8, r0, _start + mts rshr, r8 #if defined(CONFIG_SPL_BUILD) addir1, r0, CONFIG_SPL_STACK_ADDR -- 2.36.1
[PATCH v4 05/23] microblaze: Switch absolute branches to relative
There is no reason to use absolute branches and use just relative. This change helps with moving binary to different location and start it from there. Signed-off-by: Michal Simek --- (no changes since v1) arch/microblaze/cpu/start.S | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 645f7cb0389d..9e00eef1f4b6 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -29,7 +29,7 @@ _start: /* Call board_init_f_alloc_reserve with the current stack pointer as * parameter. */ add r5, r0, r1 - bralid r15, board_init_f_alloc_reserve + brlid r15, board_init_f_alloc_reserve nop /* board_init_f_alloc_reserve returns a pointer to the allocated area @@ -41,20 +41,20 @@ _start: /* Call board_init_f_init_reserve with the address returned by * board_init_f_alloc_reserve as parameter. */ add r5, r0, r3 - bralid r15, board_init_f_init_reserve + brlid r15, board_init_f_init_reserve nop #if !defined(CONFIG_SPL_BUILD) /* Setup vectors with pre-relocation symbols */ or r5, r0, r0 - bralid r15, __setup_exceptions + brlid r15, __setup_exceptions nop #endif /* Flush cache before enable cache */ addik r5, r0, 0 addik r6, r0, XILINX_DCACHE_BYTE_SIZE - bralid r15, flush_cache + brlid r15, flush_cache nop /* enable instruction and data cache */ @@ -75,14 +75,14 @@ clear_bss: bneir6, 2b 3: /* jumping to board_init */ #ifdef CONFIG_DEBUG_UART - bralid r15, debug_uart_init + brlid r15, debug_uart_init nop #endif #ifndef CONFIG_SPL_BUILD or r5, r0, r0 /* flags - empty */ - braiboard_init_f + bri board_init_f #else - braiboard_init_r + bri board_init_r #endif 1: bri 1b @@ -289,7 +289,7 @@ relocate_code: /* Setup vectors with post-relocation symbols */ add r5, r0, r23 /* load gd->reloc_off to r5 */ - bralid r15, __setup_exceptions + brlid r15, __setup_exceptions nop /* Check if GOT exist */ @@ -318,7 +318,7 @@ relocate_code: /* Flush caches to ensure consistency */ addik r5, r0, 0 addik r6, r0, XILINX_DCACHE_BYTE_SIZE - bralid r15, flush_cache + brlid r15, flush_cache nop 2: addir5, r31, 0 /* gd is initialized in board_r.c */ -- 2.36.1
[PATCH v4 04/23] tools: relocate-rela: Read rela start/end directly from ELF
There is no need to pass section information via parameters.
Let's read text base and rela start/end directly from elf.
It will help with reading other information from ELF for others
architecture. Input to relocate-rela is u-boot binary and u-boot ELF.
Signed-off-by: Michal Simek
---
(no changes since v1)
Makefile | 4 +-
tools/relocate-rela.c | 181 ++
2 files changed, 168 insertions(+), 17 deletions(-)
diff --git a/Makefile b/Makefile
index 2270ec5c7938..55c55dbb7e2b 100644
--- a/Makefile
+++ b/Makefile
@@ -925,9 +925,7 @@ ifneq ($(CONFIG_STATIC_RELA),)
# $(2) is u-boot ELF, $(3) is u-boot bin, $(4) is text base
quiet_cmd_static_rela = RELOC $@
cmd_static_rela = \
- start=$$($(NM) $(2) | grep __rel_dyn_start | cut -f 1 -d ' '); \
- end=$$($(NM) $(2) | grep __rel_dyn_end | cut -f 1 -d ' '); \
- tools/relocate-rela $(3) $(4) $$start $$end
+ tools/relocate-rela $(3) $(2)
else
quiet_cmd_static_rela =
cmd_static_rela =
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c
index 67a138aa67d7..36065edb3f01 100644
--- a/tools/relocate-rela.c
+++ b/tools/relocate-rela.c
@@ -20,6 +20,8 @@
#define R_AARCH64_RELATIVE 1027
#endif
+static int ei_class;
+
static uint64_t rela_start, rela_end, text_base;
static const bool debug_en;
@@ -54,32 +56,183 @@ static bool supported_rela(Elf64_Rela *rela)
}
}
-static bool read_num(const char *str, uint64_t *num)
+static int decode_elf64(FILE *felf, char **argv)
+{
+ size_t size;
+ Elf64_Ehdr header;
+ uint64_t section_header_base, section_header_size, sh_offset, sh_size;
+ Elf64_Shdr *sh_table; /* Elf symbol table */
+ int ret, i, machine;
+ char *sh_str;
+
+ debug("64bit version\n");
+
+ /* Make sure we are at start */
+ rewind(felf);
+
+ size = fread(, 1, sizeof(header), felf);
+ if (size != sizeof(header)) {
+ fclose(felf);
+ return 25;
+ }
+
+ machine = header.e_machine;
+ debug("Machine\t%d\n", machine);
+
+ text_base = header.e_entry;
+ section_header_base = header.e_shoff;
+ section_header_size = header.e_shentsize * header.e_shnum;
+
+ sh_table = malloc(section_header_size);
+ if (!sh_table) {
+ fprintf(stderr, "%s: Cannot allocate space for section
header\n",
+ argv[0]);
+ fclose(felf);
+ return 26;
+ }
+
+ ret = fseek(felf, section_header_base, SEEK_SET);
+ if (ret) {
+ fprintf(stderr, "%s: Can't set pointer to section header:
%x/%lx\n",
+ argv[0], ret, section_header_base);
+ free(sh_table);
+ fclose(felf);
+ return 26;
+ }
+
+ size = fread(sh_table, 1, section_header_size, felf);
+ if (size != section_header_size) {
+ fprintf(stderr, "%s: Can't read section header: %lx/%lx\n",
+ argv[0], size, section_header_size);
+ free(sh_table);
+ fclose(felf);
+ return 27;
+ }
+
+ sh_size = sh_table[header.e_shstrndx].sh_size;
+ debug("e_shstrndx\t0x%08x\n", header.e_shstrndx);
+ debug("sh_size\t\t0x%08lx\n", sh_size);
+
+ sh_str = malloc(sh_size);
+ if (!sh_str) {
+ fprintf(stderr, "malloc failed\n");
+ free(sh_table);
+ fclose(felf);
+ return 28;
+ }
+
+ /*
+* Specifies the byte offset from the beginning of the file
+* to the first byte in the section.
+*/
+ sh_offset = sh_table[header.e_shstrndx].sh_offset;
+
+ debug("sh_offset\t0x%08x\n", header.e_shnum);
+
+ ret = fseek(felf, sh_offset, SEEK_SET);
+ if (ret) {
+ fprintf(stderr, "Setting up sh_offset failed\n");
+ free(sh_str);
+ free(sh_table);
+ fclose(felf);
+ return 29;
+ }
+
+ size = fread(sh_str, 1, sh_size, felf);
+ if (size != sh_size) {
+ fprintf(stderr, "%s: Can't read section: %lx/%lx\n",
+ argv[0], size, sh_size);
+ free(sh_str);
+ free(sh_table);
+ fclose(felf);
+ return 30;
+ }
+
+ for (i = 0; i < header.e_shnum; i++) {
+ /* fprintf(stderr, "%s\n", sh_str + sh_table[i].sh_name); Debug
only */
+ if (!strcmp(".rela.dyn", (sh_str + sh_table[i].sh_name))) {
+ debug("Found section\t\".rela_dyn\"\n");
+ debug(" at addr\t0x%08x\n",
+ (unsigned int)sh_table[i].sh_addr);
+ debug(" at offset\t0x%08x\n",
+ (unsigned int)sh_table[i].sh_offset);
+ debug(" of size\t0x%08x\n",
+
[PATCH v4 03/23] tools: relocate-rela: Use global variables
Declare rela_start/end and text_base as global variables. It will help with
using these variables for ELF decoding.
Signed-off-by: Michal Simek
---
(no changes since v1)
tools/relocate-rela.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c
index 883987111869..67a138aa67d7 100644
--- a/tools/relocate-rela.c
+++ b/tools/relocate-rela.c
@@ -20,6 +20,8 @@
#define R_AARCH64_RELATIVE 1027
#endif
+static uint64_t rela_start, rela_end, text_base;
+
static const bool debug_en;
static void debug(const char *fmt, ...)
@@ -63,7 +65,7 @@ int main(int argc, char **argv)
{
FILE *f;
int i, num;
- uint64_t rela_start, rela_end, text_base, file_size;
+ uint64_t file_size;
if (argc != 5) {
fprintf(stderr, "Statically apply ELF rela relocations\n");
--
2.36.1
[PATCH v4 00/23] microblaze: Add support for full relocation
Hi, this series is adding support for full rela relocation. Origin NEEDS_MANUAL_RELOC option is still there as default. Code has been tested with multiple configurations on QEMU. - Origin behavior - u-boot - Relocated version - u-boot.elf - Loading u-boot.bin to higher address than TEXT_BASE - Loading u-boot.bin to lower address than TEXT_BASE In v2 I fixed Kconfig issue reported in v1 series. In v3 fix issues reported by gitlab CI. I incorrectly squashed m68k change to wrong patch. V4 fixes it. Thanks, Michal Changes in v4: - Revert incorrect m68k merge - wrong patch - Aligned NEEDS_MANUAL_RELOC for m68k Changes in v3: - Move NEEDS_MANUAL_RELOC to m68k Kconfig to avoid Kconfig issues Changes in v2: - new patch in series to solve Kconfig warning - Fix endian selection Michal Simek (23): tools: relocate-rela: Open binary u-boot file later Makefile: Fix description for relocate-rela parameters tools: relocate-rela: Use global variables tools: relocate-rela: Read rela start/end directly from ELF microblaze: Switch absolute branches to relative microblaze: Fix stack protection behavior microblaze: Fix early stack allocation microblaze: Remove CONFIG_TEXT_BASE from code microblaze: Fix typo in exception.c mips: Move endianness selection to arch/Kconfig microblaze: Enable REMAKE_ELF microblaze: Separate code end substraction microblaze: Change stack protection address to new stack address microblaze: Optimize register usage in relocate_code microblaze: Remove code around r20 in relocate_code() microblaze: Remove _start symbol handling at U-Boot start microblaze: Add comment about reset location microblaze: Create SYM_ADDR macro to deal with symbols tools: relocate-rela: Extract elf64 reloc to special function tools: relocate-rela: Check that relocation works only for EM_AARCH64 tools: relocate-rela: Add support for elf32 decoding tools: relocate-rela: Add support for 32bit Microblaze relocation microblaze: Add support for run time relocation Makefile | 6 +- arch/Kconfig | 26 +- arch/m68k/Kconfig| 3 + arch/microblaze/Kconfig | 14 + arch/microblaze/config.mk| 11 + arch/microblaze/cpu/Makefile | 1 + arch/microblaze/cpu/exception.c | 2 +- arch/microblaze/cpu/relocate.c | 111 ++ arch/microblaze/cpu/start.S | 130 +-- arch/microblaze/cpu/u-boot.lds | 14 + arch/mips/Kconfig| 18 - common/board_f.c | 2 + configs/microblaze-generic_defconfig | 1 + include/configs/microblaze-generic.h | 4 - tools/relocate-rela.c| 545 +-- 15 files changed, 789 insertions(+), 99 deletions(-) create mode 100644 arch/microblaze/cpu/relocate.c -- 2.36.1
[PATCH v4 02/23] Makefile: Fix description for relocate-rela parameters
Numbers in comment are shifter which is visible from command which calls them. Also relocate-rela usage is describing them. "Usage: %s" Signed-off-by: Michal Simek --- (no changes since v1) Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 2fa3a3b488e6..2270ec5c7938 100644 --- a/Makefile +++ b/Makefile @@ -922,7 +922,7 @@ endif # the raw binary, but certain simulators only accept an ELF file (but don't # do the relocation). ifneq ($(CONFIG_STATIC_RELA),) -# $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base +# $(2) is u-boot ELF, $(3) is u-boot bin, $(4) is text base quiet_cmd_static_rela = RELOC $@ cmd_static_rela = \ start=$$($(NM) $(2) | grep __rel_dyn_start | cut -f 1 -d ' '); \ -- 2.36.1
[PATCH v4 01/23] tools: relocate-rela: Open binary u-boot file later
There is no value to open u-boot binary file so early. Better to check all
values first and then open binary file.
Signed-off-by: Michal Simek
---
(no changes since v1)
tools/relocate-rela.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c
index f0bc548617a4..883987111869 100644
--- a/tools/relocate-rela.c
+++ b/tools/relocate-rela.c
@@ -73,13 +73,6 @@ int main(int argc, char **argv)
return 1;
}
- f = fopen(argv[1], "r+b");
- if (!f) {
- fprintf(stderr, "%s: Cannot open %s: %s\n",
- argv[0], argv[1], strerror(errno));
- return 2;
- }
-
if (!read_num(argv[2], _base) ||
!read_num(argv[3], _start) ||
!read_num(argv[4], _end)) {
@@ -95,6 +88,13 @@ int main(int argc, char **argv)
rela_start -= text_base;
rela_end -= text_base;
+ f = fopen(argv[1], "r+b");
+ if (!f) {
+ fprintf(stderr, "%s: Cannot open %s: %s\n",
+ argv[0], argv[1], strerror(errno));
+ return 2;
+ }
+
fseek(f, 0, SEEK_END);
file_size = ftell(f);
rewind(f);
--
2.36.1
Re: [EXT] Re: [PATCH v3] crypto/fsl: fsl_rsa: Fix dcache issue in the driver
On 15.06.22 14:45, Gaurav Jain wrote: Hi Fabio -Original Message- From: Fabio Estevam Sent: Wednesday, June 15, 2022 6:11 PM To: Gaurav Jain Cc: U-Boot-Denx ; Stefano Babic ; Peng Fan ; dl-uboot-imx ; Horia Geanta ; Varun Sethi ; Ye Li Subject: [EXT] Re: [PATCH v3] crypto/fsl: fsl_rsa: Fix dcache issue in the driver Caution: EXT Email Hi Gaurav, On Wed, Jun 15, 2022 at 9:35 AM Gaurav Jain wrote: From: Ye Li issue: CAAM fails with key error when perform Modular Exponentiation using PKHA Block in CAAM Fix: add flush and invalidate dcache for keys, signature and output decrypted data processed by CAAM. Fixes: 34276478f7 (DM: crypto/fsl - Add Freescale rsa DM driver) Signed-off-by: Ye Li Reviewed-by: Gaurav Jain Acked-by: Peng Fan --- Please always explain what changed in the current version of the patch. I assume you fixed the build error found in CI, correct? This is a different patch in fsl_rsa.c I will send a different patch for the error reported by you. Ouch...I have misunderstood. Well, then I willwait for your patch.. Regards, Stefano Regards Gaurav Jain
RE: [EXT] Re: [PATCH v3] crypto/fsl: fsl_rsa: Fix dcache issue in the driver
Hi Fabio > -Original Message- > From: Fabio Estevam > Sent: Wednesday, June 15, 2022 6:11 PM > To: Gaurav Jain > Cc: U-Boot-Denx ; Stefano Babic ; > Peng Fan ; dl-uboot-imx ; Horia > Geanta ; Varun Sethi ; Ye Li > > Subject: [EXT] Re: [PATCH v3] crypto/fsl: fsl_rsa: Fix dcache issue in the > driver > > Caution: EXT Email > > Hi Gaurav, > > On Wed, Jun 15, 2022 at 9:35 AM Gaurav Jain wrote: > > > > From: Ye Li > > > > issue: > > CAAM fails with key error when perform Modular Exponentiation using > > PKHA Block in CAAM > > > > Fix: > > add flush and invalidate dcache for keys, signature and output > > decrypted data processed by CAAM. > > > > Fixes: 34276478f7 (DM: crypto/fsl - Add Freescale rsa DM driver) > > Signed-off-by: Ye Li > > Reviewed-by: Gaurav Jain > > Acked-by: Peng Fan > > --- > > Please always explain what changed in the current version of the patch. > > I assume you fixed the build error found in CI, correct? This is a different patch in fsl_rsa.c I will send a different patch for the error reported by you. Regards Gaurav Jain
Re: [PATCH v3] crypto/fsl: fsl_rsa: Fix dcache issue in the driver
Hi Gaurav,
thanks for fix, I will put into u-boot-imx and trigger a new CI.
Stefano
On 15.06.22 14:34, Gaurav Jain wrote:
From: Ye Li
issue:
CAAM fails with key error when perform Modular Exponentiation
using PKHA Block in CAAM
Fix:
add flush and invalidate dcache for keys, signature
and output decrypted data processed by CAAM.
Fixes: 34276478f7 (DM: crypto/fsl - Add Freescale rsa DM driver)
Signed-off-by: Ye Li
Reviewed-by: Gaurav Jain
Acked-by: Peng Fan
---
drivers/crypto/fsl/fsl_rsa.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/crypto/fsl/fsl_rsa.c b/drivers/crypto/fsl/fsl_rsa.c
index 897ee855ea..335b7fe25a 100644
--- a/drivers/crypto/fsl/fsl_rsa.c
+++ b/drivers/crypto/fsl/fsl_rsa.c
@@ -6,6 +6,7 @@
#include
#include
+#include
#include
#include
#include
@@ -36,12 +37,21 @@ int fsl_mod_exp(struct udevice *dev, const uint8_t *sig,
uint32_t sig_len,
inline_cnstr_jobdesc_pkha_rsaexp(desc, , out, sig_len);
+ flush_dcache_range((ulong)sig, (ulong)sig + sig_len);
+ flush_dcache_range((ulong)prop->modulus, (ulong)(prop->modulus) +
keylen);
+ flush_dcache_range((ulong)prop->public_exponent,
+ (ulong)(prop->public_exponent) + prop->exp_len);
+ flush_dcache_range((ulong)desc, (ulong)desc + (sizeof(uint32_t) *
MAX_CAAM_DESCSIZE));
+ flush_dcache_range((ulong)out, (ulong)out + sig_len);
+
ret = run_descriptor_jr(desc);
if (ret) {
debug("%s: RSA failed to verify: %d\n", __func__, ret);
return -EFAULT;
}
+ invalidate_dcache_range((ulong)out, (ulong)out + sig_len);
+
return 0;
}
Re: [PATCH v3] crypto/fsl: fsl_rsa: Fix dcache issue in the driver
Hi Gaurav, On Wed, Jun 15, 2022 at 9:35 AM Gaurav Jain wrote: > > From: Ye Li > > issue: > CAAM fails with key error when perform Modular Exponentiation > using PKHA Block in CAAM > > Fix: > add flush and invalidate dcache for keys, signature > and output decrypted data processed by CAAM. > > Fixes: 34276478f7 (DM: crypto/fsl - Add Freescale rsa DM driver) > Signed-off-by: Ye Li > Reviewed-by: Gaurav Jain > Acked-by: Peng Fan > --- Please always explain what changed in the current version of the patch. I assume you fixed the build error found in CI, correct?
[PATCH v3] crypto/fsl: fsl_rsa: Fix dcache issue in the driver
From: Ye Li
issue:
CAAM fails with key error when perform Modular Exponentiation
using PKHA Block in CAAM
Fix:
add flush and invalidate dcache for keys, signature
and output decrypted data processed by CAAM.
Fixes: 34276478f7 (DM: crypto/fsl - Add Freescale rsa DM driver)
Signed-off-by: Ye Li
Reviewed-by: Gaurav Jain
Acked-by: Peng Fan
---
drivers/crypto/fsl/fsl_rsa.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/crypto/fsl/fsl_rsa.c b/drivers/crypto/fsl/fsl_rsa.c
index 897ee855ea..335b7fe25a 100644
--- a/drivers/crypto/fsl/fsl_rsa.c
+++ b/drivers/crypto/fsl/fsl_rsa.c
@@ -6,6 +6,7 @@
#include
#include
+#include
#include
#include
#include
@@ -36,12 +37,21 @@ int fsl_mod_exp(struct udevice *dev, const uint8_t *sig,
uint32_t sig_len,
inline_cnstr_jobdesc_pkha_rsaexp(desc, , out, sig_len);
+ flush_dcache_range((ulong)sig, (ulong)sig + sig_len);
+ flush_dcache_range((ulong)prop->modulus, (ulong)(prop->modulus) +
keylen);
+ flush_dcache_range((ulong)prop->public_exponent,
+ (ulong)(prop->public_exponent) + prop->exp_len);
+ flush_dcache_range((ulong)desc, (ulong)desc + (sizeof(uint32_t) *
MAX_CAAM_DESCSIZE));
+ flush_dcache_range((ulong)out, (ulong)out + sig_len);
+
ret = run_descriptor_jr(desc);
if (ret) {
debug("%s: RSA failed to verify: %d\n", __func__, ret);
return -EFAULT;
}
+ invalidate_dcache_range((ulong)out, (ulong)out + sig_len);
+
return 0;
}
--
2.25.1
Re: [PATCH v5 23/23] sandbox: fwu: Add support for testing FWU feature on sandbox
On Wed, 15 Jun 2022 at 12:00, Takahiro Akashi
wrote:
>
> On Thu, Jun 09, 2022 at 06:00:10PM +0530, Sughosh Ganu wrote:
> > Add a python test script for testing the FWU Multi Bank Update
> > functionality on the sandbox platform. The script has test cases for
> > updation of the u-boot binary and the u-boot environment image to the
> > non active bank.
>
> IIUC, your test doesn't not exercise neither accept-capsule nor
> revert capsule.
> I think those tests are crucial for verifying the code.
Yes, this is on my todo list. By default, all the images get accepted
by the firmware itself, which is being done in u-boot. In case the
oemflag bit 15 is set to 1 in the capsule header, the image acceptance
is done through the accept capsule. I will need to add support for
passing the oemflag parameter to the mkeficapsule, and then I can test
this. Will keep this on my todo list, and try to put it in the
upcoming versions.
-sughosh
>
> -Takahiro Akashi
>
> > The FWU metadata is being stored on the SPI NOR flash, along with the
> > updatable images, and the FWU metadata driver for MTD devices is being
> > used for accessing the metadata. Certain FWU boottime checks are
> > bypassed due to the unavailability of the EFI variable access very
> > early in the boot on the sandbox platform -- the variable access is
> > only available once the block disk image has been bound through the
> > host interface.
> >
> > The FWU Multi Bank feature being enabled on the sandbox64 platform is
> > enabling the RAW Firmware Management Protocol(FMP) instance, therefore
> > the FIT FMP instance is being removed -- the FIT FMP is already being
> > tested on the sandbox flattree variant.
> >
> > Signed-off-by: Sughosh Ganu
> > ---
> > arch/sandbox/Kconfig | 6 +
> > arch/sandbox/dts/test.dts | 45 ++-
> > board/sandbox/sandbox.c | 49 +++
> > configs/sandbox64_defconfig | 12 +-
> > include/fwu.h | 2 +
> > lib/fwu_updates/Kconfig | 2 +-
> > lib/fwu_updates/fwu.c | 18 +-
> > lib/fwu_updates/fwu_mtd.c | 10 +-
> > .../test_capsule_firmware_fit.py | 1 -
> > .../py/tests/test_fwu_updates/capsule_defs.py | 10 +
> > test/py/tests/test_fwu_updates/conftest.py| 78
> > .../test_fwu_updates/test_fwu_updates.py | 367 ++
> > 12 files changed, 587 insertions(+), 13 deletions(-)
> > create mode 100644 test/py/tests/test_fwu_updates/capsule_defs.py
> > create mode 100644 test/py/tests/test_fwu_updates/conftest.py
> > create mode 100644 test/py/tests/test_fwu_updates/test_fwu_updates.py
> >
> > diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig
> > index 5f55c7f28e..2985572083 100644
> > --- a/arch/sandbox/Kconfig
> > +++ b/arch/sandbox/Kconfig
> > @@ -84,3 +84,9 @@ config SYS_FDT_LOAD_ADDR
> > See `doc/arch/sandbox.rst` for more information.
> >
> > endmenu
> > +
> > +config FWU_NUM_BANKS
> > + default 2
> > +
> > +config FWU_NUM_IMAGES_PER_BANK
> > + default 2
> > diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
> > index 8f93775ff4..f11fa8733f 100644
> > --- a/arch/sandbox/dts/test.dts
> > +++ b/arch/sandbox/dts/test.dts
> > @@ -1145,11 +1145,48 @@
> > pinctrl-names = "default";
> > pinctrl-0 = <_spi0_pins>;
> >
> > - spi.bin@0 {
> > + spi0: spi.bin@0 {
> > reg = <0>;
> > compatible = "spansion,m25p16", "jedec,spi-nor";
> > spi-max-frequency = <4000>;
> > sandbox,filename = "spi.bin";
> > +
> > + partitions {
> > + compatible = "fixed-partitions";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + uuid = "af9e8c96-bec5-48be-9dab-3491c04b1366";
> > +
> > + partition@0 {
> > + label = "Metadata";
> > + reg = <0x0 0x2>;
> > + };
> > +
> > + /* FWU Multi bank update partitions */
> > + partition@10 {
> > + label = "U-Boot-Bank0";
> > + reg = <0x10 0x1>;
> > + uuid =
> > "a8f61787-5d68-4c9d-9e4a-37bb0df99da7";
> > + };
> > +
> > + partition@12 {
> > + label = "U-Boot-ENV-Bank0";
> > + reg = <0x12 0x1>;
> > + uuid =
> > "ea9d59af-e0e8-4ef5-9b16-4c80ff67524c";
> > + };
> > +
> > +
Re: [PATCH v5 23/23] sandbox: fwu: Add support for testing FWU feature on sandbox
On Wed, 15 Jun 2022 at 11:07, Takahiro Akashi wrote: > > On Thu, Jun 09, 2022 at 06:00:10PM +0530, Sughosh Ganu wrote: > > Add a python test script for testing the FWU Multi Bank Update > > functionality on the sandbox platform. The script has test cases for > > updation of the u-boot binary and the u-boot environment image to the > > non active bank. > > > > The FWU metadata is being stored on the SPI NOR flash, along with the > > updatable images, and the FWU metadata driver for MTD devices is being > > used for accessing the metadata. Certain FWU boottime checks are > > bypassed due to the unavailability of the EFI variable access very > > early in the boot on the sandbox platform -- the variable access is > > only available once the block disk image has been bound through the > > host interface. > > > > The FWU Multi Bank feature being enabled on the sandbox64 platform is > > enabling the RAW Firmware Management Protocol(FMP) instance, therefore > > the FIT FMP instance is being removed -- the FIT FMP is already being > > tested on the sandbox flattree variant. > > IMO, > Thinking of the importance of this feature, FIT FMP should also be > tested *with FWU*. How will the FWU update feature work for FIT images? As I understand FIT, it is a way of packaging different firmware images into a single package. At the time of writing the images, the FIT image parser would check the image configuration, and write the images to their respective locations. As you are aware, for the FWU feature, the information about the images, and the update bank is obtained from the structure called metadata. How does the FIT update mechanism map with the FWU metadata which is used to identify which bank needs to be updated. The bank to which the image is to be written translates into the DFU alt_num value for that image, and this gets computed at runtime. In the case of the FIT image, as per my understanding, the alt_num value is irrelevant. So my question is, how do we map the information obtained from the FWU metadata to tell the FIT image writing function(fit_update) which locations do the images need to be written to. I think this needs some more thought. > > > Signed-off-by: Sughosh Ganu > > --- > > arch/sandbox/Kconfig | 6 + > > arch/sandbox/dts/test.dts | 45 ++- > > board/sandbox/sandbox.c | 49 +++ > > configs/sandbox64_defconfig | 12 +- > > include/fwu.h | 2 + > > lib/fwu_updates/Kconfig | 2 +- > > lib/fwu_updates/fwu.c | 18 +- > > lib/fwu_updates/fwu_mtd.c | 10 +- > > .../test_capsule_firmware_fit.py | 1 - > > .../py/tests/test_fwu_updates/capsule_defs.py | 10 + > > test/py/tests/test_fwu_updates/conftest.py| 78 > > .../test_fwu_updates/test_fwu_updates.py | 367 ++ > > 12 files changed, 587 insertions(+), 13 deletions(-) > > create mode 100644 test/py/tests/test_fwu_updates/capsule_defs.py > > create mode 100644 test/py/tests/test_fwu_updates/conftest.py > > create mode 100644 test/py/tests/test_fwu_updates/test_fwu_updates.py > > > > diff --git a/test/py/tests/test_fwu_updates/conftest.py > > b/test/py/tests/test_fwu_updates/conftest.py > > new file mode 100644 > > index 00..cdf824c3be > > --- /dev/null > > +++ b/test/py/tests/test_fwu_updates/conftest.py > > @@ -0,0 +1,78 @@ > > +# SPDX-License-Identifier: GPL-2.0+ > > +# Copyright (c) 2020, Linaro Limited > > +# Author: AKASHI Takahiro > > If this file is exactly same as test_efi_capsule/conftest.py, > why not move all the tests (test_fwu_updates.py) to test_efi_capsule? The files are not exactly the same. There is use of the mkfwumdata utility used for FWU tests, along with the capsule files that are being generated. I had tried putting the code under the test_efi_capsule directory, but the result was getting cluttered. Which is why I decided to put the changes separately under the test_fwu_updates directory. > > The basic scenario of updating firmware, u-boot.bin and u-boot.env, > is also the same, isn't it? The only difference is whether > FWU_MULTI_BANK_UPDATE > is enabled or not. There are two capsule files per image, one per bank. Also, the FWU metadata is being written to the SPI NOR device, which is being formatted as a MTD partitioned device. The underlying update mechanism is the same, yes. -sughosh > > -Takahiro Akashi > > > + > > +import os > > +import os.path > > +import re > > +from subprocess import call, check_call, check_output, CalledProcessError > > +import pytest > > +from capsule_defs import * > > + > > +# > > +# Fixture for UEFI capsule test > > +# > > + > > +@pytest.fixture(scope='session') > > +def efi_capsule_data(request, u_boot_config): > > +"""Set up a file system to be used in UEFI capsule and > > + authentication test. > > + > > +Args: > > +
RE: [PATCH v2 00/11] Add Chameleon v3 support
Hi, > -Original Message- > From: Paweł Anikiel > Sent: Wednesday, 15 June, 2022 7:08 PM > To: Simon Goldschmidt > Cc: U-Boot Mailing List ; Simon Glass > ; Fabio Estevam ; Jagan Teki > ; Andre Przywara ; > Armstrong, Neil ; Peter Robinson > ; Tim Harvey ; Ying-Chun > Liu ; Christian Hewitt ; > adrian.fiergol...@fastree3d.com; Marek Behún ; Denk, > Wolfgang ; Lim, Elly Siew Chin ; > Chee, Tien Fong ; Michal Simek > ; Vasut, Marek ; Marcin Wojtas > > Subject: Re: [PATCH v2 00/11] Add Chameleon v3 support > > On Thu, May 26, 2022 at 4:37 PM Paweł Anikiel wrote: > > > > The Google Chameleon v3 is a board made for testing both video and > > audio interfaces of external devices. It has a connector compatible > > with the > > Mercury+ AA1 module, which itself contains an Arria 10 SoCFPGA. The > > Mercury+ AA1 > > module comes in a few different configurations, the Chameleon V3 > > supports > > ME-AA1-270-3E4-D11 and ME-AA1-480-2I3-D12E. > > > > This patchset adds support for the Chameleon v3 (both versions), as > > well as some bugfixes and optimizations, mostly in Arria 10 code. > > > > V2: > > Adjust devicetrees so that they work both in u-boot and linux > > Put u-boot-specific parts of devicetrees into *-u-boot.dtsi files > > Minor changes in Kconfig, defconfig, and config.h > > > > Paweł Anikiel (11): > > arm: dts: Add Mercury+ AA1 devicetrees > > arm: dts: Add Chameleonv3 handoff headers > > arm: dts: Add Chameleonv3 devicetrees > > board: Add Chameleonv3 board dir > > config: Add Chameleonv3 config > > misc: atsha204a: Increase wake delay by tWHI > > sysreset: socfpga: Use parent device for reading base address > > socfpga: arria10: Replace delays with busy waiting in cm_full_cfg > > socfpga: arria10: Improve bitstream loading speed > > socfpga: arria10: Wait for fifo empty after writing bitstream > > socfpga: arria10: Allow dcache_enable before relocation > > > > arch/arm/dts/Makefile | 2 + > > arch/arm/dts/socfpga_arria10_chameleonv3.dts | 90 ++ > > ...fpga_arria10_chameleonv3_270_3-u-boot.dtsi | 8 + > > .../dts/socfpga_arria10_chameleonv3_270_3.dts | 5 + > > ...ocfpga_arria10_chameleonv3_270_3_handoff.h | 305 > ++ > > ...fpga_arria10_chameleonv3_480_2-u-boot.dtsi | 8 + > > .../dts/socfpga_arria10_chameleonv3_480_2.dts | 5 + > > ...ocfpga_arria10_chameleonv3_480_2_handoff.h | 305 > ++ > > .../socfpga_arria10_mercury_aa1-u-boot.dtsi | 54 > > arch/arm/dts/socfpga_arria10_mercury_aa1.dtsi | 72 + > > arch/arm/mach-socfpga/Kconfig | 7 + > > arch/arm/mach-socfpga/clock_manager.c | 7 +- > > arch/arm/mach-socfpga/clock_manager_arria10.c | 12 +- > > .../mach-socfpga/include/mach/clock_manager.h | 4 + > > arch/arm/mach-socfpga/misc_arria10.c | 26 ++ > > board/google/chameleonv3/Makefile | 5 + > > board/google/chameleonv3/board.c | 27 ++ > > board/google/chameleonv3/fpga.its | 28 ++ > > board/google/chameleonv3/fpga_early_io.its| 35 ++ > > board/google/chameleonv3/mercury_aa1.c| 43 +++ > > board/google/chameleonv3/mercury_aa1.h| 12 + > > configs/socfpga_chameleonv3_defconfig | 29 ++ > > drivers/fpga/socfpga_arria10.c| 28 +- > > drivers/misc/atsha204a-i2c.c | 5 +- > > drivers/sysreset/sysreset_socfpga.c | 2 +- > > include/configs/socfpga_chameleonv3.h | 44 +++ > > 26 files changed, 1154 insertions(+), 14 deletions(-) create mode > > 100644 arch/arm/dts/socfpga_arria10_chameleonv3.dts > > create mode 100644 > > arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi > > create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts > > create mode 100644 > > arch/arm/dts/socfpga_arria10_chameleonv3_270_3_handoff.h > > create mode 100644 > > arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi > > create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts > > create mode 100644 > > arch/arm/dts/socfpga_arria10_chameleonv3_480_2_handoff.h > > create mode 100644 > > arch/arm/dts/socfpga_arria10_mercury_aa1-u-boot.dtsi > > create mode 100644 arch/arm/dts/socfpga_arria10_mercury_aa1.dtsi > > create mode 100644 board/google/chameleonv3/Makefile create mode > > 100644 board/google/chameleonv3/board.c create mode 100644 > > board/google/chameleonv3/fpga.its create mode 100644 > > board/google/chameleonv3/fpga_early_io.its > > create mode 100644 board/google/chameleonv3/mercury_aa1.c > > create mode 100644 board/google/chameleonv3/mercury_aa1.h > > create mode 100644 configs/socfpga_chameleonv3_defconfig > > create mode 100644 include/configs/socfpga_chameleonv3.h > > > > -- > > 2.36.1.124.g0e6072fb45-goog > > > > Hi, > > Could you please take a look? Do you have any comments or remarks to the > patchset? All looks fine to me, I'm in the progress to consolidate
[PATCH 3/3] mtd: spi: renesas: Add R8A77980 support
From: Valentine Barshak
This adds "renesas,rpc-r8a77980" to the compatible device list.
Signed-off-by: Valentine Barshak
---
drivers/spi/renesas_rpc_spi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/renesas_rpc_spi.c b/drivers/spi/renesas_rpc_spi.c
index 26b6aa85c9..9cd9a410b7 100644
--- a/drivers/spi/renesas_rpc_spi.c
+++ b/drivers/spi/renesas_rpc_spi.c
@@ -454,6 +454,7 @@ static const struct udevice_id rpc_spi_ids[] = {
{ .compatible = "renesas,rpc-r8a7796" },
{ .compatible = "renesas,rpc-r8a77965" },
{ .compatible = "renesas,rpc-r8a77970" },
+ { .compatible = "renesas,rpc-r8a77980" },
{ .compatible = "renesas,rpc-r8a77995" },
{ .compatible = "renesas,rcar-gen3-rpc" },
{ }
--
2.35.1
[PATCH 2/3] configs: r8a77980: Condor: Enable MMC support by default
From: Andrey Dolnikov This enables MMC support, which is available on Condor board, by default. Signed-off-by: Andrey Dolnikov Signed-off-by: Valentine Barshak Signed-off-by: Hai Pham --- configs/r8a77980_condor_defconfig | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index 7be8bc204a..856d0c8e6b 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y @@ -54,7 +55,11 @@ CONFIG_DFU_SF=y CONFIG_RCAR_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_RCAR_I2C=y -# CONFIG_MMC is not set +CONFIG_DM_MMC=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_RENESAS_SDHI=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y -- 2.35.1
[PATCH 1/3] ARM: renesas: condor: switch eMMC bus to 1V8
From: Hai Pham
The eMMC card has two supplies, VCC and VCCQ. The VCC supplies the NAND
array and the VCCQ supplies the bus. On Condor, the VCC is connected to
3.3V rail, while the VCCQ is connected to 1.8V rail. Adjust the pinmux
to match the bus, which is always operating in 1.8V mode.
Based on Linux commit 69efe4bbeda50745 ("arm64: dts: renesas: condor:
Switch eMMC bus to 1V8") from Wolfram Sang
Signed-off-by: Hai Pham
---
arch/arm/dts/r8a77980-condor.dts | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/arm/dts/r8a77980-condor.dts b/arch/arm/dts/r8a77980-condor.dts
index 3dde028e22..f0a0a51d73 100644
--- a/arch/arm/dts/r8a77980-condor.dts
+++ b/arch/arm/dts/r8a77980-condor.dts
@@ -212,7 +212,7 @@
{
pinctrl-0 = <_pins>;
- pinctrl-1 = <_pins_uhs>;
+ pinctrl-1 = <_pins>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <_3v>;
@@ -253,12 +253,6 @@
};
mmc_pins: mmc {
- groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
- function = "mmc";
- power-source = <3300>;
- };
-
- mmc_pins_uhs: mmc_uhs {
groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
function = "mmc";
power-source = <1800>;
--
2.35.1
[PATCH RFC v3 01/11] j721e_evm: schema: yaml: Add general schema and J721E board config files
Schema file in YAML must be provided in board/ti/common for validating input config files and packaging system firmware. The schema includes entries for rm-cfg, board-cfg, pm-cfg and sec-cfg. Board config file must be provided in board/ti/ in YAML. These can then be consumed for generation of binaries to package system firmware. Added YAML config for J721E EVM in particular. It is to be noted that the bootflow followed by J721E requires tiboot3.bin, TIFS and board config binaries to be packaged into sysfw.itb along with u-boot.img. It also requires DM, ATF, OPTEE packaged into tispl.bin. Signed-off-by: Tarun Sahu [n-fran...@ti.com: prepared patch for upstreaming] Signed-off-by: Neha Malcom Francis --- board/ti/common/schema.yaml | 355 board/ti/j721e/config.yaml | 3162 +++ 2 files changed, 3517 insertions(+) create mode 100644 board/ti/common/schema.yaml create mode 100644 board/ti/j721e/config.yaml diff --git a/board/ti/common/schema.yaml b/board/ti/common/schema.yaml new file mode 100644 index 00..070ff797e0 --- /dev/null +++ b/board/ti/common/schema.yaml @@ -0,0 +1,355 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Config schema for TI K3 devices +# + +--- + +definitions: +u8: +type: integer +minimum: 0 +maximum: 0xff +u16: +type: integer +minimum: 0 +maximum: 0x +u32: +type: integer +minimum: 0 +maximum: 0x + + + +type: object +properties: +pm-cfg: +type: object +properties: +rev: +type: object +properties: +boardcfg_abi_maj: +$ref: "#/definitions/u8" +boardcfg_abi_min: +$ref: "#/definitions/u8" +board-cfg: +type: object +properties: +rev: +type: object +properties: +boardcfg_abi_maj: +$ref: "#/definitions/u8" +boardcfg_abi_min: +$ref: "#/definitions/u8" +control: +type: object +properties: +subhdr: +type: object +properties: +magic: +$ref: "#/definitions/u16" +size: +$ref: "#/definitions/u16" +main_isolation_enable: +$ref: "#/definitions/u8" +main_isolation_hostid: +$ref: "#/definitions/u16" + + +secproxy: +type: object +properties: +subhdr: +type: object +properties: +magic: +$ref: "#/definitions/u16" +size: +$ref: "#/definitions/u16" +scaling_factor: +$ref: "#/definitions/u8" +scaling_profile: +$ref: "#/definitions/u8" +disable_main_nav_secure_proxy: +$ref: "#/definitions/u8" + +msmc: +type: object +properties: +subhdr: +type: object +properties: +magic: +$ref: "#/definitions/u16" +size: +$ref: "#/definitions/u16" +msmc_cache_size: +$ref: "#/definitions/u8" +debug_cfg: +type: object +properties: +subhdr: +type: object +properties: +magic: +$ref: "#/definitions/u16" +size: +$ref: "#/definitions/u16" +trace_dst_enables: +$ref: "#/definitions/u16" +trace_src_enables: +$ref: "#/definitions/u16" + +sec-cfg: +type: object +properties: +rev: +type: object +properties: +boardcfg_abi_maj: +$ref: "#/definitions/u8" +boardcfg_abi_min: +$ref: "#/definitions/u8" + +processor_acl_list: +type: object +properties: +subhdr: +type: object +properties: +
[PATCH v2 3/5] ARM: dts: imx6qdl-sr-som: add support for alternate phy addresses
> The Cubox has an unstable phy address - which can appear at either > address 0 (intended) or 4 (unintended). > SoM revision 1.9 has replaced the ar8035 phy with an adin1300, which > will always appear at address 1. > Change the reg property of the phy node to the magic value 0x, > which indicates to the generic phy driver that all addresses should be > probed. That allows the same node (which is pinned by phy-handle) to match > either the AR8035 PHY at both possible addresses, as well as the new one > at address 1. > Also add the new adi,phy-output-clock property for enabling the 125MHz > clock used by the fec ethernet controller, as submitted to Linux [1]. > Linux solves this problem differently: > For the ar8035 phy it will probe both phy nodes in device-tree in order, > and use the one that succeeds. For the new adin1300 it expects U-Boot to > patch the status field in the DTB before booting > While at it also sync the reset-delay with the upstream Linux dtb. > [1] > https://patchwork.kernel.org/project/netdevbpf/patch/20220428082848.12191-4-jo...@solid-run.com/ > Signed-off-by: Josua Mayer Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2 5/5] mx6cuboxi: enable driver for adin1300 phy
> Since SoMs revision 1.9 the ar8035 phy has been replaced by adin1300. > Enable the driver so that the new SoMs have functional networking. > Signed-off-by: Josua Mayer Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 2/2] board: apalis-imx8: add new 8gb product variant
> From: Philippe Schenker > Add the new Apalis iMX8 product variant > 0067: Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT > the only difference to the product > 0037 Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT > is the 8gb of RAM. Toradex strategy to choose the correct RAM timing in > SCFW is by fuses in the user area telling which RAM timing to load. > This commit makes use of this information to set the correct size of > the RAM and therefore distinguish between the new 0067 and 0037 product > Signed-off-by: Philippe Schenker > Reviewed-by: Francesco Dolcini > Acked-by: Marcel Ziswiler Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] imx8mn_evk: Add the missing spl.bin entry
> From: Fabio Estevam > The generated flash.bin does not boot the imx8mn evk LPDDR4 variant > as it misses the spl.bin description in binman. > Add its entry to fix the boot on the imx8mn evk LPDDR4 variant. > Signed-off-by: Fabio Estevam > Tested-by: Arti Zirk > Reviewed-by: Alper Nebi Yasak Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 1/2] clk: imx8mp: fix root clock names for ecspi
> Root clock name contained underscore, which does not match to the actual
> clock name.
> Correct the name to match what is present in the FDT.
> Fixes: 87f958810fcb ("clk: imx8mp: Add ECSPI clocks")
> Signed-off-by: Andrey Zhizhikin
> Cc: Fabio Estevam
> Cc: Peng Fan
> Cc: Stefano Babic
> Cc: uboot-imx
> Reviewed-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
[PATCH] spi: nxp_fspi: Fix clock imbalance
> The nxp_fspi_default_setup() is only ever called from nxp_fspi_probe(), > where the IP clock are initially disabled. Drop the second disabling of > clock to prevent clock enable/disable imbalance reported by clock core: > " > clk qspi_root_clk already disabled > " > Signed-off-by: Marek Vasut > Cc: Fabio Estevam > Cc: Peng Fan > Cc: Stefano Babic > Reviewed-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2] verdin-imx8mm, verdin-imx8mp: Fix default systemd console output
> From: Philippe Schenker > systemd prints its messages on the last console= statement that it finds > in the kernel arguments. The current ordering sends the systemd messages > to tty1, by default this is the display. > Ensure that systemd sends its messages to the default UART, reorder the > console= statements accordingly. > Signed-off-by: Philippe Schenker > Reviewed-by: Stefano Babic > Acked-by: Marcel Ziswiler > Signed-off-by: Marcel Ziswiler Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] imx8mn_evk: Add Ethernet support to the LPDDR4 variant
> From: Fabio Estevam > The imx8mn-ddr4-evk board has Ethernet support already, but the > lpddr4 board does not. > Add Ethernet support for the LPDDR4 variant too. > Signed-off-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 1/2] toradex: tdx-cfg-block: add new 8gb apalis-imx8
> From: Philippe Schenker > 0067: Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT > This module is identical to its 4GB counterpart > 0037: Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT > except for the RAM size. > Signed-off-by: Philippe Schenker > Reviewed-by: Francesco Dolcini > Acked-by: Marcel Ziswiler Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2 4/5] mx6cuboxi: fixup dtb ethernet phy nodes before booting an OS
> SoM revision 1.9 has replaced the ar8035 phy address 0 with an adin1300 > at address 1. Because early SoMs had a hardware flaw, the ar8035 can > also appear at address 4 - making it a total of 3 phy nodes in the DTB. > To avoid confusing Linux with probe errors, fixup the dtb to only enable > the phy node that is detected at runtime. > Signed-off-by: Josua Mayer Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2 1/5] phy: adin: fix broken support for adi, phy-mode-override
> From: Nate Drude > Currently, the adin driver fails to compile. > The original patch introducing the adin driver used the function > phy_get_interface_by_name to support the adi,phy-mode-override > property. Unfortunately, a few days before the adin patch > was accepted, another patch removed support for phy_get_interface_by_name: > https://github.com/u-boot/u-boot/commit/123ca114e07ecf28aa2538748d733e2b22d8b8b5 > This patch refactors adin_get_phy_mode_override, implementing the logic in > the new function, ofnode_read_phy_mode, from the patch above. > Signed-off-by: Nate Drude > Tested-by: Josua Mayer > Signed-off-by: Josua Mayer Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] secure boot: enable ARCH_MISC_INIT config.
> add ARCH_MISC_INIT to initilaize caam jr driver. > Signed-off-by: Gaurav Jain > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 2/2] clk: imx8mp: use usb_core_ref for usb_root_clk
> Upstream commit 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY,
> HSIOMIX clock") added usb_core_ref for USB Controller but never set it
> to be used as a clock source, using rather "osc_32k" instead.
> This produces following boot log message:
> "clk_register: failed to get osc_32k device (parent of usb_root_clk)"
> Fix the USB controller clock source by using usb_core_ref instead of
> osc_32k.
> Fixes: 7a2c3be95a50 ("clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock")
> Signed-off-by: Andrey Zhizhikin
> Cc: Fabio Estevam
> Cc: Peng Fan
> Cc: Stefano Babic
> Reviewed-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
[PATCH v2 2/5] phy: adin: add support for clock output
> The ADIN1300 supports generating certain clocks on its GP_CLK pin, as > well as providing the reference clock on CLK25_REF. > Add support for selecting the clock via device-tree properties. > This patch is based on the Linux implementation for this feature, > which has been added to netdev/net-next.git [1]. > [2] > https://patchwork.kernel.org/project/netdevbpf/cover/20220517085143.3749-1-jo...@solid-run.com/ > Signed-off-by: Josua Mayer Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] ARM: dts: renesas: condor: Enable SPI NOR fast-read
From: Marek Vasut
This board requires SPI NOR fast-read, otherwise the SPI NOR
access returns corrupted data. Enable the fast-read explicitly
in DT as it has been disabled in the MTD subsystem by commit
d008190920 ("mtd: spi-nor: Mask out fast read if not requested in DT")
Signed-off-by: Marek Vasut
---
arch/arm/dts/r8a77980-condor-u-boot.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/r8a77980-condor-u-boot.dts
b/arch/arm/dts/r8a77980-condor-u-boot.dts
index 1b22c7f0b9..576a74e603 100644
--- a/arch/arm/dts/r8a77980-condor-u-boot.dts
+++ b/arch/arm/dts/r8a77980-condor-u-boot.dts
@@ -25,6 +25,7 @@
#address-cells = <1>;
#size-cells = <1>;
compatible = "s25fs512s", "jedec,spi-nor";
+ m25p,fast-read;
spi-max-frequency = <5000>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
--
2.35.1
[PATCH v4] ARM: imx: Switch Data Modul i.MX8M Mini eDM SBC to USB251x Hub driver
Replace the ad-hoc I2C register programming scripted in board
environment with U-Boot DM driver.
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
---
V2: Use uclass_get_device_by_name()
V3: Reinstate the device-internal.h, needed for device_probe()
V4: Drop the device_probe() too
---
.../imx8mm_data_modul_edm_sbc.c | 9 +
configs/imx8mm_data_modul_edm_sbc_defconfig | 1 +
include/configs/imx8mm_data_modul_edm_sbc.h | 20 ---
3 files changed, 10 insertions(+), 20 deletions(-)
diff --git a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c
b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c
index 46cb6f77b59..6dc4e6a9a2b 100644
--- a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c
+++ b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -104,7 +105,15 @@ int board_init(void)
int board_late_init(void)
{
+ struct udevice *dev;
+ int ret;
+
setup_boot_device();
setup_mac_address();
+
+ ret = uclass_get_device_by_name(UCLASS_MISC, "usb-hub@2c", );
+ if (ret)
+ printf("Error bringing up USB hub (%d)\n", ret);
+
return 0;
}
diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig
b/configs/imx8mm_data_modul_edm_sbc_defconfig
index d55efa6d00e..99a1f862200 100644
--- a/configs/imx8mm_data_modul_edm_sbc_defconfig
+++ b/configs/imx8mm_data_modul_edm_sbc_defconfig
@@ -156,6 +156,7 @@ CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
# CONFIG_INPUT is not set
CONFIG_MISC=y
+CONFIG_USB_HUB_USB251XB=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SUPPORT_EMMC_BOOT=y
diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h
b/include/configs/imx8mm_data_modul_edm_sbc.h
index 67667dd523d..419258f949a 100644
--- a/include/configs/imx8mm_data_modul_edm_sbc.h
+++ b/include/configs/imx8mm_data_modul_edm_sbc.h
@@ -71,7 +71,6 @@
"mtd nor0=sf raw 0x0 0x100\0" \
"dmo_preboot=" \
"sf probe ; " /* Scan for SPI NOR, needed by DFU */ \
- "run dmo_usb_start_hub ; " \
/* Attempt to start USB and Network console */ \
"run dmo_usb_cdc_acm_start ; " \
"run dmo_netconsole_start\0"\
@@ -91,25 +90,6 @@
"setenv stdin ${stdin},usbacm ; " \
"fi ; " \
"fi\0" \
- "dmo_usb_start_hub="\
- "i2c dev 1 ; " \
- /* Reset the USB USB */ \
- "gpio clear GPIO5_2 ; sleep 0.01 ; " /* t1 > 1us */ \
- "gpio set GPIO5_2 ; sleep 0.01 ; " /* t5 > 3us */ \
- /* Write chunks of descriptor into the USB HUB */ \
- "mw.l 0x7e1000 0x14042417 ; mw.l 0x7e1004 0x9b0bb325 ; "\
- "mw.l 0x7e1008 0x0220 ; mw.l 0x7e100c 0x01320100 ; "\
- "mw.l 0x7e1010 0x3232 ; mw.l 0x7e1014 0x4d000909 ; "\
- "i2c write 0x7e1000 0x2c 0x00 0x18 -s ; " \
- "mw.l 0x7e1000 0x6300690f ; mw.l 0x7e1004 0x6f007200 ; "\
- "mw.l 0x7e1008 0x68006300 ; mw.l 0x7e100c 0x70006900 ; "\
- "i2c write 0x7e1000 0x2c 0x18 0x10 -s ; " \
- "mw.l 0x7e1000 0x53005511 ; mw.l 0x7e1004 0x32004200 ; "\
- "mw.l 0x7e1008 0x31003500 ; mw.l 0x7e100c 0x42003400 ; "\
- "mw.l 0x7e1010 0x6900 ; " \
- "i2c write 0x7e1000 0x2c 0x54 0x12 -s ; " \
- "mw.l 0x7e1000 0x0101 ; " \
- "i2c write 0x7e1000 0x2c 0xff 0x2 -s\0" \
"dmo_netconsole_start=" \
"if test \"${dmo_netconsole_enabled}\" = \"true\" ; then "\
"setenv autoload false && " \
--
2.35.1
Re: [PATCH v2 00/11] Add Chameleon v3 support
On Thu, May 26, 2022 at 4:37 PM Paweł Anikiel wrote: > > The Google Chameleon v3 is a board made for testing both video and audio > interfaces of external devices. It has a connector compatible with the > Mercury+ AA1 module, which itself contains an Arria 10 SoCFPGA. The AA1 > module comes in a few different configurations, the Chameleon V3 supports > ME-AA1-270-3E4-D11 and ME-AA1-480-2I3-D12E. > > This patchset adds support for the Chameleon v3 (both versions), as well > as some bugfixes and optimizations, mostly in Arria 10 code. > > V2: > Adjust devicetrees so that they work both in u-boot and linux > Put u-boot-specific parts of devicetrees into *-u-boot.dtsi files > Minor changes in Kconfig, defconfig, and config.h > > Paweł Anikiel (11): > arm: dts: Add Mercury+ AA1 devicetrees > arm: dts: Add Chameleonv3 handoff headers > arm: dts: Add Chameleonv3 devicetrees > board: Add Chameleonv3 board dir > config: Add Chameleonv3 config > misc: atsha204a: Increase wake delay by tWHI > sysreset: socfpga: Use parent device for reading base address > socfpga: arria10: Replace delays with busy waiting in cm_full_cfg > socfpga: arria10: Improve bitstream loading speed > socfpga: arria10: Wait for fifo empty after writing bitstream > socfpga: arria10: Allow dcache_enable before relocation > > arch/arm/dts/Makefile | 2 + > arch/arm/dts/socfpga_arria10_chameleonv3.dts | 90 ++ > ...fpga_arria10_chameleonv3_270_3-u-boot.dtsi | 8 + > .../dts/socfpga_arria10_chameleonv3_270_3.dts | 5 + > ...ocfpga_arria10_chameleonv3_270_3_handoff.h | 305 ++ > ...fpga_arria10_chameleonv3_480_2-u-boot.dtsi | 8 + > .../dts/socfpga_arria10_chameleonv3_480_2.dts | 5 + > ...ocfpga_arria10_chameleonv3_480_2_handoff.h | 305 ++ > .../socfpga_arria10_mercury_aa1-u-boot.dtsi | 54 > arch/arm/dts/socfpga_arria10_mercury_aa1.dtsi | 72 + > arch/arm/mach-socfpga/Kconfig | 7 + > arch/arm/mach-socfpga/clock_manager.c | 7 +- > arch/arm/mach-socfpga/clock_manager_arria10.c | 12 +- > .../mach-socfpga/include/mach/clock_manager.h | 4 + > arch/arm/mach-socfpga/misc_arria10.c | 26 ++ > board/google/chameleonv3/Makefile | 5 + > board/google/chameleonv3/board.c | 27 ++ > board/google/chameleonv3/fpga.its | 28 ++ > board/google/chameleonv3/fpga_early_io.its| 35 ++ > board/google/chameleonv3/mercury_aa1.c| 43 +++ > board/google/chameleonv3/mercury_aa1.h| 12 + > configs/socfpga_chameleonv3_defconfig | 29 ++ > drivers/fpga/socfpga_arria10.c| 28 +- > drivers/misc/atsha204a-i2c.c | 5 +- > drivers/sysreset/sysreset_socfpga.c | 2 +- > include/configs/socfpga_chameleonv3.h | 44 +++ > 26 files changed, 1154 insertions(+), 14 deletions(-) > create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3.dts > create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi > create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts > create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_3_handoff.h > create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi > create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts > create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_480_2_handoff.h > create mode 100644 arch/arm/dts/socfpga_arria10_mercury_aa1-u-boot.dtsi > create mode 100644 arch/arm/dts/socfpga_arria10_mercury_aa1.dtsi > create mode 100644 board/google/chameleonv3/Makefile > create mode 100644 board/google/chameleonv3/board.c > create mode 100644 board/google/chameleonv3/fpga.its > create mode 100644 board/google/chameleonv3/fpga_early_io.its > create mode 100644 board/google/chameleonv3/mercury_aa1.c > create mode 100644 board/google/chameleonv3/mercury_aa1.h > create mode 100644 configs/socfpga_chameleonv3_defconfig > create mode 100644 include/configs/socfpga_chameleonv3.h > > -- > 2.36.1.124.g0e6072fb45-goog > Hi, Could you please take a look? Do you have any comments or remarks to the patchset? Regards, Paweł
[PATCH] ARM: renesas: condor: Set CONFIG_SYS_TEXT_BASE=0x0 on R-Car Gen3 Condor
From: Marek Vasut
Since R-Car Gen3 already enables position independent build, also set
CONFIG_SYS_TEXT_BASE=0x0 to finalize the switch. This is possible since
534f0fbd65 ("arm64: Fix relocation of env_addr if POSITION_INDEPENDENT=y")
fixed current env_get_char() crash with CONFIG_SYS_TEXT_BASE=0x0 .
This change permits us to start U-Boot from any location in DRAM instead
of specific TEXT_BASE.
Signed-off-by: Marek Vasut
---
configs/r8a77980_condor_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/r8a77980_condor_defconfig
b/configs/r8a77980_condor_defconfig
index c3b6e99ae7..7be8bc204a 100644
--- a/configs/r8a77980_condor_defconfig
+++ b/configs/r8a77980_condor_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=1666
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x5000
+CONFIG_SYS_TEXT_BASE=0x0
CONFIG_SYS_MALLOC_LEN=0x400
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x4
--
2.35.1
Re: [PATCH v5 11/23] mkeficapsule: Add support for generating empty capsules
On Wed, 15 Jun 2022 at 10:41, Takahiro Akashi
wrote:
>
> On Thu, Jun 09, 2022 at 05:59:58PM +0530, Sughosh Ganu wrote:
> > The Dependable Boot specification[1] describes the structure of the
> > firmware accept and revert capsules. These are empty capsules which
> > are used for signalling the acceptance or rejection of the updated
> > firmware by the OS. Add support for generating these empty capsules.
> >
> > [1] -
> > https://git.codelinaro.org/linaro/dependable-boot/mbfw/uploads/6f7ddfe3be24e18d4319e108a758d02e/mbfw.pdf
> >
> > Signed-off-by: Sughosh Ganu
> > ---
> > doc/mkeficapsule.1 | 29 ++---
> > tools/eficapsule.h | 8 +++
> > tools/mkeficapsule.c | 139 +--
> > 3 files changed, 151 insertions(+), 25 deletions(-)
> >
> > diff --git a/doc/mkeficapsule.1 b/doc/mkeficapsule.1
> > index 09bdc24295..77ca061efd 100644
> > --- a/doc/mkeficapsule.1
> > +++ b/doc/mkeficapsule.1
> > @@ -8,7 +8,7 @@ mkeficapsule \- Generate EFI capsule file for U-Boot
> >
> > .SH SYNOPSIS
> > .B mkeficapsule
> > -.RI [ options "] " image-blob " " capsule-file
> > +.RI [ options ] " " [ image-blob ] " " capsule-file
> >
> > .SH "DESCRIPTION"
> > .B mkeficapsule
> > @@ -23,8 +23,13 @@ Optionally, a capsule file can be signed with a given
> > private key.
> > In this case, the update will be authenticated by verifying the signature
> > before applying.
> >
> > +Additionally, an empty capsule file can be generated for acceptance or
> > +rejection of firmware images by a governing component like an Operating
> > +System. The empty capsules do not require an image-blob input file.
> > +
> > +
> > .B mkeficapsule
> > -takes any type of image files, including:
> > +takes any type of image files when generating non empty capsules,
> > including:
> > .TP
> > .I raw image
> > format is a single binary blob of any type of firmware.
> > @@ -36,18 +41,16 @@ multiple binary blobs in a single capsule file.
> > This type of image file can be generated by
> > .BR mkimage .
> >
> > -.PP
> > -If you want to use other types than above two, you should explicitly
> > -specify a guid for the FMP driver.
> > -
> > .SH "OPTIONS"
> > +
> > .TP
> > .BI "-g\fR,\fB --guid " guid-string
> > Specify guid for image blob type. The format is:
> > ----
> >
> > The first three elements are in little endian, while the rest
> > -is in big endian.
> > +is in big endian. The option must be specified for all non empty and
> > +image acceptance capsules
>
> "image acceptance" -> "firmware acceptance"
Okay
>
> I don't still understand why we need a guid for acceptance
> while revert doesn't require it.
> I believe that firmware update is "all or nothing", isn't it?
I believe this gives more flexibility in that different components
might be required to accept the various firmware images. So, one
component might accept the optee_os, while another might be
responsible for accepting u-boot. In any case, we do check that all
the components have their accepted bit set, and only if so, does the
bank boot in the regular state. In case of a firmware revert, it would
not matter which firmware component is being reverted -- the platform
would simply need to boot from the other bank. Do you see any issue
with the current method that we have?
>
> If there is a good reason, please describe a possible/expected
> scenario.
Where do you want me to explain this, in the feature documentation? Or
do you think this can be elaborated in greater detail in the spec.
>
> > .TP
> > .BI "-i\fR,\fB --index " index
> > @@ -57,6 +60,18 @@ Specify an image index
> > .BI "-I\fR,\fB --instance " instance
> > Specify a hardware instance
> >
> > +.PP
> > +For generation of firmware accept empty capsule
> > +.BR --guid
> > +is mandatory
> > +.TP
> > +.BI "-A\fR,\fB --fw-accept "
> > +Generate a firmware acceptance empty capsule
> > +
> > +.TP
> > +.BI "-R\fR,\fB --fw-revert "
> > +Generate a firmware revert empty capsule
> > +
> > .TP
> > .BR -h ", " --help
> > Print a help message
> > diff --git a/tools/eficapsule.h b/tools/eficapsule.h
> > index d63b831443..072a4b5598 100644
> > --- a/tools/eficapsule.h
> > +++ b/tools/eficapsule.h
> > @@ -41,6 +41,14 @@ typedef struct {
> > EFI_GUID(0x4aafd29d, 0x68df, 0x49ee, 0x8a, 0xa9, \
> >0x34, 0x7d, 0x37, 0x56, 0x65, 0xa7)
> >
> > +#define FW_ACCEPT_OS_GUID \
> > + EFI_GUID(0x0c996046, 0xbcc0, 0x4d04, 0x85, 0xec, \
> > + 0xe1, 0xfc, 0xed, 0xf1, 0xc6, 0xf8)
> > +
> > +#define FW_REVERT_OS_GUID \
> > + EFI_GUID(0xacd58b4b, 0xc0e8, 0x475f, 0x99, 0xb5, \
> > + 0x6b, 0x3f, 0x7e, 0x07, 0xaa, 0xf0)
> > +
> > /* flags */
> > #define CAPSULE_FLAGS_PERSIST_ACROSS_RESET 0x0001
> >
> > diff --git a/tools/mkeficapsule.c b/tools/mkeficapsule.c
> > index 5f74d23b9e..e8eb6b070d 100644
> > --- a/tools/mkeficapsule.c
> > +++ b/tools/mkeficapsule.c
> > @@ -29,7 +29,16 @@ static const char
Re: [PATCH v3] ARM: imx: Switch Data Modul i.MX8M Mini eDM SBC to USB251x Hub driver
Hi Marek,
Am 14.06.2022 um 22:05 schrieb Marek Vasut:
Replace the ad-hoc I2C register programming scripted in board
environment with U-Boot DM driver.
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
---
V2: Use uclass_get_device_by_name()
V3: Reinstate the device-internal.h, needed for device_probe()
---
.../imx8mm_data_modul_edm_sbc.c | 9 +
configs/imx8mm_data_modul_edm_sbc_defconfig | 1 +
include/configs/imx8mm_data_modul_edm_sbc.h | 20 ---
3 files changed, 10 insertions(+), 20 deletions(-)
diff --git a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c
b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c
index 46cb6f77b59..07d9effbbb9 100644
--- a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c
+++ b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -104,7 +105,15 @@ int board_init(void)
int board_late_init(void)
{
+ struct udevice *dev;
+ int ret;
+
setup_boot_device();
setup_mac_address();
+
+ ret = uclass_get_device_by_name(UCLASS_MISC, "usb-hub@2c", );
+ if (!ret)
+ device_probe(dev);
You could remove the device_probe. The uclass_get_device_by_name call
uclass_find_device_by_name and uclass_get_device_tail which call
device_probe.
