Re: [PATCH 0/2] efi_loader: provide media ID
On 9/27/22 03:51, AKASHI Takahiro wrote: On Mon, Sep 26, 2022 at 08:06:52AM +0200, Heinrich Schuchardt wrote: On 9/16/22 02:58, AKASHI Takahiro wrote: On Thu, Sep 15, 2022 at 10:02:40PM +0200, Heinrich Schuchardt wrote: The medium a device like 'mmc 0' or 'usb 0' points to may change over time. Hence device type and number are not sufficient to identify the inserted medium. The same is true for the device path generated for such a device. Well, it depends on how a device path is generated in U-Boot's UEFI implementation. I believe that a device path represents an "unique path" to a given device however this device is enumerated. In this sense, the current dp_fill()/efi_dp_from_part() is not a right implementation as it relies on device numbers. Furthermore, a generated device path here is different from one generated by EDK2 (even if both software are run on the same board). This is an issue that I used to tackle in https://lists.denx.de/pipermail/u-boot/2021-November/468216.html although I have since had no progress. This is why the EFI_BLOCK_IO_PROTOCOL provides a field MediaId. Whenever a removable medium is changed or a new block device with a previously used device path is created we should provide a different MediaID. This series adds a field media_id to the block device descriptor and fills it after probing. The value of the field is then copied to the EFI_BLOCK_IO_PROTOCOL. I'm afraid that your patch doesn't always work as you expect. When "scsi rescan" or "usb stop; usb start", for instance, is invoked, all the existing devices and associated blk_desc structures are once freed and even if nothing is changed, i.e. a device is neither removed nor added, the exact same structures will be re-created. With your patch applied, however, a new (and different) "media_id" will be assigned to an existing device. UEFI User may be notified of "media change". (To be honest, this is quite unlikely because the current UEFI implementation doesn't use BLOCK_IO_PROTOCOL internally, say, for file system access.) This behavior matches what EDK II does if you remove a device and create a new device. I don't think that EDK2 has "scsi rescan" or others, which users can invoke at any time. Moreover, I believe that EDK2 code (drivers) checks whether a device is really changed or not before updating a MediaId. If a device is removed and recreated anything could have happened in between like complete repartitioning. We cannot assume that any cached state is valid anymore even if GUIDs are the same. I'm not sure if you fully understand my point. My assumption is the case where a device is NOT removed around "scsi rescan" (or usb stop/start) and stays online. In this case, 1. access to, say, "scsi 0:1", via UEFI BLOCK_IO succeeds 2. "scsi rescan" 3. access to the same device, "scsi 0:1", via UEFI BLOCK_IO currently (3) succeeds, but with your patch, it may potentially fail because of media_id altered. I admit that it will not happen under the current UEFI implementation because non of UEFI applications will survive across command lines and none of information, including media_id or handle, can be carried over from (1) to (3). But unconditionally incrementing an internally-held media_id, as in your patch, is a wrong behavior. The patch issues a new media ID if a new device is probed which only happens to have the same device number if another device of that number was removed before. Commands like 'usb scan' don't necessarily issue the same numbers to the same device as before the command if a new device has been attached in the meanwhile. Assuming that a new device contains the same medium as an old one because by chance it has the same device number is definitively unsafe. If a device is probed, we have to assume that it contains a new medium. Best regards Heinrich -Takahiro Akashi So it is correct to change the media ID in this case. Commands like scsi rescan are needed because we don't monitor media changes in the DM drivers yet. Simon's suggestion to use provide an event for media changes looks like the right approach to me. Best regards Heinrich -Takahiro Akashi With future patches we can refine this in sub-systems like USB, MMC, SCSI to indicate media changes Heinrich Schuchardt (2): dm: blk: assign media ID to block devices efi_loader: fill media_id from block device descriptor drivers/block/blk-uclass.c | 16 +++- include/blk.h | 11 +++ lib/efi_loader/efi_disk.c | 6 +- 3 files changed, 27 insertions(+), 6 deletions(-) -- 2.37.2
Re: [PATCH] ARM: dts: stm32: Add DHCOR based Testbench board
Hi Marek
On 9/26/22 18:50, Marek Vasut wrote:
> Add DT for DHCOR Testbench board, which is a testbench for testing of
> DHCOR SoM during manufacturing. This is effectively a trimmed down
> version of AV96 board with CSI-2 bridge, HDMI bridge, WiFi, Audio and
> LEDs removed and used as GPIOs instead. Furthermore, the PMIC Buck3
> is always configured from PMIC NVM to cater for both 1V8 and 3V3 SoM
> variant.
>
> Signed-off-by: Marek Vasut
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> ---
> arch/arm/dts/Makefile | 3 +-
> .../stm32mp15xx-dhcor-testbench-u-boot.dtsi | 100 ++
> arch/arm/dts/stm32mp15xx-dhcor-testbench.dts | 178 ++
> board/dhelectronics/dh_stm32mp1/board.c | 40 ++--
> .../dh_stm32mp1/u-boot-dhcor.its | 21 ++-
> 5 files changed, 325 insertions(+), 17 deletions(-)
> create mode 100644 arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi
> create mode 100644 arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 965895bc2a3..4a2c0de74a0 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -1201,7 +1201,8 @@ dtb-$(CONFIG_STM32MP15x) += \
> stm32mp15xx-dhcom-pdk2.dtb \
> stm32mp15xx-dhcom-picoitx.dtb \
> stm32mp15xx-dhcor-avenger96.dtb \
> - stm32mp15xx-dhcor-drc-compact.dtb
> + stm32mp15xx-dhcor-drc-compact.dtb \
> + stm32mp15xx-dhcor-testbench.dtb
>
> dtb-$(CONFIG_SOC_K3_AM654) += \
> k3-am654-base-board.dtb \
> diff --git a/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi
> b/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi
> new file mode 100644
> index 000..5b051b8ac45
> --- /dev/null
> +++ b/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi
> @@ -0,0 +1,100 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
> +/*
> + * Copyright (C) 2022 Marek Vasut
> + */
> +
> +#include "stm32mp15xx-dhcor-u-boot.dtsi"
> +
> +/ {
> + aliases {
> + mmc0 = &sdmmc1;
> + mmc1 = &sdmmc2;
> + usb0 = &usbotg_hs;
> + };
> +
> + config {
> + dh,board-coding-gpios = <&gpiog 13 0>, <&gpiod 9 0>;
> + };
> +};
> +
> +ðernet0 {
> + phy-reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
> +
> + mdio0 {
> + ethernet-phy@7 {
> + reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
> + reset-assert-us = <11000>;
> + reset-deassert-us = <1000>;
> + };
> + };
> +};
> +
> +&sdmmc1 {
> + u-boot,dm-spl;
> + st,use-ckin;
> + st,cmd-gpios = <&gpiod 2 0>;
> + st,ck-gpios = <&gpioc 12 0>;
> + st,ckin-gpios = <&gpioe 4 0>;
> +};
> +
> +&sdmmc1_b4_pins_a {
> + u-boot,dm-spl;
> + pins1 {
> + u-boot,dm-spl;
> + };
> + pins2 {
> + u-boot,dm-spl;
> + };
> +};
> +
> +&sdmmc1_dir_pins_b {
> + u-boot,dm-spl;
> + pins1 {
> + u-boot,dm-spl;
> + };
> + pins2 {
> + u-boot,dm-spl;
> + };
> +};
> +
> +&sdmmc2 {
> + u-boot,dm-spl;
> +};
> +
> +&sdmmc2_b4_pins_a {
> + u-boot,dm-spl;
> + pins1 {
> + u-boot,dm-spl;
> + };
> + pins2 {
> + u-boot,dm-spl;
> + };
> +};
> +
> +&sdmmc2_d47_pins_c {
> + u-boot,dm-spl;
> + pins {
> + u-boot,dm-spl;
> + };
> +};
> +
> +&uart4 {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&uart4_pins_b {
> + u-boot,dm-pre-reloc;
> + pins1 {
> + u-boot,dm-pre-reloc;
> + };
> + pins2 {
> + u-boot,dm-pre-reloc;
> + /delete-property/ bias-disable;
> + bias-pull-up;
> + };
> +};
> +
> +&usbotg_hs {
> + u-boot,force-b-session-valid;
> + hnp-srp-disable;
> +};
> diff --git a/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
> b/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
> new file mode 100644
> index 000..c9163e1c028
> --- /dev/null
> +++ b/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
> @@ -0,0 +1,178 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
> +/*
> + * Copyright (C) 2022 Marek Vasut
> + */
> +/dts-v1/;
> +
> +#include "stm32mp151.dtsi"
> +#include "stm32mp15xx-dhcor-som.dtsi"
> +
> +/ {
> + model = "DH electronics STM32MP15xx DHCOR Testbench";
> + compatible = "dh,stm32mp15xx-dhcor-testbench", "st,stm32mp1xx";
> +
> + aliases {
> + ethernet0 = ðernet0;
> + mmc0 = &sdmmc1;
> + mmc1 = &sdmmc2;
> + serial0 = &uart4;
> + serial1 = &uart7;
> + spi0 = &qspi;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + sd_switch: regulator-sd_switch {
> + compatible = "regulator-gpio";
> + regulator-name = "sd_switch";
> + regulator-min-microvolt = <180>;
> + regulator-max-microvolt = <290>;
> + regulator-ty
Re: [PATCH] ARM: dts: stm32: Drop extra newline from AV96 U-Boot extras DT
HI Marek
On 9/26/22 18:46, Marek Vasut wrote:
> Remove duplicate newline, no functional change.
>
> Signed-off-by: Marek Vasut
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> ---
> arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
> b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
> index b6fceb9ad58..6dee51dc1c2 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
> @@ -19,7 +19,6 @@
> };
> };
>
> -
> ðernet0 {
> phy-reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
RE: [PATCH v1] gpio: adp5585: add gpio driver for ADP5585 I/O Expander Controller
A friendly ping...
Best Regards,
Alice Guo
> -Original Message-
> From: U-Boot On Behalf Of Alice Guo (OSS)
> Sent: Tuesday, September 6, 2022 5:38 PM
> To: sba...@denx.de; feste...@gmail.com; s...@chromium.org
> Cc: dl-uboot-imx ; u-boot@lists.denx.de
> Subject: [PATCH v1] gpio: adp5585: add gpio driver for ADP5585 I/O Expander
> Controller
>
> From: Alice Guo
>
> Signed-off-by: Alice Guo
> ---
> arch/arm/include/asm/arch-imx9/gpio.h | 2 +
> drivers/gpio/Kconfig | 6 +
> drivers/gpio/Makefile | 1 +
> drivers/gpio/adp5585_gpio.c | 238
> ++
> 4 files changed, 247 insertions(+)
> create mode 100644 drivers/gpio/adp5585_gpio.c
>
> diff --git a/arch/arm/include/asm/arch-imx9/gpio.h
> b/arch/arm/include/asm/arch-imx9/gpio.h
> index 40732022e7..599f7511c3 100644
> --- a/arch/arm/include/asm/arch-imx9/gpio.h
> +++ b/arch/arm/include/asm/arch-imx9/gpio.h
> @@ -6,6 +6,8 @@
> #ifndef __ASM_ARCH_IMX9_GPIO_H
> #define __ASM_ARCH_IMX9_GPIO_H
>
> +#include
> +
> struct gpio_regs {
> u32 gpio_pdor;
> u32 gpio_psor;
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index
> c949f9d2f7..550ff9c586 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -605,4 +605,10 @@ config TURRIS_OMNIA_MCU
> help
> Support for GPIOs on MCU connected to Turris Omnia via i2c.
>
> +config ADP5585_GPIO
> + bool "ADP5585 GPIO driver"
> + depends on DM_GPIO && DM_I2C
> + help
> + Support ADP5585 GPIO expander on i.MX platform.
> +
> endif
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index
> 9d718a554e..2f60b98384 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -75,3 +75,4 @@ obj-$(CONFIG_SL28CPLD_GPIO) += sl28cpld-gpio.o
> obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN)+= zynqmp_gpio_modepin.o
> obj-$(CONFIG_SLG7XL45106_I2C_GPO)+= gpio_slg7xl45106.o
> obj-$(CONFIG_$(SPL_TPL_)TURRIS_OMNIA_MCU)+= turris_omnia_mcu.o
> +obj-$(CONFIG_ADP5585_GPIO) += adp5585_gpio.o
> diff --git a/drivers/gpio/adp5585_gpio.c b/drivers/gpio/adp5585_gpio.c new
> file mode 100644 index 00..ea0cb75459
> --- /dev/null
> +++ b/drivers/gpio/adp5585_gpio.c
> @@ -0,0 +1,238 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2022 NXP
> + *
> + * ADP5585 I/O Expander Controller
> + *
> + * Author: Alice Guo */
> +
> +#include
> +#include
> +#include
> +#include
> +
> +#define ADP5585_ID 0x00
> +#define ADP5585_INT_STATUS 0x01
> +#define ADP5585_STATUS 0x02
> +#define ADP5585_FIFO_1 0x03
> +#define ADP5585_FIFO_2 0x04
> +#define ADP5585_FIFO_3 0x05
> +#define ADP5585_FIFO_4 0x06
> +#define ADP5585_FIFO_5 0x07
> +#define ADP5585_FIFO_6 0x08
> +#define ADP5585_FIFO_7 0x09
> +#define ADP5585_FIFO_8 0x0A
> +#define ADP5585_FIFO_9 0x0B
> +#define ADP5585_FIFO_10 0x0C
> +#define ADP5585_FIFO_11 0x0D
> +#define ADP5585_FIFO_12 0x0E
> +#define ADP5585_FIFO_13 0x0F
> +#define ADP5585_FIFO_14 0x10
> +#define ADP5585_FIFO_15 0x11
> +#define ADP5585_FIFO_16 0x12
> +#define ADP5585_GPI_INT_STAT_A 0x13
> +#define ADP5585_GPI_INT_STAT_B 0x14
> +#define ADP5585_GPI_STATUS_A 0x15
> +#define ADP5585_GPI_STATUS_B 0x16
> +#define ADP5585_RPULL_CONFIG_A 0x17
> +#define ADP5585_RPULL_CONFIG_B 0x18
> +#define ADP5585_RPULL_CONFIG_C 0x19
> +#define ADP5585_RPULL_CONFIG_D 0x1A
> +#define ADP5585_GPI_INT_LEVEL_A 0x1B
> +#define ADP5585_GPI_INT_LEVEL_B 0x1C
> +#define ADP5585_GPI_EVENT_EN_A 0x1D
> +#define ADP5585_GPI_EVENT_EN_B 0x1E
> +#define ADP5585_GPI_INTERRUPT_EN_A 0x1F
> +#define ADP5585_GPI_INTERRUPT_EN_B 0x20
> +#define ADP5585_DEBOUNCE_DIS_A 0x21
> +#define ADP5585_DEBOUNCE_DIS_B 0x22
> +#define ADP5585_GPO_DATA_OUT_A 0x23
> +#define ADP5585_GPO_DATA_OUT_B 0x24
> +#define ADP5585_GPO_OUT_MODE_A 0x25
> +#define ADP5585_GPO_OUT_MODE_B 0x26
> +#define ADP5585_GPIO_DIRECTION_A 0x27
> +#define ADP5585_GPIO_DIRECTION_B 0x28
> +#define ADP5585_RESET1_EVENT_A 0x29
> +#define ADP5585_RESET1_EVENT_B 0x2A
> +#define ADP5585_RESET1_EVENT_C 0x2B
> +#define ADP5585_RESET2_EVENT_A 0x2C
> +#define ADP5585_RESET2_EVENT_B 0x2D
> +#define ADP5585_RESET_CFG0x2E
> +#define ADP5585_PWM_OFFT_LOW 0x2F
> +#define ADP5585_PWM_OFFT_HIGH0x30
> +#def
[PATCH 2/2] configs: am62x_evm_a53: Enable OSPI Flash support
Set the necessary config options that help to build the necessary drivers that support spansion S28HS512T Flash Signed-off-by: Dhruva Gole --- configs/am62x_evm_a53_defconfig | 13 + 1 file changed, 13 insertions(+) diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index 2c0bd4d2e10c..2a670449408f 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -31,7 +31,11 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER_DOMAIN=y +# CONFIG_SPL_SPI_FLASH_TINY is not set +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_LOAD=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_BOOTM_LEN=0x80 CONFIG_CMD_MMC=y @@ -57,6 +61,12 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ADMA=y CONFIG_SPL_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_AM654=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_S28HS512T=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y @@ -70,6 +80,9 @@ CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y CONFIG_SOC_DEVICE_TI_K3=y CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_TI_SCI=y -- 2.25.1
[PATCH 0/2] ke-am62x-sk_evm: add ospi support
There's a S28HS512T Flash (by Cypress) on the AM625 SK EVM. - Add necessary DT nodes to enable OSPI interface with this flash. - Enable all configs that enable the OSPI related drivers and commands like SF probe. Tested on my AM62 SK EVM, attaching logs below. Logs: U-Boot SPL 2022.10-rc5-00012-g435596d57f8b-dirty (Sep 26 2022 - 16:27:48 +0530) SYSFW ABI: 3.1 (firmware rev 0x0008 '8.4.6--v08.04.06 (Jolly Jellyfi') Trying to boot from MMC2 Starting ATF on ARM64 core... NOTICE: BL31: v2.7(release):v2.7.0-dirty NOTICE: BL31: Built : 14:30:02, Aug 27 2022 U-Boot SPL 2022.10-rc5-00012-g435596d57f8b-dirty (Sep 26 2022 - 17:51:27 +0530) SYSFW ABI: 3.1 (firmware rev 0x0008 '8.4.6--v08.04.06 (Jolly Jellyfi') Trying to boot from MMC2 U-Boot 2022.10-rc5-00012-g435596d57f8b-dirty (Sep 26 2022 - 17:51:27 +0530) SoC: AM62X SR1.0 GP Model: Texas Instruments AM625 SK DRAM: 2 GiB Core: 37 devices, 18 uclasses, devicetree: separate MMC: mmc@fa1: 2, mmc@fa0: 1, mmc@fa2: 3 Loading Environment from nowhere... OK In:serial@280 Out: serial@280 Err: serial@280 Net: No ethernet found. Hit any key to stop autoboot: 0 => sf probe SF: Detected s28hs512t with page size 256 Bytes, erase size 256 KiB, total 64 MiB => fatload mmc 1 $loadaddr tiboot3.bin 285482 bytes read in 17 ms (16 MiB/s) => sf update $loadaddr 0x0 $filesize device 0 offset 0x0, size 0x45b2a 285482 bytes written, 0 bytes skipped in 2.623s, speed 111322 B/s => sf read 0x9000 0x0 $filesize device 0 offset 0x0, size 0x45b2a SF: 285482 bytes @ 0x0 Read: OK => md $loadaddr 8200: 94048230 fd038230 010203a0 64140202 0...0..d 8210: 3f829a45 85bb6dd8 232b5568 f8f4176f E..?.m..hU+#o... 8220: 309fb7ff 2a09060d f7864886 0d01010d ...0...*.H.. 8230: 8135 300b319d 55030609 02130604 ..0..1.0...U 8240: 0b315355 03060930 0c080455 31585402 US1.0...UTX1 8250: 060d300f 07045503 6144060c 73616c6c .0...UDallas 8260: 25302731 04550306 541e0c0a 73617865 1'0%..UTexas 8270: 736e4920 6d757274 73746e65 636e4920 Instruments Inc 8280: 6f70726f 65746172 30133164 55030611 orporated1.0...U 8290: 0a0c0b04 636f7250 6f737365 13317372 Processors1. 82a0: 03061130 0c030455 2049540a 70707553 0...UTI Supp 82b0: 3174726f 061b301d 48862a09 010df786 ort1.0...*.H 82c0: 0e160109 70707573 4074726f 632e6974 support@ti.c 82d0: 1e306d6f 32320d17 36323930 38353031 om0...2209261058 82e0: 175a3331 3132320d 31363230 31383530 13Z..22102610581 82f0: 81305a33 300b319d 55030609 02130604 3Z0..1.0...U => md 0x9000 9000: 94048230 fd038230 010203a0 64140202 0...0..d 9010: 3f829a45 85bb6dd8 232b5568 f8f4176f E..?.m..hU+#o... 9020: 309fb7ff 2a09060d f7864886 0d01010d ...0...*.H.. 9030: 8135 300b319d 55030609 02130604 ..0..1.0...U 9040: 0b315355 03060930 0c080455 31585402 US1.0...UTX1 9050: 060d300f 07045503 6144060c 73616c6c .0...UDallas 9060: 25302731 04550306 541e0c0a 73617865 1'0%..UTexas 9070: 736e4920 6d757274 73746e65 636e4920 Instruments Inc 9080: 6f70726f 65746172 30133164 55030611 orporated1.0...U 9090: 0a0c0b04 636f7250 6f737365 13317372 Processors1. 90a0: 03061130 0c030455 2049540a 70707553 0...UTI Supp 90b0: 3174726f 061b301d 48862a09 010df786 ort1.0...*.H 90c0: 0e160109 70707573 4074726f 632e6974 support@ti.c 90d0: 1e306d6f 32320d17 36323930 38353031 om0...2209261058 90e0: 175a3331 3132320d 31363230 31383530 13Z..22102610581 90f0: 81305a33 300b319d 55030609 02130604 3Z0..1.0...U => cmp.b $loadaddr 0x9000 $filesize Total of 285482 byte(s) were the same Thus tested read, write and probe flash from u-boot prompt Dhruva Gole (2): arm: dts: k3-am625-sk: Add OSPI support configs: am62x_evm_a53: Enable OSPI Flash support arch/arm/dts/k3-am625-sk-u-boot.dtsi | 24 + arch/arm/dts/k3-am625-sk.dts | 77 configs/am62x_evm_a53_defconfig | 13 + 3 files changed, 114 insertions(+) -- 2.25.1
[PATCH 1/2] arm: dts: k3-am625-sk: Add OSPI support
Add DT nodes to enable S28HS512T OSPI flash on the SK board.
Signed-off-by: Dhruva Gole
---
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 24 +
arch/arm/dts/k3-am625-sk.dts | 77
2 files changed, 101 insertions(+)
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index 159fa36bbe9f..92788bae3e09 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -102,3 +102,27 @@
&main_mmc1_pins_default {
u-boot,dm-spl;
};
+
+&fss {
+ u-boot,dm-spl;
+};
+
+&ospi0_pins_default {
+ u-boot,dm-spl;
+};
+
+&ospi0 {
+ u-boot,dm-spl;
+
+ flash@0 {
+ u-boot,dm-spl;
+
+ partitions {
+ u-boot,dm-spl;
+
+ partition@3fc {
+ u-boot,dm-spl;
+ };
+ };
+ };
+};
diff --git a/arch/arm/dts/k3-am625-sk.dts b/arch/arm/dts/k3-am625-sk.dts
index 76b06ea23953..5d4b2fddafaa 100644
--- a/arch/arm/dts/k3-am625-sk.dts
+++ b/arch/arm/dts/k3-am625-sk.dts
@@ -19,6 +19,7 @@
aliases {
serial2 = &main_uart0;
mmc1 = &sdhci1;
+ spi0 = &ospi0;
};
chosen {
@@ -77,6 +78,23 @@
AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */
>;
};
+
+ ospi0_pins_default: ospi0-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
+ AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
+ AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */
+
+ AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */
+ AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */
+ AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */
+ AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */
+ AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */
+ AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */
+ AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
+ AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
+ >;
+ };
};
&wkup_uart0 {
@@ -148,3 +166,62 @@
ti,driver-strength-ohm = <50>;
disable-wp;
};
+
+&ospi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ospi0_pins_default>;
+
+ flash@0{
+ compatible = "jedec,spi-nor";
+ reg = <0x0>;
+ spi-tx-bus-width = <8>;
+ spi-rx-bus-width = <8>;
+ spi-max-frequency = <2500>;
+ cdns,tshsl-ns = <60>;
+ cdns,tsd2d-ns = <60>;
+ cdns,tchsh-ns = <60>;
+ cdns,tslch-ns = <60>;
+ cdns,read-delay = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "ospi.tiboot3";
+ reg = <0x0 0x8>;
+ };
+
+ partition@8 {
+ label = "ospi.tispl";
+ reg = <0x8 0x20>;
+ };
+
+ partition@28 {
+ label = "ospi.u-boot";
+ reg = <0x28 0x40>;
+ };
+
+ partition@68 {
+ label = "ospi.env";
+ reg = <0x68 0x4>;
+ };
+
+ partition@6c {
+ label = "ospi.env.backup";
+ reg = <0x6c 0x4>;
+ };
+
+ partition@80 {
+ label = "ospi.rootfs";
+ reg = <0x80 0x37c>;
+ };
+
+ partition@3fc {
+ label = "ospi.phypattern";
+ reg = <0x3fc 0x4>;
+ };
+ };
+ };
+};
--
2.25.1
Re: [PATCH] rockchip: rk3399: add ethaddr and serial# init, enable for R4S
On Tue, Sep 27, 2022 at 5:27 AM Christian Kohlschütter wrote: > > > On 26. Sep 2022, at 13:59, Chen-Yu Tsai wrote: > > > > On Mon, Sep 26, 2022 at 7:53 PM Christian Kohlschütter > > wrote: > >> > >> Some RK3399 boards, such as newer revisions of NanoPi R4S, do not > >> provide an EEPROM chip containing a globally unique MAC address. > >> > >> Currently, this means that a randomly generated temporary MAC address > >> may be generated each time the device is rebooted, leading to ARP cache > >> issues and other confusing bugs. > >> > >> Since RK3399 CPUs provide a built-in unique serial number, we can > >> reliably derive a locally MAC address from it by reading the > >> corresponding bits from the non-secure efuse block. > >> > >> Port from uboot-rockchip 0c294d0, fix compilation issues and adjust > >> coding style. > >> > >> rockchip: board: puma_rk3399: derive ethaddr from cpuid > >> rockchip: board: puma_rk3399: add support for serial# and cpuid# > >> rockchip: efuse: add (misc) driver for RK3399 non-secure efuse block > >> via efuses > >> > >> Signed-off-by: Christian Kohlschütter > >> --- > >> board/rockchip/evb_rk3399/evb-rk3399.c | 120 + > >> configs/nanopi-r4s-rk3399_defconfig| 4 + > >> drivers/misc/Makefile | 2 +- > > > > There's already code in arch/arm/mach-rockchip/misc.c that does pretty much > > the same thing. > > > > IIRC all you need to do is enable MISC_INIT_R and ROCKCHIP_EFUSE > > or ROCKCHIP_OTP. > > > > ChenYu > > Oh cool, thanks ChenYu! > > Is there a reason to not enable these options by default (at least for the > R4S)? Personally I think they could be enabled by default for all RK3399 boards. > Following up with "[PATCH] rockchip: rk3399: add ethaddr and serial# init, > enable for R4S", which enables these settings in > configs/nanopi-r4s-rk3399_defconfig. This doesn't look any different from what you already sent. ChenYu
Re: [PATCH 0/2] efi_loader: provide media ID
On Mon, Sep 26, 2022 at 08:06:52AM +0200, Heinrich Schuchardt wrote: > > > On 9/16/22 02:58, AKASHI Takahiro wrote: > > On Thu, Sep 15, 2022 at 10:02:40PM +0200, Heinrich Schuchardt wrote: > > > The medium a device like 'mmc 0' or 'usb 0' points to may change over > > > time. Hence device type and number are not sufficient to identify the > > > inserted medium. The same is true for the device path generated for > > > such a device. > > > > Well, it depends on how a device path is generated in U-Boot's UEFI > > implementation. I believe that a device path represents an "unique path" > > to a given device however this device is enumerated. > > In this sense, the current dp_fill()/efi_dp_from_part() is not a right > > implementation as it relies on device numbers. > > Furthermore, a generated device path here is different from one generated > > by EDK2 (even if both software are run on the same board). > > > > This is an issue that I used to tackle in > > https://lists.denx.de/pipermail/u-boot/2021-November/468216.html > > although I have since had no progress. > > > > > This is why the EFI_BLOCK_IO_PROTOCOL provides a field > > > MediaId. > > > > > > Whenever a removable medium is changed or a new block device with a > > > previously used device path is created we should provide a different > > > MediaID. > > > > > > This series adds a field media_id to the block device descriptor and fills > > > it after probing. The value of the field is then copied to the > > > EFI_BLOCK_IO_PROTOCOL. > > > > I'm afraid that your patch doesn't always work as you expect. > > When "scsi rescan" or "usb stop; usb start", for instance, is invoked, > > all the existing devices and associated blk_desc structures are once freed > > and even if nothing is changed, i.e. a device is neither removed nor added, > > the exact same structures will be re-created. > > With your patch applied, however, a new (and different) "media_id" will be > > assigned to an existing device. UEFI User may be notified of "media change". > > (To be honest, this is quite unlikely because the current UEFI > > implementation > > doesn't use BLOCK_IO_PROTOCOL internally, say, for file system access.) > > This behavior matches what EDK II does if you remove a device and create a > new device. I don't think that EDK2 has "scsi rescan" or others, which users can invoke at any time. Moreover, I believe that EDK2 code (drivers) checks whether a device is really changed or not before updating a MediaId. > If a device is removed and recreated anything could have happened in between > like complete repartitioning. We cannot assume that any cached state is > valid anymore even if GUIDs are the same. I'm not sure if you fully understand my point. My assumption is the case where a device is NOT removed around "scsi rescan" (or usb stop/start) and stays online. In this case, 1. access to, say, "scsi 0:1", via UEFI BLOCK_IO succeeds 2. "scsi rescan" 3. access to the same device, "scsi 0:1", via UEFI BLOCK_IO currently (3) succeeds, but with your patch, it may potentially fail because of media_id altered. I admit that it will not happen under the current UEFI implementation because non of UEFI applications will survive across command lines and none of information, including media_id or handle, can be carried over from (1) to (3). But unconditionally incrementing an internally-held media_id, as in your patch, is a wrong behavior. -Takahiro Akashi > > So it is correct to change the media ID in this case. > Commands like scsi rescan are needed because we don't monitor media changes > in the DM drivers yet. Simon's suggestion to use provide an event for media > changes looks like the right approach to me. > > Best regards > > Heinrich > > > > > -Takahiro Akashi > > > > > With future patches we can refine this in sub-systems like USB, MMC, SCSI > > > to indicate media changes > > > > > > Heinrich Schuchardt (2): > > >dm: blk: assign media ID to block devices > > >efi_loader: fill media_id from block device descriptor > > > > > > drivers/block/blk-uclass.c | 16 +++- > > > include/blk.h | 11 +++ > > > lib/efi_loader/efi_disk.c | 6 +- > > > 3 files changed, 27 insertions(+), 6 deletions(-) > > > > > > -- > > > 2.37.2 > > >
[PATCH] x86: Fix i8259 ifdef include guard
When building U-Boot with clang, it notices that the i8259.h include guard does not work correctly due to a typo. Fix it. Signed-off-by: Alistair Delva Cc: Simon Glass Cc: Bin Meng Cc: Nick Desaulniers --- arch/x86/include/asm/i8259.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/i8259.h b/arch/x86/include/asm/i8259.h index b73052a6d2..90f2d3866c 100644 --- a/arch/x86/include/asm/i8259.h +++ b/arch/x86/include/asm/i8259.h @@ -7,7 +7,7 @@ /* i8259.h i8259 PIC Registers */ #ifndef _ASMI386_I8259_H_ -#define _ASMI386_I8959_H_ +#define _ASMI386_I8259_H_ /* PIC I/O mapped registers */ #define IRR0x0 /* Interrupt Request Register */ @@ -73,4 +73,4 @@ int i8259_init(void); -#endif /* _ASMI386_I8959_H_ */ +#endif /* _ASMI386_I8259_H_ */ -- 2.30.2
[PATCH] avb: Extend support to non-eMMC interfaces
From: Jiyong Park
Previously Android AVB supported block devices only on eMMC. This change
eliminates the restriction by using the generic block driver model.
The `avb init' command is modified to accept another parameter which
specifies the interface type. e.g., `avb init virtio 0' initializes
avb for the first (0) disk that is accessible via the virtio interface.
[adelva: The "avb init" command is updated directly, as this is
considered a "debug command" that can't be usefully used in u-boot
scripts.]
Signed-off-by: Alistair Delva
Cc: Igor Opaniuk
Cc: Ram Muthiah
Cc: Jiyong Park
Cc: Simon Glass
---
cmd/avb.c| 16 ---
common/Kconfig | 1 -
common/avb_verify.c | 105 +--
include/avb_verify.h | 31 -
4 files changed, 69 insertions(+), 84 deletions(-)
diff --git a/cmd/avb.c b/cmd/avb.c
index 783f51b816..8bffe49011 100644
--- a/cmd/avb.c
+++ b/cmd/avb.c
@@ -10,24 +10,25 @@
#include
#include
#include
-#include
#define AVB_BOOTARGS "avb_bootargs"
static struct AvbOps *avb_ops;
int do_avb_init(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
- unsigned long mmc_dev;
+ const char *iface;
+ const char *devnum;
- if (argc != 2)
+ if (argc != 3)
return CMD_RET_USAGE;
- mmc_dev = hextoul(argv[1], NULL);
+ iface = argv[1];
+ devnum = argv[2];
if (avb_ops)
avb_ops_free(avb_ops);
- avb_ops = avb_ops_alloc(mmc_dev);
+ avb_ops = avb_ops_alloc(iface, devnum);
if (avb_ops)
return CMD_RET_SUCCESS;
@@ -419,7 +420,7 @@ int do_avb_write_pvalue(struct cmd_tbl *cmdtp, int flag,
int argc,
}
static struct cmd_tbl cmd_avb[] = {
- U_BOOT_CMD_MKENT(init, 2, 0, do_avb_init, "", ""),
+ U_BOOT_CMD_MKENT(init, 3, 0, do_avb_init, "", ""),
U_BOOT_CMD_MKENT(read_rb, 2, 0, do_avb_read_rb, "", ""),
U_BOOT_CMD_MKENT(write_rb, 3, 0, do_avb_write_rb, "", ""),
U_BOOT_CMD_MKENT(is_unlocked, 1, 0, do_avb_is_unlocked, "", ""),
@@ -455,7 +456,8 @@ static int do_avb(struct cmd_tbl *cmdtp, int flag, int
argc, char *const argv[])
U_BOOT_CMD(
avb, 29, 0, do_avb,
"Provides commands for testing Android Verified Boot 2.0 functionality",
- "init - initialize avb2 for \n"
+ "init - initialize avb2 for the disk
which\n"
+ "is on the interface \n"
"avb read_rb - read rollback index at location \n"
"avb write_rb - write rollback index to \n"
"avb is_unlocked - returns unlock status of the device\n"
diff --git a/common/Kconfig b/common/Kconfig
index ebee856e56..a66060767c 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -703,7 +703,6 @@ config HASH
config AVB_VERIFY
bool "Build Android Verified Boot operations"
depends on LIBAVB
- depends on MMC
depends on PARTITION_UUIDS
help
This option enables compilation of bootloader-dependent operations,
diff --git a/common/avb_verify.c b/common/avb_verify.c
index 0520a71455..d30bbb5726 100644
--- a/common/avb_verify.c
+++ b/common/avb_verify.c
@@ -253,10 +253,10 @@ char *avb_set_enforce_verity(const char *cmdline)
/**
*
- * IO(mmc) auxiliary functions
+ * IO auxiliary functions
*
*/
-static unsigned long mmc_read_and_flush(struct mmc_part *part,
+static unsigned long blk_read_and_flush(struct avb_part *part,
lbaint_t start,
lbaint_t sectors,
void *buffer)
@@ -291,7 +291,7 @@ static unsigned long mmc_read_and_flush(struct mmc_part
*part,
tmp_buf = buffer;
}
- blks = blk_dread(part->mmc_blk,
+ blks = blk_dread(part->blk,
start, sectors, tmp_buf);
/* flush cache after read */
flush_cache((ulong)tmp_buf, sectors * part->info.blksz);
@@ -302,7 +302,7 @@ static unsigned long mmc_read_and_flush(struct mmc_part
*part,
return blks;
}
-static unsigned long mmc_write(struct mmc_part *part, lbaint_t start,
+static unsigned long blk_write(struct avb_part *part, lbaint_t start,
lbaint_t sectors, void *buffer)
{
void *tmp_buf;
@@ -330,69 +330,59 @@ static unsigned long mmc_write(struct mmc_part *part,
lbaint_t start,
tmp_buf = buffer;
}
- return blk_dwrite(part->mmc_blk,
+ return blk_dwrite(part->blk,
start, sectors, tmp_buf);
}
-static struct mmc_part *get_partition(AvbOps *ops, const char *partition)
+static struct avb_part *get_partition(AvbOps *ops, const char *partition)
{
- int ret;
- u8 dev_num;
- int part_num = 0;
-
[RFC PATCH] dm: fpga: Introduce new uclass
For future DM based FPGA drivers and for now to have a meaningful
logging class for old FPGA drivers.
Suggested-by: Michal Simek
Suggested-by: Simon Glass
Signed-off-by: Alexander Dahl
---
arch/sandbox/dts/test.dts | 4
drivers/fpga/Kconfig | 14 ++
drivers/fpga/Makefile | 3 +++
drivers/fpga/fpga-uclass.c | 11 +++
drivers/fpga/sandbox.c | 11 +++
include/dm/uclass-id.h | 1 +
test/dm/Makefile | 1 +
test/dm/fpga.c | 20
8 files changed, 65 insertions(+)
create mode 100644 drivers/fpga/fpga-uclass.c
create mode 100644 drivers/fpga/sandbox.c
create mode 100644 test/dm/fpga.c
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 2761588f0d..3b9cc8cd7c 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -650,6 +650,10 @@
};
};
+ fpga {
+ compatible = "sandbox,fpga";
+ };
+
pinctrl-gpio {
compatible = "sandbox,pinctrl-gpio";
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index e07a9cf80e..2ad1ff60b6 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -118,4 +118,18 @@ config SPL_FPGA_LOAD_SECURE
Enables the fpga loads() functions that are used to load secure
(authenticated or encrypted or both) bitstreams on to FPGA.
+config DM_FPGA
+ bool "Enable Driver Model for FPGA drivers"
+ depends on DM
+ select FPGA
+ help
+ Enable driver model for FPGA.
+ For now this is uclass only without a real driver using it.
+
+config SANDBOX_FPGA
+ bool "Enable sandbox FPGA driver"
+ depends on SANDBOX && DM_FPGA
+ help
+ tbd
+
endmenu
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 83243fb107..610c168fc3 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -4,6 +4,9 @@
# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
obj-y += fpga.o
+obj-$(CONFIG_DM_FPGA) += fpga-uclass.o
+obj-$(CONFIG_SANDBOX_FPGA) += sandbox.o
+
obj-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
obj-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
obj-$(CONFIG_FPGA_VERSALPL) += versalpl.o
diff --git a/drivers/fpga/fpga-uclass.c b/drivers/fpga/fpga-uclass.c
new file mode 100644
index 00..4278ec28e5
--- /dev/null
+++ b/drivers/fpga/fpga-uclass.c
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Alexander Dahl
+ */
+
+#include
+
+UCLASS_DRIVER(fpga) = {
+ .name = "fpga",
+ .id = UCLASS_FPGA,
+};
diff --git a/drivers/fpga/sandbox.c b/drivers/fpga/sandbox.c
new file mode 100644
index 00..5687efccb1
--- /dev/null
+++ b/drivers/fpga/sandbox.c
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Alexander Dahl
+ */
+
+#include
+
+U_BOOT_DRIVER(sandbox_fpga) = {
+ .name = "sandbox_fpga",
+ .id = UCLASS_FPGA,
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index a432e43871..c2b15881ba 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -56,6 +56,7 @@ enum uclass_id {
UCLASS_ETH, /* Ethernet device */
UCLASS_ETH_PHY, /* Ethernet PHY device */
UCLASS_FIRMWARE,/* Firmware */
+ UCLASS_FPGA,/* FPGA device */
UCLASS_FUZZING_ENGINE, /* Fuzzing engine */
UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */
UCLASS_GPIO,/* Bank of general-purpose I/O pins */
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 7543df8823..666c85f10a 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -47,6 +47,7 @@ ifneq ($(CONFIG_EFI_PARTITION),)
obj-$(CONFIG_FASTBOOT_FLASH_MMC) += fastboot.o
endif
obj-$(CONFIG_FIRMWARE) += firmware.o
+obj-$(CONFIG_DM_FPGA) += fpga.o
obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock.o
obj-$(CONFIG_DM_I2C) += i2c.o
obj-$(CONFIG_SOUND) += i2s.o
diff --git a/test/dm/fpga.c b/test/dm/fpga.c
new file mode 100644
index 00..8d29c8f159
--- /dev/null
+++ b/test/dm/fpga.c
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Alexander Dahl
+ */
+
+#include
+#include
+#include
+#include
+
+static int dm_test_fpga(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+
+ ut_assertok(uclass_get_device(UCLASS_FPGA, 0, &dev));
+
+ return 0;
+}
+
+DM_TEST(dm_test_fpga, UT_TESTF_SCAN_FDT);
base-commit: f117c54cc83e3c519883edb5a48062644d38c443
--
2.30.2
[PATCH] spl: atf: Fix clang -Wasm-operand-widths warning
common/spl/spl_atf.c:187:51: warning: value size does not match register
size specified by the constraint and modifier [-Wasm-operand-widths]
__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
^
common/spl/spl_atf.c:187:34: note: use constraint modifier "w"
__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
^~
%w0
Use %x0 to match what Linux does in write_sysreg().
Signed-off-by: Alistair Delva
Cc: Kever Yang
Cc: Michael Walle
Cc: Simon Glass
Cc: Tom Rini
Cc: Nick Desaulniers
---
common/spl/spl_atf.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index e1b68dd561..bae5c010c8 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -184,7 +184,7 @@ __weak struct bl_params
*bl2_plat_get_bl31_params_v2(uintptr_t bl32_entry,
static inline void raw_write_daif(unsigned int daif)
{
- __asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
+ __asm__ __volatile__("msr DAIF, %x0\n\t" : : "r" (daif) : "memory");
}
typedef void (*atf_entry_t)(struct bl31_params *params, void *plat_params);
--
2.30.2
[PATCH] Makefile: Disable PLATFORM_LIBGCC for LLVM toolchain
The LLVM toolchain does not have or need libgcc, so do not require it to exist on the library path. Even if "-print-libgcc-file-name" returned the empty string, -lgcc would be specified. This leaves CONFIG_USE_PRIVATE_LIBGCC alone because I did not have a target/toolchain combination available for testing. Signed-off-by: Alistair Delva Cc: Simon Glass Cc: Tom Rini Cc: Nick Desaulniers --- Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Makefile b/Makefile index 8af67ebd63..af06b7aa19 100644 --- a/Makefile +++ b/Makefile @@ -874,8 +874,10 @@ u-boot-main := $(libs-y) ifeq ($(CONFIG_USE_PRIVATE_LIBGCC),y) PLATFORM_LIBGCC = arch/$(ARCH)/lib/lib.a else +ifneq ($(cc-name),clang) PLATFORM_LIBGCC := -L $(shell dirname `$(CC) $(c_flags) -print-libgcc-file-name`) -lgcc endif +endif PLATFORM_LIBS += $(PLATFORM_LIBGCC) ifdef CONFIG_CC_COVERAGE -- 2.30.2
[PATCH] Makefile: apply dynamic relocations for LLD
From: Nick Desaulniers It seems that for aarch64, unless we apply dynamic relocations to the location being relocated, we fail to boot. As Fangrui notes: For dynamic relocations using the RELA format (readelf -Wr), GNU ld sets the initial content to r_addend; ld.lld doesn't do that by default (needs --apply-dynamic-relocs). Otherwise .rodata appears to be full of NUL-bytes before relocation, causing crashes when trying to invoke the function pointers in init_sequence_f from initcall_run_list(). Link: https://reviews.llvm.org/D42797 Suggested-by: Fangrui Song Signed-off-by: Nick Desaulniers Signed-off-by: Alistair Delva Cc: Simon Glass Cc: Tom Rini Cc: Nick Desaulniers --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 010ace9d7c..af06b7aa19 100644 --- a/Makefile +++ b/Makefile @@ -1022,7 +1022,7 @@ LDFLAGS_u-boot += $(LDFLAGS_FINAL) LDFLAGS_u-boot += $(call ld-option, --no-dynamic-linker) # ld.lld support -LDFLAGS_u-boot += -z notext +LDFLAGS_u-boot += -z notext $(call ld-option,--apply-dynamic-relocs) LDFLAGS_u-boot += --build-id=none -- 2.30.2
[PATCH] examples: standalone: Fix build with LLVM toolchain
When building the standalone example with llvm, the link step fails: examples/standalone/libstubs.o: In function `dummy': include/_exports.h:10: undefined reference to `jt' include/_exports.h:11: undefined reference to `jt' include/_exports.h:12: undefined reference to `jt' include/_exports.h:13: undefined reference to `jt' include/_exports.h:14: undefined reference to `jt' examples/standalone/libstubs.o:include/_exports.h:15: more undefined references to `jt' follow Indeed, the standalone libstubs.o does use the jt symbol, but it was marked 'static' in stubs.c. It's strange how gcc builds are working. Signed-off-by: Alistair Delva Cc: Rick Chen Cc: Simon Glass Cc: Tom Rini Cc: Nick Desaulniers --- examples/standalone/stubs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c index ce05f41b0c..65115570e8 100644 --- a/examples/standalone/stubs.c +++ b/examples/standalone/stubs.c @@ -14,7 +14,7 @@ struct cmd_tbl; * from flash memory. The global_data address is passed as argv[-1] * to the application program. */ -static struct jt_funcs *jt; +struct jt_funcs *jt; gd_t *global_data; #define EXPORT_FUNC(f, a, x, ...) \ -- 2.30.2
Re: [PATCH 4/4] ARM: dts: imx8m: imx8mm-mx8menlo: Enable SPL SDP support
On Mon, Sep 26, 2022 at 10:12 AM Fabio Estevam wrote: > > Hi Adam, > > On Mon, Sep 26, 2022 at 2:07 PM Adam Ford wrote: > > > Tim, > > > > I have it building successfully now, and it loads over USB. I had to > > disable BD718x7 PMIC children binding which required a small change to > > the PMIC driver [1]. I then removed HS400, HS200 and UHS support in > > SPL. Once I did all that, the code size fit into SPL space. > > > > [1] - > > https://patchwork.ozlabs.org/project/uboot/patch/20220817112403.68144-2-aford...@gmail.com/ > > > > I'll try to push my patch today or tomorrow. I was doing some other > > clean-up, but I might just push that as a small series in itself. > > Ok, great. > > Does "ums 0 mmc 0" work for you if you run it, stop it via CTRL+C and rerun > it? > > On an imx8mm_evk, I get USB errors after the CTRL+C and ums fails to > mount after that. Fabio, I see this failure as well. If I CTRL+C and repeat the ums the attached Linux host shows: [6307703.733810] usb 3-2: new high-speed USB device number 10 using xhci_hcd [6307708.933752] usb 3-2: device descriptor read/64, error -110 [6307714.313724] usb 3-2: device descriptor read/64, error -71 [6307714.549708] usb 3-2: new high-speed USB device number 11 using xhci_hcd [6307719.689650] usb 3-2: device descriptor read/64, error -110 [6307725.061625] usb 3-2: device descriptor read/64, error -71 [6307725.169657] usb usb3-port2: attempt power cycle [6307725.581584] usb 3-2: new high-speed USB device number 12 using xhci_hcd [6307730.825577] xhci_hcd :00:14.0: Timeout while waiting for setup device command [6307731.033614] usb 3-2: Device not responding to setup address. [6307731.241528] usb 3-2: device not accepting address 12, error -71 [6307731.373537] usb 3-2: new high-speed USB device number 13 using xhci_hcd [6307736.453499] xhci_hcd :00:14.0: Timeout while waiting for setup device command [6307736.665545] usb 3-2: Device not responding to setup address. [6307736.873482] usb 3-2: device not accepting address 13, error -71 [6307736.873589] usb usb3-port2: unable to enumerate USB device Best Regards, Tim
Re: [PATCH v3 2/3] arm: dts: am335x-sancloud-bbe-lite: UEFI SPI export
On Mon, Sep 26, 2022 at 03:33:44PM +0200, Heinrich Schuchardt wrote:
> On 9/26/22 15:13, Tom Rini wrote:
> > On Mon, Sep 26, 2022 at 02:33:23PM +0300, Ilias Apalodimas wrote:
> > > Hi Tom
> > >
> > > On Wed, 21 Sept 2022 at 19:15, Tom Rini wrote:
> > > >
> > > > On Wed, Sep 21, 2022 at 05:06:27PM +0100, Paul Barker wrote:
> > > > > Add properties to the Authenta SPI flash device node to enable access
> > > > > by
> > > > > a UEFI application using a fixed GUID. Also specify that this device
> > > > > is
> > > > > JEDEC compatible so that it is correctly initialized when running
> > > > > `sf probe`.
> > > > >
> > > > > Signed-off-by: Paul Barker
> > > > > ---
> > > > > arch/arm/dts/am335x-sancloud-bbe-lite.dts | 10 --
> > > > > 1 file changed, 8 insertions(+), 2 deletions(-)
> > > > >
> > > > > diff --git a/arch/arm/dts/am335x-sancloud-bbe-lite.dts
> > > > > b/arch/arm/dts/am335x-sancloud-bbe-lite.dts
> > > > > index d6ef19311a91..f1ff9d6024cb 100644
> > > > > --- a/arch/arm/dts/am335x-sancloud-bbe-lite.dts
> > > > > +++ b/arch/arm/dts/am335x-sancloud-bbe-lite.dts
> > > > > @@ -37,14 +37,20 @@
> > > > >pinctrl-names = "default";
> > > > >pinctrl-0 = <&bb_spi0_pins>;
> > > > >
> > > > > - channel@0 {
> > > > > + authenta-flash@0 {
> > > > >#address-cells = <1>;
> > > > >#size-cells = <0>;
> > > > >
> > > > > - compatible = "micron,spi-authenta";
> > > > > + compatible = "micron,spi-authenta", "jedec,spi-nor";
> > > > >
> > > > >reg = <0>;
> > > > >spi-max-frequency = <1600>;
> > > > >spi-cpha;
> > > > > +
> > > > > + uefi-spi-vendor = "micron";
> > > > > + uefi-spi-part-number = "mt25ql128abb";
> > > > > + /* GUID in UEFI format:
> > > > > 77126730-a4ca-4386-b341-881fe18e7f7d */
> > > > > + uefi-spi-io-guid = [30 67 12 77 ca a4 86 43
> > > > > + b3 41 88 1f e1 8e 7f 7d];
> > > > >};
> > > > > };
> > > >
> > > > Are we far enough along with part one of this series to talk about
> > > > getting these properties in the upstream binding document now?
> > >
> > > You mean those bindings being part of the DT spec?
> >
> > Yes, getting these added to
> > Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml in the kernel.
> >
>
> There is a related patch
> [PATCH] dt-bindings: spi: Add YAML DT binding document for trivial devices
> https://lore.kernel.org/all/20220407194936.223041-1-ma...@denx.de/
> that didn't make it into the kernel yet.
OK, but would that be a better way forward for this?
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH 5/5] fwu: DeveloperBox: add support for FWU
On Thu, 1 Sept 2022 at 02:28, Heinrich Schuchardt wrote:
> > On 7/22/22 19:43, jassisinghb...@gmail.com wrote:
> >> diff --git a/board/socionext/developerbox/developerbox.c
> >> b/board/socionext/developerbox/developerbox.c
> >> index f5a5fe0121..ad2260e3d7 100644
> >> --- a/board/socionext/developerbox/developerbox.c
> >> +++ b/board/socionext/developerbox/developerbox.c
> >> @@ -20,6 +20,13 @@
> >>
> >> #if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
> >> struct efi_fw_image fw_images[] = {
> >> +#if defined(CONFIG_FWU_MULTI_BANK_UPDATE)
> >> +{
> >> +.image_type_id = DEVELOPERBOX_FIP_IMAGE_GUID,
> >> +.fw_name = u"DEVELOPERBOX-FIP",
> >
> > The design is flawed. These fields should be moved to the device-tree.
>
> Currently we are changing C files for each board were we enable firmware
> updates. Probably an even better place then the device-tree would be a
> Kconfig file. The only problem with Kconfig is that it does not easily
> allow to edit arrays. But we could use a string like:
>
> GUID,name,index,GUID,name,index,...
>
Probably. But there already exists the structure that this patch only
adds an entry to. Moving that structure into dt or kconfig should be a
separate task of different context.
Also right now I don't want to diverge from gpt based STM's
implementation which does the same thing.
thanks
Re: [PATCH 4/4] ARM: dts: imx8m: imx8mm-mx8menlo: Enable SPL SDP support
On 9/26/22 1:28 PM, Adam Ford wrote: > On Mon, Sep 26, 2022 at 12:12 PM Fabio Estevam wrote: >> >> Hi Adam, >> >> On Mon, Sep 26, 2022 at 2:07 PM Adam Ford wrote: >> >> > Tim, >> > >> > I have it building successfully now, and it loads over USB. I had to >> > disable BD718x7 PMIC children binding which required a small change to >> > the PMIC driver [1]. I then removed HS400, HS200 and UHS support in >> > SPL. Once I did all that, the code size fit into SPL space. >> > >> > [1] - >> > https://patchwork.ozlabs.org/project/uboot/patch/20220817112403.68144-2-aford...@gmail.com/ >> > >> > I'll try to push my patch today or tomorrow. I was doing some other >> > clean-up, but I might just push that as a small series in itself. >> >> Ok, great. >> >> Does "ums 0 mmc 0" work for you if you run it, stop it via CTRL+C and rerun >> it? >> > > I didn't try UMS. I was going to investigate Fastboot, but I'll give > it try this week. IMO UMS is the most convenient for development. It does require access to the console to hit ctrl-c, whereas you can control booting/rebooting with fastboot (making it nicer for production or for in-field repair). I have found that both fastboot and UMS are far nice to use than SDP. --Sean >> On an imx8mm_evk, I get USB errors after the CTRL+C and ums fails to >> mount after that. > > Do you need to do a USB reset or anything? > > adam >
Re: [PATCH 4/4] ARM: dts: imx8m: imx8mm-mx8menlo: Enable SPL SDP support
On Mon, Sep 26, 2022 at 12:12 PM Fabio Estevam wrote: > > Hi Adam, > > On Mon, Sep 26, 2022 at 2:07 PM Adam Ford wrote: > > > Tim, > > > > I have it building successfully now, and it loads over USB. I had to > > disable BD718x7 PMIC children binding which required a small change to > > the PMIC driver [1]. I then removed HS400, HS200 and UHS support in > > SPL. Once I did all that, the code size fit into SPL space. > > > > [1] - > > https://patchwork.ozlabs.org/project/uboot/patch/20220817112403.68144-2-aford...@gmail.com/ > > > > I'll try to push my patch today or tomorrow. I was doing some other > > clean-up, but I might just push that as a small series in itself. > > Ok, great. > > Does "ums 0 mmc 0" work for you if you run it, stop it via CTRL+C and rerun > it? > I didn't try UMS. I was going to investigate Fastboot, but I'll give it try this week. > On an imx8mm_evk, I get USB errors after the CTRL+C and ums fails to > mount after that. Do you need to do a USB reset or anything? adam
Re: [PATCH 4/4] ARM: dts: imx8m: imx8mm-mx8menlo: Enable SPL SDP support
On Mon, Sep 26, 2022 at 10:06 AM Adam Ford wrote: > > On Mon, Sep 26, 2022 at 11:59 AM Tim Harvey wrote: > > > > On Sat, Sep 24, 2022, 2:54 PM Adam Ford wrote: > > > > > > On Sat, Sep 24, 2022 at 4:47 PM Marek Vasut wrote: > > > > > > > > On 9/24/22 21:10, Adam Ford wrote: > > > > > > > > Hi, > > > > > > > > [...] > > > > > > > > > I am using the Mainline with the aarch64 gcc from Ubuntu 22.04. I am > > > > > over by ~1100 bytes with LTO enabled, but I'm going through my SPL > > > > > drivers to see what I can either remove or reduce functionality. > > > > > > > > Try > > > > > > > > $ aarch64...readelf -s spl/u-boot-spl | sort -nk 3 > > > > > > > > That should give you a list of large symbols you might want to inspect. > > > > > > Thank you! > > > > > > > Adam, > > > > I'm curious what you find as my SPL for imx8mm_venice_defconfig also > > overflows by about 3K when enabling what's needed here for SDP as > > well. I have 4 different dram configs which are chewing up about 1K > > each. > > Tim, > > I have it building successfully now, and it loads over USB. I had to > disable BD718x7 PMIC children binding which required a small change to > the PMIC driver [1]. I then removed HS400, HS200 and UHS support in > SPL. Once I did all that, the code size fit into SPL space. > > [1] - > https://patchwork.ozlabs.org/project/uboot/patch/20220817112403.68144-2-aford...@gmail.com/ > > I'll try to push my patch today or tomorrow. I was doing some other > clean-up, but I might just push that as a small series in itself. > Adam, Yes, I have already done those same things for imx8mm_venice but am still 3K over due to my 4x dram configs. Each dram config must be about 3K as I only have to remove one of them to successfully build. Thanks, Tim
Re: [PATCH 4/4] ARM: dts: imx8m: imx8mm-mx8menlo: Enable SPL SDP support
Hi Adam, On Mon, Sep 26, 2022 at 2:07 PM Adam Ford wrote: > Tim, > > I have it building successfully now, and it loads over USB. I had to > disable BD718x7 PMIC children binding which required a small change to > the PMIC driver [1]. I then removed HS400, HS200 and UHS support in > SPL. Once I did all that, the code size fit into SPL space. > > [1] - > https://patchwork.ozlabs.org/project/uboot/patch/20220817112403.68144-2-aford...@gmail.com/ > > I'll try to push my patch today or tomorrow. I was doing some other > clean-up, but I might just push that as a small series in itself. Ok, great. Does "ums 0 mmc 0" work for you if you run it, stop it via CTRL+C and rerun it? On an imx8mm_evk, I get USB errors after the CTRL+C and ums fails to mount after that.
Re: [PATCH 4/4] ARM: dts: imx8m: imx8mm-mx8menlo: Enable SPL SDP support
On Mon, Sep 26, 2022 at 11:59 AM Tim Harvey wrote: > > On Sat, Sep 24, 2022, 2:54 PM Adam Ford wrote: > > > > On Sat, Sep 24, 2022 at 4:47 PM Marek Vasut wrote: > > > > > > On 9/24/22 21:10, Adam Ford wrote: > > > > > > Hi, > > > > > > [...] > > > > > > > I am using the Mainline with the aarch64 gcc from Ubuntu 22.04. I am > > > > over by ~1100 bytes with LTO enabled, but I'm going through my SPL > > > > drivers to see what I can either remove or reduce functionality. > > > > > > Try > > > > > > $ aarch64...readelf -s spl/u-boot-spl | sort -nk 3 > > > > > > That should give you a list of large symbols you might want to inspect. > > > > Thank you! > > > > Adam, > > I'm curious what you find as my SPL for imx8mm_venice_defconfig also > overflows by about 3K when enabling what's needed here for SDP as > well. I have 4 different dram configs which are chewing up about 1K > each. Tim, I have it building successfully now, and it loads over USB. I had to disable BD718x7 PMIC children binding which required a small change to the PMIC driver [1]. I then removed HS400, HS200 and UHS support in SPL. Once I did all that, the code size fit into SPL space. [1] - https://patchwork.ozlabs.org/project/uboot/patch/20220817112403.68144-2-aford...@gmail.com/ I'll try to push my patch today or tomorrow. I was doing some other clean-up, but I might just push that as a small series in itself. adam > > Best Regards, > > Tim
Re: [PATCH 4/4] ARM: dts: imx8m: imx8mm-mx8menlo: Enable SPL SDP support
On Sat, Sep 24, 2022, 2:54 PM Adam Ford wrote: > > On Sat, Sep 24, 2022 at 4:47 PM Marek Vasut wrote: > > > > On 9/24/22 21:10, Adam Ford wrote: > > > > Hi, > > > > [...] > > > > > I am using the Mainline with the aarch64 gcc from Ubuntu 22.04. I am > > > over by ~1100 bytes with LTO enabled, but I'm going through my SPL > > > drivers to see what I can either remove or reduce functionality. > > > > Try > > > > $ aarch64...readelf -s spl/u-boot-spl | sort -nk 3 > > > > That should give you a list of large symbols you might want to inspect. > > Thank you! > Adam, I'm curious what you find as my SPL for imx8mm_venice_defconfig also overflows by about 3K when enabling what's needed here for SDP as well. I have 4 different dram configs which are chewing up about 1K each. Best Regards, Tim
[PATCH] ARM: dts: stm32: Add DHCOR based Testbench board
Add DT for DHCOR Testbench board, which is a testbench for testing of
DHCOR SoM during manufacturing. This is effectively a trimmed down
version of AV96 board with CSI-2 bridge, HDMI bridge, WiFi, Audio and
LEDs removed and used as GPIOs instead. Furthermore, the PMIC Buck3
is always configured from PMIC NVM to cater for both 1V8 and 3V3 SoM
variant.
Signed-off-by: Marek Vasut
Cc: Patrice Chotard
Cc: Patrick Delaunay
---
arch/arm/dts/Makefile | 3 +-
.../stm32mp15xx-dhcor-testbench-u-boot.dtsi | 100 ++
arch/arm/dts/stm32mp15xx-dhcor-testbench.dts | 178 ++
board/dhelectronics/dh_stm32mp1/board.c | 40 ++--
.../dh_stm32mp1/u-boot-dhcor.its | 21 ++-
5 files changed, 325 insertions(+), 17 deletions(-)
create mode 100644 arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi
create mode 100644 arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 965895bc2a3..4a2c0de74a0 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1201,7 +1201,8 @@ dtb-$(CONFIG_STM32MP15x) += \
stm32mp15xx-dhcom-pdk2.dtb \
stm32mp15xx-dhcom-picoitx.dtb \
stm32mp15xx-dhcor-avenger96.dtb \
- stm32mp15xx-dhcor-drc-compact.dtb
+ stm32mp15xx-dhcor-drc-compact.dtb \
+ stm32mp15xx-dhcor-testbench.dtb
dtb-$(CONFIG_SOC_K3_AM654) += \
k3-am654-base-board.dtb \
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi
b/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi
new file mode 100644
index 000..5b051b8ac45
--- /dev/null
+++ b/arch/arm/dts/stm32mp15xx-dhcor-testbench-u-boot.dtsi
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2022 Marek Vasut
+ */
+
+#include "stm32mp15xx-dhcor-u-boot.dtsi"
+
+/ {
+ aliases {
+ mmc0 = &sdmmc1;
+ mmc1 = &sdmmc2;
+ usb0 = &usbotg_hs;
+ };
+
+ config {
+ dh,board-coding-gpios = <&gpiog 13 0>, <&gpiod 9 0>;
+ };
+};
+
+ðernet0 {
+ phy-reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
+
+ mdio0 {
+ ethernet-phy@7 {
+ reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <11000>;
+ reset-deassert-us = <1000>;
+ };
+ };
+};
+
+&sdmmc1 {
+ u-boot,dm-spl;
+ st,use-ckin;
+ st,cmd-gpios = <&gpiod 2 0>;
+ st,ck-gpios = <&gpioc 12 0>;
+ st,ckin-gpios = <&gpioe 4 0>;
+};
+
+&sdmmc1_b4_pins_a {
+ u-boot,dm-spl;
+ pins1 {
+ u-boot,dm-spl;
+ };
+ pins2 {
+ u-boot,dm-spl;
+ };
+};
+
+&sdmmc1_dir_pins_b {
+ u-boot,dm-spl;
+ pins1 {
+ u-boot,dm-spl;
+ };
+ pins2 {
+ u-boot,dm-spl;
+ };
+};
+
+&sdmmc2 {
+ u-boot,dm-spl;
+};
+
+&sdmmc2_b4_pins_a {
+ u-boot,dm-spl;
+ pins1 {
+ u-boot,dm-spl;
+ };
+ pins2 {
+ u-boot,dm-spl;
+ };
+};
+
+&sdmmc2_d47_pins_c {
+ u-boot,dm-spl;
+ pins {
+ u-boot,dm-spl;
+ };
+};
+
+&uart4 {
+ u-boot,dm-pre-reloc;
+};
+
+&uart4_pins_b {
+ u-boot,dm-pre-reloc;
+ pins1 {
+ u-boot,dm-pre-reloc;
+ };
+ pins2 {
+ u-boot,dm-pre-reloc;
+ /delete-property/ bias-disable;
+ bias-pull-up;
+ };
+};
+
+&usbotg_hs {
+ u-boot,force-b-session-valid;
+ hnp-srp-disable;
+};
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
b/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
new file mode 100644
index 000..c9163e1c028
--- /dev/null
+++ b/arch/arm/dts/stm32mp15xx-dhcor-testbench.dts
@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) 2022 Marek Vasut
+ */
+/dts-v1/;
+
+#include "stm32mp151.dtsi"
+#include "stm32mp15xx-dhcor-som.dtsi"
+
+/ {
+ model = "DH electronics STM32MP15xx DHCOR Testbench";
+ compatible = "dh,stm32mp15xx-dhcor-testbench", "st,stm32mp1xx";
+
+ aliases {
+ ethernet0 = ðernet0;
+ mmc0 = &sdmmc1;
+ mmc1 = &sdmmc2;
+ serial0 = &uart4;
+ serial1 = &uart7;
+ spi0 = &qspi;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ sd_switch: regulator-sd_switch {
+ compatible = "regulator-gpio";
+ regulator-name = "sd_switch";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <290>;
+ regulator-type = "voltage";
+ regulator-always-on;
+
+ gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0>;
+ states = <180 0x1>,
+<290 0x0>;
+ };
+}
[PATCH] arm64: layerscape: Support SYSRESET
CONFIG_SYSRESET provides its own implementation of reset_cpu. Disable our version when it is enabled. Signed-off-by: Sean Anderson --- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index c989a43cbeb..487c0ed5539 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -1229,6 +1229,7 @@ int timer_init(void) return 0; } +#if !CONFIG_IS_ENABLED(SYSRESET) __efi_runtime_data u32 __iomem *rstcr = (u32 *)CONFIG_SYS_FSL_RST_ADDR; void __efi_runtime reset_cpu(void) @@ -1248,6 +1249,7 @@ void __efi_runtime reset_cpu(void) scfg_out32(rstcr, val); #endif } +#endif #if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_PSCI_RESET) -- 2.35.1.1320.gc452695387.dirty
[PATCH] ARM: dts: stm32: Drop extra newline from AV96 U-Boot extras DT
Remove duplicate newline, no functional change.
Signed-off-by: Marek Vasut
Cc: Patrice Chotard
Cc: Patrick Delaunay
---
arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
index b6fceb9ad58..6dee51dc1c2 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
@@ -19,7 +19,6 @@
};
};
-
ðernet0 {
phy-reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
--
2.35.1
[PATCH] ARM: stm32: Enable btrfs support on DHSOM
The btrfs filesystem provides advanced functionality like copy-on-write and snapshots, as well as metadata and data duplication and checksumming. Enable btrfs in U-Boot to permit even the primary partition to be btrfs and let system boot from it. Signed-off-by: Marek Vasut --- configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index f47e70be44a..67e238af3a1 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -79,6 +79,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y +CONFIG_CMD_BTRFS=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=nor0" diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 02cce50691e..a630713f926 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -77,6 +77,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y +CONFIG_CMD_BTRFS=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=nor0" -- 2.35.1
[PATCH 4/4] clk-imx8mm: Only build QSPI clocks when CONFIG_NXP_FSPI=y
The QSPI clocks are only used when CONFIG_NXP_FSPI=y, so only build the
QSPI clocks in this case to reduce the final SPL binary size.
Signed-off-by: Fabio Estevam
---
drivers/clk/imx/clk-imx8mm.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index b6a289b01d..b5c253e496 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -86,8 +86,10 @@ static const char *imx8mm_wdog_sels[] = {"clock-osc-24m",
"sys_pll1_133m", "sys_
static const char *imx8mm_usdhc3_sels[] = {"clock-osc-24m", "sys_pll1_400m",
"sys_pll1_800m", "sys_pll2_500m",
"sys_pll3_out", "sys_pll1_266m",
"audio_pll2_clk", "sys_pll1_100m", };
+#if CONFIG_IS_ENABLED(NXP_FSPI)
static const char *imx8mm_qspi_sels[] = {"clock-osc-24m", "sys_pll1_400m",
"sys_pll2_333m", "sys_pll2_500m",
"audio_pll2_out", "sys_pll1_266m",
"sys_pll3_out", "sys_pll1_100m", };
+#endif
static const char *imx8mm_usb_core_sels[] = {"clock-osc-24m", "sys_pll1_100m",
"sys_pll1_40m", "sys_pll2_100m",
"sys_pll2_200m", "clk_ext2",
"clk_ext3", "audio_pll2_out", };
@@ -273,8 +275,6 @@ static int imx8mm_clk_probe(struct udevice *dev)
clk_dm(IMX8MM_CLK_USDHC3,
imx8m_clk_composite("usdhc3", imx8mm_usdhc3_sels,
base + 0xbc80));
- clk_dm(IMX8MM_CLK_QSPI,
- imx8m_clk_composite("qspi", imx8mm_qspi_sels, base + 0xab80));
clk_dm(IMX8MM_CLK_USB_CORE_REF,
imx8m_clk_composite("usb_core_ref", imx8mm_usb_core_sels, base
+ 0xb100));
clk_dm(IMX8MM_CLK_USB_PHY_REF,
@@ -301,8 +301,6 @@ static int imx8mm_clk_probe(struct udevice *dev)
imx_clk_gate4("wdog3_root_clk", "wdog", base + 0x4550, 0));
clk_dm(IMX8MM_CLK_USDHC3_ROOT,
imx_clk_gate4("usdhc3_root_clk", "usdhc3", base + 0x45e0, 0));
- clk_dm(IMX8MM_CLK_QSPI_ROOT,
- imx_clk_gate4("qspi_root_clk", "qspi", base + 0x42f0, 0));
clk_dm(IMX8MM_CLK_USB1_CTRL_ROOT,
imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0,
0));
@@ -357,6 +355,13 @@ static int imx8mm_clk_probe(struct udevice *dev)
imx_clk_gate4("ecspi3_root_clk", "ecspi3", base + 0x4090, 0));
#endif
+#if CONFIG_IS_ENABLED(NXP_FSPI)
+ clk_dm(IMX8MM_CLK_QSPI,
+ imx8m_clk_composite("qspi", imx8mm_qspi_sels, base + 0xab80));
+ clk_dm(IMX8MM_CLK_QSPI_ROOT,
+ imx_clk_gate4("qspi_root_clk", "qspi", base + 0x42f0, 0));
+#endif
+
return 0;
}
--
2.25.1
[PATCH 3/4] clk-imx8mm: Only build ecspi clocks when CONFIG_DM_SPI=y
The ecspi clocks are only used when CONFIG_DM_SPI=y, so only build the
ecspi clocks in this case to reduce the final SPL binary size.
Signed-off-by: Fabio Estevam
---
drivers/clk/imx/clk-imx8mm.c | 31 ++-
1 file changed, 18 insertions(+), 13 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index 286915982c..b6a289b01d 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -95,6 +95,7 @@ static const char *imx8mm_usb_core_sels[] = {"clock-osc-24m",
"sys_pll1_100m", "
static const char *imx8mm_usb_phy_sels[] = {"clock-osc-24m", "sys_pll1_100m",
"sys_pll1_40m", "sys_pll2_100m",
"sys_pll2_200m", "clk_ext2",
"clk_ext3", "audio_pll2_out", };
+#if CONFIG_IS_ENABLED(DM_SPI)
static const char *imx8mm_ecspi1_sels[] = {"clock-osc-24m", "sys_pll2_200m",
"sys_pll1_40m", "sys_pll1_160m",
"sys_pll1_800m", "sys_pll3_out",
"sys_pll2_250m", "audio_pll2_out", };
@@ -103,6 +104,7 @@ static const char *imx8mm_ecspi2_sels[] = {"clock-osc-24m",
"sys_pll2_200m", "sy
static const char *imx8mm_ecspi3_sels[] = {"clock-osc-24m", "sys_pll2_200m",
"sys_pll1_40m", "sys_pll1_160m",
"sys_pll1_800m", "sys_pll3_out",
"sys_pll2_250m", "audio_pll2_out", };
+#endif
static int imx8mm_clk_probe(struct udevice *dev)
{
@@ -277,19 +279,6 @@ static int imx8mm_clk_probe(struct udevice *dev)
imx8m_clk_composite("usb_core_ref", imx8mm_usb_core_sels, base
+ 0xb100));
clk_dm(IMX8MM_CLK_USB_PHY_REF,
imx8m_clk_composite("usb_phy_ref", imx8mm_usb_phy_sels, base +
0xb180));
- clk_dm(IMX8MM_CLK_ECSPI1,
- imx8m_clk_composite("ecspi1", imx8mm_ecspi1_sels, base +
0xb280));
- clk_dm(IMX8MM_CLK_ECSPI2,
- imx8m_clk_composite("ecspi2", imx8mm_ecspi2_sels, base +
0xb300));
- clk_dm(IMX8MM_CLK_ECSPI3,
- imx8m_clk_composite("ecspi3", imx8mm_ecspi3_sels, base +
0xc180));
-
- clk_dm(IMX8MM_CLK_ECSPI1_ROOT,
- imx_clk_gate4("ecspi1_root_clk", "ecspi1", base + 0x4070, 0));
- clk_dm(IMX8MM_CLK_ECSPI2_ROOT,
- imx_clk_gate4("ecspi2_root_clk", "ecspi2", base + 0x4080, 0));
- clk_dm(IMX8MM_CLK_ECSPI3_ROOT,
- imx_clk_gate4("ecspi3_root_clk", "ecspi3", base + 0x4090, 0));
clk_dm(IMX8MM_CLK_I2C1_ROOT,
imx_clk_gate4("i2c1_root_clk", "i2c1", base + 0x4170, 0));
clk_dm(IMX8MM_CLK_I2C2_ROOT,
@@ -352,6 +341,22 @@ static int imx8mm_clk_probe(struct udevice *dev)
imx_clk_gate4("pwm4_root_clk", "pwm4", base + 0x42b0, 0));
#endif
+#if CONFIG_IS_ENABLED(DM_SPI)
+ clk_dm(IMX8MM_CLK_ECSPI1,
+ imx8m_clk_composite("ecspi1", imx8mm_ecspi1_sels, base +
0xb280));
+ clk_dm(IMX8MM_CLK_ECSPI2,
+ imx8m_clk_composite("ecspi2", imx8mm_ecspi2_sels, base +
0xb300));
+ clk_dm(IMX8MM_CLK_ECSPI3,
+ imx8m_clk_composite("ecspi3", imx8mm_ecspi3_sels, base +
0xc180));
+
+ clk_dm(IMX8MM_CLK_ECSPI1_ROOT,
+ imx_clk_gate4("ecspi1_root_clk", "ecspi1", base + 0x4070, 0));
+ clk_dm(IMX8MM_CLK_ECSPI2_ROOT,
+ imx_clk_gate4("ecspi2_root_clk", "ecspi2", base + 0x4080, 0));
+ clk_dm(IMX8MM_CLK_ECSPI3_ROOT,
+ imx_clk_gate4("ecspi3_root_clk", "ecspi3", base + 0x4090, 0));
+#endif
+
return 0;
}
--
2.25.1
[PATCH 2/4] clk-imx8mm: Move CLK_ENET_AXI to the non-SPL section
Ethernet is not used inside SPL, so move the IMX8MM_CLK_ENET_AXI clock
inside the non-SPL block to reduce the final SPL binary size.
Signed-off-by: Fabio Estevam
---
drivers/clk/imx/clk-imx8mm.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index 0d7891f11a..286915982c 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -28,10 +28,10 @@ static const char *imx8mm_a53_sels[] = {"clock-osc-24m",
"arm_pll_out", "sys_pll
static const char *imx8mm_ahb_sels[] = {"clock-osc-24m", "sys_pll1_133m",
"sys_pll1_800m", "sys_pll1_400m",
"sys_pll2_125m", "sys_pll3_out",
"audio_pll1_out", "video_pll1_out", };
+#ifndef CONFIG_SPL_BUILD
static const char *imx8mm_enet_axi_sels[] = {"clock-osc-24m", "sys_pll1_266m",
"sys_pll1_800m", "sys_pll2_250m",
"sys_pll2_200m", "audio_pll1_out",
"video_pll1_out", "sys_pll3_out", };
-#ifndef CONFIG_SPL_BUILD
static const char *imx8mm_enet_ref_sels[] = {"clock-osc-24m", "sys_pll2_125m",
"sys_pll2_50m", "sys_pll2_100m",
"sys_pll1_160m", "audio_pll1_out",
"video_pll1_out", "clk_ext4", };
@@ -244,9 +244,6 @@ static int imx8mm_clk_probe(struct udevice *dev)
clk_dm(IMX8MM_CLK_IPG_ROOT,
imx_clk_divider2("ipg_root", "ahb", base + 0x9080, 0, 1));
- clk_dm(IMX8MM_CLK_ENET_AXI,
- imx8m_clk_composite("enet_axi", imx8mm_enet_axi_sels,
- base + 0x8880));
clk_dm(IMX8MM_CLK_NAND_USDHC_BUS,
imx8m_clk_composite_critical("nand_usdhc_bus",
imx8mm_nand_usdhc_sels,
@@ -322,6 +319,9 @@ static int imx8mm_clk_probe(struct udevice *dev)
/* clks not needed in SPL stage */
#ifndef CONFIG_SPL_BUILD
+ clk_dm(IMX8MM_CLK_ENET_AXI,
+ imx8m_clk_composite("enet_axi", imx8mm_enet_axi_sels,
+ base + 0x8880));
clk_dm(IMX8MM_CLK_ENET_REF,
imx8m_clk_composite("enet_ref", imx8mm_enet_ref_sels,
base + 0xa980));
--
2.25.1
[PATCH 1/4] clk-imx8mm: Only build PWM clocks in non-SPL code
PWM is not used inside SPL, so do not define the PWM clocks inside
SPL to reduce the final SPL binary size.
Signed-off-by: Fabio Estevam
---
drivers/clk/imx/clk-imx8mm.c | 34 ++
1 file changed, 18 insertions(+), 16 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index 542aa31f7a..0d7891f11a 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -66,6 +66,7 @@ static const char *imx8mm_i2c3_sels[] = {"clock-osc-24m",
"sys_pll1_160m", "sys_
static const char *imx8mm_i2c4_sels[] = {"clock-osc-24m", "sys_pll1_160m",
"sys_pll2_50m", "sys_pll3_out", "audio_pll1_out",
"video_pll1_out", "audio_pll2_out",
"sys_pll1_133m", };
+#ifndef CONFIG_SPL_BUILD
static const char *imx8mm_pwm1_sels[] = {"clock-osc-24m", "sys_pll2_100m",
"sys_pll1_160m", "sys_pll1_40m",
"sys_pll3_out", "clk_ext1",
"sys_pll1_80m", "video_pll1_out", };
@@ -77,6 +78,7 @@ static const char *imx8mm_pwm3_sels[] = {"clock-osc-24m",
"sys_pll2_100m", "sys_
static const char *imx8mm_pwm4_sels[] = {"clock-osc-24m", "sys_pll2_100m",
"sys_pll1_160m", "sys_pll1_40m",
"sys_pll3_out", "clk_ext2",
"sys_pll1_80m", "video_pll1_out", };
+#endif
static const char *imx8mm_wdog_sels[] = {"clock-osc-24m", "sys_pll1_133m",
"sys_pll1_160m", "vpu_pll_out",
"sys_pll2_125m", "sys_pll3_out",
"sys_pll1_80m", "sys_pll2_166m", };
@@ -267,14 +269,6 @@ static int imx8mm_clk_probe(struct udevice *dev)
imx8m_clk_composite("i2c3", imx8mm_i2c3_sels, base + 0xae00));
clk_dm(IMX8MM_CLK_I2C4,
imx8m_clk_composite("i2c4", imx8mm_i2c4_sels, base + 0xae80));
- clk_dm(IMX8MM_CLK_PWM1,
- imx8m_clk_composite("pwm1", imx8mm_pwm1_sels, base + 0xb380));
- clk_dm(IMX8MM_CLK_PWM2,
- imx8m_clk_composite("pwm2", imx8mm_pwm2_sels, base + 0xb400));
- clk_dm(IMX8MM_CLK_PWM3,
- imx8m_clk_composite("pwm3", imx8mm_pwm3_sels, base + 0xb480));
- clk_dm(IMX8MM_CLK_PWM4,
- imx8m_clk_composite("pwm4", imx8mm_pwm4_sels, base + 0xb500));
clk_dm(IMX8MM_CLK_WDOG,
imx8m_clk_composite("wdog", imx8mm_wdog_sels, base + 0xb900));
clk_dm(IMX8MM_CLK_USDHC3,
@@ -309,14 +303,6 @@ static int imx8mm_clk_probe(struct udevice *dev)
imx_clk_gate4("i2c4_root_clk", "i2c4", base + 0x41a0, 0));
clk_dm(IMX8MM_CLK_OCOTP_ROOT,
imx_clk_gate4("ocotp_root_clk", "ipg_root", base + 0x4220, 0));
- clk_dm(IMX8MM_CLK_PWM1_ROOT,
- imx_clk_gate4("pwm1_root_clk", "pwm1", base + 0x4280, 0));
- clk_dm(IMX8MM_CLK_PWM2_ROOT,
- imx_clk_gate4("pwm2_root_clk", "pwm2", base + 0x4290, 0));
- clk_dm(IMX8MM_CLK_PWM3_ROOT,
- imx_clk_gate4("pwm3_root_clk", "pwm3", base + 0x42a0, 0));
- clk_dm(IMX8MM_CLK_PWM4_ROOT,
- imx_clk_gate4("pwm4_root_clk", "pwm4", base + 0x42b0, 0));
clk_dm(IMX8MM_CLK_USDHC1_ROOT,
imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0));
clk_dm(IMX8MM_CLK_USDHC2_ROOT,
@@ -348,6 +334,22 @@ static int imx8mm_clk_probe(struct udevice *dev)
clk_dm(IMX8MM_CLK_ENET1_ROOT,
imx_clk_gate4("enet1_root_clk", "enet_axi",
base + 0x40a0, 0));
+ clk_dm(IMX8MM_CLK_PWM1,
+ imx8m_clk_composite("pwm1", imx8mm_pwm1_sels, base + 0xb380));
+ clk_dm(IMX8MM_CLK_PWM2,
+ imx8m_clk_composite("pwm2", imx8mm_pwm2_sels, base + 0xb400));
+ clk_dm(IMX8MM_CLK_PWM3,
+ imx8m_clk_composite("pwm3", imx8mm_pwm3_sels, base + 0xb480));
+ clk_dm(IMX8MM_CLK_PWM4,
+ imx8m_clk_composite("pwm4", imx8mm_pwm4_sels, base + 0xb500));
+ clk_dm(IMX8MM_CLK_PWM1_ROOT,
+ imx_clk_gate4("pwm1_root_clk", "pwm1", base + 0x4280, 0));
+ clk_dm(IMX8MM_CLK_PWM2_ROOT,
+ imx_clk_gate4("pwm2_root_clk", "pwm2", base + 0x4290, 0));
+ clk_dm(IMX8MM_CLK_PWM3_ROOT,
+ imx_clk_gate4("pwm3_root_clk", "pwm3", base + 0x42a0, 0));
+ clk_dm(IMX8MM_CLK_PWM4_ROOT,
+ imx_clk_gate4("pwm4_root_clk", "pwm4", base + 0x42b0, 0));
#endif
return 0;
--
2.25.1
[PATCH 0/4] clk-imx8mm: Reduce SPL binary size
Reduce the SPL binary size by building some clocks only for the non-SPL case, such as Ethernet and PWM and by also building ECSPI and QSPI when their respective drivers are enabled. On a imx8mm_evk_defconfig the following SPL binary reduction was observed. Prior to this series: $ aarch64-linux-gnu-readelf -s spl/u-boot-spl | sort -nk 3 | grep imx8mm_clk_probe 766: 007f34c8 4100 FUNCLOCAL DEFAULT1 imx8mm_clk_probe After this series: $ aarch64-linux-gnu-readelf -s spl/u-boot-spl | sort -nk 3 | grep imx8mm_clk_probe 766: 007f34c8 3316 FUNCLOCAL DEFAULT1 imx8mm_clk_probe Total reduction: 4100 - 3316 = 784 bytes. Fabio Estevam (4): clk-imx8mm: Only build PWM clocks in non-SPL code clk-imx8mm: Move CLK_ENET_AXI to the non-SPL section clk-imx8mm: Only build ecspi clocks when CONFIG_DM_SPI=y clk-imx8mm: Only build QSPI clocks when CONFIG_NXP_FSPI=y drivers/clk/imx/clk-imx8mm.c | 86 1 file changed, 49 insertions(+), 37 deletions(-) -- 2.25.1
[PATCH] configs: increase SYS_MALLOC_F_LEN for STM32 MCU's board
Some STM32 MCU's board need their SYS_MALLOC_F_LEN value enlarged to avoid the "alloc space exhausted" error message during their boot process. Use the default SYS_MALLOC_F_LEN value which is set to 0x2000 in Kconfig. Signed-off-by: Patrice Chotard --- configs/stm32746g-eval_defconfig | 1 - configs/stm32746g-eval_spl_defconfig | 1 - configs/stm32f429-discovery_defconfig | 1 - configs/stm32f429-evaluation_defconfig | 1 - configs/stm32f469-discovery_defconfig | 1 - configs/stm32f746-disco_defconfig | 1 - configs/stm32f746-disco_spl_defconfig | 1 - configs/stm32f769-disco_defconfig | 1 - configs/stm32f769-disco_spl_defconfig | 1 - configs/stm32h743-disco_defconfig | 1 - configs/stm32h743-eval_defconfig | 1 - configs/stm32h750-art-pi_defconfig | 1 - 12 files changed, 12 deletions(-) diff --git a/configs/stm32746g-eval_defconfig b/configs/stm32746g-eval_defconfig index 58232a7114..7200446d28 100644 --- a/configs/stm32746g-eval_defconfig +++ b/configs/stm32746g-eval_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y CONFIG_SYS_TEXT_BASE=0x0800 CONFIG_SYS_MALLOC_LEN=0x10 -CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32746g-eval" diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index 28f522b15e..ff42952a76 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y CONFIG_SYS_TEXT_BASE=0x08009000 CONFIG_SYS_MALLOC_LEN=0x10 -CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig index e6e595d495..914ac14641 100644 --- a/configs/stm32f429-discovery_defconfig +++ b/configs/stm32f429-discovery_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y CONFIG_SYS_TEXT_BASE=0x0800 CONFIG_SYS_MALLOC_LEN=0x020 -CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2 diff --git a/configs/stm32f429-evaluation_defconfig b/configs/stm32f429-evaluation_defconfig index 073f27168a..af7a8bf076 100644 --- a/configs/stm32f429-evaluation_defconfig +++ b/configs/stm32f429-evaluation_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y CONFIG_SYS_TEXT_BASE=0x0800 CONFIG_SYS_MALLOC_LEN=0x10 -CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32429i-eval" diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig index bd3693275e..90680fdb05 100644 --- a/configs/stm32f469-discovery_defconfig +++ b/configs/stm32f469-discovery_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y CONFIG_SYS_TEXT_BASE=0x0800 CONFIG_SYS_MALLOC_LEN=0x10 -CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco" diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index ed537b0578..a8edf11b40 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y CONFIG_SYS_TEXT_BASE=0x0800 CONFIG_SYS_MALLOC_LEN=0x10 -CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco" diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index d4a65bde24..0e358e86ff 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y CONFIG_SYS_TEXT_BASE=0x08009000 CONFIG_SYS_MALLOC_LEN=0x10 -CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 5b5307ca1d..3e7b5bd06e 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y CONFIG_SYS_TEXT_BASE=0x0800 CONFIG_SYS_MALLOC_LEN=0x10 -CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco" diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index b5d54b48ec..f0a1b667b8 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y CONFIG_SYS_TEXT_BASE=0x08009000 CONFIG_SYS_MALLOC_LEN=0x10 -CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig index d33da43065..8c62c70a57 100644 --- a/configs/stm32h743-disco_d
Re: [PATCH] ARM: dts: stm32: DT sync with kernel v6.0-rc4 for MCU's boards
On 9/26/22 14:52, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/23/22 13:20, Patrice Chotard wrote:
>> Device tree alignment with kernel v6.0-rc4.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> arch/arm/dts/stm32429i-eval-u-boot.dtsi | 2 +-
>> arch/arm/dts/stm32746g-eval.dts | 18 -
>> arch/arm/dts/stm32f4-pinctrl.dtsi | 2 +-
>> arch/arm/dts/stm32f429-disco-u-boot.dtsi | 4 +-
>> arch/arm/dts/stm32f429-disco.dts | 20 +++--
>> arch/arm/dts/stm32f429-pinctrl.dtsi | 94 +++
>> arch/arm/dts/stm32f429.dtsi | 69 +++--
>> arch/arm/dts/stm32f469-disco-u-boot.dtsi | 4 +-
>> arch/arm/dts/stm32f469-disco.dts | 24 --
>> arch/arm/dts/stm32f469-pinctrl.dtsi | 96
>> arch/arm/dts/stm32f7-pinctrl.dtsi | 2 +-
>> arch/arm/dts/stm32f7-u-boot.dtsi | 2 +-
>> arch/arm/dts/stm32f746-disco.dts | 12 +++
>> arch/arm/dts/stm32f746.dtsi | 67 +
>> arch/arm/dts/stm32f769-disco.dts | 18 -
>> arch/arm/dts/stm32h743.dtsi | 19 ++---
>> arch/arm/dts/stm32h743i-disco.dts | 8 +-
>> arch/arm/dts/stm32h743i-eval.dts | 8 +-
>> arch/arm/dts/stm32h750i-art-pi.dts | 8 +-
>> 19 files changed, 207 insertions(+), 270 deletions(-)
>
> .
>
>
>> diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi
>> b/arch/arm/dts/stm32f429-disco-u-boot.dtsi
>> index c993f86be8..dcc68c4bcc 100644
>> --- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi
>> +++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi
>> @@ -27,7 +27,7 @@
>> soc {
>> u-boot,dm-pre-reloc;
>> - pin-controller {
>> + pinctrl@4002 {
>> u-boot,dm-pre-reloc;
>> };
>>
>
> NIT: can be simply by using alias
>
> &pinctrl {
> u-boot,dm-pre-reloc;
> };
>
>
>
>> @@ -193,6 +193,6 @@
>> u-boot,dm-pre-reloc;
>> };
>> -&timer5 {
>> +&timers5 {
>> u-boot,dm-pre-reloc;
>> };
>
>
> ...
>
>
>> diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
>> b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
>> index cd173623ef..7f012b49f0 100644
>> --- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
>> +++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
>> @@ -28,7 +28,7 @@
>> soc {
>> u-boot,dm-pre-reloc;
>> - pin-controller {
>> + pinctrl@4002 {
>> u-boot,dm-pre-reloc;
>> };
>
> NIT: can be simply by using alias
>
> &pinctrl {
> u-boot,dm-pre-reloc;
> };
>
>
>> @@ -256,6 +256,6 @@
>> u-boot,dm-pre-reloc;
>> };
>> -&timer5 {
>> +&timers5 {
>> u-boot,dm-pre-reloc;
>> };
>
> ...
>
>
> 2 NITS
>
>
> Reviewed-by: Patrick Delaunay
>
> Thanks
> Patrick
>
Applied to u-boot-stm32/next
Thanks
Re: [PATCH v2 7/7] configs: stm32f746-disco: Remove CONFIG_SYS_UBOOT_START flag
On 9/26/22 15:02, Patrick DELAUNAY wrote: > Hi, > > On 9/20/22 18:04, Patrice Chotard wrote: >> By pressing "c" key during SPL execution, we force U-boot execution >> instead of a kernel XIP image. >> >> This fixes a hard fault when booting stm32f746-disco in SPL with "c" >> key pressed during SPL execution. >> >> U-Boot SPL 2022.10-rc5-9-g40d02baa91 (Sep 20 2022 - 17:21:21 +0200) >> Trying to boot from XIP >> Hard fault >> pc : 080083fc lr : 08000d1b xPSR : 2100 >> r12 : 2004f108 r3 : 080083fd r2 : 0028 >> r1 : 2004f0c8 r0 : 2004f0e4 >> Resetting CPU ... >> >> This is due to SYS_UBOOT_START flag set to 0x080083FD which is not correct. >> If unset, SYS_UBOOT_START is set by default to CONFIG_SYS_TEXT_BASE >> which match with our requirement. >> >> Signed-off-by: Patrice Chotard >> --- >> >> (no changes since v1) >> >> include/configs/stm32f746-disco.h | 1 - >> 1 file changed, 1 deletion(-) >> >> diff --git a/include/configs/stm32f746-disco.h >> b/include/configs/stm32f746-disco.h >> index 64c1bc7d43..b0ec226114 100644 >> --- a/include/configs/stm32f746-disco.h >> +++ b/include/configs/stm32f746-disco.h >> @@ -34,7 +34,6 @@ >> BOOTENV >> #define CONFIG_SYS_MONITOR_LEN (512 * 1024) >> -#define CONFIG_SYS_UBOOT_START 0x080083FD >> #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \ >> CONFIG_SPL_PAD_TO) >> > > > > Reviewed-by: Patrick Delaunay > > Thanks > Patrick > Applied to u-boot-stm32/next Thanks
Re: [PATCH v2 6/7] config: stm32f769-disco: Fix internal flash size
On 9/26/22 15:05, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> arch-stm32f7/stm32.h file is shared between STM32F746 and STM32F769
>> MCUs. But STM32F769 embeds 2MB of internal flash instead of 1MB for
>> STM32F746. The flash layout is quite similar between the 2 SoCs :
>>
>> STM32F746 STM32F769
>> 4 * 32KB sectors 4 * 32KB sectors
>> 1 * 128KB sector 1 * 128KB sector
>> 3 * 256KB sectors 7 * 256KB sectors
>>
>> Update sect_sz_kb[] structure and SYS_MAX_FLASH_SECT accordingly.
>>
>> Signed-off-by: Patrice Chotard
>>
>> ---
>>
>> Changes in v2:
>> - Remove SYS_UBOOT_FLAG from stm32f746-disco.h
>>
>> arch/arm/include/asm/arch-stm32f7/stm32.h | 6 +++---
>> configs/stm32f769-disco_defconfig | 2 +-
>> configs/stm32f769-disco_spl_defconfig | 2 +-
>> 3 files changed, 5 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h
>> b/arch/arm/include/asm/arch-stm32f7/stm32.h
>> index 3451e74a3d..57db839e8d 100644
>> --- a/arch/arm/include/asm/arch-stm32f7/stm32.h
>> +++ b/arch/arm/include/asm/arch-stm32f7/stm32.h
>> @@ -10,9 +10,9 @@
>> #include
>> static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
>> - [0 ... 3] = 32 * 1024,
>> - [4] = 128 * 1024,
>> - [5 ... 7] = 256 * 1024
>> + [0 ... 3] = 32 * 1024,
>> + [4] = 128 * 1024,
>> + [5 ... CONFIG_SYS_MAX_FLASH_SECT - 1] = 256 * 1024
>> };
>> #endif /* _ASM_ARCH_HARDWARE_H */
>> diff --git a/configs/stm32f769-disco_defconfig
>> b/configs/stm32f769-disco_defconfig
>> index 423af7446a..5b5307ca1d 100644
>> --- a/configs/stm32f769-disco_defconfig
>> +++ b/configs/stm32f769-disco_defconfig
>> @@ -41,7 +41,7 @@ CONFIG_MTD=y
>> CONFIG_DM_MTD=y
>> CONFIG_MTD_NOR_FLASH=y
>> CONFIG_STM32_FLASH=y
>> -CONFIG_SYS_MAX_FLASH_SECT=8
>> +CONFIG_SYS_MAX_FLASH_SECT=12
>> CONFIG_DM_SPI_FLASH=y
>> CONFIG_SPI_FLASH_MACRONIX=y
>> CONFIG_SPI_FLASH_STMICRO=y
>> diff --git a/configs/stm32f769-disco_spl_defconfig
>> b/configs/stm32f769-disco_spl_defconfig
>> index b56d88f9f6..b5d54b48ec 100644
>> --- a/configs/stm32f769-disco_spl_defconfig
>> +++ b/configs/stm32f769-disco_spl_defconfig
>> @@ -63,7 +63,7 @@ CONFIG_MTD=y
>> CONFIG_DM_MTD=y
>> CONFIG_MTD_NOR_FLASH=y
>> CONFIG_STM32_FLASH=y
>> -CONFIG_SYS_MAX_FLASH_SECT=8
>> +CONFIG_SYS_MAX_FLASH_SECT=12
>> CONFIG_DM_SPI_FLASH=y
>> CONFIG_SPI_FLASH_MACRONIX=y
>> CONFIG_SPI_FLASH_STMICRO=y
>
>
>
> Reviewed-by: Patrick Delaunay
>
> Thanks
> Patrick
>
Applied to u-boot-stm32/next
Thanks
Re: [PATCH v2 5/7] configs: stm32746g-eval: Fix CONFIG_SYS_SPL_ARGS_ADDR
On 9/26/22 14:58, Patrick DELAUNAY wrote: > Hi, > > On 9/20/22 18:04, Patrice Chotard wrote: >> STM32F746 embeds 1 MB of internal flash [0x0800-0x080f], >> fix CONFIG_SYS_SPL_ARGS_ADDR accordingly >> It solves hard fault when jumping from SPL to U-Boot. >> >> Signed-off-by: Patrice Chotard >> --- >> >> (no changes since v1) >> >> configs/stm32746g-eval_spl_defconfig | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/configs/stm32746g-eval_spl_defconfig >> b/configs/stm32746g-eval_spl_defconfig >> index d8d55c2d3c..28f522b15e 100644 >> --- a/configs/stm32746g-eval_spl_defconfig >> +++ b/configs/stm32746g-eval_spl_defconfig >> @@ -36,7 +36,7 @@ CONFIG_SPL_BOARD_INIT=y >> CONFIG_SPL_SYS_MALLOC_SIMPLE=y >> CONFIG_SPL_MTD_SUPPORT=y >> CONFIG_SPL_XIP_SUPPORT=y >> -CONFIG_SYS_SPL_ARGS_ADDR=0x81c >> +CONFIG_SYS_SPL_ARGS_ADDR=0x80c >> CONFIG_SPL_DM_RESET=y >> CONFIG_SYS_PBSIZE=1050 >> CONFIG_CMD_GPT=y > > > Reviewed-by: Patrick Delaunay > > Thanks > Patrick > Applied to u-boot-stm32/next Thanks
Re: [PATCH v2 4/7] configs: stm32f746-disco: Fix CONFIG_SYS_SPL_ARGS_ADDR
On 9/26/22 14:58, Patrick DELAUNAY wrote: > Hi, > > On 9/20/22 18:04, Patrice Chotard wrote: >> STM32F746 embeds 1 MB of internal flash [0x0800-0x080f], >> fix CONFIG_SYS_SPL_ARGS_ADDR accordingly >> It solves hard fault when jumping from SPL to U-Boot. >> >> Signed-off-by: Patrice Chotard >> --- >> >> (no changes since v1) >> >> configs/stm32f746-disco_spl_defconfig | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/configs/stm32f746-disco_spl_defconfig >> b/configs/stm32f746-disco_spl_defconfig >> index 5e8a8aaf3c..d4a65bde24 100644 >> --- a/configs/stm32f746-disco_spl_defconfig >> +++ b/configs/stm32f746-disco_spl_defconfig >> @@ -36,7 +36,7 @@ CONFIG_SPL_BOARD_INIT=y >> CONFIG_SPL_SYS_MALLOC_SIMPLE=y >> CONFIG_SPL_MTD_SUPPORT=y >> CONFIG_SPL_XIP_SUPPORT=y >> -CONFIG_SYS_SPL_ARGS_ADDR=0x81c >> +CONFIG_SYS_SPL_ARGS_ADDR=0x80c >> CONFIG_SPL_DM_RESET=y >> CONFIG_SYS_PBSIZE=1050 >> CONFIG_CMD_GPT=y > > > Reviewed-by: Patrick Delaunay > > Thanks > Patrick > Applied to u-boot-stm32/next Thanks
Re: [PATCH v2 3/7] configs: stm32746g-eval: Fix SPL boot
On 9/26/22 14:57, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
>> replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
>> As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
>> increases SPL size over the initial 0x8000 limit.
>> Increase the SPL size to 0x9000 to fix SPL boot.
>> Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
>>
>> Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> (no changes since v1)
>>
>> configs/stm32746g-eval_spl_defconfig | 7 ---
>> 1 file changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/configs/stm32746g-eval_spl_defconfig
>> b/configs/stm32746g-eval_spl_defconfig
>> index a3b7146454..d8d55c2d3c 100644
>> --- a/configs/stm32746g-eval_spl_defconfig
>> +++ b/configs/stm32746g-eval_spl_defconfig
>> @@ -1,6 +1,6 @@
>> CONFIG_ARM=y
>> CONFIG_ARCH_STM32=y
>> -CONFIG_SYS_TEXT_BASE=0x08008000
>> +CONFIG_SYS_TEXT_BASE=0x08009000
>> CONFIG_SYS_MALLOC_LEN=0x10
>> CONFIG_SYS_MALLOC_F_LEN=0xE00
>> CONFIG_SPL_GPIO=y
>> @@ -13,10 +13,11 @@ CONFIG_SPL_TEXT_BASE=0x800
>> CONFIG_SYS_PROMPT="U-Boot > "
>> CONFIG_SPL_SERIAL=y
>> CONFIG_SPL_DRIVERS_MISC=y
>> +CONFIG_SPL_SIZE_LIMIT=0x9000
>> CONFIG_STM32F7=y
>> CONFIG_TARGET_STM32F746_DISCO=y
>> CONFIG_SPL=y
>> -CONFIG_SYS_LOAD_ADDR=0x8008000
>> +CONFIG_SYS_LOAD_ADDR=0x8009000
>> CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
>> CONFIG_DISTRO_DEFAULTS=y
>> CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>> @@ -29,7 +30,7 @@ CONFIG_USE_BOOTARGS=y
>> CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0
>> ignore_loglevel"
>> # CONFIG_DISPLAY_CPUINFO is not set
>> CONFIG_BOARD_LATE_INIT=y
>> -CONFIG_SPL_PAD_TO=0x8000
>> +CONFIG_SPL_PAD_TO=0x9000
>> CONFIG_SPL_NO_BSS_LIMIT=y
>> CONFIG_SPL_BOARD_INIT=y
>> CONFIG_SPL_SYS_MALLOC_SIMPLE=y
>
>
> Reviewed-by: Patrick Delaunay
>
> Thanks
> Patrick
>
Applied to u-boot-stm32/next
Thanks
Re: [PATCH v2 2/7] configs: stm32f769-disco: Fix SPL boot
On 9/26/22 14:57, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
>> replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
>> As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
>> increases SPL size over the initial 0x8000 limit.
>> Increase the SPL size to 0x9000 to fix SPL boot.
>> Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
>>
>> Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> (no changes since v1)
>>
>> configs/stm32f769-disco_spl_defconfig | 7 ---
>> 1 file changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/configs/stm32f769-disco_spl_defconfig
>> b/configs/stm32f769-disco_spl_defconfig
>> index 19d2c24abb..b56d88f9f6 100644
>> --- a/configs/stm32f769-disco_spl_defconfig
>> +++ b/configs/stm32f769-disco_spl_defconfig
>> @@ -1,6 +1,6 @@
>> CONFIG_ARM=y
>> CONFIG_ARCH_STM32=y
>> -CONFIG_SYS_TEXT_BASE=0x08008000
>> +CONFIG_SYS_TEXT_BASE=0x08009000
>> CONFIG_SYS_MALLOC_LEN=0x10
>> CONFIG_SYS_MALLOC_F_LEN=0xE00
>> CONFIG_SPL_GPIO=y
>> @@ -13,10 +13,11 @@ CONFIG_SPL_TEXT_BASE=0x800
>> CONFIG_SYS_PROMPT="U-Boot > "
>> CONFIG_SPL_SERIAL=y
>> CONFIG_SPL_DRIVERS_MISC=y
>> +CONFIG_SPL_SIZE_LIMIT=0x9000
>> CONFIG_STM32F7=y
>> CONFIG_TARGET_STM32F746_DISCO=y
>> CONFIG_SPL=y
>> -CONFIG_SYS_LOAD_ADDR=0x8008000
>> +CONFIG_SYS_LOAD_ADDR=0x8009000
>> CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
>> CONFIG_DISTRO_DEFAULTS=y
>> CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>> @@ -28,7 +29,7 @@ CONFIG_AUTOBOOT_STOP_STR=" "
>> CONFIG_USE_BOOTARGS=y
>> CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0
>> ignore_loglevel"
>> # CONFIG_DISPLAY_CPUINFO is not set
>> -CONFIG_SPL_PAD_TO=0x8000
>> +CONFIG_SPL_PAD_TO=0x9000
>> CONFIG_SPL_NO_BSS_LIMIT=y
>> CONFIG_SPL_BOARD_INIT=y
>> CONFIG_SPL_SYS_MALLOC_SIMPLE=y
>
>
> Reviewed-by: Patrick Delaunay
>
> Thanks
> Patrick
>
Applied to u-boot-stm32/next
Thanks
Re: [PATCH v2 1/7] configs: stm32f746-disco: Fix SPL boot
On 9/26/22 14:50, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/20/22 18:04, Patrice Chotard wrote:
>> Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
>> replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
>> As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
>> increases SPL size over the initial 0x8000 limit.
>> Increase the SPL size to 0x9000 to fix SPL boot.
>> Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
>>
>> Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> (no changes since v1)
>>
>> configs/stm32f746-disco_spl_defconfig | 7 ---
>> 1 file changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/configs/stm32f746-disco_spl_defconfig
>> b/configs/stm32f746-disco_spl_defconfig
>> index e7b1acc433..5e8a8aaf3c 100644
>> --- a/configs/stm32f746-disco_spl_defconfig
>> +++ b/configs/stm32f746-disco_spl_defconfig
>> @@ -1,6 +1,6 @@
>> CONFIG_ARM=y
>> CONFIG_ARCH_STM32=y
>> -CONFIG_SYS_TEXT_BASE=0x08008000
>> +CONFIG_SYS_TEXT_BASE=0x08009000
>> CONFIG_SYS_MALLOC_LEN=0x10
>> CONFIG_SYS_MALLOC_F_LEN=0xE00
>> CONFIG_SPL_GPIO=y
>> @@ -13,10 +13,11 @@ CONFIG_SPL_TEXT_BASE=0x800
>> CONFIG_SYS_PROMPT="U-Boot > "
>> CONFIG_SPL_SERIAL=y
>> CONFIG_SPL_DRIVERS_MISC=y
>> +CONFIG_SPL_SIZE_LIMIT=0x9000
>> CONFIG_STM32F7=y
>> CONFIG_TARGET_STM32F746_DISCO=y
>> CONFIG_SPL=y
>> -CONFIG_SYS_LOAD_ADDR=0x8008000
>> +CONFIG_SYS_LOAD_ADDR=0x8009000
>> CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
>> CONFIG_DISTRO_DEFAULTS=y
>> CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>> @@ -29,7 +30,7 @@ CONFIG_USE_BOOTARGS=y
>> CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0
>> ignore_loglevel"
>> # CONFIG_DISPLAY_CPUINFO is not set
>> CONFIG_BOARD_LATE_INIT=y
>> -CONFIG_SPL_PAD_TO=0x8000
>> +CONFIG_SPL_PAD_TO=0x9000
>> CONFIG_SPL_NO_BSS_LIMIT=y
>> CONFIG_SPL_BOARD_INIT=y
>> CONFIG_SPL_SYS_MALLOC_SIMPLE=y
>
>
>
> Reviewed-by: Patrick Delaunay
>
> Thanks
> Patrick
>
Applied to u-boot-stm32/next
Thanks
Re: [PATCH v2 14/15] sandbox: Convert to use driver model for SCSI
At present sandbox is producing a warning about SCSI migration. Drop the legacy code and replace it with a new implementation. Also drop the SATA command, which does not work with driver model. Signed-off-by: Simon Glass --- (no changes since v1) arch/Kconfig | 1 - configs/sandbox64_defconfig| 1 + configs/sandbox_defconfig | 1 + configs/sandbox_flattree_defconfig | 1 + configs/sandbox_noinst_defconfig | 1 + configs/sandbox_spl_defconfig | 1 + configs/sandbox_vpl_defconfig | 1 + drivers/scsi/sandbox_scsi.c| 132 - 8 files changed, 135 insertions(+), 4 deletions(-) Applied to u-boot-dm, thanks!
Re: [PATCH 1/1] sandbox: unblock signal before calling execv()
On Thu, 1 Sept 2022 at 18:32, Heinrich Schuchardt wrote: > > The following faulty behavior was observed. The sandbox configured with > CONFIG_SANDBOX_CRASH_RESET=y was invoked with > > ./u-boot -T -S > > After executing `exception undefined' the sandbox reboots. > When executing `exception undefined' the sandbox exits with SIGSEGV. > > The expected behavior is that the sandbox should reboot again. > > If we are relaunching the sandbox in a signal handler, we have to unblock > the respective signal before calling execv(). See signal(7) man-page. > > Signed-off-by: Heinrich Schuchardt > --- > arch/sandbox/cpu/os.c | 16 > 1 file changed, 16 insertions(+) > Reviewed-by: Simon Glass Applied to u-boot-dm, thanks!
Re: [PATCH v2 04/15] scsi: Move core emulation state into a new struct
In preparation for sharing the emulation code between two drivers, move some of the fields into a new struct. Use a separate header file so it can be used by various drivers. Signed-off-by: Simon Glass --- (no changes since v1) drivers/usb/emul/sandbox_flash.c | 60 include/scsi_emul.h | 32 + 2 files changed, 62 insertions(+), 30 deletions(-) create mode 100644 include/scsi_emul.h Applied to u-boot-dm, thanks!
Re: [PATCH v2 02/15] sandbox: usb: Rename transfer_len in protocol struct
This has the same name as a field in our local private struct, which is confusing. Change the name to xfer_len instead. Signed-off-by: Simon Glass --- (no changes since v1) drivers/usb/emul/sandbox_flash.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) Applied to u-boot-dm, thanks!
Re: [PATCH v2 06/15] scsi: Move vendor/product info into the shared struct
Move this information into struct scsi_emul_info so we can use it in common code. Signed-off-by: Simon Glass --- (no changes since v1) drivers/usb/emul/sandbox_flash.c | 10 -- include/scsi_emul.h | 5 + 2 files changed, 9 insertions(+), 6 deletions(-) Applied to u-boot-dm, thanks!
Re: [PATCH v2 05/15] sandbox: Move buffer to scsi_emul_info
Move the buffer into this struct so it can be shared between different implementations. Signed-off-by: Simon Glass --- (no changes since v1) drivers/usb/emul/sandbox_flash.c | 41 +++- include/scsi_emul.h | 5 2 files changed, 35 insertions(+), 11 deletions(-) Applied to u-boot-dm, thanks!
Re: [PATCH v2 12/15] sandbox: Enable SCSI for all builds
This will be needed to run unit tests, once the SCSI code is used for USB as well. Enable it for all sandbox builds. Signed-off-by: Simon Glass --- (no changes since v1) configs/sandbox64_defconfig| 5 + configs/sandbox_flattree_defconfig | 4 configs/sandbox_noinst_defconfig | 4 configs/sandbox_spl_defconfig | 6 +- configs/sandbox_vpl_defconfig | 4 5 files changed, 22 insertions(+), 1 deletion(-) Applied to u-boot-dm, thanks!
Re: [PATCH v2 15/15] sandbox: Add a test for SCSI
Add a simple uclass test for SCSI. It reads the partition table from a disk image and checks that it looks correct. Signed-off-by: Simon Glass --- (no changes since v1) arch/sandbox/dts/sandbox.dtsi | 4 arch/sandbox/dts/test.dts | 5 + test/dm/Makefile | 1 + test/dm/scsi.c| 39 +++ test/py/tests/test_ut.py | 9 5 files changed, 58 insertions(+) create mode 100644 test/dm/scsi.c Applied to u-boot-dm, thanks!
Re: [PATCH v10 03/15] FWU: Add FWU metadata access driver for GPT partitioned block devices
On Mon, Sep 26, 2022 at 3:48 AM Sughosh Ganu wrote:
>
> On Mon, 26 Sept 2022 at 08:22, Jassi Brar wrote:
> >
> > On Thu, Sep 15, 2022 at 3:16 AM Sughosh Ganu
> > wrote:
> >
> > > diff --git a/drivers/fwu-mdata/Kconfig b/drivers/fwu-mdata/Kconfig
> > > new file mode 100644
> > > index 00..7322da48b1
> > > --- /dev/null
> > > +++ b/drivers/fwu-mdata/Kconfig
> > > @@ -0,0 +1,16 @@
> > > +config FWU_MDATA
> > > + bool "Driver support for accessing FWU Metadata"
> > > + depends on DM
> > > + help
> > > + Enable support for accessing FWU Metadata partitions. The
> > > + FWU Metadata partitions reside on the same storage device
> > > + which contains the other FWU updatable firmware images.
> > > +
> > > +config FWU_MDATA_GPT_BLK
> > > + bool "FWU Metadata access for GPT partitioned Block devices"
> > > + select PARTITION_TYPE_GUID
> > > + select PARTITION_UUIDS
> > > + depends on DM && HAVE_BLOCK_DEVICE && EFI_PARTITION
> > >
> > It should depend on FWU_MDATA instead of DM.
> > Though, eventually it will be a choice between GPT and MTD.
>
> Yes, this should depend on FWU_MDATA. Will change.
>
> >
> > ...
> > > +static int fwu_gpt_mdata_check(struct udevice *dev)
> > > +{
> > > + /*
> > > +* Check if both the copies of the FWU
> > > +* metadata are valid. If one has gone
> > > +* bad, restore it from the other good
> > > +* copy.
> > > +*/
> > >
> > This comment is repeated 3 more times in the patchset. Maybe get rid
> > of this and some other.
>
> Sorry, I could not find any other comment like this in the file. Can
> you point me out where this comment has been repeated.
>
I said patchset, not file. grep'ing "restore it from the other" in
the patches show
drivers/fwu-mdata/gpt_blk.c, drivers/fwu-mdata/fwu-mdata-uclass.c
and twice in include/fwu.h
Btw, the other three times it says "restore it from the other bad copy" :D
-j
Re: [PATCH v10 10/15] FWU: Add support for the FWU Multi Bank Update feature
On Mon, Sep 26, 2022 at 4:01 AM Sughosh Ganu wrote:
> On Mon, 26 Sept 2022 at 08:25, Jassi Brar wrote:
> > .
> > >
> > > +static __maybe_unused efi_status_t fwu_post_update_process(bool
> > > fw_accept_os)
> > > +{
> > > + int status;
> > > + u32 update_index;
> > > + efi_status_t ret;
> > > +
> > > + status = fwu_plat_get_update_index(&update_index);
> > > + if (status < 0) {
> > > + log_err("Failed to get the FWU update_index value\n");
> > > + return EFI_DEVICE_ERROR;
> > > + }
> > > +
> > > + /*
> > > +* All the capsules have been updated successfully,
> > > +* update the FWU metadata.
> > > +*/
> > > + log_debug("Update Complete. Now updating active_index to %u\n",
> > > + update_index);
> > > + status = fwu_update_active_index(update_index);
> > >
> > Do we want to check if all images in the bank are updated via capsules
> > before switching the bank?
>
> This function does get called only when the update status for every
> capsule is a success. Even if one of the capsules does not get
> updated, the active index will not get updated.
>
but we don't check if the capsule for each image in the bank is
provided for update.
> >
> > A developer will make sure all images are provided in one go, so that
> > the switch is successful.
> > But a malicious user may force some old vulnerable image back into use
> > by updating all but that image.
>
> That I believe is to be handled through a combination of implementing
> a rollback protection mechanism, along with capsule authentication.
> These are separate to the implementation of the multi bank updates
> that these patches are aiming for.
>
This sounds like : we don't worry about buffer-overflow
vulnerabilities because the system will be secured and hardened by
other mechanisms.
A/B update does not _require_ rollback-protection or
capsure-authentication. A platform may rely on some other technology
for tamper-proofing.
-j
Re: [PATCH v10 02/15] FWU: Add FWU metadata structure and driver for accessing metadata
On Mon, Sep 26, 2022 at 5:00 AM Sughosh Ganu wrote:
>
> On Mon, 26 Sept 2022 at 08:28, Jassi Brar wrote:
> >
> >
> > .
> > > +/**
> > > + * fwu_revert_boot_index() - Revert the active index in the FWU metadata
> > > + *
> > > + * Revert the active_index value in the FWU metadata, by swapping the
> > > values
> > > + * of active_index and previous_active_index in both copies of the
> > > + * FWU metadata.
> > > + *
> > > + * Return: 0 if OK, -ve on error
> > > + *
> > > + */
> > > +int fwu_revert_boot_index(void)
> > > +{
> > > + int ret;
> > > + u32 cur_active_index;
> > > + struct udevice *dev;
> > > + struct fwu_mdata mdata = { 0 };
> > > +
> > > + ret = fwu_get_dev_mdata(&dev, &mdata);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + /*
> > > +* Swap the active index and previous_active_index fields
> > > +* in the FWU metadata
> > > +*/
> > > + cur_active_index = mdata.active_index;
> > > + mdata.active_index = mdata.previous_active_index;
> > > + mdata.previous_active_index = cur_active_index;
> > >
> > This may cause problems.
> > We are reverting because active_index does not work, and here we set
> > it to previous_active_index which is supposed to mean "last good
> > index".
> > Also this logic assumes a 2-banks setup, and is obviously incorrect
> > for >2 banks where the previous_active_index should point to
> > "boot_index minus 2" bank (but of course there is no guarantee that
> > that bank is preserved still).
> > So either previous_active_index be left changed OR we also copy the
> > previous bank to active bank before the swap.
>
> Sorry, but I don't understand the review comment here. Even in the
> case of num_banks > 2, this function is simply using the
> previous_active_index value. It does not care what the
> previous_active_index value is. If you remember, the setting of the
> update bank is really a platform
> function(fwu_plat_get_update_index()). A platform can set any bank
> number as the update bank. So we cannot tell what the value of the
> previous_active_index will be.
>
Do you remember you pick update_bank in a circular-buffer manner in
fwu_plat_get_update_index() ? But don't even bother the >2 banks.
Consider the simple 2-banks platform
Initially:
active_index = 1
previous_active_index = 0
After update and before reboot
active_index = 0 updated bank 0
previous_active_index = 1
After reboot, for some reason update fails (reject bank0) and we call
fwu_revert_boot_index()
active_index = 1<<< good
previous_active_index = 0 points to unbootable bank
Which may be seen as inconsistency if we assume previous_bank to
always contain a bootable set of images.
So we also need to copy bank1 into bank0 as part of the revert (at
least as a backup for reasons other than a/b update failure).
> All that this function does is use the
> previous_active_index as the partition/bank to boot from in the
> subsequent boot cycle.
>
That is, you assume the previous_active_index bank contains working images.
> > .
> > > +/**
> > > + * fwu_accept_image() - Set the Acceptance bit for the image
> > > + * @img_type_id: GUID of the image type for which the accepted bit is to
> > > be
> > > + * cleared
> > > + * @bank: Bank of which the image's Accept bit is to be set
> > > + *
> > > + * Set the accepted bit for the image specified by the img_guid
> > > parameter. This
> > > + * indicates acceptance of image for subsequent boots by some governing
> > > component
> > > + * like OS(or firmware).
> > > + *
> > > + * Return: 0 if OK, -ve on error
> > > + *
> > > + */
> > > +int fwu_accept_image(efi_guid_t *img_type_id, u32 bank)
> > > +{
> > > + return fwu_clrset_image_accept(img_type_id, bank,
> > > + IMAGE_ACCEPT_SET);
> > > +}
> > > +
> > > +/**
> > > + * fwu_clear_accept_image() - Clear the Acceptance bit for the image
> > >
> > Something more consistent like fwu_image_accepted_clear() and
> > fwu_image_accepted_set() ?
>
> Umm, the other related API is fwu_accept_image, and this is clearing
> the accept bit, hence the name. If you don't feel strongly about this,
> I would prefer the current name.
>
fwu_accept_image() and fwu_clear_accept_image() don't seem like a
pair is all I say.
cheers.
Re: [PATCH v2 1/3] net: emaclite: fix broken build
Hi, can you please update subject line? Currently this driver is enabled by microblaze and mips which means there are not broken builds that's why subject is not correct. On 9/23/22 14:31, samuel.ob...@codasip.com wrote: From: Samuel Obuch Function ioremap_nocache seems to be defined only for mips and microblaze nit: MIPS and Microblaze architectures. Therefore, the function call in the emaclite driver causes this driver to be unusable with other architectures, for example riscv. RISC-V v2: Use ioremap function instead of ioremap_nocache. Switch to linux/io.h which automatically creates ioremap if not defined by the architecture. This should go out of commit message below ---. Signed-off-by: Samuel Obuch --- drivers/net/xilinx_emaclite.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index 6c9f1f7c27..2e152bf873 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -20,8 +20,8 @@ #include #include #include +#include #include -#include There is actually one more asm/io.h in this file. Please also remove it. #include DECLARE_GLOBAL_DATA_PTR; @@ -615,8 +615,8 @@ static int emaclite_of_to_plat(struct udevice *dev) int offset = 0; pdata->iobase = dev_read_addr(dev); - emaclite->regs = (struct emaclite_regs *)ioremap_nocache(pdata->iobase, -0x1); + emaclite->regs = (struct emaclite_regs *)ioremap(pdata->iobase, +0x1); Above you are not saying why you are doing it. It would be good to say in commit message that Microblaze ioremap_nocache is just empty and in MIPS ioremap_nocache implementation is the same with ioremap. And also that Linux kernel doesn't use any ioremap_nocache function that's why this function shouldn't be used because simple ioremap is uncached already. emaclite->phyaddr = -1; Thanks, Michal
Re: [PATCH 04/10] timer: cadence-ttc: Add timer_early functions
Hi Simon,
Hi Michal,
On 25.09.22 16:15, Simon Glass wrote:
Hi Stefan,
On Wed, 21 Sept 2022 at 08:06, Stefan Roese wrote:
Currently this timer driver provides timer_get_boot_us() to support the
BOOTSTAGE functionality. This patch adds the timer_early functions so
that the "normal" timer functions can be used, when CONFIG_TIMER_EARLY
is enabled.
timer_get_boot_us() will get removed in a follow-up patch, once the
BOOTSTAGE interface is migrated to timer_get_us().
Signed-off-by: Stefan Roese
Cc: Michal Simek
---
drivers/timer/cadence-ttc.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/timer/cadence-ttc.c b/drivers/timer/cadence-ttc.c
index 2eff45060ad6..e26c7923a140 100644
--- a/drivers/timer/cadence-ttc.c
+++ b/drivers/timer/cadence-ttc.c
@@ -58,6 +58,31 @@ ulong timer_get_boot_us(void)
}
#endif
+unsigned long notrace timer_early_get_rate(void)
+{
+ return 1;
+}
+
+u64 notrace timer_early_get_count(void)
+{
+ u64 ticks = 0;
+ u32 rate = 1;
+ u64 us;
+ int ret;
+
+ ret = dm_timer_init();
I don't think you can call this if you want to support bootstage,
since driver model may not be inited.
Yes, thanks for noticing. Still, this code is copied from the original
timer_get_boot_us() function in this driver. Which also has problems
with early timer access AFAICT.
Michal, you are the author of the timer_get_boot_us() implementation
in commit 56c0e646c4f6a ("timer: cadence: Implement timer_get_boot_us").
How is this supposed to work in the early boot phase, before DM is
initialized?
Thanks,
Stefan
+ if (!ret) {
+ /* The timer is available */
+ rate = timer_get_rate(gd->timer);
+ timer_get_count(gd->timer, &ticks);
+ } else {
+ return 0;
+ }
+
+ us = (ticks * 1000) / rate;
+ return us;
+}
+
static u64 cadence_ttc_get_count(struct udevice *dev)
{
struct cadence_ttc_priv *priv = dev_get_priv(dev);
--
2.37.3
REgards,
Simon
Viele Grüße,
Stefan Roese
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
[PATCH v5 09/10] arm_ffa: introduce FF-A MM communication
Add MM communication support using FF-A transport
This feature allows accessing MM partitions services through
EFI MM communication protocol. MM partitions such as StandAlonneMM
or smm-gateway secure partitions which reside in secure world.
An MM shared buffer and a door bell event are used to exchange
the data.
The data is used by EFI services such as GetVariable()/SetVariable()
and copied from the communication buffer to the MM shared buffer.
The secure partition is notified about availability of data in the
MM shared buffer by an FF-A message (door bell).
On such event, MM SP can read the data and updates the MM shared
buffer with the response data.
The response data is copied back to the communication buffer and
consumed by the EFI subsystem.
FF-A driver private data is copied to EFI runtime section at
ExitBootServices(). This garantees secure world partitions data are
available at EFI runtime level.
Signed-off-by: Abdellatif El Khlifi
Signed-off-by: Gowtham Suresh Kumar
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
---
Changelog:
===
v4:
* use the new FF-A driver interfaces
* discover MM partitions at runtime
* copy FF-A driver private data to EFI runtime section at
ExitBootServices()
* drop use of FFA_ERR_STAT_SUCCESS error code
* replace EFI_BUFFER_TOO_SMALL with EFI_OUT_OF_RESOURCES
in ffa_mm_communicate(). No need for efi_memcpy_runtime() anymore
* revert the error log in mm_communicate() in case of failure
* remove packed attribute from efi_mm_communicate_header and
smm_variable_communicate_header
v2:
* set default values to 0 for FFA_SHARED_MM_BUFFER_SIZE,
FFA_SHARED_MM_BUFFER_ADDR and MM_SP_UUID_DATA and add warnings
v1:
* introduce FF-A MM communication
arch/arm/cpu/armv8/cache.S| 19 +++
arch/arm/cpu/armv8/cache_v8.c | 6 +-
include/mm_communication.h| 9 +-
lib/efi_loader/Kconfig| 14 +-
lib/efi_loader/efi_boottime.c | 7 +
lib/efi_loader/efi_variable_tee.c | 263 +-
6 files changed, 309 insertions(+), 9 deletions(-)
diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S
index d1cee23437..91b7c73c17 100644
--- a/arch/arm/cpu/armv8/cache.S
+++ b/arch/arm/cpu/armv8/cache.S
@@ -3,6 +3,9 @@
* (C) Copyright 2013
* David Feng
*
+ * (C) Copyright 2022 ARM Limited
+ * Abdellatif El Khlifi
+ *
* This file is based on sample code from ARMv8 ARM.
*/
@@ -21,7 +24,11 @@
* x1: 0 clean & invalidate, 1 invalidate only
* x2~x9: clobbered
*/
+#ifdef CONFIG_EFI_LOADER
+.pushsection .text.efi_runtime, "ax"
+#else
.pushsection .text.__asm_dcache_level, "ax"
+#endif
ENTRY(__asm_dcache_level)
lsl x12, x0, #1
msr csselr_el1, x12 /* select cache level */
@@ -65,7 +72,11 @@ ENDPROC(__asm_dcache_level)
*
* flush or invalidate all data cache by SET/WAY.
*/
+#ifdef CONFIG_EFI_LOADER
+.pushsection .text.efi_runtime, "ax"
+#else
.pushsection .text.__asm_dcache_all, "ax"
+#endif
ENTRY(__asm_dcache_all)
mov x1, x0
dsb sy
@@ -109,7 +120,11 @@ ENTRY(__asm_flush_dcache_all)
ENDPROC(__asm_flush_dcache_all)
.popsection
+#ifdef CONFIG_EFI_LOADER
+.pushsection .text.efi_runtime, "ax"
+#else
.pushsection .text.__asm_invalidate_dcache_all, "ax"
+#endif
ENTRY(__asm_invalidate_dcache_all)
mov x0, #0x1
b __asm_dcache_all
@@ -182,7 +197,11 @@ ENTRY(__asm_invalidate_icache_all)
ENDPROC(__asm_invalidate_icache_all)
.popsection
+#ifdef CONFIG_EFI_LOADER
+.pushsection .text.efi_runtime, "ax"
+#else
.pushsection .text.__asm_invalidate_l3_dcache, "ax"
+#endif
WEAK(__asm_invalidate_l3_dcache)
mov x0, #0 /* return status as success */
ret
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index e4736e5643..45f57372c2 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -5,10 +5,14 @@
*
* (C) Copyright 2016
* Alexander Graf
+ *
+ * (C) Copyright 2022 ARM Limited
+ * Abdellatif El Khlifi
*/
#include
#include
+#include
#include
#include
#include
@@ -445,7 +449,7 @@ __weak void mmu_setup(void)
/*
* Performs a invalidation of the entire data cache at all levels
*/
-void invalidate_dcache_all(void)
+void __efi_runtime invalidate_dcache_all(void)
{
__asm_invalidate_dcache_all();
__asm_invalidate_l3_dcache();
diff --git a/include/mm_communication.h b/include/mm_communication.h
index e65fbde60d..fe9104c56d 100644
--- a/include/mm_communication.h
+++ b/include/mm_communication.h
@@ -6,6 +6,8 @@
* Copyright (c) 2017, Intel Corporation. All rights reserved.
* Copyright (C) 2020 Linaro Ltd.
* Copyright (C) 2020 Linaro Ltd.
+ * (C) Copyright 2022 ARM Limited
+ * Abdellatif El Khlifi
*/
#ifndef _MM_COMMUNICATION_H_
@@ -13,6 +15,9 @@
#include
+/* MM service UUID string (big-endian format). This UUID is common across all
MM SPs */
+
[PATCH v5 10/10] arm_ffa: corstone1000: enable EFI MM communication
turn on EFI MM communication On corstone1000 platform MM communication between u-boot and the secure world (Optee) is done using the FF-A bus. Signed-off-by: Abdellatif El Khlifi Cc: Tom Rini Cc: Simon Glass Cc: Ilias Apalodimas Cc: Jens Wiklander --- configs/corstone1000_defconfig | 4 include/configs/corstone1000.h | 9 + 2 files changed, 13 insertions(+) diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig index ed2e0fe70a..5028c746c5 100644 --- a/configs/corstone1000_defconfig +++ b/configs/corstone1000_defconfig @@ -52,3 +52,7 @@ CONFIG_DM_SERIAL=y CONFIG_USB=y CONFIG_USB_ISP1760=y CONFIG_ERRNO_STR=y +CONFIG_EFI_MM_COMM_TEE=y +# CONFIG_OPTEE is not set +CONFIG_ARM_FFA_TRANSPORT=y +CONFIG_ARM_FFA_EFI_RUNTIME_MODE=y diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h index 8e0230c135..997d0bebaf 100644 --- a/include/configs/corstone1000.h +++ b/include/configs/corstone1000.h @@ -14,6 +14,15 @@ #include +#define FFA_SHARED_MM_BUFFER_SIZE SZ_4K /* 4 KB */ + +/* + * shared buffer physical address used for communication between + * u-boot and the MM SP + */ +#define FFA_SHARED_MM_BUFFER_ADDR (0x023F8000) +#define FFA_SHARED_MM_BUFFER_OFFSET(0) + #define V2M_BASE 0x8000 #define CONFIG_PL011_CLOCK 5000 -- 2.17.1
[PATCH v5 07/10] arm_ffa: introduce Sandbox test cases for UCLASS_FFA
Add functional test cases for the FF-A core driver
These tests rely on the FF-A Sandbox driver which helps in
inspecting the FF-A core driver.
Signed-off-by: Abdellatif El Khlifi
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
---
Changelog:
===
v4: align sandbox tests with the new FF-A driver interfaces
and new way of error handling
v1: introduce sandbox tests
MAINTAINERS | 1 +
test/dm/Makefile | 2 +
test/dm/ffa.c| 394 +++
3 files changed, 397 insertions(+)
create mode 100644 test/dm/ffa.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 6f01002e34..8c0dfff5f8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -256,6 +256,7 @@ F: doc/README.ffa.drv
F: drivers/firmware/arm-ffa/
F: include/arm_ffa.h
F: include/sandbox_arm_ffa.h
+F: test/dm/ffa.c
ARM FREESCALE IMX
M: Stefano Babic
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 7543df8823..e5a791768e 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (c) 2013 Google, Inc
+# (C) Copyright 2022 ARM Limited
obj-$(CONFIG_UT_DM) += test-dm.o
@@ -81,6 +82,7 @@ obj-$(CONFIG_POWER_DOMAIN) += power-domain.o
obj-$(CONFIG_ACPI_PMC) += pmc.o
obj-$(CONFIG_DM_PMIC) += pmic.o
obj-$(CONFIG_DM_PWM) += pwm.o
+obj-$(CONFIG_SANDBOX_FFA) += ffa.o
obj-$(CONFIG_QFW) += qfw.o
obj-$(CONFIG_RAM) += ram.o
obj-y += regmap.o
diff --git a/test/dm/ffa.c b/test/dm/ffa.c
new file mode 100644
index 00..052d5fc3f4
--- /dev/null
+++ b/test/dm/ffa.c
@@ -0,0 +1,394 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Functional tests for UCLASS_FFA class
+ *
+ * (C) Copyright 2022 ARM Limited
+ * Abdellatif El Khlifi
+ */
+
+#include
+#include
+#include
+#include
+#include "../../drivers/firmware/arm-ffa/sandbox_arm_ffa_prv.h"
+#include
+#include
+#include
+
+/* Macros */
+
+#define LOG_MSG_SZ (100)
+#define LOG_CMD_SZ (LOG_MSG_SZ * 2)
+
+/* Functional tests for the UCLASS_FFA */
+
+static int dm_test_ffa_log(struct unit_test_state *uts, char *msg)
+{
+ char cmd[LOG_CMD_SZ] = {0};
+
+ console_record_reset();
+
+ snprintf(cmd, LOG_CMD_SZ, "echo \"%s\"", msg);
+ run_command(cmd, 0);
+
+ ut_assert_console_end();
+
+ return CMD_RET_SUCCESS;
+}
+
+static int check_fwk_version(struct ffa_prvdata *prvdata, struct
sandbox_ffa_prvdata *sdx_prvdata,
+struct unit_test_state *uts)
+{
+ if (prvdata->fwk_version != sdx_prvdata->fwk_version) {
+ char msg[LOG_MSG_SZ] = {0};
+
+ snprintf(msg, LOG_MSG_SZ,
+"[%s]: Error: framework version: core = 0x%x , sandbox
= 0x%x", __func__,
+prvdata->fwk_version,
+ sdx_prvdata->fwk_version);
+
+ dm_test_ffa_log(uts, msg);
+ return CMD_RET_FAILURE;
+ }
+ return CMD_RET_SUCCESS;
+}
+
+static int check_endpoint_id(struct ffa_prvdata *prvdata, struct
unit_test_state *uts)
+{
+ if (prvdata->id) {
+ char msg[LOG_MSG_SZ] = {0};
+
+ snprintf(msg, LOG_MSG_SZ,
+"[%s]: Error: endpoint id: core = 0x%x", __func__,
prvdata->id);
+ dm_test_ffa_log(uts, msg);
+ return CMD_RET_FAILURE;
+ }
+ return CMD_RET_SUCCESS;
+}
+
+static int check_core_dev(struct ffa_prvdata *prvdata, struct unit_test_state
*uts)
+{
+ if (!prvdata->dev) {
+ char msg[LOG_MSG_SZ] = {0};
+
+ snprintf(msg, LOG_MSG_SZ, "[%s]: Error: core device NULL",
__func__);
+ dm_test_ffa_log(uts, msg);
+ return CMD_RET_FAILURE;
+ }
+ return CMD_RET_SUCCESS;
+}
+
+static int check_sandbox_dev(struct sandbox_ffa_prvdata *sdx_prvdata, struct
unit_test_state *uts)
+{
+ if (!sdx_prvdata->dev) {
+ char msg[LOG_MSG_SZ] = {0};
+
+ snprintf(msg, LOG_MSG_SZ, "[%s]: Error: sandbox device NULL",
__func__);
+ dm_test_ffa_log(uts, msg);
+ return CMD_RET_FAILURE;
+ }
+ return CMD_RET_SUCCESS;
+}
+
+static int check_rxtxbuf(struct ffa_prvdata *prvdata, struct unit_test_state
*uts)
+{
+ if (!prvdata->pair.rxbuf && prvdata->pair.txbuf) {
+ char msg[LOG_MSG_SZ] = {0};
+
+ snprintf(msg, LOG_MSG_SZ, "[%s]: Error: rxbuf = 0x%llx txbuf =
0x%llx", __func__,
+prvdata->pair.rxbuf,
+prvdata->pair.txbuf);
+ dm_test_ffa_log(uts, msg);
+ return CMD_RET_FAILURE;
+ }
+ return CMD_RET_SUCCESS;
+}
+
+static int check_features(struct ffa_prvdata *prvdata, struct unit_test_state
*uts)
+{
+ char msg[LOG_MSG_SZ] = {0};
+
+ if (prvdata->pair.rxtx_min_pages != RXTX_4K &&
+ prvdata->pair.rxtx_min_pages != RXTX_16K &&
+ prvdata->pair.rxtx_m
[PATCH v5 08/10] arm_ffa: introduce armffa command Sandbox test
Add Sandbox test for the armffa command
Signed-off-by: Abdellatif El Khlifi
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
---
Changelog:
===
v4: drop use of helper APIs
v1: introduce armffa command sandbox test
MAINTAINERS | 1 +
test/cmd/Makefile | 2 ++
test/cmd/armffa.c | 40
3 files changed, 43 insertions(+)
create mode 100644 test/cmd/armffa.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 8c0dfff5f8..8ed94da4c8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -256,6 +256,7 @@ F: doc/README.ffa.drv
F: drivers/firmware/arm-ffa/
F: include/arm_ffa.h
F: include/sandbox_arm_ffa.h
+F: test/cmd/armffa.c
F: test/dm/ffa.c
ARM FREESCALE IMX
diff --git a/test/cmd/Makefile b/test/cmd/Makefile
index c331757425..19e9d0a995 100644
--- a/test/cmd/Makefile
+++ b/test/cmd/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (c) 2013 Google, Inc
+# (C) Copyright 2022 ARM Limited
ifdef CONFIG_HUSH_PARSER
obj-$(CONFIG_CONSOLE_RECORD) += test_echo.o
@@ -13,3 +14,4 @@ obj-$(CONFIG_CMD_MEM_SEARCH) += mem_search.o
obj-$(CONFIG_CMD_PINMUX) += pinmux.o
obj-$(CONFIG_CMD_PWM) += pwm.o
obj-$(CONFIG_CMD_SETEXPR) += setexpr.o
+obj-$(CONFIG_SANDBOX_FFA) += armffa.o
diff --git a/test/cmd/armffa.c b/test/cmd/armffa.c
new file mode 100644
index 00..531f82066e
--- /dev/null
+++ b/test/cmd/armffa.c
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Test for armffa command
+ *
+ * (C) Copyright 2022 ARM Limited
+ * Abdellatif El Khlifi
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define PING_CMD_SIZE 19
+
+/* Basic test of 'armffa' command */
+static int dm_test_armffa_cmd(struct unit_test_state *uts)
+{
+ char ping_cmd[PING_CMD_SIZE] = {0};
+
+ ut_assertok(ffa_bus_discover());
+
+ /* armffa getpart */
+ ut_assertok(run_command("armffa getpart " SANDBOX_SERVICE1_UUID, 0));
+
+ snprintf(ping_cmd, PING_CMD_SIZE, "armffa ping 0x%x", SANDBOX_SP1_ID);
+
+ /* armffa ping */
+ ut_assertok(run_command(ping_cmd, 0));
+
+ /* armffa devlist */
+ ut_assertok(run_command("armffa devlist", 0));
+
+ return CMD_RET_SUCCESS;
+}
+
+DM_TEST(dm_test_armffa_cmd, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
--
2.17.1
[PATCH v5 06/10] arm_ffa: introduce the FF-A Sandbox driver
Provide a Sandbox driver to emulate the FF-A ABIs
The emulated ABIs are those supported by the FF-A core driver
and according to FF-A specification v1.0.
The Sandbox driver provides operations allowing the test
application to read the status of all the inspected ABIs
and perform functional tests based on that.
Signed-off-by: Abdellatif El Khlifi
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
---
Changelog:
===
v4: align sandbox driver with the new FF-A driver interfaces
and new way of error handling
v1: introduce the sandbox driver
MAINTAINERS | 1 +
common/board_r.c | 2 +-
configs/sandbox64_defconfig | 2 +
configs/sandbox_defconfig | 2 +
doc/arch/sandbox.rst | 1 +
drivers/firmware/arm-ffa/Kconfig | 10 +-
drivers/firmware/arm-ffa/Makefile | 1 +
drivers/firmware/arm-ffa/arm_ffa_prv.h| 15 +-
drivers/firmware/arm-ffa/core.c | 24 +-
drivers/firmware/arm-ffa/sandbox.c| 659 ++
.../firmware/arm-ffa/sandbox_arm_ffa_prv.h| 144
include/arm_ffa.h | 2 +-
include/sandbox_arm_ffa.h | 91 +++
lib/efi_loader/efi_boottime.c | 2 +-
14 files changed, 941 insertions(+), 15 deletions(-)
create mode 100644 drivers/firmware/arm-ffa/sandbox.c
create mode 100644 drivers/firmware/arm-ffa/sandbox_arm_ffa_prv.h
create mode 100644 include/sandbox_arm_ffa.h
diff --git a/MAINTAINERS b/MAINTAINERS
index fd3b2c4263..6f01002e34 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -255,6 +255,7 @@ F: cmd/armffa.c
F: doc/README.ffa.drv
F: drivers/firmware/arm-ffa/
F: include/arm_ffa.h
+F: include/sandbox_arm_ffa.h
ARM FREESCALE IMX
M: Stefano Babic
diff --git a/common/board_r.c b/common/board_r.c
index 8c99faddfd..7f1eae65df 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -776,7 +776,7 @@ static init_fnc_t init_sequence_r[] = {
INIT_FUNC_WATCHDOG_RESET
initr_net,
#endif
-#ifdef CONFIG_ARM_FFA_TRANSPORT
+#if defined(CONFIG_ARM_FFA_TRANSPORT) && !defined(CONFIG_SANDBOX_FFA)
ffa_bus_discover,
#endif
#ifdef CONFIG_POST
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 290d1506c2..36e6448968 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -248,3 +248,5 @@ CONFIG_TEST_FDTDEC=y
CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
+CONFIG_ARM_FFA_TRANSPORT=y
+CONFIG_SANDBOX_FFA=y
\ No newline at end of file
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index ab5d3f19bf..8bf3848788 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -328,3 +328,5 @@ CONFIG_TEST_FDTDEC=y
CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
+CONFIG_ARM_FFA_TRANSPORT=y
+CONFIG_SANDBOX_FFA=y
\ No newline at end of file
diff --git a/doc/arch/sandbox.rst b/doc/arch/sandbox.rst
index 068d4a3be4..5d7e1b2c48 100644
--- a/doc/arch/sandbox.rst
+++ b/doc/arch/sandbox.rst
@@ -203,6 +203,7 @@ Supported Drivers
U-Boot sandbox supports these emulations:
+- Arm FF-A
- Block devices
- Chrome OS EC
- GPIO
diff --git a/drivers/firmware/arm-ffa/Kconfig b/drivers/firmware/arm-ffa/Kconfig
index 40b467b0a5..263481de96 100644
--- a/drivers/firmware/arm-ffa/Kconfig
+++ b/drivers/firmware/arm-ffa/Kconfig
@@ -2,8 +2,8 @@
config ARM_FFA_TRANSPORT
bool "Enable Arm Firmware Framework for Armv8-A driver"
- depends on DM && ARM64
- select ARM_SMCCC
+ depends on DM && (ARM64 || SANDBOX)
+ select ARM_SMCCC if !SANDBOX
select CMD_ARMFFA
select LIB_UUID
select DEVRES
@@ -38,3 +38,9 @@ config ARM_FFA_EFI_RUNTIME_MODE
The driver Code needed at runtime is placed at EFI runtime code
section.
Turning this on makes ffa_copy_runtime_data available for use and the
driver
code placed at EFI runtime code section.
+
+config SANDBOX_FFA
+ bool "FF-A Sandbox driver"
+ depends on ARM_FFA_TRANSPORT && SANDBOX
+ help
+ This emulates the FF-A handling under Sandbox and allows to test the
FF-A driver
diff --git a/drivers/firmware/arm-ffa/Makefile
b/drivers/firmware/arm-ffa/Makefile
index 0b9b0a61b4..d50060b836 100644
--- a/drivers/firmware/arm-ffa/Makefile
+++ b/drivers/firmware/arm-ffa/Makefile
@@ -5,3 +5,4 @@
obj-y += arm-ffa-uclass.o core.o
obj-$(CONFIG_ARM_FFA_EFI_RUNTIME_MODE) += efi_ffa_runtime_data_mgr.o
+obj-$(CONFIG_SANDBOX_FFA) += sandbox.o
diff --git a/drivers/firmware/arm-ffa/arm_ffa_prv.h
b/drivers/firmware/arm-ffa/arm_ffa_prv.h
index 7bc90f7f66..3e0d4c112c 100644
--- a/drivers/firmware/arm-ffa/arm_ffa_prv.h
+++ b/drivers/firmware/arm-ffa/arm_ffa_prv.h
@@ -19,6 +19,16 @@
/* FF-A core driver name */
#define FFA_DRV_NAME "arm_ffa"
+/* The FF-A SMC function definitions
[PATCH v5 04/10] arm_ffa: introduce Arm FF-A low-level driver
Add the driver implementing Arm Firmware Framework for Armv8-A v1.0
The Firmware Framework for Arm A-profile processors (FF-A v1.0) [1]
describes interfaces (ABIs) that standardize communication
between the Secure World and Normal World leveraging TrustZone
technology.
This driver uses 64-bit registers as per SMCCCv1.2 spec and comes
on top of the SMCCC layer. The driver provides the FF-A ABIs needed for
querying the FF-A framework from the secure world.
32-bit version of the ABIs is supported and 64-bit version of FFA_RXTX_MAP
and FFA_MSG_SEND_DIRECT_{REQ, RESP}.
In u-boot FF-A design, FF-A is considered as a discoverable bus.
The Secure World is considered as one entity to communicate with
using the FF-A bus. FF-A communication is handled by one device and
one instance (the bus). This FF-A driver takes care of all the
interactions between Normal world and Secure World.
The driver exports its operations to be used by upper layers.
Exported operations:
- partition_info_get
- sync_send_receive
- rxtx_unmap
This implementation provides an optional feature to copy the driver data
to EFI runtime area.
[1]: https://developer.arm.com/documentation/den0077/latest/
Signed-off-by: Abdellatif El Khlifi
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
---
Changelog:
===
v4:
* add doc/README.ffa.drv
* moving the FF-A driver work to drivers/firmware/arm-ffa
* use less #ifdefs in lib/efi_loader/efi_boottime.c and replace
#if defined by #if CONFIG_IS_ENABLED
* improving error handling by mapping the FF-A errors to standard errors
and logs
* replacing panics with an error log and returning an error code
* improving features discovery in FFA_FEATURES by introducing
rxtx_min_pages private data field
* add ffa_remove and ffa_bind functions
* improve how the driver behaves when bus discovery is done more than
once
v3:
* align the interfaces of the u-boot FF-A driver with those in the linux
FF-A driver
* remove the FF-A helper layer
* make the u-boot FF-A driver independent from EFI
* provide an optional config that enables copying the driver data to EFI
runtime section at ExitBootServices service
* use 64-bit version of FFA_RXTX_MAP, FFA_MSG_SEND_DIRECT_{REQ, RESP}
v2:
* make FF-A bus discoverable using device_{bind, probe} APIs
* remove device tree support
v1:
* introduce FF-A bus driver with device tree support
MAINTAINERS |7 +
common/board_r.c |9 +
doc/README.ffa.drv| 160 ++
drivers/Kconfig |2 +
drivers/Makefile |1 +
drivers/firmware/arm-ffa/Kconfig | 39 +
drivers/firmware/arm-ffa/Makefile |7 +
drivers/firmware/arm-ffa/arm-ffa-uclass.c | 16 +
drivers/firmware/arm-ffa/arm_ffa_prv.h| 196 +++
drivers/firmware/arm-ffa/core.c | 1344 +
.../arm-ffa/efi_ffa_runtime_data_mgr.c| 94 ++
include/arm_ffa.h | 127 ++
include/dm/uclass-id.h|4 +
lib/efi_loader/efi_boottime.c | 15 +
14 files changed, 2021 insertions(+)
create mode 100644 doc/README.ffa.drv
create mode 100644 drivers/firmware/arm-ffa/Kconfig
create mode 100644 drivers/firmware/arm-ffa/Makefile
create mode 100644 drivers/firmware/arm-ffa/arm-ffa-uclass.c
create mode 100644 drivers/firmware/arm-ffa/arm_ffa_prv.h
create mode 100644 drivers/firmware/arm-ffa/core.c
create mode 100644 drivers/firmware/arm-ffa/efi_ffa_runtime_data_mgr.c
create mode 100644 include/arm_ffa.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 83346183ee..02b84d5074 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -248,6 +248,13 @@ F: drivers/net/cortina_ni.h
F: drivers/net/phy/ca_phy.c
F: configs/cortina_presidio-asic-pnand_defconfig
+ARM FF-A
+M: Abdellatif El Khlifi
+S: Maintained
+F: doc/README.ffa.drv
+F: drivers/firmware/arm-ffa/
+F: include/arm_ffa.h
+
ARM FREESCALE IMX
M: Stefano Babic
M: Fabio Estevam
diff --git a/common/board_r.c b/common/board_r.c
index 56eb60fa27..8c99faddfd 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -7,6 +7,8 @@
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH
* Marius Groeger
+ *
+ * (C) Copyright 2022 ARM Limited
*/
#include
@@ -66,6 +68,10 @@
#include
#include
+#ifdef CONFIG_ARM_FFA_TRANSPORT
+#include
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
ulong monitor_flash_len;
@@ -770,6 +776,9 @@ static init_fnc_t init_sequence_r[] = {
INIT_FUNC_WATCHDOG_RESET
initr_net,
#endif
+#ifdef CONFIG_ARM_FFA_TRANSPORT
+ ffa_bus_discover,
+#endif
#ifdef CONFIG_POST
initr_post,
#endif
diff --git a/doc/README.ffa.drv b/doc/README.ffa.drv
new file mode 100644
index 00..1c0a33deb8
--- /dev/null
+++ b/doc/README.ffa.drv
@@ -0,0 +1,160 @@
+Arm FF-A Driver
+
[PATCH v5 05/10] arm_ffa: introduce armffa command
Provide armffa command showcasing the use of the FF-A driver
The armffa command allows to query secure partitions data from
the secure world and exchanging messages with the partitions.
Signed-off-by: Abdellatif El Khlifi
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
---
Changelog:
===
v4:
* remove pattern data in do_ffa_msg_send_direct_req
v3:
* use the new driver interfaces (partition_info_get, sync_send_receive)
in armffa command
v2:
* replace use of ffa_helper_init_device function by
ffa_helper_bus_discover
v1:
* introduce armffa command
MAINTAINERS | 1 +
cmd/Kconfig | 10 ++
cmd/Makefile | 2 +
cmd/armffa.c | 242 +++
drivers/firmware/arm-ffa/Kconfig | 1 +
5 files changed, 256 insertions(+)
create mode 100644 cmd/armffa.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 02b84d5074..fd3b2c4263 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -251,6 +251,7 @@ F: configs/cortina_presidio-asic-pnand_defconfig
ARM FF-A
M: Abdellatif El Khlifi
S: Maintained
+F: cmd/armffa.c
F: doc/README.ffa.drv
F: drivers/firmware/arm-ffa/
F: include/arm_ffa.h
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 0e0be94f41..013d4c3da7 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -912,6 +912,16 @@ endmenu
menu "Device access commands"
+config CMD_ARMFFA
+ bool "Arm FF-A test command"
+ depends on ARM_FFA_TRANSPORT
+ help
+ Provides a test command for the Arm FF-A driver
+ supported options:
+ - Listing the partition(s) info
+ - Sending a data pattern to the specified partition
+ - Displaying the arm_ffa device info
+
config CMD_ARMFLASH
#depends on FLASH_CFI_DRIVER
bool "armflash"
diff --git a/cmd/Makefile b/cmd/Makefile
index 6e87522b62..979c6d59df 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -12,6 +12,8 @@ obj-y += panic.o
obj-y += version.o
# command
+
+obj-$(CONFIG_CMD_ARMFFA) += armffa.o
obj-$(CONFIG_CMD_ACPI) += acpi.o
obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o
obj-$(CONFIG_CMD_AES) += aes.o
diff --git a/cmd/armffa.c b/cmd/armffa.c
new file mode 100644
index 00..9b56e8a830
--- /dev/null
+++ b/cmd/armffa.c
@@ -0,0 +1,242 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2022 ARM Limited
+ * Abdellatif El Khlifi
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/**
+ * do_ffa_get_singular_partition_info - implementation of the getpart
subcommand
+ * @cmdtp: Command Table
+ * @flag: flags
+ * @argc: number of arguments
+ * @argv: arguments
+ *
+ * This function queries the secure partition information which the UUID is
provided
+ * as an argument. The function uses the arm_ffa driver partition_info_get
operation
+ * to retrieve the data.
+ * The input UUID string is expected to be in big endian format.
+ *
+ * Return:
+ *
+ * CMD_RET_SUCCESS: on success, otherwise failure
+ */
+static int do_ffa_get_singular_partition_info(struct cmd_tbl *cmdtp, int flag,
int argc,
+ char *const argv[])
+{
+ u32 count = 0, size = 0;
+ int ret;
+ struct ffa_partition_info *parts_info;
+ u32 info_idx;
+
+ if (argc != 1)
+ return -EINVAL;
+
+ /* Mode 1: getting the number of secure partitions */
+ ret = ffa_bus_ops_get()->partition_info_get(argv[0], &count, NULL);
+ if (ret != 0) {
+ ffa_err("Failure in querying partitions count (error code:
%d)", ret);
+ return ret;
+ }
+
+ if (!count) {
+ ffa_info("No secure partition found");
+ return ret;
+ }
+
+ /*
+* pre-allocate a buffer to be filled by the driver
+* with ffa_partition_info structs
+*/
+
+ ffa_info("Pre-allocating %d partition(s) info structures", count);
+
+ parts_info = calloc(count, sizeof(struct ffa_partition_info));
+ if (!parts_info)
+ return -EINVAL;
+
+ size = count * sizeof(struct ffa_partition_info);
+
+ /*
+* ask the driver to fill the buffer with the SPs info
+*/
+
+ ret = ffa_bus_ops_get()->partition_info_get(argv[0], &size, parts_info);
+ if (ret != 0) {
+ ffa_err("Failure in querying partition(s) info (error code:
%d)", ret);
+ free(parts_info);
+ return ret;
+ }
+
+ /*
+* SPs found , show the partition information
+*/
+ for (info_idx = 0; info_idx < count ; info_idx++) {
+ ffa_info("Partition: id = 0x%x , exec_ctxt 0x%x , properties
0x%x",
+parts_info[info_idx].id,
+parts_info[info_idx].exec_ctxt,
+parts_info[info_idx].prope
[PATCH v5 03/10] lib: uuid: introduce be_uuid_str_to_le_bin function
convert big endian UUID string to little endian buffer
Signed-off-by: Abdellatif El Khlifi
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
---
Changelog:
===
v4:
* rename ffa_uuid_str_to_bin to be_uuid_str_to_le_bin and put in
a standalone commit (the current)
v3:
* introduce ffa_uuid_str_to_bin (provided by
arm_ffa: introduce Arm FF-A low-level driver)
include/uuid.h | 8 +++
lib/uuid.c | 64 ++
2 files changed, 72 insertions(+)
diff --git a/include/uuid.h b/include/uuid.h
index 4a4883d3b5..ad3af350f9 100644
--- a/include/uuid.h
+++ b/include/uuid.h
@@ -2,6 +2,8 @@
/*
* Copyright (C) 2014 Samsung Electronics
* Przemyslaw Marczak
+ * (C) Copyright 2022 ARM Limited
+ * Abdellatif El Khlifi
*/
#ifndef __UUID_H__
#define __UUID_H__
@@ -44,4 +46,10 @@ int uuid_guid_get_bin(const char *guid_str, unsigned char
*guid_bin);
const char *uuid_guid_get_str(const unsigned char *guid_bin);
void gen_rand_uuid(unsigned char *uuid_bin);
void gen_rand_uuid_str(char *uuid_str, int str_format);
+
+/**
+ * be_uuid_str_to_le_bin - Converts a big endian UUID string to a little
endian buffer
+ */
+int be_uuid_str_to_le_bin(const char *uuid_str, unsigned char *uuid_bin);
+
#endif
diff --git a/lib/uuid.c b/lib/uuid.c
index 465e1ac38f..15a9ab49d5 100644
--- a/lib/uuid.c
+++ b/lib/uuid.c
@@ -1,6 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2011 Calxeda, Inc.
+ * (C) Copyright 2022 ARM Limited
+ * Abdellatif El Khlifi
*/
#include
@@ -346,6 +348,68 @@ int uuid_str_to_bin(const char *uuid_str, unsigned char
*uuid_bin,
return 0;
}
+/**
+ * be_uuid_str_to_le_bin - Converts a big endian UUID string to a little
endian buffer
+ * @uuid_str: UUID string in big endian format (36 bytes wide + '/0')
+ * @uuid_bin: preallocated 16 bytes UUID buffer in little endian format
+ *
+ * UUID string is 36 characters (36 bytes):
+ *
+ * ----
+ * be be be be be
+ *
+ * where x is a hexadecimal character. Fields are separated by '-'s.
+ * When converting to a binary UUID, these endianness rules apply:
+ * be: means the field in the string is considered a big endian hex number
+ *and should be converted to little endian binary format
+ *
+ * Return:
+ *
+ *uuid_bin filled with little endian UUID data
+ *On success 0 is returned. Otherwise, failure code.
+ */
+int be_uuid_str_to_le_bin(const char *uuid_str, unsigned char *uuid_bin)
+{
+ u16 tmp16 = 0;
+ u32 tmp32 = 0;
+ u64 tmp64 = 0;
+
+ if (!uuid_str_valid(uuid_str) || !uuid_bin)
+ return -EINVAL;
+
+ /*
+* reverse bytes from big to little endian
+*/
+ tmp32 = simple_strtoul(uuid_str, NULL, 16);
+ memcpy(uuid_bin, &tmp32, 4);
+
+ /*
+* reverse bytes from big to little endian
+*/
+ tmp16 = simple_strtoul(uuid_str + 9, NULL, 16);
+ memcpy(uuid_bin + 4, &tmp16, 2);
+
+ /*
+* reverse bytes from big to little endian
+*/
+ tmp16 = simple_strtoul(uuid_str + 14, NULL, 16);
+ memcpy(uuid_bin + 6, &tmp16, 2);
+
+ /*
+* reverse bytes from big to little endian
+*/
+ tmp16 = simple_strtoul(uuid_str + 19, NULL, 16);
+ memcpy(uuid_bin + 8, &tmp16, 2);
+
+ /*
+* reverse bytes from big to little endian
+*/
+ tmp64 = simple_strtoull(uuid_str + 24, NULL, 16);
+ memcpy(uuid_bin + 10, (char *)&tmp64, 6);
+
+ return 0;
+}
+
/*
* uuid_bin_to_str() - convert big endian binary data to string UUID or GUID.
*
--
2.17.1
[PATCH v5 02/10] arm64: smccc: clear the Xn registers after SMC calls
set to zero the x0-x17 registers As per the SMCCC v1.2 spec, unused result and scratch registers can leak information after an SMC call. We can mitigate against this risk by returning zero in each register. The leakage we are referring to is data leakage across exception levels. The intent is to prevent lower exception levels (EL1/EL0) from reading the SMC data exchanged at EL2. Signed-off-by: Abdellatif El Khlifi Cc: Tom Rini Cc: Simon Glass Cc: Ilias Apalodimas Cc: Jens Wiklander --- Changelog: === v4: * move the clearing code into a new macro: clear_gp_regs v3: * clear the Xn registers after SMC calls arch/arm/cpu/armv8/smccc-call.S | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/cpu/armv8/smccc-call.S b/arch/arm/cpu/armv8/smccc-call.S index ec6f299bc9..32f3eb8eeb 100644 --- a/arch/arm/cpu/armv8/smccc-call.S +++ b/arch/arm/cpu/armv8/smccc-call.S @@ -50,6 +50,12 @@ ENDPROC(__arm_smccc_hvc) #ifdef CONFIG_ARM64 + .macro clear_gp_regs + .irpn,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17 + mov x\n, xzr + .endr + .endm + .macro SMCCC_1_2 instr /* Save `res` and free a GPR that won't be clobbered */ stp x1, x19, [sp, #-16]! @@ -84,6 +90,9 @@ ENDPROC(__arm_smccc_hvc) stp x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS] stp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS] + /* x0-x17 registers can leak information after an SMC or HVC call. Let's clear them */ + clear_gp_regs + /* Restore original x19 */ ldp xzr, x19, [sp], #16 ret -- 2.17.1
[PATCH v5 01/10] arm64: smccc: add support for SMCCCv1.2 x0-x17 registers
add support for x0-x17 registers used by the SMC calls In SMCCC v1.2 [1] arguments are passed in registers x1-x17. Results are returned in x0-x17. This work is inspired from the following kernel commit: arm64: smccc: Add support for SMCCCv1.2 extended input/output registers [1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token= Signed-off-by: Abdellatif El Khlifi Cc: Tom Rini Cc: Simon Glass Cc: Ilias Apalodimas Cc: Jens Wiklander --- Changelog: === v4: * rename the commit title and improve description new commit title: the current v3: * port x0-x17 registers support from linux kernel as defined by SMCCCv1.2 commit title: arm64: smccc: add Xn registers support used by SMC calls arch/arm/cpu/armv8/smccc-call.S | 53 + arch/arm/lib/asm-offsets.c | 14 + include/linux/arm-smccc.h | 43 ++ 3 files changed, 110 insertions(+) diff --git a/arch/arm/cpu/armv8/smccc-call.S b/arch/arm/cpu/armv8/smccc-call.S index dc92b28777..ec6f299bc9 100644 --- a/arch/arm/cpu/armv8/smccc-call.S +++ b/arch/arm/cpu/armv8/smccc-call.S @@ -1,6 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2015, Linaro Limited + * (C) Copyright 2022 ARM Limited + * Abdellatif El Khlifi */ #include #include @@ -45,3 +47,54 @@ ENDPROC(__arm_smccc_smc) ENTRY(__arm_smccc_hvc) SMCCC hvc ENDPROC(__arm_smccc_hvc) + +#ifdef CONFIG_ARM64 + + .macro SMCCC_1_2 instr + /* Save `res` and free a GPR that won't be clobbered */ + stp x1, x19, [sp, #-16]! + + /* Ensure `args` won't be clobbered while loading regs in next step */ + mov x19, x0 + + /* Load the registers x0 - x17 from the struct arm_smccc_1_2_regs */ + ldp x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS] + ldp x2, x3, [x19, #ARM_SMCCC_1_2_REGS_X2_OFFS] + ldp x4, x5, [x19, #ARM_SMCCC_1_2_REGS_X4_OFFS] + ldp x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS] + ldp x8, x9, [x19, #ARM_SMCCC_1_2_REGS_X8_OFFS] + ldp x10, x11, [x19, #ARM_SMCCC_1_2_REGS_X10_OFFS] + ldp x12, x13, [x19, #ARM_SMCCC_1_2_REGS_X12_OFFS] + ldp x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS] + ldp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS] + + \instr #0 + + /* Load the `res` from the stack */ + ldr x19, [sp] + + /* Store the registers x0 - x17 into the result structure */ + stp x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS] + stp x2, x3, [x19, #ARM_SMCCC_1_2_REGS_X2_OFFS] + stp x4, x5, [x19, #ARM_SMCCC_1_2_REGS_X4_OFFS] + stp x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS] + stp x8, x9, [x19, #ARM_SMCCC_1_2_REGS_X8_OFFS] + stp x10, x11, [x19, #ARM_SMCCC_1_2_REGS_X10_OFFS] + stp x12, x13, [x19, #ARM_SMCCC_1_2_REGS_X12_OFFS] + stp x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS] + stp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS] + + /* Restore original x19 */ + ldp xzr, x19, [sp], #16 + ret + .endm + +/* + * void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args, + * struct arm_smccc_1_2_regs *res); + */ +ENTRY(arm_smccc_1_2_smc) + SMCCC_1_2 smc +ENDPROC(arm_smccc_1_2_smc) + +#endif diff --git a/arch/arm/lib/asm-offsets.c b/arch/arm/lib/asm-offsets.c index 22fd541f9a..1bc2d90faa 100644 --- a/arch/arm/lib/asm-offsets.c +++ b/arch/arm/lib/asm-offsets.c @@ -9,6 +9,9 @@ * generate asm statements containing #defines, * compile this file to assembler, and then extract the * #defines from the assembly-language output. + * + * (C) Copyright 2022 ARM Limited + * Abdellatif El Khlifi */ #include @@ -117,6 +120,17 @@ int main(void) DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2)); DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id)); DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state)); + #ifdef CONFIG_ARM64 + DEFINE(ARM_SMCCC_1_2_REGS_X0_OFFS, offsetof(struct arm_smccc_1_2_regs, a0)); + DEFINE(ARM_SMCCC_1_2_REGS_X2_OFFS, offsetof(struct arm_smccc_1_2_regs, a2)); + DEFINE(ARM_SMCCC_1_2_REGS_X4_OFFS, offsetof(struct arm_smccc_1_2_regs, a4)); + DEFINE(ARM_SMCCC_1_2_REGS_X6_OFFS, offsetof(struct arm_smccc_1_2_regs, a6)); + DEFINE(ARM_SMCCC_1_2_REGS_X8_OFFS, offsetof(struct arm_smccc_1_2_regs, a8)); + DEFINE(ARM_SMCCC_1_2_REGS_X10_OFFS, offsetof(struct arm_smccc_1_2_regs, a10)); + DEFINE(ARM_SMCCC_1_2_REGS_X12_OFFS, offsetof(struct arm_smccc_1_2_regs, a12)); + DEFINE(ARM_SMCCC_1_2_REGS_X14_OFFS, offsetof(struct arm_smccc_1_2_regs, a14)); + DEFINE(ARM_SMCCC_1_2_REGS_X16_OFFS, offsetof(struct arm_smccc_1_2_regs, a16))
[PATCH v5 00/10] introduce Arm FF-A support
Moving the changelogs in each commit to the changes section.
No code change in v5.
Changelog of the major changes:
===
v5:
* move changelogs in each commit to the changes section
v4: [4]
* add FF-A support README (doc/README.ffa.drv)
* improving error handling by mapping the FF-A errors to standard errors
and logs
* replacing panics with an error log
* align sandbox driver and tests with the new FF-A driver interfaces
and new way of error handling
* use the new FF-A driver interfaces for MM communication
* discover MM partitions at runtime
* copy FF-A driver private data to EFI runtime section at
ExitBootServices()
* moving the FF-A driver work to drivers/firmware/arm-ffa
* improving features discovery in FFA_FEATURES
* add remove/bind functions to the FF-A core device
* improve how the driver behaves when bus discovery is done more than
once
* move clearing x0-x17 registers code into a new macro like done in
the linux kernel
* enable EFI MM communication for the Corstone1000 platform
v3: [3]
* port x0-x17 registers support from linux kernel as defined by
SMCCCv1.2
* align the interfaces of the u-boot FF-A driver with those in the linux
FF-A driver
* remove the FF-A helper layer
* make the u-boot FF-A driver independent from EFI
* provide an optional config that enables copying the driver data to
EFI runtime section at ExitBootServices service
* use 64-bit version of FFA_RXTX_MAP, FFA_MSG_SEND_DIRECT_{REQ, RESP}
* update armffa command with the new driver interfaces
v2 [2]:
* make FF-A bus discoverable using device_{bind, probe} APIs
* remove device tree support
v1 [1]:
* introduce FF-A bus driver with device tree support
* introduce armffa command
* introduce FF-A Sandbox driver
* add FF-A Sandbox test cases
* introduce FF-A MM communication
Cheers,
Abdellatif
[1]:
https://lore.kernel.org/all/20220329151659.16894-1-abdellatif.elkhl...@arm.com/
[2]:
https://lore.kernel.org/all/20220415122803.1-1-abdellatif.elkhl...@arm.com/
[3]:
https://lore.kernel.org/all/20220801172053.20163-1-abdellatif.elkhl...@arm.com/
[4]:
https://lore.kernel.org/all/20220926101723.9965-1-abdellatif.elkhl...@arm.com/
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
Cc: Achin Gupta
Cc: Vishnu Banavath
Cc: Xueliang Zhong
Abdellatif El Khlifi (10):
arm64: smccc: add support for SMCCCv1.2 x0-x17 registers
arm64: smccc: clear the Xn registers after SMC calls
lib: uuid: introduce be_uuid_str_to_le_bin function
arm_ffa: introduce Arm FF-A low-level driver
arm_ffa: introduce armffa command
arm_ffa: introduce the FF-A Sandbox driver
arm_ffa: introduce Sandbox test cases for UCLASS_FFA
arm_ffa: introduce armffa command Sandbox test
arm_ffa: introduce FF-A MM communication
arm_ffa: corstone1000: enable EFI MM communication
MAINTAINERS | 11 +
arch/arm/cpu/armv8/cache.S| 19 +
arch/arm/cpu/armv8/cache_v8.c |6 +-
arch/arm/cpu/armv8/smccc-call.S | 62 +
arch/arm/lib/asm-offsets.c| 14 +
cmd/Kconfig | 10 +
cmd/Makefile |2 +
cmd/armffa.c | 242 +++
common/board_r.c |9 +
configs/corstone1000_defconfig|4 +
configs/sandbox64_defconfig |2 +
configs/sandbox_defconfig |2 +
doc/README.ffa.drv| 160 ++
doc/arch/sandbox.rst |1 +
drivers/Kconfig |2 +
drivers/Makefile |1 +
drivers/firmware/arm-ffa/Kconfig | 46 +
drivers/firmware/arm-ffa/Makefile |8 +
drivers/firmware/arm-ffa/arm-ffa-uclass.c | 16 +
drivers/firmware/arm-ffa/arm_ffa_prv.h| 201 +++
drivers/firmware/arm-ffa/core.c | 1358 +
.../arm-ffa/efi_ffa_runtime_data_mgr.c| 94 ++
drivers/firmware/arm-ffa/sandbox.c| 659
.../firmware/arm-ffa/sandbox_arm_ffa_prv.h| 144 ++
include/arm_ffa.h | 127 ++
include/configs/corstone1000.h|9 +
include/dm/uclass-id.h|4 +
include/linux/arm-smccc.h | 43 +
include/mm_communication.h|9 +-
include/sandbox_arm_ffa.h | 91 ++
include/uuid.h|8 +
lib/efi_loader/Kconfig| 14 +-
lib/efi_loader/efi_boottime.c | 22 +
lib/efi_loader/efi_variable_tee.c | 263 +++-
lib/uuid.c| 64 +
test/cmd/Makefile |2 +
test/cmd/armffa.c | 40 +
test/dm/Makefile
Re: [PATCH v10 09/15] FWU: Add boot time checks as highlighted by the FWU specification
On Mon, Sep 26, 2022 at 5:08 AM Sughosh Ganu wrote:
>
> On Mon, 26 Sept 2022 at 08:29, Jassi Brar wrote:
> > .
> > > +static int fwu_boottime_checks(void *ctx, struct event *event)
> > > +{
> > > + int ret;
> > > + struct udevice *dev;
> > > + u32 boot_idx, active_idx;
> > > +
> > > + ret = fwu_get_dev_mdata(&dev, NULL);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + ret = fwu_mdata_check(dev);
> > > + if (ret) {
> > > + return 0;
> > > + }
> > > +
> > > + /*
> > > +* Get the Boot Index, i.e. the bank from
> > > +* which the platform has booted. This value
> > > +* gets passed from the ealier stage bootloader
> > > +* which booted u-boot, e.g. tf-a. If the
> > > +* boot index is not the same as the
> > > +* active_index read from the FWU metadata,
> > > +* update the active_index.
> > > +*/
> > > + fwu_plat_get_bootidx(&boot_idx);
> > > + if (boot_idx >= CONFIG_FWU_NUM_BANKS) {
> > > + log_err("Received incorrect value of boot_index\n");
> > > + return 0;
> > > + }
> > > +
> > > + ret = fwu_get_active_index(&active_idx);
> > > + if (ret) {
> > > + log_err("Unable to read active_index\n");
> > > + return 0;
> > > + }
> > > +
> > > + if (boot_idx != active_idx) {
> > > + log_info("Boot idx %u is not matching active idx %u,
> > > changing active_idx\n",
> > > +boot_idx, active_idx);
> > > + ret = fwu_update_active_index(boot_idx);
> > > + if (!ret)
> > > + boottime_check = 1;
> > >
> > We may not want to do anything FWU (accept, reject, modify mdata)
> > until we reboot, if we are recovering from last bad upgrade. So maybe
> > not set boottime_check
>
> Actually, the difference between the boot bank and active bank will
> happen when there is some kind of corruption on the media due to which
> the platform could not boot from the active bank(could also be due to
> repeated wd timeouts).
>
... which may have been caused by the last upgrade attempt, among other reasons.
fwu_trial_state_check() will never be called in this case and any
subsequent fwu_update_checks_pass() will pass even if we are in trial
state.
-j
[GIT PULL] xilinx patches for v2023.01-rc1 (round 2)
Hi Tom, please pull the following patches to your tree. It is the second round with small updates but especially adding new Xilinx SOC. CI loop doesn't show any issue. Thanks, Michal The following changes since commit ebdd6afa543324648138f780a648b8fb65d488eb: Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-marvell into next (2022-09-20 08:50:07 -0400) are available in the Git repository at: g...@source.denx.de:u-boot/custodians/u-boot-microblaze.git tags/xilinx-for-v2023.01-rc1-v2 for you to fetch changes up to f2641f066b53a2bbb933bccffd696a875fd9adf5: arm64: versal-net: Add support for mini configuration (2022-09-26 14:23:30 +0200) Xilinx changes for v2023.01-rc1 (round 2) xilinx: - Add support for new Versal NET SOC zynqmp: - Use mdio bus for ethernet phy description - Wire ethernet phy reset via i2c-gpio versal: - Config cleanup Jay Buddhabhatti (4): clk: versal: Enable clock driver for Versal NET firmware: zynqmp: Add Versal NET compatible string mailbox: zynqmp: Enable ipi mailbox driver for Versal NET reset: zynqmp: Enable reset driver for Versal NET Michal Simek (8): xilinx: versal: Remove unused comments from xilinx_versal.h arm64: zynqmp: Describe TI phy as ethernet-phy-id arm64: zynqmp: Wire GEM reset gpio arm64: versal-net: Add support for Versal NET platform spi: cadence_qspi: Add support for Versal NET platform spi: zynqmp_gqspi: Add support for Versal NET arm64: versal-net: Add defconfig for Versal NET arm64: versal-net: Add support for mini configuration Kconfig | 2 +- MAINTAINERS | 7 + arch/arm/Kconfig | 14 ++ arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 3 + arch/arm/dts/versal-net-mini.dts | 67 arch/arm/dts/xilinx-versal-net-virt.dts | 11 ++ arch/arm/dts/zynqmp-zcu102-revA.dts | 20 ++- arch/arm/dts/zynqmp-zcu104-revA.dts | 19 ++- arch/arm/dts/zynqmp-zcu104-revC.dts | 19 ++- arch/arm/dts/zynqmp-zcu111-revA.dts | 19 ++- arch/arm/dts/zynqmp-zcu208-revA.dts | 19 ++- arch/arm/dts/zynqmp-zcu216-revA.dts | 20 ++- arch/arm/mach-versal-net/Kconfig | 43 + arch/arm/mach-versal-net/Makefile | 10 ++ arch/arm/mach-versal-net/clk.c| 35 arch/arm/mach-versal-net/cpu.c| 89 ++ arch/arm/mach-versal-net/include/mach/hardware.h | 31 arch/arm/mach-versal-net/include/mach/sys_proto.h | 16 ++ board/xilinx/Kconfig | 6 +- board/xilinx/versal-net/Kconfig | 9 ++ board/xilinx/versal-net/MAINTAINERS | 8 + board/xilinx/versal-net/Makefile | 9 ++ board/xilinx/versal-net/board.c | 170 configs/xilinx_versal_net_mini_defconfig | 72 + configs/xilinx_versal_net_virt_defconfig | 131 +++ drivers/clk/Kconfig | 2 +- drivers/clk/clk_versal.c | 1 + drivers/firmware/firmware-zynqmp.c| 1 + drivers/mailbox/Kconfig | 2 +- drivers/reset/reset-zynqmp.c | 1 + drivers/spi/Kconfig | 2 +- drivers/spi/cadence_ospi_versal.c | 3 +- drivers/spi/zynqmp_gqspi.c| 3 +- env/Kconfig | 6 +- include/configs/xilinx_versal.h | 4 - include/configs/xilinx_versal_net.h | 134 +++ include/configs/xilinx_versal_net_mini.h | 21 +++ 38 files changed, 976 insertions(+), 54 deletions(-) create mode 100644 arch/arm/dts/versal-net-mini.dts create mode 100644 arch/arm/dts/xilinx-versal-net-virt.dts create mode 100644 arch/arm/mach-versal-net/Kconfig create mode 100644 arch/arm/mach-versal-net/Makefile create mode 100644 arch/arm/mach-versal-net/clk.c create mode 100644 arch/arm/mach-versal-net/cpu.c create mode 100644 arch/arm/mach-versal-net/include/mach/hardware.h create mode 100644 arch/arm/mach-versal-net/include/mach/sys_proto.h create mode 100644 board/xilinx/versal-net/Kconfig create mode 100644 board/xilinx/versal-net/MAINTAINERS create mode 100644 board/xilinx/versal-net/Makefile create mode 100644 board/xilinx/versal-net/board.c create mode 100644 configs/xilinx_versal_net_mini_defconfig create mode 100644 configs/xilinx_versal_net_virt_defconfig create mode 100644 include/configs/xilinx_versa
Re: Please pull u-boot-marvell/master
On Mon, Sep 26, 2022 at 01:59:09PM +0200, Stefan Roese wrote: > Hi Tom, > > please pull this Turris GPIO fix from Pali: > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PULL] u-boot-usb/master
On Mon, Sep 26, 2022 at 03:39:17AM +0200, Marek Vasut wrote: > One outstanding driver and one bugfix. > > The following changes since commit 435596d57f8beedf36b5dc858fe7ba9d6c03334b: > > Merge tag 'u-boot-imx-20220922' of > https://gitlab.denx.de/u-boot/custodians/u-boot-imx (2022-09-22 10:29:29 > -0400) > > are available in the Git repository at: > > git://source.denx.de/u-boot-usb.git master > > for you to fetch changes up to 206af3dec00071ec96c0fdec6c8dda3a039c07cf: > > Fix out of bound access of ep array. (2022-09-26 01:49:36 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 1/3] efi_loader: Add SPI I/O protocol support
On 9/21/22 18:06, Paul Barker wrote:
+
+ log_debug("Added EFI_SPI_IO_PROTOCOL for %s with guid "
+
"%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x\n",
+ name,
+ guid->b[3], guid->b[2], guid->b[1], guid->b[0],
+ guid->b[5], guid->b[4], guid->b[7], guid->b[6],
+ guid->b[8], guid->b[9], guid->b[10], guid->b[11],
+ guid->b[12], guid->b[13], guid->b[14], guid->b[15]);
+ return EFI_SUCCESS;
This should be
log_debug(Added EFI_SPI_IO_PROTOCOL for %s with guid %pD\n", guid);
Best regards
Heinrich
Re: [PATCH 07/10] board_f/r: Allow selection of CONFIG_TIMER_EARLY w/o CONFIG_TIMER
Hi Simon, On 25.09.22 16:15, Simon Glass wrote: Hi Stefan, On Wed, 21 Sept 2022 at 08:06, Stefan Roese wrote: The early timer functions provided via CONFIG_TIMER_EARLY don't need CONFIG_TIMER to be enabled, as they don't make use of the DM timer and uclass interface. This patch now allow the selection of CONFIG_TIMER_EARLY w/o CONFIG_TIMER, enabling this early timer functionality also for non CONFIG_TIMER drivers. With this change it's necessary to guard the dm_timer_init() call in initr_dm_devices() & initf_dm() additionally via CONFIG_TIMER. Signed-off-by: Stefan Roese --- common/board_f.c | 2 +- common/board_r.c | 2 +- drivers/timer/Kconfig | 1 - 3 files changed, 2 insertions(+), 3 deletions(-) I don't like this as it complicates the logic and also seems to be adding a new feature to legacy code. Instead, let's enable the early timer only for driver model. Hmmm, not sure how this should work. Do you have this in mind (instead of this patch)? diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index fd8745ffc2e0..30d6efe98f29 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -39,7 +39,7 @@ config VPL_TIMER config TIMER_EARLY bool "Allow timer to be used early in U-Boot" - depends on TIMER + depends on DM # initr_bootstage() requires a timer and is called before initr_dm() # so only the early timer is available default y if X86 && BOOTSTAGE This results in some compilation errors, like this: $ make stm32mp15_basic_defconfig $ make -sj /opt/kernel.org/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-ld.bfd: common/board_f.o: in function `initf_dm': /home/stefan/git/u-boot/u-boot-marvell/common/board_f.c:791: undefined reference to `dm_timer_init' /opt/kernel.org/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-ld.bfd: common/board_r.o: in function `initr_dm_devices': /home/stefan/git/u-boot/u-boot-marvell/common/board_r.c:258: undefined reference to `dm_timer_init' make: *** [Makefile:1790: u-boot] Error 1 I might be missing something. Or it's not that easy and we still need my original implementation. Thanks, Stefan
Re: [PATCH v3 1/3] efi_loader: Add SPI I/O protocol support
Hi Heinrich,
[...]
> > > +};
> > > +
> > > +static struct efi_legacy_spi_controller_protocol
> > > +dummy_legacy_spi_controller_protocol = {
> > > + .maximum_offset = 0,
> > > + .maximum_range_bytes = 0,
> > > + .range_register_count = 0,
> > > + .erase_block_opcode = legacy_erase_block_opcode,
> > > + .write_status_prefix = legacy_write_status_prefix,
> > > + .bios_base_address = legacy_bios_base_address,
> > > + .clear_spi_protect = legacy_clear_spi_protect,
> > > + .is_range_protected = legacy_is_range_protected,
> > > + .protect_next_range = legacy_protect_next_range,
> > > + .lock_controller = legacy_lock_controller
> > > +};
> >
> > Keeping in mind all these return EFI_UNSUPPORTED can we get rid of them and
> > set the legacy_spi_protocol to NULL? Or defining them is mandatory from
> > the PI spec?
> > Do you plan to implement it in the future?
>
> What do you mean by setting to NULL?
> You simply would not install the protocol interface on any handle.
> If there is no legacy SPI controller, it does not make sense to install
> the protocol.
There's no protocol installation for this, The protocl we install is
efi_spi_io_protocol and one of it's struct members is that legacy spi
protocol
[...]
Cheers
/Ilias
Re: [PATCH v3 2/3] arm: dts: am335x-sancloud-bbe-lite: UEFI SPI export
On 9/26/22 15:13, Tom Rini wrote:
On Mon, Sep 26, 2022 at 02:33:23PM +0300, Ilias Apalodimas wrote:
Hi Tom
On Wed, 21 Sept 2022 at 19:15, Tom Rini wrote:
On Wed, Sep 21, 2022 at 05:06:27PM +0100, Paul Barker wrote:
Add properties to the Authenta SPI flash device node to enable access by
a UEFI application using a fixed GUID. Also specify that this device is
JEDEC compatible so that it is correctly initialized when running
`sf probe`.
Signed-off-by: Paul Barker
---
arch/arm/dts/am335x-sancloud-bbe-lite.dts | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/am335x-sancloud-bbe-lite.dts
b/arch/arm/dts/am335x-sancloud-bbe-lite.dts
index d6ef19311a91..f1ff9d6024cb 100644
--- a/arch/arm/dts/am335x-sancloud-bbe-lite.dts
+++ b/arch/arm/dts/am335x-sancloud-bbe-lite.dts
@@ -37,14 +37,20 @@
pinctrl-names = "default";
pinctrl-0 = <&bb_spi0_pins>;
- channel@0 {
+ authenta-flash@0 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "micron,spi-authenta";
+ compatible = "micron,spi-authenta", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <1600>;
spi-cpha;
+
+ uefi-spi-vendor = "micron";
+ uefi-spi-part-number = "mt25ql128abb";
+ /* GUID in UEFI format: 77126730-a4ca-4386-b341-881fe18e7f7d */
+ uefi-spi-io-guid = [30 67 12 77 ca a4 86 43
+ b3 41 88 1f e1 8e 7f 7d];
};
};
Are we far enough along with part one of this series to talk about
getting these properties in the upstream binding document now?
You mean those bindings being part of the DT spec?
Yes, getting these added to
Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml in the kernel.
There is a related patch
[PATCH] dt-bindings: spi: Add YAML DT binding document for trivial devices
https://lore.kernel.org/all/20220407194936.223041-1-ma...@denx.de/
that didn't make it into the kernel yet.
Best regards
Heinrich
Re: [PATCH] ARM: dts: stm32: DT sync with kernel v6.0-rc4 for MCU's boards
On 9/26/22 14:52, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/23/22 13:20, Patrice Chotard wrote:
>> Device tree alignment with kernel v6.0-rc4.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> arch/arm/dts/stm32429i-eval-u-boot.dtsi | 2 +-
>> arch/arm/dts/stm32746g-eval.dts | 18 -
>> arch/arm/dts/stm32f4-pinctrl.dtsi | 2 +-
>> arch/arm/dts/stm32f429-disco-u-boot.dtsi | 4 +-
>> arch/arm/dts/stm32f429-disco.dts | 20 +++--
>> arch/arm/dts/stm32f429-pinctrl.dtsi | 94 +++
>> arch/arm/dts/stm32f429.dtsi | 69 +++--
>> arch/arm/dts/stm32f469-disco-u-boot.dtsi | 4 +-
>> arch/arm/dts/stm32f469-disco.dts | 24 --
>> arch/arm/dts/stm32f469-pinctrl.dtsi | 96
>> arch/arm/dts/stm32f7-pinctrl.dtsi | 2 +-
>> arch/arm/dts/stm32f7-u-boot.dtsi | 2 +-
>> arch/arm/dts/stm32f746-disco.dts | 12 +++
>> arch/arm/dts/stm32f746.dtsi | 67 +
>> arch/arm/dts/stm32f769-disco.dts | 18 -
>> arch/arm/dts/stm32h743.dtsi | 19 ++---
>> arch/arm/dts/stm32h743i-disco.dts | 8 +-
>> arch/arm/dts/stm32h743i-eval.dts | 8 +-
>> arch/arm/dts/stm32h750i-art-pi.dts | 8 +-
>> 19 files changed, 207 insertions(+), 270 deletions(-)
>
> .
>
>
>> diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi
>> b/arch/arm/dts/stm32f429-disco-u-boot.dtsi
>> index c993f86be8..dcc68c4bcc 100644
>> --- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi
>> +++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi
>> @@ -27,7 +27,7 @@
>> soc {
>> u-boot,dm-pre-reloc;
>> - pin-controller {
>> + pinctrl@4002 {
>> u-boot,dm-pre-reloc;
>> };
>>
>
> NIT: can be simply by using alias
>
> &pinctrl {
> u-boot,dm-pre-reloc;
> };
>
>
>
>> @@ -193,6 +193,6 @@
>> u-boot,dm-pre-reloc;
>> };
>> -&timer5 {
>> +&timers5 {
>> u-boot,dm-pre-reloc;
>> };
>
>
> ...
>
>
>> diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
>> b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
>> index cd173623ef..7f012b49f0 100644
>> --- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
>> +++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
>> @@ -28,7 +28,7 @@
>> soc {
>> u-boot,dm-pre-reloc;
>> - pin-controller {
>> + pinctrl@4002 {
>> u-boot,dm-pre-reloc;
>> };
>
> NIT: can be simply by using alias
>
> &pinctrl {
> u-boot,dm-pre-reloc;
> };
Right, i will update this when applying the patch on next
Thanks
>
>
>> @@ -256,6 +256,6 @@
>> u-boot,dm-pre-reloc;
>> };
>> -&timer5 {
>> +&timers5 {
>> u-boot,dm-pre-reloc;
>> };
>
> ...
>
>
> 2 NITS
>
>
> Reviewed-by: Patrick Delaunay
>
> Thanks
> Patrick
>
Re: [PATCH v3 3/3] am335x_evm_defconfig: Enable Micron SPI flash support
On 9/21/22 18:06, Paul Barker wrote: Signed-off-by: Paul Barker --- configs/am335x_evm_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index f0fbe475b394..f73123e0b71d 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -92,6 +92,7 @@ CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0xc CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=2400 +CONFIG_SPI_FLASH_STMICRO=y You don't enable CONFIG_EFI_SPI_PROTOCOL anywhere; not even on the sandbox. So the code is never compiled and never tested. This cannot be correct. Best regards Heinrich CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_SMSC=y
Re: [PATCH v3 2/3] arm: dts: am335x-sancloud-bbe-lite: UEFI SPI export
On Mon, Sep 26, 2022 at 02:33:23PM +0300, Ilias Apalodimas wrote:
> Hi Tom
>
> On Wed, 21 Sept 2022 at 19:15, Tom Rini wrote:
> >
> > On Wed, Sep 21, 2022 at 05:06:27PM +0100, Paul Barker wrote:
> > > Add properties to the Authenta SPI flash device node to enable access by
> > > a UEFI application using a fixed GUID. Also specify that this device is
> > > JEDEC compatible so that it is correctly initialized when running
> > > `sf probe`.
> > >
> > > Signed-off-by: Paul Barker
> > > ---
> > > arch/arm/dts/am335x-sancloud-bbe-lite.dts | 10 --
> > > 1 file changed, 8 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/arch/arm/dts/am335x-sancloud-bbe-lite.dts
> > > b/arch/arm/dts/am335x-sancloud-bbe-lite.dts
> > > index d6ef19311a91..f1ff9d6024cb 100644
> > > --- a/arch/arm/dts/am335x-sancloud-bbe-lite.dts
> > > +++ b/arch/arm/dts/am335x-sancloud-bbe-lite.dts
> > > @@ -37,14 +37,20 @@
> > > pinctrl-names = "default";
> > > pinctrl-0 = <&bb_spi0_pins>;
> > >
> > > - channel@0 {
> > > + authenta-flash@0 {
> > > #address-cells = <1>;
> > > #size-cells = <0>;
> > >
> > > - compatible = "micron,spi-authenta";
> > > + compatible = "micron,spi-authenta", "jedec,spi-nor";
> > >
> > > reg = <0>;
> > > spi-max-frequency = <1600>;
> > > spi-cpha;
> > > +
> > > + uefi-spi-vendor = "micron";
> > > + uefi-spi-part-number = "mt25ql128abb";
> > > + /* GUID in UEFI format:
> > > 77126730-a4ca-4386-b341-881fe18e7f7d */
> > > + uefi-spi-io-guid = [30 67 12 77 ca a4 86 43
> > > + b3 41 88 1f e1 8e 7f 7d];
> > > };
> > > };
> >
> > Are we far enough along with part one of this series to talk about
> > getting these properties in the upstream binding document now?
>
> You mean those bindings being part of the DT spec?
Yes, getting these added to
Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml in the kernel.
--
Tom
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Description: PGP signature
Re: [PATCH v3 1/3] efi_loader: Add SPI I/O protocol support
On 9/26/22 14:43, Ilias Apalodimas wrote:
Hi Paul,
On Wed, Sep 21, 2022 at 05:06:26PM +0100, Paul Barker wrote:
This addition allows UEFI applications running under u-boot to access
peripherals on SPI busses. It is based on the UEFI Platform
Initialization (PI) Specification, Version 1.7 Errata A (April 2020).
Only the core functionality required to discover SPI peripherals and
communicate with them is currently implemented. Other functionality such
as the legacy SPI controller interface and the ability to update the SPI
peripheral object associated with a particular SPI I/O protocol object
is currently unimplemented.
The following protocols are defined:
* EFI_SPI_CONFIGURATION_PROTOCOL
* EFI_SPI_IO_PROTOCOL
* EFI_LEGACY_SPI_CONTROLLER_PROTOCOL
Since there are no open source implementations of these protocols to use
as an example, educated guesses/hacks have been made in cases where the
UEFI PI specification is unclear and these are documented in comments.
This implementation has been tested on the SanCloud BBE Lite and allowed
a UEFI test application to successfully communicate with a Micron
Authenta flash device connected via the SPI bus. It has also been tested
with the sandbox target using the included efi_selftest case.
Signed-off-by: Paul Barker
---
MAINTAINERS | 7 +
arch/sandbox/dts/test.dts| 13 +
include/efi_api.h| 4 +
include/efi_loader.h | 4 +
include/efi_spi_protocol.h | 166 +
lib/efi_loader/Kconfig | 8 +
lib/efi_loader/Makefile | 1 +
lib/efi_loader/efi_setup.c | 6 +
lib/efi_loader/efi_spi_protocol.c| 614 +++
lib/efi_selftest/Makefile| 1 +
lib/efi_selftest/efi_selftest_spi_protocol.c | 284 +
lib/uuid.c | 4 +
12 files changed, 1112 insertions(+)
create mode 100644 include/efi_spi_protocol.h
create mode 100644 lib/efi_loader/efi_spi_protocol.c
create mode 100644 lib/efi_selftest/efi_selftest_spi_protocol.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 83346183ee4b..a58b2083a218 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -857,6 +857,13 @@ F: tools/efivar.py
F:tools/file2include.c
F:tools/mkeficapsule.c
+EFI SPI SUPPORT
+M: Paul Barker
+S: Maintained
+F: include/efi_spi_protocol.h
+F: lib/efi_loader/efi_spi_protocol.c
+F: lib/efi_selftest/efi_selftest_spi_protocol.c
+
EFI VARIABLES VIA OP-TEE
M:Ilias Apalodimas
S:Maintained
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 2761588f0dad..05c3e0377ac4 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1185,6 +1185,13 @@
compatible = "spansion,m25p16", "jedec,spi-nor";
spi-max-frequency = <4000>;
sandbox,filename = "spi.bin";
+
+ uefi-spi-vendor = "spansion";
+ uefi-spi-part-number = "mt25p16";
+
+ /* GUID in UEFI format:
b881eb5d-ad92-4a48-8fdd-fa75a8e4c6b8 */
+ uefi-spi-io-guid = [5d eb 81 b8 92 ad 48 4a
+ 8f dd fa 75 a8 e4 c6 b8];
};
spi.bin@1 {
reg = <1>;
@@ -1193,6 +1200,12 @@
sandbox,filename = "spi.bin";
spi-cpol;
spi-cpha;
+
+ uefi-spi-vendor = "spansion";
+ uefi-spi-part-number = "mt25p16";
This is needed to identify the flash we want to access through the protocol
right? We keep dumping info on the DT that I am not sure it belongs there.
+ /* GUID in UEFI format:
b6b39ecd-2b1f-a643-b8d7-3192d7cf7270 */
+ uefi-spi-io-guid = [cd 9e b3 b6 1f 2b 43 a6
+ b8 d7 31 92 d7 cf 72 70];
};
};
[...]
+ */
+
+#define LOG_CATEGORY LOGC_EFI
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static efi_string_t convert_efi_string(const char *str)
+{
+ efi_string_t str_16, tmp;
+ size_t sz_8, sz_16;
+
+ sz_8 = strlen(str);
sz_8 seems to be unused.
+ sz_16 = utf8_utf16_strlen(str);
+ str_16 = calloc(sz_16 + 1, 2);
+ if (!str_16)
+ return NULL;
+
+ tmp = str_16;
+ utf8_utf16_strcpy(&tmp, str);
+
+ return str_16;
+}
This seems useful overall, mind moving it to lib/efi_loader/efi_string.c
and add sphinx style comments with the description? And while at it replace
'2' with sizeof(u16)?
+
[...]
+static efi_status_t EFIAPI
+efi_spi_io_transaction(const struct efi_spi_io_protocol *this,
+ enum efi_spi
Re: [PATCH v2 6/7] config: stm32f769-disco: Fix internal flash size
Hi,
On 9/20/22 18:04, Patrice Chotard wrote:
arch-stm32f7/stm32.h file is shared between STM32F746 and STM32F769
MCUs. But STM32F769 embeds 2MB of internal flash instead of 1MB for
STM32F746. The flash layout is quite similar between the 2 SoCs :
STM32F746 STM32F769
4 * 32KB sectors 4 * 32KB sectors
1 * 128KB sector1 * 128KB sector
3 * 256KB sectors 7 * 256KB sectors
Update sect_sz_kb[] structure and SYS_MAX_FLASH_SECT accordingly.
Signed-off-by: Patrice Chotard
---
Changes in v2:
- Remove SYS_UBOOT_FLAG from stm32f746-disco.h
arch/arm/include/asm/arch-stm32f7/stm32.h | 6 +++---
configs/stm32f769-disco_defconfig | 2 +-
configs/stm32f769-disco_spl_defconfig | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h
b/arch/arm/include/asm/arch-stm32f7/stm32.h
index 3451e74a3d..57db839e8d 100644
--- a/arch/arm/include/asm/arch-stm32f7/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32.h
@@ -10,9 +10,9 @@
#include
static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
- [0 ... 3] = 32 * 1024,
- [4] = 128 * 1024,
- [5 ... 7] = 256 * 1024
+ [0 ... 3] = 32 * 1024,
+ [4] = 128 * 1024,
+ [5 ... CONFIG_SYS_MAX_FLASH_SECT - 1] = 256 * 1024
};
#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/configs/stm32f769-disco_defconfig
b/configs/stm32f769-disco_defconfig
index 423af7446a..5b5307ca1d 100644
--- a/configs/stm32f769-disco_defconfig
+++ b/configs/stm32f769-disco_defconfig
@@ -41,7 +41,7 @@ CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_STM32_FLASH=y
-CONFIG_SYS_MAX_FLASH_SECT=8
+CONFIG_SYS_MAX_FLASH_SECT=12
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/stm32f769-disco_spl_defconfig
b/configs/stm32f769-disco_spl_defconfig
index b56d88f9f6..b5d54b48ec 100644
--- a/configs/stm32f769-disco_spl_defconfig
+++ b/configs/stm32f769-disco_spl_defconfig
@@ -63,7 +63,7 @@ CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_STM32_FLASH=y
-CONFIG_SYS_MAX_FLASH_SECT=8
+CONFIG_SYS_MAX_FLASH_SECT=12
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Re: [PATCH v2 7/7] configs: stm32f746-disco: Remove CONFIG_SYS_UBOOT_START flag
Hi, On 9/20/22 18:04, Patrice Chotard wrote: By pressing "c" key during SPL execution, we force U-boot execution instead of a kernel XIP image. This fixes a hard fault when booting stm32f746-disco in SPL with "c" key pressed during SPL execution. U-Boot SPL 2022.10-rc5-9-g40d02baa91 (Sep 20 2022 - 17:21:21 +0200) Trying to boot from XIP Hard fault pc : 080083fclr : 08000d1bxPSR : 2100 r12 : 2004f108 r3 : 080083fdr2 : 0028 r1 : 2004f0c8r0 : 2004f0e4 Resetting CPU ... This is due to SYS_UBOOT_START flag set to 0x080083FD which is not correct. If unset, SYS_UBOOT_START is set by default to CONFIG_SYS_TEXT_BASE which match with our requirement. Signed-off-by: Patrice Chotard --- (no changes since v1) include/configs/stm32f746-disco.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 64c1bc7d43..b0ec226114 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -34,7 +34,6 @@ BOOTENV #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_UBOOT_START 0x080083FD #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \ CONFIG_SPL_PAD_TO) Reviewed-by: Patrick Delaunay Thanks Patrick
Re: [PATCH v2 5/7] configs: stm32746g-eval: Fix CONFIG_SYS_SPL_ARGS_ADDR
Hi, On 9/20/22 18:04, Patrice Chotard wrote: STM32F746 embeds 1 MB of internal flash [0x0800-0x080f], fix CONFIG_SYS_SPL_ARGS_ADDR accordingly It solves hard fault when jumping from SPL to U-Boot. Signed-off-by: Patrice Chotard --- (no changes since v1) configs/stm32746g-eval_spl_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index d8d55c2d3c..28f522b15e 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -36,7 +36,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_XIP_SUPPORT=y -CONFIG_SYS_SPL_ARGS_ADDR=0x81c +CONFIG_SYS_SPL_ARGS_ADDR=0x80c CONFIG_SPL_DM_RESET=y CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y Reviewed-by: Patrick Delaunay Thanks Patrick
Re: [PATCH v2 4/7] configs: stm32f746-disco: Fix CONFIG_SYS_SPL_ARGS_ADDR
Hi, On 9/20/22 18:04, Patrice Chotard wrote: STM32F746 embeds 1 MB of internal flash [0x0800-0x080f], fix CONFIG_SYS_SPL_ARGS_ADDR accordingly It solves hard fault when jumping from SPL to U-Boot. Signed-off-by: Patrice Chotard --- (no changes since v1) configs/stm32f746-disco_spl_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index 5e8a8aaf3c..d4a65bde24 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -36,7 +36,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_XIP_SUPPORT=y -CONFIG_SYS_SPL_ARGS_ADDR=0x81c +CONFIG_SYS_SPL_ARGS_ADDR=0x80c CONFIG_SPL_DM_RESET=y CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y Reviewed-by: Patrick Delaunay Thanks Patrick
Re: [PATCH v2 3/7] configs: stm32746g-eval: Fix SPL boot
Hi,
On 9/20/22 18:04, Patrice Chotard wrote:
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard
---
(no changes since v1)
configs/stm32746g-eval_spl_defconfig | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/configs/stm32746g-eval_spl_defconfig
b/configs/stm32746g-eval_spl_defconfig
index a3b7146454..d8d55c2d3c 100644
--- a/configs/stm32746g-eval_spl_defconfig
+++ b/configs/stm32746g-eval_spl_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x08008000
+CONFIG_SYS_TEXT_BASE=0x08009000
CONFIG_SYS_MALLOC_LEN=0x10
CONFIG_SYS_MALLOC_F_LEN=0xE00
CONFIG_SPL_GPIO=y
@@ -13,10 +13,11 @@ CONFIG_SPL_TEXT_BASE=0x800
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_SIZE_LIMIT=0x9000
CONFIG_STM32F7=y
CONFIG_TARGET_STM32F746_DISCO=y
CONFIG_SPL=y
-CONFIG_SYS_LOAD_ADDR=0x8008000
+CONFIG_SYS_LOAD_ADDR=0x8009000
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
@@ -29,7 +30,7 @@ CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0
ignore_loglevel"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_PAD_TO=0x8000
+CONFIG_SPL_PAD_TO=0x9000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Re: [PATCH v2 2/7] configs: stm32f769-disco: Fix SPL boot
Hi,
On 9/20/22 18:04, Patrice Chotard wrote:
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard
---
(no changes since v1)
configs/stm32f769-disco_spl_defconfig | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/configs/stm32f769-disco_spl_defconfig
b/configs/stm32f769-disco_spl_defconfig
index 19d2c24abb..b56d88f9f6 100644
--- a/configs/stm32f769-disco_spl_defconfig
+++ b/configs/stm32f769-disco_spl_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x08008000
+CONFIG_SYS_TEXT_BASE=0x08009000
CONFIG_SYS_MALLOC_LEN=0x10
CONFIG_SYS_MALLOC_F_LEN=0xE00
CONFIG_SPL_GPIO=y
@@ -13,10 +13,11 @@ CONFIG_SPL_TEXT_BASE=0x800
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_SIZE_LIMIT=0x9000
CONFIG_STM32F7=y
CONFIG_TARGET_STM32F746_DISCO=y
CONFIG_SPL=y
-CONFIG_SYS_LOAD_ADDR=0x8008000
+CONFIG_SYS_LOAD_ADDR=0x8009000
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
@@ -28,7 +29,7 @@ CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0
ignore_loglevel"
# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_SPL_PAD_TO=0x8000
+CONFIG_SPL_PAD_TO=0x9000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Re: [PATCH] ARM: dts: stm32: DT sync with kernel v6.0-rc4 for MCU's boards
Hi,
On 9/23/22 13:20, Patrice Chotard wrote:
Device tree alignment with kernel v6.0-rc4.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32429i-eval-u-boot.dtsi | 2 +-
arch/arm/dts/stm32746g-eval.dts | 18 -
arch/arm/dts/stm32f4-pinctrl.dtsi| 2 +-
arch/arm/dts/stm32f429-disco-u-boot.dtsi | 4 +-
arch/arm/dts/stm32f429-disco.dts | 20 +++--
arch/arm/dts/stm32f429-pinctrl.dtsi | 94 +++
arch/arm/dts/stm32f429.dtsi | 69 +++--
arch/arm/dts/stm32f469-disco-u-boot.dtsi | 4 +-
arch/arm/dts/stm32f469-disco.dts | 24 --
arch/arm/dts/stm32f469-pinctrl.dtsi | 96
arch/arm/dts/stm32f7-pinctrl.dtsi| 2 +-
arch/arm/dts/stm32f7-u-boot.dtsi | 2 +-
arch/arm/dts/stm32f746-disco.dts | 12 +++
arch/arm/dts/stm32f746.dtsi | 67 +
arch/arm/dts/stm32f769-disco.dts | 18 -
arch/arm/dts/stm32h743.dtsi | 19 ++---
arch/arm/dts/stm32h743i-disco.dts| 8 +-
arch/arm/dts/stm32h743i-eval.dts | 8 +-
arch/arm/dts/stm32h750i-art-pi.dts | 8 +-
19 files changed, 207 insertions(+), 270 deletions(-)
.
diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi
b/arch/arm/dts/stm32f429-disco-u-boot.dtsi
index c993f86be8..dcc68c4bcc 100644
--- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi
@@ -27,7 +27,7 @@
soc {
u-boot,dm-pre-reloc;
- pin-controller {
+ pinctrl@4002 {
u-boot,dm-pre-reloc;
};
NIT: can be simply by using alias
&pinctrl {
u-boot,dm-pre-reloc;
};
@@ -193,6 +193,6 @@
u-boot,dm-pre-reloc;
};
-&timer5 {
+&timers5 {
u-boot,dm-pre-reloc;
};
...
diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index cd173623ef..7f012b49f0 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -28,7 +28,7 @@
soc {
u-boot,dm-pre-reloc;
- pin-controller {
+ pinctrl@4002 {
u-boot,dm-pre-reloc;
};
NIT: can be simply by using alias
&pinctrl {
u-boot,dm-pre-reloc;
};
@@ -256,6 +256,6 @@
u-boot,dm-pre-reloc;
};
-&timer5 {
+&timers5 {
u-boot,dm-pre-reloc;
};
...
2 NITS
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Re: [PATCH v2 1/7] configs: stm32f746-disco: Fix SPL boot
Hi,
On 9/20/22 18:04, Patrice Chotard wrote:
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard
---
(no changes since v1)
configs/stm32f746-disco_spl_defconfig | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/configs/stm32f746-disco_spl_defconfig
b/configs/stm32f746-disco_spl_defconfig
index e7b1acc433..5e8a8aaf3c 100644
--- a/configs/stm32f746-disco_spl_defconfig
+++ b/configs/stm32f746-disco_spl_defconfig
@@ -1,6 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_STM32=y
-CONFIG_SYS_TEXT_BASE=0x08008000
+CONFIG_SYS_TEXT_BASE=0x08009000
CONFIG_SYS_MALLOC_LEN=0x10
CONFIG_SYS_MALLOC_F_LEN=0xE00
CONFIG_SPL_GPIO=y
@@ -13,10 +13,11 @@ CONFIG_SPL_TEXT_BASE=0x800
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_SIZE_LIMIT=0x9000
CONFIG_STM32F7=y
CONFIG_TARGET_STM32F746_DISCO=y
CONFIG_SPL=y
-CONFIG_SYS_LOAD_ADDR=0x8008000
+CONFIG_SYS_LOAD_ADDR=0x8009000
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
@@ -29,7 +30,7 @@ CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0
ignore_loglevel"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_PAD_TO=0x8000
+CONFIG_SPL_PAD_TO=0x9000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Re: [PATCH v3 1/3] efi_loader: Add SPI I/O protocol support
Hi Paul,
On Wed, Sep 21, 2022 at 05:06:26PM +0100, Paul Barker wrote:
> This addition allows UEFI applications running under u-boot to access
> peripherals on SPI busses. It is based on the UEFI Platform
> Initialization (PI) Specification, Version 1.7 Errata A (April 2020).
> Only the core functionality required to discover SPI peripherals and
> communicate with them is currently implemented. Other functionality such
> as the legacy SPI controller interface and the ability to update the SPI
> peripheral object associated with a particular SPI I/O protocol object
> is currently unimplemented.
>
> The following protocols are defined:
> * EFI_SPI_CONFIGURATION_PROTOCOL
> * EFI_SPI_IO_PROTOCOL
> * EFI_LEGACY_SPI_CONTROLLER_PROTOCOL
>
> Since there are no open source implementations of these protocols to use
> as an example, educated guesses/hacks have been made in cases where the
> UEFI PI specification is unclear and these are documented in comments.
>
> This implementation has been tested on the SanCloud BBE Lite and allowed
> a UEFI test application to successfully communicate with a Micron
> Authenta flash device connected via the SPI bus. It has also been tested
> with the sandbox target using the included efi_selftest case.
>
> Signed-off-by: Paul Barker
> ---
> MAINTAINERS | 7 +
> arch/sandbox/dts/test.dts| 13 +
> include/efi_api.h| 4 +
> include/efi_loader.h | 4 +
> include/efi_spi_protocol.h | 166 +
> lib/efi_loader/Kconfig | 8 +
> lib/efi_loader/Makefile | 1 +
> lib/efi_loader/efi_setup.c | 6 +
> lib/efi_loader/efi_spi_protocol.c| 614 +++
> lib/efi_selftest/Makefile| 1 +
> lib/efi_selftest/efi_selftest_spi_protocol.c | 284 +
> lib/uuid.c | 4 +
> 12 files changed, 1112 insertions(+)
> create mode 100644 include/efi_spi_protocol.h
> create mode 100644 lib/efi_loader/efi_spi_protocol.c
> create mode 100644 lib/efi_selftest/efi_selftest_spi_protocol.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 83346183ee4b..a58b2083a218 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -857,6 +857,13 @@ F: tools/efivar.py
> F: tools/file2include.c
> F: tools/mkeficapsule.c
>
> +EFI SPI SUPPORT
> +M: Paul Barker
> +S: Maintained
> +F: include/efi_spi_protocol.h
> +F: lib/efi_loader/efi_spi_protocol.c
> +F: lib/efi_selftest/efi_selftest_spi_protocol.c
> +
> EFI VARIABLES VIA OP-TEE
> M: Ilias Apalodimas
> S: Maintained
> diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
> index 2761588f0dad..05c3e0377ac4 100644
> --- a/arch/sandbox/dts/test.dts
> +++ b/arch/sandbox/dts/test.dts
> @@ -1185,6 +1185,13 @@
> compatible = "spansion,m25p16", "jedec,spi-nor";
> spi-max-frequency = <4000>;
> sandbox,filename = "spi.bin";
> +
> + uefi-spi-vendor = "spansion";
> + uefi-spi-part-number = "mt25p16";
> +
> + /* GUID in UEFI format:
> b881eb5d-ad92-4a48-8fdd-fa75a8e4c6b8 */
> + uefi-spi-io-guid = [5d eb 81 b8 92 ad 48 4a
> + 8f dd fa 75 a8 e4 c6 b8];
> };
> spi.bin@1 {
> reg = <1>;
> @@ -1193,6 +1200,12 @@
> sandbox,filename = "spi.bin";
> spi-cpol;
> spi-cpha;
> +
> + uefi-spi-vendor = "spansion";
> + uefi-spi-part-number = "mt25p16";
This is needed to identify the flash we want to access through the protocol
right? We keep dumping info on the DT that I am not sure it belongs there.
> + /* GUID in UEFI format:
> b6b39ecd-2b1f-a643-b8d7-3192d7cf7270 */
> + uefi-spi-io-guid = [cd 9e b3 b6 1f 2b 43 a6
> + b8 d7 31 92 d7 cf 72 70];
> };
> };
>
[...]
> + */
> +
> +#define LOG_CATEGORY LOGC_EFI
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +static efi_string_t convert_efi_string(const char *str)
> +{
> + efi_string_t str_16, tmp;
> + size_t sz_8, sz_16;
> +
> + sz_8 = strlen(str);
> + sz_16 = utf8_utf16_strlen(str);
> + str_16 = calloc(sz_16 + 1, 2);
> + if (!str_16)
> + return NULL;
> +
> + tmp = str_16;
> + utf8_utf16_strcpy(&tmp, str);
> +
> + return str_16;
> +}
This seems useful overall, mind moving it to lib/efi_loader/efi_string.c
and add sphinx style comments with the description? And while at it replace
'2' with sizeof(u16)?
> +
[...]
> +static efi_status_t EFIAPI
> +efi_spi_io_tran
Re: [PATCH v2 0/9] xilinx: versal-net: Add support for new Versal NET SoC
On 9/19/22 14:21, Michal Simek wrote: Hi, I am sending support for new Xilinx/AMD SoC called Versal NET. Versal NET is very similar to origin Versal SOC. There is different register layout, some IPs have been upgraded like i3c and some other changes in different location. Thanks, Michal Changes in v2: - Move symbols from .h to defconfig, enable i2c mux, dm_eth_phy, squashfs and grepenv - Remove CONFIG_SYS_CBSIZE, CONFIG_BOOTP_BOOTFILESIZE, CONFIG_BOOTP_MAY_FAIL from .h file - Setup HAS_CUSTOM_SYS_INIT_SP_ADDR Jay Buddhabhatti (4): clk: versal: Enable clock driver for Versal NET firmware: zynqmp: Add Versal NET compatible string mailbox: zynqmp: Enable ipi mailbox driver for Versal NET reset: zynqmp: Enable reset driver for Versal NET Michal Simek (5): arm64: versal-net: Add support for Versal NET platform spi: cadence_qspi: Add support for Versal NET platform spi: zynqmp_gqspi: Add support for Versal NET arm64: versal-net: Add defconfig for Versal NET arm64: versal-net: Add support for mini configuration Kconfig | 2 +- MAINTAINERS | 7 + arch/arm/Kconfig | 14 ++ arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 3 + arch/arm/dts/versal-net-mini.dts | 67 +++ arch/arm/dts/xilinx-versal-net-virt.dts | 11 ++ arch/arm/mach-versal-net/Kconfig | 43 + arch/arm/mach-versal-net/Makefile | 10 ++ arch/arm/mach-versal-net/clk.c| 35 arch/arm/mach-versal-net/cpu.c| 89 + .../mach-versal-net/include/mach/hardware.h | 31 .../mach-versal-net/include/mach/sys_proto.h | 16 ++ board/xilinx/Kconfig | 6 +- board/xilinx/versal-net/Kconfig | 9 + board/xilinx/versal-net/MAINTAINERS | 8 + board/xilinx/versal-net/Makefile | 9 + board/xilinx/versal-net/board.c | 170 ++ configs/xilinx_versal_net_mini_defconfig | 72 configs/xilinx_versal_net_virt_defconfig | 131 ++ drivers/clk/Kconfig | 2 +- drivers/clk/clk_versal.c | 1 + drivers/firmware/firmware-zynqmp.c| 1 + drivers/mailbox/Kconfig | 2 +- drivers/reset/reset-zynqmp.c | 1 + drivers/spi/Kconfig | 2 +- drivers/spi/cadence_ospi_versal.c | 3 +- drivers/spi/zynqmp_gqspi.c| 3 +- env/Kconfig | 6 +- include/configs/xilinx_versal_net.h | 134 ++ include/configs/xilinx_versal_net_mini.h | 21 +++ 31 files changed, 898 insertions(+), 12 deletions(-) create mode 100644 arch/arm/dts/versal-net-mini.dts create mode 100644 arch/arm/dts/xilinx-versal-net-virt.dts create mode 100644 arch/arm/mach-versal-net/Kconfig create mode 100644 arch/arm/mach-versal-net/Makefile create mode 100644 arch/arm/mach-versal-net/clk.c create mode 100644 arch/arm/mach-versal-net/cpu.c create mode 100644 arch/arm/mach-versal-net/include/mach/hardware.h create mode 100644 arch/arm/mach-versal-net/include/mach/sys_proto.h create mode 100644 board/xilinx/versal-net/Kconfig create mode 100644 board/xilinx/versal-net/MAINTAINERS create mode 100644 board/xilinx/versal-net/Makefile create mode 100644 board/xilinx/versal-net/board.c create mode 100644 configs/xilinx_versal_net_mini_defconfig create mode 100644 configs/xilinx_versal_net_virt_defconfig create mode 100644 include/configs/xilinx_versal_net.h create mode 100644 include/configs/xilinx_versal_net_mini.h Applied. M
Re: [PATCH] rockchip: rk3399: add ethaddr and serial# init, enable for R4S
On Mon, Sep 26, 2022 at 7:53 PM Christian Kohlschütter wrote: > > Some RK3399 boards, such as newer revisions of NanoPi R4S, do not > provide an EEPROM chip containing a globally unique MAC address. > > Currently, this means that a randomly generated temporary MAC address > may be generated each time the device is rebooted, leading to ARP cache > issues and other confusing bugs. > > Since RK3399 CPUs provide a built-in unique serial number, we can > reliably derive a locally MAC address from it by reading the > corresponding bits from the non-secure efuse block. > > Port from uboot-rockchip 0c294d0, fix compilation issues and adjust > coding style. > > rockchip: board: puma_rk3399: derive ethaddr from cpuid > rockchip: board: puma_rk3399: add support for serial# and cpuid# > rockchip: efuse: add (misc) driver for RK3399 non-secure efuse block > via efuses > > Signed-off-by: Christian Kohlschütter > --- > board/rockchip/evb_rk3399/evb-rk3399.c | 120 + > configs/nanopi-r4s-rk3399_defconfig| 4 + > drivers/misc/Makefile | 2 +- There's already code in arch/arm/mach-rockchip/misc.c that does pretty much the same thing. IIRC all you need to do is enable MISC_INIT_R and ROCKCHIP_EFUSE or ROCKCHIP_OTP. ChenYu
Please pull u-boot-marvell/master
Hi Tom, please pull this Turris GPIO fix from Pali: - gpio: turris_omnia_mcu: Fix registering gpios (Pali) Here the Azure build, without any issues: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=269 Thanks, Stefan The following changes since commit 435596d57f8beedf36b5dc858fe7ba9d6c03334b: Merge tag 'u-boot-imx-20220922' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx (2022-09-22 10:29:29 -0400) are available in the Git repository at: g...@source.denx.de:u-boot/custodians/u-boot-marvell.git for you to fetch changes up to 54bcd84adf2dd2a42552143549541b2c809869a6: gpio: turris_omnia_mcu: Fix registering gpios (2022-09-26 10:04:37 +0200) Pali Rohár (1): gpio: turris_omnia_mcu: Fix registering gpios drivers/gpio/turris_omnia_mcu.c | 19 +++ 1 file changed, 15 insertions(+), 4 deletions(-)
Re: [PATCH] gpio: turris_omnia_mcu: Fix registering gpios
On 22.09.22 13:25, Pali Rohár wrote:
Currently all GPIOs supported by CMD_EXT_CONTROL/CMD_GET_EXT_CONTROL_STATUS
commands (last 16 GPIOs) are available only when FEAT_PERIPH_MCU feature
bit is set. So do not register these GPIOs by U-Boot driver when this
feature bit is not set, so U-Boot 'gpio' command would see only GPIOs which
really exists.
Fixes: 5e4d24ccc115 ("gpio: Add Turris Omnia MCU driver")
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
drivers/gpio/turris_omnia_mcu.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/turris_omnia_mcu.c b/drivers/gpio/turris_omnia_mcu.c
index 986ccde6bc70..2d2bf2d1dd69 100644
--- a/drivers/gpio/turris_omnia_mcu.c
+++ b/drivers/gpio/turris_omnia_mcu.c
@@ -16,6 +16,8 @@ enum commands_e {
/* available if FEAT_EXT_CMDS bit is set in features */
CMD_GET_EXT_STATUS_DWORD= 0x11,
+
+ /* available if FEAT_EXT_CMDS and FEAT_PERIPH_MCU bits are set in
featurs */
CMD_EXT_CONTROL = 0x12,
CMD_GET_EXT_CONTROL_STATUS = 0x13,
};
@@ -54,6 +56,7 @@ enum ctl_byte_e {
/* CMD_GET_FEATURES */
enum features_e {
+ FEAT_PERIPH_MCU = BIT(0),
FEAT_EXT_CMDS = BIT(1),
};
@@ -84,10 +87,12 @@ static int turris_omnia_mcu_get_function(struct udevice *dev, uint offset)
return -EINVAL;
return GPIOF_INPUT;
- /* bank 2 - supported only when FEAT_EXT_CMDS is set */
+ /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is
set */
case (16 + 32 + 0) ... (16 + 32 + 15):
if (!(info->features & FEAT_EXT_CMDS))
return -EINVAL;
+ if (!(info->features & FEAT_PERIPH_MCU))
+ return -EINVAL;
return GPIOF_OUTPUT;
default:
@@ -120,10 +125,12 @@ static int turris_omnia_mcu_get_value(struct udevice
*dev, uint offset)
return u32)val32[3] << 24) | ((u32)val32[2] << 16) |
((u32)val32[1] << 8) | val32[0]) >> (offset - 16)) &
0x1;
- /* bank 2 - supported only when FEAT_EXT_CMDS is set */
+ /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is
set */
case (16 + 32 + 0) ... (16 + 32 + 15):
if (!(info->features & FEAT_EXT_CMDS))
return -EINVAL;
+ if (!(info->features & FEAT_PERIPH_MCU))
+ return -EINVAL;
ret = dm_i2c_read(dev, CMD_GET_EXT_CONTROL_STATUS, val16, 2);
if (ret)
return ret;
@@ -162,10 +169,12 @@ static int turris_omnia_mcu_set_value(struct udevice
*dev, uint offset, int valu
val16[0] = value ? val16[1] : 0;
return dm_i2c_write(dev, CMD_GENERAL_CONTROL, val16,
sizeof(val16));
- /* bank 2 - supported only when FEAT_EXT_CMDS is set */
+ /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is
set */
case (16 + 32 + 0) ... (16 + 32 + 15):
if (!(info->features & FEAT_EXT_CMDS))
return -EINVAL;
+ if (!(info->features & FEAT_PERIPH_MCU))
+ return -EINVAL;
val32[3] = BIT(offset - 16 - 32) >> 8;
val32[2] = BIT(offset - 16 - 32) & 0xff;
val32[1] = value ? val32[3] : 0;
@@ -282,8 +291,10 @@ static int turris_omnia_mcu_probe(struct udevice *dev)
uc_priv->bank_name = "mcu_";
- if (info->features & FEAT_EXT_CMDS)
+ if ((info->features & FEAT_EXT_CMDS) && (info->features &
FEAT_PERIPH_MCU))
uc_priv->gpio_count = 16 + 32 + 16;
+ else if (info->features & FEAT_EXT_CMDS)
+ uc_priv->gpio_count = 16 + 32;
else
uc_priv->gpio_count = 16;
Viele Grüße,
Stefan Roese
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
[PATCH] ls1043ardb: nand driver fixups for revision v7.0 boards
The LS1043ARDB rev v7.0 board replace nand device MT29F4G08ABBDAH4-AITX:D
with MT29F4G08ABBFAH4-AIT:F. Reflecting this change in board_fix_fdt().
CPLD V3.0 is needed for nandboot as the nand device changed.
A new macro CPLD_CFG_RCW_SRC_NAND_4K(4Kpage) is added to distinguish from
CPLD_CFG_RCW_SRC_NAND(2Kpage) to support nandboot on rev v7.0 board.
Signed-off-by: Wei Lu
---
board/freescale/ls1043ardb/cpld.c | 4 +++
board/freescale/ls1043ardb/cpld.h | 1 +
board/freescale/ls1043ardb/ls1043ardb.c | 46 -
3 files changed, 50 insertions(+), 1 deletion(-)
diff --git a/board/freescale/ls1043ardb/cpld.c
b/board/freescale/ls1043ardb/cpld.c
index 5d2e8015a0..232035638b 100644
--- a/board/freescale/ls1043ardb/cpld.c
+++ b/board/freescale/ls1043ardb/cpld.c
@@ -69,6 +69,10 @@ void cpld_set_defbank(void)
void cpld_set_nand(void)
{
u16 reg = CPLD_CFG_RCW_SRC_NAND;
+
+ if (CPLD_READ(cpld_ver) > 0x2)
+ reg = CPLD_CFG_RCW_SRC_NAND_4K;
+
u8 reg5 = (u8)(reg >> 1);
u8 reg6 = (u8)(reg & 1);
diff --git a/board/freescale/ls1043ardb/cpld.h
b/board/freescale/ls1043ardb/cpld.h
index 2e757b557f..eed34d6354 100644
--- a/board/freescale/ls1043ardb/cpld.h
+++ b/board/freescale/ls1043ardb/cpld.h
@@ -41,5 +41,6 @@ void cpld_rev_bit(unsigned char *value);
#define CPLD_BANK_SEL_ALTBANK 0x04
#define CPLD_CFG_RCW_SRC_NOR 0x025
#define CPLD_CFG_RCW_SRC_NAND 0x106
+#define CPLD_CFG_RCW_SRC_NAND_4K 0x118
#define CPLD_CFG_RCW_SRC_SD0x040
#endif
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c
b/board/freescale/ls1043ardb/ls1043ardb.c
index f388eb496f..8c91f0771f 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -167,7 +167,7 @@ int checkboard(void)
if (cfg_rcw_src == 0x25)
printf("vBank %d\n", CPLD_READ(vbank));
- else if (cfg_rcw_src == 0x106)
+ else if ((cfg_rcw_src == 0x106) || (cfg_rcw_src == 0x118))
puts("NAND\n");
else
printf("Invalid setting of SW4\n");
@@ -347,10 +347,54 @@ int ft_board_setup(void *blob, struct bd_info *bd)
return 0;
}
+void nand_fixup(void)
+{
+ u32 csor = 0;
+
+ if (CPLD_READ(pcba_ver) < 0x7)
+ return;
+
+/* Change NAND Flash PGS/SPRZ configuration */
+ csor = CONFIG_SYS_NAND_CSOR;
+ if ((csor & CSOR_NAND_PGS_MASK) == CSOR_NAND_PGS_2K)
+ csor = (csor & ~(CSOR_NAND_PGS_MASK)) | CSOR_NAND_PGS_4K;
+
+ if ((csor & CSOR_NAND_SPRZ_MASK) == CSOR_NAND_SPRZ_64)
+ csor = (csor & ~(CSOR_NAND_SPRZ_MASK)) | CSOR_NAND_SPRZ_224;
+
+ if (IS_ENABLED(CONFIG_TFABOOT)) {
+ u8 cfg_rcw_src1, cfg_rcw_src2;
+ u16 cfg_rcw_src;
+
+ cfg_rcw_src1 = CPLD_READ(cfg_rcw_src1);
+ cfg_rcw_src2 = CPLD_READ(cfg_rcw_src2);
+ cpld_rev_bit(&cfg_rcw_src1);
+ cfg_rcw_src = cfg_rcw_src1;
+ cfg_rcw_src = (cfg_rcw_src << 1) | cfg_rcw_src2;
+
+ if (cfg_rcw_src == 0x25)
+ set_ifc_csor(IFC_CS1, csor);
+ else if (cfg_rcw_src == 0x118)
+ set_ifc_csor(IFC_CS0, csor);
+ else
+ printf("Invalid setting\n");
+ } else {
+ if (IS_ENABLED(CONFIG_NAND_BOOT))
+ set_ifc_csor(IFC_CS0, csor);
+ else
+ set_ifc_csor(IFC_CS1, csor);
+ }
+}
+
#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP)
int board_fix_fdt(void *blob)
{
+ /* nand driver fix up */
+ nand_fixup();
+
+ /* fdt fix up */
fdt_fixup_phy_addr(blob);
+
return 0;
}
#endif
--
2.25.1
Re: [PATCH 1/1] usb: request only 8 bytes for USB_SPEED_FULL bMaxPacketSize0 discovery
Hallo Marek, > Can you be more specific about those logitech receivers ? I might have one > of those devices, and I have DWC3 in i.MX8MP and i.MX8MQ, as well as ZynqMP, > so I should be able to try and trigger the problem. Can you share the > reproducer test case for this problem ? I can reproduce the issue with Keychron K1 and Realforce keyboards on the usb-c port of my mac mini 2020 model running u-boot. The two keyboards don't work without Jannes patch. With Jannes patch, they work. Other keyboards like my Thinkpad compact keyboard work with and without the patch. https://www.keychron.com/products/keychron-k1-wireless-mechanical-keyboard https://www.realforcekeyboards.com https://www.lenovo.com/de/de/accessories-and-monitors/keyboards-and-mice/keyboards/KEYBOARD-German/p/0B47202 Cheers, Thomas
[PATCH] xilinx: common: Fix static checker warnings
Avoid signed extension for uuid and byte.
Eliminate the below smatch warnings:
board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup()
warn: impossible condition '(byte == 255) => ((-128)-127 == 255)'
board/xilinx/common/board.c:466 board_late_init_xilinx()
warn: argument 3 to %02x specifier has type 'char'
board/xilinx/common/board.c:466 board_late_init_xilinx()
warn: argument 4 to %02x specifier has type 'char'
Signed-off-by: Venkatesh Yadav Abbarapu
---
board/xilinx/common/board.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 9b4aded466..2b6ead5269 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -119,7 +119,7 @@ struct xilinx_legacy_format {
static void xilinx_eeprom_legacy_cleanup(char *eeprom, int size)
{
int i;
- char byte;
+ unsigned char byte;
for (i = 0; i < size; i++) {
byte = eeprom[i];
@@ -458,8 +458,8 @@ int board_late_init_xilinx(void)
desc->serial);
if (desc->uuid[0]) {
- char uuid[UUID_STR_LEN + 1];
- char *t = desc->uuid;
+ unsigned char uuid[UUID_STR_LEN + 1];
+ unsigned char *t = desc->uuid;
memset(uuid, 0, UUID_STR_LEN + 1);
--
2.17.1
RE: [v2 UBOOT PATCH 1/3] xilinx: common: Fix static checker warnings
Please ignore this patch.
Thanks
Venkatesh
> -Original Message-
> From: Venkatesh Yadav Abbarapu
> Sent: Monday, September 26, 2022 11:55 AM
> To: u-boot@lists.denx.de
> Cc: Simek, Michal ; g...@xilinx.com
> Subject: [v2 UBOOT PATCH 1/3] xilinx: common: Fix static checker warnings
>
> Avoid signed extension for uuid and byte.
>
> Eliminate the below smatch warnings:
> board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup()
> warn: impossible condition '(byte == 255) => ((-128)-127 == 255)'
>
> board/xilinx/common/board.c:466 board_late_init_xilinx()
> warn: argument 3 to %02x specifier has type 'char'
> board/xilinx/common/board.c:466 board_late_init_xilinx()
> warn: argument 4 to %02x specifier has type 'char'
>
> Signed-off-by: Venkatesh Yadav Abbarapu
>
> ---
> board/xilinx/common/board.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
> index 9b4aded466..2b6ead5269 100644
> --- a/board/xilinx/common/board.c
> +++ b/board/xilinx/common/board.c
> @@ -119,7 +119,7 @@ struct xilinx_legacy_format { static void
> xilinx_eeprom_legacy_cleanup(char *eeprom, int size) {
> int i;
> - char byte;
> + unsigned char byte;
>
> for (i = 0; i < size; i++) {
> byte = eeprom[i];
> @@ -458,8 +458,8 @@ int board_late_init_xilinx(void)
> desc->serial);
>
> if (desc->uuid[0]) {
> - char uuid[UUID_STR_LEN + 1];
> - char *t = desc->uuid;
> + unsigned char uuid[UUID_STR_LEN + 1];
> + unsigned char *t = desc->uuid;
>
> memset(uuid, 0, UUID_STR_LEN + 1);
>
> --
> 2.17.1
[v2 UBOOT PATCH 1/3] xilinx: common: Fix static checker warnings
Avoid signed extension for uuid and byte.
Eliminate the below smatch warnings:
board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup()
warn: impossible condition '(byte == 255) => ((-128)-127 == 255)'
board/xilinx/common/board.c:466 board_late_init_xilinx()
warn: argument 3 to %02x specifier has type 'char'
board/xilinx/common/board.c:466 board_late_init_xilinx()
warn: argument 4 to %02x specifier has type 'char'
Signed-off-by: Venkatesh Yadav Abbarapu
---
board/xilinx/common/board.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 9b4aded466..2b6ead5269 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -119,7 +119,7 @@ struct xilinx_legacy_format {
static void xilinx_eeprom_legacy_cleanup(char *eeprom, int size)
{
int i;
- char byte;
+ unsigned char byte;
for (i = 0; i < size; i++) {
byte = eeprom[i];
@@ -458,8 +458,8 @@ int board_late_init_xilinx(void)
desc->serial);
if (desc->uuid[0]) {
- char uuid[UUID_STR_LEN + 1];
- char *t = desc->uuid;
+ unsigned char uuid[UUID_STR_LEN + 1];
+ unsigned char *t = desc->uuid;
memset(uuid, 0, UUID_STR_LEN + 1);
--
2.17.1
[PATCH] fdt: change splicing offset detection
In fdt_rw.c, -FDT_ERR_BADOFFSET is returned when either the sum of the old length and the splice point are less than the splice point, or when the sum of the old length and the splice point exceed the end of the pointer. Adding an int and a pointer may result in a pointer overflow, an undefined behavior, which means that the result of this if statement can't be recovered from. Checking if the old length exceeds the end of the pointer minus the pointer is a much safer check. Signed-off-by: Elijah Conners --- scripts/dtc/libfdt/fdt_rw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/dtc/libfdt/fdt_rw.c b/scripts/dtc/libfdt/fdt_rw.c index 2eb2b38703..672b74ae7a 100644 --- a/scripts/dtc/libfdt/fdt_rw.c +++ b/scripts/dtc/libfdt/fdt_rw.c @@ -58,7 +58,7 @@ static int fdt_splice_(void *fdt, void *splicepoint, int oldlen, int newlen) char *p = splicepoint; char *end = (char *)fdt + fdt_data_size_(fdt); - if (((p + oldlen) < p) || ((p + oldlen) > end)) + if (oldlen >= (end - p)) return -FDT_ERR_BADOFFSET; if ((p < (char *)fdt) || ((end - oldlen + newlen) < (char *)fdt)) return -FDT_ERR_BADOFFSET; -- 2.29.2.windows.2
[PATCH] rockchip: rk3399: add ethaddr and serial# init, enable for R4S
Some RK3399 boards, such as newer revisions of NanoPi R4S, do not
provide an EEPROM chip containing a globally unique MAC address.
Currently, this means that a randomly generated temporary MAC address
may be generated each time the device is rebooted, leading to ARP cache
issues and other confusing bugs.
Since RK3399 CPUs provide a built-in unique serial number, we can
reliably derive a locally MAC address from it by reading the
corresponding bits from the non-secure efuse block.
Port from uboot-rockchip 0c294d0, fix compilation issues and adjust
coding style.
rockchip: board: puma_rk3399: derive ethaddr from cpuid
rockchip: board: puma_rk3399: add support for serial# and cpuid#
rockchip: efuse: add (misc) driver for RK3399 non-secure efuse block
via efuses
Signed-off-by: Christian Kohlschütter
---
board/rockchip/evb_rk3399/evb-rk3399.c | 120 +
configs/nanopi-r4s-rk3399_defconfig| 4 +
drivers/misc/Makefile | 2 +-
3 files changed, 125 insertions(+), 1 deletion(-)
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c
b/board/rockchip/evb_rk3399/evb-rk3399.c
index abb76585cf..ab8738ccf3 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -5,11 +5,20 @@
#include
#include
+#include
+#include
+#include
+#include
#include
#include
#include
+#include
+#include
#include
+#define RK3399_CPUID_OFF 0x7
+#define RK3399_CPUID_LEN 0x10
+
#ifndef CONFIG_SPL_BUILD
int board_early_init_f(void)
{
@@ -30,3 +39,114 @@ out:
return 0;
}
#endif
+static void setup_macaddr(void)
+{
+ if (!IS_ENABLED(CONFIG_CMD_NET))
+ return;
+
+ int ret;
+ const char *cpuid = env_get("cpuid#");
+ u8 hash[SHA256_SUM_LEN];
+ int size = sizeof(hash);
+ u8 mac_addr[6];
+
+ /* Only generate a MAC address if none is set in the environment */
+ if (env_get("ethaddr"))
+ return;
+
+ if (!cpuid) {
+ debug("%s: could not retrieve 'cpuid#'\n", __func__);
+ return;
+ }
+
+ ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size);
+ if (ret) {
+ debug("%s: failed to calculate SHA256\n", __func__);
+ return;
+ }
+
+ /* Copy 6 bytes of the hash to base the MAC address on */
+ memcpy(mac_addr, hash, 6);
+
+ /* Make this a valid MAC address and set it */
+ mac_addr[0] &= 0xfe; /* clear multicast bit */
+ mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
+ eth_env_set_enetaddr("ethaddr", mac_addr);
+}
+
+static void setup_serial(void)
+{
+ if (!IS_ENABLED(CONFIG_ROCKCHIP_EFUSE))
+ return;
+
+ struct udevice *dev;
+ int ret, i;
+ u8 cpuid[RK3399_CPUID_LEN];
+ u8 low[RK3399_CPUID_LEN / 2], high[RK3399_CPUID_LEN / 2];
+ char cpuid_str[RK3399_CPUID_LEN * 2 + 1];
+ u64 serialno;
+ char serialno_str[16];
+
+ /* retrieve the device */
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_DRIVER_GET(rockchip_efuse), &dev);
+ if (ret) {
+ debug("%s: could not find efuse device\n", __func__);
+ return;
+ }
+
+ /* read the cpu_id range from the efuses */
+ ret = misc_read(dev, RK3399_CPUID_OFF, &cpuid, sizeof(cpuid));
+ if (ret) {
+ debug("%s: reading cpuid from the efuses failed\n",
+ __func__);
+ return;
+ }
+
+ memset(cpuid_str, 0, sizeof(cpuid_str));
+ for (i = 0; i < 16; i++)
+ sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
+
+ debug("cpuid: %s\n", cpuid_str);
+
+ /*
+* Mix the cpuid bytes using the same rules as in
+* ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
+*/
+ for (i = 0; i < 8; i++) {
+ low[i] = cpuid[1 + (i << 1)];
+ high[i] = cpuid[i << 1];
+ }
+
+ serialno = crc32_no_comp(0, low, 8);
+ serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
+ snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
+
+ env_set("cpuid#", cpuid_str);
+ env_set("serial#", serialno_str);
+}
+
+int misc_init_r(void)
+{
+ setup_serial();
+ setup_macaddr();
+
+ return 0;
+}
+
+void get_board_serial(struct tag_serialnr *serialnr)
+{
+ u64 serial = 0;
+
+ if (IS_ENABLED(CONFIG_SERIAL_TAG)) {
+ char *serial_string;
+
+ serial_string = env_get("serial#");
+
+ if (serial_string)
+ serial = simple_strtoull(serial_string, NULL, 16);
+ }
+
+ serialnr->high = (u32)(serial >> 32);
+ serialnr->low = (u32)(serial & 0x);
+}
diff --git a/configs/nanopi-r4s-rk3399_defconfig
b/configs/nanopi-r4s-rk3399_defconfig
index 46ba07f4d5..aa89ac5854 100644
---
how u-boot handles the environment (rpi4, fat environment)
I'm running ubuntu 20.04 server (which uses u-boot v2021.01 with minor changes/enhancements) fw_printenv doesn't seem to work -- it always comes up with a crc error (I haven't tried fw_setenv yet). Is there a spec of how the environment works? I haven't seen one. Without this patch, I get: Warning: Bad CRC, using default environment The first environment variable has a "0x1" in front of it. When I apply this patch, things seem to work: diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c index 66cb9d2a..c85b471a 100644 --- a/tools/env/fw_env.c +++ b/tools/env/fw_env.c @@ -1457,8 +1457,8 @@ int fw_env_open(struct env_opts *opts) goto open_cleanup; } - crc0 = crc32(0, (uint8_t *)environment.data, ENV_SIZE); - + crc0 = crc32(0, (uint8_t *) (environment.data + 1) , ENV_SIZE - 1); But I'm not at the phase of doing fw_setenv (I would have used a newer u-boot, but I'm getting resets on bootup (it works on a vanilla 20.04 system). marty marty
