Re: [PATCH 1/1] efi_loader: stop watchdogs in ExitBootServices()

[Rasmus Villemoes]

On 03/02/2023 03.15, Simon Glass wrote:
> Hi Tom,
> 
> On Thu, 2 Feb 2023 at 10:22, Tom Rini  wrote:
>>

>> Honestly, not really? Some good number of SoCs will start the watchdog
>> in ROM and these are also the ones that don't allow you to turn it off.
> 
> I hope not, that sounds really risky. How would you debug such a platform?

_Every single_ custom piece of industrial (as opposed to consumer-grade)
hardware I've worked on as a consultant has had an external,
always-running, gpio-petted watchdog. It's simply just something that
the hardware designers include, and in some cases that's even due to
certification requirements. So an always-running, cannot-be-turned-off,
watchdog is a real thing, in real hardware, and if specs don't account
for that, well, the spec is just paper, and we can ignore it.

As for debugging and bringup, I've seen various solutions (depending on
the actual watchdog chip). Usually there's some way to place a jumper
that will either feed the watchdog from some, say, 32kHz output from an
RTC or elsewhere, or place a jumper to pull up/pull down some
enable/disable pin to the watchdog chip. IOW, when you have physical
access to the PCB lying on your desk, you can disable the watchdog, but
there's no way to do that in the field or in production.

Rasmus

Re: [PATCH v2 15/16] ARM: tegra30: implement BCT patching

[Svyatoslav Ryhel]

Greetings!

пт, 3 лют. 2023 р. о 04:15 Simon Glass  пише:
>
> Hi Svyatoslav,
>
> On Thu, 2 Feb 2023 at 11:23, Svyatoslav Ryhel  wrote:
> >
> > From: Ramin Khonsari 
> >
> > This function allows updating bootloader from u-boot
> > on production devices without need in host PC.
> >
> > Be aware! It works only with re-crypted BCT.
> >
> > Tested-by: Andreas Westman Dorcsak  # ASUS TF T30
> > Tested-by: Svyatoslav Ryhel  # LG P895 T30
> > Signed-off-by: Ramin Khonsari 
> > Signed-off-by: Svyatoslav Ryhel 
> > ---
> >  arch/arm/mach-tegra/Kconfig  | 10 
> >  arch/arm/mach-tegra/tegra30/Makefile |  1 +
> >  arch/arm/mach-tegra/tegra30/bct.c| 78 
> >  arch/arm/mach-tegra/tegra30/bct.h| 42 +++
> >  4 files changed, 131 insertions(+)
> >  create mode 100644 arch/arm/mach-tegra/tegra30/bct.c
> >  create mode 100644 arch/arm/mach-tegra/tegra30/bct.h
>
> Please add something to doc/ about this.
>
> >
> > diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
> > index 5b0cd92d9e..922e57726f 100644
> > --- a/arch/arm/mach-tegra/Kconfig
> > +++ b/arch/arm/mach-tegra/Kconfig
> > @@ -229,4 +229,14 @@ config CMD_ENTERRCM
> >   for mechanical button actuators, or hooking up relays/... to the
> >   button.
> >
> > +config CMD_EBTUPDATE
> > +   bool "Enable 'ebtupdate' command"
> > +   depends on TEGRA30
> > +   select TEGRA_CRYPTO
> > +   default n
>
> That is always the default so you can drop this line

Will do

>
> > +   help
> > + Updating u-boot from within u-boot in rather complex or even
> > + impossible on production devices. To make it easier procedure of
> > + re-cryption was created. If your device was re-crypted choose Y.
> > +
> >  endif
> > diff --git a/arch/arm/mach-tegra/tegra30/Makefile 
> > b/arch/arm/mach-tegra/tegra30/Makefile
> > index 9f170576e7..28dd486d8d 100644
> > --- a/arch/arm/mach-tegra/tegra30/Makefile
> > +++ b/arch/arm/mach-tegra/tegra30/Makefile
> > @@ -3,5 +3,6 @@
> >  # Copyright (c) 2010-2012, NVIDIA CORPORATION.  All rights reserved.
> >
> >  obj-$(CONFIG_SPL_BUILD) += cpu.o
> > +obj-$(CONFIG_$(SPL_)CMD_EBTUPDATE) += bct.o
> >
> >  obj-y  += clock.o funcmux.o pinmux.o
> > diff --git a/arch/arm/mach-tegra/tegra30/bct.c 
> > b/arch/arm/mach-tegra/tegra30/bct.c
> > new file mode 100644
> > index 00..c26338e263
> > --- /dev/null
> > +++ b/arch/arm/mach-tegra/tegra30/bct.c
> > @@ -0,0 +1,78 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +/*
> > + * Copyright (c) 2022, Ramin 
> > + * Copyright (c) 2022, Svyatoslav Ryhel 
> > + */
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include "bct.h"
> > +#include "uboot_aes.h"
> > +
> > +/*
> > + * \param bct  boot config table start in RAM
> > + * \param ect  bootloader start in RAM
> > + * \param ebt_size bootloader file size in bytes
>
> Returns ?

will add

>
> > + */
> > +static int bct_patch(u8 *bct, u8 *ebt, u32 ebt_size)
> > +{
> > +   struct nvboot_config_table *bct_tbl = NULL;
> > +   u8 ebt_hash[AES128_KEY_LENGTH] = { 0 };
> > +   u8 sbk[AES128_KEY_LENGTH] = { 0 };
> > +   u8 *bct_hash = bct;
> > +   int ret;
> > +
> > +   bct += BCT_HASH;
> > +
> > +   memcpy(sbk, (u8 *)(bct + BCT_LENGTH),
> > +  NVBOOT_CMAC_AES_HASH_LENGTH * 4);
> > +
> > +   ret = decrypt_data_block(bct, BCT_LENGTH, sbk);
> > +   if (ret)
> > +   return 1;
> > +
> > +   ebt_size = roundup(ebt_size, EBT_ALIGNMENT);
> > +
> > +   ret = encrypt_data_block(ebt, ebt_size, sbk);
> > +   if (ret)
> > +   return 1;
> > +
> > +   ret = sign_enc_data_block(ebt, ebt_size, ebt_hash, sbk);
> > +   if (ret)
> > +   return 1;
> > +
> > +   bct_tbl = (struct nvboot_config_table *)bct;
> > +
> > +   memcpy((u8 *)_tbl->bootloader[0].crypto_hash,
> > +  ebt_hash, NVBOOT_CMAC_AES_HASH_LENGTH * 4);
> > +   bct_tbl->bootloader[0].entry_point = CONFIG_SPL_TEXT_BASE;
> > +   bct_tbl->bootloader[0].load_addr = CONFIG_SPL_TEXT_BASE;
> > +   bct_tbl->bootloader[0].length = ebt_size;
> > +
> > +   ret = encrypt_data_block(bct, BCT_LENGTH, sbk);
> > +   if (ret)
> > +   return 1;
> > +
> > +   ret = sign_enc_data_block(bct, BCT_LENGTH, bct_hash, sbk);
> > +   if (ret)
> > +   return 1;
> > +
> > +   return 0;
> > +}
> > +
> > +static int do_ebtupdate(struct cmd_tbl *cmdtp, int flag, int argc,
> > +   char *const argv[])
> > +{
> > +   u32 bct_addr = hextoul(argv[1], NULL);
> > +   u32 ebt_addr = hextoul(argv[2], NULL);
> > +   u32 ebt_size = hextoul(argv[3], NULL);
> > +
> > +   return bct_patch((u8 *)bct_addr, (u8 *)ebt_addr, ebt_size);
> > +}
> > +
> > +U_BOOT_CMD(ebtupdate,  4,  0,  do_ebtupdate,
> > +  "update bootloader on re-crypted Tegra30 devices",
> > +  ""
>

Re: [PATCH v2 03/16] ARM: tegra: clock: add clk_id_to_pll_id helper

[Svyatoslav Ryhel]

пт, 3 лют. 2023 р. о 00:05 Tom Warren  пише:
>
> Svyatoslav,
>
> I was able to apply all of your V2 'General Tegra' patches OK on top of 
> current u-boot-tegra/master. But buildman (and normal make 
> dalmore_defconfig/make) fail to build Dalmore (T114) with the following error:
>
>   CC  arch/arm/mach-tegra/tegra114/clock.o
> arch/arm/mach-tegra/tegra114/clock.c: In function 'clk_id_to_pll_id':
> arch/arm/mach-tegra/tegra114/clock.c:676:7: error: 'TEGRA114_CLK_PLL_E' 
> undeclared (first use in this function)
>   case TEGRA114_CLK_PLL_E:
>^~

Greetings!
This is quite an interesting situation. T114 has no TEGRA114_CLK_PLL_E
but it has TEGRA114_CLK_PLL_E_OUT0 directly.
I will fix this in v3

On other generations the patchset should be still testable.
Thanks.

Best regards
Svyatoslav R.

> PTAL.
>
> Thanks,
>
> Tom
>
> -Original Message-
> From: Svyatoslav Ryhel 
> Sent: Thursday, February 2, 2023 11:14 AM
> To: Tom Warren ; Alban Bedel 
> ; Stephen Warren ; Marcel 
> Ziswiler ; Allen Martin ; 
> Jagan Teki ; Lukasz Majewski ; 
> Marek Vasut ; Svyatoslav Ryhel ; Ramin 
> Khonsari ; Thierry Reding ; 
> Maxim Schwalm ; Dmitry Osipenko 
> Cc: u-boot@lists.denx.de
> Subject: [PATCH v2 03/16] ARM: tegra: clock: add clk_id_to_pll_id helper
>
> External email: Use caution opening links or attachments
>
>
> This function allows to convert a device tree clock ID to PLL ID.
>
> Tested-by: Andreas Westman Dorcsak  # ASUS TF T30
> Tested-by: Robert Eckelmann  # ASUS TF101 T20
> Tested-by: Svyatoslav Ryhel  # HTC One X
> Signed-off-by: Svyatoslav Ryhel 
> ---
>  arch/arm/include/asm/arch-tegra/clock.h |  8 ++
>  arch/arm/mach-tegra/tegra114/clock.c| 37 
>  arch/arm/mach-tegra/tegra124/clock.c| 38 +
>  arch/arm/mach-tegra/tegra20/clock.c | 37 
>  arch/arm/mach-tegra/tegra210/clock.c| 37 
>  arch/arm/mach-tegra/tegra30/clock.c | 37 
>  6 files changed, 194 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-tegra/clock.h 
> b/arch/arm/include/asm/arch-tegra/clock.h
> index 1dd5d0742c..2270501406 100644
> --- a/arch/arm/include/asm/arch-tegra/clock.h
> +++ b/arch/arm/include/asm/arch-tegra/clock.h
> @@ -354,6 +354,14 @@ int get_periph_clock_source(enum periph_id periph_id,
>   */
>  enum periph_id clk_id_to_periph_id(int clk_id);
>
> +/*
> + * Convert a device tree clock ID to our PLL ID.
> + *
> + * @param clk_id   Clock ID according to tegra device tree binding
> + * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid  */
> +enum clock_id clk_id_to_pll_id(int clk_id);
> +
>  /**
>   * Set the output frequency you want for each PLL clock.
>   * PLL output frequencies are programmed by setting their N, M and P values.
> diff --git a/arch/arm/mach-tegra/tegra114/clock.c 
> b/arch/arm/mach-tegra/tegra114/clock.c
> index 143f86863f..c019b2d0cd 100644
> --- a/arch/arm/mach-tegra/tegra114/clock.c
> +++ b/arch/arm/mach-tegra/tegra114/clock.c
> @@ -19,6 +19,8 @@
>  #include 
>  #include 
>
> +#include 
> +
>  /*
>   * Clock types that we can use as a source. The Tegra114 has muxes for the
>   * peripheral clocks, and in most cases there are four options for the clock 
> @@ -646,6 +648,41 @@ enum periph_id clk_id_to_periph_id(int clk_id)
> return clk_id;
> }
>  }
> +
> +/*
> + * Convert a device tree clock ID to our PLL ID.
> + *
> + * @param clk_id   Clock ID according to tegra114 device tree binding
> + * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid  */
> +enum clock_id clk_id_to_pll_id(int clk_id) {
> +   switch (clk_id) {
> +   case TEGRA114_CLK_PLL_C:
> +   return CLOCK_ID_CGENERAL;
> +   case TEGRA114_CLK_PLL_M:
> +   return CLOCK_ID_MEMORY;
> +   case TEGRA114_CLK_PLL_P:
> +   return CLOCK_ID_PERIPH;
> +   case TEGRA114_CLK_PLL_A:
> +   return CLOCK_ID_AUDIO;
> +   case TEGRA114_CLK_PLL_U:
> +   return CLOCK_ID_USB;
> +   case TEGRA114_CLK_PLL_D:
> +   case TEGRA114_CLK_PLL_D_OUT0:
> +   return CLOCK_ID_DISPLAY;
> +   case TEGRA114_CLK_PLL_X:
> +   return CLOCK_ID_XCPU;
> +   case TEGRA114_CLK_PLL_E:
> +   return CLOCK_ID_EPCI;
> +   case TEGRA114_CLK_CLK_32K:
> +   return CLOCK_ID_32KHZ;
> +   case TEGRA114_CLK_CLK_M:
> +   return CLOCK_ID_CLK_M;
> +   default:
> +   return CLOCK_ID_NONE;
> +   }
> +}
>  #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
>
>  void clock_early_init(void)
> diff --git a/arch/arm/mach-tegra/tegra124/clock.c 
> b/arch/arm/mach-tegra/tegra124/clock.c
> index da38b26c27..415ba15e5d 100644
> --- a/arch/arm/mach-tegra/tegra124/clock.c
> +++ b/arch/arm/mach-tegra/tegra124/clock.c
> @@ -19,6 +19,9 @@
>  #include 
>  #include 
>
> +#include 
> +#include 
> +
>  /*
>   * Clock types 

Re: [PATCH v2 10/16] ARM: tegra: create common pre-dm i2c write

[Svyatoslav Ryhel]

пт, 3 лют. 2023 р. о 04:16 Simon Glass  пише:
>
> Hi Svyatoslav,
>
> On Thu, 2 Feb 2023 at 11:43, Svyatoslav Ryhel  wrote:
> >
> > This implementation allows pwr i2c writing on early
> > stages when DM was not yet setup.
>
> s/was/is/ ?

Greetings!

is

>
> >
> > Such writing is needed to configure main voltages of PMIC.
>
> Is this in SPL?

Yes, this is an early SPL stage, when i2c DM is not yet set, and
u-boot to be able to boot itself has to set PMIC core and cpu
voltages. This is the case for T30 and T124, though it may not be
exclusive

Best regards,
Svyatoslav R.

>
> >
> > Tested-by: Andreas Westman Dorcsak  # ASUS TF T30
> > Tested-by: Robert Eckelmann  # ASUS TF101 T20
> > Tested-by: Svyatoslav Ryhel  # LG P895 T30
> > Signed-off-by: Svyatoslav Ryhel 
> > ---
> >  arch/arm/include/asm/arch-tegra/tegra_i2c.h | 17 ++
> >  arch/arm/mach-tegra/cpu.h   |  1 -
> >  arch/arm/mach-tegra/tegra124/cpu.c  |  4 +++
> >  arch/arm/mach-tegra/tegra30/cpu.c   | 37 +++--
> >  4 files changed, 33 insertions(+), 26 deletions(-)
>
> Regards,
> Simon

RE: [PATCH 154/171] Correct SPL use of TARGET_PG_WCOM_SELI8

[Aleksandar Gerasimovski]

This converts 1 usage of this option to the non-SPL form, since there is no 
SPL_TARGET_PG_WCOM_SELI8 defined in Kconfig

Signed-off-by: Simon Glass 
---

Reviewed-by: Aleksandar Gerasimovski 

Regards,
Aleksandar

 board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c 
b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
index c65cd9cdc9b..2f1731eea6a 100644
--- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
+++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
@@ -71,7 +71,7 @@ int board_early_init_f(void)
/* QRIO Configuration */
qrio_uprstreq(UPREQ_CORE_RST);

-#if CONFIG_IS_ENABLED(TARGET_PG_WCOM_SELI8)
+#if IS_ENABLED(CONFIG_TARGET_PG_WCOM_SELI8)
qrio_prstcfg(KM_LIU_RST, PRSTCFG_POWUP_UNIT_RST);
qrio_wdmask(KM_LIU_RST, true);

--
2.39.1.456.gfc5497dd1b-goog

RE: [PATCH 153/171] Correct SPL use of TARGET_PG_WCOM_EXPU1

[Aleksandar Gerasimovski]

This converts 1 usage of this option to the non-SPL form, since there is no 
SPL_TARGET_PG_WCOM_EXPU1 defined in Kconfig

Signed-off-by: Simon Glass 
---

Reviewed-by: Aleksandar Gerasimovski 

Regards,
Aleksandar

 board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c 
b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
index e005ece469b..c65cd9cdc9b 100644
--- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
+++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
@@ -79,7 +79,7 @@ int board_early_init_f(void)
qrio_wdmask(KM_PAXK_RST, true);
 #endif

-#if CONFIG_IS_ENABLED(TARGET_PG_WCOM_EXPU1)
+#if IS_ENABLED(CONFIG_TARGET_PG_WCOM_EXPU1)
qrio_prstcfg(WCOM_TMG_RST, PRSTCFG_POWUP_UNIT_RST);
qrio_wdmask(WCOM_TMG_RST, true);

--
2.39.1.456.gfc5497dd1b-goog

RE: [PATCH 124/171] Correct SPL use of PG_WCOM_UBOOT_UPDATE_SUPPORTED

[Aleksandar Gerasimovski]

This converts 1 usage of this option to the non-SPL form, since there is no 
SPL_PG_WCOM_UBOOT_UPDATE_SUPPORTED defined in Kconfig

Signed-off-by: Simon Glass 
---

Reviewed-by: Aleksandar Gerasimovski 

Regards,
Aleksandar

 board/keymile/common/common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c 
index 8c282f9952a..991022ac833 100644
--- a/board/keymile/common/common.c
+++ b/board/keymile/common/common.c
@@ -78,7 +78,7 @@ int set_km_env(void)
return 0;
 }

-#if CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE_SUPPORTED)
+#if IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE_SUPPORTED)
 #if   ((!IS_ENABLED(CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE) && \
!IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE)) || \
(IS_ENABLED(CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE) && \
--
2.39.1.456.gfc5497dd1b-goog

RE: [PATCH 122/171] Correct SPL uses of PG_WCOM_UBOOT_BOOTPACKAGE

[Aleksandar Gerasimovski]

This converts 2 usages of this option to the non-SPL form, since there is no 
SPL_PG_WCOM_UBOOT_BOOTPACKAGE defined in Kconfig

Signed-off-by: Simon Glass 
---

Reviewed-by: Aleksandar Gerasimovski 

Regards,
Aleksandar

 board/keymile/common/common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c 
index 0252ada93ff..9cf5b71655c 100644
--- a/board/keymile/common/common.c
+++ b/board/keymile/common/common.c
@@ -79,9 +79,9 @@ int set_km_env(void)
 }

 #if CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE_SUPPORTED)
-#if   ((!CONFIG_IS_ENABLED(PG_WCOM_UBOOT_BOOTPACKAGE) && \
+#if   ((!IS_ENABLED(CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE) && \
!CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE)) || \
-   (CONFIG_IS_ENABLED(PG_WCOM_UBOOT_BOOTPACKAGE) && \
+   (IS_ENABLED(CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE) && \
CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE)))
 #error "It has to be either bootpackage or update u-boot image!"
 #endif
--
2.39.1.456.gfc5497dd1b-goog

RE: [PATCH 123/171] Correct SPL uses of PG_WCOM_UBOOT_UPDATE

[Aleksandar Gerasimovski]

This converts 2 usages of this option to the non-SPL form, since there is no 
SPL_PG_WCOM_UBOOT_UPDATE defined in Kconfig

Signed-off-by: Simon Glass 
---
Reviewed-by: Aleksandar Gerasimovski 

Regards,
Aleksandar

 board/keymile/common/common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c 
index 9cf5b71655c..8c282f9952a 100644
--- a/board/keymile/common/common.c
+++ b/board/keymile/common/common.c
@@ -80,9 +80,9 @@ int set_km_env(void)

 #if CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE_SUPPORTED)
 #if   ((!IS_ENABLED(CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE) && \
-   !CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE)) || \
+   !IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE)) || \
(IS_ENABLED(CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE) && \
-   CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE)))
+   IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE)))
 #error "It has to be either bootpackage or update u-boot image!"
 #endif
 void check_for_uboot_update(void)
--
2.39.1.456.gfc5497dd1b-goog

Re: [PATCH v3 20/76] samsung: Drop CONFIG_EXYNOS_PWM_BL

[Minkyu Kang]

Hi,

On Thu, 2 Feb 2023 at 05:34, Simon Glass  wrote:

> This is not defined anywhere. Drop it.
>
> Signed-off-by: Simon Glass 
> ---
>
> (no changes since v1)
>
>  drivers/video/exynos/Makefile | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/drivers/video/exynos/Makefile b/drivers/video/exynos/Makefile
> index 0f58954e49c..45067f562cb 100644
> --- a/drivers/video/exynos/Makefile
> +++ b/drivers/video/exynos/Makefile
> @@ -7,4 +7,3 @@ obj-$(CONFIG_EXYNOS_DP) += exynos_dp.o exynos_dp_lowlevel.o
>  obj-$(CONFIG_EXYNOS_FB) += exynos_fb.o
>  obj-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o
> exynos_mipi_dsi_common.o \
> exynos_mipi_dsi_lowlevel.o
> -obj-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o
> --
> 2.39.1.456.gfc5497dd1b-goog
>
>
Reviewed-by: Minkyu Kang 

-- 
Thanks,
Minkyu Kang.

Re: [PATCH v3 46/76] samsung: Rename PINCTRL_EXYNOS78x0

[Minkyu Kang]

Hi,

On Thu, 2 Feb 2023 at 05:48, Simon Glass  wrote:

> CONFIG options must not use lower-case letter. Convert this to upper case.
>
> Signed-off-by: Simon Glass 
> ---
>
> (no changes since v1)
>
>  arch/arm/mach-exynos/Kconfig| 6 +++---
>  drivers/pinctrl/exynos/Kconfig  | 2 +-
>  drivers/pinctrl/exynos/Makefile | 2 +-
>  3 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> index 8f3aee052c8..1a1fd7261b1 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -204,7 +204,7 @@ config  TARGET_A5Y17LTE
> select CLK_EXYNOS
> select OF_CONTROL
> select PINCTRL
> -   select PINCTRL_EXYNOS78x0
> +   select PINCTRL_EXYNOS78X0
> select SUPPORT_SPL
>
>  config  TARGET_A7Y17LTE
> @@ -213,7 +213,7 @@ config  TARGET_A7Y17LTE
> select CLK_EXYNOS
> select OF_CONTROL
> select PINCTRL
> -   select PINCTRL_EXYNOS78x0
> +   select PINCTRL_EXYNOS78X0
> select SUPPORT_SPL
>
>  config  TARGET_A3Y17LTE
> @@ -222,7 +222,7 @@ config  TARGET_A3Y17LTE
> select CLK_EXYNOS
> select OF_CONTROL
> select PINCTRL
> -   select PINCTRL_EXYNOS78x0
> +   select PINCTRL_EXYNOS78X0
> select SUPPORT_SPL
>
>  endchoice
> diff --git a/drivers/pinctrl/exynos/Kconfig
> b/drivers/pinctrl/exynos/Kconfig
> index a60f49869b4..821bdd14072 100644
> --- a/drivers/pinctrl/exynos/Kconfig
> +++ b/drivers/pinctrl/exynos/Kconfig
> @@ -9,7 +9,7 @@ config PINCTRL_EXYNOS7420
>   Support pin multiplexing and pin configuration control on
>   Samsung's Exynos7420 SoC.
>
> -config PINCTRL_EXYNOS78x0
> +config PINCTRL_EXYNOS78X0
> bool "Samsung Exynos78x0 pinctrl driver"
> depends on ARCH_EXYNOS && PINCTRL_FULL
> select PINCTRL_EXYNOS
> diff --git a/drivers/pinctrl/exynos/Makefile
> b/drivers/pinctrl/exynos/Makefile
> index 07db970ca94..445c8e17aea 100644
> --- a/drivers/pinctrl/exynos/Makefile
> +++ b/drivers/pinctrl/exynos/Makefile
> @@ -5,4 +5,4 @@
>
>  obj-$(CONFIG_PINCTRL_EXYNOS)   += pinctrl-exynos.o
>  obj-$(CONFIG_PINCTRL_EXYNOS7420)   += pinctrl-exynos7420.o
> -obj-$(CONFIG_PINCTRL_EXYNOS78x0)   += pinctrl-exynos78x0.o
> +obj-$(CONFIG_PINCTRL_EXYNOS78X0)   += pinctrl-exynos78x0.o
> --
> 2.39.1.456.gfc5497dd1b-goog
>
>
Reviewed-by: Minkyu Kang 

-- 
Thanks,
Minkyu Kang.

Re: [EXTERNAL] Re: [PATCH v2 1/7] drivers: core: ofnode: Add panel timing decode.

[Nikhil M Jain]

Hi Simon,

On 31/01/23 19:46, Simon Glass wrote:

On Tue, 31 Jan 2023 at 03:05, Nikhil M Jain  wrote:

ofnode_decode_display_timing supports reading timing parameters from
subnode of display-timings node, for displays supporting multiple
resolution, in case if a display supports single resolution, it fails
reading directly from display-timings node, to support it
ofnode_decode_panel_timing is added.

Signed-off-by: Nikhil M Jain 
---
  drivers/core/ofnode.c | 47 +++
  drivers/core/read.c   |  6 ++
  include/dm/ofnode.h   | 12 +++
  include/dm/read.h | 14 +
  4 files changed, 79 insertions(+)

Reviewed-by: Simon Glass 

(missing change log)


Changes:

Added dev_decode_panel timing declaration and definition.

Thanks

Re: [PATCH] arm: kirkwood: Enable uart0 dm-pre-reloc for Kirkwood boards

[Tony Dinh]

Hi all,

On Thu, Feb 2, 2023 at 3:59 PM Tony Dinh  wrote:
>
> Hi all,
>
> On Thu, Feb 2, 2023 at 10:04 AM Pali Rohár  wrote:
> >
> > On Wednesday 01 February 2023 13:13:16 Tony Dinh wrote:
> > > Hi all,
> > >
> > > On Wed, Feb 1, 2023 at 11:05 AM Pali Rohár  wrote:
> > > >
> > > > On Wednesday 01 February 2023 09:17:15 Michael Walle wrote:
> > > > > > > > When DM_SERIAL is enabled, the device-tree property 
> > > > > > > > dm-pre-reloc is
> > > > > > > > required to boot over UART with kwboot. Enable this in a 
> > > > > > > > Kirkwood
> > > > > > > > common u-boot dtsi.
> > > > > > >
> > > > > > > My (dev) board unfortunately, have a bootloader which can't boot 
> > > > > > > over
> > > > > > > serial.
> > > > > >
> > > > > > This is feature of Marvell BootROM and does not require any special 
> > > > > > from
> > > > > > Bootloader. So you should be able to boot over UART (if you have
> > > > > > accessible pins).
> > > > >
> > > > > I know, but there are known versions ob the bootrom where uart boot
> > > > > isn't supported (correctly).
> > > >
> > > > I heard about it... maybe it is a bug in client software (kwboot)? I do
> > > > not have such board if you are interested in it I could try to send some
> > > > details how to debug it.
> > >
> > > The Kirkwood SoCs came with different BootROM versions. Version 1.1
> > > cannot be booted over UART, but version 1.2  can. I think there must
> > > be a bug in the BootROM 1.1. The older Kirkwood such as Sheevaplug,
> > > Dockstar, iConnect boards come with BootROM 1.1. Later version of
> > > Sheevaplug, GoFlex Home, GoFlex Net, Dreamplug, Pogoplug V4, Zyxel
> > > NSA310S, NSA320, NSA325 come with BootROM 1.2. So even though it is
> > > the same SoC, eg. 6281, they are actually produced at a different time
> > > and have different BootROM versions.
> >
> > There are always multiple revisions of the same SoC. So it is possible
> > that something was broken on first revision of 88F6281 and in next
> > revision was updated BootROM with some fixes. Revision is written on
> > package label and for Armada SoCs it is available also in some register
> > (not sure about Kirkwood). It looks like that there is at least revision
> > Z0 and revision A0 of some Kirkwood SoC.
> >
> > If there is a bug in first revisions then it should be documented in
> > some Kirkwood Errata document. Unfortunately I have never seen it, it is
> > not public, so I have no idea. In any case, if somebody has access to
> > Marvell documents, interesting are these document numbers:
> >
> > * MV-S105223-001 - Differences Between the 88F6192, and 88F6281 Stepping Z0 
> > and A0
> > * MV-S501081-00 - 88F6180, 88F6192, and 88F6281 Functional Errata, 
> > Interface Guidelines, and Restrictions
> > * MV-S501157-U0 - 88F6180, 88F6190, 88F6192, and 88F6281 Functional Errata, 
> > Interface Guidelines, and Restrictions
> >
> > One of the option how to investigate or debug this issue without
> > documentation is to dump both BootROM versions (1.1, 1.2) and compare
> > them. Either there is different UART protocol for booting (which needs
> > to be implemented) or UART protocol is buggy and needs some workaround
> > or it is completely broken and does not work.
>
> Here is an excerpt from doc/develop/driver-model/serial-howto.rst.
>
> Quote ===
> Here are some things you might need to consider:
>
> 1. The serial driver itself needs to be present before relocation, so that the
>U-Boot banner appears. Make sure it has a u-boot,dm-pre-reloc tag
> in the device
>tree, so that the serial driver is bound when U-Boot starts.
>
>For example, on iMX8::
>
>lpuart3: serial@5a09 {
>compatible = "fsl,imx8qm-lpuart";
>...
>};
>
>put this in your xxx-u-boot.dtsi file::
>
> {
>u-boot,dm-pre-proper;
>};
> === Unquote
>
> So it looks like my understanding was correct. The serial driver is
> not bound if there is no u-boot,dm-pre-reloc tag. And does it sound
> like it is required for all targets because of this reason?

Well, after giving it some thought I think my reasoning is not sound.
There must be a bug somewhere that the Pogo V4 triggers (the board
that has a silent console, and then freezes, when dm-pre-reloc is not
used for uart0).

Because, even if the serial driver is not bound to the uclass, it
should boot with the silent console regardless? and after relocation,
u-boot should bind the serial driver, and we'd just lose the banner
part?

Confusedly yours,
Tony

Re: [RFC PATCH v1 2/2] include: dm: ofnode: fix headers

[Simon Glass]

On Thu, 2 Feb 2023 at 10:59, Johan Jonker  wrote:
>
> When fdt_addr_t and phys_addr_t are split it turns out that
> the header don't match the functions, so fix the headers.
>
> Signed-off-by: Johan Jonker 
> ---
>  include/dm/ofnode.h | 16 
>  1 file changed, 8 insertions(+), 8 deletions(-)
>

Reviewed-by: Simon Glass 

Re: [PATCH v2 10/16] ARM: tegra: create common pre-dm i2c write

[Simon Glass]

Hi Svyatoslav,

On Thu, 2 Feb 2023 at 11:43, Svyatoslav Ryhel  wrote:
>
> This implementation allows pwr i2c writing on early
> stages when DM was not yet setup.

s/was/is/ ?

>
> Such writing is needed to configure main voltages of PMIC.

Is this in SPL?

>
> Tested-by: Andreas Westman Dorcsak  # ASUS TF T30
> Tested-by: Robert Eckelmann  # ASUS TF101 T20
> Tested-by: Svyatoslav Ryhel  # LG P895 T30
> Signed-off-by: Svyatoslav Ryhel 
> ---
>  arch/arm/include/asm/arch-tegra/tegra_i2c.h | 17 ++
>  arch/arm/mach-tegra/cpu.h   |  1 -
>  arch/arm/mach-tegra/tegra124/cpu.c  |  4 +++
>  arch/arm/mach-tegra/tegra30/cpu.c   | 37 +++--
>  4 files changed, 33 insertions(+), 26 deletions(-)

Regards,
Simon

Re: [PATCH v2 01/16] tegra30: clock: add EXTPERIPH

[Simon Glass]

On Thu, 2 Feb 2023 at 11:14, Svyatoslav Ryhel  wrote:
>
> This mappings were missing for some reason.
>
> Tested-by: Svyatoslav Ryhel  # LG P895 T30
> Signed-off-by: Svyatoslav Ryhel 
> ---
>  arch/arm/include/asm/arch-tegra30/clock-tables.h | 6 +++---
>  arch/arm/mach-tegra/tegra30/clock.c  | 6 +++---
>  2 files changed, 6 insertions(+), 6 deletions(-)

Reviewed-by: Simon Glass 

Re: [PATCH v2 12/16] board: tegra30: switch to updated pre-dm i2c write

[Simon Glass]

On Thu, 2 Feb 2023 at 11:28, Svyatoslav Ryhel  wrote:
>
> Configure PMIC voltages for early stages using updated
> early i2c write.
>
> Signed-off-by: Svyatoslav Ryhel 
> ---
>  arch/arm/mach-tegra/tegra30/Kconfig |  8 
>  arch/arm/mach-tegra/tegra30/cpu.c   | 36 -
>  board/avionic-design/tec-ng/Makefile|  4 +-
>  board/avionic-design/tec-ng/tec-ng-spl.c| 34 
>  board/nvidia/beaver/Makefile|  2 +
>  board/nvidia/beaver/beaver-spl.c| 43 +
>  board/nvidia/cardhu/Makefile|  4 +-
>  board/nvidia/cardhu/cardhu-spl.c| 43 +
>  board/toradex/apalis_t30/Makefile   |  2 +
>  board/toradex/apalis_t30/apalis_t30-spl.c   | 34 
>  board/toradex/colibri_t30/Makefile  |  2 +
>  board/toradex/colibri_t30/colibri_t30-spl.c | 34 
>  12 files changed, 200 insertions(+), 46 deletions(-)
>  create mode 100644 board/avionic-design/tec-ng/tec-ng-spl.c
>  create mode 100644 board/nvidia/beaver/beaver-spl.c
>  create mode 100644 board/nvidia/cardhu/cardhu-spl.c
>  create mode 100644 board/toradex/apalis_t30/apalis_t30-spl.c
>  create mode 100644 board/toradex/colibri_t30/colibri_t30-spl.c
>

Reviewed-by: Simon Glass 

Re: [PATCH v2 15/16] ARM: tegra30: implement BCT patching

[Simon Glass]

Hi Svyatoslav,

On Thu, 2 Feb 2023 at 11:23, Svyatoslav Ryhel  wrote:
>
> From: Ramin Khonsari 
>
> This function allows updating bootloader from u-boot
> on production devices without need in host PC.
>
> Be aware! It works only with re-crypted BCT.
>
> Tested-by: Andreas Westman Dorcsak  # ASUS TF T30
> Tested-by: Svyatoslav Ryhel  # LG P895 T30
> Signed-off-by: Ramin Khonsari 
> Signed-off-by: Svyatoslav Ryhel 
> ---
>  arch/arm/mach-tegra/Kconfig  | 10 
>  arch/arm/mach-tegra/tegra30/Makefile |  1 +
>  arch/arm/mach-tegra/tegra30/bct.c| 78 
>  arch/arm/mach-tegra/tegra30/bct.h| 42 +++
>  4 files changed, 131 insertions(+)
>  create mode 100644 arch/arm/mach-tegra/tegra30/bct.c
>  create mode 100644 arch/arm/mach-tegra/tegra30/bct.h

Please add something to doc/ about this.

>
> diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
> index 5b0cd92d9e..922e57726f 100644
> --- a/arch/arm/mach-tegra/Kconfig
> +++ b/arch/arm/mach-tegra/Kconfig
> @@ -229,4 +229,14 @@ config CMD_ENTERRCM
>   for mechanical button actuators, or hooking up relays/... to the
>   button.
>
> +config CMD_EBTUPDATE
> +   bool "Enable 'ebtupdate' command"
> +   depends on TEGRA30
> +   select TEGRA_CRYPTO
> +   default n

That is always the default so you can drop this line

> +   help
> + Updating u-boot from within u-boot in rather complex or even
> + impossible on production devices. To make it easier procedure of
> + re-cryption was created. If your device was re-crypted choose Y.
> +
>  endif
> diff --git a/arch/arm/mach-tegra/tegra30/Makefile 
> b/arch/arm/mach-tegra/tegra30/Makefile
> index 9f170576e7..28dd486d8d 100644
> --- a/arch/arm/mach-tegra/tegra30/Makefile
> +++ b/arch/arm/mach-tegra/tegra30/Makefile
> @@ -3,5 +3,6 @@
>  # Copyright (c) 2010-2012, NVIDIA CORPORATION.  All rights reserved.
>
>  obj-$(CONFIG_SPL_BUILD) += cpu.o
> +obj-$(CONFIG_$(SPL_)CMD_EBTUPDATE) += bct.o
>
>  obj-y  += clock.o funcmux.o pinmux.o
> diff --git a/arch/arm/mach-tegra/tegra30/bct.c 
> b/arch/arm/mach-tegra/tegra30/bct.c
> new file mode 100644
> index 00..c26338e263
> --- /dev/null
> +++ b/arch/arm/mach-tegra/tegra30/bct.c
> @@ -0,0 +1,78 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (c) 2022, Ramin 
> + * Copyright (c) 2022, Svyatoslav Ryhel 
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "bct.h"
> +#include "uboot_aes.h"
> +
> +/*
> + * \param bct  boot config table start in RAM
> + * \param ect  bootloader start in RAM
> + * \param ebt_size bootloader file size in bytes

Returns ?

> + */
> +static int bct_patch(u8 *bct, u8 *ebt, u32 ebt_size)
> +{
> +   struct nvboot_config_table *bct_tbl = NULL;
> +   u8 ebt_hash[AES128_KEY_LENGTH] = { 0 };
> +   u8 sbk[AES128_KEY_LENGTH] = { 0 };
> +   u8 *bct_hash = bct;
> +   int ret;
> +
> +   bct += BCT_HASH;
> +
> +   memcpy(sbk, (u8 *)(bct + BCT_LENGTH),
> +  NVBOOT_CMAC_AES_HASH_LENGTH * 4);
> +
> +   ret = decrypt_data_block(bct, BCT_LENGTH, sbk);
> +   if (ret)
> +   return 1;
> +
> +   ebt_size = roundup(ebt_size, EBT_ALIGNMENT);
> +
> +   ret = encrypt_data_block(ebt, ebt_size, sbk);
> +   if (ret)
> +   return 1;
> +
> +   ret = sign_enc_data_block(ebt, ebt_size, ebt_hash, sbk);
> +   if (ret)
> +   return 1;
> +
> +   bct_tbl = (struct nvboot_config_table *)bct;
> +
> +   memcpy((u8 *)_tbl->bootloader[0].crypto_hash,
> +  ebt_hash, NVBOOT_CMAC_AES_HASH_LENGTH * 4);
> +   bct_tbl->bootloader[0].entry_point = CONFIG_SPL_TEXT_BASE;
> +   bct_tbl->bootloader[0].load_addr = CONFIG_SPL_TEXT_BASE;
> +   bct_tbl->bootloader[0].length = ebt_size;
> +
> +   ret = encrypt_data_block(bct, BCT_LENGTH, sbk);
> +   if (ret)
> +   return 1;
> +
> +   ret = sign_enc_data_block(bct, BCT_LENGTH, bct_hash, sbk);
> +   if (ret)
> +   return 1;
> +
> +   return 0;
> +}
> +
> +static int do_ebtupdate(struct cmd_tbl *cmdtp, int flag, int argc,
> +   char *const argv[])
> +{
> +   u32 bct_addr = hextoul(argv[1], NULL);
> +   u32 ebt_addr = hextoul(argv[2], NULL);
> +   u32 ebt_size = hextoul(argv[3], NULL);
> +
> +   return bct_patch((u8 *)bct_addr, (u8 *)ebt_addr, ebt_size);
> +}
> +
> +U_BOOT_CMD(ebtupdate,  4,  0,  do_ebtupdate,
> +  "update bootloader on re-crypted Tegra30 devices",
> +  ""

Please add doc/usage/cmd file

> +);
> diff --git a/arch/arm/mach-tegra/tegra30/bct.h 
> b/arch/arm/mach-tegra/tegra30/bct.h
> new file mode 100644
> index 00..9797384da3
> --- /dev/null
> +++ b/arch/arm/mach-tegra/tegra30/bct.h
> @@ -0,0 +1,42 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +
> +#ifndef _BCT_H_
> +#define _BCT_H_
> +
> +/*
> + * Defines the 

Re: [PATCH v2 11/16] board: tegra124: switch to updated pre-dm i2c write

[Simon Glass]

On Thu, 2 Feb 2023 at 11:17, Svyatoslav Ryhel  wrote:
>
> Configure PMIC for early stages using updated i2c write.
>
> Signed-off-by: Svyatoslav Ryhel 
> ---
>  board/nvidia/venice2/as3722_init.c | 65 
>  board/nvidia/venice2/as3722_init.h | 43 -
>  board/toradex/apalis-tk1/as3722_init.c | 85 ++
>  board/toradex/apalis-tk1/as3722_init.h | 40 
>  4 files changed, 88 insertions(+), 145 deletions(-)
>  delete mode 100644 board/nvidia/venice2/as3722_init.h
>  delete mode 100644 board/toradex/apalis-tk1/as3722_init.h
>

Reviewed-by: Simon Glass 

Re: [PATCH 1/1] efi_loader: stop watchdogs in ExitBootServices()

[Simon Glass]

Hi Tom,

On Thu, 2 Feb 2023 at 10:22, Tom Rini  wrote:
>
> On Thu, Feb 02, 2023 at 10:12:07AM -0700, Simon Glass wrote:
> > Hi,
> >
> > On Thu, 2 Feb 2023 at 01:17, Etienne Carriere
> >  wrote:
> > >
> > > Hello Heinrich and all,
> > >
> > > On Wed, 1 Feb 2023 at 10:00, Heinrich Schuchardt
> > >  wrote:
> > > >
> > > >
> > > >
> > > > On 2/1/23 09:32, Rasmus Villemoes wrote:
> > > > > On 31/01/2023 16.07, Tom Rini wrote:
> > > > >> On Tue, Jan 31, 2023 at 02:03:10PM +0200, Ilias Apalodimas wrote:
> > > > >>> Hi all,
> > > > >>>
> > > > >>> On Mon, Jan 30, 2023 at 01:30:49PM -0500, Tom Rini wrote:
> > > >  On Mon, Jan 30, 2023 at 01:13:55PM -0500, Tom Rini wrote:
> > > > > On Sat, Jan 28, 2023 at 09:57:45AM +0100, Heinrich Schuchardt 
> > > > > wrote:
> > > > >
> > > > >> The UEFI specification requires for ExitBootServices() that "the 
> > > > >> boot
> > > > >> services watchdog timer is disabled". We already disable the 
> > > > >> software
> > > > >> watchdog. We should additionally disable the hardware watchdogs.
> > > > >>
> > > > >> Reported-by: Andre Przywara 
> > > > >> Signed-off-by: Heinrich Schuchardt 
> > > > >> 
> > > > >> ---
> > > > >>   lib/efi_loader/efi_boottime.c | 10 ++
> > > > >>   1 file changed, 6 insertions(+), 4 deletions(-)
> > > > >>
> > > > >> diff --git a/lib/efi_loader/efi_boottime.c 
> > > > >> b/lib/efi_loader/efi_boottime.c
> > > > >> index ba28989f36..71215af9d2 100644
> > > > >> --- a/lib/efi_loader/efi_boottime.c
> > > > >> +++ b/lib/efi_loader/efi_boottime.c
> > > > >> @@ -19,6 +19,7 @@
> > > > >>   #include 
> > > > >>   #include 
> > > > >>   #include 
> > > > >> +#include 
> > > > >>   #include 
> > > > >>   #include 
> > > > >>   #include 
> > > > >> @@ -2171,6 +2172,11 @@ static efi_status_t EFIAPI 
> > > > >> efi_exit_boot_services(efi_handle_t image_handle,
> > > > >>  list_del(>link);
> > > > >>  }
> > > > >>
> > > > >> +/* Disable watchdogs */
> > > > >> +efi_set_watchdog(0);
> > > > >> +if IS_ENABLED(CONFIG_WDT)
> > > > >> +wdt_stop_all();
> > > > >> +
> > > > >>  if (!efi_st_keep_devices) {
> > > > >>  bootm_disable_interrupts();
> > > > >>  if (IS_ENABLED(CONFIG_USB_DEVICE))
> > > > >> @@ -2196,10 +2202,6 @@ static efi_status_t EFIAPI 
> > > > >> efi_exit_boot_services(efi_handle_t image_handle,
> > > > >>
> > > > >>  /* Recalculate CRC32 */
> > > > >>  efi_update_table_header_crc32();
> > > > >> -
> > > > >> -/* Give the payload some time to boot */
> > > > >> -efi_set_watchdog(0);
> > > > >> -schedule();
> > > > >>   out:
> > > > >>  if (IS_ENABLED(CONFIG_EFI_TCG2_PROTOCOL)) {
> > > > >>  if (ret != EFI_SUCCESS)
> > > > >
> > > > > I thought we had rejected going down this path since the UEFI 
> > > > > spec is
> > > > > unhelpfully wrong if it insists this?
> > > > 
> > > >  Because, to be clear, stopping hardware watchdogs is not to be 
> > > >  done. The
> > > >  one in-tree caller of wdt_stop_all is very questionable. You cannot
> > > >  seriously stop a watchdog until someone else can hopefully resume 
> > > >  it as
> > > >  that violates the function of a hardware watchdog. A pure software
> > > >  watchdog is one thing, and a hardware watchdog is another. I feel 
> > > >  like
> > > >  the most likely answer here is that someone needs to, still, push 
> > > >  back
> > > >  to the UEFI specification to get hardware watchdogs better 
> > > >  understood
> > > >  and handled, as it must never be stopped once started and if you 
> > > >  cannot
> > > >  reach the next stage in time, that's an engineering issue to 
> > > >  resolve. My
> > > >  first guess is that ExitBootServices should service the watchdog 
> > > >  one
> > > >  last time to ensure the largest window of time for the OS to take 
> > > >  over
> > > >  servicing of the watchdog.
> > > > 
> > > > >>>
> > > > >>> There's two scenarios I can think of
> > > > >>> 1. After U-Boot is done it can disable the hardware watchdog.
> > > > >>> The kernel will go through the EFI-stub -> kernel proper -> 
> > > > >>> watchdog
> > > > >>> gets re-initialized.  In that case you are *hoping* that device 
> > > > >>> won't
> > > > >>> hang in the efi-stub or until the wd is up again.
> > > > >>> 2. EFI makes sure the hardware wd gets configured with the highest 
> > > > >>> allowed
> > > > >>> value.  The efi-stub doesn't have any driver to refresh the wd, 
> > > > >>> so we
> > > > >>> will again rely on the wd driver coming up and refreshing the 
> > > > >>> timers.
> > > > >>
> 

Re: [PATCH] arm: kirkwood: Enable uart0 dm-pre-reloc for Kirkwood boards

[Tony Dinh]

Hi all,

On Thu, Feb 2, 2023 at 10:04 AM Pali Rohár  wrote:
>
> On Wednesday 01 February 2023 13:13:16 Tony Dinh wrote:
> > Hi all,
> >
> > On Wed, Feb 1, 2023 at 11:05 AM Pali Rohár  wrote:
> > >
> > > On Wednesday 01 February 2023 09:17:15 Michael Walle wrote:
> > > > > > > When DM_SERIAL is enabled, the device-tree property dm-pre-reloc 
> > > > > > > is
> > > > > > > required to boot over UART with kwboot. Enable this in a Kirkwood
> > > > > > > common u-boot dtsi.
> > > > > >
> > > > > > My (dev) board unfortunately, have a bootloader which can't boot 
> > > > > > over
> > > > > > serial.
> > > > >
> > > > > This is feature of Marvell BootROM and does not require any special 
> > > > > from
> > > > > Bootloader. So you should be able to boot over UART (if you have
> > > > > accessible pins).
> > > >
> > > > I know, but there are known versions ob the bootrom where uart boot
> > > > isn't supported (correctly).
> > >
> > > I heard about it... maybe it is a bug in client software (kwboot)? I do
> > > not have such board if you are interested in it I could try to send some
> > > details how to debug it.
> >
> > The Kirkwood SoCs came with different BootROM versions. Version 1.1
> > cannot be booted over UART, but version 1.2  can. I think there must
> > be a bug in the BootROM 1.1. The older Kirkwood such as Sheevaplug,
> > Dockstar, iConnect boards come with BootROM 1.1. Later version of
> > Sheevaplug, GoFlex Home, GoFlex Net, Dreamplug, Pogoplug V4, Zyxel
> > NSA310S, NSA320, NSA325 come with BootROM 1.2. So even though it is
> > the same SoC, eg. 6281, they are actually produced at a different time
> > and have different BootROM versions.
>
> There are always multiple revisions of the same SoC. So it is possible
> that something was broken on first revision of 88F6281 and in next
> revision was updated BootROM with some fixes. Revision is written on
> package label and for Armada SoCs it is available also in some register
> (not sure about Kirkwood). It looks like that there is at least revision
> Z0 and revision A0 of some Kirkwood SoC.
>
> If there is a bug in first revisions then it should be documented in
> some Kirkwood Errata document. Unfortunately I have never seen it, it is
> not public, so I have no idea. In any case, if somebody has access to
> Marvell documents, interesting are these document numbers:
>
> * MV-S105223-001 - Differences Between the 88F6192, and 88F6281 Stepping Z0 
> and A0
> * MV-S501081-00 - 88F6180, 88F6192, and 88F6281 Functional Errata, Interface 
> Guidelines, and Restrictions
> * MV-S501157-U0 - 88F6180, 88F6190, 88F6192, and 88F6281 Functional Errata, 
> Interface Guidelines, and Restrictions
>
> One of the option how to investigate or debug this issue without
> documentation is to dump both BootROM versions (1.1, 1.2) and compare
> them. Either there is different UART protocol for booting (which needs
> to be implemented) or UART protocol is buggy and needs some workaround
> or it is completely broken and does not work.

Here is an excerpt from doc/develop/driver-model/serial-howto.rst.

Quote ===
Here are some things you might need to consider:

1. The serial driver itself needs to be present before relocation, so that the
   U-Boot banner appears. Make sure it has a u-boot,dm-pre-reloc tag
in the device
   tree, so that the serial driver is bound when U-Boot starts.

   For example, on iMX8::

   lpuart3: serial@5a09 {
   compatible = "fsl,imx8qm-lpuart";
   ...
   };

   put this in your xxx-u-boot.dtsi file::

{
   u-boot,dm-pre-proper;
   };
=== Unquote

So it looks like my understanding was correct. The serial driver is
not bound if there is no u-boot,dm-pre-reloc tag. And does it sound
like it is required for all targets because of this reason?

Thanks,
Tony

[PATCH] arm: kirkwood: sheevaplug: reduce u-boot image size

[Tony Dinh]

Sheevaplug board has 512K CONFIG_BOARD_SIZE_LIMIT. Recently, DM_SERIAL has
pushed the image size a few hundred bytes over that limit. So explicitly
deselect some configs that are unrelated to this board
(and gain back a bit over 2K).

Signed-off-by: Tony Dinh 
---

 configs/sheevaplug_defconfig | 5 +
 1 file changed, 5 insertions(+)

diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index cb38a3fbd5..40ab16dfa0 100644
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -26,6 +26,11 @@ CONFIG_USE_PREBOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_MAXARGS=32
 CONFIG_CMD_BOOTZ=y
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
-- 
2.30.2

RE: [PATCH v2 03/16] ARM: tegra: clock: add clk_id_to_pll_id helper

[Tom Warren]

Svyatoslav,

I was able to apply all of your V2 'General Tegra' patches OK on top of current 
u-boot-tegra/master. But buildman (and normal make dalmore_defconfig/make) fail 
to build Dalmore (T114) with the following error:

  CC  arch/arm/mach-tegra/tegra114/clock.o
arch/arm/mach-tegra/tegra114/clock.c: In function 'clk_id_to_pll_id':
arch/arm/mach-tegra/tegra114/clock.c:676:7: error: 'TEGRA114_CLK_PLL_E' 
undeclared (first use in this function)
  case TEGRA114_CLK_PLL_E:
   ^~

PTAL.

Thanks,

Tom

-Original Message-
From: Svyatoslav Ryhel  
Sent: Thursday, February 2, 2023 11:14 AM
To: Tom Warren ; Alban Bedel 
; Stephen Warren ; Marcel 
Ziswiler ; Allen Martin ; 
Jagan Teki ; Lukasz Majewski ; Marek 
Vasut ; Svyatoslav Ryhel ; Ramin Khonsari 
; Thierry Reding ; Maxim 
Schwalm ; Dmitry Osipenko 
Cc: u-boot@lists.denx.de
Subject: [PATCH v2 03/16] ARM: tegra: clock: add clk_id_to_pll_id helper

External email: Use caution opening links or attachments


This function allows to convert a device tree clock ID to PLL ID.

Tested-by: Andreas Westman Dorcsak  # ASUS TF T30
Tested-by: Robert Eckelmann  # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel  # HTC One X
Signed-off-by: Svyatoslav Ryhel 
---
 arch/arm/include/asm/arch-tegra/clock.h |  8 ++
 arch/arm/mach-tegra/tegra114/clock.c| 37 
 arch/arm/mach-tegra/tegra124/clock.c| 38 +
 arch/arm/mach-tegra/tegra20/clock.c | 37 
 arch/arm/mach-tegra/tegra210/clock.c| 37 
 arch/arm/mach-tegra/tegra30/clock.c | 37 
 6 files changed, 194 insertions(+)

diff --git a/arch/arm/include/asm/arch-tegra/clock.h 
b/arch/arm/include/asm/arch-tegra/clock.h
index 1dd5d0742c..2270501406 100644
--- a/arch/arm/include/asm/arch-tegra/clock.h
+++ b/arch/arm/include/asm/arch-tegra/clock.h
@@ -354,6 +354,14 @@ int get_periph_clock_source(enum periph_id periph_id,
  */
 enum periph_id clk_id_to_periph_id(int clk_id);

+/*
+ * Convert a device tree clock ID to our PLL ID.
+ *
+ * @param clk_id   Clock ID according to tegra device tree binding
+ * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid  */ 
+enum clock_id clk_id_to_pll_id(int clk_id);
+
 /**
  * Set the output frequency you want for each PLL clock.
  * PLL output frequencies are programmed by setting their N, M and P values.
diff --git a/arch/arm/mach-tegra/tegra114/clock.c 
b/arch/arm/mach-tegra/tegra114/clock.c
index 143f86863f..c019b2d0cd 100644
--- a/arch/arm/mach-tegra/tegra114/clock.c
+++ b/arch/arm/mach-tegra/tegra114/clock.c
@@ -19,6 +19,8 @@
 #include 
 #include 

+#include 
+
 /*
  * Clock types that we can use as a source. The Tegra114 has muxes for the
  * peripheral clocks, and in most cases there are four options for the clock 
@@ -646,6 +648,41 @@ enum periph_id clk_id_to_periph_id(int clk_id)
return clk_id;
}
 }
+
+/*
+ * Convert a device tree clock ID to our PLL ID.
+ *
+ * @param clk_id   Clock ID according to tegra114 device tree binding
+ * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid  */ 
+enum clock_id clk_id_to_pll_id(int clk_id) {
+   switch (clk_id) {
+   case TEGRA114_CLK_PLL_C:
+   return CLOCK_ID_CGENERAL;
+   case TEGRA114_CLK_PLL_M:
+   return CLOCK_ID_MEMORY;
+   case TEGRA114_CLK_PLL_P:
+   return CLOCK_ID_PERIPH;
+   case TEGRA114_CLK_PLL_A:
+   return CLOCK_ID_AUDIO;
+   case TEGRA114_CLK_PLL_U:
+   return CLOCK_ID_USB;
+   case TEGRA114_CLK_PLL_D:
+   case TEGRA114_CLK_PLL_D_OUT0:
+   return CLOCK_ID_DISPLAY;
+   case TEGRA114_CLK_PLL_X:
+   return CLOCK_ID_XCPU;
+   case TEGRA114_CLK_PLL_E:
+   return CLOCK_ID_EPCI;
+   case TEGRA114_CLK_CLK_32K:
+   return CLOCK_ID_32KHZ;
+   case TEGRA114_CLK_CLK_M:
+   return CLOCK_ID_CLK_M;
+   default:
+   return CLOCK_ID_NONE;
+   }
+}
 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */

 void clock_early_init(void)
diff --git a/arch/arm/mach-tegra/tegra124/clock.c 
b/arch/arm/mach-tegra/tegra124/clock.c
index da38b26c27..415ba15e5d 100644
--- a/arch/arm/mach-tegra/tegra124/clock.c
+++ b/arch/arm/mach-tegra/tegra124/clock.c
@@ -19,6 +19,9 @@
 #include 
 #include 

+#include 
+#include 
+
 /*
  * Clock types that we can use as a source. The Tegra124 has muxes for the
  * peripheral clocks, and in most cases there are four options for the clock
@@ -826,6 +829,41 @@ enum periph_id clk_id_to_periph_id(int clk_id)
return clk_id;
}
 }
+
+/*
+ * Convert a device tree clock ID to our PLL ID.
+ *
+ * @param clk_id   Clock ID according to tegra124 device tree binding
+ * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid
+ */
+enum clock_id clk_id_to_pll_id(int clk_id)
+{
+   switch (clk_id) {
+   case 

Re: [PATCH v2 2/3] net: ftmac100: simplify priv->iobase casting

[Tom Rini]

On Thu, Jan 19, 2023 at 10:51:15PM +0300, Sergei Antonov wrote:

> Replace 'phys_addr_t iobase' with 'struct ftmac100 *ftmac100'
> in order to cast once on assignment and remove casting in a
> number of other places.
> 
> Signed-off-by: Sergei Antonov 
> Reviewed-by: Ramon Fried 

This introduces:
   riscv32:  +   ae350_rv32
+(ae350_rv32) drivers/net/ftmac100.c: In function 'ftmac100_of_to_plat':
+(ae350_rv32) drivers/net/ftmac100.c:317:26: error: cast to pointer from 
integer of different size [-Werror=int-to-pointer-cast]
+(ae350_rv32)   317 | priv->ftmac100 = (struct ftmac100 *)pdata->iobase;
+(ae350_rv32)   |  ^
+(ae350_rv32) cc1: all warnings being treated as errors
+(ae350_rv32) make[3]: *** [scripts/Makefile.build:257: drivers/net/ftmac100.o] 
Error 1
+(ae350_rv32) make[2]: *** [scripts/Makefile.build:397: drivers/net] Error 2
+(ae350_rv32) make[1]: *** [Makefile:1857: drivers] Error 2
+(ae350_rv32) make: *** [Makefile:177: sub-make] Error 2

-- 
Tom


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Description: PGP signature

Re: [PATCH v4] common: avb_verify: prevent opening incorrect session

[Ivan Khoronzhuk]

Any comments to this patch?

--
Regards,
Ivan Khoronzhuk

Re: Pull request, u-boot-tegra/master

[Tom Rini]

On Thu, Feb 02, 2023 at 10:43:33AM -0700, Tom Warren wrote:

> Tom,
> 
> Please pull u-boot-tegra/master into U-Boot/master. Thanks.
> It has passed 'buildman tegra' w/o error, and Thierry has tested it on his
> Tegra boards.
> 
> The following changes since commit 1e1cd8eb2d0c8e5b28b2dd6622ec9cbbd5eb61b8:
> 
>   Merge tag 'fsl-qoriq-2023-2-1' of
> https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq (2023-02-01
> 09:31:17 -0500)
> 
> are available in the git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-tegra.git
> refs/pipelines/15015
> 
> for you to fetch changes up to 412a4c6f1b94b5fea4c7ccb906de418bdaf9c058:
> 
>   ARM: tegra: include timer as default option (2023-02-02 10:16:41 -0700)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Description: PGP signature

Re: [PULL] u-boot-riscv/master

[Tom Rini]

On Thu, Feb 02, 2023 at 06:30:07AM +, Leo Liang wrote:

> Hi Tom,
> 
> The following changes since commit 73a3f5139182a0389d505bf29b0ad4bc29424cf8:
> 
>   Merge https://source.denx.de/u-boot/custodians/u-boot-mmc (2023-01-31 
> 18:28:07 -0500)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-riscv.git
> 
> for you to fetch changes up to 2b0af9feb594b68a75e4f111bde7f55ddb14995d:
> 
>   board: sifive: unmatched: enable booting on a second NVME device 
> (2023-02-01 16:17:59 +0800)
> 
> CI result show no issue: 
> https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/15011
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Description: PGP signature

Re: [PULL] u-boot-sh/master

[Tom Rini]

On Thu, Feb 02, 2023 at 02:42:16AM +0100, Marek Vasut wrote:

> The following changes since commit 1e1cd8eb2d0c8e5b28b2dd6622ec9cbbd5eb61b8:
> 
>   Merge tag 'fsl-qoriq-2023-2-1' of
> https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq (2023-02-01
> 09:31:17 -0500)
> 
> are available in the Git repository at:
> 
>   git://source.denx.de/u-boot-sh.git master
> 
> for you to fetch changes up to 1006b33b3a612acbaa66970f3bb8817216fc854e:
> 
>   net: ravb: Drop SoC-specific compatible support (2023-02-02 01:49:21
> +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Description: PGP signature

[PATCH v2 12/16] board: tegra30: switch to updated pre-dm i2c write

[Svyatoslav Ryhel]

Configure PMIC voltages for early stages using updated
early i2c write.

Signed-off-by: Svyatoslav Ryhel 
---
 arch/arm/mach-tegra/tegra30/Kconfig |  8 
 arch/arm/mach-tegra/tegra30/cpu.c   | 36 -
 board/avionic-design/tec-ng/Makefile|  4 +-
 board/avionic-design/tec-ng/tec-ng-spl.c| 34 
 board/nvidia/beaver/Makefile|  2 +
 board/nvidia/beaver/beaver-spl.c| 43 +
 board/nvidia/cardhu/Makefile|  4 +-
 board/nvidia/cardhu/cardhu-spl.c| 43 +
 board/toradex/apalis_t30/Makefile   |  2 +
 board/toradex/apalis_t30/apalis_t30-spl.c   | 34 
 board/toradex/colibri_t30/Makefile  |  2 +
 board/toradex/colibri_t30/colibri_t30-spl.c | 34 
 12 files changed, 200 insertions(+), 46 deletions(-)
 create mode 100644 board/avionic-design/tec-ng/tec-ng-spl.c
 create mode 100644 board/nvidia/beaver/beaver-spl.c
 create mode 100644 board/nvidia/cardhu/cardhu-spl.c
 create mode 100644 board/toradex/apalis_t30/apalis_t30-spl.c
 create mode 100644 board/toradex/colibri_t30/colibri_t30-spl.c

diff --git a/arch/arm/mach-tegra/tegra30/Kconfig 
b/arch/arm/mach-tegra/tegra30/Kconfig
index 5619d1cd42..85b8ce294f 100644
--- a/arch/arm/mach-tegra/tegra30/Kconfig
+++ b/arch/arm/mach-tegra/tegra30/Kconfig
@@ -1,11 +1,5 @@
 if TEGRA30
 
-config TEGRA_VDD_CORE_TPS62361B_SET3
-   bool
-
-config TEGRA_VDD_CORE_TPS62366A_SET1
-   bool
-
 choice
prompt "Tegra30 board select"
optional
@@ -17,12 +11,10 @@ config TARGET_APALIS_T30
 config TARGET_BEAVER
bool "NVIDIA Tegra30 Beaver evaluation board"
select BOARD_LATE_INIT
-   select TEGRA_VDD_CORE_TPS62366A_SET1
 
 config TARGET_CARDHU
bool "NVIDIA Tegra30 Cardhu evaluation board"
select BOARD_LATE_INIT
-   select TEGRA_VDD_CORE_TPS62361B_SET3
 
 config TARGET_COLIBRI_T30
bool "Toradex Colibri T30 board"
diff --git a/arch/arm/mach-tegra/tegra30/cpu.c 
b/arch/arm/mach-tegra/tegra30/cpu.c
index 6ac45af51a..60bbf13ea5 100644
--- a/arch/arm/mach-tegra/tegra30/cpu.c
+++ b/arch/arm/mach-tegra/tegra30/cpu.c
@@ -15,20 +15,6 @@
 #include 
 #include "../cpu.h"
 
-#define TPS62366A_I2C_ADDR 0xC0
-#define TPS62366A_SET1_REG 0x01
-#define TPS62366A_SET1_DATA(0x4600 | TPS62366A_SET1_REG)
-
-#define TPS62361B_I2C_ADDR 0xC0
-#define TPS62361B_SET3_REG 0x03
-#define TPS62361B_SET3_DATA(0x4600 | TPS62361B_SET3_REG)
-
-#define TPS65911_I2C_ADDR  0x5A
-#define TPS65911_VDDCTRL_OP_REG0x28
-#define TPS65911_VDDCTRL_SR_REG0x27
-#define TPS65911_VDDCTRL_OP_DATA   (0x2400 | TPS65911_VDDCTRL_OP_REG)
-#define TPS65911_VDDCTRL_SR_DATA   (0x0100 | TPS65911_VDDCTRL_SR_REG)
-
 /* In case this function is not defined */
 __weak void pmic_enable_cpu_vdd(void) {}
 
@@ -41,28 +27,6 @@ static void enable_cpu_power_rail(void)
reg = readl(>pmc_cntrl);
reg |= CPUPWRREQ_OE;
writel(reg, >pmc_cntrl);
-
-   /* Set VDD_CORE to 1.200V. */
-#ifdef CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1
-   tegra_i2c_ll_write(TPS62366A_I2C_ADDR,
-  TPS62366A_SET1_DATA);
-#endif
-#ifdef CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
-   tegra_i2c_ll_write(TPS62361B_I2C_ADDR,
-  TPS62361B_SET3_DATA);
-#endif
-   udelay(1000);
-
-   /*
-* Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus.
-* First set VDD to 1.0125V, then enable the VDD regulator.
-*/
-   tegra_i2c_ll_write(TPS65911_I2C_ADDR,
-  TPS65911_VDDCTRL_OP_DATA);
-   udelay(1000);
-   tegra_i2c_ll_write(TPS65911_I2C_ADDR,
-  TPS65911_VDDCTRL_SR_DATA);
-   udelay(10 * 1000);
 }
 
 /**
diff --git a/board/avionic-design/tec-ng/Makefile 
b/board/avionic-design/tec-ng/Makefile
index 46df14d991..d6890e5797 100644
--- a/board/avionic-design/tec-ng/Makefile
+++ b/board/avionic-design/tec-ng/Makefile
@@ -3,4 +3,6 @@
 # (C) Copyright 2013
 # Avionic Design GmbH 
 
-obj-y  := ../common/tamonten-ng.o
+obj-$(CONFIG_SPL_BUILD) += tec-ng-spl.o
+
+obj-y  += ../common/tamonten-ng.o
diff --git a/board/avionic-design/tec-ng/tec-ng-spl.c 
b/board/avionic-design/tec-ng/tec-ng-spl.c
new file mode 100644
index 00..6e54464183
--- /dev/null
+++ b/board/avionic-design/tec-ng/tec-ng-spl.c
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ *  (C) Copyright 2010-2013
+ *  NVIDIA Corporation 
+ *
+ *  (C) Copyright 2021
+ *  Svyatoslav Ryhel 
+ */
+
+#include 
+#include 
+#include 
+
+/* I2C addr is in 8 bit */
+#define TPS65911_I2C_ADDR  0x5A
+#define TPS65911_VDDCTRL_OP_REG0x28
+#define TPS65911_VDDCTRL_SR_REG0x27
+#define TPS65911_VDDCTRL_OP_DATA   (0x2400 | TPS65911_VDDCTRL_OP_REG)
+#define 

[PATCH v2 16/16] ARM: tegra20: implement BCT patching

[Svyatoslav Ryhel]

This function allows updating bootloader from u-boot
on production devices without need in host PC.

Be aware! It works only with re-crypt BCT.

Tested-by: Robert Eckelmann  # ASUS TF101 T20
Signed-off-by: Ramin Khonsari 
Signed-off-by: Svyatoslav Ryhel 
---
 arch/arm/mach-tegra/Kconfig  |  2 +-
 arch/arm/mach-tegra/tegra20/Makefile |  5 +-
 arch/arm/mach-tegra/tegra20/bct.c| 78 
 arch/arm/mach-tegra/tegra20/bct.h| 42 +++
 4 files changed, 123 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/mach-tegra/tegra20/bct.c
 create mode 100644 arch/arm/mach-tegra/tegra20/bct.h

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 922e57726f..901235047c 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -231,7 +231,7 @@ config CMD_ENTERRCM
 
 config CMD_EBTUPDATE
bool "Enable 'ebtupdate' command"
-   depends on TEGRA30
+   depends on TEGRA20 || TEGRA30
select TEGRA_CRYPTO
default n
help
diff --git a/arch/arm/mach-tegra/tegra20/Makefile 
b/arch/arm/mach-tegra/tegra20/Makefile
index 67454ff5f4..991cabeec5 100644
--- a/arch/arm/mach-tegra/tegra20/Makefile
+++ b/arch/arm/mach-tegra/tegra20/Makefile
@@ -2,9 +2,8 @@
 #
 # (C) Copyright 2010,2011 Nvidia Corporation.
 
-ifdef CONFIG_SPL_BUILD
-obj-y  += cpu.o
-endif
+obj-$(CONFIG_SPL_BUILD) += cpu.o
+obj-$(CONFIG_$(SPL_)CMD_EBTUPDATE) += bct.o
 
 # The AVP is ARMv4T architecture so we must use special compiler
 # flags for any startup files it might use.
diff --git a/arch/arm/mach-tegra/tegra20/bct.c 
b/arch/arm/mach-tegra/tegra20/bct.c
new file mode 100644
index 00..4a7cf498dd
--- /dev/null
+++ b/arch/arm/mach-tegra/tegra20/bct.c
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2022, Ramin 
+ * Copyright (c) 2022, Svyatoslav Ryhel 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include "bct.h"
+#include "uboot_aes.h"
+
+/*
+ * \param bct  boot config table start in RAM
+ * \param ect  bootloader start in RAM
+ * \param ebt_size bootloader file size in bytes
+ */
+static int bct_patch(u8 *bct, u8 *ebt, u32 ebt_size)
+{
+   struct nvboot_config_table *bct_tbl = NULL;
+   u8 ebt_hash[AES128_KEY_LENGTH] = { 0 };
+   u8 sbk[AES128_KEY_LENGTH] = { 0 };
+   u8 *bct_hash = bct;
+   int ret;
+
+   bct += BCT_HASH;
+
+   memcpy(sbk, (u8 *)(bct + BCT_LENGTH),
+  NVBOOT_CMAC_AES_HASH_LENGTH * 4);
+
+   ret = decrypt_data_block(bct, BCT_LENGTH, sbk);
+   if (ret)
+   return 1;
+
+   ebt_size = roundup(ebt_size, EBT_ALIGNMENT);
+
+   ret = encrypt_data_block(ebt, ebt_size, sbk);
+   if (ret)
+   return 1;
+
+   ret = sign_enc_data_block(ebt, ebt_size, ebt_hash, sbk);
+   if (ret)
+   return 1;
+
+   bct_tbl = (struct nvboot_config_table *)bct;
+
+   memcpy((u8 *)_tbl->bootloader[0].crypto_hash,
+  ebt_hash, NVBOOT_CMAC_AES_HASH_LENGTH * 4);
+   bct_tbl->bootloader[0].entry_point = CONFIG_SPL_TEXT_BASE;
+   bct_tbl->bootloader[0].load_addr = CONFIG_SPL_TEXT_BASE;
+   bct_tbl->bootloader[0].length = ebt_size;
+
+   ret = encrypt_data_block(bct, BCT_LENGTH, sbk);
+   if (ret)
+   return 1;
+
+   ret = sign_enc_data_block(bct, BCT_LENGTH, bct_hash, sbk);
+   if (ret)
+   return 1;
+
+   return 0;
+}
+
+static int do_ebtupdate(struct cmd_tbl *cmdtp, int flag, int argc,
+   char *const argv[])
+{
+   u32 bct_addr = hextoul(argv[1], NULL);
+   u32 ebt_addr = hextoul(argv[2], NULL);
+   u32 ebt_size = hextoul(argv[3], NULL);
+
+   return bct_patch((u8 *)bct_addr, (u8 *)ebt_addr, ebt_size);
+}
+
+U_BOOT_CMD(ebtupdate,  4,  0,  do_ebtupdate,
+  "update bootloader on re-crypted Tegra20 devices",
+  ""
+);
diff --git a/arch/arm/mach-tegra/tegra20/bct.h 
b/arch/arm/mach-tegra/tegra20/bct.h
new file mode 100644
index 00..4b78aef7cf
--- /dev/null
+++ b/arch/arm/mach-tegra/tegra20/bct.h
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef _BCT_H_
+#define _BCT_H_
+
+/*
+ * Defines the BCT parametres for T20
+ */
+#define BCT_LENGTH 0xFE0
+#define BCT_HASH   0x10
+#define EBT_ALIGNMENT  0x10
+
+/*
+ * Defines the CMAC-AES-128 hash length in 32 bit words. (128 bits = 4 words)
+ */
+#define NVBOOT_CMAC_AES_HASH_LENGTH4
+
+/*
+ * Defines the maximum number of bootloader descriptions in the BCT.
+ */
+#define NVBOOT_MAX_BOOTLOADERS 4
+
+struct nv_bootloader_info {
+   u32 version;
+   u32 start_blk;
+   u32 start_page;
+   u32 length;
+   u32 load_addr;
+   u32 entry_point;
+   u32 attribute;
+   u32 crypto_hash[NVBOOT_CMAC_AES_HASH_LENGTH];
+};
+
+struct nvboot_config_table {
+   u32 unused0[4];
+   u32 boot_data_version;
+  

[PATCH v2 15/16] ARM: tegra30: implement BCT patching

[Svyatoslav Ryhel]

From: Ramin Khonsari 

This function allows updating bootloader from u-boot
on production devices without need in host PC.

Be aware! It works only with re-crypted BCT.

Tested-by: Andreas Westman Dorcsak  # ASUS TF T30
Tested-by: Svyatoslav Ryhel  # LG P895 T30
Signed-off-by: Ramin Khonsari 
Signed-off-by: Svyatoslav Ryhel 
---
 arch/arm/mach-tegra/Kconfig  | 10 
 arch/arm/mach-tegra/tegra30/Makefile |  1 +
 arch/arm/mach-tegra/tegra30/bct.c| 78 
 arch/arm/mach-tegra/tegra30/bct.h| 42 +++
 4 files changed, 131 insertions(+)
 create mode 100644 arch/arm/mach-tegra/tegra30/bct.c
 create mode 100644 arch/arm/mach-tegra/tegra30/bct.h

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 5b0cd92d9e..922e57726f 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -229,4 +229,14 @@ config CMD_ENTERRCM
  for mechanical button actuators, or hooking up relays/... to the
  button.
 
+config CMD_EBTUPDATE
+   bool "Enable 'ebtupdate' command"
+   depends on TEGRA30
+   select TEGRA_CRYPTO
+   default n
+   help
+ Updating u-boot from within u-boot in rather complex or even
+ impossible on production devices. To make it easier procedure of
+ re-cryption was created. If your device was re-crypted choose Y.
+
 endif
diff --git a/arch/arm/mach-tegra/tegra30/Makefile 
b/arch/arm/mach-tegra/tegra30/Makefile
index 9f170576e7..28dd486d8d 100644
--- a/arch/arm/mach-tegra/tegra30/Makefile
+++ b/arch/arm/mach-tegra/tegra30/Makefile
@@ -3,5 +3,6 @@
 # Copyright (c) 2010-2012, NVIDIA CORPORATION.  All rights reserved.
 
 obj-$(CONFIG_SPL_BUILD) += cpu.o
+obj-$(CONFIG_$(SPL_)CMD_EBTUPDATE) += bct.o
 
 obj-y  += clock.o funcmux.o pinmux.o
diff --git a/arch/arm/mach-tegra/tegra30/bct.c 
b/arch/arm/mach-tegra/tegra30/bct.c
new file mode 100644
index 00..c26338e263
--- /dev/null
+++ b/arch/arm/mach-tegra/tegra30/bct.c
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2022, Ramin 
+ * Copyright (c) 2022, Svyatoslav Ryhel 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include "bct.h"
+#include "uboot_aes.h"
+
+/*
+ * \param bct  boot config table start in RAM
+ * \param ect  bootloader start in RAM
+ * \param ebt_size bootloader file size in bytes
+ */
+static int bct_patch(u8 *bct, u8 *ebt, u32 ebt_size)
+{
+   struct nvboot_config_table *bct_tbl = NULL;
+   u8 ebt_hash[AES128_KEY_LENGTH] = { 0 };
+   u8 sbk[AES128_KEY_LENGTH] = { 0 };
+   u8 *bct_hash = bct;
+   int ret;
+
+   bct += BCT_HASH;
+
+   memcpy(sbk, (u8 *)(bct + BCT_LENGTH),
+  NVBOOT_CMAC_AES_HASH_LENGTH * 4);
+
+   ret = decrypt_data_block(bct, BCT_LENGTH, sbk);
+   if (ret)
+   return 1;
+
+   ebt_size = roundup(ebt_size, EBT_ALIGNMENT);
+
+   ret = encrypt_data_block(ebt, ebt_size, sbk);
+   if (ret)
+   return 1;
+
+   ret = sign_enc_data_block(ebt, ebt_size, ebt_hash, sbk);
+   if (ret)
+   return 1;
+
+   bct_tbl = (struct nvboot_config_table *)bct;
+
+   memcpy((u8 *)_tbl->bootloader[0].crypto_hash,
+  ebt_hash, NVBOOT_CMAC_AES_HASH_LENGTH * 4);
+   bct_tbl->bootloader[0].entry_point = CONFIG_SPL_TEXT_BASE;
+   bct_tbl->bootloader[0].load_addr = CONFIG_SPL_TEXT_BASE;
+   bct_tbl->bootloader[0].length = ebt_size;
+
+   ret = encrypt_data_block(bct, BCT_LENGTH, sbk);
+   if (ret)
+   return 1;
+
+   ret = sign_enc_data_block(bct, BCT_LENGTH, bct_hash, sbk);
+   if (ret)
+   return 1;
+
+   return 0;
+}
+
+static int do_ebtupdate(struct cmd_tbl *cmdtp, int flag, int argc,
+   char *const argv[])
+{
+   u32 bct_addr = hextoul(argv[1], NULL);
+   u32 ebt_addr = hextoul(argv[2], NULL);
+   u32 ebt_size = hextoul(argv[3], NULL);
+
+   return bct_patch((u8 *)bct_addr, (u8 *)ebt_addr, ebt_size);
+}
+
+U_BOOT_CMD(ebtupdate,  4,  0,  do_ebtupdate,
+  "update bootloader on re-crypted Tegra30 devices",
+  ""
+);
diff --git a/arch/arm/mach-tegra/tegra30/bct.h 
b/arch/arm/mach-tegra/tegra30/bct.h
new file mode 100644
index 00..9797384da3
--- /dev/null
+++ b/arch/arm/mach-tegra/tegra30/bct.h
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef _BCT_H_
+#define _BCT_H_
+
+/*
+ * Defines the BCT parametres for T30
+ */
+#define BCT_LENGTH 0x17E0
+#define BCT_HASH   0x10
+#define EBT_ALIGNMENT  0x10
+
+/*
+ * Defines the CMAC-AES-128 hash length in 32 bit words. (128 bits = 4 words)
+ */
+#define NVBOOT_CMAC_AES_HASH_LENGTH4
+
+/*
+ * Defines the maximum number of bootloader descriptions in the BCT.
+ */
+#define NVBOOT_MAX_BOOTLOADERS 4
+
+struct nv_bootloader_info {
+   u32 version;
+   u32 start_blk;
+   u32 

[PATCH v2 14/16] ARM: tegra: crypto: extend crypto functional

[Svyatoslav Ryhel]

Add support for encryption, decryption and signinig with
non-zero key saving backward compatibility.

Signed-off-by: Svyatoslav Ryhel 
---
 arch/arm/include/asm/arch-tegra/crypto.h | 47 ++
 arch/arm/mach-tegra/crypto.c | 63 +---
 arch/arm/mach-tegra/crypto.h | 19 ---
 3 files changed, 91 insertions(+), 38 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-tegra/crypto.h
 delete mode 100644 arch/arm/mach-tegra/crypto.h

diff --git a/arch/arm/include/asm/arch-tegra/crypto.h 
b/arch/arm/include/asm/arch-tegra/crypto.h
new file mode 100644
index 00..7646163b97
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra/crypto.h
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * (C) Copyright 2010 - 2011 NVIDIA Corporation 
+ */
+
+#ifndef _CRYPTO_H_
+#define _CRYPTO_H_
+
+/**
+ * Sign a block of data
+ *
+ * \param source   Source data
+ * \param length   Size of source data
+ * \param signatureDestination address for signature, AES_KEY_LENGTH bytes
+ */
+int sign_data_block(u8 *source, unsigned int length, u8 *signature);
+
+/**
+ * Sign an encrypted block of data
+ *
+ * \param source   Source data
+ * \param length   Size of source data
+ * \param signatureDestination address for signature, AES_KEY_LENGTH bytes
+ * \param key  AES128 encryption key
+ */
+int sign_enc_data_block(u8 *source, unsigned int length, u8 *signature, u8 
*key);
+
+/**
+ * Encrypt a block of data
+ *
+ * \param source   Source data
+ * \param length   Size of source data
+ * \param key  AES128 encryption key
+ */
+int encrypt_data_block(u8 *source, unsigned int length, u8 *key);
+
+/**
+ * Decrypt a block of data
+ *
+ * \param source   Source data
+ * \param length   Size of source data
+ * \param key  AES128 encryption key
+ */
+int decrypt_data_block(u8 *source, unsigned int length, u8 *key);
+
+#endif /* #ifndef _CRYPTO_H_ */
diff --git a/arch/arm/mach-tegra/crypto.c b/arch/arm/mach-tegra/crypto.c
index 1efaa5c3ec..893da35e0b 100644
--- a/arch/arm/mach-tegra/crypto.c
+++ b/arch/arm/mach-tegra/crypto.c
@@ -7,7 +7,7 @@
 #include 
 #include 
 #include 
-#include "crypto.h"
+#include 
 #include "uboot_aes.h"
 
 static u8 zero_key[16];
@@ -17,6 +17,7 @@ static u8 zero_key[16];
 enum security_op {
SECURITY_SIGN   = 1 << 0,   /* Sign the data */
SECURITY_ENCRYPT= 1 << 1,   /* Encrypt the data */
+   SECURITY_DECRYPT= 1 << 2,   /* Dectypt the data */
 };
 
 /**
@@ -54,7 +55,7 @@ static void sign_object(u8 *key, u8 *key_schedule, u8 *src, 
u8 *dst,
u8 left[AES128_KEY_LENGTH];
u8 k1[AES128_KEY_LENGTH];
u8 *cbc_chain_data;
-   unsigned i;
+   unsigned int i;
 
cbc_chain_data = zero_key;  /* Convenient array of 0's for IV */
 
@@ -92,7 +93,7 @@ static void sign_object(u8 *key, u8 *key_schedule, u8 *src, 
u8 *dst,
 }
 
 /**
- * Encrypt and sign a block of data (depending on security mode).
+ * Decrypt, encrypt or sign a block of data (depending on security mode).
  *
  * \param key  Input AES key, length AES128_KEY_LENGTH
  * \param oper Security operations mask to perform (enum security_op)
@@ -100,44 +101,68 @@ static void sign_object(u8 *key, u8 *key_schedule, u8 
*src, u8 *dst,
  * \param length   Size of source data
  * \param sig_dst  Destination address for signature, AES128_KEY_LENGTH 
bytes
  */
-static int encrypt_and_sign(u8 *key, enum security_op oper, u8 *src,
-   u32 length, u8 *sig_dst)
+static int tegra_crypto_core(u8 *key, enum security_op oper, u8 *src,
+u32 length, u8 *sig_dst)
 {
u32 num_aes_blocks;
u8 key_schedule[AES128_EXPAND_KEY_LENGTH];
u8 iv[AES128_KEY_LENGTH] = {0};
 
-   debug("encrypt_and_sign: length = %d\n", length);
+   debug("%s: length = %d\n", __func__, length);
 
-   /*
-* The only need for a key is for signing/checksum purposes, so
-* if not encrypting, expand a key of 0s.
-*/
-   aes_expand_key(oper & SECURITY_ENCRYPT ? key : zero_key,
-  AES128_KEY_LENGTH, key_schedule);
+   aes_expand_key(key, AES128_KEY_LENGTH, key_schedule);
 
num_aes_blocks = (length + AES128_KEY_LENGTH - 1) / AES128_KEY_LENGTH;
 
+   if (oper & SECURITY_DECRYPT) {
+   /* Perform this in place, resulting in src being decrypted. */
+   debug("%s: begin decryption\n", __func__);
+   aes_cbc_decrypt_blocks(AES128_KEY_LENGTH, key_schedule, iv, src,
+  src, num_aes_blocks);
+   debug("%s: end decryption\n", __func__);
+   }
+
if (oper & SECURITY_ENCRYPT) {
/* Perform this in place, resulting in src being encrypted. */
-   debug("encrypt_and_sign: 

[PATCH v2 11/16] board: tegra124: switch to updated pre-dm i2c write

[Svyatoslav Ryhel]

Configure PMIC for early stages using updated i2c write.

Signed-off-by: Svyatoslav Ryhel 
---
 board/nvidia/venice2/as3722_init.c | 65 
 board/nvidia/venice2/as3722_init.h | 43 -
 board/toradex/apalis-tk1/as3722_init.c | 85 ++
 board/toradex/apalis-tk1/as3722_init.h | 40 
 4 files changed, 88 insertions(+), 145 deletions(-)
 delete mode 100644 board/nvidia/venice2/as3722_init.h
 delete mode 100644 board/toradex/apalis-tk1/as3722_init.h

diff --git a/board/nvidia/venice2/as3722_init.c 
b/board/nvidia/venice2/as3722_init.c
index ba676547d3..395bdd99c7 100644
--- a/board/nvidia/venice2/as3722_init.c
+++ b/board/nvidia/venice2/as3722_init.c
@@ -9,25 +9,42 @@
 #include 
 #include 
 #include 
-#include "as3722_init.h"
 
-/* AS3722-PMIC-specific early init code - get CPU rails up, etc */
+/* AS3722-PMIC-specific early init regs */
 
-void tegra_i2c_ll_write_addr(uint addr, uint config)
-{
-   struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE;
+#define AS3722_I2C_ADDR0x80
 
-   writel(addr, >cmd_addr0);
-   writel(config, >cnfg);
-}
+#define AS3722_SD0VOLTAGE_REG  0x00/* CPU */
+#define AS3722_SD1VOLTAGE_REG  0x01/* CORE, already set by OTP */
+#define AS3722_SD6VOLTAGE_REG  0x06/* GPU */
+#define AS3722_SDCONTROL_REG   0x4D
 
-void tegra_i2c_ll_write_data(uint data, uint config)
-{
-   struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE;
+#define AS3722_LDO2VOLTAGE_REG 0x12/* VPP_FUSE */
+#define AS3722_LDO6VOLTAGE_REG 0x16/* VDD_SDMMC */
+#define AS3722_LDCONTROL_REG   0x4E
 
-   writel(data, >cmd_data1);
-   writel(config, >cnfg);
-}
+#if defined(CONFIG_TARGET_VENICE2)
+#define AS3722_SD0VOLTAGE_DATA (0x2800 | AS3722_SD0VOLTAGE_REG)
+#else /* TK1 or Nyan-Big */
+#define AS3722_SD0VOLTAGE_DATA (0x3C00 | AS3722_SD0VOLTAGE_REG)
+#endif
+#define AS3722_SD0CONTROL_DATA (0x0100 | AS3722_SDCONTROL_REG)
+
+#if defined(CONFIG_TARGET_JETSON_TK1) || defined(CONFIG_TARGET_CEI_TK1_SOM)
+#define AS3722_SD1VOLTAGE_DATA (0x2800 | AS3722_SD1VOLTAGE_REG)
+#define AS3722_SD1CONTROL_DATA (0x0200 | AS3722_SDCONTROL_REG)
+#endif
+
+#define AS3722_SD6CONTROL_DATA (0x4000 | AS3722_SDCONTROL_REG)
+#define AS3722_SD6VOLTAGE_DATA (0x2800 | AS3722_SD6VOLTAGE_REG)
+
+#define AS3722_LDO2CONTROL_DATA(0x0400 | AS3722_LDCONTROL_REG)
+#define AS3722_LDO2VOLTAGE_DATA(0x1000 | AS3722_LDO2VOLTAGE_REG)
+
+#define AS3722_LDO6CONTROL_DATA(0x4000 | AS3722_LDCONTROL_REG)
+#define AS3722_LDO6VOLTAGE_DATA(0x3F00 | AS3722_LDO6VOLTAGE_REG)
+
+/* AS3722-PMIC-specific early init code - get CPU rails up, etc */
 
 void pmic_enable_cpu_vdd(void)
 {
@@ -37,8 +54,8 @@ void pmic_enable_cpu_vdd(void)
/* Set up VDD_CORE, for boards where OTP is incorrect*/
debug("%s: Setting VDD_CORE via AS3722 reg 1\n", __func__);
/* Configure VDD_CORE via the AS3722 PMIC on the PWR I2C bus */
-   tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
-   tegra_i2c_ll_write_data(AS3722_SD1VOLTAGE_DATA, I2C_SEND_2_BYTES);
+   tegra_i2c_ll_write(AS3722_I2C_ADDR,
+  AS3722_SD1VOLTAGE_DATA);
/*
 * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.
 * tegra_i2c_ll_write_data(AS3722_SD1CONTROL_DATA, I2C_SEND_2_BYTES);
@@ -51,8 +68,8 @@ void pmic_enable_cpu_vdd(void)
 * Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus.
 * First set VDD to 1.0V, then enable the VDD regulator.
 */
-   tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
-   tegra_i2c_ll_write_data(AS3722_SD0VOLTAGE_DATA, I2C_SEND_2_BYTES);
+   tegra_i2c_ll_write(AS3722_I2C_ADDR,
+  AS3722_SD0VOLTAGE_DATA);
/*
 * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.
 * tegra_i2c_ll_write_data(AS3722_SD0CONTROL_DATA, I2C_SEND_2_BYTES);
@@ -64,8 +81,8 @@ void pmic_enable_cpu_vdd(void)
 * Bring up VDD_GPU via the AS3722 PMIC on the PWR I2C bus.
 * First set VDD to 1.0V, then enable the VDD regulator.
 */
-   tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
-   tegra_i2c_ll_write_data(AS3722_SD6VOLTAGE_DATA, I2C_SEND_2_BYTES);
+   tegra_i2c_ll_write(AS3722_I2C_ADDR,
+  AS3722_SD6VOLTAGE_DATA);
/*
 * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled.
 * tegra_i2c_ll_write_data(AS3722_SD6CONTROL_DATA, I2C_SEND_2_BYTES);
@@ -77,8 +94,8 @@ void pmic_enable_cpu_vdd(void)
 * Bring up VPP_FUSE via the AS3722 PMIC on the PWR I2C bus.
 * First set VDD to 1.2V, then enable the VDD regulator.
 */
-   tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
-   tegra_i2c_ll_write_data(AS3722_LDO2VOLTAGE_DATA, I2C_SEND_2_BYTES);
+   tegra_i2c_ll_write(AS3722_I2C_ADDR,
+  AS3722_LDO2VOLTAGE_DATA);
/*
 * Don't write LDCONTROL - 

[PATCH v2 13/16] ARM: tegra: expose crypto module for all Tegra SoCs

[Svyatoslav Ryhel]

Move crypto module from T20 only into common Tegra dir.

Signed-off-by: Svyatoslav Ryhel 
---
 arch/arm/mach-tegra/Kconfig| 5 +
 arch/arm/mach-tegra/Makefile   | 1 +
 arch/arm/mach-tegra/{tegra20 => }/crypto.c | 0
 arch/arm/mach-tegra/{tegra20 => }/crypto.h | 0
 arch/arm/mach-tegra/tegra20/Kconfig| 1 +
 arch/arm/mach-tegra/tegra20/Makefile   | 2 +-
 6 files changed, 8 insertions(+), 1 deletion(-)
 rename arch/arm/mach-tegra/{tegra20 => }/crypto.c (100%)
 rename arch/arm/mach-tegra/{tegra20 => }/crypto.h (100%)

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 4fc79ebadb..5b0cd92d9e 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -15,6 +15,11 @@ config SPL_SERIAL
 config TEGRA_CLKRST
bool
 
+config TEGRA_CRYPTO
+   bool "Tegra AES128 crypto module"
+   select AES
+   default n
+
 config TEGRA_GP_PADCTRL
bool
 
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 7165d70a60..9147050b32 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o
 obj-y += board.o board2.o
 obj-y += cache.o
 obj-$(CONFIG_TEGRA_CLKRST) += clock.o
+obj-$(CONFIG_$(SPL_)TEGRA_CRYPTO) += crypto.o
 obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o
 obj-$(CONFIG_TEGRA_PMC) += powergate.o
 obj-y += xusb-padctl-dummy.o
diff --git a/arch/arm/mach-tegra/tegra20/crypto.c b/arch/arm/mach-tegra/crypto.c
similarity index 100%
rename from arch/arm/mach-tegra/tegra20/crypto.c
rename to arch/arm/mach-tegra/crypto.c
diff --git a/arch/arm/mach-tegra/tegra20/crypto.h b/arch/arm/mach-tegra/crypto.h
similarity index 100%
rename from arch/arm/mach-tegra/tegra20/crypto.h
rename to arch/arm/mach-tegra/crypto.h
diff --git a/arch/arm/mach-tegra/tegra20/Kconfig 
b/arch/arm/mach-tegra/tegra20/Kconfig
index 955786c0c4..57d11024bf 100644
--- a/arch/arm/mach-tegra/tegra20/Kconfig
+++ b/arch/arm/mach-tegra/tegra20/Kconfig
@@ -3,6 +3,7 @@ if TEGRA20
 config TEGRA_LP0
bool
select TEGRA_CLOCK_SCALING
+   select TEGRA_CRYPTO
 
 config TEGRA_PMU
bool
diff --git a/arch/arm/mach-tegra/tegra20/Makefile 
b/arch/arm/mach-tegra/tegra20/Makefile
index bb17c90cca..67454ff5f4 100644
--- a/arch/arm/mach-tegra/tegra20/Makefile
+++ b/arch/arm/mach-tegra/tegra20/Makefile
@@ -13,6 +13,6 @@ CFLAGS_warmboot_avp.o = -march=armv4t -U__LINUX_ARM_ARCH__ \
 CFLAGS_REMOVE_warmboot_avp.o := $(LTO_CFLAGS)
 
 obj-y  += clock.o funcmux.o pinmux.o
-obj-$(CONFIG_TEGRA_LP0) += warmboot.o crypto.o warmboot_avp.o
+obj-$(CONFIG_TEGRA_LP0) += warmboot.o warmboot_avp.o
 obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
 obj-$(CONFIG_TEGRA_PMU) += pmu.o
-- 
2.37.2

[PATCH v2 10/16] ARM: tegra: create common pre-dm i2c write

[Svyatoslav Ryhel]

This implementation allows pwr i2c writing on early
stages when DM was not yet setup.

Such writing is needed to configure main voltages of PMIC.

Tested-by: Andreas Westman Dorcsak  # ASUS TF T30
Tested-by: Robert Eckelmann  # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel  # LG P895 T30
Signed-off-by: Svyatoslav Ryhel 
---
 arch/arm/include/asm/arch-tegra/tegra_i2c.h | 17 ++
 arch/arm/mach-tegra/cpu.h   |  1 -
 arch/arm/mach-tegra/tegra124/cpu.c  |  4 +++
 arch/arm/mach-tegra/tegra30/cpu.c   | 37 +++--
 4 files changed, 33 insertions(+), 26 deletions(-)

diff --git a/arch/arm/include/asm/arch-tegra/tegra_i2c.h 
b/arch/arm/include/asm/arch-tegra/tegra_i2c.h
index c49f43251d..afec6bbdda 100644
--- a/arch/arm/include/asm/arch-tegra/tegra_i2c.h
+++ b/arch/arm/include/asm/arch-tegra/tegra_i2c.h
@@ -8,6 +8,7 @@
 #ifndef _TEGRA_I2C_H_
 #define _TEGRA_I2C_H_
 
+#include 
 #include 
 
 struct udevice;
@@ -154,4 +155,20 @@ struct i2c_ctlr {
  */
 int tegra_i2c_get_dvc_bus(struct udevice **busp);
 
+/* Pre-dm section used for initial setup of PMIC */
+#define I2C_SEND_2_BYTES   0x0A02
+
+static inline void tegra_i2c_ll_write(uint addr, uint data)
+{
+   struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE;
+
+   writel(addr, >cmd_addr0);
+   writel(0x2, >cnfg);
+
+   writel(data, >cmd_data1);
+   writel(I2C_SEND_2_BYTES, >cnfg);
+}
+
+void pmic_enable_cpu_vdd(void);
+
 #endif /* _TEGRA_I2C_H_ */
diff --git a/arch/arm/mach-tegra/cpu.h b/arch/arm/mach-tegra/cpu.h
index d541825441..006aae3d07 100644
--- a/arch/arm/mach-tegra/cpu.h
+++ b/arch/arm/mach-tegra/cpu.h
@@ -74,4 +74,3 @@ int tegra_get_chip(void);
 int tegra_get_sku_info(void);
 int tegra_get_chip_sku(void);
 void adjust_pllp_out_freqs(void);
-void pmic_enable_cpu_vdd(void);
diff --git a/arch/arm/mach-tegra/tegra124/cpu.c 
b/arch/arm/mach-tegra/tegra124/cpu.c
index d5f2683b26..b1bfe8fb5e 100644
--- a/arch/arm/mach-tegra/tegra124/cpu.c
+++ b/arch/arm/mach-tegra/tegra124/cpu.c
@@ -14,10 +14,14 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include "../cpu.h"
 
+/* In case this function is not defined */
+__weak void pmic_enable_cpu_vdd(void) {}
+
 /* Tegra124-specific CPU init code */
 
 static void enable_cpu_power_rail(void)
diff --git a/arch/arm/mach-tegra/tegra30/cpu.c 
b/arch/arm/mach-tegra/tegra30/cpu.c
index 651edd27ee..6ac45af51a 100644
--- a/arch/arm/mach-tegra/tegra30/cpu.c
+++ b/arch/arm/mach-tegra/tegra30/cpu.c
@@ -15,23 +15,6 @@
 #include 
 #include "../cpu.h"
 
-/* Tegra30-specific CPU init code */
-void tegra_i2c_ll_write_addr(uint addr, uint config)
-{
-   struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE;
-
-   writel(addr, >cmd_addr0);
-   writel(config, >cnfg);
-}
-
-void tegra_i2c_ll_write_data(uint data, uint config)
-{
-   struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE;
-
-   writel(data, >cmd_data1);
-   writel(config, >cnfg);
-}
-
 #define TPS62366A_I2C_ADDR 0xC0
 #define TPS62366A_SET1_REG 0x01
 #define TPS62366A_SET1_DATA(0x4600 | TPS62366A_SET1_REG)
@@ -45,7 +28,9 @@ void tegra_i2c_ll_write_data(uint data, uint config)
 #define TPS65911_VDDCTRL_SR_REG0x27
 #define TPS65911_VDDCTRL_OP_DATA   (0x2400 | TPS65911_VDDCTRL_OP_REG)
 #define TPS65911_VDDCTRL_SR_DATA   (0x0100 | TPS65911_VDDCTRL_SR_REG)
-#define I2C_SEND_2_BYTES   0x0A02
+
+/* In case this function is not defined */
+__weak void pmic_enable_cpu_vdd(void) {}
 
 static void enable_cpu_power_rail(void)
 {
@@ -59,12 +44,12 @@ static void enable_cpu_power_rail(void)
 
/* Set VDD_CORE to 1.200V. */
 #ifdef CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1
-   tegra_i2c_ll_write_addr(TPS62366A_I2C_ADDR, 2);
-   tegra_i2c_ll_write_data(TPS62366A_SET1_DATA, I2C_SEND_2_BYTES);
+   tegra_i2c_ll_write(TPS62366A_I2C_ADDR,
+  TPS62366A_SET1_DATA);
 #endif
 #ifdef CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
-   tegra_i2c_ll_write_addr(TPS62361B_I2C_ADDR, 2);
-   tegra_i2c_ll_write_data(TPS62361B_SET3_DATA, I2C_SEND_2_BYTES);
+   tegra_i2c_ll_write(TPS62361B_I2C_ADDR,
+  TPS62361B_SET3_DATA);
 #endif
udelay(1000);
 
@@ -72,10 +57,11 @@ static void enable_cpu_power_rail(void)
 * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus.
 * First set VDD to 1.0125V, then enable the VDD regulator.
 */
-   tegra_i2c_ll_write_addr(TPS65911_I2C_ADDR, 2);
-   tegra_i2c_ll_write_data(TPS65911_VDDCTRL_OP_DATA, I2C_SEND_2_BYTES);
+   tegra_i2c_ll_write(TPS65911_I2C_ADDR,
+  TPS65911_VDDCTRL_OP_DATA);
udelay(1000);
-   tegra_i2c_ll_write_data(TPS65911_VDDCTRL_SR_DATA, I2C_SEND_2_BYTES);
+   tegra_i2c_ll_write(TPS65911_I2C_ADDR,
+  TPS65911_VDDCTRL_SR_DATA);
udelay(10 * 1000);
 }
 
@@ -142,6 +128,7 @@ void 

[PATCH v2 09/16] ARM: tegra: add late init support

[Svyatoslav Ryhel]

Late init function allows passing values like identifiers and
perform device specific configurations of pre-boot stage.

Tested-by: Andreas Westman Dorcsak  # ASUS TF T30
Tested-by: Svyatoslav Ryhel  # LG P895 T30
Signed-off-by: Svyatoslav Ryhel 
---
 arch/arm/include/asm/arch-tegra/sys_proto.h | 6 ++
 arch/arm/mach-tegra/board2.c| 2 ++
 2 files changed, 8 insertions(+)

diff --git a/arch/arm/include/asm/arch-tegra/sys_proto.h 
b/arch/arm/include/asm/arch-tegra/sys_proto.h
index c3a2673e6c..56a9a0 100644
--- a/arch/arm/include/asm/arch-tegra/sys_proto.h
+++ b/arch/arm/include/asm/arch-tegra/sys_proto.h
@@ -31,4 +31,10 @@ int tegra_lcd_pmic_init(int board_id);
  */
 int nvidia_board_init(void);
 
+/**
+ * nvidia_board_late_init() - perform any board-specific
+ *   init on late stages
+ */
+void nvidia_board_late_init(void);
+
 #endif
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index c7a45f4ff8..0df18360ca 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -56,6 +56,7 @@ __weak void gpio_early_init_uart(void) {}
 __weak void pin_mux_display(void) {}
 __weak void start_cpu_fan(void) {}
 __weak void cboot_late_init(void) {}
+__weak void nvidia_board_late_init(void) {}
 
 #if defined(CONFIG_TEGRA_NAND)
 __weak void pin_mux_nand(void)
@@ -267,6 +268,7 @@ int board_late_init(void)
 #endif
start_cpu_fan();
cboot_late_init();
+   nvidia_board_late_init();
 
return 0;
 }
-- 
2.37.2

[PATCH v2 08/16] ARM: tegra: provide default USB gadget setup

[Svyatoslav Ryhel]

From: Maxim Schwalm 

All Nvidia boards use the same manufacturer, vendor ID and product ID
for the gadgets. Make them the defaults to remove some boilerplate from
the defconfigs.

Inspired by commit e02687bda96c ("sunxi: provide default USB gadget
setup") which did the same for Allwinner boards.

Signed-off-by: Maxim Schwalm 
---
 configs/beaver_defconfig  | 3 ---
 configs/cei-tk1-som_defconfig | 3 ---
 configs/dalmore_defconfig | 3 ---
 configs/jetson-tk1_defconfig  | 3 ---
 configs/nyan-big_defconfig| 3 ---
 configs/p2371-_defconfig  | 3 ---
 configs/p2371-2180_defconfig  | 3 ---
 configs/p2571_defconfig   | 3 ---
 configs/p3450-_defconfig  | 3 ---
 configs/venice2_defconfig | 3 ---
 drivers/usb/gadget/Kconfig| 3 +++
 11 files changed, 3 insertions(+), 30 deletions(-)

diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig
index 0967367e6a..693ccb893d 100644
--- a/configs/beaver_defconfig
+++ b/configs/beaver_defconfig
@@ -64,8 +64,5 @@ CONFIG_USB_EHCI_TEGRA=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0955
-CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig
index 0c4627aff0..6578ee83d9 100644
--- a/configs/cei-tk1-som_defconfig
+++ b/configs/cei-tk1-som_defconfig
@@ -70,8 +70,5 @@ CONFIG_USB_EHCI_TEGRA=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0955
-CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig
index 5d29dae341..4507ddc84b 100644
--- a/configs/dalmore_defconfig
+++ b/configs/dalmore_defconfig
@@ -60,8 +60,5 @@ CONFIG_USB_EHCI_TEGRA=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0955
-CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig
index d935e784ab..bcf45458a6 100644
--- a/configs/jetson-tk1_defconfig
+++ b/configs/jetson-tk1_defconfig
@@ -70,8 +70,5 @@ CONFIG_USB_EHCI_TEGRA=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0955
-CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig
index e2e8bebf6d..fef9141d35 100644
--- a/configs/nyan-big_defconfig
+++ b/configs/nyan-big_defconfig
@@ -93,9 +93,6 @@ CONFIG_USB_EHCI_TEGRA=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0955
-CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_VIDEO=y
diff --git a/configs/p2371-_defconfig b/configs/p2371-_defconfig
index e8074914c8..2962a7db75 100644
--- a/configs/p2371-_defconfig
+++ b/configs/p2371-_defconfig
@@ -48,8 +48,5 @@ CONFIG_USB_EHCI_TEGRA=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0955
-CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig
index ea62e18f73..6b44361b5b 100644
--- a/configs/p2371-2180_defconfig
+++ b/configs/p2371-2180_defconfig
@@ -57,8 +57,5 @@ CONFIG_USB_EHCI_TEGRA=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0955
-CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig
index bc3fb3e5ae..00b0dc6109 100644
--- a/configs/p2571_defconfig
+++ b/configs/p2571_defconfig
@@ -49,8 +49,5 @@ CONFIG_USB_EHCI_TEGRA=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0955
-CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/p3450-_defconfig b/configs/p3450-_defconfig
index 8e16afde91..d35bea4220 100644
--- a/configs/p3450-_defconfig
+++ b/configs/p3450-_defconfig
@@ -61,8 +61,5 @@ CONFIG_USB_EHCI_TEGRA=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0955
-CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig
index a754c20046..fe794b76ff 100644
--- 

[PATCH v2 07/16] spi: tegra20_slink: accept any word length

[Svyatoslav Ryhel]

Original t20 slink could work with commands only
fully divisible by 8. This patch removes such
restriction, so commands of any bitlength now
can be passed and processed.

Tested-by: Andreas Westman Dorcsak  # ASUS TF600T T30
Tested-by: Svyatoslav Ryhel  # LG P895 T30
Signed-off-by: Svyatoslav Ryhel 
---
 drivers/spi/tegra20_slink.c | 19 +++
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c
index 209ba8b0cc..d0e788539e 100644
--- a/drivers/spi/tegra20_slink.c
+++ b/drivers/spi/tegra20_slink.c
@@ -208,16 +208,14 @@ static int tegra30_spi_xfer(struct udevice *dev, unsigned 
int bitlen,
u32 reg, tmpdout, tmpdin = 0;
const u8 *dout = data_out;
u8 *din = data_in;
-   int num_bytes;
-   int ret;
+   int num_bytes, overflow;
+   int ret = 0;
 
debug("%s: slave %u:%u dout %p din %p bitlen %u\n",
  __func__, dev_seq(bus), spi_chip_select(dev), dout, din, bitlen);
-   if (bitlen % 8)
-   return -1;
-   num_bytes = bitlen / 8;
 
-   ret = 0;
+   num_bytes = DIV_ROUND_UP(bitlen, 8);
+   overflow = bitlen % 8;
 
reg = readl(>status);
writel(reg, >status); /* Clear all SPI events via R/W */
@@ -254,8 +252,13 @@ static int tegra30_spi_xfer(struct udevice *dev, unsigned 
int bitlen,
 
num_bytes -= bytes;
 
-   clrsetbits_le32(>command, SLINK_CMD_BIT_LENGTH_MASK,
-   bytes * 8 - 1);
+   if (overflow && !num_bytes)
+   clrsetbits_le32(>command, 
SLINK_CMD_BIT_LENGTH_MASK,
+   (bytes - 1) * 8 + overflow - 1);
+   else
+   clrsetbits_le32(>command, 
SLINK_CMD_BIT_LENGTH_MASK,
+   bytes * 8 - 1);
+
writel(tmpdout, >tx_fifo);
setbits_le32(>command, SLINK_CMD_GO);
 
-- 
2.37.2

[PATCH v2 06/16] ARM: tegra: Fix Tegra PWM parent clock

[Svyatoslav Ryhel]

Default parent clock for the PWM on Tegra is a 32kHz clock and
is unable to support the requested PWM period.

Fix PWM support on Tegra20, Tegra30, Tegra114, Tegra124 and Tegra210 by
updating the parent clock for the PWM to be the PLL_P.

This commit is equivalent to Linux kernel commit:
https://lore.kernel.org/all/20221010100046.6477-1-jonath...@nvidia.com/

Tested-by: Andreas Westman Dorcsak  # ASUS TF T30
Tested-by: Robert Eckelmann  # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel  # ASUS TF201 T30
Signed-off-by: Svyatoslav Ryhel 
---
 arch/arm/dts/tegra114.dtsi   |  2 +-
 arch/arm/dts/tegra124.dtsi   |  2 +-
 arch/arm/mach-tegra/tegra114/clock.c |  2 +-
 arch/arm/mach-tegra/tegra124/clock.c |  2 +-
 arch/arm/mach-tegra/tegra20/clock.c  |  2 +-
 arch/arm/mach-tegra/tegra210/clock.c |  2 +-
 arch/arm/mach-tegra/tegra30/clock.c  |  2 +-
 drivers/pwm/tegra_pwm.c  | 10 ++
 8 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi
index 8932ea3afd..68ee7f3165 100644
--- a/arch/arm/dts/tegra114.dtsi
+++ b/arch/arm/dts/tegra114.dtsi
@@ -312,7 +312,7 @@
};
 
pwm: pwm@7000a000 {
-   compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm";
+   compatible = "nvidia,tegra114-pwm";
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
clocks = <_car TEGRA114_CLK_PWM>;
diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi
index f473ba28e4..ffec9cae09 100644
--- a/arch/arm/dts/tegra124.dtsi
+++ b/arch/arm/dts/tegra124.dtsi
@@ -377,7 +377,7 @@
};
 
pwm: pwm@7000a000 {
-   compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
+   compatible = "nvidia,tegra124-pwm", "nvidia,tegra114-pwm";
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
clocks = <_car TEGRA124_CLK_PWM>;
diff --git a/arch/arm/mach-tegra/tegra114/clock.c 
b/arch/arm/mach-tegra/tegra114/clock.c
index c019b2d0cd..11b8c56d55 100644
--- a/arch/arm/mach-tegra/tegra114/clock.c
+++ b/arch/arm/mach-tegra/tegra114/clock.c
@@ -782,7 +782,7 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH },
-   { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ },
+   { PERIPH_ID_PWM, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C1, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C2, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C3, CLOCK_ID_PERIPH },
diff --git a/arch/arm/mach-tegra/tegra124/clock.c 
b/arch/arm/mach-tegra/tegra124/clock.c
index 415ba15e5d..ca9549a318 100644
--- a/arch/arm/mach-tegra/tegra124/clock.c
+++ b/arch/arm/mach-tegra/tegra124/clock.c
@@ -1208,7 +1208,7 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH },
-   { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ },
+   { PERIPH_ID_PWM, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C1, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C2, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C3, CLOCK_ID_PERIPH },
diff --git a/arch/arm/mach-tegra/tegra20/clock.c 
b/arch/arm/mach-tegra/tegra20/clock.c
index 593622bfdc..067a9f1a2f 100644
--- a/arch/arm/mach-tegra/tegra20/clock.c
+++ b/arch/arm/mach-tegra/tegra20/clock.c
@@ -804,7 +804,7 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH },
-   { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ },
+   { PERIPH_ID_PWM, CLOCK_ID_PERIPH },
{ PERIPH_ID_DVC_I2C, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C1, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C2, CLOCK_ID_PERIPH },
diff --git a/arch/arm/mach-tegra/tegra210/clock.c 
b/arch/arm/mach-tegra/tegra210/clock.c
index 76fbfef580..900537afbe 100644
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -1278,7 +1278,7 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH },
-   { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ },
+   { PERIPH_ID_PWM, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C1, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C2, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C3, CLOCK_ID_PERIPH },
diff --git a/arch/arm/mach-tegra/tegra30/clock.c 
b/arch/arm/mach-tegra/tegra30/clock.c
index b66211ce94..1dc9d09dba 100644
--- a/arch/arm/mach-tegra/tegra30/clock.c
+++ b/arch/arm/mach-tegra/tegra30/clock.c
@@ -884,7 +884,7 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH },
-   { 

[PATCH v2 05/16] ARM: tegra30: add PLLD to pll setup

[Svyatoslav Ryhel]

On T30 unlike T20 dsi panels are wider used on devices
and PLLD is used as DISP1 parent more often, so lets
enable it as well for this cases.

Tested-by: Andreas Westman Dorcsak  # ASUS TF700T T30
Tested-by: Svyatoslav Ryhel  # HTC One X T30
Signed-off-by: Svyatoslav Ryhel 
---
 arch/arm/mach-tegra/tegra30/clock.c | 41 +
 1 file changed, 41 insertions(+)

diff --git a/arch/arm/mach-tegra/tegra30/clock.c 
b/arch/arm/mach-tegra/tegra30/clock.c
index dcdd0d0978..b66211ce94 100644
--- a/arch/arm/mach-tegra/tegra30/clock.c
+++ b/arch/arm/mach-tegra/tegra30/clock.c
@@ -669,7 +669,48 @@ enum clock_id clk_id_to_pll_id(int clk_id)
 
 void clock_early_init(void)
 {
+   struct clk_rst_ctlr *clkrst =
+   (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
+   struct clk_pll_info *pllinfo;
+   u32 data;
+
tegra30_set_up_pllp();
+
+   /*
+* PLLD output frequency set to 925Mhz
+*/
+   switch (clock_get_osc_freq()) {
+   case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */
+   case CLOCK_OSC_FREQ_48_0: /* OSC is 48Mhz */
+   clock_set_rate(CLOCK_ID_DISPLAY, 925, 12, 0, 12);
+   break;
+
+   case CLOCK_OSC_FREQ_26_0: /* OSC is 26Mhz */
+   clock_set_rate(CLOCK_ID_DISPLAY, 925, 26, 0, 12);
+   break;
+
+   case CLOCK_OSC_FREQ_13_0: /* OSC is 13Mhz */
+   case CLOCK_OSC_FREQ_16_8: /* OSC is 16.8Mhz */
+   clock_set_rate(CLOCK_ID_DISPLAY, 925, 13, 0, 12);
+   break;
+
+   case CLOCK_OSC_FREQ_19_2:
+   case CLOCK_OSC_FREQ_38_4:
+   default:
+   /*
+* These are not supported. It is too early to print a
+* message and the UART likely won't work anyway due to the
+* oscillator being wrong.
+*/
+   break;
+   }
+
+   /* PLLD_MISC: Set CLKENABLE, CPCON 12, LFCON 1, and enable lock */
+   pllinfo = _pll_info_table[CLOCK_ID_DISPLAY];
+   data = (12 << pllinfo->kcp_shift) | (1 << pllinfo->kvco_shift);
+   data |= (1 << PLLD_CLKENABLE) | (1 << pllinfo->lock_ena);
+   writel(data, >crc_pll[CLOCK_ID_DISPLAY].pll_misc);
+   udelay(2);
 }
 
 void arch_timer_init(void)
-- 
2.37.2

[PATCH v2 04/16] ARM: tegra: clock: add clock_decode_pair helper

[Svyatoslav Ryhel]

Get periph clock id and its parent from device tree.
This works by looking up the peripheral's 'clocks' node and
reading out the second and fourth cells, which are the
peripheral and PLL clock numbers.

Signed-off-by: Svyatoslav Ryhel 
---
 arch/arm/include/asm/arch-tegra/clock.h | 13 +
 arch/arm/mach-tegra/clock.c | 23 +++
 2 files changed, 36 insertions(+)

diff --git a/arch/arm/include/asm/arch-tegra/clock.h 
b/arch/arm/include/asm/arch-tegra/clock.h
index 2270501406..61ef81e7fe 100644
--- a/arch/arm/include/asm/arch-tegra/clock.h
+++ b/arch/arm/include/asm/arch-tegra/clock.h
@@ -270,6 +270,19 @@ void clock_ll_start_uart(enum periph_id periph_id);
  */
 int clock_decode_periph_id(struct udevice *dev);
 
+/**
+ * Get periph clock id and its parent from device tree.
+ *
+ * This works by looking up the peripheral's 'clocks' node and reading out
+ * the second and fourth cells, which are the peripheral and PLL clock numbers.
+ *
+ * @param dev  udevice associated with FDT node
+ * @param clk_id   pointer to int array of 2 values
+ * first is periph clock, second is
+ * its PLL parent according to FDT.
+ */
+int clock_decode_pair(struct udevice *dev, int *clk_id);
+
 /**
  * Checks if the oscillator bypass is enabled (XOBP bit)
  *
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 11bffc1701..966009f375 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -678,6 +678,29 @@ int clock_decode_periph_id(struct udevice *dev)
assert(clock_periph_id_isvalid(id));
return id;
 }
+
+/*
+ * Get periph clock id and its parent from device tree.
+ *
+ * @param dev  udevice associated with FDT node
+ * @param clk_id   pointer to u32 array of 2 values
+ * first is periph clock, second is
+ * its PLL parent according to FDT.
+ */
+int clock_decode_pair(struct udevice *dev, int *clk_id)
+{
+   u32 cell[4];
+   int err;
+
+   err = dev_read_u32_array(dev, "clocks", cell, ARRAY_SIZE(cell));
+   if (err)
+   return -EINVAL;
+
+   clk_id[0] = clk_id_to_periph_id(cell[1]);
+   clk_id[1] = clk_id_to_pll_id(cell[3]);
+
+   return 0;
+}
 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
 
 int clock_verify(void)
-- 
2.37.2

[PATCH v2 03/16] ARM: tegra: clock: add clk_id_to_pll_id helper

[Svyatoslav Ryhel]

This function allows to convert a device tree clock ID to PLL ID.

Tested-by: Andreas Westman Dorcsak  # ASUS TF T30
Tested-by: Robert Eckelmann  # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel  # HTC One X
Signed-off-by: Svyatoslav Ryhel 
---
 arch/arm/include/asm/arch-tegra/clock.h |  8 ++
 arch/arm/mach-tegra/tegra114/clock.c| 37 
 arch/arm/mach-tegra/tegra124/clock.c| 38 +
 arch/arm/mach-tegra/tegra20/clock.c | 37 
 arch/arm/mach-tegra/tegra210/clock.c| 37 
 arch/arm/mach-tegra/tegra30/clock.c | 37 
 6 files changed, 194 insertions(+)

diff --git a/arch/arm/include/asm/arch-tegra/clock.h 
b/arch/arm/include/asm/arch-tegra/clock.h
index 1dd5d0742c..2270501406 100644
--- a/arch/arm/include/asm/arch-tegra/clock.h
+++ b/arch/arm/include/asm/arch-tegra/clock.h
@@ -354,6 +354,14 @@ int get_periph_clock_source(enum periph_id periph_id,
  */
 enum periph_id clk_id_to_periph_id(int clk_id);
 
+/*
+ * Convert a device tree clock ID to our PLL ID.
+ *
+ * @param clk_id   Clock ID according to tegra device tree binding
+ * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid
+ */
+enum clock_id clk_id_to_pll_id(int clk_id);
+
 /**
  * Set the output frequency you want for each PLL clock.
  * PLL output frequencies are programmed by setting their N, M and P values.
diff --git a/arch/arm/mach-tegra/tegra114/clock.c 
b/arch/arm/mach-tegra/tegra114/clock.c
index 143f86863f..c019b2d0cd 100644
--- a/arch/arm/mach-tegra/tegra114/clock.c
+++ b/arch/arm/mach-tegra/tegra114/clock.c
@@ -19,6 +19,8 @@
 #include 
 #include 
 
+#include 
+
 /*
  * Clock types that we can use as a source. The Tegra114 has muxes for the
  * peripheral clocks, and in most cases there are four options for the clock
@@ -646,6 +648,41 @@ enum periph_id clk_id_to_periph_id(int clk_id)
return clk_id;
}
 }
+
+/*
+ * Convert a device tree clock ID to our PLL ID.
+ *
+ * @param clk_id   Clock ID according to tegra114 device tree binding
+ * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid
+ */
+enum clock_id clk_id_to_pll_id(int clk_id)
+{
+   switch (clk_id) {
+   case TEGRA114_CLK_PLL_C:
+   return CLOCK_ID_CGENERAL;
+   case TEGRA114_CLK_PLL_M:
+   return CLOCK_ID_MEMORY;
+   case TEGRA114_CLK_PLL_P:
+   return CLOCK_ID_PERIPH;
+   case TEGRA114_CLK_PLL_A:
+   return CLOCK_ID_AUDIO;
+   case TEGRA114_CLK_PLL_U:
+   return CLOCK_ID_USB;
+   case TEGRA114_CLK_PLL_D:
+   case TEGRA114_CLK_PLL_D_OUT0:
+   return CLOCK_ID_DISPLAY;
+   case TEGRA114_CLK_PLL_X:
+   return CLOCK_ID_XCPU;
+   case TEGRA114_CLK_PLL_E:
+   return CLOCK_ID_EPCI;
+   case TEGRA114_CLK_CLK_32K:
+   return CLOCK_ID_32KHZ;
+   case TEGRA114_CLK_CLK_M:
+   return CLOCK_ID_CLK_M;
+   default:
+   return CLOCK_ID_NONE;
+   }
+}
 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
 
 void clock_early_init(void)
diff --git a/arch/arm/mach-tegra/tegra124/clock.c 
b/arch/arm/mach-tegra/tegra124/clock.c
index da38b26c27..415ba15e5d 100644
--- a/arch/arm/mach-tegra/tegra124/clock.c
+++ b/arch/arm/mach-tegra/tegra124/clock.c
@@ -19,6 +19,9 @@
 #include 
 #include 
 
+#include 
+#include 
+
 /*
  * Clock types that we can use as a source. The Tegra124 has muxes for the
  * peripheral clocks, and in most cases there are four options for the clock
@@ -826,6 +829,41 @@ enum periph_id clk_id_to_periph_id(int clk_id)
return clk_id;
}
 }
+
+/*
+ * Convert a device tree clock ID to our PLL ID.
+ *
+ * @param clk_id   Clock ID according to tegra124 device tree binding
+ * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid
+ */
+enum clock_id clk_id_to_pll_id(int clk_id)
+{
+   switch (clk_id) {
+   case TEGRA124_CLK_PLL_C:
+   return CLOCK_ID_CGENERAL;
+   case TEGRA124_CLK_PLL_M:
+   return CLOCK_ID_MEMORY;
+   case TEGRA124_CLK_PLL_P:
+   return CLOCK_ID_PERIPH;
+   case TEGRA124_CLK_PLL_A:
+   return CLOCK_ID_AUDIO;
+   case TEGRA124_CLK_PLL_U:
+   return CLOCK_ID_USB;
+   case TEGRA124_CLK_PLL_D:
+   case TEGRA124_CLK_PLL_D_OUT0:
+   return CLOCK_ID_DISPLAY;
+   case TEGRA124_CLK_PLL_X:
+   return CLOCK_ID_XCPU;
+   case TEGRA124_CLK_PLL_E:
+   return CLOCK_ID_EPCI;
+   case TEGRA124_CLK_CLK_32K:
+   return CLOCK_ID_32KHZ;
+   case TEGRA124_CLK_CLK_M:
+   return CLOCK_ID_CLK_M;
+   default:
+   return CLOCK_ID_NONE;
+   }
+}
 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
 
 void clock_early_init(void)
diff --git a/arch/arm/mach-tegra/tegra20/clock.c 
b/arch/arm/mach-tegra/tegra20/clock.c
index 

[PATCH v2 02/16] ARM: t20/t30: swap host1x and disp1 clock parents

[Svyatoslav Ryhel]

According to mainline clock tables and TRM HOST1X
parent is PLLC, while DISP1 usually uses PLLP as
parent clock.

Tested-by: Andreas Westman Dorcsak  # ASUS TF T30
Tested-by: Robert Eckelmann  # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel  # LG P895 T30
Signed-off-by: Svyatoslav Ryhel 
---
 arch/arm/mach-tegra/tegra20/clock.c | 4 ++--
 arch/arm/mach-tegra/tegra30/clock.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-tegra/tegra20/clock.c 
b/arch/arm/mach-tegra/tegra20/clock.c
index 8c127430aa..0316073d1a 100644
--- a/arch/arm/mach-tegra/tegra20/clock.c
+++ b/arch/arm/mach-tegra/tegra20/clock.c
@@ -760,8 +760,8 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SBC2, CLOCK_ID_PERIPH },
{ PERIPH_ID_SBC3, CLOCK_ID_PERIPH },
{ PERIPH_ID_SBC4, CLOCK_ID_PERIPH },
-   { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
-   { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
+   { PERIPH_ID_HOST1X, CLOCK_ID_CGENERAL },
+   { PERIPH_ID_DISP1, CLOCK_ID_PERIPH },
{ PERIPH_ID_NDFLASH, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
diff --git a/arch/arm/mach-tegra/tegra30/clock.c 
b/arch/arm/mach-tegra/tegra30/clock.c
index 04ad5c504d..e5c2fd542c 100644
--- a/arch/arm/mach-tegra/tegra30/clock.c
+++ b/arch/arm/mach-tegra/tegra30/clock.c
@@ -799,8 +799,8 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SBC4, CLOCK_ID_PERIPH },
{ PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
{ PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
-   { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
-   { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
+   { PERIPH_ID_HOST1X, CLOCK_ID_CGENERAL },
+   { PERIPH_ID_DISP1, CLOCK_ID_PERIPH },
{ PERIPH_ID_NDFLASH, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
-- 
2.37.2

[PATCH v2 01/16] tegra30: clock: add EXTPERIPH

[Svyatoslav Ryhel]

This mappings were missing for some reason.

Tested-by: Svyatoslav Ryhel  # LG P895 T30
Signed-off-by: Svyatoslav Ryhel 
---
 arch/arm/include/asm/arch-tegra30/clock-tables.h | 6 +++---
 arch/arm/mach-tegra/tegra30/clock.c  | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/arch-tegra30/clock-tables.h 
b/arch/arm/include/asm/arch-tegra30/clock-tables.h
index 8588009c61..6c899ff64c 100644
--- a/arch/arm/include/asm/arch-tegra30/clock-tables.h
+++ b/arch/arm/include/asm/arch-tegra30/clock-tables.h
@@ -190,9 +190,9 @@ enum periph_id {
PERIPH_ID_ACTMON,
 
/* 24 */
-   PERIPH_ID_EX_RESERVED24,
-   PERIPH_ID_EX_RESERVED25,
-   PERIPH_ID_EX_RESERVED26,
+   PERIPH_ID_EXTPERIPH1,
+   PERIPH_ID_EXTPERIPH2,
+   PERIPH_ID_EXTPERIPH3,
PERIPH_ID_EX_RESERVED27,
PERIPH_ID_SATA,
PERIPH_ID_HDA,
diff --git a/arch/arm/mach-tegra/tegra30/clock.c 
b/arch/arm/mach-tegra/tegra30/clock.c
index 449b66e3b2..04ad5c504d 100644
--- a/arch/arm/mach-tegra/tegra30/clock.c
+++ b/arch/arm/mach-tegra/tegra30/clock.c
@@ -377,9 +377,9 @@ static s8 periph_id_to_internal_id[PERIPH_ID_COUNT] = {
PERIPHC_ACTMON,
 
/* 24 */
-   NONE(RESERVED24),
-   NONE(RESERVED25),
-   NONE(RESERVED26),
+   PERIPHC_EXTPERIPH1,
+   PERIPHC_EXTPERIPH2,
+   PERIPHC_EXTPERIPH3,
NONE(RESERVED27),
PERIPHC_SATA,
PERIPHC_HDA,
-- 
2.37.2

[PATCH v2 00/16] General Tegra improvements

[Svyatoslav Ryhel]

List of changes in patch set:
 - add missing EXTPERIPH clocks for t30
 - swap host1x and disp1 clock parents (as they should be)
 - add clk_id_to_pll_id and clock_decode_pair helpers to use
   dts deeper (in tegra clocks often go in pair child - parent)
 - include PLLD setup in T30 (DISP1 may use it as parent on
   some device)
 - fix Tegra PWM parent clock inline with linux
 - Tegra SLINK: patch to accept any word length (unlike 8bit
   aligned which was before)
 - provide default USB gadget setup for existing Nvidia boards
 - add late init function to be able to configure pre-boot stage
   (like uncovering serial number or setting mac address)
 - create common pre-dm i2c write for PMIC (used on T30 and T124
   to configure basic PMIC voltages required to boot like cpu and
   core voltages)
 - expose crypto module for all Tegra SoCs and implement BCT patching
   (ability to update bootloader from u-boot on production devices
   without need in host PC)

---
Changelog from v1
 - rebased to latest u-boot master 
 - PLLD setup for T30 moved specifically into T30 area
---

Maxim Schwalm (1):
  ARM: tegra: provide default USB gadget setup

Ramin Khonsari (1):
  ARM: tegra30: implement BCT patching

Svyatoslav Ryhel (14):
  tegra30: clock: add EXTPERIPH
  ARM: t20/t30: swap host1x and disp1 clock parents
  ARM: tegra: clock: add clk_id_to_pll_id helper
  ARM: tegra: clock: add clock_decode_pair helper
  ARM: tegra30: add PLLD to pll setup
  ARM: tegra: Fix Tegra PWM parent clock
  spi: tegra20_slink: accept any word length
  ARM: tegra: add late init support
  ARM: tegra: create common pre-dm i2c write
  board: tegra124: switch to updated pre-dm i2c write
  board: tegra30: switch to updated pre-dm i2c write
  ARM: tegra: expose crypto module for all Tegra SoCs
  ARM: tegra: crypto: extend crypto functional
  ARM: tegra20: implement BCT patching

 arch/arm/dts/tegra114.dtsi|  2 +-
 arch/arm/dts/tegra124.dtsi|  2 +-
 arch/arm/include/asm/arch-tegra/clock.h   | 21 +
 arch/arm/include/asm/arch-tegra/crypto.h  | 47 ++
 arch/arm/include/asm/arch-tegra/sys_proto.h   |  6 ++
 arch/arm/include/asm/arch-tegra/tegra_i2c.h   | 17 
 .../include/asm/arch-tegra30/clock-tables.h   |  6 +-
 arch/arm/mach-tegra/Kconfig   | 15 
 arch/arm/mach-tegra/Makefile  |  1 +
 arch/arm/mach-tegra/board2.c  |  2 +
 arch/arm/mach-tegra/clock.c   | 23 +
 arch/arm/mach-tegra/cpu.h |  1 -
 arch/arm/mach-tegra/{tegra20 => }/crypto.c| 63 +
 arch/arm/mach-tegra/tegra114/clock.c  | 39 +++-
 arch/arm/mach-tegra/tegra124/clock.c  | 40 -
 arch/arm/mach-tegra/tegra124/cpu.c|  4 +
 arch/arm/mach-tegra/tegra20/Kconfig   |  1 +
 arch/arm/mach-tegra/tegra20/Makefile  |  7 +-
 arch/arm/mach-tegra/tegra20/bct.c | 78 
 arch/arm/mach-tegra/tegra20/bct.h | 42 +
 arch/arm/mach-tegra/tegra20/clock.c   | 43 -
 arch/arm/mach-tegra/tegra20/crypto.h  | 19 
 arch/arm/mach-tegra/tegra210/clock.c  | 39 +++-
 arch/arm/mach-tegra/tegra30/Kconfig   |  8 --
 arch/arm/mach-tegra/tegra30/Makefile  |  1 +
 arch/arm/mach-tegra/tegra30/bct.c | 78 
 arch/arm/mach-tegra/tegra30/bct.h | 42 +
 arch/arm/mach-tegra/tegra30/clock.c   | 90 +--
 arch/arm/mach-tegra/tegra30/cpu.c | 55 +---
 board/avionic-design/tec-ng/Makefile  |  4 +-
 board/avionic-design/tec-ng/tec-ng-spl.c  | 34 +++
 board/nvidia/beaver/Makefile  |  2 +
 board/nvidia/beaver/beaver-spl.c  | 43 +
 board/nvidia/cardhu/Makefile  |  4 +-
 board/nvidia/cardhu/cardhu-spl.c  | 43 +
 board/nvidia/venice2/as3722_init.c| 65 +-
 board/nvidia/venice2/as3722_init.h| 43 -
 board/toradex/apalis-tk1/as3722_init.c| 85 ++
 board/toradex/apalis-tk1/as3722_init.h| 40 -
 board/toradex/apalis_t30/Makefile |  2 +
 board/toradex/apalis_t30/apalis_t30-spl.c | 34 +++
 board/toradex/colibri_t30/Makefile|  2 +
 board/toradex/colibri_t30/colibri_t30-spl.c   | 34 +++
 configs/beaver_defconfig  |  3 -
 configs/cei-tk1-som_defconfig |  3 -
 configs/dalmore_defconfig |  3 -
 configs/jetson-tk1_defconfig  |  3 -
 configs/nyan-big_defconfig|  3 -
 configs/p2371-_defconfig  |  3 -
 configs/p2371-2180_defconfig  |  3 -
 configs/p2571_defconfig   |  3 -
 configs/p3450-_defconfig  |  3 -
 configs/venice2_defconfig |  3 -
 drivers/pwm/tegra_pwm.c 

Re: [PATCH] arm: kirkwood: Enable uart0 dm-pre-reloc for Kirkwood boards

[Pali Rohár]

On Wednesday 01 February 2023 13:13:16 Tony Dinh wrote:
> Hi all,
> 
> On Wed, Feb 1, 2023 at 11:05 AM Pali Rohár  wrote:
> >
> > On Wednesday 01 February 2023 09:17:15 Michael Walle wrote:
> > > > > > When DM_SERIAL is enabled, the device-tree property dm-pre-reloc is
> > > > > > required to boot over UART with kwboot. Enable this in a Kirkwood
> > > > > > common u-boot dtsi.
> > > > >
> > > > > My (dev) board unfortunately, have a bootloader which can't boot over
> > > > > serial.
> > > >
> > > > This is feature of Marvell BootROM and does not require any special from
> > > > Bootloader. So you should be able to boot over UART (if you have
> > > > accessible pins).
> > >
> > > I know, but there are known versions ob the bootrom where uart boot
> > > isn't supported (correctly).
> >
> > I heard about it... maybe it is a bug in client software (kwboot)? I do
> > not have such board if you are interested in it I could try to send some
> > details how to debug it.
> 
> The Kirkwood SoCs came with different BootROM versions. Version 1.1
> cannot be booted over UART, but version 1.2  can. I think there must
> be a bug in the BootROM 1.1. The older Kirkwood such as Sheevaplug,
> Dockstar, iConnect boards come with BootROM 1.1. Later version of
> Sheevaplug, GoFlex Home, GoFlex Net, Dreamplug, Pogoplug V4, Zyxel
> NSA310S, NSA320, NSA325 come with BootROM 1.2. So even though it is
> the same SoC, eg. 6281, they are actually produced at a different time
> and have different BootROM versions.

There are always multiple revisions of the same SoC. So it is possible
that something was broken on first revision of 88F6281 and in next
revision was updated BootROM with some fixes. Revision is written on
package label and for Armada SoCs it is available also in some register
(not sure about Kirkwood). It looks like that there is at least revision
Z0 and revision A0 of some Kirkwood SoC.

If there is a bug in first revisions then it should be documented in
some Kirkwood Errata document. Unfortunately I have never seen it, it is
not public, so I have no idea. In any case, if somebody has access to
Marvell documents, interesting are these document numbers:

* MV-S105223-001 - Differences Between the 88F6192, and 88F6281 Stepping Z0 and 
A0
* MV-S501081-00 - 88F6180, 88F6192, and 88F6281 Functional Errata, Interface 
Guidelines, and Restrictions
* MV-S501157-U0 - 88F6180, 88F6190, 88F6192, and 88F6281 Functional Errata, 
Interface Guidelines, and Restrictions

One of the option how to investigate or debug this issue without
documentation is to dump both BootROM versions (1.1, 1.2) and compare
them. Either there is different UART protocol for booting (which needs
to be implemented) or UART protocol is buggy and needs some workaround
or it is completely broken and does not work.

Re: [PATCH v7 0/3] Timer support for ARM Tegra

[Svyatoslav Ryhel]

Hm, you are correct. Patchset I have sent was based on u-boot/master
without timer patches. Now, since those are merged, I need to adjust
them a bit. It is not a big issue since I have some more optimisations
to be added anyway. I will send an updated version within an hour if
nothing interferes.

Thanks.
Best Regards.
Svyatoslav R.

чт, 2 лют. 2023 р. о 19:54 Tom Warren  пише:
>
> I've merged your 3 timer patches w/TOT u-boot-tegra, and sent a PR to Tom 
> Rini.
>
> However, your v1 16-patch series here does no apply cleanly on top of the new 
> u-boot-tegra/master (fast-forwarded to u-boot/master TOT, and then with your 
> 3 timer patches applied on top). PTAL, git am error spew below:
>
> git am -s --whitespace=strip 
> /home/tom/Downloads/bundle-23280-Svyatoslav-16-v1.mbox
> Applying: tegra30: clock: add EXTPERIPH
> Applying: ARM: t20/t30: swap host1x and disp1 clock parents
> Applying: ARM: tegra: clock: add clk_id_to_pll_id helper
> Applying: ARM: tegra: clock: add clock_decode_pair helper
> Applying: ARM: tegra30: add PLLD to pll setup
> error: patch failed: arch/arm/mach-tegra/clock.c:791
> error: arch/arm/mach-tegra/clock.c: patch does not apply
> Patch failed at 0005 ARM: tegra30: add PLLD to pll setup
> The copy of the patch that failed is found in:
>/home/tom/denx/uboot-tegra/.git/rebase-apply/patch
> When you have resolved this problem, run "git am --resolved".
> If you prefer to skip this patch, run "git am --skip" instead.
> To restore the original branch and stop patching, run "git am --abort".
>
> Tom
> -Original Message-
> From: Svyatoslav Ryhel 
> Sent: Tuesday, January 31, 2023 2:53 PM
> To: Tom Warren 
> Cc: Thierry Reding ; Rayagonda Kokatanur 
> ; Marek Vasut ; Maxim 
> Schwalm ; Dmitry Osipenko ; Jonas 
> Schwöbel ; Agneli ; Heinrich 
> Schuchardt ; Michal Simek ; Stefan 
> Roese ; Eugen Hristev ; Michael 
> Walle ; Simon Glass ; Jim Liu 
> ; William Zhang ; Rick Chen 
> ; Stefan Herbrechtsmeier 
> ; Andre Przywara 
> ; Jaehoon Chung ; 
> u-boot@lists.denx.de
> Subject: Re: [PATCH v7 0/3] Timer support for ARM Tegra
>
> External email: Use caution opening links or attachments
>
>
> I will upload v8 tomorrow once I have some time.
>
> Yes, Timer series should go first since some clock related commits of 
> "General Tegra improvements" may conflict. Those are not direct dependencies 
> but rather changed code overlaps.
>
> Thanks
>
> Best Regards.
> Svyatoslav R.
>
> вт, 31 січ. 2023 р. о 22:27 Tom Warren  пише:
> >
> > OK, I'll wait for your v8 with the adjusted timer enabling.
> >
> > Does this series need to go in first before your recent 16-patch series 
> > "General Tegra improvements"? i.e. are there any dependencies?
> >
> > Tom
> > -Original Message-
> > From: Svyatoslav Ryhel 
> > Sent: Tuesday, January 31, 2023 8:26 AM
> > To: Tom Warren 
> > Cc: Thierry Reding ; Rayagonda Kokatanur
> > ; Marek Vasut ; Maxim
> > Schwalm ; Dmitry Osipenko ;
> > Jonas Schwöbel ; Agneli
> > ; Heinrich Schuchardt ;
> > Michal Simek ; Stefan Roese ; Eugen
> > Hristev ; Michael Walle
> > ; Simon Glass ; Jim Liu
> > ; William Zhang ;
> > Rick Chen ; Stefan Herbrechtsmeier
> > ; Andre Przywara
> > ; Jaehoon Chung ;
> > u-boot@lists.denx.de
> > Subject: Re: [PATCH v7 0/3] Timer support for ARM Tegra
> >
> > External email: Use caution opening links or attachments
> >
> >
> > Yes, it works perfectly fine on the T20/T30/T124/T186 and T210, T114 board 
> > no one has on hand. Timer enabling has to be adjusted as Thierry suggested.
> >
> > вт, 31 січ. 2023 р. о 17:18 Tom Warren  пише:
> > >
> > > Has this been tested yet? I want to get it into the next PR, and I need a 
> > > tested-by for V7 before I can do that.
> > >
> > > Thanks,
> > >
> > > Tom
> > >
> > > -Original Message-
> > > From: Svyatoslav R. 
> > > Sent: Friday, January 27, 2023 1:28 PM
> > > To: Thierry Reding 
> > > Cc: Rayagonda Kokatanur ; Tom
> > > Warren ; Marek Vasut ; Maxim
> > > Schwalm ; Dmitry Osipenko
> > > ; Jonas Schwöbel ; Agneli
> > > ; Heinrich Schuchardt ;
> > > Michal Simek ; Stefan Roese ;
> > > Eugen Hristev ; Michael Walle
> > > ; Simon Glass ; Jim Liu
> > > ; William Zhang ;
> > > Rick Chen ; Stefan Herbrechtsmeier
> > > ; Andre Przywara
> > > ; Jaehoon Chung ;
> > > u-boot@lists.denx.de
> > > Subject: Re: [PATCH v7 0/3] Timer support for ARM Tegra
> > >
> > > External email: Use caution opening links or attachments
> > >
> > >
> > > On 1/27/23 19:15, Thierry Reding wrote:
> > > > On Fri, Jan 27, 2023 at 09:13:09AM +0200, Svyatoslav Ryhel wrote:
> > > >> - ARM: tegra: remap clock_osc_freq for all Tegra family Enum
> > > >> clock_osc_freq was designed to use only with T20.
> > > >> This patch remaps it to use additional frequencies, added in
> > > >> T30+ SoC while maintaining backwards compatibility with T20.
> > > >>
> > > >> - drivers: timer: add timer driver for ARMv7 based Tegra devices
> > > >> Add timer support for T20/T30/T114/T124 and T210 based devices.
> > > >> Driver is based on 

[RFC PATCH v1 2/2] include: dm: ofnode: fix headers

[Johan Jonker]

When fdt_addr_t and phys_addr_t are split it turns out that
the header don't match the functions, so fix the headers.

Signed-off-by: Johan Jonker 
---
 include/dm/ofnode.h | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index fa986560..287b0c35 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -678,8 +678,8 @@ int ofnode_read_size(ofnode node, const char *propname);
  * @size: Pointer to size of the address
  * Return: address, or FDT_ADDR_T_NONE if not present or invalid
  */
-phys_addr_t ofnode_get_addr_size_index(ofnode node, int index,
-  fdt_size_t *size);
+fdt_addr_t ofnode_get_addr_size_index(ofnode node, int index,
+ fdt_size_t *size);

 /**
  * ofnode_get_addr_size_index_notrans() - get an address/size from a node
@@ -695,8 +695,8 @@ phys_addr_t ofnode_get_addr_size_index(ofnode node, int 
index,
  * @size: Pointer to size of the address
  * Return: address, or FDT_ADDR_T_NONE if not present or invalid
  */
-phys_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index,
-  fdt_size_t *size);
+fdt_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index,
+ fdt_size_t *size);

 /**
  * ofnode_get_addr_index() - get an address from a node
@@ -707,7 +707,7 @@ phys_addr_t ofnode_get_addr_size_index_notrans(ofnode node, 
int index,
  * @index: Index of address to read (0 for first)
  * Return: address, or FDT_ADDR_T_NONE if not present or invalid
  */
-phys_addr_t ofnode_get_addr_index(ofnode node, int index);
+fdt_addr_t ofnode_get_addr_index(ofnode node, int index);

 /**
  * ofnode_get_addr() - get an address from a node
@@ -717,7 +717,7 @@ phys_addr_t ofnode_get_addr_index(ofnode node, int index);
  * @node: node to read from
  * Return: address, or FDT_ADDR_T_NONE if not present or invalid
  */
-phys_addr_t ofnode_get_addr(ofnode node);
+fdt_addr_t ofnode_get_addr(ofnode node);

 /**
  * ofnode_get_size() - get size from a node
@@ -1055,8 +1055,8 @@ const void *ofprop_get_property(const struct ofprop *prop,
  * @sizep: place to put size value (on success)
  * Return: address value, or FDT_ADDR_T_NONE on error
  */
-phys_addr_t ofnode_get_addr_size(ofnode node, const char *propname,
-phys_size_t *sizep);
+fdt_addr_t ofnode_get_addr_size(ofnode node, const char *propname,
+   fdt_size_t *sizep);

 /**
  * ofnode_read_u8_array_ptr() - find an 8-bit array
--
2.20.1

[RFC PATCH v1 1/2] include: fdtdec: decouple fdt_addr_t and phys_addr_t size

[Johan Jonker]

The DT specification supports CPUs with both 32-bit and 64-bit addressing
capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled
by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions
with a 64-bit reg property. These partitions synced from Linux end up with
the wrong offset and sizes when only the lower 32-bit is passed.
Decouple the fdt_addr_t and phys_addr_t size as they don't necessary
match.

Signed-off-by: Johan Jonker 
---

Note for Tom Rini or others:

fdt_addr_t is referenced in 230 files and fdt_size_t in 50 files.
Most drivers mix up FDT and CPU capabilities.
Please advise how to move forward with proper DT parsing.

---

This is related to a possible future serie of bug fixes
for the Rockchip nfc driver.
---
 Kconfig  | 8 
 include/fdtdec.h | 8 +---
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/Kconfig b/Kconfig
index a75cce7e..8101f1a6 100644
--- a/Kconfig
+++ b/Kconfig
@@ -422,11 +422,19 @@ endif # EXPERT

 config PHYS_64BIT
bool "64bit physical address support"
+   select FDT_64BIT
help
  Say Y here to support 64bit physical memory address.
  This can be used not only for 64bit SoCs, but also for
  large physical address extension on 32bit SoCs.

+config FDT_64BIT
+   bool "64bit fdt address support"
+   help
+ Say Y here to support 64bit fdt memory address.
+ This can be used not only for 64bit SoCs, but also for
+ large physical address extension on 32bit SoCs.
+
 config HAS_ROM
bool
select BINMAN
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 12355afd..0adde92a 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -21,12 +21,12 @@
  * A typedef for a physical address. Note that fdt data is always big
  * endian even on a litle endian machine.
  */
-typedef phys_addr_t fdt_addr_t;
-typedef phys_size_t fdt_size_t;

 #define FDT_SIZE_T_NONE (-1U)

-#ifdef CONFIG_PHYS_64BIT
+#ifdef CONFIG_FDT_64BIT
+typedef u64 fdt_addr_t;
+typedef u64 fdt_size_t;
 #define FDT_ADDR_T_NONE ((ulong)(-1))

 #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
@@ -35,6 +35,8 @@ typedef phys_size_t fdt_size_t;
 #define cpu_to_fdt_size(reg) cpu_to_be64(reg)
 typedef fdt64_t fdt_val_t;
 #else
+typedef u32 fdt_addr_t;
+typedef u32 fdt_size_t;
 #define FDT_ADDR_T_NONE (-1U)

 #define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
--
2.20.1

RE: [PATCH v7 0/3] Timer support for ARM Tegra

[Tom Warren]

I've merged your 3 timer patches w/TOT u-boot-tegra, and sent a PR to Tom Rini.

However, your v1 16-patch series here does no apply cleanly on top of the new 
u-boot-tegra/master (fast-forwarded to u-boot/master TOT, and then with your 3 
timer patches applied on top). PTAL, git am error spew below:

git am -s --whitespace=strip 
/home/tom/Downloads/bundle-23280-Svyatoslav-16-v1.mbox
Applying: tegra30: clock: add EXTPERIPH
Applying: ARM: t20/t30: swap host1x and disp1 clock parents
Applying: ARM: tegra: clock: add clk_id_to_pll_id helper
Applying: ARM: tegra: clock: add clock_decode_pair helper
Applying: ARM: tegra30: add PLLD to pll setup
error: patch failed: arch/arm/mach-tegra/clock.c:791
error: arch/arm/mach-tegra/clock.c: patch does not apply
Patch failed at 0005 ARM: tegra30: add PLLD to pll setup
The copy of the patch that failed is found in:
   /home/tom/denx/uboot-tegra/.git/rebase-apply/patch
When you have resolved this problem, run "git am --resolved".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

Tom
-Original Message-
From: Svyatoslav Ryhel  
Sent: Tuesday, January 31, 2023 2:53 PM
To: Tom Warren 
Cc: Thierry Reding ; Rayagonda Kokatanur 
; Marek Vasut ; Maxim Schwalm 
; Dmitry Osipenko ; Jonas Schwöbel 
; Agneli ; Heinrich Schuchardt 
; Michal Simek ; Stefan Roese 
; Eugen Hristev ; Michael Walle 
; Simon Glass ; Jim Liu 
; William Zhang ; Rick Chen 
; Stefan Herbrechtsmeier 
; Andre Przywara 
; Jaehoon Chung ; 
u-boot@lists.denx.de
Subject: Re: [PATCH v7 0/3] Timer support for ARM Tegra

External email: Use caution opening links or attachments


I will upload v8 tomorrow once I have some time.

Yes, Timer series should go first since some clock related commits of "General 
Tegra improvements" may conflict. Those are not direct dependencies but rather 
changed code overlaps.

Thanks

Best Regards.
Svyatoslav R.

вт, 31 січ. 2023 р. о 22:27 Tom Warren  пише:
>
> OK, I'll wait for your v8 with the adjusted timer enabling.
>
> Does this series need to go in first before your recent 16-patch series 
> "General Tegra improvements"? i.e. are there any dependencies?
>
> Tom
> -Original Message-
> From: Svyatoslav Ryhel 
> Sent: Tuesday, January 31, 2023 8:26 AM
> To: Tom Warren 
> Cc: Thierry Reding ; Rayagonda Kokatanur 
> ; Marek Vasut ; Maxim 
> Schwalm ; Dmitry Osipenko ; 
> Jonas Schwöbel ; Agneli 
> ; Heinrich Schuchardt ; 
> Michal Simek ; Stefan Roese ; Eugen 
> Hristev ; Michael Walle 
> ; Simon Glass ; Jim Liu 
> ; William Zhang ; 
> Rick Chen ; Stefan Herbrechtsmeier 
> ; Andre Przywara 
> ; Jaehoon Chung ; 
> u-boot@lists.denx.de
> Subject: Re: [PATCH v7 0/3] Timer support for ARM Tegra
>
> External email: Use caution opening links or attachments
>
>
> Yes, it works perfectly fine on the T20/T30/T124/T186 and T210, T114 board no 
> one has on hand. Timer enabling has to be adjusted as Thierry suggested.
>
> вт, 31 січ. 2023 р. о 17:18 Tom Warren  пише:
> >
> > Has this been tested yet? I want to get it into the next PR, and I need a 
> > tested-by for V7 before I can do that.
> >
> > Thanks,
> >
> > Tom
> >
> > -Original Message-
> > From: Svyatoslav R. 
> > Sent: Friday, January 27, 2023 1:28 PM
> > To: Thierry Reding 
> > Cc: Rayagonda Kokatanur ; Tom 
> > Warren ; Marek Vasut ; Maxim 
> > Schwalm ; Dmitry Osipenko 
> > ; Jonas Schwöbel ; Agneli 
> > ; Heinrich Schuchardt ; 
> > Michal Simek ; Stefan Roese ; 
> > Eugen Hristev ; Michael Walle 
> > ; Simon Glass ; Jim Liu 
> > ; William Zhang ; 
> > Rick Chen ; Stefan Herbrechtsmeier 
> > ; Andre Przywara 
> > ; Jaehoon Chung ; 
> > u-boot@lists.denx.de
> > Subject: Re: [PATCH v7 0/3] Timer support for ARM Tegra
> >
> > External email: Use caution opening links or attachments
> >
> >
> > On 1/27/23 19:15, Thierry Reding wrote:
> > > On Fri, Jan 27, 2023 at 09:13:09AM +0200, Svyatoslav Ryhel wrote:
> > >> - ARM: tegra: remap clock_osc_freq for all Tegra family Enum 
> > >> clock_osc_freq was designed to use only with T20.
> > >> This patch remaps it to use additional frequencies, added in
> > >> T30+ SoC while maintaining backwards compatibility with T20.
> > >>
> > >> - drivers: timer: add timer driver for ARMv7 based Tegra devices 
> > >> Add timer support for T20/T30/T114/T124 and T210 based devices.
> > >> Driver is based on DM, has device tree support and can be used on 
> > >> SPL and early boot stage.
> > >>
> > >> Arm64 Tegra (apart T210) according to comment in tegra-common.h 
> > >> use architected timer.
> > >>
> > >> - ARM: tegra: include timer as default option Enable TIMER as 
> > >> default option for all Tegra devices and enable TEGRA_TIMER for 
> > >> TEGRA_ARMV7_COMMON and TEGRA210.
> > >> Additionally enable SPL_TIMER if build as SPL part and drop 
> > >> deprecated configs from common header.
> > >>
> > >> P. S. I have no arm64 Tegra and according to comment in 
> > >> tegra-common.h Use the Tegra US 

Pull request, u-boot-tegra/master

[Tom Warren]

Tom,

Please pull u-boot-tegra/master into U-Boot/master. Thanks.
It has passed 'buildman tegra' w/o error, and Thierry has tested it on his
Tegra boards.

The following changes since commit 1e1cd8eb2d0c8e5b28b2dd6622ec9cbbd5eb61b8:

  Merge tag 'fsl-qoriq-2023-2-1' of
https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq (2023-02-01
09:31:17 -0500)

are available in the git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-tegra.git
refs/pipelines/15015

for you to fetch changes up to 412a4c6f1b94b5fea4c7ccb906de418bdaf9c058:

  ARM: tegra: include timer as default option (2023-02-02 10:16:41 -0700)


Svyatoslav Ryhel (3):
  ARM: tegra: remap clock_osc_freq for all Tegra family
  drivers: timer: add driver for ARMv7 based Tegra devices and T210
  ARM: tegra: include timer as default option

 arch/arm/Kconfig|   1 +
 arch/arm/include/asm/arch-tegra/clock.h |   9 ++-
 arch/arm/mach-tegra/Kconfig |   4 +
 arch/arm/mach-tegra/clock.c |  17 -
 arch/arm/mach-tegra/cpu.c   |  70 +
 arch/arm/mach-tegra/tegra114/clock.c|  13 ++--
 arch/arm/mach-tegra/tegra124/clock.c|  13 ++--
 arch/arm/mach-tegra/tegra20/clock.c |   4 +-
 arch/arm/mach-tegra/tegra210/clock.c|  22 +-
 arch/arm/mach-tegra/tegra30/clock.c |  10 +--
 drivers/timer/Kconfig   |   8 ++
 drivers/timer/Makefile  |   1 +
 drivers/timer/tegra-timer.c | 130

 drivers/usb/host/ehci-tegra.c   |  46 ---
 include/configs/tegra-common.h  |   6 --
 15 files changed, 275 insertions(+), 79 deletions(-)
 create mode 100644 drivers/timer/tegra-timer.c

Re: Docs for RISC-V

[Simon Glass]

Hi,

On Thu, 2 Feb 2023 at 10:18, Simon Glass  wrote:
>
> Hi Rick & Leo,
>
> I see docs for one board at [1] but I'm not sure what to do with unleashed.
>
> It seems to need a 'genimage' tool, going on what I see in CI.
>
> Could you adjust it to use binman to output an image suitable for
> writing to an SD card in a single 'dd' step, as Rockchip does?
>
> Also, how about adding a RISC-V section here?
>
> https://u-boot.readthedocs.io/en/latest/arch/index.html
>

Also I notice that this is incorrect:

https://u-boot.readthedocs.io/en/latest/board/sifive/unleashed.html?highlight=fw_dynamic.bin

since 'make PLATFORM=generic' gives errors. I think it needs CROSS_COMPILE

One other thing...binman output is this:

binman: Filename 'fw_dynamic.bin' not found in input path (...)

You should add something to tools/binman/missing-blob-help so that it
tells the user where to find the blob.

Thanks again,
Simon

> Thanks,
> Simon
>
> [1] https://u-boot.readthedocs.io/en/latest/board/sifive/unmatched.html

Re: [PATCH 1/1] efi_loader: stop watchdogs in ExitBootServices()

[Tom Rini]

On Thu, Feb 02, 2023 at 10:12:07AM -0700, Simon Glass wrote:
> Hi,
> 
> On Thu, 2 Feb 2023 at 01:17, Etienne Carriere
>  wrote:
> >
> > Hello Heinrich and all,
> >
> > On Wed, 1 Feb 2023 at 10:00, Heinrich Schuchardt
> >  wrote:
> > >
> > >
> > >
> > > On 2/1/23 09:32, Rasmus Villemoes wrote:
> > > > On 31/01/2023 16.07, Tom Rini wrote:
> > > >> On Tue, Jan 31, 2023 at 02:03:10PM +0200, Ilias Apalodimas wrote:
> > > >>> Hi all,
> > > >>>
> > > >>> On Mon, Jan 30, 2023 at 01:30:49PM -0500, Tom Rini wrote:
> > >  On Mon, Jan 30, 2023 at 01:13:55PM -0500, Tom Rini wrote:
> > > > On Sat, Jan 28, 2023 at 09:57:45AM +0100, Heinrich Schuchardt wrote:
> > > >
> > > >> The UEFI specification requires for ExitBootServices() that "the 
> > > >> boot
> > > >> services watchdog timer is disabled". We already disable the 
> > > >> software
> > > >> watchdog. We should additionally disable the hardware watchdogs.
> > > >>
> > > >> Reported-by: Andre Przywara 
> > > >> Signed-off-by: Heinrich Schuchardt 
> > > >> 
> > > >> ---
> > > >>   lib/efi_loader/efi_boottime.c | 10 ++
> > > >>   1 file changed, 6 insertions(+), 4 deletions(-)
> > > >>
> > > >> diff --git a/lib/efi_loader/efi_boottime.c 
> > > >> b/lib/efi_loader/efi_boottime.c
> > > >> index ba28989f36..71215af9d2 100644
> > > >> --- a/lib/efi_loader/efi_boottime.c
> > > >> +++ b/lib/efi_loader/efi_boottime.c
> > > >> @@ -19,6 +19,7 @@
> > > >>   #include 
> > > >>   #include 
> > > >>   #include 
> > > >> +#include 
> > > >>   #include 
> > > >>   #include 
> > > >>   #include 
> > > >> @@ -2171,6 +2172,11 @@ static efi_status_t EFIAPI 
> > > >> efi_exit_boot_services(efi_handle_t image_handle,
> > > >>  list_del(>link);
> > > >>  }
> > > >>
> > > >> +/* Disable watchdogs */
> > > >> +efi_set_watchdog(0);
> > > >> +if IS_ENABLED(CONFIG_WDT)
> > > >> +wdt_stop_all();
> > > >> +
> > > >>  if (!efi_st_keep_devices) {
> > > >>  bootm_disable_interrupts();
> > > >>  if (IS_ENABLED(CONFIG_USB_DEVICE))
> > > >> @@ -2196,10 +2202,6 @@ static efi_status_t EFIAPI 
> > > >> efi_exit_boot_services(efi_handle_t image_handle,
> > > >>
> > > >>  /* Recalculate CRC32 */
> > > >>  efi_update_table_header_crc32();
> > > >> -
> > > >> -/* Give the payload some time to boot */
> > > >> -efi_set_watchdog(0);
> > > >> -schedule();
> > > >>   out:
> > > >>  if (IS_ENABLED(CONFIG_EFI_TCG2_PROTOCOL)) {
> > > >>  if (ret != EFI_SUCCESS)
> > > >
> > > > I thought we had rejected going down this path since the UEFI spec 
> > > > is
> > > > unhelpfully wrong if it insists this?
> > > 
> > >  Because, to be clear, stopping hardware watchdogs is not to be done. 
> > >  The
> > >  one in-tree caller of wdt_stop_all is very questionable. You cannot
> > >  seriously stop a watchdog until someone else can hopefully resume it 
> > >  as
> > >  that violates the function of a hardware watchdog. A pure software
> > >  watchdog is one thing, and a hardware watchdog is another. I feel 
> > >  like
> > >  the most likely answer here is that someone needs to, still, push 
> > >  back
> > >  to the UEFI specification to get hardware watchdogs better understood
> > >  and handled, as it must never be stopped once started and if you 
> > >  cannot
> > >  reach the next stage in time, that's an engineering issue to 
> > >  resolve. My
> > >  first guess is that ExitBootServices should service the watchdog one
> > >  last time to ensure the largest window of time for the OS to take 
> > >  over
> > >  servicing of the watchdog.
> > > 
> > > >>>
> > > >>> There's two scenarios I can think of
> > > >>> 1. After U-Boot is done it can disable the hardware watchdog.
> > > >>> The kernel will go through the EFI-stub -> kernel proper -> 
> > > >>> watchdog
> > > >>> gets re-initialized.  In that case you are *hoping* that device 
> > > >>> won't
> > > >>> hang in the efi-stub or until the wd is up again.
> > > >>> 2. EFI makes sure the hardware wd gets configured with the highest 
> > > >>> allowed
> > > >>> value.  The efi-stub doesn't have any driver to refresh the wd, 
> > > >>> so we
> > > >>> will again rely on the wd driver coming up and refreshing the 
> > > >>> timers.
> > > >>
> > > >> You cannot stop the hardware watchdog, period. I think in the previous
> > > >> thread about this it was noted that some hardware watchdogs cannot be
> > > >> disabled, it's not function that the watchdog supports. Someone needs 
> > > >> to
> > > >> go and talk with the UEFI specification people and get this 

Re: [PATCH v4 2/6] tpm: Support boot measurements

[Eddie James]

On 2/2/23 11:12, Simon Glass wrote:

Hi Eddie / Ilias,

On Thu, 2 Feb 2023 at 09:24, Eddie James  wrote:


On 1/26/23 01:51, Ilias Apalodimas wrote:

Hi Eddie,

Thanks for the cleanup! Unfortunately this doesn't compile with EFI
selected, but in general it looks pretty good.


Thanks, yes I forgot to remove tcg2_pcr_read



On Wed, Jan 25, 2023 at 11:18:06AM -0600, Eddie James wrote:

Add TPM2 functions to support boot measurement. This includes
starting up the TPM, initializing/appending the event log, and
measuring the U-Boot version. Much of the code was used in the
EFI subsystem, so remove it there and use the common functions.

Signed-off-by: Eddie James 
---
   include/efi_tcg2.h|  44 --
   include/tpm-v2.h  | 254 ++
   lib/efi_loader/efi_tcg2.c | 975 +++---
   lib/tpm-v2.c  | 799 +++
   4 files changed, 1129 insertions(+), 943 deletions(-)

Can you please point to the spec containing what this implements? I am
still not sure why the identifiers and filenames have EFI in them.



Yes. Primarily implementing this specification: 
https://trustedcomputinggroup.org/wp-content/uploads/TCG_ServerManagDomainFWProfile_r1p00_pub.pdf



See chapter 9, event logging, which mentions the TCG_EfiSpecIdEvent as 
the first event in the event log.



Thanks,

Eddie




Regards,
Simon

Docs for RISC-V

[Simon Glass]

Hi Rick & Leo,

I see docs for one board at [1] but I'm not sure what to do with unleashed.

It seems to need a 'genimage' tool, going on what I see in CI.

Could you adjust it to use binman to output an image suitable for
writing to an SD card in a single 'dd' step, as Rockchip does?

Also, how about adding a RISC-V section here?

https://u-boot.readthedocs.io/en/latest/arch/index.html

Thanks,
Simon

[1] https://u-boot.readthedocs.io/en/latest/board/sifive/unmatched.html

Re: [PATCH v4 2/6] tpm: Support boot measurements

[Simon Glass]

Hi Eddie / Ilias,

On Thu, 2 Feb 2023 at 09:24, Eddie James  wrote:
>
>
> On 1/26/23 01:51, Ilias Apalodimas wrote:
> > Hi Eddie,
> >
> > Thanks for the cleanup! Unfortunately this doesn't compile with EFI
> > selected, but in general it looks pretty good.
>
>
> Thanks, yes I forgot to remove tcg2_pcr_read
>
>
> >
> > On Wed, Jan 25, 2023 at 11:18:06AM -0600, Eddie James wrote:
> >> Add TPM2 functions to support boot measurement. This includes
> >> starting up the TPM, initializing/appending the event log, and
> >> measuring the U-Boot version. Much of the code was used in the
> >> EFI subsystem, so remove it there and use the common functions.
> >>
> >> Signed-off-by: Eddie James 
> >> ---
> >>   include/efi_tcg2.h|  44 --
> >>   include/tpm-v2.h  | 254 ++
> >>   lib/efi_loader/efi_tcg2.c | 975 +++---
> >>   lib/tpm-v2.c  | 799 +++
> >>   4 files changed, 1129 insertions(+), 943 deletions(-)

Can you please point to the spec containing what this implements? I am
still not sure why the identifiers and filenames have EFI in them.

Regards,
Simon

Re: V3s - Ethernet and SPI NOR problems..

[Simon Glass]

Hi,
On Fri, 13 Jan 2023 at 13:32, Serdar KOYLU  wrote:
>
> Hello everyone.
> I works many custom V3s boards and tried many versions for u-boot. We find 
> two main problems for our use case and seems all versions is useless for me. 
> This comments for 2022.07 release..

Your email is garbled and it isn't clear what board you are using. Can
you try again?

For patches,see here:

https://u-boot.readthedocs.io/en/latest/develop/sending_patches.html

> 1. No valid ethernet support on implementation. We found two case:
> a. No required CLK_GATE/RESET definitons. We apply this mods:
> diff clk_v3s.c clk_v3s.c-mod 19a20>  [CLK_BUS_EMAC]  = GATE(0x060, 
> BIT(17)),29a31,32>  >  [CLK_BUS_EPHY]  = GATE(0x070, BIT(0)),41a45>  
> [RST_BUS_EMAC]  = RESET(0x2c0, BIT(17)),44c48,50< --->  >  
> [RST_BUS_EPHY]  = RESET(0x2c8, BIT(2)),>
> b. ) no support for devtree dts definitions for ethernet. We use this hacks:
> 19d20< #include 61a63,64> > #define V3S_EPHY_DEFAULT_VALUE 
> 0x38000  // Hack for V3S..62a66> 64a69> #define H3_EPHY_CLK_SEL BIT(18) /* 1: 
> 24MHz, 0: 25MHz */68a74,78> #define H3_EPHY_MUX_MASK (H3_EPHY_SHUTDOWN | 
> H3_EPHY_SELECT)> #define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID 1> #define 
> DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID 2> > 136a147>  V3S_EMAC303,304c314,323<  reg 
> |=  H3_EPHY_DEFAULT_VALUE;<  reg |= priv->phyaddr << H3_EPHY_ADDR_SHIFT;--->  
> if (priv->variant == V3S_EMAC) {>  debug("V3S SYSCON\n");>  reg |=  
> V3S_EPHY_DEFAULT_VALUE;>  } else {>  reg |=  H3_EPHY_DEFAULT_VALUE;>  }>  reg 
> |= H3_EPHY_CLK_SEL;>  >  //reg |= priv->phyaddr << H3_EPHY_ADDR_SHIFT;>  reg 
> |= 1 << H3_EPHY_ADDR_SHIFT;320d338< 337a356>  priv->variant == V3S_EMAC 
> ||344a364>  debug("V3S Mode MII\n");364,372c384,392< <  if 
> (pdata->tx_delay_ps)<  reg |= ((pdata->tx_delay_ps / 100) << 
> SC_ETXDC_OFFSET)<   & SC_ETXDC_MASK;< <  if (pdata->rx_delay_ps)<  reg |= 
> ((pdata->rx_delay_ps / 100) << SC_ERXDC_OFFSET)<   & SC_ERXDC_MASK;< --->  if 
> (priv->variant != V3S_EMAC) {>  if (pdata->tx_delay_ps)>  reg |= 
> ((pdata->tx_delay_ps / 100) << SC_ETXDC_OFFSET)>   & SC_ETXDC_MASK;> >  if 
> (pdata->rx_delay_ps)>  reg |= ((pdata->rx_delay_ps / 100) << 
> SC_ERXDC_OFFSET)>   & SC_ERXDC_MASK;>  }382a403>  debug("PHY Connect: %p\n", 
> phydev);385c406< --->  debug("PHY Initializing..\n");470c491<  printf("%s: 
> Timeout\n", __func__);--->  printf("%s: MAC WAIT Timeout\n", 
> __func__);598d618< 613c633<  /* Only H3/H5 have clock controls for internal 
> EPHY */--->  /* Only H3/H5/V3S have clock controls for internal EPHY 
> */764c784<  if (ret)--->  if (ret) 773d792< 779d797< 785d802< 858d874< 
> 860d875<  printf("phy interface%d\n", pdata->phy_interface);864c879,882<  if 
> (priv->variant == H3_EMAC) {--->  if (priv->variant == V3S_EMAC ) {>  
> debug("%s: Use V3s EMAC routine..\n", __func__);>  }>  if (priv->variant == 
> H3_EMAC || priv->variant == V3S_EMAC ) {872c890,891<  
> sun8i_pdata->tx_delay_ps = fdtdec_get_int(gd->fdt_blob, node,--->  if 
> (priv->variant != V3S_EMAC) {>  sun8i_pdata->tx_delay_ps = 
> fdtdec_get_int(gd->fdt_blob, node,874,876c893,895<  if 
> (sun8i_pdata->tx_delay_ps < 0 || sun8i_pdata->tx_delay_ps > 700)<  
> printf("%s: Invalid TX delay value %d\n", __func__,< 
> sun8i_pdata->tx_delay_ps);--->  if (sun8i_pdata->tx_delay_ps < 0 || 
> sun8i_pdata->tx_delay_ps > 700)>  printf("%s: Invalid TX delay value %d\n", 
> __func__,>  sun8i_pdata->tx_delay_ps);878c897<  sun8i_pdata->rx_delay_ps = 
> fdtdec_get_int(gd->fdt_blob, node,--->  sun8i_pdata->rx_delay_ps = 
> fdtdec_get_int(gd->fdt_blob, node,880,883c899,902<  if 
> (sun8i_pdata->rx_delay_ps < 0 || sun8i_pdata->rx_delay_ps > 3100)<  
> printf("%s: Invalid RX delay value %d\n", __func__,< 
> sun8i_pdata->rx_delay_ps);< --->  if (sun8i_pdata->rx_delay_ps < 0 || 
> sun8i_pdata->rx_delay_ps > 3100)>  printf("%s: Invalid RX delay value %d\n", 
> __func__,>  sun8i_pdata->rx_delay_ps);>  }905a925>  {.compatible = 
> "allwinner,sun8i-v3s-emac", .data = (uintptr_t)V3S_EMAC },
> After this modifications, ethernet works perfectly, no problems for tftpboot, 
> nfs etc.
> 2. SPI NOR flash support ok, but no boots from SPI NOR. For 2017 release, no 
> problems seems for this purpose, but 2021 and above releases not supports 
> this.SPL or Non-SPL configurations can't work:
> U-Boot SPL 2022.07 (Jan 13 2023 - 02:19:05 -0500)DRAM: 64 MiBSPL: Unsupported 
> Boot Device!SPL: failed to boot from all boot devices### ERROR ### Please 
> RESET the board ###
> Or no response to debug console.
> For SPL configurations with belongated SPI/MTD/NOR options, no link/build 
> possible :( Such as:
> --
>  LD  spl/u-boot-splarm-linux-gnu-ld.bfd: u-boot-spl section `.data' will 
> not fit in region `.sram'arm-linux-gnu-ld.bfd: region `.sram' overflowed by 
> 356 bytesarm-linux-gnu-ld.bfd: drivers/mtd/spi/sf_probe.o: in function 
> 

Re: [PATCH 1/1] efi_loader: stop watchdogs in ExitBootServices()

[Simon Glass]

Hi,

On Thu, 2 Feb 2023 at 01:17, Etienne Carriere
 wrote:
>
> Hello Heinrich and all,
>
> On Wed, 1 Feb 2023 at 10:00, Heinrich Schuchardt
>  wrote:
> >
> >
> >
> > On 2/1/23 09:32, Rasmus Villemoes wrote:
> > > On 31/01/2023 16.07, Tom Rini wrote:
> > >> On Tue, Jan 31, 2023 at 02:03:10PM +0200, Ilias Apalodimas wrote:
> > >>> Hi all,
> > >>>
> > >>> On Mon, Jan 30, 2023 at 01:30:49PM -0500, Tom Rini wrote:
> >  On Mon, Jan 30, 2023 at 01:13:55PM -0500, Tom Rini wrote:
> > > On Sat, Jan 28, 2023 at 09:57:45AM +0100, Heinrich Schuchardt wrote:
> > >
> > >> The UEFI specification requires for ExitBootServices() that "the boot
> > >> services watchdog timer is disabled". We already disable the software
> > >> watchdog. We should additionally disable the hardware watchdogs.
> > >>
> > >> Reported-by: Andre Przywara 
> > >> Signed-off-by: Heinrich Schuchardt 
> > >> 
> > >> ---
> > >>   lib/efi_loader/efi_boottime.c | 10 ++
> > >>   1 file changed, 6 insertions(+), 4 deletions(-)
> > >>
> > >> diff --git a/lib/efi_loader/efi_boottime.c 
> > >> b/lib/efi_loader/efi_boottime.c
> > >> index ba28989f36..71215af9d2 100644
> > >> --- a/lib/efi_loader/efi_boottime.c
> > >> +++ b/lib/efi_loader/efi_boottime.c
> > >> @@ -19,6 +19,7 @@
> > >>   #include 
> > >>   #include 
> > >>   #include 
> > >> +#include 
> > >>   #include 
> > >>   #include 
> > >>   #include 
> > >> @@ -2171,6 +2172,11 @@ static efi_status_t EFIAPI 
> > >> efi_exit_boot_services(efi_handle_t image_handle,
> > >>  list_del(>link);
> > >>  }
> > >>
> > >> +/* Disable watchdogs */
> > >> +efi_set_watchdog(0);
> > >> +if IS_ENABLED(CONFIG_WDT)
> > >> +wdt_stop_all();
> > >> +
> > >>  if (!efi_st_keep_devices) {
> > >>  bootm_disable_interrupts();
> > >>  if (IS_ENABLED(CONFIG_USB_DEVICE))
> > >> @@ -2196,10 +2202,6 @@ static efi_status_t EFIAPI 
> > >> efi_exit_boot_services(efi_handle_t image_handle,
> > >>
> > >>  /* Recalculate CRC32 */
> > >>  efi_update_table_header_crc32();
> > >> -
> > >> -/* Give the payload some time to boot */
> > >> -efi_set_watchdog(0);
> > >> -schedule();
> > >>   out:
> > >>  if (IS_ENABLED(CONFIG_EFI_TCG2_PROTOCOL)) {
> > >>  if (ret != EFI_SUCCESS)
> > >
> > > I thought we had rejected going down this path since the UEFI spec is
> > > unhelpfully wrong if it insists this?
> > 
> >  Because, to be clear, stopping hardware watchdogs is not to be done. 
> >  The
> >  one in-tree caller of wdt_stop_all is very questionable. You cannot
> >  seriously stop a watchdog until someone else can hopefully resume it as
> >  that violates the function of a hardware watchdog. A pure software
> >  watchdog is one thing, and a hardware watchdog is another. I feel like
> >  the most likely answer here is that someone needs to, still, push back
> >  to the UEFI specification to get hardware watchdogs better understood
> >  and handled, as it must never be stopped once started and if you cannot
> >  reach the next stage in time, that's an engineering issue to resolve. 
> >  My
> >  first guess is that ExitBootServices should service the watchdog one
> >  last time to ensure the largest window of time for the OS to take over
> >  servicing of the watchdog.
> > 
> > >>>
> > >>> There's two scenarios I can think of
> > >>> 1. After U-Boot is done it can disable the hardware watchdog.
> > >>> The kernel will go through the EFI-stub -> kernel proper -> watchdog
> > >>> gets re-initialized.  In that case you are *hoping* that device 
> > >>> won't
> > >>> hang in the efi-stub or until the wd is up again.
> > >>> 2. EFI makes sure the hardware wd gets configured with the highest 
> > >>> allowed
> > >>> value.  The efi-stub doesn't have any driver to refresh the wd, so 
> > >>> we
> > >>> will again rely on the wd driver coming up and refreshing the 
> > >>> timers.
> > >>
> > >> You cannot stop the hardware watchdog, period. I think in the previous
> > >> thread about this it was noted that some hardware watchdogs cannot be
> > >> disabled, it's not function that the watchdog supports. Someone needs to
> > >> go and talk with the UEFI specification people and get this addressed.
> > >> There is no sane path for "disable the hardware watchdog".
> > >>
> > >
> > > Indeed.
> > >
> > > But I think one reasonable thing to do would be to say "ok, the payload
> > > is now ready to assume responsibility, so on the U-Boot side we stop
> > > _petting_ the watchdog(s)" (i.e. nowadays that would mean deregistering
> > > them from the cyclic framework), even if the payload 

Re: [PATCH 1/2] net: dhcp6: Add DHCPv6 (DHCP for IPv6)

[Simon Glass]

Hi,

On Wed, 1 Feb 2023 at 17:26,  wrote:
>
> From: Sean Edmond 
>
> Adds DHCPv6 protocol to u-boot.
>
> Allows for address assignement with DHCPv6 4-message exchange
> (SOLICIT->ADVERTISE->REQUEST->REPLY).  Includes DHCPv6 options
> required by RFC 8415.  Also adds DHCPv6 options required
> for PXE boot.
>
> New configs added:
> - CMD_DHCP6
> - DHCP6_PXE_CLIENTARCH
> - DHCP6_PXE_DHCP_OPTION
> - DHCP6_ENTERPRISE_ID
>
> Possible enhancements:
> - Duplicate address detection on DHCPv6 assigned address
> - IPv6 address assignement through SLAAC
> - Sending/parsing other DHCPv6 options (NTP, DNS, etc...)
>
> Signed-off-by: Sean Edmond 
> ---
>  cmd/Kconfig   |  26 ++
>  include/net.h |   8 +-
>  net/Makefile  |   1 +
>  net/dhcpv6.c  | 741 ++
>  net/dhcpv6.h  | 212 +++
>  net/net.c |  12 +
>  6 files changed, 998 insertions(+), 2 deletions(-)
>  create mode 100644 net/dhcpv6.c
>  create mode 100644 net/dhcpv6.h

Can you write a sandbox test for this? See test/dm/eth.c

Regards,
Simon

[PATCH v5 2/6] tpm: Support boot measurements

[Eddie James]

Add TPM2 functions to support boot measurement. This includes
starting up the TPM, initializing/appending the event log, and
measuring the U-Boot version. Much of the code was used in the
EFI subsystem, so remove it there and use the common functions.

Signed-off-by: Eddie James 
---
Changes since v4:
 - Remove tcg2_measure_event function and check for NULL data in
   tcg2_measure_data
 - Use tpm_auto_startup
 - Fix efi_tcg2.c compilation for removing tcg2_pcr_read function

Changes since v3:
 - Reordered headers
 - Refactored more of EFI code into common code
Removed digest_info structure and instead used the common alg_to_mask
  and alg_to_len
Improved event log parsing in common code to get it equivalent to EFI
  Common code now extends PCR if previous bootloader stage couldn't
  No need to allocate memory in the common code, so EFI copies the
  discovered buffer like it did before
Rename efi measure_event function

Changes since v1:
 - Refactor TPM layer functions to allow EFI system to use them, and
   remove duplicate EFI functions.

 include/efi_tcg2.h|   44 --
 include/tpm-v2.h  |  242 +
 lib/efi_loader/efi_tcg2.c | 1010 +++--
 lib/tpm-v2.c  |  771 
 4 files changed, 1087 insertions(+), 980 deletions(-)

diff --git a/include/efi_tcg2.h b/include/efi_tcg2.h
index 874306dc11..23016773f4 100644
--- a/include/efi_tcg2.h
+++ b/include/efi_tcg2.h
@@ -129,50 +129,6 @@ struct efi_tcg2_boot_service_capability {
 #define BOOT_SERVICE_CAPABILITY_MIN \
offsetof(struct efi_tcg2_boot_service_capability, number_of_pcr_banks)
 
-#define TCG_EFI_SPEC_ID_EVENT_SIGNATURE_03 "Spec ID Event03"
-#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MAJOR_TPM2 2
-#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MINOR_TPM2 0
-#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_ERRATA_TPM2 2
-
-/**
- *  struct TCG_EfiSpecIdEventAlgorithmSize - hashing algorithm information
- *
- *  @algorithm_id: algorithm defined in enum tpm2_algorithms
- *  @digest_size:  size of the algorithm
- */
-struct tcg_efi_spec_id_event_algorithm_size {
-   u16  algorithm_id;
-   u16  digest_size;
-} __packed;
-
-/**
- * struct TCG_EfiSpecIDEventStruct - content of the event log header
- *
- * @signature: signature, set to Spec ID Event03
- * @platform_class:class defined in TCG ACPI Specification
- * Client  Common Header.
- * @spec_version_minor:minor version
- * @spec_version_major:major version
- * @spec_version_errata:   major version
- * @uintn_size:size of the efi_uintn_t fields used in 
various
- * data structures used in this specification.
- * 0x01 indicates u32  and 0x02  indicates u64
- * @number_of_algorithms:  hashing algorithms used in this event log
- * @digest_sizes:  array of number_of_algorithms pairs
- * 1st member defines the algorithm id
- * 2nd member defines the algorithm size
- */
-struct tcg_efi_spec_id_event {
-   u8 signature[16];
-   u32 platform_class;
-   u8 spec_version_minor;
-   u8 spec_version_major;
-   u8 spec_errata;
-   u8 uintn_size;
-   u32 number_of_algorithms;
-   struct tcg_efi_spec_id_event_algorithm_size digest_sizes[];
-} __packed;
-
 /**
  * struct tdEFI_TCG2_FINAL_EVENTS_TABLE - log entries after Get Event Log
  * @version:   version number for this structure
diff --git a/include/tpm-v2.h b/include/tpm-v2.h
index 84034c1559..3a4227249b 100644
--- a/include/tpm-v2.h
+++ b/include/tpm-v2.h
@@ -214,6 +214,50 @@ struct tcg_pcr_event2 {
u8 event[];
 } __packed;
 
+/**
+ *  struct TCG_EfiSpecIdEventAlgorithmSize - hashing algorithm information
+ *
+ *  @algorithm_id: algorithm defined in enum tpm2_algorithms
+ *  @digest_size:  size of the algorithm
+ */
+struct tcg_efi_spec_id_event_algorithm_size {
+   u16  algorithm_id;
+   u16  digest_size;
+} __packed;
+
+#define TCG_EFI_SPEC_ID_EVENT_SIGNATURE_03 "Spec ID Event03"
+#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MAJOR_TPM2 2
+#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MINOR_TPM2 0
+#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_ERRATA_TPM2 2
+
+/**
+ * struct TCG_EfiSpecIDEventStruct - content of the event log header
+ *
+ * @signature: signature, set to Spec ID Event03
+ * @platform_class:class defined in TCG ACPI Specification
+ * Client  Common Header.
+ * @spec_version_minor:minor version
+ * @spec_version_major:major version
+ * @spec_version_errata:   major version
+ * @uintn_size:size of the efi_uintn_t fields used in 
various
+ * data structures used in this 

[PATCH v5 6/6] doc: Add measured boot documentation

[Eddie James]

Briefly describe the feature and specify the requirements.

Signed-off-by: Eddie James 
---
Changes since v4:
 - Use bullets for the requirements list

 doc/usage/index.rst |  1 +
 doc/usage/measured_boot.rst | 23 +++
 2 files changed, 24 insertions(+)
 create mode 100644 doc/usage/measured_boot.rst

diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index 3804046835..371ab8179f 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -12,6 +12,7 @@ Use U-Boot
partitions
cmdline
semihosting
+   measured_boot
 
 Shell commands
 --
diff --git a/doc/usage/measured_boot.rst b/doc/usage/measured_boot.rst
new file mode 100644
index 00..8357b1f480
--- /dev/null
+++ b/doc/usage/measured_boot.rst
@@ -0,0 +1,23 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Measured Boot
+=
+
+U-Boot can perform a measured boot, the process of hashing various components
+of the boot process, extending the results in the TPM and logging the
+component's measurement in memory for the operating system to consume.
+
+Requirements
+-
+
+* A hardware TPM 2.0 supported by the U-Boot drivers
+* CONFIG_TPM=y
+* CONFIG_MEASURED_BOOT=y
+* Device-tree configuration of the TPM device to specify the memory area
+  for event logging. The TPM device node must either contain a phandle to
+  a reserved memory region or "linux,sml-base" and "linux,sml-size"
+  indicating the address and size of the memory region. An example can be
+  found in arch/sandbox/dts/test.dts
+* The operating system must also be configured to use the memory regions
+  specified in the U-Boot device-tree in order to make use of the event
+  log.
-- 
2.31.1

[PATCH v5 5/6] test: Add sandbox TPM boot measurement

[Eddie James]

Use the sandbox TPM driver to measure some boot images in a unit
test case.

Signed-off-by: Eddie James 
Reviewed-by: Simon Glass 
---
Changes since v4:
 - Drop u8 casting in measurement test

Changes since v2:
 - Changed reserved memory address to the top of the RAM for sandbox dts.

 arch/sandbox/dts/sandbox.dtsi | 14 
 arch/sandbox/dts/test.dts | 13 +++
 configs/sandbox_defconfig |  1 +
 include/test/suites.h |  1 +
 test/boot/Makefile|  1 +
 test/boot/measurement.c   | 66 +++
 test/cmd_ut.c |  2 ++
 7 files changed, 98 insertions(+)
 create mode 100644 test/boot/measurement.c

diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi
index 18bf1cb5b6..3f0e192a83 100644
--- a/arch/sandbox/dts/sandbox.dtsi
+++ b/arch/sandbox/dts/sandbox.dtsi
@@ -4,9 +4,22 @@
  * and sandbox64 builds.
  */
 
+#include 
+
 #define USB_CLASS_HUB  9
 
 / {
+   reserved-memory {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   event_log: tcg_event_log {
+   no-map;
+   reg = <(CFG_SYS_SDRAM_SIZE - 0x2000) 0x2000>;
+   };
+   };
+
binman {
};
 
@@ -332,6 +345,7 @@
 
tpm2 {
compatible = "sandbox,tpm2";
+   memory-region = <_log>;
};
 
triangle {
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 8c05927670..fa3f42a7b1 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -9,6 +9,7 @@
 
 /dts-v1/;
 
+#include 
 #include 
 #include 
 #include 
@@ -66,6 +67,17 @@
osd0 = "/osd";
};
 
+   reserved-memory {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   event_log: tcg_event_log {
+   no-map;
+   reg = <(CFG_SYS_SDRAM_SIZE - 0x2000) 0x2000>;
+   };
+   };
+
binman: binman {
};
 
@@ -1345,6 +1357,7 @@
 
tpm2 {
compatible = "sandbox,tpm2";
+   memory-region = <_log>;
};
 
uart0: serial {
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 34c342b6f5..9c4985adcf 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -337,3 +337,4 @@ CONFIG_TEST_FDTDEC=y
 CONFIG_UNIT_TEST=y
 CONFIG_UT_TIME=y
 CONFIG_UT_DM=y
+CONFIG_MEASURED_BOOT=y
diff --git a/include/test/suites.h b/include/test/suites.h
index 9ce49cbb03..4c284bbeaa 100644
--- a/include/test/suites.h
+++ b/include/test/suites.h
@@ -44,6 +44,7 @@ int do_ut_font(struct cmd_tbl *cmdtp, int flag, int argc, 
char *const argv[]);
 int do_ut_lib(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_loadm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_log(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]);
+int do_ut_measurement(struct cmd_tbl *cmdtp, int flag, int argc, char * const 
argv[]);
 int do_ut_mem(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_overlay(struct cmd_tbl *cmdtp, int flag, int argc,
diff --git a/test/boot/Makefile b/test/boot/Makefile
index 22ed61c8fa..2dbb032a7e 100644
--- a/test/boot/Makefile
+++ b/test/boot/Makefile
@@ -4,6 +4,7 @@
 
 obj-$(CONFIG_BOOTSTD) += bootdev.o bootstd_common.o bootflow.o bootmeth.o
 obj-$(CONFIG_FIT) += image.o
+obj-$(CONFIG_MEASURED_BOOT) += measurement.o
 
 obj-$(CONFIG_EXPO) += expo.o
 
diff --git a/test/boot/measurement.c b/test/boot/measurement.c
new file mode 100644
index 00..9db2ed324c
--- /dev/null
+++ b/test/boot/measurement.c
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Test for measured boot functions
+ *
+ * Copyright 2023 IBM Corp.
+ * Written by Eddie James 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define MEASUREMENT_TEST(_name, _flags)\
+   UNIT_TEST(_name, _flags, measurement_test)
+
+static int measure(struct unit_test_state *uts)
+{
+   struct bootm_headers images;
+   const size_t size = 1024;
+   u8 *kernel;
+   u8 *initrd;
+   size_t i;
+
+   kernel = malloc(size);
+   initrd = malloc(size);
+
+   images.os.image_start = map_to_sysmem(kernel);
+   images.os.image_len = size;
+
+   images.rd_start = map_to_sysmem(initrd);
+   images.rd_end = images.rd_start + size;
+
+   images.ft_addr = malloc(size);
+   images.ft_len = size;
+
+   env_set("bootargs", "measurement testing");
+
+   for (i = 0; i < size; ++i) {
+   kernel[i] = 0xf0 | (i & 0xf);
+   initrd[i] = (i & 0xf0) | 0xf;
+   images.ft_addr[i] = i & 0xff;
+   }
+
+   ut_assertok(bootm_measure());
+
+   

[PATCH v5 0/6] tpm: Support boot measurements

[Eddie James]

This series adds support for measuring the boot images more generically
than the existing EFI support. Several EFI functions have been moved to
the TPM layer. The series includes optional measurement from the bootm 
command.
A new test case has been added for the bootm measurement to test the new
path, and the sandbox TPM2 driver has been updated to support this use
case.
This series is based on Ilias' auto-startup series:
https://lore.kernel.org/u-boot/20230126081844.591148-1-ilias.apalodi...@linaro.org/

Changes since v4:
 - Remove tcg2_measure_event function and check for NULL data in
   tcg2_measure_data
 - Use tpm_auto_startup
 - Fix efi_tcg2.c compilation for removing tcg2_pcr_read function
 - Change PCR indexes for initrd and dtb
 - Drop u8 casting in measurement test
 - Use bullets in documentation

Changes since v3:
 - Reordered headers
 - Refactored more of EFI code into common code
Removed digest_info structure and instead used the common alg_to_mask
  and alg_to_len
Improved event log parsing in common code to get it equivalent to EFI
  Common code now extends PCR if previous bootloader stage couldn't
  No need to allocate memory in the common code, so EFI copies the
  discovered buffer like it did before
Rename efi measure_event function

Changes since v2:
 - Add documentation.
 - Changed reserved memory address to the top of the RAM for sandbox dts.
 - Add measure state to booti and bootz.
 - Skip measurement for EFI images that should be measured

Changes since v1:
 - Refactor TPM layer functions to allow EFI system to use them, and
   remove duplicate EFI functions.
 - Add test case
 - Drop #ifdefs for bootm
 - Add devicetree measurement config option
 - Update sandbox TPM driver

Eddie James (6):
  tpm: Fix spelling for tpmu_ha union
  tpm: Support boot measurements
  bootm: Support boot measurement
  tpm: sandbox: Update for needed TPM2 capabilities
  test: Add sandbox TPM boot measurement
  doc: Add measured boot documentation

 arch/sandbox/dts/sandbox.dtsi  |   14 +
 arch/sandbox/dts/test.dts  |   13 +
 boot/Kconfig   |   23 +
 boot/bootm.c   |   70 +++
 cmd/booti.c|1 +
 cmd/bootm.c|2 +
 cmd/bootz.c|1 +
 configs/sandbox_defconfig  |1 +
 doc/usage/index.rst|1 +
 doc/usage/measured_boot.rst|   23 +
 drivers/tpm/tpm2_tis_sandbox.c |  100 +++-
 include/bootm.h|2 +
 include/efi_tcg2.h |   44 --
 include/image.h|1 +
 include/test/suites.h  |1 +
 include/tpm-v2.h   |  246 +++-
 lib/efi_loader/efi_tcg2.c  | 1010 +++-
 lib/tpm-v2.c   |  771 
 test/boot/Makefile |1 +
 test/boot/measurement.c|   66 +++
 test/cmd_ut.c  |2 +
 21 files changed, 1383 insertions(+), 1010 deletions(-)
 create mode 100644 doc/usage/measured_boot.rst
 create mode 100644 test/boot/measurement.c

-- 
2.31.1

[PATCH v5 4/6] tpm: sandbox: Update for needed TPM2 capabilities

[Eddie James]

The driver needs to support getting the PCRs in the capabilities
command. Fix various other things and support the max number
of PCRs for TPM2.

Signed-off-by: Eddie James 
Reviewed-by: Simon Glass 
Acked-by: Ilias Apalodimas 
---
 drivers/tpm/tpm2_tis_sandbox.c | 100 -
 1 file changed, 72 insertions(+), 28 deletions(-)

diff --git a/drivers/tpm/tpm2_tis_sandbox.c b/drivers/tpm/tpm2_tis_sandbox.c
index dd94bdc31f..ea7fb5e3cb 100644
--- a/drivers/tpm/tpm2_tis_sandbox.c
+++ b/drivers/tpm/tpm2_tis_sandbox.c
@@ -22,11 +22,6 @@ enum tpm2_hierarchy {
TPM2_HIERARCHY_NB,
 };
 
-/* Subset of supported capabilities */
-enum tpm2_capability {
-   TPM_CAP_TPM_PROPERTIES = 0x6,
-};
-
 /* Subset of supported properties */
 #define TPM2_PROPERTIES_OFFSET 0x020E
 
@@ -38,7 +33,8 @@ enum tpm2_cap_tpm_property {
TPM2_PROPERTY_NB,
 };
 
-#define SANDBOX_TPM_PCR_NB 1
+#define SANDBOX_TPM_PCR_NB TPM2_MAX_PCRS
+#define SANDBOX_TPM_PCR_SELECT_MAX ((SANDBOX_TPM_PCR_NB + 7) / 8)
 
 /*
  * Information about our TPM emulation. This is preserved in the sandbox
@@ -433,7 +429,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 
*sendbuf,
int i, j;
 
/* TPM2_GetProperty */
-   u32 capability, property, property_count;
+   u32 capability, property, property_count, val;
 
/* TPM2_PCR_Read/Extend variables */
int pcr_index = 0;
@@ -542,19 +538,32 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const 
u8 *sendbuf,
case TPM2_CC_GET_CAPABILITY:
capability = get_unaligned_be32(sent);
sent += sizeof(capability);
-   if (capability != TPM_CAP_TPM_PROPERTIES) {
-   printf("Sandbox TPM only support TPM_CAPABILITIES\n");
-   return TPM2_RC_HANDLE;
-   }
-
property = get_unaligned_be32(sent);
sent += sizeof(property);
-   property -= TPM2_PROPERTIES_OFFSET;
-
property_count = get_unaligned_be32(sent);
sent += sizeof(property_count);
-   if (!property_count ||
-   property + property_count > TPM2_PROPERTY_NB) {
+
+   switch (capability) {
+   case TPM2_CAP_PCRS:
+   break;
+   case TPM2_CAP_TPM_PROPERTIES:
+   if (!property_count) {
+   rc = TPM2_RC_HANDLE;
+   return sandbox_tpm2_fill_buf(recv, recv_len,
+tag, rc);
+   }
+
+   if (property > TPM2_PROPERTIES_OFFSET &&
+   ((property - TPM2_PROPERTIES_OFFSET) +
+property_count > TPM2_PROPERTY_NB)) {
+   rc = TPM2_RC_HANDLE;
+   return sandbox_tpm2_fill_buf(recv, recv_len,
+tag, rc);
+   }
+   break;
+   default:
+   printf("Sandbox TPM2 only supports TPM2_CAP_PCRS or "
+  "TPM2_CAP_TPM_PROPERTIES\n");
rc = TPM2_RC_HANDLE;
return sandbox_tpm2_fill_buf(recv, recv_len, tag, rc);
}
@@ -578,18 +587,53 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const 
u8 *sendbuf,
put_unaligned_be32(capability, recv);
recv += sizeof(capability);
 
-   /* Give the number of properties that follow */
-   put_unaligned_be32(property_count, recv);
-   recv += sizeof(property_count);
-
-   /* Fill with the properties */
-   for (i = 0; i < property_count; i++) {
-   put_unaligned_be32(TPM2_PROPERTIES_OFFSET + property +
-  i, recv);
-   recv += sizeof(property);
-   put_unaligned_be32(tpm->properties[property + i],
-  recv);
-   recv += sizeof(property);
+   switch (capability) {
+   case TPM2_CAP_PCRS:
+   /* Give the number of algorithms supported - just 
SHA256 */
+   put_unaligned_be32(1, recv);
+   recv += sizeof(u32);
+
+   /* Give SHA256 algorithm */
+   put_unaligned_be16(TPM2_ALG_SHA256, recv);
+   recv += sizeof(u16);
+
+   /* Select the PCRs supported */
+   *recv = SANDBOX_TPM_PCR_SELECT_MAX;
+   recv++;
+
+   /* Activate all the PCR bits */
+   for (i = 0; i < SANDBOX_TPM_PCR_SELECT_MAX; ++i) {
+   *recv = 0xff;
+  

[PATCH v5 3/6] bootm: Support boot measurement

[Eddie James]

Add a configuration option to measure the boot through the bootm
function. Add the measurement state to the booti and bootz paths
as well.

Signed-off-by: Eddie James 
---
Changes since v4:
 - Change PCR indexes for initrd and dtb

Changes since v2:
 - Add measure state to booti and bootz.
 - Skip measurement for EFI images that should be measured

Changes since v1:
 - Drop #ifdefs for bootm

 boot/Kconfig| 23 
 boot/bootm.c| 70 +
 cmd/booti.c |  1 +
 cmd/bootm.c |  2 ++
 cmd/bootz.c |  1 +
 include/bootm.h |  2 ++
 include/image.h |  1 +
 7 files changed, 100 insertions(+)

diff --git a/boot/Kconfig b/boot/Kconfig
index fdcfbae7b2..831b9e954c 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -601,6 +601,29 @@ config LEGACY_IMAGE_FORMAT
  loaded. If a board needs the legacy image format support in this
  case, enable it here.
 
+config MEASURED_BOOT
+   bool "Measure boot images and configuration to TPM and event log"
+   depends on HASH && TPM_V2
+   help
+ This option enables measurement of the boot process. Measurement
+ involves creating cryptographic hashes of the binary images that
+ are booting and storing them in the TPM. In addition, a log of
+ these hashes is stored in memory for the OS to verify the booted
+ images and configuration. Enable this if the OS has configured
+ some memory area for the event log and you intend to use some
+ attestation tools on your system.
+
+if MEASURED_BOOT
+   config MEASURE_DEVICETREE
+   bool "Measure the devicetree image"
+   default y if MEASURED_BOOT
+   help
+ On some platforms, the devicetree is not static as it may contain
+ random MAC addresses or other such data that changes each boot.
+ Therefore, it should not be measured into the TPM. In that case,
+ disable the measurement here.
+endif # MEASURED_BOOT
+
 config SUPPORT_RAW_INITRD
bool "Enable raw initrd images"
help
diff --git a/boot/bootm.c b/boot/bootm.c
index 15fce8ad95..d2947b446c 100644
--- a/boot/bootm.c
+++ b/boot/bootm.c
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #if defined(CONFIG_CMD_USB)
 #include 
 #endif
@@ -659,6 +660,72 @@ int bootm_process_cmdline_env(int flags)
return 0;
 }
 
+int bootm_measure(struct bootm_headers *images)
+{
+   int ret = 0;
+
+   /* Skip measurement if EFI is going to do it */
+   if (images->os.os == IH_OS_EFI &&
+   IS_ENABLED(CONFIG_EFI_TCG2_PROTOCOL) &&
+   IS_ENABLED(CONFIG_BOOTM_EFI))
+   return ret;
+
+   if (IS_ENABLED(CONFIG_MEASURED_BOOT)) {
+   struct tcg2_event_log elog;
+   struct udevice *dev;
+   void *initrd_buf;
+   void *image_buf;
+   const char *s;
+   u32 rd_len;
+
+   ret = tcg2_measurement_init(, );
+   if (ret)
+   return ret;
+
+   image_buf = map_sysmem(images->os.image_start,
+  images->os.image_len);
+   ret = tcg2_measure_data(dev, , 8, images->os.image_len,
+   image_buf, EV_COMPACT_HASH,
+   strlen("linux") + 1, (u8 *)"linux");
+   if (ret)
+   goto unmap_image;
+
+   rd_len = images->rd_end - images->rd_start;
+   initrd_buf = map_sysmem(images->rd_start, rd_len);
+   ret = tcg2_measure_data(dev, , 9, rd_len, initrd_buf,
+   EV_COMPACT_HASH, strlen("initrd") + 1,
+   (u8 *)"initrd");
+   if (ret)
+   goto unmap_initrd;
+
+   if (IS_ENABLED(CONFIG_MEASURE_DEVICETREE)) {
+   ret = tcg2_measure_data(dev, , 0, images->ft_len,
+   (u8 *)images->ft_addr,
+   EV_TABLE_OF_DEVICES,
+   strlen("dts") + 1,
+   (u8 *)"dts");
+   if (ret)
+   goto unmap_initrd;
+   }
+
+   s = env_get("bootargs");
+   if (!s)
+   s = "";
+   ret = tcg2_measure_data(dev, , 1, strlen(s) + 1, (u8 *)s,
+   EV_PLATFORM_CONFIG_FLAGS,
+   strlen(s) + 1, (u8 *)s);
+
+unmap_initrd:
+   unmap_sysmem(initrd_buf);
+
+unmap_image:
+   unmap_sysmem(image_buf);
+   tcg2_measurement_term(dev, , ret != 0);
+   }
+
+   return ret;
+}
+
 /**
  * Execute selected states of the bootm command.
  *
@@ -710,6 +777,9 @@ int do_bootm_states(struct 

[PATCH v5 1/6] tpm: Fix spelling for tpmu_ha union

[Eddie James]

tmpu -> tpmu

Signed-off-by: Eddie James 
Reviewed-by: Ilias Apalodimas 
---
 include/tpm-v2.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/tpm-v2.h b/include/tpm-v2.h
index 1c644f0048..84034c1559 100644
--- a/include/tpm-v2.h
+++ b/include/tpm-v2.h
@@ -167,7 +167,7 @@ struct tcg_pcr_event {
 /**
  * Definition of TPMU_HA Union
  */
-union tmpu_ha {
+union tpmu_ha {
u8 sha1[TPM2_SHA1_DIGEST_SIZE];
u8 sha256[TPM2_SHA256_DIGEST_SIZE];
u8 sm3_256[TPM2_SM3_256_DIGEST_SIZE];
@@ -183,7 +183,7 @@ union tmpu_ha {
  */
 struct tpmt_ha {
u16 hash_alg;
-   union tmpu_ha digest;
+   union tpmu_ha digest;
 } __packed;
 
 /**
-- 
2.31.1

Re: [PATCH v4 2/6] tpm: Support boot measurements

[Eddie James]

On 1/26/23 01:51, Ilias Apalodimas wrote:

Hi Eddie,

Thanks for the cleanup! Unfortunately this doesn't compile with EFI
selected, but in general it looks pretty good.



Thanks, yes I forgot to remove tcg2_pcr_read




On Wed, Jan 25, 2023 at 11:18:06AM -0600, Eddie James wrote:

Add TPM2 functions to support boot measurement. This includes
starting up the TPM, initializing/appending the event log, and
measuring the U-Boot version. Much of the code was used in the
EFI subsystem, so remove it there and use the common functions.

Signed-off-by: Eddie James 
---
  include/efi_tcg2.h|  44 --
  include/tpm-v2.h  | 254 ++
  lib/efi_loader/efi_tcg2.c | 975 +++---
  lib/tpm-v2.c  | 799 +++
  4 files changed, 1129 insertions(+), 943 deletions(-)

HR_NV_INDEX = TPM_HT_NV_INDEX << HR_SHIFT,
  };


[...]


}

+}
+
+int tcg2_measure_data(struct udevice *dev, struct tcg2_event_log *elog,
+ u32 pcr_index, u32 size, const u8 *data, u32 event_type,
+ u32 event_size, const u8 *event)
+{
+   struct tpml_digest_values digest_list;
+   int rc;
+
+   rc = tcg2_create_digest(dev, data, size, _list);
+   if (rc)
+   return rc;
+
+   rc = tcg2_pcr_extend(dev, pcr_index, _list);
+   if (rc)
+   return rc;
+
+   return tcg2_log_append_check(elog, pcr_index, event_type, _list,
+event_size, event);
+}
+
+int tcg2_measure_event(struct udevice *dev, struct tcg2_event_log *elog,
+  u32 pcr_index, u32 event_type, u32 size,
+  const u8 *event)
+{
+   struct tpml_digest_values digest_list;
+   int rc;
+
+   rc = tcg2_create_digest(dev, event, size, _list);
+   if (rc)
+   return rc;
+
+   rc = tcg2_pcr_extend(dev, pcr_index, _list);
+   if (rc)
+   return rc;
+
+   return tcg2_log_append_check(elog, pcr_index, event_type, _list,
+size, event);
+}

The only difference between these 2 is the measured data.  Can't we make
one function?  If data = NULL we could just measure the event



Ok, yes that should work. I'll probably add a macro for 
tcg2_measure_event that fills in NULL and 0 for data and size for 
convenience.






+
+int tcg2_init_log(struct udevice *dev, struct tcg2_event_log *elog)
+{
+   int rc;
+
+   rc = tcg2_platform_get_log(dev, (void **)>log, >log_size);
+   if (rc)
+   return rc;
+
+   elog->log_position = 0;
+   elog->found = false;
+   rc = tcg2_log_parse(dev, elog);
+   if (rc)
+   return rc;
+
+   if (!elog->found) {
+   rc = tcg2_log_init(dev, elog);
+   if (rc)
+   return rc;

You can get rid of this if and just return rc on the function



Ack.





+   }
+
+   return 0;
+}
+
+int tcg2_measurement_init(struct udevice **dev, struct tcg2_event_log *elog)
+{
+   int rc;
+
+   rc = tcg2_platform_get_tpm2(dev);
+   if (rc)
+   return rc;
+
+   rc = tpm_init(*dev);
+   if (rc)
+   return rc;
+
+   rc = tpm2_startup(*dev, TPM2_SU_CLEAR);
+   if (rc) {
+   tcg2_platform_startup_error(*dev, rc);
+   return rc;
+   }
+
+   rc = tpm2_self_test(*dev, TPMI_YES);
+   if (rc)
+   printf("%s: self test error, continuing.\n", __func__);

This is the correct init sequence of the TPM.  I was trying to solve
something similar a few days ago [0].  I haven't merged that patch yet,
but I will send a new version that also calls tpm_init() and doesn't exit
on -EBUSY.  Can you use that patch instead of open coding the init
sequence?



Yes I'd be happy to use it. I'll just base my series on yours.



Also we should be bailing out on selftest errors?'



Maybe so, yes. Whatever behavior your auto startup function implements 
will be fine, I'm sure.





The problem here is that with U-Boot's lazy binding we might need to init
the TPM in other subsystems and at the very least we can have a function
doing that for us reliably.


+
+   rc = tcg2_init_log(*dev, elog);
+   if (rc) {
+   tcg2_measurement_term(*dev, elog, true);
+   return rc;
+   }
+
+   rc = tcg2_measure_event(*dev, elog, 0, EV_S_CRTM_VERSION,
+   strlen(version_string) + 1,
+   (u8 *)version_string);
+   if (rc) {
+   tcg2_measurement_term(*dev, elog, true);
+   return rc;
+   }
+
+   return 0;
+}
+
+void tcg2_measurement_term(struct udevice *dev, struct tcg2_event_log *elog,
+  bool error)
+{
+   u32 event = error ? 0x1 : 0x;
+   int i;
+
+   for (i = 0; i < 8; ++i)
+   tcg2_measure_event(dev, elog, i, 

Re: [PATCH 1/1] README: remove 'U-Boot Porting Guide' section

[Tom Rini]

On Wed, Feb 01, 2023 at 01:20:52PM -0700, Simon Glass wrote:
> Hi Heinrich,
> 
> On Sun, 29 Jan 2023 at 15:37, Heinrich Schuchardt
>  wrote:
> >
> >
> >
> > On 1/28/23 23:01, Simon Glass wrote:
> > > Hi Heinrich,
> > >
> > > On Thu, 26 Jan 2023 at 02:17, Heinrich Schuchardt
> > >  wrote:
> > >>
> > >> On 1/26/23 00:49, Simon Glass wrote:
> > >>> Hi Heinrich,
> > >>>
> > >>> On Wed, 25 Jan 2023 at 12:00, Heinrich Schuchardt
> > >>>  wrote:
> > 
> >  This section does not match the standards of our documentation.
> > 
> >  Signed-off-by: Heinrich Schuchardt 
> >  ---
> > README | 74 
> >  --
> > 1 file changed, 74 deletions(-)
> > 
> > >>>
> > >>> It seems fairly accurate to me, and includes some good advice.
> > >>>
> > >>> Regards,
> > >>> Simon
> > >>
> > >> * That section tries to look funny. U-Boot is serious stuff.
> > >
> > > Some people do have a sense of humour...but in any case it might be
> > > better to reword it to meet your standards, rather than delete it?
> > >
> > >> * The information is outdated. BDI3000 is not on sale,
> > >> https://www.denx.de/wiki/bin/view/DULG/Manual is no longer maintained.
> > >> * It contains advice that we would prefer not to give like
> > >> email("Hi, I am new to U-Boot, how do I get started?")
> > >> * It is incomplete. You cannot introduce a new board without defconfig.
> > >>
> > >> An introduction chapter for new developers in doc/develop/ would be 
> > >> helpful.
> > >
> > > OK, so how about updating it, then? Having nothing at all seems bad to me.
> >
> > As Tom wrote README should be minimal and point to the HTML
> > documentation. So nothing to update here. Are you able to provide a
> > chapter on porting boards?
> 
> I was hoping you might, since you are wanting to remove what is there,
> which I think is better than nothing.

Having re-read the section that was removed, I agree with Heinrich here.
What was written 20 years ago, and still correct was too vague to be
useful.  Someone, anyone, writing something to put under doc/develop/
would be appreciated all the same.

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH] drivers: usb: host: Fix the write to W1C fields in HPRT register

[Marek Vasut]

On 2/2/23 02:14, teik.heng.ch...@intel.com wrote:

The subject tags are 'usb: dwc2:' .


diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 23060fc369..9818f9be94 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -315,9 +315,7 @@ static void dwc_otg_core_host_init(struct udevice *dev,
  
  	/* Turn on the vbus power. */

if (readl(>gintsts) & DWC2_GINTSTS_CURMODE_HOST) {
-   hprt0 = readl(>hprt0);
-   hprt0 &= ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET);
-   hprt0 &= ~(DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG);
+   hprt0 = readl(>hprt0) & ~DWC2_HPRT0_W1C_MASK;
if (!(hprt0 & DWC2_HPRT0_PRTPWR)) {
hprt0 |= DWC2_HPRT0_PRTPWR;
writel(hprt0, >hprt0);
@@ -748,7 +746,7 @@ static int dwc_otg_submit_rh_msg_out(struct dwc2_priv *priv,
case (USB_REQ_CLEAR_FEATURE << 8) | USB_RECIP_OTHER | USB_TYPE_CLASS:
switch (wValue) {
case USB_PORT_FEAT_C_CONNECTION:
-   setbits_le32(>hprt0, DWC2_HPRT0_PRTCONNDET);
+   clrsetbits_le32(>hprt0, DWC2_HPRT0_W1C_MASK, 
DWC2_HPRT0_PRTCONNDET);
break;
}
break;
@@ -759,21 +757,13 @@ static int dwc_otg_submit_rh_msg_out(struct dwc2_priv 
*priv,
break;
  
  		case USB_PORT_FEAT_RESET:

-   clrsetbits_le32(>hprt0, DWC2_HPRT0_PRTENA |
-   DWC2_HPRT0_PRTCONNDET |
-   DWC2_HPRT0_PRTENCHNG |
-   DWC2_HPRT0_PRTOVRCURRCHNG,
-   DWC2_HPRT0_PRTRST);
+   clrsetbits_le32(>hprt0, DWC2_HPRT0_W1C_MASK, 
DWC2_HPRT0_PRTRST);


The code above used to be clearing the W1C (write 1 to clear) bits , 
while the changed code is no longer clearing those bits. Is that correct ?


[...]

Re: [PATCH] RFC: nvedit: support doing one (extra) expansion of the value in "env set"

[Rasmus Villemoes]

On 14/02/2020 12.54, Rasmus Villemoes wrote:
> 
> Assume BOOT_ORDER contains some permutation of "A B C", and for each
> letter x, there's a BOOT_x_LEFT counter telling how many boot attempts
> that slot has left. Now I want to find the first x in $BOOT_ORDER for
> which $BOOT_x_LEFT is positive. If all BOOT_x_LEFT are 0, say I want the
> sentinel value 'none'.
> 
> So in bash, that might be written
> 
> slot=none
> for x in $BOOT_ORDER ; do
>   eval "left=\${BOOT_${x}_LEFT}"
>   if [ $left -gt 0 ] ; then
> slot=$x
> break
>   fi
> done
> 
> Now we can work around the lack of break in the [U-Boot] shell by writing
> the loop so that the main body is skipped if we've found a valid slot:
> 
> slot=none
> for x in $BOOT_ORDER ; do
>   if [ $slot != 'none' ] ; then
> true
>   else
> eval "left=\${BOOT_${x}_LEFT}"
> if [ $left -gt 0 ] ; then
>   slot=$x
> fi
>   fi
> done
> 
> But we still can't translate this to [U-Boot] shell, because there's no
> eval. Now, I can do this with a hypothetical "env get" command which I
> just implemented to test that it works, and then the above becomes
> 
> env set slot none;
> for x in $BOOT_ORDER ; do
>   if test $slot != 'none' ; then
> true ;
>   else
> env get left BOOT_${x}_LEFT ; # magic
> if test $left -gt 0 ; then
>   env set slot $x ;
> fi;
>   fi;
> done;

For the benefit of people stumbling on this thread in the future, that
#magic line is actually possible as of v2022.07 and is called "env
indirect", guarded by CONFIG_CMD_NVEDIT_INDIRECT .

Rasmus

Re: [PATCH V4 01/14] env: Complete generic support for writable list

[Marek Vasut]

On 2/2/23 14:51, Jan Kiszka wrote:

On 02.02.23 13:48, Marek Vasut wrote:

On 2/2/23 09:07, Jan Kiszka wrote:

From: Jan Kiszka 

This completes what 890feecaab72 started by selecting ENV_APPEND and
loading the default env before any other sources. This ensures that load
operations pick up all non-writable vars from the default env and only
permitted parts from other locations according to the regular
priorities.

With this change, boards only need to define the list of writable
variables but no longer have to provide a custom env_get_location
implementation.

CC: Joe Hershberger 
CC: Marek Vasut 
CC: Stefan Herbrechtsmeier 
Signed-off-by: Jan Kiszka 
Reviewed-by: Marek Vasut 


Maybe just send this one as a separate patch, so it can go in separately
from this series.


In fact, patch 1 and 2 are foundations and could be picked independently
of rest if preferred. I don't mind waiting for the whole but I can also
split if it helps the maintainer(s).


I suspect splitting off the u-boot (env) and other core parts from the 
iot2050 into separate series would make it easier to apply to the right 
tree. Just note down the dependencies in the commit message under --- or 
in cover letter, if there are any.

Re: [PATCH v2] mtd: nand: Mark reserved blocks

[Michal Simek]

On 2/2/23 14:44, Michael Nazzareno Trimarchi wrote:

Hi

Il gio 2 feb 2023, 14:21 Michal Simek > ha scritto:


Hi Dario,

On 1/5/23 10:46, Ashok Reddy Soma wrote:
 > Reserved blocks are used for storing bad block tables. With "nand bad"
 > command, these reserved blocks are shown as bad blocks. This is leading
 > to confusion when compared with Linux bad blocks. Hence, display
 > "bbt reserved" when printing reserved blocks with "nand bad" command.
 >
 > To acheive this, return 2 which represents reserved from nand_isbad_bbt()
 > instead of 1 in case of reserved blocks and catch it in cmd/nand.c.
 >
 > "nand bad" command display's hexadecimal numbers, so add "0x" prefix.
 >
 > Example log will show up as below.
 >
 > ZynqMP> nand bad
 >
 > Device 0 bad blocks:
 >    0x0040
 >    0x1680
 >    0x16c0
 >    0x1700
 >    0x3d80
 >    0x3e40
 >    0xe840
 >    0xff00  (bbt reserved)
 >    0xff40  (bbt reserved)
 >    0xff80  (bbt reserved)
 >    0xffc0  (bbt reserved)
 >    0x11680
 >    0x116c0
 >    0x1ff00         (bbt reserved)
 >    0x1ff40         (bbt reserved)
 >    0x1ff80         (bbt reserved)
 >    0x1ffc0         (bbt reserved)
 >
 > Signed-off-by: Ashok Reddy Soma mailto:ashok.reddy.s...@amd.com>>
 > Reviewed-by: Michael Trimarchi mailto:mich...@amarulasolutions.com>>
 > ---

Are you going to apply this patch?


Applied already


I looked at u-boot-nand-flash git repo and I can't see it.
Where's the repo where this is merged?

Thanks,
Michal

Re: [RFC PATCH 05/16] clk: rockchip: Add rk3588 clk support

[Eugen Hristev]

On 1/26/23 00:27, Jagan Teki wrote:

Add clock driver support for Rockchip RK3588 SoC.

Signed-off-by: Elaine Zhang 
Signed-off-by: Jagan Teki 
---
  drivers/clk/rockchip/Makefile |1 +
  drivers/clk/rockchip/clk_rk3588.c | 2019 +
  2 files changed, 2020 insertions(+)
  create mode 100644 drivers/clk/rockchip/clk_rk3588.c

diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index f719f4e379..9e379cc2e3 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -16,5 +16,6 @@ obj-$(CONFIG_ROCKCHIP_RK3328) += clk_rk3328.o
  obj-$(CONFIG_ROCKCHIP_RK3368) += clk_rk3368.o
  obj-$(CONFIG_ROCKCHIP_RK3399) += clk_rk3399.o
  obj-$(CONFIG_ROCKCHIP_RK3568) += clk_rk3568.o
+obj-$(CONFIG_ROCKCHIP_RK3588) += clk_rk3588.o
  obj-$(CONFIG_ROCKCHIP_RV1108) += clk_rv1108.o
  obj-$(CONFIG_ROCKCHIP_RV1126) += clk_rv1126.o
diff --git a/drivers/clk/rockchip/clk_rk3588.c 
b/drivers/clk/rockchip/clk_rk3588.c
new file mode 100644
index 00..55532b5c2a
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -0,0 +1,2019 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Elaine Zhang 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define DIV_TO_RATE(input_rate, div)   ((input_rate) / ((div) + 1))
+
+static struct rockchip_pll_rate_table rk3588_pll_rates[] = {
+   /* _mhz, _p, _m, _s, _k */
+   RK3588_PLL_RATE(15, 2, 250, 1, 0),
+   RK3588_PLL_RATE(12, 2, 200, 1, 0),
+   RK3588_PLL_RATE(118800, 2, 198, 1, 0),
+   RK3588_PLL_RATE(11, 3, 550, 2, 0),
+   RK3588_PLL_RATE(100800, 2, 336, 2, 0),
+   RK3588_PLL_RATE(10, 3, 500, 2, 0),
+   RK3588_PLL_RATE(9, 2, 300, 2, 0),
+   RK3588_PLL_RATE(85000, 3, 425, 2, 0),
+   RK3588_PLL_RATE(81600, 2, 272, 2, 0),
+   RK3588_PLL_RATE(786432000, 2, 262, 2, 9437),
+   RK3588_PLL_RATE(78600, 1, 131, 2, 0),
+   RK3588_PLL_RATE(722534400, 8, 963, 2, 24850),
+   RK3588_PLL_RATE(6, 2, 200, 2, 0),
+   RK3588_PLL_RATE(59400, 2, 198, 2, 0),
+   RK3588_PLL_RATE(2, 3, 400, 4, 0),
+   RK3588_PLL_RATE(1, 3, 400, 5, 0),
+   { /* sentinel */ },
+};
+
+static struct rockchip_pll_clock rk3588_pll_clks[] = {
+   [B0PLL] = PLL(pll_rk3588, PLL_B0PLL, RK3588_B0_PLL_CON(0),
+ RK3588_B0_PLL_MODE_CON, 0, 15, 0,
+ rk3588_pll_rates),
+   [B1PLL] = PLL(pll_rk3588, PLL_B1PLL, RK3588_B1_PLL_CON(8),
+ RK3588_B1_PLL_MODE_CON, 0, 15, 0,
+ rk3588_pll_rates),
+   [LPLL] = PLL(pll_rk3588, PLL_LPLL, RK3588_LPLL_CON(16),
+RK3588_LPLL_MODE_CON, 0, 15, 0, rk3588_pll_rates),
+   [V0PLL] = PLL(pll_rk3588, PLL_V0PLL, RK3588_PLL_CON(88),
+ RK3588_MODE_CON0, 4, 15, 0, rk3588_pll_rates),
+   [AUPLL] = PLL(pll_rk3588, PLL_AUPLL, RK3588_PLL_CON(96),
+ RK3588_MODE_CON0, 6, 15, 0, rk3588_pll_rates),
+   [CPLL] = PLL(pll_rk3588, PLL_CPLL, RK3588_PLL_CON(104),
+RK3588_MODE_CON0, 8, 15, 0, rk3588_pll_rates),
+   [GPLL] = PLL(pll_rk3588, PLL_GPLL, RK3588_PLL_CON(112),
+RK3588_MODE_CON0, 2, 15, 0, rk3588_pll_rates),
+   [NPLL] = PLL(pll_rk3588, PLL_NPLL, RK3588_PLL_CON(120),
+RK3588_MODE_CON0, 0, 15, 0, rk3588_pll_rates),
+   [PPLL] = PLL(pll_rk3588, PLL_PPLL, RK3588_PMU_PLL_CON(128),
+RK3588_MODE_CON0, 10, 15, 0, rk3588_pll_rates),
+};
+
+#ifndef CONFIG_SPL_BUILD
+/*
+ *
+ * rational_best_approximation(31415, 1,
+ * (1 << 8) - 1, (1 << 5) - 1, , );
+ *
+ * you may look at given_numerator as a fixed point number,
+ * with the fractional part size described in given_denominator.
+ *
+ * for theoretical background, see:
+ * http://en.wikipedia.org/wiki/Continued_fraction
+ */
+static void rational_best_approximation(unsigned long given_numerator,
+   unsigned long given_denominator,
+   unsigned long max_numerator,
+   unsigned long max_denominator,
+   unsigned long *best_numerator,
+   unsigned long *best_denominator)
+{
+   unsigned long n, d, n0, d0, n1, d1;
+
+   n = given_numerator;
+   d = given_denominator;
+   n0 = 0;
+   d1 = 0;
+   n1 = 1;
+   d0 = 1;
+   for (;;) {
+   unsigned long t, a;
+
+   if (n1 > max_numerator || d1 > max_denominator) {
+   n1 = n0;
+   d1 = d0;
+   break;
+   }
+   if (d == 0)
+ 

Re: [RFC PATCH 11/16] arm64: dts: rockchip: Add base DT for rk3588 SoC

[Eugen Hristev]

On 1/26/23 00:27, Jagan Teki wrote:

This initial version supports CPU, dma, interrupts, timers, UART and
SDHCI (everything necessary to boot Linux on this system on chip) as
well as Ethernet, I2C, PWM and SPI.

The DT is split into rk3588 and rk3588s, which is a reduced version
(i.e. with less peripherals) of the former.

commit <9fb232e9911f> (" arm64: dts: rockchip: Add base DT for rk3588
SoC")
commit  ("arm64: dts: rockchip: Add rk3588 pinctrl data")

Signed-off-by: Jianqun Xu 
Signed-off-by: Kever Yang 
Signed-off-by: Jagan Teki 



[snip]


+
+   cru: clock-controller@fd7c {
+   compatible = "rockchip,rk3588-cru";
+   reg = <0x0 0xfd7c 0x0 0x5c000>;
+   assigned-clocks =
+   < PLL_PPLL>, < PLL_AUPLL>,
+   < PLL_NPLL>, < PLL_GPLL>,
+   < ACLK_CENTER_ROOT>,
+   < HCLK_CENTER_ROOT>, < ACLK_CENTER_LOW_ROOT>,
+   < ACLK_TOP_ROOT>, < PCLK_TOP_ROOT>,
+   < ACLK_LOW_TOP_ROOT>, < PCLK_PMU0_ROOT>,


Hi Jagan,

This clock PCLK_PMU0_ROOT is assigned here a clock rate (100 Mhz), but 
your patch clk: rockchip: Add rk3588 clk support , in function 
rk3588_clk_set_rate , does not take into account the PCLK_PMU0_ROOT , 
hence there is an error printed :


rk3588_clk_set_rate(clk=37fc28, rate=1): unknown clock id=646

(switch statement exits on default branch )

Could you have a look please?

Thanks,
Eugen


+   < HCLK_PMU_CM0_ROOT>, < ACLK_VOP>,
+   < ACLK_BUS_ROOT>, < CLK_150M_SRC>,
+   < CLK_GPU>;
+   assigned-clock-rates =
+   <1>, <786432000>,
+   <85000>, <118800>,
+   <70200>,
+   <4>, <5>,
+   <8>, <1>,
+   <4>, <1>,
+   <2>, <5>,
+   <37500>, <15000>,
+   <2>;
+   rockchip,grf = <_grf>;
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   };
+

[PATCH v2] efi_loader: update attribute check for QueryVariableInfo()

[Masahisa Kojima]

Current U-Boot supports two EFI variable service, U-Boot own
implementation and op-tee based StMM variable service.

With ACS Security Interface Extension(SIE) v22.10_SIE_REL1.1.0,
there are several failure items of QueryVariableInfo().

Current attribute check for QueryVariableInfo() was implemented
based on the Self Certification Test (SCT) II Case Specification,
June 2017, chapter 4.1.4 QueryVariableInfo().
This test case specification is outdated and don't align at all
with the SCT test case code, and UEFI specification v2.10 does
not clearly define the priority of the attribute check.

For U-Boot standard case that EFI variables are stored in a file
in the ESP, this commit modifies the attribute check to get align
to the EDK2 implementation.

For latter case(op-tee based StMM variable service), parameter check
should be delegated to StMM.

Now all ACS SIE QueryVariableInfo() test cases passed both EFI variable
storage implementations.

Signed-off-by: Masahisa Kojima 
---
Changes in v2:
- fix both U-Boot file based variable storage and StMM

 lib/efi_loader/efi_var_common.c | 10 +-
 lib/efi_loader/efi_variable.c   | 22 ++
 2 files changed, 23 insertions(+), 9 deletions(-)

diff --git a/lib/efi_loader/efi_var_common.c b/lib/efi_loader/efi_var_common.c
index eb83702781..ad50bffd2b 100644
--- a/lib/efi_loader/efi_var_common.c
+++ b/lib/efi_loader/efi_var_common.c
@@ -165,17 +165,9 @@ efi_status_t EFIAPI efi_query_variable_info(
 
if (!maximum_variable_storage_size ||
!remaining_variable_storage_size ||
-   !maximum_variable_size ||
-   !(attributes & EFI_VARIABLE_BOOTSERVICE_ACCESS))
+   !maximum_variable_size)
return EFI_EXIT(EFI_INVALID_PARAMETER);
 
-   if ((attributes & ~(u32)EFI_VARIABLE_MASK) ||
-   (attributes & EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS) ||
-   (attributes & EFI_VARIABLE_HARDWARE_ERROR_RECORD) ||
-   (!IS_ENABLED(CONFIG_EFI_SECURE_BOOT) &&
-(attributes & EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS)))
-   return EFI_EXIT(EFI_UNSUPPORTED);
-
ret = efi_query_variable_info_int(attributes,
  maximum_variable_storage_size,
  remaining_variable_storage_size,
diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index 7c32adf6e5..ba135f827d 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -349,6 +349,28 @@ efi_status_t efi_query_variable_info_int(u32 attributes,
 u64 *remaining_variable_storage_size,
 u64 *maximum_variable_size)
 {
+   if (attributes == 0)
+   return EFI_INVALID_PARAMETER;
+
+   /* EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS is deprecated */
+   if ((attributes & EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS) ||
+   ((attributes & EFI_VARIABLE_MASK) == 0))
+   return EFI_UNSUPPORTED;
+
+   if ((attributes & EFI_VARIABLE_MASK) == EFI_VARIABLE_NON_VOLATILE)
+   return EFI_INVALID_PARAMETER;
+
+   /* Make sure if runtime bit is set, boot service bit is set also. */
+   if ((attributes & (EFI_VARIABLE_RUNTIME_ACCESS | 
EFI_VARIABLE_BOOTSERVICE_ACCESS)) ==
+   EFI_VARIABLE_RUNTIME_ACCESS)
+   return EFI_INVALID_PARAMETER;
+
+   if (attributes & EFI_VARIABLE_HARDWARE_ERROR_RECORD)
+   return EFI_UNSUPPORTED;
+
+   if (attributes & ~(u32)EFI_VARIABLE_MASK)
+   return EFI_INVALID_PARAMETER;
+
*maximum_variable_storage_size = EFI_VAR_BUF_SIZE -
 sizeof(struct efi_var_file);
*remaining_variable_storage_size = efi_var_mem_free();
-- 
2.17.1

Re: [PATCH V4 01/14] env: Complete generic support for writable list

[Jan Kiszka]

On 02.02.23 13:48, Marek Vasut wrote:
> On 2/2/23 09:07, Jan Kiszka wrote:
>> From: Jan Kiszka 
>>
>> This completes what 890feecaab72 started by selecting ENV_APPEND and
>> loading the default env before any other sources. This ensures that load
>> operations pick up all non-writable vars from the default env and only
>> permitted parts from other locations according to the regular
>> priorities.
>>
>> With this change, boards only need to define the list of writable
>> variables but no longer have to provide a custom env_get_location
>> implementation.
>>
>> CC: Joe Hershberger 
>> CC: Marek Vasut 
>> CC: Stefan Herbrechtsmeier 
>> Signed-off-by: Jan Kiszka 
>> Reviewed-by: Marek Vasut 
> 
> Maybe just send this one as a separate patch, so it can go in separately
> from this series.

In fact, patch 1 and 2 are foundations and could be picked independently
of rest if preferred. I don't mind waiting for the whole but I can also
split if it helps the maintainer(s).

Jan

-- 
Siemens AG, Technology
Competence Center Embedded Linux

Re: [PATCH v2] mtd: nand: Mark reserved blocks

[Michael Nazzareno Trimarchi]

Hi

Il gio 2 feb 2023, 14:21 Michal Simek  ha scritto:

> Hi Dario,
>
> On 1/5/23 10:46, Ashok Reddy Soma wrote:
> > Reserved blocks are used for storing bad block tables. With "nand bad"
> > command, these reserved blocks are shown as bad blocks. This is leading
> > to confusion when compared with Linux bad blocks. Hence, display
> > "bbt reserved" when printing reserved blocks with "nand bad" command.
> >
> > To acheive this, return 2 which represents reserved from nand_isbad_bbt()
> > instead of 1 in case of reserved blocks and catch it in cmd/nand.c.
> >
> > "nand bad" command display's hexadecimal numbers, so add "0x" prefix.
> >
> > Example log will show up as below.
> >
> > ZynqMP> nand bad
> >
> > Device 0 bad blocks:
> >0x0040
> >0x1680
> >0x16c0
> >0x1700
> >0x3d80
> >0x3e40
> >0xe840
> >0xff00  (bbt reserved)
> >0xff40  (bbt reserved)
> >0xff80  (bbt reserved)
> >0xffc0  (bbt reserved)
> >0x11680
> >0x116c0
> >0x1ff00 (bbt reserved)
> >0x1ff40 (bbt reserved)
> >0x1ff80 (bbt reserved)
> >0x1ffc0 (bbt reserved)
> >
> > Signed-off-by: Ashok Reddy Soma 
> > Reviewed-by: Michael Trimarchi 
> > ---
>
> Are you going to apply this patch?
>

Applied already

Michael

>
> Thanks,
> Michal
>
> --
> Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
> w: www.monstr.eu p: +42-0-721842854
> Maintainer of Linux kernel - Xilinx Microblaze
> Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs
> U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs
>
>

RE: [PATCH 0/2] i2c: i2c-cdns.c: Update driver to read fifo-depth from device tree

[WeiLiang Lim]

Anyone can help review this patch please?

> -Original Message-
> From: PeiYue Ho 
> Sent: Wednesday, January 4, 2023 3:20 PM
> To: u-boot@lists.denx.de
> Cc: PeiYue Ho ; EngLee Teh
> ; WeiLiang Lim 
> Subject: [PATCH 0/2] i2c: i2c-cdns.c: Update driver to read fifo-depth from
> device tree
> 
> Enable driver to fetch the optional parameter (fifo-depth) from device tree. 
> If
> the parameter is not found in the device tree, it will use the default value
> declared in the driver.
> 
> Pei Yue Ho (2):
>   dt-bindings: i2c: i2c-cdns.txt: Add description for an optional
> parameter, fifo-depth
>   i2c: i2c-cdns.c: Update driver to read fifo-depth from device tree
> 
>  doc/device-tree-bindings/i2c/i2c-cdns.txt |  4 
>  drivers/i2c/i2c-cdns.c| 26 ++-
>  2 files changed, 20 insertions(+), 10 deletions(-)
> 
> --
> 2.25.1

Re: [PATCH v2] mtd: nand: Mark reserved blocks

[Michal Simek]

Hi Dario,

On 1/5/23 10:46, Ashok Reddy Soma wrote:

Reserved blocks are used for storing bad block tables. With "nand bad"
command, these reserved blocks are shown as bad blocks. This is leading
to confusion when compared with Linux bad blocks. Hence, display
"bbt reserved" when printing reserved blocks with "nand bad" command.

To acheive this, return 2 which represents reserved from nand_isbad_bbt()
instead of 1 in case of reserved blocks and catch it in cmd/nand.c.

"nand bad" command display's hexadecimal numbers, so add "0x" prefix.

Example log will show up as below.

ZynqMP> nand bad

Device 0 bad blocks:
   0x0040
   0x1680
   0x16c0
   0x1700
   0x3d80
   0x3e40
   0xe840
   0xff00(bbt reserved)
   0xff40(bbt reserved)
   0xff80(bbt reserved)
   0xffc0(bbt reserved)
   0x11680
   0x116c0
   0x1ff00   (bbt reserved)
   0x1ff40   (bbt reserved)
   0x1ff80   (bbt reserved)
   0x1ffc0   (bbt reserved)

Signed-off-by: Ashok Reddy Soma 
Reviewed-by: Michael Trimarchi 
---


Are you going to apply this patch?

Thanks,
Michal

--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs

Re: [PATCH v2 07/12] reset: uniphier: Add USB glue reset support

[Marek Vasut]

On 2/2/23 06:38, Kunihiko Hayashi wrote:

Hi Marek,


Hello Hayashi-san,


On 2023/02/02 6:51, Marek Vasut wrote:

On 2/1/23 02:13, Kunihiko Hayashi wrote:

Add reset control support in USB glue logic. This needs to control
the external clocks and resets for the logic before accessing the
glue logic.

Signed-off-by: Kunihiko Hayashi 


With the very little knowledge I have of this platform:
Reviewed-by: Marek Vasut 


I see. I should make some explanation.

The dm tree for usb is the following.

   glue
     +-- controller   (need controller-reset)
     +-- controller-reset (need syscon-reset)
     +-- phy

The controller needs to deassert "controller-reset" in the glue.
The glue needs to deassert "syscon-reset".

The glue node itself doesn't have "resets" property, so
the controller-reset controls "syscon-reset" instead.

This patch adds the reset control for "controller-reset".


Thank you for the clarification.

I think there are a few things which still require V3, but it is 
starting to look very good.

Re: [PATCH v2 10/12] ARM: dts: uniphier: Fix node names and missing reg property in USB glue node

[Marek Vasut]

On 2/2/23 06:13, Kunihiko Hayashi wrote:

Hi Marek,


Hello Hayashi-san,


On 2023/02/02 6:55, Marek Vasut wrote:

On 2/1/23 02:13, Kunihiko Hayashi wrote:

The node name should follow the generic name list in DT specification.
This moves "reset" to "reset-controller", "hs-phy" and "ss-phy" to "phy"
in the USB glue node.

And the node should have reg property to define the register region.

Signed-off-by: Kunihiko Hayashi 
---
   arch/arm/dts/uniphier-ld20.dtsi | 15 ---
   arch/arm/dts/uniphier-pro4.dtsi |  7 ---
   arch/arm/dts/uniphier-pro5.dtsi | 15 ---
   arch/arm/dts/uniphier-pxs2.dtsi | 20 +++-
   arch/arm/dts/uniphier-pxs3.dtsi | 20 +++-
   5 files changed, 42 insertions(+), 35 deletions(-)


I don't mind this patch, but would it make sense to later, in a separate
patch, synchronize the .dtsi with Linux kernel fully ?


I see.

I also think I should to synchronize the devicetree with Linux, so
I'll separate this patch from this series in the next.


I am fine if you do the full DT synchronization in a separate patch.

Feel free to keep this smaller DT update as part of this series to keep 
the USB functional.

Re: [PATCH v8 0/3] Timer support for ARM Tegra

[Thierry Reding]

On Wed, Feb 01, 2023 at 10:53:00AM +0200, Svyatoslav Ryhel wrote:
> - ARM: tegra: remap clock_osc_freq for all Tegra family
> Enum clock_osc_freq was designed to use only with T20.
> This patch remaps it to use additional frequencies, added in
> T30+ SoC while maintaining backwards compatibility with T20.
> 
> - drivers: timer: add timer driver for ARMv7 based Tegra devices
> Add timer support for T20/T30/T114/T124 and T210 based devices.
> Driver is based on DM, has device tree support and can be
> used on SPL and early boot stage.
> 
> Arm64 Tegra (apart T210) according to comment in tegra-common.h use
> architected timer.
> 
> - ARM: tegra: include timer as default option
> Enable TIMER and TEGRA_TIMER for TEGRA_ARMV7_COMMON and TEGRA210.
> Additionally enable SPL_TIMER if build as SPL part and drop
> deprecated configs from common header.
> 
> ---
> Changed from v7
>  - configured timer selection only for armv7 Tegra and T210
> 
> Changed from v6
>  - use clk_m as timer calibration clock (this should properly fix T210)
>  - enable timer for T210
> 
> Changed from v5:
>  - added paz00 tester
> 
> Changed from v4:
>  - added comments
> 
> Changed from v3:
>  - removed BOOTSTAGE ifdefs
>  - use early timer on boot stage unconditionally
> ---
> 
> Svyatoslav Ryhel (3):
>   ARM: tegra: remap clock_osc_freq for all Tegra family
>   drivers: timer: add driver for ARMv7 based Tegra devices and T210
>   ARM: tegra: include timer as default option
> 
>  arch/arm/Kconfig|   1 +
>  arch/arm/include/asm/arch-tegra/clock.h |   9 +-
>  arch/arm/mach-tegra/Kconfig |   4 +
>  arch/arm/mach-tegra/clock.c |  17 +++-
>  arch/arm/mach-tegra/cpu.c   |  70 ++---
>  arch/arm/mach-tegra/tegra114/clock.c|  13 +--
>  arch/arm/mach-tegra/tegra124/clock.c|  13 +--
>  arch/arm/mach-tegra/tegra20/clock.c |   4 +-
>  arch/arm/mach-tegra/tegra210/clock.c|  22 +---
>  arch/arm/mach-tegra/tegra30/clock.c |  10 +-
>  drivers/timer/Kconfig   |   8 ++
>  drivers/timer/Makefile  |   1 +
>  drivers/timer/tegra-timer.c | 130 
>  drivers/usb/host/ehci-tegra.c   |  46 +++--
>  include/configs/tegra-common.h  |   6 --
>  15 files changed, 275 insertions(+), 79 deletions(-)
>  create mode 100644 drivers/timer/tegra-timer.c

This works fine on Beaver (Tegra30), Jetson TK1 (Tegra124), Jetson TX1
(Tegra210) and Jetson TX2 (Tegra186), so:

Tested-by: Thierry Reding 


signature.asc
Description: PGP signature

Re: [PATCH V4 01/14] env: Complete generic support for writable list

[Marek Vasut]

On 2/2/23 09:07, Jan Kiszka wrote:

From: Jan Kiszka 

This completes what 890feecaab72 started by selecting ENV_APPEND and
loading the default env before any other sources. This ensures that load
operations pick up all non-writable vars from the default env and only
permitted parts from other locations according to the regular
priorities.

With this change, boards only need to define the list of writable
variables but no longer have to provide a custom env_get_location
implementation.

CC: Joe Hershberger 
CC: Marek Vasut 
CC: Stefan Herbrechtsmeier 
Signed-off-by: Jan Kiszka 
Reviewed-by: Marek Vasut 


Maybe just send this one as a separate patch, so it can go in separately 
from this series.

Re: [PATCH v4] mtd: parsers: ofpart: add workaround for #size-cells 0

[Francesco Dolcini]

On Thu, Jan 26, 2023 at 10:12:04AM +0100, Miquel Raynal wrote:
> gre...@linuxfoundation.org wrote on Thu, 26 Jan 2023 10:01:02 +0100:
> 
> > On Wed, Jan 25, 2023 at 10:06:57PM +0100, Francesco Dolcini wrote:
> > > Hello Miquel, Greg and all
> > > 
> > > On Tue, Jan 24, 2023 at 04:38:59PM +0100, Greg Kroah-Hartman wrote:  
> > > > On Tue, Jan 24, 2023 at 11:44:44AM +0100, Francesco Dolcini wrote:  
> > > > > From: Francesco Dolcini 
> > > > > 
> > > > > Add a mechanism to handle the case in which partitions are present as
> > > > > direct child of the nand controller node and #size-cells is set to 
> > > > > <0>.
> > > > > 
> > > > > This could happen if the nand-controller node in the DTS is supposed 
> > > > > to
> > > > > have #size-cells set to 0, but for some historical reason/bug it was 
> > > > > set
> > > > > to 1 in the past, and the firmware (e.g. U-Boot) is adding the 
> > > > > partition
> > > > > as direct children of the nand-controller defaulting to #size-cells
> > > > > being to 1.
> > > > > 
> > > > > This prevents a real boot failure on colibri-imx7 that happened 
> > > > > during v6.1
> > > > > development cycles.
> > > > > 
> > > > > Link: 
> > > > > https://lore.kernel.org/all/y4dgbtgnwpm6s...@francesco-nb.int.toradex.com/
> > > > > Link: 
> > > > > https://lore.kernel.org/all/20221202071900.1143950-1-france...@dolcini.it/
> > > > > Signed-off-by: Francesco Dolcini 
> > > > > Reviewed-by: Greg Kroah-Hartman 
> > > > > ---
> > > > > I do not expect this patch to be backported to stable, however I 
> > > > > would expect
> > > > > that we do not backport nand-controller dts cleanups neither.
> > > > > 
> > > > > v4:
> > > > >  fixed wrong English spelling in the comment
> > > > > 
> > > > > v3:
> > > > >  minor formatting change, removed not needed new-line and space. 
> > > > > 
> > > > > v2:
> > > > >  fixup size-cells only when partitions are direct children of the 
> > > > > nand-controller
> > > > >  completely revised commit message, comments and warning print
> > > > >  use pr_warn instead of pr_warn_once
> > > > >  added Reviewed-by Greg
> > > > >  removed cc:stable@ and fixes tag, since the problematic commit was 
> > > > > reverted
> > > > > ---
> > > > >  drivers/mtd/parsers/ofpart_core.c | 19 +++
> > > > >  1 file changed, 19 insertions(+)
> > > > > 
> > > > > diff --git a/drivers/mtd/parsers/ofpart_core.c 
> > > > > b/drivers/mtd/parsers/ofpart_core.c
> > > > > index 192190c42fc8..e7b8e9d0a910 100644
> > > > > --- a/drivers/mtd/parsers/ofpart_core.c
> > > > > +++ b/drivers/mtd/parsers/ofpart_core.c
> > > > > @@ -122,6 +122,25 @@ static int parse_fixed_partitions(struct 
> > > > > mtd_info *master,
> > > > >  
> > > > >   a_cells = of_n_addr_cells(pp);
> > > > >   s_cells = of_n_size_cells(pp);
> > > > > + if (!dedicated && s_cells == 0) {
> > > > > + /*
> > > > > +  * This is a ugly workaround to not create
> > > > > +  * regression on devices that are still creating
> > > > > +  * partitions as direct children of the nand 
> > > > > controller.
> > > > > +  * This can happen in case the nand controller 
> > > > > node has
> > > > > +  * #size-cells equal to 0 and the firmware (e.g.
> > > > > +  * U-Boot) just add the partitions there 
> > > > > assuming
> > > > > +  * 32-bit addressing.
> > > > > +  *
> > > > > +  * If you get this warning your firmware and/or 
> > > > > DTS
> > > > > +  * should be really fixed.
> > > > > +  *
> > > > > +  * This is working only for devices smaller 
> > > > > than 4GiB.
> > > > > +  */
> > > > > + pr_warn("%s: ofpart partition %pOF (%pOF) 
> > > > > #size-cells is wrongly set to <0>, assuming <1> for parsing 
> > > > > partitions.\n",
> > > > > + master->name, pp, mtd_node);  
> > > > 
> > > > This is a driver, always use dev_*() calls, not pr_*() calls so that we
> > > > know what is being referred to exactly.  
> > > 
> > > Is this reasonable here? Where can I get the struct device?  
> > 
> > Walk back up the call chain, there has to be a device somewhere
> > controlling this, right?
> > 
> > > In general this file uses only pr_* debug API and messages are about OF
> > > nodes/properties, not about a device.  
> > 
> > OF nodes and properties are part of a device's properties :)
> 
> Yes but the warning comes from a wrong DT description, hence it felt
> better suited to warn against the node name which is easily identifiable
> in a text file and must be fixed rather than the device which is a pure
> software component.
> 
> Anyway, Francesco, please show us the resultant line and if it feels
> meaningful enough we'll take the dev_warn approach.

So, I tried, but I 

Re: [PATCH] efi_loader: leave attribute check to StMM variable service

[Masahisa Kojima]

On Wed, 1 Feb 2023 at 18:32, Ilias Apalodimas
 wrote:
>
> Hi Kojima-san
>
> This looks correct when U-Boot is using StMM for the variable storage.
> Since Arm claims that SCT document is outdated should we also fix the
> default behavior?  IOW U-Boot should return identical values when variables
> are stored in a file in the ESP.

Hi Ilias,

Yes, I will also fix the case that EFI variables are stored in a file
in the ESP.

Thanks,
Masahisa Kojima

>
> On Thu, Jan 26, 2023 at 12:15:12PM +0900, Masahisa Kojima wrote:
> > Current U-Boot supports two EFI variable service, U-Boot own
> > implementation and op-tee based StMM variable service.
> > For latter case, parameter check should leave to StMM.
> > This commit removes the attribute check from the common
> > function(efi_query_variable_info) and moves it to
> > lib/efi_loader/efi_variable.c.
> >
> > Signed-off-by: Masahisa Kojima 
> > ---
> >  lib/efi_loader/efi_var_common.c | 10 +-
> >  lib/efi_loader/efi_variable.c   | 10 ++
> >  2 files changed, 11 insertions(+), 9 deletions(-)
> >
> > diff --git a/lib/efi_loader/efi_var_common.c 
> > b/lib/efi_loader/efi_var_common.c
> > index eb83702781..ad50bffd2b 100644
> > --- a/lib/efi_loader/efi_var_common.c
> > +++ b/lib/efi_loader/efi_var_common.c
> > @@ -165,17 +165,9 @@ efi_status_t EFIAPI efi_query_variable_info(
> >
> >   if (!maximum_variable_storage_size ||
> >   !remaining_variable_storage_size ||
> > - !maximum_variable_size ||
> > - !(attributes & EFI_VARIABLE_BOOTSERVICE_ACCESS))
> > + !maximum_variable_size)
> >   return EFI_EXIT(EFI_INVALID_PARAMETER);
> >
> > - if ((attributes & ~(u32)EFI_VARIABLE_MASK) ||
> > - (attributes & EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS) ||
> > - (attributes & EFI_VARIABLE_HARDWARE_ERROR_RECORD) ||
> > - (!IS_ENABLED(CONFIG_EFI_SECURE_BOOT) &&
> > -  (attributes & 
> > EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS)))
> > - return EFI_EXIT(EFI_UNSUPPORTED);
> > -
> >   ret = efi_query_variable_info_int(attributes,
> > maximum_variable_storage_size,
> > remaining_variable_storage_size,
> > diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
> > index 7c32adf6e5..86f39181e0 100644
> > --- a/lib/efi_loader/efi_variable.c
> > +++ b/lib/efi_loader/efi_variable.c
> > @@ -349,6 +349,16 @@ efi_status_t efi_query_variable_info_int(u32 
> > attributes,
> >u64 *remaining_variable_storage_size,
> >u64 *maximum_variable_size)
> >  {
> > + if (!(attributes & EFI_VARIABLE_BOOTSERVICE_ACCESS))
> > + return EFI_EXIT(EFI_INVALID_PARAMETER);
> > +
> > + if ((attributes & ~(u32)EFI_VARIABLE_MASK) ||
> > + (attributes & EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS) ||
> > + (attributes & EFI_VARIABLE_HARDWARE_ERROR_RECORD) ||
> > + (!IS_ENABLED(CONFIG_EFI_SECURE_BOOT) &&
> > +  (attributes & 
> > EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS)))
> > + return EFI_EXIT(EFI_UNSUPPORTED);
> > +
> >   *maximum_variable_storage_size = EFI_VAR_BUF_SIZE -
> >sizeof(struct efi_var_file);
> >   *remaining_variable_storage_size = efi_var_mem_free();
> > --
> > 2.17.1
> >
>
> Cheers
> /Ilias

Re: [PATCH v2 15/17] android: boot: support boot image header version 3 and 4

[Safae Ouajih]

On 01/02/2023 09:44, Mattijs Korpershoek wrote:

On Thu, Jan 26, 2023 at 17:55, Simon Glass  wrote:


Hi Safae,

On Thu, 26 Jan 2023 at 09:05, Safae Ouajih  wrote:

This enables the support for boot image header version 3 and 4
using abootimg command.

In order to use version 3 or 4:

1- Vendor boot image address should be given to abootimg cmd.

 abootimg addr $1 $vendor_boot_load_addr

2- "ramdisk_addr_r" env variable (ramdisk address) should be set to host
the ramdisk : generic ramdisk + vendor ramdisk

"struct andr_boot_img_hdr_v0*" is replaced by "void *" in
some functions since v3 and v4 are now supported as well.

Signed-off-by: Safae Ouajih 
---
  boot/bootm.c | 29 -
  boot/image-android.c | 16 ++--
  boot/image-board.c   | 14 +++---
  boot/image-fdt.c |  2 +-
  cmd/abootimg.c   | 24 ++--
  include/image.h  | 14 --
  6 files changed, 76 insertions(+), 23 deletions(-)

Since this introduces the new formats (v3 and v4), can we also update
the doc/android/boot-image.rst files which lists all the boot formats
for android?



Hi Mattijs,

Thank you for the review,

I will update the documentation in a v3.

Best Regards,

Safae


diff --git a/boot/bootm.c b/boot/bootm.c
index a58e6f391e..3e130c175c 100644
--- a/boot/bootm.c
+++ b/boot/bootm.c
@@ -113,6 +113,10 @@ static int bootm_find_os(struct cmd_tbl *cmdtp, int flag, 
int argc,
  char *const argv[])
  {
 const void *os_hdr;
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+   const void *vendor_boot_img;
+   const void *boot_img;
+#endif
 bool ep_found = false;
 int ret;

@@ -181,12 +185,17 @@ static int bootm_find_os(struct cmd_tbl *cmdtp, int flag, 
int argc,
  #endif
  #ifdef CONFIG_ANDROID_BOOT_IMAGE
 case IMAGE_FORMAT_ANDROID:
+   boot_img = os_hdr;
+   vendor_boot_img = NULL;
+   if (IS_ENABLED(CONFIG_CMD_ABOOTIMG)) {
+   boot_img = (void *)get_abootimg_addr();
+   vendor_boot_img = (void *)get_avendor_bootimg_addr();

map_sysmem() so it owrks on sandbox


+   }
 images.os.type = IH_TYPE_KERNEL;
-   images.os.comp = android_image_get_kcomp(os_hdr, NULL);
+   images.os.comp = android_image_get_kcomp(boot_img, 
vendor_boot_img);
 images.os.os = IH_OS_LINUX;
-
-   images.os.end = android_image_get_end(os_hdr, NULL);
-   images.os.load = android_image_get_kload(os_hdr, NULL);
+   images.os.end = android_image_get_end(boot_img, 
vendor_boot_img);
+   images.os.load = android_image_get_kload(boot_img, 
vendor_boot_img);
 images.ep = images.os.load;
 ep_found = true;
 break;
@@ -889,6 +898,10 @@ static const void *boot_get_kernel(struct cmd_tbl *cmdtp, 
int flag, int argc,
 int os_noffset;
  #endif

+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+   const void *boot_img;
+   const void *vendor_boot_img;
+#endif
 img_addr = genimg_get_kernel_addr_fit(argc < 1 ? NULL : argv[0],
   _uname_config,
   _uname_kernel);
@@ -964,8 +977,14 @@ static const void *boot_get_kernel(struct cmd_tbl *cmdtp, 
int flag, int argc,
  #endif
  #ifdef CONFIG_ANDROID_BOOT_IMAGE
 case IMAGE_FORMAT_ANDROID:
+   boot_img = buf;
+   vendor_boot_img = NULL;
+   if (IS_ENABLED(CONFIG_CMD_ABOOTIMG)) {
+   boot_img = (void *)get_abootimg_addr();
+   vendor_boot_img = (void *)get_avendor_bootimg_addr();

and here


+   }
 printf("## Booting Android Image at 0x%08lx ...\n", img_addr);
-   if (android_image_get_kernel(buf, NULL, images->verify,
+   if (android_image_get_kernel(boot_img, vendor_boot_img, 
images->verify,
  os_data, os_len))
 return NULL;
 break;
diff --git a/boot/image-android.c b/boot/image-android.c
index edeeaaaee0..dd06c09279 100644
--- a/boot/image-android.c
+++ b/boot/image-android.c
@@ -201,7 +201,7 @@ static ulong android_image_get_kernel_addr(struct 
andr_image_data *img_data)
   * Return: Zero, os start address and length on success,
   * otherwise on failure.
   */
-int android_image_get_kernel(const struct andr_boot_img_hdr_v0 *hdr,
+int android_image_get_kernel(const void *hdr,
  const void *vendor_boot_img, int verify,
  ulong *os_data, ulong *os_len)
  {
@@ -286,7 +286,7 @@ bool is_android_vendor_boot_image_header(const void 
*vendor_boot_img)
 return !memcmp(VENDOR_BOOT_MAGIC, vendor_boot_img, 
ANDR_VENDOR_BOOT_MAGIC_SIZE);
  }

-bool 

[PATCH 5/5] eficonfig: add error message of SetVariable

[Masahisa Kojima]

This commits add the error message when EFI Runtime Service
SetVariable() failed.

Signed-off-by: Masahisa Kojima 
---
 cmd/eficonfig.c | 22 +++---
 1 file changed, 19 insertions(+), 3 deletions(-)

diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index b0c8637676..c5cbf27631 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -30,6 +30,8 @@ static const char *eficonfig_change_boot_order_desc =
"  Press SPACE to activate or deactivate the entry\n"
"  CTRL+S to save, ESC to quit";
 
+static const char *set_variable_fail_str = "SetVariable failed!";
+
 static struct efi_simple_text_output_protocol *cout;
 static int avail_row;
 
@@ -1274,6 +1276,9 @@ static efi_status_t eficonfig_set_boot_option(u16 
*varname, struct efi_device_pa
   EFI_VARIABLE_BOOTSERVICE_ACCESS |
   EFI_VARIABLE_RUNTIME_ACCESS,
   size, p, false);
+   if (ret != EFI_SUCCESS)
+   eficonfig_print_msg(set_variable_fail_str, ret);
+
free(p);
 
return ret;
@@ -1309,8 +1314,10 @@ efi_status_t eficonfig_append_bootorder(u16 index)
   EFI_VARIABLE_BOOTSERVICE_ACCESS |
   EFI_VARIABLE_RUNTIME_ACCESS,
   new_size, new_bootorder, false);
-   if (ret != EFI_SUCCESS)
+   if (ret != EFI_SUCCESS) {
+   eficonfig_print_msg(set_variable_fail_str, ret);
goto out;
+   }
 
 out:
free(bootorder);
@@ -2155,6 +2162,8 @@ static efi_status_t 
eficonfig_process_save_boot_order(void *data)
   EFI_VARIABLE_BOOTSERVICE_ACCESS |
   EFI_VARIABLE_RUNTIME_ACCESS,
   size, new_bootorder, false);
+   if (ret != EFI_SUCCESS)
+   eficonfig_print_msg(set_variable_fail_str, ret);
 
save_data->selected = true;
 out:
@@ -2394,7 +2403,7 @@ static efi_status_t delete_boot_option(u16 boot_index)
ret = efi_set_variable_int(varname, _global_variable_guid,
   0, 0, NULL, false);
if (ret != EFI_SUCCESS) {
-   log_err("delete boot option(%ls) failed\n", varname);
+   eficonfig_print_msg("Delete boot option(%ls) failed!", ret);
return ret;
}
 
@@ -2415,6 +2424,8 @@ static efi_status_t delete_boot_option(u16 boot_index)
   EFI_VARIABLE_BOOTSERVICE_ACCESS |
   EFI_VARIABLE_RUNTIME_ACCESS,
   size, bootorder, false);
+   if (ret != EFI_SUCCESS)
+   eficonfig_print_msg(set_variable_fail_str, ret);
 
return ret;
 }
@@ -2672,13 +2683,18 @@ efi_status_t 
eficonfig_generate_media_device_boot_option(void)
   
EFI_VARIABLE_BOOTSERVICE_ACCESS |
   EFI_VARIABLE_RUNTIME_ACCESS,
   opt[i].size, opt[i].lo, 
false);
-   if (ret != EFI_SUCCESS)
+   if (ret != EFI_SUCCESS) {
+   eficonfig_print_msg(set_variable_fail_str, ret);
goto out;
+   }
 
ret = eficonfig_append_bootorder(boot_index);
if (ret != EFI_SUCCESS) {
efi_set_variable_int(var_name, 
_global_variable_guid,
 0, 0, NULL, false);
+   if (ret != EFI_SUCCESS)
+   
eficonfig_print_msg(set_variable_fail_str, ret);
+
goto out;
}
}
-- 
2.17.1

[PATCH 4/5] eficonfig: include EFI_STATUS string in error message

[Masahisa Kojima]

Current eficonfig_print_msg() does not show the return
value of EFI Boot/Runtime Services when the service call fails.
With this commit, user can know EFI_STATUS in the error message.

Signed-off-by: Masahisa Kojima 
---
 cmd/eficonfig.c   | 95 +--
 cmd/eficonfig_sbkey.c | 16 
 include/efi_config.h  |  2 +-
 3 files changed, 93 insertions(+), 20 deletions(-)

diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index 0a17b8cf34..b0c8637676 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -151,19 +151,90 @@ static void eficonfig_menu_adjust(struct efimenu 
*efi_menu, bool add)
 #define eficonfig_menu_up(_a) eficonfig_menu_adjust(_a, false)
 #define eficonfig_menu_down(_a) eficonfig_menu_adjust(_a, true)
 
+struct efi_status_str {
+   efi_status_t status;
+   char *str;
+};
+
+static const struct efi_status_str status_str_table[] = {
+   {EFI_LOAD_ERROR,"Load Error"},
+   {EFI_INVALID_PARAMETER, "Invalid Parameter"},
+   {EFI_UNSUPPORTED,   "Unsupported"},
+   {EFI_BAD_BUFFER_SIZE,   "Bad Buffer Size"},
+   {EFI_BUFFER_TOO_SMALL,  "Buffer Too Small"},
+   {EFI_NOT_READY, "Not Ready"},
+   {EFI_DEVICE_ERROR,  "Device Error"},
+   {EFI_WRITE_PROTECTED,   "Write Protected"},
+   {EFI_OUT_OF_RESOURCES,  "Out of Resources"},
+   {EFI_VOLUME_CORRUPTED,  "Volume Corrupted"},
+   {EFI_VOLUME_FULL,   "Volume Full"},
+   {EFI_NO_MEDIA,  "No Media"},
+   {EFI_MEDIA_CHANGED, "Media Changed"},
+   {EFI_NOT_FOUND, "Not Found"},
+   {EFI_ACCESS_DENIED, "Access Denied"},
+   {EFI_NO_RESPONSE,   "No Response"},
+   {EFI_NO_MAPPING,"No Mapping"},
+   {EFI_TIMEOUT,   "Timeout"},
+   {EFI_NOT_STARTED,   "Not Started"},
+   {EFI_ALREADY_STARTED,   "Already Started"},
+   {EFI_ABORTED,   "Aborted"},
+   {EFI_ICMP_ERROR,"ICMP Error"},
+   {EFI_TFTP_ERROR,"TFTP Error"},
+   {EFI_PROTOCOL_ERROR,"Protocol Error"},
+   {EFI_INCOMPATIBLE_VERSION,  "Incompatible Version"},
+   {EFI_SECURITY_VIOLATION,"Security Violation"},
+   {EFI_CRC_ERROR, "CRC Error"},
+   {EFI_END_OF_MEDIA,  "End of Media"},
+   {EFI_END_OF_FILE,   "End of File"},
+   {EFI_INVALID_LANGUAGE,  "Invalid Language"},
+   {EFI_COMPROMISED_DATA,  "Compromised Data"},
+   {EFI_IP_ADDRESS_CONFLICT,   "IP Address Conflict"},
+   {EFI_HTTP_ERROR,"HTTP Error"},
+   {EFI_WARN_UNKNOWN_GLYPH,"Warn Unknown Glyph"},
+   {EFI_WARN_DELETE_FAILURE,   "Warn Delete Failure"},
+   {EFI_WARN_WRITE_FAILURE,"Warn Write Failure"},
+   {EFI_WARN_BUFFER_TOO_SMALL, "Warn Buffer Too Small"},
+   {EFI_WARN_STALE_DATA,   "Warn Stale Data"},
+   {EFI_WARN_FILE_SYSTEM,  "Warn File System"},
+   {EFI_WARN_RESET_REQUIRED,   "Warn Reset Required"},
+   {0, ""},
+};
+
+/**
+ * struct get_status_str - get status string
+ *
+ * @status:efi_status_t value to covert to string
+ * Return: pointer to the string
+ */
+static char *get_error_str(efi_status_t status)
+{
+   u32 i;
+
+   for (i = 0; status_str_table[i].status != 0; i++) {
+   if (status == status_str_table[i].status)
+   return status_str_table[i].str;
+   }
+   return status_str_table[i].str;
+}
+
 /**
  * eficonfig_print_msg() - print message
  *
  * display the message to the user, user proceeds the screen
  * with any key press.
  *
- * @items: pointer to the structure of each menu entry
- * @count: the number of menu entry
- * @menu_header:   pointer to the menu header string
- * Return: status code
+ * @msg:   pointer to the error message
+ * @status:efi status code, set 0 if no status string output
  */
-void eficonfig_print_msg(char *msg)
+void eficonfig_print_msg(const char *msg, efi_status_t status)
 {
+   char str[128];
+
+   if (status == 0)
+   snprintf(str, sizeof(str), "%s", msg);
+   else
+   snprintf(str, sizeof(str), "%s (%s)", msg, 
get_error_str(status));
+
/* Flush input */
while (tstc())
getchar();
@@ -171,7 +242,7 @@ void eficonfig_print_msg(char *msg)
printf(ANSI_CURSOR_HIDE
   ANSI_CLEAR_CONSOLE
   ANSI_CURSOR_POSITION
-  "%s\n\n  Press any key to continue", 3, 4, msg);
+  "%s\n\n  Press any key to continue", 3, 4, str);
 
getchar();
 }
@@ -580,7 +651,7 @@ static efi_status_t eficonfig_file_selected(void *data)
new_len = 

[PATCH 3/5] eficonfig: set EFICONFIG_ENTRY_NUM_MAX to INT_MAX - 1

[Masahisa Kojima]

eficonfig_append_menu_entryi() accepts the number of entries
less than or equal to EFICONFIG_ENTRY_NUM_MAX.
EFICONFIG_ENTRY_NUM_MAX is currently set as INT_MAX, so
the invalid menu count check(efi_menu->count > EFICONFIG_ENTRY_NUM_MAX)
in eficonfig_process_common() is always false.

This commit sets EFICONFIG_ENTRY_NUM_MAX to (INT_MAX - 1).

Reported-by: Coverity (CID 435659)
Signed-off-by: Masahisa Kojima 
---
 include/efi_config.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/efi_config.h b/include/efi_config.h
index e5edbb5e09..01ce9b2b06 100644
--- a/include/efi_config.h
+++ b/include/efi_config.h
@@ -11,7 +11,7 @@
 #include 
 #include 
 
-#define EFICONFIG_ENTRY_NUM_MAX INT_MAX
+#define EFICONFIG_ENTRY_NUM_MAX (INT_MAX - 1)
 #define EFICONFIG_VOLUME_PATH_MAX 512
 #define EFICONFIG_FILE_PATH_MAX 512
 #define EFICONFIG_FILE_PATH_BUF_SIZE (EFICONFIG_FILE_PATH_MAX * sizeof(u16))
-- 
2.17.1

[PATCH 2/5] eficonfig: CTRL+S to save the boot order

[Masahisa Kojima]

The change boot order menu in eficonfig can have at most INT_MAX lines
and it is troublesome to scroll down to the "Save" entry.

This commit assigns CTRL+S to save the boot order.

Signed-off-by: Masahisa Kojima 
---
 cmd/eficonfig.c | 6 +-
 common/menu.c   | 3 +++
 include/menu.h  | 1 +
 3 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index f365a988d4..0a17b8cf34 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -28,7 +28,7 @@ const char *eficonfig_menu_desc =
 static const char *eficonfig_change_boot_order_desc =
"  Press UP/DOWN to move, +/- to change orde\n"
"  Press SPACE to activate or deactivate the entry\n"
-   "  Select [Save] to complete, ESC to quit";
+   "  CTRL+S to save, ESC to quit";
 
 static struct efi_simple_text_output_protocol *cout;
 static int avail_row;
@@ -1983,6 +1983,10 @@ char *eficonfig_choice_change_boot_order(void *data)
eficonfig_menu_down(efi_menu);
 
return NULL;
+   case BKEY_SAVE:
+   /* force to select "Save" entry */
+   efi_menu->active = efi_menu->count - 2;
+   fallthrough;
case BKEY_SELECT:
/* "Save" */
if (efi_menu->active == efi_menu->count - 2) {
diff --git a/common/menu.c b/common/menu.c
index 56401695de..da08f17747 100644
--- a/common/menu.c
+++ b/common/menu.c
@@ -502,6 +502,9 @@ enum bootmenu_key bootmenu_conv_key(int ichar)
case CTL_CH('n'):
key = BKEY_DOWN;
break;
+   case CTL_CH('s'):
+   key = BKEY_SAVE;
+   break;
case '+':
key = BKEY_PLUS;
break;
diff --git a/include/menu.h b/include/menu.h
index 1e88141d6b..64ce89b7d2 100644
--- a/include/menu.h
+++ b/include/menu.h
@@ -53,6 +53,7 @@ enum bootmenu_key {
BKEY_PLUS,
BKEY_MINUS,
BKEY_SPACE,
+   BKEY_SAVE,
 
BKEY_COUNT,
 };
-- 
2.17.1

[PATCH 1/5] menu: remove CTRL+C to quit

[Masahisa Kojima]

On the sandbox called without "--terminal raw" CTRL+C leaves U-Boot,
"ESC/CTRL+C to quit" is misleading.

Let's remove CTRL+C to quit key handling from bootmenu and eficonfig menu.

Signed-off-by: Masahisa Kojima 
---
 cmd/bootmenu.c   | 2 +-
 cmd/eficonfig.c  | 6 +++---
 common/menu.c| 1 -
 doc/usage/cmd/bootmenu.rst   | 2 +-
 lib/efi_loader/efi_console.c | 2 +-
 5 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c
index 3236ca5d79..8dc133c236 100644
--- a/cmd/bootmenu.c
+++ b/cmd/bootmenu.c
@@ -437,7 +437,7 @@ static void menu_display_statusline(struct menu *m)
printf(ANSI_CURSOR_POSITION, menu->count + 5, 1);
puts(ANSI_CLEAR_LINE);
printf(ANSI_CURSOR_POSITION, menu->count + 6, 3);
-   puts("Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit");
+   puts("Press UP/DOWN to move, ENTER to select, ESC to quit");
puts(ANSI_CLEAR_LINE_TO_END);
printf(ANSI_CURSOR_POSITION, menu->count + 7, 1);
puts(ANSI_CLEAR_LINE);
diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index 47c04cf536..f365a988d4 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -23,12 +23,12 @@
 
 static struct efi_simple_text_input_protocol *cin;
 const char *eficonfig_menu_desc =
-   "  Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit";
+   "  Press UP/DOWN to move, ENTER to select, ESC to quit";
 
 static const char *eficonfig_change_boot_order_desc =
"  Press UP/DOWN to move, +/- to change orde\n"
"  Press SPACE to activate or deactivate the entry\n"
-   "  Select [Save] to complete, ESC/CTRL+C to quit";
+   "  Select [Save] to complete, ESC to quit";
 
 static struct efi_simple_text_output_protocol *cout;
 static int avail_row;
@@ -927,7 +927,7 @@ static efi_status_t handle_user_input(u16 *buf, int 
buf_size,
   ANSI_CURSOR_POSITION
   "%s"
   ANSI_CURSOR_POSITION
-  "  Press ENTER to complete, ESC/CTRL+C to quit",
+  "  Press ENTER to complete, ESC to quit",
   0, 1, msg, 8, 1);
 
/* tmp is used to accept user cancel */
diff --git a/common/menu.c b/common/menu.c
index cdcdbb2a18..56401695de 100644
--- a/common/menu.c
+++ b/common/menu.c
@@ -492,7 +492,6 @@ enum bootmenu_key bootmenu_conv_key(int ichar)
/* enter key was pressed */
key = BKEY_SELECT;
break;
-   case CTL_CH('c'):
case '\e':
/* ^C was pressed */
key = BKEY_QUIT;
diff --git a/doc/usage/cmd/bootmenu.rst b/doc/usage/cmd/bootmenu.rst
index cb3c8d2f93..684a18d8e1 100644
--- a/doc/usage/cmd/bootmenu.rst
+++ b/doc/usage/cmd/bootmenu.rst
@@ -122,7 +122,7 @@ Example bootmenu is as below::
 Default behavior when user exits from the bootmenu
 ~~
 User can exit from bootmenu by selecting the last entry
-"U-Boot console"/"Quit" or ESC/CTRL+C key.
+"U-Boot console"/"Quit" or ESC key.
 
 When the CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE is disabled,
 user exits from the bootmenu and returns to the U-Boot console.
diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c
index 1ed8c7aa36..2c7536107a 100644
--- a/lib/efi_loader/efi_console.c
+++ b/lib/efi_loader/efi_console.c
@@ -1395,7 +1395,7 @@ efi_status_t efi_console_get_u16_string(struct 
efi_simple_text_input_protocol *c
} else if (key.unicode_char == u'\r') {
buf[len] = u'\0';
return EFI_SUCCESS;
-   } else if (key.unicode_char == 0x3 || key.scan_code == 23) {
+   } else if (key.scan_code == 23) {
return EFI_ABORTED;
} else if (key.unicode_char < 0x20) {
/* ignore control codes other than Ctrl+C, '\r' and 
'\b' */
-- 
2.17.1

[PATCH 0/5] improve eficonfig usability

[Masahisa Kojima]

This series improves the eficonfig usability, enhances the error
message and fixes the issue reported by coverity.

Masahisa Kojima (5):
  menu: remove CTRL+C to quit
  eficonfig: CTRL+S to save the boot order
  eficonfig: set EFICONFIG_ENTRY_NUM_MAX to INT_MAX - 1
  eficonfig: include EFI_STATUS string in error message
  eficonfig: add error message of SetVariable

 cmd/bootmenu.c   |   2 +-
 cmd/eficonfig.c  | 127 ++-
 cmd/eficonfig_sbkey.c|  16 +++--
 common/menu.c|   4 +-
 doc/usage/cmd/bootmenu.rst   |   2 +-
 include/efi_config.h |   4 +-
 include/menu.h   |   1 +
 lib/efi_loader/efi_console.c |   2 +-
 8 files changed, 127 insertions(+), 31 deletions(-)

-- 
2.17.1

Re: [RFC PATCH 16/16] board: rockchip: Add Edgeble Neural Compute Module 6

[Eugen Hristev]

On 1/26/23 00:27, Jagan Teki wrote:

Neural Compute Module 6(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RK3588 from Edgeble AI.

General features:
- Rockchip RK3588
- up to 32GB LPDDR4x
- up to 128GB eMMC
- 2x MIPI CSI2 FPC

On module WiFi6/BT5 is available in the following Neu6 variants.

Neural Compute Module 6(Neu6) IO board is an industrial form factor
ready-to-use IO board from Edgeble AI.

IO board offers plenty of peripherals and connectivity options and
this patch enables basic eMMC and UART which is enough to successfully
boot Linux.

Neu6 needs to mount on top of this IO board in order to create a
complete Edgeble Neural Compute Module 6(Neu6) IO platform.

Add support for Edgeble Neu6 Model A IO Board.

Signed-off-by: Jagan Teki 
---


[snip]


diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 28c837a382..a140c1a8a4 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -86,6 +86,8 @@ List of mainline supported Rockchip boards:
   - Radxa ROCK Pi 4 (rock-pi-4-rk3399)
   - Rockchip Evb-RK3399 (evb_rk3399)
   - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399)
+* rk3588
+ - Edgeble Neural Compute Module 6 SoM - Neu6a (neu6a-io-r1126)


Hi Jagan,

I suppose here it should be neu6a-io-rk3588 , in the line above

Eugen


  * rv1108
   - Rockchip Evb-rv1108 (evb-rv1108)
   - Elgin-R1 (elgin-rv1108)

Re: [PATCH 1/1] efi_loader: stop watchdogs in ExitBootServices()

[Etienne Carriere]

Hello Heinrich and all,

On Wed, 1 Feb 2023 at 10:00, Heinrich Schuchardt
 wrote:
>
>
>
> On 2/1/23 09:32, Rasmus Villemoes wrote:
> > On 31/01/2023 16.07, Tom Rini wrote:
> >> On Tue, Jan 31, 2023 at 02:03:10PM +0200, Ilias Apalodimas wrote:
> >>> Hi all,
> >>>
> >>> On Mon, Jan 30, 2023 at 01:30:49PM -0500, Tom Rini wrote:
>  On Mon, Jan 30, 2023 at 01:13:55PM -0500, Tom Rini wrote:
> > On Sat, Jan 28, 2023 at 09:57:45AM +0100, Heinrich Schuchardt wrote:
> >
> >> The UEFI specification requires for ExitBootServices() that "the boot
> >> services watchdog timer is disabled". We already disable the software
> >> watchdog. We should additionally disable the hardware watchdogs.
> >>
> >> Reported-by: Andre Przywara 
> >> Signed-off-by: Heinrich Schuchardt 
> >> ---
> >>   lib/efi_loader/efi_boottime.c | 10 ++
> >>   1 file changed, 6 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/lib/efi_loader/efi_boottime.c 
> >> b/lib/efi_loader/efi_boottime.c
> >> index ba28989f36..71215af9d2 100644
> >> --- a/lib/efi_loader/efi_boottime.c
> >> +++ b/lib/efi_loader/efi_boottime.c
> >> @@ -19,6 +19,7 @@
> >>   #include 
> >>   #include 
> >>   #include 
> >> +#include 
> >>   #include 
> >>   #include 
> >>   #include 
> >> @@ -2171,6 +2172,11 @@ static efi_status_t EFIAPI 
> >> efi_exit_boot_services(efi_handle_t image_handle,
> >>  list_del(>link);
> >>  }
> >>
> >> +/* Disable watchdogs */
> >> +efi_set_watchdog(0);
> >> +if IS_ENABLED(CONFIG_WDT)
> >> +wdt_stop_all();
> >> +
> >>  if (!efi_st_keep_devices) {
> >>  bootm_disable_interrupts();
> >>  if (IS_ENABLED(CONFIG_USB_DEVICE))
> >> @@ -2196,10 +2202,6 @@ static efi_status_t EFIAPI 
> >> efi_exit_boot_services(efi_handle_t image_handle,
> >>
> >>  /* Recalculate CRC32 */
> >>  efi_update_table_header_crc32();
> >> -
> >> -/* Give the payload some time to boot */
> >> -efi_set_watchdog(0);
> >> -schedule();
> >>   out:
> >>  if (IS_ENABLED(CONFIG_EFI_TCG2_PROTOCOL)) {
> >>  if (ret != EFI_SUCCESS)
> >
> > I thought we had rejected going down this path since the UEFI spec is
> > unhelpfully wrong if it insists this?
> 
>  Because, to be clear, stopping hardware watchdogs is not to be done. The
>  one in-tree caller of wdt_stop_all is very questionable. You cannot
>  seriously stop a watchdog until someone else can hopefully resume it as
>  that violates the function of a hardware watchdog. A pure software
>  watchdog is one thing, and a hardware watchdog is another. I feel like
>  the most likely answer here is that someone needs to, still, push back
>  to the UEFI specification to get hardware watchdogs better understood
>  and handled, as it must never be stopped once started and if you cannot
>  reach the next stage in time, that's an engineering issue to resolve. My
>  first guess is that ExitBootServices should service the watchdog one
>  last time to ensure the largest window of time for the OS to take over
>  servicing of the watchdog.
> 
> >>>
> >>> There's two scenarios I can think of
> >>> 1. After U-Boot is done it can disable the hardware watchdog.
> >>> The kernel will go through the EFI-stub -> kernel proper -> watchdog
> >>> gets re-initialized.  In that case you are *hoping* that device won't
> >>> hang in the efi-stub or until the wd is up again.
> >>> 2. EFI makes sure the hardware wd gets configured with the highest allowed
> >>> value.  The efi-stub doesn't have any driver to refresh the wd, so we
> >>> will again rely on the wd driver coming up and refreshing the timers.
> >>
> >> You cannot stop the hardware watchdog, period. I think in the previous
> >> thread about this it was noted that some hardware watchdogs cannot be
> >> disabled, it's not function that the watchdog supports. Someone needs to
> >> go and talk with the UEFI specification people and get this addressed.
> >> There is no sane path for "disable the hardware watchdog".
> >>
> >
> > Indeed.
> >
> > But I think one reasonable thing to do would be to say "ok, the payload
> > is now ready to assume responsibility, so on the U-Boot side we stop
> > _petting_ the watchdog(s)" (i.e. nowadays that would mean deregistering
> > them from the cyclic framework), even if the payload still performs
> > calls into U-Boot where we would otherwise use the opportunity to feed
> > the watchdog. And of course it's reasonable in that case to do one last
> > ping. Because it's also a recipe for disaster if, say, both the payload
> > and U-Boot toggles the same gpio or frobs the same SOC registers.
> >
> > Unrelated, but does 

[PATCH V4 11/14] arm: dts: iot2050: Optionally embed OTP programming data into image

[Jan Kiszka]

From: Jan Kiszka 

Use external blob otpcmd.bin to replace the 0xff filled OTP programming
command block to create a firmware image that provisions the OTP on
first boot. This otpcmd.bin is generated from the customer keys using
steps described in the meta-iot2050 integration layer for the device.

Based on original patch by Baocheng Su.

Signed-off-by: Jan Kiszka 
---
 arch/arm/dts/k3-am65-iot2050-boot-image.dtsi | 8 
 board/siemens/iot2050/Kconfig| 7 +++
 doc/board/siemens/iot2050.rst| 8 
 tools/binman/missing-blob-help   | 8 
 4 files changed, 31 insertions(+)

diff --git a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi 
b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
index 9082a79a034..25a22a7b7b8 100644
--- a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
+++ b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
@@ -111,10 +111,18 @@
};
 
/* OTP update command block */
+#if CONFIG_IOT2050_EMBED_OTPCMD
+   blob-ext@0x6c {
+   offset = <0x6c>;
+   size   = <0x01>;
+   filename = "otpcmd.bin";
+   missing-msg = "iot2050-otpcmd";
+#else
fill@0x6c {
offset = <0x6c>;
size   = <0x01>;
fill-byte = [ff];
+#endif
};
};
 };
diff --git a/board/siemens/iot2050/Kconfig b/board/siemens/iot2050/Kconfig
index a2b40881d11..e66b2427d95 100644
--- a/board/siemens/iot2050/Kconfig
+++ b/board/siemens/iot2050/Kconfig
@@ -49,4 +49,11 @@ config IOT2050_BOOT_SWITCH
bool "Disable eMMC boot via USER button (Advanced version only)"
default y
 
+config IOT2050_EMBED_OTPCMD
+   bool "Embed OTP programming data"
+   help
+ Embed signed OTP programming data 'otpcmd.bin' into the firmware
+ image. This data will be evaluated and executed on first boot of the
+ device.
+
 endif
diff --git a/doc/board/siemens/iot2050.rst b/doc/board/siemens/iot2050.rst
index 4e0925c72c9..cb49a0e36bf 100644
--- a/doc/board/siemens/iot2050.rst
+++ b/doc/board/siemens/iot2050.rst
@@ -27,6 +27,14 @@ The following binaries from that source need to be present 
in the build folder:
  - seboot_pg1.bin
  - seboot_pg2.bin
 
+For building an image containing the OTP key provisioning data, below binary
+needs to be present in the build folder:
+
+ - otpcmd.bin
+
+Regarding how to generating this otpcmd.bin, please refer to:
+https://github.com/siemens/meta-iot2050/tree/master/recipes-bsp/secure-boot-otp-provisioning/files/make-otpcmd.sh
+
 Building
 
 
diff --git a/tools/binman/missing-blob-help b/tools/binman/missing-blob-help
index 5bb8961ce03..7e88cd03954 100644
--- a/tools/binman/missing-blob-help
+++ b/tools/binman/missing-blob-help
@@ -23,6 +23,14 @@ See the documentation for IOT2050 board. Your image is 
missing SEBoot
 which is mandatory for board startup. Prebuilt SEBoot located at
 meta-iot2050/tree/master/recipes-bsp/u-boot/files/prebuild/seboot_pg*.bin.
 
+iot2050-otpcmd:
+See the documentation for IOT2050 board. Your image is missing OTP command data
+block which is used for provisioning the customer keys to the board.
+Please refer to
+meta-iot2050/tree/master/recipes-bsp/secure-boot-otp-provisioning/files/make-otpcmd.sh
+for how to generate this binary. If you are not using secure boot or do not
+intend to provision the keys, disable CONFIG_IOT2050_EMBED_OTPCMD.
+
 k3-rti-wdt-firmware:
 If CONFIG_WDT_K3_RTI_LOAD_FW is enabled, a firmware image is needed for
 the R5F core(s) to trigger the system reset. One possible source is
-- 
2.35.3

[PATCH V4 12/14] doc: iot2050: Add a note about the watchdog firmware

[Jan Kiszka]

From: Jan Kiszka 

This is enabled by default, thus should be described as well.

Signed-off-by: Jan Kiszka 
---
 doc/board/siemens/iot2050.rst | 4 
 1 file changed, 4 insertions(+)

diff --git a/doc/board/siemens/iot2050.rst b/doc/board/siemens/iot2050.rst
index cb49a0e36bf..efe94a448a9 100644
--- a/doc/board/siemens/iot2050.rst
+++ b/doc/board/siemens/iot2050.rst
@@ -27,6 +27,10 @@ The following binaries from that source need to be present 
in the build folder:
  - seboot_pg1.bin
  - seboot_pg2.bin
 
+When using the watchdog, a related firmware for the R5 core(s) is needed, e.g.
+https://github.com/siemens/k3-rti-wdt. The name and location of the image is
+configured via CONFIG_WDT_K3_RTI_FW_FILE.
+
 For building an image containing the OTP key provisioning data, below binary
 needs to be present in the build folder:
 
-- 
2.35.3

[PATCH V4 05/14] arm: dts: iot2050: Use the auto generator nodes for fdt

[Jan Kiszka]

From: Su Baocheng 

Refactor according to the entry `fit: Entry containing a FIT` of
document tools/binman/README.entries.

As the generator uses the device tree name for the config description,
board_fit_config_name_match requires a small adjustment as well.

Signed-off-by: Su Baocheng 
[Jan: re-add now required CONFIG_OF_LIST, update config matching]
Signed-off-by: Jan Kiszka 
---
 arch/arm/dts/k3-am65-iot2050-boot-image.dtsi | 44 
 board/siemens/iot2050/board.c|  3 ++
 configs/iot2050_pg1_defconfig|  1 +
 configs/iot2050_pg2_defconfig|  1 +
 4 files changed, 12 insertions(+), 37 deletions(-)

diff --git a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi 
b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
index 3135ad04715..46669576864 100644
--- a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
+++ b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
@@ -32,6 +32,7 @@
 
fit@0x28 {
description = "U-Boot for IOT2050";
+   fit,fdt-list = "of-list";
offset = <0x28>;
images {
u-boot {
@@ -46,32 +47,11 @@
};
};
 
-   fdt-iot2050-basic {
-   description = 
"k3-am6528-iot2050-basic*.dtb";
+   @fdt-SEQ {
+   description = "fdt-NAME";
type = "flat_dt";
arch = "arm64";
compression = "none";
-   blob {
-#ifdef CONFIG_TARGET_IOT2050_A53_PG1
-   filename = 
"arch/arm/dts/k3-am6528-iot2050-basic.dtb";
-#else
-   filename = 
"arch/arm/dts/k3-am6528-iot2050-basic-pg2.dtb";
-#endif
-   };
-   };
-
-   fdt-iot2050-advanced {
-   description = 
"k3-am6548-iot2050-advanced*.dtb";
-   type = "flat_dt";
-   arch = "arm64";
-   compression = "none";
-   blob {
-#ifdef CONFIG_TARGET_IOT2050_A53_PG1
-   filename = 
"arch/arm/dts/k3-am6548-iot2050-advanced.dtb";
-#else
-   filename = 
"arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dtb";
-#endif
-   };
};
 
 #ifdef CONFIG_WDT_K3_RTI_FW_FILE
@@ -89,21 +69,11 @@
};
 
configurations {
-   default = "conf-iot2050-basic";
-
-   conf-iot2050-basic {
-   description = "iot2050-basic";
-   firmware = "u-boot";
-   fdt = "fdt-iot2050-basic";
-#ifdef CONFIG_WDT_K3_RTI_FW_FILE
-   loadables = "k3-rti-wdt-firmware";
-#endif
-   };
-
-   conf-iot2050-advanced {
-   description = "iot2050-advanced";
+   default = "@config-DEFAULT-SEQ";
+   @config-SEQ {
+   description = "NAME";
firmware = "u-boot";
-   fdt = "fdt-iot2050-advanced";
+   fdt = "fdt-SEQ";
 #ifdef CONFIG_WDT_K3_RTI_FW_FILE
loadables = "k3-rti-wdt-firmware";
 #endif
diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c
index dbf893000a7..57d7009e8c7 100644
--- a/board/siemens/iot2050/board.c
+++ b/board/siemens/iot2050/board.c
@@ -154,6 +154,9 @@ int board_fit_config_name_match(const char *name)
struct iot2050_info *info = IOT2050_INFO_DATA;
char upper_name[32];
 
+   /* skip the prefix "k3-am65x8-" */
+   name += 10;
+
if (info->magic != IOT2050_INFO_MAGIC ||
strlen(name) >= sizeof(upper_name))
return -1;
diff --git a/configs/iot2050_pg1_defconfig b/configs/iot2050_pg1_defconfig
index 3dfebedfb97..85f153842cd 100644
--- a/configs/iot2050_pg1_defconfig
+++ b/configs/iot2050_pg1_defconfig
@@ -69,6 +69,7 @@ CONFIG_CMD_TIME=y
 # CONFIG_ISO_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIST="k3-am6528-iot2050-basic k3-am6548-iot2050-advanced"
 CONFIG_SPL_MULTI_DTB_FIT=y
 

[PATCH V4 14/14] iot2050: Refresh defconfigs and activate CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN

[Jan Kiszka]

From: Jan Kiszka 

This feature is desired on the platform.

Signed-off-by: Jan Kiszka 
---
 configs/iot2050_pg1_defconfig | 6 +++---
 configs/iot2050_pg2_defconfig | 7 +++
 2 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/configs/iot2050_pg1_defconfig b/configs/iot2050_pg1_defconfig
index 6c6af35cdee..6f2ab72f921 100644
--- a/configs/iot2050_pg1_defconfig
+++ b/configs/iot2050_pg1_defconfig
@@ -9,6 +9,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SOC_K3_AM654=y
 CONFIG_TARGET_IOT2050_A53_PG1=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8010
 CONFIG_ENV_SIZE=0x2
 CONFIG_ENV_OFFSET=0x68
 CONFIG_ENV_SECT_SIZE=0x2
@@ -23,11 +25,8 @@ CONFIG_ENV_OFFSET_REDUND=0x6a
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_DISTRO_DEFAULTS=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8010
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_LOAD_FIT=y
-# CONFIG_USE_SPL_FIT_GENERATOR is not set
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_BOOTSTAGE=y
 CONFIG_SHOW_BOOT_PROGRESS=y
@@ -147,3 +146,4 @@ CONFIG_WDT=y
 CONFIG_WDT_K3_RTI=y
 CONFIG_WDT_K3_RTI_LOAD_FW=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN=y
diff --git a/configs/iot2050_pg2_defconfig b/configs/iot2050_pg2_defconfig
index 43410160c8a..d2bdeab593b 100644
--- a/configs/iot2050_pg2_defconfig
+++ b/configs/iot2050_pg2_defconfig
@@ -9,6 +9,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SOC_K3_AM654=y
 CONFIG_TARGET_IOT2050_A53_PG2=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8010
 CONFIG_ENV_SIZE=0x2
 CONFIG_ENV_OFFSET=0x68
 CONFIG_ENV_SECT_SIZE=0x2
@@ -23,11 +25,8 @@ CONFIG_ENV_OFFSET_REDUND=0x6a
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_DISTRO_DEFAULTS=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8010
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_LOAD_FIT=y
-# CONFIG_USE_SPL_FIT_GENERATOR is not set
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_BOOTSTAGE=y
 CONFIG_SHOW_BOOT_PROGRESS=y
@@ -76,7 +75,6 @@ CONFIG_SPL_OF_LIST="k3-am65-iot2050-spl"
 CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_REGMAP=y
@@ -148,3 +146,4 @@ CONFIG_WDT=y
 CONFIG_WDT_K3_RTI=y
 CONFIG_WDT_K3_RTI_LOAD_FW=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN=y
-- 
2.35.3

[PATCH V4 04/14] board: siemens: iot2050: Split the build for PG1 and PG2

[Jan Kiszka]

From: Su Baocheng 

Due to different signature keys, the PG1 and the PG2 boards can no
longer use the same FSBL (tiboot3). This makes it impossible anyway to
maintaine a single flash.bin for both variants, so we can also split the
build.

A new target is added to indicates the build is for PG1 vs. PG2 boards.
Hence now the variants have separated defconfig files.

The runtime board_is_sr1() check does make no sense anymore, so remove
it and replace with build time check.

Documentation is updated accordingly. New binary artifacts are already
available via meta-iot2050.

Signed-off-by: Su Baocheng 
[Jan: refactor config option into targets, tweak some wordings]
Signed-off-by: Jan Kiszka 
---
 arch/arm/dts/k3-am65-iot2050-boot-image.dtsi  | 80 ++-
 board/siemens/iot2050/Kconfig | 28 ++-
 board/siemens/iot2050/board.c | 12 +--
 ...ot2050_defconfig => iot2050_pg1_defconfig} |  2 +-
 ...ot2050_defconfig => iot2050_pg2_defconfig} |  5 +-
 doc/board/siemens/iot2050.rst | 15 +++-
 6 files changed, 66 insertions(+), 76 deletions(-)
 copy configs/{iot2050_defconfig => iot2050_pg1_defconfig} (99%)
 rename configs/{iot2050_defconfig => iot2050_pg2_defconfig} (97%)

diff --git a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi 
b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
index 27058370ccc..3135ad04715 100644
--- a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
+++ b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (c) Siemens AG, 2020-2021
+ * Copyright (c) Siemens AG, 2020-2022
  *
  * Authors:
  *   Jan Kiszka 
@@ -17,7 +17,11 @@
 
blob-ext@0x00 {
offset = <0x00>;
-   filename = "tiboot3.bin";
+#ifdef CONFIG_TARGET_IOT2050_A53_PG1
+   filename = "seboot_pg1.bin";
+#else
+   filename = "seboot_pg2.bin";
+#endif
missing-msg = "iot2050-seboot";
};
 
@@ -43,42 +47,30 @@
};
 
fdt-iot2050-basic {
-   description = 
"k3-am6528-iot2050-basic.dtb";
+   description = 
"k3-am6528-iot2050-basic*.dtb";
type = "flat_dt";
arch = "arm64";
compression = "none";
blob {
+#ifdef CONFIG_TARGET_IOT2050_A53_PG1
filename = 
"arch/arm/dts/k3-am6528-iot2050-basic.dtb";
-   };
-   };
-
-   fdt-iot2050-basic-pg2 {
-   description = 
"k3-am6528-iot2050-basic-pg2.dtb";
-   type = "flat_dt";
-   arch = "arm64";
-   compression = "none";
-   blob {
+#else
filename = 
"arch/arm/dts/k3-am6528-iot2050-basic-pg2.dtb";
+#endif
};
};
 
fdt-iot2050-advanced {
-   description = 
"k3-am6548-iot2050-advanced.dtb";
+   description = 
"k3-am6548-iot2050-advanced*.dtb";
type = "flat_dt";
arch = "arm64";
compression = "none";
blob {
+#ifdef CONFIG_TARGET_IOT2050_A53_PG1
filename = 
"arch/arm/dts/k3-am6548-iot2050-advanced.dtb";
-   };
-   };
-
-   fdt-iot2050-advanced-pg2 {
-   description = 
"k3-am6548-iot2050-advanced-pg2.dtb";
-   type = "flat_dt";
-   arch = "arm64";
-   compression = "none";
-   blob {
+#else
filename = 
"arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dtb";
+#endif
};
};
 
@@ -108,30 +100,12 @@
 #endif
};
 
-   conf-iot2050-basic-pg2 {
-   description = "iot2050-basic-pg2";
-   firmware = "u-boot";
-   fdt = "fdt-iot2050-basic-pg2";
-#ifdef CONFIG_WDT_K3_RTI_FW_FILE
- 

[PATCH V4 03/14] tools: Add script for converting public key into device tree include

[Jan Kiszka]

From: Jan Kiszka 

Allows to create a public key device tree dtsi for inclusion into U-Boot
SPL and proper during first build already. This can be achieved via
CONFIG_DEVICE_TREE_INCLUDES.

Signed-off-by: Jan Kiszka 
---
 tools/key2dtsi.py | 64 +++
 1 file changed, 64 insertions(+)
 create mode 100755 tools/key2dtsi.py

diff --git a/tools/key2dtsi.py b/tools/key2dtsi.py
new file mode 100755
index 000..1dbb2cc94bf
--- /dev/null
+++ b/tools/key2dtsi.py
@@ -0,0 +1,64 @@
+#!/usr/bin/env python3
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Public key to dtsi converter.
+#
+# Copyright (c) Siemens AG, 2022
+#
+
+from argparse import ArgumentParser, FileType
+from os.path import basename, splitext
+from Cryptodome.PublicKey import RSA
+from Cryptodome.Util.number import inverse
+
+def int_to_bytestr(n, length=None):
+if not length:
+length = (n.bit_length() + 7) // 8
+byte_array = n.to_bytes(length, 'big')
+return ' '.join(['{:02x}'.format(byte) for byte in byte_array])
+
+ap = ArgumentParser(description='Public key to dtsi converter')
+
+ap.add_argument('--hash', '-H', default='sha256',
+help='hash to be used with key (default: sha256)')
+ap.add_argument('--required-conf', '-c', action='store_true',
+help='mark key required for configuration')
+ap.add_argument('--required-image', '-i', action='store_true',
+help='mark key required for image')
+ap.add_argument('--spl', '-s', action='store_true',
+help='mark key for usage in SPL')
+ap.add_argument('key_file', metavar='KEY_FILE', type=FileType('r'),
+help='key file (formats: X.509, PKCS#1, OpenSSH)')
+ap.add_argument('dtsi_file', metavar='DTSI_FILE', type=FileType('w'),
+help='dtsi output file')
+
+args = ap.parse_args()
+
+key_name, _ = splitext(basename(args.key_file.name))
+
+key_data = args.key_file.read()
+key = RSA.importKey(key_data)
+
+r_squared = (2**key.size_in_bits())**2 % key.n
+n0_inverse = 2**32 - inverse(key.n, 2**32)
+
+out = args.dtsi_file
+out.write('/ {\n')
+out.write('\tsignature {\n')
+out.write('\t\tkey-{} {{\n'.format(key_name))
+out.write('\t\t\tkey-name-hint = "{}";\n'.format(key_name))
+out.write('\t\t\talgo = "{},rsa{}";\n'.format(args.hash, key.size_in_bits()))
+out.write('\t\t\trsa,num-bits = <{}>;\n'.format(key.size_in_bits()))
+out.write('\t\t\trsa,modulus = [{}];\n'.format(int_to_bytestr(key.n)))
+out.write('\t\t\trsa,exponent = [{}];\n'.format(int_to_bytestr(key.e, 8)))
+out.write('\t\t\trsa,r-squared = [{}];\n'.format(int_to_bytestr(r_squared)))
+out.write('\t\t\trsa,n0-inverse = <0x{:x}>;\n'.format(n0_inverse))
+if args.required_conf:
+out.write('\t\t\trequired = "conf";\n')
+elif args.required_image:
+out.write('\t\t\trequired = "image";\n')
+if args.spl:
+out.write('\t\t\tu-boot,dm-spl;\n')
+out.write('\t\t};\n')
+out.write('\t};\n')
+out.write('};\n')
-- 
2.35.3