Re: [RFC PATCH v3] doc: arch: Add document for RISC-V architecture

2023-02-18 Thread Yu-Chien Peter Lin
On Fri, Feb 17, 2023 at 02:26:17PM +0100, Heinrich Schuchardt wrote:
> On 2/14/23 11:18, Yu Chien Peter Lin wrote:
> > This patch adds a brief introduction to the RISC-V architecture and
> > the typical boot process used on a variety of RISC-V platforms.
> > 
> > Signed-off-by: Yu Chien Peter Lin 
> > Reviewed-by: Samuel Holland 
> > Reviewed-by: Simon Glass 
> > Reviewed-by: Rick Chen 
> > ---
> > Changes v1 -> v2
> > - Use 'boot phases' rather than 'boot stages'
> > - Pick up Samuel and Simon's RB tags
> > Changes v2 -> v3
> > - Follow the suggestion by Heinrich [1]
> > - Add the document as an entry of Andes maintainer in MAINTAINERS
> > - Add some pointers to OpenSBI document
> > 
> > [1] 
> > https://patchwork.ozlabs.org/project/uboot/patch/20230212070053.14800-1-peter...@andestech.com/
> > ---
> >   MAINTAINERS|  1 +
> >   doc/arch/index.rst |  1 +
> >   doc/arch/riscv.rst | 74 ++
> >   3 files changed, 76 insertions(+)
> >   create mode 100644 doc/arch/riscv.rst
> > 
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index b9c505d5fa..5eb79faf29 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -1292,6 +1292,7 @@ S:Maintained
> >   T:git https://source.denx.de/u-boot/custodians/u-boot-riscv.git
> >   F:arch/riscv/
> >   F:cmd/riscv/
> > +F: doc/arch/riscv.rst
> >   F:doc/usage/sbi.rst
> >   F:drivers/sysreset/sysreset_sbi.c
> >   F:drivers/timer/andes_plmt_timer.c
> > diff --git a/doc/arch/index.rst b/doc/arch/index.rst
> > index b3e85f9bf3..b8da4b8c8e 100644
> > --- a/doc/arch/index.rst
> > +++ b/doc/arch/index.rst
> > @@ -11,6 +11,7 @@ Architecture-specific doc
> >  m68k
> >  mips
> >  nios2
> > +   riscv
> >  sandbox/index
> >  sh
> >  x86
> > diff --git a/doc/arch/riscv.rst b/doc/arch/riscv.rst
> > new file mode 100644
> > index 00..10bf3e6849
> > --- /dev/null
> > +++ b/doc/arch/riscv.rst
> > @@ -0,0 +1,74 @@
> > +.. SPDX-License-Identifier: GPL-2.0+
> > +.. Copyright (C) 2023, Yu Chien Peter Lin 
> > +
> > +RISC-V
> > +==
> > +
> > +Overview
> > +
> > +
> > +This document outlines the U-Boot boot process for the RISC-V architecture.
> > +RISC-V is an open-source instruction set architecture (ISA) based on the
> > +principles of reduced instruction set computing (RISC). It has been 
> > designed
> > +to be flexible and customizable, allowing it to be adapted to different use
> > +cases, from embedded systems to high performance servers.
> > +
> > +Typical Boot Process
> > +
> > +
> > +U-Boot can run in either M-mode or S-mode, depending on whether it runs 
> > before
> > +the initialization of the firmware providing SBI (Supervisor Binary 
> > Interface).
> > +The firmware is necessary in the RISC-V boot process as it serves as a SEE
> > +(Supervisor Execution Environment) to handle exceptions for the S-mode 
> > U-Boot
> > +or Operating System.
> > +
> > +In between the boot phases, the hartid is passed through the a0 register, 
> > and
> > +the start address of the devicetree is passed through the a1 register.
> > +
> > +As a reference, OpenSBI is an SBI implementation that can be used with 
> > U-Boot
> > +in different modes, see the `OpenSBI firmware document 
> > `_ 
> > for more details.
> > +
> > +M-mode U-Boot
> > +^
> > +
> > +When running in M-mode U-Boot, it will load the payload image (e.g. 
> > `fw_payload 
> > `_)
> > +which contains the firmware and the S-mode Operating System; in this case, 
> > you
> > +can use mkimage to package the payload image into an uImage format, and 
> > boot it
> > +using the bootm command.
> > +
> > +The following diagram illustrates the boot process::
> > +
> > +   <---( M-mode )--><--( S-mode )-->
> > +   +--+   +--+++
> > +   |  U-Boot  |-->| SBI firmware |--->| OS |
> > +   +--+   +--+++
> > +
> > +To examine the boot process with the QEMU virt machine, you can follow the
> > +steps in the "Building U-Boot" section of the following document:
> > +:doc:`../board/emulation/qemu-riscv.rst`
> 
> This patch does not build. '.rst' has to removed here.
> 
> doc/arch/riscv.rst:46:unknown document: ../board/emulation/qemu-riscv.rst
> make[1]: *** [doc/Makefile:70: htmldocs] Error 2
> make: *** [Makefile:2348: htmldocs] Error 2
> 
> Please, execute the build process as described in
> 
> https://u-boot.readthedocs.io/en/latest/build/documentation.html#html-documentation
> 
> for testing your documentation patches.
> 
> I will fix this issue when merging. Thank you for the contribution.

Hi Heinrich,

Thanks for the pointer, I will make sure it builds on my local next time.

Best regards,
Peter Lin

> Best regards
> 
> 

Re: [PULL] u-boot-riscv/master

2023-02-18 Thread Leo Liang
On Fri, Feb 17, 2023 at 10:01:54AM -0500, Tom Rini wrote:
> On Fri, Feb 17, 2023 at 12:12:18PM +, Leo Liang wrote:
> 
> > Hi Tom,
> > 
> > The following changes since commit faac9dee8e0629326dc122f4624fc4897e3f38b0:
> > 
> >   Prepare v2023.04-rc2 (2023-02-13 18:39:15 -0500)
> > 
> > are available in the Git repository at:
> > 
> >   https://source.denx.de/u-boot/custodians/u-boot-riscv.git
> > 
> > for you to fetch changes up to 7574b6476afc1fd76816be6567458f6ca4f44234:
> > 
> >   riscv: binman: Add help message for missing blobs (2023-02-17 19:07:48 
> > +0800)
> > 
> > CI result shows no issue: 
> > https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/15225
> > 
> 
> I've taken this to u-boot/master, but for the rest of the cycle please
> make sure any changes for master are clearly bug fixes, and otherwise
> apply to next instead. Thanks!

Hi Tom,

Understood!
Thanks for merging this!

Best regards,
Leo

> 
> -- 
> Tom




rk3399 boards broken, only partially converted to standard boot? (was Re: [PATCH 71/71] rockchip: Convert rockpro64-rk3399 to use standard boot)

2023-02-18 Thread Vagrant Cascadian
On 2022-12-07, Simon Glass wrote:
> Drop the use of scripts and rely on standard boot for all operation.

This patch, applied as 3891c68ef50eda38d78c95ecd03aed030aa6bb53 broke
booting on pinebook-pro-rk3399, which still tries to "run
distro_bootcmd" but distro_bootcmd is no longer defined... probably
several other rk3399 systems are similarly affected? Maybe other
rockchip systems as well? Reverting the patch fixes booting on the
pinebook-pro-rk3399, at least.

It seems that rockpro64-rk3399 was used as an example, so that
presumably works, but in actuality, this commit only modifies common
files for many rockchip and rk3399 boards and nothing rockpro64-rk3399
specific, so the commit message is a bit misleading.

I am not sure what the best way forward is; to quickly convert all the
other boards in a new patch series, or incrementally shift one system at
a time over (and somehow restore previous behavior in the
meantime?)... as it stands it appears we are left with rk3399 boards
partially converted but broken...

FWIW, I have not confirmed for sure that other boards are broken, so it
might just be pinebook-pro-rk3399 for some reason. I have a few rk3399
based boards I can test to confirm...

live well,
  vagrant


>  include/configs/rk3399_common.h   | 5 +
>  include/configs/rockchip-common.h | 2 ++
>  2 files changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
> index 2f9aee58197..f2c231dd978 100644
> --- a/include/configs/rk3399_common.h
> +++ b/include/configs/rk3399_common.h
> @@ -42,15 +42,12 @@
>  #define ROCKCHIP_DEVICE_SETTINGS
>  #endif
>  
> -#include 
> -#include 
>  #define CONFIG_EXTRA_ENV_SETTINGS \
>   ENV_MEM_LAYOUT_SETTINGS \
>   "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
>   "partitions=" PARTS_DEFAULT \
>   ROCKCHIP_DEVICE_SETTINGS \
> - BOOTENV \
> - BOOTENV_SF \
> + "boot_targets=" BOOT_TARGETS "\0" \
>   "altbootcmd=" \
>   "setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \
>   "run distro_bootcmd\0"
> diff --git a/include/configs/rockchip-common.h 
> b/include/configs/rockchip-common.h
> index 4c964cc3770..5a06365c760 100644
> --- a/include/configs/rockchip-common.h
> +++ b/include/configs/rockchip-common.h
> @@ -67,12 +67,14 @@
>   BOOT_TARGET_PXE(func) \
>   BOOT_TARGET_DHCP(func) \
>   BOOT_TARGET_SF(func)
> +#define BOOT_TARGETS "mmc1 mmc0 nvme scsi usb pxe dhcp spi"
>  #else
>  #define BOOT_TARGET_DEVICES(func) \
>   BOOT_TARGET_MMC(func) \
>   BOOT_TARGET_USB(func) \
>   BOOT_TARGET_PXE(func) \
>   BOOT_TARGET_DHCP(func)
> +#define BOOT_TARGETS "mmc1 mmc0 usb pxe dhcp"
>  #endif
>  
>  #ifdef CONFIG_ARM64
> -- 
> 2.39.0.rc0.267.gcb52ba06e7-goog


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Re: [Patch] net: dwc_eth_qos - works with fixed-phy

2023-02-18 Thread Ramon Fried
On Fri, Feb 17, 2023 at 5:03 AM Marek Vasut  wrote:
>
> On 2/16/23 17:45, Nicole Battenfeld wrote:
> >
> > Am 16.02.23 um 02:39 schrieb Marek Vasut:
> >> On 2/15/23 17:16, Elmar Psilog wrote:
> >>> Let the EQoS in imx8mp handle fixed-phy too.
> >>> Without that patch it lost track to the node to scan
> >>> speed and duplex.
> >>> Patch was created by Marek Vasut, just tested by me.
> >>>
> >>> Signed-off-by: Elmar Psilog 
> >>> ---
> >>> drivers/net/dwc_eth_qos.c
> >>> 1 file changed
> >>
> >> If you were to use 'git format-patch' and 'git send-email', those
> >> tools would generate the correct Subject and diffstat etc. for you.
> >> Also have a look at scripts/checkpatch.pl to validate whether a patch
> >> is correct.
> >>
> >>> diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
> >>> index afc47b56ff..10915d8e47 100644
> >>> --- a/drivers/net/dwc_eth_qos.c
> >>> +++ b/drivers/net/dwc_eth_qos.c
> >>> @@ -785,9 +785,21 @@ static int eqos_start(struct udevice *dev)
> >>>   */
> >>>  if (!eqos->phy) {
> >>>  int addr = -1;
> >>> -   addr = eqos_get_phy_addr(eqos, dev);
> >>> -   eqos->phy = phy_connect(eqos->mii, addr, dev,
> >>> - eqos->config->interface(dev));
> >>> +   ofnode fixed_node;
> >>> +
> >>> +   if (IS_ENABLED(CONFIG_PHY_FIXED)) {
> >>> +   fixed_node =
> >>> ofnode_find_subnode(dev_ofnode(dev),
> >>> +   "fixed-link");
> >>> +   if (ofnode_valid(fixed_node)) {
> >>> +   eqos->phy =
> >>> fixed_phy_create(dev_ofnode(dev));
> >>> +   eqos->phy_of_node = fixed_node;
> >>> +   }
> >>> +   }
> >>> +   if (!eqos->phy) {
> >>> +   addr = eqos_get_phy_addr(eqos, dev);
> >>> +   eqos->phy = phy_connect(eqos->mii, addr, dev,
> >>> eqos->config->interface(dev));
> >>> +   }
> >>> +
> >>>  if (!eqos->phy) {
> >>>  pr_err("phy_connect() failed");
> >>>  goto err_stop_resets;
> >>
> >> +CC Ramon the network maintainer .
> >
> >
> > New attempt: used script to check and fix and used git format-patch.
> >
> > Also base is latest trunk, not v2023.1 as before.
> >
> > Hope this fits your needs, otherwise I afraid I need detailed instruction.
>
> Basically the process is documented at length here:
>
> https://u-boot.readthedocs.io/en/latest/develop/sending_patches.html
>
> which is very much identical to even lengthier Linux patch submission
> guidelines:
>
> https://www.kernel.org/doc/html/latest/process/submitting-patches.html
>
> If you use git send-email , that will do most of the work for you,
> including correct formatting etc. The invocation is something like:
>
> $ git send-email --annotate --to=u-boot@lists.denx.de
> --cc=additional-per...@to.copy --cc=one@more.person -1 
>
> Note that you do have to configure SMTP access in git-config for that to
> work.
>
> You had the patch right very much the first time, except for a few style
> issues, like [Patch] instead of [PATCH] in the subject, patch itself was
> malformed likely due to copy-paste, and the checkpatch issues had to be
> addressed . When sending a new revision, include changelog in the patch
> below the --- below diffstat, and also make sure the Subjects reads
> [PATCH v2], git send-email -v2 does that for you (and -v3 does v3 etc.).
> You're almost there, no worries.
>
> Wait for Ramon to review this patch and then send V2 if needed.
Okay by me, please send a fresh V2 so we can apply it easily.


Re: [PATCH] net: ipv6: IPv6 environment variable cleanup

2023-02-18 Thread Ramon Fried
On Thu, Feb 16, 2023 at 6:39 AM  wrote:
>
> From: Sean Edmond 
>
> Fix "setenv gatewayip6".
>
> Synchronize IPv6 local variables with environment variables
> in netboot_update_env()
>
> Signed-off-by: Sean Edmond 
> ---
>  cmd/net.c   | 23 ++-
>  include/env_flags.h |  2 +-
>  2 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/cmd/net.c b/cmd/net.c
> index 88d53d14d5..0161c87529 100644
> --- a/cmd/net.c
> +++ b/cmd/net.c
> @@ -208,7 +208,7 @@ U_BOOT_CMD(
>
>  static void netboot_update_env(void)
>  {
> -   char tmp[22];
> +   char tmp[44];
>
> if (net_gateway.s_addr) {
> ip_to_string(net_gateway, tmp);
> @@ -269,6 +269,27 @@ static void netboot_update_env(void)
> env_set("ntpserverip", tmp);
> }
>  #endif
> +
> +   if (IS_ENABLED(CONFIG_IPV6)) {
> +   if (!ip6_is_unspecified_addr(_ip6) ||
> +   net_prefix_length != 0) {
> +   sprintf(tmp, "%pI6c", _ip6);
> +   if (net_prefix_length != 0)
> +   sprintf(tmp, "%s/%d", tmp, net_prefix_length);
> +
> +   env_set("ip6addr", tmp);
> +   }
> +
> +   if (!ip6_is_unspecified_addr(_server_ip6)) {
> +   sprintf(tmp, "%pI6c", _server_ip6);
> +   env_set("serverip6", tmp);
> +   }
> +
> +   if (!ip6_is_unspecified_addr(_gateway6)) {
> +   sprintf(tmp, "%pI6c", _gateway6);
> +   env_set("gatewayip6", tmp);
> +   }
> +   }
>  }
>
>  /**
> diff --git a/include/env_flags.h b/include/env_flags.h
> index 6bd574c2bd..7df40c59be 100644
> --- a/include/env_flags.h
> +++ b/include/env_flags.h
> @@ -71,7 +71,7 @@ enum env_flags_varaccess {
>  #define NET6_FLAGS \
> "ip6addr:s," \
> "serverip6:s," \
> -   "gatewayip6:s"
> +   "gatewayip6:s,"
Why is this needed ?
>  #else
>  #define NET6_FLAGS
>  #endif
> --
> 2.39.0
>


Re: [PATCH v3 72/95] net: Add an SPL config for atheros

2023-02-18 Thread Ramon Fried
On Mon, Feb 13, 2023 at 1:33 AM Simon Glass  wrote:
>
> Add a new SPL_PHY_ATHEROS to avoid a build error on am335x_evm with split
> config.
>
> Signed-off-by: Simon Glass 
> ---
>
> (no changes since v1)
>
>  drivers/net/phy/Kconfig | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
> index 5eaff053a09..6806e3c0903 100644
> --- a/drivers/net/phy/Kconfig
> +++ b/drivers/net/phy/Kconfig
> @@ -106,6 +106,9 @@ config PHY_AQUANTIA_FW_NAME
>  config PHY_ATHEROS
> bool "Atheros Ethernet PHYs support"
>
> +config SPL_PHY_ATHEROS
> +   bool "Atheros Ethernet PHYs support (SPL)"
> +
>  config PHY_BROADCOM
> bool "Broadcom Ethernet PHYs support"
>
> --
> 2.39.1.581.gbfd45094c4-goog
>
Reviewed-by: Ramon Fried 


Re: [PATCH 2/2] drivers: net: fsl-mc: fix MAC address fixup procedure

2023-02-18 Thread Ramon Fried
On Thu, Feb 9, 2023 at 6:07 PM Ioana Ciornei  wrote:
>
> In the process of adopting CONFIG_DM_ETH on the DPAA2 based platforms,
> interfaces which were previously defined as "xgmii" were transitioned to
> be defined as "xfi" in the DTS.
> See the commit below for reference:
> commit 87274918f2f4 ("arm: dts: ls2088ardb: add DPMAC and PHY nodes")
>
> Then Vladimir's commit replaced all occurrences of "xfi" with
> "10gbase-r" in an effort to make U-Boot work with the same device tree
> as Linux.
> commit 77b11f760416 ("net: replace the "xfi" phy-mode with "10gbase-r"")
>
> These changes to the phy_interface_t of an Ethernet port meant that the
> mc_fixup_mac_addrs() function was no longer capable to properly fixup
> the MAC addresses. The problem arises from the fact that the hardcoded
> information about an interface (wriop_get_enet_if()) was no longer
> matching any actual device.
>
> For example, the function tried to search for "DPMAC1@xgmii1" by name
> using eth_get_dev_by_name() when only "DPMAC1@10gbase-r" was available.
>
> This function removes the need to rely on the hardcoded information by
> iterating through all the UCLASS_ETH devices which are DPAA2 and request
> a fixup for each of them.
>
> Signed-off-by: Ioana Ciornei 
> ---
>  drivers/net/fsl-mc/mc.c | 31 +--
>  1 file changed, 13 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
> index 4f84403d956c..78a40f285aa2 100644
> --- a/drivers/net/fsl-mc/mc.c
> +++ b/drivers/net/fsl-mc/mc.c
> @@ -29,6 +29,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>
>  #define MC_RAM_BASE_ADDR_ALIGNMENT  (512UL * 1024 * 1024)
>  #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK(~(MC_RAM_BASE_ADDR_ALIGNMENT 
> - 1))
> @@ -383,37 +384,31 @@ static int mc_fixup_dpc_mac_addr(void *blob, int 
> dpmac_id,
>
>  static int mc_fixup_mac_addrs(void *blob, enum mc_fixup_type type)
>  {
> -   int i, err = 0, ret = 0;
> -#define ETH_NAME_LEN 20
> struct udevice *eth_dev;
> -   char ethname[ETH_NAME_LEN];
> -
> -   for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
> -   /* port not enabled */
> -   if (wriop_is_enabled_dpmac(i) != 1)
> -   continue;
> -
> -   snprintf(ethname, ETH_NAME_LEN, "DPMAC%d@%s", i,
> -phy_interface_strings[wriop_get_enet_if(i)]);
> -
> -   eth_dev = eth_get_dev_by_name(ethname);
> -   if (eth_dev == NULL)
> +   int err = 0, ret = 0;
> +   struct uclass *uc;
> +   uint32_t dpmac_id;
> +
> +   uclass_get(UCLASS_ETH, );
> +   uclass_foreach_dev(eth_dev, uc) {
> +   if (!eth_dev->driver || !eth_dev->driver->name ||
> +   strcmp(eth_dev->driver->name, LDPAA_ETH_DRIVER_NAME))
> continue;
>
> +   dpmac_id = ldpaa_eth_get_dpmac_id(eth_dev);
> switch (type) {
> case MC_FIXUP_DPL:
> -   err = mc_fixup_dpl_mac_addr(blob, i, eth_dev);
> +   err = mc_fixup_dpl_mac_addr(blob, dpmac_id, eth_dev);
> break;
> case MC_FIXUP_DPC:
> -   err = mc_fixup_dpc_mac_addr(blob, i, eth_dev);
> +   err = mc_fixup_dpc_mac_addr(blob, dpmac_id, eth_dev);
> break;
> default:
> break;
> }
>
> if (err)
> -   printf("fsl-mc: ERROR fixing mac address for %s\n",
> -  ethname);
> +   printf("fsl-mc: ERROR fixing mac address for %s\n", 
> eth_dev->name);
> ret |= err;
> }
>
> --
> 2.25.1
>
Reviewed-by: Ramon Fried 


Re: [PATCH 3/3] net: ksz9477: add port_probe function to config phy

2023-02-18 Thread Ramon Fried
On Wed, Feb 8, 2023 at 1:37 AM Tim Harvey  wrote:
>
> Add a port_probe function to configure the phy. This leads to
> earlier link negotiation so the port is more likely to be ready
> when used.
>
> Signed-off-by: Tim Harvey 
> ---
>  drivers/net/ksz9477.c | 26 +-
>  1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/net/ksz9477.c b/drivers/net/ksz9477.c
> index 5b0ef78ab93b..6b59b5fcd265 100644
> --- a/drivers/net/ksz9477.c
> +++ b/drivers/net/ksz9477.c
> @@ -337,11 +337,21 @@ static int ksz_port_setup(struct udevice *dev, int port,
> return 0;
>  }
>
> +static int ksz_port_probe(struct udevice *dev, int port, struct phy_device 
> *phy)
> +{
> +   int supported = PHY_GBIT_FEATURES;
> +
> +   /* configure phy */
> +   phy->supported &= supported;
> +   phy->advertising &= supported;
> +
> +   return phy_config(phy);
> +}
> +
>  static int ksz_port_enable(struct udevice *dev, int port, struct phy_device 
> *phy)
>  {
> struct dsa_pdata *pdata = dev_get_uclass_plat(dev);
> struct ksz_dsa_priv *priv = dev_get_priv(dev);
> -   int supported = PHY_GBIT_FEATURES;
> u8 data8;
> int ret;
>
> @@ -365,23 +375,12 @@ static int ksz_port_enable(struct udevice *dev, int 
> port, struct phy_device *phy
> if (port == pdata->cpu_port)
> return 0;
>
> -   /* configure phy */
> -   phy->supported &= supported;
> -   phy->advertising &= supported;
> -   ret = phy_config(phy);
> -   if (ret)
> -   return ret;
> -
> -   ret = phy_startup(phy);
> -   if (ret)
> -   return ret;
> -
> /* start switch */
> ksz_read8(priv->dev, REG_SW_OPERATION, );
> data8 |= SW_START;
> ksz_write8(priv->dev, REG_SW_OPERATION, data8);
>
> -   return 0;
> +   return phy_startup(phy);
>  }
>
>  static void ksz_port_disable(struct udevice *dev, int port, struct 
> phy_device *phy)
> @@ -410,6 +409,7 @@ static void ksz_port_disable(struct udevice *dev, int 
> port, struct phy_device *p
>  }
>
>  static const struct dsa_ops ksz_dsa_ops = {
> +   .port_probe = ksz_port_probe,
> .port_enable = ksz_port_enable,
> .port_disable = ksz_port_disable,
>  };
> --
> 2.25.1
>
Reviewed-by: Ramon Fried 


Re: [PATCH 2/3] net: ksz9477: remove unnecessary variable

2023-02-18 Thread Ramon Fried
On Wed, Feb 8, 2023 at 1:37 AM Tim Harvey  wrote:
>
> We don't do anything useful with the master dev, so remove the variable.
>
> Signed-off-by: Tim Harvey 
> ---
>  drivers/net/ksz9477.c | 5 -
>  1 file changed, 5 deletions(-)
>
> diff --git a/drivers/net/ksz9477.c b/drivers/net/ksz9477.c
> index fecc394e0277..5b0ef78ab93b 100644
> --- a/drivers/net/ksz9477.c
> +++ b/drivers/net/ksz9477.c
> @@ -443,15 +443,10 @@ static int ksz_i2c_probe(struct udevice *dev)
>  {
> struct dsa_pdata *pdata = dev_get_uclass_plat(dev);
> struct ksz_dsa_priv *priv = dev_get_priv(dev);
> -   struct udevice *master = dsa_get_master(dev);
> int i, ret;
> u8 data8;
> u32 id;
>
> -   if (!master)
> -   return -ENODEV;
> -
> -   dev_dbg(dev, "%s %s master:%s\n", __func__, dev->name, master->name);
> dev_set_parent_priv(dev, priv);
>
> ret = i2c_set_chip_offset_len(dev, 2);
> --
> 2.25.1
>
Reviewed-by: Ramon Fried 


Re: [PATCH 1/3] net: ksz9477: remove unnecessary dsa_set_tagging call

2023-02-18 Thread Ramon Fried
On Wed, Feb 8, 2023 at 1:37 AM Tim Harvey  wrote:
>
> packet tagging is not used for this driver so we do not need to
> call dsa_set_tagging.
>
> Signed-off-by: Tim Harvey 
> ---
>  drivers/net/ksz9477.c | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/drivers/net/ksz9477.c b/drivers/net/ksz9477.c
> index fb5c76c600be..fecc394e0277 100644
> --- a/drivers/net/ksz9477.c
> +++ b/drivers/net/ksz9477.c
> @@ -501,8 +501,6 @@ static int ksz_i2c_probe(struct udevice *dev)
> ksz_pwrite8(priv->dev, i, REG_PORT_MSTP_STATE, data8);
> }
>
> -   dsa_set_tagging(dev, 0, 0);
> -
> return 0;
>  };
>
> --
> 2.25.1
>
Reviewed-by: Ramon Fried 


Re: [PATCH v3 59/81] net: Add an SPL config for atheros

2023-02-18 Thread Ramon Fried
On Mon, Feb 6, 2023 at 9:21 PM Simon Glass  wrote:
>
> Add a new SPL_PHY_ATHEROS to avoid a build error on am335x_evm with split
> config.
>
> Signed-off-by: Simon Glass 
> ---
>
> (no changes since v1)
>
>  drivers/net/phy/Kconfig | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
> index 5eaff053a09..6806e3c0903 100644
> --- a/drivers/net/phy/Kconfig
> +++ b/drivers/net/phy/Kconfig
> @@ -106,6 +106,9 @@ config PHY_AQUANTIA_FW_NAME
>  config PHY_ATHEROS
> bool "Atheros Ethernet PHYs support"
>
> +config SPL_PHY_ATHEROS
> +   bool "Atheros Ethernet PHYs support (SPL)"
> +
>  config PHY_BROADCOM
> bool "Broadcom Ethernet PHYs support"
>
> --
> 2.39.1.519.gcb327c4b5f-goog
>
Reviewed-by: Ramon Fried 


Re: [RFC PATCH v2 37/56] net: Add an SPL config for atheros

2023-02-18 Thread Ramon Fried
On Sat, Feb 4, 2023 at 2:36 AM Simon Glass  wrote:
>
> Add a new SPL_PHY_ATHEROS to avoid a build error on am335x_evm with split
> config.
>
> Signed-off-by: Simon Glass 
> ---
>
> (no changes since v1)
>
>  drivers/net/phy/Kconfig | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
> index 5eaff053a09..6806e3c0903 100644
> --- a/drivers/net/phy/Kconfig
> +++ b/drivers/net/phy/Kconfig
> @@ -106,6 +106,9 @@ config PHY_AQUANTIA_FW_NAME
>  config PHY_ATHEROS
> bool "Atheros Ethernet PHYs support"
>
> +config SPL_PHY_ATHEROS
> +   bool "Atheros Ethernet PHYs support (SPL)"
> +
>  config PHY_BROADCOM
> bool "Broadcom Ethernet PHYs support"
>
> --
> 2.39.1.519.gcb327c4b5f-goog
>
Reviewed-by: Ramon Fried 


[PATCH v4 11/11] mtd: nand: raw: rockchip_nfc: fix oobfree offset and description

2023-02-18 Thread Johan Jonker
The MTD framework reserves 1 or 2 bytes for the bad block marker
depending on the bus size. The rockchip_nfc driver currently only
supports a 8 bit bus, but reserves standard 2 bytes for the BBM.
The first free OOB byte is therefore OOB2 at offset 2.
Page address(PA) bytes are moved to the last 4 positions before
ECC. Update the description for U-boot.

Signed-off-by: Johan Jonker 
---
 drivers/mtd/nand/raw/rockchip_nfc.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c 
b/drivers/mtd/nand/raw/rockchip_nfc.c
index ca5e7313..5ca7eeb8 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -487,10 +487,10 @@ static int rk_nfc_write_page_raw(struct mtd_info *mtd,
 *
 *BBM  OOB1 OOB2 OOB3 |..|  PA0  PA1  PA2  PA3
 *
-* The rk_nfc_ooblayout_free() function already has reserved
-* these 4 bytes with:
+* The oobfree structure already has reserved these 4 bytes
+* together with 2 bytes for BBM by reducing it's length:
 *
-* oob_region->offset = NFC_SYS_DATA_SIZE + 2;
+* oobfree[0].length = rknand->metadata_size - 
NFC_SYS_DATA_SIZE - 2;
 */
if (!i)
memcpy(rk_nfc_oob_ptr(chip, i),
@@ -867,7 +867,7 @@ static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct 
nand_chip *chip)
ecc->layout->eccpos[i] = rknand->metadata_size + i;

ecc->layout->oobfree[0].length = rknand->metadata_size - 
NFC_SYS_DATA_SIZE - 2;
-   ecc->layout->oobfree[0].offset = NFC_SYS_DATA_SIZE + 2;
+   ecc->layout->oobfree[0].offset = 2;

return 0;
 }
--
2.20.1



[PATCH v4 10/11] mtd: nand: add support for the Sandisk SDTNQGAMA chip

2023-02-18 Thread Johan Jonker
Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write 
size and 40 bit ecc support

Signed-off-by: Paweł Jarosz 
Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---
 drivers/mtd/nand/raw/nand_ids.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c
index d0cfacc6..22ea5e2f 100644
--- a/drivers/mtd/nand/raw/nand_ids.c
+++ b/drivers/mtd/nand/raw/nand_ids.c
@@ -48,6 +48,9 @@ struct nand_flash_dev nand_flash_ids[] = {
{"TC58NVG6D2 64G 3.3V 8-bit",
{ .id = {0x98, 0xde, 0x94, 0x82, 0x76, 0x56, 0x04, 0x20} },
  SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
+   {"SDTNQGAMA 64G 3.3V 8-bit",
+   { .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x57} },
+ SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
{"SDTNRGAMA 64G 3.3V 8-bit",
{ .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x50} },
  SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
--
2.20.1



[PATCH v4 09/11] mtd: nand: raw: rockchip_nfc: add flash_node to chip structure

2023-02-18 Thread Johan Jonker
Add flash_node to the rockchip_nfc driver chip structure in order
to find the partitions in the add_mtd_partitions_of() function.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
Reviewed-by: Michael Trimarchi 
---
 drivers/mtd/nand/raw/rockchip_nfc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c 
b/drivers/mtd/nand/raw/rockchip_nfc.c
index ab13e52c..ca5e7313 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -934,6 +934,7 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc 
*nfc, int devnum)

nand_set_controller_data(chip, nfc);

+   chip->flash_node = node;
chip->chip_delay = NFC_RB_DELAY_US;
chip->select_chip = rk_nfc_select_chip;
chip->cmd_ctrl = rk_nfc_cmd;
--
2.20.1



[PATCH v4 08/11] mtd: nand: raw: rockchip_nfc: add layout structure

2023-02-18 Thread Johan Jonker
The MTD framework in U-boot is not identical for drivers ported
from Linux. The rockchip_nfc driver was ported with OOB ops functions
while the framework expects a layout structure per chip.
Fix by adding a structure with OOB data and remove unused functions.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
Reviewed-by: Michael Trimarchi 
---
 drivers/mtd/nand/raw/rockchip_nfc.c | 61 ++---
 1 file changed, 20 insertions(+), 41 deletions(-)

diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c 
b/drivers/mtd/nand/raw/rockchip_nfc.c
index a8ec6bfc..ab13e52c 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -814,47 +814,9 @@ static void rk_nfc_disable_clks(struct rk_nfc *nfc)
clk_disable_unprepare(nfc->ahb_clk);
 }

-static int rk_nfc_ooblayout_free(struct mtd_info *mtd, int section,
-struct mtd_oob_region *oob_region)
-{
-   struct nand_chip *chip = mtd_to_nand(mtd);
-   struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
-
-   if (section)
-   return -ERANGE;
-
-   /*
-* The beginning of the OOB area stores the reserved data for the NFC,
-* the size of the reserved data is NFC_SYS_DATA_SIZE bytes.
-*/
-   oob_region->length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2;
-   oob_region->offset = NFC_SYS_DATA_SIZE + 2;
-
-   return 0;
-}
-
-static int rk_nfc_ooblayout_ecc(struct mtd_info *mtd, int section,
-   struct mtd_oob_region *oob_region)
-{
-   struct nand_chip *chip = mtd_to_nand(mtd);
-   struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
-
-   if (section)
-   return -ERANGE;
-
-   oob_region->length = mtd->oobsize - rknand->metadata_size;
-   oob_region->offset = rknand->metadata_size;
-
-   return 0;
-}
-
-static const struct mtd_ooblayout_ops rk_nfc_ooblayout_ops = {
-   .rfree = rk_nfc_ooblayout_free,
-   .ecc = rk_nfc_ooblayout_ecc,
-};
-
 static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct nand_chip *chip)
 {
+   struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
const u8 *strengths = nfc->cfg->ecc_strengths;
struct mtd_info *mtd = nand_to_mtd(chip);
struct nand_ecc_ctrl *ecc = >ecc;
@@ -892,6 +854,21 @@ static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct 
nand_chip *chip)
ecc->steps = mtd->writesize / ecc->size;
ecc->bytes = DIV_ROUND_UP(ecc->strength * fls(8 * chip->ecc.size), 8);

+   if (ecc->bytes * ecc->steps > mtd->oobsize - rknand->metadata_size)
+   return -EINVAL;
+
+   ecc->layout = kzalloc(sizeof(*ecc->layout), GFP_KERNEL);
+   if (!ecc->layout)
+   return -ENOMEM;
+
+   ecc->layout->eccbytes = ecc->bytes * ecc->steps;
+
+   for (i = 0; i < ecc->layout->eccbytes; i++)
+   ecc->layout->eccpos[i] = rknand->metadata_size + i;
+
+   ecc->layout->oobfree[0].length = rknand->metadata_size - 
NFC_SYS_DATA_SIZE - 2;
+   ecc->layout->oobfree[0].offset = NFC_SYS_DATA_SIZE + 2;
+
return 0;
 }

@@ -969,7 +946,6 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc 
*nfc, int devnum)
chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;

-   mtd_set_ooblayout(mtd, _nfc_ooblayout_ops);
rk_nfc_hw_init(nfc);
ret = nand_scan_ident(mtd, nsels, NULL);
if (ret)
@@ -998,13 +974,16 @@ static int rk_nfc_nand_chip_init(ofnode node, struct 
rk_nfc *nfc, int devnum)

if (!nfc->page_buf) {
nfc->page_buf = kzalloc(NFC_MAX_PAGE_SIZE, GFP_KERNEL);
-   if (!nfc->page_buf)
+   if (!nfc->page_buf) {
+   kfree(ecc->layout);
return -ENOMEM;
+   }
}

if (!nfc->oob_buf) {
nfc->oob_buf = kzalloc(NFC_MAX_OOB_SIZE, GFP_KERNEL);
if (!nfc->oob_buf) {
+   kfree(ecc->layout);
kfree(nfc->page_buf);
nfc->page_buf = NULL;
return -ENOMEM;
--
2.20.1



[PATCH v4 07/11] mtd: nand: raw: rockchip_nfc: remove the compatible string "rockchip,rk3308-nfc"

2023-02-18 Thread Johan Jonker
The compatible string for rk3308 has as fallback string "rockchip,rv1108-nfc".
As there is no logic in probe priority between the SoC orientated string
and the fall back, so remove the compatible string "rockchip,rk3308-nfc"
from the driver.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
Reviewed-by: Michael Trimarchi 
---
 drivers/mtd/nand/raw/rockchip_nfc.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c 
b/drivers/mtd/nand/raw/rockchip_nfc.c
index 5d444133..a8ec6bfc 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -1165,10 +1165,6 @@ static const struct udevice_id rk_nfc_id_table[] = {
.compatible = "rockchip,rv1108-nfc",
.data = (unsigned long)_v8_cfg
},
-   {
-   .compatible = "rockchip,rk3308-nfc",
-   .data = (unsigned long)_v8_cfg
-   },
{ /* sentinel */ }
 };

--
2.20.1



[PATCH 4/4 v4] test: add a test for the new tpm_auto_start() function

2023-02-18 Thread Ilias Apalodimas
A prior patch adds a new API function for TPM2.0, which performs
the full startup sequence of the TPM.  Add a selftest for that.

Signed-off-by: Ilias Apalodimas 
---
Changes since v4:
- New patch

 test/dm/tpm.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/test/dm/tpm.c b/test/dm/tpm.c
index 0b46f799591f..8ee17f6a9bc3 100644
--- a/test/dm/tpm.c
+++ b/test/dm/tpm.c
@@ -25,6 +25,11 @@ static int dm_test_tpm(struct unit_test_state *uts)
ut_asserteq_str("init_done=0", buf);

ut_assertok(tpm_init(dev));
+/*
+ * tpm_auto_start will rerun tpm_init, but handles the
+ * -EBUSY return code internally.
+ */
+   ut_assertok(tpm_auto_start(dev));

ut_assert(tpm_report_state(dev, buf, sizeof(buf)));
ut_asserteq_str("init_done=1", buf);
--
2.39.2



[PATCH v4 06/11] mtd: nand: raw: rockchip_nfc: use dev_read_addr_ptr

2023-02-18 Thread Johan Jonker
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so use dev_read_addr_ptr in the rockchip_nfc.c file.

Signed-off-by: Johan Jonker 
Reviewed-By: Michael Trimarchi 
---
 drivers/mtd/nand/raw/rockchip_nfc.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c 
b/drivers/mtd/nand/raw/rockchip_nfc.c
index d016d255..5d444133 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -1180,9 +1180,9 @@ static int rk_nfc_probe(struct udevice *dev)
nfc->cfg = (void *)dev_get_driver_data(dev);
nfc->dev = dev;

-   nfc->regs = (void *)dev_read_addr(dev);
-   if (IS_ERR(nfc->regs)) {
-   ret = PTR_ERR(nfc->regs);
+   nfc->regs = dev_read_addr_ptr(dev);
+   if (!nfc->regs) {
+   ret = -ENODATA;
goto release_nfc;
}

--
2.20.1



[PATCH 3/4 v4] tpm: sandbox: Change the return code when device is already open

2023-02-18 Thread Ilias Apalodimas
All the TPM drivers as well as out TCG TIS API for a TPM2.0 device
return -EBUSY if the device has already been opened.  Adjust
the sandbox TPM do return the same error code.

Signed-off-by: Ilias Apalodimas 
---
Changes since v3:
- New patch. Required for [4/4]

 drivers/tpm/tpm2_tis_sandbox.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tpm/tpm2_tis_sandbox.c b/drivers/tpm/tpm2_tis_sandbox.c
index dd94bdc31fb7..e4004cfcca33 100644
--- a/drivers/tpm/tpm2_tis_sandbox.c
+++ b/drivers/tpm/tpm2_tis_sandbox.c
@@ -810,7 +810,7 @@ static int sandbox_tpm2_open(struct udevice *dev)
struct sandbox_tpm2 *tpm = dev_get_priv(dev);

if (tpm->init_done)
-   return -EIO;
+   return -EBUSY;

tpm->init_done = true;

--
2.39.2



[PATCH 2/4 v4] efi_loader: use tpm_auto_start for the tpm device

2023-02-18 Thread Ilias Apalodimas
A previous commit is adding a new tpm startup functions which
initializes the TPMv2 and performs all the needed selftests.
Since the TPM selftests might be needed depending on the requested
algorithm or functional module use that instead.

Reviewed-by: Simon Glass 
Signed-off-by: Ilias Apalodimas 
---
Changes since v3:
- Added r-b tags by Simon
 lib/efi_loader/efi_tcg2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c
index 918e9a268641..d035a00d98ac 100644
--- a/lib/efi_loader/efi_tcg2.c
+++ b/lib/efi_loader/efi_tcg2.c
@@ -2422,7 +2422,7 @@ efi_status_t efi_tcg2_register(void)
}

/* initialize the TPM as early as possible. */
-   err = tpm_startup(dev, TPM_ST_CLEAR);
+   err = tpm_auto_start(dev);
if (err) {
log_err("TPM startup failed\n");
goto fail;
--
2.39.2



[PATCH 1/4 v4] tpm: add a function that performs selftest + startup

2023-02-18 Thread Ilias Apalodimas
As described in [0] if a command requires use of an untested algorithm
or functional module, the TPM performs the test and then completes the
command actions.

Since we don't check for TPM_RC_NEEDS_TEST (which is the return code of
the TPM in that case) and even if we would, it would complicate our TPM
code for no apparent reason,  add a wrapper function that performs both
the selftest and the startup sequence of the TPM.

It's worth noting that this is implemented on TPMv2.0.  The code for
1.2 would look similar,  but I don't have a device available to test.

[0]
https://trustedcomputinggroup.org/wp-content/uploads/TPM-Rev-2.0-Part-1-Architecture-01.07-2014-03-13.pdf
§12.3 Self-test modes

Signed-off-by: Ilias Apalodimas 
---
Changes since v3:
- Limit comments to 80 columns
- drop extra lines from comments
 include/tpm-v2.h  | 16 
 include/tpm_api.h |  8 
 lib/tpm-v2.c  | 25 +
 lib/tpm_api.c |  8 
 4 files changed, 57 insertions(+)

diff --git a/include/tpm-v2.h b/include/tpm-v2.h
index 737e57551d73..2893783c6ceb 100644
--- a/include/tpm-v2.h
+++ b/include/tpm-v2.h
@@ -688,4 +688,20 @@ u32 tpm2_report_state(struct udevice *dev, uint 
vendor_cmd, uint vendor_subcmd,
 u32 tpm2_enable_nvcommits(struct udevice *dev, uint vendor_cmd,
  uint vendor_subcmd);

+/**
+ * tpm2_auto_start() - start up the TPM and perform selftests.
+ * If a testable function has not been tested and is
+ * requested the TPM2  will return TPM_RC_NEEDS_TEST.
+ *
+ * @param dev  TPM device
+ * Return: TPM2_RC_TESTING, if TPM2 self-test is in progress.
+ * TPM2_RC_SUCCESS, if testing of all functions is complete without
+ * functional failures.
+ * TPM2_RC_FAILURE, if any test failed.
+ * TPM2_RC_INITIALIZE, if the TPM has not gone through the Startup
+ * sequence
+
+ */
+u32 tpm2_auto_start(struct udevice *dev);
+
 #endif /* __TPM_V2_H */
diff --git a/include/tpm_api.h b/include/tpm_api.h
index 8979d9d6df7e..022a8bbaeca6 100644
--- a/include/tpm_api.h
+++ b/include/tpm_api.h
@@ -331,4 +331,12 @@ static inline bool tpm_is_v2(struct udevice *dev)
return IS_ENABLED(CONFIG_TPM_V2) && tpm_get_version(dev) == TPM_V2;
 }

+/**
+ * tpm_auto_start() - start up the TPM and perform selftests
+ *
+ * @param dev  TPM device
+ * Return: return code of the operation (0 = success)
+ */
+u32 tpm_auto_start(struct udevice *dev);
+
 #endif /* __TPM_API_H */
diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c
index 697b982e079f..895b093bcb1a 100644
--- a/lib/tpm-v2.c
+++ b/lib/tpm-v2.c
@@ -44,6 +44,31 @@ u32 tpm2_self_test(struct udevice *dev, enum tpm2_yes_no 
full_test)
return tpm_sendrecv_command(dev, command_v2, NULL, NULL);
 }

+u32 tpm2_auto_start(struct udevice *dev)
+{
+   u32 rc;
+
+   /*
+* the tpm_init() will return -EBUSY if the init has already happened
+* The selftest and startup code can run multiple times with no side
+* effects
+*/
+   rc = tpm_init(dev);
+   if (rc && rc != -EBUSY)
+   return rc;
+   rc = tpm2_self_test(dev, TPMI_YES);
+
+   if (rc == TPM2_RC_INITIALIZE) {
+   rc = tpm2_startup(dev, TPM2_SU_CLEAR);
+   if (rc)
+   return rc;
+
+   rc = tpm2_self_test(dev, TPMI_YES);
+   }
+
+   return rc;
+}
+
 u32 tpm2_clear(struct udevice *dev, u32 handle, const char *pw,
   const ssize_t pw_sz)
 {
diff --git a/lib/tpm_api.c b/lib/tpm_api.c
index 7e8df8795ef3..5b2c11a277cc 100644
--- a/lib/tpm_api.c
+++ b/lib/tpm_api.c
@@ -35,6 +35,14 @@ u32 tpm_startup(struct udevice *dev, enum tpm_startup_type 
mode)
}
 }

+u32 tpm_auto_start(struct udevice *dev)
+{
+   if (tpm_is_v2(dev))
+   return tpm2_auto_start(dev);
+
+   return -ENOSYS;
+}
+
 u32 tpm_resume(struct udevice *dev)
 {
if (tpm_is_v1(dev))
--
2.39.2



[PATCH v4 05/11] rockchip: timer: dw-apb-timer: convert dev_read_addr output to phys_addr_t

2023-02-18 Thread Johan Jonker
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so convert dev_read_addr output to phys_addr_t in the
dw-apb-timer.c file.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---
 drivers/timer/dw-apb-timer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c
index 10f0a9f6..f55a3c54 100644
--- a/drivers/timer/dw-apb-timer.c
+++ b/drivers/timer/dw-apb-timer.c
@@ -23,7 +23,7 @@
 #define DW_APB_CTRL0x8

 struct dw_apb_timer_priv {
-   fdt_addr_t regs;
+   phys_addr_t regs;
struct reset_ctl_bulk resets;
 };

@@ -92,7 +92,7 @@ static int dw_apb_timer_of_to_plat(struct udevice *dev)
if (CONFIG_IS_ENABLED(OF_REAL)) {
struct dw_apb_timer_priv *priv = dev_get_priv(dev);

-   priv->regs = dev_read_addr(dev);
+   priv->regs = (phys_addr_t)dev_read_addr(dev);
}

return 0;
--
2.20.1



[PATCH v4 04/11] rockchip: adc: rockchip-saradc: use dev_read_addr_ptr

2023-02-18 Thread Johan Jonker
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so use dev_read_addr_ptr in the rockchip-saradc.c file.

Signed-off-by: Johan Jonker 
---
 drivers/adc/rockchip-saradc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c
index 760f8fe6..de9298a2 100644
--- a/drivers/adc/rockchip-saradc.c
+++ b/drivers/adc/rockchip-saradc.c
@@ -145,8 +145,8 @@ int rockchip_saradc_of_to_plat(struct udevice *dev)
struct rockchip_saradc_data *data;

data = (struct rockchip_saradc_data *)dev_get_driver_data(dev);
-   priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev);
-   if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) {
+   priv->regs = (struct rockchip_saradc_regs *)dev_read_addr_ptr(dev);
+   if (!priv->regs) {
pr_err("Dev: %s - can't get address!", dev->name);
return -ENODATA;
}
--
2.20.1



[PATCH v4 03/11] core: remap: convert regmap_init_mem_plat() input to phys_addr_t

2023-02-18 Thread Johan Jonker
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so convert regmap_init_mem_plat() input to phys_addr_t in files
that use this function. Also correct struct syscon_base_plat
depending on CONFIG_PHYS_64BIT setting and fix ARRAY_SIZE
divider.

Signed-off-by: Johan Jonker 
---

Changed V4:
  Fix cast and divider in syscon-uclass.c
---
 drivers/core/regmap.c   |  2 +-
 drivers/core/syscon-uclass.c|  4 ++--
 drivers/ram/rockchip/sdram_rk3066.c |  2 +-
 drivers/ram/rockchip/sdram_rk3188.c |  2 +-
 drivers/ram/rockchip/sdram_rk322x.c |  2 +-
 drivers/ram/rockchip/sdram_rk3288.c |  2 +-
 drivers/ram/rockchip/sdram_rk3328.c |  2 +-
 drivers/ram/rockchip/sdram_rk3399.c |  2 +-
 include/regmap.h|  2 +-
 include/syscon.h| 13 +++--
 10 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index e33bb9d7..37da64b2 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -79,7 +79,7 @@ static struct regmap *regmap_alloc(int count)
 }

 #if CONFIG_IS_ENABLED(OF_PLATDATA)
-int regmap_init_mem_plat(struct udevice *dev, fdt_val_t *reg, int count,
+int regmap_init_mem_plat(struct udevice *dev, phys_addr_t *reg, int count,
 struct regmap **mapp)
 {
struct regmap_range *range;
diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c
index 25fdb66e..b557a24f 100644
--- a/drivers/core/syscon-uclass.c
+++ b/drivers/core/syscon-uclass.c
@@ -58,8 +58,8 @@ static int syscon_pre_probe(struct udevice *dev)
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
struct syscon_base_plat *plat = dev_get_plat(dev);

-   return regmap_init_mem_plat(dev, plat->reg, ARRAY_SIZE(plat->reg),
-   >regmap);
+   return regmap_init_mem_plat(dev, (phys_addr_t *)plat->reg,
+   ARRAY_SIZE(plat->reg) / 2, >regmap);
 #else
return regmap_init_mem(dev_ofnode(dev), >regmap);
 #endif
diff --git a/drivers/ram/rockchip/sdram_rk3066.c 
b/drivers/ram/rockchip/sdram_rk3066.c
index a2425f22..9bb26b64 100644
--- a/drivers/ram/rockchip/sdram_rk3066.c
+++ b/drivers/ram/rockchip/sdram_rk3066.c
@@ -801,7 +801,7 @@ static int rk3066_dmc_conv_of_plat(struct udevice *dev)
memcpy(>base, of_plat->rockchip_sdram_params, sizeof(plat->base));
/* RK3066 supports dual-channel, set default channel num to 2. */
plat->num_channels = 1;
-   ret = regmap_init_mem_plat(dev, of_plat->reg,
+   ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
   ARRAY_SIZE(of_plat->reg) / 2, >map);
if (ret)
return ret;
diff --git a/drivers/ram/rockchip/sdram_rk3188.c 
b/drivers/ram/rockchip/sdram_rk3188.c
index 272b1b2d..1838985c 100644
--- a/drivers/ram/rockchip/sdram_rk3188.c
+++ b/drivers/ram/rockchip/sdram_rk3188.c
@@ -867,7 +867,7 @@ static int conv_of_plat(struct udevice *dev)
memcpy(>base, of_plat->rockchip_sdram_params, sizeof(plat->base));
/* rk3188 supports dual-channel, set default channel num to 2 */
plat->num_channels = 1;
-   ret = regmap_init_mem_plat(dev, of_plat->reg,
+   ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
   ARRAY_SIZE(of_plat->reg) / 2, >map);
if (ret)
return ret;
diff --git a/drivers/ram/rockchip/sdram_rk322x.c 
b/drivers/ram/rockchip/sdram_rk322x.c
index 1b204fb5..33599dc5 100644
--- a/drivers/ram/rockchip/sdram_rk322x.c
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -769,7 +769,7 @@ static int conv_of_plat(struct udevice *dev)
memcpy(>base, of_plat->rockchip_sdram_params, sizeof(plat->base));

plat->num_channels = 1;
-   ret = regmap_init_mem_plat(dev, of_plat->reg,
+   ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
   ARRAY_SIZE(of_plat->reg) / 2, >map);
if (ret)
return ret;
diff --git a/drivers/ram/rockchip/sdram_rk3288.c 
b/drivers/ram/rockchip/sdram_rk3288.c
index 83778ad1..1a548da5 100644
--- a/drivers/ram/rockchip/sdram_rk3288.c
+++ b/drivers/ram/rockchip/sdram_rk3288.c
@@ -1029,7 +1029,7 @@ static int conv_of_plat(struct udevice *dev)
memcpy(>base, of_plat->rockchip_sdram_params, sizeof(plat->base));
/* Rk3288 supports dual-channel, set default channel num to 2 */
plat->num_channels = 2;
-   ret = regmap_init_mem_plat(dev, of_plat->reg,
+   ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg,
   ARRAY_SIZE(of_plat->reg) / 2, >map);
if (ret)
return ret;
diff --git a/drivers/ram/rockchip/sdram_rk3328.c 
b/drivers/ram/rockchip/sdram_rk3328.c
index b511c6bf..2427efe0 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -54,7 

[PATCH v4 02/11] include: dm: ofnode: fix headers

2023-02-18 Thread Johan Jonker
When fdt_addr_t and phys_addr_t are split it turns out that
the header don't match the functions, so fix the headers.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
Reviewed-by: Kever Yang 
---
 include/dm/ofnode.h | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index fa986560..287b0c35 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -678,8 +678,8 @@ int ofnode_read_size(ofnode node, const char *propname);
  * @size: Pointer to size of the address
  * Return: address, or FDT_ADDR_T_NONE if not present or invalid
  */
-phys_addr_t ofnode_get_addr_size_index(ofnode node, int index,
-  fdt_size_t *size);
+fdt_addr_t ofnode_get_addr_size_index(ofnode node, int index,
+ fdt_size_t *size);

 /**
  * ofnode_get_addr_size_index_notrans() - get an address/size from a node
@@ -695,8 +695,8 @@ phys_addr_t ofnode_get_addr_size_index(ofnode node, int 
index,
  * @size: Pointer to size of the address
  * Return: address, or FDT_ADDR_T_NONE if not present or invalid
  */
-phys_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index,
-  fdt_size_t *size);
+fdt_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index,
+ fdt_size_t *size);

 /**
  * ofnode_get_addr_index() - get an address from a node
@@ -707,7 +707,7 @@ phys_addr_t ofnode_get_addr_size_index_notrans(ofnode node, 
int index,
  * @index: Index of address to read (0 for first)
  * Return: address, or FDT_ADDR_T_NONE if not present or invalid
  */
-phys_addr_t ofnode_get_addr_index(ofnode node, int index);
+fdt_addr_t ofnode_get_addr_index(ofnode node, int index);

 /**
  * ofnode_get_addr() - get an address from a node
@@ -717,7 +717,7 @@ phys_addr_t ofnode_get_addr_index(ofnode node, int index);
  * @node: node to read from
  * Return: address, or FDT_ADDR_T_NONE if not present or invalid
  */
-phys_addr_t ofnode_get_addr(ofnode node);
+fdt_addr_t ofnode_get_addr(ofnode node);

 /**
  * ofnode_get_size() - get size from a node
@@ -1055,8 +1055,8 @@ const void *ofprop_get_property(const struct ofprop *prop,
  * @sizep: place to put size value (on success)
  * Return: address value, or FDT_ADDR_T_NONE on error
  */
-phys_addr_t ofnode_get_addr_size(ofnode node, const char *propname,
-phys_size_t *sizep);
+fdt_addr_t ofnode_get_addr_size(ofnode node, const char *propname,
+   fdt_size_t *sizep);

 /**
  * ofnode_read_u8_array_ptr() - find an 8-bit array
--
2.20.1



[PATCH v4 01/11] include: fdtdec: decouple fdt_addr_t and phys_addr_t size

2023-02-18 Thread Johan Jonker
The DT specification supports CPUs with both 32-bit and 64-bit addressing
capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled
by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions
with a 64-bit reg property. These partitions synced from Linux end up with
the wrong offset and sizes when only the lower 32-bit is passed.
Decouple the fdt_addr_t and phys_addr_t size as they don't necessary
match.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
Reviewed-by: Kever Yang 
---

Changed V2:
  reword

---

Note:
  Most drivers still assume that FDT and CPU capabilities are identical.
  In order to use these variables a cast is needed.
---
 Kconfig  |  8 
 include/fdtdec.h | 13 +
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/Kconfig b/Kconfig
index a75cce7e..7697dade 100644
--- a/Kconfig
+++ b/Kconfig
@@ -422,11 +422,19 @@ endif # EXPERT

 config PHYS_64BIT
bool "64bit physical address support"
+   select FDT_64BIT
help
  Say Y here to support 64bit physical memory address.
  This can be used not only for 64bit SoCs, but also for
  large physical address extension on 32bit SoCs.

+config FDT_64BIT
+   bool "64bit fdt address support"
+   help
+ Say Y here to support 64bit fdt addresses.
+ This can be used not only for 64bit SoCs, but also
+ for large address extensions on 32bit SoCs.
+
 config HAS_ROM
bool
select BINMAN
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 12355afd..af29ac0c 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -18,15 +18,18 @@
 #include 

 /*
- * A typedef for a physical address. Note that fdt data is always big
+ * Support for 64bit fdt addresses.
+ * This can be used not only for 64bit SoCs, but also
+ * for large address extensions on 32bit SoCs.
+ * Note that fdt data is always big
  * endian even on a litle endian machine.
  */
-typedef phys_addr_t fdt_addr_t;
-typedef phys_size_t fdt_size_t;

 #define FDT_SIZE_T_NONE (-1U)

-#ifdef CONFIG_PHYS_64BIT
+#ifdef CONFIG_FDT_64BIT
+typedef u64 fdt_addr_t;
+typedef u64 fdt_size_t;
 #define FDT_ADDR_T_NONE ((ulong)(-1))

 #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
@@ -35,6 +38,8 @@ typedef phys_size_t fdt_size_t;
 #define cpu_to_fdt_size(reg) cpu_to_be64(reg)
 typedef fdt64_t fdt_val_t;
 #else
+typedef u32 fdt_addr_t;
+typedef u32 fdt_size_t;
 #define FDT_ADDR_T_NONE (-1U)

 #define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
--
2.20.1



[PATCH v4 00/11] Fixes for Rockchip NFC driver part 1

2023-02-18 Thread Johan Jonker
This serie contains fixes for the Rockchip NFC driver,
which was ported to U-boot and merged with little review
and testing it seems.
Part 1 aims at passing the probe function without errors.

Fixed are:
  64bit FDT parsing
  compatible string removal
  add missing layout structure
  add missing flash_node pointer
  add missing chip ID

Changed V4:
  fix cast and divider in syscon-uclass.c

Changed V3:
  use dev_read_addr_ptr
  fix oobfree

Johan Jonker (10):
  include: fdtdec: decouple fdt_addr_t and phys_addr_t size
  include: dm: ofnode: fix headers
  core: remap: convert regmap_init_mem_plat() input to phys_addr_t
  rockchip: adc: rockchip-saradc: use dev_read_addr_ptr
  rockchip: timer: dw-apb-timer: convert dev_read_addr output to
phys_addr_t
  mtd: nand: raw: rockchip_nfc: use dev_read_addr_ptr
  mtd: nand: raw: rockchip_nfc: remove the compatible string
"rockchip,rk3308-nfc"
  mtd: nand: raw: rockchip_nfc: add layout structure
  mtd: nand: raw: rockchip_nfc: add flash_node to chip structure
  mtd: nand: raw: rockchip_nfc: fix oobfree offset and description

Paweł Jarosz (1):
  mtd: nand: add support for the Sandisk SDTNQGAMA chip

 Kconfig |  8 +++
 drivers/adc/rockchip-saradc.c   |  4 +-
 drivers/core/regmap.c   |  2 +-
 drivers/core/syscon-uclass.c|  4 +-
 drivers/mtd/nand/raw/nand_ids.c |  3 ++
 drivers/mtd/nand/raw/rockchip_nfc.c | 78 ++---
 drivers/ram/rockchip/sdram_rk3066.c |  2 +-
 drivers/ram/rockchip/sdram_rk3188.c |  2 +-
 drivers/ram/rockchip/sdram_rk322x.c |  2 +-
 drivers/ram/rockchip/sdram_rk3288.c |  2 +-
 drivers/ram/rockchip/sdram_rk3328.c |  2 +-
 drivers/ram/rockchip/sdram_rk3399.c |  2 +-
 drivers/timer/dw-apb-timer.c|  4 +-
 include/dm/ofnode.h | 16 +++---
 include/fdtdec.h| 13 +++--
 include/regmap.h|  2 +-
 include/syscon.h| 13 ++---
 17 files changed, 76 insertions(+), 83 deletions(-)

--
2.20.1



Re: [PATCH v3 4/5] rockchip: mkimage: Update init size limit

2023-02-18 Thread Jonas Karlman
Hi Johan,

On 2023-02-18 12:48, Johan Jonker wrote:
> 
> 
> On 2/18/23 05:43, Johan Jonker wrote:
>> Hi Jonas,
>>
>> On 2/17/23 21:52, Jonas Karlman wrote:
>>> Sync init size limit from vendor u-boot:
>>
>> This sync might not be correct.
>> Please recheck with each SoC or limit your change to the rk3328 SoC if prove 
>> fails.
>> Could Kever disclose SoC details here?
>>
>> Johan 
>>
>>>
>>>  px30: 12KiB (+2KiB)
>>
>>>  rk3066: 32KiB (+2KiB)
>>
>>
>> On the rk3066 the limitation depends on the bootrom logic and the tpl 
>> location it is loaded in memory:
>>
>> //SPL
>>  flash_boot_size = idb_buf[0].flash_boot_size;
>>  size = flash_boot_size - 5;
>>  if ( size >= 32763 )
>>  flash_boot_size = 10;
>> //TPL
>>  flash_data_size = idb_buf[0].flash_data_size;
>>  if (flash_data_size - 4 >= 61 ||
>>  flash_boot_size < flash_data_size ||
>>  flash_data_size & 3) {
>>  flash_data_size = 4;
>>  }
>>
>>  offset = idb_buf[0].boot_code1_offset + start;
>>
>> ===
>>
>> CONFIG_TPL_TEXT_BASE=0x10080C00
>> TPL/SPL truncated to 2048 = 4 sectors of 512bytes per NAND page.
>> Header size = 4 x 512bytes
>>
>> limit1: flash_data_size - 4 >= 61
>> limit2: flash_boot_size < flash_data_size
>>

Interesting details, not sure from where this is referenced, is this
from the bootrom code?

If my understanding is correct these refer to the same thing:

usBootDataSize = flash_data_size = init_size
usBootCodeSize = flash_boot_size = init_boot_size

With 32KiB limit these would then in extreme case be:

flash_data_size = 4 + 64 = 68 (full use of 32KiB)
flash_boot_size = 68 + 1024 = 1092 (RK_MAX_BOOT_SIZE)

and with a 30KiB limit:

flash_data_size = 4 + 60 = 64 (full use of 30KiB)
flash_boot_size = 68 + 1024 = 1088 (RK_MAX_BOOT_SIZE)

With these limitations I fully understand why the value for rk3066
should not be changed, thanks.

>> ===
>>
>>  usFlashDataSec = (ALIGN(dwLoaderDataSize, 2048)) / SECTOR_SIZE;
>>  usFlashBootSec = (ALIGN(dwLoaderSize, 2048)) / SECTOR_SIZE;
>>
>>  dwSectorNum = 4 + usFlashDataSec + usFlashBootSec;
>>
>>  pSec0->usBootDataSize = usFlashDataSec;
>>  pSec0->usBootCodeSize = usFlashDataSec + usFlashBootSec;
>>
>>>  rk3328: 30KiB (+2KiB)
>>>  rk3568: 60KiB (-16KiB)
>>>
>>> This makes it possible to use latest vendor TPL with RK3328 without
>>> getting a size limit error running the mkimage command.
>>>
>>> Signed-off-by: Jonas Karlman 
>>> ---
>>> v3:
>>> - Sync with vendor u-boot as-is
>>> - Update commit message to include size changes
>>>
>>> v2:
>>> - New patch
>>>
>>>  tools/rkcommon.c | 10 +-
>>>  1 file changed, 5 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/tools/rkcommon.c b/tools/rkcommon.c
>>> index 1f1eaa16752b..630e54b1a54d 100644
>>> --- a/tools/rkcommon.c
>>> +++ b/tools/rkcommon.c
>>> @@ -121,20 +121,20 @@ struct spl_info {
>>>  };
>>>  
>>>  static struct spl_info spl_infos[] = {
>>> -   { "px30", "RK33", 0x2800, false, RK_HEADER_V1 },
>>> +   { "px30", "RK33", 0x4000 - 0x1000, false, RK_HEADER_V1 },
>>> { "rk3036", "RK30", 0x1000, false, RK_HEADER_V1 },
>>
> 
>>> -   { "rk3066", "RK30", 0x8000 - 0x800, true, RK_HEADER_V1 },
>>
>> This is OK.
>>
>>> -   { "rk3128", "RK31", 0x1800, false, RK_HEADER_V1 },
>>
> 
>>> +   { "rk3066", "RK30", 0x8000, true, RK_HEADER_V1 },
>>
>> This wrong.
> 
> This 0x8000 value was introduced in the manufacturer kernel with this patch.
> rockchip: mkimage: add support for rockchip nand boot image
> https://github.com/rockchip-linux/u-boot/commit/6f14746b0c5977b93f126c43b2a80198758399b9>>
>  
> However mainline u-boot for rk3066 makes use of BROM.
> rockchip: rk3188: use boot0 hook to load up SPL in 2 steps
> https://source.denx.de/u-boot/u-boot/-/commit/4d9253fb76f59c6f474ca54fe2d45c5706cd86e3>>
>  
> It follows the same size rules as for rk3188.
> /* spl size 32kb sram - 2kb bootrom */

>From what I could find in datasheet and TRM, the rk3066 have 64KiB sram
and the rk3188 have 32KiB, but I have learned you can not always trust
the datasheet and TRM :-)

> 
> Unless Philipp Tomsich or someone else explains that it should be something 
> different, please keep it as it is.

I fully agree, I will keep the value for rk3066 as it is.

The limit for rk3328 and rk3568 are the only ones I can confirm fixes
existing issues.

rk3328: vendor tpl size is exceeding the current limit of 28KiB
rk3568: only has 64KiB sram, current limit of 76 KiB do not fit

Will limit the change to only include rk3328 and rk3568.

Regards,
Jonas

> 
> Johan
> 
> 
>>
>> printf "%d\n" $(((0x8000 - 0x800 ) / 512))
>> 60 sectors of size 512
>>
>>
>>> +   { "rk3128", "RK31", 0x2000 - 0x800, false, RK_HEADER_V1 },
>>> { "rk3188", "RK31", 0x8000 - 0x800, true, RK_HEADER_V1 },
>>> { "rk322x", "RK32", 0x8000 - 0x1000, false, RK_HEADER_V1 },
>>> { "rk3288", "RK32", 0x8000, false, RK_HEADER_V1 },
>>> { "rk3308", "RK33", 0x4 - 0x1000, false, RK_HEADER_V1 },
>>> -   { "rk3328", 

[PATCH] pci: ecm generic: use dev_read_() interface

2023-02-18 Thread Mayuresh Chitale
Use dev_read_() api instead of the fdtdec API to fetch the host
controller's reg property value. This is similar to the other host
controller drivers such as Sifive, Rockchip etc. Without this change,
enabling CONFIG_OF_LIVE breaks the PCIe enumeration on Qemu Risc-V virt
machine. The issue is described in the link below:

Link: https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/1
Signed-off-by: Mayuresh Chitale 
---
 drivers/pci/pcie_ecam_generic.c | 21 -
 1 file changed, 8 insertions(+), 13 deletions(-)

diff --git a/drivers/pci/pcie_ecam_generic.c b/drivers/pci/pcie_ecam_generic.c
index 1a9f9aec2e..f0effe0001 100644
--- a/drivers/pci/pcie_ecam_generic.c
+++ b/drivers/pci/pcie_ecam_generic.c
@@ -132,19 +132,14 @@ static int pci_generic_ecam_write_config(struct udevice 
*bus, pci_dev_t bdf,
 static int pci_generic_ecam_of_to_plat(struct udevice *dev)
 {
struct generic_ecam_pcie *pcie = dev_get_priv(dev);
-   struct fdt_resource reg_res;
-   DECLARE_GLOBAL_DATA_PTR;
-   int err;
-
-   err = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg",
-  0, _res);
-   if (err < 0) {
-   pr_err("\"reg\" resource not found\n");
-   return err;
-   }
-
-   pcie->size = fdt_resource_size(_res);
-   pcie->cfg_base = map_physmem(reg_res.start, pcie->size, MAP_NOCACHE);
+   fdt_addr_t addr;
+   fdt_size_t size;
+
+   addr = dev_read_addr_size(dev, "reg", );
+   if (addr == FDT_ADDR_T_NONE)
+   return -EINVAL;
+   pcie->size = size;
+   pcie->cfg_base = map_physmem(addr, pcie->size, MAP_NOCACHE);
 
return 0;
 }
-- 
2.34.1



Re: [PATCH v3 4/5] rockchip: mkimage: Update init size limit

2023-02-18 Thread Johan Jonker



On 2/18/23 05:43, Johan Jonker wrote:
> Hi Jonas,
> 
> On 2/17/23 21:52, Jonas Karlman wrote:
>> Sync init size limit from vendor u-boot:
> 
> This sync might not be correct.
> Please recheck with each SoC or limit your change to the rk3328 SoC if prove 
> fails.
> Could Kever disclose SoC details here?
> 
> Johan 
> 
>>
>>  px30: 12KiB (+2KiB)
> 
>>  rk3066: 32KiB (+2KiB)
> 
> 
> On the rk3066 the limitation depends on the bootrom logic and the tpl 
> location it is loaded in memory:
> 
> //SPL
>   flash_boot_size = idb_buf[0].flash_boot_size;
>   size = flash_boot_size - 5;
>   if ( size >= 32763 )
>   flash_boot_size = 10;
> //TPL
>   flash_data_size = idb_buf[0].flash_data_size;
>   if (flash_data_size - 4 >= 61 ||
>   flash_boot_size < flash_data_size ||
>   flash_data_size & 3) {
>   flash_data_size = 4;
>   }
> 
>   offset = idb_buf[0].boot_code1_offset + start;
> 
> ===
> 
> CONFIG_TPL_TEXT_BASE=0x10080C00
> TPL/SPL truncated to 2048 = 4 sectors of 512bytes per NAND page.
> Header size = 4 x 512bytes
> 
> limit1: flash_data_size - 4 >= 61
> limit2: flash_boot_size < flash_data_size
> 
> ===
> 
>   usFlashDataSec = (ALIGN(dwLoaderDataSize, 2048)) / SECTOR_SIZE;
>   usFlashBootSec = (ALIGN(dwLoaderSize, 2048)) / SECTOR_SIZE;
> 
>   dwSectorNum = 4 + usFlashDataSec + usFlashBootSec;
> 
>   pSec0->usBootDataSize = usFlashDataSec;
>   pSec0->usBootCodeSize = usFlashDataSec + usFlashBootSec;
> 
>>  rk3328: 30KiB (+2KiB)
>>  rk3568: 60KiB (-16KiB)
>>
>> This makes it possible to use latest vendor TPL with RK3328 without
>> getting a size limit error running the mkimage command.
>>
>> Signed-off-by: Jonas Karlman 
>> ---
>> v3:
>> - Sync with vendor u-boot as-is
>> - Update commit message to include size changes
>>
>> v2:
>> - New patch
>>
>>  tools/rkcommon.c | 10 +-
>>  1 file changed, 5 insertions(+), 5 deletions(-)
>>
>> diff --git a/tools/rkcommon.c b/tools/rkcommon.c
>> index 1f1eaa16752b..630e54b1a54d 100644
>> --- a/tools/rkcommon.c
>> +++ b/tools/rkcommon.c
>> @@ -121,20 +121,20 @@ struct spl_info {
>>  };
>>  
>>  static struct spl_info spl_infos[] = {
>> -{ "px30", "RK33", 0x2800, false, RK_HEADER_V1 },
>> +{ "px30", "RK33", 0x4000 - 0x1000, false, RK_HEADER_V1 },
>>  { "rk3036", "RK30", 0x1000, false, RK_HEADER_V1 },
> 

>> -{ "rk3066", "RK30", 0x8000 - 0x800, true, RK_HEADER_V1 },
> 
> This is OK.
> 
>> -{ "rk3128", "RK31", 0x1800, false, RK_HEADER_V1 },
> 

>> +{ "rk3066", "RK30", 0x8000, true, RK_HEADER_V1 },
> 
> This wrong.

This 0x8000 value was introduced in the manufacturer kernel with this patch.
rockchip: mkimage: add support for rockchip nand boot image
https://github.com/rockchip-linux/u-boot/commit/6f14746b0c5977b93f126c43b2a80198758399b9

However mainline u-boot for rk3066 makes use of BROM.
rockchip: rk3188: use boot0 hook to load up SPL in 2 steps
https://source.denx.de/u-boot/u-boot/-/commit/4d9253fb76f59c6f474ca54fe2d45c5706cd86e3

It follows the same size rules as for rk3188.
/* spl size 32kb sram - 2kb bootrom */

Unless Philipp Tomsich or someone else explains that it should be something 
different, please keep it as it is.

Johan


> 
> printf "%d\n" $(((0x8000 - 0x800 ) / 512))
> 60 sectors of size 512
> 
> 
>> +{ "rk3128", "RK31", 0x2000 - 0x800, false, RK_HEADER_V1 },
>>  { "rk3188", "RK31", 0x8000 - 0x800, true, RK_HEADER_V1 },
>>  { "rk322x", "RK32", 0x8000 - 0x1000, false, RK_HEADER_V1 },
>>  { "rk3288", "RK32", 0x8000, false, RK_HEADER_V1 },
>>  { "rk3308", "RK33", 0x4 - 0x1000, false, RK_HEADER_V1 },
>> -{ "rk3328", "RK32", 0x8000 - 0x1000, false, RK_HEADER_V1 },
>> +{ "rk3328", "RK32", 0x8000 - 0x800, false, RK_HEADER_V1 },
>>  { "rk3368", "RK33", 0x8000 - 0x1000, false, RK_HEADER_V1 },
>>  { "rk3399", "RK33", 0x3 - 0x2000, false, RK_HEADER_V1 },
>>  { "rv1108", "RK11", 0x1800, false, RK_HEADER_V1 },
>>  { "rv1126", "110B", 0x1 - 0x1000, false, RK_HEADER_V1 },
>> -{ "rk3568", "RK35", 0x14000 - 0x1000, false, RK_HEADER_V2 },
>> +{ "rk3568", "RK35", 0x1 - 0x1000, false, RK_HEADER_V2 },
>>  };
>>  
>>  /**


[PATCH] MAINTAINERS: assign sandbox drivers to SANDBOX

2023-02-18 Thread Heinrich Schuchardt
Drivers should have a maintainer.

Signed-off-by: Heinrich Schuchardt 
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 6f53f9c2f6..a69a226ddf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1335,6 +1335,7 @@ M:Simon Glass 
 S: Maintained
 F: arch/sandbox/
 F: doc/arch/sandbox.rst
+F: drivers/*/*sandbox*.c
 F: include/dt-bindings/*/sandbox*.h
 
 SEAMA
-- 
2.38.1



[PATCH 1/1] sandbox: fix building with CONFIG_SPL_TIMER=y

2023-02-18 Thread Heinrich Schuchardt
Building sandbox_defconfig with CONFIG_SPL_TIMER=y results in an error

include/dm/platdata.h:63:33: error: static assertion failed:
"Cannot use U_BOOT_DRVINFO with of-platdata.
Please use devicetree instead"

Add a missing condition in the sandbox driver.

Signed-off-by: Heinrich Schuchardt 
---
 drivers/timer/sandbox_timer.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/timer/sandbox_timer.c b/drivers/timer/sandbox_timer.c
index c846bfb9f1..278893d1e9 100644
--- a/drivers/timer/sandbox_timer.c
+++ b/drivers/timer/sandbox_timer.c
@@ -66,6 +66,8 @@ U_BOOT_DRIVER(sandbox_timer) = {
 };
 
 /* This is here in case we don't have a device tree */
+#if !CONFIG_IS_ENABLED(OF_PLATDATA) || defined(DT_PLAT_C)
 U_BOOT_DRVINFO(sandbox_timer_non_fdt) = {
.name = "sandbox_timer",
 };
+#endif
-- 
2.38.1



[PATCH 1/1] dm: core: revert "Don't inline dev_read...() calls with of-platdata"

2023-02-18 Thread Heinrich Schuchardt
Compiling sandbox_defconfig with CONFIG_SPL_MMC=y results in

drivers/mmc/mmc-uclass.c:211:
undefined reference to `dev_read_u32_default'

Revert the fraudulent patch.

Fixes: ef79ef21a852 ("dm: core: Don't inline dev_read...() calls with 
of-platdata")
Signed-off-by: Heinrich Schuchardt 
---
 include/dm/read.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/dm/read.h b/include/dm/read.h
index 56ac076c9f..ca1c60e079 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -30,7 +30,7 @@ static inline const struct device_node *dev_np(const struct 
udevice *dev)
 }
 #endif
 
-#if !defined(CONFIG_DM_DEV_READ_INLINE) || CONFIG_IS_ENABLED(OF_PLATDATA)
+#ifndef CONFIG_DM_DEV_READ_INLINE
 /**
  * dev_read_u8() - read a 8-bit integer from a device's DT property
  *
-- 
2.38.1



[PATCH 1/1] sandbox: allow building sandbox_spl with CONFIG_DEBUG

2023-02-18 Thread Heinrich Schuchardt
Building sandbox_spl with CONFIG_DEBUG leads to errors due to missing
symbols:

/usr/bin/ld: common/spl/spl_fit.o: in function `spl_fit_upload_fpga':
common/spl/spl_fit.c:595: undefined reference to `fpga_load'
/usr/bin/ld: test/test-main.o: in function `dm_test_post_run':
test/test-main.c:124: undefined reference to `crc8'
/usr/bin/ld: test/test-main.o: in function `dm_test_pre_run':
test/test-main.c:95: undefined reference to `crc8'
collect2: error: ld returned 1 exit status

This is due to -Og not eliminating unused functions.

Add FPGA and CRC8 support to the defconfig. Sandbox tests for
SPL_FPGA and CRC8 should be created. So enabling these setting
is advised anyway.

Signed-off-by: Heinrich Schuchardt 
---
 configs/sandbox_spl_defconfig | 4 
 1 file changed, 4 insertions(+)

diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index 4e0021a76f..851c3b687a 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -33,6 +33,7 @@ CONFIG_SPL_NO_BSS_LIMIT=y
 CONFIG_HANDOFF=y
 CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_FPGA=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_RTC=y
 CONFIG_CMD_CPU=y
@@ -126,6 +127,8 @@ CONFIG_DM_DEMO=y
 CONFIG_DM_DEMO_SIMPLE=y
 CONFIG_DM_DEMO_SHAPE=y
 CONFIG_SPL_FIRMWARE=y
+CONFIG_DM_FPGA=y
+CONFIG_SANDBOX_FPGA=y
 CONFIG_GPIO_HOG=y
 CONFIG_QCOM_PMIC_GPIO=y
 CONFIG_SANDBOX_GPIO=y
@@ -237,6 +240,7 @@ CONFIG_FS_CRAMFS=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_RSA_VERIFY_WITH_PKEY=y
 CONFIG_TPM=y
+CONFIG_SPL_CRC8=y
 CONFIG_LZ4=y
 CONFIG_ZSTD=y
 CONFIG_ERRNO_STR=y
-- 
2.38.1