[PATCH v2] usb: xhci: Workaround to fix the USB halted endpoint issues

[Venkatesh Yadav Abbarapu]

The xhci host controller driver trying to queue the URB's and it is
getting halted at the endpoint, thereby hitting the BUG_ON's.
Mostly these kind of random issues are seen on faulty boards.
Removing these BUG_ON's from the U-Boot xhci code, as in Linux kernel
xhci code BUG_ON/BUG's are removed entirely.
Please also note, that BUG_ON() is not recommended any more in the Linux
kernel.
Similar issue has been observed on TI AM437x board and they created a patch
in Linux kernel as below
https://patches.linaro.org/project/linux-usb/patch/1390250711-25840-1-git-send-email-ba...@ti.com/

Signed-off-by: Venkatesh Yadav Abbarapu 
---
Changes in v2:
 -Fixed the compilation warning.
---
 drivers/usb/host/xhci-mem.c  | 17 -
 drivers/usb/host/xhci-ring.c | 32 
 drivers/usb/host/xhci.c  |  6 --
 include/usb/xhci.h   |  2 +-
 4 files changed, 9 insertions(+), 48 deletions(-)

diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 72b7530626..0efb4bd7ba 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -36,8 +36,6 @@
  */
 void xhci_flush_cache(uintptr_t addr, u32 len)
 {
-   BUG_ON((void *)addr == NULL || len == 0);
-
flush_dcache_range(addr & ~(CACHELINE_SIZE - 1),
ALIGN(addr + len, CACHELINE_SIZE));
 }
@@ -51,8 +49,6 @@ void xhci_flush_cache(uintptr_t addr, u32 len)
  */
 void xhci_inval_cache(uintptr_t addr, u32 len)
 {
-   BUG_ON((void *)addr == NULL || len == 0);
-
invalidate_dcache_range(addr & ~(CACHELINE_SIZE - 1),
ALIGN(addr + len, CACHELINE_SIZE));
 }
@@ -84,8 +80,6 @@ static void xhci_ring_free(struct xhci_ctrl *ctrl, struct 
xhci_ring *ring)
struct xhci_segment *seg;
struct xhci_segment *first_seg;
 
-   BUG_ON(!ring);
-
first_seg = ring->first_seg;
seg = first_seg->next;
while (seg != first_seg) {
@@ -210,7 +204,6 @@ static void *xhci_malloc(unsigned int size)
size_t cacheline_size = max(XHCI_ALIGNMENT, CACHELINE_SIZE);
 
ptr = memalign(cacheline_size, ALIGN(size, cacheline_size));
-   BUG_ON(!ptr);
memset(ptr, '\0', size);
 
xhci_flush_cache((uintptr_t)ptr, size);
@@ -291,7 +284,6 @@ static struct xhci_segment *xhci_segment_alloc(struct 
xhci_ctrl *ctrl)
struct xhci_segment *seg;
 
seg = malloc(sizeof(struct xhci_segment));
-   BUG_ON(!seg);
 
seg->trbs = xhci_malloc(SEGMENT_SIZE);
seg->dma = xhci_dma_map(ctrl, seg->trbs, SEGMENT_SIZE);
@@ -323,13 +315,11 @@ struct xhci_ring *xhci_ring_alloc(struct xhci_ctrl *ctrl, 
unsigned int num_segs,
struct xhci_segment *prev;
 
ring = malloc(sizeof(struct xhci_ring));
-   BUG_ON(!ring);
 
if (num_segs == 0)
return ring;
 
ring->first_seg = xhci_segment_alloc(ctrl);
-   BUG_ON(!ring->first_seg);
 
num_segs--;
 
@@ -338,7 +328,6 @@ struct xhci_ring *xhci_ring_alloc(struct xhci_ctrl *ctrl, 
unsigned int num_segs,
struct xhci_segment *next;
 
next = xhci_segment_alloc(ctrl);
-   BUG_ON(!next);
 
xhci_link_segments(ctrl, prev, next, link_trbs);
 
@@ -399,7 +388,6 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl)
break;
page_size = page_size >> 1;
}
-   BUG_ON(i == 16);
 
ctrl->page_size = 1 << (i + 12);
buf = memalign(ctrl->page_size, num_sp * ctrl->page_size);
@@ -444,9 +432,7 @@ static struct xhci_container_ctx
struct xhci_container_ctx *ctx;
 
ctx = malloc(sizeof(struct xhci_container_ctx));
-   BUG_ON(!ctx);
 
-   BUG_ON((type != XHCI_CTX_TYPE_DEVICE) && (type != XHCI_CTX_TYPE_INPUT));
ctx->type = type;
ctx->size = (MAX_EP_CTX_NUM + 1) *
CTX_SIZE(xhci_readl(>hccr->cr_hccparams));
@@ -638,7 +624,6 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr 
*hccr,
 struct xhci_input_control_ctx
*xhci_get_input_control_ctx(struct xhci_container_ctx *ctx)
 {
-   BUG_ON(ctx->type != XHCI_CTX_TYPE_INPUT);
return (struct xhci_input_control_ctx *)ctx->bytes;
 }
 
@@ -760,8 +745,6 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
 
virt_dev = ctrl->devs[slot_id];
 
-   BUG_ON(!virt_dev);
-
/* Extract the EP0 and Slot Ctrl */
ep0_ctx = xhci_get_ep_ctx(ctrl, virt_dev->in_ctx, 0);
slot_ctx = xhci_get_slot_ctx(ctrl, virt_dev->in_ctx);
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index c8260cbdf9..5e9273c5a6 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -244,6 +244,7 @@ static int prepare_ring(struct xhci_ctrl *ctrl, struct 
xhci_ring *ep_ring,
return -EINVAL;
case EP_STATE_HALTED:
puts("WARN halted endpoint, queueing URB 

Re: [PATCH 1/1] i2c: designware_i2c: adjust timing calculation

[Heiko Schocher]

Hello Heinrich,

On 11.10.23 06:48, Heinrich Schuchardt wrote:
> In SPL probing of the designware_i2c device on the StarFive VisionFive 2
> board fails with
> 
> dw_i2c: mode 0, ic_clk 100, speed 10,
> period 10 rise 1 fall 1 tlow 5 thigh 4 spk 0
> dw_i2c: bad counts. hcnt = -4 lcnt = 4
> device_probe: i2c@1205 failed to probe -22
> 
> When changing the offset for the high phase from 7 to 1 the device is
> probed correctly.
> 
> Without this fix the memory size of the StarFive VisionFive 2 board cannot
> be read from EEPROM.
> 
> Fixes: e71b6f6622d6 ("i2c: designware_i2c: Rewrite timing calculation")
> Signed-off-by: Heinrich Schuchardt 
> ---
>  drivers/i2c/designware_i2c.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
> index e54de42abc..55e582091c 100644
> --- a/drivers/i2c/designware_i2c.c
> +++ b/drivers/i2c/designware_i2c.c
> @@ -155,10 +155,10 @@ static int dw_i2c_calc_timing(struct dw_i2c *priv, enum 
> i2c_speed_mode mode,
>  
>   /*
>* Back-solve for hcnt and lcnt according to the following equations:
> -  * SCL_High_time = [(HCNT + IC_*_SPKLEN + 7) * ic_clk] + SCL_Fall_time
> +  * SCL_High_time = [(HCNT + IC_*_SPKLEN + 1) * ic_clk] + SCL_Fall_time
>* SCL_Low_time = [(LCNT + 1) * ic_clk] - SCL_Fall_time + SCL_Rise_time
>*/
> - hcnt = min_thigh_cnt - fall_cnt - 7 - spk_cnt;
> + hcnt = min_thigh_cnt - fall_cnt - 1 - spk_cnt;
>   lcnt = min_tlow_cnt - rise_cnt + fall_cnt - 1;
>  
>   if (hcnt < 0 || lcnt < 0) {
> @@ -170,13 +170,13 @@ static int dw_i2c_calc_timing(struct dw_i2c *priv, enum 
> i2c_speed_mode mode,
>* Now add things back up to ensure the period is hit. If it is off,
>* split the difference and bias to lcnt for remainder
>*/
> - tot = hcnt + lcnt + 7 + spk_cnt + rise_cnt + 1;
> + tot = hcnt + lcnt + 1 + spk_cnt + rise_cnt + 1;
>  
>   if (tot < period_cnt) {
>   diff = (period_cnt - tot) / 2;
>   hcnt += diff;
>   lcnt += diff;
> - tot = hcnt + lcnt + 7 + spk_cnt + rise_cnt + 1;
> + tot = hcnt + lcnt + 1 + spk_cnt + rise_cnt + 1;
>   lcnt += period_cnt - tot;
>   }

What are this magic constants? Are they somewhere documented in the RM?

Hmm... and does this may break other boards? Should we have this in
someway configurable?

Tried to look fast in the linux driver... and it seems to me, this
constants depend at least on i2c_speed_mode?

bye,
Heiko
-- 
DENX Software Engineering GmbH,  Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: h...@denx.de

[PATCH v2] patman: Add a 'keep_change_id' setting

[Maxim Cournoyer]

A Change-Id can be useful for traceability purposes, and some projects
may wish to have them preserved.  This change makes it configurable
via a new 'keep_change_id' setting.

Signed-off-by: Maxim Cournoyer 
---

Changes in v2:
- Add missing argument to send parser
- Correctly propagate args.keep_change_id

 tools/patman/__main__.py|  2 ++
 tools/patman/control.py | 12 +---
 tools/patman/patchstream.py | 17 -
 tools/patman/patman.rst | 11 ++-
 tools/patman/test_checkpatch.py | 16 
 5 files changed, 45 insertions(+), 13 deletions(-)

diff --git a/tools/patman/__main__.py b/tools/patman/__main__.py
index 8eba5d3486..197ac1aad1 100755
--- a/tools/patman/__main__.py
+++ b/tools/patman/__main__.py
@@ -103,6 +103,8 @@ send.add_argument('--no-signoff', action='store_false', 
dest='add_signoff',
   default=True, help="Don't add Signed-off-by to patches")
 send.add_argument('--smtp-server', type=str,
   help="Specify the SMTP server to 'git send-email'")
+send.add_argument('--keep-change-id', action='store_true',
+  help='Preserve Change-Id tags in patches to send.')
 
 send.add_argument('patchfiles', nargs='*')
 
diff --git a/tools/patman/control.py b/tools/patman/control.py
index 916ddf8fcf..b292da9dc2 100644
--- a/tools/patman/control.py
+++ b/tools/patman/control.py
@@ -16,11 +16,14 @@ from patman import gitutil
 from patman import patchstream
 from u_boot_pylib import terminal
 
+
 def setup():
 """Do required setup before doing anything"""
 gitutil.setup()
 
-def prepare_patches(col, branch, count, start, end, ignore_binary, signoff):
+
+def prepare_patches(col, branch, count, start, end, ignore_binary, signoff,
+keep_change_id=False):
 """Figure out what patches to generate, then generate them
 
 The patch files are written to the current directory, e.g. 0001_xxx.patch
@@ -35,6 +38,7 @@ def prepare_patches(col, branch, count, start, end, 
ignore_binary, signoff):
 end (int): End patch to use (0=last one in series, 1=one before that,
 etc.)
 ignore_binary (bool): Don't generate patches for binary files
+keep_change_id (bool): Preserve the Change-Id tag.
 
 Returns:
 Tuple:
@@ -59,11 +63,12 @@ def prepare_patches(col, branch, count, start, end, 
ignore_binary, signoff):
 branch, start, to_do, ignore_binary, series, signoff)
 
 # Fix up the patch files to our liking, and insert the cover letter
-patchstream.fix_patches(series, patch_files)
+patchstream.fix_patches(series, patch_files, keep_change_id)
 if cover_fname and series.get('cover'):
 patchstream.insert_cover_letter(cover_fname, series, to_do)
 return series, cover_fname, patch_files
 
+
 def check_patches(series, patch_files, run_checkpatch, verbose, use_tree):
 """Run some checks on a set of patches
 
@@ -166,7 +171,8 @@ def send(args):
 col = terminal.Color()
 series, cover_fname, patch_files = prepare_patches(
 col, args.branch, args.count, args.start, args.end,
-args.ignore_binary, args.add_signoff)
+args.ignore_binary, args.add_signoff,
+keep_change_id=args.keep_change_id)
 ok = check_patches(series, patch_files, args.check_patch,
args.verbose, args.check_patch_use_tree)
 
diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py
index f91669a940..e2e2a83e67 100644
--- a/tools/patman/patchstream.py
+++ b/tools/patman/patchstream.py
@@ -68,6 +68,7 @@ STATE_PATCH_SUBJECT = 1 # In patch subject (first line of 
log for a commit)
 STATE_PATCH_HEADER = 2  # In patch header (after the subject)
 STATE_DIFFS = 3 # In the diff part (past --- line)
 
+
 class PatchStream:
 """Class for detecting/injecting tags in a patch or series of patches
 
@@ -76,7 +77,7 @@ class PatchStream:
 unwanted tags or inject additional ones. These correspond to the two
 phases of processing.
 """
-def __init__(self, series, is_log=False):
+def __init__(self, series, is_log=False, keep_change_id=False):
 self.skip_blank = False  # True to skip a single blank line
 self.found_test = False  # Found a TEST= line
 self.lines_after_test = 0# Number of lines found after TEST=
@@ -86,6 +87,7 @@ class PatchStream:
 self.section = []# The current section...END section
 self.series = series # Info about the patch series
 self.is_log = is_log # True if indent like git log
+self.keep_change_id = keep_change_id  # True to keep Change-Id tags
 self.in_change = None# Name of the change list we are in
 self.change_version = 0  # Non-zero if we are in a change list
 self.change_lines = []   # Lines of the current change
@@ -452,6 +454,8 @@ class PatchStream:
 
  

[PATCH] arm: mvebu: AC5/AC5X: Disable SMBIOS

[Chris Packham]

The RD-AC5X doesn't make use of EFI or SMBIOS. Recently we started seeing
boot failures such as

WARNING: SMBIOS table_address overflow 27f60f020
Failed to write SMBIOS table
initcall failed at event 10/(unknown) (err=-22)
### ERROR ### Please RESET the board ###

The error is because the physical address of the RAM on the AC5X SoC is
above the 32GiB boundary. As we don't need SMBIOS or EFI this can be
safely disabled.

Signed-off-by: Chris Packham 
---
This probably should have been part of the series I sent as
https://lore.kernel.org/u-boot/20231003035800.2626121-1-judge.pack...@gmail.com/
but I didn't have the RD-AC5X board at the time. There is another issue
that's stopping the RD-AC5X board from booting with current master but
with the suspect commit reverted you can see the same SMBIOS issue I was
seeing on the x240.

 configs/mvebu_ac5_rd_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/mvebu_ac5_rd_defconfig b/configs/mvebu_ac5_rd_defconfig
index dbf1e3136cdf..e8fa22b648be 100644
--- a/configs/mvebu_ac5_rd_defconfig
+++ b/configs/mvebu_ac5_rd_defconfig
@@ -85,3 +85,4 @@ CONFIG_USB_ETHER_ASIX88179=y
 CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
+# CONFIG_SMBIOS is not set
-- 
2.42.0

Re: [PATCH 1/3] arm64: Use FEAT_HAFDBS to track dirty pages when available

[Chris Packham]

Hi Marc, Paul,

On Sat, Mar 18, 2023 at 5:23 AM Ying-Chun Liu (PaulLiu)
 wrote:
>
> From: Marc Zyngier 
>
> Some recent arm64 cores have a facility that allows the page
> table walker to track the dirty state of a page. This makes it
> really efficient to perform CMOs by VA as we only need to look
> at dirty pages.
>
> Signed-off-by: Marc Zyngier 
> [ Paul: pick from the Android tree. Rebase to the upstream ]
> Signed-off-by: Ying-Chun Liu (PaulLiu) 
> Cc: Tom Rini 
> Link: 
> https://android.googlesource.com/platform/external/u-boot/+/3c433724e6f830a6b2edd5ec3d4a504794887263

I think this may have caused a regression for the Marvell AC5X
board(s). I found that v2023.07 locked up at boot but v2023.01 was
fine. The lockup seemed to be in the 'Net:' init probably just as the
mvneta driver was being initialised.

A git bisect led me to this change although for this specific change
instead of the lockup I get a crash so maybe I'm actually hitting a
different issue.

Any thoughts as to why this may have caused problems?

> ---
>  arch/arm/cpu/armv8/cache_v8.c  | 16 +++-
>  arch/arm/include/asm/armv8/mmu.h   | 14 ++
>  arch/arm/include/asm/global_data.h |  1 +
>  3 files changed, 26 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
> index 697334086f..4760064ee1 100644
> --- a/arch/arm/cpu/armv8/cache_v8.c
> +++ b/arch/arm/cpu/armv8/cache_v8.c
> @@ -93,6 +93,8 @@ u64 get_tcr(u64 *pips, u64 *pva_bits)
>
> if (el == 1) {
> tcr = TCR_EL1_RSVD | (ips << 32) | TCR_EPD1_DISABLE;
> +   if (gd->arch.has_hafdbs)
> +   tcr |= TCR_HA | TCR_HD;
> } else if (el == 2) {
> tcr = TCR_EL2_RSVD | (ips << 16);
> } else {
> @@ -200,6 +202,9 @@ static void __cmo_on_leaves(void (*cmo_fn)(unsigned long, 
> unsigned long),
> attrs != PTE_BLOCK_MEMTYPE(MT_NORMAL_NC))
> continue;
>
> +   if (gd->arch.has_hafdbs && (pte & (PTE_RDONLY | PTE_DBM)) != 
> PTE_DBM)
> +   continue;
> +
> end = va + BIT(level2shift(level)) - 1;
>
> /* No intersection with RAM? */
> @@ -348,6 +353,9 @@ static void add_map(struct mm_region *map)
> if (va_bits < 39)
> level = 1;
>
> +   if (gd->arch.has_hafdbs)
> +   attrs |= PTE_DBM | PTE_RDONLY;
> +
> map_range(map->virt, map->phys, map->size, level,
>   (u64 *)gd->arch.tlb_addr, attrs);
>  }
> @@ -399,7 +407,13 @@ static int count_ranges(void)
>  __weak u64 get_page_table_size(void)
>  {
> u64 one_pt = MAX_PTE_ENTRIES * sizeof(u64);
> -   u64 size;
> +   u64 size, mmfr1;
> +
> +   asm volatile("mrs %0, id_aa64mmfr1_el1" : "=r" (mmfr1));
> +   if ((mmfr1 & 0xf) == 2)
> +   gd->arch.has_hafdbs = true;
> +   else
> +   gd->arch.has_hafdbs = false;
>
> /* Account for all page tables we would need to cover our memory map 
> */
> size = one_pt * count_ranges();
> diff --git a/arch/arm/include/asm/armv8/mmu.h 
> b/arch/arm/include/asm/armv8/mmu.h
> index 9f58cedb65..98a27db316 100644
> --- a/arch/arm/include/asm/armv8/mmu.h
> +++ b/arch/arm/include/asm/armv8/mmu.h
> @@ -49,10 +49,13 @@
>  #define PTE_TYPE_BLOCK (1 << 0)
>  #define PTE_TYPE_VALID (1 << 0)
>
> -#define PTE_TABLE_PXN  (1UL << 59)
> -#define PTE_TABLE_XN   (1UL << 60)
> -#define PTE_TABLE_AP   (1UL << 61)
> -#define PTE_TABLE_NS   (1UL << 63)
> +#define PTE_RDONLY BIT(7)
> +#define PTE_DBMBIT(51)
> +
> +#define PTE_TABLE_PXN  BIT(59)
> +#define PTE_TABLE_XN   BIT(60)
> +#define PTE_TABLE_AP   BIT(61)
> +#define PTE_TABLE_NS   BIT(63)
>
>  /*
>   * Block
> @@ -99,6 +102,9 @@
>  #define TCR_TG0_16K(2 << 14)
>  #define TCR_EPD1_DISABLE   (1 << 23)
>
> +#define TCR_HA BIT(39)
> +#define TCR_HD BIT(40)
> +
>  #define TCR_EL1_RSVD   (1U << 31)
>  #define TCR_EL2_RSVD   (1U << 31 | 1 << 23)
>  #define TCR_EL3_RSVD   (1U << 31 | 1 << 23)
> diff --git a/arch/arm/include/asm/global_data.h 
> b/arch/arm/include/asm/global_data.h
> index 9e746e380a..eda99b5b41 100644
> --- a/arch/arm/include/asm/global_data.h
> +++ b/arch/arm/include/asm/global_data.h
> @@ -52,6 +52,7 @@ struct arch_global_data {
>  #if defined(CONFIG_ARM64)
> unsigned long tlb_fillptr;
> unsigned long tlb_emerg;
> +   bool has_hafdbs;
>  #endif
>  #endif
>  #ifdef CFG_SYS_MEM_RESERVE_SECURE
> --
> 2.39.2
>

Re: [PATCH 07/26] arm: imx: Check header before calling spl_load_imx_container

[Sean Anderson]

On 10/12/23 12:40, Tom Rini wrote:

On Wed, Oct 11, 2023 at 09:56:07PM -0400, Sean Anderson wrote:

Make sure we have an IMX header before calling spl_load_imx_container,
since if we don't it will fail with -ENOENT. This allows us to fall back to
legacy/raw images if they are also enabled.

To avoid too much bloat, Legacy/Raw images are disabled for the four
configs which only boot from raw MMC.

Future work could include merging imx_container.h with imx8image.h, since
they appear to define mostly the same structures.

Signed-off-by: Sean Anderson 


So, since you mention bloat, this sounds like it's making functional
changes here, but that's not intentional, yes?  Or to ask another way,
is deneb disabling features here, to save space now that it can, or
because they're growing "a bunch" and this reduces the growth?



This is a functional change, one which likely should have been in place from
the start, but a functional change nonetheless. Previously, all non-IMX8 images
(except FITs without FIT_FULL) would be optimized out if the only image load
method supported IMX8 images. With this change, support for these image types
now has an effect.

There are seven boards with SPL_LOAD_IMX_CONTAINER enabled:

imx93_11x11_evk_ld imx8qm_mek imx8qxp_mek giedi imx93_11x11_evk imx8ulp_evk 
deneb

All of these boards also have SPL_RAW_IMAGE_SUPPORT and SPL_LEGACY_IMAGE_FORMAT
enabled as well. However, none have FIT support enabled. Of the six load methods
affected by this patch, only SPL_MMC and SPL_BOOTROM_SUPPORT are enabled with
SPL_LOAD_IMX_CONTAINER. spl_romapi_load_image_seekable does not support legacy
or raw images, so there is no growth. However, mmc_load_image_raw_sector does
support loading legacy/raw images. Since these images could not have been booted
before, I have disabled support for legacy/raw images on these four boards. This
reduces bloat from around 800 bytes to around 200.

--Sean

Re: [PATCH 05/11] arch: mach-k3: introduce basic files to support the am62px SoC family

[Bryan Brattlof]

On October 12, 2023 thus sayeth Bryan Brattlof:
> Introduce the basic functions and definitions needed to properly
> initialize TI's am62p family of SoCs
> 
> Signed-off-by: Bryan Brattlof 
> ---
>  arch/arm/mach-k3/Kconfig  |   6 +-
>  arch/arm/mach-k3/Makefile |   2 +
>  arch/arm/mach-k3/am62p5_init.c| 261 ++
>  arch/arm/mach-k3/am62px/clk-data.c|  10 +
>  arch/arm/mach-k3/am62px/dev-data.c|  50 ++--

These clk and dev file changes should have gone into 02/11 where I added 
everything else.

~Bryan

>  arch/arm/mach-k3/arm64-mmu.c  |   5 +-
>  .../arm/mach-k3/include/mach/am62p_hardware.h |  83 ++
>  arch/arm/mach-k3/include/mach/am62p_spl.h |  49 
>  arch/arm/mach-k3/include/mach/hardware.h  |   4 +
>  arch/arm/mach-k3/include/mach/spl.h   |   4 +
>  10 files changed, 447 insertions(+), 27 deletions(-)
>  create mode 100644 arch/arm/mach-k3/am62p5_init.c
>  create mode 100644 arch/arm/mach-k3/include/mach/am62p_hardware.h
>  create mode 100644 arch/arm/mach-k3/include/mach/am62p_spl.h
> 

Re: [PATCH 04/11] arm: mach-k3: invert logic for split DM firmware config

[Bryan Brattlof]

Hello Again,

On October 12, 2023 thus sayeth Bryan Brattlof:
> Currently for the K3 generation of SoCs there are more SoCs that utilize
> the split firmware approach than the combined DMSC firmware. Invert the
> logic to avoid adding more and more SoCs to this list.
> 
> Signed-off-by: Bryan Brattlof 
> ---
>  arch/arm/mach-k3/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
> index 9168bf842dcaf..9a211871e04ef 100644
> --- a/arch/arm/mach-k3/Kconfig
> +++ b/arch/arm/mach-k3/Kconfig
> @@ -172,7 +172,7 @@ config K3_ATF_LOAD_ADDR
>  
>  config K3_DM_FW
>   bool "Separate DM firmware image"
> - depends on SPL && CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || 
> SOC_K3_AM625 || SOC_K3_AM62A7) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN
> + depends on SPL && CPU_V7R && !(SOC_K3_AM642S || SOC_K3_AM654) && 
> !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN
   ^

No matter how many times I check and verify, I will always find 
something I messed up after I send you patches ;)

The AM642S doesn't exist yet

~Bryan

[PATCH v4 0/1] Empirical testing suggests that the rk3588 variants require additional spi detection handling based on iomux settings.

[John Clark]

Jonas Karlman is currently investigating a more comprehensive spi flash 
detection solution to support all rk3588 iomux variations.
This v4 patch suppresses spi flash support which will be supplied as a 
subsequent patch.

Changes in v4:
- removed SPI support as Jonas Karlman will be providing a comprehensive 
solution to support all rk3588 iomux variations.

Changes in v3:
- The vendor device tree uses "FriendlyElec NanoPC-T6" therefore, use 
FriendlyElec over FriendlyARM.
- Bug: use IS_ENABLED(CONFIG_TARGET_NANOPCT6_RK3588) rather than 
CONFIG_IS_ENABLED(TARGET_NANOPCT6_RK3588)

Changes in v2:
- resync dt from linux next
- config changes:
-CONFIG_PCI_INIT_R=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x6
-CONFIG_REGULATOR_PWM=y
-# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
-CONFIG_SPL_USB_DWC3_GENERIC=y
- added board files:
Kconfig, MAINTAINERS, Makefile, nanopct6-rk3588.c, nanopct6-rk3588.h
- improved BROM_LAST_BOOTSOURCE handling for SPI NOR

John Clark (1):
  board: rockchip: add FriendlyElec NanoPC-T6 rk3588 board

 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi |  36 +
 arch/arm/dts/rk3588-nanopc-t6.dts | 916 ++
 arch/arm/mach-rockchip/rk3588/Kconfig |  46 +
 board/friendlyelec/nanopc-t6-rk3588/Kconfig   |  15 +
 .../friendlyelec/nanopc-t6-rk3588/MAINTAINERS |   9 +
 board/friendlyelec/nanopc-t6-rk3588/Makefile  |   6 +
 .../nanopc-t6-rk3588/nanopc-t6-rk3588.c   |  39 +
 configs/nanopc-t6-rk3588_defconfig| 108 +++
 doc/board/rockchip/rockchip.rst   |   1 +
 include/configs/nanopc-t6-rk3588.h|  15 +
 11 files changed, 1192 insertions(+)
 create mode 100644 arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
 create mode 100644 arch/arm/dts/rk3588-nanopc-t6.dts
 create mode 100644 board/friendlyelec/nanopc-t6-rk3588/Kconfig
 create mode 100644 board/friendlyelec/nanopc-t6-rk3588/MAINTAINERS
 create mode 100644 board/friendlyelec/nanopc-t6-rk3588/Makefile
 create mode 100644 board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c
 create mode 100644 configs/nanopc-t6-rk3588_defconfig
 create mode 100644 include/configs/nanopc-t6-rk3588.h

-- 
2.42.0

[PATCH v4 1/1] board: rockchip: add FriendlyElec NanoPC-T6 rk3588 board

[John Clark]

The NanoPC-T6 is a Rockchip RK3588 based SBC by FriendlyElec.

There are four variants depending on the DRAM size: 4G/32GB eMMC,
8G/64GB eMMC, 16G/16MB SPI NOR, and 16G/256GB eMMC/16MB SPI NOR

Specifications:
CPU: Rockchip RK3588, 4x Cortex-A76 (up to 2.4GHz)
+ 4x Cortex-A55 (up to 1.8GHz)
GPU: Mali-G610 MP4
VPU: 8K@60fps H.265 and VP9 decoder, 8K@30fps H.264 decoder,
 4K@60fps AV1 decoder, 8K@30fps H.264 and H.265 encoder
NPU: 6TOPs, supports INT4/INT8/INT16/FP16
RAM: 64-bit 4GB/8GB/16GB LPDDR4X at 2133MHz
eMMC: 0GB/32GB/64GB/256GB HS400
MicroSD Slot: MicroSD SDR104
PCIe 3.0: M.2 M-Key x1, PCIe 3.0 x4 for NVMe SSDs up to 2,500 MB/s
Ethernet: PCIe 2.5G 2x Ethernet (RTL8125BG)
PCIe 2.1: M.2 E-Key x1, PCIe 2.1 x1 and USB2.0 Host,
  supports M.2 WiFi and Bluetooth
4G Module: MiniPCIe x1, MicroSIM Card Slot x1
Audio Out: 3.5mm jack for stereo headphone output
Audio In: 2.0mm PH-2A connector for analog microphone input
Video Input: standard HDMI input port, up to 4Kp60
2x 4-lane MIPI-CSI, compatible with MIPI V1.2
Video Output: 2x standard HDMI output ports compatible with HDMI2.1,
  HDMI2.0, and HDMI1.4
2x 4-lane MIPI-DSI, compatible with MIPI DPHY 2.0 or CPHY 1.1
USB-A: USB 3.0, Type A
USB-C: Full function USB Type‑C port, DP display up to 4Kp60, USB 3.0
40-pin 2.54mm header connector: up to 2x SPIs, 6x UARTs, 1x I2Cs,
8x PWMs, 2x I2Ss, 28x GPIOs
Debug UART: 3 Pin 2.54mm header, 3V level, 150bps
Onboard IR receiver: 38KHz carrier frequency
RTC Battery: 2 Pin 1.27/1.25mm RTC battery connector for low power
 RTC IC HYM8563TS
5V Fan connector
Working Temperature: 0C to 70C
Power: 5.5*2.1mm DC Jack, 12VDC input
Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case)

Kernel commits:
893c17716d0c ("arm64: dts: rockchip: Add NanoPC T6")
a721e28dfad2 ("arm64: dts: rockchip: Add NanoPC T6 PCIe Ethernet support")
ac76b786cc37 ("arm64: dts: rockchip: Add NanoPC T6 PCIe e-key support")

Signed-off-by: John Clark 

---

Changes in v4:
- removed SPI support as Jonas Karlman will be providing a comprehensive 
solution to support all rk3588 iomux variations.

Changes in v3:
- The vendor device tree uses "FriendlyElec NanoPC-T6" therefore, use 
FriendlyElec over FriendlyARM.
- Bug: use IS_ENABLED(CONFIG_TARGET_NANOPCT6_RK3588) rather than 
CONFIG_IS_ENABLED(TARGET_NANOPCT6_RK3588)

Changes in v2:
- resync dt from linux next
- config changes:
-CONFIG_PCI_INIT_R=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x6
-CONFIG_REGULATOR_PWM=y
-# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
-CONFIG_SPL_USB_DWC3_GENERIC=y
- added board files:
Kconfig, MAINTAINERS, Makefile, nanopct6-rk3588.c, nanopct6-rk3588.h
- improved BROM_LAST_BOOTSOURCE handling for SPI NOR

 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi |  36 +
 arch/arm/dts/rk3588-nanopc-t6.dts | 916 ++
 arch/arm/mach-rockchip/rk3588/Kconfig |  46 +
 board/friendlyelec/nanopc-t6-rk3588/Kconfig   |  15 +
 .../friendlyelec/nanopc-t6-rk3588/MAINTAINERS |   9 +
 board/friendlyelec/nanopc-t6-rk3588/Makefile  |   6 +
 .../nanopc-t6-rk3588/nanopc-t6-rk3588.c   |  39 +
 configs/nanopc-t6-rk3588_defconfig| 108 +++
 doc/board/rockchip/rockchip.rst   |   1 +
 include/configs/nanopc-t6-rk3588.h|  15 +
 11 files changed, 1192 insertions(+)
 create mode 100644 arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
 create mode 100644 arch/arm/dts/rk3588-nanopc-t6.dts
 create mode 100644 board/friendlyelec/nanopc-t6-rk3588/Kconfig
 create mode 100644 board/friendlyelec/nanopc-t6-rk3588/MAINTAINERS
 create mode 100644 board/friendlyelec/nanopc-t6-rk3588/Makefile
 create mode 100644 board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c
 create mode 100644 configs/nanopc-t6-rk3588_defconfig
 create mode 100644 include/configs/nanopc-t6-rk3588.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fba7dfed26..46f6d5225d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -190,6 +190,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \
rk3588-edgeble-neu6a-io.dtb \
rk3588-edgeble-neu6b-io.dtb \
rk3588-evb1-v10.dtb \
+   rk3588-nanopc-t6.dtb \
rk3588s-rock-5a.dtb \
rk3588-rock-5b.dtb
 
diff --git a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi 
b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
new file mode 100644
index 00..87831c9d43
--- /dev/null
+++ b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 John Clark 
+ *
+ */
+
+#include "rk3588-u-boot.dtsi"
+
+/ {
+   chosen {
+   u-boot,spl-boot-order = "same-as-spl", , 
+   };
+};
+
+_pins {
+  

[PATCH] patman: Add a 'keep_change_id' setting

[Maxim Cournoyer]

A Change-Id can be useful for traceability purposes, and some projects
may wish to have them preserved.  This change makes it configurable
via a new 'keep_change_id' setting.

Signed-off-by: Maxim Cournoyer 
---

 tools/patman/control.py |  9 +++--
 tools/patman/patchstream.py | 17 -
 tools/patman/patman.rst | 11 ++-
 tools/patman/test_checkpatch.py | 16 
 4 files changed, 41 insertions(+), 12 deletions(-)

diff --git a/tools/patman/control.py b/tools/patman/control.py
index 916ddf8fcf..29383551ed 100644
--- a/tools/patman/control.py
+++ b/tools/patman/control.py
@@ -16,11 +16,14 @@ from patman import gitutil
 from patman import patchstream
 from u_boot_pylib import terminal
 
+
 def setup():
 """Do required setup before doing anything"""
 gitutil.setup()
 
-def prepare_patches(col, branch, count, start, end, ignore_binary, signoff):
+
+def prepare_patches(col, branch, count, start, end, ignore_binary, signoff,
+keep_change_id=False):
 """Figure out what patches to generate, then generate them
 
 The patch files are written to the current directory, e.g. 0001_xxx.patch
@@ -35,6 +38,7 @@ def prepare_patches(col, branch, count, start, end, 
ignore_binary, signoff):
 end (int): End patch to use (0=last one in series, 1=one before that,
 etc.)
 ignore_binary (bool): Don't generate patches for binary files
+keep_change_id (bool): Preserve the Change-Id tag.
 
 Returns:
 Tuple:
@@ -59,11 +63,12 @@ def prepare_patches(col, branch, count, start, end, 
ignore_binary, signoff):
 branch, start, to_do, ignore_binary, series, signoff)
 
 # Fix up the patch files to our liking, and insert the cover letter
-patchstream.fix_patches(series, patch_files)
+patchstream.fix_patches(series, patch_files, keep_change_id)
 if cover_fname and series.get('cover'):
 patchstream.insert_cover_letter(cover_fname, series, to_do)
 return series, cover_fname, patch_files
 
+
 def check_patches(series, patch_files, run_checkpatch, verbose, use_tree):
 """Run some checks on a set of patches
 
diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py
index f91669a940..4188d0ed35 100644
--- a/tools/patman/patchstream.py
+++ b/tools/patman/patchstream.py
@@ -68,6 +68,7 @@ STATE_PATCH_SUBJECT = 1 # In patch subject (first line of 
log for a commit)
 STATE_PATCH_HEADER = 2  # In patch header (after the subject)
 STATE_DIFFS = 3 # In the diff part (past --- line)
 
+
 class PatchStream:
 """Class for detecting/injecting tags in a patch or series of patches
 
@@ -76,7 +77,7 @@ class PatchStream:
 unwanted tags or inject additional ones. These correspond to the two
 phases of processing.
 """
-def __init__(self, series, is_log=False):
+def __init__(self, series, is_log=False, keep_change_id=False):
 self.skip_blank = False  # True to skip a single blank line
 self.found_test = False  # Found a TEST= line
 self.lines_after_test = 0# Number of lines found after TEST=
@@ -86,6 +87,7 @@ class PatchStream:
 self.section = []# The current section...END section
 self.series = series # Info about the patch series
 self.is_log = is_log # True if indent like git log
+self.keep_change_id = keep_change_id  # True to keep Change-Id tags
 self.in_change = None# Name of the change list we are in
 self.change_version = 0  # Non-zero if we are in a change list
 self.change_lines = []   # Lines of the current change
@@ -452,6 +454,8 @@ class PatchStream:
 
 # Detect Change-Id tags
 elif change_id_match:
+if self.keep_change_id:
+out = [line]
 value = change_id_match.group(1)
 if self.is_log:
 if self.commit.change_id:
@@ -763,7 +767,7 @@ def get_metadata_for_test(text):
 pst.finalise()
 return series
 
-def fix_patch(backup_dir, fname, series, cmt):
+def fix_patch(backup_dir, fname, series, cmt, keep_change_id=False):
 """Fix up a patch file, by adding/removing as required.
 
 We remove our tags from the patch file, insert changes lists, etc.
@@ -776,6 +780,7 @@ def fix_patch(backup_dir, fname, series, cmt):
 fname (str): Filename to patch file to process
 series (Series): Series information about this patch set
 cmt (Commit): Commit object for this patch file
+keep_change_id (bool): Keep the Change-Id tag.
 
 Return:
 list: A list of errors, each str, or [] if all ok.
@@ -783,7 +788,7 @@ def fix_patch(backup_dir, fname, series, cmt):
 handle, tmpname = tempfile.mkstemp()
 outfd = os.fdopen(handle, 'w', encoding='utf-8')
 infd = open(fname, 'r', encoding='utf-8')
-pst = PatchStream(series)
+pst = 

[PATCH 09/11] arm: dts: introduce am62p5 uboot dts files

[Bryan Brattlof]

Include the uboot device tree files needed to boot the board.

Signed-off-by: Bryan Brattlof 
---
 arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi | 2798 
 arch/arm/dts/k3-am62p-sk-binman.dtsi   |  425 +++
 arch/arm/dts/k3-am62p5-r5-sk.dts   |   88 +
 arch/arm/dts/k3-am62p5-sk-u-boot.dtsi  |   14 +
 4 files changed, 3325 insertions(+)
 create mode 100644 arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi
 create mode 100644 arch/arm/dts/k3-am62p-sk-binman.dtsi
 create mode 100644 arch/arm/dts/k3-am62p5-r5-sk.dts
 create mode 100644 arch/arm/dts/k3-am62p5-sk-u-boot.dtsi

diff --git a/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi 
b/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi
new file mode 100644
index 0..b5fdba46a0869
--- /dev/null
+++ b/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi
@@ -0,0 +1,2798 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * This file was generated with the
+ * AM62Px SysConfig DDR Subsystem Register Configuration Tool v0.09.10
+ * Wed Aug 23 2023 17:48:42 GMT-0500 (Central Daylight Time)
+ * DDR Type: LPDDR4
+ * F0 = 50MHzF1 = NA F2 = 1600MHz
+ * Density (per channel): 16Gb
+ * Number of Ranks: 2
+ */
+
+#define DDRSS_PLL_FHS_CNT 5
+#define DDRSS_PLL_FREQUENCY_1 8
+#define DDRSS_PLL_FREQUENCY_2 8
+
+#define DDRSS_CTL_0_DATA 0x0B00
+#define DDRSS_CTL_1_DATA 0x
+#define DDRSS_CTL_2_DATA 0x
+#define DDRSS_CTL_3_DATA 0x
+#define DDRSS_CTL_4_DATA 0x
+#define DDRSS_CTL_5_DATA 0x
+#define DDRSS_CTL_6_DATA 0x
+#define DDRSS_CTL_7_DATA 0x2710
+#define DDRSS_CTL_8_DATA 0x000186A0
+#define DDRSS_CTL_9_DATA 0x0005
+#define DDRSS_CTL_10_DATA 0x0064
+#define DDRSS_CTL_11_DATA 0x0004E200
+#define DDRSS_CTL_12_DATA 0x0030D400
+#define DDRSS_CTL_13_DATA 0x0005
+#define DDRSS_CTL_14_DATA 0x0C80
+#define DDRSS_CTL_15_DATA 0x0004E200
+#define DDRSS_CTL_16_DATA 0x0030D400
+#define DDRSS_CTL_17_DATA 0x0005
+#define DDRSS_CTL_18_DATA 0x0C80
+#define DDRSS_CTL_19_DATA 0x01010100
+#define DDRSS_CTL_20_DATA 0x01010100
+#define DDRSS_CTL_21_DATA 0x01000110
+#define DDRSS_CTL_22_DATA 0x02010002
+#define DDRSS_CTL_23_DATA 0x000A
+#define DDRSS_CTL_24_DATA 0x000186A0
+#define DDRSS_CTL_25_DATA 0x
+#define DDRSS_CTL_26_DATA 0x
+#define DDRSS_CTL_27_DATA 0x
+#define DDRSS_CTL_28_DATA 0x
+#define DDRSS_CTL_29_DATA 0x00020200
+#define DDRSS_CTL_30_DATA 0x
+#define DDRSS_CTL_31_DATA 0x
+#define DDRSS_CTL_32_DATA 0x
+#define DDRSS_CTL_33_DATA 0x
+#define DDRSS_CTL_34_DATA 0x0810
+#define DDRSS_CTL_35_DATA 0x4040
+#define DDRSS_CTL_36_DATA 0x
+#define DDRSS_CTL_37_DATA 0x
+#define DDRSS_CTL_38_DATA 0x
+#define DDRSS_CTL_39_DATA 0x
+#define DDRSS_CTL_40_DATA 0x040C
+#define DDRSS_CTL_41_DATA 0x
+#define DDRSS_CTL_42_DATA 0x1040
+#define DDRSS_CTL_43_DATA 0x
+#define DDRSS_CTL_44_DATA 0x1040
+#define DDRSS_CTL_45_DATA 0x
+#define DDRSS_CTL_46_DATA 0x05000804
+#define DDRSS_CTL_47_DATA 0x0700
+#define DDRSS_CTL_48_DATA 0x09090004
+#define DDRSS_CTL_49_DATA 0x0303
+#define DDRSS_CTL_50_DATA 0x00620011
+#define DDRSS_CTL_51_DATA 0x09110045
+#define DDRSS_CTL_52_DATA 0x421D
+#define DDRSS_CTL_53_DATA 0x00620011
+#define DDRSS_CTL_54_DATA 0x09110045
+#define DDRSS_CTL_55_DATA 0x0900421D
+#define DDRSS_CTL_56_DATA 0x000A0A09
+#define DDRSS_CTL_57_DATA 0x040006DB
+#define DDRSS_CTL_58_DATA 0x090D2005
+#define DDRSS_CTL_59_DATA 0x1710
+#define DDRSS_CTL_60_DATA 0x0C00DB60
+#define DDRSS_CTL_61_DATA 0x090D200D
+#define DDRSS_CTL_62_DATA 0x1710
+#define DDRSS_CTL_63_DATA 0x0C00DB60
+#define DDRSS_CTL_64_DATA 0x0304200D
+#define DDRSS_CTL_65_DATA 0x04050002
+#define DDRSS_CTL_66_DATA 0x1F1E1F1E
+#define DDRSS_CTL_67_DATA 0x01010008
+#define DDRSS_CTL_68_DATA 0x043C3C07
+#define DDRSS_CTL_69_DATA 0x0303
+#define DDRSS_CTL_70_DATA 0x
+#define DDRSS_CTL_71_DATA 0x0101
+#define DDRSS_CTL_72_DATA 0x
+#define DDRSS_CTL_73_DATA 0x0100
+#define DDRSS_CTL_74_DATA 0x00130803
+#define DDRSS_CTL_75_DATA 0x00BB
+#define DDRSS_CTL_76_DATA 0x0260
+#define DDRSS_CTL_77_DATA 0x1858
+#define DDRSS_CTL_78_DATA 0x0260
+#define DDRSS_CTL_79_DATA 0x1858
+#define DDRSS_CTL_80_DATA 0x0005
+#define DDRSS_CTL_81_DATA 0x000A
+#define DDRSS_CTL_82_DATA 0x0010
+#define DDRSS_CTL_83_DATA 0x0130
+#define DDRSS_CTL_84_DATA 0x0304
+#define DDRSS_CTL_85_DATA 0x0130
+#define DDRSS_CTL_86_DATA 0x0304
+#define DDRSS_CTL_87_DATA 0x03004000
+#define DDRSS_CTL_88_DATA 0x1201
+#define DDRSS_CTL_89_DATA 0x000C0005
+#define DDRSS_CTL_90_DATA 0x2108000C
+#define DDRSS_CTL_91_DATA 0x0A050521
+#define DDRSS_CTL_92_DATA 0x170C0803
+#define DDRSS_CTL_93_DATA 0x170C0803
+#define DDRSS_CTL_94_DATA 0x03010103
+#define DDRSS_CTL_95_DATA 0x00010301
+#define DDRSS_CTL_96_DATA 0x00140014
+#define DDRSS_CTL_97_DATA 

Re: [PATCH 07/26] arm: imx: Check header before calling spl_load_imx_container

[Sean Anderson]

On 10/12/23 03:44, Heinrich Schuchardt wrote:

On 10/12/23 03:56, Sean Anderson wrote:

Make sure we have an IMX header before calling spl_load_imx_container,
since if we don't it will fail with -ENOENT. This allows us to fall back to
legacy/raw images if they are also enabled.


Looking at CONFIG_AHAB_BOOT (related to secure boot) we must be sure
that we don't introduce any unsolicited fallback on existing configurations.


There are no in-tree boards with SPL_LOAD_IMX_CONTAINER and AHAB_BOOT both 
enabled.

--Sean



To avoid too much bloat, Legacy/Raw images are disabled for the four
configs which only boot from raw MMC.

Future work could include merging imx_container.h with imx8image.h, since
they appear to define mostly the same structures.

Signed-off-by: Sean Anderson 
---

  MAINTAINERS  | 1 +
  arch/arm/include/asm/mach-imx/ahab.h | 2 +-
  arch/arm/mach-imx/cmd_dek.c  | 4 ++--
  arch/arm/mach-imx/ele_ahab.c | 2 +-
  arch/arm/mach-imx/image-container.c  | 2 +-
  arch/arm/mach-imx/imx8/ahab.c    | 2 +-
  arch/arm/mach-imx/parse-container.c  | 2 +-
  arch/arm/mach-imx/spl_imx_romapi.c   | 5 +++--
  common/spl/spl_mmc.c | 4 +++-
  common/spl/spl_nand.c    | 4 +++-
  common/spl/spl_nor.c | 4 +++-
  common/spl/spl_spi.c | 4 +++-
  configs/deneb_defconfig  | 2 ++
  configs/giedi_defconfig  | 2 ++
  configs/imx8qm_mek_defconfig | 2 ++
  configs/imx8qxp_mek_defconfig    | 2 ++
  drivers/usb/gadget/f_sdp.c   | 4 +++-
  .../include/asm/mach-imx/image.h => include/imx_container.h  | 0
  18 files changed, 34 insertions(+), 14 deletions(-)
  rename arch/arm/include/asm/mach-imx/image.h => include/imx_container.h (100%)

diff --git a/MAINTAINERS b/MAINTAINERS
index 7d5d05320c0..35209e73af5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -300,6 +300,7 @@ F:    arch/arm/include/asm/mach-imx/
  F:    board/freescale/*mx*/
  F:    board/freescale/common/
  F:    drivers/serial/serial_mxc.c
+F:    include/imx_container.h

  ARM HISILICON
  M:    Peter Griffin 
diff --git a/arch/arm/include/asm/mach-imx/ahab.h 
b/arch/arm/include/asm/mach-imx/ahab.h
index 4222e3db278..4884f056251 100644
--- a/arch/arm/include/asm/mach-imx/ahab.h
+++ b/arch/arm/include/asm/mach-imx/ahab.h
@@ -6,7 +6,7 @@
  #ifndef __IMX_AHAB_H__
  #define __IMX_AHAB_H__

-#include 
+#include 

  int ahab_auth_cntr_hdr(struct container_hdr *container, u16 length);
  int ahab_auth_release(void);
diff --git a/arch/arm/mach-imx/cmd_dek.c b/arch/arm/mach-imx/cmd_dek.c
index 6fa5b41fcd3..2f389dbe8df 100644
--- a/arch/arm/mach-imx/cmd_dek.c
+++ b/arch/arm/mach-imx/cmd_dek.c
@@ -18,12 +18,12 @@
  #include 
  #include 
  #ifdef CONFIG_IMX_SECO_DEK_ENCAP
+#include 
  #include 
-#include 
  #endif
  #ifdef CONFIG_IMX_ELE_DEK_ENCAP
+#include 
  #include 
-#include 
  #endif

  #include 
diff --git a/arch/arm/mach-imx/ele_ahab.c b/arch/arm/mach-imx/ele_ahab.c
index 6a1ad198f89..295c055ad0a 100644
--- a/arch/arm/mach-imx/ele_ahab.c
+++ b/arch/arm/mach-imx/ele_ahab.c
@@ -6,12 +6,12 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  #include 
  #include 
  #include 
-#include 
  #include 
  #include 
  #include 
diff --git a/arch/arm/mach-imx/image-container.c 
b/arch/arm/mach-imx/image-container.c
index eff9e0c4597..ebc8021d7cc 100644
--- a/arch/arm/mach-imx/image-container.c
+++ b/arch/arm/mach-imx/image-container.c
@@ -5,6 +5,7 @@

  #include 
  #include 
+#include 
  #include 
  #include 
  #include 
@@ -12,7 +13,6 @@
  #include 
  #include 
  #include 
-#include 
  #include 
  #include 

diff --git a/arch/arm/mach-imx/imx8/ahab.c b/arch/arm/mach-imx/imx8/ahab.c
index 44ea63584aa..994becccefd 100644
--- a/arch/arm/mach-imx/imx8/ahab.c
+++ b/arch/arm/mach-imx/imx8/ahab.c
@@ -6,6 +6,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  #include 
@@ -13,7 +14,6 @@
  #include 
  #include 
  #include 
-#include 
  #include 
  #include 
  #include "u-boot/sha256.h"
diff --git a/arch/arm/mach-imx/parse-container.c 
b/arch/arm/mach-imx/parse-container.c
index 0a3d41f411e..126ab7c57a1 100644
--- a/arch/arm/mach-imx/parse-container.c
+++ b/arch/arm/mach-imx/parse-container.c
@@ -6,9 +6,9 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
-#include 
  #ifdef CONFIG_AHAB_BOOT
  #include 
  #endif
diff --git a/arch/arm/mach-imx/spl_imx_romapi.c 
b/arch/arm/mach-imx/spl_imx_romapi.c
index b51061b987b..8816566b364 100644
--- a/arch/arm/mach-imx/spl_imx_romapi.c

[PATCH 02/11] arm: mach-k3: am62px: introduce clock and device files for wkup spl

[Bryan Brattlof]

Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.

Signed-off-by: Bryan Brattlof 
---
 arch/arm/mach-k3/am62px/Makefile   |   6 +
 arch/arm/mach-k3/am62px/clk-data.c | 315 +
 arch/arm/mach-k3/am62px/dev-data.c |  69 ++
 drivers/clk/ti/clk-k3.c|   6 +
 drivers/power/domain/ti-power-domain.c |   6 +
 include/k3-clk.h   |   1 +
 include/k3-dev.h   |   1 +
 7 files changed, 404 insertions(+)
 create mode 100644 arch/arm/mach-k3/am62px/Makefile
 create mode 100644 arch/arm/mach-k3/am62px/clk-data.c
 create mode 100644 arch/arm/mach-k3/am62px/dev-data.c

diff --git a/arch/arm/mach-k3/am62px/Makefile b/arch/arm/mach-k3/am62px/Makefile
new file mode 100644
index 0..50b0df20a3d1a
--- /dev/null
+++ b/arch/arm/mach-k3/am62px/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+
+obj-y += clk-data.o
+obj-y += dev-data.o
diff --git a/arch/arm/mach-k3/am62px/clk-data.c 
b/arch/arm/mach-k3/am62px/clk-data.c
new file mode 100644
index 0..844e9bbbd6b16
--- /dev/null
+++ b/arch/arm/mach-k3/am62px/clk-data.c
@@ -0,0 +1,315 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * AM62PX specific clock platform data
+ *
+ * This file is auto generated. Please do not hand edit and report any issues
+ * to Bryan Brattlof .
+ *
+ * Copyright (C) 2020-2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include 
+#include "k3-clk.h"
+
+static const char * const gluelogic_hfosc0_clkout_parents[] = {
+   NULL,
+   NULL,
+   "osc_24_mhz",
+   "osc_25_mhz",
+   "osc_26_mhz",
+   NULL,
+};
+
+static const char * const clk_32k_rc_sel_out0_parents[] = {
+   "gluelogic_rcosc_clk_1p0v_97p65k",
+   "gluelogic_hfosc0_clkout",
+   "gluelogic_rcosc_clk_1p0v_97p65k",
+   "gluelogic_lfosc0_clkout",
+};
+
+static const char * const main_emmcsd1_io_clklb_sel_out0_parents[] = {
+   "board_0_mmc1_clklb_out",
+   "board_0_mmc1_clk_out",
+};
+
+static const char * const main_ospi_loopback_clk_sel_out0_parents[] = {
+   "board_0_ospi0_dqs_out",
+   "board_0_ospi0_lbclko_out",
+};
+
+static const char * const main_usb0_refclk_sel_out0_parents[] = {
+   "gluelogic_hfosc0_clkout",
+   "postdiv4_16ff_main_0_hsdivout8_clk",
+};
+
+static const char * const main_usb1_refclk_sel_out0_parents[] = {
+   "gluelogic_hfosc0_clkout",
+   "postdiv4_16ff_main_0_hsdivout8_clk",
+};
+
+static const char * const sam62_pll_ctrl_wrap_main_0_sysclkout_clk_parents[] = 
{
+   "gluelogic_hfosc0_clkout",
+   "hsdiv4_16fft_main_0_hsdivout0_clk",
+};
+
+static const char * const sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk_parents[] = {
+   "gluelogic_hfosc0_clkout",
+   "hsdiv4_16fft_mcu_0_hsdivout0_clk",
+};
+
+static const char * const clkout0_ctrl_out0_parents[] = {
+   "hsdiv4_16fft_main_2_hsdivout1_clk",
+   "hsdiv4_16fft_main_2_hsdivout1_clk",
+};
+
+static const char * const main_emmcsd1_refclk_sel_out0_parents[] = {
+   "postdiv4_16ff_main_0_hsdivout5_clk",
+   "hsdiv4_16fft_main_2_hsdivout2_clk",
+};
+
+static const char * const main_gtcclk_sel_out0_parents[] = {
+   "postdiv4_16ff_main_2_hsdivout5_clk",
+   "postdiv4_16ff_main_0_hsdivout6_clk",
+   "board_0_cp_gemac_cpts0_rft_clk_out",
+   NULL,
+   "board_0_mcu_ext_refclk0_out",
+   "board_0_ext_refclk1_out",
+   "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk",
+   "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk",
+};
+
+static const char * const main_ospi_ref_clk_sel_out0_parents[] = {
+   "hsdiv4_16fft_main_0_hsdivout1_clk",
+   "postdiv1_16fft_main_1_hsdivout5_clk",
+};
+
+static const char * const main_timerclkn_sel_out0_parents[] = {
+   "gluelogic_hfosc0_clkout",
+   "clk_32k_rc_sel_out0",
+   "postdiv4_16ff_main_0_hsdivout7_clk",
+   "gluelogic_rcosc_clkout",
+   "board_0_mcu_ext_refclk0_out",
+   "board_0_ext_refclk1_out",
+   NULL,
+   "board_0_cp_gemac_cpts0_rft_clk_out",
+   "hsdiv4_16fft_main_1_hsdivout3_clk",
+   "postdiv4_16ff_main_2_hsdivout6_clk",
+   NULL,
+   NULL,
+   NULL,
+   NULL,
+   NULL,
+   NULL,
+};
+
+static const char * const wkup_clkout_sel_out0_parents[] = {
+   NULL,
+   "gluelogic_lfosc0_clkout",
+   "hsdiv4_16fft_main_0_hsdivout2_clk",
+   "hsdiv4_16fft_main_1_hsdivout2_clk",
+   "postdiv4_16ff_main_2_hsdivout9_clk",
+   "clk_32k_rc_sel_out0",
+   "gluelogic_rcosc_clkout",
+   "gluelogic_hfosc0_clkout",
+};
+
+static const char * const wkup_clkout_sel_io_out0_parents[] = {
+   "wkup_clkout_sel_out0",
+   "gluelogic_hfosc0_clkout",
+};
+
+static const char * const wkup_clksel_out0_parents[] = {
+   "hsdiv3_16fft_main_15_hsdivout0_clk",
+   

[PATCH 07/11] firmware: ti_sci_static_data: add static DMA channel data

[Bryan Brattlof]

From: Hari Nagalla 

Include the static DMA channel data for ti_sci

Signed-off-by: Hari Nagalla 
Signed-off-by: Bryan Brattlof 
---
 drivers/firmware/ti_sci_static_data.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/firmware/ti_sci_static_data.h 
b/drivers/firmware/ti_sci_static_data.h
index 1a461fab6199b..a9d77315b713b 100644
--- a/drivers/firmware/ti_sci_static_data.h
+++ b/drivers/firmware/ti_sci_static_data.h
@@ -84,7 +84,8 @@ static struct ti_sci_resource_static_data rm_static_data[] = {
 };
 #endif /* CONFIG_SOC_K3_J721S2 */
 
-#if IS_ENABLED(CONFIG_SOC_K3_AM625) || IS_ENABLED(CONFIG_SOC_K3_AM62A7)
+#if IS_ENABLED(CONFIG_SOC_K3_AM625) || IS_ENABLED(CONFIG_SOC_K3_AM62A7) || \
+   IS_ENABLED(CONFIG_SOC_K3_AM62P5)
 static struct ti_sci_resource_static_data rm_static_data[] = {
/* BC channels */
{
@@ -95,7 +96,7 @@ static struct ti_sci_resource_static_data rm_static_data[] = {
},
{ },
 };
-#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */
+#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 || CONFIG_SOC_K3_AM62P5 
*/
 
 #else
 static struct ti_sci_resource_static_data rm_static_data[] = {
-- 
2.42.0

[PATCH 04/11] arm: mach-k3: invert logic for split DM firmware config

[Bryan Brattlof]

Currently for the K3 generation of SoCs there are more SoCs that utilize
the split firmware approach than the combined DMSC firmware. Invert the
logic to avoid adding more and more SoCs to this list.

Signed-off-by: Bryan Brattlof 
---
 arch/arm/mach-k3/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 9168bf842dcaf..9a211871e04ef 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -172,7 +172,7 @@ config K3_ATF_LOAD_ADDR
 
 config K3_DM_FW
bool "Separate DM firmware image"
-   depends on SPL && CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || 
SOC_K3_AM625 || SOC_K3_AM62A7) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN
+   depends on SPL && CPU_V7R && !(SOC_K3_AM642S || SOC_K3_AM654) && 
!CLK_TI_SCI && !TI_SCI_POWER_DOMAIN
default y
help
  Enabling this will indicate that the system has separate DM
-- 
2.42.0

[PATCH 05/11] arch: mach-k3: introduce basic files to support the am62px SoC family

[Bryan Brattlof]

Introduce the basic functions and definitions needed to properly
initialize TI's am62p family of SoCs

Signed-off-by: Bryan Brattlof 
---
 arch/arm/mach-k3/Kconfig  |   6 +-
 arch/arm/mach-k3/Makefile |   2 +
 arch/arm/mach-k3/am62p5_init.c| 261 ++
 arch/arm/mach-k3/am62px/clk-data.c|  10 +
 arch/arm/mach-k3/am62px/dev-data.c|  50 ++--
 arch/arm/mach-k3/arm64-mmu.c  |   5 +-
 .../arm/mach-k3/include/mach/am62p_hardware.h |  83 ++
 arch/arm/mach-k3/include/mach/am62p_spl.h |  49 
 arch/arm/mach-k3/include/mach/hardware.h  |   4 +
 arch/arm/mach-k3/include/mach/spl.h   |   4 +
 10 files changed, 447 insertions(+), 27 deletions(-)
 create mode 100644 arch/arm/mach-k3/am62p5_init.c
 create mode 100644 arch/arm/mach-k3/include/mach/am62p_hardware.h
 create mode 100644 arch/arm/mach-k3/include/mach/am62p_spl.h

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 9a211871e04ef..5af567a24a2ba 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -22,6 +22,9 @@ config SOC_K3_AM625
 config SOC_K3_AM62A7
bool "TI's K3 based AM62A7 SoC Family Support"
 
+config SOC_K3_AM62P5
+   bool "TI's K3 based AM62P5 SoC Family Support"
+
 endchoice
 
 config SYS_SOC
@@ -29,7 +32,7 @@ config SYS_SOC
 
 config SYS_K3_NON_SECURE_MSRAM_SIZE
hex
-   default 0x8 if SOC_K3_AM654
+   default 0x8 if SOC_K3_AM654 || SOC_K3_AM62P5
default 0x10 if SOC_K3_J721E || SOC_K3_J721S2
default 0x1c if SOC_K3_AM642
default 0x3c000 if SOC_K3_AM625 || SOC_K3_AM62A7
@@ -73,6 +76,7 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
default 0x43c3f290 if SOC_K3_AM625
default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
default 0x7000f290 if SOC_K3_AM62A7 && ARM64
+   default 0x43c4f290 if SOC_K3_AM62P5
help
  Address at which ROM stores the value which determines if SPL
  is booted up by primary boot media or secondary boot media.
diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile
index fd77b8bbba5c9..f59e87b1ab776 100644
--- a/arch/arm/mach-k3/Makefile
+++ b/arch/arm/mach-k3/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_SOC_K3_J721E) += j721e/ j7200/
 obj-$(CONFIG_SOC_K3_J721S2) += j721s2/
 obj-$(CONFIG_SOC_K3_AM625) += am62x/
 obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/
+obj-$(CONFIG_SOC_K3_AM62P5) += am62px/
 obj-$(CONFIG_ARM64) += arm64-mmu.o
 obj-$(CONFIG_CPU_V7R) += r5_mpu.o lowlevel_init.o
 obj-$(CONFIG_ARM64) += cache.o
@@ -24,6 +25,7 @@ obj-$(CONFIG_SOC_K3_J721S2) += j721s2_init.o
 obj-$(CONFIG_SOC_K3_AM642) += am642_init.o
 obj-$(CONFIG_SOC_K3_AM625) += am625_init.o
 obj-$(CONFIG_SOC_K3_AM62A7) += am62a7_init.o
+obj-$(CONFIG_SOC_K3_AM62P5) += am62p5_init.o
 obj-$(CONFIG_K3_LOAD_SYSFW) += sysfw-loader.o
 endif
 obj-y += common.o security.o
diff --git a/arch/arm/mach-k3/am62p5_init.c b/arch/arm/mach-k3/am62p5_init.c
new file mode 100644
index 0..b69ae6608a78d
--- /dev/null
+++ b/arch/arm/mach-k3/am62p5_init.c
@@ -0,0 +1,261 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * AM62P5: SoC specific initialization
+ *
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include 
+#include 
+#include 
+#include "sysfw-loader.h"
+#include "common.h"
+#include 
+#include 
+#include 
+
+struct fwl_data cbass_main_fwls[] = {
+   { "FSS_DAT_REG3", 7, 8 },
+};
+
+/*
+ * This uninitialized global variable would normal end up in the .bss section,
+ * but the .bss is cleared between writing and reading this variable, so move
+ * it to the .data section.
+ */
+u32 bootindex __section(".data");
+static struct rom_extended_boot_data bootdata __section(".data");
+
+static void store_boot_info_from_rom(void)
+{
+   bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
+   memcpy(, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
+  sizeof(struct rom_extended_boot_data));
+}
+
+static void ctrl_mmr_unlock(void)
+{
+   /* Unlock all WKUP_CTRL_MMR0 module registers */
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 0);
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 1);
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 2);
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 3);
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 4);
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 5);
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 6);
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 7);
+
+   /* Unlock all CTRL_MMR0 module registers */
+   mmr_unlock(CTRL_MMR0_BASE, 0);
+   mmr_unlock(CTRL_MMR0_BASE, 1);
+   mmr_unlock(CTRL_MMR0_BASE, 2);
+   mmr_unlock(CTRL_MMR0_BASE, 4);
+   mmr_unlock(CTRL_MMR0_BASE, 5);
+   mmr_unlock(CTRL_MMR0_BASE, 6);
+
+   /* Unlock all MCU_CTRL_MMR0 module registers */
+   mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
+   mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
+   mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
+   mmr_unlock(MCU_CTRL_MMR0_BASE, 3);
+   

[PATCH 7/7] riscv: Remove common.h usage

[Tom Rini]

We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.

Signed-off-by: Tom Rini 
---
Cc: Rick Chen 
Cc: Leo 
---
 arch/riscv/cpu/andesv5/cache.c  | 1 -
 arch/riscv/cpu/andesv5/cpu.c| 1 -
 arch/riscv/cpu/andesv5/spl.c| 1 -
 arch/riscv/cpu/cpu.c| 1 -
 arch/riscv/cpu/fu540/dram.c | 1 -
 arch/riscv/cpu/fu740/dram.c | 1 -
 arch/riscv/cpu/generic/cpu.c| 1 -
 arch/riscv/cpu/generic/dram.c   | 1 -
 arch/riscv/cpu/jh7110/dram.c| 1 -
 arch/riscv/cpu/jh7110/spl.c | 1 -
 arch/riscv/cpu/mtrap.S  | 1 -
 arch/riscv/cpu/start.S  | 1 -
 arch/riscv/include/asm/arch-andes/csr.h | 1 +
 arch/riscv/include/asm/arch-jh7110/eeprom.h | 2 ++
 arch/riscv/include/asm/dma-mapping.h| 1 -
 arch/riscv/include/asm/smp.h| 2 ++
 arch/riscv/lib/aclint_ipi.c | 1 -
 arch/riscv/lib/andes_plicsw.c   | 1 -
 arch/riscv/lib/asm-offsets.c| 1 -
 arch/riscv/lib/boot.c   | 3 +--
 arch/riscv/lib/bootm.c  | 1 -
 arch/riscv/lib/cache.c  | 1 -
 arch/riscv/lib/fdt_fixup.c  | 1 -
 arch/riscv/lib/image.c  | 1 -
 arch/riscv/lib/interrupts.c | 1 -
 arch/riscv/lib/reset.c  | 1 -
 arch/riscv/lib/sbi.c| 2 +-
 arch/riscv/lib/sbi_ipi.c| 1 -
 arch/riscv/lib/sifive_cache.c   | 2 +-
 arch/riscv/lib/smp.c| 1 -
 arch/riscv/lib/spl.c| 1 -
 board/AndesTech/ae350/ae350.c   | 2 +-
 board/sifive/unmatched/hifive-platform-i2c-eeprom.c | 1 -
 board/sifive/unmatched/unmatched.c  | 1 -
 34 files changed, 9 insertions(+), 32 deletions(-)

diff --git a/arch/riscv/cpu/andesv5/cache.c b/arch/riscv/cpu/andesv5/cache.c
index 40d77f671c87..269bb27f75a6 100644
--- a/arch/riscv/cpu/andesv5/cache.c
+++ b/arch/riscv/cpu/andesv5/cache.c
@@ -6,7 +6,6 @@
 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/riscv/cpu/andesv5/cpu.c b/arch/riscv/cpu/andesv5/cpu.c
index 06e379bcb1fe..63bc24cdfc7c 100644
--- a/arch/riscv/cpu/andesv5/cpu.c
+++ b/arch/riscv/cpu/andesv5/cpu.c
@@ -5,7 +5,6 @@
  */
 
 /* CPU specific code */
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/riscv/cpu/andesv5/spl.c b/arch/riscv/cpu/andesv5/spl.c
index 413849043b18..a13dc4095a45 100644
--- a/arch/riscv/cpu/andesv5/spl.c
+++ b/arch/riscv/cpu/andesv5/spl.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2023 Andes Technology Corporation
  * Rick Chen, Andes Technology Corporation 
  */
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index c1a9638c1ab7..ebd39cb41a60 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2018, Bin Meng 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/riscv/cpu/fu540/dram.c b/arch/riscv/cpu/fu540/dram.c
index 94d8018407e6..7b5a3471ac88 100644
--- a/arch/riscv/cpu/fu540/dram.c
+++ b/arch/riscv/cpu/fu540/dram.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2018, Bin Meng 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/riscv/cpu/fu740/dram.c b/arch/riscv/cpu/fu740/dram.c
index 8657fcd165c3..61f551763f1c 100644
--- a/arch/riscv/cpu/fu740/dram.c
+++ b/arch/riscv/cpu/fu740/dram.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2018, Bin Meng 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/riscv/cpu/generic/cpu.c b/arch/riscv/cpu/generic/cpu.c
index d78e1a3453af..f13c18942f3d 100644
--- a/arch/riscv/cpu/generic/cpu.c
+++ b/arch/riscv/cpu/generic/cpu.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2018, Bin Meng 
  */
 
-#include 
 #include 
 #include 
 
diff --git a/arch/riscv/cpu/generic/dram.c b/arch/riscv/cpu/generic/dram.c
index 94d8018407e6..7b5a3471ac88 100644
--- a/arch/riscv/cpu/generic/dram.c
+++ b/arch/riscv/cpu/generic/dram.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2018, Bin Meng 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/riscv/cpu/jh7110/dram.c b/arch/riscv/cpu/jh7110/dram.c
index 1a9fa46d14b9..664b9b93eb62 100644
--- a/arch/riscv/cpu/jh7110/dram.c
+++ b/arch/riscv/cpu/jh7110/dram.c
@@ -4,7 +4,6 @@
  * Author: Yanhong Wang 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/riscv/cpu/jh7110/spl.c b/arch/riscv/cpu/jh7110/spl.c
index 4047b10efe83..6bdf8b9c72f0 100644
--- a/arch/riscv/cpu/jh7110/spl.c
+++ b/arch/riscv/cpu/jh7110/spl.c
@@ -3,7 +3,6 @@
  * Copyright (C) 

[PATCH 6/7] mips: Remove common.h usage

[Tom Rini]

We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.

Signed-off-by: Tom Rini 
---
Cc: Daniel Schwierzeck 
---
 arch/mips/cpu/cpu.c| 1 -
 arch/mips/cpu/interrupts.c | 1 -
 arch/mips/cpu/time.c   | 1 -
 arch/mips/include/asm/cacheops.h   | 1 +
 arch/mips/lib/boot.c   | 1 -
 arch/mips/lib/bootm.c  | 1 -
 arch/mips/lib/cache.c  | 1 -
 arch/mips/lib/reloc.c  | 1 -
 arch/mips/lib/spl.c| 1 -
 arch/mips/lib/stack.c  | 1 -
 arch/mips/lib/traps.c  | 3 ++-
 arch/mips/mach-ath79/ar933x/clk.c  | 1 -
 arch/mips/mach-ath79/ar933x/ddr.c  | 1 -
 arch/mips/mach-ath79/ar934x/clk.c  | 1 -
 arch/mips/mach-ath79/ar934x/cpu.c  | 2 --
 arch/mips/mach-ath79/ar934x/ddr.c  | 1 -
 arch/mips/mach-ath79/cpu.c | 1 -
 arch/mips/mach-ath79/dram.c| 1 -
 arch/mips/mach-ath79/qca953x/clk.c | 1 -
 arch/mips/mach-ath79/qca953x/ddr.c | 1 -
 arch/mips/mach-ath79/qca956x/clk.c | 1 -
 arch/mips/mach-ath79/qca956x/cpu.c | 2 --
 arch/mips/mach-ath79/qca956x/ddr.c | 1 -
 arch/mips/mach-ath79/reset.c   | 1 -
 arch/mips/mach-bmips/dram.c| 1 -
 arch/mips/mach-jz47xx/jz4780/gpio.c| 1 -
 arch/mips/mach-jz47xx/jz4780/jz4780.c  | 1 -
 arch/mips/mach-jz47xx/jz4780/pll.c | 1 -
 arch/mips/mach-jz47xx/jz4780/reset.c   | 1 -
 arch/mips/mach-jz47xx/jz4780/sdram.c   | 1 -
 arch/mips/mach-jz47xx/jz4780/timer.c   | 1 -
 arch/mips/mach-mscc/cpu.c  | 1 -
 arch/mips/mach-mscc/dram.c | 1 -
 arch/mips/mach-mscc/gpio.c | 1 -
 arch/mips/mach-mscc/include/mach/ddr.h | 1 +
 arch/mips/mach-mscc/phy.c  | 1 -
 arch/mips/mach-mscc/reset.c| 2 --
 arch/mips/mach-mtmips/cpu.c| 1 -
 arch/mips/mach-mtmips/ddr_cal.c| 1 -
 arch/mips/mach-mtmips/ddr_init.c   | 1 -
 arch/mips/mach-mtmips/mt7628/ddr.c | 1 -
 arch/mips/mach-mtmips/mt7628/init.c| 1 -
 arch/mips/mach-mtmips/mt7628/serial.c  | 1 -
 arch/mips/mach-mtmips/spl.c| 1 -
 arch/mips/mach-pic32/cpu.c | 1 -
 arch/mips/mach-pic32/reset.c   | 1 -
 46 files changed, 4 insertions(+), 47 deletions(-)

diff --git a/arch/mips/cpu/cpu.c b/arch/mips/cpu/cpu.c
index f0e20da28f76..acfc9dc43f17 100644
--- a/arch/mips/cpu/cpu.c
+++ b/arch/mips/cpu/cpu.c
@@ -4,7 +4,6 @@
  * Wolfgang Denk, DENX Software Engineering, 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/mips/cpu/interrupts.c b/arch/mips/cpu/interrupts.c
index b3ba9aaeae1e..f7f9a185ed49 100644
--- a/arch/mips/cpu/interrupts.c
+++ b/arch/mips/cpu/interrupts.c
@@ -4,7 +4,6 @@
  * Wolfgang Denk, DENX Software Engineering, 
  */
 
-#include 
 #include 
 
 int interrupt_init(void)
diff --git a/arch/mips/cpu/time.c b/arch/mips/cpu/time.c
index 5e7a7144d027..210709d3b81d 100644
--- a/arch/mips/cpu/time.c
+++ b/arch/mips/cpu/time.c
@@ -4,7 +4,6 @@
  * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
  */
 
-#include 
 #include 
 #include 
 
diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h
index 641e2ad58dec..c1015c885e14 100644
--- a/arch/mips/include/asm/cacheops.h
+++ b/arch/mips/include/asm/cacheops.h
@@ -11,6 +11,7 @@
 #include 
 
 #ifndef __ASSEMBLY__
+#include 
 
 static inline void mips_cache(int op, const volatile void *addr)
 {
diff --git a/arch/mips/lib/boot.c b/arch/mips/lib/boot.c
index 1b29d637ce9b..749625aa9748 100644
--- a/arch/mips/lib/boot.c
+++ b/arch/mips/lib/boot.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2020 Stefan Roese 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index ab92bd06b0ee..d6d2f7d9d031 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -4,7 +4,6 @@
  * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index d23b38d6b93f..d365578b926c 100644
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -4,7 +4,6 @@
  * Wolfgang Denk, DENX Software Engineering, 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/mips/lib/reloc.c b/arch/mips/lib/reloc.c
index 9cf6809f4068..69dd63a31d21 100644
--- a/arch/mips/lib/reloc.c
+++ b/arch/mips/lib/reloc.c
@@ -26,7 +26,6 @@
  * terminating R_MIPS_NONE reloc includes no offset.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/mips/lib/spl.c b/arch/mips/lib/spl.c
index f96fda5b2de9..b4087546dd1d 100644
--- a/arch/mips/lib/spl.c
+++ b/arch/mips/lib/spl.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2020 Stefan Roese 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/mips/lib/stack.c b/arch/mips/lib/stack.c
index 930d21856d90..5797271ae94e 100644
--- a/arch/mips/lib/stack.c
+++ b/arch/mips/lib/stack.c
@@ 

[PATCH 06/11] board: ti: introduce basic board files for the am62px family

[Bryan Brattlof]

Introduce the basic files needed to support the am62px family of SoCs

Co-developed-by: Hari Hagalla 
Signed-off-by: Hari Hagalla 
Signed-off-by: Bryan Brattlof 
---
 arch/arm/mach-k3/Kconfig |1 +
 board/ti/am62px/Kconfig  |   52 ++
 board/ti/am62px/MAINTAINERS  |9 +
 board/ti/am62px/Makefile |7 +
 board/ti/am62px/am62px.env   |   18 +
 board/ti/am62px/board-cfg.yaml   |   37 +
 board/ti/am62px/evm.c|   30 +
 board/ti/am62px/pm-cfg.yaml  |   12 +
 board/ti/am62px/rm-cfg.yaml  | 1150 ++
 board/ti/am62px/sec-cfg.yaml |  378 ++
 board/ti/am62px/tifs-rm-cfg.yaml | 1010 ++
 11 files changed, 2704 insertions(+)
 create mode 100644 board/ti/am62px/Kconfig
 create mode 100644 board/ti/am62px/MAINTAINERS
 create mode 100644 board/ti/am62px/Makefile
 create mode 100644 board/ti/am62px/am62px.env
 create mode 100644 board/ti/am62px/board-cfg.yaml
 create mode 100644 board/ti/am62px/evm.c
 create mode 100644 board/ti/am62px/pm-cfg.yaml
 create mode 100644 board/ti/am62px/rm-cfg.yaml
 create mode 100644 board/ti/am62px/sec-cfg.yaml
 create mode 100644 board/ti/am62px/tifs-rm-cfg.yaml

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 5af567a24a2ba..26749acfaecd9 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -195,6 +195,7 @@ source "board/ti/am65x/Kconfig"
 source "board/ti/am64x/Kconfig"
 source "board/ti/am62x/Kconfig"
 source "board/ti/am62ax/Kconfig"
+source "board/ti/am62px/Kconfig"
 source "board/ti/j721e/Kconfig"
 source "board/siemens/iot2050/Kconfig"
 source "board/ti/j721s2/Kconfig"
diff --git a/board/ti/am62px/Kconfig b/board/ti/am62px/Kconfig
new file mode 100644
index 0..3ef1ff113ab00
--- /dev/null
+++ b/board/ti/am62px/Kconfig
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+
+choice
+   prompt "TI K3 AM62Px based boards"
+   optional
+
+config TARGET_AM62P5_A53_EVM
+   bool "TI K3 based AM62P5 EVM running on A53"
+   select ARM64
+   select BINMAN
+   imply BOARD
+   imply SPL_BOARD
+   imply TI_I2C_BOARD_DETECT
+
+config TARGET_AM62P5_R5_EVM
+   bool "TI K3 based AM62P5 EVM running on R5"
+   select CPU_V7R
+   select SYS_THUMB_BUILD
+   select K3_LOAD_SYSFW
+   select RAM
+   select SPL_RAM
+   select K3_DDRSS
+   select BINMAN
+   imply SYS_K3_SPL_ATF
+   imply TI_I2C_BOARD_DETECT
+
+endchoice
+
+if TARGET_AM62P5_R5_EVM || TARGET_AM62P5_A53_EVM
+
+config SYS_BOARD
+   default "am62px"
+
+config SYS_VENDOR
+   default "ti"
+
+config SYS_CONFIG_NAME
+   default "am62px_evm"
+
+source "board/ti/common/Kconfig"
+
+endif
+
+if TARGET_AM62P5_R5_EVM
+
+config SPL_LDSCRIPT
+   default "arch/arm/mach-omap2/u-boot-spl.lds"
+
+endif
diff --git a/board/ti/am62px/MAINTAINERS b/board/ti/am62px/MAINTAINERS
new file mode 100644
index 0..57c86ddbc4aef
--- /dev/null
+++ b/board/ti/am62px/MAINTAINERS
@@ -0,0 +1,9 @@
+AM62Px BOARD
+M: Vignesh Raghavendra 
+M: Bryan Brattlof 
+M: Tom Rini 
+S: Maintained
+F: board/ti/am62px/
+F: include/configs/am62p5_evm.h
+F: configs/am62px_evm_r5_defconfig
+F: configs/am62px_evm_a53_defconfig
diff --git a/board/ti/am62px/Makefile b/board/ti/am62px/Makefile
new file mode 100644
index 0..921afdff27a24
--- /dev/null
+++ b/board/ti/am62px/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  += evm.o
diff --git a/board/ti/am62px/am62px.env b/board/ti/am62px/am62px.env
new file mode 100644
index 0..a7ac6d0a588a8
--- /dev/null
+++ b/board/ti/am62px/am62px.env
@@ -0,0 +1,18 @@
+#include 
+#include 
+
+default_device_tree=ti/k3-am62p5-sk.dtb
+findfdt=
+   setenv name_fdt ${default_device_tree};
+   setenv fdtfile ${name_fdt}
+name_kern=Image
+console=ttyS2,115200n8
+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x0280
+   ${mtdparts}
+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+
+boot=mmc
+mmcdev=1
+bootpart=1:2
+bootdir=/boot
+rd_spec=-
diff --git a/board/ti/am62px/board-cfg.yaml b/board/ti/am62px/board-cfg.yaml
new file mode 100644
index 0..de4a438c27826
--- /dev/null
+++ b/board/ti/am62px/board-cfg.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM62Px SoCs
+#
+
+---
+board-cfg:
+rev:
+boardcfg_abi_maj: 0x0
+boardcfg_abi_min: 0x1
+control:
+subhdr:
+magic: 0xC1D3
+size: 7
+main_isolation_enable: 0x5A
+main_isolation_hostid: 0x2
+secproxy:
+subhdr:
+magic: 0x1207
+size: 7
+scaling_factor: 

[PATCH 5/7] microblaze: Remove common.h usage

[Tom Rini]

We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.

Signed-off-by: Tom Rini 
---
Cc: Michal Simek 
---
 arch/microblaze/cpu/cache.c  | 1 -
 arch/microblaze/cpu/cpuinfo.c| 1 -
 arch/microblaze/cpu/exception.c  | 2 +-
 arch/microblaze/cpu/interrupts.c | 3 ++-
 arch/microblaze/cpu/pvr.c| 1 -
 arch/microblaze/cpu/relocate.c   | 3 ++-
 arch/microblaze/cpu/spl.c| 1 -
 arch/microblaze/include/asm/cpuinfo.h| 2 ++
 arch/microblaze/lib/bootm.c  | 1 -
 board/xilinx/microblaze-generic/microblaze-generic.c | 1 -
 10 files changed, 7 insertions(+), 9 deletions(-)

diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c
index 829e6c7ae605..75ec0a8fd24f 100644
--- a/arch/microblaze/cpu/cache.c
+++ b/arch/microblaze/cpu/cache.c
@@ -5,7 +5,6 @@
  * Michal SIMEK 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/microblaze/cpu/cpuinfo.c b/arch/microblaze/cpu/cpuinfo.c
index 6b15d6ca41c0..2bfdf767f3a5 100644
--- a/arch/microblaze/cpu/cpuinfo.c
+++ b/arch/microblaze/cpu/cpuinfo.c
@@ -2,7 +2,6 @@
 /*
  * Copyright (C) 2022, Ovidiu Panait 
  */
-#include 
 #include 
 #include 
 
diff --git a/arch/microblaze/cpu/exception.c b/arch/microblaze/cpu/exception.c
index 9414776afa7f..6b329fc7b3a2 100644
--- a/arch/microblaze/cpu/exception.c
+++ b/arch/microblaze/cpu/exception.c
@@ -5,8 +5,8 @@
  * Michal  SIMEK 
  */
 
-#include 
 #include 
+#include 
 #include 
 
 void _hw_exception_handler (void)
diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c
index ac53208bda67..244f7fd15eba 100644
--- a/arch/microblaze/cpu/interrupts.c
+++ b/arch/microblaze/cpu/interrupts.c
@@ -7,7 +7,8 @@
  * Yasushi SHOJI 
  */
 
-#include 
+#include 
+#include 
 #include 
 
 void enable_interrupts(void)
diff --git a/arch/microblaze/cpu/pvr.c b/arch/microblaze/cpu/pvr.c
index 23c0f912d435..71aea0b9380c 100644
--- a/arch/microblaze/cpu/pvr.c
+++ b/arch/microblaze/cpu/pvr.c
@@ -2,7 +2,6 @@
 /*
  * Copyright (C) 2022, Ovidiu Panait 
  */
-#include 
 #include 
 #include 
 
diff --git a/arch/microblaze/cpu/relocate.c b/arch/microblaze/cpu/relocate.c
index 7a15fb2ec397..e46fe5bdd5d7 100644
--- a/arch/microblaze/cpu/relocate.c
+++ b/arch/microblaze/cpu/relocate.c
@@ -4,8 +4,9 @@
  * Michal Simek 
  */
 
-#include 
 #include 
+#include 
+#include 
 
 #define R_MICROBLAZE_NONE  0
 #define R_MICROBLAZE_321
diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c
index c21beafdb810..cb224bd25423 100644
--- a/arch/microblaze/cpu/spl.c
+++ b/arch/microblaze/cpu/spl.c
@@ -5,7 +5,6 @@
  * Michal Simek 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/microblaze/include/asm/cpuinfo.h 
b/arch/microblaze/include/asm/cpuinfo.h
index 3c58e52217c4..fbd9418a2f8b 100644
--- a/arch/microblaze/include/asm/cpuinfo.h
+++ b/arch/microblaze/include/asm/cpuinfo.h
@@ -6,6 +6,8 @@
 #ifndef __ASM_MICROBLAZE_CPUINFO_H
 #define __ASM_MICROBLAZE_CPUINFO_H
 
+#include 
+
 /**
  * struct microblaze_cpuinfo - CPU info for microblaze processor core.
  *
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index 930384f4015f..f3ec4b741b88 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -7,7 +7,6 @@
  * Yasushi SHOJI 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c 
b/board/xilinx/microblaze-generic/microblaze-generic.c
index a427ac94a170..2b035d535892 100644
--- a/board/xilinx/microblaze-generic/microblaze-generic.c
+++ b/board/xilinx/microblaze-generic/microblaze-generic.c
@@ -10,7 +10,6 @@
  * header files
  */
 
-#include 
 #include 
 #include 
 #include 
-- 
2.34.1

[PATCH 00/11] Introduce basic support for TI's AM62Px SoC family

[Bryan Brattlof]

Hello Everyone!

The AM62Px is an extension of the existing Sitara AM62x low-cost family
of application processors built for Automotive and Linux Application
development. Scalable Arm Cortex-A53 performance and embedded features,
such as: multi high-definition display support, 3D-graphics
acceleration, 4K video acceleration, and extensive peripherals make the
AM62Px well-suited for a broad range of automation and industrial
application, including automotive digital instrumentation, automotive
displays, industrial HMI, and more.

Some highlights of AM62P SoC are:

* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
  Dual/Single core variants are provided in the same package to allow HW
  compatible designs.

* One Device manager Cortex-R5F for system power and resource
  management, and one Cortex-R5F for Functional Safety or
  general-purpose usage.

* One 3D GPU up to 50 GLFOPS

* H.264/H.265 Video Encode/Decode.

* Display support: 3x display support over OLDI/LVDS (1x OLDI-DL, 1x or
  2x OLDI-SL), DSI, or DPI. Up to 3840x1080 @ 60fps resolution

* Integrated Giga-bit Ethernet switch supporting up to a total of two
  external ports (TSN capable).

* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3xMMC and SD, GPMC for
  NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
  1xCSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.

* Dedicated Centralized Hardware Security Module with support for secure
  boot, debug security and crypto acceleration and trusted execution
  environment.

* One 32-bit DDR Subsystem that supports LPDDR4, DDR4 memory types.

* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only,
  enabling battery powered system design.

For those interested, more details about this SoC can be found in the
Technical Reference Manual here: https://www.ti.com/lit/pdf/spruj83

Proof-of-Life: 
https://paste.sr.ht/~bryanb/af2ac108a9362549aa326f182e87918d52bf2d71

Currently, while more peripherals are being added in Linux[0], this
series will only support UART boot.

Thanks for reviewing!
~Bryan

[0] https://lore.kernel.org/lkml/20231010035903.520635-4...@ti.com/

Bryan Brattlof (10):
  soc: add info to identify the am62p SoC family
  arm: mach-k3: am62px: introduce clock and device files for wkup spl
  ram: k3-ddrss: enable the am62ax's DDR controller for am62px
  arm: mach-k3: invert logic for split DM firmware config
  arch: mach-k3: introduce basic files to support the am62px SoC family
  board: ti: introduce basic board files for the am62px family
  arm: dts: add am62p5 dtbs from linux
  arm: dts: introduce am62p5 uboot dts files
  configs: introduce configs needed for the am62px
  doc: board: ti: introduce am62px documentation

Hari Nagalla (1):
  firmware: ti_sci_static_data: add static DMA channel data

 arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi| 2798 +
 arch/arm/dts/k3-am62p-main.dtsi   |  136 +
 arch/arm/dts/k3-am62p-mcu.dtsi|   15 +
 arch/arm/dts/k3-am62p-sk-binman.dtsi  |  425 +++
 arch/arm/dts/k3-am62p-wakeup.dtsi |   32 +
 arch/arm/dts/k3-am62p.dtsi|  122 +
 arch/arm/dts/k3-am62p5-r5-sk.dts  |   88 +
 arch/arm/dts/k3-am62p5-sk-u-boot.dtsi |   14 +
 arch/arm/dts/k3-am62p5-sk.dts |  116 +
 arch/arm/dts/k3-am62p5.dtsi   |  107 +
 arch/arm/mach-k3/Kconfig  |9 +-
 arch/arm/mach-k3/Makefile |2 +
 arch/arm/mach-k3/am62p5_init.c|  261 ++
 arch/arm/mach-k3/am62px/Makefile  |6 +
 arch/arm/mach-k3/am62px/clk-data.c|  325 ++
 arch/arm/mach-k3/am62px/dev-data.c|   71 +
 arch/arm/mach-k3/arm64-mmu.c  |5 +-
 .../arm/mach-k3/include/mach/am62p_hardware.h |   83 +
 arch/arm/mach-k3/include/mach/am62p_spl.h |   49 +
 arch/arm/mach-k3/include/mach/hardware.h  |6 +
 arch/arm/mach-k3/include/mach/spl.h   |4 +
 board/ti/am62px/Kconfig   |   52 +
 board/ti/am62px/MAINTAINERS   |9 +
 board/ti/am62px/Makefile  |7 +
 board/ti/am62px/am62px.env|   18 +
 board/ti/am62px/board-cfg.yaml|   37 +
 board/ti/am62px/evm.c |   30 +
 board/ti/am62px/pm-cfg.yaml   |   12 +
 board/ti/am62px/rm-cfg.yaml   | 1150 +++
 board/ti/am62px/sec-cfg.yaml  |  378 +++
 board/ti/am62px/tifs-rm-cfg.yaml  | 1010 ++
 configs/am62px_evm_a53_defconfig  |  176 ++
 configs/am62px_evm_r5_defconfig   |  137 +
 doc/board/ti/am62px_sk.rst|  289 ++
 doc/board/ti/k3.rst   |1 +
 drivers/clk/ti/clk-k3.c   |6 +
 drivers/firmware/ti_sci_static_data.h |5 +-
 drivers/power/domain/ti-power-domain.c|6 +
 drivers/ram/Kconfig 

[PATCH 01/11] soc: add info to identify the am62p SoC family

[Bryan Brattlof]

Include the part number for TI's am62px family of SoCs so we can
properly identify it during boot

Signed-off-by: Bryan Brattlof 
---
 arch/arm/mach-k3/include/mach/hardware.h | 2 ++
 drivers/soc/soc_ti_k3.c  | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/arch/arm/mach-k3/include/mach/hardware.h 
b/arch/arm/mach-k3/include/mach/hardware.h
index 65742c4b7c8c7..85aa18918de9c 100644
--- a/arch/arm/mach-k3/include/mach/hardware.h
+++ b/arch/arm/mach-k3/include/mach/hardware.h
@@ -46,6 +46,7 @@
 #define JTAG_ID_PARTNO_J721S2  0xbb75
 #define JTAG_ID_PARTNO_AM62X   0xbb7e
 #define JTAG_ID_PARTNO_AM62AX   0xbb8d
+#define JTAG_ID_PARTNO_AM62PX  0xbb9d
 
 #define K3_SOC_ID(id, ID) \
 static inline bool soc_is_##id(void) \
@@ -61,6 +62,7 @@ K3_SOC_ID(am64x, AM64X)
 K3_SOC_ID(j721s2, J721S2)
 K3_SOC_ID(am62x, AM62X)
 K3_SOC_ID(am62ax, AM62AX)
+K3_SOC_ID(am62px, AM62PX)
 
 #define K3_SEC_MGR_SYS_STATUS  0x44234100
 #define SYS_STATUS_DEV_TYPE_SHIFT  0
diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c
index b720131ae5df9..85130ba5f6be3 100644
--- a/drivers/soc/soc_ti_k3.c
+++ b/drivers/soc/soc_ti_k3.c
@@ -45,6 +45,9 @@ static const char *get_family_string(u32 idreg)
case JTAG_ID_PARTNO_AM62AX:
family = "AM62AX";
break;
+   case JTAG_ID_PARTNO_AM62PX:
+   family = "AM62PX";
+   break;
default:
family = "Unknown Silicon";
};
-- 
2.42.0

[PATCH 08/11] arm: dts: add am62p5 dtbs from linux

[Bryan Brattlof]

Pull in the device tree source files for TI's am62p5 SoCs needed to boot
the board from v6.6-rc5. These are an early release with only the
peripherals to boot the board via UART boot

Signed-off-by: Bryan Brattlof 
---
 arch/arm/dts/k3-am62p-main.dtsi   | 136 ++
 arch/arm/dts/k3-am62p-mcu.dtsi|  15 
 arch/arm/dts/k3-am62p-wakeup.dtsi |  32 +++
 arch/arm/dts/k3-am62p.dtsi| 122 +++
 arch/arm/dts/k3-am62p5-sk.dts | 116 +
 arch/arm/dts/k3-am62p5.dtsi   | 107 +++
 6 files changed, 528 insertions(+)
 create mode 100644 arch/arm/dts/k3-am62p-main.dtsi
 create mode 100644 arch/arm/dts/k3-am62p-mcu.dtsi
 create mode 100644 arch/arm/dts/k3-am62p-wakeup.dtsi
 create mode 100644 arch/arm/dts/k3-am62p.dtsi
 create mode 100644 arch/arm/dts/k3-am62p5-sk.dts
 create mode 100644 arch/arm/dts/k3-am62p5.dtsi

diff --git a/arch/arm/dts/k3-am62p-main.dtsi b/arch/arm/dts/k3-am62p-main.dtsi
new file mode 100644
index 0..c24ff905437ff
--- /dev/null
+++ b/arch/arm/dts/k3-am62p-main.dtsi
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree file for the AM62P main domain peripherals
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+_main {
+   oc_sram: sram@7000 {
+   compatible = "mmio-sram";
+   reg = <0x00 0x7000 0x00 0x1>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0x00 0x00 0x7000 0x1>;
+   };
+
+   gic500: interrupt-controller@180 {
+   compatible = "arm,gic-v3";
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+   #interrupt-cells = <3>;
+   interrupt-controller;
+   reg = <0x00 0x0180 0x00 0x1>,   /* GICD */
+ <0x00 0x0188 0x00 0xc>,   /* GICR */
+ <0x01 0x 0x00 0x2000>,/* GICC */
+ <0x01 0x0001 0x00 0x1000>,/* GICH */
+ <0x01 0x0002 0x00 0x2000>;/* GICV */
+   /*
+* vcpumntirq:
+* virtual CPU interface maintenance interrupt
+*/
+   interrupts = ;
+
+   gic_its: msi-controller@182 {
+   compatible = "arm,gic-v3-its";
+   reg = <0x00 0x0182 0x00 0x1>;
+   socionext,synquacer-pre-its = <0x100 0x40>;
+   msi-controller;
+   #msi-cells = <1>;
+   };
+   };
+
+   dmss: bus@4800 {
+   bootph-all;
+   compatible = "simple-mfd";
+   #address-cells = <2>;
+   #size-cells = <2>;
+   dma-ranges;
+   ranges = <0x00 0x4800 0x00 0x4800 0x00 0x0640>;
+
+   ti,sci-dev-id = <25>;
+
+   secure_proxy_main: mailbox@4d00 {
+   bootph-all;
+   compatible = "ti,am654-secure-proxy";
+   #mbox-cells = <1>;
+   reg-names = "target_data", "rt", "scfg";
+   reg = <0x00 0x4d00 0x00 0x8>,
+ <0x00 0x4a60 0x00 0x8>,
+ <0x00 0x4a40 0x00 0x8>;
+   interrupt-names = "rx_012";
+   interrupts = ;
+   };
+   };
+
+   dmsc: system-controller@44043000 {
+   bootph-all;
+   compatible = "ti,k2g-sci";
+   ti,host-id = <12>;
+   mbox-names = "rx", "tx";
+   mboxes = <_proxy_main 12>,
+<_proxy_main 13>;
+   reg-names = "debug_messages";
+   reg = <0x00 0x44043000 0x00 0xfe0>;
+
+   k3_pds: power-controller {
+   bootph-all;
+   compatible = "ti,sci-pm-domain";
+   #power-domain-cells = <2>;
+   };
+
+   k3_clks: clock-controller {
+   bootph-all;
+   compatible = "ti,k2g-sci-clk";
+   #clock-cells = <2>;
+   };
+
+   k3_reset: reset-controller {
+   bootph-all;
+   compatible = "ti,sci-reset";
+   #reset-cells = <2>;
+   };
+   };
+
+   main_pmx0: pinctrl@f4000 {
+   bootph-all;
+   compatible = "pinctrl-single";
+   reg = <0x00 0xf4000 0x00 0x2ac>;
+   #pinctrl-cells = <1>;
+   pinctrl-single,register-width = <32>;
+   pinctrl-single,function-mask = <0x>;
+   };
+
+   main_timer0: timer@240 {
+   bootph-all;
+

[PATCH 11/11] doc: board: ti: introduce am62px documentation

[Bryan Brattlof]

Introduce basic documentation for the am62p family of SoCs.

Signed-off-by: Bryan Brattlof 
---
 doc/board/ti/am62px_sk.rst | 289 +
 doc/board/ti/k3.rst|   1 +
 2 files changed, 290 insertions(+)
 create mode 100644 doc/board/ti/am62px_sk.rst

diff --git a/doc/board/ti/am62px_sk.rst b/doc/board/ti/am62px_sk.rst
new file mode 100644
index 0..1f2982c36f9e4
--- /dev/null
+++ b/doc/board/ti/am62px_sk.rst
@@ -0,0 +1,289 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Bryan Brattlof 
+
+AM62Px Platforms
+
+
+The AM62Px is an extension of the existing Sitara AM62x low-cost family
+of application processors built for Automotive and Linux Application
+development. Scalable Arm Cortex-A53 performance and embedded features,
+such as: multi high-definition display support, 3D-graphics
+acceleration, 4K video acceleration, and extensive peripherals make the
+AM62Px well-suited for a broad range of automation and industrial
+application, including automotive digital instrumentation, automotive
+displays, industrial HMI, and more.
+
+Some highlights of AM62P SoC are:
+
+* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
+  Dual/Single core variants are provided in the same package to allow HW
+  compatible designs.
+
+* One Device manager Cortex-R5F for system power and resource
+  management, and one Cortex-R5F for Functional Safety or
+  general-purpose usage.
+
+* One 3D GPU up to 50 GLFOPS
+
+* H.264/H.265 Video Encode/Decode.
+
+* Display support: 3x display support over OLDI/LVDS (1x OLDI-DL, 1x or
+  2x OLDI-SL), DSI, or DPI. Up to 3840x1080 @ 60fps resolution
+
+* Integrated Giga-bit Ethernet switch supporting up to a total of two
+  external ports (TSN capable).
+
+* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3xMMC and SD, GPMC for
+  NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
+  1xCSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
+
+* Dedicated Centralized Hardware Security Module with support for secure
+  boot, debug security and crypto acceleration and trusted execution
+  environment.
+
+* One 32-bit DDR Subsystem that supports LPDDR4, DDR4 memory types.
+
+* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only,
+  enabling battery powered system design.
+
+For those interested, more details about this SoC can be found in the
+Technical Reference Manual here: https://www.ti.com/lit/pdf/spruj83
+
+Boot Flow:
+--
+
+The bootflow is exactly the same as all SoCs in the am62xxx extended SoC
+family. Below is the pictorial representation:
+
+.. image:: img/boot_diagram_k3_current.svg
+  :alt: Boot flow diagram
+
+- Here TIFS acts as master and provides all the critical services. R5/A53
+  requests TIFS to get these services done as shown in the above diagram.
+
+Sources:
+
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_boot_sources
+:end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+
+
+0. Setup the environment variables:
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_common_env_vars_desc
+:end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_board_env_vars_desc
+:end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_common_env_vars_defn
+:end-before: .. k3_rst_include_end_common_env_vars_defn
+
+.. code-block:: bash
+
+ $ export UBOOT_CFG_CORTEXR=am62px_evm_r5_defconfig
+ $ export UBOOT_CFG_CORTEXA=am62px_evm_a53_defconfig
+ $ export TFA_BOARD=lite
+ $ # we dont use any extra TFA parameters
+ $ unset TFA_EXTRA_ARGS
+ $ export OPTEE_PLATFORM=k3-am62x
+ $ export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y"
+
+.. am62px_evm_rst_include_start_build_steps
+
+1. Trusted Firmware-A:
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_build_steps_tfa
+:end-before: .. k3_rst_include_end_build_steps_tfa
+
+
+2. OP-TEE:
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_build_steps_optee
+:end-before: .. k3_rst_include_end_build_steps_optee
+
+3. U-Boot:
+
+* 3.1 R5:
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_build_steps_spl_r5
+:end-before: .. k3_rst_include_end_build_steps_spl_r5
+
+* 3.2 A53:
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_build_steps_uboot
+:end-before: .. k3_rst_include_end_build_steps_uboot
+.. am62px_evm_rst_include_end_build_steps
+
+Target Images
+--
+
+In order to boot we need tiboot3.bin, tispl.bin and u-boot.img.  Each SoC
+variant (HS-FS, HS-SE) requires a different source for these files.
+
+ - HS-FS
+
+* tiboot3-am62px-hs-fs-evm.bin from step 3.1
+* tispl.bin, u-boot.img from step 

[PATCH 03/11] ram: k3-ddrss: enable the am62ax's DDR controller for am62px

[Bryan Brattlof]

The am62px family of SoCs uses the same DDR controller as found on the
am62ax family. Enable this option when building for the am62px family

Signed-off-by: Bryan Brattlof 
---
 drivers/ram/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index bf99964577418..85dcb5d959789 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -65,7 +65,7 @@ choice
default K3_J721E_DDRSS if SOC_K3_J721E || SOC_K3_J721S2
default K3_AM64_DDRSS if SOC_K3_AM642
default K3_AM64_DDRSS if SOC_K3_AM625
-   default K3_AM62A_DDRSS if SOC_K3_AM62A7
+   default K3_AM62A_DDRSS if SOC_K3_AM62A7 || SOC_K3_AM62P5
 
 config K3_J721E_DDRSS
bool "Enable J721E DDRSS support"
-- 
2.42.0

[PATCH 10/11] configs: introduce configs needed for the am62px

[Bryan Brattlof]

Introduce the initial configs needed to support the am62px SoC family

Signed-off-by: Bryan Brattlof 
---
 configs/am62px_evm_a53_defconfig | 176 +++
 configs/am62px_evm_r5_defconfig  | 137 
 include/configs/am62px_evm.h |  18 
 3 files changed, 331 insertions(+)
 create mode 100644 configs/am62px_evm_a53_defconfig
 create mode 100644 configs/am62px_evm_r5_defconfig
 create mode 100644 include/configs/am62px_evm.h

diff --git a/configs/am62px_evm_a53_defconfig b/configs/am62px_evm_a53_defconfig
new file mode 100644
index 0..f17bbbd6f417f
--- /dev/null
+++ b/configs/am62px_evm_a53_defconfig
@@ -0,0 +1,176 @@
+CONFIG_ARM=y
+CONFIG_ARCH_K3=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_SOC_K3_AM62P5=y
+CONFIG_K3_ATF_LOAD_ADDR=0x9e78
+CONFIG_TARGET_AM62P5_A53_EVM=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8048
+CONFIG_SF_DEFAULT_SPEED=2500
+CONFIG_ENV_SIZE=0x4
+CONFIG_DM_GPIO=y
+CONFIG_SPL_DM_SPI=y
+CONFIG_DEFAULT_DEVICE_TREE="k3-am62p5-sk"
+CONFIG_SPL_TEXT_BASE=0x8008
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x8200
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x8100
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BOOTCOMMAND="run envboot; run distro_bootcmd;"
+CONFIG_SPL_MAX_SIZE=0x58000
+CONFIG_SPL_PAD_TO=0x0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80a0
+CONFIG_SPL_BSS_MAX_SIZE=0x8
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
+CONFIG_SPL_DMA=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
+CONFIG_SPL_I2C=y
+CONFIG_SPL_DM_MAILBOX=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_DM_SPI_FLASH=y
+CONFIG_SPL_POWER_DOMAIN=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+# CONFIG_SPL_SPI_FLASH_TINY is not set
+CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x28
+CONFIG_SPL_THERMAL=y
+CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_REMOTEPROC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_UBI=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_MULTI_DTB_FIT=y
+CONFIG_SPL_MULTI_DTB_FIT=y
+CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_DEVICE_REMOVE=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_TI_SCI=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_MTD=y
+CONFIG_DFU_RAM=y
+CONFIG_DFU_SF=y
+CONFIG_SYS_DFU_DATA_BUF_SIZE=0x4
+CONFIG_SYS_DFU_MAX_FILE_SIZE=0x80
+CONFIG_DMA_CHANNELS=y
+CONFIG_TI_K3_NAVSS_UDMA=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0xC000
+CONFIG_FASTBOOT_BUF_SIZE=0x2F00
+CONFIG_TI_SCI_PROTOCOL=y
+CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y
+CONFIG_DA8XX_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_SPL_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_OMAP24XX=y
+CONFIG_DM_MAILBOX=y
+CONFIG_K3_SEC_PROXY=y
+CONFIG_I2C_EEPROM=y
+CONFIG_SPL_I2C_EEPROM=y
+CONFIG_FS_LOADER=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_SPL_MMC_IO_VOLTAGE=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_SPL_MMC_HS400_SUPPORT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_SPL_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_AM654=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_SOFT_RESET=y
+CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_S28HX_T=y
+CONFIG_PHY_TI_DP83867=y
+CONFIG_TI_AM65_CPSW_NUSS=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_TI_SCI_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SPL_DM_REGULATOR_GPIO=y
+CONFIG_K3_SYSTEM_CONTROLLER=y
+CONFIG_REMOTEPROC_TI_K3_ARM64=y
+CONFIG_REMOTEPROC_TI_K3_DSP=y
+CONFIG_REMOTEPROC_TI_K3_R5F=y
+CONFIG_RESET_TI_SCI=y
+CONFIG_DM_SERIAL=y
+CONFIG_SOC_DEVICE=y
+CONFIG_SOC_DEVICE_TI_K3=y
+CONFIG_SOC_TI=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_CADENCE_QSPI=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_TI_SCI=y
+CONFIG_DM_THERMAL=y
+CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_SPL_DM_USB_GADGET=y
+CONFIG_SPL_USB_HOST=y

[PATCH 4/7] m68k: Remove common.h usage

[Tom Rini]

We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.

Signed-off-by: Tom Rini 
---
Cc: Angelo Dureghello 
---
 arch/m68k/cpu/mcf523x/cpu.c | 1 -
 arch/m68k/cpu/mcf523x/cpu_init.c| 1 -
 arch/m68k/cpu/mcf523x/interrupts.c  | 1 -
 arch/m68k/cpu/mcf523x/speed.c   | 1 -
 arch/m68k/cpu/mcf52x2/cpu.c | 1 -
 arch/m68k/cpu/mcf52x2/cpu_init.c| 3 +--
 arch/m68k/cpu/mcf52x2/interrupts.c  | 1 -
 arch/m68k/cpu/mcf52x2/speed.c   | 1 -
 arch/m68k/cpu/mcf530x/cpu.c | 1 -
 arch/m68k/cpu/mcf530x/cpu_init.c| 1 -
 arch/m68k/cpu/mcf530x/interrupts.c  | 1 -
 arch/m68k/cpu/mcf530x/speed.c   | 1 -
 arch/m68k/cpu/mcf532x/cpu.c | 1 -
 arch/m68k/cpu/mcf532x/cpu_init.c| 1 -
 arch/m68k/cpu/mcf532x/interrupts.c  | 1 -
 arch/m68k/cpu/mcf532x/speed.c   | 1 -
 arch/m68k/cpu/mcf5445x/cpu.c| 1 -
 arch/m68k/cpu/mcf5445x/cpu_init.c   | 1 -
 arch/m68k/cpu/mcf5445x/dspi.c   | 1 -
 arch/m68k/cpu/mcf5445x/interrupts.c | 1 -
 arch/m68k/cpu/mcf5445x/speed.c  | 1 -
 arch/m68k/cpu/mcf5445x/start.S  | 1 -
 arch/m68k/include/asm/immap.h   | 1 +
 arch/m68k/include/asm/immap_520x.h  | 1 +
 arch/m68k/include/asm/immap_5235.h  | 1 +
 arch/m68k/include/asm/immap_5272.h  | 1 +
 arch/m68k/include/asm/immap_5275.h  | 1 +
 arch/m68k/include/asm/immap_5282.h  | 1 +
 arch/m68k/include/asm/immap_5301x.h | 1 +
 arch/m68k/include/asm/immap_5307.h  | 2 ++
 arch/m68k/include/asm/immap_5329.h  | 1 +
 arch/m68k/include/asm/immap_5441x.h | 1 +
 arch/m68k/lib/bdinfo.c  | 3 ++-
 arch/m68k/lib/bootm.c   | 1 -
 arch/m68k/lib/cache.c   | 2 +-
 arch/m68k/lib/fec.c | 2 +-
 arch/m68k/lib/interrupts.c  | 2 +-
 arch/m68k/lib/time.c| 1 -
 arch/m68k/lib/traps.c   | 1 -
 39 files changed, 17 insertions(+), 30 deletions(-)

diff --git a/arch/m68k/cpu/mcf523x/cpu.c b/arch/m68k/cpu/mcf523x/cpu.c
index bef67767b425..c843a381ea1f 100644
--- a/arch/m68k/cpu/mcf523x/cpu.c
+++ b/arch/m68k/cpu/mcf523x/cpu.c
@@ -8,7 +8,6 @@
  * TsiChung Liew (tsi-chung.l...@freescale.com)
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/m68k/cpu/mcf523x/cpu_init.c b/arch/m68k/cpu/mcf523x/cpu_init.c
index 10be73822fa5..a05cbdcb3852 100644
--- a/arch/m68k/cpu/mcf523x/cpu_init.c
+++ b/arch/m68k/cpu/mcf523x/cpu_init.c
@@ -8,7 +8,6 @@
  * TsiChung Liew (tsi-chung.l...@freescale.com)
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/m68k/cpu/mcf523x/interrupts.c 
b/arch/m68k/cpu/mcf523x/interrupts.c
index 09c7f9e67cc7..46c9207a93bb 100644
--- a/arch/m68k/cpu/mcf523x/interrupts.c
+++ b/arch/m68k/cpu/mcf523x/interrupts.c
@@ -6,7 +6,6 @@
  */
 
 /* CPU specific interrupt routine */
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/m68k/cpu/mcf523x/speed.c b/arch/m68k/cpu/mcf523x/speed.c
index 6b08a12af0b6..2eb43cc7eb9a 100644
--- a/arch/m68k/cpu/mcf523x/speed.c
+++ b/arch/m68k/cpu/mcf523x/speed.c
@@ -8,7 +8,6 @@
  * TsiChung Liew (tsi-chung.l...@freescale.com)
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/m68k/cpu/mcf52x2/cpu.c b/arch/m68k/cpu/mcf52x2/cpu.c
index 5042a38b3e9e..6bfde5e9bd70 100644
--- a/arch/m68k/cpu/mcf52x2/cpu.c
+++ b/arch/m68k/cpu/mcf52x2/cpu.c
@@ -13,7 +13,6 @@
  * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/m68k/cpu/mcf52x2/cpu_init.c b/arch/m68k/cpu/mcf52x2/cpu_init.c
index 99eb61f16758..4506eb39edfc 100644
--- a/arch/m68k/cpu/mcf52x2/cpu_init.c
+++ b/arch/m68k/cpu/mcf52x2/cpu_init.c
@@ -17,7 +17,7 @@
  * Copyright (C) 2008 Arthur Shipkowski (a...@videon-central.com)
  */
 
-#include 
+#include 
 #include 
 #include 
 #include 
@@ -25,7 +25,6 @@
 #include 
 
 #if defined(CONFIG_CMD_NET)
-#include 
 #include 
 #include 
 #endif
diff --git a/arch/m68k/cpu/mcf52x2/interrupts.c 
b/arch/m68k/cpu/mcf52x2/interrupts.c
index c5ed06007369..264bdc7d6c7e 100644
--- a/arch/m68k/cpu/mcf52x2/interrupts.c
+++ b/arch/m68k/cpu/mcf52x2/interrupts.c
@@ -7,7 +7,6 @@
  * TsiChung Liew (tsi-chung.l...@freescale.com)
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/m68k/cpu/mcf52x2/speed.c b/arch/m68k/cpu/mcf52x2/speed.c
index 6c7628252b59..538e4c623d42 100644
--- a/arch/m68k/cpu/mcf52x2/speed.c
+++ b/arch/m68k/cpu/mcf52x2/speed.c
@@ -7,7 +7,6 @@
  * Hayden Fraser (hayden.fra...@freescale.com)
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/m68k/cpu/mcf530x/cpu.c b/arch/m68k/cpu/mcf530x/cpu.c
index 53a25d8362cd..92a0ef76895c 100644
--- a/arch/m68k/cpu/mcf530x/cpu.c
+++ b/arch/m68k/cpu/mcf530x/cpu.c
@@ -4,7 +4,6 @@
  *
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/m68k/cpu/mcf530x/cpu_init.c b/arch/m68k/cpu/mcf530x/cpu_init.c
index dad47d87ab31..8f6e668d103a 100644
--- a/arch/m68k/cpu/mcf530x/cpu_init.c
+++ b/arch/m68k/cpu/mcf530x/cpu_init.c
@@ -4,7 +4,6 @@
  

[PATCH 3/7] arc: Remove common.h usage

[Tom Rini]

We can remove common.h from most cases of the code here, and only a few
places need an additional header instead.

Signed-off-by: Tom Rini 
---
Cc: Alexey Brodkin 
Cc: Eugeniy Paltsev 
Cc: uboot-snps-...@synopsys.com
---
 arch/arc/lib/bootm.c   | 1 -
 arch/arc/lib/cache.c   | 1 -
 arch/arc/lib/cpu.c | 1 -
 arch/arc/lib/init_helpers.c| 1 -
 arch/arc/lib/interrupts.c  | 2 +-
 arch/arc/lib/relocate.c| 1 -
 arch/arc/lib/reset.c   | 1 -
 board/abilis/tb100/tb100.c | 1 -
 board/synopsys/axs10x/axs10x.c | 1 -
 board/synopsys/emsdp/emsdp.c   | 1 -
 board/synopsys/hsdk/clk-lib.h  | 1 -
 board/synopsys/hsdk/env-lib.c  | 2 ++
 board/synopsys/hsdk/env-lib.h  | 1 -
 board/synopsys/hsdk/hsdk.c | 1 -
 board/synopsys/iot_devkit/iot_devkit.c | 1 -
 board/synopsys/nsim/nsim.c | 1 -
 16 files changed, 3 insertions(+), 15 deletions(-)

diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c
index 2dd003445f8f..44ec5864a1c6 100644
--- a/arch/arc/lib/bootm.c
+++ b/arch/arc/lib/bootm.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index d97a5787424e..22e748868a74 100644
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -4,7 +4,6 @@
  */
 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/arc/lib/cpu.c b/arch/arc/lib/cpu.c
index 156785796183..803dfd425580 100644
--- a/arch/arc/lib/cpu.c
+++ b/arch/arc/lib/cpu.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2013-2014, 2018 Synopsys, Inc. All rights reserved.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/arc/lib/init_helpers.c b/arch/arc/lib/init_helpers.c
index 023eae190759..858b388cc0b9 100644
--- a/arch/arc/lib/init_helpers.c
+++ b/arch/arc/lib/init_helpers.c
@@ -5,7 +5,6 @@
 
 #include 
 #include 
-#include 
 
 int init_cache_f_r(void)
 {
diff --git a/arch/arc/lib/interrupts.c b/arch/arc/lib/interrupts.c
index db21fbb11428..523b44cb95a4 100644
--- a/arch/arc/lib/interrupts.c
+++ b/arch/arc/lib/interrupts.c
@@ -3,8 +3,8 @@
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
  */
 
-#include 
 #include 
+#include 
 #include 
 #include 
 
diff --git a/arch/arc/lib/relocate.c b/arch/arc/lib/relocate.c
index fd6f4fbc9304..95b6d5150c78 100644
--- a/arch/arc/lib/relocate.c
+++ b/arch/arc/lib/relocate.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/arc/lib/reset.c b/arch/arc/lib/reset.c
index b8589d0f0a47..fa60fa963381 100644
--- a/arch/arc/lib/reset.c
+++ b/arch/arc/lib/reset.c
@@ -4,7 +4,6 @@
  */
 
 #include 
-#include 
 #include 
 
 __weak void reset_cpu(void)
diff --git a/board/abilis/tb100/tb100.c b/board/abilis/tb100/tb100.c
index 89e73225a7df..3dc9e14ef8c0 100644
--- a/board/abilis/tb100/tb100.c
+++ b/board/abilis/tb100/tb100.c
@@ -3,7 +3,6 @@
  * (C) Copyright 2014 Pierrick Hascoet, Abilis Systems
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/synopsys/axs10x/axs10x.c b/board/synopsys/axs10x/axs10x.c
index 75e4d037623e..95297a18357f 100644
--- a/board/synopsys/axs10x/axs10x.c
+++ b/board/synopsys/axs10x/axs10x.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/synopsys/emsdp/emsdp.c b/board/synopsys/emsdp/emsdp.c
index a3cee23411d0..adec7d321994 100644
--- a/board/synopsys/emsdp/emsdp.c
+++ b/board/synopsys/emsdp/emsdp.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2018 Synopsys, Inc. All rights reserved.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/synopsys/hsdk/clk-lib.h b/board/synopsys/hsdk/clk-lib.h
index 970bcd4a17e7..e1140a10b23a 100644
--- a/board/synopsys/hsdk/clk-lib.h
+++ b/board/synopsys/hsdk/clk-lib.h
@@ -7,7 +7,6 @@
 #ifndef __BOARD_CLK_LIB_H
 #define __BOARD_CLK_LIB_H
 
-#include 
 #include 
 
 enum clk_ctl_ops {
diff --git a/board/synopsys/hsdk/env-lib.c b/board/synopsys/hsdk/env-lib.c
index d85e8167332f..85a2249f17f2 100644
--- a/board/synopsys/hsdk/env-lib.c
+++ b/board/synopsys/hsdk/env-lib.c
@@ -7,6 +7,8 @@
 #include "env-lib.h"
 #include 
 #include 
+#include 
+#include 
 #include 
 
 #define MAX_CMD_LEN25
diff --git a/board/synopsys/hsdk/env-lib.h b/board/synopsys/hsdk/env-lib.h
index 48c17c4d4f62..cabca1d0f3d3 100644
--- a/board/synopsys/hsdk/env-lib.h
+++ b/board/synopsys/hsdk/env-lib.h
@@ -7,7 +7,6 @@
 #ifndef __BOARD_ENV_LIB_H
 #define __BOARD_ENV_LIB_H
 
-#include 
 #include 
 #include 
 
diff --git a/board/synopsys/hsdk/hsdk.c b/board/synopsys/hsdk/hsdk.c
index 6cbc89ae7874..8eb10f2226fc 100644
--- a/board/synopsys/hsdk/hsdk.c
+++ b/board/synopsys/hsdk/hsdk.c
@@ -4,7 +4,6 @@
  * Author: Eugeniy Paltsev 
  */
 
-#include 
 #include 
 

[PATCH 1/7] checkpatch.pl: Make common.h check boarder

[Tom Rini]

At this point in time we should not add common.h to any new files, so
make checkpatch.pl complain.

Signed-off-by: Tom Rini 
---
Cc: Simon Glass 

This causes a bunch of patman tests, for checkpatch, to now fail and I
don't really understand why, at all.  And that was before I added a test
for the new error, which I had hoped would clear up the problem.
---
 scripts/checkpatch.pl   | 8 +++-
 tools/patman/test_checkpatch.py | 7 ++-
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 488d73a0ed77..c3314da8a3c7 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -2636,12 +2636,18 @@ sub u_boot_line {
  "All CONFIG symbols are managed by Kconfig\n" . 
$herecurr);
}
 
-   # Don't put common.h and dm.h in header files
+   # Don't put dm.h in header files
if ($realfile =~ /\.h$/ && $rawline =~ 
/^\+#include\s*<(common|dm)\.h>*/) {
ERROR("BARRED_INCLUDE_IN_HDR",
  "Avoid including common.h and dm.h in header files\n" . 
$herecurr);
}
 
+   # Don't add common.h to files
+   if ($rawline =~ /^\+#include\s*<(common|dm)\.h>*/) {
+   ERROR("BARRED_INCLUDE_COMMON_H",
+ "Do not add common.h to files\n" . $herecurr);
+   }
+
# Do not disable fdt / initrd relocation
if ($rawline =~ /^\+.*(fdt|initrd)_high=0x/) {
ERROR("DISABLE_FDT_OR_INITRD_RELOC",
diff --git a/tools/patman/test_checkpatch.py b/tools/patman/test_checkpatch.py
index a8bb364e42b2..187736d617d5 100644
--- a/tools/patman/test_checkpatch.py
+++ b/tools/patman/test_checkpatch.py
@@ -401,10 +401,15 @@ index 000..2234c87
 def test_barred_include_in_hdr(self):
 """Test for using a barred include in a header file"""
 pm = PatchMaker()
-#pm.add_line('include/myfile.h', '#include ')
 pm.add_line('include/myfile.h', '#include ')
 self.check_single_message(pm, 'BARRED_INCLUDE_IN_HDR', 'error')
 
+def test_barred_include_common_h(self):
+"""Test for adding common.h to a file"""
+pm = PatchMaker()
+pm.add_line('include/myfile.h', '#include ')
+self.check_single_message(pm, 'BARRED_INCLUDE_COMMON_H', 'error')
+
 def test_config_is_enabled_config(self):
 """Test for accidental CONFIG_IS_ENABLED(CONFIG_*) calls"""
 pm = PatchMaker()
-- 
2.34.1

[PATCH 2/7] include: Add in a few places

[Tom Rini]

These files references a number of types that are defined in
 (and so forth), so include it here rather than rely on
indirect inclusion.

Signed-off-by: Tom Rini 
---
Cc: Simon Glass 
---
 include/bootstage.h | 1 +
 include/cache.h | 2 ++
 include/cpu.h   | 2 ++
 3 files changed, 5 insertions(+)

diff --git a/include/bootstage.h b/include/bootstage.h
index f9376c320c96..affb0e5c6a6a 100644
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -11,6 +11,7 @@
 #ifndef _BOOTSTAGE_H
 #define _BOOTSTAGE_H
 
+#include 
 #include 
 
 /* Flags for each bootstage record */
diff --git a/include/cache.h b/include/cache.h
index b12fec259156..296ae3c8b48e 100644
--- a/include/cache.h
+++ b/include/cache.h
@@ -6,6 +6,8 @@
 #ifndef __CACHE_H
 #define __CACHE_H
 
+#include 
+
 struct udevice;
 
 /*
diff --git a/include/cpu.h b/include/cpu.h
index be02a1671298..2077ff30634b 100644
--- a/include/cpu.h
+++ b/include/cpu.h
@@ -7,6 +7,8 @@
 #ifndef __CPU_H
 #define __CPU_H
 
+#include 
+
 struct udevice;
 
 /**
-- 
2.34.1

Re: [PATCH v7 2/7] Revert "arm: dts: k3-j7*: ddr: Update to 0.10 version of DDR config tool"

[Tom Rini]

On Fri, Oct 06, 2023 at 10:15:56AM +0530, Manorit Chawdhry wrote:

> The update causes instability in am68-sk boards so revert the patch in
> the meantime till fix is available.
> 
> This reverts commit f1edf4bb6aa19732574ac23ca90cb9a0ba395ec1.
> 
> Signed-off-by: Manorit Chawdhry 
> Reviewed-by: Nishanth Menon 

Applied to u-boot/master, thanks!

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH v7 5/7] arm: dts: k3-am68: Sync from Linux tag v6.6-rc1

[Tom Rini]

On Fri, Oct 06, 2023 at 10:15:59AM +0530, Manorit Chawdhry wrote:

> The following commit syncs the device tree from Linux tag
> v6.6-rc1 to U-boot and fixes the following to be compatible with
> the future syncs -
> 
> - Include k3-am68-sk-base-board.dts file
> 
> Remove the duplicated pinmuxes from r5 and -u-boot.dtsi files and
> include k3-am68-sk-base-board.dts for Linux fixes to propagate
> to U-boot.
> 
> - Fixing the mcu_timer0
> 
> Remove timer0 and use the mcu_timer0 defined in mcu-wakeup.dtsi
> 
> - Fixing secure proxy nodes
> 
> Linux DT now have these nodes defined so remove them and rename to
> use the Linux DT ones.
> 
> - Remove cpsw node
> 
> The compatible is now fixed and the node is not required in
> -u-boot specifically
> 
> - Remove aliases and chosen node
> 
> Use these from Linux and don't override when not required.
> 
> - Remove /delete-property/ from sdhci nodes
> 
> We have the necessary clock and dev data so remove these.
> 
> - Remove dummy_clocks and fs_loader0
> 
> These weren't being used anywhere so remove it.
> 
> - Remove mcu_ringacc override
> 
> All these have been put in a single commit to not break the
> bisectability.
> 
> Reviewed-by: Neha Malcom Francis 
> Reviewed-by: Nishanth Menon 
> Signed-off-by: Manorit Chawdhry 

Applied to u-boot/master, thanks!

-- 
Tom


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Description: PGP signature

Re: [PATCH v7 4/7] arm: dts: k3-j721s2: Sync from Linux tag v6.6-rc1

[Tom Rini]

On Fri, Oct 06, 2023 at 10:15:58AM +0530, Manorit Chawdhry wrote:

> The following commit syncs the device tree from Linux tag
> v6.6-rc1 to U-boot and fixes the following to be compatible with
> the future syncs -
> 
> - Include k3-j721s2-common-proc-board.dts file
> 
> Remove the duplicated pinmuxes from r5 and -u-boot.dtsi files and
> include k3-j721s2-common-proc-board.dts for Linux fixes to propagate
> to U-boot.
> 
> - Fixing the mcu_timer0
> 
> Remove timer0 and use the mcu_timer0 defined in mcu-wakeup.dtsi
> 
> - Fixing secure proxy nodes
> 
> Linux DT now have these nodes defined so remove them and rename to
> use the Linux DT ones.
> 
> - Remove cpsw node
> 
> The compatible is now fixed and the node is not required in
> -u-boot specifically
> 
> - Remove aliases and chosen node
> 
> Use these from Linux and don't override when not required.
> 
> - Remove /delete-property/ from sdhci nodes
> 
> We have the necessary clock and dev data so remove these.
> 
> - Remove dummy_clocks and fs_loader0
> 
> These weren't being used anywhere so remove it.
> 
> - Remove mcu_ringacc override
> 
> All these have been put in a single commit to not break the
> bisectability.
> 
> Reviewed-by: Neha Malcom Francis 
> Reviewed-by: Nishanth Menon 
> Signed-off-by: Manorit Chawdhry 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v7 7/7] board: ti: j721s2: MAINTAINERS: Update the MAINTAINERS File.

[Tom Rini]

On Fri, Oct 06, 2023 at 10:16:01AM +0530, Manorit Chawdhry wrote:

> Update the MAINTAINERS file and propose a new MAINTAINER for j721s2 due
> to the previous MAINTAINER not being associated with TI.
> 
> Reviewed-by: Nishanth Menon 
> Signed-off-by: Manorit Chawdhry 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v7 3/7] arm: mach-k3: j721s2: Add mcu_timer0 id to the dev list

[Tom Rini]

On Fri, Oct 06, 2023 at 10:15:57AM +0530, Manorit Chawdhry wrote:

> mcu_timer0 is used by u-boot as the tick-timer. Add it to the soc
> devices lsit so it an be enabled via the k3 power controller.
> 
> Reviewed-by: Neha Malcom Francis 
> Reviewed-by: Nishanth Menon 
> Signed-off-by: Manorit Chawdhry 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v7 6/7] docs: board: ti: Add j721s2_evm documentation

[Tom Rini]

On Fri, Oct 06, 2023 at 10:16:00AM +0530, Manorit Chawdhry wrote:

> Add the documentation for J721S2-EVM and SK-AM68
> 
> TRM for J721S2/AM68: https://www.ti.com/lit/pdf/spruj28
> Product Page for J721S2: https://www.ti.com/tool/J721S2XSOMXEVM
> Product Page for AM68: https://www.ti.com/tool/SK-AM68
> 
> Reviewed-by: Neha Malcom Francis 
> Reviewed-by: Nishanth Menon 
> Signed-off-by: Manorit Chawdhry 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v7 1/7] configs: j721s2_evm_r5_defconfig: Increase malloc pool size in DRAM

[Tom Rini]

On Fri, Oct 06, 2023 at 10:15:55AM +0530, Manorit Chawdhry wrote:

> From: Udit Kumar 
> 
> The malloc capacity in DRAM at R5 SPL is set to 1MB which isn't
> sufficient to load the new tispl.bin to
> enable loading of tispl.bin the size is increased by 256KB to 1.25MB.
> 
> Cc: Nikhil M Jain 
> Signed-off-by: Udit Kumar 
> Reviewed-by: Nishanth Menon 
> Signed-off-by: Manorit Chawdhry 
> Reviewed-by: Nikhil M Jain 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v5 2/2] arm: dts: j7200: dts sync with Linux 6.6-rc1

[Tom Rini]

On Thu, Oct 05, 2023 at 01:12:58PM -0500, Reid Tonking wrote:

> Sync j7200 dts with Linux 6.6-rc1
> 
> - k3-j7200-r5-common-proc-board.dts now inherits from
>   k3-j7200-common-proc-board.dts instead of k3-j7200-som-p0.dtsi. This
>   allows us to trim down the r5 file considerably by using existing
>   properties
> 
> - remove pimux nodes from r5 file
> 
> - remove duplicate nodes & node properties from r5/u-boot files
> 
> - mcu_timer0 now used instead of timer1
> 
>   mcu_timer0 device id added to dev-data.c file in order to work
> 
> - remove cpsw node
> 
>   This node is no longer required since the compatible is now fixed
> 
> - remove dummy_clock_19_2_mhz
> 
>   This node wasn't being used anyhere, so it was removed
> 
> - remove dummy_clock_200mhz
> 
>   main_sdhci0 & main_sdhci1 no longer need dummy clock for eMMC/SD
> 
> - fix secure proxy node
> 
>   mcu_secproxy changed to used secure_prxy_mcu which is already
>   defined in k3-j7200-mcu-wakeup.dtsi
> 
> - removed _ringacc property override since they're present in
>   v6.6-rc1
> 
> Signed-off-by: Reid Tonking 
> Reviewed-by: Nishanth Menon 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v2 2/2] board: ti: am64x: Switch to standard boot flow

[Tom Rini]

On Thu, Oct 05, 2023 at 04:06:42PM +0300, Roger Quadros wrote:

> Switch to using bootstd. Note with this change, we will stop using
> distro_bootcmd and instead depend entirely on bootflow method of
> starting the system up.
> 
> Drop header files that are no longer needed in am64x_evm.h.
> k3_dfu.h is available via k3_dfu.env in am64x.env.
> 
> Drop unused macro CFG_SYS_SDRAM_BASE1.
> 
> Signed-off-by: Roger Quadros 
> Reviewed-by: Nishanth Menon 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v5 1/2] arm: mach-k3: j7200: Add mcu_timer0 id to the dev list

[Tom Rini]

On Thu, Oct 05, 2023 at 01:12:57PM -0500, Reid Tonking wrote:

> mcu_timer0 is now used as the tick timer in u-boot, so this adds the
> timer to the soc device list so it can be enabled via the k3 power
> controller.
> 
> Reviewed-by: Nishanth Menon 
> Signed-off-by: Reid Tonking 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v2 1/2] board: ti: am62x: am62x.env: Fix boot_targets

[Tom Rini]

On Thu, Oct 05, 2023 at 04:06:41PM +0300, Roger Quadros wrote:

> ti_mmc is not a valid boot_target for standard boot flow so
> remove it. Prefer mmc1 (sd-card) over mmc0 (emmc).
> 
> Signed-off-by: Roger Quadros 
> Reviewed-by: Nishanth Menon 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH] clk: ti: clk-sci: Notify AVS driver based upon clock rate

[Tom Rini]

On Thu, Sep 21, 2023 at 10:33:43PM +0530, Udit Kumar wrote:

> AVS driver needs to be notified before or after clock change,
> depending upon new rate is greater or less than current clock rate.
> 
> Fixes: 1e0aa873bc7cd ("clk: clk-ti-sci: Notify AVS driver upon setting clock 
> rate")
> 
> Cc: Keerthy 
> Signed-off-by: Udit Kumar 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH] arm: mach-k3: j721s2_init: Enable memory with CONFIG_K3_J721E_DDRSS

[Tom Rini]

On Fri, Aug 11, 2023 at 12:04:44PM +0200, Dominik Haller wrote:

> Make that condition more generic by checking if the memory controller
> driver is enabled instead of using the EVM's config.
> 
> Signed-off-by: Dominik Haller 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v4] clk: ti: clk-k3: Notify AVS driver upon setting clock rate

[Tom Rini]

On Thu, Sep 21, 2023 at 10:30:38PM +0530, Udit Kumar wrote:

> AVS is enabled at R5 SPL stage, on few platforms like J721E
> and J7200 clk-k3 is used instead if clk-sci driver.
> 
> Add support in clk-k3 driver as well to notify AVS driver
> on setting clock rate so that voltage is changed accordingly.
> 
> Cc: Keerthy 
> Signed-off-by: Udit Kumar 

Applied to u-boot/master, thanks!

-- 
Tom


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[PATCH v3 7/7] rockchip: doc: add rkmtd.rst

[Johan Jonker]

Add documention for Rockchip rkmtd virtual block device.

Signed-off-by: Johan Jonker 
---

Changed V3:
  New patch
---
 doc/board/rockchip/index.rst |   1 +
 doc/board/rockchip/rkmtd.rst | 105 +++
 2 files changed, 106 insertions(+)
 create mode 100644 doc/board/rockchip/rkmtd.rst

diff --git a/doc/board/rockchip/index.rst b/doc/board/rockchip/index.rst
index 0c377e9bbba0..9a87a035e95e 100644
--- a/doc/board/rockchip/index.rst
+++ b/doc/board/rockchip/index.rst
@@ -8,3 +8,4 @@ Rockchip
:maxdepth: 2

rockchip
+   rkmtd
diff --git a/doc/board/rockchip/rkmtd.rst b/doc/board/rockchip/rkmtd.rst
new file mode 100644
index ..1481380ba6c5
--- /dev/null
+++ b/doc/board/rockchip/rkmtd.rst
@@ -0,0 +1,105 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2023 Johan Jonker 
+
+RKMTD
+=
+
+Info
+
+
+The command rkmtd creates a virtual block device to transfer
+Rockchip boot block data to and from NAND with block orientated
+tools like "ums" and "rockusb".
+
+It uses the Rockchip MTD driver to scan for boot blocks and copies
+data from the first block in a GPT formatted virtual disk.
+Data must be written in U-boot "idbloader.img" format and start at
+partition "loader1" offset 64. The data header is parsed
+for length and offset. When the last sector is received
+it erases up to 5 erase blocks on NAND and writes boot blocks
+in a pattern depending on the NAND ID. Data is then verified.
+When a block turns out bad the block header is discarded.
+
+Limitations
+---
+
+- Support with CONFIG_ROCKCHIP_NAND MTD driver only.
+- Support for Rockchip boot block header type 1 only.
+- Pattern for listed NAND IDs only. (Logic still not disclosed by Rockchip)
+- The MTD framework driver data and NAND ID must be extracted at a lower level.
+
+Available rkmtd commands
+
+
+.. code-block:: bash
+
+rkmtd bind   - bind RKMTD device
+rkmtd unbind - unbind RKMTD device
+rkmtd info []- show all available RKMTD devices
+rkmtd dev [] - show or set current RKMTD device
+
+U-boot settings
+---
+
+Config to enable Rockchip MTD support:
+
+.. code-block:: bash
+
+CONFIG_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_ROCKCHIP_NAND=y
+
+Option to keep existing NAND data unchanged:
+
+.. code-block:: bash
+
+CONFIG_ROCKCHIP_NAND_SKIP_BBTSCAN=y
+
+Commands to enable:
+
+.. code-block:: bash
+
+CONFIG_CMD_USB=y
+CONFIG_CMD_RKMTD=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+
+Linux Host (PC) tool commands combinations that work
+
+
+.. table::
+   :widths: 20 44
+
+    
+   U-boot   Linux
+    
+   rkmtd bind 0
+   rockusb 0 rkmtd 0
+upgrade_tool pl
+
+upgrade_tool rl 64 512 idbloader_backup.img
+
+upgrade_tool wl 64 idbloader.img
+
+upgrade_tool rd
+
+rkdeveloptool ppt
+
+rkdeveloptool rl 64 512 idbloader_backup.img
+
+rkdeveloptool wlx loader1 idbloader.img
+
+rkdeveloptool wl 64 idbloader.img
+
+rkdeveloptool rd
+
+rkflashtool r 64 512 > idbloader_backup.img
+
+rkflashtool w 64 512 < idbloader.img
+   ums 0 rkmtd 0
+dd if=/dev/sda1 of=idbloader_backup.img
+
+dd if=idbloader.img of=/dev/sda1
+    
--
2.39.2

[PATCH v3 5/7] rockchip: cmd: add rkmtd command

[Johan Jonker]

The command rkmtd creates a virtual block device to transfer
Rockchip boot block data to and from NAND with block orientated
tools like "ums" and "rockusb".

It uses the Rockchip MTD driver to scan for boot blocks and copies
data from the first block in a GPT formated virtual disk.
Data must be written in U-boot "idbloader.img" format and start at
partition "loader1" offset 64. The data header is parsed
for length and offset. When the last sector is received
it erases up to 5 erase blocks on NAND and writes bootblocks
in a pattern depending on the NAND ID. Data is then verified.
When a block turns out bad the block header is discarded.

Signed-off-by: Johan Jonker 
---

Changed V3:
  Split driver from command
  Split header
  Restyle
---
 cmd/Kconfig  |   8 ++
 cmd/Makefile |   1 +
 cmd/rkmtd.c  | 204 +++
 3 files changed, 213 insertions(+)
 create mode 100644 cmd/rkmtd.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6470b138d2f8..1979c6c62aa7 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1561,6 +1561,14 @@ config CMD_USB_SDP
  Enables the command "sdp" which is used to have U-Boot emulating the
  Serial Download Protocol (SDP) via USB.

+config CMD_RKMTD
+   bool "rkmtd"
+   select RKMTD
+   help
+ Enable the command "rkmtd" to create a virtual block device to 
transfer
+ Rockchip boot block data to and from NAND with block orientated tools
+ like "ums" and "rockusb".
+
 config CMD_ROCKUSB
bool "rockusb"
depends on USB_FUNCTION_ROCKUSB
diff --git a/cmd/Makefile b/cmd/Makefile
index 9bebf321c397..11927a5904e6 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -151,6 +151,7 @@ obj-$(CONFIG_CMD_REISER) += reiser.o
 obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
 obj-$(CONFIG_CMD_RNG) += rng.o
 obj-$(CONFIG_CMD_KASLRSEED) += kaslrseed.o
+obj-$(CONFIG_CMD_RKMTD) += rkmtd.o
 obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_CMD_RTC) += rtc.o
 obj-$(CONFIG_SANDBOX) += host.o
diff --git a/cmd/rkmtd.c b/cmd/rkmtd.c
new file mode 100644
index ..bf01bf43e4dc
--- /dev/null
+++ b/cmd/rkmtd.c
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *
+ * Driver interface derived from:
+ * /cmd/host.c
+ * Copyright (c) 2012, Google Inc.
+ *
+ * Copyright (C) 2023 Johan Jonker 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int do_rkmtd_bind(struct cmd_tbl *cmdtp, int flag, int argc,
+char *const argv[])
+{
+   struct udevice *dev;
+   const char *label;
+   int ret;
+
+   argc--;
+   argv++;
+
+   if (argc < 1)
+   return CMD_RET_USAGE;
+
+   if (argc > 1)
+   return CMD_RET_USAGE;
+
+   label = argv[0];
+   ret = rkmtd_create_attach_mtd(label, );
+   if (ret) {
+   printf("Cannot create device / bind mtd\n");
+   return CMD_RET_FAILURE;
+   }
+
+   return 0;
+}
+
+static struct udevice *parse_rkmtd_label(const char *label)
+{
+   struct udevice *dev;
+
+   dev = rkmtd_find_by_label(label);
+   if (!dev) {
+   int devnum;
+   char *ep;
+
+   devnum = hextoul(label, );
+   if (*ep ||
+   uclass_find_device_by_seq(UCLASS_RKMTD, devnum, )) {
+   printf("No such device '%s'\n", label);
+   return NULL;
+   }
+   }
+
+   return dev;
+}
+
+static int do_rkmtd_unbind(struct cmd_tbl *cmdtp, int flag, int argc,
+  char *const argv[])
+{
+   struct udevice *dev;
+   const char *label;
+   int ret;
+
+   if (argc < 2)
+   return CMD_RET_USAGE;
+
+   label = argv[1];
+   dev = parse_rkmtd_label(label);
+   if (!dev)
+   return CMD_RET_FAILURE;
+
+   ret = rkmtd_detach(dev);
+   if (ret) {
+   printf("Cannot detach mtd\n");
+   return CMD_RET_FAILURE;
+   }
+
+   ret = device_unbind(dev);
+   if (ret) {
+   printf("Cannot unbind device '%s'\n", dev->name);
+   return CMD_RET_FAILURE;
+   }
+
+   return 0;
+}
+
+static void show_rkmtd_dev(struct udevice *dev)
+{
+   struct rkmtd_dev *plat = dev_get_plat(dev);
+   struct blk_desc *desc;
+   struct udevice *blk;
+   int ret;
+
+   printf("%3d ", dev_seq(dev));
+
+   ret = blk_get_from_parent(dev, );
+   if (ret)
+   return;
+
+   desc = dev_get_uclass_plat(blk);
+   printf("%12lu %-15s\n", (unsigned long)desc->lba, plat->label);
+}
+
+static int do_rkmtd_info(struct cmd_tbl *cmdtp, int flag, int argc,
+char *const argv[])
+{
+   struct udevice *dev;
+
+   if (argc < 1)
+   return CMD_RET_USAGE;
+
+   dev = NULL;
+   if (argc >= 2) {
+   dev = parse_rkmtd_label(argv[1]);
+   if 

[PATCH v3 3/7] rockchip: block: add rkmtd class and drivers

[Johan Jonker]

Add rkmtd class and drivers to create a virtual block device
to transfer Rockchip boot block data to and from NAND with
block orientated tools like "ums" and "rockusb".

Signed-off-by: Johan Jonker 
---

Changed V3:
  New patch
  Split driver from command
  Split header
  Use devm_kzalloc
  Remove out of memory debug
  Restyle
---
 drivers/block/Kconfig  |7 +
 drivers/block/Makefile |2 +
 drivers/block/rkmtd.c  | 1138 
 include/rkmtd.h|  190 +++
 4 files changed, 1337 insertions(+)
 create mode 100644 drivers/block/rkmtd.c
 create mode 100644 include/rkmtd.h

diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index 1abea3f10db4..048a6caef00f 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -262,3 +262,10 @@ config SYS_64BIT_LBA
help
  Make the block subsystem use 64bit sector addresses, rather than the
  default of 32bit.
+
+config RKMTD
+   bool "Rockchip rkmtd virtual block device"
+   help
+ Enable "rkmtd" class and driver to create a virtual block device
+ to transfer Rockchip boot block data to and from NAND with block
+ orientate tools like "ums" and "rockusb".
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index a161d145fd39..fdcba5c8318f 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -11,6 +11,7 @@ endif

 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_IDE) += ide.o
+obj-$(CONFIG_RKMTD) += rkmtd.o
 endif
 obj-$(CONFIG_SANDBOX) += sandbox.o host-uclass.o host_dev.o
 obj-$(CONFIG_$(SPL_TPL_)BLOCK_CACHE) += blkcache.o
@@ -19,3 +20,4 @@ obj-$(CONFIG_BLKMAP) += blkmap.o
 obj-$(CONFIG_EFI_MEDIA) += efi-media-uclass.o
 obj-$(CONFIG_EFI_MEDIA_SANDBOX) += sb_efi_media.o
 obj-$(CONFIG_EFI_MEDIA_BLK) += efi_blk.o
+
diff --git a/drivers/block/rkmtd.c b/drivers/block/rkmtd.c
new file mode 100644
index ..061c8d9b7c1a
--- /dev/null
+++ b/drivers/block/rkmtd.c
@@ -0,0 +1,1138 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Some functions are derived from:
+ * 
https://github.com/rockchip-linux/u-boot/blob/next-dev/drivers/rknand/rk_ftl_arm_v7.S
+ * Copyright (c) 2016-2018, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Driver interface derived from:
+ * /drivers/block/host_dev.c
+ * /drivers/block/host-uclass.c
+ * Copyright 2022 Google LLC
+ * Written by Simon Glass 
+ *
+ * Copyright (C) 2023 Johan Jonker 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#if !IS_ENABLED(CONFIG_SANDBOX)
+#include 
+#endif
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct nand_para_info nand_para_tbl[] = {
+   {6, {0x2c, 0x64, 0x44, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x44, 0x44, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 1064, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x68, 0x04, 0x4a, 0xa9, 0x00}, 4, 1,  8,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x88, 0x04, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0xa8, 0x05, 0xcb, 0xa9, 0x00}, 4, 2, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x68, 0x04, 0x46, 0x89, 0x00}, 4, 1,  8,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x48, 0x04, 0x4a, 0xa5, 0x00}, 4, 1,  8,  256, 2, 2, 1024, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x84, 0x64, 0x3c, 0xa5, 0x00}, 4, 1, 32,  512, 2, 2, 1024, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x84, 0x64, 0x54, 0xa9, 0x00}, 4, 1, 32,  512, 2, 2, 1024, 
0x01df,  4, 18, 60, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0xd7, 0x94, 0x3e, 0x84, 0x00}, 4, 1,  8,  128, 2, 2, 4096, 
0x0117,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x48, 0x04, 0x46, 0x85, 0x00}, 4, 1,  8,  256, 2, 2, 1024, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x88, 0x05, 0xc6, 0x89, 0x00}, 4, 2,  8,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x88, 0x24, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x68, 0x00, 0x27, 0xa9, 0x00}, 4, 1, 16,  128, 1, 2, 2048, 
0x011f,  0,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x64, 0x64, 0x56, 0xa5, 0x00}, 4, 1, 24,  512, 2, 2,  700, 
0x01df,  4, 18, 60, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x84, 0xc5, 0x4b, 0xa9, 0x00}, 4, 2, 16,  256, 2, 2, 2048, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0xd5, 0xd1, 0xa6, 0x68, 0x00}, 4, 2,  8,   64, 1, 2, 2048, 
0x0117,  0,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},

[PATCH v3 4/7] rockchip: block: blk-uclass: disable bounce buffer support for rkmtd

[Johan Jonker]

Disable bounce buffer support for rkmtd.

Signed-off-by: Johan Jonker 
---

Changed V3:
  New patch
---
 drivers/block/blk-uclass.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 30ad5bbb0024..ac1b43d757d8 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -415,7 +415,7 @@ struct blk_bounce_buffer {

 static int blk_buffer_aligned(struct bounce_buffer *state)
 {
-#if IS_ENABLED(CONFIG_BOUNCE_BUFFER)
+#if IS_ENABLED(CONFIG_BOUNCE_BUFFER) && !IS_ENABLED(CONFIG_RKMTD)
struct blk_bounce_buffer *bbstate =
container_of(state, struct blk_bounce_buffer, state);
struct udevice *dev = bbstate->dev;
@@ -441,7 +441,7 @@ long blk_read(struct udevice *dev, lbaint_t start, lbaint_t 
blkcnt, void *buf)
  start, blkcnt, desc->blksz, buf))
return blkcnt;

-   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER)) {
+   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER) && !IS_ENABLED(CONFIG_RKMTD)) {
struct blk_bounce_buffer bbstate = { .dev = dev };
int ret;

@@ -478,7 +478,7 @@ long blk_write(struct udevice *dev, lbaint_t start, 
lbaint_t blkcnt,

blkcache_invalidate(desc->uclass_id, desc->devnum);

-   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER)) {
+   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER) && !IS_ENABLED(CONFIG_RKMTD)) {
struct blk_bounce_buffer bbstate = { .dev = dev };
int ret;

--
2.39.2

[PATCH v3 6/7] rockchip: test: dm: add rkmtd test

[Johan Jonker]

Add Rockchip rkmtd test:
Create/attach/detach RKMTD device.
Send/read data with Rockchip boot block header.
Test that reusing the same label should work.
Basic test of 'rkmtd' commands.

Signed-off-by: Johan Jonker 
---

Changed V3:
  New patch
---
 test/dm/Makefile |   1 +
 test/dm/rkmtd.c  | 201 +++
 2 files changed, 202 insertions(+)
 create mode 100644 test/dm/rkmtd.c

diff --git a/test/dm/Makefile b/test/dm/Makefile
index 7ed00733c1a6..a5e0a2744375 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -100,6 +100,7 @@ obj-$(CONFIG_REMOTEPROC) += remoteproc.o
 obj-$(CONFIG_DM_RESET) += reset.o
 obj-$(CONFIG_SYSRESET) += sysreset.o
 obj-$(CONFIG_DM_REGULATOR) += regulator.o
+obj-$(CONFIG_CMD_RKMTD) += rkmtd.o
 obj-$(CONFIG_DM_RNG) += rng.o
 obj-$(CONFIG_DM_RTC) += rtc.o
 obj-$(CONFIG_SCMI_FIRMWARE) += scmi.o
diff --git a/test/dm/rkmtd.c b/test/dm/rkmtd.c
new file mode 100644
index ..90b404f85441
--- /dev/null
+++ b/test/dm/rkmtd.c
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Test derived from:
+ * /test/dm/host.c
+ * Copyright 2022 Google LLC
+ * Written by Simon Glass 
+ *
+ * Copyright (C) 2023 Johan Jonker 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define BUF_SIZE   12 * 512
+
+/* Basic test of the RKMTD interface */
+static int dm_test_rkmtd(struct unit_test_state *uts)
+{
+   struct udevice *dev, *part, *chk, *blk;
+   char write[BUF_SIZE], read[BUF_SIZE];
+   static const char label[] = "test";
+   struct rkmtd_dev *plat;
+   struct blk_desc *desc;
+   struct sector0 *sec0;
+   int i;
+
+   ut_asserteq(-ENODEV, uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq(-ENODEV, uclass_first_device_err(UCLASS_PARTITION, ));
+
+   ut_assertok(rkmtd_create_device(label, ));
+
+   /* Check that the plat data has been allocated */
+   plat = dev_get_plat(dev);
+   ut_asserteq_str("test", plat->label);
+   ut_assert(label != plat->label);
+
+   /* Attach RKMTD driver */
+   ut_assertok(rkmtd_attach(dev));
+   ut_assertok(uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq_ptr(chk, dev);
+
+   /* Get RKMTD block device */
+   ut_assertok(blk_get_from_parent(dev, ));
+   ut_assertok(device_probe(blk));
+
+   /* There should be a GPT partition table in this device */
+   ut_asserteq(0, uclass_first_device_err(UCLASS_PARTITION, ));
+
+   /* Write a boot block and verify that we get the same data back */
+   desc = dev_get_uclass_plat(blk);
+   ut_asserteq(true, desc->removable);
+   ut_asserteq(LBA, desc->lba);
+
+   memset(write, 0, BLK_SIZE);
+
+   for (i = BLK_SIZE; i < sizeof(write); i++)
+   write[i] = i;
+
+   sec0 = (struct sector0 *)write;
+   sec0->magic = 0x0FF0AA55;
+   sec0->rc4_flag = 0;
+   sec0->boot_code1_offset = 4;
+   sec0->boot_code2_offset = 4;
+   sec0->flash_data_size = 4;
+   sec0->flash_boot_size = 8;
+
+   rkmtd_rc4(write, 512);
+
+   ut_asserteq(12, blk_dwrite(desc, 64, 12, write));
+   ut_asserteq(12, blk_dread(desc, 64, 12, read));
+   ut_asserteq_mem(write, read, BUF_SIZE);
+
+   ut_assertok(rkmtd_detach(dev));
+
+   ut_asserteq(-ENODEV, blk_get_from_parent(dev, ));
+   ut_assertok(device_unbind(dev));
+
+   return 0;
+}
+DM_TEST(dm_test_rkmtd, UT_TESTF_SCAN_FDT);
+
+/* Reusing the same label should work */
+static int dm_test_rkmtd_dup(struct unit_test_state *uts)
+{
+   static const char label[] = "test";
+   struct udevice *dev, *chk;
+
+   /* Create a RKMTD device with label "test" */
+   ut_asserteq(0, uclass_id_count(UCLASS_RKMTD));
+   ut_assertok(rkmtd_create_device(label, ));
+   ut_assertok(rkmtd_attach(dev));
+   ut_assertok(uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq_ptr(chk, dev);
+   ut_asserteq(1, uclass_id_count(UCLASS_RKMTD));
+
+   /* Create another device with the same label (should remove old one) */
+   ut_assertok(rkmtd_create_device(label, ));
+   ut_assertok(rkmtd_attach(dev));
+   ut_assertok(uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq_ptr(chk, dev);
+
+   /* Make sure there is still only one device */
+   ut_asserteq(1, uclass_id_count(UCLASS_RKMTD));
+
+   return 0;
+}
+DM_TEST(dm_test_rkmtd_dup, UT_TESTF_SCAN_FDT);
+
+/* Basic test of the 'rkmtd' command */
+static int dm_test_rkmtd_cmd(struct unit_test_state *uts)
+{
+   struct udevice *dev, *blk;
+   struct blk_desc *desc;
+
+   console_record_reset();
+
+   /* First check 'rkmtd info' with binding */
+   ut_assertok(run_command("rkmtd info", 0));
+   ut_assert_nextline("dev   blocks label  ");
+   ut_assert_console_end();
+
+   /* Bind device 1 */
+   ut_assertok(run_commandf("rkmtd bind 

[PATCH v3 1/7] mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN option

[Johan Jonker]

On Rockchip SoCs the first boot stages are written on NAND
with help of manufacturer software that uses a different format
then the MTD framework. Skip the automatic BBT scan with the
NAND_SKIP_BBTSCAN option to be able to pass the driver probe
function and to let the original data unchanged.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---
 drivers/mtd/nand/raw/Kconfig| 9 +
 drivers/mtd/nand/raw/rockchip_nfc.c | 3 +++
 2 files changed, 12 insertions(+)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index d624589a892b..72547f00fbec 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -611,6 +611,15 @@ config ROCKCHIP_NAND
NFC v800: RK3308, RV1108
NFC v900: PX30, RK3326

+config ROCKCHIP_NAND_SKIP_BBTSCAN
+   bool "Skip the automatic BBT scan with Rockchip NAND controllers"
+   depends on ROCKCHIP_NAND
+   default n
+   help
+ Skip the automatic BBT scan with the NAND_SKIP_BBTSCAN
+ option when data content is not in MTD format or
+ must remain unchanged.
+
 config TEGRA_NAND
bool "Support for NAND controller on Tegra SoCs"
depends on ARCH_TEGRA
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c 
b/drivers/mtd/nand/raw/rockchip_nfc.c
index 6ad51df4acff..df6742c2f9bb 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -981,6 +981,9 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc 
*nfc, int devnum)
chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;

+   if (IS_ENABLED(CONFIG_ROCKCHIP_NAND_SKIP_BBTSCAN))
+   chip->options |= NAND_SKIP_BBTSCAN;
+
rk_nfc_hw_init(nfc);
ret = nand_scan_ident(mtd, nsels, NULL);
if (ret)
--
2.39.2

[PATCH v3 2/7] rockchip: dm: prepare rkmtd UCLASS

[Johan Jonker]

Prepare a rkmtd UCLASS in use for writing Rockchip boot blocks
in combination with existing userspace tools and rockusb command.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---
 disk/part.c| 4 
 drivers/block/blk-uclass.c | 1 +
 include/dm/uclass-id.h | 1 +
 3 files changed, 6 insertions(+)

diff --git a/disk/part.c b/disk/part.c
index 85244b09f359..36b88205eca7 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -197,6 +197,7 @@ void dev_print(struct blk_desc *desc)
case UCLASS_PVBLOCK:
case UCLASS_HOST:
case UCLASS_BLKMAP:
+   case UCLASS_RKMTD:
printf ("Vendor: %s Rev: %s Prod: %s\n",
desc->vendor,
desc->revision,
@@ -330,6 +331,9 @@ static void print_part_header(const char *type, struct 
blk_desc *desc)
case UCLASS_PVBLOCK:
puts("PV BLOCK");
break;
+   case UCLASS_RKMTD:
+   puts("RKMTD");
+   break;
case UCLASS_VIRTIO:
puts("VirtIO");
break;
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index f126547cc7e6..30ad5bbb0024 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -36,6 +36,7 @@ static struct {
{ UCLASS_VIRTIO, "virtio" },
{ UCLASS_PVBLOCK, "pvblock" },
{ UCLASS_BLKMAP, "blkmap" },
+   { UCLASS_RKMTD, "rkmtd" },
 };

 static enum uclass_id uclass_name_to_iftype(const char *uclass_idname)
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 0432c95c9edc..2fc672df0a3a 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -120,6 +120,7 @@ enum uclass_id {
UCLASS_REGULATOR,   /* Regulator device */
UCLASS_REMOTEPROC,  /* Remote Processor device */
UCLASS_RESET,   /* Reset controller device */
+   UCLASS_RKMTD,   /* Rockchip MTD device */
UCLASS_RNG, /* Random Number Generator */
UCLASS_RTC, /* Real time clock device */
UCLASS_SCMI_AGENT,  /* Interface with an SCMI server */
--
2.39.2

[PATCH v3 0/7] Add rkmtd command

[Johan Jonker]

The command rkmtd creates a virtual block device to transfer
Rockchip boot block data to and from NAND with block orientated
tools like "ums" and "rockusb".

It uses the Rockchip MTD driver to scan for boot blocks and copies
data from the first block in a GPT formatted virtual disk.
Data must be written in U-boot "idbloader.img" format and start at
partition "loader1" offset 64. The data header is parsed
for length and offset. When the last sector is received
it erases up to 5 erase blocks on NAND and writes boot blocks
in a pattern depending on the NAND ID. Data is then verified.
When a block turns out bad the block header is discarded.

Changed V3:
  Add documetation
  Add test
  Split driver from command
  Split header
  Use devm_kzalloc
  Remove out of memory debug
  Restyle

Changed V2:
  Rename to rkmtd

Johan Jonker (7):
  mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN option
  rockchip: dm: prepare rkmtd UCLASS
  rockchip: block: add rkmtd class and drivers
  rockchip: block: blk-uclass: disable bounce buffer support for rkmtd
  rockchip: cmd: add rkmtd command
  rockchip: test: dm: add rkmtd test
  rockchip: doc: add rkmtd.rst

 cmd/Kconfig |8 +
 cmd/Makefile|1 +
 cmd/rkmtd.c |  204 +
 disk/part.c |4 +
 doc/board/rockchip/index.rst|1 +
 doc/board/rockchip/rkmtd.rst|  105 +++
 drivers/block/Kconfig   |7 +
 drivers/block/Makefile  |2 +
 drivers/block/blk-uclass.c  |7 +-
 drivers/block/rkmtd.c   | 1138 +++
 drivers/mtd/nand/raw/Kconfig|9 +
 drivers/mtd/nand/raw/rockchip_nfc.c |3 +
 include/dm/uclass-id.h  |1 +
 include/rkmtd.h |  190 +
 test/dm/Makefile|1 +
 test/dm/rkmtd.c |  201 +
 16 files changed, 1879 insertions(+), 3 deletions(-)
 create mode 100644 cmd/rkmtd.c
 create mode 100644 doc/board/rockchip/rkmtd.rst
 create mode 100644 drivers/block/rkmtd.c
 create mode 100644 include/rkmtd.h
 create mode 100644 test/dm/rkmtd.c

--
2.39.2

Re: [PATCH v4 09/16] board: ti: j784s4: Add board support for J784S4 EVM

[Tom Rini]

On Sun, Oct 01, 2023 at 10:25:38PM +0530, Apurva Nandan wrote:

> Add board files for J784S4 EVM.
[snip]
> diff --git a/board/ti/j784s4/evm.c b/board/ti/j784s4/evm.c
> new file mode 100644
> index 00..025079c6a8
> --- /dev/null
> +++ b/board/ti/j784s4/evm.c
> @@ -0,0 +1,82 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Board specific initialization for J784S4 EVM
> + *
> + * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
> + *   Hari Nagalla 
> + *
> + */
> +
> +#include 

Here and elsewhere, do not add common.h and instead add what headers you
need.

> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

This is a huge list for such little code, please see what's actually
needed.

> +#include "../common/board_detect.h"
> +
> +#define board_is_j784s4_evm()board_ti_k3_is("J784S4-EVM")
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int board_init(void)
> +{
> + return 0;
> +}
> +
> +int dram_init(void)
> +{
> +#ifdef CONFIG_PHYS_64BIT
> + gd->ram_size = 0x1;
> +#else
> + gd->ram_size = 0x8000;
> +#endif
> +
> + return 0;
> +}
> +
> +phys_size_t board_get_usable_ram_top(phys_size_t total_size)
> +{
> +#ifdef CONFIG_PHYS_64BIT
> + /* Limit RAM used by U-Boot to the DDR low region */
> + if (gd->ram_top > 0x1)
> + return 0x1;
> +#endif
> +
> + return gd->ram_top;
> +}
> +
> +int dram_init_banksize(void)
> +{
> + /* Bank 0 declares the memory available in the DDR low region */
> + gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
> + gd->bd->bi_dram[0].size = 0x7fff;
> + gd->ram_size = 0x8000;
> +
> +#ifdef CONFIG_PHYS_64BIT
> + /* Bank 1 declares the memory available in the DDR high region */
> + gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
> + gd->bd->bi_dram[1].size = 0x77fff;
> + gd->ram_size = 0x8;
> +#endif
> +
> + return 0;
> +}
> +
> +int board_late_init(void)
> +{
> + return 0;
> +}
> +
> +void spl_board_init(void)
> +{
> +}

So, lets split this in to two files, to make life easier on future
J784S4-based platforms.  The basically dummy functions (empty/return 0)
should go in "base.c" and everything that's about the EVM itself should
go in evm.c.  This will make it easier to rm evm.c and add
custom-platform.c that just sets the memory size and anything else
that's really board specific.

-- 
Tom


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Description: PGP signature

Re: [PATCH 07/26] arm: imx: Check header before calling spl_load_imx_container

[Tom Rini]

On Wed, Oct 11, 2023 at 09:56:07PM -0400, Sean Anderson wrote:
> Make sure we have an IMX header before calling spl_load_imx_container,
> since if we don't it will fail with -ENOENT. This allows us to fall back to
> legacy/raw images if they are also enabled.
> 
> To avoid too much bloat, Legacy/Raw images are disabled for the four
> configs which only boot from raw MMC.
> 
> Future work could include merging imx_container.h with imx8image.h, since
> they appear to define mostly the same structures.
> 
> Signed-off-by: Sean Anderson 

So, since you mention bloat, this sounds like it's making functional
changes here, but that's not intentional, yes?  Or to ask another way,
is deneb disabling features here, to save space now that it can, or
because they're growing "a bunch" and this reduces the growth?

-- 
Tom


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Description: PGP signature

[PATCH v12 4/8] bootm: Support boot measurement

[Eddie James]

Add a configuration option to measure the boot through the bootm
function. Add the measurement state to the booti and bootz paths
as well.

Signed-off-by: Eddie James 
Reviewed-by: Simon Glass 
---
Changes since v8:
 - Added a configuration option to select to ignore any existing
   event log. This would only be selected for systems that know
   that U-Boot is the first stage bootloader. This is necessary
   because the reserved memory region may persist through resets
   and so U-Boot attempts to append to the previous boot's log.

Changes since v6:
 - Added comment for bootm_measure
 - Fixed line length in bootm_measure

 boot/Kconfig| 32 +
 boot/bootm.c| 74 +
 cmd/booti.c |  1 +
 cmd/bootm.c |  2 ++
 cmd/bootz.c |  1 +
 include/bootm.h | 11 
 include/image.h |  1 +
 7 files changed, 122 insertions(+)

diff --git a/boot/Kconfig b/boot/Kconfig
index a01e6cb8aa..abbc72f4cf 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -685,6 +685,38 @@ config LEGACY_IMAGE_FORMAT
  loaded. If a board needs the legacy image format support in this
  case, enable it here.
 
+config MEASURED_BOOT
+   bool "Measure boot images and configuration to TPM and event log"
+   depends on HASH && TPM_V2
+   help
+ This option enables measurement of the boot process. Measurement
+ involves creating cryptographic hashes of the binary images that
+ are booting and storing them in the TPM. In addition, a log of
+ these hashes is stored in memory for the OS to verify the booted
+ images and configuration. Enable this if the OS has configured
+ some memory area for the event log and you intend to use some
+ attestation tools on your system.
+
+if MEASURED_BOOT
+   config MEASURE_DEVICETREE
+   bool "Measure the devicetree image"
+   default y if MEASURED_BOOT
+   help
+ On some platforms, the devicetree is not static as it may contain
+ random MAC addresses or other such data that changes each boot.
+ Therefore, it should not be measured into the TPM. In that case,
+ disable the measurement here.
+
+   config MEASURE_IGNORE_LOG
+   bool "Ignore the existing event log"
+   default n
+   help
+ On platforms that use an event log memory region that persists
+ through system resets and are the first stage bootloader, then
+ this option should be enabled to ignore any existing data in the
+ event log memory region.
+endif # MEASURED_BOOT
+
 config SUPPORT_RAW_INITRD
bool "Enable raw initrd images"
help
diff --git a/boot/bootm.c b/boot/bootm.c
index b1c3afe0a3..11b6b3c292 100644
--- a/boot/bootm.c
+++ b/boot/bootm.c
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #if defined(CONFIG_CMD_USB)
 #include 
 #endif
@@ -673,6 +674,75 @@ int bootm_process_cmdline_env(int flags)
return 0;
 }
 
+int bootm_measure(struct bootm_headers *images)
+{
+   int ret = 0;
+
+   /* Skip measurement if EFI is going to do it */
+   if (images->os.os == IH_OS_EFI &&
+   IS_ENABLED(CONFIG_EFI_TCG2_PROTOCOL) &&
+   IS_ENABLED(CONFIG_BOOTM_EFI))
+   return ret;
+
+   if (IS_ENABLED(CONFIG_MEASURED_BOOT)) {
+   struct tcg2_event_log elog;
+   struct udevice *dev;
+   void *initrd_buf;
+   void *image_buf;
+   const char *s;
+   u32 rd_len;
+   bool ign;
+
+   elog.log_size = 0;
+   ign = IS_ENABLED(CONFIG_MEASURE_IGNORE_LOG);
+   ret = tcg2_measurement_init(, , ign);
+   if (ret)
+   return ret;
+
+   image_buf = map_sysmem(images->os.image_start,
+  images->os.image_len);
+   ret = tcg2_measure_data(dev, , 8, images->os.image_len,
+   image_buf, EV_COMPACT_HASH,
+   strlen("linux") + 1, (u8 *)"linux");
+   if (ret)
+   goto unmap_image;
+
+   rd_len = images->rd_end - images->rd_start;
+   initrd_buf = map_sysmem(images->rd_start, rd_len);
+   ret = tcg2_measure_data(dev, , 9, rd_len, initrd_buf,
+   EV_COMPACT_HASH, strlen("initrd") + 1,
+   (u8 *)"initrd");
+   if (ret)
+   goto unmap_initrd;
+
+   if (IS_ENABLED(CONFIG_MEASURE_DEVICETREE)) {
+   ret = tcg2_measure_data(dev, , 0, images->ft_len,
+   (u8 *)images->ft_addr,
+   EV_TABLE_OF_DEVICES,
+   strlen("dts") + 1,
+ 

[PATCH v12 2/8] tpm: sandbox: Update for needed TPM2 capabilities

[Eddie James]

The driver needs to support getting the PCRs in the capabilities
command. Fix various other things and support the max number
of PCRs for TPM2.
Remove the !SANDBOX dependency for EFI TCG2 as well.

Signed-off-by: Eddie James 
Reviewed-by: Simon Glass 
Acked-by: Ilias Apalodimas 
---
Changes since v8:
 - Use >= for checking the property against TPM2_PROPERTIES_OFFSET

Changes since v5:
 - Remove the !SANDBOX dependency for EFI TCG2

 drivers/tpm/tpm2_tis_sandbox.c | 100 -
 lib/efi_loader/Kconfig |   2 -
 2 files changed, 72 insertions(+), 30 deletions(-)

diff --git a/drivers/tpm/tpm2_tis_sandbox.c b/drivers/tpm/tpm2_tis_sandbox.c
index e4004cfcca..d15a28d9fc 100644
--- a/drivers/tpm/tpm2_tis_sandbox.c
+++ b/drivers/tpm/tpm2_tis_sandbox.c
@@ -22,11 +22,6 @@ enum tpm2_hierarchy {
TPM2_HIERARCHY_NB,
 };
 
-/* Subset of supported capabilities */
-enum tpm2_capability {
-   TPM_CAP_TPM_PROPERTIES = 0x6,
-};
-
 /* Subset of supported properties */
 #define TPM2_PROPERTIES_OFFSET 0x020E
 
@@ -38,7 +33,8 @@ enum tpm2_cap_tpm_property {
TPM2_PROPERTY_NB,
 };
 
-#define SANDBOX_TPM_PCR_NB 1
+#define SANDBOX_TPM_PCR_NB TPM2_MAX_PCRS
+#define SANDBOX_TPM_PCR_SELECT_MAX ((SANDBOX_TPM_PCR_NB + 7) / 8)
 
 /*
  * Information about our TPM emulation. This is preserved in the sandbox
@@ -433,7 +429,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 
*sendbuf,
int i, j;
 
/* TPM2_GetProperty */
-   u32 capability, property, property_count;
+   u32 capability, property, property_count, val;
 
/* TPM2_PCR_Read/Extend variables */
int pcr_index = 0;
@@ -542,19 +538,32 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const 
u8 *sendbuf,
case TPM2_CC_GET_CAPABILITY:
capability = get_unaligned_be32(sent);
sent += sizeof(capability);
-   if (capability != TPM_CAP_TPM_PROPERTIES) {
-   printf("Sandbox TPM only support TPM_CAPABILITIES\n");
-   return TPM2_RC_HANDLE;
-   }
-
property = get_unaligned_be32(sent);
sent += sizeof(property);
-   property -= TPM2_PROPERTIES_OFFSET;
-
property_count = get_unaligned_be32(sent);
sent += sizeof(property_count);
-   if (!property_count ||
-   property + property_count > TPM2_PROPERTY_NB) {
+
+   switch (capability) {
+   case TPM2_CAP_PCRS:
+   break;
+   case TPM2_CAP_TPM_PROPERTIES:
+   if (!property_count) {
+   rc = TPM2_RC_HANDLE;
+   return sandbox_tpm2_fill_buf(recv, recv_len,
+tag, rc);
+   }
+
+   if (property >= TPM2_PROPERTIES_OFFSET &&
+   ((property - TPM2_PROPERTIES_OFFSET) +
+property_count > TPM2_PROPERTY_NB)) {
+   rc = TPM2_RC_HANDLE;
+   return sandbox_tpm2_fill_buf(recv, recv_len,
+tag, rc);
+   }
+   break;
+   default:
+   printf("Sandbox TPM2 only supports TPM2_CAP_PCRS or "
+  "TPM2_CAP_TPM_PROPERTIES\n");
rc = TPM2_RC_HANDLE;
return sandbox_tpm2_fill_buf(recv, recv_len, tag, rc);
}
@@ -578,18 +587,53 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const 
u8 *sendbuf,
put_unaligned_be32(capability, recv);
recv += sizeof(capability);
 
-   /* Give the number of properties that follow */
-   put_unaligned_be32(property_count, recv);
-   recv += sizeof(property_count);
-
-   /* Fill with the properties */
-   for (i = 0; i < property_count; i++) {
-   put_unaligned_be32(TPM2_PROPERTIES_OFFSET + property +
-  i, recv);
-   recv += sizeof(property);
-   put_unaligned_be32(tpm->properties[property + i],
-  recv);
-   recv += sizeof(property);
+   switch (capability) {
+   case TPM2_CAP_PCRS:
+   /* Give the number of algorithms supported - just 
SHA256 */
+   put_unaligned_be32(1, recv);
+   recv += sizeof(u32);
+
+   /* Give SHA256 algorithm */
+   put_unaligned_be16(TPM2_ALG_SHA256, recv);
+   recv += sizeof(u16);
+
+   /* Select the PCRs supported */
+   *recv 

Re: [PATCH V2 3/7] riscv: dts: binman: add condition for opensbi os boot

[Simon Glass]

On Wed, 11 Oct 2023 at 23:43, Randolph  wrote:
>
> Add condition for OpenSBI OS boot mode, by default it is not enabled.
> By default, binman creates the output file u-boot.itb.
> If SPL_OPENSBI_OS_BOOT is enabled, linux.itb will be created
> after compilation instead of the default u-boot.itb.
>
> Signed-off-by: Randolph 
> ---
>  arch/riscv/dts/binman.dtsi | 24 
>  1 file changed, 24 insertions(+)
>

Reviewed-by: Simon Glass 

You do have the option of creating two images, so you can support both
boot approaches. Then you would need to do the check at runtime,
somehow.

Re: [PATCH v4 1/8] binman: ti-secure: Add support for firewalling entities

[Simon Glass]

Hi Manorit,

On Wed, 11 Oct 2023 at 22:46, Manorit Chawdhry  wrote:
>
> Hi Simon,
>
> On 20:41-20231011, Simon Glass wrote:
> > Hi Manorit,
> >
> > On Tue, 10 Oct 2023 at 23:25, Manorit Chawdhry  wrote:
> > >
> > > We can now firewall entities while loading them through our secure
> > > entity TIFS, the required information should be present in the
> > > certificate that is being parsed by TIFS.
> > >
> > > The following commit adds the support to enable the certificates to be
> > > generated if the firewall configurations are present in the binman dtsi
> > > nodes.
> > >
> > > Signed-off-by: Manorit Chawdhry 
> > > ---
> > >  tools/binman/btool/openssl.py   | 16 +++-
> > >  tools/binman/etype/ti_secure.py | 90 
> > > +
> > >  tools/binman/etype/x509_cert.py |  3 +-
> > >  3 files changed, 106 insertions(+), 3 deletions(-)
> > >
> >
> > Reviewed-by: Simon Glass 
> >
> > I'm still a little worried about the error reporting if the user
> > leaves out a property. Does it do the right thing?
> >
>
> I did make a test also along the lines that would check all the
> firewalling properties and just auth-in-place isn't checked at this
> stage and people could end up adding the firewalling node without
> auth-in-place. Do you want to cover that test case as well? Regarding
> the other firewalling properties ( immitating the test by removing
> "id"), We get this:
>
> [..]
>   AR  spl/common/spl/built-in.o
>   LD  spl/u-boot-spl
>   OBJCOPY spl/u-boot-spl-nodtb.bin
>   SYM spl/u-boot-spl.sym
>   CAT spl/u-boot-spl-dtb.bin
>   COPYspl/u-boot-spl.bin
>   BINMAN  .binman_stamp
> binman: id can't be None in firewall node

That's a bit vague...at least it should show the full path to the node
that failure, e.g. use self.Raise(). Also, I assume the property is
missing and the None refers to the Python value for the var. Better to
provide a nice error.

Any possible user error should ideally be checked, to avoid later confusion.

See Entry.ensure_props()

You could add an optional argument - the list of props to check. If
present it could use that instead of self.required_props

Hmm better might be to have a new function which tells the user that
since the firewall property is present, it needs these others ones
too.

Regards,
Simon

Re: [PATCH V2 2/7] riscv: kconfig: introduce SPL_LOAD_FIT_OPENSBI_OS_BOOT symbol

[Simon Glass]

On Wed, 11 Oct 2023 at 23:42, Randolph  wrote:
>
> Introduce common Kconfig symbol for riscv architecture.
> This symbol SPL_LOAD_FIT_OPENSBI_OS_BOOT is like falcon mode on ARM,
> the Falcon boot is a shortcut boot method for SD/eMMC targets. It
> skips the loading the RAM version U-Boot. Instead, it will loads
> the FIT image and boots directly to Linux.
>
> When SPL_OPENSBI_OS_BOOT is enabled, linux.itb is created after
> compilation instead of the default u-boot.itb. It initialises memory
> with the U-Boot SPL at the first stage, just as a normal boot process
> does at the beginning. Instead of jumping to the U-Boot proper from
> OpenSBI before booting the Linux kernel, the RISC-V falcon mode
> process jumps directly to the Linux kernel to gain shorter booting time.
>
> Signed-off-by: Randolph 
> ---
>  arch/riscv/Kconfig | 8 
>  1 file changed, 8 insertions(+)
>

Reviewed-by: Simon Glass 

Re: [PATCH 25/26] test: spl: Add a test for the NOR load method

[Simon Glass]

Hi Sean,

On Wed, 11 Oct 2023 at 21:16, Sean Anderson  wrote:
>
> On 10/11/23 23:41, Simon Glass wrote:
> > Hi Sean,
> >
> > On Wed, 11 Oct 2023 at 18:57, Sean Anderson  wrote:
> >>
> >> Add a test for the NOR load method. Since NOR is memory-mapped we can
> >> substitute a buffer instead. The only major complication is testing LZMA
> >> decompression.  It's too complex to implement LZMA compression in a test,
> >> so we just include some pre-compressed data.
> >
> > How about using the in-tree compression code?
>
> We have that for LZMA? From what I could tell we only have decompression
> in-tree.

Ah yes, OK.

>
> >>
> >> Signed-off-by: Sean Anderson 
> >> ---
> >>
> >>   arch/sandbox/include/asm/spl.h   |   1 +
> >>   configs/sandbox_noinst_defconfig |   2 +
> >>   configs/sandbox_spl_defconfig|   2 +
> >>   include/configs/sandbox.h|   3 +
> >>   include/test/spl.h   |   5 +
> >>   test/image/Makefile  |   1 +
> >>   test/image/spl_load.c| 269 ++-
> >>   test/image/spl_load_nor.c|  39 +
> >>   8 files changed, 316 insertions(+), 6 deletions(-)
> >>   create mode 100644 test/image/spl_load_nor.c
> >
> > Reviewed-by: Simon Glass 
> >
> >>
> >> diff --git a/arch/sandbox/include/asm/spl.h 
> >> b/arch/sandbox/include/asm/spl.h
> >> index ab9475567e0..cf16af5278a 100644
> >> --- a/arch/sandbox/include/asm/spl.h
> >> +++ b/arch/sandbox/include/asm/spl.h
> >> @@ -13,6 +13,7 @@ enum {
> >>  BOOT_DEVICE_BOARD,
> >>  BOOT_DEVICE_VBE,
> >>  BOOT_DEVICE_CPGMAC,
> >> +   BOOT_DEVICE_NOR,
> >>   };
> >>
> >>   /**
> >> diff --git a/configs/sandbox_noinst_defconfig 
> >> b/configs/sandbox_noinst_defconfig
> >> index 57cbadedb7d..085cc30c1e2 100644
> >> --- a/configs/sandbox_noinst_defconfig
> >> +++ b/configs/sandbox_noinst_defconfig
> >> @@ -49,6 +49,7 @@ CONFIG_SPL_FS_EXT4=y
> >>   CONFIG_SPL_I2C=y
> >>   CONFIG_SPL_MMC_WRITE=y
> >>   CONFIG_SPL_NET=y
> >> +CONFIG_SPL_NOR_SUPPORT=y
> >>   CONFIG_SPL_RTC=y
> >>   CONFIG_CMD_CPU=y
> >>   CONFIG_CMD_LICENSE=y
> >> @@ -257,6 +258,7 @@ CONFIG_RSA_VERIFY_WITH_PKEY=y
> >>   CONFIG_TPM=y
> >>   CONFIG_LZ4=y
> >>   CONFIG_ZSTD=y
> >> +CONFIG_SPL_LZMA=y
> >>   CONFIG_ERRNO_STR=y
> >>   CONFIG_EFI_CAPSULE_ON_DISK=y
> >>   CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
> >> diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
> >> index b578cc8e443..56072b15ad2 100644
> >> --- a/configs/sandbox_spl_defconfig
> >> +++ b/configs/sandbox_spl_defconfig
> >> @@ -41,6 +41,7 @@ CONFIG_SPL_SYS_MALLOC_SIZE=0x400
> >>   CONFIG_SPL_ENV_SUPPORT=y
> >>   CONFIG_SPL_FPGA=y
> >>   CONFIG_SPL_I2C=y
> >> +CONFIG_SPL_NOR_SUPPORT=y
> >>   CONFIG_SPL_RTC=y
> >>   CONFIG_CMD_CPU=y
> >>   CONFIG_CMD_LICENSE=y
> >> @@ -249,6 +250,7 @@ CONFIG_TPM=y
> >>   CONFIG_SPL_CRC8=y
> >>   CONFIG_LZ4=y
> >>   CONFIG_ZSTD=y
> >> +CONFIG_SPL_LZMA=y
> >>   CONFIG_ERRNO_STR=y
> >>   CONFIG_SPL_HEXDUMP=y
> >>   CONFIG_EFI_CAPSULE_ON_DISK=y
> >> diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
> >> index 4e5653dc886..2372485c84e 100644
> >> --- a/include/configs/sandbox.h
> >> +++ b/include/configs/sandbox.h
> >> @@ -18,4 +18,7 @@
> >>   #define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
> >>  115200}
> >>
> >> +/* Unused but necessary to build */
> >> +#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
> >> +
> >>   #endif
> >> diff --git a/include/test/spl.h b/include/test/spl.h
> >> index cfb52c90855..82325702d4a 100644
> >> --- a/include/test/spl.h
> >> +++ b/include/test/spl.h
> >> @@ -27,12 +27,14 @@ void generate_data(char *data, size_t size, const char 
> >> *test_name);
> >>   /**
> >>* enum spl_test_image - Image types for testing
> >>* @LEGACY: "Legacy" uImages
> >> + * @LEGACY_LZMA: "Legacy" uImages, LZMA compressed
> >>* @IMX8: i.MX8 Container images
> >>* @FIT_INTERNAL: FITs with internal data
> >>* @FIT_EXTERNAL: FITs with external data
> >>*/
> >>   enum spl_test_image {
> >>  LEGACY,
> >> +   LEGACY_LZMA,
> >>  IMX8,
> >>  FIT_INTERNAL,
> >>  FIT_EXTERNAL,
> >> @@ -118,6 +120,9 @@ int do_spl_test_load(struct unit_test_state *uts, 
> >> const char *test_name,
> >>   static inline bool image_supported(enum spl_test_image type)
> >>   {
> >>  switch (type) {
> >> +   case LEGACY_LZMA:
> >> +   if (!IS_ENABLED(CONFIG_SPL_LZMA))
> >> +   return false;
> >>  case LEGACY:
> >>  return IS_ENABLED(CONFIG_SPL_LEGACY_IMAGE_FORMAT);
> >>  case IMX8:
> >> diff --git a/test/image/Makefile b/test/image/Makefile
> >> index ddbc39bf959..41b29995993 100644
> >> --- a/test/image/Makefile
> >> +++ b/test/image/Makefile
> >> @@ -5,4 +5,5 @@
> >>   obj-$(CONFIG_SPL_UT_LOAD) += spl_load.o
> >>   obj-$(CONFIG_SPL_UT_LOAD_FS) += spl_load_fs.o
> >>   obj-$(CONFIG_SPL_UT_LOAD_NET) += 

Re: [PATCH V2 5/7] spl: riscv: add os type for next booting stage

[Simon Glass]

On Wed, 11 Oct 2023 at 23:44, Randolph  wrote:
>
> If SPL_LOAD_FIT_OPENSBI_OS_BOOT is enabled, the function
> spl_invoke_opensbi should change the target OS type to IH_OS_LINUX.
> OpenSBI will load the Linux image as the next boot stage.
> The os_takes_devicetree function returns a value of true or false
> depending on whether or not SPL_LOAD_FIT_OPENSBI_OS_BOOT is enabled.
>
> Signed-off-by: Randolph 
> ---
>  common/spl/spl_fit.c | 3 ++-
>  common/spl/spl_opensbi.c | 9 +++--
>  2 files changed, 9 insertions(+), 3 deletions(-)

Reviewed-by: Simon Glass 

Re: [PATCH 01/26] spl: legacy: Fix referencing _image_binary_end

[Simon Glass]

Hi Sean,

On Wed, 11 Oct 2023 at 21:30, Sean Anderson  wrote:
>
> On 10/11/23 23:41, Simon Glass wrote:
> > On Wed, 11 Oct 2023 at 18:56, Sean Anderson  wrote:
> >>
> >> On non-arm architectures, _image_binary_end is defined as a ulong and not a
> >> char[]. Dereference it when accessing it, which is correct for both.
> >
> > Is 'dereference' the right word?
>
> Yeah...
>
> "Take the address of it when accessing it"?

That seems better.

Regards,
Simon


>
> --Sean
>
> >>
> >> Fixes: 1b8a1be1a1f ("spl: spl_legacy: Fix spl_end address")
> >> Signed-off-by: Sean Anderson 
> >> ---
> >>
> >>   common/spl/spl_legacy.c | 2 +-
> >>   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > Reviewed-by: Simon Glass 
> >
> >
> >>
> >> diff --git a/common/spl/spl_legacy.c b/common/spl/spl_legacy.c
> >> index 095443c63d8..e9564e5c2a5 100644
> >> --- a/common/spl/spl_legacy.c
> >> +++ b/common/spl/spl_legacy.c
> >> @@ -19,7 +19,7 @@
> >>   static void spl_parse_legacy_validate(uintptr_t start, uintptr_t size)
> >>   {
> >>  uintptr_t spl_start = (uintptr_t)_start;
> >> -   uintptr_t spl_end = (uintptr_t)_image_binary_end;
> >> +   uintptr_t spl_end = (uintptr_t)&_image_binary_end;
> >>  uintptr_t end = start + size;
> >>
> >>  if ((start >= spl_start && start < spl_end) ||
> >> --
> >> 2.37.1
> >>
>

Re: [PATCH v12 6/8] doc: Add measured boot documentation

[Simon Glass]

Hi Eddie,

On Thu, 12 Oct 2023 at 08:08, Eddie James  wrote:
>
> Briefly describe the feature and specify the requirements.
>
> Signed-off-by: Eddie James 
> Reviewed-by: Simon Glass 

This could use a bit more detail. What pieces are measured? What DT
binding is used for the TPM? How is the info checked by the OS or
whatever?


> ---
>  doc/usage/index.rst |  1 +
>  doc/usage/measured_boot.rst | 23 +++
>  2 files changed, 24 insertions(+)
>  create mode 100644 doc/usage/measured_boot.rst
>
> diff --git a/doc/usage/index.rst b/doc/usage/index.rst
> index fa702920fa..fb043a8923 100644
> --- a/doc/usage/index.rst
> +++ b/doc/usage/index.rst
> @@ -14,6 +14,7 @@ Use U-Boot
> partitions
> cmdline
> semihosting
> +   measured_boot
>
>  Shell commands
>  --
> diff --git a/doc/usage/measured_boot.rst b/doc/usage/measured_boot.rst
> new file mode 100644
> index 00..8357b1f480
> --- /dev/null
> +++ b/doc/usage/measured_boot.rst
> @@ -0,0 +1,23 @@
> +.. SPDX-License-Identifier: GPL-2.0+
> +
> +Measured Boot
> +=
> +
> +U-Boot can perform a measured boot, the process of hashing various components
> +of the boot process, extending the results in the TPM and logging the
> +component's measurement in memory for the operating system to consume.
> +
> +Requirements
> +-
> +
> +* A hardware TPM 2.0 supported by the U-Boot drivers
> +* CONFIG_TPM=y
> +* CONFIG_MEASURED_BOOT=y
> +* Device-tree configuration of the TPM device to specify the memory area
> +  for event logging. The TPM device node must either contain a phandle to
> +  a reserved memory region or "linux,sml-base" and "linux,sml-size"
> +  indicating the address and size of the memory region. An example can be
> +  found in arch/sandbox/dts/test.dts
> +* The operating system must also be configured to use the memory regions
> +  specified in the U-Boot device-tree in order to make use of the event
> +  log.

Regards,
Simon

Re: [PATCH V2 4/7] Makefile: delete file *.itb when make clean

[Simon Glass]

On Wed, 11 Oct 2023 at 23:44, Randolph  wrote:
>
> Delete the output file *.itb
>
> Signed-off-by: Randolph 
> ---
>  Makefile | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

Reviewed-by: Simon Glass 

Re: [PATCH v4 1/8] binman: ti-secure: Add support for firewalling entities

[Simon Glass]

Hi Manorit,

On Wed, 11 Oct 2023 at 23:02, Manorit Chawdhry  wrote:
>
> Hi Simon,
>
> On 11:54-20231011, Manorit Chawdhry wrote:
> > We can now firewall entities while loading them through our secure
> > entity TIFS, the required information should be present in the
> > certificate that is being parsed by TIFS.
> >
> > The following commit adds the support to enable the certificates to be
> > generated if the firewall configurations are present in the binman dtsi
> > nodes.
> >
> > Signed-off-by: Manorit Chawdhry 
> > ---
> [..]
> >  tools/binman/btool/openssl.py   | 16 +++-
> >  tools/binman/etype/ti_secure.py | 90 
> > +
> >  tools/binman/etype/x509_cert.py |  3 +-
> >  3 files changed, 106 insertions(+), 3 deletions(-)
> >
> >  from binman.entry import EntryArg
> >  from binman.etype.x509_cert import Entry_x509_cert
> > +from dataclasses import dataclass
>
> What all python versions do we support in u-boot? I see that dataclasses
> are in-built from python3.7 but for older versions we would need to
> install them separately, do I need to add this in buildman requirements
> for those versions?

I would prefer not to worry about Python 3.6 if possible. There are a
few workarounds in buildman for it, though.

Regards,
Simon

Re: [PATCH v2 2/3] dm: prepare rkmtd UCLASS

[Simon Glass]

Hi Johan,

On Thu, 12 Oct 2023 at 04:19, Johan Jonker  wrote:
>
>
>
> On 10/2/23 03:16, Simon Glass wrote:
> > Hi Johan,
> >
> > On Thu, 28 Sept 2023 at 12:51, Johan Jonker  wrote:
> >>
> >> Prepare a rkmtd UCLASS in use for writing Rockchip boot blocks
> >> in combination with existing userspace tools and rockusb command.
> >>
> >> Signed-off-by: Johan Jonker 
> >> Reviewed-by: Kever Yang 
> >> ---
> >>  disk/part.c| 4 
> >>  drivers/block/blk-uclass.c | 1 +
> >>  include/dm/uclass-id.h | 1 +
> >>  3 files changed, 6 insertions(+)
> >>
> >
> > A new uclass should have a sandbox test and a header file or some
> > other docs describing it.
>
> Hi Simon, Mark,
>
> Found by git bisect. This serie worked fine till this patch was applied:
>
> blk: Add bounce buffer support to read/write operations
> https://source.denx.de/u-boot/u-boot/-/commit/75191f75bce45f3b9aff607c88f17778d3805c61
>
> On Rockchip boards CONFIG_BOUNCE_BUFFER is selected by CONFIG_MMC_DW.
> These DW controllers have there own DMA interface.
> However Rockchip boards CONFIG_DM_DMA is not enabled.
> A virtual disk driver doesn't work with that extra buffer.
>
> This patch is there. What route should we take to get rid of it.

This rkmtd driver should depend on !BOUNCE_BUFFER perhaps? Or if the
bounce buffer is needed by rockchip, then perhaps we need to be able
to enable/disable it at runtime for different uclasses / devices?

Regards,
Simon

Re: [PATCH 03/26] spl: fit: Fix entry point for SPL_LOAD_FIT_FULL

[Simon Glass]

Hi,

On Wed, 11 Oct 2023 at 21:28, Sean Anderson  wrote:
>
> On 10/11/23 23:41, Simon Glass wrote:
> > On Wed, 11 Oct 2023 at 18:56, Sean Anderson  wrote:
> >>
> >> The entry point is not always the same as the load address. Use the value
> >> of the entrypoint property if it exists and is nonzero (following the
> >> example of spl_load_simple_fit).
> >>
> >> Fixes: 8a9dc16e4d0 ("spl: Add full fitImage support")
> >> Signed-off-by: Sean Anderson 
> >> ---
> >>
> >>   common/spl/spl_fit.c | 4 +++-
> >>   1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > Reviewed-by: Simon Glass 
> >
> > The check for 0 makes me uneasy, but I can't imagine it being valid in 
> > practice.
>
> This is mostly to match spl_load_simple_fit:
>
> /*
>  * If a platform does not provide CONFIG_SYS_UBOOT_START, U-Boot's
>  * Makefile will set it to 0 and it will end up as the entry point
>  * here. What it actually means is: use the load address.
>  */
>
> SYS_UBOOT_START doesn't seem to be set very often and defaults to TEXT_BASE. 
> That
> appears to be undefined on
>
> efi-x86_app64 efi-x86_app32 xtfpga 3c120 10m50
>
> but none of these platforms define SPL_LOAD_FIT. So maybe this is moot?

Yes, it should be fine.

Regards,
Simon


>
> --Sean
>
> >
> >>
> >> diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
> >> index ce6b8aa370a..e3cdf8e5c05 100644
> >> --- a/common/spl/spl_fit.c
> >> +++ b/common/spl/spl_fit.c
> >> @@ -884,8 +884,10 @@ int spl_load_fit_image(struct spl_image_info 
> >> *spl_image,
> >>  return ret;
> >>
> >>  spl_image->size = fw_len;
> >> -   spl_image->entry_point = fw_data;
> >>  spl_image->load_addr = fw_data;
> >> +   if (fit_image_get_entry(header, ret, _image->entry_point) ||
> >> +   !spl_image->entry_point)
> >> +   spl_image->entry_point = fw_data;
> >>  if (fit_image_get_os(header, ret, _image->os))
> >>  spl_image->os = IH_OS_INVALID;
> >>  spl_image->name = genimg_get_os_name(spl_image->os);
> >> --
> >> 2.37.1
> >>
>

Re: coreboot 4.11 + U-boot master

[Simon Glass]

Hi Jay,

On Wed, 11 Oct 2023 at 21:03, Jay Talbott
 wrote:
>
> Hi Simon,
>
> I had openssl installed, but apparently not libssl-dev. But when I added 
> that, it still failed in the same spot. So then I just installed all the 
> prerequisites (cut/paste from [1]), even though many of them were already 
> installed, and then it finally built. So at least I have something building 
> at this point.

OK good.

>
> We will need the 64-bit build. Not sure if it was the right thing to do, but 
> I did put coreboot64_defconfig in make menuconfig for the U-boot config file.
>
> If you have a patch for making the 64-bit build an option, I'll need to apply 
> that to the 4.11 branch for this build.

There are some pending patches in U-Boot for distro tweaks:

https://patchwork.ozlabs.org/project/uboot/list/?series=375672

I pushed a tree to my github (sjg20) in branch 'cmos' if that helps.
That is what I used for the talk this week.

For 64-bit you need to use u-boot-x86-with-spl.bin instead of u-boot.bin

Regards,
Simon

Re: [PATCH 03/26] spl: fit: Fix entry point for SPL_LOAD_FIT_FULL

[Tom Rini]

On Thu, Oct 12, 2023 at 12:28:22AM -0400, Sean Anderson wrote:
> On 10/11/23 23:41, Simon Glass wrote:
> > On Wed, 11 Oct 2023 at 18:56, Sean Anderson  wrote:
> > > 
> > > The entry point is not always the same as the load address. Use the value
> > > of the entrypoint property if it exists and is nonzero (following the
> > > example of spl_load_simple_fit).
> > > 
> > > Fixes: 8a9dc16e4d0 ("spl: Add full fitImage support")
> > > Signed-off-by: Sean Anderson 
> > > ---
> > > 
> > >   common/spl/spl_fit.c | 4 +++-
> > >   1 file changed, 3 insertions(+), 1 deletion(-)
> > 
> > Reviewed-by: Simon Glass 
> > 
> > The check for 0 makes me uneasy, but I can't imagine it being valid in 
> > practice.
> 
> This is mostly to match spl_load_simple_fit:
> 
>   /*
>* If a platform does not provide CONFIG_SYS_UBOOT_START, U-Boot's
>* Makefile will set it to 0 and it will end up as the entry point
>* here. What it actually means is: use the load address.
>*/
> 
> SYS_UBOOT_START doesn't seem to be set very often and defaults to TEXT_BASE. 
> That
> appears to be undefined on
> 
>   efi-x86_app64 efi-x86_app32 xtfpga 3c120 10m50
> 
> but none of these platforms define SPL_LOAD_FIT. So maybe this is moot?

Moot for the last 3 there yes.  Not sure about the U-Boot as EFI app
builds.

-- 
Tom


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[PATCH v12 8/8] test: use a non system PCR for testing PCR extend

[Eddie James]

From: Ilias Apalodimas 

We currently use PCR 0 for testing the PCR read/extend functionality in
our selftests.  How ever those PCRs are defined by the TCG spec for
platform use.  For example if the tests run *after* the efi subsystem
initialization, which extends PCRs 0 & 7 it will give a false positive.

So let's switch over to a PCR which is more suitable and is defined for
OS use.  It's worth noting that we are using PCR10 here, since PCR9 is
used internally by U-Boot if we choose to measure the loaded DTB

Reviewed-by: Simon Glass 
Signed-off-by: Ilias Apalodimas 
---
 test/py/tests/test_tpm2.py | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/test/py/tests/test_tpm2.py b/test/py/tests/test_tpm2.py
index c2579fa02c..47392b87a9 100644
--- a/test/py/tests/test_tpm2.py
+++ b/test/py/tests/test_tpm2.py
@@ -239,7 +239,7 @@ def test_tpm2_dam_parameters(u_boot_console):
 def test_tpm2_pcr_read(u_boot_console):
 """Execute a TPM2_PCR_Read command.
 
-Perform a PCR read of the 0th PCR. Must be zero.
+Perform a PCR read of the 10th PCR. Must be zero.
 """
 if is_sandbox(u_boot_console):
 tpm2_sandbox_init(u_boot_console)
@@ -247,7 +247,7 @@ def test_tpm2_pcr_read(u_boot_console):
 force_init(u_boot_console)
 ram = u_boot_utils.find_ram_base(u_boot_console)
 
-read_pcr = u_boot_console.run_command('tpm2 pcr_read 0 0x%x' % ram)
+read_pcr = u_boot_console.run_command('tpm2 pcr_read 10 0x%x' % ram)
 output = u_boot_console.run_command('echo $?')
 assert output.endswith('0')
 
@@ -257,7 +257,7 @@ def test_tpm2_pcr_read(u_boot_console):
 updates = int(re.findall(r'\d+', str)[0])
 
 # Check the output value
-assert 'PCR #0 content' in read_pcr
+assert 'PCR #10 content' in read_pcr
 assert '00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00' in read_pcr
 
 @pytest.mark.buildconfigspec('cmd_tpm_v2')
@@ -275,19 +275,19 @@ def test_tpm2_pcr_extend(u_boot_console):
 force_init(u_boot_console)
 ram = u_boot_utils.find_ram_base(u_boot_console)
 
-read_pcr = u_boot_console.run_command('tpm2 pcr_read 0 0x%x' % (ram + 
0x20))
+read_pcr = u_boot_console.run_command('tpm2 pcr_read 10 0x%x' % (ram + 
0x20))
 output = u_boot_console.run_command('echo $?')
 assert output.endswith('0')
 str = re.findall(r'\d+ known updates', read_pcr)[0]
 updates = int(re.findall(r'\d+', str)[0])
 
-u_boot_console.run_command('tpm2 pcr_extend 0 0x%x' % ram)
+u_boot_console.run_command('tpm2 pcr_extend 10 0x%x' % ram)
 output = u_boot_console.run_command('echo $?')
 assert output.endswith('0')
 
 # Read the value back into a different place so we can still use 'ram' as
 # our zero bytes
-read_pcr = u_boot_console.run_command('tpm2 pcr_read 0 0x%x' % (ram + 
0x20))
+read_pcr = u_boot_console.run_command('tpm2 pcr_read 10 0x%x' % (ram + 
0x20))
 output = u_boot_console.run_command('echo $?')
 assert output.endswith('0')
 assert 'f5 a5 fd 42 d1 6a 20 30 27 98 ef 6e d3 09 97 9b' in read_pcr
@@ -297,11 +297,11 @@ def test_tpm2_pcr_extend(u_boot_console):
 new_updates = int(re.findall(r'\d+', str)[0])
 assert (updates + 1) == new_updates
 
-u_boot_console.run_command('tpm2 pcr_extend 0 0x%x' % ram)
+u_boot_console.run_command('tpm2 pcr_extend 10 0x%x' % ram)
 output = u_boot_console.run_command('echo $?')
 assert output.endswith('0')
 
-read_pcr = u_boot_console.run_command('tpm2 pcr_read 0 0x%x' % (ram + 
0x20))
+read_pcr = u_boot_console.run_command('tpm2 pcr_read 10 0x%x' % (ram + 
0x20))
 output = u_boot_console.run_command('echo $?')
 assert output.endswith('0')
 assert '7a 05 01 f5 95 7b df 9c b3 a8 ff 49 66 f0 22 65' in read_pcr
-- 
2.39.3

[PATCH v12 3/8] tpm: Support boot measurements

[Eddie James]

Add TPM2 functions to support boot measurement. This includes
starting up the TPM, initializing/appending the event log, and
measuring the U-Boot version. Much of the code was used in the
EFI subsystem, so remove it there and use the common functions.

Signed-off-by: Eddie James 
---
Changes since v10:
 - Fix compile warning for armv7 (thanks Ilias)

Changes since v8:
 - Fix log parsing again - any data corruption seen while replaying the
   event log was failing the entire measurement.
 - Added an option to ignore the existing log. This should only be used
   for systems that know that U-Boot is the first stage bootloader. This
   is necessary because the reserved memory region may persist through
   resets and so U-Boot attempts to append to the previous boot's log.

Changes since v7:
 - Change name of tcg2_init_log and add more documentation
 - Add a check, when parsing the event log header, to ensure that the
   previous stage bootloader used all the active PCRs.
 - Change name of tcg2_log_find_end
 - Fix the greater than or equal to check to exit the log parsing
 - Make sure log_position is 0 if there is any error discovering the log
 - Return errors parsing the log if the data is corrupt so that we don't
   end up with half a log

Changes since v6:
 - Added Linaro copyright for all the EFI moved code
 - Changed tcg2_init_log (and by extension, tcg2_measurement_init) to
   copy any discovered event log to the user's log if passed in.

Changes since v5:
 - Remove unused platform_get_eventlog in efi_tcg2.c
 - First look for tpm_event_log_* properties instead of linux,sml-*
 - Fix efi_tcg2.c compilation
 - Select SHA* configs

Changes since v4:
 - Remove tcg2_measure_event function and check for NULL data in
   tcg2_measure_data
 - Use tpm_auto_startup
 - Fix efi_tcg2.c compilation for removing tcg2_pcr_read function

Changes since v3:
 - Reordered headers
 - Refactored more of EFI code into common code
Removed digest_info structure and instead used the common alg_to_mask
  and alg_to_len
Improved event log parsing in common code to get it equivalent to EFI
  Common code now extends PCR if previous bootloader stage couldn't
  No need to allocate memory in the common code, so EFI copies the
  discovered buffer like it did before
Rename efi measure_event function

Changes since v1:
 - Refactor TPM layer functions to allow EFI system to use them, and
   remove duplicate EFI functions

 include/efi_tcg2.h|  44 --
 include/tpm-v2.h  | 259 
 lib/Kconfig   |   4 +
 lib/efi_loader/efi_tcg2.c | 821 --
 lib/tpm-v2.c  | 814 +
 5 files changed, 1154 insertions(+), 788 deletions(-)

diff --git a/include/efi_tcg2.h b/include/efi_tcg2.h
index b1c3abd097..b21c5cb3dd 100644
--- a/include/efi_tcg2.h
+++ b/include/efi_tcg2.h
@@ -129,50 +129,6 @@ struct efi_tcg2_boot_service_capability {
 #define BOOT_SERVICE_CAPABILITY_MIN \
offsetof(struct efi_tcg2_boot_service_capability, number_of_pcr_banks)
 
-#define TCG_EFI_SPEC_ID_EVENT_SIGNATURE_03 "Spec ID Event03"
-#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MAJOR_TPM2 2
-#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MINOR_TPM2 0
-#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_ERRATA_TPM2 2
-
-/**
- *  struct TCG_EfiSpecIdEventAlgorithmSize - hashing algorithm information
- *
- *  @algorithm_id: algorithm defined in enum tpm2_algorithms
- *  @digest_size:  size of the algorithm
- */
-struct tcg_efi_spec_id_event_algorithm_size {
-   u16  algorithm_id;
-   u16  digest_size;
-} __packed;
-
-/**
- * struct TCG_EfiSpecIDEventStruct - content of the event log header
- *
- * @signature: signature, set to Spec ID Event03
- * @platform_class:class defined in TCG ACPI Specification
- * Client  Common Header.
- * @spec_version_minor:minor version
- * @spec_version_major:major version
- * @spec_version_errata:   major version
- * @uintn_size:size of the efi_uintn_t fields used in 
various
- * data structures used in this specification.
- * 0x01 indicates u32  and 0x02  indicates u64
- * @number_of_algorithms:  hashing algorithms used in this event log
- * @digest_sizes:  array of number_of_algorithms pairs
- * 1st member defines the algorithm id
- * 2nd member defines the algorithm size
- */
-struct tcg_efi_spec_id_event {
-   u8 signature[16];
-   u32 platform_class;
-   u8 spec_version_minor;
-   u8 spec_version_major;
-   u8 spec_errata;
-   u8 uintn_size;
-   u32 number_of_algorithms;
-   struct tcg_efi_spec_id_event_algorithm_size digest_sizes[];
-} __packed;
-
 /**
  * struct tdEFI_TCG2_FINAL_EVENTS_TABLE - log entries after Get Event Log
  

[PATCH v12 7/8] efi_loader: fix EFI_ENTRY point on get_active_pcr_banks

[Eddie James]

From: Ilias Apalodimas 

efi_tcg2_get_active_pcr_banks doesn't immediately call the
EFI_ENTRY() wrapper once it enters the function. Move the call a
few lines above to cover the error cases properly as well.

Signed-off-by: Ilias Apalodimas 
---
 lib/efi_loader/efi_tcg2.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c
index 7ada536568..dae1b166c8 100644
--- a/lib/efi_loader/efi_tcg2.c
+++ b/lib/efi_loader/efi_tcg2.c
@@ -949,16 +949,16 @@ efi_tcg2_get_active_pcr_banks(struct efi_tcg2_protocol 
*this,
struct udevice *dev;
efi_status_t ret;
 
+   EFI_ENTRY("%p, %p", this, active_pcr_banks);
+
if (!this || !active_pcr_banks) {
ret = EFI_INVALID_PARAMETER;
goto out;
}
-
ret = tcg2_platform_get_tpm2();
if (ret != EFI_SUCCESS)
goto out;
 
-   EFI_ENTRY("%p, %p", this, active_pcr_banks);
ret = tcg2_get_active_pcr_banks(dev, active_pcr_banks);
 
 out:
-- 
2.39.3

[PATCH v12 1/8] tpm: Fix spelling for tpmu_ha union

[Eddie James]

tmpu -> tpmu

Signed-off-by: Eddie James 
Reviewed-by: Ilias Apalodimas 
---
 include/tpm-v2.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/tpm-v2.h b/include/tpm-v2.h
index 2b6980e441..6684033deb 100644
--- a/include/tpm-v2.h
+++ b/include/tpm-v2.h
@@ -169,7 +169,7 @@ struct tcg_pcr_event {
 /**
  * Definition of TPMU_HA Union
  */
-union tmpu_ha {
+union tpmu_ha {
u8 sha1[TPM2_SHA1_DIGEST_SIZE];
u8 sha256[TPM2_SHA256_DIGEST_SIZE];
u8 sm3_256[TPM2_SM3_256_DIGEST_SIZE];
@@ -185,7 +185,7 @@ union tmpu_ha {
  */
 struct tpmt_ha {
u16 hash_alg;
-   union tmpu_ha digest;
+   union tpmu_ha digest;
 } __packed;
 
 /**
-- 
2.39.3

[PATCH v12 6/8] doc: Add measured boot documentation

[Eddie James]

Briefly describe the feature and specify the requirements.

Signed-off-by: Eddie James 
Reviewed-by: Simon Glass 
---
 doc/usage/index.rst |  1 +
 doc/usage/measured_boot.rst | 23 +++
 2 files changed, 24 insertions(+)
 create mode 100644 doc/usage/measured_boot.rst

diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index fa702920fa..fb043a8923 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -14,6 +14,7 @@ Use U-Boot
partitions
cmdline
semihosting
+   measured_boot
 
 Shell commands
 --
diff --git a/doc/usage/measured_boot.rst b/doc/usage/measured_boot.rst
new file mode 100644
index 00..8357b1f480
--- /dev/null
+++ b/doc/usage/measured_boot.rst
@@ -0,0 +1,23 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Measured Boot
+=
+
+U-Boot can perform a measured boot, the process of hashing various components
+of the boot process, extending the results in the TPM and logging the
+component's measurement in memory for the operating system to consume.
+
+Requirements
+-
+
+* A hardware TPM 2.0 supported by the U-Boot drivers
+* CONFIG_TPM=y
+* CONFIG_MEASURED_BOOT=y
+* Device-tree configuration of the TPM device to specify the memory area
+  for event logging. The TPM device node must either contain a phandle to
+  a reserved memory region or "linux,sml-base" and "linux,sml-size"
+  indicating the address and size of the memory region. An example can be
+  found in arch/sandbox/dts/test.dts
+* The operating system must also be configured to use the memory regions
+  specified in the U-Boot device-tree in order to make use of the event
+  log.
-- 
2.39.3

Re: [PATCH 13/26] net: Fix compiling SPL when fastboot is enabled

[Tom Rini]

On Wed, Oct 11, 2023 at 09:56:13PM -0400, Sean Anderson wrote:

> When fastboot is enabled in U-Boot proper and SPL_NET is enabled, we will
> try to (unsuccessfully) reference it in SPL. Fix these linker errors by
> conditioning on SPL_UDP/TCP_FUNCTION_FASTBOOT.
> 
> Signed-off-by: Sean Anderson 

Reviewed-by: Tom Rini 

-- 
Tom


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Re: [PATCH 12/26] fs: Compile in sandbox filesystem in SPL if it is enabled

[Tom Rini]

On Thu, Oct 12, 2023 at 10:15:45AM -0400, Sean Anderson wrote:
> On 10/12/23 02:39, Heinrich Schuchardt wrote:
> > On 10/12/23 03:56, Sean Anderson wrote:
> > > fs.c thinks that the sandbox filesystem is available if SANDBOX is 
> > > enabled,
> > > but it is not in SPL. Compile it in SPL to avoid linker errors.
> > > 
> > > Signed-off-by: Sean Anderson 
> > > ---
> > > 
> > >   fs/Makefile | 1 +
> > >   1 file changed, 1 insertion(+)
> > > 
> > > diff --git a/fs/Makefile b/fs/Makefile
> > > index 4bed2ff2d99..592c7542bde 100644
> > > --- a/fs/Makefile
> > > +++ b/fs/Makefile
> > > @@ -9,6 +9,7 @@ obj-$(CONFIG_FS_LOADER) += fs.o
> > >   obj-$(CONFIG_SPL_FS_FAT) += fat/
> > >   obj-$(CONFIG_SPL_FS_EXT4) += ext4/
> > >   obj-$(CONFIG_SPL_FS_CBFS) += cbfs/
> > > +obj-$(CONFIG_SANDBOX) += sandbox/
> > 
> > Why wouldn't you use CONFIG_SANDBOX_SPL here?
> 
> Because that's what the check is in fs.c. Maybe it should be
> CONFIG_IS_ENABLED(SANDBOX) in there.

And, yes I just said one thing, but on the other hand, if we don't need
this for tests in SPL then fixing fs/fs.c instead is indeed better.

-- 
Tom


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Re: [PATCH 12/26] fs: Compile in sandbox filesystem in SPL if it is enabled

[Tom Rini]

On Thu, Oct 12, 2023 at 10:15:45AM -0400, Sean Anderson wrote:
> On 10/12/23 02:39, Heinrich Schuchardt wrote:
> > On 10/12/23 03:56, Sean Anderson wrote:
> > > fs.c thinks that the sandbox filesystem is available if SANDBOX is 
> > > enabled,
> > > but it is not in SPL. Compile it in SPL to avoid linker errors.
> > > 
> > > Signed-off-by: Sean Anderson 
> > > ---
> > > 
> > >   fs/Makefile | 1 +
> > >   1 file changed, 1 insertion(+)
> > > 
> > > diff --git a/fs/Makefile b/fs/Makefile
> > > index 4bed2ff2d99..592c7542bde 100644
> > > --- a/fs/Makefile
> > > +++ b/fs/Makefile
> > > @@ -9,6 +9,7 @@ obj-$(CONFIG_FS_LOADER) += fs.o
> > >   obj-$(CONFIG_SPL_FS_FAT) += fat/
> > >   obj-$(CONFIG_SPL_FS_EXT4) += ext4/
> > >   obj-$(CONFIG_SPL_FS_CBFS) += cbfs/
> > > +obj-$(CONFIG_SANDBOX) += sandbox/
> > 
> > Why wouldn't you use CONFIG_SANDBOX_SPL here?
> 
> Because that's what the check is in fs.c. Maybe it should be
> CONFIG_IS_ENABLED(SANDBOX) in there.

"CONFIG_SANDBOX_SPL" is not "CONFIG_SPL_SANDBOX", so CONFIG_IS_ENABLED
doesn't work.  I would suggest that fs/Makefile needs a bit of cleaning
to make use of obj-$(CONFIG_$(SPL_)_... logic instead of ifdef
CONFIG_SPL_BUILD, but I think Simon dislikes that form.  We could just
move the existing line outside of the SPL/else conditional.

-- 
Tom


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[PATCH v12 5/8] test: Add sandbox TPM boot measurement

[Eddie James]

Use the sandbox TPM driver to measure some boot images in a unit
test case.

Signed-off-by: Eddie James 
Reviewed-by: Simon Glass 
Acked-by: Ilias Apalodimas 
---
Changes since v5:
 - Only compile in the measurement u-boot command when
   CONFIG_MEASURED_BOOT is enabled.

 arch/sandbox/dts/sandbox.dtsi | 13 +++
 arch/sandbox/dts/test.dts | 13 +++
 configs/sandbox_defconfig |  1 +
 include/test/suites.h |  1 +
 test/boot/Makefile|  1 +
 test/boot/measurement.c   | 66 +++
 test/cmd_ut.c |  4 +++
 7 files changed, 99 insertions(+)
 create mode 100644 test/boot/measurement.c

diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi
index ff7e5584c5..241f397ba6 100644
--- a/arch/sandbox/dts/sandbox.dtsi
+++ b/arch/sandbox/dts/sandbox.dtsi
@@ -4,11 +4,23 @@
  * and sandbox64 builds.
  */
 
+#include 
 #include 
 
 #define USB_CLASS_HUB  9
 
 / {
+   reserved-memory {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   event_log: tcg_event_log {
+   no-map;
+   reg = <(CFG_SYS_SDRAM_SIZE - 0x2000) 0x2000>;
+   };
+   };
+
binman {
};
 
@@ -342,6 +354,7 @@
 
tpm2 {
compatible = "sandbox,tpm2";
+   memory-region = <_log>;
};
 
triangle {
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 9a863ea732..bb2ddd9bf2 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -9,6 +9,7 @@
 
 /dts-v1/;
 
+#include 
 #include 
 #include 
 #include 
@@ -68,6 +69,17 @@
osd0 = "/osd";
};
 
+   reserved-memory {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   event_log: tcg_event_log {
+   no-map;
+   reg = <(CFG_SYS_SDRAM_SIZE - 0x2000) 0x2000>;
+   };
+   };
+
binman: binman {
};
 
@@ -1422,6 +1434,7 @@
 
tpm2 {
compatible = "sandbox,tpm2";
+   memory-region = <_log>;
};
 
tpm {
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index d667cb9ae4..12c387a77e 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -349,3 +349,4 @@ CONFIG_UNIT_TEST=y
 CONFIG_UT_TIME=y
 CONFIG_UT_DM=y
 CONFIG_ARM_FFA_TRANSPORT=y
+CONFIG_MEASURED_BOOT=y
diff --git a/include/test/suites.h b/include/test/suites.h
index 1c7dc65966..48ed549c13 100644
--- a/include/test/suites.h
+++ b/include/test/suites.h
@@ -45,6 +45,7 @@ int do_ut_font(struct cmd_tbl *cmdtp, int flag, int argc, 
char *const argv[]);
 int do_ut_lib(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_loadm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_log(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]);
+int do_ut_measurement(struct cmd_tbl *cmdtp, int flag, int argc, char * const 
argv[]);
 int do_ut_mem(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_overlay(struct cmd_tbl *cmdtp, int flag, int argc,
diff --git a/test/boot/Makefile b/test/boot/Makefile
index 52947580ae..068522cb9e 100644
--- a/test/boot/Makefile
+++ b/test/boot/Makefile
@@ -4,6 +4,7 @@
 
 obj-$(CONFIG_BOOTSTD) += bootdev.o bootstd_common.o bootflow.o bootmeth.o
 obj-$(CONFIG_FIT) += image.o
+obj-$(CONFIG_MEASURED_BOOT) += measurement.o
 
 obj-$(CONFIG_EXPO) += expo.o
 obj-$(CONFIG_CEDIT) += cedit.o
diff --git a/test/boot/measurement.c b/test/boot/measurement.c
new file mode 100644
index 00..9db2ed324c
--- /dev/null
+++ b/test/boot/measurement.c
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Test for measured boot functions
+ *
+ * Copyright 2023 IBM Corp.
+ * Written by Eddie James 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define MEASUREMENT_TEST(_name, _flags)\
+   UNIT_TEST(_name, _flags, measurement_test)
+
+static int measure(struct unit_test_state *uts)
+{
+   struct bootm_headers images;
+   const size_t size = 1024;
+   u8 *kernel;
+   u8 *initrd;
+   size_t i;
+
+   kernel = malloc(size);
+   initrd = malloc(size);
+
+   images.os.image_start = map_to_sysmem(kernel);
+   images.os.image_len = size;
+
+   images.rd_start = map_to_sysmem(initrd);
+   images.rd_end = images.rd_start + size;
+
+   images.ft_addr = malloc(size);
+   images.ft_len = size;
+
+   env_set("bootargs", "measurement testing");
+
+   for (i = 0; i < size; ++i) {
+   kernel[i] = 0xf0 | (i & 0xf);
+   initrd[i] = (i & 0xf0) | 0xf;
+   images.ft_addr[i] = i & 0xff;
+   }
+
+   

[PATCH v12 0/8] tpm: Support boot measurements

[Eddie James]

This series adds support for measuring the boot images more generically
than the existing EFI support. Several EFI functions have been moved to
the TPM layer. The series includes optional measurement from the bootm 
command.
A new test case has been added for the bootm measurement to test the new
path, and the sandbox TPM2 driver has been updated to support this use
case.

Changes since v11:
 - Rebase on next. Sorry for the delay (been on leave).

Changes since v10:
 - Fix commit message on efi_loader change
 - Drop python test change
 - Squash armv7 fix from Ilias

Changes since v9:
 - Rebase and add Ilias' fixes (thanks!)

Changes since v8:
 - Fix a sandbox driver off-by-one error in checking the property type.
 - Fix log parsing again - any data corruption seen while replaying the
   event log was failing the entire measurement.
 - Added an option to ignore the existing log and a configuration option
   for systems to select that for the bootm measurement. This would only
   be selected for systems that know that U-Boot is the first stage
   bootloader. This is necessary because the reserved memory region may
   persist through resets and so U-Boot attempts to append to the
   previous boot's log.

Changes since v7:
 - Change name of tcg2_init_log and add more documentation
 - Add a check, when parsing the event log header, to ensure that the
   previous stage bootloader used all the active PCRs.
 - Change name of tcg2_log_find_end
 - Fix the greater than or equal to check to exit the log parsing
 - Make sure log_position is 0 if there is any error discovering the log
 - Return errors parsing the log if the data is corrupt so that we don't
   end up with half a log

Changes since v6:
 - Added comment for bootm_measure
 - Fixed line length in bootm_measure
 - Added Linaro copyright for all the EFI moved code
 - Changed tcg2_init_log (and by extension, tcg2_measurement_init) to
   copy any discovered event log to the user's log if passed in.

Changes since v5:
 - Re-ordered the patches to put the sandbox TPM driver patch second
 - Remove unused platform_get_eventlog in efi_tcg2.c
 - First look for tpm_event_log_* properties instead of linux,sml-*
 - Fix efi_tcg2.c compilation
 - Select SHA* configs
 - Remove the !SANDBOX dependency for EFI TCG2
 - Only compile in the measurement u-boot command when CONFIG_MEASURED_BOOT
   is enabled

Changes since v4:
 - Remove tcg2_measure_event function and check for NULL data in
   tcg2_measure_data
 - Use tpm_auto_startup
 - Fix efi_tcg2.c compilation for removing tcg2_pcr_read function
 - Change PCR indexes for initrd and dtb
 - Drop u8 casting in measurement test
 - Use bullets in documentation

Changes since v3:
 - Reordered headers
 - Refactored more of EFI code into common code
Removed digest_info structure and instead used the common alg_to_mask
  and alg_to_len
Improved event log parsing in common code to get it equivalent to EFI
  Common code now extends PCR if previous bootloader stage couldn't
  No need to allocate memory in the common code, so EFI copies the
  discovered buffer like it did before
Rename efi measure_event function

Changes since v2:
 - Add documentation.
 - Changed reserved memory address to the top of the RAM for sandbox dts.
 - Add measure state to booti and bootz.
 - Skip measurement for EFI images that should be measured

Changes since v1:
 - Refactor TPM layer functions to allow EFI system to use them, and
   remove duplicate EFI functions.
 - Add test case
 - Drop #ifdefs for bootm
 - Add devicetree measurement config option
 - Update sandbox TPM driver

Eddie James (6):
  tpm: Fix spelling for tpmu_ha union
  tpm: sandbox: Update for needed TPM2 capabilities
  tpm: Support boot measurements
  bootm: Support boot measurement
  test: Add sandbox TPM boot measurement
  doc: Add measured boot documentation

Ilias Apalodimas (2):
  efi_loader: fix EFI_ENTRY point on get_active_pcr_banks
  test: use a non system PCR for testing PCR extend

 arch/sandbox/dts/sandbox.dtsi  |  13 +
 arch/sandbox/dts/test.dts  |  13 +
 boot/Kconfig   |  32 ++
 boot/bootm.c   |  74 +++
 cmd/booti.c|   1 +
 cmd/bootm.c|   2 +
 cmd/bootz.c|   1 +
 configs/sandbox_defconfig  |   1 +
 doc/usage/index.rst|   1 +
 doc/usage/measured_boot.rst|  23 +
 drivers/tpm/tpm2_tis_sandbox.c | 100 ++--
 include/bootm.h|  11 +
 include/efi_tcg2.h |  44 --
 include/image.h|   1 +
 include/test/suites.h  |   1 +
 include/tpm-v2.h   | 263 ++-
 lib/Kconfig|   4 +
 lib/efi_loader/Kconfig |   2 -
 lib/efi_loader/efi_tcg2.c  | 823 -
 lib/tpm-v2.c   | 814 
 test/boot/Makefile |   1 +
 test/boot/measurement.c|  66 +++
 test/cmd_ut.c

Re: [PATCH] usb: xhci: Workaround to fix the USB halted endpoint issues

[Michal Simek]

On 9/12/23 05:59, Venkatesh Yadav Abbarapu wrote:

The xhci host controller driver trying to queue the URB's and it is
getting halted at the endpoint, thereby hitting the BUG_ON's.
Mostly these kind of random issues are seen on faulty boards.
Removing these BUG_ON's from the U-Boot xhci code, as in Linux kernel
xhci code BUG_ON/BUG's are removed entirely.
Please also note, that BUG_ON() is not recommended any more in the Linux
kernel.
Similar issue has been observed on TI AM437x board and they created a patch
in Linux kernel as below
https://patches.linaro.org/project/linux-usb/patch/1390250711-25840-1-git-send-email-ba...@ti.com/

Signed-off-by: Venkatesh Yadav Abbarapu 
---
  drivers/usb/host/xhci-mem.c  | 17 -
  drivers/usb/host/xhci-ring.c | 31 +++
  drivers/usb/host/xhci.c  |  6 --
  include/usb/xhci.h   |  2 +-
  4 files changed, 8 insertions(+), 48 deletions(-)

diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 72b7530626..0efb4bd7ba 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -36,8 +36,6 @@
   */
  void xhci_flush_cache(uintptr_t addr, u32 len)
  {
-   BUG_ON((void *)addr == NULL || len == 0);
-
flush_dcache_range(addr & ~(CACHELINE_SIZE - 1),
ALIGN(addr + len, CACHELINE_SIZE));
  }
@@ -51,8 +49,6 @@ void xhci_flush_cache(uintptr_t addr, u32 len)
   */
  void xhci_inval_cache(uintptr_t addr, u32 len)
  {
-   BUG_ON((void *)addr == NULL || len == 0);
-
invalidate_dcache_range(addr & ~(CACHELINE_SIZE - 1),
ALIGN(addr + len, CACHELINE_SIZE));
  }
@@ -84,8 +80,6 @@ static void xhci_ring_free(struct xhci_ctrl *ctrl, struct 
xhci_ring *ring)
struct xhci_segment *seg;
struct xhci_segment *first_seg;
  
-	BUG_ON(!ring);

-
first_seg = ring->first_seg;
seg = first_seg->next;
while (seg != first_seg) {
@@ -210,7 +204,6 @@ static void *xhci_malloc(unsigned int size)
size_t cacheline_size = max(XHCI_ALIGNMENT, CACHELINE_SIZE);
  
  	ptr = memalign(cacheline_size, ALIGN(size, cacheline_size));

-   BUG_ON(!ptr);
memset(ptr, '\0', size);
  
  	xhci_flush_cache((uintptr_t)ptr, size);

@@ -291,7 +284,6 @@ static struct xhci_segment *xhci_segment_alloc(struct 
xhci_ctrl *ctrl)
struct xhci_segment *seg;
  
  	seg = malloc(sizeof(struct xhci_segment));

-   BUG_ON(!seg);
  
  	seg->trbs = xhci_malloc(SEGMENT_SIZE);

seg->dma = xhci_dma_map(ctrl, seg->trbs, SEGMENT_SIZE);
@@ -323,13 +315,11 @@ struct xhci_ring *xhci_ring_alloc(struct xhci_ctrl *ctrl, 
unsigned int num_segs,
struct xhci_segment *prev;
  
  	ring = malloc(sizeof(struct xhci_ring));

-   BUG_ON(!ring);
  
  	if (num_segs == 0)

return ring;
  
  	ring->first_seg = xhci_segment_alloc(ctrl);

-   BUG_ON(!ring->first_seg);
  
  	num_segs--;
  
@@ -338,7 +328,6 @@ struct xhci_ring *xhci_ring_alloc(struct xhci_ctrl *ctrl, unsigned int num_segs,

struct xhci_segment *next;
  
  		next = xhci_segment_alloc(ctrl);

-   BUG_ON(!next);
  
  		xhci_link_segments(ctrl, prev, next, link_trbs);
  
@@ -399,7 +388,6 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl)

break;
page_size = page_size >> 1;
}
-   BUG_ON(i == 16);
  
  	ctrl->page_size = 1 << (i + 12);

buf = memalign(ctrl->page_size, num_sp * ctrl->page_size);
@@ -444,9 +432,7 @@ static struct xhci_container_ctx
struct xhci_container_ctx *ctx;
  
  	ctx = malloc(sizeof(struct xhci_container_ctx));

-   BUG_ON(!ctx);
  
-	BUG_ON((type != XHCI_CTX_TYPE_DEVICE) && (type != XHCI_CTX_TYPE_INPUT));

ctx->type = type;
ctx->size = (MAX_EP_CTX_NUM + 1) *
CTX_SIZE(xhci_readl(>hccr->cr_hccparams));
@@ -638,7 +624,6 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr 
*hccr,
  struct xhci_input_control_ctx
*xhci_get_input_control_ctx(struct xhci_container_ctx *ctx)
  {
-   BUG_ON(ctx->type != XHCI_CTX_TYPE_INPUT);
return (struct xhci_input_control_ctx *)ctx->bytes;
  }
  
@@ -760,8 +745,6 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
  
  	virt_dev = ctrl->devs[slot_id];
  
-	BUG_ON(!virt_dev);

-
/* Extract the EP0 and Slot Ctrl */
ep0_ctx = xhci_get_ep_ctx(ctrl, virt_dev->in_ctx, 0);
slot_ctx = xhci_get_slot_ctx(ctrl, virt_dev->in_ctx);
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index c8260cbdf9..1bde0b9793 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -244,6 +244,7 @@ static int prepare_ring(struct xhci_ctrl *ctrl, struct 
xhci_ring *ep_ring,
return -EINVAL;
case EP_STATE_HALTED:
puts("WARN halted endpoint, queueing URB anyway.\n");
+   return -EPIPE;

Re: [PATCH v3 0/8] Add SM uclass and Meson SM driver

[neil . armstrong]

Hi,

On 21/09/2023 10:13, Alexey Romanov wrote:

Hello!

At the moment, there is no single general approach to using
secure monitor in U-Boot, there is only the smc_call() function,
over which everyone builds their own add-ons. This patchset
is designed to solve this problem by adding a new uclass -
SM_UCLASS. This UCLASS export following generic API:

1. sm_call() - generic SMC call to the secure-monitor
2. sm_call_read() - retrieve data from secure-monitor
3. sm_call_write() - send data to secure-monitor

In the future, it is necessary to completely get rid of raw
smc_call() calls, replacing them with the use of SM_UCLASS
based drivers.

V2:

- Add SM UCLASS
- Add SM sandbox driver
- Add test for sandbox driver
- Meson Secure Monitor driver now based on SM_UCLASS
- Fix include order in arch/arm/mach-meson/sm.c

Also, during the discussion in V1 of this patchset, it was
discussed to create MESON_SM_UCLASS, but I considered such
a uclass to be too arch-specific. That's why I suggest
SM_UCLASS, which is not so arch-specific: secure monitor can
used for whole ARM devices, not only for Amlogic SoC's.

V3:

- Fix typos in commit messages
- Use uclass_first_device_err() instead of uclass_get_device_by_name()
- Return -ENOSYS instead of -EPROTONOSUPPORT if SM_UCLASS option not
implemented

Alexey Romanov (8):
   drivers: introduce Secure Monitor uclass
   sandbox: add sandbox sm uclass driver
   sandbox: dts: add meson secure monitor node
   sandbox: add tests for UCLASS_SM
   sandbox: defconfig: enable CONFIG_SM option
   drivers: introduce Meson Secure Monitor driver
   arch: meson: sm: set correct order of the includes
   arch: meson: use secure monitor driver

  MAINTAINERS |   1 +
  arch/arm/mach-meson/Kconfig |   1 +
  arch/arm/mach-meson/sm.c| 116 +++--
  arch/sandbox/dts/test.dts   |   4 +
  configs/sandbox_defconfig   |   1 +
  drivers/Kconfig |   2 +
  drivers/Makefile|   1 +
  drivers/sm/Kconfig  |   9 ++
  drivers/sm/Makefile |   5 +
  drivers/sm/meson-sm.c   | 198 
  drivers/sm/sandbox-sm.c |  76 ++
  drivers/sm/sm-uclass.c  |  55 ++
  include/dm/uclass-id.h  |   1 +
  include/meson/sm.h  |  19 
  include/sandbox-sm.h|  18 
  include/sm-uclass.h |  72 +
  include/sm.h|  67 
  test/dm/Makefile|   1 +
  test/dm/sm.c|  65 
  19 files changed, 656 insertions(+), 56 deletions(-)
  create mode 100644 drivers/sm/Kconfig
  create mode 100644 drivers/sm/Makefile
  create mode 100644 drivers/sm/meson-sm.c
  create mode 100644 drivers/sm/sandbox-sm.c
  create mode 100644 drivers/sm/sm-uclass.c
  create mode 100644 include/meson/sm.h
  create mode 100644 include/sandbox-sm.h
  create mode 100644 include/sm-uclass.h
  create mode 100644 include/sm.h
  create mode 100644 test/dm/sm.c



This serie breaks other boards:
+binman: Error 1 running 'mkimage -d 
./mkimage-in-simple-bin.mkimage-u-boot-tpl:./mkimage-in-simple-bin.mkimage-u-boot-spl
 -n px30 -T rksd ./idbloader.img': Error: SPL image is too large (size 0x3000 
than 0x2800)
+Error: Bad parameters for image type
+Usage: mkimage [-T type] -l image
+  -l ==> list image header information
+  -T ==> parse image file as 'type'
+  -q ==> quiet
+   mkimage [-x] -A arch -O os -T type -C comp -a addr -e ep -n name -d 
data_file[:data_file...] image
+  -A ==> set architecture to 'arch'
+  -O ==> set operating system to 'os'
+  -T ==> set image type to 'type'
+  -C ==> set compression type 'comp'
+  -a ==> set load address to 'addr' (hex)
+  -e ==> set entry point to 'ep' (hex)
+  -n ==> set image name to 'name'
+  -R ==> set second image name to 'name'
+  -d ==> use image data from 'datafile'
+  -x ==> set XIP (execute in place)
+  -s ==> create an image with no data
+  -v ==> verbose
+   mkimage [-D dtc_options] [-f fit-image.its|-f auto|-f auto-conf|-F] [-b  [-b 
]] [-E] [-B size] [-i ] fit-image
+file is used with -f auto, it may occur multiple times.
+  -D => set all options for device tree compiler
+  -f => input filename for FIT source
+  -i => input filename for ramdisk file
+  -E => place data outside of the FIT structure
+  -B => align size in hex for FIT structure and, with -E, for the 
external data
+  -b => append the device tree binary to the FIT
+  -t => update the timestamp in the FIT
+Signing / verified boot options: [-k keydir] [-K dtb] [ -c ] [-p 
addr] [-r] [-N engine]
+  -k => set directory containing private keys
+  -K => write public keys to this .dtb file
+  -g => set key name hint
+  -G => use this signing key (in lieu of -k)
+  -c => add comment in 

Re: [PATCH 12/26] fs: Compile in sandbox filesystem in SPL if it is enabled

[Sean Anderson]

On 10/12/23 02:39, Heinrich Schuchardt wrote:

On 10/12/23 03:56, Sean Anderson wrote:

fs.c thinks that the sandbox filesystem is available if SANDBOX is enabled,
but it is not in SPL. Compile it in SPL to avoid linker errors.

Signed-off-by: Sean Anderson 
---

  fs/Makefile | 1 +
  1 file changed, 1 insertion(+)

diff --git a/fs/Makefile b/fs/Makefile
index 4bed2ff2d99..592c7542bde 100644
--- a/fs/Makefile
+++ b/fs/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_FS_LOADER) += fs.o
  obj-$(CONFIG_SPL_FS_FAT) += fat/
  obj-$(CONFIG_SPL_FS_EXT4) += ext4/
  obj-$(CONFIG_SPL_FS_CBFS) += cbfs/
+obj-$(CONFIG_SANDBOX) += sandbox/


Why wouldn't you use CONFIG_SANDBOX_SPL here?


Because that's what the check is in fs.c. Maybe it should be
CONFIG_IS_ENABLED(SANDBOX) in there.

--Sean

Re: [PATCH 16/26] spl: Don't cache devices when UNIT_TEST is enabled

[Sean Anderson]

On 10/12/23 03:23, Heinrich Schuchardt wrote:

On 10/12/23 03:56, Sean Anderson wrote:

Several SPL functions try to avoid performing initialization twice by
caching devices. This is fine for regular boot, but does not work with
UNIT_TEST, since all devices are torn down after each test. Disable caching
so we don't use stale devices.

Signed-off-by: Sean Anderson 
---

  common/spl/spl_fat.c | 2 +-
  common/spl/spl_mmc.c | 3 ++-
  2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c
index c6e2526ade1..8bec9cce5ca 100644
--- a/common/spl/spl_fat.c
+++ b/common/spl/spl_fat.c
@@ -24,7 +24,7 @@ static int spl_register_fat_device(struct blk_desc 
*block_dev, int partition)
  {
  int err = 0;

-    if (fat_registered)
+    if (!CONFIG_IS_ENABLED(UNIT_TEST) && fat_registered)


Please, avoid separate code paths depending on CONFIG_UNIT_TESTS.

We shouldn't change normal behavior if unit tests are not running. It is
preferable to let the unit test framework call a new function resetting
fat_registered when needed. This will allow future tests to test all
code paths separately.


OK, that sounds reasonable to me.

--Sean

Re: [PATCH 15/26] net: bootp: Fall back to BOOTP from DHCP when unit testing

[Sean Anderson]

On 10/12/23 03:16, Heinrich Schuchardt wrote:

On 10/12/23 03:56, Sean Anderson wrote:

If we sent a DHCP packet and get a BOOTP response from the server, we
shouldn't try to send a DHCPREQUEST packet, since it won't be DHCPACKed.
Transition straight to BIND. This is only enabled for UNIT_TEST to avoid
bloat, since I suspect the number of BOOTP servers in the wild is
vanishingly small.

Signed-off-by: Sean Anderson 
---

  net/bootp.c | 6 ++
  1 file changed, 6 insertions(+)

diff --git a/net/bootp.c b/net/bootp.c
index 2053cce88c6..7b0f45e18a9 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -1073,6 +1073,11 @@ static void dhcp_handler(uchar *pkt, unsigned dest, 
struct in_addr sip,
  CONFIG_SYS_BOOTFILE_PREFIX,
  strlen(CONFIG_SYS_BOOTFILE_PREFIX)) == 0) {
  #endif    /* CONFIG_SYS_BOOTFILE_PREFIX */
+    if (CONFIG_IS_ENABLED(UNIT_TEST) &&
+    dhcp_message_type((u8 *)bp->bp_vend) == -1) {
+    debug("got BOOTP response; transitioning to BOUND\n");
+    goto dhcp_got_bootp;


This may result in unexpected behavior when running tests against an
actual network. Please, avoid this.


What is unexpected behavior? If you get a BOOTP (not DHCP) packet, you should
behave according to the BOOTP protocol, not the DHCP protocol.

--Sean

Re: [PATCH 13/26] net: Fix compiling SPL when fastboot is enabled

[Sean Anderson]

On 10/12/23 02:52, Heinrich Schuchardt wrote:

On 10/12/23 03:56, Sean Anderson wrote:

When fastboot is enabled in U-Boot proper and SPL_NET is enabled, we will
try to (unsuccessfully) reference it in SPL. Fix these linker errors by
conditioning on SPL_UDP/TCP_FUNCTION_FASTBOOT.

Signed-off-by: Sean Anderson 
---

  net/Makefile | 4 ++--
  net/net.c    | 4 ++--
  2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/net/Makefile b/net/Makefile
index 3e2d061338d..5ea58eef7e4 100644
--- a/net/Makefile
+++ b/net/Makefile
@@ -27,8 +27,8 @@ obj-$(CONFIG_CMD_PCAP) += pcap.o
  obj-$(CONFIG_CMD_RARP) += rarp.o
  obj-$(CONFIG_CMD_SNTP) += sntp.o
  obj-$(CONFIG_CMD_TFTPBOOT) += tftp.o
-obj-$(CONFIG_UDP_FUNCTION_FASTBOOT)  += fastboot_udp.o
-obj-$(CONFIG_TCP_FUNCTION_FASTBOOT)  += fastboot_tcp.o
+obj-$(CONFIG_$(SPL_)UDP_FUNCTION_FASTBOOT)  += fastboot_udp.o
+obj-$(CONFIG_$(SPL_)TCP_FUNCTION_FASTBOOT)  += fastboot_tcp.o


Please, use $(SPL_TPL) so that we don't have to revisit this should we
ever decide to enable fastboot in SPL in future.


You are going to enable fastboot in TPL?

--Sean

[PATCH] arm64: dts: zynqmp: make hw-ecc as the default ecc mode

[Michal Simek]

From: Amit Kumar Mahapatra 

Except for Linux no other component (i.e., u-boot, fsbl or BootRom) of the
software stack supports software ecc engine. So, make hw-ecc as the default
ecc mode.

Signed-off-by: Amit Kumar Mahapatra 
Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts 
b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
index 23a3ff2fed98..160c6c58b36d 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
@@ -141,8 +141,7 @@
reg = <0x0>;
#address-cells = <0x2>;
#size-cells = <0x1>;
-   nand-ecc-mode = "soft";
-   nand-ecc-algo = "bch";
+   nand-ecc-mode = "hw";
nand-rb = <0>;
label = "main-storage-0";
nand-ecc-step-size = <1024>;
@@ -178,8 +177,7 @@
reg = <0x1>;
#address-cells = <0x2>;
#size-cells = <0x1>;
-   nand-ecc-mode = "soft";
-   nand-ecc-algo = "bch";
+   nand-ecc-mode = "hw";
nand-rb = <0>;
label = "main-storage-1";
nand-ecc-step-size = <1024>;
-- 
2.36.1

[PATCH] ARM: zynq: Disable the config CONFIG_SPI_FLASH_USE_4K_SECTORS

[Michal Simek]

From: Venkatesh Yadav Abbarapu 

Lock size for the flashes will be in terms of sector size, so
disable the CONFIG_SPI_FLASH_USE_4K_SECTORS and read it from the
flash itself.

Signed-off-by: Venkatesh Yadav Abbarapu 
Signed-off-by: Michal Simek 
---

 configs/xilinx_zynq_virt_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/xilinx_zynq_virt_defconfig 
b/configs/xilinx_zynq_virt_defconfig
index 817fb4142d18..6145af62b511 100644
--- a/configs/xilinx_zynq_virt_defconfig
+++ b/configs/xilinx_zynq_virt_defconfig
@@ -126,6 +126,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
-- 
2.36.1

[PATCH] arm64: zynqmp: Disable the lock option for mini qspi

[Michal Simek]

From: Venkatesh Yadav Abbarapu 

As mini configs are required only for flashing the images, so
disabling the lock config which will save nearly 6KB of memory.

Signed-off-by: Venkatesh Yadav Abbarapu 
Signed-off-by: Michal Simek 
---

Depends on
https://lore.kernel.org/all/20230928034940.2220-2-venkatesh.abbar...@amd.com/
---
 configs/xilinx_zynqmp_mini_qspi_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig 
b/configs/xilinx_zynqmp_mini_qspi_defconfig
index a1adfb9e5d14..4a74ca76a281 100644
--- a/configs/xilinx_zynqmp_mini_qspi_defconfig
+++ b/configs/xilinx_zynqmp_mini_qspi_defconfig
@@ -77,6 +77,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 # CONFIG_DM_MAILBOX is not set
 # CONFIG_MMC is not set
 # CONFIG_SPI_FLASH_SMART_HWCAPS is not set
+# CONFIG_SPI_FLASH_LOCK is not set
 # CONFIG_SPI_FLASH_UNLOCK_ALL is not set
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_ISSI=y
-- 
2.36.1

[PATCH 4/5] arm64: zynqmp: Remove address/size-cells from ams node

[Michal Simek]

Remove unused address/size-cells which is also done upstream that's why
this is pretty much sync patch with upstream.

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp.dtsi | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 366b50a104be..de60233fd061 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -1034,8 +1034,6 @@
compatible = "xlnx,zynqmp-ams-pl";
status = "disabled";
reg = <0x400 0x400>;
-   #address-cells = <1>;
-   #size-cells = <0>;
};
};
 
-- 
2.36.1

[PATCH 5/5] arm64: zynqmp: remove snps, xhci-stream-quirk property for usb

[Michal Simek]

From: Piyush Mehta 

To sync up with the upstream bulk-stream feature, removed
'snps,xhci-stream-quirk' DT property for usb.

Signed-off-by: Piyush Mehta 
Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp.dtsi | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index de60233fd061..2253e773d386 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -955,7 +955,6 @@
snps,quirk-frame-length-adjustment = <0x20>;
clock-names = "ref";
snps,enable_guctl1_ipd_quirk;
-   snps,xhci-stream-quirk;
snps,resume-hs-terminations;
/* dma-coherent; */
};
@@ -988,7 +987,6 @@
snps,quirk-frame-length-adjustment = <0x20>;
clock-names = "ref";
snps,enable_guctl1_ipd_quirk;
-   snps,xhci-stream-quirk;
snps,resume-hs-terminations;
/* dma-coherent; */
};
-- 
2.36.1

[PATCH 1/5] arm64: zynqmp: Use mdio node by vp-x-a2785-00-revA and vpk120-revA

[Michal Simek]

All boards have been converted to use mdio node that's why move ethernet
phys under mdio node too.

Signed-off-by: Michal Simek 
---

Same change was done by:
https://lore.kernel.org/r/ff165281a70a38e2b76fee91e6255ce95ce8021b.1695378830.git.michal.si...@amd.com
---
 arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts | 10 +++---
 arch/arm/dts/zynqmp-vpk120-revA.dts| 10 +++---
 2 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts 
b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
index 2f88aa4a0d28..9ab8f5bfffe4 100644
--- a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
+++ b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
@@ -119,9 +119,13 @@
phy-mode = "sgmii"; /* DTG generates this properly 1512 */
is-internal-pcspma;
/* phys = < 0 PHY_TYPE_SGMII 0 0>; */
-   /* phy-reset-gpios = < 142 GPIO_ACTIVE_LOW>; */
-   phy0: ethernet-phy@0 { /* u131 - M88e1512 */
-   reg = <0>;
+   mdio: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   /* reset-gpios = < 142 GPIO_ACTIVE_LOW>; */
+   phy0: ethernet-phy@0 { /* u131 - M88e1512 */
+   reg = <0>;
+   };
};
 };
 
diff --git a/arch/arm/dts/zynqmp-vpk120-revA.dts 
b/arch/arm/dts/zynqmp-vpk120-revA.dts
index 66919f578e02..ce76e0b3db36 100644
--- a/arch/arm/dts/zynqmp-vpk120-revA.dts
+++ b/arch/arm/dts/zynqmp-vpk120-revA.dts
@@ -120,9 +120,13 @@
phy-mode = "sgmii"; /* DTG generates this properly 1512 */
is-internal-pcspma;
/* phys = < 0 PHY_TYPE_SGMII 0 0>; */
-   /* phy-reset-gpios = < 142 GPIO_ACTIVE_LOW>; */
-   phy0: ethernet-phy@0 {
-   reg = <0>;
+   mdio: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   /* reset-gpios = < 142 GPIO_ACTIVE_LOW>; */
+   phy0: ethernet-phy@0 {
+   reg = <0>;
+   };
};
 };
 
-- 
2.36.1

[PATCH 2/5] arm64: zynqmp: Remove xlnx,zynqmp-aes node

[Michal Simek]

AES can be discovered via firmware interface that's why remove node for it.

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp.dtsi | 4 
 1 file changed, 4 deletions(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index f03c201caee9..463ac14f4b59 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -220,10 +220,6 @@
compatible = "xlnx,zynqmp-pcap-fpga";
};
 
-   xlnx_aes: zynqmp-aes {
-   compatible = "xlnx,zynqmp-aes";
-   };
-
zynqmp_reset: reset-controller {
compatible = "xlnx,zynqmp-reset";
#reset-cells = <1>;
-- 
2.36.1

[PATCH 3/5] Revert "arm64: zynqmp: Add power domain description for PL"

[Michal Simek]

This reverts commit d59fac2f3f247470708a1aed1af96802a05e0e61.

This power domain shouldn't be enabled by default. Power domain behavior
should be handled on case by case basis. Adding this property to
zynqmp.dtsi is breaking some suspend/resume cases that's why remove it
from this file.

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 463ac14f4b59..366b50a104be 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -257,7 +257,6 @@
#address-cells = <2>;
#size-cells = <2>;
ranges;
-   power-domains = <_firmware PD_PL>;
};
 
remoteproc {
-- 
2.36.1

[PATCH 0/5] arm64: xilinx: DT sync

[Michal Simek]

Hi,

I have found 5 more patches internally which should be also upstreamed to
get DT in sync and descrease amount of differences.

Thanks,
Michal


Michal Simek (4):
  arm64: zynqmp: Use mdio node by vp-x-a2785-00-revA and vpk120-revA
  arm64: zynqmp: Remove xlnx,zynqmp-aes node
  Revert "arm64: zynqmp: Add power domain description for PL"
  arm64: zynqmp: Remove address/size-cells from ams node

Piyush Mehta (1):
  arm64: zynqmp: remove snps,xhci-stream-quirk property for usb

 arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts | 10 +++---
 arch/arm/dts/zynqmp-vpk120-revA.dts| 10 +++---
 arch/arm/dts/zynqmp.dtsi   |  9 -
 3 files changed, 14 insertions(+), 15 deletions(-)

-- 
2.36.1

RE: coreboot 4.11 + U-boot master

[Jay Talbott]

Hi Simon,

I had openssl installed, but apparently not libssl-dev. But when I added that, 
it still failed in the same spot. So then I just installed all the 
prerequisites (cut/paste from [1]), even though many of them were already 
installed, and then it finally built. So at least I have something building at 
this point.

We will need the 64-bit build. Not sure if it was the right thing to do, but I 
did put coreboot64_defconfig in make menuconfig for the U-boot config file.

If you have a patch for making the 64-bit build an option, I'll need to apply 
that to the 4.11 branch for this build.

Thanks for your help!

- Jay

Jay Talbott
Principal Consulting Engineer
SysPro Consulting, LLC
3057 E. Muirfield St.
Gilbert, AZ 85298
(480) 704-8045
(480) 445-9895 (FAX)
jaytalb...@sysproconsulting.com 
http://www.sysproconsulting.com 


> -Original Message-
> From: Simon Glass 
> Sent: Wednesday, October 11, 2023 8:45 PM
> To: Jay Talbott 
> Cc: u-boot@lists.denx.de
> Subject: Re: coreboot 4.11 + U-boot master
> 
> Hi Jay,
> 
> On Wed, 11 Oct 2023 at 19:03, Jay Talbott
>  wrote:
> >
> > Hi Simon,
> >
> >
> >
> > So I gave it a whirl to do a build of coreboot (on the 4.11 branch) with 
> > the U-
> boot payload, specifying U-boot master to get the latest version of U-boot.
> >
> >
> >
> > Unfortunately, it failed to build the payload:
> >
> >
> >
> > Cloning U-Boot from Git
> >
> > Cloning into 'u-boot'...
> >
> > warning: redirecting to https://source.denx.de/u-boot/u-boot.git/
> >
> > remote: Enumerating objects: 945927, done.
> >
> > remote: Counting objects: 100% (6622/6622), done.
> >
> > remote: Compressing objects: 100% (2418/2418), done.
> >
> > remote: Total 945927 (delta 4232), reused 6496 (delta 4159), pack-reused
> 939305
> >
> > Receiving objects: 100% (945927/945927), 190.29 MiB | 6.01 MiB/s, done.
> >
> > Resolving deltas: 100% (793720/793720), done.
> >
> > Updating files: 100% (20136/20136), done.
> >
> > Fetching new commits from the U-Boot git repo
> >
> > Checking out U-Boot revision origin/master
> >
> > Already on 'master'
> >
> > Your branch is up to date with 'origin/master'.
> >
> > Branch 'coreboot' set up to track remote branch 'master' from 'origin'.
> >
> > Switched to a new branch 'coreboot'
> >
> > MAKE   U-Boot origin/master
> >
> > In file included from tools/imagetool.h:24,
> >
> >  from tools/aisimage.c:7:
> >
> > include/image.h:1396:12: fatal error: openssl/evp.h: No such file or
> directory
> >
> > 1396 | #  include 
> >
> >   |^~~
> >
> > compilation terminated.
> >
> > make[3]: *** [scripts/Makefile.host:112: tools/aisimage.o] Error 1
> >
> > make[2]: *** [Makefile:1858: tools] Error 2
> >
> > make[1]: *** [Makefile:75: build] Error 2
> >
> > make: *** [payloads/external/Makefile.inc:187: payloads/external/U-
> Boot/u-boot/u-boot-dtb.bin] Error 2
> >
> >
> >
> > Looks like it needs openssl to get pulled in as part of the build. Is there
> something I’m missing that I need to do to get that to happen automatically?
> Or is there a manual step I need to do to get it pulled in?
> 
> For Debian this is:
> 
> sudo apt install libssl-dev
> 
> You can see all the pre-reqs at [1]
> 
> 
> >
> >
> >
> > Also, in coreboot’s make menuconfig, there’s a place for specifying a U-boot
> config file. For the first go at it I didn’t specify one, but I’m guessing 
> that
> maybe I need to at some point. If so, can you point me to what I’ll need to 
> put
> in there?
> 
> Nothing in particular. At some point if you want to build a particular
> U-Boot version from a separate checkout, you can manually replace
> U-Boot in coreboot.rom:
> 
> # update u-boot
> cbfstool $BUILD_DIR/coreboot.rom remove -n fallback/payload || true
> cbfstool $BUILD_DIR/coreboot.rom add-flat-binary \
>-f u-boot.bin \
> -n fallback/payload -c LZMA -l 0x111 -e 0x111
> 
> If you want the 64-bit U-Boot then instead of u-boot.bin you need
> u-boot-x86-with-spl.bin (and you must use 'make coreboot64_defconfig'
> to configure U-Boot). In fact, that option is not available in
> coreboot yet, so I should send a patch!
> 
> 
> [1] https://u-boot.readthedocs.io/en/latest/build/gcc.html

coreboot 4.11 + U-boot master

[Jay Talbott]

Hi Simon,

So I gave it a whirl to do a build of coreboot (on the 4.11 branch) with the 
U-boot payload, specifying U-boot master to get the latest version of U-boot.

Unfortunately, it failed to build the payload:

Cloning U-Boot from Git
Cloning into 'u-boot'...
warning: redirecting to https://source.denx.de/u-boot/u-boot.git/
remote: Enumerating objects: 945927, done.
remote: Counting objects: 100% (6622/6622), done.
remote: Compressing objects: 100% (2418/2418), done.
remote: Total 945927 (delta 4232), reused 6496 (delta 4159), pack-reused 939305
Receiving objects: 100% (945927/945927), 190.29 MiB | 6.01 MiB/s, done.
Resolving deltas: 100% (793720/793720), done.
Updating files: 100% (20136/20136), done.
Fetching new commits from the U-Boot git repo
Checking out U-Boot revision origin/master
Already on 'master'
Your branch is up to date with 'origin/master'.
Branch 'coreboot' set up to track remote branch 'master' from 'origin'.
Switched to a new branch 'coreboot'
MAKE   U-Boot origin/master
In file included from tools/imagetool.h:24,
 from tools/aisimage.c:7:
include/image.h:1396:12: fatal error: openssl/evp.h: No such file or directory
1396 | #  include 
  |^~~
compilation terminated.
make[3]: *** [scripts/Makefile.host:112: tools/aisimage.o] Error 1
make[2]: *** [Makefile:1858: tools] Error 2
make[1]: *** [Makefile:75: build] Error 2
make: *** [payloads/external/Makefile.inc:187: 
payloads/external/U-Boot/u-boot/u-boot-dtb.bin] Error 2

Looks like it needs openssl to get pulled in as part of the build. Is there 
something I'm missing that I need to do to get that to happen automatically? Or 
is there a manual step I need to do to get it pulled in?

Also, in coreboot's make menuconfig, there's a place for specifying a U-boot 
config file. For the first go at it I didn't specify one, but I'm guessing that 
maybe I need to at some point. If so, can you point me to what I'll need to put 
in there?

Thanks!

- Jay

Jay Talbott
Principal Consulting Engineer
SysPro Consulting, LLC
3057 E. Muirfield St.
Gilbert, AZ 85298
(480) 704-8045
(480) 445-9895 (FAX)
jaytalb...@sysproconsulting.com
http://www.sysproconsulting.com

[cid:image001.jpg@01D9FC74.2E526D20]

RE: [PATCH v2 11/19] serial: sh: Fix error handling

[Chris Paterson]

> From: U-Boot  On Behalf Of Paul Barker
> Sent: Monday, October 9, 2023 5:47 PM
> 
> The current SCIF error handling is broken for the RZ/G2L. After a break
> condition has been triggered, the current code is unable to clear the
> error and serial port output never resumes.
> 
> The RZ/G2L datasheet says that most error conditions are cleared by
> resetting the relevant error bits in the FSR & LSR registers to zero.
> To clear framing errors, the invalid data also needs to be read out of
> the receive FIFO.
> 
> After reviewing datasheets for RZ/G2{H,M,N,E}, R-Car Gen4, R-Car Gen3
> and even SH7751 SoCs, it's clear that this is the way to clear errors
> for all of these SoCs.
> 
> While we're here, annotate the handle_error() function with a couple of
> comments as the reads and writes themselves don't immediately make it
> clear what we're doing.
> 
> Signed-off-by: Paul Barker 

I've verified that the problem exists on the RZ/G2M hihope-rzg2m board, and 
that this patch fixes it.

Tested-by: Chris Paterson 

Kind regards, Chris

[PATCH v3 1/1] drivers: rng: add support for Meson S4

[Alexey Romanov]

For some Amlogic SOC's, mechanism to obtain random number
has been changed. For example, S4 now uses status bit waiting algo.

Signed-off-by: Alexey Romanov 
---
 drivers/rng/meson-rng.c | 72 -
 1 file changed, 71 insertions(+), 1 deletion(-)

diff --git a/drivers/rng/meson-rng.c b/drivers/rng/meson-rng.c
index e0a1e8c7e0..fd2988e91b 100644
--- a/drivers/rng/meson-rng.c
+++ b/drivers/rng/meson-rng.c
@@ -10,10 +10,23 @@
 #include 
 #include 
 #include 
+#include 
+
+#define RNG_DATA   0x00
+#define RNG_S4_DATA0x08
+#define RNG_S4_CFG 0x00
+
+#define RUN_BITBIT(0)
+#define SEED_READY_STS_BIT BIT(31)
+
+struct meson_rng_priv {
+   u32 (*read)(fdt_addr_t base);
+};
 
 struct meson_rng_plat {
fdt_addr_t base;
struct clk clk;
+   struct meson_rng_priv *priv;
 };
 
 /**
@@ -27,10 +40,11 @@ struct meson_rng_plat {
 static int meson_rng_read(struct udevice *dev, void *data, size_t len)
 {
struct meson_rng_plat *pdata = dev_get_plat(dev);
+   struct meson_rng_priv *priv = pdata->priv;
char *buffer = (char *)data;
 
while (len) {
-   u32 rand = readl(pdata->base);
+   u32 rand = priv->read(pdata->base);
size_t step;
 
if (len >= 4)
@@ -44,6 +58,47 @@ static int meson_rng_read(struct udevice *dev, void *data, 
size_t len)
return 0;
 }
 
+static int meson_rng_wait_status(void __iomem *cfg_addr, int bit)
+{
+   u32 status = 0;
+   int ret;
+
+   ret = readl_relaxed_poll_timeout(cfg_addr,
+status, !(status & bit),
+1);
+   if (ret)
+   return -EBUSY;
+
+   return 0;
+}
+
+static u32 meson_common_rng_read(fdt_addr_t base)
+{
+   return readl(base);
+}
+
+static u32 meson_s4_rng_read(fdt_addr_t base)
+{
+   void __iomem *cfg_addr = (void *)base + RNG_S4_CFG;
+   int err;
+
+   writel_relaxed(readl_relaxed(cfg_addr) | SEED_READY_STS_BIT, cfg_addr);
+
+   err = meson_rng_wait_status(cfg_addr, SEED_READY_STS_BIT);
+   if (err) {
+   pr_err("Seed isn't ready, try again\n");
+   return err;
+   }
+
+   err = meson_rng_wait_status(cfg_addr, RUN_BIT);
+   if (err) {
+   pr_err("Can't get random number, try again\n");
+   return err;
+   }
+
+   return readl_relaxed(base + RNG_S4_DATA);
+}
+
 /**
  * meson_rng_probe() - probe rng device
  *
@@ -59,6 +114,8 @@ static int meson_rng_probe(struct udevice *dev)
if (err)
return err;
 
+   pdata->priv = (struct meson_rng_priv *)dev_get_driver_data(dev);
+
return 0;
 }
 
@@ -102,9 +159,22 @@ static const struct dm_rng_ops meson_rng_ops = {
.read = meson_rng_read,
 };
 
+static const struct meson_rng_priv meson_rng_priv = {
+   .read = meson_common_rng_read,
+};
+
+static const struct meson_rng_priv meson_rng_priv_s4 = {
+   .read = meson_s4_rng_read,
+};
+
 static const struct udevice_id meson_rng_match[] = {
{
.compatible = "amlogic,meson-rng",
+   .data = (ulong)_rng_priv,
+   },
+   {
+   .compatible = "amlogic,meson-s4-rng",
+   .data = (ulong)_rng_priv_s4,
},
{},
 };
-- 
2.25.1

[PATCH v3 0/1] hwrng: meson - add support for S4

[Alexey Romanov]

Hello!

This patch adds support for Meson S4 series
hardware number generator using new algo.

V2:

- Sync with Linux version.

V3:

- Fix compiler warning "makes pointer from integer without a cast"

Alexey Romanov (1):
  drivers: rng: add support for Meson S4

 drivers/rng/meson-rng.c | 72 -
 1 file changed, 71 insertions(+), 1 deletion(-)

-- 
2.25.1