date:20231101

On Wed, Nov 01, 2023 at 02:32:06PM -0400, Sean Anderson wrote:
> On 8/5/23 19:32, Pavel Korotkevich wrote:
> >  From fe2ceb7c4365112055ecfc3bbf68ad47330b744d Mon Sep 17 00:00:00 2001
> > From: Pavel Korotkevich 
> > Date: Sun, 6 Aug 2023 02:00:41 +0300
> > Subject: [PATCH] cli: Add explicit kconfig dependency for CONFIG_IS_ENABLED 
> > macro
> 
> Please add a suitable commit message and use `git send-email` (or similar) to 
> send your patches.
> 
> --Sean
> 
> > ---
> >   include/cli.h | 2 ++
> >   1 file changed, 2 insertions(+)
> > 
> > diff --git a/include/cli.h b/include/cli.h
> > index 094a6602d7..d6dbbde070 100644
> > --- a/include/cli.h
> > +++ b/include/cli.h
> > @@ -9,6 +9,8 @@
> > 
> >   #include 
> > 
> > +#include 

This is a hard NAK, that file is -included by the build.

-- 
Tom


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Re: [PATCH 1/2] board: phytec: am62x: Add PHYTEC phyCORE-AM62x SoM

On Wed, Nov 01, 2023 at 07:23:24PM +0100, Wadim Egorov wrote:
> Hi Dhruva,
> 
> Am 01.11.23 um 16:57 schrieb Dhruva Gole:
> > Hi,
> > 
> > On Oct 31, 2023 at 14:37:31 +0100, Wadim Egorov wrote:
> > > Add basic support for PHYTEC phyCORE-AM62x SoM.
> > > 
> > > Supported features:
> > >- 2GB DDR4 RAM
> > >- eMMC Flash
> > >- OSPI NOR Flash
> > >- external uSD
> > >- Ethernet
> > >- debug UART
> > > 
> > > Product page SoM: https://www.phytec.com/product/phycore-am62x
> > > 
> > > Signed-off-by: Wadim Egorov 
> > > ---
> > >   arch/arm/dts/Makefile |4 +-
> > >   .../arm/dts/k3-am62-phycore-som-ddr4-2gb.dtsi | 2190 +
> > >   arch/arm/dts/k3-am62-phycore-som.dtsi |  324 +++
> > >   .../k3-am625-phyboard-lyra-rdk-u-boot.dtsi|  229 ++
> > >   arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts   |  266 ++
> > >   arch/arm/dts/k3-am625-phycore-som-binman.dtsi |  532 
> > >   arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts  |  134 +
> > >   arch/arm/mach-k3/Kconfig  |1 +
> > >   board/phytec/phycore_am62x/Kconfig|   52 +
> > >   board/phytec/phycore_am62x/MAINTAINERS|   15 +
> > >   board/phytec/phycore_am62x/Makefile   |8 +
> > >   board/phytec/phycore_am62x/board-cfg.yaml |   36 +
> > >   board/phytec/phycore_am62x/phycore-am62x.c|   59 +
> > >   board/phytec/phycore_am62x/phycore_am62x.env  |   23 +
> > >   board/phytec/phycore_am62x/pm-cfg.yaml|   12 +
> > >   board/phytec/phycore_am62x/rm-cfg.yaml| 1088 
> > >   board/phytec/phycore_am62x/sec-cfg.yaml   |  379 +++
> > >   configs/phycore_am62x_a53_defconfig   |  116 +
> > >   configs/phycore_am62x_r5_defconfig|  131 +
> > >   include/configs/phycore_am62x.h   |   15 +
> > >   20 files changed, 5613 insertions(+), 1 deletion(-)
> > >   create mode 100644 arch/arm/dts/k3-am62-phycore-som-ddr4-2gb.dtsi
> > >   create mode 100644 arch/arm/dts/k3-am62-phycore-som.dtsi
> > >   create mode 100644 arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi
> > >   create mode 100644 arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts
> > >   create mode 100644 arch/arm/dts/k3-am625-phycore-som-binman.dtsi
> > >   create mode 100644 arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts
> > >   create mode 100644 board/phytec/phycore_am62x/Kconfig
> > >   create mode 100644 board/phytec/phycore_am62x/MAINTAINERS
> > >   create mode 100644 board/phytec/phycore_am62x/Makefile
> > >   create mode 100644 board/phytec/phycore_am62x/board-cfg.yaml
> > >   create mode 100644 board/phytec/phycore_am62x/phycore-am62x.c
> > >   create mode 100644 board/phytec/phycore_am62x/phycore_am62x.env
> > >   create mode 100644 board/phytec/phycore_am62x/pm-cfg.yaml
> > >   create mode 100644 board/phytec/phycore_am62x/rm-cfg.yaml
> > >   create mode 100644 board/phytec/phycore_am62x/sec-cfg.yaml
> > >   create mode 100644 configs/phycore_am62x_a53_defconfig
> > >   create mode 100644 configs/phycore_am62x_r5_defconfig
> > >   create mode 100644 include/configs/phycore_am62x.h
> > > 
> > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > > index 55aceb51cd..8b371266dc 100644
> > > --- a/arch/arm/dts/Makefile
> > > +++ b/arch/arm/dts/Makefile
> > > @@ -1383,7 +1383,9 @@ dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \
> > > k3-am625-beagleplay.dtb \
> > > k3-am625-r5-beagleplay.dtb \
> > > k3-am625-verdin-wifi-dev.dtb \
> > > -   k3-am625-verdin-r5.dtb
> > > +   k3-am625-verdin-r5.dtb \
> > > +   k3-am625-phyboard-lyra-rdk.dtb \
> > > +   k3-am625-r5-phycore-som-2gb.dtb
> > Thanks for upstreaming Wadim!
> > 
> > However I would prefer that you split all these patches into smaller
> > chunks for each file (preferrably) or group together files that have
> > like 20-30 lines of changes.
> 
> Hm, seems to be difficult and not really reasonable to split like that.
> The big files are generated files or copy pasted from TI's evm. So I do not
> think they need a big attention in the review process.
> 
> - All yaml files are identical to TI's evm
> - k3-am62-phycore-som-ddr4-2gb.dtsi generated with TI's SysConfig DDR Tool
> - k3-am62-phycore-som.dtsi & k3-am625-phyboard-lyra-rdk.dts are 1:1 copies
> from vanilla Linux tree
> 
> The rest is pretty small and reviewable IMO.
> 
> I agree, I should have created a cover letter. I can do that in the next
> series.
> 
> Please let me know if you still want me to split it into more patches.
> But it would be nice if you could tell me how to split it exactly without
> ending up with broken pieces.

Yes, I don't see the value in splitting this up further, but we do need
to note where the upstream dts files are synced from.

-- 
Tom


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[GIT PULL] CLock changes for 2024.01-rc2


The following changes since commit fb428b61819444b9337075f49c72f326f5d12085:

  Merge branch '2023-10-24-assorted-general-fixes-and-updates' (2023-10-24 
19:12:21 -0400)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-clk.git tags/clk-2024.01-rc2

for you to fetch changes up to c4b52fda6924e92c6745351f32c4cafc36034170:

  clk: also handle ENOENT in *_optional functions (2023-11-01 15:14:51 -0400)


Clock changes for 2024.01-rc2

This contains several fixes for the clock core.


Eugen Hristev (1):
  clk: fix count parameter type for clk_release_all

Maksim Kiselev (1):
  clk: use private clk struct in CLK_CCF's enable/disable functions

Nathan Barrett-Morrison (1):
  drivers: clk: Adjust temp var data type to properly match that of struct 
clk_ops

Yang Xiwen (1):
  clk: also handle ENOENT in *_optional functions

 drivers/clk/clk-uclass.c | 13 +++--
 include/clk.h| 12 +++-
 2 files changed, 14 insertions(+), 11 deletions(-)

Re: [PATCH] drivers: clk: Adjust temp var data type to properly match that of struct clk_ops

On Mon, 15 May 2023 15:49:58 -0400, Nathan Barrett-Morrison wrote:
> In commit 5c5992cb90cf ("clk: Add debugging for return values"), a
> temporary storage variable was added around the ops->get_rate() call
> inside clk_get_rate(), so that the result could be passed through
> log_ret.
> 
> This temporary variable was declared as an int, yet when we look in
> struct clk_ops, we can see this needs to be a ulong:
> ulong (*get_rate)(struct clk *clk);
> 
> [...]

Applied, thanks!

[1/1] drivers: clk: Adjust temp var data type to properly match that of struct 
clk_ops
  commit: aed6480fadede2b87103568aaa117a423a1c3fdc

Best regards,
-- 
Sean Anderson

Re: [PATCH] clk: fix count parameter type for clk_release_all

On Mon, 19 Jun 2023 13:47:52 +0300, Eugen Hristev wrote:
> The second parameter for clk_release_all is used as an unsigned
> (which makes sense) but the function prototype declares it as an int.
> This causes warnings/error like such below:
> 
> include/clk.h:422:48: error: conversion to ‘int’ from ‘unsigned int’ may 
> change the sign of the result [-Werror=sign-conversion]
>   422 | return clk_release_all(bulk->clks, bulk->count);
> 
> [...]

Applied, thanks!

[1/1] clk: fix count parameter type for clk_release_all
  commit: b6a56f553318b4c0c8fb8b1ea05f2e15b2662ccb

Best regards,
-- 
Sean Anderson

Re: (subset) [PATCH RESEND 0/5] clk: A few bugfixes/enhancements for CCF

On Fri, 18 Aug 2023 01:03:59 +0800, Yang Xiwen wrote:
> They are found during my development for HiSilicon clock driver. Details
> are in commit logs.
> 
> 

Applied, thanks!

[3/5] clk: also handle ENOENT in *_optional functions
  commit: c4b52fda6924e92c6745351f32c4cafc36034170

Best regards,
-- 
Sean Anderson

Re: [PATCH v1] clk: use private clk struct in CLK_CCF's enable/disable functions

On Wed, 6 Sep 2023 01:16:49 +0300, Maksim Kiselev wrote:
> In clk_enable()/clk_disable() functions, when CCF is activated,
> we must pass a private clk struct to enable()/disable() ops functions.
> Otherwise, the use of a container_of() construction within these ops
> should be banned. Because passing a non-private clk struct to
> container_of() results in an out of range error.
> 
> At the moment, clk-mux, clk-fixed-factor, clk-gate and possibly other
> clocks use container_of() in their enable()/disable() functions.
> Therefore, for these functions to work correclty, private clk struct
> must be passed.
> 
> [...]

Applied, thanks!

[1/1] clk: use private clk struct in CLK_CCF's enable/disable functions
  commit: 0755db477fa7478e2659568bb7da038a9eaabb8d

Best regards,
-- 
Sean Anderson

[PATCH 7/7] arm: mach-k3: j721s2: Move board selection to mach-k3

Currently each set of board targets from a vendor is selected inside
the board directory for that vendor. This has the problem of multiple
targets, one from each vendor, being selectable at the same time.
For instance you can select both TARGET_AM654_A53_EVM and
TARGET_IOT2050_A53 in the same build.

To fix this we need to move the target board choice to a common location
for each parent SoC selection. Do this in arch/arm/mach-k3.

Signed-off-by: Andrew Davis 
---
 arch/arm/mach-k3/Kconfig|  2 +-
 arch/arm/mach-k3/j721s2/Kconfig | 36 +
 board/ti/j721s2/Kconfig | 27 -
 3 files changed, 37 insertions(+), 28 deletions(-)
 create mode 100644 arch/arm/mach-k3/j721s2/Kconfig

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index cd7dc5140ac..06722faf8b6 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -192,6 +192,6 @@ source "arch/arm/mach-k3/am64x/Kconfig"
 source "arch/arm/mach-k3/am62x/Kconfig"
 source "arch/arm/mach-k3/am62ax/Kconfig"
 source "arch/arm/mach-k3/j721e/Kconfig"
-source "board/ti/j721s2/Kconfig"
+source "arch/arm/mach-k3/j721s2/Kconfig"
 
 endif
diff --git a/arch/arm/mach-k3/j721s2/Kconfig b/arch/arm/mach-k3/j721s2/Kconfig
new file mode 100644
index 000..8b54c0401b6
--- /dev/null
+++ b/arch/arm/mach-k3/j721s2/Kconfig
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#  Andrew Davis 
+
+if SOC_K3_J721S2
+
+choice
+   prompt "K3 J721S2 based boards"
+   optional
+
+config TARGET_J721S2_A72_EVM
+   bool "TI K3 based J721S2 EVM running on A72"
+   select ARM64
+   select BOARD_LATE_INIT
+   imply TI_I2C_BOARD_DETECT
+   select SYS_DISABLE_DCACHE_OPS
+   select BINMAN
+
+config TARGET_J721S2_R5_EVM
+   bool "TI K3 based J721S2 EVM running on R5"
+   select CPU_V7R
+   select SYS_THUMB_BUILD
+   select K3_LOAD_SYSFW
+   select RAM
+   select SPL_RAM
+   select K3_DDRSS
+   select BINMAN
+   imply SYS_K3_SPL_ATF
+   imply TI_I2C_BOARD_DETECT
+
+endchoice
+
+source "board/ti/j721s2/Kconfig"
+
+endif
diff --git a/board/ti/j721s2/Kconfig b/board/ti/j721s2/Kconfig
index a4a5d16ba21..40853a8fd66 100644
--- a/board/ti/j721s2/Kconfig
+++ b/board/ti/j721s2/Kconfig
@@ -3,33 +3,6 @@
 # Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
 #  David Huang 
 
-choice
-   prompt "K3 J721S2 board"
-   depends on SOC_K3_J721S2
-   optional
-
-config TARGET_J721S2_A72_EVM
-   bool "TI K3 based J721S2 EVM running on A72"
-   select ARM64
-   select BOARD_LATE_INIT
-   imply TI_I2C_BOARD_DETECT
-   select SYS_DISABLE_DCACHE_OPS
-   select BINMAN
-
-config TARGET_J721S2_R5_EVM
-   bool "TI K3 based J721S2 EVM running on R5"
-   select CPU_V7R
-   select SYS_THUMB_BUILD
-   select K3_LOAD_SYSFW
-   select RAM
-   select SPL_RAM
-   select K3_DDRSS
-   select BINMAN
-   imply SYS_K3_SPL_ATF
-   imply TI_I2C_BOARD_DETECT
-
-endchoice
-
 if TARGET_J721S2_A72_EVM
 
 config SYS_BOARD
-- 
2.39.2

[PATCH 5/7] arm: mach-k3: am62x: Move board selection to mach-k3

Currently each set of board targets from a vendor is selected inside
the board directory for that vendor. This has the problem of multiple
targets, one from each vendor, being selectable at the same time.
For instance you can select both TARGET_AM654_A53_EVM and
TARGET_IOT2050_A53 in the same build.

To fix this we need to move the target board choice to a common location
for each parent SoC selection. Do this in arch/arm/mach-k3.

Signed-off-by: Andrew Davis 
---
 arch/arm/mach-k3/Kconfig  |  4 +--
 arch/arm/mach-k3/am62x/Kconfig| 49 +++
 board/ti/am62x/Kconfig| 23 ---
 board/toradex/verdin-am62/Kconfig | 23 ---
 4 files changed, 51 insertions(+), 48 deletions(-)
 create mode 100644 arch/arm/mach-k3/am62x/Kconfig

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 7293e3cb4fd..a460952f119 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -189,9 +189,9 @@ config K3_X509_SWRV
 
 source "arch/arm/mach-k3/am65x/Kconfig"
 source "arch/arm/mach-k3/am64x/Kconfig"
-source "board/ti/am62x/Kconfig"
+source "arch/arm/mach-k3/am62x/Kconfig"
 source "board/ti/am62ax/Kconfig"
 source "arch/arm/mach-k3/j721e/Kconfig"
 source "board/ti/j721s2/Kconfig"
-source "board/toradex/verdin-am62/Kconfig"
+
 endif
diff --git a/arch/arm/mach-k3/am62x/Kconfig b/arch/arm/mach-k3/am62x/Kconfig
new file mode 100644
index 000..738065e3310
--- /dev/null
+++ b/arch/arm/mach-k3/am62x/Kconfig
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#  Andrew Davis 
+
+if SOC_K3_AM625
+
+choice
+   prompt "K3 AM62x based boards"
+   optional
+
+config TARGET_AM625_A53_EVM
+   bool "TI K3 based AM625 EVM running on A53"
+   select ARM64
+   select BINMAN
+
+config TARGET_AM625_R5_EVM
+   bool "TI K3 based AM625 EVM running on R5"
+   select CPU_V7R
+   select SYS_THUMB_BUILD
+   select K3_LOAD_SYSFW
+   select RAM
+   select SPL_RAM
+   select K3_DDRSS
+   select BINMAN
+   imply SYS_K3_SPL_ATF
+
+config TARGET_VERDIN_AM62_A53
+   bool "Toradex Verdin AM62 running on A53"
+   select ARM64
+   select BINMAN
+
+config TARGET_VERDIN_AM62_R5
+   bool "Toradex Verdin AM62 running on R5"
+   select CPU_V7R
+   select SYS_THUMB_BUILD
+   select K3_LOAD_SYSFW
+   select RAM
+   select SPL_RAM
+   select K3_DDRSS
+   select BINMAN
+   imply SYS_K3_SPL_ATF
+
+endchoice
+
+source "board/ti/am62x/Kconfig"
+source "board/toradex/verdin-am62/Kconfig"
+
+endif
diff --git a/board/ti/am62x/Kconfig b/board/ti/am62x/Kconfig
index b4b70337d18..610dacfdc08 100644
--- a/board/ti/am62x/Kconfig
+++ b/board/ti/am62x/Kconfig
@@ -3,29 +3,6 @@
 # Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
 #  Suman Anna 
 
-choice
-   prompt "TI K3 AM62x based boards"
-   depends on SOC_K3_AM625
-   optional
-
-config TARGET_AM625_A53_EVM
-   bool "TI K3 based AM625 EVM running on A53"
-   select ARM64
-   select BINMAN
-
-config TARGET_AM625_R5_EVM
-   bool "TI K3 based AM625 EVM running on R5"
-   select CPU_V7R
-   select SYS_THUMB_BUILD
-   select K3_LOAD_SYSFW
-   select RAM
-   select SPL_RAM
-   select K3_DDRSS
-   select BINMAN
-   imply SYS_K3_SPL_ATF
-
-endchoice
-
 if TARGET_AM625_A53_EVM
 
 config SYS_BOARD
diff --git a/board/toradex/verdin-am62/Kconfig 
b/board/toradex/verdin-am62/Kconfig
index abc2984f250..fd65a96b3df 100644
--- a/board/toradex/verdin-am62/Kconfig
+++ b/board/toradex/verdin-am62/Kconfig
@@ -3,29 +3,6 @@
 # Copyright 2023 Toradex
 #
 
-choice
-   prompt "Toradex Verdin AM62 based boards"
-   depends on SOC_K3_AM625
-   optional
-
-config TARGET_VERDIN_AM62_A53
-   bool "Toradex Verdin AM62 running on A53"
-   select ARM64
-   select BINMAN
-
-config TARGET_VERDIN_AM62_R5
-   bool "Toradex Verdin AM62 running on R5"
-   select CPU_V7R
-   select SYS_THUMB_BUILD
-   select K3_LOAD_SYSFW
-   select RAM
-   select SPL_RAM
-   select K3_DDRSS
-   select BINMAN
-   imply SYS_K3_SPL_ATF
-
-endchoice
-
 if TARGET_VERDIN_AM62_A53
 
 config SYS_BOARD
-- 
2.39.2

[PATCH 3/7] arm: mach-k3: am65x: Move board selection to mach-k3

Currently each set of board targets from a vendor is selected inside
the board directory for that vendor. This has the problem of multiple
targets, one from each vendor, being selectable at the same time.
For instance you can select both TARGET_AM654_A53_EVM and
TARGET_IOT2050_A53 in the same build.

To fix this we need to move the target board choice to a common location
for each parent SoC selection. Do this in arch/arm/mach-k3.

Signed-off-by: Andrew Davis 
---
 arch/arm/mach-k3/Kconfig |  3 +-
 {board/ti => arch/arm/mach-k3}/am65x/Kconfig | 46 +++-
 board/siemens/iot2050/Kconfig| 10 -
 board/ti/am65x/Kconfig   | 25 ---
 4 files changed, 17 insertions(+), 67 deletions(-)
 copy {board/ti => arch/arm/mach-k3}/am65x/Kconfig (52%)

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index d5fdabe4293..01889e9d7cf 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -187,12 +187,11 @@ config K3_X509_SWRV
help
  SWRV for X509 certificate used for boot images
 
-source "board/ti/am65x/Kconfig"
+source "arch/arm/mach-k3/am65x/Kconfig"
 source "board/ti/am64x/Kconfig"
 source "board/ti/am62x/Kconfig"
 source "board/ti/am62ax/Kconfig"
 source "arch/arm/mach-k3/j721e/Kconfig"
-source "board/siemens/iot2050/Kconfig"
 source "board/ti/j721s2/Kconfig"
 source "board/toradex/verdin-am62/Kconfig"
 endif
diff --git a/board/ti/am65x/Kconfig b/arch/arm/mach-k3/am65x/Kconfig
similarity index 52%
copy from board/ti/am65x/Kconfig
copy to arch/arm/mach-k3/am65x/Kconfig
index 7c1bcfc899c..f17b641e136 100644
--- a/board/ti/am65x/Kconfig
+++ b/arch/arm/mach-k3/am65x/Kconfig
@@ -1,11 +1,12 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
-# Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
-#  Lokesh Vutla 
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#  Andrew Davis 
+
+if SOC_K3_AM654
 
 choice
prompt "K3 AM65 based boards"
-   depends on SOC_K3_AM654
optional
 
 config TARGET_AM654_A53_EVM
@@ -26,34 +27,19 @@ config TARGET_AM654_R5_EVM
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
 
-endchoice
-
-if TARGET_AM654_A53_EVM
-
-config SYS_BOARD
-   default "am65x"
-
-config SYS_VENDOR
-   default "ti"
-
-config SYS_CONFIG_NAME
-   default "am65x_evm"
-
-source "board/ti/common/Kconfig"
-
-endif
-
-if TARGET_AM654_R5_EVM
-
-config SYS_BOARD
-   default "am65x"
-
-config SYS_VENDOR
-   default "ti"
+config TARGET_IOT2050_A53
+   bool "IOT2050 running on A53"
+   depends on SOC_K3_AM654
+   select ARM64
+   select BOARD_LATE_INIT
+   select SYS_DISABLE_DCACHE_OPS
+   select BINMAN
+   help
+ This builds U-Boot for the IOT2050 devices.
 
-config SYS_CONFIG_NAME
-   default "am65x_evm"
+endchoice
 
-source "board/ti/common/Kconfig"
+source "board/ti/am65x/Kconfig"
+source "board/siemens/iot2050/Kconfig"
 
 endif
diff --git a/board/siemens/iot2050/Kconfig b/board/siemens/iot2050/Kconfig
index 737cda64744..96dcfc41000 100644
--- a/board/siemens/iot2050/Kconfig
+++ b/board/siemens/iot2050/Kconfig
@@ -6,16 +6,6 @@
 #   Le Jin 
 #   Jan Kiszka 
 
-config TARGET_IOT2050_A53
-   bool "IOT2050 running on A53"
-   depends on SOC_K3_AM654
-   select ARM64
-   select BOARD_LATE_INIT
-   select SYS_DISABLE_DCACHE_OPS
-   select BINMAN
-   help
- This builds U-Boot for the IOT2050 devices.
-
 if TARGET_IOT2050_A53
 
 config SYS_BOARD
diff --git a/board/ti/am65x/Kconfig b/board/ti/am65x/Kconfig
index 7c1bcfc899c..9102f1d54aa 100644
--- a/board/ti/am65x/Kconfig
+++ b/board/ti/am65x/Kconfig
@@ -3,31 +3,6 @@
 # Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
 #  Lokesh Vutla 
 
-choice
-   prompt "K3 AM65 based boards"
-   depends on SOC_K3_AM654
-   optional
-
-config TARGET_AM654_A53_EVM
-   bool "TI K3 based AM654 EVM running on A53"
-   select ARM64
-   select SYS_DISABLE_DCACHE_OPS
-   select BOARD_LATE_INIT
-   select BINMAN
-   imply TI_I2C_BOARD_DETECT
-
-config TARGET_AM654_R5_EVM
-   bool "TI K3 based AM654 EVM running on R5"
-   select CPU_V7R
-   select SYS_THUMB_BUILD
-   select K3_LOAD_SYSFW
-   select K3_AM654_DDRSS
-   select BINMAN
-   imply SYS_K3_SPL_ATF
-   imply TI_I2C_BOARD_DETECT
-
-endchoice
-
 if TARGET_AM654_A53_EVM
 
 config SYS_BOARD
-- 
2.39.2

[PATCH 1/7] board: ti: Add dependency from TARGET selection to SOC

Currently the K3 selection for TARGET boards does not depend on the SoC
for which it is based. This leds to the odd ability to select for instance
both SOC_K3_AM625 and TARGET_J721E_A72_EVM.

To fix this the target choice should depend on the matching SOC config.

Signed-off-by: Andrew Davis 
---
 board/siemens/iot2050/Kconfig | 2 +-
 board/ti/am62ax/Kconfig   | 1 +
 board/ti/am62x/Kconfig| 1 +
 board/ti/am64x/Kconfig| 1 +
 board/ti/am65x/Kconfig| 1 +
 board/ti/j721e/Kconfig| 1 +
 board/ti/j721s2/Kconfig   | 1 +
 board/toradex/verdin-am62/Kconfig | 1 +
 8 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/board/siemens/iot2050/Kconfig b/board/siemens/iot2050/Kconfig
index a6170aae807..737cda64744 100644
--- a/board/siemens/iot2050/Kconfig
+++ b/board/siemens/iot2050/Kconfig
@@ -8,8 +8,8 @@
 
 config TARGET_IOT2050_A53
bool "IOT2050 running on A53"
+   depends on SOC_K3_AM654
select ARM64
-   select SOC_K3_AM654
select BOARD_LATE_INIT
select SYS_DISABLE_DCACHE_OPS
select BINMAN
diff --git a/board/ti/am62ax/Kconfig b/board/ti/am62ax/Kconfig
index 61f289faccd..30e1a068660 100644
--- a/board/ti/am62ax/Kconfig
+++ b/board/ti/am62ax/Kconfig
@@ -5,6 +5,7 @@
 
 choice
prompt "TI K3 AM62Ax based boards"
+   depends on SOC_K3_AM62A7
optional
 
 config TARGET_AM62A7_A53_EVM
diff --git a/board/ti/am62x/Kconfig b/board/ti/am62x/Kconfig
index cd17e939e5a..b4b70337d18 100644
--- a/board/ti/am62x/Kconfig
+++ b/board/ti/am62x/Kconfig
@@ -5,6 +5,7 @@
 
 choice
prompt "TI K3 AM62x based boards"
+   depends on SOC_K3_AM625
optional
 
 config TARGET_AM625_A53_EVM
diff --git a/board/ti/am64x/Kconfig b/board/ti/am64x/Kconfig
index fb596e4adfc..2dbc6197b75 100644
--- a/board/ti/am64x/Kconfig
+++ b/board/ti/am64x/Kconfig
@@ -4,6 +4,7 @@
 
 choice
prompt "K3 AM64 based boards"
+   depends on SOC_K3_AM642
optional
 
 config TARGET_AM642_A53_EVM
diff --git a/board/ti/am65x/Kconfig b/board/ti/am65x/Kconfig
index 5fd19d652a6..7c1bcfc899c 100644
--- a/board/ti/am65x/Kconfig
+++ b/board/ti/am65x/Kconfig
@@ -5,6 +5,7 @@
 
 choice
prompt "K3 AM65 based boards"
+   depends on SOC_K3_AM654
optional
 
 config TARGET_AM654_A53_EVM
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig
index e6cb21f77bd..23867ad8e04 100644
--- a/board/ti/j721e/Kconfig
+++ b/board/ti/j721e/Kconfig
@@ -5,6 +5,7 @@
 
 choice
prompt "K3 J721E based boards"
+   depends on SOC_K3_J721E
optional
 
 config TARGET_J721E_A72_EVM
diff --git a/board/ti/j721s2/Kconfig b/board/ti/j721s2/Kconfig
index f6d1cb57653..a4a5d16ba21 100644
--- a/board/ti/j721s2/Kconfig
+++ b/board/ti/j721s2/Kconfig
@@ -5,6 +5,7 @@
 
 choice
prompt "K3 J721S2 board"
+   depends on SOC_K3_J721S2
optional
 
 config TARGET_J721S2_A72_EVM
diff --git a/board/toradex/verdin-am62/Kconfig 
b/board/toradex/verdin-am62/Kconfig
index e7522244070..abc2984f250 100644
--- a/board/toradex/verdin-am62/Kconfig
+++ b/board/toradex/verdin-am62/Kconfig
@@ -5,6 +5,7 @@
 
 choice
prompt "Toradex Verdin AM62 based boards"
+   depends on SOC_K3_AM625
optional
 
 config TARGET_VERDIN_AM62_A53
-- 
2.39.2

[PATCH 6/7] arm: mach-k3: am62ax: Move board selection to mach-k3

Currently each set of board targets from a vendor is selected inside
the board directory for that vendor. This has the problem of multiple
targets, one from each vendor, being selectable at the same time.
For instance you can select both TARGET_AM654_A53_EVM and
TARGET_IOT2050_A53 in the same build.

To fix this we need to move the target board choice to a common location
for each parent SoC selection. Do this in arch/arm/mach-k3.

Signed-off-by: Andrew Davis 
---
 arch/arm/mach-k3/Kconfig  |  2 +-
 {board/ti => arch/arm/mach-k3}/am62ax/Kconfig | 29 ---
 board/ti/am62ax/Kconfig   | 27 -
 3 files changed, 7 insertions(+), 51 deletions(-)
 copy {board/ti => arch/arm/mach-k3}/am62ax/Kconfig (52%)

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index a460952f119..cd7dc5140ac 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -190,7 +190,7 @@ config K3_X509_SWRV
 source "arch/arm/mach-k3/am65x/Kconfig"
 source "arch/arm/mach-k3/am64x/Kconfig"
 source "arch/arm/mach-k3/am62x/Kconfig"
-source "board/ti/am62ax/Kconfig"
+source "arch/arm/mach-k3/am62ax/Kconfig"
 source "arch/arm/mach-k3/j721e/Kconfig"
 source "board/ti/j721s2/Kconfig"
 
diff --git a/board/ti/am62ax/Kconfig b/arch/arm/mach-k3/am62ax/Kconfig
similarity index 52%
copy from board/ti/am62ax/Kconfig
copy to arch/arm/mach-k3/am62ax/Kconfig
index 30e1a068660..c5f1ef87126 100644
--- a/board/ti/am62ax/Kconfig
+++ b/arch/arm/mach-k3/am62ax/Kconfig
@@ -1,11 +1,12 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
-# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
-#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#  Andrew Davis 
+
+if SOC_K3_AM62A7
 
 choice
-   prompt "TI K3 AM62Ax based boards"
-   depends on SOC_K3_AM62A7
+   prompt "K3 AM62Ax based boards"
optional
 
 config TARGET_AM62A7_A53_EVM
@@ -30,24 +31,6 @@ config TARGET_AM62A7_R5_EVM
 
 endchoice
 
-if TARGET_AM62A7_R5_EVM || TARGET_AM62A7_A53_EVM
-
-config SYS_BOARD
-   default "am62ax"
-
-config SYS_VENDOR
-   default "ti"
-
-config SYS_CONFIG_NAME
-   default "am62ax_evm"
-
-source "board/ti/common/Kconfig"
-
-endif
-
-if TARGET_AM62A7_R5_EVM
-
-config SPL_LDSCRIPT
-   default "arch/arm/mach-omap2/u-boot-spl.lds"
+source "board/ti/am62ax/Kconfig"
 
 endif
diff --git a/board/ti/am62ax/Kconfig b/board/ti/am62ax/Kconfig
index 30e1a068660..51e7b3e0eab 100644
--- a/board/ti/am62ax/Kconfig
+++ b/board/ti/am62ax/Kconfig
@@ -3,33 +3,6 @@
 # Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
 #
 
-choice
-   prompt "TI K3 AM62Ax based boards"
-   depends on SOC_K3_AM62A7
-   optional
-
-config TARGET_AM62A7_A53_EVM
-   bool "TI K3 based AM62A7 EVM running on A53"
-   select ARM64
-   select BINMAN
-   imply BOARD
-   imply SPL_BOARD
-   imply TI_I2C_BOARD_DETECT
-
-config TARGET_AM62A7_R5_EVM
-   bool "TI K3 based AM62A7 EVM running on R5"
-   select CPU_V7R
-   select SYS_THUMB_BUILD
-   select K3_LOAD_SYSFW
-   select RAM
-   select SPL_RAM
-   select K3_DDRSS
-   select BINMAN
-   imply SYS_K3_SPL_ATF
-   imply TI_I2C_BOARD_DETECT
-
-endchoice
-
 if TARGET_AM62A7_R5_EVM || TARGET_AM62A7_A53_EVM
 
 config SYS_BOARD
-- 
2.39.2

[PATCH 4/7] arm: mach-k3: am64x: Move board selection to mach-k3

Currently each set of board targets from a vendor is selected inside
the board directory for that vendor. This has the problem of multiple
targets, one from each vendor, being selectable at the same time.
For instance you can select both TARGET_AM654_A53_EVM and
TARGET_IOT2050_A53 in the same build.

To fix this we need to move the target board choice to a common location
for each parent SoC selection. Do this in arch/arm/mach-k3.

Signed-off-by: Andrew Davis 
---
 arch/arm/mach-k3/Kconfig |  2 +-
 {board/ti => arch/arm/mach-k3}/am64x/Kconfig | 34 +++-
 board/ti/am64x/Kconfig   | 27 
 3 files changed, 6 insertions(+), 57 deletions(-)
 copy {board/ti => arch/arm/mach-k3}/am64x/Kconfig (51%)

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 01889e9d7cf..7293e3cb4fd 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -188,7 +188,7 @@ config K3_X509_SWRV
  SWRV for X509 certificate used for boot images
 
 source "arch/arm/mach-k3/am65x/Kconfig"
-source "board/ti/am64x/Kconfig"
+source "arch/arm/mach-k3/am64x/Kconfig"
 source "board/ti/am62x/Kconfig"
 source "board/ti/am62ax/Kconfig"
 source "arch/arm/mach-k3/j721e/Kconfig"
diff --git a/board/ti/am64x/Kconfig b/arch/arm/mach-k3/am64x/Kconfig
similarity index 51%
copy from board/ti/am64x/Kconfig
copy to arch/arm/mach-k3/am64x/Kconfig
index 2dbc6197b75..6f7b0039615 100644
--- a/board/ti/am64x/Kconfig
+++ b/arch/arm/mach-k3/am64x/Kconfig
@@ -1,10 +1,12 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
-# Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#  Andrew Davis 
+
+if SOC_K3_AM642
 
 choice
prompt "K3 AM64 based boards"
-   depends on SOC_K3_AM642
optional
 
 config TARGET_AM642_A53_EVM
@@ -29,32 +31,6 @@ config TARGET_AM642_R5_EVM
 
 endchoice
 
-if TARGET_AM642_A53_EVM
-
-config SYS_BOARD
-   default "am64x"
-
-config SYS_VENDOR
-   default "ti"
-
-config SYS_CONFIG_NAME
-   default "am64x_evm"
-
-source "board/ti/common/Kconfig"
-
-endif
-
-if TARGET_AM642_R5_EVM
-
-config SYS_BOARD
-   default "am64x"
-
-config SYS_VENDOR
-   default "ti"
-
-config SYS_CONFIG_NAME
-   default "am64x_evm"
-
-source "board/ti/common/Kconfig"
+source "board/ti/am64x/Kconfig"
 
 endif
diff --git a/board/ti/am64x/Kconfig b/board/ti/am64x/Kconfig
index 2dbc6197b75..b873476a9d5 100644
--- a/board/ti/am64x/Kconfig
+++ b/board/ti/am64x/Kconfig
@@ -2,33 +2,6 @@
 #
 # Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
 
-choice
-   prompt "K3 AM64 based boards"
-   depends on SOC_K3_AM642
-   optional
-
-config TARGET_AM642_A53_EVM
-   bool "TI K3 based AM642 EVM running on A53"
-   select ARM64
-   select BINMAN
-   imply BOARD
-   imply SPL_BOARD
-   imply TI_I2C_BOARD_DETECT
-
-config TARGET_AM642_R5_EVM
-   bool "TI K3 based AM642 EVM running on R5"
-   select CPU_V7R
-   select SYS_THUMB_BUILD
-   select K3_LOAD_SYSFW
-   select RAM
-   select SPL_RAM
-   select K3_DDRSS
-   select BINMAN
-   imply SYS_K3_SPL_ATF
-   imply TI_I2C_BOARD_DETECT
-
-endchoice
-
 if TARGET_AM642_A53_EVM
 
 config SYS_BOARD
-- 
2.39.2

[PATCH 2/7] arm: mach-k3: j721e: Move board selection to mach-k3

Currently each set of board targets from a vendor is selected inside
the board directory for that vendor. This has the problem of multiple
targets, one from each vendor, being selectable at the same time.
For instance you can select both TARGET_AM654_A53_EVM and
TARGET_IOT2050_A53 in the same build.

To fix this we need to move the target board choice to a common location
for each parent SoC selection. Do this in arch/arm/mach-k3.

Signed-off-by: Andrew Davis 
---
 arch/arm/mach-k3/Kconfig   |  2 +-
 arch/arm/mach-k3/j721e/Kconfig | 56 ++
 board/ti/j721e/Kconfig | 47 
 3 files changed, 57 insertions(+), 48 deletions(-)
 create mode 100644 arch/arm/mach-k3/j721e/Kconfig

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 9168bf842dc..d5fdabe4293 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -191,7 +191,7 @@ source "board/ti/am65x/Kconfig"
 source "board/ti/am64x/Kconfig"
 source "board/ti/am62x/Kconfig"
 source "board/ti/am62ax/Kconfig"
-source "board/ti/j721e/Kconfig"
+source "arch/arm/mach-k3/j721e/Kconfig"
 source "board/siemens/iot2050/Kconfig"
 source "board/ti/j721s2/Kconfig"
 source "board/toradex/verdin-am62/Kconfig"
diff --git a/arch/arm/mach-k3/j721e/Kconfig b/arch/arm/mach-k3/j721e/Kconfig
new file mode 100644
index 000..07cdb5cb517
--- /dev/null
+++ b/arch/arm/mach-k3/j721e/Kconfig
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#  Andrew Davis 
+
+if SOC_K3_J721E
+
+choice
+   prompt "K3 J721E based boards"
+   optional
+
+config TARGET_J721E_A72_EVM
+   bool "TI K3 based J721E EVM running on A72"
+   select ARM64
+   select BOARD_LATE_INIT
+   imply TI_I2C_BOARD_DETECT
+   select SYS_DISABLE_DCACHE_OPS
+   select BINMAN
+
+config TARGET_J721E_R5_EVM
+   bool "TI K3 based J721E EVM running on R5"
+   select CPU_V7R
+   select SYS_THUMB_BUILD
+   select K3_LOAD_SYSFW
+   select RAM
+   select SPL_RAM
+   select K3_DDRSS
+   select BINMAN
+   imply SYS_K3_SPL_ATF
+   imply TI_I2C_BOARD_DETECT
+
+config TARGET_J7200_A72_EVM
+   bool "TI K3 based J7200 EVM running on A72"
+   select ARM64
+   select BOARD_LATE_INIT
+   imply TI_I2C_BOARD_DETECT
+   select SYS_DISABLE_DCACHE_OPS
+   select BINMAN
+
+config TARGET_J7200_R5_EVM
+   bool "TI K3 based J7200 EVM running on R5"
+   select CPU_V7R
+   select SYS_THUMB_BUILD
+   select K3_LOAD_SYSFW
+   select RAM
+   select SPL_RAM
+   select K3_DDRSS
+   select BINMAN
+   imply SYS_K3_SPL_ATF
+   imply TI_I2C_BOARD_DETECT
+
+endchoice
+
+source "board/ti/j721e/Kconfig"
+
+endif
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig
index 23867ad8e04..c18ba5a2745 100644
--- a/board/ti/j721e/Kconfig
+++ b/board/ti/j721e/Kconfig
@@ -3,53 +3,6 @@
 # Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
 #  Lokesh Vutla 
 
-choice
-   prompt "K3 J721E based boards"
-   depends on SOC_K3_J721E
-   optional
-
-config TARGET_J721E_A72_EVM
-   bool "TI K3 based J721E EVM running on A72"
-   select ARM64
-   select BOARD_LATE_INIT
-   imply TI_I2C_BOARD_DETECT
-   select SYS_DISABLE_DCACHE_OPS
-   select BINMAN
-
-config TARGET_J721E_R5_EVM
-   bool "TI K3 based J721E EVM running on R5"
-   select CPU_V7R
-   select SYS_THUMB_BUILD
-   select K3_LOAD_SYSFW
-   select RAM
-   select SPL_RAM
-   select K3_DDRSS
-   select BINMAN
-   imply SYS_K3_SPL_ATF
-   imply TI_I2C_BOARD_DETECT
-
-config TARGET_J7200_A72_EVM
-   bool "TI K3 based J7200 EVM running on A72"
-   select ARM64
-   select BOARD_LATE_INIT
-   imply TI_I2C_BOARD_DETECT
-   select SYS_DISABLE_DCACHE_OPS
-   select BINMAN
-
-config TARGET_J7200_R5_EVM
-   bool "TI K3 based J7200 EVM running on R5"
-   select CPU_V7R
-   select SYS_THUMB_BUILD
-   select K3_LOAD_SYSFW
-   select RAM
-   select SPL_RAM
-   select K3_DDRSS
-   select BINMAN
-   imply SYS_K3_SPL_ATF
-   imply TI_I2C_BOARD_DETECT
-
-endchoice
-
 if TARGET_J721E_A72_EVM
 
 config SYS_BOARD
-- 
2.39.2

Re: [PATCH RESEND 5/5] clk: ccf: call clock provided ops directly for endisable()

On 11/2/2023 2:50 AM, Yang Xiwen wrote:
> On 11/2/2023 2:19 AM, Sean Anderson wrote:
>> On 8/17/23 13:04, Yang Xiwen via B4 Relay wrote:
>>> From: Yang Xiwen 
>>>
>>> Calling into CCF framework will cause a clock being enabled twice
>>> instead of once (clk->enable_count becomes 2 rather than 1), thus making
>>> it hard to disable (needs to call clk_disable() twice).
>>> Fix that by calling clock provided ops directly.
>>
>> Can you describe this scenario more? From what I can tell, clk_enable
>> doesn't
>> increment enable_count for CCF clocks.
>>
> Well, it's hard to describe clearly. But I can only tell this patch
> fixed the issue when i was trying to write an Ethernet driver[1] which
> calls clk_disable() and expects the clock to be disabled after that.
> Also I found that CCF driver does not have a corresponding test file. I
> will try to write a test for that in next release.
Okay, fine. I read the source again and let me try to explain the whole
thing to you briefly. Let's see what happens when we are calling
clk_enable(gate).

The source of clk.c is listed below and labeled for clarity:

```
1   if (CONFIG_IS_ENABLED(CLK_CCF)) {
2   /* Take id 0 as a non-valid clk, such as dummy */
3   if (clk->id && !clk_get_by_id(clk->id, )) {
4   if (clkp->enable_count) {
5   clkp->enable_count++;
6   return 0;
7   }
8   if (clkp->dev->parent &&
9   device_get_uclass_id(clkp->dev->parent) == 
UCLASS_CLK) {
10  ret = 
clk_enable(dev_get_clk_ptr(clkp->dev->parent));
11  if (ret) {
12  printf("Enable %s failed\n",
13 clkp->dev->parent->name);
14  return ret;
15  }
16  }
17  }
18
19  if (ops->enable) {
20  ret = ops->enable(clk);
21  if (ret) {
22  printf("Enable %s failed\n", clk->dev->name);
23  return ret;
24  }
25  }
26  if (clkp)
27  clkp->enable_count++;
28  } else {
29  if (!ops->enable)
30  return -ENOSYS;
31  return ops->enable(clk);
```

The following steps are executed:

1. Actually, a "fake" clk is passed to clk_enable() and only clk->id is
valid. The actual clk is "clkp";
2. Initially, we runs till `ret = ops->enable(clk)`(line 20), i.e.
ccf_clk_enable(clk);
3. Thankfully, ccf_clk_enable() calls clk_get_by_id() to get the real
clk and call clk_enable(clkp) again so we won't have an endless loop here.
4. So ops->enable(clk) actually equals to clk_enable(clkp). It's obvious
that there is a `clkp->enable_count++` inside the nested function call
since it's still 0. Now it becomes 1;
5. The nested clk_enable(clkp) now returns to the outer clk_enable(clk);
6. Unfortunately, there is a `if (clkp) clkp->enable_count++;`(line 26)
afterwards. Now it becomes 2.
7. Finally, we got a clk being enabled twice. "clkp->enable_count" is 2 now.

Obviously it's not the intended behavior. We can either fix clk_enable()
or ccf_clk_endisable() to resolve this. But I choose to touch
ccf_clk_endisable() since it's less commonly used.
>> --Sean
>>
>>> Signed-off-by: Yang Xiwen 
>>> ---
>>>   drivers/clk/clk.c | 12 +++-
>>>   1 file changed, 11 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
>>> index a38daaac0c..00d082c46f 100644
>>> --- a/drivers/clk/clk.c
>>> +++ b/drivers/clk/clk.c
>>> @@ -14,6 +14,7 @@
>>>   #include 
>>>   #include 
>>>   #include 
>>> +#include 
>>> int clk_register(struct clk *clk, const char *drv_name,
>>>const char *name, const char *parent_name)
>>> @@ -115,11 +116,20 @@ int ccf_clk_set_parent(struct clk *clk, struct
>>> clk *parent)
>>>   static int ccf_clk_endisable(struct clk *clk, bool enable)
>>>   {
>>>   struct clk *c;
>>> +const struct clk_ops *ops;
>>>   int err = clk_get_by_id(clk->id, );
>>> if (err)
>>>   return err;
>>> -return enable ? clk_enable(c) : clk_disable(c);
>>> +else
>>> +ops = clk_dev_ops(c->dev);
>>> +
>>> +if (enable && ops->enable)
>>> +return ops->enable(c);
>>> +else if (!enable && ops->disable)
>>> +return ops->disable(c);
>>> +
>>> +return -ENOSYS;
>>>   }
>>> int ccf_clk_enable(struct clk *clk)
>>>
>>
> [1]
> https://lore.kernel.org/all/20230814-wip-hisi_femac-trunk-v2-0-1e29f4005...@outlook.com/
> 

-- 
Best regards,
Yang Xiwen

Re: U-boot env in binary format

Hi Simon,

On Tue, 31 Oct 2023 at 17:07, SIMON BABY  wrote:
>
> Hello ,
> Can I know if I could generate uboot env file in binary format as part of my 
> build process ?
> Currently it generate as a text file .

There is the tools/mkenvimage program:

mkenvimage [-h] [-r] [-b] [-p ] -s 
-o  

This tool takes a key=value input file (same as would a `printenv'
show) and generates the corresponding environment image, ready to be
flashed.

The input file is in format:
key1=value1
key2=value2
...
Empty lines are skipped, and lines with a # in the first
column are treated as comments (also skipped).
-r : the environment has multiple copies in flash
-b : the target is big endian (default is little endian)
-p  : fill the image with  bytes instead of 0xff bytes
-V : print version information and exit

If the input file is "-", data is read from standard input

You can build with 'make u-boot-initial-env' to get a tool called
printinitialenv to run, which emits the environment. Or you can look
in include/generated/ to see the env files from the build.

If you would like to send a documentation patch, it could go here:

https://u-boot.readthedocs.io/en/latest/usage/environment.html

(in the source tree this is doc/usage/environment.html)

Regards,
Simon

Re: [PATCH v3 0/2] rng: Provide a RNG based on the RISC-V Zkr ISA extension

2023-11-01 Thread Heinrich Schuchardt

On 11/1/23 19:05, Andre Przywara wrote:

On Tue, 31 Oct 2023 14:55:50 +0200
Heinrich Schuchardt wrote:

Hi Heinrich,

The Zkr ISA extension (ratified Nov 2021) introduced the seed CSR. It
provides an interface to a physical entropy source.

A RNG driver based on the seed CSR is provided. It depends on
mseccfg.sseed being set in the SBI firmware.

As you might have seen, I added a similar driver for the respective Arm
functionality:
https://lore.kernel.org/u-boot/20230830113230.3925868-1-andre.przyw...@arm.com/

And I see that you seem to use the same mechanism to probe and init the
driver: U_BOOT_DRVINFO and fail in probe() if the feature is not
implemented.
One downside of this approach is that the driver is always loaded (and
visible in the DM tree), even with the feature not being available.
That doesn't seem too much of a problem on the first glance, but it
occupies a device number, and any subsequent other DM_RNG devices
(like virtio-rng) typically get higher device numbers. So without
the feature, but with virtio-rng, I get:
VExpress64# rng 0
No RNG device
VExpress64# rng 1
: f3 88 b6 d4 24 da 49 ca 49 f7 9e 66 5f 12 07 b2 $.I.I..f_...

Essentially in any case were you have multiple drivers for the same
device using uclass_get_device(, 0, ) and uclass_find_first_device()
will only give you the first bound device and not the first successfully
probed device. Furthermore neither of this functions causes probing.
This is not restricted to the RNG drivers but could also happen with
multiple TPM drivers or multiple watchdogs.

This patch is related to the problem:

[PATCH v1] rng: add dm_rng_read_default() helper
https://lore.kernel.org/u-boot/4e28a388-f5b1-4cf7-b0e3-b12a876d0...@gmx.de/T/#me44263ec9141e3ea65ee232aa9a411fc6201bd95

We have weak function platform_get_rng_device() which should be moved to
drivers/rng/rng-uclass.c.

We could add a function to drivers/core/uclass.c to retrieve the first
successfully probed device. Another approach would be to implement
uclass_driver.post_probe() in the RNG uclass to take note of the first
successfully probed device.

@Simon:
What would make most sense from a DM design standpoint?

Best regards

Heinrich

Now the EFI code always picks RNG device 0, which means we don't get
entropy in this case.

Do you have any idea how to solve this?
Maybe EFI tries to probe further - but that sounds arbitrary.
Or we find another way for probing the device, maybe via some artificial
CPU feature "bus"? There is UCLASS_CPU, but that doesn't look helpful?

If anyone has any idea, I'd be grateful.

Cheers,
Andre

If the seed CSR readable, is not determinable by S-mode without risking
an exception. For safe driver probing allow to resume via a longjmp
after an exception.

As the driver depends on mseccfg.sseed=1 we should wait with merging the
driver until a decision has been taken in the RISC-V PRS TG on prescribing
this.

Setting mseccfg.sseed=1 is queued for OpenSBI [1]. This has been discussed
in the RISC-V Boot & Runtime Services TG. Standardization has to be pursued
via the upcoming platform specification.

A bug fix for QEMU relating to the Zkr extension is available in [2].

A similar Linux driver has been proposed in [3].

[1] lib: sbi: Configure seed bits when MSECCFG is readable

https://patchwork.ozlabs.org/project/opensbi/patch/20230712083254.1585244-1-sa...@rivosinc.com/
[2] [PATCH v2 1/1] target/riscv: correct csr_ops[CSR_MSECCFG]

https://lore.kernel.org/qemu-devel/20231030102105.19501-1-heinrich.schucha...@canonical.com/
[3] [PATCH v4 4/4] RISC-V: Implement archrandom when Zkr is available

https://lore.kernel.org/linux-riscv/20230712084134.1648008-5-sa...@rivosinc.com/

v3:
Add API documentation.
v2:
Catch exception if mseccfg.sseed=0.

Heinrich Schuchardt (2):
riscv: allow resume after exception
rng: Provide a RNG based on the RISC-V Zkr ISA extension

[PATCH 8/8] board: rzg2l: Drop

In line with changes elsewhere, drop inclusion of the common header.

Signed-off-by: Paul Barker 
---
 board/renesas/rzg2l/rzg2l.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/board/renesas/rzg2l/rzg2l.c b/board/renesas/rzg2l/rzg2l.c
index 755747e665cb..73201a8c69e5 100644
--- a/board/renesas/rzg2l/rzg2l.c
+++ b/board/renesas/rzg2l/rzg2l.c
@@ -4,7 +4,6 @@
  * Copyright (C) 2023 Renesas Electronics Corporation
  */
 
-#include 
 #include 
 #include 
 
-- 
2.39.2

[PATCH 7/8] clk: rzg2l: Drop

In line with changes elsewhere, drop inclusion of the common header.

Signed-off-by: Paul Barker 
---
 drivers/clk/renesas/r9a07g044-cpg.c | 1 -
 drivers/clk/renesas/rzg2l-cpg.c | 1 -
 2 files changed, 2 deletions(-)

diff --git a/drivers/clk/renesas/r9a07g044-cpg.c 
b/drivers/clk/renesas/r9a07g044-cpg.c
index 2336028a7367..c8baad1a6c8d 100644
--- a/drivers/clk/renesas/r9a07g044-cpg.c
+++ b/drivers/clk/renesas/r9a07g044-cpg.c
@@ -5,7 +5,6 @@
  * Copyright (C) 2021-2023 Renesas Electronics Corp.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index 3295ebb90ba2..e54508c35ce2 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -11,7 +11,6 @@
  * Copyright (C) 2015 Renesas Electronics Corp.
  */
 
-#include 
 #include 
 #include 
 #include 
-- 
2.39.2

[PATCH 6/8] gpio: rzg2l: Drop

In line with changes elsewhere, drop inclusion of the common header.

Signed-off-by: Paul Barker 
---
 drivers/gpio/rzg2l-gpio.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpio/rzg2l-gpio.c b/drivers/gpio/rzg2l-gpio.c
index 7c908d05475a..2477af7874b8 100644
--- a/drivers/gpio/rzg2l-gpio.c
+++ b/drivers/gpio/rzg2l-gpio.c
@@ -5,7 +5,6 @@
  * Copyright (C) 2021-2023 Renesas Electronics Corp.
  */
 
-#include 
 #include 
 #include 
 #include 
-- 
2.39.2

[PATCH 5/8] mmc: renesas-sdhi: Drop

In line with changes elsewhere, drop inclusion of the common header.

Signed-off-by: Paul Barker 
---
 drivers/mmc/renesas-sdhi.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index 865efdd32184..8cd501c5f7c7 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2018 Marek Vasut 
  */
 
-#include 
 #include 
 #include 
 #include 
-- 
2.39.2

[PATCH 4/8] pinctrl: rzg2l: Drop

In line with changes elsewhere, drop inclusion of the common header.

Signed-off-by: Paul Barker 
---
 drivers/pinctrl/renesas/rzg2l-pfc.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/pinctrl/renesas/rzg2l-pfc.c 
b/drivers/pinctrl/renesas/rzg2l-pfc.c
index 7b045f75d3f9..e88ec1c18373 100644
--- a/drivers/pinctrl/renesas/rzg2l-pfc.c
+++ b/drivers/pinctrl/renesas/rzg2l-pfc.c
@@ -5,7 +5,6 @@
  * Copyright (C) 2021-2023 Renesas Electronics Corp.
  */
 
-#include 
 #include 
 #include 
 #include 
-- 
2.39.2

[PATCH 3/8] serial: sh: Drop

In line with changes elsewhere, drop inclusion of the common header.

Signed-off-by: Paul Barker 
---
 drivers/serial/serial_sh.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
index c034ab54e152..e4cc4ee42603 100644
--- a/drivers/serial/serial_sh.c
+++ b/drivers/serial/serial_sh.c
@@ -6,7 +6,6 @@
  * Copyright (C) 2002 - 2008  Paul Mundt
  */
 
-#include 
 #include 
 #include 
 #include 
-- 
2.39.2

[PATCH 2/8] arm: mach-rmobile: Drop

For most source files we can just drop . We need to add an
include for  in a couple of places. Also sort the include
list in memmap-gen3.c while we're here.

Signed-off-by: Paul Barker 
---
 arch/arm/mach-rmobile/board.c| 2 +-
 arch/arm/mach-rmobile/cpu_info-r8a7740.c | 2 +-
 arch/arm/mach-rmobile/cpu_info-rcar.c| 2 +-
 arch/arm/mach-rmobile/cpu_info-rzg.c | 2 +-
 arch/arm/mach-rmobile/cpu_info-rzg2l.c   | 1 -
 arch/arm/mach-rmobile/cpu_info.c | 2 +-
 arch/arm/mach-rmobile/emac.c | 1 -
 arch/arm/mach-rmobile/memmap-gen3.c  | 4 ++--
 arch/arm/mach-rmobile/memmap-rzg2l.c | 2 +-
 arch/arm/mach-rmobile/pfc-r8a7740.c  | 2 +-
 arch/arm/mach-rmobile/psci-r8a779a0.c| 1 -
 11 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-rmobile/board.c b/arch/arm/mach-rmobile/board.c
index a10371f74e0c..79c7e02671f2 100644
--- a/arch/arm/mach-rmobile/board.c
+++ b/arch/arm/mach-rmobile/board.c
@@ -3,7 +3,7 @@
  * (C) Copyright 2012 Nobuhiro Iwamatsu 
  * (C) Copyright 2012 Renesas Solutions Corp.
  */
-#include 
+
 #include 
 #include 
 
diff --git a/arch/arm/mach-rmobile/cpu_info-r8a7740.c 
b/arch/arm/mach-rmobile/cpu_info-r8a7740.c
index dcbe25f37ab9..5a94235c4b9e 100644
--- a/arch/arm/mach-rmobile/cpu_info-r8a7740.c
+++ b/arch/arm/mach-rmobile/cpu_info-r8a7740.c
@@ -3,7 +3,7 @@
  * (C) Copyright 2012 Nobuhiro Iwamatsu 
  * (C) Copyright 2012 Renesas Solutions Corp.
  */
-#include 
+
 #include 
 
 u32 rmobile_get_cpu_type(void)
diff --git a/arch/arm/mach-rmobile/cpu_info-rcar.c 
b/arch/arm/mach-rmobile/cpu_info-rcar.c
index 8fc4cd7f9de8..b9d8b5e57b5a 100644
--- a/arch/arm/mach-rmobile/cpu_info-rcar.c
+++ b/arch/arm/mach-rmobile/cpu_info-rcar.c
@@ -4,7 +4,7 @@
  *
  * Copyright (C) 2013,2014 Renesas Electronics Corporation
  */
-#include 
+
 #include 
 
 #define PRR_MASK   0x7fff
diff --git a/arch/arm/mach-rmobile/cpu_info-rzg.c 
b/arch/arm/mach-rmobile/cpu_info-rzg.c
index 1c18fd06f0b6..4ade4bc02198 100644
--- a/arch/arm/mach-rmobile/cpu_info-rzg.c
+++ b/arch/arm/mach-rmobile/cpu_info-rzg.c
@@ -3,7 +3,7 @@
  * Copyright (C) 2021 Renesas Electronics Corporation
  *
  */
-#include 
+
 #include 
 
 /* If the firmware passed a device tree, use it for soc identification. */
diff --git a/arch/arm/mach-rmobile/cpu_info-rzg2l.c 
b/arch/arm/mach-rmobile/cpu_info-rzg2l.c
index de4892ee901e..f69649dc7eaf 100644
--- a/arch/arm/mach-rmobile/cpu_info-rzg2l.c
+++ b/arch/arm/mach-rmobile/cpu_info-rzg2l.c
@@ -4,7 +4,6 @@
  *
  */
 
-#include 
 #include 
 #include 
 
diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c
index 6804b1da2cda..895c0f5336b6 100644
--- a/arch/arm/mach-rmobile/cpu_info.c
+++ b/arch/arm/mach-rmobile/cpu_info.c
@@ -3,7 +3,7 @@
  * (C) Copyright 2012 Nobuhiro Iwamatsu 
  * (C) Copyright 2012-2021 Renesas Solutions Corp.
  */
-#include 
+
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-rmobile/emac.c b/arch/arm/mach-rmobile/emac.c
index cb9bce0cf23b..95651626da4a 100644
--- a/arch/arm/mach-rmobile/emac.c
+++ b/arch/arm/mach-rmobile/emac.c
@@ -6,7 +6,6 @@
  * Copyright (C) 2012  Nobuhiro Iwamatsu 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-rmobile/memmap-gen3.c 
b/arch/arm/mach-rmobile/memmap-gen3.c
index a68eb806b353..4dff9e07629d 100644
--- a/arch/arm/mach-rmobile/memmap-gen3.c
+++ b/arch/arm/mach-rmobile/memmap-gen3.c
@@ -5,10 +5,10 @@
  * Copyright (C) 2017 Marek Vasut 
  */
 
-#include 
-#include 
 #include 
 #include 
+#include 
+#include 
 
 #define GEN3_NR_REGIONS 16
 
diff --git a/arch/arm/mach-rmobile/memmap-rzg2l.c 
b/arch/arm/mach-rmobile/memmap-rzg2l.c
index a08d0ea08fc0..9934a775220b 100644
--- a/arch/arm/mach-rmobile/memmap-rzg2l.c
+++ b/arch/arm/mach-rmobile/memmap-rzg2l.c
@@ -6,9 +6,9 @@
  * Copyright (C) 2023 Renesas Electronics Corp.
  */
 
-#include 
 #include 
 #include 
+#include 
 #include 
 
 #define RZG2L_NR_REGIONS 16
diff --git a/arch/arm/mach-rmobile/pfc-r8a7740.c 
b/arch/arm/mach-rmobile/pfc-r8a7740.c
index 5d42a68266b1..4f4847699b07 100644
--- a/arch/arm/mach-rmobile/pfc-r8a7740.c
+++ b/arch/arm/mach-rmobile/pfc-r8a7740.c
@@ -18,7 +18,7 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
-#include 
+
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-rmobile/psci-r8a779a0.c 
b/arch/arm/mach-rmobile/psci-r8a779a0.c
index 6a85eb22cac2..b6c49e731f9d 100644
--- a/arch/arm/mach-rmobile/psci-r8a779a0.c
+++ b/arch/arm/mach-rmobile/psci-r8a779a0.c
@@ -6,7 +6,6 @@
  *
  */
 
-#include 
 #include 
 #include 
 #include 
-- 
2.39.2

[PATCH 1/8] arm: armv8: mmu: Prepare for common.h removal

If  won't be included before , we need to
ensure that we have the required type definitions.

Signed-off-by: Paul Barker 
---
 arch/arm/include/asm/armv8/mmu.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 19a9e112a434..4f0adb07325f 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -118,6 +118,8 @@
 #define HCR_EL2_E2H_BIT34
 
 #ifndef __ASSEMBLY__
+#include 
+
 static inline void set_ttbr_tcr_mair(int el, u64 table, u64 tcr, u64 attr)
 {
asm volatile("dsb sy");

base-commit: a803f87202aa48974bdff4d8100464a8288931e4
-- 
2.39.2

Re: [PATCH] bootstd: Skip over bad device during bootflows scanning

2023-11-01 Thread Tony Dinh

Hi Simon,

On Wed, Nov 1, 2023 at 9:10 AM Simon Glass  wrote:
>
> Hi Tony,
>
> On Tue, 31 Oct 2023 at 13:45, Tony Dinh  wrote:
> >
> > On Tue, Oct 31, 2023 at 12:26 PM Tony Dinh  wrote:
> > >
> > > Hi Simon,
> > >
> > > On Mon, Oct 30, 2023 at 12:47 PM Tony Dinh  wrote:
> > > >
> > > > During scanning for the next bootdev, if bootdev_next_prio() encounters
> > > > a device error (e.g. ENOSYS), let it continue scanning the next devices,
> > > > not stopping prematurely.
> > > >
> > > > Background:
> > > >
> > > > During scanning for bootflows, it's possible for bootstd to encounter a
> > > > faulty device controller. Also when the same u-boot is used for another
> > > > variant of the same board, some device controller such as SATA might
> > > > not exist.
> > > >
> > > > I've found this issue while converting the Marvell Sheevaplug board to
> > > > use bootstd. This board has 2 variants, the original Sheevaplug has MMC 
> > > > and
> > > > USB only, but the later variant comes with USB, MMC, and eSATA ports. We
> > > > have been using the same u-boot (starting with CONFIG_IDE and later 
> > > > with DM
> > > > CONFIG_SATA) for both variants. This worked well with the old
> > > > envs-scripting booting scheme.
> > > >
> > > > Signed-off-by: Tony Dinh 
> > > > ---
> > > >
> > > >  boot/bootdev-uclass.c | 2 --
> > > >  1 file changed, 2 deletions(-)
> > > >
> > > > diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c
> > > > index 44ae98a926..b1d48e5b69 100644
> > > > --- a/boot/bootdev-uclass.c
> > > > +++ b/boot/bootdev-uclass.c
> > > > @@ -677,8 +677,6 @@ int bootdev_next_prio(struct bootflow_iter *iter, 
> > > > struct udevice **devp)
> > > > 
> > > > BOOTFLOWIF_SHOW);
> > > > log_debug("- bootdev_hunt_prio() ret 
> > > > %d\n",
> > > >   ret);
> > > > -   if (ret)
> > > > -   return log_msg_ret("hun", ret);
> > > > }
> > > > } else {
> > > > ret = device_probe(dev);
> > > > --
> > > > 2.39.2
> > > >
> > >
> > > Per your request, here is the console trace log when the device error
> > > occurs. Perhaps we could improve bootdev_next_prio() to make the error
> > > status more visible in the console with printf? I've briefly looked at
> > > other device bootdev hunt drivers and did not see enough console
> > > output for this type of error, so it might be better that we have this
> > > output either in bootdev_next_prio() or bootdev_hunt_drv().
> > >
> > > 
> > > U-Boot 2024.01-rc1-tld-1-3-gd697d7b93a-dirty (Oct 26 2023 - 16:17:16 
> > > -0700)
> > > Marvell-Sheevaplug
> > >
> > > SoC:   Kirkwood 88F6281_A0
> > > DRAM:  512 MiB
> > > Core:  17 devices, 12 uclasses, devicetree: separate
> > > NAND:  512 MiB
> > > MMC:   338-uclass_find_device_by_seq() 0
> > > 346-uclass_find_device_by_seq()- 0 'mvsdio@9'
> > > 349-uclass_find_device_by_seq()- found
> > > 252-  mvebu_mmc_power_up() mvebu_mmc mvsdio@9: power up
> > > 399-mvebu_mmc_initialize() mvebu_mmc mvsdio@9: mvebu_mmc_initialize
> > > 338-uclass_find_device_by_seq() 1
> > > 346-uclass_find_device_by_seq()- 0 'mvsdio@9'
> > > 353-uclass_find_device_by_seq()- not found
> > > mvsdio@9: 0
> > > Loading Environment from NAND... 338-uclass_find_device_by_seq() 0
> > > 346-uclass_find_device_by_seq()- 0 'ethernet-controller@72000'
> > > 349-uclass_find_device_by_seq()- found
> > > OK
> > > In:serial
> > > Out:   serial
> > > Err:   serial
> > > Net:   eth0: ethernet-controller@72000
> > > Hit any key to stop autoboot:  0
> > >
> > > => env def -a
> > > ## Resetting to default environment
> > >
> > > => bootflow scan -l
> > > Scanning for bootflows in all bootdevs
> > > Seq  Method   State   UclassPart  Name  
> > > Filename
> > > ---  ---  --      
> > > 
> > > 338-uclass_find_device_by_seq() 0
> > > 346-uclass_find_device_by_seq()- 0 'extlinux'
> > > 349-uclass_find_device_by_seq()- found
> > > 338-uclass_find_device_by_seq() 1
> > > 346-uclass_find_device_by_seq()- 0 'extlinux'
> > > 346-uclass_find_device_by_seq()- 1 'script'
> > > 349-uclass_find_device_by_seq()- found
> > > 338-uclass_find_device_by_seq() 2
> > > 346-uclass_find_device_by_seq()- 0 'extlinux'
> > > 346-uclass_find_device_by_seq()- 1 'script'
> > > 346-uclass_find_device_by_seq()- 2 'pxe'
> > > 349-uclass_find_device_by_seq()- found
> > > 871-   bootdev_hunt_prio() Hunting for priority 1
> > > 883-   bootdev_hunt_prio() exit 0
> > > 715-  bootdev_setup_iter() - bootdev_hunt_prio() ret 0
> > > 83-bootstd_get_bootdev_order() - targets  
> > > 746-  bootdev_setup_iter() setup labels 
> > > 641-   bootdev_next_prio() next prio 0: dev=/none

Re: [PATCH v2 1/7] clk/qcom: move from mach-snapdragon


On 10/30/23 18:23, Caleb Connolly wrote:

Clock drivers don't belong here, move them to the right place and
declutter mach-snapdragon a bit.

To de-couple these drivers from specific "target" platforms, add
additional config options to enable each clock driver gated behind a
common CLK_QCOM option and enable them by default for the respective
targets. This will make future work easier as we move towards a generic
Qualcomm target.

Signed-off-by: Caleb Connolly 
---
  arch/arm/mach-snapdragon/Kconfig   |  4 ++
  arch/arm/mach-snapdragon/Makefile  |  5 ---
  drivers/clk/Kconfig|  1 +
  drivers/clk/Makefile   |  1 +
  drivers/clk/qcom/Kconfig   | 44 ++
  drivers/clk/qcom/Makefile  |  9 +
  .../clk/qcom}/clock-apq8016.c  |  2 +-
  .../clk/qcom}/clock-apq8096.c  |  3 +-
  .../clk/qcom/clock-qcom.c  |  2 +-
  .../clk/qcom/clock-qcom.h  |  0
  .../clk/qcom}/clock-qcs404.c   |  2 +-
  .../clk/qcom}/clock-sdm845.c   |  2 +-
  12 files changed, 65 insertions(+), 10 deletions(-)


Please update MAINTAINERS as well.

--Sean

Re: [PATCH RESEND 2/5] clk: call log_debug() instead to avoid console log printing

On 11/2/2023 2:01 AM, Sean Anderson wrote:
> On 11/1/23 13:55, Sean Anderson wrote:
>> On 8/17/23 13:04, Yang Xiwen via B4 Relay wrote:
>>> From: Yang Xiwen 
>>>
>>> it's a very common case to register a clock without a parent, such as
>>> clk_register_fixed_rate().
>>
>> Actually, that seems like the only place this is done.
>>
>>> Replace log_error() with log_debug() to avoid
>>> useless console log if not debugging.
>>>
>>> Signed-off-by: Yang Xiwen 
>>> ---
>>>   drivers/clk/clk.c | 4 ++--
>>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
>>> index a5a3461b66..a38daaac0c 100644
>>> --- a/drivers/clk/clk.c
>>> +++ b/drivers/clk/clk.c
>>> @@ -24,8 +24,8 @@ int clk_register(struct clk *clk, const char
>>> *drv_name,
>>>   ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, );
>>>   if (ret) {
>>> -    log_err("%s: failed to get %s device (parent of %s)\n",
>>> -    __func__, parent_name, name);
>>> +    log_debug("%s: failed to get %s device (parent of %s)\n",
>>> +  __func__, parent_name, name);
>>>   } else {
>>>   log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name,
>>>     parent->name, parent);
>>>
>>
>> I think a correct fix would be
>>
>> diff --git i/drivers/clk/clk.c w/drivers/clk/clk.c
>> index a5a3461b66c..cb333c83f66 100644
>> --- i/drivers/clk/clk.c
>> +++ w/drivers/clk/clk.c
>> @@ -18,17 +18,19 @@
>>   int clk_register(struct clk *clk, const char *drv_name,
>>   const char *name, const char *parent_name)
>>   {
>> -   struct udevice *parent;
>> +   struct udevice *parent = NULL;
>>  struct driver *drv;
>>  int ret;
>>
>> -   ret = uclass_get_device_by_name(UCLASS_CLK, parent_name,
>> );
>> -   if (ret) {
>> -   log_err("%s: failed to get %s device (parent of %s)\n",
>> -   __func__, parent_name, name);
>> -   } else {
>> -   log_debug("%s: name: %s parent: %s [0x%p]\n",
>> __func__, name,
>> - parent->name, parent);
>> +   if (parent_name) {
>> +   ret = uclass_get_device_by_name(UCLASS_CLK, parent_name,
>> +   );
>> +   if (ret)
>> +   log_err("%s: failed to get %s device (parent
>> of %s)\n",
>> +   __func__, parent_name, name);
>> +   else
>> +   log_debug("%s: name: %s parent: %s [0x%p]\n",
>> __func__,
>> + name, parent->name, parent);
>>  }
>>
>>  drv = lists_driver_lookup_name(drv_name);
>>
>> --Sean
> 
> or you could modify the condition to be `if (ret && parent_name)` with
> appropriate
> modification of the second debug message.
> 
Thanks for your review. I'll use your patch with your SoB and drop mine
in next release.
> --Sean
-- 
Best regards,
Yang Xiwen

Re: [PATCH v1] clk: use private clk struct in CLK_CCF's enable/disable functions


On 9/5/23 18:16, Maksim Kiselev wrote:

In clk_enable()/clk_disable() functions, when CCF is activated,
we must pass a private clk struct to enable()/disable() ops functions.
Otherwise, the use of a container_of() construction within these ops
should be banned. Because passing a non-private clk struct to
container_of() results in an out of range error.


Yeah...

This is a big problem in the CCF code, where `struct clk` in U-Boot is
both `struct clk` from Linux (a "thick" pointer) and `struct clk_core`
(all the clock private data).


At the moment, clk-mux, clk-fixed-factor, clk-gate and possibly other
clocks use container_of() in their enable()/disable() functions.
Therefore, for these functions to work correclty, private clk struct


correctly


must be passed.

Signed-off-by: Maksim Kiselev 
---
  drivers/clk/clk-uclass.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index dc3e9d6a26..542ec41cba 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -649,7 +649,7 @@ int clk_enable(struct clk *clk)
}
  
  		if (ops->enable) {

-   ret = ops->enable(clk);
+   ret = ops->enable(clkp ? clkp : clk);
if (ret) {
printf("Enable %s failed\n", clk->dev->name);
return ret;
@@ -706,7 +706,7 @@ int clk_disable(struct clk *clk)
}
  
  		if (ops->disable) {

-   ret = ops->disable(clk);
+   ret = ops->disable(clkp ? clkp : clk);
if (ret)
return ret;
}


Reviewed-by: Sean Anderson

Re: [PATCH RESEND 5/5] clk: ccf: call clock provided ops directly for endisable()

On 11/2/2023 2:19 AM, Sean Anderson wrote:
> On 8/17/23 13:04, Yang Xiwen via B4 Relay wrote:
>> From: Yang Xiwen 
>>
>> Calling into CCF framework will cause a clock being enabled twice
>> instead of once (clk->enable_count becomes 2 rather than 1), thus making
>> it hard to disable (needs to call clk_disable() twice).
>> Fix that by calling clock provided ops directly.
> 
> Can you describe this scenario more? From what I can tell, clk_enable
> doesn't
> increment enable_count for CCF clocks.
> 
Well, it's hard to describe clearly. But I can only tell this patch
fixed the issue when i was trying to write an Ethernet driver[1] which
calls clk_disable() and expects the clock to be disabled after that.
Also I found that CCF driver does not have a corresponding test file. I
will try to write a test for that in next release.
> --Sean
> 
>> Signed-off-by: Yang Xiwen 
>> ---
>>   drivers/clk/clk.c | 12 +++-
>>   1 file changed, 11 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
>> index a38daaac0c..00d082c46f 100644
>> --- a/drivers/clk/clk.c
>> +++ b/drivers/clk/clk.c
>> @@ -14,6 +14,7 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>     int clk_register(struct clk *clk, const char *drv_name,
>>    const char *name, const char *parent_name)
>> @@ -115,11 +116,20 @@ int ccf_clk_set_parent(struct clk *clk, struct
>> clk *parent)
>>   static int ccf_clk_endisable(struct clk *clk, bool enable)
>>   {
>>   struct clk *c;
>> +    const struct clk_ops *ops;
>>   int err = clk_get_by_id(clk->id, );
>>     if (err)
>>   return err;
>> -    return enable ? clk_enable(c) : clk_disable(c);
>> +    else
>> +    ops = clk_dev_ops(c->dev);
>> +
>> +    if (enable && ops->enable)
>> +    return ops->enable(c);
>> +    else if (!enable && ops->disable)
>> +    return ops->disable(c);
>> +
>> +    return -ENOSYS;
>>   }
>>     int ccf_clk_enable(struct clk *clk)
>>
> 
[1]
https://lore.kernel.org/all/20230814-wip-hisi_femac-trunk-v2-0-1e29f4005...@outlook.com/

-- 
Best regards,
Yang Xiwen

Re: [PATCH RESEND 1/5] clk: export clk_register_mux_table()


On 11/1/23 14:37, Yang Xiwen wrote:

On 11/2/2023 1:50 AM, Sean Anderson wrote:

On 8/17/23 13:04, Yang Xiwen via B4 Relay wrote:

From: Yang Xiwen 

It's already implemented in clk-mux.c, export it in the header file.

Signed-off-by: Yang Xiwen 
---
   include/linux/clk-provider.h | 6 ++
   1 file changed, 6 insertions(+)

diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index b8acacd49e..801404480b 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -247,6 +247,12 @@ struct clk *clk_register_mux(struct device *dev,
const char *name,
   void __iomem *reg, u8 shift, u8 width,
   u8 clk_mux_flags);
   +struct clk *clk_register_mux_table(struct device *dev, const char
*name,
+   const char * const *parent_names, u8 num_parents,
+   unsigned long flags,
+   void __iomem *reg, u8 shift, u32 mask,
+   u8 clk_mux_flags, u32 *table);
+
   struct clk *clk_register_fixed_rate(struct device *dev, const char
*name,
   ulong rate);
  


Why do you want to export this? None of your other patches use it.

It will be used in HiSilicon clk framework driver which i will send
after this series is applied. And this function is exported in Linux
kernel CCF. So i think it's fine to export it in U-Boot as well.


Please just send it along with that series then.

--Sean

Re: [PATCH v1] clk: mux: check value returned from clk_mux_val_to_index()


On 9/5/23 13:33, Maksim Kiselev wrote:

The clk_mux_val_to_index() may return -EINVAL. In this case
clk_mux_get_parent() will return a wrong parent index and
this will lead to out of bounds error.

E.g. when we register mux clk:
ret = clk_register(clk, UBOOT_DM_CLK_CCF_MUX, name,
   parent_names[clk_mux_get_parent(clk)]);

Let's add a check on the return value of clk_mux_val_to_index() and if
it's negative, set parent index to 0.

Signed-off-by: Maksim Kiselev 
---
  drivers/clk/clk-mux.c | 9 -
  1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 017f25f7a5..00fe916171 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -88,6 +88,7 @@ unsigned int clk_mux_index_to_val(u32 *table, unsigned int 
flags, u8 index)
  u8 clk_mux_get_parent(struct clk *clk)
  {
struct clk_mux *mux = to_clk_mux(clk);
+   int index;
u32 val;
  
  #if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF)

@@ -98,7 +99,13 @@ u8 clk_mux_get_parent(struct clk *clk)
val >>= mux->shift;
val &= mux->mask;
  
-	return clk_mux_val_to_index(clk, mux->table, mux->flags, val);

+   index = clk_mux_val_to_index(clk, mux->table, mux->flags, val);
+   if (index < 0) {
+   log_err("Could not fetch index\n");
+   index = 0;
+   }
+
+   return index;
  }
  
  static int clk_fetch_parent_index(struct clk *clk,


Reviewed-by: Sean Anderson 

But can you add something to the commit (or error) message about
how this indicates a bug in the driver (e.g. there aren't enough
parents to match the hardware).

--Sean

Re: [PATCH RESEND 1/5] clk: export clk_register_mux_table()

On 11/2/2023 1:50 AM, Sean Anderson wrote:
> On 8/17/23 13:04, Yang Xiwen via B4 Relay wrote:
>> From: Yang Xiwen 
>>
>> It's already implemented in clk-mux.c, export it in the header file.
>>
>> Signed-off-by: Yang Xiwen 
>> ---
>>   include/linux/clk-provider.h | 6 ++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
>> index b8acacd49e..801404480b 100644
>> --- a/include/linux/clk-provider.h
>> +++ b/include/linux/clk-provider.h
>> @@ -247,6 +247,12 @@ struct clk *clk_register_mux(struct device *dev,
>> const char *name,
>>   void __iomem *reg, u8 shift, u8 width,
>>   u8 clk_mux_flags);
>>   +struct clk *clk_register_mux_table(struct device *dev, const char
>> *name,
>> +   const char * const *parent_names, u8 num_parents,
>> +   unsigned long flags,
>> +   void __iomem *reg, u8 shift, u32 mask,
>> +   u8 clk_mux_flags, u32 *table);
>> +
>>   struct clk *clk_register_fixed_rate(struct device *dev, const char
>> *name,
>>   ulong rate);
>>  
> 
> Why do you want to export this? None of your other patches use it.
It will be used in HiSilicon clk framework driver which i will send
after this series is applied. And this function is exported in Linux
kernel CCF. So i think it's fine to export it in U-Boot as well.
> 
> --Sean

-- 
Best regards,
Yang Xiwen

[PATCH] arm: mach-k3: Move K3 common schema.yaml out of board directory

This file is common for all K3, move it out of board/ directory and
into mach-k3. As we need to change the path in k3-binman.dtsi let's
take this opportunity to switch to absolute paths which makes adding
non-TI boards (like Toradex Verdin) not need to override these paths.

Signed-off-by: Andrew Davis 
---
 .../dts/k3-am625-verdin-wifi-dev-binman.dtsi  | 66 ---
 arch/arm/dts/k3-binman.dtsi   | 28 
 .../common => arch/arm/mach-k3}/schema.yaml   |  0
 3 files changed, 14 insertions(+), 80 deletions(-)
 rename {board/ti/common => arch/arm/mach-k3}/schema.yaml (100%)

diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi 
b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
index 089b2a5f5cd..b489d8afbe3 100644
--- a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
@@ -13,72 +13,6 @@
filename = "../../ti/keys/ti-degenerate-key.pem";
 };
 
-#ifndef CONFIG_ARM64
-
-_yaml {
-   schema = "../../ti/common/schema.yaml";
-};
-
-_yaml {
-   schema = "../../ti/common/schema.yaml";
-};
-
-_yaml {
-   schema = "../../ti/common/schema.yaml";
-};
-
-_yaml {
-   schema = "../../ti/common/schema.yaml";
-};
-
-/* combined-tifs-cfg */
-
-_yaml_tifs {
-   schema = "../../ti/common/schema.yaml";
-};
-
-_yaml_tifs {
-   schema = "../../ti/common/schema.yaml";
-};
-
-_yaml_tifs {
-   schema = "../../ti/common/schema.yaml";
-};
-
-_yaml_tifs {
-   schema = "../../ti/common/schema.yaml";
-};
-
-/* combined-dm-cfg */
-
-_yaml_dm {
-   schema = "../../ti/common/schema.yaml";
-};
-
-_yaml_dm {
-   schema = "../../ti/common/schema.yaml";
-};
-
-/* combined-sysfw-cfg */
-
-_yaml_sysfw {
-   schema = "../../ti/common/schema.yaml";
-};
-
-_yaml_sysfw {
-   schema = "../../ti/common/schema.yaml";
-};
-
-_yaml_sysfw {
-   schema = "../../ti/common/schema.yaml";
-};
-
-_yaml_sysfw {
-   schema = "../../ti/common/schema.yaml";
-};
-
-#endif /* CONFIG_ARM64 */
-
 #ifdef CONFIG_TARGET_VERDIN_AM62_R5
 
  {
diff --git a/arch/arm/dts/k3-binman.dtsi b/arch/arm/dts/k3-binman.dtsi
index 2ea2dd18a12..0212d44ee3b 100644
--- a/arch/arm/dts/k3-binman.dtsi
+++ b/arch/arm/dts/k3-binman.dtsi
@@ -32,28 +32,28 @@
filename = "board-cfg.bin";
bcfg_yaml: ti-board-config {
config = "board-cfg.yaml";
-   schema = "../common/schema.yaml";
+   schema = "arch/arm/mach-k3/schema.yaml";
};
};
pm-cfg {
filename = "pm-cfg.bin";
pcfg_yaml: ti-board-config {
config = "pm-cfg.yaml";
-   schema = "../common/schema.yaml";
+   schema = "arch/arm/mach-k3/schema.yaml";
};
};
rm-cfg {
filename = "rm-cfg.bin";
rcfg_yaml: ti-board-config {
config = "rm-cfg.yaml";
-   schema = "../common/schema.yaml";
+   schema = "arch/arm/mach-k3/schema.yaml";
};
};
sec-cfg {
filename = "sec-cfg.bin";
scfg_yaml: ti-board-config {
config = "sec-cfg.yaml";
-   schema = "../common/schema.yaml";
+   schema = "arch/arm/mach-k3/schema.yaml";
};
};
combined-tifs-cfg {
@@ -61,19 +61,19 @@
ti-board-config {
bcfg_yaml_tifs: board-cfg {
config = "board-cfg.yaml";
-   schema = "../common/schema.yaml";
+   schema = "arch/arm/mach-k3/schema.yaml";
};
scfg_yaml_tifs: sec-cfg {
config = "sec-cfg.yaml";
-   schema = "../common/schema.yaml";
+   schema = "arch/arm/mach-k3/schema.yaml";
};
pcfg_yaml_tifs: pm-cfg {
config = "pm-cfg.yaml";
-   schema = "../common/schema.yaml";
+   schema = "arch/arm/mach-k3/schema.yaml";
};
rcfg_yaml_tifs: rm-cfg {
config = "rm-cfg.yaml";
-   schema = "../common/schema.yaml";
+   schema = "arch/arm/mach-k3/schema.yaml";
};
};
};
@@ -82,11 +82,11 @@
ti-board-config {
pcfg_yaml_dm: pm-cfg {
config = "pm-cfg.yaml";
-   schema = "../common/schema.yaml";
+   schema = "arch/arm/mach-k3/schema.yaml";

Re: cli: Add explicit kconfig dependency for CONFIG_IS_ENABLED macro


On 8/5/23 19:32, Pavel Korotkevich wrote:

 From fe2ceb7c4365112055ecfc3bbf68ad47330b744d Mon Sep 17 00:00:00 2001
From: Pavel Korotkevich 
Date: Sun, 6 Aug 2023 02:00:41 +0300
Subject: [PATCH] cli: Add explicit kconfig dependency for CONFIG_IS_ENABLED 
macro


Please add a suitable commit message and use `git send-email` (or similar) to 
send your patches.

--Sean


---
  include/cli.h | 2 ++
  1 file changed, 2 insertions(+)

diff --git a/include/cli.h b/include/cli.h
index 094a6602d7..d6dbbde070 100644
--- a/include/cli.h
+++ b/include/cli.h
@@ -9,6 +9,8 @@

  #include 

+#include 
+
  /**
   * struct cli_ch_state - state information for reading cmdline characters
   *

Re: [PATCH] clk: fix count parameter type for clk_release_all


On 6/19/23 06:47, Eugen Hristev wrote:

The second parameter for clk_release_all is used as an unsigned
(which makes sense) but the function prototype declares it as an int.
This causes warnings/error like such below:

include/clk.h:422:48: error: conversion to ‘int’ from ‘unsigned int’ may change 
the sign of the result [-Werror=sign-conversion]
   422 | return clk_release_all(bulk->clks, bulk->count);

To fix this, changed the type of the count to `unsigned int`

Fixes: 82a8a669b4f7 ("clk: add clk_release_all()")
Signed-off-by: Eugen Hristev 
---
  drivers/clk/clk-uclass.c | 7 ---
  include/clk.h| 4 ++--
  2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index dc3e9d6a2615..eada3a3a5b62 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -416,12 +416,13 @@ int clk_get_by_name_nodev(ofnode node, const char *name, 
struct clk *clk)
return clk_get_by_index_nodev(node, index, clk);
  }
  
-int clk_release_all(struct clk *clk, int count)

+int clk_release_all(struct clk *clk, unsigned int count)
  {
-   int i, ret;
+   unsigned int i;
+   int ret;
  
  	for (i = 0; i < count; i++) {

-   debug("%s(clk[%d]=%p)\n", __func__, i, [i]);
+   debug("%s(clk[%u]=%p)\n", __func__, i, [i]);
  
  		/* check if clock has been previously requested */

if (!clk[i].dev)
diff --git a/include/clk.h b/include/clk.h
index d91285235f79..a342297007b6 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -243,7 +243,7 @@ static inline struct clk *devm_clk_get_optional(struct 
udevice *dev,
   *
   * Return: zero on success, or -ve error code.
   */
-int clk_release_all(struct clk *clk, int count);
+int clk_release_all(struct clk *clk, unsigned int count);
  
  /**

   * devm_clk_put   - "free" a managed clock source
@@ -307,7 +307,7 @@ clk_get_by_name_nodev(ofnode node, const char *name, struct 
clk *clk)
return -ENOSYS;
  }
  
-static inline int clk_release_all(struct clk *clk, int count)

+static inline int clk_release_all(struct clk *clk, unsigned int count)
  {
return -ENOSYS;
  }


Reviewed-by: Sean Anderson

Re: [PATCH] drivers: clk: Adjust temp var data type to properly match that of struct clk_ops


On 5/15/23 15:49, Nathan Barrett-Morrison wrote:

In commit 5c5992cb90cf ("clk: Add debugging for return values"), a
temporary storage variable was added around the ops->get_rate() call
inside clk_get_rate(), so that the result could be passed through
log_ret.

This temporary variable was declared as an int, yet when we look in
struct clk_ops, we can see this needs to be a ulong:
ulong (*get_rate)(struct clk *clk);

This was resulting in a signed to unsigned casting error on our
builds, where a clock value of 0xABCDABCD was being incorrectly cast
to 0xABCDABCD.

Signed-off-by: Nathan Barrett-Morrison 
---
  drivers/clk/clk-uclass.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index dc3e9d6a26..4e3e3b8537 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -471,7 +471,7 @@ void clk_free(struct clk *clk)
  ulong clk_get_rate(struct clk *clk)
  {
const struct clk_ops *ops;
-   int ret;
+   ulong ret;
  
  	debug("%s(clk=%p)\n", __func__, clk);

if (!clk_valid(clk))


Reviewed-by: Sean Anderson

Re: [PATCH] clk: change log_err() to log_info() to make it quiet with clk_register_fixed_rate()


On 3/28/23 13:03, notfound405 wrote:

clk_register_fixed_rate() calls clk_register() with the fourth
argument(parent_name) being NULL, making it output error message. Change
to log_info() to fix it.

Signed-off-by: Yang Xiwen 
---
The previous email is signed with a wrong name. The patch is not
modified.

  drivers/clk/clk.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index a5a3461b66..0619937cee 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -24,7 +24,7 @@ int clk_register(struct clk *clk, const char *drv_name,
  
  	ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, );

if (ret) {
-   log_err("%s: failed to get %s device (parent of %s)\n",
+   log_info("%s: failed to get %s device (parent of %s)\n",
__func__, parent_name, name);
} else {
log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name,


cf: 
https://lore.kernel.org/u-boot/20230818-clk-fix-v1-2-49ec18f82...@outlook.com/

Re: [PATCH v1] clk: nuvoton: add read only feature for clk driver


On 3/7/23 22:23, Jim Liu wrote:

Hi Sean

Thanks for your review.
This is a software flag not hardware reg.
It just protects the clock source and can't modify it in uboot.


OK, can you add that to the commit message and resubmit.

--Sean


Best regards,
Jim

On Tue, Mar 7, 2023 at 9:57 PM Sean Anderson  wrote:


On 3/7/23 03:13, Jim Liu wrote:

Set ahb/apb/fiu clock divider as read-only


Are these read-only in hardware, or is there some other reason?

--Sean


Signed-off-by: Jim Liu 
---
   drivers/clk/nuvoton/clk_npcm.c| 15 ---
   drivers/clk/nuvoton/clk_npcm.h|  1 +
   drivers/clk/nuvoton/clk_npcm8xx.c | 12 ++--
   3 files changed, 19 insertions(+), 9 deletions(-)

diff --git a/drivers/clk/nuvoton/clk_npcm.c b/drivers/clk/nuvoton/clk_npcm.c
index 8d71f2a24b..18cb9cddbf 100644
--- a/drivers/clk/nuvoton/clk_npcm.c
+++ b/drivers/clk/nuvoton/clk_npcm.c
@@ -135,7 +135,7 @@ static u32 npcm_clk_get_div(struct clk *clk)
   return div;
   }

-static u32 npcm_clk_set_div(struct clk *clk, u32 div)
+static int npcm_clk_set_div(struct clk *clk, u32 div)
   {
   struct npcm_clk_priv *priv = dev_get_priv(clk->dev);
   struct npcm_clk_div *divider;
@@ -145,6 +145,9 @@ static u32 npcm_clk_set_div(struct clk *clk, u32 div)
   if (!divider)
   return -EINVAL;

+ if (divider->flags & DIV_RO)
+ return 0;
+
   if (divider->flags & PRE_DIV2)
   div = div >> 1;

@@ -153,6 +156,12 @@ static u32 npcm_clk_set_div(struct clk *clk, u32 div)
   else
   clkdiv = ilog2(div);

+ if (clkdiv > (divider->mask >> (ffs(divider->mask) - 1))) {
+ printf("clkdiv(%d) for clk(%ld) is over limit\n",
+clkdiv, clk->id);
+ return -EINVAL;
+ }
+
   val = readl(priv->base + divider->reg);
   val &= ~divider->mask;
   val |= (clkdiv << (ffs(divider->mask) - 1)) & divider->mask;
@@ -253,8 +262,8 @@ static ulong npcm_clk_set_rate(struct clk *clk, ulong rate)
   if (ret)
   return ret;

- debug("%s: rate %lu, new rate (%lu / %u)\n", __func__, rate, parent_rate, 
div);
- return (parent_rate / div);
+ debug("%s: rate %lu, new rate %lu\n", __func__, rate, 
npcm_clk_get_rate(clk));
+ return npcm_clk_get_rate(clk);
   }

   static int npcm_clk_set_parent(struct clk *clk, struct clk *parent)
diff --git a/drivers/clk/nuvoton/clk_npcm.h b/drivers/clk/nuvoton/clk_npcm.h
index 06b60dc8b8..b4726d8381 100644
--- a/drivers/clk/nuvoton/clk_npcm.h
+++ b/drivers/clk/nuvoton/clk_npcm.h
@@ -50,6 +50,7 @@
   #define PRE_DIV2BIT(2)  /* Pre divisor = 2 */
   #define POST_DIV2   BIT(3)  /* Post divisor = 2 */
   #define FIXED_PARENTBIT(4)  /* clock source is fixed */
+#define DIV_RO   BIT(5)  /* divider is read-only */

   /* Parameters of PLL configuration */
   struct npcm_clk_pll {
diff --git a/drivers/clk/nuvoton/clk_npcm8xx.c 
b/drivers/clk/nuvoton/clk_npcm8xx.c
index 27e3cfcf55..d1b32e3237 100644
--- a/drivers/clk/nuvoton/clk_npcm8xx.c
+++ b/drivers/clk/nuvoton/clk_npcm8xx.c
@@ -45,12 +45,12 @@ static struct npcm_clk_select npcm8xx_clk_selectors[] = {
   };

   static struct npcm_clk_div npcm8xx_clk_dividers[] = {
- {NPCM8XX_CLK_AHB, CLKDIV1, CLK4DIV, DIV_TYPE1 | PRE_DIV2},
- {NPCM8XX_CLK_APB2, CLKDIV2, APB2CKDIV, DIV_TYPE2},
- {NPCM8XX_CLK_APB5, CLKDIV2, APB5CKDIV, DIV_TYPE2},
- {NPCM8XX_CLK_SPI0, CLKDIV3, SPI0CKDIV, DIV_TYPE1},
- {NPCM8XX_CLK_SPI1, CLKDIV3, SPI1CKDIV, DIV_TYPE1},
- {NPCM8XX_CLK_SPI3, CLKDIV1, SPI3CKDIV, DIV_TYPE1},
+ {NPCM8XX_CLK_AHB, CLKDIV1, CLK4DIV, DIV_TYPE1 | PRE_DIV2 | DIV_RO},
+ {NPCM8XX_CLK_APB2, CLKDIV2, APB2CKDIV, DIV_TYPE2 | DIV_RO},
+ {NPCM8XX_CLK_APB5, CLKDIV2, APB5CKDIV, DIV_TYPE2 | DIV_RO},
+ {NPCM8XX_CLK_SPI0, CLKDIV3, SPI0CKDIV, DIV_TYPE1 | DIV_RO},
+ {NPCM8XX_CLK_SPI1, CLKDIV3, SPI1CKDIV, DIV_TYPE1 | DIV_RO},
+ {NPCM8XX_CLK_SPI3, CLKDIV1, SPI3CKDIV, DIV_TYPE1 | DIV_RO},
   {NPCM8XX_CLK_SPIX, CLKDIV3, SPIXCKDIV, DIV_TYPE1},
   {NPCM8XX_CLK_UART, CLKDIV1, UARTDIV1, DIV_TYPE1},
   {NPCM8XX_CLK_UART2, CLKDIV3, UARTDIV2, DIV_TYPE1},

Re: [PATCH 1/2] board: phytec: am62x: Add PHYTEC phyCORE-AM62x SoM

2023-11-01 Thread Wadim Egorov


Hi Dhruva,

Am 01.11.23 um 16:57 schrieb Dhruva Gole:

Hi,

On Oct 31, 2023 at 14:37:31 +0100, Wadim Egorov wrote:

Add basic support for PHYTEC phyCORE-AM62x SoM.

Supported features:
   - 2GB DDR4 RAM
   - eMMC Flash
   - OSPI NOR Flash
   - external uSD
   - Ethernet
   - debug UART

Product page SoM: https://www.phytec.com/product/phycore-am62x

Signed-off-by: Wadim Egorov 
---
  arch/arm/dts/Makefile |4 +-
  .../arm/dts/k3-am62-phycore-som-ddr4-2gb.dtsi | 2190 +
  arch/arm/dts/k3-am62-phycore-som.dtsi |  324 +++
  .../k3-am625-phyboard-lyra-rdk-u-boot.dtsi|  229 ++
  arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts   |  266 ++
  arch/arm/dts/k3-am625-phycore-som-binman.dtsi |  532 
  arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts  |  134 +
  arch/arm/mach-k3/Kconfig  |1 +
  board/phytec/phycore_am62x/Kconfig|   52 +
  board/phytec/phycore_am62x/MAINTAINERS|   15 +
  board/phytec/phycore_am62x/Makefile   |8 +
  board/phytec/phycore_am62x/board-cfg.yaml |   36 +
  board/phytec/phycore_am62x/phycore-am62x.c|   59 +
  board/phytec/phycore_am62x/phycore_am62x.env  |   23 +
  board/phytec/phycore_am62x/pm-cfg.yaml|   12 +
  board/phytec/phycore_am62x/rm-cfg.yaml| 1088 
  board/phytec/phycore_am62x/sec-cfg.yaml   |  379 +++
  configs/phycore_am62x_a53_defconfig   |  116 +
  configs/phycore_am62x_r5_defconfig|  131 +
  include/configs/phycore_am62x.h   |   15 +
  20 files changed, 5613 insertions(+), 1 deletion(-)
  create mode 100644 arch/arm/dts/k3-am62-phycore-som-ddr4-2gb.dtsi
  create mode 100644 arch/arm/dts/k3-am62-phycore-som.dtsi
  create mode 100644 arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi
  create mode 100644 arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts
  create mode 100644 arch/arm/dts/k3-am625-phycore-som-binman.dtsi
  create mode 100644 arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts
  create mode 100644 board/phytec/phycore_am62x/Kconfig
  create mode 100644 board/phytec/phycore_am62x/MAINTAINERS
  create mode 100644 board/phytec/phycore_am62x/Makefile
  create mode 100644 board/phytec/phycore_am62x/board-cfg.yaml
  create mode 100644 board/phytec/phycore_am62x/phycore-am62x.c
  create mode 100644 board/phytec/phycore_am62x/phycore_am62x.env
  create mode 100644 board/phytec/phycore_am62x/pm-cfg.yaml
  create mode 100644 board/phytec/phycore_am62x/rm-cfg.yaml
  create mode 100644 board/phytec/phycore_am62x/sec-cfg.yaml
  create mode 100644 configs/phycore_am62x_a53_defconfig
  create mode 100644 configs/phycore_am62x_r5_defconfig
  create mode 100644 include/configs/phycore_am62x.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 55aceb51cd..8b371266dc 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1383,7 +1383,9 @@ dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \
  k3-am625-beagleplay.dtb \
  k3-am625-r5-beagleplay.dtb \
  k3-am625-verdin-wifi-dev.dtb \
- k3-am625-verdin-r5.dtb
+ k3-am625-verdin-r5.dtb \
+ k3-am625-phyboard-lyra-rdk.dtb \
+ k3-am625-r5-phycore-som-2gb.dtb

Thanks for upstreaming Wadim!

However I would prefer that you split all these patches into smaller
chunks for each file (preferrably) or group together files that have
like 20-30 lines of changes.


Hm, seems to be difficult and not really reasonable to split like that.
The big files are generated files or copy pasted from TI's evm. So I do 
not think they need a big attention in the review process.


- All yaml files are identical to TI's evm
- k3-am62-phycore-som-ddr4-2gb.dtsi generated with TI's SysConfig DDR Tool
- k3-am62-phycore-som.dtsi & k3-am625-phyboard-lyra-rdk.dts are 1:1 
copies from vanilla Linux tree


The rest is pretty small and reviewable IMO.

I agree, I should have created a cover letter. I can do that in the next 
series.


Please let me know if you still want me to split it into more patches.
But it would be nice if you could tell me how to split it exactly 
without ending up with broken pieces.


Regards,
Wadim



It's difficult to review thousands of lines of code at once, hope you
understand.

Also would appreciate it if you sent the series with a cover letter
summarising your changes. You can also attach boot logs or any
additional info you may want the people reviewing/ testing the patches to
know in the cover letter.

  
  dtb-$(CONFIG_SOC_K3_AM62A7) += k3-am62a7-sk.dtb \

  k3-am62a7-r5-sk.dtb

[..snip..]

Re: [PATCH v3 0/2] rng: Provide a RNG based on the RISC-V Zkr ISA extension

On 11/1/23 13:49, Andre Przywara wrote:

On Wed, 1 Nov 2023 13:16:24 -0400
Sean Anderson wrote:

Hi Sean,

On 11/1/23 13:05, Andre Przywara wrote:

On Tue, 31 Oct 2023 14:55:50 +0200
Heinrich Schuchardt wrote:

Hi Heinrich,

The Zkr ISA extension (ratified Nov 2021) introduced the seed CSR. It
provides an interface to a physical entropy source.

A RNG driver based on the seed CSR is provided. It depends on
mseccfg.sseed being set in the SBI firmware.

As you might have seen, I added a similar driver for the respective Arm
functionality:
https://lore.kernel.org/u-boot/20230830113230.3925868-1-andre.przyw...@arm.com/

Now the EFI code always picks RNG device 0, which means we don't get
entropy in this case.

If anyone has any idea, I'd be grateful.

Wouldn't the right way be to detect the hardware in bind()?

Yes, that's what I thought as well and tried, but the problem is that for
those "fixed drivers" (the ones using U_BOOT_DRVINFO) returning a
failure in bind() is fatal to the boot sequence:

Model: FVP Base
DRAM: 2 GiB (effective 4 GiB)
No match for driver 'arm-rndr'
initcall failed at call fef3d744 (err=-19)
### ERROR ### Please RESET the board ###

That is what a proper "CPU bus" would probably solve, as I agree that
failing bind() should be the proper solution.

Hm, so maybe this should go in riscv_cpu_bind?

--Sean

Cheers,
Andre

--Sean

Cheers,
Andre

If the seed CSR readable, is not determinable by S-mode without risking
an exception. For safe driver probing allow to resume via a longjmp
after an exception.

As the driver depends on mseccfg.sseed=1 we should wait with merging the
driver until a decision has been taken in the RISC-V PRS TG on prescribing
this.

Setting mseccfg.sseed=1 is queued for OpenSBI [1]. This has been discussed
in the RISC-V Boot & Runtime Services TG. Standardization has to be pursued
via the upcoming platform specification.

A bug fix for QEMU relating to the Zkr extension is available in [2].

A similar Linux driver has been proposed in [3].

[1] lib: sbi: Configure seed bits when MSECCFG is readable

https://patchwork.ozlabs.org/project/opensbi/patch/20230712083254.1585244-1-sa...@rivosinc.com/
[2] [PATCH v2 1/1] target/riscv: correct csr_ops[CSR_MSECCFG]

https://lore.kernel.org/qemu-devel/20231030102105.19501-1-heinrich.schucha...@canonical.com/
[3] [PATCH v4 4/4] RISC-V: Implement archrandom when Zkr is available

https://lore.kernel.org/linux-riscv/20230712084134.1648008-5-sa...@rivosinc.com/

v3:
Add API documentation.
v2:
Catch exception if mseccfg.sseed=0.

Heinrich Schuchardt (2):
riscv: allow resume after exception
rng: Provide a RNG based on the RISC-V Zkr ISA extension

Re: [PATCH RESEND 5/5] clk: ccf: call clock provided ops directly for endisable()


On 8/17/23 13:04, Yang Xiwen via B4 Relay wrote:

From: Yang Xiwen 

Calling into CCF framework will cause a clock being enabled twice
instead of once (clk->enable_count becomes 2 rather than 1), thus making
it hard to disable (needs to call clk_disable() twice).
Fix that by calling clock provided ops directly.


Can you describe this scenario more? From what I can tell, clk_enable doesn't
increment enable_count for CCF clocks.

--Sean


Signed-off-by: Yang Xiwen 
---
  drivers/clk/clk.c | 12 +++-
  1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index a38daaac0c..00d082c46f 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -14,6 +14,7 @@
  #include 
  #include 
  #include 
+#include 
  
  int clk_register(struct clk *clk, const char *drv_name,

 const char *name, const char *parent_name)
@@ -115,11 +116,20 @@ int ccf_clk_set_parent(struct clk *clk, struct clk 
*parent)
  static int ccf_clk_endisable(struct clk *clk, bool enable)
  {
struct clk *c;
+   const struct clk_ops *ops;
int err = clk_get_by_id(clk->id, );
  
  	if (err)

return err;
-   return enable ? clk_enable(c) : clk_disable(c);
+   else
+   ops = clk_dev_ops(c->dev);
+
+   if (enable && ops->enable)
+   return ops->enable(c);
+   else if (!enable && ops->disable)
+   return ops->disable(c);
+
+   return -ENOSYS;
  }
  
  int ccf_clk_enable(struct clk *clk)

[PATCH v2] x86: serial: ns16550: Allow the UART to be silently disabled

U-Boot normally requires a UART. When booting from coreboot it is
sometimes just not available, e.g. when no sysinfo or DBG2 information
is provided.

In this case we need to continue running, since the display can be used.
Add a flag to disable serial for this case.

This allows U-Boot to start up and operation from the display, instead
of hanging on start-up.

This could perhaps be hidden behind a Kconfig option to reduce code
size.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Drop RFC tag since there were no comments

 drivers/serial/ns16550.c | 17 +++--
 drivers/serial/serial_coreboot.c |  1 +
 include/ns16550.h|  1 +
 3 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 6deb1d8ddc5..a0545f37cb6 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -385,6 +385,8 @@ static int ns16550_serial_putc(struct udevice *dev, const 
char ch)
 {
struct ns16550 *const com_port = dev_get_priv(dev);
 
+   if (com_port->plat->flags & NS16550_FLAG_DISABLE)
+   return 0;
if (!(serial_in(_port->lsr) & UART_LSR_THRE))
return -EAGAIN;
serial_out(ch, _port->thr);
@@ -405,6 +407,9 @@ static int ns16550_serial_pending(struct udevice *dev, bool 
input)
 {
struct ns16550 *const com_port = dev_get_priv(dev);
 
+   if (com_port->plat->flags & NS16550_FLAG_DISABLE)
+   return 0;
+
if (input)
return (serial_in(_port->lsr) & UART_LSR_DR) ? 1 : 0;
else
@@ -415,6 +420,9 @@ static int ns16550_serial_getc(struct udevice *dev)
 {
struct ns16550 *const com_port = dev_get_priv(dev);
 
+   if (com_port->plat->flags & NS16550_FLAG_DISABLE)
+   return 0;
+
if (!(serial_in(_port->lsr) & UART_LSR_DR))
return -EAGAIN;
 
@@ -429,7 +437,8 @@ static int ns16550_serial_setbrg(struct udevice *dev, int 
baudrate)
 
clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
 
-   ns16550_setbrg(com_port, clock_divisor);
+   if (!(plat->flags & NS16550_FLAG_DISABLE))
+   ns16550_setbrg(com_port, clock_divisor);
 
return 0;
 }
@@ -442,6 +451,9 @@ static int ns16550_serial_setconfig(struct udevice *dev, 
uint serial_config)
uint bits = SERIAL_GET_BITS(serial_config);
uint stop = SERIAL_GET_STOP(serial_config);
 
+   if (com_port->plat->flags & NS16550_FLAG_DISABLE)
+   return 0;
+
/*
 * only parity config is implemented, check if other serial settings
 * are the default one.
@@ -534,7 +546,8 @@ int ns16550_serial_probe(struct udevice *dev)
reset_deassert_bulk(_bulk);
 
com_port->plat = dev_get_plat(dev);
-   ns16550_init(com_port, -1);
+   if (!(plat->flags & NS16550_FLAG_DISABLE))
+   ns16550_init(com_port, -1);
 
return 0;
 }
diff --git a/drivers/serial/serial_coreboot.c b/drivers/serial/serial_coreboot.c
index 23066e4d054..cdf9afc1739 100644
--- a/drivers/serial/serial_coreboot.c
+++ b/drivers/serial/serial_coreboot.c
@@ -120,6 +120,7 @@ static int coreboot_of_to_plat(struct udevice *dev)
 * there is no UART, which may panic. So stay silent and
 * pray that the video console will work.
 */
+   plat->flags |= NS16550_FLAG_DISABLE;
log_debug("Cannot detect UART\n");
}
 
diff --git a/include/ns16550.h b/include/ns16550.h
index 7f481300083..3c4f3e7539a 100644
--- a/include/ns16550.h
+++ b/include/ns16550.h
@@ -52,6 +52,7 @@ enum ns16550_flags {
NS16550_FLAG_IO = 1 << 0, /* Use I/O access (else mem-mapped) */
NS16550_FLAG_ENDIAN = 1 << 1, /* Use out_le/be_32() */
NS16550_FLAG_BE = 1 << 2, /* Big-endian access (else little) */
+   NS16550_FLAG_DISABLE= BIT(3), /* No output or input */
 };
 
 /**
-- 
2.42.0.820.g83a721a137-goog

Re: [PATCH RESEND 3/5] clk: also handle ENOENT in *_optional functions


On 8/17/23 13:04, Yang Xiwen via B4 Relay wrote:

From: Yang Xiwen 

If the device does not specify any clocks in device tree, these
functions will return PTR_ERR(-ENOENT). This is not the intended
behavior and does not comply with linux kernel CCF. Fix that by
returning NULL under such circumstances instead.

Signed-off-by: Yang Xiwen 
---
  include/clk.h | 8 +---
  1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/include/clk.h b/include/clk.h
index d91285235f..f95da0838d 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -223,9 +223,11 @@ struct clk *devm_clk_get(struct udevice *dev, const char 
*id);
  static inline struct clk *devm_clk_get_optional(struct udevice *dev,
const char *id)
  {
+   int ret;
struct clk *clk = devm_clk_get(dev, id);
  
-	if (PTR_ERR(clk) == -ENODATA)

+   ret = PTR_ERR(clk);
+   if (ret == -ENODATA || ret == -ENOENT)
return NULL;
  
  	return clk;

@@ -335,7 +337,7 @@ static inline int clk_get_by_name_optional(struct udevice 
*dev,
int ret;
  
  	ret = clk_get_by_name(dev, name, clk);

-   if (ret == -ENODATA)
+   if (ret == -ENODATA || ret == -ENOENT)
return 0;
  
  	return ret;

@@ -359,7 +361,7 @@ static inline int clk_get_by_name_nodev_optional(ofnode 
node, const char *name,
int ret;
  
  	ret = clk_get_by_name_nodev(node, name, clk);

-   if (ret == -ENODATA)
+   if (ret == -ENODATA || ret == -ENOENT)
return 0;
  
  	return ret;




Reviewed-by: Sean Anderson

Re: [PATCH RESEND 2/5] clk: call log_debug() instead to avoid console log printing


On 11/1/23 13:55, Sean Anderson wrote:

On 8/17/23 13:04, Yang Xiwen via B4 Relay wrote:

From: Yang Xiwen 

it's a very common case to register a clock without a parent, such as
clk_register_fixed_rate().


Actually, that seems like the only place this is done.


Replace log_error() with log_debug() to avoid
useless console log if not debugging.

Signed-off-by: Yang Xiwen 
---
  drivers/clk/clk.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index a5a3461b66..a38daaac0c 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -24,8 +24,8 @@ int clk_register(struct clk *clk, const char *drv_name,
  ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, );
  if (ret) {
-    log_err("%s: failed to get %s device (parent of %s)\n",
-    __func__, parent_name, name);
+    log_debug("%s: failed to get %s device (parent of %s)\n",
+  __func__, parent_name, name);
  } else {
  log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name,
    parent->name, parent);



I think a correct fix would be

diff --git i/drivers/clk/clk.c w/drivers/clk/clk.c
index a5a3461b66c..cb333c83f66 100644
--- i/drivers/clk/clk.c
+++ w/drivers/clk/clk.c
@@ -18,17 +18,19 @@
  int clk_register(struct clk *clk, const char *drv_name,
  const char *name, const char *parent_name)
  {
-   struct udevice *parent;
+   struct udevice *parent = NULL;
     struct driver *drv;
     int ret;

-   ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, );
-   if (ret) {
-   log_err("%s: failed to get %s device (parent of %s)\n",
-   __func__, parent_name, name);
-   } else {
-   log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name,
- parent->name, parent);
+   if (parent_name) {
+   ret = uclass_get_device_by_name(UCLASS_CLK, parent_name,
+   );
+   if (ret)
+   log_err("%s: failed to get %s device (parent of %s)\n",
+   __func__, parent_name, name);
+   else
+   log_debug("%s: name: %s parent: %s [0x%p]\n", __func__,
+ name, parent->name, parent);
     }

     drv = lists_driver_lookup_name(drv_name);

--Sean


or you could modify the condition to be `if (ret && parent_name)` with 
appropriate
modification of the second debug message.

--Sean

Re: [PATCH RESEND 2/5] clk: call log_debug() instead to avoid console log printing


On 8/17/23 13:04, Yang Xiwen via B4 Relay wrote:

From: Yang Xiwen 

it's a very common case to register a clock without a parent, such as
clk_register_fixed_rate().


Actually, that seems like the only place this is done.


Replace log_error() with log_debug() to avoid
useless console log if not debugging.

Signed-off-by: Yang Xiwen 
---
  drivers/clk/clk.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index a5a3461b66..a38daaac0c 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -24,8 +24,8 @@ int clk_register(struct clk *clk, const char *drv_name,
  
  	ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, );

if (ret) {
-   log_err("%s: failed to get %s device (parent of %s)\n",
-   __func__, parent_name, name);
+   log_debug("%s: failed to get %s device (parent of %s)\n",
+ __func__, parent_name, name);
} else {
log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name,
  parent->name, parent);



I think a correct fix would be

diff --git i/drivers/clk/clk.c w/drivers/clk/clk.c
index a5a3461b66c..cb333c83f66 100644
--- i/drivers/clk/clk.c
+++ w/drivers/clk/clk.c
@@ -18,17 +18,19 @@
 int clk_register(struct clk *clk, const char *drv_name,
 const char *name, const char *parent_name)
 {
-   struct udevice *parent;
+   struct udevice *parent = NULL;
struct driver *drv;
int ret;
 
-   ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, );

-   if (ret) {
-   log_err("%s: failed to get %s device (parent of %s)\n",
-   __func__, parent_name, name);
-   } else {
-   log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name,
- parent->name, parent);
+   if (parent_name) {
+   ret = uclass_get_device_by_name(UCLASS_CLK, parent_name,
+   );
+   if (ret)
+   log_err("%s: failed to get %s device (parent of %s)\n",
+   __func__, parent_name, name);
+   else
+   log_debug("%s: name: %s parent: %s [0x%p]\n", __func__,
+ name, parent->name, parent);
}
 
drv = lists_driver_lookup_name(drv_name);


--Sean

Re: [PATCH RESEND 1/5] clk: export clk_register_mux_table()


On 8/17/23 13:04, Yang Xiwen via B4 Relay wrote:

From: Yang Xiwen 

It's already implemented in clk-mux.c, export it in the header file.

Signed-off-by: Yang Xiwen 
---
  include/linux/clk-provider.h | 6 ++
  1 file changed, 6 insertions(+)

diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index b8acacd49e..801404480b 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -247,6 +247,12 @@ struct clk *clk_register_mux(struct device *dev, const 
char *name,
void __iomem *reg, u8 shift, u8 width,
u8 clk_mux_flags);
  
+struct clk *clk_register_mux_table(struct device *dev, const char *name,

+  const char * const *parent_names, u8 
num_parents,
+  unsigned long flags,
+  void __iomem *reg, u8 shift, u32 mask,
+  u8 clk_mux_flags, u32 *table);
+
  struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
ulong rate);
  



Why do you want to export this? None of your other patches use it.

--Sean

Re: [PATCH v3 0/2] rng: Provide a RNG based on the RISC-V Zkr ISA extension

On Wed, 1 Nov 2023 13:16:24 -0400
Sean Anderson  wrote:

Hi Sean,

> On 11/1/23 13:05, Andre Przywara wrote:
> > On Tue, 31 Oct 2023 14:55:50 +0200
> > Heinrich Schuchardt  wrote:
> > 
> > Hi Heinrich,
> >   
> >> The Zkr ISA extension (ratified Nov 2021) introduced the seed CSR. It
> >> provides an interface to a physical entropy source.
> >>
> >> A RNG driver based on the seed CSR is provided. It depends on
> >> mseccfg.sseed being set in the SBI firmware.  
> > 
> > As you might have seen, I added a similar driver for the respective Arm
> > functionality:
> > https://lore.kernel.org/u-boot/20230830113230.3925868-1-andre.przyw...@arm.com/
> > 
> > And I see that you seem to use the same mechanism to probe and init the
> > driver: U_BOOT_DRVINFO and fail in probe() if the feature is not
> > implemented.
> > One downside of this approach is that the driver is always loaded (and
> > visible in the DM tree), even with the feature not being available.
> > That doesn't seem too much of a problem on the first glance, but it
> > occupies a device number, and any subsequent other DM_RNG devices
> > (like virtio-rng) typically get higher device numbers. So without
> > the feature, but with virtio-rng, I get:
> > VExpress64# rng 0
> > No RNG device
> > VExpress64# rng 1
> > : f3 88 b6 d4 24 da 49 ca 49 f7 9e 66 5f 12 07 b2  $.I.I..f_...
> > 
> > 
> > Now the EFI code always picks RNG device 0, which means we don't get
> > entropy in this case.
> > 
> > Do you have any idea how to solve this?
> > Maybe EFI tries to probe further - but that sounds arbitrary.
> > Or we find another way for probing the device, maybe via some artificial
> > CPU feature "bus"? There is UCLASS_CPU, but that doesn't look helpful?
> > 
> > If anyone has any idea, I'd be grateful.  
> 
> Wouldn't the right way be to detect the hardware in bind()?

Yes, that's what I thought as well and tried, but the problem is that for
those "fixed drivers" (the ones using U_BOOT_DRVINFO) returning a
failure in bind() is fatal to the boot sequence:

Model: FVP Base
DRAM:  2 GiB (effective 4 GiB)
No match for driver 'arm-rndr'
initcall failed at call fef3d744 (err=-19)
### ERROR ### Please RESET the board ###

That is what a proper "CPU bus" would probably solve, as I agree that
failing bind() should be the proper solution.

Cheers,
Andre

> --Sean
> 
> > Cheers,
> > Andre
> >   
> >> If the seed CSR readable, is not determinable by S-mode without risking
> >> an exception. For safe driver probing allow to resume via a longjmp
> >> after an exception.
> >>
> >> As the driver depends on mseccfg.sseed=1 we should wait with merging the
> >> driver until a decision has been taken in the RISC-V PRS TG on prescribing
> >> this.
> >>
> >> Setting mseccfg.sseed=1 is queued for OpenSBI [1]. This has been discussed
> >> in the RISC-V Boot & Runtime Services TG. Standardization has to be pursued
> >> via the upcoming platform specification.
> >>
> >> A bug fix for QEMU relating to the Zkr extension is available in [2].
> >>
> >> A similar Linux driver has been proposed in [3].
> >>
> >> [1] lib: sbi: Configure seed bits when MSECCFG is readable
> >>  
> >> https://patchwork.ozlabs.org/project/opensbi/patch/20230712083254.1585244-1-sa...@rivosinc.com/
> >> [2] [PATCH v2 1/1] target/riscv: correct csr_ops[CSR_MSECCFG]
> >>  
> >> https://lore.kernel.org/qemu-devel/20231030102105.19501-1-heinrich.schucha...@canonical.com/
> >> [3] [PATCH v4 4/4] RISC-V: Implement archrandom when Zkr is available
> >>  
> >> https://lore.kernel.org/linux-riscv/20230712084134.1648008-5-sa...@rivosinc.com/
> >>
> >> v3:
> >>Add API documentation.
> >> v2:
> >>Catch exception if mseccfg.sseed=0.
> >>
> >> Heinrich Schuchardt (2):
> >>riscv: allow resume after exception
> >>rng: Provide a RNG based on the RISC-V Zkr ISA extension
> >>
> >>   arch/riscv/lib/interrupts.c |  13 
> >>   doc/api/index.rst   |   1 +
> >>   drivers/rng/Kconfig |   8 +++
> >>   drivers/rng/Makefile|   1 +
> >>   drivers/rng/riscv_zkr_rng.c | 116 
> >>   include/interrupt.h |  45 ++
> >>   6 files changed, 184 insertions(+)
> >>   create mode 100644 drivers/rng/riscv_zkr_rng.c
> >>   create mode 100644 include/interrupt.h
> >>  
> >   
>

[PATCH] u_boot_pylib: Ensure subprocess is closed down

It isn't clear why we need to have two different paths for closing down
the pipe. Unify them and use the Python to avoid this warning:

  subprocess.py:1127: ResourceWarning: subprocess 83531 is still running

Note that this code appears to originally have come from [1] and was
committed into the ChromeOS chromiumos/platform/crosutils repo in the
bin/cros_image_to_target.py file. The addition of the extra code path
came later, so that is chosen for the fixes tag.

[1] https://codereview.chromium.org/3391008

Signed-off-by: Simon Glass 
Fixes: a10fd93cbc patman: Make command methods return a CommandResult
---

 tools/u_boot_pylib/command.py | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/tools/u_boot_pylib/command.py b/tools/u_boot_pylib/command.py
index 9bbfc5bdd83..bbe95d86122 100644
--- a/tools/u_boot_pylib/command.py
+++ b/tools/u_boot_pylib/command.py
@@ -105,9 +105,7 @@ def run_pipe(pipe_list, infile=None, outfile=None,
 last_pipe.communicate_filter(output_func))
 if result.stdout and oneline:
 result.output = result.stdout.rstrip(b'\r\n')
-result.return_code = last_pipe.wait()
-else:
-result.return_code = os.waitpid(last_pipe.pid, 0)[1]
+result.return_code = last_pipe.wait()
 if raise_on_error and result.return_code:
 raise Exception("Error running '%s'" % user_pipestr)
 return result.to_output(binary)
-- 
2.42.0.820.g83a721a137-goog

Re: [PATCH v3 0/2] rng: Provide a RNG based on the RISC-V Zkr ISA extension

On 11/1/23 13:05, Andre Przywara wrote:

On Tue, 31 Oct 2023 14:55:50 +0200
Heinrich Schuchardt wrote:

Hi Heinrich,

The Zkr ISA extension (ratified Nov 2021) introduced the seed CSR. It
provides an interface to a physical entropy source.

A RNG driver based on the seed CSR is provided. It depends on
mseccfg.sseed being set in the SBI firmware.

As you might have seen, I added a similar driver for the respective Arm
functionality:
https://lore.kernel.org/u-boot/20230830113230.3925868-1-andre.przyw...@arm.com/

Now the EFI code always picks RNG device 0, which means we don't get
entropy in this case.

If anyone has any idea, I'd be grateful.

Wouldn't the right way be to detect the hardware in bind()?

--Sean

Cheers,
Andre

If the seed CSR readable, is not determinable by S-mode without risking
an exception. For safe driver probing allow to resume via a longjmp
after an exception.

As the driver depends on mseccfg.sseed=1 we should wait with merging the
driver until a decision has been taken in the RISC-V PRS TG on prescribing
this.

Setting mseccfg.sseed=1 is queued for OpenSBI [1]. This has been discussed
in the RISC-V Boot & Runtime Services TG. Standardization has to be pursued
via the upcoming platform specification.

A bug fix for QEMU relating to the Zkr extension is available in [2].

A similar Linux driver has been proposed in [3].

[1] lib: sbi: Configure seed bits when MSECCFG is readable

https://patchwork.ozlabs.org/project/opensbi/patch/20230712083254.1585244-1-sa...@rivosinc.com/
[2] [PATCH v2 1/1] target/riscv: correct csr_ops[CSR_MSECCFG]

https://lore.kernel.org/qemu-devel/20231030102105.19501-1-heinrich.schucha...@canonical.com/
[3] [PATCH v4 4/4] RISC-V: Implement archrandom when Zkr is available

https://lore.kernel.org/linux-riscv/20230712084134.1648008-5-sa...@rivosinc.com/

v3:
Add API documentation.
v2:
Catch exception if mseccfg.sseed=0.

Heinrich Schuchardt (2):
riscv: allow resume after exception
rng: Provide a RNG based on the RISC-V Zkr ISA extension

Re: [PATCH v4 8/8] cmd: clk: Make soc_clk_dump static


On 10/17/23 12:56, Igor Prusov wrote:

After introducing dump to clk_ops there is no need to override or expose
this symbol anymore.

Signed-off-by: Igor Prusov 
Reviewed-by: Patrice Chotard 
Tested-by: Patrice Chotard 
---
  cmd/clk.c | 4 ++--
  include/clk.h | 2 --
  2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/cmd/clk.c b/cmd/clk.c
index 90cc6fa906..f55911db7a 100644
--- a/cmd/clk.c
+++ b/cmd/clk.c
@@ -59,7 +59,7 @@ static void show_clks(struct udevice *dev, int depth, int 
last_flag)
}
  }
  
-int __weak soc_clk_dump(void)

+static int soc_clk_dump(void)
  {
struct udevice *dev;
const struct clk_ops *ops;
@@ -81,7 +81,7 @@ int __weak soc_clk_dump(void)
return 0;
  }
  #else
-int __weak soc_clk_dump(void)
+static int soc_clk_dump(void)
  {
puts("Not implemented\n");
return 1;
diff --git a/include/clk.h b/include/clk.h
index d91285235f..bf0d9c9d7f 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -674,8 +674,6 @@ static inline bool clk_valid(struct clk *clk)
return clk && !!clk->dev;
  }
  
-int soc_clk_dump(void);

-
  #endif
  
  #define clk_prepare_enable(clk) clk_enable(clk)


Reviewed-by: Sean Anderson

Re: [PATCH v4 7/8] clk: treewide: switch to clock dump from clk_ops


On 10/17/23 12:56, Igor Prusov wrote:

Switch to using new dump operation in clock provider drivers instead of
overriding soc_clk_dump.

Signed-off-by: Igor Prusov 
Tested-by: Patrice Chotard 
---
  arch/mips/mach-pic32/cpu.c | 23 ---
  drivers/clk/aspeed/clk_ast2600.c   | 13 -
  drivers/clk/clk_k210.c | 11 +++-
  drivers/clk/clk_pic32.c| 39 ++
  drivers/clk/clk_versal.c   |  7 -
  drivers/clk/clk_zynq.c | 19 -
  drivers/clk/clk_zynqmp.c   | 13 -
  drivers/clk/imx/clk-imx8.c | 11 +++-
  drivers/clk/meson/a1.c | 24 
  drivers/clk/mvebu/armada-37xx-periph.c |  5 +++-
  drivers/clk/stm32/clk-stm32mp1.c   | 29 ++-
  11 files changed, 89 insertions(+), 105 deletions(-)

diff --git a/arch/mips/mach-pic32/cpu.c b/arch/mips/mach-pic32/cpu.c
index 7ed306e045..68099dd02f 100644
--- a/arch/mips/mach-pic32/cpu.c
+++ b/arch/mips/mach-pic32/cpu.c
@@ -144,26 +144,3 @@ const char *get_core_name(void)
return str;
  }
  #endif
-#ifdef CONFIG_CMD_CLK
-
-int soc_clk_dump(void)
-{
-   int i;
-
-   printf("PLL Speed: %lu MHz\n",
-  CLK_MHZ(rate(PLLCLK)));
-
-   printf("CPU Speed: %lu MHz\n", CLK_MHZ(rate(PB7CLK)));
-
-   printf("MPLL Speed: %lu MHz\n", CLK_MHZ(rate(MPLL)));
-
-   for (i = PB1CLK; i <= PB7CLK; i++)
-   printf("PB%d Clock Speed: %lu MHz\n", i - PB1CLK + 1,
-  CLK_MHZ(rate(i)));
-
-   for (i = REF1CLK; i <= REF5CLK; i++)
-   printf("REFO%d Clock Speed: %lu MHz\n", i - REF1CLK + 1,
-  CLK_MHZ(rate(i)));
-   return 0;
-}
-#endif
diff --git a/drivers/clk/aspeed/clk_ast2600.c b/drivers/clk/aspeed/clk_ast2600.c
index b3cc8392fa..e1365d3f81 100644
--- a/drivers/clk/aspeed/clk_ast2600.c
+++ b/drivers/clk/aspeed/clk_ast2600.c
@@ -1109,6 +1109,7 @@ struct aspeed_clks {
const char *name;
  };
  
+#if IS_ENABLED(CONFIG_CMD_CLK)

  static struct aspeed_clks aspeed_clk_names[] = {
{ ASPEED_CLK_HPLL, "hpll" },
{ ASPEED_CLK_MPLL, "mpll" },
@@ -1123,18 +1124,12 @@ static struct aspeed_clks aspeed_clk_names[] = {
{ ASPEED_CLK_HUARTX, "huxclk" },
  };
  
-int soc_clk_dump(void)

+static int ast2600_clk_dump(struct udevice *dev)
  {
-   struct udevice *dev;
struct clk clk;
unsigned long rate;
int i, ret;
  
-	ret = uclass_get_device_by_driver(UCLASS_CLK, DM_DRIVER_GET(aspeed_scu),

- );
-   if (ret)
-   return ret;
-
printf("Clk\t\tHz\n");
  
  	for (i = 0; i < ARRAY_SIZE(aspeed_clk_names); i++) {

@@ -1167,11 +1162,15 @@ int soc_clk_dump(void)
  
  	return 0;

  }
+#endif
  
  struct clk_ops ast2600_clk_ops = {

.get_rate = ast2600_clk_get_rate,
.set_rate = ast2600_clk_set_rate,
.enable = ast2600_clk_enable,
+#if IS_ENABLED(CONFIG_CMD_CLK)
+   .dump = ast2600_clk_dump,
+#endif
  };
  
  static int ast2600_clk_probe(struct udevice *dev)

diff --git a/drivers/clk/clk_k210.c b/drivers/clk/clk_k210.c
index 2f17152021..058940b828 100644
--- a/drivers/clk/clk_k210.c
+++ b/drivers/clk/clk_k210.c
@@ -1276,16 +1276,10 @@ static void show_clks(struct k210_clk_priv *priv, int 
id, int depth)
}
  }
  
-int soc_clk_dump(void)

+static int k210_clk_dump(struct udevice *dev)
  {
-   int ret;
-   struct udevice *dev;
struct k210_clk_priv *priv;
  
-	ret = uclass_get_device_by_driver(UCLASS_CLK, DM_DRIVER_GET(k210_clk),

- );
-   if (ret)
-   return ret;
priv = dev_get_priv(dev);
  
  	puts(" Rate  Enabled Name\n");

@@ -1304,6 +1298,9 @@ static const struct clk_ops k210_clk_ops = {
.set_parent = k210_clk_set_parent,
.enable = k210_clk_enable,
.disable = k210_clk_disable,
+#if IS_ENABLED(CONFIG_CMD_CLK)
+   .dump = k210_clk_dump,
+#endif
  };
  
  static int k210_clk_probe(struct udevice *dev)

diff --git a/drivers/clk/clk_pic32.c b/drivers/clk/clk_pic32.c
index ef06a7fb9f..f756fc88f0 100644
--- a/drivers/clk/clk_pic32.c
+++ b/drivers/clk/clk_pic32.c
@@ -20,6 +20,8 @@
  
  DECLARE_GLOBAL_DATA_PTR;
  
+#define CLK_MHZ(x)	((x) / 100)

+
  /* Primary oscillator */
  #define SYS_POSC_CLK_HZ   2400
  
@@ -385,9 +387,46 @@ static ulong pic32_set_rate(struct clk *clk, ulong rate)

return rate;
  }
  
+#if IS_ENABLED(CONFIG_CMD_CLK)

+static int pic32_dump(struct udevice *dev)
+{
+   int i;
+   struct clk clk;
+
+   clk.dev = dev;
+
+   clk.id = PLLCLK;
+   printf("PLL Speed: %lu MHz\n",
+  CLK_MHZ(pic32_get_rate()));
+
+   clk.id = PB7CLK;
+   printf("CPU Speed: %lu MHz\n", CLK_MHZ(pic32_get_rate()));
+
+   clk.id = MPLL;
+   printf("MPLL Speed: %lu MHz\n", CLK_MHZ(pic32_get_rate()));
+

Re: [PATCH v4 3/8] clk: k210: Move soc_clk_dump function


On 10/17/23 12:56, Igor Prusov wrote:

Move clock dump function to avoid forward declaration after switching to
dump in clk_ops.

Signed-off-by: Igor Prusov 
---
  drivers/clk/clk_k210.c | 92 +-
  1 file changed, 46 insertions(+), 46 deletions(-)

diff --git a/drivers/clk/clk_k210.c b/drivers/clk/clk_k210.c
index c534cc07e0..2f17152021 100644
--- a/drivers/clk/clk_k210.c
+++ b/drivers/clk/clk_k210.c
@@ -1238,52 +1238,6 @@ static int k210_clk_request(struct clk *clk)
return 0;
  }
  
-static const struct clk_ops k210_clk_ops = {

-   .request = k210_clk_request,
-   .set_rate = k210_clk_set_rate,
-   .get_rate = k210_clk_get_rate,
-   .set_parent = k210_clk_set_parent,
-   .enable = k210_clk_enable,
-   .disable = k210_clk_disable,
-};
-
-static int k210_clk_probe(struct udevice *dev)
-{
-   int ret;
-   struct k210_clk_priv *priv = dev_get_priv(dev);
-
-   priv->base = dev_read_addr_ptr(dev_get_parent(dev));
-   if (!priv->base)
-   return -EINVAL;
-
-   ret = clk_get_by_index(dev, 0, >in0);
-   if (ret)
-   return ret;
-
-   /*
-* Force setting defaults, even before relocation. This is so we can
-* set the clock rate for PLL1 before we relocate into aisram.
-*/
-   if (!(gd->flags & GD_FLG_RELOC))
-   clk_set_defaults(dev, CLK_DEFAULTS_POST_FORCE);
-
-   return 0;
-}
-
-static const struct udevice_id k210_clk_ids[] = {
-   { .compatible = "canaan,k210-clk" },
-   { },
-};
-
-U_BOOT_DRIVER(k210_clk) = {
-   .name = "k210_clk",
-   .id = UCLASS_CLK,
-   .of_match = k210_clk_ids,
-   .ops = _clk_ops,
-   .probe = k210_clk_probe,
-   .priv_auto = sizeof(struct k210_clk_priv),
-};
-
  #if IS_ENABLED(CONFIG_CMD_CLK)
  static char show_enabled(struct k210_clk_priv *priv, int id)
  {
@@ -1342,3 +1296,49 @@ int soc_clk_dump(void)
return 0;
  }
  #endif
+
+static const struct clk_ops k210_clk_ops = {
+   .request = k210_clk_request,
+   .set_rate = k210_clk_set_rate,
+   .get_rate = k210_clk_get_rate,
+   .set_parent = k210_clk_set_parent,
+   .enable = k210_clk_enable,
+   .disable = k210_clk_disable,
+};
+
+static int k210_clk_probe(struct udevice *dev)
+{
+   int ret;
+   struct k210_clk_priv *priv = dev_get_priv(dev);
+
+   priv->base = dev_read_addr_ptr(dev_get_parent(dev));
+   if (!priv->base)
+   return -EINVAL;
+
+   ret = clk_get_by_index(dev, 0, >in0);
+   if (ret)
+   return ret;
+
+   /*
+* Force setting defaults, even before relocation. This is so we can
+* set the clock rate for PLL1 before we relocate into aisram.
+*/
+   if (!(gd->flags & GD_FLG_RELOC))
+   clk_set_defaults(dev, CLK_DEFAULTS_POST_FORCE);
+
+   return 0;
+}
+
+static const struct udevice_id k210_clk_ids[] = {
+   { .compatible = "canaan,k210-clk" },
+   { },
+};
+
+U_BOOT_DRIVER(k210_clk) = {
+   .name = "k210_clk",
+   .id = UCLASS_CLK,
+   .of_match = k210_clk_ids,
+   .ops = _clk_ops,
+   .probe = k210_clk_probe,
+   .priv_auto = sizeof(struct k210_clk_priv),
+};


Reviewed-by: Sean Anderson

Re: [PATCH v3 0/4] sunxi: SPL FIT support for 32-bit sunxi SoCs

2023-11-01 Thread Jesse T

On Tue, Oct 31, 2023 at 1:18 AM Samuel Holland  wrote:
>
> This series makes the necessary changes so 32-bit sunxi SoCs can load
> additional device trees or firmware from SPL along with U-Boot proper.
> Crust (SCP firmware) has support for A33 and H3, and H3 also needs to
> load an eGon blob to support CPU 0 hotplug (a silicon bug workaround).
>
> FIT unlocks more features (signatures, multiple DTBs, etc.), so enable
> it by default. A10 (sun4i) only has 24 KiB of SRAM A1, so it needs
> SPL_FIT_IMAGE_TINY. For consistency, enable that option everywhere.
>
> After this series is applied, we can increase SPL_MAX_SIZE for H6 and
> newer SoCs, both 32-bit (e.g. A50, T113) and 64-bit. I did not do that
> yet because there is some discussion to be had about the correct value:
> it must be adjusted to guarantee return-to-FEL functionality, and the
> exact adjustment depends on the sunxi-fel tool implementation.
>
> Changes in v3:
>  - Rebased and collected tags
>
> Changes in v2:
>  - Disable padding from SPL_PAD_TO
>  - Rely on binman min-size instead of using explicit offsets
>  - Use Kconfig for firmware addresses instead of an #ifdef staircase
>
> Samuel Holland (4):
>   sunxi: spl: Disable padding from SPL_PAD_TO
>   sunxi: binman: Move BL31 and SCP firmware addresses to Kconfig
>   sunxi: binman: Support FIT generation for 32-bit SoCs
>   sunxi: Enable SPL FIT loading for 32-bit SoCs
>
>  arch/arm/Kconfig   |  1 +
>  arch/arm/dts/sunxi-u-boot.dtsi | 39 ++
>  arch/arm/mach-sunxi/Kconfig| 17 +++
>  common/spl/Kconfig |  6 ++
>  4 files changed, 41 insertions(+), 22 deletions(-)
>
> --
> 2.41.0
>

Acked-by: Jesse Taube 

Looks good!

Re: [PATCH v4 5/8] clk: Add dump operation to clk_ops


On 10/17/23 12:56, Igor Prusov wrote:

This adds dump function to struct clk_ops which should replace
soc_clk_dump. It allows clock drivers to provide custom dump
implementation without overriding generic CCF dump function.

Signed-off-by: Igor Prusov 
Reviewed-by: Patrice Chotard 
Tested-by: Patrice Chotard 
---
  include/clk-uclass.h | 3 +++
  1 file changed, 3 insertions(+)

diff --git a/include/clk-uclass.h b/include/clk-uclass.h
index a22f1a5d84..30621e4823 100644
--- a/include/clk-uclass.h
+++ b/include/clk-uclass.h
@@ -39,6 +39,9 @@ struct clk_ops {
int (*set_parent)(struct clk *clk, struct clk *parent);
int (*enable)(struct clk *clk);
int (*disable)(struct clk *clk);
+#if IS_ENABLED(CONFIG_CMD_CLK)
+   int (*dump)(struct udevice *dev);
+#endif
  };
  
  #if 0 /* For documentation only */


Please add documentation.

--Sean

Re: [PATCH v4 6/8] cmd: clk: Use dump function from clk_ops


On 10/17/23 12:56, Igor Prusov wrote:

Add another loop to dump additional info from clock providers that
implement dump operation.

Signed-off-by: Igor Prusov 
Reviewed-by: Patrice Chotard 
Tested-by: Patrice Chotard 
---
  cmd/clk.c | 9 +
  1 file changed, 9 insertions(+)

diff --git a/cmd/clk.c b/cmd/clk.c
index c7c379d7a6..90cc6fa906 100644
--- a/cmd/clk.c
+++ b/cmd/clk.c
@@ -62,6 +62,7 @@ static void show_clks(struct udevice *dev, int depth, int 
last_flag)
  int __weak soc_clk_dump(void)
  {
struct udevice *dev;
+   const struct clk_ops *ops;
  
  	printf(" Rate   Usecnt  Name\n");

printf("--\n");
@@ -69,6 +70,14 @@ int __weak soc_clk_dump(void)
uclass_foreach_dev_probe(UCLASS_CLK, dev)
show_clks(dev, -1, 0);
  
+	uclass_foreach_dev_probe(UCLASS_CLK, dev) {

+   ops = dev_get_driver_ops(dev);
+   if (ops && ops->dump) {
+   printf("--\n");
+   ops->dump(dev);
+   }
+   }
+
return 0;
  }
  #else


So this produces output like

=> clk dump
 Rate   Usecnt  Name
--
 2600 0|-- osc
--
 Rate  Enabled Name

 2600  y   osc
 78000 y   pll0
 39000 -   aclk
 39000 y   cpu
 39000 y   sram0
 39000 y   sram1
 780   -   clint
 19500 y   apb0
 19500 y   gpio
 19500 y   uart1
 19500 y   uart2
 19500 y   uart3
 19500 y   fpioa
 19500 y   sha
 19500 y   apb1
 19500 y   aes
 19500 y   otp
 19500 y   apb2
 19500 y   rom
 39000 y   dma
 39000 y   dvp
 39000 y   fft
 39000 y   spi0
 39000 y   spi1
 39000 y   spi2
 9750  y   spi3
 39000 y   i2c0
 39000 y   i2c1
 39000 y   i2c2
 39000 y   timer0
 39000 y   timer1
 39000 y   timer2
 39000 y   pll1
 39000 y   ai
 0 n   pll2
 0 y   i2s0
 0 y   i2s1
 0 y   i2s2
 0 -   i2s0_m
 0 -   i2s1_m
 0 -   i2s2_m
 1300  y   wdt0
 1300  n   wdt1
 2600  n   rtc

And TBH I don't think it's particularly clear (at least at a glance) where
one clock ends and another begins. I think something like

diff --git i/cmd/clk.c w/cmd/clk.c
index f55911db7a3..7bbcbfeda33 100644
--- i/cmd/clk.c
+++ w/cmd/clk.c
@@ -73,7 +73,7 @@ static int soc_clk_dump(void)
uclass_foreach_dev_probe(UCLASS_CLK, dev) {
ops = dev_get_driver_ops(dev);
if (ops && ops->dump) {
-   printf("--\n");
+   printf("\n%s %s:\n", dev->driver->name, dev->name);
ops->dump(dev);
}
}

would work a lot better. This produces an output like

=> clk dump
 Rate   Usecnt  Name
--
 2600 0|-- osc

k210_clk clock-controller:
 Rate  Enabled Name

 2600  y   osc
 78000 y   pll0
 39000 -   aclk
 39000 y   cpu
 39000 y   sram0
 39000 y   sram1


which I think makes it clearer that we have a new clock tree getting dumped.

This also doesn't really address multiple interacting clock trees (such as
e.g. if I had another clock derived from a k210_clk in the above example)
but at least it's a start.

--Sean

Re: [PATCH v3 0/2] rng: Provide a RNG based on the RISC-V Zkr ISA extension

On Tue, 31 Oct 2023 14:55:50 +0200
Heinrich Schuchardt  wrote:

Hi Heinrich,

> The Zkr ISA extension (ratified Nov 2021) introduced the seed CSR. It
> provides an interface to a physical entropy source.
> 
> A RNG driver based on the seed CSR is provided. It depends on
> mseccfg.sseed being set in the SBI firmware.

As you might have seen, I added a similar driver for the respective Arm
functionality:
https://lore.kernel.org/u-boot/20230830113230.3925868-1-andre.przyw...@arm.com/

And I see that you seem to use the same mechanism to probe and init the
driver: U_BOOT_DRVINFO and fail in probe() if the feature is not
implemented.
One downside of this approach is that the driver is always loaded (and
visible in the DM tree), even with the feature not being available.
That doesn't seem too much of a problem on the first glance, but it
occupies a device number, and any subsequent other DM_RNG devices
(like virtio-rng) typically get higher device numbers. So without
the feature, but with virtio-rng, I get:
VExpress64# rng 0
No RNG device
VExpress64# rng 1
: f3 88 b6 d4 24 da 49 ca 49 f7 9e 66 5f 12 07 b2  $.I.I..f_...

Now the EFI code always picks RNG device 0, which means we don't get
entropy in this case.

Do you have any idea how to solve this?
Maybe EFI tries to probe further - but that sounds arbitrary.
Or we find another way for probing the device, maybe via some artificial
CPU feature "bus"? There is UCLASS_CPU, but that doesn't look helpful?

If anyone has any idea, I'd be grateful.

Cheers,
Andre

> If the seed CSR readable, is not determinable by S-mode without risking
> an exception. For safe driver probing allow to resume via a longjmp
> after an exception.
> 
> As the driver depends on mseccfg.sseed=1 we should wait with merging the
> driver until a decision has been taken in the RISC-V PRS TG on prescribing
> this.
> 
> Setting mseccfg.sseed=1 is queued for OpenSBI [1]. This has been discussed
> in the RISC-V Boot & Runtime Services TG. Standardization has to be pursued
> via the upcoming platform specification.
> 
> A bug fix for QEMU relating to the Zkr extension is available in [2].
> 
> A similar Linux driver has been proposed in [3].
> 
> [1] lib: sbi: Configure seed bits when MSECCFG is readable
> 
> https://patchwork.ozlabs.org/project/opensbi/patch/20230712083254.1585244-1-sa...@rivosinc.com/
> [2] [PATCH v2 1/1] target/riscv: correct csr_ops[CSR_MSECCFG]
> 
> https://lore.kernel.org/qemu-devel/20231030102105.19501-1-heinrich.schucha...@canonical.com/
> [3] [PATCH v4 4/4] RISC-V: Implement archrandom when Zkr is available
> 
> https://lore.kernel.org/linux-riscv/20230712084134.1648008-5-sa...@rivosinc.com/
> 
> v3:
>   Add API documentation.
> v2:
>   Catch exception if mseccfg.sseed=0.
> 
> Heinrich Schuchardt (2):
>   riscv: allow resume after exception
>   rng: Provide a RNG based on the RISC-V Zkr ISA extension
> 
>  arch/riscv/lib/interrupts.c |  13 
>  doc/api/index.rst   |   1 +
>  drivers/rng/Kconfig |   8 +++
>  drivers/rng/Makefile|   1 +
>  drivers/rng/riscv_zkr_rng.c | 116 
>  include/interrupt.h |  45 ++
>  6 files changed, 184 insertions(+)
>  create mode 100644 drivers/rng/riscv_zkr_rng.c
>  create mode 100644 include/interrupt.h
>

[PATCH 2/2] configs: Add am62x_beagleplay_* defconfigs

Add am62x_beagleplay_r5_defconfig for R5 SPL and
am62x_beagleplay_a53_defconfig for A53 SPL and U-Boot support.

These defconfigs are composite defconfigs built from the config fragment
board/ti/am62x/beagleplay_*.config applied onto the base
am62x_evm_*_defconfig.

Signed-off-by: Andrew Davis 
Reviewed-by: Simon Glass 
---
 configs/am62x_beagleplay_a53_defconfig | 3 +++
 configs/am62x_beagleplay_r5_defconfig  | 3 +++
 2 files changed, 6 insertions(+)
 create mode 100644 configs/am62x_beagleplay_a53_defconfig
 create mode 100644 configs/am62x_beagleplay_r5_defconfig

diff --git a/configs/am62x_beagleplay_a53_defconfig 
b/configs/am62x_beagleplay_a53_defconfig
new file mode 100644
index 000..ad708e15397
--- /dev/null
+++ b/configs/am62x_beagleplay_a53_defconfig
@@ -0,0 +1,3 @@
+// The BeaglePlay defconfig for A53 core
+#include "configs/am62x_evm_a53_defconfig"
+#include "board/ti/am62x/beagleplay_a53.config"
diff --git a/configs/am62x_beagleplay_r5_defconfig 
b/configs/am62x_beagleplay_r5_defconfig
new file mode 100644
index 000..276b1f81a3e
--- /dev/null
+++ b/configs/am62x_beagleplay_r5_defconfig
@@ -0,0 +1,3 @@
+// The BeaglePlay defconfig for R5 core
+#include "configs/am62x_evm_r5_defconfig"
+#include "board/ti/am62x/beagleplay_r5.config"
-- 
2.39.2

[PATCH 1/2] Makefile: Run defconfig files through the C preprocessor

This allows us to use some of the normal preprocessor directives inside
defconfig files. Such as #define and #include.

Signed-off-by: Andrew Davis 
Reviewed-by: Simon Glass 
---
 scripts/kconfig/Makefile | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile
index 2d97aab8d21..5ce5845e824 100644
--- a/scripts/kconfig/Makefile
+++ b/scripts/kconfig/Makefile
@@ -93,7 +93,8 @@ endif
 endif
 
 %_defconfig: $(obj)/conf
-   $(Q)$< $(silent) --defconfig=arch/$(SRCARCH)/configs/$@ $(Kconfig)
+   $(Q)$(CPP) -nostdinc -I $(srctree) -undef -x assembler-with-cpp 
$(srctree)/arch/$(SRCARCH)/configs/$@ -o generated_defconfig
+   $(Q)$< $(silent) --defconfig=generated_defconfig $(Kconfig)
 
 # Added for U-Boot (backward compatibility)
 %_config: %_defconfig
-- 
2.39.2

[PATCH 0/2] Allow defconfigs defined from fragments

Hello all,

For context see thread ending here[0].

Thanks,
Andrew

Changes from RFC[1]:
 - Added Reviewed-by

[0] https://marc.info/?l=u-boot=169333616210919=2
[1] https://lists.denx.de/pipermail/u-boot/2023-August/529084.html

Andrew Davis (2):
  Makefile: Run defconfig files through the C preprocessor
  configs: Add am62x_beagleplay_* defconfigs

 configs/am62x_beagleplay_a53_defconfig | 3 +++
 configs/am62x_beagleplay_r5_defconfig  | 3 +++
 scripts/kconfig/Makefile   | 3 ++-
 3 files changed, 8 insertions(+), 1 deletion(-)
 create mode 100644 configs/am62x_beagleplay_a53_defconfig
 create mode 100644 configs/am62x_beagleplay_r5_defconfig

-- 
2.39.2

[PATCH 01/20] m68k: Remove CONFIG_FSLDMAFEC

There are no platforms which enable this feature, so remove it.

Signed-off-by: Tom Rini 
---
Cc: Angelo Dureghello 
---
 arch/m68k/include/asm/fsl_mcdmafec.h |  151 --
 arch/m68k/include/asm/immap.h|   15 -
 arch/m68k/lib/fec.c  |4 +-
 drivers/dma/Kconfig  |1 -
 drivers/dma/MCD_dmaApi.c | 1010 ---
 drivers/dma/MCD_tasks.c  | 2413 --
 drivers/dma/MCD_tasksInit.c  |  225 ---
 drivers/dma/Makefile |1 -
 drivers/net/Kconfig  |8 -
 drivers/net/Makefile |1 -
 drivers/net/fsl_mcdmafec.c   |  592 ---
 include/MCD_dma.h|  369 
 include/MCD_progCheck.h  |   10 -
 include/MCD_tasksInit.h  |   43 -
 14 files changed, 2 insertions(+), 4841 deletions(-)
 delete mode 100644 arch/m68k/include/asm/fsl_mcdmafec.h
 delete mode 100644 drivers/dma/MCD_dmaApi.c
 delete mode 100644 drivers/dma/MCD_tasks.c
 delete mode 100644 drivers/dma/MCD_tasksInit.c
 delete mode 100644 drivers/net/fsl_mcdmafec.c
 delete mode 100644 include/MCD_dma.h
 delete mode 100644 include/MCD_progCheck.h
 delete mode 100644 include/MCD_tasksInit.h

diff --git a/arch/m68k/include/asm/fsl_mcdmafec.h 
b/arch/m68k/include/asm/fsl_mcdmafec.h
deleted file mode 100644
index de6c548fafd7..
--- a/arch/m68k/include/asm/fsl_mcdmafec.h
+++ /dev/null
@@ -1,151 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * fsl_mcdmafec.h -- Multi-channel DMA Fast Ethernet Controller definitions
- *
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- * TsiChung Liew (tsi-chung.l...@freescale.com)
- */
-
-#ifndef fsl_mcdmafec_h
-#define fsl_mcdmafec_h
-
-/* Re-use of the definitions */
-#include 
-
-typedef struct fecdma {
-   u32 rsvd0;  /* 0x000 */
-   u32 eir;/* 0x004 */
-   u32 eimr;   /* 0x008 */
-   u32 rsvd1[6];   /* 0x00C - 0x023 */
-   u32 ecr;/* 0x024 */
-   u32 rsvd2[6];   /* 0x028 - 0x03F */
-   u32 mmfr;   /* 0x040 */
-   u32 mscr;   /* 0x044 */
-   u32 rsvd3[7];   /* 0x048 - 0x063 */
-   u32 mibc;   /* 0x064 */
-   u32 rsvd4[7];   /* 0x068 - 0x083 */
-   u32 rcr;/* 0x084 */
-   u32 rhr;/* 0x088 */
-   u32 rsvd5[14];  /* 0x08C - 0x0C3 */
-   u32 tcr;/* 0x0C4 */
-   u32 rsvd6[7];   /* 0x0C8 - 0x0E3 */
-   u32 palr;   /* 0x0E4 */
-   u32 paur;   /* 0x0E8 */
-   u32 opd;/* 0x0EC */
-   u32 rsvd7[10];  /* 0x0F0 - 0x117 */
-   u32 iaur;   /* 0x118 */
-   u32 ialr;   /* 0x11C */
-   u32 gaur;   /* 0x120 */
-   u32 galr;   /* 0x124 */
-   u32 rsvd8[7];   /* 0x128 - 0x143 */
-   u32 tfwr;   /* 0x144 */
-   u32 rsvd9[14];  /* 0x148 - 0x17F */
-   u32 fmc;/* 0x180 */
-   u32 rfdr;   /* 0x184 */
-   u32 rfsr;   /* 0x188 */
-   u32 rfcr;   /* 0x18C */
-   u32 rlrfp;  /* 0x190 */
-   u32 rlwfp;  /* 0x194 */
-   u32 rfar;   /* 0x198 */
-   u32 rfrp;   /* 0x19C */
-   u32 rfwp;   /* 0x1A0 */
-   u32 tfdr;   /* 0x1A4 */
-   u32 tfsr;   /* 0x1A8 */
-   u32 tfcr;   /* 0x1AC */
-   u32 tlrfp;  /* 0x1B0 */
-   u32 tlwfp;  /* 0x1B4 */
-   u32 tfar;   /* 0x1B8 */
-   u32 tfrp;   /* 0x1BC */
-   u32 tfwp;   /* 0x1C0 */
-   u32 frst;   /* 0x1C4 */
-   u32 ctcwr;  /* 0x1C8 */
-} fecdma_t;
-
-struct fec_info_dma {
-   int index;
-   u32 iobase;
-   u32 pinmux;
-   u32 miibase;
-   int phy_addr;
-   int dup_spd;
-   char *phy_name;
-   int phyname_init;
-   cbd_t *rxbd;/* Rx BD */
-   cbd_t *txbd;/* Tx BD */
-   uint rx_idx;
-   uint tx_idx;
-   char *txbuf;
-   int initialized;
-   struct fec_info_dma *next;
-   u16 rx_task;/* DMA receive Task Number */
-   u16 tx_task;/* DMA Transmit Task Number */
-   u16 rx_pri; /* DMA Receive Priority */
-   u16 tx_pri; /* DMA Transmit Priority */
-   u16 rx_init;/* DMA Receive Initiator */
-   u16 tx_init;/* DMA Transmit Initiator */
-   u16 used_tbd_idx;   /* next transmit BD to clean */
-   u16 clean_tbd_num;  /* the number of available transmit BDs */
-   int to_loop;
-   struct mii_dev *bus;
-};
-
-/* Bit definitions and macros for IEVENT */
-#define FEC_EIR_TXERR

[PATCH 17/20] ti: k3: Drop usage

None of these files need  to be included, drop it.

Signed-off-by: Tom Rini 
---
 arch/arm/mach-k3/am62ax/am62a_qos_data.c | 1 -
 arch/arm/mach-k3/am642_init.c| 1 -
 arch/arm/mach-k3/am654_init.c| 1 -
 arch/arm/mach-k3/arm64-mmu.c | 1 -
 arch/arm/mach-k3/common.c| 1 -
 arch/arm/mach-k3/j721e_init.c| 1 -
 arch/arm/mach-k3/j721s2_init.c   | 1 -
 arch/arm/mach-k3/r5_mpu.c| 1 -
 arch/arm/mach-k3/security.c  | 1 -
 arch/arm/mach-k3/sysfw-loader.c  | 1 -
 board/ti/am62ax/evm.c| 1 -
 board/ti/am64x/evm.c | 1 -
 board/ti/am65x/evm.c | 1 -
 board/ti/j721e/evm.c | 1 -
 board/ti/j721s2/evm.c| 1 -
 15 files changed, 15 deletions(-)

diff --git a/arch/arm/mach-k3/am62ax/am62a_qos_data.c 
b/arch/arm/mach-k3/am62ax/am62a_qos_data.c
index 01b76f7493c3..38db4f2f5c8e 100644
--- a/arch/arm/mach-k3/am62ax/am62a_qos_data.c
+++ b/arch/arm/mach-k3/am62ax/am62a_qos_data.c
@@ -5,7 +5,6 @@
  *
  * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
  */
-#include 
 #include 
 #include "common.h"
 
diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
index c871e92330bc..6085379f1db1 100644
--- a/arch/arm/mach-k3/am642_init.c
+++ b/arch/arm/mach-k3/am642_init.c
@@ -7,7 +7,6 @@
  * Dave Gerlach 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-k3/am654_init.c b/arch/arm/mach-k3/am654_init.c
index 0d3889cde2ba..2c5d6334527c 100644
--- a/arch/arm/mach-k3/am654_init.c
+++ b/arch/arm/mach-k3/am654_init.c
@@ -6,7 +6,6 @@
  * Lokesh Vutla 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
index f8087d2421e7..14e7c896f915 100644
--- a/arch/arm/mach-k3/arm64-mmu.c
+++ b/arch/arm/mach-k3/arm64-mmu.c
@@ -9,7 +9,6 @@
  *
  */
 
-#include 
 #include 
 #include 
 
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index c3006ba387ec..eff2fff3c706 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -6,7 +6,6 @@
  * Lokesh Vutla 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index b1f7e25ed092..099301d61ac0 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++ b/arch/arm/mach-k3/j721e_init.c
@@ -6,7 +6,6 @@
  * Lokesh Vutla 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-k3/j721s2_init.c b/arch/arm/mach-k3/j721s2_init.c
index a5be84b147c0..7d4481009041 100644
--- a/arch/arm/mach-k3/j721s2_init.c
+++ b/arch/arm/mach-k3/j721s2_init.c
@@ -6,7 +6,6 @@
  * David Huang 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-k3/r5_mpu.c b/arch/arm/mach-k3/r5_mpu.c
index 2aec96277e6f..6786e7e1e5af 100644
--- a/arch/arm/mach-k3/r5_mpu.c
+++ b/arch/arm/mach-k3/r5_mpu.c
@@ -6,7 +6,6 @@
  * Lokesh Vutla 
  */
 
-#include 
 #include 
 #include 
 #include "common.h"
diff --git a/arch/arm/mach-k3/security.c b/arch/arm/mach-k3/security.c
index 89659f479eed..3b7c26c6125a 100644
--- a/arch/arm/mach-k3/security.c
+++ b/arch/arm/mach-k3/security.c
@@ -7,7 +7,6 @@
  */
 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/sysfw-loader.c
index ef245fef9c4b..aa401ae3a09e 100644
--- a/arch/arm/mach-k3/sysfw-loader.c
+++ b/arch/arm/mach-k3/sysfw-loader.c
@@ -6,7 +6,6 @@
  * Andreas Dannenberg 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/ti/am62ax/evm.c b/board/ti/am62ax/evm.c
index f2dd3b4192ee..cd3360a43029 100644
--- a/board/ti/am62ax/evm.c
+++ b/board/ti/am62ax/evm.c
@@ -8,7 +8,6 @@
 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/ti/am64x/evm.c b/board/ti/am64x/evm.c
index a080b2b0d258..a6dcff2eb434 100644
--- a/board/ti/am64x/evm.c
+++ b/board/ti/am64x/evm.c
@@ -7,7 +7,6 @@
  *
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c
index 8bb13ef5b2b3..97a70954b232 100644
--- a/board/ti/am65x/evm.c
+++ b/board/ti/am65x/evm.c
@@ -7,7 +7,6 @@
  *
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index d4f7c1d9f938..de9034206ae9 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -7,7 +7,6 @@
  *
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index 7795300abc80..7a911381094a 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -7,7 +7,6 @@
  *
  */
 
-#include 
 #include 
 #include 
 #include 
-- 
2.34.1

[PATCH 20/20] x86: Drop from remaining header files

None of these header files need to include  so we can just
drop that entirely.

Signed-off-by: Tom Rini 
---
 arch/x86/include/asm/arch-slimbootloader/slimbootloader.h | 1 -
 arch/x86/include/asm/dma-mapping.h| 1 -
 2 files changed, 2 deletions(-)

diff --git a/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h 
b/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
index 05dd1b2b4471..460bfc4f2d4f 100644
--- a/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
+++ b/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
@@ -6,7 +6,6 @@
 #ifndef __SLIMBOOTLOADER_ARCH_H__
 #define __SLIMBOOTLOADER_ARCH_H__
 
-#include 
 #include 
 
 /**
diff --git a/arch/x86/include/asm/dma-mapping.h 
b/arch/x86/include/asm/dma-mapping.h
index 8be1003e6baf..c79ec64afd7a 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -7,7 +7,6 @@
 #ifndef __ASM_X86_DMA_MAPPING_H
 #define __ASM_X86_DMA_MAPPING_H
 
-#include 
 #include 
 #include 
 #include 
-- 
2.34.1

[PATCH 19/20] arm: Drop from remaining header files

None of these header files need to include  so we can just
drop that entirely.

Signed-off-by: Tom Rini 
---
 arch/arm/mach-davinci/include/mach/dm365_lowlevel.h | 1 -
 arch/arm/mach-ipq40xx/pinctrl-snapdragon.h  | 2 --
 arch/arm/mach-keystone/include/mach/mux-k2g.h   | 1 -
 arch/arm/mach-mvebu/include/mach/efuse.h| 2 --
 arch/arm/mach-tegra/xusb-padctl-common.h| 1 -
 arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h| 1 -
 6 files changed, 8 deletions(-)

diff --git a/arch/arm/mach-davinci/include/mach/dm365_lowlevel.h 
b/arch/arm/mach-davinci/include/mach/dm365_lowlevel.h
index eb1488e74425..0cd13d8aaa59 100644
--- a/arch/arm/mach-davinci/include/mach/dm365_lowlevel.h
+++ b/arch/arm/mach-davinci/include/mach/dm365_lowlevel.h
@@ -8,7 +8,6 @@
 #ifndef __DM365_LOWLEVEL_H
 #define __DM365_LOWLEVEL_H
 
-#include 
 #include 
 #include 
 
diff --git a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h 
b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h
index 2341a713495d..b4823a309fce 100644
--- a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h
+++ b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h
@@ -8,8 +8,6 @@
 #ifndef _PINCTRL_SNAPDRAGON_H
 #define _PINCTRL_SNAPDRAGON_H
 
-#include 
-
 struct msm_pinctrl_data {
int pin_count;
int functions_count;
diff --git a/arch/arm/mach-keystone/include/mach/mux-k2g.h 
b/arch/arm/mach-keystone/include/mach/mux-k2g.h
index 67d47f817216..dfb5ad43506a 100644
--- a/arch/arm/mach-keystone/include/mach/mux-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/mux-k2g.h
@@ -9,7 +9,6 @@
 #ifndef __ASM_ARCH_MUX_K2G_H
 #define __ASM_ARCH_MUX_K2G_H
 
-#include 
 #include 
 
 #define K2G_PADCFG_REG (KS2_DEVICE_STATE_CTRL_BASE + 0x1000)
diff --git a/arch/arm/mach-mvebu/include/mach/efuse.h 
b/arch/arm/mach-mvebu/include/mach/efuse.h
index b125c30beb8c..fd8ebceb26cf 100644
--- a/arch/arm/mach-mvebu/include/mach/efuse.h
+++ b/arch/arm/mach-mvebu/include/mach/efuse.h
@@ -6,8 +6,6 @@
 #ifndef _MVEBU_EFUSE_H
 #define _MVEBU_EFUSE_H
 
-#include 
-
 struct efuse_val {
union {
struct {
diff --git a/arch/arm/mach-tegra/xusb-padctl-common.h 
b/arch/arm/mach-tegra/xusb-padctl-common.h
index e3fd613f2be1..a576e6f61658 100644
--- a/arch/arm/mach-tegra/xusb-padctl-common.h
+++ b/arch/arm/mach-tegra/xusb-padctl-common.h
@@ -6,7 +6,6 @@
 #ifndef _TEGRA_XUSB_PADCTL_COMMON_H_
 #define _TEGRA_XUSB_PADCTL_COMMON_H_
 
-#include 
 #include 
 #include 
 
diff --git a/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h 
b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h
index 434a7fa20e43..783d7c45c7ba 100644
--- a/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h
+++ b/arch/arm/mach-zynqmp/include/mach/psu_init_gpl.h
@@ -4,7 +4,6 @@
 #define _PSU_INIT_GPL_H_
 
 #include 
-#include 
 
 int mask_pollonvalue(unsigned long add, u32 mask, u32 value);
 
-- 
2.34.1

[PATCH 18/20] sandbox: Drop

None of these headers need  to be included, drop it.

Signed-off-by: Tom Rini 
---
 arch/sandbox/include/asm/clk.h  | 1 -
 arch/sandbox/include/asm/mbox.h | 2 --
 arch/sandbox/include/asm/power-domain.h | 2 --
 arch/sandbox/include/asm/reset.h| 2 --
 4 files changed, 7 deletions(-)

diff --git a/arch/sandbox/include/asm/clk.h b/arch/sandbox/include/asm/clk.h
index df7156fe3174..2b7dbca8f755 100644
--- a/arch/sandbox/include/asm/clk.h
+++ b/arch/sandbox/include/asm/clk.h
@@ -6,7 +6,6 @@
 #ifndef __SANDBOX_CLK_H
 #define __SANDBOX_CLK_H
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/sandbox/include/asm/mbox.h b/arch/sandbox/include/asm/mbox.h
index 70f36d7afef6..499e9a67f6ac 100644
--- a/arch/sandbox/include/asm/mbox.h
+++ b/arch/sandbox/include/asm/mbox.h
@@ -6,8 +6,6 @@
 #ifndef __SANDBOX_MBOX_H
 #define __SANDBOX_MBOX_H
 
-#include 
-
 #define SANDBOX_MBOX_PING_XOR 0x12345678
 
 struct udevice;
diff --git a/arch/sandbox/include/asm/power-domain.h 
b/arch/sandbox/include/asm/power-domain.h
index 1845bc8d3baf..4d5e861dbce2 100644
--- a/arch/sandbox/include/asm/power-domain.h
+++ b/arch/sandbox/include/asm/power-domain.h
@@ -6,8 +6,6 @@
 #ifndef __SANDBOX_POWER_DOMAIN_H
 #define __SANDBOX_POWER_DOMAIN_H
 
-#include 
-
 struct udevice;
 
 int sandbox_power_domain_query(struct udevice *dev, unsigned long id);
diff --git a/arch/sandbox/include/asm/reset.h b/arch/sandbox/include/asm/reset.h
index 40d3e61c110a..f0709b41c09f 100644
--- a/arch/sandbox/include/asm/reset.h
+++ b/arch/sandbox/include/asm/reset.h
@@ -6,8 +6,6 @@
 #ifndef __SANDBOX_RESET_H
 #define __SANDBOX_RESET_H
 
-#include 
-
 struct udevice;
 
 int sandbox_reset_query(struct udevice *dev, unsigned long id);
-- 
2.34.1

[PATCH 16/20] include: Drop from include lists

At this point, we don't need to have  be included because of
properties in the header itself, it only includes other common header
files. We've also audited the code enough at this point that we can drop
 from being included in headers and rely on code to have the
correct inclusions themselves, or at least .

Signed-off-by: Tom Rini 
---
 include/bootcount.h   | 1 -
 include/dfu.h | 1 -
 include/efi_loader.h  | 1 -
 include/efi_selftest.h| 1 -
 include/fm_eth.h  | 1 -
 include/fs.h  | 1 -
 include/fsl-mc/fsl_mc.h   | 1 -
 include/fsl_errata.h  | 1 -
 include/fsl_ifc.h | 1 -
 include/fsl_sec.h | 1 -
 include/fsl_sec_mon.h | 1 -
 include/fsl_sfp.h | 1 -
 include/iotrace.h | 1 -
 include/key_matrix.h  | 1 -
 include/libata.h  | 1 -
 include/linux/mtd/spinand.h   | 1 -
 include/linux/usb/composite.h | 1 -
 include/miiphy.h  | 1 -
 include/mv88e6352.h   | 1 -
 include/net/ncsi.h| 1 -
 include/palmas.h  | 1 -
 include/post.h| 1 -
 include/spi.h | 1 -
 include/tegra-kbc.h   | 1 -
 include/twl4030.h | 1 -
 include/twl6030.h | 1 -
 include/ubi_uboot.h   | 1 -
 include/usbdevice.h   | 1 -
 28 files changed, 28 deletions(-)

diff --git a/include/bootcount.h b/include/bootcount.h
index bfa5d4642764..bc06e17c9fb7 100644
--- a/include/bootcount.h
+++ b/include/bootcount.h
@@ -6,7 +6,6 @@
 #ifndef _BOOTCOUNT_H__
 #define _BOOTCOUNT_H__
 
-#include 
 #include 
 #include 
 #include 
diff --git a/include/dfu.h b/include/dfu.h
index 0794ef19..68b5ca46ce54 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -10,7 +10,6 @@
 #ifndef __DFU_ENTITY_H_
 #define __DFU_ENTITY_H_
 
-#include 
 #include 
 #include 
 #include 
diff --git a/include/efi_loader.h b/include/efi_loader.h
index e24410505f40..247be060e1c0 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -8,7 +8,6 @@
 #ifndef _EFI_LOADER_H
 #define _EFI_LOADER_H 1
 
-#include 
 #include 
 #include 
 #include 
diff --git a/include/efi_selftest.h b/include/efi_selftest.h
index 7c69c3f37610..5bcebb368287 100644
--- a/include/efi_selftest.h
+++ b/include/efi_selftest.h
@@ -8,7 +8,6 @@
 #ifndef _EFI_SELFTEST_H
 #define _EFI_SELFTEST_H
 
-#include 
 #include 
 #include 
 #include 
diff --git a/include/fm_eth.h b/include/fm_eth.h
index 8b133e703b40..f30110817c78 100644
--- a/include/fm_eth.h
+++ b/include/fm_eth.h
@@ -7,7 +7,6 @@
 #ifndef __FM_ETH_H__
 #define __FM_ETH_H__
 
-#include 
 #include 
 #include 
 
diff --git a/include/fs.h b/include/fs.h
index e341a0ed01bf..ef540e7c23de 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -5,7 +5,6 @@
 #ifndef _FS_H
 #define _FS_H
 
-#include 
 #include 
 
 struct cmd_tbl;
diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h
index de2bba93ecf4..71907bc73c5f 100644
--- a/include/fsl-mc/fsl_mc.h
+++ b/include/fsl-mc/fsl_mc.h
@@ -7,7 +7,6 @@
 #ifndef __FSL_MC_H__
 #define __FSL_MC_H__
 
-#include 
 #include 
 
 struct bd_info;
diff --git a/include/fsl_errata.h b/include/fsl_errata.h
index 88f4268658a1..44547645df87 100644
--- a/include/fsl_errata.h
+++ b/include/fsl_errata.h
@@ -6,7 +6,6 @@
 #ifndef _FSL_ERRATA_H
 #define _FSL_ERRATA_H
 
-#include 
 #if defined(CONFIG_PPC)
 #include 
 #elif defined(CONFIG_ARCH_LS1021A)
diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h
index de1e70a6d0ba..f9a0a7017d4a 100644
--- a/include/fsl_ifc.h
+++ b/include/fsl_ifc.h
@@ -9,7 +9,6 @@
 
 #ifdef CONFIG_FSL_IFC
 #include 
-#include 
 #include 
 #ifdef CONFIG_ARM
 #include 
diff --git a/include/fsl_sec.h b/include/fsl_sec.h
index 9dad1d1ec473..8c5e59c5b1ca 100644
--- a/include/fsl_sec.h
+++ b/include/fsl_sec.h
@@ -9,7 +9,6 @@
 #ifndef __FSL_SEC_H
 #define __FSL_SEC_H
 
-#include 
 #include 
 
 #ifdef CONFIG_SYS_FSL_SEC_LE
diff --git a/include/fsl_sec_mon.h b/include/fsl_sec_mon.h
index 3092a0ea62a0..248d5b6d4211 100644
--- a/include/fsl_sec_mon.h
+++ b/include/fsl_sec_mon.h
@@ -8,7 +8,6 @@
 #ifndef __FSL_SEC_MON_H
 #define __FSL_SEC_MON_H
 
-#include 
 #include 
 
 #ifdef CONFIG_SYS_FSL_SEC_MON_LE
diff --git a/include/fsl_sfp.h b/include/fsl_sfp.h
index e7674c1bff2a..0dec69a7235d 100644
--- a/include/fsl_sfp.h
+++ b/include/fsl_sfp.h
@@ -6,7 +6,6 @@
 #ifndef _FSL_SFP_SNVS_
 #define _FSL_SFP_SNVS_
 
-#include 
 #include 
 #include 
 
diff --git a/include/iotrace.h b/include/iotrace.h
index 7ff2e8332b0b..d5610426cc84 100644
--- a/include/iotrace.h
+++ b/include/iotrace.h
@@ -6,7 +6,6 @@
 #ifndef __IOTRACE_H
 #define __IOTRACE_H
 
-//#include 
 #include 
 
 /* Support up to the machine word length for now */
diff --git a/include/key_matrix.h b/include/key_matrix.h
index e7420b9d7956..17f5d12cdd9f 100644
--- a/include/key_matrix.h
+++ b/include/key_matrix.h
@@ -8,7 +8,6 @@
 #ifndef _KEY_MATRIX_H
 #define _KEY_MATRIX_H
 
-#include 
 
 /* Information about a matrix

[PATCH 15/20] include/linux/mii.h: Add

As this file uses u8/u16 we need to bring in  here.

Signed-off-by: Tom Rini 
---
 include/linux/mii.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/linux/mii.h b/include/linux/mii.h
index 49e29ac314a5..70689bc53d76 100644
--- a/include/linux/mii.h
+++ b/include/linux/mii.h
@@ -9,6 +9,8 @@
 #ifndef __LINUX_MII_H__
 #define __LINUX_MII_H__
 
+#include 
+
 /* Generic MII registers. */
 #define MII_BMCR   0x00/* Basic mode control register */
 #define MII_BMSR   0x01/* Basic mode status register  */
-- 
2.34.1

[PATCH 14/20] fsl-mc: Add prototype for bd_info

As the functions fsl_mc_ldpaa_init/fsl_mc_ldpaa_exit take a bd_info as
an argument, add a struct bd_info to this header file rather than add
 to the overall chain.

Signed-off-by: Tom Rini 
---
 include/fsl-mc/fsl_mc.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h
index 258738dfc8c2..de2bba93ecf4 100644
--- a/include/fsl-mc/fsl_mc.h
+++ b/include/fsl-mc/fsl_mc.h
@@ -10,6 +10,8 @@
 #include 
 #include 
 
+struct bd_info;
+
 #define MC_CCSR_BASE_ADDR \
((struct mc_ccsr_registers __iomem *)0x834)
 
-- 
2.34.1

[PATCH 13/20] ls2080aqds: Add missing headers to eth_ls1088aqds.c

As we call sprintf in this file we need to include vsprintf.h in order
to get the function prototype and we need linux/string.h for strcmp.

Signed-off-by: Tom Rini 
---
 board/freescale/ls2080aqds/eth.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index 0d0d5de15623..048ab44c5919 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -3,6 +3,8 @@
  * Copyright 2015 Freescale Semiconductor, Inc.
  */
 
+#include 
+#include 
 #include 
 #include 
 #include 
-- 
2.34.1

[PATCH 12/20] ls1088a: Add missing headers to eth_ls1088aqds.c

As we call sprintf in this file we need to include vsprintf.h in order
to get the function prototype and we need linux/string.h for strcmp.

Signed-off-by: Tom Rini 
---
 board/freescale/ls1088a/eth_ls1088aqds.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c 
b/board/freescale/ls1088a/eth_ls1088aqds.c
index f62f5fd27450..2fece3a1b09b 100644
--- a/board/freescale/ls1088a/eth_ls1088aqds.c
+++ b/board/freescale/ls1088a/eth_ls1088aqds.c
@@ -3,6 +3,8 @@
  * Copyright 2017 NXP
  */
 
+#include 
+#include 
 #include 
 #include 
 #include 
-- 
2.34.1

[PATCH 11/20] pg-wcom-ls102xa: Include in the board file

Given that this file references CFG_* defines, we need to be explicit in
our inclusion of config.h, so that these will be defined.

Signed-off-by: Tom Rini 
---
Cc: Aleksandar Gerasimovski 
Cc: Rainer Boschung 
---
 board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c 
b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
index 01786d938de1..cc3611e2dec1 100644
--- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
+++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
@@ -3,6 +3,7 @@
  * Copyright 2020 Hitachi Power Grids. All rights reserved.
  */
 
+#include 
 #include 
 #include 
 #include 
-- 
2.34.1

[PATCH 10/20] powerpc: Rework includes

This file should not include  nor should it include 
so remove both.

Signed-off-by: Tom Rini 
---
 arch/powerpc/include/asm/fsl_lbc.h | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/powerpc/include/asm/fsl_lbc.h 
b/arch/powerpc/include/asm/fsl_lbc.h
index a03f091c3059..95f0f559b4cd 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -6,9 +6,6 @@
 #ifndef __ASM_PPC_FSL_LBC_H
 #define __ASM_PPC_FSL_LBC_H
 
-#include 
-#include 
-
 #ifdef CONFIG_MPC85xx
 void lbc_sdram_init(void);
 #endif
-- 
2.34.1

[PATCH 09/20] qe: Add on PowerPC

This driver needs  when building on PowerPC, add it.

Signed-off-by: Tom Rini 
---
 drivers/qe/qe.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 736dd8558b60..9631337b8d9d 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -23,6 +23,9 @@
 #include 
 #include 
 #endif
+#ifdef CONFIG_PPC
+#include 
+#endif
 
 #define MPC85xx_DEVDISR_QE_DISABLE 0x1
 
-- 
2.34.1

[PATCH 07/20] powerpc: mpc83xx: Rework includes slightly

In order to not rely on common.h providing a number of common includes,
cleanup what we include directly in order to be able to drop common.h
later.

Signed-off-by: Tom Rini 
---
 arch/powerpc/cpu/mpc83xx/cpu_init.c | 2 ++
 arch/powerpc/cpu/mpc83xx/start.S| 1 +
 include/mpc83xx.h   | 2 --
 3 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c 
b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 8e6d3d28fc63..340f9a0da56c 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -18,6 +18,8 @@
 #ifdef CONFIG_QE
 #include 
 #endif
+#include 
+#include 
 
 #include "lblaw/lblaw.h"
 #include "elbc/elbc.h"
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index d72d3147f63d..ceb548678946 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -20,6 +20,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include "hrcw/hrcw.h"
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 5926c8090a48..aa8803413cd5 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -6,8 +6,6 @@
 #ifndef __MPC83XX_H__
 #define __MPC83XX_H__
 
-#include 
-#include 
 #if defined(CONFIG_E300)
 #include 
 #endif
-- 
2.34.1

[PATCH 08/20] mpc85xx: Add missing include in mpc85xx_sleep.c

This file needs the include file that provides the prototypes for
flush_dcache() and others.

Signed-off-by: Tom Rini 
---
 board/freescale/common/mpc85xx_sleep.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/board/freescale/common/mpc85xx_sleep.c 
b/board/freescale/common/mpc85xx_sleep.c
index 770fa0d62be5..d4ca278e8831 100644
--- a/board/freescale/common/mpc85xx_sleep.c
+++ b/board/freescale/common/mpc85xx_sleep.c
@@ -4,6 +4,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include "sleep.h"
-- 
2.34.1

[PATCH 06/20] spi: Add to spi-mem-nodm.c

This file uses errno return values in functions, so include 
here rather than rely on indirect inclusion.

Signed-off-by: Tom Rini 
---
 drivers/spi/spi-mem-nodm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/spi-mem-nodm.c b/drivers/spi/spi-mem-nodm.c
index 77ddb19a9f32..f9cadcc026dc 100644
--- a/drivers/spi/spi-mem-nodm.c
+++ b/drivers/spi/spi-mem-nodm.c
@@ -3,6 +3,7 @@
  * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
  */
 
+#include 
 #include 
 #include 
 #include 
-- 
2.34.1

[PATCH 04/20] fsl_qe: Drop common.h

In both include/fsl_qe.h and then also remove common.h from the files
which had included fsl_qe.h

Signed-off-by: Tom Rini 
---
 arch/powerpc/cpu/mpc83xx/cpu_init.c | 1 -
 arch/powerpc/cpu/mpc85xx/cpu_init.c | 1 -
 board/freescale/common/arm_sleep.c  | 1 -
 board/freescale/common/mpc85xx_sleep.c  | 1 -
 board/freescale/ls1021aqds/ls1021aqds.c | 1 -
 board/freescale/ls1021atsn/ls1021atsn.c | 1 -
 board/freescale/ls1021atwr/ls1021atwr.c | 1 -
 board/freescale/ls1043ardb/ls1043ardb.c | 1 -
 board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c | 1 -
 drivers/net/fm/fm.c | 1 -
 drivers/net/qe/uccf.c   | 1 -
 drivers/qe/fdt.c| 1 -
 drivers/qe/qe.c | 1 -
 include/fsl_qe.h| 1 -
 14 files changed, 14 deletions(-)

diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c 
b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index f5cb000de6bf..8e6d3d28fc63 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2004-2009 Freescale Semiconductor, Inc.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c 
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 96183ac2c84b..b770d294e616 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -9,7 +9,6 @@
  * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/freescale/common/arm_sleep.c 
b/board/freescale/common/arm_sleep.c
index 46ffd817b44b..228f07502f7a 100644
--- a/board/freescale/common/arm_sleep.c
+++ b/board/freescale/common/arm_sleep.c
@@ -3,7 +3,6 @@
  * Copyright 2014 Freescale Semiconductor, Inc.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/freescale/common/mpc85xx_sleep.c 
b/board/freescale/common/mpc85xx_sleep.c
index d3323b9ec1e5..770fa0d62be5 100644
--- a/board/freescale/common/mpc85xx_sleep.c
+++ b/board/freescale/common/mpc85xx_sleep.c
@@ -3,7 +3,6 @@
  * Copyright 2014 Freescale Semiconductor, Inc.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c 
b/board/freescale/ls1021aqds/ls1021aqds.c
index a618ce11a584..930ef6be3850 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -4,7 +4,6 @@
  * Copyright 2019, 2021 NXP
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/freescale/ls1021atsn/ls1021atsn.c 
b/board/freescale/ls1021atsn/ls1021atsn.c
index d0e4e796c606..b7e043b2e62f 100644
--- a/board/freescale/ls1021atsn/ls1021atsn.c
+++ b/board/freescale/ls1021atsn/ls1021atsn.c
@@ -1,7 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /* Copyright 2016-2019, 2021 NXP
  */
-#include 
 #include 
 #include 
 #include 
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c 
b/board/freescale/ls1021atwr/ls1021atwr.c
index 27b9d79e5f0b..78006afce869 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -4,7 +4,6 @@
  * Copyright 2019, 2021-2022 NXP
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c 
b/board/freescale/ls1043ardb/ls1043ardb.c
index 18869d8c1df5..cf84ff9e638e 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -4,7 +4,6 @@
  * Copyright 2021-2022 NXP
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c 
b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
index 21c21aac221f..01786d938de1 100644
--- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
+++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
@@ -3,7 +3,6 @@
  * Copyright 2020 Hitachi Power Grids. All rights reserved.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c
index 7dfa82190949..a8caa0f0927d 100644
--- a/drivers/net/fm/fm.c
+++ b/drivers/net/fm/fm.c
@@ -3,7 +3,6 @@
  * Copyright 2009-2011 Freescale Semiconductor, Inc.
  * Dave Liu 
  */
-#include 
 #include 
 #include 
 #include 
diff --git a/drivers/net/qe/uccf.c b/drivers/net/qe/uccf.c
index 306f1ea1db68..00848a1a37d7 100644
--- a/drivers/net/qe/uccf.c
+++ b/drivers/net/qe/uccf.c
@@ -6,7 +6,6 @@
  * based on source code of Shlomi Gridish
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/drivers/qe/fdt.c b/drivers/qe/fdt.c
index 6195c7c4442c..fa9e40655603 100644
--- a/drivers/qe/fdt.c
+++ b/drivers/qe/fdt.c
@@ -6,7 +6,6 @@
  * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 2825dc6f9aa6..736dd8558b60 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -6,7 +6,6 @@
  * based on source code of Shlomi

[PATCH 05/20] omap3: Add to

The include  references values in  and
so include it directly here rather than rely on indirect inclusion.

Signed-off-by: Tom Rini 
---
 arch/arm/include/asm/arch-omap3/cpu.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/include/asm/arch-omap3/cpu.h 
b/arch/arm/include/asm/arch-omap3/cpu.h
index 3f0182e7665b..d2fbf919a5bb 100644
--- a/arch/arm/include/asm/arch-omap3/cpu.h
+++ b/arch/arm/include/asm/arch-omap3/cpu.h
@@ -7,6 +7,7 @@
 #ifndef _CPU_H
 #define _CPU_H
 
+#include 
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include 
 #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
-- 
2.34.1

[PATCH 03/20] display_options.h: Correct includes

First, a header should never include itself so remove that. Second, this
header needs  to be included as the function prototypes
use types that we get via that header.

Signed-off-by: Tom Rini 
---
 include/display_options.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/display_options.h b/include/display_options.h
index 85dacbc75902..66e596077370 100644
--- a/include/display_options.h
+++ b/include/display_options.h
@@ -9,6 +9,8 @@
 #ifndef __DISPLAY_OPTIONS_H
 #define __DISPLAY_OPTIONS_H
 
+#include 
+
 /**
  * print_size() - Print a size with a suffix
  *
@@ -19,7 +21,6 @@
  * @size:  Size to print
  * @suffix String to print after the size
  */
-#include 
 void print_size(uint64_t size, const char *suffix);
 
 /**
-- 
2.34.1

[PATCH 02/20] powerpc: Switch to

In matching other architectures that have their global_data.h need to
bring in a types.h header, switch to  on PowerPC.

Signed-off-by: Tom Rini 
---
 arch/powerpc/include/asm/global_data.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/global_data.h 
b/arch/powerpc/include/asm/global_data.h
index 6ed21c781fe4..43d71f5caec0 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -9,7 +9,7 @@
 #define __ASM_GBL_DATA_H
 
 #include 
-#include "asm/types.h"
+#include 
 
 /* Architecture-specific global data */
 struct arch_global_data {
-- 
2.34.1

Re: [PATCH] bootstd: Skip over bad device during bootflows scanning

Hi Tony,

On Tue, 31 Oct 2023 at 13:45, Tony Dinh  wrote:
>
> On Tue, Oct 31, 2023 at 12:26 PM Tony Dinh  wrote:
> >
> > Hi Simon,
> >
> > On Mon, Oct 30, 2023 at 12:47 PM Tony Dinh  wrote:
> > >
> > > During scanning for the next bootdev, if bootdev_next_prio() encounters
> > > a device error (e.g. ENOSYS), let it continue scanning the next devices,
> > > not stopping prematurely.
> > >
> > > Background:
> > >
> > > During scanning for bootflows, it's possible for bootstd to encounter a
> > > faulty device controller. Also when the same u-boot is used for another
> > > variant of the same board, some device controller such as SATA might
> > > not exist.
> > >
> > > I've found this issue while converting the Marvell Sheevaplug board to
> > > use bootstd. This board has 2 variants, the original Sheevaplug has MMC 
> > > and
> > > USB only, but the later variant comes with USB, MMC, and eSATA ports. We
> > > have been using the same u-boot (starting with CONFIG_IDE and later with 
> > > DM
> > > CONFIG_SATA) for both variants. This worked well with the old
> > > envs-scripting booting scheme.
> > >
> > > Signed-off-by: Tony Dinh 
> > > ---
> > >
> > >  boot/bootdev-uclass.c | 2 --
> > >  1 file changed, 2 deletions(-)
> > >
> > > diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c
> > > index 44ae98a926..b1d48e5b69 100644
> > > --- a/boot/bootdev-uclass.c
> > > +++ b/boot/bootdev-uclass.c
> > > @@ -677,8 +677,6 @@ int bootdev_next_prio(struct bootflow_iter *iter, 
> > > struct udevice **devp)
> > > BOOTFLOWIF_SHOW);
> > > log_debug("- bootdev_hunt_prio() ret 
> > > %d\n",
> > >   ret);
> > > -   if (ret)
> > > -   return log_msg_ret("hun", ret);
> > > }
> > > } else {
> > > ret = device_probe(dev);
> > > --
> > > 2.39.2
> > >
> >
> > Per your request, here is the console trace log when the device error
> > occurs. Perhaps we could improve bootdev_next_prio() to make the error
> > status more visible in the console with printf? I've briefly looked at
> > other device bootdev hunt drivers and did not see enough console
> > output for this type of error, so it might be better that we have this
> > output either in bootdev_next_prio() or bootdev_hunt_drv().
> >
> > 
> > U-Boot 2024.01-rc1-tld-1-3-gd697d7b93a-dirty (Oct 26 2023 - 16:17:16 
> > -0700)
> > Marvell-Sheevaplug
> >
> > SoC:   Kirkwood 88F6281_A0
> > DRAM:  512 MiB
> > Core:  17 devices, 12 uclasses, devicetree: separate
> > NAND:  512 MiB
> > MMC:   338-uclass_find_device_by_seq() 0
> > 346-uclass_find_device_by_seq()- 0 'mvsdio@9'
> > 349-uclass_find_device_by_seq()- found
> > 252-  mvebu_mmc_power_up() mvebu_mmc mvsdio@9: power up
> > 399-mvebu_mmc_initialize() mvebu_mmc mvsdio@9: mvebu_mmc_initialize
> > 338-uclass_find_device_by_seq() 1
> > 346-uclass_find_device_by_seq()- 0 'mvsdio@9'
> > 353-uclass_find_device_by_seq()- not found
> > mvsdio@9: 0
> > Loading Environment from NAND... 338-uclass_find_device_by_seq() 0
> > 346-uclass_find_device_by_seq()- 0 'ethernet-controller@72000'
> > 349-uclass_find_device_by_seq()- found
> > OK
> > In:serial
> > Out:   serial
> > Err:   serial
> > Net:   eth0: ethernet-controller@72000
> > Hit any key to stop autoboot:  0
> >
> > => env def -a
> > ## Resetting to default environment
> >
> > => bootflow scan -l
> > Scanning for bootflows in all bootdevs
> > Seq  Method   State   UclassPart  Name  Filename
> > ---  ---  --      
> > 
> > 338-uclass_find_device_by_seq() 0
> > 346-uclass_find_device_by_seq()- 0 'extlinux'
> > 349-uclass_find_device_by_seq()- found
> > 338-uclass_find_device_by_seq() 1
> > 346-uclass_find_device_by_seq()- 0 'extlinux'
> > 346-uclass_find_device_by_seq()- 1 'script'
> > 349-uclass_find_device_by_seq()- found
> > 338-uclass_find_device_by_seq() 2
> > 346-uclass_find_device_by_seq()- 0 'extlinux'
> > 346-uclass_find_device_by_seq()- 1 'script'
> > 346-uclass_find_device_by_seq()- 2 'pxe'
> > 349-uclass_find_device_by_seq()- found
> > 871-   bootdev_hunt_prio() Hunting for priority 1
> > 883-   bootdev_hunt_prio() exit 0
> > 715-  bootdev_setup_iter() - bootdev_hunt_prio() ret 0
> > 83-bootstd_get_bootdev_order() - targets  
> > 746-  bootdev_setup_iter() setup labels 
> > 641-   bootdev_next_prio() next prio 0: dev=/none
> > 659-   bootdev_next_prio() - ethernet-control...@72000.boo: 6, want 0
> > 659-   bootdev_next_prio() - mvsdio@9.bootdev: 2, want 0
> > 668-   bootdev_next_prio() None found at prio 0, moving to 1
> > 871-   bootdev_hunt_prio() Hunting for priority 1
> > 883-   bootdev_hunt_prio() exit 0
> > 678-

Re: [PATCH 1/2] board: phytec: am62x: Add PHYTEC phyCORE-AM62x SoM

2023-11-01 Thread Dhruva Gole

Hi,

On Oct 31, 2023 at 14:37:31 +0100, Wadim Egorov wrote:
> Add basic support for PHYTEC phyCORE-AM62x SoM.
> 
> Supported features:
>   - 2GB DDR4 RAM
>   - eMMC Flash
>   - OSPI NOR Flash
>   - external uSD
>   - Ethernet
>   - debug UART
> 
> Product page SoM: https://www.phytec.com/product/phycore-am62x
> 
> Signed-off-by: Wadim Egorov 
> ---
>  arch/arm/dts/Makefile |4 +-
>  .../arm/dts/k3-am62-phycore-som-ddr4-2gb.dtsi | 2190 +
>  arch/arm/dts/k3-am62-phycore-som.dtsi |  324 +++
>  .../k3-am625-phyboard-lyra-rdk-u-boot.dtsi|  229 ++
>  arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts   |  266 ++
>  arch/arm/dts/k3-am625-phycore-som-binman.dtsi |  532 
>  arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts  |  134 +
>  arch/arm/mach-k3/Kconfig  |1 +
>  board/phytec/phycore_am62x/Kconfig|   52 +
>  board/phytec/phycore_am62x/MAINTAINERS|   15 +
>  board/phytec/phycore_am62x/Makefile   |8 +
>  board/phytec/phycore_am62x/board-cfg.yaml |   36 +
>  board/phytec/phycore_am62x/phycore-am62x.c|   59 +
>  board/phytec/phycore_am62x/phycore_am62x.env  |   23 +
>  board/phytec/phycore_am62x/pm-cfg.yaml|   12 +
>  board/phytec/phycore_am62x/rm-cfg.yaml| 1088 
>  board/phytec/phycore_am62x/sec-cfg.yaml   |  379 +++
>  configs/phycore_am62x_a53_defconfig   |  116 +
>  configs/phycore_am62x_r5_defconfig|  131 +
>  include/configs/phycore_am62x.h   |   15 +
>  20 files changed, 5613 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/k3-am62-phycore-som-ddr4-2gb.dtsi
>  create mode 100644 arch/arm/dts/k3-am62-phycore-som.dtsi
>  create mode 100644 arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi
>  create mode 100644 arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts
>  create mode 100644 arch/arm/dts/k3-am625-phycore-som-binman.dtsi
>  create mode 100644 arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts
>  create mode 100644 board/phytec/phycore_am62x/Kconfig
>  create mode 100644 board/phytec/phycore_am62x/MAINTAINERS
>  create mode 100644 board/phytec/phycore_am62x/Makefile
>  create mode 100644 board/phytec/phycore_am62x/board-cfg.yaml
>  create mode 100644 board/phytec/phycore_am62x/phycore-am62x.c
>  create mode 100644 board/phytec/phycore_am62x/phycore_am62x.env
>  create mode 100644 board/phytec/phycore_am62x/pm-cfg.yaml
>  create mode 100644 board/phytec/phycore_am62x/rm-cfg.yaml
>  create mode 100644 board/phytec/phycore_am62x/sec-cfg.yaml
>  create mode 100644 configs/phycore_am62x_a53_defconfig
>  create mode 100644 configs/phycore_am62x_r5_defconfig
>  create mode 100644 include/configs/phycore_am62x.h
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 55aceb51cd..8b371266dc 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -1383,7 +1383,9 @@ dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \
> k3-am625-beagleplay.dtb \
> k3-am625-r5-beagleplay.dtb \
> k3-am625-verdin-wifi-dev.dtb \
> -   k3-am625-verdin-r5.dtb
> +   k3-am625-verdin-r5.dtb \
> +   k3-am625-phyboard-lyra-rdk.dtb \
> +   k3-am625-r5-phycore-som-2gb.dtb

Thanks for upstreaming Wadim!

However I would prefer that you split all these patches into smaller
chunks for each file (preferrably) or group together files that have
like 20-30 lines of changes.

It's difficult to review thousands of lines of code at once, hope you
understand.

Also would appreciate it if you sent the series with a cover letter
summarising your changes. You can also attach boot logs or any
additional info you may want the people reviewing/ testing the patches to
know in the cover letter.

>  
>  dtb-$(CONFIG_SOC_K3_AM62A7) += k3-am62a7-sk.dtb \
> k3-am62a7-r5-sk.dtb
[..snip..]

-- 
Best regards,
Dhruva Gole

Re: [PATCH v2 0/4] Add AM62x LP SK support

2023-11-01 Thread Nishanth Menon

On 16:31-20231030, Nitin Yadav wrote:
> This series adds support of AM62x LP SK. The AM62x LP SK board
> is similar to AM62x SK but has some significant changes that
> requires different set of device tree at each stage of bootloader.
> Also refactors to have common nodes at k3-am62x-r5-sk-common.dtsi
> and k3-am62x-sk-common-u-boot.dtsi for all am62x SoC varients.
> 
> Change Log:
> 
> V1 -> V2:
>  - Added deltas for board documentation.
>  - Updated commit messgae to include board schematics.
>  - Replace 'bootph-pre-ram' from 'bootph-all' in u-boot.dtsi
>  - Removed memory node from k3-am62-r5-lp-sk.dts
>  - Updated DDR part on k3-am62x-ddr-lp4-50-800-800.dtsi
>  - Squashed binman.dtsi into k3-am62-lp-sk-u-boot.dtsi
>  - Removed am62xlpsk.env environment, for now using am62.env
> 
> V1: https://lore.kernel.org/all/20230927082105.3729470-1-n-ya...@ti.com/
> 
> Nitin Yadav (4):
>   arm: dts: Refactor common dtsi file for R5 and A53 SPL
>   arm: dts: Add support for AM62x LP SK
>   board: ti: am62x: add am62x_lpsk_*_defconfigs fragments
>   doc: ti: Add AM62x LP SK Board information
> 
>  arch/arm/dts/Makefile |2 +
>  arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi|   32 +
>  arch/arm/dts/k3-am62-lp-sk.dts|  231 ++
>  arch/arm/dts/k3-am62-r5-lp-sk.dts |   12 +
>  arch/arm/dts/k3-am625-r5-sk.dts   |   94 +-
>  arch/arm/dts/k3-am625-sk-u-boot.dtsi  |  110 +-
>  arch/arm/dts/k3-am62x-ddr-lp4-50-800-800.dtsi | 2190 +
>  arch/arm/dts/k3-am62x-r5-sk-common.dtsi   |   96 +
>  arch/arm/dts/k3-am62x-sk-common-u-boot.dtsi   |  109 +
>  board/ti/am62x/am62x_lpsk_a53.config  |5 +
>  board/ti/am62x/am62x_lpsk_r5.config   |5 +
>  doc/board/ti/am62x_sk.rst |8 +
>  12 files changed, 2696 insertions(+), 198 deletions(-)
>  create mode 100644 arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi
>  create mode 100644 arch/arm/dts/k3-am62-lp-sk.dts
>  create mode 100644 arch/arm/dts/k3-am62-r5-lp-sk.dts
>  create mode 100644 arch/arm/dts/k3-am62x-ddr-lp4-50-800-800.dtsi
>  create mode 100644 arch/arm/dts/k3-am62x-r5-sk-common.dtsi
>  create mode 100644 arch/arm/dts/k3-am62x-sk-common-u-boot.dtsi
>  create mode 100644 board/ti/am62x/am62x_lpsk_a53.config
>  create mode 100644 board/ti/am62x/am62x_lpsk_r5.config
> 
> -- 
> 2.25.1
> 


Both AM654 and AM62A need DT-sync:
https://gist.github.com/nmenon/a86f1384e62df1359d8da1cd42b5d4ad

Please consider fixing existing platforms to boot before we introduce
new ones.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 
849D 1736 249D

Re: [PATCH 0/6] Add AM62SIP SK support

2023-11-01 Thread Nishanth Menon

On 18:58-20231031, Nitin Yadav wrote:
> This series adds support of AM62SIP SK board. The AM62SIP SK
> is different from AM62x SK in terms of DDR Memory size which
> is reduced to 512 M and embedded as part of SoC.
> 
> Note:
>  - Please apply this series after applying AM62x LP SK support series.
>(https://lore.kernel.org/all/20231030110138.1347603-1-n-ya...@ti.com/)
>  - The link provided in board documentaion will be active at
>later point. (https://www.ti.com/tool/SK-AM62-SIP)
> 
> Nitin Yadav (6):
>   arm: dts: k3-am62x-sip-ddr-lp4-50-800: Add DDR configuration for
> AM62-SIP
>   ram: k3-ddrss: k3-ddrss: Fix updating ddr size with ecc off
>   board: ti: am62x: Avoid overwriting reserve mem for AM62 SIP
>   arm: dts: Add support for AM62x SIP SKEVM at R5 SPL
>   board: ti: am62x: Add am62xsip_sk_r5.config defconfig fragment
>   doc: ti: Add AM62SIP SK Board information
> 
>  arch/arm/dts/Makefile |1 +
>  arch/arm/dts/k3-am62sip-r5-sk.dts |   23 +
>  arch/arm/dts/k3-am62x-sip-ddr-lp4-50-800.dtsi | 2191 +
>  board/ti/am62x/am62xsip_sk_r5.config  |5 +
>  board/ti/am62x/evm.c  |   11 +
>  doc/board/ti/am62x_sk.rst |7 +
>  drivers/ram/k3-ddrss/k3-ddrss.c   |3 -
>  7 files changed, 2238 insertions(+), 3 deletions(-)
>  create mode 100644 arch/arm/dts/k3-am62sip-r5-sk.dts
>  create mode 100644 arch/arm/dts/k3-am62x-sip-ddr-lp4-50-800.dtsi
>  create mode 100644 board/ti/am62x/am62xsip_sk_r5.config
> 
> -- 
> 2.25.1
> 

How about we fix existing SoCs before considering new ones:

Both AM654 and AM62A need DT-sync:
https://gist.github.com/nmenon/a86f1384e62df1359d8da1cd42b5d4ad

Please consider my NAK to new SoCs till the existing ones boot at the
very least.
-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 
849D 1736 249D

[PATCH] dt-bindings: Remove VSC8531 specific RGMII delay definitions

2023-11-01 Thread Michal Simek

Based on Linux upstream discussion value enumeration shouldn't be used.
Instead of it delay in pS should be used that's why remove it from the
header.

Link: https://lore.kernel.org/all/ynsm%2f0dmpbgo8...@lunn.ch/
Signed-off-by: Michal Simek 
---

 include/dt-bindings/net/mscc-phy-vsc8531.h | 9 -
 1 file changed, 9 deletions(-)

diff --git a/include/dt-bindings/net/mscc-phy-vsc8531.h 
b/include/dt-bindings/net/mscc-phy-vsc8531.h
index 61f5287d7523..c340437414fb 100644
--- a/include/dt-bindings/net/mscc-phy-vsc8531.h
+++ b/include/dt-bindings/net/mscc-phy-vsc8531.h
@@ -28,13 +28,4 @@
 #define VSC8531_FORCE_LED_OFF  14
 #define VSC8531_FORCE_LED_ON   15
 
-#define VSC8531_RGMII_CLK_DELAY_0_2_NS 0
-#define VSC8531_RGMII_CLK_DELAY_0_8_NS 1
-#define VSC8531_RGMII_CLK_DELAY_1_1_NS 2
-#define VSC8531_RGMII_CLK_DELAY_1_7_NS 3
-#define VSC8531_RGMII_CLK_DELAY_2_0_NS 4
-#define VSC8531_RGMII_CLK_DELAY_2_3_NS 5
-#define VSC8531_RGMII_CLK_DELAY_2_6_NS 6
-#define VSC8531_RGMII_CLK_DELAY_3_4_NS 7
-
 #endif
-- 
2.36.1

[PATCH] doc: ti: j7200_evm: Fix OPTEE platform name

2023-11-01 Thread Nishanth Menon

k3-j7200 does not exist in upstream OPTEE. Use j721e as the platform
name. Using k3-j7200 as OPTEE name results in broken boot due to wrong
configuration being picked.

Fixes: c727b81d6530 ("doc: board: ti: k3: Reuse build instructions")
Signed-off-by: Nishanth Menon 
---
Cc: Reid Tonking 
Cc: Udit Kumar 
Cc: Manorit Chawdhry 
Cc: Andrew Davis 
Cc: Neha Malcom Francis 
Cc:  Heinrich Schuchardt 

Logs: https://gist.github.com/nmenon/0b05a556ce8ff91ec070c7c0c0fb62f3
(before and after)

 doc/board/ti/j7200_evm.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/doc/board/ti/j7200_evm.rst b/doc/board/ti/j7200_evm.rst
index bcf8dc1c5f0d..35b554166e45 100644
--- a/doc/board/ti/j7200_evm.rst
+++ b/doc/board/ti/j7200_evm.rst
@@ -71,7 +71,7 @@ Set the variables corresponding to this platform:
  $ export TFA_BOARD=generic
  $ # we dont use any extra TFA parameters
  $ unset TFA_EXTRA_ARGS
- $ export OPTEE_PLATFORM=k3-j7200
+ $ export OPTEE_PLATFORM=k3-j721e
  $ # we dont use any extra OP-TEE parameters
  $ unset OPTEE_EXTRA_ARGS
 
-- 
2.40.0

Re: [GIT PULL] Please pull u-boot-mmc master

On Wed, Nov 01, 2023 at 04:56:30PM +0900, Jaehoon Chung wrote:

> Dear Tom,
> 
> Please pull u-boot-mmc master into u-boot master branch.
> If there is any problem, let me know, plz. 
> 
> Best Regards,
> Jaehoon Chung
> 
> CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/18386
> 
> The following changes since commit 62fc66b6d228d628c3f672c736aa57e4174ac783:
> 
>   Merge branch '2023-10-31-platform-updates' (2023-10-31 13:08:10 -0400)
> 
> are available in the Git repository at:
> 
>   g...@source.denx.de:u-boot/custodians/u-boot-mmc.git master
> 
> for you to fetch changes up to b5f403936d037e0bc08e78b8af64adf53da13b90:
> 
>   cmd: mmc: Add mmc reg read command for reading card registers (2023-11-01 
> 10:09:21 +0900)
> 

Applied to u-boot/master, thanks!

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH v1] rng: add dm_rng_read_default() helper

2023-11-01 Thread Heinrich Schuchardt


On 11/1/23 15:49, Alexey Romanov wrote:

Add dm_rng_read_default() function, which obtain a series
of random bytes. In some cases, such function would be
useful because it allows the caller to abstract away from
RNG device.

Signed-off-by: Alexey Romanov 
---
  drivers/rng/rng-uclass.c | 20 
  include/rng.h| 10 ++
  2 files changed, 30 insertions(+)

diff --git a/drivers/rng/rng-uclass.c b/drivers/rng/rng-uclass.c
index 53108e1b31..3a8fb7d276 100644
--- a/drivers/rng/rng-uclass.c
+++ b/drivers/rng/rng-uclass.c
@@ -19,6 +19,26 @@ int dm_rng_read(struct udevice *dev, void *buffer, size_t 
size)
return ops->read(dev, buffer, size);
  }

+int dm_rng_read_default(void *buffer, size_t size)
+{
+   struct udevice *rng;
+   int ret;
+
+   ret = uclass_get_device(UCLASS_RNG, 0, );


This function will give you the first RNG device and not the first
successfully probed RNG device.

We already have a weak function platform_get_rng_device() which allows a
board to provide a different device. I think we should move
platform_get_rng_device() to rng-uclass.c and use it here.

platform_get_rng_device should be re-implemented to provide the first
successfully probed RNG device.


+   if (ret) {
+   pr_err("Can't get RNG device (%d)\n", ret);
+   return ret;
+   }
+
+   ret = dm_rng_read(rng, buffer, size);


Here you are using a device which may not have been probed yet.

Best regards

Heinrich


+   if (ret) {
+   pr_err("Can't read from RNG device (%d)\n", ret);
+   return ret;
+   }
+
+   return 0;
+}
+
  UCLASS_DRIVER(rng) = {
.name = "rng",
.id = UCLASS_RNG,
diff --git a/include/rng.h b/include/rng.h
index 37af554363..5537daae88 100644
--- a/include/rng.h
+++ b/include/rng.h
@@ -20,6 +20,16 @@ struct udevice;
   */
  int dm_rng_read(struct udevice *dev, void *buffer, size_t size);

+/**
+ * dm_rng_read_default() - same as dm_rng_read(), except that caller
+ * don't need to pass an argument with RNG udevice.
+ * @buffer:input buffer to put the read random seed into
+ * @size:  number of bytes of random seed read
+ *
+ * Return: 0 if OK, -ve on error
+ */
+int dm_rng_read_default(void *buffer, size_t size);
+
  /**
   * struct dm_rng_ops - operations for the hwrng uclass
   *

Re: [PATCH v4 1/1] arm: dts: icnova-a20-adb4006: Add board support

On Wed,  1 Nov 2023 08:28:32 +0100
Ludwig Kormann  wrote:

Hi Ludwig,

thanks for the respin!

> Add board support for ICnova A20 SomPi compute module on
> ICnova ADB4006 development board.
> 
> Specification:
> SoM
> - Processor: Allwinner A20 Cortex-A7 Dual Core at 1GHz
> - 512MB DDR3 RAM
> - Fast Ethernet (Phy: Realtek RTL8201CP)
> ADB4006
> - I2C
> - 2x USB 2.0
> - 1x Fast Ethernet port
> - 1x SATA
> - 2x buttons (PWRON, Boot)
> - 2x LEDS
> - serial console
> - HDMI
> - µSD-Card slot
> - Audio Line-In / Line-Out
> - GPIO pinheaders
> 
> https://wiki.in-circuit.de/index.php5?title=ICnova_ADB4006
> https://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM
> 
> devicetree upstreamed with linux 6.5

Looks good now, the defconfig is fine, and it compiles. I will take it in
the current cycle still.

> Signed-off-by: Ludwig Kormann 

Reviewed-by: Andre Przywara 

Cheers,
Andre

> ---
> changes in v4:
> - rebase on master
> - add CONFIG_SYS_64BIT_LBA
> - drop dts from patch, already upstreamed
> 
> changes in v3:
> - rebase on v2023.10
> 
> changes in v2:
> - rebase on v2023.07-rc2
> - remove pin defines from defconfig
> - get dts reviewed on the linux mailing list and
>   scheduled for kernel 6.5 [1]
> 
> [1]
> https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git
> commit de2bdfb7f79d5c655eb056d459e02be2c7f13c8b
> 
> ---
>  arch/arm/dts/Makefile|  1 +
>  board/sunxi/MAINTAINERS  |  5 +
>  configs/icnova-a20-adb4006_defconfig | 21 +
>  3 files changed, 27 insertions(+)
>  create mode 100644 configs/icnova-a20-adb4006_defconfig
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 55aceb51cd..d947b8de56 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -693,6 +693,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
>   sun7i-a20-haoyu-marsboard.dtb \
>   sun7i-a20-hummingbird.dtb \
>   sun7i-a20-i12-tvbox.dtb \
> + sun7i-a20-icnova-a20-adb4006.dtb \
>   sun7i-a20-icnova-swac.dtb \
>   sun7i-a20-itead-ibox.dtb \
>   sun7i-a20-lamobo-r1.dtb \
> diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
> index 4bbe3f62fa..0061437211 100644
> --- a/board/sunxi/MAINTAINERS
> +++ b/board/sunxi/MAINTAINERS
> @@ -236,6 +236,11 @@ M:   Stefan Roese 
>  S:   Maintained
>  F:   configs/icnova-a20-swac_defconfig
>  
> +ICnova-A20-ADB4006 BOARD
> +M:   Ludwig Kormann 
> +S:   Maintained
> +F:   configs/icnova-a20-adb4006_defconfig
> +
>  ITEAD IBOX BOARD
>  M:   Marcus Cooper 
>  S:   Maintained
> diff --git a/configs/icnova-a20-adb4006_defconfig 
> b/configs/icnova-a20-adb4006_defconfig
> new file mode 100644
> index 00..22cbb612e3
> --- /dev/null
> +++ b/configs/icnova-a20-adb4006_defconfig
> @@ -0,0 +1,21 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_SUNXI=y
> +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-a20-adb4006"
> +CONFIG_SPL=y
> +CONFIG_MACH_SUN7I=y
> +CONFIG_DRAM_CLK=384
> +CONFIG_AHCI=y
> +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> +CONFIG_SPL_I2C=y
> +CONFIG_SCSI_AHCI=y
> +CONFIG_SYS_64BIT_LBA=y
> +CONFIG_SYS_I2C_MVTWSI=y
> +CONFIG_SYS_I2C_SLAVE=0x7f
> +CONFIG_SYS_I2C_SPEED=40
> +CONFIG_ETH_DESIGNWARE=y
> +CONFIG_MII=y
> +CONFIG_SUN7I_GMAC=y
> +CONFIG_AXP_ALDO4_VOLT=2800
> +CONFIG_SCSI=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_OHCI_HCD=y

[PATCH v1 2/2] drivers: sm: bind child sm devices in the device tree

From: Dmitry Rokosov 

One well-known sm child device that provides secure power control is the
Secure Power Controller. This device utilizes SMC calls to communicate
with power domains on the secure monitor side.

Signed-off-by: Dmitry Rokosov 
Signed-off-by: Alexey Romanov 
---
 drivers/sm/meson-sm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/sm/meson-sm.c b/drivers/sm/meson-sm.c
index faef369f35..1dd1584855 100644
--- a/drivers/sm/meson-sm.c
+++ b/drivers/sm/meson-sm.c
@@ -194,6 +194,7 @@ U_BOOT_DRIVER(meson_sm) = {
.id = UCLASS_SM,
.of_match = meson_sm_ids,
.probe = meson_sm_probe,
+   .bind = dm_scan_fdt_dev,
.priv_auto = sizeof(struct meson_sm_priv),
.ops = _ops,
 };
-- 
2.25.1

[PATCH v1 1/2] clk: a1: add new clocks for USB stack

Since we sync device tree with Linux, we have to add this
clock definition for USB stack.

Signed-off-by: Alexey Romanov 
---
 drivers/clk/meson/a1.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/clk/meson/a1.c b/drivers/clk/meson/a1.c
index 1075ba7333..d0f5bb3753 100644
--- a/drivers/clk/meson/a1.c
+++ b/drivers/clk/meson/a1.c
@@ -241,6 +241,12 @@ static const struct meson_clk_info *meson_clocks[] = {
[CLKID_USB_PHY_IN] = CLK_GATE("usb_phy_in", A1_SYS_OSCIN_CTRL, 2,
EXTERNAL_XTAL
),
+   [CLKID_USB_CTRL_IN] = CLK_GATE("usb_ctrl_in", A1_SYS_OSCIN_CTRL, 3,
+   EXTERNAL_XTAL
+   ),
+   [CLKID_USB_CTRL] = CLK_GATE("usb_ctrl", A1_SYS_CLK_EN0, 28,
+   CLKID_SYS
+   ),
[CLKID_USB_PHY] = CLK_GATE("usb_phy", A1_SYS_CLK_EN0, 27,
CLKID_SYS
),
-- 
2.25.1

[PATCH v1 0/2] Meson A1: fix USB and NAND stack

Hello!

After a recent sync device tree with the Linux Kernel,
some drivers broke. These patchset will fix that.

Alexey Romanov (1):
  clk: a1: add new clocks for USB stack

Dmitry Rokosov (1):
  drivers: sm: bind child sm devices in the device tree

 drivers/clk/meson/a1.c | 6 ++
 drivers/sm/meson-sm.c  | 1 +
 2 files changed, 7 insertions(+)

-- 
2.25.1

[PATCH v1] rng: add dm_rng_read_default() helper

Add dm_rng_read_default() function, which obtain a series
of random bytes. In some cases, such function would be
useful because it allows the caller to abstract away from
RNG device.

Signed-off-by: Alexey Romanov 
---
 drivers/rng/rng-uclass.c | 20 
 include/rng.h| 10 ++
 2 files changed, 30 insertions(+)

diff --git a/drivers/rng/rng-uclass.c b/drivers/rng/rng-uclass.c
index 53108e1b31..3a8fb7d276 100644
--- a/drivers/rng/rng-uclass.c
+++ b/drivers/rng/rng-uclass.c
@@ -19,6 +19,26 @@ int dm_rng_read(struct udevice *dev, void *buffer, size_t 
size)
return ops->read(dev, buffer, size);
 }
 
+int dm_rng_read_default(void *buffer, size_t size)
+{
+   struct udevice *rng;
+   int ret;
+
+   ret = uclass_get_device(UCLASS_RNG, 0, );
+   if (ret) {
+   pr_err("Can't get RNG device (%d)\n", ret);
+   return ret;
+   }
+
+   ret = dm_rng_read(rng, buffer, size);
+   if (ret) {
+   pr_err("Can't read from RNG device (%d)\n", ret);
+   return ret;
+   }
+
+   return 0;
+}
+
 UCLASS_DRIVER(rng) = {
.name = "rng",
.id = UCLASS_RNG,
diff --git a/include/rng.h b/include/rng.h
index 37af554363..5537daae88 100644
--- a/include/rng.h
+++ b/include/rng.h
@@ -20,6 +20,16 @@ struct udevice;
  */
 int dm_rng_read(struct udevice *dev, void *buffer, size_t size);
 
+/**
+ * dm_rng_read_default() - same as dm_rng_read(), except that caller
+ * don't need to pass an argument with RNG udevice.
+ * @buffer:input buffer to put the read random seed into
+ * @size:  number of bytes of random seed read
+ *
+ * Return: 0 if OK, -ve on error
+ */
+int dm_rng_read_default(void *buffer, size_t size);
+
 /**
  * struct dm_rng_ops - operations for the hwrng uclass
  *
-- 
2.25.1

Re: [PATCH 1/3] corstone1000: add compressed kernel support

On Wed, Nov 01, 2023 at 10:20:41AM +, Abdellatif El Khlifi wrote:
> Hi Tom,
> 
> > On Thu, Oct 26, 2023 at 01:50:49PM +0100, abdellatif.elkhl...@arm.com wrote:
> > 
> > > From: Abdellatif El Khlifi 
> > > 
> > > unzip the kernel before executing it
> > > 
> > > The Corstone-1000 kernel has become too large to fit in the available
> > > storage.  Switching to a compressed kernel avoids the problem, but
> > > requires uncompressing it.
> > > 
> > > Changes made are generated using savedefconfig.
> > > 
> > > Signed-off-by: Abdellatif El Khlifi 
> > > Signed-off-by: Jon Mason 
> > > Signed-off-by: Rui Miguel Silva 
> > > ---
> > >  configs/corstone1000_defconfig | 1551 +++-
> > >  1 file changed, 1550 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/configs/corstone1000_defconfig 
> > > b/configs/corstone1000_defconfig
> > > index 3b5733b777..f25da79ec8 100644
> > > --- a/configs/corstone1000_defconfig
> > > +++ b/configs/corstone1000_defconfig
> > > @@ -1,69 +1,1618 @@
> > 
> > This wasn't done as savedefconfig, so I had to do a tiny bit of
> > reworking to re-save it and then again on 3/3 for it to apply. In the
> > future please make sure defconfig changes really are savedefconfig'd,
> > thanks and applied to u-boot/master.
> 
> Sorry for the extra work done.
> 
> However, I already followed these steps to generate the defconfig.
> The steps below show that generating the defconfig at the current commit 
> level generates a .config identical to corstone1000_defconfig.
> I used the HEAD of next. Please, am I missing something here ?
> 
> More details:
> 
> b055167ef05898075dc2b2fa3ea244f56932c75e (HEAD) corstone1000: add compressed 
> kernel support
> e29b932aa07fa0226d325b35d96cd4eea0370129 (origin/next) Merge branch 
> '2023-09-30-Kconfig-updates' into next
> 
> $ make corstone1000_defconfig savedefconfig
>   HOSTCC  scripts/basic/fixdep
>   HOSTCC  scripts/kconfig/conf.o
>   YACCscripts/kconfig/zconf.tab.c
>   LEX scripts/kconfig/zconf.lex.c
>   HOSTCC  scripts/kconfig/zconf.tab.o
>   HOSTLD  scripts/kconfig/conf
> #
> # configuration written to .config
> #
> scripts/kconfig/conf  --savedefconfig=defconfig Kconfig
> $ diff -pruN configs/corstone1000_defconfig .config 

Uh, that's not what I see, nor is it what was in your patch. The patch
turned configs/corstone1000_defconfig in to the 1600 line .config file.
And the step you're missing is "mv defconfig configs/corstone1000_defconfig"
after doing savedefconfig.

-- 
Tom


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Re: [PATCH v4 0/2] sunxi, usb: Clean up SRAM initialization code

On Thu, 15 Jun 2023 13:06:59 -0600
Sam Edwards  wrote:

Hi Marek,

I just saw that you were not CC:ed on this one. Both patches are fine from
my point of view.
Do you want to take them through the USB tree, or shall I do it via the
sunxi tree?
And shall I take future musb-new/sunxi.c patches in general, if you have
approved them? They are typically ports of quirks from the kernel, and new
compatible strings, maybe.

Cheers,
Andre

> Only change from v4 is that I reworded the commit message in 2/2 not to 
> mention
> the TODO comment block that I removed in v3.
> 
> Cheers,
> Sam
> 
> Sam Edwards (2):
>   usb: musb-new: sunxi: only perform SRAM initialization when necessary
>   usb: musb-new: sunxi: clarify the purpose of SRAM initialization
> 
>  drivers/usb/musb-new/sunxi.c | 36 +++-
>  1 file changed, 27 insertions(+), 9 deletions(-)
>

Re: [PATCH] clk: sunxi: Use the right symbol in the Makefile

On Mon, 30 Oct 2023 23:49:22 -0500
Samuel Holland  wrote:

> CONFIG_ARCH_SUNXI will not be enabled for RISC-V SoCs using this driver.
> Use the symbol for the driver itself instead.

That works, no changes at all in all sunxi binaries after this patch.

> Signed-off-by: Samuel Holland 

Reviewed-by: Andre Przywara 

Thanks,
Andre

> ---
> 
>  drivers/clk/Makefile | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index 26bf429acbc..af27ceb27da 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -27,7 +27,6 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
>  obj-$(CONFIG_ARCH_SOCFPGA) += altera/
>  obj-$(CONFIG_ARCH_STM32) += stm32/
>  obj-$(CONFIG_ARCH_STM32MP) += stm32/
> -obj-$(CONFIG_ARCH_SUNXI) += sunxi/
>  obj-$(CONFIG_CLK_AT91) += at91/
>  obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
>  obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
> @@ -43,6 +42,7 @@ obj-$(CONFIG_CLK_OWL) += owl/
>  obj-$(CONFIG_CLK_RENESAS) += renesas/
>  obj-$(CONFIG_$(SPL_TPL_)CLK_SCMI) += clk_scmi.o
>  obj-$(CONFIG_CLK_SIFIVE) += sifive/
> +obj-$(CONFIG_CLK_SUNXI) += sunxi/
>  obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
>  obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o
>  obj-$(CONFIG_CLK_VERSAL) += clk_versal.o

Re: [PATCH] pinctrl: sunxi: Avoid using .bss for SPL