Re: [PATCH] ARM: dts: renesas: Remove leftovers after OF_UPSTREAM conversion
On Sun, May 19, 2024 at 3:40 PM Marek Vasut
wrote:
>
> Remove leftover DTSI files after OF_UPSTREAM conversion.
> Those are no longer used and no longer necessary, remove them.
> No functional change.
>
This seems like the right thing to do.
> Signed-off-by: Marek Vasut
Acked-by: Adam Ford
> ---
> Cc: Adam Ford
> Cc: Tom Rini
> ---
> arch/arm/dts/salvator-common.dtsi| 1104 --
> arch/arm/dts/salvator-x.dtsi | 29 -
> arch/arm/dts/salvator-xs.dtsi| 85 --
> arch/arm/dts/ulcb-audio-graph-card.dtsi | 85 --
> arch/arm/dts/ulcb-audio-graph-card2.dtsi | 26 -
> arch/arm/dts/ulcb.dtsi | 509 --
> 6 files changed, 1838 deletions(-)
> delete mode 100644 arch/arm/dts/salvator-common.dtsi
> delete mode 100644 arch/arm/dts/salvator-x.dtsi
> delete mode 100644 arch/arm/dts/salvator-xs.dtsi
> delete mode 100644 arch/arm/dts/ulcb-audio-graph-card.dtsi
> delete mode 100644 arch/arm/dts/ulcb-audio-graph-card2.dtsi
> delete mode 100644 arch/arm/dts/ulcb.dtsi
>
> diff --git a/arch/arm/dts/salvator-common.dtsi
> b/arch/arm/dts/salvator-common.dtsi
> deleted file mode 100644
> index 4a3d5037821..000
> --- a/arch/arm/dts/salvator-common.dtsi
> +++ /dev/null
> @@ -1,1104 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0
> -/*
> - * Device Tree Source for common parts of Salvator-X board variants
> - *
> - * Copyright (C) 2015-2016 Renesas Electronics Corp.
> - */
> -
> -/*
> - * SSI-AK4613
> - *
> - * This command is required when Playback/Capture
> - *
> - * amixer set "DVC Out" 100%
> - * amixer set "DVC In" 100%
> - *
> - * You can use Mute
> - *
> - * amixer set "DVC Out Mute" on
> - * amixer set "DVC In Mute" on
> - *
> - * You can use Volume Ramp
> - *
> - * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
> - * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
> - * amixer set "DVC Out Ramp" on
> - * aplay xxx.wav &
> - * amixer set "DVC Out" 80% // Volume Down
> - * amixer set "DVC Out" 100% // Volume Up
> - */
> -
> -#include
> -#include
> -
> -/ {
> - aliases {
> - i2c0 =
> - i2c1 =
> - i2c2 =
> - i2c3 =
> - i2c4 =
> - i2c5 =
> - i2c6 =
> - i2c7 = _dvfs;
> - serial0 =
> - serial1 =
> - ethernet0 =
> - mmc0 =
> - mmc1 =
> - mmc2 =
> - };
> -
> - chosen {
> - bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
> - stdout-path = "serial0:115200n8";
> - };
> -
> - audio_clkout: audio-clkout {
> - /*
> -* This is same as <_sound 0>
> -* but needed to avoid cs2000/rcar_sound probe dead-lock
> -*/
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <12288000>;
> - };
> -
> - backlight: backlight {
> - compatible = "pwm-backlight";
> - pwms = < 0 5>;
> -
> - brightness-levels = <256 128 64 16 8 4 0>;
> - default-brightness-level = <6>;
> -
> - power-supply = <_12v>;
> - enable-gpios = < 7 GPIO_ACTIVE_HIGH>;
> - };
> -
> - cvbs-in {
> - compatible = "composite-video-connector";
> - label = "CVBS IN";
> -
> - port {
> - cvbs_con: endpoint {
> - remote-endpoint = <_ain7>;
> - };
> - };
> - };
> -
> - hdmi-in {
> - compatible = "hdmi-connector";
> - label = "HDMI IN";
> - type = "a";
> -
> - port {
> - hdmi_in_con: endpoint {
> - remote-endpoint = <_hdmi>;
> - };
> - };
> - };
> -
> - hdmi0-out {
> - compatible = "hdmi-connector";
> - label = "HDMI0 OUT";
> - type = "a";
> -
> - port {
> - hdmi0_
[PATCH V2 4/4] arm: ti: logicpd-som-lv: Migrate to OF_UPSTREAM
The DM37 and OMAP35 SOM-LV share a few files, but both of them
can be migrated to OF_UPSTREAM with a small update to their
respective u-boot.dtsi files to address changes made the aliases.
Both defconfigs need to properly point to the upstream directory
structure for the device trees. With those updated, the U-Boot
device tree files can be deleted.
Signed-off-by: Adam Ford
---
V2: Remove DT from Makefile
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b163ae18fc..a4c2ef2aaa 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1141,10 +1141,6 @@ dtb-$(CONFIG_TARGET_ETHERNUT5) += ethernut5.dtb
dtb-$(CONFIG_TARGET_USB_A9263) += usb_a9263.dtb
-dtb-$(CONFIG_TARGET_OMAP3_LOGIC) += \
- logicpd-som-lv-35xx-devkit.dtb \
- logicpd-som-lv-37xx-devkit.dtb
-
dtb-$(CONFIG_TARGET_OMAP3_EVM) += \
omap3-evm-37xx.dtb \
omap3-evm.dtb
diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
index 6f11852a33..d77fa38746 100644
--- a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
@@ -14,6 +14,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+ /delete-property/ mmc1;
+ /delete-property/ mmc2;
};
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts
b/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts
deleted file mode 100644
index f690bc83bf..00
--- a/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts
+++ /dev/null
@@ -1,27 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap34xx.dtsi"
-#include "logicpd-som-lv.dtsi"
-#include "logicpd-som-lv-baseboard.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-
-/ {
- model = "LogicPD Zoom OMAP35xx SOM-LV Development Kit";
- compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3430", "ti,omap3";
-};
-
-_pmx_core2 {
-
- hsusb2_2_pins: pinmux_hsusb2_2_pins {
- pinctrl-single,pins = <
- OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
/* etk_d10.hsusb2_clk */
- OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
/* etk_d11.hsusb2_stp */
- OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d12.hsusb2_dir */
- OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d13.hsusb2_nxt */
- OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d14.hsusb2_data0 */
- OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d15.hsusb2_data1 */
- >;
- };
-};
diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
index 6f11852a33..d77fa38746 100644
--- a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
@@ -14,6 +14,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+ /delete-property/ mmc1;
+ /delete-property/ mmc2;
};
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts
b/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts
deleted file mode 100644
index e28e9625be..00
--- a/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts
+++ /dev/null
@@ -1,27 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap36xx.dtsi"
-#include "logicpd-som-lv.dtsi"
-#include "logicpd-som-lv-baseboard.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-
-/ {
- model = "LogicPD Zoom DM3730 SOM-LV Development Kit";
- compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3";
-};
-
-_pmx_core2 {
-
- hsusb2_2_pins: pinmux_hsusb2_2_pins {
- pinctrl-single,pins = <
- OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
/* etk_d10.hsusb2_clk */
- OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
/* etk_d11.hsusb2_stp */
- OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d12.hsusb2_dir */
- OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d13.hsusb2_nxt */
- OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d14.hsusb2_data0 */
- OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d15.hsusb2_data1 */
- >;
- };
-};
diff --git a/arch/arm/dts/logicpd-som-lv-baseboard.dtsi
b/arch/arm/dts/l
[PATCH V2 3/4] arm: ti: logicpd-torpedo: Migrate to OF_UPSTREAM
The DM37 and OMAP35 Torpedo share a few files, but both of them
can be migrated to OF_UPSTREAM with a small update to their
respective u-boot.dtsi files to address changes made the aliases.
Both defconfigs need to properly point to the upstream directory
structure for the device trees. With those updated, the U-Boot
device tree files can be deleted.
Signed-off-by: Adam Ford
---
V2: Remove DT from Makefile
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f9b582a87e..b163ae18fc 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1143,9 +1143,7 @@ dtb-$(CONFIG_TARGET_USB_A9263) += usb_a9263.dtb
dtb-$(CONFIG_TARGET_OMAP3_LOGIC) += \
logicpd-som-lv-35xx-devkit.dtb \
- logicpd-som-lv-37xx-devkit.dtb \
- logicpd-torpedo-35xx-devkit.dtb \
- logicpd-torpedo-37xx-devkit.dtb
+ logicpd-som-lv-37xx-devkit.dtb
dtb-$(CONFIG_TARGET_OMAP3_EVM) += \
omap3-evm-37xx.dtb \
diff --git a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
index 4744872f7c..d14d68e458 100644
--- a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
@@ -14,6 +14,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+ /delete-property/ mmc1;
+ /delete-property/ mmc2;
};
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts
b/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts
deleted file mode 100644
index cb08aa62d9..00
--- a/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts
+++ /dev/null
@@ -1,21 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap34xx.dtsi"
-#include "logicpd-torpedo-som.dtsi"
-#include "logicpd-torpedo-baseboard.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-
-/ {
- model = "LogicPD Zoom OMAP35xx Torpedo Development Kit";
- compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3430", "ti,omap3";
-};
-
-_pmx_core {
- isp1763_pins: pinmux_isp1763_pins {
- pinctrl-single,pins = <
- OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP |
MUX_MODE4)/* sdmmc1_dat6.gpio_128 */
- >;
- };
-};
diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
index 2c34344504..8e8e2e4096 100644
--- a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
@@ -10,6 +10,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+ /delete-property/ mmc1;
+ /delete-property/ mmc2;
};
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts
b/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts
deleted file mode 100644
index 07ea822fe4..00
--- a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts
+++ /dev/null
@@ -1,96 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap36xx.dtsi"
-#include "logicpd-torpedo-som.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-#include "logicpd-torpedo-baseboard.dtsi"
-
-/ {
- model = "LogicPD Zoom DM3730 Torpedo + Wireless Development Kit";
- compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3";
-
- wl12xx_vmmc: wl12xx_vmmc {
- compatible = "regulator-fixed";
- regulator-name = "vwl1271";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <180>;
- gpio = < 29 0>; /* gpio157 */
- startup-delay-us = <7>;
- enable-active-high;
- vin-supply = <>;
- };
-};
-
-/*
- * Only found on the wireless SOM. For the SOM without wireless, the pins for
- * MMC3 can be routed with jumpers to the second MMC slot on the devkit and
- * gpio157 is not connected. So this should be OK to keep common for now,
- * probably device tree overlays is the way to go with the various SOM and
- * jumpering combinations for the long run.
- */
- {
- interrupts-extended = < 94 _pmx_core 0x136>;
- pinctrl-0 = <_pins _core2_pins>;
- pinctrl-names = "default";
- vmmc-supply = <_vmmc>;
- non-removable;
- bus-width = <4>;
- cap-power-off-card;
- #address-cells = <1>;
- #size-cells = <0>;
- wlcore: wlcore@2 {
- compatible = "ti,wl1283";
- reg = <2>;
- interrupt-parent = <>;
- interrupts = <24 IRQ_TYPE_EDGE_RISING>; /* gpio 1
[PATCH V2 2/4] arm: ti: am3517_evm: Migrate to OF_UPSTREAM
With the feature of OF_UPSTREAM now available, the device trees
for the SOM and baseboard can now deleted and the device tree
locations need to point to the ti/omap directory.
Signed-off-by: Adam Ford
---
V2: Remove DT reference from Makefile.
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d6135c41ad..f9b582a87e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -482,7 +482,6 @@ dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb
\
am437x-idk-evm.dtb \
am4372-generic.dtb \
am437x-cm-t43.dtb
-dtb-$(CONFIG_TARGET_AM3517_EVM) += am3517-evm.dtb
dtb-$(CONFIG_TARGET_THUNDERX_88XX) += thunderx-88xx.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += \
diff --git a/arch/arm/dts/am3517-evm.dts b/arch/arm/dts/am3517-evm.dts
deleted file mode 100644
index d21bb2ccd0..00
--- a/arch/arm/dts/am3517-evm.dts
+++ /dev/null
@@ -1,339 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
- */
-/dts-v1/;
-
-#include "am3517.dtsi"
-#include "am3517-som.dtsi"
-#include "am3517-evm-ui.dtsi"
-#include
-
-/ {
- model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)";
- compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
-
- aliases {
- display0 =
- };
-
- chosen {
- stdout-path =
- };
-
- memory@8000 {
- device_type = "memory";
- reg = <0x8000 0x1000>; /* 256 MB */
- };
-
- vmmc_fixed: vmmc {
- compatible = "regulator-fixed";
- regulator-name = "vmmc_fixed";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- };
-
- gpio-keys {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
-
- button-user {
- label = "User Push Button";
- linux,code = ;
- gpios = < 5 GPIO_ACTIVE_LOW>;
- };
-
- switch-1 {
- label = "User Switch 1";
- linux,code = ;
- gpios = < 8 GPIO_ACTIVE_LOW>;
- };
-
- switch-2 {
- label = "User Switch 2";
- linux,code = ;
- gpios = < 9 GPIO_ACTIVE_LOW>;
- };
-
- switch-3 {
- label = "User Switch 3";
- linux,code = ;
- gpios = < 10 GPIO_ACTIVE_LOW>;
- };
-
- switch-4 {
- label = "User Switch 4";
- linux,code = ;
- gpios = < 11 GPIO_ACTIVE_LOW>;
- };
-
- switch-5 {
- label = "User Switch 5";
- linux,code = ;
- gpios = < 12 GPIO_ACTIVE_LOW>;
- };
-
- switch-6 {
- label = "User Switch 6";
- linux,code = ;
- gpios = < 13 GPIO_ACTIVE_LOW>;
- };
-
- switch-7 {
- label = "User Switch 7";
- linux,code = ;
- gpios = < 14 GPIO_ACTIVE_LOW>;
- };
-
- switch-8 {
- label = "User Switch 8";
- linux,code = ;
- gpios = < 15 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
-
- pinctrl-names = "default";
- pinctrl-0 = <_pins>;
-
- user_led_1 {
- label = "am3517evm:green:user_led_1";
- gpios = < 7 GPIO_ACTIVE_LOW>;
- default-state = "on";
- };
-
- user_led_2 {
- label = "am3517evm:green:user_led_2";
- gpios = < 6 GPIO_ACTIVE_LOW>;
- default-state = "on";
- };
-
- user_led_3 {
- label = "am3517evm:green:user_led_3";
- gpios = < 11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc0"; /* SD/MMC card activity
*/
- };
-
- user_led_4 {
- label = "am3517evm:green:user_led_4";
- gpios = < 31 GPIO_ACTIVE_H
[PATCH V2 1/4] arm: davinci: Migrate da850-evm to OF_UPSTREAM
The da850-evm can remove the U-Boot device trees if migrated
to OF_UPSTREAM. This means pointing the device trees to the
ti/davinci directory.
Signed-off-by: Adam Ford
---
v2: Remove DTS from Makefile.
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c9f1b25ad6..d6135c41ad 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -41,7 +41,6 @@ dtb-$(CONFIG_ARCH_APPLE) += \
t8103-j457.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += \
- da850-evm.dtb \
da850-lcdk.dtb \
da850-lego-ev3.dtb
diff --git a/arch/arm/dts/da850-evm.dts b/arch/arm/dts/da850-evm.dts
deleted file mode 100644
index 378af9f344..00
--- a/arch/arm/dts/da850-evm.dts
+++ /dev/null
@@ -1,453 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Device Tree for DA850 EVM board
- *
- * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
- */
-/dts-v1/;
-#include "da850.dtsi"
-#include
-
-/ {
- compatible = "ti,da850-evm", "ti,da850";
- model = "DA850/AM1808/OMAP-L138 EVM";
-
- chosen {
- stdout-path =
- };
-
- aliases {
- serial0 =
- serial1 =
- serial2 =
- ethernet0 =
- spi0 =
- };
-
- backlight: backlight-pwm {
- pinctrl-names = "default";
- pinctrl-0 = <_pins>;
- power-supply = <_lcd>;
- compatible = "pwm-backlight";
- /*
-* The PWM here corresponds to production hardware. The
-* schematic needs to be 1015171 (15 March 2010), Rev A
-* or newer.
-*/
- pwms = < 0 5 0>;
- brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
- default-brightness-level = <7>;
- };
-
- panel {
- compatible = "ti,tilcdc,panel";
- pinctrl-names = "default";
- pinctrl-0 = <_pins>;
- /*
-* The vpif and the LCD are mutually exclusive.
-* To enable VPIF, change the status below to 'disabled' then
-* then change the status of the vpif below to 'okay'
-*/
- status = "okay";
- enable-gpios = < 40 GPIO_ACTIVE_HIGH>; /* lcd_panel_pwr */
-
- panel-info {
- ac-bias = <255>;
- ac-bias-intrpt = <0>;
- dma-burst-sz = <16>;
- bpp = <16>;
- fdd = <0x80>;
- sync-edge = <0>;
- sync-ctrl = <1>;
- raster-order = <0>;
- fifo-th = <0>;
- };
-
- display-timings {
- native-mode = <>;
- timing0: 480x272 {
- clock-frequency = <900>;
- hactive = <480>;
- vactive = <272>;
- hfront-porch = <3>;
- hback-porch = <2>;
- hsync-len = <42>;
- vback-porch = <3>;
- vfront-porch = <4>;
- vsync-len = <11>;
- hsync-active = <0>;
- vsync-active = <0>;
- de-active = <1>;
- pixelclk-active = <1>;
- };
- };
- };
-
- vbat: fixedregulator0 {
- compatible = "regulator-fixed";
- regulator-name = "vbat";
- regulator-min-microvolt = <500>;
- regulator-max-microvolt = <500>;
- regulator-boot-on;
- };
-
- baseboard_3v3: fixedregulator-3v3 {
- /* TPS73701DCQ */
- compatible = "regulator-fixed";
- regulator-name = "baseboard_3v3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- vin-supply = <>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- baseboard_1v8: fixedregulator-1v8 {
- /* TPS73701DCQ */
- compatible = "regulator-fixed";
- regulator-name = "baseboard_1v8";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <180>;
- vin-supply
Re: [PATCH 086/149] board: logicpd: Remove and add needed includes
On Tue, Apr 30, 2024 at 9:44 PM Tom Rini wrote: > > Remove from this board vendor directory and when needed > add missing include files directly. > > Signed-off-by: Tom Rini Acked-by: Adam Ford > --- > Cc: Adam Ford > --- > board/logicpd/am3517evm/am3517evm.c | 1 - > board/logicpd/imx6/imx6logic.c | 1 - > board/logicpd/omap3som/omap3logic.c | 2 +- > 3 files changed, 1 insertion(+), 3 deletions(-) > > diff --git a/board/logicpd/am3517evm/am3517evm.c > b/board/logicpd/am3517evm/am3517evm.c > index e69a73f2af6f..e6ca31016b7c 100644 > --- a/board/logicpd/am3517evm/am3517evm.c > +++ b/board/logicpd/am3517evm/am3517evm.c > @@ -10,7 +10,6 @@ > * Texas Instruments Incorporated - https://www.ti.com/ > */ > > -#include > #include > #include > #include > diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c > index 0d53548dcb4b..589136fd64aa 100644 > --- a/board/logicpd/imx6/imx6logic.c > +++ b/board/logicpd/imx6/imx6logic.c > @@ -8,7 +8,6 @@ > * and updates by Jagan Teki > */ > > -#include > #include > #include > #include > diff --git a/board/logicpd/omap3som/omap3logic.c > b/board/logicpd/omap3som/omap3logic.c > index 86992829caf4..a9fe61918b6a 100644 > --- a/board/logicpd/omap3som/omap3logic.c > +++ b/board/logicpd/omap3som/omap3logic.c > @@ -10,7 +10,7 @@ > * Richard Woodruff > * Syed Mohammed Khasim > */ > -#include > +#include > #include > #include > #include > -- > 2.34.1 >
Re: [PATCH 048/149] board: davinci: Remove and add needed includes
On Tue, Apr 30, 2024 at 9:44 PM Tom Rini wrote: > > Remove from this board vendor directory and when needed > add missing include files directly. > > Signed-off-by: Tom Rini Acked-by: Adam Ford > --- > Cc: Adam Ford > --- > board/davinci/da8xxevm/da850evm.c | 2 +- > board/davinci/da8xxevm/omapl138_lcdk.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/board/davinci/da8xxevm/da850evm.c > b/board/davinci/da8xxevm/da850evm.c > index 05053a87a5a9..0011c8285237 100644 > --- a/board/davinci/da8xxevm/da850evm.c > +++ b/board/davinci/da8xxevm/da850evm.c > @@ -8,7 +8,7 @@ > * Copyright (C) 2007 Sergey Kubushyn > */ > > -#include > +#include > #include > #include > #include > diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c > b/board/davinci/da8xxevm/omapl138_lcdk.c > index 9738e2bd9c77..607e05ad9ae4 100644 > --- a/board/davinci/da8xxevm/omapl138_lcdk.c > +++ b/board/davinci/da8xxevm/omapl138_lcdk.c > @@ -8,7 +8,7 @@ > * Copyright (C) 2007 Sergey Kubushyn > */ > > -#include > +#include > #include > #include > #include > -- > 2.34.1 >
Re: [PATCH 023/149] board: beacon: Remove and add needed includes
On Tue, Apr 30, 2024 at 9:43 PM Tom Rini wrote: > > Remove from this board vendor directory and when needed > add missing include files directly. > > Signed-off-by: Tom Rini Acked-by: Adam Ford > --- > Cc: Adam Ford > --- > board/beacon/beacon-rzg2m/beacon-rzg2m.c | 1 - > board/beacon/imx8mm/lpddr4_timing.c | 1 - > board/beacon/imx8mm/spl.c| 1 - > board/beacon/imx8mn/spl.c| 1 - > board/beacon/imx8mp/imx8mp_beacon.c | 1 - > board/beacon/imx8mp/spl.c| 1 - > 6 files changed, 6 deletions(-) > > diff --git a/board/beacon/beacon-rzg2m/beacon-rzg2m.c > b/board/beacon/beacon-rzg2m/beacon-rzg2m.c > index 99fe1edfb330..099053235ded 100644 > --- a/board/beacon/beacon-rzg2m/beacon-rzg2m.c > +++ b/board/beacon/beacon-rzg2m/beacon-rzg2m.c > @@ -3,7 +3,6 @@ > * Copyright 2020 Compass Electronics Group, LLC > */ > > -#include > #include > #include > > diff --git a/board/beacon/imx8mm/lpddr4_timing.c > b/board/beacon/imx8mm/lpddr4_timing.c > index 8e48b9d81b77..c1498dd5eaf4 100644 > --- a/board/beacon/imx8mm/lpddr4_timing.c > +++ b/board/beacon/imx8mm/lpddr4_timing.c > @@ -4,7 +4,6 @@ > */ > > #include > -#include > #include > #include > > diff --git a/board/beacon/imx8mm/spl.c b/board/beacon/imx8mm/spl.c > index 1632238bf5dd..12013aa5a4da 100644 > --- a/board/beacon/imx8mm/spl.c > +++ b/board/beacon/imx8mm/spl.c > @@ -1,6 +1,5 @@ > // SPDX-License-Identifier: GPL-2.0+ > > -#include > #include > #include > #include > diff --git a/board/beacon/imx8mn/spl.c b/board/beacon/imx8mn/spl.c > index b4d46f11f98d..f03841e5a01d 100644 > --- a/board/beacon/imx8mn/spl.c > +++ b/board/beacon/imx8mn/spl.c > @@ -3,7 +3,6 @@ > * Copyright 2020 Compass Electronics Group, LLC > */ > > -#include > #include > #include > #include > diff --git a/board/beacon/imx8mp/imx8mp_beacon.c > b/board/beacon/imx8mp/imx8mp_beacon.c > index 8963a51fbba0..dd74e7c0f755 100644 > --- a/board/beacon/imx8mp/imx8mp_beacon.c > +++ b/board/beacon/imx8mp/imx8mp_beacon.c > @@ -1,7 +1,6 @@ > // SPDX-License-Identifier: GPL-2.0+ > /* Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks */ > > -#include > #include > #include > #include > diff --git a/board/beacon/imx8mp/spl.c b/board/beacon/imx8mp/spl.c > index 591e8ca9ab5b..30d577f7e0e3 100644 > --- a/board/beacon/imx8mp/spl.c > +++ b/board/beacon/imx8mp/spl.c > @@ -4,7 +4,6 @@ > * > */ > > -#include > #include > #include > #include > -- > 2.34.1 >
Re: [PATCH 1/4] arm: davinci: Migrate da850-evm to OF_UPSTREAM
On Tue, Apr 16, 2024 at 6:53 AM Adam Ford wrote: > > On Thu, Apr 11, 2024 at 7:05 PM Tom Rini wrote: > > > > On Wed, Apr 03, 2024 at 10:00:09PM -0500, Adam Ford wrote: > > > > > The da850-evm can remove the U-Boot device trees if migrated > > > to OF_UPSTREAM. This means pointing the device trees to the > > > ti/davinci directory. > > > > > > Signed-off-by: Adam Ford > > > > This series leads to failure to build for omapl138_lcdk and lego_ev3 or > > was I supposed to bring in something else first? Thanks. > > I just got back from 10 days in Europe for the Embedded World > Conference. It should have been based on [1], but I haven't checked > to see if it was applied. I (maybe wrongly) assumed [1] would have > been applied before this patch was. > > Once I get caught up, I'll look to see what's going one. > Tom - Can you point me to a failing log for this, so I can try to replicate it? adam > adam > > [1] - https://www.mail-archive.com/u-boot@lists.denx.de/msg505123.html > > > > > > > -- > > Tom
Re: [PATCH 1/4] arm: davinci: Migrate da850-evm to OF_UPSTREAM
On Thu, Apr 11, 2024 at 7:05 PM Tom Rini wrote: > > On Wed, Apr 03, 2024 at 10:00:09PM -0500, Adam Ford wrote: > > > The da850-evm can remove the U-Boot device trees if migrated > > to OF_UPSTREAM. This means pointing the device trees to the > > ti/davinci directory. > > > > Signed-off-by: Adam Ford > > This series leads to failure to build for omapl138_lcdk and lego_ev3 or > was I supposed to bring in something else first? Thanks. I just got back from 10 days in Europe for the Embedded World Conference. It should have been based on [1], but I haven't checked to see if it was applied. I (maybe wrongly) assumed [1] would have been applied before this patch was. Once I get caught up, I'll look to see what's going one. adam [1] - https://www.mail-archive.com/u-boot@lists.denx.de/msg505123.html > > -- > Tom
[PATCH 4/4] arm: ti: logicpd-som-lv: Migrate to OF_UPSTREAM
The DM37 and OMAP35 SOM-LV share a few files, but both of them
can be migrated to OF_UPSTREAM with a small update to their
respective u-boot.dtsi files to address changes made the aliases.
Both defconfigs need to properly point to the upstream directory
structure for the device trees. With those updated, the U-Boot
device tree files can be deleted.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
index 6f11852a33..d77fa38746 100644
--- a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
@@ -14,6 +14,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+ /delete-property/ mmc1;
+ /delete-property/ mmc2;
};
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts
b/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts
deleted file mode 100644
index f690bc83bf..00
--- a/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts
+++ /dev/null
@@ -1,27 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap34xx.dtsi"
-#include "logicpd-som-lv.dtsi"
-#include "logicpd-som-lv-baseboard.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-
-/ {
- model = "LogicPD Zoom OMAP35xx SOM-LV Development Kit";
- compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3430", "ti,omap3";
-};
-
-_pmx_core2 {
-
- hsusb2_2_pins: pinmux_hsusb2_2_pins {
- pinctrl-single,pins = <
- OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
/* etk_d10.hsusb2_clk */
- OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
/* etk_d11.hsusb2_stp */
- OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d12.hsusb2_dir */
- OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d13.hsusb2_nxt */
- OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d14.hsusb2_data0 */
- OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d15.hsusb2_data1 */
- >;
- };
-};
diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
index 6f11852a33..d77fa38746 100644
--- a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
@@ -14,6 +14,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+ /delete-property/ mmc1;
+ /delete-property/ mmc2;
};
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts
b/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts
deleted file mode 100644
index e28e9625be..00
--- a/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts
+++ /dev/null
@@ -1,27 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap36xx.dtsi"
-#include "logicpd-som-lv.dtsi"
-#include "logicpd-som-lv-baseboard.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-
-/ {
- model = "LogicPD Zoom DM3730 SOM-LV Development Kit";
- compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3";
-};
-
-_pmx_core2 {
-
- hsusb2_2_pins: pinmux_hsusb2_2_pins {
- pinctrl-single,pins = <
- OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
/* etk_d10.hsusb2_clk */
- OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
/* etk_d11.hsusb2_stp */
- OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d12.hsusb2_dir */
- OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d13.hsusb2_nxt */
- OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d14.hsusb2_data0 */
- OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d15.hsusb2_data1 */
- >;
- };
-};
diff --git a/arch/arm/dts/logicpd-som-lv-baseboard.dtsi
b/arch/arm/dts/logicpd-som-lv-baseboard.dtsi
deleted file mode 100644
index 7d0468a237..00
--- a/arch/arm/dts/logicpd-som-lv-baseboard.dtsi
+++ /dev/null
@@ -1,237 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/ {
- gpio_keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <_key_pins>;
-
- sysboot2 {
- label = "gpio3";
- gpios = < 15 GPIO_ACTI
[PATCH 3/4] arm: ti: logicpd-torpedo: Migrate to OF_UPSTREAM
The DM37 and OMAP35 Torpedo share a few files, but both of them
can be migrated to OF_UPSTREAM with a small update to their
respective u-boot.dtsi files to address changes made the aliases.
Both defconfigs need to properly point to the upstream directory
structure for the device trees. With those updated, the U-Boot
device tree files can be deleted.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
index 4744872f7c..d14d68e458 100644
--- a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
@@ -14,6 +14,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+ /delete-property/ mmc1;
+ /delete-property/ mmc2;
};
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts
b/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts
deleted file mode 100644
index cb08aa62d9..00
--- a/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts
+++ /dev/null
@@ -1,21 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap34xx.dtsi"
-#include "logicpd-torpedo-som.dtsi"
-#include "logicpd-torpedo-baseboard.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-
-/ {
- model = "LogicPD Zoom OMAP35xx Torpedo Development Kit";
- compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3430", "ti,omap3";
-};
-
-_pmx_core {
- isp1763_pins: pinmux_isp1763_pins {
- pinctrl-single,pins = <
- OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP |
MUX_MODE4)/* sdmmc1_dat6.gpio_128 */
- >;
- };
-};
diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
index 2c34344504..8e8e2e4096 100644
--- a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
@@ -10,6 +10,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+ /delete-property/ mmc1;
+ /delete-property/ mmc2;
};
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts
b/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts
deleted file mode 100644
index 07ea822fe4..00
--- a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts
+++ /dev/null
@@ -1,96 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap36xx.dtsi"
-#include "logicpd-torpedo-som.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-#include "logicpd-torpedo-baseboard.dtsi"
-
-/ {
- model = "LogicPD Zoom DM3730 Torpedo + Wireless Development Kit";
- compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3";
-
- wl12xx_vmmc: wl12xx_vmmc {
- compatible = "regulator-fixed";
- regulator-name = "vwl1271";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <180>;
- gpio = < 29 0>; /* gpio157 */
- startup-delay-us = <7>;
- enable-active-high;
- vin-supply = <>;
- };
-};
-
-/*
- * Only found on the wireless SOM. For the SOM without wireless, the pins for
- * MMC3 can be routed with jumpers to the second MMC slot on the devkit and
- * gpio157 is not connected. So this should be OK to keep common for now,
- * probably device tree overlays is the way to go with the various SOM and
- * jumpering combinations for the long run.
- */
- {
- interrupts-extended = < 94 _pmx_core 0x136>;
- pinctrl-0 = <_pins _core2_pins>;
- pinctrl-names = "default";
- vmmc-supply = <_vmmc>;
- non-removable;
- bus-width = <4>;
- cap-power-off-card;
- #address-cells = <1>;
- #size-cells = <0>;
- wlcore: wlcore@2 {
- compatible = "ti,wl1283";
- reg = <2>;
- interrupt-parent = <>;
- interrupts = <24 IRQ_TYPE_EDGE_RISING>; /* gpio 152 */
- ref-clock-frequency = <2600>;
- tcxo-clock-frequency = <2600>;
- };
-};
-
- {
- /delete-property/dma-names;
- bluetooth {
- compatible = "ti,wl1283-st";
- enable-gpios = < 2 GPIO_ACTIVE_HIGH>; /* gpio 162 */
- max-speed = <300>;
- };
-};
-
-/* The DM3730 has a faster L3 than OMAP35, so increase pixel clock */
-_out {
- pixel-clock-frequency = <9000>;
-};
-
-_pmx_core {
- mmc3_pins
[PATCH 2/4] arm: ti: am3517_evm: Migrate to OF_UPSTREAM
With the feature of OF_UPSTREAM now available, the device trees
for the SOM and baseboard can now deleted and the device tree
locations need to point to the ti/omap directory.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/am3517-evm.dts b/arch/arm/dts/am3517-evm.dts
deleted file mode 100644
index d21bb2ccd0..00
--- a/arch/arm/dts/am3517-evm.dts
+++ /dev/null
@@ -1,339 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
- */
-/dts-v1/;
-
-#include "am3517.dtsi"
-#include "am3517-som.dtsi"
-#include "am3517-evm-ui.dtsi"
-#include
-
-/ {
- model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)";
- compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
-
- aliases {
- display0 =
- };
-
- chosen {
- stdout-path =
- };
-
- memory@8000 {
- device_type = "memory";
- reg = <0x8000 0x1000>; /* 256 MB */
- };
-
- vmmc_fixed: vmmc {
- compatible = "regulator-fixed";
- regulator-name = "vmmc_fixed";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- };
-
- gpio-keys {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
-
- button-user {
- label = "User Push Button";
- linux,code = ;
- gpios = < 5 GPIO_ACTIVE_LOW>;
- };
-
- switch-1 {
- label = "User Switch 1";
- linux,code = ;
- gpios = < 8 GPIO_ACTIVE_LOW>;
- };
-
- switch-2 {
- label = "User Switch 2";
- linux,code = ;
- gpios = < 9 GPIO_ACTIVE_LOW>;
- };
-
- switch-3 {
- label = "User Switch 3";
- linux,code = ;
- gpios = < 10 GPIO_ACTIVE_LOW>;
- };
-
- switch-4 {
- label = "User Switch 4";
- linux,code = ;
- gpios = < 11 GPIO_ACTIVE_LOW>;
- };
-
- switch-5 {
- label = "User Switch 5";
- linux,code = ;
- gpios = < 12 GPIO_ACTIVE_LOW>;
- };
-
- switch-6 {
- label = "User Switch 6";
- linux,code = ;
- gpios = < 13 GPIO_ACTIVE_LOW>;
- };
-
- switch-7 {
- label = "User Switch 7";
- linux,code = ;
- gpios = < 14 GPIO_ACTIVE_LOW>;
- };
-
- switch-8 {
- label = "User Switch 8";
- linux,code = ;
- gpios = < 15 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
-
- pinctrl-names = "default";
- pinctrl-0 = <_pins>;
-
- user_led_1 {
- label = "am3517evm:green:user_led_1";
- gpios = < 7 GPIO_ACTIVE_LOW>;
- default-state = "on";
- };
-
- user_led_2 {
- label = "am3517evm:green:user_led_2";
- gpios = < 6 GPIO_ACTIVE_LOW>;
- default-state = "on";
- };
-
- user_led_3 {
- label = "am3517evm:green:user_led_3";
- gpios = < 11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc0"; /* SD/MMC card activity
*/
- };
-
- user_led_4 {
- label = "am3517evm:green:user_led_4";
- gpios = < 31 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- lcd0: display@0 {
- /* This isn't the exact LCD, but the timings meet spec */
- /* To make it work, set CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4 */
- compatible = "newhaven,nhd-4.3-480272ef-atxl";
- label = "15";
- backlight = <>;
- enable-gpios = < 16 GPIO_ACTIVE_HIGH>;/* gpio176, lcd
INI */
-
[PATCH 1/4] arm: davinci: Migrate da850-evm to OF_UPSTREAM
The da850-evm can remove the U-Boot device trees if migrated
to OF_UPSTREAM. This means pointing the device trees to the
ti/davinci directory.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/da850-evm.dts b/arch/arm/dts/da850-evm.dts
deleted file mode 100644
index 378af9f344..00
--- a/arch/arm/dts/da850-evm.dts
+++ /dev/null
@@ -1,453 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Device Tree for DA850 EVM board
- *
- * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
- */
-/dts-v1/;
-#include "da850.dtsi"
-#include
-
-/ {
- compatible = "ti,da850-evm", "ti,da850";
- model = "DA850/AM1808/OMAP-L138 EVM";
-
- chosen {
- stdout-path =
- };
-
- aliases {
- serial0 =
- serial1 =
- serial2 =
- ethernet0 =
- spi0 =
- };
-
- backlight: backlight-pwm {
- pinctrl-names = "default";
- pinctrl-0 = <_pins>;
- power-supply = <_lcd>;
- compatible = "pwm-backlight";
- /*
-* The PWM here corresponds to production hardware. The
-* schematic needs to be 1015171 (15 March 2010), Rev A
-* or newer.
-*/
- pwms = < 0 5 0>;
- brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
- default-brightness-level = <7>;
- };
-
- panel {
- compatible = "ti,tilcdc,panel";
- pinctrl-names = "default";
- pinctrl-0 = <_pins>;
- /*
-* The vpif and the LCD are mutually exclusive.
-* To enable VPIF, change the status below to 'disabled' then
-* then change the status of the vpif below to 'okay'
-*/
- status = "okay";
- enable-gpios = < 40 GPIO_ACTIVE_HIGH>; /* lcd_panel_pwr */
-
- panel-info {
- ac-bias = <255>;
- ac-bias-intrpt = <0>;
- dma-burst-sz = <16>;
- bpp = <16>;
- fdd = <0x80>;
- sync-edge = <0>;
- sync-ctrl = <1>;
- raster-order = <0>;
- fifo-th = <0>;
- };
-
- display-timings {
- native-mode = <>;
- timing0: 480x272 {
- clock-frequency = <900>;
- hactive = <480>;
- vactive = <272>;
- hfront-porch = <3>;
- hback-porch = <2>;
- hsync-len = <42>;
- vback-porch = <3>;
- vfront-porch = <4>;
- vsync-len = <11>;
- hsync-active = <0>;
- vsync-active = <0>;
- de-active = <1>;
- pixelclk-active = <1>;
- };
- };
- };
-
- vbat: fixedregulator0 {
- compatible = "regulator-fixed";
- regulator-name = "vbat";
- regulator-min-microvolt = <500>;
- regulator-max-microvolt = <500>;
- regulator-boot-on;
- };
-
- baseboard_3v3: fixedregulator-3v3 {
- /* TPS73701DCQ */
- compatible = "regulator-fixed";
- regulator-name = "baseboard_3v3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- vin-supply = <>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- baseboard_1v8: fixedregulator-1v8 {
- /* TPS73701DCQ */
- compatible = "regulator-fixed";
- regulator-name = "baseboard_1v8";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <180>;
- vin-supply = <>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- backlight_lcd: backlight-regulator {
- compatible = "regulator-fixed";
- regulator-name = "lcd_backlight_pwr";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>
[PATCH 3/3] arm64: imx: imx8mn-beacon: Migrate to OF_UPSTREAM
The imx8mn-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 443d651827..6ddd6e311e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1091,7 +1091,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-evk.dtb \
imx8mn-var-som-symphony.dtb \
imx8mq-evk.dtb \
- imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
imx8mp-data-modul-edm-sbc.dtb \
diff --git a/arch/arm/dts/imx8mn-beacon-kit.dts
b/arch/arm/dts/imx8mn-beacon-kit.dts
deleted file mode 100644
index 1392ce0258..00
--- a/arch/arm/dts/imx8mn-beacon-kit.dts
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/dts-v1/;
-
-#include "imx8mn.dtsi"
-#include "imx8mn-beacon-som.dtsi"
-#include "imx8mn-beacon-baseboard.dtsi"
-
-/ {
- model = "Beacon EmbeddedWorks i.MX8M Nano Development Kit";
- compatible = "beacon,imx8mn-beacon-kit", "fsl,imx8mn";
-
- chosen {
- stdout-path =
- };
-};
diff --git a/arch/arm/dts/imx8mn-beacon-som.dtsi
b/arch/arm/dts/imx8mn-beacon-som.dtsi
deleted file mode 100644
index 1133cded9b..00
--- a/arch/arm/dts/imx8mn-beacon-som.dtsi
+++ /dev/null
@@ -1,472 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/ {
- aliases {
- rtc0 =
- rtc1 = _rtc;
- spi0 =
- };
-
- usdhc1_pwrseq: usdhc1_pwrseq {
- compatible = "mmc-pwrseq-simple";
- pinctrl-names = "default";
- pinctrl-0 = <_usdhc1_gpio>;
- reset-gpios = < 10 GPIO_ACTIVE_LOW>;
- clocks = <_32k>;
- clock-names = "ext_clock";
- post-power-on-delay-ms = <80>;
- };
-
- memory@4000 {
- device_type = "memory";
- reg = <0x0 0x4000 0 0x8000>;
- };
-};
-
-_0 {
- cpu-supply = <_reg>;
-};
-
-_1 {
- cpu-supply = <_reg>;
-};
-
-_2 {
- cpu-supply = <_reg>;
-};
-
-_3 {
- cpu-supply = <_reg>;
-};
-
-/* DDR controller is running LPDDR at 800MHz which requires 0.95V */
-_opp_table {
- opp-12 {
- opp-microvolt = <95>;
- };
-};
-
- {
- operating-points-v2 = <_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <2500>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <1>;
- };
-
- opp-800M {
- opp-hz = /bits/ 64 <8>;
- };
- };
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_fec1>;
- phy-mode = "rgmii-id";
- phy-handle = <>;
- phy-supply = <_reg>;
- phy-reset-gpios = < 22 GPIO_ACTIVE_LOW>;
- fsl,magic-packet;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- };
- };
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_flexspi>;
- status = "okay";
-
- flash@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <8000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- };
-};
-
- {
- clock-frequency = <40>;
- pinctrl-names = "default";
- pinctrl-0 = <_i2c1>;
- status = "okay";
-
- pmic@4b {
- compatible = "rohm,bd71847";
- reg = <0x4b>;
- pinctrl-names = "default";
- pinctrl-0 = <_pmic>;
- interrupt-parent = <>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- rohm,reset-snvs-powered;
- #clock-cells = <0>;
- clocks = <_32k 0>;
- clock-output-names = "clk-32k-out";
-
- regulators {
- buck1_reg: BUCK1 {
- regulator-n
[PATCH 2/3] arm64: imx: imx8mm-beacon: Migrate to OF_UPSTREAM
The imx8mm-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 04ffa1f165..443d651827 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1091,7 +1091,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-evk.dtb \
imx8mn-var-som-symphony.dtb \
imx8mq-evk.dtb \
- imx8mm-beacon-kit.dtb \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
diff --git a/arch/arm/dts/imx8mm-beacon-kit.dts
b/arch/arm/dts/imx8mm-beacon-kit.dts
deleted file mode 100644
index 74a7b0cc10..00
--- a/arch/arm/dts/imx8mm-beacon-kit.dts
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/dts-v1/;
-
-#include "imx8mm.dtsi"
-#include "imx8mm-beacon-som.dtsi"
-#include "imx8mm-beacon-baseboard.dtsi"
-
-/ {
- model = "Beacon EmbeddedWorks i.MX8M Mini Development Kit";
- compatible = "beacon,imx8mm-beacon-kit", "fsl,imx8mm";
-
- chosen {
- stdout-path =
- };
-};
diff --git a/arch/arm/dts/imx8mm-beacon-som.dtsi
b/arch/arm/dts/imx8mm-beacon-som.dtsi
deleted file mode 100644
index cf07987ccc..00
--- a/arch/arm/dts/imx8mm-beacon-som.dtsi
+++ /dev/null
@@ -1,461 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/ {
- aliases {
- rtc0 =
- rtc1 = _rtc;
- };
-
- usdhc1_pwrseq: usdhc1_pwrseq {
- compatible = "mmc-pwrseq-simple";
- pinctrl-names = "default";
- pinctrl-0 = <_usdhc1_gpio>;
- reset-gpios = < 10 GPIO_ACTIVE_LOW>;
- clocks = <_32k>;
- clock-names = "ext_clock";
- post-power-on-delay-ms = <80>;
- };
-
- memory@4000 {
- device_type = "memory";
- reg = <0x0 0x4000 0 0x8000>;
- };
-};
-
-_0 {
- cpu-supply = <_reg>;
-};
-
-_1 {
- cpu-supply = <_reg>;
-};
-
-_2 {
- cpu-supply = <_reg>;
-};
-
-_3 {
- cpu-supply = <_reg>;
-};
-
- {
- operating-points-v2 = <_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <2500>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <1>;
- };
-
- opp-750M {
- opp-hz = /bits/ 64 <75000>;
- };
- };
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_fec1>;
- phy-mode = "rgmii-id";
- phy-handle = <>;
- fsl,magic-packet;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- };
- };
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_flexspi>;
- status = "okay";
-
- flash@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <8000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- };
-};
-
- {
- clock-frequency = <40>;
- pinctrl-names = "default";
- pinctrl-0 = <_i2c1>;
- status = "okay";
-
- pmic@4b {
- compatible = "rohm,bd71847";
- reg = <0x4b>;
- pinctrl-names = "default";
- pinctrl-0 = <_pmic>;
- interrupt-parent = <>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- rohm,reset-snvs-powered;
-
- #clock-cells = <0>;
- clocks = <_32k 0>;
- clock-output-names = "clk-32k-out";
-
- regulators {
- buck1_reg: BUCK1 {
- regulator-name = "buck1";
- regulator-min-microvolt = <70>;
- regulator-max-microvolt = <130>;
- regulator-boot-on;
- regulator-always-on;
-
[PATCH 1/3] arm64: imx: imx8mp-beacon: Migrate to OF_UPSTREAM
The imx8mp-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c..04ffa1f165 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1095,7 +1095,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
- imx8mp-beacon-kit.dtb \
imx8mp-data-modul-edm-sbc.dtb \
imx8mp-dhcom-som-overlay-rev100.dtbo \
imx8mp-dhcom-som-overlay-eth1xfast.dtbo \
diff --git a/arch/arm/dts/imx8mp-beacon-kit.dts
b/arch/arm/dts/imx8mp-beacon-kit.dts
deleted file mode 100644
index a08057410b..00
--- a/arch/arm/dts/imx8mp-beacon-kit.dts
+++ /dev/null
@@ -1,783 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks
- */
-
-/dts-v1/;
-
-#include
-#include
-#include "imx8mp.dtsi"
-#include "imx8mp-beacon-som.dtsi"
-
-/ {
- model = "Beacon EmbeddedWorks i.MX8MPlus Development kit";
- compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp";
-
- aliases {
- ethernet0 =
- ethernet1 =
- };
-
- chosen {
- stdout-path =
- };
-
- clk_xtal25: clock-xtal25 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <2500>;
- };
-
- connector {
- compatible = "usb-c-connector";
- label = "USB-C";
- data-role = "dual";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- hs_ep: endpoint {
- remote-endpoint = <_hs_ep>;
- };
- };
- port@1 {
- reg = <1>;
-
- ss_ep: endpoint {
- remote-endpoint = <_in_ep>;
- };
- };
- };
- };
-
- dmic_codec: dmic-codec {
- compatible = "dmic-codec";
- num-channels = <1>;
- #sound-dai-cells = <0>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
-
- button-0 {
- label = "btn0";
- linux,code = ;
- gpios = <_1 12 (GPIO_ACTIVE_LOW |
GPIO_PULL_UP)>;
- wakeup-source;
- };
-
- button-1 {
- label = "btn1";
- linux,code = ;
- gpios = <_1 13 (GPIO_ACTIVE_LOW |
GPIO_PULL_UP)>;
- wakeup-source;
- };
-
- button-2 {
- label = "btn2";
- linux,code = ;
- gpios = <_1 14 (GPIO_ACTIVE_LOW |
GPIO_PULL_UP)>;
- wakeup-source;
- };
-
- button-3 {
- label = "btn3";
- linux,code = ;
- gpios = <_1 15 (GPIO_ACTIVE_LOW |
GPIO_PULL_UP)>;
- wakeup-source;
- };
- };
-
- bridge-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con: endpoint {
- remote-endpoint = <_out>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <_led3>;
-
- led-0 {
- label = "gen_led0";
- gpios = <_1 4 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- led-1 {
- label = "gen_led1";
- gpios = <_1 5 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- led-2 {
- label = "gen_led2";
- gpios = <_1 6 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- led-3 {
- label = "heartbeat";
-
[PATCH] configs: imx8mp_beacon: Enable PCIe NVMe drives
The baseboard supports and NVMe drives via the PCIe slot. This requires a few extra config options to be enabled. The NVMe can be enumerated with the following commands: u-boot=> pci enum PCIE-0: Link up (Gen1-x1, Bus0) u-boot=> nvme scan u-boot=> nvme info Device 0: Vendor: 0x15b7 Rev: 20120022 Prod: 184960441105 Type: Hard Disk Capacity: 122104.3 MB = 119.2 GB (250069680 x 512) u-boot=> Signed-off-by: Adam Ford --- Depends on: https://patchwork.ozlabs.org/project/uboot/patch/20240326202439.46707-4-aford...@gmail.com/ diff --git a/configs/imx8mp_beacon_defconfig b/configs/imx8mp_beacon_defconfig index 0ae8c9645a..fe1678d8ae 100644 --- a/configs/imx8mp_beacon_defconfig +++ b/configs/imx8mp_beacon_defconfig @@ -15,6 +15,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-beacon-kit" CONFIG_SPL_TEXT_BASE=0x92 CONFIG_TARGET_IMX8MP_BEACON=y +CONFIG_DM_RESET=y CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -27,6 +28,7 @@ CONFIG_ARMV8_SET_SMPEN=y CONFIG_ARMV8_EA_EL3_FIRST=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x4800 CONFIG_SYS_LOAD_ADDR=0x4048 +CONFIG_PCI=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 @@ -65,6 +67,7 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y @@ -118,8 +121,11 @@ CONFIG_DWC_ETH_QOS_IMX=y CONFIG_FEC_MXC=y CONFIG_RGMII=y CONFIG_MII=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_IMX=y CONFIG_PHY=y CONFIG_PHY_IMX8MQ_USB=y +CONFIG_PHY_IMX8M_PCIE=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y -- 2.43.0
[PATCH 7/7] arm: davinci: Migrate da850-evm to OF_UPSTREAM
The da850-evm can remove the U-Boot device trees if migrated
to OF_UPSTREAM. This means pointing the device trees to the
ti/davinci directory.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/da850-evm.dts b/arch/arm/dts/da850-evm.dts
deleted file mode 100644
index 378af9f344..00
--- a/arch/arm/dts/da850-evm.dts
+++ /dev/null
@@ -1,453 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Device Tree for DA850 EVM board
- *
- * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
- */
-/dts-v1/;
-#include "da850.dtsi"
-#include
-
-/ {
- compatible = "ti,da850-evm", "ti,da850";
- model = "DA850/AM1808/OMAP-L138 EVM";
-
- chosen {
- stdout-path =
- };
-
- aliases {
- serial0 =
- serial1 =
- serial2 =
- ethernet0 =
- spi0 =
- };
-
- backlight: backlight-pwm {
- pinctrl-names = "default";
- pinctrl-0 = <_pins>;
- power-supply = <_lcd>;
- compatible = "pwm-backlight";
- /*
-* The PWM here corresponds to production hardware. The
-* schematic needs to be 1015171 (15 March 2010), Rev A
-* or newer.
-*/
- pwms = < 0 5 0>;
- brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
- default-brightness-level = <7>;
- };
-
- panel {
- compatible = "ti,tilcdc,panel";
- pinctrl-names = "default";
- pinctrl-0 = <_pins>;
- /*
-* The vpif and the LCD are mutually exclusive.
-* To enable VPIF, change the status below to 'disabled' then
-* then change the status of the vpif below to 'okay'
-*/
- status = "okay";
- enable-gpios = < 40 GPIO_ACTIVE_HIGH>; /* lcd_panel_pwr */
-
- panel-info {
- ac-bias = <255>;
- ac-bias-intrpt = <0>;
- dma-burst-sz = <16>;
- bpp = <16>;
- fdd = <0x80>;
- sync-edge = <0>;
- sync-ctrl = <1>;
- raster-order = <0>;
- fifo-th = <0>;
- };
-
- display-timings {
- native-mode = <>;
- timing0: 480x272 {
- clock-frequency = <900>;
- hactive = <480>;
- vactive = <272>;
- hfront-porch = <3>;
- hback-porch = <2>;
- hsync-len = <42>;
- vback-porch = <3>;
- vfront-porch = <4>;
- vsync-len = <11>;
- hsync-active = <0>;
- vsync-active = <0>;
- de-active = <1>;
- pixelclk-active = <1>;
- };
- };
- };
-
- vbat: fixedregulator0 {
- compatible = "regulator-fixed";
- regulator-name = "vbat";
- regulator-min-microvolt = <500>;
- regulator-max-microvolt = <500>;
- regulator-boot-on;
- };
-
- baseboard_3v3: fixedregulator-3v3 {
- /* TPS73701DCQ */
- compatible = "regulator-fixed";
- regulator-name = "baseboard_3v3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- vin-supply = <>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- baseboard_1v8: fixedregulator-1v8 {
- /* TPS73701DCQ */
- compatible = "regulator-fixed";
- regulator-name = "baseboard_1v8";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <180>;
- vin-supply = <>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- backlight_lcd: backlight-regulator {
- compatible = "regulator-fixed";
- regulator-name = "lcd_backlight_pwr";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>
[PATCH 6/7] arm64: imx: imx8mn-beacon: Migrate to OF_UPSTREAM
The imx8mn-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 443d651827..6ddd6e311e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1091,7 +1091,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-evk.dtb \
imx8mn-var-som-symphony.dtb \
imx8mq-evk.dtb \
- imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
imx8mp-data-modul-edm-sbc.dtb \
diff --git a/arch/arm/dts/imx8mn-beacon-kit.dts
b/arch/arm/dts/imx8mn-beacon-kit.dts
deleted file mode 100644
index 1392ce0258..00
--- a/arch/arm/dts/imx8mn-beacon-kit.dts
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/dts-v1/;
-
-#include "imx8mn.dtsi"
-#include "imx8mn-beacon-som.dtsi"
-#include "imx8mn-beacon-baseboard.dtsi"
-
-/ {
- model = "Beacon EmbeddedWorks i.MX8M Nano Development Kit";
- compatible = "beacon,imx8mn-beacon-kit", "fsl,imx8mn";
-
- chosen {
- stdout-path =
- };
-};
diff --git a/arch/arm/dts/imx8mn-beacon-som.dtsi
b/arch/arm/dts/imx8mn-beacon-som.dtsi
deleted file mode 100644
index 1133cded9b..00
--- a/arch/arm/dts/imx8mn-beacon-som.dtsi
+++ /dev/null
@@ -1,472 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/ {
- aliases {
- rtc0 =
- rtc1 = _rtc;
- spi0 =
- };
-
- usdhc1_pwrseq: usdhc1_pwrseq {
- compatible = "mmc-pwrseq-simple";
- pinctrl-names = "default";
- pinctrl-0 = <_usdhc1_gpio>;
- reset-gpios = < 10 GPIO_ACTIVE_LOW>;
- clocks = <_32k>;
- clock-names = "ext_clock";
- post-power-on-delay-ms = <80>;
- };
-
- memory@4000 {
- device_type = "memory";
- reg = <0x0 0x4000 0 0x8000>;
- };
-};
-
-_0 {
- cpu-supply = <_reg>;
-};
-
-_1 {
- cpu-supply = <_reg>;
-};
-
-_2 {
- cpu-supply = <_reg>;
-};
-
-_3 {
- cpu-supply = <_reg>;
-};
-
-/* DDR controller is running LPDDR at 800MHz which requires 0.95V */
-_opp_table {
- opp-12 {
- opp-microvolt = <95>;
- };
-};
-
- {
- operating-points-v2 = <_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <2500>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <1>;
- };
-
- opp-800M {
- opp-hz = /bits/ 64 <8>;
- };
- };
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_fec1>;
- phy-mode = "rgmii-id";
- phy-handle = <>;
- phy-supply = <_reg>;
- phy-reset-gpios = < 22 GPIO_ACTIVE_LOW>;
- fsl,magic-packet;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- };
- };
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_flexspi>;
- status = "okay";
-
- flash@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <8000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- };
-};
-
- {
- clock-frequency = <40>;
- pinctrl-names = "default";
- pinctrl-0 = <_i2c1>;
- status = "okay";
-
- pmic@4b {
- compatible = "rohm,bd71847";
- reg = <0x4b>;
- pinctrl-names = "default";
- pinctrl-0 = <_pmic>;
- interrupt-parent = <>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- rohm,reset-snvs-powered;
- #clock-cells = <0>;
- clocks = <_32k 0>;
- clock-output-names = "clk-32k-out";
-
- regulators {
- buck1_reg: BUCK1 {
- regulator-n
[PATCH 5/7] arm64: imx: imx8mm-beacon: Migrate to OF_UPSTREAM
The imx8mm-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 04ffa1f165..443d651827 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1091,7 +1091,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-evk.dtb \
imx8mn-var-som-symphony.dtb \
imx8mq-evk.dtb \
- imx8mm-beacon-kit.dtb \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
diff --git a/arch/arm/dts/imx8mm-beacon-kit.dts
b/arch/arm/dts/imx8mm-beacon-kit.dts
deleted file mode 100644
index 74a7b0cc10..00
--- a/arch/arm/dts/imx8mm-beacon-kit.dts
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/dts-v1/;
-
-#include "imx8mm.dtsi"
-#include "imx8mm-beacon-som.dtsi"
-#include "imx8mm-beacon-baseboard.dtsi"
-
-/ {
- model = "Beacon EmbeddedWorks i.MX8M Mini Development Kit";
- compatible = "beacon,imx8mm-beacon-kit", "fsl,imx8mm";
-
- chosen {
- stdout-path =
- };
-};
diff --git a/arch/arm/dts/imx8mm-beacon-som.dtsi
b/arch/arm/dts/imx8mm-beacon-som.dtsi
deleted file mode 100644
index cf07987ccc..00
--- a/arch/arm/dts/imx8mm-beacon-som.dtsi
+++ /dev/null
@@ -1,461 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/ {
- aliases {
- rtc0 =
- rtc1 = _rtc;
- };
-
- usdhc1_pwrseq: usdhc1_pwrseq {
- compatible = "mmc-pwrseq-simple";
- pinctrl-names = "default";
- pinctrl-0 = <_usdhc1_gpio>;
- reset-gpios = < 10 GPIO_ACTIVE_LOW>;
- clocks = <_32k>;
- clock-names = "ext_clock";
- post-power-on-delay-ms = <80>;
- };
-
- memory@4000 {
- device_type = "memory";
- reg = <0x0 0x4000 0 0x8000>;
- };
-};
-
-_0 {
- cpu-supply = <_reg>;
-};
-
-_1 {
- cpu-supply = <_reg>;
-};
-
-_2 {
- cpu-supply = <_reg>;
-};
-
-_3 {
- cpu-supply = <_reg>;
-};
-
- {
- operating-points-v2 = <_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <2500>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <1>;
- };
-
- opp-750M {
- opp-hz = /bits/ 64 <75000>;
- };
- };
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_fec1>;
- phy-mode = "rgmii-id";
- phy-handle = <>;
- fsl,magic-packet;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- };
- };
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_flexspi>;
- status = "okay";
-
- flash@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <8000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- };
-};
-
- {
- clock-frequency = <40>;
- pinctrl-names = "default";
- pinctrl-0 = <_i2c1>;
- status = "okay";
-
- pmic@4b {
- compatible = "rohm,bd71847";
- reg = <0x4b>;
- pinctrl-names = "default";
- pinctrl-0 = <_pmic>;
- interrupt-parent = <>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- rohm,reset-snvs-powered;
-
- #clock-cells = <0>;
- clocks = <_32k 0>;
- clock-output-names = "clk-32k-out";
-
- regulators {
- buck1_reg: BUCK1 {
- regulator-name = "buck1";
- regulator-min-microvolt = <70>;
- regulator-max-microvolt = <130>;
- regulator-boot-on;
- regulator-always-on;
-
[PATCH 4/7] arm64: imx: imx8mp-beacon: Migrate to OF_UPSTREAM
The imx8mp-beacon boards can migrate to OF_UPSTREAM which also
allows for the removal the device tree files.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d85a33055c..04ffa1f165 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1095,7 +1095,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
- imx8mp-beacon-kit.dtb \
imx8mp-data-modul-edm-sbc.dtb \
imx8mp-dhcom-som-overlay-rev100.dtbo \
imx8mp-dhcom-som-overlay-eth1xfast.dtbo \
diff --git a/arch/arm/dts/imx8mp-beacon-kit.dts
b/arch/arm/dts/imx8mp-beacon-kit.dts
deleted file mode 100644
index a08057410b..00
--- a/arch/arm/dts/imx8mp-beacon-kit.dts
+++ /dev/null
@@ -1,783 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks
- */
-
-/dts-v1/;
-
-#include
-#include
-#include "imx8mp.dtsi"
-#include "imx8mp-beacon-som.dtsi"
-
-/ {
- model = "Beacon EmbeddedWorks i.MX8MPlus Development kit";
- compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp";
-
- aliases {
- ethernet0 =
- ethernet1 =
- };
-
- chosen {
- stdout-path =
- };
-
- clk_xtal25: clock-xtal25 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <2500>;
- };
-
- connector {
- compatible = "usb-c-connector";
- label = "USB-C";
- data-role = "dual";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- hs_ep: endpoint {
- remote-endpoint = <_hs_ep>;
- };
- };
- port@1 {
- reg = <1>;
-
- ss_ep: endpoint {
- remote-endpoint = <_in_ep>;
- };
- };
- };
- };
-
- dmic_codec: dmic-codec {
- compatible = "dmic-codec";
- num-channels = <1>;
- #sound-dai-cells = <0>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
-
- button-0 {
- label = "btn0";
- linux,code = ;
- gpios = <_1 12 (GPIO_ACTIVE_LOW |
GPIO_PULL_UP)>;
- wakeup-source;
- };
-
- button-1 {
- label = "btn1";
- linux,code = ;
- gpios = <_1 13 (GPIO_ACTIVE_LOW |
GPIO_PULL_UP)>;
- wakeup-source;
- };
-
- button-2 {
- label = "btn2";
- linux,code = ;
- gpios = <_1 14 (GPIO_ACTIVE_LOW |
GPIO_PULL_UP)>;
- wakeup-source;
- };
-
- button-3 {
- label = "btn3";
- linux,code = ;
- gpios = <_1 15 (GPIO_ACTIVE_LOW |
GPIO_PULL_UP)>;
- wakeup-source;
- };
- };
-
- bridge-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con: endpoint {
- remote-endpoint = <_out>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <_led3>;
-
- led-0 {
- label = "gen_led0";
- gpios = <_1 4 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- led-1 {
- label = "gen_led1";
- gpios = <_1 5 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- led-2 {
- label = "gen_led2";
- gpios = <_1 6 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- led-3 {
- label = "heartbeat";
-
[PATCH 3/7] arm: ti: logicpd-som-lv: Migrate to OF_UPSTREAM
The DM37 and OMAP35 SOM-LV share a few files, but both of them
can be migrated to OF_UPSTREAM with a small update to their
respective u-boot.dtsi files to address changes made the aliases.
Both defconfigs need to properly point to the upstream directory
structure for the device trees. With those updated, the U-Boot
device tree files can be deleted.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
index 6f11852a33..d77fa38746 100644
--- a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
@@ -14,6 +14,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+ /delete-property/ mmc1;
+ /delete-property/ mmc2;
};
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts
b/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts
deleted file mode 100644
index f690bc83bf..00
--- a/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts
+++ /dev/null
@@ -1,27 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap34xx.dtsi"
-#include "logicpd-som-lv.dtsi"
-#include "logicpd-som-lv-baseboard.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-
-/ {
- model = "LogicPD Zoom OMAP35xx SOM-LV Development Kit";
- compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3430", "ti,omap3";
-};
-
-_pmx_core2 {
-
- hsusb2_2_pins: pinmux_hsusb2_2_pins {
- pinctrl-single,pins = <
- OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
/* etk_d10.hsusb2_clk */
- OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
/* etk_d11.hsusb2_stp */
- OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d12.hsusb2_dir */
- OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d13.hsusb2_nxt */
- OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d14.hsusb2_data0 */
- OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d15.hsusb2_data1 */
- >;
- };
-};
diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
index 6f11852a33..d77fa38746 100644
--- a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
@@ -14,6 +14,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+ /delete-property/ mmc1;
+ /delete-property/ mmc2;
};
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts
b/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts
deleted file mode 100644
index e28e9625be..00
--- a/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts
+++ /dev/null
@@ -1,27 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap36xx.dtsi"
-#include "logicpd-som-lv.dtsi"
-#include "logicpd-som-lv-baseboard.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-
-/ {
- model = "LogicPD Zoom DM3730 SOM-LV Development Kit";
- compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3";
-};
-
-_pmx_core2 {
-
- hsusb2_2_pins: pinmux_hsusb2_2_pins {
- pinctrl-single,pins = <
- OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)
/* etk_d10.hsusb2_clk */
- OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)
/* etk_d11.hsusb2_stp */
- OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d12.hsusb2_dir */
- OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d13.hsusb2_nxt */
- OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d14.hsusb2_data0 */
- OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN |
MUX_MODE3)/* etk_d15.hsusb2_data1 */
- >;
- };
-};
diff --git a/arch/arm/dts/logicpd-som-lv-baseboard.dtsi
b/arch/arm/dts/logicpd-som-lv-baseboard.dtsi
deleted file mode 100644
index 7d0468a237..00
--- a/arch/arm/dts/logicpd-som-lv-baseboard.dtsi
+++ /dev/null
@@ -1,237 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/ {
- gpio_keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <_key_pins>;
-
- sysboot2 {
- label = "gpio3";
- gpios = < 15 GPIO_ACTI
[PATCH 2/7] arm: ti: logicpd-torpedo: Migrate to OF_UPSTREAM
The DM37 and OMAP35 Torpedo share a few files, but both of them
can be migrated to OF_UPSTREAM with a small update to their
respective u-boot.dtsi files to address changes made the aliases.
Both defconfigs need to properly point to the upstream directory
structure for the device trees. With those updated, the U-Boot
device tree files can be deleted.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
index 4744872f7c..d14d68e458 100644
--- a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
@@ -14,6 +14,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+ /delete-property/ mmc1;
+ /delete-property/ mmc2;
};
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts
b/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts
deleted file mode 100644
index cb08aa62d9..00
--- a/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts
+++ /dev/null
@@ -1,21 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap34xx.dtsi"
-#include "logicpd-torpedo-som.dtsi"
-#include "logicpd-torpedo-baseboard.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-
-/ {
- model = "LogicPD Zoom OMAP35xx Torpedo Development Kit";
- compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3430", "ti,omap3";
-};
-
-_pmx_core {
- isp1763_pins: pinmux_isp1763_pins {
- pinctrl-single,pins = <
- OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP |
MUX_MODE4)/* sdmmc1_dat6.gpio_128 */
- >;
- };
-};
diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
index 2c34344504..8e8e2e4096 100644
--- a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
@@ -10,6 +10,8 @@
aliases {
/delete-property/ serial1;
/delete-property/ serial2;
+ /delete-property/ mmc1;
+ /delete-property/ mmc2;
};
ethernet@0800 {
diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts
b/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts
deleted file mode 100644
index 07ea822fe4..00
--- a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts
+++ /dev/null
@@ -1,96 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-/dts-v1/;
-
-#include "omap36xx.dtsi"
-#include "logicpd-torpedo-som.dtsi"
-#include "omap-gpmc-smsc9221.dtsi"
-#include "logicpd-torpedo-baseboard.dtsi"
-
-/ {
- model = "LogicPD Zoom DM3730 Torpedo + Wireless Development Kit";
- compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3";
-
- wl12xx_vmmc: wl12xx_vmmc {
- compatible = "regulator-fixed";
- regulator-name = "vwl1271";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <180>;
- gpio = < 29 0>; /* gpio157 */
- startup-delay-us = <7>;
- enable-active-high;
- vin-supply = <>;
- };
-};
-
-/*
- * Only found on the wireless SOM. For the SOM without wireless, the pins for
- * MMC3 can be routed with jumpers to the second MMC slot on the devkit and
- * gpio157 is not connected. So this should be OK to keep common for now,
- * probably device tree overlays is the way to go with the various SOM and
- * jumpering combinations for the long run.
- */
- {
- interrupts-extended = < 94 _pmx_core 0x136>;
- pinctrl-0 = <_pins _core2_pins>;
- pinctrl-names = "default";
- vmmc-supply = <_vmmc>;
- non-removable;
- bus-width = <4>;
- cap-power-off-card;
- #address-cells = <1>;
- #size-cells = <0>;
- wlcore: wlcore@2 {
- compatible = "ti,wl1283";
- reg = <2>;
- interrupt-parent = <>;
- interrupts = <24 IRQ_TYPE_EDGE_RISING>; /* gpio 152 */
- ref-clock-frequency = <2600>;
- tcxo-clock-frequency = <2600>;
- };
-};
-
- {
- /delete-property/dma-names;
- bluetooth {
- compatible = "ti,wl1283-st";
- enable-gpios = < 2 GPIO_ACTIVE_HIGH>; /* gpio 162 */
- max-speed = <300>;
- };
-};
-
-/* The DM3730 has a faster L3 than OMAP35, so increase pixel clock */
-_out {
- pixel-clock-frequency = <9000>;
-};
-
-_pmx_core {
- mmc3_pins
[PATCH 1/7] arm: ti: am3517_evm: Migrate to OF_UPSTREAM
With the feature of OF_UPSTREAM now available, the device trees
for the SOM and baseboard can now deleted and the device tree
locations need to point to the ti/omap directory.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/am3517-evm.dts b/arch/arm/dts/am3517-evm.dts
deleted file mode 100644
index d21bb2ccd0..00
--- a/arch/arm/dts/am3517-evm.dts
+++ /dev/null
@@ -1,339 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
- */
-/dts-v1/;
-
-#include "am3517.dtsi"
-#include "am3517-som.dtsi"
-#include "am3517-evm-ui.dtsi"
-#include
-
-/ {
- model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)";
- compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
-
- aliases {
- display0 =
- };
-
- chosen {
- stdout-path =
- };
-
- memory@8000 {
- device_type = "memory";
- reg = <0x8000 0x1000>; /* 256 MB */
- };
-
- vmmc_fixed: vmmc {
- compatible = "regulator-fixed";
- regulator-name = "vmmc_fixed";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- };
-
- gpio-keys {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
-
- button-user {
- label = "User Push Button";
- linux,code = ;
- gpios = < 5 GPIO_ACTIVE_LOW>;
- };
-
- switch-1 {
- label = "User Switch 1";
- linux,code = ;
- gpios = < 8 GPIO_ACTIVE_LOW>;
- };
-
- switch-2 {
- label = "User Switch 2";
- linux,code = ;
- gpios = < 9 GPIO_ACTIVE_LOW>;
- };
-
- switch-3 {
- label = "User Switch 3";
- linux,code = ;
- gpios = < 10 GPIO_ACTIVE_LOW>;
- };
-
- switch-4 {
- label = "User Switch 4";
- linux,code = ;
- gpios = < 11 GPIO_ACTIVE_LOW>;
- };
-
- switch-5 {
- label = "User Switch 5";
- linux,code = ;
- gpios = < 12 GPIO_ACTIVE_LOW>;
- };
-
- switch-6 {
- label = "User Switch 6";
- linux,code = ;
- gpios = < 13 GPIO_ACTIVE_LOW>;
- };
-
- switch-7 {
- label = "User Switch 7";
- linux,code = ;
- gpios = < 14 GPIO_ACTIVE_LOW>;
- };
-
- switch-8 {
- label = "User Switch 8";
- linux,code = ;
- gpios = < 15 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
-
- pinctrl-names = "default";
- pinctrl-0 = <_pins>;
-
- user_led_1 {
- label = "am3517evm:green:user_led_1";
- gpios = < 7 GPIO_ACTIVE_LOW>;
- default-state = "on";
- };
-
- user_led_2 {
- label = "am3517evm:green:user_led_2";
- gpios = < 6 GPIO_ACTIVE_LOW>;
- default-state = "on";
- };
-
- user_led_3 {
- label = "am3517evm:green:user_led_3";
- gpios = < 11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc0"; /* SD/MMC card activity
*/
- };
-
- user_led_4 {
- label = "am3517evm:green:user_led_4";
- gpios = < 31 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- lcd0: display@0 {
- /* This isn't the exact LCD, but the timings meet spec */
- /* To make it work, set CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4 */
- compatible = "newhaven,nhd-4.3-480272ef-atxl";
- label = "15";
- backlight = <>;
- enable-gpios = < 16 GPIO_ACTIVE_HIGH>;/* gpio176, lcd
INI */
-
Re: [PATCH] Makefile: Add missing OF_UPSTREAM Makefile for 32bit ARM
On Mon, Mar 18, 2024 at 10:03 AM Marek Vasut wrote: > > Copy dts/upstream/src/arm64/Makefile into dts/upstream/src/arm/Makefile > and create a commit. This makes 32bit ARM buildable with OF_UPSTREAM . > > Signed-off-by: Marek Vasut Tested-by: Adam Ford #am3517-evm > --- > Cc: Adam Ford > Cc: Biju Das > Cc: Lad Prabhakar > Cc: Paul Barker > Cc: Ralph Siemsen > Cc: Tom Rini > --- > dts/upstream/src/arm/Makefile | 14 ++ > 1 file changed, 14 insertions(+) > create mode 100644 dts/upstream/src/arm/Makefile > > diff --git a/dts/upstream/src/arm/Makefile b/dts/upstream/src/arm/Makefile > new file mode 100644 > index 000..9a8f6aa3584 > --- /dev/null > +++ b/dts/upstream/src/arm/Makefile > @@ -0,0 +1,14 @@ > +# SPDX-License-Identifier: GPL-2.0+ > + > +include $(srctree)/scripts/Makefile.dts > + > +targets += $(dtb-y) > + > +# Add any required device tree compiler flags here > +DTC_FLAGS += -a 0x8 > + > +PHONY += dtbs > +dtbs: $(addprefix $(obj)/, $(dtb-y)) > + @: > + > +clean-files := */*.dtb */*.dtbo > -- > 2.43.0 >
Re: [PATCH 2/2] ARM: dts: renesas: Switch to using upstream DT on 64bit Renesas SoCs
On Mon, Mar 18, 2024 at 10:00 AM Marek Vasut wrote: > > Enable OF_UPSTREAM to use upstream DT and add renesas/ prefix to the > DEFAULT_DEVICE_TREE and OF_LIST. And thereby directly build DTB from > dts/upstream/src/ including *-u-boot.dtsi files from arch/$(ARCH)/dts/ > directory. > > The configuration update has been done using the following script: > ``` > sed -i '/^CONFIG_DEFAULT_DEVICE_TREE/ s@="@/@' `git grep -li renesas > configs` > sed -i '/^CONFIG_OF_LIST/ s@r8a@renesas/&@g' `git grep -li renesas configs` > ``` > > There are SoCs which are not included in this patch. The 32bit SoCs > require further infrastructure work. R8A779H0 is coming during the > next upstream DT synchronization cycle as it is not included in > current upstream DTs yet. > > Signed-off-by: Marek Vasut LTGM! Thanks for doing that. I was going to do that after the April release was done, but you beat me to it. Reviewed-by: Adam Ford # Beacon boards > --- > Cc: Adam Ford > Cc: Biju Das > Cc: Lad Prabhakar > Cc: Paul Barker > Cc: Ralph Siemsen > Cc: Tom Rini > --- > arch/arm/mach-renesas/Kconfig | 1 + > configs/hihope_rzg2_defconfig | 4 ++-- > configs/r8a77970_eagle_defconfig | 2 +- > configs/r8a77970_v3msk_defconfig | 2 +- > configs/r8a77980_condor_defconfig | 2 +- > configs/r8a77980_v3hsk_defconfig | 2 +- > configs/r8a77990_ebisu_defconfig | 2 +- > configs/r8a77995_draak_defconfig | 2 +- > configs/r8a779a0_falcon_defconfig | 2 +- > configs/r8a779f0_spider_defconfig | 2 +- > configs/r8a779g0_whitehawk_defconfig | 2 +- > configs/r8a779h0_grayhawk_defconfig | 1 + > configs/rcar3_salvator-x_defconfig| 4 ++-- > configs/rcar3_ulcb_defconfig | 4 ++-- > configs/renesas_rzg2l_smarc_defconfig | 2 +- > configs/rzg2_beacon_defconfig | 4 ++-- > configs/silinux_ek874_defconfig | 2 +- > 17 files changed, 21 insertions(+), 19 deletions(-) > > diff --git a/arch/arm/mach-renesas/Kconfig b/arch/arm/mach-renesas/Kconfig > index 2ac867612bf..aeb55da609b 100644 > --- a/arch/arm/mach-renesas/Kconfig > +++ b/arch/arm/mach-renesas/Kconfig > @@ -14,6 +14,7 @@ config RCAR_64 > imply CMD_GPT > imply CMD_MMC_SWRITE if MMC > imply CMD_UUID > + imply OF_UPSTREAM > imply SUPPORT_EMMC_RPMB if MMC > > choice > diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig > index 88c7ed1b98f..149ce0bac0d 100644 > --- a/configs/hihope_rzg2_defconfig > +++ b/configs/hihope_rzg2_defconfig > @@ -7,7 +7,7 @@ CONFIG_SYS_MALLOC_LEN=0x400 > CONFIG_ENV_SIZE=0x2 > CONFIG_ENV_OFFSET=0xFFFE > CONFIG_DM_GPIO=y > -CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-hihope-rzg2m" > +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a774a1-hihope-rzg2m" > CONFIG_RCAR_GEN3=y > CONFIG_TARGET_HIHOPE_RZG2=y > CONFIG_SYS_MONITOR_LEN=1048576 > @@ -40,7 +40,7 @@ CONFIG_CMD_EXT4_WRITE=y > CONFIG_CMD_FAT=y > CONFIG_CMD_FS_GENERIC=y > CONFIG_OF_CONTROL=y > -CONFIG_OF_LIST="r8a774a1-hihope-rzg2m r8a774b1-hihope-rzg2n > r8a774e1-hihope-rzg2h" > +CONFIG_OF_LIST="renesas/r8a774a1-hihope-rzg2m renesas/r8a774b1-hihope-rzg2n > renesas/r8a774e1-hihope-rzg2h" > CONFIG_MULTI_DTB_FIT_LZO=y > CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y > CONFIG_ENV_OVERWRITE=y > diff --git a/configs/r8a77970_eagle_defconfig > b/configs/r8a77970_eagle_defconfig > index a3f695e4238..fc39412f65c 100644 > --- a/configs/r8a77970_eagle_defconfig > +++ b/configs/r8a77970_eagle_defconfig > @@ -9,7 +9,7 @@ CONFIG_ENV_SIZE=0x4 > CONFIG_ENV_OFFSET=0x70 > CONFIG_ENV_SECT_SIZE=0x4 > CONFIG_DM_GPIO=y > -CONFIG_DEFAULT_DEVICE_TREE="r8a77970-eagle" > +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77970-eagle" > CONFIG_SPL_TEXT_BASE=0xe6318000 > CONFIG_RCAR_GEN3=y > CONFIG_TARGET_EAGLE=y > diff --git a/configs/r8a77970_v3msk_defconfig > b/configs/r8a77970_v3msk_defconfig > index 05c8d0e3868..bcd70b768ee 100644 > --- a/configs/r8a77970_v3msk_defconfig > +++ b/configs/r8a77970_v3msk_defconfig > @@ -9,7 +9,7 @@ CONFIG_ENV_SIZE=0x4 > CONFIG_ENV_OFFSET=0x70 > CONFIG_ENV_SECT_SIZE=0x4 > CONFIG_DM_GPIO=y > -CONFIG_DEFAULT_DEVICE_TREE="r8a77970-v3msk" > +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77970-v3msk" > CONFIG_SPL_TEXT_BASE=0xe6318000 > CONFIG_RCAR_GEN3=y > CONFIG_R8A77970=y > diff --git a/configs/r8a77980_condor_defconfig > b/configs/r8a77980_condor_defconfig > index 9e11c1b27ee..65eb563a712 100644 > --- a/configs/r8a77980_condor_defconfig > +++ b/configs/r8a77980_condor_defconfig > @@ -8,7 +8,7
Re: [PATCH] ARM: dts: renesas: Stop using the -u-boot DTs for build
On Sun, Mar 17, 2024 at 1:24 AM Marek Vasut
wrote:
>
> The U-Boot build system can automatically paste -u-boot.dtsi at the
> end of matching .dts during build. Stop emulating this behavior and
> rename the -u-boot.dts files to -u-boot.dtsi, drop "#include...dts"
> from those new u-boot.dtsi files, and update board configuration
> accordingly.
>
> The rename, '#include...dts` scrubbing and configuration update has
> been done using the following script:
> ```
> $ find . -name r[78]\*-u-boot.dts | sort -u | while read line ; do \
> git mv ${line%-u-boot.dts}-u-boot.dts ${line%-u-boot.dts}-u-boot.dtsi ; \
> done
> $ sed -i '/^#include.*dts"/ d' `find . -name r[78]\*-u-boot.dtsi`
> $ sed -i 's@-u-boot@@g' `git grep -li renesas configs`
> ```
> The Salvator-X and ULCB board files have been updated manually.
>
> Signed-off-by: Marek Vasut
Seems like the right thing to do. Beacon should boards do this already.
Acked-by: Adam Ford
> ---
> Cc: Adam Ford
> Cc: Biju Das
> Cc: Lad Prabhakar
> Cc: Paul Barker
> Cc: Ralph Siemsen
> ---
> arch/arm/dts/Makefile | 58 +--
> ...boot.dts => r7s72100-gr-peach-u-boot.dtsi} | 1 -
> dts => r8a774a1-hihope-rzg2m-u-boot.dtsi} | 1 -
> dts => r8a774b1-hihope-rzg2n-u-boot.dtsi} | 1 -
> ...-u-boot.dts => r8a774c0-ek874-u-boot.dtsi} | 1 -
> dts => r8a774e1-hihope-rzg2h-u-boot.dtsi} | 1 -
> ...r-u-boot.dts => r8a7790-lager-u-boot.dtsi} | 1 -
> ...t-u-boot.dts => r8a7790-stout-u-boot.dtsi} | 1 -
> ...u-boot.dts => r8a7791-koelsch-u-boot.dtsi} | 1 -
> ...-u-boot.dts => r8a7791-porter-u-boot.dtsi} | 1 -
> ...u-boot.dts => r8a7792-blanche-u-boot.dtsi} | 1 -
> ...se-u-boot.dts => r8a7793-gose-u-boot.dtsi} | 1 -
> ...alt-u-boot.dts => r8a7794-alt-u-boot.dtsi} | 1 -
> ...lk-u-boot.dts => r8a7794-silk-u-boot.dtsi} | 1 -
> ...ot.dts => r8a77950-salvator-x-u-boot.dtsi} | 1 -
> ...b-u-boot.dts => r8a77950-ulcb-u-boot.dtsi} | 1 -
> ...ot.dts => r8a77960-salvator-x-u-boot.dtsi} | 1 -
> ...b-u-boot.dts => r8a77960-ulcb-u-boot.dtsi} | 1 -
> ...ot.dts => r8a77965-salvator-x-u-boot.dtsi} | 1 -
> ...b-u-boot.dts => r8a77965-ulcb-u-boot.dtsi} | 1 -
> ...-u-boot.dts => r8a77970-eagle-u-boot.dtsi} | 1 -
> ...-u-boot.dts => r8a77970-v3msk-u-boot.dtsi} | 1 -
> ...u-boot.dts => r8a77980-condor-u-boot.dtsi} | 1 -
> ...-u-boot.dts => r8a77980-v3hsk-u-boot.dtsi} | 1 -
> ...-u-boot.dts => r8a77990-ebisu-u-boot.dtsi} | 1 -
> ...-u-boot.dts => r8a77995-draak-u-boot.dtsi} | 1 -
> ...u-boot.dts => r8a779a0-falcon-u-boot.dtsi} | 1 -
> ...u-boot.dts => r8a779f0-spider-u-boot.dtsi} | 1 -
> ...ot.dts => r8a779g0-white-hawk-u-boot.dtsi} | 1 -
> ...oot.dts => r8a779h0-gray-hawk-u-boot.dtsi} | 1 -
> board/renesas/salvator-x/salvator-x.c | 6 +-
> board/renesas/ulcb/ulcb.c | 6 +-
> configs/alt_defconfig | 2 +-
> configs/blanche_defconfig | 2 +-
> configs/gose_defconfig| 2 +-
> configs/grpeach_defconfig | 2 +-
> configs/hihope_rzg2_defconfig | 4 +-
> configs/koelsch_defconfig | 2 +-
> configs/lager_defconfig | 2 +-
> configs/porter_defconfig | 2 +-
> configs/r8a77970_eagle_defconfig | 2 +-
> configs/r8a77970_v3msk_defconfig | 2 +-
> configs/r8a77980_condor_defconfig | 2 +-
> configs/r8a77980_v3hsk_defconfig | 2 +-
> configs/r8a77990_ebisu_defconfig | 2 +-
> configs/r8a77995_draak_defconfig | 2 +-
> configs/r8a779a0_falcon_defconfig | 2 +-
> configs/r8a779f0_spider_defconfig | 2 +-
> configs/r8a779g0_whitehawk_defconfig | 2 +-
> configs/r8a779h0_grayhawk_defconfig | 2 +-
> configs/rcar3_salvator-x_defconfig| 4 +-
> configs/rcar3_ulcb_defconfig | 4 +-
> configs/silinux_ek874_defconfig | 2 +-
> configs/silk_defconfig| 2 +-
> configs/stout_defconfig | 2 +-
> 55 files changed, 61 insertions(+), 90 deletions(-)
> rename arch/arm/dts/{r7s72100-gr-peach-u-boot.dts =>
> r7s72100-gr-peach-u-boot.dtsi} (97%)
> rename arch/arm/dts/{r8a774a1-hihope-rzg2m-u-boot.dts =>
> r8a774a1-hihope-rzg2m-u-boot.dtsi} (91%)
> rename arch/arm/dts/{r8a774b1-hihope-rzg2n-u-boot.dts =>
> r8a774b1-hihope-rzg2n-u-boot.dtsi} (91%)
> rename arch/arm/dts/{r8a774c0-ek874-u-boot.dts =>
> r8a774c0-ek874-u-bo
[PATCH] arm: dts: imx8mp-beacon-kit: Resync DTS with Linux 6.8
The device tree has evolved over time, so re-sync. This also
partial reverts one change on the PCIe, because U-Boot doesn't
have a proper driver. However, since the clock is configured
to generate a 100MHz reference clock by default, a proper driver
isn't really necessary.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
index 393fd8ec2e..ed183f83a7 100644
--- a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
@@ -6,6 +6,13 @@
#include "imx8mp-u-boot.dtsi"
/ {
+ /* U-Boot does not yet have a proper PCIe clk driver */
+ pcie0_refclk: clock-pcie {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1>;
+ };
+
wdt-reboot {
compatible = "wdt-reboot";
wdt = <>;
@@ -13,6 +20,10 @@
};
};
+_phy {
+ clocks = <_refclk>;
+};
+
&{/soc@0/bus@3080/i2c@30a2/pmic@25} {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/imx8mp-beacon-kit.dts
b/arch/arm/dts/imx8mp-beacon-kit.dts
index cdae45a48c..a08057410b 100644
--- a/arch/arm/dts/imx8mp-beacon-kit.dts
+++ b/arch/arm/dts/imx8mp-beacon-kit.dts
@@ -23,6 +23,12 @@
stdout-path =
};
+ clk_xtal25: clock-xtal25 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2500>;
+ };
+
connector {
compatible = "usb-c-connector";
label = "USB-C";
@@ -49,6 +55,12 @@
};
};
+ dmic_codec: dmic-codec {
+ compatible = "dmic-codec";
+ num-channels = <1>;
+ #sound-dai-cells = <0>;
+ };
+
gpio-keys {
compatible = "gpio-keys";
autorepeat;
@@ -82,6 +94,17 @@
};
};
+ bridge-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con: endpoint {
+ remote-endpoint = <_out>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -112,10 +135,13 @@
};
};
- pcie0_refclk: clock-pcie {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1>;
+ reg_audio: regulator-wm8962 {
+ compatible = "regulator-fixed";
+ regulator-name = "3v3_aud";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ gpio = <_1 11 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
};
reg_usdhc2_vmmc: regulator-usdhc2 {
@@ -137,6 +163,68 @@
gpio = <_1 0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
+
+ sound-adv7535 {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "sound-adv7535";
+ simple-audio-card,format = "i2s";
+
+ simple-audio-card,cpu {
+ sound-dai = <>;
+ system-clock-direction-out;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <_bridge>;
+ };
+ };
+
+ sound-dmic {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "sound-pdm";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <_master>;
+ simple-audio-card,frame-master = <_master>;
+
+ dailink_master: simple-audio-card,cpu {
+ sound-dai = <>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <_codec>;
+ };
+ };
+
+ sound-wm8962 {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "wm8962";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,widgets = "Headphone", "Headphones",
+ "Microphone", "Headset Mic",
+ "Speaker", "Speaker";
+ simple-audio-card,routing = "Headphones", "HPOUTL",
+
[PATCH] configs: imx8mp_beacon: Fall back to using TF-A
When the board was originally added, it enabled some features which
allowed it to bypass Trusted Firmware, but as the feature set of
Linux grew and more features became available, the U-Boot config
options which bypassed TF-A caused issues, so it needs to return
to the standard operating mode of using TF-A or the system no
longer boots.
Fixes: ab53bd43dbde ("arm64: imx: Add support for imx8mp-beacon-kit")
Signed-off-by: Adam Ford
diff --git a/configs/imx8mp_beacon_defconfig b/configs/imx8mp_beacon_defconfig
index 29162ac9a4..9d09dd4a7c 100644
--- a/configs/imx8mp_beacon_defconfig
+++ b/configs/imx8mp_beacon_defconfig
@@ -14,7 +14,6 @@ CONFIG_ENV_OFFSET=0xDE00
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x92
-CONFIG_SYS_HAS_ARMV8_SECURE_BASE=y
CONFIG_TARGET_IMX8MP_BEACON=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
@@ -23,13 +22,8 @@ CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x96
CONFIG_SPL=y
CONFIG_ARMV8_SPL_EXCEPTION_VECTORS=y
-CONFIG_ARMV8_MULTIENTRY=y
CONFIG_ARMV8_SET_SMPEN=y
# CONFIG_PSCI_RESET is not set
-CONFIG_ARMV8_PSCI=y
-CONFIG_ARMV8_PSCI_CPUS_PER_CLUSTER=4
-CONFIG_ARMV8_PSCI_RELOCATE=y
-CONFIG_ARMV8_SECURE_BASE=0x97
CONFIG_ARMV8_EA_EL3_FIRST=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x4800
CONFIG_SYS_LOAD_ADDR=0x4048
@@ -85,7 +79,6 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=2
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eth1"
CONFIG_SPL_DM=y
--
2.43.0
Re: [PATCH v2 5/8] phy: phy-imx8m-pcie: Add support for i.MX8M{M/P} PCIe PHY
On Thu, Mar 7, 2024 at 12:35 AM Sumit Garg wrote:
>
> On Wed, 6 Mar 2024 at 22:56, Tim Harvey wrote:
> >
> > On Tue, Mar 5, 2024 at 4:47 PM Adam Ford wrote:
> > >
> > > On Tue, Mar 5, 2024 at 7:51 AM Adam Ford wrote:
> > > >
> > > > On Tue, Mar 5, 2024 at 7:48 AM Sumit Garg wrote:
> > > > >
> > > > > Hi Adam,
> > > > >
> > > > > On Wed, 28 Feb 2024 at 12:29, Sumit Garg
> > > > > wrote:
> > > > > >
> > > > > > Hi Adam,
> > > > > >
> > > > > > On Wed, 28 Feb 2024 at 04:42, Adam Ford wrote:
> > > > > > >
> > > > > > > On Mon, Feb 26, 2024 at 2:05 AM Sumit Garg
> > > > > > > wrote:
> > > > > > > >
> > > > > > > > Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P}
> > > > > > > > SoCs PCIe
> > > > > > > > PHY initialization moved to this standalone PHY driver.
> > > > > > > >
> > > > > > > > Inspired from counterpart Linux kernel v6.8-rc3 driver:
> > > > > > > > drivers/phy/freescale/phy-fsl-imx8m-pcie.c.
> > > > > > >
> > > > > > > I have a PCIe device that works just fine in Linux. I have
> > > > > > > applied
> > > > > > > your series an enabled the same config options as you did along
> > > > > > > with
> > > > > > > some others to resolve some build issues.
> > > > > > >
> > > > > > > Any ideas how to address:
> > > > > > >
> > > > > > > nxp_imx8_pcie_phy pcie-phy@32f0: PHY: Failed to power on
> > > > > > > pcie-phy@32f0: -110.
> > > > > > >
> > > > > > > My PHY node looks like this
> > > > > > >
> > > > > > > _phy {
> > > > > > > fsl,refclk-pad-mode = ;
> > > > > > > clocks = <_refclk>;
> > > > > > > clock-names = "ref";
> > > > > > > status = "okay";
> > > > > > > };
> > > > > > >
> > > > > > > The pcie_refcllk is defined as a 100MHz fixed clock in U-Boot.
> > > > > > > clk
> > > > > > > dump shows it to be:
> > > > > > >
> > > > > > > 10|-- clock-pcie
> > > > > > >
> > > > > >
> > > > > > I suppose that's an EVK board, try enabling MPCIE_3V3 regulator
> > > > > > required for EVK board via following patch:
> > > > > >
> > > > > > diff --git a/drivers/pci/pcie_dw_imx.c b/drivers/pci/pcie_dw_imx.c
> > > > > > index 7856823c9188..32fd2cb05d4b 100644
> > > > > > --- a/drivers/pci/pcie_dw_imx.c
> > > > > > +++ b/drivers/pci/pcie_dw_imx.c
> > > > > > @@ -17,6 +17,7 @@
> > > > > > #include
> > > > > > #include
> > > > > > #include
> > > > > > +#include
> > > > > > #include
> > > > > > #include
> > > > > > #include
> > > > > > @@ -158,6 +159,8 @@ static int pcie_dw_imx_probe(struct udevice
> > > > > > *dev)
> > > > > > struct pci_controller *hose = dev_get_uclass_priv(ctlr);
> > > > > > int ret;
> > > > > >
> > > > > > + regulator_autoset_by_name("MPCIE_3V3", NULL);
> > >
> > > I think you should search the device tree for "vpcie-supply" and
> > > enable the corresponding regulator, because is more flexible than
> > > hard-coding regulator names. This is also more of a standard practice.
> > >
> > > > > > +
> > > > > > ret = imx_pcie_assert_core_reset(priv);
> > > > > > if (ret) {
> > > > > > dev_err(dev, "failed to assert core reset\n");
> > > > > >
> > > > >
> > > > > Were you able to give a retry with the above diff?
> > > >
> > > > Not yet, but I'll try to do it tonight.
> > >
> > > That didn't work for me. I am usin
Re: [PATCH v2 5/8] phy: phy-imx8m-pcie: Add support for i.MX8M{M/P} PCIe PHY
On Tue, Mar 5, 2024 at 7:51 AM Adam Ford wrote:
>
> On Tue, Mar 5, 2024 at 7:48 AM Sumit Garg wrote:
> >
> > Hi Adam,
> >
> > On Wed, 28 Feb 2024 at 12:29, Sumit Garg wrote:
> > >
> > > Hi Adam,
> > >
> > > On Wed, 28 Feb 2024 at 04:42, Adam Ford wrote:
> > > >
> > > > On Mon, Feb 26, 2024 at 2:05 AM Sumit Garg
> > > > wrote:
> > > > >
> > > > > Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
> > > > > PHY initialization moved to this standalone PHY driver.
> > > > >
> > > > > Inspired from counterpart Linux kernel v6.8-rc3 driver:
> > > > > drivers/phy/freescale/phy-fsl-imx8m-pcie.c.
> > > >
> > > > I have a PCIe device that works just fine in Linux. I have applied
> > > > your series an enabled the same config options as you did along with
> > > > some others to resolve some build issues.
> > > >
> > > > Any ideas how to address:
> > > >
> > > > nxp_imx8_pcie_phy pcie-phy@32f0: PHY: Failed to power on
> > > > pcie-phy@32f0: -110.
> > > >
> > > > My PHY node looks like this
> > > >
> > > > _phy {
> > > > fsl,refclk-pad-mode = ;
> > > > clocks = <_refclk>;
> > > > clock-names = "ref";
> > > > status = "okay";
> > > > };
> > > >
> > > > The pcie_refcllk is defined as a 100MHz fixed clock in U-Boot. clk
> > > > dump shows it to be:
> > > >
> > > > 10|-- clock-pcie
> > > >
> > >
> > > I suppose that's an EVK board, try enabling MPCIE_3V3 regulator
> > > required for EVK board via following patch:
> > >
> > > diff --git a/drivers/pci/pcie_dw_imx.c b/drivers/pci/pcie_dw_imx.c
> > > index 7856823c9188..32fd2cb05d4b 100644
> > > --- a/drivers/pci/pcie_dw_imx.c
> > > +++ b/drivers/pci/pcie_dw_imx.c
> > > @@ -17,6 +17,7 @@
> > > #include
> > > #include
> > > #include
> > > +#include
> > > #include
> > > #include
> > > #include
> > > @@ -158,6 +159,8 @@ static int pcie_dw_imx_probe(struct udevice *dev)
> > > struct pci_controller *hose = dev_get_uclass_priv(ctlr);
> > > int ret;
> > >
> > > + regulator_autoset_by_name("MPCIE_3V3", NULL);
I think you should search the device tree for "vpcie-supply" and
enable the corresponding regulator, because is more flexible than
hard-coding regulator names. This is also more of a standard practice.
> > > +
> > > ret = imx_pcie_assert_core_reset(priv);
> > > if (ret) {
> > > dev_err(dev, "failed to assert core reset\n");
> > >
> >
> > Were you able to give a retry with the above diff?
>
> Not yet, but I'll try to do it tonight.
That didn't work for me. I am using a Beacon Embedded kit which does
not use a regulator, so this had no impact, but I think having the
vpcie-supply regulator is a good idea.
I'll investigate a bit more and let you know if I make any progress.
adam
>
> adam
> >
> > -Sumit
Re: [PATCH v2 5/8] phy: phy-imx8m-pcie: Add support for i.MX8M{M/P} PCIe PHY
On Tue, Mar 5, 2024 at 7:48 AM Sumit Garg wrote:
>
> Hi Adam,
>
> On Wed, 28 Feb 2024 at 12:29, Sumit Garg wrote:
> >
> > Hi Adam,
> >
> > On Wed, 28 Feb 2024 at 04:42, Adam Ford wrote:
> > >
> > > On Mon, Feb 26, 2024 at 2:05 AM Sumit Garg wrote:
> > > >
> > > > Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
> > > > PHY initialization moved to this standalone PHY driver.
> > > >
> > > > Inspired from counterpart Linux kernel v6.8-rc3 driver:
> > > > drivers/phy/freescale/phy-fsl-imx8m-pcie.c.
> > >
> > > I have a PCIe device that works just fine in Linux. I have applied
> > > your series an enabled the same config options as you did along with
> > > some others to resolve some build issues.
> > >
> > > Any ideas how to address:
> > >
> > > nxp_imx8_pcie_phy pcie-phy@32f0: PHY: Failed to power on
> > > pcie-phy@32f0: -110.
> > >
> > > My PHY node looks like this
> > >
> > > _phy {
> > > fsl,refclk-pad-mode = ;
> > > clocks = <_refclk>;
> > > clock-names = "ref";
> > > status = "okay";
> > > };
> > >
> > > The pcie_refcllk is defined as a 100MHz fixed clock in U-Boot. clk
> > > dump shows it to be:
> > >
> > > 10|-- clock-pcie
> > >
> >
> > I suppose that's an EVK board, try enabling MPCIE_3V3 regulator
> > required for EVK board via following patch:
> >
> > diff --git a/drivers/pci/pcie_dw_imx.c b/drivers/pci/pcie_dw_imx.c
> > index 7856823c9188..32fd2cb05d4b 100644
> > --- a/drivers/pci/pcie_dw_imx.c
> > +++ b/drivers/pci/pcie_dw_imx.c
> > @@ -17,6 +17,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> > #include
> > @@ -158,6 +159,8 @@ static int pcie_dw_imx_probe(struct udevice *dev)
> > struct pci_controller *hose = dev_get_uclass_priv(ctlr);
> > int ret;
> >
> > + regulator_autoset_by_name("MPCIE_3V3", NULL);
> > +
> > ret = imx_pcie_assert_core_reset(priv);
> > if (ret) {
> > dev_err(dev, "failed to assert core reset\n");
> >
>
> Were you able to give a retry with the above diff?
Not yet, but I'll try to do it tonight.
adam
>
> -Sumit
Re: [PATCH v2 6/8] pci: Add DW PCIe controller support for iMX8MP SoC
On Mon, Feb 26, 2024 at 2:05 AM Sumit Garg wrote:
>
> pcie_imx doesn't seem to share any useful code for iMX8 SoC and it is
> tied to quite old port of pcie_designware driver from Linux which
> suffices only iMX6 specific needs.
>
> But currently we have the common DWC specific bits which alligns pretty
> well with DW PCIe controller on iMX8MP SoC. So lets reuse those common
> bits instead as a new driver for iMX8 SoCs. It should be fairly easy to
> add support for other iMX8 variants to this driver.
>
> iMX8MP SoC also comes up with standalone PCIe PHY support, so hence we
> can reuse the generic PHY infrastructure to power on PCIe PHY.
>
> Signed-off-by: Sumit Garg
> ---
> drivers/pci/Kconfig | 8 +
> drivers/pci/Makefile | 1 +
> drivers/pci/pcie_dw_imx.c | 314 ++
> 3 files changed, 323 insertions(+)
> create mode 100644 drivers/pci/pcie_dw_imx.c
>
> diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
> index 463ec47eb92d..7edbf35004a9 100644
> --- a/drivers/pci/Kconfig
> +++ b/drivers/pci/Kconfig
> @@ -413,4 +413,12 @@ config PCIE_STARFIVE_JH7110
> Say Y here if you want to enable PLDA XpressRich PCIe controller
> support on StarFive JH7110 SoC.
>
> +config PCIE_DW_IMX
> + bool "i.MX DW PCIe controller support"
> + depends on ARCH_IMX8M
I think this also needs to depend on REGMAP to prevent build errors.
adam
> + select PCIE_DW_COMMON
> + help
> + Say Y here if you want to enable DW PCIe controller support on
> + iMX SoCs.
> +
> endif
> diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
> index 72ef8b4bc772..2927c519129b 100644
> --- a/drivers/pci/Makefile
> +++ b/drivers/pci/Makefile
> @@ -53,3 +53,4 @@ obj-$(CONFIG_PCIE_UNIPHIER) += pcie_uniphier.o
> obj-$(CONFIG_PCIE_XILINX_NWL) += pcie-xilinx-nwl.o
> obj-$(CONFIG_PCIE_PLDA_COMMON) += pcie_plda_common.o
> obj-$(CONFIG_PCIE_STARFIVE_JH7110) += pcie_starfive_jh7110.o
> +obj-$(CONFIG_PCIE_DW_IMX) += pcie_dw_imx.o
> diff --git a/drivers/pci/pcie_dw_imx.c b/drivers/pci/pcie_dw_imx.c
> new file mode 100644
> index ..7856823c9188
> --- /dev/null
> +++ b/drivers/pci/pcie_dw_imx.c
> @@ -0,0 +1,314 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2024 Linaro Ltd.
> + *
> + * Author: Sumit Garg
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "pcie_dw_common.h"
> +
> +#define PCIE_LINK_CAPABILITY 0x7c
> +#define TARGET_LINK_SPEED_MASK 0xf
> +#define LINK_SPEED_GEN_1 0x1
> +#define LINK_SPEED_GEN_2 0x2
> +#define LINK_SPEED_GEN_3 0x3
> +
> +#define PCIE_MISC_CONTROL_1_OFF0x8bc
> +#define PCIE_DBI_RO_WR_EN BIT(0)
> +
> +#define PCIE_PORT_DEBUG0 0x728
> +#define PCIE_PORT_DEBUG1 0x72c
> +#define PCIE_PORT_DEBUG1_LINK_UP BIT(4)
> +#define PCIE_PORT_DEBUG1_LINK_IN_TRAINING BIT(29)
> +
> +#define PCIE_LINK_UP_TIMEOUT_MS100
> +
> +#define IOMUXC_GPR14_OFFSET0x38
> +#define IMX8M_GPR_PCIE_CLK_REQ_OVERRIDE_EN BIT(10)
> +#define IMX8M_GPR_PCIE_CLK_REQ_OVERRIDEBIT(11)
> +
> +struct pcie_dw_imx {
> + /* Must be first member of the struct */
> + struct pcie_dw dw;
> + struct regmap *iomuxc_gpr;
> + struct clk_bulk clks;
> + struct gpio_descreset_gpio;
> + struct reset_ctlapps_reset;
> + struct phy phy;
> +};
> +
> +static void pcie_dw_configure(struct pcie_dw_imx *priv, u32 cap_speed)
> +{
> + dw_pcie_dbi_write_enable(>dw, true);
> +
> + clrsetbits_le32(priv->dw.dbi_base + PCIE_LINK_CAPABILITY,
> + TARGET_LINK_SPEED_MASK, cap_speed);
> +
> + dw_pcie_dbi_write_enable(>dw, false);
> +}
> +
> +static void imx_pcie_ltssm_enable(struct pcie_dw_imx *priv)
> +{
> + reset_deassert(>apps_reset);
> +}
> +
> +static void imx_pcie_ltssm_disable(struct pcie_dw_imx *priv)
> +{
> + reset_assert(>apps_reset);
> +}
> +
> +static bool is_link_up(u32 val)
> +{
> + return ((val & PCIE_PORT_DEBUG1_LINK_UP) &&
> + (!(val & PCIE_PORT_DEBUG1_LINK_IN_TRAINING)));
> +}
> +
> +static int wait_link_up(struct pcie_dw_imx *priv)
> +{
> + u32 val;
> +
> + return readl_poll_sleep_timeout(priv->dw.dbi_base + PCIE_PORT_DEBUG1,
> + val, is_link_up(val), 1, 10);
> +}
> +
> +static int pcie_link_up(struct pcie_dw_imx *priv, u32 cap_speed)
> +{
> + int ret;
> +
> + /* DW pre link configurations */
> + pcie_dw_configure(priv, cap_speed);
> +
> + /* Initiate link
Re: [PATCH v2 5/8] phy: phy-imx8m-pcie: Add support for i.MX8M{M/P} PCIe PHY
On Mon, Feb 26, 2024 at 2:05 AM Sumit Garg wrote:
>
> Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
> PHY initialization moved to this standalone PHY driver.
>
> Inspired from counterpart Linux kernel v6.8-rc3 driver:
> drivers/phy/freescale/phy-fsl-imx8m-pcie.c.
I have a PCIe device that works just fine in Linux. I have applied
your series an enabled the same config options as you did along with
some others to resolve some build issues.
Any ideas how to address:
nxp_imx8_pcie_phy pcie-phy@32f0: PHY: Failed to power on
pcie-phy@32f0: -110.
My PHY node looks like this
_phy {
fsl,refclk-pad-mode = ;
clocks = <_refclk>;
clock-names = "ref";
status = "okay";
};
The pcie_refcllk is defined as a 100MHz fixed clock in U-Boot. clk
dump shows it to be:
10|-- clock-pcie
>
> Signed-off-by: Sumit Garg
> ---
> drivers/phy/Kconfig | 9 ++
> drivers/phy/Makefile | 1 +
> drivers/phy/phy-imx8m-pcie.c | 269 +++
> 3 files changed, 279 insertions(+)
> create mode 100644 drivers/phy/phy-imx8m-pcie.c
>
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 60138beca498..110ec8f5008d 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -284,6 +284,15 @@ config PHY_IMX8MQ_USB
> help
> Support the USB3.0 PHY in NXP i.MX8MQ or i.MX8MP SoC
>
> +config PHY_IMX8M_PCIE
> + bool "NXP i.MX8MM/i.MX8MP PCIe PHY Driver"
> + depends on PHY
> + depends on IMX8MM || IMX8MP
This should also depend on SYSCON and REGMAP to prevent build errors.
> + help
> + Support the PCIe PHY in NXP i.MX8MM or i.MX8MP SoC
> +
> + This PHY is found on i.MX8M devices supporting PCIe.
> +
> config PHY_XILINX_ZYNQMP
> tristate "Xilinx ZynqMP PHY driver"
> depends on PHY && ARCH_ZYNQMP
> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
> index 2e8723186c05..7a2b764492be 100644
> --- a/drivers/phy/Makefile
> +++ b/drivers/phy/Makefile
> @@ -38,6 +38,7 @@ obj-$(CONFIG_PHY_DA8XX_USB) += phy-da8xx-usb.o
> obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
> obj-$(CONFIG_PHY_NPCM_USB) += phy-npcm-usb.o
> obj-$(CONFIG_PHY_IMX8MQ_USB) += phy-imx8mq-usb.o
> +obj-$(CONFIG_PHY_IMX8M_PCIE) += phy-imx8m-pcie.o
> obj-$(CONFIG_PHY_XILINX_ZYNQMP) += phy-zynqmp.o
> obj-y += cadence/
> obj-y += ti/
> diff --git a/drivers/phy/phy-imx8m-pcie.c b/drivers/phy/phy-imx8m-pcie.c
> new file mode 100644
> index ..e09a7ac97235
> --- /dev/null
> +++ b/drivers/phy/phy-imx8m-pcie.c
> @@ -0,0 +1,269 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2024 Linaro Ltd.
> + *
> + * Derived from Linux counterpart driver
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +
> +#define IMX8MM_PCIE_PHY_CMN_REG061 0x184
> +#define ANA_PLL_CLK_OUT_TO_EXT_IO_EN BIT(0)
> +#define IMX8MM_PCIE_PHY_CMN_REG062 0x188
> +#define ANA_PLL_CLK_OUT_TO_EXT_IO_SEL BIT(3)
> +#define IMX8MM_PCIE_PHY_CMN_REG063 0x18C
> +#define AUX_PLL_REFCLK_SEL_SYS_PLLGENMASK(7, 6)
> +#define IMX8MM_PCIE_PHY_CMN_REG064 0x190
> +#define ANA_AUX_RX_TX_SEL_TX BIT(7)
> +#define ANA_AUX_RX_TERM_GND_ENBIT(3)
> +#define ANA_AUX_TX_TERM BIT(2)
> +#define IMX8MM_PCIE_PHY_CMN_REG065 0x194
> +#define ANA_AUX_RX_TERM (BIT(7) | BIT(4))
> +#define ANA_AUX_TX_LVLGENMASK(3, 0)
> +#define IMX8MM_PCIE_PHY_CMN_REG075 0x1D4
> +#define ANA_PLL_DONE 0x3
> +#define PCIE_PHY_TRSV_REG5 0x414
> +#define PCIE_PHY_TRSV_REG6 0x418
> +
> +#define IMX8MM_GPR_PCIE_REF_CLK_SELGENMASK(25, 24)
> +#define IMX8MM_GPR_PCIE_REF_CLK_PLL
> FIELD_PREP(IMX8MM_GPR_PCIE_REF_CLK_SEL, 0x3)
> +#define IMX8MM_GPR_PCIE_REF_CLK_EXT
> FIELD_PREP(IMX8MM_GPR_PCIE_REF_CLK_SEL, 0x2)
> +#define IMX8MM_GPR_PCIE_AUX_EN BIT(19)
> +#define IMX8MM_GPR_PCIE_CMN_RSTBIT(18)
> +#define IMX8MM_GPR_PCIE_POWER_OFF BIT(17)
> +#define IMX8MM_GPR_PCIE_SSC_EN BIT(16)
> +#define IMX8MM_GPR_PCIE_AUX_EN_OVERRIDEBIT(9)
> +
> +#define IOMUXC_GPR14_OFFSET0x38
> +
> +enum imx8_pcie_phy_type {
> + IMX8MM,
> + IMX8MP,
> +};
> +
> +struct imx8_pcie_phy_drvdata {
> + const char*gpr;
> + enumimx8_pcie_phy_type variant;
> +};
> +
> +struct imx8_pcie_phy {
> + ulong base;
> + struct clk hsio_clk;
> + struct regmap *iomuxc_gpr;
> + struct reset_ctlperst;
> + struct reset_ctlreset;
> + u32 refclk_pad_mode;
> + u32 tx_deemph_gen1;
> + u32 tx_deemph_gen2;
> + bool
Re: [PATCH 7/7] verdin-imx8mp_defconfig: Enable PCIe/NVMe support
On Wed, Feb 21, 2024 at 6:27 AM Marek Vasut wrote: > > On 2/21/24 13:12, Sumit Garg wrote: > > On Wed, 21 Feb 2024 at 16:11, Marek Vasut wrote: > >> > >> On 2/21/24 10:18, Marcel Ziswiler wrote: > >>> Hi Sumit > >>> > >>> On Wed, 2024-02-21 at 08:55 +0100, Francesco Dolcini wrote: > Hello Sumit, > > On Tue, Feb 20, 2024 at 06:40:56PM +0530, Sumit Garg wrote: > > Also, enable reset driver which is a prerequisite for PCIe support. > > > > Signed-off-by: Sumit Garg > > --- > >configs/verdin-imx8mp_defconfig | 9 + > >1 file changed, 9 insertions(+) > > > > diff --git a/configs/verdin-imx8mp_defconfig > > b/configs/verdin-imx8mp_defconfig > > index 22b8a334dfa..d8bd644322b 100644 > > --- a/configs/verdin-imx8mp_defconfig > > +++ b/configs/verdin-imx8mp_defconfig > > @@ -185,3 +185,12 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 > >CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 > >CONFIG_IMX_WATCHDOG=y > >CONFIG_HEXDUMP=y > > +CONFIG_DM_RESET=y > > +CONFIG_RESET_IMX=y > > +CONFIG_PCI=y > > +CONFIG_PCIE_DW_IMX8=y > > +CONFIG_PHY_IMX8M_PCIE=y > > +CONFIG_CMD_PCI=y > > +CONFIG_NVME=y > > +CONFIG_NVME_PCI=y > > +CONFIG_CMD_NVME=y > > This will increase the u-boot proper size > >>> > >>> Yes, I checked and it is actually slightly more than 32 K. > >>> > and marginally increase the > boot time (because of a bigger binary to be read from the eMMC). > >>> > >>> That was also my concern. > >>> > Apart of that do you expect any other impact on those changes? SPL > binary size should not be affected, correct? > > Asking this out loudly to confirm that nothing unexpected is going to > happen because of these changes. > >>> > >>> Other than that I actually gave it a quick try and PCIe/NVMe does indeed > >>> work and the regular boot is not > >>> affected (other than the slight size and boot time increase, of course). > >>> > For my curiosity, care to share what's the use case? Do you plan to have > the OS stored into an NVME device? > >>> > >>> For us the question is basically whether that use case does mandate > >>> enforcing such changes for each and every > >>> customer. Plus the regular expected maintenance effort any such change > >>> brings with it, of course. > >> > >> You can always enable this support on MX8MP EVK, it has M2 slot and this > >> would add build coverage of this code too, without impacting Verdin. > > > > I would have chosen that as the base platform to enable but > > unfortunately I don't have that at my desk. However, if someone is > > willing to test this patch-set on MX8MP EVK then I am happy to extend > > corresponding defconfig too. > > I think we can surely find a platform on which this can be enabled by > default and tested by people. My development machine crashed (my fault for running a pre-release OS),but I have an i.MX8M Plus and an NVMe drive that I can test once I get my machine running again. adam
Re: [PATCH] arm: imx: imx8m: Enable the SError exception
On Fri, Jan 12, 2024 at 1:07 AM Ye Li wrote: > > To work with commit 2f3c920(imx8m: workaround ROM serror), > we need to enable the SError exception and install vector in SPL. > > Signed-off-by: Ye Li > Reviewed-by: Peng Fan > --- > arch/arm/mach-imx/imx8m/Kconfig | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig > index 67da198..88ef732 100644 > --- a/arch/arm/mach-imx/imx8m/Kconfig > +++ b/arch/arm/mach-imx/imx8m/Kconfig > @@ -11,14 +11,17 @@ config IMX8MQ > bool > select IMX8M > select CLK_IMX8MQ > + select ARMV8_SPL_EXCEPTION_VECTORS > > config IMX8MM > bool > select IMX8M > + select ARMV8_SPL_EXCEPTION_VECTORS > > config IMX8MN > bool > select IMX8M > + select ARMV8_SPL_EXCEPTION_VECTORS > > config IMX8MP > bool > -- > 2.7.4 > Would this not also work for 8MP? If that's the case, should the section of ARMV8_SPL_EXCEPTION_VECTORS fall under "config IMX8M" for simplicity? adam
Re: [PATCH v1] tools: mkimage: Add support for i.MXRT FlexSPI Header
On Fri, Jan 26, 2024 at 1:11 PM Fabio Estevam wrote: > > Hi Adam, > > On Thu, Jan 25, 2024 at 7:37 PM Adam Ford wrote: > > > I had to go back in time, because it appears the current version of > > 'master' doesn't fully boot the FSPI, but when I applied this patch > > against a working version, it still worked when I was done. I'll try > > to git bisect the issue when I have time, but for now: > > > > Tested-by: Adam Ford #imx8mn-beacon > > Thanks for testing, appreciate it. I will queue this one. > No problem. Sorry it took so long. > Hopefully, we can figure out the cause of the regression. I must have done something wrong when I tested this before, because it's working fine for me now even when applied against the main trunk, so I think all is good. adam
Re: [PATCH v1] tools: mkimage: Add support for i.MXRT FlexSPI Header
On Tue, Jan 23, 2024 at 8:15 PM Jesse Taube wrote:
>
> Modify imx8m Flex SPI Configuration Block to work with imxrt.
> Add more Flex SPI configuration options to Kconfig.
>
> Signed-off-by: Jesse Taube
I had to go back in time, because it appears the current version of
'master' doesn't fully boot the FSPI, but when I applied this patch
against a working version, it still worked when I was done. I'll try
to git bisect the issue when I have time, but for now:
Tested-by: Adam Ford #imx8mn-beacon
adam
> ---
> include/imximage.h | 42 +
> tools/Kconfig | 21 +
> tools/imx8mimage.c | 41
> tools/imximage.c | 77 ++
> 4 files changed, 143 insertions(+), 38 deletions(-)
>
> diff --git a/include/imximage.h b/include/imximage.h
> index c1ecc0b7cb..a951699d0a 100644
> --- a/include/imximage.h
> +++ b/include/imximage.h
> @@ -210,33 +210,37 @@ typedef struct {
> uint8_t datasetup;
> uint8_t coladdrwidth;
> uint8_t devcfgenable;
> - uint8_t reserved_2[3];
> + uint8_t deviceModeType;
> + uint16_t waitTimeCfgCommands;
> uint8_t devmodeseq[4];
> - uint8_t devmodearg[4];
> + uint32_t devmodearg;
> uint8_t cmd_enable;
> - uint8_t reserved_3[3];
> + uint8_t configModeType[3];
> uint8_t cmd_seq[16] ;
> uint8_t cmd_arg[16];
> - uint8_t controllermisc[4];
> + uint32_t controllermisc;
> uint8_t dev_type;
> uint8_t sflash_pad;
> uint8_t serial_clk;
> - uint8_t lut_custom ;
> - uint8_t reserved_4[8];
> - uint8_t sflashA1[4];
> - uint8_t sflashA2[4];
> - uint8_t sflashB1[4];
> - uint8_t sflashB2[4];
> - uint8_t cspadover[4];
> - uint8_t sclkpadover[4];
> - uint8_t datapadover[4];
> - uint8_t dqspadover[4];
> - uint8_t timeout[4];
> - uint8_t commandInt[4];
> - uint8_t datavalid[4];
> - uint8_t busyoffset[2];
> - uint8_t busybitpolarity[2];
> + uint8_t lut_custom;
> + uint8_t reserved_2[8];
> + uint32_t sflashA1;
> + uint32_t sflashA2;
> + uint32_t sflashB1;
> + uint32_t sflashB2;
> + uint32_t cspadover;
> + uint32_t sclkpadover;
> + uint32_t datapadover;
> + uint32_t dqspadover;
> + uint32_t timeout;
> + uint32_t commandInt;
> + uint16_t datavalid[2];
> + uint16_t busyoffset;
> + uint16_t busybitpolarity;
> uint8_t lut[256];
> + uint8_t lutCustomSeq[48];
> + uint8_t reserved_3[16];
> +
> } __attribute__((packed)) fspi_conf;
>
> typedef void (*set_dcd_val_t)(struct imx_header *imxhdr,
> diff --git a/tools/Kconfig b/tools/Kconfig
> index f01ed783e6..667807b331 100644
> --- a/tools/Kconfig
> +++ b/tools/Kconfig
> @@ -148,6 +148,27 @@ config SERIAL_CLK_FREQUENCY
> Chip specific frequency: other value 30MHz
> 1-30MHz 2-50MHz 3-60MHz 4-75MHz 5-80MHz 6-100MHz 7-133MHz 8-166MHz
>
> +config FSPI_COL_ADDR_W
> + hex "Column Address With"
> + default 0x00
> + depends on FSPI_CONF_HEADER
> + help
> + Default 0. For HyperBus protocol, it is fixed to 3
> +
> +config FSPI_CONTROLLER_MISC
> + hex "FSPI miscellaneous control"
> + default 0x
> + depends on FSPI_CONF_HEADER
> + help
> + Default 0. [0x40] Controller Misc Options
> +
> +config FSPI_FLASH_A1_SIZE
> + hex "Size in bytes of Flash A1"
> + default 0x1000
> + depends on FSPI_CONF_HEADER
> + help
> + Size of Flash connected to A1 in bytes
> +
> config LUT_CUSTOM_SEQUENCE
> hex "Enable Custom Look Up Table(LUT) Sequence"
> default 0x00
> diff --git a/tools/imx8mimage.c b/tools/imx8mimage.c
> index 21075c2379..939f829a9f 100644
> --- a/tools/imx8mimage.c
> +++ b/tools/imx8mimage.c
> @@ -426,36 +426,39 @@ static int generate_fspi_header (int ifd)
> .read_sample = CONFIG_READ_CLK_SOURCE,
> .datahold = 0x03,
> .datasetup = 0x03,
> - .coladdrwidth = 0x00,
> + .coladdrwidth = CONFIG_FSPI_COL_ADDR_W,
> .devcfgenable = 0x00,
> - .reserved_2 = {0x00, 0x00, 0x00},
> + .deviceModeType = 0x00,
> + .waitTimeCfgCommands = 0x,
> .devmodeseq = {0x00, 0x00, 0x00, 0x00},
> - .devmodearg = {0x00, 0x00, 0x00, 0x00},
> + .devmodearg = 0x,
> .cmd_enable = 0x00,
> - .reserved_3 = {0x00},
> + .c
Re: [PATCH v1] tools: mkimage: Add support for i.MXRT FlexSPI Header
On Thu, Jan 25, 2024 at 2:10 PM Fabio Estevam wrote: > > Hi Adam, > > On Tue, Jan 23, 2024 at 11:15 PM Jesse Taube wrote: > > > > Modify imx8m Flex SPI Configuration Block to work with imxrt. > > Add more Flex SPI configuration options to Kconfig. > > > > Signed-off-by: Jesse Taube > > Could you please test it on imx8mn_beacon_fspi_defconfig ? Yes. I was planning on doing it this weekend. I'll try to get it done sooner and report back the results. adam
Re: [PATCH 2/2] ARM: dts: imx8mm-venice: prepare for dek blob encapsulation
On Fri, Dec 15, 2023 at 12:41 PM Fabio Estevam wrote: > > Hi Tim, > > On Fri, Dec 15, 2023 at 3:34 PM Tim Harvey wrote: > > > Fabio, > > > > The commit log details are not valid for upstream. I was basing this > > off of 8d060e4a66d6884341fbb3d8ab1d837a3f173d47 which made it upstream > > with the same message. > > > > I can submit a v2 if necessary. > > Yes, please submit a v2 and I will queue this series and the TPM one > to u-boot-imx next. This node appears to already be in the imx8mm-u-boot.dtsi encapsulated by an #ifdef looking for optee. Can this ifdef be expanded to include CONFIG_SECURE_BOOT? adam > Regards, > > Fabio Estevam
Re: [PATCH 1/5] configs: imx8mp_beacon: Do not set SYS_CONSOLE_IS_IN_ENV
On Thu, Oct 26, 2023 at 9:20 AM Fabio Estevam wrote: > > On Wed, Oct 25, 2023 at 8:05 PM Adam Ford wrote: > > > > The hardware only supports a specific console port, so remove the > > option to change the console location in the environment. > > > > Signed-off-by: Adam Ford > > For the series: > Fabio / Stefan, Is there any chance this series can be applied to imx-next? > Reviewed-by: Fabio Estevam
Re: [PATCH] arm64: imx: imx8mp-beacon: Add support for 4GB Variant
On Fri, Nov 17, 2023 at 8:41 AM Tom Rini wrote: > > On Thu, Nov 16, 2023 at 07:31:53PM -0600, Adam Ford wrote: > > > A new variant of the i.MX8MP System-on-module from Beacon is > > available which contains 4GB of RAM vs 6GB. The memory > > timings are slightly different, so a different config is necessary > > to build the different timing file. > > > > Signed-off-by: Adam Ford > > Might this be a case for using config fragments instead? I didn't realize U-Boot was supporting that. I'll submit a V2 with the defconfig option removed. Is there an example you can direct me to that does this already? thanks! adam > See doc/develop/board_best_practices.rst > > -- > Tom
[PATCH] arm64: imx: imx8mp-beacon: Add support for 4GB Variant
A new variant of the i.MX8MP System-on-module from Beacon is
available which contains 4GB of RAM vs 6GB. The memory
timings are slightly different, so a different config is necessary
to build the different timing file.
Signed-off-by: Adam Ford
diff --git a/board/beacon/imx8mp/Kconfig b/board/beacon/imx8mp/Kconfig
index 3c0fca9be8..3a673c749b 100644
--- a/board/beacon/imx8mp/Kconfig
+++ b/board/beacon/imx8mp/Kconfig
@@ -9,8 +9,13 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "imx8mp_beacon"
+config IMX8MP_BEACON_4GB_LPDDR
+ bool "Enable 4GB LPDDR"
+ help
+ Enable this if the SOM has 4GB of RAM instead of
+ the default 6GB variant.
+
config IMX_CONFIG
default "board/freescale/imx8mp_evk/imximage-8mp-lpddr4.cfg"
-
endif
diff --git a/board/beacon/imx8mp/MAINTAINERS b/board/beacon/imx8mp/MAINTAINERS
index 3750551a4a..78afa3f6ae 100644
--- a/board/beacon/imx8mp/MAINTAINERS
+++ b/board/beacon/imx8mp/MAINTAINERS
@@ -4,3 +4,4 @@ S: Maintained
F: board/beacon/imx8mp/
F: include/configs/imx8mp_beacon.h
F: configs/imx8mp_beacon_defconfig
+F: configs/imx8mp_beacon_4g_defconfig
diff --git a/board/beacon/imx8mp/Makefile b/board/beacon/imx8mp/Makefile
index 264720f6d4..e7e2d316a3 100644
--- a/board/beacon/imx8mp/Makefile
+++ b/board/beacon/imx8mp/Makefile
@@ -9,5 +9,10 @@ obj-y += ../../freescale/common/
ifdef CONFIG_SPL_BUILD
obj-y += spl.o
-obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
+
+ifdef CONFIG_IMX8MP_BEACON_4GB_LPDDR
+obj-y += lpddr4_4g_timing.o
+else
+obj-y += lpddr4_timing.o
+endif
endif
diff --git a/board/beacon/imx8mp/lpddr4_4g_timing.c
b/board/beacon/imx8mp/lpddr4_4g_timing.c
new file mode 100644
index 00..51cef2c32b
--- /dev/null
+++ b/board/beacon/imx8mp/lpddr4_4g_timing.c
@@ -0,0 +1,1842 @@
+// SPDX-License-Identifier: GPL-2.0+
+/* Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks */
+
+#include
+#include
+
+struct dram_cfg_param ddr_ddrc_cfg[] = {
+ /** Initialize DDRC registers **/
+ { 0x3d400304, 0x1 },
+ { 0x3d400030, 0x1 },
+ { 0x3d40, 0xa3080020 },
+ { 0x3d400020, 0x1323 },
+ { 0x3d400024, 0x1e84800 },
+ { 0x3d400064, 0x7a0118 },
+ { 0x3d400070, 0x7027f90 },
+ { 0x3d400074, 0x790 },
+ { 0x3d4000d0, 0xc00307a3 },
+ { 0x3d4000d4, 0xc5 },
+ { 0x3d4000dc, 0xf4003f },
+ { 0x3d4000e0, 0x33 },
+ { 0x3d4000e8, 0x660048 },
+ { 0x3d4000ec, 0x160048 },
+ { 0x3d400100, 0x2028222a },
+ { 0x3d400104, 0x8083f },
+ { 0x3d40010c, 0xe0e000 },
+ { 0x3d400110, 0x12040a12 },
+ { 0x3d400114, 0x2050f0f },
+ { 0x3d400118, 0x1010009 },
+ { 0x3d40011c, 0x502 },
+ { 0x3d400130, 0x20800 },
+ { 0x3d400134, 0xe12 },
+ { 0x3d400138, 0x120 },
+ { 0x3d400144, 0xc80064 },
+ { 0x3d400180, 0x3e8001e },
+ { 0x3d400184, 0x3207a12 },
+ { 0x3d400188, 0x0 },
+ { 0x3d400190, 0x49f820e },
+ { 0x3d400194, 0x80303 },
+ { 0x3d4001b4, 0x1f0e },
+ { 0x3d4001a0, 0xe0400018 },
+ { 0x3d4001a4, 0xdf00e4 },
+ { 0x3d4001a8, 0x8000 },
+ { 0x3d4001b0, 0x11 },
+ { 0x3d4001c0, 0x1 },
+ { 0x3d4001c4, 0x1 },
+ { 0x3d4000f4, 0x799 },
+ { 0x3d400108, 0x9121b1c },
+ { 0x3d400200, 0x17 },
+ { 0x3d400208, 0x0 },
+ { 0x3d40020c, 0x0 },
+ { 0x3d400210, 0x1f1f },
+ { 0x3d400204, 0x80808 },
+ { 0x3d400214, 0x7070707 },
+ { 0x3d400218, 0x7070707 },
+ { 0x3d40021c, 0xf0f },
+ { 0x3d400250, 0x1705 },
+ { 0x3d400254, 0x2c },
+ { 0x3d40025c, 0x430 },
+ { 0x3d400264, 0x900093e7 },
+ { 0x3d40026c, 0x2005574 },
+ { 0x3d400400, 0x111 },
+ { 0x3d400404, 0x72ff },
+ { 0x3d400408, 0x72ff },
+ { 0x3d400494, 0x2100e07 },
+ { 0x3d400498, 0x620096 },
+ { 0x3d40049c, 0x1100e07 },
+ { 0x3d4004a0, 0xc8012c },
+ { 0x3d402020, 0x1021 },
+ { 0x3d402024, 0x30d400 },
+ { 0x3d402050, 0x20d000 },
+ { 0x3d402064, 0xc001c },
+ { 0x3d4020dc, 0x84 },
+ { 0x3d4020e0, 0x33 },
+ { 0x3d4020e8, 0x660048 },
+ { 0x3d4020ec, 0x160048 },
+ { 0x3d402100, 0xa040305 },
+ { 0x3d402104, 0x30407 },
+ { 0x3d402108, 0x203060b },
+ { 0x3d40210c, 0x505000 },
+ { 0x3d402110, 0x2040202 },
+ { 0x3d402114, 0x2030202 },
+ { 0x3d402118, 0x1010004 },
+ { 0x3d40211c, 0x302 },
+ { 0x3d402130, 0x20300 },
+ { 0x3d402134, 0xa12 },
+ { 0x3d402138, 0x1d },
+ { 0x3d402144, 0x14000a },
+ { 0x3d402180, 0x640004 },
+ { 0x3d402190, 0x3818200 },
+ { 0x3d402194, 0x80303 },
+ { 0x3d4021b4, 0x100 },
+ { 0x3d4020f4, 0x599 },
+ { 0x3d403020, 0x1021 },
+ { 0x3d403024, 0xc3500 },
+ { 0x3d403050, 0x20d000 },
+ { 0x3d403064, 0x30007 },
Re: [PATCH 2/3] configs: rzg2_beacon: Realign ENV location and offset
On Wed, Oct 25, 2023 at 6:13 PM Adam Ford wrote: > > The ENV size and offset were changed to different > values in Beacon's downstream release. Change them to the > same values as the downstream for consistent behavior. > > Signed-off-by: Adam Ford Marek, I know you had some feedback on other patches in this series. I'll drop one, and refactor another, but is this one ok to merge as-is or should I re-post without the other patches? adam > > diff --git a/configs/rzg2_beacon_defconfig b/configs/rzg2_beacon_defconfig > index 7b14d225b5..534f641e84 100644 > --- a/configs/rzg2_beacon_defconfig > +++ b/configs/rzg2_beacon_defconfig > @@ -3,7 +3,8 @@ CONFIG_ARCH_RMOBILE=y > CONFIG_TEXT_BASE=0x5000 > CONFIG_SYS_MALLOC_LEN=0x400 > CONFIG_SYS_MALLOC_F_LEN=0x2000 > -CONFIG_ENV_OFFSET=0x0 > +CONFIG_ENV_SIZE=0x2000 > +CONFIG_ENV_OFFSET=0xE000 > CONFIG_DM_GPIO=y > CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-beacon-rzg2m-kit" > CONFIG_RCAR_GEN3=y > -- > 2.40.1 >
Re: [PATCH 3/3] arm: rmobile: rzg2_beacon: Auto select Linux device tree by SoC
On Thu, Oct 26, 2023 at 8:44 PM Marek Vasut wrote: > > On 10/26/23 01:13, Adam Ford wrote: > > There is a function inside the board file to autodetect which device > > tree is needed by U-Boot to properly load its own device tree, but > > it currently defaults to always loading RZ/G2M for Linux. This is > > not correct for other SoC variants. Add board_late_init function > > to query the SoC name and use that to determine which device tree > > is loaded for booting Linux. > > Can't this be scripted in environment instead ? Do you have a recommendation for how to read the SoC type from a script? adam
Re: [PATCH 1/3] configs: rzg2_beacon: Disable the ability to remove devices
On Thu, Oct 26, 2023 at 8:44 PM Marek Vasut wrote: > > On 10/26/23 01:13, Adam Ford wrote: > > In order to save some space, disable the ability to dynamically > > remove devices. Without this, U-Boot is too large to load without > > recompiling TF-A. > > Did you enable LTO yet ? Yes. > > Striping DM_REMOVE seems like a really bad idea, doesn't that break 'usb > reset' and its removal of devices ? I did not, but we can drop this one, and I'll just have to re-compile TF-A to load a larger U-Boot. adam
[PATCH 3/3] arm: rmobile: rzg2_beacon: Auto select Linux device tree by SoC
There is a function inside the board file to autodetect which device
tree is needed by U-Boot to properly load its own device tree, but
it currently defaults to always loading RZ/G2M for Linux. This is
not correct for other SoC variants. Add board_late_init function
to query the SoC name and use that to determine which device tree
is loaded for booting Linux.
Signed-off-by: Adam Ford
diff --git a/board/beacon/beacon-rzg2m/beacon-rzg2m.c
b/board/beacon/beacon-rzg2m/beacon-rzg2m.c
index 99fe1edfb3..6d37ff6ac9 100644
--- a/board/beacon/beacon-rzg2m/beacon-rzg2m.c
+++ b/board/beacon/beacon-rzg2m/beacon-rzg2m.c
@@ -6,6 +6,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -17,6 +18,38 @@ int board_init(void)
return 0;
}
+#if IS_ENABLED(CONFIG_BOARD_LATE_INIT)
+static u8 get_SoC_letter(void)
+{
+ const u8 *name = rzg_get_cpu_name();
+
+ if (*name)
+ return name[6];
+
+ return 0;
+}
+
+int board_late_init(void)
+{
+ /* If already defined, exit */
+ if (!env_get("fdt_file")) {
+ switch (get_SoC_letter()) {
+ case 'A':
+ env_set("fdt_file", "r8a774a1-beacon-rzg2m-kit.dtb");
+ break;
+ case 'B':
+ env_set("fdt_file", "r8a774b1-beacon-rzg2n-kit.dtb");
+ break;
+ case 'E':
+ env_set("fdt_file", "r8a774e1-beacon-rzg2h-kit.dtb");
+ break;
+ }
+ }
+
+ return 0;
+}
+#endif /* CONFIG_BOARD_LATE_INIT */
+
#if IS_ENABLED(CONFIG_MULTI_DTB_FIT)
int board_fit_config_name_match(const char *name)
{
diff --git a/configs/rzg2_beacon_defconfig b/configs/rzg2_beacon_defconfig
index 534f641e84..6894448b22 100644
--- a/configs/rzg2_beacon_defconfig
+++ b/configs/rzg2_beacon_defconfig
@@ -21,6 +21,7 @@ CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run
loadbootscript; then run bootscript; else if run loadimage; then run mmcboot;
else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
CONFIG_DEFAULT_FDT_FILE="r8a774a1-beacon-rzg2m-kit.dtb"
# CONFIG_BOARD_EARLY_INIT_F is not set
+CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
diff --git a/include/configs/beacon-rzg2m.h b/include/configs/beacon-rzg2m.h
index 65c01835cc..493b98fbdf 100644
--- a/include/configs/beacon-rzg2m.h
+++ b/include/configs/beacon-rzg2m.h
@@ -18,7 +18,6 @@
"fdt_addr=0x4800\0" \
"loadaddr=0x4808\0" \
"boot_fdt=try\0" \
- "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
"initrd_addr=0x4380\0" \
"mmcdev=1\0" \
"mmcpart=1\0" \
--
2.40.1
[PATCH 2/3] configs: rzg2_beacon: Realign ENV location and offset
The ENV size and offset were changed to different values in Beacon's downstream release. Change them to the same values as the downstream for consistent behavior. Signed-off-by: Adam Ford diff --git a/configs/rzg2_beacon_defconfig b/configs/rzg2_beacon_defconfig index 7b14d225b5..534f641e84 100644 --- a/configs/rzg2_beacon_defconfig +++ b/configs/rzg2_beacon_defconfig @@ -3,7 +3,8 @@ CONFIG_ARCH_RMOBILE=y CONFIG_TEXT_BASE=0x5000 CONFIG_SYS_MALLOC_LEN=0x400 CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_ENV_OFFSET=0x0 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0xE000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-beacon-rzg2m-kit" CONFIG_RCAR_GEN3=y -- 2.40.1
[PATCH 1/3] configs: rzg2_beacon: Disable the ability to remove devices
In order to save some space, disable the ability to dynamically remove devices. Without this, U-Boot is too large to load without recompiling TF-A. Signed-off-by: Adam Ford diff --git a/configs/rzg2_beacon_defconfig b/configs/rzg2_beacon_defconfig index 73abe966b8..7b14d225b5 100644 --- a/configs/rzg2_beacon_defconfig +++ b/configs/rzg2_beacon_defconfig @@ -48,6 +48,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_MMC_ENV_PART=2 CONFIG_VERSION_VARIABLE=y +# CONFIG_DM_DEVICE_REMOVE is not set CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y -- 2.40.1
[PATCH 5/5] configs: imx8mn_beacon: Disable the WDT autostart
Auto-starting the WDT can cause false reboots when the user is not intentionally trying to use the WDT, so leave it off until it is requested. Signed-off-by: Adam Ford --- configs/imx8mn_beacon_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index cfff20f84f..d1c27ce22c 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -150,4 +150,5 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y +# CONFIG_WATCHDOG_AUTOSTART is not set CONFIG_IMX_WATCHDOG=y -- 2.40.1
[PATCH 4/5] configs: imx8mn_beacon: Do not set SYS_CONSOLE_IS_IN_ENV
The hardware only supports a specific console port, so remove the
option to change the console location in the environment.
Signed-off-by: Adam Ford
---
configs/imx8mn_beacon_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig
index 9409d5142c..cfff20f84f 100644
--- a/configs/imx8mn_beacon_defconfig
+++ b/configs/imx8mn_beacon_defconfig
@@ -34,6 +34,7 @@ CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run
loadbootscript; then run bootscript; else if run loadimage; then run mmcboot;
else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb"
+# CONFIG_SYS_CONSOLE_IS_IN_ENV is not set
CONFIG_SPL_MAX_SIZE=0x25000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x95
--
2.40.1
[PATCH 3/5] configs: imx8mm_beacon: Disable the WDT autostart
Auto-starting the WDT can cause false reboots when the user is not intentionally trying to use the WDT, so leave it off until it is requested. Signed-off-by: Adam Ford --- configs/imx8mm_beacon_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 886d912650..b33e113580 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -148,4 +148,5 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_SDP_LOADADDR=0x4040 CONFIG_SPL_USB_SDP_SUPPORT=y +# CONFIG_WATCHDOG_AUTOSTART is not set CONFIG_IMX_WATCHDOG=y -- 2.40.1
[PATCH 2/5] configs: imx8mm_beacon: Enable fastboot downloading
Fastboot is necessary to use UUU enhanced functions, so enable it. Signed-off-by: Adam Ford --- configs/imx8mm_beacon_defconfig | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 031470c169..886d912650 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -86,6 +86,11 @@ CONFIG_SPL_CLK_COMPOSITE_CCF=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_SPL_CLK_IMX8MM=y CONFIG_CLK_IMX8MM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x4280 +CONFIG_FASTBOOT_BUF_SIZE=0x2000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_MXC_GPIO=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y @@ -142,6 +147,5 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_SDP_LOADADDR=0x4040 -CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_IMX_WATCHDOG=y -- 2.40.1
[PATCH 1/5] configs: imx8mp_beacon: Do not set SYS_CONSOLE_IS_IN_ENV
The hardware only supports a specific console port, so remove the
option to change the console location in the environment.
Signed-off-by: Adam Ford
---
configs/imx8mp_beacon_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/imx8mp_beacon_defconfig b/configs/imx8mp_beacon_defconfig
index b686af8d18..c758ff371d 100644
--- a/configs/imx8mp_beacon_defconfig
+++ b/configs/imx8mp_beacon_defconfig
@@ -42,6 +42,7 @@ CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run
loadbootscript; then run bootscript; else if run loadimage; then run mmcboot;
else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
CONFIG_DEFAULT_FDT_FILE="imx8mp-beacon-kit.dtb"
+# CONFIG_SYS_CONSOLE_IS_IN_ENV is not set
# CONFIG_SYS_DEVICE_NULLDEV is not set
CONFIG_SPL_MAX_SIZE=0x26000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
--
2.40.1
Re: [PATCH 15/19] ARM: dts: renesas: Synchronize RZ R8A774A1 RZ/G2M DTs with Linux 6.5.3
On Sun, Sep 17, 2023 at 9:18 AM Marek Vasut
wrote:
>
> Synchronize RZ R8A774A1 RZ/G2M DTs with Linux 6.5.3,
Thanks!
> commit 238589d0f7b421aae18c5704dc931595019fa6c7 .
>
> Signed-off-by: Marek Vasut
Reviewed-by: Adam Ford
> ---
> arch/arm/dts/beacon-renesom-baseboard.dtsi | 45 ++
> arch/arm/dts/beacon-renesom-som.dtsi | 2 +-
> arch/arm/dts/hihope-common.dtsi| 21 --
> arch/arm/dts/r8a774a1-beacon-rzg2m-kit.dts | 21 --
> arch/arm/dts/r8a774a1-u-boot.dtsi | 1 -
> arch/arm/dts/r8a774a1.dtsi | 14 ---
> 6 files changed, 57 insertions(+), 47 deletions(-)
>
> diff --git a/arch/arm/dts/beacon-renesom-baseboard.dtsi
> b/arch/arm/dts/beacon-renesom-baseboard.dtsi
> index 8166e3c1ff4..2e9927b9773 100644
> --- a/arch/arm/dts/beacon-renesom-baseboard.dtsi
> +++ b/arch/arm/dts/beacon-renesom-baseboard.dtsi
> @@ -367,7 +367,7 @@
>
> assigned-clocks = <_bb 1>, <_bb 2>,
> <_bb 3>, <_bb 4>;
> - assigned-clock-rates = <2400>, <2400>, <2400>,
> + assigned-clock-rates = <2400>, <2400>, <24576000>,
><24576000>;
>
> OUT1 {
> @@ -437,20 +437,6 @@
> };
> };
>
> - /* 0 - lcd_reset */
> - /* 1 - lcd_pwr */
> - /* 2 - lcd_select */
> - /* 3 - backlight-enable */
> - /* 4 - Touch_shdwn */
> - /* 5 - LCD_H_pol */
> - /* 6 - lcd_V_pol */
> - gpio_exp1: gpio@20 {
> - compatible = "onnn,pca9654";
> - reg = <0x20>;
> - gpio-controller;
> - #gpio-cells = <2>;
> - };
> -
> touchscreen@26 {
> compatible = "ilitek,ili2117";
> reg = <0x26>;
> @@ -482,6 +468,16 @@
> };
> };
> };
> +
> + gpio_exp1: gpio@70 {
> + compatible = "nxp,pca9538";
> + reg = <0x70>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-line-names = "lcd_reset", "lcd_pwr", "lcd_select",
> + "backlight-enable", "Touch_shdwn",
> + "LCD_H_pol", "lcd_V_pol";
> + };
> };
>
> {
> @@ -638,6 +634,25 @@
> #clock-cells = <1>;
> clock-frequency = <11289600>;
>
> + /* Reference versaclock instead of audio_clk_a */
> + clocks = < CPG_MOD 1005>,
> +< CPG_MOD 1006>, < CPG_MOD 1007>,
> +< CPG_MOD 1008>, < CPG_MOD 1009>,
> +< CPG_MOD 1010>, < CPG_MOD 1011>,
> +< CPG_MOD 1012>, < CPG_MOD 1013>,
> +< CPG_MOD 1014>, < CPG_MOD 1015>,
> +< CPG_MOD 1022>, < CPG_MOD 1023>,
> +< CPG_MOD 1024>, < CPG_MOD 1025>,
> +< CPG_MOD 1026>, < CPG_MOD 1027>,
> +< CPG_MOD 1028>, < CPG_MOD 1029>,
> +< CPG_MOD 1030>, < CPG_MOD 1031>,
> +< CPG_MOD 1020>, < CPG_MOD 1021>,
> +< CPG_MOD 1020>, < CPG_MOD 1021>,
> +< CPG_MOD 1019>, < CPG_MOD 1018>,
> +<_bb 4>, <_clk_b>,
> +<_clk_c>,
> +< CPG_CORE CPG_AUDIO_CLK_I>;
> +
> status = "okay";
>
> ports {
> diff --git a/arch/arm/dts/beacon-renesom-som.dtsi
> b/arch/arm/dts/beacon-renesom-som.dtsi
> index d3fc8ffd5b4..68b04e56ae5 100644
> --- a/arch/arm/dts/beacon-renesom-som.dtsi
> +++ b/arch/arm/dts/beacon-renesom-som.dtsi
> @@ -59,7 +59,7 @@
> status = "okay";
>
> phy0: ethernet-phy@0 {
> - compatible = "ethernet-phy-id004d.d074",
> + compatible = "ethernet-phy-id0022.1640",
> "ethernet-phy-ieee802.3-c22";
> reg = <0>;
> interrupt-parent = <>;
> diff --git a/arch/arm/dts/hihope-common.dtsi b/arch/arm/dts/hihope-common.dtsi
> index b1eb6a08029..83104af2813 100644
> --- a/arch/arm/dts/hihope-common.dtsi
> +++ b/arch/arm/dts/hihope-common.dtsi
> @@ -3,15 +3,26 @@
&
Re: [PATCH 2/5] MAINTAINERS: Add some missing defconfig files to existing entries
On Tue, Jul 18, 2023 at 11:20 AM Tom Rini wrote: > > We have a few places where defconfigs were added (or renamed) and not > included in their previously listed MAINTAINERS entry, correct this. > For the beacon boards: Acked-by: Adam Ford > Signed-off-by: Tom Rini > --- > Cc: Adam Ford > Cc: Chris Packham > Cc: Jan Kiszka > Cc: Neil Armstrong > Cc: Stefan Roese > --- > board/Marvell/db-88f6820-amc/MAINTAINERS | 1 + > board/amlogic/w400/MAINTAINERS | 1 + > board/beacon/imx8mm/MAINTAINERS | 1 + > board/beacon/imx8mn/MAINTAINERS | 1 + > board/siemens/iot2050/MAINTAINERS| 3 ++- > board/solidrun/clearfog/MAINTAINERS | 2 ++ > 6 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/board/Marvell/db-88f6820-amc/MAINTAINERS > b/board/Marvell/db-88f6820-amc/MAINTAINERS > index abf5b7efdc93..d519eb47b84c 100644 > --- a/board/Marvell/db-88f6820-amc/MAINTAINERS > +++ b/board/Marvell/db-88f6820-amc/MAINTAINERS > @@ -4,3 +4,4 @@ S: Maintained > F: board/Marvell/db-88f6820-amc/ > F: include/configs/db-88f6820-amc.h > F: configs/db-88f6820-amc_defconfig > +F: configs/db-88f6820-amc_nand_defconfig > diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS > index 117f79ea047b..19b1f30e6213 100644 > --- a/board/amlogic/w400/MAINTAINERS > +++ b/board/amlogic/w400/MAINTAINERS > @@ -5,6 +5,7 @@ L: u-boot-amlo...@groups.io > F: board/amlogic/w400/ > F: configs/bananapi-cm4-cm4io_defconfig > F: configs/bananapi-m2s_defconfig > +F: configs/odroid-n2l_defconfig > F: configs/radxa-zero2_defconfig > F: doc/board/amlogic/w400.rst > F: doc/board/amlogic/bananapi-cm4io.rst > diff --git a/board/beacon/imx8mm/MAINTAINERS b/board/beacon/imx8mm/MAINTAINERS > index d48ba8605bba..d8a5d0973694 100644 > --- a/board/beacon/imx8mm/MAINTAINERS > +++ b/board/beacon/imx8mm/MAINTAINERS > @@ -5,4 +5,5 @@ S: Maintained > F: board/beacon/imx8mm/ > F: include/configs/imx8mm_beacon.h > F: configs/imx8mm_beacon_defconfig > +F: configs/imx8mm_beacon_fspi_defconfig > F: doc/board/beacon/ > diff --git a/board/beacon/imx8mn/MAINTAINERS b/board/beacon/imx8mn/MAINTAINERS > index 4805cb255cc0..6dcef21a65e9 100644 > --- a/board/beacon/imx8mn/MAINTAINERS > +++ b/board/beacon/imx8mn/MAINTAINERS > @@ -5,3 +5,4 @@ F: board/beacon/imx8mn/ > F: include/configs/imx8mn_beacon.h > F: configs/imx8mn_beacon_defconfig > F: configs/imx8mn_beacon_2g_defconfig > +F: configs/imx8mn_beacon_fspi_defconfig > diff --git a/board/siemens/iot2050/MAINTAINERS > b/board/siemens/iot2050/MAINTAINERS > index 1b525356c2d6..aa21de2099f7 100644 > --- a/board/siemens/iot2050/MAINTAINERS > +++ b/board/siemens/iot2050/MAINTAINERS > @@ -4,6 +4,7 @@ M: Jan Kiszka > S: Maintained > F: board/siemens/iot2050/ > F: include/configs/iot2050.h > -F: configs/iot2050_defconfig > +F: configs/iot2050_pg1_defconfig > +F: configs/iot2050_pg2_defconfig > F: arch/arm/dts/iot2050-* > F: doc/board/siemens/iot2050.rst > diff --git a/board/solidrun/clearfog/MAINTAINERS > b/board/solidrun/clearfog/MAINTAINERS > index 6646d96206bf..55bd1278049a 100644 > --- a/board/solidrun/clearfog/MAINTAINERS > +++ b/board/solidrun/clearfog/MAINTAINERS > @@ -5,3 +5,5 @@ F: board/soldrun/clearfog/ > F: include/configs/clearfog.h > F: configs/clearfog_defconfig > F: configs/clearfog_gt_8k_defconfig > +F: configs/clearfog_sata_defconfig > +F: configs/clearfog_spi_defconfig > -- > 2.34.1 >
Re: [PATCH 1/5] imx: imx8mm-beacon: Move environment definition to env file
On Mon, Jun 12, 2023 at 11:27 AM Tom Rini wrote: > > On Mon, Jun 12, 2023 at 07:53:53AM -0500, Adam Ford wrote: > > On Sun, May 28, 2023 at 2:18 PM Adam Ford wrote: > > > > > > Instead of cluttering up a header file with a bunch of defines, > > > move the default environmental variables to a file called > > > imx8mm_beacon.env and reference it from the defconfig. > > > > > > > Stefano / Tom, > > > > Is this series OK? If so, I'll continue to do this to other Beacon > > and Logic PD boards. > > Yes, this all looked good to me, thanks! thanks adam Are you able to merge this in now that the July release is behind us? I haven't seen it get any traction. > > -- > Tom
Re: [PATCH 1/5] imx: imx8mm-beacon: Move environment definition to env file
On Sun, May 28, 2023 at 2:18 PM Adam Ford wrote:
>
> Instead of cluttering up a header file with a bunch of defines,
> move the default environmental variables to a file called
> imx8mm_beacon.env and reference it from the defconfig.
>
Stefano / Tom,
Is this series OK? If so, I'll continue to do this to other Beacon
and Logic PD boards.
adam
> Signed-off-by: Adam Ford
> ---
> board/beacon/imx8mm/imx8mm_beacon.env | 19 ++
> configs/imx8mm_beacon_defconfig | 1 +
> include/configs/imx8mm_beacon.h | 50 ---
> 3 files changed, 20 insertions(+), 50 deletions(-)
> create mode 100644 board/beacon/imx8mm/imx8mm_beacon.env
>
> diff --git a/board/beacon/imx8mm/imx8mm_beacon.env
> b/board/beacon/imx8mm/imx8mm_beacon.env
> new file mode 100644
> index 00..00bf67edd5
> --- /dev/null
> +++ b/board/beacon/imx8mm/imx8mm_beacon.env
> @@ -0,0 +1,19 @@
> +boot_fit=try
> +bootscript=echo Running bootscript from mmc ...; source
> +console=ttymxc1
> +fdt_addr=0x4500
> +fdt_file=imx8mm-beacon-kit.dtb
> +finduuid=part uuid mmc ${mmcdev}:2 uuid
> +image=Image
> +initrd_addr=0x4600
> +loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};
> +loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}
> +loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}
> +mmcargs=setenv bootargs console=${console},${baudrate} root=PARTUUID=${uuid}
> rootwait rw ${mtdparts} ${optargs}
> +mmcautodetect=yes
> +mmcboot=echo Booting from mmc ...; run finduuid; run mmcargs; if run
> loadfdt; then booti ${loadaddr} - ${fdt_addr}; else echo WARN: Cannot load
> the DT; fi;
> +netargs=setenv bootargs console=${console},${baudrate} root=/dev/nfs ip=dhcp
> nfsroot=${serverip}:${nfsroot},v3,tcp
> +mmcdev=1
> +mmcpart=1
> +netboot=echo Booting from net ...; run netargs; if test ${ip_dyn} = yes;
> then setenv get_cmd dhcp; else setenv get_cmd tftp; fi; ${get_cmd}
> ${loadaddr} ${image}; if test ${boot_fit} = yes || test ${boot_fit} = try;
> then bootm ${loadaddr}; else if ${get_cmd} ${fdt_addr} ${fdt_file}; then
> booti ${loadaddr} - ${fdt_addr}; else echo WARN: Cannot load the DT; fi; fi;
> +script=boot.scr
> diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig
> index 597fe256d0..c049db32c1 100644
> --- a/configs/imx8mm_beacon_defconfig
> +++ b/configs/imx8mm_beacon_defconfig
> @@ -5,6 +5,7 @@ CONFIG_SYS_MALLOC_LEN=0x200
> CONFIG_SPL_GPIO=y
> CONFIG_SPL_LIBCOMMON_SUPPORT=y
> CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_ENV_SOURCE_FILE="imx8mm_beacon"
> CONFIG_SF_DEFAULT_SPEED=1000
> CONFIG_ENV_SIZE=0x2000
> CONFIG_ENV_OFFSET=0xDE00
> diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h
> index d85ae21e23..c8dab91f61 100644
> --- a/include/configs/imx8mm_beacon.h
> +++ b/include/configs/imx8mm_beacon.h
> @@ -19,56 +19,6 @@
>
> #endif
>
> -/* Initial environment variables */
> -#define CFG_EXTRA_ENV_SETTINGS \
> - "script=boot.scr\0" \
> - "image=Image\0" \
> - "console=ttymxc1,115200\0" \
> - "fdt_addr=0x4300\0" \
> - "boot_fit=try\0" \
> - "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
> - "initrd_addr=0x4380\0" \
> - "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
> - "mmcpart=1\0" \
> - "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
> - "mmcautodetect=yes\0" \
> - "mmcargs=setenv bootargs console=${console},${baudrate}" \
> - " root=PARTUUID=${uuid} rootwait rw ${mtdparts} ${optargs}\0" \
> - "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
> - " ${script};\0" \
> - "bootscript=echo Running bootscript from mmc ...; " \
> - "source\0" \
> - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
> - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
> - "mmcboot=echo Booting from mmc ...; " \
> - "run finduuid; " \
> - "run mmcargs; " \
> - "if run loadfdt; then " \
> - "booti ${loadaddr} - ${fdt_addr}; " \
> - "else " \
> - "echo WARN: Cannot load the DT; " \
> - "fi; " \
> - "netargs=setenv bootargs console=${console} " \
> -
Re: [PATCH] renesas: rcar: Apply ATF overlay for reserved-memory
On Fri, Jun 9, 2023 at 10:41 AM Detlev Casanova
wrote:
>
> The function fdtdec_board_setup() is called early and adds the overlay
> from ATF to the u-boot device tree. That is necessary so that u-boot
> doesn't use reserved memory.
>
> Linux also needs to know about that reserved memory so the overlay from
> ATF needs to be aplied on the linux device tree as well.
>
> This commit makes sure that the ATF overlay is applied to both device trees.
>
Thanks for this. I was trying to do this very same thing, but your
solution looks cleaner than mine.
Reviewed-by: Adam Ford
> Signed-off-by: Detlev Casanova
> ---
> board/renesas/rcar-common/common.c | 10 --
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/board/renesas/rcar-common/common.c
> b/board/renesas/rcar-common/common.c
> index f38453af82c..f976c99028a 100644
> --- a/board/renesas/rcar-common/common.c
> +++ b/board/renesas/rcar-common/common.c
> @@ -25,12 +25,17 @@ extern u64 rcar_atf_boot_args[];
>
> #define FDT_RPC_PATH "/soc/spi@ee20"
>
> -int fdtdec_board_setup(const void *fdt_blob)
> +static void apply_atf_overlay(void *fdt_blob)
> {
> void *atf_fdt_blob = (void *)(rcar_atf_boot_args[1]);
>
> if (fdt_magic(atf_fdt_blob) == FDT_MAGIC)
> - fdt_overlay_apply_node((void *)fdt_blob, 0, atf_fdt_blob, 0);
> + fdt_overlay_apply_node(fdt_blob, 0, atf_fdt_blob, 0);
> +}
> +
> +int fdtdec_board_setup(const void *fdt_blob)
> +{
> + apply_atf_overlay((void *)fdt_blob);
>
> return 0;
> }
> @@ -159,6 +164,7 @@ static void update_rpc_status(void *blob)
>
> int ft_board_setup(void *blob, struct bd_info *bd)
> {
> + apply_atf_overlay(blob);
> scrub_duplicate_memory(blob);
> update_rpc_status(blob);
>
> --
> 2.39.3
>
Re: [PATCH] phy: phy-imx8mq-usb: add vbus regulator support
On Thu, Jun 8, 2023 at 8:29 PM Tim Harvey wrote:
>
> Add support for enabling and disabling vbus-supply regulator found
> on several imx8mp boards in the usb3_phy0 and usb3_phy1 nodes.
>
> Without this I suspect U-Boot usb does not work on the following:
> - imx8mp-beacon-kit
The Host-only port works on the Beacon board, but the dual-role, usb
type-c port doesn't appear to have been impacted. I am guessing it's
due to the lack of a proper type-c driver. Despite that, I think it's
the right thing to do for this platform, and I'll give some feedback
below.
> - imx8mp-msc-sm2s
> - imx8mp-verdin-wifi-dev
>
Reviewed-by: Adam Ford
> Signed-off-by: Tim Harvey
> ---
> drivers/phy/phy-imx8mq-usb.c | 24 ++--
> 1 file changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/phy/phy-imx8mq-usb.c b/drivers/phy/phy-imx8mq-usb.c
> index 69f01de55538..eed9c07848f4 100644
> --- a/drivers/phy/phy-imx8mq-usb.c
> +++ b/drivers/phy/phy-imx8mq-usb.c
> @@ -14,6 +14,7 @@
> #include
> #include
> #include
> +#include
>
> #define PHY_CTRL0 0x0
> #define PHY_CTRL0_REF_SSP_EN BIT(2)
> @@ -81,6 +82,7 @@ struct imx8mq_usb_phy {
> #endif
> void __iomem *base;
> enum imx8mpq_phy_type type;
> + struct udevice *vbus_supply;
> };
>
> static const struct udevice_id imx8mq_usb_phy_of_match[] = {
> @@ -173,9 +175,9 @@ static int imx8mq_usb_phy_power_on(struct phy *usb_phy)
> struct udevice *dev = usb_phy->dev;
> struct imx8mq_usb_phy *imx_phy = dev_get_priv(dev);
> u32 value;
> + int ret;
In the unlikely event that neither CONFIG_CLK nor CONFIG_DM_REGULATOR
is configured, will defining ret here throw a compiler warning that
it's unused? I wonder if __maybe_unused attribute would be permissible
here or if this should be inside an #if statement.
>
> #if CONFIG_IS_ENABLED(CLK)
> - int ret;
> ret = clk_enable(_phy->phy_clk);
> if (ret) {
> printf("Failed to enable usb phy clock\n");
> @@ -183,6 +185,12 @@ static int imx8mq_usb_phy_power_on(struct phy *usb_phy)
> }
> #endif
>
> + if (CONFIG_IS_ENABLED(DM_REGULATOR) && imx_phy->vbus_supply) {
> + ret = regulator_set_enable(imx_phy->vbus_supply, true);
> + if (ret)
I am personally a fan of error messages. There is an error message if
the clock fails, so unless there is an objection, can we have one here
too? One was also added to the probe function.
> + return ret;
> + }
> +
> /* Disable rx term override */
> value = readl(imx_phy->base + PHY_CTRL6);
> value &= ~PHY_CTRL6_RXTERM_OVERRIDE_SEL;
> @@ -206,6 +214,9 @@ static int imx8mq_usb_phy_power_off(struct phy *usb_phy)
> clk_disable(_phy->phy_clk);
> #endif
>
> + if (CONFIG_IS_ENABLED(DM_REGULATOR) && imx_phy->vbus_supply)
> + return regulator_set_enable(imx_phy->vbus_supply, false);
> +
> return 0;
> }
>
> @@ -224,6 +235,7 @@ struct phy_ops imx8mq_usb_phy_ops = {
> int imx8mq_usb_phy_probe(struct udevice *dev)
> {
> struct imx8mq_usb_phy *priv = dev_get_priv(dev);
> + int ret;
Same comment as above regarding whether or not this might be unused.
>
> priv->type = dev_get_driver_data(dev);
> priv->base = dev_read_addr_ptr(dev);
> @@ -232,7 +244,6 @@ int imx8mq_usb_phy_probe(struct udevice *dev)
> return -EINVAL;
>
> #if CONFIG_IS_ENABLED(CLK)
> - int ret;
>
> /* Assigned clock already set clock */
> ret = clk_get_by_name(dev, "phy", >phy_clk);
> @@ -242,6 +253,15 @@ int imx8mq_usb_phy_probe(struct udevice *dev)
> }
> #endif
>
> + if (CONFIG_IS_ENABLED(DM_REGULATOR)) {
> + ret = device_get_supply_regulator(dev, "vbus-supply",
> + >vbus_supply);
> + if (ret && ret != -ENOENT) {
> + pr_err("Failed to get PHY regulator\n");
> + return ret;
> + }
> + }
> +
> return 0;
> }
>
> --
> 2.25.1
>
Re: [PATCH 1/2] clk: imx8mp: Update clocks based on kernel 6.4-RC4
On Wed, May 31, 2023 at 10:44 AM Tim Harvey wrote:
>
> On Tue, May 30, 2023 at 3:46 PM Adam Ford wrote:
> >
> > There are some newer clocks added to the kernel recently,
> > so to fix prepare for resycing the device trees, update
> > the clock list. Since there are some minor changes to
> > the USB clocks, update which USB clocks are enabled
> > to match with the upstream kernel as well.
> >
> > Signed-off-by: Adam Ford
> >
> > diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
> > index 09bef596f2..a21a3ce34b 100644
> > --- a/drivers/clk/imx/clk-imx8mp.c
> > +++ b/drivers/clk/imx/clk-imx8mp.c
> > @@ -337,7 +337,8 @@ static int imx8mp_clk_probe(struct udevice *dev)
> > clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk",
> > "uart2", base + 0x44a0, 0));
> > clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk",
> > "uart3", base + 0x44b0, 0));
> > clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk",
> > "uart4", base + 0x44c0, 0));
> > - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> > "usb_core_ref", base + 0x44d0, 0));
> > + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate2("usb_root_clk",
> > "hsio_axi", base + 0x44d0, 0));
> > + clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate2("usb_suspend_clk",
> > "clock-osc-24m", base + 0x44d0, 0));
> > clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk",
> > "usb_phy_ref", base + 0x44f0, 0));
> > clk_dm(IMX8MP_CLK_USDHC1_ROOT, imx_clk_gate4("usdhc1_root_clk",
> > "usdhc1", base + 0x4510, 0));
> > clk_dm(IMX8MP_CLK_USDHC2_ROOT, imx_clk_gate4("usdhc2_root_clk",
> > "usdhc2", base + 0x4520, 0));
> > diff --git a/include/dt-bindings/clock/imx8mp-clock.h
> > b/include/dt-bindings/clock/imx8mp-clock.h
> > index 9d5cc2ddde..3f28ce685f 100644
> > --- a/include/dt-bindings/clock/imx8mp-clock.h
> > +++ b/include/dt-bindings/clock/imx8mp-clock.h
> > @@ -324,8 +324,18 @@
> > #define IMX8MP_CLK_CLKOUT2_SEL 317
> > #define IMX8MP_CLK_CLKOUT2_DIV 318
> > #define IMX8MP_CLK_CLKOUT2 319
> > -
> > -#define IMX8MP_CLK_END 320
> > +#define IMX8MP_CLK_USB_SUSP320
> > +#define IMX8MP_CLK_AUDIO_AHB_ROOT IMX8MP_CLK_AUDIO_ROOT
> > +#define IMX8MP_CLK_AUDIO_AXI_ROOT 321
> > +#define IMX8MP_CLK_SAI1_ROOT 322
> > +#define IMX8MP_CLK_SAI2_ROOT 323
> > +#define IMX8MP_CLK_SAI3_ROOT 324
> > +#define IMX8MP_CLK_SAI5_ROOT 325
> > +#define IMX8MP_CLK_SAI6_ROOT 326
> > +#define IMX8MP_CLK_SAI7_ROOT 327
> > +#define IMX8MP_CLK_PDM_ROOT328
> > +#define IMX8MP_CLK_MEDIA_LDB_ROOT 329
> > +#define IMX8MP_CLK_END 330
> >
> > #define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0
> > #define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1
> > --
> > 2.39.2
> >
>
> Adam,
>
> This series does update the imx8mp.dtsi as well as provide functioning
> USB for me on imx8mp-venice-gw74xx.
>
Thanks for testing!
> For both:
> Tested-by: Tim Harvey #imx8mp-venice-gw74xx
>
> I do still see a clk already disabled message on usb stop (which was
> there before also but I believe the sync of the imx8mm.dtsi resolved
> the one on imx8mm). I'm curious if you see this as well:
> u-boot=> usb start && usb tree
> starting USB...
> Bus usb@3820: Register 2000140 NbrPorts 2
> Starting the controller
> USB XHCI 1.10
> scanning bus usb@3820 for devices... 4 USB Device(s) found
>scanning usb for storage devices... 0 Storage Device(s) found
> USB device tree:
> 1 Hub (5 Gb/s, 0mA)
> | U-Boot XHCI Host Controller
> |
> +-2 Hub (480 Mb/s, 0mA)
> | | Microchip Tech USB2744
> | |
> | +-4 Vendor specific (480 Mb/s, 0mA)
> | Microchip Tech Hub Controller
> |
> +-3 Hub (5 Gb/s, 0mA)
>Microchip Tech USB5744
>
> u-boot=> usb stop
> stopping USB..
> clk usb_phy_root_clk already disabled
I didn't try the usb stop, but I can do that later today.
>
> Also, I assume your Type-C ports on the imx8mp-beacon-kit do not work
> yet due to no U-Boot driver for usb-c-connector, nxp,ptn5110,
I only tried the USB host-only port which is connected to a hub, but I
can try the others as well.
> ti,hd3ss3220?
The HD3ss3220 does the muxing automatically without really needing a
driver, and I haven't tried that either, but I can try that as a
peripheral and as a host to see if/what happens.
adam
>
> Best Regards,
>
> Tim
[PATCH] arm: dts: imx8mp-beacon-kit: Enable USB Power domains
The USB Power domains should not have been removed as it causes
the board to hang if the USB is started.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
index 5ca631e9d8..b56f3a2bd2 100644
--- a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
@@ -185,12 +185,10 @@
_0 {
dma-ranges = <0x4000 0x4000 0xc000>;
- /delete-property/ power-domains;
};
_1 {
dma-ranges = <0x4000 0x4000 0xc000>;
- /delete-property/ power-domains;
};
_dwc3_0 {
--
2.39.2
[PATCH 2/2] arm: dts: imx8mp: Sync the DT with kernel 6.4-rc4
Several changes have been made to the device tree
in the kernel, so update that as well as the
corresponding imx8mp-u-boot.dtsi files to prevent
breaking the booting.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi
index 18d1728e1d..dfb747bb02 100644
--- a/arch/arm/dts/imx8mp-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-u-boot.dtsi
@@ -44,6 +44,9 @@
{
bootph-pre-ram;
+ spba-bus@3080 {
+ bootph-pre-ram;
+ };
};
{
diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi
index bb916a0948..428c60462e 100644
--- a/arch/arm/dts/imx8mp.dtsi
+++ b/arch/arm/dts/imx8mp.dtsi
@@ -123,6 +123,7 @@
A53_L2: l2-cache0 {
compatible = "cache";
+ cache-unified;
cache-level = <2>;
cache-size = <0x8>;
cache-line-size = <64>;
@@ -379,6 +380,8 @@
compatible = "fsl,imx8mp-tmu";
reg = <0x3026 0x1>;
clocks = < IMX8MP_CLK_TSENSOR_ROOT>;
+ nvmem-cells = <_calib>;
+ nvmem-cell-names = "calib";
#thermal-sensor-cells = <1>;
};
@@ -406,12 +409,36 @@
status = "disabled";
};
+ gpt1: timer@302d {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x302d 0x1>;
+ interrupts = ;
+ clocks = < IMX8MP_CLK_GPT1_ROOT>, <
IMX8MP_CLK_GPT1>;
+ clock-names = "ipg", "per";
+ };
+
+ gpt2: timer@302e {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x302e 0x1>;
+ interrupts = ;
+ clocks = < IMX8MP_CLK_GPT2_ROOT>, <
IMX8MP_CLK_GPT2>;
+ clock-names = "ipg", "per";
+ };
+
+ gpt3: timer@302f {
+ compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+ reg = <0x302f 0x1>;
+ interrupts = ;
+ clocks = < IMX8MP_CLK_GPT3_ROOT>, <
IMX8MP_CLK_GPT3>;
+ clock-names = "ipg", "per";
+ };
+
iomuxc: pinctrl@3033 {
compatible = "fsl,imx8mp-iomuxc";
reg = <0x3033 0x1>;
};
- gpr: iomuxc-gpr@3034 {
+ gpr: syscon@3034 {
compatible = "fsl,imx8mp-iomuxc-gpr", "syscon";
reg = <0x3034 0x1>;
};
@@ -424,27 +451,44 @@
#address-cells = <1>;
#size-cells = <1>;
- imx8mp_uid: unique-id@420 {
+ /*
+* The register address below maps to the MX8M
+* Fusemap Description Table entries this way.
+* Assuming
+* reg = ;
+* then
+* Fuse Address = (ADDR * 4) + 0x400
+* Note that if SIZE is greater than 4, then
+* each subsequent fuse is located at offset
+* +0x10 in Fusemap Description Table (e.g.
+* reg = <0x8 0x8> describes fuses 0x420 and
+* 0x430).
+*/
+ imx8mp_uid: unique-id@8 { /* 0x420-0x430 */
reg = <0x8 0x8>;
};
- cpu_speed_grade: speed-grade@10 {
+ cpu_speed_grade: speed-grade@10 { /* 0x440 */
reg = <0x10 4>;
};
- eth_mac1: mac-address@90 {
+
[PATCH 1/2] clk: imx8mp: Update clocks based on kernel 6.4-RC4
There are some newer clocks added to the kernel recently,
so to fix prepare for resycing the device trees, update
the clock list. Since there are some minor changes to
the USB clocks, update which USB clocks are enabled
to match with the upstream kernel as well.
Signed-off-by: Adam Ford
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 09bef596f2..a21a3ce34b 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -337,7 +337,8 @@ static int imx8mp_clk_probe(struct udevice *dev)
clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk", "uart2",
base + 0x44a0, 0));
clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk", "uart3",
base + 0x44b0, 0));
clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk", "uart4",
base + 0x44c0, 0));
- clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
"usb_core_ref", base + 0x44d0, 0));
+ clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate2("usb_root_clk", "hsio_axi",
base + 0x44d0, 0));
+ clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate2("usb_suspend_clk",
"clock-osc-24m", base + 0x44d0, 0));
clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk",
"usb_phy_ref", base + 0x44f0, 0));
clk_dm(IMX8MP_CLK_USDHC1_ROOT, imx_clk_gate4("usdhc1_root_clk",
"usdhc1", base + 0x4510, 0));
clk_dm(IMX8MP_CLK_USDHC2_ROOT, imx_clk_gate4("usdhc2_root_clk",
"usdhc2", base + 0x4520, 0));
diff --git a/include/dt-bindings/clock/imx8mp-clock.h
b/include/dt-bindings/clock/imx8mp-clock.h
index 9d5cc2ddde..3f28ce685f 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -324,8 +324,18 @@
#define IMX8MP_CLK_CLKOUT2_SEL 317
#define IMX8MP_CLK_CLKOUT2_DIV 318
#define IMX8MP_CLK_CLKOUT2 319
-
-#define IMX8MP_CLK_END 320
+#define IMX8MP_CLK_USB_SUSP320
+#define IMX8MP_CLK_AUDIO_AHB_ROOT IMX8MP_CLK_AUDIO_ROOT
+#define IMX8MP_CLK_AUDIO_AXI_ROOT 321
+#define IMX8MP_CLK_SAI1_ROOT 322
+#define IMX8MP_CLK_SAI2_ROOT 323
+#define IMX8MP_CLK_SAI3_ROOT 324
+#define IMX8MP_CLK_SAI5_ROOT 325
+#define IMX8MP_CLK_SAI6_ROOT 326
+#define IMX8MP_CLK_SAI7_ROOT 327
+#define IMX8MP_CLK_PDM_ROOT328
+#define IMX8MP_CLK_MEDIA_LDB_ROOT 329
+#define IMX8MP_CLK_END 330
#define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1
--
2.39.2
Re: [PATCH 3/3] arm: dts: imx8mp: Sync with Linux 6.3
On Tue, May 30, 2023 at 1:40 PM Tim Harvey wrote:
>
> On Tue, May 30, 2023 at 10:28 AM Adam Ford wrote:
> >
> > On Tue, May 30, 2023 at 12:23 PM Tim Harvey wrote:
> > >
> > > On Mon, May 29, 2023 at 10:45 AM Adam Ford wrote:
> > > >
> > > > On Wed, May 24, 2023 at 9:02 PM Fabio Estevam
> > > > wrote:
> > > > >
> > > > > Hi Tim,
> > > > >
> > > > > On Fri, May 19, 2023 at 8:00 PM Tim Harvey
> > > > > wrote:
> > > > >
> > > > > > Fabio,
> > > >
> > > > + Marek
> > > > I am adding Marek since he did the HSIO power domain driver.
> > > >
> > > > > >
> > > > > > There's more to be done here also. With this patch, and with the
> > > > > > spba-bus added to u-boot.dtsi, if you try to enable usb (usb start)
> > > > > > you get:
> > > > > > starting USB...
> > > > > > Bus usb@3820:
> > > > > > Enable clock-controller@3038 failed
> > > > > > probe failed, error -2
> > > > > > No working controllers found
> > > > >
> > > > > Does this help?
> > > >
> > > > A bit. I finally got some time to try to troubleshoot USB on my 8MP.
> > > >
> > > > >
> > > > > --- a/drivers/clk/imx/clk-imx8mp.c
> > > > > +++ b/drivers/clk/imx/clk-imx8mp.c
> > > > > @@ -337,8 +337,8 @@ static int imx8mp_clk_probe(struct udevice *dev)
> > > > > clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk",
> > > > > "uart2", base + 0x44a0, 0));
> > > > > clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk",
> > > > > "uart3", base + 0x44b0, 0));
> > > > > clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk",
> > > > > "uart4", base + 0x44c0, 0));
> > > > > - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> > > > > "usb_core_ref", base + 0x44d0, 0));
> > > > > - clk_dm(IMX8MP_CLK_USB_PHY_ROOT,
> > > >
> > > > IMX8MP_CLK_USB_PHY_ROOT is also referenced in the device tree, so I
> > > > don't think we can delete it. I had keep IMX8MP_CLK_USB_ROOT, and
> > > > IMX8MP_CLK_USB_PHY_ROOT while also adding IMX8MP_CLK_USB_SUSP.
> > > >
> > > > > imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0));
> > > > > + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> > > > > "hsio_axi", base + 0x44d0, 0));
> > > > > + clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate4("usb_suspend_clk",
> > > > > "osc_32k", base + 0x44d0, 0));
> > > > > clk_dm(IMX8MP_CLK_USDHC1_ROOT,
> > > > > imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0));
> > > > > clk_dm(IMX8MP_CLK_USDHC2_ROOT,
> > > > > imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0));
> > > > > clk_dm(IMX8MP_CLK_WDOG1_ROOT, imx_clk_gate4("wdog1_root_clk",
> > > > > "wdog", base + 0x4530, 0));
> > > >
> > > > At this point, the missing clock errors go away, but it hangs. I
> > > > updated my 8MP USB clocks based on the latest Linux kernel so my
> > > > clocks looks like:
> > > >
> > > > clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate2("usb_root_clk", "hsio_axi",
> > > > base + 0x44d0, 0));
> > > > clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate2("usb_suspend_clk",
> > > > "clock-osc-24m", base + 0x44d0, 0));
> > > > clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk",
> > > > "usb_phy_ref", base + 0x44f0, 0));
> > > >
> > > > The linux kernel uses gate2 for USB_ROOT and USB_SUSP while gate4 is
> > > > used for IMX8MP_CLK_USB_PHY_ROOT. I didn't verify this against the
> > > > reference manual.
> > > >
> > > > With some debugging enabled, it looks to me like it might be
> > > > power-domain related, but I am not 100% certain.
> > > > When I start the USB, it appears to go through some clocks, and start
> > > > on
Re: [PATCH 3/3] arm: dts: imx8mp: Sync with Linux 6.3
On Tue, May 30, 2023 at 12:23 PM Tim Harvey wrote:
>
> On Mon, May 29, 2023 at 10:45 AM Adam Ford wrote:
> >
> > On Wed, May 24, 2023 at 9:02 PM Fabio Estevam wrote:
> > >
> > > Hi Tim,
> > >
> > > On Fri, May 19, 2023 at 8:00 PM Tim Harvey wrote:
> > >
> > > > Fabio,
> >
> > + Marek
> > I am adding Marek since he did the HSIO power domain driver.
> >
> > > >
> > > > There's more to be done here also. With this patch, and with the
> > > > spba-bus added to u-boot.dtsi, if you try to enable usb (usb start)
> > > > you get:
> > > > starting USB...
> > > > Bus usb@3820:
> > > > Enable clock-controller@3038 failed
> > > > probe failed, error -2
> > > > No working controllers found
> > >
> > > Does this help?
> >
> > A bit. I finally got some time to try to troubleshoot USB on my 8MP.
> >
> > >
> > > --- a/drivers/clk/imx/clk-imx8mp.c
> > > +++ b/drivers/clk/imx/clk-imx8mp.c
> > > @@ -337,8 +337,8 @@ static int imx8mp_clk_probe(struct udevice *dev)
> > > clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk",
> > > "uart2", base + 0x44a0, 0));
> > > clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk",
> > > "uart3", base + 0x44b0, 0));
> > > clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk",
> > > "uart4", base + 0x44c0, 0));
> > > - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> > > "usb_core_ref", base + 0x44d0, 0));
> > > - clk_dm(IMX8MP_CLK_USB_PHY_ROOT,
> >
> > IMX8MP_CLK_USB_PHY_ROOT is also referenced in the device tree, so I
> > don't think we can delete it. I had keep IMX8MP_CLK_USB_ROOT, and
> > IMX8MP_CLK_USB_PHY_ROOT while also adding IMX8MP_CLK_USB_SUSP.
> >
> > > imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0));
> > > + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> > > "hsio_axi", base + 0x44d0, 0));
> > > + clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate4("usb_suspend_clk",
> > > "osc_32k", base + 0x44d0, 0));
> > > clk_dm(IMX8MP_CLK_USDHC1_ROOT,
> > > imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0));
> > > clk_dm(IMX8MP_CLK_USDHC2_ROOT,
> > > imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0));
> > > clk_dm(IMX8MP_CLK_WDOG1_ROOT, imx_clk_gate4("wdog1_root_clk",
> > > "wdog", base + 0x4530, 0));
> >
> > At this point, the missing clock errors go away, but it hangs. I
> > updated my 8MP USB clocks based on the latest Linux kernel so my
> > clocks looks like:
> >
> > clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate2("usb_root_clk", "hsio_axi",
> > base + 0x44d0, 0));
> > clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate2("usb_suspend_clk",
> > "clock-osc-24m", base + 0x44d0, 0));
> > clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk",
> > "usb_phy_ref", base + 0x44f0, 0));
> >
> > The linux kernel uses gate2 for USB_ROOT and USB_SUSP while gate4 is
> > used for IMX8MP_CLK_USB_PHY_ROOT. I didn't verify this against the
> > reference manual.
> >
> > With some debugging enabled, it looks to me like it might be
> > power-domain related, but I am not 100% certain.
> > When I start the USB, it appears to go through some clocks, and start
> > one power domain, but I think we have a power-domain chain where one
> > power domain starts another. I saw a patch on another thread for
> > enabling parent power-domains, but it didn't seem to help me.
> >
> > u-boot=> usb start
> > starting USB...
> > Bus usb@3820: ofnode_read_prop: maximum-speed:
> > ofnode_read_prop: dr_mode: host
> > dev_power_domain_on usb@32f10108
> > ofnode_read_prop: assigned-clock-rates:
> > Looking for clock-controller@3038
> > Looking for clock-controller@3038
> >- result for clock-controller@3038: clock-controller@3038 (ret=0)
> >- result for clock-controller@3038: clock-controller@3038 (ret=0)
> > Looking for clock-controller@3038
> > Looking for clock-controller@3038
> >- result for clock-controller@3038: clock-controller@3038 (ret=0)
> >- result for clock-controller@3038: clock-controller@3038 (ret=0)
> > ofnode_read_prop: dr_mode: host
> >
> >
> >
> > I added some debug code to the imx8mp_hsiomix_on in HSIOmix power
> > domain driver, and it doesn't appear to be getting called, yet
> > dev_power_domain_on usb@32f10108 should be invoking it.
> >
> > I am not positive it's a power domain issue, that's my first guess.
> >
> >
> > Tim - have you had any success?
> >
>
> Adam,
>
> No success here yet but I don't have any time to work on it for at
> least another week.
No worries. I'll try to spend some more time this week, and keep you
informed of any progress. I'd like to see the USB working too.
adam
>
> Best Regards,
>
> Tim
[PATCH] arm64: imx: imx8mp-beacon: Enable LTO
With LTO enabled, SPL shrinks about 10K and U-Boot shrinks about 30K. Signed-off-by: Adam Ford diff --git a/configs/imx8mp_beacon_defconfig b/configs/imx8mp_beacon_defconfig index e8ddd537c0..86d0de3a30 100644 --- a/configs/imx8mp_beacon_defconfig +++ b/configs/imx8mp_beacon_defconfig @@ -34,6 +34,7 @@ CONFIG_ARMV8_EA_EL3_FIRST=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x4800 CONFIG_SYS_LOAD_ADDR=0x4048 CONFIG_SYS_MONITOR_LEN=524288 +CONFIG_LTO=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 -- 2.39.2
Re: [PATCH 3/3] arm: dts: imx8mp: Sync with Linux 6.3
On Wed, May 24, 2023 at 9:02 PM Fabio Estevam wrote:
>
> Hi Tim,
>
> On Fri, May 19, 2023 at 8:00 PM Tim Harvey wrote:
>
> > Fabio,
+ Marek
I am adding Marek since he did the HSIO power domain driver.
> >
> > There's more to be done here also. With this patch, and with the
> > spba-bus added to u-boot.dtsi, if you try to enable usb (usb start)
> > you get:
> > starting USB...
> > Bus usb@3820:
> > Enable clock-controller@3038 failed
> > probe failed, error -2
> > No working controllers found
>
> Does this help?
A bit. I finally got some time to try to troubleshoot USB on my 8MP.
>
> --- a/drivers/clk/imx/clk-imx8mp.c
> +++ b/drivers/clk/imx/clk-imx8mp.c
> @@ -337,8 +337,8 @@ static int imx8mp_clk_probe(struct udevice *dev)
> clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk",
> "uart2", base + 0x44a0, 0));
> clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk",
> "uart3", base + 0x44b0, 0));
> clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk",
> "uart4", base + 0x44c0, 0));
> - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> "usb_core_ref", base + 0x44d0, 0));
> - clk_dm(IMX8MP_CLK_USB_PHY_ROOT,
IMX8MP_CLK_USB_PHY_ROOT is also referenced in the device tree, so I
don't think we can delete it. I had keep IMX8MP_CLK_USB_ROOT, and
IMX8MP_CLK_USB_PHY_ROOT while also adding IMX8MP_CLK_USB_SUSP.
> imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0));
> + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk",
> "hsio_axi", base + 0x44d0, 0));
> + clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate4("usb_suspend_clk",
> "osc_32k", base + 0x44d0, 0));
> clk_dm(IMX8MP_CLK_USDHC1_ROOT,
> imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0));
> clk_dm(IMX8MP_CLK_USDHC2_ROOT,
> imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0));
> clk_dm(IMX8MP_CLK_WDOG1_ROOT, imx_clk_gate4("wdog1_root_clk",
> "wdog", base + 0x4530, 0));
At this point, the missing clock errors go away, but it hangs. I
updated my 8MP USB clocks based on the latest Linux kernel so my
clocks looks like:
clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate2("usb_root_clk", "hsio_axi",
base + 0x44d0, 0));
clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate2("usb_suspend_clk",
"clock-osc-24m", base + 0x44d0, 0));
clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk",
"usb_phy_ref", base + 0x44f0, 0));
The linux kernel uses gate2 for USB_ROOT and USB_SUSP while gate4 is
used for IMX8MP_CLK_USB_PHY_ROOT. I didn't verify this against the
reference manual.
With some debugging enabled, it looks to me like it might be
power-domain related, but I am not 100% certain.
When I start the USB, it appears to go through some clocks, and start
one power domain, but I think we have a power-domain chain where one
power domain starts another. I saw a patch on another thread for
enabling parent power-domains, but it didn't seem to help me.
u-boot=> usb start
starting USB...
Bus usb@3820: ofnode_read_prop: maximum-speed:
ofnode_read_prop: dr_mode: host
dev_power_domain_on usb@32f10108
ofnode_read_prop: assigned-clock-rates:
Looking for clock-controller@3038
Looking for clock-controller@3038
- result for clock-controller@3038: clock-controller@3038 (ret=0)
- result for clock-controller@3038: clock-controller@3038 (ret=0)
Looking for clock-controller@3038
Looking for clock-controller@3038
- result for clock-controller@3038: clock-controller@3038 (ret=0)
- result for clock-controller@3038: clock-controller@3038 (ret=0)
ofnode_read_prop: dr_mode: host
I added some debug code to the imx8mp_hsiomix_on in HSIOmix power
domain driver, and it doesn't appear to be getting called, yet
dev_power_domain_on usb@32f10108 should be invoking it.
I am not positive it's a power domain issue, that's my first guess.
Tim - have you had any success?
adam
[PATCH 3/5] imx: imx8mn-beacon: Move environment definition to env file
Instead of cluttering up a header file with a bunch of defines,
move the default environmental variables to a file called
imx8mn_beacon.env and reference it from the defconfigs.
Signed-off-by: Adam Ford
---
board/beacon/imx8mn/imx8mn_beacon.env | 25 +++
configs/imx8mn_beacon_2g_defconfig| 1 +
configs/imx8mn_beacon_defconfig | 1 +
configs/imx8mn_beacon_fspi_defconfig | 1 +
include/configs/imx8mn_beacon.h | 61 ---
5 files changed, 28 insertions(+), 61 deletions(-)
create mode 100644 board/beacon/imx8mn/imx8mn_beacon.env
diff --git a/board/beacon/imx8mn/imx8mn_beacon.env
b/board/beacon/imx8mn/imx8mn_beacon.env
new file mode 100644
index 00..ca90053d47
--- /dev/null
+++ b/board/beacon/imx8mn/imx8mn_beacon.env
@@ -0,0 +1,25 @@
+boot_fdt=try
+bootdelay=2
+bootscript=echo Running bootscript from mmc ...; source
+console=ttymxc1
+fdt_addr=0x4500
+fdt_file=imx8mn-beacon-kit.dtb
+finduuid=part uuid mmc ${mmcdev}:2 uuid
+image=Image
+initrd_addr=0x4600
+loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};
+loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}
+loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}
+loadramdisk=load mmc ${mmcdev} ${ramdisk_addr} ${ramdiskimage}
+mmcargs=setenv bootargs console=${console},${baudrate} root=PARTUUID=${uuid}
rootwait rw ${mtdparts} ${optargs}
+mmcautodetect=yes
+mmcboot=echo Booting from mmc ...; run finduuid; run mmcargs; if test
${boot_fdt} = yes || test ${boot_fdt} = try; then if run loadfdt; then booti
${loadaddr} - ${fdt_addr}; else echo WARN: Cannot load the DT; fi; else echo
wait for boot; fi;
+mmcdev=1
+mmcpart=1
+netargs=setenv bootargs console=${console},${baudrate} root=/dev/nfs ip=dhcp
nfsroot=${serverip}:${nfsroot},v3,tcp
+netboot=echo Booting from net ...; run netargs; if test ${ip_dyn} = yes; then
setenv get_cmd dhcp; else setenv get_cmd tftp; fi; ${get_cmd} ${loadaddr}
${image}; if test ${boot_fdt} = yes || test ${boot_fdt} = try; then if
${get_cmd} ${fdt_addr} ${fdt_file}; then booti ${loadaddr} - ${fdt_addr}; else
echo WARN: Cannot load the DT; fi; else booti; fi;
+ramargs=setenv bootargs console=${console},${baudrate} root=/dev/ram rw
${optargs}
+ramboot=echo Booting from RAMdisk...; run loadimage; run loadfdt; fdt addr
$fdt_addr; run loadramdisk; run ramargs; booti ${loadaddr} ${ramdisk_addr}
${fdt_addr} ${optargs}
+ramdisk_addr=0x4600
+ramdiskimage=rootfs.cpio.uboot
+script=boot.scr
diff --git a/configs/imx8mn_beacon_2g_defconfig
b/configs/imx8mn_beacon_2g_defconfig
index c87cdd6516..8f8194adf7 100644
--- a/configs/imx8mn_beacon_2g_defconfig
+++ b/configs/imx8mn_beacon_2g_defconfig
@@ -5,6 +5,7 @@ CONFIG_SYS_MALLOC_LEN=0x200
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SOURCE_FILE="imx8mn_beacon"
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=4000
CONFIG_ENV_SIZE=0x2000
diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig
index d68c1207cd..098c9a86e3 100644
--- a/configs/imx8mn_beacon_defconfig
+++ b/configs/imx8mn_beacon_defconfig
@@ -5,6 +5,7 @@ CONFIG_SYS_MALLOC_LEN=0x200
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SOURCE_FILE="imx8mn_beacon"
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=4000
CONFIG_ENV_SIZE=0x2000
diff --git a/configs/imx8mn_beacon_fspi_defconfig
b/configs/imx8mn_beacon_fspi_defconfig
index ecd383a896..5335fe73a6 100644
--- a/configs/imx8mn_beacon_fspi_defconfig
+++ b/configs/imx8mn_beacon_fspi_defconfig
@@ -5,6 +5,7 @@ CONFIG_SYS_MALLOC_LEN=0x200
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SOURCE_FILE="imx8mn_beacon"
CONFIG_NR_DRAM_BANKS=1
CONFIG_SF_DEFAULT_SPEED=4000
CONFIG_ENV_SIZE=0x2000
diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h
index 1880d0311e..699e209044 100644
--- a/include/configs/imx8mn_beacon.h
+++ b/include/configs/imx8mn_beacon.h
@@ -12,67 +12,6 @@
#define CFG_SYS_UBOOT_BASE \
(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
-/* Initial environment variables */
-#define CFG_EXTRA_ENV_SETTINGS \
- "script=boot.scr\0" \
- "image=Image\0" \
- "ramdiskimage=rootfs.cpio.uboot\0" \
- "console=ttymxc1,115200\0" \
- "fdt_addr=0x4300\0" \
- "ramdisk_addr=0x4400\0" \
- "boot_fdt=try\0" \
- "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
- "initrd_addr=0x4380\0" \
- "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
- "mmcpart=1\0" \
- "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
- "mmcautodetect=yes\0" \
-
[PATCH 4/5] imx8m: imx8mn-beacon: Migrate README to rst
Since U-Boot builds HTML documentation, migrate the contents of the README file to an rst file which can generate the proper outputs. Signed-off-by: Adam Ford --- board/beacon/imx8mn/README | 38 - doc/board/beacon/beacon-imx8mn.rst | 53 ++ doc/board/beacon/index.rst | 1 + 3 files changed, 54 insertions(+), 38 deletions(-) delete mode 100644 board/beacon/imx8mn/README create mode 100644 doc/board/beacon/beacon-imx8mn.rst diff --git a/board/beacon/imx8mn/README b/board/beacon/imx8mn/README deleted file mode 100644 index 49da03c8d8..00 --- a/board/beacon/imx8mn/README +++ /dev/null @@ -1,38 +0,0 @@ -U-Boot for the Beacon EmbeddedWorks i.MX8M Nano Devkit - -Quick Start -=== -- Build the ARM Trusted firmware binary -- Get ddr firmware -- Build U-Boot -- Boot - -Get and Build the ARM Trusted firmware -== -Note: $(srctree) is U-Boot source directory - -$ git clone https://github.com/nxp-imx/imx-atf -$ git lf-5.10.72-2.2.0 -$ make PLAT=imx8mn bl31 CROSS_COMPILE=aarch64-linux-gnu- -$ cp build/imx8mn/release/bl31.bin $(srctree) - -Get the DDR firmware - -$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin -$ chmod +x firmware-imx-8.9.bin -$ ./firmware-imx-8.9 -$ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin $(srctree) - -Build U-Boot - -$ make imx8mn_beacon_defconfig -$ make CROSS_COMPILE=aarch64-linux-gnu- - -Burn U-Boot to microSD Card -=== -$ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 - -Boot - -Set baseboard DIP switch: -S17: 1100 diff --git a/doc/board/beacon/beacon-imx8mn.rst b/doc/board/beacon/beacon-imx8mn.rst new file mode 100644 index 00..bb4a86369b --- /dev/null +++ b/doc/board/beacon/beacon-imx8mn.rst @@ -0,0 +1,53 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for the Beacon EmbeddedWorks i.MX8M Nano Devkit +== + +Quick Start +--- + +- Build the ARM Trusted firmware binary +- Get DDR firmware +- Build U-Boot +- Burn U-Boot to microSD Card +- Boot + +Get and Build the ARM Trusted firmware +-- + +.. code-block:: bash + +$ git clone https://github.com/nxp-imx/imx-atf.git -b v2.6 +$ make PLAT=imx8mn bl31 CROSS_COMPILE=aarch64-linux-gnu- +$ cp build/imx8mn/release/bl31.bin ../ + +Get the DDR firmware + + +.. code-block:: bash + +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.15.bin +$ chmod +x firmware-imx-8.15.bin +$ ./firmware-imx-8.15 +$ cp firmware-imx-8.15/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot + + +.. code-block:: bash + +$ make imx8mn_beacon_defconfig +$ make CROSS_COMPILE=aarch64-linux-gnu- + +Burn U-Boot to microSD Card +--- + +.. code-block:: bash + +$ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 + +Boot + + +Set baseboard DIP switches for micoSD Card: +S17 (1:8): 1100 diff --git a/doc/board/beacon/index.rst b/doc/board/beacon/index.rst index 8eba5e81cd..bf62b09fba 100644 --- a/doc/board/beacon/index.rst +++ b/doc/board/beacon/index.rst @@ -8,3 +8,4 @@ Beacon beacon-imx8mp beacon-imx8mm + beacon-imx8mn -- 2.39.2
[PATCH 5/5] imx8m: beacon: Update MAINTAINER file to include beacon rst files
With variou README files migrated to rst, add them to the MAINTAINER file for Beacon. Signed-off-by: Adam Ford --- board/beacon/imx8mm/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/beacon/imx8mm/MAINTAINERS b/board/beacon/imx8mm/MAINTAINERS index e887db20a2..d48ba8605b 100644 --- a/board/beacon/imx8mm/MAINTAINERS +++ b/board/beacon/imx8mm/MAINTAINERS @@ -5,3 +5,4 @@ S: Maintained F: board/beacon/imx8mm/ F: include/configs/imx8mm_beacon.h F: configs/imx8mm_beacon_defconfig +F: doc/board/beacon/ -- 2.39.2
[PATCH 1/5] imx: imx8mm-beacon: Move environment definition to env file
Instead of cluttering up a header file with a bunch of defines,
move the default environmental variables to a file called
imx8mm_beacon.env and reference it from the defconfig.
Signed-off-by: Adam Ford
---
board/beacon/imx8mm/imx8mm_beacon.env | 19 ++
configs/imx8mm_beacon_defconfig | 1 +
include/configs/imx8mm_beacon.h | 50 ---
3 files changed, 20 insertions(+), 50 deletions(-)
create mode 100644 board/beacon/imx8mm/imx8mm_beacon.env
diff --git a/board/beacon/imx8mm/imx8mm_beacon.env
b/board/beacon/imx8mm/imx8mm_beacon.env
new file mode 100644
index 00..00bf67edd5
--- /dev/null
+++ b/board/beacon/imx8mm/imx8mm_beacon.env
@@ -0,0 +1,19 @@
+boot_fit=try
+bootscript=echo Running bootscript from mmc ...; source
+console=ttymxc1
+fdt_addr=0x4500
+fdt_file=imx8mm-beacon-kit.dtb
+finduuid=part uuid mmc ${mmcdev}:2 uuid
+image=Image
+initrd_addr=0x4600
+loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};
+loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}
+loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}
+mmcargs=setenv bootargs console=${console},${baudrate} root=PARTUUID=${uuid}
rootwait rw ${mtdparts} ${optargs}
+mmcautodetect=yes
+mmcboot=echo Booting from mmc ...; run finduuid; run mmcargs; if run loadfdt;
then booti ${loadaddr} - ${fdt_addr}; else echo WARN: Cannot load the DT; fi;
+netargs=setenv bootargs console=${console},${baudrate} root=/dev/nfs ip=dhcp
nfsroot=${serverip}:${nfsroot},v3,tcp
+mmcdev=1
+mmcpart=1
+netboot=echo Booting from net ...; run netargs; if test ${ip_dyn} = yes; then
setenv get_cmd dhcp; else setenv get_cmd tftp; fi; ${get_cmd} ${loadaddr}
${image}; if test ${boot_fit} = yes || test ${boot_fit} = try; then bootm
${loadaddr}; else if ${get_cmd} ${fdt_addr} ${fdt_file}; then booti ${loadaddr}
- ${fdt_addr}; else echo WARN: Cannot load the DT; fi; fi;
+script=boot.scr
diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig
index 597fe256d0..c049db32c1 100644
--- a/configs/imx8mm_beacon_defconfig
+++ b/configs/imx8mm_beacon_defconfig
@@ -5,6 +5,7 @@ CONFIG_SYS_MALLOC_LEN=0x200
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SOURCE_FILE="imx8mm_beacon"
CONFIG_SF_DEFAULT_SPEED=1000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xDE00
diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h
index d85ae21e23..c8dab91f61 100644
--- a/include/configs/imx8mm_beacon.h
+++ b/include/configs/imx8mm_beacon.h
@@ -19,56 +19,6 @@
#endif
-/* Initial environment variables */
-#define CFG_EXTRA_ENV_SETTINGS \
- "script=boot.scr\0" \
- "image=Image\0" \
- "console=ttymxc1,115200\0" \
- "fdt_addr=0x4300\0" \
- "boot_fit=try\0" \
- "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
- "initrd_addr=0x4380\0" \
- "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
- "mmcpart=1\0" \
- "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
- "mmcautodetect=yes\0" \
- "mmcargs=setenv bootargs console=${console},${baudrate}" \
- " root=PARTUUID=${uuid} rootwait rw ${mtdparts} ${optargs}\0" \
- "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
- " ${script};\0" \
- "bootscript=echo Running bootscript from mmc ...; " \
- "source\0" \
- "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
- "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
- "mmcboot=echo Booting from mmc ...; " \
- "run finduuid; " \
- "run mmcargs; " \
- "if run loadfdt; then " \
- "booti ${loadaddr} - ${fdt_addr}; " \
- "else " \
- "echo WARN: Cannot load the DT; " \
- "fi; " \
- "netargs=setenv bootargs console=${console} " \
- "root=/dev/nfs " \
- "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
- "netboot=echo Booting from net ...; " \
- "run netargs; " \
- "if test ${ip_dyn} = yes; then " \
- "setenv get_cmd dhcp; " \
- "else " \
- "setenv get_cmd tftp; " \
- "fi; " \
- "${get_cmd} ${loadaddr} ${image}; " \
- "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
- "bo
[PATCH 2/5] imx8m: imx8mm-beacon: Migrate README to rst
Since U-Boot builds HTML documentation, migrate the contents of the README file to an rst file which can generate the proper outputs. Signed-off-by: Adam Ford --- board/beacon/imx8mm/README | 37 doc/board/beacon/beacon-imx8mm.rst | 55 ++ doc/board/beacon/index.rst | 1 + 3 files changed, 56 insertions(+), 37 deletions(-) delete mode 100644 board/beacon/imx8mm/README create mode 100644 doc/board/beacon/beacon-imx8mm.rst diff --git a/board/beacon/imx8mm/README b/board/beacon/imx8mm/README deleted file mode 100644 index 32b24bc03e..00 --- a/board/beacon/imx8mm/README +++ /dev/null @@ -1,37 +0,0 @@ -U-Boot for the Beacon EmbeddedWorks Devkit - -Quick Start -=== -- Build the ARM Trusted firmware binary -- Get ddr firmware -- Build U-Boot -- Boot - -Get and Build the ARM Trusted firmware -== -Note: $(srctree) is U-Boot source directory - -$ git clone https://github.com/nxp-imx/imx-atf -$ git lf-5.10.72-2.2.0 -$ make PLAT=imx8mm bl31 CROSS_COMPILE=aarch64-linux-gnu- -$ cp build/imx8mm/release/bl31.bin $(srctree) - -Get the DDR firmware - -$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin -$ chmod +x firmware-imx-8.9.bin -$ ./firmware-imx-8.9 -$ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin $(srctree) - -Build U-Boot - -$ make imx8mm_beacon_defconfig -$ make CROSS_COMPILE=aarch64-linux-gnu- - -Burn U-Boot to microSD Card -=== -$ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 - -Boot - -Set Boot switch to SD boot diff --git a/doc/board/beacon/beacon-imx8mm.rst b/doc/board/beacon/beacon-imx8mm.rst new file mode 100644 index 00..8bf983bff7 --- /dev/null +++ b/doc/board/beacon/beacon-imx8mm.rst @@ -0,0 +1,55 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for the Beacon EmbeddedWorks i.MX8M Mini Devkit +== + +Quick Start +--- + +- Build the ARM Trusted firmware binary +- Get DDR firmware +- Build U-Boot +- Burn U-Boot to microSD Card +- Boot + +Get and Build the ARM Trusted firmware +-- + +.. code-block:: bash + +$ git clone https://github.com/nxp-imx/imx-atf.git -b v2.6 +$ make PLAT=imx8mm bl31 CROSS_COMPILE=aarch64-linux-gnu- +$ cp build/imx8mm/release/bl31.bin ../ + +Get the DDR firmware + + +.. code-block:: bash + +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.15.bin +$ chmod +x firmware-imx-8.15.bin +$ ./firmware-imx-8.15 +$ cp firmware-imx-8.15/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot + + +.. code-block:: bash + +$ make imx8mm_beacon_defconfig +$ make CROSS_COMPILE=aarch64-linux-gnu- + +Burn U-Boot to microSD Card +--- + +.. code-block:: bash + +$ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 + +Boot + + +Set baseboard DIP switches for micoSD Card: +- S11 (1:8) 01101000 +- S10 (1:8) 11001000 +- S17 (1:8) 0110 diff --git a/doc/board/beacon/index.rst b/doc/board/beacon/index.rst index 1fe1046a4c..8eba5e81cd 100644 --- a/doc/board/beacon/index.rst +++ b/doc/board/beacon/index.rst @@ -7,3 +7,4 @@ Beacon :maxdepth: 2 beacon-imx8mp + beacon-imx8mm -- 2.39.2
Re: [PATCH 3/3] arm: dts: imx8mp: Sync with Linux 6.3
On Mon, May 22, 2023 at 3:49 PM Fabio Estevam wrote: > > Hi Tim, > > On Fri, May 19, 2023 at 8:00 PM Tim Harvey wrote: > > > Fabio, > > > > There's more to be done here also. With this patch, and with the > > spba-bus added to u-boot.dtsi, if you try to enable usb (usb start) > > you get: > > starting USB... > > Bus usb@3820: > > Enable clock-controller@3038 failed > > probe failed, error -2 > > No working controllers found > > > > So until we get this figured out please don't apply this. > > I don't have any imx8mp-based board here to debug this problem, so it > would be nice > if someone else could investigate this. I can do some testing on the imx8mp-beacon board, but it will likely be a few days before I can get to it. adam > > Thanks
Re: [PATCH 3/3] arm: dts: imx8mp: Sync with Linux 6.3
On Fri, May 19, 2023 at 5:34 PM Tim Harvey wrote:
>
> On Fri, May 19, 2023 at 3:31 PM Tim Harvey wrote:
> >
> > On Fri, May 19, 2023 at 3:27 PM Adam Ford wrote:
> > >
> > > On Fri, May 19, 2023 at 5:19 PM Tim Harvey wrote:
> > > >
> > > > On Wed, May 3, 2023 at 9:11 AM Tim Harvey wrote:
> > > > >
> > > > > On Thu, Apr 27, 2023 at 11:09 AM Fabio Estevam
> > > > > wrote:
> > > > > >
> > > > > > From: Fabio Estevam
> > > > > >
> > > > > > Sync imx8mp.dtsi and imx8mp-clock.h with Linux 6.3.
> > > > > >
> > > > > > Signed-off-by: Fabio Estevam
> > > > > > ---
> > > > > > arch/arm/dts/imx8mp.dtsi | 374
> > > > > > ---
> > > > > > include/dt-bindings/clock/imx8mp-clock.h | 14 +-
> > > > > > 2 files changed, 270 insertions(+), 118 deletions(-)
> > > > > >
> > > > > > diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi
> > > > > > index bb916a0948a8..a237275ee017 100644
> > > > > > --- a/arch/arm/dts/imx8mp.dtsi
> > > > > > +++ b/arch/arm/dts/imx8mp.dtsi
> > > > > > @@ -123,6 +123,7 @@
> > > > > >
> > > > > > A53_L2: l2-cache0 {
> > > > > > compatible = "cache";
> > > > > > + cache-unified;
> > > > > > cache-level = <2>;
> > > > > > cache-size = <0x8>;
> > > > > > cache-line-size = <64>;
> > > > > > @@ -379,6 +380,8 @@
> > > > > > compatible = "fsl,imx8mp-tmu";
> > > > > > reg = <0x3026 0x1>;
> > > > > > clocks = <
> > > > > > IMX8MP_CLK_TSENSOR_ROOT>;
> > > > > > + nvmem-cells = <_calib>;
> > > > > > + nvmem-cell-names = "calib";
> > > > > > #thermal-sensor-cells = <1>;
> > > > > > };
> > > > > >
> > > > > > @@ -411,7 +414,7 @@
> > > > > > reg = <0x3033 0x1>;
> > > > > > };
> > > > > >
> > > > > > - gpr: iomuxc-gpr@3034 {
> > > > > > + gpr: syscon@3034 {
> > > > > > compatible =
> > > > > > "fsl,imx8mp-iomuxc-gpr", "syscon";
> > > > > > reg = <0x3034 0x1>;
> > > > > > };
> > > > > > @@ -424,27 +427,44 @@
> > > > > > #address-cells = <1>;
> > > > > > #size-cells = <1>;
> > > > > >
> > > > > > - imx8mp_uid: unique-id@420 {
> > > > > > + /*
> > > > > > +* The register address below maps
> > > > > > to the MX8M
> > > > > > +* Fusemap Description Table
> > > > > > entries this way.
> > > > > > +* Assuming
> > > > > > +* reg = ;
> > > > > > +* then
> > > > > > +* Fuse Address = (ADDR * 4) +
> > > > > > 0x400
> > > > > > +* Note that if SIZE is greater
> > > > > > than 4, then
> > > > > > +* each subsequent fuse is located
> > > > > > at offset
> > > > > > +* +0x10 in Fusemap Description
> > > > > > Table (e.g.
> > > > > > +* reg = <0x8 0x8> describes fuses
>
Re: [PATCH 3/3] arm: dts: imx8mp: Sync with Linux 6.3
On Fri, May 19, 2023 at 5:19 PM Tim Harvey wrote:
>
> On Wed, May 3, 2023 at 9:11 AM Tim Harvey wrote:
> >
> > On Thu, Apr 27, 2023 at 11:09 AM Fabio Estevam wrote:
> > >
> > > From: Fabio Estevam
> > >
> > > Sync imx8mp.dtsi and imx8mp-clock.h with Linux 6.3.
> > >
> > > Signed-off-by: Fabio Estevam
> > > ---
> > > arch/arm/dts/imx8mp.dtsi | 374 ---
> > > include/dt-bindings/clock/imx8mp-clock.h | 14 +-
> > > 2 files changed, 270 insertions(+), 118 deletions(-)
> > >
> > > diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi
> > > index bb916a0948a8..a237275ee017 100644
> > > --- a/arch/arm/dts/imx8mp.dtsi
> > > +++ b/arch/arm/dts/imx8mp.dtsi
> > > @@ -123,6 +123,7 @@
> > >
> > > A53_L2: l2-cache0 {
> > > compatible = "cache";
> > > + cache-unified;
> > > cache-level = <2>;
> > > cache-size = <0x8>;
> > > cache-line-size = <64>;
> > > @@ -379,6 +380,8 @@
> > > compatible = "fsl,imx8mp-tmu";
> > > reg = <0x3026 0x1>;
> > > clocks = < IMX8MP_CLK_TSENSOR_ROOT>;
> > > + nvmem-cells = <_calib>;
> > > + nvmem-cell-names = "calib";
> > > #thermal-sensor-cells = <1>;
> > > };
> > >
> > > @@ -411,7 +414,7 @@
> > > reg = <0x3033 0x1>;
> > > };
> > >
> > > - gpr: iomuxc-gpr@3034 {
> > > + gpr: syscon@3034 {
> > > compatible = "fsl,imx8mp-iomuxc-gpr",
> > > "syscon";
> > > reg = <0x3034 0x1>;
> > > };
> > > @@ -424,27 +427,44 @@
> > > #address-cells = <1>;
> > > #size-cells = <1>;
> > >
> > > - imx8mp_uid: unique-id@420 {
> > > + /*
> > > +* The register address below maps to the
> > > MX8M
> > > +* Fusemap Description Table entries this
> > > way.
> > > +* Assuming
> > > +* reg = ;
> > > +* then
> > > +* Fuse Address = (ADDR * 4) + 0x400
> > > +* Note that if SIZE is greater than 4,
> > > then
> > > +* each subsequent fuse is located at
> > > offset
> > > +* +0x10 in Fusemap Description Table
> > > (e.g.
> > > +* reg = <0x8 0x8> describes fuses 0x420
> > > and
> > > +* 0x430).
> > > +*/
> > > + imx8mp_uid: unique-id@8 { /* 0x420-0x430
> > > */
> > > reg = <0x8 0x8>;
> > > };
> > >
> > > - cpu_speed_grade: speed-grade@10 {
> > > + cpu_speed_grade: speed-grade@10 { /*
> > > 0x440 */
> > > reg = <0x10 4>;
> > > };
> > >
> > > - eth_mac1: mac-address@90 {
> > > + eth_mac1: mac-address@90 { /* 0x640 */
> > > reg = <0x90 6>;
> > > };
> > >
> > > - eth_mac2: mac-address@96 {
> > > + eth_mac2: mac-address@96 { /* 0x658 */
> > > reg = <0x96 6>;
> > > };
> > > +
> > > + tmu_calib: calib@264 { /* 0xd90-0xdc0 */
> > > + reg = <0x264 0x10>;
> > > + };
> > > };
> > >
> > > - anatop: anatop@3036 {
> > > - compatible = "fsl,imx8mp-anatop",
> > > "fsl,imx8mm-anatop",
> > > -"syscon";
> > > + anatop: clock-controller@3036 {
> > > + compatible = "fsl,imx8mp-anatop",
> > > "fsl,imx8mm-anatop";
> > > reg = <0x3036 0x1>;
> > > + #clock-cells = <1>;
> > > };
> > >
> > > snvs: snvs@3037 {
> > > @@ -523,6 +543,7 @@
> > > compatible = "fsl,imx8mp-gpc";
> > > reg =
Re: [PATCH 1/3] arm: dts: imx8mm: Sync with Linux 6.3
On Fri, Apr 28, 2023 at 11:26 AM Fabio Estevam wrote:
>
> Hi Tim,
>
> On Fri, Apr 28, 2023 at 12:48 PM Tim Harvey wrote:
>
> > Yes I think that is similar enough to test. In my experience simply
> > enabling otg2 via dt on imx8mm-evk shows the issue I see here but
> > Fabio says he sees a hang on 'usb start' even before this dt sync and
> > I don't know why my results on an imx8mm-evk differ.
>
> I started from scratch today and now our results match.
>
> Applied the following change against U-Boot master:
>
> diff --git a/arch/arm/dts/imx8mm-evk.dtsi b/arch/arm/dts/imx8mm-evk.dtsi
> index 7d6317d95b13..898639e33d5e 100644
> --- a/arch/arm/dts/imx8mm-evk.dtsi
> +++ b/arch/arm/dts/imx8mm-evk.dtsi
> @@ -417,6 +417,10 @@
> };
> };
>
> + {
> + status = "okay";
> +};
> +
> {
> assigned-clocks = < IMX8MM_CLK_USDHC2>;
> assigned-clock-rates = <2>;
> diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig
> index ab9ad41b4548..70c7a21f2d9f 100644
> --- a/configs/imx8mm_evk_defconfig
> +++ b/configs/imx8mm_evk_defconfig
> @@ -119,3 +119,4 @@ CONFIG_CI_UDC=y
> CONFIG_SDP_LOADADDR=0x4040
> CONFIG_USB_GADGET_DOWNLOAD=y
> CONFIG_IMX_WATCHDOG=y
> +CONFIG_CMD_USB=y
> --
> 2.34.1
>
> Running "usb start" does not hang.
>
> Running "ums 0 mmc 1", CTRL+C and then "ums 0 mmc 1" does not work (SD
> card is not mounted on PC on the second time).
>
> After applying the imx8mm.dtsi sync with kernel 6.3:
>
> Running "ums 0 mmc 1", CTRL+C and then "ums 0 mmc 1" works fine.
>
> "usb start" hangs.
>
> So, yes, I agree we cannot do the imx8mm.dtsi sync with 6.3 right now
> as we need to fix the USB hang first.
>
> If anyone has any ideas as to why syncing the commit below:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch/arm64/boot/dts/freescale/imx8mm.dtsi?h=v6.3=4585c79ff477f9517b7f384a4fce351417e8fa36
>
> causes issues in U-Boot, please let us know.
I am not in a place to test this as I am traveling, but I thought I'd
throw out an idea. The power-domain looks like it moved to the
usbphynop2 driver which has the compatible name of "usb-nop-xceiv"
Is there a a driver for this? Does it get enabled?
If not, maybe we could update the imx8mm-u-u-boot.dtsi to restore the
power-domains to a driver that is present.
adam
>
> Thanks
Re: [PATCH 1/3] arm: dts: imx8mm: Sync with Linux 6.3
On Fri, Apr 28, 2023 at 10:27 AM Tim Harvey wrote:
>
> On Fri, Apr 28, 2023 at 4:57 AM Adam Ford wrote:
> >
> > On Thu, Apr 27, 2023 at 5:25 PM Tim Harvey wrote:
> > >
> > > On Thu, Apr 27, 2023 at 12:49 PM Fabio Estevam wrote:
> > > >
> > > > On Thu, Apr 27, 2023 at 4:44 PM Tim Harvey
> > > > wrote:
> > > >
> > > > > Fabio,
> > > > >
> > > > > Sorry for the confusion.
> > > > >
> > > > > This imx8mm dt sync patch will hang on imx8mm boards that use 'both'
> > > > > usbotg1 and usbotg2. You can reproduce this hang on your imx8mm-evk by
> > > > > enabling usbotg2 in the dt (the board has it but it is not enabled due
> > > > > to the gpio based usb 3.0 mux not being sorted out yet):
> > > > > + {
> > > > > + dr_mode = "otg";
> > > > > + status = "okay";
> > > > > +};
> > > > > +
> > > > >
> > > > > u-boot=> usb start && usb tree
> > > > > starting USB...
> > > > > Bus usb@32e4: Bus usb@32e5:
> > > > > ^^^ imx8mm-evk hangs
> > > >
> > > > Yes, I can reproduce the hang, but it happens with or without the
> > > > imx8mm dt sync.
> > > >
> > >
> > > Fabio,
> > >
> > > I do 'not' see a hang on imx8mm-evk on 'usb start && usb tree' on
> > > master (my other issue was on a 'usb stop' but only with usb
> > > controllers in host mode).
> > >
> > > > This hang is a separate issue, not dt related, as far as I understand.
> > > >
> > > > The imx8mm dts sync does solve the issue of running 'ums' after CTRL+C.
> > >
> > > I don't agree. The hang 'is' related because all my imx8mm-venice-*
> > > boards which use 'both' USB controllers hang with this patch on a 'usb
> > > start' and don't hang without it. While a basic 'review' of the patch
> > > looks good but actual product testing shows issues. As a maintainer
> > > for ARM FREESCALE IMX you must have another imx8mm board which uses
> > > both usbotg devices to test against and verify you see what I see?
> > >
> > > Until we know what other fix is needed to go along with this:
> > > Nacked-by: Tim Harvey
> >
> > What is the harm is sync'ing the device tree with the kernel? I seemed
> > like you found a solution with the regulator patch. Did I
> > misunderstand that?
> >
> > adam
>
> Adam,
>
> No, the regulator patch did 'not' resolve the issue created by syncing
> the imx8mm dt (I caused confusion by responding to the wrong thread -
> the regulator patch resolved a different issue).
Ok.
>
> Could you please verify my results on a board that uses both usbotg1
> and usbotg2? What I see is on master + this imx8mm dt sync
> (specifically the changes from Linux commit 4585c79ff477f ("arm64:
> dts: imx8mm: correct usb power domains")) the board hangs on usb start
> when bringing up usbotg2.
I can, but I am about to board a plane to go visit some sick family,
but I'll try to do it early next week.
I have a board with both USB controllers enabled. My OTG2 is
host-only, so I think it's similar to your setup.
Should I apply the regulator patch when I test?
adam
>
> Best Regards,
>
> Tim
Re: [PATCH 1/3] arm: dts: imx8mm: Sync with Linux 6.3
On Thu, Apr 27, 2023 at 5:25 PM Tim Harvey wrote:
>
> On Thu, Apr 27, 2023 at 12:49 PM Fabio Estevam wrote:
> >
> > On Thu, Apr 27, 2023 at 4:44 PM Tim Harvey wrote:
> >
> > > Fabio,
> > >
> > > Sorry for the confusion.
> > >
> > > This imx8mm dt sync patch will hang on imx8mm boards that use 'both'
> > > usbotg1 and usbotg2. You can reproduce this hang on your imx8mm-evk by
> > > enabling usbotg2 in the dt (the board has it but it is not enabled due
> > > to the gpio based usb 3.0 mux not being sorted out yet):
> > > + {
> > > + dr_mode = "otg";
> > > + status = "okay";
> > > +};
> > > +
> > >
> > > u-boot=> usb start && usb tree
> > > starting USB...
> > > Bus usb@32e4: Bus usb@32e5:
> > > ^^^ imx8mm-evk hangs
> >
> > Yes, I can reproduce the hang, but it happens with or without the
> > imx8mm dt sync.
> >
>
> Fabio,
>
> I do 'not' see a hang on imx8mm-evk on 'usb start && usb tree' on
> master (my other issue was on a 'usb stop' but only with usb
> controllers in host mode).
>
> > This hang is a separate issue, not dt related, as far as I understand.
> >
> > The imx8mm dts sync does solve the issue of running 'ums' after CTRL+C.
>
> I don't agree. The hang 'is' related because all my imx8mm-venice-*
> boards which use 'both' USB controllers hang with this patch on a 'usb
> start' and don't hang without it. While a basic 'review' of the patch
> looks good but actual product testing shows issues. As a maintainer
> for ARM FREESCALE IMX you must have another imx8mm board which uses
> both usbotg devices to test against and verify you see what I see?
>
> Until we know what other fix is needed to go along with this:
> Nacked-by: Tim Harvey
What is the harm is sync'ing the device tree with the kernel? I seemed
like you found a solution with the regulator patch. Did I
misunderstand that?
adam
>
> I've verified that it's the changes from Linux commit 4585c79ff477f
> ("arm64: dts: imx8mm: correct usb power domains") that causes the
> hang, but I don't know why yet.
>
> Why are we seeing different behavior on the imx8mm-evk? Are we on
> different branches? My testing today is on caf0a88d9f31
>
> Best Regards,
>
> Tim
Re: [PATCH 1/3] arm: dts: imx8mm: Sync with Linux 6.3
On Thu, Apr 27, 2023 at 1:08 PM Fabio Estevam wrote:
>
> From: Fabio Estevam
>
> Sync imx8mm.dtsi with Linux 6.3.
>
> The motivation for doing this sync was a bug when doing "ums 0 mmc 1"
> on imx8mm-evk. It worked well for the first time, but after doing
> a CTRL+C and launching the ums again, the command did not work.
>
> Adam Ford suggested to sync imx8mm.dtsi with the Linux dts, as there was
> a recent USB power domain reorganization there.
>
> After syncing the imx8mm.dtsi with Linux, the ums command works without
> problem after a CTRL+C.
>
> Suggested-by: Adam Ford
> Signed-off-by: Fabio Estevam
Reviewed-by: Adam Ford
> ---
> arch/arm/dts/imx8mm.dtsi | 52 +---
> 1 file changed, 38 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/dts/imx8mm.dtsi b/arch/arm/dts/imx8mm.dtsi
> index afb90f59c83c..31f4548f85cf 100644
> --- a/arch/arm/dts/imx8mm.dtsi
> +++ b/arch/arm/dts/imx8mm.dtsi
> @@ -139,6 +139,7 @@
> A53_L2: l2-cache0 {
> compatible = "cache";
> cache-level = <2>;
> + cache-unified;
> cache-size = <0x8>;
> cache-line-size = <64>;
> cache-sets = <512>;
> @@ -276,6 +277,7 @@
> assigned-clocks = < IMX8MM_CLK_USB_PHY_REF>;
> assigned-clock-parents = < IMX8MM_SYS_PLL1_100M>;
> clock-names = "main_clk";
> + power-domains = <_otg1>;
> };
>
> usbphynop2: usbphynop2 {
> @@ -285,6 +287,7 @@
> assigned-clocks = < IMX8MM_CLK_USB_PHY_REF>;
> assigned-clock-parents = < IMX8MM_SYS_PLL1_100M>;
> clock-names = "main_clk";
> + power-domains = <_otg2>;
> };
>
> soc: soc@0 {
> @@ -493,6 +496,8 @@
> compatible = "fsl,imx8mm-tmu";
> reg = <0x3026 0x1>;
> clocks = < IMX8MM_CLK_TMU_ROOT>;
> + nvmem-cells = <_calib>;
> + nvmem-cell-names = "calib";
> #thermal-sensor-cells = <0>;
> };
>
> @@ -547,8 +552,8 @@
> reg = <0x3033 0x1>;
> };
>
> - gpr: iomuxc-gpr@3034 {
> - compatible = "fsl,imx8mm-iomuxc-gpr",
> "fsl,imx6q-iomuxc-gpr", "syscon";
> + gpr: syscon@3034 {
> + compatible = "fsl,imx8mm-iomuxc-gpr",
> "syscon";
> reg = <0x3034 0x1>;
> };
>
> @@ -560,22 +565,40 @@
> #address-cells = <1>;
> #size-cells = <1>;
>
> - imx8mm_uid: unique-id@410 {
> + /*
> +* The register address below maps to the MX8M
> +* Fusemap Description Table entries this way.
> +* Assuming
> +* reg = ;
> +* then
> +* Fuse Address = (ADDR * 4) + 0x400
> +* Note that if SIZE is greater than 4, then
> +* each subsequent fuse is located at offset
> +* +0x10 in Fusemap Description Table (e.g.
> +* reg = <0x4 0x8> describes fuses 0x410 and
> +* 0x420).
> +*/
> + imx8mm_uid: unique-id@4 { /* 0x410-0x420 */
> reg = <0x4 0x8>;
> };
>
> - cpu_speed_grade: speed-grade@10 {
> + cpu_speed_grade: speed-grade@10 { /* 0x440 */
> reg = <0x10 4>;
> };
>
> - fec_mac_address: mac-address@90 {
> + tmu_calib: calib@3c { /* 0x4f0 */
> + reg = <0x3c 4>;
> +
Re: [PATCH 3/3] arm: dts: imx8mp: Sync with Linux 6.3
On Thu, Apr 27, 2023 at 1:09 PM Fabio Estevam wrote:
>
> From: Fabio Estevam
>
> Sync imx8mp.dtsi and imx8mp-clock.h with Linux 6.3.
>
> Signed-off-by: Fabio Estevam
Reviewed-by: Adam Ford
> ---
> arch/arm/dts/imx8mp.dtsi | 374 ---
> include/dt-bindings/clock/imx8mp-clock.h | 14 +-
> 2 files changed, 270 insertions(+), 118 deletions(-)
>
> diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi
> index bb916a0948a8..a237275ee017 100644
> --- a/arch/arm/dts/imx8mp.dtsi
> +++ b/arch/arm/dts/imx8mp.dtsi
> @@ -123,6 +123,7 @@
>
> A53_L2: l2-cache0 {
> compatible = "cache";
> + cache-unified;
> cache-level = <2>;
> cache-size = <0x8>;
> cache-line-size = <64>;
> @@ -379,6 +380,8 @@
> compatible = "fsl,imx8mp-tmu";
> reg = <0x3026 0x1>;
> clocks = < IMX8MP_CLK_TSENSOR_ROOT>;
> + nvmem-cells = <_calib>;
> + nvmem-cell-names = "calib";
> #thermal-sensor-cells = <1>;
> };
>
> @@ -411,7 +414,7 @@
> reg = <0x3033 0x1>;
> };
>
> - gpr: iomuxc-gpr@3034 {
> + gpr: syscon@3034 {
> compatible = "fsl,imx8mp-iomuxc-gpr",
> "syscon";
> reg = <0x3034 0x1>;
> };
> @@ -424,27 +427,44 @@
> #address-cells = <1>;
> #size-cells = <1>;
>
> - imx8mp_uid: unique-id@420 {
> + /*
> +* The register address below maps to the MX8M
> +* Fusemap Description Table entries this way.
> +* Assuming
> +* reg = ;
> +* then
> +* Fuse Address = (ADDR * 4) + 0x400
> +* Note that if SIZE is greater than 4, then
> +* each subsequent fuse is located at offset
> +* +0x10 in Fusemap Description Table (e.g.
> +* reg = <0x8 0x8> describes fuses 0x420 and
> +* 0x430).
> +*/
> + imx8mp_uid: unique-id@8 { /* 0x420-0x430 */
> reg = <0x8 0x8>;
> };
>
> - cpu_speed_grade: speed-grade@10 {
> + cpu_speed_grade: speed-grade@10 { /* 0x440 */
> reg = <0x10 4>;
> };
>
> - eth_mac1: mac-address@90 {
> + eth_mac1: mac-address@90 { /* 0x640 */
> reg = <0x90 6>;
> };
>
> - eth_mac2: mac-address@96 {
> + eth_mac2: mac-address@96 { /* 0x658 */
> reg = <0x96 6>;
> };
> +
> + tmu_calib: calib@264 { /* 0xd90-0xdc0 */
> + reg = <0x264 0x10>;
> + };
> };
>
> - anatop: anatop@3036 {
> - compatible = "fsl,imx8mp-anatop",
> "fsl,imx8mm-anatop",
> -"syscon";
> + anatop: clock-controller@3036 {
> + compatible = "fsl,imx8mp-anatop",
> "fsl,imx8mm-anatop";
> reg = <0x3036 0x1>;
> + #clock-cells = <1>;
> };
>
> snvs: snvs@3037 {
> @@ -523,6 +543,7 @@
> compatible = "fsl,imx8mp-gpc";
> re
Re: [PATCH 2/3] arm: dts: imx8mn: Sync with Linux 6.3
On Thu, Apr 27, 2023 at 1:08 PM Fabio Estevam wrote:
>
> From: Fabio Estevam
>
> Sync imx8mn.dtsi with Linux 6.3.
>
> Signed-off-by: Fabio Estevam
Reviewed-by: Adam Ford
> ---
> arch/arm/dts/imx8mn.dtsi | 46 ++--
> 1 file changed, 35 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm/dts/imx8mn.dtsi b/arch/arm/dts/imx8mn.dtsi
> index cb2836bfbd95..9e0ddd6b7a32 100644
> --- a/arch/arm/dts/imx8mn.dtsi
> +++ b/arch/arm/dts/imx8mn.dtsi
> @@ -139,6 +139,7 @@
> A53_L2: l2-cache0 {
> compatible = "cache";
> cache-level = <2>;
> + cache-unified;
> cache-size = <0x8>;
> cache-line-size = <64>;
> cache-sets = <512>;
> @@ -295,6 +296,7 @@
> sai2: sai@3002 {
> compatible = "fsl,imx8mn-sai",
> "fsl,imx8mq-sai";
> reg = <0x3002 0x1>;
> + #sound-dai-cells = <0>;
> interrupts = IRQ_TYPE_LEVEL_HIGH>;
> clocks = < IMX8MN_CLK_SAI2_IPG>,
> < IMX8MN_CLK_DUMMY>,
> @@ -309,6 +311,7 @@
> sai3: sai@3003 {
> compatible = "fsl,imx8mn-sai",
> "fsl,imx8mq-sai";
> reg = <0x3003 0x1>;
> + #sound-dai-cells = <0>;
> interrupts = IRQ_TYPE_LEVEL_HIGH>;
> clocks = < IMX8MN_CLK_SAI3_IPG>,
> < IMX8MN_CLK_DUMMY>,
> @@ -323,6 +326,7 @@
> sai5: sai@3005 {
> compatible = "fsl,imx8mn-sai",
> "fsl,imx8mq-sai";
> reg = <0x3005 0x1>;
> + #sound-dai-cells = <0>;
> interrupts = IRQ_TYPE_LEVEL_HIGH>;
> clocks = < IMX8MN_CLK_SAI5_IPG>,
> < IMX8MN_CLK_DUMMY>,
> @@ -339,6 +343,7 @@
> sai6: sai@3006 {
> compatible = "fsl,imx8mn-sai",
> "fsl,imx8mq-sai";
> reg = <0x3006 0x1>;
> + #sound-dai-cells = <0>;
> interrupts = IRQ_TYPE_LEVEL_HIGH>;
> clocks = < IMX8MN_CLK_SAI6_IPG>,
> < IMX8MN_CLK_DUMMY>,
> @@ -396,6 +401,7 @@
> sai7: sai@300b {
> compatible = "fsl,imx8mn-sai",
> "fsl,imx8mq-sai";
> reg = <0x300b 0x1>;
> + #sound-dai-cells = <0>;
> interrupts = IRQ_TYPE_LEVEL_HIGH>;
> clocks = < IMX8MN_CLK_SAI7_IPG>,
> < IMX8MN_CLK_DUMMY>,
> @@ -497,6 +503,8 @@
> compatible = "fsl,imx8mn-tmu",
> "fsl,imx8mm-tmu";
> reg = <0x3026 0x1>;
> clocks = < IMX8MN_CLK_TMU_ROOT>;
> + nvmem-cells = <_calib>;
> + nvmem-cell-names = "calib";
> #thermal-sensor-cells = <0>;
> };
>
> @@ -551,7 +559,7 @@
> reg = <0x3033 0x1>;
> };
>
> - gpr: iomuxc-gpr@3034 {
> + gpr: syscon@3034 {
> compatible = "fsl,imx8mn-iomuxc-gpr",
> "syscon";
> reg = <0x3034 0x1>;
> };
> @@ -563,23 +571,40 @@
>
Re: imx8mm/imx8mn hang on usb stop / ehci_shutdown
On Thu, Apr 27, 2023 at 12:49 PM Fabio Estevam wrote: > > Hi Adam, > > On Thu, Apr 27, 2023 at 2:42 PM Adam Ford wrote: > > > There was some re-organization of the power domains in Linux in the > > device tree [1]. Do you know if those propagated to U-Boot? > > Excellent, I just synced the kernel imx8mm.dtsi with U-Boot and it > does fix the "ums 0 mmc 1" issue I just described. > > I will submit the dtsi sync patch. Thanks! Any chance you can update the imx8mn.dtsi as well when you do the patch? Nano has the same USB controller, it's likely to have the same issue. adam
Re: imx8mm/imx8mn hang on usb stop / ehci_shutdown
On Thu, Apr 27, 2023 at 12:52 PM Tim Harvey wrote: > > On Thu, Apr 27, 2023 at 10:49 AM Fabio Estevam wrote: > > > > Hi Adam, > > > > On Thu, Apr 27, 2023 at 2:42 PM Adam Ford wrote: > > > > > There was some re-organization of the power domains in Linux in the > > > device tree [1]. Do you know if those propagated to U-Boot? > > > > Excellent, I just synced the kernel imx8mm.dtsi with U-Boot and it > > does fix the "ums 0 mmc 1" issue I just described. > > > > I will submit the dtsi sync patch. Thanks! > > Fabio, > > The original issue I was trying to solve should not be visible on > imx8mm-evk unless you changed its usbotg1 to dr_mode = "host" in which > case you should see a hang with a simple 'usb start && usb stop'. If you leave it without the "host" but connect a device to the port with a host adapter, do you get the same behavior? adam > > Best Regards, > > Tim
Re: imx8mm/imx8mn hang on usb stop / ehci_shutdown
On Thu, Apr 27, 2023 at 12:14 PM Tim Harvey wrote:
>
> On Wed, Mar 15, 2023 at 3:01 PM Tim Harvey wrote:
> >
> > Greetings,
> >
> > I'm seeing a hang on imx8mm-venice and imx8mn-venice boards which have
> > a USB host controller in host mode when ehci_shutdown() is called
> > (which is called for 'usb stop' as well as when booting a kernel once
> > 'usb start' has been issued).
> >
> > This appears to be caused by the ehci_shutdown() function,
> > specifically the write to the or_portsc register to set EHCI_PS_SUSP:
> > for (i = 0; i < max_ports; i++) {
> > reg = ehci_readl(>hcor->or_portsc[i]);
> > reg |= EHCI_PS_SUSP;
> > ehci_writel(>hcor->or_portsc[i], reg);
> > }
> >
> > Does anyone else out there with an imx8mm/imx8mn board with usbotg1 or
> > usbotg2 configured with dr_mode="host" see this as well?
> >
> > I'm not clear where the equivalent code would be in the Linux kernel
> > to compare with. I do know that commenting out the ehcI_write above
> > keeps ehci_shutdown from hanging but does cause the handshake to fail
> > on the next cmd that disables CMD_RUN and thus prints "EHCI failed to
> > shut down host controller.".
> >
> > Any ideas?
> >
> > Best Regards,
> >
> > Tim
>
> I haven't heard any response here so I did some more digging. This
> hang should be affecting all imx8mm/imx8mn devices that have USB host
> controllers configured for host mode (dr_mode = "host") and would
> appear for anyone that ever does a 'usb stop' (or does a 'usb start'
> followed by a kernel boot for example of loading kernel from USB) in
> U-Boot.
>
> The issue is caused by the pgc_otg{1,2} and/or pgc_hsiomix power
> domains getting disabled for the 'usb_hub' device (which is present
> for the USB host even if you have no hub) prior to ehci_shutdown being
> called.
>
> The following patch resolves this but I'm thinking there should be a
> better way to control this from ehci-mx6.c?
There was some re-organization of the power domains in Linux in the
device tree [1]. Do you know if those propagated to U-Boot?
adam
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch/arm64/boot/dts/freescale/imx8mm.dtsi?h=v6.3=4585c79ff477f9517b7f384a4fce351417e8fa36
>
> diff --git a/common/usb_hub.c b/common/usb_hub.c
> index 85c0822d8b7b..03237deaa0be 100644
> --- a/common/usb_hub.c
> +++ b/common/usb_hub.c
> @@ -948,7 +948,7 @@ U_BOOT_DRIVER(usb_generic_hub) = {
> .name = "usb_hub",
> .id = UCLASS_USB_HUB,
> .of_match = usb_hub_ids,
> - .flags = DM_FLAG_ALLOC_PRIV_DMA,
> + .flags = DM_FLAG_ALLOC_PRIV_DMA | DM_FLAG_LEAVE_PD_ON,
> };
>
>
> Best Regards,
>
> Tim
Re: Unable to implement board fdt-fixup for imx8m CPU
On Mon, Apr 24, 2023 at 4:57 PM Hugo Villeneuve wrote: > > On Mon, 24 Apr 2023 15:01:35 -0600 > Simon Glass wrote: > > > Hi Hugo, > > > > On Mon, 24 Apr 2023 at 14:53, Hugo Villeneuve wrote: > > > > > > Hi, > > > according to this document: > > > > > > doc/develop/driver-model/fdt-fixup.rst > > > > > > it is suggested that boards implement the board_fix_fdt() function to > > > tweak the device tree. I am trying to do just that, but unfortunately I > > > cannot because the following source file already has an implementation of > > > board_fix_fdt(): > > > > > > arch/arm/mach-imx/imx8m/soc.c > > > > > > For all boards using a imx8m CPU, how can we implement board_fix_fdt()? > > > > If you enable CONFIG_EVENT you can use EVT_FT_FIXUP to add as many > > fixup functions as you need. > > > > Migration to use that mechanism everywhere hasn't really started, but > > I think it would be useful. > > Hi Simon, > to be more precise, I need to modify the FDT used by U-Boot to tweak some > ethernet PHY properties before initializing the ethernet controller. I do > _not_ need to fix the FDT before booting in the OS. Can you modify the -u-boot.dtsi file? You can add additional device tree stuff to that. I think a few boards do this already specifically for the Ethernet stuff. adam > > With that in mind, do you still think using CONFIG_EVENT is the way to go? I > am not sure from my reading of the source code because it seems that fixup > events are called just before booting into the OS. > > Thank you, > Hugo.
[PATCH V5] arm64: imx: Add support for imx8mp-beacon-kit
Beacon Embedded has an i.MX8M Plus development kit which consists
of a SOM + baseboard. The SOM includes Bluetooth, WiFi, QSPI, eMMC,
and one Ethernet PHY. The baseboard includes audio, HDMI, USB-C Dual
Role port, USB Hub with five ports, a PCIe slot, and a second Ethernet
PHY. The device trees are already queued for inclusion in Linux 6.3.
Signed-off-by: Adam Ford
Reviewed-by: Tom Rini
---
V5: Rebase off next instead of imx branch.
Replace u-boot,dm-spl with bootph-pre-ram
V4: Rebase off Marek V's EQOS series.
Remove code no longer needed from the EQOS series
Remove unnecessary include files.
V3: Fix Doc indicies to fix errors with 'make htmldocs'
Remove duplicated entries in imx8mp_beacon.env found in env_default.h
Remove unnecessary include options from imx8mp_beacon.h
V2: Move default environment from imx8mp_beacon.h to imx8mp_beacon.env
Move README to beacon-imx8mp.rst
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c160e884bf..eff9c69969 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -995,6 +995,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
+ imx8mp-beacon-kit.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-evk.dtb \
imx8mp-icore-mx8mp-edimm2.2.dtb \
diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
new file mode 100644
index 00..5ca631e9d8
--- /dev/null
+++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Logic PD, Inc DBA Beacon EmbeddedWorks
+ */
+
+#include "imx8mp-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <>;
+ bootph-pre-ram;
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25} {
+ bootph-pre-ram;
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25/regulators} {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ /delete-property/ assigned-clock-rates;
+};
+
+ {
+ reset-gpios = < 22 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <15000>;
+ reset-deassert-us = <10>;
+};
+
+ {
+ phy-reset-gpios = < 18 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <15>;
+ phy-reset-post-delay = <100>;
+};
+
+ {
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ compatible = "ti,tca6416";
+ label = "exp4";
+};
+
+_1 {
+ compatible = "ti,tca6416";
+ label = "exp4";
+};
+
+_3 {
+ compatible = "ti,tca6416";
+ label = "exp2";
+};
+
+_i2c1 {
+ bootph-pre-ram;
+};
+
+_pmic {
+ bootph-pre-ram;
+};
+
+_reg_usdhc2_vmmc {
+ bootph-pre-ram;
+};
+
+_uart2 {
+ bootph-pre-ram;
+};
+
+_usdhc2_gpio {
+ bootph-pre-ram;
+};
+
+_usdhc2 {
+ bootph-pre-ram;
+};
+
+_usdhc3 {
+ bootph-pre-ram;
+};
+
+_wdog {
+ bootph-pre-ram;
+};
+
+_usdhc2_vmmc {
+ bootph-pre-ram;
+ u-boot,off-on-delay-us = <2>;
+};
+
+_jr0 {
+ bootph-pre-ram;
+};
+
+_jr1 {
+ bootph-pre-ram;
+};
+
+_jr2 {
+ bootph-pre-ram;
+};
+
+ {
+ compatible = "tcg,tpm_tis-spi";
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+ assigned-clocks = < IMX8MP_CLK_USDHC1>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ bootph-pre-ram;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+ assigned-clocks = < IMX8MP_CLK_USDHC2>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ bootph-pre-ram;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ assigned-clocks = < IMX8MP_CLK_USDHC3>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+_0 {
+ dma-ranges = <0x4000 0x4000 0xc000>;
+ /delete-property/ power-domains;
+};
+
+_1 {
+ dma-ranges = <0x4000 0x4000 0xc000>;
+ /delete-property/ power-domains;
+};
+
+_dwc3_0 {
+ compatible = "fsl,imx
[PATCH V4] arm64: imx: Add support for imx8mp-beacon-kit
Beacon Embedded has an i.MX8M Plus development kit which consists
of a SOM + baseboard. The SOM includes Bluetooth, WiFi, QSPI, eMMC,
and one Ethernet PHY. The baseboard includes audio, HDMI, USB-C Dual
Role port, USB Hub with five ports, a PCIe slot, and a second Ethernet
PHY. The device trees are already queued for inclusion in Linux 6.3.
Signed-off-by: Adam Ford
Reviewed-by: Tom Rini
---
V4: Rebase off Marek V's EQOS series.
Remove code no longer needed from the EQOS series
Remove unnecessary include files.
V3: Fix Doc indicies to fix errors with 'make htmldocs'
Remove duplicated entries in imx8mp_beacon.env found in env_default.h
Remove unnecessary include options from imx8mp_beacon.h
V2: Move default environment from imx8mp_beacon.h to imx8mp_beacon.env
Move README to beacon-imx8mp.rst
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d9b719f85d..d812ad4048 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -986,6 +986,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
+ imx8mp-beacon-kit.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-evk.dtb \
imx8mp-icore-mx8mp-edimm2.2.dtb \
diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
new file mode 100644
index 00..0f7c91a078
--- /dev/null
+++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Logic PD, Inc DBA Beacon EmbeddedWorks
+ */
+
+#include "imx8mp-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <>;
+ u-boot,dm-spl;
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25} {
+ u-boot,dm-spl;
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25/regulators} {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ /delete-property/ assigned-clock-rates;
+};
+
+ {
+ reset-gpios = < 22 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <15000>;
+ reset-deassert-us = <10>;
+};
+
+ {
+ phy-reset-gpios = < 18 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <15>;
+ phy-reset-post-delay = <100>;
+};
+
+ {
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ compatible = "ti,tca6416";
+ label = "exp4";
+};
+
+_1 {
+ compatible = "ti,tca6416";
+ label = "exp4";
+};
+
+_3 {
+ compatible = "ti,tca6416";
+ label = "exp2";
+};
+
+_i2c1 {
+ u-boot,dm-spl;
+};
+
+_pmic {
+ u-boot,dm-spl;
+};
+
+_reg_usdhc2_vmmc {
+ u-boot,dm-spl;
+};
+
+_uart2 {
+ u-boot,dm-spl;
+};
+
+_usdhc2_gpio {
+ u-boot,dm-spl;
+};
+
+_usdhc2 {
+ u-boot,dm-spl;
+};
+
+_usdhc3 {
+ u-boot,dm-spl;
+};
+
+_wdog {
+ u-boot,dm-spl;
+};
+
+_usdhc2_vmmc {
+ u-boot,dm-spl;
+ u-boot,off-on-delay-us = <2>;
+};
+
+_jr0 {
+ u-boot,dm-spl;
+};
+
+_jr1 {
+ u-boot,dm-spl;
+};
+
+_jr2 {
+ u-boot,dm-spl;
+};
+
+ {
+ compatible = "tcg,tpm_tis-spi";
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+ assigned-clocks = < IMX8MP_CLK_USDHC1>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+ assigned-clocks = < IMX8MP_CLK_USDHC2>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ assigned-clocks = < IMX8MP_CLK_USDHC3>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+_0 {
+ dma-ranges = <0x4000 0x4000 0xc000>;
+ /delete-property/ power-domains;
+};
+
+_1 {
+ dma-ranges = <0x4000 0x4000 0xc000>;
+ /delete-property/ power-domains;
+};
+
+_dwc3_0 {
+ compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
+ assigned-clocks = < IMX8MP_CLK_HSIO_AXI>;
+ assigned-clock-parents =
[PATCH V3] arm64: imx: Add support for imx8mp-beacon-kit
Beacon Embedded has an i.MX8M Plus development kit which consists
of a SOM + baseboard. The SOM includes Bluetooth, WiFi, QSPI, eMMC,
and one Ethernet PHY. The baseboard includes audio, HDMI, USB-C Dual
Role port, USB Hub with five ports, a PCIe slot, and a second Ethernet
PHY. The device trees are already queued for inclusion in Linux 6.3.
Signed-off-by: Adam Ford
---
V3: Fix Doc indicies to fix errors with 'make htmldocs'
Remove duplicated entries in imx8mp_beacon.env found in env_default.h
Remove unnecessary include options from imx8mp_beacon.h
V2: Move default environment from imx8mp_beacon.h to imx8mp_beacon.env
Move README to beacon-imx8mp.rst
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d9b719f85d..d812ad4048 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -986,6 +986,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
+ imx8mp-beacon-kit.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-evk.dtb \
imx8mp-icore-mx8mp-edimm2.2.dtb \
diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
new file mode 100644
index 00..0f7c91a078
--- /dev/null
+++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Logic PD, Inc DBA Beacon EmbeddedWorks
+ */
+
+#include "imx8mp-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <>;
+ u-boot,dm-spl;
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25} {
+ u-boot,dm-spl;
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25/regulators} {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ /delete-property/ assigned-clock-rates;
+};
+
+ {
+ reset-gpios = < 22 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <15000>;
+ reset-deassert-us = <10>;
+};
+
+ {
+ phy-reset-gpios = < 18 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <15>;
+ phy-reset-post-delay = <100>;
+};
+
+ {
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ compatible = "ti,tca6416";
+ label = "exp4";
+};
+
+_1 {
+ compatible = "ti,tca6416";
+ label = "exp4";
+};
+
+_3 {
+ compatible = "ti,tca6416";
+ label = "exp2";
+};
+
+_i2c1 {
+ u-boot,dm-spl;
+};
+
+_pmic {
+ u-boot,dm-spl;
+};
+
+_reg_usdhc2_vmmc {
+ u-boot,dm-spl;
+};
+
+_uart2 {
+ u-boot,dm-spl;
+};
+
+_usdhc2_gpio {
+ u-boot,dm-spl;
+};
+
+_usdhc2 {
+ u-boot,dm-spl;
+};
+
+_usdhc3 {
+ u-boot,dm-spl;
+};
+
+_wdog {
+ u-boot,dm-spl;
+};
+
+_usdhc2_vmmc {
+ u-boot,dm-spl;
+ u-boot,off-on-delay-us = <2>;
+};
+
+_jr0 {
+ u-boot,dm-spl;
+};
+
+_jr1 {
+ u-boot,dm-spl;
+};
+
+_jr2 {
+ u-boot,dm-spl;
+};
+
+ {
+ compatible = "tcg,tpm_tis-spi";
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+ assigned-clocks = < IMX8MP_CLK_USDHC1>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+ assigned-clocks = < IMX8MP_CLK_USDHC2>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ assigned-clocks = < IMX8MP_CLK_USDHC3>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+_0 {
+ dma-ranges = <0x4000 0x4000 0xc000>;
+ /delete-property/ power-domains;
+};
+
+_1 {
+ dma-ranges = <0x4000 0x4000 0xc000>;
+ /delete-property/ power-domains;
+};
+
+_dwc3_0 {
+ compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
+ assigned-clocks = < IMX8MP_CLK_HSIO_AXI>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_800M>;
+ assigned-clock-rates = <4>;
+};
+
+_dwc3_1 {
+ compatible = "fsl,imx8mq-dwc3", "snps
Re: [PATCH] arm64: imx: Add support for imx8mp-beacon-kit
On Sun, Feb 12, 2023 at 12:08 PM Tom Rini wrote:
>
> On Sun, Feb 12, 2023 at 12:02:26PM -0600, Adam Ford wrote:
> > On Sun, Feb 12, 2023 at 11:47 AM Tom Rini wrote:
> > >
> > > On Sun, Feb 12, 2023 at 11:36:38AM -0600, Adam Ford wrote:
> > >
> > > > Beacon Embedded has an i.MX8M Plus development kit which consists
> > > > of a SOM + baseboard. The SOM includes Bluetooth, WiFi, QSPI, eMMC,
> > > > and one Ethernet PHY. The baseboard includes audio, HDMI, USB-C Dual
> > > > Role port, USB Hub with five ports, a PCIe slot, and a second Ethernet
> > > > PHY. The device trees are already queued for inclusion in Linux 6.3.
> > > >
> > > > Signed-off-by: Adam Ford
> > > [snip]
> > > > diff --git a/board/beacon/imx8mp/README b/board/beacon/imx8mp/README
> > > > new file mode 100644
> > > > index 00..47999bb038
> > > > --- /dev/null
> > > > +++ b/board/beacon/imx8mp/README
> > >
> > > Our rST docs have gotten to the point I think where we should say no to
> > > new board README files, this belongs under doc/board/
> >
> > OK. I'll work on that.
> >
> > >
> > > [snip]
> > > > +#define CFG_EXTRA_ENV_SETTINGS \
> > > > + "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
> > > > + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
> > > > + "image=Image\0" \
> > > > + "console=ttymxc1,115200\0" \
> > > > + "fdt_addr_r=0x4300\0" \
> > > > + "fdt_addr=0x4300\0" \
> > > > + "boot_fdt=try\0" \
> > > > + "boot_fit=no\0" \
> > > > + "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
> > > > + "bootm_size=0x1000\0" \
> > > > + "mmcdev=1\0" \
> > > > + "mmcpart=1\0" \
> > > > + "optargs=audit=0 video=LVDS-1:d video=LVDS-2:d\0" \
> > > > + "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
> > > > + "mmcargs=setenv bootargs console=${console} " \
> > > > + " root=PARTUUID=${uuid} rootwait rw ${mtdparts} ${optargs}\0" \
> > > > + "bootscript=echo Running bootscript from mmc ...; " \
> > > > + "source\0" \
> > > > + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}
> > > > ${image}\0" \
> > > > + "loadfdt=echo ${fdt_file}; fatload mmc ${mmcdev}:${mmcpart}
> > > > ${fdt_addr_r} ${fdt_file}\0" \
> > > > + "mmcboot=echo Booting from mmc ...; " \
> > > > + "run finduuid; run mmcargs; " \
> > > > + "if test ${boot_fit} = yes || test ${boot_fit} = try;
> > > > then " \
> > > > + "bootm ${loadaddr}; " \
> > > > + "else " \
> > > > + "if run loadfdt; then " \
> > > > + "booti ${loadaddr} - ${fdt_addr_r}; " \
> > > > + "else " \
> > > > + "echo WARN: Cannot load the DT; " \
> > > > + "fi; " \
> > > > + "fi;\0" \
> > > > + "netargs=setenv bootargs ${jh_clk} console=${console} " \
> > > > + "root=/dev/nfs " \
> > > > + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
> > > > + "netboot=echo Booting from net ...; " \
> > > > + "run netargs; " \
> > > > + "if test ${ip_dyn} = yes; then " \
> > > > + "setenv get_cmd dhcp; " \
> > > > + "else " \
> > > > + "setenv get_cmd tftp; " \
> > > > + "fi; " \
> > > > + "${get_cmd} ${loadaddr} ${image}; " \
> > > > + "if test ${boot_fit} = yes || test ${boot_fit} = try;
> > > > then " \
> > > > + "bootm ${loadaddr}; " \
> > > > + "else " \
> > > > + "if ${get_cmd} ${fdt_addr_r} ${fdt_file}; then " \
> > > > + "booti ${loadaddr} - ${fdt_addr_r}; " \
> > > > + "else " \
> > > > + "echo WARN: Cannot load the DT; " \
> > > > + "fi; " \
> > > > + "fi;\0"
> > >
> > > And this should all be plain text environment (see board/*/*/*.env for
> >
> > I didn't even know this was a thing, but after reviewing what others
> > are doing, I like this much better.
>
> That's good to hear.
>
> > > examples), and please put it somewhere on your TODO list to migrate
> > > other platforms README and environments, thanks!
> >
> > Is there a deadline?
>
> Neither has a firm deadline at this point, thanks!
Tom,
I pushed a V2 and CC'd you. If you're OK with both the env file and
the rst file for this board, I'll do the same thing for the other
Beacon and LogicPD boards. I just don't want to do the work until I
know my first attempt at these new files is acceptable.
Thanks,
adam
>
> --
> Tom
[PATCH V2] arm64: imx: Add support for imx8mp-beacon-kit
Beacon Embedded has an i.MX8M Plus development kit which consists
of a SOM + baseboard. The SOM includes Bluetooth, WiFi, QSPI, eMMC,
and one Ethernet PHY. The baseboard includes audio, HDMI, USB-C Dual
Role port, USB Hub with five ports, a PCIe slot, and a second Ethernet
PHY. The device trees are already queued for inclusion in Linux 6.3.
Signed-off-by: Adam Ford
---
V2: Move default environment from imx8mp_beacon.h to imx8mp_beacon.env
Move README to beacon-imx8mp.rst
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d9b719f85d..d812ad4048 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -986,6 +986,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
+ imx8mp-beacon-kit.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-evk.dtb \
imx8mp-icore-mx8mp-edimm2.2.dtb \
diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
new file mode 100644
index 00..0f7c91a078
--- /dev/null
+++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Logic PD, Inc DBA Beacon EmbeddedWorks
+ */
+
+#include "imx8mp-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <>;
+ u-boot,dm-spl;
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25} {
+ u-boot,dm-spl;
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25/regulators} {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ /delete-property/ assigned-clock-rates;
+};
+
+ {
+ reset-gpios = < 22 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <15000>;
+ reset-deassert-us = <10>;
+};
+
+ {
+ phy-reset-gpios = < 18 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <15>;
+ phy-reset-post-delay = <100>;
+};
+
+ {
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ compatible = "ti,tca6416";
+ label = "exp4";
+};
+
+_1 {
+ compatible = "ti,tca6416";
+ label = "exp4";
+};
+
+_3 {
+ compatible = "ti,tca6416";
+ label = "exp2";
+};
+
+_i2c1 {
+ u-boot,dm-spl;
+};
+
+_pmic {
+ u-boot,dm-spl;
+};
+
+_reg_usdhc2_vmmc {
+ u-boot,dm-spl;
+};
+
+_uart2 {
+ u-boot,dm-spl;
+};
+
+_usdhc2_gpio {
+ u-boot,dm-spl;
+};
+
+_usdhc2 {
+ u-boot,dm-spl;
+};
+
+_usdhc3 {
+ u-boot,dm-spl;
+};
+
+_wdog {
+ u-boot,dm-spl;
+};
+
+_usdhc2_vmmc {
+ u-boot,dm-spl;
+ u-boot,off-on-delay-us = <2>;
+};
+
+_jr0 {
+ u-boot,dm-spl;
+};
+
+_jr1 {
+ u-boot,dm-spl;
+};
+
+_jr2 {
+ u-boot,dm-spl;
+};
+
+ {
+ compatible = "tcg,tpm_tis-spi";
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+ assigned-clocks = < IMX8MP_CLK_USDHC1>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+ assigned-clocks = < IMX8MP_CLK_USDHC2>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ assigned-clocks = < IMX8MP_CLK_USDHC3>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+_0 {
+ dma-ranges = <0x4000 0x4000 0xc000>;
+ /delete-property/ power-domains;
+};
+
+_1 {
+ dma-ranges = <0x4000 0x4000 0xc000>;
+ /delete-property/ power-domains;
+};
+
+_dwc3_0 {
+ compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
+ assigned-clocks = < IMX8MP_CLK_HSIO_AXI>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_800M>;
+ assigned-clock-rates = <4>;
+};
+
+_dwc3_1 {
+ compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
+ assigned-clocks = < IMX8MP_CLK_HSIO_AXI>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_800M>;
+ assigned-clock-rates = <4>;
+};
+
+
Re: [PATCH] arm64: imx: Add support for imx8mp-beacon-kit
On Sun, Feb 12, 2023 at 11:47 AM Tom Rini wrote:
>
> On Sun, Feb 12, 2023 at 11:36:38AM -0600, Adam Ford wrote:
>
> > Beacon Embedded has an i.MX8M Plus development kit which consists
> > of a SOM + baseboard. The SOM includes Bluetooth, WiFi, QSPI, eMMC,
> > and one Ethernet PHY. The baseboard includes audio, HDMI, USB-C Dual
> > Role port, USB Hub with five ports, a PCIe slot, and a second Ethernet
> > PHY. The device trees are already queued for inclusion in Linux 6.3.
> >
> > Signed-off-by: Adam Ford
> [snip]
> > diff --git a/board/beacon/imx8mp/README b/board/beacon/imx8mp/README
> > new file mode 100644
> > index 00..47999bb038
> > --- /dev/null
> > +++ b/board/beacon/imx8mp/README
>
> Our rST docs have gotten to the point I think where we should say no to
> new board README files, this belongs under doc/board/
OK. I'll work on that.
>
> [snip]
> > +#define CFG_EXTRA_ENV_SETTINGS \
> > + "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
> > + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
> > + "image=Image\0" \
> > + "console=ttymxc1,115200\0" \
> > + "fdt_addr_r=0x4300\0" \
> > + "fdt_addr=0x4300\0" \
> > + "boot_fdt=try\0" \
> > + "boot_fit=no\0" \
> > + "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
> > + "bootm_size=0x1000\0" \
> > + "mmcdev=1\0" \
> > + "mmcpart=1\0" \
> > + "optargs=audit=0 video=LVDS-1:d video=LVDS-2:d\0" \
> > + "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
> > + "mmcargs=setenv bootargs console=${console} " \
> > + " root=PARTUUID=${uuid} rootwait rw ${mtdparts} ${optargs}\0" \
> > + "bootscript=echo Running bootscript from mmc ...; " \
> > + "source\0" \
> > + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
> > + "loadfdt=echo ${fdt_file}; fatload mmc ${mmcdev}:${mmcpart}
> > ${fdt_addr_r} ${fdt_file}\0" \
> > + "mmcboot=echo Booting from mmc ...; " \
> > + "run finduuid; run mmcargs; " \
> > + "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
> > + "bootm ${loadaddr}; " \
> > + "else " \
> > + "if run loadfdt; then " \
> > + "booti ${loadaddr} - ${fdt_addr_r}; " \
> > + "else " \
> > + "echo WARN: Cannot load the DT; " \
> > + "fi; " \
> > + "fi;\0" \
> > + "netargs=setenv bootargs ${jh_clk} console=${console} " \
> > + "root=/dev/nfs " \
> > + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
> > + "netboot=echo Booting from net ...; " \
> > + "run netargs; " \
> > + "if test ${ip_dyn} = yes; then " \
> > + "setenv get_cmd dhcp; " \
> > + "else " \
> > + "setenv get_cmd tftp; " \
> > + "fi; " \
> > + "${get_cmd} ${loadaddr} ${image}; " \
> > + "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
> > + "bootm ${loadaddr}; " \
> > + "else " \
> > + "if ${get_cmd} ${fdt_addr_r} ${fdt_file}; then " \
> > + "booti ${loadaddr} - ${fdt_addr_r}; " \
> > + "else " \
> > + "echo WARN: Cannot load the DT; " \
> > + "fi; " \
> > + "fi;\0"
>
> And this should all be plain text environment (see board/*/*/*.env for
I didn't even know this was a thing, but after reviewing what others
are doing, I like this much better.
> examples), and please put it somewhere on your TODO list to migrate
> other platforms README and environments, thanks!
Is there a deadline?
thanks
adam
>
> --
> Tom
[PATCH] arm64: imx: Add support for imx8mp-beacon-kit
Beacon Embedded has an i.MX8M Plus development kit which consists
of a SOM + baseboard. The SOM includes Bluetooth, WiFi, QSPI, eMMC,
and one Ethernet PHY. The baseboard includes audio, HDMI, USB-C Dual
Role port, USB Hub with five ports, a PCIe slot, and a second Ethernet
PHY. The device trees are already queued for inclusion in Linux 6.3.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d9b719f85d..d812ad4048 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -986,6 +986,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
+ imx8mp-beacon-kit.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-evk.dtb \
imx8mp-icore-mx8mp-edimm2.2.dtb \
diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
new file mode 100644
index 00..0f7c91a078
--- /dev/null
+++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Logic PD, Inc DBA Beacon EmbeddedWorks
+ */
+
+#include "imx8mp-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <>;
+ u-boot,dm-spl;
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25} {
+ u-boot,dm-spl;
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25/regulators} {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ /delete-property/ assigned-clock-rates;
+};
+
+ {
+ reset-gpios = < 22 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <15000>;
+ reset-deassert-us = <10>;
+};
+
+ {
+ phy-reset-gpios = < 18 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <15>;
+ phy-reset-post-delay = <100>;
+};
+
+ {
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ compatible = "ti,tca6416";
+ label = "exp4";
+};
+
+_1 {
+ compatible = "ti,tca6416";
+ label = "exp4";
+};
+
+_3 {
+ compatible = "ti,tca6416";
+ label = "exp2";
+};
+
+_i2c1 {
+ u-boot,dm-spl;
+};
+
+_pmic {
+ u-boot,dm-spl;
+};
+
+_reg_usdhc2_vmmc {
+ u-boot,dm-spl;
+};
+
+_uart2 {
+ u-boot,dm-spl;
+};
+
+_usdhc2_gpio {
+ u-boot,dm-spl;
+};
+
+_usdhc2 {
+ u-boot,dm-spl;
+};
+
+_usdhc3 {
+ u-boot,dm-spl;
+};
+
+_wdog {
+ u-boot,dm-spl;
+};
+
+_usdhc2_vmmc {
+ u-boot,dm-spl;
+ u-boot,off-on-delay-us = <2>;
+};
+
+_jr0 {
+ u-boot,dm-spl;
+};
+
+_jr1 {
+ u-boot,dm-spl;
+};
+
+_jr2 {
+ u-boot,dm-spl;
+};
+
+ {
+ compatible = "tcg,tpm_tis-spi";
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+ assigned-clocks = < IMX8MP_CLK_USDHC1>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+ assigned-clocks = < IMX8MP_CLK_USDHC2>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ assigned-clocks = < IMX8MP_CLK_USDHC3>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+_0 {
+ dma-ranges = <0x4000 0x4000 0xc000>;
+ /delete-property/ power-domains;
+};
+
+_1 {
+ dma-ranges = <0x4000 0x4000 0xc000>;
+ /delete-property/ power-domains;
+};
+
+_dwc3_0 {
+ compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
+ assigned-clocks = < IMX8MP_CLK_HSIO_AXI>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_800M>;
+ assigned-clock-rates = <4>;
+};
+
+_dwc3_1 {
+ compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
+ assigned-clocks = < IMX8MP_CLK_HSIO_AXI>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_800M>;
+ assigned-clock-rates = <4>;
+};
+
+ {
+ status = "disabled";
+};
+
+ {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx8mp-b
[PATCH V2 2/2] configs: imx: imx8mm_beacon: Add config option for QSPI booting
The imx8mm_beacon SOM has a QSPI part attached to the FSPI controller.
Update the header and spl files to support booting from NOR flash and
add imx8mm_beacon_fspi_defconfig to support this configuration.
Signed-off-by: Adam Ford
---
V2: Rebase and rename CONFIG_SYS_UBOOT_BASE to CFG_SYS_UBOOT_BASE
diff --git a/board/beacon/imx8mm/spl.c b/board/beacon/imx8mm/spl.c
index a5f337aa17..b2830c5223 100644
--- a/board/beacon/imx8mm/spl.c
+++ b/board/beacon/imx8mm/spl.c
@@ -36,6 +36,8 @@ int spl_board_boot_device(enum boot_device boot_dev_spl)
return BOOT_DEVICE_MMC2;
case USB_BOOT:
return BOOT_DEVICE_BOARD;
+ case QSPI_BOOT:
+ return BOOT_DEVICE_NOR;
default:
return BOOT_DEVICE_NONE;
}
@@ -46,6 +48,11 @@ static void spl_dram_init(void)
ddr_init(_timing);
}
+void spl_board_init(void)
+{
+ arch_misc_init();
+}
+
#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{
diff --git a/configs/imx8mm_beacon_fspi_defconfig
b/configs/imx8mm_beacon_fspi_defconfig
new file mode 100644
index 00..805fd3f671
--- /dev/null
+++ b/configs/imx8mm_beacon_fspi_defconfig
@@ -0,0 +1,155 @@
+CONFIG_ARM=y
+CONFIG_ARCH_IMX8M=y
+CONFIG_TEXT_BASE=0x4020
+CONFIG_SYS_MALLOC_LEN=0x200
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0xDE00
+CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg"
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit"
+CONFIG_SPL_TEXT_BASE=0x7E2000
+CONFIG_TARGET_IMX8MM_BEACON=y
+CONFIG_SYS_PROMPT="u-boot=> "
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x4048
+CONFIG_LTO=y
+CONFIG_SYS_MONITOR_LEN=524288
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+CONFIG_SPL_LOAD_FIT=y
+# CONFIG_USE_SPL_FIT_GENERATOR is not set
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run
loadbootscript; then run bootscript; else if run loadimage; then run mmcboot;
else run netboot; fi; fi; fi;"
+CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb"
+CONFIG_SPL_MAX_SIZE=0x25000
+CONFIG_SPL_PAD_TO=0x0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x91
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK=0x92
+CONFIG_SYS_SPL_MALLOC=y
+CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
+CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x4220
+CONFIG_SYS_SPL_MALLOC_SIZE=0x8
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
+CONFIG_SPL_CRC32=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_NOR_SUPPORT=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_USB_HOST=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_SPL_WATCHDOG=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
+CONFIG_SYS_BOOTM_LEN=0x80
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_CLK=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_SDP=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=2
+CONFIG_SYS_MMC_ENV_PART=2
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_USE_ETHPRIME=y
+CONFIG_ETHPRIME="FEC"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_CLK_COMPOSITE_CCF=y
+CONFIG_CLK_COMPOSITE_CCF=y
+CONFIG_SPL_CLK_IMX8MM=y
+CONFIG_CLK_IMX8MM=y
+CONFIG_MXC_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=4000
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_GIGE=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
+CONFIG_SPL_PHY=y
+CONFIG_SPL_NOP_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_IMX8M=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_IMX8M_POWER_DOMAIN=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_DM_PMIC_BD71837=y
+CONFIG_SPL_DM_PMIC_BD71837=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_BD71837=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_NXP_FSPI=y
+C
[PATCH V2 1/2] imx: imx8mm-beacon: Enable FlexSPI in U-Boot
In order to use the FlexSPI interface in U-Boot, configure
the alias to make spi0 point to flexspi.
With that enabled, sf probe detects the QSPI part as:
SF: Detected n25q256ax1 with page size 256 Bytes, erase size 4 KiB, total 32 MiB
Signed-off-by: Adam Ford
---
V2: No Change
diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
index 00ac413f36..4f5b9cd23c 100644
--- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
@@ -6,6 +6,10 @@
#include "imx8mm-u-boot.dtsi"
/ {
+ aliases {
+ spi0 =
+ };
+
wdt-reboot {
compatible = "wdt-reboot";
wdt = <>;
--
2.34.1
Re: [PATCH 2/2] configs: imx: imx8mm_beacon: Add config option for QSPI booting
On Wed, Feb 1, 2023 at 7:06 AM Stefano Babic wrote:
>
> Hi Adam,
>
> I haven't picked up these two patches in my PR due to a small thing (at
> least, what I could see). There are a couple of new CONFIG_ in header
> (CONFIG_SYS_UBOOT_BASE, CFG_ as now is okay), but new CONFIG_ should be
> managed only by Kbuild and are not allowed.
The initial submission was back in November, and I know the Kconfig
has undergone some updates and migrations since then, so I'll rebase
and send a V2 later tonight.
thanks
adam
>
> My pipeline failed, see here:
>
> https://source.denx.de/u-boot/custodians/u-boot-imx/-/jobs/566141
>
> On 19.11.22 20:28, Adam Ford wrote:
> > The imx8mm_beacon SOM has a QSPI part attached to the FSPI controller.
> > Update the header and spl files to support booting from NOR flash and
> > add imx8mm_beacon_fspi_defconfig to support this configuration.
> >
> > Signed-off-by: Adam Ford
> >
> > diff --git a/board/beacon/imx8mm/spl.c b/board/beacon/imx8mm/spl.c
> > index a5f337aa17..4beda0c62d 100644
> > --- a/board/beacon/imx8mm/spl.c
> > +++ b/board/beacon/imx8mm/spl.c
> > @@ -36,6 +36,8 @@ int spl_board_boot_device(enum boot_device boot_dev_spl)
> > return BOOT_DEVICE_MMC2;
> > case USB_BOOT:
> > return BOOT_DEVICE_BOARD;
> > + case QSPI_BOOT:
> > + return BOOT_DEVICE_NOR;
> > default:
> > return BOOT_DEVICE_NONE;
> > }
> > diff --git a/configs/imx8mm_beacon_fspi_defconfig
> > b/configs/imx8mm_beacon_fspi_defconfig
> > new file mode 100644
> > index 00..805fd3f671
> > --- /dev/null
> > +++ b/configs/imx8mm_beacon_fspi_defconfig
> > @@ -0,0 +1,155 @@
> > +CONFIG_ARM=y
> > +CONFIG_ARCH_IMX8M=y
> > +CONFIG_TEXT_BASE=0x4020
> > +CONFIG_SYS_MALLOC_LEN=0x200
> > +CONFIG_SPL_GPIO=y
> > +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > +CONFIG_ENV_SIZE=0x2000
> > +CONFIG_ENV_OFFSET=0xDE00
> > +CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg"
> > +CONFIG_DM_GPIO=y
> > +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit"
> > +CONFIG_SPL_TEXT_BASE=0x7E2000
> > +CONFIG_TARGET_IMX8MM_BEACON=y
> > +CONFIG_SYS_PROMPT="u-boot=> "
> > +CONFIG_SPL_SERIAL=y
> > +CONFIG_SPL_DRIVERS_MISC=y
> > +CONFIG_SPL=y
> > +CONFIG_SYS_LOAD_ADDR=0x4048
> > +CONFIG_LTO=y
> > +CONFIG_SYS_MONITOR_LEN=524288
> > +CONFIG_FIT=y
> > +CONFIG_FIT_EXTERNAL_OFFSET=0x3000
> > +CONFIG_SPL_LOAD_FIT=y
> > +# CONFIG_USE_SPL_FIT_GENERATOR is not set
> > +CONFIG_OF_SYSTEM_SETUP=y
> > +CONFIG_USE_BOOTCOMMAND=y
> > +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run
> > loadbootscript; then run bootscript; else if run loadimage; then run
> > mmcboot; else run netboot; fi; fi; fi;"
> > +CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb"
> > +CONFIG_SPL_MAX_SIZE=0x25000
> > +CONFIG_SPL_PAD_TO=0x0
> > +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> > +CONFIG_SPL_BSS_START_ADDR=0x91
> > +CONFIG_SPL_BSS_MAX_SIZE=0x2000
> > +CONFIG_SPL_BOARD_INIT=y
> > +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
> > +CONFIG_SPL_STACK=0x92
> > +CONFIG_SYS_SPL_MALLOC=y
> > +CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
> > +CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x4220
> > +CONFIG_SYS_SPL_MALLOC_SIZE=0x8
> > +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
> > +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
> > +CONFIG_SPL_CRC32=y
> > +CONFIG_SPL_I2C=y
> > +CONFIG_SPL_NOR_SUPPORT=y
> > +CONFIG_SPL_POWER=y
> > +CONFIG_SPL_USB_HOST=y
> > +CONFIG_SPL_USB_GADGET=y
> > +CONFIG_SPL_USB_SDP_SUPPORT=y
> > +CONFIG_SPL_WATCHDOG=y
> > +CONFIG_HUSH_PARSER=y
> > +CONFIG_SYS_MAXARGS=64
> > +CONFIG_SYS_CBSIZE=2048
> > +CONFIG_SYS_PBSIZE=2074
> > +CONFIG_SYS_BOOTM_LEN=0x80
> > +# CONFIG_CMD_EXPORTENV is not set
> > +# CONFIG_CMD_IMPORTENV is not set
> > +# CONFIG_CMD_CRC32 is not set
> > +CONFIG_CMD_CLK=y
> > +CONFIG_CMD_FUSE=y
> > +CONFIG_CMD_GPIO=y
> > +CONFIG_CMD_I2C=y
> > +CONFIG_CMD_MMC=y
> > +CONFIG_CMD_PART=y
> > +CONFIG_CMD_SPI=y
> > +CONFIG_CMD_USB=y
> > +CONFIG_CMD_USB_SDP=y
> > +CONFIG_CMD_USB_MASS_STORAGE=y
> > +CONFIG_CMD_DHCP=y
> > +CONFIG_CMD_MII=y
> > +CONFIG_CMD_PING=y
> > +CONFIG_CMD_CACHE=y
> > +CONFIG_CMD_PMIC=y
> > +CONFIG_CMD_REGULATOR=y
> > +CONFIG_CMD_EXT2=y
> > +CONFIG_CMD_EXT4=y
>
Re: [PATCH 103/171] Correct SPL use of IMX8MN_BEACON_2GB_LPDDR
On Mon, Jan 30, 2023 at 9:17 AM Simon Glass wrote: > > This converts 1 usage of this option to the non-SPL form, since there is > no SPL_IMX8MN_BEACON_2GB_LPDDR defined in Kconfig > Reviewed-by: Adam Ford > Signed-off-by: Simon Glass > --- > > include/configs/imx8mn_beacon.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h > index bb3dfe3fa0d..1880d0311e4 100644 > --- a/include/configs/imx8mn_beacon.h > +++ b/include/configs/imx8mn_beacon.h > @@ -80,7 +80,7 @@ > > #define CFG_SYS_SDRAM_BASE 0x4000 > #define PHYS_SDRAM 0x4000 > -#if CONFIG_IS_ENABLED(IMX8MN_BEACON_2GB_LPDDR) > +#if IS_ENABLED(CONFIG_IMX8MN_BEACON_2GB_LPDDR) > #define PHYS_SDRAM_SIZE0x8000 /* 2GB DDR */ > #else > #define PHYS_SDRAM_SIZE0x4000 /* 1GB DDR */ > -- > 2.39.1.456.gfc5497dd1b-goog >
Re: Applying DTB Overlays from ATF on RZ/G2
On Tue, Jan 10, 2023 at 7:40 AM Marek Vasut wrote:
>
> On 1/10/23 14:19, Adam Ford wrote:
> > On Tue, Jan 10, 2023 at 7:02 AM Marek Vasut wrote:
> >>
> >> On 1/7/23 13:01, Adam Ford wrote:
> >>> On Wed, Jan 4, 2023 at 5:55 PM Marek Vasut wrote:
> >>>>
> >>>> On 1/5/23 00:48, Heinrich Schuchardt wrote:
> >>>>> Am 5. Januar 2023 00:19:36 MEZ schrieb Adam Ford :
> >>>>>> On Wed, Jan 4, 2023 at 5:15 PM Heinrich Schuchardt
> >>>>>> wrote:
> >>>>>>>
> >>>>>>> On 1/4/23 22:35, Adam Ford wrote:
> >>>>>>>> ATF generates a couple memory nodes based on how it's compiled and
> >>>>>>>> generates a reserved-memory node, and I want to overlay it with the
> >>>>>>>> device tree so Linux knows about this reserved memory.
> >>>>>>>>
> >>>>>>>> When I boot U-Boot, I can read the reserved-memory node:
> >>>>>>>>
> >>>>>>>> => fdt addr 0xe631e588
> >>>>>>>> Working FDT set to e631e588
> >>>>>>>> => fdt print /reserved-memory
> >>>>>>>> reserved-memory {
> >>>>>>>> lossy-decompression@5400 {
> >>>>>>>> renesas,formats = <0x>;
> >>>>>>>> no-map;
> >>>>>>>> reg = <0x 0x5400 0x 0x0300>;
> >>>>>>>> compatible = "renesas,lossy-decompression", "shared-dma-pool";
> >>>>>>>> };
> >>>>>>>> };
> >>>>>>>> =>
> >>>>>>>>
> >>>>>>>> I attempt to overlay it with the following:
> >>>>>>>>
> >>>>>>>> => run loadfdt
> >>>>>>>> 65932 bytes read in 6 ms (10.5 MiB/s)
> >>>>>>>> => fdt addr $load_addr
> >>>>>>>
> >>>>>>> When actually setting the address you will see a message "Working FDT
> >>>>>>> set to %lx\n". So I assume $load_addr is empty.
> >>>>>>>
> >>>>>>> Did you mean $loadaddr or $fileaddr?
> >>>>>>
> >>>>>> Opps, that was a copy-paste error. Even with that, I still get the
> >>>>>> failure to overlay:
> >>>>>>
> >>>>>
> >>>>> Did you load a .dtbo file to apply? You cannot apply a devicetree.
> >>>>>
> >>>>> Is the fdt that you want to apply the overlay to built with symbols
> >>>>> (dtc parameter -@)?
> >>>>
> >>>> Note that the fragment passed to U-Boot by upstream ATF is already
> >>>> automatically merged into the U-Boot control DT (see
> >>>> board/renesas/rcar-common/common.c ) . U-Boot should pass that on to
> >>>> Linux automatically.
> >>>
> >>> I ran some tests, and it appears the function fdtdec_board_setup is
> >>> never getting called. That looks like the code that grabs the blob
> >>> from ATF. I intentionally removed the memory nodes from the kernel
> >>> device tree expecting the memory nodes to get added from ATF, but when
> >>> I booted it, it promptly hung. That implied to me that the memory
> >>> nodes didn't get added from ATF.
> >>>
> >>> I added some debug code and noticed that ft_board_setup did not get
> >>> executed, so I created a call to fdtdec_board_setup from
> >>> ft_board_setup and my board booted just fine. I am curious to know if
> >>> other rcar/rzg2 boards are seeing something similar? Is calling
> >>> fdtdec_board_setup from ft_board_setup appropriate?
> >>
> >> Note that fdtdec_board_setup() is called very early on when U-Boot
> >> itself starts up and it is used to patch the fragment passed from ATF
> >> into U-Boot control DT. The ft_board_setup() is called before booting
> >> OS, i.e. at much later stage.
> >>
> >> Can you maybe summarize what exactly it is that you're trying to pass
> >> through , and from where to where ?
> >
> > There is a reserved-memory node generated by ATF and I want to pass
> > that node to the Linux Kernel, so the memory is reserved, because
> > accessing the memory will cause Linux to crash. I wanted to put the
> > reserved-memory node into the kernel dts file, but Geert asked me to
> > pass the blob from ATF instead of hard-coding it into the dts.
> > I am just trying to figure out how to make that happen, because it
> > appears the memory isn't being reserved.
>
> So, can you check whether the U-Boot control DT does contain this
> reserved memory node ?
>
> => fdt addr $fdtcontroladdr
> => fdt print /path/to/the/node
>
=> fdt addr $fdtcontroladdr
Working FDT set to bbedccb0
=> fdt print /reserved-memory
reserved-memory {
lossy-decompression@5400 {
compatible = "renesas,lossy-decompression", "shared-dma-pool";
reg = <0x 0x5400 0x 0x0300>;
no-map;
renesas,formats = <0x>;
};
};
=>
So it does appear that the reserved-memory is showing up here.
Is there a way to export just this node and append it to the kernel's DTB?
adam
> ?
>
> If so, then it is up to U-Boot to pass its own reserved memory nodes
> onward to Linux.
Re: Applying DTB Overlays from ATF on RZ/G2
On Tue, Jan 10, 2023 at 7:02 AM Marek Vasut wrote:
>
> On 1/7/23 13:01, Adam Ford wrote:
> > On Wed, Jan 4, 2023 at 5:55 PM Marek Vasut wrote:
> >>
> >> On 1/5/23 00:48, Heinrich Schuchardt wrote:
> >>> Am 5. Januar 2023 00:19:36 MEZ schrieb Adam Ford :
> >>>> On Wed, Jan 4, 2023 at 5:15 PM Heinrich Schuchardt
> >>>> wrote:
> >>>>>
> >>>>> On 1/4/23 22:35, Adam Ford wrote:
> >>>>>> ATF generates a couple memory nodes based on how it's compiled and
> >>>>>> generates a reserved-memory node, and I want to overlay it with the
> >>>>>> device tree so Linux knows about this reserved memory.
> >>>>>>
> >>>>>> When I boot U-Boot, I can read the reserved-memory node:
> >>>>>>
> >>>>>> => fdt addr 0xe631e588
> >>>>>> Working FDT set to e631e588
> >>>>>> => fdt print /reserved-memory
> >>>>>> reserved-memory {
> >>>>>> lossy-decompression@5400 {
> >>>>>> renesas,formats = <0x>;
> >>>>>> no-map;
> >>>>>> reg = <0x 0x5400 0x 0x0300>;
> >>>>>> compatible = "renesas,lossy-decompression", "shared-dma-pool";
> >>>>>> };
> >>>>>> };
> >>>>>> =>
> >>>>>>
> >>>>>> I attempt to overlay it with the following:
> >>>>>>
> >>>>>> => run loadfdt
> >>>>>> 65932 bytes read in 6 ms (10.5 MiB/s)
> >>>>>> => fdt addr $load_addr
> >>>>>
> >>>>> When actually setting the address you will see a message "Working FDT
> >>>>> set to %lx\n". So I assume $load_addr is empty.
> >>>>>
> >>>>> Did you mean $loadaddr or $fileaddr?
> >>>>
> >>>> Opps, that was a copy-paste error. Even with that, I still get the
> >>>> failure to overlay:
> >>>>
> >>>
> >>> Did you load a .dtbo file to apply? You cannot apply a devicetree.
> >>>
> >>> Is the fdt that you want to apply the overlay to built with symbols (dtc
> >>> parameter -@)?
> >>
> >> Note that the fragment passed to U-Boot by upstream ATF is already
> >> automatically merged into the U-Boot control DT (see
> >> board/renesas/rcar-common/common.c ) . U-Boot should pass that on to
> >> Linux automatically.
> >
> > I ran some tests, and it appears the function fdtdec_board_setup is
> > never getting called. That looks like the code that grabs the blob
> > from ATF. I intentionally removed the memory nodes from the kernel
> > device tree expecting the memory nodes to get added from ATF, but when
> > I booted it, it promptly hung. That implied to me that the memory
> > nodes didn't get added from ATF.
> >
> > I added some debug code and noticed that ft_board_setup did not get
> > executed, so I created a call to fdtdec_board_setup from
> > ft_board_setup and my board booted just fine. I am curious to know if
> > other rcar/rzg2 boards are seeing something similar? Is calling
> > fdtdec_board_setup from ft_board_setup appropriate?
>
> Note that fdtdec_board_setup() is called very early on when U-Boot
> itself starts up and it is used to patch the fragment passed from ATF
> into U-Boot control DT. The ft_board_setup() is called before booting
> OS, i.e. at much later stage.
>
> Can you maybe summarize what exactly it is that you're trying to pass
> through , and from where to where ?
There is a reserved-memory node generated by ATF and I want to pass
that node to the Linux Kernel, so the memory is reserved, because
accessing the memory will cause Linux to crash. I wanted to put the
reserved-memory node into the kernel dts file, but Geert asked me to
pass the blob from ATF instead of hard-coding it into the dts.
I am just trying to figure out how to make that happen, because it
appears the memory isn't being reserved.
adam
