Re: [PATCH v1] mtd: rawnand: macronix: OTP access for MX30LFxG18AC

2024-05-24 Thread Dario Binacchi
Hi Arseniy,

On Fri, May 24, 2024 at 11:25 AM Arseniy Krasnov
 wrote:
>
> Hi Dario!
>
> Sorry, is this patch ok?

Sorry, I told you I was testing it but I forgot to tell you that
testing was successfully
completed for this patch.

Thanks and regards,
Dario

>
> Thanks
>
> On 18.04.2024 09:55, Dario Binacchi wrote:
> > Arseniy, Michael, All
> >
> > On Wed, Apr 17, 2024 at 8:44 PM Michael Nazzareno Trimarchi
> >  wrote:
> >>
> >> Hi
> >>
> >> Dario did you add those patches in CI and test them again?
> >>
> >> Michael
> >>
> >> On Wed, Apr 17, 2024 at 8:44 PM Arseniy Krasnov
> >>  wrote:
> >>>
> >>> Hello,
> >>>
> >>> Sorry, pls ping
> >>>
> >>> Thanks, Arseniy
> >>>
> >>> On 13.03.2024 09:46, Michael Nazzareno Trimarchi wrote:
> >>>> Hi  Dario
> >>>>
> >>>> Can apply this series and put in CI?
> >
> > Sorry, but I mistakenly tagged it as 'superseded'.
> > I just pushed it to my nand-next branch and I'm running the CI now.
> >
> > Thanks and regards,
> > Dario
> >
> >>>>
> >>>> Michael
> >>>>
> >>>> On Wed, Mar 13, 2024 at 7:43 AM Arseniy Krasnov
> >>>>  wrote:
> >>>>>
> >>>>> Sorry, please ping
> >>>>>
> >>>>> Thanks, Arseniy
> >>>>>
> >>>>> On 11.02.2024 02:16, Arseniy Krasnov wrote:
> >>>>>> Sorry, pls ping
> >>>>>>
> >>>>>> Thanks, Arseniy
> >>>>>>
> >>>>>> On 08.01.2024 21:33, Arseniy Krasnov wrote:
> >>>>>>> Sorry, pls ping
> >>>>>>>
> >>>>>>> Thanks, Arseniy
> >>>>
> >>>>
> >>>>
> >>
> >>
> >>
> >> --
> >> Michael Nazzareno Trimarchi
> >> Co-Founder & Chief Executive Officer
> >> M. +39 347 913 2170
> >> mich...@amarulasolutions.com
> >> __
> >>
> >> Amarula Solutions BV
> >> Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
> >> T. +31 (0)85 111 9172
> >> i...@amarulasolutions.com
> >> www.amarulasolutions.com
> >
> >
> >



-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

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Re: [PATCH v2 0/6] Introduce UBI block device

2024-05-24 Thread Dario Binacchi
Amarula Solutions BV
> > > > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
> > > > T. +31 (0)85 111 9172
> > > > i...@amarulasolutions.com
> > > > www.amarulasolutions.com
> > >
> > > --
> > > Thank you,
> > > Alexey
> >
> >
> >
> > --
> > Michael Nazzareno Trimarchi
> > Co-Founder & Chief Executive Officer
> > M. +39 347 913 2170
> > mich...@amarulasolutions.com
> > __
> >
> > Amarula Solutions BV
> > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
> > T. +31 (0)85 111 9172
> > i...@amarulasolutions.com
> > www.amarulasolutions.com
>
> --
> Thank you,
> Alexey

I applied your series

https://patchwork.ozlabs.org/user/todo/uboot/?series=401667
https://patchwork.ozlabs.org/user/todo/uboot/?series=400302

but the CI fails. The first applied series already has problems:

Building current source for 1 boards (1 thread, 64 jobs per thread)
53 x86: + coreboot
54+In file included from include/linux/printk.h:4,
55+ from include/linux/kernel.h:5,
56+ from include/linux/bitops.h:22,
57+ from include/uuid.h:13,
58+ from include/part.h:11,
59+ from drivers/mtd/mtdblock.c:55:
60+drivers/mtd/mtdblock.c: In function 'mtd_blk_read':
61+drivers/mtd/mtdblock.c:100:32: error: format '%lx' expects argument
of type 'long unsigned int', but argument 7 has type 'lbaint_t' {aka
'long long unsigned int'} [-Werror=format=]
62+ 100 | pr_err("mtdblock: failed to read block 0x%lx\n", cur);
63+ | ^~~~
64+include/log.h:157:21: note: in definition of macro 'pr_fmt'
65+ 157 | #define pr_fmt(fmt) fmt
66+ | ^~~
67+include/log.h:178:33: note: in expansion of macro 'log'
68+ 178 | #define log_err(_fmt...) log(LOG_CATEGORY, LOGL_ERR, ##_fmt)
69+ | ^~~
70+include/linux/printk.h:50:31: note: in expansion of macro 'log_err'
71+ 50 | CONFIG_LOGLEVEL > 3 ? log_err(fmt, ##__VA_ARGS__) : 0; \
72+ | ^~~
73+drivers/mtd/mtdblock.c:100:25: note: in expansion of macro 'pr_err'
74+ | ^~
75+drivers/mtd/mtdblock.c:100:68: note: format string is defined here
76+ | ~~^
77+ | |
78+ | long unsigned int
79+ | %llx
80+drivers/mtd/mtdblock.c: In function 'mtd_blk_write':
81+drivers/mtd/mtdblock.c:167:32: error: format '%lx' expects argument
of type 'long unsigned int', but argument 7 has type 'lbaint_t' {aka
'long long unsigned int'} [-Werror=format=]
82+ 167 | pr_err("mtdblock: failed to read block 0x%lx\n", cur);
83

Please run the tests locally to fix the errors.

Thanks and regards,
Dario

-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

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Re: [PATCH] ubi: Depend on MTD

2024-04-30 Thread Dario Binacchi
Hi Michael,

On Fri, Apr 26, 2024 at 5:56 PM Michael Nazzareno Trimarchi
 wrote:
>
> Hi Dario
>
> On Fri, Apr 26, 2024 at 5:52 PM Tom Rini  wrote:
> >
> > On Fri, Apr 26, 2024 at 07:18:18AM +0200, Heiko Schocher wrote:
> > > Hello Tom,
> > >
> > > On 11.04.24 08:09, Michael Nazzareno Trimarchi wrote:
> > > > Hi
> > > >
> > > > On Thu, Apr 11, 2024 at 7:06 AM John Watts  wrote:
> > > > >
> > > > > UBI required MTD to build correctly, add it as a Kconfig dependency.
> > > > >
> > > > > Signed-off-by: John Watts 
> > > > > ---
> > > > > While working with UBI on my SPI NAND patch series I found it was
> > > > > possible to enable it without enabling the MTD subsystem.
> > > > > Add a Kconfig option to solve this.
> > > > > ---
> > > > >   drivers/mtd/ubi/Kconfig | 1 +
> > > > >   1 file changed, 1 insertion(+)
> > >
> > > Seems I am too dummy to find this patch in Patchwork, nor is it
> > > applied in master ... can you pick it up, or should I do this and
> > > send you a pull request?
> >
> > It's over at
> > https://patchwork.ozlabs.org/project/uboot/patch/20240411-mtd-v1-1-fe300f6ab...@jookia.org/
> > currently but you can take it up and send it to me if you like.
> >
>
> Can you pick it up? Seems that you are delegate and was already reviewed by me

Yes, I will apply the patch to nand-next branch and test it with the CI pipeline

Thanks and regards,
Dario

>
> Michael
>
> > --
> > Tom
>
>
>
> --
> Michael Nazzareno Trimarchi
> Co-Founder & Chief Executive Officer
> M. +39 347 913 2170
> mich...@amarulasolutions.com
> __
>
> Amarula Solutions BV
> Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
> T. +31 (0)85 111 9172
> i...@amarulasolutions.com
> www.amarulasolutions.com



-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH v1] mtd: rawnand: macronix: OTP access for MX30LFxG18AC

2024-04-18 Thread Dario Binacchi
Arseniy, Michael, All

On Wed, Apr 17, 2024 at 8:44 PM Michael Nazzareno Trimarchi
 wrote:
>
> Hi
>
> Dario did you add those patches in CI and test them again?
>
> Michael
>
> On Wed, Apr 17, 2024 at 8:44 PM Arseniy Krasnov
>  wrote:
> >
> > Hello,
> >
> > Sorry, pls ping
> >
> > Thanks, Arseniy
> >
> > On 13.03.2024 09:46, Michael Nazzareno Trimarchi wrote:
> > > Hi  Dario
> > >
> > > Can apply this series and put in CI?

Sorry, but I mistakenly tagged it as 'superseded'.
I just pushed it to my nand-next branch and I'm running the CI now.

Thanks and regards,
Dario

> > >
> > > Michael
> > >
> > > On Wed, Mar 13, 2024 at 7:43 AM Arseniy Krasnov
> > >  wrote:
> > >>
> > >> Sorry, please ping
> > >>
> > >> Thanks, Arseniy
> > >>
> > >> On 11.02.2024 02:16, Arseniy Krasnov wrote:
> > >>> Sorry, pls ping
> > >>>
> > >>> Thanks, Arseniy
> > >>>
> > >>> On 08.01.2024 21:33, Arseniy Krasnov wrote:
> > >>>> Sorry, pls ping
> > >>>>
> > >>>> Thanks, Arseniy
> > >
> > >
> > >
>
>
>
> --
> Michael Nazzareno Trimarchi
> Co-Founder & Chief Executive Officer
> M. +39 347 913 2170
> mich...@amarulasolutions.com
> __
>
> Amarula Solutions BV
> Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
> T. +31 (0)85 111 9172
> i...@amarulasolutions.com
> www.amarulasolutions.com



-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH v2 0/6] mtd: nand: raw: Collected improvements

2024-04-15 Thread Dario Binacchi
Hello Alexander,

On Mon, Apr 15, 2024 at 8:13 AM Alexander Dahl  wrote:
>
> Hello Dario,
>
> Am Sun, Apr 14, 2024 at 03:41:38PM +0200 schrieb Dario Binacchi:
> > Hi Alexander,
> >
> > On Wed, Mar 20, 2024 at 10:02 AM Alexander Dahl  wrote:
> > >
> > > Hello everyone,
> > >
> > > while working on NAND flash support for a custom board based on the at91
> > > SAM9X60 SoC I stumbled over some issues in the raw nand subsystem.
> > >
> > > Four of six patches are minor fixes.
> > >
> > > Patch 4 introduces a new subcommand for the new atmel nand controller
> > > driver.  Patch 6 introduces a new subcommand for the nand command to
> > > override ONFI timing mode.  Both are are for debugging purposes only and
> > > thus optional, and need to be enabled through menu.  Both helped me a
> > > lot when investigating issues.
> > >
> > > Series is based on upstream next branch, but should also apply to master
> > > cleanly.
> > >
> > > Greets
> > > Alex
> > >
> > > v1:
> > >
> > > Link: 
> > > https://lore.kernel.org/u-boot/20240307091014.39796-1-...@thorsis.com/T/#t
> > >
> > > v2:
> > >
> > > - rebased on recent next
> > > - collected tags
> > > - improved patch 4 after feedback from Mihai
> > > - added new patch 5 with another help text fix
> > > - added new patch 6 with a new debug command
> > > - reworded cover letter
> > >
> > > See per patch changes in patches for more detailed changes.
> > >
> > > Alexander Dahl (6):
> > >   mtd: nand: raw: Use macro nand_to_mtd() where appropriate
> > >   mtd: nand: raw: Port another option flag from Linux
> > >   mtd: nand: raw: Fix (most) Kconfig indentation
> > >   mtd: nand: raw: atmel: Introduce optional debug commands
> > >   mtd: nand: raw: atmel: Fix comment in timings preparation
> > >   cmd: nand: Add new optional sub-command 'onfi'
> > >
> > >  cmd/Kconfig  |  10 +
> > >  cmd/nand.c   |  61 
> > >  drivers/mtd/nand/raw/Kconfig | 115 +++
> > >  drivers/mtd/nand/raw/atmel/nand-controller.c | 299 ++-
> > >  drivers/mtd/nand/raw/nand_base.c |   8 +-
> > >  include/linux/mtd/rawnand.h  |   8 +
> > >  6 files changed, 441 insertions(+), 60 deletions(-)
> > >
> > >
> > > base-commit: f048104999db28d49362201eaebfc91adb14f47c
> > > --
> > > 2.39.2
> > >
> > Applied to nand-next the first 4 patches.
> > For the others, we will conduct further testing before applying them.
>
> Thanks so far.  :-)
>
> I have another fix for the atmel raw nand driver, which I forgot to
> send with this series.  I could add it to v3.

Of course, feel free to add it to version 3.

Thanks and regards,
Dario

> Or should I send it
> separately?
>
> Greets
> Alex



-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


[PULL] Pull request for u-boot-nand-20240414

2024-04-14 Thread Dario Binacchi
Hello Tom,

The following changes since commit 266603d8c39cf4d194e2cfe8d86d870590e150e0:

  Merge tag 'efi-2024-07-rc1-2' of
https://source.denx.de/u-boot/custodians/u-boot-efi (2024-04-13
10:18:38 -0600)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-nand-flash.git
tags/u-boot-nand-20240414

for you to fetch changes up to 248fc16055858c2028a381bb59e12354c4ae19ea:

  cmd: mtd: OTP access support (2024-04-14 08:49:40 +0200)

Gitlab CI showed no issues:
https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/20333


Pull request for u-boot-nand-20240414

The first patch is by Weizhao Ouyang and avoids sf probe crashes.

The second patch is by Arseniy Krasnov and adds basic support for Amlogic
Meson NAND controller on AXG.

The following four patches are by Alexander Dahl and apply some fixes to
drivers/mtd/nand/raw/ and port some changes applied in Linux.

The following patch is by Bruce Suen and adds support for XTX SPINAND.

Finally, the last patch is again by Arseniy Krasnov and adds access to
OTP region, supporting info, dump, write and lock operations.


Alexander Dahl (4):
  mtd: nand: raw: Use macro nand_to_mtd() where appropriate
  mtd: nand: raw: Port another option flag from Linux
  mtd: nand: raw: Fix (most) Kconfig indentation
  mtd: nand: raw: atmel: Fix comment in timings preparation

Arseniy Krasnov (2):
  mtd: rawnand: Meson NAND controller support
  cmd: mtd: OTP access support

Bruce Suen (1):
  mtd: spinand: Add support for XTX SPINAND

Weizhao Ouyang (1):
  cmd: sf: Fix sf probe crash

 cmd/Kconfig  |7 +
 cmd/mtd.c|  234 +++
 cmd/sf.c |5 +-
 drivers/mtd/nand/raw/Kconfig |  115 +-
 drivers/mtd/nand/raw/Makefile|1 +
 drivers/mtd/nand/raw/atmel/nand-controller.c |4 +-
 drivers/mtd/nand/raw/meson_nand.c| 1248
+++
 drivers/mtd/nand/raw/nand_base.c |6 +-
 drivers/mtd/nand/spi/Makefile|2 +-
 drivers/mtd/nand/spi/core.c  |1 +
 drivers/mtd/nand/spi/xtx.c   |  266 +
 include/linux/mtd/rawnand.h  |7 +
 include/linux/mtd/spinand.h  |1 +
 13 files changed, 1835 insertions(+), 62 deletions(-)
 create mode 100644 drivers/mtd/nand/raw/meson_nand.c
 create mode 100644 drivers/mtd/nand/spi/xtx.c


-- 
Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

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Re: [PATCH V4] mtd: spinand: Add support for XTX SPINAND

2024-04-14 Thread Dario Binacchi
  0,
> +SPINAND_ECCINFO(_ooblayout,
> +xt26xxxd_ecc_get_status)),
> +   SPINAND_INFO("XT26Q01D",
> +SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x51),
> +NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
> +NAND_ECCREQ(8, 512),
> +SPINAND_INFO_OP_VARIANTS(_cache_variants,
> + _cache_variants,
> + _cache_variants),
> +0,
> +SPINAND_ECCINFO(_ooblayout,
> +xt26xxxd_ecc_get_status)),
> +   SPINAND_INFO("XT26G02D",
> +SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x32),
> +NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
> +NAND_ECCREQ(8, 512),
> +SPINAND_INFO_OP_VARIANTS(_cache_variants,
> + _cache_variants,
> + _cache_variants),
> +0,
> +SPINAND_ECCINFO(_ooblayout,
> +xt26xxxd_ecc_get_status)),
> +   SPINAND_INFO("XT26G12D",
> +SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x35),
> +NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
> +NAND_ECCREQ(8, 512),
> +SPINAND_INFO_OP_VARIANTS(_cache_variants,
> + _cache_variants,
> + _cache_variants),
> +0,
> +SPINAND_ECCINFO(_ooblayout,
> +xt26xxxd_ecc_get_status)),
> +   SPINAND_INFO("XT26Q02D",
> +SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x52),
> +NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
> +NAND_ECCREQ(8, 512),
> +SPINAND_INFO_OP_VARIANTS(_cache_variants,
> + _cache_variants,
> + _cache_variants),
> +0,
> +SPINAND_ECCINFO(_ooblayout,
> +xt26xxxd_ecc_get_status)),
> +   SPINAND_INFO("XT26G04D",
> +SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x33),
> +NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
> +NAND_ECCREQ(8, 512),
> +SPINAND_INFO_OP_VARIANTS(_cache_variants,
> + _cache_variants,
> + _cache_variants),
> +0,
> +SPINAND_ECCINFO(_ooblayout,
> +xt26xxxd_ecc_get_status)),
> +   SPINAND_INFO("XT26Q04D",
> +SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x53),
> +NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
> +NAND_ECCREQ(8, 512),
> +SPINAND_INFO_OP_VARIANTS(_cache_variants,
> + _cache_variants,
> + _cache_variants),
> +0,
> +SPINAND_ECCINFO(_ooblayout,
> +    xt26xxxd_ecc_get_status)),
> +};
> +
> +static const struct spinand_manufacturer_ops xtx_spinand_manuf_ops = {
> +};
> +
> +const struct spinand_manufacturer xtx_spinand_manufacturer = {
> +   .id = SPINAND_MFR_XTX,
> +   .name = "XTX",
> +   .chips = xtx_spinand_table,
> +   .nchips = ARRAY_SIZE(xtx_spinand_table),
> +   .ops = _spinand_manuf_ops,
> +};
> diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
> index 6f479fa5ad..13b5a52f8b 100644
> --- a/include/linux/mtd/spinand.h
> +++ b/include/linux/mtd/spinand.h
> @@ -251,6 +251,7 @@ extern const struct spinand_manufacturer 
> paragon_spinand_manufacturer;
>  extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
>  extern const struct spinand_manufacturer winbond_spinand_manufacturer;
>  extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
> +extern const struct spinand_manufacturer xtx_spinand_manufacturer;
>
>  /**
>   * struct spinand_op_variants - SPI NAND operation variants
> --
> 2.34.1
>

Applied to nand-next

Thanks and regards,
Dario

-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH v3] mtd: rawnand: Meson NAND controller support

2024-04-14 Thread Dario Binacchi
ip->data_buf = dma_alloc_coherent(page_bytes, _addr);
> > +   if (!meson_chip->data_buf)
> > +   return -ENOMEM;
> > +
> > +   meson_chip->info_buf = dma_alloc_coherent(info_bytes, _addr);
> > +   if (!meson_chip->info_buf) {
> > +   dma_free_coherent(meson_chip->data_buf);
> > +   return -ENOMEM;
> > +   }
> > +
> > +   return 0;
> > +}
> > +
> > +static const int axg_stepinfo_strengths[] = { 8 };
> > +static const struct nand_ecc_step_info axg_stepinfo_1024 = {
> > +   .stepsize = 1024,
> > +   .strengths = axg_stepinfo_strengths,
> > +   .nstrengths = ARRAY_SIZE(axg_stepinfo_strengths)
> > +};
> > +
> > +static const struct nand_ecc_step_info axg_stepinfo_512 = {
> > +   .stepsize = 512,
> > +   .strengths = axg_stepinfo_strengths,
> > +   .nstrengths = ARRAY_SIZE(axg_stepinfo_strengths)
> > +};
> > +
> > +static const struct nand_ecc_step_info axg_stepinfo[] = { 
> > axg_stepinfo_1024, axg_stepinfo_512 };
> > +
> > +static const struct nand_ecc_caps meson_axg_ecc_caps = {
> > +   .stepinfos = axg_stepinfo,
> > +   .nstepinfos = ARRAY_SIZE(axg_stepinfo),
> > +   .calc_ecc_bytes = meson_nand_calc_ecc_bytes,
> > +};
> > +
> > +/*
> > + * OOB layout:
> > + *
> > + * For ECC with 512 bytes step size:
> > + * 0x00: AA AA BB BB BB BB BB BB BB BB BB BB BB BB BB BB
> > + * 0x10: AA AA CC CC CC CC CC CC CC CC CC CC CC CC CC CC
> > + * 0x20:
> > + * 0x30:
> > + *
> > + * For ECC with 1024 bytes step size:
> > + * 0x00: AA AA BB BB BB BB BB BB BB BB BB BB BB BB BB BB
> > + * 0x10: AA AA CC CC CC CC CC CC CC CC CC CC CC CC CC CC
> > + * 0x20: AA AA DD DD DD DD DD DD DD DD DD DD DD DD DD DD
> > + * 0x30: AA AA EE EE EE EE EE EE EE EE EE EE EE EE EE EE
> > + *
> > + * AA - user bytes.
> > + * BB, CC, DD, EE - ECC code bytes for each step.
> > + */
> > +static struct nand_ecclayout nand_oob;
> > +
> > +static void meson_nfc_init_nand_oob(struct nand_chip *nand)
> > +{
> > +   int section_size = 2 + nand->ecc.bytes;
> > +   int i;
> > +   int k;
> > +
> > +   nand_oob.eccbytes = nand->ecc.steps * nand->ecc.bytes;
> > +   k = 0;
> > +
> > +   for (i = 0; i < nand->ecc.steps; i++) {
> > +   int j;
> > +
> > +   for (j = 0; j < nand->ecc.bytes; j++)
> > +   nand_oob.eccpos[k++] = (i * section_size) + 2 + j;
> > +
> > +   nand_oob.oobfree[i].offset = (i * section_size);
> > +   nand_oob.oobfree[i].length = 2;
> > +   }
> > +
> > +   nand_oob.oobavail = 2 * nand->ecc.steps;
> > +   nand->ecc.layout = _oob;
> > +}
> > +
> > +static int meson_nfc_init_ecc(struct nand_chip *nand, ofnode node)
> > +{
> > +   const struct mtd_info *mtd = nand_to_mtd(nand);
> > +   int ret;
> > +   int i;
> > +
> > +   ret = nand_check_ecc_caps(nand, _axg_ecc_caps, mtd->oobsize - 
> > 2);
> > +   if (ret)
> > +   return ret;
> > +
> > +   for (i = 0; i < ARRAY_SIZE(meson_ecc); i++) {
> > +   if (meson_ecc[i].strength == nand->ecc.strength &&
> > +   meson_ecc[i].size == nand->ecc.size) {
> > +   struct meson_nfc_nand_chip *meson_chip = 
> > to_meson_nand(nand);
> > +
> > +   nand->ecc.steps = mtd->writesize / nand->ecc.size;
> > +   meson_chip->bch_mode = meson_ecc[i].bch;
> > +
> > +   meson_nfc_init_nand_oob(nand);
> > +
> > +   return 0;
> > +   }
> > +   }
> > +
> > +   re

Re: [PATCH v5] cmd: mtd: OTP access support

2024-04-14 Thread Dario Binacchi
);
> +   if (ret) {
> +   pr_err("OTP lock failed: %d\n", ret);
> +   ret = CMD_RET_FAILURE;
> +   goto put_mtd;
> +   }
> +
> +   ret = CMD_RET_SUCCESS;
> +
> +put_mtd:
> +   put_mtd_device(mtd);
> +
> +   return ret;
> +}
> +
> +static int do_mtd_otp_write(struct cmd_tbl *cmdtp, int flag, int argc,
> +   char *const argv[])
> +{
> +   struct mtd_info *mtd;
> +   size_t retlen;
> +   size_t binlen;
> +   u8 *binbuf;
> +   off_t from;
> +   int ret;
> +
> +   if (argc != 4)
> +   return CMD_RET_USAGE;
> +
> +   mtd = get_mtd_by_name(argv[1]);
> +   if (IS_ERR_OR_NULL(mtd))
> +   return CMD_RET_FAILURE;
> +
> +   from = simple_strtoul(argv[2], NULL, 0);
> +   binlen = strlen(argv[3]) / 2;
> +
> +   ret = CMD_RET_FAILURE;
> +   binbuf = malloc(binlen);
> +   if (!binbuf)
> +   goto put_mtd;
> +
> +   hex2bin(binbuf, argv[3], binlen);
> +
> +   printf("Will write:\n");
> +
> +   print_hex_dump("", 0, 16, 1, binbuf, binlen, true);
> +
> +   printf("to 0x%lx\n", from);
> +
> +   printf("Continue (y/n)?\n");
> +
> +   if (confirm_yesno() != 1) {
> +   pr_err("OTP write canceled\n");
> +   ret = CMD_RET_SUCCESS;
> +   goto put_mtd;
> +   }
> +
> +   ret = mtd_write_user_prot_reg(mtd, from, binlen, , binbuf);
> +   if (ret) {
> +   pr_err("OTP write failed: %d\n", ret);
> +   ret = CMD_RET_FAILURE;
> +   goto put_mtd;
> +   }
> +
> +   if (retlen != binlen)
> +   pr_err("OTP write returns %zu, but %zu expected\n",
> +  retlen, binlen);
> +
> +   ret = CMD_RET_SUCCESS;
> +
> +put_mtd:
> +   free(binbuf);
> +   put_mtd_device(mtd);
> +
> +   return ret;
> +}
> +
> +static int do_mtd_otp_info(struct cmd_tbl *cmdtp, int flag, int argc,
> +  char *const argv[])
> +{
> +   struct otp_info otp_info;
> +   struct mtd_info *mtd;
> +   size_t retlen;
> +   bool user;
> +   int ret;
> +
> +   if (argc != 3)
> +   return CMD_RET_USAGE;
> +
> +   if (!strcmp(argv[2], "u"))
> +   user = true;
> +   else if (!strcmp(argv[2], "f"))
> +   user = false;
> +   else
> +   return CMD_RET_USAGE;
> +
> +   mtd = get_mtd_by_name(argv[1]);
> +   if (IS_ERR_OR_NULL(mtd))
> +   return CMD_RET_FAILURE;
> +
> +   if (user)
> +   ret = mtd_get_user_prot_info(mtd, sizeof(otp_info), ,
> +_info);
> +   else
> +   ret = mtd_get_fact_prot_info(mtd, sizeof(otp_info), ,
> +_info);
> +   if (ret) {
> +   pr_err("OTP info failed: %d\n", ret);
> +   ret = CMD_RET_FAILURE;
> +   goto put_mtd;
> +   }
> +
> +   if (retlen != sizeof(otp_info)) {
> +   pr_err("OTP info returns %zu, but %zu expected\n",
> +  retlen, sizeof(otp_info));
> +   ret = CMD_RET_FAILURE;
> +   goto put_mtd;
> +   }
> +
> +   printf("%s OTP region info:\n", user ? "User" : "Factory");
> +   printf("\tstart: %u\n", otp_info.start);
> +   printf("\tlength: %u\n", otp_info.length);
> +   printf("\tlocked: %u\n", otp_info.locked);
> +
> +   ret = CMD_RET_SUCCESS;
> +
> +put_mtd:
> +   put_mtd_device(mtd);
> +
> +   return ret;
> +}
> +#endif
> +
>  static int do_mtd_list(struct cmd_tbl *cmdtp, int flag, int argc,
>char *const argv[])
>  {
> @@ -551,6 +769,12 @@ U_BOOT_LONGHELP(mtd,
> "\n"
> "Specific functions:\n"
> "mtd bad   \n"
> +#if CONFIG_IS_ENABLED(CMD_MTD_OTP)
> +   "mtd otpread[u|f]  \n"
> +   "mtd otpwrite\n"
> +   "mtd otplock \n"
> +   "mtd otpinfo[u|f]\n"
> +#endif
> "\n"
> "With:\n"
> "\t: NAND partition/chip name (or corresponding DM device n

Re: [PATCH] cmd: sf: Fix sf probe crash

2024-04-14 Thread Dario Binacchi
Hi Weizhao,

On Fri, Mar 15, 2024 at 7:07 PM Jonas Karlman  wrote:
>
> Hi,
>
> On 2024-01-04 12:46, Weizhao Ouyang wrote:
> > Handle the return value of spi_flash_probe_bus_cs() to avoid sf probe
> > crashes.
> >
> > Signed-off-by: Weizhao Ouyang 
>
> This fixes a null pointer dereference when running "sf probe" and there
> are no spi devices enabled in the device tree for my boards, so:
>
> Fixes: 3feea0ba196a ("spi: spi_flash_probe_bus_cs() rely on DT for spi speed 
> and mode")
>
> Reviewed-by: Jonas Karlman 
>
> Regards,
> Jonas
>
> > ---
> >  cmd/sf.c | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/cmd/sf.c b/cmd/sf.c
> > index 730996c02b..e3866899f6 100644
> > --- a/cmd/sf.c
> > +++ b/cmd/sf.c
> > @@ -135,8 +135,9 @@ static int do_spi_flash_probe(int argc, char *const 
> > argv[])
> >   }
> >   flash = NULL;
> >   if (use_dt) {
> > - spi_flash_probe_bus_cs(bus, cs, );
> > - flash = dev_get_uclass_priv(new);
> > + ret = spi_flash_probe_bus_cs(bus, cs, );
> > + if (!ret)
> > +     flash = dev_get_uclass_priv(new);
> >   } else {
> >   flash = spi_flash_probe(bus, cs, speed, mode);
> >   }
>

Applied to nand-next

Thanks and regards
Dario
-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH v2 0/6] mtd: nand: raw: Collected improvements

2024-04-14 Thread Dario Binacchi
Hi Alexander,

On Wed, Mar 20, 2024 at 10:02 AM Alexander Dahl  wrote:
>
> Hello everyone,
>
> while working on NAND flash support for a custom board based on the at91
> SAM9X60 SoC I stumbled over some issues in the raw nand subsystem.
>
> Four of six patches are minor fixes.
>
> Patch 4 introduces a new subcommand for the new atmel nand controller
> driver.  Patch 6 introduces a new subcommand for the nand command to
> override ONFI timing mode.  Both are are for debugging purposes only and
> thus optional, and need to be enabled through menu.  Both helped me a
> lot when investigating issues.
>
> Series is based on upstream next branch, but should also apply to master
> cleanly.
>
> Greets
> Alex
>
> v1:
>
> Link: 
> https://lore.kernel.org/u-boot/20240307091014.39796-1-...@thorsis.com/T/#t
>
> v2:
>
> - rebased on recent next
> - collected tags
> - improved patch 4 after feedback from Mihai
> - added new patch 5 with another help text fix
> - added new patch 6 with a new debug command
> - reworded cover letter
>
> See per patch changes in patches for more detailed changes.
>
> Alexander Dahl (6):
>   mtd: nand: raw: Use macro nand_to_mtd() where appropriate
>   mtd: nand: raw: Port another option flag from Linux
>   mtd: nand: raw: Fix (most) Kconfig indentation
>   mtd: nand: raw: atmel: Introduce optional debug commands
>   mtd: nand: raw: atmel: Fix comment in timings preparation
>   cmd: nand: Add new optional sub-command 'onfi'
>
>  cmd/Kconfig  |  10 +
>  cmd/nand.c   |  61 
>  drivers/mtd/nand/raw/Kconfig | 115 +++
>  drivers/mtd/nand/raw/atmel/nand-controller.c | 299 ++-
>  drivers/mtd/nand/raw/nand_base.c |   8 +-
>  include/linux/mtd/rawnand.h  |   8 +
>  6 files changed, 441 insertions(+), 60 deletions(-)
>
>
> base-commit: f048104999db28d49362201eaebfc91adb14f47c
> --
> 2.39.2
>
Applied to nand-next the first 4 patches.
For the others, we will conduct further testing before applying them.

Thanks and regards,
Dario
-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


[PULL] Pull request for u-boot-nand-20240115

2024-01-15 Thread Dario Binacchi
Hello Tom,

The following changes since commit 697758e7c81131da6db0e3b10515019fe3aca8c9:

  Merge branch 'master-sync-dts-663' of
https://source.denx.de/u-boot/custodians/u-boot-sh (2024-01-14
18:07:49 -0500)

are available in the Git repository at:

  https://source.denx.de/u-boot/u-boot.git u-boot-nand-20240115

for you to fetch changes up to 4dfa08af79097d068d6657a4c77e7d474733b796:

  arm: mach-k3: am642: Define NAND boot device (2024-01-15 08:58:24 +0100)

Gitlab CI showed no issues:
https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/19322


Pull request for u-boot-nand-20240115

The first patch is by Heinrich Schuchardt and fixes an integer overflow

The following two patches are by Dario Binacchi and add arguments check
to the nand_mtd_to_devnum() and nand_register() functions.

The remaining patches are by Roger Quadros and include various fixes for
the OMAP platform.


Dario Binacchi (2):
  mtd: nand: complete nand_register() arguments check
  mtd: nand: check nand_mtd_to_devnum() argument

Heinrich Schuchardt (1):
  cmd: mtd: avoid unintentional integer overflow

Roger Quadros (6):
  mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x
  mtd: rawnand: omap_elm: Fix elm_init definition
  memory: ti-gpmc: Fix build
  mtd: rawnand: omap_gpmc: Use DT provided IO address
  mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND
  arm: mach-k3: am642: Define NAND boot device

 arch/arm/mach-k3/am642_init.c|   3 +++
 arch/arm/mach-k3/include/mach/am64_spl.h |   1 +
 cmd/mtd.c|   4 ++--
 drivers/memory/ti-gpmc.c |   2 +-
 drivers/mtd/nand/raw/nand.c  |   7 --
 drivers/mtd/nand/raw/omap_elm.c  |   4 ++--
 drivers/mtd/nand/raw/omap_elm.h  |   6 --
 drivers/mtd/nand/raw/omap_gpmc.c | 116
+++
 8 files changed, 59 insertions(+), 84 deletions(-)


-- 
Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH v2 00/14] Support SPI NAND in fastboot protocol

2024-01-15 Thread Dario Binacchi
eference to `nand_read_skip_bad'
95+/usr/bin/ld: test/dm/nand.c:81: undefined reference to `nand_erase_opts'
96+/usr/bin/ld: test/dm/nand.c:84: undefined reference to `nand_read_skip_bad'
97+collect2: error: ld returned 1 exit status
98+make[1]: *** [Makefile:1766: u-boot] Error 1
99+make: *** [Makefile:177: sub-make] Error 2
100 0 0 1 /1 sandbox

Please fix the errors.

Thanks and regards,
Dario

-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH v2 0/2] mtd: nand: omap_gpmc: Fix NAND for AM335x

2024-01-15 Thread Dario Binacchi
Hi Roger And Michael,

On Thu, Jan 11, 2024 at 2:13 PM Michael Nazzareno Trimarchi
 wrote:
>
> Hi
>
> Il gio 11 gen 2024, 14:06 Roger Quadros  ha scritto:
>>
>> Hi,
>>
>> On 11/12/2023 13:45, Roger Quadros wrote:
>> > Hi,
>> >
>> > These patches fix NAND and ELM for AM335x and related legacy platforms
>> > that use HW BCH and ELM modules.
>> >
>> > All CI tests pass: https://github.com/u-boot/u-boot/pull/453
>> >
>> > Changelog:
>> >
>> > v2:
>> > - added __maybe_unused to omap_calculate_ecc_bch. fixes CI tests
>> > - Added Tested-by Tags
>> > - Explained about omap_elm single sector support in commit log
>> >
>> > cheers,
>> > -roger
>> >
>> > Roger Quadros (2):
>> >   mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x
>> >   mtd: rawnand: omap_elm: Fix elm_init definition
>> >
>> >  drivers/mtd/nand/raw/omap_elm.c  |  4 +-
>> >  drivers/mtd/nand/raw/omap_elm.h  |  6 --
>> >  drivers/mtd/nand/raw/omap_gpmc.c | 95 ++--
>> >  3 files changed, 31 insertions(+), 74 deletions(-)
>> >
>> >
>> > base-commit: 2f0282922b2c458eea7f85c500a948a587437b63
>>
>> If no objections can this be Acked and picked up please?
>> Without these NAND is broken on some TI platforms.
>
>
>
> We will queue them and send over the weekend
>
> Michael
>>
>>
>>
>>
>> Thanks!
>>
>> --
>> cheers,
>> -roger


Applied to nand-next.

Thanks and regards,
Dario
-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH v2 0/4] mtd: omap_gpmc: Fix GPMC & NAND drivers

2024-01-15 Thread Dario Binacchi
On Thu, Jan 11, 2024 at 2:19 PM Roger Quadros  wrote:
>
> Hi,
>
> When testing the driver with K3 platform, build and functional
> issues were found in the ti-gpmc and omap_gpmc NAND driver.
> Fix those.
>
> cheers,
> -roger
>
> Changelog:
>
> v2:
> - Added "mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND".
> - Dropped defconfig patch.
>
> CI test results: https://github.com/u-boot/u-boot/pull/467
>
> v1:
> https://lore.kernel.org/all/20240109122605.51951-1-rog...@kernel.org/
>
> Roger Quadros (4):
>   memory: ti-gpmc: Fix build
>   mtd: rawnand: omap_gpmc: Use DT provided IO address
>   mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND
>   arm: mach-k3: am642: Define NAND boot device
>
>  arch/arm/mach-k3/am642_init.c|  3 +++
>  arch/arm/mach-k3/include/mach/am64_spl.h |  1 +
>  drivers/memory/ti-gpmc.c |  2 +-
>  drivers/mtd/nand/raw/omap_gpmc.c | 21 -
>  4 files changed, 21 insertions(+), 6 deletions(-)
>
>
> base-commit: c2c598e87cfe56f5991730762c00733c5aa9a994
> prerequisite-patch-id: e0465f3e924302d1c4bd47f2129b4eb3bd9faead
> --
> 2.34.1
>

Applied to nand-next,

Thanks and regards,
Dario
-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH v2 2/4] mtd: rawnand: omap_gpmc: Use DT provided IO address

2024-01-12 Thread Dario Binacchi
Hi Roger,

On Thu, Jan 11, 2024 at 2:19 PM Roger Quadros  wrote:
>
> For DM case we can get the NAND chip's IO address from DT
> so we don't need to rely on CFG_SYS_NAND_BASE.
>
> Signed-off-by: Roger Quadros 
> ---
>
> Notes:
> v2: no change
>
>  drivers/mtd/nand/raw/omap_gpmc.c | 19 ++-
>  1 file changed, 14 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/omap_gpmc.c 
> b/drivers/mtd/nand/raw/omap_gpmc.c
> index 0e25bd5dc2..f827c578d9 100644
> --- a/drivers/mtd/nand/raw/omap_gpmc.c
> +++ b/drivers/mtd/nand/raw/omap_gpmc.c
> @@ -8,13 +8,15 @@
>  #include 
>  #include 
>  #include 
> -#include 
> +#include 
>  #include 
>
>  #ifdef CONFIG_ARCH_OMAP2PLUS
>  #include 
>  #endif
>
> +#include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -1124,7 +1126,7 @@ int __maybe_unused omap_nand_switch_ecc(uint32_t 
> hardware, uint32_t eccstrength)
>   *   nand_scan about special functionality. See the defines for further
>   *   explanation
>   */
> -int gpmc_nand_init(struct nand_chip *nand)
> +int gpmc_nand_init(struct nand_chip *nand, void __iomem *nand_base)
>  {
> int32_t gpmc_config = 0;
> int cs = cs_next++;
> @@ -1164,7 +1166,7 @@ int gpmc_nand_init(struct nand_chip *nand)
> info->control = NULL;
> info->cs = cs;
> info->ws = wscfg[cs];
> -   info->fifo = (void __iomem *)CFG_SYS_NAND_BASE;
> +   info->fifo = nand_base;
> nand_set_controller_data(nand, _nand_info[cs]);
> nand->cmd_ctrl  = omap_nand_hwcontrol;
> nand->options   |= NAND_NO_PADDING | NAND_CACHEPRG;
> @@ -1214,9 +1216,16 @@ static int gpmc_nand_probe(struct udevice *dev)
>  {
> struct nand_chip *nand = dev_get_priv(dev);
> struct mtd_info *mtd = nand_to_mtd(nand);
> +   struct resource res;
> +   void __iomem *base;
> int ret;
>
> -   gpmc_nand_init(nand);
> +   ret = dev_read_resource(dev, 0, );
> +   if (ret)
> +   return ret;
> +
> +   base = devm_ioremap(dev, res.start, resource_size());
> +   gpmc_nand_init(nand, base);
>
> ret = nand_scan(mtd, CONFIG_SYS_NAND_MAX_CHIPS);
> if (ret)
> @@ -1270,7 +1279,7 @@ void board_nand_init(void)
>
>  int board_nand_init(struct nand_chip *nand)
>  {
> -   return gpmc_nand_init(nand);
> +   return gpmc_nand_init(nand, (void __iomem *)CFG_SYS_NAND_BASE);
>  }

Reviewed-by: Dario Binacchi 

Thanks and regards,
Dario

>
>  #endif /* CONFIG_SYS_NAND_SELF_INIT */
> --
> 2.34.1
>


-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH v2 1/4] memory: ti-gpmc: Fix build

2024-01-12 Thread Dario Binacchi
Hi Roger,

On Thu, Jan 11, 2024 at 2:19 PM Roger Quadros  wrote:
>
> sys_proto.h no longer exists for K3 platform so drop it.
> Include sizes.h to so SZ_16M is visible.
>
> Signed-off-by: Roger Quadros 
> ---
>
> Notes:
> v2: no change
>
>  drivers/memory/ti-gpmc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/memory/ti-gpmc.c b/drivers/memory/ti-gpmc.c
> index 775e78c9a5..0b8674339e 100644
> --- a/drivers/memory/ti-gpmc.c
> +++ b/drivers/memory/ti-gpmc.c
> @@ -6,7 +6,6 @@
>   */
>
>  #include 
> -#include 
>  #include 
>  #include 
>  #include 
> @@ -17,6 +16,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include "ti-gpmc.h"
>

Reviewed-by: Dario Binacchi 

Thanks and regards,
Dario

>  enum gpmc_clk_domain {
> --
> 2.34.1
>


--

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


[PATCH v3 6/6] board: stm32f469-disco: add splash screen with stmicroelectronics logo

2023-12-11 Thread Dario Binacchi
Display the STMicroelectronics logo with features VIDEO_LOGO and
SPLASH_SCREEN on stm32f469-disco board.

Signed-off-by: Dario Binacchi 
Reviewed-by: Patrice Chotard 

---

Changes in v3:
- Add Patrice Chotard's Reviewed-by tag.
- Remove RFC tag
- Split "[4/5] ARM: dts: stm32: support display on stm32f469-disco board"
  patch in 2 parts:
  - DTS ([4/6] ARM: dts: stm32: support MIPI DSI on stm32f469-disco board)
  - config and LTDC driver update ([5/6] board: stm32f469-disco: add support to 
display)

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag to patches 1, 2 and 3 of the series.
- Fix frame buffer allocation for stm32f469 discovery board.

 configs/stm32f469-discovery_defconfig |   3 +++
 include/configs/stm32f469-discovery.h |   2 ++
 tools/logos/stm32f469-discovery.bmp   | Bin 0 -> 18532 bytes
 3 files changed, 5 insertions(+)
 create mode 100644 tools/logos/stm32f469-discovery.bmp

diff --git a/configs/stm32f469-discovery_defconfig 
b/configs/stm32f469-discovery_defconfig
index 85e795e83e7d..b7e35aeae200 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -42,12 +42,15 @@ CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
 CONFIG_VIDEO=y
+CONFIG_VIDEO_LOGO=y
 CONFIG_BACKLIGHT_GPIO=y
 CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
 CONFIG_VIDEO_STM32=y
 CONFIG_VIDEO_STM32_DSI=y
 CONFIG_VIDEO_STM32_MAX_XRES=480
 CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
 CONFIG_BMP_16BPP=y
 CONFIG_BMP_24BPP=y
 CONFIG_BMP_32BPP=y
diff --git a/include/configs/stm32f469-discovery.h 
b/include/configs/stm32f469-discovery.h
index 62a7e9af0c56..75bb9cd8d06f 100644
--- a/include/configs/stm32f469-discovery.h
+++ b/include/configs/stm32f469-discovery.h
@@ -31,6 +31,8 @@
"scriptaddr=0x00418000\0"   \
"pxefile_addr_r=0x00428000\0" \
"ramdisk_addr_r=0x00438000\0"   \
+   "splashimage=0x00448000\0" \
+   "splashpos=m,m\0" \
BOOTENV
 
 #endif /* __CONFIG_H */
diff --git a/tools/logos/stm32f469-discovery.bmp 
b/tools/logos/stm32f469-discovery.bmp
new file mode 100644
index 
..ecc8d984218fb13fddf0ba9cf68f2cfad829e289
GIT binary patch
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[PATCH v3 5/6] board: stm32f469-disco: add support to display

2023-12-11 Thread Dario Binacchi
Add support to Orise Tech OTM8009A display on stm32f469-disco board.

It was necessary to retrieve the framebuffer address from the device tree
because the address returned by the video-uclass driver pointed to a memory
area that was not usable.

Signed-off-by: Dario Binacchi 
---

Changes in v3:
- Replace SDRAM_SIZE constant with global data gd->ram_size.

Changes in v2:
- Add DRAM_SIZE macro.
- Fix frame buffer allocation function so that it is backward compatible
  with boards other than the one it was introduced for (i. e. stm32f469-disco).
  Tested on stm32f469-disco and stm32mp157f-dk2 boards.

 configs/stm32f469-discovery_defconfig | 13 +++
 drivers/video/stm32/stm32_ltdc.c  | 31 +++
 2 files changed, 44 insertions(+)

diff --git a/configs/stm32f469-discovery_defconfig 
b/configs/stm32f469-discovery_defconfig
index 21c5498466cd..85e795e83e7d 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPT=y
 # CONFIG_RANDOM_UUID is not set
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIMER=y
 # CONFIG_ISO_PARTITION is not set
@@ -40,3 +41,15 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
+CONFIG_VIDEO=y
+CONFIG_BACKLIGHT_GPIO=y
+CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
+CONFIG_VIDEO_STM32=y
+CONFIG_VIDEO_STM32_DSI=y
+CONFIG_VIDEO_STM32_MAX_XRES=480
+CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index 6fd90e33919d..4f60ba8ebeeb 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -495,6 +495,33 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv 
*priv, ulong fb_addr)
setbits_le32(priv->regs + LTDC_L1CR, LXCR_LEN);
 }
 
+#if IS_ENABLED(CONFIG_TARGET_STM32F469_DISCOVERY)
+static int stm32_ltdc_alloc_fb(struct udevice *dev)
+{
+   u32 sdram_size = gd->ram_size;
+   struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
+   phys_addr_t cpu;
+   dma_addr_t bus;
+   u64 dma_size;
+   int ret;
+
+   ret = dev_get_dma_range(dev, , , _size);
+   if (ret) {
+   dev_err(dev, "failed to get dma address\n");
+   return ret;
+   }
+
+   uc_plat->base = bus + sdram_size - ALIGN(uc_plat->size, uc_plat->align);
+   return 0;
+}
+#else
+static inline int stm32_ltdc_alloc_fb(struct udevice *dev)
+{
+   /* Delegate framebuffer allocation to video-uclass */
+   return 0;
+}
+#endif
+
 static int stm32_ltdc_probe(struct udevice *dev)
 {
struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
@@ -605,6 +632,10 @@ static int stm32_ltdc_probe(struct udevice *dev)
priv->crop_h = timings.vactive.typ;
priv->alpha = 0xFF;
 
+   ret = stm32_ltdc_alloc_fb(dev);
+   if (ret)
+   return ret;
+
dev_dbg(dev, "%dx%d %dbpp frame buffer at 0x%lx\n",
timings.hactive.typ, timings.vactive.typ,
VNBITS(priv->l2bpp), uc_plat->base);
-- 
2.43.0



[PATCH v3 4/6] ARM: dts: stm32: support MIPI DSI on stm32f469-disco board

2023-12-11 Thread Dario Binacchi
Unlike Linux, the DSI driver requires the LTDC clock to be properly
probed. Hence, the changes made to the DSI node.

Signed-off-by: Dario Binacchi 
---

(no changes since v1)

 arch/arm/dts/stm32f469-disco-u-boot.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index 8e781c5a7b23..47ba9fa4a783 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -92,7 +92,9 @@
 
  {
clocks = < 0 STM32F4_APB2_CLOCK(DSI)>,
+< 0 STM32F4_APB2_CLOCK(LTDC)>,
 <_hse>;
+   clock-names = "pclk", "px_clk", "ref";
 };
 
  {
@@ -140,6 +142,8 @@
 };
 
  {
+   bootph-all;
+
clocks = < 0 STM32F4_APB2_CLOCK(LTDC)>;
 };
 
-- 
2.43.0



[PATCH v3 3/6] ARM: dts: stm32: make the DSI clock usable by the clock driver

2023-12-11 Thread Dario Binacchi
As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle nodes with "clocks" properties with an index set to 0.

This patch is preparatory for future developments that require the use
of the DSI clock.

[1] Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
Signed-off-by: Dario Binacchi 
Reviewed-by: Patrice Chotard 

---

(no changes since v2)

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag.

 arch/arm/dts/stm32f469-disco-u-boot.dtsi | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index dcc70369cd0d..8e781c5a7b23 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -90,6 +90,11 @@
bootph-all;
 };
 
+ {
+   clocks = < 0 STM32F4_APB2_CLOCK(DSI)>,
+<_hse>;
+};
+
  {
bootph-all;
 };
-- 
2.43.0



[PATCH v3 2/6] ARM: dts: stm32: make the LTDC clock usable by the clock driver

2023-12-11 Thread Dario Binacchi
As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle nodes with "clocks" properties with an index set to 0.

This patch is preparatory for future developments that require the use
of the LTDC clock.

[1] Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
Signed-off-by: Dario Binacchi 
Reviewed-by: Patrice Chotard 

---

(no changes since v2)

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag.

 arch/arm/dts/stm32f469-disco-u-boot.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index c07e2022e4a8..dcc70369cd0d 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -134,6 +134,10 @@
bootph-all;
 };
 
+ {
+   clocks = < 0 STM32F4_APB2_CLOCK(LTDC)>;
+};
+
  {
bootph-all;
 
-- 
2.43.0



[PATCH v3 1/6] ARM: dts: stm32f469-disco: sync with Linux 6.5

2023-12-11 Thread Dario Binacchi
Sync the devicetree with linux 6.5 for stm32f746-disco board.

Signed-off-by: Dario Binacchi 
Reviewed-by: Patrice Chotard 

---

(no changes since v2)

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag.

 arch/arm/dts/stm32f469-disco.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/stm32f469-disco.dts b/arch/arm/dts/stm32f469-disco.dts
index 6e0ffc1903be..c9acabf0f530 100644
--- a/arch/arm/dts/stm32f469-disco.dts
+++ b/arch/arm/dts/stm32f469-disco.dts
@@ -119,7 +119,7 @@
};
};
 
-   panel-dsi@0 {
+   panel@0 {
compatible = "orisetech,otm8009a";
reg = <0>; /* dsi virtual channel (0..3) */
reset-gpios = < 7 GPIO_ACTIVE_LOW>;
@@ -138,7 +138,7 @@
status = "okay";
 
port {
-   ltdc_out_dsi: endpoint@0 {
+   ltdc_out_dsi: endpoint {
remote-endpoint = <_in>;
};
};
-- 
2.43.0



[PATCH v3 0/6] Support display on stm32f469-disco board

2023-12-11 Thread Dario Binacchi
The series adds support for the Orise Tech OTM8009A display on the
stm32f469-disco board. Substantial differences in the drivers for clock
management, LTDC and DSI compared to Linux, made it necessary to modify
the device tree. These changes were made in stm32f469-disco-uboot.dtsi to
avoid altering the Linux device tree. It is therefore desirable, as soon
as possible, to add these drivers the functionalities so that they do not
require device tree properties that deviate from those present in the Linux
version.

Changes in v3:
- Add Patrice Chotard's Reviewed-by tag.
- Remove RFC tag
- Split "[4/5] ARM: dts: stm32: support display on stm32f469-disco board"
  patch in 2 parts:
  - DTS ([4/6] ARM: dts: stm32: support MIPI DSI on stm32f469-disco board)
  - config and LTDC driver update ([5/6] board: stm32f469-disco: add support to 
display)

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag to patches 1, 2 and 3 of the series.
- Fix frame buffer allocation for stm32f469 discovery board.

Dario Binacchi (6):
  ARM: dts: stm32f469-disco: sync with Linux 6.5
  ARM: dts: stm32: make the LTDC clock usable by the clock driver
  ARM: dts: stm32: make the DSI clock usable by the clock driver
  ARM: dts: stm32: support MIPI DSI on stm32f469-disco board
  board: stm32f469-disco: add support to display
  board: stm32f469-disco: add splash screen with stmicroelectronics logo

 arch/arm/dts/stm32f469-disco-u-boot.dtsi |  13 ++
 arch/arm/dts/stm32f469-disco.dts |   4 +--
 configs/stm32f469-discovery_defconfig|  16 
 drivers/video/stm32/stm32_ltdc.c |  31 +++
 include/configs/stm32f469-discovery.h|   2 ++
 tools/logos/stm32f469-discovery.bmp  | Bin 0 -> 18532 bytes
 6 files changed, 64 insertions(+), 2 deletions(-)
 create mode 100644 tools/logos/stm32f469-discovery.bmp

-- 
2.43.0



[RESEND RFC PATCH v2 5/5] board: stm32f469-disco: add splash screen with stmicroelectronics logo

2023-11-30 Thread Dario Binacchi
Display the STMicroelectronics logo with features VIDEO_LOGO and
SPLASH_SCREEN on stm32f469-disco board.

Signed-off-by: Dario Binacchi 

---

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag to patches 1, 2 and 3 of the series.
- Fix frame buffer allocation for stm32f469 discovery board.

 configs/stm32f469-discovery_defconfig |   3 +++
 include/configs/stm32f469-discovery.h |   2 ++
 tools/logos/stm32f469-discovery.bmp   | Bin 0 -> 18532 bytes
 3 files changed, 5 insertions(+)
 create mode 100644 tools/logos/stm32f469-discovery.bmp

diff --git a/configs/stm32f469-discovery_defconfig 
b/configs/stm32f469-discovery_defconfig
index 85e795e83e7d..b7e35aeae200 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -42,12 +42,15 @@ CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
 CONFIG_VIDEO=y
+CONFIG_VIDEO_LOGO=y
 CONFIG_BACKLIGHT_GPIO=y
 CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
 CONFIG_VIDEO_STM32=y
 CONFIG_VIDEO_STM32_DSI=y
 CONFIG_VIDEO_STM32_MAX_XRES=480
 CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
 CONFIG_BMP_16BPP=y
 CONFIG_BMP_24BPP=y
 CONFIG_BMP_32BPP=y
diff --git a/include/configs/stm32f469-discovery.h 
b/include/configs/stm32f469-discovery.h
index 62a7e9af0c56..75bb9cd8d06f 100644
--- a/include/configs/stm32f469-discovery.h
+++ b/include/configs/stm32f469-discovery.h
@@ -31,6 +31,8 @@
"scriptaddr=0x00418000\0"   \
"pxefile_addr_r=0x00428000\0" \
"ramdisk_addr_r=0x00438000\0"   \
+   "splashimage=0x00448000\0" \
+   "splashpos=m,m\0" \
BOOTENV
 
 #endif /* __CONFIG_H */
diff --git a/tools/logos/stm32f469-discovery.bmp 
b/tools/logos/stm32f469-discovery.bmp
new file mode 100644
index 
..ecc8d984218fb13fddf0ba9cf68f2cfad829e289
GIT binary patch
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[RESEND RFC PATCH v2 4/5] ARM: dts: stm32: support display on stm32f469-disco board

2023-11-30 Thread Dario Binacchi
Add support to Orise Tech OTM8009A display on stm32f469-disco board.

It was necessary to retrieve the framebuffer address from the device tree
because the address returned by the video-uclass driver pointed to a memory
area that was not usable.

Furthermore, unlike Linux, the DSI driver requires the LTDC clock to be
properly probed. Hence, the changes made to the DSI node in
stm32f469-disco-u-boot.dtsi.

Signed-off-by: Dario Binacchi 

---

Changes in v2:
- Add DRAM_SIZE macro.
- Fix frame buffer allocation function so that it is backward compatible
  with boards other than the one it was introduced for (i. e. stm32f469-disco).
  Tested on stm32f469-disco and stm32mp157f-dk2 boards.

 arch/arm/dts/stm32f469-disco-u-boot.dtsi |  4 +++
 configs/stm32f469-discovery_defconfig| 13 ++
 drivers/video/stm32/stm32_ltdc.c | 31 
 3 files changed, 48 insertions(+)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index 8e781c5a7b23..47ba9fa4a783 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -92,7 +92,9 @@
 
  {
clocks = < 0 STM32F4_APB2_CLOCK(DSI)>,
+< 0 STM32F4_APB2_CLOCK(LTDC)>,
 <_hse>;
+   clock-names = "pclk", "px_clk", "ref";
 };
 
  {
@@ -140,6 +142,8 @@
 };
 
  {
+   bootph-all;
+
clocks = < 0 STM32F4_APB2_CLOCK(LTDC)>;
 };
 
diff --git a/configs/stm32f469-discovery_defconfig 
b/configs/stm32f469-discovery_defconfig
index 21c5498466cd..85e795e83e7d 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPT=y
 # CONFIG_RANDOM_UUID is not set
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIMER=y
 # CONFIG_ISO_PARTITION is not set
@@ -40,3 +41,15 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
+CONFIG_VIDEO=y
+CONFIG_BACKLIGHT_GPIO=y
+CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
+CONFIG_VIDEO_STM32=y
+CONFIG_VIDEO_STM32_DSI=y
+CONFIG_VIDEO_STM32_MAX_XRES=480
+CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index 6fd90e33919d..9054db1d78b3 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -495,6 +495,33 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv 
*priv, ulong fb_addr)
setbits_le32(priv->regs + LTDC_L1CR, LXCR_LEN);
 }
 
+#if IS_ENABLED(CONFIG_TARGET_STM32F469_DISCOVERY)
+static int stm32_ltdc_alloc_fb(struct udevice *dev)
+{
+#define SDRAM_SIZE 0x100 /* 128Mbit = 16 Mbyte = 0x100 */
+   struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
+   phys_addr_t cpu;
+   dma_addr_t bus;
+   u64 dma_size;
+   int ret;
+
+   ret = dev_get_dma_range(dev, , , _size);
+   if (ret) {
+   dev_err(dev, "failed to get dma address\n");
+   return ret;
+   }
+
+   uc_plat->base = bus + SDRAM_SIZE - ALIGN(uc_plat->size, uc_plat->align);
+   return 0;
+}
+#else
+static inline int stm32_ltdc_alloc_fb(struct udevice *dev)
+{
+   /* Delegate framebuffer allocation to video-uclass */
+   return 0;
+}
+#endif
+
 static int stm32_ltdc_probe(struct udevice *dev)
 {
struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
@@ -605,6 +632,10 @@ static int stm32_ltdc_probe(struct udevice *dev)
priv->crop_h = timings.vactive.typ;
priv->alpha = 0xFF;
 
+   ret = stm32_ltdc_alloc_fb(dev);
+   if (ret)
+   return ret;
+
dev_dbg(dev, "%dx%d %dbpp frame buffer at 0x%lx\n",
timings.hactive.typ, timings.vactive.typ,
VNBITS(priv->l2bpp), uc_plat->base);
-- 
2.43.0



[RESEND RFC PATCH v2 3/5] ARM: dts: stm32: make the DSI clock usable by the clock driver

2023-11-30 Thread Dario Binacchi
As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle nodes with "clocks" properties with an index set to 0.

This patch is preparatory for future developments that require the use
of the DSI clock.

[1] Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
Signed-off-by: Dario Binacchi 
Reviewed-by: Patrice Chotard 

---

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag.

 arch/arm/dts/stm32f469-disco-u-boot.dtsi | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index dcc70369cd0d..8e781c5a7b23 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -90,6 +90,11 @@
bootph-all;
 };
 
+ {
+   clocks = < 0 STM32F4_APB2_CLOCK(DSI)>,
+<_hse>;
+};
+
  {
bootph-all;
 };
-- 
2.43.0



[RESEND RFC PATCH v2 2/5] ARM: dts: stm32: make the LTDC clock usable by the clock driver

2023-11-30 Thread Dario Binacchi
As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle nodes with "clocks" properties with an index set to 0.

This patch is preparatory for future developments that require the use
of the LTDC clock.

[1] Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
Signed-off-by: Dario Binacchi 
Reviewed-by: Patrice Chotard 

---

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag.

 arch/arm/dts/stm32f469-disco-u-boot.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index c07e2022e4a8..dcc70369cd0d 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -134,6 +134,10 @@
bootph-all;
 };
 
+ {
+   clocks = < 0 STM32F4_APB2_CLOCK(LTDC)>;
+};
+
  {
bootph-all;
 
-- 
2.43.0



[RESEND RFC PATCH v2 1/5] ARM: dts: stm32f469-disco: sync with Linux 6.5

2023-11-30 Thread Dario Binacchi
Sync the devicetree with linux 6.5 for stm32f746-disco board.

Signed-off-by: Dario Binacchi 
Reviewed-by: Patrice Chotard 

---

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag.

 arch/arm/dts/stm32f469-disco.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/stm32f469-disco.dts b/arch/arm/dts/stm32f469-disco.dts
index 6e0ffc1903be..c9acabf0f530 100644
--- a/arch/arm/dts/stm32f469-disco.dts
+++ b/arch/arm/dts/stm32f469-disco.dts
@@ -119,7 +119,7 @@
};
};
 
-   panel-dsi@0 {
+   panel@0 {
compatible = "orisetech,otm8009a";
reg = <0>; /* dsi virtual channel (0..3) */
reset-gpios = < 7 GPIO_ACTIVE_LOW>;
@@ -138,7 +138,7 @@
status = "okay";
 
port {
-   ltdc_out_dsi: endpoint@0 {
+   ltdc_out_dsi: endpoint {
remote-endpoint = <_in>;
};
};
-- 
2.43.0



[RESEND RFC PATCH v2 0/5] Support display on stm32f469-disco board

2023-11-30 Thread Dario Binacchi
The series adds support for the Orise Tech OTM8009A display on the
stm32f469-disco board. Substantial differences in the drivers for clock
management, LTDC and DSI compared to Linux, made it necessary to modify
the device tree. These changes were made in stm32f469-disco-uboot.dtsi to
avoid altering the Linux device tree. It is therefore desirable, as soon
as possible, to add these drivers the functionalities so that they do not
require device tree properties that deviate from those present in the Linux
version.

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag to patches 1, 2 and 3 of the series.
- Fix frame buffer allocation for stm32f469 discovery board.

Dario Binacchi (5):
  ARM: dts: stm32f469-disco: sync with Linux 6.5
  ARM: dts: stm32: make the LTDC clock usable by the clock driver
  ARM: dts: stm32: make the DSI clock usable by the clock driver
  ARM: dts: stm32: support display on stm32f469-disco board
  board: stm32f469-disco: add splash screen with stmicroelectronics logo

 arch/arm/dts/stm32f469-disco-u-boot.dtsi |  13 ++
 arch/arm/dts/stm32f469-disco.dts |   4 +--
 configs/stm32f469-discovery_defconfig|  16 
 drivers/video/stm32/stm32_ltdc.c |  31 +++
 include/configs/stm32f469-discovery.h|   2 ++
 tools/logos/stm32f469-discovery.bmp  | Bin 0 -> 18532 bytes
 6 files changed, 64 insertions(+), 2 deletions(-)
 create mode 100644 tools/logos/stm32f469-discovery.bmp

-- 
2.43.0



[PATCH] binman: doc: fix typo

2023-11-23 Thread Dario Binacchi
s/use set/set/

Signed-off-by: Dario Binacchi 
---

 tools/binman/binman.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst
index 020988d955f0..230e055667f3 100644
--- a/tools/binman/binman.rst
+++ b/tools/binman/binman.rst
@@ -2060,7 +2060,7 @@ don't have access to the blobs.
 If the blobs are in a different directory, you can specify this with the `-I`
 option.
 
-For U-Boot, you can use set the BINMAN_INDIRS environment variable to provide a
+For U-Boot, you can set the BINMAN_INDIRS environment variable to provide a
 space-separated list of directories to search for binary blobs::
 
BINMAN_INDIRS="odroid-c4/fip/g12a \
-- 
2.42.0



[PATCH] binman: doc: fix typo

2023-11-23 Thread Dario Binacchi
s/use set/set/

Signed-off-by: Dario Binacchi 
---

 tools/binman/binman.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst
index 020988d955f0..230e055667f3 100644
--- a/tools/binman/binman.rst
+++ b/tools/binman/binman.rst
@@ -2060,7 +2060,7 @@ don't have access to the blobs.
 If the blobs are in a different directory, you can specify this with the `-I`
 option.
 
-For U-Boot, you can use set the BINMAN_INDIRS environment variable to provide a
+For U-Boot, you can set the BINMAN_INDIRS environment variable to provide a
 space-separated list of directories to search for binary blobs::
 
BINMAN_INDIRS="odroid-c4/fip/g12a \
-- 
2.42.0



[PATCH 2/2] clk: stm32f: fix setting of LCD clock

2023-11-11 Thread Dario Binacchi
Set pllsaidivr only if the PLLSAIR output frequency is an exact multiple
of the pixel clock rate. Otherwise, we search through all combinations
of pllsaidivr * pllsair and use the one which gives the rate closest to
requested one.

Fixes: 5e993508cb25 ("clk: clk_stm32f: Add set_rate for LTDC clock")
Signed-off-by: Dario Binacchi 

---

 drivers/clk/stm32/clk-stm32f.c | 26 ++
 1 file changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/clk/stm32/clk-stm32f.c b/drivers/clk/stm32/clk-stm32f.c
index 4c1864193357..d68c75ed2013 100644
--- a/drivers/clk/stm32/clk-stm32f.c
+++ b/drivers/clk/stm32/clk-stm32f.c
@@ -522,18 +522,20 @@ static ulong stm32_set_rate(struct clk *clk, ulong rate)
 
/* get the current PLLSAIR output freq */
pllsair_rate = stm32_clk_get_pllsai_rate(priv, PLLSAIR);
-   best_div = pllsair_rate / rate;
-
-   /* look into pllsaidivr_table if this divider is available*/
-   for (i = 0 ; i < sizeof(pllsaidivr_table); i++)
-   if (best_div == pllsaidivr_table[i]) {
-   /* set pll_saidivr with found value */
-   clrsetbits_le32(>dckcfgr,
-   RCC_DCKCFGR_PLLSAIDIVR_MASK,
-   pllsaidivr_table[i] <<
-   RCC_DCKCFGR_PLLSAIDIVR_SHIFT);
-   return rate;
-   }
+   if ((pllsair_rate % rate) == 0) {
+   best_div = pllsair_rate / rate;
+
+   /* look into pllsaidivr_table if this divider is available */
+   for (i = 0 ; i < sizeof(pllsaidivr_table); i++)
+   if (best_div == pllsaidivr_table[i]) {
+   /* set pll_saidivr with found value */
+   clrsetbits_le32(>dckcfgr,
+   RCC_DCKCFGR_PLLSAIDIVR_MASK,
+   pllsaidivr_table[i] <<
+   RCC_DCKCFGR_PLLSAIDIVR_SHIFT);
+   return rate;
+   }
+   }
 
/*
 * As no pllsaidivr value is suitable to obtain requested freq,
-- 
2.42.0



[PATCH 1/2] clk: stm32f: fix setting of division factor for LCD_CLK

2023-11-11 Thread Dario Binacchi
The value to be written to the register must be appropriately shifted,
as is correctly done in other parts of the code.

Fixes: 5e993508cb25 ("clk: clk_stm32f: Add set_rate for LTDC clock")
Signed-off-by: Dario Binacchi 
---

 drivers/clk/stm32/clk-stm32f.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/stm32/clk-stm32f.c b/drivers/clk/stm32/clk-stm32f.c
index ed7660196ef0..4c1864193357 100644
--- a/drivers/clk/stm32/clk-stm32f.c
+++ b/drivers/clk/stm32/clk-stm32f.c
@@ -530,7 +530,8 @@ static ulong stm32_set_rate(struct clk *clk, ulong rate)
/* set pll_saidivr with found value */
clrsetbits_le32(>dckcfgr,
RCC_DCKCFGR_PLLSAIDIVR_MASK,
-   pllsaidivr_table[i]);
+   pllsaidivr_table[i] <<
+   RCC_DCKCFGR_PLLSAIDIVR_SHIFT);
return rate;
}
 
-- 
2.42.0



[PATCH] ARM: dts: stm32f769-disco: rework ltdc node

2023-11-11 Thread Dario Binacchi
With commit f479f5dbb7ac ("ARM: dts: stm32: add ltdc support on
stm32f746 MCU"), which adds the 'ltdc' node in stm32f746.dtsi, we can
simplify stm32f769-disco-uboot.dtsi and align stm32f769-disco.dtsi with
the kernel version.

Signed-off-by: Dario Binacchi 

---

 arch/arm/dts/stm32f769-disco-u-boot.dtsi | 23 +--
 arch/arm/dts/stm32f769-disco.dts |  4 
 2 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
index 2c823cce98b4..add55c96e21f 100644
--- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
@@ -70,22 +70,17 @@
};
};
};
+   };
+};
 
-   ltdc: display-controller@40016800 {
-   compatible = "st,stm32-ltdc";
-   reg = <0x40016800 0x200>;
-   resets = < STM32F7_APB2_RESET(LTDC)>;
-   clocks = < 0 STM32F7_APB2_CLOCK(LTDC)>;
-
-   status = "okay";
-   bootph-all;
+ {
+   clocks = < 0 STM32F7_APB2_CLOCK(LTDC)>;
+   bootph-all;
 
-   ports {
-   port@0 {
-   dp_out: endpoint {
-   remote-endpoint = <_in>;
-   };
-   };
+   ports {
+   port@0 {
+   dp_out: endpoint {
+   remote-endpoint = <_in>;
};
};
};
diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts
index 6f93fc7bcfcd..d63cd2ba7eb4 100644
--- a/arch/arm/dts/stm32f769-disco.dts
+++ b/arch/arm/dts/stm32f769-disco.dts
@@ -86,6 +86,10 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
 };
-- 
2.42.0



Re: [PATCH 00/15] nand: Add sandbox tests

2023-11-09 Thread Dario Binacchi
Sean, All

On Sat, Nov 4, 2023 at 8:46 PM Sean Anderson  wrote:
>
> On 11/2/23 10:18, Dario Binacchi wrote:
> > On Thu, Nov 2, 2023 at 3:13 PM Sean Anderson  wrote:
> >>
> >> On 11/2/23 10:08, Dario Binacchi wrote:
> >>> On Thu, Nov 2, 2023 at 3:06 PM Sean Anderson  wrote:
> >>>>
> >>>> On 11/2/23 10:01, Dario Binacchi wrote:
> >>>>> Sean, All,
> >>>>>
> >>>>> On Sun, Oct 29, 2023 at 4:48 AM Sean Anderson  wrote:
> >>>>>>
> >>>>>> This series tests raw nand flash in sandbox and fixes various bugs 
> >>>>>> discovered in
> >>>>>> the process. I've tried to do things in a contemporary manner, 
> >>>>>> avoiding the
> >>>>>> (numerous) variations present on only a few boards. The test is pretty 
> >>>>>> minimal.
> >>>>>> Future work could test the rest of the nand API as well as the MTD API.
> >>>>>>
> >>>>>> Bloat at [1] (for boards with SPL_NAND_SUPPORT enabled). Almost
> >>>>>> everything grows by a few bytes due to nand_page_size. A few boards 
> >>>>>> grow more,
> >>>>>> mostly those using nand_spl_loaders.c.
> >>>>>>
> >>>>>> [1] https://gist.github.com/Forty-Bot/9694f3401893c9e706ccc374922de6c2
> >>>>>>
> >>>>>>
> >>>>>> Sean Anderson (15):
> >>>>>>  spl: nand: Fix NULL-pointer dereference
> >>>>>>  nand: Don't dereference NULL manufacturer_desc
> >>>>>>  nand: Calculate SYS_NAND_PAGE_COUNT automatically
> >>>>>>  nand: spl_loaders: Only read enough pages to load the image
> >>>>>>  spl: legacy: Honor bl_len when decompressing
> >>>>>>  spl: nand: Set bl_len to page size
> >>>>>>  cmd: nand: Map memory before accessing it
> >>>>>>  spl: nand: Map memory before accessing it
> >>>>>>  mtd: Rename SPL_MTD_SUPPORT to SPL_MTD
> >>>>>>  mtd: Add some fallbacks for add/del_mtd_device
> >>>>>>  nand: Add function to unregister NAND devices
> >>>>>>  nand: Allow reinitialization
> >>>>>>  arch: sandbox: Add function to create temporary files
> >>>>>>  nand: Add sandbox driver
> >>>>>>  test: spl: Add a test for NAND
> >>>>>>
> >>>>>> README|   9 +-
> >>>>>> arch/sandbox/cpu/os.c |  17 +
> >>>>>> arch/sandbox/dts/test.dts |  67 ++
> >>>>>> arch/sandbox/include/asm/spl.h|   1 +
> >>>>>> cmd/nand.c|  26 +-
> >>>>>> common/spl/Kconfig|   2 +-
> >>>>>> common/spl/spl_legacy.c   |  18 +-
> >>>>>> common/spl/spl_nand.c |  22 +-
> >>>>>> configs/am335x_baltos_defconfig   |   3 +-
> >>>>>> configs/am335x_evm_defconfig  |   3 +-
> >>>>>> configs/am335x_evm_spiboot_defconfig  |   2 +-
> >>>>>> configs/am335x_guardian_defconfig |   1 -
> >>>>>> configs/am335x_hs_evm_defconfig   |   2 +-
> >>>>>> configs/am335x_hs_evm_uart_defconfig  |   2 +-
> >>>>>> configs/am335x_igep003x_defconfig |   3 +-
> >>>>>> configs/am335x_sl50_defconfig |   2 +-
> >>>>>> configs/am3517_evm_defconfig  |   3 +-
> >>>>>> configs/am43xx_evm_defconfig  |   3 +-
> >>>>>> configs/am43xx_evm_rtconly_defconfig  |   3 +-
> >>>>>> configs/am43xx_evm_usbhost_boot_defconfig |   3 +-
> >>>>>> configs/am43xx_hs_evm_defconfig   |   3 +-
> >>>>>> configs/am62ax_evm_r5_defconfig   |   2 +-
> >>>>>> configs/am65x_evm_a53_defconfig   |   2 +-
> >>>>>> configs/axm_defconfig |   1 -
>

Re: [PATCH 00/15] nand: Add sandbox tests

2023-11-02 Thread Dario Binacchi
On Thu, Nov 2, 2023 at 3:13 PM Sean Anderson  wrote:
>
> On 11/2/23 10:08, Dario Binacchi wrote:
> > On Thu, Nov 2, 2023 at 3:06 PM Sean Anderson  wrote:
> >>
> >> On 11/2/23 10:01, Dario Binacchi wrote:
> >>> Sean, All,
> >>>
> >>> On Sun, Oct 29, 2023 at 4:48 AM Sean Anderson  wrote:
> >>>>
> >>>> This series tests raw nand flash in sandbox and fixes various bugs 
> >>>> discovered in
> >>>> the process. I've tried to do things in a contemporary manner, avoiding 
> >>>> the
> >>>> (numerous) variations present on only a few boards. The test is pretty 
> >>>> minimal.
> >>>> Future work could test the rest of the nand API as well as the MTD API.
> >>>>
> >>>> Bloat at [1] (for boards with SPL_NAND_SUPPORT enabled). Almost
> >>>> everything grows by a few bytes due to nand_page_size. A few boards grow 
> >>>> more,
> >>>> mostly those using nand_spl_loaders.c.
> >>>>
> >>>> [1] https://gist.github.com/Forty-Bot/9694f3401893c9e706ccc374922de6c2
> >>>>
> >>>>
> >>>> Sean Anderson (15):
> >>>> spl: nand: Fix NULL-pointer dereference
> >>>> nand: Don't dereference NULL manufacturer_desc
> >>>> nand: Calculate SYS_NAND_PAGE_COUNT automatically
> >>>> nand: spl_loaders: Only read enough pages to load the image
> >>>> spl: legacy: Honor bl_len when decompressing
> >>>> spl: nand: Set bl_len to page size
> >>>> cmd: nand: Map memory before accessing it
> >>>> spl: nand: Map memory before accessing it
> >>>> mtd: Rename SPL_MTD_SUPPORT to SPL_MTD
> >>>> mtd: Add some fallbacks for add/del_mtd_device
> >>>> nand: Add function to unregister NAND devices
> >>>> nand: Allow reinitialization
> >>>> arch: sandbox: Add function to create temporary files
> >>>> nand: Add sandbox driver
> >>>> test: spl: Add a test for NAND
> >>>>
> >>>>README|   9 +-
> >>>>arch/sandbox/cpu/os.c |  17 +
> >>>>arch/sandbox/dts/test.dts |  67 ++
> >>>>arch/sandbox/include/asm/spl.h|   1 +
> >>>>cmd/nand.c|  26 +-
> >>>>common/spl/Kconfig|   2 +-
> >>>>common/spl/spl_legacy.c   |  18 +-
> >>>>common/spl/spl_nand.c |  22 +-
> >>>>configs/am335x_baltos_defconfig   |   3 +-
> >>>>configs/am335x_evm_defconfig  |   3 +-
> >>>>configs/am335x_evm_spiboot_defconfig  |   2 +-
> >>>>configs/am335x_guardian_defconfig |   1 -
> >>>>configs/am335x_hs_evm_defconfig   |   2 +-
> >>>>configs/am335x_hs_evm_uart_defconfig  |   2 +-
> >>>>configs/am335x_igep003x_defconfig |   3 +-
> >>>>configs/am335x_sl50_defconfig |   2 +-
> >>>>configs/am3517_evm_defconfig  |   3 +-
> >>>>configs/am43xx_evm_defconfig  |   3 +-
> >>>>configs/am43xx_evm_rtconly_defconfig  |   3 +-
> >>>>configs/am43xx_evm_usbhost_boot_defconfig |   3 +-
> >>>>configs/am43xx_hs_evm_defconfig   |   3 +-
> >>>>configs/am62ax_evm_r5_defconfig   |   2 +-
> >>>>configs/am65x_evm_a53_defconfig   |   2 +-
> >>>>configs/axm_defconfig |   1 -
> >>>>configs/chiliboard_defconfig  |   1 -
> >>>>configs/cm_t43_defconfig  |   2 +-
> >>>>configs/corvus_defconfig  |   1 -
> >>>>configs/da850evm_nand_defconfig   |   1 -
> >>>>configs/devkit3250_defconfig  |   1 -
> >>>>configs/devkit8000_defconfig  |   1 -
> >>>>configs/dra7xx_evm_defconfig  |   1 -
> >>>>configs/draco_defconfig   |   1 -
> >>>>configs/etamin_defconfig  

Re: [PATCH 03/15] nand: Calculate SYS_NAND_PAGE_COUNT automatically

2023-11-02 Thread Dario Binacchi
Sean, All

On Thu, Nov 2, 2023 at 3:17 PM Sean Anderson  wrote:
>
> On 11/2/23 05:53, Dario Binacchi wrote:
> > Sean, All
> >
> > On Sun, Oct 29, 2023 at 4:48 AM Sean Anderson  wrote:
> >>
> >> Contrary to what the help message says, this is the number of pages per
> >> block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and
> >> SYS_NAND_PAGE_SIZE.
> >>
> >> Signed-off-by: Sean Anderson 
> >> ---
> >>
> >>   README  | 9 -
> >>   configs/am335x_baltos_defconfig | 1 -
> >>   configs/am335x_evm_defconfig| 1 -
> >>   configs/am335x_guardian_defconfig   | 1 -
> >>   configs/am335x_igep003x_defconfig   | 1 -
> >>   configs/am3517_evm_defconfig| 1 -
> >>   configs/am43xx_evm_defconfig| 1 -
> >>   configs/am43xx_evm_rtconly_defconfig| 1 -
> >>   configs/am43xx_evm_usbhost_boot_defconfig   | 1 -
> >>   configs/am43xx_hs_evm_defconfig | 1 -
> >>   configs/axm_defconfig   | 1 -
> >>   configs/chiliboard_defconfig| 1 -
> >>   configs/corvus_defconfig| 1 -
> >>   configs/da850evm_nand_defconfig | 1 -
> >>   configs/devkit3250_defconfig| 1 -
> >>   configs/devkit8000_defconfig| 1 -
> >>   configs/dra7xx_evm_defconfig| 1 -
> >>   configs/draco_defconfig | 1 -
> >>   configs/etamin_defconfig| 1 -
> >>   configs/gardena-smart-gateway-at91sam_defconfig | 1 -
> >>   configs/igep00x0_defconfig  | 1 -
> >>   configs/m53menlo_defconfig  | 1 -
> >>   configs/omap35_logic_defconfig  | 1 -
> >>   configs/omap35_logic_somlv_defconfig| 1 -
> >>   configs/omap3_beagle_defconfig  | 1 -
> >>   configs/omap3_evm_defconfig | 1 -
> >>   configs/omap3_logic_defconfig   | 1 -
> >>   configs/omap3_logic_somlv_defconfig | 1 -
> >>   configs/omapl138_lcdk_defconfig | 1 -
> >>   configs/phycore-am335x-r2-regor_defconfig   | 1 -
> >>   configs/phycore-am335x-r2-wega_defconfig| 1 -
> >>   configs/pxm2_defconfig  | 1 -
> >>   configs/rastaban_defconfig  | 1 -
> >>   configs/rut_defconfig   | 1 -
> >>   configs/sama5d3_xplained_nandflash_defconfig| 1 -
> >>   configs/sama5d3xek_nandflash_defconfig  | 1 -
> >>   configs/sama5d4_xplained_nandflash_defconfig| 1 -
> >>   configs/sama5d4ek_nandflash_defconfig   | 1 -
> >>   configs/smartweb_defconfig  | 1 -
> >>   configs/taurus_defconfig| 1 -
> >>   configs/thuban_defconfig| 1 -
> >>   drivers/mtd/nand/raw/Kconfig| 8 
> >>   drivers/mtd/nand/raw/am335x_spl_bch.c   | 3 ++-
> >>   drivers/mtd/nand/raw/atmel_nand.c   | 5 +++--
> >>   drivers/mtd/nand/raw/mxc_nand_spl.c | 5 +++--
> >>   drivers/mtd/nand/raw/nand_spl_loaders.c | 2 +-
> >>   drivers/mtd/nand/raw/nand_spl_simple.c  | 5 +++--
> >>   drivers/mtd/nand/raw/omap_gpmc.c| 3 ++-
> >>   include/system-constants.h  | 3 +++
> >>   49 files changed, 21 insertions(+), 62 deletions(-)
> >>
> >> diff --git a/README b/README
> >> index 60c6b8a19db..00d422737fb 100644
> >> --- a/README
> >> +++ b/README
> >> @@ -1191,11 +1191,10 @@ The following options need to be configured:
> >>  Support for a lightweight UBI (fastmap) scanner and
> >>  loader
> >>
> >> -   CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
> >> -   CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
> >> -   CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
> >> -   CFG_SYS_NAND_ECCPOS, CFG_SYS_NAND_ECCSIZE,
> >> -   CFG_SYS_NAND_ECCBYTES
> >> +   CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_SIZE,
> >> +   CONFIG_SYS_NAND_OOBSIZE, CONFIG_SYS_NAND_BLOCK_SIZE,
> >&

Re: [PATCH 00/15] nand: Add sandbox tests

2023-11-02 Thread Dario Binacchi
On Thu, Nov 2, 2023 at 3:06 PM Sean Anderson  wrote:
>
> On 11/2/23 10:01, Dario Binacchi wrote:
> > Sean, All,
> >
> > On Sun, Oct 29, 2023 at 4:48 AM Sean Anderson  wrote:
> >>
> >> This series tests raw nand flash in sandbox and fixes various bugs 
> >> discovered in
> >> the process. I've tried to do things in a contemporary manner, avoiding the
> >> (numerous) variations present on only a few boards. The test is pretty 
> >> minimal.
> >> Future work could test the rest of the nand API as well as the MTD API.
> >>
> >> Bloat at [1] (for boards with SPL_NAND_SUPPORT enabled). Almost
> >> everything grows by a few bytes due to nand_page_size. A few boards grow 
> >> more,
> >> mostly those using nand_spl_loaders.c.
> >>
> >> [1] https://gist.github.com/Forty-Bot/9694f3401893c9e706ccc374922de6c2
> >>
> >>
> >> Sean Anderson (15):
> >>spl: nand: Fix NULL-pointer dereference
> >>nand: Don't dereference NULL manufacturer_desc
> >>nand: Calculate SYS_NAND_PAGE_COUNT automatically
> >>nand: spl_loaders: Only read enough pages to load the image
> >>spl: legacy: Honor bl_len when decompressing
> >>spl: nand: Set bl_len to page size
> >>cmd: nand: Map memory before accessing it
> >>spl: nand: Map memory before accessing it
> >>mtd: Rename SPL_MTD_SUPPORT to SPL_MTD
> >>mtd: Add some fallbacks for add/del_mtd_device
> >>nand: Add function to unregister NAND devices
> >>nand: Allow reinitialization
> >>arch: sandbox: Add function to create temporary files
> >>nand: Add sandbox driver
> >>test: spl: Add a test for NAND
> >>
> >>   README|   9 +-
> >>   arch/sandbox/cpu/os.c |  17 +
> >>   arch/sandbox/dts/test.dts |  67 ++
> >>   arch/sandbox/include/asm/spl.h|   1 +
> >>   cmd/nand.c|  26 +-
> >>   common/spl/Kconfig|   2 +-
> >>   common/spl/spl_legacy.c   |  18 +-
> >>   common/spl/spl_nand.c |  22 +-
> >>   configs/am335x_baltos_defconfig   |   3 +-
> >>   configs/am335x_evm_defconfig  |   3 +-
> >>   configs/am335x_evm_spiboot_defconfig  |   2 +-
> >>   configs/am335x_guardian_defconfig |   1 -
> >>   configs/am335x_hs_evm_defconfig   |   2 +-
> >>   configs/am335x_hs_evm_uart_defconfig  |   2 +-
> >>   configs/am335x_igep003x_defconfig |   3 +-
> >>   configs/am335x_sl50_defconfig |   2 +-
> >>   configs/am3517_evm_defconfig  |   3 +-
> >>   configs/am43xx_evm_defconfig  |   3 +-
> >>   configs/am43xx_evm_rtconly_defconfig  |   3 +-
> >>   configs/am43xx_evm_usbhost_boot_defconfig |   3 +-
> >>   configs/am43xx_hs_evm_defconfig   |   3 +-
> >>   configs/am62ax_evm_r5_defconfig   |   2 +-
> >>   configs/am65x_evm_a53_defconfig   |   2 +-
> >>   configs/axm_defconfig |   1 -
> >>   configs/chiliboard_defconfig  |   1 -
> >>   configs/cm_t43_defconfig  |   2 +-
> >>   configs/corvus_defconfig  |   1 -
> >>   configs/da850evm_nand_defconfig   |   1 -
> >>   configs/devkit3250_defconfig  |   1 -
> >>   configs/devkit8000_defconfig  |   1 -
> >>   configs/dra7xx_evm_defconfig  |   1 -
> >>   configs/draco_defconfig   |   1 -
> >>   configs/etamin_defconfig  |   1 -
> >>   .../gardena-smart-gateway-at91sam_defconfig   |   1 -
> >>   configs/igep00x0_defconfig|   3 +-
> >>   configs/imx6ulz_smm_m2_defconfig  |   2 +-
> >>   configs/imx8mn_bsh_smm_s2_defconfig   |   2 +-
> >>   configs/j7200_evm_a72_defconfig   |   2 +-
> >>   configs/j7200_evm_r5_defconfig|   2 +-
> >>   configs/j721e_evm_a72_defconfig   |   2 +-
> >>   configs/j721e_evm_r5_defconfig|   2 +-
> >>   configs/j721s2_evm_a72_defconfig  |   2 +-
> >>   configs/j721s2_evm_r5_defconfig   |   2 +-
> >>   configs/m53me

Re: [PATCH 00/15] nand: Add sandbox tests

2023-11-02 Thread Dario Binacchi
  1 -
>  configs/sama5d4_xplained_nandflash_defconfig  |   1 -
>  configs/sama5d4ek_nandflash_defconfig |   1 -
>  configs/sandbox64_defconfig   |  10 +-
>  configs/sandbox_defconfig |   9 +
>  configs/sandbox_noinst_defconfig  |  21 +-
>  configs/smartweb_defconfig|   1 -
>  configs/socfpga_secu1_defconfig   |   2 +-
>  configs/stm32746g-eval_spl_defconfig  |   2 +-
>  configs/stm32f746-disco_spl_defconfig |   2 +-
>  configs/stm32f769-disco_spl_defconfig |   2 +-
>  configs/stm32mp15_basic_defconfig |   2 +-
>  configs/stm32mp15_dhcom_basic_defconfig   |   2 +-
>  configs/stm32mp15_dhcor_basic_defconfig   |   2 +-
>  configs/taurus_defconfig  |   1 -
>  configs/thuban_defconfig  |   1 -
>  drivers/mtd/Makefile  |   2 +-
>  drivers/mtd/nand/raw/Kconfig  |  27 +-
>  drivers/mtd/nand/raw/Makefile |   1 +
>  drivers/mtd/nand/raw/am335x_spl_bch.c |   8 +-
>  drivers/mtd/nand/raw/atmel_nand.c |  10 +-
>  drivers/mtd/nand/raw/denali_spl.c |   5 +
>  drivers/mtd/nand/raw/fsl_ifc_spl.c|   8 +
>  drivers/mtd/nand/raw/lpc32xx_nand_mlc.c   |   5 +
>  drivers/mtd/nand/raw/mt7621_nand_spl.c|   5 +
>  drivers/mtd/nand/raw/mxc_nand_spl.c   |  10 +-
>  drivers/mtd/nand/raw/mxs_nand_spl.c   |   5 +
>  drivers/mtd/nand/raw/nand.c   |  66 +-
>  drivers/mtd/nand/raw/nand_base.c  |   7 +-
>  drivers/mtd/nand/raw/nand_spl_loaders.c   |   5 +-
>  drivers/mtd/nand/raw/nand_spl_simple.c|  10 +-
>  drivers/mtd/nand/raw/omap_gpmc.c  |   3 +-
>  drivers/mtd/nand/raw/sand_nand.c  | 711 ++
>  drivers/mtd/nand/raw/sunxi_nand_spl.c |   8 +-
>  drivers/mtd/onenand/onenand_uboot.c   |   2 -
>  include/linux/mtd/mtd.h   |  12 +
>  include/mtd/cfi_flash.h   |   2 +-
>  include/nand.h|   3 +
>  include/os.h  |  13 +
>  include/system-constants.h|   3 +
>  test/dm/Makefile  |   1 +
>  test/dm/nand.c| 106 +++
>  test/image/Kconfig|   9 +
>  test/image/Makefile   |   1 +
>  test/image/spl_load_nand.c|  54 ++
>  102 files changed, 1269 insertions(+), 153 deletions(-)
>  create mode 100644 drivers/mtd/nand/raw/sand_nand.c
>  create mode 100644 test/dm/nand.c
>  create mode 100644 test/image/spl_load_nand.c
>
> --
> 2.37.1
>

The CI pipeline fails:
https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/18409

It seems like the problem is only for the clang tests (sandbox64 with
clang test.py and sandbox with clang test.py)

Regards,
Dario

-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


[PATCH] mtd: nand: check nand_mtd_to_devnum() argument

2023-11-02 Thread Dario Binacchi
If the "mtd" parameter is NULL, the search will definitely yield a
negative result. In that case, it's better to exit immediately.

Signed-off-by: Dario Binacchi 

---

 drivers/mtd/nand/raw/nand.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/raw/nand.c b/drivers/mtd/nand/raw/nand.c
index eacd99c4e275..55c00ac815dd 100644
--- a/drivers/mtd/nand/raw/nand.c
+++ b/drivers/mtd/nand/raw/nand.c
@@ -41,8 +41,11 @@ int nand_mtd_to_devnum(struct mtd_info *mtd)
 {
int i;
 
+   if (!mtd)
+   return -ENODEV;
+
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) {
-   if (mtd && get_nand_dev_by_index(i) == mtd)
+   if (get_nand_dev_by_index(i) == mtd)
return i;
}
 
-- 
2.42.0



[PATCH] mtd: nand: complete nand_register() arguments check

2023-11-02 Thread Dario Binacchi
The patch checks that the "mtd" parameter is accessible before
proceeding.

Signed-off-by: Dario Binacchi 

---

 drivers/mtd/nand/raw/nand.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/raw/nand.c b/drivers/mtd/nand/raw/nand.c
index eacd99c4e275..d31bb580c46a 100644
--- a/drivers/mtd/nand/raw/nand.c
+++ b/drivers/mtd/nand/raw/nand.c
@@ -52,7 +52,7 @@ int nand_mtd_to_devnum(struct mtd_info *mtd)
 /* Register an initialized NAND mtd device with the U-Boot NAND command. */
 int nand_register(int devnum, struct mtd_info *mtd)
 {
-   if (devnum >= CONFIG_SYS_MAX_NAND_DEVICE)
+   if (!mtd || devnum >= CONFIG_SYS_MAX_NAND_DEVICE)
return -EINVAL;
 
nand_info[devnum] = mtd;
-- 
2.42.0



Re: [PATCH 14/15] nand: Add sandbox driver

2023-11-02 Thread Dario Binacchi
e;
> +   chip->pagesize = pagesize;
> +   chip->pages = pages;
> +   chip->pages_per_erase = erasesize / pagesize;
> +   memset(chip->tmp, 0xff, chip->chunksize);
> +
> +   chip->err_count = err_count;
> +   chip->err_step_bits = err_step_size * 8;
> +   chip->err_steps = pagesize / err_step_size;
> +   chip->ecc_bits = ecc_bytes * 8;
> +
> +   expected_size = (off_t)pages * chip->chunksize;
> +   snprintf(filename, sizeof(filename),
> +"/tmp/u-boot.nand%d.XX", devnum);
> +   chip->fd = os_mktemp(filename, expected_size);
> +   if (chip->fd < 0) {
> +   dev_dbg(dev, "Could not create temp file %s\n",
> +   filename);
> +   ret = chip->fd;
> +   goto err_chip;
> +   }
> +
> +   chip->programmed = calloc(sizeof(long),
> + BITS_TO_LONGS(pages));
> +   if (!chip->programmed) {
> +   ret = -ENOMEM;
> +   goto err_fd;
> +   }
> +
> +   if (onfi) {
> +   memcpy(chip->onfi, onfi, onfi_len);
> +   memcpy(chip->onfi + onfi_len, onfi, onfi_len);
> +   memcpy(chip->onfi + 2 * onfi_len, onfi, onfi_len);
> +   }
> +
> +   nand = >nand;
> +   nand->flash_node = np;
> +   nand->dev_ready = sand_nand_dev_ready;
> +   nand->cmdfunc = sand_nand_command;
> +   nand->waitfunc = sand_nand_wait;
> +   nand->select_chip = sand_nand_select_chip;
> +   nand->read_byte = sand_nand_read_byte;
> +   nand->read_word = sand_nand_read_word;
> +   nand->read_buf = sand_nand_read_buf;
> +   nand->write_buf = sand_nand_write_buf;
> +   nand->ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
> +
> +   mtd = nand_to_mtd(nand);
> +   mtd->dev = dev;
> +
> +   ret = nand_scan(mtd, CONFIG_SYS_NAND_MAX_CHIPS);
> +   if (ret) {
> +   dev_dbg(dev, "Could not scan chip %s: %d\n",
> +   ofnode_get_name(np), ret);
> +   goto err_prog;
> +   }
> +
> +   ret = nand_register(devnum, mtd);
> +   if (ret) {
> +   dev_dbg(dev, "Could not register nand %d: %d\n", 
> devnum,
> +   ret);
> +   goto err_prog;
> +   }
> +
> +   if (!nand_chip)
> +   nand_chip = nand;
> +
> +   list_add_tail(>node, >chips);
> +   devnum++;
> +   continue;
> +
> +err_prog:
> +   free(chip->programmed);
> +err_fd:
> +   os_close(chip->fd);
> +err_chip:
> +   free(chip);
> +   goto err;
> +   }
> +
> +   return 0;
> +
> +err:
> +   sand_nand_remove(dev);
> +   return ret;
> +}
> +
> +static const struct udevice_id sand_nand_ids[] = {
> +   { .compatible = "sandbox,nand" },
> +   { }
> +};
> +
> +U_BOOT_DRIVER(sand_nand) = {
> +   .name   = "sand-nand",
> +   .id = UCLASS_MTD,
> +   .of_match   = sand_nand_ids,
> +   .probe  = sand_nand_probe,
> +   .remove = sand_nand_remove,
> +   .priv_auto  = sizeof(struct sand_nand_priv),
> +};
> +
> +void board_nand_init(void)
> +{
> +   struct udevice *dev;
> +   int err;
> +
> +   err = uclass_get_device_by_driver(UCLASS_MTD, 
> DM_DRIVER_REF(sand_nand),
> + );
> +   if (err && err != -ENODEV)
> +   log_info("Failed to get sandbox NAND: %d\n", err);
> +}
> diff --git a/test/dm/Makefile b/test/dm/Makefile
> index cb82d839f8a..a3ce7b3889f 100644
> --- a/test/dm/Makefile
> +++ b/test/dm/Makefile
> @@ -73,6 +73,7 @@ obj-$(CONFIG_CMD_MUX) += mux-cmd.o
>  obj-$(CONFIG_MULTIPLEXER) += mux-emul.o
>  obj-$(CONFIG_MUX_MMIO) += mux-mmio.o
>  obj-y += fdtdec.o
> +obj-$(CONFIG_MTD_RAW_NAND) += nand.o
>  obj-$(CONFIG_UT_DM) += nop.o
>  obj-y += ofnode.o
>  obj-y += ofread.o
> diff --git a/test/dm/nand.c b/test/dm/nand.c
> new file mode 100644
> index 000..a1304965072
> --- /dev/null
> +++ b/test/dm/nand.c
> @@ -0,0 +1,106 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2023 Sean Anderson 
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +static int dm_test_nand(struct unit_test_state *uts, int dev, bool end)
> +{
> +   nand_erase_options_t opts = { };
> +   struct mtd_info *mtd;
> +   size_t length;
> +   loff_t size;
> +   char *buf;
> +   int *gold;
> +   u8 oob[NAND_MAX_OOBSIZE];
> +   int i;
> +   loff_t off = 0;
> +   mtd_oob_ops_t ops = { };
> +
> +   /* Seed RNG for bit errors */
> +   srand((off >> 32) ^ off ^ ~dev);
> +
> +   mtd = get_nand_dev_by_index(dev);
> +   ut_assertnonnull(mtd);
> +   size = mtd->erasesize * 4;
> +   length = size;
> +
> +   buf = malloc(size);
> +   ut_assertnonnull(buf);
> +   gold = malloc(size);
> +   ut_assertnonnull(gold);
> +
> +   /* Mark a block as bad */
> +   ut_assertok(mtd_block_markbad(mtd, off + mtd->erasesize));
> +   /* Save the OOB for later */
> +   ut_assertok(mtd_read_oob(mtd, mtd->erasesize, ));
> +
> +   /* Erase some stuff */
> +   if (end)
> +   off = mtd->size - size - mtd->erasesize;
> +   opts.offset = off;
> +   opts.length = size;
> +   opts.spread = 1;
> +   opts.lim = U32_MAX;
> +   ut_assertok(nand_erase_opts(mtd, ));
> +
> +   /* Make sure everything is erased */
> +   memset(gold, 0xff, size);
> +   ut_assertok(nand_read_skip_bad(mtd, off, , NULL, U64_MAX, 
> buf));
> +   ut_asserteq(size, length);
> +   ut_asserteq_mem(gold, buf, size);
> +
> +   /* ...but our bad block marker is still there */
> +   ops.oobbuf = oob;
> +   ops.ooblen = mtd->oobsize;
> +   ut_assertok(mtd_read_oob(mtd, mtd->erasesize, ));
> +   ut_asserteq(0, oob[mtd_to_nand(mtd)->badblockpos]);
> +
> +   /* Generate some data and write it */
> +   for (i = 0; i < size / sizeof(int); i++)
> +   gold[i] = 0;//rand();
> +   ut_assertok(nand_write_skip_bad(mtd, off, , NULL, U64_MAX,
> +   (void *)gold, 0));
> +   ut_asserteq(size, length);
> +
> +   /* Verify */
> +   ut_assertok(nand_read_skip_bad(mtd, off, , NULL, U64_MAX, 
> buf));
> +   ut_asserteq(size, length);
> +   ut_asserteq_mem(gold, buf, size);
> +
> +   /* Erase some blocks */
> +   memset(((char *)gold) + mtd->erasesize, 0xff, mtd->erasesize * 2);
> +   opts.offset = off + mtd->erasesize;
> +   opts.length = mtd->erasesize * 2,
> +   ut_assertok(nand_erase_opts(mtd, ));
> +
> +   /* Verify */
> +   ut_assertok(nand_read_skip_bad(mtd, off, , NULL, U64_MAX, 
> buf));
> +   ut_asserteq(size, length);
> +   ut_asserteq_mem(gold, buf, size);
> +
> +   return 0;
> +}
> +
> +#define DM_NAND_TEST(dev) \
> +static int dm_test_nand##dev##_start(struct unit_test_state *uts) \
> +{ \
> +   return dm_test_nand(uts, dev, false); \
> +} \
> +DM_TEST(dm_test_nand##dev##_start, UT_TESTF_SCAN_FDT); \
> +static int dm_test_nand##dev##_end(struct unit_test_state *uts) \
> +{ \
> +   return dm_test_nand(uts, dev, true); \
> +} \
> +DM_TEST(dm_test_nand##dev##_end, UT_TESTF_SCAN_FDT)
> +
> +DM_NAND_TEST(0);
> +DM_NAND_TEST(1);
> --
> 2.37.1
>


-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH 12/15] nand: Allow reinitialization

2023-11-02 Thread Dario Binacchi
Sean, All

On Sun, Oct 29, 2023 at 4:49 AM Sean Anderson  wrote:
>
> NAND devices are destroyed in between unit tests. Provide a function to
> reinitialize the subsystem at the beginning of each test.
>
> Signed-off-by: Sean Anderson 
> ---
>
>  drivers/mtd/nand/raw/nand.c | 40 ++---
>  include/nand.h  |  1 +
>  2 files changed, 34 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/nand.c b/drivers/mtd/nand/raw/nand.c
> index 80017b3..4c18861aa25 100644
> --- a/drivers/mtd/nand/raw/nand.c
> +++ b/drivers/mtd/nand/raw/nand.c
> @@ -115,6 +115,8 @@ static void nand_init_chip(int i)
>  #endif
>
>  #ifdef CONFIG_MTD_CONCAT
> +struct mtd_info *concat_mtd;
> +
>  static void create_mtd_concat(void)
>  {
> struct mtd_info *nand_info_list[CONFIG_SYS_MAX_NAND_DEVICE];
> @@ -129,28 +131,40 @@ static void create_mtd_concat(void)
> }
> }
> if (nand_devices_found > 1) {
> -   struct mtd_info *mtd;
> char c_mtd_name[16];
>
> /*
>  * We detected multiple devices. Concatenate them together.
>  */
> sprintf(c_mtd_name, "nand%d", nand_devices_found);
> -   mtd = mtd_concat_create(nand_info_list, nand_devices_found,
> -   c_mtd_name);
> +   concat_mtd = mtd_concat_create(nand_info_list,
> +  nand_devices_found, 
> c_mtd_name);
>
> -   if (mtd == NULL)
> +   if (!concat_mtd)
> return;
>
> -   nand_register(nand_devices_found, mtd);
> +   nand_register(nand_devices_found, concat_mtd);
> }
>
> return;
>  }
> +
> +static void destroy_mtd_concat(void)
> +{
> +   if (!concat_mtd)
> +   return;
> +
> +   mtd_concat_destroy(concat_mtd);
> +   concat_mtd = NULL;
> +}
>  #else
>  static void create_mtd_concat(void)
>  {
>  }
> +
> +static void destroy_mtd_concat(void)
> +{
> +}
>  #endif
>
>  unsigned long nand_size(void)
> @@ -158,10 +172,10 @@ unsigned long nand_size(void)
> return total_nand_size;
>  }
>
> +static int initialized;
> +
>  void nand_init(void)
>  {
> -   static int initialized;
> -
> /*
>  * Avoid initializing NAND Flash multiple times,
>  * otherwise it will calculate a wrong total size.
> @@ -190,6 +204,18 @@ void nand_init(void)
> create_mtd_concat();
>  }
>
> +void nand_reinit(void)
> +{
> +   int i;
> +
> +   destroy_mtd_concat();
> +   for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
> +   assert(!nand_info[i]);
> +
> +   initialized = 0;
> +   nand_init();
> +}
> +
>  unsigned int nand_page_size(void)
>  {
> struct mtd_info *mtd = get_nand_dev_by_index(nand_curr_device);
> diff --git a/include/nand.h b/include/nand.h
> index fc584f5ef7a..220ffa202ef 100644
> --- a/include/nand.h
> +++ b/include/nand.h
> @@ -11,6 +11,7 @@
>  #include 
>
>  extern void nand_init(void);
> +void nand_reinit(void);
>  unsigned long nand_size(void);
>  unsigned int nand_page_size(void);
>
> --
> 2.37.1
>

Reviewed-by: Dario Binacchi 

Thanks and regards,
Dario

-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH 11/15] nand: Add function to unregister NAND devices

2023-11-02 Thread Dario Binacchi
Sean, All,

On Sun, Oct 29, 2023 at 4:49 AM Sean Anderson  wrote:
>
> This performs the opposite of nand_register, allowing drivers to unregister
> nand devices. This is probably unnecessary for most regular drivers, but we
> expect sandbox drivers to get repeatedly bound/unbound, so this will help
> avoid dangling pointers.
>
> Signed-off-by: Sean Anderson 
> ---
>
>  drivers/mtd/nand/raw/nand.c | 17 +
>  include/nand.h  |  1 +
>  2 files changed, 18 insertions(+)
>
> diff --git a/drivers/mtd/nand/raw/nand.c b/drivers/mtd/nand/raw/nand.c
> index 3abd82068fb..80017b3 100644
> --- a/drivers/mtd/nand/raw/nand.c
> +++ b/drivers/mtd/nand/raw/nand.c
> @@ -74,6 +74,23 @@ int nand_register(int devnum, struct mtd_info *mtd)
> return 0;
>  }
>
> +void nand_unregister(struct mtd_info *mtd)
> +{
> +   int devnum = nand_mtd_to_devnum(mtd);
> +
> +   if (devnum < 0)
> +   return;
> +
> +   if (nand_curr_device == devnum)
> +   nand_curr_device = -1;
> +
> +   total_nand_size -= mtd->size / 1024;
> +
> +   del_mtd_device(nand_info[devnum]);
> +
> +   nand_info[devnum] = NULL;
> +}
> +
>  #if !CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT)
>  static void nand_init_chip(int i)
>  {
> diff --git a/include/nand.h b/include/nand.h
> index c1d7533aaac..fc584f5ef7a 100644
> --- a/include/nand.h
> +++ b/include/nand.h
> @@ -22,6 +22,7 @@ int nand_mtd_to_devnum(struct mtd_info *mtd);
>  #if CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT)
>  void board_nand_init(void);
>  int nand_register(int devnum, struct mtd_info *mtd);
> +void nand_unregister(struct mtd_info *mtd);
>  #else
>  struct nand_chip;
>
> --
> 2.37.1
>

Reviewed-by: Dario Binacchi 

Thanks and regards,

Dario
-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH 10/15] mtd: Add some fallbacks for add/del_mtd_device

2023-11-02 Thread Dario Binacchi
Sean, All

On Sun, Oct 29, 2023 at 4:49 AM Sean Anderson  wrote:
>
> This allows using these functions without ifdefs. OneNAND depends on MTD,
> so this ifdef was redundant in the first place.
>
> Signed-off-by: Sean Anderson 
> ---
>
>  drivers/mtd/nand/raw/nand.c |  2 --
>  drivers/mtd/onenand/onenand_uboot.c |  2 --
>  include/linux/mtd/mtd.h | 12 
>  3 files changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/nand.c b/drivers/mtd/nand/raw/nand.c
> index 4da41438790..3abd82068fb 100644
> --- a/drivers/mtd/nand/raw/nand.c
> +++ b/drivers/mtd/nand/raw/nand.c
> @@ -60,13 +60,11 @@ int nand_register(int devnum, struct mtd_info *mtd)
> sprintf(dev_name[devnum], "nand%d", devnum);
> mtd->name = dev_name[devnum];
>
> -#ifdef CONFIG_MTD
> /*
>  * Add MTD device so that we can reference it later
>  * via the mtdcore infrastructure (e.g. ubi).
>  */
> add_mtd_device(mtd);
> -#endif
>
> total_nand_size += mtd->size / 1024;
>
> diff --git a/drivers/mtd/onenand/onenand_uboot.c 
> b/drivers/mtd/onenand/onenand_uboot.c
> index 04791df69bb..ecacabefadc 100644
> --- a/drivers/mtd/onenand/onenand_uboot.c
> +++ b/drivers/mtd/onenand/onenand_uboot.c
> @@ -44,14 +44,12 @@ void onenand_init(void)
> puts("Flex-");
> puts("OneNAND: ");
>
> -#ifdef CONFIG_MTD
> /*
>  * Add MTD device so that we can reference it later
>  * via the mtdcore infrastructure (e.g. ubi).
>  */
> onenand_mtd.name = dev_name;
> add_mtd_device(_mtd);
> -#endif
> }
> print_size(onenand_chip.chipsize, "\n");
>  }
> diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
> index 09f52698877..7a66c7af749 100644
> --- a/include/linux/mtd/mtd.h
> +++ b/include/linux/mtd/mtd.h
> @@ -552,8 +552,20 @@ unsigned mtd_mmap_capabilities(struct mtd_info *mtd);
>
>  #ifdef __UBOOT__
>  /* drivers/mtd/mtdcore.h */
> +#if CONFIG_IS_ENABLED(MTD)
>  int add_mtd_device(struct mtd_info *mtd);
>  int del_mtd_device(struct mtd_info *mtd);
> +#else
> +static inline int add_mtd_device(struct mtd_info *mtd)
> +{
> +   return -ENOSYS;
> +}
> +
> +static inline int del_mtd_device(struct mtd_info *mtd)
> +{
> +   return -ENOSYS;
> +}
> +#endif
>
>  #ifdef CONFIG_MTD_PARTITIONS
>  int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int);
> --
> 2.37.1
>

Reviewed-by: Dario Binacchi 

Thanks and regards,
Dario
-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH 03/15] nand: Calculate SYS_NAND_PAGE_COUNT automatically

2023-11-02 Thread Dario Binacchi
ers.c
> @@ -12,7 +12,7 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, 
> void *dst)
> while (block <= lastblock) {
> if (!nand_is_bad_block(block)) {
> /* Skip bad blocks */
> -   while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
> +   while (page < SYS_NAND_PAGE_COUNT) {
> nand_read_page(block, page, dst);
> /*
>  * When offs is not aligned to page address 
> the
> diff --git a/drivers/mtd/nand/raw/nand_spl_simple.c 
> b/drivers/mtd/nand/raw/nand_spl_simple.c
> index 2f3af9edd4c..2ebcac56900 100644
> --- a/drivers/mtd/nand/raw/nand_spl_simple.c
> +++ b/drivers/mtd/nand/raw/nand_spl_simple.c
> @@ -6,6 +6,7 @@
>
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -27,7 +28,7 @@ static int nand_command(int block, int page, uint32_t offs,
> u8 cmd)
>  {
> struct nand_chip *this = mtd_to_nand(mtd);
> -   int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
> +   int page_addr = page + block * SYS_NAND_PAGE_COUNT;
>
> while (!this->dev_ready(mtd))
> ;
> @@ -59,7 +60,7 @@ static int nand_command(int block, int page, uint32_t offs,
> u8 cmd)
>  {
> struct nand_chip *this = mtd_to_nand(mtd);
> -   int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
> +   int page_addr = page + block * SYS_NAND_PAGE_COUNT;
> void (*hwctrl)(struct mtd_info *mtd, int cmd,
> unsigned int ctrl) = this->cmd_ctrl;
>
> diff --git a/drivers/mtd/nand/raw/omap_gpmc.c 
> b/drivers/mtd/nand/raw/omap_gpmc.c
> index 1a5ed0de31a..6e99538dea1 100644
> --- a/drivers/mtd/nand/raw/omap_gpmc.c
> +++ b/drivers/mtd/nand/raw/omap_gpmc.c
> @@ -6,6 +6,7 @@
>
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -1298,7 +1299,7 @@ static int nand_is_bad_block(int block)
>
>  static int nand_read_page(int block, int page, uchar *dst)
>  {
> -   int page_addr = block * CONFIG_SYS_NAND_PAGE_COUNT + page;
> +   int page_addr = block * SYS_NAND_PAGE_COUNT + page;
> loff_t ofs = page_addr * CONFIG_SYS_NAND_PAGE_SIZE;
> int ret;
> size_t len = CONFIG_SYS_NAND_PAGE_SIZE;
> diff --git a/include/system-constants.h b/include/system-constants.h
> index 59371568d1e..c50d54f37a4 100644
> --- a/include/system-constants.h
> +++ b/include/system-constants.h
> @@ -41,4 +41,7 @@
>  #define SPL_PAYLOAD_ARGS_ADDR  0
>  #endif
>
> +#define SYS_NAND_PAGE_COUNT \
> +   (CONFIG_SYS_NAND_BLOCK_SIZE / CONFIG_SYS_NAND_PAGE_SIZE)
> +
>  #endif
> --
> 2.37.1
>

Reviewed-by:  Dario Binacchi 

What do you think about adding another patch to modify SYS_NAND_PAGE_COUNT
so that it is clearer that it refers to the number of pages in a block?

Thanks and regards,
Dario

--

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH v3 2/2] dfu: mtd: mark bad the MTD block on erase error

2023-10-13 Thread Dario Binacchi
Hello Patrick,

On Mon, Jun 05, 2023 at 09:52:08AM +0200, Patrick Delaunay wrote:
> In the MTD DFU backend, it is needed to mark the NAND block bad when the
> erase failed with the -EIO error, as it is done in UBI and JFFS2 code.
> 
> This operation is not done in the MTD framework, but the bad block
> tag (in BBM or in BBT) is required to avoid to write data on this block
> in the next DFU_OP_WRITE loop in mtd_block_op(): the code skip the bad
> blocks, tested by mtd_block_isbad().
> 
> Without this patch, when the NAND block become bad on DFU write operation
> - low probability on new NAND - the DFU write operation will always failed
> because the failing block is never marked bad.
> 
> This patch also adds a test to avoid to request an erase operation on a
> block already marked bad; this test is not performed in MTD framework
> in mtd_erase().
> 
> Reviewed-by: Michael Trimarchi 
> Signed-off-by: Patrick Delaunay 

Applied to nand-next,
thanks and regards,

Dario

> ---
> 
> Changes in v3:
> - Split serie with trace fix and support of bad block in MTD erase
> - Fix trace for "bbt reserved" when mtd_block_isbad return 2
> 
> Changes in v2:
> - fix mtd_block_isbad offset parameter for erase check
> - Add trace when bad block are skipped in erase loop
> - Add remaining byte in trace "Limit reached"
> 
>  drivers/dfu/dfu_mtd.c | 30 ++
>  1 file changed, 22 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/dfu/dfu_mtd.c b/drivers/dfu/dfu_mtd.c
> index b764f091786d..271d485d1c9a 100644
> --- a/drivers/dfu/dfu_mtd.c
> +++ b/drivers/dfu/dfu_mtd.c
> @@ -91,22 +91,36 @@ static int mtd_block_op(enum dfu_op op, struct dfu_entity 
> *dfu,
>   return -EIO;
>   }
>  
> + /* Skip the block if it is bad, don't erase it again */
> + ret = mtd_block_isbad(mtd, erase_op.addr);
> + if (ret) {
> + printf("Skipping %s at 0x%08llx\n",
> +ret == 1 ? "bad block" : "bbt reserved",
> +erase_op.addr);
> + erase_op.addr += mtd->erasesize;
> + continue;
> + }
> +
>   ret = mtd_erase(mtd, _op);
>  
>   if (ret) {
> - /* Abort if its not a bad block error */
> - if (ret != -EIO) {
> - printf("Failure while erasing at offset 
> 0x%llx\n",
> -erase_op.fail_addr);
> - return 0;
> + /* If this is not -EIO, we have no idea what to 
> do. */
> + if (ret == -EIO) {
> + printf("Marking bad block at 0x%08llx 
> (%d)\n",
> +erase_op.fail_addr, ret);
> + ret = mtd_block_markbad(mtd, 
> erase_op.addr);
> + }
> + /* Abort if it is not -EIO or can't mark bad */
> + if (ret) {
> + printf("Failure while erasing at offset 
> 0x%llx (%d)\n",
> +erase_op.fail_addr, ret);
> + return ret;
>   }
> - printf("Skipping bad block at 0x%08llx\n",
> -erase_op.addr);
>   } else {
>   remaining -= mtd->erasesize;
>   }
>  
> - /* Continue erase behind bad block */
> + /* Continue erase behind the current block */
>   erase_op.addr += mtd->erasesize;
>   }
>   }


Re: [PATCH v3 1/2] dfu: mtd: fix the trace when limit is reached

2023-10-13 Thread Dario Binacchi
Hello Patrick,

On Mon, Jun 05, 2023 at 09:52:07AM +0200, Patrick Delaunay wrote:
> The offset variable = 'off' used in the error trace when limit is reach
> on erase operation is incorect as 'erase_op.addr' is used in the loop.
> This patch corrects the copy paste issue between the erase loop and
> the write loop.
> 
> This patch also adds the 'remaining' information to allow to debug of
> limit issues.
> 
> Fixes: 6015af28ee6d ("dfu: add backend for MTD device")
> Signed-off-by: Patrick Delaunay 
> Reviewed-by: Patrice Chotard 

Applied to nand-next,
thanks and regards

Dario
> ---
> 
> (no changes since v1)
> 
>  drivers/dfu/dfu_mtd.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/dfu/dfu_mtd.c b/drivers/dfu/dfu_mtd.c
> index c7075f12eca9..b764f091786d 100644
> --- a/drivers/dfu/dfu_mtd.c
> +++ b/drivers/dfu/dfu_mtd.c
> @@ -86,8 +86,8 @@ static int mtd_block_op(enum dfu_op op, struct dfu_entity 
> *dfu,
>  
>   while (remaining) {
>   if (erase_op.addr + remaining > lim) {
> - printf("Limit reached 0x%llx while erasing at 
> offset 0x%llx\n",
> -lim, off);
> + printf("Limit reached 0x%llx while erasing at 
> offset 0x%llx, remaining 0x%llx\n",
> +lim, erase_op.addr, remaining);
>   return -EIO;
>   }
>  


Pull request for u-boot-nand-20230417

2023-10-13 Thread Dario Binacchi
Hello Tom,

The following changes since commit 86700279645921fb2c28c41711deb7d7ed75bc29:

  Merge branch '2023-10-12-assorted-TI-platform-updates' (2023-10-12
17:02:51 -0400)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-nand-flash.git
tags/u-boot-nand-20231013

for you to fetch changes up to be0da1257f189c09604b01bc04a7e8411bf18e5c:

  dfu: mtd: mark bad the MTD block on erase error (2023-10-13 10:49:07 +0200)

Gitlab CI showed no issues:
https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/18106


Pull request for u-boot-nand-20231013

The first 5 patches are from Mikhail Kshevetskiy, aligning the mtd spinand
core with kernel version 5.15.43, fixing a bug on Winbond, and adding
support for Winbond W25NO2KV.

The other 2 patches are from Patrick Delaunay and they fix a bug and mark
bad the MTD block on erase error.


Mikhail Kshevetskiy (5):
  mtd/spinand: rework detect procedure for different READ_ID operation
  mtd/spinand: sync core spinand code with linux-5.10.118
  mtd/spinand: sync supported devices with linux-5.15.43
  mtd: spinand: winbond: fix flash identification
  mtd: spinand: winbond: add Winbond W25N02KV flash support

Patrick Delaunay (2):
  dfu: mtd: fix the trace when limit is reached
  dfu: mtd: mark bad the MTD block on erase error

 drivers/dfu/dfu_mtd.c |  34 --
 drivers/mtd/nand/spi/Makefile |   2 +-
 drivers/mtd/nand/spi/core.c   | 129
+-
 drivers/mtd/nand/spi/gigadevice.c | 253
--
 drivers/mtd/nand/spi/macronix.c   | 190
+
 drivers/mtd/nand/spi/micron.c | 194
++-
 drivers/mtd/nand/spi/paragon.c| 133

 drivers/mtd/nand/spi/toshiba.c| 104
+-
 drivers/mtd/nand/spi/winbond.c| 116
+++-
 include/linux/mtd/nand.h  |   5 ++-
 include/linux/mtd/spinand.h   |  97
++
 11 files changed, 927 insertions(+), 330 deletions(-)
 create mode 100644 drivers/mtd/nand/spi/paragon.c


-- 
Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


[RFC PATCH v2 5/5] board: stm32f469-disco: add splash screen with stmicroelectronics logo

2023-10-08 Thread Dario Binacchi
Display the STMicroelectronics logo with features VIDEO_LOGO and
SPLASH_SCREEN on stm32f469-disco board.

Signed-off-by: Dario Binacchi 

---

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag to patches 1, 2 and 3 of the series.
- Fix frame buffer allocation for stm32f469 discovery board.

 configs/stm32f469-discovery_defconfig |   3 +++
 include/configs/stm32f469-discovery.h |   2 ++
 tools/logos/stm32f469-discovery.bmp   | Bin 0 -> 18532 bytes
 3 files changed, 5 insertions(+)
 create mode 100644 tools/logos/stm32f469-discovery.bmp

diff --git a/configs/stm32f469-discovery_defconfig 
b/configs/stm32f469-discovery_defconfig
index 85e795e83e7d..b7e35aeae200 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -42,12 +42,15 @@ CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
 CONFIG_VIDEO=y
+CONFIG_VIDEO_LOGO=y
 CONFIG_BACKLIGHT_GPIO=y
 CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
 CONFIG_VIDEO_STM32=y
 CONFIG_VIDEO_STM32_DSI=y
 CONFIG_VIDEO_STM32_MAX_XRES=480
 CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
 CONFIG_BMP_16BPP=y
 CONFIG_BMP_24BPP=y
 CONFIG_BMP_32BPP=y
diff --git a/include/configs/stm32f469-discovery.h 
b/include/configs/stm32f469-discovery.h
index 62a7e9af0c56..75bb9cd8d06f 100644
--- a/include/configs/stm32f469-discovery.h
+++ b/include/configs/stm32f469-discovery.h
@@ -31,6 +31,8 @@
"scriptaddr=0x00418000\0"   \
"pxefile_addr_r=0x00428000\0" \
"ramdisk_addr_r=0x00438000\0"   \
+   "splashimage=0x00448000\0" \
+   "splashpos=m,m\0" \
BOOTENV
 
 #endif /* __CONFIG_H */
diff --git a/tools/logos/stm32f469-discovery.bmp 
b/tools/logos/stm32f469-discovery.bmp
new file mode 100644
index 
..ecc8d984218fb13fddf0ba9cf68f2cfad829e289
GIT binary patch
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[RFC PATCH v2 4/5] ARM: dts: stm32: support display on stm32f469-disco board

2023-10-08 Thread Dario Binacchi
Add support to Orise Tech OTM8009A display on stm32f469-disco board.

It was necessary to retrieve the framebuffer address from the device tree
because the address returned by the video-uclass driver pointed to a memory
area that was not usable.

Furthermore, unlike Linux, the DSI driver requires the LTDC clock to be
properly probed. Hence, the changes made to the DSI node in
stm32f469-disco-u-boot.dtsi.

Signed-off-by: Dario Binacchi 

---

Changes in v2:
- Add DRAM_SIZE macro.
- Fix frame buffer allocation function so that it is backward compatible
  with boards other than the one it was introduced for (i. e. stm32f469-disco).
  Tested on stm32f469-disco and stm32mp157f-dk2 boards.

 arch/arm/dts/stm32f469-disco-u-boot.dtsi |  4 +++
 configs/stm32f469-discovery_defconfig| 13 ++
 drivers/video/stm32/stm32_ltdc.c | 31 
 3 files changed, 48 insertions(+)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index 8e781c5a7b23..47ba9fa4a783 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -92,7 +92,9 @@
 
  {
clocks = < 0 STM32F4_APB2_CLOCK(DSI)>,
+< 0 STM32F4_APB2_CLOCK(LTDC)>,
 <_hse>;
+   clock-names = "pclk", "px_clk", "ref";
 };
 
  {
@@ -140,6 +142,8 @@
 };
 
  {
+   bootph-all;
+
clocks = < 0 STM32F4_APB2_CLOCK(LTDC)>;
 };
 
diff --git a/configs/stm32f469-discovery_defconfig 
b/configs/stm32f469-discovery_defconfig
index 21c5498466cd..85e795e83e7d 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPT=y
 # CONFIG_RANDOM_UUID is not set
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIMER=y
 # CONFIG_ISO_PARTITION is not set
@@ -40,3 +41,15 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
+CONFIG_VIDEO=y
+CONFIG_BACKLIGHT_GPIO=y
+CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
+CONFIG_VIDEO_STM32=y
+CONFIG_VIDEO_STM32_DSI=y
+CONFIG_VIDEO_STM32_MAX_XRES=480
+CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index 6fd90e33919d..9054db1d78b3 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -495,6 +495,33 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv 
*priv, ulong fb_addr)
setbits_le32(priv->regs + LTDC_L1CR, LXCR_LEN);
 }
 
+#if IS_ENABLED(CONFIG_TARGET_STM32F469_DISCOVERY)
+static int stm32_ltdc_alloc_fb(struct udevice *dev)
+{
+#define SDRAM_SIZE 0x100 /* 128Mbit = 16 Mbyte = 0x100 */
+   struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
+   phys_addr_t cpu;
+   dma_addr_t bus;
+   u64 dma_size;
+   int ret;
+
+   ret = dev_get_dma_range(dev, , , _size);
+   if (ret) {
+   dev_err(dev, "failed to get dma address\n");
+   return ret;
+   }
+
+   uc_plat->base = bus + SDRAM_SIZE - ALIGN(uc_plat->size, uc_plat->align);
+   return 0;
+}
+#else
+static inline int stm32_ltdc_alloc_fb(struct udevice *dev)
+{
+   /* Delegate framebuffer allocation to video-uclass */
+   return 0;
+}
+#endif
+
 static int stm32_ltdc_probe(struct udevice *dev)
 {
struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
@@ -605,6 +632,10 @@ static int stm32_ltdc_probe(struct udevice *dev)
priv->crop_h = timings.vactive.typ;
priv->alpha = 0xFF;
 
+   ret = stm32_ltdc_alloc_fb(dev);
+   if (ret)
+   return ret;
+
dev_dbg(dev, "%dx%d %dbpp frame buffer at 0x%lx\n",
timings.hactive.typ, timings.vactive.typ,
VNBITS(priv->l2bpp), uc_plat->base);
-- 
2.42.0



[RFC PATCH v2 2/5] ARM: dts: stm32: make the LTDC clock usable by the clock driver

2023-10-08 Thread Dario Binacchi
As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle nodes with "clocks" properties with an index set to 0.

This patch is preparatory for future developments that require the use
of the LTDC clock.

[1] Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
Signed-off-by: Dario Binacchi 
Reviewed-by: Patrice Chotard 

---

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag.

 arch/arm/dts/stm32f469-disco-u-boot.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index c07e2022e4a8..dcc70369cd0d 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -134,6 +134,10 @@
bootph-all;
 };
 
+ {
+   clocks = < 0 STM32F4_APB2_CLOCK(LTDC)>;
+};
+
  {
bootph-all;
 
-- 
2.42.0



[RFC PATCH v2 3/5] ARM: dts: stm32: make the DSI clock usable by the clock driver

2023-10-08 Thread Dario Binacchi
As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle nodes with "clocks" properties with an index set to 0.

This patch is preparatory for future developments that require the use
of the DSI clock.

[1] Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
Signed-off-by: Dario Binacchi 
Reviewed-by: Patrice Chotard 

---

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag.

 arch/arm/dts/stm32f469-disco-u-boot.dtsi | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index dcc70369cd0d..8e781c5a7b23 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -90,6 +90,11 @@
bootph-all;
 };
 
+ {
+   clocks = < 0 STM32F4_APB2_CLOCK(DSI)>,
+<_hse>;
+};
+
  {
bootph-all;
 };
-- 
2.42.0



[RFC PATCH v2 1/5] ARM: dts: stm32f469-disco: sync with Linux 6.5

2023-10-08 Thread Dario Binacchi
Sync the devicetree with linux 6.5 for stm32f746-disco board.

Signed-off-by: Dario Binacchi 
Reviewed-by: Patrice Chotard 

---

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag.

 arch/arm/dts/stm32f469-disco.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/stm32f469-disco.dts b/arch/arm/dts/stm32f469-disco.dts
index 6e0ffc1903be..c9acabf0f530 100644
--- a/arch/arm/dts/stm32f469-disco.dts
+++ b/arch/arm/dts/stm32f469-disco.dts
@@ -119,7 +119,7 @@
};
};
 
-   panel-dsi@0 {
+   panel@0 {
compatible = "orisetech,otm8009a";
reg = <0>; /* dsi virtual channel (0..3) */
reset-gpios = < 7 GPIO_ACTIVE_LOW>;
@@ -138,7 +138,7 @@
status = "okay";
 
port {
-   ltdc_out_dsi: endpoint@0 {
+   ltdc_out_dsi: endpoint {
remote-endpoint = <_in>;
};
};
-- 
2.42.0



[RFC PATCH v2 0/5] Support display on stm32f469-disco board

2023-10-08 Thread Dario Binacchi
The series adds support for the Orise Tech OTM8009A display on the
stm32f469-disco board. Substantial differences in the drivers for clock
management, LTDC and DSI compared to Linux, made it necessary to modify
the device tree. These changes were made in stm32f469-disco-uboot.dtsi to
avoid altering the Linux device tree. It is therefore desirable, as soon
as possible, to add these drivers the functionalities so that they do not
require device tree properties that deviate from those present in the Linux
version.

Changes in v2:
- Add Patrice Chotard's Reviewed-by tag to patches 1, 2 and 3 of the series.
- Fix frame buffer allocation for stm32f469 discovery board.

Dario Binacchi (5):
  ARM: dts: stm32f469-disco: sync with Linux 6.5
  ARM: dts: stm32: make the LTDC clock usable by the clock driver
  ARM: dts: stm32: make the DSI clock usable by the clock driver
  ARM: dts: stm32: support display on stm32f469-disco board
  board: stm32f469-disco: add splash screen with stmicroelectronics logo

 arch/arm/dts/stm32f469-disco-u-boot.dtsi |  13 ++
 arch/arm/dts/stm32f469-disco.dts |   4 +--
 configs/stm32f469-discovery_defconfig|  16 
 drivers/video/stm32/stm32_ltdc.c |  31 +++
 include/configs/stm32f469-discovery.h|   2 ++
 tools/logos/stm32f469-discovery.bmp  | Bin 0 -> 18532 bytes
 6 files changed, 64 insertions(+), 2 deletions(-)
 create mode 100644 tools/logos/stm32f469-discovery.bmp

-- 
2.42.0



Re: [RFC PATCH 4/5] ARM: dts: stm32: support display on stm32f469-disco board

2023-10-08 Thread Dario Binacchi
Hello Patrice,

On Wed, Sep 27, 2023 at 8:19 AM Patrice CHOTARD
 wrote:
>
>
>
> On 9/3/23 22:57, Dario Binacchi wrote:
> > Add support to Orise Tech OTM8009A display on stm32f469-disco board.
> >
> > It was necessary to retrieve the framebuffer address from the device tree
> > because the address returned by the video-uclass driver pointed to a memory
> > area that was not usable.
> >
> > Furthermore, unlike Linux, the DSI driver requires the LTDC clock to be
> > properly probed. Hence, the changes made to the DSI node in
> > stm32f469-disco-u-boot.dtsi.
> >
> > Signed-off-by: Dario Binacchi 
> > ---
> >
> >  arch/arm/dts/stm32f469-disco-u-boot.dtsi |  4 +++
> >  configs/stm32f469-discovery_defconfig| 13 +
> >  drivers/video/stm32/stm32_ltdc.c | 37 +++-
> >  3 files changed, 53 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi 
> > b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
> > index 8e781c5a7b23..47ba9fa4a783 100644
> > --- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
> > +++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
> > @@ -92,7 +92,9 @@
> >
> >   {
> >   clocks = < 0 STM32F4_APB2_CLOCK(DSI)>,
> > +  < 0 STM32F4_APB2_CLOCK(LTDC)>,
> ><_hse>;
> > + clock-names = "pclk", "px_clk", "ref";
> >  };
> >
> >   {
> > @@ -140,6 +142,8 @@
> >  };
> >
> >   {
> > + bootph-all;
> > +
> >   clocks = < 0 STM32F4_APB2_CLOCK(LTDC)>;
> >  };
> >
> > diff --git a/configs/stm32f469-discovery_defconfig 
> > b/configs/stm32f469-discovery_defconfig
> > index 35d18d58be6f..9796b8f2d9a5 100644
> > --- a/configs/stm32f469-discovery_defconfig
> > +++ b/configs/stm32f469-discovery_defconfig
> > @@ -21,6 +21,7 @@ CONFIG_CMD_GPT=y
> >  # CONFIG_RANDOM_UUID is not set
> >  CONFIG_CMD_MMC=y
> >  # CONFIG_CMD_SETEXPR is not set
> > +CONFIG_CMD_BMP=y
> >  CONFIG_CMD_CACHE=y
> >  CONFIG_CMD_TIMER=y
> >  # CONFIG_ISO_PARTITION is not set
> > @@ -40,3 +41,15 @@ CONFIG_SPI_FLASH_STMICRO=y
> >  CONFIG_SPI=y
> >  CONFIG_DM_SPI=y
> >  CONFIG_STM32_QSPI=y
> > +CONFIG_VIDEO=y
> > +CONFIG_BACKLIGHT_GPIO=y
> > +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
> > +CONFIG_VIDEO_STM32=y
> > +CONFIG_VIDEO_STM32_DSI=y
> > +CONFIG_VIDEO_STM32_MAX_XRES=480
> > +CONFIG_VIDEO_STM32_MAX_YRES=800
> > +CONFIG_BMP_16BPP=y
> > +CONFIG_BMP_24BPP=y
> > +CONFIG_BMP_32BPP=y
> > +CONFIG_DM_REGULATOR=y
> > +CONFIG_DM_REGULATOR_FIXED=y
> > diff --git a/drivers/video/stm32/stm32_ltdc.c 
> > b/drivers/video/stm32/stm32_ltdc.c
> > index f48badc517a8..428b0addc43c 100644
> > --- a/drivers/video/stm32/stm32_ltdc.c
> > +++ b/drivers/video/stm32/stm32_ltdc.c
> > @@ -494,6 +494,34 @@ static void stm32_ltdc_set_layer1(struct 
> > stm32_ltdc_priv *priv, ulong fb_addr)
> >   setbits_le32(priv->regs + LTDC_L1CR, LXCR_LEN);
> >  }
> >
> > +#if IS_ENABLED(CONFIG_TARGET_STM32F469_DISCOVERY)
>
> We want to avoid this kind of #define specific to a particular target

If the framebuffer is allocated by the video-uclass module, it is
mapped to the address 0xe0, which does
not appear to be a correct memory zone. Therefore, for the
stm32f469-disco board, a different method for
framebuffer allocation is required, and this seemed to me the most
suitable way. I have submitted the series
as an RFC, and this is one of the points for which I did it. So, I am
open to considering any suggestions you
may have.

Output in case of applied patch:
stm32_display display-controller@40016800: 480x800 16bpp frame buffer
at 0xc0e0

Otherwise:
stm32_display display-controller@40016800: 480x800 16bpp frame buffer
at 0xe0

>
> > +static int stm32_ltdc_get_fb_addr(struct udevice *dev, ulong *base, uint 
> > size,
> > +   uint align)
> > +{
> > + phys_addr_t cpu;
> > + dma_addr_t bus;
> > + u64 dma_size;
> > + int ret;
> > +
> > + ret = dev_get_dma_range(dev, , , _size);
> > + if (ret) {
> > + dev_err(dev, "failed to get dma address\n");
> > + return ret;
> > + }
> > +
> > + *base = bus + 0x100 - ALIGN(size, align);
>
> Why adding 0x100 ? avoid to insert const whithout any description and use 
> a #define instead.

Right, I will add it in version 2.

>
> > + return 0;
> > +}
> > +#else
> &

[RFC PATCH 5/5] board: stm32f469-disco: add splash screen with stmicroelectronics logo

2023-09-03 Thread Dario Binacchi
Display the STMicroelectronics logo with features VIDEO_LOGO and
SPLASH_SCREEN on stm32f469-disco board.

Signed-off-by: Dario Binacchi 

---

 configs/stm32f469-discovery_defconfig |   3 +++
 include/configs/stm32f469-discovery.h |   2 ++
 tools/logos/stm32f469-discovery.bmp   | Bin 0 -> 18532 bytes
 3 files changed, 5 insertions(+)
 create mode 100644 tools/logos/stm32f469-discovery.bmp

diff --git a/configs/stm32f469-discovery_defconfig 
b/configs/stm32f469-discovery_defconfig
index 9796b8f2d9a5..16b79371fde9 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -42,12 +42,15 @@ CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
 CONFIG_VIDEO=y
+CONFIG_VIDEO_LOGO=y
 CONFIG_BACKLIGHT_GPIO=y
 CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
 CONFIG_VIDEO_STM32=y
 CONFIG_VIDEO_STM32_DSI=y
 CONFIG_VIDEO_STM32_MAX_XRES=480
 CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
 CONFIG_BMP_16BPP=y
 CONFIG_BMP_24BPP=y
 CONFIG_BMP_32BPP=y
diff --git a/include/configs/stm32f469-discovery.h 
b/include/configs/stm32f469-discovery.h
index 62a7e9af0c56..75bb9cd8d06f 100644
--- a/include/configs/stm32f469-discovery.h
+++ b/include/configs/stm32f469-discovery.h
@@ -31,6 +31,8 @@
"scriptaddr=0x00418000\0"   \
"pxefile_addr_r=0x00428000\0" \
"ramdisk_addr_r=0x00438000\0"   \
+   "splashimage=0x00448000\0" \
+   "splashpos=m,m\0" \
BOOTENV
 
 #endif /* __CONFIG_H */
diff --git a/tools/logos/stm32f469-discovery.bmp 
b/tools/logos/stm32f469-discovery.bmp
new file mode 100644
index 
..ecc8d984218fb13fddf0ba9cf68f2cfad829e289
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[RFC PATCH 4/5] ARM: dts: stm32: support display on stm32f469-disco board

2023-09-03 Thread Dario Binacchi
Add support to Orise Tech OTM8009A display on stm32f469-disco board.

It was necessary to retrieve the framebuffer address from the device tree
because the address returned by the video-uclass driver pointed to a memory
area that was not usable.

Furthermore, unlike Linux, the DSI driver requires the LTDC clock to be
properly probed. Hence, the changes made to the DSI node in
stm32f469-disco-u-boot.dtsi.

Signed-off-by: Dario Binacchi 
---

 arch/arm/dts/stm32f469-disco-u-boot.dtsi |  4 +++
 configs/stm32f469-discovery_defconfig| 13 +
 drivers/video/stm32/stm32_ltdc.c | 37 +++-
 3 files changed, 53 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index 8e781c5a7b23..47ba9fa4a783 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -92,7 +92,9 @@
 
  {
clocks = < 0 STM32F4_APB2_CLOCK(DSI)>,
+< 0 STM32F4_APB2_CLOCK(LTDC)>,
 <_hse>;
+   clock-names = "pclk", "px_clk", "ref";
 };
 
  {
@@ -140,6 +142,8 @@
 };
 
  {
+   bootph-all;
+
clocks = < 0 STM32F4_APB2_CLOCK(LTDC)>;
 };
 
diff --git a/configs/stm32f469-discovery_defconfig 
b/configs/stm32f469-discovery_defconfig
index 35d18d58be6f..9796b8f2d9a5 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_GPT=y
 # CONFIG_RANDOM_UUID is not set
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIMER=y
 # CONFIG_ISO_PARTITION is not set
@@ -40,3 +41,15 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
+CONFIG_VIDEO=y
+CONFIG_BACKLIGHT_GPIO=y
+CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
+CONFIG_VIDEO_STM32=y
+CONFIG_VIDEO_STM32_DSI=y
+CONFIG_VIDEO_STM32_MAX_XRES=480
+CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index f48badc517a8..428b0addc43c 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -494,6 +494,34 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv 
*priv, ulong fb_addr)
setbits_le32(priv->regs + LTDC_L1CR, LXCR_LEN);
 }
 
+#if IS_ENABLED(CONFIG_TARGET_STM32F469_DISCOVERY)
+static int stm32_ltdc_get_fb_addr(struct udevice *dev, ulong *base, uint size,
+ uint align)
+{
+   phys_addr_t cpu;
+   dma_addr_t bus;
+   u64 dma_size;
+   int ret;
+
+   ret = dev_get_dma_range(dev, , , _size);
+   if (ret) {
+   dev_err(dev, "failed to get dma address\n");
+   return ret;
+   }
+
+   *base = bus + 0x100 - ALIGN(size, align);
+   return 0;
+}
+#else
+static int stm32_ltdc_get_fb_addr(struct udevice *dev, ulong *base, uint size,
+ uint align)
+{
+   /* Delegate framebuffer allocation to video-uclass */
+   *base = 0;
+   return 0;
+}
+#endif
+
 static int stm32_ltdc_probe(struct udevice *dev)
 {
struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
@@ -504,7 +532,7 @@ static int stm32_ltdc_probe(struct udevice *dev)
struct display_timing timings;
struct clk pclk;
struct reset_ctl rst;
-   ulong rate;
+   ulong rate, fb_base;
int ret;
 
priv->regs = dev_read_addr_ptr(dev);
@@ -604,6 +632,13 @@ static int stm32_ltdc_probe(struct udevice *dev)
priv->crop_h = timings.vactive.typ;
priv->alpha = 0xFF;
 
+   ret = stm32_ltdc_get_fb_addr(dev, _base, uc_plat->size,
+uc_plat->align);
+   if (ret)
+   return ret;
+
+   uc_plat->base = fb_base;
+
dev_dbg(dev, "%dx%d %dbpp frame buffer at 0x%lx\n",
timings.hactive.typ, timings.vactive.typ,
VNBITS(priv->l2bpp), uc_plat->base);
-- 
2.34.1



[RFC PATCH 3/5] ARM: dts: stm32: make the DSI clock usable by the clock driver

2023-09-03 Thread Dario Binacchi
As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle nodes with "clocks" properties with an index set to 0.

This patch is preparatory for future developments that require the use
of the DSI clock.

[1] Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
Signed-off-by: Dario Binacchi 
---

 arch/arm/dts/stm32f469-disco-u-boot.dtsi | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index dcc70369cd0d..8e781c5a7b23 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -90,6 +90,11 @@
bootph-all;
 };
 
+ {
+   clocks = < 0 STM32F4_APB2_CLOCK(DSI)>,
+<_hse>;
+};
+
  {
bootph-all;
 };
-- 
2.34.1



[RFC PATCH 2/5] ARM: dts: stm32: make the LTDC clock usable by the clock driver

2023-09-03 Thread Dario Binacchi
As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle nodes with "clocks" properties with an index set to 0.

This patch is preparatory for future developments that require the use
of the LTDC clock.

[1] Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
Signed-off-by: Dario Binacchi 
---

 arch/arm/dts/stm32f469-disco-u-boot.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index c07e2022e4a8..dcc70369cd0d 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -134,6 +134,10 @@
bootph-all;
 };
 
+ {
+   clocks = < 0 STM32F4_APB2_CLOCK(LTDC)>;
+};
+
  {
bootph-all;
 
-- 
2.34.1



[RFC PATCH 1/5] ARM: dts: stm32f469-disco: sync with Linux 6.5

2023-09-03 Thread Dario Binacchi
Sync the devicetree with linux 6.5 for stm32f746-disco board.

Signed-off-by: Dario Binacchi 
---

 arch/arm/dts/stm32f469-disco.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/stm32f469-disco.dts b/arch/arm/dts/stm32f469-disco.dts
index 6e0ffc1903be..c9acabf0f530 100644
--- a/arch/arm/dts/stm32f469-disco.dts
+++ b/arch/arm/dts/stm32f469-disco.dts
@@ -119,7 +119,7 @@
};
};
 
-   panel-dsi@0 {
+   panel@0 {
compatible = "orisetech,otm8009a";
reg = <0>; /* dsi virtual channel (0..3) */
reset-gpios = < 7 GPIO_ACTIVE_LOW>;
@@ -138,7 +138,7 @@
status = "okay";
 
port {
-   ltdc_out_dsi: endpoint@0 {
+   ltdc_out_dsi: endpoint {
remote-endpoint = <_in>;
};
};
-- 
2.34.1



[RFC PATCH 0/5] Support display on stm32f469-disco board

2023-09-03 Thread Dario Binacchi
The series adds support for the Orise Tech OTM8009A display on the
stm32f469-disco board. Substantial differences in the drivers for clock
management, LTDC and DSI compared to Linux, made it necessary to modify
the device tree. These changes were made in stm32f469-disco-uboot.dtsi to
avoid altering the Linux device tree. It is therefore desirable, as soon
as possible, to add these drivers the functionalities so that they do not
require device tree properties that deviate from those present in the Linux
version.


Dario Binacchi (5):
  ARM: dts: stm32f469-disco: sync with Linux 6.5
  ARM: dts: stm32: make the LTDC clock usable by the clock driver
  ARM: dts: stm32: make the DSI clock usable by the clock driver
  ARM: dts: stm32: support display on stm32f469-disco board
  board: stm32f469-disco: add splash screen with stmicroelectronics logo

 arch/arm/dts/stm32f469-disco-u-boot.dtsi |  13 
 arch/arm/dts/stm32f469-disco.dts |   4 +--
 configs/stm32f469-discovery_defconfig|  16 ++
 drivers/video/stm32/stm32_ltdc.c |  37 ++-
 include/configs/stm32f469-discovery.h|   2 ++
 tools/logos/stm32f469-discovery.bmp  | Bin 0 -> 18532 bytes
 6 files changed, 69 insertions(+), 3 deletions(-)
 create mode 100644 tools/logos/stm32f469-discovery.bmp

-- 
2.34.1



[PATCH 10/10] ARM: dts: stm32: support display on stm32f746-disco board

2023-09-03 Thread Dario Binacchi
The patch applies the changes from Linux commit 10a970bc3ebfa ("ARM: dts:
stm32: support display on stm32f746-disco board") and removes the same
settings from stm32f746-disco-u-boot.dtsi.

Signed-off-by: Dario Binacchi 

---

 arch/arm/dts/stm32f746-disco-u-boot.dtsi | 89 ++--
 arch/arm/dts/stm32f746-disco.dts | 44 
 2 files changed, 66 insertions(+), 67 deletions(-)

diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
index 3c2b9fc59512..1b42d6cbbc19 100644
--- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
@@ -23,12 +23,6 @@
spi0 = 
};
 
-   backlight: backlight {
-   compatible = "gpio-backlight";
-   gpios = < 3 0>;
-   status = "okay";
-   };
-
button1 {
compatible = "st,button1";
button-gpio = < 11 0>;
@@ -38,37 +32,10 @@
compatible = "st,led1";
led-gpio = < 1 0>;
};
-
-   panel-rgb@0 {
-   compatible = "simple-panel";
-   backlight = <>;
-   enable-gpios = < 12 0>;
-   status = "okay";
-
-   display-timings {
-   timing@0 {
-   clock-frequency = <900>;
-   hactive = <480>;
-   vactive = <272>;
-   hfront-porch = <2>;
-   hback-porch = <2>;
-   hsync-len = <41>;
-   vfront-porch = <2>;
-   vback-porch = <2>;
-   vsync-len = <10>;
-   hsync-active = <0>;
-   vsync-active = <0>;
-   de-active = <1>;
-   pixelclk-active = <1>;
-   };
-   };
-   };
 };
 
  {
clocks = < 0 STM32F7_APB2_CLOCK(LTDC)>;
-   pinctrl-0 = <_pins>;
-   status = "okay";
bootph-all;
 };
 
@@ -96,6 +63,28 @@
};
 };
 
+_rgb {
+   compatible = "simple-panel";
+
+   display-timings {
+   timing@0 {
+   clock-frequency = <900>;
+   hactive = <480>;
+   vactive = <272>;
+   hfront-porch = <2>;
+   hback-porch = <2>;
+   hsync-len = <41>;
+   vfront-porch = <2>;
+   vback-porch = <2>;
+   vsync-len = <10>;
+   hsync-active = <0>;
+   vsync-active = <0>;
+   de-active = <1>;
+   pixelclk-active = <1>;
+   };
+   };
+};
+
  {
ethernet_mii: mii@0 {
pins {
@@ -160,40 +149,6 @@
};
};
 
-   ltdc_pins: ltdc@0 {
-   pins {
-   pinmux = , /* B0 */
-,  /* B4 */
-, /* VSYNC */
-, /* HSYNC */
-, /* CLK */
-, /* R0 */
-, /* R1 */
-, /* R2 */
-, /* R3 */
-, /* R4 */
-, /* R5 */
-, /* R6 */
-, /* R7 */
-, /* G0 */
-, /* G1 */
-, /* G2 */
-, /* G3 */
-, /* G4 */
-, /* B1 */
-, /* B2 */
-, /* B3 */
-, /* G5 */
-, /* G6 */
-, /* G7 */
-, /* B5 */
-, /* B6 */
-, /* B7 */
-; /* DE */
-   slew-rate = <2>;
-   };
-   };
-
qspi_pins: qspi@0 {
pins {
pinmux = , /* CLK */
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index e1564d69f9f6..431275134033 100644
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746

[PATCH 05/10] ARM: dts: stm32: add pin map for i2c3 controller on stm32f7

2023-09-03 Thread Dario Binacchi
commit 0637e66f8250c61f75042131fcb7f88ead2ad436 Linux upstream.

Add pin configurations for using i2c3 controller on stm32f7.

Signed-off-by: Dario Binacchi 
Signed-off-by: Alexandre Torgue 
---

 arch/arm/dts/stm32f7-pinctrl.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi 
b/arch/arm/dts/stm32f7-pinctrl.dtsi
index 000278ec2c58..607fe42f4f46 100644
--- a/arch/arm/dts/stm32f7-pinctrl.dtsi
+++ b/arch/arm/dts/stm32f7-pinctrl.dtsi
@@ -172,6 +172,16 @@
};
};
 
+   i2c3_pins_a: i2c3-0 {
+   pins {
+   pinmux = , 
/* I2C3_SDA */
+; 
/* I2C3_SCL */
+   bias-disable;
+   drive-open-drain;
+   slew-rate = <0>;
+   };
+   };
+
usbotg_hs_pins_a: usbotg-hs-0 {
pins {
pinmux = , 
/* OTG_HS_ULPI_NXT */
-- 
2.34.1



[PATCH 09/10] ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco

2023-09-03 Thread Dario Binacchi
commit e4e724099f04072053cf411456e3e9aae48c4af1 Linux upstream.

In the schematics of document UM1907, the power supply for the micro SD
card is the same 3v3 voltage that is used to power other devices on the
board. By generalizing the name of the voltage regulator, it can be
referenced by other nodes in the device tree without creating
misunderstandings.

This patch is preparatory for future developments.

Signed-off-by: Dario Binacchi 
Signed-off-by: Alexandre Torgue 
---

 arch/arm/dts/stm32f746-disco.dts | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index 9541f449fd0e..e1564d69f9f6 100644
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -44,9 +44,9 @@
regulator-always-on;
};
 
-   mmc_vcard: mmc_vcard {
+   vcc_3v3: vcc-3v3 {
compatible = "regulator-fixed";
-   regulator-name = "mmc_vcard";
+   regulator-name = "vcc_3v3";
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
};
@@ -82,7 +82,7 @@
 
  {
status = "okay";
-   vmmc-supply = <_vcard>;
+   vmmc-supply = <_3v3>;
cd-gpios = < 13 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "opendrain";
pinctrl-0 = <_pins_a>;
-- 
2.34.1



[PATCH 08/10] ARM: dts: stm32: add pin map for LTDC on stm32f7

2023-09-03 Thread Dario Binacchi
commit ba287d1a0137702a224b1f48673d529257b3c4bf Linux upstream.

Add pin configurations for using LTDC (LCD-tft Display Controller) on
stm32f746-disco board.

Signed-off-by: Dario Binacchi 
Reviewed-by: Raphaël Gallais-Pou 
Signed-off-by: Alexandre Torgue 
---

 arch/arm/dts/stm32f7-pinctrl.dtsi | 34 +++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi 
b/arch/arm/dts/stm32f7-pinctrl.dtsi
index 607fe42f4f46..d3706ee33b5f 100644
--- a/arch/arm/dts/stm32f7-pinctrl.dtsi
+++ b/arch/arm/dts/stm32f7-pinctrl.dtsi
@@ -376,6 +376,40 @@
bias-pull-up;
};
};
+
+   ltdc_pins_a: ltdc-0 {
+   pins {
+   pinmux = , 
/* LCD_B0 */
+,  
/* LCD_B4 */
+, 
/* LCD_VSYNC */
+, 
/* LCD_HSYNC */
+, 
/* LCD_CLK */
+, 
/* LCD_R0 */
+, 
/* LCD_R1 */
+, 
/* LCD_R2 */
+, 
/* LCD_R3 */
+, 
/* LCD_R4 */
+, 
/* LCD_R5 */
+, 
/* LCD_R6 */
+, 
/* LCD_R7 */
+, 
/* LCD_G0 */
+, 
/* LCD_G1 */
+, 
/* LCD_G2 */
+, 
/* LCD_G3 */
+, 
/* LCD_G4 */
+, 
/* LCD_B1 */
+, 
/* LCD_B2 */
+, 
/* LCD_B3 */
+, 
/* LCD_G5 */
+, 
/* LCD_G6 */
+, 
/* LCD_G7 */
+, 
/* LCD_B5 */
+, 
/* LCD_B6 */
+, 
/* LCD_B7 */
+; 
/* LCD_DE */
+   slew-rate = <2>;
+   };
+   };
};
};
 };
-- 
2.34.1



[PATCH 07/10] ARM: dts: stm32: add ltdc support on stm32f746 MCU

2023-09-03 Thread Dario Binacchi
The patch applies the changes from Linux commit 008ef8b3a1a00 ("Add LTDC
(Lcd-tft Display Controller) support") and removes the same settings
from stm32f746-disco-u-boot.dtsi.

Signed-off-by: Dario Binacchi 
---

 arch/arm/dts/stm32f746-disco-u-boot.dtsi | 18 ++
 arch/arm/dts/stm32f746.dtsi  | 10 ++
 2 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
index 522cffb1ac9f..3c2b9fc59512 100644
--- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
@@ -63,19 +63,13 @@
};
};
};
+};
 
-   soc {
-   ltdc: display-controller@40016800 {
-   compatible = "st,stm32-ltdc";
-   reg = <0x40016800 0x200>;
-   resets = < STM32F7_APB2_RESET(LTDC)>;
-   clocks = < 0 STM32F7_APB2_CLOCK(LTDC)>;
-   pinctrl-0 = <_pins>;
-
-   status = "okay";
-   bootph-all;
-   };
-   };
+ {
+   clocks = < 0 STM32F7_APB2_CLOCK(LTDC)>;
+   pinctrl-0 = <_pins>;
+   status = "okay";
+   bootph-all;
 };
 
  {
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index 7b4bd805c998..79dad3192e15 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -518,6 +518,16 @@
};
};
 
+   ltdc: display-controller@40016800 {
+   compatible = "st,stm32-ltdc";
+   reg = <0x40016800 0x200>;
+   interrupts = <88>, <89>;
+   resets = < STM32F7_APB2_RESET(LTDC)>;
+   clocks = < 1 CLK_LCD>;
+   clock-names = "lcd";
+   status = "disabled";
+   };
+
pwrcfg: power-config@40007000 {
compatible = "st,stm32-power-config", "syscon";
reg = <0x40007000 0x400>;
-- 
2.34.1



[PATCH 04/10] ARM: dts: stm32: use RCC macro for CRC node on stm32f746

2023-09-03 Thread Dario Binacchi
commit 7a5f349e592c254f3c1ac34665b6c3905576efc2 Linux upstream.

The patch replaces the number 12 with the appropriate numerical constant
already defined in the file stm32f7-rcc.h.

Signed-off-by: Dario Binacchi 
Signed-off-by: Alexandre Torgue 
---

 arch/arm/dts/stm32f746.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index dc5c257fb5fb..7b4bd805c998 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -526,7 +526,7 @@
crc: crc@40023000 {
compatible = "st,stm32f7-crc";
reg = <0x40023000 0x400>;
-   clocks = < 0 12>;
+   clocks = < 0 STM32F7_AHB1_CLOCK(CRC)>;
status = "disabled";
};
 
-- 
2.34.1



[PATCH 06/10] ARM: dts: stm32: add touchscreen on stm32f746-disco board

2023-09-03 Thread Dario Binacchi
commit f0215440069c4fb12958d2d321e05faa2708a11d Linux upstream.

The patch adds support for touchscreen on the stm32f746-disco board.

Signed-off-by: Dario Binacchi 
Signed-off-by: Alexandre Torgue 
---

 arch/arm/dts/stm32f746-disco.dts | 19 ++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index 1ed58f236149..9541f449fd0e 100644
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -7,8 +7,9 @@
 /dts-v1/;
 #include "stm32f746.dtsi"
 #include "stm32f746-pinctrl.dtsi"
-#include 
 #include 
+#include 
+#include 
 
 / {
model = "STMicroelectronics STM32F746-DISCO board";
@@ -63,6 +64,22 @@
status = "okay";
 };
 
+ {
+   pinctrl-0 = <_pins_a>;
+   pinctrl-names = "default";
+   clock-frequency = <40>;
+   status = "okay";
+
+   touchscreen@38 {
+   compatible = "edt,edt-ft5306";
+   reg = <0x38>;
+   interrupt-parent = <>;
+   interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
+   touchscreen-size-x = <480>;
+   touchscreen-size-y = <272>;
+   };
+};
+
  {
status = "okay";
vmmc-supply = <_vcard>;
-- 
2.34.1



[PATCH 03/10] ARM: dts: stm32: add CAN support on stm32f746

2023-09-03 Thread Dario Binacchi
commit 0920ccdf41e3078a4dd2567eb905ea154bc826e6 Linux upstream.

Add support for bxcan (Basic eXtended CAN controller) to STM32F746. The
chip contains three CAN peripherals, CAN1 and CAN2 in dual peripheral
configuration and CAN3 in single peripheral configuration:
- Dual CAN peripheral configuration:
  * CAN1: Primary bxCAN for managing the communication between a secondary
bxCAN and the 512-byte SRAM memory.
  * CAN2: Secondary bxCAN with no direct access to the SRAM memory.
  This means that the two bxCAN cells share the 512-byte SRAM memory and
  CAN2 can't be used without enabling CAN1.
- Single CAN peripheral configuration:
  * CAN3: Primary bxCAN with dedicated Memory Access Controller unit and
512-byte SRAM memory.

 -
| features | CAN1  | CAN2   | CAN 3   |
 -
| SRAM | 512-byte shared between CAN1 & CAN2| 512-byte|
 -
| Filters  | 26 filters shared between CAN1 & CAN2  | 14 filters  |
 -

Signed-off-by: Dario Binacchi 
Link: 
https://lore.kernel.org/all/20230427204540.3126234-6-dario.binac...@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde 
---

 arch/arm/dts/stm32f746.dtsi | 47 +
 1 file changed, 47 insertions(+)

diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index c97b3d0d07db..dc5c257fb5fb 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -221,6 +221,23 @@
status = "disabled";
};
 
+   can3: can@40003400 {
+   compatible = "st,stm32f4-bxcan";
+   reg = <0x40003400 0x200>;
+   interrupts = <104>, <105>, <106>, <107>;
+   interrupt-names = "tx", "rx0", "rx1", "sce";
+   resets = < STM32F7_APB1_RESET(CAN3)>;
+   clocks = < 0 STM32F7_APB1_CLOCK(CAN3)>;
+   st,gcan = <>;
+   status = "disabled";
+   };
+
+   gcan3: gcan@40003600 {
+   compatible = "st,stm32f4-gcan", "syscon";
+   reg = <0x40003600 0x200>;
+   clocks = < 0 STM32F7_APB1_CLOCK(CAN3)>;
+   };
+
usart2: serial@40004400 {
compatible = "st,stm32f7-uart";
reg = <0x40004400 0x400>;
@@ -301,6 +318,36 @@
status = "disabled";
};
 
+   can1: can@40006400 {
+   compatible = "st,stm32f4-bxcan";
+   reg = <0x40006400 0x200>;
+   interrupts = <19>, <20>, <21>, <22>;
+   interrupt-names = "tx", "rx0", "rx1", "sce";
+   resets = < STM32F7_APB1_RESET(CAN1)>;
+   clocks = < 0 STM32F7_APB1_CLOCK(CAN1)>;
+   st,can-primary;
+   st,gcan = <>;
+   status = "disabled";
+   };
+
+   gcan1: gcan@40006600 {
+   compatible = "st,stm32f4-gcan", "syscon";
+   reg = <0x40006600 0x200>;
+   clocks = < 0 STM32F7_APB1_CLOCK(CAN1)>;
+   };
+
+   can2: can@40006800 {
+   compatible = "st,stm32f4-bxcan";
+   reg = <0x40006800 0x200>;
+   interrupts = <63>, <64>, <65>, <66>;
+   interrupt-names = "tx", "rx0", "rx1", "sce";
+   resets = < STM32F7_APB1_RESET(CAN2)>;
+   clocks = < 0 STM32F7_APB1_CLOCK(CAN2)>;
+   st,can-secondary;
+   st,gcan = <>;
+   status = "disabled";
+   };
+
cec: cec@40006c00 {
compatible = "st,stm32-cec";
reg = <0x40006C00 0x400>;
-- 
2.34.1



[PATCH 02/10] ARM: dts: stm32: add pin map for CAN controller on stm32f7

2023-09-03 Thread Dario Binacchi
commit 011644249686f2675e142519cd59e81e04cfc231 Linux upstream.

Add pin configurations for using CAN controller on stm32f7.

Signed-off-by: Dario Binacchi 
Link: 
https://lore.kernel.org/all/20230427204540.3126234-4-dario.binac...@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde 
---

 arch/arm/dts/stm32f7-pinctrl.dtsi | 82 +++
 1 file changed, 82 insertions(+)

diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi 
b/arch/arm/dts/stm32f7-pinctrl.dtsi
index 8f37aefa7315..000278ec2c58 100644
--- a/arch/arm/dts/stm32f7-pinctrl.dtsi
+++ b/arch/arm/dts/stm32f7-pinctrl.dtsi
@@ -284,6 +284,88 @@
slew-rate = <2>;
};
};
+
+   can1_pins_a: can1-0 {
+   pins1 {
+   pinmux = ; 
/* CAN1_TX */
+   };
+   pins2 {
+   pinmux = ; 
/* CAN1_RX */
+   bias-pull-up;
+   };
+   };
+
+   can1_pins_b: can1-1 {
+   pins1 {
+   pinmux = ; 
/* CAN1_TX */
+   };
+   pins2 {
+   pinmux = ; 
/* CAN1_RX */
+   bias-pull-up;
+   };
+   };
+
+   can1_pins_c: can1-2 {
+   pins1 {
+   pinmux = ; 
/* CAN1_TX */
+   };
+   pins2 {
+   pinmux = ; 
/* CAN1_RX */
+   bias-pull-up;
+
+   };
+   };
+
+   can1_pins_d: can1-3 {
+   pins1 {
+   pinmux = ; 
/* CAN1_TX */
+   };
+   pins2 {
+   pinmux = ; 
/* CAN1_RX */
+   bias-pull-up;
+
+   };
+   };
+
+   can2_pins_a: can2-0 {
+   pins1 {
+   pinmux = ; 
/* CAN2_TX */
+   };
+   pins2 {
+   pinmux = ; 
/* CAN2_RX */
+   bias-pull-up;
+   };
+   };
+
+   can2_pins_b: can2-1 {
+   pins1 {
+   pinmux = ; 
/* CAN2_TX */
+   };
+   pins2 {
+   pinmux = ; 
/* CAN2_RX */
+   bias-pull-up;
+   };
+   };
+
+   can3_pins_a: can3-0 {
+   pins1 {
+   pinmux = ; 
/* CAN3_TX */
+   };
+   pins2 {
+   pinmux = ; 
/* CAN3_RX */
+   bias-pull-up;
+   };
+   };
+
+   can3_pins_b: can3-1 {
+   pins1 {
+   pinmux = ;  
/* CAN3_TX */
+   };
+   pins2 {
+   pinmux = ; 
/* CAN3_RX */
+   bias-pull-up;
+   };
+   };
};
};
 };
-- 
2.34.1



[PATCH 01/10] dt-bindings: mfd: stm32f7: Add binding definition for CAN3

2023-09-03 Thread Dario Binacchi
commit 8f3ef556f8e1a670895f59ef3f01e4e26edd63e3 Linux upstream.

Add binding definition for CAN3 peripheral.

Signed-off-by: Dario Binacchi 
Link: 
https://lore.kernel.org/r/20230423172528.1398158-2-dario.binac...@amarulasolutions.com
Signed-off-by: Lee Jones 
---

 include/dt-bindings/mfd/stm32f7-rcc.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/mfd/stm32f7-rcc.h 
b/include/dt-bindings/mfd/stm32f7-rcc.h
index ba5cb7456ee4..a4e4f9271395 100644
--- a/include/dt-bindings/mfd/stm32f7-rcc.h
+++ b/include/dt-bindings/mfd/stm32f7-rcc.h
@@ -64,6 +64,7 @@
 #define STM32F7_RCC_APB1_TIM14 8
 #define STM32F7_RCC_APB1_LPTIM19
 #define STM32F7_RCC_APB1_WWDG  11
+#define STM32F7_RCC_APB1_CAN3  13
 #define STM32F7_RCC_APB1_SPI2  14
 #define STM32F7_RCC_APB1_SPI3  15
 #define STM32F7_RCC_APB1_SPDIFRX   16
-- 
2.34.1



[PATCH 00/10] ARM: dts: stm32f746 sync with Linux kernel 6.5

2023-09-03 Thread Dario Binacchi
This series contains my patches on the device tree for stm32f746-disco board
that have already been merged into the Linux mainline. Since most of them
applied perfectly, and for the remaining ones, only minimal changes were made,
I preferred not to merge them into a single patch, which would have been less
readable.


Dario Binacchi (10):
  dt-bindings: mfd: stm32f7: Add binding definition for CAN3
  ARM: dts: stm32: add pin map for CAN controller on stm32f7
  ARM: dts: stm32: add CAN support on stm32f746
  ARM: dts: stm32: use RCC macro for CRC node on stm32f746
  ARM: dts: stm32: add pin map for i2c3 controller on stm32f7
  ARM: dts: stm32: add touchscreen on stm32f746-disco board
  ARM: dts: stm32: add ltdc support on stm32f746 MCU
  ARM: dts: stm32: add pin map for LTDC on stm32f7
  ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
  ARM: dts: stm32: support display on stm32f746-disco board

 arch/arm/dts/stm32f7-pinctrl.dtsi| 126 +++
 arch/arm/dts/stm32f746-disco-u-boot.dtsi | 103 +-
 arch/arm/dts/stm32f746-disco.dts |  69 -
 arch/arm/dts/stm32f746.dtsi  |  59 ++-
 include/dt-bindings/mfd/stm32f7-rcc.h|   1 +
 5 files changed, 276 insertions(+), 82 deletions(-)

-- 
2.34.1



[PATCH 2/3] ARM: dts: stm32: add pin map for CAN controller on stm32f4

2023-09-03 Thread Dario Binacchi
commit 559a6e75b4bcf0fc9e41d34865e72cf742f67d8e Linux upstream.

Add pin configurations for using CAN controller on stm32f469-disco
board. They are located on the Arduino compatible connector CN5 (CAN1)
and on the extension connector CN12 (CAN2).

Signed-off-by: Dario Binacchi 
Link: 
https://lore.kernel.org/all/20230328073328.3949796-5-dario.binac...@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde 
---

 arch/arm/dts/stm32f4-pinctrl.dtsi | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm/dts/stm32f4-pinctrl.dtsi 
b/arch/arm/dts/stm32f4-pinctrl.dtsi
index 46815c965d59..0adc41b2a46c 100644
--- a/arch/arm/dts/stm32f4-pinctrl.dtsi
+++ b/arch/arm/dts/stm32f4-pinctrl.dtsi
@@ -412,6 +412,36 @@
slew-rate = <2>;
};
};
+
+   can1_pins_a: can1-0 {
+   pins1 {
+   pinmux = ; 
/* CAN1_TX */
+   };
+   pins2 {
+   pinmux = ; 
/* CAN1_RX */
+   bias-pull-up;
+   };
+   };
+
+   can2_pins_a: can2-0 {
+   pins1 {
+   pinmux = ; 
/* CAN2_TX */
+   };
+   pins2 {
+   pinmux = ; 
/* CAN2_RX */
+   bias-pull-up;
+   };
+   };
+
+   can2_pins_b: can2-1 {
+   pins1 {
+   pinmux = ; 
/* CAN2_TX */
+   };
+   pins2 {
+   pinmux = ; 
/* CAN2_RX */
+   bias-pull-up;
+   };
+   };
};
};
 };
-- 
2.34.1



[PATCH 3/3] ARM: dts: stm32f429: put can2 in secondary mode

2023-09-03 Thread Dario Binacchi
commit 6b443faa313c519db755ff90be32758fd9c66453 Linux upstream.

This is a preparation patch for the upcoming support to manage CAN
peripherals in single configuration.

The addition ensures backwards compatibility.

Signed-off-by: Dario Binacchi 
Link: 
https://lore.kernel.org/all/20230427204540.3126234-3-dario.binac...@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde 

---

 arch/arm/dts/stm32f429.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/stm32f429.dtsi b/arch/arm/dts/stm32f429.dtsi
index 5104fca8..8133ea15b036 100644
--- a/arch/arm/dts/stm32f429.dtsi
+++ b/arch/arm/dts/stm32f429.dtsi
@@ -346,6 +346,7 @@
interrupt-names = "tx", "rx0", "rx1", "sce";
resets = < STM32F4_APB1_RESET(CAN2)>;
clocks = < 0 STM32F4_APB1_CLOCK(CAN2)>;
+   st,can-secondary;
st,gcan = <>;
status = "disabled";
};
-- 
2.34.1



[PATCH 1/3] ARM: dts: stm32: add CAN support on stm32f429

2023-09-03 Thread Dario Binacchi
commit 7355ad1950f41e755e6dc451834be3b94f82acd4 Linux upstream.

Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The
chip contains two CAN peripherals, CAN1 the primary and CAN2 the secondary,
that share some of the required logic like clock and filters. This means
that the secondary CAN can't be used without the primary CAN.

Signed-off-by: Dario Binacchi 
Link: 
https://lore.kernel.org/all/20230328073328.3949796-4-dario.binac...@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde 
---

 arch/arm/dts/stm32f429.dtsi | 29 +
 1 file changed, 29 insertions(+)

diff --git a/arch/arm/dts/stm32f429.dtsi b/arch/arm/dts/stm32f429.dtsi
index e5b13aca40c0..5104fca8 100644
--- a/arch/arm/dts/stm32f429.dtsi
+++ b/arch/arm/dts/stm32f429.dtsi
@@ -321,6 +321,35 @@
status = "disabled";
};
 
+   can1: can@40006400 {
+   compatible = "st,stm32f4-bxcan";
+   reg = <0x40006400 0x200>;
+   interrupts = <19>, <20>, <21>, <22>;
+   interrupt-names = "tx", "rx0", "rx1", "sce";
+   resets = < STM32F4_APB1_RESET(CAN1)>;
+   clocks = < 0 STM32F4_APB1_CLOCK(CAN1)>;
+   st,can-primary;
+   st,gcan = <>;
+   status = "disabled";
+   };
+
+   gcan: gcan@40006600 {
+   compatible = "st,stm32f4-gcan", "syscon";
+   reg = <0x40006600 0x200>;
+   clocks = < 0 STM32F4_APB1_CLOCK(CAN1)>;
+   };
+
+   can2: can@40006800 {
+   compatible = "st,stm32f4-bxcan";
+   reg = <0x40006800 0x200>;
+   interrupts = <63>, <64>, <65>, <66>;
+   interrupt-names = "tx", "rx0", "rx1", "sce";
+   resets = < STM32F4_APB1_RESET(CAN2)>;
+   clocks = < 0 STM32F4_APB1_CLOCK(CAN2)>;
+   st,gcan = <>;
+   status = "disabled";
+   };
+
dac: dac@40007400 {
compatible = "st,stm32f4-dac-core";
reg = <0x40007400 0x400>;
-- 
2.34.1



[PATCH 0/3] ARM: dts: stm32f429 sync with Linux kernel 6.5

2023-09-03 Thread Dario Binacchi
This series contains my patches on the device tree for stm32f429 platform
that have already been merged into the mainline of Linux. Since they applied
perfectly, I preferred not to merge them into a single patch, which would have
been less readable.


Dario Binacchi (3):
  ARM: dts: stm32: add CAN support on stm32f429
  ARM: dts: stm32: add pin map for CAN controller on stm32f4
  ARM: dts: stm32f429: put can2 in secondary mode

 arch/arm/dts/stm32f4-pinctrl.dtsi | 30 ++
 arch/arm/dts/stm32f429.dtsi   | 30 ++
 2 files changed, 60 insertions(+)

-- 
2.34.1



[PATCH 2/3] board: stm32f746-disco: refactor the display of the ST logo

2023-08-20 Thread Dario Binacchi
The patch removes the legacy mode of displaying the ST logo and adopts
the approach introduced by the commit 284b08fb51b6 ("board: stm32mp1: add
splash screen with stmicroelectronics logo"). It was necessary to use a
specific logo for the stm32f746-disco board.

Furthermore, the previous version didn't properly center the logo, hiding
its upper part.

Signed-off-by: Dario Binacchi 
---

 board/st/stm32f746-disco/stm32f746-disco.c |   6 --
 configs/stm32f746-disco_defconfig  |   2 +-
 configs/stm32f746-disco_spl_defconfig  |   2 +-
 include/configs/stm32f746-disco.h  |   7 ++-
 tools/logos/stm32f746-disco.bmp| Bin 0 -> 18052 bytes
 5 files changed, 8 insertions(+), 9 deletions(-)
 create mode 100644 tools/logos/stm32f746-disco.bmp

diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
b/board/st/stm32f746-disco/stm32f746-disco.c
index 4cfb29ef428b..0f9666008430 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -14,7 +14,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -134,10 +133,5 @@ int board_init(void)
}
 #endif
 
-#if defined(CONFIG_CMD_BMP)
-   bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle,
-   BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
-#endif /* CONFIG_CMD_BMP */
-
return 0;
 }
diff --git a/configs/stm32f746-disco_defconfig 
b/configs/stm32f746-disco_defconfig
index 8403679d7fa6..2ca4aaf96eb6 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -56,13 +56,13 @@ CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
 CONFIG_VIDEO=y
+CONFIG_VIDEO_LOGO=y
 CONFIG_BACKLIGHT_GPIO=y
 CONFIG_VIDEO_STM32=y
 CONFIG_VIDEO_STM32_MAX_XRES=480
 CONFIG_VIDEO_STM32_MAX_YRES=272
 CONFIG_SPLASH_SCREEN=y
 CONFIG_SPLASH_SCREEN_ALIGN=y
-CONFIG_VIDEO_BMP_RLE8=y
 CONFIG_BMP_16BPP=y
 CONFIG_BMP_24BPP=y
 CONFIG_BMP_32BPP=y
diff --git a/configs/stm32f746-disco_spl_defconfig 
b/configs/stm32f746-disco_spl_defconfig
index 50c2a36784af..b0afe42433a4 100644
--- a/configs/stm32f746-disco_spl_defconfig
+++ b/configs/stm32f746-disco_spl_defconfig
@@ -82,13 +82,13 @@ CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
 CONFIG_SPL_TIMER=y
 CONFIG_VIDEO=y
+CONFIG_VIDEO_LOGO=y
 CONFIG_BACKLIGHT_GPIO=y
 CONFIG_VIDEO_STM32=y
 CONFIG_VIDEO_STM32_MAX_XRES=480
 CONFIG_VIDEO_STM32_MAX_YRES=272
 CONFIG_SPLASH_SCREEN=y
 CONFIG_SPLASH_SCREEN_ALIGN=y
-CONFIG_VIDEO_BMP_RLE8=y
 CONFIG_BMP_16BPP=y
 CONFIG_BMP_24BPP=y
 CONFIG_BMP_32BPP=y
diff --git a/include/configs/stm32f746-disco.h 
b/include/configs/stm32f746-disco.h
index 9bf01cac47a4..00ec9efba577 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -23,6 +23,10 @@
 #define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0)
 
+#define STM32F746_BOARD_EXTRA_ENV \
+   "splashimage=0xC0448000\0" \
+   "splashpos=m,m\0"
+
 #include 
 #define CFG_EXTRA_ENV_SETTINGS \
"kernel_addr_r=0xC0008000\0"\
@@ -31,7 +35,8 @@
"scriptaddr=0xC0418000\0"   \
"pxefile_addr_r=0xC0428000\0" \
"ramdisk_addr_r=0xC0438000\0"   \
-   BOOTENV
+   BOOTENV \
+   STM32F746_BOARD_EXTRA_ENV
 
 #define CFG_SYS_UBOOT_BASE (CFG_SYS_FLASH_BASE + \
 CONFIG_SPL_PAD_TO)
diff --git a/tools/logos/stm32f746-disco.bmp b/tools/logos/stm32f746-disco.bmp
new file mode 100644
index 
..c1ef4fb035c0833ea22aaa7d8aef1f0f4129d7fa
GIT binary patch
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[PATCH 1/3] configs: stm32f746-disco: limit resolution to 480x272

2023-08-20 Thread Dario Binacchi
The patch fixes the y-resolution, which was causing the creation of a
framebuffer larger than actually needed, resulting in memory waste.

Fixes: cc1b0e7b8e55b ("board: Add display to STM32F746 SoC discovery board")
Signed-off-by: Dario Binacchi 
---

 configs/stm32f746-disco_defconfig | 2 +-
 configs/stm32f746-disco_spl_defconfig | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/configs/stm32f746-disco_defconfig 
b/configs/stm32f746-disco_defconfig
index bb98ee307a6e..8403679d7fa6 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -59,7 +59,7 @@ CONFIG_VIDEO=y
 CONFIG_BACKLIGHT_GPIO=y
 CONFIG_VIDEO_STM32=y
 CONFIG_VIDEO_STM32_MAX_XRES=480
-CONFIG_VIDEO_STM32_MAX_YRES=640
+CONFIG_VIDEO_STM32_MAX_YRES=272
 CONFIG_SPLASH_SCREEN=y
 CONFIG_SPLASH_SCREEN_ALIGN=y
 CONFIG_VIDEO_BMP_RLE8=y
diff --git a/configs/stm32f746-disco_spl_defconfig 
b/configs/stm32f746-disco_spl_defconfig
index 84aaec1e3390..50c2a36784af 100644
--- a/configs/stm32f746-disco_spl_defconfig
+++ b/configs/stm32f746-disco_spl_defconfig
@@ -85,7 +85,7 @@ CONFIG_VIDEO=y
 CONFIG_BACKLIGHT_GPIO=y
 CONFIG_VIDEO_STM32=y
 CONFIG_VIDEO_STM32_MAX_XRES=480
-CONFIG_VIDEO_STM32_MAX_YRES=640
+CONFIG_VIDEO_STM32_MAX_YRES=272
 CONFIG_SPLASH_SCREEN=y
 CONFIG_SPLASH_SCREEN_ALIGN=y
 CONFIG_VIDEO_BMP_RLE8=y
-- 
2.34.1



Re: [PATCH] board: stm32mp1: add splash screen with stmicroelectronics logo

2023-08-14 Thread Dario Binacchi
Patrice, All

On Mon, Aug 7, 2023 at 9:41 AM Patrice CHOTARD
 wrote:
>
>
>
> On 7/10/23 21:02, Dario Binacchi wrote:
> > Hi Patrick,
> >
> > On Mon, Jul 10, 2023 at 1:31 PM Patrick Delaunay
> >  wrote:
> >>
> >> Display the STMicroelectronics logo with features VIDEO_LOGO and
> >> SPLASH_SCREEN on STMicroelectronics boards.
> >>
> >> With CONFIG_SYS_VENDOR = "st", the logo st.bmp is selected, loaded at the
> >> address indicated by splashimage and centered with "splashpos=m,m".
> >>
> >> Signed-off-by: Patrick Delaunay 
> >> ---
> >>
> >>  MAINTAINERS   |   1 +
> >>  configs/stm32mp15_basic_defconfig |   3 +++
> >>  configs/stm32mp15_defconfig   |   3 +++
> >>  configs/stm32mp15_trusted_defconfig   |   3 +++
> >>  include/configs/stm32mp15_st_common.h |   4 +++-
> >>  tools/logos/st.bmp| Bin 0 -> 18244 bytes
> >>  6 files changed, 13 insertions(+), 1 deletion(-)
> >>  create mode 100644 tools/logos/st.bmp
> >>
> >> diff --git a/MAINTAINERS b/MAINTAINERS
> >> index d724b6467344..dfe9409bc7fe 100644
> >> --- a/MAINTAINERS
> >> +++ b/MAINTAINERS
> >> @@ -578,6 +578,7 @@ F:  include/dt-bindings/clock/stm32mp*
> >>  F: include/dt-bindings/pinctrl/stm32-pinfunc.h
> >>  F: include/dt-bindings/reset/stm32mp*
> >>  F: include/stm32_rcc.h
> >> +F: tools/logos/st.bmp
> >>  F: tools/stm32image.c
> >>  N: stm
> >>  N: stm32
> >> diff --git a/configs/stm32mp15_basic_defconfig 
> >> b/configs/stm32mp15_basic_defconfig
> >> index 424ae5dbdfaf..9ea5aaa7145a 100644
> >> --- a/configs/stm32mp15_basic_defconfig
> >> +++ b/configs/stm32mp15_basic_defconfig
> >> @@ -171,6 +171,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483
> >>  CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
> >>  CONFIG_USB_GADGET_DWC2_OTG=y
> >>  CONFIG_VIDEO=y
> >> +CONFIG_VIDEO_LOGO=y
> >>  CONFIG_BACKLIGHT_GPIO=y
> >>  CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
> >>  CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y
> >> @@ -178,6 +179,8 @@ CONFIG_VIDEO_STM32=y
> >>  CONFIG_VIDEO_STM32_DSI=y
> >>  CONFIG_VIDEO_STM32_MAX_XRES=1280
> >>  CONFIG_VIDEO_STM32_MAX_YRES=800
> >> +CONFIG_SPLASH_SCREEN=y
> >> +CONFIG_SPLASH_SCREEN_ALIGN=y
> >>  CONFIG_BMP_16BPP=y
> >>  CONFIG_BMP_24BPP=y
> >>  CONFIG_BMP_32BPP=y
> >> diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
> >> index 2700b5c49910..4d0a81f8a871 100644
> >> --- a/configs/stm32mp15_defconfig
> >> +++ b/configs/stm32mp15_defconfig
> >> @@ -147,6 +147,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483
> >>  CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
> >>  CONFIG_USB_GADGET_DWC2_OTG=y
> >>  CONFIG_VIDEO=y
> >> +CONFIG_VIDEO_LOGO=y
> >>  CONFIG_BACKLIGHT_GPIO=y
> >>  CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
> >>  CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y
> >> @@ -154,6 +155,8 @@ CONFIG_VIDEO_STM32=y
> >>  CONFIG_VIDEO_STM32_DSI=y
> >>  CONFIG_VIDEO_STM32_MAX_XRES=1280
> >>  CONFIG_VIDEO_STM32_MAX_YRES=800
> >> +CONFIG_SPLASH_SCREEN=y
> >> +CONFIG_SPLASH_SCREEN_ALIGN=y
> >>  CONFIG_BMP_16BPP=y
> >>  CONFIG_BMP_24BPP=y
> >>  CONFIG_BMP_32BPP=y
> >> diff --git a/configs/stm32mp15_trusted_defconfig 
> >> b/configs/stm32mp15_trusted_defconfig
> >> index 5b94e0c6d2e7..0a7d8624858d 100644
> >> --- a/configs/stm32mp15_trusted_defconfig
> >> +++ b/configs/stm32mp15_trusted_defconfig
> >> @@ -147,6 +147,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483
> >>  CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
> >>  CONFIG_USB_GADGET_DWC2_OTG=y
> >>  CONFIG_VIDEO=y
> >> +CONFIG_VIDEO_LOGO=y
> >>  CONFIG_BACKLIGHT_GPIO=y
> >>  CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
> >>  CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y
> >> @@ -154,6 +155,8 @@ CONFIG_VIDEO_STM32=y
> >>  CONFIG_VIDEO_STM32_DSI=y
> >>  CONFIG_VIDEO_STM32_MAX_XRES=1280
> >>  CONFIG_VIDEO_STM32_MAX_YRES=800
> >> +CONFIG_SPLASH_SCREEN=y
> >> +CONFIG_SPLASH_SCREEN_ALIGN=y
> >>  CONFIG_BMP_16BPP=y
> >>  CONFIG_BMP_24BPP=y
> >>  CONFIG_BMP_32BPP=y
> >> diff --git a/include/configs/stm32mp15_st_common.h 
> >> b/include/configs/stm32mp15_st_common.h
> >> index b45982a35b8c..60838cb0e3f0 100644
> >> --- a/include/configs/

Re: [PATCH] board: stm32mp1: add splash screen with stmicroelectronics logo

2023-07-10 Thread Dario Binacchi
Hi Patrick,

On Mon, Jul 10, 2023 at 1:31 PM Patrick Delaunay
 wrote:
>
> Display the STMicroelectronics logo with features VIDEO_LOGO and
> SPLASH_SCREEN on STMicroelectronics boards.
>
> With CONFIG_SYS_VENDOR = "st", the logo st.bmp is selected, loaded at the
> address indicated by splashimage and centered with "splashpos=m,m".
>
> Signed-off-by: Patrick Delaunay 
> ---
>
>  MAINTAINERS   |   1 +
>  configs/stm32mp15_basic_defconfig |   3 +++
>  configs/stm32mp15_defconfig   |   3 +++
>  configs/stm32mp15_trusted_defconfig   |   3 +++
>  include/configs/stm32mp15_st_common.h |   4 +++-
>  tools/logos/st.bmp| Bin 0 -> 18244 bytes
>  6 files changed, 13 insertions(+), 1 deletion(-)
>  create mode 100644 tools/logos/st.bmp
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index d724b6467344..dfe9409bc7fe 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -578,6 +578,7 @@ F:  include/dt-bindings/clock/stm32mp*
>  F: include/dt-bindings/pinctrl/stm32-pinfunc.h
>  F: include/dt-bindings/reset/stm32mp*
>  F: include/stm32_rcc.h
> +F: tools/logos/st.bmp
>  F: tools/stm32image.c
>  N: stm
>  N: stm32
> diff --git a/configs/stm32mp15_basic_defconfig 
> b/configs/stm32mp15_basic_defconfig
> index 424ae5dbdfaf..9ea5aaa7145a 100644
> --- a/configs/stm32mp15_basic_defconfig
> +++ b/configs/stm32mp15_basic_defconfig
> @@ -171,6 +171,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483
>  CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
>  CONFIG_USB_GADGET_DWC2_OTG=y
>  CONFIG_VIDEO=y
> +CONFIG_VIDEO_LOGO=y
>  CONFIG_BACKLIGHT_GPIO=y
>  CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
>  CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y
> @@ -178,6 +179,8 @@ CONFIG_VIDEO_STM32=y
>  CONFIG_VIDEO_STM32_DSI=y
>  CONFIG_VIDEO_STM32_MAX_XRES=1280
>  CONFIG_VIDEO_STM32_MAX_YRES=800
> +CONFIG_SPLASH_SCREEN=y
> +CONFIG_SPLASH_SCREEN_ALIGN=y
>  CONFIG_BMP_16BPP=y
>  CONFIG_BMP_24BPP=y
>  CONFIG_BMP_32BPP=y
> diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
> index 2700b5c49910..4d0a81f8a871 100644
> --- a/configs/stm32mp15_defconfig
> +++ b/configs/stm32mp15_defconfig
> @@ -147,6 +147,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483
>  CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
>  CONFIG_USB_GADGET_DWC2_OTG=y
>  CONFIG_VIDEO=y
> +CONFIG_VIDEO_LOGO=y
>  CONFIG_BACKLIGHT_GPIO=y
>  CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
>  CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y
> @@ -154,6 +155,8 @@ CONFIG_VIDEO_STM32=y
>  CONFIG_VIDEO_STM32_DSI=y
>  CONFIG_VIDEO_STM32_MAX_XRES=1280
>  CONFIG_VIDEO_STM32_MAX_YRES=800
> +CONFIG_SPLASH_SCREEN=y
> +CONFIG_SPLASH_SCREEN_ALIGN=y
>  CONFIG_BMP_16BPP=y
>  CONFIG_BMP_24BPP=y
>  CONFIG_BMP_32BPP=y
> diff --git a/configs/stm32mp15_trusted_defconfig 
> b/configs/stm32mp15_trusted_defconfig
> index 5b94e0c6d2e7..0a7d8624858d 100644
> --- a/configs/stm32mp15_trusted_defconfig
> +++ b/configs/stm32mp15_trusted_defconfig
> @@ -147,6 +147,7 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483
>  CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
>  CONFIG_USB_GADGET_DWC2_OTG=y
>  CONFIG_VIDEO=y
> +CONFIG_VIDEO_LOGO=y
>  CONFIG_BACKLIGHT_GPIO=y
>  CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
>  CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y
> @@ -154,6 +155,8 @@ CONFIG_VIDEO_STM32=y
>  CONFIG_VIDEO_STM32_DSI=y
>  CONFIG_VIDEO_STM32_MAX_XRES=1280
>  CONFIG_VIDEO_STM32_MAX_YRES=800
> +CONFIG_SPLASH_SCREEN=y
> +CONFIG_SPLASH_SCREEN_ALIGN=y
>  CONFIG_BMP_16BPP=y
>  CONFIG_BMP_24BPP=y
>  CONFIG_BMP_32BPP=y
> diff --git a/include/configs/stm32mp15_st_common.h 
> b/include/configs/stm32mp15_st_common.h
> index b45982a35b8c..60838cb0e3f0 100644
> --- a/include/configs/stm32mp15_st_common.h
> +++ b/include/configs/stm32mp15_st_common.h
> @@ -10,7 +10,9 @@
>
>  #define STM32MP_BOARD_EXTRA_ENV \
> "usb_pgood_delay=2000\0" \
> -   "console=ttySTM0\0"
> +   "console=ttySTM0\0" \
> +   "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
> +   "splashpos=m,m\0"
>
>  #include 
>
> diff --git a/tools/logos/st.bmp b/tools/logos/st.bmp
> new file mode 100644
> index 
> ..f59d3c5cef6b8bce5213a1ef42a9cdaa3c5dbc58
> GIT binary patch
> literal 18244
> zcmeHvcUV-((s!LXVPJqEg9Hfz>WVo>42Tg_%$P;Qw63nQ=A5|ZOKv57>
> z1OZ9TpyV(E6ZYo#-mm%$0|+yFpYPxIdH1=!JLh!$s;j%JtE=i1cZ}cI@xcG%#Q^+>
> zzm`w{<=7}Nzy`p116Ueq+Hd$w+L-avH{yT(zy1-lp`PqUgI^a@nCfW@{=J-FdS5q~
> zIiL&79_$HohV_B~uf8yE)BsrEJs1}H41>kvy zm9wV6>eSFAjj8m&}6=feT>cvV{;5v=}x8FNMu30%6Ol
> zAlSNkIc!@K4BOYPgdIPvf}QKuz^?T_!tM=gVb8{Ous38q?EB?s*uQB59M}>92e zhqi5k!`nB*ksVv$=+3QhY}a-;zIz88-?I}=?A-+?_w9yL2ll|}gL@(L&^|bGct4yy
> zasb;wICu0AoIiFLE*w7s7f&38ODB)PrBlZt?DPq^9C{MM!@~ATqs;Qe+I6e
> zKMU6`oP%o@&%^ag7vM(N1-NM&;C94ih`bUGkyj(&{m_4*aKd;Kch
> zy>ShqZeEAzTQ?y3_6@jq`zFLh-h!Arx8eS;k??@DyLTWq>Q{IeeHR|xi-NeAXo$Oi
> z58|;UJcxmW*!%D}_5nP3i0x4 z$ z?R6?-ydmv1WTw4=%=9<#E z5Acb!k6DmQTJ}fC%gKiPPdV^8_Y<~UD9FQ>p9h7cea?p>(h5F9aX|qT7ZyNCVIh z6~dR|B9N36gY-)Ywl7dBAx#2brKCyWTPbO!Q1+FyuTcJtv~N|DoLv-hpLJS
> 

Re: [PATCH v2] board: stm32mp1: add splash screen on dk2

2023-07-08 Thread Dario Binacchi
Hi Patrick,

On Wed, Jul 5, 2023 at 2:09 PM Patrick DELAUNAY
 wrote:
>
> Hi Dario,
>
> On 7/4/23 19:31, Dario Binacchi wrote:
> > Display the STMicroelectronics logo.
> >
> > Signed-off-by: Dario Binacchi 
> >
> >
> > ---
> >
> > Changes in v2:
> > - move "splash.h" and "st_logo_data.h" headers before "syscon.h" in order
> >to keep includes sorted alphabetically.
> > - remove "logo" variable and pass 
> > "(ulong)stmicroelectronics_uboot_logo_8bit_rle"
> >directly to the bmp_display() function.
> >
> >   board/st/stm32mp1/stm32mp1.c | 11 +++
> >   1 file changed, 11 insertions(+)
> >
> > diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
> > index 1a1b1844c8c0..ebd3948d519c 100644
> > --- a/board/st/stm32mp1/stm32mp1.c
> > +++ b/board/st/stm32mp1/stm32mp1.c
> > @@ -31,8 +31,11 @@
> >   #include 
> >   #include 
> >   #include 
> > +#include 
> > +#include 
> >   #include 
> >   #include 
> > +#include 
> >   #include 
> >   #include 
> >   #include 
> > @@ -684,6 +687,14 @@ int board_init(void)
> >   fw_images[0].fw_name = u"STM32MP-FIP";
> >   fw_images[0].image_index = 1;
> >   #endif
> > +
> > + if (IS_ENABLED(CONFIG_CMD_BMP)) {
> > + if (board_is_stm32mp15x_dk2()) {
> > + 
> > bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle,
> > + BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
> > + }
> > + }
> > +
> >   return 0;
> >   }
> >
>
>
> I think "include/st_logo_data.h" should be not directly used for STM32 MPU
>
> it is a obsolete way to have splash screen, used by STM32 MCU as STM32F7.
>
>
> And direct management for splash it is not really needed in board code,
>
> as it is already managed in VIDEO framework with CONFIG_VIDEO_LOGO
>
> enabled by default since commit 845d71ce36ab5ae2cef4542b221851cde199
> ("video: Show the U-Boot logo by default")
>
> and with CONFIG_SPLASH_SCREEN
>
>
> see stdio_init_tables()
>
>=> splash_display();
>
>
> position is managed with:
>
> - CONFIG_SPLASH_SCREEN_ALIGN
>
> - variable: "splashpos=m,m"
>
>
> But by default the U-Boot logo (yellow submarine) is used for VIDEO LOGO
> (SPLASH_DECL(u_boot_logo) in video uclass
>
> or denx for SPLASH is used in tools/Makefile
>
>
> # Generic logo
> ifeq ($(LOGO_BMP),)
> LOGO_BMP= $(srctree)/$(src)/logos/denx.bmp
>
> # Use board logo and fallback to vendor
> ifneq ($(wildcard $(srctree)/$(src)/logos/$(BOARD).bmp),)
> LOGO_BMP= $(srctree)/$(src)/logos/$(BOARD).bmp
> else
> ifneq ($(wildcard $(srctree)/$(src)/logos/$(VENDOR).bmp),)
> LOGO_BMP= $(srctree)/$(src)/logos/$(VENDOR).bmp
> endif
> endif
>
>
> The STMicroelectronics logo image can be integrated in this directory with
>
>   VENDOR="st"
>
>   BOARD="stm32mp1"
>
>
> We need to add it ./tools/logos/st.bmp
>
>
> I can propose something, for all ST board STM32MP1x, not only DK2
>
>

Thanks for the explanations.

Regards,
Dario

> Patrick
>


-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


[PATCH v2] board: stm32mp1: add splash screen on dk2

2023-07-04 Thread Dario Binacchi
Display the STMicroelectronics logo.

Signed-off-by: Dario Binacchi 


---

Changes in v2:
- move "splash.h" and "st_logo_data.h" headers before "syscon.h" in order
  to keep includes sorted alphabetically.
- remove "logo" variable and pass 
"(ulong)stmicroelectronics_uboot_logo_8bit_rle"
  directly to the bmp_display() function.

 board/st/stm32mp1/stm32mp1.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 1a1b1844c8c0..ebd3948d519c 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -31,8 +31,11 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -684,6 +687,14 @@ int board_init(void)
fw_images[0].fw_name = u"STM32MP-FIP";
fw_images[0].image_index = 1;
 #endif
+
+   if (IS_ENABLED(CONFIG_CMD_BMP)) {
+   if (board_is_stm32mp15x_dk2()) {
+   
bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle,
+   BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
+   }
+   }
+
return 0;
 }
 
-- 
2.32.0



Re: [PATCH] board: stm32mp1: add splash screen on dk2

2023-07-04 Thread Dario Binacchi
Hi all,

On Tue, Jul 4, 2023 at 10:11 AM Grzegorz Szymaszek  wrote:
>
> Hi,
>
> On Mon, Jul 03, 2023 at 06:27:54PM +0200, Dario Binacchi wrote:
> > diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
> > -%<-
> >  #include 
> > +#include 
> > +#include 
> >  #include 
>
> These two should be put above syscon.h if you want to keep the includes
> sorted alphabetically.

yes, you are right. I will update in v2

>
> > + ulong logo =
> > + (ulong)stmicroelectronics_uboot_logo_8bit_rle;
> > + bmp_display(logo, BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
>
> Technically logo is const.

int bmp_display(ulong addr, int x, int y);
And throughout the code, I only find ulong parameters being passed to
this function.
Perhaps I can replace "logo" with "addr".

Thanks and regards,
Dario

>
>
> All the best
>
> --
> Grzegorz



-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


[PATCH] board: stm32mp1: add splash screen on dk2

2023-07-03 Thread Dario Binacchi
Display the STMicroelectronics logo.

Signed-off-by: Dario Binacchi 
---

 board/st/stm32mp1/stm32mp1.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 1a1b1844c8c0..c8c2a83b2acf 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -32,7 +32,10 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -684,6 +687,15 @@ int board_init(void)
fw_images[0].fw_name = u"STM32MP-FIP";
fw_images[0].image_index = 1;
 #endif
+
+   if (IS_ENABLED(CONFIG_CMD_BMP)) {
+   if (board_is_stm32mp15x_dk2()) {
+   ulong logo =
+   (ulong)stmicroelectronics_uboot_logo_8bit_rle;
+   bmp_display(logo, BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
+   }
+   }
+
return 0;
 }
 
-- 
2.32.0



[RESEND PATCH] ARM: dts: stm32: fix display pinmux for stm32f746-disco

2023-07-03 Thread Dario Binacchi
As reported by the datasheet (DocID027590 Rev 4) for PG12:
- AF9  -> LCD_B4
- AF14 -> LCD_B1

So replace AF14 with AF9 for PG12 in the dts.

Fixes: fe63d3cfb77ef ("ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7")
Signed-off-by: Dario Binacchi 

---

 arch/arm/dts/stm32f746-disco-u-boot.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
index 19b5451db441..522cffb1ac9f 100644
--- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
@@ -169,7 +169,7 @@
ltdc_pins: ltdc@0 {
pins {
pinmux = , /* B0 */
-, /* B4 */
+,  /* B4 */
 , /* VSYNC */
 , /* HSYNC */
 , /* CLK */
-- 
2.32.0



Re: [PATCH] ARM: dts: stm32: fix display pinmux for stm32f746-disco

2023-06-02 Thread Dario Binacchi
On Thu, Jun 1, 2023 at 7:11 PM Tom Rini  wrote:
>
> On Thu, Jun 01, 2023 at 07:06:02PM +0200, Dario Binacchi wrote:
> > As reported by the datasheet (DocID027590 Rev 4) for PG12:
> > - AF9  -> LCD_B4
> > - AF14 -> LCD_B1
> >
> > So replace AF14 with AF9 for PG12 in the dts.
> >
> > Fixes: fe63d3cfb77ef ("ARM: dts: stm32: Sync DT with v4.20 kernel for 
> > stm32f7")
> > Signed-off-by: Dario Binacchi 
> >
> > ---
> >
> >  arch/arm/dts/stm32f746-disco-u-boot.dtsi | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi 
> > b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
> > index 19b5451db441..522cffb1ac9f 100644
> > --- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi
> > +++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
> > @@ -169,7 +169,7 @@
> >   ltdc_pins: ltdc@0 {
> >   pins {
> >   pinmux = , /* B0 */
> > -  , /* B4 */
> > +  ,  /* B4 */
> >, /* VSYNC */
> >, /* HSYNC */
> >, /* CLK */
>
> Why is this whole stanza in a -u-boot.dtsi file and not an upstream
> file?

I just submitted a series to the linux kernel to add support for
display on stm32f746-disco.
https://lore.kernel.org/linux-arm-kernel/20230601170320.2845218-1-dario.binac...@amarulasolutions.com/T/

Thanks and regards,
Dario
>
> --
> Tom



-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


[PATCH] ARM: dts: stm32: fix display pinmux for stm32f746-disco

2023-06-01 Thread Dario Binacchi
As reported by the datasheet (DocID027590 Rev 4) for PG12:
- AF9  -> LCD_B4
- AF14 -> LCD_B1

So replace AF14 with AF9 for PG12 in the dts.

Fixes: fe63d3cfb77ef ("ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7")
Signed-off-by: Dario Binacchi 

---

 arch/arm/dts/stm32f746-disco-u-boot.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
index 19b5451db441..522cffb1ac9f 100644
--- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
@@ -169,7 +169,7 @@
ltdc_pins: ltdc@0 {
pins {
pinmux = , /* B0 */
-, /* B4 */
+,  /* B4 */
 , /* VSYNC */
 , /* HSYNC */
 , /* CLK */
-- 
2.32.0



Re: [PATCH 1/5] mtd/spinand: rework detect procedure for different READ_ID operation

2023-05-31 Thread Dario Binacchi
>> There is no maintainer for drivers/mtd/spinand/ and no
> >>     maintainer for
> >> > >>>>> drivers/mtd/ in general.
> >> > >>>>>
> >> > >>>>> In Patchwork Jagan got assigned, but the get_maintainer.pl
> >> <http://get_maintainer.pl/> script didn't
> >> > >>>>> even add him to Cc, of course.
> >> > >>>>>
> >> > >>>>> Any ideas how to proceed?
> >> > >>>>
> >> > >>>> We don't have anyone dedicated to that area, yes, sadly. I've
> >> added
> >> > >>>> Michael and Dario as they've also been doing mtd-but-not-spi
> >> work of
> >> > >>>> late to see if they're interested. Or since you've long been
> >> working
> >> > >>>> here, would you like to more formally maintain the area? Thanks!
> >> > >>>
> >> > >>> They can come from our tree. I will try to sort out all my
> >> duties weeked
> >> > >>
> >> > >> Any news regarding reviewing/picking these patches?
> >> > >
> >> > > Ping!
> >> > >
> >> > > Can you please apply these patches, that have been waiting for
> >> so long?
> >> >
> >> > I still can't see this applied anywhere. You already told me to take
> >> > care of it multiple times. Can you please get it done?
> >>
> >> Yes, I'd really like to see a PR at least vs -next at this point so
> >> things aren't lost, thanks!
> >>
> >>
> >> I think that we pick already it so it will happen.
> >
> > I can see patch 1/5 of this series in the nand-next tree. What about the
> > other four patches of this series? Please pick them up, too!
>
> Ping, again! I will just keep on doing this and hope at some point you
> will pick up the patches.

Applied to nand-next.
https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/16443

Thanks and regards
Dario
-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Pull request for u-boot-nand-20230422

2023-04-22 Thread Dario Binacchi
Hi Tom,

The following changes since commit 5db4972a5bbdbf9e3af48ffc9bc4fec73b7b6a79:

  Merge tag 'u-boot-nand-20230417' of
https://source.denx.de/u-boot/custodians/u-boot-nand-flash (2023-04-17
10:47:33 -0400)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-nand-flash.git
tags/u-boot-nand-20230422

for you to fetch changes up to 770e77051ec50b46c2aed4c4a355bd79054cf274:

  mtd: rawnand: nand_base: Handle algorithm selection (2023-04-22
23:07:57 +0200)

Gitlab CI showed no issues:
https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/16082


Pull request for u-boot-nand-20230422

Replaces a patch by Linus Walleij merged with pull request
u-boot-nand-20230417, with a newer version that contains fixes for tests
run by Tom Rini.


Dario Binacchi (1):
  Revert "mtd: rawnand: nand_base: Handle algorithm selection"

Linus Walleij (1):
  mtd: rawnand: nand_base: Handle algorithm selection

 drivers/mtd/nand/raw/nand_base.c | 29 ++---
 1 file changed, 22 insertions(+), 7 deletions(-)

-- 
Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


[RESEND PATCH 3/3] imx6: clock: print real pixel clock rate

2023-04-22 Thread Dario Binacchi
Add debug messages to print the real pixel clock rate, which may not be
the requested one.

Signed-off-by: Dario Binacchi 

---

 arch/arm/mach-imx/mx6/clock.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c
index 267d86ab4194..1bdc568f9b14 100644
--- a/arch/arm/mach-imx/mx6/clock.c
+++ b/arch/arm/mach-imx/mx6/clock.c
@@ -802,6 +802,7 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq)
}
 
enable_lcdif_clock(base_addr, 1);
+   debug("pixel clock = %u\n", mxc_get_clock(MXC_LCDIF1_CLK));
} else if (is_mx6sx()) {
/* Setting LCDIF2 for i.MX6SX */
if (enable_pll_video(pll_div, pll_num, pll_denom, post_div))
@@ -823,6 +824,7 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq)
 MXC_CCM_CSCMR1_LCDIF2_PODF_OFFSET));
 
enable_lcdif_clock(base_addr, 1);
+   debug("pixel clock = %u\n", mxc_get_clock(MXC_LCDIF2_CLK));
}
 }
 
-- 
2.32.0



[RESEND PATCH 2/3] imx6: clock: add support to get LCD pixel clock rate

2023-04-22 Thread Dario Binacchi
Add the get_lcd_clk() function to get the LCD pixel clock rate.

The patch has been tested on imx6ul platform.

Signed-off-by: Dario Binacchi 
---

 arch/arm/include/asm/arch-mx6/clock.h |  2 +
 arch/arm/mach-imx/mx6/clock.c | 58 +++
 2 files changed, 60 insertions(+)

diff --git a/arch/arm/include/asm/arch-mx6/clock.h 
b/arch/arm/include/asm/arch-mx6/clock.h
index 8ae49715789c..81af89c631f5 100644
--- a/arch/arm/include/asm/arch-mx6/clock.h
+++ b/arch/arm/include/asm/arch-mx6/clock.h
@@ -41,6 +41,8 @@ enum mxc_clock {
MXC_SATA_CLK,
MXC_NFC_CLK,
MXC_I2C_CLK,
+   MXC_LCDIF1_CLK,
+   MXC_LCDIF2_CLK,
 };
 
 enum ldb_di_clock {
diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c
index 17d8dcd5c841..267d86ab4194 100644
--- a/arch/arm/mach-imx/mx6/clock.c
+++ b/arch/arm/mach-imx/mx6/clock.c
@@ -418,6 +418,60 @@ static u32 get_uart_clk(void)
return freq / (uart_podf + 1);
 }
 
+static u32 get_lcd_clk(unsigned int ifnum)
+{
+   u32 pll_rate;
+   u32 pred, postd;
+
+   if (!is_mx6sx() && !is_mx6ul() && !is_mx6ull() && !is_mx6sl() &&
+   !is_mx6sll()) {
+   debug("This chip does't support lcd\n");
+   return 0;
+   }
+
+   pll_rate = decode_pll(PLL_VIDEO, MXC_HCLK);
+   if (ifnum == 1) {
+   if (!is_mx6sl()) {
+   pred = __raw_readl(_ccm->cscdr2);
+   pred &= MXC_CCM_CSCDR2_LCDIF1_PRE_DIV_MASK;
+   pred = pred >> MXC_CCM_CSCDR2_LCDIF1_PRE_DIV_OFFSET;
+
+   postd = readl(_ccm->cbcmr);
+   postd &= MXC_CCM_CBCMR_LCDIF1_PODF_MASK;
+   postd = postd >> MXC_CCM_CBCMR_LCDIF1_PODF_OFFSET;
+   } else {
+   pred = __raw_readl(_ccm->cscdr2);
+   pred &= MXC_CCM_CSCDR2_LCDIF_PIX_PRE_DIV_MASK;
+   pred = pred >> MXC_CCM_CSCDR2_LCDIF_PIX_PRE_DIV_OFFSET;
+
+   postd = readl(_ccm->cscmr1);
+   postd &= MXC_CCM_CSCMR1_LCDIF_PIX_PODF_OFFSET;
+   postd = postd >> MXC_CCM_CBCMR_LCDIF1_PODF_OFFSET;
+   }
+   } else if (ifnum == 2) {
+   if (is_mx6sx()) {
+   pred = __raw_readl(_ccm->cscdr2);
+   pred &= MXC_CCM_CSCDR2_LCDIF2_PRE_DIV_MASK;
+   pred = pred >> MXC_CCM_CSCDR2_LCDIF2_PRE_DIV_OFFSET;
+
+   postd = readl(_ccm->cscmr1);
+   postd &= MXC_CCM_CSCMR1_LCDIF2_PODF_MASK;
+   postd = postd >> MXC_CCM_CSCMR1_LCDIF2_PODF_OFFSET;
+
+   } else {
+   goto if_err;
+   }
+   } else {
+   goto if_err;
+   }
+
+   return DIV_ROUND_UP_ULL((u64)pll_rate, (postd + 1) * (pred + 1));
+
+if_err:
+   debug("This chip not support lcd iterface %d\n", ifnum);
+   return 0;
+}
+
 static u32 get_cspi_clk(void)
 {
u32 reg, cspi_podf;
@@ -1273,6 +1327,10 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
return get_usdhc_clk(3);
case MXC_SATA_CLK:
return get_ahb_clk();
+   case MXC_LCDIF1_CLK:
+   return get_lcd_clk(1);
+   case MXC_LCDIF2_CLK:
+   return get_lcd_clk(2);
default:
printf("Unsupported MXC CLK: %d\n", clk);
break;
-- 
2.32.0



[RESEND PATCH 1/3] imx6: clock: improve calculations to get the PLL video rate

2023-04-22 Thread Dario Binacchi
During some tests to check the pixel clock rate in the transition from
U-Boot to the Linux kernel, I noticed that with the same configuration
of the registers the debug messages reported different rates.

The same Linux kernel calculations are now used to get the PLL video
rate.

Signed-off-by: Dario Binacchi 
Reviewed-by: Michael Trimarchi 
---

 arch/arm/mach-imx/mx6/clock.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c
index cb9d629be408..17d8dcd5c841 100644
--- a/arch/arm/mach-imx/mx6/clock.c
+++ b/arch/arm/mach-imx/mx6/clock.c
@@ -213,6 +213,7 @@ int enable_spi_clk(unsigned char enable, unsigned spi_num)
 static u32 decode_pll(enum pll_clocks pll, u32 infreq)
 {
u32 div, test_div, pll_num, pll_denom;
+   u64 temp64;
 
switch (pll) {
case PLL_SYS:
@@ -272,7 +273,10 @@ static u32 decode_pll(enum pll_clocks pll, u32 infreq)
}
test_div = 1 << (2 - test_div);
 
-   return infreq * (div + pll_num / pll_denom) / test_div;
+   temp64 = (u64)infreq;
+   temp64 *= pll_num;
+   do_div(temp64, pll_denom);
+   return infreq * div + (unsigned long)temp64;
default:
return 0;
}
-- 
2.32.0



[RESEND PATCH 0/3] imx6: clock: add support to get LCD pixel clock rate

2023-04-22 Thread Dario Binacchi
The series adds a function to get the LCD pixel clock rate. Also
improves video PLLL rate calculation.


Dario Binacchi (3):
  imx6: clock: improve calculations to get the PLL video rate
  imx6: clock: add support to get LCD pixel clock rate
  imx6: clock: print real pixel clock rate

 arch/arm/include/asm/arch-mx6/clock.h |  2 +
 arch/arm/mach-imx/mx6/clock.c | 66 ++-
 2 files changed, 67 insertions(+), 1 deletion(-)

-- 
2.32.0



[PATCH] ARM: dts: stm32f769-disco: remove the dsi_host node

2023-04-22 Thread Dario Binacchi
The node has become useless, as described in the
commit 754815b854258 ("video: stm32: remove the compatible "synopsys, 
dw-mipi-dsi" support")

Signed-off-by: Dario Binacchi 
---

 arch/arm/dts/stm32f769-disco-u-boot.dtsi | 5 -
 1 file changed, 5 deletions(-)

diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi 
b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
index b5198fddff7c..2c823cce98b4 100644
--- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
@@ -28,11 +28,6 @@
button-gpio = < 0 0>;
};
 
-   dsi_host: dsi_host {
-   compatible = "synopsys,dw-mipi-dsi";
-   status = "okay";
-   };
-
led1 {
compatible = "st,led1";
led-gpio = < 5 0>;
-- 
2.32.0



[PATCH] configs: stm32f746-disco: remove a useless comment

2023-04-22 Thread Dario Binacchi
Commit 8fc78fc73b7f9d ("configs: migrate CONFIG_BMP_16/24/32BPP to defconfigs")
made the comment useless.

Signed-off-by: Dario Binacchi 
---

 include/configs/stm32f746-disco.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/configs/stm32f746-disco.h 
b/include/configs/stm32f746-disco.h
index 34856d300403..9bf01cac47a4 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -36,6 +36,4 @@
 #define CFG_SYS_UBOOT_BASE (CFG_SYS_FLASH_BASE + \
 CONFIG_SPL_PAD_TO)
 
-/* For splashcreen */
-
 #endif /* __CONFIG_H */
-- 
2.32.0



Re: [PATCH v2] nand: brcmnand: add iproc support

2023-04-19 Thread Dario Binacchi
Hi Linus,

On Wed, Apr 19, 2023 at 4:00 PM Linus Walleij  wrote:
>
> On Wed, Apr 19, 2023 at 3:19 PM Dario Binacchi
>  wrote:
> > On Wed, Apr 19, 2023 at 3:04 PM Linus Walleij  
> > wrote:
> > >
> > > On Mon, Apr 17, 2023 at 10:37 AM Dario Binacchi
> > >  wrote:
> > >
> > > > Applied to nand-next ( as well as the patch "mtd: rawnand: nand_base:
> > > > Handle algorithm selection").
> > >
> > > 1) Sweet! Thanks.
> > >
> > > 2) Did you use the latest versions that I resent as part of the
> > > NorthStar support?
> >
> > I applied v2:
> > https://patchwork.ozlabs.org/project/uboot/patch/20230308214231.378013-1-linus.wall...@linaro.org/
> > https://patchwork.ozlabs.org/project/uboot/patch/20230308212851.370939-1-linus.wall...@linaro.org/
>
> The second patch will be problematic, can you switch it to the newer
> versions?

This one?
https://patchwork.ozlabs.org/project/uboot/patch/20230308212851.370939-1-linus.wall...@linaro.org/
I can revert the commit
ff33d3c87c2a mtd: rawnand: nand_base: Handle algorithm selection
and apply your newer patch.
Do you agree?

Thanks and regards,
Dario
>
> I'm sorry for messing things up by moving the patches over to a
> different series :(
>
> Thanks,
> Linus Walleij



-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Re: [PATCH v2] nand: brcmnand: add iproc support

2023-04-19 Thread Dario Binacchi
Hi Linus,

On Wed, Apr 19, 2023 at 3:04 PM Linus Walleij  wrote:
>
> On Mon, Apr 17, 2023 at 10:37 AM Dario Binacchi
>  wrote:
>
> > Applied to nand-next ( as well as the patch "mtd: rawnand: nand_base:
> > Handle algorithm selection").
>
> 1) Sweet! Thanks.
>
> 2) Did you use the latest versions that I resent as part of the
> NorthStar support?

I applied v2:
https://patchwork.ozlabs.org/project/uboot/patch/20230308214231.378013-1-linus.wall...@linaro.org/
https://patchwork.ozlabs.org/project/uboot/patch/20230308212851.370939-1-linus.wall...@linaro.org/

Thanks and regards,
Dario

>
> https://lore.kernel.org/u-boot/20230407134008.1939717-2-linus.wall...@linaro.org/
> https://lore.kernel.org/u-boot/20230407134008.1939717-3-linus.wall...@linaro.org/
>
> Otherwise please use these versions instead, because the second
> patch needed some fixing for Tom's system. Thanks a lot!
>
> Yours,
> Linus Walleij



-- 

Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


Pull request for u-boot-nand-20230417

2023-04-17 Thread Dario Binacchi
Hi Tom,

The following changes since commit 12c1e5782401abca1a8cff578d1911a9ca7d2e7d:

  Merge branch 'master' of
https://source.denx.de/u-boot/custodians/u-boot-marvell (2023-04-14
10:50:55 -0400)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-nand-flash.git
tags/u-boot-nand-20230417

for you to fetch changes up to 156968211ef0e155a198a2fe9e94187a91186ab9:

  colibri-imx6ull: specify MTD partitions on command line (2023-04-16
14:19:27 +0200)

Gitlab CI showed no issues:
https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/16019


Pull request for u-boot-nand-20230417

The first two patches are by Frieder Schrempf who joins as a reviewer for
the SPI NAND framework and drivers.

The following 2 patches are by Linus Walleij and are taken by the series
"Add Broadcom Northstar basic support".

Bin Meng makes static a list for octeontx.

Francesco Dolcini specifies MTD partitions on command line for
colibri-{imx6ull,imx7}.


Bin Meng (1):
  nand: raw: octeontx: Make list static

Francesco Dolcini (2):
  colibri-imx7: specify MTD partitions on command line
  colibri-imx6ull: specify MTD partitions on command line

Frieder Schrempf (2):
  MAINTAINERS: Add entry for SPI NAND framework and drivers
  MAINTAINERS: Rename NAND FLASH to RAW NAND

Linus Walleij (2):
  mtd: rawnand: nand_base: Handle algorithm selection
  nand: brcmnand: add iproc support

 MAINTAINERS |  22 +++---
 board/toradex/colibri-imx6ull/colibri-imx6ull.c |  11 ---
 board/toradex/colibri_imx7/colibri_imx7.c   |  10 --
 configs/colibri-imx6ull_defconfig   |   1 -
 configs/colibri_imx7_defconfig  |   1 -
 drivers/mtd/nand/raw/Kconfig|   7 +++
 drivers/mtd/nand/raw/brcmnand/Makefile  |   1 +
 drivers/mtd/nand/raw/brcmnand/iproc_nand.c  | 148
++
 drivers/mtd/nand/raw/nand_base.c|  12 +---
 drivers/mtd/nand/raw/octeontx_bch.c |   2 +-
 drivers/mtd/nand/raw/octeontx_nand.c|   2 +-
 include/configs/colibri-imx6ull.h   |   2 +-
 include/configs/colibri_imx7.h  |   2 +-
 13 files changed, 184 insertions(+), 37 deletions(-)
 create mode 100644 drivers/mtd/nand/raw/brcmnand/iproc_nand.c


-- 
Dario Binacchi

Senior Embedded Linux Developer

dario.binac...@amarulasolutions.com

__


Amarula Solutions SRL

Via Le Canevare 30, 31100 Treviso, Veneto, IT

T. +39 042 243 5310
i...@amarulasolutions.com

www.amarulasolutions.com


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