Re: [U-Boot] [PATCH 4/6] armv8/mmu: Set bits marked RES1 in TCR
-Original Messages-
From: Thierry Reding thierry.red...@gmail.com
Sent Time: 2015-03-20 19:47:51 (Friday)
To: u-boot@lists.denx.de
Cc: Marc Zyngier marc.zyng...@arm.com
Subject: [U-Boot] [PATCH 4/6] armv8/mmu: Set bits marked RES1 in TCR
From: Thierry Reding tred...@nvidia.com
For EL3 and EL2, the documentation says that bits 31 and 23 are reserved
but should be written as 1.
For EL1, only bit 23 is not reserved, so only write bit 31 as 1.
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Thierry Reding tred...@nvidia.com
---
arch/arm/cpu/armv8/cache_v8.c| 6 +++---
arch/arm/include/asm/armv8/mmu.h | 4
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 254a629a3b8c..f9b04057f696 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -50,15 +50,15 @@ static void mmu_setup(void)
el = current_el();
if (el == 1) {
set_ttbr_tcr_mair(el, gd-arch.tlb_addr,
- TCR_FLAGS | TCR_EL1_IPS_BITS,
+ TCR_EL1_RSVD | TCR_FLAGS | TCR_EL1_IPS_BITS,
MEMORY_ATTRIBUTES);
} else if (el == 2) {
set_ttbr_tcr_mair(el, gd-arch.tlb_addr,
- TCR_FLAGS | TCR_EL2_IPS_BITS,
+ TCR_EL2_RSVD | TCR_FLAGS | TCR_EL2_IPS_BITS,
MEMORY_ATTRIBUTES);
} else {
set_ttbr_tcr_mair(el, gd-arch.tlb_addr,
- TCR_FLAGS | TCR_EL3_IPS_BITS,
+ TCR_EL3_RSVD | TCR_FLAGS | TCR_EL3_IPS_BITS,
MEMORY_ATTRIBUTES);
}
/* enable the mmu */
diff --git a/arch/arm/include/asm/armv8/mmu.h
b/arch/arm/include/asm/armv8/mmu.h
index 6d42f5533a74..8e577b34e4ba 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -109,6 +109,10 @@
TCR_IRGN_WBWA | \
TCR_T0SZ(VA_BITS))
+#define TCR_EL1_RSVD (1 31)
+#define TCR_EL2_RSVD (1 31 | 1 23)
+#define TCR_EL3_RSVD (1 31 | 1 23)
+
#ifndef __ASSEMBLY__
void set_pgtable_section(u64 *page_table, u64 index,
u64 section, u64 memory_type);
--
2.3.2
Acked-by: david.feng feng...@phytium.com.cn
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Re: [U-Boot] [PATCH 2/6] armv8: Implement CONFIG_SYS_MALLOC_F_LEN support
hi Thierry, -Original Messages- From: Thierry Reding thierry.red...@gmail.com Sent Time: 2015-03-20 19:47:49 (Friday) To: u-boot@lists.denx.de Cc: Marc Zyngier marc.zyng...@arm.com Subject: [U-Boot] [PATCH 2/6] armv8: Implement CONFIG_SYS_MALLOC_F_LEN support From: Thierry Reding tred...@nvidia.com Implement early malloc() support in a similar way as on 32-bit ARM. This is required for 64-bit Tegra SoCs that initialize from the device tree just like the earlier 32-bit SoCs. Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Thierry Reding tred...@nvidia.com --- arch/arm/include/asm/config.h | 4 arch/arm/lib/crt0_64.S| 16 ++-- 2 files changed, 14 insertions(+), 6 deletions(-) diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h index be80434dee4d..7a34a0186cb1 100644 --- a/arch/arm/include/asm/config.h +++ b/arch/arm/include/asm/config.h @@ -7,10 +7,6 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ -#ifdef __aarch64__ -#define CONFIG_SYS_GENERIC_GLOBAL_DATA -#endif - #define CONFIG_LMB #define CONFIG_SYS_BOOT_RAMDISK_HIGH diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S index 77563967e517..010efdbf8f3f 100644 --- a/arch/arm/lib/crt0_64.S +++ b/arch/arm/lib/crt0_64.S @@ -62,9 +62,21 @@ ENTRY(_main) * Set up initial C runtime environment and call board_init_f(0). */ ldr x0, =(CONFIG_SYS_INIT_SP_ADDR) + mov x1, x0 sub x0, x0, #GD_SIZE/* allocate one GD above SP */ - bic sp, x0, #0xf/* 16-byte alignment for ABI compliance */ - mov x18, sp /* GD is above SP */ + bic x0, x0, #0xf/* 16-byte alignment for ABI compliance */ + mov x18, x0 /* GD is above SP */ + mov sp, x0 +clr_gd: + str xzr, [x0], #8 + cmp x0, x1 + b.loclr_gd +#if defined(CONFIG_SYS_MALLOC_F_LEN) + ldr x0, =CONFIG_SYS_MALLOC_F_LEN + sub x0, sp, x0 + str x0, [x18, #GD_MALLOC_BASE] sp should substract CONFIG_SYS_MALLOC_F_LEN also. Actually my previous patch did the same work, but got no reply. +#endif +3: mov x0, #0 bl board_init_f -- 2.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/6] armv8/mmu: Clean up TCR programming
-Original Messages- From: Thierry Reding thierry.red...@gmail.com Sent Time: 2015-03-20 19:47:50 (Friday) To: u-boot@lists.denx.de Cc: Marc Zyngier marc.zyng...@arm.com Subject: [U-Boot] [PATCH 3/6] armv8/mmu: Clean up TCR programming From: Thierry Reding tred...@nvidia.com Use the inner shareable attribute for memory, which makes more sense considering that this code is called when caches are being enabled. While at it, fix the values for the shareability attribute field to match the documentation. Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Thierry Reding tred...@nvidia.com --- arch/arm/include/asm/armv8/mmu.h | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index 4b9cb5296572..6d42f5533a74 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -93,8 +93,8 @@ #define TCR_ORGN_WBNWA (3 10) #define TCR_ORGN_MASK(3 10) #define TCR_SHARED_NON (0 12) -#define TCR_SHARED_OUTER (1 12) -#define TCR_SHARED_INNER (2 12) +#define TCR_SHARED_OUTER (2 12) +#define TCR_SHARED_INNER (3 12) #define TCR_TG0_4K (0 14) #define TCR_TG0_64K (1 14) #define TCR_TG0_16K (2 14) @@ -102,9 +102,9 @@ #define TCR_EL2_IPS_BITS (3 16) /* 42 bits physical address */ #define TCR_EL3_IPS_BITS (3 16) /* 42 bits physical address */ -/* PTWs cacheable, inner/outer WBWA and non-shareable */ +/* PTWs cacheable, inner/outer WBWA and inner shareable */ #define TCR_FLAGS(TCR_TG0_64K | \ - TCR_SHARED_NON |\ + TCR_SHARED_INNER | \ TCR_ORGN_WBWA | \ TCR_IRGN_WBWA | \ TCR_T0SZ(VA_BITS)) -- 2.3.2 Acked-by: david.feng feng...@phytium.com.cn ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/6] armv8/cache: Fix page table creation
-Original Messages-
From: Thierry Reding thierry.red...@gmail.com
Sent Time: 2015-03-20 19:47:48 (Friday)
To: u-boot@lists.denx.de
Cc: Marc Zyngier marc.zyng...@arm.com
Subject: [U-Boot] [PATCH 1/6] armv8/cache: Fix page table creation
From: Thierry Reding tred...@nvidia.com
While generating the page tables, a running integer index is shifted by
SECTION_SHIFT (29) and causes overflow for any integer bigger than 7.
The page tables therefore alias to the same 8 sections and cause U-Boot
to hang once the MMU is enabled.
Fix this by making the index a 64-bit unsigned integer and so avoid the
overflow.
Acked-by: david.feng feng...@phytium.com.cn
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Thierry Reding tred...@nvidia.com
---
arch/arm/cpu/armv8/cache_v8.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index c5ec5297cd39..254a629a3b8c 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -25,9 +25,9 @@ void set_pgtable_section(u64 *page_table, u64 index, u64
section,
/* to activate the MMU we need to set up virtual memory */
static void mmu_setup(void)
{
- int i, j, el;
bd_t *bd = gd-bd;
- u64 *page_table = (u64 *)gd-arch.tlb_addr;
+ u64 *page_table = (u64 *)gd-arch.tlb_addr, i, j;
+ int el;
/* Setup an identity-mapping for all spaces */
for (i = 0; i (PGTABLE_SIZE 3); i++) {
--
2.3.2
A previous patch did the same work, but got no reply.
Yours.
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Re: [U-Boot] [PATCH] Vexpress64: Fix the compiling error when CONFIG_ARMV8_MULTIENTRY defined
hi Linus,
-Original Messages-
From: Linus Walleij linus.wall...@linaro.org
Sent Time: 2015-03-20 17:39:48 (Friday)
To: FengHua feng...@phytium.com.cn
Cc: U-Boot Mailing List u-boot@lists.denx.de, albert.u.boot
albert.u.b...@aribaud.net
Subject: Re: Re: [PATCH] Vexpress64: Fix the compiling error when
CONFIG_ARMV8_MULTIENTRY defined
On Wed, Mar 11, 2015 at 2:08 PM, FengHua feng...@phytium.com.cn wrote:
(...)
As asked earlier: how can I test this with FVP or the base model?
I usually use Foundation Model.
OK... That is the same as the FVP I'm using I guess:
$ Foundation_v8pkg/models/Linux64_GCC-4.1/Foundation_v8 --version
ARM V8 Foundation Model r0p0 (model build 9.0.24)
Copyright 2013 ARM Limited.
All Rights Reserved.
Correct?
Yes
I'm very interested in doing this as I guess it involves starting U-Boot
at EL3 on bare metal and I really want to try this.
+/* SMP Spin Table Definitions */
+#ifdef CONFIG_BASE_FVP
+#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE +
0x03f0)
+#else
+#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
+#endif
Where are these address defines coming from?
It's just hard coded and should be the same value with that in DTS.
I look in the DTS from the Linux kernel:
arch/arm64/boot/dts/arm/foundation-v8.dts:
cpu@0 {
device_type = cpu;
compatible = arm,armv8;
reg = 0x0 0x0;
enable-method = spin-table;
cpu-release-addr = 0x0 0x8000fff8;
next-level-cache = L2_0;
};
cpu@1 {
device_type = cpu;
compatible = arm,armv8;
reg = 0x0 0x1;
enable-method = spin-table;
cpu-release-addr = 0x0 0x8000fff8;
next-level-cache = L2_0;
};
(...)
It's not the same addres for what I can tell,
CONFIG_SYS_SDRAM_BASE + 0x03f0 = 0x83f0
but the DTS cpu-release-addr is 0x8000fff8...
Curiously we also have an ontology problem here: the DTS in
the Linux kernel does use spin tables, but there is another set of
DTS files in the ARM Trusted Firmware distribution, for the same
simulator, stating PSCI as CPU release mechanism. These are
the only ones that work properly when using ARM TF.
(Well obviously you don't use these...)
PSCI is prefered by Linux.
Do these spin tables exist in a standard ARM FVP or base model?
I get the impression that a secondary operating system is being booted
on the secondary CPU at one of these addresses, but why is it running
at these addresses specifically, and is that something coming with these
simulators, or is it some image that is loaded on the side, that the
community does not have access to?
PSCI is not implemented in uboot-armv8.
Nope. But it is implemented in ARM Trusted Firmware for ARMv8.
ARM TF install the PSCI handlers before U-Boot is executed.
If booting u-boot on bare-metal
only spin table can be used. All we do is describing booting
method(spin table) and cpu release
address in DTS. Linux kernel get cpu release address from DTS also.
Yep, I want to try this method...
I just cannot even get U-Boot to run on the foundation model.
I alter CONFIG_SYS_TEXT_BASE to 0x0:
#define CONFIG_SYS_TEXT_BASE0x
Then I run the simulator like so:
Foundation_v8pkg/models/Linux64_GCC-4.1/Foundation_v8 \
--cores=4 \
--no-secure-memory\
--visualization \
--gicv3 \
--data=u-boot-fvp-semi.bin@0x
Do you do this as well? Or how do you kick your simulator to
run U-Boot on bare metal?
CONFIG_SYS_TEXT_BASE should be defined as 0x8000.
The reset PC value is 0x8000 on Foundation Model.
and I use --image=u-boot.bin instead of --data=
Yours,
David.
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Re: [U-Boot] [PATCH 6/6] armv8: Allow SoCs to override the generic timer
hi Thierry, -Original Messages- From: Thierry Reding thierry.red...@gmail.com Sent Time: 2015-03-20 19:47:53 (Friday) To: u-boot@lists.denx.de Cc: Marc Zyngier marc.zyng...@arm.com Subject: [U-Boot] [PATCH 6/6] armv8: Allow SoCs to override the generic timer From: Thierry Reding tred...@nvidia.com Some SoCs come with a custom timer interface, so allow them to use that instead. Arch timer is always available when core running, It's better to use arch timer instead of other custom timer interface. Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Thierry Reding tred...@nvidia.com --- arch/arm/cpu/armv8/generic_timer.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c index 223b95e210ed..ab8573fc7cef 100644 --- a/arch/arm/cpu/armv8/generic_timer.c +++ b/arch/arm/cpu/armv8/generic_timer.c @@ -9,6 +9,7 @@ #include command.h #include asm/system.h +#ifndef CONFIG_SYS_TIMER_COUNTER /* * Generic timer implementation of get_tbclk() */ @@ -29,3 +30,4 @@ unsigned long timer_read_counter(void) asm volatile(mrs %0, cntpct_el0 : =r (cntpct)); return cntpct; } +#endif -- 2.3.2 Yours. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Vexpress64: Fix the compiling error when CONFIG_ARMV8_MULTIENTRY defined
-Original Messages- From: Linus Walleij linus.wall...@linaro.org Sent Time: 2015-03-10 18:08:03 (Tuesday) To: David Feng feng...@phytium.com.cn Cc: U-Boot Mailing List u-boot@lists.denx.de, Tom Rini tr...@ti.com, Albert ARIBAUD albert.u.b...@aribaud.net Subject: Re: [PATCH] Vexpress64: Fix the compiling error when CONFIG_ARMV8_MULTIENTRY defined On Tue, Mar 10, 2015 at 3:08 AM, feng...@phytium.com.cn wrote: From: David Feng feng...@phytium.com.cn CPU_RELEASE_ADDR should be defined when CONFIG_ARMV8_MULTIENTRY is used. Signed-off-by: David Feng feng...@phytium.com.cn As asked earlier: how can I test this with FVP or the base model? I usually use Foundation Model. I'm very interested in doing this as I guess it involves starting U-Boot at EL3 on bare metal and I really want to try this. +/* SMP Spin Table Definitions */ +#ifdef CONFIG_BASE_FVP +#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f0) +#else +#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) +#endif Where are these address defines coming from? It's just hard coded and should be the same value with that in DTS. Do these spin tables exist in a standard ARM FVP or base model? I get the impression that a secondary operating system is being booted on the secondary CPU at one of these addresses, but why is it running at these addresses specifically, and is that something coming with these simulators, or is it some image that is loaded on the side, that the community does not have access to? PSCI is not implemented in uboot-armv8. If booting u-boot on bare-metal only spin table can be used. All we do is describing booting method(spin table) and cpu release address in DTS. Linux kernel get cpu release address from DTS also. Yours, David. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Vexpress64: Fix the compiling error when CONFIG_ARMV8_MULTIENTRY defined
From: David Feng feng...@phytium.com.cn
CPU_RELEASE_ADDR should be defined when CONFIG_ARMV8_MULTIENTRY is used.
Signed-off-by: David Feng feng...@phytium.com.cn
---
board/armltd/vexpress64/vexpress64.c |8
include/configs/vexpress_aemv8a.h|9 +
2 files changed, 17 insertions(+)
diff --git a/board/armltd/vexpress64/vexpress64.c
b/board/armltd/vexpress64/vexpress64.c
index de62864..bb6b5f6 100644
--- a/board/armltd/vexpress64/vexpress64.c
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -22,6 +22,14 @@ int board_init(void)
int dram_init(void)
{
+#ifdef CONFIG_ARMV8_MULTIENTRY
+ /*
+* Clear spin table so that secondary processors
+* observe the correct value after waken up from wfe.
+*/
+ *(unsigned long *)CPU_RELEASE_ADDR = 0;
+#endif
+
gd-ram_size = PHYS_SDRAM_1_SIZE;
return 0;
}
diff --git a/include/configs/vexpress_aemv8a.h
b/include/configs/vexpress_aemv8a.h
index 810eef1..6fa651a 100644
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -54,6 +54,15 @@
/* Flat Device Tree Definitions */
#define CONFIG_OF_LIBFDT
+#ifdef CONFIG_ARMV8_MULTIENTRY
+/* SMP Spin Table Definitions */
+#ifdef CONFIG_BASE_FVP
+#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f0)
+#else
+#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
+#endif
+#endif
+
/* CS register bases for the original memory map. */
#define V2M_PA_CS0 0x
#define V2M_PA_CS1 0x1400
--
1.7.9.5
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[U-Boot] [PATCH] Armv8: Initializing CNTVOFF_EL2
From: David Feng feng...@phytium.com.cn Linux-arm64 require that CNTVOFF_EL2 should be programmed with a consistent value on all cpus. Initializing CNTVOFF_EL2 at state transition instead of start.S could prevent potential different value on cpus if ATF exist and u-boot runs at only one cpu. Signed-off-by: David Feng feng...@phytium.com.cn --- arch/arm/include/asm/macro.h |3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h index 1c8c425..39df86a 100644 --- a/arch/arm/include/asm/macro.h +++ b/arch/arm/include/asm/macro.h @@ -113,6 +113,9 @@ lr .reqx30 mov \xreg1, #0x33ff msr cptr_el2, \xreg1/* Disable coprocessor traps to EL2 */ + /* Initialize Generic Timers */ + msr cntvoff_el2, xzr + /* Initialize SCTLR_EL2 * * setting RES1 bits (29,28,23,22,18,16,11,5,4) to 1 -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARMv8: Bug fix of dcache_disable()
hi Mark, You did very detailed analysis of the cache beheaviour. Yes, this patch is not perfect. But it did fix the actually existed bug. I will try to describe it more clearly in the following. -Original Messages- From: Mark Rutland mark.rutl...@arm.com Sent Time: 2015-02-11 23:51:15 (Wednesday) To: FengHua feng...@phytium.com.cn Cc: u-boot@lists.denx.de u-boot@lists.denx.de, albert.u.boot albert.u.b...@aribaud.net Subject: Re: Re: [U-Boot] [PATCH] ARMv8: Bug fix of dcache_disable() On Wed, Feb 11, 2015 at 03:26:06AM +, FengHua wrote: hi Mark, Thank you review this patch. -Original Messages- From: Mark Rutland mark.rutl...@arm.com Sent Time: 2015-02-09 19:05:54 (Monday) To: feng...@phytium.com.cn feng...@phytium.com.cn Cc: u-boot@lists.denx.de u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH] ARMv8: Bug fix of dcache_disable() On Mon, Feb 09, 2015 at 08:51:59AM +, feng...@phytium.com.cn wrote: From: David Feng feng...@phytium.com.cn The cache disable operation shoud be performed after flush_dcache_all(). If cache disable operation is performed before flush_dcache_all(), flush_dcache_all() store data directly to memory and may be overrided by data copy in cache. The reasoning above (and hence this patch) is wrong. While the caches are on, they can allocate lines for any portion of the address space with cacheable attributes, and can acquire dirty cache lines from other CPUs. Additionally, there is no restriction preventing lines from migrating between levels of cache while they are active. So calling flush_dcache_all (which performs maintenance by Set/Way) while the caches are enabled is wrong. Per the architecture it provides no guarantee whatsoever. To empty the caches by Set/Way, they must first be disabled. Note that this only guarantees that the caches are empty; not where the data went. Other CPUs might acquire dirty lines, or the data might only reach a system cache rather than memory. If you need certain portions of data to be flushed out to memory, then those must be flushed by VA. If flush_dcache_all performs any memory accesses before it has completed Set/Way maintenance, it is buggy. Thanks, Mark. You are right. If data acess exist when flushing cache when cache is enabled, the data may be brought to cache again. In normal circumstance we can not do like this. But the problem is flush_dcahe_all is a C routine, it will preserve return address in stack. If disable cache first the return address will be directly store in memory, and if the stack has a copy in cache the data will be covered when flushing cache, then flush_dcache_all will get wrong return address. There should be no data access between disabling cache and flushing cache. U-boot for aarch64 runs at only one processor and the data flush_dcache_all manipulated will not be used by following routines. By simply adjusting the sequence can fix this bug although it's not the best solution. I don't follow: * The compiler may generate writes between flush_dcache_all and set_sctlr (even in the absence of any explicit writes in source code), so the cache might allocate dirty lines that could be written back asynchronously later (when the cache id sieabled), clobbering data we are using. Yes, the memory access between flush_dcache_all and set_sctlr is why we talk about this here. If no memory access between flush_dcache_all and set_sctlr, there will be no bug. This need the flush_dcache_all is implemented in assembly. * The cache can allocate clean lines at any point before it is disabled (even in the middle of flush_dcache_all), so the cache will almost certainly not be empty once disabled. It won't write back clean lines, but these could mask data later if not invalidated. * Set/Way operations aren't guaranteed to flush data to the PoC in the presence of a system cache like CCN, so we have no guarantee that we've pushed any data to the PoC. Per ARMv8 only maintenance by VA guarantees this (but luckily maintenance by VA is mandated to be respected by such system caches). flush_dcache_all should flush both cache existed in architecture defined cache hierachy and outer cache(such as L3 in CCN), a previous patch did this. * While the cache is enabled lines could theoretically migrate between set/way slots mid-sequence (e.g. with speculative accesses and an exclusive L1/L2 configuration). I don't believe this currently happens in practice, but the architecture does not prevent this. So I don't see that moving this maintenance solves any existing problem, and it introduces new ones. The bug actually exist when flush_dcache_all is after of set_sctlr. I try to describe it more detailed. flush_dcache_all is a C routine, it will preserve return address in stack
Re: [U-Boot] [PATCH] ARMv8: Bug fix of dcache_disable()
hi Mark, Thank you review this patch. -Original Messages- From: Mark Rutland mark.rutl...@arm.com Sent Time: 2015-02-09 19:05:54 (Monday) To: feng...@phytium.com.cn feng...@phytium.com.cn Cc: u-boot@lists.denx.de u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH] ARMv8: Bug fix of dcache_disable() On Mon, Feb 09, 2015 at 08:51:59AM +, feng...@phytium.com.cn wrote: From: David Feng feng...@phytium.com.cn The cache disable operation shoud be performed after flush_dcache_all(). If cache disable operation is performed before flush_dcache_all(), flush_dcache_all() store data directly to memory and may be overrided by data copy in cache. The reasoning above (and hence this patch) is wrong. While the caches are on, they can allocate lines for any portion of the address space with cacheable attributes, and can acquire dirty cache lines from other CPUs. Additionally, there is no restriction preventing lines from migrating between levels of cache while they are active. So calling flush_dcache_all (which performs maintenance by Set/Way) while the caches are enabled is wrong. Per the architecture it provides no guarantee whatsoever. To empty the caches by Set/Way, they must first be disabled. Note that this only guarantees that the caches are empty; not where the data went. Other CPUs might acquire dirty lines, or the data might only reach a system cache rather than memory. If you need certain portions of data to be flushed out to memory, then those must be flushed by VA. If flush_dcache_all performs any memory accesses before it has completed Set/Way maintenance, it is buggy. Thanks, Mark. You are right. If data acess exist when flushing cache when cache is enabled, the data may be brought to cache again. In normal circumstance we can not do like this. But the problem is flush_dcahe_all is a C routine, it will preserve return address in stack. If disable cache first the return address will be directly store in memory, and if the stack has a copy in cache the data will be covered when flushing cache, then flush_dcache_all will get wrong return address. There should be no data access between disabling cache and flushing cache. U-boot for aarch64 runs at only one processor and the data flush_dcache_all manipulated will not be used by following routines. By simply adjusting the sequence can fix this bug although it's not the best solution. Yours, David. Signed-off-by: David Feng feng...@phytium.com.cn --- arch/arm/cpu/armv8/cache_v8.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 9dbcdf2..dc2fc8c 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -124,9 +124,10 @@ void dcache_disable(void) if (!(sctlr CR_C)) return; + flush_dcache_all(); + set_sctlr(sctlr ~(CR_C|CR_M)); - flush_dcache_all(); __asm_invalidate_tlb_all(); } -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] ARMv8: Bug fix of dcache_disable()
From: David Feng feng...@phytium.com.cn The cache disable operation shoud be performed after flush_dcache_all(). If cache disable operation is performed before flush_dcache_all(), flush_dcache_all() store data directly to memory and may be overrided by data copy in cache. Signed-off-by: David Feng feng...@phytium.com.cn --- arch/arm/cpu/armv8/cache_v8.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index 9dbcdf2..dc2fc8c 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -124,9 +124,10 @@ void dcache_disable(void) if (!(sctlr CR_C)) return; + flush_dcache_all(); + set_sctlr(sctlr ~(CR_C|CR_M)); - flush_dcache_all(); __asm_invalidate_tlb_all(); } -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] armv8/vexpress64: make multientry conditional
hi Linus, The following is some advice about the multi entry patch. While the Freescale ARMv8 board LS2085A will enter U-Boot both on a master and a secondary (slave) CPU, this is not the common behaviour on ARMv8 platforms. The norm is that U-Boot is entered from the master CPU only, while the other CPUs are kept in WFI (wait for interrupt) state. The code determining which CPU we are running on is using the MPIDR register, but the definition of that register varies with platform to some extent, and handling multi-cluster platforms (such as the Juno) will become cumbersome. It is better to only enable the multiple entry code on machines that actually need it and disable it by default. Make the single entry default and add a special ARMV8_MULTIENTRY KConfig option to be used by the platforms that need multientry and set it for the LS2085A. Delete all use of the CPU_RELEASE_ADDR from the Vexpress64 boards as it is just totally unused and misleading, and make it conditional in the generic start.S code. This makes the Juno platform start U-Boot properly. Signed-off-by: Linus Walleij linus.wall...@linaro.org --- ChangeLog v1-v2: - Move configuration of ARMV8_MULTIENTRY over to Kconfig as requested by Tom Rini. This patch applied on top of the other patch series send, ending with [PATCH 4/4] vexpress64: support the Juno Development Platform Please apply it on top of these if the patch seems OK. --- arch/arm/Kconfig | 4 arch/arm/cpu/armv8/Kconfig | 6 ++ arch/arm/cpu/armv8/start.S | 8 arch/arm/include/asm/macro.h | 8 board/armltd/vexpress64/vexpress64.c | 6 -- include/configs/vexpress_aemv8a.h| 8 6 files changed, 22 insertions(+), 18 deletions(-) create mode 100644 arch/arm/cpu/armv8/Kconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 986b4c5d81db..75dd9bb60d6b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -743,10 +743,12 @@ config TARGET_VEXPRESS64_JUNO config TARGET_LS2085A_EMU bool Support ls2085a_emu select ARM64 + select ARMV8_MULTIENTRY config TARGET_LS2085A_SIMU bool Support ls2085a_simu select ARM64 + select ARMV8_MULTIENTRY VEXPRESS_AEMV8A and VEXPRESS_AEMV8A_SEMI are defaultly single entry? That means we always has ATF exist. config TARGET_LS1021AQDS bool Support ls1021aqds @@ -855,6 +857,8 @@ source arch/arm/cpu/armv7/zynq/Kconfig source arch/arm/cpu/armv7/Kconfig +source arch/arm/cpu/armv8/Kconfig + source board/aristainetos/Kconfig source board/BuR/kwb/Kconfig source board/BuR/tseries/Kconfig diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig new file mode 100644 index ..4cd84b031114 --- /dev/null +++ b/arch/arm/cpu/armv8/Kconfig @@ -0,0 +1,6 @@ +if ARM64 + +config ARMV8_MULTIENTRY +boolean Enable multiple CPUs to enter into U-boot + +endif diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 4b11aa4f2227..9b439f30b779 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -77,6 +77,7 @@ reset: /* Processor specific initialization */ bl lowlevel_init +#ifdef CONFIG_ARMV8_MULTIENTRY branch_if_master x0, x1, master_cpu /* @@ -88,11 +89,10 @@ slave_cpu: ldr x0, [x1] cbz x0, slave_cpu br x0 /* branch to the given address */ - - /* - * Master CPU - */ master_cpu: + /* On the master CPU */ +#endif /* CONFIG_ARMV8_MULTIENTRY */ + bl _main How about put the slave part of lowlevel_init in CONFIG_ARMV8_MULTIENTRY? although it still works with modified branch_if_master macro. /*---*/ diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h index 1c8c4251ee0c..3b3146ab2239 100644 --- a/arch/arm/include/asm/macro.h +++ b/arch/arm/include/asm/macro.h @@ -78,6 +78,8 @@ lr .reqx30 * choose processor with all zero affinity value as the master. */ .macro branch_if_slave, xreg, slave_label +#ifdef CONFIG_ARMV8_MULTIENTRY + /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */ mrs \xreg, mpidr_el1 tst \xreg, #0xff/* Test Affinity 0 */ b.ne\slave_label @@ -90,6 +92,7 @@ lr .reqx30 lsr \xreg, \xreg, #16 tst \xreg, #0xff/* Test Affinity 3 */ b.ne\slave_label +#endif .endm /* @@ -97,12 +100,17 @@ lr .reqx30 * choose processor with all zero affinity value as the master. */ .macro branch_if_master, xreg1, xreg2, master_label +#ifdef CONFIG_ARMV8_MULTIENTRY + /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */ mrs \xreg1, mpidr_el1
[U-Boot] [RFC PATCH] ARMv8: replace CONFIG_ARM64 with builtin __aarch64__
From: David Feng feng...@phytium.com.cn
This patch replace CONFIG_ARM64 with gcc builtin __aarch64__.
CONFIG_ARM64 is still needed in makefile and config.mk.
Maybe them could be replace with something like *_V8 later.
Signed-off-by: David Feng feng...@phytium.com.cn
---
arch/arm/include/asm/cache.h|2 +-
arch/arm/include/asm/config.h |2 +-
arch/arm/include/asm/global_data.h |4 ++--
arch/arm/include/asm/macro.h|4 ++--
arch/arm/include/asm/proc-armv/ptrace.h |6 +++---
arch/arm/include/asm/proc-armv/system.h |8
arch/arm/include/asm/system.h |6 +++---
arch/arm/include/asm/types.h|6 +++---
arch/arm/include/asm/u-boot-arm.h |2 +-
arch/arm/include/asm/u-boot.h |2 +-
arch/arm/lib/board.c|6 +++---
arch/arm/lib/bootm.c|4 ++--
arch/arm/lib/semihosting.c |2 +-
common/board_f.c|2 +-
common/board_r.c|2 +-
doc/README.arm64|4 ++--
drivers/net/smc9.h |4 ++--
examples/standalone/stubs.c |2 +-
18 files changed, 34 insertions(+), 34 deletions(-)
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index 5a4ac2f..3b891bf 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -11,7 +11,7 @@
#include asm/system.h
-#ifndef CONFIG_ARM64
+#ifndef __aarch64__
/*
* Invalidate L2 Cache using co-proc instruction
diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h
index 7a34a01..319451d 100644
--- a/arch/arm/include/asm/config.h
+++ b/arch/arm/include/asm/config.h
@@ -10,7 +10,7 @@
#define CONFIG_LMB
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
-#ifdef CONFIG_ARM64
+#ifdef __aarch64__
#define CONFIG_PHYS_64BIT
#define CONFIG_STATIC_RELA
#endif
diff --git a/arch/arm/include/asm/global_data.h
b/arch/arm/include/asm/global_data.h
index 438f128..3f12e36 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -61,7 +61,7 @@ static inline gd_t *get_gd(void)
{
gd_t *gd_ptr;
-#ifdef CONFIG_ARM64
+#ifdef __aarch64__
/*
* Make will already error that reserving x18 is not supported at the
* time of writing, clang: error: unknown argument: '-ffixed-x18'
@@ -76,7 +76,7 @@ static inline gd_t *get_gd(void)
#else
-#ifdef CONFIG_ARM64
+#ifdef __aarch64__
#define DECLARE_GLOBAL_DATA_PTRregister volatile gd_t *gd asm
(x18)
#else
#define DECLARE_GLOBAL_DATA_PTRregister volatile gd_t *gd asm
(r9)
diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h
index 1c8c425..781497d 100644
--- a/arch/arm/include/asm/macro.h
+++ b/arch/arm/include/asm/macro.h
@@ -54,7 +54,7 @@
bcs 1b
.endm
-#ifdef CONFIG_ARM64
+#ifdef __aarch64__
/*
* Register aliases.
*/
@@ -198,7 +198,7 @@ lr .reqx30
.endm
#endif
-#endif /* CONFIG_ARM64 */
+#endif /* __aarch64__ */
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARM_MACRO_H__ */
diff --git a/arch/arm/include/asm/proc-armv/ptrace.h
b/arch/arm/include/asm/proc-armv/ptrace.h
index 71df5a9..dd58324 100644
--- a/arch/arm/include/asm/proc-armv/ptrace.h
+++ b/arch/arm/include/asm/proc-armv/ptrace.h
@@ -10,7 +10,7 @@
#ifndef __ASM_PROC_PTRACE_H
#define __ASM_PROC_PTRACE_H
-#ifdef CONFIG_ARM64
+#ifdef __aarch64__
#define PCMASK 0
@@ -27,7 +27,7 @@ struct pt_regs {
#endif /* __ASSEMBLY__ */
-#else /* CONFIG_ARM64 */
+#else /* __aarch64__ */
#define USR26_MODE 0x00
#define FIQ26_MODE 0x01
@@ -125,6 +125,6 @@ static inline int valid_user_regs(struct pt_regs *regs)
#endif /* __ASSEMBLY__ */
-#endif /* CONFIG_ARM64 */
+#endif /* __aarch64__ */
#endif
diff --git a/arch/arm/include/asm/proc-armv/system.h
b/arch/arm/include/asm/proc-armv/system.h
index c61374e..79231b1 100644
--- a/arch/arm/include/asm/proc-armv/system.h
+++ b/arch/arm/include/asm/proc-armv/system.h
@@ -13,7 +13,7 @@
/*
* Save the current interrupt enable state disable IRQs
*/
-#ifdef CONFIG_ARM64
+#ifdef __aarch64__
/*
* Save the current interrupt enable state
@@ -65,7 +65,7 @@
: memory);\
})
-#else /* CONFIG_ARM64 */
+#else /* __aarch64__ */
#define local_irq_save(x) \
({ \
@@ -161,10 +161,10 @@
: r (x) \
: memory)
-#endif /* CONFIG_ARM64 */
+#endif /* __aarch64__ */
#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) || \
- defined(CONFIG_ARM64)
+ defined(__aarch64__)
/*
* On the StrongARM, swp is terminally broken since it bypasses the
* cache totally. This means that the cache becomes inconsistent, and,
[U-Boot] [RFC PATCH] ARMv8: add Kconfig and CPU_V8 option
From: David Feng feng...@phytium.com.cn This patch add Kconfig to armv8. Signed-off-by: David Feng feng...@phytium.com.cn --- arch/arm/Kconfig | 16 +++- arch/arm/cpu/armv8/Kconfig | 10 ++ 2 files changed, 21 insertions(+), 5 deletions(-) create mode 100644 arch/arm/cpu/armv8/Kconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 986b4c5..a01cb3c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -33,6 +33,10 @@ config CPU_V7 bool select HAS_VBAR +config CPU_V8 +bool +select ARM64 + config CPU_PXA bool @@ -729,24 +733,24 @@ config TEGRA config TARGET_VEXPRESS64_AEMV8A bool Support vexpress_aemv8a - select ARM64 + select CPU_V8 config TARGET_VEXPRESS64_BASE_FVP bool Support Versatile Express ARMv8a FVP BASE model - select ARM64 + select CPU_V8 select SEMIHOSTING config TARGET_VEXPRESS64_JUNO bool Support Versatile Express Juno Development Platform - select ARM64 + select CPU_V8 config TARGET_LS2085A_EMU bool Support ls2085a_emu - select ARM64 + select CPU_V8 config TARGET_LS2085A_SIMU bool Support ls2085a_simu - select ARM64 + select CPU_V8 config TARGET_LS1021AQDS bool Support ls1021aqds @@ -855,6 +859,8 @@ source arch/arm/cpu/armv7/zynq/Kconfig source arch/arm/cpu/armv7/Kconfig +source arch/arm/cpu/armv8/Kconfig + source board/aristainetos/Kconfig source board/BuR/kwb/Kconfig source board/BuR/tseries/Kconfig diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig new file mode 100644 index 000..5953848 --- /dev/null +++ b/arch/arm/cpu/armv8/Kconfig @@ -0,0 +1,10 @@ +if CPU_V8 + +menu ARMv8 + +config ARMV8_SWITCH_TO_EL1 + boolean Switch to exception level 1 when loading OS + +endmenu + +endif -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] PCI: add 64-bit prefetchable memory support
From: David Feng feng...@phytium.com.cn
PCI specification allow prefetchable memory to be 32-bit or 64-bit.
PCI express specification states that all memmory bars for prefetchable
memory must be implemented as 64-bit. They all require that 64 bit
prefetchble memory are suported especially when u-boot is ported to
more and more 64bit processors.
Changes for v2:
- According to Bin Meng's advice, the macro PCI_PREF_RANGE_TYPE_MASK and
PCI_PREF_RANGE_TYPE_64 are used.
Signed-off-by: David Feng feng...@phytium.com.cn
---
drivers/pci/pci_auto.c | 36 +++-
1 file changed, 35 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index ed92857..378efbf 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -223,9 +223,12 @@ void pciauto_prescan_setup_bridge(struct pci_controller
*hose,
struct pci_region *pci_mem = hose-pci_mem;
struct pci_region *pci_prefetch = hose-pci_prefetch;
struct pci_region *pci_io = hose-pci_io;
- u16 cmdstat;
+ u16 cmdstat, prefechable_64;
pci_hose_read_config_word(hose, dev, PCI_COMMAND, cmdstat);
+ pci_hose_read_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
+ prefechable_64);
+ prefechable_64 = PCI_PREF_RANGE_TYPE_MASK;
/* Configure bus number registers */
pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS,
@@ -252,12 +255,26 @@ void pciauto_prescan_setup_bridge(struct pci_controller
*hose,
/* Set up memory and I/O filter limits, assume 32-bit I/O space
*/
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
(pci_prefetch-bus_lower 0xfff0)
16);
+ if (prefechable_64 == PCI_PREF_RANGE_TYPE_64)
+#ifdef CONFIG_SYS_PCI_64BIT
+ pci_hose_write_config_dword(hose, dev,
+ PCI_PREF_BASE_UPPER32,
+ pci_prefetch-bus_lower 32);
+#else
+ pci_hose_write_config_dword(hose, dev,
+ PCI_PREF_BASE_UPPER32,
+ 0x0);
+#endif
cmdstat |= PCI_COMMAND_MEMORY;
} else {
/* We don't support prefetchable memory for now, so disable */
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
0x1000);
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT,
0x0);
+ if (prefechable_64 == PCI_PREF_RANGE_TYPE_64) {
+ pci_hose_write_config_word(hose, dev,
PCI_PREF_BASE_UPPER32, 0x0);
+ pci_hose_write_config_word(hose, dev,
PCI_PREF_LIMIT_UPPER32, 0x0);
+ }
}
if (pci_io) {
@@ -297,11 +314,28 @@ void pciauto_postscan_setup_bridge(struct pci_controller
*hose,
}
if (pci_prefetch) {
+ u16 prefechable_64;
+
+ pci_hose_read_config_word(hose, dev,
+ PCI_PREF_MEMORY_LIMIT,
+ prefechable_64);
+ prefechable_64 = PCI_PREF_RANGE_TYPE_MASK;
+
/* Round memory allocator to 1MB boundary */
pciauto_region_align(pci_prefetch, 0x10);
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT,
(pci_prefetch-bus_lower - 1) 16);
+ if (prefechable_64 == PCI_PREF_RANGE_TYPE_64)
+#ifdef CONFIG_SYS_PCI_64BIT
+ pci_hose_write_config_dword(hose, dev,
+ PCI_PREF_LIMIT_UPPER32,
+ (pci_prefetch-bus_lower - 1) 32);
+#else
+ pci_hose_write_config_dword(hose, dev,
+ PCI_PREF_LIMIT_UPPER32,
+ 0x0);
+#endif
}
if (pci_io) {
--
1.7.9.5
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Re: [U-Boot] [PATCH v2] armv8/vexpress64: make multientry conditional
hi Linus: While the Freescale ARMv8 board LS2085A will enter U-Boot both on a master and a secondary (slave) CPU, this is not the common behaviour on ARMv8 platforms. The norm is that U-Boot is entered from the master CPU only, while the other CPUs are kept in WFI (wait for interrupt) state. According to fsl-lsch3 source code, Freescale LS2085A master cpu enter u-boot first, then it kick slaves up. That's right? There's ATF in Juno, so all slaves are held up. The code determining which CPU we are running on is using the MPIDR register, but the definition of that register varies with platform to some extent, and handling multi-cluster platforms (such as the Juno) will become cumbersome. It is better to only enable the multiple entry code on machines that actually need it and disable it by default. Make the single entry default and add a special ARMV8_MULTIENTRY KConfig option to be used by the platforms that need multientry and set it for the LS2085A. Delete all use of the CPU_RELEASE_ADDR from the Vexpress64 boards as it is just totally unused and misleading, and make it conditional in the generic start.S code. It's better to retain CPU_RELEASE_ADDR usage with CONFIG_ARMV8_MULTIENTRY. It still useful when ATF or other PSCI service do not exist. This makes the Juno platform start U-Boot properly. Signed-off-by: Linus Walleij linus.wall...@linaro.org --- ChangeLog v1-v2: - Move configuration of ARMV8_MULTIENTRY over to Kconfig as requested by Tom Rini. This patch applied on top of the other patch series send, ending with [PATCH 4/4] vexpress64: support the Juno Development Platform Please apply it on top of these if the patch seems OK. --- arch/arm/Kconfig | 4 arch/arm/cpu/armv8/Kconfig | 6 ++ arch/arm/cpu/armv8/start.S | 8 arch/arm/include/asm/macro.h | 8 board/armltd/vexpress64/vexpress64.c | 6 -- include/configs/vexpress_aemv8a.h| 8 6 files changed, 22 insertions(+), 18 deletions(-) create mode 100644 arch/arm/cpu/armv8/Kconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 986b4c5d81db..75dd9bb60d6b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -743,10 +743,12 @@ config TARGET_VEXPRESS64_JUNO config TARGET_LS2085A_EMU bool Support ls2085a_emu select ARM64 + select ARMV8_MULTIENTRY config TARGET_LS2085A_SIMU bool Support ls2085a_simu select ARM64 + select ARMV8_MULTIENTRY config TARGET_LS1021AQDS bool Support ls1021aqds @@ -855,6 +857,8 @@ source arch/arm/cpu/armv7/zynq/Kconfig source arch/arm/cpu/armv7/Kconfig +source arch/arm/cpu/armv8/Kconfig + source board/aristainetos/Kconfig source board/BuR/kwb/Kconfig source board/BuR/tseries/Kconfig diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig new file mode 100644 index ..4cd84b031114 --- /dev/null +++ b/arch/arm/cpu/armv8/Kconfig @@ -0,0 +1,6 @@ +if ARM64 + +config ARMV8_MULTIENTRY +boolean Enable multiple CPUs to enter into U-boot + +endif diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 4b11aa4f2227..9b439f30b779 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -77,6 +77,7 @@ reset: /* Processor specific initialization */ bl lowlevel_init +#ifdef CONFIG_ARMV8_MULTIENTRY branch_if_master x0, x1, master_cpu /* @@ -88,11 +89,10 @@ slave_cpu: ldr x0, [x1] cbz x0, slave_cpu br x0 /* branch to the given address */ - - /* - * Master CPU - */ master_cpu: + /* On the master CPU */ +#endif /* CONFIG_ARMV8_MULTIENTRY */ + bl _main /*---*/ diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h index 1c8c4251ee0c..3b3146ab2239 100644 --- a/arch/arm/include/asm/macro.h +++ b/arch/arm/include/asm/macro.h @@ -78,6 +78,8 @@ lr .reqx30 * choose processor with all zero affinity value as the master. */ .macro branch_if_slave, xreg, slave_label +#ifdef CONFIG_ARMV8_MULTIENTRY + /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */ mrs \xreg, mpidr_el1 tst \xreg, #0xff/* Test Affinity 0 */ b.ne\slave_label @@ -90,6 +92,7 @@ lr .reqx30 lsr \xreg, \xreg, #16 tst \xreg, #0xff/* Test Affinity 3 */ b.ne\slave_label +#endif .endm /* @@ -97,12 +100,17 @@ lr .reqx30 * choose processor with all zero affinity value as the master. */ .macro branch_if_master, xreg1, xreg2, master_label +#ifdef CONFIG_ARMV8_MULTIENTRY + /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */ mrs \xreg1, mpidr_el1
[U-Boot] [RFC PATCH] ARM: Merge v7 and v8 outer cache operations
From: David Feng feng...@phytium.com.cn
Armv7 and Armv8 allow outer cache exist, it is outside of the architecture
defined cache hierarchy and can not be manipulated by architecture defined
instructions. It's processor specific.
This patch merge v7_outer_cache_* and v8 l3_cache_*.
Signed-off-by: David Feng feng...@phytium.com.cn
---
arch/arm/cpu/armv7/cache_v7.c| 22 +++---
arch/arm/cpu/armv7/cpu.c |2 +-
arch/arm/cpu/armv7/exynos/soc.c |2 +-
arch/arm/cpu/armv7/mx6/soc.c |4 ++--
arch/arm/cpu/armv7/omap3/board.c |2 +-
arch/arm/cpu/armv7/omap4/hwinit.c|4 ++--
arch/arm/cpu/armv7/s5pc1xx/cache.c |4 ++--
arch/arm/cpu/armv7/uniphier/cache_uniphier.c | 14 +++---
arch/arm/cpu/armv8/cache_v8.c| 21 -
arch/arm/cpu/armv8/fsl-lsch3/cpu.c |2 +-
arch/arm/include/asm/armv7.h |7 ---
arch/arm/include/asm/cache.h |7 +++
arch/arm/include/asm/system.h|2 --
arch/arm/lib/cache-pl310.c | 12 ++--
14 files changed, 57 insertions(+), 48 deletions(-)
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index 0f9d837..7d4d5d3 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -237,7 +237,7 @@ void invalidate_dcache_all(void)
{
v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL);
- v7_outer_cache_inval_all();
+ outer_cache_inval_all();
}
/*
@@ -248,7 +248,7 @@ void flush_dcache_all(void)
{
v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL);
- v7_outer_cache_flush_all();
+ outer_cache_flush_all();
}
/*
@@ -259,7 +259,7 @@ void invalidate_dcache_range(unsigned long start, unsigned
long stop)
{
v7_dcache_maint_range(start, stop, ARMV7_DCACHE_INVAL_RANGE);
- v7_outer_cache_inval_range(start, stop);
+ outer_cache_inval_range(start, stop);
}
/*
@@ -271,12 +271,12 @@ void flush_dcache_range(unsigned long start, unsigned
long stop)
{
v7_dcache_maint_range(start, stop, ARMV7_DCACHE_CLEAN_INVAL_RANGE);
- v7_outer_cache_flush_range(start, stop);
+ outer_cache_flush_range(start, stop);
}
void arm_init_before_mmu(void)
{
- v7_outer_cache_enable();
+ outer_cache_enable();
invalidate_dcache_all();
v7_inval_tlb();
}
@@ -355,9 +355,9 @@ void invalidate_icache_all(void)
#endif
/* Stub implementations for outer cache operations */
-__weak void v7_outer_cache_enable(void) {}
-__weak void v7_outer_cache_disable(void) {}
-__weak void v7_outer_cache_flush_all(void) {}
-__weak void v7_outer_cache_inval_all(void) {}
-__weak void v7_outer_cache_flush_range(u32 start, u32 end) {}
-__weak void v7_outer_cache_inval_range(u32 start, u32 end) {}
+__weak void outer_cache_enable(void) {}
+__weak void outer_cache_disable(void) {}
+__weak void outer_cache_flush_all(void) {}
+__weak void outer_cache_inval_all(void) {}
+__weak void outer_cache_flush_range(unsigned long start, unsigned long end) {}
+__weak void outer_cache_inval_range(unsigned long start, unsigned long end) {}
diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index 01cdb7e..07ad549 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -47,7 +47,7 @@ int cleanup_before_linux(void)
* dcache_disable() in turn flushes the d-cache and disables MMU
*/
dcache_disable();
- v7_outer_cache_disable();
+ outer_cache_disable();
/*
* After D-cache is flushed and before it is disabled there may
diff --git a/arch/arm/cpu/armv7/exynos/soc.c b/arch/arm/cpu/armv7/exynos/soc.c
index 8c7d7d8..3813c6c 100644
--- a/arch/arm/cpu/armv7/exynos/soc.c
+++ b/arch/arm/cpu/armv7/exynos/soc.c
@@ -50,7 +50,7 @@ static void exynos5_set_l2cache_params(void)
/*
* Sets L2 cache related parameters before enabling data cache
*/
-void v7_outer_cache_enable(void)
+void outer_cache_enable(void)
{
if (cpu_is_exynos5())
exynos5_set_l2cache_params();
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 5f5f497..e3f0fdd 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -472,7 +472,7 @@ void imx_setup_hdmi(void)
#ifndef CONFIG_SYS_L2CACHE_OFF
#define IOMUXC_GPR11_L2CACHE_AS_OCRAM 0x0002
-void v7_outer_cache_enable(void)
+void outer_cache_enable(void)
{
struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE;
unsigned int val;
@@ -521,7 +521,7 @@ void v7_outer_cache_enable(void)
setbits_le32(pl310-pl310_ctrl, L2X0_CTRL_EN);
}
-void v7_outer_cache_disable(void)
+void outer_cache_disable(void)
{
struct pl310_regs *const pl310 = (struct pl310_regs *)L2_PL310_BASE;
diff --git a/arch/arm/cpu/armv7/omap3/board.c
[U-Boot] [PATCH 2/2] ARMv8: enable DM in vexpress64 board
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
board/armltd/vexpress64/vexpress64.c | 13 +
include/configs/vexpress_aemv8a.h| 14 --
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/board/armltd/vexpress64/vexpress64.c
b/board/armltd/vexpress64/vexpress64.c
index 5897318..4171c6e 100644
--- a/board/armltd/vexpress64/vexpress64.c
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -12,9 +12,22 @@
#include asm/io.h
#include linux/compiler.h
#include asm/semihosting.h
+#include dm/platdata.h
+#include dm/platform_data/serial_pl01x.h
DECLARE_GLOBAL_DATA_PTR;
+static const struct pl01x_serial_platdata serial_platdata = {
+ .base = V2M_UART0,
+ .type = TYPE_PL011,
+ .clock = 2400 * 1000,
+};
+
+U_BOOT_DEVICE(vexpress_serials) = {
+ .name = serial_pl01x,
+ .platdata = serial_platdata,
+};
+
int board_init(void)
{
return 0;
diff --git a/include/configs/vexpress_aemv8a.h
b/include/configs/vexpress_aemv8a.h
index 027d78b..9b31c2d 100644
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -8,6 +8,8 @@
#ifndef __VEXPRESS_AEMV8A_H
#define __VEXPRESS_AEMV8A_H
+#define CONFIG_DM
+
/* We use generic board for v8 Versatile Express */
#define CONFIG_SYS_GENERIC_BOARD
@@ -52,7 +54,6 @@
/* Flat Device Tree Definitions */
#define CONFIG_OF_LIBFDT
-
/* SMP Spin Table Definitions */
#ifdef CONFIG_BASE_FVP
#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f0)
@@ -132,6 +133,7 @@
#define CONFIG_SYS_MEMTEST_END (V2M_BASE + 0x8000)
/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_F_LEN0x2000
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 20))
/* SMSC91C111 Ethernet Configuration */
@@ -139,11 +141,19 @@
#define CONFIG_SMC9_BASE (0x01A00)
/* PL011 Serial Configuration */
+#define CONFIG_BAUDRATE115200
+#ifdef CONFIG_DM
+#define CONFIG_DM_SERIAL
+#define CONFIG_PL01X_SERIAL
+#else
+#define CONFIG_SYS_SERIAL0 V2M_UART0
+#define CONFIG_SYS_SERIAL1 V2M_UART1
+#define CONFIG_CONS_INDEX 0
#define CONFIG_PL011_SERIAL
#define CONFIG_PL011_CLOCK 2400
#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
(void *)CONFIG_SYS_SERIAL1}
-#define CONFIG_CONS_INDEX 0
+#endif
#define CONFIG_BAUDRATE115200
#define CONFIG_SYS_SERIAL0 V2M_UART0
--
1.7.9.5
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[U-Boot] [PATCH] ARMv8: bug fix of mmu setup and code optimization
From: David Feng feng...@phytium.com.cn
1. Fix a bug of mmu_setup that variable i and j should be
type long instead of int.
2. Give mmu_setup weak attribute so that other implementation
can redfine it.
3. A more common set_pgtable_section().
4. Give device memory PXN and UXN attribute. CPU may speculatively
prefetch instructions from device memory, but the IO subsystem of
some implementation may not support this operation. The two
attributes prevent this behavior.
Signed-off-by: David Feng feng...@phytium.com.cn
---
arch/arm/cpu/armv8/cache_v8.c | 73 +++-
arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 22 +--
arch/arm/include/asm/armv8/mmu.h | 71 +++
3 files changed, 95 insertions(+), 71 deletions(-)
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index e4415e8..023dd23 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -22,55 +22,74 @@ __weak void outer_cache_flush_range(unsigned long start,
unsigned long end) {}
__weak void outer_cache_inval_range(unsigned long start, unsigned long end) {}
#ifndef CONFIG_SYS_DCACHE_OFF
-void set_pgtable_section(u64 *page_table, u64 index, u64 section,
-u64 memory_type)
-{
- u64 value;
- value = section | PMD_TYPE_SECT | PMD_SECT_AF;
- value |= PMD_ATTRINDX(memory_type);
- page_table[index] = value;
+/* 42 bits virtual address */
+#define VA_BITS(42)
+
+/* 42 bits physical address */
+#define TCR_EL1_IPS_BITS TCR_EL1_IPS_BITS_42
+#define TCR_EL2_IPS_BITS TCR_EL2_IPS_BITS_42
+#define TCR_EL3_IPS_BITS TCR_EL3_IPS_BITS_42
+
+/* PTWs cacheable, inner/outer WBWA and inner-shareable */
+#define TCR_FLAGS (TCR_TG0_64K | \
+ TCR_SHARED_INNER | \
+ TCR_ORGN_WBWA | \
+ TCR_IRGN_WBWA | \
+ TCR_T0SZ(VA_BITS))
+
+void set_pgtable_section(u64 *page_table, u64 index, u64 output_address,
+u64 memory_type, u64 extra_flags)
+{
+ page_table[index] = output_address | PMD_TYPE_SECT | PMD_SECT_AF |
+ PMD_SECT_SHARED_INNER | PMD_ATTRINDX(memory_type) |
+ extra_flags;
}
/* to activate the MMU we need to set up virtual memory */
-static void mmu_setup(void)
+void __weak mmu_setup(void)
{
- int i, j, el;
+ int el;
+ u64 i, j, tcr;
bd_t *bd = gd-bd;
u64 *page_table = (u64 *)gd-arch.tlb_addr;
/* Setup an identity-mapping for all spaces */
for (i = 0; i (PGTABLE_SIZE 3); i++) {
set_pgtable_section(page_table, i, i SECTION_SHIFT,
- MT_DEVICE_NGNRNE);
+ MT_DEVICE_NGNRNE,
+ PMD_SECT_PXN | PMD_SECT_UXN);
+
}
- /* Setup an identity-mapping for all RAM space */
+ /*
+* Setup an identity-mapping for all RAM space.
+* The secure or non-secure memory access make sense
+* when u-boot running at el3 and is mostly implementation
+* specific.
+*/
for (i = 0; i CONFIG_NR_DRAM_BANKS; i++) {
- ulong start = bd-bi_dram[i].start;
- ulong end = bd-bi_dram[i].start + bd-bi_dram[i].size;
+ u64 start = bd-bi_dram[i].start;
+ u64 end = bd-bi_dram[i].start + bd-bi_dram[i].size;
for (j = start SECTION_SHIFT;
j end SECTION_SHIFT; j++) {
set_pgtable_section(page_table, j, j SECTION_SHIFT,
- MT_NORMAL);
+ MT_NORMAL, PMD_SECT_NS);
}
}
/* load TTBR0 */
+ tcr = TCR_FLAGS;
el = current_el();
- if (el == 1) {
- set_ttbr_tcr_mair(el, gd-arch.tlb_addr,
- TCR_FLAGS | TCR_EL1_IPS_BITS,
- MEMORY_ATTRIBUTES);
- } else if (el == 2) {
- set_ttbr_tcr_mair(el, gd-arch.tlb_addr,
- TCR_FLAGS | TCR_EL2_IPS_BITS,
- MEMORY_ATTRIBUTES);
- } else {
- set_ttbr_tcr_mair(el, gd-arch.tlb_addr,
- TCR_FLAGS | TCR_EL3_IPS_BITS,
- MEMORY_ATTRIBUTES);
- }
+ if (el == 1)
+ tcr |= TCR_EL1_IPS_BITS;
+ else if (el == 2)
+ tcr |= TCR_EL2_IPS_BITS;
+ else
+ tcr |= TCR_EL3_IPS_BITS;
+
+ set_ttbr_tcr_mair(el, gd-arch.tlb_addr, tcr, MEMORY_ATTRIBUTES);
+
/* enable the mmu */
set_sctlr(get_sctlr() | CR_M);
}
diff --git
[U-Boot] [PATCH 0/2] ARMv8: driver model enable
From: David Feng feng...@phytium.com.cn Currently serial_pl01x.c driver contain DM and non-DM mode, but it will access static varible in non-DM mode. So, u-boot using non-DM pl01x driver can not be placed in flash. This patch set enable pre-allocation malloc that is required by DM and enable DM in vexpress64 board. David Feng (2): ARMv8: enable pre-allocation malloc ARMv8: enable DM in vexpress64 board arch/arm/include/asm/config.h|4 arch/arm/lib/crt0_64.S | 13 +++-- board/armltd/vexpress64/vexpress64.c | 13 + include/configs/vexpress_aemv8a.h| 14 -- 4 files changed, 36 insertions(+), 8 deletions(-) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] ARMv8: enable pre-allocation malloc
From: David Feng feng...@phytium.com.cn Allocate memory space for pre-allocation malloc and zero global data. This code is partly from crt0.S. Signed-off-by: David Feng feng...@phytium.com.cn --- arch/arm/include/asm/config.h |4 arch/arm/lib/crt0_64.S| 13 +++-- 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h index be80434..7a34a01 100644 --- a/arch/arm/include/asm/config.h +++ b/arch/arm/include/asm/config.h @@ -7,10 +7,6 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ -#ifdef __aarch64__ -#define CONFIG_SYS_GENERIC_GLOBAL_DATA -#endif - #define CONFIG_LMB #define CONFIG_SYS_BOOT_RAMDISK_HIGH diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S index 7756396..1654011 100644 --- a/arch/arm/lib/crt0_64.S +++ b/arch/arm/lib/crt0_64.S @@ -62,9 +62,18 @@ ENTRY(_main) * Set up initial C runtime environment and call board_init_f(0). */ ldr x0, =(CONFIG_SYS_INIT_SP_ADDR) - sub x0, x0, #GD_SIZE/* allocate one GD above SP */ + sub x18, x0, #GD_SIZE /* allocate one GD above SP */ + bic x18, x18, #0x7 /* 8-byte alignment for GD */ +zero_gd: + sub x0, x0, #0x8 + str xzr, [x0] + cmp x0, x18 + b.gtzero_gd +#if defined(CONFIG_SYS_MALLOC_F_LEN) + sub x0, x18, #CONFIG_SYS_MALLOC_F_LEN + str x0, [x18, #GD_MALLOC_BASE] +#endif bic sp, x0, #0xf/* 16-byte alignment for ABI compliance */ - mov x18, sp /* GD is above SP */ mov x0, #0 bl board_init_f -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] PCI: add 64-bit prefetchable memory support
From: David Feng feng...@phytium.com.cn
PCI specification allow prefetchable memory to be 32-bit or 64-bit.
PCI express specification states that all memmory bars for prefetchable
memory must be implemented as 64-bit. They all require that 64 bit
prefetchble memory are suported especially when u-boot is ported to
more and more 64bit processors.
Signed-off-by: David Feng feng...@phytium.com.cn
---
drivers/pci/pci_auto.c | 36 +++-
1 file changed, 35 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index ed92857..5ddb0b8 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -223,9 +223,12 @@ void pciauto_prescan_setup_bridge(struct pci_controller
*hose,
struct pci_region *pci_mem = hose-pci_mem;
struct pci_region *pci_prefetch = hose-pci_prefetch;
struct pci_region *pci_io = hose-pci_io;
- u16 cmdstat;
+ u16 cmdstat, prefechable_64;
pci_hose_read_config_word(hose, dev, PCI_COMMAND, cmdstat);
+ pci_hose_read_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
+ prefechable_64);
+ prefechable_64 = 0x1;
/* Configure bus number registers */
pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS,
@@ -252,12 +255,26 @@ void pciauto_prescan_setup_bridge(struct pci_controller
*hose,
/* Set up memory and I/O filter limits, assume 32-bit I/O space
*/
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
(pci_prefetch-bus_lower 0xfff0)
16);
+ if (prefechable_64)
+#ifdef CONFIG_SYS_PCI_64BIT
+ pci_hose_write_config_dword(hose, dev,
+ PCI_PREF_BASE_UPPER32,
+ pci_prefetch-bus_lower 32);
+#else
+ pci_hose_write_config_dword(hose, dev,
+ PCI_PREF_BASE_UPPER32,
+ 0x0);
+#endif
cmdstat |= PCI_COMMAND_MEMORY;
} else {
/* We don't support prefetchable memory for now, so disable */
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
0x1000);
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT,
0x0);
+ if (prefechable_64) {
+ pci_hose_write_config_word(hose, dev,
PCI_PREF_BASE_UPPER32, 0x0);
+ pci_hose_write_config_word(hose, dev,
PCI_PREF_LIMIT_UPPER32, 0x0);
+ }
}
if (pci_io) {
@@ -297,11 +314,28 @@ void pciauto_postscan_setup_bridge(struct pci_controller
*hose,
}
if (pci_prefetch) {
+ u16 prefechable_64;
+
+ pci_hose_read_config_word(hose, dev,
+ PCI_PREF_MEMORY_LIMIT,
+ prefechable_64);
+ prefechable_64 = 0x1;
+
/* Round memory allocator to 1MB boundary */
pciauto_region_align(pci_prefetch, 0x10);
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT,
(pci_prefetch-bus_lower - 1) 16);
+ if (prefechable_64)
+#ifdef CONFIG_SYS_PCI_64BIT
+ pci_hose_write_config_dword(hose, dev,
+ PCI_PREF_LIMIT_UPPER32,
+ (pci_prefetch-bus_lower - 1) 32);
+#else
+ pci_hose_write_config_dword(hose, dev,
+ PCI_PREF_LIMIT_UPPER32,
+ 0x0);
+#endif
}
if (pci_io) {
--
1.7.9.5
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[U-Boot] [PATCH] Arm64 fix a bug of vbar_el3 initialization
From: David Feng feng...@phytium.com.cn Signed-off-by: David Feng feng...@phytium.com.cn --- arch/arm/cpu/armv8/start.S |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 33d3f36..4b11aa4 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -50,10 +50,10 @@ reset: */ adr x0, vectors switch_el x1, 3f, 2f, 1f -3: mrs x0, scr_el3 +3: msr vbar_el3, x0 + mrs x0, scr_el3 orr x0, x0, #0xf/* SCR_EL3.NS|IRQ|FIQ|EA */ msr scr_el3, x0 - msr vbar_el3, x0 msr cptr_el3, xzr /* Enable FP/SIMD */ ldr x0, =COUNTER_FREQUENCY msr cntfrq_el0, x0 /* Initialize CNTFRQ */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 3/9] arm: add support for arch timer
-Original Messages- From: Andrianov, Vitaly vita...@ti.com Sent Time: 2014-04-03 19:22:34 (Thursday) To: Masahiro Yamada yamad...@jp.panasonic.com, Karicheri, Muralidharan m-kariche...@ti.com Cc: Rini, Tom tr...@ti.com, u-boot@lists.denx.de u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH v5 3/9] arm: add support for arch timer Hi Masahiro, -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot- boun...@lists.denx.de] On Behalf Of Masahiro Yamada Sent: Wednesday, April 02, 2014 9:46 PM To: Karicheri, Muralidharan Cc: Rini, Tom; u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH v5 3/9] arm: add support for arch timer Hi Murali, On Tue, 1 Apr 2014 14:44:23 -0400 Murali Karicheri m-kariche...@ti.com wrote: From: Vitaly Andrianov vita...@ti.com This patch add basic support for the architecture timer found on recent ARMv7 based SoCs. Signed-off-by: Vitaly Andrianov vita...@ti.com Signed-off-by: Murali Karicheri m-kariche...@ti.com Acked-by: Tom Rini tr...@ti.com --- arch/arm/lib/Makefile |1 + arch/arm/lib/arch_timer.c | 58 + I am not familiar with this timer, but your commit description implies it is specific to ARMv7. If so, it looks like it should go to arch/arm/cpu/armv7/ . Is this right? This is for arch timer implemented in ARM Cortex-A15 which is ARMv7. I believe the same arch timer is in ARMv8. So, it is not specific to ARMv7 only. The commit description mentioned only ARMv7 because the driver was designed and tested on ARMv7. If we want to apply the arch_timer.c to armv8, the get_ticks() function should be modified due to mrrc instuction. Furthermore, armv8 now make use of timer infrastructure of lib/time.c. Only get_tbclk() and timer_read_counter() are architecture specific and declared in generic_timer.c. We'd better construct a common arch timer structure across arm platform. Best regards, David ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] armv8: Flush dcache before switching to EL2
-Original Messages- From: York Sun york...@freescale.com Sent Time: 2014-04-01 05:40:32 (Tuesday) To: albert.u.b...@aribaud.net Cc: u-boot@lists.denx.de, York Sun york...@freescale.com Subject: [U-Boot] [PATCH] armv8: Flush dcache before switching to EL2 For ARMv8, U-boot has been running at EL3 with cache and MMU enabled. Without proper setup for EL2, cache and MMU are both disabled (out of reset). Before switching, we need to flush the dcache to make sure the data is in the main memory. Signed-off-by: York Sun york...@freescale.com --- arch/arm/lib/bootm.c |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index a8295bf..9782ddb 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -199,6 +199,7 @@ static void do_nonsec_virt_switch(void) #ifdef CONFIG_ARM64 smp_kick_all_cpus(); + flush_dcache_all(); /* flush cache before swtiching to EL2 */ armv8_switch_to_el2(); #ifdef CONFIG_ARMV8_SWITCH_TO_EL1 armv8_switch_to_el1(); -- 1.7.9.5 fine! Acked-by: David.Feng feng...@phytium.com.cn ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] CONFIG_REMAKE_ELF for aarch64
-Original Messages- From: York Sun york...@freescale.com Sent Time: 2014-03-22 02:10:39 (Saturday) To: Scott Wood scottw...@freescale.com Cc: FengHua feng...@phytium.com.cn, u-boot@lists.denx.de u-boot@lists.denx.de Subject: CONFIG_REMAKE_ELF for aarch64 Scott, I am having a problem recreating u-boot.elf for aarch64 targets. The file is OK when Ttext is aligned with 64KB boundary, for example 0x3000. But if I use 0x30001000 as the text base, the result u-boot.elf has additional offset of 0x1. For example, the first instruction should be (from objdump) 30001000: 140ab 30001028 But it is 30011000: 140ab 30011028 My gcc version is gcc version 4.8.3 20131202 (prerelease) (crosstool-NG linaro-1.13.1-4.8-2013.12 - Linaro GCC 2013.11) GNU ld (crosstool-NG linaro-1.13.1-4.8-2013.12 - Linaro GCC 2013.11) 2.24.0.20131220 Supported emulations: aarch64linux aarch64elf aarch64elf32 aarch64elf32b aarch64elfb armelf armelfb aarch64linuxb aarch64linux32 aarch64linux32b armelfb_linux_eabi armelf_linux_eabi I am hoping you or someone familiar with ABI or something related and shed some light. York Maybe this is a bug of aarch64 tool chain. David ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARMv8: fix bug for flush data cache by set/way
-Original Messages- From: Leo Yan l...@marvell.com Sent Time: 2014-03-31 09:11:47 (Monday) To: u-boot@lists.denx.de, David Feng feng...@phytium.com.cn, Scott Wood scottw...@freescale.com Cc: Leo Yan l...@marvell.com Subject: [PATCH] ARMv8: fix bug for flush data cache by set/way When flush the d$ with set/way instruction, it need calculate the way's offset = log2(Associativity); but in current uboot's code, it use below formula to calculate the offset: log2(Associativity * 2 - 1), so finally it cannot flush data cache properly. Signed-off-by: Leo Yan l...@marvell.com --- arch/arm/cpu/armv8/cache.S |4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S index 546a83e..256d2e2 100644 --- a/arch/arm/cpu/armv8/cache.S +++ b/arch/arm/cpu/armv8/cache.S @@ -30,9 +30,7 @@ ENTRY(__asm_flush_dcache_level) add x2, x2, #4 /* x2 - log2(cache line size) */ mov x3, #0x3ff and x3, x3, x6, lsr #3 /* x3 - max number of #ways */ - add w4, w3, w3 - sub w4, w4, 1 /* round up log2(#ways + 1) */ - clz w5, w4 /* bit position of #ways */ + clz w5, w3 /* bit position of #ways */ mov x4, #0x7fff and x4, x4, x6, lsr #13 /* x4 - max number of #sets */ /* x1 - cache level 1 */ -- 1.7.9.5 Acked-by: David.Feng feng...@phytium.com.cn Thank you. Best Wishes. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] arm64 patch: gicv3 support
From: David Feng feng...@phytium.com.cn This patch add gicv3 support to uboot armv8 platform. Changes for v2: - rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S - move smp_kick_all_cpus() from gic.S to start.S, it would be implementation dependent. - Each core initialize it's own ReDistributor instead of master initializeing all ReDistributors. This is advised by arnab.basu arnab.b...@freescale.com. Signed-off-by: David Feng feng...@phytium.com.cn --- arch/arm/cpu/armv8/Makefile |1 - arch/arm/cpu/armv8/gic.S | 106 arch/arm/cpu/armv8/start.S| 46 +++-- arch/arm/include/asm/gic.h| 56 +++ arch/arm/lib/Makefile |1 + arch/arm/lib/gic_64.S | 194 + include/configs/vexpress_aemv8a.h |7 ++ 7 files changed, 297 insertions(+), 114 deletions(-) delete mode 100644 arch/arm/cpu/armv8/gic.S create mode 100644 arch/arm/lib/gic_64.S diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index b6eb6de..7d93f59 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -13,5 +13,4 @@ obj-y += cache_v8.o obj-y += exceptions.o obj-y += cache.o obj-y += tlb.o -obj-y += gic.o obj-y += transition.o diff --git a/arch/arm/cpu/armv8/gic.S b/arch/arm/cpu/armv8/gic.S deleted file mode 100644 index 599aa8f..000 --- a/arch/arm/cpu/armv8/gic.S +++ /dev/null @@ -1,106 +0,0 @@ -/* - * GIC Initialization Routines. - * - * (C) Copyright 2013 - * David Feng feng...@phytium.com.cn - * - * SPDX-License-Identifier:GPL-2.0+ - */ - -#include asm-offsets.h -#include config.h -#include linux/linkage.h -#include asm/macro.h -#include asm/gic.h - - -/* - * - * void gic_init(void) __attribute__((weak)); - * - * Currently, this routine only initialize secure copy of GIC - * with Security Extensions at EL3. - * - */ -WEAK(gic_init) - branch_if_slave x0, 2f - - /* Initialize Distributor and SPIs */ - ldr x1, =GICD_BASE - mov w0, #0x3/* EnableGrp0 | EnableGrp1 */ - str w0, [x1, GICD_CTLR] /* Secure GICD_CTLR */ - ldr w0, [x1, GICD_TYPER] - and w2, w0, #0x1f /* ITLinesNumber */ - cbz w2, 2f /* No SPIs */ - add x1, x1, (GICD_IGROUPRn + 4) - mov w0, #~0 /* Config SPIs as Grp1 */ -1: str w0, [x1], #0x4 - sub w2, w2, #0x1 - cbnzw2, 1b - - /* Initialize SGIs and PPIs */ -2: ldr x1, =GICD_BASE - mov w0, #~0 /* Config SGIs and PPIs as Grp1 */ - str w0, [x1, GICD_IGROUPRn] /* GICD_IGROUPR0 */ - mov w0, #0x1/* Enable SGI 0 */ - str w0, [x1, GICD_ISENABLERn] - - /* Initialize Cpu Interface */ - ldr x1, =GICC_BASE - mov w0, #0x1e7 /* Disable IRQ/FIQ Bypass */ - /* Enable Ack Group1 Interrupt */ - /* EnableGrp0 EnableGrp1 */ - str w0, [x1, GICC_CTLR] /* Secure GICC_CTLR */ - - mov w0, #0x1 7 /* Non-Secure access to GICC_PMR */ - str w0, [x1, GICC_PMR] - - ret -ENDPROC(gic_init) - - -/* - * - * void gic_send_sgi(u64 sgi) __attribute__((weak)); - * - */ -WEAK(gic_send_sgi) - ldr x1, =GICD_BASE - mov w2, #0x8000 - movkw2, #0x100, lsl #16 - orr w2, w2, w0 - str w2, [x1, GICD_SGIR] - ret -ENDPROC(gic_send_sgi) - - -/* - * - * void wait_for_wakeup(void) __attribute__((weak)); - * - * Wait for SGI 0 from master. - * - */ -WEAK(wait_for_wakeup) - ldr x1, =GICC_BASE -0: wfi - ldr w0, [x1, GICC_AIAR] - str w0, [x1, GICC_AEOIR] - cbnzw0, 0b - ret -ENDPROC(wait_for_wakeup) - - -/* - * - * void smp_kick_all_cpus(void) __attribute__((weak)); - * - */ -WEAK(smp_kick_all_cpus) - /* Kick secondary cpus up by SGI 0 interrupt */ - mov x0, xzr /* SGI 0 */ - mov x29, lr /* Save LR */ - bl gic_send_sgi - mov lr, x29 /* Restore LR */ - ret -ENDPROC(smp_kick_all_cpus) diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index bcc2603..4d304cf 100644 ---
Re: [U-Boot] [PATCH] arm64 patch: gicv3 support
-Original Messages- From: Albert ARIBAUD albert.u.b...@aribaud.net Sent Time: 2014-02-22 00:38:05 (Saturday) To: feng...@phytium.com.cn Cc: u-boot@lists.denx.de, tr...@ti.com Subject: Re: [PATCH] arm64 patch: gicv3 support Hi feng...@phytium.com.cn, On Wed, 15 Jan 2014 16:10:56 +0800, feng...@phytium.com.cn wrote: From: David Feng feng...@phytium.com.cn This patch add gicv3 support to uboot armv8 platform. Modifications cover 4 source files, as follows: gic.S: gicv3 initialization and sgi interrupt raising. goc.h: gicv3 register definitions. vexpress_aemv8a.h: add CONFIG_GICV2/CONFIG_GICV3 switch. start.S: set SCR_EL3.NS bit to 1, gicv3 register of ICC_SRE_EL2 could be accessed only when SCR_EL3.NS=1. set SCR_EL3.IRQ|FIQ|EA bits, reroute all interrupts to el3 at all cores, slaves could be waken up by interrupt only when the interrupt is routed to it when running at el3. Note: please use the latest gcc 4.8 compiler from linaro which support gicv3 system register assembling. Signed-off-by: David Feng feng...@phytium.com.cn --- I am not well-versed enough in aarch64 and GIC, be it v2 or v3, so... Is this patch OK as it is, or should a V2 follow with common GIVv2/GICv3 code merged? Amicalement, hi Albert, I am preparing the V2, there are some optimizations. But it's still Armv8 specific. I would like to consider common Gicv2/Gicv3 code working across armv7 and armv8. It's not easy and I have no armv7 test environment. Thank you! Best Regards, David ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH][RFC] add pci bridge 64 bit prefechable mem support
From: David Feng feng...@phytium.com.cn
u-boot did not program the upper 32 bits of prefetchable base and limit
in pci bridge config space. I think it's needed when 64 bit address space
is used.
Signed-off-by: David Feng feng...@phytium.com.cn
---
drivers/pci/pci_auto.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 86ba6b5..896605a 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -226,6 +226,10 @@ void pciauto_prescan_setup_bridge(struct pci_controller
*hose,
/* Set up memory and I/O filter limits, assume 32-bit I/O space
*/
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
(pci_prefetch-bus_lower 0xfff0)
16);
+#ifdef CONFIG_SYS_PCI_64BIT
+ pci_hose_write_config_dword(hose, dev, PCI_PREF_BASE_UPPER32,
+ pci_prefetch-bus_lower 32);
+#endif
cmdstat |= PCI_COMMAND_MEMORY;
} else {
@@ -275,7 +279,11 @@ void pciauto_postscan_setup_bridge(struct pci_controller
*hose,
pciauto_region_align(pci_prefetch, 0x10);
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT,
- (pci_prefetch-bus_lower - 1) 16);
+ (pci_prefetch-bus_lower - 1) 16);
+#ifdef CONFIG_SYS_PCI_64BIT
+ pci_hose_write_config_dword(hose, dev, PCI_PREF_LIMIT_UPPER32,
+ (pci_prefetch-bus_lower - 1) 32);
+#endif
}
if (pci_io) {
--
1.7.9.5
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[U-Boot] [PATCH][RFC v2] add pci 64 bit prefechable mem support
From: David Feng feng...@phytium.com.cn
u-boot did not program the upper 32 bits of prefetchable base and limit
in pci bridge config space. I think it's needed when 64 bit address space
is used.
Changes for v1:
- use lowest bit of prefechable base(or limit) to determine whether
the bridge support 64 bit prefechable address space.
Signed-off-by: David Feng feng...@phytium.com.cn
---
drivers/pci/pci_auto.c | 38 --
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 86ba6b5..14652be 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -197,9 +197,12 @@ void pciauto_prescan_setup_bridge(struct pci_controller
*hose,
struct pci_region *pci_mem = hose-pci_mem;
struct pci_region *pci_prefetch = hose-pci_prefetch;
struct pci_region *pci_io = hose-pci_io;
- u16 cmdstat;
+ u16 cmdstat, prefechable_64;
pci_hose_read_config_word(hose, dev, PCI_COMMAND, cmdstat);
+ pci_hose_read_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
+ prefechable_64);
+ prefechable_64 = 0x1;
/* Configure bus number registers */
pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS,
@@ -226,12 +229,26 @@ void pciauto_prescan_setup_bridge(struct pci_controller
*hose,
/* Set up memory and I/O filter limits, assume 32-bit I/O space
*/
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
(pci_prefetch-bus_lower 0xfff0)
16);
+ if (prefechable_64)
+#ifdef CONFIG_SYS_PCI_64BIT
+ pci_hose_write_config_dword(hose, dev,
+ PCI_PREF_BASE_UPPER32,
+ pci_prefetch-bus_lower 32);
+#else
+ pci_hose_write_config_dword(hose, dev,
+ PCI_PREF_BASE_UPPER32,
+ 0x0);
+#endif
cmdstat |= PCI_COMMAND_MEMORY;
} else {
/* We don't support prefetchable memory for now, so disable */
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
0x1000);
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT,
0x0);
+ if (prefechable_64) {
+ pci_hose_write_config_word(hose, dev,
PCI_PREF_BASE_UPPER32, 0x0);
+ pci_hose_write_config_word(hose, dev,
PCI_PREF_LIMIT_UPPER32, 0x0);
+ }
}
if (pci_io) {
@@ -271,11 +288,28 @@ void pciauto_postscan_setup_bridge(struct pci_controller
*hose,
}
if (pci_prefetch) {
+ u16 prefechable_64;
+
+ pci_hose_read_config_word(hose, dev,
+ PCI_PREF_MEMORY_LIMIT,
+ prefechable_64);
+ prefechable_64 = 0x1;
+
/* Round memory allocator to 1MB boundary */
pciauto_region_align(pci_prefetch, 0x10);
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT,
- (pci_prefetch-bus_lower - 1) 16);
+ (pci_prefetch-bus_lower - 1) 16);
+ if (prefechable_64)
+#ifdef CONFIG_SYS_PCI_64BIT
+ pci_hose_write_config_dword(hose, dev,
+ PCI_PREF_LIMIT_UPPER32,
+ (pci_prefetch-bus_lower - 1) 32);
+#else
+ pci_hose_write_config_dword(hose, dev,
+ PCI_PREF_LIMIT_UPPER32,
+ 0x0);
+#endif
}
if (pci_io) {
--
1.7.9.5
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Re: [U-Boot] [PATCH][RFC v2] add pci 64 bit prefechable mem support
-Original Messages- From: Wolfgang Denk w...@denx.de Sent Time: 2014-02-14 00:30:24 (Friday) To: feng...@phytium.com.cn Cc: u-boot@lists.denx.de, tr...@ti.com, albert.u.b...@aribaud.net Subject: Re: [PATCH][RFC v2] add pci 64 bit prefechable mem support Dear feng...@phytium.com.cn, In message 1392282108-56485-1-git-send-email-feng...@phytium.com.cn you wrote: From: David Feng feng...@phytium.com.cn u-boot did not program the upper 32 bits of prefetchable base and limit in pci bridge config space. I think it's needed when 64 bit address space is used. You write I think it's needed - is it or not? Do you have a specific test case that fails without your patch, and works with it? Best regards, Wolfgang Denk. There's no test case now (maybe a few days later I could make a test). PCI-to-PCI Bridge Architecture Specification require that the upper 32 bit of prefetchable space must be initialized by configuration software. But usually the default value is zero already. A board using 64 bit pci prefetchable memory space and a pci device with 64 bit prefetchable space are needed. I think u-boot did not encounter this situation before. Best Regards, David ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] fix address of error message in mtest command
From: David Feng feng...@phytium.com.cn
This patch deal with error message of mtest command.
When test failed, the mtest command will output error information
that include memory address and value. But the address field is
not correct or misleading.
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/cmd_mem.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/common/cmd_mem.c b/common/cmd_mem.c
index c3aab3d..8d2cfc8 100644
--- a/common/cmd_mem.c
+++ b/common/cmd_mem.c
@@ -746,7 +746,8 @@ static ulong mem_test_alt(vu_long *buf, ulong start_addr,
ulong end_addr,
if (temp != pattern) {
printf(\nFAILURE: Address bit stuck high @ 0x%.8lx:
expected 0x%.8lx, actual 0x%.8lx\n,
- start_addr + offset, pattern, temp);
+ start_addr + offset*sizeof(vu_long),
+ pattern, temp);
errs++;
if (ctrlc())
return -1;
@@ -767,7 +768,8 @@ static ulong mem_test_alt(vu_long *buf, ulong start_addr,
ulong end_addr,
printf(\nFAILURE: Address bit stuck low or
shorted @ 0x%.8lx: expected 0x%.8lx,
actual 0x%.8lx\n,
- start_addr + offset, pattern, temp);
+ start_addr + offset*sizeof(vu_long),
+ pattern, temp);
errs++;
if (ctrlc())
return -1;
@@ -807,7 +809,8 @@ static ulong mem_test_alt(vu_long *buf, ulong start_addr,
ulong end_addr,
if (temp != pattern) {
printf(\nFAILURE (read/write) @ 0x%.8lx:
expected 0x%.8lx, actual 0x%.8lx)\n,
- start_addr + offset, pattern, temp);
+ start_addr + offset*sizeof(vu_long),
+ pattern, temp);
errs++;
if (ctrlc())
return -1;
@@ -827,7 +830,8 @@ static ulong mem_test_alt(vu_long *buf, ulong start_addr,
ulong end_addr,
if (temp != anti_pattern) {
printf(\nFAILURE (read/write): @ 0x%.8lx:
expected 0x%.8lx, actual 0x%.8lx)\n,
- start_addr + offset, anti_pattern, temp);
+ start_addr + offset*sizeof(vu_long),
+ anti_pattern, temp);
errs++;
if (ctrlc())
return -1;
@@ -885,7 +889,7 @@ static ulong mem_test_quick(vu_long *buf, ulong start_addr,
ulong end_addr,
printf(\nMem error @ 0x%08X:
found %08lX, expected %08lX\n,
- (uint)(uintptr_t)(start_addr + offset),
+ (uint)(uintptr_t)(start_addr +
offset*sizeof(vu_long)),
readback, val);
errs++;
if (ctrlc())
--
1.7.9.5
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Re: [U-Boot] [RFC] Add 64-bit data support for memory commands
-Original Messages- From: Wolfgang Denk w...@denx.de Sent Time: 2014-02-13 06:11:01 (Thursday) To: York Sun york...@freescale.com Cc: scottw...@freescale.com, u-boot@lists.denx.de Subject: Re: [U-Boot] [RFC] Add 64-bit data support for memory commands Dear York Sun, In message 1392240023-25205-1-git-send-email-york...@freescale.com you wrote: For aarch64, unsigned long is 64-bit data. Memory commands should be fixed with u32 for 32-bit address access. A double word data size is added to support 64-bit data. Signed-off-by: York Sun york...@freescale.com Can you please make all this code conditional for 64 bit architectures only, so that 32 bit systems do not suffer from the increased code size? Thanks. Best regards, Wolfgang Denk How about use some macro from compiler of sizeof(long)? Maybe this could avoid conditional switch, and cmd_mem work with 32 and 64 bit platform. Best Wishes ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] armv8/cache: Consolidate setting for MAIR and TCR
hi York,
-Original Messages-
From: York Sun york...@freescale.com
Sent Time: 2014-02-11 05:55:52 (Tuesday)
To: albert.u.b...@aribaud.net
Cc: scottw...@freescale.com, York Sun york...@freescale.com, David Feng
feng...@phytium.com.cn
Subject: [PATCH 1/3] armv8/cache: Consolidate setting for MAIR and TCR
Move setting for MAIR and TCR to cache_v8.c, to avoid conflict with
sub-architecture.
Signed-off-by: York Sun york...@freescale.com
CC: David Feng feng...@phytium.com.cn
---
arch/arm/cpu/armv8/cache_v8.c | 22 +++---
arch/arm/cpu/armv8/start.S| 22 --
2 files changed, 19 insertions(+), 25 deletions(-)
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 131fdab..7acae1b 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -45,15 +45,31 @@ static void mmu_setup(void)
/* load TTBR0 */
el = current_el();
- if (el == 1)
+ if (el == 1) {
asm volatile(msr ttbr0_el1, %0
: : r (gd-arch.tlb_addr) : memory);
- else if (el == 2)
+ asm volatile(msr tcr_el1, %0
+ : : r (TCR_FLAGS | TCR_EL1_IPS_BITS)
+ : memory);
+ asm volatile(msr mair_el1, %0
+ : : r (MEMORY_ATTRIBUTES) : memory);
+ } else if (el == 2) {
asm volatile(msr ttbr0_el2, %0
: : r (gd-arch.tlb_addr) : memory);
- else
+ asm volatile(msr tcr_el2, %0
+ : : r (TCR_FLAGS | TCR_EL2_IPS_BITS)
+ : memory);
+ asm volatile(msr mair_el2, %0
+ : : r (MEMORY_ATTRIBUTES) : memory);
+ } else {
asm volatile(msr ttbr0_el3, %0
: : r (gd-arch.tlb_addr) : memory);
+ asm volatile(msr tcr_el3, %0
+ : : r (TCR_FLAGS | TCR_EL2_IPS_BITS)
+ : memory);
+ asm volatile(msr mair_el3, %0
+ : : r (MEMORY_ATTRIBUTES) : memory);
+ }
/* enable the mmu */
set_sctlr(get_sctlr() | CR_M);
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index bcc2603..90daa4d 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -128,28 +128,6 @@ ENTRY(c_runtime_cpu_setup)
isb sy
#endif
-#ifndef CONFIG_SYS_DCACHE_OFF
- /*
- * Setup MAIR and TCR.
- */
- ldr x0, =MEMORY_ATTRIBUTES
- ldr x1, =TCR_FLAGS
-
- switch_el x2, 3f, 2f, 1f
-3: orr x1, x1, TCR_EL3_IPS_BITS
- msr mair_el3, x0
- msr tcr_el3, x1
- b 0f
-2: orr x1, x1, TCR_EL2_IPS_BITS
- msr mair_el2, x0
- msr tcr_el2, x1
- b 0f
-1: orr x1, x1, TCR_EL1_IPS_BITS
- msr mair_el1, x0
- msr tcr_el1, x1
-0:
-#endif
-
/* Relocate vBAR */
adr x0, vectors
switch_el x1, 3f, 2f, 1f
--
1.7.9.5
This will be better. Acked.
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Re: [U-Boot] U-boot for 64bit ARMv8
-Original Messages- From: tiger...@viatech.com.cn Sent Time: 2014-01-23 14:44:36 (Thursday) To: u-boot@lists.denx.de Cc: Subject: [U-Boot] U-boot for 64bit ARMv8 Hi, experts: I found ARMv8/Exceptions.S only created a 8 items vector table. But based on ARMv8 Arch Ref Manual, it should create 16 items in a vector table: Current Exception level with SP_EL0 : 4 items Current Exception level with SP_Elx : 4 items EL immediately lower than target_EL is using AARCH64 : 4 items EL immediately lower than target_EL is using AARCH32 : 4 items Are current 8 items enough? Or will patch it in the future? Currently, u-boot for aarch64 does not provide any run time service. So, the low level exception entries are not implemented. Best wishes, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v15 07/10] arm64: core support
Hi Scott, -Original Messages- From: Scott Wood scottw...@freescale.com Sent Time: 2014-01-23 08:28:06 (Thursday) To: FengHua feng...@phytium.com.cn Cc: bhupesh.sha...@freescale.com bhupesh.sha...@freescale.com, 'tr...@ti.com' tr...@ti.com, 'u-boot@lists.denx.de' u-boot@lists.denx.de, rod.dor...@freescale.com Subject: Re: [U-Boot] [PATCH v15 07/10] arm64: core support On Tue, 2014-01-14 at 09:52 +0800, FengHua wrote: hi bhupesh, Hi David, In reference to my mail above, I see that the transition to EL2 (from EL3) which occurs very early in start.S needs to be changed on lines of the ARMv7 code, i.e. the EL2 transition should happen just before Linux is booted up by the u-boot. The reason for the same is that a no of ARM IPs like GIC, SMMU and TZPC/TZASC need to be configured to allow non-secure accesses from Linux world (which runs in EL1 mode). Adding the assembly code for all such IPs in 'setup_el3' function in start.S, will bloat the start.S and also increase the chances of a bug in the assembly code. Hence, I would like to propose a strategy to shift from EL3 to EL2 to some point in u-boot code after the C Run Time has been initialized (similar to present ARMv7 u-boot code). If you are ok with the same, I can try to send out some RFC patches rebased against your latest v16 code-base. Please let me know. Regards, Bhupesh Actually, patch v16 did exception level switch in the way as you said. please review the code. Both master and slaves switch to el2(el1) just before jumping to linux kernel. BTW,if any good conception please feel free to patch it. How would you handle running U-Boot under a secure firmware, or under a hypervisor? Why not take the Linux approach of running most code in EL1, with exception handlers pointing at code to handle special situations (such as returning to EL2 before OS entry)? As for bloating start.S, could leaving EL3 be done in early C code rather than in early asm or late C code? Or, bundle U-Boot with a tiny insecure firmware that provides the minimum functionality needed with similar APIs that would be used with real secure firmware. -Scott The u-boot for aarch64 are designed to support running at EL3/EL2/EL1. The macro 'switch_el' is used to separate different exception level code. If no secure firmware exist it runs at highest exception level processor implemented that could be EL3 or EL2 or EL1. Besides, theoretically it could be loaded by a secure firmware or a hypervisor and runs at EL2 or EL1 (This is not tested). Best Regards, David ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] fdt_support.c: Correct linux, initrd-start/end setting
-Original Messages-
From: Tom Rini tr...@ti.com
Sent Time: 2014-01-21 06:47:25 (Tuesday)
To: u-boot@lists.denx.de
Cc:
Subject: [U-Boot] [PATCH] fdt_support.c: Correct linux, initrd-start/end
setting
The change to add 64bit initrd support broke 32bit initrd support as it
always set 64bits worth of data into the properties, even on 32bit
systems. The fix is to use addr_cell_len (which already says how much
data is in 'tmp') to set the property, rather than always setting 8.
Thanks to Stephen Warren for pointing out the fix here.
Reported-by: Otavio Salvador ota...@ossystems.com.br
Signed-off-by: Tom Rini tr...@ti.com
---
common/fdt_support.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index b9dce99..f9f358e 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -204,7 +204,7 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong
initrd_end, int force)
if ((path == NULL) || force) {
write_cell((u8 *)tmp, initrd_start, addr_cell_len);
err = fdt_setprop(fdt, nodeoffset,
- linux,initrd-start, tmp, sizeof(tmp));
+ linux,initrd-start, tmp, addr_cell_len);
if (err 0) {
printf(WARNING:
could not set linux,initrd-start %s.\n,
@@ -213,7 +213,7 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong
initrd_end, int force)
}
write_cell((u8 *)tmp, initrd_end, addr_cell_len);
err = fdt_setprop(fdt, nodeoffset,
- linux,initrd-end, tmp, sizeof(tmp));
+ linux,initrd-end, tmp, addr_cell_len);
if (err 0) {
printf(WARNING: could not set linux,initrd-end %s.\n,
fdt_strerror(err));
--
1.7.9.5
It should be like this. Acked.
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[U-Boot] [PATCH] arm64 patch: gicv3 support
From: David Feng feng...@phytium.com.cn This patch add gicv3 support to uboot armv8 platform. Modifications cover 4 source files, as follows: gic.S: gicv3 initialization and sgi interrupt raising. goc.h: gicv3 register definitions. vexpress_aemv8a.h: add CONFIG_GICV2/CONFIG_GICV3 switch. start.S: set SCR_EL3.NS bit to 1, gicv3 register of ICC_SRE_EL2 could be accessed only when SCR_EL3.NS=1. set SCR_EL3.IRQ|FIQ|EA bits, reroute all interrupts to el3 at all cores, slaves could be waken up by interrupt only when the interrupt is routed to it when running at el3. Note: please use the latest gcc 4.8 compiler from linaro which support gicv3 system register assembling. Signed-off-by: David Feng feng...@phytium.com.cn --- arch/arm/cpu/armv8/gic.S | 84 - arch/arm/cpu/armv8/start.S|5 ++- arch/arm/include/asm/gic.h| 56 + include/configs/vexpress_aemv8a.h |7 4 files changed, 150 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/gic.S b/arch/arm/cpu/armv8/gic.S index 599aa8f..a08939a 100644 --- a/arch/arm/cpu/armv8/gic.S +++ b/arch/arm/cpu/armv8/gic.S @@ -23,6 +23,74 @@ * */ WEAK(gic_init) +#if defined(CONFIG_GICV3) + branch_if_slave x0, 3f + + /* Initialize Distributor */ + ldr x1, =GICD_BASE + mov w0, #0x37 /* EnableGrp0 | EnableGrp1NS */ + /* EnableGrp1S | ARE_S | ARE_NS */ + str w0, [x1, GICD_CTLR] /* Secure GICD_CTLR */ + ldr w0, [x1, GICD_TYPER] + and w2, w0, #0x1f /* ITLinesNumber */ + cbz w2, 1f /* No SPIs */ + add x3, x1, (GICD_IGROUPRn + 4) + add x4, x1, (GICD_IGROUPMODRn + 4) + mov w5, #~0 +0: str w5, [x3], #0x4 + str wzr, [x4], #0x4 /* Config SPIs as Group1NS */ + sub w2, w2, #0x1 + cbnzw2, 0b + + /* Initialize All ReDistributors */ +1: ldr x1, =GICR_BASE +2: mov w0, #~0x2 + ldr w2, [x1, GICR_WAKER] + and w2, w2, w0 /* Clear ProcessorSleep */ + str w2, [x1, GICR_WAKER] + dsb st + isb +0: ldr w0, [x1, GICR_WAKER] + tbnzw0, #2, 0b /* Wait Children be Alive */ + + add x2, x1, #(1 16) /* SGI_Base */ + mov w5, #~0 + str w5, [x2, GICR_IGROUPRn] + str wzr, [x2, GICR_IGROUPMODRn] /* SGIs|PPIs Group1NS */ + mov w0, #0x1/* Enable SGI 0 */ + str w0, [x2, GICR_ISENABLERn] + + ldr w0, [x1, GICR_TYPER] + add x1, x1, #(2 16) + tbz w0, #4, 2b /* Next ReDistributor if Exist */ + + /* Initialize Cpu Interface */ +3: mrs x0, ICC_SRE_EL3 + orr x0, x0, #0xf/* SRE Disable IRQ/FIQ Bypass */ + /* Allow EL2 access to ICC_SRE_EL2 */ + msr ICC_SRE_EL3, x0 + isb + + mrs x0, ICC_SRE_EL2 + orr x0, x0, #0xf/* SRE Disable IRQ/FIQ Bypass */ + /* Allow EL1 access to ICC_SRE_EL1 */ + msr ICC_SRE_EL2, x0 + isb + + mov x0, #0x3/* EnableGrp1NS | EnableGrp1S */ + msr ICC_IGRPEN1_EL3, x0 + isb + + msr ICC_CTLR_EL3, xzr + isb + + msr ICC_CTLR_EL1, xzr /* NonSecure ICC_CTLR_EL1 */ + isb + + mov x0, #0x1 7 /* Non-Secure access to ICC_PMR_EL1 */ + msr ICC_PMR_EL1, x0 + isb +#elif defined(CONFIG_GICV2) branch_if_slave x0, 2f /* Initialize Distributor and SPIs */ @@ -54,7 +122,7 @@ WEAK(gic_init) mov w0, #0x1 7 /* Non-Secure access to GICC_PMR */ str w0, [x1, GICC_PMR] - +#endif ret ENDPROC(gic_init) @@ -65,11 +133,18 @@ ENDPROC(gic_init) * */ WEAK(gic_send_sgi) +#if defined(CONFIG_GICV3) + mov x1, #(1 40) + orr x1, x1, x0, lsl #24 + msr ICC_ASGI1R_EL1, x1 + isb +#elif defined(CONFIG_GICV2) ldr x1, =GICD_BASE mov w2, #0x8000 movkw2, #0x100, lsl #16 orr w2, w2, w0 str w2, [x1, GICD_SGIR] +#endif ret ENDPROC(gic_send_sgi) @@ -82,11 +157,18 @@ ENDPROC(gic_send_sgi) * */ WEAK(wait_for_wakeup) +#if defined(CONFIG_GICV3) +0: wfi + mrs x0, ICC_IAR1_EL1 + msr ICC_EOIR1_EL1, x0 + cbnzx0, 0b +#elif defined(CONFIG_GICV2) ldr x1, =GICC_BASE 0: wfi ldr w0, [x1,
Re: [U-Boot] [PATCH] arm64 patch: gicv3 support
hi bhupesh, -Original Messages- From: bhupesh.sha...@freescale.com bhupesh.sha...@freescale.com Sent Time: 2014-01-15 22:19:02 (Wednesday) To: 'feng...@phytium.com.cn' feng...@phytium.com.cn, u-boot@lists.denx.de u-boot@lists.denx.de Cc: tr...@ti.com tr...@ti.com, arnab.b...@freescale.com arnab.b...@freescale.com Subject: RE: [U-Boot] [PATCH] arm64 patch: gicv3 support Hi David, Thanks for the patch. Please see some comments inline: -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of feng...@phytium.com.cn Sent: Wednesday, January 15, 2014 1:41 PM To: u-boot@lists.denx.de Cc: tr...@ti.com Subject: [U-Boot] [PATCH] arm64 patch: gicv3 support From: David Feng feng...@phytium.com.cn This patch add gicv3 support to uboot armv8 platform. Modifications cover 4 source files, as follows: gic.S: gicv3 initialization and sgi interrupt raising. goc.h: gicv3 register definitions. ^^^ Typo - gic.h vexpress_aemv8a.h: add CONFIG_GICV2/CONFIG_GICV3 switch. start.S: set SCR_EL3.NS bit to 1, gicv3 register of ICC_SRE_EL2 could be accessed only when SCR_EL3.NS=1. set SCR_EL3.IRQ|FIQ|EA bits, reroute all interrupts to el3 at all cores, slaves could be waken up by interrupt only when the interrupt is routed to it when running at el3. Hmmm. This seems a bit suspicious - if we reroute even IRQs and Aborts to the cores which work in EL3, they will not be visible to Linux or Hypervisor which work in EL2 or EL1. These bits will be cleared when jumping to el2. Have you tried to launch linux on the ARMv8 foundation model v2 with these changes? Yes. Note: please use the latest gcc 4.8 compiler from linaro which support gicv3 system register assembling. Two generic comments : - I see in the Foundation model README that the optional GICv3 is supported with memory-mapped CPU interface and distributor, but I see your patch accessing them via the sytem register interface (via msr and mrs). Is this a BUG in the README? The document did not describe it clearly, but actually it support. Did you check this patch on the latest ARMv8 foundation model - v2? Yes. - Also how about sharing the GICv2 coding between ARMv7 and ARMv8 - some of the code may seems like a duplication from the ARMv7 GICv2 content. Many codes could be shared between armv7 and armv8 such as cache maintenance and gic. These need be rearranged seriously. We'd better wait a period of time before the armv8 codes are more widely acquainted and get more feedback about this. Signed-off-by: David Feng feng...@phytium.com.cn --- arch/arm/cpu/armv8/gic.S | 84 - arch/arm/cpu/armv8/start.S|5 ++- arch/arm/include/asm/gic.h| 56 + include/configs/vexpress_aemv8a.h |7 4 files changed, 150 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/gic.S b/arch/arm/cpu/armv8/gic.S index 599aa8f..a08939a 100644 --- a/arch/arm/cpu/armv8/gic.S +++ b/arch/arm/cpu/armv8/gic.S @@ -23,6 +23,74 @@ * * / WEAK(gic_init) +#if defined(CONFIG_GICV3) + branch_if_slave x0, 3f + + /* Initialize Distributor */ + ldr x1, =GICD_BASE + mov w0, #0x37 /* EnableGrp0 | EnableGrp1NS */ + /* EnableGrp1S | ARE_S | ARE_NS */ + str w0, [x1, GICD_CTLR] /* Secure GICD_CTLR */ + ldr w0, [x1, GICD_TYPER] + and w2, w0, #0x1f /* ITLinesNumber */ + cbz w2, 1f /* No SPIs */ + add x3, x1, (GICD_IGROUPRn + 4) + add x4, x1, (GICD_IGROUPMODRn + 4) + mov w5, #~0 +0: str w5, [x3], #0x4 + str wzr, [x4], #0x4 /* Config SPIs as Group1NS */ + sub w2, w2, #0x1 + cbnzw2, 0b + + /* Initialize All ReDistributors */ +1: ldr x1, =GICR_BASE +2: mov w0, #~0x2 + ldr w2, [x1, GICR_WAKER] + and w2, w2, w0 /* Clear ProcessorSleep */ + str w2, [x1, GICR_WAKER] + dsb st + isb +0: ldr w0, [x1, GICR_WAKER] + tbnzw0, #2, 0b /* Wait Children be Alive */ + + add x2, x1, #(1 16) /* SGI_Base */ + mov w5, #~0 + str w5, [x2, GICR_IGROUPRn] + str wzr, [x2, GICR_IGROUPMODRn] /* SGIs|PPIs Group1NS */ + mov w0, #0x1/* Enable SGI 0 */ + str w0, [x2, GICR_ISENABLERn] + + ldr w0, [x1, GICR_TYPER] + add x1, x1, #(2 16) + tbz w0, #4, 2b /* Next ReDistributor if Exist */ + + /* Initialize Cpu Interface */ +3: mrs x0, ICC_SRE_EL3 + orr x0, x0, #0xf/* SRE
Re: [U-Boot] [PATCH] arm64 patch: gicv3 support
-Original Messages- From: bhupesh.sha...@freescale.com bhupesh.sha...@freescale.com Sent Time: 2014-01-16 11:45:18 (Thursday) To: 'FengHua' feng...@phytium.com.cn Cc: u-boot@lists.denx.de u-boot@lists.denx.de, tr...@ti.com tr...@ti.com, arnab.b...@freescale.com arnab.b...@freescale.com Subject: RE: RE: [U-Boot] [PATCH] arm64 patch: gicv3 support -Original Message- From: FengHua [mailto:feng...@phytium.com.cn] Sent: Thursday, January 16, 2014 6:47 AM To: Sharma Bhupesh-B45370 Cc: u-boot@lists.denx.de; tr...@ti.com; Basu Arnab-B45036 Subject: Re: RE: [U-Boot] [PATCH] arm64 patch: gicv3 support hi bhupesh, -Original Messages- From: bhupesh.sha...@freescale.com bhupesh.sha...@freescale.com Sent Time: 2014-01-15 22:19:02 (Wednesday) To: 'feng...@phytium.com.cn' feng...@phytium.com.cn, u-boot@lists.denx.de u-boot@lists.denx.de Cc: tr...@ti.com tr...@ti.com, arnab.b...@freescale.com arnab.b...@freescale.com Subject: RE: [U-Boot] [PATCH] arm64 patch: gicv3 support Hi David, Thanks for the patch. Please see some comments inline: -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of feng...@phytium.com.cn Sent: Wednesday, January 15, 2014 1:41 PM To: u-boot@lists.denx.de Cc: tr...@ti.com Subject: [U-Boot] [PATCH] arm64 patch: gicv3 support From: David Feng feng...@phytium.com.cn This patch add gicv3 support to uboot armv8 platform. Modifications cover 4 source files, as follows: gic.S: gicv3 initialization and sgi interrupt raising. goc.h: gicv3 register definitions. ^^^ Typo - gic.h vexpress_aemv8a.h: add CONFIG_GICV2/CONFIG_GICV3 switch. start.S: set SCR_EL3.NS bit to 1, gicv3 register of ICC_SRE_EL2 could be accessed only when SCR_EL3.NS=1. set SCR_EL3.IRQ|FIQ|EA bits, reroute all interrupts to el3 at all cores, slaves could be waken up by interrupt only when the interrupt is routed to it when running at el3. Hmmm. This seems a bit suspicious - if we reroute even IRQs and Aborts to the cores which work in EL3, they will not be visible to Linux or Hypervisor which work in EL2 or EL1. These bits will be cleared when jumping to el2. I seem to be missing this clear operation in your patch. Can you please point me to the same. armv8_switch_to_el2 routine in transition.S. Have you tried to launch linux on the ARMv8 foundation model v2 with these changes? Yes. But I thought we still don't have GICv3 driver in Linux. So did you boot linux with GICv2 or GICv3? GICv3. MAZ's gicv3 kernel git tree contains GICv3 driver. Note: please use the latest gcc 4.8 compiler from linaro which support gicv3 system register assembling. Two generic comments : - I see in the Foundation model README that the optional GICv3 is supported with memory-mapped CPU interface and distributor, but I see your patch accessing them via the sytem register interface (via msr and mrs). Is this a BUG in the README? The document did not describe it clearly, but actually it support. So this seems to be a documentation BUG, did you provide a feedback to the ARM support folks regarding the same - they should probably fix the documentation. I have not. Actually, I did not notice this before receiving your mail. Did you check this patch on the latest ARMv8 foundation model - v2? Yes. - Also how about sharing the GICv2 coding between ARMv7 and ARMv8 - some of the code may seems like a duplication from the ARMv7 GICv2 content. Many codes could be shared between armv7 and armv8 such as cache maintenance and gic. These need be rearranged seriously. We'd better wait a period of time before the armv8 codes are more widely acquainted and get more feedback about this. I agree about the ARMv7/v8 code sharing, but with GICv3 there is an additional problem - it can be configured as GICv2 as well and for the same it would make sense to move common code b/w the CONFIG_GICV2/CONFIG_GICV3 code legs to a common leg. Yes, this need more considerations. Signed-off-by: David Feng feng...@phytium.com.cn --- arch/arm/cpu/armv8/gic.S | 84 - arch/arm/cpu/armv8/start.S|5 ++- arch/arm/include/asm/gic.h| 56 + include/configs/vexpress_aemv8a.h |7 4 files changed, 150 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/gic.S b/arch/arm/cpu/armv8/gic.S index 599aa8f..a08939a 100644 --- a/arch/arm/cpu/armv8/gic.S +++ b/arch/arm/cpu/armv8/gic.S @@ -23,6 +23,74
Re: [U-Boot] how to get u-boot code with arm64: core support
-Original Messages- From: tiger...@viatech.com.cn Sent Time: 2014-01-15 08:45:16 (Wednesday) To: scottw...@freescale.com, bhupesh.sha...@freescale.com Cc: feng...@phytium.com.cn, tr...@ti.com, u-boot@lists.denx.de Subject: Re: [U-Boot] how to get u-boot code with arm64: core support Hi, Scott: You need to use u-boot.elf, not the unrelocated u-boot. Thanks a lot! After changing to u-boot.elf, it could be run in FVP model. Best wishes, I make some supplement. Foundation Model use elf header to determine the entry point, so only support loading elf(or axf) images. Another way, gcc for aarch64 use rela relocation type and no initial value encoded in rela table. Thus, the file 'u-boot' contains wrong relocation information. Scott provided a few patches to deal with this problem. A tool named relocate-rela is provided to fix this problem and u-boot.elf is generated with correct relocation. So, only u-boot.elf could be used with Foundation model. Currently only gicv2 is supported. I will upload a gicv3 patch in these days. Best wishes, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v15 07/10] arm64: core support
hi bhupesh, Hi David, In reference to my mail above, I see that the transition to EL2 (from EL3) which occurs very early in start.S needs to be changed on lines of the ARMv7 code, i.e. the EL2 transition should happen just before Linux is booted up by the u-boot. The reason for the same is that a no of ARM IPs like GIC, SMMU and TZPC/TZASC need to be configured to allow non-secure accesses from Linux world (which runs in EL1 mode). Adding the assembly code for all such IPs in 'setup_el3' function in start.S, will bloat the start.S and also increase the chances of a bug in the assembly code. Hence, I would like to propose a strategy to shift from EL3 to EL2 to some point in u-boot code after the C Run Time has been initialized (similar to present ARMv7 u-boot code). If you are ok with the same, I can try to send out some RFC patches rebased against your latest v16 code-base. Please let me know. Regards, Bhupesh Actually, patch v16 did exception level switch in the way as you said. please review the code. Both master and slaves switch to el2(el1) just before jumping to linux kernel. BTW,if any good conception please feel free to patch it. Best wishes, David ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] how to get u-boot code with arm64: core support
hi Tiger, Sorry! It's a little late. Albert has merged arm64 patch set. I have tested and it works fine on Foundation Model. So, you could get it from git tree of u-boot-arm branch. Regards, David Hi, fenghua: How to get u-boot code with arch/arm/cpu/armv8 directory? I used git://www.denx.de/git/u-boot.git to get latest code, but not find armv8 dir. Best wishes, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v16 02/10] cmd_pxe: remove compiling warnings
On Sat, Dec 14, 2013 at 9:17 AM, feng...@phytium.com.cn wrote:
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/cmd_pxe.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index db6b156..c27ec35 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -59,7 +59,7 @@ static int format_mac_pxe(char *outbuf, size_t outbuf_len)
uchar ethaddr[6];
if (outbuf_len 21) {
- printf(outbuf is too small (%d 21)\n, outbuf_len);
+ printf(outbuf is too small (%zd 21)\n, outbuf_len);
return -EINVAL;
}
@@ -103,7 +103,7 @@ static int get_bootfile_path(const char *file_path,
char *bootfile_path,
path_len = (last_slash - bootfile) + 1;
if (bootfile_path_size path_len) {
- printf(bootfile_path too small. (%d %d)\n,
+ printf(bootfile_path too small. (%zd %zd)\n,
bootfile_path_size, path_len);
CHECK: Alignment should match open parenthesis
#40: FILE: common/cmd_pxe.c:107:
+printf(bootfile_path too small. (%zd %zd)\n,
bootfile_path_size, path_len);
Yes, this should be fixed. I only replace %d with %z and did not notice the
alignment.
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[U-Boot] [PATCH v16 01/10] fdt_support: 64bit initrd start address support
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/fdt_support.c | 66 ++
1 file changed, 34 insertions(+), 32 deletions(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 1f0d8f5..a3f7442 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -21,6 +21,34 @@
*/
DECLARE_GLOBAL_DATA_PTR;
+/*
+ * Get cells len in bytes
+ * if #-cells property is 2 then len is 8
+ * otherwise len is 4
+ */
+static int get_cells_len(void *blob, char *nr_cells_name)
+{
+ const fdt32_t *cell;
+
+ cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
+ if (cell fdt32_to_cpu(*cell) == 2)
+ return 8;
+
+ return 4;
+}
+
+/*
+ * Write a 4 or 8 byte big endian cell
+ */
+static void write_cell(u8 *addr, u64 val, int size)
+{
+ int shift = (size - 1) * 8;
+ while (size-- 0) {
+ *addr++ = (val shift) 0xff;
+ shift -= 8;
+ }
+}
+
/**
* fdt_getprop_u32_default - Find a node and return it's property or a default
*
@@ -131,9 +159,9 @@ static int fdt_fixup_stdout(void *fdt, int chosenoff)
int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int force)
{
- int nodeoffset;
+ int nodeoffset, addr_cell_len;
int err, j, total;
- fdt32_t tmp;
+ fdt64_t tmp;
const char *path;
uint64_t addr, size;
@@ -170,9 +198,11 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong
initrd_end, int force)
return err;
}
+ addr_cell_len = get_cells_len(fdt, #address-cells);
+
path = fdt_getprop(fdt, nodeoffset, linux,initrd-start, NULL);
if ((path == NULL) || force) {
- tmp = cpu_to_fdt32(initrd_start);
+ write_cell((u8 *)tmp, initrd_start, addr_cell_len);
err = fdt_setprop(fdt, nodeoffset,
linux,initrd-start, tmp, sizeof(tmp));
if (err 0) {
@@ -181,7 +211,7 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong
initrd_end, int force)
fdt_strerror(err));
return err;
}
- tmp = cpu_to_fdt32(initrd_end);
+ write_cell((u8 *)tmp, initrd_end, addr_cell_len);
err = fdt_setprop(fdt, nodeoffset,
linux,initrd-end, tmp, sizeof(tmp));
if (err 0) {
@@ -343,34 +373,6 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat,
do_fixup_by_compat(fdt, compat, prop, tmp, 4, create);
}
-/*
- * Get cells len in bytes
- * if #-cells property is 2 then len is 8
- * otherwise len is 4
- */
-static int get_cells_len(void *blob, char *nr_cells_name)
-{
- const fdt32_t *cell;
-
- cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
- if (cell fdt32_to_cpu(*cell) == 2)
- return 8;
-
- return 4;
-}
-
-/*
- * Write a 4 or 8 byte big endian cell
- */
-static void write_cell(u8 *addr, u64 val, int size)
-{
- int shift = (size - 1) * 8;
- while (size-- 0) {
- *addr++ = (val shift) 0xff;
- shift -= 8;
- }
-}
-
#ifdef CONFIG_NR_DRAM_BANKS
#define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS
#else
--
1.7.9.5
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[U-Boot] [PATCH v16 02/10] cmd_pxe: remove compiling warnings
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/cmd_pxe.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index db6b156..c27ec35 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -59,7 +59,7 @@ static int format_mac_pxe(char *outbuf, size_t outbuf_len)
uchar ethaddr[6];
if (outbuf_len 21) {
- printf(outbuf is too small (%d 21)\n, outbuf_len);
+ printf(outbuf is too small (%zd 21)\n, outbuf_len);
return -EINVAL;
}
@@ -103,7 +103,7 @@ static int get_bootfile_path(const char *file_path, char
*bootfile_path,
path_len = (last_slash - bootfile) + 1;
if (bootfile_path_size path_len) {
- printf(bootfile_path too small. (%d %d)\n,
+ printf(bootfile_path too small. (%zd %zd)\n,
bootfile_path_size, path_len);
return -1;
--
1.7.9.5
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[U-Boot] [PATCH v16 05/10] arm64: Turn u-boot.bin back into an ELF file after relocate-rela
From: Scott Wood scottw...@freescale.com While performing relocations on u-boot.bin should be good enough for booting on real hardware, some simulators insist on booting an ELF file (and yet don't perform ELF relocations), so convert the relocated binary back into an ELF file. This can go away in the future if we change relocate-rela to operate directly on the ELF file, or if and when we stop caring about a simulator with this restriction. Signed-off-by: Scott Wood scottw...@freescale.com Signed-off-by: David Feng feng...@phytium.com.cn --- Makefile | 13 + 1 file changed, 13 insertions(+) diff --git a/Makefile b/Makefile index 4a8e8c5..861f31e 100644 --- a/Makefile +++ b/Makefile @@ -358,6 +358,7 @@ ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin ifneq ($(CONFIG_SPL_TARGET),) ALL-$(CONFIG_SPL) += $(obj)$(subst ,,$(CONFIG_SPL_TARGET)) endif +ALL-$(CONFIG_REMAKE_ELF) += $(obj)u-boot.elf # enable combined SPL/u-boot/dtb rules for tegra ifneq ($(CONFIG_TEGRA),) @@ -526,6 +527,18 @@ $(obj)u-boot-img-spl-at-end.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img conv=notrunc 2/dev/null cat $(obj)u-boot-pad.img $(obj)spl/u-boot-spl.bin $@ +# Create a new ELF from a raw binary file. This is useful for arm64 +# where static relocation needs to be performed on the raw binary, +# but certain simulators only accept an ELF file (but don't do the +# relocation). +# FIXME refactor dts/Makefile to share target/arch detection +$(obj)u-boot.elf: $(obj)u-boot.bin + @$(OBJCOPY) -B aarch64 -I binary -O elf64-littleaarch64 \ + $ $(obj)u-boot-elf.o + @$(LD) $(obj)u-boot-elf.o -o $@ \ + --defsym=_start=$(CONFIG_SYS_TEXT_BASE) \ + -Ttext=$(CONFIG_SYS_TEXT_BASE) + ifeq ($(CONFIG_SANDBOX),y) GEN_UBOOT = \ cd $(LNDIR) $(CC) $(SYMS) -T $(obj)u-boot.lds \ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v16 00/10] arm64 patch
From: David Feng feng...@phytium.com.cn Changes for v16: - make the patches work with latest recently u-boot. add rela relocation type to OBJCFLAGS definition at arm/config.mk. Changes for v15: - modify boot process, u-boot will run at the highest exception level until it prepare jump to OS. - Fix a few bugs in cache.S.These bug is reported by York Sun york...@freescale.com and Scott Wood scottw...@freescale.com. - when booting, slaves will wait on WFI, master wakeup slaves by SGI interrupt. - add generic_timer.c to utilize the newest timer architecture. - add gic.S to support gic initialization and interrupt operations, currently only support GICv2. Changes for v14: - Merge rela relocation patches from Scott Wood scottw...@freescale.com. - Remove all CONFIG_NEED_MANUAL_RELOC and other fixups due to manual relocation. With rela relocation patches them are not needed. - Fix the bug of MEMORY_ATTRIBUTES definition due to assembler. That need put brackets around (MT_NORMAL*8). Otherwise the result is wrong.This bug is reported by York Sun york...@freescale.com. - -msoft-float is not supported by aarch64-gcc, make a test though $(call cc-option,-msoft-float). - Adjust the virtual address space to 42 bits. - Filter armv8 boards from LIST_arm in MAKEALL. - remove gpio.h in asm/arch-armv8/ and move mmu.h to asm/armv8/ directory. - remove vexpress64.dts from this patch, it could be accessed from linux kernel. Changes for v13: - fix the bug of board_r.c and arm/lib/board.c due to CONFIG_NEED_MANUAL_RELOC. adjust initr_serial() in board_r.c to the first entry of init_sequence_r[] and relocate serial_initialize() in arm/lib/board.c, routines of serial_device should be relocated firstly by serial_initialize(), so that printf access the correct puts function, otherwise uninitialized serial_current will be selected as the output device. - fix the bug of dcache_enable(). after mmu_setup the sctrl register value should be fetched again because it has been modifed by mmu_seup() function. This bug is reported by York Sun york...@freescale.com. - add macro branch_if_slave to macro.h, it choose processor with all zero affinity value as the master and is used in start.S. Changes for v12: - custom the patches to new format boards.cfg. Changes for v11: - Replace CONFIG_ARMV8 with CONFIG_ARM64. Currently, it's hard to distinguish what is armv8 specific and what is aarch64 specific, so we use CONFIG_ARM64 only, no CONFIG_ARMV8 used. - rename README.armv8 with README.arm64 and make some modification. Changes for v10: - add weak definition to include/linux/linkage.h and make setup_el2/setup_el3/lowlevel_init weak routines, so them can be easily overridden by processor specific code. - modify s-o-f of 0002-board-support-of-vexpress_aemv8a which use wrong mail address of Bhupesh Sharma. Changes for v9: - add Signed-off-by information to patch board support of vexpress_aemv8a which SMC9 support is integrated from Sharma Bhupesh's patch. - adjust pt_regs struct and add exception state preservation in exception.S. Changes for v8: - Integrate SMC9 patch of sharma bhupesh. - remove v8_outer_cache* which is not need currently. - Change license tag. - Mov crt0.S/relocate.S/interrupts.c to arm/lib and rename them with _64 suffix. - Make el3/el2 initializing process of start.S as two separate routines. It could be easier to be replaced with processor specific codes. - Remove exception stack save and restore routine, it is unnecessary now. - simplify __weak function declaration. Changes for v7: - Check the patches with checkpatch.pl and get rid of almost all warnings. There are a few warnings still, but I think it should be that. - change printf format in cmd_pxe.c, use %zd indtead of %ld to format size_t type variable. - add macro PGTABLE_SIZE to identify tlb table size. Changes for v6: - Make modification to inappropriate licensed file and bugs according to ScottWood's advice. Thanks Scott for his checking to these patches. - Enable u-boot's running at EL1. - Get rid of compiling warnings originated from cmd_pxe.c. Changes for v5: - fix the generic board_f.c, remove zero_global_data from init_sequence_f array and move it to board_init_f() function with CONFIG_X86 switch. The previous fixup is inaccurate. - Replace __ARMEB__ with __AARCH64EB__ in byteorder.h and unaligned.h, gcc for aarch64 use __AARCH64EB__ and __AARCH64EL__ to identify endian. - Some modification to README.armv8 Changes for v4: - merge arm64 to arm architecture. David Feng (10): fdt_support: 64bit initrd start address support cmd_pxe: remove compiling warnings add weak entry definition arm64: Add tool to statically apply RELA relocations arm64: Turn u-boot.bin back into
[U-Boot] [PATCH v16 08/10] arm64: generic board support
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/board_f.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index f0664bc..d918e4b 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -462,7 +462,7 @@ static int reserve_round_4k(void)
static int reserve_mmu(void)
{
/* reserve TLB table */
- gd-arch.tlb_size = 4096 * 4;
+ gd-arch.tlb_size = PGTABLE_SIZE;
gd-relocaddr -= gd-arch.tlb_size;
/* round down to next 64 kB limit */
@@ -614,7 +614,7 @@ static int reserve_stacks(void)
* TODO(s...@chromium.org): Perhaps create arch_reserve_stack()
* to handle this and put in arch/xxx/lib/stack.c
*/
-# ifdef CONFIG_ARM
+# if defined(CONFIG_ARM) !defined(CONFIG_ARM64)
# ifdef CONFIG_USE_IRQ
gd-start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
debug(Reserving %zu Bytes for IRQ stack at: %08lx\n,
@@ -811,11 +811,6 @@ static int mark_bootstage(void)
}
static init_fnc_t init_sequence_f[] = {
-#if !defined(CONFIG_CPM2) !defined(CONFIG_MPC512X) \
- !defined(CONFIG_MPC83xx) !defined(CONFIG_MPC85xx) \
- !defined(CONFIG_MPC86xx) !defined(CONFIG_X86)
- zero_global_data,
-#endif
#ifdef CONFIG_SANDBOX
setup_ram_buf,
#endif
@@ -1009,6 +1004,17 @@ void board_init_f(ulong boot_flags)
gd = data;
#endif
+ /*
+* Clear global data before it is accessed at debug print
+* in initcall_run_list. Otherwise the debug print probably
+* get the wrong vaule of gd-have_console.
+*/
+#if !defined(CONFIG_CPM2) !defined(CONFIG_MPC512X) \
+ !defined(CONFIG_MPC83xx) !defined(CONFIG_MPC85xx) \
+ !defined(CONFIG_MPC86xx) !defined(CONFIG_X86)
+ zero_global_data();
+#endif
+
gd-flags = boot_flags;
if (initcall_run_list(init_sequence_f))
--
1.7.9.5
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[U-Boot] [PATCH v16 04/10] arm64: Add tool to statically apply RELA relocations
From: Scott Wood scottw...@freescale.com
ARM64 uses the newer RELA-style relocations rather than the older REL.
RELA relocations have an addend in the relocation struct, rather than
expecting the loader to read a value from the location to be updated.
While this is beneficial for ordinary program loading, it's problematic
for U-Boot because the location to be updated starts out with zero,
rather than a pre-relocation value. Since we need to be able to run C
code before relocation, we need a tool to apply the relocations at
build time.
In theory this tool is applicable to other newer architectures (mainly
64-bit), but currently the only relocations it supports are for arm64,
and it assumes a 64-bit little-endian target. If the latter limitation
is ever to be changed, we'll need a way to tell the tool what format
the image is in. Eventually this may be replaced by a tool that uses
libelf or similar and operates directly on the ELF file. I've written
some code for such an approach but libelf does not make it easy to poke
addresses by memory address (rather than by section), and I was
hesitant to write code to manually parse the program headers and do the
update outside of libelf (or to iterate over sections) -- especially
since it wouldn't get test coverage on things like binaries with
multiple PT_LOAD segments. This should be good enough for now to let
the manual relocation stuff be removed from the arm64 patches.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: David Feng feng...@phytium.com.cn
---
Makefile | 12
tools/Makefile|6 ++
tools/relocate-rela.c | 189 +
3 files changed, 207 insertions(+)
create mode 100644 tools/relocate-rela.c
diff --git a/Makefile b/Makefile
index 7310c4e..4a8e8c5 100644
--- a/Makefile
+++ b/Makefile
@@ -334,6 +334,17 @@ else
BOARD_SIZE_CHECK =
endif
+# Statically apply RELA-style relocations (currently arm64 only)
+ifneq ($(CONFIG_STATIC_RELA),)
+# $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base
+DO_STATIC_RELA = \
+ start=$$($(NM) $(1) | grep __rel_dyn_start | cut -f 1 -d ' '); \
+ end=$$($(NM) $(1) | grep __rel_dyn_end | cut -f 1 -d ' '); \
+ $(obj)tools/relocate-rela $(2) $(3) $$start $$end
+else
+DO_STATIC_RELA =
+endif
+
# Always append ALL so that arch config.mk's can add custom ones
ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
@@ -376,6 +387,7 @@ $(obj)u-boot.srec: $(obj)u-boot
$(obj)u-boot.bin: $(obj)u-boot
$(OBJCOPY) ${OBJCFLAGS} -O binary $ $@
+ $(call DO_STATIC_RELA,$,$@,$(CONFIG_SYS_TEXT_BASE))
$(BOARD_SIZE_CHECK)
$(obj)u-boot.ldr: $(obj)u-boot
diff --git a/tools/Makefile b/tools/Makefile
index 14d94e3..6d40398 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -59,6 +59,7 @@ BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX)
BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
BIN_FILES-$(CONFIG_KIRKWOOD) += kwboot$(SFX)
BIN_FILES-y += proftool(SFX)
+BIN_FILES-$(CONFIG_STATIC_RELA) += relocate-rela$(SFX)
# Source files which exist outside the tools directory
EXT_OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += common/env_embedded.o
@@ -84,6 +85,7 @@ NOPED_OBJ_FILES-y += os_support.o
NOPED_OBJ_FILES-y += pblimage.o
NOPED_OBJ_FILES-y += proftool.o
NOPED_OBJ_FILES-y += ublimage.o
+NOPED_OBJ_FILES-y += relocate-rela.o
OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += envcrc.o
OBJ_FILES-$(CONFIG_CMD_LOADS) += img2srec.o
OBJ_FILES-$(CONFIG_CMD_NET) += gen_eth_addr.o
@@ -250,6 +252,10 @@ $(obj)kwboot$(SFX): $(obj)kwboot.o
$(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^
$(HOSTSTRIP) $@
+$(obj)relocate-rela$(SFX): $(obj)relocate-rela.o
+ $(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^
+ $(HOSTSTRIP) $@
+
# Some of the tool objects need to be accessed from outside the tools directory
$(obj)%.o: $(SRCTREE)/common/%.c
$(HOSTCC) -g $(HOSTCFLAGS_NOPED) -c -o $@ $
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c
new file mode 100644
index 000..93b4c39
--- /dev/null
+++ b/tools/relocate-rela.c
@@ -0,0 +1,189 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+ BSD-2-Clause
+ *
+ * 64-bit and little-endian target only until we need to support a different
+ * arch that needs this.
+ */
+
+#include elf.h
+#include errno.h
+#include inttypes.h
+#include stdarg.h
+#include stdbool.h
+#include stdio.h
+#include stdlib.h
+#include string.h
+
+#ifndef R_AARCH64_RELATIVE
+#define R_AARCH64_RELATIVE 1027
+#endif
+
+static const bool debug_en;
+
+static void debug(const char *fmt, ...)
+{
+ va_list args;
+
+ va_start(args, fmt);
+ if (debug_en)
+ vprintf(fmt, args);
+}
+
+static bool supported_rela(Elf64_Rela *rela)
+{
+ uint64_t mask = 0xULL; /* would be different on 32-bit */
+ uint32_t type = rela-r_info mask;
+
+ switch
[U-Boot] [PATCH v16 10/10] arm64: MAKEALL, filter armv8 boards from LIST_arm
From: David Feng feng...@phytium.com.cn Signed-off-by: David Feng feng...@phytium.com.cn --- MAKEALL | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/MAKEALL b/MAKEALL index a74f0fc..562071a 100755 --- a/MAKEALL +++ b/MAKEALL @@ -381,6 +381,12 @@ LIST_ARM11=$(targets_by_cpu arm1136) \ LIST_ARMV7=$(targets_by_cpu armv7) # +## ARMV8 Systems +# + +LIST_ARMV8=$(targets_by_cpu armv8) + +# ## AT91 Systems # @@ -404,7 +410,11 @@ LIST_spear=$(targets_by_soc spear) ## ARM groups # -LIST_arm=$(targets_by_arch arm) +LIST_arm=$(targets_by_arch arm | \ + for ARMV8_TARGET in $LIST_ARMV8;\ + do sed /$ARMV8_TARGET/d; \ + done) \ + # ## MIPS Systems(default = big endian) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v16 09/10] arm64: board support of vexpress_aemv8a
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com
---
board/armltd/vexpress64/Makefile |8 ++
board/armltd/vexpress64/vexpress64.c | 56 ++
boards.cfg |1 +
include/configs/vexpress_aemv8a.h| 189 ++
4 files changed, 254 insertions(+)
create mode 100644 board/armltd/vexpress64/Makefile
create mode 100644 board/armltd/vexpress64/vexpress64.c
create mode 100644 include/configs/vexpress_aemv8a.h
diff --git a/board/armltd/vexpress64/Makefile b/board/armltd/vexpress64/Makefile
new file mode 100644
index 000..e009141
--- /dev/null
+++ b/board/armltd/vexpress64/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := vexpress64.o
diff --git a/board/armltd/vexpress64/vexpress64.c
b/board/armltd/vexpress64/vexpress64.c
new file mode 100644
index 000..2ec3bc9
--- /dev/null
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2013
+ * David Feng feng...@phytium.com.cn
+ * Sharma Bhupesh bhupesh.sha...@freescale.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include common.h
+#include malloc.h
+#include errno.h
+#include netdev.h
+#include asm/io.h
+#include linux/compiler.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ /*
+* Clear spin table so that secondary processors
+* observe the correct value after waken up from wfe.
+*/
+ *(unsigned long *)CPU_RELEASE_ADDR = 0;
+
+ gd-ram_size = PHYS_SDRAM_1_SIZE;
+ return 0;
+}
+
+int timer_init(void)
+{
+ return 0;
+}
+
+/*
+ * Board specific reset that is system reset.
+ */
+void reset_cpu(ulong addr)
+{
+}
+
+/*
+ * Board specific ethernet initialization routine.
+ */
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC9
+ rc = smc9_initialize(0, CONFIG_SMC9_BASE);
+#endif
+ return rc;
+}
diff --git a/boards.cfg b/boards.cfg
index b662149..7572f88 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -395,6 +395,7 @@ Active arm pxa- -
vpac270
Active arm pxa- icpdas lp8x4x
lp8x4x -
Sergey Yanovich ynv...@gmail.com
Active arm pxa- toradex -
colibri_pxa270 -
Marek Vasut marek.va...@gmail.com
Active arm sa1100 - - -
jornada -
Kristoffer Ericson kristoffer.eric...@gmail.com
+Active arm armv8 - armltd vexpress64
vexpress_aemv8a vexpress_aemv8a:ARM64
David Feng feng...@phytium.com.cn
Active avr32 at32ap at32ap700x atmel -
atngw100 -
Haavard Skinnemoen haavard.skinnem...@atmel.com
Active avr32 at32ap at32ap700x atmel -
atngw100mkii -
Andreas Bießmann andreas.de...@googlemail.com
Active avr32 at32ap at32ap700x atmel atstk1000
atstk1002-
Haavard Skinnemoen haavard.skinnem...@atmel.com
diff --git a/include/configs/vexpress_aemv8a.h
b/include/configs/vexpress_aemv8a.h
new file mode 100644
index 000..ce5f384
--- /dev/null
+++ b/include/configs/vexpress_aemv8a.h
@@ -0,0 +1,189 @@
+/*
+ * Configuration for Versatile Express. Parts were derived from other ARM
+ * configurations.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __VEXPRESS_AEMV8A_H
+#define __VEXPRESS_AEMV8A_H
+
+#define DEBUG
+
+#define CONFIG_REMAKE_ELF
+
+/*#define CONFIG_ARMV8_SWITCH_TO_EL1*/
+
+/*#define CONFIG_SYS_GENERIC_BOARD*/
+
+#define CONFIG_SYS_NO_FLASH
+
[U-Boot] [PATCH v16 06/10] arm64: Make checkarmreloc accept arm64 relocations
From: Scott Wood scottw...@freescale.com Signed-off-by: Scott Wood scottw...@freescale.com Signed-off-by: David Feng feng...@phytium.com.cn --- Makefile | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/Makefile b/Makefile index 861f31e..e331d35 100644 --- a/Makefile +++ b/Makefile @@ -742,12 +742,16 @@ tools: $(VERSION_FILE) $(TIMESTAMP_FILE) $(MAKE) -C $@ all endif # config.mk -# ARM relocations should all be R_ARM_RELATIVE. +# ARM relocations should all be R_ARM_RELATIVE (32-bit) or +# R_AARCH64_RELATIVE (64-bit). checkarmreloc: $(obj)u-boot - @if test R_ARM_RELATIVE != \ - `$(CROSS_COMPILE)readelf -r $ | cut -d ' ' -f 4 | grep R_ARM | sort -u`; \ - then echo $ contains relocations other than \ - R_ARM_RELATIVE; false; fi + @RELOC=`$(CROSS_COMPILE)readelf -r -W $ | cut -d ' ' -f 4 | \ + grep R_A | sort -u`; \ + if test $$RELOC != R_ARM_RELATIVE -a \ +$$RELOC != R_AARCH64_RELATIVE; then \ + echo $ contains unexpected relocations: $$RELOC; \ + false; \ + fi $(VERSION_FILE): @mkdir -p $(dir $(VERSION_FILE)) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v16 03/10] add weak entry definition
From: David Feng feng...@phytium.com.cn Signed-off-by: David Feng feng...@phytium.com.cn --- include/linux/linkage.h |4 1 file changed, 4 insertions(+) diff --git a/include/linux/linkage.h b/include/linux/linkage.h index 39c712e..7435fcd 100644 --- a/include/linux/linkage.h +++ b/include/linux/linkage.h @@ -48,6 +48,10 @@ .globl SYMBOL_NAME(name); \ LENTRY(name) +#define WEAK(name) \ + .weak SYMBOL_NAME(name); \ + LENTRY(name) + #ifndef END #define END(name) \ .size name, .-name -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] why u-boot relocate it self to RAM from flash?
Hi, I can not understand why u-boot relocate it self to RAM from flash? Why is it not executing from flash? Can anybody explain. First, flash is slow. Second, there are many data structures or variables which should be writable. So, we should copy u-boot to RAM and relocate it. Regards ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Why u-boot relocate from flash to RAM
Hi, I can't understand that why u-boot code relocate itself form flash to RAM? why it doesn't execute from flash? Can anybody explain. Plz First, flash is slow. Second, there are many data structures or variables which should be writable. So, we should copy u-boot to RAM and relocate it. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v15 07/10] arm64: core support
hi Bhupesh,
Thank you for reviewing of the patch.
+/*
+ * Generic timer implementation of timer_read_counter()
+ */
+unsigned long timer_read_counter(void)
+{
+ unsigned long cntpct;
+ isb();
+ asm volatile(mrs %0, cntpct_el0 : =r (cntpct));
+ return cntpct;
+}
diff --git a/arch/arm/cpu/armv8/gic.S b/arch/arm/cpu/armv8/gic.S
The ARMv8 foundation model has support for GICv2 while GICv3 is actually
compatible to ARMv8. So although you mention in the cover letter that
this is currently GICv2 support, now while trying to add GICv3 support
it will be difficult to envision GICv2 code in 'arch/arm/cpu/armv8/'
directory.
Infact GICv2 is compatible with ARMv7 and as secure and non-secure
copies of GIC registers are equally applicable to ARMv7, would it make
sense to keep the GICv2 code at a place where both ARMv7 and ARMv8 can
use it?
Can we reuse something from [1] for GICv2:
[1]
http://git.denx.de/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/nonsec_virt.S;h=24b4c18bd452fa155bcd5ed94c755aa05a33efe7;hb=HEAD#l88
Gicv2 only support maximum 8 cores, but still could be used with armv8
processors if the processor
contains less than 8 cores. AMCC's armv8 processor use Gicv2.
Yes, as you said it would be better to abstract a few common routines of Gicv2
and Gicv3 code and place them
at a common place (such as arm/lib) so that both ARMv7 and ARMv8 could use it.
+ /* Cache/BPB/TLB Invalidate */
+ bl __asm_flush_dcache_all /* dCache cleaninvalidate */
+ bl __asm_invalidate_icache_all /* iCache invalidate */
+ bl __asm_invalidate_tlb_all/* invalidate TLBs */
+
+ /* Processor specific initialization */
+ bl lowlevel_init
Shouldn't this call be protected inside a
'#ifndef CONFIG_SKIP_LOWLEVEL_INIT'?
We could do so when it is actually needed.
+WEAK(lowlevel_init)
Ok, so this means that a specific SoC lowlevel_init implementation can
override this generic implementation. Because I sure other
secure/non-secure settings need to be put into place for ARM IPs like
SMMU-500.
+ENTRY(armv8_switch_to_el2)
Do we need a switch to Secure Monitor here? I am not able to relate how
this with the present ARMv7 code (see [2]):
[2]
http://git.denx.de/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/nonsec_virt.S;h=24b4c18bd452fa155bcd5ed94c755aa05a33efe7;hb=HEAD#l29
Armv8 processor reset at el3(if it support security extension). So we need to
switch the
processor to el2 or el1 before u-boot jump to linux kernel due to linux-aarch64
only
run at el2 or el1.
Regards,
David
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[U-Boot] [PATCH v15 02/10] cmd_pxe: remove compiling warnings
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/cmd_pxe.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index db6b156..c27ec35 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -59,7 +59,7 @@ static int format_mac_pxe(char *outbuf, size_t outbuf_len)
uchar ethaddr[6];
if (outbuf_len 21) {
- printf(outbuf is too small (%d 21)\n, outbuf_len);
+ printf(outbuf is too small (%zd 21)\n, outbuf_len);
return -EINVAL;
}
@@ -103,7 +103,7 @@ static int get_bootfile_path(const char *file_path, char
*bootfile_path,
path_len = (last_slash - bootfile) + 1;
if (bootfile_path_size path_len) {
- printf(bootfile_path too small. (%d %d)\n,
+ printf(bootfile_path too small. (%zd %zd)\n,
bootfile_path_size, path_len);
return -1;
--
1.7.9.5
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[U-Boot] [PATCH v15 00/10] arm64 patch
From: David Feng feng...@phytium.com.cn Changes for v15: - modify boot process, u-boot will run at the highest exception level until it prepare jump to OS. - Fix a few bugs in cache.S.These bug is reported by York Sun york...@freescale.com and Scott Wood scottw...@freescale.com. - when booting, slaves will wait on WFI, master wakeup slaves by SGI interrupt. - add generic_timer.c to utilize the newest timer architecture. - add gic.S to support gic initialization and interrupt operations, currently only support GICv2. Changes for v14: - Merge rela relocation patches from Scott Wood scottw...@freescale.com. - Remove all CONFIG_NEED_MANUAL_RELOC and other fixups due to manual relocation. With rela relocation patches them are not needed. - Fix the bug of MEMORY_ATTRIBUTES definition due to assembler. That need put brackets around (MT_NORMAL*8). Otherwise the result is wrong.This bug is reported by York Sun york...@freescale.com. - -msoft-float is not supported by aarch64-gcc, make a test though $(call cc-option,-msoft-float). - Adjust the virtual address space to 42 bits. - Filter armv8 boards from LIST_arm in MAKEALL. - remove gpio.h in asm/arch-armv8/ and move mmu.h to asm/armv8/ directory. - remove vexpress64.dts from this patch, it could be accessed from linux kernel. Changes for v13: - fix the bug of board_r.c and arm/lib/board.c due to CONFIG_NEED_MANUAL_RELOC. adjust initr_serial() in board_r.c to the first entry of init_sequence_r[] and relocate serial_initialize() in arm/lib/board.c, routines of serial_device should be relocated firstly by serial_initialize(), so that printf access the correct puts function, otherwise uninitialized serial_current will be selected as the output device. - fix the bug of dcache_enable(). after mmu_setup the sctrl register value should be fetched again because it has been modifed by mmu_seup() function. This bug is reported by York Sun york...@freescale.com. - add macro branch_if_slave to macro.h, it choose processor with all zero affinity value as the master and is used in start.S. Changes for v12: - custom the patches to new format boards.cfg. Changes for v11: - Replace CONFIG_ARMV8 with CONFIG_ARM64. Currently, it's hard to distinguish what is armv8 specific and what is aarch64 specific, so we use CONFIG_ARM64 only, no CONFIG_ARMV8 used. - rename README.armv8 with README.arm64 and make some modification. Changes for v10: - add weak definition to include/linux/linkage.h and make setup_el2/setup_el3/lowlevel_init weak routines, so them can be easily overridden by processor specific code. - modify s-o-f of 0002-board-support-of-vexpress_aemv8a which use wrong mail address of Bhupesh Sharma. Changes for v9: - add Signed-off-by information to patch board support of vexpress_aemv8a which SMC9 support is integrated from Sharma Bhupesh's patch. - adjust pt_regs struct and add exception state preservation in exception.S. Changes for v8: - Integrate SMC9 patch of sharma bhupesh. - remove v8_outer_cache* which is not need currently. - Change license tag. - Mov crt0.S/relocate.S/interrupts.c to arm/lib and rename them with _64 suffix. - Make el3/el2 initializing process of start.S as two separate routines. It could be easier to be replaced with processor specific codes. - Remove exception stack save and restore routine, it is unnecessary now. - simplify __weak function declaration. Changes for v7: - Check the patches with checkpatch.pl and get rid of almost all warnings. There are a few warnings still, but I think it should be that. - change printf format in cmd_pxe.c, use %zd indtead of %ld to format size_t type variable. - add macro PGTABLE_SIZE to identify tlb table size. Changes for v6: - Make modification to inappropriate licensed file and bugs according to ScottWood's advice. Thanks Scott for his checking to these patches. - Enable u-boot's running at EL1. - Get rid of compiling warnings originated from cmd_pxe.c. Changes for v5: - fix the generic board_f.c, remove zero_global_data from init_sequence_f array and move it to board_init_f() function with CONFIG_X86 switch. The previous fixup is inaccurate. - Replace __ARMEB__ with __AARCH64EB__ in byteorder.h and unaligned.h, gcc for aarch64 use __AARCH64EB__ and __AARCH64EL__ to identify endian. - Some modification to README.armv8 Changes for v4: - merge arm64 to arm architecture. David Feng (10): fdt_support: 64bit initrd start address support cmd_pxe: remove compiling warnings add weak entry definition arm64: Add tool to statically apply RELA relocations arm64: Turn u-boot.bin back into an ELF file after relocate-rela arm64: Make checkarmreloc accept arm64 relocations arm64: core support arm64: generic board support arm64:
[U-Boot] [PATCH v15 03/10] add weak entry definition
From: David Feng feng...@phytium.com.cn Signed-off-by: David Feng feng...@phytium.com.cn --- include/linux/linkage.h |4 1 file changed, 4 insertions(+) diff --git a/include/linux/linkage.h b/include/linux/linkage.h index 39c712e..7435fcd 100644 --- a/include/linux/linkage.h +++ b/include/linux/linkage.h @@ -48,6 +48,10 @@ .globl SYMBOL_NAME(name); \ LENTRY(name) +#define WEAK(name) \ + .weak SYMBOL_NAME(name); \ + LENTRY(name) + #ifndef END #define END(name) \ .size name, .-name -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v15 04/10] arm64: Add tool to statically apply RELA relocations
From: Scott Wood scottw...@freescale.com
ARM64 uses the newer RELA-style relocations rather than the older REL.
RELA relocations have an addend in the relocation struct, rather than
expecting the loader to read a value from the location to be updated.
While this is beneficial for ordinary program loading, it's problematic
for U-Boot because the location to be updated starts out with zero,
rather than a pre-relocation value. Since we need to be able to run C
code before relocation, we need a tool to apply the relocations at
build time.
In theory this tool is applicable to other newer architectures (mainly
64-bit), but currently the only relocations it supports are for arm64,
and it assumes a 64-bit little-endian target. If the latter limitation
is ever to be changed, we'll need a way to tell the tool what format
the image is in. Eventually this may be replaced by a tool that uses
libelf or similar and operates directly on the ELF file. I've written
some code for such an approach but libelf does not make it easy to poke
addresses by memory address (rather than by section), and I was
hesitant to write code to manually parse the program headers and do the
update outside of libelf (or to iterate over sections) -- especially
since it wouldn't get test coverage on things like binaries with
multiple PT_LOAD segments. This should be good enough for now to let
the manual relocation stuff be removed from the arm64 patches.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: David Feng feng...@phytium.com.cn
---
Makefile | 12
tools/Makefile|6 ++
tools/relocate-rela.c | 189 +
3 files changed, 207 insertions(+)
create mode 100644 tools/relocate-rela.c
diff --git a/Makefile b/Makefile
index 1f499c5..1dbe796 100644
--- a/Makefile
+++ b/Makefile
@@ -355,6 +355,17 @@ else
BOARD_SIZE_CHECK =
endif
+# Statically apply RELA-style relocations (currently arm64 only)
+ifneq ($(CONFIG_STATIC_RELA),)
+# $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base
+DO_STATIC_RELA = \
+ start=$$($(NM) $(1) | grep __rel_dyn_start | cut -f 1 -d ' '); \
+ end=$$($(NM) $(1) | grep __rel_dyn_end | cut -f 1 -d ' '); \
+ $(obj)tools/relocate-rela $(2) $(3) $$start $$end
+else
+DO_STATIC_RELA =
+endif
+
# Always append ALL so that arch config.mk's can add custom ones
ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
@@ -397,6 +408,7 @@ $(obj)u-boot.srec: $(obj)u-boot
$(obj)u-boot.bin: $(obj)u-boot
$(OBJCOPY) ${OBJCFLAGS} -O binary $ $@
+ $(call DO_STATIC_RELA,$,$@,$(CONFIG_SYS_TEXT_BASE))
$(BOARD_SIZE_CHECK)
$(obj)u-boot.ldr: $(obj)u-boot
diff --git a/tools/Makefile b/tools/Makefile
index 14d94e3..6d40398 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -59,6 +59,7 @@ BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX)
BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
BIN_FILES-$(CONFIG_KIRKWOOD) += kwboot$(SFX)
BIN_FILES-y += proftool(SFX)
+BIN_FILES-$(CONFIG_STATIC_RELA) += relocate-rela$(SFX)
# Source files which exist outside the tools directory
EXT_OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += common/env_embedded.o
@@ -84,6 +85,7 @@ NOPED_OBJ_FILES-y += os_support.o
NOPED_OBJ_FILES-y += pblimage.o
NOPED_OBJ_FILES-y += proftool.o
NOPED_OBJ_FILES-y += ublimage.o
+NOPED_OBJ_FILES-y += relocate-rela.o
OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += envcrc.o
OBJ_FILES-$(CONFIG_CMD_LOADS) += img2srec.o
OBJ_FILES-$(CONFIG_CMD_NET) += gen_eth_addr.o
@@ -250,6 +252,10 @@ $(obj)kwboot$(SFX): $(obj)kwboot.o
$(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^
$(HOSTSTRIP) $@
+$(obj)relocate-rela$(SFX): $(obj)relocate-rela.o
+ $(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^
+ $(HOSTSTRIP) $@
+
# Some of the tool objects need to be accessed from outside the tools directory
$(obj)%.o: $(SRCTREE)/common/%.c
$(HOSTCC) -g $(HOSTCFLAGS_NOPED) -c -o $@ $
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c
new file mode 100644
index 000..93b4c39
--- /dev/null
+++ b/tools/relocate-rela.c
@@ -0,0 +1,189 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+ BSD-2-Clause
+ *
+ * 64-bit and little-endian target only until we need to support a different
+ * arch that needs this.
+ */
+
+#include elf.h
+#include errno.h
+#include inttypes.h
+#include stdarg.h
+#include stdbool.h
+#include stdio.h
+#include stdlib.h
+#include string.h
+
+#ifndef R_AARCH64_RELATIVE
+#define R_AARCH64_RELATIVE 1027
+#endif
+
+static const bool debug_en;
+
+static void debug(const char *fmt, ...)
+{
+ va_list args;
+
+ va_start(args, fmt);
+ if (debug_en)
+ vprintf(fmt, args);
+}
+
+static bool supported_rela(Elf64_Rela *rela)
+{
+ uint64_t mask = 0xULL; /* would be different on 32-bit */
+ uint32_t type = rela-r_info mask;
+
+ switch
[U-Boot] [PATCH v15 01/10] fdt_support: 64bit initrd start address support
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/fdt_support.c | 66 ++
1 file changed, 34 insertions(+), 32 deletions(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 1f0d8f5..a3f7442 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -21,6 +21,34 @@
*/
DECLARE_GLOBAL_DATA_PTR;
+/*
+ * Get cells len in bytes
+ * if #-cells property is 2 then len is 8
+ * otherwise len is 4
+ */
+static int get_cells_len(void *blob, char *nr_cells_name)
+{
+ const fdt32_t *cell;
+
+ cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
+ if (cell fdt32_to_cpu(*cell) == 2)
+ return 8;
+
+ return 4;
+}
+
+/*
+ * Write a 4 or 8 byte big endian cell
+ */
+static void write_cell(u8 *addr, u64 val, int size)
+{
+ int shift = (size - 1) * 8;
+ while (size-- 0) {
+ *addr++ = (val shift) 0xff;
+ shift -= 8;
+ }
+}
+
/**
* fdt_getprop_u32_default - Find a node and return it's property or a default
*
@@ -131,9 +159,9 @@ static int fdt_fixup_stdout(void *fdt, int chosenoff)
int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int force)
{
- int nodeoffset;
+ int nodeoffset, addr_cell_len;
int err, j, total;
- fdt32_t tmp;
+ fdt64_t tmp;
const char *path;
uint64_t addr, size;
@@ -170,9 +198,11 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong
initrd_end, int force)
return err;
}
+ addr_cell_len = get_cells_len(fdt, #address-cells);
+
path = fdt_getprop(fdt, nodeoffset, linux,initrd-start, NULL);
if ((path == NULL) || force) {
- tmp = cpu_to_fdt32(initrd_start);
+ write_cell((u8 *)tmp, initrd_start, addr_cell_len);
err = fdt_setprop(fdt, nodeoffset,
linux,initrd-start, tmp, sizeof(tmp));
if (err 0) {
@@ -181,7 +211,7 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong
initrd_end, int force)
fdt_strerror(err));
return err;
}
- tmp = cpu_to_fdt32(initrd_end);
+ write_cell((u8 *)tmp, initrd_end, addr_cell_len);
err = fdt_setprop(fdt, nodeoffset,
linux,initrd-end, tmp, sizeof(tmp));
if (err 0) {
@@ -343,34 +373,6 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat,
do_fixup_by_compat(fdt, compat, prop, tmp, 4, create);
}
-/*
- * Get cells len in bytes
- * if #-cells property is 2 then len is 8
- * otherwise len is 4
- */
-static int get_cells_len(void *blob, char *nr_cells_name)
-{
- const fdt32_t *cell;
-
- cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
- if (cell fdt32_to_cpu(*cell) == 2)
- return 8;
-
- return 4;
-}
-
-/*
- * Write a 4 or 8 byte big endian cell
- */
-static void write_cell(u8 *addr, u64 val, int size)
-{
- int shift = (size - 1) * 8;
- while (size-- 0) {
- *addr++ = (val shift) 0xff;
- shift -= 8;
- }
-}
-
#ifdef CONFIG_NR_DRAM_BANKS
#define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS
#else
--
1.7.9.5
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[U-Boot] [PATCH v15 05/10] arm64: Turn u-boot.bin back into an ELF file after relocate-rela
From: Scott Wood scottw...@freescale.com While performing relocations on u-boot.bin should be good enough for booting on real hardware, some simulators insist on booting an ELF file (and yet don't perform ELF relocations), so convert the relocated binary back into an ELF file. This can go away in the future if we change relocate-rela to operate directly on the ELF file, or if and when we stop caring about a simulator with this restriction. Signed-off-by: Scott Wood scottw...@freescale.com Signed-off-by: David Feng feng...@phytium.com.cn --- Makefile | 13 + 1 file changed, 13 insertions(+) diff --git a/Makefile b/Makefile index 1dbe796..44546ff 100644 --- a/Makefile +++ b/Makefile @@ -379,6 +379,7 @@ ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin ifneq ($(CONFIG_SPL_TARGET),) ALL-$(CONFIG_SPL) += $(obj)$(subst ,,$(CONFIG_SPL_TARGET)) endif +ALL-$(CONFIG_REMAKE_ELF) += $(obj)u-boot.elf # enable combined SPL/u-boot/dtb rules for tegra ifneq ($(CONFIG_TEGRA),) @@ -547,6 +548,18 @@ $(obj)u-boot-img-spl-at-end.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img conv=notrunc 2/dev/null cat $(obj)u-boot-pad.img $(obj)spl/u-boot-spl.bin $@ +# Create a new ELF from a raw binary file. This is useful for arm64 +# where static relocation needs to be performed on the raw binary, +# but certain simulators only accept an ELF file (but don't do the +# relocation). +# FIXME refactor dts/Makefile to share target/arch detection +$(obj)u-boot.elf: $(obj)u-boot.bin + @$(OBJCOPY) -B aarch64 -I binary -O elf64-littleaarch64 \ + $ $(obj)u-boot-elf.o + @$(LD) $(obj)u-boot-elf.o -o $@ \ + --defsym=_start=$(CONFIG_SYS_TEXT_BASE) \ + -Ttext=$(CONFIG_SYS_TEXT_BASE) + ifeq ($(CONFIG_SANDBOX),y) GEN_UBOOT = \ cd $(LNDIR) $(CC) $(SYMS) -T $(obj)u-boot.lds \ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v15 06/10] arm64: Make checkarmreloc accept arm64 relocations
From: Scott Wood scottw...@freescale.com Signed-off-by: Scott Wood scottw...@freescale.com Signed-off-by: David Feng feng...@phytium.com.cn --- Makefile | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/Makefile b/Makefile index 44546ff..01e1268 100644 --- a/Makefile +++ b/Makefile @@ -771,12 +771,16 @@ tools: $(VERSION_FILE) $(TIMESTAMP_FILE) $(MAKE) -C $@ all endif # config.mk -# ARM relocations should all be R_ARM_RELATIVE. +# ARM relocations should all be R_ARM_RELATIVE (32-bit) or +# R_AARCH64_RELATIVE (64-bit). checkarmreloc: $(obj)u-boot - @if test R_ARM_RELATIVE != \ - `$(CROSS_COMPILE)readelf -r $ | cut -d ' ' -f 4 | grep R_ARM | sort -u`; \ - then echo $ contains relocations other than \ - R_ARM_RELATIVE; false; fi + @RELOC=`$(CROSS_COMPILE)readelf -r -W $ | cut -d ' ' -f 4 | \ + grep R_A | sort -u`; \ + if test $$RELOC != R_ARM_RELATIVE -a \ +$$RELOC != R_AARCH64_RELATIVE; then \ + echo $ contains unexpected relocations: $$RELOC; \ + false; \ + fi $(VERSION_FILE): @mkdir -p $(dir $(VERSION_FILE)) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v15 10/10] arm64: MAKEALL, filter armv8 boards from LIST_arm
From: David Feng feng...@phytium.com.cn Signed-off-by: David Feng feng...@phytium.com.cn --- MAKEALL | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/MAKEALL b/MAKEALL index 80cd4f8..213383d 100755 --- a/MAKEALL +++ b/MAKEALL @@ -368,6 +368,12 @@ LIST_ARM11=$(targets_by_cpu arm1136) \ LIST_ARMV7=$(targets_by_cpu armv7) # +## ARMV8 Systems +# + +LIST_ARMV8=$(targets_by_cpu armv8) + +# ## AT91 Systems # @@ -391,7 +397,11 @@ LIST_spear=$(targets_by_soc spear) ## ARM groups # -LIST_arm=$(targets_by_arch arm) +LIST_arm=$(targets_by_arch arm | \ + for ARMV8_TARGET in $LIST_ARMV8;\ + do sed /$ARMV8_TARGET/d; \ + done) \ + # ## MIPS Systems(default = big endian) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v15 08/10] arm64: generic board support
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/board_f.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index f0664bc..d918e4b 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -462,7 +462,7 @@ static int reserve_round_4k(void)
static int reserve_mmu(void)
{
/* reserve TLB table */
- gd-arch.tlb_size = 4096 * 4;
+ gd-arch.tlb_size = PGTABLE_SIZE;
gd-relocaddr -= gd-arch.tlb_size;
/* round down to next 64 kB limit */
@@ -614,7 +614,7 @@ static int reserve_stacks(void)
* TODO(s...@chromium.org): Perhaps create arch_reserve_stack()
* to handle this and put in arch/xxx/lib/stack.c
*/
-# ifdef CONFIG_ARM
+# if defined(CONFIG_ARM) !defined(CONFIG_ARM64)
# ifdef CONFIG_USE_IRQ
gd-start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
debug(Reserving %zu Bytes for IRQ stack at: %08lx\n,
@@ -811,11 +811,6 @@ static int mark_bootstage(void)
}
static init_fnc_t init_sequence_f[] = {
-#if !defined(CONFIG_CPM2) !defined(CONFIG_MPC512X) \
- !defined(CONFIG_MPC83xx) !defined(CONFIG_MPC85xx) \
- !defined(CONFIG_MPC86xx) !defined(CONFIG_X86)
- zero_global_data,
-#endif
#ifdef CONFIG_SANDBOX
setup_ram_buf,
#endif
@@ -1009,6 +1004,17 @@ void board_init_f(ulong boot_flags)
gd = data;
#endif
+ /*
+* Clear global data before it is accessed at debug print
+* in initcall_run_list. Otherwise the debug print probably
+* get the wrong vaule of gd-have_console.
+*/
+#if !defined(CONFIG_CPM2) !defined(CONFIG_MPC512X) \
+ !defined(CONFIG_MPC83xx) !defined(CONFIG_MPC85xx) \
+ !defined(CONFIG_MPC86xx) !defined(CONFIG_X86)
+ zero_global_data();
+#endif
+
gd-flags = boot_flags;
if (initcall_run_list(init_sequence_f))
--
1.7.9.5
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[U-Boot] [PATCH v15 09/10] arm64: board support of vexpress_aemv8a
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com
---
board/armltd/vexpress64/Makefile |8 ++
board/armltd/vexpress64/vexpress64.c | 56 ++
boards.cfg |1 +
include/configs/vexpress_aemv8a.h| 189 ++
4 files changed, 254 insertions(+)
create mode 100644 board/armltd/vexpress64/Makefile
create mode 100644 board/armltd/vexpress64/vexpress64.c
create mode 100644 include/configs/vexpress_aemv8a.h
diff --git a/board/armltd/vexpress64/Makefile b/board/armltd/vexpress64/Makefile
new file mode 100644
index 000..e009141
--- /dev/null
+++ b/board/armltd/vexpress64/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := vexpress64.o
diff --git a/board/armltd/vexpress64/vexpress64.c
b/board/armltd/vexpress64/vexpress64.c
new file mode 100644
index 000..2ec3bc9
--- /dev/null
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2013
+ * David Feng feng...@phytium.com.cn
+ * Sharma Bhupesh bhupesh.sha...@freescale.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include common.h
+#include malloc.h
+#include errno.h
+#include netdev.h
+#include asm/io.h
+#include linux/compiler.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ /*
+* Clear spin table so that secondary processors
+* observe the correct value after waken up from wfe.
+*/
+ *(unsigned long *)CPU_RELEASE_ADDR = 0;
+
+ gd-ram_size = PHYS_SDRAM_1_SIZE;
+ return 0;
+}
+
+int timer_init(void)
+{
+ return 0;
+}
+
+/*
+ * Board specific reset that is system reset.
+ */
+void reset_cpu(ulong addr)
+{
+}
+
+/*
+ * Board specific ethernet initialization routine.
+ */
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC9
+ rc = smc9_initialize(0, CONFIG_SMC9_BASE);
+#endif
+ return rc;
+}
diff --git a/boards.cfg b/boards.cfg
index caba64e..5e0c99a 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -386,6 +386,7 @@ Active arm pxa- -
vpac270
Active arm pxa- icpdas lp8x4x
lp8x4x -
Sergey Yanovich ynv...@gmail.com
Active arm pxa- toradex -
colibri_pxa270 -
Marek Vasut marek.va...@gmail.com
Active arm sa1100 - - -
jornada -
Kristoffer Ericson kristoffer.eric...@gmail.com
+Active arm armv8 - armltd vexpress64
vexpress_aemv8a vexpress_aemv8a:ARM64
David Feng feng...@phytium.com.cn
Active avr32 at32ap at32ap700x atmel -
atngw100 -
Haavard Skinnemoen haavard.skinnem...@atmel.com
Active avr32 at32ap at32ap700x atmel -
atngw100mkii -
Andreas Bießmann andreas.de...@googlemail.com
Active avr32 at32ap at32ap700x atmel atstk1000
atstk1002-
Haavard Skinnemoen haavard.skinnem...@atmel.com
diff --git a/include/configs/vexpress_aemv8a.h
b/include/configs/vexpress_aemv8a.h
new file mode 100644
index 000..ce5f384
--- /dev/null
+++ b/include/configs/vexpress_aemv8a.h
@@ -0,0 +1,189 @@
+/*
+ * Configuration for Versatile Express. Parts were derived from other ARM
+ * configurations.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __VEXPRESS_AEMV8A_H
+#define __VEXPRESS_AEMV8A_H
+
+#define DEBUG
+
+#define CONFIG_REMAKE_ELF
+
+/*#define CONFIG_ARMV8_SWITCH_TO_EL1*/
+
+/*#define CONFIG_SYS_GENERIC_BOARD*/
+
+#define CONFIG_SYS_NO_FLASH
+
[U-Boot] [RESEND PATCH v14 03/10] add weak entry definition
From: David Feng feng...@phytium.com.cn Signed-off-by: David Feng feng...@phytium.com.cn --- include/linux/linkage.h |4 1 file changed, 4 insertions(+) diff --git a/include/linux/linkage.h b/include/linux/linkage.h index 9ddf830..2a2848a 100644 --- a/include/linux/linkage.h +++ b/include/linux/linkage.h @@ -49,6 +49,10 @@ .globl SYMBOL_NAME(name); \ LENTRY(name) +#define WEAK(name) \ + .weak SYMBOL_NAME(name); \ + LENTRY(name) + #ifndef END #define END(name) \ .size name, .-name -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RESEND PATCH v14 00/10] arm64 pat
From: David Feng feng...@phytium.com.cn The content is same with original v14. 04/05/06 patches is totally provided by scott wood. Them are mistakenly encoded From: David Feng, so modify its to From: Scott Wood. Changes for v14: - Merge rela relocation patches from Scott Wood scottw...@freescale.com. - Remove all CONFIG_NEED_MANUAL_RELOC and other fixups due to manual relocation. With rela relocation patches them are not needed. - Fix the bug of MEMORY_ATTRIBUTES definition due to assembler. That need put brackets around (MT_NORMAL*8). Otherwise the result is wrong.This bug is reported by York Sun york...@freescale.com. - -msoft-float is not supported by aarch64-gcc, make a test though $(call cc-option,-msoft-float). - Adjust the virtual address space to 42 bits. - Filter armv8 boards from LIST_arm in MAKEALL. - remove gpio.h in asm/arch-armv8/ and move mmu.h to asm/armv8/ directory. - remove vexpress64.dts from this patch, it could be accessed from linux kernel. Changes for v13: - fix the bug of board_r.c and arm/lib/board.c due to CONFIG_NEED_MANUAL_RELOC. adjust initr_serial() in board_r.c to the first entry of init_sequence_r[] and relocate serial_initialize() in arm/lib/board.c, routines of serial_device should be relocated firstly by serial_initialize(), so that printf access the correct puts function, otherwise uninitialized serial_current will be selected as the output device. - fix the bug of dcache_enable(). after mmu_setup the sctrl register value should be fetched again because it has been modifed by mmu_seup() function. This bug is reported by York Sun york...@freescale.com. - add macro branch_if_slave to macro.h, it choose processor with all zero affinity value as the master and is used in start.S. Changes for v12: - custom the patches to new format boards.cfg. Changes for v11: - Replace CONFIG_ARMV8 with CONFIG_ARM64. Currently, it's hard to distinguish what is armv8 specific and what is aarch64 specific, so we use CONFIG_ARM64 only, no CONFIG_ARMV8 used. - rename README.armv8 with README.arm64 and make some modification. Changes for v10: - add weak definition to include/linux/linkage.h and make setup_el2/setup_el3/lowlevel_init weak routines, so them can be easily overridden by processor specific code. - modify s-o-f of 0002-board-support-of-vexpress_aemv8a which use wrong mail address of Bhupesh Sharma. Changes for v9: - add Signed-off-by information to patch board support of vexpress_aemv8a which SMC9 support is integrated from Sharma Bhupesh's patch. - adjust pt_regs struct and add exception state preservation in exception.S. Changes for v8: - Integrate SMC9 patch of sharma bhupesh. - remove v8_outer_cache* which is not need currently. - Change license tag. - Mov crt0.S/relocate.S/interrupts.c to arm/lib and rename them with _64 suffix. - Make el3/el2 initializing process of start.S as two separate routines. It could be easier to be replaced with processor specific codes. - Remove exception stack save and restore routine, it is unnecessary now. - simplify __weak function declaration. Changes for v7: - Check the patches with checkpatch.pl and get rid of almost all warnings. There are a few warnings still, but I think it should be that. - change printf format in cmd_pxe.c, use %zd indtead of %ld to format size_t type variable. - add macro PGTABLE_SIZE to identify tlb table size. Changes for v6: - Make modification to inappropriate licensed file and bugs according to ScottWood's advice. Thanks Scott for his checking to these patches. - Enable u-boot's running at EL1. - Get rid of compiling warnings originated from cmd_pxe.c. Changes for v5: - fix the generic board_f.c, remove zero_global_data from init_sequence_f array and move it to board_init_f() function with CONFIG_X86 switch. The previous fixup is inaccurate. - Replace __ARMEB__ with __AARCH64EB__ in byteorder.h and unaligned.h, gcc for aarch64 use __AARCH64EB__ and __AARCH64EL__ to identify endian. - Some modification to README.armv8 Changes for v4: - merge arm64 to arm architecture. David Feng (10): fdt_support: 64bit initrd start address support cmd_pxe.c: remove compiling warnings add weak entry definition arm64: Add tool to statically apply RELA relocations arm64: Turn u-boot.bin back into an ELF file after relocate-rela arm64: Make checkarmreloc accept arm64 relocations arm64: core support arm64: generic board support arm64: board support of vexpress_aemv8a arm64: MAKEALL, filter armv8 boards from LIST_arm MAKEALL | 13 +- Makefile| 39 +- arch/arm/config.mk |3 +- arch/arm/cpu/armv8/Makefile | 38 + arch/arm/cpu/armv8/cache.S
[U-Boot] [RESEND PATCH v14 06/10] arm64: Make checkarmreloc accept arm64 relocations
From: Scott Wood scottw...@freescale.com Signed-off-by: Scott Wood scottw...@freescale.com Signed-off-by: David Feng feng...@phytium.com.cn --- Makefile | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/Makefile b/Makefile index 86464c9..edf52f2 100644 --- a/Makefile +++ b/Makefile @@ -805,12 +805,16 @@ tools: $(VERSION_FILE) $(TIMESTAMP_FILE) $(MAKE) -C $@ all endif # config.mk -# ARM relocations should all be R_ARM_RELATIVE. +# ARM relocations should all be R_ARM_RELATIVE (32-bit) or +# R_AARCH64_RELATIVE (64-bit). checkarmreloc: $(obj)u-boot - @if test R_ARM_RELATIVE != \ - `$(CROSS_COMPILE)readelf -r $ | cut -d ' ' -f 4 | grep R_ARM | sort -u`; \ - then echo $ contains relocations other than \ - R_ARM_RELATIVE; false; fi + @RELOC=`$(CROSS_COMPILE)readelf -r -W $ | cut -d ' ' -f 4 | \ + grep R_A | sort -u`; \ + if test $$RELOC != R_ARM_RELATIVE -a \ +$$RELOC != R_AARCH64_RELATIVE; then \ + echo $ contains unexpected relocations: $$RELOC; \ + false; \ + fi $(VERSION_FILE): @mkdir -p $(dir $(VERSION_FILE)) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RESEND PATCH v14 05/10] arm64: Turn u-boot.bin back into an ELF file after relocate-rela
From: Scott Wood scottw...@freescale.com While performing relocations on u-boot.bin should be good enough for booting on real hardware, some simulators insist on booting an ELF file (and yet don't perform ELF relocations), so convert the relocated binary back into an ELF file. This can go away in the future if we change relocate-rela to operate directly on the ELF file, or if and when we stop caring about a simulator with this restriction. Signed-off-by: Scott Wood scottw...@freescale.com Signed-off-by: David Feng feng...@phytium.com.cn --- Makefile | 13 + 1 file changed, 13 insertions(+) diff --git a/Makefile b/Makefile index 5dd28a9..86464c9 100644 --- a/Makefile +++ b/Makefile @@ -415,6 +415,7 @@ ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin ifneq ($(CONFIG_SPL_TARGET),) ALL-$(CONFIG_SPL) += $(obj)$(subst ,,$(CONFIG_SPL_TARGET)) endif +ALL-$(CONFIG_REMAKE_ELF) += $(obj)u-boot.elf # enable combined SPL/u-boot/dtb rules for tegra ifneq ($(CONFIG_TEGRA),) @@ -581,6 +582,18 @@ $(obj)u-boot-img-spl-at-end.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img conv=notrunc 2/dev/null cat $(obj)u-boot-pad.img $(obj)spl/u-boot-spl.bin $@ +# Create a new ELF from a raw binary file. This is useful for arm64 +# where static relocation needs to be performed on the raw binary, +# but certain simulators only accept an ELF file (but don't do the +# relocation). +# FIXME refactor dts/Makefile to share target/arch detection +$(obj)u-boot.elf: $(obj)u-boot.bin + @$(OBJCOPY) -B aarch64 -I binary -O elf64-littleaarch64 \ + $ $(obj)u-boot-elf.o + @$(LD) $(obj)u-boot-elf.o -o $@ \ + --defsym=_start=$(CONFIG_SYS_TEXT_BASE) \ + -Ttext=$(CONFIG_SYS_TEXT_BASE) + ifeq ($(CONFIG_SANDBOX),y) GEN_UBOOT = \ cd $(LNDIR) $(CC) $(SYMS) -T $(obj)u-boot.lds \ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RESEND PATCH v14 04/10] arm64: Add tool to statically apply RELA relocations
From: Scott Wood scottw...@freescale.com
ARM64 uses the newer RELA-style relocations rather than the older REL.
RELA relocations have an addend in the relocation struct, rather than
expecting the loader to read a value from the location to be updated.
While this is beneficial for ordinary program loading, it's problematic
for U-Boot because the location to be updated starts out with zero,
rather than a pre-relocation value. Since we need to be able to run C
code before relocation, we need a tool to apply the relocations at
build time.
In theory this tool is applicable to other newer architectures (mainly
64-bit), but currently the only relocations it supports are for arm64,
and it assumes a 64-bit little-endian target. If the latter limitation
is ever to be changed, we'll need a way to tell the tool what format
the image is in. Eventually this may be replaced by a tool that uses
libelf or similar and operates directly on the ELF file. I've written
some code for such an approach but libelf does not make it easy to poke
addresses by memory address (rather than by section), and I was
hesitant to write code to manually parse the program headers and do the
update outside of libelf (or to iterate over sections) -- especially
since it wouldn't get test coverage on things like binaries with
multiple PT_LOAD segments. This should be good enough for now to let
the manual relocation stuff be removed from the arm64 patches.
NOTE: Please make sure R_AARCH64_RELATIVE is defined at system include
files or manually defined. Otherwise, the rela relocation will
not apply.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: David Feng feng...@phytium.com.cn
---
Makefile | 12
tools/Makefile|6 ++
tools/relocate-rela.c | 185 +
3 files changed, 203 insertions(+)
create mode 100644 tools/relocate-rela.c
diff --git a/Makefile b/Makefile
index b09bfcc..5dd28a9 100644
--- a/Makefile
+++ b/Makefile
@@ -392,6 +392,17 @@ else
BOARD_SIZE_CHECK =
endif
+# Statically apply RELA-style relocations (currently arm64 only)
+ifneq ($(CONFIG_STATIC_RELA),)
+# $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base
+DO_STATIC_RELA = \
+ start=$$($(NM) $(1) | grep __rel_dyn_start | cut -f 1 -d ' '); \
+ end=$$($(NM) $(1) | grep __rel_dyn_end | cut -f 1 -d ' '); \
+ $(obj)tools/relocate-rela $(2) $(3) $$start $$end
+else
+DO_STATIC_RELA =
+endif
+
# Always append ALL so that arch config.mk's can add custom ones
ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
@@ -431,6 +442,7 @@ $(obj)u-boot.srec: $(obj)u-boot
$(obj)u-boot.bin: $(obj)u-boot
$(OBJCOPY) ${OBJCFLAGS} -O binary $ $@
+ $(call DO_STATIC_RELA,$,$@,$(CONFIG_SYS_TEXT_BASE))
$(BOARD_SIZE_CHECK)
$(obj)u-boot.ldr: $(obj)u-boot
diff --git a/tools/Makefile b/tools/Makefile
index c36cde2..a5eb85e 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -59,6 +59,7 @@ BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX)
BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
BIN_FILES-$(CONFIG_KIRKWOOD) += kwboot$(SFX)
BIN_FILES-y += proftool(SFX)
+BIN_FILES-$(CONFIG_STATIC_RELA) += relocate-rela$(SFX)
# Source files which exist outside the tools directory
EXT_OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += common/env_embedded.o
@@ -84,6 +85,7 @@ NOPED_OBJ_FILES-y += os_support.o
NOPED_OBJ_FILES-y += pblimage.o
NOPED_OBJ_FILES-y += proftool.o
NOPED_OBJ_FILES-y += ublimage.o
+NOPED_OBJ_FILES-y += relocate-rela.o
OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += envcrc.o
OBJ_FILES-$(CONFIG_CMD_LOADS) += img2srec.o
OBJ_FILES-$(CONFIG_CMD_NET) += gen_eth_addr.o
@@ -250,6 +252,10 @@ $(obj)kwboot$(SFX): $(obj)kwboot.o
$(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^
$(HOSTSTRIP) $@
+$(obj)relocate-rela$(SFX): $(obj)relocate-rela.o
+ $(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^
+ $(HOSTSTRIP) $@
+
# Some of the tool objects need to be accessed from outside the tools directory
$(obj)%.o: $(SRCTREE)/common/%.c
$(HOSTCC) -g $(HOSTCFLAGS_NOPED) -c -o $@ $
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c
new file mode 100644
index 000..47afe0b
--- /dev/null
+++ b/tools/relocate-rela.c
@@ -0,0 +1,185 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+ BSD-2-Clause
+ *
+ * 64-bit and little-endian target only until we need to support a different
+ * arch that needs this.
+ */
+
+#include elf.h
+#include errno.h
+#include inttypes.h
+#include stdarg.h
+#include stdbool.h
+#include stdio.h
+#include stdlib.h
+#include string.h
+
+static const bool debug_en;
+
+static void debug(const char *fmt, ...)
+{
+ va_list args;
+
+ va_start(args, fmt);
+ if (debug_en)
+ vprintf(fmt, args);
+}
+
+static bool supported_rela(Elf64_Rela *rela)
+{
+ uint64_t mask = 0xULL; /* would be
[U-Boot] [RESEND PATCH v14 10/10] arm64: MAKEALL, filter armv8 boards from LIST_arm
From: David Feng feng...@phytium.com.cn Signed-off-by: David Feng feng...@phytium.com.cn --- MAKEALL | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/MAKEALL b/MAKEALL index 956f3da..cb414ca 100755 --- a/MAKEALL +++ b/MAKEALL @@ -370,6 +370,12 @@ LIST_ARM11=$(boards_by_cpu arm1136) \ LIST_ARMV7=$(boards_by_cpu armv7) # +## ARMV8 Systems +# + +LIST_ARMV8=$(boards_by_cpu armv8) + +# ## AT91 Systems # @@ -393,7 +399,11 @@ LIST_spear=$(boards_by_soc spear) ## ARM groups # -LIST_arm=$(boards_by_arch arm) +LIST_arm=$(boards_by_arch arm | \ + for ARMV8_BOARD in $LIST_ARMV8; \ + do sed /$ARMV8_BOARD/d; \ + done) \ + # ## MIPS Systems(default = big endian) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RESEND PATCH v14 01/10] fdt_support: 64bit initrd start address support
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/fdt_support.c | 66 ++
1 file changed, 34 insertions(+), 32 deletions(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index b034c98..9bc5821 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -21,6 +21,34 @@
*/
DECLARE_GLOBAL_DATA_PTR;
+/*
+ * Get cells len in bytes
+ * if #-cells property is 2 then len is 8
+ * otherwise len is 4
+ */
+static int get_cells_len(void *blob, char *nr_cells_name)
+{
+ const fdt32_t *cell;
+
+ cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
+ if (cell fdt32_to_cpu(*cell) == 2)
+ return 8;
+
+ return 4;
+}
+
+/*
+ * Write a 4 or 8 byte big endian cell
+ */
+static void write_cell(u8 *addr, u64 val, int size)
+{
+ int shift = (size - 1) * 8;
+ while (size-- 0) {
+ *addr++ = (val shift) 0xff;
+ shift -= 8;
+ }
+}
+
/**
* fdt_getprop_u32_default - Find a node and return it's property or a default
*
@@ -131,9 +159,9 @@ static int fdt_fixup_stdout(void *fdt, int chosenoff)
int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int force)
{
- int nodeoffset;
+ int nodeoffset, addr_cell_len;
int err, j, total;
- fdt32_t tmp;
+ fdt64_t tmp;
const char *path;
uint64_t addr, size;
@@ -170,9 +198,11 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong
initrd_end, int force)
return err;
}
+ addr_cell_len = get_cells_len(fdt, #address-cells);
+
path = fdt_getprop(fdt, nodeoffset, linux,initrd-start, NULL);
if ((path == NULL) || force) {
- tmp = cpu_to_fdt32(initrd_start);
+ write_cell((u8 *)tmp, initrd_start, addr_cell_len);
err = fdt_setprop(fdt, nodeoffset,
linux,initrd-start, tmp, sizeof(tmp));
if (err 0) {
@@ -181,7 +211,7 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong
initrd_end, int force)
fdt_strerror(err));
return err;
}
- tmp = cpu_to_fdt32(initrd_end);
+ write_cell((u8 *)tmp, initrd_end, addr_cell_len);
err = fdt_setprop(fdt, nodeoffset,
linux,initrd-end, tmp, sizeof(tmp));
if (err 0) {
@@ -343,34 +373,6 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat,
do_fixup_by_compat(fdt, compat, prop, tmp, 4, create);
}
-/*
- * Get cells len in bytes
- * if #-cells property is 2 then len is 8
- * otherwise len is 4
- */
-static int get_cells_len(void *blob, char *nr_cells_name)
-{
- const fdt32_t *cell;
-
- cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
- if (cell fdt32_to_cpu(*cell) == 2)
- return 8;
-
- return 4;
-}
-
-/*
- * Write a 4 or 8 byte big endian cell
- */
-static void write_cell(u8 *addr, u64 val, int size)
-{
- int shift = (size - 1) * 8;
- while (size-- 0) {
- *addr++ = (val shift) 0xff;
- shift -= 8;
- }
-}
-
#ifdef CONFIG_NR_DRAM_BANKS
#define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS
#else
--
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[U-Boot] [RESEND PATCH v14 02/10] cmd_pxe: remove compiling warnings
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/cmd_pxe.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index c5f4a22..1df9a8a 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -57,7 +57,7 @@ static int format_mac_pxe(char *outbuf, size_t outbuf_len)
uchar ethaddr[6];
if (outbuf_len 21) {
- printf(outbuf is too small (%d 21)\n, outbuf_len);
+ printf(outbuf is too small (%zd 21)\n, outbuf_len);
return -EINVAL;
}
@@ -100,7 +100,7 @@ static int get_bootfile_path(const char *file_path, char
*bootfile_path,
path_len = (last_slash - bootfile) + 1;
if (bootfile_path_size path_len) {
- printf(bootfile_path too small. (%d %d)\n,
+ printf(bootfile_path too small. (%zd %zd)\n,
bootfile_path_size, path_len);
return -1;
--
1.7.9.5
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[U-Boot] [RESEND PATCH v14 07/10] arm64: core support
From: David Feng feng...@phytium.com.cn Relocation code based on a patch by Scott Wood, which is: Signed-off-by: Scott Wood scottw...@freescale.com Signed-off-by: David Feng feng...@phytium.com.cn --- arch/arm/config.mk |3 +- arch/arm/cpu/armv8/Makefile | 38 + arch/arm/cpu/armv8/cache.S | 130 + arch/arm/cpu/armv8/cache_v8.c | 218 arch/arm/cpu/armv8/config.mk| 15 ++ arch/arm/cpu/armv8/cpu.c| 67 + arch/arm/cpu/armv8/exceptions.S | 112 +++ arch/arm/cpu/armv8/start.S | 234 +++ arch/arm/cpu/armv8/timer.c | 80 +++ arch/arm/cpu/armv8/tlb.S| 30 arch/arm/cpu/armv8/u-boot.lds | 89 arch/arm/include/asm/armv8/mmu.h| 110 +++ arch/arm/include/asm/byteorder.h| 12 ++ arch/arm/include/asm/cache.h|5 + arch/arm/include/asm/config.h |6 + arch/arm/include/asm/global_data.h |6 +- arch/arm/include/asm/io.h | 15 +- arch/arm/include/asm/macro.h| 36 + arch/arm/include/asm/posix_types.h | 10 ++ arch/arm/include/asm/proc-armv/ptrace.h | 21 +++ arch/arm/include/asm/proc-armv/system.h | 59 +++- arch/arm/include/asm/system.h | 77 ++ arch/arm/include/asm/types.h|4 + arch/arm/include/asm/u-boot.h |4 + arch/arm/include/asm/unaligned.h|2 +- arch/arm/lib/Makefile | 14 ++ arch/arm/lib/board.c|7 +- arch/arm/lib/bootm.c| 16 +++ arch/arm/lib/crt0_64.S | 113 +++ arch/arm/lib/interrupts_64.c| 120 arch/arm/lib/relocate_64.S | 58 common/image.c |1 + doc/README.arm64| 45 ++ examples/standalone/stubs.c | 15 ++ include/image.h |1 + 35 files changed, 1762 insertions(+), 11 deletions(-) create mode 100644 arch/arm/cpu/armv8/Makefile create mode 100644 arch/arm/cpu/armv8/cache.S create mode 100644 arch/arm/cpu/armv8/cache_v8.c create mode 100644 arch/arm/cpu/armv8/config.mk create mode 100644 arch/arm/cpu/armv8/cpu.c create mode 100644 arch/arm/cpu/armv8/exceptions.S create mode 100644 arch/arm/cpu/armv8/start.S create mode 100644 arch/arm/cpu/armv8/timer.c create mode 100644 arch/arm/cpu/armv8/tlb.S create mode 100644 arch/arm/cpu/armv8/u-boot.lds create mode 100644 arch/arm/include/asm/armv8/mmu.h create mode 100644 arch/arm/lib/crt0_64.S create mode 100644 arch/arm/lib/interrupts_64.c create mode 100644 arch/arm/lib/relocate_64.S create mode 100644 doc/README.arm64 diff --git a/arch/arm/config.mk b/arch/arm/config.mk index d0cf43f..a259193 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -17,7 +17,8 @@ endif LDFLAGS_FINAL += --gc-sections PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \ - -fno-common -ffixed-r9 -msoft-float + -fno-common -ffixed-r9 +PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) # Support generic board on ARM __HAVE_ARCH_GENERIC_BOARD := y diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile new file mode 100644 index 000..b216f27 --- /dev/null +++ b/arch/arm/cpu/armv8/Makefile @@ -0,0 +1,38 @@ +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(CPU).o + +START := start.o + +COBJS += cpu.o +COBJS += timer.o +COBJS += cache_v8.o + +SOBJS += exceptions.o +SOBJS += cache.o +SOBJS += tlb.o + +SRCS := $(START:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +START := $(addprefix $(obj),$(START)) + +all: $(obj).depend $(START) $(LIB) + +$(LIB):$(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S new file mode 100644 index 000..419f169 --- /dev/null +++ b/arch/arm/cpu/armv8/cache.S @@ -0,0 +1,130 @@ +/* + * (C) Copyright 2013 + * David Feng feng...@phytium.com.cn + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#include asm-offsets.h +#include config.h +#include version.h +#include asm/macro.h +#include linux/linkage.h + +/* + * void __asm_flush_dcache_level(level) + * + * clean and invalidate one level cache. + * + * x0: cache level + * x1~x9: clobbered + */ +ENTRY(__asm_flush_dcache_level) +
[U-Boot] [RESEND PATCH v14 08/10] arm64: generic board support
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/board_f.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index 0ada1af..d821dbe 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -458,7 +458,7 @@ static int reserve_round_4k(void)
static int reserve_mmu(void)
{
/* reserve TLB table */
- gd-arch.tlb_size = 4096 * 4;
+ gd-arch.tlb_size = PGTABLE_SIZE;
gd-relocaddr -= gd-arch.tlb_size;
/* round down to next 64 kB limit */
@@ -610,7 +610,7 @@ static int reserve_stacks(void)
* TODO(s...@chromium.org): Perhaps create arch_reserve_stack()
* to handle this and put in arch/xxx/lib/stack.c
*/
-# ifdef CONFIG_ARM
+# if defined(CONFIG_ARM) !defined(CONFIG_ARM64)
# ifdef CONFIG_USE_IRQ
gd-start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
debug(Reserving %zu Bytes for IRQ stack at: %08lx\n,
@@ -807,11 +807,6 @@ static int mark_bootstage(void)
}
static init_fnc_t init_sequence_f[] = {
-#if !defined(CONFIG_CPM2) !defined(CONFIG_MPC512X) \
- !defined(CONFIG_MPC83xx) !defined(CONFIG_MPC85xx) \
- !defined(CONFIG_MPC86xx) !defined(CONFIG_X86)
- zero_global_data,
-#endif
#ifdef CONFIG_SANDBOX
setup_ram_buf,
#endif
@@ -1005,6 +1000,17 @@ void board_init_f(ulong boot_flags)
gd = data;
#endif
+ /*
+* Clear global data before it is accessed at debug print
+* in initcall_run_list. Otherwise the debug print probably
+* get the wrong vaule of gd-have_console.
+*/
+#if !defined(CONFIG_CPM2) !defined(CONFIG_MPC512X) \
+ !defined(CONFIG_MPC83xx) !defined(CONFIG_MPC85xx) \
+ !defined(CONFIG_MPC86xx) !defined(CONFIG_X86)
+ zero_global_data();
+#endif
+
gd-flags = boot_flags;
if (initcall_run_list(init_sequence_f))
--
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[U-Boot] [RESEND PATCH v14 09/10] arm64: board support of vexpress_aemv8a
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com
---
board/armltd/vexpress64/Makefile | 27 +
board/armltd/vexpress64/vexpress64.c | 50 +
boards.cfg |1 +
include/configs/vexpress_aemv8a.h| 191 ++
4 files changed, 269 insertions(+)
create mode 100644 board/armltd/vexpress64/Makefile
create mode 100644 board/armltd/vexpress64/vexpress64.c
create mode 100644 include/configs/vexpress_aemv8a.h
diff --git a/board/armltd/vexpress64/Makefile b/board/armltd/vexpress64/Makefile
new file mode 100644
index 000..f907c92
--- /dev/null
+++ b/board/armltd/vexpress64/Makefile
@@ -0,0 +1,27 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := vexpress64.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/armltd/vexpress64/vexpress64.c
b/board/armltd/vexpress64/vexpress64.c
new file mode 100644
index 000..dae18d4
--- /dev/null
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -0,0 +1,50 @@
+/*
+ * (C) Copyright 2013
+ * David Feng feng...@phytium.com.cn
+ * Sharma Bhupesh bhupesh.sha...@freescale.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include common.h
+#include malloc.h
+#include errno.h
+#include netdev.h
+#include asm/io.h
+#include linux/compiler.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd-ram_size = PHYS_SDRAM_1_SIZE;
+ return 0;
+}
+
+int timer_init(void)
+{
+ return 0;
+}
+
+/*
+ * Board specific reset that is system reset.
+ */
+void reset_cpu(ulong addr)
+{
+}
+
+/*
+ * Board specific ethernet initialization routine.
+ */
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC9
+ rc = smc9_initialize(0, CONFIG_SMC9_BASE);
+#endif
+ return rc;
+}
diff --git a/boards.cfg b/boards.cfg
index 85143c6..6d3dd69 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -383,6 +383,7 @@ Active arm pxa- -
vpac270
Active arm pxa- icpdas lp8x4x
lp8x4x -
Sergey Yanovich ynv...@gmail.com
Active arm pxa- toradex -
colibri_pxa270 -
Marek Vasut marek.va...@gmail.com
Active arm sa1100 - - -
jornada -
Kristoffer Ericson kristoffer.eric...@gmail.com
+Active arm armv8 - armltd vexpress64
vexpress_aemv8a vexpress_aemv8a:ARM64
David Feng feng...@phytium.com.cn
Active avr32 at32ap at32ap700x atmel -
atngw100 -
Haavard Skinnemoen haavard.skinnem...@atmel.com
Active avr32 at32ap at32ap700x atmel -
atngw100mkii -
Andreas Bießmann andreas.de...@googlemail.com
Active avr32 at32ap at32ap700x atmel atstk1000
atstk1002-
Haavard Skinnemoen haavard.skinnem...@atmel.com
diff --git a/include/configs/vexpress_aemv8a.h
b/include/configs/vexpress_aemv8a.h
new file mode 100644
index 000..e93b00f
--- /dev/null
+++ b/include/configs/vexpress_aemv8a.h
@@ -0,0 +1,191 @@
+/*
+ * Configuration for Versatile Express. Parts were derived from other ARM
+ * configurations.
+ *
+ *
[U-Boot] [PATCH v14 09/10] arm64: board support of vexpress_aemv8a
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com
---
board/armltd/vexpress64/Makefile | 27 +
board/armltd/vexpress64/vexpress64.c | 50 +
boards.cfg |1 +
include/configs/vexpress_aemv8a.h| 191 ++
4 files changed, 269 insertions(+)
create mode 100644 board/armltd/vexpress64/Makefile
create mode 100644 board/armltd/vexpress64/vexpress64.c
create mode 100644 include/configs/vexpress_aemv8a.h
diff --git a/board/armltd/vexpress64/Makefile b/board/armltd/vexpress64/Makefile
new file mode 100644
index 000..f907c92
--- /dev/null
+++ b/board/armltd/vexpress64/Makefile
@@ -0,0 +1,27 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := vexpress64.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/armltd/vexpress64/vexpress64.c
b/board/armltd/vexpress64/vexpress64.c
new file mode 100644
index 000..dae18d4
--- /dev/null
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -0,0 +1,50 @@
+/*
+ * (C) Copyright 2013
+ * David Feng feng...@phytium.com.cn
+ * Sharma Bhupesh bhupesh.sha...@freescale.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include common.h
+#include malloc.h
+#include errno.h
+#include netdev.h
+#include asm/io.h
+#include linux/compiler.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd-ram_size = PHYS_SDRAM_1_SIZE;
+ return 0;
+}
+
+int timer_init(void)
+{
+ return 0;
+}
+
+/*
+ * Board specific reset that is system reset.
+ */
+void reset_cpu(ulong addr)
+{
+}
+
+/*
+ * Board specific ethernet initialization routine.
+ */
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC9
+ rc = smc9_initialize(0, CONFIG_SMC9_BASE);
+#endif
+ return rc;
+}
diff --git a/boards.cfg b/boards.cfg
index 85143c6..6d3dd69 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -383,6 +383,7 @@ Active arm pxa- -
vpac270
Active arm pxa- icpdas lp8x4x
lp8x4x -
Sergey Yanovich ynv...@gmail.com
Active arm pxa- toradex -
colibri_pxa270 -
Marek Vasut marek.va...@gmail.com
Active arm sa1100 - - -
jornada -
Kristoffer Ericson kristoffer.eric...@gmail.com
+Active arm armv8 - armltd vexpress64
vexpress_aemv8a vexpress_aemv8a:ARM64
David Feng feng...@phytium.com.cn
Active avr32 at32ap at32ap700x atmel -
atngw100 -
Haavard Skinnemoen haavard.skinnem...@atmel.com
Active avr32 at32ap at32ap700x atmel -
atngw100mkii -
Andreas Bießmann andreas.de...@googlemail.com
Active avr32 at32ap at32ap700x atmel atstk1000
atstk1002-
Haavard Skinnemoen haavard.skinnem...@atmel.com
diff --git a/include/configs/vexpress_aemv8a.h
b/include/configs/vexpress_aemv8a.h
new file mode 100644
index 000..e93b00f
--- /dev/null
+++ b/include/configs/vexpress_aemv8a.h
@@ -0,0 +1,191 @@
+/*
+ * Configuration for Versatile Express. Parts were derived from other ARM
+ * configurations.
+ *
+ *
[U-Boot] [PATCH v14 03/10] add weak entry definition
From: David Feng feng...@phytium.com.cn Signed-off-by: David Feng feng...@phytium.com.cn --- include/linux/linkage.h |4 1 file changed, 4 insertions(+) diff --git a/include/linux/linkage.h b/include/linux/linkage.h index 9ddf830..2a2848a 100644 --- a/include/linux/linkage.h +++ b/include/linux/linkage.h @@ -49,6 +49,10 @@ .globl SYMBOL_NAME(name); \ LENTRY(name) +#define WEAK(name) \ + .weak SYMBOL_NAME(name); \ + LENTRY(name) + #ifndef END #define END(name) \ .size name, .-name -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v14 00/10] arm64 patch
From: David Feng feng...@phytium.com.cn Changes for v14: - Merge rela relocation patches from Scott Wood scottw...@freescale.com. - Remove all CONFIG_NEED_MANUAL_RELOC and other fixups due to manual relocation. With rela relocation patches them are not needed. - Fix the bug of MEMORY_ATTRIBUTES definition due to assembler. That need put brackets around (MT_NORMAL*8). Otherwise the result is wrong.This bug is reported by York Sun york...@freescale.com. - -msoft-float is not supported by aarch64-gcc, make a test though $(call cc-option,-msoft-float). - Adjust the virtual address space to 42 bits. - Filter armv8 boards from LIST_arm in MAKEALL. - remove gpio.h in asm/arch-armv8/ and move mmu.h to asm/armv8/ directory. - remove vexpress64.dts from this patch, it could be accessed from linux kernel. Changes for v13: - fix the bug of board_r.c and arm/lib/board.c due to CONFIG_NEED_MANUAL_RELOC. adjust initr_serial() in board_r.c to the first entry of init_sequence_r[] and relocate serial_initialize() in arm/lib/board.c, routines of serial_device should be relocated firstly by serial_initialize(), so that printf access the correct puts function, otherwise uninitialized serial_current will be selected as the output device. - fix the bug of dcache_enable(). after mmu_setup the sctrl register value should be fetched again because it has been modifed by mmu_seup() function. This bug is reported by York Sun york...@freescale.com. - add macro branch_if_slave to macro.h, it choose processor with all zero affinity value as the master and is used in start.S. Changes for v12: - custom the patches to new format boards.cfg. Changes for v11: - Replace CONFIG_ARMV8 with CONFIG_ARM64. Currently, it's hard to distinguish what is armv8 specific and what is aarch64 specific, so we use CONFIG_ARM64 only, no CONFIG_ARMV8 used. - rename README.armv8 with README.arm64 and make some modification. Changes for v10: - add weak definition to include/linux/linkage.h and make setup_el2/setup_el3/lowlevel_init weak routines, so them can be easily overridden by processor specific code. - modify s-o-f of 0002-board-support-of-vexpress_aemv8a which use wrong mail address of Bhupesh Sharma. Changes for v9: - add Signed-off-by information to patch board support of vexpress_aemv8a which SMC9 support is integrated from Sharma Bhupesh's patch. - adjust pt_regs struct and add exception state preservation in exception.S. Changes for v8: - Integrate SMC9 patch of sharma bhupesh. - remove v8_outer_cache* which is not need currently. - Change license tag. - Mov crt0.S/relocate.S/interrupts.c to arm/lib and rename them with _64 suffix. - Make el3/el2 initializing process of start.S as two separate routines. It could be easier to be replaced with processor specific codes. - Remove exception stack save and restore routine, it is unnecessary now. - simplify __weak function declaration. Changes for v7: - Check the patches with checkpatch.pl and get rid of almost all warnings. There are a few warnings still, but I think it should be that. - change printf format in cmd_pxe.c, use %zd indtead of %ld to format size_t type variable. - add macro PGTABLE_SIZE to identify tlb table size. Changes for v6: - Make modification to inappropriate licensed file and bugs according to ScottWood's advice. Thanks Scott for his checking to these patches. - Enable u-boot's running at EL1. - Get rid of compiling warnings originated from cmd_pxe.c. Changes for v5: - fix the generic board_f.c, remove zero_global_data from init_sequence_f array and move it to board_init_f() function with CONFIG_X86 switch. The previous fixup is inaccurate. - Replace __ARMEB__ with __AARCH64EB__ in byteorder.h and unaligned.h, gcc for aarch64 use __AARCH64EB__ and __AARCH64EL__ to identify endian. - Some modification to README.armv8 Changes for v4: - merge arm64 to arm architecture. David Feng (10): fdt_support: 64bit initrd start address support cmd_pxe.c: remove compiling warnings add weak entry definition arm64: Add tool to statically apply RELA relocations arm64: Turn u-boot.bin back into an ELF file after relocate-rela arm64: Make checkarmreloc accept arm64 relocations arm64: core support arm64: generic board support arm64: board support of vexpress_aemv8a arm64: MAKEALL, filter armv8 boards from LIST_arm MAKEALL | 13 +- Makefile| 39 +- arch/arm/config.mk |3 +- arch/arm/cpu/armv8/Makefile | 38 + arch/arm/cpu/armv8/cache.S | 130 + arch/arm/cpu/armv8/cache_v8.c | 218 arch/arm/cpu/armv8/config.mk| 15 ++
[U-Boot] [PATCH v14 01/10] fdt_support: 64bit initrd start address support
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/fdt_support.c | 66 ++
1 file changed, 34 insertions(+), 32 deletions(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index b034c98..9bc5821 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -21,6 +21,34 @@
*/
DECLARE_GLOBAL_DATA_PTR;
+/*
+ * Get cells len in bytes
+ * if #-cells property is 2 then len is 8
+ * otherwise len is 4
+ */
+static int get_cells_len(void *blob, char *nr_cells_name)
+{
+ const fdt32_t *cell;
+
+ cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
+ if (cell fdt32_to_cpu(*cell) == 2)
+ return 8;
+
+ return 4;
+}
+
+/*
+ * Write a 4 or 8 byte big endian cell
+ */
+static void write_cell(u8 *addr, u64 val, int size)
+{
+ int shift = (size - 1) * 8;
+ while (size-- 0) {
+ *addr++ = (val shift) 0xff;
+ shift -= 8;
+ }
+}
+
/**
* fdt_getprop_u32_default - Find a node and return it's property or a default
*
@@ -131,9 +159,9 @@ static int fdt_fixup_stdout(void *fdt, int chosenoff)
int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int force)
{
- int nodeoffset;
+ int nodeoffset, addr_cell_len;
int err, j, total;
- fdt32_t tmp;
+ fdt64_t tmp;
const char *path;
uint64_t addr, size;
@@ -170,9 +198,11 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong
initrd_end, int force)
return err;
}
+ addr_cell_len = get_cells_len(fdt, #address-cells);
+
path = fdt_getprop(fdt, nodeoffset, linux,initrd-start, NULL);
if ((path == NULL) || force) {
- tmp = cpu_to_fdt32(initrd_start);
+ write_cell((u8 *)tmp, initrd_start, addr_cell_len);
err = fdt_setprop(fdt, nodeoffset,
linux,initrd-start, tmp, sizeof(tmp));
if (err 0) {
@@ -181,7 +211,7 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong
initrd_end, int force)
fdt_strerror(err));
return err;
}
- tmp = cpu_to_fdt32(initrd_end);
+ write_cell((u8 *)tmp, initrd_end, addr_cell_len);
err = fdt_setprop(fdt, nodeoffset,
linux,initrd-end, tmp, sizeof(tmp));
if (err 0) {
@@ -343,34 +373,6 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat,
do_fixup_by_compat(fdt, compat, prop, tmp, 4, create);
}
-/*
- * Get cells len in bytes
- * if #-cells property is 2 then len is 8
- * otherwise len is 4
- */
-static int get_cells_len(void *blob, char *nr_cells_name)
-{
- const fdt32_t *cell;
-
- cell = fdt_getprop(blob, 0, nr_cells_name, NULL);
- if (cell fdt32_to_cpu(*cell) == 2)
- return 8;
-
- return 4;
-}
-
-/*
- * Write a 4 or 8 byte big endian cell
- */
-static void write_cell(u8 *addr, u64 val, int size)
-{
- int shift = (size - 1) * 8;
- while (size-- 0) {
- *addr++ = (val shift) 0xff;
- shift -= 8;
- }
-}
-
#ifdef CONFIG_NR_DRAM_BANKS
#define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS
#else
--
1.7.9.5
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[U-Boot] [PATCH v14 08/10] arm64: generic board support
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/board_f.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index 0ada1af..d821dbe 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -458,7 +458,7 @@ static int reserve_round_4k(void)
static int reserve_mmu(void)
{
/* reserve TLB table */
- gd-arch.tlb_size = 4096 * 4;
+ gd-arch.tlb_size = PGTABLE_SIZE;
gd-relocaddr -= gd-arch.tlb_size;
/* round down to next 64 kB limit */
@@ -610,7 +610,7 @@ static int reserve_stacks(void)
* TODO(s...@chromium.org): Perhaps create arch_reserve_stack()
* to handle this and put in arch/xxx/lib/stack.c
*/
-# ifdef CONFIG_ARM
+# if defined(CONFIG_ARM) !defined(CONFIG_ARM64)
# ifdef CONFIG_USE_IRQ
gd-start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
debug(Reserving %zu Bytes for IRQ stack at: %08lx\n,
@@ -807,11 +807,6 @@ static int mark_bootstage(void)
}
static init_fnc_t init_sequence_f[] = {
-#if !defined(CONFIG_CPM2) !defined(CONFIG_MPC512X) \
- !defined(CONFIG_MPC83xx) !defined(CONFIG_MPC85xx) \
- !defined(CONFIG_MPC86xx) !defined(CONFIG_X86)
- zero_global_data,
-#endif
#ifdef CONFIG_SANDBOX
setup_ram_buf,
#endif
@@ -1005,6 +1000,17 @@ void board_init_f(ulong boot_flags)
gd = data;
#endif
+ /*
+* Clear global data before it is accessed at debug print
+* in initcall_run_list. Otherwise the debug print probably
+* get the wrong vaule of gd-have_console.
+*/
+#if !defined(CONFIG_CPM2) !defined(CONFIG_MPC512X) \
+ !defined(CONFIG_MPC83xx) !defined(CONFIG_MPC85xx) \
+ !defined(CONFIG_MPC86xx) !defined(CONFIG_X86)
+ zero_global_data();
+#endif
+
gd-flags = boot_flags;
if (initcall_run_list(init_sequence_f))
--
1.7.9.5
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[U-Boot] [PATCH v14 10/10] arm64: MAKEALL, filter armv8 boards from LIST_arm
From: David Feng feng...@phytium.com.cn Signed-off-by: David Feng feng...@phytium.com.cn --- MAKEALL | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/MAKEALL b/MAKEALL index 956f3da..cb414ca 100755 --- a/MAKEALL +++ b/MAKEALL @@ -370,6 +370,12 @@ LIST_ARM11=$(boards_by_cpu arm1136) \ LIST_ARMV7=$(boards_by_cpu armv7) # +## ARMV8 Systems +# + +LIST_ARMV8=$(boards_by_cpu armv8) + +# ## AT91 Systems # @@ -393,7 +399,11 @@ LIST_spear=$(boards_by_soc spear) ## ARM groups # -LIST_arm=$(boards_by_arch arm) +LIST_arm=$(boards_by_arch arm | \ + for ARMV8_BOARD in $LIST_ARMV8; \ + do sed /$ARMV8_BOARD/d; \ + done) \ + # ## MIPS Systems(default = big endian) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v14 02/10] cmd_pxe: remove compiling warnings
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
common/cmd_pxe.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c
index c5f4a22..1df9a8a 100644
--- a/common/cmd_pxe.c
+++ b/common/cmd_pxe.c
@@ -57,7 +57,7 @@ static int format_mac_pxe(char *outbuf, size_t outbuf_len)
uchar ethaddr[6];
if (outbuf_len 21) {
- printf(outbuf is too small (%d 21)\n, outbuf_len);
+ printf(outbuf is too small (%zd 21)\n, outbuf_len);
return -EINVAL;
}
@@ -100,7 +100,7 @@ static int get_bootfile_path(const char *file_path, char
*bootfile_path,
path_len = (last_slash - bootfile) + 1;
if (bootfile_path_size path_len) {
- printf(bootfile_path too small. (%d %d)\n,
+ printf(bootfile_path too small. (%zd %zd)\n,
bootfile_path_size, path_len);
return -1;
--
1.7.9.5
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[U-Boot] [PATCH v14 05/10] arm64: Turn u-boot.bin back into an ELF file after relocate-rela
From: David Feng feng...@phytium.com.cn While performing relocations on u-boot.bin should be good enough for booting on real hardware, some simulators insist on booting an ELF file (and yet don't perform ELF relocations), so convert the relocated binary back into an ELF file. This can go away in the future if we change relocate-rela to operate directly on the ELF file, or if and when we stop caring about a simulator with this restriction. Signed-off-by: Scott Wood scottw...@freescale.com Signed-off-by: David Feng feng...@phytium.com.cn --- Makefile | 13 + 1 file changed, 13 insertions(+) diff --git a/Makefile b/Makefile index 5dd28a9..86464c9 100644 --- a/Makefile +++ b/Makefile @@ -415,6 +415,7 @@ ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin ifneq ($(CONFIG_SPL_TARGET),) ALL-$(CONFIG_SPL) += $(obj)$(subst ,,$(CONFIG_SPL_TARGET)) endif +ALL-$(CONFIG_REMAKE_ELF) += $(obj)u-boot.elf # enable combined SPL/u-boot/dtb rules for tegra ifneq ($(CONFIG_TEGRA),) @@ -581,6 +582,18 @@ $(obj)u-boot-img-spl-at-end.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img conv=notrunc 2/dev/null cat $(obj)u-boot-pad.img $(obj)spl/u-boot-spl.bin $@ +# Create a new ELF from a raw binary file. This is useful for arm64 +# where static relocation needs to be performed on the raw binary, +# but certain simulators only accept an ELF file (but don't do the +# relocation). +# FIXME refactor dts/Makefile to share target/arch detection +$(obj)u-boot.elf: $(obj)u-boot.bin + @$(OBJCOPY) -B aarch64 -I binary -O elf64-littleaarch64 \ + $ $(obj)u-boot-elf.o + @$(LD) $(obj)u-boot-elf.o -o $@ \ + --defsym=_start=$(CONFIG_SYS_TEXT_BASE) \ + -Ttext=$(CONFIG_SYS_TEXT_BASE) + ifeq ($(CONFIG_SANDBOX),y) GEN_UBOOT = \ cd $(LNDIR) $(CC) $(SYMS) -T $(obj)u-boot.lds \ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v14 07/10] arm64: core support
From: David Feng feng...@phytium.com.cn Relocation code based on a patch by Scott Wood, which is: Signed-off-by: Scott Wood scottw...@freescale.com Signed-off-by: David Feng feng...@phytium.com.cn --- arch/arm/config.mk |3 +- arch/arm/cpu/armv8/Makefile | 38 + arch/arm/cpu/armv8/cache.S | 130 + arch/arm/cpu/armv8/cache_v8.c | 218 arch/arm/cpu/armv8/config.mk| 15 ++ arch/arm/cpu/armv8/cpu.c| 67 + arch/arm/cpu/armv8/exceptions.S | 112 +++ arch/arm/cpu/armv8/start.S | 234 +++ arch/arm/cpu/armv8/timer.c | 80 +++ arch/arm/cpu/armv8/tlb.S| 30 arch/arm/cpu/armv8/u-boot.lds | 89 arch/arm/include/asm/armv8/mmu.h| 110 +++ arch/arm/include/asm/byteorder.h| 12 ++ arch/arm/include/asm/cache.h|5 + arch/arm/include/asm/config.h |6 + arch/arm/include/asm/global_data.h |6 +- arch/arm/include/asm/io.h | 15 +- arch/arm/include/asm/macro.h| 36 + arch/arm/include/asm/posix_types.h | 10 ++ arch/arm/include/asm/proc-armv/ptrace.h | 21 +++ arch/arm/include/asm/proc-armv/system.h | 59 +++- arch/arm/include/asm/system.h | 77 ++ arch/arm/include/asm/types.h|4 + arch/arm/include/asm/u-boot.h |4 + arch/arm/include/asm/unaligned.h|2 +- arch/arm/lib/Makefile | 14 ++ arch/arm/lib/board.c|7 +- arch/arm/lib/bootm.c| 16 +++ arch/arm/lib/crt0_64.S | 113 +++ arch/arm/lib/interrupts_64.c| 120 arch/arm/lib/relocate_64.S | 58 common/image.c |1 + doc/README.arm64| 45 ++ examples/standalone/stubs.c | 15 ++ include/image.h |1 + 35 files changed, 1762 insertions(+), 11 deletions(-) create mode 100644 arch/arm/cpu/armv8/Makefile create mode 100644 arch/arm/cpu/armv8/cache.S create mode 100644 arch/arm/cpu/armv8/cache_v8.c create mode 100644 arch/arm/cpu/armv8/config.mk create mode 100644 arch/arm/cpu/armv8/cpu.c create mode 100644 arch/arm/cpu/armv8/exceptions.S create mode 100644 arch/arm/cpu/armv8/start.S create mode 100644 arch/arm/cpu/armv8/timer.c create mode 100644 arch/arm/cpu/armv8/tlb.S create mode 100644 arch/arm/cpu/armv8/u-boot.lds create mode 100644 arch/arm/include/asm/armv8/mmu.h create mode 100644 arch/arm/lib/crt0_64.S create mode 100644 arch/arm/lib/interrupts_64.c create mode 100644 arch/arm/lib/relocate_64.S create mode 100644 doc/README.arm64 diff --git a/arch/arm/config.mk b/arch/arm/config.mk index d0cf43f..a259193 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -17,7 +17,8 @@ endif LDFLAGS_FINAL += --gc-sections PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \ - -fno-common -ffixed-r9 -msoft-float + -fno-common -ffixed-r9 +PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) # Support generic board on ARM __HAVE_ARCH_GENERIC_BOARD := y diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile new file mode 100644 index 000..b216f27 --- /dev/null +++ b/arch/arm/cpu/armv8/Makefile @@ -0,0 +1,38 @@ +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(CPU).o + +START := start.o + +COBJS += cpu.o +COBJS += timer.o +COBJS += cache_v8.o + +SOBJS += exceptions.o +SOBJS += cache.o +SOBJS += tlb.o + +SRCS := $(START:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +START := $(addprefix $(obj),$(START)) + +all: $(obj).depend $(START) $(LIB) + +$(LIB):$(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S new file mode 100644 index 000..419f169 --- /dev/null +++ b/arch/arm/cpu/armv8/cache.S @@ -0,0 +1,130 @@ +/* + * (C) Copyright 2013 + * David Feng feng...@phytium.com.cn + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#include asm-offsets.h +#include config.h +#include version.h +#include asm/macro.h +#include linux/linkage.h + +/* + * void __asm_flush_dcache_level(level) + * + * clean and invalidate one level cache. + * + * x0: cache level + * x1~x9: clobbered + */ +ENTRY(__asm_flush_dcache_level) +
[U-Boot] [PATCH v14 06/10] arm64: Make checkarmreloc accept arm64 relocations
From: David Feng feng...@phytium.com.cn Signed-off-by: Scott Wood scottw...@freescale.com Signed-off-by: David Feng feng...@phytium.com.cn --- Makefile | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/Makefile b/Makefile index 86464c9..edf52f2 100644 --- a/Makefile +++ b/Makefile @@ -805,12 +805,16 @@ tools: $(VERSION_FILE) $(TIMESTAMP_FILE) $(MAKE) -C $@ all endif # config.mk -# ARM relocations should all be R_ARM_RELATIVE. +# ARM relocations should all be R_ARM_RELATIVE (32-bit) or +# R_AARCH64_RELATIVE (64-bit). checkarmreloc: $(obj)u-boot - @if test R_ARM_RELATIVE != \ - `$(CROSS_COMPILE)readelf -r $ | cut -d ' ' -f 4 | grep R_ARM | sort -u`; \ - then echo $ contains relocations other than \ - R_ARM_RELATIVE; false; fi + @RELOC=`$(CROSS_COMPILE)readelf -r -W $ | cut -d ' ' -f 4 | \ + grep R_A | sort -u`; \ + if test $$RELOC != R_ARM_RELATIVE -a \ +$$RELOC != R_AARCH64_RELATIVE; then \ + echo $ contains unexpected relocations: $$RELOC; \ + false; \ + fi $(VERSION_FILE): @mkdir -p $(dir $(VERSION_FILE)) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v14 04/10] arm64: Add tool to statically apply RELA relocations
From: David Feng feng...@phytium.com.cn
ARM64 uses the newer RELA-style relocations rather than the older REL.
RELA relocations have an addend in the relocation struct, rather than
expecting the loader to read a value from the location to be updated.
While this is beneficial for ordinary program loading, it's problematic
for U-Boot because the location to be updated starts out with zero,
rather than a pre-relocation value. Since we need to be able to run C
code before relocation, we need a tool to apply the relocations at
build time.
In theory this tool is applicable to other newer architectures (mainly
64-bit), but currently the only relocations it supports are for arm64,
and it assumes a 64-bit little-endian target. If the latter limitation
is ever to be changed, we'll need a way to tell the tool what format
the image is in. Eventually this may be replaced by a tool that uses
libelf or similar and operates directly on the ELF file. I've written
some code for such an approach but libelf does not make it easy to poke
addresses by memory address (rather than by section), and I was
hesitant to write code to manually parse the program headers and do the
update outside of libelf (or to iterate over sections) -- especially
since it wouldn't get test coverage on things like binaries with
multiple PT_LOAD segments. This should be good enough for now to let
the manual relocation stuff be removed from the arm64 patches.
NOTE: Please make sure R_AARCH64_RELATIVE is defined at system include
files or define it manually. Otherwise, the rela relocation will
not apply.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: David Feng feng...@phytium.com.cn
---
Makefile | 12
tools/Makefile|6 ++
tools/relocate-rela.c | 185 +
3 files changed, 203 insertions(+)
create mode 100644 tools/relocate-rela.c
diff --git a/Makefile b/Makefile
index b09bfcc..5dd28a9 100644
--- a/Makefile
+++ b/Makefile
@@ -392,6 +392,17 @@ else
BOARD_SIZE_CHECK =
endif
+# Statically apply RELA-style relocations (currently arm64 only)
+ifneq ($(CONFIG_STATIC_RELA),)
+# $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base
+DO_STATIC_RELA = \
+ start=$$($(NM) $(1) | grep __rel_dyn_start | cut -f 1 -d ' '); \
+ end=$$($(NM) $(1) | grep __rel_dyn_end | cut -f 1 -d ' '); \
+ $(obj)tools/relocate-rela $(2) $(3) $$start $$end
+else
+DO_STATIC_RELA =
+endif
+
# Always append ALL so that arch config.mk's can add custom ones
ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
@@ -431,6 +442,7 @@ $(obj)u-boot.srec: $(obj)u-boot
$(obj)u-boot.bin: $(obj)u-boot
$(OBJCOPY) ${OBJCFLAGS} -O binary $ $@
+ $(call DO_STATIC_RELA,$,$@,$(CONFIG_SYS_TEXT_BASE))
$(BOARD_SIZE_CHECK)
$(obj)u-boot.ldr: $(obj)u-boot
diff --git a/tools/Makefile b/tools/Makefile
index c36cde2..a5eb85e 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -59,6 +59,7 @@ BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX)
BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
BIN_FILES-$(CONFIG_KIRKWOOD) += kwboot$(SFX)
BIN_FILES-y += proftool(SFX)
+BIN_FILES-$(CONFIG_STATIC_RELA) += relocate-rela$(SFX)
# Source files which exist outside the tools directory
EXT_OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += common/env_embedded.o
@@ -84,6 +85,7 @@ NOPED_OBJ_FILES-y += os_support.o
NOPED_OBJ_FILES-y += pblimage.o
NOPED_OBJ_FILES-y += proftool.o
NOPED_OBJ_FILES-y += ublimage.o
+NOPED_OBJ_FILES-y += relocate-rela.o
OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += envcrc.o
OBJ_FILES-$(CONFIG_CMD_LOADS) += img2srec.o
OBJ_FILES-$(CONFIG_CMD_NET) += gen_eth_addr.o
@@ -250,6 +252,10 @@ $(obj)kwboot$(SFX): $(obj)kwboot.o
$(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^
$(HOSTSTRIP) $@
+$(obj)relocate-rela$(SFX): $(obj)relocate-rela.o
+ $(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^
+ $(HOSTSTRIP) $@
+
# Some of the tool objects need to be accessed from outside the tools directory
$(obj)%.o: $(SRCTREE)/common/%.c
$(HOSTCC) -g $(HOSTCFLAGS_NOPED) -c -o $@ $
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c
new file mode 100644
index 000..47afe0b
--- /dev/null
+++ b/tools/relocate-rela.c
@@ -0,0 +1,185 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+ BSD-2-Clause
+ *
+ * 64-bit and little-endian target only until we need to support a different
+ * arch that needs this.
+ */
+
+#include elf.h
+#include errno.h
+#include inttypes.h
+#include stdarg.h
+#include stdbool.h
+#include stdio.h
+#include stdlib.h
+#include string.h
+
+static const bool debug_en;
+
+static void debug(const char *fmt, ...)
+{
+ va_list args;
+
+ va_start(args, fmt);
+ if (debug_en)
+ vprintf(fmt, args);
+}
+
+static bool supported_rela(Elf64_Rela *rela)
+{
+ uint64_t mask = 0xULL; /* would be
[U-Boot] [PATCH v14 09/10] arm64: board support of vexpress_aemv8a
From: David Feng feng...@phytium.com.cn
Signed-off-by: David Feng feng...@phytium.com.cn
---
board/armltd/vexpress64/Makefile | 27 +
board/armltd/vexpress64/vexpress64.c | 50 +
boards.cfg |1 +
include/configs/vexpress_aemv8a.h| 191 ++
4 files changed, 269 insertions(+)
create mode 100644 board/armltd/vexpress64/Makefile
create mode 100644 board/armltd/vexpress64/vexpress64.c
create mode 100644 include/configs/vexpress_aemv8a.h
diff --git a/board/armltd/vexpress64/Makefile b/board/armltd/vexpress64/Makefile
new file mode 100644
index 000..f907c92
--- /dev/null
+++ b/board/armltd/vexpress64/Makefile
@@ -0,0 +1,27 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := vexpress64.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/armltd/vexpress64/vexpress64.c
b/board/armltd/vexpress64/vexpress64.c
new file mode 100644
index 000..dae18d4
--- /dev/null
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -0,0 +1,50 @@
+/*
+ * (C) Copyright 2013
+ * David Feng feng...@phytium.com.cn
+ * Sharma Bhupesh b45...@freescale.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include common.h
+#include malloc.h
+#include errno.h
+#include netdev.h
+#include asm/io.h
+#include linux/compiler.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd-ram_size = PHYS_SDRAM_1_SIZE;
+ return 0;
+}
+
+int timer_init(void)
+{
+ return 0;
+}
+
+/*
+ * Board specific reset that is system reset.
+ */
+void reset_cpu(ulong addr)
+{
+}
+
+/*
+ * Board specific ethernet initialization routine.
+ */
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC9
+ rc = smc9_initialize(0, CONFIG_SMC9_BASE);
+#endif
+ return rc;
+}
diff --git a/boards.cfg b/boards.cfg
index 85143c6..6d3dd69 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -383,6 +383,7 @@ Active arm pxa- -
vpac270
Active arm pxa- icpdas lp8x4x
lp8x4x -
Sergey Yanovich ynv...@gmail.com
Active arm pxa- toradex -
colibri_pxa270 -
Marek Vasut marek.va...@gmail.com
Active arm sa1100 - - -
jornada -
Kristoffer Ericson kristoffer.eric...@gmail.com
+Active arm armv8 - armltd vexpress64
vexpress_aemv8a vexpress_aemv8a:ARM64
David Feng feng...@phytium.com.cn
Active avr32 at32ap at32ap700x atmel -
atngw100 -
Haavard Skinnemoen haavard.skinnem...@atmel.com
Active avr32 at32ap at32ap700x atmel -
atngw100mkii -
Andreas Bießmann andreas.de...@googlemail.com
Active avr32 at32ap at32ap700x atmel atstk1000
atstk1002-
Haavard Skinnemoen haavard.skinnem...@atmel.com
diff --git a/include/configs/vexpress_aemv8a.h
b/include/configs/vexpress_aemv8a.h
new file mode 100644
index 000..e93b00f
--- /dev/null
+++ b/include/configs/vexpress_aemv8a.h
@@ -0,0 +1,191 @@
+/*
+ * Configuration for Versatile Express. Parts were derived from other ARM
+ * configurations.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef
Re: [U-Boot] [PATCH 1/4] arm64: Add tool to statically apply RELA relocations
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c
new file mode 100644
index 000..47afe0b
--- /dev/null
+++ b/tools/relocate-rela.c
@@ -0,0 +1,185 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+ BSD-2-Clause
+ *
+ * 64-bit and little-endian target only until we need to support a different
+ * arch that needs this.
+ */
+
+#include elf.h
+#include errno.h
+#include inttypes.h
+#include stdarg.h
+#include stdbool.h
+#include stdio.h
+#include stdlib.h
+#include string.h
+
+static const bool debug_en;
+
+static void debug(const char *fmt, ...)
+{
+ va_list args;
+
+ va_start(args, fmt);
+ if (debug_en)
+ vprintf(fmt, args);
+}
+
+static bool supported_rela(Elf64_Rela *rela)
+{
+ uint64_t mask = 0xULL; /* would be different on 32-bit */
+ uint32_t type = rela-r_info mask;
+
+ switch (type) {
+#ifdef R_AARCH64_RELATIVE
+ case R_AARCH64_RELATIVE:
+ return true;
+#endif
hi Scott,
the R_AARCH64_RELATIVE is not deinfed in my system. Whether we should
define it at somewhere?
David
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Re: [U-Boot] [PATCH 0/4] arm64: rela relocation
Hi FengHua, On Fri, 4 Oct 2013 23:55:01 +0800 (GMT+08:00), FengHua feng...@phytium.com.cn wrote: arm64: rela relocation This lets us remove the manual relocation stuff from the arm64 patchset (the symbol itself is removed by this patchset, but not all the new manual relocations added by the arm64 patchset). I'm not terribly happy with the way relocate-rela is now, versus something cleaner that operates on the ELF file, but it's good enough for now and waiting longer to get rid of the manual relocations would be worse. This patchset is based on David's arm64 patchset v13. David, the first two patches should be applied before your arm64 patches. Maybe the fourth as well (except for the removal of the arm64 ifdef you added, which would then need to be squashed with your patch). The third patch should be squashed with your patches (plus you should remove the manual relocs). Scott Wood (4): arm64: Add tool to statically apply RELA relocations arm64: Turn u-boot.bin back into an ELF file after relocate-rela arm64: Non-manual relocation arm64: Make checkarmreloc accept arm64 relocations Makefile | 39 ++-- arch/arm/config.mk| 4 - arch/arm/cpu/armv8/config.mk | 1 - arch/arm/cpu/armv8/u-boot.lds | 32 +-- arch/arm/include/asm/config.h | 5 -- arch/arm/lib/crt0_64.S| 7 +- arch/arm/lib/relocate_64.S| 41 - include/configs/vexpress_aemv8a.h | 3 + tools/Makefile| 6 ++ tools/relocate-rela.c | 185 ++ 10 files changed, 276 insertions(+), 47 deletions(-) create mode 100644 tools/relocate-rela.c Great, some fixups related with relocation could be removed. I will modify arm64 patchset according this. Stop me if I'm missing something, but doesn't Scott's patch series need yours? And if you remove the manual relocas in yours, doesn't that make your series unable to function properly until Scott's series is applied too? If I am not mistaken, then maybe Scott's and your patches should be merged in a single series, with adequate attribution of course. David Amicalement, -- Albert. Yes, these two patches should work together. We'd better merge them to one patchset. The point is we should make choice between CONFIG_NEED_MANUAL_RELOC and relocation-rela tool before aarch64-gcc support rel relocation format or maybe aarch64-gcc will never do it. Another motivation to update arm64 patch is that it's too old and got wrong when applied to current u-boot master. Best Regards. David. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/4] arm64: rela relocation
arm64: rela relocation This lets us remove the manual relocation stuff from the arm64 patchset (the symbol itself is removed by this patchset, but not all the new manual relocations added by the arm64 patchset). I'm not terribly happy with the way relocate-rela is now, versus something cleaner that operates on the ELF file, but it's good enough for now and waiting longer to get rid of the manual relocations would be worse. This patchset is based on David's arm64 patchset v13. David, the first two patches should be applied before your arm64 patches. Maybe the fourth as well (except for the removal of the arm64 ifdef you added, which would then need to be squashed with your patch). The third patch should be squashed with your patches (plus you should remove the manual relocs). Scott Wood (4): arm64: Add tool to statically apply RELA relocations arm64: Turn u-boot.bin back into an ELF file after relocate-rela arm64: Non-manual relocation arm64: Make checkarmreloc accept arm64 relocations Makefile | 39 ++-- arch/arm/config.mk| 4 - arch/arm/cpu/armv8/config.mk | 1 - arch/arm/cpu/armv8/u-boot.lds | 32 +-- arch/arm/include/asm/config.h | 5 -- arch/arm/lib/crt0_64.S| 7 +- arch/arm/lib/relocate_64.S| 41 - include/configs/vexpress_aemv8a.h | 3 + tools/Makefile| 6 ++ tools/relocate-rela.c | 185 ++ 10 files changed, 276 insertions(+), 47 deletions(-) create mode 100644 tools/relocate-rela.c Great, some fixups related with relocation could be removed. I will modify arm64 patchset according this. David ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] arm64: Add tool to statically apply RELA relocations
ARM64 uses the newer RELA-style relocations rather than the older REL. RELA relocations have an addend in the relocation struct, rather than expecting the loader to read a value from the location to be updated. While this is beneficial for ordinary program loading, it's problematic How it is beneficial than rel format? Why aarch64-gcc use rela format only instead of supporting two format? these confuse me a few months. David, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] arm64: Non-manual relocation
This turns off CONFIG_NEEDS_MANUAL_RELOC and turns on -pie.
The bss part of the linker script is changed to be more like arm32,
as the previous arm64 approach was generating bad relocations (even
readelf didn't like them).
relocate_64.S is made to look more like relocate.S, and then changed to
support RELA style relocations rather than REL.
Signed-off-by: Scott Wood scottw...@freescale.com
---
arch/arm/config.mk| 2 --
arch/arm/cpu/armv8/config.mk | 1 -
arch/arm/cpu/armv8/u-boot.lds | 32 +++---
arch/arm/include/asm/config.h | 5 -
arch/arm/lib/crt0_64.S| 7 ++-
arch/arm/lib/relocate_64.S| 41
---
include/configs/vexpress_aemv8a.h | 3 +++
7 files changed, 51 insertions(+), 40 deletions(-)
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 95c07ad..96d2d88 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -74,9 +74,7 @@ endif
endif
# needed for relocation
-ifndef CONFIG_ARM64
LDFLAGS_u-boot += -pie
-endif
#
# FIXME: binutils versions 2.22 have a bug in the assembler where
diff --git a/arch/arm/cpu/armv8/config.mk b/arch/arm/cpu/armv8/config.mk
index 9f36d59..027a68c 100644
--- a/arch/arm/cpu/armv8/config.mk
+++ b/arch/arm/cpu/armv8/config.mk
@@ -13,4 +13,3 @@ PLATFORM_NO_UNALIGNED := $(PF_NO_UNALIGNED)
PF_CPPFLAGS_ARMV8 := $(call cc-option, -march=armv8-a)
PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV8)
PLATFORM_CPPFLAGS += $(PF_NO_UNALIGNED)
-PLATFORM_CPPFLAGS += -fpic
diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds
index 328d477..4c1 100644
--- a/arch/arm/cpu/armv8/u-boot.lds
+++ b/arch/arm/cpu/armv8/u-boot.lds
@@ -41,25 +41,43 @@ SECTIONS
}
. = ALIGN(8);
- .reloc : {
- __rel_got_start = .;
- *(.got)
- __rel_got_end = .;
- }
.image_copy_end :
{
*(.__image_copy_end)
}
+ . = ALIGN(8);
+
+ .rel_dyn_start :
+ {
+ *(.__rel_dyn_start)
+ }
+
+ .rela.dyn : {
+ *(.rela*)
+ }
+
+ .rel_dyn_end :
+ {
+ *(.__rel_dyn_end)
+ }
+
_end = .;
. = ALIGN(8);
+
+ .bss_start : {
+ KEEP(*(.__bss_start));
+ }
+
.bss : {
- __bss_start = .;
*(.bss*)
. = ALIGN(8);
- __bss_end = .;
+ }
+
+ .bss_end : {
+ KEEP(*(.__bss_end));
}
/DISCARD/ : { *(.dynsym) }
diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h
index 0ee131d..de4d01e 100644
--- a/arch/arm/include/asm/config.h
+++ b/arch/arm/include/asm/config.h
@@ -11,11 +11,6 @@
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
#ifdef CONFIG_ARM64
-/*
- * Currently, GOT is used to relocate u-boot and
- * configuration CONFIG_NEEDS_MANUAL_RELOC is needed.
- */
-#define CONFIG_NEEDS_MANUAL_RELOC
#define CONFIG_PHYS_64BIT
#endif
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index ddd46eb..7756396 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -94,11 +94,8 @@ relocation_return:
/*
* Clear BSS section
*/
- ldr x9, [x18, #GD_RELOC_OFF]/* x9 - gd-reloc_off */
- ldr x0, =__bss_start
- add x0, x0, x9 /* x0 - __bss_start in RAM */
- ldr x1, =__bss_end
- add x1, x1, x9 /* x1 - __bss_end in RAM */
+ ldr x0, =__bss_start/* this is auto-relocated! */
+ ldr x1, =__bss_end /* this is auto-relocated! */
mov x2, #0
clear_loop:
str x2, [x0]
diff --git a/arch/arm/lib/relocate_64.S b/arch/arm/lib/relocate_64.S
index 29c3239..7fba9e2 100644
--- a/arch/arm/lib/relocate_64.S
+++ b/arch/arm/lib/relocate_64.S
@@ -16,40 +16,41 @@
* void relocate_code (addr_moni)
*
* This function relocates the monitor code.
- *
- * NOTE:
- * GOT is used and configuration CONFIG_NEEDS_MANUAL_RELOC is needed.
+ * x0 holds the destination address.
*/
ENTRY(relocate_code)
/*
* Copy u-boot from flash to RAM
*/
- ldr x1, =__image_copy_start /* x1 - copy source */
- cmp x1, x0
+ ldr x1, =__image_copy_start /* x1 - SRC __image_copy_start */
+ subsx9, x0, x1 /* x9 - relocation offset */
b.eqrelocate_done /* skip relocation */
- mov x2, x0 /* x2 - copy destination */
- ldr x3, =__image_copy_end /* x3 - source end address */
+ ldr x2, =__image_copy_end /* x2 - SRC __image_copy_end */
copy_loop:
ldp x10, x11, [x1], #16 /* copy from source address [x1] */
- stp x10, x11, [x2], #16 /* copy to target address [x2] */
- cmp x1,
Re: [U-Boot] [PATCH v4 3/4] generic board patch of manual reloc and zero gd_t
-原始邮件- 发件人: Scott Wood scottw...@freescale.com 发送时间: 2013年10月1日 星期二 收件人: FengHua feng...@phytium.com.cn 抄送: Simon Glass s...@chromium.org, trini tr...@ti.com, u-boot u-boot@lists.denx.de 主题: Re: Re: [U-Boot] [PATCH v4 3/4] generic board patch of manual reloc and zero gd_t On Tue, 2013-10-01 at 19:05 +0800, FengHua wrote: How about place u-boot.bin at 0x9000 and write a piece of code (elf format) jumping from 0x8000 to 0x9000. That seems even worse than converting the .bin back into an ELF... Why? I could load u-boot.bin at 0x9000 as data, I think it should works. Or maybe secure state make the program jumping to secure memory. so try switching to el2 before jumping. It requires building another program image (even if it's a relatively simple one), as opposed to just invoking objcopy and ld, and it makes invoking the simulator more complicated. Do not need to write a new program, just add the jumping code immediately after setup_el3 of current aarch64-uboot, it's the first booting program. compile another u-boot without jumping code at 0x9000, it's the data. Do you know why loading the raw image at 0x8000 isn't working? The foundation model require a elf(axf) image being loaded, it use it to determine the entry point. Then why does it even try to start without an ELF being supplied (but won't try to start if I don't supply ELF *or* raw data)? Why is there no other way to supply an entry point (even just defaulting to the beginning of the raw image if no ELF is provided)? Fast model for aarch64 support all of these. Maybe that's why Foundatiom model is free. Why does it fail when I supply *both* the ELF and the raw image, in either order? The elf file will override the raw image if they are loaded at same address. David ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 3/4] generic board patch of manual reloc and zero gd_t
-原始邮件- 发件人: Scott Wood scottw...@freescale.com 发送时间: 2013年10月1日 星期二 收件人: Simon Glass s...@chromium.org 抄送: trini tr...@ti.com, u-boot u-boot@lists.denx.de, FengHua feng...@phytium.com.cn 主题: Re: [U-Boot] [PATCH v4 3/4] generic board patch of manual reloc and zero gd_t On Mon, 2013-09-09 at 20:54 -0500, Scott Wood wrote: It seems the problem is that when rela is used, the linker *only* puts the symbol in the rela struct. The value in the data section itself is zero, which means we can't run without relocation even if the address hasn't changed. Unless there's some way to change this linker behavior, the options I can think of are: 1. Write a utility to apply the relocations (for the pre-relocation address) at build time, or 2. Use SPL. The SPL itself would not use -pie and would not relocate. The main U-Boot would know that it has been loaded into RAM, and apply relocations prior to entering C code. Interactions with SPL being used for other purposes could be awkward. Any preferences, or other suggestions? I think either of these options is preferable to CONFIG_NEEDS_MANUAL_RELOC. I'm inclined toward option #1 as it avoids interactions with other SPL uses and in general doesn't change the runtime flow. #1 is easier to do on the u-boot.bin rather than on the ELF file[1], but apparently that doesn't do us any good with the model because it wants an ELF file. Shouldn't the model be applying the relocations if it's an ELF loader? Is there any way to get the foundation model to load a raw binary? I tried --data and --nsdata at 0x8000 (alone or in combination with --image) and wasn't able to do a write to the LEDs immediately after reset (which works when I load it as ELF). It works when I convert the binary back into an ELF using objcopy and ld, but it would be nice to avoid that... How about place u-boot.bin at 0x9000 and write a piece of code (elf format) jumping from 0x8000 to 0x9000. David, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 3/4] generic board patch of manual reloc and zero gd_t
-原始邮件- 发件人: Scott Wood scottw...@freescale.com 发送时间: 2013年10月1日 星期二 收件人: FengHua feng...@phytium.com.cn 抄送: Simon Glass s...@chromium.org, trini tr...@ti.com, u-boot u-boot@lists.denx.de 主题: Re: Re: [U-Boot] [PATCH v4 3/4] generic board patch of manual reloc and zero gd_t On Tue, 2013-10-01 at 19:05 +0800, FengHua wrote: -原始邮件- 发件人: Scott Wood scottw...@freescale.com 发送时间: 2013年10月1日 星期二 收件人: Simon Glass s...@chromium.org 抄送: trini tr...@ti.com, u-boot u-boot@lists.denx.de, FengHua feng...@phytium.com.cn 主题: Re: [U-Boot] [PATCH v4 3/4] generic board patch of manual reloc and zero gd_t On Mon, 2013-09-09 at 20:54 -0500, Scott Wood wrote: It seems the problem is that when rela is used, the linker *only* puts the symbol in the rela struct. The value in the data section itself is zero, which means we can't run without relocation even if the address hasn't changed. Unless there's some way to change this linker behavior, the options I can think of are: 1. Write a utility to apply the relocations (for the pre-relocation address) at build time, or 2. Use SPL. The SPL itself would not use -pie and would not relocate. The main U-Boot would know that it has been loaded into RAM, and apply relocations prior to entering C code. Interactions with SPL being used for other purposes could be awkward. Any preferences, or other suggestions? I think either of these options is preferable to CONFIG_NEEDS_MANUAL_RELOC. I'm inclined toward option #1 as it avoids interactions with other SPL uses and in general doesn't change the runtime flow. #1 is easier to do on the u-boot.bin rather than on the ELF file[1], but apparently that doesn't do us any good with the model because it wants an ELF file. Shouldn't the model be applying the relocations if it's an ELF loader? Is there any way to get the foundation model to load a raw binary? I tried --data and --nsdata at 0x8000 (alone or in combination with --image) and wasn't able to do a write to the LEDs immediately after reset (which works when I load it as ELF). It works when I convert the binary back into an ELF using objcopy and ld, but it would be nice to avoid that... How about place u-boot.bin at 0x9000 and write a piece of code (elf format) jumping from 0x8000 to 0x9000. That seems even worse than converting the .bin back into an ELF... Why? I could load u-boot.bin at 0x9000 as data, I think it should works. Or maybe secure state make the program jumping to secure memory. so try switching to el2 before jumping. Do you know why loading the raw image at 0x8000 isn't working? The foundation model require a elf(axf) image being loaded, it use it to determine the entry point. David ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
