Re: [PATCH] doc: rockchip: Clarify the rkspi image format further

[Johan Jonker]

On 2/10/24 19:18, Dragan Simic wrote:
> As discussed on the U-Boot mailing list, [1][2] only some Rockchip SoCs
> suffer from a bug in their BROMs that requires a specific format for their

This not a bug.

> SPI images, which was the reason for the rkspi format to be introduced.
> 
> Improve the description of the rkspi format a bit to mention this, for
> future reference and to make understanding it easier.
> 
> [1] 
> https://lore.kernel.org/u-boot/c32129ba-db25-4b9d-9a4a-032d88dfb...@kwiboo.se/
> [2] 
> https://lore.kernel.org/u-boot/CACdvmAjfCWicRd=lkkyob7fzo79afkuqky0e1hbb0zyjuoo...@mail.gmail.com/
> 
> Signed-off-by: Dragan Simic 
> ---
>  doc/README.rockchip | 7 ++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/doc/README.rockchip b/doc/README.rockchip
> index 84caff8a24d3..e0c5c395ec6a 100644
> --- a/doc/README.rockchip
> +++ b/doc/README.rockchip
> @@ -649,7 +649,12 @@ sector is used. The header is the same as with rksd and 
> the maximum size is

>  also 32KB (before spreading). The image should be written to the start of
>  SPI flash.
>  

On rk3066 an image should start before page address:
NAND : 50
SPI  : 13
EMMC :  1

Not sure about start limits for other SoC's. (Kever ??)

Also rk3066 and rk3188 use RC4 crypto.

> -See above for instructions on how to write a SPI image.
> +Only the BROMs of some Rockchip SoCs, such as the RK3399, suffer from a bug
> +that mandates the above-described data spreading, thus requiring the rkspi
> +format to be used for their SPI images. Rockchip SoCs that don't suffer
> +from this bug use the rksd format for their SPI images.
> +

This not a bug. It's a design choice to reuse the reading function in the boot 
ROM shared by EMMC, NAND and SPI etc. due to size restrictions.

See NAND example:
https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/blob/master/drivers/block/rkmtd.c?ref_type=heads#L259

This NAND code also applies to SPI with minor tweaks.
Code will never read more then 2k regardless of the page size.

===
This info must be written in a more neutral wording.(no bugs involved)
Just describe the 2 formats and the SoC's that use it.

Johan

===
Extra:

Could someone cleanup README.rockchip
The file README.rockchip has most building scenarios covered by now.
Please have a look if all the boot log listing in that file are still needed or 
can be removed. 

===

Is there a need for SPI programmer code a la RKMTD with common base and block 
interface tools?

===

Is someone able to extract rk3568 boot ROM code in order to study NAND boot 
behavior for a future RKMTD NFC V9 upgrade?

> +See the section above for instructions on how to write an SPI image.
>  
>  rkmux.py
>  
> 

Re: [PATCH v2 13/20] rockchip: migrate hardware.h inclusion into appropriate files

[Johan Jonker]

On 2/9/24 10:50, Quentin Schulz wrote:
> From: Quentin Schulz 
> 
> hardware.h is only defining macros which are "wrappers" around writel().
> 
> writel() is however not available in hardware.h,  needs to be
> included. This means in order to use the wrappers in hardware.h, one
> also needs to include the  header.
> 
> However, this cannot be done currently because hardware.h is included in
> include/configs files, which are implicitly included by every code file
> by default, which makes the compilation of arch/arm/cpu/armv8/u-boot.lds
> fail because ALIGN (the ARM assembly directive) got redefined by some
> of the include files coming from .
> 
> Because nothing in the include/configs file actually use hardware.h,
> let's remove the inclusion of hardware.h from the include/configs files
> and explicitly add it wherever it is required.
> 
> This prepares for the next commit where  will be included in
> hardware.h.
> 
> Cc: Quentin Schulz 
> Reviewed-by: Kever Yang 
> Signed-off-by: Quentin Schulz 
> ---
>  arch/arm/mach-rockchip/rk3066/rk3066.c | 1 +
>  drivers/ram/rockchip/dmc-rk3368.c  | 1 +
>  drivers/ram/rockchip/sdram_rk3188.c| 1 +
>  drivers/ram/rockchip/sdram_rk3288.c| 1 +
>  include/configs/rk3036_common.h| 1 -
>  include/configs/rk3066_common.h| 1 -
>  include/configs/rk3188_common.h| 1 -
>  include/configs/rk322x_common.h| 1 -
>  include/configs/rk3288_common.h| 1 -
>  include/configs/rk3368_common.h| 1 -
>  include/configs/rv1108_common.h| 1 -
>  11 files changed, 4 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/arm/mach-rockchip/rk3066/rk3066.c 
> b/arch/arm/mach-rockchip/rk3066/rk3066.c
> index 78c7d894f90..6661b788295 100644
> --- a/arch/arm/mach-rockchip/rk3066/rk3066.c
> +++ b/arch/arm/mach-rockchip/rk3066/rk3066.c
> @@ -7,6 +7,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #define GRF_BASE 0x20008000
>  
> diff --git a/drivers/ram/rockchip/dmc-rk3368.c 
> b/drivers/ram/rockchip/dmc-rk3368.c
> index f36be941a38..74d8aed571c 100644
> --- a/drivers/ram/rockchip/dmc-rk3368.c
> +++ b/drivers/ram/rockchip/dmc-rk3368.c
> @@ -20,6 +20,7 @@

>  #include 
>  #include 
>  #include 
> +#include 

>From codingstyle.rst:

You should follow this ordering in U-Boot. 
The common.h header (which is going away at some point) should always be first, 
followed by other headers in order, then headers with directories, then local 
files.
Within that order, sort your includes.

>  #include 
>  #include 
>  #include 
> diff --git a/drivers/ram/rockchip/sdram_rk3188.c 
> b/drivers/ram/rockchip/sdram_rk3188.c
> index ad9f936df55..16a68885f1f 100644
> --- a/drivers/ram/rockchip/sdram_rk3188.c
> +++ b/drivers/ram/rockchip/sdram_rk3188.c
> @@ -25,6 +25,7 @@

>  #include 
>  #include 
>  #include 
> +#include 

dito

>  #include 
>  #include 
>  
> diff --git a/drivers/ram/rockchip/sdram_rk3288.c 
> b/drivers/ram/rockchip/sdram_rk3288.c
> index c99118fd612..ec6bdcb2015 100644
> --- a/drivers/ram/rockchip/sdram_rk3288.c
> +++ b/drivers/ram/rockchip/sdram_rk3288.c
> @@ -25,6 +25,7 @@

>  #include 
>  #include 
>  #include 
> +#include 

dito

>  #include 
>  #include 
>  #include 
> diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
> index c2abd14e114..0bf9e8b9a2e 100644
> --- a/include/configs/rk3036_common.h
> +++ b/include/configs/rk3036_common.h
> @@ -5,7 +5,6 @@
>  #ifndef __CONFIG_RK3036_COMMON_H
>  #define __CONFIG_RK3036_COMMON_H
>  
> -#include 
>  #include "rockchip-common.h"
>  
>  #define CFG_SYS_HZ_CLOCK 2400
> diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
> index d70c8f77d48..6a3b6900463 100644
> --- a/include/configs/rk3066_common.h
> +++ b/include/configs/rk3066_common.h
> @@ -6,7 +6,6 @@
>  #ifndef __CONFIG_RK3066_COMMON_H
>  #define __CONFIG_RK3066_COMMON_H
>  
> -#include 
>  #include "rockchip-common.h"
>  
>  #define CFG_IRAM_BASE0x1008
> diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
> index a8cee1e44d4..98f2c25f3cf 100644
> --- a/include/configs/rk3188_common.h
> +++ b/include/configs/rk3188_common.h
> @@ -6,7 +6,6 @@
>  #ifndef __CONFIG_RK3188_COMMON_H
>  #define __CONFIG_RK3188_COMMON_H
>  
> -#include 
>  #include "rockchip-common.h"
>  
>  #define CFG_IRAM_BASE0x1008
> diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
> index 15f77df3e17..bab4ca015f7 100644
> --- a/include/configs/rk322x_common.h
> +++ b/include/configs/rk322x_common.h
> @@ -5,7 +5,6 @@
>  #ifndef __CONFIG_RK322X_COMMON_H
>  #define __CONFIG_RK322X_COMMON_H
>  
> -#include 
>  #include "rockchip-common.h"
>  
>  #define CFG_SYS_HZ_CLOCK 2400
> diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
> index 3063076a97a..0c449e31099 100644
> --- a/include/configs/rk3288_common.h
> +++ b/include/configs/rk3288_common.h
> @@ 

[PATCH v1] arm: dts: rockchip: rk3288: move to 64 bit reg size

[Johan Jonker]

To make automatic Rockchip DT syncing possible from Linux to U-boot prepare
rk3288.dtsi by moving to 64 bit reg size.

Signed-off-by: Johan Jonker 
---
 arch/arm/dts/rk3288-evb.dtsi |   2 +-
 arch/arm/dts/rk3288-firefly.dtsi |   2 +-
 arch/arm/dts/rk3288-miqi.dtsi|   2 +-
 arch/arm/dts/rk3288-phycore-som.dtsi |   2 +-
 arch/arm/dts/rk3288-popmetal.dtsi|   2 +-
 arch/arm/dts/rk3288-rock2-som.dtsi   |   2 +-
 arch/arm/dts/rk3288-tinker.dtsi  |   2 +-
 arch/arm/dts/rk3288-u-boot.dtsi  |  14 +-
 arch/arm/dts/rk3288-veyron.dtsi  |   2 +-
 arch/arm/dts/rk3288.dtsi | 259 +++
 arch/arm/mach-rockchip/Kconfig   |   1 +
 11 files changed, 165 insertions(+), 125 deletions(-)

diff --git a/arch/arm/dts/rk3288-evb.dtsi b/arch/arm/dts/rk3288-evb.dtsi
index 72da8847344c..0e347beb154d 100644
--- a/arch/arm/dts/rk3288-evb.dtsi
+++ b/arch/arm/dts/rk3288-evb.dtsi
@@ -7,7 +7,7 @@

 / {
memory {
-   reg = <0 0x8000>;
+   reg = <0x0 0x0 0x0 0x8000>;
};

ext_gmac: external-gmac-clock {
diff --git a/arch/arm/dts/rk3288-firefly.dtsi b/arch/arm/dts/rk3288-firefly.dtsi
index 1117d3913ed7..0824b19ee642 100644
--- a/arch/arm/dts/rk3288-firefly.dtsi
+++ b/arch/arm/dts/rk3288-firefly.dtsi
@@ -7,7 +7,7 @@

 / {
memory {
-   reg = <0 0x8000>;
+   reg = <0x0 0x0 0x0 0x8000>;
};

ext_gmac: external-gmac-clock {
diff --git a/arch/arm/dts/rk3288-miqi.dtsi b/arch/arm/dts/rk3288-miqi.dtsi
index 00c8613d6d73..c56e1109e3ac 100644
--- a/arch/arm/dts/rk3288-miqi.dtsi
+++ b/arch/arm/dts/rk3288-miqi.dtsi
@@ -8,7 +8,7 @@
 / {
memory {
device_type = "memory";
-   reg = <0 0x8000>;
+   reg = <0x0 0x0 0x0 0x8000>;
};

ext_gmac: external-gmac-clock {
diff --git a/arch/arm/dts/rk3288-phycore-som.dtsi 
b/arch/arm/dts/rk3288-phycore-som.dtsi
index 70c00308d736..bde5910ff625 100644
--- a/arch/arm/dts/rk3288-phycore-som.dtsi
+++ b/arch/arm/dts/rk3288-phycore-som.dtsi
@@ -55,7 +55,7 @@
 */
memory {
device_type = "memory";
-   reg = <0 0x800>;
+   reg = <0x0 0x0 0x0 0x8000>;
};

aliases {
diff --git a/arch/arm/dts/rk3288-popmetal.dtsi 
b/arch/arm/dts/rk3288-popmetal.dtsi
index d732a70678ba..ecff641b1099 100644
--- a/arch/arm/dts/rk3288-popmetal.dtsi
+++ b/arch/arm/dts/rk3288-popmetal.dtsi
@@ -44,7 +44,7 @@
 / {
memory{
device_type = "memory";
-   reg = <0 0x8000>;
+   reg = <0x0 0x0 0x0 0x8000>;
};

ext_gmac: external-gmac-clock {
diff --git a/arch/arm/dts/rk3288-rock2-som.dtsi 
b/arch/arm/dts/rk3288-rock2-som.dtsi
index 1ece66f3e162..58e32fbb80f6 100644
--- a/arch/arm/dts/rk3288-rock2-som.dtsi
+++ b/arch/arm/dts/rk3288-rock2-som.dtsi
@@ -43,7 +43,7 @@

 / {
memory {
-   reg = <0x0 0x8000>;
+   reg = <0x0 0x0 0x0 0x8000>;
device_type = "memory";
};

diff --git a/arch/arm/dts/rk3288-tinker.dtsi b/arch/arm/dts/rk3288-tinker.dtsi
index 46460ae455e2..62b4beb25100 100644
--- a/arch/arm/dts/rk3288-tinker.dtsi
+++ b/arch/arm/dts/rk3288-tinker.dtsi
@@ -44,7 +44,7 @@
 / {
memory {
device_type = "memory";
-   reg = <0x0 0x8000>;
+   reg = <0x0 0x0 0x0 0x8000>;
};

ext_gmac: external-gmac-clock {
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index c4c5a2d225c4..a43d320ade7b 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -29,10 +29,10 @@

dmc: dmc@ff61 {
compatible = "rockchip,rk3288-dmc", "syscon";
-   reg = <0xff61 0x3fc
-  0xff62 0x294
-  0xff63 0x3fc
-  0xff64 0x294>;
+   reg = <0x0 0xff61 0x0 0x3fc
+  0x0 0xff62 0x0 0x294
+  0x0 0xff63 0x0 0x3fc
+  0x0 0xff64 0x0 0x294>;
clocks = < PCLK_DDRUPCTL0>, < PCLK_PUBL0>,
 < PCLK_DDRUPCTL1>, < PCLK_PUBL1>,
 < ARMCLK>;
@@ -50,7 +50,7 @@

noc: syscon@ffac {
compatible = "rockchip,rk3288-noc", "syscon";
-   reg = <0xffac 0x2000>;
+   reg = <0x0 0xffac 0x0 0x2000>;
bootph-all;
};
 };
@@ -134,3 +134,7 @@
  {
bootph-all;
 };
+
+ {
+   bootph-all;
+};
diff --git a/arch/arm/dts/rk3288-veyron.dtsi b/arch/arm/dts/rk3288-veyron.dtsi
index 434b0d49

Re: [PATCH 13/17] video: rockchip: Add rk3328 vop support

[Johan Jonker]

Hi Jagan,

In  your patch U-boot users must add a new file for each new Rockchip SoC.

With the VOP2 introduction the VOP1 structures and functions are 
frozen/stabilized.

My proposal would be to use a file simular to Linux rockchip_vop_reg.c and port 
it to U-boot as is done in the manufacturer tree.

Together with a simple basic rockchip_vop.c to start with.

Not sure if we need a kind of DRM frame work.

Question: What do the U-boot maintainers think of this DRM implementation in 
use by Rockchip. Is that a route that useful for mainline?

Let me know your ideas.

Johan


On 12/11/23 09:59, Jagan Teki wrote:
> From: Jagan Teki 
>
> Add support for Rockchip RK3328 VOP.
>
> Signed-off-by: Jagan Teki 
> ---
>  drivers/video/rockchip/Makefile |  1 +
>  drivers/video/rockchip/rk3328_vop.c | 66 +
>  2 files changed, 67 insertions(+)
>  create mode 100644 drivers/video/rockchip/rk3328_vop.c
>
> diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile
> index 4991303c73..f55beceebf 100644
> --- a/drivers/video/rockchip/Makefile
> +++ b/drivers/video/rockchip/Makefile
> @@ -6,6 +6,7 @@
>  ifdef CONFIG_VIDEO_ROCKCHIP
>  obj-y += rk_vop.o
>  obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288_vop.o
> +obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328_vop.o
>  obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399_vop.o
>  obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o
>  obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o
> diff --git a/drivers/video/rockchip/rk3328_vop.c 
> b/drivers/video/rockchip/rk3328_vop.c
> new file mode 100644
> index 00..2512314e64
> --- /dev/null
> +++ b/drivers/video/rockchip/rk3328_vop.c
> @@ -0,0 +1,66 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "rk_vop.h"
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +static void rk3328_set_pin_polarity(struct udevice *dev,
> + enum vop_modes mode, u32 polarity)
> +{
> + struct rk_vop_priv *priv = dev_get_priv(dev);
> + struct rk3288_vop *regs = priv->regs;
> +
> + switch (mode) {
> + case VOP_MODE_HDMI:
> + clrsetbits_le32(>dsp_ctrl1,
> + M_RK3399_DSP_HDMI_POL,
> + V_RK3399_DSP_HDMI_POL(polarity));
> + break;
> + default:
> + debug("%s: unsupported output mode %x\n", __func__, mode);
> + }
> +}
> +
> +static int rk3328_vop_probe(struct udevice *dev)
> +{
> + /* Before relocation we don't need to do anything */
> + if (!(gd->flags & GD_FLG_RELOC))
> + return 0;
> +
> + return rk_vop_probe(dev);
> +}
> +
> +struct rkvop_driverdata rk3328_driverdata = {
> + .dsp_offset = 0x490,
> + .win_offset = 0xd0,
> + .features = VOP_FEATURE_OUTPUT_10BIT,
> + .set_pin_polarity = rk3328_set_pin_polarity,
> +};
> +
> +static const struct udevice_id rk3328_vop_ids[] = {
> + {
> + .compatible = "rockchip,rk3328-vop",
> + .data = (ulong)_driverdata
> + },
> + { /* sentile */ }
> +};
> +
> +static const struct video_ops rk3328_vop_ops = {
> +};
> +
> +U_BOOT_DRIVER(rk3328_vop) = {
> + .name   = "rk3328_vop",
> + .id = UCLASS_VIDEO,
> + .of_match = rk3328_vop_ids,
> + .ops= _vop_ops,
> + .bind   = rk_vop_bind,
> + .probe  = rk3328_vop_probe,
> + .priv_auto  = sizeof(struct rk_vop_priv),
> +};

Re: [tom.r...@gmail.com: Fwd: New Defects reported by Coverity Scan for Das U-Boot]

[Johan Jonker]

Hi Tom, Simon,

Please have a look some comments below at 3 issues that are introduced by 
meself. ;)

On 11/6/23 21:27, Tom Rini wrote:
> Hey all,
> 
> Here's the latest report. I _think_ I passed the right options to
> get_maintainer.pl such that it would only look far enough back in git to
> find the likely authors (along with listed maintainers of the files).
> 
> -- Forwarded message -
> From: 
> Date: Mon, Nov 6, 2023 at 2:58 PM
> Subject: New Defects reported by Coverity Scan for Das U-Boot
> To: 
> 
> 
> Hi,
> 
> Please find the latest report on new defect(s) introduced to Das
> U-Boot found with Coverity Scan.
> 
> 13 new defect(s) introduced to Das U-Boot found with Coverity Scan.
> 5 defect(s), reported by Coverity Scan earlier, were marked fixed in
> the recent build analyzed by Coverity Scan.
> 
> New defect(s) Reported-by: Coverity Scan
> Showing 13 of 13 defect(s)
> 
> 
> ** CID 467411:  Memory - corruptions  (OVERRUN)
> 
> 
> 

[..]

> *** CID 467407:  Uninitialized variables  (UNINIT)
> /drivers/scsi/scsi.c: 612 in do_scsi_scan_one()
> 606
> 607 bdesc = dev_get_uclass_plat(bdev);
> 608 bdesc->target = id;
> 609 bdesc->lun = lun;
> 610 bdesc->removable = bd.removable;
> 611 bdesc->type = bd.type;
 CID 467407:  Uninitialized variables  (UNINIT)
 Using uninitialized value "bd.bb".
> 612 bdesc->bb = bd.bb;
> 613 memcpy(>vendor, , sizeof(bd.vendor));
> 614 memcpy(>product, , sizeof(bd.product));
> 615 memcpy(>revision, ,  sizeof(bd.revision));
> 616 if (IS_ENABLED(CONFIG_SYS_BIG_ENDIAN)) {
> 617 ata_swap_buf_le16((u16 *)>vendor,
> sizeof(bd.vendor) / 2);
> 
> ** CID 467406:  Memory - corruptions  (OVERRUN)
> 
> 

Scsi devices are not my thing.
I'm forced to poke in drivers, because someone else is plumbing bounce buffer 
code to our block class.


Introduced by:
[PATCH v5 4/8] rockchip: block: blk-uclass: add bounce buffer flag to blk_desc
https://lore.kernel.org/u-boot/ee332375-8812-8e12-da1c-9973d10a4...@gmail.com/

static void scsi_init_dev_desc_priv(struct blk_desc *dev_desc)
{
[..]

#if IS_ENABLED(CONFIG_BOUNCE_BUFFER)
dev_desc->bb = true;
#endif  /* CONFIG_BOUNCE_BUFFER */
}

[..]
struct blk_desc bd;

scsi_init_dev_desc_priv();

bdesc->bb = bd.bb;
===
https://www.kernel.org/doc/html/latest/dev-tools/checkpatch.html

GLOBAL_INITIALISERS

Global variables should not be initialized explicitly to 0 (or NULL, false, 
etc.). Your compiler (or rather your loader, which is responsible for zeroing 
out the relevant sections) automatically does it for you.
INITIALISED_STATIC

Static variables should not be initialized explicitly to zero. Your 
compiler (or rather your loader) automatically does it for you.

===
I assumed that variables are always zeroed in the blk_desc structure.
The value of bb only matters if IS_ENABLED(CONFIG_BOUNCE_BUFFER).

For scsi:
dev_desc->bb = IS_ENABLED(CONFIG_BOUNCE_BUFFER) ? true : false;

The scsi block class worked fine for years without bounce buffer. Do all scsi 
devices need that buffer all of a sudden? What didn't work then?

Please advise what is the best approach.

===
There is a patch in review that changes this file. Better let that go in first 
before changing something here. What's the status?

[PATCH] scsi: Forceably finish migration to DM_SCSI
https://lore.kernel.org/u-boot/20231028005951.1187616-1-tr...@konsulko.com/

> 

[..]

> 
> *** CID 467402:(CHECKED_RETURN)
> /drivers/block/rkmtd.c: 737 in rkmtd_init_plat()
> 731
> 732 debug("starting_lba   : %llu\n",
> le64_to_cpu(plat->gpt_e->starting_lba));
> 733 debug("ending_lba : %llu\n",
> le64_to_cpu(plat->gpt_e->ending_lba));
> 734
> 735 memcpy(plat->gpt_e->partition_type_guid.b,
> _basic_data_guid, 16);
> 736


 CID 467402:(CHECKED_RETURN)
 Calling "uuid_str_to_bin" without checking return value (as is done 
 elsewhere 9 out of 11 times).
> 737 uuid_str_to_bin(plat->uuid_part_str,
> plat->gpt_e->unique_partition_guid.b,
> 738 UUID_STR_FORMAT_GUID);

Comment 2:

gen_rand_uuid_str(plat->uuid_disk_str, UUID_STR_FORMAT_GUID);
uuid_str_to_bin(plat->uuid_part_str, 
plat->gpt_e->unique_partition_guid.b,
UUID_STR_FORMAT_GUID);


The function uuid_str_to_bin() gets a string from gen_rand_uuid_str() which is 
guarantied correct.
Checking the output is unnecessary. 
 
if (!uuid_str_valid(uuid_str)) {
return 

[PATCH v3] rockchip: include: asm: fix entering download mode rk3066

[Johan Jonker]

Keep track of the re-entries with help of the lr register.
This binary can be re-used and called from various BROM functions.
Only when it's called from the part that handles SPI, NAND or EMMC
hardware it needs to early return to BROM ones.
In download mode when it handles data on USB OTG and UART0
this section must be skipped.

Unlike newer Rockchip SoC models the rk3066 BROM code does not have built-in
support to enter download mode on return to BROM. This binary must check
the boot mode register for the BOOT_BROM_DOWNLOAD flag and reset if it's set.
It then returns to BROM to the end of the function that reads boot blocks.
>From there the BROM code goes into a download mode and waits for data
on USB OTG and UART0.

Signed-off-by: Johan Jonker 
---

Note:
  Normal U-boot flow is OK.
  In download mode this binary hangs after return to BROM for unknown reasons.
  Replace CODE471_OPTION with 30_LPDDR2_300MHz_DD.bin for now.

Changed V3:
  Kconfig option for rk3066 only
  Restyle

Changed V2:
  Move file to rk3066 specific location
  Replace retry_counter by LR check
  Add DNL mode return address
  Restyle
  Reword
---
 arch/arm/include/asm/arch-rk3066/boot0.h | 77 +++-
 arch/arm/mach-rockchip/Kconfig   |  2 +-
 arch/arm/mach-rockchip/rk3066/Kconfig|  8 +++
 3 files changed, 85 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-rk3066/boot0.h 
b/arch/arm/include/asm/arch-rk3066/boot0.h
index 28c0fb9a4c6b..6bf3828c84e9 100644
--- a/arch/arm/include/asm/arch-rk3066/boot0.h
+++ b/arch/arm/include/asm/arch-rk3066/boot0.h
@@ -3,6 +3,81 @@
 #ifndef __ASM_ARCH_BOOT0_H__
 #define __ASM_ARCH_BOOT0_H__

-#include 
+#include 

+/*
+ * Execution starts on the instruction following this 4-byte header
+ * (containing the magic 'RK30'). This magic constant will be written into
+ * the final image by the rkimage tool, but we need to reserve space for it 
here.
+ */
+#ifdef CONFIG_SPL_BUILD
+   b   1f  /* if overwritten, entry-address is at the next word */
+1:
+#endif
+
+#if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
+/*
+ * Keep track of the re-entries with help of the lr register.
+ * This binary can be re-used and called from various BROM functions.
+ * Only when it's called from the part that handles SPI, NAND or EMMC
+ * hardware it needs to early return to BROM ones.
+ * In download mode when it handles data on USB OTG and UART0
+ * this section must be skipped.
+ */
+   ldr r3, =CONFIG_ROCKCHIP_BOOT_LR_REG
+   cmp lr, r3  /* if (LR != CONFIG_ROCKCHIP_BOOT_LR_REG)   
 */
+   bne reset   /* goto reset;  
 */
+/*
+ * Unlike newer Rockchip SoC models the rk3066 BROM code does not have built-in
+ * support to enter download mode on return to BROM. This binary must check
+ * the boot mode register for the BOOT_BROM_DOWNLOAD flag and reset if it's 
set.
+ * It then returns to BROM to the end of the function that reads boot blocks.
+ * From there the BROM code goes into a download mode and waits for data
+ * on USB OTG and UART0.
+ */
+   ldr r2, =BOOT_BROM_DOWNLOAD
+   ldr r3, =CONFIG_ROCKCHIP_BOOT_MODE_REG
+   ldr r0, [r3]/* if (readl(CONFIG_ROCKCHIP_BOOT_MODE_REG) !=  
 */
+   cmp r0, r2  /* BOOT_BROM_DOWNLOAD) {
 */
+   bne early_return/* goto early_return;   
 */
+   /* } else { 
 */
+   mov r0, #0
+   str r0, [r3]/* writel(0, 
CONFIG_ROCKCHIP_BOOT_MODE_REG); */
+
+   ldr r3, =CONFIG_ROCKCHIP_BOOT_RETURN_REG
+   bx  r3  /* return to 
CONFIG_ROCKCHIP_BOOT_RETURN_REG;*/
+   /* }
 */
+early_return:
+   bx  lr  /* return to LR in BROM 
 */
+
+SAVE_SP_ADDR:
+   .word 0
+
+   .globl save_boot_params
+save_boot_params:
+   push{r1-r12, lr}
+   ldr r0, =SAVE_SP_ADDR
+   str sp, [r0]
+   b   save_boot_params_ret
+
+   .globl back_to_bootrom
+back_to_bootrom:
+   ldr r0, =SAVE_SP_ADDR
+   ldr sp, [r0]
+   mov r0, #0
+   pop {r1-r12, pc}
+#endif
+
+#if (defined(CONFIG_SPL_BUILD))
+/* U-Boot proper of armv7 does not need this */
+   b reset
+#endif
+
+/*
+ * For armv7, the addr '_start' will be used as vector start address
+ * and is written to the VBAR register, which needs to aligned to 0x20.
+ */
+   .align(5), 0x0
+_start:
+   ARM_VECTORS
 #endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index c43c185c17c5..6c56324f66bc 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -401,7 +401,7 @@ config SPL_ROCKCHIP_BACK_TO_BROM
 config TPL_ROCKCHIP_BACK_TO_BROM
bool "TPL returns to

Re: [RESEND PATCH v2] rockchip: include: asm: fix entering download mode rk3066

[Johan Jonker]

Hi Tom, Simon,

The test for my patch ends with an error that is reported on various locations 
on the internet.
My knowledge is limited here. Could you have a look?

Thanks,

Johan



rockchip: include: asm: fix entering download mode rk3066 
https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/18283

Error log:
https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/720456

Error message:
Cleaning up project directory and file based variables 00:03
ERROR: Job failed: exit code 100

===

Reported examples elsewhere:

Runner stops at random place with "Cleaning up project directory and file based 
variables" even if there is no error
https://gitlab.com/gitlab-org/gitlab/-/issues/373265

Gitlab CI/CD fails while "Cleaning up project directory and file based 
variables" with "ERROR: Job failed: exit code 1"
https://stackoverflow.com/questions/69411379/gitlab-ci-cd-fails-while-cleaning-up-project-directory-and-file-based-variables

On 10/24/23 11:16, Kever Yang wrote:
> Hi Johan,
> 
>     I don't have a detail build error message, but this patch do cause the 
> 32bit ARM platforms build fail in[1];
> 
> Hi Tom,
> 
>     Could you help the take a look, what's the error happen in this case?
> 
> 
> Thanks,
> - Kever
> 
> [1] https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/719987
> 
> On 2023/9/19 23:28, Johan Jonker wrote:
>> Keep track of the re-entries with help of the lr register.
>> This binary can be re-used and called from various BROM functions.
>> Only when it's called from the part that handles SPI, NAND or EMMC
>> hardware it needs to early return to BROM ones.
>> In download mode when it handles data on USB OTG and UART0
>> this section must be skipped.
>>
>> Unlike newer Rockchip SoC models the rk3066 BROM code does not have built-in
>> support to enter download mode on return to BROM. This binary must check
>> the boot mode register for the BOOT_BROM_DOWNLOAD flag and reset if it's set.
>> It then returns to BROM to the end of the function that reads boot blocks.
>> >From there the BROM code goes into a download mode and waits for data
>> on USB OTG and UART0.
>>
>> Signed-off-by: Johan Jonker 
>> ---
>>
>> Note:
>>    Normal boot flow is OK.
>>    In download mode this binary hangs after return to BROM for unknown 
>> reasons.
>>    Replace CODE471_OPTION with 30_LPDDR2_300MHz_DD.bin for now.
>>
>>    Could Rockchip disclose what further conditions must be met
>>    in rk3066 download mode?
>>
>> Changed V2:
>>    Move file to rk3066 specific location
>>    Replace retry_counter by LR check
>>    Add DNL mode return address
>>    Restyle
>>    Reword
>> ---
>>   arch/arm/include/asm/arch-rk3066/boot0.h | 77 +++-
>>   arch/arm/mach-rockchip/Kconfig   | 17 +-
>>   arch/arm/mach-rockchip/rk3066/Kconfig    |  6 ++
>>   3 files changed, 98 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/include/asm/arch-rk3066/boot0.h 
>> b/arch/arm/include/asm/arch-rk3066/boot0.h
>> index 28c0fb9a4c6b..1af4b9c1d7ba 100644
>> --- a/arch/arm/include/asm/arch-rk3066/boot0.h
>> +++ b/arch/arm/include/asm/arch-rk3066/boot0.h
>> @@ -3,6 +3,81 @@
>>   #ifndef __ASM_ARCH_BOOT0_H__
>>   #define __ASM_ARCH_BOOT0_H__
>>
>> -#include 
>> +#include 
>>
>> +/*
>> + * Execution starts on the instruction following this 4-byte header
>> + * (containing the magic 'RK30'). This magic constant will be written into
>> + * the final image by the rkimage tool, but we need to reserve space for it 
>> here.
>> + */
>> +#ifdef CONFIG_SPL_BUILD
>> +    b    1f  /* if overwritten, entry-address is at the next word */
>> +1:
>> +#endif
>> +
>> +#if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
>> +/*
>> + * Keep track of the re-entries with help of the lr register.
>> + * This binary can be re-used and called from various BROM functions.
>> + * Only when it's called from the part that handles SPI, NAND or EMMC
>> + * hardware it needs to early return to BROM ones.
>> + * In download mode when it handles data on USB OTG and UART0
>> + * this section must be skipped.
>> + */
>> +    ldr    r3, =CONFIG_ROCKCHIP_BOOT_LR_REG
>> +    cmp    lr, r3  /* if (LR != CONFIG_ROCKCHIP_BOOT_LR_REG)    
>> */
>> +    bne    reset   /* goto reset;   
>> */
>> +/*
>> + * Unlike newer Rockchip SoC models the rk3066 BROM code does not have 
>> built-in
>> + * supp

[PATCH v5 8/8] rockchip: configs: sandbox: enable rkmtd command

[Johan Jonker]

Enable rkmtd command for testing with sandbox_defconfig
and sandbox64_defconfig.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---

Changed V3:
  New patch
---
 configs/sandbox64_defconfig | 1 +
 configs/sandbox_defconfig   | 1 +
 2 files changed, 2 insertions(+)

diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 1a033b22018b..1a01f51a0b75 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -58,6 +58,7 @@ CONFIG_CMD_REMOTEPROC=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_TEMPERATURE=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_RKMTD=y
 CONFIG_CMD_WDT=y
 CONFIG_CMD_WRITE=y
 CONFIG_CMD_CAT=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 01830c7bd255..cc54e6dec5af 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -84,6 +84,7 @@ CONFIG_CMD_REMOTEPROC=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_TEMPERATURE=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_RKMTD=y
 CONFIG_CMD_WDT=y
 CONFIG_CMD_WRITE=y
 CONFIG_CMD_AXI=y
--
2.39.2

[PATCH v5 7/8] rockchip: doc: add rkmtd.rst

[Johan Jonker]

Add documention for Rockchip rkmtd virtual block device.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
Reviewed-by: Simon Glass 
---

Changed V3:
  New patch
---
 doc/board/rockchip/index.rst |   1 +
 doc/board/rockchip/rkmtd.rst | 105 +++
 2 files changed, 106 insertions(+)
 create mode 100644 doc/board/rockchip/rkmtd.rst

diff --git a/doc/board/rockchip/index.rst b/doc/board/rockchip/index.rst
index 0c377e9bbba0..9a87a035e95e 100644
--- a/doc/board/rockchip/index.rst
+++ b/doc/board/rockchip/index.rst
@@ -8,3 +8,4 @@ Rockchip
:maxdepth: 2

rockchip
+   rkmtd
diff --git a/doc/board/rockchip/rkmtd.rst b/doc/board/rockchip/rkmtd.rst
new file mode 100644
index ..1481380ba6c5
--- /dev/null
+++ b/doc/board/rockchip/rkmtd.rst
@@ -0,0 +1,105 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2023 Johan Jonker 
+
+RKMTD
+=
+
+Info
+
+
+The command rkmtd creates a virtual block device to transfer
+Rockchip boot block data to and from NAND with block orientated
+tools like "ums" and "rockusb".
+
+It uses the Rockchip MTD driver to scan for boot blocks and copies
+data from the first block in a GPT formatted virtual disk.
+Data must be written in U-boot "idbloader.img" format and start at
+partition "loader1" offset 64. The data header is parsed
+for length and offset. When the last sector is received
+it erases up to 5 erase blocks on NAND and writes boot blocks
+in a pattern depending on the NAND ID. Data is then verified.
+When a block turns out bad the block header is discarded.
+
+Limitations
+---
+
+- Support with CONFIG_ROCKCHIP_NAND MTD driver only.
+- Support for Rockchip boot block header type 1 only.
+- Pattern for listed NAND IDs only. (Logic still not disclosed by Rockchip)
+- The MTD framework driver data and NAND ID must be extracted at a lower level.
+
+Available rkmtd commands
+
+
+.. code-block:: bash
+
+rkmtd bind   - bind RKMTD device
+rkmtd unbind - unbind RKMTD device
+rkmtd info []- show all available RKMTD devices
+rkmtd dev [] - show or set current RKMTD device
+
+U-boot settings
+---
+
+Config to enable Rockchip MTD support:
+
+.. code-block:: bash
+
+CONFIG_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_ROCKCHIP_NAND=y
+
+Option to keep existing NAND data unchanged:
+
+.. code-block:: bash
+
+CONFIG_ROCKCHIP_NAND_SKIP_BBTSCAN=y
+
+Commands to enable:
+
+.. code-block:: bash
+
+CONFIG_CMD_USB=y
+CONFIG_CMD_RKMTD=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+
+Linux Host (PC) tool commands combinations that work
+
+
+.. table::
+   :widths: 20 44
+
+    
+   U-boot   Linux
+    
+   rkmtd bind 0
+   rockusb 0 rkmtd 0
+upgrade_tool pl
+
+upgrade_tool rl 64 512 idbloader_backup.img
+
+upgrade_tool wl 64 idbloader.img
+
+upgrade_tool rd
+
+rkdeveloptool ppt
+
+rkdeveloptool rl 64 512 idbloader_backup.img
+
+rkdeveloptool wlx loader1 idbloader.img
+
+rkdeveloptool wl 64 idbloader.img
+
+rkdeveloptool rd
+
+rkflashtool r 64 512 > idbloader_backup.img
+
+rkflashtool w 64 512 < idbloader.img
+   ums 0 rkmtd 0
+dd if=/dev/sda1 of=idbloader_backup.img
+
+dd if=idbloader.img of=/dev/sda1
+    
--
2.39.2

[PATCH v5 6/8] rockchip: test: dm: add rkmtd test

[Johan Jonker]

Add Rockchip rkmtd test:
Create/attach/detach RKMTD device.
Send/read data with Rockchip boot block header.
Test that reusing the same label should work.
Basic test of 'rkmtd' commands.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
Reviewed-by: Simon Glass 
---

Changed V4:
  sort includes
  rename define
  use '\0'
  use UT_TESTF_CONSOLE_REC flag
  check RC4 result

Changed V3:
  New patch
---
 test/dm/Makefile |   1 +
 test/dm/rkmtd.c  | 200 +++
 2 files changed, 201 insertions(+)
 create mode 100644 test/dm/rkmtd.c

diff --git a/test/dm/Makefile b/test/dm/Makefile
index 7ed00733c1a6..a5e0a2744375 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -100,6 +100,7 @@ obj-$(CONFIG_REMOTEPROC) += remoteproc.o
 obj-$(CONFIG_DM_RESET) += reset.o
 obj-$(CONFIG_SYSRESET) += sysreset.o
 obj-$(CONFIG_DM_REGULATOR) += regulator.o
+obj-$(CONFIG_CMD_RKMTD) += rkmtd.o
 obj-$(CONFIG_DM_RNG) += rng.o
 obj-$(CONFIG_DM_RTC) += rtc.o
 obj-$(CONFIG_SCMI_FIRMWARE) += scmi.o
diff --git a/test/dm/rkmtd.c b/test/dm/rkmtd.c
new file mode 100644
index ..3c3e8efa92f2
--- /dev/null
+++ b/test/dm/rkmtd.c
@@ -0,0 +1,200 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Test derived from:
+ * /test/dm/host.c
+ * Copyright 2022 Google LLC
+ * Written by Simon Glass 
+ *
+ * Copyright (C) 2023 Johan Jonker 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define RW_BUF_SIZE12 * 512
+
+/* Basic test of the RKMTD interface */
+static int dm_test_rkmtd(struct unit_test_state *uts)
+{
+   struct udevice *dev, *part, *chk, *blk;
+   char write[RW_BUF_SIZE], read[RW_BUF_SIZE];
+   static const char label[] = "test";
+   struct rkmtd_dev *plat;
+   struct blk_desc *desc;
+   struct sector0 *sec0;
+   int i;
+
+   ut_asserteq(-ENODEV, uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq(-ENODEV, uclass_first_device_err(UCLASS_PARTITION, ));
+
+   ut_assertok(rkmtd_create_device(label, ));
+
+   /* Check that the plat data has been allocated */
+   plat = dev_get_plat(dev);
+   ut_asserteq_str("test", plat->label);
+   ut_assert(label != plat->label);
+
+   /* Attach RKMTD driver */
+   ut_assertok(rkmtd_attach(dev));
+   ut_assertok(uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq_ptr(chk, dev);
+
+   /* Get RKMTD block device */
+   ut_assertok(blk_get_from_parent(dev, ));
+   ut_assertok(device_probe(blk));
+
+   /* There should be a GPT partition table in this device */
+   ut_asserteq(0, uclass_first_device_err(UCLASS_PARTITION, ));
+
+   /* Write a boot block and verify that we get the same data back */
+   desc = dev_get_uclass_plat(blk);
+   ut_asserteq(true, desc->removable);
+   ut_asserteq(LBA, desc->lba);
+
+   memset(write, '\0', BLK_SIZE);
+
+   for (i = BLK_SIZE; i < sizeof(write); i++)
+   write[i] = i;
+
+   sec0 = (struct sector0 *)write;
+   sec0->magic = 0x0FF0AA55;
+   sec0->rc4_flag = 0;
+   sec0->boot_code1_offset = 4;
+   sec0->boot_code2_offset = 4;
+   sec0->flash_data_size = 4;
+   sec0->flash_boot_size = 8;
+
+   rkmtd_rc4(write, 512);
+   ut_asserteq(RK_TAG, sec0->magic);
+
+   ut_asserteq(12, blk_dwrite(desc, 64, 12, write));
+   ut_asserteq(12, blk_dread(desc, 64, 12, read));
+   ut_asserteq_mem(write, read, RW_BUF_SIZE);
+
+   ut_assertok(rkmtd_detach(dev));
+
+   ut_asserteq(-ENODEV, blk_get_from_parent(dev, ));
+   ut_assertok(device_unbind(dev));
+
+   return 0;
+}
+DM_TEST(dm_test_rkmtd, UT_TESTF_SCAN_FDT);
+
+/* Reusing the same label should work */
+static int dm_test_rkmtd_dup(struct unit_test_state *uts)
+{
+   static const char label[] = "test";
+   struct udevice *dev, *chk;
+
+   /* Create a RKMTD device with label "test" */
+   ut_asserteq(0, uclass_id_count(UCLASS_RKMTD));
+   ut_assertok(rkmtd_create_device(label, ));
+   ut_assertok(rkmtd_attach(dev));
+   ut_assertok(uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq_ptr(chk, dev);
+   ut_asserteq(1, uclass_id_count(UCLASS_RKMTD));
+
+   /* Create another device with the same label (should remove old one) */
+   ut_assertok(rkmtd_create_device(label, ));
+   ut_assertok(rkmtd_attach(dev));
+   ut_assertok(uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq_ptr(chk, dev);
+
+   /* Make sure there is still only one device */
+   ut_asserteq(1, uclass_id_count(UCLASS_RKMTD));
+
+   return 0;
+}
+DM_TEST(dm_test_rkmtd_dup, UT_TESTF_SCAN_FDT);
+
+/* Basic test of the 'rkmtd' command */
+static int dm_test_rkmtd_cmd(struct unit_test_state *uts)
+{
+   struct udevice *dev, *blk;
+   struct blk_desc *desc;
+
+   /* First check 

[PATCH v5 5/8] rockchip: cmd: add rkmtd command

[Johan Jonker]

The command rkmtd creates a virtual block device to transfer
Rockchip boot block data to and from NAND with block orientated
tools like "ums" and "rockusb".

It uses the Rockchip MTD driver to scan for boot blocks and copies
data from the first block in a GPT formated virtual disk.
Data must be written in U-boot "idbloader.img" format and start at
partition "loader1" offset 64. The data header is parsed
for length and offset. When the last sector is received
it erases up to 5 erase blocks on NAND and writes bootblocks
in a pattern depending on the NAND ID. Data is then verified.
When a block turns out bad the block header is discarded.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---

Changed V4:
  Sort includes

Changed V3:
  Split driver from command
  Split header
  Restyle
---
 cmd/Kconfig  |   8 ++
 cmd/Makefile |   1 +
 cmd/rkmtd.c  | 204 +++
 3 files changed, 213 insertions(+)
 create mode 100644 cmd/rkmtd.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6470b138d2f8..1979c6c62aa7 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1561,6 +1561,14 @@ config CMD_USB_SDP
  Enables the command "sdp" which is used to have U-Boot emulating the
  Serial Download Protocol (SDP) via USB.

+config CMD_RKMTD
+   bool "rkmtd"
+   select RKMTD
+   help
+ Enable the command "rkmtd" to create a virtual block device to 
transfer
+ Rockchip boot block data to and from NAND with block orientated tools
+ like "ums" and "rockusb".
+
 config CMD_ROCKUSB
bool "rockusb"
depends on USB_FUNCTION_ROCKUSB
diff --git a/cmd/Makefile b/cmd/Makefile
index 9bebf321c397..11927a5904e6 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -151,6 +151,7 @@ obj-$(CONFIG_CMD_REISER) += reiser.o
 obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
 obj-$(CONFIG_CMD_RNG) += rng.o
 obj-$(CONFIG_CMD_KASLRSEED) += kaslrseed.o
+obj-$(CONFIG_CMD_RKMTD) += rkmtd.o
 obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_CMD_RTC) += rtc.o
 obj-$(CONFIG_SANDBOX) += host.o
diff --git a/cmd/rkmtd.c b/cmd/rkmtd.c
new file mode 100644
index ..5b80427cb949
--- /dev/null
+++ b/cmd/rkmtd.c
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *
+ * Driver interface derived from:
+ * /cmd/host.c
+ * Copyright (c) 2012, Google Inc.
+ *
+ * Copyright (C) 2023 Johan Jonker 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int do_rkmtd_bind(struct cmd_tbl *cmdtp, int flag, int argc,
+char *const argv[])
+{
+   struct udevice *dev;
+   const char *label;
+   int ret;
+
+   argc--;
+   argv++;
+
+   if (argc < 1)
+   return CMD_RET_USAGE;
+
+   if (argc > 1)
+   return CMD_RET_USAGE;
+
+   label = argv[0];
+   ret = rkmtd_create_attach_mtd(label, );
+   if (ret) {
+   printf("Cannot create device / bind mtd\n");
+   return CMD_RET_FAILURE;
+   }
+
+   return 0;
+}
+
+static struct udevice *parse_rkmtd_label(const char *label)
+{
+   struct udevice *dev;
+
+   dev = rkmtd_find_by_label(label);
+   if (!dev) {
+   int devnum;
+   char *ep;
+
+   devnum = hextoul(label, );
+   if (*ep ||
+   uclass_find_device_by_seq(UCLASS_RKMTD, devnum, )) {
+   printf("No such device '%s'\n", label);
+   return NULL;
+   }
+   }
+
+   return dev;
+}
+
+static int do_rkmtd_unbind(struct cmd_tbl *cmdtp, int flag, int argc,
+  char *const argv[])
+{
+   struct udevice *dev;
+   const char *label;
+   int ret;
+
+   if (argc < 2)
+   return CMD_RET_USAGE;
+
+   label = argv[1];
+   dev = parse_rkmtd_label(label);
+   if (!dev)
+   return CMD_RET_FAILURE;
+
+   ret = rkmtd_detach(dev);
+   if (ret) {
+   printf("Cannot detach mtd\n");
+   return CMD_RET_FAILURE;
+   }
+
+   ret = device_unbind(dev);
+   if (ret) {
+   printf("Cannot unbind device '%s'\n", dev->name);
+   return CMD_RET_FAILURE;
+   }
+
+   return 0;
+}
+
+static void show_rkmtd_dev(struct udevice *dev)
+{
+   struct rkmtd_dev *plat = dev_get_plat(dev);
+   struct blk_desc *desc;
+   struct udevice *blk;
+   int ret;
+
+   printf("%3d ", dev_seq(dev));
+
+   ret = blk_get_from_parent(dev, );
+   if (ret)
+   return;
+
+   desc = dev_get_uclass_plat(blk);
+   printf("%12lu %-15s\n", (unsigned long)desc->lba, plat->label);
+}
+
+static int do_rkmtd_info(struct cmd_tbl *cmdtp, int flag, int argc,
+   

[PATCH v5 4/8] rockchip: block: blk-uclass: add bounce buffer flag to blk_desc

[Johan Jonker]

Currently bounce buffer support is enabled for all block devices
when available. Add a flag to blk_desc to enable only on demand.

Signed-off-by: Johan Jonker 
---

Changed V5:
  New patch
---
 drivers/block/blk-uclass.c | 4 ++--
 drivers/scsi/scsi.c| 4 
 include/blk.h  | 1 +
 3 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 30ad5bbb0024..77066da352a3 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -441,7 +441,7 @@ long blk_read(struct udevice *dev, lbaint_t start, lbaint_t 
blkcnt, void *buf)
  start, blkcnt, desc->blksz, buf))
return blkcnt;

-   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER)) {
+   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER) && desc->bb) {
struct blk_bounce_buffer bbstate = { .dev = dev };
int ret;

@@ -478,7 +478,7 @@ long blk_write(struct udevice *dev, lbaint_t start, 
lbaint_t blkcnt,

blkcache_invalidate(desc->uclass_id, desc->devnum);

-   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER)) {
+   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER) && desc->bb) {
struct blk_bounce_buffer bbstate = { .dev = dev };
int ret;

diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c
index 7411660d465e..779a34bd2f1c 100644
--- a/drivers/scsi/scsi.c
+++ b/drivers/scsi/scsi.c
@@ -459,6 +459,9 @@ static void scsi_init_dev_desc_priv(struct blk_desc 
*dev_desc)
dev_desc->product[0] = 0;
dev_desc->revision[0] = 0;
dev_desc->removable = false;
+#if IS_ENABLED(CONFIG_BOUNCE_BUFFER)
+   dev_desc->bb = true;
+#endif /* CONFIG_BOUNCE_BUFFER */
 }

 #if !defined(CONFIG_DM_SCSI)
@@ -606,6 +609,7 @@ static int do_scsi_scan_one(struct udevice *dev, int id, 
int lun, bool verbose)
bdesc->lun = lun;
bdesc->removable = bd.removable;
bdesc->type = bd.type;
+   bdesc->bb = bd.bb;
memcpy(>vendor, , sizeof(bd.vendor));
memcpy(>product, , sizeof(bd.product));
memcpy(>revision, ,  sizeof(bd.revision));
diff --git a/include/blk.h b/include/blk.h
index 76bd5baf9959..7c7cf7f2b102 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -68,6 +68,7 @@ struct blk_desc {
/* device can use 48bit addr (ATA/ATAPI v7) */
boollba48;
unsigned char   atapi;  /* Use ATAPI protocol */
+   unsigned char   bb; /* Use bounce buffer */
lbaint_tlba;/* number of blocks */
unsigned long   blksz;  /* block size */
int log2blksz;  /* for convenience: log2(blksz) */
--
2.39.2

[PATCH v5 3/8] rockchip: block: add rkmtd class and drivers

[Johan Jonker]

Add rkmtd class and drivers to create a virtual block device
to transfer Rockchip boot block data to and from NAND with
block orientated tools like "ums" and "rockusb".

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---

Changed V5:
  Use devres_alloc in bind
  Restyle

Changed V4:
  Sort includes
  Replace constant by define

Changed V3:
  New patch
  Split driver from command
  Split header
  Use devm_kzalloc
  Remove out of memory debug
  Restyle
---
 drivers/block/Kconfig  |7 +
 drivers/block/Makefile |2 +
 drivers/block/rkmtd.c  | 1152 
 include/rkmtd.h|  191 +++
 4 files changed, 1352 insertions(+)
 create mode 100644 drivers/block/rkmtd.c
 create mode 100644 include/rkmtd.h

diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index 1abea3f10db4..048a6caef00f 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -262,3 +262,10 @@ config SYS_64BIT_LBA
help
  Make the block subsystem use 64bit sector addresses, rather than the
  default of 32bit.
+
+config RKMTD
+   bool "Rockchip rkmtd virtual block device"
+   help
+ Enable "rkmtd" class and driver to create a virtual block device
+ to transfer Rockchip boot block data to and from NAND with block
+ orientate tools like "ums" and "rockusb".
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index a161d145fd39..fdcba5c8318f 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -11,6 +11,7 @@ endif

 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_IDE) += ide.o
+obj-$(CONFIG_RKMTD) += rkmtd.o
 endif
 obj-$(CONFIG_SANDBOX) += sandbox.o host-uclass.o host_dev.o
 obj-$(CONFIG_$(SPL_TPL_)BLOCK_CACHE) += blkcache.o
@@ -19,3 +20,4 @@ obj-$(CONFIG_BLKMAP) += blkmap.o
 obj-$(CONFIG_EFI_MEDIA) += efi-media-uclass.o
 obj-$(CONFIG_EFI_MEDIA_SANDBOX) += sb_efi_media.o
 obj-$(CONFIG_EFI_MEDIA_BLK) += efi_blk.o
+
diff --git a/drivers/block/rkmtd.c b/drivers/block/rkmtd.c
new file mode 100644
index ..c55f052e51b9
--- /dev/null
+++ b/drivers/block/rkmtd.c
@@ -0,0 +1,1152 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Some functions are derived from:
+ * 
https://github.com/rockchip-linux/u-boot/blob/next-dev/drivers/rknand/rk_ftl_arm_v7.S
+ * Copyright (c) 2016-2018, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Driver interface derived from:
+ * /drivers/block/host_dev.c
+ * /drivers/block/host-uclass.c
+ * Copyright 2022 Google LLC
+ * Written by Simon Glass 
+ *
+ * Copyright (C) 2023 Johan Jonker 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#if !IS_ENABLED(CONFIG_SANDBOX)
+#include 
+#endif
+#include 
+
+struct nand_para_info nand_para_tbl[] = {
+   {6, {0x2c, 0x64, 0x44, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x44, 0x44, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 1064, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x68, 0x04, 0x4a, 0xa9, 0x00}, 4, 1,  8,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x88, 0x04, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0xa8, 0x05, 0xcb, 0xa9, 0x00}, 4, 2, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x68, 0x04, 0x46, 0x89, 0x00}, 4, 1,  8,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x48, 0x04, 0x4a, 0xa5, 0x00}, 4, 1,  8,  256, 2, 2, 1024, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x84, 0x64, 0x3c, 0xa5, 0x00}, 4, 1, 32,  512, 2, 2, 1024, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x84, 0x64, 0x54, 0xa9, 0x00}, 4, 1, 32,  512, 2, 2, 1024, 
0x01df,  4, 18, 60, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0xd7, 0x94, 0x3e, 0x84, 0x00}, 4, 1,  8,  128, 2, 2, 4096, 
0x0117,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x48, 0x04, 0x46, 0x85, 0x00}, 4, 1,  8,  256, 2, 2, 1024, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x88, 0x05, 0xc6, 0x89, 0x00}, 4, 2,  8,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x88, 0x24, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x68, 0x00, 0x27, 0xa9, 0x00}, 4, 1, 16,  128, 1, 2, 2048, 
0x011f,  0,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x64, 0x64, 0x56, 0xa5, 0x00}, 4, 1, 24,  512, 2, 2,  700, 
0x01df,  4, 18, 60, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x84, 0xc5, 0x4b, 0xa9, 0x00}, 4, 2, 16,  256, 2, 2, 

[PATCH v5 2/8] rockchip: dm: prepare rkmtd UCLASS

[Johan Jonker]

Prepare a rkmtd UCLASS in use for writing Rockchip boot blocks
in combination with existing userspace tools and rockusb command.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---
 disk/part.c| 4 
 drivers/block/blk-uclass.c | 1 +
 include/dm/uclass-id.h | 1 +
 3 files changed, 6 insertions(+)

diff --git a/disk/part.c b/disk/part.c
index 85244b09f359..36b88205eca7 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -197,6 +197,7 @@ void dev_print(struct blk_desc *desc)
case UCLASS_PVBLOCK:
case UCLASS_HOST:
case UCLASS_BLKMAP:
+   case UCLASS_RKMTD:
printf ("Vendor: %s Rev: %s Prod: %s\n",
desc->vendor,
desc->revision,
@@ -330,6 +331,9 @@ static void print_part_header(const char *type, struct 
blk_desc *desc)
case UCLASS_PVBLOCK:
puts("PV BLOCK");
break;
+   case UCLASS_RKMTD:
+   puts("RKMTD");
+   break;
case UCLASS_VIRTIO:
puts("VirtIO");
break;
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index f126547cc7e6..30ad5bbb0024 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -36,6 +36,7 @@ static struct {
{ UCLASS_VIRTIO, "virtio" },
{ UCLASS_PVBLOCK, "pvblock" },
{ UCLASS_BLKMAP, "blkmap" },
+   { UCLASS_RKMTD, "rkmtd" },
 };

 static enum uclass_id uclass_name_to_iftype(const char *uclass_idname)
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 0432c95c9edc..2fc672df0a3a 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -120,6 +120,7 @@ enum uclass_id {
UCLASS_REGULATOR,   /* Regulator device */
UCLASS_REMOTEPROC,  /* Remote Processor device */
UCLASS_RESET,   /* Reset controller device */
+   UCLASS_RKMTD,   /* Rockchip MTD device */
UCLASS_RNG, /* Random Number Generator */
UCLASS_RTC, /* Real time clock device */
UCLASS_SCMI_AGENT,  /* Interface with an SCMI server */
--
2.39.2

[PATCH v5 1/8] mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN option

[Johan Jonker]

On Rockchip SoCs the first boot stages are written on NAND
with help of manufacturer software that uses a different format
then the MTD framework. Skip the automatic BBT scan with the
NAND_SKIP_BBTSCAN option to be able to pass the driver probe
function and to let the original data unchanged.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---
 drivers/mtd/nand/raw/Kconfig| 9 +
 drivers/mtd/nand/raw/rockchip_nfc.c | 3 +++
 2 files changed, 12 insertions(+)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index d624589a892b..72547f00fbec 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -611,6 +611,15 @@ config ROCKCHIP_NAND
NFC v800: RK3308, RV1108
NFC v900: PX30, RK3326

+config ROCKCHIP_NAND_SKIP_BBTSCAN
+   bool "Skip the automatic BBT scan with Rockchip NAND controllers"
+   depends on ROCKCHIP_NAND
+   default n
+   help
+ Skip the automatic BBT scan with the NAND_SKIP_BBTSCAN
+ option when data content is not in MTD format or
+ must remain unchanged.
+
 config TEGRA_NAND
bool "Support for NAND controller on Tegra SoCs"
depends on ARCH_TEGRA
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c 
b/drivers/mtd/nand/raw/rockchip_nfc.c
index 6ad51df4acff..df6742c2f9bb 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -981,6 +981,9 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc 
*nfc, int devnum)
chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;

+   if (IS_ENABLED(CONFIG_ROCKCHIP_NAND_SKIP_BBTSCAN))
+   chip->options |= NAND_SKIP_BBTSCAN;
+
rk_nfc_hw_init(nfc);
ret = nand_scan_ident(mtd, nsels, NULL);
if (ret)
--
2.39.2

[PATCH v5 0/8] Add rkmtd command

[Johan Jonker]

The command rkmtd creates a virtual block device to transfer
Rockchip boot block data to and from NAND with block orientated
tools like "ums" and "rockusb".

It uses the Rockchip MTD driver to scan for boot blocks and copies
data from the first block in a GPT formatted virtual disk.
Data must be written in U-boot "idbloader.img" format and start at
partition "loader1" offset 64. The data header is parsed
for length and offset. When the last sector is received
it erases up to 5 erase blocks on NAND and writes boot blocks
in a pattern depending on the NAND ID. Data is then verified.
When a block turns out bad the block header is discarded.

Changed V5:
  Add bounce buffer flag
  Use devres_alloc in bind
  Restyle

Changed V4:
  Sort includes
  Replace constant by define
  Enable rkmtd command in sandbox defconfig
  Fix minor things in test

Changed V3:
  Add documetation
  Add test
  Split driver from command
  Split header
  Use devm_kzalloc
  Remove out of memory debug
  Restyle

Changed V2:
  Rename to rkmtd

Johan Jonker (8):
  mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN option
  rockchip: dm: prepare rkmtd UCLASS
  rockchip: block: add rkmtd class and drivers
  rockchip: block: blk-uclass: add bounce buffer flag to blk_desc
  rockchip: cmd: add rkmtd command
  rockchip: test: dm: add rkmtd test
  rockchip: doc: add rkmtd.rst
  rockchip: configs: sandbox: enable rkmtd command

 cmd/Kconfig |8 +
 cmd/Makefile|1 +
 cmd/rkmtd.c |  204 +
 configs/sandbox64_defconfig |1 +
 configs/sandbox_defconfig   |1 +
 disk/part.c |4 +
 doc/board/rockchip/index.rst|1 +
 doc/board/rockchip/rkmtd.rst|  105 +++
 drivers/block/Kconfig   |7 +
 drivers/block/Makefile  |2 +
 drivers/block/blk-uclass.c  |5 +-
 drivers/block/rkmtd.c   | 1152 +++
 drivers/mtd/nand/raw/Kconfig|9 +
 drivers/mtd/nand/raw/rockchip_nfc.c |3 +
 drivers/scsi/scsi.c |4 +
 include/blk.h   |1 +
 include/dm/uclass-id.h  |1 +
 include/rkmtd.h |  191 +
 test/dm/Makefile|1 +
 test/dm/rkmtd.c |  200 +
 20 files changed, 1899 insertions(+), 2 deletions(-)
 create mode 100644 cmd/rkmtd.c
 create mode 100644 doc/board/rockchip/rkmtd.rst
 create mode 100644 drivers/block/rkmtd.c
 create mode 100644 include/rkmtd.h
 create mode 100644 test/dm/rkmtd.c

--
2.39.2

Re: [PATCH v4 4/8] rockchip: block: blk-uclass: disable bounce buffer support for rkmtd

[Johan Jonker]

On 10/16/23 23:54, Simon Glass wrote:
> Hi Johan,
> 
> On Sun, 15 Oct 2023 at 16:33, Johan Jonker  wrote:
>>
>> Disable bounce buffer support for rkmtd.
>>
>> Signed-off-by: Johan Jonker 
>> Reviewed-by: Kever Yang 
>> ---
>>
>> Changed V3:
>>   New patch
>> ---
>>  drivers/block/blk-uclass.c | 6 +++---
>>  1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
>> index 30ad5bbb0024..ac1b43d757d8 100644
>> --- a/drivers/block/blk-uclass.c
>> +++ b/drivers/block/blk-uclass.c
>> @@ -415,7 +415,7 @@ struct blk_bounce_buffer {
>>
>>  static int blk_buffer_aligned(struct bounce_buffer *state)
>>  {
>> -#if IS_ENABLED(CONFIG_BOUNCE_BUFFER)
>> +#if IS_ENABLED(CONFIG_BOUNCE_BUFFER) && !IS_ENABLED(CONFIG_RKMTD)
> 

> We should not have arch-specific code in a generic file. Can you make
> BOUNCE_BUFFER depend on !RKMTD ?

Hi Simon, Marek,

No that doesn't work that way.

On Rockchip mainline boards MMC_DW is always our boot device BOOT_DEVICE_MMCx.
Therefore BOUNCE_BUFFER is also standard enabled.

The solution in this patch below is wrong as it assumes that if BOUNCE_BUFFER 
is enabled it must be used all over the place.

blk: Add bounce buffer support to read/write operations
https://source.denx.de/u-boot/u-boot/-/commit/75191f75bce45f3b9aff607c88f17778d3805c61

All implementations of bounce_buffer_start and bounce_buffer_start_extalign are 
located in the individual drivers  

https://elixir.bootlin.com/u-boot/latest/C/ident/bounce_buffer_start
https://elixir.bootlin.com/u-boot/latest/C/ident/bounce_buffer_start_extalign

The use of a bounce_buffer in block devices should only be allowed if needed.
Lack of "ops->buffer_aligned" does not prevent the creation of a bounce_buffer 
and is not a good selector yet.

if (ops->buffer_aligned)
return ops->buffer_aligned(dev, state);

Current blk_ops has no option to communicate the needed resources.
Please advise how to select the creation of a bounce buffer per device or other 
solution.

Johan

===
config MMC_DW
bool "Synopsys DesignWare Memory Card Interface"
select BOUNCE_BUFFER

Without BOUNCE_BUFFER selected /drivers/mmc/dw_mmc.c does not compile even 
rk3066 only uses "fifo_mode".

arm-linux-gnueabihf-ld.bfd: drivers/mmc/dw_mmc.o: in function `dwmci_send_cmd':
/drivers/mmc/dw_mmc.c:285: undefined reference to `bounce_buffer_start'


if (host->fifo_mode) {
dwmci_writel(host, DWMCI_BLKSIZ, data->blocksize);
dwmci_writel(host, DWMCI_BYTCNT,
 data->blocksize * data->blocks);
dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET);
} else {
if (data->flags == MMC_DATA_READ) {
ret = bounce_buffer_start(,
(void*)data->dest,
data->blocksize *
data->blocks, GEN_BB_WRITE);
} else {
ret = bounce_buffer_start(,
(void*)data->src,
data->blocksize *
data->blocks, GEN_BB_READ);
}
[..]
}

arm-linux-gnueabihf-ld.bfd: /drivers/mmc/dw_mmc.c:393: undefined reference to 
`bounce_buffer_stop'


/* only dma mode need it */
if (!host->fifo_mode) {
[..]
bounce_buffer_stop();
}

> 
>> struct blk_bounce_buffer *bbstate =
>> container_of(state, struct blk_bounce_buffer, state);
>> struct udevice *dev = bbstate->dev;
>> @@ -441,7 +441,7 @@ long blk_read(struct udevice *dev, lbaint_t start, 
>> lbaint_t blkcnt, void *buf)
>>   start, blkcnt, desc->blksz, buf))
>> return blkcnt;
>>
>> -   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER)) {
>> +   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER) && !IS_ENABLED(CONFIG_RKMTD)) {
>> struct blk_bounce_buffer bbstate = { .dev = dev };
>> int ret;
>>
>> @@ -478,7 +478,7 @@ long blk_write(struct udevice *dev, lbaint_t start, 
>> lbaint_t blkcnt,
>>
>> blkcache_invalidate(desc->uclass_id, desc->devnum);
>>
>> -   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER)) {
>> +   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER) && !IS_ENABLED(CONFIG_RKMTD)) {
>> struct blk_bounce_buffer bbstate = { .dev = dev };
>> int ret;
>>
>> --
>> 2.39.2
>>
> 
> Regards,
> Simon

[PATCH v4 8/8] rockchip: configs: sandbox: enable rkmtd command

[Johan Jonker]

Enable rkmtd command for testing with sandbox_defconfig
and sandbox64_defconfig.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---

Changed V3:
  New patch
---
 configs/sandbox64_defconfig | 1 +
 configs/sandbox_defconfig   | 1 +
 2 files changed, 2 insertions(+)

diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 1a033b22018b..1a01f51a0b75 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -58,6 +58,7 @@ CONFIG_CMD_REMOTEPROC=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_TEMPERATURE=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_RKMTD=y
 CONFIG_CMD_WDT=y
 CONFIG_CMD_WRITE=y
 CONFIG_CMD_CAT=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 01830c7bd255..cc54e6dec5af 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -84,6 +84,7 @@ CONFIG_CMD_REMOTEPROC=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_TEMPERATURE=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_RKMTD=y
 CONFIG_CMD_WDT=y
 CONFIG_CMD_WRITE=y
 CONFIG_CMD_AXI=y
--
2.39.2

[PATCH v4 7/8] rockchip: doc: add rkmtd.rst

[Johan Jonker]

Add documention for Rockchip rkmtd virtual block device.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
Reviewed-by: Simon Glass 
---

Changed V3:
  New patch
---
 doc/board/rockchip/index.rst |   1 +
 doc/board/rockchip/rkmtd.rst | 105 +++
 2 files changed, 106 insertions(+)
 create mode 100644 doc/board/rockchip/rkmtd.rst

diff --git a/doc/board/rockchip/index.rst b/doc/board/rockchip/index.rst
index 0c377e9bbba0..9a87a035e95e 100644
--- a/doc/board/rockchip/index.rst
+++ b/doc/board/rockchip/index.rst
@@ -8,3 +8,4 @@ Rockchip
:maxdepth: 2

rockchip
+   rkmtd
diff --git a/doc/board/rockchip/rkmtd.rst b/doc/board/rockchip/rkmtd.rst
new file mode 100644
index ..1481380ba6c5
--- /dev/null
+++ b/doc/board/rockchip/rkmtd.rst
@@ -0,0 +1,105 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2023 Johan Jonker 
+
+RKMTD
+=
+
+Info
+
+
+The command rkmtd creates a virtual block device to transfer
+Rockchip boot block data to and from NAND with block orientated
+tools like "ums" and "rockusb".
+
+It uses the Rockchip MTD driver to scan for boot blocks and copies
+data from the first block in a GPT formatted virtual disk.
+Data must be written in U-boot "idbloader.img" format and start at
+partition "loader1" offset 64. The data header is parsed
+for length and offset. When the last sector is received
+it erases up to 5 erase blocks on NAND and writes boot blocks
+in a pattern depending on the NAND ID. Data is then verified.
+When a block turns out bad the block header is discarded.
+
+Limitations
+---
+
+- Support with CONFIG_ROCKCHIP_NAND MTD driver only.
+- Support for Rockchip boot block header type 1 only.
+- Pattern for listed NAND IDs only. (Logic still not disclosed by Rockchip)
+- The MTD framework driver data and NAND ID must be extracted at a lower level.
+
+Available rkmtd commands
+
+
+.. code-block:: bash
+
+rkmtd bind   - bind RKMTD device
+rkmtd unbind - unbind RKMTD device
+rkmtd info []- show all available RKMTD devices
+rkmtd dev [] - show or set current RKMTD device
+
+U-boot settings
+---
+
+Config to enable Rockchip MTD support:
+
+.. code-block:: bash
+
+CONFIG_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_ROCKCHIP_NAND=y
+
+Option to keep existing NAND data unchanged:
+
+.. code-block:: bash
+
+CONFIG_ROCKCHIP_NAND_SKIP_BBTSCAN=y
+
+Commands to enable:
+
+.. code-block:: bash
+
+CONFIG_CMD_USB=y
+CONFIG_CMD_RKMTD=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+
+Linux Host (PC) tool commands combinations that work
+
+
+.. table::
+   :widths: 20 44
+
+    
+   U-boot   Linux
+    
+   rkmtd bind 0
+   rockusb 0 rkmtd 0
+upgrade_tool pl
+
+upgrade_tool rl 64 512 idbloader_backup.img
+
+upgrade_tool wl 64 idbloader.img
+
+upgrade_tool rd
+
+rkdeveloptool ppt
+
+rkdeveloptool rl 64 512 idbloader_backup.img
+
+rkdeveloptool wlx loader1 idbloader.img
+
+rkdeveloptool wl 64 idbloader.img
+
+rkdeveloptool rd
+
+rkflashtool r 64 512 > idbloader_backup.img
+
+rkflashtool w 64 512 < idbloader.img
+   ums 0 rkmtd 0
+dd if=/dev/sda1 of=idbloader_backup.img
+
+dd if=idbloader.img of=/dev/sda1
+    
--
2.39.2

[PATCH v4 6/8] rockchip: test: dm: add rkmtd test

[Johan Jonker]

Add Rockchip rkmtd test:
Create/attach/detach RKMTD device.
Send/read data with Rockchip boot block header.
Test that reusing the same label should work.
Basic test of 'rkmtd' commands.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
Reviewed-by: Simon Glass 
---

Changed V4:
  sort includes
  rename define
  use '\0'
  use UT_TESTF_CONSOLE_REC flag
  check RC4 result

Changed V3:
  New patch
---
 test/dm/Makefile |   1 +
 test/dm/rkmtd.c  | 200 +++
 2 files changed, 201 insertions(+)
 create mode 100644 test/dm/rkmtd.c

diff --git a/test/dm/Makefile b/test/dm/Makefile
index 7ed00733c1a6..a5e0a2744375 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -100,6 +100,7 @@ obj-$(CONFIG_REMOTEPROC) += remoteproc.o
 obj-$(CONFIG_DM_RESET) += reset.o
 obj-$(CONFIG_SYSRESET) += sysreset.o
 obj-$(CONFIG_DM_REGULATOR) += regulator.o
+obj-$(CONFIG_CMD_RKMTD) += rkmtd.o
 obj-$(CONFIG_DM_RNG) += rng.o
 obj-$(CONFIG_DM_RTC) += rtc.o
 obj-$(CONFIG_SCMI_FIRMWARE) += scmi.o
diff --git a/test/dm/rkmtd.c b/test/dm/rkmtd.c
new file mode 100644
index ..3c3e8efa92f2
--- /dev/null
+++ b/test/dm/rkmtd.c
@@ -0,0 +1,200 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Test derived from:
+ * /test/dm/host.c
+ * Copyright 2022 Google LLC
+ * Written by Simon Glass 
+ *
+ * Copyright (C) 2023 Johan Jonker 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define RW_BUF_SIZE12 * 512
+
+/* Basic test of the RKMTD interface */
+static int dm_test_rkmtd(struct unit_test_state *uts)
+{
+   struct udevice *dev, *part, *chk, *blk;
+   char write[RW_BUF_SIZE], read[RW_BUF_SIZE];
+   static const char label[] = "test";
+   struct rkmtd_dev *plat;
+   struct blk_desc *desc;
+   struct sector0 *sec0;
+   int i;
+
+   ut_asserteq(-ENODEV, uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq(-ENODEV, uclass_first_device_err(UCLASS_PARTITION, ));
+
+   ut_assertok(rkmtd_create_device(label, ));
+
+   /* Check that the plat data has been allocated */
+   plat = dev_get_plat(dev);
+   ut_asserteq_str("test", plat->label);
+   ut_assert(label != plat->label);
+
+   /* Attach RKMTD driver */
+   ut_assertok(rkmtd_attach(dev));
+   ut_assertok(uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq_ptr(chk, dev);
+
+   /* Get RKMTD block device */
+   ut_assertok(blk_get_from_parent(dev, ));
+   ut_assertok(device_probe(blk));
+
+   /* There should be a GPT partition table in this device */
+   ut_asserteq(0, uclass_first_device_err(UCLASS_PARTITION, ));
+
+   /* Write a boot block and verify that we get the same data back */
+   desc = dev_get_uclass_plat(blk);
+   ut_asserteq(true, desc->removable);
+   ut_asserteq(LBA, desc->lba);
+
+   memset(write, '\0', BLK_SIZE);
+
+   for (i = BLK_SIZE; i < sizeof(write); i++)
+   write[i] = i;
+
+   sec0 = (struct sector0 *)write;
+   sec0->magic = 0x0FF0AA55;
+   sec0->rc4_flag = 0;
+   sec0->boot_code1_offset = 4;
+   sec0->boot_code2_offset = 4;
+   sec0->flash_data_size = 4;
+   sec0->flash_boot_size = 8;
+
+   rkmtd_rc4(write, 512);
+   ut_asserteq(RK_TAG, sec0->magic);
+
+   ut_asserteq(12, blk_dwrite(desc, 64, 12, write));
+   ut_asserteq(12, blk_dread(desc, 64, 12, read));
+   ut_asserteq_mem(write, read, RW_BUF_SIZE);
+
+   ut_assertok(rkmtd_detach(dev));
+
+   ut_asserteq(-ENODEV, blk_get_from_parent(dev, ));
+   ut_assertok(device_unbind(dev));
+
+   return 0;
+}
+DM_TEST(dm_test_rkmtd, UT_TESTF_SCAN_FDT);
+
+/* Reusing the same label should work */
+static int dm_test_rkmtd_dup(struct unit_test_state *uts)
+{
+   static const char label[] = "test";
+   struct udevice *dev, *chk;
+
+   /* Create a RKMTD device with label "test" */
+   ut_asserteq(0, uclass_id_count(UCLASS_RKMTD));
+   ut_assertok(rkmtd_create_device(label, ));
+   ut_assertok(rkmtd_attach(dev));
+   ut_assertok(uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq_ptr(chk, dev);
+   ut_asserteq(1, uclass_id_count(UCLASS_RKMTD));
+
+   /* Create another device with the same label (should remove old one) */
+   ut_assertok(rkmtd_create_device(label, ));
+   ut_assertok(rkmtd_attach(dev));
+   ut_assertok(uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq_ptr(chk, dev);
+
+   /* Make sure there is still only one device */
+   ut_asserteq(1, uclass_id_count(UCLASS_RKMTD));
+
+   return 0;
+}
+DM_TEST(dm_test_rkmtd_dup, UT_TESTF_SCAN_FDT);
+
+/* Basic test of the 'rkmtd' command */
+static int dm_test_rkmtd_cmd(struct unit_test_state *uts)
+{
+   struct udevice *dev, *blk;
+   struct blk_desc *desc;
+
+   /* First check 

[PATCH v4 5/8] rockchip: cmd: add rkmtd command

[Johan Jonker]

The command rkmtd creates a virtual block device to transfer
Rockchip boot block data to and from NAND with block orientated
tools like "ums" and "rockusb".

It uses the Rockchip MTD driver to scan for boot blocks and copies
data from the first block in a GPT formated virtual disk.
Data must be written in U-boot "idbloader.img" format and start at
partition "loader1" offset 64. The data header is parsed
for length and offset. When the last sector is received
it erases up to 5 erase blocks on NAND and writes bootblocks
in a pattern depending on the NAND ID. Data is then verified.
When a block turns out bad the block header is discarded.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---

Changed V4:
  Sort includes

Changed V3:
  Split driver from command
  Split header
  Restyle
---
 cmd/Kconfig  |   8 ++
 cmd/Makefile |   1 +
 cmd/rkmtd.c  | 204 +++
 3 files changed, 213 insertions(+)
 create mode 100644 cmd/rkmtd.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6470b138d2f8..1979c6c62aa7 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1561,6 +1561,14 @@ config CMD_USB_SDP
  Enables the command "sdp" which is used to have U-Boot emulating the
  Serial Download Protocol (SDP) via USB.

+config CMD_RKMTD
+   bool "rkmtd"
+   select RKMTD
+   help
+ Enable the command "rkmtd" to create a virtual block device to 
transfer
+ Rockchip boot block data to and from NAND with block orientated tools
+ like "ums" and "rockusb".
+
 config CMD_ROCKUSB
bool "rockusb"
depends on USB_FUNCTION_ROCKUSB
diff --git a/cmd/Makefile b/cmd/Makefile
index 9bebf321c397..11927a5904e6 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -151,6 +151,7 @@ obj-$(CONFIG_CMD_REISER) += reiser.o
 obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
 obj-$(CONFIG_CMD_RNG) += rng.o
 obj-$(CONFIG_CMD_KASLRSEED) += kaslrseed.o
+obj-$(CONFIG_CMD_RKMTD) += rkmtd.o
 obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_CMD_RTC) += rtc.o
 obj-$(CONFIG_SANDBOX) += host.o
diff --git a/cmd/rkmtd.c b/cmd/rkmtd.c
new file mode 100644
index ..5b80427cb949
--- /dev/null
+++ b/cmd/rkmtd.c
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *
+ * Driver interface derived from:
+ * /cmd/host.c
+ * Copyright (c) 2012, Google Inc.
+ *
+ * Copyright (C) 2023 Johan Jonker 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int do_rkmtd_bind(struct cmd_tbl *cmdtp, int flag, int argc,
+char *const argv[])
+{
+   struct udevice *dev;
+   const char *label;
+   int ret;
+
+   argc--;
+   argv++;
+
+   if (argc < 1)
+   return CMD_RET_USAGE;
+
+   if (argc > 1)
+   return CMD_RET_USAGE;
+
+   label = argv[0];
+   ret = rkmtd_create_attach_mtd(label, );
+   if (ret) {
+   printf("Cannot create device / bind mtd\n");
+   return CMD_RET_FAILURE;
+   }
+
+   return 0;
+}
+
+static struct udevice *parse_rkmtd_label(const char *label)
+{
+   struct udevice *dev;
+
+   dev = rkmtd_find_by_label(label);
+   if (!dev) {
+   int devnum;
+   char *ep;
+
+   devnum = hextoul(label, );
+   if (*ep ||
+   uclass_find_device_by_seq(UCLASS_RKMTD, devnum, )) {
+   printf("No such device '%s'\n", label);
+   return NULL;
+   }
+   }
+
+   return dev;
+}
+
+static int do_rkmtd_unbind(struct cmd_tbl *cmdtp, int flag, int argc,
+  char *const argv[])
+{
+   struct udevice *dev;
+   const char *label;
+   int ret;
+
+   if (argc < 2)
+   return CMD_RET_USAGE;
+
+   label = argv[1];
+   dev = parse_rkmtd_label(label);
+   if (!dev)
+   return CMD_RET_FAILURE;
+
+   ret = rkmtd_detach(dev);
+   if (ret) {
+   printf("Cannot detach mtd\n");
+   return CMD_RET_FAILURE;
+   }
+
+   ret = device_unbind(dev);
+   if (ret) {
+   printf("Cannot unbind device '%s'\n", dev->name);
+   return CMD_RET_FAILURE;
+   }
+
+   return 0;
+}
+
+static void show_rkmtd_dev(struct udevice *dev)
+{
+   struct rkmtd_dev *plat = dev_get_plat(dev);
+   struct blk_desc *desc;
+   struct udevice *blk;
+   int ret;
+
+   printf("%3d ", dev_seq(dev));
+
+   ret = blk_get_from_parent(dev, );
+   if (ret)
+   return;
+
+   desc = dev_get_uclass_plat(blk);
+   printf("%12lu %-15s\n", (unsigned long)desc->lba, plat->label);
+}
+
+static int do_rkmtd_info(struct cmd_tbl *cmdtp, int flag, int argc,
+   

[PATCH v4 4/8] rockchip: block: blk-uclass: disable bounce buffer support for rkmtd

[Johan Jonker]

Disable bounce buffer support for rkmtd.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---

Changed V3:
  New patch
---
 drivers/block/blk-uclass.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 30ad5bbb0024..ac1b43d757d8 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -415,7 +415,7 @@ struct blk_bounce_buffer {

 static int blk_buffer_aligned(struct bounce_buffer *state)
 {
-#if IS_ENABLED(CONFIG_BOUNCE_BUFFER)
+#if IS_ENABLED(CONFIG_BOUNCE_BUFFER) && !IS_ENABLED(CONFIG_RKMTD)
struct blk_bounce_buffer *bbstate =
container_of(state, struct blk_bounce_buffer, state);
struct udevice *dev = bbstate->dev;
@@ -441,7 +441,7 @@ long blk_read(struct udevice *dev, lbaint_t start, lbaint_t 
blkcnt, void *buf)
  start, blkcnt, desc->blksz, buf))
return blkcnt;

-   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER)) {
+   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER) && !IS_ENABLED(CONFIG_RKMTD)) {
struct blk_bounce_buffer bbstate = { .dev = dev };
int ret;

@@ -478,7 +478,7 @@ long blk_write(struct udevice *dev, lbaint_t start, 
lbaint_t blkcnt,

blkcache_invalidate(desc->uclass_id, desc->devnum);

-   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER)) {
+   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER) && !IS_ENABLED(CONFIG_RKMTD)) {
struct blk_bounce_buffer bbstate = { .dev = dev };
int ret;

--
2.39.2

[PATCH v4 3/8] rockchip: block: add rkmtd class and drivers

[Johan Jonker]

Add rkmtd class and drivers to create a virtual block device
to transfer Rockchip boot block data to and from NAND with
block orientated tools like "ums" and "rockusb".

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---

Changed V4:
  sort includes
  replace constant by define

Changed V3:
  New patch
  Split driver from command
  Split header
  Use devm_kzalloc
  Remove out of memory debug
  Restyle
---
 drivers/block/Kconfig  |7 +
 drivers/block/Makefile |2 +
 drivers/block/rkmtd.c  | 1135 
 include/rkmtd.h|  191 +++
 4 files changed, 1335 insertions(+)
 create mode 100644 drivers/block/rkmtd.c
 create mode 100644 include/rkmtd.h

diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index 1abea3f10db4..048a6caef00f 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -262,3 +262,10 @@ config SYS_64BIT_LBA
help
  Make the block subsystem use 64bit sector addresses, rather than the
  default of 32bit.
+
+config RKMTD
+   bool "Rockchip rkmtd virtual block device"
+   help
+ Enable "rkmtd" class and driver to create a virtual block device
+ to transfer Rockchip boot block data to and from NAND with block
+ orientate tools like "ums" and "rockusb".
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index a161d145fd39..fdcba5c8318f 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -11,6 +11,7 @@ endif

 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_IDE) += ide.o
+obj-$(CONFIG_RKMTD) += rkmtd.o
 endif
 obj-$(CONFIG_SANDBOX) += sandbox.o host-uclass.o host_dev.o
 obj-$(CONFIG_$(SPL_TPL_)BLOCK_CACHE) += blkcache.o
@@ -19,3 +20,4 @@ obj-$(CONFIG_BLKMAP) += blkmap.o
 obj-$(CONFIG_EFI_MEDIA) += efi-media-uclass.o
 obj-$(CONFIG_EFI_MEDIA_SANDBOX) += sb_efi_media.o
 obj-$(CONFIG_EFI_MEDIA_BLK) += efi_blk.o
+
diff --git a/drivers/block/rkmtd.c b/drivers/block/rkmtd.c
new file mode 100644
index ..c17d320ebce3
--- /dev/null
+++ b/drivers/block/rkmtd.c
@@ -0,0 +1,1135 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Some functions are derived from:
+ * 
https://github.com/rockchip-linux/u-boot/blob/next-dev/drivers/rknand/rk_ftl_arm_v7.S
+ * Copyright (c) 2016-2018, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Driver interface derived from:
+ * /drivers/block/host_dev.c
+ * /drivers/block/host-uclass.c
+ * Copyright 2022 Google LLC
+ * Written by Simon Glass 
+ *
+ * Copyright (C) 2023 Johan Jonker 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#if !IS_ENABLED(CONFIG_SANDBOX)
+#include 
+#endif
+#include 
+
+struct nand_para_info nand_para_tbl[] = {
+   {6, {0x2c, 0x64, 0x44, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x44, 0x44, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 1064, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x68, 0x04, 0x4a, 0xa9, 0x00}, 4, 1,  8,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x88, 0x04, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0xa8, 0x05, 0xcb, 0xa9, 0x00}, 4, 2, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x68, 0x04, 0x46, 0x89, 0x00}, 4, 1,  8,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x48, 0x04, 0x4a, 0xa5, 0x00}, 4, 1,  8,  256, 2, 2, 1024, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x84, 0x64, 0x3c, 0xa5, 0x00}, 4, 1, 32,  512, 2, 2, 1024, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x84, 0x64, 0x54, 0xa9, 0x00}, 4, 1, 32,  512, 2, 2, 1024, 
0x01df,  4, 18, 60, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0xd7, 0x94, 0x3e, 0x84, 0x00}, 4, 1,  8,  128, 2, 2, 4096, 
0x0117,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x48, 0x04, 0x46, 0x85, 0x00}, 4, 1,  8,  256, 2, 2, 1024, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x88, 0x05, 0xc6, 0x89, 0x00}, 4, 2,  8,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x88, 0x24, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x68, 0x00, 0x27, 0xa9, 0x00}, 4, 1, 16,  128, 1, 2, 2048, 
0x011f,  0,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x64, 0x64, 0x56, 0xa5, 0x00}, 4, 1, 24,  512, 2, 2,  700, 
0x01df,  4, 18, 60, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x84, 0xc5, 0x4b, 0xa9, 0x00}, 4, 2, 16,  256, 2, 2, 2048, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0,

[PATCH v4 2/8] rockchip: dm: prepare rkmtd UCLASS

[Johan Jonker]

Prepare a rkmtd UCLASS in use for writing Rockchip boot blocks
in combination with existing userspace tools and rockusb command.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---
 disk/part.c| 4 
 drivers/block/blk-uclass.c | 1 +
 include/dm/uclass-id.h | 1 +
 3 files changed, 6 insertions(+)

diff --git a/disk/part.c b/disk/part.c
index 85244b09f359..36b88205eca7 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -197,6 +197,7 @@ void dev_print(struct blk_desc *desc)
case UCLASS_PVBLOCK:
case UCLASS_HOST:
case UCLASS_BLKMAP:
+   case UCLASS_RKMTD:
printf ("Vendor: %s Rev: %s Prod: %s\n",
desc->vendor,
desc->revision,
@@ -330,6 +331,9 @@ static void print_part_header(const char *type, struct 
blk_desc *desc)
case UCLASS_PVBLOCK:
puts("PV BLOCK");
break;
+   case UCLASS_RKMTD:
+   puts("RKMTD");
+   break;
case UCLASS_VIRTIO:
puts("VirtIO");
break;
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index f126547cc7e6..30ad5bbb0024 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -36,6 +36,7 @@ static struct {
{ UCLASS_VIRTIO, "virtio" },
{ UCLASS_PVBLOCK, "pvblock" },
{ UCLASS_BLKMAP, "blkmap" },
+   { UCLASS_RKMTD, "rkmtd" },
 };

 static enum uclass_id uclass_name_to_iftype(const char *uclass_idname)
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 0432c95c9edc..2fc672df0a3a 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -120,6 +120,7 @@ enum uclass_id {
UCLASS_REGULATOR,   /* Regulator device */
UCLASS_REMOTEPROC,  /* Remote Processor device */
UCLASS_RESET,   /* Reset controller device */
+   UCLASS_RKMTD,   /* Rockchip MTD device */
UCLASS_RNG, /* Random Number Generator */
UCLASS_RTC, /* Real time clock device */
UCLASS_SCMI_AGENT,  /* Interface with an SCMI server */
--
2.39.2

[PATCH v4 1/8] mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN option

[Johan Jonker]

On Rockchip SoCs the first boot stages are written on NAND
with help of manufacturer software that uses a different format
then the MTD framework. Skip the automatic BBT scan with the
NAND_SKIP_BBTSCAN option to be able to pass the driver probe
function and to let the original data unchanged.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---
 drivers/mtd/nand/raw/Kconfig| 9 +
 drivers/mtd/nand/raw/rockchip_nfc.c | 3 +++
 2 files changed, 12 insertions(+)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index d624589a892b..72547f00fbec 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -611,6 +611,15 @@ config ROCKCHIP_NAND
NFC v800: RK3308, RV1108
NFC v900: PX30, RK3326

+config ROCKCHIP_NAND_SKIP_BBTSCAN
+   bool "Skip the automatic BBT scan with Rockchip NAND controllers"
+   depends on ROCKCHIP_NAND
+   default n
+   help
+ Skip the automatic BBT scan with the NAND_SKIP_BBTSCAN
+ option when data content is not in MTD format or
+ must remain unchanged.
+
 config TEGRA_NAND
bool "Support for NAND controller on Tegra SoCs"
depends on ARCH_TEGRA
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c 
b/drivers/mtd/nand/raw/rockchip_nfc.c
index 6ad51df4acff..df6742c2f9bb 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -981,6 +981,9 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc 
*nfc, int devnum)
chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;

+   if (IS_ENABLED(CONFIG_ROCKCHIP_NAND_SKIP_BBTSCAN))
+   chip->options |= NAND_SKIP_BBTSCAN;
+
rk_nfc_hw_init(nfc);
ret = nand_scan_ident(mtd, nsels, NULL);
if (ret)
--
2.39.2

[PATCH v4 0/8] Add rkmtd command

[Johan Jonker]

The command rkmtd creates a virtual block device to transfer
Rockchip boot block data to and from NAND with block orientated
tools like "ums" and "rockusb".

It uses the Rockchip MTD driver to scan for boot blocks and copies
data from the first block in a GPT formatted virtual disk.
Data must be written in U-boot "idbloader.img" format and start at
partition "loader1" offset 64. The data header is parsed
for length and offset. When the last sector is received
it erases up to 5 erase blocks on NAND and writes boot blocks
in a pattern depending on the NAND ID. Data is then verified.
When a block turns out bad the block header is discarded.

Changed V4:
  Sort includes
  Replace constant by define
  Enable rkmtd command in sandbox defconfig
  Fix minor things in test

Changed V3:
  Add documetation
  Add test
  Split driver from command
  Split header
  Use devm_kzalloc
  Remove out of memory debug
  Restyle

Changed V2:
  Rename to rkmtd

Johan Jonker (8):
  mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN option
  rockchip: dm: prepare rkmtd UCLASS
  rockchip: block: add rkmtd class and drivers
  rockchip: block: blk-uclass: disable bounce buffer support for rkmtd
  rockchip: cmd: add rkmtd command
  rockchip: test: dm: add rkmtd test
  rockchip: doc: add rkmtd.rst
  rockchip: configs: sandbox: enable rkmtd command

 cmd/Kconfig |8 +
 cmd/Makefile|1 +
 cmd/rkmtd.c |  204 +
 configs/sandbox64_defconfig |1 +
 configs/sandbox_defconfig   |1 +
 disk/part.c |4 +
 doc/board/rockchip/index.rst|1 +
 doc/board/rockchip/rkmtd.rst|  105 +++
 drivers/block/Kconfig   |7 +
 drivers/block/Makefile  |2 +
 drivers/block/blk-uclass.c  |7 +-
 drivers/block/rkmtd.c   | 1135 +++
 drivers/mtd/nand/raw/Kconfig|9 +
 drivers/mtd/nand/raw/rockchip_nfc.c |3 +
 include/dm/uclass-id.h  |1 +
 include/rkmtd.h |  191 +
 test/dm/Makefile|1 +
 test/dm/rkmtd.c |  200 +
 18 files changed, 1878 insertions(+), 3 deletions(-)
 create mode 100644 cmd/rkmtd.c
 create mode 100644 doc/board/rockchip/rkmtd.rst
 create mode 100644 drivers/block/rkmtd.c
 create mode 100644 include/rkmtd.h
 create mode 100644 test/dm/rkmtd.c

--
2.39.2

[PATCH v3] rockchip: configs: sandbox: enable rkmtd command

[Johan Jonker]

Enable rkmtd command for testing with sandbox_defconfig
and sandbox64_defconfig.

Signed-off-by: Johan Jonker 
---
 configs/sandbox64_defconfig | 1 +
 configs/sandbox_defconfig   | 1 +
 2 files changed, 2 insertions(+)

diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 1a033b22018b..1a01f51a0b75 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -58,6 +58,7 @@ CONFIG_CMD_REMOTEPROC=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_TEMPERATURE=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_RKMTD=y
 CONFIG_CMD_WDT=y
 CONFIG_CMD_WRITE=y
 CONFIG_CMD_CAT=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 01830c7bd255..cc54e6dec5af 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -84,6 +84,7 @@ CONFIG_CMD_REMOTEPROC=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_TEMPERATURE=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_RKMTD=y
 CONFIG_CMD_WDT=y
 CONFIG_CMD_WRITE=y
 CONFIG_CMD_AXI=y
--
2.39.2

Re: [PATCH v3 2/7] rockchip: dm: prepare rkmtd UCLASS

[Johan Jonker]

On 10/13/23 18:57, Simon Glass wrote:
> Hi Johan,
> 
> On Thu, 12 Oct 2023 at 13:51, Johan Jonker  wrote:
>>
>> Prepare a rkmtd UCLASS in use for writing Rockchip boot blocks
>> in combination with existing userspace tools and rockusb command.
>>
>> Signed-off-by: Johan Jonker 
>> Reviewed-by: Kever Yang 
>> ---
>>  disk/part.c| 4 
>>  drivers/block/blk-uclass.c | 1 +
>>  include/dm/uclass-id.h | 1 +
>>  3 files changed, 6 insertions(+)
> 

> Do you have a sandbox test for this somewhere?

Maybe have a look at:
[PATCH v3 6/7] rockchip: test: dm: add rkmtd test

The CONFIG_SANDBOX is used to select as much of the driver functionality for 
testing without MTD driver hardware.

Config CMD_RKMTD will select RKMTD, but is not added to a sandbox_defconfig 
file yet.

Not sure what is preferred. Please advise what patch I should produce.

Johan

> 
>>
>> diff --git a/disk/part.c b/disk/part.c
>> index 85244b09f359..36b88205eca7 100644
>> --- a/disk/part.c
>> +++ b/disk/part.c
>> @@ -197,6 +197,7 @@ void dev_print(struct blk_desc *desc)
>> case UCLASS_PVBLOCK:
>> case UCLASS_HOST:
>> case UCLASS_BLKMAP:
>> +   case UCLASS_RKMTD:
>> printf ("Vendor: %s Rev: %s Prod: %s\n",
>> desc->vendor,
>> desc->revision,
>> @@ -330,6 +331,9 @@ static void print_part_header(const char *type, struct 
>> blk_desc *desc)
>> case UCLASS_PVBLOCK:
>> puts("PV BLOCK");
>> break;
>> +   case UCLASS_RKMTD:
>> +   puts("RKMTD");
>> +   break;
>> case UCLASS_VIRTIO:
>> puts("VirtIO");
>> break;
>> diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
>> index f126547cc7e6..30ad5bbb0024 100644
>> --- a/drivers/block/blk-uclass.c
>> +++ b/drivers/block/blk-uclass.c
>> @@ -36,6 +36,7 @@ static struct {
>> { UCLASS_VIRTIO, "virtio" },
>> { UCLASS_PVBLOCK, "pvblock" },
>> { UCLASS_BLKMAP, "blkmap" },
>> +   { UCLASS_RKMTD, "rkmtd" },
>>  };
>>
>>  static enum uclass_id uclass_name_to_iftype(const char *uclass_idname)
>> diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
>> index 0432c95c9edc..2fc672df0a3a 100644
>> --- a/include/dm/uclass-id.h
>> +++ b/include/dm/uclass-id.h
>> @@ -120,6 +120,7 @@ enum uclass_id {
>> UCLASS_REGULATOR,   /* Regulator device */
>> UCLASS_REMOTEPROC,  /* Remote Processor device */
>> UCLASS_RESET,   /* Reset controller device */
>> +   UCLASS_RKMTD,   /* Rockchip MTD device */
>> UCLASS_RNG, /* Random Number Generator */
>> UCLASS_RTC, /* Real time clock device */
>> UCLASS_SCMI_AGENT,  /* Interface with an SCMI server */
>> --
>> 2.39.2
>>
> 
> Regards,
> Simon

[PATCH v3 7/7] rockchip: doc: add rkmtd.rst

[Johan Jonker]

Add documention for Rockchip rkmtd virtual block device.

Signed-off-by: Johan Jonker 
---

Changed V3:
  New patch
---
 doc/board/rockchip/index.rst |   1 +
 doc/board/rockchip/rkmtd.rst | 105 +++
 2 files changed, 106 insertions(+)
 create mode 100644 doc/board/rockchip/rkmtd.rst

diff --git a/doc/board/rockchip/index.rst b/doc/board/rockchip/index.rst
index 0c377e9bbba0..9a87a035e95e 100644
--- a/doc/board/rockchip/index.rst
+++ b/doc/board/rockchip/index.rst
@@ -8,3 +8,4 @@ Rockchip
:maxdepth: 2

rockchip
+   rkmtd
diff --git a/doc/board/rockchip/rkmtd.rst b/doc/board/rockchip/rkmtd.rst
new file mode 100644
index ..1481380ba6c5
--- /dev/null
+++ b/doc/board/rockchip/rkmtd.rst
@@ -0,0 +1,105 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2023 Johan Jonker 
+
+RKMTD
+=
+
+Info
+
+
+The command rkmtd creates a virtual block device to transfer
+Rockchip boot block data to and from NAND with block orientated
+tools like "ums" and "rockusb".
+
+It uses the Rockchip MTD driver to scan for boot blocks and copies
+data from the first block in a GPT formatted virtual disk.
+Data must be written in U-boot "idbloader.img" format and start at
+partition "loader1" offset 64. The data header is parsed
+for length and offset. When the last sector is received
+it erases up to 5 erase blocks on NAND and writes boot blocks
+in a pattern depending on the NAND ID. Data is then verified.
+When a block turns out bad the block header is discarded.
+
+Limitations
+---
+
+- Support with CONFIG_ROCKCHIP_NAND MTD driver only.
+- Support for Rockchip boot block header type 1 only.
+- Pattern for listed NAND IDs only. (Logic still not disclosed by Rockchip)
+- The MTD framework driver data and NAND ID must be extracted at a lower level.
+
+Available rkmtd commands
+
+
+.. code-block:: bash
+
+rkmtd bind   - bind RKMTD device
+rkmtd unbind - unbind RKMTD device
+rkmtd info []- show all available RKMTD devices
+rkmtd dev [] - show or set current RKMTD device
+
+U-boot settings
+---
+
+Config to enable Rockchip MTD support:
+
+.. code-block:: bash
+
+CONFIG_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
+CONFIG_ROCKCHIP_NAND=y
+
+Option to keep existing NAND data unchanged:
+
+.. code-block:: bash
+
+CONFIG_ROCKCHIP_NAND_SKIP_BBTSCAN=y
+
+Commands to enable:
+
+.. code-block:: bash
+
+CONFIG_CMD_USB=y
+CONFIG_CMD_RKMTD=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+
+Linux Host (PC) tool commands combinations that work
+
+
+.. table::
+   :widths: 20 44
+
+    
+   U-boot   Linux
+    
+   rkmtd bind 0
+   rockusb 0 rkmtd 0
+upgrade_tool pl
+
+upgrade_tool rl 64 512 idbloader_backup.img
+
+upgrade_tool wl 64 idbloader.img
+
+upgrade_tool rd
+
+rkdeveloptool ppt
+
+rkdeveloptool rl 64 512 idbloader_backup.img
+
+rkdeveloptool wlx loader1 idbloader.img
+
+rkdeveloptool wl 64 idbloader.img
+
+rkdeveloptool rd
+
+rkflashtool r 64 512 > idbloader_backup.img
+
+rkflashtool w 64 512 < idbloader.img
+   ums 0 rkmtd 0
+dd if=/dev/sda1 of=idbloader_backup.img
+
+dd if=idbloader.img of=/dev/sda1
+    
--
2.39.2

[PATCH v3 5/7] rockchip: cmd: add rkmtd command

[Johan Jonker]

The command rkmtd creates a virtual block device to transfer
Rockchip boot block data to and from NAND with block orientated
tools like "ums" and "rockusb".

It uses the Rockchip MTD driver to scan for boot blocks and copies
data from the first block in a GPT formated virtual disk.
Data must be written in U-boot "idbloader.img" format and start at
partition "loader1" offset 64. The data header is parsed
for length and offset. When the last sector is received
it erases up to 5 erase blocks on NAND and writes bootblocks
in a pattern depending on the NAND ID. Data is then verified.
When a block turns out bad the block header is discarded.

Signed-off-by: Johan Jonker 
---

Changed V3:
  Split driver from command
  Split header
  Restyle
---
 cmd/Kconfig  |   8 ++
 cmd/Makefile |   1 +
 cmd/rkmtd.c  | 204 +++
 3 files changed, 213 insertions(+)
 create mode 100644 cmd/rkmtd.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6470b138d2f8..1979c6c62aa7 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1561,6 +1561,14 @@ config CMD_USB_SDP
  Enables the command "sdp" which is used to have U-Boot emulating the
  Serial Download Protocol (SDP) via USB.

+config CMD_RKMTD
+   bool "rkmtd"
+   select RKMTD
+   help
+ Enable the command "rkmtd" to create a virtual block device to 
transfer
+ Rockchip boot block data to and from NAND with block orientated tools
+ like "ums" and "rockusb".
+
 config CMD_ROCKUSB
bool "rockusb"
depends on USB_FUNCTION_ROCKUSB
diff --git a/cmd/Makefile b/cmd/Makefile
index 9bebf321c397..11927a5904e6 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -151,6 +151,7 @@ obj-$(CONFIG_CMD_REISER) += reiser.o
 obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
 obj-$(CONFIG_CMD_RNG) += rng.o
 obj-$(CONFIG_CMD_KASLRSEED) += kaslrseed.o
+obj-$(CONFIG_CMD_RKMTD) += rkmtd.o
 obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_CMD_RTC) += rtc.o
 obj-$(CONFIG_SANDBOX) += host.o
diff --git a/cmd/rkmtd.c b/cmd/rkmtd.c
new file mode 100644
index ..bf01bf43e4dc
--- /dev/null
+++ b/cmd/rkmtd.c
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *
+ * Driver interface derived from:
+ * /cmd/host.c
+ * Copyright (c) 2012, Google Inc.
+ *
+ * Copyright (C) 2023 Johan Jonker 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int do_rkmtd_bind(struct cmd_tbl *cmdtp, int flag, int argc,
+char *const argv[])
+{
+   struct udevice *dev;
+   const char *label;
+   int ret;
+
+   argc--;
+   argv++;
+
+   if (argc < 1)
+   return CMD_RET_USAGE;
+
+   if (argc > 1)
+   return CMD_RET_USAGE;
+
+   label = argv[0];
+   ret = rkmtd_create_attach_mtd(label, );
+   if (ret) {
+   printf("Cannot create device / bind mtd\n");
+   return CMD_RET_FAILURE;
+   }
+
+   return 0;
+}
+
+static struct udevice *parse_rkmtd_label(const char *label)
+{
+   struct udevice *dev;
+
+   dev = rkmtd_find_by_label(label);
+   if (!dev) {
+   int devnum;
+   char *ep;
+
+   devnum = hextoul(label, );
+   if (*ep ||
+   uclass_find_device_by_seq(UCLASS_RKMTD, devnum, )) {
+   printf("No such device '%s'\n", label);
+   return NULL;
+   }
+   }
+
+   return dev;
+}
+
+static int do_rkmtd_unbind(struct cmd_tbl *cmdtp, int flag, int argc,
+  char *const argv[])
+{
+   struct udevice *dev;
+   const char *label;
+   int ret;
+
+   if (argc < 2)
+   return CMD_RET_USAGE;
+
+   label = argv[1];
+   dev = parse_rkmtd_label(label);
+   if (!dev)
+   return CMD_RET_FAILURE;
+
+   ret = rkmtd_detach(dev);
+   if (ret) {
+   printf("Cannot detach mtd\n");
+   return CMD_RET_FAILURE;
+   }
+
+   ret = device_unbind(dev);
+   if (ret) {
+   printf("Cannot unbind device '%s'\n", dev->name);
+   return CMD_RET_FAILURE;
+   }
+
+   return 0;
+}
+
+static void show_rkmtd_dev(struct udevice *dev)
+{
+   struct rkmtd_dev *plat = dev_get_plat(dev);
+   struct blk_desc *desc;
+   struct udevice *blk;
+   int ret;
+
+   printf("%3d ", dev_seq(dev));
+
+   ret = blk_get_from_parent(dev, );
+   if (ret)
+   return;
+
+   desc = dev_get_uclass_plat(blk);
+   printf("%12lu %-15s\n", (unsigned long)desc->lba, plat->label);
+}
+
+static int do_rkmtd_info(struct cmd_tbl *cmdtp, int flag, int argc,
+char *const argv[])
+{
+ 

[PATCH v3 3/7] rockchip: block: add rkmtd class and drivers

[Johan Jonker]

Add rkmtd class and drivers to create a virtual block device
to transfer Rockchip boot block data to and from NAND with
block orientated tools like "ums" and "rockusb".

Signed-off-by: Johan Jonker 
---

Changed V3:
  New patch
  Split driver from command
  Split header
  Use devm_kzalloc
  Remove out of memory debug
  Restyle
---
 drivers/block/Kconfig  |7 +
 drivers/block/Makefile |2 +
 drivers/block/rkmtd.c  | 1138 
 include/rkmtd.h|  190 +++
 4 files changed, 1337 insertions(+)
 create mode 100644 drivers/block/rkmtd.c
 create mode 100644 include/rkmtd.h

diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index 1abea3f10db4..048a6caef00f 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -262,3 +262,10 @@ config SYS_64BIT_LBA
help
  Make the block subsystem use 64bit sector addresses, rather than the
  default of 32bit.
+
+config RKMTD
+   bool "Rockchip rkmtd virtual block device"
+   help
+ Enable "rkmtd" class and driver to create a virtual block device
+ to transfer Rockchip boot block data to and from NAND with block
+ orientate tools like "ums" and "rockusb".
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index a161d145fd39..fdcba5c8318f 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -11,6 +11,7 @@ endif

 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_IDE) += ide.o
+obj-$(CONFIG_RKMTD) += rkmtd.o
 endif
 obj-$(CONFIG_SANDBOX) += sandbox.o host-uclass.o host_dev.o
 obj-$(CONFIG_$(SPL_TPL_)BLOCK_CACHE) += blkcache.o
@@ -19,3 +20,4 @@ obj-$(CONFIG_BLKMAP) += blkmap.o
 obj-$(CONFIG_EFI_MEDIA) += efi-media-uclass.o
 obj-$(CONFIG_EFI_MEDIA_SANDBOX) += sb_efi_media.o
 obj-$(CONFIG_EFI_MEDIA_BLK) += efi_blk.o
+
diff --git a/drivers/block/rkmtd.c b/drivers/block/rkmtd.c
new file mode 100644
index ..061c8d9b7c1a
--- /dev/null
+++ b/drivers/block/rkmtd.c
@@ -0,0 +1,1138 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Some functions are derived from:
+ * 
https://github.com/rockchip-linux/u-boot/blob/next-dev/drivers/rknand/rk_ftl_arm_v7.S
+ * Copyright (c) 2016-2018, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Driver interface derived from:
+ * /drivers/block/host_dev.c
+ * /drivers/block/host-uclass.c
+ * Copyright 2022 Google LLC
+ * Written by Simon Glass 
+ *
+ * Copyright (C) 2023 Johan Jonker 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#if !IS_ENABLED(CONFIG_SANDBOX)
+#include 
+#endif
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct nand_para_info nand_para_tbl[] = {
+   {6, {0x2c, 0x64, 0x44, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x44, 0x44, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 1064, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x68, 0x04, 0x4a, 0xa9, 0x00}, 4, 1,  8,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x88, 0x04, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0xa8, 0x05, 0xcb, 0xa9, 0x00}, 4, 2, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x68, 0x04, 0x46, 0x89, 0x00}, 4, 1,  8,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x48, 0x04, 0x4a, 0xa5, 0x00}, 4, 1,  8,  256, 2, 2, 1024, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x84, 0x64, 0x3c, 0xa5, 0x00}, 4, 1, 32,  512, 2, 2, 1024, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x84, 0x64, 0x54, 0xa9, 0x00}, 4, 1, 32,  512, 2, 2, 1024, 
0x01df,  4, 18, 60, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0xd7, 0x94, 0x3e, 0x84, 0x00}, 4, 1,  8,  128, 2, 2, 4096, 
0x0117,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x48, 0x04, 0x46, 0x85, 0x00}, 4, 1,  8,  256, 2, 2, 1024, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x88, 0x05, 0xc6, 0x89, 0x00}, 4, 2,  8,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x88, 0x24, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x68, 0x00, 0x27, 0xa9, 0x00}, 4, 1, 16,  128, 1, 2, 2048, 
0x011f,  0,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x64, 0x64, 0x56, 0xa5, 0x00}, 4, 1, 24,  512, 2, 2,  700, 
0x01df,  4, 18, 60, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x84, 0xc5, 0x4b, 0xa9, 0x00}, 4, 2, 16,  256, 2, 2, 2048, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0xd5, 0xd1, 0xa6, 0x68, 0x00}, 4, 2,  8,   64, 1, 2, 

[PATCH v3 4/7] rockchip: block: blk-uclass: disable bounce buffer support for rkmtd

[Johan Jonker]

Disable bounce buffer support for rkmtd.

Signed-off-by: Johan Jonker 
---

Changed V3:
  New patch
---
 drivers/block/blk-uclass.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 30ad5bbb0024..ac1b43d757d8 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -415,7 +415,7 @@ struct blk_bounce_buffer {

 static int blk_buffer_aligned(struct bounce_buffer *state)
 {
-#if IS_ENABLED(CONFIG_BOUNCE_BUFFER)
+#if IS_ENABLED(CONFIG_BOUNCE_BUFFER) && !IS_ENABLED(CONFIG_RKMTD)
struct blk_bounce_buffer *bbstate =
container_of(state, struct blk_bounce_buffer, state);
struct udevice *dev = bbstate->dev;
@@ -441,7 +441,7 @@ long blk_read(struct udevice *dev, lbaint_t start, lbaint_t 
blkcnt, void *buf)
  start, blkcnt, desc->blksz, buf))
return blkcnt;

-   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER)) {
+   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER) && !IS_ENABLED(CONFIG_RKMTD)) {
struct blk_bounce_buffer bbstate = { .dev = dev };
int ret;

@@ -478,7 +478,7 @@ long blk_write(struct udevice *dev, lbaint_t start, 
lbaint_t blkcnt,

blkcache_invalidate(desc->uclass_id, desc->devnum);

-   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER)) {
+   if (IS_ENABLED(CONFIG_BOUNCE_BUFFER) && !IS_ENABLED(CONFIG_RKMTD)) {
struct blk_bounce_buffer bbstate = { .dev = dev };
int ret;

--
2.39.2

[PATCH v3 6/7] rockchip: test: dm: add rkmtd test

[Johan Jonker]

Add Rockchip rkmtd test:
Create/attach/detach RKMTD device.
Send/read data with Rockchip boot block header.
Test that reusing the same label should work.
Basic test of 'rkmtd' commands.

Signed-off-by: Johan Jonker 
---

Changed V3:
  New patch
---
 test/dm/Makefile |   1 +
 test/dm/rkmtd.c  | 201 +++
 2 files changed, 202 insertions(+)
 create mode 100644 test/dm/rkmtd.c

diff --git a/test/dm/Makefile b/test/dm/Makefile
index 7ed00733c1a6..a5e0a2744375 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -100,6 +100,7 @@ obj-$(CONFIG_REMOTEPROC) += remoteproc.o
 obj-$(CONFIG_DM_RESET) += reset.o
 obj-$(CONFIG_SYSRESET) += sysreset.o
 obj-$(CONFIG_DM_REGULATOR) += regulator.o
+obj-$(CONFIG_CMD_RKMTD) += rkmtd.o
 obj-$(CONFIG_DM_RNG) += rng.o
 obj-$(CONFIG_DM_RTC) += rtc.o
 obj-$(CONFIG_SCMI_FIRMWARE) += scmi.o
diff --git a/test/dm/rkmtd.c b/test/dm/rkmtd.c
new file mode 100644
index ..90b404f85441
--- /dev/null
+++ b/test/dm/rkmtd.c
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Test derived from:
+ * /test/dm/host.c
+ * Copyright 2022 Google LLC
+ * Written by Simon Glass 
+ *
+ * Copyright (C) 2023 Johan Jonker 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define BUF_SIZE   12 * 512
+
+/* Basic test of the RKMTD interface */
+static int dm_test_rkmtd(struct unit_test_state *uts)
+{
+   struct udevice *dev, *part, *chk, *blk;
+   char write[BUF_SIZE], read[BUF_SIZE];
+   static const char label[] = "test";
+   struct rkmtd_dev *plat;
+   struct blk_desc *desc;
+   struct sector0 *sec0;
+   int i;
+
+   ut_asserteq(-ENODEV, uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq(-ENODEV, uclass_first_device_err(UCLASS_PARTITION, ));
+
+   ut_assertok(rkmtd_create_device(label, ));
+
+   /* Check that the plat data has been allocated */
+   plat = dev_get_plat(dev);
+   ut_asserteq_str("test", plat->label);
+   ut_assert(label != plat->label);
+
+   /* Attach RKMTD driver */
+   ut_assertok(rkmtd_attach(dev));
+   ut_assertok(uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq_ptr(chk, dev);
+
+   /* Get RKMTD block device */
+   ut_assertok(blk_get_from_parent(dev, ));
+   ut_assertok(device_probe(blk));
+
+   /* There should be a GPT partition table in this device */
+   ut_asserteq(0, uclass_first_device_err(UCLASS_PARTITION, ));
+
+   /* Write a boot block and verify that we get the same data back */
+   desc = dev_get_uclass_plat(blk);
+   ut_asserteq(true, desc->removable);
+   ut_asserteq(LBA, desc->lba);
+
+   memset(write, 0, BLK_SIZE);
+
+   for (i = BLK_SIZE; i < sizeof(write); i++)
+   write[i] = i;
+
+   sec0 = (struct sector0 *)write;
+   sec0->magic = 0x0FF0AA55;
+   sec0->rc4_flag = 0;
+   sec0->boot_code1_offset = 4;
+   sec0->boot_code2_offset = 4;
+   sec0->flash_data_size = 4;
+   sec0->flash_boot_size = 8;
+
+   rkmtd_rc4(write, 512);
+
+   ut_asserteq(12, blk_dwrite(desc, 64, 12, write));
+   ut_asserteq(12, blk_dread(desc, 64, 12, read));
+   ut_asserteq_mem(write, read, BUF_SIZE);
+
+   ut_assertok(rkmtd_detach(dev));
+
+   ut_asserteq(-ENODEV, blk_get_from_parent(dev, ));
+   ut_assertok(device_unbind(dev));
+
+   return 0;
+}
+DM_TEST(dm_test_rkmtd, UT_TESTF_SCAN_FDT);
+
+/* Reusing the same label should work */
+static int dm_test_rkmtd_dup(struct unit_test_state *uts)
+{
+   static const char label[] = "test";
+   struct udevice *dev, *chk;
+
+   /* Create a RKMTD device with label "test" */
+   ut_asserteq(0, uclass_id_count(UCLASS_RKMTD));
+   ut_assertok(rkmtd_create_device(label, ));
+   ut_assertok(rkmtd_attach(dev));
+   ut_assertok(uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq_ptr(chk, dev);
+   ut_asserteq(1, uclass_id_count(UCLASS_RKMTD));
+
+   /* Create another device with the same label (should remove old one) */
+   ut_assertok(rkmtd_create_device(label, ));
+   ut_assertok(rkmtd_attach(dev));
+   ut_assertok(uclass_first_device_err(UCLASS_RKMTD, ));
+   ut_asserteq_ptr(chk, dev);
+
+   /* Make sure there is still only one device */
+   ut_asserteq(1, uclass_id_count(UCLASS_RKMTD));
+
+   return 0;
+}
+DM_TEST(dm_test_rkmtd_dup, UT_TESTF_SCAN_FDT);
+
+/* Basic test of the 'rkmtd' command */
+static int dm_test_rkmtd_cmd(struct unit_test_state *uts)
+{
+   struct udevice *dev, *blk;
+   struct blk_desc *desc;
+
+   console_record_reset();
+
+   /* First check 'rkmtd info' with binding */
+   ut_assertok(run_command("rkmtd info", 0));
+   ut_assert_nextline("dev   blocks label  ");
+   ut_assert_co

[PATCH v3 1/7] mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN option

[Johan Jonker]

On Rockchip SoCs the first boot stages are written on NAND
with help of manufacturer software that uses a different format
then the MTD framework. Skip the automatic BBT scan with the
NAND_SKIP_BBTSCAN option to be able to pass the driver probe
function and to let the original data unchanged.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---
 drivers/mtd/nand/raw/Kconfig| 9 +
 drivers/mtd/nand/raw/rockchip_nfc.c | 3 +++
 2 files changed, 12 insertions(+)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index d624589a892b..72547f00fbec 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -611,6 +611,15 @@ config ROCKCHIP_NAND
NFC v800: RK3308, RV1108
NFC v900: PX30, RK3326

+config ROCKCHIP_NAND_SKIP_BBTSCAN
+   bool "Skip the automatic BBT scan with Rockchip NAND controllers"
+   depends on ROCKCHIP_NAND
+   default n
+   help
+ Skip the automatic BBT scan with the NAND_SKIP_BBTSCAN
+ option when data content is not in MTD format or
+ must remain unchanged.
+
 config TEGRA_NAND
bool "Support for NAND controller on Tegra SoCs"
depends on ARCH_TEGRA
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c 
b/drivers/mtd/nand/raw/rockchip_nfc.c
index 6ad51df4acff..df6742c2f9bb 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -981,6 +981,9 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc 
*nfc, int devnum)
chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;

+   if (IS_ENABLED(CONFIG_ROCKCHIP_NAND_SKIP_BBTSCAN))
+   chip->options |= NAND_SKIP_BBTSCAN;
+
rk_nfc_hw_init(nfc);
ret = nand_scan_ident(mtd, nsels, NULL);
if (ret)
--
2.39.2

[PATCH v3 2/7] rockchip: dm: prepare rkmtd UCLASS

[Johan Jonker]

Prepare a rkmtd UCLASS in use for writing Rockchip boot blocks
in combination with existing userspace tools and rockusb command.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---
 disk/part.c| 4 
 drivers/block/blk-uclass.c | 1 +
 include/dm/uclass-id.h | 1 +
 3 files changed, 6 insertions(+)

diff --git a/disk/part.c b/disk/part.c
index 85244b09f359..36b88205eca7 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -197,6 +197,7 @@ void dev_print(struct blk_desc *desc)
case UCLASS_PVBLOCK:
case UCLASS_HOST:
case UCLASS_BLKMAP:
+   case UCLASS_RKMTD:
printf ("Vendor: %s Rev: %s Prod: %s\n",
desc->vendor,
desc->revision,
@@ -330,6 +331,9 @@ static void print_part_header(const char *type, struct 
blk_desc *desc)
case UCLASS_PVBLOCK:
puts("PV BLOCK");
break;
+   case UCLASS_RKMTD:
+   puts("RKMTD");
+   break;
case UCLASS_VIRTIO:
puts("VirtIO");
break;
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index f126547cc7e6..30ad5bbb0024 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -36,6 +36,7 @@ static struct {
{ UCLASS_VIRTIO, "virtio" },
{ UCLASS_PVBLOCK, "pvblock" },
{ UCLASS_BLKMAP, "blkmap" },
+   { UCLASS_RKMTD, "rkmtd" },
 };

 static enum uclass_id uclass_name_to_iftype(const char *uclass_idname)
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 0432c95c9edc..2fc672df0a3a 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -120,6 +120,7 @@ enum uclass_id {
UCLASS_REGULATOR,   /* Regulator device */
UCLASS_REMOTEPROC,  /* Remote Processor device */
UCLASS_RESET,   /* Reset controller device */
+   UCLASS_RKMTD,   /* Rockchip MTD device */
UCLASS_RNG, /* Random Number Generator */
UCLASS_RTC, /* Real time clock device */
UCLASS_SCMI_AGENT,  /* Interface with an SCMI server */
--
2.39.2

[PATCH v3 0/7] Add rkmtd command

[Johan Jonker]

The command rkmtd creates a virtual block device to transfer
Rockchip boot block data to and from NAND with block orientated
tools like "ums" and "rockusb".

It uses the Rockchip MTD driver to scan for boot blocks and copies
data from the first block in a GPT formatted virtual disk.
Data must be written in U-boot "idbloader.img" format and start at
partition "loader1" offset 64. The data header is parsed
for length and offset. When the last sector is received
it erases up to 5 erase blocks on NAND and writes boot blocks
in a pattern depending on the NAND ID. Data is then verified.
When a block turns out bad the block header is discarded.

Changed V3:
  Add documetation
  Add test
  Split driver from command
  Split header
  Use devm_kzalloc
  Remove out of memory debug
  Restyle

Changed V2:
  Rename to rkmtd

Johan Jonker (7):
  mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN option
  rockchip: dm: prepare rkmtd UCLASS
  rockchip: block: add rkmtd class and drivers
  rockchip: block: blk-uclass: disable bounce buffer support for rkmtd
  rockchip: cmd: add rkmtd command
  rockchip: test: dm: add rkmtd test
  rockchip: doc: add rkmtd.rst

 cmd/Kconfig |8 +
 cmd/Makefile|1 +
 cmd/rkmtd.c |  204 +
 disk/part.c |4 +
 doc/board/rockchip/index.rst|1 +
 doc/board/rockchip/rkmtd.rst|  105 +++
 drivers/block/Kconfig   |7 +
 drivers/block/Makefile  |2 +
 drivers/block/blk-uclass.c  |7 +-
 drivers/block/rkmtd.c   | 1138 +++
 drivers/mtd/nand/raw/Kconfig|9 +
 drivers/mtd/nand/raw/rockchip_nfc.c |3 +
 include/dm/uclass-id.h  |1 +
 include/rkmtd.h |  190 +
 test/dm/Makefile|1 +
 test/dm/rkmtd.c |  201 +
 16 files changed, 1879 insertions(+), 3 deletions(-)
 create mode 100644 cmd/rkmtd.c
 create mode 100644 doc/board/rockchip/rkmtd.rst
 create mode 100644 drivers/block/rkmtd.c
 create mode 100644 include/rkmtd.h
 create mode 100644 test/dm/rkmtd.c

--
2.39.2

Re: [PATCH v2 2/3] dm: prepare rkmtd UCLASS

[Johan Jonker]

On 10/2/23 03:16, Simon Glass wrote:
> Hi Johan,
> 
> On Thu, 28 Sept 2023 at 12:51, Johan Jonker  wrote:
>>
>> Prepare a rkmtd UCLASS in use for writing Rockchip boot blocks
>> in combination with existing userspace tools and rockusb command.
>>
>> Signed-off-by: Johan Jonker 
>> Reviewed-by: Kever Yang 
>> ---
>>  disk/part.c| 4 
>>  drivers/block/blk-uclass.c | 1 +
>>  include/dm/uclass-id.h | 1 +
>>  3 files changed, 6 insertions(+)
>>
> 
> A new uclass should have a sandbox test and a header file or some
> other docs describing it.

Hi Simon, Mark,

Found by git bisect. This serie worked fine till this patch was applied:

blk: Add bounce buffer support to read/write operations
https://source.denx.de/u-boot/u-boot/-/commit/75191f75bce45f3b9aff607c88f17778d3805c61

On Rockchip boards CONFIG_BOUNCE_BUFFER is selected by CONFIG_MMC_DW.
These DW controllers have there own DMA interface.
However Rockchip boards CONFIG_DM_DMA is not enabled.
A virtual disk driver doesn't work with that extra buffer.

This patch is there. What route should we take to get rid of it.

Please advise,

Johan



> 
> REgards,
> Simon

[PATCH v2 3/3] rockchip: cmd: add rkmtd command

[Johan Jonker]

The command rkmtd creates a virtual block device to transfer
Rockchip boot block data to and from NAND with block orientated
tools like "ums" and "rockusb".

It uses the Rockchip MTD driver to scan for boot blocks and copies
data from the first block in a GPT formated virtual disk.
Data must be written in U-boot "idbloader.img" format and start at
partition "loader1" offset 64. The data header is parsed
for length and offset. When the last sector is received
it erases up to 5 erase blocks on NAND and writes bootblocks
in a pattern depending on the NAND ID. Data is then verified.
When a block turns out bad the block header is discarded.

Signed-off-by: Johan Jonker 
---

Changed V2:
  rename to rkmtd
  change function call
  restyle
---
 cmd/Kconfig  |7 +
 cmd/Makefile |1 +
 cmd/rkmtd.c  | 1432 ++
 3 files changed, 1440 insertions(+)
 create mode 100644 cmd/rkmtd.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 2d6e5f993f04..4ce6123b5017 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1553,6 +1553,13 @@ config CMD_USB_SDP
  Enables the command "sdp" which is used to have U-Boot emulating the
  Serial Download Protocol (SDP) via USB.

+config CMD_RKMTD
+   bool "rkmtd"
+   help
+ Enable the command "rkmtd" to create a virtual block device to 
transfer
+ Rockchip boot block data to and from NAND with block orientated tools
+ like "ums" and "rockusb".
+
 config CMD_ROCKUSB
bool "rockusb"
depends on USB_FUNCTION_ROCKUSB
diff --git a/cmd/Makefile b/cmd/Makefile
index 9f8c0b058bea..dfada2306026 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -150,6 +150,7 @@ obj-$(CONFIG_CMD_REISER) += reiser.o
 obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
 obj-$(CONFIG_CMD_RNG) += rng.o
 obj-$(CONFIG_CMD_KASLRSEED) += kaslrseed.o
+obj-$(CONFIG_CMD_RKMTD) += rkmtd.o
 obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_CMD_RTC) += rtc.o
 obj-$(CONFIG_SANDBOX) += host.o
diff --git a/cmd/rkmtd.c b/cmd/rkmtd.c
new file mode 100644
index ..d6f9dd3d0952
--- /dev/null
+++ b/cmd/rkmtd.c
@@ -0,0 +1,1432 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) 2023 Johan Jonker 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define LBA64 + 512 + 33
+
+#define RK_TAG 0xFCDC8C3B
+#define NFC_SYS_DATA_SIZE  4
+
+struct nand_para_info {
+   u8 id_bytes;
+   u8 nand_id[6];
+   u8 vendor;
+   u8 die_per_chip;
+   u8 sec_per_page;
+   u16 page_per_blk;
+   u8 cell;
+   u8 plane_per_die;
+   u16 blk_per_plane;
+   u16 operation_opt;
+   u8 lsb_mode;
+   u8 read_retry_mode;
+   u8 ecc_bits;
+   u8 access_freq;
+   u8 opt_mode;
+   u8 die_gap;
+   u8 bad_block_mode;
+   u8 multi_plane_mode;
+   u8 slc_mode;
+   u8 reserved[5];
+};
+
+struct bootblk {
+   int blk;
+   int boot_size;
+   int offset;
+};
+
+struct rkmtd_dev {
+   struct blk_desc *desc;
+   char *label;
+   legacy_mbr *mbr;
+   gpt_header *gpt_h;
+   gpt_header *gpt_h2;
+   gpt_entry *gpt_e;
+   char *check;
+   char *idb;
+   char *str;
+   char uuid_part_str[UUID_STR_LEN + 1];
+   char uuid_disk_str[UUID_STR_LEN + 1];
+   char *datbuf;
+   char *oobbuf;
+   struct mtd_info *mtd;
+   struct nand_para_info *info;
+   u16 page_table[512];
+   u32 idb_need_write_back;
+   struct bootblk idblock[5];
+   u32 blk_counter;
+   u32 boot_blks;
+   u32 offset;
+   u32 boot_size;
+};
+
+struct sector0 {
+   u32 magic;
+   u8  reserved[4];
+   u32 rc4_flag;
+   u16 boot_code1_offset;
+   u16 boot_code2_offset;
+   u8  reserved1[490];
+   u16 flash_data_size;
+   u16 flash_boot_size;
+   u8  reserved2[2];
+} __packed;
+
+struct rk_nfc_nand_chip {
+   struct nand_chip chip;
+
+   u16 boot_blks;
+   u16 metadata_size;
+   u32 boot_ecc;
+   u32 timing;
+
+   u8 nsels;
+   u8 sels[0];
+   /* Nothing after this field. */
+};
+
+struct nand_para_info nand_para_tbl[] = {
+   {6, {0x2c, 0x64, 0x44, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x44, 0x44, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 1064, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x68, 0x04, 0x4a, 0xa9, 0x00}, 4, 1,  8,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x88, 0x04, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0xa8, 0x05, 0

[PATCH v2 2/3] dm: prepare rkmtd UCLASS

[Johan Jonker]

Prepare a rkmtd UCLASS in use for writing Rockchip boot blocks
in combination with existing userspace tools and rockusb command.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---
 disk/part.c| 4 
 drivers/block/blk-uclass.c | 1 +
 include/dm/uclass-id.h | 1 +
 3 files changed, 6 insertions(+)

diff --git a/disk/part.c b/disk/part.c
index 186ee965006e..a65f9df5dd29 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -170,6 +170,7 @@ void dev_print(struct blk_desc *dev_desc)
case UCLASS_PVBLOCK:
case UCLASS_HOST:
case UCLASS_BLKMAP:
+   case UCLASS_RKMTD:
printf ("Vendor: %s Rev: %s Prod: %s\n",
dev_desc->vendor,
dev_desc->revision,
@@ -303,6 +304,9 @@ static void print_part_header(const char *type, struct 
blk_desc *dev_desc)
case UCLASS_PVBLOCK:
puts("PV BLOCK");
break;
+   case UCLASS_RKMTD:
+   puts("RKMTD");
+   break;
case UCLASS_VIRTIO:
puts("VirtIO");
break;
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 614b975e25c2..6bad2719e729 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -34,6 +34,7 @@ static struct {
{ UCLASS_VIRTIO, "virtio" },
{ UCLASS_PVBLOCK, "pvblock" },
{ UCLASS_BLKMAP, "blkmap" },
+   { UCLASS_RKMTD, "rkmtd" },
 };

 static enum uclass_id uclass_name_to_iftype(const char *uclass_idname)
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 307ad6931ca7..99a411429a2f 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -113,6 +113,7 @@ enum uclass_id {
UCLASS_REGULATOR,   /* Regulator device */
UCLASS_REMOTEPROC,  /* Remote Processor device */
UCLASS_RESET,   /* Reset controller device */
+   UCLASS_RKMTD,   /* Rockchip MTD device */
UCLASS_RNG, /* Random Number Generator */
UCLASS_RTC, /* Real time clock device */
UCLASS_SCMI_AGENT,  /* Interface with an SCMI server */
--
2.39.2

[PATCH v2 1/3] mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN option

[Johan Jonker]

On Rockchip SoCs the first boot stages are written on NAND
with help of manufacturer software that uses a different format
then the MTD framework. Skip the automatic BBT scan with the
NAND_SKIP_BBTSCAN option to be able to pass the driver probe
function and to let the original data unchanged.

Signed-off-by: Johan Jonker 
Reviewed-by: Kever Yang 
---
 drivers/mtd/nand/raw/Kconfig| 9 +
 drivers/mtd/nand/raw/rockchip_nfc.c | 3 +++
 2 files changed, 12 insertions(+)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index d624589a892b..72547f00fbec 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -611,6 +611,15 @@ config ROCKCHIP_NAND
NFC v800: RK3308, RV1108
NFC v900: PX30, RK3326

+config ROCKCHIP_NAND_SKIP_BBTSCAN
+   bool "Skip the automatic BBT scan with Rockchip NAND controllers"
+   depends on ROCKCHIP_NAND
+   default n
+   help
+ Skip the automatic BBT scan with the NAND_SKIP_BBTSCAN
+ option when data content is not in MTD format or
+ must remain unchanged.
+
 config TEGRA_NAND
bool "Support for NAND controller on Tegra SoCs"
depends on ARCH_TEGRA
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c 
b/drivers/mtd/nand/raw/rockchip_nfc.c
index 6ad51df4acff..df6742c2f9bb 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -981,6 +981,9 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc 
*nfc, int devnum)
chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;

+   if (IS_ENABLED(CONFIG_ROCKCHIP_NAND_SKIP_BBTSCAN))
+   chip->options |= NAND_SKIP_BBTSCAN;
+
rk_nfc_hw_init(nfc);
ret = nand_scan_ident(mtd, nsels, NULL);
if (ret)
--
2.39.2

[PATCH v2 0/3] Add rkmtd command

[Johan Jonker]

The command rkmtd creates a virtual block device to transfer
Rockchip boot block data to and from NAND with block orientated
tools like "ums" and "rockusb".

It uses the Rockchip MTD driver to scan for boot blocks and copies
data from the first block in a GPT formatted virtual disk.
Data must be written in U-boot "idbloader.img" format and start at
partition "loader1" offset 64. The data header is parsed
for length and offset. When the last sector is received
it erases up to 5 erase blocks on NAND and writes boot blocks
in a pattern depending on the NAND ID. Data is then verified.
When a block turns out bad the block header is discarded.

Limitations:
Support for Rockchip boot block header type 1 only.
Pattern for listed NAND IDs only. (Logic still not disclosed by Rockchip)
The MTD framework driver data and NAND ID must be extracted at a lower level.

Available rkmtd commands:
rkmtd bind   - bind RKMTD device
rkmtd unbind - unbind RKMTD device
rkmtd info []- show all available RKMTD devices
rkmtd dev [] - show or set current RKMTD device

U-boot settings:
Config to enable Rockchip MTD support:
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_ROCKCHIP_NAND=y

Option to keep existing NAND data unchanged:
CONFIG_ROCKCHIP_NAND_SKIP_BBTSCAN=y

Commands to enable:
CONFIG_CMD_USB=y
CONFIG_CMD_RKMTD=y
CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y

Linux Host (PC) tool commands combinations that work:

U-boot  Linux
rkmtd bind 0

# rockusb
rockusb 0 rkmtd 0
upgrade_tool pl
upgrade_tool wl 64 idbloader.img
upgrade_tool rl 64 512 
upgrade_tool_rl_64_512.img
upgrade_tool rd

rkdeveloptool ppt
rkdeveloptool wlx loader1 idbloader.img
rkdeveloptool wl 64 idbloader.img
rkdeveloptool rl 64 512 
rkdeveloptool_rl_64_512.img
rkdeveloptool rd

rkflashtool w 64 512 < idbloader.img
rkflashtool r 64 512 > 
rkflashtool_r_64_512.img
# ums
ums 0 rkmtd 0
dd if=idbloader.img of=/dev/sda1
    dd if=/dev/sda1 of=ums_0_idb_0_rd.img

Johan Jonker (3):
  mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN option
  dm: prepare rkmtd UCLASS
  rockchip: cmd: add rkmtd command

 cmd/Kconfig |7 +
 cmd/Makefile|1 +
 cmd/rkmtd.c | 1432 +++
 disk/part.c |4 +
 drivers/block/blk-uclass.c  |1 +
 drivers/mtd/nand/raw/Kconfig|9 +
 drivers/mtd/nand/raw/rockchip_nfc.c |3 +
 include/dm/uclass-id.h  |1 +
 8 files changed, 1458 insertions(+)
 create mode 100644 cmd/rkmtd.c

--
2.39.2

[RESEND PATCH v2] rockchip: include: asm: fix entering download mode rk3066

[Johan Jonker]

Keep track of the re-entries with help of the lr register.
This binary can be re-used and called from various BROM functions.
Only when it's called from the part that handles SPI, NAND or EMMC
hardware it needs to early return to BROM ones.
In download mode when it handles data on USB OTG and UART0
this section must be skipped.

Unlike newer Rockchip SoC models the rk3066 BROM code does not have built-in
support to enter download mode on return to BROM. This binary must check
the boot mode register for the BOOT_BROM_DOWNLOAD flag and reset if it's set.
It then returns to BROM to the end of the function that reads boot blocks.
>From there the BROM code goes into a download mode and waits for data
on USB OTG and UART0.

Signed-off-by: Johan Jonker 
---

Note:
  Normal boot flow is OK.
  In download mode this binary hangs after return to BROM for unknown reasons.
  Replace CODE471_OPTION with 30_LPDDR2_300MHz_DD.bin for now.

  Could Rockchip disclose what further conditions must be met
  in rk3066 download mode?

Changed V2:
  Move file to rk3066 specific location
  Replace retry_counter by LR check
  Add DNL mode return address
  Restyle
  Reword
---
 arch/arm/include/asm/arch-rk3066/boot0.h | 77 +++-
 arch/arm/mach-rockchip/Kconfig   | 17 +-
 arch/arm/mach-rockchip/rk3066/Kconfig|  6 ++
 3 files changed, 98 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-rk3066/boot0.h 
b/arch/arm/include/asm/arch-rk3066/boot0.h
index 28c0fb9a4c6b..1af4b9c1d7ba 100644
--- a/arch/arm/include/asm/arch-rk3066/boot0.h
+++ b/arch/arm/include/asm/arch-rk3066/boot0.h
@@ -3,6 +3,81 @@
 #ifndef __ASM_ARCH_BOOT0_H__
 #define __ASM_ARCH_BOOT0_H__

-#include 
+#include 

+/*
+ * Execution starts on the instruction following this 4-byte header
+ * (containing the magic 'RK30'). This magic constant will be written into
+ * the final image by the rkimage tool, but we need to reserve space for it 
here.
+ */
+#ifdef CONFIG_SPL_BUILD
+   b   1f  /* if overwritten, entry-address is at the next word */
+1:
+#endif
+
+#if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
+/*
+ * Keep track of the re-entries with help of the lr register.
+ * This binary can be re-used and called from various BROM functions.
+ * Only when it's called from the part that handles SPI, NAND or EMMC
+ * hardware it needs to early return to BROM ones.
+ * In download mode when it handles data on USB OTG and UART0
+ * this section must be skipped.
+ */
+   ldr r3, =CONFIG_ROCKCHIP_BOOT_LR_REG
+   cmp lr, r3  /* if (LR != CONFIG_ROCKCHIP_BOOT_LR_REG)   
 */
+   bne reset   /* goto reset;  
 */
+/*
+ * Unlike newer Rockchip SoC models the rk3066 BROM code does not have built-in
+ * support to enter download mode on return to BROM. This binary must check
+ * the boot mode register for the BOOT_BROM_DOWNLOAD flag and reset if it's 
set.
+ * It then returns to BROM to the end of the function that reads boot blocks.
+ * From there the BROM code goes into a download mode and waits for data
+ * on USB OTG and UART0.
+ */
+   ldr r2, =BOOT_BROM_DOWNLOAD
+   ldr r3, =CONFIG_ROCKCHIP_BOOT_MODE_REG
+   ldr r0, [r3]/* if (readl(CONFIG_ROCKCHIP_BOOT_MODE_REG) !=  
 */
+   cmp r0, r2  /* BOOT_BROM_DOWNLOAD) {
 */
+   bne early_return/* goto early_return;   
 */
+   /* } else { 
 */
+   mov r0, #0
+   str r0, [r3]/* writel(0, 
CONFIG_ROCKCHIP_BOOT_MODE_REG); */
+
+   ldr r3, =CONFIG_ROCKCHIP_BOOT_RETURN_REG
+   bx  r3  /* return to 
CONFIG_ROCKCHIP_BOOT_RETURN_REG;*/
+
+early_return:
+   bx  lr  /*  return to LR in BROM
 */
+
+SAVE_SP_ADDR:
+   .word 0
+
+   .globl save_boot_params
+save_boot_params:
+   push{r1-r12, lr}
+   ldr r0, =SAVE_SP_ADDR
+   str sp, [r0]
+   b   save_boot_params_ret
+
+   .globl back_to_bootrom
+back_to_bootrom:
+   ldr r0, =SAVE_SP_ADDR
+   ldr sp, [r0]
+   mov r0, #0
+   pop {r1-r12, pc}
+#endif
+
+#if (defined(CONFIG_SPL_BUILD))
+/* U-Boot proper of armv7 does not need this */
+   b reset
+#endif
+
+/*
+ * For armv7, the addr '_start' will be used as vector start address
+ * and is written to the VBAR register, which needs to aligned to 0x20.
+ */
+   .align(5), 0x0
+_start:
+   ARM_VECTORS
 #endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 07b5595dac8c..84a2f0d5ff48 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -402,7 +402,7 @@ config SPL_ROCKCHIP_BACK_TO_BROM
 config TPL_ROCKCHIP_BACK_TO_BROM
bool "TPL returns to bootrom"
default y
-

Re: [PATCH v2] rockchip: include: asm: fix entering download mode rk3066

[Johan Jonker]

Hi,

It looks as if all the TABs are gone.

Will resend.

Johan

On 9/19/23 16:57, Johan Jonker wrote:
> Keep track of the re-entries with help of the lr register.
> This binary can be re-used and called from various BROM functions.
> Only when it's called from the part that handles SPI, NAND or EMMC
> hardware it needs to early return to BROM ones.
> In download mode when it handles data on USB OTG and UART0
> this section must be skipped.
>
> Unlike newer Rockchip SoC models the rk3066 BROM code does not have built-in
> support to enter download mode on return to BROM. This binary must check
> the boot mode register for the BOOT_BROM_DOWNLOAD flag and reset if it's set.
> It then returns to BROM to the end of the function that reads boot blocks.
> From there the BROM code goes into a download mode and waits for data
> on USB OTG and UART0.
>
> Signed-off-by: Johan Jonker 
> ---

[PATCH v2] rockchip: include: asm: fix entering download mode rk3066

[Johan Jonker]

Keep track of the re-entries with help of the lr register.
This binary can be re-used and called from various BROM functions.
Only when it's called from the part that handles SPI, NAND or EMMC
hardware it needs to early return to BROM ones.
In download mode when it handles data on USB OTG and UART0
this section must be skipped.

Unlike newer Rockchip SoC models the rk3066 BROM code does not have built-in
support to enter download mode on return to BROM. This binary must check
the boot mode register for the BOOT_BROM_DOWNLOAD flag and reset if it's set.
It then returns to BROM to the end of the function that reads boot blocks.
>From there the BROM code goes into a download mode and waits for data
on USB OTG and UART0.

Signed-off-by: Johan Jonker 
---

Note:
Normal boot flow is OK.
In download mode this binary hangs after return to BROM for unknown reasons.
Replace CODE471_OPTION with 30_LPDDR2_300MHz_DD.bin for now.

Could Rockchip disclose what further conditions must be met
in rk3066 download mode?

Changed V2:
Move file to rk3066 specific location
Replace retry_counter by LR check
Add DNL mode return address
Restyle
Reword
---
arch/arm/include/asm/arch-rk3066/boot0.h | 77 +++-
arch/arm/mach-rockchip/Kconfig | 17 +-
arch/arm/mach-rockchip/rk3066/Kconfig | 6 ++
3 files changed, 98 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-rk3066/boot0.h 
b/arch/arm/include/asm/arch-rk3066/boot0.h
index 28c0fb9a4c6b..1af4b9c1d7ba 100644
--- a/arch/arm/include/asm/arch-rk3066/boot0.h
+++ b/arch/arm/include/asm/arch-rk3066/boot0.h
@@ -3,6 +3,81 @@
#ifndef __ASM_ARCH_BOOT0_H__
#define __ASM_ARCH_BOOT0_H__

-#include 
+#include 

+/*
+ * Execution starts on the instruction following this 4-byte header
+ * (containing the magic 'RK30'). This magic constant will be written into
+ * the final image by the rkimage tool, but we need to reserve space for it 
here.
+ */
+#ifdef CONFIG_SPL_BUILD
+ b 1f /* if overwritten, entry-address is at the next word */
+1:
+#endif
+
+#if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
+/*
+ * Keep track of the re-entries with help of the lr register.
+ * This binary can be re-used and called from various BROM functions.
+ * Only when it's called from the part that handles SPI, NAND or EMMC
+ * hardware it needs to early return to BROM ones.
+ * In download mode when it handles data on USB OTG and UART0
+ * this section must be skipped.
+ */
+ ldr r3, =CONFIG_ROCKCHIP_BOOT_LR_REG
+ cmp lr, r3 /* if (LR != CONFIG_ROCKCHIP_BOOT_LR_REG) */
+ bne reset /* goto reset; */
+/*
+ * Unlike newer Rockchip SoC models the rk3066 BROM code does not have built-in
+ * support to enter download mode on return to BROM. This binary must check
+ * the boot mode register for the BOOT_BROM_DOWNLOAD flag and reset if it's 
set.
+ * It then returns to BROM to the end of the function that reads boot blocks.
+ * From there the BROM code goes into a download mode and waits for data
+ * on USB OTG and UART0.
+ */
+ ldr r2, =BOOT_BROM_DOWNLOAD
+ ldr r3, =CONFIG_ROCKCHIP_BOOT_MODE_REG
+ ldr r0, [r3] /* if (readl(CONFIG_ROCKCHIP_BOOT_MODE_REG) != */
+ cmp r0, r2 /* BOOT_BROM_DOWNLOAD) { */
+ bne early_return /* goto early_return; */
+ /* } else { */
+ mov r0, #0
+ str r0, [r3] /* writel(0, CONFIG_ROCKCHIP_BOOT_MODE_REG); */
+
+ ldr r3, =CONFIG_ROCKCHIP_BOOT_RETURN_REG
+ bx r3 /* return to CONFIG_ROCKCHIP_BOOT_RETURN_REG;*/
+
+early_return:
+ bx lr /* return to LR in BROM */
+
+SAVE_SP_ADDR:
+ .word 0
+
+ .globl save_boot_params
+save_boot_params:
+ push {r1-r12, lr}
+ ldr r0, =SAVE_SP_ADDR
+ str sp, [r0]
+ b save_boot_params_ret
+
+ .globl back_to_bootrom
+back_to_bootrom:
+ ldr r0, =SAVE_SP_ADDR
+ ldr sp, [r0]
+ mov r0, #0
+ pop {r1-r12, pc}
+#endif
+
+#if (defined(CONFIG_SPL_BUILD))
+/* U-Boot proper of armv7 does not need this */
+ b reset
+#endif
+
+/*
+ * For armv7, the addr '_start' will be used as vector start address
+ * and is written to the VBAR register, which needs to aligned to 0x20.
+ */
+ .align(5), 0x0
+_start:
+ ARM_VECTORS
#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 07b5595dac8c..84a2f0d5ff48 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -402,7 +402,7 @@ config SPL_ROCKCHIP_BACK_TO_BROM
config TPL_ROCKCHIP_BACK_TO_BROM
bool "TPL returns to bootrom"
default y
- select ROCKCHIP_BROM_HELPER
+ select ROCKCHIP_BROM_HELPER if !ROCKCHIP_RK3066
select TPL_BOOTROM_SUPPORT
depends on TPL
help
@@ -448,6 +448,21 @@ config ROCKCHIP_BOOT_MODE_REG
The Soc will enter to different boot mode(defined in 
asm/arch-rockchip/boot_mode.h)
according to the value from this register.

+config ROCKCHIP_BOOT_LR_REG
+ hex "Rockchip boot early return LR address"
+ depends on TPL_ROCKCHIP_EARLYRETURN_TO_BROM || 
SPL_ROCKCHIP_EARLYRETURN_TO_BROM
+ help
+ With ROCKCHIP_EARLYRETURN_TO_BROM enabled this LR address is
+ used to keep track of the re-entries.
+
+config ROCKCHIP_BOOT_RET

Re: [PATCH v1] rockchip: include: asm: fix entering download mode rk3066

[Johan Jonker]

Hi,

Maybe put this Rockchip rk3066 patch on hold, if we can find a better solution.
Any insider help is appreciated here.

The idea to test BOOT_BROM_DOWNLOAD comes from 30_LPDDR2_300MHz_DD.bin
Setting location 0x10080028 only breaks the inner loop.
BOOT_BROM_DOWNLOAD flag is not reset.
It continues testing for boot blocks on NAND till nothing is left.
For NAND up to 50 erase blocks are tested

struct func_array function_table[4] =
{
  { _INIT, _READ_BLK, _READ_HEADER, _GET_PAGE, 50 },
  { _INIT, _READ_BLK, _READ_HEADER, _GET_PAGE, 13 },
  { _INIT, _READ_BLK, _READ_HEADER, _GET_PAGE, 13 },
  { _INIT, _READ_BLK, _READ_HEADER, _GET_PAGE, 1 }
};

Given below part of rk3066 BROM main read loop.

Proposal 1:
In case of BOOT_BROM_DOWNLOAD return to 0x1100 instead of 0x1058.
Also reset flag.

//

In case this TPL binary is reused to upload and to store this TPL entry function
can be called from 3 to 4 BROM functions. Only when data comes from
SPI, NAND or EMMC it needs to early return to BROM.
In download mode this section is skipped when the lr register
address is not in the functions that handles USB OTG and UART0.

Proposal 2:
Instead of a retry_counter test LR: 0x1058.
In all other cases skip early return

Let me know your ideas/advice!
How rk3188 handle return flag?

Johan

/

//main read loop rk3066 bootrom

 db4:   e92d4ff3push{r0, r1, r4, r5, r6, r7, r8, r9, sl, 
fp, lr}

[..]

1050:   02840004addeq   r0, r4, #4
1054:   012fff30blxeq   r0

// Branch to U-boot TPL early
// LR: 0x1058
// In case of BOOT_BROM_DOWNLOAD return to 0x1100 instead of 0x1058.

1058:   e3a01c02mov r1, #512@ 0x200
105c:   e2840b01add r0, r4, #1024   @ 0x400
1060:   ebfffc49bl  0x18c
1064:   e3a01c02mov r1, #512@ 0x200
1068:   e2840c06add r0, r4, #1536   @ 0x600
106c:   ebfffc46bl  0x18c
1070:   e2490004sub r0, r9, #4
1074:   e156cmp r6, r0
1078:   12844b02addne   r4, r4, #2048   @ 0x800
107c:   1a12bne 0x10cc
1080:   e59f10ccldr r1, [pc, #204]  @ 0x1154
1084:   e59f00d0ldr r0, [pc, #208]  @ 0x115c
1088:   e5d13000ldrbr3, [r1]
108c:   e5d02000ldrbr2, [r0]
1090:   e1530002cmp r3, r2
1094:   05d12001ldrbeq  r2, [r1, #1]
1098:   05d03001ldrbeq  r3, [r0, #1]
109c:   01520003cmpeq   r2, r3
10a0:   1a0dbne 0x10dc
10a4:   e5d12002ldrbr2, [r1, #2]
10a8:   e5d03002ldrbr3, [r0, #2]
10ac:   e1520003cmp r2, r3
10b0:   05d3ldrbeq  r0, [r0, #3]
10b4:   05d12003ldrbeq  r2, [r1, #3]
10b8:   0152cmpeq   r2, r0
10bc:   1a06bne 0x10dc

10c0:   e2810004add r0, r1, #4
10c4:   e12fff30blx r0

// Branch to U-boot TPL full
// LR2: 0x10c8

10c8:   e3a04206mov r4, #1610612736 @ 0x6000
10cc:   e598ldr r0, [r8]
10d0:   e371cmn r0, #1
10d4:   12866004addne   r6, r6, #4
10d8:   1ab6bne 0xfb8
10dc:   e1570006cmp r7, r6

10e0:   93a00206movls   r0, #1610612736 @ 0x6000
10e4:   912fff30blxls   r0

// Branch to U-boot SPL

10e8:   e28bb001add fp, fp, #1
10ec:   e59a0010ldr r0, [sl, #16]
10f0:   e15bcmp r0, fp
10f4:   92855001addls   r5, r5, #1
10f8:   9a35bls 0xdd4
10fc:   ea88b   0xf24

// End off read loop
// In case of BOOT_BROM_DOWNLOAD return to 0x1100 instead of 0x1058 to prevent 
further testing.

1100:   e8bd8ffepop {r1, r2, r3, r4, r5, r6, r7, r8, r9, 
sl, fp, pc}



On 9/11/23 17:37, Johan Jonker wrote:
> When a Rockchip rk3066 board download key is pressed it hangs.
> The rk3066 BROM doesn't have support to check the return to BROM,
> so when a key is pressed the loop that reads data must be broken
> by writing a "-1" to the variable that points to the next page address.
> It then goes in download mode and waits for data on USB OTG and UART0.
> 
> Signed-off-by: Johan Jonker 
> ---
>  arch/arm/include/asm/arch-rockchip/boot0.h | 32 +++---
>  1 file changed, 28 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h 
> b/arch/arm/include/asm/arch-rockchip/boot0.h
> index 0c375e543a5e..305461ce3751 100644
> --- a/arch/arm/include/asm/arch-rockchip/boot0.h
> +++ b/arch/arm/include/asm/arch-rockchi

[PATCH v1] rockchip: include: asm: fix entering download mode rk3066

[Johan Jonker]

When a Rockchip rk3066 board download key is pressed it hangs.
The rk3066 BROM doesn't have support to check the return to BROM,
so when a key is pressed the loop that reads data must be broken
by writing a "-1" to the variable that points to the next page address.
It then goes in download mode and waits for data on USB OTG and UART0.

Signed-off-by: Johan Jonker 
---
 arch/arm/include/asm/arch-rockchip/boot0.h | 32 +++---
 1 file changed, 28 insertions(+), 4 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h 
b/arch/arm/include/asm/arch-rockchip/boot0.h
index 0c375e543a5e..305461ce3751 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -3,6 +3,8 @@
  * Copyright 2017 Theobroma Systems Design und Consulting GmbH
  */

+#include 
+
 /*
  * Execution starts on the instruction following this 4-byte header
  * (containing the magic 'RK30', 'RK31', 'RK32' or 'RK33').  This
@@ -23,17 +25,39 @@
 * the first one may be overwritten, if this is the first stage
 * contained in the final image created with mkimage)...
 */
-   b 1f /* if overwritten, entry-address is at the next word */
+   b   1f  /* if overwritten, entry-address is at the next word */
 1:
 #endif
 #if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
-   adr r3, entry_counter
+#if IS_ENABLED(CONFIG_ROCKCHIP_RK3066)
+/*
+ * Unlike newer Rockchip SoC models the rk3066 BROM code does not have
+ * built-in support to enter download mode after return to BROM code.
+ * Before a return the boot mode register must be checked for the
+ * BOOT_BROM_DOWNLOAD flag. Writing '-1' to a location in SRAM
+ * where the BROM stores the next page address breaks the loop
+ * that reads boot blocks. The boot ROM code then goes into a
+ * download mode and waits for data on USB OTG and UART0.
+ */
+   ldr r1, =BOOT_BROM_DOWNLOAD
+   ldr r0, =CONFIG_ROCKCHIP_BOOT_MODE_REG
+   ldr r0, [r0]
+   cmp r0, r1   /* if (readl(CONFIG_ROCKCHIP_BOOT_MODE_REG) == 
*/
+   bne counter_check/* BOOT_BROM_DOWNLOAD) {  */
+   ldr r1, =0x
+   ldr r0, =0x10080028
+   str r1, [r0] /* writel(0x, 0x10080028);*/
+   mov r0, #1   /* return 1;  */
+   bx  lr   /* }  */
+counter_check:
+#endif
+   adr r3, entry_counter
ldr r0, [r3]
cmp r0, #1   /* check if entry_counter == 1 */
beq reset/* regular bootup */
-   add r0, #1
+   add r0, #1
str r0, [r3] /* increment the entry_counter in memory */
-   mov r0, #0   /* return 0 to the BROM to signal 'OK' */
+   mov r0, #0   /* return 0 to the BROM to signal 'OK' */
bx  lr   /* return control to the BROM */
 entry_counter:
.word   0
--
2.39.2

Re: [PATCH 2/2] doc: rockchip: Update and complete info about RK3308

[Johan Jonker]

On 9/2/23 18:32, Massimo Pegorer wrote:
> Update documentation about build steps for RK3308, using an external
> TPL. Add RK3308 case to rST document. Add ROCK Pi S in the list of
> supported boards.
> 
> Signed-off-by: Massimo Pegorer 
> ---
>  doc/README.rockchip |  4 ++--
>  doc/board/rockchip/rockchip.rst | 10 ++
>  2 files changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/doc/README.rockchip b/doc/README.rockchip
> index 52b5140eca..cfbd858c3b 100644
> --- a/doc/README.rockchip
> +++ b/doc/README.rockchip
> @@ -38,16 +38,16 @@ Building
>  (or you can use another cross compiler if you prefer)
>  

>  2. To build RK3308 board:
> +
> - Get the rkbin
>   => git clone https://github.com/rockchip-linux/rkbin.git
>  
> - Compile U-Boot
>   => cd /path/to/u-boot
>   => export BL31=/path/to/rkbin/bin/rk33/rk3308_bl31_v2.22.elf
> + => export 
> ROCKCHIP_TPL=/path/to/rkbin/bin/rk33/rk3308_ddr_589MHz_uart2_m0_v1.26.bin
>   => make roc-cc-rk3308_defconfig
>   => make CROSS_COMPILE=aarch64-linux-gnu- all
> - => ./tools/mkimage -n rk3308 -T rksd -d 
> /path/to/rkbin/bin/rk33/rk3308_ddr_589MHz_uart2_m0_v1.26.bin idbloader.img
> - => cat spl/u-boot-spl.bin  >> idbloader.img
>  

Hi Massimo,

The text in this document should moved to doc/board/rockchip.
This paragraph above is therefor redundant, so it can be removed I think.

Johan

>  3. To build RK3399 board:
>  
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index de9fe8e642..b38c3d3136 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -53,6 +53,7 @@ List of mainline supported Rockchip boards:
>   - Google Speedy (chromebook_speedy)
>   - Amarula Vyasa-RK3288 (vyasa-rk3288)
>  * rk3308
> + - Radxa ROCK Pi S (rock-pi-s-rk3308)
>   - Rockchip Evb-RK3308 (evb-rk3308)
>   - Roc-cc-RK3308 (roc-cc-rk3308)
>  * rk3326
> @@ -172,6 +173,15 @@ To build rk3288 boards:
>  make evb-rk3288_defconfig
>  make CROSS_COMPILE=arm-linux-gnueabihf-
>  
> +To build rk3308 boards:
> +
> +.. code-block:: bash
> +
> +export BL31=../rkbin/bin/rk33/rk3308_bl31_vX.YZ.elf
> +export 
> ROCKCHIP_TPL=../rkbin/bin/rk33/rk3308_ddr_589MHz_uart0_m0_vX.YZ.bin
> +make evb-rk3308_defconfig
> +make CROSS_COMPILE=aarch64-linux-gnu-
> +
>  To build rk3328 boards:
>  
>  .. code-block:: bash

[PATCH v1 3/3] rockchip: cmd: add rockmtd command

[Johan Jonker]

Rockmtd creates a virtual block device to transfer Rockchip
boot block data to and from NAND with block orientated tools
like "ums" and "rockusb".

It uses the Rockchip MTD driver to scan for boot blocks and copies
data from the first block in a GPT formated virtual disk.
Data must be written in U-boot "idbloader.img" format and start at
partition "loader1" offset 64. The data header is parsed
for length and offset. When the last sector is received
it erases up to 5 erase blocks on NAND and writes bootblocks
in a pattern depending on the NAND ID. Data is then verified.
When a block turns out bad the block header is discarded.

Signed-off-by: Johan Jonker 
---
 cmd/Kconfig   |7 +
 cmd/Makefile  |1 +
 cmd/rockmtd.c | 1429 +
 3 files changed, 1437 insertions(+)
 create mode 100644 cmd/rockmtd.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 2d6e5f993f04..87f862076355 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1553,6 +1553,13 @@ config CMD_USB_SDP
  Enables the command "sdp" which is used to have U-Boot emulating the
  Serial Download Protocol (SDP) via USB.

+config CMD_ROCKMTD
+   bool "rockmtd"
+   help
+ Rockmtd creates a virtual block device to transfer Rockchip
+ boot block data to and from NAND with block orientated tools
+ like "ums" and "rockusb".
+
 config CMD_ROCKUSB
bool "rockusb"
depends on USB_FUNCTION_ROCKUSB
diff --git a/cmd/Makefile b/cmd/Makefile
index 9f8c0b058bea..19b609ace782 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -150,6 +150,7 @@ obj-$(CONFIG_CMD_REISER) += reiser.o
 obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
 obj-$(CONFIG_CMD_RNG) += rng.o
 obj-$(CONFIG_CMD_KASLRSEED) += kaslrseed.o
+obj-$(CONFIG_CMD_ROCKMTD) += rockmtd.o
 obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_CMD_RTC) += rtc.o
 obj-$(CONFIG_SANDBOX) += host.o
diff --git a/cmd/rockmtd.c b/cmd/rockmtd.c
new file mode 100644
index ..cf5259ecb4d7
--- /dev/null
+++ b/cmd/rockmtd.c
@@ -0,0 +1,1429 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) 2023 Johan Jonker 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define LBA64 + 512 + 33
+
+#define RK_TAG 0xFCDC8C3B
+#define NFC_SYS_DATA_SIZE  4
+
+struct nand_para_info {
+   u8 id_bytes;
+   u8 nand_id[6];
+   u8 vendor;
+   u8 die_per_chip;
+   u8 sec_per_page;
+   u16 page_per_blk;
+   u8 cell;
+   u8 plane_per_die;
+   u16 blk_per_plane;
+   u16 operation_opt;
+   u8 lsb_mode;
+   u8 read_retry_mode;
+   u8 ecc_bits;
+   u8 access_freq;
+   u8 opt_mode;
+   u8 die_gap;
+   u8 bad_block_mode;
+   u8 multi_plane_mode;
+   u8 slc_mode;
+   u8 reserved[5];
+};
+
+struct bootblk {
+   int blk;
+   int boot_size;
+   int offset;
+};
+
+struct rockmtd_dev {
+   struct blk_desc *desc;
+   char *label;
+   legacy_mbr *mbr;
+   gpt_header *gpt_h;
+   gpt_header *gpt_h2;
+   gpt_entry *gpt_e;
+   char *check;
+   char *idb;
+   char *str;
+   char uuid_part_str[UUID_STR_LEN + 1];
+   char uuid_disk_str[UUID_STR_LEN + 1];
+   char *datbuf;
+   char *oobbuf;
+   struct mtd_info *mtd;
+   struct nand_para_info *info;
+   u16 page_table[512];
+   u32 idb_need_write_back;
+   struct bootblk idblock[5];
+   u32 blk_counter;
+   u32 boot_blks;
+   u32 offset;
+   u32 boot_size;
+};
+
+struct sector0 {
+   u32 magic;
+   u8  reserved[4];
+   u32 rc4_flag;
+   u16 boot_code1_offset;
+   u16 boot_code2_offset;
+   u8  reserved1[490];
+   u16 flash_data_size;
+   u16 flash_boot_size;
+   u8  reserved2[2];
+} __packed;
+
+struct rk_nfc_nand_chip {
+   struct nand_chip chip;
+
+   u16 boot_blks;
+   u16 metadata_size;
+   u32 boot_ecc;
+   u32 timing;
+
+   u8 nsels;
+   u8 sels[0];
+   /* Nothing after this field. */
+};
+
+struct nand_para_info nand_para_tbl[] = {
+   {6, {0x2c, 0x64, 0x44, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x44, 0x44, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 1064, 
0x01df,  3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0x68, 0x04, 0x4a, 0xa9, 0x00}, 4, 1,  8,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {5, {0x2c, 0x88, 0x04, 0x4b, 0xa9, 0x00}, 4, 1, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}},
+   {6, {0x2c, 0xa8, 0x05, 0xcb, 0xa9, 0x00}, 4, 2, 16,  256, 2, 2, 2048, 
0x011f,  1,  0, 24, 32, 1, 0, 1, 0, 0, {0, 

[PATCH v1 2/3] dm: prepare rkmtd UCLASS

[Johan Jonker]

Prepare a rkmtd UCLASS in use for writing Rockchip boot blocks
in combination with existing userspace tools and rockusb command.

Signed-off-by: Johan Jonker 
---
 disk/part.c| 4 
 drivers/block/blk-uclass.c | 1 +
 include/dm/uclass-id.h | 1 +
 3 files changed, 6 insertions(+)

diff --git a/disk/part.c b/disk/part.c
index 186ee965006e..a65f9df5dd29 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -170,6 +170,7 @@ void dev_print(struct blk_desc *dev_desc)
case UCLASS_PVBLOCK:
case UCLASS_HOST:
case UCLASS_BLKMAP:
+   case UCLASS_RKMTD:
printf ("Vendor: %s Rev: %s Prod: %s\n",
dev_desc->vendor,
dev_desc->revision,
@@ -303,6 +304,9 @@ static void print_part_header(const char *type, struct 
blk_desc *dev_desc)
case UCLASS_PVBLOCK:
puts("PV BLOCK");
break;
+   case UCLASS_RKMTD:
+   puts("RKMTD");
+   break;
case UCLASS_VIRTIO:
puts("VirtIO");
break;
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 614b975e25c2..6bad2719e729 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -34,6 +34,7 @@ static struct {
{ UCLASS_VIRTIO, "virtio" },
{ UCLASS_PVBLOCK, "pvblock" },
{ UCLASS_BLKMAP, "blkmap" },
+   { UCLASS_RKMTD, "rkmtd" },
 };

 static enum uclass_id uclass_name_to_iftype(const char *uclass_idname)
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 307ad6931ca7..99a411429a2f 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -113,6 +113,7 @@ enum uclass_id {
UCLASS_REGULATOR,   /* Regulator device */
UCLASS_REMOTEPROC,  /* Remote Processor device */
UCLASS_RESET,   /* Reset controller device */
+   UCLASS_RKMTD,   /* Rockchip MTD device */
UCLASS_RNG, /* Random Number Generator */
UCLASS_RTC, /* Real time clock device */
UCLASS_SCMI_AGENT,  /* Interface with an SCMI server */
--
2.30.2

[PATCH v1 1/3] mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN option

[Johan Jonker]

On Rockchip SoCs the first boot stages are written on NAND
with help of manufacturer software that uses a different format
then the MTD framework. Skip the automatic BBT scan with the
NAND_SKIP_BBTSCAN option to be able to pass the driver probe
function and to let the original data unchanged.

Signed-off-by: Johan Jonker 
---
 drivers/mtd/nand/raw/Kconfig| 9 +
 drivers/mtd/nand/raw/rockchip_nfc.c | 3 +++
 2 files changed, 12 insertions(+)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index d624589a892b..72547f00fbec 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -611,6 +611,15 @@ config ROCKCHIP_NAND
NFC v800: RK3308, RV1108
NFC v900: PX30, RK3326

+config ROCKCHIP_NAND_SKIP_BBTSCAN
+   bool "Skip the automatic BBT scan with Rockchip NAND controllers"
+   depends on ROCKCHIP_NAND
+   default n
+   help
+ Skip the automatic BBT scan with the NAND_SKIP_BBTSCAN
+ option when data content is not in MTD format or
+ must remain unchanged.
+
 config TEGRA_NAND
bool "Support for NAND controller on Tegra SoCs"
depends on ARCH_TEGRA
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c 
b/drivers/mtd/nand/raw/rockchip_nfc.c
index 6ad51df4acff..df6742c2f9bb 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -981,6 +981,9 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc 
*nfc, int devnum)
chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;

+   if (IS_ENABLED(CONFIG_ROCKCHIP_NAND_SKIP_BBTSCAN))
+   chip->options |= NAND_SKIP_BBTSCAN;
+
rk_nfc_hw_init(nfc);
ret = nand_scan_ident(mtd, nsels, NULL);
if (ret)
--
2.30.2

[PATCH v1 0/3] Add rockmtd command

[Johan Jonker]

Rockmtd creates a virtual block device to transfer Rockchip
boot block data to and from NAND with block orientated tools
like "ums" and "rockusb".

It uses the Rockchip MTD driver to scan for boot blocks and copies
data from the first block in a GPT formatted virtual disk.
Data must be written in U-boot "idbloader.img" format and start at
partition "loader1" offset 64. The data header is parsed
for length and offset. When the last sector is received
it erases up to 5 erase blocks on NAND and writes boot blocks
in a pattern depending on the NAND ID. Data is then verified.
When a block turns out bad the block header is discarded.

Limitations:
Support for Rockchip boot block header type 1 only.
Pattern for listed NAND IDs only. (Logic still not disclosed by Rockchip)
The MTD framework driver data and NAND ID must be extracted at a lower level.
Only tested with rk3066 NFC v6.0.

Available rockmtd commands:
rockmtd bind   - bind ROCKMTD device
rockmtd unbind - unbind ROCKMTD device
rockmtd info []- show all available ROCKMTD devices
rockmtd dev [] - show or set current ROCKMTD device

U-boot settings:
Config to enable Rockchip MTD support:
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_ROCKCHIP_NAND=y

Option to keep existing NAND data unchanged:
CONFIG_ROCKCHIP_NAND_SKIP_BBTSCAN=y

Commands to enable:
CONFIG_CMD_USB=y
CONFIG_CMD_ROCKMTD=y
CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y

Linux Host (PC) tool commands combinations that work:

U-boot  Linux
rockmtd bind 0

# rockusb
rockusb 0 rkmtd 0
upgrade_tool pl
upgrade_tool wl 64 idbloader.img
upgrade_tool rl 64 512 
upgrade_tool_rl_64_512.img
upgrade_tool rd

rkdeveloptool ppt
rkdeveloptool wlx loader1 idbloader.img
rkdeveloptool wl 64 idbloader.img
rkdeveloptool rl 64 512 
rkdeveloptool_rl_64_512.img
rkdeveloptool rd

rkflashtool w 64 512 < idbloader.img
rkflashtool r 64 512 > 
rkflashtool_r_64_512.img
# ums
ums 0 rkmtd 0
dd if=idbloader.img of=/dev/sda1
    dd if=/dev/sda1 of=ums_0_idb_0_rd.img

Johan Jonker (3):
  mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN option
  dm: prepare rkmtd UCLASS
  rockchip: cmd: add rockmtd command

 cmd/Kconfig |7 +
 cmd/Makefile|1 +
 cmd/rockmtd.c   | 1429 +++
 disk/part.c |4 +
 drivers/block/blk-uclass.c  |1 +
 drivers/mtd/nand/raw/Kconfig|9 +
 drivers/mtd/nand/raw/rockchip_nfc.c |3 +
 include/dm/uclass-id.h  |1 +
 8 files changed, 1455 insertions(+)
 create mode 100644 cmd/rockmtd.c

--
2.30.2

[PATCH v1] mtd: nand: raw: rockchip_nfc: copy hwecc PA data to oob_poi buffer

[Johan Jonker]

Rockchip boot blocks are written per 4 x 512 byte sectors per page.
Each page must have a page address (PA) pointer in OOB to the next page.
Pages are written in a pattern depending on the NAND chip ID.
This logic used to build a page pattern table is not fully disclosed and
is not easy to fit in the MTD framework.
The formula in rk_nfc_write_page_hwecc() function is not correct.
Make hwecc and raw behavior identical.
Generate boot block page address and pattern for hwecc in user space
and copy PA data to/from the already reserved last 4 bytes before EEC
in the chip->oob_poi data layout.

Signed-off-by: Johan Jonker 
---
 drivers/mtd/nand/raw/rockchip_nfc.c | 34 ++---
 1 file changed, 21 insertions(+), 13 deletions(-)

diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c 
b/drivers/mtd/nand/raw/rockchip_nfc.c
index 5fcf6a6b..274489ec 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -525,7 +525,7 @@ static int rk_nfc_write_page_hwecc(struct mtd_info *mtd,
int pages_per_blk = mtd->erasesize / mtd->writesize;
int ret = 0, i, boot_rom_mode = 0;
dma_addr_t dma_data, dma_oob;
-   u32 reg;
+   u32 tmp;
u8 *oob;

nand_prog_page_begin_op(chip, page, 0, NULL, 0);
@@ -552,6 +552,13 @@ static int rk_nfc_write_page_hwecc(struct mtd_info *mtd,
 *
 *   0xFF 0xFF 0xFF 0xFF | BBM OOB1 OOB2 OOB3 | ...
 *
+* The code here just swaps the first 4 bytes with the last
+* 4 bytes without losing any data.
+*
+* The chip->oob_poi data layout:
+*
+*BBM  OOB1 OOB2 OOB3 |..|  PA0  PA1  PA2  PA3
+*
 * Configure the ECC algorithm supported by the boot ROM.
 */
if (page < (pages_per_blk * rknand->boot_blks)) {
@@ -561,21 +568,17 @@ static int rk_nfc_write_page_hwecc(struct mtd_info *mtd,
}

for (i = 0; i < ecc->steps; i++) {
-   if (!i) {
-   reg = 0x;
-   } else {
+   if (!i)
+   oob = chip->oob_poi + (ecc->steps - 1) * 
NFC_SYS_DATA_SIZE;
+   else
oob = chip->oob_poi + (i - 1) * NFC_SYS_DATA_SIZE;
-   reg = oob[0] | oob[1] << 8 | oob[2] << 16 |
- oob[3] << 24;
-   }

-   if (!i && boot_rom_mode)
-   reg = (page & (pages_per_blk - 1)) * 4;
+   tmp = oob[0] | oob[1] << 8 | oob[2] << 16 | oob[3] << 24;

if (nfc->cfg->type == NFC_V9)
-   nfc->oob_buf[i] = reg;
+   nfc->oob_buf[i] = tmp;
else
-   nfc->oob_buf[i * (oob_step / 4)] = reg;
+   nfc->oob_buf[i * (oob_step / 4)] = tmp;
}

dma_data = dma_map_single((void *)nfc->page_buf,
@@ -720,12 +723,17 @@ static int rk_nfc_read_page_hwecc(struct mtd_info *mtd,
goto timeout_err;
}

-   for (i = 1; i < ecc->steps; i++) {
-   oob = chip->oob_poi + (i - 1) * NFC_SYS_DATA_SIZE;
+   for (i = 0; i < ecc->steps; i++) {
+   if (!i)
+   oob = chip->oob_poi + (ecc->steps - 1) * 
NFC_SYS_DATA_SIZE;
+   else
+   oob = chip->oob_poi + (i - 1) * NFC_SYS_DATA_SIZE;
+
if (nfc->cfg->type == NFC_V9)
tmp = nfc->oob_buf[i];
else
tmp = nfc->oob_buf[i * (oob_step / 4)];
+
*oob++ = (u8)tmp;
*oob++ = (u8)(tmp >> 8);
*oob++ = (u8)(tmp >> 16);
--
2.30.2

Re: [PATCH v10] core: fdtaddr: use map_sysmem() as cast for the return (part 2)

[Johan Jonker]

On 5/11/23 09:12, Kever Yang wrote:
> Hi Johan,
> 

>     The patch v9 has merged, it will be better to send a new patch if more 
> change needed,

Merging logic with 2 maintainers...
This is a separate new patch for Simon.
He applied that (part 1) first, then the nfc serie was merged.
And now I must fix the lines that Simon removed to be complete.

See comment:
https://lore.kernel.org/u-boot/11826a88-6d4a-20a1-0651-b7e2fe79c...@rock-chips.com/T/#mf603b1a5cdaa6612ff71674d76d4f7ff49c21a2a

Comment by Simon:
I had to drop the second hunk here since it conflicted and it looks
like it was already done upstream. Please take a look and send a
follow-up patch if needed.

Please have a look.

Johan

> 
> but not a v10 patch.
> 
> 
> Thanks,
> 
> - Kever
> 
> On 2023/5/11 05:48, Johan Jonker wrote:
>> For the devfdt_get_addr_size_index_ptr() function use
>> map_sysmem() function as cast for the return for use in
>> sandbox.
>>
>> Signed-off-by: Johan Jonker 
>> ---
>>   drivers/core/fdtaddr.c | 5 -
>>   1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
>> index 3b59b70c..546db675 100644
>> --- a/drivers/core/fdtaddr.c
>> +++ b/drivers/core/fdtaddr.c
>> @@ -131,7 +131,10 @@ void *devfdt_get_addr_size_index_ptr(const struct 
>> udevice *dev, int index,
>>   {
>>   fdt_addr_t addr = devfdt_get_addr_size_index(dev, index, size);
>>
>> -    return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)(uintptr_t)addr;
>> +    if (addr == FDT_ADDR_T_NONE)
>> +    return NULL;
>> +
>> +    return map_sysmem(addr, 0);
>>   }
>>
>>   fdt_addr_t devfdt_get_addr_name(const struct udevice *dev, const char 
>> *name)
>> -- 
>> 2.20.1
>>

[PATCH v10] core: fdtaddr: use map_sysmem() as cast for the return (part 2)

[Johan Jonker]

For the devfdt_get_addr_size_index_ptr() function use
map_sysmem() function as cast for the return for use in
sandbox.

Signed-off-by: Johan Jonker 
---
 drivers/core/fdtaddr.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
index 3b59b70c..546db675 100644
--- a/drivers/core/fdtaddr.c
+++ b/drivers/core/fdtaddr.c
@@ -131,7 +131,10 @@ void *devfdt_get_addr_size_index_ptr(const struct udevice 
*dev, int index,
 {
fdt_addr_t addr = devfdt_get_addr_size_index(dev, index, size);

-   return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)(uintptr_t)addr;
+   if (addr == FDT_ADDR_T_NONE)
+   return NULL;
+
+   return map_sysmem(addr, 0);
 }

 fdt_addr_t devfdt_get_addr_name(const struct udevice *dev, const char *name)
--
2.20.1

Re: [PATCH v8 00/24] Fixes for Rockchip NFC driver part 1

[Johan Jonker]

On 4/23/23 03:51, Kever Yang wrote:
> Hi Johan,
> 
> On 2023/4/21 23:34, Johan Jonker wrote:
>>
>> On 4/21/23 05:15, Kever Yang wrote:
>>> Hi Johan,
>>>
>>>  I got below error report from CI test, I think it should be relate to 
>>> this patch set.
>>>
>>> === FAILURES 
>>> ===
>>> 1107 
>>> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1107>_
>>>  test_ut[ut_dm_dm_test_fdt_get_addr_ptr_flat] _
>>> 1108 
>>> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1108>test/py/tests/test_ut.py:346:
>>>  in test_ut
>>> 1109 
>>> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1109>assert
>>>  output.endswith('Failures: 0')
>>> 1110 
>>> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1110>E
>>>  AssertionError: assert False
>>>  
>>> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L>E
>>>  + where False = >> 0x7f7089240c10>('Failures: 0')
>>> 1112 
>>> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1112>E
>>>  + where  = 
>>> 'Test: dm_test_fdt_get_addr_ptr_flat: test-fdt.c (flat 
>>> tree)\r\r\ntest/dm/test-fdt.c:627,
>> dm_test_fdt_get_addr_ptr_fla...xpected 8000, got 
>> 10009000\r\r\nTest dm_test_fdt_get_addr_ptr_flat failed 1 
>> times\r\r\nFailures: 1'.endswith
>>
>> It turns out that the suggestion by Simon to use map_sysmem() doesn't work 
>> with devfdt_get_addr_index_ptr() somehow.
>>
>> To reproduce with this serie:
>> make sandbox_defconfig all
>> ./u-boot -T -c "ut dm fdt*"
>>
>> Test: dm_test_fdt_get_addr_ptr_flat: test-fdt.c (flat tree)
>> test/dm/test-fdt.c:627, dm_test_fdt_get_addr_ptr_flat(): (void *)0x8000 = 
>> ptr: Expected 8000, got 10009000
>> Test fdt* failed 1 times
>>
>> ===
>>
>> Could Simon have a look at the internal map_sysmem() stuff?
>>
>> Will send 1 patch to replace:
>> [PATCH v8 14/24] core: fdtaddr: add devfdt_get_addr_size_index_ptr function
>>
>> for:
>>
>> [PATCH v9] core: fdtaddr: add devfdt_get_addr_size_index_ptr function
>>
>> Could Kever retest with the patch above replacement?
> 

> The CI test pass with this replacement.

I've sent a new separate patch that handles map_sysmem.

[PATCH v9] core: fdtaddr: use map_sysmem() as cast for the return
https://lore.kernel.org/u-boot/4990a11d-638f-661d-a7c0-e0c5bf7ff...@gmail.com/T/#u

Apply after:
[PATCH v8 00/24] Fixes for Rockchip NFC driver part 1
with replacement:
[PATCH v9] core: fdtaddr: add devfdt_get_addr_size_index_ptr function

Please have a look.

Johan

> 
> 
> Thanks,
> 
> - Kever
> 

[PATCH v9] core: fdtaddr: use map_sysmem() as cast for the return

[Johan Jonker]

For the devfdt_get_addr_index_ptr() and devfdt_get_addr_size_index_ptr()
function use map_sysmem() function as cast for the return for use in
sandbox. Also fix sandbox test.

Signed-off-by: Johan Jonker 
---

Apply after:
[PATCH v8 00/24] Fixes for Rockchip NFC driver part 1
with replacement:
[PATCH v9] core: fdtaddr: add devfdt_get_addr_size_index_ptr function

---

Changed V9:
  New patch.
  Split use of map_sysmem() from previous series.
---
 drivers/core/fdtaddr.c | 11 +--
 test/dm/test-fdt.c |  5 -
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
index f5906ff9..546db675 100644
--- a/drivers/core/fdtaddr.c
+++ b/drivers/core/fdtaddr.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -97,7 +98,10 @@ void *devfdt_get_addr_index_ptr(const struct udevice *dev, 
int index)
 {
fdt_addr_t addr = devfdt_get_addr_index(dev, index);

-   return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)(uintptr_t)addr;
+   if (addr == FDT_ADDR_T_NONE)
+   return NULL;
+
+   return map_sysmem(addr, 0);
 }

 fdt_addr_t devfdt_get_addr_size_index(const struct udevice *dev, int index,
@@ -127,7 +131,10 @@ void *devfdt_get_addr_size_index_ptr(const struct udevice 
*dev, int index,
 {
fdt_addr_t addr = devfdt_get_addr_size_index(dev, index, size);

-   return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)(uintptr_t)addr;
+   if (addr == FDT_ADDR_T_NONE)
+   return NULL;
+
+   return map_sysmem(addr, 0);
 }

 fdt_addr_t devfdt_get_addr_name(const struct udevice *dev, const char *name)
diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
index 8e6e42e4..eeecd1dc 100644
--- a/test/dm/test-fdt.c
+++ b/test/dm/test-fdt.c
@@ -617,6 +617,7 @@ static int dm_test_fdt_get_addr_ptr_flat(struct 
unit_test_state *uts)
 {
struct udevice *gpio, *dev;
void *ptr;
+   void *paddr;

/* Test for missing reg property */
ut_assertok(uclass_first_device_err(UCLASS_GPIO, ));
@@ -624,7 +625,9 @@ static int dm_test_fdt_get_addr_ptr_flat(struct 
unit_test_state *uts)

ut_assertok(uclass_find_device_by_seq(UCLASS_TEST_DUMMY, 0, ));
ptr = devfdt_get_addr_ptr(dev);
-   ut_asserteq_ptr((void *)0x8000, ptr);
+
+   paddr = map_sysmem(0x8000, 0);
+   ut_asserteq_ptr(paddr, ptr);

return 0;
 }
--
2.20.1

Re: [PATCH v8 00/24] Fixes for Rockchip NFC driver part 1

[Johan Jonker]

On 4/21/23 17:34, Johan Jonker wrote:
> 
> 
> On 4/21/23 05:15, Kever Yang wrote:
>> Hi Johan,
>>
>>     I got below error report from CI test, I think it should be relate to 
>> this patch set.
>>
>> === FAILURES 
>> ===
>> 1107 
>> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1107>_
>>  test_ut[ut_dm_dm_test_fdt_get_addr_ptr_flat] _
>> 1108 
>> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1108>test/py/tests/test_ut.py:346:
>>  in test_ut
>> 1109 
>> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1109>assert
>>  output.endswith('Failures: 0')
>> 1110 
>> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1110>E
>>  AssertionError: assert False
>>  
>> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L>E
>>  + where False = > 0x7f7089240c10>('Failures: 0')
>> 1112 
>> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1112>E
>>  + where  = 'Test: 
>> dm_test_fdt_get_addr_ptr_flat: test-fdt.c (flat 
>> tree)\r\r\ntest/dm/test-fdt.c:627, 
> 
> dm_test_fdt_get_addr_ptr_fla...xpected 8000, got 
> 10009000\r\r\nTest dm_test_fdt_get_addr_ptr_flat failed 1 
> times\r\r\nFailures: 1'.endswith
> 
> It turns out that the suggestion by Simon to use map_sysmem() doesn't work 
> with devfdt_get_addr_index_ptr() somehow.
> 
> To reproduce with this serie:
> make sandbox_defconfig all
> ./u-boot -T -c "ut dm fdt*"
> 
> Test: dm_test_fdt_get_addr_ptr_flat: test-fdt.c (flat tree)
> test/dm/test-fdt.c:627, dm_test_fdt_get_addr_ptr_flat(): (void *)0x8000 = 
> ptr: Expected 8000, got 10009000
> Test fdt* failed 1 times
> 
> ===
> 

> Could Simon have a look at the internal map_sysmem() stuff?

Question for Simon:

Comments:
Re: [PATCH v5 12/21] core: read: add dev_read_addr_index_ptr function
Please use map_sysmem() rather than a cast, so it can be used on sandbox.

Re: [PATCH v6 12/22] core: fdtaddr: add devfdt_get_addr_size_index_ptr function
Shouldn't this use map_to_sysmem()? We should not cast addresses to pointers.

> +   return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)(uintptr_t)addr;

Did you mean map_sysmem() instead of map_to_sysmem() as I used in [PATCH v8 
14/24]??

===
The test is looking for "(void *)0x8000", while devfdt_get_addr_ptr() points to 
a map_physmem() pointer now.
Either "(void *)0x8000" needs to be mapped too.

Do you agree?
===

>From /arch/sandbox/include/asm/io.h

/* For sandbox, we want addresses to point into our RAM buffer */
static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
{
return map_physmem(paddr, len, MAP_WRBACK);
}
===

>From /test/dm/test-fdt.c:

static int dm_test_fdt_get_addr_ptr_flat(struct unit_test_state *uts)
{
struct udevice *gpio, *dev;
void *ptr;

/* Test for missing reg property */
ut_assertok(uclass_first_device_err(UCLASS_GPIO, ));
ut_assertnull(devfdt_get_addr_ptr(gpio));

ut_assertok(uclass_find_device_by_seq(UCLASS_TEST_DUMMY, 0, ));

===
Change:

ptr = devfdt_get_addr_ptr(dev);
ut_asserteq_ptr((void *)0x8000, ptr);

To:
paddr = map_physmem(0x8000, 0, MAP_NOCACHE); // ??
ut_asserteq_ptr(paddr, ptr); // ??

Please advise what kind of test you like.

===
return 0;
}
DM_TEST(dm_test_fdt_get_addr_ptr_flat,
UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT | UT_TESTF_FLAT_TREE);


> 
> Will send 1 patch to replace:
> [PATCH v8 14/24] core: fdtaddr: add devfdt_get_addr_size_index_ptr function
> 
> for:
> 

> [PATCH v9] core: fdtaddr: add devfdt_get_addr_size_index_ptr function
> 

The use of map_sysmem() in a devfdt_get_addr_size_index_ptr must change the 
test as well in the same patch.
Is there a need for "[patch v10] core: fdtaddr: add 
devfdt_get_addr_size_index_ptr function" or is [patch v9] enough for now??

> Could Kever retest with the patch above replacement?


> 
> Johan
> 
>>
>>
>> Thanks,
>> - Kever
>> On 2023/3/13 08:23, Johan Jonker wrote:
>>> This serie contains fixes for the Rockchip NFC driver,
>>> which was ported to U-boot and merged with little review
>>> and testing it seems.
>>> Part 1 aims at passing the probe function without errors.
>>> Extended with tree wide function cleanup needed for 64bit DT parsing.
>>>
>>> Fixed are:
>>>   64bit FDT parsing
>>>   compatible s

Re: [PATCH v8 00/24] Fixes for Rockchip NFC driver part 1

[Johan Jonker]

On 4/21/23 05:15, Kever Yang wrote:
> Hi Johan,
> 
>     I got below error report from CI test, I think it should be relate to 
> this patch set.
> 
> === FAILURES 
> ===
> 1107 
> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1107>_
>  test_ut[ut_dm_dm_test_fdt_get_addr_ptr_flat] _
> 1108 
> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1108>test/py/tests/test_ut.py:346:
>  in test_ut
> 1109 
> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1109>assert
>  output.endswith('Failures: 0')
> 1110 
> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1110>E
>  AssertionError: assert False
>  
> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L>E
>  + where False =  0x7f7089240c10>('Failures: 0')
> 1112 
> <https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/615291#L1112>E
>  + where  = 'Test: 
> dm_test_fdt_get_addr_ptr_flat: test-fdt.c (flat 
> tree)\r\r\ntest/dm/test-fdt.c:627, 

dm_test_fdt_get_addr_ptr_fla...xpected 8000, got 
10009000\r\r\nTest dm_test_fdt_get_addr_ptr_flat failed 1 
times\r\r\nFailures: 1'.endswith

It turns out that the suggestion by Simon to use map_sysmem() doesn't work with 
devfdt_get_addr_index_ptr() somehow.

To reproduce with this serie:
make sandbox_defconfig all
./u-boot -T -c "ut dm fdt*"

Test: dm_test_fdt_get_addr_ptr_flat: test-fdt.c (flat tree)
test/dm/test-fdt.c:627, dm_test_fdt_get_addr_ptr_flat(): (void *)0x8000 = ptr: 
Expected 8000, got 10009000
Test fdt* failed 1 times

===

Could Simon have a look at the internal map_sysmem() stuff?

Will send 1 patch to replace:
[PATCH v8 14/24] core: fdtaddr: add devfdt_get_addr_size_index_ptr function

for:

[PATCH v9] core: fdtaddr: add devfdt_get_addr_size_index_ptr function

Could Kever retest with the patch above replacement?

Johan

> 
> 
> Thanks,
> - Kever
> On 2023/3/13 08:23, Johan Jonker wrote:
>> This serie contains fixes for the Rockchip NFC driver,
>> which was ported to U-boot and merged with little review
>> and testing it seems.
>> Part 1 aims at passing the probe function without errors.
>> Extended with tree wide function cleanup needed for 64bit DT parsing.
>>
>> Fixed are:
>>   64bit FDT parsing
>>   compatible string removal
>>   add missing layout structure
>>   add missing flash_node pointer
>>   add missing chip ID
>>
>> Changed V8:
>>   change comments
>>   use uintptr_t size instead of phys_addr_t
>>   add another fdt_addr_t fix
>>
>> Changed V7:
>>   add proof of concept for syscon node with variable reg size handling
>>   use another map_sysmem() function as cast
>>   remove cast
>>
>> Changed V6:
>>   use -EINVAL on return
>>   drop cast
>>   use map_sysmem() function as cast
>>   add and rename patch
>>
>> Changed V5:
>>   sort patch order
>>   add more fixes with pointer functions
>>   add debug text fixes
>>   test with binman for ARM only due to limited resources
>>
>> Changed V4:
>>   fix cast and divider in syscon-uclass.c
>>
>> Changed V3:
>>   use dev_read_addr_ptr
>>   fix oobfree
>>
>> Johan Jonker (23):
>>   mtd: nand: raw: rockchip_nfc: use dev_read_addr_ptr
>>   mtd: nand: raw: rockchip_nfc: remove the compatible string
>> "rockchip,rk3308-nfc"
>>   mtd: nand: raw: rockchip_nfc: add layout structure
>>   mtd: nand: raw: rockchip_nfc: add flash_node to chip structure
>>   mtd: nand: raw: rockchip_nfc: fix oobfree offset and description
>>   rockchip: adc: rockchip-saradc: use dev_read_addr_ptr
>>   rockchip: timer: dw-apb-timer: use regs variable with uintptr_t size
>>   rockchip: pwm: rk_pwm: use base variable with uintptr_t size
>>   rockchip: spi: rk_spi: use base variable with uintptr_t size
>>   include: dm: ofnode: fix headers
>>   core: remap: fix regmap_init_mem_plat() reg size handeling
>>   rockchip: rk3288: syscon_rk3288: store syscon platdata in regmap
>>   core: fdtaddr: add devfdt_get_addr_size_index_ptr function
>>   core: read: add dev_read_addr_index_ptr function
>>   spi: spi-aspeed-smc: use devfdt_get_addr_index_ptr
>>   drivers: use dev_read_addr_index_ptr when cast to pointer
>>   drivers: use dev_read_addr_ptr when cast to pointer
>>   drivers: use devfdt_get_addr_size_index_ptr when cast to pointer
>>   drivers: use devfdt_get_addr_index_ptr when cast to point

[PATCH v9] core: fdtaddr: add devfdt_get_addr_size_index_ptr function

[Johan Jonker]

Add devfdt_get_addr_size_index_ptr function with the same
functionality as devfdt_get_addr_size_index, but instead
a return pointer is given.

Suggested-by: Michael Nazzareno Trimarchi 
Signed-off-by: Johan Jonker 
Reviewed-by: Michael Trimarchi 
Reviewed-by: Simon Glass 
---

Changed V9:
  remove map_sysmem()

Changed V7:
  use map_sysmem()

Changed V5:
  fix spelling
  use tabs
---
 drivers/core/fdtaddr.c |  8 
 include/dm/fdtaddr.h   | 17 -
 2 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
index a499f3b5..a68e31df 100644
--- a/drivers/core/fdtaddr.c
+++ b/drivers/core/fdtaddr.c
@@ -134,6 +134,14 @@ fdt_addr_t devfdt_get_addr_size_index(const struct udevice 
*dev, int index,
 #endif
 }

+void *devfdt_get_addr_size_index_ptr(const struct udevice *dev, int index,
+fdt_size_t *size)
+{
+   fdt_addr_t addr = devfdt_get_addr_size_index(dev, index, size);
+
+   return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)(uintptr_t)addr;
+}
+
 fdt_addr_t devfdt_get_addr_name(const struct udevice *dev, const char *name)
 {
 #if CONFIG_IS_ENABLED(OF_CONTROL)
diff --git a/include/dm/fdtaddr.h b/include/dm/fdtaddr.h
index c9d2b27b..dcdc1913 100644
--- a/include/dm/fdtaddr.h
+++ b/include/dm/fdtaddr.h
@@ -111,7 +111,7 @@ void *devfdt_get_addr_index_ptr(const struct udevice *dev, 
int index);
  * @dev: Pointer to a device
  * @index: the 'reg' property can hold a list of  pairs
  *and @index is used to select which one is required
- * @size: Pointer to size varible - this function returns the size
+ * @size: Pointer to size variable - this function returns the size
  *specified in the 'reg' property here
  *
  * Return: addr
@@ -119,6 +119,21 @@ void *devfdt_get_addr_index_ptr(const struct udevice *dev, 
int index);
 fdt_addr_t devfdt_get_addr_size_index(const struct udevice *dev, int index,
  fdt_size_t *size);

+/**
+ * devfdt_get_addr_size_index_ptr() - Return indexed pointer to the address of 
the
+ *reg property of a device
+ *
+ * @dev: Pointer to a device
+ * @index: the 'reg' property can hold a list of  pairs
+ *and @index is used to select which one is required
+ * @size: Pointer to size variable - this function returns the size
+ *specified in the 'reg' property here
+ *
+ * Return: Pointer to addr, or NULL if there is no such property
+ */
+void *devfdt_get_addr_size_index_ptr(const struct udevice *dev, int index,
+fdt_size_t *size);
+
 /**
  * devfdt_get_addr_name() - Get the reg property of a device, indexed by name
  *
--
2.20.1

Re: [PATCH v1 1/6] rockchip: gpio: rk_gpio: use ROCKCHIP_GPIOS_PER_BANK as divider

[Johan Jonker]

On 3/20/23 02:32, Kever Yang wrote:
> Hi Johan,
> 
> On 2023/3/19 19:34, Johan Jonker wrote:
>>
>> On 3/18/23 21:20, Simon Glass wrote:
>>> Hi Johan,
>>>
>>> On Thu, 16 Mar 2023 at 10:46, Johan Jonker  wrote:
>>>> The current divider to calculate the bank ID can change.
>>>> Use a constant ROCKCHIP_GPIOS_PER_BANK as fixed divider.
>>> What is the motivation for this patch?
>> The gpio-ranges property format:
>>
>> gpio-ranges = <[pin controller phandle], [GPIO controller offset],
>>  [pin controller offset], [number of pins]>;
>>
>> 1: Given the Rockchip TRM not all gpio-banks have 32 pins per bank.
> 

> Could you share which TRM did you find gpio-banks is not 32 pins?

px2==rk3066:
Rockchip PX2 TRM V1.0.pdf page 20
GPIO
6 groups of GPIO (GPIO0~GPIO4, GPIO6) , 32 GPIOs per group in
GPIO0~GPIO4, and 16 GPIOs in GPIO6, totally have 176 GPIOs

gpio6 is incomplete, mostly only A+B registers but never 32 pin.

===
rk3288-chapter-01-introduction.pdf page 15
GPIO
Totally 160 GPIOs

gpio0 only A+B+C 

gpio8 only A+B

===
rk3066 :
16 : 
https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/pinctrl/rockchip/pinctrl-rk3066.c#L83

rk3288:
24: 
https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/pinctrl/rockchip/pinctrl-rk3288.c#L185
16: 
https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/pinctrl/rockchip/pinctrl-rk3288.c#L213
> 
> The design should be 32 pins per bank for all the SoCs, although some banks 
> may not have full 32 pins,


> 
> but all the pin ID should follow the rules with 32pin per bank.

That's correct. This patch does not break that formula. Just don't use args[2].

number of pins != divider

> 
> 
> Thanks,
> 
> - Kever
> 
>> 2: The "gpio-ranges" syntax allows multiple items with variable number of 
>> pins.
>>
>> ===
>>
>> Theoretical example:
>>
>> gpio-ranges = < 0 32 32>; // 32/32 => bank 1
>>
>> vs.
>>
>> gpio-ranges = < 16 48 16>, // 48/16 => bank 3 vs. 48/32 => bank 1
>>    < 0 32 16>; // 32/16  => bank 2 vs. 32/32 => bank 1
>>
>> Both descriptions are valid.
>> The number of pins in the second example is reduced to 16 per item.
>> Using that as divider will give a wrong bank number.
>> Use a constant instead.
>> For the Rockchip situation simple parsing the first item is enough the know 
>> it's bank number for now.
>> To do it correct one could parse a list of gpio-range items, but that makes 
>> it more complicated.
>>
>> >From gpio.txt:
>> Each offset runs from 0 to N. It is perfectly fine to pile any number of
>> ranges with just one pin-to-GPIO line mapping if the ranges are concocted, 
>> but
>> in practice these ranges are often lumped in discrete sets.
>>
>>>> Signed-off-by: Johan Jonker 
>>>> ---
>>>>   drivers/gpio/rk_gpio.c | 2 +-
>>>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>> Reviewed-by: Simon Glass 
>>>
>>>> diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
>>>> index f7ad4d68..0a2acf18 100644
>>>> --- a/drivers/gpio/rk_gpio.c
>>>> +++ b/drivers/gpio/rk_gpio.c
>>>> @@ -160,7 +160,7 @@ static int rockchip_gpio_probe(struct udevice *dev)
>>>>   0, );
>>>>  if (!ret || ret != -ENOENT) {
>>>>  uc_priv->gpio_count = args.args[2];
>>>> -   priv->bank = args.args[1] / args.args[2];
>>>> +   priv->bank = args.args[1] / ROCKCHIP_GPIOS_PER_BANK;
>>>>  } else {
>>>>  uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK;
>>>>  end = strrchr(dev->name, '@');
>>>> -- 
>>>> 2.20.1
>>>>
>>> Regards,
>>> SImon

[PATCH v2 6/6] rockchip: configs: mk808: enable usb support

[Johan Jonker]

Enable usb support in the mk808_defconfig.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---
 configs/mk808_defconfig | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig
index 5a264eb9..b7dcd163 100644
--- a/configs/mk808_defconfig
+++ b/configs/mk808_defconfig
@@ -53,6 +53,9 @@ CONFIG_SYS_PBSIZE=276
 # CONFIG_BOOTM_VXWORKS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
@@ -78,6 +81,7 @@ CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_TPL_CLK=y
+CONFIG_FASTBOOT_BUF_ADDR=0x8000
 CONFIG_ROCKCHIP_GPIO=y
 # CONFIG_SPL_DM_I2C is not set
 CONFIG_LED=y
@@ -106,6 +110,12 @@ CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_TPL_TIMER=y
 CONFIG_DESIGNWARE_APB_TIMER=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 # CONFIG_TPL_OF_LIBFDT is not set
--
2.20.1

[PATCH v2 5/6] rockchip: configs: mk808: change CONFIG_TPL_TEXT_BASE

[Johan Jonker]

Currently the Rockchip rk3066a u-boot-tpl.bin file needs
to add the characters "RK30", while the other SoCs replace
the first 4 bytes. Bring this in line with the rest by
lowering CONFIG_TPL_TEXT_BASE and update rockchip.rst
instructions.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---

Changed V2:
  use lower case hex
---
 configs/mk808_defconfig | 2 +-
 doc/board/rockchip/rockchip.rst | 7 +++
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig
index c080706d..5a264eb9 100644
--- a/configs/mk808_defconfig
+++ b/configs/mk808_defconfig
@@ -18,7 +18,7 @@ CONFIG_SPL_TEXT_BASE=0x6000
 CONFIG_DM_RESET=y
 CONFIG_ROCKCHIP_RK3066=y
 # CONFIG_ROCKCHIP_STIMER is not set
-CONFIG_TPL_TEXT_BASE=0x10080C04
+CONFIG_TPL_TEXT_BASE=0x10080c00
 CONFIG_TPL_STACK=0x1008
 CONFIG_TARGET_MK808=y
 CONFIG_SPL_STACK_R_ADDR=0x7000
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index b5563b8f..7d903946 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -380,9 +380,8 @@ Program with commands in a bash script ./flash.sh:

 #!/bin/sh

-printf "RK30" > tplspl.bin
-dd if=u-boot-tpl.bin >> tplspl.bin
-truncate -s %2048 tplspl.bin
+printf "RK30" | dd conv=notrunc bs=4 count=1 of=u-boot-tpl.bin
+truncate -s %2048 u-boot-tpl.bin
 truncate -s %2048 u-boot-spl.bin
 ../tools/boot_merger --verbose config-flash.ini
 ../tools/upgrade_tool ul ./RK30xxLoader_uboot.bin
@@ -406,7 +405,7 @@ config-flash.ini:
 NUM=2
 LOADER1=FlashData
 LOADER2=FlashBoot
-FlashData=tplspl.bin
+FlashData=u-boot-tpl.bin
 FlashBoot=u-boot-spl.bin
 [OUTPUT]
 PATH=RK30xxLoader_uboot.bin
--
2.20.1

[PATCH v2 4/6] arm: dts: rockchip: sync rk3066/rk3188 DT files from linux-next v6.2-rc4

[Johan Jonker]

Sync rk3066/rk3188 DT files from Linux.
This is the state as of linux-next v6.2-rc4.
New nfc node for MK808 rk3066a.
CRU nodes now have a clock property.
To prefend dtoc errors a fixed clock must also be
included for tpl/spl in the rk3xxx-u-boot.dtsi file.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---
 arch/arm/dts/rk3066a-mk808.dts| 27 ++-
 arch/arm/dts/rk3066a.dtsi |  3 ++-
 arch/arm/dts/rk3188-radxarock.dts | 24 +---
 arch/arm/dts/rk3188.dtsi  | 27 ---
 arch/arm/dts/rk3xxx-u-boot.dtsi   |  4 
 arch/arm/dts/rk3xxx.dtsi  |  9 +++--
 6 files changed, 68 insertions(+), 26 deletions(-)

diff --git a/arch/arm/dts/rk3066a-mk808.dts b/arch/arm/dts/rk3066a-mk808.dts
index 667d57a4..06790f05 100644
--- a/arch/arm/dts/rk3066a-mk808.dts
+++ b/arch/arm/dts/rk3066a-mk808.dts
@@ -32,7 +32,7 @@
keyup-threshold-microvolt = <250>;
poll-interval = <100>;

-   recovery {
+   button-recovery {
label = "recovery";
linux,code = ;
press-threshold-microvolt = <0>;
@@ -157,7 +157,32 @@
pinctrl-0 = <_clk _cmd _bus4>;
pinctrl-names = "default";
vmmc-supply = <_wifi>;
+   #address-cells = <1>;
+   #size-cells = <0>;
status = "okay";
+
+   brcmf: wifi@1 {
+   compatible = "brcm,bcm4329-fmac";
+   reg = <1>;
+   };
+};
+
+ {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "okay";
+
+   nand@0 {
+   reg = <0>;
+   label = "rk-nand";
+   nand-bus-width = <8>;
+   nand-ecc-mode = "hw";
+   nand-ecc-step-size = <1024>;
+   nand-ecc-strength = <40>;
+   nand-is-boot-medium;
+   rockchip,boot-blks = <8>;
+   rockchip,boot-ecc-strength = <24>;
+   };
 };

  {
diff --git a/arch/arm/dts/rk3066a.dtsi b/arch/arm/dts/rk3066a.dtsi
index c25b9695..de9915d9 100644
--- a/arch/arm/dts/rk3066a.dtsi
+++ b/arch/arm/dts/rk3066a.dtsi
@@ -202,8 +202,9 @@
cru: clock-controller@2000 {
compatible = "rockchip,rk3066a-cru";
reg = <0x2000 0x1000>;
+   clocks = <>;
+   clock-names = "xin24m";
rockchip,grf = <>;
-
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks = < PLL_CPLL>, < PLL_GPLL>,
diff --git a/arch/arm/dts/rk3188-radxarock.dts 
b/arch/arm/dts/rk3188-radxarock.dts
index e7138a4a..118deacd 100644
--- a/arch/arm/dts/rk3188-radxarock.dts
+++ b/arch/arm/dts/rk3188-radxarock.dts
@@ -6,7 +6,6 @@
 /dts-v1/;
 #include 
 #include "rk3188.dtsi"
-#include "rk3188-radxarock-u-boot.dtsi"

 / {
model = "Radxa Rock";
@@ -25,7 +24,7 @@
compatible = "gpio-keys";
autorepeat;

-   power {
+   key-power {
gpios = < RK_PA4 GPIO_ACTIVE_LOW>;
linux,code = ;
label = "GPIO Key Power";
@@ -72,7 +71,7 @@
#sound-dai-cells = <0>;
};

-   ir_recv: gpio-ir-receiver {
+   ir_recv: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = < RK_PB2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
@@ -127,18 +126,21 @@
 };

  {
-   status = "okay";
-
+   phy = <>;
+   phy-supply = <_rmii>;
pinctrl-names = "default";
pinctrl-0 = <_xfer>, <_mdio>, <_int>;
+   status = "okay";

-   phy = <>;
-   phy-supply = <_rmii>;
+   mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;

-   phy0: ethernet-phy@0 {
-   reg = <0>;
-   interrupt-parent = <>;
-   interrupts = ;
+   phy0: ethernet-phy@0 {
+   reg = <0>;
+   interrupt-parent = <>;
+   interrupts = ;
+   };
};
 };

diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi
index 9a80f83a..44b54af0 100644
--- a/arch/arm/dts/rk3188.dtsi
+++ b/arch/arm/dts/rk3188.dtsi
@@ -54,7 +54,7 @@
};
};

-   cpu0_opp_table: opp_table0 {
+   cpu0_opp_table: opp-table-0 {
compatible = "operating-points-v2";
opp-shared;

@@ -195,8 +195,9 @@

[PATCH v2 3/6] arm: dts: rockchip: rk3188-u-boot: add gpio-ranges

[Johan Jonker]

The gpio node names are made generic, but without
gpio bank ID. Add gpio-ranges to rk3188-u-boot.dtsi
for now till a better method is found.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---
 arch/arm/dts/rk3188-u-boot.dtsi | 13 +
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/dts/rk3188-u-boot.dtsi b/arch/arm/dts/rk3188-u-boot.dtsi
index 735776c1..176f9e65 100644
--- a/arch/arm/dts/rk3188-u-boot.dtsi
+++ b/arch/arm/dts/rk3188-u-boot.dtsi
@@ -12,6 +12,19 @@

  {
compatible = "rockchip,gpio-bank";
+   gpio-ranges = < 0 0 32>;
+};
+
+ {
+   gpio-ranges = < 0 32 32>;
+};
+
+ {
+   gpio-ranges = < 0 64 32>;
+};
+
+ {
+   gpio-ranges = < 0 96 32>;
 };

  {
--
2.20.1

[PATCH v2 2/6] arm: dts: rockchip: rk3066a-u-boot: add gpio-ranges

[Johan Jonker]

The gpio node names are made generic, but without
gpio bank ID. Add gpio-ranges to rk3066a-u-boot.dtsi
for now till a better method is found.
Disable gpio6 as the driver gives an error code
on return as status.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---

Changed V2:
  disable gpio6
---
 arch/arm/dts/rk3066a-u-boot.dtsi | 25 +
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/dts/rk3066a-u-boot.dtsi b/arch/arm/dts/rk3066a-u-boot.dtsi
index bc6e609d..06f405ca 100644
--- a/arch/arm/dts/rk3066a-u-boot.dtsi
+++ b/arch/arm/dts/rk3066a-u-boot.dtsi
@@ -2,3 +2,28 @@

 #include "rockchip-u-boot.dtsi"
 #include "rk3xxx-u-boot.dtsi"
+
+ {
+   gpio-ranges = < 0 0 32>;
+};
+
+ {
+   gpio-ranges = < 0 32 32>;
+};
+
+ {
+   gpio-ranges = < 0 64 32>;
+};
+
+ {
+   gpio-ranges = < 0 96 32>;
+};
+
+ {
+   gpio-ranges = < 0 128 32>;
+};
+
+ {
+   status = "disabled";
+};
+
--
2.20.1

[PATCH v2 1/6] rockchip: gpio: rk_gpio: use ROCKCHIP_GPIOS_PER_BANK as divider

[Johan Jonker]

The current divider to calculate the bank ID can change.
Given the Rockchip TRM not all gpio-banks have 32 pins per bank.
The "gpio-ranges" syntax allows multiple items with variable number
of pins. Use a constant ROCKCHIP_GPIOS_PER_BANK as fixed divider.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---
 drivers/gpio/rk_gpio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index f7ad4d68..0a2acf18 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -160,7 +160,7 @@ static int rockchip_gpio_probe(struct udevice *dev)
 0, );
if (!ret || ret != -ENOENT) {
uc_priv->gpio_count = args.args[2];
-   priv->bank = args.args[1] / args.args[2];
+   priv->bank = args.args[1] / ROCKCHIP_GPIOS_PER_BANK;
} else {
uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK;
end = strrchr(dev->name, '@');
--
2.20.1

Re: [PATCH v1 1/6] rockchip: gpio: rk_gpio: use ROCKCHIP_GPIOS_PER_BANK as divider

[Johan Jonker]

On 3/19/23 13:20, Jonas Karlman wrote:
> Hi Johan,
> On 2023-03-19 12:34, Johan Jonker wrote:
>>
>>
>> On 3/18/23 21:20, Simon Glass wrote:
>>> Hi Johan,
>>>
>>> On Thu, 16 Mar 2023 at 10:46, Johan Jonker  wrote:
>>>>
>>>> The current divider to calculate the bank ID can change.
>>>> Use a constant ROCKCHIP_GPIOS_PER_BANK as fixed divider.
>>>
>>
>>> What is the motivation for this patch?
>>
>> The gpio-ranges property format:
>>
>> gpio-ranges = <[pin controller phandle], [GPIO controller offset],
>> [pin controller offset], [number of pins]>;
>>
>> 1: Given the Rockchip TRM not all gpio-banks have 32 pins per bank.
>> 2: The "gpio-ranges" syntax allows multiple items with variable number of 
>> pins.
> 
> Is there a reason why gpio-ranges is used to determine bank id?
> 
> In the series at [1], add support for rk35xx gpio banks, sent yesterday
> I changed this to rely on the dev alias id, same as in the linux driver.
>
> Any reason why using the device alias id won't work for the same purpose
> in u-boot?

Aliases are board/user orientated based on availability.
See discussion elsewhere(by Arnd Bergmann and others, see lore link unknown for 
now)
All aliases should be moved out of the dtsi files, so there's no guaranty that 
they are there anymore.
Aliases should follow the Rockchip TRM naming to prevent confusion.(by Heiko)
Special rules apply to mmc aliases: based on availability, reg order and 
without number gap. 

U-Boot/bootloader specific:
Aliases get lost with reduced DT's and are problematic with overlays,etc(ie. it 
needs special handling on top of that).
Aliases are not in the dtb platdata structure made by dtoc for TPL/SPL.(current 
drivers don't work yet, but in the future they may)

Best is to have a property inside the node for parsing and reduced nodes.
gpio-ranges is the only option currently available.
(not saying that is perfect, but at least don't invent new properties that 
needs to be continuously supported as legacy)


> 
> [1] 
> https://patchwork.ozlabs.org/project/uboot/patch/20230318235651.826148-3-jo...@kwiboo.se/
> 
> Regards,
> Jonas
> 
>>
>> ===
>>
>> Theoretical example:
>>
>> gpio-ranges = < 0 32 32>; // 32/32 => bank 1
>>
>> vs.
>>
>> gpio-ranges = < 16 48 16>, // 48/16 => bank 3 vs. 48/32 => bank 1
>>   < 0 32 16>; // 32/16  => bank 2 vs. 32/32 => bank 1
>>
>> Both descriptions are valid.
>> The number of pins in the second example is reduced to 16 per item.
>> Using that as divider will give a wrong bank number.
>> Use a constant instead.
>> For the Rockchip situation simple parsing the first item is enough the know 
>> it's bank number for now.
>> To do it correct one could parse a list of gpio-range items, but that makes 
>> it more complicated.
>>
>> From gpio.txt:
>> Each offset runs from 0 to N. It is perfectly fine to pile any number of
>> ranges with just one pin-to-GPIO line mapping if the ranges are concocted, 
>> but
>> in practice these ranges are often lumped in discrete sets.
>>
>>>
>>>>
>>>> Signed-off-by: Johan Jonker 
>>>> ---
>>>>  drivers/gpio/rk_gpio.c | 2 +-
>>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> Reviewed-by: Simon Glass 
>>>
>>>>
>>>> diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
>>>> index f7ad4d68..0a2acf18 100644
>>>> --- a/drivers/gpio/rk_gpio.c
>>>> +++ b/drivers/gpio/rk_gpio.c
>>>> @@ -160,7 +160,7 @@ static int rockchip_gpio_probe(struct udevice *dev)
>>>>  0, );
>>>> if (!ret || ret != -ENOENT) {
>>>> uc_priv->gpio_count = args.args[2];
>>>> -   priv->bank = args.args[1] / args.args[2];
>>>> +   priv->bank = args.args[1] / ROCKCHIP_GPIOS_PER_BANK;
>>>> } else {
>>>> uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK;
>>>> end = strrchr(dev->name, '@');
>>>> --
>>>> 2.20.1
>>>>
>>>
>>> Regards,
>>> SImon
> 

Re: [PATCH v1 1/6] rockchip: gpio: rk_gpio: use ROCKCHIP_GPIOS_PER_BANK as divider

[Johan Jonker]

On 3/18/23 21:20, Simon Glass wrote:
> Hi Johan,
> 
> On Thu, 16 Mar 2023 at 10:46, Johan Jonker  wrote:
>>
>> The current divider to calculate the bank ID can change.
>> Use a constant ROCKCHIP_GPIOS_PER_BANK as fixed divider.
> 

> What is the motivation for this patch?

The gpio-ranges property format:

gpio-ranges = <[pin controller phandle], [GPIO controller offset],
[pin controller offset], [number of pins]>;

1: Given the Rockchip TRM not all gpio-banks have 32 pins per bank.
2: The "gpio-ranges" syntax allows multiple items with variable number of pins.

===

Theoretical example:

gpio-ranges = < 0 32 32>; // 32/32 => bank 1

vs.

gpio-ranges = < 16 48 16>, // 48/16 => bank 3 vs. 48/32 => bank 1
  < 0 32 16>; // 32/16  => bank 2 vs. 32/32 => bank 1

Both descriptions are valid.
The number of pins in the second example is reduced to 16 per item.
Using that as divider will give a wrong bank number.
Use a constant instead.
For the Rockchip situation simple parsing the first item is enough the know 
it's bank number for now.
To do it correct one could parse a list of gpio-range items, but that makes it 
more complicated.

>From gpio.txt:
Each offset runs from 0 to N. It is perfectly fine to pile any number of
ranges with just one pin-to-GPIO line mapping if the ranges are concocted, but
in practice these ranges are often lumped in discrete sets.

> 
>>
>> Signed-off-by: Johan Jonker 
>> ---
>>  drivers/gpio/rk_gpio.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> Reviewed-by: Simon Glass 
> 
>>
>> diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
>> index f7ad4d68..0a2acf18 100644
>> --- a/drivers/gpio/rk_gpio.c
>> +++ b/drivers/gpio/rk_gpio.c
>> @@ -160,7 +160,7 @@ static int rockchip_gpio_probe(struct udevice *dev)
>>  0, );
>> if (!ret || ret != -ENOENT) {
>> uc_priv->gpio_count = args.args[2];
>> -   priv->bank = args.args[1] / args.args[2];
>> +   priv->bank = args.args[1] / ROCKCHIP_GPIOS_PER_BANK;
>> } else {
>> uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK;
>> end = strrchr(dev->name, '@');
>> --
>> 2.20.1
>>
> 
> Regards,
> SImon

[PATCH v1 6/6] rockchip: configs: mk808: enable usb support

[Johan Jonker]

Enable usb support in the mk808_defconfig.

Signed-off-by: Johan Jonker 
---
 configs/mk808_defconfig | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig
index 548df9c5..3e9bdb14 100644
--- a/configs/mk808_defconfig
+++ b/configs/mk808_defconfig
@@ -53,6 +53,9 @@ CONFIG_SYS_PBSIZE=276
 # CONFIG_BOOTM_VXWORKS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
@@ -78,6 +81,7 @@ CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_TPL_CLK=y
+CONFIG_FASTBOOT_BUF_ADDR=0x8000
 CONFIG_ROCKCHIP_GPIO=y
 # CONFIG_SPL_DM_I2C is not set
 CONFIG_LED=y
@@ -106,6 +110,12 @@ CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_TPL_TIMER=y
 CONFIG_DESIGNWARE_APB_TIMER=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 # CONFIG_TPL_OF_LIBFDT is not set
--
2.20.1

[PATCH v1 5/6] rockchip: configs: mk808: change CONFIG_TPL_TEXT_BASE

[Johan Jonker]

Currently the Rockchip rk3066a u-boot-tpl.bin file needs
to add the characters "RK30", while the other SoCs replace
the first 4 bytes. Bring this in line with the rest by
lowering CONFIG_TPL_TEXT_BASE and update rockchip.rst
instructions.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---
 configs/mk808_defconfig | 2 +-
 doc/board/rockchip/rockchip.rst | 7 +++
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig
index c080706d..548df9c5 100644
--- a/configs/mk808_defconfig
+++ b/configs/mk808_defconfig
@@ -18,7 +18,7 @@ CONFIG_SPL_TEXT_BASE=0x6000
 CONFIG_DM_RESET=y
 CONFIG_ROCKCHIP_RK3066=y
 # CONFIG_ROCKCHIP_STIMER is not set
-CONFIG_TPL_TEXT_BASE=0x10080C04
+CONFIG_TPL_TEXT_BASE=0x10080C00
 CONFIG_TPL_STACK=0x1008
 CONFIG_TARGET_MK808=y
 CONFIG_SPL_STACK_R_ADDR=0x7000
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index b5563b8f..7d903946 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -380,9 +380,8 @@ Program with commands in a bash script ./flash.sh:

 #!/bin/sh

-printf "RK30" > tplspl.bin
-dd if=u-boot-tpl.bin >> tplspl.bin
-truncate -s %2048 tplspl.bin
+printf "RK30" | dd conv=notrunc bs=4 count=1 of=u-boot-tpl.bin
+truncate -s %2048 u-boot-tpl.bin
 truncate -s %2048 u-boot-spl.bin
 ../tools/boot_merger --verbose config-flash.ini
 ../tools/upgrade_tool ul ./RK30xxLoader_uboot.bin
@@ -406,7 +405,7 @@ config-flash.ini:
 NUM=2
 LOADER1=FlashData
 LOADER2=FlashBoot
-FlashData=tplspl.bin
+FlashData=u-boot-tpl.bin
 FlashBoot=u-boot-spl.bin
 [OUTPUT]
 PATH=RK30xxLoader_uboot.bin
--
2.20.1

[PATCH v1 4/6] arm: dts: rockchip: sync rk3066/rk3188 DT files from linux-next v6.2-rc4

[Johan Jonker]

Sync rk3066/rk3188 DT files from Linux.
This is the state as of linux-next v6.2-rc4.
New nfc node for MK808 rk3066a.
CRU nodes now have a clock property.
To prefend dtoc errors a fixed clock must also be
included for tpl/spl in the rk3xxx-u-boot.dtsi file.

Signed-off-by: Johan Jonker 
---
 arch/arm/dts/rk3066a-mk808.dts| 27 ++-
 arch/arm/dts/rk3066a.dtsi |  3 ++-
 arch/arm/dts/rk3188-radxarock.dts | 24 +---
 arch/arm/dts/rk3188.dtsi  | 27 ---
 arch/arm/dts/rk3xxx-u-boot.dtsi   |  4 
 arch/arm/dts/rk3xxx.dtsi  |  9 +++--
 6 files changed, 68 insertions(+), 26 deletions(-)

diff --git a/arch/arm/dts/rk3066a-mk808.dts b/arch/arm/dts/rk3066a-mk808.dts
index 667d57a4..06790f05 100644
--- a/arch/arm/dts/rk3066a-mk808.dts
+++ b/arch/arm/dts/rk3066a-mk808.dts
@@ -32,7 +32,7 @@
keyup-threshold-microvolt = <250>;
poll-interval = <100>;

-   recovery {
+   button-recovery {
label = "recovery";
linux,code = ;
press-threshold-microvolt = <0>;
@@ -157,7 +157,32 @@
pinctrl-0 = <_clk _cmd _bus4>;
pinctrl-names = "default";
vmmc-supply = <_wifi>;
+   #address-cells = <1>;
+   #size-cells = <0>;
status = "okay";
+
+   brcmf: wifi@1 {
+   compatible = "brcm,bcm4329-fmac";
+   reg = <1>;
+   };
+};
+
+ {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "okay";
+
+   nand@0 {
+   reg = <0>;
+   label = "rk-nand";
+   nand-bus-width = <8>;
+   nand-ecc-mode = "hw";
+   nand-ecc-step-size = <1024>;
+   nand-ecc-strength = <40>;
+   nand-is-boot-medium;
+   rockchip,boot-blks = <8>;
+   rockchip,boot-ecc-strength = <24>;
+   };
 };

  {
diff --git a/arch/arm/dts/rk3066a.dtsi b/arch/arm/dts/rk3066a.dtsi
index c25b9695..de9915d9 100644
--- a/arch/arm/dts/rk3066a.dtsi
+++ b/arch/arm/dts/rk3066a.dtsi
@@ -202,8 +202,9 @@
cru: clock-controller@2000 {
compatible = "rockchip,rk3066a-cru";
reg = <0x2000 0x1000>;
+   clocks = <>;
+   clock-names = "xin24m";
rockchip,grf = <>;
-
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks = < PLL_CPLL>, < PLL_GPLL>,
diff --git a/arch/arm/dts/rk3188-radxarock.dts 
b/arch/arm/dts/rk3188-radxarock.dts
index e7138a4a..118deacd 100644
--- a/arch/arm/dts/rk3188-radxarock.dts
+++ b/arch/arm/dts/rk3188-radxarock.dts
@@ -6,7 +6,6 @@
 /dts-v1/;
 #include 
 #include "rk3188.dtsi"
-#include "rk3188-radxarock-u-boot.dtsi"

 / {
model = "Radxa Rock";
@@ -25,7 +24,7 @@
compatible = "gpio-keys";
autorepeat;

-   power {
+   key-power {
gpios = < RK_PA4 GPIO_ACTIVE_LOW>;
linux,code = ;
label = "GPIO Key Power";
@@ -72,7 +71,7 @@
#sound-dai-cells = <0>;
};

-   ir_recv: gpio-ir-receiver {
+   ir_recv: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = < RK_PB2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
@@ -127,18 +126,21 @@
 };

  {
-   status = "okay";
-
+   phy = <>;
+   phy-supply = <_rmii>;
pinctrl-names = "default";
pinctrl-0 = <_xfer>, <_mdio>, <_int>;
+   status = "okay";

-   phy = <>;
-   phy-supply = <_rmii>;
+   mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;

-   phy0: ethernet-phy@0 {
-   reg = <0>;
-   interrupt-parent = <>;
-   interrupts = ;
+   phy0: ethernet-phy@0 {
+   reg = <0>;
+   interrupt-parent = <>;
+   interrupts = ;
+   };
};
 };

diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi
index 9a80f83a..44b54af0 100644
--- a/arch/arm/dts/rk3188.dtsi
+++ b/arch/arm/dts/rk3188.dtsi
@@ -54,7 +54,7 @@
};
};

-   cpu0_opp_table: opp_table0 {
+   cpu0_opp_table: opp-table-0 {
compatible = "operating-points-v2";
opp-shared;

@@ -195,8 +195,9 @@
cru: clock-controller@2000 {
  

[PATCH v1 3/6] arm: dts: rockchip: rk3188-u-boot: add gpio-ranges

[Johan Jonker]

The gpio node names are made generic, but without
gpio bank ID. Add gpio-ranges to rk3188-u-boot.dtsi
for now till a better method is found.

Signed-off-by: Johan Jonker 
---
 arch/arm/dts/rk3188-u-boot.dtsi | 13 +
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/dts/rk3188-u-boot.dtsi b/arch/arm/dts/rk3188-u-boot.dtsi
index 735776c1..176f9e65 100644
--- a/arch/arm/dts/rk3188-u-boot.dtsi
+++ b/arch/arm/dts/rk3188-u-boot.dtsi
@@ -12,6 +12,19 @@

  {
compatible = "rockchip,gpio-bank";
+   gpio-ranges = < 0 0 32>;
+};
+
+ {
+   gpio-ranges = < 0 32 32>;
+};
+
+ {
+   gpio-ranges = < 0 64 32>;
+};
+
+ {
+   gpio-ranges = < 0 96 32>;
 };

  {
--
2.20.1

[PATCH v1 2/6] arm: dts: rockchip: rk3066a-u-boot: add gpio-ranges

[Johan Jonker]

The gpio node names are made generic, but without
gpio bank ID. Add gpio-ranges to rk3066a-u-boot.dtsi
for now till a better method is found.

Signed-off-by: Johan Jonker 
---
 arch/arm/dts/rk3066a-u-boot.dtsi | 25 +
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/dts/rk3066a-u-boot.dtsi b/arch/arm/dts/rk3066a-u-boot.dtsi
index bc6e609d..8d4e1ad2 100644
--- a/arch/arm/dts/rk3066a-u-boot.dtsi
+++ b/arch/arm/dts/rk3066a-u-boot.dtsi
@@ -2,3 +2,28 @@

 #include "rockchip-u-boot.dtsi"
 #include "rk3xxx-u-boot.dtsi"
+
+ {
+   gpio-ranges = < 0 0 32>;
+};
+
+ {
+   gpio-ranges = < 0 32 32>;
+};
+
+ {
+   gpio-ranges = < 0 64 32>;
+};
+
+ {
+   gpio-ranges = < 0 96 32>;
+};
+
+ {
+   gpio-ranges = < 0 128 32>;
+};
+
+ {
+   gpio-ranges = < 0 192 32>;
+};
+
--
2.20.1

[PATCH v1 1/6] rockchip: gpio: rk_gpio: use ROCKCHIP_GPIOS_PER_BANK as divider

[Johan Jonker]

The current divider to calculate the bank ID can change.
Use a constant ROCKCHIP_GPIOS_PER_BANK as fixed divider.

Signed-off-by: Johan Jonker 
---
 drivers/gpio/rk_gpio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index f7ad4d68..0a2acf18 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -160,7 +160,7 @@ static int rockchip_gpio_probe(struct udevice *dev)
 0, );
if (!ret || ret != -ENOENT) {
uc_priv->gpio_count = args.args[2];
-   priv->bank = args.args[1] / args.args[2];
+   priv->bank = args.args[1] / ROCKCHIP_GPIOS_PER_BANK;
} else {
uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK;
end = strrchr(dev->name, '@');
--
2.20.1

[PATCH v2 7/7] arm: dts: rockchip: rk3288: partial sync pwm nodes

[Johan Jonker]

In order to better compare the Linux rk3288.dtsi
version 6.3 -rc2 with the U-Boot version partial
sync the pwm nodes.

Signed-off-by: Johan Jonker 
---
 arch/arm/dts/rk3288.dtsi | 18 +-
 1 file changed, 5 insertions(+), 13 deletions(-)

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index f24e9ba5..dd1d9897 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -675,9 +675,7 @@
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <_pin>;
-   clocks = < PCLK_PWM>;
-   clock-names = "pwm";
-   rockchip,grf = <>;
+   clocks = < PCLK_RKPWM>;
status = "disabled";
};

@@ -687,9 +685,7 @@
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <_pin>;
-   clocks = < PCLK_PWM>;
-   clock-names = "pwm";
-   rockchip,grf = <>;
+   clocks = < PCLK_RKPWM>;
status = "disabled";
};

@@ -699,21 +695,17 @@
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <_pin>;
-   clocks = < PCLK_PWM>;
-   clock-names = "pwm";
-   rockchip,grf = <>;
+   clocks = < PCLK_RKPWM>;
status = "disabled";
};

pwm3: pwm@ff680030 {
compatible = "rockchip,rk3288-pwm";
reg = <0xff680030 0x10>;
-   #pwm-cells = <2>;
+   #pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <_pin>;
-   clocks = < PCLK_PWM>;
-   clock-names = "pwm";
-   rockchip,grf = <>;
+   clocks = < PCLK_RKPWM>;
status = "disabled";
};

--
2.20.1

[PATCH v2 6/7] clk: rockchip: clk_rk3288: add PCLK_RKPWM

[Johan Jonker]

The rk3288 pwm nodes synced from Linux make use of PCLK_RKPWM
instead of PCLK_PWM. They have the same pclk_cpu parent,
so add PCLK_RKPWM to rk3288_clk_get_rate().

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass   # chromebook-jerry
---
 drivers/clk/rockchip/clk_rk3288.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/rockchip/clk_rk3288.c 
b/drivers/clk/rockchip/clk_rk3288.c
index 3b29992c..ef744c06 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -778,6 +778,7 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
case PCLK_I2C5:
return gclk_rate;
case PCLK_PWM:
+   case PCLK_RKPWM:
return PD_BUS_PCLK_HZ;
case SCLK_SARADC:
new_rate = rockchip_saradc_get_clk(priv->cru);
--
2.20.1

[PATCH v2 5/7] arm: dts: rockchip: rk3288: partial sync vop/lvds/mipi/hdmi nodes

[Johan Jonker]

In order to better compare the Linux rk3288.dtsi
version 6.3 -rc2 with the U-Boot version partial
sync the vop/lvds/mipi/hdmi nodes.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass   # chromebook-jerry
---
 arch/arm/dts/rk3288.dtsi | 48 
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 9f924466..f24e9ba5 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -1021,7 +1021,7 @@

vopb: vop@ff93 {
compatible = "rockchip,rk3288-vop";
-   reg = <0xff93 0x19c>;
+   reg = <0xff93 0x19c>, <0xff931000 0x1000>;
interrupts = ;
clocks = < ACLK_VOP0>, < DCLK_VOP0>, < HCLK_VOP0>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
@@ -1035,24 +1035,24 @@
#address-cells = <1>;
#size-cells = <0>;

-   vopb_out_edp: endpoint@0 {
+   vopb_out_hdmi: endpoint@0 {
reg = <0>;
-   remote-endpoint = <_in_vopb>;
+   remote-endpoint = <_in_vopb>;
};

-   vopb_out_hdmi: endpoint@1 {
+   vopb_out_edp: endpoint@1 {
reg = <1>;
-   remote-endpoint = <_in_vopb>;
+   remote-endpoint = <_in_vopb>;
};

-   vopb_out_lvds: endpoint@2 {
+   vopb_out_mipi: endpoint@2 {
reg = <2>;
-   remote-endpoint = <_in_vopb>;
+   remote-endpoint = <_in_vopb>;
};

-   vopb_out_mipi: endpoint@3 {
+   vopb_out_lvds: endpoint@3 {
reg = <3>;
-   remote-endpoint = <_in_vopb>;
+   remote-endpoint = <_in_vopb>;
};
};
};
@@ -1070,7 +1070,7 @@

vopl: vop@ff94 {
compatible = "rockchip,rk3288-vop";
-   reg = <0xff94 0x19c>;
+   reg = <0xff94 0x19c>, <0xff941000 0x1000>;
interrupts = ;
clocks = < ACLK_VOP1>, < DCLK_VOP1>, < HCLK_VOP1>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
@@ -1084,24 +1084,24 @@
#address-cells = <1>;
#size-cells = <0>;

-   vopl_out_edp: endpoint@0 {
+   vopl_out_hdmi: endpoint@0 {
reg = <0>;
-   remote-endpoint = <_in_vopl>;
+   remote-endpoint = <_in_vopl>;
};

-   vopl_out_hdmi: endpoint@1 {
+   vopl_out_edp: endpoint@1 {
reg = <1>;
-   remote-endpoint = <_in_vopl>;
+   remote-endpoint = <_in_vopl>;
};

-   vopl_out_lvds: endpoint@2 {
+   vopl_out_mipi: endpoint@2 {
reg = <2>;
-   remote-endpoint = <_in_vopl>;
+   remote-endpoint = <_in_vopl>;
};

-   vopl_out_mipi: endpoint@3 {
+   vopl_out_lvds: endpoint@3 {
reg = <3>;
-   remote-endpoint = <_in_vopl>;
+   remote-endpoint = <_in_vopl>;
};
};
};
@@ -1118,11 +1118,11 @@
};

mipi_dsi: mipi@ff96 {
-   compatible = "rockchip,rk3288_mipi_dsi";
+   compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
reg = <0xff96 0x4000>;
interrupts = ;
-   clocks = < PCLK_MIPI_DSI0>;
-   clock-names = "pclk_mipi";
+   clocks = < SCLK_MIPIDSI_24M>, < PCLK_MIPI_DSI0>;
+   clock-names = "ref", "pclk";
power-domains = < RK3288_PD_VIO>;
rockchip,grf = <>;
status = "disabled";
@@ -1148,7 +1148,7 

[PATCH v2 4/7] arm: dts: rockchip: rk3288: partial sync edp node

[Johan Jonker]

The rk3288 edp node has a phy node in Linux with a clock
property while current U-Boot driver expects this clock
on position index 1. Move U-Boot-specific DT clock properties
to rk3288-u-boot.dtsi and partially sync the edp node.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass   # chromebook-jerry
---
 arch/arm/dts/rk3288-u-boot.dtsi |  5 +
 arch/arm/dts/rk3288.dtsi| 17 +++--
 2 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index e411445e..ca229150 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -91,6 +91,11 @@
u-boot,dm-pre-reloc;
 };

+ {
+   clocks = < SCLK_EDP>, < SCLK_EDP_24M>, < PCLK_EDP_CTRL>;
+   clock-names = "clk_edp", "clk_edp_24m", "pclk_edp";
+};
+
  {
u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index f06d1f5b..9f924466 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -1177,19 +1177,24 @@
};

edp: dp@ff97 {
-   compatible = "rockchip,rk3288-edp";
+   compatible = "rockchip,rk3288-dp";
reg = <0xff97 0x4000>;
interrupts = ;
-   clocks = < SCLK_EDP>, < SCLK_EDP_24M>, < 
PCLK_EDP_CTRL>;
-   clock-names = "clk_edp", "clk_edp_24m", "pclk_edp";
+   clocks = < SCLK_EDP>, < PCLK_EDP_CTRL>;
+   clock-names = "dp", "pclk";
+   phys = <_phy>;
+   phy-names = "dp";
+   power-domains = < RK3288_PD_VIO>;
resets = < SRST_EDP>;
-   reset-names = "edp";
+   reset-names = "dp";
rockchip,grf = <>;
-   power-domains = < RK3288_PD_VIO>;
status = "disabled";

ports {
-   edp_in: port {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   edp_in: port@0 {
+   reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
edp_in_vopb: endpoint@0 {
--
2.20.1

[PATCH v2 3/7] video: rockchip: rk_vop: add rk3288-dp compare string

[Johan Jonker]

In the current rk3288.dtsi file the compatible string for
the DisplayPort(DP) node ends with "edp". The string in the
binding ends with "dp" which conflicts with "cdn-dp" as a
search term. Add "rk3288-dp" as compare string to select
vop_id.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass   # chromebook-jerry
---
 drivers/video/rockchip/rk_vop.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index bc98ab68..e21ac7e3 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -307,7 +307,8 @@ static int rk_display_init(struct udevice *dev, ulong 
fbbase, ofnode ep_node)
  __func__, dev_read_name(dev));
return -EINVAL;
}
-   if (strstr(compat, "edp")) {
+   if (strstr(compat, "edp") ||
+   strstr(compat, "rk3288-dp")) {
vop_id = VOP_MODE_EDP;
} else if (strstr(compat, "mipi")) {
vop_id = VOP_MODE_MIPI;
--
2.20.1

[PATCH v2 2/7] arm: dts: rockchip: rk3288: partial sync grf and pmu nodes

[Johan Jonker]

In order to better compare the Linux rk3288.dtsi
version 6.3 -rc2 with the U-Boot version partial
sync the grf and pmu nodes.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass   # chromebook-jerry
---
 arch/arm/dts/rk3288.dtsi | 269 +--
 1 file changed, 173 insertions(+), 96 deletions(-)

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 9cfb86f9..f06d1f5b 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: GPL-2.0+
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

 #include 
 #include 
@@ -7,13 +7,16 @@
 #include 
 #include 
 #include 
-#include 
-#include "skeleton.dtsi"
+#include 

 / {
+   #address-cells = <1>;
+   #size-cells = <1>;
+
compatible = "rockchip,rk3288";

interrupt-parent = <>;
+
aliases {
ethernet0 = 
i2c0 = 
@@ -732,8 +735,128 @@
};

pmu: power-management@ff73 {
-   compatible = "rockchip,rk3288-pmu", "syscon";
+   compatible = "rockchip,rk3288-pmu", "syscon", "simple-mfd";
reg = <0xff73 0x100>;
+
+   power: power-controller {
+   compatible = "rockchip,rk3288-power-controller";
+   #power-domain-cells = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   assigned-clocks = < SCLK_EDP_24M>;
+   assigned-clock-parents = <>;
+
+   /*
+* Note: Although SCLK_* are the working clocks
+* of device without including on the NOC, needed for
+* synchronous reset.
+*
+* The clocks on the which NOC:
+* ACLK_IEP/ACLK_VIP/ACLK_VOP0 are on ACLK_VIO0_NIU.
+* ACLK_ISP/ACLK_VOP1 are on ACLK_VIO1_NIU.
+* ACLK_RGA is on ACLK_RGA_NIU.
+* The others (HCLK_*,PLCK_*) are on HCLK_VIO_NIU.
+*
+* Which clock are device clocks:
+*  clocks  devices
+*  *_IEP   IEP:Image Enhancement Processor
+*  *_ISP   ISP:Image Signal Processing
+*  *_VIP   VIP:Video Input Processor
+*  *_VOP*  VOP:Visual Output Processor
+*  *_RGA   RGA
+*  *_EDP*  EDP
+*  *_LVDS_*LVDS
+*  *_HDMI  HDMI
+*  *_MIPI_*MIPI
+*/
+   power-domain@RK3288_PD_VIO {
+   reg = ;
+   clocks = < ACLK_IEP>,
+< ACLK_ISP>,
+< ACLK_RGA>,
+< ACLK_VIP>,
+< ACLK_VOP0>,
+< ACLK_VOP1>,
+< DCLK_VOP0>,
+< DCLK_VOP1>,
+< HCLK_IEP>,
+< HCLK_ISP>,
+< HCLK_RGA>,
+< HCLK_VIP>,
+< HCLK_VOP0>,
+< HCLK_VOP1>,
+< PCLK_EDP_CTRL>,
+< PCLK_HDMI_CTRL>,
+< PCLK_LVDS_PHY>,
+< PCLK_MIPI_CSI>,
+< PCLK_MIPI_DSI0>,
+< PCLK_MIPI_DSI1>,
+< SCLK_EDP_24M>,
+< SCLK_EDP>,
+< SCLK_ISP_JPE>,
+< SCLK_ISP>,
+< SCLK_RGA>;
+   pm_qos = <_vio0_iep>,
+<_vio1_vop>,
+<_vio1_isp_w0>,
+<_vio1_isp_w1>,
+   

[PATCH v2 1/7] arm: dts: rockchip: rk3288: move io-domains nodes

[Johan Jonker]

In order to better compare the Linux rk3288.dtsi version
with the U-Boot version move the io-domains nodes.

Signed-off-by: Johan Jonker 
Reviewed-by: John Keeping 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass   # chromebook-jerry
---
 arch/arm/dts/rk3288-miqi.dtsi| 27 +++--
 arch/arm/dts/rk3288-phycore-som.dtsi | 30 +---
 arch/arm/dts/rk3288-popmetal.dtsi| 30 +---
 arch/arm/dts/rk3288-veyron.dtsi  | 28 --
 arch/arm/dts/rk3288.dtsi |  5 +
 5 files changed, 58 insertions(+), 62 deletions(-)

diff --git a/arch/arm/dts/rk3288-miqi.dtsi b/arch/arm/dts/rk3288-miqi.dtsi
index cb80cbf2..00c8613d 100644
--- a/arch/arm/dts/rk3288-miqi.dtsi
+++ b/arch/arm/dts/rk3288-miqi.dtsi
@@ -18,21 +18,6 @@
clock-output-names = "ext_gmac";
};

-   io_domains: io-domains {
-   compatible = "rockchip,rk3288-io-voltage-domain";
-   rockchip,grf = <>;
-
-   audio-supply = <_33>;
-   flash0-supply = <_flash>;
-   flash1-supply = <_lan>;
-   gpio30-supply = <_io>;
-   gpio1830-supply = <_io>;
-   lcdc-supply = <_io>;
-   sdcard-supply = <_sd>;
-   wifi-supply = <_18>;
-   };
-
-
leds {
compatible = "gpio-leds";

@@ -277,6 +262,18 @@
status = "okay";
 };

+_domains {
+   audio-supply = <_33>;
+   flash0-supply = <_flash>;
+   flash1-supply = <_lan>;
+   gpio30-supply = <_io>;
+   gpio1830-supply = <_io>;
+   lcdc-supply = <_io>;
+   sdcard-supply = <_sd>;
+   wifi-supply = <_18>;
+   status = "okay";
+};
+
  {
pcfg_output_high: pcfg-output-high {
output-high;
diff --git a/arch/arm/dts/rk3288-phycore-som.dtsi 
b/arch/arm/dts/rk3288-phycore-som.dtsi
index 821525f7..70c00308 100644
--- a/arch/arm/dts/rk3288-phycore-som.dtsi
+++ b/arch/arm/dts/rk3288-phycore-som.dtsi
@@ -71,22 +71,6 @@
clock-output-names = "ext_gmac";
};

-   io_domains: io_domains {
-   compatible = "rockchip,rk3288-io-voltage-domain";
-
-   status = "okay";
-   sdcard-supply = <_io_sd>;
-   flash0-supply = <_emmc_io>;
-   flash1-supply = <_misc_1v8>;
-   gpio1830-supply = <_3v3_io>;
-   gpio30-supply = <_3v3_io>;
-   bb-supply = <_3v3_io>;
-   dvp-supply = <_3v3_io>;
-   lcdc-supply = <_3v3_io>;
-   wifi-supply = <_3v3_io>;
-   audio-supply = <_3v3_io>;
-   };
-
leds: user-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -197,6 +181,20 @@
ddc-i2c-bus = <>;
 };

+_domains {
+   audio-supply = <_3v3_io>;
+   bb-supply = <_3v3_io>;
+   dvp-supply = <_3v3_io>;
+   flash0-supply = <_emmc_io>;
+   flash1-supply = <_misc_1v8>;
+   gpio1830-supply = <_3v3_io>;
+   gpio30-supply = <_3v3_io>;
+   lcdc-supply = <_3v3_io>;
+   sdcard-supply = <_io_sd>;
+   wifi-supply = <_3v3_io>;
+   status = "okay";
+};
+
  {
status = "okay";
clock-frequency = <40>;
diff --git a/arch/arm/dts/rk3288-popmetal.dtsi 
b/arch/arm/dts/rk3288-popmetal.dtsi
index 0253933a..d732a706 100644
--- a/arch/arm/dts/rk3288-popmetal.dtsi
+++ b/arch/arm/dts/rk3288-popmetal.dtsi
@@ -71,22 +71,6 @@
};
};

-   io_domains: io-domains {
-   compatible = "rockchip,rk3288-io-voltage-domain";
-   rockchip,grf = <>;
-
-   audio-supply = <_33>;
-   bb-supply = <_io>;
-   dvp-supply = <_dvp>;
-   flash0-supply = <_flash>;
-   flash1-supply = <_lan>;
-   gpio30-supply = <_io>;
-   gpio1830-supply = <_io>;
-   lcdc-supply = <_io>;
-   sdcard-supply = <_sd>;
-   wifi-supply = <_wl>;
-   };
-
ir: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = < 6 GPIO_ACTIVE_LOW>;
@@ -443,6 +427,20 @@
status = "okay";
 };

+_domains {
+   audio-supply = <_33>;
+   bb-supply = <_io>;
+   dvp-supply = <_dvp>;
+   flash0-supply = <_flash>;
+   flash1-supply = <_lan>;
+   gpio30-supply = <_io>;
+   gpio1830-supply = <_io>;

Re: [PATCH v1 7/7] arm: dts: rockchip: rk3288: partial sync pwm nodes

[Johan Jonker]

On 3/15/23 15:05, Simon Glass wrote:
> Hi Johan,
> 
> On Tue, 14 Mar 2023 at 12:16, Johan Jonker  wrote:
>>
>> In order to better compare the Linux rk3288.dtsi
>> version 6.3 -rc2 with the u-boot version partial
>> sync the pwm nodes.
>>
>> Signed-off-by: Johan Jonker 
>> ---
>>  arch/arm/dts/rk3288.dtsi | 18 +-
>>  1 file changed, 5 insertions(+), 13 deletions(-)
>>
>> diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
>> index f24e9ba5..dd1d9897 100644
>> --- a/arch/arm/dts/rk3288.dtsi
>> +++ b/arch/arm/dts/rk3288.dtsi
>> @@ -675,9 +675,7 @@
>> #pwm-cells = <3>;
>> pinctrl-names = "default";
>> pinctrl-0 = <_pin>;
>> -   clocks = < PCLK_PWM>;
>> -   clock-names = "pwm";
>> -   rockchip,grf = <>;
>> +   clocks = < PCLK_RKPWM>;
>> status = "disabled";
>> };
>>
>> @@ -687,9 +685,7 @@
>> #pwm-cells = <3>;
>> pinctrl-names = "default";
>> pinctrl-0 = <_pin>;
>> -   clocks = < PCLK_PWM>;
>> -   clock-names = "pwm";
>> -   rockchip,grf = <>;
>> +   clocks = < PCLK_RKPWM>;
>> status = "disabled";
>> };
>>
>> @@ -699,21 +695,17 @@
>> #pwm-cells = <3>;
>> pinctrl-names = "default";
>> pinctrl-0 = <_pin>;
>> -   clocks = < PCLK_PWM>;
>> -   clock-names = "pwm";
>> -   rockchip,grf = <>;
>> +   clocks = < PCLK_RKPWM>;
>> status = "disabled";
>> };
>>
>> pwm3: pwm@ff680030 {
>> compatible = "rockchip,rk3288-pwm";
>> reg = <0xff680030 0x10>;
>> -   #pwm-cells = <2>;
>> +   #pwm-cells = <3>;
> 

> How can we do this without breaking the existing pwm usage in U-Boot?

===

>From binding pwm-rockchip.yaml:

  "#pwm-cells":
enum: [2, 3]
description:
  Must be 2 (rk2928) or 3 (rk3288 and later).
  See pwm.yaml for a description of the cell format.

===

>From binding pwm.txt:

pwm-specifier typically encodes the chip-relative PWM number and the PWM
period in nanoseconds.

Optionally, the pwm-specifier can encode a number of flags (defined in
) in a third cell:
- PWM_POLARITY_INVERTED: invert the PWM signal polarity

===

Fixed with patch:

[PATCH] ARM: dts: rockchip: fix pwm-cells for rk3288's pwm3
https://lore.kernel.org/all/20190603143435.23352-1-j...@metanate.com/

===

U-Boot driver is ready:

static const struct rockchip_pwm_data pwm_data_v2 = {
[..]
.supports_polarity = true,
[..]
};

{ .compatible = "rockchip,rk3288-pwm", .data = (ulong)_data_v2},
===

git grep "pwms = <" | grep rk3288

rk3288-evb.dtsi:pwms = < 0 25000 0>;
rk3288-veyron.dtsi: pwms = < 0 100 0>;
rk3288-veyron.dtsi: pwms = < 0 2000 0>;

Given that there are no current users and the driver supports polarity I think 
it's save to set #pwm-cells to 3.
(Unless someone calls out a specific case not to change)

Johan

> 
>> pinctrl-names = "default";
>> pinctrl-0 = <_pin>;
>> -   clocks = < PCLK_PWM>;
>> -   clock-names = "pwm";
>> -   rockchip,grf = <>;
>> +   clocks = < PCLK_RKPWM>;
>> status = "disabled";
>> };
>>
>> --
>> 2.20.1
>>
> 
> Regards,
> Simon

[PATCH v1 7/7] arm: dts: rockchip: rk3288: partial sync pwm nodes

[Johan Jonker]

In order to better compare the Linux rk3288.dtsi
version 6.3 -rc2 with the u-boot version partial
sync the pwm nodes.

Signed-off-by: Johan Jonker 
---
 arch/arm/dts/rk3288.dtsi | 18 +-
 1 file changed, 5 insertions(+), 13 deletions(-)

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index f24e9ba5..dd1d9897 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -675,9 +675,7 @@
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <_pin>;
-   clocks = < PCLK_PWM>;
-   clock-names = "pwm";
-   rockchip,grf = <>;
+   clocks = < PCLK_RKPWM>;
status = "disabled";
};

@@ -687,9 +685,7 @@
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <_pin>;
-   clocks = < PCLK_PWM>;
-   clock-names = "pwm";
-   rockchip,grf = <>;
+   clocks = < PCLK_RKPWM>;
status = "disabled";
};

@@ -699,21 +695,17 @@
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <_pin>;
-   clocks = < PCLK_PWM>;
-   clock-names = "pwm";
-   rockchip,grf = <>;
+   clocks = < PCLK_RKPWM>;
status = "disabled";
};

pwm3: pwm@ff680030 {
compatible = "rockchip,rk3288-pwm";
reg = <0xff680030 0x10>;
-   #pwm-cells = <2>;
+   #pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <_pin>;
-   clocks = < PCLK_PWM>;
-   clock-names = "pwm";
-   rockchip,grf = <>;
+   clocks = < PCLK_RKPWM>;
status = "disabled";
};

--
2.20.1

[PATCH v1 6/7] clk: rockchip: clk_rk3288: add PCLK_RKPWM

[Johan Jonker]

The rk3288 pwm node synced from Linux make use of PCLK_RKPWM
instead of PCLK_PWM. They have the same pclk_cpu parent,
so add PCLK_RKPWM to rk3288_clk_get_rate().

Signed-off-by: Johan Jonker 
---
 drivers/clk/rockchip/clk_rk3288.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/rockchip/clk_rk3288.c 
b/drivers/clk/rockchip/clk_rk3288.c
index 3b29992c..ef744c06 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -778,6 +778,7 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
case PCLK_I2C5:
return gclk_rate;
case PCLK_PWM:
+   case PCLK_RKPWM:
return PD_BUS_PCLK_HZ;
case SCLK_SARADC:
new_rate = rockchip_saradc_get_clk(priv->cru);
--
2.20.1

[PATCH v1 5/7] arm: dts: rockchip: rk3288: partial sync vop/lvds/mipi/hdmi nodes

[Johan Jonker]

In order to better compare the Linux rk3288.dtsi
version 6.3 -rc2 with the u-boot version partial
sync the vop/lvds/mipi/hdmi nodes.

Signed-off-by: Johan Jonker 
---
 arch/arm/dts/rk3288.dtsi | 48 
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 9f924466..f24e9ba5 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -1021,7 +1021,7 @@

vopb: vop@ff93 {
compatible = "rockchip,rk3288-vop";
-   reg = <0xff93 0x19c>;
+   reg = <0xff93 0x19c>, <0xff931000 0x1000>;
interrupts = ;
clocks = < ACLK_VOP0>, < DCLK_VOP0>, < HCLK_VOP0>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
@@ -1035,24 +1035,24 @@
#address-cells = <1>;
#size-cells = <0>;

-   vopb_out_edp: endpoint@0 {
+   vopb_out_hdmi: endpoint@0 {
reg = <0>;
-   remote-endpoint = <_in_vopb>;
+   remote-endpoint = <_in_vopb>;
};

-   vopb_out_hdmi: endpoint@1 {
+   vopb_out_edp: endpoint@1 {
reg = <1>;
-   remote-endpoint = <_in_vopb>;
+   remote-endpoint = <_in_vopb>;
};

-   vopb_out_lvds: endpoint@2 {
+   vopb_out_mipi: endpoint@2 {
reg = <2>;
-   remote-endpoint = <_in_vopb>;
+   remote-endpoint = <_in_vopb>;
};

-   vopb_out_mipi: endpoint@3 {
+   vopb_out_lvds: endpoint@3 {
reg = <3>;
-   remote-endpoint = <_in_vopb>;
+   remote-endpoint = <_in_vopb>;
};
};
};
@@ -1070,7 +1070,7 @@

vopl: vop@ff94 {
compatible = "rockchip,rk3288-vop";
-   reg = <0xff94 0x19c>;
+   reg = <0xff94 0x19c>, <0xff941000 0x1000>;
interrupts = ;
clocks = < ACLK_VOP1>, < DCLK_VOP1>, < HCLK_VOP1>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
@@ -1084,24 +1084,24 @@
#address-cells = <1>;
#size-cells = <0>;

-   vopl_out_edp: endpoint@0 {
+   vopl_out_hdmi: endpoint@0 {
reg = <0>;
-   remote-endpoint = <_in_vopl>;
+   remote-endpoint = <_in_vopl>;
};

-   vopl_out_hdmi: endpoint@1 {
+   vopl_out_edp: endpoint@1 {
reg = <1>;
-   remote-endpoint = <_in_vopl>;
+   remote-endpoint = <_in_vopl>;
};

-   vopl_out_lvds: endpoint@2 {
+   vopl_out_mipi: endpoint@2 {
reg = <2>;
-   remote-endpoint = <_in_vopl>;
+   remote-endpoint = <_in_vopl>;
};

-   vopl_out_mipi: endpoint@3 {
+   vopl_out_lvds: endpoint@3 {
reg = <3>;
-   remote-endpoint = <_in_vopl>;
+   remote-endpoint = <_in_vopl>;
};
};
};
@@ -1118,11 +1118,11 @@
};

mipi_dsi: mipi@ff96 {
-   compatible = "rockchip,rk3288_mipi_dsi";
+   compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
reg = <0xff96 0x4000>;
interrupts = ;
-   clocks = < PCLK_MIPI_DSI0>;
-   clock-names = "pclk_mipi";
+   clocks = < SCLK_MIPIDSI_24M>, < PCLK_MIPI_DSI0>;
+   clock-names = "ref", "pclk";
power-domains = < RK3288_PD_VIO>;
rockchip,grf = <>;
status = "disabled";
@@ -1148,7 +1148,7 @@
reg = <0xff96c000 0x4000>;
clocks = <

[PATCH v1 3/7] video: rockchip: rk_vop: add rk3288-dp compare string

[Johan Jonker]

In the current rk3288.dtsi file the compatible string for
the DisplayPort(DP) node ends with "edp". The string in the
binding ends with "dp" which conflicts with "cdn-dp" as a
search term. Add "rk3288-dp" as compare string to select
vop_id.

Signed-off-by: Johan Jonker 
---
 drivers/video/rockchip/rk_vop.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index bc98ab68..e21ac7e3 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -307,7 +307,8 @@ static int rk_display_init(struct udevice *dev, ulong 
fbbase, ofnode ep_node)
  __func__, dev_read_name(dev));
return -EINVAL;
}
-   if (strstr(compat, "edp")) {
+   if (strstr(compat, "edp") ||
+   strstr(compat, "rk3288-dp")) {
vop_id = VOP_MODE_EDP;
} else if (strstr(compat, "mipi")) {
vop_id = VOP_MODE_MIPI;
--
2.20.1

[PATCH v1 4/7] arm: dts: rockchip: rk3288: partial sync edp node

[Johan Jonker]

The rk3288 edp node has a phy node in Linux with a clock
property while current U-boot driver expects this clock
on position index 1. Move U-boot specific DT clock properties
to rk3288-u-boot.dtsi and partially the sync edp node.

Signed-off-by: Johan Jonker 
---
 arch/arm/dts/rk3288-u-boot.dtsi |  5 +
 arch/arm/dts/rk3288.dtsi| 17 +++--
 2 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index e411445e..ca229150 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -91,6 +91,11 @@
u-boot,dm-pre-reloc;
 };

+ {
+   clocks = < SCLK_EDP>, < SCLK_EDP_24M>, < PCLK_EDP_CTRL>;
+   clock-names = "clk_edp", "clk_edp_24m", "pclk_edp";
+};
+
  {
u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index f06d1f5b..9f924466 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -1177,19 +1177,24 @@
};

edp: dp@ff97 {
-   compatible = "rockchip,rk3288-edp";
+   compatible = "rockchip,rk3288-dp";
reg = <0xff97 0x4000>;
interrupts = ;
-   clocks = < SCLK_EDP>, < SCLK_EDP_24M>, < 
PCLK_EDP_CTRL>;
-   clock-names = "clk_edp", "clk_edp_24m", "pclk_edp";
+   clocks = < SCLK_EDP>, < PCLK_EDP_CTRL>;
+   clock-names = "dp", "pclk";
+   phys = <_phy>;
+   phy-names = "dp";
+   power-domains = < RK3288_PD_VIO>;
resets = < SRST_EDP>;
-   reset-names = "edp";
+   reset-names = "dp";
rockchip,grf = <>;
-   power-domains = < RK3288_PD_VIO>;
status = "disabled";

ports {
-   edp_in: port {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   edp_in: port@0 {
+   reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
edp_in_vopb: endpoint@0 {
--
2.20.1

[PATCH v1 2/7] arm: dts: rockchip: rk3288: partial sync grf and pmu nodes

[Johan Jonker]

In order to better compare the Linux rk3288.dtsi
version 6.3 -rc2 with the u-boot version partial
sync the grf and pmu nodes.

Signed-off-by: Johan Jonker 
---
 arch/arm/dts/rk3288.dtsi | 269 +--
 1 file changed, 173 insertions(+), 96 deletions(-)

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 9cfb86f9..f06d1f5b 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: GPL-2.0+
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

 #include 
 #include 
@@ -7,13 +7,16 @@
 #include 
 #include 
 #include 
-#include 
-#include "skeleton.dtsi"
+#include 

 / {
+   #address-cells = <1>;
+   #size-cells = <1>;
+
compatible = "rockchip,rk3288";

interrupt-parent = <>;
+
aliases {
ethernet0 = 
i2c0 = 
@@ -732,8 +735,128 @@
};

pmu: power-management@ff73 {
-   compatible = "rockchip,rk3288-pmu", "syscon";
+   compatible = "rockchip,rk3288-pmu", "syscon", "simple-mfd";
reg = <0xff73 0x100>;
+
+   power: power-controller {
+   compatible = "rockchip,rk3288-power-controller";
+   #power-domain-cells = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   assigned-clocks = < SCLK_EDP_24M>;
+   assigned-clock-parents = <>;
+
+   /*
+* Note: Although SCLK_* are the working clocks
+* of device without including on the NOC, needed for
+* synchronous reset.
+*
+* The clocks on the which NOC:
+* ACLK_IEP/ACLK_VIP/ACLK_VOP0 are on ACLK_VIO0_NIU.
+* ACLK_ISP/ACLK_VOP1 are on ACLK_VIO1_NIU.
+* ACLK_RGA is on ACLK_RGA_NIU.
+* The others (HCLK_*,PLCK_*) are on HCLK_VIO_NIU.
+*
+* Which clock are device clocks:
+*  clocks  devices
+*  *_IEP   IEP:Image Enhancement Processor
+*  *_ISP   ISP:Image Signal Processing
+*  *_VIP   VIP:Video Input Processor
+*  *_VOP*  VOP:Visual Output Processor
+*  *_RGA   RGA
+*  *_EDP*  EDP
+*  *_LVDS_*LVDS
+*  *_HDMI  HDMI
+*  *_MIPI_*MIPI
+*/
+   power-domain@RK3288_PD_VIO {
+   reg = ;
+   clocks = < ACLK_IEP>,
+< ACLK_ISP>,
+< ACLK_RGA>,
+< ACLK_VIP>,
+< ACLK_VOP0>,
+< ACLK_VOP1>,
+< DCLK_VOP0>,
+< DCLK_VOP1>,
+< HCLK_IEP>,
+< HCLK_ISP>,
+< HCLK_RGA>,
+< HCLK_VIP>,
+< HCLK_VOP0>,
+< HCLK_VOP1>,
+< PCLK_EDP_CTRL>,
+< PCLK_HDMI_CTRL>,
+< PCLK_LVDS_PHY>,
+< PCLK_MIPI_CSI>,
+< PCLK_MIPI_DSI0>,
+< PCLK_MIPI_DSI1>,
+< SCLK_EDP_24M>,
+< SCLK_EDP>,
+< SCLK_ISP_JPE>,
+< SCLK_ISP>,
+< SCLK_RGA>;
+   pm_qos = <_vio0_iep>,
+<_vio1_vop>,
+<_vio1_isp_w0>,
+<_vio1_isp_w1>,
+<_vio0_vop>,
+<_vio0_vip>,
+ 

[PATCH v1 1/7] arm: dts: rockchip: rk3288: move io-domains nodes

[Johan Jonker]

In order to better compare the Linux rk3288.dtsi version
with the u-boot version move the io-domains nodes.

Signed-off-by: Johan Jonker 
---
 arch/arm/dts/rk3288-miqi.dtsi| 27 +++--
 arch/arm/dts/rk3288-phycore-som.dtsi | 30 +---
 arch/arm/dts/rk3288-popmetal.dtsi| 30 +---
 arch/arm/dts/rk3288-veyron.dtsi  | 28 --
 arch/arm/dts/rk3288.dtsi |  5 +
 5 files changed, 58 insertions(+), 62 deletions(-)

diff --git a/arch/arm/dts/rk3288-miqi.dtsi b/arch/arm/dts/rk3288-miqi.dtsi
index cb80cbf2..00c8613d 100644
--- a/arch/arm/dts/rk3288-miqi.dtsi
+++ b/arch/arm/dts/rk3288-miqi.dtsi
@@ -18,21 +18,6 @@
clock-output-names = "ext_gmac";
};

-   io_domains: io-domains {
-   compatible = "rockchip,rk3288-io-voltage-domain";
-   rockchip,grf = <>;
-
-   audio-supply = <_33>;
-   flash0-supply = <_flash>;
-   flash1-supply = <_lan>;
-   gpio30-supply = <_io>;
-   gpio1830-supply = <_io>;
-   lcdc-supply = <_io>;
-   sdcard-supply = <_sd>;
-   wifi-supply = <_18>;
-   };
-
-
leds {
compatible = "gpio-leds";

@@ -277,6 +262,18 @@
status = "okay";
 };

+_domains {
+   audio-supply = <_33>;
+   flash0-supply = <_flash>;
+   flash1-supply = <_lan>;
+   gpio30-supply = <_io>;
+   gpio1830-supply = <_io>;
+   lcdc-supply = <_io>;
+   sdcard-supply = <_sd>;
+   wifi-supply = <_18>;
+   status = "okay";
+};
+
  {
pcfg_output_high: pcfg-output-high {
output-high;
diff --git a/arch/arm/dts/rk3288-phycore-som.dtsi 
b/arch/arm/dts/rk3288-phycore-som.dtsi
index 821525f7..70c00308 100644
--- a/arch/arm/dts/rk3288-phycore-som.dtsi
+++ b/arch/arm/dts/rk3288-phycore-som.dtsi
@@ -71,22 +71,6 @@
clock-output-names = "ext_gmac";
};

-   io_domains: io_domains {
-   compatible = "rockchip,rk3288-io-voltage-domain";
-
-   status = "okay";
-   sdcard-supply = <_io_sd>;
-   flash0-supply = <_emmc_io>;
-   flash1-supply = <_misc_1v8>;
-   gpio1830-supply = <_3v3_io>;
-   gpio30-supply = <_3v3_io>;
-   bb-supply = <_3v3_io>;
-   dvp-supply = <_3v3_io>;
-   lcdc-supply = <_3v3_io>;
-   wifi-supply = <_3v3_io>;
-   audio-supply = <_3v3_io>;
-   };
-
leds: user-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -197,6 +181,20 @@
ddc-i2c-bus = <>;
 };

+_domains {
+   audio-supply = <_3v3_io>;
+   bb-supply = <_3v3_io>;
+   dvp-supply = <_3v3_io>;
+   flash0-supply = <_emmc_io>;
+   flash1-supply = <_misc_1v8>;
+   gpio1830-supply = <_3v3_io>;
+   gpio30-supply = <_3v3_io>;
+   lcdc-supply = <_3v3_io>;
+   sdcard-supply = <_io_sd>;
+   wifi-supply = <_3v3_io>;
+   status = "okay";
+};
+
  {
status = "okay";
clock-frequency = <40>;
diff --git a/arch/arm/dts/rk3288-popmetal.dtsi 
b/arch/arm/dts/rk3288-popmetal.dtsi
index 0253933a..d732a706 100644
--- a/arch/arm/dts/rk3288-popmetal.dtsi
+++ b/arch/arm/dts/rk3288-popmetal.dtsi
@@ -71,22 +71,6 @@
};
};

-   io_domains: io-domains {
-   compatible = "rockchip,rk3288-io-voltage-domain";
-   rockchip,grf = <>;
-
-   audio-supply = <_33>;
-   bb-supply = <_io>;
-   dvp-supply = <_dvp>;
-   flash0-supply = <_flash>;
-   flash1-supply = <_lan>;
-   gpio30-supply = <_io>;
-   gpio1830-supply = <_io>;
-   lcdc-supply = <_io>;
-   sdcard-supply = <_sd>;
-   wifi-supply = <_wl>;
-   };
-
ir: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = < 6 GPIO_ACTIVE_LOW>;
@@ -443,6 +427,20 @@
status = "okay";
 };

+_domains {
+   audio-supply = <_33>;
+   bb-supply = <_io>;
+   dvp-supply = <_dvp>;
+   flash0-supply = <_flash>;
+   flash1-supply = <_lan>;
+   gpio30-supply = <_io>;
+   gpio1830-supply = <_io>;
+   lcdc-supply = <_io>;
+   sdcard-supply = <_sd>;
+   wifi-supply = <_w

Re: [PATCH v8 13/24] rockchip: rk3288: syscon_rk3288: store syscon platdata in regmap

[Johan Jonker]

On 3/13/23 18:46, John Keeping wrote:
> On Mon, Mar 13, 2023 at 05:53:20PM +0100, Johan Jonker wrote:
>> On 3/13/23 14:26, John Keeping wrote:
>>> On Mon, Mar 13, 2023 at 01:30:57AM +0100, Johan Jonker wrote:
>>>> The Rockchip SoC rk3288 has 2 types of device trees floating around.
>>>> A 64bit reg size when synced from Linux and a 32bit for U-boot.
>>>> A pre-probe function in the syscon class driver assumes only 32bit.
>>>> For other odd reg structures the regmap must be defined in the individual
>>>> syscon driver. Store rk3288 platdata in a regmap before pre-probe
>>>> during bind.
>>>>
>>>> Signed-off-by: Johan Jonker 
>>>> ---
>>>
>>> What is special about the rk3288 syscon that means the driver needs this
>>> handling?  Isn't this a general problem for DTs with 64-bit addresses on
>>> 32-bit systems that could be solved in syscon-uclass.c?
>>
>> The dtd structure is only know to the driver with the SoC orientated 
>> compatible string.
>> I see guessing the "reg" size more as a legacy that we keep using for 
>> existing drivers
>> and should be deprecated.
>>
>>>
>>> I suspect it's difficult to handle the general case since #memory-cells
>>> may be difference for difference syscons so a global constant doesn't
>>> work, but the approach in this patch seems incredibly verbose for
>>
>> You are right here, but other then rk3288 I don't see that happen for other 
>> 32bit Rockchip SoCs.

>> It's more verbose, because struct syscon_uc_info is not there yet in the 
>> bind phase. (ie. calloc)

Currently syscon_uc_info is allocated/set after bind on in the probe phase.

device_probe()->device_of_to_plat()->device_alloc_priv()->dev_set_uclass_priv()

Not aware how to hookup to "struct uclass_driver",so no other option to do that 
then here.

> 
> What about non-Rockchip SoCs using the syscon uclass?
> 
>>> something that is likely to be needed for many platforms.
>>>
>>
>>> Could we use driver flags with something like:
>>>
>>> .flags = of_platdata_reg_size(struct rockchip_rk3288_noc_plat),
>>
>> Driver flags might solve only the "reg" size part, but not the
>> ARRAY_SIZE and the unknown "reg" property location part.
> 

> Right - but the generic syscon-uclass code assumes a single range and
> that reg is the first property (at least I think it should be assuming a
> single range, but it looks like there might be a bug there now).

I'm not aware that syscon nodes can have multiple reg ranges, but don't assume 
that in the future there won't be a binding that does.

> 
>>> and this untested macro:
>>>
>>> #define of_platdata_reg_size(s) \
>>> ((sizeof(((struct rockchip_rk3288_noc_plat *) 0)->reg) == 64) ? 
>>> \
>>> DM_FLAGS_PLATDATA_REG_64BIT : 0)
>>
>> This would create a parallel data flow of a "size flag and ARRAY_SIZE 
>> variable + data" in
>> a structure to the syscon class driver that also must be stored somewhere,
>> while we could do the thing correct in the regmap structure right away.
> 
> But the syscon uclass doesn't need any of that extra info - for
> OF_PLATDATA is makes assumptions and I don't see why that needs to be
> any different for 32-bit platforms with #memory-cells = <2>.  From
> syscon-uclass.c:
> 
>   /*
>* With OF_PLATDATA we really have no way of knowing the format of
>* the device-specific platform data. So we assume that it starts with
>* a 'reg' member, and this holds a single address and size. Drivers
>* using OF_PLATDATA will need to ensure that this is true.
>*/
> 
> In fact, for RK3288 we can just do:
> 

>   static_assert(sizeof(fdt_val_t) == FIELD_SIZEOF(struct 
> dtd_rockchip_rk3288_grf, reg[0]));

fdt_val_t describes the parser capability and is not the same as the size in 
the dtd structure.

> 
> and the uclass gets this right.

There's no guaranty that the dtd structure is going to be like syscon_base_plat 
and that the reg property is first.

struct syscon_base_plat {
phys_addr_t reg[2];
};

>From syscon.yaml and other bindings we learn that there can be other 
>properties then "reg" in syscon nodes.
Properties pop-up where ever they like in the dtd structure after combining 
various dtsi and dts files.

struct dtd_rockchip_rk3066_grf {
booldummy_property;
fdt64_t reg[2];
};

Only passing a size flag is not enough.

Re: [PATCH v8 13/24] rockchip: rk3288: syscon_rk3288: store syscon platdata in regmap

[Johan Jonker]

On 3/13/23 14:26, John Keeping wrote:
> On Mon, Mar 13, 2023 at 01:30:57AM +0100, Johan Jonker wrote:
>> The Rockchip SoC rk3288 has 2 types of device trees floating around.
>> A 64bit reg size when synced from Linux and a 32bit for U-boot.
>> A pre-probe function in the syscon class driver assumes only 32bit.
>> For other odd reg structures the regmap must be defined in the individual
>> syscon driver. Store rk3288 platdata in a regmap before pre-probe
>> during bind.
>>
>> Signed-off-by: Johan Jonker 
>> ---
> 
> What is special about the rk3288 syscon that means the driver needs this
> handling?  Isn't this a general problem for DTs with 64-bit addresses on
> 32-bit systems that could be solved in syscon-uclass.c?

The dtd structure is only know to the driver with the SoC orientated compatible 
string.
I see guessing the "reg" size more as a legacy that we keep using for existing 
drivers
and should be deprecated.

> 
> I suspect it's difficult to handle the general case since #memory-cells
> may be difference for difference syscons so a global constant doesn't
> work, but the approach in this patch seems incredibly verbose for

You are right here, but other then rk3288 I don't see that happen for other 
32bit Rockchip SoCs.
It's more verbose, because struct syscon_uc_info is not there yet in the bind 
fase. (ie. calloc)

> something that is likely to be needed for many platforms.
> 

> Could we use driver flags with something like:
> 
>   .flags = of_platdata_reg_size(struct rockchip_rk3288_noc_plat),

Driver flags might solve only the "reg" size part, but not the ARRAY_SIZE and 
the unknown "reg" property location part.

> 
> and this untested macro:
> 
>   #define of_platdata_reg_size(s) \
>   ((sizeof(((struct rockchip_rk3288_noc_plat *) 0)->reg) == 64) ? 
> \
>   DM_FLAGS_PLATDATA_REG_64BIT : 0)

This would create a parallel data flow of a "size flag and ARRAY_SIZE variable 
+ data" in
a structure to the syscon class driver that also must be stored somewhere,
while we could do the thing correct in the regmap structure right away.

Johan

Re: [PATCH v8 13/24] rockchip: rk3288: syscon_rk3288: store syscon platdata in regmap

[Johan Jonker]

On 3/13/23 04:10, Simon Glass wrote:
> On Sun, 12 Mar 2023 at 18:31, Johan Jonker  wrote:
>>
>> The Rockchip SoC rk3288 has 2 types of device trees floating around.
>> A 64bit reg size when synced from Linux and a 32bit for U-boot.
>> A pre-probe function in the syscon class driver assumes only 32bit.
>> For other odd reg structures the regmap must be defined in the individual
>> syscon driver. Store rk3288 platdata in a regmap before pre-probe
>> during bind.
>>
>> Signed-off-by: Johan Jonker 
>> ---
>>
>> Note:
>>   Proof of concept not tested with rk3288 hardware,
>>   but with rk3066.
>>
>> Changed V7:
>>   new patch
>> ---
>>  arch/arm/mach-rockchip/rk3288/syscon_rk3288.c | 121 ++
>>  1 file changed, 121 insertions(+)
>>
> 
> I tested this on chromebook_jerry which uses SPL_OF_PLATDATA
> 
> Reviewed-by: Simon Glass 
> Tested-by: Simon Glass 
> 

> Can we sync up with Linux on the DT?

Not right away.
Given that this serie has version 8 and 24 patches.
We start a new rk3288 sync serie for that. ;)

Also must work on serie: Fixes for Rockchip NFC driver part 2

Johan
===
1: Some boards with only SPL don't seem to fit with 64bit and should convert to 
TPL/SPL.

   arm:  +   popmetal-rk3288
+binman: Error 1 running 'mkimage -d ./mkimage.simple-bin.mkimage -n rk3288 -T 
rksd ./idbloader.img': Error: SPL image is too large (size 0x8800 than 0x8000)

   arm:  +   phycore-rk3288  
+binman: Error 1 running 'mkimage -d ./mkimage.simple-bin.mkimage -n rk3288 -T 
rksd ./idbloader.img': Error: SPL image is too large (size 0x8800 than 0x8000)

===
2: extra move/split of some nodes:
rk3288.dtsi

usbphy
power-controller
io-domains

rk3288-u-boot.dtsi

fix reg size
gpio node order

===
3: VOP/MIPI/LVDS/HDMI (TODO for Simon Glass)

The Linux nodes have different/more clocks and edp has phy nodes.
Some compatibles changes dp/edp/cdn-dp must be fixed for strstr() function.

-   compatible = "rockchip,rk3288-edp";
+   compatible = "rockchip,rk3288-dp";

if (strstr(compat, "edp")) {
vop_id = VOP_MODE_EDP;
} else if (strstr(compat, "mipi")) {
vop_id = VOP_MODE_MIPI;
} else if (strstr(compat, "hdmi")) {
vop_id = VOP_MODE_HDMI;
} else if (strstr(compat, "cdn-dp")) {
vop_id = VOP_MODE_DP;
} else if (strstr(compat, "lvds")) {
vop_id = VOP_MODE_LVDS;
} else {
debug("%s(%s): Failed to find vop mode for %s\n",
  __func__, dev_read_name(dev), compat);
return -EINVAL;
}
===

4: Check if drivers still work after sync.(TODO for Simon Glass)

This has to be done with someone that has rk3288 hardware.

vopb: vop@ff93 {
compatible = "rockchip,rk3288-vop";
-   reg = <0xff93 0x19c>;
+   reg = <0x0 0xff93 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>;
interrupts = ;
clocks = < ACLK_VOP0>, < DCLK_VOP0>, < HCLK_VOP0>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
@@ -862,31 +1032,31 @@
#address-cells = <1>;
#size-cells = <0>;
 
-   vopb_out_edp: endpoint@0 {
+   vopb_out_hdmi: endpoint@0 {
reg = <0>;
-   remote-endpoint = <_in_vopb>;
+   remote-endpoint = <_in_vopb>;
};
 
-   vopb_out_hdmi: endpoint@1 {
+   vopb_out_edp: endpoint@1 {
reg = <1>;
-   remote-endpoint = <_in_vopb>;
+   remote-endpoint = <_in_vopb>;
};
 
-   vopb_out_lvds: endpoint@2 {
+   vopb_out_mipi: endpoint@2 {
reg = <2>;
-   remote-endpoint = <_in_vopb>;
+   remote-endpoint = <_in_vopb>;
};
 
-   vopb_out_mipi: endpoint@3 {
+   vopb_out_lvds: endpoint@3 {
reg = <3>;
-   remote-endpoint = <_in_vopb>;
+   remote-endpoint = <_in_vopb>;
};
};
};
 
vopb_mmu: iommu@ff930300 {
compatible = "rockchip,iommu";
-   

[PATCH v8 24/24] include: fdtdec: decouple fdt_addr_t and phys_addr_t size

[Johan Jonker]

The DT specification supports CPUs with both 32-bit and 64-bit addressing
capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled
by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions
with a 64-bit reg property. These partitions synced from Linux end up with
the wrong offset and sizes when only the lower 32-bit is passed.
Decouple the fdt_addr_t and phys_addr_t size as they don't necessary
match.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
Reviewed-by: Kever Yang 
---

Note:
  Due to the large number of references to fdt_addr_t
  this patch serie fixes only some bugs, but not all.
  Apply only when all remaining errors and warnings
  due to this patch are fixed.
  Help with testing/debug appreciated.
---
 Kconfig  |  8 
 include/fdtdec.h | 13 +
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/Kconfig b/Kconfig
index a75cce7e..7697dade 100644
--- a/Kconfig
+++ b/Kconfig
@@ -422,11 +422,19 @@ endif # EXPERT

 config PHYS_64BIT
bool "64bit physical address support"
+   select FDT_64BIT
help
  Say Y here to support 64bit physical memory address.
  This can be used not only for 64bit SoCs, but also for
  large physical address extension on 32bit SoCs.

+config FDT_64BIT
+   bool "64bit fdt address support"
+   help
+ Say Y here to support 64bit fdt addresses.
+ This can be used not only for 64bit SoCs, but also
+ for large address extensions on 32bit SoCs.
+
 config HAS_ROM
bool
select BINMAN
diff --git a/include/fdtdec.h b/include/fdtdec.h
index aa61a0fc..6b768ed5 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -18,15 +18,18 @@
 #include 

 /*
- * A typedef for a physical address. Note that fdt data is always big
+ * Support for 64bit fdt addresses.
+ * This can be used not only for 64bit SoCs, but also
+ * for large address extensions on 32bit SoCs.
+ * Note that fdt data is always big
  * endian even on a litle endian machine.
  */
-typedef phys_addr_t fdt_addr_t;
-typedef phys_size_t fdt_size_t;

 #define FDT_SIZE_T_NONE (-1U)

-#ifdef CONFIG_PHYS_64BIT
+#ifdef CONFIG_FDT_64BIT
+typedef u64 fdt_addr_t;
+typedef u64 fdt_size_t;
 #define FDT_ADDR_T_NONE ((ulong)(-1))

 #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
@@ -35,6 +38,8 @@ typedef phys_size_t fdt_size_t;
 #define cpu_to_fdt_size(reg) cpu_to_be64(reg)
 typedef fdt64_t fdt_val_t;
 #else
+typedef u32 fdt_addr_t;
+typedef u32 fdt_size_t;
 #define FDT_ADDR_T_NONE (-1U)

 #define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
--
2.20.1

[PATCH v8 23/24] arm: stm32mp: spl: fix function with fdt_addr_t input

[Johan Jonker]

The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so fix ofnode_get_addr_size function with fdt_addr_t input to
be able to handle both sizes for stm32mp SoC in spl.c file.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---

Changed V7:
  remove cast
---
 arch/arm/mach-stm32mp/spl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-stm32mp/spl.c b/arch/arm/mach-stm32mp/spl.c
index 19d9fe04..6c79259b 100644
--- a/arch/arm/mach-stm32mp/spl.c
+++ b/arch/arm/mach-stm32mp/spl.c
@@ -112,7 +112,7 @@ uint32_t stm32mp_get_dram_size(void)

 static int optee_get_reserved_memory(uint32_t *start, uint32_t *size)
 {
-   phys_size_t fdt_mem_size;
+   fdt_addr_t fdt_mem_size;
fdt_addr_t fdt_start;
ofnode node;

--
2.20.1

[PATCH v8 22/24] drivers: fix debug string with fdt_addr_t input

[Johan Jonker]

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so fix some
debug strings with fdt_addr_t to be able to handle both sizes.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---

Changed V5:
  new patch
---
 arch/arm/mach-mvebu/cpu.c   | 2 +-
 drivers/clk/ti/clk-ctrl.c   | 9 +
 drivers/phy/phy-stm32-usbphyc.c | 4 ++--
 3 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 329d1369..f58689e1 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -631,7 +631,7 @@ int board_xhci_enable(fdt_addr_t base)
 {
const struct mbus_dram_target_info *dram;

-   printf("MVEBU XHCI INIT controller @ 0x%lx\n", base);
+   printf("MVEBU XHCI INIT controller @ 0x%llx\n", (fdt64_t)base);

dram = mvebu_mbus_dram_info();
xhci_mvebu_mbus_config((void __iomem *)base, dram);
diff --git a/drivers/clk/ti/clk-ctrl.c b/drivers/clk/ti/clk-ctrl.c
index 6cc02d2e..8926e57e 100644
--- a/drivers/clk/ti/clk-ctrl.c
+++ b/drivers/clk/ti/clk-ctrl.c
@@ -44,7 +44,7 @@ static int clk_ti_ctrl_disable(struct clk *clk)
offs = priv->offs[0].start + clk->id;
err = clk_ti_ctrl_check_offs(clk, offs);
if (err) {
-   dev_err(clk->dev, "invalid offset: 0x%lx\n", offs);
+   dev_err(clk->dev, "invalid offset: 0x%llx\n", (fdt64_t)offs);
return err;
}

@@ -64,7 +64,7 @@ static int clk_ti_ctrl_enable(struct clk *clk)
offs = priv->offs[0].start + clk->id;
err = clk_ti_ctrl_check_offs(clk, offs);
if (err) {
-   dev_err(clk->dev, "invalid offset: 0x%lx\n", offs);
+   dev_err(clk->dev, "invalid offset: 0x%llx\n", (fdt64_t)offs);
return err;
}

@@ -125,8 +125,9 @@ static int clk_ti_ctrl_of_to_plat(struct udevice *dev)
}

priv->offs[i].end = priv->offs[i].start + fdt_size;
-   dev_dbg(dev, "start=0x%08lx, end=0x%08lx\n",
-   priv->offs[i].start, priv->offs[i].end);
+   dev_dbg(dev, "start=0x%016llx, end=0x%016llx\n",
+   (fdt64_t)priv->offs[i].start,
+   (fdt64_t)priv->offs[i].end);
}

return 0;
diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32-usbphyc.c
index dcf2194e..15bd60ca 100644
--- a/drivers/phy/phy-stm32-usbphyc.c
+++ b/drivers/phy/phy-stm32-usbphyc.c
@@ -583,8 +583,8 @@ static int stm32_usbphyc_probe(struct udevice *dev)

phy_id = ofnode_read_u32_default(node, "reg", FDT_ADDR_T_NONE);
if (phy_id >= MAX_PHYS) {
-   dev_err(dev, "invalid reg value %lx for %s\n",
-   phy_id, ofnode_get_name(node));
+   dev_err(dev, "invalid reg value %llx for %s\n",
+   (fdt64_t)phy_id, ofnode_get_name(node));
return -ENOENT;
}

--
2.20.1

[PATCH v8 21/24] drivers: use devfdt_get_addr_ptr when cast to pointer

[Johan Jonker]

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
devfdt_get_addr_ptr instead of the devfdt_get_addr function in
the various files in the drivers directory that cast to a pointer.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---

Changed V6:
  drop cast
  skip livetree.rst

Changed V5:
  new patch
---
 drivers/clk/at91/sama7g5.c | 2 +-
 drivers/clk/at91/sckc.c| 2 +-
 drivers/spi/mtk_snor.c | 2 +-
 drivers/spi/mtk_spim.c | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index d1ec3c82..7a5a2906 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -1114,7 +1114,7 @@ static const struct pmc_clk_setup {

 static int sama7g5_clk_probe(struct udevice *dev)
 {
-   void __iomem *base = (void *)devfdt_get_addr(dev);
+   void __iomem *base = devfdt_get_addr_ptr(dev);
unsigned int *clkmuxallocs[SAMA7G5_MAX_MUX_ALLOCS];
unsigned int *muxallocs[SAMA7G5_MAX_MUX_ALLOCS];
const char *p[10];
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index 34ce611a..43136ab2 100644
--- a/drivers/clk/at91/sckc.c
+++ b/drivers/clk/at91/sckc.c
@@ -123,7 +123,7 @@ U_BOOT_DRIVER(at91_sam9x60_td_slck) = {
 static int at91_sam9x60_sckc_probe(struct udevice *dev)
 {
struct sam9x60_sckc *sckc = dev_get_priv(dev);
-   void __iomem *base = (void *)devfdt_get_addr(dev);
+   void __iomem *base = devfdt_get_addr_ptr(dev);
const char *slow_rc_osc, *slow_osc;
const char *parents[2];
struct clk *clk, c;
diff --git a/drivers/spi/mtk_snor.c b/drivers/spi/mtk_snor.c
index 04f588a7..4b7d4a6e 100644
--- a/drivers/spi/mtk_snor.c
+++ b/drivers/spi/mtk_snor.c
@@ -470,7 +470,7 @@ static int mtk_snor_probe(struct udevice *bus)
int ret;
u32 reg;

-   priv->base = (void __iomem *)devfdt_get_addr(bus);
+   priv->base = devfdt_get_addr_ptr(bus);
if (!priv->base)
return -EINVAL;

diff --git a/drivers/spi/mtk_spim.c b/drivers/spi/mtk_spim.c
index a7c0fc59..ebb8ee8e 100644
--- a/drivers/spi/mtk_spim.c
+++ b/drivers/spi/mtk_spim.c
@@ -641,7 +641,7 @@ static int mtk_spim_probe(struct udevice *dev)
struct mtk_spim_priv *priv = dev_get_priv(dev);
int ret;

-   priv->base = (void __iomem *)devfdt_get_addr(dev);
+   priv->base = devfdt_get_addr_ptr(dev);
if (!priv->base)
return -EINVAL;

--
2.20.1

[PATCH v8 20/24] drivers: use devfdt_get_addr_index_ptr when cast to pointer

[Johan Jonker]

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
devfdt_get_addr_index_ptr instead of the devfdt_get_addr_index function
in the various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---

Changed V6:
  use -EINVAL on return
  drop cast
---
 drivers/clk/clk-hsdk-cgu.c|  4 ++--
 drivers/ddr/altera/sdram_gen5.c   |  4 ++--
 drivers/mmc/xenon_sdhci.c |  2 +-
 drivers/net/mvpp2.c   | 24 
 drivers/pci/pcie_dw_mvebu.c   |  4 ++--
 drivers/pci/pcie_imx.c|  4 ++--
 drivers/pci/pcie_layerscape_ep.c  |  8 
 drivers/phy/marvell/comphy_core.c | 12 ++--
 drivers/spi/cadence_qspi.c|  2 +-
 drivers/usb/musb-new/ti-musb.c|  2 +-
 10 files changed, 33 insertions(+), 33 deletions(-)

diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c
index 26b0aa9a..e28543ef 100644
--- a/drivers/clk/clk-hsdk-cgu.c
+++ b/drivers/clk/clk-hsdk-cgu.c
@@ -753,11 +753,11 @@ static int hsdk_cgu_clk_probe(struct udevice *dev)
else
hsdk_clk->map = hsdk_4xd_clk_map;

-   hsdk_clk->cgu_regs = (void __iomem *)devfdt_get_addr_index(dev, 0);
+   hsdk_clk->cgu_regs = devfdt_get_addr_index_ptr(dev, 0);
if (!hsdk_clk->cgu_regs)
return -EINVAL;

-   hsdk_clk->creg_regs = (void __iomem *)devfdt_get_addr_index(dev, 1);
+   hsdk_clk->creg_regs = devfdt_get_addr_index_ptr(dev, 1);
if (!hsdk_clk->creg_regs)
return -EINVAL;

diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c
index 8d3ce495..34d2a278 100644
--- a/drivers/ddr/altera/sdram_gen5.c
+++ b/drivers/ddr/altera/sdram_gen5.c
@@ -567,9 +567,9 @@ static int altera_gen5_sdram_of_to_plat(struct udevice *dev)
 {
struct altera_gen5_sdram_plat *plat = dev_get_plat(dev);

-   plat->sdr = (struct socfpga_sdr *)devfdt_get_addr_index(dev, 0);
+   plat->sdr = devfdt_get_addr_index_ptr(dev, 0);
if (!plat->sdr)
-   return -ENODEV;
+   return -EINVAL;

return 0;
 }
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index 2f880509..16ac84a2 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -537,7 +537,7 @@ static int xenon_sdhci_of_to_plat(struct udevice *dev)
host->ioaddr = dev_read_addr_ptr(dev);

if (device_is_compatible(dev, "marvell,armada-3700-sdhci"))
-   priv->pad_ctrl_reg = (void *)devfdt_get_addr_index(dev, 1);
+   priv->pad_ctrl_reg = devfdt_get_addr_index_ptr(dev, 1);

name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "marvell,pad-type",
   NULL);
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 1bad50d3..a4be8497 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -5349,18 +5349,18 @@ static int mvpp2_base_probe(struct udevice *dev)
}

/* Save base addresses for later use */
-   priv->base = (void *)devfdt_get_addr_index(dev, 0);
-   if (IS_ERR(priv->base))
-   return PTR_ERR(priv->base);
+   priv->base = devfdt_get_addr_index_ptr(dev, 0);
+   if (!priv->base)
+   return -EINVAL;

if (priv->hw_version == MVPP21) {
-   priv->lms_base = (void *)devfdt_get_addr_index(dev, 1);
-   if (IS_ERR(priv->lms_base))
-   return PTR_ERR(priv->lms_base);
+   priv->lms_base = devfdt_get_addr_index_ptr(dev, 1);
+   if (!priv->lms_base)
+   return -EINVAL;
} else {
-   priv->iface_base = (void *)devfdt_get_addr_index(dev, 1);
-   if (IS_ERR(priv->iface_base))
-   return PTR_ERR(priv->iface_base);
+   priv->iface_base = devfdt_get_addr_index_ptr(dev, 1);
+   if (!priv->iface_base)
+   return -EINVAL;

/* Store common base addresses for all ports */
priv->mpcs_base = priv->iface_base + MVPP22_MPCS;
@@ -5399,10 +5399,10 @@ static int mvpp2_probe(struct udevice *dev)
if (priv->hw_version == MVPP21) {
int priv_common_regs_num = 2;

-   port->base = (void __iomem *)devfdt_get_addr_index(
+   port->base = devfdt_get_addr_index_ptr(
dev->parent, priv_common_regs_num + port->id);
-   if (IS_ERR(port->base))
-   return PTR_ERR(port->base);
+   if (!port->base)
+   return -EINVAL;
} else {
port->gop_id = fdtdec_get_int(gd->fdt_

[PATCH v8 19/24] drivers: use devfdt_get_addr_size_index_ptr when cast to pointer

[Johan Jonker]

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
devfdt_get_addr_size_index_ptr instead of the devfdt_get_addr_size_index
function in the various files in the drivers directory that cast to
a pointer.

Signed-off-by: Johan Jonker 
Reviewed-by: Michael Trimarchi 
Reviewed-by: Simon Glass 
---
 drivers/pci/pcie_dw_mvebu.c | 6 +++---
 drivers/spi/cadence_qspi.c  | 3 +--
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c
index a0b82c78..3b2ada54 100644
--- a/drivers/pci/pcie_dw_mvebu.c
+++ b/drivers/pci/pcie_dw_mvebu.c
@@ -569,9 +569,9 @@ static int pcie_dw_mvebu_of_to_plat(struct udevice *dev)
return -EINVAL;

/* Get the config space base address and size */
-   pcie->cfg_base = (void *)devfdt_get_addr_size_index(dev, 1,
->cfg_size);
-   if ((fdt_addr_t)pcie->cfg_base == FDT_ADDR_T_NONE)
+   pcie->cfg_base = devfdt_get_addr_size_index_ptr(dev, 1,
+   >cfg_size);
+   if (!pcie->cfg_base)
return -EINVAL;

return 0;
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index c7f10c50..6a52676a 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -384,8 +384,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus)
ofnode subnode;

plat->regbase = (void *)devfdt_get_addr_index(bus, 0);
-   plat->ahbbase = (void *)devfdt_get_addr_size_index(bus, 1,
-   >ahbsize);
+   plat->ahbbase = devfdt_get_addr_size_index_ptr(bus, 1, >ahbsize);
plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs");
plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128);
plat->fifo_width = dev_read_u32_default(bus, "cdns,fifo-width", 4);
--
2.20.1

[PATCH v8 18/24] drivers: use dev_read_addr_ptr when cast to pointer

[Johan Jonker]

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
dev_read_addr_ptr instead of the dev_read_addr function in the
various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass 
---

Changed V6:
  use -EINVAL on return
  drop cast

Changed V5:
  rebase
  fix typo
  fix more files
---
 arch/arm/mach-mvebu/system-controller.c| 4 ++--
 doc/develop/driver-model/livetree.rst  | 2 +-
 drivers/ata/dwc_ahsata.c   | 2 +-
 drivers/cache/cache-l2x0.c | 2 +-
 drivers/cache/cache-v5l2.c | 2 +-
 drivers/gpio/mscc_sgpio.c  | 2 +-
 drivers/gpio/tegra_gpio.c  | 4 ++--
 drivers/gpio/xilinx_gpio.c | 2 +-
 drivers/i2c/i2c-cdns.c | 4 ++--
 drivers/i2c/tegra_i2c.c| 4 ++--
 drivers/mmc/am654_sdhci.c  | 2 +-
 drivers/mmc/davinci_mmc.c  | 2 +-
 drivers/mmc/piton_mmc.c| 2 +-
 drivers/mmc/tegra_mmc.c| 2 +-
 drivers/mmc/zynq_sdhci.c   | 6 +++---
 drivers/mtd/nand/raw/arasan_nfc.c  | 2 +-
 drivers/mtd/nand/raw/cortina_nand.c| 2 +-
 drivers/mtd/nand/raw/mxic_nand.c   | 2 +-
 drivers/mtd/nand/raw/tegra_nand.c  | 2 +-
 drivers/mtd/nand/raw/zynq_nand.c   | 2 +-
 drivers/net/mvmdio.c   | 2 +-
 drivers/net/qe/dm_qe_uec_phy.c | 2 +-
 drivers/pci/pci-aardvark.c | 4 ++--
 drivers/phy/allwinner/phy-sun50i-usb3.c| 6 +++---
 drivers/phy/qcom/phy-qcom-usb-hs-28nm.c| 4 ++--
 drivers/phy/qcom/phy-qcom-usb-ss.c | 4 ++--
 drivers/phy/rockchip/phy-rockchip-snps-pcie3.c | 4 ++--
 drivers/phy/rockchip/phy-rockchip-typec.c  | 6 +++---
 drivers/pwm/tegra_pwm.c| 2 +-
 drivers/serial/serial_zynq.c   | 6 +++---
 drivers/spi/mpc8xxx_spi.c  | 2 +-
 drivers/spi/mscc_bb_spi.c  | 2 +-
 drivers/spi/sh_qspi.c  | 2 +-
 drivers/spi/spi-mxic.c | 2 +-
 drivers/spi/xilinx_spi.c   | 2 +-
 drivers/ufs/ufs.c  | 2 +-
 drivers/usb/host/ehci-tegra.c  | 2 +-
 drivers/video/dw_mipi_dsi.c| 4 ++--
 drivers/video/rockchip/rk_vop.c| 2 +-
 drivers/video/stm32/stm32_dsi.c| 4 ++--
 drivers/video/stm32/stm32_ltdc.c   | 4 ++--
 drivers/video/tegra124/display.c   | 2 +-
 drivers/video/tegra124/sor.c   | 6 +++---
 drivers/video/ti/tilcdc.c  | 4 ++--
 drivers/watchdog/cdns_wdt.c| 6 +++---
 drivers/watchdog/sp805_wdt.c   | 6 +++---
 drivers/watchdog/xilinx_tb_wdt.c   | 6 +++---
 47 files changed, 75 insertions(+), 75 deletions(-)

diff --git a/arch/arm/mach-mvebu/system-controller.c 
b/arch/arm/mach-mvebu/system-controller.c
index e90aff0c..7cdde11c 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -71,8 +71,8 @@ static int mvebu_reset_of_to_plat(struct udevice *dev)
 {
struct mvebu_reset_data *data = dev_get_priv(dev);

-   data->base = (void *)dev_read_addr(dev);
-   if ((fdt_addr_t)data->base == FDT_ADDR_T_NONE)
+   data->base = dev_read_addr_ptr(dev);
+   if (!data->base)
return -EINVAL;

return 0;
diff --git a/doc/develop/driver-model/livetree.rst 
b/doc/develop/driver-model/livetree.rst
index 579eef5c..20055d55 100644
--- a/doc/develop/driver-model/livetree.rst
+++ b/doc/develop/driver-model/livetree.rst
@@ -103,7 +103,7 @@ The new code is:

 struct udevice *bus;

-i2c_bus->regs = (struct i2c_ctlr *)dev_read_addr(dev);
+i2c_bus->regs = dev_read_addr_ptr(dev);
 plat->frequency = dev_read_u32_default(bus, "spi-max-frequency", 50);

 The dev_read\_...() interface is more convenient and works with both the
diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c
index 167b5a39..6a4d861b 100644
--- a/drivers/ata/dwc_ahsata.c
+++ b/drivers/ata/dwc_ahsata.c
@@ -912,7 +912,7 @@ int dwc_ahsata_probe(struct udevice *dev)
 #endif
uc_priv->host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | ATA_FLAG_NO_ATAPI;
-   uc_priv->mmio_base = (void __iomem *)dev_read_addr(dev);
+   uc_priv->mmio_base = dev_read_addr_ptr(dev);

/* initialize adapter */
ret = ahci_host_init(uc_priv);
diff --git a/drivers/cache/cache-l2x0.c b/drivers/cache/cache-l2x0.c
index a1556fbf..560f4c

[PATCH v8 17/24] drivers: use dev_read_addr_index_ptr when cast to pointer

[Johan Jonker]

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
dev_read_addr_index_ptr instead of the dev_read_addr_index function
in the various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.

Signed-off-by: Johan Jonker 
Reviewed-by: Michael Trimarchi 
---

Changed V6:
  use -EINVAL on return
  drop cast
---
 drivers/mtd/nand/raw/cortina_nand.c |  4 ++--
 drivers/net/dm9000x.c   |  2 +-
 drivers/net/dwmac_meson8b.c |  4 ++--
 drivers/pci/pcie_dw_meson.c |  8 
 drivers/pci/pcie_dw_rockchip.c  |  8 
 drivers/watchdog/sbsa_gwdt.c| 12 ++--
 6 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/mtd/nand/raw/cortina_nand.c 
b/drivers/mtd/nand/raw/cortina_nand.c
index 88798f23..8de35731 100644
--- a/drivers/mtd/nand/raw/cortina_nand.c
+++ b/drivers/mtd/nand/raw/cortina_nand.c
@@ -1175,8 +1175,8 @@ static int fdt_decode_nand(struct udevice *dev, struct 
nand_drv *info)
int ecc_strength;

info->reg = (struct nand_ctlr *)dev_read_addr(dev);
-   info->dma_glb = (struct dma_global *)dev_read_addr_index(dev, 1);
-   info->dma_nand = (struct dma_ssp *)dev_read_addr_index(dev, 2);
+   info->dma_glb = dev_read_addr_index_ptr(dev, 1);
+   info->dma_nand = dev_read_addr_index_ptr(dev, 2);
info->config.enabled = dev_read_enabled(dev);
ecc_strength = dev_read_u32_default(dev, "nand-ecc-strength", 16);
info->flash_base =
diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
index b46bdeb2..bec8d67d 100644
--- a/drivers/net/dm9000x.c
+++ b/drivers/net/dm9000x.c
@@ -651,7 +651,7 @@ static int dm9000_of_to_plat(struct udevice *dev)

pdata->iobase = dev_read_addr_index(dev, 0);
db->base_io = (void __iomem *)pdata->iobase;
-   db->base_data = (void __iomem *)dev_read_addr_index(dev, 1);
+   db->base_data = dev_read_addr_index_ptr(dev, 1);

return 0;
 }
diff --git a/drivers/net/dwmac_meson8b.c b/drivers/net/dwmac_meson8b.c
index ddbaa87d..871171e1 100644
--- a/drivers/net/dwmac_meson8b.c
+++ b/drivers/net/dwmac_meson8b.c
@@ -41,8 +41,8 @@ static int dwmac_meson8b_of_to_plat(struct udevice *dev)
 {
struct dwmac_meson8b_plat *pdata = dev_get_plat(dev);

-   pdata->regs = (void *)dev_read_addr_index(dev, 1);
-   if ((fdt_addr_t)pdata->regs == FDT_ADDR_T_NONE)
+   pdata->regs = dev_read_addr_index_ptr(dev, 1);
+   if (!pdata->regs)
return -EINVAL;

pdata->dwmac_setup = (void *)dev_get_driver_data(dev);
diff --git a/drivers/pci/pcie_dw_meson.c b/drivers/pci/pcie_dw_meson.c
index 07da9fa5..f9537979 100644
--- a/drivers/pci/pcie_dw_meson.c
+++ b/drivers/pci/pcie_dw_meson.c
@@ -337,15 +337,15 @@ static int meson_pcie_parse_dt(struct udevice *dev)
struct meson_pcie *priv = dev_get_priv(dev);
int ret;

-   priv->dw.dbi_base = (void *)dev_read_addr_index(dev, 0);
+   priv->dw.dbi_base = dev_read_addr_index_ptr(dev, 0);
if (!priv->dw.dbi_base)
-   return -ENODEV;
+   return -EINVAL;

dev_dbg(dev, "ELBI address is 0x%p\n", priv->dw.dbi_base);

-   priv->meson_cfg_base = (void *)dev_read_addr_index(dev, 1);
+   priv->meson_cfg_base = dev_read_addr_index_ptr(dev, 1);
if (!priv->meson_cfg_base)
-   return -ENODEV;
+   return -EINVAL;

dev_dbg(dev, "CFG address is 0x%p\n", priv->meson_cfg_base);

diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index 9322e735..624ca1cb 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -353,15 +353,15 @@ static int rockchip_pcie_parse_dt(struct udevice *dev)
struct rk_pcie *priv = dev_get_priv(dev);
int ret;

-   priv->dw.dbi_base = (void *)dev_read_addr_index(dev, 0);
+   priv->dw.dbi_base = dev_read_addr_index_ptr(dev, 0);
if (!priv->dw.dbi_base)
-   return -ENODEV;
+   return -EINVAL;

dev_dbg(dev, "DBI address is 0x%p\n", priv->dw.dbi_base);

-   priv->apb_base = (void *)dev_read_addr_index(dev, 1);
+   priv->apb_base = dev_read_addr_index_ptr(dev, 1);
if (!priv->apb_base)
-   return -ENODEV;
+   return -EINVAL;

dev_dbg(dev, "APB address is 0x%p\n", priv->apb_base);

diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c
index f43cd3fd..96d04665 100644
--- a/drivers/watchdog/sbsa_gwdt.c
+++ b/drivers/watchdog/sbsa_gwdt.c
@@ -98,13 +98,13 @@ static int sbsa_gwdt_of_to_plat(struct udevice *dev)
 {
struct sbsa_gwdt_priv *priv = dev_get_priv(dev);

-   priv->reg_control = (void __