Re: [U-Boot] i.MX6 DRAM_RESET documentation
-Original Message- From: Troy Kisky [mailto:troy.ki...@boundarydevices.com] Sent: Wednesday, July 17, 2013 5:59 AM To: Fabio Estevam Cc: Liu Hui-R64343; Benoît Thébaudeau; u-boot@lists.denx.de Subject: i.MX6 DRAM_RESET documentation Hi All I have a strange issue that maybe you can help explain. Under u-boot during a tftp transfer, we have some boards that show timeouts on our latest build, and 1 board where ethernet doesn't work at all on the latest build. These boards work with an older rev of software. I was able to compare the two versions until I found the relevant change that caused the problem. It was the setting for IOMUXC_SW_PAD_CTL_PAD_DRAM_RESET. The working code uses a value of 00b for this field. When I changed it to 11b, things broke. In the documentation, this register is defined differently for mx6q vs mv6solo/duallite. The duallite way works for the quad, and either way works for the duallite. board/boundary/nitrogen6x/ddr-setup.cfg:DATA 4, MX6_IOM_DRAM_RESET, 0x000e0030 board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg:DATA 4 0x020e057c 0x00020030 Who's right? And should it depend on quad vs duallite ? Currently, I believe that the duallite documentation is correct for all. Both are not correct. The MMDC owner has known about this doc issue and will Update them later. The correct is: 00 is the only valid data, others will be Reserved. Thanks Troy IMX6DQRM-04-2013.pdf has the field defined as below IOMUXC_SW_PAD_CTL_PAD_DRAM_RESET field descriptions 31–20 : This read-only field is reserved and always has the value 0. 19–18 : DDR Select Field Select one of next values for pad: DRAM_RESET. 00 RESERVED0 — Reserved 01 RESERVED1 — Reserved 10 LPDDR2 — LPDDR2 mode (240 Ohm driver unit calibration, 240, 120, 80, 60, 48, 40, 32 Ohm drive strengths at 1.2V) 11 DDR3 — DDR3 mode (240 Ohm driver unit calibration, 240, 120, 80, 60, 48, 40, 32 Ohm drive strengths at 1.5V) ___ mx6solo-Reference Manual Addendum Rev A.2.pdf has the field defined as below IOMUXC_IOMUXC_SW_PAD_CTL_PAD_DRAM_RESET field descriptions Field Description 31–22 : This field is reserved. 21–20 : DO_TRIM Read Only Field 0 0 19–18 : DDR Select Field Select one out of next values for pad: DRAM_RESET. 00 LPDDR1 / DDR3 / (DDR2 ODT) modes 01 DDR2 driver mode 10 LPDDR2 mode 11 Reserved ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] ARM: imx: Fix incorrect usage of CONFIG_SYS_MMC_ENV_PART
-Original Message-
From: Fabio Estevam [mailto:feste...@gmail.com]
Sent: Wednesday, June 05, 2013 9:06 AM
To: sba...@denx.de
Cc: Fleming Andy-AFLEMING; swar...@nvidia.com; Liu Hui-R64343; u-
b...@lists.denx.de; Estevam Fabio-R49496
Subject: [PATCH v3] ARM: imx: Fix incorrect usage of
CONFIG_SYS_MMC_ENV_PART
From: Fabio Estevam fabio.este...@freescale.com
When running the save command several times on a mx6qsabresd we see:
U-Boot save
Saving Environment to MMC...
Writing to MMC(1)... done
U-Boot save
Saving Environment to MMC...
MMC partition switch failed
U-Boot save
Saving Environment to MMC...
Writing to MMC(1)... done
U-Boot save
Saving Environment to MMC...
MMC partition switch failed
U-Boot save
Saving Environment to MMC...
Writing to MMC(1)... done
U-Boot save
Saving Environment to MMC...
MMC partition switch failed
This issue is caused by the incorrect usage of CONFIG_SYS_MMC_ENV_PART.
CONFIG_SYS_MMC_ENV_PART should be used to specify the mmc partition that
stores the environment variables.
On some imx boards it is been incorrectly used to pass the partition of
kernel and dtb files for the 'mmcpart' script variable.
Remove the CONFIG_SYS_MMC_ENV_PART usage and configure the 'mmcpart'
variable directly.
Reported-by: Jason Liu r64...@freescale.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Acked-by: Jason Liu r64...@freescale.com
Changes since v2:
- Fix in the config files by removing CONFIG_SYS_MMC_ENV_PART Changes
since v1:
- Do the change inside the mmc core
include/configs/mx53ard.h | 3 +--
include/configs/mx6qsabre_common.h | 2 +-
include/configs/mx6qsabreauto.h| 1 -
include/configs/mx6qsabresd.h | 1 -
include/configs/wandboard.h| 3 +--
5 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h index
41974b1..b0a965f 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -118,7 +118,7 @@
boot_fdt=try\0 \
ip_dyn=yes\0 \
mmcdev= __stringify(CONFIG_SYS_MMC_ENV_DEV) \0 \
- mmcpart= __stringify(CONFIG_SYS_MMC_ENV_PART) \0 \
+ mmcpart=2\0 \
mmcroot=/dev/mmcblk0p3 rootwait rw\0 \
update_sd_firmware_filename=u-boot.imx\0 \
update_sd_firmware= \
@@ -240,7 +240,6 @@
#define CONFIG_ENV_SIZE(8 * 1024)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV0
-#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_OF_LIBFDT
diff --git a/include/configs/mx6qsabre_common.h
b/include/configs/mx6qsabre_common.h
index 7298a76..bfaa420 100644
--- a/include/configs/mx6qsabre_common.h
+++ b/include/configs/mx6qsabre_common.h
@@ -97,7 +97,7 @@
fdt_high=0x\0 \
initrd_high=0x\0 \
mmcdev= __stringify(CONFIG_SYS_MMC_ENV_DEV) \0 \
- mmcpart= __stringify(CONFIG_SYS_MMC_ENV_PART) \0 \
+ mmcpart=1\0 \
mmcroot= CONFIG_MMCROOT rootwait rw\0 \
update_sd_firmware= \
if test ${ip_dyn} = yes; then \
diff --git a/include/configs/mx6qsabreauto.h
b/include/configs/mx6qsabreauto.h index 1583c11..f2ff3e1 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -35,7 +35,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV0
-#define CONFIG_SYS_MMC_ENV_PART 1 /* Boot partition 1 */
#endif
#endif /* __MX6QSABREAUTO_CONFIG_H */
diff --git a/include/configs/mx6qsabresd.h
b/include/configs/mx6qsabresd.h index 3b8d752..44f07cb 100644
--- a/include/configs/mx6qsabresd.h
+++ b/include/configs/mx6qsabresd.h
@@ -29,7 +29,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 3
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV1 /* SDHC3 */
-#define CONFIG_SYS_MMC_ENV_PART 1 /* Boot partition 1 */
#endif
#endif /* __MX6QSABRESD_CONFIG_H */
diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index d4ac086..34a8f15 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -116,7 +116,7 @@
boot_fdt=try\0 \
ip_dyn=yes\0 \
mmcdev= __stringify(CONFIG_SYS_MMC_ENV_DEV) \0 \
- mmcpart= __stringify(CONFIG_SYS_MMC_ENV_PART) \0 \
+ mmcpart=2\0 \
mmcroot=/dev/mmcblk0p3 rootwait rw\0 \
update_sd_firmware_filename=u-boot.imx\0 \
update_sd_firmware= \
@@ -230,7 +230,6 @@
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV0
-#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
--
1.8.1.2
ts
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Re: [U-Boot] [PATCH 0/5] vybrid: Add vybrid CPU and vf600 tower board support
-Original Message- From: Wang Huan-B18965 Sent: Friday, April 12, 2013 2:54 PM To: u-boot@lists.denx.de Cc: sba...@denx.de; Liu Hui-R64343; Estevam Fabio-R49496 Subject: [PATCH 0/5] vybrid: Add vybrid CPU and vf600 tower board support This series contains the support for vybrid CPU and vf600 tower board. The Vybrid devices are a family of Freescale's latest Dual Single Core offering with ARM Cortex A5 and CM4 based processors for Advanced Connected Radio, Entry Infotainment, and Cluster as well as high end industrial and general purpose applications. Alison Wang (5): vybrid: add vybrid CPU support vybrid: add Freescale vybrid vf600 tower board support vybrid: add uart driver support vybrid: add eSDHC driver support vybrid: add ethernet driver support Typically, the sequence for the new CPU/board support is: - CPU MSL support (clock/iomux/gpio/low level init/ - Driver support, - Board support, Jason Liu Makefile | 8 ++ arch/arm/cpu/armv7/vybrid-common/Makefile| 46 +++ arch/arm/cpu/armv7/vybrid-common/cpu.c | 127 ++ arch/arm/cpu/armv7/vybrid-common/speed.c | 37 + arch/arm/cpu/armv7/vybrid-common/timer.c | 140 +++ arch/arm/cpu/armv7/vybrid/Makefile | 45 +++ arch/arm/cpu/armv7/vybrid/asm-offsets.c | 70 ++ arch/arm/cpu/armv7/vybrid/clock.c| 278 ++ arch/arm/cpu/armv7/vybrid/iomux.c| 42 ++ arch/arm/cpu/armv7/vybrid/lowlevel_init.S| 128 ++ arch/arm/cpu/armv7/vybrid/soc.c | 42 ++ arch/arm/include/asm/arch-vybrid/clock.h | 41 ++ arch/arm/include/asm/arch-vybrid/iomux.h | 323 arch/arm/include/asm/arch-vybrid/serial-vybrid.h | 213 + arch/arm/include/asm/arch-vybrid/sys_proto.h | 30 + arch/arm/include/asm/arch-vybrid/timer.h | 405 +++ arch/arm/include/asm/arch-vybrid/vybrid-pins.h | 88 arch/arm/include/asm/arch-vybrid/vybrid-regs.h | 735 arch/arm/include/asm/fec.h | 302 + arch/arm/include/asm/global_data.h | 3 + arch/arm/include/asm/mach-types.h| 56 arch/arm/include/asm/u-boot.h| 3 + board/freescale/vybrid/Makefile | 40 ++ board/freescale/vybrid/vybrid.c | 488 ++ board/freescale/vybrid/vybridimage.cfg | 44 ++ boards.cfg | 2 + drivers/mmc/fsl_esdhc.c | 4 +- drivers/net/mcffec.c | 18 ++- drivers/net/mcfmii.c | 5 +- drivers/serial/Makefile | 1 + drivers/serial/serial.c | 2 + drivers/serial/serial_vybrid.c | 129 ++ include/configs/vybrid.h | 284 +++ include/configs/vybrid_iram.h| 284 +++ 34 files changed, 4455 insertions(+), 8 deletions(-) create mode 100644 arch/arm/cpu/armv7/vybrid-common/Makefile create mode 100644 arch/arm/cpu/armv7/vybrid-common/cpu.c create mode 100644 arch/arm/cpu/armv7/vybrid-common/speed.c create mode 100644 arch/arm/cpu/armv7/vybrid-common/timer.c create mode 100644 arch/arm/cpu/armv7/vybrid/Makefile create mode 100644 arch/arm/cpu/armv7/vybrid/asm-offsets.c create mode 100644 arch/arm/cpu/armv7/vybrid/clock.c create mode 100644 arch/arm/cpu/armv7/vybrid/iomux.c create mode 100644 arch/arm/cpu/armv7/vybrid/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/vybrid/soc.c create mode 100644 arch/arm/include/asm/arch-vybrid/clock.h create mode 100644 arch/arm/include/asm/arch-vybrid/iomux.h create mode 100644 arch/arm/include/asm/arch-vybrid/serial-vybrid.h create mode 100644 arch/arm/include/asm/arch-vybrid/sys_proto.h create mode 100644 arch/arm/include/asm/arch-vybrid/timer.h create mode 100644 arch/arm/include/asm/arch-vybrid/vybrid-pins.h create mode 100644 arch/arm/include/asm/arch-vybrid/vybrid-regs.h create mode 100644 arch/arm/include/asm/fec.h create mode 100644 board/freescale/vybrid/Makefile create mode 100644 board/freescale/vybrid/vybrid.c create mode 100644 board/freescale/vybrid/vybridimage.cfg create mode 100644 drivers/serial/serial_vybrid.c create mode 100644 include/configs/vybrid.h create mode 100644 include/configs/vybrid_iram.h
Re: [U-Boot] [PATCH 3/3] ARM: mx6: use common CPU errata config options
-Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Stephen Warren Sent: Wednesday, February 27, 2013 6:28 AM To: Tom Warren Cc: u-boot@lists.denx.de; Stephen Warren Subject: [U-Boot] [PATCH 3/3] ARM: mx6: use common CPU errata config options From: Stephen Warren swar...@nvidia.com Now that U-Boot has common CONFIG_ options to work around some ARM CPU errata, enable the relevant options on MX6, and remove the custom lowlevel_init.S, since it's just duplicated code now. Signed-off-by: Stephen Warren swar...@nvidia.com --- arch/arm/cpu/armv7/Makefile|2 +- arch/arm/cpu/armv7/mx6/Makefile|1 - arch/arm/cpu/armv7/mx6/lowlevel_init.S | 35 arch/arm/cpu/armv7/mx6/soc.c |4 include/configs/mx6_common.h | 23 + include/configs/mx6qarm2.h |3 +++ include/configs/mx6qsabre_common.h |3 +++ include/configs/mx6qsabrelite.h|3 +++ 8 files changed, 37 insertions(+), 37 deletions(-) delete mode 100644 arch/arm/cpu/armv7/mx6/lowlevel_init.S create mode 100644 include/configs/mx6_common.h Acked-by: Jason Liu r64...@freescale.com diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index ee8c2b3..4668b3c 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -32,7 +32,7 @@ COBJS+= cache_v7.o COBJS += cpu.o COBJS += syslib.o -ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_T EGRA),) +ifneq +($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_ TEGRA)$(C +ONFIG_MX6),) SOBJS += lowlevel_init.o endif diff --git a/arch/arm/cpu/armv7/mx6/Makefile b/arch/arm/cpu/armv7/mx6/Makefile index cbce411..4f9ca68 100644 --- a/arch/arm/cpu/armv7/mx6/Makefile +++ b/arch/arm/cpu/armv7/mx6/Makefile @@ -28,7 +28,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o COBJS = soc.o clock.o -SOBJS = lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S deleted file mode 100644 index 7b60ca7..000 [..] -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/6] i.MX6: Add DDR controller registers
-Original Message- From: Eric Nelson [mailto:eric.nel...@boundarydevices.com] Sent: Monday, February 18, 2013 3:24 AM To: u-boot@lists.denx.de Cc: sba...@denx.de; Liu Hui-R64343; Estevam Fabio-R49496; troy.ki...@boundarydevices.com; Eric Nelson Subject: [PATCH 6/6] i.MX6: Add DDR controller registers Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com --- arch/arm/include/asm/arch-mx6/mx6-ddr.h | 85 + arch/arm/include/asm/arch-mx6/mx6dl-ddr.h | 71 arch/arm/include/asm/arch-mx6/mx6q-ddr.h | 69 +++ 3 files changed, 225 insertions(+) create mode 100644 arch/arm/include/asm/arch-mx6/mx6-ddr.h create mode 100644 arch/arm/include/asm/arch-mx6/mx6dl-ddr.h create mode 100644 arch/arm/include/asm/arch-mx6/mx6q-ddr.h I did not see any user of these files, what the purpose of this? diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h b/arch/arm/include/asm/arch-mx6/mx6-ddr.h new file mode 100644 index 000..4d18ede --- /dev/null +++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2012 Boundary Devices Inc. Either 2013 or 2012 - 2013? + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License +along + * with this program; if not, write to the Free Software Foundation, +Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ +#ifndef __ASM_ARCH_MX6_DDR_H__ +#define __ASM_ARCH_MX6_DDR_H__ + +#ifdef CONFIG_MX6Q +#include mx6q-ddr.h +#else +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) #include +mx6dl-ddr.h +#else +#error Please select cpu +#endif/* CONFIG_MX6DL or CONFIG_MX6S */ +#endif/* CONFIG_MX6Q */ + +#define MMDC_P0_MDCTL 0x021b I also prefer to add MX6_ prefix, +#define MMDC_P0_MDPDC 0x021b0004 +#define MMDC_P0_MDOTC 0x021b0008 +#define MMDC_P0_MDCFG00x021b000c +#define MMDC_P0_MDCFG10x021b0010 +#define MMDC_P0_MDCFG20x021b0014 +#define MMDC_P0_MDMISC0x021b0018 +#define MMDC_P0_MDSCR 0x021b001c +#define MMDC_P0_MDREF 0x021b0020 +#define MMDC_P0_MDRWD 0x021b002c +#define MMDC_P0_MDOR 0x021b0030 +#define MMDC_P0_MDASP 0x021b0040 +#define MMDC_P0_MAPSR 0x021b0404 +#define MMDC_P0_MPZQHWCTRL0x021b0800 +#define MMDC_P0_MPWLDECTRL0 0x021b080c +#define MMDC_P0_MPWLDECTRL1 0x021b0810 +#define MMDC_P0_MPODTCTRL 0x021b0818 +#define MMDC_P0_MPRDDQBY0DL 0x021b081c +#define MMDC_P0_MPRDDQBY1DL 0x021b0820 +#define MMDC_P0_MPRDDQBY2DL 0x021b0824 +#define MMDC_P0_MPRDDQBY3DL 0x021b0828 +#define MMDC_P0_MPDGCTRL0 0x021b083c +#define MMDC_P0_MPDGCTRL1 0x021b0840 +#define MMDC_P0_MPRDDLCTL 0x021b0848 +#define MMDC_P0_MPWRDLCTL 0x021b0850 +#define MMDC_P0_MPMUR00x021b08b8 + +#define MMDC_P1_MDCTL 0x021b4000 +#define MMDC_P1_MDPDC 0x021b4004 +#define MMDC_P1_MDOTC 0x021b4008 +#define MMDC_P1_MDCFG00x021b400c +#define MMDC_P1_MDCFG10x021b4010 +#define MMDC_P1_MDCFG20x021b4014 +#define MMDC_P1_MDMISC0x021b4018 +#define MMDC_P1_MDSCR 0x021b401c +#define MMDC_P1_MDREF 0x021b4020 +#define MMDC_P1_MDRWD 0x021b402c +#define MMDC_P1_MDOR 0x021b4030 +#define MMDC_P1_MDASP 0x021b4040 +#define MMDC_P1_MAPSR 0x021b4404 +#define MMDC_P1_MPZQHWCTRL0x021b4800 +#define MMDC_P1_MPWLDECTRL0 0x021b480c +#define MMDC_P1_MPWLDECTRL1 0x021b4810 +#define MMDC_P1_MPODTCTRL 0x021b4818 +#define MMDC_P1_MPRDDQBY0DL 0x021b481c +#define MMDC_P1_MPRDDQBY1DL 0x021b4820 +#define MMDC_P1_MPRDDQBY2DL 0x021b4824 +#define MMDC_P1_MPRDDQBY3DL 0x021b4828 +#define MMDC_P1_MPDGCTRL0 0x021b483c +#define MMDC_P1_MPDGCTRL1 0x021b4840 +#define MMDC_P1_MPRDDLCTL 0x021b4848 +#define MMDC_P1_MPWRDLCTL 0x021b4850 +#define MMDC_P1_MPMUR00x021b48b8 Ditto, + +#endif/*__ASM_ARCH_MX6_DDR_H__ */ diff --git a/arch/arm/include/asm/arch-mx6/mx6dl-ddr.h b/arch/arm/include/asm/arch-mx6/mx6dl-ddr.h new file mode 100644 index 000..02c272d --- /dev/null +++ b/arch/arm/include/asm/arch-mx6/mx6dl-ddr.h @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2012 Boundary Devices Inc. Either 2013 or 2012 - 2013? + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU
Re: [U-Boot] [PATCH 5/6] i.MX6DL: define IOMUX pads NANDF_CS1-3 for use as GPIO
-Original Message-
From: Eric Nelson [mailto:eric.nel...@boundarydevices.com]
Sent: Monday, February 18, 2013 3:24 AM
To: u-boot@lists.denx.de
Cc: sba...@denx.de; Liu Hui-R64343; Estevam Fabio-R49496;
troy.ki...@boundarydevices.com; Eric Nelson
Subject: [PATCH 5/6] i.MX6DL: define IOMUX pads NANDF_CS1-3 for use as
GPIO
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
Acked-by: Jason Liu r64...@freescale.com
---
arch/arm/include/asm/arch-mx6/mx6dl_pins.h |3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
index 0395357..9494e41 100644
--- a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
@@ -105,6 +105,9 @@ enum {
MX6_PAD_KEY_COL3__GPIO_4_12 = IOMUX_PAD(0x0638,
0x0250, 5, 0x, 0, 0),
MX6_PAD_KEY_ROW3__I2C2_SDA = IOMUX_PAD(0x064C,
0x0264, 4 | IOMUX_CONFIG_SION, 0x0874, 1, 0),
MX6_PAD_KEY_ROW3__GPIO_4_13 = IOMUX_PAD(0x064C,
0x0264, 5, 0x, 0, 0),
+ MX6_PAD_NANDF_CS1__GPIO_6_14=
IOMUX_PAD(0x0660, 0x0278, 5, 0x, 0, 0),
+ MX6_PAD_NANDF_CS2__GPIO_6_15=
IOMUX_PAD(0x0664, 0x027C, 5, 0x, 0, 0),
+ MX6_PAD_NANDF_CS3__GPIO_6_16=
IOMUX_PAD(0x0668, 0x0280, 5, 0x, 0, 0),
MX6_PAD_NANDF_D1__GPIO_2_1 = IOMUX_PAD(0x0670,
0x0288, 5, 0x, 0, 0),
MX6_PAD_NANDF_D2__GPIO_2_2 = IOMUX_PAD(0x0674,
0x028C, 5, 0x, 0, 0),
MX6_PAD_NANDF_D3__GPIO_2_3 = IOMUX_PAD(0x0678,
0x0290, 5, 0x, 0, 0),
--
1.7.9.5
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Re: [U-Boot] [PATCH 4/6] i.MX6: crm_regs: define IOMUXC_GPR4/6/7
-Original Message- From: Eric Nelson [mailto:eric.nel...@boundarydevices.com] Sent: Monday, February 18, 2013 3:24 AM To: u-boot@lists.denx.de Cc: sba...@denx.de; Liu Hui-R64343; Estevam Fabio-R49496; troy.ki...@boundarydevices.com; Eric Nelson Subject: [PATCH 4/6] i.MX6: crm_regs: define IOMUXC_GPR4/6/7 Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com --- arch/arm/include/asm/arch-mx6/iomux.h |5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/include/asm/arch-mx6/iomux.h b/arch/arm/include/asm/arch-mx6/iomux.h index d23abd7..57b514f 100644 --- a/arch/arm/include/asm/arch-mx6/iomux.h +++ b/arch/arm/include/asm/arch-mx6/iomux.h @@ -16,6 +16,11 @@ #ifndef __ASM_ARCH_IOMUX_H__ #define __ASM_ARCH_IOMUX_H__ + +#define IOMUXC_GPR4 0x020e0010 +#define IOMUXC_GPR6 0x020e0018 +#define IOMUXC_GPR7 0x020e001c Since this definition located into directory 'arch-mx6', I prefer to add MX6_ prefix, Jason + /* * IOMUXC_GPR13 bit fields */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/6] i.MX6: consolidate pad names for multi-CPU boards
-Original Message-
From: Eric Nelson [mailto:eric.nel...@boundarydevices.com]
Sent: Monday, February 18, 2013 3:24 AM
To: u-boot@lists.denx.de
Cc: sba...@denx.de; Liu Hui-R64343; Estevam Fabio-R49496;
troy.ki...@boundarydevices.com; Eric Nelson
Subject: [PATCH 2/6] i.MX6: consolidate pad names for multi-CPU boards
Rename all i.MX6 pad declarations to MX6_PAD_x, so a board
may support either i.MX6Quad/Dual (MX6Q) or i.MX6Dual-Lite/Solo
(MX6DL) by including the proper header.
Boards mx6qarm2, mx6qsabreauto, mx6qsabrelite, and mx6qsabresd
only support MX6Q, so they include mx6q_pins.h.
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
arch/arm/include/asm/arch-mx6/mx6-pins.h | 31 +
arch/arm/include/asm/arch-mx6/mx6dl_pins.h| 190 +--
arch/arm/include/asm/arch-mx6/mx6q_pins.h | 1671
+
arch/arm/include/asm/arch-mx6/mx6x_pins.h | 1671 -
board/freescale/mx6qarm2/mx6qarm2.c | 78 +-
board/freescale/mx6qsabreauto/mx6qsabreauto.c | 60 +-
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 190 +--
board/freescale/mx6qsabresd/mx6qsabresd.c | 102 +-
8 files changed, 2012 insertions(+), 1981 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx6/mx6-pins.h
create mode 100644 arch/arm/include/asm/arch-mx6/mx6q_pins.h
delete mode 100644 arch/arm/include/asm/arch-mx6/mx6x_pins.h
diff --git a/arch/arm/include/asm/arch-mx6/mx6-pins.h
b/arch/arm/include/asm/arch-mx6/mx6-pins.h
new file mode 100644
index 000..4011268
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx6/mx6-pins.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2012 Boundary Devices Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+#ifndef __ASM_ARCH_MX6_PINS_H__
+#define __ASM_ARCH_MX6_PINS_H__
+
+#ifdef CONFIG_MX6Q
+#include mx6q_pins.h
+#else
+#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
+#include mx6dl_pins.h
+#else
+#error Please select cpu
+#endif/* CONFIG_MX6DL or CONFIG_MX6S */
+#endif/* CONFIG_MX6Q */
+
+#endif/*__ASM_ARCH_MX6_PINS_H__ */
diff --git a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
index 79e2c4f..0395357 100644
--- a/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6dl_pins.h
@@ -50,100 +50,100 @@
#define NO_MUX_I0
#define NO_PAD_I0
enum {
- MX6DL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK =
IOMUX_PAD(0x03B0, 0x009C, 0, 0x, 0, PAD_CTL_DSE_120ohm),
- MX6DL_PAD_DI0_PIN15__IPU1_DI0_PIN15 = IOMUX_PAD(0x03B4,
0x00A0, 0, 0x, 0, PAD_CTL_DSE_120ohm),
- MX6DL_PAD_DI0_PIN2__IPU1_DI0_PIN2 = IOMUX_PAD(0x03B8,
0x00A4, 0, 0x, 0, PAD_CTL_DSE_120ohm),
- MX6DL_PAD_DI0_PIN3__IPU1_DI0_PIN3 = IOMUX_PAD(0x03BC,
0x00A8, 0, 0x, 0, PAD_CTL_DSE_120ohm),
- MX6DL_PAD_DI0_PIN4__GPIO_4_20 = IOMUX_PAD(0x03C0,
0x00AC, 5, 0x, 0, PAD_CTL_DSE_120ohm),
[...]
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c
b/board/freescale/mx6qarm2/mx6qarm2.c
index ee20d4f..ff7f5e8 100644
--- a/board/freescale/mx6qarm2/mx6qarm2.c
+++ b/board/freescale/mx6qarm2/mx6qarm2.c
@@ -23,7 +23,7 @@
#include common.h
#include asm/io.h
#include asm/arch/imx-regs.h
-#include asm/arch/mx6x_pins.h
+#include asm/arch/mx6q_pins.h
Since you have defined mx6-pins.h, why not just include the mx6-pins.h?
If not using mx6-pins.h, then what's the purpose of it?
#include asm/arch/clock.h
#include asm/errno.h
#include asm/gpio.h
@@ -55,53 +55,53 @@ int dram_init(void)
}
iomux_v3_cfg_t const uart4_pads[] = {
- MX6Q_PAD_KEY_COL0__UART4_TXD |
MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6Q_PAD_KEY_ROW0__UART4_RXD |
MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX6_PAD_KEY_COL0__UART4_TXD |
MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX6_PAD_KEY_ROW0__UART4_RXD |
MUX_PAD_CTRL(UART_PAD_CTRL),
};
iomux_v3_cfg_t const usdhc3_pads[] = {
- MX6Q_PAD_SD3_CLK__USDHC3_CLK |
MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6Q_PAD_SD3_CMD__USDHC3_CMD |
MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 |
MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 |
MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 |
MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 |
MUX_PAD_CTRL
Re: [U-Boot] [PATCH 1/6] i.MX6: mx6qsabrelite: indent with tabs
-Original Message- From: Eric Nelson [mailto:eric.nel...@boundarydevices.com] Sent: Monday, February 18, 2013 3:24 AM To: u-boot@lists.denx.de Cc: sba...@denx.de; Liu Hui-R64343; Estevam Fabio-R49496; troy.ki...@boundarydevices.com; Eric Nelson Subject: [PATCH 1/6] i.MX6: mx6qsabrelite: indent with tabs This patch has no functional changes and simply replaces leading spaces with tabs. Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com Acked-by: Jason Liu r64...@freescale.com --- board/freescale/mx6qsabrelite/mx6qsabrelite.c | 106 --- -- 1 file changed, 53 insertions(+), 53 deletions(-) diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c index f010d0c..c6c64c3 100644 --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c @@ -46,12 +46,12 @@ DECLARE_GLOBAL_DATA_PTR; [..] ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 4/6] mx53loco: Add support to dynamically choose between fdt use or not
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de]
On Behalf Of Otavio Salvador
Sent: Wednesday, January 09, 2013 7:58 PM
To: U-Boot Mailing List
Cc: Estevam Fabio-R49496; Otavio Salvador
Subject: [U-Boot] [PATCH v5 4/6] mx53loco: Add support to dynamically
choose between fdt use or not
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v5:
- Change subject
- Reword the warning
Changes in v4:
- Use a warning, instead of error when failing to fetch fdt
- Drop exit use
- Fix netboot
- Use fdt instead of ftd
Changes in v3:
- Add loadfdt
- Use loadfdt
- Call exit to abort script
Changes in v2:
- Allow use of dynamic/static ip
- Allow force use, or not, of fdt
- Change 'auto' to 'try'
include/configs/mx53loco.h | 40
++--
1 file changed, 38 insertions(+), 2 deletions(-)
Acked-by: Jason Liu r64...@freescale.com
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index
996396b..cbc3a82 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -119,6 +119,10 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
script=boot.scr\0 \
uimage=uImage\0 \
+ fdt_file=imx53-qsb.dtb\0 \
+ fdt_addr=0x7100\0 \
+ boot_fdt=try\0 \
+ ip_dyn=yes\0 \
mmcdev=0\0 \
mmcpart=2\0 \
mmcroot=/dev/mmcblk0p3 rw rootwait\0 \ @@ -128,15 +132,47
@@
bootscript=echo Running bootscript from mmc ...; \
source\0 \
loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}
${uimage}\0 \
+ loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr}
${fdt_file}\0 \
mmcboot=echo Booting from mmc ...; \
run mmcargs; \
- bootm\0 \
+ if test ${boot_fdt} = yes; then \
+ if run loadfdt; then \
+ bootm ${loadaddr} - ${fdt_addr}; \
+ else \
+ if test ${boot_fdt} = try; then \
+ bootm; \
+ else \
+ echo WARN: Cannot load the DT; \
+ fi; \
+ fi; \
+ else \
+ bootm; \
+ fi;\0 \
netargs=setenv bootargs console=ttymxc0,${baudrate} \
root=/dev/nfs \
ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0 \
netboot=echo Booting from net ...; \
run netargs; \
- dhcp ${uimage}; bootm\0 \
+ if test ${ip_dyn} = yes; then \
+ setenv get_cmd dhcp; \
+ else \
+ setenv get_cmd tftp; \
+ fi; \
+ ${get_cmd} ${uimage}; \
+ if test ${boot_fdt} = yes; then \
+ if ${get_cmd} ${fdt_addr} ${fdt_file}; then \
+ bootm ${loadaddr} - ${fdt_addr}; \
+ else \
+ if test ${boot_fdt} = try; then \
+ bootm; \
+ else \
+ echo ERROR: Cannot load the DT; \
+ exit; \
+ fi; \
+ fi; \
+ else \
+ bootm; \
+ fi;\0
#define CONFIG_BOOTCOMMAND \
mmc dev ${mmcdev}; if mmc rescan; then \
--
1.7.10.4
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Re: [U-Boot] [PATCH v5 1/6] mx6qsabrelite: Use tabs to environment setting
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de]
On Behalf Of Otavio Salvador
Sent: Wednesday, January 09, 2013 7:58 PM
To: U-Boot Mailing List
Cc: Estevam Fabio-R49496; Otavio Salvador
Subject: [U-Boot] [PATCH v5 1/6] mx6qsabrelite: Use tabs to environment
setting
This rework the environment to use tabs for environment setting as done in
other boards.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- New patch
include/configs/mx6qsabrelite.h | 66 +++
1 file changed, 33 insertions(+), 33 deletions(-)
Acked-by: Jason Liu r64...@freescale.com
diff --git a/include/configs/mx6qsabrelite.h
b/include/configs/mx6qsabrelite.h index 0f6bbb4..ee86f9b 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -152,43 +152,43 @@
#define CONFIG_SYS_TEXT_BASE 0x1780
#define CONFIG_EXTRA_ENV_SETTINGS \
- script=boot.scr\0 \
- uimage=uImage\0 \
+ script=boot.scr\0 \
+ uimage=uImage\0 \
console=ttymxc1\0 \
- fdt_high=0x\0 \
+ fdt_high=0x\0 \
initrd_high=0x\0 \
- mmcdev=0\0 \
- mmcpart=2\0 \
- mmcroot=/dev/mmcblk0p3 rootwait rw\0 \
- mmcargs=setenv bootargs console=${console},${baudrate} \
- root=${mmcroot}\0 \
- loadbootscript= \
- fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0 \
- bootscript=echo Running bootscript from mmc ...; \
- source\0 \
- loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}
${uimage}\0 \
- mmcboot=echo Booting from mmc ...; \
- run mmcargs; \
- bootm\0 \
- netargs=setenv bootargs console=${console},${baudrate} \
- root=/dev/nfs \
- ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0 \
- netboot=echo Booting from net ...; \
- run netargs; \
- dhcp ${uimage}; bootm\0 \
+ mmcdev=0\0 \
+ mmcpart=2\0 \
+ mmcroot=/dev/mmcblk0p3 rootwait rw\0 \
+ mmcargs=setenv bootargs console=${console},${baudrate} \
+ root=${mmcroot}\0 \
+ loadbootscript= \
+ fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0
\
+ bootscript=echo Running bootscript from mmc ...; \
+ source\0 \
+ loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}
${uimage}\0 \
+ mmcboot=echo Booting from mmc ...; \
+ run mmcargs; \
+ bootm\0 \
+ netargs=setenv bootargs console=${console},${baudrate} \
+ root=/dev/nfs \
+ ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0 \
+ netboot=echo Booting from net ...; \
+ run netargs; \
+ dhcp ${uimage}; bootm\0
#define CONFIG_BOOTCOMMAND \
- mmc dev ${mmcdev}; \
- mmc dev ${mmcdev}; if mmc rescan; then \
- if run loadbootscript; then \
- run bootscript; \
- else \
- if run loaduimage; then \
- run mmcboot; \
- else run netboot; \
- fi; \
- fi; \
- else run netboot; fi
+ mmc dev ${mmcdev}; \
+ mmc dev ${mmcdev}; if mmc rescan; then \
+ if run loadbootscript; then \
+ run bootscript; \
+ else \
+ if run loaduimage; then \
+ run mmcboot; \
+ else run netboot; \
+ fi; \
+ fi; \
+ else run netboot; fi
#define CONFIG_ARP_TIMEOUT 200UL
--
1.7.10.4
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Re: [U-Boot] [PATCH v5 6/6] mx6qsabre{auto, sd}: Add support to dynamically choose between fdt use or not
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de]
On Behalf Of Otavio Salvador
Sent: Wednesday, January 09, 2013 7:58 PM
To: U-Boot Mailing List
Cc: Estevam Fabio-R49496; Otavio Salvador
Subject: [U-Boot] [PATCH v5 6/6] mx6qsabre{auto, sd}: Add support to
dynamically choose between fdt use or not
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v5:
- Change subject
- Reword the warning
Changes in v4:
- Use a warning, instead of error when failing to fetch fdt
- Drop exit use
- Fix netboot
- Use fdt instead of ftd
Changes in v3:
- Add loadfdt
- Use loadfdt
- Call exit to abort script
Changes in v2:
- Allow use of dynamic/static ip
- Allow force use, or not, of fdt
- Change 'auto' to 'try'
include/configs/mx6qsabre_common.h | 41
+---
Acked-by: Jason Liu r64...@freescale.com
include/configs/mx6qsabreauto.h|1 +
include/configs/mx6qsabresd.h |1 +
3 files changed, 40 insertions(+), 3 deletions(-)
diff --git a/include/configs/mx6qsabre_common.h
b/include/configs/mx6qsabre_common.h
index bd2fb10..0f0e51f 100644
--- a/include/configs/mx6qsabre_common.h
+++ b/include/configs/mx6qsabre_common.h
@@ -83,6 +83,10 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
script=boot.scr\0 \
uimage=uImage\0 \
+ fdt_file= CONFIG_DEFAULT_FDT_FILE \0 \
+ fdt_addr=0x1100\0 \
+ boot_fdt=try\0 \
+ ip_dyn=yes\0 \
console= CONFIG_CONSOLE_DEV \0 \
fdt_high=0x\0 \
initrd_high=0x\0 \
@@ -96,15 +100,46 @@
bootscript=echo Running bootscript from mmc ...; \
source\0 \
loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}
${uimage}\0 \
- mmcboot=echo Booting from mmc ...; \
+ loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr}
${fdt_file}\0 \
+ mmcboot=echo Booting from mmc ...; \
run mmcargs; \
- bootm\0 \
+ if test ${boot_fdt} = yes; then \
+ if run loadfdt; then \
+ bootm ${loadaddr} - ${fdt_addr}; \
+ else \
+ if test ${boot_fdt} = try; then \
+ bootm; \
+ else \
+ echo WARN: Cannot load the DT; \
+ fi; \
+ fi; \
+ else \
+ bootm; \
+ fi;\0 \
netargs=setenv bootargs console=${console},${baudrate} \
root=/dev/nfs \
ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0 \
netboot=echo Booting from net ...; \
run netargs; \
- dhcp ${uimage}; bootm\0 \
+ if test ${ip_dyn} = yes; then \
+ setenv get_cmd dhcp; \
+ else \
+ setenv get_cmd tftp; \
+ fi; \
+ ${get_cmd} ${uimage}; \
+ if test ${boot_fdt} = yes; then \
+ if ${get_cmd} ${fdt_addr} ${fdt_file}; then \
+ bootm ${loadaddr} - ${fdt_addr}; \
+ else \
+ if test ${boot_fdt} = try; then \
+ bootm; \
+ else \
+ echo WARN: Cannot load the DT; \
+ fi; \
+ fi; \
+ else \
+ bootm; \
+ fi;\0
#define CONFIG_BOOTCOMMAND \
mmc dev ${mmcdev}; \
diff --git a/include/configs/mx6qsabreauto.h
b/include/configs/mx6qsabreauto.h index f1ff201..f4a082a 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -15,6 +15,7 @@
#define CONFIG_MACH_TYPE 3529
#define CONFIG_MXC_UART_BASE UART4_BASE
#define CONFIG_CONSOLE_DEVttymxc3
+#define CONFIG_DEFAULT_FDT_FILE imx6q-sabreauto.dtb
#define CONFIG_MMCROOT/dev/mmcblk0p2
#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
diff --git a/include/configs/mx6qsabresd.h b/include/configs/mx6qsabresd.h
index a1d9285..b64e925 100644
--- a/include/configs/mx6qsabresd.h
+++ b/include/configs/mx6qsabresd.h
@@ -21,6 +21,7 @@
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONSOLE_DEVttymxc0
#define CONFIG_MMCROOT/dev/mmcblk1p2
+#define CONFIG_DEFAULT_FDT_FILE imx6q-sabresd.dtb
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
#include mx6qsabre_common.h
--
1.7.10.4
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Re: [U-Boot] [PATCH v5 5/6] mx6qsabrelite: Add support to dynamically choose between fdt use or not
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de]
On Behalf Of Otavio Salvador
Sent: Wednesday, January 09, 2013 7:58 PM
To: U-Boot Mailing List
Cc: Estevam Fabio-R49496; Otavio Salvador
Subject: [U-Boot] [PATCH v5 5/6] mx6qsabrelite: Add support to dynamically
choose between fdt use or not
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v5:
- Change subject
- Reword the warning
Changes in v4:
- Use a warning, instead of error when failing to fetch fdt
- Drop exit use
- Fix netboot
- Use fdt instead of ftd
Changes in v3:
- Add loadfdt
- Use loadfdt
- Call exit to abort script
Changes in v2:
- Allow use of dynamic/static ip
- Allow force use, or not, of fdt
- Change 'auto' to 'try'
include/configs/mx6qsabrelite.h | 39
+--
1 file changed, 37 insertions(+), 2 deletions(-)
Acked-by: Jason Liu r64...@freescale.com
diff --git a/include/configs/mx6qsabrelite.h
b/include/configs/mx6qsabrelite.h index ee86f9b..fbcab2f 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -157,6 +157,10 @@
console=ttymxc1\0 \
fdt_high=0x\0 \
initrd_high=0x\0 \
+ fdt_file=imx6q-sabrelite.dtb\0 \
+ fdt_addr=0x1100\0 \
+ boot_fdt=try\0 \
+ ip_dyn=yes\0 \
mmcdev=0\0 \
mmcpart=2\0 \
mmcroot=/dev/mmcblk0p3 rootwait rw\0 \ @@ -167,15 +171,46
@@
bootscript=echo Running bootscript from mmc ...; \
source\0 \
loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}
${uimage}\0 \
+ loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr}
${fdt_file}\0 \
mmcboot=echo Booting from mmc ...; \
run mmcargs; \
- bootm\0 \
+ if test ${boot_fdt} = yes; then \
+ if run loadfdt; then \
+ bootm ${loadaddr} - ${fdt_addr}; \
+ else \
+ if test ${boot_fdt} = try; then \
+ bootm; \
+ else \
+ echo WARN: Cannot load the DT; \
+ fi; \
+ fi; \
+ else \
+ bootm; \
+ fi;\0 \
netargs=setenv bootargs console=${console},${baudrate} \
root=/dev/nfs \
ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0 \
netboot=echo Booting from net ...; \
run netargs; \
- dhcp ${uimage}; bootm\0
+ if test ${ip_dyn} = yes; then \
+ setenv get_cmd dhcp; \
+ else \
+ setenv get_cmd tftp; \
+ fi; \
+ ${get_cmd} ${uimage}; \
+ if test ${boot_fdt} = yes; then \
+ if ${get_cmd} ${fdt_addr} ${fdt_file}; then \
+ bootm ${loadaddr} - ${fdt_addr}; \
+ else \
+ if test ${boot_fdt} = try; then \
+ bootm; \
+ else \
+ echo WARN: Cannot load the DT; \
+ fi; \
+ fi; \
+ else \
+ bootm; \
+ fi;\0
#define CONFIG_BOOTCOMMAND \
mmc dev ${mmcdev}; \
--
1.7.10.4
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Re: [U-Boot] [PATCH V4 01/11] imximage: mx53 needs transfer length a multiple of 512
-Original Message-
From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
Sent: Wednesday, November 28, 2012 9:32 AM
To: sba...@denx.de
Cc: dirk.be...@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343;
feste...@gmail.com; Troy Kisky
Subject: [PATCH V4 01/11] imximage: mx53 needs transfer length a multiple
of 512
The mx53 ROM will truncate the length at a multiple of 512.
Transferring too much is not a problem, so round up.
Problem reported by Stefano Babic.
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
Acked-by: Jason Liu r64...@freescale.com
---
tools/imximage.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 63f88b6..7e54e97
100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -494,6 +494,8 @@ static void imximage_print_header(const void *ptr)
}
}
+#define ALIGN(a, b) (((a) + (b) - 1) ~((b) - 1))
+
static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
struct mkimage_params *params)
{
@@ -515,7 +517,13 @@ static void imximage_set_header(void *ptr, struct
stat *sbuf, int ifd,
/* Set the imx header */
(*set_imx_hdr)(imxhdr, dcd_len, params-ep, imxhdr-flash_offset);
- *header_size_ptr = sbuf-st_size + imxhdr-flash_offset;
+ /*
+ * ROM bug alert
+ * mx53 only loads 512 byte multiples.
+ * The remaining fraction of a block bytes would
+ * not be loaded.
+ */
+ *header_size_ptr = ALIGN(sbuf-st_size + imxhdr-flash_offset, 512);
}
int imximage_check_params(struct mkimage_params *params)
--
1.7.9.5
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Re: [U-Boot] [PATCH V4 05/11] imximage: change parameters for set_dcd_val/set_imx_hdr
-Original Message-
From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
Sent: Wednesday, November 28, 2012 9:32 AM
To: sba...@denx.de
Cc: dirk.be...@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343;
feste...@gmail.com; Troy Kisky
Subject: [PATCH V4 05/11] imximage: change parameters for
set_dcd_val/set_imx_hdr
Change 1st argument of set_imx_hdr/set_dcd_val to struct data_src.
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
Acked-by: Jason Liu r64...@freescale.com
---
tools/imximage.c | 41 +
tools/imximage.h |5 +++--
2 files changed, 24 insertions(+), 22 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 3a010a6..ddac95f
100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -116,10 +116,10 @@ static void err_imximage_version(int version)
exit(EXIT_FAILURE);
}
-static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int
lineno,
+static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno,
int fld, uint32_t value, uint32_t off)
{
- dcd_v1_t *dcd_v1 = imxhdr-header.hdr_v1.dcd_table;
+ dcd_v1_t *dcd_v1 = ds-imxhdr-header.hdr_v1.dcd_table;
switch (fld) {
case CFG_REG_SIZE:
@@ -144,10 +144,10 @@ static void set_dcd_val_v1(struct imx_header
*imxhdr, char *name, int lineno,
}
}
-static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int
lineno,
+static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno,
int fld, uint32_t value, uint32_t off)
{
- dcd_v2_t *dcd_v2 = imxhdr-header.hdr_v2.dcd_table;
+ dcd_v2_t *dcd_v2 = ds-imxhdr-header.hdr_v2.dcd_table;
switch (fld) {
case CFG_REG_ADDRESS:
@@ -194,15 +194,15 @@ static void set_dcd_rst_v2(struct imx_header
*imxhdr, uint32_t dcd_len,
dcd_v2-write_dcd_command.param = DCD_COMMAND_PARAM; }
-static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
+static int set_imx_hdr_v1(struct data_src *ds, uint32_t dcd_len,
uint32_t entry_point, uint32_t flash_offset) {
- imx_header_v1_t *hdr_v1 = imxhdr-header.hdr_v1;
+ imx_header_v1_t *hdr_v1 = ds-imxhdr-header.hdr_v1;
flash_header_v1_t *fhdr_v1 = hdr_v1-fhdr;
dcd_v1_t *dcd_v1 = hdr_v1-dcd_table;
uint32_t hdr_base;
uint32_t header_length = (((char *)dcd_v1-
addr_data[dcd_len].addr)
- - ((char *)imxhdr));
+ - ((char *)ds-imxhdr));
/* Set magic number */
fhdr_v1-app_code_barker = APP_CODE_BARKER; @@ -217,19
+217,20 @@ static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t
dcd_len,
/* Security feature are not supported */
fhdr_v1-app_code_csf = 0;
fhdr_v1-super_root_key = 0;
- header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4);
+ header_size_ptr = (uint32_t *)(((char *)ds-imxhdr) +
+ header_length - 4);
return header_length;
}
-static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
+static int set_imx_hdr_v2(struct data_src *ds, uint32_t dcd_len,
uint32_t entry_point, uint32_t flash_offset) {
- imx_header_v2_t *hdr_v2 = imxhdr-header.hdr_v2;
+ imx_header_v2_t *hdr_v2 = ds-imxhdr-header.hdr_v2;
flash_header_v2_t *fhdr_v2 = hdr_v2-fhdr;
uint32_t hdr_base;
uint32_t header_length = (dcd_len) ?
- (char *)hdr_v2-dcd_table.addr_data[dcd_len] -
((char*)imxhdr)
- : offsetof(imx_header_v2_t, dcd_table);
+ (char *)hdr_v2-dcd_table.addr_data[dcd_len] -
+ ((char *)ds-imxhdr) : offsetof(imx_header_v2_t, dcd_table);
/* Set magic number */
fhdr_v2-header.tag = IVT_HEADER_TAG; /* 0xD1 */ @@ -328,7
+329,7 @@ static void print_hdr_v2(struct imx_header *imx_hdr)
printf(Entry Point: %08x\n, (uint32_t)fhdr_v2-entry); }
-static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char
*token,
+static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char
+*token,
char *name, int lineno, int fld, int dcd_len) {
int value;
@@ -345,7 +346,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr,
int32_t cmd, char *token,
exit(EXIT_FAILURE);
}
cmd_ver_first = 1;
- set_hdr_func(imxhdr, imximage_version);
+ set_hdr_func(ds-imxhdr, imximage_version);
break;
case CMD_BOOT_FROM:
g_flash_offset = get_table_entry_id(imximage_bootops,
@@ -360,14 +361,14 @@ static void parse_cfg_cmd(struct imx_header
*imxhdr, int32_t cmd, char *token,
break;
case CMD_DATA:
value = get_cfg_value(token, name, lineno);
- (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len);
+ (*set_dcd_val)(ds, name, lineno, fld, value
Re: [U-Boot] [PATCH V4 06/11] imximage: move set_imx_hdr to struct data_src
-Original Message-
From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
Sent: Wednesday, November 28, 2012 9:32 AM
To: sba...@denx.de
Cc: dirk.be...@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343;
feste...@gmail.com; Troy Kisky
Subject: [PATCH V4 06/11] imximage: move set_imx_hdr to struct data_src
It's better to not let the commit log empty.
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
Acked-by: Jason Liu r64...@freescale.com
---
v3: new patch
---
tools/imximage.c | 13 ++---
tools/imximage.h |1 +
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index ddac95f..30f3c81
100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -67,7 +67,6 @@ static table_entry_t imximage_versions[] = {
static set_dcd_val_t set_dcd_val;
static set_dcd_rst_t set_dcd_rst;
-static set_imx_hdr_t set_imx_hdr;
static uint32_t max_dcd_entries;
static uint32_t *header_size_ptr;
static uint32_t g_flash_offset;
@@ -253,19 +252,19 @@ static int set_imx_hdr_v2(struct data_src *ds,
uint32_t dcd_len,
return header_length;
}
-static void set_hdr_func(struct imx_header *imxhdr, uint32_t
imximage_version)
+static void set_hdr_func(struct data_src *ds, uint32_t
+imximage_version)
{
switch (imximage_version) {
case IMXIMAGE_V1:
set_dcd_val = set_dcd_val_v1;
set_dcd_rst = set_dcd_rst_v1;
- set_imx_hdr = set_imx_hdr_v1;
+ ds-set_imx_hdr = set_imx_hdr_v1;
max_dcd_entries = MAX_HW_CFG_SIZE_V1;
break;
case IMXIMAGE_V2:
set_dcd_val = set_dcd_val_v2;
set_dcd_rst = set_dcd_rst_v2;
- set_imx_hdr = set_imx_hdr_v2;
+ ds-set_imx_hdr = set_imx_hdr_v2;
max_dcd_entries = MAX_HW_CFG_SIZE_V2;
break;
default:
@@ -346,7 +345,7 @@ static void parse_cfg_cmd(struct data_src *ds, int32_t
cmd, char *token,
exit(EXIT_FAILURE);
}
cmd_ver_first = 1;
- set_hdr_func(ds-imxhdr, imximage_version);
+ set_hdr_func(ds, imximage_version);
break;
case CMD_BOOT_FROM:
g_flash_offset = get_table_entry_id(imximage_bootops,
@@ -431,7 +430,7 @@ static int parse_cfg_file(struct imx_header *imxhdr,
char *name,
* by adding VERSION command into it, here need
* set up function ptr group to V1 by default.
*/
- set_hdr_func(imxhdr, IMXIMAGE_V1);
+ set_hdr_func(ds, IMXIMAGE_V1);
fd = fopen(name, r);
if (fd == 0) {
fprintf(stderr, Error: %s - Can't open DCD file\n, name); @@ -
474,7 +473,7 @@ static int parse_cfg_file(struct imx_header *imxhdr, char
*name,
exit(EXIT_FAILURE);
}
/* Set the imx header */
- return (*set_imx_hdr)(ds, dcd_len, entry_point, g_flash_offset);
+ return (*ds.set_imx_hdr)(ds, dcd_len, entry_point, g_flash_offset);
}
static int imximage_check_image_types(uint8_t type) diff --git
a/tools/imximage.h b/tools/imximage.h index 3054d55..f27a2ef 100644
--- a/tools/imximage.h
+++ b/tools/imximage.h
@@ -174,5 +174,6 @@ typedef int (*set_imx_hdr_t)(struct data_src *ds,
uint32_t dcd_len,
struct data_src {
struct imx_header *imxhdr;
+ set_imx_hdr_t set_imx_hdr;
};
#endif /* _IMXIMAGE_H_ */
--
1.7.9.5
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Re: [U-Boot] [PATCH V4 07/11] imximage: move set_dcd_val to struct data_src
-Original Message-
From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
Sent: Wednesday, November 28, 2012 9:32 AM
To: sba...@denx.de
Cc: dirk.be...@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343;
feste...@gmail.com; Troy Kisky
Subject: [PATCH V4 07/11] imximage: move set_dcd_val to struct data_src
It's better to not let the commit log empty.
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
Acked-by: Jason Liu r64...@freescale.com
---
v3: new patch
---
tools/imximage.c |9 -
tools/imximage.h |1 +
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 30f3c81..6d5cfa7
100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -65,7 +65,6 @@ static table_entry_t imximage_versions[] = {
{-1,, (Invalid), },
};
-static set_dcd_val_t set_dcd_val;
static set_dcd_rst_t set_dcd_rst;
static uint32_t max_dcd_entries;
static uint32_t *header_size_ptr;
@@ -256,13 +255,13 @@ static void set_hdr_func(struct data_src *ds,
uint32_t imximage_version) {
switch (imximage_version) {
case IMXIMAGE_V1:
- set_dcd_val = set_dcd_val_v1;
+ ds-set_dcd_val = set_dcd_val_v1;
set_dcd_rst = set_dcd_rst_v1;
ds-set_imx_hdr = set_imx_hdr_v1;
max_dcd_entries = MAX_HW_CFG_SIZE_V1;
break;
case IMXIMAGE_V2:
- set_dcd_val = set_dcd_val_v2;
+ ds-set_dcd_val = set_dcd_val_v2;
set_dcd_rst = set_dcd_rst_v2;
ds-set_imx_hdr = set_imx_hdr_v2;
max_dcd_entries = MAX_HW_CFG_SIZE_V2; @@ -360,7 +359,7
@@ static void parse_cfg_cmd(struct data_src *ds, int32_t cmd, char *token,
break;
case CMD_DATA:
value = get_cfg_value(token, name, lineno);
- (*set_dcd_val)(ds, name, lineno, fld, value, dcd_len);
+ (*ds-set_dcd_val)(ds, name, lineno, fld, value, dcd_len);
if (unlikely(cmd_ver_first != 1))
cmd_ver_first = 0;
break;
@@ -391,7 +390,7 @@ static void parse_cfg_fld(struct data_src *ds, int32_t
*cmd,
return;
value = get_cfg_value(token, name, lineno);
- (*set_dcd_val)(ds, name, lineno, fld, value, *dcd_len);
+ (*ds-set_dcd_val)(ds, name, lineno, fld, value, *dcd_len);
if (fld == CFG_REG_VALUE) {
(*dcd_len)++;
diff --git a/tools/imximage.h b/tools/imximage.h index f27a2ef..444ddce
100644
--- a/tools/imximage.h
+++ b/tools/imximage.h
@@ -175,5 +175,6 @@ typedef int (*set_imx_hdr_t)(struct data_src *ds,
uint32_t dcd_len, struct data_src {
struct imx_header *imxhdr;
set_imx_hdr_t set_imx_hdr;
+ set_dcd_val_t set_dcd_val;
};
#endif /* _IMXIMAGE_H_ */
--
1.7.9.5
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Re: [U-Boot] [PATCH V4 09/11] tools: add parse_helper file
-Original Message-
From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
Sent: Wednesday, November 28, 2012 9:32 AM
To: sba...@denx.de
Cc: dirk.be...@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343;
feste...@gmail.com; Troy Kisky
Subject: [PATCH V4 09/11] tools: add parse_helper file
This file can help you parse
configuration files.
One line is enough. :)
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
Acked-by: Jason Liu r64...@freescale.com
---
tools/Makefile |2 +
tools/parse_helper.c | 173
++
tools/parse_helper.h | 28
3 files changed, 203 insertions(+)
create mode 100644 tools/parse_helper.c create mode 100644
tools/parse_helper.h
diff --git a/tools/Makefile b/tools/Makefile index 686840a..db3b247 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -94,6 +94,7 @@ NOPED_OBJ_FILES-y += aisimage.o NOPED_OBJ_FILES-y
+= kwbimage.o NOPED_OBJ_FILES-y += pblimage.o NOPED_OBJ_FILES-y +=
imximage.o
+NOPED_OBJ_FILES-y += parse_helper.o
NOPED_OBJ_FILES-y += omapimage.o
NOPED_OBJ_FILES-y += mkenvimage.o
NOPED_OBJ_FILES-y += mkimage.o
@@ -208,6 +209,7 @@ $(obj)mkimage$(SFX): $(obj)aisimage.o \
$(obj)fit_image.o \
$(obj)image.o \
$(obj)imximage.o \
+ $(obj)parse_helper.o \
$(obj)kwbimage.o \
$(obj)pblimage.o \
$(obj)md5.o \
diff --git a/tools/parse_helper.c b/tools/parse_helper.c new file mode 100644
index 000..0a5c5f6
--- /dev/null
+++ b/tools/parse_helper.c
@@ -0,0 +1,173 @@
+/*
+ * (C) Copyright 20012 Boundary Devices Inc,
+troy.ki...@boundarydevices.com
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+/* Required to obtain the getline prototype from stdio.h */ #define
+_GNU_SOURCE
+
+#include mkimage.h
+#include image.h
+#include parse_helper.h
+
+int ph_open(struct parse_helper *ph, char *filename) {
+ ph-line = NULL;
+ ph-len = 0;
+ ph-fd = fopen(filename, r);
+ ph-lineno = 0;
+ ph-cmd_started = 0;
+ ph-filename = filename;
+ ph-p = NULL;
+ return (!ph-fd) ? -1 : 0;
+}
+
+void ph_close(struct parse_helper *ph)
+{
+ fclose(ph-fd);
+ ph-fd = NULL;
+}
+
+int ph_skip_separators(struct parse_helper *ph) {
+ int line_no = ph-lineno;
+ char *p = ph-p;
+
+ for (;;) {
+ char c;
+ if (!p) {
+ if (getline(ph-line, ph-len, ph-fd) = 0)
+ return -1;
+ ph-lineno++;
+ p = ph-line;
+ if (ph-cmd_started) {
+ fprintf(stderr, warning: continuing command
on
+ next line, line %s[%d](%s)\n,
+ ph-filename, ph-lineno, p);
+ }
+ }
+ c = *p;
+ if ((c == ' ') || (c == '\t')) {
+ p++;
+ continue;
+ }
+ /* Drop all text starting with '#' as comments */
+ if ((c == '#') || (c == '\r') || (c == '\n')
+ || !c) {
+ p = NULL;
+ continue;
+ }
+ if (c == ';') {
+ if (ph-cmd_started) {
+ fprintf(stderr, Error: command not
+ finished:%s[%d](%s)\n,
+ ph-filename, ph-lineno, p);
+ exit(EXIT_FAILURE);
+ }
+ p++;
+ continue;
+ }
+ if (!ph-cmd_started line_no == ph-lineno) {
+ fprintf(stderr, Error: extra data at end
+ of line %s[%d](%s)\n,
+ ph-filename, ph-lineno, p);
+ exit(EXIT_FAILURE);
+ }
+ ph-p = p;
+ return 0;
+ }
+}
+
+int ph_skip_comma(struct parse_helper *ph) {
+ char *p = ph-p;
+
+ for (;;) {
+ char c = *p++;
+ if ((c == '#') || (c == '\r') || (c == '\n') || !c)
+ return 0;
+ if (c == ',') {
+ ph-p = p;
+ ph_skip_separators(ph);
+ return 1;
+ }
+ if ((c != ' ') (c == '\t'))
+ return 0;
+ }
+}
+
+int ph_get_value(struct parse_helper *ph, uint32_t *pval) {
+ char *endptr;
+ uint32_t value;
+
+ if (ph_skip_separators(ph))
+ return -1;
+ errno = 0;
+ value = strtoul(ph-p, endptr, 16);
+ if (errno || (ph-p == endptr))
+ return -1;
+ *pval = value;
+ ph-p
Re: [U-Boot] [PATCH V4 10/11] imximage: use parse_helper functions
-Original Message-
From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
Sent: Wednesday, November 28, 2012 9:32 AM
To: sba...@denx.de
Cc: dirk.be...@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343;
feste...@gmail.com; Troy Kisky
Subject: [PATCH V4 10/11] imximage: use parse_helper functions
Use parse_helper functions to pulling tokens instead of pushing them.
Remove need for switch statements to process commands.
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
Acked-by: Jason Liu r64...@freescale.com
---
v2: uses file parse_helper added in previous patch changed patch subject,
was cleanup parsing
---
tools/imximage.c | 267 +++---
tools/imximage.h | 17 ++--
2 files changed, 101 insertions(+), 183 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 2f5ee14..5147989
100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -25,9 +25,6 @@
* MA 02111-1307 USA
*/
-/* Required to obtain the getline prototype from stdio.h */ -#define
_GNU_SOURCE
-
#include mkimage.h
#include image.h
#include imximage.h
@@ -70,21 +67,6 @@ static uint32_t g_flash_offset;
static struct image_type_params imximage_params;
-static uint32_t get_cfg_value(char *token, char *name, int linenr) -{
- char *endptr;
- uint32_t value;
-
- errno = 0;
- value = strtoul(token, endptr, 16);
- if (errno || (token == endptr)) {
- fprintf(stderr, Error: %s[%d] - Invalid hex data(%s)\n,
- name, linenr, token);
- exit(EXIT_FAILURE);
- }
- return value;
-}
-
static uint32_t detect_imximage_version(struct imx_header *imx_hdr) {
imx_header_v1_t *hdr_v1 = imx_hdr-header.hdr_v1; @@ -112,53
+94,36 @@ static void err_imximage_version(int version)
exit(EXIT_FAILURE);
}
-static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno,
- int fld, uint32_t value)
+static int set_dcd_val_v1(struct data_src *ds, uint32_t *data)
{
dcd_v1_t *dcd_v1 = ds-imxhdr-header.hdr_v1.dcd_table;
+ uint32_t val = *data++;
- switch (fld) {
- case CFG_REG_SIZE:
- /* Byte, halfword, word */
- if ((value != 1) (value != 2) (value != 4)) {
- fprintf(stderr, Error: %s[%d] -
- Invalid register size (%d)\n,
- name, lineno, value);
- exit(EXIT_FAILURE);
- }
- *ds-p_entry++ = value;
- break;
- case CFG_REG_ADDRESS:
- *ds-p_entry++ = value;
- break;
- case CFG_REG_VALUE:
- *ds-p_entry++ = value;
- dcd_v1-preamble.length = (char *)ds-p_entry
- - (char *)dcd_v1-addr_data[0].type;
- break;
- default:
- break;
-
+ /* Byte, halfword, word */
+ if ((val != 1) (val != 2) (val != 4)) {
+ fprintf(stderr, Error: Invalid register size (%d)\n, val);
+ return -1;
}
+ *ds-p_entry++ = val;
+ *ds-p_entry++ = *data++;
+ *ds-p_entry++ = *data++;
+ dcd_v1-preamble.length = (char *)ds-p_entry - (char *)dcd_v1-
+ addr_data[0].type;
+ return 0;
}
-static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno,
- int fld, uint32_t value)
+static int set_dcd_val_v2(struct data_src *ds, uint32_t *data)
{
uint32_t len;
dcd_v2_t *dcd_v2 = ds-imxhdr-header.hdr_v2.dcd_table;
+ uint32_t val = *data++;
- switch (fld) {
- case CFG_REG_SIZE:
- /* Byte, halfword, word */
- if ((value != 1) (value != 2) (value != 4)) {
- fprintf(stderr, Error: %s[%d] -
- Invalid register size (%d)\n,
- name, lineno, value);
- exit(EXIT_FAILURE);
- }
- if (ds-p_dcd (ds-p_dcd-param == value))
- break;
+ /* Byte, halfword, word */
+ if ((val != 1) (val != 2) (val != 4)) {
+ fprintf(stderr, Error: Invalid register size (%d)\n, val);
+ return -1;
+ }
+ if (!(ds-p_dcd (ds-p_dcd-param == val))) {
if (!ds-p_dcd) {
dcd_v2-header.tag = DCD_HEADER_TAG;
dcd_v2-header.version = DCD_VERSION; @@ -166,24
+131,19 @@ static void set_dcd_val_v2(struct data_src *ds, char *name, int
lineno,
} else {
ds-p_dcd = (write_dcd_command_t *)ds-p_entry;
}
- ds-p_dcd-param = value;
+ ds-p_dcd-param = val;
ds-p_dcd-tag = DCD_COMMAND_TAG;
ds-p_entry = (uint32_t *)(ds-p_dcd + 1);
- break;
- case CFG_REG_ADDRESS:
- *ds-p_entry
Re: [U-Boot] [PATCH V4 11/11] parse_helper: add expression evaluation
-Original Message-
From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
Sent: Wednesday, November 28, 2012 9:32 AM
To: sba...@denx.de
Cc: dirk.be...@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343;
feste...@gmail.com; Troy Kisky
Subject: [PATCH V4 11/11] parse_helper: add expression evaluation
Basic expressions with order precedence is now supported.
ie. (3 + ((1+2*3)/--2 + --5 *(8/4))) is 16.
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
Acked-by: Jason Liu r64...@freescale.com
---
tools/parse_helper.c | 172
+++---
1 file changed, 162 insertions(+), 10 deletions(-)
diff --git a/tools/parse_helper.c b/tools/parse_helper.c index
0a5c5f6..50be832 100644
--- a/tools/parse_helper.c
+++ b/tools/parse_helper.c
@@ -97,20 +97,172 @@ int ph_skip_comma(struct parse_helper *ph)
}
}
+static const char precedence[] = {
+ /* ( + - * /^ | ) */
+ 0, 2, 2, 1, 1, 3, 4, 5, 6
+};
+static const char unary_operations[] = (+-; static const char
+binary_operations[] = +-*/^|);
+
+static uint32_t do_func(uint32_t val1, uint32_t val2, int op) {
+ switch (op) {
+ case 1:
+ return val1 + val2;
+ case 2:
+ return val1 - val2;
+ case 3:
+ return val1 * val2;
+ case 4:
+ return val1 / val2;
+ case 5:
+ return val1 val2;
+ case 6:
+ return val1 ^ val2;
+ case 7:
+ return val1 | val2;
+ }
+ fprintf(stderr, Error: in func %s: val1=%d val2=%d op = %d\n,
+ __func__, val1, val2, op);
+ exit(EXIT_FAILURE);
+}
+
+static int find_op(char c, const char *p) {
+ int i;
+ for (i = 0; ; i++) {
+ if (c == p[i])
+ return i;
+ if (!p[i])
+ break;
+ }
+ return -1;
+}
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
int ph_get_value(struct parse_helper *ph, uint32_t *pval) {
char *endptr;
- uint32_t value;
+ int op_i = 0;
+ int val_i = 0;
+ unsigned char op[16];
+ uint32_t val[16];
+ int unary = 1;
+ char *p;
- if (ph_skip_separators(ph))
- return -1;
- errno = 0;
- value = strtoul(ph-p, endptr, 16);
- if (errno || (ph-p == endptr))
- return -1;
- *pval = value;
- ph-p = endptr;
- return 0;
+ p = ph-p;
+ for (;;) {
+ char c;
+ int i, j;
+ const char *ops = unary ? unary_operations :
binary_operations;
+
+ if (unary) {
+ ph-p = p;
+ if (ph_skip_separators(ph))
+ return -1;
+ p = ph-p;
+ c = *p;
+ } else {
+ for (;;) {
+ c = *p;
+ if ((c != ' ') (c != '\t'))
+ break;
+ p++;
+ }
+ }
+ i = find_op(c, ops);
+ debug(%d,%c,%d:%s\n, i, c, unary, p);
+ if ((i 0) unary) {
+ if (val_i = ARRAY_SIZE(val))
+ return -1;
+ errno = 0;
+ val[val_i++] = strtoul(p, endptr, 16);
+ if (errno || (p == endptr)) {
+ ph-p = p;
+ return -1;
+ }
+ p = endptr;
+ unary = 0;
+ debug(val[%d]=%x,%d,%d\n, val_i - 1, val[val_i - 1],
+ op_i, val_i);
+do_unary:
+ while (op_i) {
+ j = op[op_i - 1];
+ if (!(j 0x80))
+ break;
+ op_i--;
+ val[val_i - 1] = do_func(0,
+ val[val_i - 1], j 0x7f);
+ debug(un:%d,%x,%d,%d\n, val[val_i - 1], j,
+ op_i, val_i);
+ }
+ continue;
+ }
+ if (i 0) {
+ c = 0;
+ i = 8;
+ } else {
+ p++;
+ }
+ if (c == '(') {
+ if (op_i = ARRAY_SIZE(op))
+ return -1;
+ op[op_i++] = i;
+ debug(op[%d]=%x,%d,%d\n, op_i - 1, op[op_i - 1],
+ op_i, val_i);
+ unary = 1;
+ continue;
+ }
+ for (;;) {
+ if (!op_i || unary
Re: [U-Boot] [PATCH V4 02/11] imximage: make header variable length
-Original Message-
From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
Sent: Wednesday, November 28, 2012 9:32 AM
To: sba...@denx.de
Cc: dirk.be...@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343;
feste...@gmail.com; Troy Kisky
Subject: [PATCH V4 02/11] imximage: make header variable length
This makes the dcd table optional as well for v2.
Also, the header offset is no longer
right before the code starts.
Before this patch mx53loco_config produces
00 402000d1 7780 777ffc2c 10 777ffc20 777ffc00
20 777ff800 0004b200 40a001d2 30
049c01cc 5485fa53 3000 5885fa53 ... more DCD table 0001c0 27220200
1c90fd63 0001d0
*
0003f0 0400 000400 ea14 e59ff014
e59ff014 e59ff014
Notice offset 3fc contains 0x400. This
is the header offset. There is no reason for this to be in the file, and I have
removed it.
After this patch we have
00 402000d1 7780 777ffe60 10 777ffe54 777ffe34
20 777ffa34 0004b000 40a001d2 30
049c01cc 5485fa53 3000 5885fa53 ... more DCD table 0001c0 27220200
1c90fd63 ea14 0001d0 e59ff014 e59ff014 e59ff014 e59ff014
Notice the zeros between 0x1cc and 0x3fb have been removed.
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
Acked-by: Jason Liu r64...@freescale.com
---
v4: updated commit log, minor change to rebase on previous patch
v3: other patches split from this one
---
tools/imximage.c | 65 --
tools/imximage.h |4 ++--
2 files changed, 46 insertions(+), 23 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 7e54e97..8457c8e
100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -65,7 +65,6 @@ static table_entry_t imximage_versions[] = {
{-1,, (Invalid), },
};
-static struct imx_header imximage_header; static uint32_t
imximage_version;
static set_dcd_val_t set_dcd_val;
@@ -73,6 +72,9 @@ static set_dcd_rst_t set_dcd_rst; static set_imx_hdr_t
set_imx_hdr; static uint32_t max_dcd_entries; static uint32_t
*header_size_ptr;
+static uint32_t g_flash_offset;
+
+static struct image_type_params imximage_params;
static uint32_t get_cfg_value(char *token, char *name, int linenr) { @@ -
102,8 +104,7 @@ static uint32_t detect_imximage_version(struct imx_header
*imx_hdr)
return IMXIMAGE_V1;
/* Try to detect V2 */
- if ((fhdr_v2-header.tag == IVT_HEADER_TAG)
- (hdr_v2-dcd_table.header.tag == DCD_HEADER_TAG))
+ if (fhdr_v2-header.tag == IVT_HEADER_TAG)
return IMXIMAGE_V2;
return IMXIMAGE_VER_INVALID;
@@ -195,7 +196,7 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr,
uint32_t dcd_len,
dcd_v2-write_dcd_command.param = DCD_COMMAND_PARAM; }
-static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
+static int set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
uint32_t entry_point, uint32_t flash_offset) {
imx_header_v1_t *hdr_v1 = imxhdr-header.hdr_v1; @@ -208,7
+209,7 @@ static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t
dcd_len,
/* Set magic number */
fhdr_v1-app_code_barker = APP_CODE_BARKER;
- hdr_base = entry_point - sizeof(struct imx_header);
+ hdr_base = entry_point - header_length;
fhdr_v1-app_dest_ptr = hdr_base - flash_offset;
fhdr_v1-app_code_jump_vector = entry_point;
@@ -219,14 +220,18 @@ static void set_imx_hdr_v1(struct imx_header
*imxhdr, uint32_t dcd_len,
fhdr_v1-app_code_csf = 0;
fhdr_v1-super_root_key = 0;
header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4);
+ return header_length;
}
-static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
+static int set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
uint32_t entry_point, uint32_t flash_offset) {
imx_header_v2_t *hdr_v2 = imxhdr-header.hdr_v2;
flash_header_v2_t *fhdr_v2 = hdr_v2-fhdr;
uint32_t hdr_base;
+ uint32_t header_length = (dcd_len) ?
+ (char *)hdr_v2-dcd_table.addr_data[dcd_len] -
((char*)imxhdr)
+ : offsetof(imx_header_v2_t, dcd_table);
/* Set magic number */
fhdr_v2-header.tag = IVT_HEADER_TAG; /* 0xD1 */ @@ -235,9
+240,10 @@ static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t
dcd_len,
fhdr_v2-entry = entry_point;
fhdr_v2-reserved1 = fhdr_v2-reserved2 = 0;
- fhdr_v2-self = hdr_base = entry_point - sizeof(struct imx_header);
+ fhdr_v2-self = hdr_base = entry_point - header_length;
- fhdr_v2-dcd_ptr = hdr_base + offsetof(imx_header_v2_t, dcd_table);
+ fhdr_v2-dcd_ptr = (dcd_len) ? hdr_base
+ + offsetof(imx_header_v2_t, dcd_table) : 0;
fhdr_v2-boot_data_ptr
Re: [U-Boot] [PATCH V4 03/11] imximage: remove static imximage_version
-Original Message-
From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
Sent: Wednesday, November 28, 2012 9:32 AM
To: sba...@denx.de
Cc: dirk.be...@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343;
feste...@gmail.com; Troy Kisky
Subject: [PATCH V4 03/11] imximage: remove static imximage_version
This variable does not need to have file scope.
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
Acked-by: Jason Liu r64...@freescale.com
---
tools/imximage.c | 21 +
1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 8457c8e..97e5c4b
100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -65,8 +65,6 @@ static table_entry_t imximage_versions[] = {
{-1,, (Invalid), },
};
-static uint32_t imximage_version;
-
static set_dcd_val_t set_dcd_val;
static set_dcd_rst_t set_dcd_rst;
static set_imx_hdr_t set_imx_hdr;
@@ -254,7 +252,7 @@ static int set_imx_hdr_v2(struct imx_header *imxhdr,
uint32_t dcd_len,
return header_length;
}
-static void set_hdr_func(struct imx_header *imxhdr)
+static void set_hdr_func(struct imx_header *imxhdr, uint32_t
+imximage_version)
{
switch (imximage_version) {
case IMXIMAGE_V1:
@@ -335,6 +333,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr,
int32_t cmd, char *token, {
int value;
static int cmd_ver_first = ~0;
+ uint32_t imximage_version;
switch (cmd) {
case CMD_IMAGE_VERSION:
@@ -346,7 +345,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr,
int32_t cmd, char *token,
exit(EXIT_FAILURE);
}
cmd_ver_first = 1;
- set_hdr_func(imxhdr);
+ set_hdr_func(imxhdr, imximage_version);
break;
case CMD_BOOT_FROM:
g_flash_offset = get_table_entry_id(imximage_bootops,
@@ -419,6 +418,12 @@ static uint32_t parse_cfg_file(struct imx_header
*imxhdr, char *name)
int dcd_len = 0;
int32_t cmd;
+ /*
+ * In order to not change the old imx cfg file
+ * by adding VERSION command into it, here need
+ * set up function ptr group to V1 by default.
+ */
+ set_hdr_func(imxhdr, IMXIMAGE_V1);
fd = fopen(name, r);
if (fd == 0) {
fprintf(stderr, Error: %s - Can't open DCD file\n, name); @@ -
512,16 +517,8 @@ int imximage_vrec_header(struct mkimage_params
*params,
fprintf(stderr, Error: out of memory\n);
exit(EXIT_FAILURE);
}
- /*
- * In order to not change the old imx cfg file
- * by adding VERSION command into it, here need
- * set up function ptr group to V1 by default.
- */
- imximage_version = IMXIMAGE_V1;
/* Be able to detect if the cfg file has no BOOT_FROM tag */
g_flash_offset = FLASH_OFFSET_UNDEFINED;
- set_hdr_func(imxhdr);
-
/* Parse dcd configuration file */
dcd_len = parse_cfg_file(imxhdr, params-imagename);
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4 08/11] imximage: enable word writes for version2 header
-Original Message-
From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
Sent: Wednesday, November 28, 2012 9:32 AM
To: sba...@denx.de
Cc: dirk.be...@googlemail.com; u-boot@lists.denx.de; Liu Hui-R64343;
feste...@gmail.com; Troy Kisky
Subject: [PATCH V4 08/11] imximage: enable word writes for version2 header
Before, only 1 write_dcd_command table was built.
Now, a new table is built when the size changes.
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
Acked-by: Jason Liu r64...@freescale.com
---
v3: moved static variables together
---
tools/imximage.c | 143 ++
tools/imximage.h | 18 +++
2 files changed, 76 insertions(+), 85 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c index 6d5cfa7..2f5ee14
100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -65,8 +65,6 @@ static table_entry_t imximage_versions[] = {
{-1,, (Invalid), },
};
-static set_dcd_rst_t set_dcd_rst;
-static uint32_t max_dcd_entries;
static uint32_t *header_size_ptr;
static uint32_t g_flash_offset;
@@ -115,7 +113,7 @@ static void err_imximage_version(int version) }
static void set_dcd_val_v1(struct data_src *ds, char *name, int lineno,
- int fld, uint32_t value, uint32_t off)
+ int fld, uint32_t value)
{
dcd_v1_t *dcd_v1 = ds-imxhdr-header.hdr_v1.dcd_table;
@@ -128,13 +126,15 @@ static void set_dcd_val_v1(struct data_src *ds, char
*name, int lineno,
name, lineno, value);
exit(EXIT_FAILURE);
}
- dcd_v1-addr_data[off].type = value;
+ *ds-p_entry++ = value;
break;
case CFG_REG_ADDRESS:
- dcd_v1-addr_data[off].addr = value;
+ *ds-p_entry++ = value;
break;
case CFG_REG_VALUE:
- dcd_v1-addr_data[off].value = value;
+ *ds-p_entry++ = value;
+ dcd_v1-preamble.length = (char *)ds-p_entry
+ - (char *)dcd_v1-addr_data[0].type;
break;
default:
break;
@@ -143,16 +143,42 @@ static void set_dcd_val_v1(struct data_src *ds, char
*name, int lineno, }
static void set_dcd_val_v2(struct data_src *ds, char *name, int lineno,
- int fld, uint32_t value, uint32_t off)
+ int fld, uint32_t value)
{
+ uint32_t len;
dcd_v2_t *dcd_v2 = ds-imxhdr-header.hdr_v2.dcd_table;
switch (fld) {
+ case CFG_REG_SIZE:
+ /* Byte, halfword, word */
+ if ((value != 1) (value != 2) (value != 4)) {
+ fprintf(stderr, Error: %s[%d] -
+ Invalid register size (%d)\n,
+ name, lineno, value);
+ exit(EXIT_FAILURE);
+ }
+ if (ds-p_dcd (ds-p_dcd-param == value))
+ break;
+ if (!ds-p_dcd) {
+ dcd_v2-header.tag = DCD_HEADER_TAG;
+ dcd_v2-header.version = DCD_VERSION;
+ ds-p_dcd = dcd_v2-write_dcd_command;
+ } else {
+ ds-p_dcd = (write_dcd_command_t *)ds-p_entry;
+ }
+ ds-p_dcd-param = value;
+ ds-p_dcd-tag = DCD_COMMAND_TAG;
+ ds-p_entry = (uint32_t *)(ds-p_dcd + 1);
+ break;
case CFG_REG_ADDRESS:
- dcd_v2-addr_data[off].addr = cpu_to_be32(value);
+ *ds-p_entry++ = cpu_to_be32(value);
break;
case CFG_REG_VALUE:
- dcd_v2-addr_data[off].value = cpu_to_be32(value);
+ *ds-p_entry++ = cpu_to_be32(value);
+ len = (char *)ds-p_entry - (char *)dcd_v2-header;
+ dcd_v2-header.length = cpu_to_be16(len);
+ len = (char *)ds-p_entry - (char *)ds-p_dcd;
+ ds-p_dcd-length = cpu_to_be16(len);
break;
default:
break;
@@ -160,47 +186,14 @@ static void set_dcd_val_v2(struct data_src *ds, char
*name, int lineno,
}
}
-/*
- * Complete setting up the rest field of DCD of V1
- * such as barker code and DCD data length.
- */
-static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len,
- char *name, int lineno)
-{
- dcd_v1_t *dcd_v1 = imxhdr-header.hdr_v1.dcd_table;
-
- dcd_v1-preamble.barker = DCD_BARKER;
- dcd_v1-preamble.length = dcd_len * sizeof(dcd_type_addr_data_t);
-}
-
-/*
- * Complete setting up the reset field of DCD of V2
- * such as DCD tag, version, length, etc.
- */
-static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
- char *name, int lineno)
-{
- dcd_v2_t
Re: [U-Boot] [PATCH 3/8] mx6qsabrelite: Configure CONFIG_BOOTDELAY to one second
-Original Message- From: Fabio Estevam [mailto:feste...@gmail.com] Sent: Friday, November 16, 2012 11:09 PM To: sba...@denx.de Cc: Liu Hui-R64343; u-boot@lists.denx.de; Estevam Fabio-R49496 Subject: [PATCH 3/8] mx6qsabrelite: Configure CONFIG_BOOTDELAY to one second From: Fabio Estevam fabio.este...@freescale.com One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam fabio.este...@freescale.com Acked-by: Jason Liu r64...@freescale.com --- include/configs/mx6qsabrelite.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 318f857..759275a 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -144,7 +144,7 @@ #undef CONFIG_CMD_IMLS -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_PREBOOT -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/8] mx6qsabre_common: Configure CONFIG_BOOTDELAY to one second
-Original Message- From: Fabio Estevam [mailto:feste...@gmail.com] Sent: Friday, November 16, 2012 11:09 PM To: sba...@denx.de Cc: Liu Hui-R64343; u-boot@lists.denx.de; Estevam Fabio-R49496 Subject: [PATCH 4/8] mx6qsabre_common: Configure CONFIG_BOOTDELAY to one second From: Fabio Estevam fabio.este...@freescale.com One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam fabio.este...@freescale.com Acked-by: Jason Liu r64...@freescale.com --- include/configs/mx6qsabre_common.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h index 50f3b01..b8621b8 100644 --- a/include/configs/mx6qsabre_common.h +++ b/include/configs/mx6qsabre_common.h @@ -76,7 +76,7 @@ #define CONFIG_CMD_BOOTZ #undef CONFIG_CMD_IMLS -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_LOADADDR0x1080 #define CONFIG_SYS_TEXT_BASE 0x1780 -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] mx6qarm2: Enable DCACHE and CONFIG_MMC_BOUNCE_BUFFER
-Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Fabio Estevam Sent: Thursday, October 18, 2012 1:33 AM To: sba...@denx.de Cc: Estevam Fabio-R49496; u-boot@lists.denx.de Subject: [U-Boot] [PATCH 2/2] mx6qarm2: Enable DCACHE and CONFIG_MMC_BOUNCE_BUFFER From: Fabio Estevam fabio.este...@freescale.com Data cache and CONFIG_MMC_BOUNCE_BUFFER can be safely enabled now. Why we need enable CONFIG_MMC_BOUNCE_BUFFER? Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx6qarm2.h |3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 965bea3..b425fed 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -50,6 +50,7 @@ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC +#define CONFIG_MMC_BOUNCE_BUFFER #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION @@ -164,6 +165,4 @@ #define CONFIG_OF_LIBFDT #define CONFIG_CMD_BOOTZ -#define CONFIG_SYS_DCACHE_OFF - #endif/* __CONFIG_H */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] mx6q: Factor out common DDR3 init code
-Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Fabio Estevam Sent: Wednesday, September 12, 2012 2:33 AM To: sba...@denx.de Cc: Estevam Fabio-R49496; u-boot@lists.denx.de Subject: [U-Boot] [PATCH 1/2] mx6q: Factor out common DDR3 init code Factor out common DDR3 initialization code, allowing easier maintainance of such scripts. Are you sure that we can use on DDR3 script to cover 3 kind of boards: ARM2/Sabrelite/SabreSD? Did you do the DDR stress test? Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- .../arm/imx-common/ddr/mx6q_ddr3.cfg |0 board/freescale/mx6qarm2/imximage.cfg | 173 boards.cfg |4 +- 3 files changed, 2 insertions(+), 175 deletions(-) rename board/freescale/mx6qsabrelite/imximage.cfg = arch/arm/imx- common/ddr/mx6q_ddr3.cfg (100%) delete mode 100644 board/freescale/mx6qarm2/imximage.cfg diff --git a/board/freescale/mx6qsabrelite/imximage.cfg b/arch/arm/imx- [...] 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6q: mx6qsabrelite: add GPIO_0__CCM_CLKO and GPIO_3__CCM_CLKO2 pin mux
-Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Dirk Behme Sent: Wednesday, August 01, 2012 7:06 PM To: u-boot@lists.denx.de Cc: Dirk Behme Subject: [U-Boot] [PATCH] mx6q: mx6qsabrelite: add GPIO_0__CCM_CLKO and GPIO_3__CCM_CLKO2 pin mux A recent Linux kernel (= 3.5) has support for the SGTL 5000 sound on the SabreLite board. To make this work, U-Boot has to configure the pin mux for PAD_GPIO_0__CCM_CLKO and PAD_GPIO_3__CCM_CLKO2 correctly. Why this can't be set in the kernel but relies on u-boot to configure it? Jason Taken from Freescale's ER5 U-Boot for the SabreLite. Signed-off-by: Dirk Behme dirk.be...@de.bosch.com CC: Troy Kisky troy.ki...@boundarydevices.com CC: Stefano Babic sba...@denx.de --- board/freescale/mx6qsabrelite/imximage.cfg |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 20/25] iomux-v3: remove include of mx6x_pins.h
-Original Message- From: Troy Kisky [mailto:troy.ki...@boundarydevices.com] Sent: Friday, July 20, 2012 2:18 AM To: u-boot@lists.denx.de; Heiko Schocher; sba...@denx.de Cc: marek.va...@gmail.com; dirk.be...@googlemail.com; Estevam Fabio- R49496; Liu Hui-R64343; Troy Kisky Subject: [PATCH V3 20/25] iomux-v3: remove include of mx6x_pins.h This include is not needed. Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com --- v2: no change --- arch/arm/cpu/armv7/mx6/iomux-v3.c |1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/cpu/armv7/mx6/iomux-v3.c b/arch/arm/cpu/armv7/mx6/iomux-v3.c index 8785532..a0c4b15 100644 --- a/arch/arm/cpu/armv7/mx6/iomux-v3.c +++ b/arch/arm/cpu/armv7/mx6/iomux-v3.c @@ -23,7 +23,6 @@ #include common.h #include asm/io.h #include asm/arch/imx-regs.h -#include asm/arch/mx6x_pins.h #include asm/arch/iomux-v3.h static void *base = (void *)IOMUXC_BASE_ADDR; Acked-by: Jason Liu r64...@freescale.com -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 25/25] mx6qsabrelite: add i2c multi-bus support
-Original Message-
From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
Sent: Friday, July 20, 2012 2:18 AM
To: u-boot@lists.denx.de; Heiko Schocher; sba...@denx.de
Cc: marek.va...@gmail.com; dirk.be...@googlemail.com; Estevam Fabio-
R49496; Liu Hui-R64343; Troy Kisky
Subject: [PATCH V3 25/25] mx6qsabrelite: add i2c multi-bus support
This includes bus recovery support.
It’s better to give a short description about how to do the bus recovery with
this patch.
Signed-off-by: Troy Kisky troy.ki...@boundarydevices.com
---
v2: no change
---
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 50
+++--
include/configs/mx6qsabrelite.h |6 +--
2 files changed, 48 insertions(+), 8 deletions(-)
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index 34f65e9..01e5083 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -28,6 +28,7 @@
#include asm/errno.h
#include asm/gpio.h
#include asm/imx-common/iomux-v3.h
+#include asm/imx-common/mxc_i2c.h
#include mmc.h
#include fsl_esdhc.h
#include micrel.h
@@ -77,9 +78,48 @@ iomux_v3_cfg_t uart2_pads[] = {
MX6Q_PAD_EIM_D27__UART2_RXD |
MUX_PAD_CTRL(UART_PAD_CTRL), };
-iomux_v3_cfg_t i2c3_pads[] = {
- MX6Q_PAD_GPIO_5__I2C3_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL),
- MX6Q_PAD_GPIO_16__I2C3_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL),
+#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
+
+/* I2C1, SGTL5000 */
+struct i2c_pads_info i2c_pad_info0 = {
+ .scl = {
+ .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
+ .gpio_mode = MX6Q_PAD_EIM_D21__GPIO_3_21 | PC,
+ .gp = GPIO_NUMBER(3, 21)
+ },
+ .sda = {
+ .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
+ .gpio_mode = MX6Q_PAD_EIM_D28__GPIO_3_28 | PC,
+ .gp = GPIO_NUMBER(3, 28)
+ }
+};
+
+/* I2C2 Camera, MIPI */
+struct i2c_pads_info i2c_pad_info1 = {
+ .scl = {
+ .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
+ .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO_4_12 | PC,
+ .gp = GPIO_NUMBER(4, 12)
+ },
+ .sda = {
+ .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
+ .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO_4_13 | PC,
+ .gp = GPIO_NUMBER(4, 13)
+ }
+};
+
+/* I2C3, J15 - RGB connector */
+struct i2c_pads_info i2c_pad_info2 = {
+ .scl = {
+ .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC,
+ .gpio_mode = MX6Q_PAD_GPIO_5__GPIO_1_5 | PC,
+ .gp = GPIO_NUMBER(1, 5)
+ },
+ .sda = {
+ .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC,
+ .gpio_mode = MX6Q_PAD_GPIO_16__GPIO_7_11 | PC,
+ .gp = GPIO_NUMBER(7, 11)
+ }
};
iomux_v3_cfg_t usdhc3_pads[] = {
@@ -346,7 +386,9 @@ int board_init(void) #ifdef CONFIG_MXC_SPI
setup_spi();
#endif
- imx_iomux_v3_setup_multiple_pads(i2c3_pads,
ARRAY_SIZE(i2c3_pads));
+ setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, i2c_pad_info0);
+ setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, i2c_pad_info1);
+ setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, i2c_pad_info2);
#ifdef CONFIG_CMD_SATA
setup_sata();
diff --git a/include/configs/mx6qsabrelite.h
b/include/configs/mx6qsabrelite.h index fbd10d6..beb8e3e 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -60,11 +60,9 @@
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
+#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE I2C3_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED10
-#define CONFIG_SYS_I2C_SLAVE0xfe
+#define CONFIG_SYS_I2C_SPEED 10
Acked-by: Jason Liu r64...@freescale.com
/* MMC Configs */
#define CONFIG_FSL_ESDHC
--
1.7.9.5
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Re: [U-Boot] [PATCH] mx6: Avoid writing to read-only bits in imximage.cfg
Hi, Marek, -Original Message- From: Marek Vasut [mailto:ma...@denx.de] Sent: Wednesday, June 13, 2012 7:18 PM To: u-boot@lists.denx.de Cc: Liu Hui-R64343; Dirk Behme; Fabio Estevam Subject: Re: [U-Boot] [PATCH] mx6: Avoid writing to read-only bits in imximage.cfg Dear Liu Hui-R64343, -Original Message- From: Dirk Behme [mailto:dirk.be...@de.bosch.com] Sent: Tuesday, June 12, 2012 11:05 PM To: Fabio Estevam; Liu Hui-R64343 Cc: Vikram Narayanan; u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH] mx6: Avoid writing to read-only bits in imximage.cfg On 12.06.2012 16:50, Vikram Narayanan wrote: If in case this is valid according to the latest datasheet, ignore this patch. -- According to REV C manual, the register IOMUXC_IOMUXC_GPR4 has bits 4 and 5 read-only and the value is always set as zero. So write '0' to these bits instead of writing '1'. Jason, Fabio: What do you think? You should be the datasheet 'masters' ;) Yes, according to the RM, 5 Reserved This read-only field is reserved and always has the value 0. 4 Reserved This read-only field is reserved and always has the value 0. So, write 1 should have no effect. I really dislike how write 1 should have no effect sounds. Can you please check with HW people? Since this is read-only bit, if you write 1 to it, it will have no effect. Yes, to avoid the confusion, for example to do the read-back check, I agree with not writing '1' to the read-only bit. [..] Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6: Avoid writing to read-only bits in imximage.cfg
Hi, Marek, -Original Message- From: Marek Vasut [mailto:ma...@denx.de] Sent: Wednesday, June 13, 2012 8:25 PM To: u-boot@lists.denx.de Cc: Liu Hui-R64343; Dirk Behme Subject: Re: [U-Boot] [PATCH] mx6: Avoid writing to read-only bits in imximage.cfg Dear Liu Hui-R64343, [...] According to REV C manual, the register IOMUXC_IOMUXC_GPR4 has bits 4 and 5 read-only and the value is always set as zero. So write '0' to these bits instead of writing '1'. Jason, Fabio: What do you think? You should be the datasheet 'masters' ;) Yes, according to the RM, 5 Reserved This read-only field is reserved and always has the value 0. 4 Reserved This read-only field is reserved and always has the value 0. So, write 1 should have no effect. I really dislike how write 1 should have no effect sounds. Can you please check with HW people? Since this is read-only bit, if you write 1 to it, it will have no effect. For how long do you work with hardware? Did it never occur to you that when you wrote 1 to an reserved bit, it either did something you didn't expect or you had to rework it later because the new CPU has that bit for something else? Yes, to avoid the confusion, for example to do the read-back check, I agree with not writing '1' to the read-only bit. Please, ask the hardware people about this. Yes, I will and back to you. [..] Best regards, Marek Vasut Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx6: Avoid writing to read-only bits in imximage.cfg
-Original Message- From: Dirk Behme [mailto:dirk.be...@de.bosch.com] Sent: Tuesday, June 12, 2012 11:05 PM To: Fabio Estevam; Liu Hui-R64343 Cc: Vikram Narayanan; u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH] mx6: Avoid writing to read-only bits in imximage.cfg On 12.06.2012 16:50, Vikram Narayanan wrote: If in case this is valid according to the latest datasheet, ignore this patch. -- According to REV C manual, the register IOMUXC_IOMUXC_GPR4 has bits 4 and 5 read-only and the value is always set as zero. So write '0' to these bits instead of writing '1'. Jason, Fabio: What do you think? You should be the datasheet 'masters' ;) Yes, according to the RM, 5 Reserved This read-only field is reserved and always has the value 0. 4 Reserved This read-only field is reserved and always has the value 0. So, write 1 should have no effect. Best regards Dirk Signed-off-by: Vikram Narayanan vikram...@gmail.com Cc: Jason Liu r64...@freescale.com Cc: Dirk Behme dirk.be...@googlemail.com --- board/freescale/mx6qarm2/imximage.cfg |2 +- board/freescale/mx6qsabrelite/imximage.cfg |2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/board/freescale/mx6qarm2/imximage.cfg b/board/freescale/mx6qarm2/imximage.cfg index ceecbf9..bf941a3 100644 --- a/board/freescale/mx6qarm2/imximage.cfg +++ b/board/freescale/mx6qarm2/imximage.cfg @@ -167,7 +167,7 @@ DATA 4 0x020c407c 0x0FC3 DATA 4 0x020c4080 0x03FF # enable AXI cache for VDOA/VPU/IPU -DATA 4 0x020e0010 0xF0FF +DATA 4 0x020e0010 0xF0CF # set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 DATA 4 0x020e0018 0x007F007F DATA 4 0x020e001c 0x007F007F diff --git a/board/freescale/mx6qsabrelite/imximage.cfg b/board/freescale/mx6qsabrelite/imximage.cfg index c389427..62498ab 100644 --- a/board/freescale/mx6qsabrelite/imximage.cfg +++ b/board/freescale/mx6qsabrelite/imximage.cfg @@ -164,7 +164,7 @@ DATA 4 0x020c407c 0x0FC3 DATA 4 0x020c4080 0x03FF # enable AXI cache for VDOA/VPU/IPU -DATA 4 0x020e0010 0xF0FF +DATA 4 0x020e0010 0xF0CF # set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 DATA 4 0x020e0018 0x007F007F DATA 4 0x020e001c 0x007F007F ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 10/10] mx6qsabrelite: Remove unused SOBJS
-Original Message- From: Estevam Fabio-R49496 Sent: Wednesday, May 30, 2012 1:40 AM To: u-boot@lists.denx.de Cc: sba...@denx.de; Estevam Fabio-R49496; Liu Hui-R64343 Subject: [PATCH 10/10] mx6qsabrelite: Remove unused SOBJS There is no .S file in this directory, so just remove SOBJS. Cc: Jason Liu r64...@freescale.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com Acked-by: Jason Liu r64...@freescale.com --- board/freescale/mx6qsabrelite/Makefile |7 +++ 1 files changed, 3 insertions(+), 4 deletions(-) diff --git a/board/freescale/mx6qsabrelite/Makefile b/board/freescale/mx6qsabrelite/Makefile index 53c26e7..cf344e4 100644 --- a/board/freescale/mx6qsabrelite/Makefile +++ b/board/freescale/mx6qsabrelite/Makefile @@ -25,12 +25,11 @@ LIB= $(obj)lib$(BOARD).o COBJS := mx6qsabrelite.o -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB):$(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) +$(LIB):$(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) # -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 09/10] mx6qarm2: Remove unused SOBJS
-Original Message- From: Estevam Fabio-R49496 Sent: Wednesday, May 30, 2012 1:40 AM To: u-boot@lists.denx.de Cc: sba...@denx.de; Estevam Fabio-R49496; Liu Hui-R64343 Subject: [PATCH 09/10] mx6qarm2: Remove unused SOBJS There is no .S file in this directory, so just remove SOBJS. Cc: Jason Liu r64...@freescale.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com Acked-by: Jason Liu r64...@freescale.com --- board/freescale/mx6qarm2/Makefile |7 +++ 1 files changed, 3 insertions(+), 4 deletions(-) diff --git a/board/freescale/mx6qarm2/Makefile b/board/freescale/mx6qarm2/Makefile index 79bc315..6ce4495 100644 --- a/board/freescale/mx6qarm2/Makefile +++ b/board/freescale/mx6qarm2/Makefile @@ -25,12 +25,11 @@ LIB= $(obj)lib$(BOARD).o COBJS := mx6qarm2.o -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) # -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] mx5: Rename mx51_fb_init()
-Original Message-
From: Fabio Estevam [mailto:feste...@gmail.com]
Sent: Friday, May 11, 2012 9:08 AM
To: u-boot@lists.denx.de
Cc: sba...@denx.de; Liu Hui-R64343; Estevam Fabio-R49496
Subject: [PATCH 2/3] mx5: Rename mx51_fb_init()
From: Fabio Estevam fabio.este...@freescale.com
The ipuv3 driver is currently only used on mx51, but it can be extended to
work on mx53 and mx6 as well.
Rename mx51_fb_init(), so that it can be used by other SoCs.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Acked-by: Jason Liu r64...@freescale.com
---
board/freescale/mx51evk/mx51evk.c |2 +-
board/ttcontrol/vision2/vision2.c |2 +-
drivers/video/mxc_ipuv3_fb.c |2 +-
include/ipu_pixfmt.h |2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/freescale/mx51evk/mx51evk.c
b/board/freescale/mx51evk/mx51evk.c
index bc7f057..514a7ac 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -502,7 +502,7 @@ void lcd_iomux(void)
void lcd_enable(void)
{
- int ret = mx51_fb_init(claa_wvga, 1, IPU_PIX_FMT_RGB565);
+ int ret = ipuv3_fb_init(claa_wvga, 1, IPU_PIX_FMT_RGB565);
if (ret)
printf(LCD cannot be configured: %d\n, ret); } diff --git
a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c
index 282de95..d68bef7 100644
--- a/board/ttcontrol/vision2/vision2.c
+++ b/board/ttcontrol/vision2/vision2.c
@@ -604,7 +604,7 @@ void lcd_enable(void)
gpio_set_value(2, 1);
mxc_request_iomux(MX51_PIN_GPIO1_2, IOMUX_CONFIG_ALT0);
- ret = mx51_fb_init(nec_nl6448bc26_09c, 0, IPU_PIX_FMT_RGB666);
+ ret = ipuv3_fb_init(nec_nl6448bc26_09c, 0, IPU_PIX_FMT_RGB666);
if (ret)
puts(LCD cannot be configured\n);
}
diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/mxc_ipuv3_fb.c
index 1bee54c..c38e22d 100644
--- a/drivers/video/mxc_ipuv3_fb.c
+++ b/drivers/video/mxc_ipuv3_fb.c
@@ -599,7 +599,7 @@ void video_set_lut(unsigned int index, /* color
number */
return;
}
-int mx51_fb_init(struct fb_videomode *mode, uint8_t disp, uint32_t pixfmt)
+int ipuv3_fb_init(struct fb_videomode *mode, uint8_t disp, uint32_t
+pixfmt)
{
gmode = mode;
gdisp = disp;
diff --git a/include/ipu_pixfmt.h b/include/ipu_pixfmt.h index
656f605..0019898 100644
--- a/include/ipu_pixfmt.h
+++ b/include/ipu_pixfmt.h
@@ -76,6 +76,6 @@
#define IPU_PIX_FMT_YVU422P fourcc('Y', 'V', '1', '6')/* 16 YVU
4:2:2 */
#define IPU_PIX_FMT_YUV422P fourcc('4', '2', '2', 'P')/* 16 YUV
4:2:2 */
-int mx51_fb_init(struct fb_videomode *mode, uint8_t disp, uint32_t pixfmt);
+int ipuv3_fb_init(struct fb_videomode *mode, uint8_t disp, uint32_t
+pixfmt);
#endif
--
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Re: [U-Boot] [PATCH 3/3] mx53loco: Add LCD support
-Original Message-
From: Fabio Estevam [mailto:feste...@gmail.com]
Sent: Friday, May 11, 2012 9:08 AM
To: u-boot@lists.denx.de
Cc: sba...@denx.de; Liu Hui-R64343; Estevam Fabio-R49496
Subject: [PATCH 3/3] mx53loco: Add LCD support
From: Fabio Estevam fabio.este...@freescale.com
Add support for CLAA07LC0ACW LCD that connects to the mx53loco board.
Configure the board to show the Linux logo on the LCD.
Also increase the size of CONFIG_SYS_MALLOC_LEN variable to take into
account the framebuffer usage.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Acked-by: Jason Liu r64...@freescale.com
---
board/freescale/mx53loco/mx53loco.c | 72
+++
include/configs/mx53loco.h | 13 ++-
2 files changed, 84 insertions(+), 1 deletions(-)
diff --git a/board/freescale/mx53loco/mx53loco.c
b/board/freescale/mx53loco/mx53loco.c
index dec966d..ad9e419 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -39,6 +39,10 @@
#include pmic.h
#include dialog_pmic.h
#include fsl_pmic.h
+#include linux/fb.h
+#include ipu_pixfmt.h
+
+#define MX53LOCO_LCD_POWER(2 * 32 + 24) /* GPIO3_24 */
DECLARE_GLOBAL_DATA_PTR;
@@ -402,10 +406,74 @@ static void clock_1GHz(void)
printf(CPU: Switch DDR clock to 400MHz failed\n);
}
+static struct fb_videomode claa_wvga = {
+ .name = CLAA07LC0ACW,
+ .refresh= 57,
+ .xres = 800,
+ .yres = 480,
+ .pixclock = 37037,
+ .left_margin= 40,
+ .right_margin = 60,
+ .upper_margin = 10,
+ .lower_margin = 10,
+ .hsync_len = 20,
+ .vsync_len = 10,
+ .sync = 0,
+ .vmode = FB_VMODE_NONINTERLACED
+};
+
+void lcd_iomux(void)
+{
+ mxc_request_iomux(MX53_PIN_DI0_DISP_CLK, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DI0_PIN15, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DI0_PIN2, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DI0_PIN3, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT0, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT1, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT2, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT3, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT4, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT5, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT6, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT7, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT8, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT9, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT10, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT11, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT12, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT13, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT14, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT15, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT16, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT17, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT18, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT19, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT20, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT21, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT22, IOMUX_CONFIG_ALT0);
+ mxc_request_iomux(MX53_PIN_DISP0_DAT23, IOMUX_CONFIG_ALT0);
+
+ /* Turn on GPIO backlight */
+ mxc_request_iomux(MX53_PIN_EIM_D24, IOMUX_CONFIG_ALT1);
+ gpio_direction_output(MX53LOCO_LCD_POWER, 1);
+
+ /* Turn on display contrast */
+ mxc_request_iomux(MX53_PIN_GPIO_1, IOMUX_CONFIG_ALT1);
+ gpio_direction_output(IOMUX_TO_GPIO(MX53_PIN_GPIO_1), 1); }
+
+void lcd_enable(void)
+{
+ int ret = ipuv3_fb_init(claa_wvga, 0, IPU_PIX_FMT_RGB565);
+ if (ret)
+ printf(LCD cannot be configured: %d\n, ret); }
+
int board_early_init_f(void)
{
setup_iomux_uart();
setup_iomux_fec();
+ lcd_iomux();
return 0;
}
@@ -432,6 +500,8 @@ int board_late_init(void)
clock_1GHz();
print_cpuinfo();
+ setenv(stdout, serial);
+
return 0;
}
#endif
@@ -441,6 +511,8 @@ int board_init(void)
gd-bd-bi_boot_params = PHYS_SDRAM_1 + 0x100;
mxc_set_sata_internal_clock();
+
+ lcd_enable();
return 0;
}
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index
eab0e27..99daafb 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -38,7 +38,7 @@
#define CONFIG_INITRD_TAG
/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 *
1024)
+#define
Re: [U-Boot] [PATCH 1/3] mx53: Change IPU_CTRL_BASE_ADDR definition
-Original Message- From: Fabio Estevam [mailto:feste...@gmail.com] Sent: Friday, May 11, 2012 9:08 AM To: u-boot@lists.denx.de Cc: sba...@denx.de; Liu Hui-R64343; Estevam Fabio-R49496 Subject: [PATCH 1/3] mx53: Change IPU_CTRL_BASE_ADDR definition From: Fabio Estevam fabio.este...@freescale.com The original definition of IPU_CTRL_BASE_ADDR does match the value stated in the MX53 Reference Manual. However, if using such value the IPU driver hangs when trying to access the IPU registers. Looking for this definition in Freescale U-boot version shows that it is set as 0. Set it as 0 here as well, so that we can have a working IPU driver for mx53. Signed-off-by: Fabio Estevam fabio.este...@freescale.com Acked-by: Jason Liu r64...@freescale.com --- arch/arm/include/asm/arch-mx5/imx-regs.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index cef4190..171c4ab 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -34,7 +34,7 @@ #define NFC_BASE_ADDR_AXI 0xCFFF #define CS1_BASE_ADDR 0xB800 #elif defined(CONFIG_MX53) -#define IPU_CTRL_BASE_ADDR 0x1800 +#define IPU_CTRL_BASE_ADDR 0x #define SPBA0_BASE_ADDR 0x5000 #define AIPS1_BASE_ADDR 0x53F0 #define AIPS2_BASE_ADDR 0x63F0 -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/4] mx53loco: Add mc34708 support and set mx53 frequency at 1GHz
-Original Message-
From: Fabio Estevam [mailto:feste...@gmail.com]
Sent: Tuesday, May 08, 2012 4:26 AM
To: u-boot@lists.denx.de
Cc: sba...@denx.de; Liu Hui-R64343; Estevam Fabio-R49496
Subject: [PATCH 2/4] mx53loco: Add mc34708 support and set mx53
frequency at 1GHz
From: Fabio Estevam fabio.este...@freescale.com
Add mc34708 support and set mx53 core frequency at its maximum value of
1GHz.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Acked-by: Jason Liu r64...@freescale.com
---
board/freescale/mx53loco/mx53loco.c | 52 +---
--
include/configs/mx53loco.h |2 +
include/fsl_pmic.h | 10 +++
3 files changed, 50 insertions(+), 14 deletions(-)
diff --git a/board/freescale/mx53loco/mx53loco.c
b/board/freescale/mx53loco/mx53loco.c
index 7ed5c4e..8c18b99 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -38,6 +38,7 @@
#include asm/gpio.h
#include pmic.h
#include dialog_pmic.h
+#include fsl_pmic.h
DECLARE_GLOBAL_DATA_PTR;
@@ -319,23 +320,46 @@ static void setup_iomux_i2c(void)
static int power_init(void)
{
- unsigned int val, ret;
+ unsigned int val;
+ int ret = -1;
struct pmic *p;
- pmic_dialog_init();
- p = get_pmic();
-
- /* Set VDDA to 1.25V */
- val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V;
- ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val);
-
- ret |= pmic_reg_read(p, DA9053_SUPPLY_REG, val);
- val |= DA9052_SUPPLY_VBCOREGO;
- ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, val);
+ if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) {
+ pmic_dialog_init();
+ p = get_pmic();
+
+ /* Set VDDA to 1.25V */
+ val = DA9052_BUCKCORE_BCOREEN |
DA_BUCKCORE_VBCORE_1_250V;
+ ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val);
+
+ ret |= pmic_reg_read(p, DA9053_SUPPLY_REG, val);
+ val |= DA9052_SUPPLY_VBCOREGO;
+ ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, val);
+
+ /* Set Vcc peripheral to 1.30V */
+ ret |= pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62);
+ ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62);
+ }
- /* Set Vcc peripheral to 1.35V */
- ret |= pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62);
- ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62);
+ if (!i2c_probe(CONFIG_SYS_FSL_PMIC_I2C_ADDR)) {
+ pmic_init();
+ p = get_pmic();
+
+ /* Set VDDGP to 1.25V for 1GHz on SW1 */
+ pmic_reg_read(p, REG_SW_0, val);
+ val = (val ~SWx_VOLT_MASK_MC34708) |
SWx_1_250V_MC34708;
+ ret = pmic_reg_write(p, REG_SW_0, val);
+
+ /* Set VCC as 1.30V on SW2 */
+ pmic_reg_read(p, REG_SW_1, val);
+ val = (val ~SWx_VOLT_MASK_MC34708) |
SWx_1_300V_MC34708;
+ ret |= pmic_reg_write(p, REG_SW_1, val);
+
+ /* Set global reset timer to 4s */
+ pmic_reg_read(p, REG_POWER_CTL2, val);
+ val = (val ~TIMER_MASK_MC34708) | TIMER_4S_MC34708;
+ ret |= pmic_reg_write(p, REG_POWER_CTL2, val);
+ }
return ret;
}
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index
8f43eec..87f6ed1 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -97,7 +97,9 @@
#define CONFIG_PMIC
#define CONFIG_PMIC_I2C
#define CONFIG_DIALOG_PMIC
+#define CONFIG_PMIC_FSL
#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
+#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
/* allow to overwrite serial and ethaddr */ #define
CONFIG_ENV_OVERWRITE diff --git a/include/fsl_pmic.h b/include/fsl_pmic.h
index 742f2e1..3b7cd37 100644
--- a/include/fsl_pmic.h
+++ b/include/fsl_pmic.h
@@ -122,4 +122,14 @@ enum {
/* Interrupt status 1 */
#define RTCRSTI (1 7)
+/* MC34708 Definitions */
+#define SWx_VOLT_MASK_MC34708 0x3F
+#define SWx_1_250V_MC347080x30
+#define SWx_1_300V_MC347080x34
+#define TIMER_MASK_MC347080x300
+#define TIMER_4S_MC34708 0x100
+#define VUSBSEL_MC34708 (1 2)
+#define VUSBEN_MC34708(1 3)
+#define SWBST_CTRL31
+
#endif
--
1.7.1
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Re: [U-Boot] [PATCH 3/4] mx53loco: Turn on VUSB regulator
-Original Message-
From: Fabio Estevam [mailto:feste...@gmail.com]
Sent: Tuesday, May 08, 2012 4:26 AM
To: u-boot@lists.denx.de
Cc: sba...@denx.de; Liu Hui-R64343; Estevam Fabio-R49496
Subject: [PATCH 3/4] mx53loco: Turn on VUSB regulator
From: Fabio Estevam fabio.este...@freescale.com
On the mx53loco board with mc34708 PMIC it is necessary to turn on VUSB
regulator so that the mx53 USBH1 PHY receives the 3.3V voltage.
Tested by inserting a USB pen drive in the upper USB slot (USBH1) and then
issued the
commands:
usb start
usb info
,which correctly detected and printed the USB pen drive information.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Acked-by: Jason Liu r64...@freescale.com
---
board/freescale/mx53loco/mx53loco.c |9 +
include/fsl_pmic.h |1 +
2 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx53loco/mx53loco.c
b/board/freescale/mx53loco/mx53loco.c
index 8c18b99..4d3b73d 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -359,6 +359,15 @@ static int power_init(void)
pmic_reg_read(p, REG_POWER_CTL2, val);
val = (val ~TIMER_MASK_MC34708) | TIMER_4S_MC34708;
ret |= pmic_reg_write(p, REG_POWER_CTL2, val);
+
+ /* Set VUSBSEL and VUSBEN for USB PHY supply*/
+ pmic_reg_read(p, REG_MODE_0, val);
+ val |= (VUSBSEL_MC34708 | VUSBEN_MC34708);
+ ret |= pmic_reg_write(p, REG_MODE_0, val);
+
+ /* Set SWBST to 5V in auto mode */
+ val = SWBST_AUTO;
+ ret |= pmic_reg_write(p, SWBST_CTRL, val);
}
return ret;
diff --git a/include/fsl_pmic.h b/include/fsl_pmic.h index 3b7cd37..64c1e2e
100644
--- a/include/fsl_pmic.h
+++ b/include/fsl_pmic.h
@@ -131,5 +131,6 @@ enum {
#define VUSBSEL_MC34708 (1 2)
#define VUSBEN_MC34708(1 3)
#define SWBST_CTRL31
+#define SWBST_AUTO0x8
#endif
--
1.7.1
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Re: [U-Boot] [PATCH 4/4] mx53loco: Add CONFIG_REVISION_TAG
-Original Message-
From: Fabio Estevam [mailto:feste...@gmail.com]
Sent: Tuesday, May 08, 2012 4:26 AM
To: u-boot@lists.denx.de
Cc: sba...@denx.de; Liu Hui-R64343; Estevam Fabio-R49496
Subject: [PATCH 4/4] mx53loco: Add CONFIG_REVISION_TAG
From: Fabio Estevam fabio.este...@freescale.com
FSL 2.6.35 kernel assumes that the bootloader passes the
CONFIG_REVISION_TAG information.
The kernel uses this data to distinguish between Dialog versus mc34708
based boards, and also to distinguish between revA and revB of the mc34708
based boards.
Suggested-by: Yu Li y...@magniel.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx53loco/mx53loco.c |7 +++
include/configs/mx53loco.h |1 +
2 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx53loco/mx53loco.c
b/board/freescale/mx53loco/mx53loco.c
index 4d3b73d..2f2c00c 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -62,6 +62,13 @@ void dram_init_banksize(void)
gd-bd-bi_dram[1].size = PHYS_SDRAM_2_SIZE; }
+u32 get_board_rev(void)
+{
+ /* TODO: Convert the register to proper io accessor */
+ int rev = readl(IIM_BASE_ADDR + 0x878);
+ return (get_cpu_rev() ~(0xF 8)) | (rev 0xF) 8; }
+
As you said, could you please use accessor for it?
static void setup_iomux_uart(void)
{
/* UART1 RXD */
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index
87f6ed1..eab0e27 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -43,6 +43,7 @@
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_MXC_GPIO
+#define CONFIG_REVISION_TAG
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
--
1.7.1
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Re: [U-Boot] [PATCH 2/4] mx6qsabrelite: Allow booting a zImage kernel
-Original Message- From: Estevam Fabio-R49496 Sent: Tuesday, April 24, 2012 12:31 AM To: u-boot@lists.denx.de Cc: sba...@denx.de; Estevam Fabio-R49496; Liu Hui-R64343 Subject: [PATCH 2/4] mx6qsabrelite: Allow booting a zImage kernel Allow booting a zImage kernel. Cc: Jason Liu r64...@freescale.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com Acke-by: Jason Liu r64...@freescale.com --- include/configs/mx6qsabrelite.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 3f7e51d..492c618 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -211,6 +211,7 @@ #endif #define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ #define CONFIG_SYS_DCACHE_OFF -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/4] mx6qsabrelite: Allow booting a zImage kernel
-Original Message- From: Liu Hui-R64343 Sent: Tuesday, April 24, 2012 9:48 AM To: Estevam Fabio-R49496; u-boot@lists.denx.de Cc: sba...@denx.de Subject: RE: [PATCH 2/4] mx6qsabrelite: Allow booting a zImage kernel -Original Message- From: Estevam Fabio-R49496 Sent: Tuesday, April 24, 2012 12:31 AM To: u-boot@lists.denx.de Cc: sba...@denx.de; Estevam Fabio-R49496; Liu Hui-R64343 Subject: [PATCH 2/4] mx6qsabrelite: Allow booting a zImage kernel Allow booting a zImage kernel. Cc: Jason Liu r64...@freescale.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com Acke-by: Jason Liu r64...@freescale.com Sorry for the typo: %s/Acke/Acked/ --- include/configs/mx6qsabrelite.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 3f7e51d..492c618 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -211,6 +211,7 @@ #endif #define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ #define CONFIG_SYS_DCACHE_OFF -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] mx6qarm2: Allow booting a zImage kernel
-Original Message- From: Estevam Fabio-R49496 Sent: Tuesday, April 24, 2012 12:31 AM To: u-boot@lists.denx.de Cc: sba...@denx.de; Estevam Fabio-R49496; Liu Hui-R64343 Subject: [PATCH 3/4] mx6qarm2: Allow booting a zImage kernel Allow booting a zImage kernel. Cc: Jason Liu r64...@freescale.com Signed-off-by: Fabio Estevam fabio.este...@freescale.com Acked-by: Jason Liu r64...@freescale.com --- include/configs/mx6qarm2.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index e83aec6..90652c6 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -168,6 +168,7 @@ #define CONFIG_SYS_MMC_ENV_DEV1 #define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ #define CONFIG_SYS_DCACHE_OFF -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] i.MX6: arm2: Add AXI cache and Qos setting
-Original Message- From: Dirk Behme [mailto:dirk.be...@de.bosch.com] Sent: Friday, April 13, 2012 2:46 PM To: u-boot@lists.denx.de Cc: Dirk Behme; Jason Chen; Liu Hui-R64343; Stefano Babic; Fabio Estevam Subject: [PATCH] i.MX6: arm2: Add AXI cache and Qos setting Do the same AXI cache and Qos settings done already in the SabreLite imximage.cfg for the ARM2 board, too. It fixes a display flash issue caused by low priority of the display IDMA channel. Signed-off-by: Dirk Behme dirk.be...@de.bosch.com CC: Jason Chen b02...@freescale.com CC: Jason Liu r64...@freescale.com CC: Stefano Babic sba...@denx.de CC: Fabio Estevam feste...@gmail.com --- board/freescale/mx6qarm2/imximage.cfg |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/board/freescale/mx6qarm2/imximage.cfg b/board/freescale/mx6qarm2/imximage.cfg index 5f0ee0d..ceecbf9 100644 --- a/board/freescale/mx6qarm2/imximage.cfg +++ b/board/freescale/mx6qarm2/imximage.cfg @@ -165,3 +165,9 @@ DATA 4 0x020c4074 0x3FF0 DATA 4 0x020c4078 0x00FFF300 DATA 4 0x020c407c 0x0FC3 DATA 4 0x020c4080 0x03FF + +# enable AXI cache for VDOA/VPU/IPU +DATA 4 0x020e0010 0xF0FF +# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 DATA 4 0x020e0018 +0x007F007F DATA 4 0x020e001c 0x007F007F Acked-by: Jason Liu r64...@freescale.com -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] USB: ehci-mx6: Add proper IO accessors
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de]
On Behalf Of Fabio Estevam
Sent: Tuesday, March 20, 2012 6:36 AM
To: u-boot@lists.denx.de
Cc: ma...@denx.de; Estevam Fabio-R49496; w...@denx.de
Subject: [U-Boot] [PATCH] USB: ehci-mx6: Add proper IO accessors
Add proper IO accessors for mx6 usb registers.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
This patch depends on [PATCH v5] mx6: Read silicon revision from register
drivers/usb/host/ehci-mx6.c | 13 -
1 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index
b7bf49d..5dec673 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -46,13 +46,9 @@
#define USBPHY_CTRL_ENUTMILEVEL3 0x8000
#define USBPHY_CTRL_ENUTMILEVEL2 0x4000
-#define ANADIG_USB2_CHRG_DETECT 0x0210
#define ANADIG_USB2_CHRG_DETECT_EN_B 0x0010
#define ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B0x0008
-#define ANADIG_USB2_PLL_480_CTRL 0x0020
-#define ANADIG_USB2_PLL_480_CTRL_SET 0x0024
-#define ANADIG_USB2_PLL_480_CTRL_CLR 0x0028
#define ANADIG_USB2_PLL_480_CTRL_BYPASS 0x0001
#define ANADIG_USB2_PLL_480_CTRL_ENABLE 0x2000
#define ANADIG_USB2_PLL_480_CTRL_POWER0x1000
@@ -77,8 +73,7 @@ static void usbh1_internal_phy_clock_gate(int on)
static void usbh1_power_config(void)
{
- void __iomem *anatop_base = (void __iomem *)ANATOP_BASE_ADDR;
-
+ struct anatop_regs *anatop = (struct anatop_regs
*)ANATOP_BASE_ADDR;
/*
* Some phy and power's special controls for host1
* 1. The external charger detector needs to be disabled @@ -89,15
+84,15 @@ static void usbh1_power_config(void)
*/
__raw_writel(ANADIG_USB2_CHRG_DETECT_EN_B |
ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B,
- anatop_base + ANADIG_USB2_CHRG_DETECT);
+ anatop-usb2_chrg_detect);
__raw_writel(ANADIG_USB2_PLL_480_CTRL_BYPASS,
- anatop_base + ANADIG_USB2_PLL_480_CTRL_CLR);
+ anatop-usb2_pll_480_ctrl);
__raw_writel(ANADIG_USB2_PLL_480_CTRL_ENABLE |
ANADIG_USB2_PLL_480_CTRL_POWER |
ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS,
- anatop_base + ANADIG_USB2_PLL_480_CTRL_SET);
+ anatop-usb2_pll_480_ctrl_set);
}
static int usbh1_phy_enable(void)
Acked-by: Jason Liu r64...@freescale.com
--
1.7.1
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Re: [U-Boot] [PATCH v6] mx6: Read silicon revision from register
-Original Message- From: Stefano Babic [mailto:sba...@denx.de] Sent: Tuesday, March 20, 2012 10:35 PM To: Estevam Fabio-R49496 Cc: u-boot@lists.denx.de; sba...@denx.de; eric.nel...@boundarydevices.com; dirk.be...@de.bosch.com; Liu Hui- R64343 Subject: Re: [PATCH v6] mx6: Read silicon revision from register On 20/03/2012 15:21, Fabio Estevam wrote: Instead of hardcoding the mx6 silicon revision, read it in run-time. Also, besides the silicon version print the mx6 variant type: quad,dual/solo or solo-lite. Tested on a mx6qsabrelite, where it shows: CPU: Freescale i.MX6Q rev1.0 at 792 MHz Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Changes since v5: - Avoid duplication of code. Also tested on a mx51evk board. Changes since v4: - Distinguish the the CPU print depending on the SoC type (MX5 or MX6) Changes since v3: - Provide a complete struct for anatop registers Changes since v2: - Read both chip variant and chip silicon version from anatop - Create a struct for accessing the anatop registers Changes since v1: - Fix typo on Subject arch/arm/cpu/armv7/imx-common/cpu.c | 24 +- arch/arm/cpu/armv7/mx6/soc.c |8 ++- arch/arm/include/asm/arch-mx6/imx-regs.h | 142 ++ 3 files changed, 171 insertions(+), 3 deletions(-) Acked-by: Stefano Babic sba...@denx.de Acked-by: Jason Liu r64...@freescale.com Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] i.MX6: mx6q_sabrelite: add SATA bindings
-Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Stefano Babic Sent: Thursday, March 15, 2012 4:28 PM To: Dirk Behme Cc: u-boot@lists.denx.de; w...@denx.de Subject: Re: [U-Boot] [PATCH V2] i.MX6: mx6q_sabrelite: add SATA bindings On 14/03/2012 15:53, Dirk Behme wrote: On 13.03.2012 17:59, Eric Nelson wrote: ... --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c ... +/* Enable sata clock */ +reg = readl(imx_ccm-CCGR5); /* CCGR5 */ +reg |= MXC_CCM_CCGR5_CG2_MASK; +writel(reg, imx_ccm-CCGR5); Hi Dirk, We touch the CCGR5 already in the imximage.cfg. So we could drop this code completely and just add the MXC_CCM_CCGR5_CG2_MASK to the imximage.cfg. What are the advantages/disadvantages of this? Advantages: Less code, touch the register only once in imximage.cfg. Disadvantages: Less readability, doing it in setup_sata() instead of imximage.cfg is easier to understand and disable (by removing CONFIG_CMD_SATA). Opinions? It sounds like this results in the basic question: Which registers should be touched in imximage.cfg, and which by explicit code in drivers/board files? Of course the board maintainer can decide which is the best for its custom board. My personal rule of thumb is to put into imximage.cfg only the initialization of the DRAM controller, so that the SOC is able to copy u-boot into RAM, while the rest is done in code. As the comments in the imximage.cfg, # set the default clock gate to save power DATA 4 0x020c4068 0x00C03F3F DATA 4 0x020c406c 0x0030FC03 DATA 4 0x020c4070 0x0FFFC000 DATA 4 0x020c4074 0x3FF0 DATA 4 0x020c4078 0x00FFF300 DATA 4 0x020c407c 0x0FC3 DATA 4 0x020c4080 0x03FF This is my intention for the default setting to gate clock as much as possible in order to save power. This also means that when other periph added you need Turn on the clock explicitly. So, my suggestion is: - don't change this imximage.cfg, - turn on the clock you need in the driver code, Jason Liu Best regards, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] mx6: Read silicon revision from register
-Original Message-
From: Fabio Estevam [mailto:feste...@gmail.com]
Sent: Wednesday, March 14, 2012 10:57 AM
To: u-boot@lists.denx.de
Cc: sba...@denx.de; eric.nel...@boundarydevices.com;
dirk.be...@de.bosch.com; Liu Hui-R64343; Estevam Fabio-R49496
Subject: [PATCH v3] mx6: Read silicon revision from register
Instead of hardcoding the mx6 silicon revision, read it in run-time.
Also, besides the silicon version also print the mx6 variant type: quad,
dual/solo or solo-lite.
Tested on a mx6qsabrelite, where it shows:
CPU: Freescale i.MX6Q rev1.0 at 792 MHz
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v2:
- Read both chip variant and chip silicon version from anatop
- Create a struct for accessing the anatop registers Changes since v1:
- Fix typo on Subject
arch/arm/cpu/armv7/imx-common/cpu.c | 19 +--
arch/arm/cpu/armv7/mx6/soc.c |8 +++-
arch/arm/include/asm/arch-mx6/imx-regs.h |5 +
3 files changed, 29 insertions(+), 3 deletions(-)
[...]
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 5ba5f39..9644807 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -294,5 +294,10 @@ struct aipstz_regs {
u32 opacr4;
};
+struct anatop_regs {
+ u8 rsvd[0x260]; /* To be completed as needed */
+ u32 siliconid;
+};
I'm afraid whether this is correct to add it here since some registers of
anatop was included into the ccm_reg.
ANATOP is a collection of analog and anadig. So, ANATOP register mostly is
consist of 4 parts:
ANADIG in CCM: for example: PLL/PFD,
ANAREG in power: internal analog regulator, power tree.
ANAUSB in usb: for usb vbus dection, charge, etc.
ANAMISC: misc feature, only one register now for the Chip Silicon Version
So the siliconid is in the last register.
Jason Liu
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Re: [U-Boot] [PATCH] mx6: Read register revision from register
Fabio,
From: u-boot-boun...@lists.denx.de [u-boot-boun...@lists.denx.de] on behalf of
Fabio Estevam [fabio.este...@freescale.com]
Sent: Tuesday, March 13, 2012 10:17 PM
To: u-boot@lists.denx.de
Cc: Estevam Fabio-R49496
Subject: [U-Boot] [PATCH] mx6: Read register revision from register
Instead of hardcoding the mx6 silicon revision, read it from the proper
register.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
arch/arm/cpu/armv7/mx6/soc.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 2ac74b5..639bf30 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -32,7 +32,8 @@
u32 get_cpu_rev(void)
{
- int system_rev = 0x61000 | CHIP_REV_1_0;
+ int reg = readl(ANATOP_BASE_ADDR + 0x260) 0xFF;
+ int system_rev = 0x61000 | 0x10 + reg;
This is not complete, you are still hard coding it. In fact,The ANATOP register
contains both the chip ID and chip revision.
return system_rev;
}
--
1.7.1
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Re: [U-Boot] mx6: consolidating and extending anadig/analog/anatop register defs
Hi, Wolfgang, -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Wolfgang Grandegger Sent: Monday, February 13, 2012 8:08 PM To: U-Boot Subject: [U-Boot] mx6: consolidating and extending anadig/analog/anatop register defs Hello, for the USB support on MX6Q, I'm trying to consolidate and extend the register definitions for the ANADIG registers. Unfortunately, three different names are used for the same registers: ANADIG, analog and ANATOP. Any idea what the names do stand for and what would be the most appropriate one. Apart from that, we should have a separate structure and header file for these registers. Currently, they are added to the CCM regs. The register definition in the CCM according to the RM as followings: Addresses: CCM_analog_PLL_SYS is 0h base + 0h offset = _h CCM_analog_PLL_SYS_SET is 0h base + 4h offset = _0004h CCM_analog_PLL_SYS_CLR is 0h base + 8h offset = _0008h CCM_analog_PLL_SYS_TOG is 0h base + Ch offset = _000Ch Thus, I put the register definition into the CCM parts. Wolfgang. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] i.mx: i.mx6q: add the initial support for i.mx6q Sabre Lite board
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de]
On Behalf Of Dirk Behme
Sent: Thursday, December 29, 2011 3:10 PM
To: Stefano Babic; Jason Liu
Cc: u-boot@lists.denx.de; Dirk Behme
Subject: Re: [U-Boot] [PATCH v3] i.mx: i.mx6q: add the initial support for
i.mx6q
Sabre Lite board
On 28.12.2011 13:32, Stefano Babic wrote:
On 26/12/2011 08:34, Dirk Behme wrote:
From: Jason Liujason@linaro.org
Add the initial support for Freescale i.MX6Q Sabre Lite board
Hi Dirk,
Index: freescale-u-boot-imx.git/MAINTAINERS
=
==
--- freescale-u-boot-imx.git.orig/MAINTAINERS
+++ freescale-u-boot-imx.git/MAINTAINERS
@@ -579,6 +579,7 @@ Jason Liur64...@freescale.com
mx53evk i.MX53
mx53locoi.MX53
mx6qarm2i.MX6Q
+ mx6qsabrelite i.MX6Q
Can you confirm that Jason is the maintainer of the board ?
Yes, I think so, it shouldn't have changed since v2
http://lists.denx.de/pipermail/u-boot/2011-December/113142.html
Jason?
Yes. And please change the tag with me to signed-off since I contribute the
patch. Thanks,
+
+#ifdef CONFIG_FSL_ESDHC
+struct fsl_esdhc_cfg usdhc_cfg[2] = {
+ {USDHC3_BASE_ADDR, 1},
+ {USDHC4_BASE_ADDR, 1},
+};
+
+int board_mmc_getcd(u8 *cd, struct mmc *mmc) {
+ struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg
+*)mmc-priv;
+
+ if (cfg-esdhc_base == USDHC3_BASE_ADDR) {
+ gpio_direction_input(192); /*GPIO7_0*/
+ *cd = gpio_get_value(192);
+ } else {
+ gpio_direction_input(38); /*GPIO2_6*/
+ *cd = gpio_get_value(38);
+ }
+
+ return 0;
+}
I have not an evident comment with this code, but there are pending
patches to change this behavior:
http://patchwork.ozlabs.org/patch/132398/
The patches already updates other i.MX boards. If, as I presume, this
patches goes soon in mainline, board_mmc_getcd() must be updated to be
adjusted for the new API. I will wait a while before merging your
patch to check the status of the mmc patchset.
Ok, good to know. Thanks!
Let us know if you want us to update this patch against
http://patchwork.ozlabs.org/patch/132398/
Yes, after the new MMC CD patch goes mainline, there will be a new version to
update with it.
@@ -0,0 +1,67 @@
+U-Boot for the Freescale i.MX6q SabreLite board
+
+This file contains information for the port of U-Boot to the
+Freescale i.MX6q SabreLite board.
+
+1. Boot source, boot from SD card
+-
+
+The recent mainline U-Boot for the Freescale i.MX6q SabreLite board
+supports boot from SD card only. However, by default, the early
+version of SabreLite boards boot from the SPI NOR flash. These
+boards need to be reflashed with a small SD card loader to support
+boot from SD card. This small SD card loader will be flashed into
+the SPI NOR. The board will still boot from SPI NOR, but the loader will in
turn request the BootROM to load the U-Boot from SD card.
+At the moment of writing, please check with Freescale on the
+availablity of this small SD loader binary.
Ok, fine. For my information only, is there a revision version to be
checked if the board needs this small loader ?
Good question ;) There is some discussion if it is possible to make a new
version
of the board which is configurable to SD boot by HW. But there seem to be
some layout issues. So atm I would answer your question with 'no'.
+1
Happy New Year!
Best regards
Dirk
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Re: [U-Boot] [PATCH] sdhc_boot: Introduce CONFIG_FSL_FIXED_MMC_LOCATION option
-Original Message- From: Fabio Estevam [mailto:feste...@gmail.com] Sent: Wednesday, December 21, 2011 12:33 AM To: u-boot@lists.denx.de Cc: sba...@denx.de; marek.va...@gmail.com; Fleming Andy-AFLEMING; Gala Kumar-B11780; Guo Shawn-R65073; Liu Hui-R64343; Huang Changming-R66093; Estevam Fabio-R49496 Subject: [PATCH] sdhc_boot: Introduce CONFIG_FSL_FIXED_MMC_LOCATION option Since commit 97039ab98 (env_mmc: Allow board code to override the environment address) mmc_get_env_addr is a weak-aliased function in common/env_mmc.c The mmc_get_env_addr implementation that exists at board/freescale/common/sdhc_boot.c is meant to be used only for PowerPC boards, but currently it is being used for all platforms that have CONFIG_ENV_IS_IN_MMC defined. Introduce CONFIG_FSL_FIXED_MMC_LOCATION so that the boards that need to use the mmc_get_env_addr version from board/freescale/common/sdhc_boot.c could activate this config option on their board file. This fixes the retrieval of CONFIG_ENV_OFFSET on non-PowerPC boards. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- board/freescale/common/Makefile|2 +- board/freescale/common/sdhc_boot.c |2 ++ include/configs/MPC8536DS.h|1 + include/configs/P1010RDB.h |1 + include/configs/P1_P2_RDB.h|1 + include/configs/P2020COME.h|1 + include/configs/P2020DS.h |1 + include/configs/P2041RDB.h |1 + include/configs/corenet_ds.h |1 + include/configs/p1_p2_rdb_pc.h |1 + 10 files changed, 11 insertions(+), 1 deletions(-) Acked-by: Jason Liu r64...@freescale.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] i.mx6q: arm2: Add the enet function support
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de]
On Behalf Of Stefano Babic
Sent: Friday, December 16, 2011 7:30 PM
To: Jason Liu
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH 3/3] i.mx6q: arm2: Add the enet function
support
On 13/12/2011 14:44, Jason Liu wrote:
This enable the network function on the i.mx6q armadillo2 board(arm2),
thus we can use tftp to load image from network.
Cc: Stefano Babic sba...@denx.de
Signed-off-by: Jason Liu jason@linaro.org
Tested-by: Dirk Behme dirk.be...@de.bosch.com
---
board/freescale/mx6qarm2/mx6qarm2.c | 90
+++
include/configs/mx6qarm2.h | 13 -
2 files changed, 101 insertions(+), 2 deletions(-)
Hi Jason,
only a couple of minor issues.
Thanks for the review.
+
#ifdef CONFIG_FSL_ESDHC
struct fsl_esdhc_cfg usdhc_cfg[2] = {
{USDHC3_BASE_ADDR, 1},
@@ -132,9 +162,69 @@ int board_mmc_init(bd_t *bis) } #endif
+#define MII_MMD_ACCESS_CTRL_REG 0xd
+#define MII_MMD_ACCESS_ADDR_DATA_REG0xe
+#define MII_DBG_PORT_REG0x1d
+#define MII_DBG_PORT2_REG 0x1e
+
+int fecmxc_mii_postcall(int phy)
+{
+unsigned short val;
+
+/*
+ * Due to the i.MX6Q Armadillo2 board HW design,there is
+ * no 125Mhz clock input from SOC. In order to use RGMII,
+ * We need enable AR8031 ouput a 125MHz clk from CLK_25M
+ */
+miiphy_write(FEC, phy, MII_MMD_ACCESS_CTRL_REG, 0x7);
+miiphy_write(FEC, phy, MII_MMD_ACCESS_ADDR_DATA_REG,
0x8016);
+miiphy_write(FEC, phy, MII_MMD_ACCESS_CTRL_REG, 0x4007);
+miiphy_read(FEC, phy, MII_MMD_ACCESS_ADDR_DATA_REG, val);
+val = 0xffe3;
+val |= 0x18;
+miiphy_write(FEC, phy, MII_MMD_ACCESS_ADDR_DATA_REG, val);
+
+/* For the RGMII phy, we need enable tx clock delay */
+miiphy_write(FEC, phy, 0x1d, 0x5);
You define MII_DBG_PORT_REG, but then you do not use it.
+miiphy_read(FEC, phy, 0x1e, val);
The same here for MII_DBG_PORT2_REG. Can you also defines some
constants for the value you are setting (tx clock delay, etc.).
Yeah, thanks for it. I will use MII_DBG_PORT_REG and MII_DBG_PORT2_REG.
diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h
index a7b363d..3a30679 100644
--- a/include/configs/mx6qarm2.h
+++ b/include/configs/mx6qarm2.h
@@ -56,6 +56,17 @@
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_FEC_MXC
+#define CONFIG_MII
+#define IMX_FEC_BASEENET_BASE_ADDR
+#define CONFIG_FEC_XCV_TYPE RGMII
+#define CONFIG_ETHPRIME FEC
I have not thought this is needed. I see only one controller.
Yes, I think we can remove it.
Best regards,
Jason Liu
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH 1/1] MX5:MX53: support for freescale MX53LOCO board
Hi, Stefano, -Original Message- From: Stefano Babic [mailto:sba...@denx.de] Sent: Monday, February 21, 2011 8:46 PM To: Liu Hui-R64343 Cc: u-boot@lists.denx.de; sba...@denx.de Subject: Re: [U-Boot][PATCH 1/1] MX5:MX53: support for freescale MX53LOCO board On 02/21/2011 11:15 AM, Jason Liu wrote: Hi Jason, + # + diff --git a/board/freescale/mx53loco/config.mk b/board/freescale/mx53loco/config.mk new file mode 100644 index 000..ec0c66c As I discovered myself, usage of config.mk is discouraged and it should be removed and it is not accepted anymore for new boards. Instead of that, it is possible to add CONFIG_ options in boards.cfg. OK, do you know why config.mk is discouraged? I have already sent changes for imx51evk, as example for the imx5 boards. However, I sent them when window was already closed, and I merged them on the next branch of u-boot-imx. You will find these patches in archive also as: Can I based on next of u-boot-imx to submit new patches since master branch Of uboot does not have it? [PATCH 1/2] Makefile: change rule to build IMX image [PATCH 2/2] MX51: drop config.mk from mx51evk You can take a look at them to see how to drop the config.mk file. OK, thanks for the information. I will look at it and check my new version patch. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] MX5:MX53: support for freescale MX53LOCO board
Hi, Fabio, -Original Message- From: Fabio Estevam [mailto:fabioeste...@yahoo.com] Sent: Tuesday, February 22, 2011 7:38 AM To: u-boot@lists.denx.de; Liu Hui-R64343 Subject: Re: [U-Boot] [PATCH 1/1] MX5:MX53: support for freescale MX53LOCO board Hi Jason, --- On Mon, 2/21/11, Jason Liu r64...@freescale.com wrote: ... --- /dev/null +++ b/board/freescale/mx53loco/imximage.cfg @@ -0,0 +1,99 @@ +# +# (C Copyright 2009 +# Stefano Babic DENX Software Engineering sba...@denx.de. +# (C Copyright 2011 +# Jason Liu Freescale Software Engineering r64...@freescale.com Why don´t you use the standard Freescale copyright header here instead? Do you think it's a must to do it here? Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] ARM: Update mach types
Hi, Fabio, Best Regards, Jason Liu -Original Message- From: Fabio Estevam [mailto:fabioeste...@yahoo.com] Sent: Tuesday, February 22, 2011 1:36 AM To: u-boot@lists.denx.de; Liu Hui-R64343 Subject: Re: [U-Boot] [PATCH 1/1] ARM: Update mach types Hi Jason, --- On Mon, 2/21/11, Jason Liu r64...@freescale.com wrote: From: Jason Liu r64...@freescale.com Subject: [U-Boot] [PATCH 1/1] ARM: Update mach types To: u-boot@lists.denx.de Date: Monday, February 21, 2011, 8:14 AM This commit updates the mach-types to sync with ARM Linux based on the following commit by Russell King commit 4a683a2c5e7cabe91218db28e56dc25e1b134ce3 Signed-off-by: Jason Liu r64...@freescale.com --- arch/arm/include/asm/mach-types.h | 1293 - 1 files changed, 1277 insertions(+), 16 deletions(-) The machine update patch is already in U-boot ARM tree: http://git.denx.de/?p=u-boot/u-boot- arm.git;a=commitdiff;h=c7977858dcf1f656cbe91ea0dc3cb9139c6a8cc8 Yes, I just see it now but not when I submit patches. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MX31: Removed warnings for iomux function
Hi, Stefano, -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Stefano Babic Sent: Tuesday, October 19, 2010 3:24 PM To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH] MX31: Removed warnings for iomux function Removed warnings generated in the mx31_set_pad() function. Signed-off-by: Stefano Babic sba...@denx.de --- arch/arm/cpu/arm1136/mx31/generic.c |2 +- arch/arm/include/asm/arch-mx31/mx31.h |1 + 2 files changed, 2 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c index cbe8243..db5d3f0 100644 --- a/arch/arm/cpu/arm1136/mx31/generic.c +++ b/arch/arm/cpu/arm1136/mx31/generic.c @@ -97,7 +97,7 @@ void mx31_set_pad(enum iomux_pins pin, u32 config) void *reg; pin = IOMUX_PADNUM_MASK; - reg = (IOMUXC_BASE + 0x154) + (pin + 2) / 3 * 4; + reg = (void *)((IOMUXC_BASE + 0x154) + (pin + 2) / 3 * 4); Any reason we need define void *reg here? I also found there is some mess for register read/write in this file, for example, arch/arm/cpu/arm1136/mx31/generic.c: In function: mx31_gpio_mux unsigned long reg, shift, tmp; tmp = __REG(reg); while in function: mx31_set_pad u32 field, l; void *reg; l = __raw_readl(reg); We need take the same code-style, right? field = (pin + 2) % 3; l = __raw_readl(reg); diff --git a/arch/arm/include/asm/arch-mx31/mx31.h b/arch/arm/include/asm/arch-mx31/mx31.h index 5a5aa11..a755212 100644 --- a/arch/arm/include/asm/arch-mx31/mx31.h +++ b/arch/arm/include/asm/arch-mx31/mx31.h @@ -27,6 +27,7 @@ extern u32 mx31_get_ipg_clk(void); #define imx_get_uartclk mx31_get_ipg_clk extern void mx31_gpio_mux(unsigned long mode); +extern void mx31_set_pad(enum iomux_pins pin, u32 config); void mx31_uart1_hw_init(void); void mx31_spi2_hw_init(void); -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] drivers/net/fec_mxc.c: write mac address ininit
Hi, John Wolfgang, -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Wolfgang Denk Sent: Wednesday, October 20, 2010 5:28 AM To: John Rigby Cc: u-boot@lists.denx.de; Ben Warren Subject: Re: [U-Boot] [PATCH v2] drivers/net/fec_mxc.c: write mac address ininit Dear John Rigby, In message 1287001868-22244-1-git-send-email-john.ri...@linaro.org you wrote: Call fec_set_hwaddr in init routine to setup MAC address so when ethaddr is set late via setenv the change will propagate to the hw. Signed-off-by: John Rigby john.ri...@linaro.org CC: Ben Warren biggerbadder...@gmail.com --- v2 - add blank line as requested better commit message added CC drivers/net/fec_mxc.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) Applied, thanks. Ben, I hope this is OK with you. In fact, I don't think it's a good fix to fec-mac-address-not-set issue, it's just a hack. This is the output from bootup log, Warning: FEC MAC addresses don't match: Address in SROM is 75:6e:20:62:6f:6f Address in environment is 00:01:02:04:05:06 It will give one confused warning that the FEC MAC has been set in the SROM, but actually, this the float value which induced by this patch. In fact, we need read the mac address from FUSE(IIM), all the MAC address has burned into fuse after the chip has been shipped out. I will send out one patch to fix this issue soon. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de There are three ways to get something done: do it yourself, hire someone, or forbid your kids to do it. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 1/1] IMX: rename mx51 to mx5
Hi, Wolfgang, -Original Message- From: Wolfgang Denk [mailto:w...@denx.de] Sent: Saturday, October 16, 2010 3:08 AM To: Liu Hui-R64343 Cc: sba...@denx.de; u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH V2 1/1] IMX: rename mx51 to mx5 Dear Jason Liu, In message 1287155158-16801-1-git-send-email-r64...@freescale.com you wrote: ... - freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_MX51_HCLK_FREQ); + freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_HCLK_FREQ); ... - clockinfo, CONFIG_SYS_MAXARGS, 1, do_mx51_showclocks, - display mx51 clocks\n, + clockinfo, CONFIG_SYS_MAXARGS, 1, do_showclocks, + display clocks\n, ... - lastinc = val / (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ); + lastinc = val / (CONFIG_CLK32 / CONFIG_SYS_HZ); I'm not happy about these changes. The old names, containing MX51 may have been too narrow in their naming; but the new names are now way too general. CONFIG_CLK32 or CONFIG_HCLK_FREQ look like generic config options that apply to any processor or board, or at least potentially to a wider range. This is kind of name space pollution. I understand that all these names are specific to the mx5 family of processors only, right? Yes, specific to mx5 family, Recent submissions to the Linux kernel seem to use a MX5 string when referring to these processors, like in: - commit messages: ARM: mx5: Add Nand clock support ARM: mx5: dynamically register mxc-nand device ARM: mx5: dynamically register imx-i2c devices - directory names: arch/arm/mach-mx5/ - preprocessor variables: MX5_USBOTHER_REGS_OFFSET MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK etc. I suggest we do the same. Please add a mx5 resp. MX5 to the new identifier names. Yes, agree. Please also keep in mind that CONFIG_* options should be documented in the README. Do you mean all the specific CONFIG_* options in include/configs/boardname.h should be documented? I found lots of that is not doing what you called for? :( BTW, which definition is better? CONFIG_SYS_MX5_HCLK_FREQ 2400 CONFIG_MX5_HCLK_FREQ 2400 According to the REAME, I prefer to the former, what do you think. Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de May your future be limited only by your dreams. - Christa McAuliffe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] IMX: rename mx51 to mx5
Hi, Stefano,
-Original Message-
From: Stefano Babic [mailto:sba...@denx.de]
Sent: Friday, October 15, 2010 7:40 PM
To: Liu Hui-R64343
Cc: sba...@denx.de; u-boot@lists.denx.de
Subject: Re: [U-Boot][PATCH 1/1] IMX: rename mx51 to mx5
On 10/15/2010 04:22 AM, Jason Liu wrote:
Rename mx51 to mx5 in order to support more mx51
like-style SOCs such as MX53 and the followings.
Signed-off-by: Jason Liu r64...@freescale.com
Hi Jason,
a little feedback. This patch is well-formed and I do not see the
corruption problems as with the former one.
However, the patch does not apply:
Applying: IMX: rename mx51 to mx5
error: patch failed: arch/arm/include/asm/arch-mx51/sys_proto.h:24
error: arch/arm/include/asm/arch-mx51/sys_proto.h: patch does not
apply
error: patch failed: boards.cfg:46
error: boards.cfg: patch does not apply
Patch failed at 0001 IMX: rename mx51 to mx5
Have you applied the patch on the current u-boot.git tree ? It seems
you
have to to rebase your patch.
Yes, correct.
Please increment the version of your patch to allow everybody to track
easier the changes. Something like [PATCH V2 1/1] makes the job.
Yes, I will do it.
@@ -2,7 +2,7 @@
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*
- * (C) Copyright 2009 Freescale Semiconductor, Inc.
+ * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
I let someone with more legal experience as me to judge if this change
is allowed or not. Normally, a new Copyright is added in case there is
some important improvement that are not covered by the original file.
In
this case, only a define was changed (CONFIG_MX51_HCLK_FREQ -
CONFIG_HCLK_FREQ).
Make sense, I will modify it.
--- a/arch/arm/cpu/armv7/mx51/soc.c
+++ b/arch/arm/cpu/armv7/mx5/soc.c
@@ -2,7 +2,7 @@
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*
- * (C) Copyright 2009 Freescale Semiconductor, Inc.
+ * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -35,26 +35,25 @@
u32 get_cpu_rev(void)
{
- int reg;
- int system_rev;
+ int system_rev = CONFIG_CPU_TYPE 8;
CONFIG_CPU_TYPE is a new CONFIG_ switch, that should be not needed.
See
my comments later.
Good point.
diff --git a/boards.cfg b/boards.cfg
index 9226424..e144281 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -46,7 +46,7 @@ pm9263arm arm926ejs -
ronetix
at91
jadecpuarm arm926ejs jadecpu syteco
mb86r0x
suen3 arm arm926ejs km_arm keymile
kirkwood
rd6281aarm arm926ejs - Marvell
kirkwood
-mx51evkarm armv7 mx51evk
freescale mx51
+mx51evkarm armv7 mx51evk
freescale mx5
It makes sense to change other boards with MX51 inside this patch and
not with a separate patch. So add changes for the other board, too.
Agree.
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
old mode 100644
new mode 100755
index 86a4731..363af3d
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -1,7 +1,7 @@
/*
* Copyright (C) 2007, Guennadi Liakhovetski l...@denx.de
*
- * (C) Copyright 2009 Freescale Semiconductor, Inc.
+ * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
*
* Configuration settings for the MX51EVK Board
*
@@ -28,10 +28,11 @@
/* High Level Configuration Options */
#define CONFIG_MX51/* in a mx51 */
+#define CONFIG_CPU_TYPE51
Why do we have CONFIG_MX51 and CONFIG_CPU_TYPE ? It seems redundant. A
board maintainer must set both and this makes no great sense. Can we
derive CONFIG_CPU_TYPE (or its meaning) from CONFIG_MX51 when we need
?
Good point, I will modify it.
The v2 patch will be sent out for review soon. :)
BR,
Jason
Best regards,
Stefano Babic
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Re: [U-Boot] [U-BOOT][PATCH 3/5] MX53: Add pin and multiplexer definitions.
Hi, Stefano,
-Original Message-
From: Stefano Babic [mailto:sba...@denx.de]
Sent: 2010年6月18日 17:48
To: Liu Hui-R64343
Cc: w...@denx.de; u-boot@lists.denx.de
Subject: Re: [U-Boot] [U-BOOT][PATCH 3/5] MX53: Add pin and multiplexer
definitions.
Jason Liu wrote:
The patch add header files to support the pin multiplexer of the the
Freescale i.MX53 processor.
Signed-off-by:Jason Liu r64...@freescale.com
Hi Jason,
---
arch/arm/include/asm/arch-mx53/iomux.h | 193 +++
arch/arm/include/asm/arch-mx53/mx53_pins.h | 359
2 files changed, 552 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx53/iomux.h
b/arch/arm/include/asm/arch-mx53/iomux.h
As I said for the previous patches, we must avoid to duplicate files.
This file must be merged with mx51 counterpart. As I see, the two files have
small differences.
diff --git a/arch/arm/include/asm/arch-mx53/mx53_pins.h
b/arch/arm/include/asm/arch-mx53/mx53_pins.h
new file mode 100644
Definitions for mx53 are different as for mx51, so probably it is not
possible to merge them in a single structure. But we can have a single
file (mx5_pins.h, maybe ?), using #ifdef to set the different pins.
+enum iomux_pins {
+ MX53_PIN_GPIO_19= _MXC_BUILD_GPIO_PIN(3, 5, 1, 0x20, 0x348),
+ MX53_PIN_KEY_COL0 = _MXC_BUILD_GPIO_PIN(3, 6, 1, 0x24, 0x34C),
I think the best way should be to get rid of the cpu related names, and use a
more general approach. For exammple, we have
MX51_PIN_KEY_COL0 defined for the MX51. It should be better to have for
example MX5_PIN_KEY_COL0, whose value is different if our
target is a MX51 or MX53.
What do you think ?
Yes, agree. Thank you.
Best regards,
Stefano Babic
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Re: [U-Boot] [U-BOOT][PATCH 4/5] serial_mxc: add support for MX53 processor
Hi, Stefano -Original Message- From: Stefano Babic [mailto:sba...@denx.de] Sent: 2010年6月18日 17:52 To: Liu Hui-R64343 Cc: w...@denx.de; u-boot@lists.denx.de Subject: Re: [U-Boot] [U-BOOT][PATCH 4/5] serial_mxc: add support for MX53 processor Jason Liu wrote: The patch adds support for the Freescale mx53 processor. Signed-off-by:Jason Liu r64...@freescale.com --- Hi Jason, drivers/serial/serial_mxc.c |7 +++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index 4b93e7b..e488595 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -55,6 +55,13 @@ #define UART_PHYS UART2_BASE_ADDR #elif defined(CONFIG_SYS_MX51_UART3) #define UART_PHYS UART3_BASE_ADDR +#elif defined(CONFIG_SYS_MX53_UART1) +#define UART_PHYS UART1_BASE_ADDR +#elif defined(CONFIG_SYS_MX53_UART2) +#define UART_PHYS UART2_BASE_ADDR +#elif defined(CONFIG_SYS_MX53_UART3) +#define UART_PHYS UART3_BASE_ADDR There are really no difference between MX51 and MX53, both set the same values to UART_PHYS (at least as constant: even if the physical address is different, must be unified at this place). I suggest something like CONFIG_SYS_MX_UART1/2/3, that must be used for both MX51 and MX53. Good idea! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] Moved board specific values in config file
Stefano , -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Stefano Babic Sent: 2010年3月28日 19:43 To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH V2] Moved board specific values in config file The lowlevel_init file contained some hard-coded values to setup the RAM. These board related values are moved into the board configuration file. Signed-off-by: Stefano Babic sba...@denx.de --- cpu/arm_cortexa8/mx51/lowlevel_init.S |5 - include/configs/mx51evk.h |3 +++ 2 files changed, 7 insertions(+), 1 deletions(-) diff --git a/cpu/arm_cortexa8/mx51/lowlevel_init.S b/cpu/arm_cortexa8/mx51/lowlevel_init.S index 31af9e2..783c81f 100644 --- a/cpu/arm_cortexa8/mx51/lowlevel_init.S +++ b/cpu/arm_cortexa8/mx51/lowlevel_init.S @@ -158,6 +158,7 @@ /* Switch peripheral to PLL 3 */ ldr r0, =CCM_BASE_ADDR ldr r1, =0x10C0 + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL str r1, [r0, #CLKCTL_CBCMR] ldr r1, =0x13239145 str r1, [r0, #CLKCTL_CBCDR] @@ -171,6 +172,7 @@ ldr r1, =0x19239145 str r1, [r0, #CLKCTL_CBCDR] ldr r1, =0x20C0 + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL str r1, [r0, #CLKCTL_CBCMR] mov r3, #DP_OP_216 @@ -201,9 +203,10 @@ /* setup the rest */ /* Use lp_apm (24MHz) source for perclk */ ldr r1, =0x20C2 + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL str r1, [r0, #CLKCTL_CBCMR] /* ddr clock from PLL 1, all perclk dividers are 1 since using 24MHz */ - ldr r1, =0x59E35100 + ldr r1, =CONFIG_SYS_CLKTL_CBCDR str r1, [r0, #CLKCTL_CBCDR] /* Restore the default values in the Gate registers */ diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index e2daeca..5096ab7 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -177,6 +177,9 @@ #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE(512 * 1024 * 1024) +#define CONFIG_SYS_DDR_CLKSEL0 +#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 It's nice to have some comments about the value selected. + /* --- * FLASH and environment organization */ -- 1.6.3.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] SPI: added support for MX51 to mxc_spi
Hi,
-Original Message-
From: u-boot-boun...@lists.denx.de
[mailto:u-boot-boun...@lists.denx.de] On Behalf Of Stefano Babic
Sent: 2010年3月17日 0:22
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] SPI: added support for MX51 to mxc_spi
This patch add support for MX51 processor and supports
transfer of multiple word in a single transation.
Signed-off-by: Stefano Babic sba...@denx.de
---
The patch adds support for the MX51 and wants to remove some
limitation on the old driver. Actually, the buffer passed to
the transfer function must be word-aligne, even if it is
required to send a single byte.
drivers/spi/mxc_spi.c | 357
+
1 files changed, 301 insertions(+), 56 deletions(-)
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 3a45200..b04fadc 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -24,6 +24,11 @@
#include asm/errno.h
#include asm/io.h
+#define MXC_CSPIRXDATA 0x00
+#define MXC_CSPITXDATA 0x04
+#define MXC_CSPICTRL 0x08
+#define MXC_CSPIPERIOD_32KHZ (1 15)
+
#ifdef CONFIG_MX27
/* i.MX27 has a completely wrong register layout and
register definitions in the
* datasheet, the correct one is in the Freescale's Linux
driver */ @@ -31,13 +36,9 @@ #error i.MX27 CSPI not
supported due to drastic differences in register definisions
\ See linux mxc_spi driver from Freescale for details.
-#else
-
+#elif defined(CONFIG_MX31)
#include asm/arch/mx31.h
-#define MXC_CSPIRXDATA 0x00
-#define MXC_CSPITXDATA 0x04
-#define MXC_CSPICTRL 0x08
#define MXC_CSPIINT 0x0C
#define MXC_CSPIDMA 0x10
#define MXC_CSPISTAT 0x14
@@ -56,21 +57,63 @@
#define MXC_CSPICTRL_CHIPSELECT(x) (((x) 0x3) 24)
#define MXC_CSPICTRL_BITCOUNT(x) (((x) 0x1f) 8)
#define MXC_CSPICTRL_DATARATE(x) (((x) 0x7) 16)
+#define MXC_CSPICTRL_MAXBITS 0x1f
+#define MXC_CSPICTRL_TC (1 8)
+#define MXC_CSPICTRL_RXOVF (1 6)
#define MXC_CSPIPERIOD_32KHZ (1 15)
+#define MAX_SPI_BYTES4
static unsigned long spi_bases[] = {
0x43fa4000,
0x5001,
0x53f84000,
};
Here hardcode the value in mx31, while in mx51 it use the macro. Which makes
Code style not consistent.
+#elif defined(CONFIG_MX51)
+
+#define MXC_CSPICON 0x0C
+#define MXC_CSPIINT 0x10
+#define MXC_CSPIDMA 0x14
+#define MXC_CSPISTAT 0x18
+#define MXC_CSPIPERIOD 0x1C
+#define MXC_CSPIRESET0x00
+#include asm/arch/imx-regs.h
+#include asm/arch/clock.h
+#define MXC_CSPICTRL_EN (1 0)
+#define MXC_CSPICTRL_MODE(1 1)
+#define MXC_CSPICTRL_XCH (1 2)
+#define MXC_CSPICTRL_CHIPSELECT(x) (((x) 0x3) 12)
+#define MXC_CSPICTRL_BITCOUNT(x) (((x) 0xfff) 20)
+#define MXC_CSPICTRL_PREDIV(x) (((x) 0xF) 12)
+#define MXC_CSPICTRL_POSTDIV(x) (((x) 0xF) 8)
+#define MXC_CSPICTRL_SELCHAN(x) (((x) 0x3) 18)
+#define MXC_CSPICTRL_MAXBITS 0xfff
+#define MXC_CSPICTRL_TC (1 7)
+#define MXC_CSPICTRL_RXOVF (1 6)
+
+/* Bit position inside CTRL register to be associated with SS */
+#define MXC_CSPICTRL_CHAN18
+
+/* Bit position inside CON register to be associated with SS */
+#define MXC_CSPICON_POL 4
+#define MXC_CSPICON_PHA 0
+#define MXC_CSPICON_SSPOL12
+
+static unsigned long spi_bases[] = {
+ CSPI1_BASE_ADDR,
+ CSPI2_BASE_ADDR,
+ CSPI3_BASE_ADDR,
+};
See above comments.
+#else
+#error Unsupported architecture
#endif
struct mxc_spi_slave {
struct spi_slave slave;
unsigned long base;
u32 ctrl_reg;
+ u32 cfg_reg;
int gpio;
};
Only MX51 use it, MX31 will not use it.
@@ -89,71 +132,262 @@ static inline void reg_write(unsigned
long addr, u32 val)
*(volatile unsigned long*)addr = val;
}
-static u32 spi_xchg_single(struct spi_slave *slave, u32
data, int bitlen,
-unsigned long flags)
+void spi_cs_activate(struct spi_slave *slave)
{
+#ifdef CONFIG_MX31
struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
- unsigned int cfg_reg = reg_read(mxcs-base + MXC_CSPICTRL);
-
- mxcs-ctrl_reg = (mxcs-ctrl_reg ~MXC_CSPICTRL_BITCOUNT(31)) |
- MXC_CSPICTRL_BITCOUNT(bitlen - 1);
+ if (mxcs-gpio 0)
+ mx31_gpio_set(mxcs-gpio, mxcs-ctrl_reg
MXC_CSPICTRL_SSPOL);
+#endif }
- if (cfg_reg != mxcs-ctrl_reg)
- reg_write(mxcs-base + MXC_CSPICTRL, mxcs-ctrl_reg);
+void spi_cs_deactivate(struct spi_slave *slave) {
+ struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); #ifdef
+CONFIG_MX31
+ if (mxcs-gpio 0)
+ mx31_gpio_set(mxcs-gpio,
+
Re: [U-Boot] Uboot debugging clarification!
-Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Ramalingam C Sent: 2010年3月17日 22:34 To: U-Boot@lists.denx.de Subject: [U-Boot] Uboot debugging clarification! Hi! I am working on iMX515 processor in our project. Our evaluation board is iMX51EVK. We are using the uboot. For our board we have designed the NAND as storage device! But for our NAND chip we dont have the Advanced toolkit (freescale s/w) support! So we have to load the uboot binary to DDR2 through JTAG emulator and boot the uboot!. When we are trying this on iMX51EVK board by removing the SD card, control is going to a infinite loop. What kind of ininite loop? Where code place is it? The same binary is working if we store in the SD card of EVK board and boot! If we get the uboot running then we can store the uboot to NAND and proceed with our testing! It will be really helpful if you can help us in modifying the uboot such a way that it will boot from DDR2 itself. You mean boot uboot via JTAG? Thanks Regards, Ramalingam C. Larsen Toubro Ltd, Embedded System Software (EmSyS), Mysore Complex, KIADB Industrial Area, Hebbal-Hootagalli, Mysore, Karnataka, India - 570018. Mobile : +91 9611417479 Mail : ramalinga...@lntemsys.com LT EmSyS Proprietary LT EmSyS Confidential LT EmSyS Internal Use LT EmSyS General Business Your attempt may fail, but never fail to make an attempt.. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] u-boot-imx51 NAND flash Uncorrectable ECC Error
BR, Jason -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Stefano Babic Sent: 2010年3月10日 1:51 To: Navaneethan P Cc: u-boot@lists.denx.de Subject: Re: [U-Boot] u-boot-imx51 NAND flash Uncorrectable ECC Error Navaneethan P wrote: * *Hi Stefano Babic, Hi Navaneethan, I will kindly ask you to send your questions directly to the u-boot mailing list, too. This information can be helpful for other users of this board. And you get a large number of developers who could help you. We are using the imx51 babbage board with external NAND flash (NAND01GR3B2C , numonyx 8 bit, 2k page size, 1Gbit, 128k block size) connected. In the patchset I provided to the ML I will not set the iomux for NAND, because the babbage board (mx51evk) has no NAND at all. I suppose you have configured the iomux, too. Anything else you changed ? We are using the standard NAND driver from u-boot source (u-boot-2009.08). Initially nand read was not proper. I changed the read operation from auto operation to manual operation. After that time, some patches went to the mainline for the MXC NAND driver to support revision 1.1 of the Freescale's NAND controller. As I can see, the MX51 has version 1.1 as the MX25 (not really checked, but it seems so). MX51 NFC(nand flash controler) is not the MX25 like. There is Big difference.MX51 support auto-mode and the register is 32-bit width While MX25 not that. I think it makes sense if you align your code with the actual u-boot top of tree, that you can find on git.denx.de Now, write, read, and erase are seems to be working fine. When we write the filesystem/linux kernel, there seems to be a byte error. Means, one byte mismatch between the written data read data. Example, (written data != read data) byte at 0x90800457 (0xff) != byte at 0x90c00457 (0x92) byte at 0x90800458 (0x92) != byte at 0x90c00458 (0xff) byte at 0x9080045a (0xff) != byte at 0x90c0045a (0xea) byte at 0x9080045a (0xff) != byte at 0x90c0045a (0xea) byte at 0x9080045b (0xea) != byte at 0x90c0045b (0x4f) byte at 0x9080045c (0x4f) != byte at 0x90c0045c (0x00) byte at 0x9080045e (0x00) != byte at 0x90c0045e (0xea) When we read the linux kernel, it is giving Uncorrectable RS ECC Error Kernel print out Uncorrectable RS ECC Error means the data corruption and the HW ECC of NFC can't correct it. It may due to the NAND driver. BTW, please make sure erase the block first when you operate on MLC nand flash since NOP=1. Ok, this is understandable, if the values read are not what you wanted to write. It seems each byte is written at the next address. I have not yet an explanation, but maybe someone else in the ML can help. Regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V5 03/11] MX51: Add register definitions
Hi, Babic -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Stefano Babic Sent: 2010年3月5日 3:22 To: u-boot@lists.denx.de Subject: [U-Boot] [PATCH V5 03/11] MX51: Add register definitions The patch add header files to support the Freescale i.MX51 processor, setting definitions for internal registers. Signed-off-by: Stefano Babic sba...@denx.de Signed-off-by: Fred Fan fanyef...@gmail.com --- Changes since last version: Removed enum mxc_clock (moved in clock.h) from imx-regs.h (required to remove warnings during compilation). include/asm-arm/arch-mx51/asm-offsets.h | 50 ++ include/asm-arm/arch-mx51/crm_regs.h| 192 ++ include/asm-arm/arch-mx51/imx-regs.h| 272 +++ 3 files changed, 514 insertions(+), 0 deletions(-) create mode 100644 include/asm-arm/arch-mx51/asm-offsets.h create mode 100644 include/asm-arm/arch-mx51/crm_regs.h create mode 100644 include/asm-arm/arch-mx51/imx-regs.h +/*! + * NFMS bit in RCSR register for pagesize of nandflash */ +#define NFMS(*((volatile u32 *)(CCM_BASE_ADDR+0x18))) +#define NFMS_BIT8 +#define NFMS_NF_DWIDTH 14 +#define NFMS_NF_PG_SZ 8 This NFMS register definion is wrong and more MX51 does not have such kind of NFMS register. Which is in I.MX25/35. Please remove it to avoid confusion. + +extern unsigned int get_board_rev(void); extern int is_soc_rev(int +rev); + +#endif /* __ASSEMBLER__*/ + +#endif /* __ASM_ARCH_MXC_MX51_H__ */ -- 1.6.3.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Save environment data to mmc.
Hi, Terry,
-Original Message-
From: u-boot-boun...@lists.denx.de
[mailto:u-boot-boun...@lists.denx.de] On Behalf Of Lv Terry-R65388
Sent: 2010年3月4日 11:01
To: Stefano Babic
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH] Save environment data to mmc.
Hi Babic,
Thanks for reviewing the patch.
I will send out a new patch to fix the problems you point out.
For setting block numbers for MMC offset, I just don't
want env mmc to be different. I want users to use it as
similiar as other env devices.
For the initalization for ARM and PPC, It will be added
for all architectures.
Thanks a lot ~~
Had better not put comments on the top of the email, need follow the community
style.
Yours
Terry
-Original Message-
From: Stefano Babic [mailto:sba...@denx.de]
Sent: 2010年3月3日 1:03
To: Lv Terry-R65388
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH] Save environment data to mmc.
Terry Lv wrote:
diff --git a/common/env_mmc.c b/common/env_mmc.c
+#include linux/stddef.h
+#include malloc.h
+#include mmc.h
+
+#if defined(CONFIG_CMD_ENV) defined(CONFIG_CMD_MMC)
This seems not correct. If not explicitely set, we get a
compiler error.
Assuming you has taken this check from env_nand.c, this should be:
#if defined(CONFIG_CMD_SAVEENV) defined(CONFIG_CMD_MMC)
+#define CMD_SAVEENV
+#elif defined(CONFIG_ENV_OFFSET_REDUND) #error Cannot use
+CONFIG_ENV_OFFSET_REDUND without CONFIG_CMD_ENV CONFIG_CMD_MMC
Line too long.
+#endif
+
+#if defined(CONFIG_ENV_SIZE_REDUND) (CONFIG_ENV_SIZE_REDUND
+CONFIG_ENV_SIZE)
Ditto.
+
+#ifdef CMD_SAVEENV
+
+inline int write_env(struct mmc *mmc, unsigned long size,
+ unsigned long
offset, const void *buffer)
Line too long.
+{
+ uint blk_start = 0, blk_cnt = 0, n = 0;
+
+ blk_start = (offset % 512) ? ((offset / 512) + 1) :
(offset / 512);
+ blk_cnt = (size % 512) ? ((size / 512) + 1) : (size / 512);
The alignment to block size is repeated here and in the read function.
Should not better to set a macro (something like BLOCK_ALIGN)
providing the required alignment ?
+int saveenv(void)
+{
+ struct mmc *mmc = find_mmc_device(0);
Why is the MMC device hard-coded ? At least should be
configurable with a CONFIG_ option. There are boards with
more than one MMC controller and you constraint to use always
the first one.
+ blk_start = (offset % 512) ? ((offset / 512) + 1) :
(offset / 512);
Already said, a macro is much more readable to perform alignment.
diff --git a/include/environment.h b/include/environment.h
+#if defined(CONFIG_ENV_IS_IN_MMC)
+# ifndef CONFIG_ENV_OFFSET
+# error Need to define CONFIG_ENV_OFFSET when using
CONFIG_ENV_IS_IN_MMC
+# endif
+# ifndef CONFIG_ENV_ADDR
+# define CONFIG_ENV_ADDR (CONFIG_ENV_OFFSET)
+# endif
+# ifndef CONFIG_ENV_OFFSET
+# define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) # endif # ifdef
+CONFIG_ENV_OFFSET_REDUND # define
CONFIG_SYS_REDUNDAND_ENVIRONMENT #
+endif # ifdef CONFIG_ENV_IS_EMBEDDED
+# define ENV_IS_EMBEDDED 1
+# endif
+#endif /* CONFIG_ENV_IS_IN_MMC */
You missed Wolfgang's comment. I think also that there is no
reason to set offset for the MMC and block numbers makes more sense.
+
/* Embedded env is only supported for some flash types */ #ifdef
CONFIG_ENV_IS_EMBEDDED # if !defined(CONFIG_ENV_IS_IN_FLASH) \
diff --git a/lib_arm/board.c b/lib_arm/board.c index
5e3d7f6..f846d0d
100644
+#ifdef CONFIG_GENERIC_MMC
+ puts (MMC: );
+ mmc_initialize (gd-bd);
+#endif
diff --git a/lib_ppc/board.c b/lib_ppc/board.c index
765f97a..9b3f84c
100644
--- a/lib_ppc/board.c
+++ b/lib_ppc/board.c
@@ -776,6 +776,12 @@ void board_init_r (gd_t *id, ulong dest_addr)
nand_init();/* go init the NAND */
#endif
+#ifdef CONFIG_GENERIC_MMC
+ WATCHDOG_RESET ();
+ puts (MMC: );
+ mmc_initialize (bd);
+#endif
I am quite confused. You add the initialization only for ARM and PPC.
What about the other architectures ?
I tested your patch on mx51evk, environment is correctly
read/written on the SD situated on the back.
Regards,
Stefano
--
=
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email:
off...@denx.de
=
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