Re: [PATCH v1] tee: sandbox: check for buffer size

2024-04-22 Thread Oleksandr Suvorov
On Sun, Apr 21, 2024 at 11:48 PM Igor Opaniuk  wrote:
>
> Add additional check for buffer size when reading out persistent
> storage value and provide back actual value size.
>
> Signed-off-by: Igor Opaniuk 
Reviewed-by: Oleksandr Suvorov 

> ---
>
>  drivers/tee/sandbox.c | 10 +++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/tee/sandbox.c b/drivers/tee/sandbox.c
> index 8ad7c09efdd..86b16a3bb8d 100644
> --- a/drivers/tee/sandbox.c
> +++ b/drivers/tee/sandbox.c
> @@ -174,7 +174,7 @@ static u32 ta_avb_invoke_func(struct udevice *dev, u32 
> func, uint num_params,
> uint slot;
> u64 val;
> char *value;
> -   u32 value_sz;
> +   u32 value_sz, tmp_sz;
>
> switch (func) {
> case TA_AVB_CMD_READ_ROLLBACK_INDEX:
> @@ -267,8 +267,12 @@ static u32 ta_avb_invoke_func(struct udevice *dev, u32 
> func, uint num_params,
> if (!ep)
> return TEE_ERROR_ITEM_NOT_FOUND;
>
> -   value_sz = strlen(ep->data) + 1;
> -   memcpy(value, ep->data, value_sz);
> +   tmp_sz = strlen(ep->data) + 1;
> +   if (value_sz < tmp_sz)
> +   return TEE_ERROR_SHORT_BUFFER;
> +
> +   memcpy(value, ep->data, tmp_sz);
> +   params[1].u.memref.size = tmp_sz;
>
> return TEE_SUCCESS;
> case TA_AVB_CMD_WRITE_PERSIST_VALUE:
> --
> 2.34.1
>


-- 
Best regards,

Oleksandr Suvorov
Software Engineer
T: +380 63 8489656
E: oleksandr.suvo...@foundries.io
W: www.foundries.io


Re: [PATCH v2] qemu-arm: round down memory to multiple of 2MB for LPAE

2024-02-01 Thread Oleksandr Suvorov
On Thu, Feb 1, 2024, 14:41 Igor Opaniuk  wrote:

> QEMU's -m option can take fractional megabyte values,
> and lowest granularity seems to be 0x2000.
> For example, run qemu with amount of memory set to 15k (0x61A9400):
>
> $ qemu-system-arm -machine virt -cpu cortex-a15 -m 15k \
> -bios denx/u-boot.bin -nographic
>
> => fdt addr $fdt_addr
> => fdt print /memory@4000
> memory@4000 {
> reg = <0x 0x4000 0x 0x061aa000>;
> device_type = "memory";
> };
>
> When LPAE is enabled, 1:1 mapping is created using 2 MB blocks.
> In case amount of memory provided to QEMU is not multiple
> of 2 MB, hang occurs during MMU initialization.
>
> How to reproduce:
> qemu-system-arm -machine virt -m 1058 -nographic -bios u-boot.bin - boots
> qemu-system-arm -machine virt -m 1057 -nographic -bios u-boot.bin - hangs
>
> DRAM:  1 GiB
> initcall: 60011df8
> initcall: 60011904
> New Stack Pointer is: 80fffe90
> initcall: 60011a20
> initcall: 60011bcc
> initcall: 60011bd4
> initcall: 600119b4
> Relocation Offset is: 22042000
> Relocating to 82042000, new gd at 81001ed0, sp at 80fffe90
> initcall: 60011b8c
> initcall: 82053ea0
> initcall: 82053ea8
> initcall: 60012040 (relocated to 82054040)
> dram_bank_mmu_setup: bank: 0
> - hang here during mmu init -
>
> This patches rounds down to the nearest multiple of 2MB when
> CONFIG_ARMV7_LPAE=y.
>
> Fixes: 3fa914af82("arm: qemu: implement enable_caches()")
> Signed-off-by: Igor Opaniuk 
>

Reviewed-by: Oleksandr Suvorov >

> ---
>
> Changes in v2:
> - Adjust commit message, add more details
>
>  board/emulation/qemu-arm/qemu-arm.c | 12 
>  1 file changed, 12 insertions(+)
>
> diff --git a/board/emulation/qemu-arm/qemu-arm.c
> b/board/emulation/qemu-arm/qemu-arm.c
> index 942f1fff571..ecfd19f1a7e 100644
> --- a/board/emulation/qemu-arm/qemu-arm.c
> +++ b/board/emulation/qemu-arm/qemu-arm.c
> @@ -127,6 +127,18 @@ int dram_init(void)
> if (fdtdec_setup_mem_size_base() != 0)
> return -EINVAL;
>
> +   /*
> +* When LPAE is enabled (ARMv7),
> +* 1:1 mapping is created using 2 MB blocks.
> +*
> +* In case amount of memory provided to QEMU
> +* is not multiple of 2 MB, round down the amount
> +* of available memory to avoid hang during MMU
> +* initialization.
> +*/
> +   if (CONFIG_IS_ENABLED(ARMV7_LPAE))
> +   gd->ram_size -= (gd->ram_size % 0x20);
> +
> return 0;
>  }
>
> --
> 2.34.1
>
>


[PATCH v2] mach-imx: bootaux: fix building with disabled bootelf

2023-08-31 Thread Oleksandr Suvorov
If CMD_ELF disabled and IMX_BOOTAUX enabled, the u-boot building ends
up with a linking error [1]. Select LIB_ELF to fix the building
issue.

[1]
ld: /tmp/ccaF1rpv.ltrans0.ltrans.o: in function `do_bootaux':
arch/arm/mach-imx/imx_bootaux.c:108: undefined reference to `valid_elf_image'

Fixes: c0f037f6a2a ("mach-imx: bootaux: elf firmware support")
Signed-off-by: Oleksandr Suvorov 
---

Changes in v2:
- select LIB_ELF unconditionally

 arch/arm/mach-imx/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index d94b5828d0d..fda762426ef 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -32,6 +32,7 @@ config IMX_RDC
 config IMX_BOOTAUX
bool "Support boot auxiliary core"
depends on ARCH_MX7 || ARCH_MX6 || ARCH_VF610 || ARCH_IMX8 || ARCH_IMX8M
+   select LIB_ELF
help
  bootaux [addr] to boot auxiliary core.
 
-- 
2.41.0



Re: [PATCH] mach-imx: bootaux: fix building with disabled bootelf

2023-08-31 Thread Oleksandr Suvorov
Hi Tom,

On Sun, Aug 27, 2023 at 2:50 AM Tom Rini  wrote:
>
> On Sat, Aug 26, 2023 at 06:16:36PM +0300, Oleksandr Suvorov wrote:
> > Hi Heinrich,
> >
> > On Sat, Aug 26, 2023 at 4:46 PM Heinrich Schuchardt  
> > wrote:
> > >
> > > On 8/26/23 15:24, Oleksandr Suvorov wrote:
> > > > If CMD_ELF disabled and IMX_BOOTAUX enabled, the u-boot building ends
> > > > up with a linking error [1]. Select LIB_ELF for all cases when
> > > > valid_elf_image() is used in the imx_bootaux module.
> > > >
> > > > [1]
> > > > ld: /tmp/ccaF1rpv.ltrans0.ltrans.o: in function `do_bootaux':
> > > > arch/arm/mach-imx/imx_bootaux.c:108: undefined reference to 
> > > > `valid_elf_image'
> > > >
> > > > Fixes: c0f037f6a2a ("mach-imx: bootaux: elf firmware support")
> > > > Signed-off-by: Oleksandr Suvorov 
> > > > ---
> > > >
> > > >   arch/arm/mach-imx/Kconfig | 1 +
> > > >   1 file changed, 1 insertion(+)
> > > >
> > > > diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
> > > > index d94b5828d0d..cbe62d6b8f9 100644
> > > > --- a/arch/arm/mach-imx/Kconfig
> > > > +++ b/arch/arm/mach-imx/Kconfig
> > > > @@ -32,6 +32,7 @@ config IMX_RDC
> > > >   config IMX_BOOTAUX
> > > >   bool "Support boot auxiliary core"
> > > >   depends on ARCH_MX7 || ARCH_MX6 || ARCH_VF610 || ARCH_IMX8 || 
> > > > ARCH_IMX8M
> > > > + select LIB_ELF if !ARCH_IMX8 || IMX8QXP
> > >
> > > For CONFIG_IMX8QXP=y arch/arm/mach-imx/imx8/cpu.c uses valid_elf_image().
> > >
> > > Shouldn't the IMX8QXP case be handled in arch/arm/mach-imx/imx8/Kconfig?
> > >
> > > config IMX8QXP
> > > select LIB_ELF
> >
> > We need to select LIB_ELF for this SoC only if IMX_BOOTAUX is enabled:
> > the arch/arm/mach-imx/imx8/cpu.c guards with #ifdef CONFIG_IMX_BOOTAUX
> > functions that
> > call lib/elf.o members.
>
> And what about the rest of the platforms above?  There's certainly some
> missing Kconfig enforcement of requirements, but I suspect it's wider
> than just one set of SoC families for a long-standing feature.

You may be right. As bootaux command implementation for other boards
may use elf functionality in future, it
would be better to enable LIB_ELF unconditionally.

>
> --
> Tom



-- 
Best regards,

Oleksandr Suvorov
Software Engineer
T: +380 63 8489656
E: oleksandr.suvo...@foundries.io
W: www.foundries.io


Re: [PATCH v2] spl: watchdog: introduce SPL_HW_WATCHDOG

2023-08-29 Thread Oleksandr Suvorov
Hi Stefan,

On Mon, Aug 28, 2023 at 5:30 PM Stefan Roese  wrote:
>
> Hi Oleksandr,
>
> On 8/28/23 15:23, Oleksandr Suvorov wrote:
> > Hi Stefan,
> >
> > On Thu, Aug 24, 2023 at 2:24 PM Stefan Roese  wrote:
> >>
> >> On 8/23/23 14:00, Oleksandr Suvorov wrote:
> >>> Add SPL_HW_WATCHDOG Kconfig symbol which can be used to enable
> >>> non-WDT hardware watchdog in SPL.
> >>
> >> Hmmm, my hope / plan was to completely drop HW_WATCHDOG at some point.
> >> It's some old relict and if I don't miss something completely, it's more
> >> a "normal" watchdog that needs to get triggered very early in most
> >> cases (PowerPC etc).
> >
> > Oh, it's a good approach, thanks.
>
> Good that we agree. But...
>
> >> So adding some more *_HW_WATCHDOG stuff does not sound appealing to me.
> >> Could you perhaps investigate a bit, if your HW_WATCHDOG use case can
> >> be converted to the "normal" watchdog support instead?
> >
> > We just need to be able to exclude a hardware watchdog from SPL to
> > save some memory.
>
> Did you already enable LTO so decrease the image size? Just checking.

We use SPL->OP-TEE->U-boot booting scheme instead of standard
SPL->U-boot->OP-TEE, so SPL in our distro needs more preparation
than usual :) So LTO helps but doesn't solve a size issue for some SoCs.

> > So I resign this patch and we'll wait for your work and then revise
> > what we have again.
>
> ...but: Actually I don't have any plans to do this rework myself. At
> least not short-term. My hope was that someone for the platforms using
> this HW_WATCHDOG stuff would jump in here. ;)

Got it :) I'm looking into that stuff in a ~month.

> Thanks,
> Stefan
>
> >> Thanks,
> >> Stefan
> >
> > Cheers,
> > Oleksandr
> >
> >>
> >>> Co-developed-by: Igor Opaniuk 
> >>> Signed-off-by: Igor Opaniuk 
> >>> Signed-off-by: Oleksandr Suvorov 
> >>> ---
> >>>
> >>> Changes in v2:
> >>> - remove mistakenly included unwanted changes
> >>>
> >>>common/spl/Kconfig| 1 -
> >>>drivers/Makefile  | 1 +
> >>>drivers/sysreset/Kconfig  | 6 ++
> >>>drivers/sysreset/Makefile | 2 +-
> >>>drivers/watchdog/Kconfig  | 4 
> >>>5 files changed, 12 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/common/spl/Kconfig b/common/spl/Kconfig
> >>> index c5dd476db58..07d9dac29bd 100644
> >>> --- a/common/spl/Kconfig
> >>> +++ b/common/spl/Kconfig
> >>> @@ -1351,7 +1351,6 @@ config SPL_THERMAL
> >>>
> >>>config SPL_WATCHDOG
> >>>bool "Support watchdog drivers"
> >>> - imply SPL_WDT if !HW_WATCHDOG
> >>>help
> >>>  Enable support for watchdog drivers in SPL. A watchdog is
> >>>  typically a hardware peripheral which can reset the system when 
> >>> it
> >>> diff --git a/drivers/Makefile b/drivers/Makefile
> >>> index efc2a4afb24..2eb8ec0a894 100644
> >>> --- a/drivers/Makefile
> >>> +++ b/drivers/Makefile
> >>> @@ -62,6 +62,7 @@ obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/
> >>>obj-$(CONFIG_SPL_USB_GADGET) += usb/common/
> >>>obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/
> >>>obj-$(CONFIG_SPL_WATCHDOG) += watchdog/
> >>> +obj-$(CONFIG_SPL_HW_WATCHDOG) += watchdog/
> >>>obj-$(CONFIG_SPL_USB_HOST) += usb/host/
> >>>obj-$(CONFIG_SPL_SATA) += ata/ scsi/
> >>>obj-$(CONFIG_SPL_LEGACY_BLOCK) += block/
> >>> diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
> >>> index bdbe2a95364..0d21673e402 100644
> >>> --- a/drivers/sysreset/Kconfig
> >>> +++ b/drivers/sysreset/Kconfig
> >>> @@ -157,6 +157,12 @@ config SYSRESET_WATCHDOG
> >>>help
> >>>  Reboot support for generic watchdog reset.
> >>>
> >>> +config SPL_SYSRESET_WATCHDOG
> >>> + bool "Enable support for watchdog reboot driver in SPL mode"
> >>> + select SPL_WDT
> >>> + help
> >>> +   Reboot support for generic watchdog reset in SPL mode.
> >>> +
> >>>config SYSRESET_WATCHDOG_AUTO
> >>>bool "Automatically register first watchdog with sysreset"
> >>>depe

Re: [PATCH v2] spl: watchdog: introduce SPL_HW_WATCHDOG

2023-08-28 Thread Oleksandr Suvorov
Hi Stefan,

On Thu, Aug 24, 2023 at 2:24 PM Stefan Roese  wrote:
>
> On 8/23/23 14:00, Oleksandr Suvorov wrote:
> > Add SPL_HW_WATCHDOG Kconfig symbol which can be used to enable
> > non-WDT hardware watchdog in SPL.
>
> Hmmm, my hope / plan was to completely drop HW_WATCHDOG at some point.
> It's some old relict and if I don't miss something completely, it's more
> a "normal" watchdog that needs to get triggered very early in most
> cases (PowerPC etc).

Oh, it's a good approach, thanks.

> So adding some more *_HW_WATCHDOG stuff does not sound appealing to me.
> Could you perhaps investigate a bit, if your HW_WATCHDOG use case can
> be converted to the "normal" watchdog support instead?

We just need to be able to exclude a hardware watchdog from SPL to
save some memory.
So I resign this patch and we'll wait for your work and then revise
what we have again.

> Thanks,
> Stefan

Cheers,
Oleksandr

>
> > Co-developed-by: Igor Opaniuk 
> > Signed-off-by: Igor Opaniuk 
> > Signed-off-by: Oleksandr Suvorov 
> > ---
> >
> > Changes in v2:
> > - remove mistakenly included unwanted changes
> >
> >   common/spl/Kconfig| 1 -
> >   drivers/Makefile  | 1 +
> >   drivers/sysreset/Kconfig  | 6 ++
> >   drivers/sysreset/Makefile | 2 +-
> >   drivers/watchdog/Kconfig  | 4 
> >   5 files changed, 12 insertions(+), 2 deletions(-)
> >
> > diff --git a/common/spl/Kconfig b/common/spl/Kconfig
> > index c5dd476db58..07d9dac29bd 100644
> > --- a/common/spl/Kconfig
> > +++ b/common/spl/Kconfig
> > @@ -1351,7 +1351,6 @@ config SPL_THERMAL
> >
> >   config SPL_WATCHDOG
> >   bool "Support watchdog drivers"
> > - imply SPL_WDT if !HW_WATCHDOG
> >   help
> > Enable support for watchdog drivers in SPL. A watchdog is
> > typically a hardware peripheral which can reset the system when it
> > diff --git a/drivers/Makefile b/drivers/Makefile
> > index efc2a4afb24..2eb8ec0a894 100644
> > --- a/drivers/Makefile
> > +++ b/drivers/Makefile
> > @@ -62,6 +62,7 @@ obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/
> >   obj-$(CONFIG_SPL_USB_GADGET) += usb/common/
> >   obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/
> >   obj-$(CONFIG_SPL_WATCHDOG) += watchdog/
> > +obj-$(CONFIG_SPL_HW_WATCHDOG) += watchdog/
> >   obj-$(CONFIG_SPL_USB_HOST) += usb/host/
> >   obj-$(CONFIG_SPL_SATA) += ata/ scsi/
> >   obj-$(CONFIG_SPL_LEGACY_BLOCK) += block/
> > diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
> > index bdbe2a95364..0d21673e402 100644
> > --- a/drivers/sysreset/Kconfig
> > +++ b/drivers/sysreset/Kconfig
> > @@ -157,6 +157,12 @@ config SYSRESET_WATCHDOG
> >   help
> > Reboot support for generic watchdog reset.
> >
> > +config SPL_SYSRESET_WATCHDOG
> > + bool "Enable support for watchdog reboot driver in SPL mode"
> > + select SPL_WDT
> > + help
> > +   Reboot support for generic watchdog reset in SPL mode.
> > +
> >   config SYSRESET_WATCHDOG_AUTO
> >   bool "Automatically register first watchdog with sysreset"
> >   depends on SYSRESET_WATCHDOG
> > diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
> > index 40c876764af..e5a7fc07a81 100644
> > --- a/drivers/sysreset/Makefile
> > +++ b/drivers/sysreset/Makefile
> > @@ -18,7 +18,7 @@ obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
> >   obj-$(CONFIG_SYSRESET_SOCFPGA_SOC64) += sysreset_socfpga_soc64.o
> >   obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o
> >   obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
> > -obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
> > +obj-$(CONFIG_$(SPL_)SYSRESET_WATCHDOG) += sysreset_watchdog.o
> >   obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o
> >   obj-$(CONFIG_$(SPL_TPL_)SYSRESET_AT91) += sysreset_at91.o
> >   obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o
> > diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> > index 07fc4940e91..d696a04fc18 100644
> > --- a/drivers/watchdog/Kconfig
> > +++ b/drivers/watchdog/Kconfig
> > @@ -39,9 +39,13 @@ config WATCHDOG_TIMEOUT_MSECS
> >   config HW_WATCHDOG
> >   bool
> >
> > +config SPL_HW_WATCHDOG
> > + bool
> > +
> >   config IMX_WATCHDOG
> >   bool "Enable Watchdog Timer support for IMX and LSCH2 of NXP"
> >   select HW_WATCHDOG if !WDT
> > + select SPL_HW_WATCHDOG if !SPL_WDT
> >   help
> > Select this to enable the IMX and LSCH2 of Layerscape watchdog
> > driver.
>
> Viele Grüße,
> Stefan Roese
>
> --
> DENX Software Engineering GmbH,  Managing Director: Erika Unter
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de



-- 
Best regards
Oleksandr

Oleksandr Suvorov
cryo...@gmail.com


Re: [PATCH] mach-imx: bootaux: fix building with disabled bootelf

2023-08-26 Thread Oleksandr Suvorov
Hi Heinrich,

On Sat, Aug 26, 2023 at 4:46 PM Heinrich Schuchardt  wrote:
>
> On 8/26/23 15:24, Oleksandr Suvorov wrote:
> > If CMD_ELF disabled and IMX_BOOTAUX enabled, the u-boot building ends
> > up with a linking error [1]. Select LIB_ELF for all cases when
> > valid_elf_image() is used in the imx_bootaux module.
> >
> > [1]
> > ld: /tmp/ccaF1rpv.ltrans0.ltrans.o: in function `do_bootaux':
> > arch/arm/mach-imx/imx_bootaux.c:108: undefined reference to 
> > `valid_elf_image'
> >
> > Fixes: c0f037f6a2a ("mach-imx: bootaux: elf firmware support")
> > Signed-off-by: Oleksandr Suvorov 
> > ---
> >
> >   arch/arm/mach-imx/Kconfig | 1 +
> >   1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
> > index d94b5828d0d..cbe62d6b8f9 100644
> > --- a/arch/arm/mach-imx/Kconfig
> > +++ b/arch/arm/mach-imx/Kconfig
> > @@ -32,6 +32,7 @@ config IMX_RDC
> >   config IMX_BOOTAUX
> >   bool "Support boot auxiliary core"
> >   depends on ARCH_MX7 || ARCH_MX6 || ARCH_VF610 || ARCH_IMX8 || 
> > ARCH_IMX8M
> > + select LIB_ELF if !ARCH_IMX8 || IMX8QXP
>
> For CONFIG_IMX8QXP=y arch/arm/mach-imx/imx8/cpu.c uses valid_elf_image().
>
> Shouldn't the IMX8QXP case be handled in arch/arm/mach-imx/imx8/Kconfig?
>
> config IMX8QXP
> select LIB_ELF

We need to select LIB_ELF for this SoC only if IMX_BOOTAUX is enabled:
the arch/arm/mach-imx/imx8/cpu.c guards with #ifdef CONFIG_IMX_BOOTAUX
functions that
call lib/elf.o members.

Cheers,

Oleksandr

> Best regards
>
> Heinrich
>
> >   help
> > bootaux [addr] to boot auxiliary core.
> >
>


-- 
Best regards,

Oleksandr Suvorov
Software Engineer
T: +380 63 8489656
E: oleksandr.suvo...@foundries.io
W: www.foundries.io


[PATCH] mach-imx: bootaux: fix building with disabled bootelf

2023-08-26 Thread Oleksandr Suvorov
If CMD_ELF disabled and IMX_BOOTAUX enabled, the u-boot building ends
up with a linking error [1]. Select LIB_ELF for all cases when
valid_elf_image() is used in the imx_bootaux module.

[1]
ld: /tmp/ccaF1rpv.ltrans0.ltrans.o: in function `do_bootaux':
arch/arm/mach-imx/imx_bootaux.c:108: undefined reference to `valid_elf_image'

Fixes: c0f037f6a2a ("mach-imx: bootaux: elf firmware support")
Signed-off-by: Oleksandr Suvorov 
---

 arch/arm/mach-imx/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index d94b5828d0d..cbe62d6b8f9 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -32,6 +32,7 @@ config IMX_RDC
 config IMX_BOOTAUX
bool "Support boot auxiliary core"
depends on ARCH_MX7 || ARCH_MX6 || ARCH_VF610 || ARCH_IMX8 || ARCH_IMX8M
+   select LIB_ELF if !ARCH_IMX8 || IMX8QXP
help
  bootaux [addr] to boot auxiliary core.
 
-- 
2.41.0



[PATCH] ARM: imx8ulp: support env in fat and ext4

2023-08-25 Thread Oleksandr Suvorov
From: Ricardo Salveti 

Change boot device logic to also allow environment stored in fat and
in ext4 when booting from SD or eMMC.

As the boot device check for SD and for eMMC was depending on
ENV_IS_IN_MMC being defined, change the ifdef blocks at
env_get_location to use IS_ENABLED instead for all modes, returning
NOWHERE when no valid mode is found.

Signed-off-by: Ricardo Salveti 
Co-developed-by: Oleksandr Suvorov 
Signed-off-by: Oleksandr Suvorov 
---

 arch/arm/mach-imx/imx8ulp/soc.c | 28 
 1 file changed, 12 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index e23cf60d126..4c435ce94ef 100644
--- a/arch/arm/mach-imx/imx8ulp/soc.c
+++ b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -870,33 +870,29 @@ u32 spl_arch_boot_image_offset(u32 image_offset, u32 
rom_bt_dev)
 enum env_location env_get_location(enum env_operation op, int prio)
 {
enum boot_device dev = get_boot_device();
-   enum env_location env_loc = ENVL_UNKNOWN;
 
if (prio)
-   return env_loc;
+   return ENVL_UNKNOWN;
 
switch (dev) {
-#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
case QSPI_BOOT:
-   env_loc = ENVL_SPI_FLASH;
-   break;
-#endif
-#ifdef CONFIG_ENV_IS_IN_MMC
+   if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
+   return ENVL_SPI_FLASH;
+   return ENVL_NOWHERE;
case SD1_BOOT:
case SD2_BOOT:
case SD3_BOOT:
case MMC1_BOOT:
case MMC2_BOOT:
case MMC3_BOOT:
-   env_loc =  ENVL_MMC;
-   break;
-#endif
+   if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
+   return ENVL_MMC;
+   else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4))
+   return ENVL_EXT4;
+   else if (CONFIG_IS_ENABLED(ENV_IS_IN_FAT))
+   return ENVL_FAT;
+   return ENVL_NOWHERE;
default:
-#if defined(CONFIG_ENV_IS_NOWHERE)
-   env_loc = ENVL_NOWHERE;
-#endif
-   break;
+   return ENVL_NOWHERE;
}
-
-   return env_loc;
 }
-- 
2.41.0



[PATCH] Revert "arm: imx: mx7: Move CONFIG_OPTEE_TZDRAM_SIZE from lib/optee"

2023-08-25 Thread Oleksandr Suvorov
From: Ricardo Salveti 

This reverts commit c5b68ef8af3c2f515c1f5b8d63a69359a85d753b.

CONFIG_OPTEE_TZDRAM_SIZE is used by imx6-based SoCs as well. Move the
option back.

Signed-off-by: Ricardo Salveti 
Signed-off-by: Oleksandr Suvorov 
---

 arch/arm/mach-imx/mx7/Kconfig | 8 
 lib/optee/Kconfig | 8 
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig
index 0bb18f65200..3c0208e13dd 100644
--- a/arch/arm/mach-imx/mx7/Kconfig
+++ b/arch/arm/mach-imx/mx7/Kconfig
@@ -24,14 +24,6 @@ config SPL_TEXT_BASE
depends on SPL
default 0x00912000
 
-config OPTEE_TZDRAM_SIZE
-   hex "Amount of Trust-Zone RAM for the OPTEE image"
-   default 0x000
-   depends on OPTEE_LIB
-   help
- The size of pre-allocated Trust Zone DRAM to allocate for the OPTEE
- runtime.
-
 choice
prompt "MX7 board select"
optional
diff --git a/lib/optee/Kconfig b/lib/optee/Kconfig
index 517136a4485..e6834d4d3e1 100644
--- a/lib/optee/Kconfig
+++ b/lib/optee/Kconfig
@@ -11,6 +11,14 @@ config OPTEE_IMAGE
  This option enable the OPTEE specific checks done before booting
  an OPTEE image created with mkimage
 
+config OPTEE_TZDRAM_SIZE
+   hex "Amount of Trust-Zone RAM for the OPTEE image"
+   default 0x000
+   depends on OPTEE_LIB
+   help
+ The size of pre-allocated Trust Zone DRAM to allocate for the OPTEE
+ runtime.
+
 config BOOTM_OPTEE
bool "Support OPTEE bootm command"
select BOOTM_LINUX
-- 
2.41.0



Re: [PATCH v2] usb: dwc3: Fix renaming SPL_USB_HOST_SUPPORT to SPL_USB_HOST

2023-08-25 Thread Oleksandr Suvorov
On Fri, Aug 25, 2023 at 1:39 PM Marek Vasut  wrote:
>
> On 8/25/23 12:27, Oleksandr Suvorov wrote:
> > On Wed, Aug 23, 2023 at 9:29 PM Marek Vasut  wrote:
> >>
> >> On 8/23/23 20:21, Oleksandr Suvorov wrote:
> >>> In the usb/dwc3-layerscape driver the first option should be renamed
> >>> to the latter as well. Do it.
> >>>
> >>> Fixes: 333e4a621df ("Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOST")
> >>> Signed-off-by: Oleksandr Suvorov 
> >>> ---
> >>>
> >>> Changes in v2:
> >>> - [asked by Tom Rini] shrink the code using CONFIG_IS_ENABLED()
> >>>
> >>>drivers/usb/dwc3/dwc3-layerscape.c | 5 ++---
> >>>1 file changed, 2 insertions(+), 3 deletions(-)
> >>>
> >>> diff --git a/drivers/usb/dwc3/dwc3-layerscape.c 
> >>> b/drivers/usb/dwc3/dwc3-layerscape.c
> >>> index 79cf71f7a85..58baa017ad1 100644
> >>> --- a/drivers/usb/dwc3/dwc3-layerscape.c
> >>> +++ b/drivers/usb/dwc3/dwc3-layerscape.c
> >>> @@ -134,8 +134,7 @@ U_BOOT_DRIVER(dwc3_layerscape_peripheral) = {
> >>>};
> >>>#endif
> >>>
> >>> -#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
> >>> - !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST)
> >>> +#if CONFIG_IS_ENABLED(USB_HOST)
> >>>static int dwc3_layerscape_host_probe(struct udevice *dev)
> >>>{
> >>>struct xhci_hcor *hcor;
> >>> @@ -194,7 +193,7 @@ static int dwc3_layerscape_bind(struct udevice *dev)
> >>>driver = "dwc3-layerscape-peripheral";
> >>>break;
> >>>#endif
> >>> -#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
> >>> +#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
> >>
> >> Why not CONFIG_IS_ENABLED(USB_HOST) here too ?
> >
> > The original logic is not equivalent to CONFIG_IS_ENABLED(USB_HOST),
> > so IMHO it would be better to fix it in a separate commit.
>
> What's the difference ?

The original logic in this function always enables USB_DR_MODE_HOST
switch case if we build u-boot, not SPL.
I've already fixed it in a separate commit. Please review v3.

-- 
Best regards
Oleksandr

Oleksandr Suvorov
cryo...@gmail.com


[PATCH v3 2/2] usb: dwc3: Fix enabling USB_DR_MODE_HOST

2023-08-25 Thread Oleksandr Suvorov
The original logic always enables USB_DR_MODE_HOST operation mode in
dwc3_layerscape_bind() in u-boot. Prevent choosing USB_DR_MODE_HOST
operation mode if USB_HOST is not enabled.

Fixes: 2b0b51d0bed ("usb: dwc3: add layerscape support")
Signed-off-by: Oleksandr Suvorov 
---

Changes in v3:
- fix original logic of choosing a host operation mode

Changes in v2:
- shrink the code using CONFIG_IS_ENABLED()

 drivers/usb/dwc3/dwc3-layerscape.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/dwc3/dwc3-layerscape.c 
b/drivers/usb/dwc3/dwc3-layerscape.c
index 58baa017ad1..c32df2396d7 100644
--- a/drivers/usb/dwc3/dwc3-layerscape.c
+++ b/drivers/usb/dwc3/dwc3-layerscape.c
@@ -193,7 +193,7 @@ static int dwc3_layerscape_bind(struct udevice *dev)
driver = "dwc3-layerscape-peripheral";
break;
 #endif
-#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(USB_HOST)
case USB_DR_MODE_HOST:
dev_dbg(dev, "Using host mode\n");
driver = "dwc3-layerscape-host";
-- 
2.41.0



[PATCH v3 1/2] usb: dwc3: Fix renaming SPL_USB_HOST_SUPPORT to SPL_USB_HOST

2023-08-25 Thread Oleksandr Suvorov
In the usb/dwc3-layerscape driver the first option should be renamed
to the latter as well. Do it.

Fix original logic in dwc3_layerscape_bind() - do not enable

Fixes: 333e4a621df ("Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOST")
Signed-off-by: Oleksandr Suvorov 
---

(no changes since v1)

 drivers/usb/dwc3/dwc3-layerscape.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/dwc3/dwc3-layerscape.c 
b/drivers/usb/dwc3/dwc3-layerscape.c
index 79cf71f7a85..58baa017ad1 100644
--- a/drivers/usb/dwc3/dwc3-layerscape.c
+++ b/drivers/usb/dwc3/dwc3-layerscape.c
@@ -134,8 +134,7 @@ U_BOOT_DRIVER(dwc3_layerscape_peripheral) = {
 };
 #endif
 
-#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
-   !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST)
+#if CONFIG_IS_ENABLED(USB_HOST)
 static int dwc3_layerscape_host_probe(struct udevice *dev)
 {
struct xhci_hcor *hcor;
@@ -194,7 +193,7 @@ static int dwc3_layerscape_bind(struct udevice *dev)
driver = "dwc3-layerscape-peripheral";
break;
 #endif
-#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
case USB_DR_MODE_HOST:
dev_dbg(dev, "Using host mode\n");
driver = "dwc3-layerscape-host";
-- 
2.41.0



Re: [PATCH v2] usb: dwc3: Fix renaming SPL_USB_HOST_SUPPORT to SPL_USB_HOST

2023-08-25 Thread Oleksandr Suvorov
On Wed, Aug 23, 2023 at 9:29 PM Marek Vasut  wrote:
>
> On 8/23/23 20:21, Oleksandr Suvorov wrote:
> > In the usb/dwc3-layerscape driver the first option should be renamed
> > to the latter as well. Do it.
> >
> > Fixes: 333e4a621df ("Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOST")
> > Signed-off-by: Oleksandr Suvorov 
> > ---
> >
> > Changes in v2:
> > - [asked by Tom Rini] shrink the code using CONFIG_IS_ENABLED()
> >
> >   drivers/usb/dwc3/dwc3-layerscape.c | 5 ++---
> >   1 file changed, 2 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/usb/dwc3/dwc3-layerscape.c 
> > b/drivers/usb/dwc3/dwc3-layerscape.c
> > index 79cf71f7a85..58baa017ad1 100644
> > --- a/drivers/usb/dwc3/dwc3-layerscape.c
> > +++ b/drivers/usb/dwc3/dwc3-layerscape.c
> > @@ -134,8 +134,7 @@ U_BOOT_DRIVER(dwc3_layerscape_peripheral) = {
> >   };
> >   #endif
> >
> > -#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
> > - !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST)
> > +#if CONFIG_IS_ENABLED(USB_HOST)
> >   static int dwc3_layerscape_host_probe(struct udevice *dev)
> >   {
> >   struct xhci_hcor *hcor;
> > @@ -194,7 +193,7 @@ static int dwc3_layerscape_bind(struct udevice *dev)
> >   driver = "dwc3-layerscape-peripheral";
> >   break;
> >   #endif
> > -#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
> > +#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
>
> Why not CONFIG_IS_ENABLED(USB_HOST) here too ?

The original logic is not equivalent to CONFIG_IS_ENABLED(USB_HOST),
so IMHO it would be better to fix it in a separate commit.

-- 
Best regards
Oleksandr

Oleksandr Suvorov
cryo...@gmail.com


[PATCH v2] usb: dwc3: Fix renaming SPL_USB_HOST_SUPPORT to SPL_USB_HOST

2023-08-23 Thread Oleksandr Suvorov
In the usb/dwc3-layerscape driver the first option should be renamed
to the latter as well. Do it.

Fixes: 333e4a621df ("Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOST")
Signed-off-by: Oleksandr Suvorov 
---

Changes in v2:
- [asked by Tom Rini] shrink the code using CONFIG_IS_ENABLED()

 drivers/usb/dwc3/dwc3-layerscape.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/dwc3/dwc3-layerscape.c 
b/drivers/usb/dwc3/dwc3-layerscape.c
index 79cf71f7a85..58baa017ad1 100644
--- a/drivers/usb/dwc3/dwc3-layerscape.c
+++ b/drivers/usb/dwc3/dwc3-layerscape.c
@@ -134,8 +134,7 @@ U_BOOT_DRIVER(dwc3_layerscape_peripheral) = {
 };
 #endif
 
-#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
-   !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST)
+#if CONFIG_IS_ENABLED(USB_HOST)
 static int dwc3_layerscape_host_probe(struct udevice *dev)
 {
struct xhci_hcor *hcor;
@@ -194,7 +193,7 @@ static int dwc3_layerscape_bind(struct udevice *dev)
driver = "dwc3-layerscape-peripheral";
break;
 #endif
-#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
case USB_DR_MODE_HOST:
dev_dbg(dev, "Using host mode\n");
driver = "dwc3-layerscape-host";
-- 
2.41.0



[PATCH] arm: mach-imx: loose enabling FSL_CAAM

2023-08-23 Thread Oleksandr Suvorov
HAS_CAAM should be enabled for all architecture support it. Whereas
FSL_CAAM enables a driver for a device which may be managed by
another system, like OP-TEE. Allow disabling u-boot FSL CAAM driver
on systems with CAAM to prevent access conflicts.

Signed-off-by: Oleksandr Suvorov 
---

 arch/arm/mach-imx/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index d94b5828d0d..3c178fb435f 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -52,7 +52,7 @@ config USE_IMXIMG_PLUGIN
 config IMX_HAB
bool "Support i.MX HAB features"
depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5 || ARCH_IMX8M || ARCH_MX7ULP
-   select FSL_CAAM if HAS_CAAM
+   imply FSL_CAAM if HAS_CAAM
imply CMD_DEKBLOB if HAS_CAAM
help
  This option enables the support for secure boot (HAB).
-- 
2.41.0



[PATCH] mmc: spl: select SPL_BLK for SPL_DM_MMC

2023-08-23 Thread Oleksandr Suvorov
mmc_bind() in mmc-uclass.c calls blk_create_devicef() which is
defined in blk-uclass.c, so SPL_BLK is required by SPL_DM_MMC.
Implicitly select SPL_BLK for SPL_DM_MMC.

Signed-off-by: Oleksandr Suvorov 
---

 drivers/mmc/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index de01b9687ba..d24677de076 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -46,6 +46,7 @@ config SPL_DM_MMC
depends on SPL_DM && DM_MMC
default n if ARCH_MVEBU && !MVEBU_SPL_BOOT_DEVICE_MMC
default y
+   select SPL_BLK
help
  This enables the MultiMediaCard (MMC) uclass which supports MMC and
  Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.)
-- 
2.41.0



[PATCH] spl: crypto: fix including SHA* object files in SPL

2023-08-23 Thread Oleksandr Suvorov
If one of SHA* algorithms is disabled in u-boot, its code is not
included in SPL even if a given SHA* option is enabled in SPL. Fix
this.

Fixes: 603d15a572d ("spl: cypto: Bring back SPL_ versions of SHA")
Signed-off-by: Oleksandr Suvorov 
---

 lib/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/Makefile b/lib/Makefile
index 8d8ccc8bbc3..9fa573525b8 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -72,9 +72,9 @@ obj-$(CONFIG_ECDSA) += ecdsa/
 obj-$(CONFIG_$(SPL_)RSA) += rsa/
 obj-$(CONFIG_HASH) += hash-checksum.o
 obj-$(CONFIG_BLAKE2) += blake2/blake2b.o
-obj-$(CONFIG_SHA1) += sha1.o
-obj-$(CONFIG_SHA256) += sha256.o
-obj-$(CONFIG_SHA512) += sha512.o
+obj-$(CONFIG_$(SPL_)SHA1) += sha1.o
+obj-$(CONFIG_$(SPL_)SHA256) += sha256.o
+obj-$(CONFIG_$(SPL_)SHA512) += sha512.o
 obj-$(CONFIG_CRYPT_PW) += crypt/
 obj-$(CONFIG_$(SPL_)ASN1_DECODER) += asn1_decoder.o
 
-- 
2.41.0



[PATCH] usb: dwc3: Fix renaming SPL_USB_HOST_SUPPORT to SPL_USB_HOST

2023-08-23 Thread Oleksandr Suvorov
In the usb/dwc3-layerscape driver the first option should be renamed
to the latter as well. Do it.

Fixes: 333e4a621df ("Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOST")
Signed-off-by: Oleksandr Suvorov 
---

 drivers/usb/dwc3/dwc3-layerscape.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/dwc3/dwc3-layerscape.c 
b/drivers/usb/dwc3/dwc3-layerscape.c
index 79cf71f7a85..77801c10084 100644
--- a/drivers/usb/dwc3/dwc3-layerscape.c
+++ b/drivers/usb/dwc3/dwc3-layerscape.c
@@ -134,7 +134,7 @@ U_BOOT_DRIVER(dwc3_layerscape_peripheral) = {
 };
 #endif
 
-#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
+#if defined(CONFIG_SPL_USB_HOST) || \
!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST)
 static int dwc3_layerscape_host_probe(struct udevice *dev)
 {
@@ -194,7 +194,7 @@ static int dwc3_layerscape_bind(struct udevice *dev)
driver = "dwc3-layerscape-peripheral";
break;
 #endif
-#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD)
case USB_DR_MODE_HOST:
dev_dbg(dev, "Using host mode\n");
driver = "dwc3-layerscape-host";
-- 
2.41.0



[PATCH v2] spl: watchdog: introduce SPL_HW_WATCHDOG

2023-08-23 Thread Oleksandr Suvorov
Add SPL_HW_WATCHDOG Kconfig symbol which can be used to enable
non-WDT hardware watchdog in SPL.

Co-developed-by: Igor Opaniuk 
Signed-off-by: Igor Opaniuk 
Signed-off-by: Oleksandr Suvorov 
---

Changes in v2:
- remove mistakenly included unwanted changes

 common/spl/Kconfig| 1 -
 drivers/Makefile  | 1 +
 drivers/sysreset/Kconfig  | 6 ++
 drivers/sysreset/Makefile | 2 +-
 drivers/watchdog/Kconfig  | 4 
 5 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index c5dd476db58..07d9dac29bd 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -1351,7 +1351,6 @@ config SPL_THERMAL
 
 config SPL_WATCHDOG
bool "Support watchdog drivers"
-   imply SPL_WDT if !HW_WATCHDOG
help
  Enable support for watchdog drivers in SPL. A watchdog is
  typically a hardware peripheral which can reset the system when it
diff --git a/drivers/Makefile b/drivers/Makefile
index efc2a4afb24..2eb8ec0a894 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -62,6 +62,7 @@ obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/
 obj-$(CONFIG_SPL_USB_GADGET) += usb/common/
 obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/
 obj-$(CONFIG_SPL_WATCHDOG) += watchdog/
+obj-$(CONFIG_SPL_HW_WATCHDOG) += watchdog/
 obj-$(CONFIG_SPL_USB_HOST) += usb/host/
 obj-$(CONFIG_SPL_SATA) += ata/ scsi/
 obj-$(CONFIG_SPL_LEGACY_BLOCK) += block/
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index bdbe2a95364..0d21673e402 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -157,6 +157,12 @@ config SYSRESET_WATCHDOG
help
  Reboot support for generic watchdog reset.
 
+config SPL_SYSRESET_WATCHDOG
+   bool "Enable support for watchdog reboot driver in SPL mode"
+   select SPL_WDT
+   help
+ Reboot support for generic watchdog reset in SPL mode.
+
 config SYSRESET_WATCHDOG_AUTO
bool "Automatically register first watchdog with sysreset"
depends on SYSRESET_WATCHDOG
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 40c876764af..e5a7fc07a81 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -18,7 +18,7 @@ obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
 obj-$(CONFIG_SYSRESET_SOCFPGA_SOC64) += sysreset_socfpga_soc64.o
 obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
-obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
+obj-$(CONFIG_$(SPL_)SYSRESET_WATCHDOG) += sysreset_watchdog.o
 obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o
 obj-$(CONFIG_$(SPL_TPL_)SYSRESET_AT91) += sysreset_at91.o
 obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 07fc4940e91..d696a04fc18 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -39,9 +39,13 @@ config WATCHDOG_TIMEOUT_MSECS
 config HW_WATCHDOG
bool
 
+config SPL_HW_WATCHDOG
+   bool
+
 config IMX_WATCHDOG
bool "Enable Watchdog Timer support for IMX and LSCH2 of NXP"
select HW_WATCHDOG if !WDT
+   select SPL_HW_WATCHDOG if !SPL_WDT
help
  Select this to enable the IMX and LSCH2 of Layerscape watchdog
  driver.
-- 
2.41.0



Re: [PATCH] spl: watchdog: introduce SPL_HW_WATCHDOG

2023-08-22 Thread Oleksandr Suvorov
On Tue, Aug 22, 2023 at 7:28 PM Fabio Estevam  wrote:
>
> Hi Oleksandr,
>
> On Tue, Aug 22, 2023 at 12:53 PM Oleksandr Suvorov
>  wrote:
>
> > ddr-1d-imem-fw {
> > -   filename = "lpddr4_pmu_train_1d_imem_202006.bin";
> > +   filename = "lpddr4_pmu_train_1d_imem.bin";
> > type = "blob-ext";
> > align-end = <4>;
> > };
> >
> > ddr-1d-dmem-fw {
> > -   filename = "lpddr4_pmu_train_1d_dmem_202006.bin";
> > +   filename = "lpddr4_pmu_train_1d_dmem.bin";
> > type = "blob-ext";
> > align-end = <4>;
> > };
> >
> > ddr-2d-imem-fw {
> > -   filename = "lpddr4_pmu_train_2d_imem_202006.bin";
> > +   filename = "lpddr4_pmu_train_2d_imem.bin";
>
> Unrelated changes?

Oops, yes, sorry, I'll resend the fixed version soon.

-- 
Best regards
Oleksandr

Oleksandr Suvorov
cryo...@gmail.com


[PATCH] spl: watchdog: introduce SPL_HW_WATCHDOG

2023-08-22 Thread Oleksandr Suvorov
Add SPL_HW_WATCHDOG Kconfig symbol which can be used to enable
non-WDT hardware watchdog in SPL.

Co-developed-by: Igor Opaniuk 
Signed-off-by: Igor Opaniuk 
Signed-off-by: Oleksandr Suvorov 
---

 arch/arm/dts/imx8mp-u-boot.dtsi | 8 
 common/spl/Kconfig  | 1 -
 drivers/Makefile| 1 +
 drivers/sysreset/Kconfig| 6 ++
 drivers/sysreset/Makefile   | 2 +-
 drivers/watchdog/Kconfig| 4 
 6 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi
index 36e7444a627..c8ab3916862 100644
--- a/arch/arm/dts/imx8mp-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-u-boot.dtsi
@@ -65,25 +65,25 @@
};
 
ddr-1d-imem-fw {
-   filename = "lpddr4_pmu_train_1d_imem_202006.bin";
+   filename = "lpddr4_pmu_train_1d_imem.bin";
type = "blob-ext";
align-end = <4>;
};
 
ddr-1d-dmem-fw {
-   filename = "lpddr4_pmu_train_1d_dmem_202006.bin";
+   filename = "lpddr4_pmu_train_1d_dmem.bin";
type = "blob-ext";
align-end = <4>;
};
 
ddr-2d-imem-fw {
-   filename = "lpddr4_pmu_train_2d_imem_202006.bin";
+   filename = "lpddr4_pmu_train_2d_imem.bin";
type = "blob-ext";
align-end = <4>;
};
 
ddr-2d-dmem-fw {
-   filename = "lpddr4_pmu_train_2d_dmem_202006.bin";
+   filename = "lpddr4_pmu_train_2d_dmem.bin";
type = "blob-ext";
align-end = <4>;
};
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index c5dd476db58..07d9dac29bd 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -1351,7 +1351,6 @@ config SPL_THERMAL
 
 config SPL_WATCHDOG
bool "Support watchdog drivers"
-   imply SPL_WDT if !HW_WATCHDOG
help
  Enable support for watchdog drivers in SPL. A watchdog is
  typically a hardware peripheral which can reset the system when it
diff --git a/drivers/Makefile b/drivers/Makefile
index efc2a4afb24..2eb8ec0a894 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -62,6 +62,7 @@ obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/
 obj-$(CONFIG_SPL_USB_GADGET) += usb/common/
 obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/
 obj-$(CONFIG_SPL_WATCHDOG) += watchdog/
+obj-$(CONFIG_SPL_HW_WATCHDOG) += watchdog/
 obj-$(CONFIG_SPL_USB_HOST) += usb/host/
 obj-$(CONFIG_SPL_SATA) += ata/ scsi/
 obj-$(CONFIG_SPL_LEGACY_BLOCK) += block/
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index bdbe2a95364..0d21673e402 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -157,6 +157,12 @@ config SYSRESET_WATCHDOG
help
  Reboot support for generic watchdog reset.
 
+config SPL_SYSRESET_WATCHDOG
+   bool "Enable support for watchdog reboot driver in SPL mode"
+   select SPL_WDT
+   help
+ Reboot support for generic watchdog reset in SPL mode.
+
 config SYSRESET_WATCHDOG_AUTO
bool "Automatically register first watchdog with sysreset"
depends on SYSRESET_WATCHDOG
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 40c876764af..e5a7fc07a81 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -18,7 +18,7 @@ obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
 obj-$(CONFIG_SYSRESET_SOCFPGA_SOC64) += sysreset_socfpga_soc64.o
 obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
-obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
+obj-$(CONFIG_$(SPL_)SYSRESET_WATCHDOG) += sysreset_watchdog.o
 obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o
 obj-$(CONFIG_$(SPL_TPL_)SYSRESET_AT91) += sysreset_at91.o
 obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 07fc4940e91..d696a04fc18 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -39,9 +39,13 @@ config WATCHDOG_TIMEOUT_MSECS
 config HW_WATCHDOG
bool
 
+config SPL_HW_WATCHDOG
+   bool
+
 config IMX_WATCHDOG
bool "Enable Watchdog Timer support for IMX and LSCH2 of NXP"
select HW_WATCHDOG if !WDT
+   select SPL_HW_WATCHDOG if !SPL_WDT
help
  Select this to enable the IMX and LSCH2 of Layerscape watchdog
  driver.
-- 
2.41.0



[PATCH] imx: imx8: ahab: refactor do_ahab_close command

2023-08-21 Thread Oleksandr Suvorov
From: Igor Opaniuk 

Move an OEM closing logic to ahab_close() function to be able to use
it directly without calling a u-boot command.

Signed-off-by: Igor Opaniuk 
Co-developed-by: Oleksandr Suvorov 
Signed-off-by: Oleksandr Suvorov 
---

 arch/arm/include/asm/arch-imx8/sys_proto.h |  1 +
 arch/arm/mach-imx/imx8/ahab.c  | 45 ++
 2 files changed, 30 insertions(+), 16 deletions(-)

diff --git a/arch/arm/include/asm/arch-imx8/sys_proto.h 
b/arch/arm/include/asm/arch-imx8/sys_proto.h
index e7625c42985..405e9bd3d81 100644
--- a/arch/arm/include/asm/arch-imx8/sys_proto.h
+++ b/arch/arm/include/asm/arch-imx8/sys_proto.h
@@ -23,6 +23,7 @@ struct pass_over_info_t {
 
 extern unsigned long boot_pointer[];
 void build_info(void);
+int ahab_close(void);
 int print_bootinfo(void);
 int sc_pm_setup_uart(sc_rsrc_t uart_rsrc, sc_pm_clock_rate_t clk_rate);
 int imx8_power_domain_lookup_name(const char *name,
diff --git a/arch/arm/mach-imx/imx8/ahab.c b/arch/arm/mach-imx/imx8/ahab.c
index b58b14ca9b4..a7891bf8d98 100644
--- a/arch/arm/mach-imx/imx8/ahab.c
+++ b/arch/arm/mach-imx/imx8/ahab.c
@@ -340,6 +340,32 @@ static int do_ahab_status(struct cmd_tbl *cmdtp, int flag, 
int argc,
return 0;
 }
 
+int ahab_close(void)
+{
+   int err;
+   u16 lc;
+
+   err = sc_seco_chip_info(-1, , NULL, NULL, NULL);
+   if (err != SC_ERR_NONE) {
+   printf("Error in get lifecycle\n");
+   return -EIO;
+   }
+
+   if (lc != 0x20) {
+   puts("Current lifecycle is NOT NXP closed, can't move to OEM 
closed\n");
+   display_life_cycle(lc);
+   return -EPERM;
+   }
+
+   err = sc_seco_forward_lifecycle(-1, 16);
+   if (err != SC_ERR_NONE) {
+   printf("Error in forward lifecycle to OEM closed\n");
+   return -EIO;
+   }
+
+   return 0;
+}
+
 static int confirm_close(void)
 {
puts("Warning: Please ensure your sample is in NXP closed state, "
@@ -361,27 +387,14 @@ static int do_ahab_close(struct cmd_tbl *cmdtp, int flag, 
int argc,
 {
int confirmed = argc >= 2 && !strcmp(argv[1], "-y");
int err;
-   u16 lc;
 
if (!confirmed && !confirm_close())
return -EACCES;
 
-   err = sc_seco_chip_info(-1, , NULL, NULL, NULL);
+   err = ahab_close();
if (err) {
-   printf("Error in get lifecycle\n");
-   return -EIO;
-   }
-
-   if (lc != 0x20) {
-   puts("Current lifecycle is NOT NXP closed, can't move to OEM 
closed\n");
-   display_life_cycle(lc);
-   return -EPERM;
-   }
-
-   err = sc_seco_forward_lifecycle(-1, 16);
-   if (err) {
-   printf("Error in forward lifecycle to OEM closed\n");
-   return -EIO;
+   printf("Change to OEM closed failed\n");
+   return err;
}
 
printf("Change to OEM closed successfully\n");
-- 
2.41.0



[PATCH] tools: image-host: print error messages to stderr

2023-08-17 Thread Oleksandr Suvorov
The make by default cuts off the stdout output from external tools,
so all error messages from the image-host are not shown in a make
output. Besides that, it is a common approach to use stderr stream
for error messages.
Use stderr for all error messages in image-host.

Signed-off-by: Oleksandr Suvorov 
---

 tools/image-host.c | 202 -
 1 file changed, 107 insertions(+), 95 deletions(-)

diff --git a/tools/image-host.c b/tools/image-host.c
index 4a24dee8153..ca4950312f9 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -38,9 +38,9 @@ static int fit_set_hash_value(void *fit, int noffset, uint8_t 
*value,
 
ret = fdt_setprop(fit, noffset, FIT_VALUE_PROP, value, value_len);
if (ret) {
-   printf("Can't set hash '%s' property for '%s' node(%s)\n",
-  FIT_VALUE_PROP, fit_get_name(fit, noffset, NULL),
-  fdt_strerror(ret));
+   fprintf(stderr, "Can't set hash '%s' property for '%s' 
node(%s)\n",
+   FIT_VALUE_PROP, fit_get_name(fit, noffset, NULL),
+   fdt_strerror(ret));
return ret == -FDT_ERR_NOSPACE ? -ENOSPC : -EIO;
}
 
@@ -72,21 +72,23 @@ static int fit_image_process_hash(void *fit, const char 
*image_name,
node_name = fit_get_name(fit, noffset, NULL);
 
if (fit_image_hash_get_algo(fit, noffset, )) {
-   printf("Can't get hash algo property for '%s' hash node in '%s' 
image node\n",
-  node_name, image_name);
+   fprintf(stderr,
+   "Can't get hash algo property for '%s' hash node in 
'%s' image node\n",
+   node_name, image_name);
return -ENOENT;
}
 
if (calculate_hash(data, size, algo, value, _len)) {
-   printf("Unsupported hash algorithm (%s) for '%s' hash node in 
'%s' image node\n",
-  algo, node_name, image_name);
+   fprintf(stderr,
+   "Unsupported hash algorithm (%s) for '%s' hash node in 
'%s' image node\n",
+   algo, node_name, image_name);
return -EPROTONOSUPPORT;
}
 
ret = fit_set_hash_value(fit, noffset, value, value_len);
if (ret) {
-   printf("Can't set hash value for '%s' hash node in '%s' image 
node\n",
-  node_name, image_name);
+   fprintf(stderr, "Can't set hash value for '%s' hash node in 
'%s' image node\n",
+   node_name, image_name);
return ret;
}
 
@@ -170,8 +172,9 @@ static int fit_image_setup_sig(struct image_sign_info *info,
node_name = fit_get_name(fit, noffset, NULL);
if (!algo_name) {
if (fit_image_hash_get_algo(fit, noffset, _name)) {
-   printf("Can't get algo property for '%s' signature node 
in '%s' image node\n",
-  node_name, image_name);
+   fprintf(stderr,
+   "Can't get algo property for '%s' signature 
node in '%s' image node\n",
+   node_name, image_name);
return -1;
}
}
@@ -191,8 +194,9 @@ static int fit_image_setup_sig(struct image_sign_info *info,
info->require_keys = require_keys;
info->engine_id = engine_id;
if (!info->checksum || !info->crypto) {
-   printf("Unsupported signature algorithm (%s) for '%s' signature 
node in '%s' image node\n",
-  algo_name, node_name, image_name);
+   fprintf(stderr,
+   "Unsupported signature algorithm (%s) for '%s' 
signature node in '%s' image node\n",
+   algo_name, node_name, image_name);
return -1;
}
 
@@ -241,8 +245,8 @@ static int fit_image_process_sig(const char *keydir, const 
char *keyfile,
region.size = size;
ret = info.crypto->sign(, , 1, , _len);
if (ret) {
-   printf("Failed to sign '%s' signature node in '%s' image node: 
%d\n",
-  node_name, image_name, ret);
+   fprintf(stderr, "Failed to sign '%s' signature node in '%s' 
image node: %d\n",
+   node_name, image_name, ret);
 
/* We allow keys to be missing */
if (ret == -ENOENT)
@@ -255,8 +259,9 @@ static int fit_image_process_sig(const char *keydir, const 
char *keyfile,
if (ret) {
if (ret == -FDT_ERR_NOSPACE)
return -ENOSPC;
-   printf("Can't write signature for '%s' signature node in '%s' 
conf node: %s\n",
-  node_

[PATCH] spl: provide weak empty stub for reset_cpu()

2023-08-17 Thread Oleksandr Suvorov
This stub needs to link SPL properly.

Signed-off-by: Oleksandr Suvorov 
---

 common/spl/spl.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 0062f3f45d9..781858891b9 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -1026,3 +1026,11 @@ ulong bootcount_load(void)
return 0;
 }
 #endif
+
+/**
+ * Weak default function for board-specific reset. Provide empty stub only.
+ */
+__weak void reset_cpu(void)
+{
+   /* Nothing to do! */
+}
-- 
2.41.0



[PATCH] arm: dts: imx6ull-14x14-evk-u-boot: add rngb

2023-08-08 Thread Oleksandr Suvorov
From: Ricardo Salveti 

Linux microPlatform uses an rngb device in optee-os in boot scheme
SPL -> OPTEE -> U-Boot. To make rngb available for optee-os, enable
it in SPL.

Signed-off-by: Ricardo Salveti 
Co-developed-by: Oleksandr Suvorov 
Signed-off-by: Oleksandr Suvorov 
---

 arch/arm/dts/imx6ull-14x14-evk-u-boot.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/imx6ull-14x14-evk-u-boot.dtsi 
b/arch/arm/dts/imx6ull-14x14-evk-u-boot.dtsi
index a6c2cc8c1ad..0b185712f9b 100644
--- a/arch/arm/dts/imx6ull-14x14-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx6ull-14x14-evk-u-boot.dtsi
@@ -6,3 +6,7 @@
 _uart1 {
bootph-all;
 };
+
+ {
+   bootph-all;
+};
-- 
2.41.0



[PATCH v2 2/2] spl: move SPL_CRC32 option to lib/Kconfig

2023-08-03 Thread Oleksandr Suvorov
All SPL hash algorithm options are collected in lib/Kconfig. Move
SPL_CRC32 there as well.

Signed-off-by: Oleksandr Suvorov 
---

Changes in v2:
- add a related commit to the series.

 common/spl/Kconfig | 11 ---
 lib/Kconfig| 11 +++
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index c66d70e2a99..c5dd476db58 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -550,17 +550,6 @@ config SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION
  the eMMC EXT_CSC_PART_CONFIG selection should be overridden in SPL
  by user defined partition number.
 
-config SPL_CRC32
-   bool "Support CRC32"
-   default y if SPL_LEGACY_IMAGE_FORMAT || SPL_EFI_PARTITION
-   default y if SPL_ENV_SUPPORT || TPL_BLOBLIST
-   help
- Enable this to support CRC32 in uImages or FIT images within SPL.
- This is a 32-bit checksum value that can be used to verify images.
- For FIT images, this is the least secure type of checksum, suitable
- for detected accidental image corruption. For secure applications you
- should consider SHA1 or SHA256.
-
 config SPL_FIT_IMAGE_TINY
bool "Remove functionality from SPL FIT loading to reduce size"
depends on SPL_FIT
diff --git a/lib/Kconfig b/lib/Kconfig
index 3926652db63..07e61de5b64 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -534,6 +534,17 @@ config SHA_HW_ACCEL
 
 if SPL
 
+config SPL_CRC32
+   bool "Enable CRC32 support in SPL"
+   default y if SPL_LEGACY_IMAGE_SUPPORT || SPL_EFI_PARTITION
+   default y if SPL_ENV_SUPPORT || TPL_BLOBLIST
+   help
+ This option enables support of hashing using CRC32 algorithm.
+ The CRC32 algorithm produces 32-bit checksum value. For FIT
+ images, this is the least secure type of checksum, suitable for
+ detected accidental image corruption. For secure applications you
+ should consider SHA256 or SHA384.
+
 config SPL_SHA1
bool "Enable SHA1 support in SPL"
default y if SHA1
-- 
2.40.1



[PATCH v2 1/2] spl: remove duplicate SPL_MD5 option

2023-08-03 Thread Oleksandr Suvorov
There is another SPL_MD5 option defined in lib/Kconfig.
Renaming SPL_MD5_SUPPORT introduced duplicate option with
different description. As for now FIT and hash algorithm options
are not related to each others, removing a duplicate option seems OK.

Fixes: 4b00fd1a84c ("Kconfig: Rename SPL_MD5_SUPPORT to SPL_MD5")
Signed-off-by: Oleksandr Suvorov 
---

(no changes since v1)

 common/spl/Kconfig | 12 
 1 file changed, 12 deletions(-)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index bee231b583a..c66d70e2a99 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -561,18 +561,6 @@ config SPL_CRC32
  for detected accidental image corruption. For secure applications you
  should consider SHA1 or SHA256.
 
-config SPL_MD5
-   bool "Support MD5"
-   depends on SPL_FIT
-   help
- Enable this to support MD5 in FIT images within SPL. An MD5
- checksum is a 128-bit hash value used to check that the image
- contents have not been corrupted. Note that MD5 is not considered
- secure as it is possible (with a brute-force attack) to adjust the
- image while still retaining the same MD5 hash value. For secure
- applications where images may be changed maliciously, you should
- consider SHA256 or SHA384.
-
 config SPL_FIT_IMAGE_TINY
bool "Remove functionality from SPL FIT loading to reduce size"
depends on SPL_FIT
-- 
2.40.1



[PATCH] spl: remove duplicate SPL_MD5 option

2023-08-03 Thread Oleksandr Suvorov
There is another SPL_MD5 option defined in lib/Kconfig.
Renaming SPL_MD5_SUPPORT introduced duplicate option with
different description. As for now FIT and hash algorithm options
are not related to each others, removing a duplicate option seems OK.

Fixes: 4b00fd1a84c ("Kconfig: Rename SPL_MD5_SUPPORT to SPL_MD5")
Signed-off-by: Oleksandr Suvorov 
---

 common/spl/Kconfig | 12 
 1 file changed, 12 deletions(-)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index bee231b583a..c66d70e2a99 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -561,18 +561,6 @@ config SPL_CRC32
  for detected accidental image corruption. For secure applications you
  should consider SHA1 or SHA256.
 
-config SPL_MD5
-   bool "Support MD5"
-   depends on SPL_FIT
-   help
- Enable this to support MD5 in FIT images within SPL. An MD5
- checksum is a 128-bit hash value used to check that the image
- contents have not been corrupted. Note that MD5 is not considered
- secure as it is possible (with a brute-force attack) to adjust the
- image while still retaining the same MD5 hash value. For secure
- applications where images may be changed maliciously, you should
- consider SHA256 or SHA384.
-
 config SPL_FIT_IMAGE_TINY
bool "Remove functionality from SPL FIT loading to reduce size"
depends on SPL_FIT
-- 
2.40.1



[PATCH v3] imx: syscounter: allow timer_init for SPL build

2023-08-03 Thread Oleksandr Suvorov
From: Michael Scott 

With enabled SKIP_LOWLEVEL_INIT, the weak function timer_init() is
used in the SPL build. For iMX6 SoC, this leads MMC to fail once
u-boot proper is booted due to a timing issue.
Always use iMX-specific timer_init() in SPL to fix timing issues.

Fixes: be277c3a89 ("imx: mx7: avoid some initialization if low level is 
skipped")
Signed-off-by: Michael Scott 
Co-developed-by: Oleksandr Suvorov 
Signed-off-by: Oleksandr Suvorov 
Reviewed-by: Peng Fan 
---

Changes in v3:
- add Reviewed-by from 
https://patchwork.ozlabs.org/project/uboot/patch/20210925151812.58480-1-oleksandr.suvo...@foundries.io/

Changes in v2:
- rebased on top of a2ac2b964b ("Convert CONFIG_SKIP_LOWLEVEL_INIT et al to 
Kconfig")

 arch/arm/mach-imx/syscounter.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c
index 129efac6fa6..16df1186759 100644
--- a/arch/arm/mach-imx/syscounter.c
+++ b/arch/arm/mach-imx/syscounter.c
@@ -59,7 +59,7 @@ static inline unsigned long long us_to_tick(unsigned long 
long usec)
return usec;
 }
 
-#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) || IS_ENABLED(CONFIG_SPL_BUILD)
 int timer_init(void)
 {
struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
-- 
2.40.1



[PATCH] lib/zlib: Fix a bug when getting a gzip header extra field

2023-06-15 Thread Oleksandr Suvorov
This fixes CVE-2022-37434 [1] and bases on 2 commits from Mark
Adler's zlib master repo - the original fix of CVE bug [2] and
the fix for the fix [3].

[1]
https://github.com/advisories/GHSA-cfmr-vrgj-vqwv
[2]
https://github.com/madler/zlib/commit/eff308af425b67093bab25f80f1ae950166bece1
[3]
https://github.com/madler/zlib/commit/1eb7682f845ac9e9bf9ae35bbfb3bad5dacbd91d

Fixes: e89516f031d ("zlib: split up to match original source tree")
Signed-off-by: Oleksandr Suvorov 
---

 lib/zlib/inflate.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/lib/zlib/inflate.c b/lib/zlib/inflate.c
index 30dfe155995..8f767b7b9d2 100644
--- a/lib/zlib/inflate.c
+++ b/lib/zlib/inflate.c
@@ -455,8 +455,9 @@ int ZEXPORT inflate(z_streamp strm, int flush)
 if (copy > have) copy = have;
 if (copy) {
 if (state->head != Z_NULL &&
-state->head->extra != Z_NULL) {
-len = state->head->extra_len - state->length;
+state->head->extra != Z_NULL &&
+(len = state->head->extra_len - state->length) <
+state->head->extra_max) {
 zmemcpy(state->head->extra + len, next,
 len + copy > state->head->extra_max ?
 state->head->extra_max - len : copy);
-- 
2.40.1



[PATCH] ARM: imx9: support env in fat and ext4

2023-04-11 Thread Oleksandr Suvorov
Change boot device logic to also allow environment stored in fat and
in ext4 when booting from SD or eMMC.

As the boot device check for SD and for eMMC was depending on
ENV_IS_IN_MMC being defined, change the ifdef blocks at
env_get_location to use IS_ENABLED instead for all modes, returning
NOWHERE when no valid mode is found.

This solution is based on (with added SPL support):
Link: https://lore.kernel.org/all/20211020191626.3648540-1-rica...@foundries.io/
Signed-off-by: Oleksandr Suvorov 
---

 arch/arm/mach-imx/imx9/soc.c | 28 
 1 file changed, 12 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index a16e22ea6bb..2dfce1492bb 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -286,35 +286,31 @@ int timer_init(void)
 enum env_location env_get_location(enum env_operation op, int prio)
 {
enum boot_device dev = get_boot_device();
-   enum env_location env_loc = ENVL_UNKNOWN;
 
if (prio)
-   return env_loc;
+   return ENVL_UNKNOWN;
 
switch (dev) {
-#if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
case QSPI_BOOT:
-   env_loc = ENVL_SPI_FLASH;
-   break;
-#endif
-#if defined(CONFIG_ENV_IS_IN_MMC)
+   if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
+   return ENVL_SPI_FLASH;
+   return ENVL_NOWHERE;
case SD1_BOOT:
case SD2_BOOT:
case SD3_BOOT:
case MMC1_BOOT:
case MMC2_BOOT:
case MMC3_BOOT:
-   env_loc =  ENVL_MMC;
-   break;
-#endif
+   if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
+   return ENVL_MMC;
+   else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4))
+   return ENVL_EXT4;
+   else if (CONFIG_IS_ENABLED(ENV_IS_IN_FAT))
+   return ENVL_FAT;
+   return ENVL_NOWHERE;
default:
-#if defined(CONFIG_ENV_IS_NOWHERE)
-   env_loc = ENVL_NOWHERE;
-#endif
-   break;
+   return ENVL_NOWHERE;
}
-
-   return env_loc;
 }
 
 static int mix_power_init(enum mix_power_domain pd)
-- 
2.39.2



Re: [PATCH] spl: Drop unwanted return in spl_fit_upload_fpga()

2023-01-24 Thread Oleksandr Suvorov
On Tue, Jan 24, 2023 at 12:56 PM Simon Glass  wrote:
>
> This was added by mistake and renders the function useless. Fix it.
>
> Signed-off-by: Simon Glass 
> Fixes: 33c60a38bb9 ("trace: Use notrace for short")
> Reported-by: Stefan Herbrechtsmeier 
> 

Reviewed-by: Oleksandr Suvorov 

> ---
>
>  common/spl/spl_fit.c | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
> index 9ae3e5e35d4..c51482b3b65 100644
> --- a/common/spl/spl_fit.c
> +++ b/common/spl/spl_fit.c
> @@ -591,7 +591,6 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx, 
> int node,
> debug("Ignoring compatible = %s property\n",
>   compatible);
> }
> -   return 0;
>
> ret = fpga_load(devnum, (void *)fpga_image->load_addr,
>     fpga_image->size, BIT_FULL, flags);
> --
> 2.39.0.246.g2a6d74b583-goog
>


-- 
Best regards
Oleksandr

Oleksandr Suvorov
cryo...@gmail.com


[PATCH] arm: dts: imx8mn-u-boot: use versioned ddr4 firmware

2023-01-16 Thread Oleksandr Suvorov
NXP tested imx8mn-ddr4 with firmware version 201810 only. Use this
version for all imx8mn targets with DRAM DDR4.

Fixes: 93c4c0e4dd1 ("arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi")

Signed-off-by: Oleksandr Suvorov 
---

 arch/arm/dts/imx8mn-u-boot.dtsi | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi
index 95f45ad2522..4e3818ec2b8 100644
--- a/arch/arm/dts/imx8mn-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-u-boot.dtsi
@@ -85,7 +85,7 @@
 #ifdef CONFIG_IMX8M_LPDDR4
filename = "lpddr4_pmu_train_1d_imem.bin";
 #elif CONFIG_IMX8M_DDR4
-   filename = "ddr4_imem_1d.bin";
+   filename = "ddr4_imem_1d_201810.bin";
 #else
filename = "ddr3_imem_1d.bin";
 #endif
@@ -97,7 +97,7 @@
 #ifdef CONFIG_IMX8M_LPDDR4
filename = "lpddr4_pmu_train_1d_dmem.bin";
 #elif CONFIG_IMX8M_DDR4
-   filename = "ddr4_dmem_1d.bin";
+   filename = "ddr4_dmem_1d_201810.bin";
 #else
filename = "ddr3_dmem_1d.bin";
 #endif
@@ -109,7 +109,7 @@
 #ifdef CONFIG_IMX8M_LPDDR4
filename = "lpddr4_pmu_train_2d_imem.bin";
 #elif CONFIG_IMX8M_DDR4
-   filename = "ddr4_imem_2d.bin";
+   filename = "ddr4_imem_2d_201810.bin";
 #endif
type = "blob-ext";
align-end = <4>;
@@ -119,7 +119,7 @@
 #ifdef CONFIG_IMX8M_LPDDR4
filename = "lpddr4_pmu_train_2d_dmem.bin";
 #elif CONFIG_IMX8M_DDR4
-   filename = "ddr4_dmem_2d.bin";
+   filename = "ddr4_dmem_2d_201810.bin";
 #endif
type = "blob-ext";
align-end = <4>;
-- 
2.39.0



Re: [PATCH] firmware: ti_sci: fix typo in boot authentication message name

2023-01-10 Thread Oleksandr Suvorov
On Tue, Jan 10, 2023 at 2:30 PM Jorge Ramirez-Ortiz  wrote:
>
> Fix AUTH_BOOT message identifier (s/IMIAGE/IMAGE)
>
> Signed-off-by: Jorge Ramirez-Ortiz 

Reviewed-by: Oleksandr Suvorov 

> ---
>  drivers/firmware/ti_sci.c | 2 +-
>  drivers/firmware/ti_sci.h | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
> index 727e090e8a..bd7379ae55 100644
> --- a/drivers/firmware/ti_sci.c
> +++ b/drivers/firmware/ti_sci.c
> @@ -1935,7 +1935,7 @@ static int ti_sci_cmd_proc_auth_boot_image(const struct 
> ti_sci_handle *handle,
>
> info = handle_to_ti_sci_info(handle);
>
> -   xfer = ti_sci_setup_one_xfer(info, TISCI_MSG_PROC_AUTH_BOOT_IMIAGE,
> +   xfer = ti_sci_setup_one_xfer(info, TISCI_MSG_PROC_AUTH_BOOT_IMAGE,
>  TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
>  (u32 *), sizeof(req), sizeof(*resp));
> if (IS_ERR(xfer)) {
> diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h
> index e4a087c2ba..101210eb21 100644
> --- a/drivers/firmware/ti_sci.h
> +++ b/drivers/firmware/ti_sci.h
> @@ -49,7 +49,7 @@
>  #define TISCI_MSG_PROC_HANDOVER0xc005
>  #define TISCI_MSG_SET_PROC_BOOT_CONFIG 0xc100
>  #define TISCI_MSG_SET_PROC_BOOT_CTRL   0xc101
> -#define TISCI_MSG_PROC_AUTH_BOOT_IMIAGE0xc120
> +#define TISCI_MSG_PROC_AUTH_BOOT_IMAGE 0xc120
>  #define TISCI_MSG_GET_PROC_BOOT_STATUS 0xc400
>  #define TISCI_MSG_WAIT_PROC_BOOT_STATUS0xc401
>
> --
> 2.34.1
>


--
Best regards
Oleksandr

Oleksandr Suvorov
cryo...@gmail.com


[PATCH] lib: crypt: fix selecting a non-existent option

2022-09-19 Thread Oleksandr Suvorov
The option SHA256_ALGO does not exist. Remove selecting it.

Fixes: 26dd9936574 ("lib: add crypt subsystem")
Signed-off-by: Oleksandr Suvorov 
---

 lib/crypt/Kconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/lib/crypt/Kconfig b/lib/crypt/Kconfig
index a59d5c7d1d5..22af6834d93 100644
--- a/lib/crypt/Kconfig
+++ b/lib/crypt/Kconfig
@@ -12,7 +12,6 @@ if CRYPT_PW
 config CRYPT_PW_SHA256
bool "Provide sha256crypt"
select SHA256
-   select SHA256_ALGO
help
  Enables support for the sha256crypt password-hashing algorithm.
  The prefix is "$5$".
-- 
2.37.2



Re: [PATCH] configs: stm32mp*: fix system reset

2022-09-05 Thread Oleksandr Suvorov
On Mon, Sep 5, 2022 at 8:34 PM Jorge Ramirez-Ortiz  wrote:
>
> Enabling CONFIG_SYSRESET_PSCI prevents CONFIG_RESET_SCMI
> from executing.
>
> The side effect observed are I2C devices no longer being
> accessible from U-boot after a soft reset.
>
> Fixes: 11517ccc8c52 ("configs: add stm32mp13 defconfig")
> Fixes: 17aeb589fa9d ("stm32mp15: remove configs dependency on
>   CONFIG_TFABOOT")
>
> Signed-off-by: Jorge Ramirez-Ortiz 

Acked-by: Oleksandr Suvorov 

> ---
>  configs/stm32mp13_defconfig | 1 -
>  configs/stm32mp15_defconfig | 1 -
>  configs/stm32mp15_trusted_defconfig | 1 -
>  3 files changed, 3 deletions(-)
>
> diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
> index 673b468d31..44cee2e656 100644
> --- a/configs/stm32mp13_defconfig
> +++ b/configs/stm32mp13_defconfig
> @@ -69,7 +69,6 @@ CONFIG_RNG_OPTEE=y
>  CONFIG_DM_RTC=y
>  CONFIG_RTC_STM32=y
>  CONFIG_SERIAL_RX_BUFFER=y
> -CONFIG_SYSRESET_PSCI=y
>  CONFIG_TEE=y
>  CONFIG_OPTEE=y
>  # CONFIG_OPTEE_TA_AVB is not set
> diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
> index e5a2996c2c..2ad02f3652 100644
> --- a/configs/stm32mp15_defconfig
> +++ b/configs/stm32mp15_defconfig
> @@ -133,7 +133,6 @@ CONFIG_SPI=y
>  CONFIG_DM_SPI=y
>  CONFIG_STM32_QSPI=y
>  CONFIG_STM32_SPI=y
> -CONFIG_SYSRESET_PSCI=y
>  CONFIG_TEE=y
>  CONFIG_OPTEE=y
>  # CONFIG_OPTEE_TA_AVB is not set
> diff --git a/configs/stm32mp15_trusted_defconfig 
> b/configs/stm32mp15_trusted_defconfig
> index e14668042f..9e24e82920 100644
> --- a/configs/stm32mp15_trusted_defconfig
> +++ b/configs/stm32mp15_trusted_defconfig
> @@ -134,7 +134,6 @@ CONFIG_SPI=y
>  CONFIG_DM_SPI=y
>  CONFIG_STM32_QSPI=y
>  CONFIG_STM32_SPI=y
> -CONFIG_SYSRESET_PSCI=y
>  CONFIG_TEE=y
>  CONFIG_OPTEE=y
>  # CONFIG_OPTEE_TA_AVB is not set
> --
> 2.34.1
>


-- 
Best regards
Oleksandr

Oleksandr Suvorov
cryo...@gmail.com


Re: [PATCH] configs: stm32mp*: reset via CONFIG_RESET_SCMI

2022-09-05 Thread Oleksandr Suvorov
Jorge,

I think, renaming the patch to "fix" and adding a field "Fixes:"
should help accept it faster.

On Mon, Sep 5, 2022 at 7:32 PM Jorge Ramirez-Ortiz, Foundries
 wrote:
>
> On 30/08/22, Jorge Ramirez-Ortiz wrote:
> > Enabling CONFIG_SYSRESET_PSCI prevents CONFIG_RESET_SCMI
> > from executing.
> >
> > The side effect observed are I2C devices no longer being
> > accessible from U-boot after a soft reset.
>
> I think this PR should get a bit more of attention.
>
> The current reset configuration is broken, this is a fix.
> Do I need to rename the PR?
>
> TIA
> jorge
>
>
> >
> > Signed-off-by: Jorge Ramirez-Ortiz 
> > ---
> >  configs/stm32mp13_defconfig | 1 -
> >  configs/stm32mp15_defconfig | 1 -
> >  configs/stm32mp15_trusted_defconfig | 1 -
> >  3 files changed, 3 deletions(-)
> >
> > diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
> > index 673b468d31..44cee2e656 100644
> > --- a/configs/stm32mp13_defconfig
> > +++ b/configs/stm32mp13_defconfig
> > @@ -69,7 +69,6 @@ CONFIG_RNG_OPTEE=y
> >  CONFIG_DM_RTC=y
> >  CONFIG_RTC_STM32=y
> >  CONFIG_SERIAL_RX_BUFFER=y
> > -CONFIG_SYSRESET_PSCI=y
> >  CONFIG_TEE=y
> >  CONFIG_OPTEE=y
> >  # CONFIG_OPTEE_TA_AVB is not set
> > diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
> > index e5a2996c2c..2ad02f3652 100644
> > --- a/configs/stm32mp15_defconfig
> > +++ b/configs/stm32mp15_defconfig
> > @@ -133,7 +133,6 @@ CONFIG_SPI=y
> >  CONFIG_DM_SPI=y
> >  CONFIG_STM32_QSPI=y
> >  CONFIG_STM32_SPI=y
> > -CONFIG_SYSRESET_PSCI=y
> >  CONFIG_TEE=y
> >  CONFIG_OPTEE=y
> >  # CONFIG_OPTEE_TA_AVB is not set
> > diff --git a/configs/stm32mp15_trusted_defconfig 
> > b/configs/stm32mp15_trusted_defconfig
> > index e14668042f..9e24e82920 100644
> > --- a/configs/stm32mp15_trusted_defconfig
> > +++ b/configs/stm32mp15_trusted_defconfig
> > @@ -134,7 +134,6 @@ CONFIG_SPI=y
> >  CONFIG_DM_SPI=y
> >  CONFIG_STM32_QSPI=y
> >  CONFIG_STM32_SPI=y
> > -CONFIG_SYSRESET_PSCI=y
> >  CONFIG_TEE=y
> >  CONFIG_OPTEE=y
> >  # CONFIG_OPTEE_TA_AVB is not set
> > --
> > 2.34.1
> >



-- 
Best regards
Oleksandr

Oleksandr Suvorov
cryo...@gmail.com


[PATCH] spl: ahci: Fix dependency for SPL_AHCI_PCI

2022-08-25 Thread Oleksandr Suvorov
The option SPL_SATA_SUPPORT is renamed to SPL_SATA. Fix the option
name.

Fixes: 73059529b20 ("ata: ahci-pci: Add new option CONFIG_SPL_AHCI_PCI")
Signed-off-by: Oleksandr Suvorov 
---

 drivers/ata/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 7715c403656..cd6060d5110 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -48,7 +48,7 @@ config SPL_AHCI_PCI
bool "Support for PCI-based AHCI controller for SPL"
depends on SPL
depends on SPL_PCI
-   depends on SPL_SATA_SUPPORT && DM_SCSI
+   depends on SPL_SATA && DM_SCSI
 
 config DWC_AHCI
bool "Enable Synopsys DWC AHCI driver support"
-- 
2.37.2



[PATCH] ARM: imx: imx8mn-evk: define default dfu_alt_info for emmc updates

2022-08-17 Thread Oleksandr Suvorov
From: Michael Scott 

Define dfu_alt_info to allow updating SPL/imx-boot and u-boot.itb via
DFU (which is also used by EFI capsule updates).

Signed-off-by: Michael Scott 
Signed-off-by: Oleksandr Suvorov 
---

 include/configs/imx8mn_evk.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h
index ae7fcb1027a..53fd9effddf 100644
--- a/include/configs/imx8mn_evk.h
+++ b/include/configs/imx8mn_evk.h
@@ -38,6 +38,8 @@
BOOTENV \
"console=ttymxc1,115200\0" \
"boot_fit=no\0" \
+   "dfu_alt_info=mmc 2=imx-boot raw 0x0 0x300 mmcpart 1;" \
+   "u-boot-itb raw 0x300 0xD00 mmcpart 1\0" \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
"bootm_size=0x1000\0" \
"mmcpart=1\0" \
-- 
2.37.2



[PATCH] cmd: tpm-v2: add get_random

2022-08-17 Thread Oleksandr Suvorov
From: Jorge Ramirez-Ortiz 

Enable getting randomness from the tpm command line.

Signed-off-by: Jorge Ramirez-Ortiz 
Co-developed-by: Oleksandr Suvorov 
Signed-off-by: Oleksandr Suvorov 
---

 cmd/tpm-v2.c | 36 
 1 file changed, 36 insertions(+)

diff --git a/cmd/tpm-v2.c b/cmd/tpm-v2.c
index 4ea5f9f094f..5b53953e207 100644
--- a/cmd/tpm-v2.c
+++ b/cmd/tpm-v2.c
@@ -6,8 +6,10 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -206,6 +208,37 @@ unmap_data:
return report_return_code(rc);
 }
 
+static int do_tpm2_get_random(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+   struct udevice *dev;
+   char *buffer;
+   u32 len;
+   int ret;
+
+   ret = get_tpm();
+   if (ret) {
+   printf("Can't get tpm\n");
+   return ret;
+   }
+
+   if (argc != 2)
+   return CMD_RET_USAGE;
+
+   len = simple_strtoul(argv[1], NULL, 10);
+   buffer = calloc(1, len);
+   if (!buffer)
+   return -ENOMEM;
+
+   ret = tpm2_get_random(dev, buffer, len);
+   if (!ret)
+   print_buffer(0, buffer, 1, len, 0);
+
+   free(buffer);
+
+   return report_return_code(ret);
+}
+
 static int do_tpm_dam_reset(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
 {
@@ -366,6 +399,7 @@ static struct cmd_tbl tpm2_commands[] = {
U_BOOT_CMD_MKENT(pcr_extend, 0, 1, do_tpm2_pcr_extend, "", ""),
U_BOOT_CMD_MKENT(pcr_read, 0, 1, do_tpm_pcr_read, "", ""),
U_BOOT_CMD_MKENT(get_capability, 0, 1, do_tpm_get_capability, "", ""),
+   U_BOOT_CMD_MKENT(get_random, 0, 1, do_tpm2_get_random, "", ""),
U_BOOT_CMD_MKENT(dam_reset, 0, 1, do_tpm_dam_reset, "", ""),
U_BOOT_CMD_MKENT(dam_parameters, 0, 1, do_tpm_dam_parameters, "", ""),
U_BOOT_CMD_MKENT(change_auth, 0, 1, do_tpm_change_auth, "", ""),
@@ -421,6 +455,8 @@ U_BOOT_CMD(tpm2, CONFIG_SYS_MAXARGS, 1, do_tpm, "Issue a 
TPMv2.x command",
 ": property\n"
 ": address to store  entries of 4 bytes\n"
 ": number of entries to retrieve\n"
+"get_random \n"
+"Get  random bytes.\n"
 "dam_reset []\n"
 "If the TPM is not in a LOCKOUT state, reset the internal error counter.\n"
 ": optional password\n"
-- 
2.37.2



Re: [PATCH] drivers: tee: i2c: support the NXP SE05x probe errata

2022-08-16 Thread Oleksandr Suvorov
Hi Jorge,

On Tue, Aug 16, 2022 at 2:28 PM Jorge Ramirez-Ortiz  wrote:
>
> Early instantiation of this I2C device would lock up when being
> probed.
>
> Signed-off-by: Jorge Ramirez-Ortiz 

With a small note below,
Acked-by: Oleksandr Suvorov 

> ---
>  drivers/tee/optee/Kconfig | 14 +
>  drivers/tee/optee/i2c.c   | 44 +++
>  2 files changed, 54 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/tee/optee/Kconfig b/drivers/tee/optee/Kconfig
> index d03028070b..05dfe2c9a8 100644
> --- a/drivers/tee/optee/Kconfig
> +++ b/drivers/tee/optee/Kconfig
> @@ -37,6 +37,20 @@ config OPTEE_TA_SCP03
> help
>   Enables support for controlling (enabling, provisioning) the
>   Secure Channel Protocol 03 operation in the OP-TEE SCP03 TA.
> +
> +config TEE_I2C_NXP_SE05X_ERRATA
> +   bool "Enable NXP SE05X Errata"
> +   select TEE_I2C_NXP_SE05X_ERRATA_IN_BUS
> +   default y

I doubt this should be enabled by default.

> +   help
> + This config prevents the I2C trampoline driver from probing
> + on every transfer.
> +
> +config TEE_I2C_NXP_SE05X_ERRATA_IN_BUS
> +   int "I2C bus where to apply the NXP SE05X errata"
> +   depends on TEE_I2C_NXP_SE05X_ERRATA
> +   default 0
> +
>  endmenu
>
>  endif
> diff --git a/drivers/tee/optee/i2c.c b/drivers/tee/optee/i2c.c
> index ef4e10f991..a3ea34d4a2 100644
> --- a/drivers/tee/optee/i2c.c
> +++ b/drivers/tee/optee/i2c.c
> @@ -3,13 +3,18 @@
>   * Copyright (c) 2020 Foundries.io Ltd
>   */
>
> +#define LOG_CATEGORY UCLASS_I2C
> +
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include "optee_msg.h"
>  #include "optee_private.h"
>
> +#define NXP_SE05X_ADDR 0x48
> +
>  static int check_xfer_flags(struct udevice *chip, uint tee_flags)
>  {
> uint flags;
> @@ -30,6 +35,30 @@ static int check_xfer_flags(struct udevice *chip, uint 
> tee_flags)
> return 0;
>  }
>
> +static struct udevice *get_chip_dev(int bnum, int addr)
> +{
> +   struct udevice *chip;
> +   struct udevice *bus;
> +
> +   if (IS_ENABLED(CONFIG_TEE_I2C_NXP_SE05X_ERRATA)) {
> +   if (bnum == CONFIG_TEE_I2C_NXP_SE05X_ERRATA_IN_BUS &&
> +   addr == NXP_SE05X_ADDR) {
> +   if (uclass_get_device_by_seq(UCLASS_I2C, bnum, ))
> +   return NULL;
> +
> +   if (i2c_get_chip(bus, addr, 0, ))
> +   return NULL;
> +
> +   return chip;
> +   }
> +   }
> +
> +   if (i2c_get_chip_for_busnum(bnum, addr, 0, ))
> +   return NULL;
> +
> +   return chip;
> +}
> +
>  void optee_suppl_cmd_i2c_transfer(struct optee_msg_arg *arg)
>  {
> const u8 attr[] = {
> @@ -38,7 +67,8 @@ void optee_suppl_cmd_i2c_transfer(struct optee_msg_arg *arg)
> OPTEE_MSG_ATTR_TYPE_RMEM_INOUT,
> OPTEE_MSG_ATTR_TYPE_VALUE_OUTPUT,
> };
> -   struct udevice *chip_dev;
> +   struct udevice *chip_dev = NULL;
> +
> struct tee_shm *shm;
> u8 *buf;
> int ret;
> @@ -56,9 +86,9 @@ void optee_suppl_cmd_i2c_transfer(struct optee_msg_arg *arg)
> if (!buf)
> goto bad;
>
> -   if (i2c_get_chip_for_busnum((int)arg->params[0].u.value.b,
> -   (int)arg->params[0].u.value.c,
> -   0, _dev))
> +   chip_dev = get_chip_dev((int)arg->params[0].u.value.b,
> +   (int)arg->params[0].u.value.c);
> +   if (!chip_dev)
> goto bad;
>
> if (check_xfer_flags(chip_dev, arg->params[1].u.value.a))
> @@ -66,10 +96,16 @@ void optee_suppl_cmd_i2c_transfer(struct optee_msg_arg 
> *arg)
>
> switch (arg->params[0].u.value.a) {
> case OPTEE_MSG_RPC_CMD_I2C_TRANSFER_RD:
> +   log_debug("OPTEE_MSG_RPC_CMD_I2C_TRANSFER_RD %d\n",
> + (size_t)arg->params[2].u.rmem.size);
> +
> ret = dm_i2c_read(chip_dev, 0, buf,
>   (size_t)arg->params[2].u.rmem.size);
> break;
> case OPTEE_MSG_RPC_CMD_I2C_TRANSFER_WR:
> +   log_debug("OPTEE_MSG_RPC_CMD_I2C_TRANSFER_WR %d\n",
> + (size_t)arg->params[2].u.rmem.size);
> +
> ret = dm_i2c_write(chip_dev, 0, buf,
>(size_t)arg->params[2].u.rmem.size);
> break;
> --
> 2.34.1
>


-- 
Best regards
Oleksandr

Oleksandr Suvorov
cryo...@gmail.com


Re: [PATCH 2/2] i2c: stm32f7: do not set the STOP condition on error

2022-08-15 Thread Oleksandr Suvorov
Jorge,

On Mon, Aug 15, 2022 at 2:19 PM Jorge Ramirez-Ortiz  wrote:
>
> Sending the stop condition without waiting for TC has been
> found to lock the bus.
>
> Tested accessing the the NXP SE05X I2C device.

"the the" seems like a typo.

With this,
Reviewed-by: Oleksandr Suvorov 

> Signed-off-by: Jorge Ramirez-Ortiz 
> ---
>  drivers/i2c/stm32f7_i2c.c | 8 +---
>  1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
> index 3a727e68ac..14827e5cec 100644
> --- a/drivers/i2c/stm32f7_i2c.c
> +++ b/drivers/i2c/stm32f7_i2c.c
> @@ -485,9 +485,11 @@ static int stm32_i2c_message_xfer(struct stm32_i2c_priv 
> *i2c_priv,
> }
> }
>
> -   /* End of transfer, send stop condition */
> -   mask = STM32_I2C_CR2_STOP;
> -   setbits_le32(>cr2, mask);
> +   if (!ret) {
> +   /* End of transfer, send stop condition */
> +   mask = STM32_I2C_CR2_STOP;
> +   setbits_le32(>cr2, mask);
> +   }
>
>     return stm32_i2c_check_end_of_message(i2c_priv);
>  }
> --
> 2.34.1
>


-- 
Best regards
Oleksandr

Oleksandr Suvorov
cryo...@gmail.com


Re: [RESEND PATCH v3 1/1] mx7ulp: add base SPL support for mx7ulp

2022-08-07 Thread Oleksandr Suvorov
Hi Stefano,

This patchset is superseded by that one
https://patchwork.ozlabs.org/project/uboot/list/?series=312792

On Mon, Jul 11, 2022 at 5:05 PM Oleksandr Suvorov
 wrote:
>
> From: Ricardo Salveti 
>
> Add a base implementation of mx7ulp SPL config header and soc,
> and changes in makefiles in order to allow building SPL on mx7ulp
> based devices.
>
> Signed-off-by: Ricardo Salveti 
> Co-developed-by: Oleksandr Suvorov 
> Signed-off-by: Oleksandr Suvorov 
> ---
>
> Changes in v3:
> - rebase the patch to the current codebase
>
>  arch/arm/Makefile  |  2 +-
>  arch/arm/mach-imx/Makefile |  2 +-
>  arch/arm/mach-imx/mx7ulp/soc.c |  2 +-
>  arch/arm/mach-imx/spl.c| 12 ---
>  include/configs/imx7ulp_spl.h  | 39 ++
>  5 files changed, 51 insertions(+), 6 deletions(-)
>  create mode 100644 include/configs/imx7ulp_spl.h
>
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index a37603035d8..7c7e88df61c 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -111,7 +111,7 @@ libs-y += arch/arm/cpu/
>  libs-y += arch/arm/lib/
>
>  ifeq ($(CONFIG_SPL_BUILD),y)
> -ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(filter $(SOC), mx25 mx5 mx6 mx7 mx35 
> imx8m imx8 imx8ulp imxrt))
> +ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(filter $(SOC), mx25 mx5 mx6 mx7 mx7ulp 
> mx35 imx8m imx8 imx8ulp imxrt))
>  libs-y += arch/arm/mach-imx/
>  endif
>  else
> diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
> index aa0b6447f14..bbf812776bc 100644
> --- a/arch/arm/mach-imx/Makefile
> +++ b/arch/arm/mach-imx/Makefile
> @@ -29,7 +29,7 @@ endif
>  obj-$(CONFIG_GPT_TIMER) += timer.o
>  obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
>  endif
> -ifeq ($(SOC),$(filter $(SOC),mx7 mx6 mxs imx8m imx8 imxrt))
> +ifeq ($(SOC),$(filter $(SOC),mx7 mx7ulp mx6 mxs imx8m imx8 imxrt))
>  obj-y  += misc.o
>  obj-$(CONFIG_CMD_PRIBLOB) += priblob.o
>  obj-$(CONFIG_SPL_BUILD)+= spl.o
> diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c
> index 217b7c45867..951b1888c58 100644
> --- a/arch/arm/mach-imx/mx7ulp/soc.c
> +++ b/arch/arm/mach-imx/mx7ulp/soc.c
> @@ -234,7 +234,7 @@ void s_init(void)
>  }
>  #endif
>
> -#ifndef CONFIG_ULP_WATCHDOG
> +#if !CONFIG_IS_ENABLED(ULP_WATCHDOG) || CONFIG_IS_ENABLED(SPL_BUILD)
>  void reset_cpu(void)
>  {
> setbits_le32(SIM0_RBASE, SIM_SOPT1_A7_SW_RESET);
> diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
> index 64ca2967721..a033d4f6fa1 100644
> --- a/arch/arm/mach-imx/spl.c
> +++ b/arch/arm/mach-imx/spl.c
> @@ -111,8 +111,12 @@ u32 spl_boot_device(void)
> return BOOT_DEVICE_NONE;
>  }
>
> -#elif defined(CONFIG_MX7) || defined(CONFIG_IMX8M) || defined(CONFIG_IMX8)
> -/* Translate iMX7/i.MX8M boot device to the SPL boot device enumeration */
> +#elif defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) || \
> +   defined(CONFIG_IMX8M) || defined(CONFIG_IMX8)
> +/*
> + * Translate iMX7/i.MX7ULP/i.MX8M/i.MX8 boot device to the SPL boot
> + * device enumeration
> + */
>  u32 spl_boot_device(void)
>  {
>  #if defined(CONFIG_MX7)
> @@ -124,7 +128,9 @@ u32 spl_boot_device(void)
>  */
> if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */
> return BOOT_DEVICE_BOARD;
> +#endif
>
> +#if defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
> /*
>  * The above method does not detect that the boot ROM used
>  * serial downloader in case the boot ROM decided to use the
> @@ -182,7 +188,7 @@ u32 spl_boot_device(void)
> return BOOT_DEVICE_NONE;
> }
>  }
> -#endif /* CONFIG_MX7 || CONFIG_IMX8M || CONFIG_IMX8 */
> +#endif /* CONFIG_MX7 || CONFIG_MX7ULP || CONFIG_IMX8M || CONFIG_IMX8 */
>
>  #ifdef CONFIG_SPL_USB_GADGET
>  int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
> diff --git a/include/configs/imx7ulp_spl.h b/include/configs/imx7ulp_spl.h
> new file mode 100644
> index 000..33b034e
> --- /dev/null
> +++ b/include/configs/imx7ulp_spl.h
> @@ -0,0 +1,39 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * SPL definitions for the i.MX7ULP SPL
> + *
> + * (C) Copyright 2019 Foundries.io
> + */
> +
> +#ifndef __IMX7ULP_SPL_CONFIG_H
> +#define __IMX7ULP_SPL_CONFIG_H
> +
> +#if CONFIG_IS_ENABLED(SPL)
> +/*
> + * see figure 35-5 in i.MX 7ULP Reference manual:
> + *  - IMX7ULP A7 OCRAM free area RAM is from 0x2F01 to 0x2F03FF00.
> + *  - Set the stack at the end of the free area section, at 0x2003FEB8.
> + *  - The BOOT ROM loads what they consider the firmware image
> + *which con

[PATCH v4 1/2] mx7ulp: add base SPL support for mx7ulp

2022-08-05 Thread Oleksandr Suvorov
From: Ricardo Salveti 

Add a base implementation of mx7ulp SPL config header and soc,
and changes in makefiles in order to allow building SPL on mx7ulp
based devices.

Signed-off-by: Ricardo Salveti 
Co-developed-by: Oleksandr Suvorov 
Signed-off-by: Oleksandr Suvorov 
---

Changes in v4:
- rebase to the current master
- fix a reference to a non-existent option SPL_MMC_SUPPORT

Changes in v3:
- rebase the patch to the current codebase

 arch/arm/mach-imx/Makefile |  2 +-
 arch/arm/mach-imx/mx7ulp/soc.c |  2 +-
 arch/arm/mach-imx/spl.c|  6 --
 include/configs/imx7ulp_spl.h  | 39 ++
 4 files changed, 45 insertions(+), 4 deletions(-)
 create mode 100644 include/configs/imx7ulp_spl.h

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 80c497e6d81..71e6cac2f63 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -29,7 +29,7 @@ endif
 obj-$(CONFIG_GPT_TIMER) += timer.o
 obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
 endif
-ifeq ($(SOC),$(filter $(SOC),mx7 mx6 mxs imx8m imx8 imx9 imxrt))
+ifeq ($(SOC),$(filter $(SOC),mx7 mx7ulp mx6 mxs imx8m imx8 imx9 imxrt))
 obj-y  += misc.o
 obj-$(CONFIG_CMD_PRIBLOB) += priblob.o
 obj-$(CONFIG_SPL_BUILD)+= spl.o
diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c
index 217b7c45867..951b1888c58 100644
--- a/arch/arm/mach-imx/mx7ulp/soc.c
+++ b/arch/arm/mach-imx/mx7ulp/soc.c
@@ -234,7 +234,7 @@ void s_init(void)
 }
 #endif
 
-#ifndef CONFIG_ULP_WATCHDOG
+#if !CONFIG_IS_ENABLED(ULP_WATCHDOG) || CONFIG_IS_ENABLED(SPL_BUILD)
 void reset_cpu(void)
 {
setbits_le32(SIM0_RBASE, SIM_SOPT1_A7_SW_RESET);
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index ef00969a5e0..bca0b1123a7 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -147,7 +147,7 @@ u32 spl_boot_device(void)
return BOOT_DEVICE_NONE;
 }
 
-#elif defined(CONFIG_MX7) || defined(CONFIG_IMX8M) || defined(CONFIG_IMX8) || 
defined(CONFIG_IMX9)
+#elif defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M) 
|| defined(CONFIG_IMX8) || defined(CONFIG_IMX9)
 /* Translate iMX7/i.MX8M boot device to the SPL boot device enumeration */
 u32 spl_boot_device(void)
 {
@@ -160,7 +160,9 @@ u32 spl_boot_device(void)
 */
if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */
return BOOT_DEVICE_BOARD;
+#endif
 
+#if defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
/*
 * The above method does not detect that the boot ROM used
 * serial downloader in case the boot ROM decided to use the
@@ -178,7 +180,7 @@ u32 spl_boot_device(void)
 
return spl_board_boot_device(boot_device_spl);
 }
-#endif /* CONFIG_MX7 || CONFIG_IMX8M || CONFIG_IMX8 */
+#endif /* CONFIG_MX7 || CONFIG_MX7ULP || CONFIG_IMX8M || CONFIG_IMX8 */
 
 #ifdef CONFIG_SPL_USB_GADGET
 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
diff --git a/include/configs/imx7ulp_spl.h b/include/configs/imx7ulp_spl.h
new file mode 100644
index 000..516238ec02e
--- /dev/null
+++ b/include/configs/imx7ulp_spl.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * SPL definitions for the i.MX7ULP SPL
+ *
+ * (C) Copyright 2019 Foundries.io
+ */
+
+#ifndef __IMX7ULP_SPL_CONFIG_H
+#define __IMX7ULP_SPL_CONFIG_H
+
+#if CONFIG_IS_ENABLED(SPL)
+/*
+ * see figure 35-5 in i.MX 7ULP Reference manual:
+ *  - IMX7ULP A7 OCRAM free area RAM is from 0x2F01 to 0x2F03FF00.
+ *  - Set the stack at the end of the free area section, at 0x2003FEB8.
+ *  - The BOOT ROM loads what they consider the firmware image
+ *which consists of a 4K header in front of us that contains the IVT, DCD,
+ *and some padding thus 'our' max size is really 0x2F03FF00 - 0x2F011000.
+ *187KB is more than enough for the SPL.
+ */
+#define CONFIG_SPL_STACK   0x2F03FEB8
+
+/* MMC support */
+#if CONFIG_IS_ENABLED(SPL_MMC)
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MONITOR_LEN 409600  /* 400 KB */
+#endif
+
+/* Define the payload for FAT/EXT support */
+#if CONFIG_IS_ENABLED(SPL_FS_FAT) || CONFIG_IS_ENABLED(SPL_FS_EXT4)
+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME"u-boot-dtb.img"
+#endif
+
+#define CONFIG_SYS_SPL_MALLOC_START0x6830
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x10/* 1 MB */
+
+#endif /* CONFIG_SPL */
+
+#endif /* __IMX7ULP_SPL_CONFIG_H */
-- 
2.37.1



[PATCH v4 2/2] imx: spl: fix a comment adding IMX9

2022-08-05 Thread Oleksandr Suvorov
There is a paired to ifdef comment which should include CONFIG_IMX9
as well.

Fixes: 881df6ed84c ("imx: add basic i.MX9 support")
Signed-off-by: Oleksandr Suvorov 
---

Changes in v4:
- add a small fix for imx spl.

 arch/arm/mach-imx/spl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index bca0b1123a7..46fb1b388cc 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -180,7 +180,7 @@ u32 spl_boot_device(void)
 
return spl_board_boot_device(boot_device_spl);
 }
-#endif /* CONFIG_MX7 || CONFIG_MX7ULP || CONFIG_IMX8M || CONFIG_IMX8 */
+#endif /* CONFIG_MX7 || CONFIG_MX7ULP || CONFIG_IMX8M || CONFIG_IMX8 || 
CONFIG_IMX9 */
 
 #ifdef CONFIG_SPL_USB_GADGET
 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
-- 
2.37.1



[PATCH v4 0/2] Support SPL for i.MX7ULP

2022-08-05 Thread Oleksandr Suvorov


I've just realized this patch was not applied from the original
patchset "Support SPL for i.MX7ULP".

Please apply this patch to fix the code as now
"include/configs/mx7ulp_com.h" refers to non-existent
"include/configs/imx7ulp_spl.h".

This supersedes the patchset
https://patchwork.ozlabs.org/project/uboot/list/?series=309021

Changes in v4:
- rebase to the current master
- fix a reference to a non-existent option SPL_MMC_SUPPORT
- add a small fix for imx spl.

Changes in v3:
- rebase the patch to the current codebase

Oleksandr Suvorov (1):
  imx: spl: fix a comment adding IMX9

Ricardo Salveti (1):
  mx7ulp: add base SPL support for mx7ulp

 arch/arm/mach-imx/Makefile |  2 +-
 arch/arm/mach-imx/mx7ulp/soc.c |  2 +-
 arch/arm/mach-imx/spl.c|  6 --
 include/configs/imx7ulp_spl.h  | 39 ++
 4 files changed, 45 insertions(+), 4 deletions(-)
 create mode 100644 include/configs/imx7ulp_spl.h

-- 
2.37.1



Re: [PATCH 0/2] Fix remained SPL_MMC_SUPPORT options

2022-08-05 Thread Oleksandr Suvorov
Please, ignore this patchset - these issues were fixed in another one
just applied.

On Thu, Aug 4, 2022 at 9:16 PM Oleksandr Suvorov
 wrote:
>
>
> SPL_MMC_SUPPORT option is still used in few places in spite of
> renaming in the commit 103c5f18069 ("mmc: Rename MMC_SUPPORT to MMC").
> This patch set fixes the rest of SPL_MMC_SUPPORT options.
>
>
> Oleksandr Suvorov (2):
>   mx7ulp_com: fix obsolete option SPL_MMC_SUPPORT
>   arm: imx8m: imx8mp_rsb3720a1: fix name of option SPL_MMC_SUPPORT
>
>  arch/arm/mach-imx/mx7ulp/Kconfig| 2 +-
>  board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c | 4 ++--
>  2 files changed, 3 insertions(+), 3 deletions(-)
>
> --
> 2.37.1
>


-- 
Best regards
Oleksandr

Oleksandr Suvorov
cryo...@gmail.com


[PATCH 2/2] arm: imx8m: imx8mp_rsb3720a1: fix name of option SPL_MMC_SUPPORT

2022-08-04 Thread Oleksandr Suvorov
SPL_MMC_SUPPORT is renamed to SPL_MMC in the
commit 103c5f18069 ("mmc: Rename MMC_SUPPORT to MMC")

Fix the name of the option used in TARGET_MX7ULP_COM.

Fixes: ddb56f371a7 ("arm: imx8m: add support for Advantech RSB-3720")
Signed-off-by: Oleksandr Suvorov 
---

 board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c 
b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
index 0a1b2c94161..aa9687f7a9d 100644
--- a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
+++ b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
@@ -206,7 +206,7 @@ int board_late_init(void)
return 0;
 }
 
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
 #define UBOOT_RAW_SECTOR_OFFSET 0x40
 unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc)
 {
@@ -219,4 +219,4 @@ unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc)
return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR;
}
 }
-#endif /* CONFIG_SPL_MMC_SUPPORT */
+#endif /* CONFIG_SPL_MMC */
-- 
2.37.1



[PATCH 1/2] mx7ulp_com: fix obsolete option SPL_MMC_SUPPORT

2022-08-04 Thread Oleksandr Suvorov
SPL_MMC_SUPPORT is renamed to SPL_MMC in the
commit 103c5f18069 ("mmc: Rename MMC_SUPPORT to MMC")

Fix the name of that option used in TARGET_MX7ULP_COM.

Fixes: 8b71576f384 ("mx7ulp_com: add support for SPL")
Signed-off-by: Oleksandr Suvorov 
---

 arch/arm/mach-imx/mx7ulp/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/mx7ulp/Kconfig b/arch/arm/mach-imx/mx7ulp/Kconfig
index 615d75bdd0b..561ca22a764 100644
--- a/arch/arm/mach-imx/mx7ulp/Kconfig
+++ b/arch/arm/mach-imx/mx7ulp/Kconfig
@@ -28,7 +28,7 @@ config TARGET_MX7ULP_COM
select SPL_LIBCOMMON_SUPPORT if SPL
select SPL_LIBDISK_SUPPORT if SPL
select SPL_LIBGENERIC_SUPPORT if SPL
-   select SPL_MMC_SUPPORT if SPL
+   select SPL_MMC if SPL
select SPL_OF_CONTROL if SPL
select SPL_OF_LIBFDT if SPL
select SPL_PINCTRL if SPL
-- 
2.37.1



[PATCH 0/2] Fix remained SPL_MMC_SUPPORT options

2022-08-04 Thread Oleksandr Suvorov


SPL_MMC_SUPPORT option is still used in few places in spite of
renaming in the commit 103c5f18069 ("mmc: Rename MMC_SUPPORT to MMC").
This patch set fixes the rest of SPL_MMC_SUPPORT options.


Oleksandr Suvorov (2):
  mx7ulp_com: fix obsolete option SPL_MMC_SUPPORT
  arm: imx8m: imx8mp_rsb3720a1: fix name of option SPL_MMC_SUPPORT

 arch/arm/mach-imx/mx7ulp/Kconfig| 2 +-
 board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

-- 
2.37.1



[PATCH v12 13/13] fpga: zynqmp: support loading encrypted bitfiles

2022-07-22 Thread Oleksandr Suvorov
From: Adrian Fiergolski 

Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to
handle loading encrypted bitfiles.

This feature requires encrypted FSBL, as according to UG1085:
"The CSU automatically locks out the AES key, stored in either BBRAM
 or eFUSEs, as a key source to the AES engine if the FSBL is not
 encrypted. This prevents using the BBRAM or eFUSE as the key source
 to the AES engine during run-time applications."

Signed-off-by: Adrian Fiergolski 
Co-developed-by: Oleksandr Suvorov 
Signed-off-by: Oleksandr Suvorov 
Tested-by: Adrian Fiergolski 
---

Changes in v12:
- reduce the size of SPL if FPGA_LOAD_SECURE disabled.

Changes in v11:
- add Tested-by records.

Changes in v10:
- Support ENC images only if FPGA_LOAD_SECURE enabled.

Changes in v9:
- remove an alien commit from a patchset :)

Changes in v8:
- Michal Simek's suggestions addressed:
-- introduce the compatible flags in xilinx_desc;
-- pass a binary compatible flag instead of "compatible" property to
   an FPGA driver.
- Optimize a zynqmp_load() function.

Changes in v7:
- apply Michal Simek's suggestions
  As I applied changes on Oleksandr's patches, I indicated it by
  specifying myself as co-author in the commits logs. I am not sure
  if that is the convention of marking it.

Changes in v6:
- add support for the encrypted bitfiles.

Changes in v5:
- replace ifdef with if() where it's possible.

Changes in v4:
- change interface to xilinx_desc->operations->open() callback.
- fix a bug from previous version of the patchset in dereferencing
  of a parent fpga_desc structure.

Changes in v3:
- remove the patch which introduced CMD_SPL_FPGA_LOAD_SECURE.
- fix mixing definitions/declarations.
- replace strcmp() calls with more secure strncmp().
- document the "u-boot,zynqmp-fpga-ddrauth" compatible string.
- fix code style by check-patch recommendations.

Changes in v2:
- add function fit_fpga_load() to simplify calls of fpga_load()
  from contexts without a compatible attribute.
- move all ZynqMP-specific logic to drivers/fpga/zynqmppl.c
- prepare for passing a "compatible" FDT property to any fpga driver.

 doc/uImage.FIT/source_file_format.txt | 2 ++
 drivers/fpga/zynqmppl.c   | 8 
 include/fpga.h| 1 +
 include/xilinx.h  | 1 +
 include/zynqmppl.h| 4 +++-
 5 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/doc/uImage.FIT/source_file_format.txt 
b/doc/uImage.FIT/source_file_format.txt
index 461e2af2a84..68701118409 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -188,6 +188,8 @@ the '/images' node should have the following layout:
 "u-boot,fpga-legacy" - the generic fpga loading routine.
 "u-boot,zynqmp-fpga-ddrauth" - signed non-encrypted FPGA bitstream for
 Xilinx Zynq UltraScale+ (ZymqMP) device.
+"u-boot,zynqmp-fpga-enc" - encrypted FPGA bitstream for Xilinx Zynq
+UltraScale+ (ZynqMP) device.
 
   Optional nodes:
   - hash-1 : Each hash sub-node represents separate hash or checksum
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 200076c8c6a..a6c8dcdcdcc 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -256,6 +256,11 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, 
size_t bsize,
info.authflag = ZYNQMP_FPGA_AUTH_DDR;
info.encflag = FPGA_NO_ENC_OR_NO_AUTH;
return desc->operations->loads(desc, buf, bsize, );
+   case FPGA_XILINX_ZYNQMP_ENC:
+   /* Encryption using device key */
+   info.authflag = FPGA_NO_ENC_OR_NO_AUTH;
+   info.encflag = FPGA_ENC_DEV_KEY;
+   return desc->operations->loads(desc, buf, bsize, );
default:
printf("Unsupported bitstream type %d\n", flags);
return FPGA_FAIL;
@@ -358,6 +363,9 @@ static int __maybe_unused zynqmp_str2flag(xilinx_desc 
*desc, const char *str)
 #if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
if (!strncmp(str, "u-boot,zynqmp-fpga-ddrauth", 26))
return FPGA_XILINX_ZYNQMP_DDRAUTH;
+
+   if (!strncmp(str, "u-boot,zynqmp-fpga-enc", 22))
+   return FPGA_XILINX_ZYNQMP_ENC;
 #endif
return 0;
 }
diff --git a/include/fpga.h b/include/fpga.h
index 13b1bbee3ca..a4e16401da7 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -20,6 +20,7 @@
 /* device numbers must be non-negative */
 #define FPGA_INVALID_DEVICE-1
 
+#define FPGA_ENC_DEV_KEY   0
 #define FPGA_ENC_USR_KEY   1
 #define FPGA_NO_ENC_OR_NO_AUTH 2
 
diff --git a/include/xilinx.h b/include/xilinx.h
index 97ee12cec42..e4e29797988 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -40,6 +40,7 @@ typedef enum {/* typedef 
xilinx_family */
 /* FPGA bitstream supported types 

[PATCH v12 12/13] fpga: zynqmp: support loading authenticated images

2022-07-22 Thread Oleksandr Suvorov
Add supporting new compatible string "u-boot,zynqmp-fpga-ddrauth" to
handle loading authenticated images (DDR).

Based on solution by Jorge Ramirez-Ortiz 
Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
---

(no changes since v11)

Changes in v11:
- Fix treating an incoming FPGA image with empty flags parameter as
  legacy.

Changes in v10:
- Support DDR images only if FPGA_LOAD_SECURE enabled.

 boot/Kconfig  |  4 ++--
 doc/uImage.FIT/source_file_format.txt |  5 -
 drivers/fpga/zynqmppl.c   | 31 ++-
 include/xilinx.h  |  1 +
 include/zynqmppl.h|  4 
 5 files changed, 37 insertions(+), 8 deletions(-)

diff --git a/boot/Kconfig b/boot/Kconfig
index 17438b566d5..59d0c65c944 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -210,8 +210,8 @@ config SPL_LOAD_FIT
  1. "loadables" images, other than FDTs, which do not have a "load"
 property will not be loaded. This limitation also applies to FPGA
 images with the correct "compatible" string.
- 2. For FPGA images, only the "compatible" = "u-boot,fpga-legacy"
-loading method is supported.
+ 2. For FPGA images, the supported "compatible" list is in the
+doc/uImage.FIT/source_file_format.txt.
  3. FDTs are only loaded for images with an "os" property of "u-boot".
 "linux" images are also supported with Falcon boot mode.
 
diff --git a/doc/uImage.FIT/source_file_format.txt 
b/doc/uImage.FIT/source_file_format.txt
index f93ac6d1c7b..461e2af2a84 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -184,7 +184,10 @@ the '/images' node should have the following layout:
 Mandatory for types: "firmware", and "kernel".
   - compatible : compatible method for loading image.
 Mandatory for types: "fpga", and images that do not specify a load address.
-To use the generic fpga loading routine, use "u-boot,fpga-legacy".
+Supported compatible methods:
+"u-boot,fpga-legacy" - the generic fpga loading routine.
+"u-boot,zynqmp-fpga-ddrauth" - signed non-encrypted FPGA bitstream for
+Xilinx Zynq UltraScale+ (ZymqMP) device.
 
   Optional nodes:
   - hash-1 : Each hash sub-node represents separate hash or checksum
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index feaf34fff11..200076c8c6a 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -202,9 +203,12 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, 
const void *buf,
 #if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
 static int zynqmp_check_compatible(xilinx_desc *desc, int flags)
 {
-   /* If no flags set, the image is legacy */
+   /*
+* If no flags set, the image may be legacy, but we need to
+* signal caller this situation with specific error code.
+*/
if (!flags)
-   return 0;
+   return -ENODATA;
 
/* For legacy bitstream images no need for other methods exist */
if ((flags & desc->flags) && flags == FPGA_LEGACY)
@@ -217,7 +221,7 @@ static int zynqmp_check_compatible(xilinx_desc *desc, int 
flags)
if (desc->operations->loads && (flags & desc->flags))
return 0;
 
-   return FPGA_FAIL;
+   return -ENODEV;
 }
 #endif
 
@@ -231,8 +235,9 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, 
size_t bsize,
u32 buf_lo, buf_hi;
u32 bsize_req = (u32)bsize;
u32 ret_payload[PAYLOAD_ARG_CNT];
-
 #if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
+   struct fpga_secure_info info = { 0 };
+
ret = zynqmp_check_compatible(desc, flags);
if (ret) {
if (ret != -ENODATA) {
@@ -242,6 +247,19 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, 
size_t bsize,
/* If flags is not set, the image treats as legacy */
flags = FPGA_LEGACY;
}
+
+   switch (flags) {
+   case FPGA_LEGACY:
+   break;  /* Handle the legacy image later in this function */
+   case FPGA_XILINX_ZYNQMP_DDRAUTH:
+   /* DDR authentication */
+   info.authflag = ZYNQMP_FPGA_AUTH_DDR;
+   info.encflag = FPGA_NO_ENC_OR_NO_AUTH;
+   return desc->operations->loads(desc, buf, bsize, );
+   default:
+   printf("Unsupported bitstream type %d\n", flags);
+   return FPGA_FAIL;
+   }
 #endif
 
if (zynqmp_firmware_version() <= PMUFW_V1_0) {
@@ -337,7 +355,10 @@ static int __maybe_unused zynqmp_str2flag(xilinx_desc 
*desc, const char *str)
 {

[PATCH v12 09/13] fpga: xilinx: pass compatible flags to load() callback

2022-07-22 Thread Oleksandr Suvorov
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v1)

 drivers/fpga/spartan2.c | 2 +-
 drivers/fpga/spartan3.c | 2 +-
 drivers/fpga/versalpl.c | 2 +-
 drivers/fpga/virtex2.c  | 2 +-
 drivers/fpga/xilinx.c   | 2 +-
 drivers/fpga/zynqmppl.c | 2 +-
 drivers/fpga/zynqpl.c   | 2 +-
 include/xilinx.h| 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index 3435400e58b..328740f3f35 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -41,7 +41,7 @@ static int spartan2_ss_dump(xilinx_desc *desc, const void 
*buf, size_t bsize);
 /* - */
 /* Spartan-II Generic Implementation */
 static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize,
-bitstream_type bstype)
+bitstream_type bstype, int flags)
 {
int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index 4850c99352d..918f6db5065 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -45,7 +45,7 @@ static int spartan3_ss_dump(xilinx_desc *desc, const void 
*buf, size_t bsize);
 /* - */
 /* Spartan-II Generic Implementation */
 static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize,
-bitstream_type bstype)
+bitstream_type bstype, int flags)
 {
int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c
index c44a7d34557..d3876a8f541 100644
--- a/drivers/fpga/versalpl.c
+++ b/drivers/fpga/versalpl.c
@@ -27,7 +27,7 @@ static ulong versal_align_dma_buffer(ulong *buf, u32 len)
 }
 
 static int versal_load(xilinx_desc *desc, const void *buf, size_t bsize,
-  bitstream_type bstype)
+  bitstream_type bstype, int flags)
 {
ulong bin_buf;
int ret;
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index b3e0537bab0..83b90298cad 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -94,7 +94,7 @@ static int virtex2_ss_load(xilinx_desc *desc, const void 
*buf, size_t bsize);
 static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 
 static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize,
-   bitstream_type bstype)
+   bitstream_type bstype, int flags)
 {
int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index d9951ca3ecf..8170c3368ef 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -151,7 +151,7 @@ int xilinx_load(xilinx_desc *desc, const void *buf, size_t 
bsize,
return FPGA_FAIL;
}
 
-   return desc->operations->load(desc, buf, bsize, bstype);
+   return desc->operations->load(desc, buf, bsize, bstype, flags);
 }
 
 #if defined(CONFIG_CMD_FPGA_LOADFS)
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 19d079c9d9f..a0624567882 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -200,7 +200,7 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, 
const void *buf,
 }
 
 static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
-bitstream_type bstype)
+bitstream_type bstype, int flags)
 {
ALLOC_CACHE_ALIGN_BUFFER(u32, bsizeptr, 1);
u32 swap = 0;
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index 2de40109a81..d8ebd542abd 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -371,7 +371,7 @@ static int zynq_validate_bitstream(xilinx_desc *desc, const 
void *buf,
 }
 
 static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize,
-bitstream_type bstype)
+bitstream_type bstype, int flags)
 {
unsigned long ts; /* Timestamp */
u32 isr_status, swap;
diff --git a/include/xilinx.h b/include/xilinx.h
index 0bbf14d8a1d..e5f6db33fa2 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -53,7 +53,7 @@ typedef struct {  /* typedef xilinx_desc */
 
 struct xilinx_fpga_op {
int (*load)(xilinx_desc *desc, const void *buf, size_t bsize,
-   bitstream_type bstype);
+   bitstream_type bstype, int flags);
int (*loadfs)(xilinx_desc *desc, const void *buf, size_t bsize,
  fpga_fs_info *fpga_fsinfo);
int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize,
-- 
2.36.1



[PATCH v12 11/13] fpga: zynqmp: add bitstream compatible checking

2022-07-22 Thread Oleksandr Suvorov
Check whether the FPGA ZynqMP driver supports the given bitstream
image type.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

Changes in v12:
- exclude all secure-related code if FPGA_LOAD_SECURE is disabled

Changes in v10:
- fix grammar

 drivers/fpga/zynqmppl.c | 34 ++
 1 file changed, 34 insertions(+)

diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 2791f931861..feaf34fff11 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -199,6 +199,28 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, 
const void *buf,
return 0;
 }
 
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
+static int zynqmp_check_compatible(xilinx_desc *desc, int flags)
+{
+   /* If no flags set, the image is legacy */
+   if (!flags)
+   return 0;
+
+   /* For legacy bitstream images no need for other methods exist */
+   if ((flags & desc->flags) && flags == FPGA_LEGACY)
+   return 0;
+
+   /*
+* Other images are handled in secure callback loads(). Check
+* callback existence besides image type support.
+*/
+   if (desc->operations->loads && (flags & desc->flags))
+   return 0;
+
+   return FPGA_FAIL;
+}
+#endif
+
 static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
 bitstream_type bstype, int flags)
 {
@@ -210,6 +232,18 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, 
size_t bsize,
u32 bsize_req = (u32)bsize;
u32 ret_payload[PAYLOAD_ARG_CNT];
 
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
+   ret = zynqmp_check_compatible(desc, flags);
+   if (ret) {
+   if (ret != -ENODATA) {
+   puts("Missing loads() operation or unsupported 
bitstream type\n");
+   return FPGA_FAIL;
+   }
+   /* If flags is not set, the image treats as legacy */
+   flags = FPGA_LEGACY;
+   }
+#endif
+
if (zynqmp_firmware_version() <= PMUFW_V1_0) {
puts("WARN: PMUFW v1.0 or less is detected\n");
puts("WARN: Not all bitstream formats are supported\n");
-- 
2.36.1



[PATCH v12 10/13] fpga: zynqmp: reduce zynqmppl_load() code

2022-07-22 Thread Oleksandr Suvorov
Reduce the function code by calling xilinx_pm_request() once only.
Use the same variable bsize_req to store either bstream size in bytes
or an address of bstream size according to a type required by the
firmware version. Remove obsolete debug().

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

Changes in v12:
- fix a commit message
- remove obsolete debug() message

 drivers/fpga/zynqmppl.c | 17 ++---
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index a0624567882..2791f931861 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -207,38 +207,33 @@ static int zynqmp_load(xilinx_desc *desc, const void 
*buf, size_t bsize,
ulong bin_buf;
int ret;
u32 buf_lo, buf_hi;
+   u32 bsize_req = (u32)bsize;
u32 ret_payload[PAYLOAD_ARG_CNT];
-   bool xilfpga_old = false;
 
if (zynqmp_firmware_version() <= PMUFW_V1_0) {
puts("WARN: PMUFW v1.0 or less is detected\n");
puts("WARN: Not all bitstream formats are supported\n");
puts("WARN: Please upgrade PMUFW\n");
-   xilfpga_old = true;
if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, ))
return FPGA_FAIL;
bsizeptr = (u32 *)
flush_dcache_range((ulong)bsizeptr,
   (ulong)bsizeptr + sizeof(size_t));
+   bsize_req = (u32)(uintptr_t)bsizeptr;
bstype |= BIT(ZYNQMP_FPGA_BIT_NS);
+   } else {
+   bstype = 0;
}
 
bin_buf = zynqmp_align_dma_buffer((u32 *)buf, bsize, swap);
 
-   debug("%s called!\n", __func__);
flush_dcache_range(bin_buf, bin_buf + bsize);
 
buf_lo = (u32)bin_buf;
buf_hi = upper_32_bits(bin_buf);
 
-   if (xilfpga_old)
-   ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo,
-   buf_hi, (u32)(uintptr_t)bsizeptr,
-   bstype, ret_payload);
-   else
-   ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo,
-   buf_hi, (u32)bsize, 0, ret_payload);
-
+   ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo, buf_hi,
+   bsize_req, bstype, ret_payload);
if (ret)
printf("PL FPGA LOAD failed with err: 0x%08x\n", ret);
 
-- 
2.36.1



[PATCH v12 08/13] spl: fit: pass real compatible flags to fpga_load()

2022-07-22 Thread Oleksandr Suvorov
Convert taken FPGA image "compatible" string to a binary compatible
flag and pass it to an FPGA driver.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

Changes in v12:
- convert "compatible" to flags only if FPGA_LOAD_SECURE enabled;

Changes in v10:
- made the message about ignoring legacy compatibe option as debug;

 common/spl/spl_fit.c | 11 ---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 3c5a91916cc..a35be529656 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -588,10 +588,15 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx, 
int node,
  (u32)fpga_image->load_addr, fpga_image->size);
 
compatible = fdt_getprop(ctx->fit, node, "compatible", NULL);
-   if (!compatible)
+   if (!compatible) {
warn_deprecated("'fpga' image without 'compatible' property");
-   else if (strcmp(compatible, "u-boot,fpga-legacy"))
-   printf("Ignoring compatible = %s property\n", compatible);
+   } else {
+   if (CONFIG_IS_ENABLED(FPGA_LOAD_SECURE))
+   flags = fpga_compatible2flag(devnum, compatible);
+   if (strcmp(compatible, "u-boot,fpga-legacy"))
+   debug("Ignoring compatible = %s property\n",
+ compatible);
+   }
 
ret = fpga_load(devnum, (void *)fpga_image->load_addr,
fpga_image->size, BIT_FULL, flags);
-- 
2.36.1



[PATCH v12 07/13] fpga: add fpga_compatible2flag

2022-07-22 Thread Oleksandr Suvorov
Add a "compatible" string to binary flag converter, which uses
a callback str2flag() of given FPGA driver if available.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

Changes in v12:
- define the function only if FPGA_LOAD_SECURE enabled;

Changes in v10:
- fix mixed types of return value;

 drivers/fpga/fpga.c | 26 ++
 include/fpga.h  |  1 +
 2 files changed, 27 insertions(+)

diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index 185bd547cb5..4db5c0a91e9 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -357,3 +357,29 @@ int fpga_info(int devnum)
 
return fpga_dev_info(devnum);
 }
+
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
+int fpga_compatible2flag(int devnum, const char *compatible)
+{
+   const fpga_desc * const desc = fpga_get_desc(devnum);
+
+   if (!desc)
+   return 0;
+
+   switch (desc->devtype) {
+#if defined(CONFIG_FPGA_XILINX)
+   case fpga_xilinx:
+   {
+   xilinx_desc *xdesc = (xilinx_desc *)desc->devdesc;
+
+   if (xdesc->operations && xdesc->operations->str2flag)
+   return xdesc->operations->str2flag(xdesc, compatible);
+   }
+#endif
+   default:
+   break;
+   }
+
+   return 0;
+}
+#endif
diff --git a/include/fpga.h b/include/fpga.h
index 6365e1569e3..13b1bbee3ca 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -75,5 +75,6 @@ int fpga_dump(int devnum, const void *buf, size_t bsize);
 int fpga_info(int devnum);
 const fpga_desc *const fpga_validate(int devnum, const void *buf,
 size_t bsize, char *fn);
+int fpga_compatible2flag(int devnum, const char *compatible);
 
 #endif /* _FPGA_H_ */
-- 
2.36.1



[PATCH v12 06/13] fpga: pass compatible flags to fpga_load()

2022-07-22 Thread Oleksandr Suvorov
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v1)

 boot/image-board.c| 4 ++--
 cmd/fpga.c| 8 
 common/spl/spl_fit.c  | 6 --
 drivers/fpga/fpga.c   | 5 +++--
 drivers/fpga/xilinx.c | 2 +-
 include/fpga.h| 2 +-
 6 files changed, 15 insertions(+), 12 deletions(-)

diff --git a/boot/image-board.c b/boot/image-board.c
index cfc1c658e3a..9110617be26 100644
--- a/boot/image-board.c
+++ b/boot/image-board.c
@@ -703,14 +703,14 @@ int boot_get_fpga(int argc, char *const argv[], 
bootm_headers_t *images,
 img_len, BIT_FULL);
if (err)
err = fpga_load(devnum, (const void *)img_data,
-   img_len, BIT_FULL);
+   img_len, BIT_FULL, 0);
} else {
name = "partial";
err = fpga_loadbitstream(devnum, (char *)img_data,
 img_len, BIT_PARTIAL);
if (err)
err = fpga_load(devnum, (const void *)img_data,
-   img_len, BIT_PARTIAL);
+   img_len, BIT_PARTIAL, 0);
}
 
if (err)
diff --git a/cmd/fpga.c b/cmd/fpga.c
index 3fdd0b35e80..c4651dd403e 100644
--- a/cmd/fpga.c
+++ b/cmd/fpga.c
@@ -178,7 +178,7 @@ static int do_fpga_load(struct cmd_tbl *cmdtp, int flag, 
int argc,
if (ret)
return ret;
 
-   return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL);
+   return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL, 0);
 }
 
 static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
@@ -209,7 +209,7 @@ static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag, 
int argc,
if (ret)
return ret;
 
-   return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL);
+   return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL, 0);
 }
 #endif
 
@@ -315,7 +315,7 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, 
int argc,
data_size = image_get_data_size(hdr);
}
return fpga_load(dev, (void *)data, data_size,
- BIT_FULL);
+ BIT_FULL, 0);
}
 #endif
 #if defined(CONFIG_FIT)
@@ -355,7 +355,7 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, 
int argc,
return CMD_RET_FAILURE;
}
 
-   return fpga_load(dev, fit_data, data_size, BIT_FULL);
+   return fpga_load(dev, fit_data, data_size, BIT_FULL, 0);
}
 #endif
default:
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 1bbf824684a..3c5a91916cc 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -581,6 +581,8 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx, 
int node,
 {
const char *compatible;
int ret;
+   int devnum = 0;
+   int flags = 0;
 
debug("FPGA bitstream at: %x, size: %x\n",
  (u32)fpga_image->load_addr, fpga_image->size);
@@ -591,8 +593,8 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx, 
int node,
else if (strcmp(compatible, "u-boot,fpga-legacy"))
printf("Ignoring compatible = %s property\n", compatible);
 
-   ret = fpga_load(0, (void *)fpga_image->load_addr, fpga_image->size,
-   BIT_FULL);
+   ret = fpga_load(devnum, (void *)fpga_image->load_addr,
+   fpga_image->size, BIT_FULL, flags);
if (ret) {
printf("%s: Cannot load the image to the FPGA\n", __func__);
return ret;
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index efbac9f0c47..185bd547cb5 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -252,7 +252,8 @@ int fpga_loads(int devnum, const void *buf, size_t size,
 /*
  * Generic multiplexing code
  */
-int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype)
+int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype,
+ int flags)
 {
int ret_val = FPGA_FAIL;   /* assume failure */
const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
@@ -263,7 +264,7 @@ int fpga_load(int devnum, const void *buf, size_t bsize, 
bitstream_type bstype)
case fpga_xilinx:
 #if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_load(desc->devdesc, buf, bsize,
- 

[PATCH v12 05/13] fpga: xilinx: pass compatible flags to xilinx_load()

2022-07-22 Thread Oleksandr Suvorov
This flag is used to check whether a Xilinx FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v1)

 drivers/fpga/fpga.c   | 2 +-
 drivers/fpga/xilinx.c | 2 +-
 include/xilinx.h  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index 3b0a44b2420..efbac9f0c47 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -263,7 +263,7 @@ int fpga_load(int devnum, const void *buf, size_t bsize, 
bitstream_type bstype)
case fpga_xilinx:
 #if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_load(desc->devdesc, buf, bsize,
- bstype);
+ bstype, 0);
 #else
fpga_no_sup((char *)__func__, "Xilinx devices");
 #endif
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index 6bc1bc491fb..5dd721575ec 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -139,7 +139,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t 
size,
 }
 
 int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
-   bitstream_type bstype)
+   bitstream_type bstype, int flags)
 {
if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
printf ("%s: Invalid device descriptor\n", __FUNCTION__);
diff --git a/include/xilinx.h b/include/xilinx.h
index ff5486d98a7..0bbf14d8a1d 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -68,7 +68,7 @@ struct xilinx_fpga_op {
 /* Generic Xilinx Functions
  */
 int xilinx_load(xilinx_desc *desc, const void *image, size_t size,
-   bitstream_type bstype);
+   bitstream_type bstype, int flags);
 int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 int xilinx_info(xilinx_desc *desc);
 int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
-- 
2.36.1



[PATCH v12 04/13] fpga: zynqmp: add str2flags call

2022-07-22 Thread Oleksandr Suvorov
Add a call to convert FPGA "compatible" string to a binary flag.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v1)

 drivers/fpga/zynqmppl.c | 11 ++-
 include/xilinx.h|  3 +++
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 8ff12bf50a0..19d079c9d9f 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -304,10 +304,19 @@ static int zynqmp_pcap_info(xilinx_desc *desc)
return ret;
 }
 
+static int __maybe_unused zynqmp_str2flag(xilinx_desc *desc, const char *str)
+{
+   if (!strncmp(str, "u-boot,fpga-legacy", 18))
+   return FPGA_LEGACY;
+
+   return 0;
+}
+
 struct xilinx_fpga_op zynqmp_op = {
.load = zynqmp_load,
+   .info = zynqmp_pcap_info,
 #if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
.loads = zynqmp_loads,
+   .str2flag = zynqmp_str2flag,
 #endif
-   .info = zynqmp_pcap_info,
 };
diff --git a/include/xilinx.h b/include/xilinx.h
index d9e4b8da968..ff5486d98a7 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -60,6 +60,9 @@ struct xilinx_fpga_op {
 struct fpga_secure_info *fpga_sec_info);
int (*dump)(xilinx_desc *desc, const void *buf, size_t bsize);
int (*info)(xilinx_desc *desc);
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
+   int (*str2flag)(xilinx_desc *desc, const char *string);
+#endif
 };
 
 /* Generic Xilinx Functions
-- 
2.36.1



[PATCH v12 03/13] fpga: xilinx: add bitstream flags to driver desc

2022-07-22 Thread Oleksandr Suvorov
Store a set of supported bitstream types in xilinx_desc structure.
It will be used to determine whether an FPGA image is able to be
loaded with a given driver.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v10)

Changes in v10:
- move FPGA flags to macros;
- initialize xilinx_desc structs directly, removing *_DESC macros;
- initialize flags for mach-zynq;

 arch/arm/mach-zynq/cpu.c | 1 +
 board/xilinx/versal/board.c  | 5 -
 board/xilinx/zynqmp/zynqmp.c | 5 -
 include/versalpl.h   | 3 ---
 include/xilinx.h | 4 
 include/zynqmppl.h   | 3 +--
 6 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c
index 69b818f24b8..ac595ee0a27 100644
--- a/arch/arm/mach-zynq/cpu.c
+++ b/arch/arm/mach-zynq/cpu.c
@@ -22,6 +22,7 @@ xilinx_desc fpga = {
.family = xilinx_zynq,
.iface = devcfg,
.operations = _op,
+   .flags = FPGA_LEGACY,
 };
 #endif
 
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index 81663e0cd0e..d8f39be56c8 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -27,7 +27,10 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_FPGA_VERSALPL)
-static xilinx_desc versalpl = XILINX_VERSAL_DESC;
+static xilinx_desc versalpl = {
+   xilinx_versal, csu_dma, 1, _op, 0, _op, NULL,
+   FPGA_LEGACY
+};
 #endif
 
 int board_init(void)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 106c3953e1f..3faa3a00fc9 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -48,7 +48,10 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #if CONFIG_IS_ENABLED(FPGA) && defined(CONFIG_FPGA_ZYNQMPPL)
-static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC;
+static xilinx_desc zynqmppl = {
+   xilinx_zynqmp, csu_dma, 1, _op, 0, _op, NULL,
+   ZYNQMP_FPGA_FLAGS
+};
 #endif
 
 int __maybe_unused psu_uboot_init(void)
diff --git a/include/versalpl.h b/include/versalpl.h
index b94c82e6e66..0cc101be2f8 100644
--- a/include/versalpl.h
+++ b/include/versalpl.h
@@ -14,7 +14,4 @@
 
 extern struct xilinx_fpga_op versal_op;
 
-#define XILINX_VERSAL_DESC \
-{ xilinx_versal, csu_dma, 1, _op, 0, _op }
-
 #endif /* _VERSALPL_H_ */
diff --git a/include/xilinx.h b/include/xilinx.h
index 362943bc717..d9e4b8da968 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -37,6 +37,9 @@ typedef enum {/* typedef 
xilinx_family */
max_xilinx_type /* insert all new types before this */
 } xilinx_family;   /* end, typedef xilinx_family */
 
+/* FPGA bitstream supported types */
+#define FPGA_LEGACYBIT(0)
+
 typedef struct {   /* typedef xilinx_desc */
xilinx_family family;   /* part type */
xilinx_iface iface; /* interface type */
@@ -45,6 +48,7 @@ typedef struct {  /* typedef xilinx_desc */
int cookie; /* implementation specific cookie */
struct xilinx_fpga_op *operations; /* operations */
char *name; /* device name in bitstream */
+   int flags;  /* compatible flags */
 } xilinx_desc; /* end, typedef xilinx_desc */
 
 struct xilinx_fpga_op {
diff --git a/include/zynqmppl.h b/include/zynqmppl.h
index 35cfe17d444..8401a850afb 100644
--- a/include/zynqmppl.h
+++ b/include/zynqmppl.h
@@ -25,7 +25,6 @@
 
 extern struct xilinx_fpga_op zynqmp_op;
 
-#define XILINX_ZYNQMP_DESC \
-{ xilinx_zynqmp, csu_dma, 1, _op, 0, _op }
+#define ZYNQMP_FPGA_FLAGS  (FPGA_LEGACY)
 
 #endif /* _ZYNQMPPL_H_ */
-- 
2.36.1



[PATCH v12 02/13] fpga: xilinx: add missed identifier names

2022-07-22 Thread Oleksandr Suvorov
Function definition arguments should also have identifier names.
Add missed ones to struct xilinx_fpga_op callbacks, unifying code.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v1)

 include/xilinx.h | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/include/xilinx.h b/include/xilinx.h
index ab4537becfa..362943bc717 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -48,12 +48,14 @@ typedef struct {/* typedef xilinx_desc */
 } xilinx_desc; /* end, typedef xilinx_desc */
 
 struct xilinx_fpga_op {
-   int (*load)(xilinx_desc *, const void *, size_t, bitstream_type);
-   int (*loadfs)(xilinx_desc *, const void *, size_t, fpga_fs_info *);
+   int (*load)(xilinx_desc *desc, const void *buf, size_t bsize,
+   bitstream_type bstype);
+   int (*loadfs)(xilinx_desc *desc, const void *buf, size_t bsize,
+ fpga_fs_info *fpga_fsinfo);
int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize,
 struct fpga_secure_info *fpga_sec_info);
-   int (*dump)(xilinx_desc *, const void *, size_t);
-   int (*info)(xilinx_desc *);
+   int (*dump)(xilinx_desc *desc, const void *buf, size_t bsize);
+   int (*info)(xilinx_desc *desc);
 };
 
 /* Generic Xilinx Functions
-- 
2.36.1



[PATCH v12 01/13] fpga: add option for loading FPGA secure bitstreams

2022-07-22 Thread Oleksandr Suvorov
It allows using this feature without enabling the "fpga loads"
command.

Signed-off-by: Oleksandr Suvorov 
Co-developed-by: Adrian Fiergolski 
Signed-off-by: Adrian Fiergolski 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v1)

 cmd/Kconfig |  3 ++-
 drivers/fpga/Kconfig| 14 ++
 drivers/fpga/fpga.c |  2 +-
 drivers/fpga/xilinx.c   |  2 +-
 drivers/fpga/zynqmppl.c |  4 ++--
 5 files changed, 20 insertions(+), 5 deletions(-)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index d5f842136cf..cefeca018d2 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1036,8 +1036,9 @@ config CMD_FPGA_LOADP
  a partial bitstream.
 
 config CMD_FPGA_LOAD_SECURE
-   bool "fpga loads - loads secure bitstreams (Xilinx only)"
+   bool "fpga loads - loads secure bitstreams"
depends on CMD_FPGA
+   select FPGA_LOAD_SECURE
help
  Enables the fpga loads command which is used to load secure
  (authenticated or encrypted or both) bitstreams on to FPGA.
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 76719517f54..4561ee72dd0 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -91,4 +91,18 @@ config FPGA_ZYNQPL
  Enable FPGA driver for loading bitstream in BIT and BIN format
  on Xilinx Zynq devices.
 
+config FPGA_LOAD_SECURE
+   bool "Enable loading secure bitstreams"
+   depends on FPGA
+   help
+ Enables the fpga loads() functions that are used to load secure
+ (authenticated or encrypted or both) bitstreams on to FPGA.
+
+config SPL_FPGA_LOAD_SECURE
+   bool "Enable loading secure bitstreams for SPL"
+   depends on SPL_FPGA
+   help
+ Enables the fpga loads() functions that are used to load secure
+ (authenticated or encrypted or both) bitstreams on to FPGA.
+
 endmenu
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index fe3dfa12335..3b0a44b2420 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -220,7 +220,7 @@ int fpga_fsload(int devnum, const void *buf, size_t size,
 }
 #endif
 
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
 int fpga_loads(int devnum, const void *buf, size_t size,
   struct fpga_secure_info *fpga_sec_info)
 {
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index cbebefb55fe..6bc1bc491fb 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -172,7 +172,7 @@ int xilinx_loadfs(xilinx_desc *desc, const void *buf, 
size_t bsize,
 }
 #endif
 
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
 int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize,
 struct fpga_secure_info *fpga_sec_info)
 {
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 6b394869dbf..8ff12bf50a0 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -245,7 +245,7 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, 
size_t bsize,
return ret;
 }
 
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
 static int zynqmp_loads(xilinx_desc *desc, const void *buf, size_t bsize,
struct fpga_secure_info *fpga_sec_info)
 {
@@ -306,7 +306,7 @@ static int zynqmp_pcap_info(xilinx_desc *desc)
 
 struct xilinx_fpga_op zynqmp_op = {
.load = zynqmp_load,
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
.loads = zynqmp_loads,
 #endif
.info = zynqmp_pcap_info,
-- 
2.36.1



[PATCH v12 00/13] fpga: zynqmp: Adding support of loading authenticated images

2022-07-22 Thread Oleksandr Suvorov


This patchset introduces support for the authenticated and encrypted
FPGA images on ZynqMP boards, besides that introducing common way to
pass the compatible property to any fpga driver.

It bases on the initial work by Jorge Ramirez-Ortiz 
https://patchwork.ozlabs.org/project/uboot/patch/20211015091506.2602-1-jo...@foundries.io/
https://patchwork.ozlabs.org/project/uboot/patch/20211005111324.19749-3-jo...@foundries.io/

Changes in v12:
- define the function only if FPGA_LOAD_SECURE enabled;
- convert "compatible" to flags only if FPGA_LOAD_SECURE enabled;
- fix a commit message
- remove obsolete debug() message
- exclude all secure-related code if FPGA_LOAD_SECURE is disabled
- reduce the size of SPL if FPGA_LOAD_SECURE disabled.

Changes in v11:
- Fix treating an incoming FPGA image with empty flags parameter as
  legacy.
- add Tested-by records.

Changes in v10:
- move FPGA flags to macros;
- initialize xilinx_desc structs directly, removing *_DESC macros;
- initialize flags for mach-zynq;
- fix mixed types of return value;
- made the message about ignoring legacy compatibe option as debug;
- fix grammar
- Support DDR images only if FPGA_LOAD_SECURE enabled.
- Support ENC images only if FPGA_LOAD_SECURE enabled.

Changes in v9:
- remove an alien commit from a patchset :)

Changes in v8:
- Michal Simek's suggestions addressed:
-- introduce the compatible flags in xilinx_desc;
-- pass a binary compatible flag instead of "compatible" property to
   an FPGA driver.
- Optimize a zynqmp_load() function.

Changes in v7:
- apply Michal Simek's suggestions
  As I applied changes on Oleksandr's patches, I indicated it by
  specifying myself as co-author in the commits logs. I am not sure
  if that is the convention of marking it.

Changes in v6:
- add support for the encrypted bitfiles.

Changes in v5:
- replace ifdef with if() where it's possible.

Changes in v4:
- change interface to xilinx_desc->operations->open() callback.
- fix a bug from previous version of the patchset in dereferencing
  of a parent fpga_desc structure.

Changes in v3:
- remove the patch which introduced CMD_SPL_FPGA_LOAD_SECURE.
- fix mixing definitions/declarations.
- replace strcmp() calls with more secure strncmp().
- document the "u-boot,zynqmp-fpga-ddrauth" compatible string.
- fix code style by check-patch recommendations.

Changes in v2:
- add function fit_fpga_load() to simplify calls of fpga_load()
  from contexts without a compatible attribute.
- move all ZynqMP-specific logic to drivers/fpga/zynqmppl.c
- prepare for passing a "compatible" FDT property to any fpga driver.

Adrian Fiergolski (1):
  fpga: zynqmp: support loading encrypted bitfiles

Oleksandr Suvorov (12):
  fpga: add option for loading FPGA secure bitstreams
  fpga: xilinx: add missed identifier names
  fpga: xilinx: add bitstream flags to driver desc
  fpga: zynqmp: add str2flags call
  fpga: xilinx: pass compatible flags to xilinx_load()
  fpga: pass compatible flags to fpga_load()
  fpga: add fpga_compatible2flag
  spl: fit: pass real compatible flags to fpga_load()
  fpga: xilinx: pass compatible flags to load() callback
  fpga: zynqmp: reduce zynqmppl_load() code
  fpga: zynqmp: add bitstream compatible checking
  fpga: zynqmp: support loading authenticated images

 arch/arm/mach-zynq/cpu.c  |  1 +
 board/xilinx/versal/board.c   |  5 +-
 board/xilinx/zynqmp/zynqmp.c  |  5 +-
 boot/Kconfig  |  4 +-
 boot/image-board.c|  4 +-
 cmd/Kconfig   |  3 +-
 cmd/fpga.c|  8 +--
 common/spl/spl_fit.c  | 17 +++--
 doc/uImage.FIT/source_file_format.txt |  7 +-
 drivers/fpga/Kconfig  | 14 
 drivers/fpga/fpga.c   | 33 -
 drivers/fpga/spartan2.c   |  2 +-
 drivers/fpga/spartan3.c   |  2 +-
 drivers/fpga/versalpl.c   |  2 +-
 drivers/fpga/virtex2.c|  2 +-
 drivers/fpga/xilinx.c |  8 +--
 drivers/fpga/zynqmppl.c   | 99 ++-
 drivers/fpga/zynqpl.c |  2 +-
 include/fpga.h|  4 +-
 include/versalpl.h|  3 -
 include/xilinx.h  | 21 --
 include/zynqmppl.h|  9 ++-
 22 files changed, 199 insertions(+), 56 deletions(-)

-- 
2.36.1



Re: [PATCH v2] drivers: xen: unmap Enlighten page before jumping to Linux

2022-07-21 Thread Oleksandr



On 19.07.22 17:55, Dmytro Firsov wrote:

Hello Dmytro


First of all, thanks for fixing this issue.

Patch looks good, just a nit below.


This commit fixes issue with usage of Xen hypervisor shared info page.
Previously U-boot did not unmap it at the end of OS boot process. Xen
did not prevent guest from this. So, it worked, but caused wierd
issues - one memory page, that was returned by memalign in U-boot
for Enlighten mapping was not unmaped by Xen (shared_info values was
not removed from there) and returned to allocator. During the Linux
boot, it uses shared_info page as regular RAM page, which leads to
hypervisor shared info corruption.

So, to fix this issue, as discussed on the xen-devel mailing list, the
code should:
1) Unmap the page
2) Populate the area with memory using XENMEM_populate_physmap

This patch adds page unmapping via XENMEM_remove_from_physmap, fills
hole in address space where page was mapped via XENMEM_populate_physmap
and return this address to memory allocator for freeing.

Signed-off-by: Dmytro Firsov 
---

Changes in v2:
- Reword commit message to be more clear with purpose of the patch
- Change BUG() helper to panic() and add error messages
- Add struct zeroing during initialization
- Fix typo in comment
---
  drivers/xen/hypervisor.c | 31 +++
  1 file changed, 31 insertions(+)

diff --git a/drivers/xen/hypervisor.c b/drivers/xen/hypervisor.c
index 2560894832..16c7c96c94 100644
--- a/drivers/xen/hypervisor.c
+++ b/drivers/xen/hypervisor.c
@@ -144,6 +144,36 @@ struct shared_info *map_shared_info(void *p)
return HYPERVISOR_shared_info;
  }
  
+void unmap_shared_info(void)

+{
+   xen_pfn_t shared_info_pfn = virt_to_pfn(HYPERVISOR_shared_info);
+   struct xen_remove_from_physmap xrfp = {0};
+   struct xen_memory_reservation reservation = {0};
+   xen_ulong_t nr_exts = 1;
+
+   xrfp.domid = DOMID_SELF;
+   xrfp.gpfn = shared_info_pfn;
+   if (HYPERVISOR_memory_op(XENMEM_remove_from_physmap, ) != 0)
+   panic("Failed to unmap HYPERVISOR_shared_info\n");
+
+   /*
+* After removing from physmap there will be a hole in address space on
+* HYPERVISOR_shared_info address, so to free memory allocated with
+* memalign and prevent exceptions during access to this page we need to
+* fill this 4KB hole with XENMEM_populate_physmap before jumping to 
Linux.
+*/
+   reservation.domid = DOMID_SELF;
+   reservation.extent_order = 0;
+   reservation.address_bits = 0;


I think the explicit field's zeroing could be dropped now.


[snip]

--
Regards,

Oleksandr Tyshchenko



[PATCH] dm: fix mis-word in SPL_DM description

2022-07-13 Thread Oleksandr Suvorov
Replace logically correct word in the description.

Fixes: 91a91ff804d ("dm: Add Kconfig options for driver model SPL support")
Signed-off-by: Oleksandr Suvorov 
---

 drivers/core/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index 8eb0070d222..007dc6a1de3 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -18,7 +18,7 @@ config SPL_DM
  consider using CONFIG_SPL_SYS_MALLOC_SIMPLE. In that case you
  must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size.
  In most cases driver model will only allocate a few uclasses
- and devices in SPL, so 1KB should be enable. See
+ and devices in SPL, so 1KB should be enough. See
  CONFIG_SPL_SYS_MALLOC_F_LEN for more details on how to enable it.
 
 config TPL_DM
-- 
2.36.1



[RESEND PATCH v3 1/1] mx7ulp: add base SPL support for mx7ulp

2022-07-11 Thread Oleksandr Suvorov
From: Ricardo Salveti 

Add a base implementation of mx7ulp SPL config header and soc,
and changes in makefiles in order to allow building SPL on mx7ulp
based devices.

Signed-off-by: Ricardo Salveti 
Co-developed-by: Oleksandr Suvorov 
Signed-off-by: Oleksandr Suvorov 
---

Changes in v3:
- rebase the patch to the current codebase

 arch/arm/Makefile  |  2 +-
 arch/arm/mach-imx/Makefile |  2 +-
 arch/arm/mach-imx/mx7ulp/soc.c |  2 +-
 arch/arm/mach-imx/spl.c| 12 ---
 include/configs/imx7ulp_spl.h  | 39 ++
 5 files changed, 51 insertions(+), 6 deletions(-)
 create mode 100644 include/configs/imx7ulp_spl.h

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index a37603035d8..7c7e88df61c 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -111,7 +111,7 @@ libs-y += arch/arm/cpu/
 libs-y += arch/arm/lib/
 
 ifeq ($(CONFIG_SPL_BUILD),y)
-ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(filter $(SOC), mx25 mx5 mx6 mx7 mx35 
imx8m imx8 imx8ulp imxrt))
+ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(filter $(SOC), mx25 mx5 mx6 mx7 mx7ulp 
mx35 imx8m imx8 imx8ulp imxrt))
 libs-y += arch/arm/mach-imx/
 endif
 else
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index aa0b6447f14..bbf812776bc 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -29,7 +29,7 @@ endif
 obj-$(CONFIG_GPT_TIMER) += timer.o
 obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
 endif
-ifeq ($(SOC),$(filter $(SOC),mx7 mx6 mxs imx8m imx8 imxrt))
+ifeq ($(SOC),$(filter $(SOC),mx7 mx7ulp mx6 mxs imx8m imx8 imxrt))
 obj-y  += misc.o
 obj-$(CONFIG_CMD_PRIBLOB) += priblob.o
 obj-$(CONFIG_SPL_BUILD)+= spl.o
diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c
index 217b7c45867..951b1888c58 100644
--- a/arch/arm/mach-imx/mx7ulp/soc.c
+++ b/arch/arm/mach-imx/mx7ulp/soc.c
@@ -234,7 +234,7 @@ void s_init(void)
 }
 #endif
 
-#ifndef CONFIG_ULP_WATCHDOG
+#if !CONFIG_IS_ENABLED(ULP_WATCHDOG) || CONFIG_IS_ENABLED(SPL_BUILD)
 void reset_cpu(void)
 {
setbits_le32(SIM0_RBASE, SIM_SOPT1_A7_SW_RESET);
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 64ca2967721..a033d4f6fa1 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -111,8 +111,12 @@ u32 spl_boot_device(void)
return BOOT_DEVICE_NONE;
 }
 
-#elif defined(CONFIG_MX7) || defined(CONFIG_IMX8M) || defined(CONFIG_IMX8)
-/* Translate iMX7/i.MX8M boot device to the SPL boot device enumeration */
+#elif defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) || \
+   defined(CONFIG_IMX8M) || defined(CONFIG_IMX8)
+/*
+ * Translate iMX7/i.MX7ULP/i.MX8M/i.MX8 boot device to the SPL boot
+ * device enumeration
+ */
 u32 spl_boot_device(void)
 {
 #if defined(CONFIG_MX7)
@@ -124,7 +128,9 @@ u32 spl_boot_device(void)
 */
if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */
return BOOT_DEVICE_BOARD;
+#endif
 
+#if defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
/*
 * The above method does not detect that the boot ROM used
 * serial downloader in case the boot ROM decided to use the
@@ -182,7 +188,7 @@ u32 spl_boot_device(void)
return BOOT_DEVICE_NONE;
}
 }
-#endif /* CONFIG_MX7 || CONFIG_IMX8M || CONFIG_IMX8 */
+#endif /* CONFIG_MX7 || CONFIG_MX7ULP || CONFIG_IMX8M || CONFIG_IMX8 */
 
 #ifdef CONFIG_SPL_USB_GADGET
 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
diff --git a/include/configs/imx7ulp_spl.h b/include/configs/imx7ulp_spl.h
new file mode 100644
index 000..33b034e
--- /dev/null
+++ b/include/configs/imx7ulp_spl.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * SPL definitions for the i.MX7ULP SPL
+ *
+ * (C) Copyright 2019 Foundries.io
+ */
+
+#ifndef __IMX7ULP_SPL_CONFIG_H
+#define __IMX7ULP_SPL_CONFIG_H
+
+#if CONFIG_IS_ENABLED(SPL)
+/*
+ * see figure 35-5 in i.MX 7ULP Reference manual:
+ *  - IMX7ULP A7 OCRAM free area RAM is from 0x2F01 to 0x2F03FF00.
+ *  - Set the stack at the end of the free area section, at 0x2003FEB8.
+ *  - The BOOT ROM loads what they consider the firmware image
+ *which consists of a 4K header in front of us that contains the IVT, DCD,
+ *and some padding thus 'our' max size is really 0x2F03FF00 - 0x2F011000.
+ *187KB is more than enough for the SPL.
+ */
+#define CONFIG_SPL_STACK   0x2F03FEB8
+
+/* MMC support */
+#if CONFIG_IS_ENABLED(SPL_MMC_SUPPORT)
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MONITOR_LEN 409600  /* 400 KB */
+#endif
+
+/* Define the payload for FAT/EXT support */
+#if CONFIG_IS_ENABLED(SPL_FS_FAT) || CONFIG_IS_ENABLED(SPL_FS_EXT4)
+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME"u-boot-dtb.img"
+#endif
+
+#define CONFIG_SYS_SPL_MALLOC_START0x6830
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x10/* 1 MB */
+
+#endif /* CONFIG_SPL */
+
+#endif /* __

[RESEND PATCH v3 0/1] Support SPL for i.MX7ULP

2022-07-11 Thread Oleksandr Suvorov


I've just realized this only patch was not applied among other
patches of the original patchset "Support SPL for i.MX7ULP".

Please apply this patch as now "include/configs/mx7ulp_com.h"
refers to non-existent "include/configs/imx7ulp_spl.h".

Changes in v3:
- rebase the patch to the current codebase

Ricardo Salveti (1):
  mx7ulp: add base SPL support for mx7ulp

 arch/arm/Makefile  |  2 +-
 arch/arm/mach-imx/Makefile |  2 +-
 arch/arm/mach-imx/mx7ulp/soc.c |  2 +-
 arch/arm/mach-imx/spl.c| 12 ---
 include/configs/imx7ulp_spl.h  | 39 ++
 5 files changed, 51 insertions(+), 6 deletions(-)
 create mode 100644 include/configs/imx7ulp_spl.h

-- 
2.36.1



Re: [PATCH v11 10/13] fpga: zynqmp: optimize zynqmppl_load() code

2022-07-08 Thread Oleksandr Suvorov
Hi Michal,

On Fri, Jul 8, 2022 at 3:43 PM Michal Simek  wrote:
>
>
>
> On 7/5/22 21:23, Oleksandr Suvorov wrote:
> > Optimize function code preparing to add secure bitstream types
> > support.
>
> Can you please extend this? I understand what you do below but better
> description will be good.

Ok, if I'll realize how to do this :)

> >
> > Signed-off-by: Oleksandr Suvorov 
> > Tested-by: Ricardo Salveti 
> > Tested-by: Adrian Fiergolski 
> > ---
> >
> > (no changes since v1)
> >
> >   drivers/fpga/zynqmppl.c | 27 +--
> >   1 file changed, 13 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
> > index 239c498f7b5..6959b8ae97e 100644
> > --- a/drivers/fpga/zynqmppl.c
> > +++ b/drivers/fpga/zynqmppl.c
> > @@ -199,46 +199,45 @@ static int zynqmp_validate_bitstream(xilinx_desc 
> > *desc, const void *buf,
> >   return 0;
> >   }
> >
> > -static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
> > -  bitstream_type bstype, int flags)
> > +static int zynqmp_load(xilinx_desc *desc, const void *buf,
> > +size_t bsize, bitstream_type bstype,
> > +int flags)
>
> This is unrelated to commit. This is purely coding style change.

Ok, I'll separate to another commit.

> >   {
> >   ALLOC_CACHE_ALIGN_BUFFER(u32, bsizeptr, 1);
> >   u32 swap = 0;
> >   ulong bin_buf;
> >   int ret;
> >   u32 buf_lo, buf_hi;
> > + u32 bsize_req = (u32)bsize;
> >   u32 ret_payload[PAYLOAD_ARG_CNT];
> > - bool xilfpga_old = false;
> > +
> > + debug("%s called!\n", __func__);
> >
> >   if (zynqmp_firmware_version() <= PMUFW_V1_0) {
> >   puts("WARN: PMUFW v1.0 or less is detected\n");
> >   puts("WARN: Not all bitstream formats are supported\n");
> >   puts("WARN: Please upgrade PMUFW\n");
> > - xilfpga_old = true;
> > - if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, ))
> > + if (zynqmp_validate_bitstream(desc, buf, bsize,
> > +   bsize, ))
>
> This is also coding style change only.

Ok.

> >   return FPGA_FAIL;
> >   bsizeptr = (u32 *)
> >   flush_dcache_range((ulong)bsizeptr,
> >  (ulong)bsizeptr + sizeof(size_t));
> > + bsize_req = (u32)(uintptr_t)bsizeptr;
> >   bstype |= BIT(ZYNQMP_FPGA_BIT_NS);
> > + } else {
> > + bstype = 0;
> >   }
> >
> >   bin_buf = zynqmp_align_dma_buffer((u32 *)buf, bsize, swap);
> >
> > - debug("%s called!\n", __func__);
>
> nit: And this also has nothing to do with optimization. You just changed 
> location.

Michal, what is this closer to? Refactor?
It's not only about changing location. Now there is only one call of
xilinx_pm_request().

> >   flush_dcache_range(bin_buf, bin_buf + bsize);
> >
> >   buf_lo = (u32)bin_buf;
> >   buf_hi = upper_32_bits(bin_buf);
> >
> > - if (xilfpga_old)
> > - ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo,
> > - buf_hi, (u32)(uintptr_t)bsizeptr,
> > - bstype, ret_payload);
> > - else
> > - ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo,
> > - buf_hi, (u32)bsize, 0, ret_payload);
> > -
> > + ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo, buf_hi,
> > + bsize_req, bstype, ret_payload);
> >   if (ret)
> >   printf("PL FPGA LOAD failed with err: 0x%08x\n", ret);
> >
>
> M



-- 
Best regards
Oleksandr

Oleksandr Suvorov
cryo...@gmail.com


[PATCH v11 13/13] fpga: zynqmp: support loading encrypted bitfiles

2022-07-05 Thread Oleksandr Suvorov
From: Adrian Fiergolski 

Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to
handle loading encrypted bitfiles.

This feature requires encrypted FSBL, as according to UG1085:
"The CSU automatically locks out the AES key, stored in either BBRAM
 or eFUSEs, as a key source to the AES engine if the FSBL is not
 encrypted. This prevents using the BBRAM or eFUSE as the key source
 to the AES engine during run-time applications."

Signed-off-by: Adrian Fiergolski 
Co-developed-by: Oleksandr Suvorov 
Signed-off-by: Oleksandr Suvorov 
Tested-by: Adrian Fiergolski 
---

Changes in v11:
- add Tested-by records.

Changes in v10:
- Support ENC images only if FPGA_LOAD_SECURE enabled.

Changes in v9:
- remove an alien commit from a patchset :)

Changes in v8:
- Michal Simek's suggestions addressed:
-- introduce the compatible flags in xilinx_desc;
-- pass a binary compatible flag instead of "compatible" property to
   an FPGA driver.
- Optimize a zynqmp_load() function.

Changes in v7:
- apply Michal Simek's suggestions
  As I applied changes on Oleksandr's patches, I indicated it by
  specifying myself as co-author in the commits logs. I am not sure
  if that is the convention of marking it.

Changes in v6:
- add support for the encrypted bitfiles.

Changes in v5:
- replace ifdef with if() where it's possible.

Changes in v4:
- change interface to xilinx_desc->operations->open() callback.
- fix a bug from previous version of the patchset in dereferencing
  of a parent fpga_desc structure.

Changes in v3:
- remove the patch which introduced CMD_SPL_FPGA_LOAD_SECURE.
- fix mixing definitions/declarations.
- replace strcmp() calls with more secure strncmp().
- document the "u-boot,zynqmp-fpga-ddrauth" compatible string.
- fix code style by check-patch recommendations.

Changes in v2:
- add function fit_fpga_load() to simplify calls of fpga_load()
  from contexts without a compatible attribute.
- move all ZynqMP-specific logic to drivers/fpga/zynqmppl.c
- prepare for passing a "compatible" FDT property to any fpga driver.

 doc/uImage.FIT/source_file_format.txt | 2 ++
 drivers/fpga/zynqmppl.c   | 8 
 include/fpga.h| 1 +
 include/xilinx.h  | 1 +
 include/zynqmppl.h| 4 +++-
 5 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/doc/uImage.FIT/source_file_format.txt 
b/doc/uImage.FIT/source_file_format.txt
index 461e2af2a84..68701118409 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -188,6 +188,8 @@ the '/images' node should have the following layout:
 "u-boot,fpga-legacy" - the generic fpga loading routine.
 "u-boot,zynqmp-fpga-ddrauth" - signed non-encrypted FPGA bitstream for
 Xilinx Zynq UltraScale+ (ZymqMP) device.
+"u-boot,zynqmp-fpga-enc" - encrypted FPGA bitstream for Xilinx Zynq
+UltraScale+ (ZynqMP) device.
 
   Optional nodes:
   - hash-1 : Each hash sub-node represents separate hash or checksum
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index d8f11c26103..dafad032ca6 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -260,6 +260,11 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf,
info.authflag = ZYNQMP_FPGA_AUTH_DDR;
info.encflag = FPGA_NO_ENC_OR_NO_AUTH;
return desc->operations->loads(desc, buf, bsize, );
+   case FPGA_XILINX_ZYNQMP_ENC:
+   /* Encryption using device key */
+   info.authflag = FPGA_NO_ENC_OR_NO_AUTH;
+   info.encflag = FPGA_ENC_DEV_KEY;
+   return desc->operations->loads(desc, buf, bsize, );
 #endif
default:
printf("Unsupported bitstream type %d\n", flags);
@@ -363,6 +368,9 @@ static int zynqmp_str2flag(xilinx_desc *desc, const char 
*str)
 #if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
if (!strncmp(str, "u-boot,zynqmp-fpga-ddrauth", 26))
return FPGA_XILINX_ZYNQMP_DDRAUTH;
+
+   if (!strncmp(str, "u-boot,zynqmp-fpga-enc", 22))
+   return FPGA_XILINX_ZYNQMP_ENC;
 #endif
return 0;
 }
diff --git a/include/fpga.h b/include/fpga.h
index 13b1bbee3ca..a4e16401da7 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -20,6 +20,7 @@
 /* device numbers must be non-negative */
 #define FPGA_INVALID_DEVICE-1
 
+#define FPGA_ENC_DEV_KEY   0
 #define FPGA_ENC_USR_KEY   1
 #define FPGA_NO_ENC_OR_NO_AUTH 2
 
diff --git a/include/xilinx.h b/include/xilinx.h
index ffd95ad7225..a62f6fd074f 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -40,6 +40,7 @@ typedef enum {/* typedef 
xilinx_family */
 /* FPGA bitstream supported types */
 #define FPGA_LEGACYBIT(0)
 #define FPGA_XILINX_ZYNQMP_DDRAUTH BIT(1)
+#define FPGA_XILINX_ZYNQMP_ENC

[PATCH v11 12/13] fpga: zynqmp: support loading authenticated images

2022-07-05 Thread Oleksandr Suvorov
Add supporting new compatible string "u-boot,zynqmp-fpga-ddrauth" to
handle loading authenticated images (DDR).

Based on solution by Jorge Ramirez-Ortiz 
Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
---

Changes in v11:
- Fix treating an incoming FPGA image with empty flags parameter as
  legacy.

Changes in v10:
- Support DDR images only if FPGA_LOAD_SECURE enabled.

 boot/Kconfig  |  4 +--
 doc/uImage.FIT/source_file_format.txt |  5 +++-
 drivers/fpga/zynqmppl.c   | 43 ++-
 include/xilinx.h  |  1 +
 include/zynqmppl.h|  4 +++
 5 files changed, 47 insertions(+), 10 deletions(-)

diff --git a/boot/Kconfig b/boot/Kconfig
index 08451c65a56..e30643d3071 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -210,8 +210,8 @@ config SPL_LOAD_FIT
  1. "loadables" images, other than FDTs, which do not have a "load"
 property will not be loaded. This limitation also applies to FPGA
 images with the correct "compatible" string.
- 2. For FPGA images, only the "compatible" = "u-boot,fpga-legacy"
-loading method is supported.
+ 2. For FPGA images, the supported "compatible" list is in the
+doc/uImage.FIT/source_file_format.txt.
  3. FDTs are only loaded for images with an "os" property of "u-boot".
 "linux" images are also supported with Falcon boot mode.
 
diff --git a/doc/uImage.FIT/source_file_format.txt 
b/doc/uImage.FIT/source_file_format.txt
index f93ac6d1c7b..461e2af2a84 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -184,7 +184,10 @@ the '/images' node should have the following layout:
 Mandatory for types: "firmware", and "kernel".
   - compatible : compatible method for loading image.
 Mandatory for types: "fpga", and images that do not specify a load address.
-To use the generic fpga loading routine, use "u-boot,fpga-legacy".
+Supported compatible methods:
+"u-boot,fpga-legacy" - the generic fpga loading routine.
+"u-boot,zynqmp-fpga-ddrauth" - signed non-encrypted FPGA bitstream for
+Xilinx Zynq UltraScale+ (ZymqMP) device.
 
   Optional nodes:
   - hash-1 : Each hash sub-node represents separate hash or checksum
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 5e74360220e..d8f11c26103 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -201,9 +202,12 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, 
const void *buf,
 
 static int zynqmp_check_compatible(xilinx_desc *desc, int flags)
 {
-   /* If no flags set, the image is legacy */
+   /*
+* If no flags set, the image may be legacy, but we need to
+* signal caller this situation with specific error code.
+*/
if (!flags)
-   return 0;
+   return -ENODATA;
 
/* For legacy bitstream images no need for other methods exist */
if ((flags & desc->flags) && flags == FPGA_LEGACY)
@@ -218,7 +222,7 @@ static int zynqmp_check_compatible(xilinx_desc *desc, int 
flags)
(flags & desc->flags))
return 0;
 
-   return FPGA_FAIL;
+   return -ENODEV;
 }
 
 static int zynqmp_load(xilinx_desc *desc, const void *buf,
@@ -232,11 +236,33 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf,
u32 buf_lo, buf_hi;
u32 bsize_req = (u32)bsize;
u32 ret_payload[PAYLOAD_ARG_CNT];
-
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
+   struct fpga_secure_info info = { 0 };
+#endif
debug("%s called!\n", __func__);
 
-   if (zynqmp_check_compatible(desc, flags)) {
-   puts("Missing loads operation or unsupported bitstream type\n");
+   ret = zynqmp_check_compatible(desc, flags);
+   if (ret) {
+   if (ret != -ENODATA) {
+   puts("Missing loads operation or unsupported bitstream 
type\n");
+   return FPGA_FAIL;
+   }
+   /* If flags is not set, the image treats as legacy */
+   flags = FPGA_LEGACY;
+   }
+
+   switch (flags) {
+   case FPGA_LEGACY:
+   break;  /* Handle the legacy image later in this function */
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
+   case FPGA_XILINX_ZYNQMP_DDRAUTH:
+   /* DDR authentication */
+   info.authflag = ZYNQMP_FPGA_AUTH_DDR;
+   info.encflag = FPGA_NO_ENC_OR_NO_AUTH;
+   return desc->operations->loads(desc, buf, bsize, );
+#endif
+   default:
+   printf("Uns

[PATCH v11 11/13] fpga: zynqmp: add bitstream compatible checking

2022-07-05 Thread Oleksandr Suvorov
Check whether the FPGA ZynqMP driver supports the given bitstream
image type.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v10)

Changes in v10:
- fix grammar;

 drivers/fpga/zynqmppl.c | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 6959b8ae97e..5e74360220e 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -199,6 +199,28 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, 
const void *buf,
return 0;
 }
 
+static int zynqmp_check_compatible(xilinx_desc *desc, int flags)
+{
+   /* If no flags set, the image is legacy */
+   if (!flags)
+   return 0;
+
+   /* For legacy bitstream images no need for other methods exist */
+   if ((flags & desc->flags) && flags == FPGA_LEGACY)
+   return 0;
+
+   /*
+* Other images are handled in secure callback loads(). Check
+* callback existence besides image type support.
+*/
+   if (CONFIG_IS_ENABLED(FPGA_LOAD_SECURE) &&
+   desc->operations->loads &&
+   (flags & desc->flags))
+   return 0;
+
+   return FPGA_FAIL;
+}
+
 static int zynqmp_load(xilinx_desc *desc, const void *buf,
   size_t bsize, bitstream_type bstype,
   int flags)
@@ -213,6 +235,11 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf,
 
debug("%s called!\n", __func__);
 
+   if (zynqmp_check_compatible(desc, flags)) {
+   puts("Missing loads operation or unsupported bitstream type\n");
+   return FPGA_FAIL;
+   }
+
if (zynqmp_firmware_version() <= PMUFW_V1_0) {
puts("WARN: PMUFW v1.0 or less is detected\n");
puts("WARN: Not all bitstream formats are supported\n");
-- 
2.36.1



[PATCH v11 10/13] fpga: zynqmp: optimize zynqmppl_load() code

2022-07-05 Thread Oleksandr Suvorov
Optimize function code preparing to add secure bitstream types
support.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v1)

 drivers/fpga/zynqmppl.c | 27 +--
 1 file changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 239c498f7b5..6959b8ae97e 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -199,46 +199,45 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, 
const void *buf,
return 0;
 }
 
-static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
-bitstream_type bstype, int flags)
+static int zynqmp_load(xilinx_desc *desc, const void *buf,
+  size_t bsize, bitstream_type bstype,
+  int flags)
 {
ALLOC_CACHE_ALIGN_BUFFER(u32, bsizeptr, 1);
u32 swap = 0;
ulong bin_buf;
int ret;
u32 buf_lo, buf_hi;
+   u32 bsize_req = (u32)bsize;
u32 ret_payload[PAYLOAD_ARG_CNT];
-   bool xilfpga_old = false;
+
+   debug("%s called!\n", __func__);
 
if (zynqmp_firmware_version() <= PMUFW_V1_0) {
puts("WARN: PMUFW v1.0 or less is detected\n");
puts("WARN: Not all bitstream formats are supported\n");
puts("WARN: Please upgrade PMUFW\n");
-   xilfpga_old = true;
-   if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, ))
+   if (zynqmp_validate_bitstream(desc, buf, bsize,
+ bsize, ))
return FPGA_FAIL;
bsizeptr = (u32 *)
flush_dcache_range((ulong)bsizeptr,
   (ulong)bsizeptr + sizeof(size_t));
+   bsize_req = (u32)(uintptr_t)bsizeptr;
bstype |= BIT(ZYNQMP_FPGA_BIT_NS);
+   } else {
+   bstype = 0;
}
 
bin_buf = zynqmp_align_dma_buffer((u32 *)buf, bsize, swap);
 
-   debug("%s called!\n", __func__);
flush_dcache_range(bin_buf, bin_buf + bsize);
 
buf_lo = (u32)bin_buf;
buf_hi = upper_32_bits(bin_buf);
 
-   if (xilfpga_old)
-   ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo,
-   buf_hi, (u32)(uintptr_t)bsizeptr,
-   bstype, ret_payload);
-   else
-   ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo,
-   buf_hi, (u32)bsize, 0, ret_payload);
-
+   ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo, buf_hi,
+   bsize_req, bstype, ret_payload);
if (ret)
printf("PL FPGA LOAD failed with err: 0x%08x\n", ret);
 
-- 
2.36.1



[PATCH v11 09/13] fpga: xilinx: pass compatible flags to load() callback

2022-07-05 Thread Oleksandr Suvorov
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v1)

 drivers/fpga/spartan2.c | 2 +-
 drivers/fpga/spartan3.c | 2 +-
 drivers/fpga/versalpl.c | 2 +-
 drivers/fpga/virtex2.c  | 2 +-
 drivers/fpga/xilinx.c   | 2 +-
 drivers/fpga/zynqmppl.c | 2 +-
 drivers/fpga/zynqpl.c   | 2 +-
 include/xilinx.h| 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index 3435400e58b..328740f3f35 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -41,7 +41,7 @@ static int spartan2_ss_dump(xilinx_desc *desc, const void 
*buf, size_t bsize);
 /* - */
 /* Spartan-II Generic Implementation */
 static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize,
-bitstream_type bstype)
+bitstream_type bstype, int flags)
 {
int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index 4850c99352d..918f6db5065 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -45,7 +45,7 @@ static int spartan3_ss_dump(xilinx_desc *desc, const void 
*buf, size_t bsize);
 /* - */
 /* Spartan-II Generic Implementation */
 static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize,
-bitstream_type bstype)
+bitstream_type bstype, int flags)
 {
int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c
index c44a7d34557..d3876a8f541 100644
--- a/drivers/fpga/versalpl.c
+++ b/drivers/fpga/versalpl.c
@@ -27,7 +27,7 @@ static ulong versal_align_dma_buffer(ulong *buf, u32 len)
 }
 
 static int versal_load(xilinx_desc *desc, const void *buf, size_t bsize,
-  bitstream_type bstype)
+  bitstream_type bstype, int flags)
 {
ulong bin_buf;
int ret;
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index b3e0537bab0..83b90298cad 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -94,7 +94,7 @@ static int virtex2_ss_load(xilinx_desc *desc, const void 
*buf, size_t bsize);
 static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 
 static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize,
-   bitstream_type bstype)
+   bitstream_type bstype, int flags)
 {
int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index d9951ca3ecf..8170c3368ef 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -151,7 +151,7 @@ int xilinx_load(xilinx_desc *desc, const void *buf, size_t 
bsize,
return FPGA_FAIL;
}
 
-   return desc->operations->load(desc, buf, bsize, bstype);
+   return desc->operations->load(desc, buf, bsize, bstype, flags);
 }
 
 #if defined(CONFIG_CMD_FPGA_LOADFS)
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 0ffcff0c148..239c498f7b5 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -200,7 +200,7 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, 
const void *buf,
 }
 
 static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
-bitstream_type bstype)
+bitstream_type bstype, int flags)
 {
ALLOC_CACHE_ALIGN_BUFFER(u32, bsizeptr, 1);
u32 swap = 0;
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index 2de40109a81..d8ebd542abd 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -371,7 +371,7 @@ static int zynq_validate_bitstream(xilinx_desc *desc, const 
void *buf,
 }
 
 static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize,
-bitstream_type bstype)
+bitstream_type bstype, int flags)
 {
unsigned long ts; /* Timestamp */
u32 isr_status, swap;
diff --git a/include/xilinx.h b/include/xilinx.h
index a9e68138169..89a12818311 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -53,7 +53,7 @@ typedef struct {  /* typedef xilinx_desc */
 
 struct xilinx_fpga_op {
int (*load)(xilinx_desc *desc, const void *buf, size_t bsize,
-   bitstream_type bstype);
+   bitstream_type bstype, int flags);
int (*loadfs)(xilinx_desc *desc, const void *buf, size_t bsize,
  fpga_fs_info *fpga_fsinfo);
int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize,
-- 
2.36.1



[PATCH v11 08/13] spl: fit: pass real compatible flags to fpga_load()

2022-07-05 Thread Oleksandr Suvorov
Convert taken FPGA image "compatible" string to a binary compatible
flag and pass it to an FPGA driver.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v10)

Changes in v10:
- made the message about ignoring legacy compatibe option as debug

 common/spl/spl_fit.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 3c5a91916cc..1bf953b44a4 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -588,10 +588,14 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx, 
int node,
  (u32)fpga_image->load_addr, fpga_image->size);
 
compatible = fdt_getprop(ctx->fit, node, "compatible", NULL);
-   if (!compatible)
+   if (!compatible) {
warn_deprecated("'fpga' image without 'compatible' property");
-   else if (strcmp(compatible, "u-boot,fpga-legacy"))
-   printf("Ignoring compatible = %s property\n", compatible);
+   } else {
+   flags = fpga_compatible2flag(devnum, compatible);
+   if (strcmp(compatible, "u-boot,fpga-legacy"))
+   debug("Ignoring compatible = %s property\n",
+ compatible);
+   }
 
ret = fpga_load(devnum, (void *)fpga_image->load_addr,
fpga_image->size, BIT_FULL, flags);
-- 
2.36.1



[PATCH v11 07/13] fpga: pass compatible flags to fpga_load()

2022-07-05 Thread Oleksandr Suvorov
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v1)

 boot/image-board.c| 4 ++--
 cmd/fpga.c| 8 
 common/spl/spl_fit.c  | 6 --
 drivers/fpga/fpga.c   | 5 +++--
 drivers/fpga/xilinx.c | 2 +-
 include/fpga.h| 2 +-
 6 files changed, 15 insertions(+), 12 deletions(-)

diff --git a/boot/image-board.c b/boot/image-board.c
index 0d2e0fc9692..fbd95e4a77c 100644
--- a/boot/image-board.c
+++ b/boot/image-board.c
@@ -707,14 +707,14 @@ int boot_get_fpga(int argc, char *const argv[], 
bootm_headers_t *images,
 img_len, BIT_FULL);
if (err)
err = fpga_load(devnum, (const void *)img_data,
-   img_len, BIT_FULL);
+   img_len, BIT_FULL, 0);
} else {
name = "partial";
err = fpga_loadbitstream(devnum, (char *)img_data,
 img_len, BIT_PARTIAL);
if (err)
err = fpga_load(devnum, (const void *)img_data,
-   img_len, BIT_PARTIAL);
+   img_len, BIT_PARTIAL, 0);
}
 
if (err)
diff --git a/cmd/fpga.c b/cmd/fpga.c
index 3fdd0b35e80..c4651dd403e 100644
--- a/cmd/fpga.c
+++ b/cmd/fpga.c
@@ -178,7 +178,7 @@ static int do_fpga_load(struct cmd_tbl *cmdtp, int flag, 
int argc,
if (ret)
return ret;
 
-   return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL);
+   return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL, 0);
 }
 
 static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
@@ -209,7 +209,7 @@ static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag, 
int argc,
if (ret)
return ret;
 
-   return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL);
+   return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL, 0);
 }
 #endif
 
@@ -315,7 +315,7 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, 
int argc,
data_size = image_get_data_size(hdr);
}
return fpga_load(dev, (void *)data, data_size,
- BIT_FULL);
+ BIT_FULL, 0);
}
 #endif
 #if defined(CONFIG_FIT)
@@ -355,7 +355,7 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, 
int argc,
return CMD_RET_FAILURE;
}
 
-   return fpga_load(dev, fit_data, data_size, BIT_FULL);
+   return fpga_load(dev, fit_data, data_size, BIT_FULL, 0);
}
 #endif
default:
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 1bbf824684a..3c5a91916cc 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -581,6 +581,8 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx, 
int node,
 {
const char *compatible;
int ret;
+   int devnum = 0;
+   int flags = 0;
 
debug("FPGA bitstream at: %x, size: %x\n",
  (u32)fpga_image->load_addr, fpga_image->size);
@@ -591,8 +593,8 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx, 
int node,
else if (strcmp(compatible, "u-boot,fpga-legacy"))
printf("Ignoring compatible = %s property\n", compatible);
 
-   ret = fpga_load(0, (void *)fpga_image->load_addr, fpga_image->size,
-   BIT_FULL);
+   ret = fpga_load(devnum, (void *)fpga_image->load_addr,
+   fpga_image->size, BIT_FULL, flags);
if (ret) {
printf("%s: Cannot load the image to the FPGA\n", __func__);
return ret;
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index a0d39912a05..dc4aeed8689 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -252,7 +252,8 @@ int fpga_loads(int devnum, const void *buf, size_t size,
 /*
  * Generic multiplexing code
  */
-int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype)
+int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype,
+ int flags)
 {
int ret_val = FPGA_FAIL;   /* assume failure */
const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
@@ -263,7 +264,7 @@ int fpga_load(int devnum, const void *buf, size_t bsize, 
bitstream_type bstype)
case fpga_xilinx:
 #if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_load(desc->devdesc, buf, bsize,
- 

[PATCH v11 06/13] fpga: xilinx: pass compatible flags to xilinx_load()

2022-07-05 Thread Oleksandr Suvorov
This flag is used to check whether a Xilinx FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v1)

 drivers/fpga/fpga.c   | 2 +-
 drivers/fpga/xilinx.c | 2 +-
 include/xilinx.h  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index a63bff1df94..a0d39912a05 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -263,7 +263,7 @@ int fpga_load(int devnum, const void *buf, size_t bsize, 
bitstream_type bstype)
case fpga_xilinx:
 #if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_load(desc->devdesc, buf, bsize,
- bstype);
+ bstype, 0);
 #else
fpga_no_sup((char *)__func__, "Xilinx devices");
 #endif
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index 6bc1bc491fb..5dd721575ec 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -139,7 +139,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t 
size,
 }
 
 int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
-   bitstream_type bstype)
+   bitstream_type bstype, int flags)
 {
if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
printf ("%s: Invalid device descriptor\n", __FUNCTION__);
diff --git a/include/xilinx.h b/include/xilinx.h
index 91179abe31f..a9e68138169 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -66,7 +66,7 @@ struct xilinx_fpga_op {
 /* Generic Xilinx Functions
  */
 int xilinx_load(xilinx_desc *desc, const void *image, size_t size,
-   bitstream_type bstype);
+   bitstream_type bstype, int flags);
 int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 int xilinx_info(xilinx_desc *desc);
 int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
-- 
2.36.1



[PATCH v11 05/13] fpga: add fpga_compatible2flag

2022-07-05 Thread Oleksandr Suvorov
Add a "compatible" string to binary flag converter, which uses
a callback str2flag() of given FPGA driver if available.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v10)

Changes in v10:
- fix mixed types of return value;

 drivers/fpga/fpga.c | 24 
 include/fpga.h  |  1 +
 2 files changed, 25 insertions(+)

diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index 3b0a44b2420..a63bff1df94 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -356,3 +356,27 @@ int fpga_info(int devnum)
 
return fpga_dev_info(devnum);
 }
+
+int fpga_compatible2flag(int devnum, const char *compatible)
+{
+   const fpga_desc * const desc = fpga_get_desc(devnum);
+
+   if (!desc)
+   return 0;
+
+   switch (desc->devtype) {
+#if defined(CONFIG_FPGA_XILINX)
+   case fpga_xilinx:
+   {
+   xilinx_desc *xdesc = (xilinx_desc *)desc->devdesc;
+
+   if (xdesc->operations && xdesc->operations->str2flag)
+   return xdesc->operations->str2flag(xdesc, compatible);
+   }
+#endif
+   default:
+   break;
+   }
+
+   return 0;
+}
diff --git a/include/fpga.h b/include/fpga.h
index ec5144334df..2172b0d015e 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -75,5 +75,6 @@ int fpga_dump(int devnum, const void *buf, size_t bsize);
 int fpga_info(int devnum);
 const fpga_desc *const fpga_validate(int devnum, const void *buf,
 size_t bsize, char *fn);
+int fpga_compatible2flag(int devnum, const char *compatible);
 
 #endif /* _FPGA_H_ */
-- 
2.36.1



[PATCH v11 04/13] fpga: zynqmp: add str2flags call

2022-07-05 Thread Oleksandr Suvorov
Add a call to convert FPGA "compatible" string to a binary flag.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v1)

 drivers/fpga/zynqmppl.c | 9 +
 include/xilinx.h| 1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 8ff12bf50a0..0ffcff0c148 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -304,10 +304,19 @@ static int zynqmp_pcap_info(xilinx_desc *desc)
return ret;
 }
 
+static int zynqmp_str2flag(xilinx_desc *desc, const char *str)
+{
+   if (!strncmp(str, "u-boot,fpga-legacy", 18))
+   return FPGA_LEGACY;
+
+   return 0;
+}
+
 struct xilinx_fpga_op zynqmp_op = {
.load = zynqmp_load,
 #if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
.loads = zynqmp_loads,
 #endif
.info = zynqmp_pcap_info,
+   .str2flag = zynqmp_str2flag,
 };
diff --git a/include/xilinx.h b/include/xilinx.h
index d9e4b8da968..91179abe31f 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -60,6 +60,7 @@ struct xilinx_fpga_op {
 struct fpga_secure_info *fpga_sec_info);
int (*dump)(xilinx_desc *desc, const void *buf, size_t bsize);
int (*info)(xilinx_desc *desc);
+   int (*str2flag)(xilinx_desc *desc, const char *string);
 };
 
 /* Generic Xilinx Functions
-- 
2.36.1



[PATCH v11 03/13] fpga: xilinx: add bitstream flags to driver desc

2022-07-05 Thread Oleksandr Suvorov
Store a set of supported bitstream types in xilinx_desc structure.
It will be used to determine whether an FPGA image is able to be
loaded with a given driver.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v10)

Changes in v10:
- move FPGA flags to macros;
- initialize xilinx_desc structs directly, removing *_DESC macros;
- initialize flags for mach-zynq;

 arch/arm/mach-zynq/cpu.c | 1 +
 board/xilinx/versal/board.c  | 5 -
 board/xilinx/zynqmp/zynqmp.c | 5 -
 include/versalpl.h   | 3 ---
 include/xilinx.h | 4 
 include/zynqmppl.h   | 3 +--
 6 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c
index 69b818f24b8..ac595ee0a27 100644
--- a/arch/arm/mach-zynq/cpu.c
+++ b/arch/arm/mach-zynq/cpu.c
@@ -22,6 +22,7 @@ xilinx_desc fpga = {
.family = xilinx_zynq,
.iface = devcfg,
.operations = _op,
+   .flags = FPGA_LEGACY,
 };
 #endif
 
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index a88f5bb177e..1813077631f 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -27,7 +27,10 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_FPGA_VERSALPL)
-static xilinx_desc versalpl = XILINX_VERSAL_DESC;
+static xilinx_desc versalpl = {
+   xilinx_versal, csu_dma, 1, _op, 0, _op, NULL,
+   FPGA_LEGACY
+};
 #endif
 
 int board_init(void)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index e311aa772cc..0dbcaf7be6f 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -55,7 +55,10 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #if CONFIG_IS_ENABLED(FPGA) && defined(CONFIG_FPGA_ZYNQMPPL)
-static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC;
+static xilinx_desc zynqmppl = {
+   xilinx_zynqmp, csu_dma, 1, _op, 0, _op, NULL,
+   ZYNQMP_FPGA_FLAGS
+};
 
 enum {
ZYNQMP_VARIANT_EG = BIT(0U),
diff --git a/include/versalpl.h b/include/versalpl.h
index b94c82e6e66..0cc101be2f8 100644
--- a/include/versalpl.h
+++ b/include/versalpl.h
@@ -14,7 +14,4 @@
 
 extern struct xilinx_fpga_op versal_op;
 
-#define XILINX_VERSAL_DESC \
-{ xilinx_versal, csu_dma, 1, _op, 0, _op }
-
 #endif /* _VERSALPL_H_ */
diff --git a/include/xilinx.h b/include/xilinx.h
index 362943bc717..d9e4b8da968 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -37,6 +37,9 @@ typedef enum {/* typedef 
xilinx_family */
max_xilinx_type /* insert all new types before this */
 } xilinx_family;   /* end, typedef xilinx_family */
 
+/* FPGA bitstream supported types */
+#define FPGA_LEGACYBIT(0)
+
 typedef struct {   /* typedef xilinx_desc */
xilinx_family family;   /* part type */
xilinx_iface iface; /* interface type */
@@ -45,6 +48,7 @@ typedef struct {  /* typedef xilinx_desc */
int cookie; /* implementation specific cookie */
struct xilinx_fpga_op *operations; /* operations */
char *name; /* device name in bitstream */
+   int flags;  /* compatible flags */
 } xilinx_desc; /* end, typedef xilinx_desc */
 
 struct xilinx_fpga_op {
diff --git a/include/zynqmppl.h b/include/zynqmppl.h
index 35cfe17d444..8401a850afb 100644
--- a/include/zynqmppl.h
+++ b/include/zynqmppl.h
@@ -25,7 +25,6 @@
 
 extern struct xilinx_fpga_op zynqmp_op;
 
-#define XILINX_ZYNQMP_DESC \
-{ xilinx_zynqmp, csu_dma, 1, _op, 0, _op }
+#define ZYNQMP_FPGA_FLAGS  (FPGA_LEGACY)
 
 #endif /* _ZYNQMPPL_H_ */
-- 
2.36.1



[PATCH v11 02/13] fpga: xilinx: add missed identifier names

2022-07-05 Thread Oleksandr Suvorov
Function definition arguments should also have identifier names.
Add missed ones to struct xilinx_fpga_op callbacks, unifying code.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v1)

 include/xilinx.h | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/include/xilinx.h b/include/xilinx.h
index ab4537becfa..362943bc717 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -48,12 +48,14 @@ typedef struct {/* typedef xilinx_desc */
 } xilinx_desc; /* end, typedef xilinx_desc */
 
 struct xilinx_fpga_op {
-   int (*load)(xilinx_desc *, const void *, size_t, bitstream_type);
-   int (*loadfs)(xilinx_desc *, const void *, size_t, fpga_fs_info *);
+   int (*load)(xilinx_desc *desc, const void *buf, size_t bsize,
+   bitstream_type bstype);
+   int (*loadfs)(xilinx_desc *desc, const void *buf, size_t bsize,
+ fpga_fs_info *fpga_fsinfo);
int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize,
 struct fpga_secure_info *fpga_sec_info);
-   int (*dump)(xilinx_desc *, const void *, size_t);
-   int (*info)(xilinx_desc *);
+   int (*dump)(xilinx_desc *desc, const void *buf, size_t bsize);
+   int (*info)(xilinx_desc *desc);
 };
 
 /* Generic Xilinx Functions
-- 
2.36.1



[PATCH v11 01/13] fpga: add option for loading FPGA secure bitstreams

2022-07-05 Thread Oleksandr Suvorov
It allows using this feature without enabling the "fpga loads"
command.

Signed-off-by: Oleksandr Suvorov 
Co-developed-by: Adrian Fiergolski 
Signed-off-by: Adrian Fiergolski 
Tested-by: Ricardo Salveti 
Tested-by: Adrian Fiergolski 
---

(no changes since v1)

 cmd/Kconfig |  3 ++-
 drivers/fpga/Kconfig| 14 ++
 drivers/fpga/fpga.c |  2 +-
 drivers/fpga/xilinx.c   |  2 +-
 drivers/fpga/zynqmppl.c |  4 ++--
 5 files changed, 20 insertions(+), 5 deletions(-)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 09193b61b95..4a295c7b526 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1009,8 +1009,9 @@ config CMD_FPGA_LOADP
  a partial bitstream.
 
 config CMD_FPGA_LOAD_SECURE
-   bool "fpga loads - loads secure bitstreams (Xilinx only)"
+   bool "fpga loads - loads secure bitstreams"
depends on CMD_FPGA
+   select FPGA_LOAD_SECURE
help
  Enables the fpga loads command which is used to load secure
  (authenticated or encrypted or both) bitstreams on to FPGA.
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index dc0b3dd31b7..6f8ef7b8dba 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -85,4 +85,18 @@ config FPGA_ZYNQPL
  Enable FPGA driver for loading bitstream in BIT and BIN format
  on Xilinx Zynq devices.
 
+config FPGA_LOAD_SECURE
+   bool "Enable loading secure bitstreams"
+   depends on FPGA
+   help
+ Enables the fpga loads() functions that are used to load secure
+ (authenticated or encrypted or both) bitstreams on to FPGA.
+
+config SPL_FPGA_LOAD_SECURE
+   bool "Enable loading secure bitstreams for SPL"
+   depends on SPL_FPGA
+   help
+ Enables the fpga loads() functions that are used to load secure
+ (authenticated or encrypted or both) bitstreams on to FPGA.
+
 endmenu
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index fe3dfa12335..3b0a44b2420 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -220,7 +220,7 @@ int fpga_fsload(int devnum, const void *buf, size_t size,
 }
 #endif
 
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
 int fpga_loads(int devnum, const void *buf, size_t size,
   struct fpga_secure_info *fpga_sec_info)
 {
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index cbebefb55fe..6bc1bc491fb 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -172,7 +172,7 @@ int xilinx_loadfs(xilinx_desc *desc, const void *buf, 
size_t bsize,
 }
 #endif
 
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
 int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize,
 struct fpga_secure_info *fpga_sec_info)
 {
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 6b394869dbf..8ff12bf50a0 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -245,7 +245,7 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, 
size_t bsize,
return ret;
 }
 
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
 static int zynqmp_loads(xilinx_desc *desc, const void *buf, size_t bsize,
struct fpga_secure_info *fpga_sec_info)
 {
@@ -306,7 +306,7 @@ static int zynqmp_pcap_info(xilinx_desc *desc)
 
 struct xilinx_fpga_op zynqmp_op = {
.load = zynqmp_load,
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
.loads = zynqmp_loads,
 #endif
.info = zynqmp_pcap_info,
-- 
2.36.1



[PATCH v11 00/13] fpga: zynqmp: Adding support of loading authenticated images

2022-07-05 Thread Oleksandr Suvorov


This patchset introduces support for the authenticated and encrypted
FPGA images on ZynqMP boards, besides that introducing common way to
pass the compatible property to any fpga driver.

It bases on the initial work by Jorge Ramirez-Ortiz 
https://patchwork.ozlabs.org/project/uboot/patch/20211015091506.2602-1-jo...@foundries.io/
https://patchwork.ozlabs.org/project/uboot/patch/20211005111324.19749-3-jo...@foundries.io/

Changes in v11:
- Fix treating an incoming FPGA image with empty flags parameter as
  legacy.
- add Tested-by records.

Changes in v10:
- move FPGA flags to macros;
- initialize xilinx_desc structs directly, removing *_DESC macros;
- initialize flags for mach-zynq;
- fix mixed types of return value;
- made the message about ignoring legacy compatibe option as debug
- fix grammar;
- Support DDR images only if FPGA_LOAD_SECURE enabled.
- Support ENC images only if FPGA_LOAD_SECURE enabled.

Changes in v9:
- remove an alien commit from a patchset :)

Changes in v8:
- Michal Simek's suggestions addressed:
-- introduce the compatible flags in xilinx_desc;
-- pass a binary compatible flag instead of "compatible" property to
   an FPGA driver.
- Optimize a zynqmp_load() function.

Changes in v7:
- apply Michal Simek's suggestions
  As I applied changes on Oleksandr's patches, I indicated it by
  specifying myself as co-author in the commits logs. I am not sure
  if that is the convention of marking it.

Changes in v6:
- add support for the encrypted bitfiles.

Changes in v5:
- replace ifdef with if() where it's possible.

Changes in v4:
- change interface to xilinx_desc->operations->open() callback.
- fix a bug from previous version of the patchset in dereferencing
  of a parent fpga_desc structure.

Changes in v3:
- remove the patch which introduced CMD_SPL_FPGA_LOAD_SECURE.
- fix mixing definitions/declarations.
- replace strcmp() calls with more secure strncmp().
- document the "u-boot,zynqmp-fpga-ddrauth" compatible string.
- fix code style by check-patch recommendations.

Changes in v2:
- add function fit_fpga_load() to simplify calls of fpga_load()
  from contexts without a compatible attribute.
- move all ZynqMP-specific logic to drivers/fpga/zynqmppl.c
- prepare for passing a "compatible" FDT property to any fpga driver.

Adrian Fiergolski (1):
  fpga: zynqmp: support loading encrypted bitfiles

Oleksandr Suvorov (12):
  fpga: add option for loading FPGA secure bitstreams
  fpga: xilinx: add missed identifier names
  fpga: xilinx: add bitstream flags to driver desc
  fpga: zynqmp: add str2flags call
  fpga: add fpga_compatible2flag
  fpga: xilinx: pass compatible flags to xilinx_load()
  fpga: pass compatible flags to fpga_load()
  spl: fit: pass real compatible flags to fpga_load()
  fpga: xilinx: pass compatible flags to load() callback
  fpga: zynqmp: optimize zynqmppl_load() code
  fpga: zynqmp: add bitstream compatible checking
  fpga: zynqmp: support loading authenticated images

 arch/arm/mach-zynq/cpu.c  |   1 +
 board/xilinx/versal/board.c   |   5 +-
 board/xilinx/zynqmp/zynqmp.c  |   5 +-
 boot/Kconfig  |   4 +-
 boot/image-board.c|   4 +-
 cmd/Kconfig   |   3 +-
 cmd/fpga.c|   8 +-
 common/spl/spl_fit.c  |  16 ++--
 doc/uImage.FIT/source_file_format.txt |   7 +-
 drivers/fpga/Kconfig  |  14 
 drivers/fpga/fpga.c   |  31 +++-
 drivers/fpga/spartan2.c   |   2 +-
 drivers/fpga/spartan3.c   |   2 +-
 drivers/fpga/versalpl.c   |   2 +-
 drivers/fpga/virtex2.c|   2 +-
 drivers/fpga/xilinx.c |   8 +-
 drivers/fpga/zynqmppl.c   | 104 ++
 drivers/fpga/zynqpl.c |   2 +-
 include/fpga.h|   4 +-
 include/versalpl.h|   3 -
 include/xilinx.h  |  19 +++--
 include/zynqmppl.h|   9 ++-
 22 files changed, 199 insertions(+), 56 deletions(-)

-- 
2.36.1



Re: [PATCH v10 00/13] fpga: zynqmp: Adding support of loading authenticated images

2022-06-18 Thread Oleksandr Suvorov
Hi Adrian,

Thank you very much! I felt relief :)

On Fri, Jun 17, 2022 at 5:37 PM Adrian Fiergolski
 wrote:
>
> Hi Oleksandr,
>
> Thank you for the follow-up.
>
> I took the chance to test this patchset in the actual hardware. I
> focused on the encrypted bitfiles (not authenticated) and I confirm it
> works.
>
> Regads,
> Adrian
>
> On 12.06.2022 00:06, Oleksandr Suvorov wrote:
> > This patchset introduces support for the authenticated and encrypted
> > FPGA images on ZynqMP boards, besides that introducing common way to
> > pass the compatible property to any fpga driver.
> >
> > It bases on the initial work by Jorge Ramirez-Ortiz 
> > https://patchwork.ozlabs.org/project/uboot/patch/20211015091506.2602-1-jo...@foundries.io/
> > https://patchwork.ozlabs.org/project/uboot/patch/20211005111324.19749-3-jo...@foundries.io/
> >
> > Changes in v10:
> > - move FPGA flags to macros;
> > - initialize xilinx_desc structs directly, removing *_DESC macros;
> > - initialize flags for mach-zynq;
> > - fix mixed types of return value;
> > - made the message about ignoring legacy compatibe option as debug
> > - fix grammar;
> > - Support DDR images only if FPGA_LOAD_SECURE enabled.
> >- Support ENC images only if FPGA_LOAD_SECURE enabled.
> >
> > Changes in v9:
> > - remove an alien commit from a patchset :)
> >
> > Changes in v8:
> > - Michal Simek's suggestions addressed:
> > -- introduce the compatible flags in xilinx_desc;
> > -- pass a binary compatible flag instead of "compatible" property to
> > an FPGA driver.
> > - Optimize a zynqmp_load() function.
> >
> > Changes in v7:
> > - apply Michal Simek's suggestions
> >As I applied changes on Oleksandr's patches, I indicated it by
> >specifying myself as co-author in the commits logs. I am not sure
> >if that is the convention of marking it.
> >
> > Changes in v6:
> > - add support for the encrypted bitfiles.
> >
> > Changes in v5:
> > - replace ifdef with if() where it's possible.
> >
> > Changes in v4:
> > - change interface to xilinx_desc->operations->open() callback.
> > - fix a bug from previous version of the patchset in dereferencing
> >of a parent fpga_desc structure.
> >
> > Changes in v3:
> > - remove the patch which introduced CMD_SPL_FPGA_LOAD_SECURE.
> > - fix mixing definitions/declarations.
> > - replace strcmp() calls with more secure strncmp().
> > - document the "u-boot,zynqmp-fpga-ddrauth" compatible string.
> > - fix code style by check-patch recommendations.
> >
> > Changes in v2:
> > - add function fit_fpga_load() to simplify calls of fpga_load()
> >from contexts without a compatible attribute.
> > - move all ZynqMP-specific logic to drivers/fpga/zynqmppl.c
> > - prepare for passing a "compatible" FDT property to any fpga driver.
> >
> > Adrian Fiergolski (1):
> >fpga: zynqmp: support loading encrypted bitfiles
> >
> > Oleksandr Suvorov (12):
> >fpga: add option for loading FPGA secure bitstreams
> >fpga: xilinx: add missed identifier names
> >fpga: xilinx: add bitstream flags to driver desc
> >fpga: zynqmp: add str2flags call
> >fpga: add fpga_compatible2flag
> >fpga: xilinx: pass compatible flags to xilinx_load()
> >fpga: pass compatible flags to fpga_load()
> >spl: fit: pass real compatible flags to fpga_load()
> >fpga: xilinx: pass compatible flags to load() callback
> >fpga: zynqmp: optimize zynqmppl_load() code
> >fpga: zynqmp: add bitstream compatible checking
> >fpga: zynqmp: support loading authenticated images
> >
> >   arch/arm/mach-zynq/cpu.c  |  1 +
> >   board/xilinx/versal/board.c   |  5 +-
> >   board/xilinx/zynqmp/zynqmp.c  |  5 +-
> >   boot/Kconfig  |  4 +-
> >   boot/image-board.c|  4 +-
> >   cmd/Kconfig   |  3 +-
> >   cmd/fpga.c|  8 +--
> >   common/spl/spl_fit.c  | 16 +++--
> >   doc/uImage.FIT/source_file_format.txt |  7 +-
> >   drivers/fpga/Kconfig  | 14 
> >   drivers/fpga/fpga.c   | 31 -
> >   drivers/fpga/spartan2.c   |  2 +-
> >   drivers/fpga/spartan3.c       |  2 +-
> >   drivers/fpga/versalpl.c   |  2 +-
> >   drivers/fpga/virtex2.c|  2 +-
> >   drivers/fpga/xilinx.c |  8 +--
> >   drivers/fpga/zynqmppl.c   | 96 ++-
> >   drivers/fpga/zynqpl.c |  2 +-
> >   include/fpga.h|  4 +-
> >   include/versalpl.h|  3 -
> >   include/xilinx.h  | 19 --
> >   include/zynqmppl.h|  9 ++-
> >   22 files changed, 191 insertions(+), 56 deletions(-)
> >



-- 
Best regards
Oleksandr

Oleksandr Suvorov
cryo...@gmail.com


[PATCH v10 13/13] fpga: zynqmp: support loading encrypted bitfiles

2022-06-11 Thread Oleksandr Suvorov
From: Adrian Fiergolski 

Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to
handle loading encrypted bitfiles.

This feature requires encrypted FSBL, as according to UG1085:
"The CSU automatically locks out the AES key, stored in either BBRAM
 or eFUSEs, as a key source to the AES engine if the FSBL is not
 encrypted. This prevents using the BBRAM or eFUSE as the key source
 to the AES engine during run-time applications."

Signed-off-by: Adrian Fiergolski 
Co-developed-by: Oleksandr Suvorov 
Signed-off-by: Oleksandr Suvorov 
---

Changes in v10:
  - Support ENC images only if FPGA_LOAD_SECURE enabled.

Changes in v9:
- remove an alien commit from a patchset :)

Changes in v8:
- Michal Simek's suggestions addressed:
-- introduce the compatible flags in xilinx_desc;
-- pass a binary compatible flag instead of "compatible" property to
   an FPGA driver.
- Optimize a zynqmp_load() function.

Changes in v7:
- apply Michal Simek's suggestions
  As I applied changes on Oleksandr's patches, I indicated it by
  specifying myself as co-author in the commits logs. I am not sure
  if that is the convention of marking it.

Changes in v6:
- add support for the encrypted bitfiles.

Changes in v5:
- replace ifdef with if() where it's possible.

Changes in v4:
- change interface to xilinx_desc->operations->open() callback.
- fix a bug from previous version of the patchset in dereferencing
  of a parent fpga_desc structure.

Changes in v3:
- remove the patch which introduced CMD_SPL_FPGA_LOAD_SECURE.
- fix mixing definitions/declarations.
- replace strcmp() calls with more secure strncmp().
- document the "u-boot,zynqmp-fpga-ddrauth" compatible string.
- fix code style by check-patch recommendations.

Changes in v2:
- add function fit_fpga_load() to simplify calls of fpga_load()
  from contexts without a compatible attribute.
- move all ZynqMP-specific logic to drivers/fpga/zynqmppl.c
- prepare for passing a "compatible" FDT property to any fpga driver.

 doc/uImage.FIT/source_file_format.txt | 2 ++
 drivers/fpga/zynqmppl.c   | 8 
 include/fpga.h| 1 +
 include/xilinx.h  | 1 +
 include/zynqmppl.h| 4 +++-
 5 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/doc/uImage.FIT/source_file_format.txt 
b/doc/uImage.FIT/source_file_format.txt
index 461e2af2a84..68701118409 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -188,6 +188,8 @@ the '/images' node should have the following layout:
 "u-boot,fpga-legacy" - the generic fpga loading routine.
 "u-boot,zynqmp-fpga-ddrauth" - signed non-encrypted FPGA bitstream for
 Xilinx Zynq UltraScale+ (ZymqMP) device.
+"u-boot,zynqmp-fpga-enc" - encrypted FPGA bitstream for Xilinx Zynq
+UltraScale+ (ZynqMP) device.
 
   Optional nodes:
   - hash-1 : Each hash sub-node represents separate hash or checksum
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index bb0ff832b79..e3bfa93455e 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -252,6 +252,11 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf,
info.authflag = ZYNQMP_FPGA_AUTH_DDR;
info.encflag = FPGA_NO_ENC_OR_NO_AUTH;
return desc->operations->loads(desc, buf, bsize, );
+   case FPGA_XILINX_ZYNQMP_ENC:
+   /* Encryption using device key */
+   info.authflag = FPGA_NO_ENC_OR_NO_AUTH;
+   info.encflag = FPGA_ENC_DEV_KEY;
+   return desc->operations->loads(desc, buf, bsize, );
 #endif
default:
puts("Unsupported bitstream type\n");
@@ -355,6 +360,9 @@ static int zynqmp_str2flag(xilinx_desc *desc, const char 
*str)
 #if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
if (!strncmp(str, "u-boot,zynqmp-fpga-ddrauth", 26))
return FPGA_XILINX_ZYNQMP_DDRAUTH;
+
+   if (!strncmp(str, "u-boot,zynqmp-fpga-enc", 22))
+   return FPGA_XILINX_ZYNQMP_ENC;
 #endif
return 0;
 }
diff --git a/include/fpga.h b/include/fpga.h
index 13b1bbee3ca..a4e16401da7 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -20,6 +20,7 @@
 /* device numbers must be non-negative */
 #define FPGA_INVALID_DEVICE-1
 
+#define FPGA_ENC_DEV_KEY   0
 #define FPGA_ENC_USR_KEY   1
 #define FPGA_NO_ENC_OR_NO_AUTH 2
 
diff --git a/include/xilinx.h b/include/xilinx.h
index ffd95ad7225..a62f6fd074f 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -40,6 +40,7 @@ typedef enum {/* typedef 
xilinx_family */
 /* FPGA bitstream supported types */
 #define FPGA_LEGACYBIT(0)
 #define FPGA_XILINX_ZYNQMP_DDRAUTH BIT(1)
+#define FPGA_XILINX_ZYNQMP_ENC BIT(2)
 
 typedef struct {   /* typedef xilinx_desc */
   

[PATCH v10 12/13] fpga: zynqmp: support loading authenticated images

2022-06-11 Thread Oleksandr Suvorov
Add supporting new compatible string "u-boot,zynqmp-fpga-ddrauth" to
handle loading authenticated images (DDR).

Based on solution by Jorge Ramirez-Ortiz 
Signed-off-by: Oleksandr Suvorov 
---

Changes in v10:
- Support DDR images only if FPGA_LOAD_SECURE enabled.

 boot/Kconfig  |  4 ++--
 doc/uImage.FIT/source_file_format.txt |  5 -
 drivers/fpga/zynqmppl.c   | 25 +++--
 include/xilinx.h  |  1 +
 include/zynqmppl.h|  4 
 5 files changed, 34 insertions(+), 5 deletions(-)

diff --git a/boot/Kconfig b/boot/Kconfig
index 08451c65a56..e30643d3071 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -210,8 +210,8 @@ config SPL_LOAD_FIT
  1. "loadables" images, other than FDTs, which do not have a "load"
 property will not be loaded. This limitation also applies to FPGA
 images with the correct "compatible" string.
- 2. For FPGA images, only the "compatible" = "u-boot,fpga-legacy"
-loading method is supported.
+ 2. For FPGA images, the supported "compatible" list is in the
+doc/uImage.FIT/source_file_format.txt.
  3. FDTs are only loaded for images with an "os" property of "u-boot".
 "linux" images are also supported with Falcon boot mode.
 
diff --git a/doc/uImage.FIT/source_file_format.txt 
b/doc/uImage.FIT/source_file_format.txt
index f93ac6d1c7b..461e2af2a84 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -184,7 +184,10 @@ the '/images' node should have the following layout:
 Mandatory for types: "firmware", and "kernel".
   - compatible : compatible method for loading image.
 Mandatory for types: "fpga", and images that do not specify a load address.
-To use the generic fpga loading routine, use "u-boot,fpga-legacy".
+Supported compatible methods:
+"u-boot,fpga-legacy" - the generic fpga loading routine.
+"u-boot,zynqmp-fpga-ddrauth" - signed non-encrypted FPGA bitstream for
+Xilinx Zynq UltraScale+ (ZymqMP) device.
 
   Optional nodes:
   - hash-1 : Each hash sub-node represents separate hash or checksum
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 5e74360220e..bb0ff832b79 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -232,7 +233,9 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf,
u32 buf_lo, buf_hi;
u32 bsize_req = (u32)bsize;
u32 ret_payload[PAYLOAD_ARG_CNT];
-
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
+   struct fpga_secure_info info = { 0 };
+#endif
debug("%s called!\n", __func__);
 
if (zynqmp_check_compatible(desc, flags)) {
@@ -240,6 +243,21 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf,
return FPGA_FAIL;
}
 
+   switch (flags) {
+   case FPGA_LEGACY:
+   break;  /* Handle the legacy image later in this function */
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
+   case FPGA_XILINX_ZYNQMP_DDRAUTH:
+   /* DDR authentication */
+   info.authflag = ZYNQMP_FPGA_AUTH_DDR;
+   info.encflag = FPGA_NO_ENC_OR_NO_AUTH;
+   return desc->operations->loads(desc, buf, bsize, );
+#endif
+   default:
+   puts("Unsupported bitstream type\n");
+   return FPGA_FAIL;
+   }
+
if (zynqmp_firmware_version() <= PMUFW_V1_0) {
puts("WARN: PMUFW v1.0 or less is detected\n");
puts("WARN: Not all bitstream formats are supported\n");
@@ -334,7 +352,10 @@ static int zynqmp_str2flag(xilinx_desc *desc, const char 
*str)
 {
if (!strncmp(str, "u-boot,fpga-legacy", 18))
return FPGA_LEGACY;
-
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
+   if (!strncmp(str, "u-boot,zynqmp-fpga-ddrauth", 26))
+   return FPGA_XILINX_ZYNQMP_DDRAUTH;
+#endif
return 0;
 }
 
diff --git a/include/xilinx.h b/include/xilinx.h
index 89a12818311..ffd95ad7225 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -39,6 +39,7 @@ typedef enum {/* typedef 
xilinx_family */
 
 /* FPGA bitstream supported types */
 #define FPGA_LEGACYBIT(0)
+#define FPGA_XILINX_ZYNQMP_DDRAUTH BIT(1)
 
 typedef struct {   /* typedef xilinx_desc */
xilinx_family family;   /* part type */
diff --git a/include/zynqmppl.h b/include/zynqmppl.h
index 8401a850afb..87ccd2f394c 100644
--- a/include/zynqmppl.h
+++ b/include/zynqmppl.h
@@ -25,6 +25,10 @@
 
 extern struct xilinx_fpga_op zynqmp_op;
 
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
+#define ZYNQMP_FPGA_FLAGS  (FPGA_LEGACY | FPGA_XILINX_ZYNQMP_DDRAUTH)
+#else
 #define ZYNQMP_FPGA_FLAGS  (FPGA_LEGACY)
+#endif
 
 #endif /* _ZYNQMPPL_H_ */
-- 
2.36.1



[PATCH v10 11/13] fpga: zynqmp: add bitstream compatible checking

2022-06-11 Thread Oleksandr Suvorov
Check whether the FPGA ZynqMP driver supports the given bitstream
image type.

Signed-off-by: Oleksandr Suvorov 
---

Changes in v10:
- fix grammar;

 drivers/fpga/zynqmppl.c | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 6959b8ae97e..5e74360220e 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -199,6 +199,28 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, 
const void *buf,
return 0;
 }
 
+static int zynqmp_check_compatible(xilinx_desc *desc, int flags)
+{
+   /* If no flags set, the image is legacy */
+   if (!flags)
+   return 0;
+
+   /* For legacy bitstream images no need for other methods exist */
+   if ((flags & desc->flags) && flags == FPGA_LEGACY)
+   return 0;
+
+   /*
+* Other images are handled in secure callback loads(). Check
+* callback existence besides image type support.
+*/
+   if (CONFIG_IS_ENABLED(FPGA_LOAD_SECURE) &&
+   desc->operations->loads &&
+   (flags & desc->flags))
+   return 0;
+
+   return FPGA_FAIL;
+}
+
 static int zynqmp_load(xilinx_desc *desc, const void *buf,
   size_t bsize, bitstream_type bstype,
   int flags)
@@ -213,6 +235,11 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf,
 
debug("%s called!\n", __func__);
 
+   if (zynqmp_check_compatible(desc, flags)) {
+   puts("Missing loads operation or unsupported bitstream type\n");
+   return FPGA_FAIL;
+   }
+
if (zynqmp_firmware_version() <= PMUFW_V1_0) {
puts("WARN: PMUFW v1.0 or less is detected\n");
puts("WARN: Not all bitstream formats are supported\n");
-- 
2.36.1



[PATCH v10 10/13] fpga: zynqmp: optimize zynqmppl_load() code

2022-06-11 Thread Oleksandr Suvorov
Optimize function code preparing to add secure bitstream types
support.

Signed-off-by: Oleksandr Suvorov 
---

(no changes since v1)

 drivers/fpga/zynqmppl.c | 27 +--
 1 file changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 239c498f7b5..6959b8ae97e 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -199,46 +199,45 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, 
const void *buf,
return 0;
 }
 
-static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
-bitstream_type bstype, int flags)
+static int zynqmp_load(xilinx_desc *desc, const void *buf,
+  size_t bsize, bitstream_type bstype,
+  int flags)
 {
ALLOC_CACHE_ALIGN_BUFFER(u32, bsizeptr, 1);
u32 swap = 0;
ulong bin_buf;
int ret;
u32 buf_lo, buf_hi;
+   u32 bsize_req = (u32)bsize;
u32 ret_payload[PAYLOAD_ARG_CNT];
-   bool xilfpga_old = false;
+
+   debug("%s called!\n", __func__);
 
if (zynqmp_firmware_version() <= PMUFW_V1_0) {
puts("WARN: PMUFW v1.0 or less is detected\n");
puts("WARN: Not all bitstream formats are supported\n");
puts("WARN: Please upgrade PMUFW\n");
-   xilfpga_old = true;
-   if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, ))
+   if (zynqmp_validate_bitstream(desc, buf, bsize,
+ bsize, ))
return FPGA_FAIL;
bsizeptr = (u32 *)
flush_dcache_range((ulong)bsizeptr,
   (ulong)bsizeptr + sizeof(size_t));
+   bsize_req = (u32)(uintptr_t)bsizeptr;
bstype |= BIT(ZYNQMP_FPGA_BIT_NS);
+   } else {
+   bstype = 0;
}
 
bin_buf = zynqmp_align_dma_buffer((u32 *)buf, bsize, swap);
 
-   debug("%s called!\n", __func__);
flush_dcache_range(bin_buf, bin_buf + bsize);
 
buf_lo = (u32)bin_buf;
buf_hi = upper_32_bits(bin_buf);
 
-   if (xilfpga_old)
-   ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo,
-   buf_hi, (u32)(uintptr_t)bsizeptr,
-   bstype, ret_payload);
-   else
-   ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo,
-   buf_hi, (u32)bsize, 0, ret_payload);
-
+   ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo, buf_hi,
+   bsize_req, bstype, ret_payload);
if (ret)
printf("PL FPGA LOAD failed with err: 0x%08x\n", ret);
 
-- 
2.36.1



[PATCH v10 09/13] fpga: xilinx: pass compatible flags to load() callback

2022-06-11 Thread Oleksandr Suvorov
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov 
---

(no changes since v1)

 drivers/fpga/spartan2.c | 2 +-
 drivers/fpga/spartan3.c | 2 +-
 drivers/fpga/versalpl.c | 2 +-
 drivers/fpga/virtex2.c  | 2 +-
 drivers/fpga/xilinx.c   | 2 +-
 drivers/fpga/zynqmppl.c | 2 +-
 drivers/fpga/zynqpl.c   | 2 +-
 include/xilinx.h| 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index 3435400e58b..328740f3f35 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -41,7 +41,7 @@ static int spartan2_ss_dump(xilinx_desc *desc, const void 
*buf, size_t bsize);
 /* - */
 /* Spartan-II Generic Implementation */
 static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize,
-bitstream_type bstype)
+bitstream_type bstype, int flags)
 {
int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index 4850c99352d..918f6db5065 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -45,7 +45,7 @@ static int spartan3_ss_dump(xilinx_desc *desc, const void 
*buf, size_t bsize);
 /* - */
 /* Spartan-II Generic Implementation */
 static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize,
-bitstream_type bstype)
+bitstream_type bstype, int flags)
 {
int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c
index c44a7d34557..d3876a8f541 100644
--- a/drivers/fpga/versalpl.c
+++ b/drivers/fpga/versalpl.c
@@ -27,7 +27,7 @@ static ulong versal_align_dma_buffer(ulong *buf, u32 len)
 }
 
 static int versal_load(xilinx_desc *desc, const void *buf, size_t bsize,
-  bitstream_type bstype)
+  bitstream_type bstype, int flags)
 {
ulong bin_buf;
int ret;
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index b3e0537bab0..83b90298cad 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -94,7 +94,7 @@ static int virtex2_ss_load(xilinx_desc *desc, const void 
*buf, size_t bsize);
 static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 
 static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize,
-   bitstream_type bstype)
+   bitstream_type bstype, int flags)
 {
int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index d9951ca3ecf..8170c3368ef 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -151,7 +151,7 @@ int xilinx_load(xilinx_desc *desc, const void *buf, size_t 
bsize,
return FPGA_FAIL;
}
 
-   return desc->operations->load(desc, buf, bsize, bstype);
+   return desc->operations->load(desc, buf, bsize, bstype, flags);
 }
 
 #if defined(CONFIG_CMD_FPGA_LOADFS)
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 0ffcff0c148..239c498f7b5 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -200,7 +200,7 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, 
const void *buf,
 }
 
 static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
-bitstream_type bstype)
+bitstream_type bstype, int flags)
 {
ALLOC_CACHE_ALIGN_BUFFER(u32, bsizeptr, 1);
u32 swap = 0;
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index 2de40109a81..d8ebd542abd 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -371,7 +371,7 @@ static int zynq_validate_bitstream(xilinx_desc *desc, const 
void *buf,
 }
 
 static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize,
-bitstream_type bstype)
+bitstream_type bstype, int flags)
 {
unsigned long ts; /* Timestamp */
u32 isr_status, swap;
diff --git a/include/xilinx.h b/include/xilinx.h
index a9e68138169..89a12818311 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -53,7 +53,7 @@ typedef struct {  /* typedef xilinx_desc */
 
 struct xilinx_fpga_op {
int (*load)(xilinx_desc *desc, const void *buf, size_t bsize,
-   bitstream_type bstype);
+   bitstream_type bstype, int flags);
int (*loadfs)(xilinx_desc *desc, const void *buf, size_t bsize,
  fpga_fs_info *fpga_fsinfo);
int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize,
-- 
2.36.1



[PATCH v10 07/13] fpga: pass compatible flags to fpga_load()

2022-06-11 Thread Oleksandr Suvorov
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov 
---

(no changes since v1)

 boot/image-board.c| 4 ++--
 cmd/fpga.c| 8 
 common/spl/spl_fit.c  | 6 --
 drivers/fpga/fpga.c   | 5 +++--
 drivers/fpga/xilinx.c | 2 +-
 include/fpga.h| 2 +-
 6 files changed, 15 insertions(+), 12 deletions(-)

diff --git a/boot/image-board.c b/boot/image-board.c
index 0d2e0fc9692..fbd95e4a77c 100644
--- a/boot/image-board.c
+++ b/boot/image-board.c
@@ -707,14 +707,14 @@ int boot_get_fpga(int argc, char *const argv[], 
bootm_headers_t *images,
 img_len, BIT_FULL);
if (err)
err = fpga_load(devnum, (const void *)img_data,
-   img_len, BIT_FULL);
+   img_len, BIT_FULL, 0);
} else {
name = "partial";
err = fpga_loadbitstream(devnum, (char *)img_data,
 img_len, BIT_PARTIAL);
if (err)
err = fpga_load(devnum, (const void *)img_data,
-   img_len, BIT_PARTIAL);
+   img_len, BIT_PARTIAL, 0);
}
 
if (err)
diff --git a/cmd/fpga.c b/cmd/fpga.c
index 3fdd0b35e80..c4651dd403e 100644
--- a/cmd/fpga.c
+++ b/cmd/fpga.c
@@ -178,7 +178,7 @@ static int do_fpga_load(struct cmd_tbl *cmdtp, int flag, 
int argc,
if (ret)
return ret;
 
-   return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL);
+   return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL, 0);
 }
 
 static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
@@ -209,7 +209,7 @@ static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag, 
int argc,
if (ret)
return ret;
 
-   return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL);
+   return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL, 0);
 }
 #endif
 
@@ -315,7 +315,7 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, 
int argc,
data_size = image_get_data_size(hdr);
}
return fpga_load(dev, (void *)data, data_size,
- BIT_FULL);
+ BIT_FULL, 0);
}
 #endif
 #if defined(CONFIG_FIT)
@@ -355,7 +355,7 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, 
int argc,
return CMD_RET_FAILURE;
}
 
-   return fpga_load(dev, fit_data, data_size, BIT_FULL);
+   return fpga_load(dev, fit_data, data_size, BIT_FULL, 0);
}
 #endif
default:
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 1bbf824684a..3c5a91916cc 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -581,6 +581,8 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx, 
int node,
 {
const char *compatible;
int ret;
+   int devnum = 0;
+   int flags = 0;
 
debug("FPGA bitstream at: %x, size: %x\n",
  (u32)fpga_image->load_addr, fpga_image->size);
@@ -591,8 +593,8 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx, 
int node,
else if (strcmp(compatible, "u-boot,fpga-legacy"))
printf("Ignoring compatible = %s property\n", compatible);
 
-   ret = fpga_load(0, (void *)fpga_image->load_addr, fpga_image->size,
-   BIT_FULL);
+   ret = fpga_load(devnum, (void *)fpga_image->load_addr,
+   fpga_image->size, BIT_FULL, flags);
if (ret) {
printf("%s: Cannot load the image to the FPGA\n", __func__);
return ret;
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index a0d39912a05..dc4aeed8689 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -252,7 +252,8 @@ int fpga_loads(int devnum, const void *buf, size_t size,
 /*
  * Generic multiplexing code
  */
-int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype)
+int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype,
+ int flags)
 {
int ret_val = FPGA_FAIL;   /* assume failure */
const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
@@ -263,7 +264,7 @@ int fpga_load(int devnum, const void *buf, size_t bsize, 
bitstream_type bstype)
case fpga_xilinx:
 #if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_load(desc->devdesc, buf, bsize,
- bstype, 0);
+ bsty

[PATCH v10 08/13] spl: fit: pass real compatible flags to fpga_load()

2022-06-11 Thread Oleksandr Suvorov
Convert taken FPGA image "compatible" string to a binary compatible
flag and pass it to an FPGA driver.

Signed-off-by: Oleksandr Suvorov 
---

Changes in v10:
- made the message about ignoring legacy compatibe option as debug

 common/spl/spl_fit.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 3c5a91916cc..1bf953b44a4 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -588,10 +588,14 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx, 
int node,
  (u32)fpga_image->load_addr, fpga_image->size);
 
compatible = fdt_getprop(ctx->fit, node, "compatible", NULL);
-   if (!compatible)
+   if (!compatible) {
warn_deprecated("'fpga' image without 'compatible' property");
-   else if (strcmp(compatible, "u-boot,fpga-legacy"))
-   printf("Ignoring compatible = %s property\n", compatible);
+   } else {
+   flags = fpga_compatible2flag(devnum, compatible);
+   if (strcmp(compatible, "u-boot,fpga-legacy"))
+   debug("Ignoring compatible = %s property\n",
+ compatible);
+   }
 
ret = fpga_load(devnum, (void *)fpga_image->load_addr,
fpga_image->size, BIT_FULL, flags);
-- 
2.36.1



[PATCH v10 06/13] fpga: xilinx: pass compatible flags to xilinx_load()

2022-06-11 Thread Oleksandr Suvorov
This flag is used to check whether a Xilinx FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov 
---

(no changes since v1)

 drivers/fpga/fpga.c   | 2 +-
 drivers/fpga/xilinx.c | 2 +-
 include/xilinx.h  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index a63bff1df94..a0d39912a05 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -263,7 +263,7 @@ int fpga_load(int devnum, const void *buf, size_t bsize, 
bitstream_type bstype)
case fpga_xilinx:
 #if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_load(desc->devdesc, buf, bsize,
- bstype);
+ bstype, 0);
 #else
fpga_no_sup((char *)__func__, "Xilinx devices");
 #endif
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index 6bc1bc491fb..5dd721575ec 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -139,7 +139,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t 
size,
 }
 
 int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
-   bitstream_type bstype)
+   bitstream_type bstype, int flags)
 {
if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
printf ("%s: Invalid device descriptor\n", __FUNCTION__);
diff --git a/include/xilinx.h b/include/xilinx.h
index 91179abe31f..a9e68138169 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -66,7 +66,7 @@ struct xilinx_fpga_op {
 /* Generic Xilinx Functions
  */
 int xilinx_load(xilinx_desc *desc, const void *image, size_t size,
-   bitstream_type bstype);
+   bitstream_type bstype, int flags);
 int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 int xilinx_info(xilinx_desc *desc);
 int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
-- 
2.36.1



[PATCH v10 05/13] fpga: add fpga_compatible2flag

2022-06-11 Thread Oleksandr Suvorov
Add a "compatible" string to binary flag converter, which uses
a callback str2flag() of given FPGA driver if available.

Signed-off-by: Oleksandr Suvorov 
---

Changes in v10:
- fix mixed types of return value;

 drivers/fpga/fpga.c | 24 
 include/fpga.h  |  1 +
 2 files changed, 25 insertions(+)

diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index 3b0a44b2420..a63bff1df94 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -356,3 +356,27 @@ int fpga_info(int devnum)
 
return fpga_dev_info(devnum);
 }
+
+int fpga_compatible2flag(int devnum, const char *compatible)
+{
+   const fpga_desc * const desc = fpga_get_desc(devnum);
+
+   if (!desc)
+   return 0;
+
+   switch (desc->devtype) {
+#if defined(CONFIG_FPGA_XILINX)
+   case fpga_xilinx:
+   {
+   xilinx_desc *xdesc = (xilinx_desc *)desc->devdesc;
+
+   if (xdesc->operations && xdesc->operations->str2flag)
+   return xdesc->operations->str2flag(xdesc, compatible);
+   }
+#endif
+   default:
+   break;
+   }
+
+   return 0;
+}
diff --git a/include/fpga.h b/include/fpga.h
index ec5144334df..2172b0d015e 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -75,5 +75,6 @@ int fpga_dump(int devnum, const void *buf, size_t bsize);
 int fpga_info(int devnum);
 const fpga_desc *const fpga_validate(int devnum, const void *buf,
 size_t bsize, char *fn);
+int fpga_compatible2flag(int devnum, const char *compatible);
 
 #endif /* _FPGA_H_ */
-- 
2.36.1



[PATCH v10 04/13] fpga: zynqmp: add str2flags call

2022-06-11 Thread Oleksandr Suvorov
Add a call to convert FPGA "compatible" string to a binary flag.

Signed-off-by: Oleksandr Suvorov 
---

(no changes since v1)

 drivers/fpga/zynqmppl.c | 9 +
 include/xilinx.h| 1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 8ff12bf50a0..0ffcff0c148 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -304,10 +304,19 @@ static int zynqmp_pcap_info(xilinx_desc *desc)
return ret;
 }
 
+static int zynqmp_str2flag(xilinx_desc *desc, const char *str)
+{
+   if (!strncmp(str, "u-boot,fpga-legacy", 18))
+   return FPGA_LEGACY;
+
+   return 0;
+}
+
 struct xilinx_fpga_op zynqmp_op = {
.load = zynqmp_load,
 #if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
.loads = zynqmp_loads,
 #endif
.info = zynqmp_pcap_info,
+   .str2flag = zynqmp_str2flag,
 };
diff --git a/include/xilinx.h b/include/xilinx.h
index d9e4b8da968..91179abe31f 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -60,6 +60,7 @@ struct xilinx_fpga_op {
 struct fpga_secure_info *fpga_sec_info);
int (*dump)(xilinx_desc *desc, const void *buf, size_t bsize);
int (*info)(xilinx_desc *desc);
+   int (*str2flag)(xilinx_desc *desc, const char *string);
 };
 
 /* Generic Xilinx Functions
-- 
2.36.1



[PATCH v10 03/13] fpga: xilinx: add bitstream flags to driver desc

2022-06-11 Thread Oleksandr Suvorov
Store a set of supported bitstream types in xilinx_desc structure.
It will be used to determine whether an FPGA image is able to be
loaded with a given driver.

Signed-off-by: Oleksandr Suvorov 
---

Changes in v10:
- move FPGA flags to macros;
- initialize xilinx_desc structs directly, removing *_DESC macros;
- initialize flags for mach-zynq;

 arch/arm/mach-zynq/cpu.c | 1 +
 board/xilinx/versal/board.c  | 5 -
 board/xilinx/zynqmp/zynqmp.c | 5 -
 include/versalpl.h   | 3 ---
 include/xilinx.h | 4 
 include/zynqmppl.h   | 3 +--
 6 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c
index 69b818f24b8..ac595ee0a27 100644
--- a/arch/arm/mach-zynq/cpu.c
+++ b/arch/arm/mach-zynq/cpu.c
@@ -22,6 +22,7 @@ xilinx_desc fpga = {
.family = xilinx_zynq,
.iface = devcfg,
.operations = _op,
+   .flags = FPGA_LEGACY,
 };
 #endif
 
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index a88f5bb177e..1813077631f 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -27,7 +27,10 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_FPGA_VERSALPL)
-static xilinx_desc versalpl = XILINX_VERSAL_DESC;
+static xilinx_desc versalpl = {
+   xilinx_versal, csu_dma, 1, _op, 0, _op, NULL,
+   FPGA_LEGACY
+};
 #endif
 
 int board_init(void)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index e311aa772cc..0dbcaf7be6f 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -55,7 +55,10 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #if CONFIG_IS_ENABLED(FPGA) && defined(CONFIG_FPGA_ZYNQMPPL)
-static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC;
+static xilinx_desc zynqmppl = {
+   xilinx_zynqmp, csu_dma, 1, _op, 0, _op, NULL,
+   ZYNQMP_FPGA_FLAGS
+};
 
 enum {
ZYNQMP_VARIANT_EG = BIT(0U),
diff --git a/include/versalpl.h b/include/versalpl.h
index b94c82e6e66..0cc101be2f8 100644
--- a/include/versalpl.h
+++ b/include/versalpl.h
@@ -14,7 +14,4 @@
 
 extern struct xilinx_fpga_op versal_op;
 
-#define XILINX_VERSAL_DESC \
-{ xilinx_versal, csu_dma, 1, _op, 0, _op }
-
 #endif /* _VERSALPL_H_ */
diff --git a/include/xilinx.h b/include/xilinx.h
index 362943bc717..d9e4b8da968 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -37,6 +37,9 @@ typedef enum {/* typedef 
xilinx_family */
max_xilinx_type /* insert all new types before this */
 } xilinx_family;   /* end, typedef xilinx_family */
 
+/* FPGA bitstream supported types */
+#define FPGA_LEGACYBIT(0)
+
 typedef struct {   /* typedef xilinx_desc */
xilinx_family family;   /* part type */
xilinx_iface iface; /* interface type */
@@ -45,6 +48,7 @@ typedef struct {  /* typedef xilinx_desc */
int cookie; /* implementation specific cookie */
struct xilinx_fpga_op *operations; /* operations */
char *name; /* device name in bitstream */
+   int flags;  /* compatible flags */
 } xilinx_desc; /* end, typedef xilinx_desc */
 
 struct xilinx_fpga_op {
diff --git a/include/zynqmppl.h b/include/zynqmppl.h
index 35cfe17d444..8401a850afb 100644
--- a/include/zynqmppl.h
+++ b/include/zynqmppl.h
@@ -25,7 +25,6 @@
 
 extern struct xilinx_fpga_op zynqmp_op;
 
-#define XILINX_ZYNQMP_DESC \
-{ xilinx_zynqmp, csu_dma, 1, _op, 0, _op }
+#define ZYNQMP_FPGA_FLAGS  (FPGA_LEGACY)
 
 #endif /* _ZYNQMPPL_H_ */
-- 
2.36.1



[PATCH v10 02/13] fpga: xilinx: add missed identifier names

2022-06-11 Thread Oleksandr Suvorov
Function definition arguments should also have identifier names.
Add missed ones to struct xilinx_fpga_op callbacks, unifying code.

Signed-off-by: Oleksandr Suvorov 
---

(no changes since v1)

 include/xilinx.h | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/include/xilinx.h b/include/xilinx.h
index ab4537becfa..362943bc717 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -48,12 +48,14 @@ typedef struct {/* typedef xilinx_desc */
 } xilinx_desc; /* end, typedef xilinx_desc */
 
 struct xilinx_fpga_op {
-   int (*load)(xilinx_desc *, const void *, size_t, bitstream_type);
-   int (*loadfs)(xilinx_desc *, const void *, size_t, fpga_fs_info *);
+   int (*load)(xilinx_desc *desc, const void *buf, size_t bsize,
+   bitstream_type bstype);
+   int (*loadfs)(xilinx_desc *desc, const void *buf, size_t bsize,
+ fpga_fs_info *fpga_fsinfo);
int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize,
 struct fpga_secure_info *fpga_sec_info);
-   int (*dump)(xilinx_desc *, const void *, size_t);
-   int (*info)(xilinx_desc *);
+   int (*dump)(xilinx_desc *desc, const void *buf, size_t bsize);
+   int (*info)(xilinx_desc *desc);
 };
 
 /* Generic Xilinx Functions
-- 
2.36.1



[PATCH v10 01/13] fpga: add option for loading FPGA secure bitstreams

2022-06-11 Thread Oleksandr Suvorov
It allows using this feature without enabling the "fpga loads"
command.

Signed-off-by: Oleksandr Suvorov 
Tested-by: Ricardo Salveti 
Co-developed-by: Adrian Fiergolski 
Signed-off-by: Adrian Fiergolski 
---

(no changes since v1)

 cmd/Kconfig |  3 ++-
 drivers/fpga/Kconfig| 14 ++
 drivers/fpga/fpga.c |  2 +-
 drivers/fpga/xilinx.c   |  2 +-
 drivers/fpga/zynqmppl.c |  4 ++--
 5 files changed, 20 insertions(+), 5 deletions(-)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 09193b61b95..4a295c7b526 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1009,8 +1009,9 @@ config CMD_FPGA_LOADP
  a partial bitstream.
 
 config CMD_FPGA_LOAD_SECURE
-   bool "fpga loads - loads secure bitstreams (Xilinx only)"
+   bool "fpga loads - loads secure bitstreams"
depends on CMD_FPGA
+   select FPGA_LOAD_SECURE
help
  Enables the fpga loads command which is used to load secure
  (authenticated or encrypted or both) bitstreams on to FPGA.
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index dc0b3dd31b7..6f8ef7b8dba 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -85,4 +85,18 @@ config FPGA_ZYNQPL
  Enable FPGA driver for loading bitstream in BIT and BIN format
  on Xilinx Zynq devices.
 
+config FPGA_LOAD_SECURE
+   bool "Enable loading secure bitstreams"
+   depends on FPGA
+   help
+ Enables the fpga loads() functions that are used to load secure
+ (authenticated or encrypted or both) bitstreams on to FPGA.
+
+config SPL_FPGA_LOAD_SECURE
+   bool "Enable loading secure bitstreams for SPL"
+   depends on SPL_FPGA
+   help
+ Enables the fpga loads() functions that are used to load secure
+ (authenticated or encrypted or both) bitstreams on to FPGA.
+
 endmenu
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index fe3dfa12335..3b0a44b2420 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -220,7 +220,7 @@ int fpga_fsload(int devnum, const void *buf, size_t size,
 }
 #endif
 
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
 int fpga_loads(int devnum, const void *buf, size_t size,
   struct fpga_secure_info *fpga_sec_info)
 {
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index cbebefb55fe..6bc1bc491fb 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -172,7 +172,7 @@ int xilinx_loadfs(xilinx_desc *desc, const void *buf, 
size_t bsize,
 }
 #endif
 
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
 int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize,
 struct fpga_secure_info *fpga_sec_info)
 {
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 6b394869dbf..8ff12bf50a0 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -245,7 +245,7 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, 
size_t bsize,
return ret;
 }
 
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
 static int zynqmp_loads(xilinx_desc *desc, const void *buf, size_t bsize,
struct fpga_secure_info *fpga_sec_info)
 {
@@ -306,7 +306,7 @@ static int zynqmp_pcap_info(xilinx_desc *desc)
 
 struct xilinx_fpga_op zynqmp_op = {
.load = zynqmp_load,
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD)
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
.loads = zynqmp_loads,
 #endif
.info = zynqmp_pcap_info,
-- 
2.36.1



[PATCH v10 00/13] fpga: zynqmp: Adding support of loading authenticated images

2022-06-11 Thread Oleksandr Suvorov


This patchset introduces support for the authenticated and encrypted
FPGA images on ZynqMP boards, besides that introducing common way to
pass the compatible property to any fpga driver.

It bases on the initial work by Jorge Ramirez-Ortiz 
https://patchwork.ozlabs.org/project/uboot/patch/20211015091506.2602-1-jo...@foundries.io/
https://patchwork.ozlabs.org/project/uboot/patch/20211005111324.19749-3-jo...@foundries.io/

Changes in v10:
- move FPGA flags to macros;
- initialize xilinx_desc structs directly, removing *_DESC macros;
- initialize flags for mach-zynq;
- fix mixed types of return value;
- made the message about ignoring legacy compatibe option as debug
- fix grammar;
- Support DDR images only if FPGA_LOAD_SECURE enabled.
  - Support ENC images only if FPGA_LOAD_SECURE enabled.

Changes in v9:
- remove an alien commit from a patchset :)

Changes in v8:
- Michal Simek's suggestions addressed:
-- introduce the compatible flags in xilinx_desc;
-- pass a binary compatible flag instead of "compatible" property to
   an FPGA driver.
- Optimize a zynqmp_load() function.

Changes in v7:
- apply Michal Simek's suggestions
  As I applied changes on Oleksandr's patches, I indicated it by
  specifying myself as co-author in the commits logs. I am not sure
  if that is the convention of marking it.

Changes in v6:
- add support for the encrypted bitfiles.

Changes in v5:
- replace ifdef with if() where it's possible.

Changes in v4:
- change interface to xilinx_desc->operations->open() callback.
- fix a bug from previous version of the patchset in dereferencing
  of a parent fpga_desc structure.

Changes in v3:
- remove the patch which introduced CMD_SPL_FPGA_LOAD_SECURE.
- fix mixing definitions/declarations.
- replace strcmp() calls with more secure strncmp().
- document the "u-boot,zynqmp-fpga-ddrauth" compatible string.
- fix code style by check-patch recommendations.

Changes in v2:
- add function fit_fpga_load() to simplify calls of fpga_load()
  from contexts without a compatible attribute.
- move all ZynqMP-specific logic to drivers/fpga/zynqmppl.c
- prepare for passing a "compatible" FDT property to any fpga driver.

Adrian Fiergolski (1):
  fpga: zynqmp: support loading encrypted bitfiles

Oleksandr Suvorov (12):
  fpga: add option for loading FPGA secure bitstreams
  fpga: xilinx: add missed identifier names
  fpga: xilinx: add bitstream flags to driver desc
  fpga: zynqmp: add str2flags call
  fpga: add fpga_compatible2flag
  fpga: xilinx: pass compatible flags to xilinx_load()
  fpga: pass compatible flags to fpga_load()
  spl: fit: pass real compatible flags to fpga_load()
  fpga: xilinx: pass compatible flags to load() callback
  fpga: zynqmp: optimize zynqmppl_load() code
  fpga: zynqmp: add bitstream compatible checking
  fpga: zynqmp: support loading authenticated images

 arch/arm/mach-zynq/cpu.c  |  1 +
 board/xilinx/versal/board.c   |  5 +-
 board/xilinx/zynqmp/zynqmp.c  |  5 +-
 boot/Kconfig  |  4 +-
 boot/image-board.c|  4 +-
 cmd/Kconfig   |  3 +-
 cmd/fpga.c|  8 +--
 common/spl/spl_fit.c  | 16 +++--
 doc/uImage.FIT/source_file_format.txt |  7 +-
 drivers/fpga/Kconfig  | 14 
 drivers/fpga/fpga.c   | 31 -
 drivers/fpga/spartan2.c   |  2 +-
 drivers/fpga/spartan3.c   |  2 +-
 drivers/fpga/versalpl.c   |  2 +-
 drivers/fpga/virtex2.c|  2 +-
 drivers/fpga/xilinx.c |  8 +--
 drivers/fpga/zynqmppl.c   | 96 ++-
 drivers/fpga/zynqpl.c |  2 +-
 include/fpga.h|  4 +-
 include/versalpl.h|  3 -
 include/xilinx.h  | 19 --
 include/zynqmppl.h|  9 ++-
 22 files changed, 191 insertions(+), 56 deletions(-)

-- 
2.36.1



Re: [PATCH v9 05/13] fpga: add fpga_compatible2flag

2022-06-07 Thread Oleksandr Suvorov
On Tue, Jun 7, 2022 at 3:11 PM Michal Simek  wrote:
>
>
>
> On 6/1/22 10:46, Oleksandr Suvorov wrote:
> > Add a "compatible" string to binary flag converter, which uses
> > a callback str2flag() of given FPGA driver if available.
> >
> > Signed-off-by: Oleksandr Suvorov 
> > ---
> >
> > (no changes since v1)
> >
> >   drivers/fpga/fpga.c | 26 ++
> >   include/fpga.h  |  1 +
> >   2 files changed, 27 insertions(+)
> >
> > diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
> > index 3b0a44b2420..fbfdd406e3b 100644
> > --- a/drivers/fpga/fpga.c
> > +++ b/drivers/fpga/fpga.c
> > @@ -356,3 +356,29 @@ int fpga_info(int devnum)
> >
> >   return fpga_dev_info(devnum);
> >   }
> > +
> > +int fpga_compatible2flag(int devnum, const char *compatible)
> > +{
> > + const fpga_desc * const desc = fpga_get_desc(devnum);
> > +
> > + if (!desc)
> > + return FPGA_FAIL;
> > +
> > + switch (desc->devtype) {
> > + case fpga_xilinx:
> > +#if defined(CONFIG_FPGA_XILINX)
> > + {
> > + xilinx_desc *xdesc = (xilinx_desc *)desc->devdesc;
> > +
> > + if (xdesc->operations->str2flag)
> > + return xdesc->operations->str2flag(xdesc, compatible);
>
> This function is returning FPGA_FAIL or 0 (FPGA_SUCCESS) but str2flag is
> returning based on 4/14 flags.
>
> It means you are mixing two things here together.

Omg, thanks, missed that.

>
> Thanks,
> Michal



-- 
Best regards
Oleksandr

Oleksandr Suvorov
cryo...@gmail.com


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