from:"Peter.Chubb"

Re: [U-Boot] [PATCH] tegra: mmc: Set the bus width correctly

2017-06-07 Thread Peter.Chubb

> "Simon" == Simon Glass  writes:

Simon> The driver currently does not reset bit 5 of the hostctl
Simon> register even if the MMC stack requests it. Then means that
Simon> once a bus width of 8 is selected it is not possible to change
Simon> it back to 1. This breaks 'mmc rescan' which needs to start off
Simon> with a bus width of 1.

Simon> The problem was surfaced by enabling CONFIG_DM_MMC_OPS on
Simon> tegra. Without this option the MMC stack fully reinits the
Simon> driver on a 'mmc rescan'.  But with this option driver model
Simon> does not re-probe a driver once it has been probed once.

Simon> Fix the driver to honour the request.

Simon> Signed-off-by: Simon Glass  ---

Tested-by: Peter Chubb 

Simon>  drivers/mmc/tegra_mmc.c | 2 +- 1 file changed, 1 insertion(+),
Simon> 1 deletion(-)

Simon> diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
Simon> index 338e42b528..7d945a172e 100644 ---
Simon> a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@
Simon> -438,7 +438,7 @@ static int tegra_mmc_set_ios(struct udevice
Simon> *dev) else if (mmc->bus_width == 4) ctrl |= (1 << 1); else -
Simon> ctrl &= ~(1 << 1); + ctrl &= ~(1 << 1 | 1 << 5);
 
Simon>  writeb(ctrl, >reg->hostctl); debug("mmc_set_ios:
Simon> hostctl = %08X\n", ctrl); -- 2.13.0.506.g27d5fe0cd-goog


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Re: [U-Boot] u-boot-flasher fails with current u-boot

2017-06-07 Thread Peter.Chubb

> "Simon" == Simon Glass  writes:

Simon> The good news is I found my Jetson-TK1 and I can repeat your
Simon> problem.

Cool.  So it's not just me (phew)
>> 
>> Tegra124 (Jetson TK1) # mmc rescan

Simon> Why are you running 'mmc rescan'? Is this because the MMC has
Simon> changed?

Any mmc command fails except 'mmc part' and 'mmc list'.  'mmc rescan'
was just one example that should work.

Tegra124 (Jetson TK1) # mmc dev
tegra_mmc_send_cmd_bounced: MMC Timeout
Interrupt status0x0001
Interrupt status enable 0x003b
Interrupt signal enable 0x0002
Present status  0x01fb02f6
mmc_init: -1, time 8042

Tegra124 (Jetson TK1) # mmc info
mmc_init: -1, time 4

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Re: [U-Boot] u-boot-flasher fails with current u-boot

2017-06-07 Thread Peter.Chubb

> "Peter" == Peter Chubb  writes:
> "Simon" == Simon Glass  writes:

Simon> Oh dear. I cannot find my board but will see if I can repeat
Simon> this on a beaver.

Peter> If there's any additional logging you'd like me to collect on
Peter> the Jetson, let me know.

I tried to reproduce this this morning.  Today, even trying to exec
the U-Boot without flashing fails.

So,
./tegra-uboot-flasher exec  jetson-tk1
with a current u-boot gives an inoperative eMMC.

In the boot header I see:

U-Boot 2017.05-00769-g0e513e788f (Jun 08 2017 - 09:26:27 +1000)

TEGRA124
Model: NVIDIA Jetson TK1
Board: NVIDIA Jetson TK1
DRAM:  2 GiB
MMC:   sdhci@700b0400: 1, sdhci@700b0600: 0

Then:

Tegra124 (Jetson TK1) # mmc rescan  
tegra_mmc_send_cmd_bounced: MMC Timeout 
Interrupt status0x0001  
Interrupt status enable 0x003b  
Interrupt signal enable 0x0002  
Present status  0x01fb02f6  
mmc_init: -1, time 8042

Peter C
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Re: [U-Boot] u-boot-flasher fails with current u-boot

2017-06-06 Thread Peter.Chubb

> "Simon" == Simon Glass  writes:

:
Simon> Oh dear. I cannot find my board but will see if I can repeat
Simon> this on a beaver.
Thanks.

If there's any additional logging you'd like me to collect on the
Jetson, let me know.

Peter C
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Re: [U-Boot] [PATCH] DTS: Enable top USB port on CEI-TK1-SOM

2017-02-07 Thread Peter.Chubb

> "Allen" == Allen Martin  writes:

Allen> On Tue, Feb 07, 2017 at 01:57:47PM +1100, Peter Chubb wrote:
>> From: Peter Chubb 
>> 
>> + usb@7d004000 {
>> +status = "okay";
>> + };
>> +
>> + usb-phy@7d004000 {
>> +status = "okay";
>> + };

Allen> Shouldn't these have a vbus-gpio and vbus-supply?

U-Boot seems to work OK without -- I can see storage devices plugged
into the port.
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Re: [U-Boot] net, cmd: fix misaligned cache operation warning

2016-10-05 Thread Peter.Chubb

> "Joe" == Joe Hershberger  writes:

>> 
>> Lacking a define for CONFIG_SYS_CACHELINE_SIZE first.

Joe> https://patchwork.ozlabs.org/patch/669691/

Joe> ...is the approach I prefer to take instead of this patch.

Is there anything more I need to do to push this patch?

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Re: [U-Boot] [PATCH v3] net: Fix cache misalignment message after network load operations

2016-09-13 Thread Peter.Chubb

> "Heiko" == Heiko Schocher  writes:

Heiko> Hello Peter, Am 14.09.2016 um 05:49 schrieb
Heiko> peter.ch...@data61.csiro.au:
>> After any operation that downloads a file (e.g., pxe get, or dhcp),
>> the buffer containing the downloaded data is flushed.  This is
>> unnecessary and annoying.  Unnecessary, because the network driver
>> should already have fliushed the cache for the DMAed area, and
>> annoying because it generates a cache misalignment message.
>> 
>> Signed-off-by: Peter Chubb 
>> ---
>> cmd/net.c | 3 --- 1 file changed, 3 deletions(-)

Heiko> I posted a fix for this here:
Heiko> http://patchwork.ozlabs.org/patch/663489/

Heiko> but I did not remove the flush operation ... can we really
Heiko> remove it?
 I believe so -- removing it was suggested by Joe Hershberger.

Heiko> If so, you can add my Acked-by: Heiko Schocher 

OK. thanks.
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[U-Boot] [PATCH v3] net: Fix cache misalignment message after network load operations

2016-09-13 Thread Peter.Chubb

After any operation that downloads a file (e.g., pxe get, or dhcp), the
buffer containing the downloaded data is flushed.  This is unnecessary
and annoying.  Unnecessary, because
the network driver should already have fliushed the cache for the DMAed area,
and annoying because it generates a cache misalignment message.

Signed-off-by: Peter Chubb 
---
 cmd/net.c |3 ---
 1 file changed, 3 deletions(-)

Index: u-boot/cmd/net.c
===
--- u-boot.orig/cmd/net.c   2016-09-07 13:50:46.616156851 +1000
+++ u-boot/cmd/net.c2016-09-07 19:18:18.962450874 +1000
@@ -243,9 +243,6 @@ static int netboot_common(enum proto_t p
return CMD_RET_SUCCESS;
}
 
-   /* flush cache */
-   flush_cache(load_addr, size);
-
bootstage_mark(BOOTSTAGE_ID_NET_LOADED);
 
rcode = bootm_maybe_autostart(cmdtp, argv[0]);
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Re: [U-Boot] [PATCH v2] Fix cache misalignment after network load operations

2016-09-13 Thread Peter.Chubb

> "Fabio" == Fabio Estevam  writes:

Fabio> On Tue, Sep 13, 2016 at 10:30 PM, 
Fabio> wrote:
>> After any operation that downloads a file (e.g., pxe get, or dhcp),
>> the buffer containing the downloaded data is flushed.  This patch
>> rounds up the flushed size to a cacheline boundary, preventing a
>> cache misalignment message from u-boot.

Fabio> Looks like you missed to update the commit log for v2 as you
Fabio> are no longer flushing the cache :-)

Arrgh.  Thanks for this -- will respin and resubmit.

Fabio> Also, in the Subject line it is always good practice to start
Fabio> with the subsystem name, so something like: net: Remove
Fabio> flush_cache() operation

 Will do.

Peter C
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[U-Boot] [PATCH v2] rtl8169: fix cache misalignment message on transmit.

2016-09-13 Thread Peter.Chubb

The call to flush cache on the transmit buffer was misplaced (for very
short packets) and asked to flush less than a cacheline.

Move the flush cache call to after a short packet has been padded
to minimum length (so the padding is flushed too), and round the size
up to a cacheline.

Signed-off-by: Peter Chubb 
Acked-by: Joe Hershberger 
---
 drivers/net/rtl8169.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index 1cc0b40..a3f4423 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -629,11 +629,12 @@ static int rtl_send_common(pci_dev_t dev, unsigned long 
dev_iobase,
/* point to the current txb incase multiple tx_rings are used */
ptxb = tpc->Tx_skbuff[entry * MAX_ETH_FRAME_SIZE];
memcpy(ptxb, (char *)packet, (int)length);
-   rtl_flush_buffer(ptxb, length);
 
while (len < ETH_ZLEN)
ptxb[len++] = '\0';
 
+   rtl_flush_buffer(ptxb, ALIGN(len, RTL8169_ALIGN));
+
tpc->TxDescArray[entry].buf_Haddr = 0;
 #ifdef CONFIG_DM_ETH
tpc->TxDescArray[entry].buf_addr = cpu_to_le32(
-- 
2.9.3
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[U-Boot] [PATCH v2] Fix cache misalignment after network load operations

2016-09-13 Thread Peter.Chubb

After any operation that downloads a file (e.g., pxe get, or dhcp), the
buffer containing the downloaded data is flushed.  This patch rounds
up the flushed size to a cacheline boundary, preventing a cache
misalignment message from u-boot.

Signed-off-by: Peter Chubb 
---
 cmd/net.c |3 ---
 1 file changed, 3 deletions(-)

Index: u-boot/cmd/net.c
===
--- u-boot.orig/cmd/net.c   2016-09-07 13:50:46.616156851 +1000
+++ u-boot/cmd/net.c2016-09-07 19:18:18.962450874 +1000
@@ -243,9 +243,6 @@ static int netboot_common(enum proto_t p
return CMD_RET_SUCCESS;
}
 
-   /* flush cache */
-   flush_cache(load_addr, size);
-
bootstage_mark(BOOTSTAGE_ID_NET_LOADED);
 
rcode = bootm_maybe_autostart(cmdtp, argv[0]);
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[U-Boot] [PATCH] Fix fastboot boot address

2016-09-08 Thread Peter.Chubb

Fastboot loads an image at CONFIG_FASTBOOT_BUF_ADDR, but currently
tells do_bootm() to look for an image at $loadaddr.  This breaks if
CONFIG_FASTBOOT_BUF_ADDR is different from the current user-set
loadaddr.

Instead, tell do_bootm() to pick up the image where it was laoded.

Signed-off-by: Peter Chubb 
---
 drivers/usb/gadget/f_fastboot.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 2160b1c..6d02248 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -553,7 +553,7 @@ static void do_bootm_on_complete(struct usb_ep *ep, struct 
usb_request *req)
 
puts("Booting kernel..\n");
 
-   sprintf(boot_addr_start, "0x%lx", load_addr);
+   sprintf(boot_addr_start, "0x%lx", CONFIG_FASTBOOT_BUF_ADDR);
do_bootm(NULL, 0, 2, bootm_args);
 
/* This only happens if image is somehow faulty so we start over */
-- 
2.9.3
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[U-Boot] [PATCH] Fix fastboot boot address Fastboot loads an image at CONFIG_FASTBOOT_BUF_ADDR, but currently tells do_bootm() to look for an image at $loadaddr. This breaks if CONFIG_FASTBOOT_BUF_ADD

2016-09-08 Thread Peter.Chubb

Instead, tell do_bootm() to pick up the image where it was laoded.

Signed-off-by: Peter Chubb 
---
 drivers/usb/gadget/f_fastboot.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 2160b1c..6d02248 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -553,7 +553,7 @@ static void do_bootm_on_complete(struct usb_ep *ep, struct 
usb_request *req)
 
puts("Booting kernel..\n");
 
-   sprintf(boot_addr_start, "0x%lx", load_addr);
+   sprintf(boot_addr_start, "0x%lx", CONFIG_FASTBOOT_BUF_ADDR);
do_bootm(NULL, 0, 2, bootm_args);
 
/* This only happens if image is somehow faulty so we start over */
-- 
2.9.3
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Re: [U-Boot] "_ENTRY" is both a struct and a typedef?

2016-09-08 Thread Peter.Chubb

> "Robert" == Robert P J Day  writes:

Robert>   from lib/hashtable.c:

Robert>   typedef struct _ENTRY { int used; ENTRY entry; } _ENTRY;

Robert> ok, that's just kind of creepy ... defining a typedef over top
Robert> of a struct of the same name. does anyone else find that
Robert> strange?

It's standard practice in some C styles.  Personally I'd delete the
struct tag, as the typedef should be used everywhere instead.

Peter C
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[U-Boot] RFC: 'fastboot boot' uses wrong address when calling bootm

2016-09-07 Thread Peter.Chubb

Hi Folks,
   If you set CONFIG_FASTBOOT_BUF_ADDR to anything other than the same
   as $loadaddr then the call to do_bootm() in the fastboot code
   will call do_bootm on a memory region that has nothing to do with
   the image downloaded.  Sometimes the result is a hung system, other
   times the system reboots.

   I'm not sure of the correct fix.  The possibilities are:
   1. Get rid of CONFIG_FASTBOOT_BUF_ADDR and use $loadaddr
   instead.  All the defconfigs that enable fastboot currently set
   CONFIG_FASTBOOT_BUF_ADDR to the same value as CONFIG_LOADADDR at
   present.

   2. memcpy from the downloaded image to $loadaddr if possible.  This
   would allow other payloads than ANDROID boot images, with a bit
   more work. (For example, I'd love to be able to boot ELF images
   using fastboot -- which doesn't work at present, because the
   entry point in the elf header isn't used)

   3. The simplest: call do_bootm() with the address where the
   image has just been downloaded.  The attached patch does this.

What do you think?

Peter C

 drivers/usb/gadget/f_fastboot.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Index: u-boot/drivers/usb/gadget/f_fastboot.c
===
--- u-boot.orig/drivers/usb/gadget/f_fastboot.c 2016-09-06 14:10:55.791917017 
+1000
+++ u-boot/drivers/usb/gadget/f_fastboot.c  2016-09-07 19:20:23.087155135 
+1000
@@ -553,7 +553,7 @@ static void do_bootm_on_complete(struct
 
puts("Booting kernel..\n");
 
-   sprintf(boot_addr_start, "0x%lx", load_addr);
+   sprintf(boot_addr_start, "0x%lx", CONFIG_FASTBOOT_BUF_ADDR);
do_bootm(NULL, 0, 2, bootm_args);
 
/* This only happens if image is somehow faulty so we start over */


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[U-Boot] [PATCH v2] ARM: tegra: increase console buffer size and sys args num

2016-09-01 Thread Peter.Chubb

From: Bryan Wu 

The Linux-for-Tegra kernel uses a very long command line.

The default value of CONFIG_SYS_CBSIZE is too small to printf out the
long command line and causes a message like:
  bootarg overflow 602+0+0+1 > 512
on the console, and the board refuses to boot.

The default value of CONFIG_SYS_MAXARGS is too small to add a long
long command line, and the kernel won't boot without the complete
bootargs.

Increasing these two config options solves this problem.

Signed-off-by: Bryan Wu 
Signed-off-by: Peter Chubb 
Acked-by: Stephen Warren 
---
 include/configs/tegra-common.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index 7b0940a..6bfd7b2 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -76,11 +76,12 @@
  * Increasing the size of the IO buffer as default nfsargs size is more
  *  than 256 and so it is not possible to edit it
  */
-#define CONFIG_SYS_CBSIZE  (256 * 2) /* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE  (1024 * 2) /* Console I/O Buffer Size */
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE  (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS 32  /* max number of command args */
+#define CONFIG_SYS_MAXARGS 64  /* max number of command args */
+
 /* Boot Argument Buffer Size */
 #define CONFIG_SYS_BARGSIZE(CONFIG_SYS_CBSIZE)
 
-- 
2.9.3
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Re: [U-Boot] ARM: tegra: jetson-tk1: Increase console buffer size

2016-09-01 Thread Peter.Chubb

> "Stephen" == Stephen Warren  writes:


Stephen> I don't have that message either, and Google can't find it.

I'll send it again.

Thanks.

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Re: [U-Boot] ARM: tegra: jetson-tk1: Increase console buffer size

2016-09-01 Thread Peter.Chubb

> "Tom" == Tom Warren  writes:

Tom> Peter, It appears that this got rolled into 'ARM: tegra: increase
Tom> console buffer size and sys args num', so I'm going to mark it as
Tom> Superseded in my Patchwork queue.

Yes, Stephen asked me to cherrypick instead from the tegra u-boot
repo, and I did and submitted it.  

Tom> What's the status of the 'increase console buffer size and sys
Tom> args num' patch? I've currently got it marked as 'Changes
Tom> Requested'.

Maybe you missed it, but the changed version was sent to the U-Boot
list.  I'll send it again if need be.  Message ID:
20160825011915.4767-1-peter.ch...@data61.csiro.au

Peter C
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[U-Boot] [PATCH v2] ARM: tegra: Add support for TK1-SOM board from Colorado Engineering

2016-08-30 Thread Peter.Chubb

The Colorado TK1 SOM is a small form factor board similar to the
Jetson TK1.  The main differences lie in the pinmux, and in that the
PCIe controller is set to use in 4lanes+1lane, rather than 2+2.

The pinmux header here was generated from a spreadsheet provided by
Colorado Engineering using the tegra-pinmux scripts.  The spreadsheet
was converted from v09 to v11 by me.

Signed-off-by: Peter Chubb 
Acked-by: Stephen Warren 
---
 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/tegra124-cei-tk1-som.dts | 477 ++
 arch/arm/mach-tegra/tegra124/Kconfig  |  12 +
 board/cei/cei-tk1-som/Kconfig |  12 +
 board/cei/cei-tk1-som/MAINTAINERS |   6 +
 board/cei/cei-tk1-som/Makefile|   9 +
 board/cei/cei-tk1-som/cei-tk1-som.c   |  65 +++
 board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h | 301 ++
 board/nvidia/venice2/as3722_init.h|   8 +-
 configs/cei-tk1-som_defconfig |  47 +++
 include/configs/cei-tk1-som.h |  73 
 11 files changed, 1007 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/dts/tegra124-cei-tk1-som.dts
 create mode 100644 board/cei/cei-tk1-som/Kconfig
 create mode 100644 board/cei/cei-tk1-som/MAINTAINERS
 create mode 100644 board/cei/cei-tk1-som/Makefile
 create mode 100644 board/cei/cei-tk1-som/cei-tk1-som.c
 create mode 100644 board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h
 create mode 100644 configs/cei-tk1-som_defconfig
 create mode 100644 include/configs/cei-tk1-som.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7d1944f..25fc22f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -57,6 +57,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra114-dalmore.dtb \
tegra124-jetson-tk1.dtb \
tegra124-nyan-big.dtb \
+   tegra124-cei-tk1-som.dtb \
tegra124-venice2.dtb \
tegra186-p2771--a02.dtb \
tegra186-p2771--b00.dtb \
diff --git a/arch/arm/dts/tegra124-cei-tk1-som.dts 
b/arch/arm/dts/tegra124-cei-tk1-som.dts
new file mode 100644
index 000..d22c0ca
--- /dev/null
+++ b/arch/arm/dts/tegra124-cei-tk1-som.dts
@@ -0,0 +1,477 @@
+/dts-v1/;
+
+#include "tegra124.dtsi"
+
+/ {
+   model = "Colorado Engineering TK1-SOM";
+   compatible = "nvidia,cei-tk1-som", "nvidia,tegra124";
+
+   chosen {
+   stdout-path = 
+   };
+
+   aliases {
+   i2c0 = "/i2c@7000d000";
+   i2c1 = "/i2c@7000c000";
+   i2c2 = "/i2c@7000c400";
+   i2c3 = "/i2c@7000c500";
+   i2c4 = "/i2c@7000c700";
+   sdhci0 = "/sdhci@700b0600";
+   sdhci1 = "/sdhci@700b0400";
+   spi0 = "/spi@7000d400";
+   spi1 = "/spi@7000da00";
+   usb0 = "/usb@7d00";
+   usb1 = "/usb@7d008000";
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x8000>;
+   };
+
+   pcie-controller@01003000 {
+   status = "okay";
+
+   avddio-pex-supply = <_1v05_run>;
+   dvddio-pex-supply = <_1v05_run>;
+   avdd-pex-pll-supply = <_1v05_run>;
+   hvdd-pex-supply = <_3v3_lp0>;
+   hvdd-pex-pll-e-supply = <_3v3_lp0>;
+   vddio-pex-ctl-supply = <_3v3_lp0>;
+   avdd-pll-erefe-supply = <_1v05_run>;
+
+   pci@1,0 {
+   status = "okay";
+   nvidia,num-lanes = <4>;
+   };
+
+   pci@2,0 {
+   status = "okay";
+   };
+   };
+
+   i2c@7000c000 {
+   status = "okay";
+   clock-frequency = <10>;
+   };
+
+   i2c@7000c400 {
+   status = "okay";
+   clock-frequency = <10>;
+   };
+
+   i2c@7000c500 {
+   status = "okay";
+   clock-frequency = <10>;
+   };
+
+   i2c@7000c700 {
+   status = "okay";
+   clock-frequency = <10>;
+   };
+
+   /* Expansion PWR_I2C_*, on-board components */
+   i2c@7000d000 {
+   status = "okay";
+   clock-frequency = <40>;
+
+   pmic: pmic@40 {
+   compatible = "ams,as3722";
+   reg = <0x40>;
+   interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
+
+   ams,system-power-controller;
+
+   #interrupt-cells = <2>;
+   interrupt-controller;
+
+   gpio-controller;
+   #gpio-cells = <2>;
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_default>;
+
+   as3722_default: pinmux {
+

Re: [U-Boot] [PATCH] ARM: tegra: Add support for TK1-SOM board from Colorado Engineering

2016-08-30 Thread Peter.Chubb

> "Stephen" == Stephen Warren  writes:

Stephen> On 08/29/2016 06:51 PM, peter.ch...@data61.csiro.au wrote:
>> The Colorado TK1 SOM is a small form factor board similar to the
>> Jetson TK1.  The main differences lie in the pinmux, and in that
>> the PCIe controller is set to use in 4lanes+1lane, rather than 2+2.
>> 
>> The pinmux header here was generated from a spreadsheet provided by
>> Colorado Engineering using the tegra-pinmux scripts.  The
>> spreadsheet was converted from v09 to v11 by me.

>> diff --git a/arch/arm/mach-tegra/tegra124/Kconfig
>> b/arch/arm/mach-tegra/tegra124/Kconfig

>> +config TARGET_CEI_TK1_SOM + bool "Colorado/NVIDIA Tegra124 TK1-som
>> board"

Stephen> I think that should say:

Stephen>bool "Colorado Engineering Inc TK1-som board"

Stephen> I assume that NVIDIA had no part in creating this derivative;
Stephen> they simply created the board it was based on.

As far a I know that's the case.  It's an NVIDIA SoC though.

>> diff --git a/include/configs/cei-tk1-som.h
>> b/include/configs/cei-tk1-som.h

>> + * (C) Copyright 2016 Peter Chubb
>> + * Based on the jetson-tk1.h which is

Stephen> There's trailing whitespace on that line.

Stephen> I might suggest adding a : to the end of the line, so it's
Stephen> more obvious (when looking at just the added lines) that it's
Stephen> referring to the next line rather than a statement that
Stephen> wasn't finished.

OK.  I need to fix the copyright header too (my employer wants a
mention, which is fair enough as they're paying for me to do this work))

Stephen> Is that true? I'd like to see a patch for
Stephen> tegra-pinmux-scripts that adds the config file for this board
Stephen> too.

It's on its way.  I'm currently trying to get the Linux DTS part working.

Stephen> Aside from those minor issues, Acked-by: Stephen Warren
Stephen> 

Thanks.
-- 
Dr Peter Chubb Tel: +61 2 9490 5852  http://www.data61.csiro.au
http://ts.data61.csiro.au  Software Systems Research Group/NICTA/Data61
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[U-Boot] [PATCH 2/2] Fix cache misalignment after network load operations

2016-08-29 Thread Peter.Chubb

After any operation that downloads a file (e.g., pxe get, or dhcp), the
buffer containing the downloaded data is flushed.  This patch rounds
up the flushed size to a cacheline boundary, preventing a cache
misalignment message from u-boot.

Signed-off-by: Peter Chubb 
---
 cmd/net.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cmd/net.c b/cmd/net.c
index b2f3c7b..540daeb 100644
--- a/cmd/net.c
+++ b/cmd/net.c
@@ -244,7 +244,7 @@ static int netboot_common(enum proto_t proto, cmd_tbl_t 
*cmdtp, int argc,
}
 
/* flush cache */
-   flush_cache(load_addr, size);
+   flush_cache(load_addr, ALIGN(size, CONFIG_SYS_CACHELINE_SIZE));
 
bootstage_mark(BOOTSTAGE_ID_NET_LOADED);
 
-- 
2.9.3
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[U-Boot] [PATCH 1/2] rtl8169: fix cache misalignment message on transmit.

2016-08-29 Thread Peter.Chubb

The call to flush cache on the transmit buffer was misplaced (for very
short packets) and asked to flush less than a cacheline.

Move the flush cache call to after a short packet has been padded
to minimum length (so the padding is flushed too), and round the size
up to a cacheline.

Signed-off-by: Peter Chubb 
---
 drivers/net/rtl8169.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index 1cc0b40..a3f4423 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -629,11 +629,12 @@ static int rtl_send_common(pci_dev_t dev, unsigned long 
dev_iobase,
/* point to the current txb incase multiple tx_rings are used */
ptxb = tpc->Tx_skbuff[entry * MAX_ETH_FRAME_SIZE];
memcpy(ptxb, (char *)packet, (int)length);
-   rtl_flush_buffer(ptxb, length);
 
while (len < ETH_ZLEN)
ptxb[len++] = '\0';
 
+   rtl_flush_buffer(ptxb, ALIGN(len, RTL8169_ALIGN));
+
tpc->TxDescArray[entry].buf_Haddr = 0;
 #ifdef CONFIG_DM_ETH
tpc->TxDescArray[entry].buf_addr = cpu_to_le32(
-- 
2.9.3
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[U-Boot] [PATCH] ARM: tegra: Add support for TK1-SOM board from Colorado Engineering

2016-08-29 Thread Peter.Chubb

The Colorado TK1 SOM is a small form factor board similar to the
Jetson TK1.  The main differences lie in the pinmux, and in that the
PCIe controller is set to use in 4lanes+1lane, rather than 2+2.

The pinmux header here was generated from a spreadsheet provided by
Colorado Engineering using the tegra-pinmux scripts.  The spreadsheet
was converted from v09 to v11 by me.

Signed-off-by: Peter Chubb 
---
 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/tegra124-cei-tk1-som.dts | 477 ++
 arch/arm/mach-tegra/tegra124/Kconfig  |  11 +
 board/cei/cei-tk1-som/Kconfig |  12 +
 board/cei/cei-tk1-som/MAINTAINERS |   6 +
 board/cei/cei-tk1-som/Makefile|   9 +
 board/cei/cei-tk1-som/cei-tk1-som.c   |  65 +++
 board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h | 301 ++
 board/nvidia/venice2/as3722_init.h|   8 +-
 configs/cei-tk1-som_defconfig |  47 +++
 include/configs/cei-tk1-som.h |  71 
 11 files changed, 1004 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/dts/tegra124-cei-tk1-som.dts
 create mode 100644 board/cei/cei-tk1-som/Kconfig
 create mode 100644 board/cei/cei-tk1-som/MAINTAINERS
 create mode 100644 board/cei/cei-tk1-som/Makefile
 create mode 100644 board/cei/cei-tk1-som/cei-tk1-som.c
 create mode 100644 board/cei/cei-tk1-som/pinmux-config-cei-tk1-som.h
 create mode 100644 configs/cei-tk1-som_defconfig
 create mode 100644 include/configs/cei-tk1-som.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7d1944f..25fc22f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -57,6 +57,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra114-dalmore.dtb \
tegra124-jetson-tk1.dtb \
tegra124-nyan-big.dtb \
+   tegra124-cei-tk1-som.dtb \
tegra124-venice2.dtb \
tegra186-p2771--a02.dtb \
tegra186-p2771--b00.dtb \
diff --git a/arch/arm/dts/tegra124-cei-tk1-som.dts 
b/arch/arm/dts/tegra124-cei-tk1-som.dts
new file mode 100644
index 000..d22c0ca
--- /dev/null
+++ b/arch/arm/dts/tegra124-cei-tk1-som.dts
@@ -0,0 +1,477 @@
+/dts-v1/;
+
+#include "tegra124.dtsi"
+
+/ {
+   model = "Colorado Engineering TK1-SOM";
+   compatible = "nvidia,cei-tk1-som", "nvidia,tegra124";
+
+   chosen {
+   stdout-path = 
+   };
+
+   aliases {
+   i2c0 = "/i2c@7000d000";
+   i2c1 = "/i2c@7000c000";
+   i2c2 = "/i2c@7000c400";
+   i2c3 = "/i2c@7000c500";
+   i2c4 = "/i2c@7000c700";
+   sdhci0 = "/sdhci@700b0600";
+   sdhci1 = "/sdhci@700b0400";
+   spi0 = "/spi@7000d400";
+   spi1 = "/spi@7000da00";
+   usb0 = "/usb@7d00";
+   usb1 = "/usb@7d008000";
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x8000>;
+   };
+
+   pcie-controller@01003000 {
+   status = "okay";
+
+   avddio-pex-supply = <_1v05_run>;
+   dvddio-pex-supply = <_1v05_run>;
+   avdd-pex-pll-supply = <_1v05_run>;
+   hvdd-pex-supply = <_3v3_lp0>;
+   hvdd-pex-pll-e-supply = <_3v3_lp0>;
+   vddio-pex-ctl-supply = <_3v3_lp0>;
+   avdd-pll-erefe-supply = <_1v05_run>;
+
+   pci@1,0 {
+   status = "okay";
+   nvidia,num-lanes = <4>;
+   };
+
+   pci@2,0 {
+   status = "okay";
+   };
+   };
+
+   i2c@7000c000 {
+   status = "okay";
+   clock-frequency = <10>;
+   };
+
+   i2c@7000c400 {
+   status = "okay";
+   clock-frequency = <10>;
+   };
+
+   i2c@7000c500 {
+   status = "okay";
+   clock-frequency = <10>;
+   };
+
+   i2c@7000c700 {
+   status = "okay";
+   clock-frequency = <10>;
+   };
+
+   /* Expansion PWR_I2C_*, on-board components */
+   i2c@7000d000 {
+   status = "okay";
+   clock-frequency = <40>;
+
+   pmic: pmic@40 {
+   compatible = "ams,as3722";
+   reg = <0x40>;
+   interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
+
+   ams,system-power-controller;
+
+   #interrupt-cells = <2>;
+   interrupt-controller;
+
+   gpio-controller;
+   #gpio-cells = <2>;
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_default>;
+
+   as3722_default: pinmux {
+   gpio0 {
+

Re: [U-Boot] [PATCH] tegra: mmc: Set the bus width correctly

Re: [U-Boot] u-boot-flasher fails with current u-boot

Re: [U-Boot] u-boot-flasher fails with current u-boot

Re: [U-Boot] u-boot-flasher fails with current u-boot

Re: [U-Boot] [PATCH] DTS: Enable top USB port on CEI-TK1-SOM

Re: [U-Boot] net, cmd: fix misaligned cache operation warning

Re: [U-Boot] [PATCH v3] net: Fix cache misalignment message after network load operations

[U-Boot] [PATCH v3] net: Fix cache misalignment message after network load operations

Re: [U-Boot] [PATCH v2] Fix cache misalignment after network load operations

[U-Boot] [PATCH v2] rtl8169: fix cache misalignment message on transmit.

[U-Boot] [PATCH v2] Fix cache misalignment after network load operations

[U-Boot] [PATCH] Fix fastboot boot address

[U-Boot] [PATCH] Fix fastboot boot address Fastboot loads an image at CONFIG_FASTBOOT_BUF_ADDR, but currently tells do_bootm() to look for an image at $loadaddr. This breaks if CONFIG_FASTBOOT_BUF_ADD

Re: [U-Boot] "_ENTRY" is both a struct and a typedef?

[U-Boot] RFC: 'fastboot boot' uses wrong address when calling bootm

[U-Boot] [PATCH v2] ARM: tegra: increase console buffer size and sys args num

Re: [U-Boot] ARM: tegra: jetson-tk1: Increase console buffer size

Re: [U-Boot] ARM: tegra: jetson-tk1: Increase console buffer size

[U-Boot] [PATCH v2] ARM: tegra: Add support for TK1-SOM board from Colorado Engineering

Re: [U-Boot] [PATCH] ARM: tegra: Add support for TK1-SOM board from Colorado Engineering

[U-Boot] [PATCH 2/2] Fix cache misalignment after network load operations

[U-Boot] [PATCH 1/2] rtl8169: fix cache misalignment message on transmit.

[U-Boot] [PATCH] ARM: tegra: Add support for TK1-SOM board from Colorado Engineering

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